Compal LA-3201P, Satellite A110 Schematic

A

1 1

B

C

D

E

HTW2E

2 2

LA-3201P

3 3

REV 1.0 Schematic

UFC-PGA Yonah/ RC410MD(ME)/ SB450

2006-04-18 Rev. 1.0

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/11/01 2006/11/01

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Black Diagram

Size Document Number Rev

HTW2E(LA-3201P) 1.0

B

Friday, April 21, 2006

D

Date: Sheet

146

E

of

A

B

C

D

E

HTW2E LA-3201P FUNCTION BLOCK DIAGRAM

4 4

CRT Conn.

page 14

LCD Conn

page 13

LVDS & TV-OUT Conn.

3 3

2 2

CARDBUS

CB1410

PAGE 21

VIA6311S

PAGE 23

page 13

PCI BUS

33MHz (3.3V)

Mini Card
FOR WLAN

PAGE 24

LAN

RTL8100CL

PAGE 20

PCI-E X1

Mobile Yonah
uFCPGA-479 Pin

FSB

533 MHz

ATI-RC410MD

VGA M10P Embeded

707 pin BGA

A-Link Express x 4

2.5GHz(1.2V)

Bandwidth 500MB

ATI-SB450

564 pin BGA

PAGE 15,16,17,18,19

LPC BUS 33MHz (3.3V)

PAGE 4,5,6

PAGE 7,8,9

Thermal Sensor
ADM1032ARM

400/533/667MHz
(1.8V)

Memory Bus

480MHz(5V)

Primary SATA

3.3V,5V 1.5GHz(150MB/s)

Secondary
ATA-100 (5V)

Clock Generator
ICS951411AGT

PAGE 5

SO-DIMM x 2(DDRII)

BANK 0,1,2,3

USB 2.0 Port *3
0,2,4

SATA HDD

IDE ODD

PAGE 28

PAGE 17

PAGE 27

PAGE 11

PAGE 10,11

CPU VID

PAGE 5

FANController

RTC Battery

DC/DC Interface

Power Buttom

DCIN&DETECTOR

BATT CONN/OTP

CHARGER

3V/5V/12V

DDR_1.8V/0.9VEP

1.8VCORE

1.5V/PROCHOT

CPU_CORE

PAGE 33

PAGE 15

PAGE 34

PAGE 31

PAGE 35

PAGE 36

PAGE 37

PAGE 38

PAGE 39

PAGE 39

PAGE 40

PAGE 41

CARD BUS
SOCKET

PAGE 22

1394-Port

PAGE 23

RJ-45

PAGE 20

TPM

SLB 9635

PAGE 27

Embedded
Controller

ENE KB910

PAGE 29

AZALIA
24MHz(3.3V)

HD CODEC

ALC 861

PAGE 25

Audio Amplifier

APA2068

PAGE 26

MOM

BIOS(1M)

1 1

A

B

& I/O PORT

PAGE 30

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Scan KB

PAGE 32

2005/11/01 2006/11/01

C

Compal Secret Data

Deciphered Date

PAGE 43,43

Compal Electronics, Inc.

Title

Black Diagram

Size Document Number Rev

HTW2E(LA-3201P) 1.0

Custom

Friday, April 21, 2006

D

Date: Sheet

246

E

of

A

B

C

D

E

Rb

0

NC7

SIGNAL

HIGH

LOW

LOW

AD_BID

0.436 V

0.712 V

1.036 V

1.935 V

2.500 V

SLP_S5#STATE

HIGHHIGH

HIGH

HIGH

HIGH

LOWLOW

minV

0 V

+VALW

ON

ON

ON

ON

ON

+V

ON

ON

ON

OFF

OFF

AD_BID

0.503 V

0.819 V

1.650 V1.453 V

2.200 V

3.300 V

typV

0 V

+VSSLP_S3#

ON

OFF

OFF

OFF

Clock

ONON

LOW

OFF

OFF

OFF

V

AD_BID

0.289 V0.250 V0.216 V

0.538 V

0.875 V

1.264 V1.185 V

1.759 V

2.341 V

3.300 V

max

0 V

Voltage Rails

Power Plane Description

1 1

2 2

VIN
B+
+CPU_CORE
+CPUVID
+VGA_CORE ON OFF OFF1.0V/1.2V switched power rail for VGA chip
+1.2VS 1 .2 VS fo r PCI-Express OFFON OF F
+0.9VS 0.9V switched power rail
+1.5VS
+1.8VS 1.8VS switched power rail OFFOFFON
+1.8VALW 1.8V always on power rail ON *ONON
+1.8V
+3VALW
+3VS

+5VS
+12VALW
+RTCVCC

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

Adapter power supply (19V)
AC or batte ry power rail for power circuit.
Core voltage for CPU

1.2V switched power rail for CPU AGTL Bus

DOTHAN B

1.8V power rail

3.3V always on power rail

3.3V switched power rail
5V always on power rail
5V switched power rail

RTC power

S1 S3 S5

ON
ON ONONON
ON OFF
ON OFF

ON OFF OF F
ON OFF OF F

ON ON
ON
ON
ON+5VALW
ON
ON
ON

OFF
ON
OFF
ON
ON

ON

OFF
OFF

OFF
ON*ON
OFF
ON*
OFF
ON*12V always on power rail
ON

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

Board ID Table for AD channel

Vcc
Ra

Board ID

0
1
2
3
4
5
6

3.3V +/- 5%
100K +/- 5%

8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%

External PCI Devices

Device IDSEL # REQ # / GNT # Interrupts

TI 1410
LAN
1394

AD20

AD22

AD16

2

1PIRQG

0

PIRQB

PIRQA

Board ID

0
1
2
3
4

3 3

5
6
7

PCB Revision

0.1

0.2

0.3

1.0

WIRELESS

1394

BOM STURCTUREBTO

WLAN@

1394@

EC SM Bus1 address

Device

Smart Battery

Address Address

EC SM Bus2 address

Device

ADM1032

1001 110X b0001 011X b

SKU ID

0
1
2
3
4
5
6
7

BTN_ID
1 Buttons
7 Buttons

SKU_ID

0
1

WW

JP

2
3
4
5
6
7

SB450 SM Bus address

4 4

Device

Clock Generator
(ICS951413BGLFT)

DDR DIMM0

DDR DIMM1

A

Address

1101 001Xb

1010 0100b
1010 0110b

A4
A6

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/03/01 2006/03/01

C

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

D

Date: Sheet

Compal Electronics, Inc.

Notes List

HTW2E(LA-3201P) 1.0

Friday, April 21, 2006

346

E

of

5

4

3

2

1

H_A#[3..31]7

H_A#4
H_A#5
H_A#6
H_A#7
H_A#8

D D

H_REQ#[0..4]7

H_ADSTB#07

H_RS#[0..2]7

R482 1K_0402_5%@

R484 51_0402_5%

H_ADSTB#17

CLK_BCLK12

CLK_BCLK#12

H_ADS#7
H_BNR#7

H_BPRI#7

H_BR0#7

H_DEFER#7

H_DRDY#7

H_HIT#7
H_HITM#7

H_LOCK#7

H_RESET#7,15

H_TRDY#7

H_DBSY#7

H_DPSLP#15

H_DPRSTP#41

H_DPWR#7

H_PWRGOOD15
H_CPUSLP#15

12
12

C C

B B

B

H_THERMDA, H_THERMDC routing together.
Trace width / Spacing = 10 / 10 mil

A A

For B-0 st ep p i ng engineer ing sampl es (ES) of Cel er on M
processor need to pop this 51 ohm resistor.

H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22

H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_ADSTB#0
H_ADSTB#1

CLK_BCLK
CLK_BCLK#

H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRDY#
H_HIT#
H_HITM#
H_IERR#
H_LOCK#
H_RESET#

H_RS#0
H_RS#1
H_RS#2
H_TRDY#

ITP_DBRESET#
H_DBSY#
H_DPSLP# H_BR0#
H_DPRSTP#
H_DPWR#

PROCHOT#

C

H_PWRGOOD
H_CPUSLP#
ITP_TCK
ITP_TDI
ITP_TDO
TEST1
TEST2
ITP_TMS
ITP_TRST#

H_THERMDA
H_THERMDC

H_THERMTRIP#

A

JCPU1A

J4

A3#

L4

A4#

M3

A5#

K5

A6#

M1

A7#

N2

A8#

J1

A9#

N3

A10#

P5

A11#

P2

A12#

L1

A13#

P4

A14#

P1

A15#

R1

A16#

Y2

A17#

U5

A18#

R3

A19#

W6

A20#

U4

A21#

Y5

A22#

U2

A23#

R4

A24#

T5

ADDR GROUP

A25#

T3

A26#

W3

A27#

W5

A28#

Y4

A29#

W2

A30#

Y1

A31#

K3

REQ0#

H2

REQ1#

K2

REQ2#

J3

REQ3#

L5

REQ4#

L2

ADSTB0#

V4

ADSTB1#

A22

BCLK0

AD4
AD3
AD1
AC4

C20

D24
AC2
AC1
D21

AC5
AA6
AB3
C26
D25
AB5
AB6

A21

H1
E2
G5

F1

H5

F21

G6
E4

D20

H4
B1

F3

F4
G3
G2

E1
B5
E5

D6
D7

A24
A25

C7

HOST CLK

BCLK1

ADS#
BNR#
BPRI#
BR0#
DEFER#
DRDY#
HIT#

CONTROL

HITM#
IERR#
LOCK#
RESET#

RS0#
RS1#
RS2#
TRDY#

BPM0#
BPM1#
BPM2#
BPM3#

DBR#
DBSY#
DPSLP#
DPRSTP#
DPWR#
PRDY#
PREQ#
PROCHOT#

PWRGOOD
SLP#
TCK
TDI
TDO
TEST1
TEST2
TMS
TRST#

THERMAL

THERMDA

DIODE

THERMDC
THERMTRIP#

FOX_PZ47903-2741-42_YONAH

YONAH

MISC

DATA GROUP

LEGACY CPU

D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DINV0#
DINV1#
DINV2#
DINV3#

DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#

A20M#
FERR#

IGNNE#

INIT#
LINT0
LINT1

STPCLK#

SMI#

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#

F24
E26
H22
F23
G25
E25
E23
K24
G24
J24
J23
H26
F26
K22
H25
N22
K25
P26
R23
L25
L22
L23
M23
P25
P22
P23
T24
R24
L26
T25
N24
AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26

J26
M26
V23
AC20

H23
M24
W24
AD23
G22
N25
Y25
AE24

A6
A5
C4
B3
C6
B4

D5
A3

H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20H_A#23
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_A20M#
H_FERR#
H_IGNNE#
H_INIT#
H_INTR
H_NMI

H_STPCLK#
H_SMI#

H_DINV#0 7
H_DINV#1 7
H_DINV#2 7
H_DINV#3 7

H_A20M# 15
H_FERR# 15
H_IGNNE# 15
H_INIT# 15
H_INTR 15
H_NMI 15

H_STPCLK# 15
H_SMI# 15

H_D#0H_A#3

E22

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

H_D#[0..63] 7

+CPU_CORE

+1.05VS

12

12

R464
47K_0402_5%

2

1 2

+1.05VS

Q55

R466
56_0402_5%

R468
470_0402_5%

1 2

3 1

B

2

R472 470_0402_5%

0.1U_0402_16V4Z@

12

1

C

Q53

E

2SC2411K_SC59

3

1 2

MAINPWON 16,35,36,38

A

H_DPRSTP#

B

H_DSTBN#[0..3] 7

H_DSTBP#[0..3] 7

R463

47K_0402_5%@

1 2

C665

+1.05VS

H_THERMTRIP#

R471 0_0402_5%

MMBT3904_SOT23

Place Caps Close to CPU Socket

C666 180P_0402_50V8J@

1 2

C667 180P_0402_50V8J@

1 2

C668 180P_0402_50V8J@

1 2

C669 180P_0402_50V8J@

1 2

C670 180P_0402_50V8J@

1 2

C671 180P_0402_50V8J@

1 2

C672 180P_0402_50V8J@

1 2

C673 180P_0402_50V8J@

1 2

C674 180P_0402_50V8J@

1 2

C675 180P_0402_50V8J@

1 2

2005/11/1 2006/11/01

H_INIT#
H_A20M#
H_CPUSLP#
H_INTR
H_NMI
H_SMI#
H_STPCLK#
H_IGNNE#
H_PWRGOOD
H_FERR#
H_DPSLP#

Compal Secret Data

Deciphered Date

C664

2200P_0402_50V7K

EC_SMB_CK229
EC_SMB_DA229

DPRSLPVR 15,41

R480 390_0402_5%@

1 2

R481 390_0402_5%@

1 2

R485 200_0402_5%

1 2

R486 390_0402_5%@

1 2

R487 390_0402_5%@

1 2

R489 390_0402_5%@

1 2

R491 390_0402_5%@

1 2

R492 390_0402_5%@

1 2

R493 200_0402_5%
R494 56_0402_5%
R495 200_0402_5%

2

12
12

1 2

+3VS

1

C663

0.1U_0402_16V4Z

1

H_THERMDA

2

H_THERMDC

75_0402_5%

PROCHOT#

C

+1.05VS

ITP_DBRESET#

ITP_TRST#

Title

Size Document Number Re v

Custom

Date: Sheet

2
3
8
7

+1.05VS

12

R469

H_DPRSTP#
H_RESET#
ITP_TMS
ITP_TDI
ITP_TDO

H_IERR#

ITP_TCK

Compal Electronics, Inc.

Yonah(1/2)-GTLITP

HTW2E(LA-3201P) 1.0

Friday, April 21, 2006

2

U26

D+
D­SCLK
SDATA

ADM1032ARM_RM8

12

R470
56_0402_5%@

R473 56_0402_5%@
R474 54.9_0402_1%@
R475 40.2_0402_1%
R476 150_0402_5%
R477 54.9_0402_1%@

R478 200_0402_5%
R479 56_0402_5%

R483 150_0402_5%

R488 680_0402_5%
R490 27.4_0402_1%

VDD1

ALERT#

THERM#

GND

2

B

1 2

1

1
6
4
5

+3VALW

12

1

C

E

3

12

12
12

R467

330_0402_5%

Q54

PMBT3904_SOT23@

12
12
12
12
12

12

H_PROCHOT# 16

446

12

R465

+3VALW

of

10K_0402_5%@

+1.05VS

5

4

3

2

1

Length match with i n 2 5 mils

Layout close CPU

20mils

1

C677

2

0.01U_0402_16V7K

CPU_BSEL2

VCCSENSE
VSSSENSE

1

2

PSI#41

CPU_VID041
CPU_VID141
CPU_VID241
CPU_VID341
CPU_VID441
CPU_VID541
CPU_VID641

+GTL_REF0

CPU_BSEL012
CPU_BSEL18,12
CPU_BSEL212

1

1

+1.05VS

+CPU_CORE

PSI#
CPU_VID0

CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

COMP0
COMP1
COMP2
COMP3

JCPU1B

AF7

VCCSENSE

AE7

VSSSENSE

B26

VCCA

K6

VCCP

J6

VCCP

M6

VCCP

N6

VCCP

YONAH

VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP

PSI#
VID0

VID1
VID2
VID3
VID4
VID5
VID6

GTLREF
BSEL0

BSEL1
BSEL2

COMP0
COMP1
COMP2
COMP3

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD

FOX_PZ47903-2741-42_YONAH

K21
M21

N21
R21

V21

W21

G21

AE6
AD6

AF5
AE5
AF4
AE3
AF2
AE2

AD26

B22
B23
C21

R26
U26

AB20
AA20
AF20
AE20
AB18
AB17
AA18

AA17
AD18
AD17
AC18
AC17

AF18

AF17

AF1
D22
C23
C24
AA1
AA4
AB2
AA3

B25

J21

T21

T22

T6

R6

V6

U1

V1

E7

D2

F6
D3
C1

M4
N5

T2

V3

B2

C3

AB26

VSS

AA25

VSS

AD25

VSS

AE26

VSS

AB23

VSS

AC24

VSS

AF24

VSS

AE23

VSS

AA22

VSS

AD22

VSS

AC21

VSS

AF21

VSS

AB19

VSS

AA19

VSS

AD19

VSS

AC19

VSS

AF19

VSS

AE19

VSS

AB16

VSS

AA16

VSS

AD16

VSS

AC16

VSS

AF16

VSS

AE16

VSS

AB13

VSS

AA14

VSS

AD13

VSS

AC14

VSS

AF13

VSS

AE14

VSS

AB11

VSS

AA11

VSS

AD11

VSS

AC11

VSS

AF11

VSS

AE11

VSS

AB8

VSS

AA8

VSS

AD8

VSS

AC8

VSS

AF8

VSS

AE8

VSS

AA5

VSS

AD5

VSS

AC6

VSS

AF6

VSS

AB4

VSS

AC3

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AF3
AE4
AB1
AA2
AD2
AE1
B6
C5
F5
E6
H6
J5
M5
L6
P6
R5
V5
U6
Y6
A4
D4
E3
H3
G4
K4
L3
P3
N4
T4
U3
Y3
W4
D1
C2
F2
G1

POWER, GROUNG, RESERVED SIGNALS AND NC

+CPU_CORE

D D

+1.05VS

R_A

12

+GTL_REF0

C C

Layout close CPU PIN AD26

0.5 inch (max)

R498
1K_0402_1%

R_B

12

R499
2K_0402_1%

R500 27.4_0402_1%
R501 54.9_0402_1%
R502 27.4_0402_1%
R503 54.9_0402_1%

VCCSENSE41
VSSSENSE41

R496 100_0402_1%

1 2

R497 100_0402_1%

1 2

+1.5VS

C676

10U_0805_10V4Z

1 2
1 2
1 2
1 2

TRACE CLOSELY CPU < 0.5'

COMP0, COMP2 layout : Width 25mils and Space 25mils
COMP1, COMP3 layout : Space 25mils

CPU_BSEL CPU_BSEL0 CPU_BSEL1

B B

133

166

A A

00

0

1

+CPU_CORE

JCPU1C

AE18

VCC

AE17

VCC

AB15

VCC

AA15

VCC

AD15

VCC

AC15

VCC

AF15

VCC

AE15

VCC

AB14

VCC

AA13

VCC

AD14

VCC

AC13

VCC

AF14

VCC

AE13

VCC

AB12

VCC

AA12

VCC

AD12

VCC

AC12

VCC

AF12

VCC

AE12

VCC

AB10

VCC

AB9

VCC

AA10

VCC

AA9

VCC

AD10

VCC

AD9

VCC

AC10

VCC

AC9

VCC

AF10

VCC

AF9

VCC

AE10

AE9
AB7
AA7
AD7
AC7
B20
A20

F20
E20
B18
B17
A18
A17
D18
D17
C18
C17

F18

F17
E18
E17
B15
A15
D15
C15

F15
E15
B14
A13
D14
C13

F14
E13
B12
A12
D12
C12

F12
E12
B10

A10
D10
C10

F10
E10

B9
A9
D9
C9
F9
E9

B7
A7
F7

POWER, GROUND

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

FOX_PZ47903-2741-42_YONAH

YONAH

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

K1
J2
M2
N1
T1
R2
V2
W1
A26
D26
C25
F25
B24
A23
D23
E24
B21
C22
F22
E21
B19
A19
D19
C19
F19
E19
B16
A16
D16
C16
F16
E16
B13
A14
D13
C14
F13
E14
B11
A11
D11
C11
F11
E11
B8
A8
D8
C8
F8
E8
G26
K26
J25
M25
N26
T26
R25
V25
W26
H24
G23
K23
L24
P24
N23
T23
U24
Y24
W23
H21
J22
M22
L21
P21
R22
V22
U21
Y21

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INF ORMATION. THIS SHEE T MAY N OT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/11/23 2006/11/22

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Yonah(2/2)-PWR/GND

Size Doc u ment Number Re v

HTW2E(LA-3201P) 1.0

Custom

Friday, April 21, 2006

2

Date: Sheet

546

1

of

5

+CPU_CORE

4

3

2

1

Place these inside
socket cavity on L8

D D

(North side
Secondary)

Place these inside
socket cavity on L8
(Sorth side
Secondary)

Place these inside
socket cavity on L8
(North side

C C

Primary)

Place these inside
socket cavity on L8
(Sorth side
Primary)

1

C678
10U_0805_6.3V6M

2

+CPU_CORE

1

C688
10U_0805_6.3V6M

2

+CPU_CORE

1

C698
10U_0805_6.3V6M

2

+CPU_CORE

1

C704
10U_0805_6.3V6M

2

1

C679
10U_0805_6.3V6M

2

1

C689
10U_0805_6.3V6M

2

1

C699
10U_0805_6.3V6M

2

1

C705
10U_0805_6.3V6M

2

1

C680
10U_0805_6.3V6M

2

1

C690
10U_0805_6.3V6M

2

1

C700
10U_0805_6.3V6M

2

1

C706
10U_0805_6.3V6M

2

1

C681
10U_0805_6.3V6M

2

1

C691
10U_0805_6.3V6M

2

1

C701
10U_0805_6.3V6M

2

1

C707
10U_0805_6.3V6M

2

1

C682
10U_0805_6.3V6M

2

1

C692
10U_0805_6.3V6M

2

1

C702
10U_0805_6.3V6M

2

1

C708
10U_0805_6.3V6M

2

1

C683
10U_0805_6.3V6M

2

1

C693
10U_0805_6.3V6M

2

1

C703
10U_0805_6.3V6M

2

1

C709
10U_0805_6.3V6M

2

1

C684
10U_0805_6.3V6M

2

1

C694
10U_0805_6.3V6M

2

22uF 0805 X5R -> 85 degree C

1

C685
10U_0805_6.3V6M

2

1

C695
10U_0805_6.3V6M

2

1

C686
10U_0805_6.3V6M

2

1

C696
10U_0805_6.3V6M

2

1

C687
10U_0805_6.3V6M

2

1

C697
10U_0805_6.3V6M

2

High Frequence Decoupling

Near VCORE regulator.

+1.05VS

C716

1

+

2

330U_D2E_2.5VM_R9

1

C717

0.1U_0402_10V7K

2

1

C718

0.1U_0402_10V7K

2

Place these inside
socket cavity on L8
(North side
Secondary)

1

C719

0.1U_0402_10V7K

2

1

C720

0.1U_0402_10V7K

2

1

C721

0.1U_0402_10V7K

2

1

C722

0.1U_0402_10V7K

2

South Side Secondary

B B

+CPU_CORE

C710

1

+

2

C711

1

+

2

C712

1

+

2

North Side Secondary

C713

1

+

2

C714

1

+

2

C715

1

+

2

330U_D_2VM

9mOhm
7343

A A

PS CAP

330U_D_2VM

9mOhm
7343
PS CAP

330U_D_2VM

9mOhm
7343
PS CAP

ESR <= 1.5m ohm
Capacitor > 1980uF

5

9mOhm
7343
PS CAP

330U_D_2VM

330U_D_2VM

9mOhm
7343
PS CAP

330U_D_2VM

9mOhm
7343
PS CAP

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/11/23 2006/11/22

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Yonah Bypass

Size Docu ment Number Rev

HTW2E(LA-3201P) 1.0

B

Wednesday, April 26, 2006

2

Date: Sheet

646

1

of

A

H_A#[3..31]4

H_REQ#[0..4]4

H_RS#[0..2]4

U21A

H_A#3

G28

A

H26
G27
G30
G29
G26
H28

H25
K28
H29

K24
K25

G25

E29
H27

M28

K29
K30

M30

K27

M29

K26
N28

N25
N24

E25
G24

E27
C11

D23
G23
E26

D26
E24

D11
B11

H22

D25
E11
G22

J28

J29

F29
F26

F28

J26
L28
L29

L26
L25
L27

F25
F24
E23

F23

F22

CPU_A3#
CPU_A4#
CPU_A5#
CPU_A6#
CPU_A7#
CPU_A8#
CPU_A9#
CPU_A10#
CPU_A11#
CPU_A12#
CPU_A13#
CPU_A14#
CPU_A15#
CPU_A16#
CPU_REQ0#
CPU_REQ1#
CPU_REQ2#
CPU_REQ3#
CPU_REQ4#
CPU_ADSTB0#

CPU_A17#
CPU_A18#
CPU_A19#
CPU_A20#
CPU_A21#
CPU_A22#
CPU_A23#
CPU_A24#
CPU_A25#
CPU_A26#
CPU_A27#
CPU_A28#
CPU_A29#
CPU_A30#
CPU_A31#
CPU_ADSTB1#

CPU_ADS#
CPU_BNR#
CPU_BPRI#
CPU_DEFER#
CPU_DRDY#
CPU_DBSY#

CPU_LOCK#
CPU_CPURSET#

CPU_RS2#
CPU_RS1#
CPU_RS0#

CPU_TRDY#
CPU_HIT#
CPU_HITM#

CPU_COMP_N
CPU_COMP_P

CPU_VREF

RESERVED0
RESERVED1
CPU_DPWR#

ADDR. GROUP

ADDR. GROUP

PART 1 OF 6

0

1

CPU I/F

CONTROLMISC.

RC410MD

216CPP4AKA21HK_BGA707

H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9

***

R30

12

R234

12

+CPU_VREF

1

C123

2

H_BR0#
H_DPWR#

H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15

H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17

H_A#18

H_A#19

H_A#20

H_A#21

H_A#22

H_A#23

H_A#24

H_A#25

H_A#26

H_A#27

H_A#28

H_A#29

H_A#30

H_A#31

H_RS#2
H_RS#1
H_RS#0

HSCOMP

HRCOMP

1 1

H_ADSTB#04

2 2

H_ADSTB#14

H_ADS#4
H_BNR#4
H_BPRI#4
H_DEFER#4
H_DRDY#4
H_DBSY#4

H_LOCK#4
H_RESET#4,15

H_TRDY#4
H_HIT#4
H_HITM#4

3 3

+1.05VS

24.9_0402_1%

49.9_0402_1%

220P_0402_50V7K

Place C close
to Ball H22

H_BR0#4

4 4

H_DPWR#4

CPU_D0#
CPU_D1#
CPU_D2#
CPU_D3#
CPU_D4#
CPU_D5#
CPU_D6#
CPU_D7#
CPU_D8#

CPU_D9#
CPU_D10#
CPU_D11#
CPU_D12#
CPU_D13#

DATA GROUP 0

CPU_D14#
CPU_D15#

CPU_DBI0#
CPU_DSTBN0#
CPU_DSTBP0#

CPU_D16#
CPU_D17#
CPU_D18#
CPU_D19#
CPU_D20#
CPU_D21#
CPU_D22#
CPU_D23#
CPU_D24#
CPU_D25#
CPU_D26#
CPU_D27#
CPU_D28#

DATA GROUP 1

CPU_D29#
CPU_D30#
CPU_D31#

CPU_DBI1#
CPU_DSTBN1#
CPU_DSTBP1#

CPU_D32#
CPU_D33#
CPU_D34#
CPU_D35#
CPU_D36#
CPU_D37#
CPU_D38#
CPU_D39#
CPU_D40#
CPU_D41#
CPU_D42#
CPU_D43#
CPU_D44#
CPU_D45#
CPU_D46#
CPU_D47#

DATA GROUP 2

CPU_DBI2#
CPU_DSTBN2#
CPU_DSTBP2#

CPU_D48#
CPU_D49#
CPU_D50#
CPU_D51#
CPU_D52#
CPU_D53#
CPU_D54#
CPU_D55#
CPU_D56#
CPU_D57#
CPU_D58#
CPU_D59#
CPU_D60#
CPU_D61#
CPU_D62#
CPU_D63#

DATA GROUP

3

CPU_DBI3#
CPU_DSTBN3#
CPU_DSTBP3#

CPU_VREF
Trace=12Mil
Space=15Mil

+CPU_VREF

B

H_D#[0..63] 4
H_DINV#[0..3] 4
H_DSTBN#[0..3] 4
H_DSTBP#[0..3] 4

H_D#0

E28

H_D#1

D28

H_D#2

D29

H_D#3

C29

H_D#4

D30

H_D#5

C30

H_D#6

B29

H_D#7

C28

H_D#8

C26

H_D#9

B25

H_D#10

B27

H_D#11

C25

H_D#12

A27

H_D#13

C24

H_D#14

A24

H_D#15

B26

H_DINV#0

C27

H_DSTBN#0

A28

H_DSTBP#0

B28

H_D#16

C19

H_D#17

C23

H_D#18

C20

H_D#19

C22

H_D#20

B22

H_D#21

B23

H_D#22

C21

H_D#23

B24

H_D#24

E21

H_D#25

B21

H_D#26

B20

H_D#27

G19

H_D#28

F21

H_D#29

B19

H_D#30

E20

H_D#31

D21

H_DINV#1

A21

H_DSTBN#1

D22

H_DSTBP#1

E22

H_D#32

C18

H_D#33

F19

H_D#34

E19

H_D#35

A18

H_D#36

D19

H_D#37

B18

H_D#38

C17

H_D#39

B17

H_D#40

E17

H_D#41

B16

H_D#42

C15

H_D#43

A15

H_D#44

B15

H_D#45

F16

H_D#46

G18

H_D#47

F18

H_DINV#2

C16

H_DSTBN#2

D18

H_DSTBP#2

E18

H_D#48

E16

H_D#49

D16

H_D#50

C14

H_D#51

B14

H_D#52

E15

H_D#53

D15

H_D#54

C13

H_D#55

E14

H_D#56

F13

H_D#57

B13

H_D#58

A12

H_D#59

C12

H_D#60

E12

H_D#61

D13

H_D#62

D12

H_D#63

B12

H_DINV#3

E13

H_DSTBN#3

F15

H_DSTBP#3

G15

+1.05VS

12

12

1

C121

2

1U_0402_6.3V4Z

B

+1.2VS

R38

49.9_0402_1%

***

R37
100_0402_1%

SB_A_RXN0

SB_A_RXP0

SB_A_RXN1

SB_A_RXP1

NB_A_RXN0
NB_A_RXP0
NB_A_RXN1
NB_A_RXP1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Place R
Close to Ball

C432 0.1U_0402_10V6K
C430 0.1U_0402_10V6K
C429 0.1U_0402_10V6K
C427 0.1U_0402_10V6K

CLK_NB_ALINK#12
CLK_NB_ALINK12

SB_A_RXN[0..1]
SB_A_RXP[0..1]

NB_A_RXN[0..1]
NB_A_RXP[0..1]

To SB A-PCIE Link

C

U21C

J4

GFX_RX0N

J5

GFX_RX0P

L4

GFX_RX1N

K4

GFX_RX1P

L5

GFX_RX2N

L6

GFX_RX2P

M4

GFX_RX3N

M5

GFX_RX3P

P4

GFX_RX4N

N4

GFX_RX4P

P5

GFX_RX5N

P6

GFX_RX5P

R4

GFX_RX6N

R5

GFX_RX6P

T3

GFX_RX7N

T4

GFX_RX7P

U5

GFX_RX8N

U6

GFX_RX8P

V4

GFX_RX9N

V5

GFX_RX9P

W3

GFX_RX10N

W4

GFX_RX10P

Y5

GFX_RX11N

Y6

GFX_RX11P

AA4

GFX_RX12N

AA5

GFX_RX12P

AB3

GFX_RX13N

AB4

GFX_RX13P

AC5

GFX_RX14N

AC6

ATI recommendation R33, R34

PCE_RXISET

R2910K_0402_5%

12

PCE_TXISET

R348.25K_0402_1%

12

PCE_NCAL

R3382.5_0402_1%

12

PCE_PCAL

R28150_0402_1%

12

1 2
1 2
1 2
1 2

SB_A_RXN[0..1] 15

SB_A_RXP[0..1] 15

NB_A_RXN[0..1] 15
NB_A_RXP[0..1] 15

2005/11/01 2006/11/01

C

10 mils
10 mils
10 mils

10 mils

NB_A_TXN0
NB_A_TXP0
NB_A_TXN1
NB_A_TXP1

Compal Secret Data

GFX_RX14P

AD4

GFX_RX15N

AD5

GFX_RX15P

AJ12

PCE_ISET

AK13

PCE_TXISET

AG12

PCE_NCAL

AH12

PCE_PCAL

AJ11

SB_TX0N

AJ10

SB_TX0P

AK10

SB_TX1N

AK9

SB_TX1P

AG10

SB_RX0N

AG9

SB_RX0P

AF10

SB_RX1N

AE9

SB_RX1P

L2

SB_CLKN

K2

SB_CLKP

PCIE_WLAN_TX_N1 PCIE_WLAN_C_TX_N1
PCIE_WLAN_TX_P1

Deciphered Date

D

PART 3 OF 6

PCI EXPRESS I/F

RC410MD

A-LINK EXPRESS I/F

216CPP4AKA21HK_BGA707

C723 0.1U_0402_10V7K

1 2

C724 0.1U_0402_10V7K

1 2

D

E

N2

GFX_TX0N

N1

GFX_TX0P

R2

GFX_TX1N

P2

GFX_TX1P

T1

GFX_TX2N

R1

GFX_TX2P

U2

GFX_TX3N

T2

GFX_TX3P

V1

GFX_TX4N

V2

GFX_TX4P

W2

GFX_TX5N

W1

GFX_TX5P

AA2

GFX_TX6N

Y2

GFX_TX6P

AB1

GFX_TX7N

AA1

GFX_TX7P

AC2

GFX_TX8N

AB2

GFX_TX8P

AD1

GFX_TX9N

PCI EXPRESS I/F

GFX_TX10N
GFX_TX10P

GFX_TX11N
GFX_TX11P

GFX_TX12N
GFX_TX12P

GFX_TX13N
GFX_TX13P

GFX_TX14N
GFX_TX14P

GFX_TX15N
GFX_TX15P

GPP_TX0N/SB_TX2N
GPP_TX0P/SB_TX2P
GPP_TX1N/SB_TX3N
GPP_TX1P/SB_TX3P

GPP_RX0N/SB_RX2N

GPP_RX0P/SB_RX2P

GPP_RX1N/SB_RX3N

GPP_RX1P/SB_RX3P

AD2

GFX_TX9P

AE2
AE1

AG2
AF2

AH1
AG1

AJ2
AH2

AJ4
AJ3

AJ5
AK4

M1

GFX_CLKN

M2

GFX_CLKP

AJ9
AJ8
AF6
AE6

PCIE_WLAN_TX_N1

AK6

GPP_TX2N
GPP_TX2P
GPP_TX3N
GPP_TX3P

GPP_RX2N
GPP_RX2P
GPP_RX3N
GPP_RX3P

PCIE_WLAN_C_TX_P1

Title

RC410MD-FSB, PCIE,A-PCIE

Size Document Number Rev

HTW2E(LA-3201P) 1.0

B

Date: Sheet

PCIE_WLAN_TX_P1

AJ6
AF4
AE4
AG8
AF8
AG7
AG6

PCIE_W LAN_C_RX_N1

AJ7

PCIE_WLAN_C_RX_P1

AK7
AH4
AG4

PCIE_W L AN_ C_RX_N1 24
PCIE_WLAN_C_RX_P1 24

PCIE_WLAN_C_TX_N1 24
PCIE_WLAN_C_TX_P1 24

Compal Electronics, Inc.

Friday, April 21, 2006

E

746

of

A

DDR_DQ[0..63]
DDR_DQS[0..7]
DDR_DQS#[0..7]
DDR_DM[0..7]

DDR_SMA[0..17]

1 1

+1.8V

12

R42

1

C172

1K_0402_1%

1K_0402_1%

2 2

+1.8V

R242

12

61.9_0603_1%

R237

12

3 3

C435

61.9_0603_1%

Place these R and C
close to relative Ball.

FSB SPEED

166MHZ

133MHZ

4 4

NB_CRT_VSYNC

NB_CRT_HSYNC

2

0.1U_0402_10V6K

12

R46

1

C174

2

0.1U_0402_10V6K

MEM_COMPN
MEM_COMPP

1

1

C450

2

2

0.47U_0603_10V7K@

NB STRAPING PINS

BM_REQ# NB_CRT_HSYNC NB_CRT_VSYNC

0
0

BM_REQ#

DDR_DQ[0..63] 10,11
DDR_DQS[0..7] 10,11
DDR_DQS#[0..7] 10,11
DDR_DM[0..7] 10,11

DDR_SMA[0..17] 10,11

DDR_SRAS#10,11
DDR_SCAS#10,11
DDR_SWE#10,11

DDR_CLK0#10
DDR_CLK010

DDR_CLK1#10
DDR_CLK110

DDR_CLK3#11

+DDR_VREF

DDR_CLK311
DDR_CLK4#11

DDR_CLK411

DDR_SCKE010
DDR_SCKE110
DDR_SCKE210,11
DDR_SCKE310,11

DDR_SCS#010
DDR_SCS#110
DDR_SCS#210,11
DDR_SCS#310,11
DDR_ODT010
DDR_ODT110,11
DDR_ODT210
DDR_ODT310,11

MEM_VMODE: 1.8V: DDR2

MEM_CAP1
MEM_CAP2

0.47U_0603_10V7K@

1
0

R223 4.7K_0402_5%@

1 2

R222 4.7K_0402_5%

1 2

+3VS

R228

1 2

4.7K_0402_5%

4.7K_0402_5%

MMBT3904_SOT23

12

R20

12

Q35

3 1

A

R43 1K_0402_5%

+1.8V

1
1

R227

4.7K_0402_5%

R229

2

4.7K_0402_5%

1 2

MEM_CAP1
MEM_CAP2
MEM_COMPP
MEM_COMPN
+DDR_VREF

12

DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12
DDR_SMA13
DDR_SMA14
DDR_SMA15
DDR_SMA16
DDR_SMA17

DDR_SCS#0
DDR_SCS#1
DDR_SCS#2
DDR_SCS#3

DDR_ODT0
DDR_ODT1

DDR_ODT2
DDR_ODT3

DDR_DQS#0
DDR_DQS0

DDR_DQS#1
DDR_DQS1

DDR_DQS#2
DDR_DQS2

DDR_DQS#3
DDR_DQS3

DDR_DQS#4
DDR_DQS4

DDR_DQS#5
DDR_DQS5

DDR_DQS#6
DDR_DQS6

DDR_DQS#7
DDR_DQS7

+3VS

+1.05VS

CPU_BSEL1

10mil
10mil
10mil
10mil
20mil

AK27

AJ27

AH26

AJ26

AH25

AJ25
AH24
AH23

AJ24

AJ23
AH27
AH22

AJ22

AF28
AJ21

AG27

AJ28

AH21

AJ29
AG28
AH30

AC26
AC25

AF16
AE16

AC24
AC23

AG17

AF17

W29
W28

AH20

AJ20
AE24
AE21

AH29
AG29
AH28

AF29
AG30
AE28
AC30

AD28

AJ14

AJ15
AE29
AB27

AH17

AJ18

AF15
AE14

AE22

AF22

AF26
AE25

W26
W27

AB30
AB29

V29
V30

Y30

N30

R25
P25

R30
R29

+3VS

12

U21B

MEM_A0
MEM_A1
MEM_A2
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
MEM_A13
MEM_A14
MEM_A15
MEM_A16
MEM_A17

MEM_RAS#
MEM_CAS#
MEM_WE#

MEM_CK0N
MEM_CK0P

MEM_CK1N
MEM_CK1P

MEM_CK2N
MEM_CK2P

MEM_CK3N
MEM_CK3P

MEM_CK4N
MEM_CK4P

MEM_CK5N
MEM_CK5P
MEM_CKE0
MEM_CKE1
MEM_CKE2
MEM_CKE3

MEM_CS#0
MEM_CS#1
MEM_CS#2
MEM_CS#3
MEM_ODT0
MEM_ODT1
MEM_ODT2/RSV2
MEM_ODT3/RSV3
MEM_VMODE
MEM_CAP1
MEM_CAP2
MEM_COMPP
MEM_COMPN
MEM_VREF

MEM_DQS0N
MEM_DQS0P

MEM_DQS1N
MEM_DQS1P

MEM_DQS2N
MEM_DQS2P

MEM_DQS3N
MEM_DQS3P

MEM_DQS4N
MEM_DQS4P

MEM_DQS5N
MEM_DQS5P

MEM_DQS6N
MEM_DQS6P

MEM_DQS7N
MEM_DQS7P

R762

4.7K_0402_5%

B

ADDRESS

DATA CLKMISC

216CPP4AKA21HK_BGA707

CPU_BSEL1 5,12

B

PART 2 OF

6

MEM_DQ10
MEM_DQ11
MEM_DQ12
MEM_DQ13
MEM_DQ14
MEM_DQ15
MEM_DQ16
MEM_DQ17
MEM_DQ18
MEM_DQ19
MEM_DQ20
MEM_DQ21
MEM_DQ22
MEM_DQ23
MEM_DQ24
MEM_DQ25
MEM_DQ26
MEM_DQ27
MEM_DQ28
MEM_DQ29
MEM_DQ30
MEM_DQ31
MEM_DQ32
MEM_DQ33
MEM_DQ34

MEMORY I/F

RC410MD

MEM_DQ35
MEM_DQ36
MEM_DQ37
MEM_DQ38
MEM_DQ39
MEM_DQ40
MEM_DQ41
MEM_DQ42

DATA

MEM_DQ43
MEM_DQ44
MEM_DQ45
MEM_DQ46
MEM_DQ47
MEM_DQ48
MEM_DQ49
MEM_DQ50
MEM_DQ51
MEM_DQ52
MEM_DQ53
MEM_DQ54
MEM_DQ55
MEM_DQ56
MEM_DQ57
MEM_DQ58
MEM_DQ59
MEM_DQ60
MEM_DQ61
MEM_DQ62
MEM_DQ63

STRP_DATA

NB_DDC_CLK

MMBT3904_SOT23

MEM_DQ0
MEM_DQ1
MEM_DQ2
MEM_DQ3
MEM_DQ4
MEM_DQ5
MEM_DQ6
MEM_DQ7
MEM_DQ8
MEM_DQ9

MEM_DM0
MEM_DM1
MEM_DM2
MEM_DM3
MEM_DM4
MEM_DM5
MEM_DM6
MEM_DM7

C

DDR_DQ0

AJ16

DDR_DQ1

AH16

DDR_DQ2

AJ19

DDR_DQ3

AH19

DDR_DQ4

AH15

DDR_DQ5

AK16

DDR_DQ6

AH18

DDR_DQ7

AK19

DDR_DQ8

AF13

DDR_DQ9

AF14

DDR_DQ10

AE19

DDR_DQ11

AF19

DDR_DQ12

AE13

DDR_DQ13

AG13

DDR_DQ14

AF18

DDR_DQ15

AE17

DDR_DQ16

AF20

DDR_DQ17

AF21

DDR_DQ18

AG23

DDR_DQ19

AF24

DDR_DQ20

AG19

DDR_DQ21

AG20

DDR_DQ22

AG22

DDR_DQ23

AF23

DDR_DQ24

AD25

DDR_DQ25

AG25
AE27
AD27
AE23
AD24
AE26
AD26
AA25
Y26
W24
U25
AA26
Y25
V26
W25
AC28
AC29
AA29
Y29
AD30
AD29
AA30
Y28
U27
T27
N26
M27
U26
T26
P27
P26
U29
T29
P29
N29
U28
T28
P28
N27

AJ17
AG15
AE20
AF25
Y27
AB28
R26
R28

3 1

Q5

DDR_DQ26
DDR_DQ27
DDR_DQ28
DDR_DQ29
DDR_DQ30
DDR_DQ31
DDR_DQ32
DDR_DQ33
DDR_DQ34
DDR_DQ35
DDR_DQ36
DDR_DQ37
DDR_DQ38
DDR_DQ39
DDR_DQ40
DDR_DQ41
DDR_DQ42
DDR_DQ43
DDR_DQ44
DDR_DQ45
DDR_DQ46
DDR_DQ47
DDR_DQ48
DDR_DQ49
DDR_DQ50
DDR_DQ51
DDR_DQ52
DDR_DQ53
DDR_DQ54
DDR_DQ55
DDR_DQ56
DDR_DQ57
DDR_DQ58
DDR_DQ59
DDR_DQ60
DDR_DQ61
DDR_DQ62
DDR_DQ63

DDR_DM0
DDR_DM1
DDR_DM2
DDR_DM3
DDR_DM4
DDR_DM5
DDR_DM6
DDR_DM7

R225

1 2

4.7K_0402_5%
R220

1 2

4.7K_0402_5%@

1 2

2

2K_0402_5%

R11

CLK_NB_14M12

+3VS

+3VS

SB_PWRGD# 17

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

NB_LUMA13

NB_CRMA13

1 2

R27 75_0402_1%

NB_CRT_R14
NB_CRT_G14
NB_CRT_B14

NB_CRT_HSYNC14

NB_CRT_VSYNC14

1 2

R232 715_0402_1%

NB_DDC_CLK14
NB_DDC_DATA14

CLK_NB_BCLK12
CLK_NB_BCLK#12

NB_EDID_CLK13

NB_EDID_DATA13

R230

1 2

Low: Normal Mode(Fixed)
High: Test Mode

R219

1 2

4.7K_0402_5%
R226

1 2

4.7K_0402_5%
R23

1 2

4.7K_0402_5%@

STRP_DATA: DEBUG STRAP
DEFAULT: 1
0: MEMORY CHA NNEL STRAPING
1: E2PROM STRAPING

NB_DDC_CLK: CPU VCC SEL
DEFAULT: 1 1: DESKTOP CPU 0: MOBILE CPU

2005/11/01 2006/11/01

NB_DDC_CLK
NB_DDC_DATA

C422

12

15P_0402_50V8D@

10_0402_5%

1 2

R217 10K_0402_5%

NB_EDID_CLK
NB_EDID_DATA
NB_DVI_DDCDATA
STRP_DATA
TESTMODE

1.8K_0402_5%

NB_EDID_CLK

NB_EDID_DATA

NB_DVI_DDCDATA

Compal Secret Data

NB_COMPS

RSET

15mil

R218

12

U21D

F9

D9

E9

F10
E10
D10

C3

B3

B10

B2

C2

G1

F1

G2

J1

K1

D2
C1
H3
D1
C4

AH13

AJ13

R22

1 2

4.7K_0402_5%

Deciphered Date

Y
C
COMP

RED
GREEN
BLUE

DACHSYNC
DACVSYNC

RSET
DACSCL

DACSDA

OSCIN

OSCOUT
TVCLKIN
CPU_CLKP

CPU_CLKN

I2C_CLK
I2C_DATA
DDC_DATA
STRP_DATA
TESTMODE
THERMALDIODE_P
THERMALDIODE_N

D

CRT & TV

I/F

CLK. GEN.

216CPP4AKA21HK_BGA707

LVDS_ENBKL

LVDS_ENVDD

D

PART 4 OF 6

RC410MD

SUS_STAT#

NB_PWRGD

E

TXCLK_UN
TXCLK_UP

TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P
TXOUT_L3N
TXOUT_L3P

TXCLK_LN
TXCLK_LP

LVDS_BLEN

SUS_STAT#

BMREQ#

TMDS_HPD

+1.8V

R236
220K_0402_5%

1 2

+3VALW

C128 0.1U_0402_16V4Z

14

U5A

P

A

O

B

G

SN74LVC08APW_TSSOP14

7

B4
A4
B5
C6
B6
A6
B7
A7
F7
F8

E5
F5
D5
C5
E6
D6
E7
E8
G6
F6

G3
E2
F2

A3
AH14
E3

H2

J2

3

LVDS_ENBKL
LVDS_ENVDD

2 1

2 1

NB_TXOUT0­NB_TXOUT0+
NB_TXOUT1­NB_TXOUT1+
NB_TXOUT2­NB_TXOUT2+

NB_TXCLK­NB_TXCLK+

1 2
1 2

NB_RST#
SUS_STAT#
NB_PWRGD

BM_REQ#

12

R216

10K_0402_5%

D21

CH751H-40_SC76
D20

NB_RST#

CH751H-40_SC76

ENBKL 29

NB_TXOUT0- 13
NB_TXOUT0+ 13
NB_TXOUT1- 13
NB_TXOUT1+ 13
NB_TXOUT2- 13
NB_TXOUT2+ 13

NB_TXCLK- 13
NB_TXCLK+ 13

R21 4.7K_0402_5%@
R224

NB_RST# 15
NB_PWRGD 17

BM_REQ# 15

4.7K_0402_5%@

NB_SUS_STAT# 16

LVDS

POWERGOOD

TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P

LVDS_BLON

LVDS_DIGON

SYSRESET#

1
2

***

+3VALW

14

U5B

4

P

A

6

O

5

B

G

SN74LVC08APW_TSSOP14

7

Compal Electronics, Inc.

Title

RC410MD-DDR/DISP/MISC

Size Document Number Re v

Date: Sheet

HTW2E(LA-3201P) 1.0

Custom

Friday, April 21, 2006

NB_ENVDD 13

E

846

of

A

1 2

C65 10U_0805_10V4Z

1 2

C64 10U_0805_10V4Z

1 2

C75 1U_0402_6.3V4Z

1 2

C107 1U_0402_6.3V4Z

1 2

C88 1U_0402_6.3V4Z

1 2

C90 1U_0402_6.3V4Z

1 2

C104 1U_0402_6.3V4Z

1 1

1 2

C73 1U_0402_6.3V4Z

1 2

C74 1U_0402_6.3V4Z

1 2

C105 1U_0402_6.3V4Z

1 2

C36 1U_0402_6.3V4Z

1 2

C55 1U_0402_6.3V4Z

1 2

C89 1U_0402_6.3V4Z

1 2

C71 1U_0402_6.3V4Z

1 2

C106 1U_0402_6.3V4Z

1 2

C49 1U_0402_6.3V4Z

1 2

C50 1U_0402_6.3V4Z

1 2

C79 10U_0805_10V4Z

1 2

C118 10U_0805_10V4Z

1 2

C80 1U_0402_6.3V4Z

2 2

1 2

C100 1U_0402_6.3V4Z

1 2

C131 1U_0402_6.3V4Z

1 2

C91 1U_0402_6.3V4Z

1 2

C69 1U_0402_6.3V4Z

1 2

C133 1U_0402_6.3V4Z

1 2

C150 1U_0402_6.3V4Z

1 2

C151 1U_0402_6.3V4Z

1 2

C92 1U_0402_6.3V4Z

1 2

C95 1U_0402_6.3V4Z

1 2

C99 1U_0402_6.3V4Z

1 2

C144 1U_0402_6.3V4Z

1 2

C59 1U_0402_6.3V4Z

+1.8VS

3 3

4 4

L8

1 2

CHB1608U301_0603

+1.8VS +AVDDI

C46

+1.2VS

+1.2VS

5A

+1.05VS

+1.05VS

5A

+AVDDQ

1

1

C57

C53

2

2

10U_0805_10V4Z

2

2

C725

1

1

1U_0402_6.3V4Z

0.1U_0402_16V4Z

C48

C54

1

1

2

2

0.1U_0402_16V4Z

A

1U_0402_6.3V4Z

0.1U_0402_16V4Z

+AVDD

+AVDDI

+CPVDD
+MPVDD

1

+

C650

2

220U_D_6.3VM

C47

1

2

0.1U_0402_16V4Z

1

2

M13
M15
M17
M19
N12
N14
N16
N18
P13
P15
P17
P19
R12
R14
R16
R18

T13
T15
T17

T19
U12
U14
U16
U18
V13
V15
V17
V19

W12
W14
W16
W18

A10

F11

F12

F17
G11
G12
G13
G14
G16
G17
G20
H11
H12
H13
H14
H16
H17
H19
H23
H24

L23

L24
N23
P23
P24

C9
B8

D8

H21

AB26

ATI recommend 2.2uF

1

C29

2

22U_0805_6.3V6M

+LPVDD

1

C30

C33

1U_0402_6.3V4Z

2

10U_0805_10V4Z

U21E

VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE

VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU

AVDD
AVDDQ

AVDDDI
CPVDD

MPVDD

1

C44

0.1U_0402_16V4Z

2

1 2

CHB2012U170_0805

CORE PWR

216CPP4AKA21HK_BGA707

+AVDD

1

1U_0402_6.3V4Z

2

L6

B

PART 5 OF

6

POWER

RC410MD

L5

1 2

CHB2012U170_0805

C32

+1.8VS

B

MEM I/F PWR

CPU I/F

VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM

PWR

+3VS

+1.8VS

VDD_18
VDD_18
VDD_18
VDD_18

VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12

VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18

VDDR3
VDDR3

LPVDD

LVDDR18D

LVDDR18A
LVDDR18A

PLLVDD

1

+

2

AB23
AB24
AC13
AC16
AC19
AC21
AC22
AD13
AD16
AD19
AD21
AD22
AD23
AK21
AK24
AK28
T23
T24
V23
V24
Y23
Y24

0.1A

AB22
AB9
J22
J9

2.25A

AB7
AC7
AC8
AD9
H4
H5
J6
K6
L7
L8
M7
M8
P7
P8
T7
T8
W7
W8

0.75A

AB8
AC10
AC9
AD10
AE11
AF11
AG11
U7
U8
Y7
Y8

0.1A

G4
G5
J8
C7
H7
H8
H10

10U_0805_10V4Z

+CPVDD

1

2

10U_0805_10V4Z

C137

C289
470U_D2_2.5VM

+1.8V

1

2

C138

2A

C648

C

+1.8V

1 2

C87 0.1U_0402_16V4Z

1 2

C103 0.1U_0402_16V4Z

1 2

C149 0.1U_0402_16V4Z

L4

1 2

CHB1608U301_0603

+1.2VS

+VDDQ
+LPVDD

+PLLVDD

0.1U_0402_16V4Z

1

2

1 2

C134 0.1U_0402_16V4Z

1 2

C135 0.1U_0402_16V4Z

1 2

C58 0.1U_0402_16V4Z

1 2

C67 0.1U_0402_16V4Z

1 2

C31 10U_0805_10V4Z

1 2

C28 10U_0805_10V4Z

L7

1 2

CHB1608U301_0603

1 2

C70 0.1U_0402_16V4Z

1 2

C56 1U_0402_6.3V4Z

1 2

C68 0.1U_0402_16V4Z

1 2

C63 0.1U_0402_16V4Z

1 2

C62 0.1U_0402_16V4Z

1 2

C51 0.1U_0402_16V4Z

1 2

C45 10U_0805_10V4Z

20mils

20mils

20mils

1

C649

2

L11

1 2

CHB1608U301_0603

1

C114

0.1U_0402_16V4Z

2

1U_0402_6.3V4Z

1

C37

0.1U_0402_16V4Z

2

C158

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.

+1.8VS

L37

1 2

CHB2012U170_0805

+1.8VS

1

2

10U_0805_10V4Z

1U_0402_6.3V4Z

C

+1.8VS

C641

2005/11/01 2006/11/01

1 2

C115 10U_0805_10V4Z

1 2

C72 10U_0805_10V4Z

1 2

C119 10U_0805_10V4Z

1 2

C93 10U_0805_10V4Z

1 2

C166 1U_0402_6.3V4Z

1 2

C76 1U_0402_6.3V4Z

1 2

C124 1U_0402_6.3V4Z

1 2

C152 1U_0402_6.3V4Z

1 2

C132 1U_0402_6.3V4Z

1 2

C117 1U_0402_6.3V4Z

1 2

C122 1U_0402_6.3V4Z

1 2

C139 1U_0402_6.3V4Z

1 2

C110 1U_0402_6.3V4Z

1 2

C86 1U_0402_6.3V4Z

1 2

C77 1U_0402_6.3V4Z

1 2

C130 1U_0402_6.3V4Z

1 2

C129 1U_0402_6.3V4Z

1 2

C141 1U_0402_6.3V4Z

1 2

C140 1U_0402_6.3V4Z

+1.2VS

1 2

C61 10U_0805_10V4Z

1 2

C418 10U_0805_10V4Z

1 2

C66 10U_0805_10V4Z

1 2

C23 10U_0805_10V4Z

1 2

C417 10U_0805_10V4Z

1 2

C22 1U_0402_6.3V4Z

1 2

C25 1U_0402_6.3V4Z

1 2

C85 1U_0402_6.3V4Z

1 2

C43 1U_0402_6.3V4Z

1 2

C84 1U_0402_6.3V4Z

1 2

C102 1U_0402_6.3V4Z

1 2

C41 1U_0402_6.3V4Z

1 2

C42 1U_0402_6.3V4Z

1 2

C78 1U_0402_6.3V4Z

1 2

C40 1U_0402_6.3V4Z

+

1 2

470U_D2_2.5VM

C414

+

1 2

470U_D2_2.5VM

C15

+3VS+VDDQ

Place L close to Ball AB26
Place C between Ball AB26,AA27

1 2

1

1

1

C175

C159

0.1U_0402_16V4Z

2

2

2

1U_0402_6.3V4Z

Compal Secret Data

Deciphered Date

L12
CHB1608U301_0603

+1.8VS+MPVDD

D

0.1U_0402_16V4Z

D

AA23
AA24
AA28
AC11
AC12
AC14
AC15
AC17
AC18
AC20
AC27
AD11
AD12
AD14
AD15
AD17
AD18
AD20
AE30
AF12
AF27
AG14
AG16
AG18
AG21
AG24
AG26
AH11

AJ30
AK12
AK15
AK18

AK22
AK25
AK29

C60

AK2

B30
D14
D17
D20
D24
D27

G10
H15
H18

K23
M12

M14
M16
M18
M23
M24
M26
N13
N15
N17
N19
P12
P14
P16
P18

A13
A16
A19

A22
A25
A29

AJ1

F27
F30

J23
J24
J27

J30

E

U21F

VSS
VSS
VSS

A2

VSS
VSS
VSS
VSS

A9

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

B1

VSS
VSS
VSS
VSS
VSS
VSS
VSS

D3

VSS

D4

VSS
VSS

F3

VSS
VSS

F4

VSS
VSS
VSS
VSS
VSS
VSS
VSS

J3

VSS
VSS
VSS

K8

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

216CPP4AKA21HK_BGA707

+PLLVDD

1

1

2

C81

1U_0402_6.3V4Z

2

Title

RC410MD PWR/GND

Size Document Number Rev

HTW2E(LA-3201P) 1.0

Custom

Date: Sheet

PART 6 OF 6

GOUNDRC410MD

+1.8VS

L10

1 2

CHB1608U301_0603

1

C82

10U_0805_10V4Z

2

Compal Electronics, Inc.

Friday, Apri l 21, 2006

E

R13

VSS

R15

VSS

R17

VSS

R19

VSS

R23

VSS

R24

VSS

R27

VSS

T12

VSS

T14

VSS

T16

VSS

T18

VSS

T30

VSS

U13

VSS

U15

VSS

U17

VSS

U19

VSS

U23

VSS

U24

VSS

V12

VSS

V14

VSS

V16

VSS

V18

VSS

V27

VSS

V28

VSS

W13

VSS

W15

VSS

W17

VSS

W19

VSS

W23

VSS

W30

VSS

AA3

VSSA

AA7

VSSA

AA8

VSSA

AB5

VSSA

AB6

VSSA

AC3

VSSA

AD3

VSSA

AD7

VSSA

AD8

VSSA

AE8

VSSA

AF3

VSSA

AF5

VSSA

AF7

VSSA

AF9

VSSA

AG5

VSSA

AH10

VSSA

AH3

VSSA

AH5

VSSA

AH6

VSSA

AH7

VSSA

AH8

VSSA

AH9

VSSA

K5

VSSA

L3

VSSA

M3

VSSA

N5

VSSA

N6

VSSA

N7

VSSA

N8

VSSA

P3

VSSA

R3

VSSA

R7

VSSA

R8

VSSA

T5

VSSA

T6

VSSA

U3

VSSA

V3

VSSA

V7

VSSA

V8

VSSA

W5

VSSA

W6

VSSA

Y3

VSSA

C10

AVSSN

B9

AVSSQ

C8

AVSSDI

J7

LPVSS

G7

LVSSR

G8

LVSSR

G9

LVSSR

H9

PLLVSS

H20

CPVSS

AA27

MPVSS

1

C116

10U_0805_10V4Z

2

of

946

A

+1.8V +1.8V

DDR_DQ10
DDR_DQ14

DDR_DQS#1

1 1

2 2

DDR_SCKE08

DDR_SWE#8,11
DDR_SCAS#8,11

DDR_SCS#18
DDR_ODT28

3 3

4 4

SB_SMDATA11,12,16,24
SB_SMCLK11,12,16,24

A

DDR_DQS1
DDR_DQ9

DDR_DQ13
DDR_DQ1

DDR_DQ0
DDR_DQS#0

DDR_DQS0
DDR_DQ3 DDR_DQ6

DDR_DQ2 DDR_DQ7

DDR_DQ16
DDR_DQ20

DDR_DQS#2
DDR_DQS2

DDR_DQ23
DDR_DQ19

DDR_DQ28
DDR_DQ25

DDR_DM3

DDR_DQ26
DDR_DQ27

DDR_SCKE0

DDR_SMA17
DDR_SMA12

DDR_SMA9 DDR_SMA7
DDR_SMA8

DDR_SMA5
DDR_SMA3
DDR_SMA1

DDR_SMA10
DDR_SMA15
DDR_SWE#

DDR_SCAS#
DDR_SCS#1

DDR_ODT2
DDR_DQ32

DDR_DQ36
DDR_DQS#4

DDR_DQS4
DDR_DQ38

DDR_DQ35
DDR_DQ45

DDR_DQ40
DDR_DM5

DDR_DQ43
DDR_DQ52

DDR_DQS#6
DDR_DQS6

DDR_DQ50 DDR_DQ55
DDR_DQ54

DDR_DQ61
DDR_DM7 DDR_DQS#7
DDR_DQ62

DDR_DQ58

+3VS

2.2U_0805_10V6K

C187

0.1U_0402_16V4Z

1

1

2

2

+DDR_VREF1

C185

B

JP16

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

P-TWO_A5692B-A0G16-P

DIMMA

Reverse

B

Trace=20mil

VSS
DQ4
DQ5

VSS
DM0
VSS
DQ6
DQ7
VSS

DQ12
DQ13

VSS
DM1
VSS
CK0

CK0#

VSS

DQ14
DQ15

VSS

VSS

DQ20
DQ21

VSS

NC
DM2
VSS

DQ22
DQ23

VSS

DQ28
DQ29

VSS

DQS3#

DQS3

VSS

DQ30
DQ31

VSS

NC/CKE1

VDD

NC/A15
NC/A14

VDD

A11

A7
A6

VDD

A4
A2
A0

VDD

BA1

RAS#

S0#

VDD

ODT0

NC/A13

VDD

NC
VSS

DQ36
DQ37

VSS
DM4
VSS

DQ38
DQ39

VSS

DQ44
DQ45

VSS

DQS5#

DQS5

VSS

DQ46
DQ47

VSS

DQ52
DQ53

VSS
CK1

CK1#

VSS
DM6
VSS

DQ54
DQ55

VSS

DQ60
DQ61

VSS

DQS7#

DQS7

VSS

DQ62
DQ63

VSS
SAO

SA1

C

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_DQ15
DDR_DQ12

DDR_DM1
DDR_DQ8

DDR_DQ11
DDR_DQ4

DDR_DQ5
DDR_DM0
DDR_CLK1

DDR_CLK1#

DDR_DQ17
DDR_DQ21

DDR_DM2
DDR_DQ22

DDR_DQ18
DDR_DQ29

DDR_DQ24
DDR_DQS#3

DDR_DQS3
DDR_DQ30

DDR_DQ31

DDR_SCKE1

DDR_SMA14
DDR_SMA11
DDR_SMA6
DDR_SMA4

DDR_SMA2
DDR_SMA0

DDR_SMA16
DDR_SRAS#
DDR_SCS#0

DDR_ODT0
DDR_SMA13

DDR_DQ37
DDR_DQ33

DDR_DM4
DDR_DQ39

DDR_DQ34
DDR_DQ44

DDR_DQ41
DDR_DQS#5

DDR_DQS5
DDR_DQ42DDR_DQ46

DDR_DQ47
DDR_DQ53

DDR_DQ49DDR_DQ48
DDR_CLK0

DDR_CLK0#
DDR_DM6

DDR_DQ51
DDR_DQ60DDR_DQ56

DDR_DQ57

DDR_DQS7
DDR_DQ63

DDR_DQ59

C

+3VS

DDR_DQ[0..63]
DDR_DQS[0..7]
DDR_DQS#[0..7]
DDR_DM[0..7]

DDR_SMA[0..17]

DDR_CLK1 8
DDR_CLK1# 8

DDR_SCKE1 8

DDR_SRAS# 8,11
DDR_SCS#0 8

DDR_ODT0 8

DDR_CLK0 8
DDR_CLK0# 8

D

DDR_DQ[0..63] 8,11
DDR_DQS[0..7] 8,11
DDR_DQS#[0..7] 8,11
DDR_DM[0..7] 8,11

DDR_SMA[0..17] 8,11

+1.8V

C148

470U_D2_2.5VM

DDR_SCS#28,11

DDR_ODT38,11

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

1

+

2

+0.9VS

E

C143 0.1U_0402_16V4Z

C111 0.1U_0402_16V4Z

1

1

2

2

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to V_DDR_MCH_REF

C447 0.1U_0402_16V4Z

C445 0.1U_0402_16V4Z

1

2

C444 0.1U_0402_16V4Z

1

1

2

2

DDR_SCKE1
DDR_SCKE3 DDR_SCKE2

DDR_SMA17

DDR_SMA9
DDR_SMA2
DDR_SMA5

DDR_SMA15
DDR_SMA0
DDR_SRAS#
DDR_SCAS#

DDR_SCS#2
DDR_SMA13
DDR_SCS#1
DDR_ODT3

2005/11/01 2006/11/01

E

C101 0.1U_0402_16V4Z

C154 0.1U_0402_16V4Z

1

1

2

2

C439 0.1U_0402_16V4Z

C443 0.1U_0402_16V4Z

1

1

2

2

RP1

1 8
2 7
3 6
4 5

56_1206_8P4R_5%

RP2

1 8
2 7
3 6
4 5

56_1206_8P4R_5%

RP3

1 8
2 7
3 6
4 5

56_1206_8P4R_5%

RP4

1 8
2 7
3 6
4 5

56_1206_8P4R_5%

Compal Secret Data

Deciphered Date

+0.9VS

F

Layout Note:
Place near JDIM1

C162 0.1U_0402_16V4Z

C163 0.1U_0402_16V4Z

1

1

2

2

C438 0.1U_0402_16V4Z

C437 0.1U_0402_16V4Z

1

1

2

2

RP11

56_1206_8P4R_5%
RP12

56_1206_8P4R_5%
RP13

56_1206_8P4R_5%
RP14

56_1206_8P4R_5%

R40

1 2

56_0402_5%

F

C436 0.1U_0402_16V4Z

1

2

45
36
27
18

45
36
27
18

45
36
27
18

45
36
27
18

C96 0.1U_0402_16V4Z

1

2

C161 0.1U_0402_16V4Z

1

2

DDR_SCKE0

DDR_SMA11D DR_SMA14
DDR_SMA12

DDR_SMA6DDR_SMA7
DDR_SMA8
DDR_SMA4
DDR_SMA3

DDR_SMA10
DDR_SMA1
DDR_SMA16
DDR_SWE#

DDR_SCS#0
DDR_ODT0
DDR_ODT1
DDR_SCS#3

DDR_ODT2

G

+DDR_VREF1

C145 0.1U_0402_16V4Z

C642 0.1U_0402_16V4Z

C643 0.1U_0402_16V4Z

C113 0.1U_0402_16V4Z

1

1

2

C156 0.1U_0402_16V4Z

1

2

1

2

2

C83 0.1U_0402_16V4Z

C94 0.1U_0402_16V4Z

1

1

2

2

DDR_SCKE2 8,11DDR_SCKE38,11

DDR_ODT1 8,11
DDR_SCS#3 8,11

Title

Size D o cument N umber R ev

Custom

Date: Sheet

C644 0.1U_0402_16V4Z

1

1

2

2

C136 0.1U_0402_16V4Z

1

2

C108 0.1U_0402_16V4Z

C120 0.1U_0402_16V4Z

1

1

2

2

Layout Note:
Place these resistor
closely JDIM2,all
trace length<750 mil

Layout Note:
Place these resistor
closely JDIM2,all
trace length Max=1.3"

Compal Electronics, Inc.

DDRII-SODIMM0

HTW2E(LA-3201P) 1.0

Friday, April 21, 2006

G

12

12

C147 0.1U_0402_16V4Z

1

2

+1.8V

R13

1K_0402_1%

R14

1K_0402_1%

1

2

C176 22U_0805_6.3V6M

H

2

1

1

C18

0.1U_0402_16V4Z

2

C177 22U_0805_6.3V6M

1

2

10 46

H

C19

0.1U_0402_16V4Z

of

A

DDR_DQ10
DDR_DQ14

+3VS

DDR_DQS#1
DDR_DQS1

DDR_DQ9
DDR_DQ13

DDR_DQ1
DDR_DQ0

DDR_DQS#0
DDR_DQS0

DDR_DQ3
DDR_DQ2

DDR_DQ16
DDR_DQ20

DDR_DQS#2
DDR_DQS2

DDR_DQ23
DDR_DQ19

DDR_DQ25
DDR_DM3

DDR_DQ26
DDR_DQ27

DDR_SCKE2

DDR_SMA17
DDR_SMA12

DDR_SMA9
DDR_SMA8

DDR_SMA5
DDR_SMA3
DDR_SMA1

DDR_SMA10
DDR_SMA15
DDR_SWE#

DDR_SCAS#
DDR_SCS#3

DDR_ODT3
DDR_DQ32

DDR_DQ36
DDR_DQS#4

DDR_DQS4
DDR_DQ38

DDR_DQ35
DDR_DQ45

DDR_DQ40
DDR_DM5
DDR_DQ46

DDR_DQ43
DDR_DQ52

DDR_DQ48

DDR_DQS#6
DDR_DQS6

DDR_DQ50
DDR_DQ54

DDR_DQ56
DDR_DQ61

DDR_DM7
DDR_DQ62

DDR_DQ58

DDR_DQ[0..63]8,10

1 1

2 2

3 3

4 4

DDR_DQS[0..7]8,10

DDR_DQS#[0..7]8,10

DDR_DM[0..7]8,10

DDR_SMA[0..17]8,10

DDR_DQ[0..63]
DDR_DQS[0..7]
DDR_DQS#[0..7]
DDR_DM[0..7]
DDR_SMA[0..17]

A

DDR_SCKE28,10

DDR_SWE#8,10
DDR_SCAS#8,10

DDR_SCS#38,10

DDR_ODT38,10

SB_SMDATA10,12,16,24
SB_SMCLK10,12,16,24

+1.8V +1.8V

+DDR_VREF2

2.2U_0805_10V6K

0.1U_0402_16V4Z
C184

C186

1

1

2

2

B

Trace=20mil

JP15

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

PTI_A5652D-A0G16-P

DIMMB
Reverse

B

DM0

DQ12
DQ13

DM1

CK0#
DQ14

DQ15

DQ20
DQ21

DM2

DQ22
DQ23

DQ28
DQ29

DQS3#

DQS3

DQ30
DQ31

NC/CKE1

VDD
NC/A15
NC/A14

VDD

VDD

VDD

RAS#

VDD

ODT0

NC/A13

VDD

DQ36
DQ37

DM4

DQ38
DQ39

DQ44
DQ45

DQS5#

DQS5

DQ46
DQ47

DQ52
DQ53

CK1#

DM6

DQ54
DQ55

DQ60
DQ61

DQS7#

DQS7

DQ62
DQ63

SAO

VSS
DQ4
DQ5
VSS

VSS
DQ6
DQ7
VSS

VSS
VSS

CK0
VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

BA1

VSS

VSS
VSS

VSS

VSS

VSS

VSS

VSS
CK1

VSS
VSS

VSS

VSS

VSS

VSS
SA1

C

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50

NC

52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90

A11

92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106
108
110

S0#

112
114
116
118
120

NC

122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_DQ15
DDR_DQ12

DDR_DM1
DDR_DQ8

DDR_DQ11
DDR_DQ4

DDR_DQ5
DDR_DM0
DDR_CLK4

DDR_CLK4#
DDR_DQ6

DDR_DQ7

DDR_DQ17
DDR_DQ21

DDR_DM2
DDR_DQ22

DDR_DQ18
DDR_DQ29DDR_DQ28

DDR_DQ24
DDR_DQS#3

DDR_DQS3
DDR_DQ30

DDR_DQ31

DDR_SCKE3

DDR_SMA14
DDR_SMA11

DDR_SMA7
DDR_SMA6

DDR_SMA4
DDR_SMA2
DDR_SMA0

DDR_SMA16
DDR_SRAS#
DDR_SCS#2

DDR_ODT1
DDR_SMA13

DDR_DQ37
DDR_DQ33

DDR_DM4
DDR_DQ39

DDR_DQ34
DDR_DQ44

DDR_DQ41
DDR_DQS#5

DDR_DQS5
DDR_DQ42

DDR_DQ47
DDR_DQ53

DDR_DQ49

DDR_CLK3
DDR_CLK3#

DDR_DM6
DDR_DQ55

DDR_DQ51
DDR_DQ60

DDR_DQ57
DDR_DQS#7

DDR_DQS7
DDR_DQ63

DDR_DQ59

+1.8V

C97 0.1U_0402_16V4Z

C112 0.1U_0402_16V4Z

1

+

C52

DDR_CLK4 8
DDR_CLK4# 8

DDR_SCKE3 8,10

DDR_SRAS# 8,10
DDR_SCS#2 8,10

DDR_ODT1 8,10

DDR_CLK3 8
DDR_CLK3# 8

+3VS

470U_D2_2.5VM

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2

2005/11/01 2006/11/01

1

1

2

2

Compal Secret Data

Layout Note:
Place near JDIM1

C165 0.1U_0402_16V4Z

C157 0.1U_0402_16V4Z

1

1

2

2

Deciphered Date

D

C98 0.1U_0402_16V4Z

C125 0.1U_0402_16V4Z

1

2

D

1

2

C155 0.1U_0402_16V4Z

1

2

+DDR_VREF2

C109 0.1U_0402_16V4Z

C142 0.1U_0402_16V4Z

1

2

12

12

C164 0.1U_0402_16V4Z

1

2

+1.8V

R15

1K_0402_1%

R16

1K_0402_1%

Title

Size D o cument N umber R ev

Custom

Date: Sheet

1

1

2

2

1

C21

0.1U_0402_16V4Z

2

1

C20

0.1U_0402_16V4Z

2

Compal Electronics, Inc.

DDR-II SODIMM1

HTW2E(LA-3201P) 1.0

Friday, April 21, 2006

C645 0.1U_0402_16V4Z

E

C646 0.1U_0402_16V4Z

C647 0.1U_0402_16V4Z

1

1

2

2

of

E

11 46

A

Clock Generator

1 1

+3VS

+3VS

+3VS

2 2

+CLK_VDD1

1 2

KC FBM-L11-201209-221LMAT_0805

L14

1 2

CHB1608U301_0603

L33

1 2

CHB1608U301_0603

CLK_ENABLE#41

CLK_OK16,17

+CLK_VDD1

L16

10U_0805_10V4Z

C497

4.7U_0805_10V4Z

CLK_ENABLE#

R281

1 2

10K_0402_5%@

1

C221

10U_0805_10V4Z

2

0.1U_0402_16V4Z

+VDDPCI

1

0.1U_0402_16V4Z

C203

2

+VDD48

1

2

13

D

2

G

S

0.1U_0402_16V4Z

1

C188

2

1

C189

2

1

C484

0.1U_0402_16V4Z

2

Q40

2N7002_SOT23@

1

C486

2

0.1U_0402_16V4Z

1

C190

0.1U_0402_16V4Z

2

22P_0402_50V8J

22P_0402_50V8J

+CLK_VDD1

CPU_STP#15

If system support C4, R255 have to change from 0 to 4.7K

1

C458

C485

2

2

C500

0_0402_5%

33P_0402_50V8J@

0.1U_0402_16V4Z

1

B

0.1U_0402_16V4Z

1

C456

2

+3VS

1 2

C501

R255

12

Y3

1 2

XTALOUT_CLK

14.31818MHZ_20P_6X1430004201

12

2

C831

1

1 2

L13 CHB1608U301_0603

XTALIN_CLK

R269 4.7K_0402_5%@

10U_0805_10V4Z

12

SB_SMDATA10,11,16,24

C457

SB_SMCLK10,11,16,24

R277
1M_0402_5%@

2

1

+CLKVDDA

2

C182

1

12

C

1- PLACE ALL THE SERIES TERMINATION
RESISTORS AS CLOSE TO CLOCK GEN AS POSSIBLE

2- ROUTE ALL CPUCLK/#, NBCLK/#, ITPCLK/#
AND SCR/# ,AS DIFFERENT PAIR RULE

3- PUT DECOUPLING CAPS CLOSE TO CLOCK GEN
POWER PIN

U23

45

R260

0.1U_0402_16V4Z

12

VDDCPU

51

VDDPCI

32

VDDATI

35

VDDSRC

14

VDDSRC

21

VDDSRC

3

VDD48

56

VDDREF

39

VDDA

44

GNDCPU

49

GNDPCI

31

GNDATI

36

GNDSRC

26

GNDSRC

20

GNDSRC

15

GNDSRC

5

GND

55

GND

38

GNDA

1

XIN

2

XOUT

6

VTT_PWRGD#/PD

48

CPU_STOP#

7

SCLK

8

SDATA

37

IREF

ICS951413CGLFT_TSSOP56

CPUCLKT0
CPUCLKC0
CPUCLKT1
CPUCLKC1

CPUCLKT2_ITP

CPUCLKC2_ITP

SRCCLKT0
SRCCLKC0
ATIGCLKT0

ATIGCLKC0

ATIGCLKT1

ATIGCLKC1

SRCCLKT3
SRCCLKC3
SRCCLKT4
SRCCLKC4
SRCCLKT5
SRCCLKC5
SRCCLKT6
SRCCLKC6
SRCCLKT7
SRCCLKC7

CLKREQA#
CLKREQB#

CK410#/PCICLK0

USB_48MHZ

FS_B/REF1
FS_A/REF0

TEST_SEL/REF2

ICS951413

475_0402_1%

FS_C

47
46
43
42
41
40

34
33
30
29
27
28
24
25
22
23
18
19
16
17
12
13

10
11

50
4

9
53
54
52

CPUCLKT0
CPUCLKC0
CPUCLKT1
CPUCLKC1

SRCCLKT0
SRCCLKC0

SRCCLKT3
SRCCLKC3

SRCCLKT5
SRCCLKC5

R254 4.7K_0402_5%
R268 4.7K_0402_5%@

FS_C
FS_B/REF1
FS_A/REF0
TEST_SEL/REF2

R270 33_0402_5%
R271 33_0402_5%
R272 33_0402_5%
R273 33_0402_5%

1 2
1 2

D

R256

1 2
1 2
1 2
1 2

R261 33_0402_5%

1 2

R263 33_0402_5%

1 2

R285 33_0402_5%

1 2

R278 33_0402_5%

1 2

R708 33_0402_5%

1 2

R709 33_0402_5%

1 2

R283 10K_0402_5%
R284 10K_0402_5%

12
12

+CLK_VDD1

R282 4.7K_0402_5%

1 2

R253 4.7K_0402_5%

1 2

R251 4.7K_0402_5%

1 2

R266 33_0402_5%

1 2

R252 33_0402_5%

1 2

R267 33_0402_5%

1 2

1 2

49.9_0402_1%

R257

1 2

R710

R258

49.9_0402_1%

12

49.9_0402_1%

R711

1 2

0_0402_5%@

1 2

49.9_0402_1%

12

49.9_0402_1%

R712

R259

1 2

49.9_0402_1%

12

12

49.9_0402_1%

R286

R279

CPU_BSEL2 5
CPU_BSEL1 5,8
CPU_BSEL0 5

CLK_SB_14M 16
CLK_14M_SIO 30
CLK_NB_14M 8

12

49.9_0402_1%

R264

12

49.9_0402_1%

R262

E

49.9_0402_1%

+CLK_VDD1

CLK_NB_BCLK 8
CLK_NB_BCLK# 8
CLK_BCLK 4
CLK_BCLK# 4

CLK_SB_ALINK 15
CLK_SB_ALINK# 15
CLK_NB_ALINK 7
CLK_NB_ALINK# 7
CLK_PCIE_MCARD 24
CLK_PCIE_MCARD# 24

MINI_CLKREQ# 24

3 3

FS_C FS_B FS_A

10
0

0

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CPU SRC PCI REF USB

100.00

1

133.33

1

166.66100.0033.33 14.31848.000

110

100.00

100.00

2005/11/1 2006/11/01

C

33.33

33.33

14.318

14.318

Compal Secret Data

Deciphered Date

48.000

48.000

Compal Electronics, Inc.

Title

ClockGen ICS 951411

Size Document Number Rev

HTW2E(LA-3201P) 1.0

B

Friday, April 21, 2006

D

Date: Sheet

E

12 46

of

A

B

C

D

E

TV-OUT CONNECTOR

Reduce LUMA_1 and CRMA_1 length
As short as possible

1

1 1

22P_0402_50V8J@

C204

1 2

1 2

22P_0402_50V8J

@

C224

1 2

1 2

CHB1608B121_0603

82P_0402_50V8J

DISPOFF#

220P_0402_50V7K

L15
CHB1608B121_0603

L17

82P_0402_50V8J

C410

1 2

75_0402_1%

BKOFF#29

NB_LUMA

NB_CRMA

82P_0402_50V8J

+3VS

R209 4.7K_0402_5%

C202

1

C213

2

1 2

21

D19 CH751H-40_SC76

1

2

NB_LUMA8

NB_CRMA8

R57

75_0402_1%

2 2

12

R59

12

D8

2

3

DAN217_SC59@

LUMA_2
CRMA_2

1

1

C223

2

C200

2

82P_0402_50V8J

1

D7

2

3

DAN217_SC59@

1. Y ground

2. C ground

3. Y (luminance+sync)

4. C (crominance)

+3VS

JP18

1

1

2

5

2

5

3

6

3

6

4

4

ALLTO_C10877-104A1-L_4P

PANEL +LCDVDD CTRL CKT

+LCDVDD

12

13

D

S

NB_ENVDD

Q3

2

G

2N7002_SOT23

NB_ENVDD8

R10

470_0805_5%

+LCDVDD Width: 40mils

Q2

2

12

R9

100K_0402_5%

1

2

0.047U_0402_16V7K

+3VALW

G

1 3
12

12

C13

S

SI2301BDS_SOT23

D

R7
100_0402_5%

2

R8
100K_0402_5%

Q34

+3VS

G

80mil

S

SI2301BDS_SOT23

D

1 3

80mil

1

C404

4.7U_0805_10V4Z

2

1

2

+LCDVDD

1

2

C411

4.7U_0805_10V4Z

C405

0.1U_0402_16V4Z

LCD/PANEL BD. Conn.

1

+3VS

+LCDVDD

1

3 3

4 4

C407

0.1U_0402_16V4Z@

2

NB_EDID_CLK8
NB_EDID_DATA8

DAC_BRIG29
INVT_PWM29

2

C810

220P_0402_50V7K@

A

1

0.1U_0402_16V4Z@

2

C811

1

C406

2

1 2

FBM-L11-201209-221LMA30T_0805

B+

220P_0402_50V7K@

FBM-L11-201209-221LMA30T_0805

B

L42

+LCD_VDD

DISPOFF# NB_TXOUT1+

L43

1 2

NB_EDID_CLK

NB_EDID_DATA

JP1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

ACES_88242-3000

1 2

C408 47P_0402_50V8J

1 2

C409 47P_0402_50V8J

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

NB_TXCLK­NB_TXCLK+

NB_TXOUT0­NB_TXOUT0+

NB_TXOUT2­NB_TXOUT2+

NB_TXOUT1-

C

NB_TXCLK- 8
NB_TXCLK+ 8

NB_TXOUT0- 8
NB_TXOUT0+ 8

NB_TXOUT2- 8
NB_TXOUT2+ 8

NB_TXOUT1- 8
NB_TXOUT1+ 8

2005/11/01 2006/11/01

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

TV-OUT, LVDS CONNECTOR

Size Document Number Rev

HTW2E(LA-3201P) 1.0

B

Friday, April 21, 2006

D

Date: Sheet

E

13 46

of

5

4

3

2

1

CRT CONNECTOR

D D

1

D2

DAN217_SC59@

2

3

L1

NB_CRT_R8

NB_CRT_G8

NB_CRT_B8

1

12

75_0402_1%

+CRT_VCC

U3

12

75_0402_1%

5

A2Y

3

C C

NB_CRT_HSYNC8

NB_CRT_VSYNC8

B B

12

R1

75_0402_1%

SN74AHCT1G125GW_SOT353-5

R2

C12

1 2

0.1U_0402_16V4Z

R3

6P_0402_50V8K

1

P

4

OE#

G

0.1U_0402_16V4Z

C11

1

C10

2

1 2

C8

2

6P_0402_50V8K

+CRT_VCC

A2Y

1 2

FCM2012C-800_0805

L2

1 2

FCM2012C-800_0805

L3

1 2

FCM2012C-800_0805

1

C5
6P_0402_50V8K

2

R4

1K_0402_5%

1 2

1

5

P

4

OE#

U2

G

SN74AHCT1G125GW_SOT353-5

3

1

C4

2

6P_0402_50V8K@

L29

1 2

CHB1608B121_0603

L30

1 2

CHB1608B121_0603

1

D1

DAN217_SC59@

2

1

C6
6P_0402_50V8K@

2

1

C401

68P_0402_50V8K@

2

D3

DAN217_SC59@

3

2

1

C7

2

6P_0402_50V8K@

1

C403
68P_0402_50V8K@

2

1

+3VS

3

DVI_HSYNC

DVI_VSYNC

+5VS +R _CRT_VCC

D4

2 1

CH491D_SC59

1A_6VDC_MINISMDC110

0.1U_0402_16V4Z

DVI_R

DV__G

DVI_B

1

C402

2

220P_0402_50V7K

C398

68P_0402_50V8J

F1

21

1

2

+CRT_VCC

1

C400

2

1

C9

2

68P_0402_50V8J

CRT Conn.

JP14

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

TYCO_1470801-1

R204

1 2

4.7K_0402_5%

R207

1 2

4.7K_0402_5%

Q32

2N7002_SOT23

2N7002_SOT23

1 2

2.2K_0402_5%

2

1 3

D

Q33

R205

G

S

1 3

D

2

4.7K_0402_5%

G

+3VS+CRT_VCC +3VS+CRT_VCC +3VS

R208

R206

1 2

1 2

4.7K_0402_5%

NB_DDC_DATA 8

S

NB_DDC_CLK 8

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/11/01 2006/11/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

CRT CONNECTOR

Size Document Number Rev

HTW2E(LA-3201P) 1.0

B

Wednesday, April 26, 2006

2

Date: Sheet

1

14 46

of

5

+3VS

8.2K_1206_8P4R_5%

D D

C C

B B

A A

8.2K_1206_8P4R_5%

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

R382 8.2K_0402_5%

1 2

R162 8.2K_0402_5%

1 2

C285 10U_0805_10V4Z
C291 10U_0805_10V4Z
C552 0.1U_0402_16V4Z
C550 0.1U_0402_16V4Z
C537 0.1U_0402_16V4Z
C562 0.1U_0402_16V4Z
C559 0.1U_0402_16V4Z
C561 0.1U_0402_16V4Z
C558 0.1U_0402_16V4Z
C541 0.1U_0402_16V4Z
C531 0.1U_0402_16V4Z

SB_32KH0

Y1

18P_0402_50V8J

1

C286

2

32.768KHZ_12.5P_1TJS125DJ2A073

45
36
27
18

RP23

45
36
27
18

RP22

RP25

8.2K_1206_8P4R_5%

8.2K_1206_8P4R_5%

45
36
27
18

RP10
RP8

8.2K_1206_8P4R_5%

RP9

8.2K_1206_8P4R_5%

RP24

8.2K_1206_8P4R_5%

C288

470U_D2_2.5VM

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

R103

1 2

20M_0603_5%

SB_32KHI

4

1

IN

OUT

NC3NC

2

PCI_PIRQD#
PCI_PIRQC#
PCI_PIRQB#
PCI_PIRQA#

PCI_PIRQG#
PCI_PIRQH#
PCI_PIRQE#
PCI_PIRQF#

PCI_REQ#3
PCI_REQ#0
PCI_REQ#2
PCI_REQ#1

PCI_REQ#4
PCI_REQ#5
PCI_GNT#0
PCI_GNT#1

PCI_STOP#
PCI_TRDY#
PCI_FRAME#
PCI_IRDY#

PCI_SERR#
PCI_PERR#
LOCK#
PCI_DEVSEL#

PCI_GNT#5
PCI_GNT#4
PCI_GNT#3
PCI_GNT#2

12

+

***

5

PCI_REQ#6
PCI_GNT#6

18P_0402_50V8J

1

C287

2

+1.8VS

NB_A_RXP07
NB_A_RXN07
NB_A_RXP17
NB_A_RXN17

L22
CHB2012U170_0805

+PCIE_VDDR

1 2

H_DPSLP#

R102
20M_0603_5%

1 2

NB_RST#8

CLK_SB_ALINK12

CLK_SB_ALINK#12

1 2
1 2
1 2
1 2

1 2

CHB2012U170_0805

+PCIE_VDDR

80mA

+PCIE_VDDR

PCI_PIRQA#23
PCI_PIRQB#21

PCI_PIRQG#20

H_PWRGOOD4

H_INTR4

H_NMI4

H_INIT#4

H_SMI#4

H_CPUSLP#4

H_IGNNE#4

H_A20M#4

H_FERR#4

H_STPCLK#4
DPRSLPVR4,41

BM_REQ#8
H_RESET#4,7

U36

4

O

TC7SH00FU_SSOP5@

SB_A_RXP07
SB_A_RXN07
SB_A_RXP17
SB_A_RXN17

PCIE_PVDD

CPU_STP# LPC_DRQ0#
H_DPSLP#

+3VS

5

INB
INA

3

+1.8VS

L24

C313

1 2

1U_0402_6.3V4Z
C314

1 2

10U_0805_10V4Z
C312

1 2

0.1U_0402_10V6K

CPU_STP#12
H_DPSLP#4

Pull-high on CPU side

Q62

13

D

2

G

2N7002_SOT23@

S

C4@ Support

4

R163 8.2K_0402_5%

1 2

NB_RST#

C3000.1U_0402_10V6K
C3050.1U_0402_10V6K
C2950.1U_0402_10V6K
C2980.1U_0402_10V6K

R108 150_0402_1%
R110 150_0402_1%

1 2

R343 4.12K_0603_1%

50mil trace lenght

R167 0_0402_5%

1 2

R713 0_0402_5%

1 2

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

H_PWRGD

H_A20M#

1 2

10K_0402_5%

1 2

C832

1 2

0.1U_0402_16V4Z@

1

P

2

G

2

C833

1

330P_0402_50V7J@

4

R336

R317

0_0402_5%@

SB_A_TXP0
SB_A_TXN0
SB_A_TXP1
SB_A_TXN1

12
12

SB_32KHI

SB_32KH0

R802

200K_0402_5%@

D42 CH751H-40_SOD323-2@

U9A

AH8

A_RST#

L27

PCIE_RCLKP

M27

PCIE_RCLKN

M30

PCIE_TX0P

N30

PCIE_TX0N

K30

PCIE_TX1P

L30

PCIE_TX1N

H30

PCIE_TX2P

J30

PCIE_TX2N

F30

PCIE_TX3P

G30

PCIE_TX3N

M29

PCIE_RX0P

N29

PCIE_RX0N

M28

PCIE_RX1P

N28

PCIE_RX1N

J29

PCIE_RX2P

K29

PCIE_RX2N

J28

PCIE_RX3P

K28

PCIE_RX3N

G27

PCIE_CALRP

H27

PCIE_CALRN

G28

PCIE_CALI

R30

PCIE_PVDD

F26

PCIE_VDDR_1

R29

PCIE_VDDR_2

G26

PCIE_VDDR_3

P26

PCIE_VDDR_4

K26

PCIE_VDDR_5

L26

PCIE_VDDR_6

P28

PCIE_VDDR_7

N26

PCIE_VDDR_8

P27

PCIE_VDDR_9

H28

PCIE_VSS_1

F29

PCIE_VSS_2

H29

PCIE_VSS_3

H26

PCIE_VSS_4

F27

PCIE_VSS_5

G29

PCIE_VSS_6

L29

PCIE_VSS_7

J26

PCIE_VSS_8

L28

PCIE_VSS_9

J27

PCIE_VSS_10

N27

PCIE_VSS_11

M26

PCIE_VSS_12

K27

PCIE_VSS_13

P29

PCIE_VSS_14

P30

PCIE_VSS_15

AJ8

CPU_STP#/DPSLP_3V#

AK7

DPSLP_OD#/GPIO37

AG5

INTA#

AH5

INTB#

AJ5

INTC#

AH6

INTD#

AJ6

INTE#/GPIO33

AK6

INTF#/GPIO34

AG7

INTG#/GPIO35

AH7

INTH#/GPIO36

B2

X1

B1

X2

C29

CPU_PG

A28

INTR/LINT0

C28

NMI/LINT1

B29

INIT#

D29

SMI#

E4

SLP#/LDT_STP#

B30

IGNNE#

F28

A20M#

E28

FERR#

E29

STPCLK#/ALLOW_LDTSTP

D25

LDT_PG/SSMUXSEL/GPIO0

E27

DPRSLPVR

D27

BMREQ#

D28

LDT_RST#

SB450

CPU_STP#

12

12

3

PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
PCICLK7
PCICLK8
PCICLK9

PCICLK_FB

PCIRST#
AD0/ROMA18
AD1/ROMA17
AD2/ROMA16
AD3/ROMA15
AD4/ROMA14
AD5/ROMA13
AD6/ROMA12
AD7/ROMA11

AD8/ROMA9

AD9/ROMA8
AD10/ROMA7
AD11/ROMA6
AD12/ROMA5
AD13/ROMA4
AD14/ROMA3
AD15/ROMA2
AD16/ROMD0
AD17/ROMD1
AD18/ROMD2
AD19/ROMD3
AD20/ROMD4
AD21/ROMD5
AD22/ROMD6
AD23/ROMD7

AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

CBE1#/ROMA1

CBE3#

FRAME#

IRDY#

PAR/ROMA19

STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#

REQ5#/GPIO13
REQ6#/GPIO31

GNT0#
GNT1#
GNT2#

GNT5#/GPIO14
GNT6#/GPIO32

CLKRUN#

LOCK#

LAD0
LAD1
LAD2
LAD3

LFRAME#

LDRQ0#
LDRQ1#

SERIRQ

RTCCLK

VBAT

RTC_GND

PCI_AD[0..31]

L4
L3
L2
L1
M4
M3
M2
M1
N4
N3
N2

AJ7
W3
Y2
W4
Y3
V1
Y4
V2
W2
AA4
V4
AA3
U1
AA2
U2
AA1
U3
T4
AC1
R2
AD4
R3
AD3
R4
AD2
P2
AE3
P3
AE2
P4
AF2
N1
AF1
V3
AB4
AC2
AE4
T3
AC4
AC3
T2
U4
T1
AB2
AB3
AF4
AF3
AG2
AG3
AH1
AH2
AH3
AJ2
AK2
AJ3
AK3
AG4
AH4
AJ4
AG1
AB1

AG25
AH25
AJ25
AH24
AG24
AH26
AG26

AK27

C2
F3

A2
A1

PCI_CLK2_R
PCI_CLK3_R
PCI_CLK4_R
PCI_CLK5_R
PCI_CLK6_R
PCI_CLK7_R
PCI_CLK8_R
PCICLK9_R
PCICLKFB

PCIRST#
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_FRAME#
PCI_DEVSEL#
PCI_IRDY#
PCI_TRDY#
PCI_PAR
PCI_STOP#
PCI_PERR#
PCI_SERR#
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
PCI_REQ#5
PCI_REQ#6
PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4
PCI_GNT#5
PCI_GNT#6
PM_CLKRUN#
LOCK#

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ0#
LPC_DRQ1#

SERIRQ

RTC_CLK

+SB_VBAT

R354

1 2

22_0402_5%

R742

1 2

22_0402_5%

R363

1 2

22_0402_5%

12

R165

8.2K_0402_5%

+3VS

C777

1U_0402_6.3V4Z

Consider

--connect

CLK_PCI_LAN

PCI_CLK7

PCIRST# 20,21,23,24,27,29,30,33

L41

2

C815

1

+SS_VDD

R746 10K_0402_5%

1 2

R741

1 2

10K_0402_5%@

2

C816

100P_0402_25V8K

1

1 2

FBM-L11-160808-800LMT_0603

+SS_VDD

1

2

100P_0402_25V8K

PCI_C/BE#0 20,21,23,24
PCI_C/BE#1 20,21,23,24
PCI_C/BE#2 20,21,23,24
PCI_C/BE#3 20,21,23,24
PCI_FRAME# 20,21,23,24
PCI_DEVSEL# 20,21,23
PCI_ I RDY# 20,21,23
PCI_TRDY # 20,21,23
PCI_PAR 20,21,23
PCI_STOP# 20,21,23
PCI_PERR# 20,21,23
PCI_SERR# 20,21
PCI_REQ#0 23
PCI_REQ#1 20
PCI_REQ#2 21

PCI_GNT#0 23
PCI_GNT#1 20
PCI_GNT#2 21

PM_CLKRUN# 20,21,27,29

LPC_AD0 27,29,30,33
LPC_AD1 27,29,30,33
LPC_AD2 27,29,30,33
LPC_AD3 27,29,30,33
LPC_FRAME# 19,27,29,30,33

LPC_DRQ1# 30,33

SERIRQ 21,27,29,30,33

RTC_CLK 19

AUTO_ON# 19

PCI_AD[0..31]19,20,21,23,24

SB450 SB

Part 1 of 4

PCI EXPRESS INTERFACE

PCI INTERFACE

REQ4#/PLL_BP33/PDMA_REQ1#

GNT3#/PLL_BP66/PDMA_GNT0#
GNT4#/PLL_BP50/PDMA_GNT1#

LPC

CPU XTAL

RTC_IRQ#/ACPWR_STRAP

RTC

PCI CLKS

CBE0#/ROMA10

CBE2#/ROMWE#

DEVSEL#/ROMA0

TRDY#/ROMOE#

REQ3#/PDMA_REQ0#

RTC_CLK to EC

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/11/01 2006/11/01

Compal Secret Data

Deciphered Date

1 2

2

100P_0402_50V8J@

PCI_CLK7

2

PCI_CLK2_R 19

PCI_CLK3_R 19
PCI_CLK5_R 19

PCI_CLK6_R 19
PCI_CLK8_R 19

C563

1

C807 22P_0402_50V8J

2

12

R759

R750

10K_0402_5%@

10K_0402_5%

1 2

Place JOPEN1 close
to DDR-SODIMM

+SB_VBAT

C278

1

W=20mils

2

1U_0402_6.3V4Z

1

CLK_PCI_CB
CLK_PCI_MINI
CLK_PCI3
CLK_PCI_SIO
CLK_PCI_1394
CLK_PCI_LPC
CLK_PCI_LAN

PCI_CLK4_R
PCI_CLK7_R

Spread Spectrum

U32

8

DLY CNTRL

1

CLKIN

3

VDD

13

VDD

9

SSON

4

SS%

5

GND

12

GND

ASM3P623S00EF-16-TR_TSSOP16

CLKOUT1
CLKOUT2
CLKOUT3
CLKOUT4
CLKOUT5
CLKOUT6
CLKOUT7
CLKOUT8

2
6
7
10
11
14
15
16

R743

1 2

0_0402_5%

R744

1 2

0_0402_5%SIO@

R745

1 2

0_0402_5%1394@

SS%

1
0

PCI_PAR

R136 8.2K_0402_5%

1 2

LPC_DRQ1#

SERIRQ

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

PM_CLKRUN#

4 5
3 6
2 7
1 8

RP20 10K_1206_8P4R_5%

4 5
3 6
2 7
1 8

RP21 100K_1206_8P4R_5%

1 2

R151 4.7K_0402_5%

RTC Battery

BATT1

-+

RTCBATT45@

+RTCVCC

R87

1 2

470_0805_5%

Title

Size Document Number R ev

Date: Sheet

R88

1 2

1

1

2

2

470_0805_5%

No short

JOPEN1

JUMP_43X39 @

1

2

Compal Electronics, Inc.

PCI_EXP/LPC/RTC

HTW2E(LA-3201P) 1.0

Friday, May 05, 2006

+RTCBATT

+RTCBATT

12

3

C274

0.1U_0402_16V4Z

1

CLK_PCI_CB 21
CLK_PCI_MINI 24
CLK_PCI3 27
CLK_PCI_SIO 30,33
CLK_PCI_1394 23
CLK_PCI_LPC 29
CLK_PCI_LAN 20

PCI_CLK4_R 19
PCI_CLK7_R 19

CLK_PCI_CB
CLK_PCI_MINI
CLK_PCI3
CLK_PCI_SIO

CLK_PCI_1394
CLK_PCI_LPC

Deviation

0.5%

0.25%

1

D12
BAS40-04_SOT23

2

+CHGRTC

of

15 46

+3VS

5

+3VALW

RP17

1 8
2 7
3 6
4 5

10K_1206_8P4R_5%

D D

+3VS

C C

B B

AZ_RST_MOM#42

SN74LVC08APW_TSSOP14

+3VS

A A

CHB1608B121_0603

RP6

1 8
2 7
3 6
4 5

4.7K_1206_8P4R_5%

R96 4.7K_0402_5%

1 2

R99 4.7K_0402_5%

1 2

R94 10K_0402_5%

1 2

R326 10K_0402_5%

1 2

R90 10K_0402_5%

1 2

R385 10K_0402_5%

1 2

R384 10K_0402_5%

1 2

R98 1.5K_0402_5%

1 2

R325 1.5K_0402_5%

1 2

R751 10K_0402_5%

1 2

R758

1 2

10K_0402_5%

R337

1 2

10K_0402_5%

RP7

1 8
2 7
3 6
4 5

10K_1206_8P4R_5%

R793 10K_0402_5%

1 2

R794 10K_0402_5%

1 2

R795 10K_0402_5%

1 2

R796 10K_0402_5%

1 2

U5D

11

R760

1 2

10K_0402_5%

+3VALW

12

L46

12

R74
10K_0402_5%

1

C267

0.1U_0402_10V6K

2

5

MASTER_RST#
EC_THRM#
EC_PME#
AC_RST#

EXTEVENT0#
PCIE_PME#
EC_FLASH#
PM_SLP_S5#

EC_SWI#
PM_SLP_S3#
PBTN_OUT#

AGP_BUSY#

SIO_SMI#
GATEA20

KBRST#
SB_SMCLK
SB_SMDATA
GPIO_M

GPIO8

AGP_STP#

AC_BITCLK
AC_SDIN1
AC_SDIN2
AZ_SDIN1_MOM

GPIO12
GPIO46
GPIO11
GPIO40

+3VALW

14

AZ_RST

12

P

A

O

GPIO_M

13

B

G

7

MAINPWON_R

X1 48MHZ_4P_FN4800002

4

OUT

VDD

1

GND

OE

AZ_BITCLK_HD25
AZ_SDOUT_HD25
AZ_SYNC_MOM42
AZ_BITCLK_MOM42
AZ_SDOUT_MOM42

AZ_SDIN3_HD25
AZ_SYNC_HD25
AZ_RST_HD#25

2 1

D11 CH751H-40_SC76

OSCLIN

3
2

4

EC_THRM#29

EC_SWI#29

PM_SLP_S3#29
PM_SLP_S5#29

PBTN_OUT#29

SB_PWRGD17

NB_SUS_STAT#8

GATEA2029

KBRST#29

H_PROCHOT#4

CLK_SB_14M12

SB_INT_FLASH_SEL30

SB_SMCLK10,11,12,24

SB_SMDATA10,11,12,24

R714 47_0402_5%
R715 33_0402_5%
R716 33_0402_5%
R717 47_0402_5%
R718 33_0402_5%

R719 33_0402_5%
R720 33_0402_5%

AZ_SDIN1_MOM42

MAINPWON 4,35,36,38

4

0_0402_5%

SIDERST#27

CLK_OK12,17

SPKR26

SPK_SEL29

1 2
1 2
1 2
1 2
1 2

1 2
1 2

AC_SDOUT19

SPDIF_OUT19

EC_THRM#
EC_SWI#
EXTEVENT0#
PM_SLP_S3#
PM_SLP_S5#

PBTN_OUT#

R308 0_0402_5%

1 2

R319 10K_0402_5%

1 2

R314 10K_0402_5%

1 2

GATEA20

KBRST#

R97

12

SB_INT_FLASH_SEL

MAINPWON_R
EC_PME#
SIO_SMI#

MASTER_RST#

EC_RSMRST#

1

C279
15P_0402_50V8D@

2

AGP_STP#
AGP_BUSY#
GPIO_M
SPKR
SB_SMCLK
SB_SMDATA
SPK_SEL
GPIO8
GPIO11
GPIO12

AZ_SDOUT

AZ_SDIN3_HD
AZ_SYNC
AZ_RST
GPIO46

AC_BITCLK
AC_SDOUT
AZ_SDIN1_MOM
AC_SDIN1
AC_SDIN2
GPIO40
AC_RST#

SPDIF_OUT

3

U9B

C6

TALERT#/TEMP_ALERT#/GPIO10

C4

PCI_PME#/GEVENT4#

D3

RI#/EXTEVNT0#

B4

SLP_S3#

E3

SLP_S5#

B3

PWR_BTN#

C3

PWR_GOOD

D4

SUS_STAT#

F2

TEST1

E2

TEST0

AJ26

GA20IN

AJ27

KBRST#

D6

SMBALERT#/THRMTRIP#/GEVENT2#

C5

LPC_PME#/GEVENT3#

A25

LPC_SMI#/EXTEVNT1#

D8

VOLT_ALERT#/S3_STATE/GEVENT5#

D7

SYS_RESET#/GPM7#

D2

WAKE#/GEVENT8#

D1

RSMRST#

A23

14M_X1/OSC

B23

14M_X2

AK24

SIO_CLK

B25

ROM_CS#/GPIO1

C25

GHI#/GPIO6

C23

VGATE/GPIO7

D24

GPIO4

D23

GPIO5

A27

FANOUT0/GPIO3

C24

SPKR/GPIO2

A26

SCL0/GPOC0#

B26

SDA0/GPOC1#

B27

DDC1_SCL/GPIO9

C26

DDC1_SDA/GPIO8

C27

DDC2_SCL/GPIO11

D26

DDC2_SDA/GPIO12

AZ_BITCLK

J2

AZ_BITCLK

J3

AZ_SDOUT

D5

BLINK/AZ_SDIN3/GPM6#

K2

AZ_SYNC

A6

USB_OC5#/AZ_RST#/GPM5#

K3

48M_AZ/GPIO46

G1

AC_BITCLK/GPIO38

G2

AC_SDOUT/GPIO39

H4

ACZ_SDIN0/GPIO42

G3

ACZ_SDIN1/GPIO43

G4

ACZ_SDIN2/GPIO44

H1

AC_SYNC/GPIO40

H3

AC_RST#/GPIO45

H2

SPDIF_OUT/GPIO41

SB450

Control by EC

SB450 SB

ACPI / WAKE UP EVENTS

CLK / RST

EC_RSMRST#29

Part 4 of 4

USB_OC0#/GPM0#

USB_OC2#/FANOUT1/LLB#/GPM2#

USB_OC6#/FAN_ALERT#/GEVENT6#

USB_OC7#/CASE_ALERT#/GEVENT7#

USB_OC1#/GPM1#
USB_OC3#/GPM3#

USB_OC4#/GPM4#

USB INTERFACE

GPIOAC97

AZALIA

USB PWR

48M_X1/USBCLK

USB_RCOMP

USB_VREFOUT

USB_ATEST1
USB_ATEST0

USB_HSDP7+
USB_HSDP7+

USB_HSDP6+

USB_HSDM6-

USB_HSDP5+

USB_HSDM5-

USB_HSDP4+

USB_HSDM4-

USB_HSDP3+

USB_HSDM3-

USB_HSDP2+

USB_HSDM2-

USB_HSDP1+

USB_HSDM1-

USB_HSDP0+

USB_HSDM0-

AVDDTX_0
AVDDTX_1
AVDDTX_2
AVDDTX_3
AVDDRX_0
AVDDRX_1
AVDDRX_2
AVDDRX_3

AVSS_USB_1
AVSS_USB_2
AVSS_USB_3
AVSS_USB_4
AVSS_USB_5
AVSS_USB_6
AVSS_USB_7
AVSS_USB_8

AVSS_USB_9
AVSS_USB_10
AVSS_USB_11
AVSS_USB_12
AVSS_USB_13
AVSS_USB_14
AVSS_USB_15
AVSS_USB_16
AVSS_USB_17
AVSS_USB_18
AVSS_USB_19
AVSS_USB_20
AVSS_USB_21
AVSS_USB_22
AVSS_USB_23
AVSS_USB_24

12

R137
47K_0402_5%

48M_X2

AVDDC

AVSSC

EC_RSMRST#

A15
B15
C15
D16
C16
D15
B8
C8
C7
B7
B6
B5
A5

A11
B11

A10
B10

A14
B14

A13
B13

A18
B18

A17
B17

A21
B21

A20
B20

C21
C18
D13
D10
D20
D17
C14
C11

A16
B16
A9

A12
A19
A22
B9
B12
B19
B22
C9
C10
C12
C13
C17
C19
C20
C22
D9
D11
D12
D14
D18
D19
D21
D22

2

Delay 50ms after +3VALW ready

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/11/01 2006/11/01

3

Compal Secret Data

Deciphered Date

2

1 2

R95 0_0402_5%

R100 10K_0402_5%@

1 2

R307 10K_0402_5%@

1 2

USB_RCOMP

EC_SCI#
EC_FLASH#
USB_OC2#
EC_LID_OUT#
USB_OC4#
USB_OC6#
EC_SMI#

USBP4+
USBP4-

USBP2+
USBP2-

USBP1­USBP1+

USBP0+
USBP0-

+AVDDTX

+AVDDRX

+AVDDC

1

OSCLIN

R318 11.3K_0603_1%

1 2

EC_SCI# 29

EC_FLASH# 30

EC_LID_OUT# 29

EC_SMI# 29

USB_OC4#
USB_OC2#
USB_OC6#

USBP4+ 28

USBP4- 28

USBP2+ 28
USBP2- 28

USBP1- 24

USBP1+ 24
USBP0+ 28

USBP0- 28

L18 FBM-10-201209-260-T_0805

+AVDDTX

+AVDDRX

+AVDDC

Title

SB450 USB/ACPI/AC97/GPIO

Size Document Number Rev

HTW2E(LA-3201P) 1.0

Custom

Friday, April 28, 2006

Date: Sheet

1 2

C268 10U_0805_10V4Z

1 2

C281 1U_0402_6.3V4Z

1 2

C512 0.1U_0402_16V4Z

1 2

C513 0.1U_0402_16V4Z

1 2

C514 0.1U_0402_16V4Z

1 2

L19 FBM-10-201209-260-T_0805

1 2

C270 10U_0805_10V4Z

1 2

C283 1U_0402_6.3V4Z

1 2

C521 0.1U_0402_16V4Z

1 2

C510 0.1U_0402_16V4Z

1 2

C511 0.1U_0402_16V4Z

1 2

L21 FBM-10-201209-260-T_0805

1 2

C277 10U_0805_10V4Z

1 2

C276 1U_0402_6.3V4Z

1 2

C504 0.1U_0402_16V4Z

1 2

Compal Electronics, Inc.

EC_SMI#
EC_SCI#PCIE_PME#

EC_LID_OUT#

1

10K_1206_8P4R_5%

RP5

16 46

+3VALW

45
36
27
18

+3VALW

of

5

Place closely SATA CONN.

+5VS

0.1U_0402_16V4Z@

1

C729

10U_0805_10V4Z

2

1

C736

2

1

C812
10U_0805_10V4Z

2

D D

C C

+3VS

10U_0805_10V4Z@

1

C735

2

0.1U_0402_16V4Z

1

C730

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z@

1

C737

2

1

1

C731

2

2

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z@

CHB1608U301_0603

0.1U_0402_16V4Z

+1.8VS

CHB1608U301_0603

0.1U_0402_16V4Z

+1.8VS

CHB1608U301_0603

0.1U_0402_16V4Z

C732

C738

L38

C739

L39

C742

L40

12

1

2

12

1

2

12

1

C747

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

0.1U_0402_16V4Z

4

SUYIN_127043FB022G208ZR_22P_RV

GND

GND

GND

VCC3.3
VCC3.3
VCC3.3

GND
GND

GND
VCC5
VCC5
VCC5

GND

RESERVED

GND

VCC12
VCC12
VCC12

JP32

1
2

A+

3

A-

4
5

B-

6

B+

7

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

SATA HDD CONNECTOR

+PLLVDD_SATA+1.8VS

1

C740

2

1

C743

2

0.1U_0402_16V4Z

1

C748

2

1

2

+XTLVDD_SATA

1

2

1

C749

2

0.1U_0402_16V4Z

C741

10U_0805_10V4Z

C744

10U_0805_10V4Z

1U_0402_6.3V4Z

1

C750

2

1

C751

2

1U_0402_6.3V4Z

SATA_TX0+_C
SATA_TX0-_C

SATA_RX0-_C
SATA_RX0+_C

1

C752

2

+3VS

27P_0402_50V8J

+1.8_SATA

1

2

+5VS

C745

C753
22U_0805_6.3V6M

3

C726 0 .01U_0402_25V4Z

1 2

C727 0 .01U_0402_25V4Z

1 2

C728 0 .01U_0402_25V4Z

1 2

C733 0 .01U_0402_25V4Z

1 2

Place SATA CAP & RES very close to SB

C734 0.01U_0402_16V7K@

12

R721 1K_0402_1%

12

R722

1 2

+3VS

SATA_X1

2

1

PHDD_LED#29

R723

10M_0402_5%

Y4

1 2

25MHZ_20P

12

SATA_X2

1

C746

27P_0402_50V8J

2

10K_0402_5%

+PLLVDD_SATA
+XTLVDD_SATA

SATA_TX0+
SATA_TX0­SATA_RX0­SATA_RX0+

PHDD_LED#

+1.8_SATA

SATA_X1
SATA_X2

AK22

AJ22

AK21

AJ21

AK19

AJ19

AK18

AJ18

AK14

AJ14

AK13

AJ13

AK11

AJ11

AK10

AJ10
AJ15
AJ16

AK16

AH15
AH16
AG10

AG14
AH12
AG12
AG18
AG21
AH18
AG20

AG9
AF10
AF11
AF12
AF13
AF14
AF15
AF16
AF17
AF18
AF19
AF20
AF21
AF22

AG11
AG15
AG17
AG19
AG22
AG23

AH17
AH23
AH13
AH20

AJ12
AK17
AK23
AH10

AJ23

AK8

AH9

AF9

AK9

2

U9C

SATA_TX0+
SATA_TX0-

SATA_RX0­SATA_RX0+

SATA_TX1+
SATA_TX1-

SATA_RX1­SATA_RX1+

SATA_TX2+
SATA_TX2-

SATA_RX2­SATA_RX2+

SATA_TX3+
SATA_TX3-

SATA_RX3­SATA_RX3+

SATA_CAL
SATA_X1
SATA_X2
SATA_ACT#
PLLVDD_SATA
XTLVDD_SATA
AVDD_SATA_1

AVDD_SATA_2
AVDD_SATA_3
AVDD_SATA_4
AVDD_SATA_5
AVDD_SATA_6
AVDD_SATA_7
AVDD_SATA_8

AVSS_SATA_1
AVSS_SATA_2
AVSS_SATA_3
AVSS_SATA_4
AVSS_SATA_5
AVSS_SATA_6
AVSS_SATA_7
AVSS_SATA_8
AVSS_SATA_9
AVSS_SATA_10
AVSS_SATA_11
AVSS_SATA_12
AVSS_SATA_13
AVSS_SATA_14
AVSS_SATA_15
AVSS_SATA_16
AVSS_SATA_17
AVSS_SATA_18
AVSS_SATA_19
AVSS_SATA_20
AVSS_SATA_21
AVSS_SATA_22
AVSS_SATA_23
AVSS_SATA_24
AVSS_SATA_25
AVSS_SATA_26
AVSS_SATA_27
AVSS_SATA_28
AVSS_SATA_29
AVSS_SATA_30
AVSS_SATA_31
AVSS_SATA_32

SB450 SB

Part 2 of 4

SERIAL ATA

SERIAL ATA POWER

PIDE_IORDY

PIDE_IRQ

PIDE_DACK#

PIDE_DRQ
PIDE_IOR#

PIDE_IOW#

PIDE_CS1#
PIDE_CS3#

PIDE_D10
PIDE_D11

PRIMARY ATA 66/100

PIDE_D12
PIDE_D13
PIDE_D14
PIDE_D15

SIDE_IORDY

SIDE_IRQ

SIDE_DACK#

SIDE_DRQ

SIDE_IOR#

SIDE_IOW#

SIDE_CS1#
SIDE_CS3#

SIDE_D0/GPIO15
SIDE_D1/GPIO16
SIDE_D2/GPIO17
SIDE_D3/GPIO18
SIDE_D4/GPIO19
SIDE_D5/GPIO20
SIDE_D6/GPIO21
SIDE_D7/GPIO22
SIDE_D8/GPIO23

SIDE_D9/GPIO24
SIDE_D10/GPIO25
SIDE_D11/GPIO26
SIDE_D12/GPIO27
SIDE_D13/GPIO28
SIDE_D14/GPIO29
SIDE_D15/GPIO30

SECONDARY A TA 66/100

AVSS_SATA_33
AVSS_SATA_34
AVSS_SATA_35
AVSS_SATA_36
AVSS_SATA_37
AVSS_SATA_38
AVSS_SATA_39
AVSS_SATA_40
AVSS_SATA_41
AVSS_SATA_42
AVSS_SATA_43
AVSS_SATA_44
AVSS_SATA_45

PIDE_A0
PIDE_A1
PIDE_A2

PIDE_D0
PIDE_D1
PIDE_D2
PIDE_D3
PIDE_D4
PIDE_D5
PIDE_D6
PIDE_D7
PIDE_D8
PIDE_D9

SIDE_A0
SIDE_A1
SIDE_A2

AD30
AE28
AD27
AC27
AD28
AD29
AE27
AE30
AE29
AC28
AC29

AF29
AF27
AG29
AH30
AH28
AK29
AK28
AH27
AG27
AJ28
AJ29
AH29
AG28
AG30
AF30
AF28

V29
T27
T28
U29
T29
V30
U28
W29
W30
R27
R28

V28
W28
Y30
AA30
Y28
AA28
AB28
AB27
AB29
AA27
Y27
AA29
W27
Y29
V27
U27

AG13
AH22
AK12
AH11
AJ17
AH14
AH19
AJ20
AH21
AJ9
AG16
AK15
AK20

IDE_PDDACK#

IDE_SDIO RDY
INT_IRQ15
IDE_SDA0
IDE_SDA1
IDE_SDA2
IDE_SDDACK#
IDE_SDDREQ
IDE_SDIOR#
IDE_SDIOW#
IDE_SDCS1#
IDE_SDCS3#

IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15

1

IDE_PDDACK# 19

IDE_SDIORDY 27
INT_IRQ15 27
IDE_SDA0 27
IDE_SDA1 27
IDE_SDA2 27
IDE_SDDACK# 27
IDE_SDDREQ 27
IDE_SDIOR# 27
IDE_SDIOW# 27
IDE_SDCS1# 27
IDE_SDCS3# 27

IDE_SDD[0..15] 27

SB450

B B

VGATE41

10K_0402_5%

1M_0402_5%

R129

R128

+3VS

12

12

+3VALW +3VALW +3VALW+3VALW

C127

0.1U_0402_16V4Z

14

P

1

O2I

G

U7A

7

SN74LVC14APWLE_TSSOP14

14

P

3

O4I

G

U7B

7

SN74LVC14APWLE_TSSOP14

D38

1 2

1N4148_SOD80

R130

1 2

330K_0402_5%

0.1U_0402_10V6K

C308

1

2

CLK_OK 12,16

+3VALW +3VALW

14

P

5

O6I

G

U7C

7

SN74LVC14APWLE_TSSOP14

U7-->please close to SB450(U9)

14

P

9

O8I

G

U7D

7

SN74LVC14APWLE_TSSOP14

R111

1 2

330K_0402_5%

D39

1 2

1N4148_SOD80

NB_PWRGD 8

C293

0.47U_0603_10V7K

11

1

2

SN74LVC14APWLE_TSSOP14

14

P

O10I

G

U7E

7

14

P

13

O12I

G

U7F

7

SN74LVC14APWLE_TSSOP14

SB_PWRGD# 8

SB_PWRGD 16

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTI AL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS , INC.

3

2005/11/01 2006/11/01

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

SB450 IDE/SATA

Size Document Number Rev

HTW2E(LA-3201P) 1.0

Custom

Friday, April 21, 2006

2

Date: Sheet

1

of

17 46

+3VS +1.8VALW

C660

1

22U_0805_6.3V6M

2

+3VS

+5VS

2 1

CH751H-40_SC76

1 2

1

2

D14

R154

1K_0402_5%

C661 22U_0805_6.3V6M

C337

1U_0402_6.3V4Z

C587 1U_0402_6.3V4Z

1 2

C585 1U_0402_6.3V4Z

1 2

C651 1U_0402_6.3V4Z

1 2

C652 1U_0402_6.3V4Z

1 2

C520 0.1U_0402_16V4Z

1 2

C543 0.1U_0402_16V4Z

1 2

C522 0.1U_0402_16V4Z

1 2

C542 0.1U_0402_16V4Z

1 2

C564 0.1U_0402_16V4Z

1 2

C579 0.1U_0402_16V4Z

1 2

C584 0.1U_0402_16V4Z

1 2

C568 0.1U_0402_16V4Z

1 2

C576 0.1U_0402_16V4Z

1 2

C565 0.1U_0402_16V4Z

1 2

C586 0.1U_0402_16V4Z

1 2

C581 0.1U_0402_16V4Z

1 2

C594 0.1U_0402_16V4Z

1 2

C519 0.1U_0402_16V4Z

1 2

C598 0.1U_0402_16V4Z

1 2

C596 0.1U_0402_16V4Z

1 2

C597 0.1U_0402_16V4Z

1 2

C566 1U_0402_6.3V4Z

1 2

C553 1U_0402_6.3V4Z

1 2

C560 1U_0402_6.3V4Z

1 2

C573 1U_0402_6.3V4Z

1 2

C653 1U_0402_6.3V4Z

1 2

C654 1U_0402_6.3V4Z

1 2

C655 1U_0402_6.3V4Z

1 2

C656 1U_0402_6.3V4Z

1 2

C570 0.1U_0402_16V4Z

1 2

C569 0.1U_0402_16V4Z

1 2

C547 0.1U_0402_16V4Z

1 2

C571 0.1U_0402_16V4Z

1 2

C556 0.1U_0402_16V4Z

1 2

C554 0.1U_0402_16V4Z

1 2

C572 0.1U_0402_16V4Z

1 2

C578 0.1U_0402_16V4Z

1 2

C557 0.1U_0402_16V4Z

1 2

C577 0.1U_0402_16V4Z

1 2

C555 0.1U_0402_16V4Z

1 2

C546 0.1U_0402_16V4Z

1 2

C266 10U_0805_10V4Z

1 2

C275 10U_0805_10V4Z

1 2

C508 0.1U_0402_16V4Z

1 2

C507 0.1U_0402_16V4Z

1 2

C523 0.1U_0402_16V4Z

1 2

C525 0.1U_0402_16V4Z

1 2

C535 0.1U_0402_16V4Z

1 2

C536 1U_0402_6.3V4Z

1 2

C657 1U_0402_6.3V4Z

1 2

C526 0.1U_0402_16V4Z

1 2

C530 0.1U_0402_16V4Z

1 2

C524 0.1U_0402_16V4Z

1 2

C534 0.1U_0402_16V4Z

1 2

C532 0.1U_0402_16V4Z

1 2

C540 0.1U_0402_16V4Z

1 2

C533 0.1U_0402_16V4Z

1 2

+V5_VREF

2

2

C589

0.1U_0402_16V4Z

1

1

C269 10U_0805_10V4Z
C282 1U_0402_6.3V4Z
C280 0.1U_0402_16V4Z

+1.8VALW

1 2
1 2
1 2

+1.8VS

+3VALW

C516

+1.05VS

R86

0_0805_5%

+3VS

220mA

0.1U_0402_16V4Z

1 2

+1.8VS

12

+AVDD_CK

D30

U26
U30

AA5

AA26

AB5

AC30

AD5

AD26

AE1
AE5

AE26

AF6

AF7
AF24
AF25

AK1

AK4

AK26
AK30

M12

M13

M18

M19

N12

N13

N18

N19

W12
W13
W18
W19

C30

AG6

A30
E24

E25

V26
Y26

V12
V13
V18
V19

E10
E20
E21

E13
E14
E16
E17

A24
B24

A29
B28

E11
E12
E15
E18

J5
K1
K5
N5
P5
R1
U5

V5
Y1

A3
A7
E6
E7
E1
F5

E9

A4
A8

C1
E5
E8

U9D

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
VDDQ_13
VDDQ_14
VDDQ_15
VDDQ_16
VDDQ_17
VDDQ_18
VDDQ_19
VDDQ_20
VDDQ_21
VDDQ_22
VDDQ_23
VDDQ_24
VDDQ_25
VDDQ_26
VDDQ_27
VDDQ_28
VDDQ_29
VDDQ_30
VDDQ_31
VDDQ_32
VDDQ_33
VDDQ_34

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16

S5_3.3V_1
S5_3.3V_2
S5_3.3V_3
S5_3.3V_4
S5_3.3V_5
S5_3.3V_6

S5_1.8V_1
S5_1.8V_2
S5_1.8V_3
S5_1.8V_4

USB_PHY_1.8V_1
USB_PHY_1.8V_2
USB_PHY_1.8V_3
USB_PHY_1.8V_4

CPU_PWR
V5_VREF
AVDDCK

AVSSCK
VSS_1

VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11

SB450

SB450 SB

Part 3 of 4

POWER

VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98

E19
E22
E23
E26
E30
F1
F4
G5
H5
J1
J4
K4
L5
M5
P1
R5
R26
T5
T26
T30
W1
W5
W26
Y5
AB26
AB30
AC5
AC26
AD1
AF5
AF8
AF23
AF26
AG8
AJ1
AJ24
AJ30
AK5
AK25
M14
M15
M16
M17
N14
N15
N16
N17
P12
P13
P14
P15
P16
P17
P18
P19
R12
R13
R14
R15
R16
R17
R18
R19
T12
T13
T14
T15
T16
T17
T18
T19
U12
U13
U14
U15
U16
U17
U18
U19
V14
V15
V16
V17
W14
W15
W16
W17

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/11/01 2006/11/01

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

SB450/POWER/GND

Size Document Number Rev

B

HTW2E(LA-3201P) 1.0

Friday, April 21, 2006

Date: Sheet

of

18 46

5

+3VALW +3VS +3VALW +3VS +3VS +3VS +3VS +3VS +3VS +3VS

4

3

2

+3VS+3VS

1

12

R315

10K_0402_5%

AUTO_ON#15
AC_SDOUT16
RTC_CLK15

D D

SPDIF_OUT16
PCI_CLK3_R15
PCI_CLK4_R15
PCI_CLK5_R15
PCI_CLK6_R15
PCI_CLK7_R15
PCI_CLK8_R15
LPC_FRAME#15,27,29,30,33

12

10K_0402_5%@

12

10K_0402_5%

R329

R328

12

10K_0402_5%

R309

12

R321
10K_0402_5%@

12

R320

10K_0402_5%

12

R341

10K_0402_5%

12

R342
10K_0402_5%@

12

10K_0402_5%@

12

R355

R356
10K_0402_5%

12

12

R345
10K_0402_5%

R346
10K_0402_5%@

12

R351
10K_0402_5%@

12

R350

10K_0402_5%

12

12

R122
10K_0402_5%

R123
10K_0402_5%@

12

12

10K_0402_5%

R367
10K_0402_5%@

R366

12

R724

10K_0402_5%

PCI_CLK2_R15

12

R725
10K_0402_5%@

PCI_CLK2_R

12

R335

10K_0402_5%@

12

R334
10K_0402_5%

Selects type of 48MHz
clock pad

ACPWRON

AUTO_ON#

PULL

C C

REQUIRED STRAPS

HIGH

PULL
LOW

MANUAL
PWR ON

DEFAULT

AUTO
PWR
ON

+3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS

12

R142
10K_0402_5%

AC97_SDOUT SPDIF_OUT

USE
DEBUG
STRAPS

IGNORE
DEBUG
STRAPS

DEFAULT

12

R149
10K_0402_5%@

RTC_CLK

INTERNAL
RTC

DEFAULT

EXTERNAL
RTC (NOT
SUPPORTED
W/ IT8712 )

R127
10K_0402_5%@

12

12

R146
10K_0402_5%@

SIO 24MHz

SIO 48MHZ

DEFAULT

12

R373
10K_0402_5%@

CLK_PCI3

USB PHY
PWRDOWN
DISABLE

USB PHY
PWRDOWN
ENABLE

DEFAULT

12

R141
10K_0402_5%@

CLK_PCI_LAN

Internal PLL

External
Clock

12

R369
10K_0402_5%@

CLK_PCI_LPC

PCIE CM_SET
low

DEFAULT

PCIE CM_SET
HIGH

12

R381
10K_0402_5%@

12

R132
10K_0402_5%@

PCI_CLK6

CPU I/F = K8

CPU I/F = P4

DEFAULT

12

R138
10K_0402_5%@

PCI_CLK7

ROM TYPE
H,H = PCI ROM

H,L = LPC ROM I

L,H = LPC ROM II

L,L = FWH ROM

PCI_CLK8

PCI_CLK2_R

Crytsal Pad

Clock input buffer

DEFAULTDEFAULT

LFRAME#

THERMTIP#
ENABLE

THERMTIP#
DISENABLE

IDE_PDDACK#17

PCI_AD3115,20,21,23
PCI_AD3015,20,21,23
PCI_AD2915,20,21,23
PCI_AD2815,20,21,23
PCI_AD2715,20,21,23
PCI_AD2615,20,21,23

B B

Pop R634 when debug .

PCI_AD2515,20,21,23
PCI_AD2415,20,21,23
PCI_AD2315,20,21,23

12

R143
10K_0402_5%@

12

R148
10K_0402_5%@

12

R126
10K_0402_5%@

12

R147
10K_0402_5%@

12

R374
10K_0402_5%@

12

R140

10K_0402_5%

12

10K_0402_5%

R370

12

R380

10K_0402_5%

12

R131

10K_0402_5%

12

R139
10K_0402_5%@

DEBUG STRAPS

IDE_PDDACK#

PULL
HIGH

PULL

A A

5

LOW

USE
LONG
RESET

DEFAULT

USE
SHORT
RESET

PCI_AD31

Reserved

PCI_AD30

Reserved

4

PCI_AD29

PCI_AD28

Reserved R eserved

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PCI_AD27 PCI_AD26

BYPASS
PCI PLL

USE PCI
PLL

DEFAULT

BYPASS
ACPI
BCLK

USE
ACPI
BCLK

DEFAULT

2005/11/01 2006/11/01

3

PCI_AD25 PCI_AD24

BYPASS IDE
PLL

USE IDE
PLL

DEFAULT

USE EEPROM
PCIE STRAPS

USE DEFAULT
PCIE STRAPS

DEFAULT

Compal Secret Data

Deciphered Date

2

PCI_AD23

Reserved

Compal Electronics, Inc.

Title

HARDWARE TRAP

Size Document Number R ev

HTW2E(LA-3201P) 1.0

Custom

Friday, April 21, 2006

Date: Sheet

1

of

19 46

A

1 1

PCI_C/BE#015,21,23,24
PCI_C/BE#115,21,23,24

PCI_DEVSEL#15,21,23

CLK_PCI_LAN15

PM_CLKRUN#15 ,21,27,29

PCI_FRAME#15,21,23,24

PCI_TRDY#15,21,23
PCI_STOP#15,21,23
PCI_PERR#1 5,21,23

PCI_SERR#15,21

PCI_PIRQG#15

PCI_AD22

PCI_PAR15,21,23

PCI_IRDY#15,21,23

PCI_REQ#115
PCI_GNT#115

LAN_PME#23,29

PCIRST#1 5 ,2 1 , 23 ,24,27,29,30,33

PCI_C/BE#215,21,23,24
PCI_C/BE#315,21,23,24

22P_0402_50V8J@

10_0402_5% @

1 2

R238

PCI_PIRQG#

R235

C433

100_0402_5%

1 2
1

2

2 2

3 3

4 4

PCI_AD[0..31]15,19,21,23,24

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

B

PCI_AD[0..31]

U20

104

AD0

103

AD1

102

AD2

98

AD3

97

AD4

96

AD5

95

AD6

93

AD7

90

AD8

89

AD9

87

AD10

86

AD11

85

AD12

83

AD13

82

AD14

79

AD15

59

AD16

58

AD17

57

AD18

55

AD19

53

AD20

50

AD21

49

AD22

47

AD23

43

AD24

42

AD25

40

AD26

39

AD27

37

AD28

36

AD29

34

AD30

33

AD31

92
77
60
44

46
76

61
63
67
68
69

70
75

30
29

25
31
27
28

65

4

17

128

21
38
51
66
81

91
101
119

35

52

80
100

PCI I/F

C/BE#0
C/BE#1
C/BE#2
C/BE#3

IDSEL
PAR

FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#

PERR#
SERR#

REQ#
GNT#

INTA#
PME#
RST#
CLK

CLKRUN#

GND/VSS
GND/VSS
GND/VSS

GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST

GND
GND
GND
GND

RTL8100CL_LQFP128

AVDD33/AVDDL
AVDD33/AVDDL
AVDD33/AVDDL

AVDD25/HSDAC-

C

108

EEDO

109

AUX/EEDI

111

EESK

106

EECS

117

LED0

115

LED1

114

LED2

113

NC/LED3

NC/MDI2+

NC/MDI2-

NC/MDI3+

NC/MDI3-

LWAKE

ISOLATE#

RTSET

NC/M66EN

NC/HV

GND
GND

NC/LV2

NC/VSS
NC/VSS

NC/GND
NC/GND
NC/GND
NC/GND
NC/GND
NC/GND

CTRL25

VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33

NC/AVDDL

NC/VDD18
NC/VDD18
NC/VDD18
NC/VDD18
NC/VDD18

1
2
5
6

14
15
18
19

121

X1

122

X2

105
23
127
72
74

88
10

120
11

123
124
126

9
13

22
48
62
73
112
118

8
125
26

41
56
71
84
94
107

3
7
20
16

32
54
78
99

24
45
64
110
116

12

20mil

0.1U_0402_16V4Z

TXD+/MDI0+

TXD-/MDI0-

RXIN+/MDI1+

RXIN-/MDI1-

NC/SMBCLK

NC/SMBDATA

NC/AVDDH

NC/HSDAC+

LAN I/F

RTT3/CRTL18

VDD25/VDD18
VDD25/VDD18
VDD25/VDD18
VDD25/VDD18

Power

D

R215 3.6K_0402_5%

EEDO
EEDI
EESK
EECS

ACTIVITY#
LINK_10_100#

LAN_TD+
LAN_TD­LAN_RD+
LAN_RD-

LAN_X1
LAN_X2

10mil
10mil

C39

R233

12
12

R221

+LAN_DVDD CTRL25

CTRL25

+3VALW

+LAN_AVDDL

40mil

1

C428

0.1U_0402_16V4Z

2

+LAN_DVDD

40mil

2

C421

0.1U_0402_16V4Z

1

+2.5V_LAN_VDD

1

1

C38

2

2

0.1U_0402_16V4Z

12

15K_0402_5%

5.6K_0603_1%

CHB2012U170_0805

12

U4

4

DO

3

DI

2

SK

1

CS

AT93C46-10SI-2.7_SO8

R2311K_0402_5%

27P_0402_50V8J

1

C425

0.1U_0402_16V4Z

2

2

C431

0.1U_0402_16V4Z

1

L9

GND

NC
NC

VCC

+3VS

10U_0805_10V4Z

LAN_X1

1

C416

2

12

+3VALW

5
6
7
8

+3VALW

31

E

2

B

C

1

C34

2

Y2

25MHZ_20P

1 2

KC FBM-L11-201209-221LMAT_0805

1

C423

0.1U_0402_16V4Z

2

1 2

KC FBM-L11-201209-221LMAT_0805

2

C440

0.1U_0402_16V4Z

1

2

1

C17

0.1U_0402_16V4Z

Q8

2SB1197K_SOT23

40mil

1

C35

0.1U_0402_16V4Z

2

LAN_X2

12

L32

L31

+2.5V_LAN

E

+3VALW

+2.5V_LAN

2

C415
27P_0402_50V8J

1

F

+3VALW

LINK_10_100#

ACTIVITY#

RJ45_RX-

RJ45_RX+
RJ45_TX­RJ45_TX+

R203

1 2

300_0402_5%

+3VALW

75_0402_5%

G

1 2

R200 300_0402_5%

12

R201

10mil

Termination plane should be coupled to chassis ground

Layout Note
TS6121 pls close to
conn.

LAN_TD+ RJ45_TX+
LAN_TD-

12

12

1

C412

0.1U_0402_16V4Z

2

C419

R211

49.9_0402_1%

49.9_0402_1%

0.1U_0402_16V4Z

1

2

C426

1

2

0.1U_0402_16V4Z

R212

C442

R210

49.9_0402_1%

+3VALW

Closed to RTL8100CL Closed to RTL8100CL

+2.5V_LAN

+3VALW

1

2

0.1U_0402_16V4Z

LAN_RD+ RJ45_RX+
LAN_RD-

12

12

R213

49.9_0402_1%

1

C413

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1

2

C424

1

C441

2

0.1U_0402_16V4Z

12
11

8
7
6
5
4
3
2
1

10

9

10mil

12

R202
75_0402_5%

C391

1 2

1000P_1206_2KV7K

U18

1

TD+

3

TD-

2

CT

4

NC

5

NC

7

CT

6

RD+
RD-8RX-

0.5u_TS6121C

1

C14

0.1U_0402_16V4Z

2

1

C434

0.1U_0402_16V4Z

2

JP12

Amber LED+
Amber LED­PR4­PR4+
PR2­PR3­PR3+
PR2+
PR1­PR1+
Green LED­Green LED+

TYCO_3-440470-4

0.1U_0402_16V4Z

1

2

16

TX+

14

TX-

15

CT

13

NC

12

NC

10

CT

11

RX+

9

75_0402_5%

C1

R5

H

SHLD2
SHLD1

SHLD2
SHLD1

1

2

12

16
15

14
13

LANGNDRJ45_PR

C2

4.7U_0805_10V4Z

RJ45_TX-

RJ45_RX-

12

R6
75_0402_5%

RJ45_PR

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2005/11/01 2006/11/01

Compal Secret Data

Deciphered Date

E

Compal Electronics, Inc.

Title

RTL8100CL

Size Document Number Rev

HTW2E(LA-3201P) 1.0

B

Friday, April 21, 2006

F

Date: Sheet

G

20 46

of

H

5

VPPD022

VPPD122
VCCD0#22
VCCD1#22

U29

PCI_AD[0..31]15,19,20,23,24

D D

CLK_PCI_CB

12

R407
10_0402_5%@

1

C612
18P_0402_50V8K@

IDSEL:
PCI_AD20

2

PCI_C/BE#315,20,23,24
PCI_C/BE#215,20,23,24
PCI_C/BE#115,20,23,24
PCI_C/BE#015,20,23,24

PCIRST#1 5 ,2 0 , 23 ,24,27,29,30,33

PCI_FRAME#15,20,23,24

PCI_IRDY#15,20,23

PCI_TRDY#15,20,23

PCI_DEVSEL#15,20,23

PCI_STOP#15,20,23
PCI_PERR#15 ,20,23

PCI_SERR#15,20

PCI_PAR15,20,23
PCI_REQ#215
PCI_GNT#215

CLK_PCI_CB15

+3VS

PCI_PIRQB#15

SERIRQ15,27,29,30,33

PM_CLKRUN#15 ,20,27,29

R159 10K_0402_5%
R406 100_0402_5%

PCI_PIRQB#

C C

B B

PCI_AD[0..31]

PCI_AD31

C2

N10
N11

M11

M10

C1
D4
D2
D1
E4
E3
E2
F2

F1
G2
G3

H3

H4

J1
J2

N2
M3

N3

K4
M4

K5

L5
M5

K6
M6

N6
M7

N7

L7

K7

N8

E1

J3
N1
N5

G4

J4
K1
K3
L1
L2
L3

M1
M2

A1
B1
H1

L8

L11

F4
K8

N9
K9

L10

J9

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

CBE3#
CBE2#
CBE1#
CBE0#

PCIRST#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
PAR
PCIREQ#
PCIGNT#
PCICLK

RIOUT#_PME#
SUSPEND#

IDSEL
MFUNC0

MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6
MFUNC7

GRST#

PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

PCIRST#

CLK_PCI_CB A16_CLK

3V_PCM_SUSP

1 2
1 2

PCM_IDPCI_AD20

1 2
1 2

1 2

1 2

R161 0_0402_5%

PCIRST#

R17410K_0402_5%@
R17110K_0402_5%@

R16810K_0402_5%@

M13

VCCD1#

N13

VCCD0#

4

M12

3

+S1_VCC
+3VS

G13

A7

B4

C8

N12

VPPD0

VPPD1

VCCA2

D12

VCC9

VCC10

VCCA1

PCI Interface

CSTSCHG/BVD1_STSCHG#

G1

K2

N4

F3

L6

L9

H11

VCC2

VCC3

VCC4

VCC1

VCC5

VCC6

VCC7

VCC8

CAD31/D10

CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6

CAD19/A25

CAD18/A7
CAD17/A24
CAD16/A17

CAD15/IOWR#

CAD14/A9

CAD13/IORD#

CAD12/A11

CAD11/OE#

CAD10/CE2#

CAD9/A10

CAD8/D15

CAD7/D7

CAD6/D13

CAD5/D6

CAD4/D12

CAD3/D5

CAD2/D11

CAD1/D4
CAD0/D3

CCBE3#/REG#

CCBE2#/A12

CCBE1#/A8

CCBE0#/CE1#

CARDBUS

CRST#/RESET
CFRAME#/A23

CIRDY#/A15

CTRDY#/A22

CDEVSEL#/A21

CSTOP#/A20
CPERR#/A14

CSERR#/WAIT#

CPAR/A13

CREQ#/INPACK#

CGNT#/WE#

CCLK/A16

CCLKRUN#/WP_IOIS16#

CBLOCK#/A19

CINT#/READY_IREQ#

SPKROUT

CAUDIO/BVD2_SPKR#

CCD2#/CD2#
CCD1#/CD1#

CVS2/VS2#

CVS1/VS1

CRSV3/D2

CRSV2/A18
CRSV1/D14

B2
C3
B3
A3
C4
A6
D7
C7
A8
D8
A9
C9
A10
B10
D10
E12
F10
E13
F13
F11
G10
G11
G12
H12
H10
J11
J12
K13
J10
K10
K12
L13

B7
A11
E11
H13

B9
B11
A12
A13
B13
C12
C13
A5
D13
B8
C11
B12

C5
D5

D11
D6
M9

B5
A4

L12
D9
C6
A2
E10
J13

S1_A[0..25]
S1_D[0..15]

S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3

S1_REG#
S1_A12
S1_A8
S1_CE1#

S1_RST
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A14
S1_WAIT#
S1_A13
S1_INPACK#
S1_WE#

S1_BVD1
S1_WP

S1_A19
S1_RDY#
PCM_SPK#

S1_BVD2
S1_CD2#

S1_CD1#
S1_VS2
S1_VS1
S1_D2
S1_A18
S1_D14

S1_A[0..25] 22
S1_D[0..15] 22

S1_IOWR# 22
S1_IORD# 22
S1_OE# 22

S1_CE2# 22

S1_REG# 22

S1_CE1# 22
S1_RST 22

S1_WAIT# 22
S1_INPACK# 22

S1_WE# 22

1 2

R160 33_0402_5%

S1_A16

S1_BVD1 22
S1_WP 22

S1_RDY# 22
PCM_SPK# 26

S1_BVD2 22
S1_CD2# 22

S1_CD1# 22
S1_VS2 22
S1_VS1 22

+3VS

1

2

+3VS

1

2

+S1_VCC

1

2

C345

0.1U_0402_16V4Z

C343

0.1U_0402_16V4Z

C351

0.1U_0402_16V4Z

2

1

C355

0.1U_0402_16V4Z

2

1

C347

0.1U_0402_16V4Z

2

1

C334

0.1U_0402_16V4Z

2

S1_CD1# S1_CD2#

10P_0402_50V8J

C336

1

2

1

2

1

2

1

2

Close chip termenal

+S1_VCC

12

R180
43K_0402_5%@

S1_WP

C348

0.1U_0402_16V4Z

C359

0.1U_0402_16V4Z

C340

0.1U_0402_16V4Z

10P_0402_50V8J

Closed to Pin A4Closed to Pin L12

2

C354

0.1U_0402_16V4Z

1

1

C358

0.1U_0402_16V4Z

2

1

C349

0.1U_0402_16V4Z

2

1

C357

2

1

GND1D3GND2H2GND3L4GND4M8GND5

GND6

GND7

GND8

PCI1410AGGU_PBGA144

B6

F12

K11

C10

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/11/01 2006/11/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

ENE-CB1410

Size Document Number Rev

HTW2E(LA-3201P) 1.0

B

Friday, April 21, 2006

2

Date: Sheet

1

21 46

of

5

4

3

2

1

PCMCIA Power Controller

U10

9

D D

+5VS

12V

W=40mil

1

C335

10U_0805_10V4Z

10U_0805_10V4Z

C C

2

C329

C325

0.1U_0402_16V4Z

1

2

1

1

C331

0.1U_0402_16V4Z

2

2

W=40mil

1

C326

2

0.1U_0402_16V4Z

+3VS

5
6

3
4

12

R135
10K_0402_5%

5V
5V

3.3V

3.3V

VCC
VCC
VCC

VPP

VCCD0
VCCD1

VPPD0
VPPD1

OC

GND

SHDN

TPS2211AIDBR_SSOP16

7

16

40mil

13
12
11

10

1
2
15
14

8

+S1_VCC

VCCD0#
VCCD1#
VPPD0
VPPD1

1

C303

4.7U_0805_10V4Z

2

+S1_VPP

40mil

1

C304

0.1U_0402_16V4Z

2

VCCD0# 21

VCCD1# 21
VPPD0 21
VPPD1 21

C317

0.1U_0402_16V4Z

+S1_VPP+S1_VCC

C321

0.1U_0402_16V4Z

CardBus Socket

1

C316

0.1U_0402_16V4Z

2

1

0.01U_0402_25V4Z

2

S1_A[0..25]
S1_D[0..15]

+S1_VCC

C319

+S1_VPP

C323

Reserve for Debug.

S1_WP

1

2

1

2

S1_OE#
S1_RST
S1_CE1#
S1_CE2#

12

R17343K_0402_5%

12

R33247K_0402_5%

12

R15347K_0402_5%

12

R31647K_0402_5%

12

R32447K_0402_5%

+S1_VCC

S1_A[0..25]21

S1_D[0..15]21

Close to
CardBus Conn.

10U_0805_10V4Z

B B

C320

4.7U_0805_10V4Z

S1_A[0..25]21

S1_D[0..15]21

CardBus Socket

JP7

69

GND

70

GND

SANTA_130606-1_LT

GND
GND

DATA3

CD1#

DATA4

DATA11

DATA5

DATA12

DATA6

DATA13

DATA7

DATA14

CE1#

DATA15

ADD10

CE2#

OE#

VS1#

ADD11

IORD#

ADD9

IOWR#

ADD8
ADD17
ADD13
ADD18
ADD14
ADD19

WE#
ADD20
READY
ADD21

VCC
VCC
VPP

VPP
ADD16
ADD22
ADD15
ADD23
ADD12
ADD24

ADD7

ADD25

ADD6

VS2#

ADD5

RESET

ADD4

WAIT#

ADD3

INPACK#

ADD2
REG#
ADD1
BVD2
ADD0

BVD1
DATA0
DATA8
DATA1
DATA9
DATA2

DATA10

CD2#

GND
GND

1
35
2
36
3
37
4
38
5
39
6
40
7
41
8
42
9
43
10
44
11
45
12
46
13
47
14
48
15
49
16
50
17
51
18
52
19
53
20
54
21
55
22
56
23
57
24
58
25
59
26
60
27
61
28
62
29
63
30
64
31
65
32
66
33

WP

67
34
68

S1_D[0..15]

S1_D3

S1_CD1#

S1_D4

S1_D11

S1_D5

S1_D12

S1_D6

S1_D13

S1_D7

S1_D14

S1_CE1#

S1_D15

S1_A10
S1_CE2#
S1_OE#

S1_VS1

S1_A11

S1_IORD#

S1_A9

S1_IOWR#

S1_A8

S1_A17

S1_A13

S1_A18

S1_A14

S1_A19

S1_WE#

S1_A20

S1_RDY#

S1_A21

S1_A16

S1_A22

S1_A15

S1_A23

S1_A12

S1_A24

S1_A7

S1_A25

S1_A6

S1_VS2

S1_A5

S1_RST

S1_A4

S1_WAIT#

S1_A3

S1_INPACK#

S1_A2

S1_REG#

S1_A1

S1_BVD2

S1_A0

S1_BVD1

S1_D0

S1_D8

S1_D1

S1_D9

S1_D2

S1_D10

S1_WP

S1_CD2#

S1_A[0..25]

+S1_VCC
+S1_VPP

+S1_VCC +S1_VPP

C318

0.1U_0402_16V4Z

S1_CD1# 21

S1_CE1# 21

S1_CE2# 21
S1_OE# 21
S1_VS1 21

S1_IORD# 21
S1_IOWR# 21

S1_WE# 21
S1_RDY# 21

S1_VS2 21
S1_RST 21
S1_WAIT# 21
S1_INPACK# 21
S1_REG# 21
S1_BVD2 21
S1_BVD1 21

S1_WP 21
S1_CD2# 21

C322

0.1U_0402_16V4Z

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/11/01 2006/11/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

CARD BUS SOCKET

Size Document Number Rev

HTW2E(LA-3201P) 1.0

B

Friday, April 21, 2006

2

Date: Sheet

1

22 46

of

5

4

3

2

1

+2.5VS_1394

U34

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7

PCI I/F

AD6
AD5
AD4
AD3
AD2
AD1
AD0
CBE3#
CBE2#
CBE1#
CBE0#
STOP#
PERR#
PAR
INTA#
PCIRST#
PCICLK
GNT#
REQ#
IDSEL
PME#
IRDY#
TRDY#
DEVSEL#
FRAME#

GNDATX166GNDARX165GNDATX280GNDARX279GND19

+2.5VS_1394

1

C789

0.1U_0402_16V4Z

2

1394@

+3VS

111

122

110

VDD446VDD330VDD221VDD1

VCC699VCC536VCC417VCC35VCC2

VCC1

VT6311S

EEPROM

others

OSCILLATOR

PHY PORT0

PHY PORT1

GND18

GND17

GND16

GND1591GND1061GND956GND847GND738GND633GND531GND423GND322GND26GND113GND0

118

112

108

100

1

C790

0.1U_0402_16V4Z

2

1394@

+1394_PLLVDD

59

PVA587PVA486PVA373PVA272PVA162PVA0

SDA/EEDI

SCL/EECK

PHYRST#

REG_OUT

XTPBIAS0

XTPBIAS1

30mils

EECS
EEDO

BJT_CTL

I2CEN

PWRDET

REG_FB

XCPS

XREXT

XTPB0M

XTPB0P

XTPA0M

XTPA0P

XTPB1M

XTPB1P

XTPA1M

XTPA1P

NC17
NC16
NC15
NC14
NC13
NC12
NC11
NC10

NC9
NC8
NC7
NC6
NC5
NC4
NC3
NC2
NC1
NC0

1394@

126

XI

XO

1

C791

0.1U_0402_16V4Z

2

1394@

EECS

26
27

EEDI

28

EECK

29
55

81

I2CEEN

43
32

REG_FB

84

REG_OUT

85
60

XREXT

63

10mils

1394_XI

57

1394_XO

58

TPB0-

67

TPB0+

68

TPA0-

69

TPA0+

70

TPBIAS0

71
74

75
76
77
78

83
82
64
54
53
52
51
50
49
48
45
44
42
41
40
39
37
35

VT6311S_LQFP128

1

C792

0.1U_0402_16V4Z

2

1394@

0.1U_0402_16V4Z1394@

1

C793

2

0.1U_0402_16V4Z1394@

C797 1U_0402_6.3V4Z1394@
R765 4.7K_0402_5%@
R766 4.7K_0402_5%@
R767 4.7K_0402_5%1394@

C798 0.1U_0402_16V4Z1394@

R768 1K_0402_5%1394@
R769 6.19K_0603_1%1394@

C800 47P_0402_50V8J1394@

1

C794

2

R764

1 2

4.7K_0402_5%1394@

1 2
1 2
1 2
1 2

1 2

1 2
1 2

1 2

TPBIAS0
TPA0+
TPA0­TPB0+
TPB0-

1

2

0.1U_0402_16V4Z1394@

1

C795

2

C806
10U_0805_10V4Z

1394@

1

C796

2

1 2

10U_0805_10V4Z1394@

+3VS

15mils

12

R771

54.9_0402_1%

1394@

12

R773

54.9_0402_1%

1394@

1

C803
270P_0402_50V7K

1394@

2

+3VS

U33

1

A0

2

A1

3

A2

4

GND

AT24C02N-10SU-2.7_SO8@

EECK and EEDI is pull high internal

L44

MBK1608301YZF_06031394@

+3VS

+3VS

C799

10P_0402_50V8K1394@

1 2

Y6

1394@

24.576MHZ_16P_X8A024576FG1H

1 2

1 2

C801

10P_0402_50V8K1394@

12

R772

54.9_0402_1%

1394@

12

R774

54.9_0402_1%1394@

12

R775

D40

4.99K_0402_1%1394@

1

C802

0.33U_0603_10V7K1394@

2

2

1

PSOT24C_SOT23@

External pull high circuit is unnecessary

When use external EEPROM
Populate U33, R763, R766
Un-populate R764

REG_OUT

REG_FB

3

2

3

1

PSOT24C_SOT23@

D41

WCM2012F2S-900T04_08051394@

4

1

1

4

WCM2012F2S-900T04_08051394@

VCC

WP
SCL
SDA

40mil

4

1

1

4

8
7

EECK

6

EEDI

5

+3VS

31

E

Q58

2

B

L48

L49

2SB1197K_SOT23@

C

+2.5VS_1394

When use external BJT
Populate Q58, R765

3

3

2

2

2

2

3

3

12

R763

510_0402_5%@

JP22

4

4

3

6

3

G

2

5

2

G

1

1

TYCO_1470383-21394@

+3VS

1

C785

0.1U_0402_16V4Z

2

1394@

D D

C C

1

C786

0.1U_0402_16V4Z

2

1394@

PCI_AD[0..31]15,19,20,21,24

1

2

PCI_AD[0..31]

C787

0.1U_0402_16V4Z

1394@

1

C788

0.1U_0402_16V4Z

2

1394@

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10

IDSEL:PCI_AD16

PCI_AD16 1394_IDSEL

1 2

R770 100_0402_5%1394@

PCI_C/BE#315,20,21,24
PCI_C/BE#215,20,21,24
PCI_C/BE#115,20,21,24
PCI_C/BE#015,20,21,24

PCI_STOP#15,20,21

PCI_PERR#1 5,20,21

B B

1394_PME#20,29

PCI_PAR15,20,21

PCI_PIRQA#15

PCIRST#15,20,21,24,27,29,30,33

CLK_PCI_139415

PCI_GNT#015

PCI_REQ#015

R778 0_0402_5%@

1 2

PCI_IRDY#15,20,21

PCI_TRDY#15,20,21

PCI_DEVSEL#15,20,21

PCI_FRAME#15,20,21,24

CLK_PCI_1394

CLK_PCI_1394

PCI_DEVSEL#

12

R776

10_0402_5%@

1

C804

10P_0402_50V8K@

2

PCI_STOP#
PCI_PERR#
PCI_PAR
PCI_PIRQA#

PCI_GNT#0
PCI_REQ#0
1394_IDSEL

PCI_IRDY#
PCI_TRDY#

PCI_FRAME#

PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

1

C805

1394@

2

10U_0805_10V4Z

94
95
96
97

98
101
102
103
106
107
109
113
114
115
116
117

2
3
4
7
8

9
10
11
14
15
16
18
19
20
24
25

104
119

1
12

125
127
128

88
89
90
92
93

105

34

121
123
124
120

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/11/01 2006/11/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

IEEE1394 VIA VT6311S

Size Document Number Rev

HTW2E(LA-3201P) 1.0

B

Friday, April 21, 2006

2

Date: Sheet

1

23 46

of

+3VS +1.5VS +3VALW

1

C754

WLAN@

0.01U_0402_16V7K

+3VALW

MINI_WAKE#29

MINI_CLKREQ#12

CLK_PCIE_MCARD#12

CLK_PCIE_MCARD12

PCIE_W L AN_ C_RX_N17
PCIE_WLAN_C_RX_P17

PCIE_WLAN_C_TX_P17

MINI_CLKREQ#
CLK_PCIE_MCARD#

CLK_PCIE_MCARD

PCIE_W LAN_C_RX_N1
PCIE_WLAN_C_RX_P1

PCIE_WLAN_C_TX_N1
PCIE_WLAN_C_TX_P1

0.1U_0402_16V4Z

2

R757

10K_0402_5%WLAN@

MINI_WAKE#

C755

WLAN@

12

WL_OFF#29
KILL_SW#29,31

1

4.7U_0805_10V4Z

2

C756

WLAN@

1
2

TC7SH08FU_SSOP5WLAN@

1
3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

53

+3VALW

5

B
A

3

JP33

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

GND1

FOX_AS0B226-S40N-7F~DWLAN@

1

0.01U_0402_16V7K

2

C126

12

0.1U_0402_16V4ZWLAN@

U30

P

4

Y

G

GND2

2
4
6

8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

WLAN@

D30

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

54

C757

CH751H-40_SC76WLAN@

1

0.1U_0402_16V4Z

2

XMIT_OFF#

21

XMIT_OFF#

USBP1­USBP1+

1

C758

WLAN@

2

PCIRST#

+3VALW

SB_SMCLK 10,11,12,16
SB_SMDATA 10,11,12,16PCIE_WLAN_C_TX_N17

4.7U_0805_10V4Z

USBP1- 16

USBP1+ 16

C759

WLAN@

1

2

C760

WLAN@

0.1U_0402_16V4Z

+1.5VS +3VS

1

2

Port 80 Debug Card Connector

**

PCI_C/BE#015,20,21,23
PCI_AD615,20,21,23
PCI_AD415,20,21,23
PCI_AD215,20,21,23
PCI_AD015,20,21,23
PCI_AD115,20,21,23
PCI_AD315,20,21,23
PCI_AD515,20,21,23
PCI_AD715,20,21,23
PCI_AD815,20,21,23
PCI_C/BE#115,20,21,23
PCI_C/BE#215,20,21,23
PCI_C/BE#315,20,21,23

CLK_PCI_MINI15

+5VS
PCIRST#15,20,21,23,27,29,30,33
PCI_FRAME#15,20,21,23

PCI_AD915,20,21,23

PCI_C/BE#0

PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0
PCI_AD1
PCI_AD3
PCI_AD5
PCI_AD7

PCI_AD8
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

CLK_PCI_MINI

PCIRST#

PCI_FRAME#

PCI_AD9

JP29

20

20

19

19

18

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

ACES_85201-2005@

Place under MiniPCI Socket

Mini-Express Card

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/11/01 2006/11/01

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

MINI PCI SLOT

Size Document Number Rev

HTW2E(LA-3201P) 1.0

B

Friday, April 21, 2006

Date: Sheet

of

24 46

5

Adjustable Output

U14

4

VIN

2

SENSE or ADJ

DELAY

C362

40mil

C762

12

C775

ERROR7CNOISE

8

SD

SI9182DH-AD_MSOP8

+AVDD_HD

1

C849
100P_0402_50V8J

2

38

U38

AVDD125AVDD2

14

LINE2_L

15

LINE2_R

16

MIC2_L

17

MIC2_R

23

LINE1_L

24

LINE1_R

18

CD_L

20

CD_R

19

CD_GND

21

MIC1_L

22

MIC1_R

12

PCBEEP

11

RESET#

10

SYNC

5

SDATA_OUT

2

GPIO0

3

GPIO1

13

SENSE A

34

SENSE B

47

EAPD

48

SPDIFO

4

DVSS1

7

DVSS2

ALC861-GR REV D_LQFP48

2

C819
1000P_0402_50V7K

1

1 2

2

1

C369

4.7U_0805_10V4Z

0.1U_0402_16V4Z

D D

R728 0_0402_5%@

SUSP#29,30,34,39,40

SYSON29,31,34

L28

+VDDA

C C

B B

To EC, Reserve for ALC861D

A A

1 2

FBM-L11-160808-800LMT_0603

10U_1206_16V4Z

680P_0402_50V7K

AMP_LEFT_HP26
AMP_RIGHT_HP26

MIC1_L26
MIC1_R26

AZ_RST_HD#16
AZ_SYNC_HD16
AZ_SDOUT_HD16

100K_0402_5%

MIC_SENSE26

100K_0402_5%

NBA_PLUG26,29

C389

AMP_LEFT_HP
AMP_RIGHT_HP

MIC1_L

MONO_IN26

EAPD29

R786

R777

5

1 2
1 2

R729 0_0402_5%

680P_0402_50V7K

1

1

C388

2

2

100P_0402_50V8J
C850

C851

1U_0402_6.3V4Z

1 2
1 2

1 2
1 2

MONO_IN

EAPD

R825

C863

13

D

2

G

S

13

D

2

G

Q57

S

12
12

1 2
1 2

12

Q59

39.2K_0603_1%

R819 0_0402_5%@
R820 0_0402_5%@

C852100P_0402_50V8J

C616 1U_0402_6.3V4Z
C619 1U_0402_6.3V4Z

C853 100P_0402_50V8J

0_0402_5%

47P_0402_50V8J

+5VS

12

+5VS

12

2N7002_SOT23

1

2

MIC1_C_L
MIC1_C_RMIC1_R

SENSE_A
SENSE_B

DGND

R785

1 2

20K_0402_1%

2N7002_SOT23

R740

1000P_0402_50V7K

4

VOUT

GND

FRONT_OUT_L

FRONT_OUT_R

SURR_OUT_L

SURR_OUT_R

SIDESURR_OUT_L

SIDESURR_OUT_R

CEN_OUT

SDATA_IN

LINE2_VREFO
MIC1_VREFO_L
MIC1_VREFO_R

MIC2_VREFO

R788

12

47_0402_5%

R739

47_0402_5%

4

+VDDA+5VALW

5
6
1
3

20mil

DVDD11DVDD2

LFE_OUT

BIT_CLK

VREF

JDREF

AVSS1
AVSS2

C606 0.1U_0402_16V4Z

9

35
36
39
41
45
46
43
44

6

8
37

NC

29

NC

31
28
32
30
27
40
33

NC

26
42

1

C848

2

100P_0402_50V8J

AMP_LEFT
AMP_RIGHT

10mil
10mil

10mil

+VDDA

R405

69.8K_0603_1%

1 2

12

R404
24K _0402_1%

+3V_DVDD

680P_0402_50V7K

1

C632

2

680P_0402_50V7K

1000P_0402_50V7K

@

R436
0_0402_5%@

C630 27P_0402_50V8J

R426 33_0402_5%

1 2

+MIC1_VREFO_L
+MIC1_VREFO_R

12

R707

5.1K_0402_1%

L45
FBM-L11-160808-800LMT_0603

1

1

C383

C761
10U_1206_16V4Z

2

2

1

C635

2

12

1 2

C765 10U_0805_10V4Z

1 2
1 2

C855 100P_0402_50V8J

4.75v

C367 4.7U_0805_10V4Z

1 2

1

@

2

AGND

Change R707 from 5.1Kto 20K_0402_1%

SENSE_A

Change R788 to 0_0402_5%
Delete C819
for ALC861 ver. D

Change R739 to 0_0402_5%

SENSE_B

Delete C775
for ALC861 ver. D

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

C634
1000P_0402_50V7K

AZ_BITCLK_HD 16

AZ_SDIN3_HD 16

2005/11/01 2006/11/01

3

HD Audio Codec

EC_EAPD26,29

+3VS

AMP_LEFT 26
AMP_RIGHT 26

AMP_RIGHT_HP
AMP_LEFT_HP

R807

1 2

499_0402_1%@

R808

1 2

499_0402_1%@

1K_0402_1%@

Sense Pin Impedance Codec Signals

39.2K

SENSE A

SENSE B

Compal Secret Data

20K
10K

5.1K

39.2K
20K
10K

5.1K

Deciphered Date

2

EC_EAPD

2

G

C835

1 2

C836

1 2

R809

R810

1K_0402_1%@

1 2

1 2

2/3 V/V

PORT-A (PIN 39, 41)
PORT-B (PIN 21, 22)
PORT-C (PIN 23, 24)
PORT-D (PIN 35, 36)
PORT-E (PIN 14, 15)
PORT-F (PIN 16, 17)
PORT-G (PIN 43, 44)
PORT-H (PIN 45, 46)

2

1

Headphone AMP

+3VHP

+3VS

12

R803

100K_0402_5%@

13

D

Q63

S

2N7002_SOT23@

4.7U_0603_6.3V6M@

4.7U_0603_6.3V6M@

2

C837

1

1U_0603_10V6K@

U37

14

SHDNR#

18

SHDNL#

15

INR

13

INL

1

C1P

3

C1N

C854

100P_0402_50V8J

C856

100P_0402_50V8J

19

PVDD

PVss

5

7

PVSS

2

C838

1

2

1

2

1

0.1U_0402_16V4Z

SVss

10

SVDD

PGND

2

1U_0603_10V6K@

C763

17

C363

0.1U_0402_16V4Z

DGND To AGND Bypass

1 2

0_0603_5%

1 2

0_0603_5%

1 2

0_0603_5%

DGND

Compal Electronics, Inc.

Title

AC97 CODEC ALC250D

Size Document Number Rev

HTW2E(LA-3201P) 1.0

B

Friday, April 21, 2006

Date: Sheet of

SGND

OUTR

NC-12
NC-16
NC-20

R198

R187

R441

1 2

BLM18AG601SN1D_0603@

2

C834

1U_0603_10V6K@

1

OUTL

NC-4
NC-6
NC-8

MAX4411ETP-T_TQFN20~D@

+MIC1_VREFO_L

C764

4.7U_0805_10V4Z

1

L47

HP_R

11

HP_L

9

4
6
8
12
16
20

+MIC1_VREFO_R

C365

4.7U_0805_10V4Z

AGND

25 46

+3VS

HP_R 26
HP_L 26

A

R755

C380

1

2

12

4 4

C783 1U_0402_6.3V4Z

AMP_LEFT25

AMP_RIGHT25

1 2

C784 1U_0402_6.3V4Z

1 2

1.5K_0402_5%

C356

1

10U_0805_10V4Z

22U_0805_6.3V6M

2

0_0402_5%

1 2

C360 1U_0402_6.3V4Z

1 2

C613 1U_0402_6.3V4Z

R756

1.5K_0402_5%

2.2U_0603_6.3V6K

12

R402

C617

1

0.1U_0402_16V4Z

2

12

C364

B

+5VS

VOL_AMP
VOLMAX
NBA_PLUG

1

2

BYPASS

U15

10

VDD

15

SHUTDOWN#

VDD

7

VOLUME

8

VOLMAX

13

SE/BTL#

6

LIN-

3

RIN-

4

BYPASS

APA2068KAI-TRL_SOP16

MUTE

LOUT­ROUT­LOUT+

ROUT+

GND
GND

C

Gain Setting

DB VOL AMP

SPK

EC_EAPD

1
2

9
16
11
14

5
12

R190

100K_0402_5%

SPKL­SPKR­SPKL+
SPKR+

12

EC_EAPD 25,29

+5VS

W=30mil

1000.66-3.7

HP

D

1.25-3.9

+5VS

100K_0402_5%

NBA_PLUG

Q67

2N7002_SOT23

R815

3.9K_0402_5%

5

+5VS

12

R818

13

D

2

G

S

2

12

G

4

1

9

2
8

VR1

3

R816

4.3K_0402_5%

1 2
13

D

Q66
2N7002_SOT23

S

E

2

C847

0.1U_0402_16V4Z@

1

VOL_AMP

0.01W_10KC_EVUTWRB49C14

R817

4.3K_0402_5%

1 2

3 3

NSE_DPR1

13

D

Q64

R811

12

MONO_IN 25

AMP_RIGHT_HP25

AMP_LEFT_HP25

2

G

2N7002_SOT23

S

C

Q65

2

B

MMBT3904_SOT23

E

3 1

MIC1_R25
MIC1_L25

Microsoft Audio Hardware Design, Section "Analog
Audio Classification Using Devi ce Impedance"
recommand Audio Device Impedance:

Headset : 32 ~100Ohm (C > 248UF)
Paassive Speakers: 4 ~ 16Ohm (C >1989UF)
Active Speakers: 3K ~ 15K Ohm (C >2.65UF)

HP_R25

SPKR+

R821 0_0402_5%

AMP_RIGHT_HP
AMP_LEFT_HP

SPKL+

R822 0_0402_5%

HP_L25

MIC1_R
MIC1_L

12

12

L50

1 2

FBM-11-160808-700T_0603

L51

1 2

FBM-11-160808-700T_0603

+

1 2

C841 150U_D2_6.3VM

1 2

C842 150U_D2_6.3VM

HP_R

+

HP_L

4.7K_0402_5%

220P_0402_50V7K

L52

FBM-11-160808-700T_0603

L53

FBM-11-160808-700T_0603

NSE_DPR29

EC Beep

BEEP#29

1 2

C385

1U_0402_6.3V4Z

1 2

R197

560_0402_5%

CardBus Beep

C387

NSE_DPR1

1 2

PCM_SPK#21

2 2

0.01U_0402_16V7K

C390

2

1U_0402_6.3V4Z

1

R199

1 2

560_0402_5%

PCI Beep

C384

1 2

SPKR16

1 1

1 2

1U_0402_6.3V4Z

R196

560_0402_5%

R440

10K_0402_5%

12

+VDDA

2

D34

CH751H-40_SC76

2 1

12

R431
10K_0402_5%

12

R430
10K_0402_5%

Q30
MMBT3904_SOT23

3 1

1

C386
1U_0402_6.3V4Z

@

2

1 2

+S1_VCC

C381

MONO_IN

1 2

1U_0402_6.3V4Z
R189

2.4K_0402_5%

2.2K_0402_5%

SPKL+

R35 0_0603_5%

SPKL­SPKR+
SPKR-

1 2

R36 0_0603_5%

1 2

R25 0_0603_5%

1 2

R26 0_0603_5%

1 2

Speaker Conn.

+MIC1_VREFO_L +MIC1_VREFO_R

R812

C839

1 2
1 2

1 2

MIC1_L1

1

2

1 2

MIC1_R1

1

C840
220P_0402_50V7K

2

NBA_PLUG25,29

330P_0402_50V7K

R813

4.7K_0402_5%

C843

PSOT24C_SOT23@

MIC_SENSE25

30mil

2

D6

3

1

MIC_SENSE

AGND

HeadPhone JACK

NBA_PLUG

C844

330P_0402_50V7K

AGND

SPK_L+
SPK_L­SPK_R+
SPK_R-

2

1

JP35

5
4
3

6
2
1

FOX_JA6033L-5S1-TR

1

2

JP34

5
4
3

6
2
1

FOX_JA6033L-5S1-TR

ACES_85204-0400

3

D5

PSOT24C_SOT23@

MICROPHONE
IN JACK

PJ15

1

JUMP_43X39

@

2

JP2

4
3
2
1

1

PJ16

1

JUMP_43X39

@

2

2

8

7

8

7

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/11/01 2006/11/01

C

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

D

Date: Sheet

Compal Electronics, Inc.

AMP&Audio Jack

HTW2E(LA-3201P) 1.0

Thursday, April 27, 2006

E

26 46

of

+3VS

12

R734

4.7K_0402_5%@

12

R736

4.7K_0402_5%@

Base I/O Address

0 = 02Eh
1 = 04Eh

*

+3VALW

TPM1.2 on board

+3VS+3VALW

GND

10

VDD

GND

11

C769

19

24

VDD

VDD

LFRAME#

LRESET#

LPCPD#

SERIRQ

CLKRUN#

XTALI/32K IN

GND

GND

SLB 9635 TT 1.2_TSSOP28@

18

25

C772

1 2

32.768KHZ_12.5P_1TJS125BJ2A251@

1

IN

4

OUT

Y5

1 2

C773 18P_0402_50V8J@

0.1U_0402_16V4Z@

2

1

LAD0
LAD1
LAD2
LAD3

LCLK

XTALO

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
PCIRST#
LPCPD#
SERIRQ
CLK_PCI3

PM_CLKRUN#

R735

4.7K_0402_5%@

TPM_XTALI

2

0.1U_0402_16V4Z@

C771

1

LPC_AD0 15,29,30,33
LPC_AD1 15,29,30,33
LPC_AD2 15,29,30,33
LPC_AD3 15,29,30,33
LPC_FRAME# 15,19,29,30,33

PCIRST# 15,20,21,23,24,29,30,33

SERIRQ 15,21,29,30,33
CLK_PCI3 15

PM_CLKRUN# 15,20,21,29

12

+3VS

LPCPD#

1 2

4.7K_0402_5%@

R752

+3VS

2

C770

1

0.1U_0402_16V4Z@

26
23
20
17
22
16
28
27
21

15

7

PP

14
13

18P_0402_50V8J@

2

NC

3

NC

0.1U_0402_16V4Z@

T1 PAD@
T2 PAD@

2

10M_0402_5%@

TPM_XTALO

6
2

8
9

3

12

1

TPM_XTALI

R737

U31

GPIO
GPIO2

TEST1
TESTB1/BADD

NC
NC
NC

5

VSB

SLB 9635 TT 1.2

4

12

1

C768

IDE_SDIORDY17

SIDERST#16

INT_IRQ1517

8.2K_0402_5%

R300

+3VS

1 2

12

SIDERST#
PCIRST#

R302

4.7K_0402_5%

+5VS

SHDD_LED#29

1 2

R305 10K_0402_5%@

R304 5.6K_0603_1% @

14

9

P

A

O

10

B

G

7

IDE_SDIOW#17

IDE_SDA117
IDE_SDA017

IDE_SDCS1#17

1 2

R293 100K_0402_5%

IDE_SDD7

IDE_SDDREQ

12

U5C

SIDE_RST#

8

SN74LVC08APW_TSSOP14

SIDE_RST#
IDE_SDD7
IDE_SDD6
IDE_SDD5
IDE_SDD4
IDE_SDD3
IDE_SDD2
IDE_SDD1
IDE_SDD0

IDE_SDIOW#
IDE_SDIORDY
INT_IRQ15
IDE_SDA1
IDE_SDA0
IDE_SDCS1#
SHDD_LED#TPM_XTALO

+5VS

SEC_CSEL

R276

1 2

470_0805_5%

IDE_SDD[0..15]17

JP21

1
3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
53 54

OCTEK_CDR-50JD1

+5VS

C373
1000P_0402_50V7K

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15
IDE_SDDREQ
IDE_SDIOR#

IDE_SDDACK#

R296 100K_0402_5%

1 2

IDE_SDA2
IDE_SDCS3#

W=80mils

1 2

C476

0.1U_0402_10V6K

Placea caps . ne ar ODD CONN.

1

C372
10U_0805_10V4Z

2

1

C366
10U_0805_10V4Z

2

1 2

R733 0_0603_5%@

1

C368
1U_0402_6.3V4Z

2

IDE_SDDREQ 17

IDE_SDIOR# 17

IDE_SDDACK# 17

+5VS
IDE_SDA2 17
IDE_SDCS3# 17

+5VS

C374

0.1U_0402_16V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/11/01 2006/11/01

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

TPM/ ODD CONNECTORS

Size Document Number Rev

HTW2E(LA-3201P) 1.0

B

Friday, April 21, 2006

Date: Sheet

of

27 46

+5VALW

1

2

+5VALW

1

C3

0.1U_0402_16V4Z

2

60 mils

USB_EN#29

C294

0.1U_0402_16V4Z

60 mils

USB_EN#

USB_EN#

1
2
3
4

1.4A

U1

GND
IN
IN
EN#

G528_SO8

U6

1
2
3
4

1.4A

GND
IN
IN
EN#

G528_SO8

OUT
OUT
OUT

FLG

OUT
OUT
OUT
FLG

8
7
6
5

8
7
6
5

+USB_BS

0.1U_0402_16V4Z

+USB_AS=60 mils

+USB_AS

+USB_AS

C506

0.1U_0402_16V4Z

+USB_BS=60 mils

+USB_BS

C395

1

+

2

150U_D_6.3VM

C399

1

+

C505
150U_D_6.3VM

2

C394

0.1U_0402_16V4Z

Keep 20 mils minimum spacing between
USB signals and others signals

+USB_AS

L34

1

USBP0-16

USBP0+16

USBP0­USBP0+

1

4

4

WCM2012F2S-900T04_0805

2

2

C_USB0­C_USB0+

3

3

USB CONNECTOR

JP23

1

VBUS

S_GND

2

D-

3

D+

4

GND

S_GND

TYCO_3-1470859-1

5

6

1

J3

1

JUMP_43X118@

2

2

FD2
FIDUCAL@

CF14
SMD40M80@

CF2
SMD40M80@

USB CONNECTOR

L35

1

4

WCM2012F2S-900T04_0805

CF4
SMD40M80@

1

CF3
SMD40M80@

1

1

emi-138x233@

1

4

CLP1

CF7
SMD40M80@

CF5
SMD40M80@

USBP2-16 USBP4- 16

USBP2+16 USBP4+ 16

CF9
SMD40M80@

1

CF15
SMD40M80@

1

FD5
FIDUCAL@

1

CF12
SMD40M80@

1

CF16
SMD40M80@

1

FD4
FIDUCAL@

1

CF8
SMD40M80@

FD1
FIDUCAL@

CF13
SMD40M80@

1

1

1

1

1

1

USBP2- C_USB2- USBP4­USBP2+

CF6
SMD40M80@

1

CF1
SMD40M80@

1

FD6
FIDUCAL@

FD3
FIDUCAL@

1

2

2

3

1

1

C_USB2+

3

CLP2

emi-138x233@

+USB_BS

H32

H_S315D118 @

1

H28

H_C276D157@

1

H15

H_C79D79N@

JP13

1

VCC

2

D0-

3

D0+

4

VSS
G210G1

12

TYCO_1470748-1

H20

H_S315D118 @

1

H16

H_C118D118N@

1

H27

H_S315D118 @

1

+USB_BS

H3

H_O276X177D276X177N@

H14

H_C315D118

@

1

L36

1

1

4

1

1

H_C118D118N@

USBP4+

4

H18

H_C256D177@

H13

H_S315D157@

1

H6

H22

H_S315D118 @

1

H25

H_C256D177@

1

H10

H_C79D79N@

1

H31

H_S315D118 @

1

H19

H_C256D177@

1

H35

H_C276D157@

1

H30

H_S315D118 @

1

H24

H_C256D177@

1

H_C315D157@

1

1

H8

1

H26

H_S315D118 @

1

H37

H_O177X158D177X158N@

H39

H_S315D118@

1

1

PJ17

2

JUMP_43X39

@

H38

H_O118X197D118X197N@

1

H40

H_S315D118@

1

112

5

VCC

6

D1-

7

D1+

8

VSS

9

G311G4

H1

H_C118D118N@

1

H11

H_C118D118N@

1

H21

H_S315D118 @

1

C_USB4­C_USB4+

H4

H_S295D110@

1

H7

H_C177D177N @

1

H_S315D118 @

1

2

2

3

3

WCM2012F2S-900T04_0805

H2

H_C138D138N @

1

H23

H_C177D177N @

1

H9

H5

H_S315D142X118@

1

Security Classification

1

1

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/11/01 2006/11/01

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

USB Conn.

Size Document Number Rev

HTW2E(LA-3201P) 1.0

B

Friday, April 21, 2006

Date: Sheet

of

28 46

5

KBA[0..19]

ADB[0..7]

L20

1 2

FBM-L11-160808-800LMT_0603

D D

C C

WLANPME#20,23

LAN_PME#20,23

1394_PME#20,23

+5VS

RP18

1 8
2 7
3 6
4 5

+3VALW

+5VALW

B B

A A

10K_1206_8P4R_5%

RP19

1 8
2 7
3 6
4 5

100K_1206_8P4R_5%

1 2

R375 4.7K_0402_5%

1 2

R371 4.7K_0402_5%

1 2

R156 4.7K_0402_5%

1 2

R157 4.7K_0402_5%

ENBKL

1 2

R112 100K_0402_5%

PSCLK1
PSDATA1
PSCLK2
PSDATA2

MODE#
FRD#
SELIO#
FSEL#

EC_SMB_CK1
EC_SMB_DA1

EC_SMB_CK2
EC_SMB_DA2

100P_0402_50V8J@

KBA[0..19] 30
ADB[0..7] 30

ECAGND

C306

22P_0402_50V8J @

+3VALW

R152
10K_0402_5%

1 2

**

C333

12

EC_PME#

1

2

CLK_PCI_LPC15

R125 10_0402_5% @

1

C332

2

12

100P_0402_50V8J@

C301 0.1U_0402_16V4Z

+3VALW

1

2

0.1U_0402_16V4Z

12

12

R119 47K_0402_5%

0.1U_0402_16V4Z

C309

LPC_FRAME#15,19,27,30,33

PM_CLKRUN#15,20,21,27

+3VALW

EC_SMB_CK130,36
EC_SMB_DA130,36

EC_SMB_CK24
EC_SMB_DA24

CAPS_LED#32

NUM_LED#32

PHDD_LED#17

1

2

LPC_AD015,27,30,33
LPC_AD115,27,30,33
LPC_AD215,27,30,33
LPC_AD315,27,30,33

PCIRST#15,20,21,23,24,27,30,33

SERIRQ15,21,27,30,33

IE_BTN#31

TP_DATA32

EC_SCI#16

EC_SMI#16

WL_OFF#24

EC_SWI#16

NBA_PLUG25,26

LID_SW#31

VR_ON41

PBTN_OUT#16
PADS_LED#32

GATEA2016
KBRST#16

C292

0.1U_0402_16V4Z

FRD#30

FWR#30

FSEL#30

R114 100K_0402_5%@

TP_CLK32

ENBKL8
BKOFF#13

FSTCHG37

EAPD25
MODE#31

SYSON25,31,34

SUSP#25,30,34,39,40

4

0.1U_0402_16V4Z

1

C328

2

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

FRD#
FWR#
FSEL#
SELIO#
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19
IE_BTN#

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

EC_SCI#

ENBKL
BKOFF#
FSTCHG
EC_SMI#

NBA_PLUG
EAPD
LID_SW#
MODE#
SYSON

VR_ON

PADS_LED#
CAPS_LED#
NUM_LED#

1

C273

2

12

PSCLK1
PSDATA1
PSCLK2
PSDATA2
TP_CLK
TP_DATA

PBTN_OUT#

2

C315

1000P_0402_50V7K

1

U8

15

LAD0

14

LAD1

13

LAD2

10

LAD3

9

LFRAME#

165

LRST#/GPIO2C

18

LCLK

7

SERIRQ

25

CLKRUN#/GPIO0C

24

LPCPD#/GPIO0B

150

RD#

151

WR#

173

MEMCS#

152

IOCS#

138

D0

139

D1

140

D2

141

D3

144

D4

145

D5

146

D6

147

D7

124

A0

125

A1/XIOP_TP

126

A2

127

A3

128

A4/DMRP_TP

131

A5/EMWB_TP

132

A6

133

A7

143

A8

142

A9

135

A10

134

A11

130

A12

129

A13

121

A14

120

A15

113

A16

112

A17

104

A18

103

A19

108

A20/GPIO23

105

E51CS#/GPIO20/ISPEN

110

PSCLK1

111

PSDAT1

114

PSCLK2

115

PSDAT2

116

PSCLK3

117

PSDAT3

163

SCL1

164

SDA1

169

SCL2

170

SDA2

8

GPIO04

20

GPIO07

21

GPIO08

22

GPIO09

27

GPIO0D

28

GPIO0E

48

GPIO10

62

GPIO13

63

GPIO14

69

GPIO15

70

GPIO16

75

GPIO17

109

GPIO24

118

GPIO25

119

GPIO26

148

GPIO27

149

GPIO28

155

GPIO29

156

GPIO2A

162

GPIO2B

168

GPIO2D

55

FnLock#/GPIO12

54

CapLock#/GPIO011

23

NumLock#/GPIO0A

41

ScrollLock#/GPIO0F

19

ECRST#

5

GA20/GPIO02

6

KBRST#/GPIO03

31

ECSCI#

+3VALW

1 2

FBM-L11-160808-800LMT_0603

2

C330
1000P_0402_50V7K

1

VCC16VCC34VCC45VCC

LPC Interface

*

*

X-BUS Interface

PS2 Interface

SMBus

GPIO

*

*

*

*

MISC

3

L23

1

C290

2

0.1U_0402_16V4Z

ECAGND

95

VCCA

159

96

161

AGND

VCCBAT

BATGND

123

136

157

166

VCC

VCC

VCC

Internal Keyboard

FAN2PWM/GPOW2/PWM2

Pulse Width

FAN1PWM/GPOW7/PWM7

Wake Up Pin

TIN2/FANFB2/GPWU7

ENE-KB910-B4

Analog To Digital

Digital To Analog

Expanded I/O

GPIO2E/TOUT1/FANFB1

DPLL_TP/GPIO06/FANFB3

FAN

TEST_TP/GPIO05/FAN3PWM

Timer Pin

E51RXD/GPIO21/ISPCLK
E51TXD/GPIO22/ISPDAT

GND17GND35GND46GND

GND

GND

122

137

167

GPOK0/KSO0
GPOK1/KSO1
GPOK2/KSO2
GPOK3/KSO3
GPOK4/KSO4
GPOK5/KSO5
GPOK6/KSO6
GPOK7/KSO7
GPOK8/KSO8

GPOK9/KSO9
GPOK10/KSO10
GPOK11/KSO11
GPOK12/KSO12
GPOK13/KSO13
GPOK14/KSO14
GPOK15/KSO15
GPOK16/KSO16
GPOK17/KSO17

GPIK0/KSI0
GPIK1/KSI1
GPIK2/KSI2
GPIK3/KSI3
GPIK4/KSI4
GPIK5/KSI5
GPIK6/KSI6
GPIK7/KSI7

GPOW0/PWM0
GPOW1/PWM1

GPOW3/PWM3
GPOW4/PWM4
GPOW5/PWM5
GPOW6/PWM6

GPWU0
GPWU1
GPWU2
GPWU3
GPWU4
GPWU5

TIN1/GPWU6

GPIAD0/AD0
GPIAD1/AD1
GPIAD2/AD2
GPIAD3/AD3
GPIAD4/AD4
GPIAD5/AD5
GPIAD6/AD6
GPIAD7/AD7

GPODA0/DA0

GPODA1/DA1

GPODA2/DA2

GPODA3/DA3

GPODA4/DA4

GPODA5/DA5

GPODA6/DA6

GPODA7/DA7

GPIO18/XIO8CS#

*

GPIO19/XIO9CS#

*

GPIO1A/XIOACS#

*
*

GPIO1B/XIOBCS#
GPIO1C/XIOCCS#

*

GPIO1D/XIODCS#

*

GPIO1E/XIOECS#

*

GPIO1F/XIOFCS#

*

TOUT2/GPIO2F
E51IT0/GPIO00

E51IT1/GPIO01

KB910Q B4_LQFP176

0.1U_0402_16V4Z

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
153
154

71
72
73
74
77
78
79
80

32
33
36
37
38
39
40
43

2
26
29
30
44
76
172
176

81
82
83
84
87
88
89
90

99
100
101
102
1
42
47
174

85
86
91
92
93
94
97
98

171
12
11

175
3

4
106
107

158

XCLKI

160

XCLKO

+3VALW

1 2

1

1

C327

2

2

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

KSO17

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

INVT_PWM
BEEP#

PWR_SUSP_LED

ACOFF
USB_EN#
EC_ON
EC_LID_OUT#
EC_EAPD

KILL_SW#

EC_PME#
MINI_WAKE#

BATT_TEMPA
BTN_ID
BATT_OVP

ALI/MH#
SKU_ID
AD_BID0

DAC_BRIG
IREF

EN_DFAN1#

PWR_LED#

HDD_LED#
BATT_LOW_LED#
BATT_CHGI_LED#

FAN_SPEED1

1 2

R133 4.7K_0402_5%

EC_THRM#

E51_RXD
E51_TXD

CRY2
CRY1

R155
0_0805_5%

C339
1U_0402_6.3V4Z

KSO0 32
KSO1 32
KSO2 32
KSO3 32
KSO4 32
KSO5 32
KSO6 32
KSO7 32
KSO8 32
KSO9 32

KSO10 32
KSO11 32
KSO12 32
KSO13 32
KSO14 32
KSO15 32

KSO17 31

EC_PLAYBTN# 31,32
EC_STOPBTN# 31,32
EC_REVBTN# 31,32
EC_FRDBTN# 31,32
VOL_UP 32
VOL_DOWN 32

VOL_MUTE 32
KSI7 32

INVT_PWM 13
BEEP# 26

ACOFF 37
USB_EN# 28
EC_ON 31
EC_LID_OUT# 16
EC_EAPD 25,26

ON/OFF 31

PM_SLP_S3# 16
PM_SLP_S5# 16

MINI_WAKE# 24

BATT_OVP 37
ALI/MH# 36,37

DAC_BRIG 13
IREF 37

EN_DFAN1 33

PWR_LED# 31

FAN_SPEED1 33

EC_THRM# 16

PWR_SUSP_LED 31

KILL_SW# 24,31

BTN_ID 31

POUT 41

VOL_AMP

WL_BT_LED# 31
HDD_LED# 31
BATT_LOW_LED# 31
BATT_CHGI_LED# 31

NSE_DPR 26

EC_RSMRST# 16
SHDD_LED# 27

2

+3VALW

1 2

2 1

CH751H-40_SC76

12

C272 0.01U_0402_16V7K

1 2

100K_0402_5%

R93

1 2

C271 0.22U_0603_16V4Z

R310

10K_0402_5%

R761

4.7K_0402_5%

1 2

SKU_ID

R116
10K_0402_5%

D13

ECAGND

+3VALW

12

SPK_SEL 16

+3VALW

+S1_VCC

For EC Tools

ACES_85205-0400@

R459

10K_0402_5% @

1 2

R460

10K_0402_5%

1 2

ACIN 31,35

BATT_TEMPA 36

1

JP6

1

1
2
3
4

E51_RXD

2

E51_TXD

3
4

KSI[0..7]
KSO[0..15]

TP_CLK
TP_DATA

KBA1
KBA4
KBA5

1

C338

2

10P_0402_50V8J

32.768KHZ_12.5P_1TJS125DJ2A073

Analog Board ID definition,
Please see page 3.

+3VALW

Ra

1 2

Rb

1 2

+3VALW

BTN_ID

1 2

R357

1 2

R358

1 2

R372 10K_0402_5%

1 2

R376 10K_0402_5%

1 2

R377 10K_0402_5%

R150

1 2

20M_0603_5%@

R92
100K_0402_5%

1

R101

2

18K_0402_5%

+3VALW

100K_0402_5%

1 2

4

1

IN

OUT

NC3NC

2

AD_BID0

C284

0.1U_0402_16V4Z

E51_RXD 33

E51_TXD 33

KSI[0..7] 31,32
KSO[0..15] 32

R91

4.7K_0402_5%

4.7K_0402_5%

+3VALW

CRY2CRY1

1

C342

X2

2

+5VS

10P_0402_50V8J

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/11/01 2006/11/01

Compal Secret Data

Deciphered Date

Title

ENE-KB910

Size Document Number R ev

HTW2E(LA-3201P) 1.0

Custom

Friday, April 21, 2006

2

Date: Sheet

1

of

29 46

EC_SMB_CK129,36
EC_SMB_DA129,36

FWE#

SN74LVC32APWLE_TSSOP14

U12B

6

+5VALW

+3VALW

O

1 2

14

P

A
B

G

7

C324

0.1U_0402_16V4Z

U11

8
7
6
5

AT24C16AN-10SI-2.7_SO8

4
5

VCC
WP
SCL
SDA

A0
A1
A2

GND

+3VALW

12

R170
100K_0402_5%

+5VALW

12

R145
100K_0402_5%

1
2
3
4

12

R158

100K_0402_5%

2

G

1 3

D

S

Q28
2N7002_SOT23

INT_FSEL#

0.1U_0402_16V4Z
R178

1 2

22_0402_5%

SUSP# 25 ,2 9,34,39,40

EC_FLASH# 16

FWR# 29

C341

1 2

+3VALW

14

INT_FLASH_EN#

1

P

A

3

O

FSEL#

2

B

G

7

U12A
SN74LVC32APWLE_TSSOP14

R176
100K_0402_5%

1 2

FSEL# 29

LPC Debug Port

+5VS +3VS

JP30

1

1

2

2

3

3

4

4

5

5

CLK_14M_SIO

6

6

LPC_AD0

7

7

LPC_AD1

8

8

LPC_AD2

9

9

LPC_AD3

10

10

LPC_FRAME#

11

11

LPC_DRQ1#

12

12

PCIRST#

13

13
14
15
16
17
18
19
20

ACES_85201-2005@

14
15
16
17
18
19
20

R458 0_0402_5%@

1 2

CLK_PCI_SIO1
SERIRQ

1 2

R787 0_0402_5%@

LPC_AD[0..3]15,27,29,33

CLK_14M_SIO 12
LPC_AD0 15,27,29,33
LPC_AD1 15,27,29,33
LPC_AD2 15,27,29,33
LPC_AD3 15,27,29,33

LPC_FRAME# 15,19,27,29,33

LPC_DRQ1# 15,33

PCIRST# 15,20,21,23,24,27,29,33

CLK_PCI_SIO 15,33
SERIRQ 15 , 2 1,27,29,33

LPC_AD[0..3]

CLK_PCI_SIO1

@

22_0402_5%

10P_0402_50V8K@

R457

C658

close to Moden Conn.

1 2

1

2

KBA[0..19]29
ADB[0..7]29

KBA[0..19]
ADB[0..7]

1MB Flash ROM

1 2

+3VALW

1

C352

0.1U_0402_16V4Z

2

SB_INT_FLASH_SEL tie to ATI SB
GPIO1 and pull down

+3VALW

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SB_INT_FLASH_SEL16

2005/11/01 2006/11/01

Compal Secret Data

Deciphered Date

1MB ROM Socket

KBA16
KBA15
KBA14
KBA13
KBA12
KBA11
KBA9
KBA8
FWE#
RESET#
INT_FLASH_EN#
SB_INT_FLASH_SEL
KBA18
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1

JP8

SUYIN_80065AR-040G2T@

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40

KBA17

KBA19
KBA10
ADB7
ADB6
ADB5
ADB4

ADB3
ADB2
ADB1
ADB0
FRD#

FSEL#
KBA0

+3VALW

Compal Electronics, Inc.

Title

BIOS& I/O PORT

Size Document Number Rev

HTW2E(LA-3201P) 1.0

B

Friday, April 21, 2006

Date: Sheet

of

30 46

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

INT_FSEL#

FRD#29

FRD#
FWE#

U13

21

A0

20

A1

19

A2

18

A3

17

A4

16

A5

15

A6

14

A7

8

A8

7

A9

36

A10

6

A11

5

A12

4

A13

3

A14

2

A15

1

A16

READY/BUSY#

40

A17

13

A18

37

A19

22

CE#

24

OE#

9

WE#

SST39VF080-70_TSOP40

VCC0
VCC1

RP#

NC0
NC1

GND0
GND1

31
30

ADB0

25

D0
D1
D2
D3
D4
D5
D6
D7

NC

ADB1

26

ADB2

27

ADB3

28

ADB4

32

ADB5

33

ADB6

34

ADB7

35

RESET#

10
11
12
29
38

23
39

R179
100K_0402_5%

5

4

3

2

1

Switch Board Conn.

S

2
3

+3VALW

51_ON#

JP3

1
2
3
4
5
6
7
8
9
10
11
12

ACES_85201-1205

SYSON

PWR_SUSPLED#

PWR_SUSPLED1#

R246
100K_0402_5%

1 2

IE_BTN# 29

ACIN29,35

PWR_LED_1#
PWR_SUSPLED#

2

10K

Q12

DTA114YKA_SC59

Change from 300 to 120

R48

1 2

R50

1 2

IEBTN#

R194

120_0402_5%

BTN_ID
KSO17
ON/OFFBTN#
IEBTN#
MODEBTN#
EC_PLAYBTN#
EC_STOPBTN#
EC_FRDBTN#
EC_REVBTN#

Q13

2N7002_SOT23

1 3

D

120_0402_5%

120_0402_5%

1

D27
DAN202U_SC70

AC IN LED

D15

2 1

HT-191UYG-DT_GRN_0603

2

G

BTN_ID29

KSO1729

D D

C C

B B

EC_PLAYBTN#29,32
EC_STOPBTN#29,32

EC_FRDBTN#29,32

EC_REVBTN#29,32

+3VALW

+3VALW

47K

1 3

SUSPLEDS#

1 2

BATTERY CHG

A A

+3VALW

R192

1 2

120_0402_5%

R193

1 2

120_0402_5%

5

2 1

D17 HT-191UD_AMBER_0603

2 1

HT-191UYG-DT_GRN_0603

D36

BATT_LOW_LED#

BATT_CHGI_LED#

KSO17
ON/OFFBTN#
PWR_LED_1#
PWR_SUSPLED#
IEBTN#
MODEBTN#
EC_REVBTN#
EC_FRDBTN#
EC_PLAYBTN#
EC_STOPBTN#

PWR_SUSP_LED 29 PWR_LED# 29

C173 220P_0402_50V7K

1 2

C179 220P_0402_50V7K

1 2

C168 220P_0402_50V7K

1 2

C153 220P_0402_50V7K

1 2

C160 220P_0402_50V7K

1 2

+3VALW

Q11

DTA114YKA_SC59

47K

10K

PWR_LEDS

1 3

R49

R47

MODEBTN#

C178 220P_0402_50V7K

1 2

C181 220P_0402_50V7K

1 2

C169 220P_0402_50V7K

1 2

C146 220P_0402_50V7K

1 2

C167 220P_0402_50V7K

1 2

Q14

2N7002_SOT23

2

Change from 120 to 300

1 2

1 2

1 3

D

120_0402_5%

120_0402_5%

1

D25
DAN202U_SC70

2

2
3

G

S

51_ON#

SYSON 25,29,34

PWR_LED#PWR_SUSP_LED

PWR_LED_0#

PWR_LED_1#

MODE# 29

51_ON# 35

WL&BT LED

+3VALW

D43

2 1

HT-191UD_AMBER_0603WLAN@

+3VALW

R447

100K_0402_5%WLAN@

1 2

2005/11/01 2006/11/01

13

D

2

G

2N7002_SOT23

S

BATT_LOW_LED# 29

BATT_CHGI_LED# 29

R446

12

120_0402_5%

Kill SWITCH

Q50

4

SW7

3

3

2

2

1

1

1BS003-1211L_3PWLAN@

KILL_SW#

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.

3

WL_BT_LED#

KILL_SW# 24,29

Compal Secret Data

Deciphered Date

SW6

1
2

SMT1-05_4P

WL_BT_LED# 29

+3VALW

3
4

5

6

EC_ON29

0_0402_5%

0.1U_0402_16V4Z

ON/OFFBTN#

EC_ON

4.7K_0402_5%

C845

R247

1 2

U39
A3212EEH_MLP6

VDD5OUTPUT

1

4

NC

2

100K_0402_5%

D26

1

CHN202U_SC70

2

NC

GND

3

+3VALW

R244

1 2

3
2

13

D

G

S

2N7002_SOT23

12

R814
47K_0402_5%

LID_SW#

1

1

2

C846
10P_0402_25V8K

2

Power Button

51_ON#

1000P_0402_50V7K

C455

Q38

ON/OFF 29
51_ON# 35

12

D24

RLZ20A_LL34

LID_SW# 29

R445

1 2

POWER/ON LED

LID Switch

PWR_SUSPLED1#

PWR_LED_0#

+3VS

R195

1 2

120_0402_5%

2

D16

2 1

HT-191UD_AMBER_0603

D35

2 1

HT-191UYG-DT_GRN_0603

HDD LED

D18

2 1

HT-191UYG-DT_GRN_0603

Compal Electronics, Inc.

Title

Kill SW/ Sub Conn./LEDS

Size Document Number Rev

HTW2E(LA-3201P) 1.0

Custom

Friday, Apri l 21, 2006

Date: Sheet

1

HDD_LED# 29

of

31 46

5

4

3

2

1

KSI[0..7]
KSO[0..15]

D D

+5VS

C183

0.1U_0402_16V4Z

TP CONN.

JP31

4

TP_DATA29

TP_CLK29

C C

TP_DATA

TP_CLK

C813

100P_0402_25V8K

C814

100P_0402_25V8K

4

3

3

2

2

1

1

ACES_85201-0405

INT_KBD CONN.

JP5

1
2
3
4

KSO15

5

KSO14

6

KSO10

7

KSO11

8

KSO8

9

KSO9

10

KSO13

11

KSI7

12

KSO3

13

KSO7

14

KSO12

15

KSI4

16

KSI6

17

KSI5

18

KSO6

19

KSO5

20

KSI3

21

KSI0

22

KSO0

23

KSO1

24

KSI1

25

KSI2

26

KSO2

27

KSO4

28
29
30
31
32
33
34

ACES_88170-3400

KSI[0..7] 29,31
KSO[0..15] 29

NUM_LED# 29
PADS_LED# 29
CAPS_LED# 29

1 2

1 2

1 2

R298300_0402_5%

R299300_0402_5%

+3VS

R297300_0402_5%

+3VS

+3VS

KSO7

C241 100P_0402_25V8K

KSO6

C236 100P_0402_25V8K

KSO5

C235 100P_0402_25V8K

KSO4

C227 100P_0402_25V8K

KSO3

B B

A A

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

C242 100P_0402_25V8K

KSI4

C239 100P_0402_25V8K

KSO2

C228 100P_0402_25V8K

KSO1

C231 100P_0402_25V8K

KSO0

C232 100P_0402_25V8K

KSI5
KSI6

C238 100P_0402_25V8K

KSI7
KSO8

C246 100P_0402_25V8K

2005/11/01 2006/11/01

Compal Secret Data

Deciphered Date

KSO15
KSO14
KSO13
KSO12
KSI0
KSO11
KSO10
KSI1
KSI2
KSO9
KSI3
PADS_LED#
NUM_LED#
CAPS_LED#

2

C250 100P_0402_25V8K
C249 100P_0402_25V8K
C244 100P_0402_25V8K
C240 100P_0402_25V8K
C233 100P_0402_25V8K
C247 100P_0402_25V8K
C248 100P_0402_25V8K
C230 100P_0402_25V8K
C229 100P_0402_25V8K
C245 100P_0402_25V8KC237 100P_0402_25V8K
C234 100P_0402_25V8K
C252 100P_0402_25V8KC243 100P_0402_25V8K
C253 100P_0402_25V8K
C251 100P_0402_25V8K

Compal Electronics, Inc.

Title

KB/Touch Pad& hibernation

Size Document Number R ev

HTW2E(LA-3201P) 1.0

Custom

Friday, April 21, 2006

Date: Sheet

1

of

32 46

A

B

C

D

E

FAN Conn

2

B

1 2

+3VALW

+5VS

1

C

Q36
FMMT619_SOT23

E

3

12

D23

1N4148_SOD80

LPC_AD3

LPC_AD1

LPC_FRAME#

FAN1

+3VALW

12

D22
1SS355_SOD323

2

C170

1000P_0402_50V7K@

7

8

9

10

1

H36

2

1

56

4

3

2

1

12

JP17

ACES_85205-0300

C171
1000P_0402_50V7K@

PCIRST#

LPC_AD2

LPC_AD0

CLK_PCI_SIO

C449
10U_1206_16V4Z

3
2
1

R779

0_0402_5%@

1 2

1 2

R781
0_0402_5%

E51_TXD

LPC_DRQ1#

PCIRST# 15,20 ,2 1,23,24,27,29,30

LPC_AD2 15,27,29,30

LPC_AD0 15,27,29,30

CLK_PCI_SIO 15,30

8

O

11

O

E51_TXD 29

LPC_DRQ1# 15,30E51_RXD29

14

9

P

A

10

B

G

7

U12C
SN74LVC32APWLE_TSSOP14

+3VALW

14

12

P

A

13

B

G

7

U12D
SN74LVC32APWLE_TSSOP14

VS

8

PU5B

5

+

6

-

LM358DT_SO8

1 2

R240 8.2K_0402_5%

P

EN_FAN1

7

0

G

4

SERIRQ15,21,27,29,30

1 2

R241
100_0402_5%

+3VS

E51_RXD

SERIRQ

2

C448

0.1U_0402_16V4Z@

1

R41 10K_0402_5%

FAN_SPEED129

R780

0_0402_5%@

1 2

1 2

R782
0_0402_5%

LPC_AD315,27,29,30

LPC_AD115,27,29,30

LPC_FRAME#15,19,27,29,30

R239

10K_0402_5%

EN_DFAN1

12

1 1

2 2

EN_DFAN129

BOM

3 3

ZZZ1

PCB ZHH LA-3201P REV0 M/B

DEBUG_PAD@

R823

22_0402_5%

1 2
2

C857
22P_0402_50V8J

1

LPC Debug card

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/03/01 2006/03/01

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

FAN & MDC

Size Document Number Rev

HTW2E(LA-3201P) 1.0

B

Thursday, April 27, 2006

D

Date: Sheet

E

33 46

of

A

B

C

D

E

+1.8V TO +1.8VS

+1.8V

Q19

8

D

1 1

7

D

6

D

5

D

SI4800BDY_SO8

1

C208

2

4.7U_0805_10V4Z

S
S
S
G

1
2
3
4

1

2

0.1U_0402_16V7K

+1.8VS

1

C226

2

1U_0402_6.3V4Z

D

C222

S

13

2

G

Q18
2N7002_SOT23

2

1

R58

1 2

100K_0402_5%

C225
10U_0805_10V4Z

+VSB

SUSP

Q17

+5VALW

R52

470_0805_5%

1 2
13

D

2

G

S

2N7002_SOT23

Q46

8

D

7

D

6

D

5

D

SI4800BDY_SO8

1

C607

2

4.7U_0805_10V4Z

+5VALW TO +5VS

+5VS

1

C625

1

S

2

S
S
G

3
4

1

2

0.1U_0402_16V7K

2

1U_0402_6.3V4Z

C618

4.7U_0805_10V4Z

C624

R417

1 2

22K_0402_5%

13

D

2

G

Q45

S

2N7002_SOT23

1

2

SUSP

+VSB

Q47

R418

2

G

470_0805_5%

1 2
13

D

S

2N7002_SOT23

+1.8VALW TO +1.8V

SUSP

+5VALW

R55
10K_0402_5%

1 2
13

D

S

Q16
2N7002_SOT23

SYSON2 5,29,31

2

G

1 2

SYSON#

R54

10K_0402_5%

+5VALW

R56
10K_0402_5%

1 2
13

D

S

Q15
2N7002_SOT23

2

G

1 2

2 2

+1.8VALW +1.8V

S
S
S
G

C27

1
2
3
4

1

C26

2

0.1U_0402_16V7K

1U_0402_6.3V4Z

Q4

8

D

7

D

6

D

5

D

SI4800BDY_SO8

1

C16

2

4.7U_0805_10V4Z

1

C24 4.7U_0805_10V4Z

2

1 2

13

D

2

G

Q7

S

2N7002_SOT23

1

2

R18
100K_0402_5%

SYSON#

+VSB

R24

470_0805_5%

1 2
13

D

2

G

Q9

S

2N7002_SOT23

SUSP40

SUSP#25,29,30,39,40

R53

10K_0402_5%

3 3

+3VALW TO +3VS

+3VALW +3VS

1

S
S
S
G

A

C608

1
2
3
4

1

C611

2

0.1U_0402_16V7K

2

1U_0402_6.3V4Z

13

D

S

Q48

8

D

7

D

6

D

5

D

SI4800BDY_SO8

1

C622

2

4.7U_0805_10V4Z

4 4

1

C610 4.7U_0805_10V4Z

2

R416

1 2

68K_0402_1%

2

G

Q51
2N7002_SOT23

+VSB

SUSP

Q49

R415

2

G

470_0805_5%

1 2
13

D

S

2N7002_SOT23

B

+1.2VS +0.9VS

R39

470_0805_5%

1 2
13

D

S

2N7002_SOT23

SUSP SUSP

2

G

Q10

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R109

470_0805_5%

1 2

@

13

D

2

G

Q25

S

2N7002_SOT23

@

2005/11/01 2006/11/01

C

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

DC-DC INTERFACE

Size Document Number Rev

HTW2E(LA-3201P) 1.0

B

Wednesday, April 26, 2006

Date: Sheet

E

34 46

of

A

DC301000F00

PJP1

1

+

2

+

3

1 1

2 2

+CHGRTC

3 3

-

4

-

SINGA_2DW-0005-B03@

51_ON#31

PR21

560_0603_5%

1 2

+3VALWP +3VALW

(5A,200mils ,Via NO.= 10)

+5VALWP +5VALW

(5A,200mils ,Via NO.= 10)

+VSBP +VSB

DC_IN_S1 DC_IN_S2

BATT+

CHGRTCP

PR22
560_0603_5%

1 2

PJ2

2

JUMP_43X118@

PJ3

2

JUMP_43X118@

PJ5

2

JUMP_43X39 @

(120mA,40mils ,Via NO.= 2)

PJ8

2

112

(5A,200mils ,Via NO.= 10)

4 4

JUMP_43X79@

PF1

7A_24VDC_429007.WRML

PD3

12

RLS4148_LLDS2

PR12

200_0603_5%

1 2

PR14

100K_0402_1%

1 2

PR15

22K_0402_1%

RTCVREF

3.3V

12

PC9
10U_0805_10V4Z

112

112

112

21

12

12

G920AT24U_SOT89

3

OUT

+1.05VS+1.05VSP

12

PC1
1000P_0402_50V7K

N1

PC7

0.22U_1206_25V7K

PU2

2

IN

GND

1

12

PQ1

TP0610K-T1-E3_SOT23

2

12

PR17
200_0603_5%

N2

12

PC10
1U_0805_25V4Z

+1.8VALWP +1.8VALW

+1.2VSP +1.2VS

(6A,240mils ,Via NO.= 12)

(2A,80mils ,Via NO.= 4)

(0.35A,40mils ,Via NO.=2)

PL1

FBMA-L18-453215-900LMA90T_1812

1 2

VIN

PD2
RLS4148_LLDS2

1 2
12

12

PC8

0.1U_0603_25V7K

PD5
RLZ16B_LL34

2 1

PJ1

2

JUMP_43X118@

PJ4

2

JUMP_43X118@

PJ6

2

JUMP_43X79@

PJ7

2

JUMP_43X39 @

12

12

PR10
68_1206_5%

112

112

112

112

PC2

100P_0402_50V8J

PR9

68_1206_5%

13

(8A,320mils ,Via NO.= 16)

B

PC3
1000P_0402_50V7K

VS

+0.9VS+0.9VSP

+1.5VS+1.5VSP

VIN

12

PC4
100P_0402_50V8J

1000P_0402_50V7K

MAINPWON4,16,36,38

ACON37

PC5

12

2
3

VIN

12

PR3

84.5K_0402_1%

12

PR6
20K_0402_1%

VIN

VL

PD6

1

RB715F_SOT323

Precharge detector

15.97V/14.84V FOR
ADAPTOR

PR5

22K_0402_1%

1 2

100K_0402_1%

12

PC6

0.1U_0402_16V7K

PD4

12

RLS4148_LLDS2

PR18

1 2

1000P_0402_50V7K

PR1

1M_0402_1%

1 2

VS

8

3

+

2

-

4

PR8

10K_0402_1%

PR11
1K_1206_5%

N3

PR13
1K_1206_5%

PR16
1K_1206_5%

PC12

PU1A

P

1

O

G

LM393DG_SO8

12

RTCVREF

3.3V

1 2

1 2

1 2

LM393DG_SO8

12

1000P_0402_50V7K

C

RLZ4.3B_LL34

PU1B

7

O

2.2M_0402_5%

8

P

+

-

G

4

PC13

PD1

PR19

5
6

VS

12

12

PR2

5.6K_0402_5%

12

12

12

PR25

66.5K_0402_1%

PR23

34K_0402_1%

1K_0402_1%

1 2

PACIN

12

PR7
10K_0402_1%

12

VL

D

PQ2

S

PR4

12

PR26
191K_0402_1%

13

2

RHU002N06_SOT323

G

D

ACIN 29,31

PACIN 37,38

Vin Detector

High 18.384 17.901 17.430
Low 17.728 17.257 16.976

B+

12

PR20
499K_0402_1%

12

PR24
499K_0402_1%

47K_0402_1%

13

PR27

PQ3
DTC115EUA_SC70

12

PC11
1000P_0402_50V7K

PACIN

12

2

+5VALWP

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Deciphered Date

C

2006/03/012005/03/01

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DCIN & DETECTOR

D

35 46Friday, April 2 1, 2006

1.0

of

A

B

C

D

PH1 under CPU botten side :

CPU thermal protection at 84 degree C
Recovery at 45 degree C

VL VS

+3VALWP

VMB

PL2

FBMA-L18-453215-900LMA90T_1812

1 2

12

PC15
1000P_0402_50V7K

ALI/MH# 29,37

+3VALWP

BATT_TEMPA 29

EC_SMB_DA1 29,30

BATT+

12

PC16

0.01U_0402_25V7K

PR32

PC14

TM_REF1

12

PC18

1000P_0402_50V7K

12

3
2

12

PR39
100K_0402_1%

100K_0402_1%

100K_0603_1%_TH11-4H104FT

PH1

PC17

0.22U_0805_16V7K

12

12

0.1U_0603_25V7K

12

PR36

22K_0402_1%

13.7K_0402_1%

1 2

PH2 near main Battery CONN :

BAT. thermal protection at 79 degree C
Recovery at 45 degree C

8

+

-

4

PR37

1 2

P

G

47K_0402_1%

PU3A

LM393DG_SO8

1 1

2 2

PJP2

BATT+

ID
B/I
TS

SMD
SMC

SUYIN_250005MR007G132ZR@

GND

BATT_S1

1

ALI/NIMH#

2

AB/I

3

TS_A

4

EC_SMDA

5

EC_SMCA

6
7

PR34

100_0402_5%

1 2

1 2

1K_0402_1%

PR35
100_0402_5%

PR40

1K_0402_1%

PR29

1 2

12

12A_65VDC_451012

12

PR33
1K_0402_1%

PF2

21

1 2

PR30

47K_0402_1%

PR38

6.49K_0402_1%

12

PR31

O

12

VL

PR28
47K_0402_1%

1 2

2

1

1SS355_SOD323

PD7

12

MAINPWON 4,16,35,38

13

PQ4

DTC115EUA_SC70

VL

EC_SMB_CK1 29,30

VLVL

12

100K_0603_1%_TH11-4H104FT

PQ5

12

PC20

TP0610K-T1-E3_SOT23

0.22U_1206_25V7K

13

2

+VSBP

12

PC21

0.22U_0805_16V7K

0.1U_0603_25V7K

3 3

B+

12

PR45

PR46

VL

22K_0402_1%

1 2

100K_0402_1%

PR47

PR48

1 2

100K_0402_1%

0_0402_5%

POK38,39

1 2

13

D

2

G

PQ6

S

PC22

RHU002N06_SOT323

12

PH2

PR43

10.7K_0402_1%

1 2

TM_REF1

PR44
22K_0402_1%

12

12

PC19

47K_0402_1%

1 2

5

+

6

-

PR42

8

P

G

4

PU3B

7

O

LM393DG_SO8

PR41
47K_0402_1%

1 2

1SS355_SOD323

PD8

12

0.1U_0402_16V7K

@

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Deciphered Date

C

2006/03/012005/03/01

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

BATTERY CONN / OTP

D

36 46Friday, April 2 1, 2006

1.0

of

A

B

C

D

Iadp=0~3.125A

12

B+

PU4
MB39A126PFV-ER_SSOP24

1

-INC2

2

OUTC2

3

+INE2

4

-INE2

5

ACOK

6

VREF

7

ACIN

8

-INE1

9

+INE1

10

OUTC1

11

SEL

12

-INC1

+INC2

GND

VCC

OUT

XACOK

-INE3

FB123

+INC1

24

23

22

CS

21

20

19

VH

18

17

RT

16

15

14

CTL

13

BATT_OVP29

PC32

0.1U_0603_25V7K

PR62
47K_0402_1%

MB39A126

PR56
100K_0402_1%

PC34
2200P_0402_50V7K

1 2

PR67

1 2

100K_0402_1%

2

PR49

0.02_2512_1%

1
2

12

PR65
10K_0402_1%

13

PQ16
DTC115EUA_SC70

4
3

PQ8

AO4407_SO8

8

PQ10

47K

2

13

PQ13
DTC115EUA_SC70

7
5

4

47K

FSTCHG29

1 3

2

G

VIN

1 1

12

PR51

47K_0402_5%

DTA144EUA_SC70

2

13

D

ACOFF#

PACIN35,38

ACON35

2

G

S

PQ14
RHU002N06_SOT323

PD10
RLS4148_LLDS2

1 2

PR70
22K_0402_1%

1 2

2 2

3 3

4 4

P2

1
2
36

12

PC23

0.1U_0603_25V7K

12

PR59

150K_0402_1%

IREF 29

13

D

PQ15

S

RHU002N06_SOT323

IREF=0.932*Icharge
IREF=0.466~3.1V

+3VALWP

2

12

PR50

200K_0402_1%

PR64
162K_0402_1%

12

PR71

13

PQ18
DTC115EUA_SC70

1 2

47K_0402_5%

PQ9
AO4407_SO8

1
2
3 6

4

PR55
10K_0402_1%

1 2

12

12

PR57

PC31

10K_0402_1%

0.01U_0402_25V7K

12

PR68

2

12

PR58

30K_0402_1%

12

PC33

12

100K_0402_1%

13

PQ17
DTC115EUA_SC70

8
7

5

MB39A126

0.22U_0603_16V7K

PC39

0.01U_0402_25V7K

CS

P3

PC28
4700P_0402_25V7K

1 2

PR61
1K_0402_1%

1 2

VL

ALI/MH#29,36

Charge voltage
3S CC-CV MODE : 12.6V (SEL=L , ALI/MH#=3.3V)
4S CC-CV MODE : 16.8V (SEL=H , ALI/MH#=0V)

Fosc=14100/Rt=14100/47=300KHz

PJ9

2

112

JUMP_43X118@

P2

12

PR53

0_0603_5%

PC29

0.22U_0603_16V7K

1 2

1 2

PR66
33K_0402_1%

1 2

PC40
10P_0402_50V8J

1 2

CS

1 2

PC30

0.1U_0603_25V7K

1 2

PC35
1500P_0603_50V7K

1 2

VIN

1

0

12

PC24

4.7U_1206_25V6K

12

PR63

47K_0402_5%

12

PR69

47K_0402_5%

VS

8

PU5A

3

P

+

2

-

G

LM358DT_SO8

4

12

PC25

4.7U_1206_25V6K

36

241

578

LXCHRG

12

PD14

@

PC41
47P_0402_50V8J

1 2

12

PC42

0.01U_0402_25V7K

CHG_B+

12

12

PQ11
AO4407_SO8

PL3
16UH_LF919AS-160M=P3_3.7A_20%

12

PD9

EC31QS04

EC31QS04

VMB

12

PR72

340K_0402_1%

12

PR73

499K_0402_1%

12

PR74

105K_0402_1%

PC26

0.1U_0603_25V7K

1 2

PC27

12

PQ7
AO4407_SO8

2200P_0402_50V7K

1
2
3 6

PR60

0.02_2512_1%

1
2

4

PR52
47K_0402_1%

1 2

PR54

10K_0402_1%

1 2

ACOFF#MB39A126

13

2

PQ12
DTC115EUA_SC70

4
3

8
7

5

CC=3A , IREF=3.144V
(100K/(100K+162K))*3.144V=1.2V

1.2/(20*0.02)=3A

CP Point=3.125A
5V*(10K/(30k+10k))=1.25V

1.25V/(20*0.02)=3.125A

LI-3S :13.5V----BATT-OVP=1.5V

PC43

LI-4S :18V----BATT-OVP=2V
BATT-OVP=0.111*BATT+

0.01U_0402_25V7K

ACOFF

Charger

VIN

ACOFF 29

BATT+

12

12

PC36

4.7U_1206_25V6K

PC37

4.7U_1206_25V6K

BATT+

12

PC38

4.7U_1206_25V6K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Deciphered Date

C

2006/03/012005/03/01

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

CHARGER

D

37 46Friday, April 2 1, 2006

1.0

of

5

4

3

2

1

+3.3VALWP/+5VALWP

GND

12

20

V+

PC61

PR77

10_1206_5%

12

PC52

13

TON

LDO3

25

12

4.7U_0805_6.3V6K

BST_3V

1 2

0.1U_0603_25V7K

17

VCC

PGOOD

PRO#

10

1 2

VL

12

PC49

47_0402_5%

0.1U_0402_16V7K

PR75

2VREF_8734

PC54

1 2

1U_0603_6.3V6M

ILIM3

5

ILIM3

ILIM5

11

ILIM5

28

BST3

26

DH3

24

DL3

27

LX3

22

OUT3

FB3

MAX8734AEEI+_QSOP28

PR93

0_0402_5%

FB3

7
2

B+++

PQ19

PQ21

1 2

1 2

5

4

5

4

PR89

6.81K_0402_1%

PR92

10K_0402_1%

D8D7D6D

S1S2S3G

D8D7D6D

S1S2S3G

12

PL5

4.7U_LF919AS-4R7M-P3_5.2A_20%

+3VALWP

1

+

PC59
150U_V_6.3VM_R18

2

12

12

PC44

PC45

4.7U_1206_25V6K

PR84

1 2

SI4800BDY-T1-E3_SO8

DH_3V

SI4810BDY-T1-E3_SO8

DL_3V

PR79

PR80

1 2

1 2

200K_0402_1%

200K_0402_1%

PR82

340K_0402_1%

BST_3V-1
DH_3V-1

PR83

1 2

PR85

0_0603_5%

340K_0402_1%

12

LX_3V

POK 36,39

1 2

4.7U_1206_25V6K

PC56

0.1U_0603_25V7K

12

0_0603_5%

BST_5V

2

2.2U_0805_25V6K

14
16
15

19
21

12

12

9
1

6
4
3

8

0.22U_0603_10V7K

PU6

BST5
DH5
LX5

DL5
OUT5
FB5
N.C.

SHDN#
ON5
ON3

SKIP#
REF

3

1

12

PR76

10_1206_5%

12

PC51

2.2U_0805_25V6K

18

B+++

LD05

23

D D

PJ10

B+

112

JUMP_43X118@

C C

B B

B+++

2

12

12

PC47

PC46

4.7U_1206_25V6K

4.7U_LF919AS-4R7M-P3_5.2A_20%

+5VALWP

1

+

PC57

2

150U_V_6.3VM_R18

4.7U_1206_25V6K

PL4

PR87

10.5K_0402_1%

1 2

PR91

1 2

6.81K_0402_1%

12

PC48

2200P_0402_50V7K

12

PD12

1 2

VS

RLZ5.1B_LL34

MAINPWON4,16,35,36

D8D7D6D

S1S2S3G

D8D7D6D

S1S2S3G

1 2

47K_0402_1%

100K_0402_1%

5

PQ20
SI4800BDY-T1-E3_SO8

4

DH_5V

5

PQ22
SI4810BDY-T1-E3_SO8

4

DL_5V

PR86

PR90

0_0402_5%

PR78

0_0603_5%

1 2

12

12

PR95

DH_5V-1

PC55

0.1U_0603_25V7K

12

PACIN35,37

PC58

2.2U_0805_25V6K

@

VL

12

PR94

806K_0603_1%

12

PR88

1 2

10K_0402_1%

DAP202U_SOT323

PC53

PR81

0_0603_5%

2VREF_8734

VL

4.7U_0805_6.3V6K

LX_5V

12

12

FB5

PD11

PC50

BST_5V-1

12

PC60

12

0.047U_0603_16V7K

A A

5

PC62

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/06/23 2006/10/22

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

2

Date: Sheet

+5V/+3V

HAWAA(LA3141)

Friday, April 21, 2006

1

38 46

of

1.0

A

B

C

D

PJ11

2

1 2

1 2

112

JUMP_43X118@

12

PC78

0.01U_0402_25V7K

12

12

BST_1.8V-1

12

1 2

PR101

0_0603_5%
PR105

1 2

12

PC64

4.7U_1206_25V6K

1

2

0.01U_0402_25V7K

1 2

PR98

0_0603_5%

3

0.1U_0603_25V7K
PD13

DAP202U_SOT323

PC70

12

PC68

BST_1.2V-1

12

6

5
4

ISE_1.8V ISE_1.2V
DL_1.8V

7
2

PC63

4.7U_1206_25V6K

1 1

4.7U_0805_6.3V6K

PC67

5

D8D7D6D

+1.8V

+1.8VALWP

1.8U_D104C-919AS-1R8N_9.5A_30%

12

12

PC75

0.01U_0402_25V7K

1

+

PC74
220U_6.3V_M_R13

2

PR103

2 2

10.2K_0402_1%

PL6

1 2

680P_0603_50V8J

PR107
0_0402_5%

1 2

PQ23

SI4800BDY-T1-E3_SO8

LX_1.8V

PR100

4.7_1206_5%

1 2

PC76

1 2

S1S2S3G

D8D7D6D

S1S2S3G

4

DH_1.8V-2

PC72

0.1U_0402_16V7K

5

PQ25
SI4810BDY-T1-E3_SO8

4

2K_0402_1%

3

9

10
15
11

12

PR118
100K_0402_1%

8

PR113

10K_0402_1%

+3VALWP

12

PR116

0_0402_5%@

1 2

PR110

0_0402_5% @

1 2

POK36,38

PR112

0_0402_5%

12

PC80

0.1U_0402_16V7K@

1 2

0_1206_5%

PU7

SOFT1

BOOT1

UGATE1
PHASE1

ISEN1
LGATE1

PGND1

VOUT1
VSEN1
EN1
PG1

OCSET1

PR96

12

12

12

12

PC65

+5VALWP

PR97

2.2_0603_5%

1 2

14

28

VCC

SOFT2

VIN

BOOT2

UGATE2
PHASE2

ISEN2

LGATE2

PGND2

VOUT2

VSEN2

EN2

PG2/REF

GND

1

OCSET2

DDR

ISL6227CAZ-T_SSOP28

13

12

PC69

2.2U_0805_10V6K

PC71

0.01U_0402_25V7K

12

17

BST_1.2V-2BST_1.8V-2

1 2

23

PR99
0_0603_5%

DH_1.2V-1 DH_1.2V-2DH_1.8V-1

24
25

22
27

26

20
19
21
16

18

12

PR117
100K_0402_1%

PC73

0.1U_0402_16V7K

1 2

PR102

0_0603_5%
PR106

2K_0402_1%

1 2

SI4810BDY-T1-E3_SO8

DL_1.2V

1 2

PR111
0_0402_5%

12

PC81

0.1U_0402_16V7K@

4.7U_1206_25V6K

5

D8D7D6D

PQ24

12

LX_1.2V

PQ26

SI4800BDY-T1-E3_SO8

S1S2S3G

4

1.8U_D104C-919AS-1R8N_9.5A_30%

5

D8D7D6D

1 2

S1S2S3G

4

1 2

VSE_1.2VVSE_1.8V

SUSP# 25 , 29 ,30,34,40

PR104

4.7_1206_5%

PC79
680P_0603_50V8J

PL7

1 2

0_0402_5%

PR114

0_0402_5%@

PC66

4.7U_1206_25V6K

PR108

B+

+1.2V

12

PR109

2.21K_0402_1%

12

PR115

6.49K_0402_1%

+1.2VSP

1

+

PC77
220U_6.3V_M_R13

2

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Deciphered Date

C

2006/03/012005/03/01

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

1.8V / 1.2V

D

39 46Friday, April 2 1, 2006

1.0

of

5

4

3

2

1

+1.2VS

+5VS

12

D D

PU8

7

8

13

D

PQ27
RHU002N06_SOT323

S

@

POK

EN

PR119

0_0402_5%

SUSP#

1 2

12

PC87

0.01U_0402_25V7K@

PR122

0_0402_5% @

SUSP34

1 2

0.01U_0402_25V7K@

C C

PC88

2

G

12

PC82

1U_0603_6.3V6M

6

5

VIN

4

VOUT

VCNTL

3

VOUT

2

FB

9

VIN

GND

1

APL5912-KAC-TRL_SO8

1

PJ12

1

JUMP_43X79

2

2

12

PC83
22U_1206_6.3V6M

PR120

316_0402_1%

12

12

PR121

1K_0402_1%

12

PC86

0.01U_0402_25V7K

PC84

+1.05VSP

1

12

+

PC85

150U_D_6.3VM@

2

22U_1206_6.3V6M

+1.8V

1

PJ13

1

JUMP_43X79@

2

2

PC89

10U_1206_6.3V7K

12

PR123

1K_0402_1%

12

PQ28

RHU002N06_SOT323

PR125

0_0402_5%

SUSP34

1 2

0.1U_0402_16V7K@

PC93

13

D

2

G

12

S

PR124

1K_0402_1%

12

PC91

0.1U_0402_16V7K

12

PU9

VIN1VCNTL

2

GND

3

VREF

4

VOUT

APL5331KAC-TRL_SO8

+0.9VSP

12

PC92
10U_1206_6.3V7K

6
5

NC

7

NC

8

NC

9

TP

+3VALWP

12

PC90
1U_0603_6.3V6M

B B

PJ14

+3VALWP +1.5VSP

112

JUMP_43X118 @

2

12

PC94
1U_0603_6.3V6M

SUSP#25,29,30,34,39

A A

5

PR126

0_0402_5%

12

PC97

0.1U_0402_16V7K @

1 2

PU10

1

IN

2

GND
SHDN3BYP

G914GF_SOT23-5

OUT

5

12

PC96

0.33U_0603_10V7K

12

PC95
1U_0603_6.3V6M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Deciphered Date

2006/03/012005/03/01

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

1.05V / 0.9V / 1.5V

40 46Friday, April 2 1, 2006

1

of

1.0

4

4

5

4

3

2

1

+5VS

DH1_CPU-2

PQ30
IRF8113PBF_SO8

241

DL1__CPU

1 2

PQ34
IRF8113PBF_SO8

DL2__CPU

CPU_B+

3 5

241

578

IRF8113PBF_SO8

3 6

241

PR150 0_0402_5%

1 2

PR159
3K_0603_1%@

1 2

PC114

470P_0402_50V8J

29.6

3 5

241

IRF8113PBF_SO8

578

3 6

241

12

PC99

10U_1206_25VAK

PQ29
SI7840DP-T1-E3_SO8

12

4.7_1206_5%

PR138

12

PQ31

1 2

PQ32
SI7840DP-T1-E3_SO8

PQ33

12

12

12

12

12

PC102

PC101

PC100

0.1U_0603_25V7K

10U_1206_25VAK

10U_1206_25VAK

PL9

P_0.36H_ETQP4LR36WFC_24A_20%

PR140

3.48K_0402_1%

2.1K_0402_1%

1 2

PR144

1 2

10KB_0603_5%_ERTJ1VR103J

PC108

680P_0603_50V7K

PC112 0.022U_0402_16V7K@

1 2

PC110 0.22U_0603_16V7K

1 2

1 2

PR156 10_0402_5%

PC113
4700P_0402_25V7K

PC117

10U_1206_25VAK

PR169

12

4.7_1206_5%

PR170

2.1K_0402_1%

PC121

3.48K_0402_1%

1 2

680P_0603_50V7K

1

+

2

PL8

1 2

PC104

220U_25V_M@

+CPU_CORE

FBMA-L18-453215-900LMA90T_1812

12

PC103

2200P_0402_50V7K

12

PH3

1 2

NTC

12

PR143 10_0402_5%

CPU_VCC_SENSE

CPU_B+

12

PC118

10U_1206_25VAK

12

PC119

10U_1206_25VAK

12

12

PL10

P_0.36H_ETQP4LR36WFC_24A_20%

PR171

NTC

1 2

PH4

10KB_0603_5%_ERTJ1VR103J

VCCSENSE

1 2

PR127

12

PR128
10_0402_5%

D D

NTC

100K_0402_5%

PR132

1 2

PR133 0_0402_5%
PR135 0_0402_5%
PR136 0_0402_5%
PR137 0_0402_5%
PR139 0_0402_5%
PR141 0_0402_5%
PR142 0_0402_5%

C C

PR146 499_0402_1%
PR147 0_0402_5%
PR149 0_0402_5%

DPRSLPVR4,15
H_DPRSTP#4

+3VS

CPU_VID05
CPU_VID15
CPU_VID25
CPU_VID35
CPU_VID45
CPU_VID55
CPU_VID65

PSI#5

1 2

1 2

1 2

1 2

PR130

13K_0402_5%

12
12
12
12
12
12

PR145 71.5K_0402_1%

PC111 0.22U_0603_16V7K

1 2

1 2

VCC

12
12

PC109470P_0402_50V8J

PR153

10K_0402_1%

1 2

PR163

10K_0402_1%@

PR157

0_0402_5%

VGATE17

CLK_ENABLE#12

VR_ON29

1 2

0_0402_5%
PR160

1 2

1 2

PR162

0_0402_5%

1 2

B B

POUT29

1 2

PR154

10K_0402_1%

PC120

0.1U_0402_16V7K

1 2

PR165

56_0402_5%

1 2

PR167 10K_0402_1%

+3VS

12

5VS1

PC106
1U_0603_6.3V6M

1 2

PU11

19

Vcc

6

THRM

31

D0

32

D1

33

D2

34

D3

35

D4

36

D5

37

D6

7

TIME

9

CCV

11

REF

39

DPRSLPVR

40

DPRSTP

3

PSI

2

PWRGD

1

CLKEN

38

SHDN

5

VRHOT

4

POUT

MAX8770GTL+_TQFN40

VSSSENSE5

12

0_1206_5%

PC105

2.2U_0603_6.3V6K

VDD
TON

BST1

DH1

LX1
DL1

PGND1

GND
CSP1
CSN1

FB

CCI

DH2

BST2

LX2
DL2

PGND2

CSP2
CSN2

GNDS

41

VSSSENSE

12

12

PR129

200K_0402_5%

1 2

25
8
30
29
28
26

2.2_0603_5%

BST1_CPU BSTM1_CPU

PR134

1 2

DH1__CPU-1
LX1__CPU
DL1__CPU

27
18

CSP1__CPU

17

CSN1_CPU

16

FB_CPU

12

CCI_CPU

10

DH2_CPU-1

21

BST2_CPU

20

LX2_CPU

22

DL2__CPU

24
23

CSP2_CPU

14

CSN2__CPU

15
13

TP

PC115

4700P_0402_25V7K

1 2

PR164

10_0402_5%

10_0402_5%

PR168

1 2

12

PC98

0.01U_0402_25V7K

0.22U_0603_16V7K

PR152

1 2

2.2_0603_5%

BSTM2_CPU

12

PC116

0.22U_0603_16V7K

PC107

1 2

0_0603_5%

PR131

1 2

PR151 3K_0603_1%@

PR155 3.32K_0402_1%

1 2

NTC

PR158

3K_0603_1%@

1 2

PR161

20K_0402_1%

0_0603_5%

PR166

1 2

578

3 6

1 2

1 2

DH2_CPU-2

578

3 6

241

+CPU_CORE

PR148
0_0402_5%

B+

12

PC123

680P_0603_50V7K

5

1 2

A A

PR172 0_0402_5%

1 2

PC122 0.22U_0603_16V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.

2005/06/20 2006/06/20

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

+CPU_CORE

41 46Friday, April 2 1 , 2006

1

1.0

of

5

D D

C C

AZ_SDOUT_MOM16
AZ_SYNC_MOM16

AZ_SDIN1_MOM16

AZ_RST_MOM#16 AZ_BITCLK_MOM 16

PJ18

2

112

JUMP_43X39

@

R824

1 2

0_0805_5%

GND

AZ_SDOUT_MOM
AZ_SYNC_MOM

AZ_SDIN1_MOM

C858

47P_0402_50V8J

47P_0402_50V8J

C859

47P_0402_50V8J

AC17 47pF@

4

C860

C861

47P_0402_50V8J

GND

AR15
100

AJ1

1

GND
AC97_SDATA_OUT3RSVD

5

GND

7

AC97_SYNC

9

AC97_SDATA_IN
AC97_RESETN11AC97_BITCLK

13

MT1

1

AM1

10K

2
3
4
5

6

15

@

MTG_HOLE@

SDATA_IN
SDATA_OUT
SYNC
BITCLK

ASEL
RESET_N

GND

AR13

MDC1.5 MODEM MALE@

+3.3V

VDD1VDD7VDD

LSEL/GPO0

VSS8VSS

11

9

TSEL

XFRP
XFRN

GPIO1

SV92A3_16

BLM21AG601SN1

+3VALW

AU1

14

13
12

10
16

RSVD

3.3V
GND
GND

MT2

3

AFB3

2
4
6
8
10
12

14

AC18

0.1uF
AC15

0.1uF

AR14
10K

+3.3V

GND

@

AC13
10uF

P-XFRP 43
P-XFRN 43

AZ_BITCLK_MOMAZ_RST_MOM#

C862

47P_0402_50V8J

2

1

GND

B B

GND

A A

5

4

AM2

1

MTG_HOLE@

3

AC-97 Line Select:

-Line 1: DNP R14

-Line 2:
POPULATE R14

Compal Electronics, Inc.

123

Design Engineer: C. Russo

Title

DELPHI SV92A3 MDC 1.5 Reference Design

Size Document Number Rev

B

HTW2E(LA-3201P)

2

Date: Sheet

42 46Friday, April 28, 2006

1

1.0

of

5

4

3

2

1

See FUSE Note, bottom of page.

AFB1

D D

AU2 CSP1040_TSSOP20

1

VDDA

2

VDDD

C C

AC9

2.2uF

DAA

3
6
7

TSTCLK
SCL
SDA

CSP1040
TSSOP_20

POLARIS

ATX1

1

Locate C11, C12
as close to
digital device as
possible.

B B

P-XFRP42

P-XFRN42

AC11

22pF

GND

AC12
22pF

GND

@

@

4

2 3

P950003

FUSE Note:
The UL standard UL 1950 dictates the use of a fuse (needed to pass the
M1, 600 V, 40A, 1.5 sec) to prevent component flaming during the
overvoltage test. Unless one can insure that the modem is in a fire
enclosure and provide 26 gauge line cord (acts as a fuse), a fusing
element wou l d be required.

A A

DAA

4

XFRP

5

XFRN

8

GPIO0

9

GPIO1

10

VSS

VSS_PAD

21

DAA

TDC
RDC

HS1

HS2

RXAC

RXDC

LMS

ACM
GYC

20
19
18

17

11

DAA

12

14

LM

15

16
13

475K 1%

E C

AC5

0.015uF

AR5

4.99K 1% 1/4W

AR5A

4.99K 1% 1/4W

AC7
4700pF

AR8

DAA

AR1 15M 1%

AR2 15M 1%

AQ3

MMBTA42

B

AC14

0.027uF

DAA

AC6

0.015uF

DAA

B

AQ5

PMBTA06

AR6

340 1%

AC8

0.47uF

AD1
CMPD2004S

AD2
CMPD2004S

AC3 0.047U_0603_50V7K

AR3 100K 1%

AR11
665K, 1%

MMBTA92

AR4

E C

1.5K 1%

1

AR7

6.8 1%

0.015uF

32

AQ4
PHILIPS BCP53-16

4

Collector Heat Sink Area

DAA

B

AQ2

AC4

2

2

AR10

487K, 1%

EC

AQ1
MMBTA92

A K

330pF

1

1

DAA

330pF

AD3
BZT52C43

AC1

AC2

3

3

B

EC

DAA

Alternatively , i f a T N V-1 flame resistant material is used, either as a
wrap or cover over the DAA portion of the modem, this could satisfy both
overvoltage protection and the separation requirement also contained in
UL 1950. This latter requirement provides isolation such that unearthed
parts of the D AA cannot be touched by a test finger or test probe.

5

4

3

2

BLM21AG601SN1

GND

AFB2
BLM21AG601SN1

GND

Compal Electronics, Inc.

123

Design Engineer: R. Trevino

Title

DELPHI SV92A3 MDC 1.5 Reference Design

Size Document Number Rev

B

HTW2E(LA-3201P)

Date: Sheet

P3100SB

2 1

ASID1

AF1
0466005

AC19

0.012uF

@

1

AE1@

1

AJ2

1
2

E&T

AE2@

1

1.0

43 46Friday, April 28, 2006

of

5

4

3

HW4 Product Improvement Record (P.I.R.)

2

1

Phase: A to B Date: 2006/01/04

Page#

D D

12
13

Action Plan
(add; del; change)

Modify
Add

13

Location or
Net_List

C808..C811
R57 R59Change 75_0402_1% BOM item reducing

Before value
(Attached file)

75_0603_1%

14 Change R1 R2 R3 75_0603_1%
15 Modify

PCICLK

Circuit
17 Add
24 R754 0_0402_5% Mount Diode

Delete
26 Add R777
29
30
9 Change C29 22U_1206 22U_0805 BOM Reducing

C C

10 Change C176 C177 22U_1206 22U_0805 BOM Reducing

Change 0_0402_5% 8.2K_0402_5% Change Board ID from 0 to 1

Delete R177 0_0402_5%

26 Change C356 22U_1206 22U_0805 BOM Reducing
30 Add C813 C814 220P_0402 For EMI request
25 Change C632 C383 680P_04020.1u_0402 For EMI request

33 Add

16 Modify

25 Add

26 Add
31
26 Add

B B

Add C820~C830

Debug Card
Circuit
GPIO8, 40, 46
pull down
R788 R785
Q59 R786 C819
Gain setting
circuit

R797 to R801
Q60 Q61

After value
(Attached file)

220P_0402

75_0402_1% BOM item reducing
Mount U32 and
relation circuits

10U_0805C812 For BOM reducing

100K_0402_5%

10K_0402

100P_0402 For EMI debug

Writer: Timo Teng

Detail Discretion and Root Cause

For avoid 14M CLK reflectionR266 R252
For EMI request

For EMI request

Add pull high resistor on NBA_PLUG

No using

For Debug

For ATI suggestion.

For microphone sense of HD codec

For adjusting the gain of amplifier by EC

For Gain adjusting

Rev.

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

DL/DM Check

Phase: B to C Date: 2006/02/28 Writer: Timo Teng

12
12

Add C813 @33P_0402 For ATI PA recommendation
Add

Q62 U36 R802
C832 C833 D42

2N7002, 7400, 200K

0.1U, 330P, CH751

For ATI PA recommendation

26 Change R800 3.3K_0603 3.3K_0402 Change the size of resistor 0.3
29 Change R101 8.2K_0402 18K_0402_5% Change Board ID for 02 to 03
20 Delete Q31 Q1 DTA114YKA Meet the reltek reference circuit

24 Add

25 Add

A A

26 Add

5

R446 R447

D443 SW7
U37 relation
circuit
U15 JP34 JP35
SW8 relation
circuits

MAX4411 and
relation circuits

TPA0232 APA2068

HP and Mic Jack
VR relation circuits

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Add Kill switch circuit and W/L LED circuit from
sub board.

Meet the VISTA standard design

Move the audio board circuit to M/B

Compal Secret Data

Deciphered Date

3

2006/11/012005/11/01

2

Title

Size Document Number Rev

Date: Sheet

0.3

0.3

0.3

0.3

0.3

0.3

0.3

Compal Electronics, Inc.

PIR

44 46Friday, April 21 , 2006

1

1.0

of

5

4

3

HW4 Product Improvement Record (P.I.R.)

2

1

Phase: C to PreMP Date: 2006/04/18

Page#

D D

26
33

28

Action Plan
(add; del; change)

ADD
ADD
ADD

Location or
Net_List

PJ15 PJ16
R823 C857

CLP1 CLP2
42 ADD R824, C858~C862 0 ohm and 47P
28

ADD

PJ17

42 ADD PJ18

Before value
(Attached file)

After value
(Attached file)

JUMP FOR EMI REQUEST 1.0

0 ohm and 22p

CLIP FOR EMI REQUEST

JUMP
JUMP

Writer: Timo Teng

Detail Discretion and Root Cause

FOR EMI REQUEST

FOR EMI REQUEST
FOR EMI REQUEST
FOR EMI REQUEST

Rev.

1.0

1.0

1.0

1.0

1.0

DL/DM Check

ADD R825, C86325 0 ohm and 22p FOR EMI REQUEST 1.0

6 C713, C715Modify 1.0FOR ESD Solution@330U 330U

R714, R717 33_0402 47_0402 FOR EMI REQUESTModify16

C C

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Deciphered Date

2006/11/012005/11/01

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

PIR

45 46Friday, April 28 , 2006

1

1.0

of

5

4

3

2

1

POWER PIR LIST

page Reason for change

41 Add 680P at B+ near CPU core for EMI requirement Add PC123(680P_0603_50V) at B+ near CPU CORE

D D

38 Adjust 3V/5V OCP to 8A Change PR79,PR80 to 200K_0402_1%, PR82,PR83 to 340K_0402_1%, PL4,PL5 to 4.7uH

41 Adjust CPU CORE loadline Change PR155 to 3.32K_0402_1%, PR156,PR164=10_0402_5%, PC115=4700P_0402_25V,PR148=0_0402_5%, Unpop PR151,PC112

C C

Modify list

Change PR103 from 10K_0402_1% to 10.2K_0402_1%39 Increase 1.8VALWP to 1.82V for HW requirement

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Deciphered Date

2006/11/012005/11/01

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

POWER PIR

46 46Friday, April 21 , 2006

1

1.0

of