Compal LA-3121P, Aspire 3100, Aspire 5100, Aspire 5110, Extensa 5010 Schematic

A

1 1

B

C

D

E

2 2

Compal Confidential

HCW51 Schematics Document

AMD/Sempron/ATI RS485MC/SB460

2006 / 04 / 27 FOR MP

3 3

4 4

Rev:1.0

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/09 2006/03/08

C

Compal Secret Data

Deciphered Date

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-3121P

Size Document Number Rev

Custom

401411

Date: Sheet

星期一

08, 2006

D

五月

151,

E

D

of

5

4

3

2

1

Compal confidential

Project Code: HCW51
File Name : LA-3121P

D D

Thermal Sensor
ADM1032ARM

page 8 page 17

Clock Generator
ICS951462

AMD Turion/Sempron CPU

Socket S1 638P

H_A#(3..31)

page 6,7,8,9

DDRII DDRII-SO-DIMM X2

Dual Channel

H_D#(0..63)

HT 16x16 800MHZ

533/667

page 10,11

CRT & TV-OUT

page 24

LCD CONN

page 25

ATI-RS485MC

465 BGA

page 12,13,14,15,16

A-Link Express

2 x PCIE

C C

USB 2.0

PCI BUS

ATI-SB460

549 BGA

AC-LINK

USB 2.0

Mini PCI Socket
Mini card RTL8110SCL

page 31

Realtek
RTL8100CL

page 26

ENE Controller

CB714

page 32

1394 Controller
VT6311S

page 35

page 18,19,20,21,22

SATA

B B

page 27

RJ45 CONN

Slot 0

page 33

6in1 CardReader
Slot

page 33

1394
Conn.

page 35

LPC BUS

PATA

One Channel

USB conn x 2 / New card

BT Conn

page 38

Audio CKT
ALC883

page 39

MDC Conn.

page 41

page 34

AMP & Audio Jack

SATA HDD Conn.

page 23

HDD Conn.

page 40

CDROM Conn.

page 23

Power On/Off C KT / LID switch / Power OK CKT

DC/DC Interface CKT.

page 41

CIR/LED

page 38

page 37

RTC CKT.

page 18

SMsC LPC47N207

page 36

ENE KB910

page 28

Power Circuit DC/DC

page 42~48

A A

5

4

FIR module

page 36

Security Classification

Issued Date

THIS SHEET OF ENG INEE RIN G DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY O R DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Touch Pad
CONN.

2005/05/09 2006/03/08

page 29

Compal Secret Data

Deciphered Date

Int. KBD

page 29

BIOS

page 30

2

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-3121P

Size Document Number R ev

Custom

401411

Date: Sheet

星期一 五

08, 2006

月

251,

1

of

D

5

Voltage Rails

Power Plane Description

D D

C C

VIN
B+
+CPU_CORE
+0.9V 0.9V switched power rail for DDR terminator
+1.2VS
+1.5VS

+1.8VALW 1.8V always on power rail O N ON ON*

+1.8V 1.8V power rail for DDR
+1.8VS 1.8V switched power rail
+2.5VS

+3VALW

+3VS

+5VALW

+5VS

Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU

1.05V switched power rail

1.5V switched power rail

2.5V switched power rail

3.3V always on power rail

3.3V switched power rail

5V always on power rail

5V switched power rail

4

S1 S3 S5

N/A N/A N/A

ON OFF
ON ON
ON OFF OFF
ON OFF OFF

ON
ON OFF
ON

ON

ON

ON

ON OFF
ON
ON+RTCVCC

ON
OFF
OFF

ON

OFF

ON

OFF

ONRTC power

N/AN/AN/A
OFF
OFF

OFF

OFF

ON*

OFF

ON*

ON*ONVSB always on power rail+VSB
ON

3

SIGNAL

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SLP_S1# SLP_S3#

HIGH HIGH HIGH

LOW

LOW

LOW LOW LOW LOW

SLP_S4# SLP_S5# +VA LW +V +VS Clock

HIGH

LOW

Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0
1
2
3
4
5
6
7 NC

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

0

8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%

AD_BID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

2

LOWLOWLOW

ON

HIGH

HIGHHIGHHIGH

HIGH

HIGH

ON

ON

ON

ON

ON

V typ

AD_BID

ON

ON

OFF

OFF

V

AD_BID

0 V 0 V

0.503 V

0.819 V

1.185 V 1.264 V

2.200 V

3.300 V

ON ON

ON

OFF

OFF

OFF

max

0.538 V

0.875 V

2.341 V

3.300 V

1

LOW

OFF

OFF

OFF

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

External PCI Devices

Device IDSEL# REQ#/GNT# Interrupts

CardBus(SD)
1394
LAN(10/100)
Mini-PCI(WLAN/TV-Tuner)

B B

EC SM Bus1 address

Device

Smart Battery
EEPROM(24C16/02)

(24C04)

AD20
AD16 0
AD17
AD18

2

3
1

PIRQE/PIRQH
PIRQE
PIRQF
PIRQG/PORQH

EC SM Bus2 address

Address Address

1010 000X b
1011 000X b

Device

ADM1032

1001 100X b0001 011X b

SB460 SM Bus address

Device

Clock Generator

A A

(ICS951462)
DDR DIMM0
DDR DIMM2

5

Address

1101 001Xb

1001 000Xb

1001 001Xb

Security Classification

Issued Date

THIS SHEET OF ENG INEE RIN G DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY O R DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

BOARD ID Table

Board ID

0
1
2
3
4
5
6
7

SKU ID Table

SKU ID

0
1
2
3
4
5
6
7

2005/05/09 2006/03/08

3

PCB Revision

UMA
DISCRETE

SKU

W / O SATA
WITH SATA

Compal Secret Data

Deciphered Date

BTO Option Table

BTO Item BOM Structure

WITH TV-OUT
WITH FIR
WITH CARD READER
WITH 1394
WITH EXPRESS CARD EXPRESS@
WITH CIR CIR@
WITH LAN(10/100)

WITH GIGA LAN(8110SBL)
WITH GIGA LAN(8110SCL)
WITH PATA HDD
WITH SATA HDD
WITH BLUETOOTH
WITH USBx2
WITH LPC47N207
WITH SIO1036
WITH SIO BOTH
WITH SSC
W/O SSC

Compal Electronics inc

Title

SCHEMATIC, M/B LA-3121P

Size Document Number R ev

Custom

401411

Date: Sheet

星期一 五

08, 2006

2

月

TV@
FIR@
61@
1394@

100@
GIGA@WITH LAN(10/100/1000)
8110SB@
8110SC@
PATA@
SATA@
BT@
USB2@
SIO1@
SIO2@
SIOALL@
SPREAD@
NOSPREAD@
45@DIP CAP

351,

1

D

of

5

D D

4

3

2

1

PCI CLK0

33MHZ

PCI CLK1

33MHZ

HTREFCLK

66MHZ

NB-OSC

C C

B B

NEAR SO-DIMM REV SO-DIMM

2 PAIR MEM CLK

2 PAIR MEM CLK

ATHLON64 S1 CPU
LGA638 PACKAGE

1 PAIR CP U CLK

200MHZ

EXTERNAL
CLK GEN.

14.318MHZ

NB PCIE CLK

100MHZ

SB PCIE CLK

100MHZ

SB-OSCIN

14.318MHZ

PCIE CLK

100MHZ

PCIE CLK

100MHZ

SD CLK

48MHZ

SIO CLK

14.318MHZ

ATI NB - RS485MC

SB-OSCIN

14.318MHZ

PCI EXPRESS CARD - 1 LANE

MINI CARD - 1 LANE

SB-OSCIN

14.318MHZ

PCIE CLK

100MHZ

USB CLK

48MHZ

ATI SB

SB460

AZALIA_BITCLK

PCI CLK5

33MHZ

SIO CLK

14.318MHZ

25M Hz

PCI CLK2

33MHZ

PCI CLK3

33MHZ

SD CLK

48MHZ

PCI CLK4

33MHZ

LAN RTL8100CL

EC-CB714

MINI PCI SLOT

Cardbus
CB714

1394
VT6311S

SUPER IO

AZALIA CODEC

TP_CLK

TOUCH PAD

32.768K Hz

14.31818MHz

A A

Security Classification

Issued Date

THIS SHEET OF ENG INEE RIN G DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY O R DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/05/09 2006/10/10

Compal Secret Data

Deciphered Date

Compal Electronics inc

Title

SCHEMATIC, M/B LA-3121P

Size Document Number R ev

Custom

401411

Date: Sheet

星期一 五

08, 2006

2

月

451,

1

D

of

5

D D

C C

4

3

2

1

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENG INEE RIN G DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY O R DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/05/09 2006/10/10

Compal Secret Data

Deciphered Date

Title

Size Document Number R ev

2

Date: Sheet

Compal Electronics inc

SCHEMATIC, M/B LA-3121P

401411

星期一 五

08, 2006

月

1

551,

DCustom

of

5

4

3

2

1

PROCESSOR HYPERTRANSPORT INTERFACE

D D

H_CADIP15(12) H_CADOP15 (12)
H_CADIN15(12)
H_CADIP14(12)
H_CADIN14(12)
H_CADIP13(12)
H_CADIN13(12)
H_CADIP12(12)
H_CADIN12(12)
H_CADIP11(12)
H_CADIN11(12)
H_CADIP10(12)
H_CADIN10(12)
H_CADIP9(12)
H_CADIN9(12)
H_CADIP8(12)

C C

+1.2V_HT

B B

H_CADIN8(12)
H_CADIP7(12)
H_CADIN7(12)
H_CADIP6(12)
H_CADIN6(12)
H_CADIP5(12)
H_CADIN5(12)
H_CADIP4(12)
H_CADIN4(12)
H_CADIP3(12)
H_CADIN3(12)
H_CADIP2(12)
H_CADIN2(12)
H_CADIP1(12)
H_CADIN1(12)
H_CADIP0(12)
H_CADIN0(12)

H_CLKIP1(12)
H_CLKIN1(12)
H_CLKIP0(12)
H_CLKIN0(12)

R38 51_0402_1%

1 2

R37 51_0402_1%

1 2

H_CTLIP0(12)
H_CTLIN0(12)

VLDT_A x AND VLDT _B x ARE CONNEC T E D TO T HE LDT_RUN POWER
SUPPLY THRO UGH T HE PA CKA GE OR ON T HE DIE. IT IS ONLY CONNECTED
ON THE BOA RD T O DEC OUPLING NEA R THE CPU PACKA GE

+1.2V_HT

JP23A

H_CADIP15
H_CADIP14

H_CADIN14
H_CADIP13
H_CADIN13
H_CADIP12
H_CADIN12
H_CADIP11
H_CADIN11
H_CADIP10
H_CADIN10
H_CADIP9
H_CADIN9
H_CADIP8
H_CADIN8
H_CADIP7
H_CADIN7
H_CADIP6
H_CADIN6
H_CADIP5
H_CADIN5
H_CADIP4
H_CADIN4
H_CADIP3
H_CADIN3
H_CADIP2
H_CADIN2
H_CADIP1
H_CADIN1
H_CADIP0
H_CADIN0

H_CLKIP1
H_CLKIN1
H_CLKIP0
H_CLKIN0

H_CTLIP1
H_CTLIN1

H_CTLIP0
H_CTLIN0

D4

VLDT_A3

D3

VLDT_A2

D2

VLDT_A1

D1

VLDT_A0

N5

L0_CADIN_H15

P5

L0_CADIN_L15

M3

L0_CADIN_H14

M4

L0_CADIN_L14

L5

L0_CADIN_H13

M5

L0_CADIN_L13

K3

L0_CADIN_H12

K4

L0_CADIN_L12

H3

L0_CADIN_H11

H4

L0_CADIN_L11

G5

L0_CADIN_H10

H5

L0_CADIN_L10

F3

L0_CADIN_H9

F4

L0_CADIN_L9

E5

L0_CADIN_H8

F5

L0_CADIN_L8

N3

L0_CADIN_H7

N2

L0_CADIN_L7

L1

L0_CADIN_H6

M1

L0_CADIN_L6

L3

L0_CADIN_H5

L2

L0_CADIN_L5

J1

L0_CADIN_H4

K1

L0_CADIN_L4

G1

L0_CADIN_H3

H1

L0_CADIN_L3

G3

L0_CADIN_H2

G2

L0_CADIN_L2

E1

L0_CADIN_H1

F1

L0_CADIN_L1

E3

L0_CADIN_H0

E2

L0_CADIN_L0

J5

L0_CLKIN_H1

K5

L0_CLKIN_L1

J3

L0_CLKIN_H0

J2

L0_CLKIN_L0

P3

L0_CTLIN_H1

P4

L0_CTLIN_L1

N1

L0_CTLIN_H0

P1

L0_CTLIN_L0

FOX_PZ63823-284S-41F

L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10

L0_CADOUT_H9

L0_CADOUT_L9

L0_CADOUT_H8

L0_CADOUT_L8

L0_CADOUT_H7

L0_CADOUT_L7

L0_CADOUT_H6

L0_CADOUT_L6

L0_CADOUT_H5

L0_CADOUT_L5

L0_CADOUT_H4

L0_CADOUT_L4

L0_CADOUT_H3

L0_CADOUT_L3

L0_CADOUT_H2

L0_CADOUT_L2

L0_CADOUT_H1

L0_CADOUT_L1

L0_CADOUT_H0

L0_CADOUT_L0

HTT Interface

L0_CLKOUT_H1

L0_CLKOUT_L1

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CTLOUT_H1

L0_CTLOUT_L1

L0_CTLOUT_H0

L0_CTLOUT_L0

Athlon 64 S1
Processor Socket

VLDT_B3
VLDT_B2
VLDT_B1
VLDT_B0

AE5
AE4
AE3
AE2

T4
T3
V5
U5
V4
V3
Y5
W5
AB5
AA5
AB4
AB3
AD5
AC5
AD4
AD3
T1
R1
U2
U3
V1
U1
W2
W3
AA2
AA3
AB1
AA1
AC2
AC3
AD1
AC1

Y4
Y3
Y1
W1

T5
R5

R2
R3

1 2

H_CADOP15
H_CADON15H_CADIN15
H_CADOP14
H_CADON14
H_CADOP13
H_CADON13
H_CADOP12
H_CADON12
H_CADOP11
H_CADON11
H_CADOP10
H_CADON10
H_CADOP9
H_CADON9
H_CADOP8
H_CADON8
H_CADOP7
H_CADON7
H_CADOP6
H_CADON6
H_CADOP5
H_CADON5
H_CADOP4
H_CADON4
H_CADOP3
H_CADON3
H_CADOP2
H_CADON2
H_CADOP1
H_CADON1
H_CADOP0
H_CADON0

H_CLKOP1
H_CLKON1
H_CLKOP0
H_CLKON0

H_CTLOP0
H_CTLON0

C455

4.7U_0805_10V4Z

H_CADON15 (12)
H_CADOP14 (12)
H_CADON14 (12)
H_CADOP13 (12)
H_CADON13 (12)
H_CADOP12 (12)
H_CADON12 (12)
H_CADOP11 (12)
H_CADON11 (12)
H_CADOP10 (12)
H_CADON10 (12)
H_CADOP9 (12)
H_CADON9 (12)
H_CADOP8 (12)
H_CADON8 (12)
H_CADOP7 (12)
H_CADON7 (12)
H_CADOP6 (12)
H_CADON6 (12)
H_CADOP5 (12)
H_CADON5 (12)
H_CADOP4 (12)
H_CADON4 (12)
H_CADOP3 (12)
H_CADON3 (12)
H_CADOP2 (12)
H_CADON2 (12)
H_CADOP1 (12)
H_CADON1 (12)
H_CADOP0 (12)
H_CADON0 (12)

H_CLKOP1 (12)
H_CLKON1 (12)
H_CLKOP0 (12)
H_CLKON0 (12)

H_CTLOP0 (12)
H_CTLON0 (12)

EN_DFAN1(28)

+5VS

+VCC_FAN1

EN_DFAN1

1

C47
10U_0805_10V4Z

2

U1

1

VEN

2

VIN

3

VO

4

VSET

G993P1U_SOP8L

FAN_SPEED1(28)

FAN Conn

8

GND

7

GND

6

GND

5

GND

+3VS

12

R34
10K_0402_5%

+5VS

12

12

D3
CH355PT_SOD323

FAN1

D4
1N4148_SOT23

1

C92
1000P_0402_50V7K

2

W=40mils

+VCC_FAN1

1 2

C83 10U_0805_10V4Z

1 2

C90 1000P_0402_50V7K

JP20

1

1

2

2

3

3

4

GND

5

GND

ACES_85205-03001

+1.2V_HT

1

C164

2

4.7U_0805_10V4Z

LAYOUT: Place bypass cap on topside of board

A A

5

1

C156

2

4.7U_0805_10V4Z

NEAR HT POWER PINS T HA T A RE NOT CONNECTED DIRECTLY
TO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNA LLY
TO OTHER HT POWER PINS
PLACE CLOSE TO VLDT0 POWER PINS

C158

0.22U_0402_10V4Z

1

2

1

C163

2

0.22U_0402_10V4Z

C145
180P_0402_50V8J

1

2

1

2

4

C152
180P_0402_50V8J

Security Classification

Issued Date

THIS SHEET OF ENG INEE RIN G DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY O R DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/05/09 2006/10/11

Compal Secret Data

Deciphered Date

2

Compal Electronics inc

Title

SCHEMATIC, M/B LA-3121P

Size Document Number R ev

Custom

401411

Date: Sheet

星期一 五

08, 2006

月

651,

1

of

D

A

B

C

D

E

VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER
SUPPLY THROUGH TH E P ACKAGE OR ON THE DIE. IT IS ONLY CONNECTED

ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE

+1.8V

4 4

3 3

2 2

12

R13

39.2_0402_1%~D

R22

12

39.2_0402_1%~D

PLACE THEM CLOSE TO
CPU WITHIN 1"

DDR_CS3_DIMMA#(10)
DDR_CS2_DIMMA#(10)
DDR_CS1_DIMMA#(10)
DDR_CS0_DIMMA#(10)

DDR_CS3_DIMMB#(11)
DDR_CS2_DIMMB#(11)
DDR_CS1_DIMMB#(11)
DDR_CS0_DIMMB#(11)

DDR_CKE1_DIMMB(11)
DDR_CKE0_DIMMB(11)
DDR_CKE1_DIMMA(10)
DDR_CKE0_DIMMA(10)

DDR_A_MA[15..0](10)

DDR_A_BS#2(10)
DDR_A_BS#1(10)
DDR_A_BS#0(10)

DDR_A_RAS#(10)
DDR_A_CAS#(10)
DDR_A_WE#(10)

DDR_A_CLK2

DDR_A_CLK#2
DDR_A_CLK1

DDR_A_CLK#1

PLACE CLOSE TO PRO CESSOR
WITHIN 1.2 INCH

+0.9VREF_CPU

TP3PAD

M_ZN
M_ZP

10:8:10:8:10

DDR_CS3_DIMMA#
DDR_CS2_DIMMA#
DDR_CS1_DIMMA#
DDR_CS0_DIMMA#

DDR_CS3_DIMMB#
DDR_CS2_DIMMB#
DDR_CS1_DIMMB#
DDR_CS0_DIMMB#

DDR_CKE1_DIMMB
DDR_CKE0_DIMMB
DDR_CKE1_DIMMA
DDR_CKE0_DIMMA

DDR_A_MA15
DDR_A_MA14
DDR_A_MA13
DDR_A_MA12
DDR_A_MA11
DDR_A_MA10
DDR_A_MA9
DDR_A_MA8
DDR_A_MA7
DDR_A_MA6
DDR_A_MA5
DDR_A_MA4
DDR_A_MA3
DDR_A_MA2
DDR_A_MA1
DDR_A_MA0

DDR_A_BS#2
DDR_A_BS#1
DDR_A_BS#0

DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#

1

C66

1.5P_0402_50V8C

2

1

C132

1.5P_0402_50V8C

2

VTT_SENSE

JP23B

W17

M_VREF

Y10

VTT_SENSE

AE10

M_ZN

AF10

M_ZP

V19

MA0_CS_L3

J22

MA0_CS_L2

V22

MA0_CS_L1

T19

MA0_CS_L0

Y26

MB0_CS_L3

J24

MB0_CS_L2

W24

MB0_CS_L1

U23

MB0_CS_L0

H26

MB_CKE1

J23

MB_CKE0

J20

MA_CKE1

J21

MA_CKE0

K19

MA_ADD15

K20

MA_ADD14

V24

MA_ADD13

K24

MA_ADD12

L20

MA_ADD11

R19

MA_ADD10

L19

MA_ADD9

L22

MA_ADD8

L21

MA_ADD7

M19

MA_ADD6

M20

MA_ADD5

M24

MA_ADD4

M22

MA_ADD3

N22

MA_ADD2

N21

MA_ADD1

R21

MA_ADD0

K22

MA_BANK2

R20

MA_BANK1

T22

MA_BANK0

T20

MA_RAS_L

U20

MA_CAS_L

U21

MA_WE_L

FOX_PZ63823-284S-41F

Athlon 64 S1
Processor
Socket

D10

VTT1

C10

VTT2

B10

VTT3

AD10

VTT4

W10

VTT5

AC10

VTT6

AB10

VTT7

AA10

VTT8

A10

VTT9

Y16

MA0_CLK_H2

AA16

MA0_CLK_L2

E16

MA0_CLK_H1

F16

MA0_CLK_L1

AF18

MB0_CLK_H2

AF17

MB0_CLK_L2

A17

MB0_CLK_H1

A18

MB0_CLK_L1

W23

MB0_ODT1

W26

MB0_ODT0

V20

MA0_ODT1

U19

MA0_ODT0

J25

MB_ADD15

J26

MB_ADD14

W25

MB_ADD13

L23

MB_ADD12

L25

MB_ADD11

U25

MB_ADD10

L24

MB_ADD9

M26

MB_ADD8

DDRII Cmd/Ctrl//Clk

L26

MB_ADD7

N23

MB_ADD6

N24

MB_ADD5

N25

MB_ADD4

N26

MB_ADD3

P24

MB_ADD2

P26

MB_ADD1

T24

MB_ADD0

K26

MB_BANK2

T26

MB_BANK1

U26

MB_BANK0

U24

MB_RAS_L

V26

MB_CAS_L

U22

MB_WE_L

DDR_B_CLK2

DDR_B_CLK#2
DDR_B_CLK1

DDR_B_CLK#1

PLACE CLOSE TO PRO CESSOR
WITHIN 1.2 INCH

+0.9V

DDR_A_CLK2
DDR_A_CLK#2
DDR_A_CLK1
DDR_A_CLK#1

DDR_B_CLK2
DDR_B_CLK#2
DDR_B_CLK1
DDR_B_CLK#1

DDR_B_ODT1
DDR_B_ODT0
DDR_A_ODT1
DDR_A_ODT0

DDR_B_MA15
DDR_B_MA14
DDR_B_MA13
DDR_B_MA12
DDR_B_MA11
DDR_B_MA10
DDR_B_MA9
DDR_B_MA8
DDR_B_MA7
DDR_B_MA6
DDR_B_MA5
DDR_B_MA4
DDR_B_MA3
DDR_B_MA2
DDR_B_MA1
DDR_B_MA0

DDR_B_BS#2
DDR_B_BS#1
DDR_B_BS#0

DDR_B_RAS#
DDR_B_CAS#
DDR_B_WE#

1

2

1

2

C35

1.5P_0402_50V8C

C173

1.5P_0402_50V8C

DDR_A_CLK2 (10)
DDR_A_CLK#2 (10)
DDR_A_CLK1 (10)
DDR_A_CLK#1 (10)

DDR_B_CLK2 (11)
DDR_B_CLK#2 (11)
DDR_B_CLK1 (11)
DDR_B_CLK#1 (11)

DDR_B_ODT1 (11)
DDR_B_ODT0 (11)
DDR_A_ODT1 (10)
DDR_A_ODT0 (10)

DDR_B_ MA[15..0] (11)

DDR_B_BS# 2 (11)
DDR_B_BS# 1 (11)
DDR_B_BS# 0 (11)

DDR_B_RAS# (11)
DDR_B_CAS# (11)
DDR_B_W E# (11)

DDR_B_D[63..0](11)

Processor DDR2 Memory Interface

DDR_B_D63
DDR_B_D62
DDR_B_D61
DDR_B_D60
DDR_B_D59
DDR_B_D58
DDR_B_D57
DDR_B_D56
DDR_B_D55
DDR_B_D54
DDR_B_D53
DDR_B_D52
DDR_B_D51
DDR_B_D50
DDR_B_D49
DDR_B_D48
DDR_B_D47
DDR_B_D46
DDR_B_D45
DDR_B_D44
DDR_B_D43
DDR_B_D42
DDR_B_D41
DDR_B_D40
DDR_B_D39
DDR_B_D38
DDR_B_D37
DDR_B_D36
DDR_B_D35
DDR_B_D34
DDR_B_D33
DDR_B_D32
DDR_B_D31
DDR_B_D30
DDR_B_D29
DDR_B_D28
DDR_B_D27
DDR_B_D26
DDR_B_D25
DDR_B_D24
DDR_B_D23
DDR_B_D22
DDR_B_D21
DDR_B_D20
DDR_B_D19
DDR_B_D18
DDR_B_D17
DDR_B_D16
DDR_B_D15
DDR_B_D14
DDR_B_D13
DDR_B_D12
DDR_B_D11
DDR_B_D10
DDR_B_D9
DDR_B_D8
DDR_B_D7
DDR_B_D6

To reverse SODIMM socket

DDR_B_DM[7..0](11) DDR_A_ DM[7..0] (10)

DDR_B_DQS7(11)
DDR_B_DQS#7(11)
DDR_B_DQS6(11)
DDR_B_DQS#6(11)
DDR_B_DQS5(11)
DDR_B_DQS#5(11)
DDR_B_DQS4(11)
DDR_B_DQS#4(11)
DDR_B_DQS3(11)
DDR_B_DQS#3(11)
DDR_B_DQS2(11)
DDR_B_DQS#2(11)
DDR_B_DQS1(11)
DDR_B_DQS#1(11)
DDR_B_DQS0(11)
DDR_B_DQS#0(11)

DDR_B_D5
DDR_B_D4
DDR_B_D3
DDR_B_D2
DDR_B_D1
DDR_B_D0

DDR_B_DM7
DDR_B_DM6
DDR_B_DM5
DDR_B_DM4
DDR_B_DM3
DDR_B_DM2
DDR_B_DM1
DDR_B_DM0

DDR_B_DQS7
DDR_B_DQS#7
DDR_B_DQS6
DDR_B_DQS#6
DDR_B_DQS5
DDR_B_DQS#5
DDR_B_DQS4
DDR_B_DQS#4
DDR_B_DQS3
DDR_B_DQS#3
DDR_B_DQS2
DDR_B_DQS#2
DDR_B_DQS1
DDR_B_DQS#1
DDR_B_DQS0
DDR_B_DQS#0

JP23C

AD11

MB_DATA63

AF11

MB_DATA62

AF14

MB_DATA61

AE14

MB_DATA60

Y11

MB_DATA59

AB11

MB_DATA58

AC12

MB_DATA57

AF13

MB_DATA56

AF15

MB_DATA55

AF16

MB_DATA54

AC18

MB_DATA53

AF19

MB_DATA52

AD14

MB_DATA51

AC14

MB_DATA50

AE18

MB_DATA49

AD18

MB_DATA48

AD20

MB_DATA47

AC20

MB_DATA46

AF23

MB_DATA45

AF24

MB_DATA44

AF20

MB_DATA43

AE20

MB_DATA42

AD22

MB_DATA41

AC22

MB_DATA40

AE25

MB_DATA39

AD26

MB_DATA38

AA25

MB_DATA37

AA26

MB_DATA36

AE24

MB_DATA35

AD24

MB_DATA34

AA23

MB_DATA33

AA24

MB_DATA32

G24

MB_DATA31

G23

MB_DATA30

D26

MB_DATA29

C26

MB_DATA28

G26

MB_DATA27

G25

MB_DATA26

E24

MB_DATA25

E23

MB_DATA24

C24

MB_DATA23

B24

MB_DATA22

C20

MB_DATA21

B20

MB_DATA20

C25

MB_DATA19

D24

MB_DATA18

A21

MB_DATA17

D20

MB_DATA16

D18

MB_DATA15

C18

MB_DATA14

D14

MB_DATA13

C14

MB_DATA12

A20

MB_DATA11

A19

MB_DATA10

A16

MB_DATA9

A15

MB_DATA8

A13

MB_DATA7

D12

MB_DATA6

E11

MB_DATA5

G11

MB_DATA4

B14

MB_DATA3

A14

MB_DATA2

A11

MB_DATA1

C11

MB_DATA0

AD12

MB_DM7

AC16

MB_DM6

AE22

MB_DM5

AB26

MB_DM4

E25

MB_DM3

A22

MB_DM2

B16

MB_DM1

A12

MB_DM0

AF12

MB_DQS_H7

AE12

MB_DQS_L7

AE16

MB_DQS_H6

AD16

MB_DQS_L6

AF21

MB_DQS_H5

AF22

MB_DQS_L5

AC25

MB_DQS_H4

AC26

MB_DQS_L4

F26

MB_DQS_H3

E26

MB_DQS_L3

A24

MB_DQS_H2

A23

MB_DQS_L2

D16

MB_DQS_H1

C16

MB_DQS_L1

C12

MB_DQS_H0

B12

MB_DQS_L0

FOX_PZ63823-284S-41F

DDRII Data

Athlon 64 S1
Processor Socket

MA_DATA63
MA_DATA62
MA_DATA61
MA_DATA60
MA_DATA59
MA_DATA58
MA_DATA57
MA_DATA56
MA_DATA55
MA_DATA54
MA_DATA53
MA_DATA52
MA_DATA51
MA_DATA50
MA_DATA49
MA_DATA48
MA_DATA47
MA_DATA46
MA_DATA45
MA_DATA44
MA_DATA43
MA_DATA42
MA_DATA41
MA_DATA40
MA_DATA39
MA_DATA38
MA_DATA37
MA_DATA36
MA_DATA35
MA_DATA34
MA_DATA33
MA_DATA32
MA_DATA31
MA_DATA30
MA_DATA29
MA_DATA28
MA_DATA27
MA_DATA26
MA_DATA25
MA_DATA24
MA_DATA23
MA_DATA22
MA_DATA21
MA_DATA20
MA_DATA19
MA_DATA18
MA_DATA17
MA_DATA16
MA_DATA15
MA_DATA14
MA_DATA13
MA_DATA12
MA_DATA11
MA_DATA10

MA_DATA9
MA_DATA8
MA_DATA7
MA_DATA6
MA_DATA5
MA_DATA4
MA_DATA3
MA_DATA2
MA_DATA1
MA_DATA0

MA_DM7
MA_DM6
MA_DM5
MA_DM4
MA_DM3
MA_DM2
MA_DM1
MA_DM0

MA_DQS_H7

MA_DQS_L7

MA_DQS_H6

MA_DQS_L6

MA_DQS_H5

MA_DQS_L5

MA_DQS_H4

MA_DQS_L4

MA_DQS_H3

MA_DQS_L3

MA_DQS_H2

MA_DQS_L2

MA_DQS_H1

MA_DQS_L1

MA_DQS_H0

MA_DQS_L0

AA12
AB12
AA14
AB14
W11
Y12
AD13
AB13
AD15
AB15
AB17
Y17
Y14
W14
W16
AD17
Y18
AD19
AD21
AB21
AB18
AA18
AA20
Y20
AA22
Y22
W21
W22
AA21
AB22
AB24
Y24
H22
H20
E22
E21
J19
H24
F22
F20
C23
B22
F18
E18
E20
D22
C19
G18
G17
C17
F14
E14
H17
E17
E15
H15
E13
C13
H12
H11
G14
H14
F12
G12

Y13
AB16
Y19
AC24
F24
E19
C15
E12

W12
W13
Y15
W15
AB19
AB20
AD23
AC23
G22
G21
C22
C21
G16
G15
G13
H13

DDR_A_D63
DDR_A_D62
DDR_A_D61
DDR_A_D60
DDR_A_D59
DDR_A_D58
DDR_A_D57
DDR_A_D56
DDR_A_D55
DDR_A_D54
DDR_A_D53
DDR_A_D52
DDR_A_D51
DDR_A_D50
DDR_A_D49
DDR_A_D48
DDR_A_D47
DDR_A_D46
DDR_A_D45
DDR_A_D44
DDR_A_D43
DDR_A_D42
DDR_A_D41
DDR_A_D40
DDR_A_D39
DDR_A_D38
DDR_A_D37
DDR_A_D36
DDR_A_D35
DDR_A_D34
DDR_A_D33
DDR_A_D32
DDR_A_D31
DDR_A_D30
DDR_A_D29
DDR_A_D28
DDR_A_D27
DDR_A_D26
DDR_A_D25
DDR_A_D24
DDR_A_D23
DDR_A_D22
DDR_A_D21
DDR_A_D20
DDR_A_D19
DDR_A_D18
DDR_A_D17
DDR_A_D16
DDR_A_D15
DDR_A_D14
DDR_A_D13
DDR_A_D12
DDR_A_D11
DDR_A_D10
DDR_A_D9
DDR_A_D8
DDR_A_D7
DDR_A_D6
DDR_A_D5
DDR_A_D4
DDR_A_D3
DDR_A_D2
DDR_A_D1
DDR_A_D0

DDR_A_DM7
DDR_A_DM6
DDR_A_DM5
DDR_A_DM4
DDR_A_DM3
DDR_A_DM2
DDR_A_DM1
DDR_A_DM0

DDR_A_DQS7
DDR_A_DQS#7
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DQS0
DDR_A_DQS#0

DDR_A_D[63..0] (10)

DDR_A_ DQS7 (10)
DDR_A_DQS#7 (10)
DDR_A_ DQS6 (10)
DDR_A_DQS#6 (10)
DDR_A_ DQS5 (10)
DDR_A_DQS#5 (10)
DDR_A_ DQS4 (10)
DDR_A_DQS#4 (10)
DDR_A_ DQS3 (10)
DDR_A_DQS#3 (10)
DDR_A_ DQS2 (10)
DDR_A_DQS#2 (10)
DDR_A_ DQS1 (10)
DDR_A_DQS#1 (10)
DDR_A_ DQS0 (10)
DDR_A_DQS#0 (10)

To normal SODIMM socket

A1

+1.8V

12

R33

1K_0402_1%

1 1

1K_0402_1%

12

R23

1000P_0402_50V7K

1

C32

2

A

CPU_VREF_REF

1

C33
1000P_0402_50V7K

2

VDD_VREF_SUS_CPU
LAYOUT:PLACE CLOSE TO CPU

0.1U_0402_16V4Z

1

C34

2

1000P_0402_50V7K

1

2

C29

+0.9VREF_CPU

1

C28
1U_0402_6.3V4Z

2

Security Classification

Issued Date

THIS SHEET OF ENG INEE RING D RAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, IN C. NEITHER THIS SHE ET NOR THE INFORMATI ON IT CONTAINS

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PART Y WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/05/09 2006/10/11

Compal Secret Data

Deciphered Date

D

Compal Electronics inc

Title

SCHEMATIC, M/B LA-3121P

Size Document Number Rev

Custom

401411

星期一 五月

Date: Sheet

AF1

Athlon 64 S1g1

uPGA638
Top View

006

E

A26

751, 08, 2

D

of

5

+2.5VS

1

C506

+

FCM2012C-800_0805

150U_D2_6.3VM

CPU_PWRGD(18,19)

LDT_STOP#(14,19)

2

300_0402_5%

300_0402_5%

300_0402_5%

1 2

R82 0_0402_5%

R63

R88

R71

D D

C C

SB_PWROK(19,37)
LDT_RST#(18)

1 2

+1.8VS

12

+1.8VS

12

+1.8VS

12

SB_PWROK_R

LDT_RST#

+1.8V

L4

1

2

4.7U_0805_10V4Z

+1.8V+3VS

12

R64

4.7K_0402_5%@

5

2

B

1

A

3

R543 0_0402_5% @

1 2

+1.8V

5

2

B

1

A

3

R544 0_0402_5% @

1 2

+1.8V

5

2

B

1

A

NC7SZ08P5 X_NL_SC70-5

3

R545 0_0402_5% @

1 2

1

C189

2

C147 0.1U_0402_16V4Z

1 2

U5

P

R70

4

1 2

Y

G

NC7SZ08P5 X_NL_SC70-5

C155 0.1U_0402_16V4Z

1 2

U8

P

R79

4

1 2

Y

G

NC7SZ08P5 X_NL_SC70-5

C282 0.1U_0402_16V4Z

1 2

U6

P

R65

4

1 2

Y

G

C187

0.22U_0603_16V7K

0_0402_5%

0_0402_5%

0_0402_5%

4

1

C136
3300P_0402_50V7K

2

CPU_ALL_PWROK

CPU_LDTSTOP#

CPU_HT_RESET#

W=50mils

R372 300_0402_5%

1 2

+1.8VS

+1.2V_HT

R584 0_0402_5%@
R585 0_0402_5%@

CPU_SIC(18)
CPU_SID(18)

place them to CPU within 1"

LAYOUT: ROUTE VDDA TRACE APPROX.
50 mils WIDE (USE 2x25 mil TRACES TO
EXIT BALL FIE L D) AND 500 mils LONG.

R582 300_0402_5%@

1 2

R583 300_0402_5%@

1 2

1 2
1 2

R36 44.2_0603_1%

1 2

R35 44.2_0603_1%

1 2

CPUCLK(17)

CPUCLK#(17)

3

2

ATHLON Control and Debug

JP23D

F8

VDDA2

12/22 Modify

CPU_SIC_R
CPU_SID_R

CPU_HTREF1
CPU_HTREF0 VID0

5:10

CPU_VCC_SENSE(48)
CPU_VSS_SENSE(48)

C501

1 2

3900P_0402_50V7K

169_0402_1%

C502

1 2

3900P_0402_50V7K

R389

CPU_CLKIN_SC_P
CPU_CLKIN_SC_N

12

CPU_HT_RESET#
CPU_ALL_PWROK
CPU_LDTSTOP#

CPU_VCC_SENSE
CPU_VSS_SENSE

TP2PAD
TP1PAD

CPU_DBRDY
CPU_TMS

CPU_TCK
CPU_TRST#
CPU_TDI

CPU_TEST25_H_BYPASSCLK_H
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST19_PLLTEST0
CPU_TEST18_PLLTEST1

CPU_THERMDC
CPU_THERMDA

10:10

F9
B7

A7

F10

AF4
AF5

P6

R6

F6
E6

W9

Y9
A9

A8
G10
AA9

AC9
AD9
AF9

E8

G9
H10
AA7

C2

D7

E7
F7

C7
AC8

C3
AA6

W7
W8

Y6

AB6
P20

P19
N20
N19

R26
R25
P22
R22

THERMTRIP_L

VDDA1

PROCHOT_L

RESET_L
PWROK
LDTSTOP_L

SIC
SID

HTREF1
HTREF0

CPU_PRESENT_L
VDD_FB_H
VDD_FB_L

VDDIO_FB_H
VDDIO_FB_L

CLKIN_H
CLKIN_L

DBRDY
TMS

TCK
TRST_L
TDI

TEST25_HE9TEST29_H
TEST25_L
TEST19
TEST18
TEST13
TEST9
TEST17
TEST16
TEST15
TEST14
TEST12

TEST7
TEST6
THERMDC
THERMDA
TEST3
TEST2

RSVD0
RSVD1
RSVD2
RSVD3

RSVD4
RSVD5
RSVD6
RSVD7

FOX_PZ63823-284S-41F

MISC

AMD NPT S1 SOCKET
Processor Socket

DBREQ_L

TEST29_L

TEST24
TEST23
TEST22
TEST21
TEST20

TEST28_H
TEST28_L

TEST27
TEST26
TEST10

RSVD8
RSVD9

RSVD10
RSVD11

RSVD12
RSVD13
RSVD14

RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20

PSI_L

TEST8

VID5
VID4
VID3
VID2
VID1
VID0

TDO

H_THERMTRIP_S#

AF6

CPU_PROCHOT#_1.8

AC7

VID5

A5

VID4

C6

VID3

A6

VID2

A4

VID1

C5
B5

CPU_PRESENT#

AC6

PSI#

A3

CPU_DBREQ#

E10

CPU_TDO

AE9

CPU_TEST29_H_FBCLKOUT_P

C9

CPU_TEST29_L_FBCLKOUT_N

C8

5:5:5

AE7
AD7
AE8

CPU_TEST21_SCANEN

AB8
AF7

J7
H8
AF8

CPU_TEST26_BURNIN#

AE6
K8
C4

H16
B18

B3
C1

H6
G6
D5

R24
W18
R23
AA8
H18
H19

R7
300_0402_5%

+1.8V

12

PSI# (48)

80.6_0402_1%

12

R78
300_0402_5%

VID5 (48)
VID4 (48)
VID3 (48)
VID2 (48)
VID1 (48)
VID0 (48)

R68

1 2

ROUTE AS 80 Ohm DIFFERENTIAL PAIR
PLACE IT CLOSE TO CPU WITHIN 1"

1

HDT Connector

12

+1.8V

12

R4
1K_0402_5%

2

Q3

3 1

MMBT3904_SOT23

10K_0402_5%

+3VALW

+1.8V

12

R8

CPU_PH_G

B

2

Q4

E

3 1

C

MMBT3904_SOT23

Title

Size Document Number Rev

C

Date: Sheet

12

12

12

12

B B

NOTE: HDT TERMINATION IS REQUIRED
FOR REV. Ax SILICON ONLY.

C451

A A

2200P_0402_50V7K

EC_SMB_CK2(28)
EC_SMB_DA2(28)

5

CPU_DBREQ#
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO

1

2

R361 220_0402_5%@

EC_SMB_CK2
EC_SMB_DA2

12

+1.8V

R364 220_0402_5%@

R362 220_0402_5%@

R363 220_0402_5%@

R365 220_0402_5%@

CPU_THERMDA
CPU_THERMDC

2
3
8
7

U4524 CLOSE CPU,
CPU_THERMDA&CPU_THERMDC PLACE
CLOSE TO PROCESSOR WITHIN 1" INCH

+3VS

U38

D+

ALERT#

D-

THERM#

SCLK
SDATA

ADM1032ARM_RM8

JP4

2

1

4

3

6

5

8

7

10

9

12

11

14

13

16

15

18

17

20

19

22

21

2423
26

SAMTEC_ASP-68200-07

@

1

C454

0.1U_0402_16V4Z

2

1

VDD1

6
4
5

GND

12

R572
220_0402_5%

@

3V_LDT_RST# CPU_HT_RESET#

12

R374

10K_0402_5%@

4

1 3

+3VALW+3VS

2

G

D

S

Q33

2N7002_SOT23@

CPU_TEST26_BURNIN#
CPU_PRESENT#
CPU_TEST25_H_BYPASSCLK_H

CPU_TEST21_SCANEN
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST19_PLLTEST0
CPU_TEST18_PLLTEST1

3

R366 300_0402_5%

1 2

R369 1K_0402_5%

1 2

R47 510_0402_5%

1 2

R368 300_0402_5%

1 2

R54 510_0402_5%

1 2

R92 300_0402_5%

1 2

R91 300_0402_5%

1 2

Security Classification

Issued Date

THIS SHEET OF ENG INEE RING D RAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, IN C. NEITHER THIS SHE ET NOR THE INFORMATI ON IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PART Y WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+1.8V

2005/05/09 2006/03/08

Compal Secret Data

Deciphered Date

2

+1.8V

R5
300_0402_5%

H_THERMTRIP_S# H_THERMTRIP#

CPU_PROCHOT#_1.8

+3VALW

12

3 1

H_THERMTRIP# (19)

+3VS

12

R6

4.7K_0402_5%

@

R2

1K_0402_5%@

2

Q2

MMBT3904_SOT23@

EC_THERM# (19,28)

MAINPW ON (4 2,43,45)

12

R3
10K_0402_5%

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3121P

401411

星期三 五月

006

1

851, 10, 2

D

of

5

D D

4

3

+CPU_CORE

1

+

C505

@

330U_D2E_2.5VM_R9

2

+CPU_CORE

1

C195

2

10U_0805_10V6M

10U_0805_10V6M

1

C17

2

10U_0805_10V6M

1

+

C504

@

330U_D2E_2.5VM_R9

2

10U_0805_10V6M

1

C194

2

1

C193

2

10U_0805_10V6M

1

+

C453
330U_D2E_2.5VM_R9

2

10U_0805_10V6M

1

C192

2

2

1

+

C452
330U_D2E_2.5VM_R9

2

+CPU_CORE

1

1

C16

C97

10U_0805_10V6M

2

2

1

+

C450
820U_E9_2.5V_M_R7

45@

2

1

+

C449
820U_E9_2.5V_M_R7

45@

2

1

JP23F

AA4

VSS1

AA11

VSS2

AA13

VSS3

AA15

VSS4

AA17

VSS5

AA19

VSS6

AB2

VSS7

AB7

VSS8

AB9

VSS9

AB23

VSS10

AB25

VSS11

AC11

VSS12

AC13

VSS13

AC15

VSS14

AC17

VSS15

AC19

VSS16

AC21

VSS17

AD6

VSS18

AD8

VSS19

AD25

VSS20

AE11

VSS21

AE13

VSS22

AE15

VSS23

AE17

VSS24

AE19

VSS25

AE21

VSS26

AE23

VSS27

B4

VSS28

B6

VSS29

B8

VSS30

B9

VSS31

B11

VSS32

B13

VSS33

B15

VSS34

B17

VSS35

B19

VSS36

B21

VSS37

B23

VSS38

B25

VSS39

D6

VSS40

D8

VSS41

D9

VSS42

D11

VSS43

D13

VSS44

D15

VSS45

D17

VSS46

D19

VSS47

D21

VSS48

D23

VSS49

D25

VSS50

E4

VSS51

F2

VSS52

F11

VSS53

F13

VSS54

F15

VSS55

F17

VSS56

F19

VSS57

F21

VSS58

F23

VSS59

F25

VSS60

H7

VSS61

H9

VSS62

H21

VSS63

H23

VSS64

J4

VSS65

FOX_PZ63823-284S-41F

Athlon 64 S1
Processor Socket

JP23E

AC4

VDD1

AD2

VDD2

G4

VDD3

H2

VDD4

J9

VDD5

J11

VDD6

J13

VDD7

K6

VDD8

K10

VDD9

K12

VDD10

K14

VDD11

L4

VDD12

L7

VDD13

L9

VDD14

L11

VDD15

L13

VDD16

M2

C C

B B

VDD17

M6

VDD18

M8

VDD19

M10

VDD20

N7

VDD21

N9

VDD22

N11

VDD23

P8

VDD24

P10

VDD25

R4

VDD26

R7

VDD27

R9

VDD28

R11

VDD29

T2

VDD30

T6

VDD31

T8

VDD32

T10

VDD33

T12

VDD34

T14

VDD35

U7

VDD36

U9

VDD37

U11

VDD38

U13

VDD39

V6

VDD40

V8

VDD41

V10

VDD42

FOX_PZ63823-284S-41F

Athlon 64 S1
Processor Socket

Power

VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54

VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8

VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27

+CPU_CORE+CPU_CORE

V12
V14
W4
Y2
J15
K16
L15
M16
P16
T16
U15
V16

+1.8V

H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17
P18
P21
P23
P25
R17
T18
T21
T23
T25
U17
V18
V21
V23
V25
Y25

J6

VSS66

J8

VSS67

J10

VSS68

J12

VSS69

J14

VSS70

J16

VSS71

J18

VSS72

K2

VSS73

K7

VSS74

K9

VSS75

K11

VSS76

K13

VSS77

K15

VSS78

K17

VSS79

L6

VSS80

L8

VSS81

L10

VSS82

L12

VSS83

L14

VSS84

L16

VSS85

L18

VSS86

M7

VSS87

M9

VSS88

M11

VSS89

M17

VSS90

N4

VSS91

N8

VSS92

N10

VSS93

N16

VSS94

N18

VSS95

P2

VSS96

P7

VSS97

P9

VSS98

P11

VSS99

P17

VSS100

R8

VSS101

R10

Ground

VSS102

R16

VSS103

R18

VSS104

T7

VSS105

T9

VSS106

T11

VSS107

T13

VSS108

T15

VSS109

T17

VSS110

U4

VSS111

U6

VSS112

U8

VSS113

U10

VSS114

U12

VSS115

U14

VSS116

U16

VSS117

U18

VSS118

V2

VSS119

V7

VSS120

V9

VSS121

V11

VSS122

V13

VSS123

V15

VSS124

V17

VSS125

W6

VSS126

Y21

VSS127

Y23

VSS128

N6

VSS129

+CPU_CORE

1

C73
22U_0805_6.3V6M

2

+CPU_CORE +1.8V

1

C70

0.22U_0402_10V4Z

2

+1.8V

1

C472

4.7U_0805_10V4Z

2

1

C127

0.22U_0402_10V4Z

2

+0.9V

1

C188

4.7U_0805_10V4Z

2

CPU SOCKET S1 DECOUPLING

1

C76
22U_0805_6.3V6M

2

1

C120

0.22U_0402_10V4Z

2

1

C86
10U_0805_10V6M

2

1

C100
180P_0402_50V8J

2

1

C118
22U_0805_6.3V6M

2

1

C91

0.01U_0402_16V7K

2

1

C109
10U_0805_10V6M

2

1

C96
10U_0805_10V6M

2

1

C82
10U_0805_10V6M

2

1

2

DECOUPLING BETWEEN PROCESSOR AND DIMMs
PLACE CLOSE TO PROCESSOR AS POSSIBLE

1

C471

4.7U_0805_10V4Z

2

1

C128

0.01U_0402_16V7K

2

1

C30

4.7U_0805_10V4Z

2

1

C479

4.7U_0805_10V4Z

2

1

C85

0.01U_0402_16V7K

2

1

C36

4.7U_0805_10V4Z

2

1

C480

4.7U_0805_10V4Z

2

1

C181

4.7U_0805_10V4Z

2

1

C68
180P_0402_50V8J

2

1

C104

0.22U_0402_10V4Z

2

1

C105
180P_0402_50V8J

2

1

C184

0.22U_0402_10V4Z

2

1

C84

0.22U_0402_10V4Z

2

1

C185

0.22U_0402_10V4Z

2

1

C89
10U_0805_10V6M

2

C102
10U_0805_10V6M

1

2

1

2

1

C113
10U_0805_10V6M

2

1

C72

0.22U_0402_10V4Z

2

C129

0.22U_0402_10V4Z

C27

0.22U_0402_10V4Z

1

C124
22U_0805_6.3V6M

2

1

C116

0.22U_0402_10V4Z

2

1

C23

0.22U_0402_10V4Z

2

1

C39
1000P_0402_50V7K

2

A1

A26

1

C41
1000P_0402_50V7K

2

1

C178
1000P_0402_50V7K

2

1

C22
1000P_0402_50V7K

2

1

C179
180P_0402_50V8J

2

1

C26
180P_0402_50V8J

2

1

C175
180P_0402_50V8J

2

1

C182
180P_0402_50V8J

2

Athlon 64 S1g1

uPGA638

A A

Top View

PROCESSOR POWER AND GROUND

AF1

Security Classification

Issued Date

THIS SHEET OF ENG INEE RING D RAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, IN C. NEITHER THIS SHE ET NOR THE INFORMATI ON IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PART Y WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/05/09 2006/03/08

Compal Secret Data

Deciphered Date

2

Compal Electronics. inc.

Title

SCHEMATIC, M/B LA-3121P

Size Document Number Rev

C

401411

星期三 五月

Date: Sheet

006

1

951, 10, 2

of

D

5

4

3

2

1

+1.8V+DIMM_VREF+1.8V+1.8V

JP19

1

VREF

3

DDR_A_D0

D D

C C

DDR_CKE0_DIMMA(7)
DDR_CS2_DIMMA#(7)

DDR_A_BS#2(7)

DDR_A_BS#0(7)
DDR_A_WE#(7)

DDR_A_CAS#(7)
DDR_CS1_DIMMA#(7)

DDR_A_ODT1(7)

B B

A A

SB_CK_SDAT(11,17,19,31,34)
SB_CK_SCLK(11,17,19,31,34)

DDR_A_D1
DDR_A_DQS#0

DDR_A_DQS0
DDR_A_D2

DDR_A_D3
DDR_A_D8

DDR_A_D9
DDR_A_DQS#1

DDR_A_DQS1
DDR_A_D10

DDR_A_D11

DDR_A_D16
DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D18 DDR_A_D22
DDR_A_D19

DDR_A_D24
DDR_A_D25

DDR_A_DM3

DDR_A_D26
DDR_A_D27

DDR_CKE0_DIMMA
DDR_CS2_DIMMA#

DDR_A_BS#2
DDR_A_MA12

DDR_A_MA9

DDR_A_MA5
DDR_A_MA3
DDR_A_MA1

DDR_A_MA10
DDR_A_BS#0
DDR_A_WE#

DDR_A_CAS#
DDR_CS1_DIMMA#

DDR_A_ODT1
DDR_A_D32

DDR_A_D33
DDR_A_DQS#4

DDR_A_DQS4
DDR_A_D34

DDR_A_D35
DDR_A_D40

DDR_A_D41
DDR_A_DM5
DDR_A_D42

DDR_A_D43 DDR_A_D47
DDR_A_D48

DDR_A_D49 DDR_A_D53

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D51 DDR_A_D55

DDR_A_D56
DDR_A_D57

DDR_A_DM7
DDR_A_D58

DDR_A_D59
SB_CK_SDAT

SB_CK_SCLK

+3VS

1

C448

0.1U_0402_16V4Z

2

5

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

P-TWO_A5692C-A0G16

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7

VSS
DQ12
DQ13

VSS

DM1

VSS

CK0

CK0#

VSS
DQ14
DQ15

VSS

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3#

DQS3

VSS
DQ30
DQ31

VSS

NC/CKE1

VDD

NC/A15
NC/A14

VDD

VDD

VDD

BA1

RAS#

VDD
ODT0

NC/A13

VDD

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5#

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

CK1

CK1#

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7#

DQS7

VSS
DQ62
DQ63

VSS

SAO

SA1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50

NC

52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90

A11

92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106
108
110

S0#

112
114
116
118
120

NC

122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

4

DDR_A_D4
DDR_A_D5

DDR_A_DM0
DDR_A_D6

DDR_A_D7
DDR_A_D12

DDR_A_D13
DDR_A_DM1
DDR_A_CLK1

DDR_A_CLK#1
DDR_A_D14

DDR_A_D15

DDR_A_D20
DDR_A_D21

DDR_A_DM2

DDR_A_D23
DDR_A_D28

DDR_A_D29
DDR_A_DQS#3

DDR_A_DQS3
DDR_A_D30

DDR_A_D31
DDR_CKE1_DIMMA
DDR_A_MA15

DDR_A_MA14
DDR_A_MA11

DDR_A_MA7
DDR_A_MA6DDR_A_MA8

DDR_A_MA4
DDR_A_MA2
DDR_A_MA0

DDR_A_BS#1
DDR_A_RAS#
DDR_CS0_DIMMA#

DDR_A_ODT0
DDR_A_MA13

DDR_CS3_DIMMA#
DDR_A_D36

DDR_A_D37
DDR_A_DM4
DDR_A_D38

DDR_A_D39
DDR_A_D44

DDR_A_D45
DDR_A_DQS#5

DDR_A_DQS5
DDR_A_D46

DDR_A_D52

DDR_A_CLK2
DDR_A_CLK#2

DDR_A_DM6
DDR_A_D54

DDR_A_D60
DDR_A_D61

DDR_A_DQS#7
DDR_A_DQS7

DDR_A_D62
DDR_A_D63

R12 10K_0402_5%

1 2

R10 10K_0402_5%

1 2

DDR_A_CLK1 (7)
DDR_A_CLK#1 (7)

DDR_CKE1_DIMMA (7)

DDR_A_BS#1 (7)
DDR_A_RAS# (7)
DDR_CS0_DIMMA# (7)

DDR_A_ODT0 (7)

DDR_CS3_DIMMA# (7)

DDR_A_CLK2 (7)
DDR_A_CLK#2 (7)

C507

0.1U_0402_16V4Z

1

1

2

2

4.7U_0805_10V4Z

DDR_A_D[0..63](7)
DDR_A_DM[0..7](7)

DDR_A_DQS[0..7](7)
DDR_A_MA[0..15](7)

DDR_A_DQS#[0..7](7)

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C503

3

12

R398

1K_0402_1%

12

R397

1K_0402_1%

DDR_A_D[0..63]
DDR_A_DM[0..7]
DDR_A_DQS[0..7]
DDR_A_MA[0..15]
DDR_A_DQS#[0..7]

2005/05/09 2006/10/11

+1.8V

1

2

C639

4.7U_0805_6.3V6K

4.7U_0805_10V4Z

1

2

+0.9V

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C63

C67

DDR_CKE0_DIMMA
DDR_CS2_DIMMA#

DDR_A_BS#2
DDR_A_MA12

DDR_A_MA9
DDR_A_MA8

DDR_A_MA5
DDR_A_MA3

DDR_A_MA1
DDR_A_MA10

DDR_A_BS#0
DDR_A_WE#

DDR_A_CAS#
DDR_CS1_DIMMA#

DDR_CS3_DIMMA#

+0.9V

Compal Secret Data

Deciphered Date

1

2

C643

0.01U_0402_16V7K

4.7U_0805_10V4Z

1

2

0.1U_0402_16V4Z

1

2

C114

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

0.1U_0402_16V4Z

1

2

C618

C644

0.01U_0402_16V7K

1

2

4.7U_0805_10V4Z

1

C98

2

0.1U_0402_16V4Z

1

1

2

2

C107

C95

0.1U_0402_16V4Z

1

2

C619

C646
10P_0402_25V8K

1

1

2

2

C645
10P_0402_25V8K

4.7U_0805_10V4Z

1

C475

2

0.1U_0402_16V4Z

1

2

C69

+0.9V

0.1U_0402_16V4Z

1

2

+1.8V

C55

C56

Custom
Date: Sheet

C640

4.7U_0805_6.3V6K

1

2

C470

0.1U_0402_16V4Z

C642

4.7U_0805_6.3V6K

1

1

2

2

C641

4.7U_0805_6.3V6K

4.7U_0805_10V4Z

4.7U_0805_10V4Z

1

1

C62

C77

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C80

C71

Layout Note:
Place one ca p c l o se to every 2 pullup
resistors terminated to +0.9V

RP28 47_0404_4P2R_5%

RP25 47_0404_4P2R_5%

RP21 47_0404_4P2R_5%

RP18 47_0404_4P2R_5%

RP13 47_0404_4P2R_5%

RP9 47_0404_4P2R_5%

RP5 47_0404_4P2R_5%

R32 47_0402_1%

1 2

R28 47_0402_1%

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C616

C617

Layout Note:
Place one 0.1uF cap close to every 2 pullup
resistors terminated to +0.9V

2

C648

0.22U_0603_16V7K

1

1

2

2

C647

0.22U_0603_16V7K

4.7U_0805_10V4Z

4.7U_0805_10V4Z

1

1

C473

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C74

1 4
2 3

RP22 47_0404_4P2R_5%

1 4
2 3

RP17 47_0404_4P2R_5%

1 4
2 3

RP14 47_0404_4P2R_5%

1 4
2 3

RP10 47_0404_4P2R_5%

1 4
2 3

RP6 47_0404_4P2R_5%

1 4
2 3

RP2 47_0404_4P2R_5%

1 4
2 3

RP1 47_0404_4P2R_5%

0.1U_0402_16V4Z

1

2

C620

Compal Electronics. inc.

Title

SCHEMATIC, M/B LA-3121P

Size Docum ent Number Rev

401411

星期三 五月

1

2

C649

0.22U_0603_16V7K

4.7U_0805_10V4Z

1

C57

2

0.1U_0402_16V4Z

1

1

2

2

C88

0.1U_0402_16V4Z

1

2

C621

C650

0.22U_0603_16V7K

1

2

4.7U_0805_10V4Z

C463

0.1U_0402_16V4Z

1

2

C45

C65

DDR_CKE1_DIMMA

DDR_CS0_DIMMA#

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C622

1

1

2

2

C651

0.22U_0603_16V7K

1

1

+

C477
220U_D2_4VM_R15

C58

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C101

DDR_A_MA15

DDR_A_MA7

DDR_A_MA14

DDR_A_MA6

DDR_A_MA11

DDR_A_MA2
DDR_A_MA4

DDR_A_BS#1
DDR_A_MA0

DDR_A_RAS#
DDR_A_MA13DDR_A_ODT1

DDR_A_ODT0

1

2

C623

1

C652

0.22U_0603_16V7K

1

C636

1

+

150U_D2_6.3VM

2

2

C51

+1.8V

of

10 51, 10, 2006

D

5

4

3

2

1

1

C52

2

0.1U_0402_16V4Z

1

2

C7

DDR_B_D[0..63](7)
DDR_B_DM[0..7](7)

DDR_B_DQS[0..7](7)
DDR_B_MA[0..15](7)

DDR_B_DQS#[0..7](7)

4.7U_0805_10V4Z

4.7U_0805_10V4Z

1

C99

2

0.1U_0402_16V4Z

1

2

C10

0.1U_0402_16V4Z

4.7U_0805_10V4Z

1

C103

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C18

C13

Layout Note:
Place one cap c lo se to every 2 pullup
resistors te r m inated to +0.9V

1 4
2 3

RP27 47_0404_4P2R_5%

1 4
2 3

RP24 47_0404_4P2R_5%

1 4
2 3

RP19 47_0404_4P2R_5%

1 4
2 3

RP15 47_0404_4P2R_5%

1 4
2 3

RP11 47_0404_4P2R_5%

1 4
2 3

RP8 47_0404_4P2R_5%

1 4
2 3

RP7 47_0404_4P2R_5%

R29 47_0402_1%

1 2

R30 47_0402_1%

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C624

C625

Layout Note:
Place one 0.1u F c ap cl ose to every 2 pullup
resistors te r m inated to +0.9V

Deciphered Date

2

+DIMM_VREF+1.8V+1.8V

0.1U_0402_16V4Z

C202

JP18

1

VREF

3

DDR_B_D0

D D

C C

DDR_CKE0_DIMMB(7)
DDR_CS2_DIMMB#(7)

DDR_B_BS#2(7)

DDR_B_BS#0(7)
DDR_B_WE#(7)

DDR_B_CAS#(7)
DDR_CS1_DIMMB#(7)

DDR_B_ODT1(7)

B B

A A

SB_CK_SDAT(10,17,19,31,34)
SB_CK_SCLK(10,17,19,31,34)

DDR_B_D1
DDR_B_DQS#0

DDR_B_DQS0
DDR_B_D2

DDR_B_D3
DDR_B_D8

DDR_B_D9
DDR_B_DQS#1

DDR_B_DQS1
DDR_B_D10

DDR_B_D11

DDR_B_D16
DDR_B_D17

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D18 DDR_B_D22
DDR_B_D19

DDR_B_D24
DDR_B_D25

DDR_B_DM3

DDR_B_D26
DDR_B_D27

DDR_CKE0_DIMMB
DDR_CS2_DIMMB#

DDR_B_BS#2
DDR_B_MA12

DDR_B_MA9

DDR_B_MA5
DDR_B_MA3
DDR_B_MA1

DDR_B_MA10
DDR_B_BS#0
DDR_B_WE#

DDR_B_CAS#
DDR_CS1_DIMMB#

DDR_B_ODT1
DDR_B_D32

DDR_B_D33
DDR_B_DQS#4

DDR_B_DQS4
DDR_B_D34

DDR_B_D35
DDR_B_D40

DDR_B_D41
DDR_B_DM5
DDR_B_D42

DDR_B_D43 DDR_B_D47
DDR_B_D48

DDR_B_D49 DDR_B_D53

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D50
DDR_B_D51 DDR_B_D55

DDR_B_D56
DDR_B_D57

DDR_B_DM7
DDR_B_D58

DDR_B_D59
SB_CK_SDAT

SB_CK_SCLK

+3VS

1

C21

0.1U_0402_16V4Z

2

5

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

P-TWO_A5652C-A0G16

DQ12
DQ13

CK0#
DQ14

DQ15

DQ20
DQ21

DQ22
DQ23

DQ28
DQ29

DQS3#

DQS3
DQ30

DQ31

NC/CKE1

NC/A15
NC/A14

RAS#

ODT0

NC/A13

DQ36
DQ37

DQ38
DQ39

DQ44
DQ45

DQS5#

DQS5
DQ46

DQ47
DQ52

DQ53

CK1#

DQ54
DQ55

DQ60
DQ61

DQS7#

DQS7
DQ62

DQ63

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS

VSS
DM1
VSS
CK0

VSS

VSS

VSS

VSS
DM2

VSS

VSS

VSS

VSS

VSS
VDD

VDD

VDD

VDD
BA1

VDD

VDD
VSS

VSS
DM4
VSS

VSS

VSS

VSS

VSS

VSS
CK1

VSS
DM6
VSS

VSS

VSS

VSS

VSS
SAO
SA1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50

NC

52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90

A11

92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106
108
110

S0#

112
114
116
118
120

NC

122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

4

DDR_B_D4
DDR_B_D5

DDR_B_DM0
DDR_B_D6

DDR_B_D7
DDR_B_D12

DDR_B_D13
DDR_B_DM1
DDR_B_CLK1

DDR_B_CLK#1
DDR_B_D14

DDR_B_D15

DDR_B_D20
DDR_B_D21

DDR_B_DM2

DDR_B_D23
DDR_B_D28

DDR_B_D29
DDR_B_DQS#3

DDR_B_DQS3
DDR_B_D30

DDR_B_D31
DDR_CKE1_DIMMB
DDR_B_MA15

DDR_B_MA14
DDR_B_MA11

DDR_B_MA7
DDR_B_MA6DDR_B_MA8

DDR_B_MA4
DDR_B_MA2
DDR_B_MA0

DDR_B_BS#1
DDR_B_RAS#
DDR_CS0_DIMMB#

DDR_B_ODT0
DDR_B_MA13

DDR_CS3_DIMMB#
DDR_B_D36

DDR_B_D37
DDR_B_DM4
DDR_B_D38

DDR_B_D39
DDR_B_D44

DDR_B_D45
DDR_B_DQS#5

DDR_B_DQS5
DDR_B_D46

DDR_B_D52

DDR_B_CLK2
DDR_B_CLK#2

DDR_B_DM6
DDR_B_D54

DDR_B_D60
DDR_B_D61

DDR_B_DQS#7
DDR_B_DQS7

DDR_B_D62
DDR_B_D63

R11 10K_0402_5%

1 2

R9 10K_0402_5%

1 2

4.7U_0805_10V4Z

1

2

DDR_B_CLK1 (7)
DDR_B_CLK#1 (7)

DDR_CKE1_DIMMB (7)

DDR_B_BS#1 (7)
DDR_B_RAS# (7)
DDR_CS0_DIMMB# (7)

DDR_B_ODT0 (7)

DDR_CS3_DIMMB# (7)

DDR_B_CLK2 (7)
DDR_B_CLK#2 (7)

+3VS

C198

1

2

4.7U_0805_10V4Z

+0.9V

0.1U_0402_16V4Z

1

2

C4

DDR_CS2_DIMMB#
DDR_CKE0_DIMMB

DDR_B_MA12
DDR_B_BS#2

DDR_B_MA8
DDR_B_MA9

DDR_B_MA3
DDR_B_MA5

DDR_B_MA10
DDR_B_MA1

DDR_B_WE#
DDR_B_BS#0

DDR_CS0_DIMMB#
DDR_B_RAS#

DDR_B_ODT1
DDR_CS3_DIMMB#

+0.9V

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/05/09 2006/10/11

Compal Secret Data

1

2

1

2

C626

C59

0.1U_0402_16V4Z

DDR_B_D[0..63]
DDR_B_DM[0..7]
DDR_B_DQS[0..7]
DDR_B_MA[0..15]
DDR_B_DQS#[0..7]

4.7U_0805_10V4Z

1

C64

2

0.1U_0402_16V4Z

1

2

C8

1

2

C627

+1.8V

4.7U_0805_10V4Z

4.7U_0805_10V4Z

1

C53

2

0.1U_0402_16V4Z

1

2

C11

+0.9V

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C12

4.7U_0805_10V4Z

1

1

C81

C78

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C19

C14

1 4
2 3

RP26 47_0404_4P2R_5%

1 4
2 3

RP23 47_0404_4P2R_5%

1 4
2 3

RP20 47_0404_4P2R_5%

1 4
2 3

RP16 47_0404_4P2R_5%

1 4
2 3

RP12 47_0404_4P2R_5%

1 4
2 3

RP3 47_0404_4P2R_5%

1 4
2 3

RP4 47_0404_4P2R_5%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

1

2

2

C628

C6

C5

Compal Electronics. inc.

Title

SCHEMATIC, M/B LA-3121P

Size Docum ent Number Rev

Custom

401411

Date: Sheet

4.7U_0805_10V4Z

1

2

0.1U_0402_16V4Z

1

2

C629

星期三 五月

4.7U_0805_10V4Z

C61

0.1U_0402_16V4Z

1

2

C9

DDR_CKE1_DIMMB

DDR_CS1_DIMMB#

0.1U_0402_16V4Z

1

2

C630

1

1

+

C125

2

2

0.1U_0402_16V4Z

DDR_B_MA15
DDR_B_MA14

DDR_B_MA11

DDR_B_MA7
DDR_B_MA6

DDR_B_MA4
DDR_B_MA2

DDR_B_MA0

DDR_B_BS#1

DDR_B_CAS#

DDR_B_ODT0
DDR_B_MA13

0.1U_0402_16V4Z

1

2

C631

C633
220U_D2_4VM_R15

0.1U_0402_16V4Z

1

1

2

2

C20

C15

+1.8V

1

D

of

11 51, 10, 2006

5

4

3

2

1

D D

C C

+1.2V_HT

H_CADOP15(6)
H_CADON15(6)
H_CADOP14(6)
H_CADON14(6)
H_CADOP13(6)
H_CADON13(6)
H_CADOP12(6)
H_CADON12(6)
H_CADOP11(6)
H_CADON11(6)
H_CADOP10(6)
H_CADON10(6)
H_CADOP9(6)
H_CADON9(6)
H_CADOP8(6)
H_CADON8(6)

H_CADOP7(6)
H_CADON7(6)
H_CADOP6(6)
H_CADON6(6)
H_CADOP5(6)
H_CADON5(6)
H_CADOP4(6)
H_CADON4(6)
H_CADOP3(6)
H_CADON3(6)
H_CADOP2(6)
H_CADON2(6)
H_CADOP1(6)
H_CADON1(6)
H_CADOP0(6)
H_CADON0(6)

H_CLKOP1(6)
H_CLKON1(6)

H_CLKOP0(6)
H_CLKON0(6)

H_CTLOP0(6)
H_CTLON0(6)

R382 49.9_0402_1%
R380 49.9_0402_1%

1 2
1 2

H_CADOP15
H_CADON15
H_CADOP14
H_CADON14
H_CADOP13

H_CADOP12
H_CADON12
H_CADOP11
H_CADON11
H_CADOP10
H_CADON10
H_CADOP9
H_CADON9
H_CADOP8
H_CADON8

H_CADOP7
H_CADON7
H_CADOP6
H_CADON6
H_CADOP5
H_CADON5
H_CADOP4
H_CADON4
H_CADOP3
H_CADON3
H_CADOP2
H_CADON2
H_CADOP1
H_CADON1
H_CADOP0
H_CADON0

H_CLKOP1
H_CLKON1

H_CLKON0

H_CTLON0

HT_RXCALP
HT_RXCALN

U39A

R19

HT_RXCAD15P

R18

HT_RXCAD15N

R21

HT_RXCAD14P

R22

HT_RXCAD14N

U22

HT_RXCAD13P

U21

HT_RXCAD13N

U18

HT_RXCAD12P

U19

HT_RXCAD12N

W19

HT_RXCAD11P

W20

HT_RXCAD11N

AC21

HT_RXCAD10P

AB22

HT_RXCAD10N

AB20

HT_RXCAD9P

AA20

HT_RXCAD9N

AA19

HT_RXCAD8P

Y19

HT_RXCAD8N

T24

HT_RXCAD7P

R25

HT_RXCAD7N

U25

HT_RXCAD6P

U24

HT_RXCAD6N

V23

HT_RXCAD5P

U23

HT_RXCAD5N

V24

HT_RXCAD4P

V25

HT_RXCAD4N

AA25

HT_RXCAD3P

AA24

HT_RXCAD3N

AB23

HT_RXCAD2P

AA23

HT_RXCAD2N

AB24

HT_RXCAD1P

AB25

HT_RXCAD1N

AC24

HT_RXCAD0P

AC25

HT_RXCAD0N

W21

HT_RXCLK1P

W22

HT_RXCLK1N

Y24

HT_RXCLK0P

W25

HT_RXCLK0N

P24

HT_RXCTLP

P25

HT_RXCTLN

A24

HT_RXCALP

C24

HT_RXCALN

216MSA4ALA11FG RS485MC_BGA465

PART 1 OF 5

HT_TXCAD15P
HT_TXCAD15N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD10P
HT_TXCAD10N

HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD8P
HT_TXCAD8N

HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD0P
HT_TXCAD0N

HT_TXCLK1P

HYPER TRANSPORT CPU

HT_TXCLK1N

I/F

HT_TXCLK0P
HT_TXCLK0N

HT_TXCTLP

HT_TXCTLN
HT_TXCALP

HT_TXCALN

P21
P22
P18
P19
M22
M21
M18
M19
L18
L19
G22
G21
J20
J21
F21
F22

N24
N25
L25
M24
K25
K24
J23
K23
G25
H24
F25
F24
E23
F23
E24
E25

L21
L22

J24
J25

N23
P23

C25
D24

H_CADIP15
H_CADIN15
H_CADIP14
H_CADIN14
H_CADIP13
H_CADIN13H_CADON13
H_CADIP12
H_CADIN12
H_CADIP11
H_CADIN11
H_CADIP10
H_CADIN10
H_CADIP9
H_CADIN9
H_CADIP8
H_CADIN8

H_CADIP7
H_CADIN7
H_CADIP6
H_CADIN6
H_CADIP5
H_CADIN5
H_CADIP4
H_CADIN4
H_CADIP3
H_CADIN3
H_CADIP2
H_CADIN2
H_CADIP1
H_CADIN1
H_CADIP0
H_CADIN0

H_CLKIP1
H_CLKIN1

H_CLKIP0H_CLKOP0
H_CLKIN0

H_CTLIP0H_CTLOP0
H_CTLIN0

HT_TXCALP
HT_TXCALN

R379

1 2

100_0402_1%

H_CADIP15 (6)
H_CADIN15 (6)
H_CADIP14 (6)
H_CADIN14 (6)
H_CADIP13 (6)
H_CADIN13 (6)
H_CADIP12 (6)
H_CADIN12 (6)
H_CADIP11 (6)
H_CADIN11 (6)
H_CADIP10 (6)
H_CADIN10 (6)
H_CADIP9 (6)
H_CADIN9 (6)
H_CADIP8 (6)
H_CADIN8 (6)

H_CADIP7 (6)
H_CADIN7 (6)
H_CADIP6 (6)
H_CADIN6 (6)
H_CADIP5 (6)
H_CADIN5 (6)
H_CADIP4 (6)
H_CADIN4 (6)
H_CADIP3 (6)
H_CADIN3 (6)
H_CADIP2 (6)
H_CADIN2 (6)
H_CADIP1 (6)
H_CADIN1 (6)
H_CADIP0 (6)
H_CADIN0 (6)

H_CLKIP1 (6)
H_CLKIN1 (6)

H_CLKIP0 (6)
H_CLKIN0 (6)

H_CTLIP0 (6)
H_CTLIN0 (6)

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENG INEE RIN G DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY O R DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/05/09 2006/03/08

Compal Secret Data

Deciphered Date

Compal Electronics. inc.

Title

SCHEMATIC, M/B LA-3121P

Size Document Number R ev

Custom

401411

Date: Sheet

星期三 五

10, 2006

2

月

12 51,

1

D

of

5

D D

R18 0_0402_5%

PCIE_MRX_PTX_P0(31)

C C

PCIE_MRX_PTX_N0(31)
PCIE_MRX_PTX_P1(34)

PCIE_MRX_PTX_N1(34)

R14:

R15:

1 2

R19 0_0402_5%

1 2

R16 0_0402_5%

1 2

R17 0_0402_5%

1 2

10KOhm FOR RS485

1.47KOhm FOR RS690

8.25KOhm FOR RS485
DNI FOR RS690

A_MRX_STX_N0(18)
A_MRX_STX_P1(18)

A_MRX_STX_N1(18)

R14 10K_0402_1%
R15 8.25K_0402_1%

4

U39B

G5

GFX_RX0P

G4

GFX_RX0N

J8

GFX_RX1P

J7

GFX_RX1N

J4

GFX_RX2P

J5

GFX_RX2N

L8

GFX_RX3P

L7

GFX_RX3N

L4

GFX_RX4P

L5

GFX_RX4N

M8

GFX_RX5P

M7

GFX_RX5N

M4

GFX_RX6P

M5

GFX_RX6N

P8

GFX_RX7P

P7

GFX_RX7N

P4

GFX_RX8P

P5

GFX_RX8N

R4

GFX_RX9P

R5

GFX_RX9N

R7

GFX_RX10P

R8

GFX_RX10N

U4

GFX_RX11P

U5

GFX_RX11N

W4

GFX_RX12P

W5

GFX_RX12N

Y4

GFX_RX13P

Y5

GFX_RX13N

V9

GFX_RX14P

W9

GFX_RX14N

AB7

GFX_RX15P

AB6

PCIE_MRX_PTX_P0_R
PCIE_MRX_PTX_N0_R

PCIE_MRX_PTX_P1_R
PCIE_MRX_PTX_N1_R

A_MRX_STX_P0
A_MRX_STX_N0 A_MTX_SRX_N0

A_MRX_STX_P1
A_MRX_STX_N1

1 2
1 2

GFX_RX15N

W11

GPP_RX0P

W12

GPP_RX0N

AA11

GPP_RX1P

AB11

GPP_RX1N

Y7

GPP_RX2P

AA7

GPP_RX2N

AB9

GPP_RX3P

AA9

GPP_RX3N

W14

SB_RX0P

W15

SB_RX0N

AB12

SB_RX1P

AA12

SB_RX1N

AA14

PCEH_ISET

AB14

PCEH_TXISET

216MSA4ALA11FG RS485MC_BGA465

PART 2 OF 5

PCIE I/F GFX

PCIE I/F GPP

PCIE I/F SB

GFX_TX10N
GFX_TX11N
GFX_TX12N
GFX_TX13N
GFX_TX14N
GFX_TX15N

PCEH_PCAL
PCEH_NCAL

GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N

GFX_TX10P
GFX_TX11P
GFX_TX12P
GFX_TX13P
GFX_TX14P
GFX_TX15P

GPP_TX0P
GPP_TX0N

GPP_TX1P
GPP_TX1N

GPP_TX2P
GPP_TX2N

GPP_TX3P
GPP_TX3N

SB_TX0P
SB_TX0N

SB_TX1P
SB_TX1N

3

J1
H2
K2
K1
K3
L3
L1
L2
N2
N1
P2
P1
P3
R3
R1
R2
T2
U1
V2
V1
V3
W3
W1
W2
Y2
AA1
AA2
AB2
AB1
AC1
AE3
AE4

AD8
AE8

AD7
AE7

AD4
AE5

AD5
AD6

AE9
AD10

AC8
AD9

AD11
AE11

PCIE_MTX_PRX_P0
PCIE_MTX_PRX_N0

PCIE_MTX_PRX_P1
PCIE_MTX_PRX_N1

A_MTX_SRX_N1

R375 150_0402_1%

1 2

R376 100_0402_1%

1 2

R375:

R215:

C457 0.1U_0402_10V6K

1 2

C458 0.1U_0402_10V6K

C466 0.1U_0402_10V6K

1 2

C467 0.1U_0402_10V6K

C465 0.1U_0402_10V6K

1 2

C464 0.1U_0402_10V6K

C468 0.1U_0402_10V6K

1 2

C469 0.1U_0402_10V6K

150 Ohm FOR RS485
562 Ohm FOR RS690

82.5 Ohm FOR RS485
2KOhm FOR RS690

1 2

1 2

1 2

1 2

2

PCIE_MTX_C_PRX_P0
PCIE_MTX_C_PRX_N0

PCIE_MTX_C_PRX_P1
PCIE_MTX_C_PRX_N1

A_MTX_C_SRX_P0A_MTX_SRX_P0
A_MTX_C_SRX_N0

A_MTX_C_SRX_P1A_MTX_SRX_P1
A_MTX_C_SRX_N1

+1.2V_HT

PCIE_MTX_C_PRX_P0 (31)
PCIE_MTX_C_PRX_N0 (31)

PCIE_MTX_C_PRX_P1 (34)
PCIE_MTX_C_PRX_N1 (34)

A_MTX_C_SRX_P0 (18)A_MRX_STX_P0(18)
A_MTX_C_SRX_N0 (18)

A_MTX_C_SRX_P1 (18)
A_MTX_C_SRX_N1 (18)

1

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENG INEE RIN G DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY O R DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/05/09 2006/03/08

Compal Secret Data

Deciphered Date

Compal Electronics. inc.

Title

SCHEMATIC, M/B LA-3121P

Size Document Number R ev

Custom

401411

Date: Sheet

星期三 五

10, 2006

2

月

13 51,

1

D

of

5

R540 0_0805_5%

D D

150U_D2_6.3VM

C C

B B

A A

+1.8VS

CHB2012U121_0805

CHB2012U121_0805

1

+

C183

2

+1.8VS

CHB2012U121_0805

4.7K_0402_5%

NOTE: ACCESS TO STRAP_DATA and I2C_CLK PINS
IS MANDAT ORY.

L52

1 2

@

L53

1 2

C499

@

L56

1 2

@

R50

1 2

AVDDQ

2.2U_0805_10V6K

1

C489

C495

10U_0805_10V4Z

2

PLLVDD

1

1

C485

10U_0805_10V4Z

2

2

1U_0603_10V4Z

HTPVDD

10U_0805_10V4Z

1

1

C493

2

2

1U_0603_10V4Z

+3VS

4.7K_0402_5%

4.7K_0402_5%
R51

1 2

U2

1

A0

2

A1

3

A2

4

VSS

AT24C04N-10SI-2.7_SO8

@

5

1

2

AVSSQ_GND

1

C492

4.7U_0805_10V4Z

2

C498

R49

1 2

EDID_LCD_CLK

EDID_LCD_DAT

VCC

WP
SCL
SDA

1

C484
1U_0603_10V4Z

2

R230-R232 CLOSE TO NB

CRT_R(24)
CRT_G(24)
CRT_B(24)

+1.8VS

1

C488

4.7U_0805_10V4Z

2

DDC_DATA

+3VS +3VS

8
7
6
5

R568 10K_0402_5%

LDT_STOP#(8,19)

12

R40
10K_0402_5%

@

EDID_LCD_CLK

1

C117

0.1U_0402_16V4Z

2

@

150_0402_1%

BMREQ#(18)

1 2

150U_D2_6.3VM

CRT_R
CRT_G
CRT_B

150_0402_1%

12

R75

12

B

2

E

3 1

C

MMBT3904_SOT23

12

R41
2K_0402_5%

@

STRP_DATA

12

R39
2K_0402_5%

@

C186

Q27

4

12

R76

+3VS

+3VS

4

AVSSQ_GND

+1.8VS

1

+

2

150_0402_1%

12

12

R46
1K_0402_5%

12

R569
10K_0402_5%

1

C635
18P_0402_50V8J

2

+3VS AVDD

L43

1 2

CHB2012U121_0805

1U_0603_10V4Z

L44

1 2

CHB2012U121_0805

1U_0603_10V4Z

R74

ALLOW_LDTSTOP(18)

HTREFCLK(17)

SB_OSCIN(17,19)

NBSRC_CLKP(17)
NBSRC_CLKN(17)

SBLINK_CLKP(17)
SBLINK_CLKN(17)

LOAD_ROM#(16)

C490

AVDDQ

AVSSQ_GND

8mils TRACE

VGA_DDC_CLK(24)
VGA_DDC_DATA(24)

NB_RST#(18,23,28,31,36)

NB_PWROK(37)

NB_OSC(17)

D27

12

1N4148_SOT23

1

2

1

C483

2

1

C496

2

2.2U_0805_10V6K

VGA_TV_CRMA(24)
VGA_TV_LUMA(24)
VGA_TV_COMPS(24)

VGA_CRT_VSYNC(24)
VGA_CRT_HSYNC(24)

R55 0_0402_5%
R56 0_0402_5%

PLLVDD

HTPVDD

R62 0_0402_5%

1 2

LDT_STOP#_NB

R388 22_0402_5%@

1 2

R73 2.7K_0402_5%@

1 2

R60 2.7K_0402_5%@

1 2

R57 2.7K_0402_5%@

1 2

R58 2.7K_0402_5%@

1 2

R59 2.7K_0402_5%@

1 2

EDID_LCD_CLK(25)
EDID_LCD_DAT(25)

12

R377

4.7K_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENG INEE RIN G DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY O R DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+3VS

12

1

C487

4.7U_0805_10V4Z

2

VGA_TV_CRMA
VGA_TV_LUMA
VGA_TV_COMPS

VGA_CRT_VSYNC
VGA_CRT_HSYNC

1 2

R386 715_0402_1%

1 2
1 2

R383 10K_0402_5%

12

SB_OSC_INT_R

DFT_GPIO0
DFT_GPIO2

DFT_GPIO3
DFT_GPIO4
DFT_GPIO5

EDID_LCD_CLK
EDID_LCD_DAT

DDC_DATA
STRP_DATA

2005/05/09 2006/03/08

3

R575

4.7K_0402_5%

12

R576

4.7K_0402_5%

AA15
AB15

TP5PAD

R590
150_0402_1%

TV@

U39C

B22

AVDD1

C22

AVDD2

G17

AVSSN1

H17

AVSSN2

A20

AVDDDI

B20

AVSSDI

A21

AVDDQ

A22

AVSSQ

C21

C_R

C20

Y_G

D19

COMP_B

E19

RED

F19

GREEN

G19

BLUE

C6

DACVSYNC

A5

DACHSYNC

B21

RSET

B6

DACSCL

A6

DACSDA

A10

PLLVDD

B10

PLLVSS

B24

HTPVDD

B25

HTPVSS

C10

SYSRESET#

C11

POWERGOOD

C5

LDTSTOP#

B5

ALLOW_LDTSTOP

C23

HTTSTCLK

B23

HTREFCLK

C2

TVCLKIN

B11

OSCIN

A11

OSCOUT

F2

GFX_CLKP

E1

GFX_CLKN

G1

SB_CLKP

G2

SB_CLKN

D6

DFT_GPIO0

D7

DFT_GPIO1

C8

DFT_GPIO2

C7

DFT_GPIO3

B8

DFT_GPIO4

A8

DFT_GPIO5

B2

BMREQb

A2

I2C_CLK

B4

I2C_DATA
THERMALDIODE_P
THERMALDIODE_N

C14

TMDS_HPD

B3

DDC_DATA

C3

TESTMODE

A3

STRP_DATA

216MSA4ALA11FG RS485MC_BGA465

CRT/TVOUT

PLL PWR

PM

CLOCKs

MIS.

Compal Secret Data

Deciphered Date

12

12

R591
150_0402_1% TV@

PART 3 OF 5

2

VGA_TV_CRMA
VGA_TV_LUMA
VGA_TV_COMPS

12

R592
150_0402_1% TV@

TXOUT_L0P

TXOUT_L0N

TXOUT_L1P

TXOUT_L1N

TXOUT_L2P

TXOUT_L2N

TXOUT_L3P

TXOUT_L3N
TXOUT_U0P

TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N

TXCLK_LP

TXCLK_LN
TXCLK_UP
TXCLK_UN

LPVDD
LPVSS

LVDDR18D_1
LVDDR18D_2
LVDDR18A_1
LVDDR18A_2

LVSSR1
LVSSR3
LVSSR5
LVSSR6
LVSSR7
LVSSR8

LVSSR12
LVSSR13

LVDS_DIGON

LVDS_BLON
LVDS_BLEN

DVO_D0
DVO_D1
DVO_D2
DVO_D3
DVO_D4
DVO_D5
DVO_D6
DVO_D7
DVO_D8

DVO_D9
DVO_D10
DVO_D11

DVO_VSYNC

DVO_DE

DVO_HSYNC

DVO_IDCKP
DVO_IDCKN

2

B14
B15
B13
A13
H14
G14
D17
E17

A15
B16
C17
C18
B17
A17
A18
B18

E15
D15
H15
G15

D14
E14

A12
B12
C12
C13

A16
A14
D12
C19
C15
C16

F14
F15

E12
G12
F12

AD14
AD15
AE15
AD16
AE16
AC17
AD18
AE19
AD19
AE20
AD20
AE21

AD13
AC13
AE13
AE17
AD17

1

2005/12/30 Added

LVDS_TXLP0
LVDS_TXLN0
LVDS_TXLP1
LVDS_TXLN1
LVDS_TXLP2
LVDS_TXLN2

LVDS_TXUP0
LVDS_TXUN0
LVDS_TXUP1
LVDS_TXUN1
LVDS_TXUP2
LVDS_TXUN2

LVDS_TXLCKP
LVDS_TXLCKN
LVDS_TXUCKP
LVDS_TXUCKN

0.1U_0402_16V4Z

C171

1U_0603_10V4Z

ENVDD
ENBKL

TP4 PAD

Title

Size Document Number R ev

Custom

Date: Sheet

LVDS_TXLP0 (25)
LVDS_TXLN0 (25)
LVDS_TXLP1 (25)
LVDS_TXLN1 (25)
LVDS_TXLP2 (25)
LVDS_TXLN2 (25)

LVDS_TXUP0 (25)
LVDS_TXUN0 (25)
LVDS_TXUP1 (25)
LVDS_TXUN1 (25)
LVDS_TXUP2 (25)
LVDS_TXUN2 (25)

LVDS_TXLCKP (25)
LVDS_TXLCKN (25)

1

C172

C154

2

1U_0603_10V4Z

4.7U_0805_10V4Z

1

2

ENVDD (25)
ENBKL (28)

LVDS_TXUCKP (25)
LVDS_TXUCKN (25)

1

2

0.1U_0402_16V4Z

1

C176

2

R541 0_0805_5%

R542 0_0805_5%

1 2

1

C177

4.7U_0805_10V4Z

2

1

C481

2

1 2

1 2

L54
CHB2012U121_0805

LPVSS_GND

L57

1 2

CHB2012U121_0805

C491

0.1U_0402_16V4Z

1

C131

2

LPVSS_GND

Compal Electronics. inc.

SCHEMATIC, M/B LA-3121P

401411

星期三 五

10, 2006

月

1

RS485: LVDDR18A=1.8V

+1.8VS

12

+1.8VS

L55

CHB2012U121_0805

4.7U_0805_10V4Z

1U_0603_10V4Z

1

1

C497

2

2

LVSSR_GND

LVSSR_GND

14 51,

of

D

5

4

3

2

1

NB RS485 POWER STATES

Power Signal

VDDHT
VDDR
VDD18

D D

VDDC
VDDA18
VDDA12

AVDDDI
PLLVDD
HTPVDD
VDDR3
LPVDD

L63
CHB2012U121_0805

L64
CHB2012U121_0805

10U_0805_10V4Z

C C

1

C37

2

2006/4/14 FOR EMI

+1.8VS VDD18

L2

1 2

CHB2012U121_0805

820P_0603_50V7K

+1.8VS

L58

1 2

1

CHB2012U121_0805

+

C25
150U_D2_6.3VM

2

+3VS VDDR3

L3

1 2

CHB2012U121_0805

B B

+1.8VS

VDDA12

1U_0402_6.3V4Z

L1

1 2

CHB2012U121_0805

+1.2V_HT

12

12

CURRENT MEASUREMENT

1

1

C54

C46

2

2

1U_0402_6.3V4Z

C330

2.2U_0805_10V6K

10U_0805_10V4Z

1

C44

2

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

1

C141

2

2

1

1

C459

C40

2

2

10U_0805_10V4Z

1U_0402_6.3V4Z

1

C161

C160

4.7U_0805_10V4Z

2

VDDR

1

1

C42

C38

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

VDDPLL VDDA12_PKG1

4.7U_0805_10V4Z

1

1

C140

2

2

VDD_HT

1

C50

2

1U_0402_6.3V4Z

1

C142

2.2U_0805_10V6K

2

1

C460

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C43

2

C168
1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C49

2

1U_0402_6.3V4Z

1

C462

2

1U_0402_6.3V4Z

1

C48

2

1

C123

2

VDDA18

1

C456

2

1U_0402_6.3V4Z

LVDDR18D
LVDDR18A OFFON ON OFF OFF

1

C461

2

+1.2V_HT

VDDA12_PKG1

+1.2V_HT

1

C134
10U_0805_10V4Z

2

AE24
AD24
AD22
AB17
AE23

W17
AC18
AD21
AC19
AC20
AB19
AD23
AA17
AE25

AC12
AD12
AE12

AC11

Y17

AE2
AB3

AB4
AC3
AD2
AE1

E11
D11

D22

J14
J15

U7

W7

E7
F7
F9
G9

M1

S3

S0

ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON

U39D

VDD_HT1
VDD_HT2
VDD_HT5
VDD_HT6
VDD_HT9
VDD_HT10
VDD_HT11
VDD_HT12
VDD_HT13
VDD_HT14
VDD_HT15
VDD_HT16
VDD_HT17
VDD_HT18
VDD_HT19

VDD18_1
VDD18_2

VDDA18_1
VDDA18_2
VDDA18_3
VDDA18_4
VDDA18_5
VDDA18_6
VDDA18_7
VDDA18_8

VDDR3_2
VDDR3_1

VDDR_1
VDDR_2
VDDR_3

VDDA12/VDDPLL_1
VDDA12/VDDPLL_2
VSSA12/VSSPLL_1
VSSA12/VSSPLL_2

VDDHT_PKG
VDDA12_PKG1
VDDA12_PKG2

216MSA4ALA11FG RS485MC_BGA465

S1

ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON

S4/S5

OFF

OFF

OFF

OFF
OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFFAVDD

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

PART 4 OF 5

VDDA_12_10
VDDA_12_11
VDDA_12_12

POWER

VDDA_12_1
VDDA_12_2
VDDA_12_3
VDDA_12_4
VDDA_12_5
VDDA_12_6
VDDA_12_7
VDDA_12_8
VDDA_12_9

G3

OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF

VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8

VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDC_28
VDDC_29
VDDC_30
VDDC_31
VDDC_32

D1
G7
E2
C1
E3
D2
M9
F4
B1
D3
L9
E6

L11
L13
L15
M12
R15
M14
N11
N13
N15
J11
H11
P12
P14
R11
R13
A19
B19
U11
U14
P17
L17
J19
D20
G20
A9
B9
C9
D9
A7
A4
U12
U15

VDDA12

1U_0402_6.3V4Z

1

C110

2

10U_0805_10V4Z

1

C24

+

150U_D2_6.3VM

2

1

C130

2

1U_0402_6.3V4Z

1

C115

2

10U_0805_10V4Z

1

C31
10U_0805_10V4Z

2

CURRENT MEASUREMENT

1

1

C93

C112

10U_0805_10V4Z

2

2

1U_0402_6.3V4Z

1

2

1

C126

2

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

C87

1U_0402_6.3V4Z

C108

1U_0402_6.3V4Z

1 2

L59 CHB2012U121_0805

1 2

L60 CHB2012U121_0805

1

C106
10U_0805_10V4Z

2

1

1

C60

C94

2

2

1

2

1U_0402_6.3V4Z

1

C138

2

1U_0402_6.3V4Z

C135

+1.2V_HT

1

C79
1U_0402_6.3V4Z

2

+1.2V_HT

1

C75

+

150U_D2_6.3VM

2

U39E

A25

VSS1

AE18

M15

M11
M20
M23
M25

W23

AD25

W24

AC23

AC14
AC22

AE22

AE14

M17

AC15

AC16

M13

F11
D23

G11
Y23
P11
R24

G23

N12
N14

P13
P20
P15
R12
R14
R20

Y25
U20

H25
Y22
D25

G24
H12
R23

T23
T25

R17
H23

A23
F17

E9

J22
J12

L12
L14
L20
L23

B7

L24

C4

D4

PAR 5 OF 5

VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59

216MSA4ALA11FG RS485MC_BGA465

GROUND

VSSA1
VSSA2
VSSA3
VSSA4
VSSA5
VSSA6
VSSA7
VSSA8

VSSA9
VSSA10
VSSA11
VSSA12
VSSA13
VSSA14
VSSA15
VSSA16
VSSA17
VSSA18
VSSA19
VSSA20
VSSA21
VSSA22
VSSA23
VSSA24
VSSA25
VSSA26
VSSA27
VSSA28
VSSA29
VSSA30
VSSA31
VSSA32
VSSA33
VSSA34
VSSA35
VSSA36
VSSA93
VSSA94
VSSA95
VSSA37
VSSA38
VSSA39
VSSA40
VSSA41
VSSA42
VSSA43
VSSA44
VSSA45

M3
V12
V11
V14
F3
V15
A1
H1
G3
J2
H3
AE10
J6
AE6
F1
L6
M2
M6
J3
P6
T1
N3
P9
R6
U2
T3
U3
U6
AC4
Y1
Y15
W6
AC2
Y3
Y9
Y11
Y12
Y14
AA3
R9
AD1
AC5
AC6
AC7
AD3
AC9
AC10
G6

RS485: 0 Ohm RESISTOR
RS690: 220 Ohm 500mA FERRITE BEAD

A A

Security Classification

Issued Date

THIS SHEET OF ENG INEE RIN G DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY O R DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/05/09 2006/10/10

Compal Secret Data

Deciphered Date

Compal Electronics. inc.

Title

SCHEMATIC, M/B LA-3121P

Size Document Number R ev

Custom

401411

Date: Sheet

星期三 五

10, 2006

2

月

15 51,

1

D

of

5

4

3

2

1

R67

LOAD_ROM#(14)

D D

1 2

3K_0402_5% @

H1

H_S394D138

1

H2

H_S394D138

@

@

1

H4

H_S394D138

1

@

H21

H_S394D138

1

@

H22

H_S394D138

1

@

LOAD_ROM#: LOAD ROM ST RA P ENABLE

High, LOAD R O M STRAP DISABLE
Low, LOAD ROM STRAP ENABLE

C C

1

C653

@

2

0.1U_0402_16V4Z

1

C654

@

2

0.1U_0402_16V4Z

+3VS+5VS +1.8VALW +1.8VS+3VALW+5VS +3VS+1.8VALW

1

C655

@

2

0.1U_0402_16V4Z

1

C656

@

2

0.1U_0402_16V4Z

H23

H_S394D138

@

1

H8

H_C236D165

@

1

H29

H_C236D161

@

1

H18

H_O134X118D55X39

@

1

H25

H_S354D138

@

1

H14

H_S394D138

@

1

H9

H_C236D165

@

1

H31

H_S315D118

@

1

H16

H_C276D118

@

1

H32

H_S315D138

@

1

H15

H_S394D138

@

1

H10

H_C236D165

@

1

H11

H_O134X118D55X39

@

1

H19

H_C276D118

@

1

H33

H_C315D236

@

1

H28

H_S394D138

@

1

H3

H_C236D161

@

1

H12

H_O134X118D55X39

@

1

H13

H_S354D138

@

1

H35

H_C163D163N

@

1

H7

H_C236D165

@

1

H6

H_C236D161

@

1

H17

H_O134X118D55X39

@

1

H24

H_S354D138

@

1

H34

H_O217X157D217X157N

@

1

B B

FD4

FD1

FD2

@

1

1

CF20

CF8

@

1

1

CF1

CF9

@

1

1

A A

FD5

FD3

@

@

1

1

CF21

@

@

CF2

1

CF3

@

1

1

Security Classification

Issued Date

THIS SHEET OF ENG INEE RIN G DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY O R DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

FD6

@

@

@

@

CF7

CF5

@

1

1

CF12

CF10

@

1

1

CF11

@

1

1

3

CF4

CF6

@

@

@

@

1

2005/05/09 2006/03/08

@

1

1

Compal Secret Data

Deciphered Date

Compal Electronics. inc.

Title

SCHEMATIC, M/B LA-3121P

Size Document Number R ev

Custom

401411

Date: Sheet

星期三 五

10, 2006

2

月

16 51,

1

D

of

5

4

3

2

1

+3VS

L8

1 2

CHB2012U121_0805

D D

1- PLACE ALL SERIAL TERMINATION
RESISTORS CLOSE TO U800

2- PUT DECOUPLING CAPS CLOSE TO U800
POWER PIN

C C

B B

EXT CLK FREQUENCY SELECT TABLE(MHZ)

FS2

0 0 0
0 0 1

0 1 0
0 1 1
1 0 0
1 0 1
1 1 1

A A

CPUFS1

Hi-Z
X

180.00

220.00

100.00

133.33

200.00

CLK_VDD

10U_0805_10V4Z

+3VS

12

SB_CK_SCLK(10,11,19,31,34)

SB_CK_SDAT(10, 1 1 , 19,31, 34)

1

C277

2

R415
10K_0402_5%

1

C272

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+3VS

L9

1 2

CHB2012U121_0805

+3VS

2.2U_0805_10V6K
L6

1 2

CHB2012U121_0805

2.2U_0805_10V6K

Parallel Resonance Crystal

C511

1 2

22P_0402_50V8J

22P_0402_50V8J

1 2

C510

SB_CK_SCLK
SB_CK_SDAT

1

1

C276

C263

2

2

0.1U_0402_16V4Z

1

C252

2

1

C246

2

12

Y5

14.31818MHz_20P_1BX14318BE1A

Ioh = 5 * Iref
(2.32mA)

Voh = 0.71V @ 60 ohm

SRCCLK

HTTFS0 PCI

[2:1]

Hi-Z Hi-Z100.00 Reserved

100.00

100.00

100.00

100.00

100.00

100.00

X/6X/3

30.0060.00

36.56 73.12

66.66 33.33

66.66 33.33

66.66 33.33 Norma l A T H L O N6 4 o p e r at i o n

USB

48.00

48.00

48.00

48.00

48.00

48.00

48.00

COMMENT

Reserved
Reserved
Reserved
Reserved
Reserved

1

1

C259

C268

2

2

0.1U_0402_16V4Z

R412

@

1M_0402_5%

1 2

R417 0_0402_5%

R425 0_0402_5%

1 2

R431 0_0402_5%

1 2

0.1U_0402_16V4Z

CLK_VDD

CLK_VDD48
CLK_VDDREF

CLK_X1

0.1U_0402_16V4Z

CLK_X2

12

1 2

1

C254

2

0.1U_0402_16V4Z

R433
475_0402_1%

54
14
23
28
44

39
60
53

15
22
29
45

38
58

11
61

10

48

1

1

C248

C279

2

2

0.1U_0402_16V4Z

U40

VDDCPU
VDDSRC
VDDSRC
VDDSRC
VDDSRC

5

VDD48
VDDATIG

2

VDDREF
VDDHTT

GNDCPU
GNDSRC
GNDSRC
GNDSRC
GNDSRC

8

GND48
GNDATIG

1

GNDREF
GNDHTT

3

X1

4

X2

RESET_IN#
NC

9

SMBCLK
SMBDAT

IREF

ICS951462AGLFT_TSSOP64

VDDA
GNDA

CPUCLK8T0

CPUCLK8C0

CPUCLK8T1

CPUCLK8C1

SRCCLKT6

SRCCLKC6
ATIGCLKT0
ATIGCLKC0
ATIGCLKT1
ATIGCLKC1
ATIGCLKT2
ATIGCLKC2
ATIGCLKT3
ATIGCLKC3

SRCCLKT5

SRCCLKC5

SRCCLKT4

SRCCLKC4

SRCCLKT3

SRCCLKC3

SRCCLKT2

SRCCLKC2

SRCCLKT0

SRCCLKC0

SRCCLKT1

SRCCLKC1

SRCCLKT7

SRCCLKC7

CLKREQA#

CLKREQB#
CLKREQC#

48MHz_1
48MHz_0

FS1/REF1
FS0/REF0
FS2/REF2
HTTCLK0

CLK_VDDA

50
49

CPUCLK_EXT_R

56

CPUCLK#_EXT_R

55
52
51

SBLINK_CLKP_R

16

SBLINK_CLKN_R

17

NBSRC_CLKP_R

41

NBSRC_CLKN_R

40
37
36
35
34
30
31

SBSRC_CLKP_R

18

SBSRC_CLKN_R

19

CLK_PCIE_CARD_R

20

CLK_PCIE_CARD#_R

21
24
25
26
27

CLK_PCIE_MINI_R

47

CLK_PCIE_MINI#_R

46
43
42
12
13

R426 0_0402_5%@

57

1 2

R460 0_0402_5%

32

1 2

R461 0_0402_5%

33

1 2

CLK_SD_48M_R

7

CLK_48M_USB_R

6

63
64
62
59

2

C261

0.1U_0402_16V4Z

1

47_0402_1%

R423

1 2

R429 47_0402_1%

1 2

R443 33_0402_1%
R449 33_0402_1%
R454 33_0402_1%
R459 33_0402_1%

R438 33_0402_1%
R444 33_0402_1%

R421 33_0402_1%

1 2

R416 33_0402_1%

1 2

SB_OSCIN_R
LPC_OSCIN_R
NB_OSCIN_R

HTREFCLK_R

1

2

261_0402_1%

1 2

R435 33_0402_1%

1 2

R437 33_0402_1%

1 2

R450 33_0402_1%

1 2

R456 33_0402_1%

1 2

1 2
1 2
1 2
1 2

1 2
1 2

+3VS

EXP_CLKREQ# (34)
MINI_CLKREQ# (31)

R407 33_0402_1%
R406 33_0402_1%
R418 33_0402_1%

R419 33_0402_1%

L10

1 2

CHB2012U121_0805

C260
10U_0805_10V4Z

R427

CLK_SD_48M (32)
CLK_USB_48M (19)

R404 8.2K_0402_5%

1 2

R403 8.2K_0402_5%

1 2

R413 8.2K_0402_5%

1 2

1 2
1 2
1 2

1 2

+3VS

49.9_0402_1%

R445

1 2

2.2K_0402_5%

49.9_0402_1%

R439

R458

1 2

1 2

CLK_VDD

12

R420

51.1_0402_1%

49.9_0402_1%

49.9_0402_1%

R453

R448

1 2

1 2

12

R402

CPUCLK (8)
CPUCLK# (8)

49.9_0402_1%

49.9_0402_1%

R442

1 2

2.2K_0402_5%

12

R401

SB_OSCIN (14,19)
CLK_14M_SIO (36)
NB_OSC (14)

HTREFCLK (14)

49.9_0402_1%

49.9_0402_1%

49.9_0402_1%

49.9_0402_1%

R436

R457

R434

R451

1 2

1 2

1 2

1 2

12

R409

2.2K_0402_5%
R400 0_0402_5%@

R399 0_0402_5%@
R410 0_0402_5%@

SBLINK_CLKP (14)
SBLINK_CLKN (14)
NBSRC_CLKP (14)
NBSRC_CLKN (14)

SBSRC_CLKP (18)
SBSRC_CLKN (18)
CLK_PCIE_CARD (34)
CLK_PCIE_CARD# (34)

CLK_PCIE_MINI (31)
CLK_PCIE_MINI# (31)

12
12
12

Security Classification

Issued Date

THIS SHEET OF ENG INEE RIN G DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY O R DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/05/09 2006/03/08

Compal Secret Data

Deciphered Date

Compal Electronics. inc.

Title

SCHEMATIC, M/B LA-3121P

Size Document Number R ev

Custom

401411

Date: Sheet

星期三 五

10, 2006

2

月

17 51,

1

D

of

5

2005/12/30 Change net to +3VALW

R174 10K_0402_5%

+3VALW

D D

A_RST#

A2Y

R570
10K_0402_5%

1 2

FOR SB600 VCC_SB= 1.2V
FOR SB460 VCC_SB= 1.8V

R601 CALRP: SB600=562R 1%, SB460=150R 1%
R603 CALRN: SB600=2.05K 1%, SB460=150R 1%
R603 CALRN: SB600=0R 1%, SB460=4.12K 1%

C C

B B

AZ_DOCK_EN#(19)

A A

1 2

C296

0.1U_0402_16V4Z

1 2

5

1

P

NB_RST#

4

OE#

G

U15

12

SN74AHCT1G125GW_SOT353-5

3

R177
47K_0402_5%

+1.8VS

L5

1 2

KC FBM-L11-201209-221LMAT_0805

+1.8VS

L7

1 2

KC FBM-L11-201209-221LMAT_0805

FOR SB600, CONNECT TO CPU_PG/LDT_PG
FOR SB460, CONNECT TO SSMUXSEL/GPIO0

R447 10K_0402_5%

+3VS

NB_RST# (14,23,28,31,36)

ALLOW_LDTSTOP(14)

1 2

@

1

C515
22U_0805_6.3V6M

2

SBSRC_CLKP(17)
SBSRC_CLKN(17)

A_MTX_C_SRX_P0(13)
A_MTX_C_SRX_N0(13)
A_MTX_C_SRX_P1(13)
A_MTX_C_SRX_N1(13)

PCIE_VDDR

C244

10U_0805_10V4Z

1

C512

2

1U_0603_10V6K

1 2

Y3

3

NC

2

NC

1 2

A_MRX_STX_P0
A_MRX_STX_N0
A_MRX_STX_P1
A_MRX_STX_N1

PLACE THESE PCIE AC COUPLING
CAPS CLOSE TO U600

R408 49.9_0402_1%@
R405 49.9_0402_1%@
R414 49.9_0402_1%@
R411 49.9_0402_1%@

1

1U_0603_10V6K

2

1

1

C247

2

2

1U_0603_10V6K

R24420M_0603_5%

12

C31418P_0402_50V8J

4

OUT

1

IN

C30718P_0402_50V8J

R440 0_0402_5%@

A_MRX_STX_P0(13)
A_MRX_STX_N0(13)
A_MRX_STX_P1(13)
A_MRX_STX_N1(13)

C608 AND C609 CLOSE
TO U600.U29

1

C516

2

1U_0603_10V6K

1U_0603_10V6K

32.768KHZ_12.5P_1TJS125DJ2A073

PLACE THESE COMPONENTS CLOSE TO U600, AND
USE GROUND GUARD FOR 32K_X1 AND 32K_X2

CPU_PWRGD(8,19)

R452
10K_0402_5%

@

1 2

C509 0.01U_0402_16V7K
C508 0.01U_0402_16V7K
C216 0.01U_0402_16V7K
C217 0.01U_0402_16V7K

1 2
1 2
1 2
1 2

R137 150_0402_1%
R138 150_0402_1%

R136 4.12K_0402_1%

C250

R218
10M_0402_5%

1 2

1 2

CPU_SIC(8)

CPU_SID(8)

LDT_RST#(8)

4

A_RST#

R178 33_0402_5%

1 2

1 2

1 2

1 2

1 2

A_MTX_C_SRX_P0
A_MTX_C_SRX_N0
A_MTX_C_SRX_P1
A_MTX_C_SRX_N1

1 2
1 2

1 2

1

C249

2

PCIE_VDDR

1

C514
1U_0603_10V6K

2

32K_X1

32K_X2

R446 0_0402_5%

1 2

FOR SB460, THIS BALL
IS LDT_RST# ONLY

A_MTX_C_SRX_P2
A_MTX_C_SRX_N2
A_MTX_C_SRX_P3
A_MTX_C_SRX_N3

PCIE_VDDR

A_MRX_C_STX_P0
A_MRX_C_STX_N0
A_MRX_C_STX_P1
A_MRX_C_STX_N1

32K_X1

32K_X2

U18A

AG10

A_RST#

J24

PCIE_RCLKP

J25

PCIE_RCLKN

P29

PCIE_TX0P

P28

PCIE_TX0N

M29

PCIE_TX1P

M28

PCIE_TX1N

K29

PCIE_TX2P

K28

PCIE_TX2N

H29

PCIE_TX3P

H28

PCIE_TX3N

T25

PCIE_RX0P

T26

PCIE_RX0N

T22

PCIE_RX1P

T23

PCIE_RX1N

M25

PCIE_RX2P

M26

PCIE_RX2N

M22

PCIE_RX3P

M23

PCIE_RX3N

E29

PCIE_CALRP

E28

PCIE_CALRN

E27

PCIE_CALI

U29

PCIE_PVDD

U28

PCIE_PVSS

F27

PCIE_VDDR_1

F28

PCIE_VDDR_2

F29

PCIE_VDDR_3

G26

PCIE_VDDR_4

G27

PCIE_VDDR_5

G28

PCIE_VDDR_6

G29

PCIE_VDDR_7

J27

PCIE_VDDR_8

J29

PCIE_VDDR_9

L25

PCIE_VDDR_10

L26

PCIE_VDDR_11

L29

PCIE_VDDR_12

N29

PCIE_VDDR_13

D2

X1

C1

X2

AC26

CPU_PG

W26

INTR/LINT0

W24

NMI/LINT1

W25

INIT#

AA24

SMI#

AA23

NC

AA22

IGNNE#

AA26

A20M#

Y27

FERR#

AA25

STPCLK#/ALLOW_LDTSTP

AH9

CPU_STP#/DPSLP_3V#

B24

NC

W23

DPRSLPVR

AC25

LDT_RST#

218S4RBSA11G SB460_BGA549

SB460

Part 1 of 4

PCI EXPRESS INTERFACE

REQ4#/PLL_BP33/PDMA_REQ1#

GNT3#/PLL_BP66/PDMA_GNT0#
GNT4#/PLL_BP50/PDMA_GNT1#

XTAL

CPU

RTC_IRQ#/ACPWR_STRAP

3

PCI CLKS

SPDIF_OUT/GPIO41

AD0/ROMA18
AD1/ROMA17
AD2/ROMA16
AD3/ROMA15
AD4/ROMA14
AD5/ROMA13
AD6/ROMA12
AD7/ROMA11

AD8/ROMA9

AD9/ROMA8
AD10/ROMA7
AD11/ROMA6
AD12/ROMA5
AD13/ROMA4
AD14/ROMA3
AD15/ROMA2
AD16/ROMD0
AD17/ROMD1
AD18/ROMD2
AD19/ROMD3
AD20/ROMD4
AD21/ROMD5
AD22/ROMD6
AD23/ROMD7

CBE0#/ROMA10

CBE1#/ROMA1

CBE2#/ROMWE#

DEVSEL#/ROMA0

PCI INTERFACE

TRDY#/ROMOE#

PAR/ROMA19

REQ3#/PDMA_REQ0#

INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36

LPC

RTC

PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6

PCIRST#

AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

CBE3#

FRAME#

IRDY#

STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#

GNT0#
GNT1#
GNT2#

CLKRUN#

LOCK#

LAD0
LAD1
LAD2
LAD3

LFRAME#

LDRQ0#
LDRQ1#

BMREQ#

SERIRQ
RTCCLK

VBAT

RTC_GND

U2
T2
U1
V2
W3
U3
V1
T1

AJ9

W7
Y1
W8
W5
AA5
Y3
AA6
AC5
AA7
AC3
AC7
AJ7
AD4
AB11
AE6
AC9
AA3
AJ4
AB1
AH4
AB2
AJ3
AB3
AH3
AC1
AH2
AC2
AH1
AD2
AG2
AD1
AG1
AB9
AF9
AJ5
AG3
AA2
AH6
AG5
AA1
AF7
Y2
AG8
AC11
AJ8
AE2
AG9
AH8
AH5
AD11
AF2
AH7
AB12
AG4
AG7
AF6

AD3
AF1
AF4
AF3

AG24
AG25
AH24
AH25
AF24
AJ24
AH26
W22
AF23

D3
F5

E1
D1

CLK_PCI_LAN_R
CLK_PCI_LPC_R
CLK_PCI_MINI_R
CLK_PCI_PCM_R
CLK_PCI_1394_R
CLK_PCI_SIO_R

R183 33_0402_5%

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
PCI_FRAME#
PCI_DEVSEL#
PCI_I RDY#
PCI_TRDY#
PCI_PAR
PCI_STOP#
PCI_PERR#
PCI_SERR#
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3

PM_CLKRUN#
PCI_PLOCK#

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ#0
LPC_DRQ#1

VBAT_IN

1

C322

2

1U_0402_6.3V4Z

CLK_PCI_LAN_R (22)
CLK_PCI_LPC_R (22)
CLK_PCI_MINI_R (22)
CLK_PCI_PCM_R (22)
CLK_PCI_1394_R (22)

R237 22_0402_5%

1 2

R228 0_0402_5%

1 2

1 2

PCI_AD[31..0]

PCI_CBE#[3..0]

1

C315

0.1U_0402_16V4Z

2

J2 JOPEN

@

Please Closed RAM
Door

CLK_PCI_SIO_R (22)

12

C326

1

1U_0402_6.3V4Z

2

PCI_FRAME# (26,31,32,35)
PCI_DEVSEL# (26,31,32,35)
PCI_IRDY# (26,31,32,35)
PCI_TRDY# (26,31,32,35)
PCI_PAR (26,31,32,35)
PCI_STOP# (26,31,32,35)
PCI_PER R # (26,31,32,35)
PCI_SER R# (26,31,32)
PCI_REQ#0 (35)
PCI_REQ#1 (31)
PCI_REQ#2 (32)
PCI_REQ#3 (26)

PCI_GNT#0 (35)
PCI_GNT#1 (31)
PCI_GNT#2 (32)
PCI_GNT#3 (26)

PM_CLKRUN# (26,31,36)

PCI_PIRQE# (32,35)
PCI_P IRQF# (26)
PCI_PIRQG# (31)
PCI_PIRQH# (26,31,32)

LPC_AD0 (28,36)
LPC_AD1 (28,36)
LPC_AD2 (28,36)
LPC_AD3 (28,36)
LPC_FRAME# (22,28,36)
LPC_DRQ#0 (36)

BMREQ# (14)
SERIRQ (28,32,36)

RTC_CLK (22)
RTC_IRQ# (22)

1 2

12

2

PCI_CLK6 (22)
SB_SPDIF (22)

PCIRST#

PCI_AD[31..0] (22,26,31,32,35)

+3VS+3VS

12

R256

R240
1K_0402_5%

10K_0402_5% @

12

R253
10K_0402_5%

-

4.7U_0805_10V4Z

LPC_DRQ#0
LPC_DRQ#1
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
PM_CLKRUN#
SERIRQ

BATT1

RTCBATT

12

L49
FBM-L11-160808-800LMT_0603

CLK_PCI_LAN_R

R214 10K_0402_5%

1 2

PCI_CBE# [3..0] (26,31,32,35)

R250
0_0402_5%

2005/10/27 Added, Near U4520, Need equal length

U42

8

DLY CNTRL

1

CLKIN

3

VDD

13

VDD

9

SSON

4

SS%

5

GND

12

GND

ASM3P623S00EF-16-TR_TSSOP16

SPREAD@

PCIRST#

R124 10K_0402_5%
R122 10K_0402_5%
R128 100K_0402_5%
R127 100K_0402_5%
R126 100K_0402_5%
R121 100K_0402_5%
R120 10K_0402_5%
R123 10K_0402_5%

LPC PULL UPS

+

+RTCBATT

12

+RTCVCC

1

C317

@

2

CLK_PCI_LAN_R
CLK_PCI_LPC_R
CLK_PCI_MINI_R
CLK_PCI_PCM_R
CLK_PCI_1394_R
CLK_PCI_SIO_R

CLKOUT1
CLKOUT2
CLKOUT3
CLKOUT4
CLKOUT5
CLKOUT6
CLKOUT7
CLKOUT8

SB460 ONLY

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

+RTCBATT

R252 22_0402_5% NOSPREAD@

1 2

R255 22_0402_5% NOSPREAD@

1 2

R247 22_0402_5% NOSPREAD@

1 2

R226 22_0402_5% NOSPREAD@

1 2

R223 22_0402_5% NOSPREAD@

1 2

R217 22_0402_5% NOSPREAD@

1 2

CLKOUT1
CLKOUT2
CLKOUT3
CLKOUT4
CLKOUT5
CLKOUT6

+3VALW

5

1

P

IN1

2

IN2

G

3

U16
SN74AHC1G08DCKR_SC70

+3VS

D7
BAS40-04_SOT23

2

+CHGRTC

R231 22_0402_5%SPREAD@
R229 22_0402_5%SPREAD@
R230 22_0402_5%SPREAD@
R232 22_0402_5%SPREAD@
R238 22_0402_5%SPREAD@
R487 22_0402_5%

1 2

4

O

2
6
7
10
11
14
15
16

R193
10K_0402_5%

1 2

1

3

1

C327

0.1U_0402_16V4Z

2

1 2
1 2
1 2
1 2
1 2
1 2

SPREAD@

2005/12/30 Change net to +3VALW

C299

0.1U_0402_16V4Z

PCI_RST#

12

R190
47K_0402_5%

+3VS

+3VS

+3VS

+3VS

+3VS

RTC Battery

1

PCI_RST# (26,31,32,34,35)

RP33

1 8
2 7
3 6
4 5

8.2K_1206_8P4R_5%

RP31

1 8
2 7
3 6
4 5

8.2K_1206_8P4R_5%

RP32

1 8
2 7
3 6
4 5

8.2K_1206_8P4R_5%

RP34

1 8
2 7
3 6
4 5

8.2K_1206_8P4R_5%

RP30

1 8
2 7
3 6
4 5

8.2K_1206_8P4R_5%

CLK_PCI_LAN (26)
CLK_PCI_LPC (28)
CLK_PCI_MINI (31)
CLK_PCI_PCM (32)
CLK_PCI_1394 (35)
CLK_PCI_SIO (36)

CLK_PCI_LAN (26)
CLK_PCI_LPC (28)
CLK_PCI_MINI (31)
CLK_PCI_PCM (32)
CLK_PCI_1394 (35)
CLK_PCI_SIO (36)

PCI_SERR#
PCI_TRDY#
PCI_FRAME#
PCI_STOP#

PCI_PLOCK#
PCI_I RDY#
PCI_PERR#
PCI_DEVSEL#

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3

PCI_REQ#4
PCI_PAR

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTI AL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAIN S

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS , INC.

3

2005/05/09 2006/03/08

Compal Secret Data

Deciphered Date

Compal Electronics. inc.

Title

SCHEMATIC, M/B LA-3121P

Size Document Number Rev

Custom

401411

期四 五月

2

Date: Sheet

1

18 51¬P , 11, 2006

D

of

5

+3VS

R144 10K_0402_5%
R432 10K_0402_5%
R140 10K_0402_5%
R125 10K_0402_5%

R152 10K_0402_5%
R180 10K_0402_5%

D D

C C

B B

+3VS

R567 10K_0402_5%

+3VALW

R203 10K_0402_5%

R474 10K_0402_5%
R358 10K_0402_5%
R485 10K_0402_5%@
R334 10K_0402_5%

R298 10K_0402_5%
R296 10K_0402_5%
R294 10K_0402_5%
R333 10K_0402_5%
R489 10K_0402_5%

AZ_BITCLK(39)
AC_BITCLK(38)
AZ_SYNC(39)
AC_SYNC(38)

AZ_RST#(39)

AC_RST#(38)
AZ_SDOUT(39)
AC_SDOUT(38)

SB460 ONLY

12
12
12
12

12
12

R424 2.2K_0402_5%
R430 2.2K_0402_5%

R475 10K_0402_5%
R468 10K_0402_5%
R479 10K_0402_5%
R464 10K_0402_5%
R466 10K_0402_5%
R470 4.7K_0402_5%
R184 4.7K_0402_5%
R465 4.7K_0402_5%
R463 4.7K_0402_5%
R192 10K_0402_5%@
R197 10K_0402_5%
R267 10K_0402_5%
R44 10K_0402_5%
R172 10K_0402_5%
R507 10K_0402_5%
R134 10K_0402_5%

R571 10K_0402_5%
R574 10K_0402_5%

12
12
12

12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12

12
12

12
12

12
12
12

12
12
12
12
12

R482 33_0402_5%
R234 33_0402_5%
R505 33_0402_5%
R236 33_0402_5%
R175 33_0402_5%
R483 33_0402_5%
R235 33_0402_5%
R233 33_0402_5%

GPIO5
LPC_SMI#
GPIO4
SB460_GPIO31

GPIO7
EC_THERM#

SB_CK_SCLK
SB_CK_SDAT
REQ5#

SYS_RESET#
LPC_PME#
PWRBTN_OUT#
EC_SMI#
SB_PCIE_WAKE#
PM_SLP_S3#
PM_SLP_S5#
S3_STATE_R
CP_PE#
SUS_STAT#
BLINK/GPM6#
EC_SWI#
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3

EC_SCI#
USB_OC#6

GPIO3
ACZ_SDIN0

ACZ_SDIN1
ACZ_SDIN2
SB_AC_BITCLK

SB_AZ_RST#
SB_AZ_SYNC
SB_AZ_SDOUT
SB_AZ_BITCLK
SB_AC_RST#

12
12
12
12
12
12
12
12

S3_STATE(28)

SB_INT_FLASH_SEL#(28,30)

EC_SMI#(28)

CP_PE#(34)

EC_FLASH#(30)
EC_LID_OUT#(28)
SB_INT_FLASH_SEL#(28,30)

USB_OC#0(34)

SB_AZ_BITCLK

SB_AZ_SYNC

SB_AZ_RST#

SB_AZ_SDOUT

EC_FLASH#(30)

CPU_PWRGD(8,18)

ACIN(28,45)

4

EC_SWI#(28)

EC_SCI#(28)
PM_SLP_S3#(28)
PM_SLP_S5#(28)

PWRBTN_OUT#(28)

SB_PWROK(8,37)

SUS_STAT#(30)

EC_GA20(28)
EC_KBRST#(28)

R577 0_0402_5%@

SB_PCIE_WAKE#(31,34)

H_THERMTRIP#(8)

SB_CK_SCLK(10,11,17,31,34)

SB_CK_SDAT(10, 1 1 , 17,31, 34)

12

EC_RSMRST#(28)

SB_OSCIN(14,17)

R579 0_0402_5%

R428 0_0402_5%@

SB_SPKR(39)

EC_SWI#
EC_SCI#
PM_SLP_S3#
PM_SLP_S5#
PWRBTN_OUT#
SYS_PWROK
SUS_STAT#

R179 10K_0402_5%
R484 10K_0402_5%

R578 10K_0402_5%
R141 10K_0402_5%

R441 10K_0402_5%
R145 10K_0402_5%

R142 0_0402_5%

EC_GA20
EC_KBRST#
LPC_PME#
LPC_SMI#
S3_STATE_R
SYS_RESET#
SB_PCIE_WAKE#
BLINK/GPM6#
H_THERMTRIP#

EC_RSMRST#
SB_OSC_INT

12
12

SB_CK_SCLK
SB_CK_SDAT

1 2

12
12

12
12

GPIO7
GPIO4
GPIO5

12
12

BALLS(C6 AND C5) ARE FOR SB600 ONLY (NC FOR SB460)

EC_SMI#
USB_OC#6
SB_AZ_RST#

R171 0_0402_5%

EC_LID_OUT#

R139 0_0402_5%@
R506 0_0402_5%
R580 0_0402_5%@

SB_AC_SDOUT(22)

ACZ_SDIN0(39)
ACZ_SDIN1(38)

R581 0_0402_5%@

IDE_HRESET#(23)
SB460_GPIO13(22)
AZ_DOCK_EN#(18)
SB460_GPIO14(22)

EC_THERM#(8,28)
LDT_STOP#(8,14)

12
12
12
12

SB_AZ_BITCLK
SB_AZ_SDOUT

SB_AZ_SYNC

SB_AC_BITCLK
SB_AC_SDOUT
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2

12

SB_AC_RST#

GPIO3
SB460_GPIO31
REQ5#

R187 0_0402_5%@
R185 0_0402_5%

R477 0_0402_5%

SB460 ONLY

USB_OC#3
USB_OC#2
USB_OC#1
USB_OC#0

12
12

12

3

U18D

A3

PCI_PME#/GEVENT4#

B2

RI#/EXTEVNT0#

F7

SLP_S3#

A5

SLP_S5#

E3

PWR_BTN#

B5

PWR_GOOD

B3

SUS_STAT#

F9

NC

E9

TEST1

G9

TEST0

AF26

GA20IN

AG26

KBRST#

D7

LPC_PME#/GEVENT3#

C25

LPC_SMI#/EXTEVNT1#

D9

S3_STATE/GEVENT5#

F4

SYS_RESET#/GPM7#

E7

WAKE#/GEVENT8#

C2

BLINK/GPM6#

G7

SMBALERT#/THRMTRIP#/GEVENT2#

E2

RSMRST#

B23

14M_OSC

C28

NC

A26

ROM_CS#/GPIO1

B29

GHI#/GPIO6

A23

VGATE/GPIO7

B27

GPIO4

D23

GPIO5

B26

SPKR/GPIO2

C27

SCL0/GPOC0#

B28

SDA0/GPOC1#

C3

NC

F3

NC

D26

DDC1_SCL/GPIO9

C26

DDC1_SDA/GPIO8

A27

LDT_PG/SSMUXSEL/GPIO0

A4

NC

C6

NC

C5

NC

C4

USB_OC7#/GEVENT7#

B4

USB_OC6#/GEVENT6#

B6

USB_OC5#/AZ_RST#/GPM5#

A6

USB_OC4#/GPM4#

C8

USB_OC3#/GPM3#

C7

USB_OC2#/FANOUT1/LLB#/GPM2#

B8

USB_OC1#/GPM1#

A8

USB_OC0#/GPM0#

N2

AZ_BITCLK

M2

AZ_SDOUT

K2

NC

L3

AZ_SYNC

K3

NC

L1

AC_BITCLK/GPIO38

L2

AC_SDOUT/GPIO39

L4

ACZ_SDIN0/GPIO42

J2

ACZ_SDIN1/GPIO43

J4

ACZ_SDIN2/GPIO44

M3

AC_SYNC/GPIO40

L5

AC_RST#/GPIO45

E23

FANOUT0/GPIO3

AC21

GPIO31

AD7

GPIO13

AE7

DPSLP_OD#/GPIO37

AA4

GPIO14

T4

TALERT#/GPIO10

D4

SLP#/LDT_STP#

AB19

NC

218S4RBSA11G SB460_BGA549

OSC / RST

AC97 AZALIA

SB460

GPIO

USB OC

2

1

Part 4 of 4

CLK_USB_48M

A17

USBCLK
USB_RCOMP
USB_ATEST1

USB_ATEST0

USB_HSDP7+

USB_HSDM7-

USB INTERFACE

USB PWR

USB_HSDP6+

USB_HSDM6-

USB_HSDP5+

USB_HSDM5-

USB_HSDP4+

USB_HSDM4-

USB_HSDP3+

USB_HSDM3-

USB_HSDP2+

USB_HSDM2-

USB_HSDP1+

USB_HSDM1-

USB_HSDP0+

USB_HSDM0-

AVDDTX_0
AVDDTX_1
AVDDTX_2
AVDDTX_3
AVDDTX_4
AVDDRX_0
AVDDRX_1
AVDDRX_2
AVDDRX_3
AVDDRX_4

AVDDC

AVSSC

AVSS_USB_1
AVSS_USB_2
AVSS_USB_3
AVSS_USB_4
AVSS_USB_5
AVSS_USB_6
AVSS_USB_7
AVSS_USB_8
AVSS_USB_9

AVSS_USB_10
AVSS_USB_11
AVSS_USB_12
AVSS_USB_13
AVSS_USB_14
AVSS_USB_15
AVSS_USB_16
AVSS_USB_17
AVSS_USB_18
AVSS_USB_19
AVSS_USB_20
AVSS_USB_21
AVSS_USB_22
AVSS_USB_23
AVSS_USB_24
AVSS_USB_25
AVSS_USB_26
AVSS_USB_27
AVSS_USB_28
AVSS_USB_29
AVSS_USB_30
AVSS_USB_31
AVSS_USB_32
AVSS_USB_33

ACPI / WAKE UP EVENTS

R164 11.3K_0402_1%

A14
A11

A10
H12

NC

G12

NC
NC

NC

0103 Change to 11.3K

E12
D12

E14
D14

USB20_P6

G14

USB20_N6

H14

USB20_P5

D16

USB20_N5

E16

USB20_P4

D18

USB20_N4

E18

USB20_P3

G16

USB20_N3

H16

USB20_P2

G18

USB20_N2

H18

USB20_P1

D19

USB20_N1

E19

USB20_P0

G19

USB20_N0

H19

B9
B11
B13
B16
B18
A9
B10
B12
B14
B17

A12
A13
A16

C9
C10
C11
C12
C13
C14
C16
C17
C18
C19
C20
D11
D21
E11
E21
F11
F12
F14
F16
F18
F19
F21
G11
G21
H11
H21
J11
J12
J14
J16
J18
J19

12

1

C533

2

10U_0805_10V4Z

10U_0805_10V4Z

1

C286

2

0.1U_0402_16V4Z

USB20_P6 (38)
USB20_N6 (38)

USB20_P5 (38)
USB20_N5 (38)

USB20_P4 (38)
USB20_N4 (38)

USB20_P3 (31)
USB20_N3 (31)

USB20_P2 (34)
USB20_N2 (34)

USB20_P1 (34)
USB20_N1 (34)

USB20_P0 (34)
USB20_N0 (34)

1

2

PLACE C286 AND
C294 CLOSE TO
U18

CLK_USB_48M (17)

1

C535

C542

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C294

2

2.2U_0603_6.3V6K

1

1

C537

2

2

0.1U_0402_16V4Z

+3.3V_AVDDC

1

C292
1U_0402_6.3V4Z

2

AVDD_USB

1

C284

C546

2

0.1U_0402_16V4Z

L12

1 2

KC FBM-L11-201209-221LMAT_0805

1

C525

2

0.1U_0402_16V4Z

+3VALW

1

2

L46

1 2

KC FBM-L11-201209-221LMAT_0805

C545

0.1U_0402_16V4Z

+3VALW

A A

Security Classification

Issued Date

THIS SHEET OF ENG INEE RIN G DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY O R DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/05/09 2006/03/08

Compal Secret Data

Deciphered Date

Compal Electronics. inc.

Title

SCHEMATIC, M/B LA-3121P

Size Document Number R ev

Custom

401411

Date: Sheet

星期四 五

11, 2006

2

月

19 51,

1

D

of

5

D D

SATA_STX_C_DRX_P0(23)
SATA_STX_C_DRX_N0(23)

SATA_DTX_C_SRX_N0(23)
SATA_DTX_C_SRX_P0(23)

C C

SATA_LED#(28)

SATA_STX_C_DRX_P0

SATA_DTX_C_SRX_N0 SATA_DTX_SRX_N0

R546 0_0402_5%PATA@

12

SATA@

+3VS

12

1 2

12

Y2

25MHZ_20P

SATA@

R146

4.7K_0402_5%

R143 0_0402_5%

SATA_X1

R176

10M_0402_5%

SATA_X2

SATA@

1 2

SATA@

1 2

C297 27P_0402_50V8J

1 2

SATA@

C295

1 2

27P_0402_50V8J

SATA@

R462 1K_0402_1%

1 2

12

SATA@

PLACE SATA_CAL
RES & CAP VERY
CLOSE TO BALL
OF U18

NOTE:

VCC_SB=1.2V WHEN SB600
VCC_SB 1.8V WHEN SB460

+1.8VS

B B

+1.8VS

+1.8VS

A A

L13

1 2

CHB2012U121_0805

C650 CLOSE TO THE
BALL OF U600

L45

1 2

CHB2012U121_0805

SATA@

SATA@

PLLVDD_ATA

1U_0402_6.3V4Z

L47

1

C539
22U_0805_6.3V6M

2

SATA@

0.1U_0402_16V4Z

SATA@

5

1U_0402_6.3V4Z

1

SATA@
2

CHB2012U121_0805

SATA@

C293

1 2

C534 CLOSE TO THE
BALL OF U18

1

1

C529

2

2

0.1U_0402_16V4Z

1

SATA@
2

C522

R462 IS 1K 1% FOR 25MHz
XTAL, 4.99K 1% FOR 100MHz
INTERNAL CLOCK

1

C543

SATA@

2

12

XTLVDD_ATA

1

2

AVDD_SATA

1

2

C291

SATA@

0.1U_0402_16V4Z

R547
0_0402_5%

PATA@

C534
1U_0402_6.3V4Z

SATA@

C524
1U_0402_6.3V4Z

SATA@

4

PLACE SATA AC COUPLING
CAPS CLOSE TO SB460

SATA_STX_DRX_P0

C5540.01U_0402_16V7K

1 2

C5560.01U_0402_16V7K
C5640.01U_0402_16V7K

1 2

SATA@

SATA_DTX_SRX_P0SATA_DTX_C_SRX_P0

C5650.01U_0402_16V7K

SATA@

SATA@

12

C544

2.2U_0603_6.3V6K

@

12

R548
0_0402_5%

PATA@

12

R549
0_0402_5%

PATA@

4

SATA_CAL
SATA_X1
SATA_X2

SATA_ACT#SATA_LED#

SATA ACTIVITY LED

PLLVDD_ATA

XTLVDD_ATA

AVDD_SATA

U18B

AH21

SATA_TX0+

AJ21

SATA_TX0-

AH20

SATA_RX0-

AJ20

SATA_RX0+

AH18

SATA_TX1+

AJ18

SATA_TX1-

AH17

SATA_RX1-

AJ17

SATA_RX1+

AH13

SATA_TX2+

AH14

SATA_TX2-

AH16

SATA_RX2-

AJ16

SATA_RX2+

AJ11

SATA_TX3+

AH11

SATA_TX3-

AH12

SATA_RX3-

AJ13

SATA_RX3+

AF12

SATA_CAL

AD16

SATA_X1

AD18

SATA_X2

AC12

SATA_ACT#

AD14

PLLVDD_SATA_1

AJ10

PLLVDD_SATA_2

AC16

XTLVDD_SATA

AE14

AVDD_SATA_1

AE16

AVDD_SATA_2

AE18

AVDD_SATA_3

AE19

AVDD_SATA_4

AF19

AVDD_SATA_5

AF21

AVDD_SATA_6

AG22

AVDD_SATA_7

AG23

AVDD_SATA_8

AH22

AVDD_SATA_9

AH23

AVDD_SATA_10

AJ12

AVDD_SATA_11

AJ14

AVDD_SATA_12

AJ19

AVDD_SATA_13

AJ22

AVDD_SATA_14

AJ23

AVDD_SATA_15

AB14

AVSS_SATA_1

AB16

AVSS_SATA_2

AB18

AVSS_SATA_3

AC14

AVSS_SATA_4

AC18

AVSS_SATA_5

AC19

AVSS_SATA_6

AD12

AVSS_SATA_7

AD19

AVSS_SATA_8

AD21

AVSS_SATA_9

AE12

AVSS_SATA_10

AE21

AVSS_SATA_11

AF11

AVSS_SATA_12

AF14

AVSS_SATA_13

AF16

AVSS_SATA_14

AF18

AVSS_SATA_15

AG11

AVSS_SATA_16

AG12

AVSS_SATA_17

AG13

AVSS_SATA_18

AG14

AVSS_SATA_19

AG16

AVSS_SATA_20

AG17

AVSS_SATA_21

AG18

AVSS_SATA_22

AG19

AVSS_SATA_23

AG20

AVSS_SATA_24

AG21

AVSS_SATA_25

AH10

AVSS_SATA_26

AH19

AVSS_SATA_27

218S4RBSA11G SB460_BGA549

3

SB460

Part 2 of 4

SERIAL ATA

ATA 66/100

PIDE_IORDY

PIDE_IRQ

PIDE_A0
PIDE_A1
PIDE_A2

PIDE_DACK#

PIDE_DRQ

PIDE_IOR#
PIDE_IOW#
PIDE_CS1#
PIDE_CS3#

PIDE_D0
PIDE_D1
PIDE_D2
PIDE_D3
PIDE_D4
PIDE_D5
PIDE_D6
PIDE_D7
PIDE_D8

PIDE_D9
PIDE_D10
PIDE_D11
PIDE_D12
PIDE_D13
PIDE_D14
PIDE_D15

SPI ROMHW MONITOR

SERIAL ATA POWER

Security Classification

Issued Date

THIS SHEET OF ENG INEE RIN G DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY O R DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/05/09 2006/03/08

IDE_IORDYSATA_STX_DRX_N0SATA_STX_C_DRX_N0

AB29

IDE_IRQ

AA28

IDE_A0

AA29

IDE_A1

AB27

IDE_A2

Y28

IDE_DACK#

AB28

IDE_DREQ

AC27

IDE_IOR#

AC29

IDE_IOW#

AC28

IDE_CS1#

W28

IDE_CS3#

W27

IDE_D0

AD28

IDE_D1

AD26

IDE_D2

AE29

IDE_D3

AF27

IDE_D4

AG29

IDE_D5

AH28

IDE_D6

AJ28

IDE_D7

AJ27

IDE_D8

AH27

IDE_D9

AG27

IDE_D10

AG28

IDE_D11

AF28

IDE_D12

AF29

IDE_D13

AE28

IDE_D14

AD25

IDE_D15

AD29

J3

NC

J6

NC

G3

NC

G2

NC

G6

NC

C23

NC

G5

NC

M4

NC

T3

NC

V4

NC

N3

NC

P2

NC

W4

NC

P5

NC

P7

NC

P8

NC

T8

NC

T7

NC

V5

NC

L7

NC

M8

NC

V6

NC

M6

NC

P4

NC

M7

NC

V7

NC

N1

NC

M1

NC

NOTE:

IF THERE IS NO IDE, TEST
POINTS FOR D EBUG BUS
IS MANDATORY

IDE_D[15..0]

Compal Secret Data

Deciphered Date

2

IDE_IORDY (23)
IDE_IRQ (23)
IDE_A0 (23)
IDE_A1 (23)
IDE_A2 (23)
IDE_D A CK# (22,23)
IDE_DREQ (23)
IDE_IOR# (23)
IDE_IOW# (23)
IDE_CS1# (23)
IDE_CS3# (23)

IDE_D[15..0] (23)

2

1

Compal Electronics. inc.

Title

SCHEMATIC, M/B LA-3121P

Size Document Number R ev

Custom

401411

Date: Sheet

星期四 五

11, 2006

月

20 51,

1

of

D

5

4

3

2

1

+3VS

D D

C532

0.1U_0402_16V4Z

C C

+1.8VS AVDDCK_1.8V

B B

A A

PLACE ALL THE DECOUPLING CAPS ON
THIS SHEET CLOSE TO SB AS POSSIBLE.

C513
220U_D2_4VM_R15

1

+

2

1U_0402_6.3V4Z

1

1

C541

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C538

2

22U_0805_6.3V6M

1U_0402_6.3V4Z

L11

1 2

CHB2012U121_0805

1

1

C530

C548

2

2

22U_0805_6.3V6M

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C555

C563

2

2

22U_0805_6.3V6M

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C521

2

1U_0402_6.3V4Z

1

C536

2

1

C527

2

1U_0402_6.3V4Z

1

C551

2

+3VALW

1

C558

2

1

2

+1.8VALW

1

2

C552

0.1U_0402_16V4Z

1

C526

2

1U_0402_6.3V4Z

1

C553

0.1U_0402_16V4Z

2

1

C528

2

1U_0402_6.3V4Z

1

C262

2.2U_0805_10V6K

2

+1.8VALW

1

C550

2

0.1U_0402_16V4Z

1

C523

2

1U_0402_6.3V4Z

+1.8VS

1

C531

2

1U_0402_6.3V4Z

1

2

1

C518

2

1U_0402_6.3V4Z

C540

+3VS

1

C519

2

1U_0402_6.3V4Z

C517

VCC_SB=1.8V WHEN SB460

+1.8VS

+3VALW

+1.8VALW

VCC_SB=1.8V WHEN SB460

+1.8VALW

C520

+1.2V_HT

2

1

2

C298

1

1U_0402_6.3V4Z

CPU_PWR=1.2V WHEN SB460

+5VS

R173

1K_0402_5%

D6

2 1

CH751H-40PT _SOD323

2006/4/13 modify

V5_VREF

12

AVDDCK_1.8V+3VS

0.1U_0402_16V4Z

U18C

A25

VDDQ_1

A28

VDDQ_2

C29

VDDQ_3

D24

VDDQ_4

L9

VDDQ_5

L21

VDDQ_6

M5

VDDQ_7

P3

VDDQ_8

P9

VDDQ_9

T5

VDDQ_10

V9

VDDQ_11

W2

VDDQ_12

W6

VDDQ_13

W21

VDDQ_14

W29

VDDQ_15

AA12

VDDQ_16

AA16

VDDQ_17

AA19

VDDQ_18

AC4

VDDQ_19

AC23

VDDQ_20

AD27

VDDQ_21

AE1

VDDQ_22

AE9

VDDQ_23

AE23

VDDQ_24

AH29

VDDQ_25

AJ2

VDDQ_26

AJ6

VDDQ_27

AJ26

VDDQ_28

M13

VDD_1

M17

VDD_2

N12

VDD_3

N15

VDD_4

N18

VDD_5

R13

VDD_6

R17

VDD_7

U12

VDD_8

U15

VDD_9

U18

VDD_10

V13

VDD_11

V17

VDD_12

A2

S5_3.3V_1

A7

S5_3.3V_2

F1

S5_3.3V_3

J5

S5_3.3V_4

J7

S5_3.3V_5

K1

S5_3.3V_6

G4

S5_1.8V_1

H1

S5_1.8V_2

H2

S5_1.8V_3

H3

S5_1.8V_4

A18

USB_PHY_1.8V_1

A19

USB_PHY_1.8V_2

B19

USB_PHY_1.8V_3

B20

USB_PHY_1.8V_4

B21

USB_PHY_1.8V_5

AA27

CPU_PWR

AE11

V5_VREF

A24

AVDDCK

A22

NC

B22

AVSSCK

V29

PCIE_VSS_42

V28

PCIE_VSS_41

V27

PCIE_VSS_40

V26

PCIE_VSS_39

V25

PCIE_VSS_38

V24

PCIE_VSS_37

V23

PCIE_VSS_36

V22

PCIE_VSS_35

U27

PCIE_VSS_34

T29

PCIE_VSS_33

T28

PCIE_VSS_32

T27

PCIE_VSS_31

T24

PCIE_VSS_30

T21

PCIE_VSS_29

P27

PCIE_VSS_28

218S4RBSA11G SB460_BGA549

SB460

Part 3 of 4

POWER

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57

PCIE_VSS_1
PCIE_VSS_2
PCIE_VSS_3
PCIE_VSS_4
PCIE_VSS_5
PCIE_VSS_6
PCIE_VSS_7
PCIE_VSS_8

PCIE_VSS_9
PCIE_VSS_10
PCIE_VSS_11
PCIE_VSS_12
PCIE_VSS_13
PCIE_VSS_14
PCIE_VSS_15
PCIE_VSS_16
PCIE_VSS_17
PCIE_VSS_18
PCIE_VSS_19
PCIE_VSS_20
PCIE_VSS_21
PCIE_VSS_22
PCIE_VSS_23
PCIE_VSS_24
PCIE_VSS_25
PCIE_VSS_26
PCIE_VSS_27

A1
A20
A21
A29
B1
B7
B25
C21
C22
C24
D6
E24
F2
F23
G1
J1
J8
L6
L8
M9
M12
M15
M18
N13
N17
P1
P6
P21
R12
R15
R18
T6
T9
U13
U17
V3
V8
V12
V15
V18
V21
W1
W9
Y29
AA11
AA14
AA18
AC6
AC24
AD9
AD23
AE3
AE27
AG6
AJ1
AJ25
AJ29

D27
D28
D29
F26
G23
G24
G25
H27
J23
J26
J28
K27
L22
L23
L24
L27
L28
M21
M24
M27
N27
N28
P22
P23
P24
P25
P26

Security Classification

Issued Date

THIS SHEET OF ENG INEE RIN G DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY O R DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/05/09 2006/03/08

Compal Secret Data

Deciphered Date

Compal Electronics. inc.

Title

SCHEMATIC, M/B LA-3121P

Size Document Number R ev

Custom

401411

Date: Sheet

星期四 五

11, 2006

2

月

21 51,

1

D

of

5

4

3

2

1

REQUIRED STRAPS

SB600 HAS 15K INTERNAL PD FOR AC_SDATA_OUT,
15K PU FOR RTC_ C L K , E XTE R N A L P U/PD IS
NOT REQUIRED; FOR SB460, EXTERNAL PU/PD ARE
REQUIRED

D D

12

R499

2.2K_0402_5%

SB_AC_SDOUT(19)

RTC_CLK(18)

CLK_PCI_13 94_R(18)

PCI_CLK6(18)

CLK_PCI_LAN_R(18)

CLK_PCI_LPC_R(18)

C C

PULL
HIGH

PULL
LOW

AC_SDOUT

USE
DEBUG
STRAPS

IGNORE
DEBUG
STRAPS

DEFAULT

12

R494
10K_0402_5%

RTC_CLK

INTERNAL
RTC

DEFAULT

EXTERNAL
RTC

12

@

R202
10K_0402_5%

PCI_1394_R PCI_CLK6

USE INT.
PLL48

USE EXT.
48MHZ

DEFAULT

12

12

CPU IF=K8

DEFAULT

CPU IF=P4

R249
10K_0402_5%

@

R245
10K_0402_5%

ROM TYPE:
H, H = PCI ROM
H, L = SPI ROM
L, H = LPC ROM
L, L = FWH ROM

12

R248
10K_0402_5%

12

R496
10K_0402_5%

12

R504
10K_0402_5%

@

SB600 SB460

PCI_LPC_RPCI_LAN_R

DEFAULT

NOTE: R751 PU RESISTOR FOR
RTC_IRQ# IS REQUIRED FOR SB600
TO KEEP THE INPUT FROM FLOATING.

+3VS+3VS+3VS+3VS+3VS +3VALW

12

R497
10K_0402_5%

@

12

R492
10K_0402_5%

PCI_LPC_RPCI_LAN_R

ROM TYPE:
H, H = PCI ROM
H, L = LPC I ROM
L, H = LPC II ROM
L, L = FWH ROM

NOTE: FOR SB460, PCICLK[8:7] ARE
CONNECTED TO SUBSTRATE
BALLS PCICLK[1:0 ]

DEFAULT

SB460 ONLY

+3VS+3VS+3VS +3VS+3VALW

12

R473
10K_0402_5%

RTC_IRQ#(18)

SB_SPDIF(18)
CLK_PCI_MINI_R(18)
CLK_PCI_PCM_R(18)
CLK_PCI_SIO_R(18)

LPC_FRAME#(18,28,36)

12

R469
10K_0402_5%

@

ACPWRON

PULL
HIGH

PULL
LOW

MANUAL
PWR ON

DEFAULT

AUTO
PWR

ON

12

R498
10K_0402_5%

@

12

R493
10K_0402_5%

SPDIF_OUT

SIO 24MHz

SIO 48MHz

DEFAULT

12

R491
10K_0402_5%

PCI_MINI_R

XTAL MODE

NOT

SUPPORTED

48MHZ OSC
MODE

DEFAULT

12

R495
10K_0402_5%

12

R503
10K_0402_5%

@

PCI_PCM_R

USB PHY
POWERDOWN
DISABLE

DEFAULT

USB PHY
POWERDOWN
ENABLE

OVERLAP COMMON PADS WHERE

12

R488
10K_0402_5%

12

R481
10K_0402_5%

@

PCI_SIO_R

PCIE_CM_SET
LOW

DEFAULT

PCIE_CM_SET
HIGH

LFRAME#

ENABLE
THERMTRIP#

DEFAULT

DISABLE
THERMTRIP#

12

R257
10K_0402_5%

12

R262
10K_0402_5%

@

POSSIBLE FOR DUAL-OP RESISTORS.

DEBUG STRAPS

SB600 HAS 15K INTERNAL PU FOR PCI_AD[28:23]

+3VS +3VS +3VS +3VS +3VS +3VS +3VS

12

R118

B B

IDE_DACK#(20,23)

PCI_AD28( 1 8 ,26,31,32,35)
PCI_AD27( 1 8 ,26,31,32,35)
PCI_AD26( 1 8 ,26,31,32,35)
PCI_AD25( 1 8 ,26,31,32,35)
PCI_AD24( 1 8 ,26,31,32,35)
PCI_AD23( 1 8 ,26,31,32,35)

10K_0402_5%

12

R119
10K_0402_5%

@

IDE_DACK#

USE

PULL

LONG

HIGH

RESET

DEFAULT

USE

A A

PULL
LOW

SHORT
RESET

12

12

PCI_AD28

USE
LONG
RESET

DEFAULT

USE
SHORT
RESET

R215
10K_0402_5%

@

R216
10K_0402_5%

@

12

12

PCI_AD27 PCI_AD26

USE PCI
PLL

DEFAULT

BYPASS
PCI PLL

R211
10K_0402_5%

R212
10K_0402_5%

@

12

12

USE ACPI
BCLK

DEFAULT

BYPASS
ACPI
BCLK

R220
10K_0402_5%

R221
10K_0402_5%

@

12

R188
10K_0402_5%

12

R189
10K_0402_5%

@

PCI_AD25

USE IDE
PLL

DEFAULT

BYPASS IDE
PLL

12

R239
10K_0402_5%

12

R241
10K_0402_5%

@

PCI_AD24

USE DEFAULT
PCIE STRAPS

DEFAULT

USE EEPROM
PCIE STRAPS

12

R196
10K_0402_5%

@

12

R195
10K_0402_5%

@

PCI_AD23

BOOTFAILTIMER
DISABLED

DEFAULT

BOOTFAILTIMER
ENABLED

2.2K IF USED FOR SB600.
10K IF USED FOR SB460.

SB600 ONLY

NOTE: FOR
SB460,
PCI_AD23 IS
RESERVED

0.1U_0402_16V4Z

R199 0_0402_5% @

SB460_GPIO14(19)
SB460_GPIO13(19)

SB600 = PCI REQ4#/GNT4#
SB460 = GPIO13 (NC3), GPIO14 (NC5)

1 2

R200 0_0402_5% @

1 2

+3VS

1

C302

R198
1K_0402_5%

@

@

2

1 2

U20

8

VCC

7

WP

6

SCL

5

SDA

AT24C04N-10SI-2.7_SO8

@

SB PCIE EEPROM STRAPS

VSS

1

A0

2

A1

3

A2

4

SB600 ONLYSB460 ONLY

5

4

Security Classification

Issued Date

THIS SHEET OF ENG INEE RIN G DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY O R DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/05/09 2006/03/08

Compal Secret Data

Deciphered Date

2

Compal Electronics. inc.

Title

SCHEMATIC, M/B LA-3121P

Size Document Number R ev

Custom

401411

Date: Sheet

星期四 五

11, 2006

月

22 51,

1

of

D

5

4

3

2

1

HDD CONN

IDE_D[0..15](20)

IDE_A[0..2](20)

D D

+5VS

IDE_DREQ(20)
IDE_IOW#(20)

12

R293

100K_0402_5%

PATA@

+5VS

1

2

IDE_LED#

1

C363

2

0.1U_0402_16V4Z

IDE_LED#(28)

C C

C360

10U_0805_10V4Z

B B

IDE_IOR#(20)
IDE_IORDY(20)
IDE_DACK#(20,22)
IDE_IRQ(20)

IDE_CS1#(20)

150U_D2_6.3VM

0.1U_0402_16V4Z

1

C366

2

IDE_RESET#
IDE_D7
IDE_D6
IDE_D5
IDE_D4
IDE_D3
IDE_D2
IDE_D1
IDE_D0

IDE_DREQ
IDE_IOW#
IDE_IOR#
IDE_IORDY
IDE_DACK#
IDE_IRQ
IDE_A1
IDE_A0
IDE_CS1#
IDE_LED#

+5VS

C371

1

C368

2

1000P_0402_50V7K

1

+

2

PATA@

SATA HDD CONN

JP29

1

SATA_STX_C_DRX_P0(20)
SATA_STX_C_DRX_N0(20)

SATA_DTX_C_SRX_N0(20)
SATA_DTX_C_SRX_P0(20)

+3VS

FBM-L11-201209-121LMT_0805

+5VS

FBM-L11-201209-121LMT_0805

A A

5

SATA_STX_C_DRX_P0
SATA_STX_C_DRX_N0

SATA_DTX_C_SRX_N0
SATA_DTX_C_SRX_P0

L16

1 2

SATA@

L17

1 2

SATA@

GND

2

HTX+

3

HTX-

4

GND

5

HRX-

6

HRX+

7

GND

8

VCC3.3

9

VCC3.3

10

VCC3.3

11

GND

12

GND

13

GND

14

VCC5

15

VCC5

16

VCC5

17

GND

18

RESERVED

19

GND

20

VCC12

21

VCC12

22

VCC12

OCTEK_SAT-22SG1G_NR

SATA@

IDE_D[0..15]

IDE_A[0..2]

JP27

2

112

4

334

6

556

8

778

10

9910

12

111112

14

131314

16

151516

18

171718

20

191920

22

212122

24

232324

26

252526

28

272728

30

292930

32

313132

34

333334

36

353536

38

373738

40

393940

42

414142

44

434344

OCTEK_HDD-22SG1G_NR

PATA@

+3VS

C351

10U_0805_10V4Z

4

IDE_D8
IDE_D9
IDE_D10
IDE_D11
IDE_D12
IDE_D13
IDE_D14
IDE_D15

IDE_CSEL

R282 475_0402_1%

IDE_PDIAG#
IDE_A2
IDE_CS3#

80mils80mi ls

1

2

150U_D2_6.3VM@

1

C349

2

0.1U_0402_16V4Z

+5VS

1

C370

+

2

Close to SATA HDD

+5VS

IDE_HRESET#
NB_RST#

+5VS

1

C153

2

CDROM_L
CD_AGND
IDE_RESET#
IDE_D7
IDE_D6
IDE_D5
IDE_D4
IDE_D3
IDE_D2
IDE_D1
IDE_D0

IDE_IOW#
IDE_IORDY
IDE_IRQ
IDE_A1
IDE_A0 IDE_A2
IDE_CS1#
IDE_LED#

SD_CSEL

12

SATA@

1 2

IDE_CS3# (20)

+5VS

0.1U_0402_16V4Z

C347

PATA@

1

2

1

C346

2

1000P_0402_50V7K

IDE_HRESET#(19)

NB_RST#(14,18,28,31,36)

10U_0805_10V4Z

INT_CD_L(39)
CD_AGND(39)

R48 470_0402_5%

If CDROM is Slave

then SD_CSEL= Floating

else SD_CS EL= Low

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

+3VS

C324

0.1U_0402_16V4Z

1 2

5

U23

1

P

IN1

4

O

2

IN2

G

SN74AHC1G08DCKR_SC70

3

R259 33_0402_5%

1 2

@

2006/05/03 modify

0.1U_0402_16V4Z

1

C150

2

1U_0402_6.3V4Z

1

C148

2

CDROM CONN

JP24

1

2

1

2

3

4

3

4

5

6

5

6

7

8

7

8

9

10

9

10

11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49

OCTEK_CDR-50JL1G

12

11

12

14

13

14

16

15

16

18

17

18

20

19

20

22

21

22

24

23

24

26

25

26

28

27

28

30

29

30

32

31

32

34

33

34

36

35

36

38

37

38

40

39

40

42

41

42

44

43

44

46

45

46

48

47

48

50

49

50

Title

Size Document Number Rev

Date: Sheet

IDE_RESET#

1

C149

2

1000P_0402_50V7K

CDROM_R
IDE_D8

IDE_D9
IDE_D10
IDE_D11
IDE_D12
IDE_D13
IDE_D14
IDE_D15
IDE_DREQ
IDE_IOR#

IDE_DACK#
IDE_PDIAG#
IDE_CS3#

1 2

R45
100K_0402_5%

@

80mils

INT_CD_R (39)

+5VS

+5VS

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3121P

401411

星期四

11, 2006

五月

1

D

of

23 51,

A

CRT Connector

1 1

CRT_R(14)

CRT_G(14)

CRT_B(14)

VGA_CRT_HSYNC(14)

2 2

VGA_CRT_VSYNC(14)

VGA_CRT_VSYNC

R354 0_0402_5%

R356 0_0402_5%

TV-OUT Conn.

3 3

150_0402_1%

1 2

1 2

B

12

12

R339

R338

150_0402_1%

1 2

C434 0.1U_0402_16V4Z

CRT_HSYNC

C

+3VS

CRT_R CRT_R_L

CRT_G

CRT_B

12

1

R340

150_0402_1%

C408

2

8P_0402_50V8K

+CRT_VCC

5

1

P

4

OE#

A2Y

G

U36

SN74AHCT1G125GW_SOT353-5

3

1 2

C433 0.1U_0402_16V4Z

D23

@

DAN217_SC59

CRT_VSYNC

1

1

C412

2

8P_0402_50V8K

+CRT_VCC

D22

@

DAN217_SC59

5

A2Y

3

1

1 2

L32

FCM2012C-800_0805

1 2

L34

FCM2012C-800_0805

1 2

L33

FCM2012C-800_0805

1

C414

C413
6P_0402_50V8C

2

8P_0402_50V8K

10P for GMCH

12

R360 10K_0402_5%

D_CRT_HSYNCVGA_CRT_HSYNC

1

P

G

D_CRT_VSYNC

4

OE#

U35
SN74AHCT1G125GW_SOT353-5

D24

@

DAN217_SC59

1

CRT_G_L

CRT_B_L

D18

DAN217_SC59@

1

2

3

1

2

C410
6P_0402_50V8C

1 2

L38 FCM1608C-121T_0603

1 2

L37 FCM1608C-121T_0603

D_DDC_DATA

D_DDC_CLK

D20

DAN217_SC59@

1

2

1

2

10P_0402_25V8K

R355

4.7K_0402_5%

3

1

2

+CRT_VCC

12

D

D19
DAN217_SC59

1

@

2

3

C409

6P_0402_50V8C

HSYNC_L

VSYNC_L

1

C424

2

4.7K_0402_5%

12

R344

BSS138_SOT23

+5VS

D17

2 1

CH411DPT_SOT23

1

C423
10P_0402_25V8K

2

R359 0_0402_5%

1 2

2

G

1 3

D

S

2

1 3

D

G

Q24
BSS138_SOT23

S

Q26

W=40mils

F1

1.1A_6VDC_FUSE

0.1U_0402_16V4Z

DDC_MD2

C406

100P_0402_50V8J

1

2

C411
68P_0402_50V8K

21

1

C407

2

D_DDC_DATA

D_DDC_CLK

1

C422
68P_0402_50V8K

2

VGA_DDC_DATA

VGA_DDC_CLK

W=40mils

11

12

13

14
10

15

+3VS

6
1

7
2

8
3

9
4

5

E

+CRT_VCC+R_CRT_VCC

JP15

SUYIN_070549FR015S208CR

16

17

(CL55)

VGA_DDC_DATA (14)

VGA_DDC_CLK (14)

2

Place closed to chipset

+3VS

C427 22P_0402_50V8J TV@

1 2

1 2

L41 FCM1608C-121T_0603 TV@

C421 22P_0402_50V8J TV@

1 2

1 2

L39 FCM1608C-121T_0603 TV@

C429 22P_0402_50V8J TV@

1 2

1 2

L40 FCM1608C-121T_0603 TV@

1

C428
220P_0402_50V7K

TV@

2

2005/12/30 Change to 220P

12

12

R346

150_0402_1% TV@

VGA_TV_LUMA_R

VGA_TV_CRMA_R

VGA_TV_COMPS_R

R352

1

2

C425
220P_0402_50V7K

TV@

1

C430

2

220P_0402_50V7K

TV@

B

VGA_TV_LUMA(14)

VGA_TV_CRMA(14)

VGA_TV_COMPS(14)

4 4

1 2

R351

0_0402_5% TV@

1 2

R350

0_0402_5% TV@

1 2

R349

0_0402_5% TV@

A

12

R348

150_0402_1% TV@

150_0402_1% TV@

3

1

C419
220P_0402_50V7K

TV@

2

2

3

1

C418
220P_0402_50V7K

TV@

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.

2

3

JP16

TV_CRMA_L
TV_COMPS_L

TV_LUMA_L

1

C417
220P_0402_50V7K

TV@

2

2005/05/09 2006/03/08

C

3
6
7
5
2
4
1
8
9

SUYIN_030107FR007SX08FU

TV@

(ECQ60)

Compal Secret Data

Deciphered Date

D

Compal Electronics. inc.

Title

SCHEMATIC, M/B LA-3121P

Size Document Number Rev

Custom

401411

星期

, 11, 2006

四五月

Date: Sheet

E

of

24 51

D

5

4

3

2

1

LCD POWER CIRCUIT

D D

+LCDVDD

12

R341

300_0603_1%

13

D

Q22

2N7002_SOT23

ENVDD(14)

C C

D21

1N4148_SOT23@

B B

ENVDD

10K_0402_5%

+3VS

1

C426

2

12

S

R345

0.1U_0402_16V4Z@

1

C416
1U_0402_6.3V4Z @

2

2

G

12

INVT_PWM

2

G

+3VALW

1 2

13

D

S

R343
1K_0402_5%

Q25
BSS138_SOT23

R347
100K_0402_5%

1 2

R342

12

100K_0402_5%

BKOFF#(28)

+3VS

W=60mils

S

G

2

1

C431

2

0.047U_0402_16V7K

BKOFF# DISPOFF#

Q23
SI2301BDS_SOT23

W=60mils

D

1 3

+LCDVDD

1

C415

4.7U_0805_10V4Z

2

D2
CH751H-40PT _SOD323

21

+LCDVDD

1

2

+3VS

12

C420

0.1U_0402_16V4Z

R1

4.7K_0402_5%

LCD/PANEL CONN.

L36

04/17 modify

FBMA-L11-201209-121LMA40T _0805

B+

+3VS

EDID_LCD_CLK(14)

EDID_LCD_DAT(14)

LVDS_TXUN0(14)
LVDS_TXUP0(14)

LVDS_TXUP1(14)
LVDS_TXUN1(14)

LVDS_TXUP2(14)
LVDS_TXUN2(14)

LVDS_TXUCKN(14)
LVDS_TXUCKP(14)

1 2

FBMA-L11-201209-121LMA40T _0805
L42

1 2

EDID_LCD_CLK
EDID_LCD_DAT

LVDS_TXUN0

LVDS_TXUP1
LVDS_TXUN1

LVDS_TXUP2
LVDS_TXUN2

LVDS_TXUCKN
LVDS_TXUCKP

(SAME AS ACES_87216-4016)

JP1

20

40

19

39

18

38

17

37

16

36

15

35

14

34

13

33

12

32

11

31

10

30

9

29

8

28

7

27

6

26

5

25

4

24

3

23

2

22

1

21

ACES_88107-4000G

DAC_BRIG
INVT_PWM
DISPOFF#

L35

FBMA-L11-201209-121LMA40T _0805

LVDS_TXLN0
LVDS_TXLP0LVDS_TXUP0

LVDS_TXLN1
LVDS_TXLP1

LVDS_TXLP2
LVDS_TXLN2

LVDS_TXLCKN
LVDS_TXLCKP

DAC_BRIG (28)
INVT_PWM (28)

1 2

LVDS_TXLN0 (14)
LVDS_TXLP0 (14)

LVDS_TXLN1 (14)
LVDS_TXLP1 (14)

LVDS_TXLP2 (14)
LVDS_TXLN2 (14)

LVDS_TXLCKN (14)
LVDS_TXLCKP (14)

+LCDVDD

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/09 2006/03/08

3

Compal Secret Data

Deciphered Date

Compal Electronics. inc.

Title

SCHEMATIC, M/B LA-3121P

Size Document Number Rev

Custom

401411

Date: Sheet

星期四

11, 2006

2

五月

25 51,

1

D

of

5

PCI_PAR(18,31,32,35)

PCI_IRDY#(18,31,32,35)

PCI_TRDY#(18,31,32,35)

PCI_STOP#(18,31,32,35)

PCI_PERR#(18,31,32,35)
PCI_SERR#(18,31,32)

PCI_REQ#3(18)
PCI_GNT#3(18)

LAN_PME#(28)

PCI_RST#(18,31,32,34,35)

10_0402_5%@

18P_0402_50V8J@

PCI_AD[0..31]

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

1 2

R135 100_0402_5%

CLK_PCI_LAN
PM_CLKRUN#

U12

104
103
102

98
97
96
95
93
90
89
87
86
85
83
82
79
59
58
57
55
53
50
49
47
43
42
40
39
37
36
34
33

92
77
60
44

46
76

61
63
67
68
69

70
75

30
29

25
31
27
28

65

4

17

128

21
38
51
66
81

91
101
119

35

52

80
100

100@

PCI_AD[0..31](18,22,31,32,35)

D D

C C

PCI_PIRQF#(18)
PCI_PIRQH#(18,31,32)

B B

A A

1 2

R502 0_0402_5%

1 2

R501 0_0402_5% @

CLK_PCI_LAN

PCI_CBE#0(18,31,32,35)
PCI_CBE#1(18,31,32,35)
PCI_CBE#2(18,31,32,35)
PCI_CBE#3(18,31,32,35)

PCI_AD17 LAN_IDSEL

PCI_FRAME#(18,31,32,35)

PCI_DEVSEL#(18,31,32,35)

CLK_PCI_LAN(18)

PM_CLKRUN#(18,31,36)

12

R155

1

C274

2

RTL8110SBL change to Ver.D

5

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE#0
C/BE#1
C/BE#2
C/BE#3

IDSEL
PAR

FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#

PERR#
SERR#

REQ#
GNT#

INTA#
PME#
RST#
CLK

CLKRUN#

GND/VSS
GND/VSS
GND/VSS

GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST

GND
GND
GND
GND

RTL8110SBL_LQFP128

4

EEDO

AUX/EEDI

EESK

EECS

LED0
LED1
LED2

NC/LED3

TXD+/MDI0+

TXD-/MDI0-

RXIN+/MDI1+

RXIN-/MDI1-

NC/MDI2+

NC/MDI2-

NC/MDI3+

NC/MDI3-

X1
X2

LWAKE

ISOLATE#

RTSET

NC/SMBCLK

NC/SMBDATA

NC/M66EN
NC/AVDDH

AVDDH

PCI I/F

NC/HSDAC+

NC/HG

NC/LG2

NC/VSS
NC/VSS

NC/GND
NC/GND
NC/GND
NC/GND
NC/GND

LAN I/F

NC/GND

CTRL25
CTRL12

VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33

AVDDL
AVDDL
AVDDL
AVDDL

VDD12
VDD12
VDD12
VDD12
VDD12

NC/VDD12
NC/VDD12
NC/VDD12
NC/VDD12
NC/VDD12

Power

NC

4

R132 3.6K_0402_5%

LAN_EEDO

108

LAN_EEDI

109

LAN_EECLK

111

LAN_EECS

106

ACTIVITY#

117

LINK_100#

115
114

LINK_1000#

113

LAN_MIDI0+

1

LAN_MIDI0-

2

LAN_MIDI1+

5

LAN_MIDI1-

6

LAN_MIDI2+

14

LAN_MIDI2-

15

LAN_MIDI3+

18

LAN_MIDI3-

19
121

122
105

23
127
72
74

88
10

120
11

123
124

9
13

22
48
62
73
112
118

8
125
26

41
56
71
84
94
107

3
7
20
16

126
32
54
78
99

24
45
64
110
116

12

20mils

LAN_X1
LAN_X2

R154 1K_0402_5%

1 2

R153 15K_0402_5%

1 2
1 2

1 2

+LAN_AVDDH

12

R151

CTRL25
CTRL12

1

C213

0.1U_0402_16V4Z

2

+LAN_AVDDL25

20mils

1

C257

0.1U_0402_16V4Z

2

2

C256

0.1U_0402_16V4ZGIGA@

1

V_12P

1

C278

R156

0.1U_0402_16V4Z

2

R160

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

4
3
2
1

1 2

R131 0_0402_5%
R129 0_0402_5%@

LAN_MIDI0+ (27)
LAN_MIDI0- (27)
LAN_MIDI1+ (27)
LAN_MIDI1- (27)

LAN_MIDI2+ (27)
LAN_MIDI2- (27)
LAN_MIDI3+ (27)
LAN_MIDI3- (27)

R149
R150

20mils

0_0402_5%GIGA@

1 2

R162

1 2

R161

1 2

0_0402_5%100@

1 2

0_0402_5%GIGA@

3

U11

DO
DI
SK
CS

AT93C46-10SI-2.7_SO8

12

5.6K_0603_1%100@

2.49K_0603_1%GIGA@

1

C270

2

1

2

1

2

0_0402_5%8110SC@

0_0402_5%8110SB@

1

2

2

0.1U_0402_16V4ZGIGA@

1

5

GND

6

NC

7

NC

8

VCC

+3VS

1

2

0.1U_0402_16V4ZGIGA@

Y1

1 2

25MHZ_20P

C255
27P_0402_50V8J

C215

0.1U_0402_16V4Z

+1.8V_LAN

+2.5V_LAN

C205

0.1U_0402_16V4Z

C219

+2.5V_LAN

+LAN_AVDDH

2005/05/09 2006/07/29

3

+3VALW

R133

1 2

C251

0.1U_0402_16V4ZGIGA@

LAN_X2LAN_X1

27P_0402_50V8J

1

C209

0.1U_0402_16V4Z

2

1

C269

0.1U_0402_16V4Z

2

1

C208

0.1U_0402_16V4Z

2

2

C267

1

0.1U_0402_16V4ZGIGA@

12

R24
0_0402_5%

@

1

C211 0.1U_0402_16V4Z

2

LAN_ACTIVITY# (27)

LAN_LINK# (27)

RSET 5.6K for 8100CL

2.49K for 8110S( B/C)

0_0805_5%GIGA@

1

C258

2

1

2

1

C266

0.1U_0402_16V4Z

2

1

2

2

C214

1

0.1U_0402_16V4ZGIGA@

Compal Secret Data

Deciphered Date

+3VALW

+3VALW

C207

0.1U_0402_16V4Z

+LAN_DVDD

40mils

C218

0.1U_0402_16V4Z

GIGA@

1U_0402_6.3V4Z

CTRL25

1

C206

0.1U_0402_16V4Z

2

1

C264

0.1U_0402_16V4Z

2

R115
R110

2

C212

1

0.1U_0402_16V4Z

2

8100CL(10/100 LAN) 8110SB/CL(10/100/1000 LAN)

PIN
RSET 5.6K 2.49K

8100CL(10/100 LAN) 8110SB/CL(10/100/1000 LAN)BOM structure

100@

Stuff No_Stuff

8110SB@ StuffNo_Stuff

No_Stuff No_Stuff
No_Stuff No_Stuff No_Stuff

+2.5V_LAN

R166
0_0805_5%

100@

31

E

Q9

2SB1197K_SOT23

C273

8110SC@

@

+3VALW

12

2

B

C

2006/02/20 Change to 10uF

+3VALW

+LAN_AVDDL

1

40mils

C265

0.1U_0402_16V4Z

2

1 2
1 2

R107
R130

R117

1 2
1 2

1 2

2

0_0805_5%8110SC@
0_0805_5%8110SB@

0_0805_5%100@

0_0805_5%8110SB@

0_0805_5%8110SC@

1

No_Stuff
No_Stuff

Stuff

+1.8V_LAN

C

C271

R148
0_0805_5%

8110SB@

31

E

Q8

+1.8V_LAN

+3VALW

+2.5V_LAN

1

+1.2V_LAN

1

2

0.1U_0402_16V4ZGIGA@

12

1

2

12

R165
0_0805_5%

8110SC@

GIGA@

2SB1197K_SOT23

40mils

C281
10U_0805_10V6M

R158

R157

R159

+1.5V_LAN
+1.2V_LAN

+2.5V_LAN
+1.2V_LAN

+1.5V_LAN

Title

Size Document Number Rev

B

Date: Sheet

CTRL12

1 2

1 2

1 2

0_0805_5%8110SC@

0_0805_5%100@

0_0805_5%8110SB@

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3121P

401411

星期一

08, 2006

五月

+3VALW

2

B

4.7U_0805_10V4ZGIGA@

12

40mils

1

2

26 51,

+1.5V_LAN

R163
0_0805_5%

8110SC@

C275

of

12

D

5

LAN RTL8110SB/C & RTL8100CL

D D

unpop when use RTL8100CL(10/100)

4

T1

C321

0.1U_0402_16V4Z

1

2

100@

LAN_MIDI1­LAN_MIDI1+

LAN_MIDI0­LAN_MIDI0+

1

C316

2

0.1U_0402_16V4Z

@

1

RD+

2

RD-

3

CT

4

NC

5

NC

6

CT
TD+7TX+

8

TD-

LF-H80P_16P

100@

RX+

16
15

RX-

14

CT

13

NC

12

NC

11

CT

10
9

TX-

3

RJ45_MDI1-

RJ45_MDI1+

MCT3

MCT4

RJ45_MDI0-

RJ45_MDI0+

2

1

1

C486

0.1U_0402_16V4ZGIGA@

2

12

12

R384

R387

12

49.9_0402_1%GIGA@

12

R390

49.9_0402_1%

49.9_0402_1%

1

C494

0.01U_0402_16V7K

2

C C

B B

R385

49.9_0402_1%GIGA@

LAN_MIDI3-(26)
LAN_MIDI3+(26)

LAN_MIDI2-(26)
LAN_MIDI2+(26)

LAN_MIDI1-(26)
LAN_MIDI1+(26)

LAN_MIDI0-(26)
LAN_MIDI0+(26)

49.9_0402_1%

1

C482

0.1U_0402_16V4ZGIGA@

2

12

12

LAN_MIDI3­LAN_MIDI3+

LAN_MIDI2­LAN_MIDI2+

LAN_MIDI1­LAN_MIDI1+

LAN_MIDI0­LAN_MIDI0+

12

12

R395

49.9_0402_1%

1

C500

0.01U_0402_16V7K

2

R378

49.9_0402_1%GIGA@

0.01U_0402_16V7KGIGA@

1

1

C170

C159

2

2

0.01U_0402_16V7K

GIGA@

R381

49.9_0402_1%GIGA@

R391

24HST1041A-3(SP050002110) for RTL8110SB/CL(GbE)

+2.5V_LAN

TST1284-LF (SP050001X10) for RTL8100CL(10/100)

24ST0023-3: Half port(TD[3:4], MX[3:4])

12

R95

0_0603_5%GIGA@

MCT3

R87
75_0402_1%

MCT4

12

R72

75_0402_1%

12

R86
75_0402_1%

12

1 2

R90 0_0402_5%GIGA@

RJ45_MDI3+
RJ45_MDI3-

RJ45_MDI2+
RJ45_MDI2-

1

C180

0.01U_0402_16V7K

2

GIGA@

R69 0_0402_5%100@

1 2

R66 0_0402_5%100@

1 2

R83 0_0402_5%100@

1 2

R77 0_0402_5%100@

1 2

1

C146

2

0.01U_0402_16V7K

GIGA@

reseved for RTL8100CL(10/100)

12

RJ45_MDI3­RJ45_MDI3+

RJ45_MDI2­RJ45_MDI2+

RJ45_MDI1­RJ45_MDI1+

RJ45_MDI0­RJ45_MDI0+

R61
75_0402_1%

RJ45_GND

LAN_ACTIVITY#(26)

+3VALW

LAN_LINK#(26)

+3VALW

LAN_ACTIVITY#

R52 300_0603_5%

LAN_LINK#

R101 300_0603_5%

RJ45_GND LANGND

12

RJ45_MDI3­RJ45_MDI3+
RJ45_MDI1­RJ45_MDI2­RJ45_MDI2+
RJ45_MDI1+
RJ45_MDI0­RJ45_MDI0+

12

JP22

12

Amber LED-

11

Amber LED+

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

10

Green LED-

9

Green LED+

SUYIN_100073FR012S100ZL

HBL-50

1 2

C190
1000P_1206_2KV7K

SHLD4
SHLD3

SHLD2
SHLD1

1

C199

2

0.1U_0402_16V4Z

16
15

14
13

1

C200

4.7U_0805_10V4Z

2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/09 2006/07/29

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3121P

401411

星期一

08, 2006

五月

1

D

27 51,

of

5

KBA[0..19]

ADB[0..7]

L15

1 2

FBM-L11-160808-800LMT_0603

D D

C C

+5VS

+3VALW

+3VALW

B B

+3VS

+5VALW

+5VS

+3VALW

A A

MINI_PME#(31)

LAN_PME#(26)

RCIRRX(38)

RP29

1 8
2 7
3 6
4 5

4.7K_1206_8P4R_5%

RP35

1 8
2 7
3 6
4 5

10K_1206_8P4R_5%

RP37

1 8
2 7
3 6
4 5

100K_1206_8P4R_5%

1 2

R510 10K_0402_5%

RP36

1 8
2 7
3 6
4 5

4.7K_1206_8P4R_5%

ECAGND

22P_0402_50V8J@

R516 0_0402_5%
R515 0_0402_5%

10K_0402_5%

CH751H-40PT _SOD323

KB_CLK
KB_DATA
PS_CLK
PS_DATA

FRD#
SELIO#
FSEL#

IE_BTN#
EMPWR_BTN#
E-MAIL_BTN#
USER_BTN#

5IN1_LED#

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

12

R2084.7K_0402_5%

TP_DATA

12

R2074.7K_0402_5%

12

R2061K_0402_5%

12

R2051K_0402_5%

12

R2041K_0402_5%

5

KBA[0..19] (30)
ADB[0..7] (30)

20mil

C591

12

CLK_PCI_LPC(18)

12
12

R258

D9

21

TP_CLK

KBA1
KBA4
KBA5

R518 33_0402_5%@

+3VALW

R514
10K_0402_5%

1 2

EC_PME#

+3VALW

1 2

EC_RCIRRX

+3VALW

0.1U_0402_16V4Z

12

+3VALW

1 2

R511 100K_0402_5%

1 2

R522 100K_0402_5%

+3VALW

SB_INT_FLASH_SEL#(19,30)

C589 0.1U_0402_16V4Z

12

12

R517 47K_0402_5%

1 2

R519 100K_0402_5%

1 2

R520 1K_0402_5%

1 2

R521 1K_0402_5%

1

C323

2

PWRBTN_OUT#(19) EC_THERM# (8,19)

ENBKL
DPLL_TP
TEST_TP

4

+3VALW

*

*

SMBus

GPIO

*

*

*

*

MISC

L14

1 2

123

VCC16VCC34VCC45VCC

X-BUS Interface

0.1U_0402_16V4Z

1

2

LPC_FRAME#(18,22,36)

BTSW_EN#
WLSW_EN#

R209 100K_0402_5%

TP_DATA(29)

EC_SMB_CK1(30,45)
EC_SMB_DA1(30,45)
EC_SMB_CK2(8)
EC_SMB_DA2(8)

EMPWR_BTN#(38)

E-MAIL_BTN#(38)

IE_BTN#(38)

IDE_LED#(23)

USER_BTN#(38)

EC_SWI#(19)

VGATE(48)

5IN1_LED#(32)

BTSW_EN#(38)

CAPS_LED#(38)
NUM_LED#(38) EAPD (39)

SATA_LED#(20)

EC_GA20(19)

EC_KBRST#(19)

0.1U_0402_16V4Z

C585

1

C310

2

0.1U_0402_16V4Z

LPC_AD0(18,36)
LPC_AD1(18,36)
LPC_AD2(18,36)

LPC_AD3(18,36)
NB_RST#(14,18,23,31,36)
SERIRQ(18,32,36)

FRD#(30)

FWR#(30)

FSEL#(30)

12

TP_CLK(29)

EC_SCI#(19)

ENBKL(14)
BKOFF#(25)

FSTCHG(44)

EC_SMI#(19)

R594 0_0402_5%@

LID_SW#(29)

BT_ON#(38)
SYSON(34,41)

SUSP#(30,34,41)
VR_ON(48)

1

C586

2

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

FRD#
FWR#

FSEL#
SELIO#
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

KB_CLK
KB_DATA
PS_CLK
PS_DATA
TP_CLK

TP_DATA

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

EMPWR_BTN#

EC_SCI#
E-MAIL_BTN#
IE_BTN#
ENBKL
BKOFF#
FSTCHG
EC_SMI#
IDE_LED#
USER_BTN#

VGATE

12

LID_SW#
BT_ON#

SYSON
SUSP#

VR_ON
BTSW_EN#

PBTN_OUT#

CAPS_LED#

NUM_LED#
SATA_LED#

2

C584

1000P_0402_50V7K

1

U27

15

LAD0

14

LAD1

13

LAD2

10

LAD3

9

LFRAME#

165

LRST#/GPIO2C

18

LCLK

7

SERIRQ

25

CLKRUN#/GPIO0C

24

LPCPD#/GPIO0B

150

RD#

151

WR#

173

MEMCS#

152

IOCS#

138

D0

139

D1

140

D2

141

D3

144

D4

145

D5

146

D6

147

D7

124

A0

125

A1/XIOP_TP

126

A2

127

A3

128

A4/DMRP_TP

131

A5/EMWB_TP

132

A6

133

A7

143

A8

142

A9

135

A10

134

A11

130

A12

129

A13

121

A14

120

A15

113

A16

112

A17

104

A18

103

A19

108

A20/GPIO23

105

E51CS#/GPIO20/ISPEN

110

PSCLK1

111

PSDAT1

114

PSCLK2

115

PSDAT2

116

PSCLK3

117

PSDAT3

163

SCL1

164

SDA1

169

SCL2

170

SDA2

8

GPIO04

20

GPIO07

21

GPIO08

22

GPIO09

27

GPIO0D

28

GPIO0E

48

GPIO10

62

GPIO13

63

GPIO14

69

GPIO15

70

GPIO16

75

GPIO17

109

GPIO24

118

GPIO25

119

GPIO26

148

GPIO27

149

GPIO28

155

GPIO29

156

GPIO2A

162

GPIO2B

168

GPIO2D

55

FnLock#/GPIO12

54

CapLock#/GPIO011

23

NumLock#/GPIO0A

41

ScrollLock#/GPIO0F

19

ECRST#

5

GA20/GPIO02

6

KBRST#/GPIO03

31

ECSCI#

FBM-L11-160808-800LMT_0603

2

C590
1000P_0402_50V7K

1

LPC Interface

PS2 Interface

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+EC_VCCA

20mil

1

2

ECAGND

136

157

166

95

96

161

VCC

VCC

VCC

VCCA

AGND

Pulse Width

Wake Up Pin

ENE-KB910-B4

Analog To Digital

Digital To Analog

Expanded I/O

FAN

TEST_TP/GPIO05/FAN3PWM

Timer Pin

GND17GND35GND46GND

GND

GND

122

137

167

20mil

C305

0.1U_0402_16V4Z

159

GPOK0/KSO0
GPOK1/KSO1

VCCBAT

BATGND

GPOK2/KSO2
GPOK3/KSO3
GPOK4/KSO4
GPOK5/KSO5
GPOK6/KSO6
GPOK7/KSO7
GPOK8/KSO8

GPOK9/KSO9
GPOK10/KSO10
GPOK11/KSO11
GPOK12/KSO12
GPOK13/KSO13
GPOK14/KSO14
GPOK15/KSO15
GPOK16/KSO16
GPOK17/KSO17

GPIK0/KSI0
GPIK1/KSI1
GPIK2/KSI2
GPIK3/KSI3
GPIK4/KSI4

Internal Keyboard

GPIK5/KSI5
GPIK6/KSI6
GPIK7/KSI7

GPOW0/PWM0
GPOW1/PWM1

FAN2PWM/GPOW2/PWM2

GPOW3/PWM3
GPOW4/PWM4
GPOW5/PWM5
GPOW6/PWM6

FAN1PWM/GPOW7/PWM7

TIN1/GPWU6

TIN2/FANFB2/GPWU7

GPIAD0/AD0
GPIAD1/AD1
GPIAD2/AD2
GPIAD3/AD3
GPIAD4/AD4
GPIAD5/AD5
GPIAD6/AD6
GPIAD7/AD7

GPODA0/DA0

GPODA1/DA1

GPODA2/DA2

GPODA3/DA3

GPODA4/DA4

GPODA5/DA5

GPODA6/DA6

GPODA7/DA7

GPIO18/XIO8CS#

*

GPIO19/XIO9CS#

*

GPIO1A/XIOACS#

*

*

GPIO1B/XIOBCS#
GPIO1C/XIOCCS#

*

GPIO1D/XIODCS#

*

GPIO1E/XIOECS#

*

GPIO1F/XIOFCS#

*

GPIO2E/TOUT1/FANFB1

DPLL_TP/GPIO06/FANFB3

TOUT2/GPIO2F
E51IT0/GPIO00

E51IT1/GPIO01
E51RXD/GPIO21/ISPCLK
E51TXD/GPIO22/ISPDAT

KB910Q B4_LQFP176

KB910 C1 VERSION

0.1U_0402_16V4Z

GPWU0
GPWU1
GPWU2
GPWU3
GPWU4
GPWU5

XCLKI

XCLKO

2005/05/09 2006/06/20

3

+3VALW

1

1

C341

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
153
154

71
72
73
74
77
78
79
80

32
33
36
37
38
39
40
43

2
26
29
30
44
76
172
176

81
82
83
84
87
88
89
90

99
100
101
102
1
42
47
174

85
86
91
92
93
94
97
98

171
12
11

175
3

4
106
107

158
160

C337
1U_0603_10V4Z

2

2

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

INVT_PWM
BEEP#

ACOFF
EC_ON

EC_LID_OUT#
EC_MUTE

ON/OFF

PM_SLP_S3#
PM_SLP_S5#
EC_RCIRRX
EC_PME#
S3_STATE

BATT_TEMP
SKU_ID
BATT_OVP

TV_THERM#
AD_BID0

DAC_BRIG
IREF

EN_DFAN1

PWR_LED#
PWR_SUSP_LED#
BATT_FULL_LED#
BATT_CHGI_LED#
WL_ON_LED#
BT_ON_LED#
E-MAIL_LED#
MEDIA_LED#

FAN_SPEED1
DPLL_TP
TEST_TP

EC_THERM#

WLSW_EN#
E51_RXD
E51_TXD

CRY2
CRY1

Compal Secret Data

Deciphered Date

1 2

R191 0_0402_5%

2

KSI[0..7]
KSO[0..15]

KSO16 (29)
KSO17 (29)

INVT_PWM (25)
BEEP# (39)

ACOFF (42,44)
USB_EN# (34,38)
EC_ON (37)
EC_LID_OUT# (19)
EC_MUTE (40)

ON/OFF (37)

ACIN (19,45)

PM_SLP_S3# (19)
PM_SLP_S5# (19)

S3_STATE (19)

BATT_OVP (44)

TV_THERM# (31)
POUT (48)

DAC_BRIG (25)

IREF (44)

EN_DFAN1 (6)

WL_OFF# (31)
MINI1_OFF# (31)

PWR_LED (38)
PWR_SUSP_LED# (38)
BATT_FULL_LED# (38)
BATT_CHGI_LED# (38)
WL_ON_LED# (38)
BT_ON_LED# (38)
E-MAIL_LED# (38)
MEDIA_LED# (38)

FAN_SPEED1 (6)

EC_RSMRST# (19)

WLSW_EN# (38)

2

KSI[0..7] (29)
KSO[0..15] (29)

Analog Board ID definition,
Please see page 3.

+3VALW +3VALW

R210
100K_0402_5%@

Ra

1 2

AD_BID0

R201

Rb

0_0402_5%

1 2

R611

0_0402_5%

R573

0_0402_5%

0
1
2
3

ECAGND

12

C328 0.01U_0402_16V7K

R612

0_0402_5%@

EAPD

1

For EC Tools

+3VALW

JP8

1

1

E51_RXD

2

2

E51_TXD

3

3

4

4

ACES_85205-0400@

SKU ID definition,
Please see page 3.

R246
100K_0402_5%@

Rc

1 2

SKU_ID

1

C304

2

0.1U_0402_16V4Z

Rd

1 2

2006/04/26 modify, for reserve

VLDT_EN_P

12

VLDT_EN

12

Board ID

UMA
DISCRETE

TV_THERM#

VLDT_EN_P

12

2006/04/26 modify, for reserve

C344

10P_0402_25V8K

32.768KHZ_12.5P_1TJS125DJ2A073

EAPD

Title

Size Docum ent Number Rev

B

Date: Sheet

VLDT_EN_P (47)

VLDT_EN (37)

SKU ID

W / O SATA
WITH SATA

BATT_TEMP (45)

R222

100K_0402_5%

12

VLDT_EN_P (47)

CRY1 CRY2

IN

4

OUT

NC3NC

12

1

10P_0402_25V8K

2

+3VS

1

2

1

X1

2

R213

100K_0402_5%

@

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3121P

401411

星期一 五月

R227
0_0402_5%

+3VS

C343

1

1

C320

0.1U_0402_16V4Z

2

D

of

28 51, 08, 2006

Lid Switch

SW1

3

4

MPU-101-81_4P

1

2

INT_KBD Conn.

KSO15

C243 100P_0402_50V8J

KSO14
KSO13
KSO12

KSI0
KSO11
KSO10
KSI1

KSI2
KSO9
KSI3
KSO8

1 2

C242 100P_0402_50V8J

1 2

C241 100P_0402_50V8J

1 2

C240 100P_0402_50V8J

1 2

C239 100P_0402_50V8J

1 2

C238 100P_0402_50V8J

1 2

C237 100P_0402_50V8J

1 2

C236 100P_0402_50V8J

1 2

C235 100P_0402_50V8J

1 2

C234 100P_0402_50V8J

1 2

C233 100P_0402_50V8J

1 2

C232 100P_0402_50V8J

1 2

2

3

1

KSI2
KSI3
KSI4
KSI5

+3VALW

12

R337
100K_0402_5%

LID_SW# (28)

D16

@

PSOT24C_SOT23

KSO16

PLAY
STOP
NEXT
REV

KSO7

C231 100P_0402_50V8J

KSO6
KSO5
KSO4

KSO3
KSI4
KSO2
KSO1

KSO0
KSI5
KSI6
KSI7

1 2

C230 100P_0402_50V8J

1 2

C229 100P_0402_50V8J

1 2

C228 100P_0402_50V8J

1 2

C227 100P_0402_50V8J

1 2

C226 100P_0402_50V8J

1 2

C225 100P_0402_50V8J

1 2

C224 100P_0402_50V8J

1 2

C223 100P_0402_50V8J

1 2

C222 100P_0402_50V8J

1 2

C221 100P_0402_50V8J

1 2

C220 100P_0402_50V8J

1 2

KSO17

VOL_UP
VOL_DOWN
ARCADE_TV

Scroll Up

SW2

SCRL_U

SW5
EVQPLHA15_4P

JP5

1
2
3

KSO17(28)

KSO16(28)

KSO17
KSI2
KSI5
KSO16
KSI3
KSI4

4
5
6
7
8
9
10

ACES_85201-10051

MEDIA@

3
4

1
2

5

6

SCRL_D

Left Right

SW3

BTN_L

EVQPLHA15_4P

3
4

5

1
2

6

EVQPLHA15_4P

3
4

1
2

5

6

Scroll Down

SW7
EVQPLHA15_4P

3
4

1
2

5

6

SCRL_RSCRL_L

BTN_R

Scroll RightScroll Left

SW6
EVQPLHA15_4P

3
4

SW4
EVQPLHA15_4P

3
4

SCRL_R
BTN_R

2

3

D14

@

1
2

5

6

1
2

5

6

1

2

1

2

1

PSOT24C_SOT23

SCRL_L
SCRL_U

3

D13

@

PSOT24C_SOT23

SCRL_D
BTN_L

3

D15

@

PSOT24C_SOT23

To TP/B Conn.

BTN_R
SCRL_R
SCRL_U
SCRL_L
SCRL_D
BTN_L
TP_DATA
TP_CLK

C139 100P_0402_50V8J

1 2

C157 100P_0402_50V8J

1 2

C162 100P_0402_50V8J

1 2

C151 100P_0402_50V8J

1 2

C167 100P_0402_50V8J

1 2

C144 100P_0402_50V8J

1 2

C169 100P_0402_50V8J

1 2

C174 100P_0402_50V8J

1 2

(Right)

(Left)

KSO15
KSO14
KSO13
KSO12
KSI0
KSO11
KSO10
KSI1
KSI2
KSO9
KSI3
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSI4
KSO2
KSO1
KSO0
KSI5
KSI6
KSI7

JP7

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

ACES_85201-24051

+5VS

C137

0.1U_0402_16V4Z

D26

@

PSOT24C_SOT23

JP6

1
2
3
4
5
6
7
8
9
10
11
12

ACES_87151-1207

+5VS

TP_DATA(28)
TP_CLK(28)

TP_DATA
TP_CLK

BTN_R
SCRL_R
SCRL_U
SCRL_L
SCRL_D
BTN_L

2

1

3

TP_DATA
TP_CLK

KSI[0..7]
KSO[0..15]

KSI[0..7] (28)
KSO[0..15] (28)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/09 2006/03/08

Compal Secret Data

Deciphered Date

Compal Electronics. inc.

Title

SCHEMATIC, M/B LA-3121P

Size Document Number Rev

Custom

401411

Date: Sheet

星期四

11, 2006

五月

of

29 51,

D

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
KBA0
ADB0
ADB1
ADB2

KBA[0..19](28)
ADB[0..7](28)

U21

1

A18

2

A16

3

A15

4

A12

5

A7

6

A6

7

A5

8

A4

9

A3

10

A2

11

A1

12

A0

13

DQ0

14

DQ1

15

DQ2

16

VSS

SST39VF040-70-4C-NH_PLCC32

@

(CL55)

KBA[0..19]
ADB[0..7]

VDD
WE#

A17
A14
A13

A8
A9

A11

OE#

A10

CE#
DQ7
DQ6
DQ5
DQ4
DQ3

+3VALW

SB_INT_FLASH_SEL# (19,28)

1

14

U24A

INT_FLASH_SEL

+3VALW

2

C301

0.1U_0402_16V4Z

32

FWE#

31

KBA17

30

KBA14

29

KBA13

28

KBA8

27

KBA9

26

KBA11

25

FRD#

24

KBA10

23

FSEL#

22

ADB7

21

ADB6

20

ADB5

19

ADB4

18

ADB3

17

1

FRD# (28)
FSEL# (28)

0.1U_0402_16V4Z

FWE#

C313

1 2

+3VALW

4

O

5

U19

2

P

I0

1

I1

G

TC7SH32FU_SSOP5

3

+3VALW

12

R219
100K_0402_5%

2

G

1 3

D

Q13
2N7002_SOT23

FWR# (28)

S

SUSP# (28,34,41)

EC_FLASH# (19)

74LVC125APW_TSSOP14

1 2

R265 22_0402_5%

3

R264
10K_0402_5%

@

R593 0_0402_5%

P

2

OE#

I

O

G

7

@

+3VALW

INT_FLASH_EN#

1 2

4

U24B

@

6

OE#

I

O

74LVC125APW_TSSOP14

@

1 2

5

SUS_STAT# (19)

0.1U_0402_16V4Z
C333

1 2

1 2

R266
100K_0402_5%

@

@

FSEL#INT_FSEL#

1MB Flash ROM

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

INT_FSEL#
FRD#
FWE#

U17

21

A0

20

A1

19

A2

18

A3

17

A4

16

A5

15

A6

14

A7

8

A8

7

A9

36

A10

6

A11

5

A12

4

A13

3

A14

2

A15

1

A16

40

A17

13

A18

37

A19

22

CE#

24

OE#

9

WE#

SST39VF080-70_TSOP40

SST part : SA390800000
MXIC part : SA290080120

VCC0
VCC1

RP#

READY/BUSY#

NC0
NC1

GND0
GND1

+3VALW

31
30

ADB0

25

D0
D1
D2
D3
D4
D5
D6
D7

NC

ADB1

26

ADB2

27

ADB3

28

ADB4

32

ADB5

33

ADB6

34

ADB7

35

RESET#

10
11
12
29
38

23
39

1 2

R225
100K_0402_5%

1

C318

0.1U_0402_16V4Z

2

+3VALW

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1MB ROM Socket

KBA16 KBA17
KBA15
KBA14

KBA12
KBA11
KBA9
KBA8
FWE#
RESET#
INT_FLASH_EN#
INT_FLASH_SEL
KBA18
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1

JP10

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40

SUYIN_80065AR-040G2T@

2005/05/09 2006/03/08

KBA19KBA13
KBA10
ADB7
ADB6
ADB5
ADB4

ADB3
ADB2
ADB1
ADB0
FRD#

FSEL#
KBA0

Compal Secret Data

+3VALW

Deciphered Date

+5VALW

C348 0.1U_0402_16V4Z

1 2

U31

8

VCC

7

WP

EC_SMB_CK1(28,45)
EC_SMB_DA1(28,45)

6

SCL

5

SDA

GND

AT24C16AN-10SI-2.7_SO8

Compal Electronics. inc.

Title

SCHEMATIC, M/B LA-3121P

Size Document Number Rev

Custom

401411

Date: Sheet

星期四

11, 2006

五月

+5VALW

12

R284
100K_0402_5%

1

A0

2

A1

3

A2

4

12

R277
100K_0402_5%

D

of

30 51,

A

B

C

D

E

+3VALW

1

1

C581

C577

0.1U_0402_16V4Z

2

2

0.1U_0402_16V4Z

1

C442

4.7U_0805_10V4Z

2

PCI_PIRQG# (18)

SB_PCIE_WAKE#(19,34)

PCIE_MRX_PTX_N0(13)
PCIE_MRX_PTX_P0(13)

PCIE_MTX_C_PRX_N0(13)

PCIE_MTX_C_PRX_P0(13)

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/05/09 2006/06/20

Compal Secret Data

MINI_CLKREQ#(17)

CLK_PCIE_MINI#(17)

CLK_PCIE_MINI(17)

1

C441

0.1U_0402_16V4Z

2

PCIE_MRX_PTX_N0
PCIE_MRX_PTX_P0

Deciphered Date

SB_PCIE_WAKE#
WLAN_BT_DATA
WLAN_BT_CLK

D

1

C439

4.7U_0805_10V4Z

2

+3VS

ACES_88266-05001

1

C438

0.1U_0402_16V4Z

2

JP17

1

1

3

3

5

5

7

7

9

9
111112
131314
151516

171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152

G153G254G355G3

56

MINI@

W=30mils

R605

+CAM_VDD

1 2

0_0805_5%

JP35

1

1

2

2

3

3

4

4

5

5

6

GND1

7

GND2

2006/02/20 Added

Title

Size Docum ent Number Rev

B

Date: Sheet

1

C440

0.1U_0402_16V4Z

2

2

2

4

4

6

6

8

8

10

10

12
14
16

18
20
22
24
26
28
30
32
34
36
38
40
42

(MINI1_LED#)

44
46
48
50
52

FOX_AS0B226-S99N-7F

1

C657

0.1U_0402_16V4Z

2

USB20_N3 (19)
USB20_P3 (19)

Compal Electronics, Inc.

401411

星期一 五月

+3VALW+3VS +1.5VS

1

C437

0.1U_0402_16V4Z

2

+3VS
+1.5VS

MINI1_OFF#
NB_RST#

ICH_SMBCLK
ICH_SMBDATA

MINI1_OFF# (28)
NB_RST# (14,18,23,28,36)

+3VALW

SB_CK_SCLK (10,11,17,19,34)
SB_CK_SDAT (10,11,17,19,34)

SCHEMATIC, M/B LA-3121P

of

31 51, 08, 2006

E

D

1

C573

2

PCI_GNT#1

WLAN_BT_CLK
PCI_AD30

PCI_AD28
PCI_AD26
PCI_AD24
MINI_IDSEL1

PCI_AD22
PCI_AD20

PCI_AD18
PCI_AD16

PCI_FRAME#
PCI_TRDY#
PCI_STOP#

PCI_DEVSEL#
PCI_AD15

PCI_AD13
PCI_AD11

PCI_AD9
PCI_CBE#0

PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

AUDIO_INR

+3VS

1

C574

4.7U_0805_10V4Z

2

W=40mils

W=40mils
W=40mils

1 2

W=40mils

1

C576
1000P_0402_50V7K

2

+5VS

+3VALW

PCI_RST# (18,26,32,34,35)

+3VS
PCI_GNT#1 (18)

MINI_PME# (28)

WLAN_BT_CLK (38)

PCI_AD18

R509

100_0402_5%

PCI_PAR (18,26,32,35)

PCI_FRAME# (18,26,32,35)
PCI_TRDY# (18,26,32,35)
PCI_STOP# (18,26,32,35)

PCI_DEVSEL# (18,26,32,35)PCI_PERR#(18,26,32,35)

PCI_CBE#0 (18,26,32,35)

TV_THERM# (28)

AUDIO_INR (38)

+3VALW

0.1U_0402_16V4Z

1

C572

1 1

2 2

3 3

1000P_0402_50V7K

PCI_PIRQH#(18,26,32)

2

CLK_PCI_MINI(18)

WLAN_BT_DATA(38)

PCI_CBE#3(18,26,32,35)

PCI_IRDY#(18,26,32,35)

PM_CLKRUN#(18,26,36)

+5VS

1

2

WL_OFF#(28)

PCI_REQ#1(18)

PCI_CBE#2(18,26,32,35)

PCI_SERR#(18,26,32)

PCI_CBE#1(18,26,32,35)

CVBS_IN(38)

AUDIO_INL(38)

1

C578

C569

10U_0805_10V4Z

2

+3VS

S_YIN(38) S_CIN (38)

+5VS

+5VS

1000P_0402_50V7K

WL_OFF#

CH751H-40PT _SOD323

W=40mils

S_YIN S_CIN
CLK_PCI_MINI
PCI_REQ#1
PCI_AD31

PCI_AD29
PCI_AD27

PCI_AD25
WLAN_BT_DATA

PCI_AD23
PCI_AD21

PCI_AD19
PCI_AD17

PCI_CBE#2
PCI_IRDY#

PCI_SERR#
PCI_PERR#

PCI_CBE#1
PCI_AD14

PCI_AD12
PCI_AD10

PCI_AD8
PCI_AD7

PCI_AD5
CVBS_IN
PCI_AD3

W=40mils

PCI_AD1

AUDIO_INL

W=30mils W=20mils

1

2

D8

1000P_0402_50V7K

C579

21

1

C580

2

PCI_AD[0..31]

JP28

112

KEY KEY

334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
535354
555556
575758
595960
616162
636364
656566
676768
696970
717172
737374
757576
777778
797980
818182
838384
858586
878788
898990
919192
939394
959596
979798
9999100

101

101

103

103

105

105

107

107

109

109

111

111

113

113

115

115

117

117

119

119

121

121

123

123

P-TWO_A53921-A0G16-P

0.1U_0402_16V4Z

102
104
106
108
110
112
114
116
118
120
122
124

0.1U_0402_16V4Z

1

C575

2

PCI_AD[0.. 31 ] (18,22,26,32,35)

RINGTIP

2
4

6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

(Change to SP070003200)

CLK_PCI_MINI

12

R254

4 4

10_0402_5%@

1

C329
10P_0402_25V8K@

2

A

Power

+3VS
+3VALW
+1.5VS

Mini Card Power Rating
Primary Power (mA)
Peak Normal
1000
330
500

750
250
375

Auxiliary Power (mA)

Normal

250 (wake enable)
5 (Not wake enable)

B

A

+3VS

40mil

0.1U_0402_16V4Z

1

1

C597

C604

0.1U_0402_16V4Z

1 2

R523 43K_0402_5%61@

SM_CD#

1 1

+3VS

2 2

3 3

2

2

0.1U_0402_16V4Z

1

1

C603

C599

2

2

0.1U_0402_16V4Z

MFUNC5[3:0] = (0 1 0 1)
MFUNC5[4] = 1

0.1U_0402_16V4Z

PCI_CBE#[0..3](18,26,31,35)

MS_PWREN#(33)

5IN1_LED#(28)

SDCK_XDWE#(33)

PCI_AD[0..31](18,22,26,31,35)

+3VS

1

C594

2

B

0.1U_0402_16V4Z

1

C592

2

CLK_PCI_PCM

12

R283

10_0402_5%@

1

C352

15P_0402_50V8J@

2

1 2

R524 10K_0402_5%

0_0402_5%

@

5IN1_LED#

1

C593

2

0.1U_0402_16V4Z

PCI_AD[0..31]
PCI_CBE#[0..3]

CLK_SD_48M

12

R525

10_0402_5%@

1

C596

15P_0402_50V8J@

2

R272

1 2

R595 0_0402_5%

1 2

R528 33_0402_5%61@

1 2

SDCM_XDALE(33)

SDDA0_XDD7(33)
SDDA1_XDD0(33)
SDDA2_XDCL(33)
SDDA3_XDD4(33)

PCI_RST#(18,26,31,34,35)

PCI_FRAME#(18,26,31,35)

PCI_IRDY#(18,26,31,35)

PCI_TRDY#(18,26,31,35)

PCI_DEVSEL#(18,26,31,35)

PCI_STOP#(18,26,31,35)
PCI_PERR#(18,26,31,35)
PCI_SERR#(18,26,31)

PCI_REQ#2(18)
PCI_GNT#2(18)

CLK_PCI_PCM(18)

PCI_AD20

PCI_PIRQE#(18,35)
PCI_PIRQH#(18,26,31)

SDOC#(33)

SD_PWREN#(33)

CLK_SD_48M(17)

C

+S1_VCC

VPPD0(33)
VPPD1(33)
VCCD0#(33)
VCCD1#(33)

PCI_PAR(18,26,31,35)

1 2

R527 100_0402_5%

SERIRQ(18,28,36)

+VCC_SD

SD_CD#(33)
SD_WP#(33)

VPPD0
VPPD1
VCCD0#
VCCD1#

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10

PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0

PCI_RST#

PCI_REQ#2
CLK_PCI_PCM

SD_PULLHIGH

SM_CD#

SDOC#

PCI_RST#

SD_CD#
SD_WP#
SD_PWREN#

CLK_SD_48M
SD_CLK

SDCM_XDALE

SDDA0_XDD7
SDDA1_XDD0
SDDA2_XDCL
SDDA3_XDD4

U30

C2

AD31

C1

AD30

D4

AD29

D2

AD28

D1

AD27

E4

AD26

E3

AD25

E2

AD24

F2

AD23

F1

AD22

G2

AD21

G3

AD20

H3

AD19

H4

AD18

J1

AD17

J2

AD16

N2

AD15

M3

AD14

N3

AD13

K4

AD12

M4

AD11

K5

AD10

L5

AD9

M5

AD8

K6

AD7

M6

AD6

N6

AD5

M7

AD4

N7

AD3

L7

AD2

K7

AD1

N8

AD0

E1

CBE3#

J3

CBE2#

N1

CBE1#

N5

CBE0#

G4

PCIRST#

J4

FRAME#

K1

IRDY#

K3

TRDY#

L1

DEVSEL#

L2

STOP#

L3

PERR#

M1

SERR#

M2

PAR

A1

PCIREQ#

B1

PCIGNT#

H1

PCICLK

L8

RIOUT#_PME#

L11

SUSPEND#

F4

IDSEL

K8

MFUNC0

N9

MFUNC1

K9

MFUNC2

N10

MFUNC3

L10

MFUNC4

N11

MFUNC5

M11

MFUNC6

J9

MFUNC7

M10

GRST#

E7

VCC_SD

E8

SDCD#

F8

SDWP/SMWPD#

G7

SDPWREN33#

H5

SDCLKI

F6

SDCLK/SMWE#

E5

SDCMD/SMALE

E6

SDDAT0/SMDATA7

F7

SDDAT1/SMDATA0

F5

SDDAT2/SMCLE

G6

SDDAT3/SMDATA4

G5

GND_SD

N13

M13

VCCD1#

M12

VCCD0#

VPPD1

+3VS

N12

VPPD0

A7

VCCA2

G13

VCCA1

B4

VCC10

C8

D12

VCC9

VCC8

PCI Interface

CSTSCHG/BVD1_STSCHG#

SD/MMC/MS/SM

GND1D3GND2H2GND3L4GND4M8GND5

GND6

GND7

F12

K11

C10

G1

K2

N4

F3

L6

L9

H11

VCC2

VCC3

VCC4

VCC1

VCC5

VCC6

VCC7

CAD31/D10

CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6

CAD19/A25

CAD18/A7
CAD17/A24
CAD16/A17

CAD15/IOWR#

CAD14/A9

CAD13/IORD#

CAD12/A11

CAD11/OE#

CAD10/CE2#

CAD9/A10

CAD8/D15

CAD7/D7

CAD6/D13

CAD5/D6

CAD4/D12

CAD3/D5

CAD2/D11

CAD1/D4
CAD0/D3

CCBE3#/REG#

CCBE2#/A12

CCBE1#/A8

CCBE0#/CE1#

CARDBUS

CRST#/RESET
CFRAME#/A23

CIRDY#/A15

CTRDY#/A22

CDEVSEL#/A21

CSTOP#/A20
CPERR#/A14

CSERR#/WAIT#

CPAR/A13

CREQ#/INPACK#

CGNT#/WE#

CCLK/A16

CCLKRUN#/WP_IOIS16#

CBLOCK#/A19

CINT#/READY_IREQ#

SPKROUT

CAUDIO/BVD2_SPKR#

CCD2#/CD2#
CCD1#/CD1#

CVS2/VS2#

CVS1/VS1

CRSV3/D2
CRSV2/A18
CRSV1/D14

MSPWREN#/SMPWREN#

GND8

B6

MSINS#

MSBS/SMDATA1

MSCLK/SMRE#
MSDATA0/SMDATA2
MSDATA1/SMDATA6
MSDATA2/SMDATA5
MSDATA3/SMDATA3

SMBSY#

SMCD#

SMWP#

SMCE#

CB714_LFBGA169

B2
C3
B3
A3
C4
A6
D7
C7
A8
D8
A9
C9
A10
B10
D10
E12
F10
E13
F13
F11
G10
G11
G12
H12
H10
J11
J12
K13
J10
K10
K12
L13

B7
A11
E11
H13

B9
B11
A12
A13
B13
C12
C13
A5
D13
B8
C11
B12

C5
D5

D11
D6
M9

B5
A4

L12
D9
C6
A2
E10
J13

H7
J8
H8
E9
G9
H9
G8
F9

H6
J7
J6
J5

D

S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3

S1_REG#
S1_A12
S1_A8
S1_CE1#

S1_RST
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A14
S1_WAIT#
S1_A13
S1_INPACK#
S1_WE#

1 2

R286 33_0402_5%

S1_BVD1
S1_WP

S1_A19
S1_RDY#
PCM_SPK#

S1_BVD2
S1_CD2#

S1_CD1#
S1_VS2
S1_VS1
S1_D2
S1_A18
S1_D14

XD_PWREN#
MSBS_XDD1
MS_CLK

R529 33_0402_5%

MSD0_XDD2
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3

XD_CD#
XD_WP#

R526

2.2K_0402_5%

61@

1 2

S1_IOWR# (33)
S1_IORD# (33)
S1_OE# (33)

S1_CE2# (33)

S1_REG# (33)

S1_CE1# (33)
S1_RST (33)

S1_WAIT# (33)
S1_INPACK# (33)

S1_WE# (33)

S1_BVD1 (33)
S1_WP (33)

S1_RDY# (33)
PCM_SPK# (39)

S1_BVD2 (33)
S1_CD2# (33)

S1_CD1# (33)
S1_VS2 (33)
S1_VS1 (33)

1 2

XD_BSY# (33)
XD_CD# (33)
XD_WP# (33)
XD_CE# (33)

S1_A16

61@

S1_A[0..25]
S1_D[0..15]

MS_INS# (33)
XD_PWREN# (33)
MSBS_XDD1 (33)

MSCLK_XDRE# (33)
MSD0_XDD2 (33)
MSD1_XDD6 (33)
MSD2_XDD5 (33)
MSD3_XDD3 (33)

E

S1_A[0..25] (33)

S1_D[0..15] (33)

+3VS

1

C362

4.7U_0805_10V4Z

2

+S1_VCC

1

C598

0.1U_0402_16V4Z

2

S1_CD2# S 1_CD1#

C361
10P_0402_25V8K

2

1

1

C602

0.1U_0402_16V4Z

2

1

C605

0.1U_0402_16V4Z

2

C595

2

10P_0402_25V8K

1

**CB714 use B0 version

4 4

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/05/09 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Docum ent Number Rev

B

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3121P
401411

星期一 五月

E

D

of

32 51, 08, 2006

A

PCMCIA Power Control

+S1_VCC

1 1

W=40mil

C339
10U_0805_10V4Z

1

2

1

C338

2

0.1U_0402_16V4Z

W=40mil

1

C334
10U_0805_10V4Z

2

2 2

1

C335

2

0.1U_0402_16V4Z

+5VS

+3VS

9

5
6

3
4

12

R263
10K_0402_5%

U26

12V

5V
5V

3.3V

3.3V

VCCD0#
VCCD1#

7

R260 10K_0402_5%
R261 10K_0402_5%

VCC
VCC
VCC

VPP

VCCD0
VCCD1
VPPD0
VPPD1

OC

GND

SHDN

CP2211FD3_SSOP16

16

1 2
1 2

40mil

13
12
11

10

1
2
15
14

8

VCCD0#
VCCD1#
VPPD0
VPPD1

SD/MS Power Control

XD Power Control

+3VS

R81

10K_0402_5%61@

XD_PWREN#

3 3

SD_PWREN#(32)
MS_PWREN#(32)

SD_PWREN#

1 2

12

R84
0_0402_5%

61@

U9

1

GND

OUT

2

IN

OUT

3

OUT

IN

4

FLG

EN#

G528_SO8

61@

XD_PWREN#

1 2

R96 0_0603_5%

61@

40mil

+VCC_XD+3VS

8
7
6

SDOC#

5

12

13

D

2

G

S

+VCC_SD+VCC_XD

40mil

+3VS

R80
300_0402_5%

Q7
2N7002_SOT23

61@

B

+S1_VPP

R85

1 2

1

C340

0.1U_0402_16V4Z

2

VCCD0# (32)
VCCD1# (32)

VPPD0 (32)
VPPD1 (32)

10K_0402_5%61@

SDOC# (32)XD_PWREN#(32)

C

+S1_VCC

1

C332

10U_0805_10V4Z

2

+S1_VPP

1

C601

2

10U_0805_10V4Z

S1_OE#

1 2

R276 43K_0402_5%

S1_WP

R305 43K_0402_5%

S1_RST

1 2

R292 43K_0402_5%

S1_CE1#

1 2

R271 43K_0402_5%

S1_CE2#

1 2

R274 43K_0402_5%

xD PU and PD. Close to Socket

+3VS +VCC_XD

R99 43K_0402_5%@

+VCC_XD

1 2

R102 2.2K_0402_5%61@

1 2

R103 2.2K_0402_5%61@

1 2

R97 2.2K_0402_5%61@

1 2

R98 2.2K_0402_5%61@

Reserve for SD,MS CLK.
Close to Socket

SDCK_XDWE#

C196 10P_0402_25V8K 61@

MSCLK_XDRE#

C197 10P_0402_25V8K @

2006/4/27 Modify to @

C600

12

XD_CD#

12

MSCLK_XDRE#
SDCK_XDWE#

1 2

1 2

C336

1

2

1

2

XD_CE#
XD_BSY#

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+S1_VCC
+S1_VCC
+S1_VCC
+S1_VCC
+S1_VCC

+VCC_SD

C280
10U_0805_10V4Z

61@

C201

10U_0805_10V4Z

61@

S1_A[0..25](32)

S1_D[0..15](32)

1

2

1

2

D

PCMCIA Socket

S1_D3

S1_CD1#(32)

S1_CE1#(32)

S1_CE2#(32)

S1_OE#(32)
S1_VS1(32)

S1_IORD#(32)

S1_IOWR#(32)

S1_A[0..25]
S1_D[0..15]

1

1

C283

0.1U_0402_16V4Z

2

61@

1

2

SDDA1_XDD0(32)
MSBS_XDD1(32)
MSD0_XDD2(32)
MSD3_XDD3(32)

SDDA3_XDD4(32)

MSD2_XDD5(32)
MSD1_XDD6(32)

SDDA0_XDD7(32)

SDCK_XDWE#(32)

SDCM_XDALE(32)

XD_CD#(32)
XD_BSY#(32)

MSCLK_XDRE#(32)

XD_CE#(32)

SDDA2_XDCL(32)

C285

0.1U_0402_16V4Z

61@

2

C191

0.1U_0402_16V4Z

61@

+VCC_XD +VCC_SD

SDDA1_XDD0
MSBS_XDD1
MSD0_XDD2
MSD3_XDD3
SDDA3_XDD4
MSD2_XDD5
MSD1_XDD6
SDDA0_XDD7

SDCK_XDWE#

XD_WP#(32)

XD_WP#
SDCM_XDALE
XD_CD#
XD_BSY#
MSCLK_XDRE#
XD_CE#
SDDA2_XDCL

R610

1 2

0_0402_5%

61@

JP25

41

XD-VCC

33

XD-D0

34

XD-D1

35

XD-D2

36

XD-D3

37

XD-D4

38

XD-D5

39

XD-D6

40

XD-D7

30

XD-WE

31

XD-WP

29

XD-ALE

23

XD-CD

25

XD-R/B

26

XD-RE

27

XD-CE

28

XD-CLE

32

XD-GND

24

XD-GND

42

N.C.

18

N.C.

TAITW_R007-530-L3

61@

S1_WE#(32)

S1_RDY#(32)

+S1_VCC
+S1_VCC

+S1_VPP
+S1_VPP

S1_VS2(32)
S1_RST(32)

S1_WAIT#(32)

S1_INPACK#(32)

S1_REG#(32)
S1_BVD2(32)
S1_BVD1(32)

S1_WP(32)

S1_CD2#(32)

4 IN 1 CONN

S1_CD1#

S1_D4

S1_D11

S1_D5

S1_D12

S1_D6

S1_D13

S1_D7

S1_D14

S1_CE1#

S1_D15

S1_A10

S1_CE2#

S1_OE#

S1_VS1

S1_A11

S1_IORD#

S1_A9

S1_IOWR#

S1_A8
S1_A17
S1_A13
S1_A18
S1_A14
S1_A19

S1_WE#

S1_A20

S1_RDY#

S1_A21

S1_A16
S1_A22
S1_A15
S1_A23
S1_A12
S1_A24

S1_A7
S1_A25

S1_A6

S1_VS2

S1_A5

S1_RST

S1_A4

S1_WAIT#

S1_A3

S1_INPACK#

S1_A2

S1_REG#

S1_A1

S1_BVD2

S1_A0

S1_BVD1

S1_D0

S1_D8

S1_D1

S1_D9

S1_D2

S1_D10

S1_WP

S1_CD2#

SD-VCC

MS-VCC

SD_CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3

SD-CMD

SD-CD-SW

SD-CD-COM

SD-WP-SW

SD-WP-COM

MS-SCLK
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3

MS-INS

MS-BS
SD-GND
SD-GND
MS-GND
MS-GND

15
9

16
19
20
11
12
13
21
22
43
44

8
4
3
5
7
6
2
14
17
1
10

JP9

1

GND

35

GND

2

DATA3

36

CD1#

3

DATA4

37

DATA11

4

DATA5

38

DATA12

5

DATA6

39

DATA13

6

DATA7

40

DATA14

7

CE1#

41

DATA15

8

ADD10

42

CE2#

9

OE#

43

VS1#

10

ADD11

44

IORD#

11

ADD9

45

IOWR#

12

ADD8

46

ADD17

13

ADD13

47

ADD18

14

ADD14

48

ADD19

15

WE#

49

ADD20

16

READY

50

ADD21

17

VCC

51

VCC

18

VPP

52

VPP

19

ADD16

53

ADD22

20

ADD15

54

ADD23

21

ADD12

55

ADD24

22

ADD7

56

ADD25

23

ADD6

57

VS2#

24

ADD5

58

RESET

25

ADD4

59

WAIT#

26

ADD3

60

INPACK#

27

ADD2

61

REG#

28

ADD1

62

BVD2

29

ADD0

63

BVD1

30

DATA0

64

DATA8

31

DATA1

65

DATA9

32

DATA2

66

DATA10

33

WP

67

CD2#

34

GND

68

GND

SANTA_130601-7_LT

6 IN 1 Socket

SDCK_XDWE#
SDDA0_XDD7
SDDA1_XDD0
SDDA2_XDCL
SDDA3_XDD4
SDCM_XDALE
SD_CD#

SD_WP#

MSCLK_XDRE#
MSD0_XDD2
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3
MS_INS#
MSBS_XDD1

GND
GND

(HDQ70)

(NEW)

69
70

E

SD_CD# (32)

SD_WP# (32)

MS_INS# (32)

2006/4/13 modify

4 4

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/05/09 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Docum ent Number Rev

B

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3121P

401411

星期一 五月

D

of

33 51, 08, 2006

E

A

B

C

D

E

New Card Power Switch

U32

CP_USB#
CP_PE#
SUSP#
SYSON
PCI_RST#

U4

1

GND

2

IN

3

IN

4

EN#

G528_SO8

5

3.3Vin1

6

3.3Vin2

21

3.3Vaux_in

18

1.5Vin1

19

1.5Vin2

14

CPUSB#

15

CPPE#

4

STBY#
SHDN#3RCLKEN

2

SYSRST#

GND

11

1

C353

10U_0805_10V4Z

2

OUT
OUT
OUT

FLG

NC11NC210NC312NC413NC5

+USB_VCCA

8
7
6
5

3.3Vout1

3.3Vout2

Aux_out

1.5Vout1

1.5Vout2

PERST#

24

+3VS

1 1

EXPRESS@

R285 100K_0402_5%

EXPRESS@

+3VALW

2 2

10U_0805_10V4Z

3 3

1 2

R287 100K_0402_5%

1 2

SUSP#(28,30,41)
SYSON(28,41)

PCI_RST#(18,26,31,32,35)

+3VS +1.5VS+3VALW

1

C364

2

+5VALW

C111

4.7U_0805_10V4Z

USB_EN#(28,38)

1

C356

10U_0805_10V4Z

2

1

2

USB_EN#

+3VALW

+1.5VS

60mils

7
8

40mil

20

40mil

16
17

23

OC#

RCLKEN1

22

PERST1#

9

TPS2231PWPR_PWP24

EXPRESS@

+3VALW

12

R42
100K_0402_5%

R43
1K_0402_5%

1 2

+3VS_CARD1

+3VALW_CARD1

+1.5VS_CARD1

1

C133

0.1U_0402_16V4Z

2

+3VALW_CARD1 +3VS_CARD1 +1.5VS_CARD1

1

2

+3VS

12

13

D

S

1

C350

0.1U_0402_16V4Z

2

EXPRESS@

R273
10K_0402_5%

EXPRESS@

CLKREQ1#

TC7SH32FU_SSOP5 EXPRESS@
Q16
2N7002_SOT23

EXPRESS@

+

USB20_N0
USB20_P0

R598 0_0402_5%
R600 0_0402_5%

10K_0402_5%

EXPRESS@

RCLKEN1

USB_OC#0 (19)

USB20_N0(19)
USB20_P0(19)

C357
10U_0805_10V4Z

EXPRESS@

R275

2

G

1

C365

2

10U_0805_10V4Z

EXPRESS@

+3VS +3VS

12

2

I0

1

I1

+USB_AS

1

C478
150U_D_6.3VM

2

1 2
1 2

Imax = 1.35A Imax = 0.75AImax = 0.275A

5

U29

P

O

G

3

1

C367

0.1U_0402_16V4Z

2

EXPRESS@

1

C345

0.1U_0402_16V4Z

EXPRESS@

2

4

1

C474
470P_0402_50V7K

2

USB20_N1

1

C354

2

10U_0805_10V4Z

EXPRESS@

EXP_CLKREQ# (17)

1

C355

0.1U_0402_16V4Z

EXPRESS@

2

USB20_N1(19)

USB20_P1(19)

PCIE_MRX_PTX_N1(13)
PCIE_MRX_PTX_P1(13)

PCIE_MTX_C_PRX_N1(13)
PCIE_MTX_C_PRX_P1(13)

R596 0_0402_5%

USB20_P1

R597 0_0402_5%

12/22 Mod i fy U29 Package

USB CONN. 1 & 2

+USB_VCCA+USB_VCCA

+USB_BS

1

+

C1

USB2@

150U_D_6.3VM

JP21

1

USB20_N0_R
USB20_P0_R USB20_P2_R

VCC

2

8

D-

8

3

7

D+

7

4

GND

5

GND1

6

GND2

SUYIN_020173MR004S512ZL

2005/12/30 Modify2005/12/30 Modify

USB20_N2(19)
USB20_P2(19)

USB20_N2
USB20_P2

2

R599 0_0402_5%

1 2

R601 0_0402_5%

1 2

New Card Socket (Left)

1 2
1 2

2005/12/30 Modify

SB_CK_SCLK(10,11,17,19,31)

SB_CK_SDAT(10,11,17,19,31)

+1.5VS_CARD1

SB_PCIE_WAKE#(19,31)

+3VALW_CARD1

+3VS_CARD1

CP_PE#(19)
CLK_PCIE_CARD#(17)
CLK_PCIE_CARD(17)

W=80milsW=80mils

1

C2

USB2@

470P_0402_50V7K

2

USB2@

USB2@

USB20_N1_R
USB20_P1_R

PCIE_MRX_PTX_N1
PCIE_MRX_PTX_P1

USB20_N2_R

CP_USB#

PERST1#

CLKREQ1#
CP_PE#

1
2
3
4

5
6

JP30

1

GND-1

2

USB_D-

3

USB_D+

4

CPUSB#

5

RSV-5

6

RSV-6

7

SMB_CLK

8

SMB_DATA

9

+1.5V-9

10

+1.5V-10

11

WAKE#

12

+3.3VAUX

13

PERST#

14

+3.3V-14

15

+3.3V-15

16

CLKREQ#

17

CPPE#

18

REFCLK-

19

REFCLK+

20

GND-20

21

PERn0

22

PERp0

23

GND-23

24

PETn0

25

PETp0

26

GND-26

27

GND-27

28

GND-28

SANTA_130832-1_LB

EXPRESS@

(NEW)

JP14

VCC

8

D-

8

7

D+

7

GND
GND1

GND2

SUYIN_020173MR004S512ZL

USB2@

D25

1

USB20_P0 USB20_N0

4 4

2

PRTR5V0U2X_SOT143@

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

GND

I/O

4

VCC

I/O

+USB_VCCA

3

2005/05/09 2006/06/20

C

2005/12/30 Modify

Compal Secret Data

Deciphered Date

D

D1

1

2

PRTR5V0U2X_SOT143@

Title

Size Docum ent Number Rev

B

Date: Sheet

4

GND

I/O

VCC

I/O

+USB_VCCA

USB20_N2USB20_P2

3

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3121P

星期一 五月

401411

E

of

34 51, 08, 2006

D

A

B

C

D

E

C311

0.1U_0402_16V4Z

1394@

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10

PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

PCI_STOP#
PCI_PERR#
PCI_PAR
PCI_PIRQE#

CLK_PCI_1394

PCI_GNT#0
PCI_REQ#0
1394_IDSEL

PCI_IRDY#
PCI_TRDY#

PCI_DEVSEL#

PCI_FRAME#

12

R251

10_0402_5%@

1

C325

10P_0402_25V8K@

2

+2.5VS_1394

1

2

C549

0.1U_0402_16V4Z

1394@

+2.5VS_1394

U14

94

AD31

95

AD30

96

AD29

97

AD28

98

AD27

101

AD26

102

AD25

103

AD24

106

AD23

107

AD22

109

AD21

113

AD20

114

AD19

115

AD18

116

AD17

117

AD16

2

AD15

3

AD14

4

AD13

7

AD12

8

AD11

9

AD10

10

AD9

11

AD8

14

AD7

PCI I/F

15

AD6

16

AD5

18

AD4

19

AD3

20

AD2

24

AD1

25

AD0

104

CBE3#

119

CBE2#

1

CBE1#

12

CBE0#

125

STOP#

127

PERR#

128

PAR

88

INTA#

89

PCIRST#

90

PCICLK

92

GNT#

93

REQ#

105

IDSEL

34

PME#

121

IRDY#

123

TRDY#

124

DEVSEL#

120

FRAME#

111

VCC699VCC536VCC417VCC35VCC2

1

C308

0.1U_0402_16V4Z

2

1394@

+3VS

122

110

VCC1

+1394_PLLVDD

59

PVA587PVA486PVA373PVA272PVA162PVA0

1

C289

0.1U_0402_16V4Z

2

1394@

VDD446VDD330VDD221VDD1

VT6311S

EEPROM

others

OSCILLATOR

PHY PORT0

PHY PORT1

GNDATX166GNDARX165GNDATX280GNDARX279GND19

GND18

GND17

GND16

GND1591GND1061GND956GND847GND738GND633GND531GND423GND322GND26GND113GND0

118

112

108

100

VIA 1394 with Sn-Bi part : SA00000P510

SDA/EEDI

SCL/EECK

PHYRST#

PWRDET

REG_OUT

XTPBIAS0

XTPBIAS1

1

C288

0.1U_0402_16V4Z

2

1394@

20mils

26

EECS

27

EEDO

28
29

55
81

BJT_CTL

43

I2CEN

32
84

REG_FB

85
60

XCPS

63

XREXT

57

XI

58

XO

67

XTPB0M

68

XTPB0P

69

XTPA0M

70

XTPA0P

71
74

XTPB1M

75

XTPB1P

76

XTPA1M

77

XTPA1P

78
83

NC17

82

NC16

64

NC15

54

NC14

53

NC13

52

NC12

51

NC11

50

NC10

49

NC9

48

NC8

45

NC7

44

NC6

42

NC5

41

NC4

40

NC3

39

NC2

37

NC1

35

NC0

VT6311S_LQFP128

126

1394@

0.1U_0402_16V4Z

1

C312

2

1394@

EECS

R169 4.7K_0402_5% 1394@

EEDI
EECK

R490 4.7K_0402_5%@

I2CEEN

R186 4.7K_0402_5% @

R168 4.7K_0402_5% 1394@

REG_FB
REG_OUT

R480 1K_0402_5% 1394@

XREXT

R486 6.19K_0603_1% 1394@

10mils

1394_XI
1394_XO
TPB0-

TPB0+
TPA0­TPA0+
TPBIAS0

0.1U_0402_16V4Z

1

1

C567

C566

2

2

1394@

1 2

1 2
1 2
1 2
1 2

1 2

1 2
1 2

1 2

1394@

1394@

0.1U_0402_16V4Z

C557 1U_0402_6.3V4Z 1394@

C287 0.1U_0402_16V4Z 1394@

C568 47P_0402_50V8J

MBK1608301YZF_0603

1 2

1

C571

4.7U_0805_10V4Z

2

1394@

+3VS

L48

1394@

+3VS

+3VS

1 2

Y4

24.576MHZ_16P_X8A024576FG1H

1394@

1 2

1 2

C309
10P_0402_25V8K

1394@

TPBIAS0
TPA0+
TPA0­TPB0+
TPB0-

C303
10P_0402_25V8K

1394@

U13

1

A0

2

A1

3

A2

4

GND

AT24C02N-10SU-2.7_SO8

@

EECK and EEDI is pull high internal
External pull h igh ci rcuit is unnecessary

When use ext er nal EEPROM
Populate U13, R170, R186
Un-populate R169

8

VCC

7

WP

6

SCL

5

SDA

+3VS

REG_OUT

2

B

C

REG_FB

When use external BJT
Populate Q28, R490

15mils

12

R478

54.9_0402_1%

1394@

12

R472

54.9_0402_1%

1394@

1

C547
270P_0402_50V7K

1394@

2

12

R476

54.9_0402_1%

1394@

12

R467

54.9_0402_1%

1394@

12

R471

4.99K_0402_1%

1394@

+3VS

EECK
EEDI

31

E

Q28

2SB1197K_SOT23

@

+2.5VS_1394

1

2

12

R170
510_0402_5%

@

C561

0.33U_0603_10V7K

1394@

JP26

4

4

3

6

3

6

5

2

5

2

1

1

FOX_UV31413-4R1-TR

1394@

(ECQ60)

+3VS

1

C319

0.1U_0402_16V4Z

2

1394@

1 1

2 2

3 3

4 4

1

C300

0.1U_0402_16V4Z

2

1394@

PCI_AD[0..31](18,22,26,31,32)

PCI_AD16 1394_IDSEL

PCI_AD[0..31]

IDSEL:PCI_AD16

1 2

R194 100_0402_5%1394@

1

C290

0.1U_0402_16V4Z

2

1394@

PCI_CBE#3(18,26,31,32)
PCI_CBE#2(18,26,31,32)
PCI_CBE#1(18,26,31,32)
PCI_CBE#0(18,26,31,32)

PCI_STOP#(18,26,31,32)

PCI_PERR#(18,26,31,32)

PCI_PAR(18,26,31,32)

PCI_PIRQE#(18,32)

PCI_RST#(18,26,31,32,34)

CLK_PCI_1394(18)

PCI_GNT#0(18)
PCI_REQ#0(18)

PCI_IRDY#(18,26,31,32)

PCI_TRDY#(18,26,31,32)

PCI_DEVSEL#(18,26,31,32)

PCI_FRAME#(18,26,31,32)

CLK_PCI_1394

1

2

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/05/09 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Docum ent Number Rev

B

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3121P

401411

星期一 五月

E

D

of

35 51, 08, 2006

SUPER I/O SMsC LPC47N207

U28

R512
10_0402_5%@

C583
15P_0402_50V8J@

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_DRQ#0
LPC_FRAME#
PM_CLKRUN#
SERIRQ
CLK_PCI_SIO
NB_RST#
CLK_14M_SIO
SIO_PD#
SIO_PME#

CLK_PCI_SIO

+3VS
+3VS

LPC_DRQ#0(18)

LPC_FRAME#(18,22,28)

PM_CLKRUN#(18,26,31)

CLK_PCI_SIO(18)

CLK_14M_SIO(17)

1 2

R336 10K_0402_5%SIOALL@

1 2

R335 10K_0402_5%SIO1@

CLK_14M_SIO

LPC_AD0(18,28)
LPC_AD1(18,28)
LPC_AD2(18,28)
LPC_AD3(18,28)

SERIRQ(18,28,32)
NB_RST#(14,18,23,28,31)

1 2
2

1

Place on the BOT side(near MINIPCI conn.)

+5VS

RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1

JP11

1
2
3
4
5
6
7
8
9

10

ACES_85201-10051

@

For SW debug use when no seial port

R268
33_0402_5%@

1 2

2

C342

22P_0402_50V8J@

1

64

LAD0

2

LAD1

4

LAD2

7

LAD3

10

LPC_CLK_33

12

LDRQ1#

24

LDRQ0#

14

LFRAME#

16

CLKRUN#

19

SERIRQ

21

PCI_CLK

22

PCIRST#

23

SIO_14M

25

LPCPD#

47

IO_PME#

63

DLAD0

1

DLAD1

3

DLAD2

6

DLAD3

9

DLPC_CLK_33

11

DLDRQ1#

13

DLFRAME#

15

DCLKRUN#

18

DSER_IRQ

26

DSIO_14M

LPC47N207-JN_STQFP64

SIO1@

RTS#1

Base I/O Address

0 = 02Eh

*

1 = 04Eh

DCD#1
RI#1
CTS#1

DSR#1

+3VS

1

C587

SIOALL@

2

0.1U_0402_16V4Z

+3VS

3.3V53.3V173.3V313.3V423.3V

LPC I/F

DLPC I/F

RP38

1 8
2 7
3 6
4 5

4.7K_1206_8P4R_5%

SIO1@

0.1U_0402_16V4Z

1

C588

SIOALL@

2

60

48

VTR

GPIO12/IO_SMI#

GPIO13/IRQIN1
GPIO14/IRQIN2

RTS1#/SYSOPT0
DTR1#/SYSOPT1

SERIAL I/F

IRMODE/IRRX3

IR GPIO

GND08GND120GND229GND337GND445GND5

+3VS

GPIO10
GPIO11

GPIO15
GPIO16
GPIO17
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37

RXD1
TXD1

DRSR1#

CTS1#

RI1#

DCD1#

IRTX2
IRRX2

62

1

C582

SIOALL@

0.1U_0402_16V4Z

2

27
28
30
32
33
34
35
36
38
39
40
41
43
44
46
61

52
53
54
55
56
57
58
59

49
50
51

RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1

IRTXOUT
IRRX
IRMODE

+3VS

1 2

R269 10K_0402_5%SIO1@

1 2

R513 10K_0402_5%SIO1@

1 2

R279 10K_0402_5%SIO1@

1 2

R280 10K_0402_5%SIO1@

1 2

R278

FIR@

10K_0402_5%

+3VS

1 2

R242 10K_0402_5%@

1 2

R243 10K_0402_5%

SIO2@

FIR Module

FIR@

1 2

+3VS

R147
47_1206_5%

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/09 2006/06/20

+IR_3VS

1

C253

FIR@

10U_0805_10V4Z

2

Compal Secret Data

W=40mil

1

C245

FIR@

0.1U_0402_16V4Z

2

Deciphered Date

LPC_FRAME#
LPC_DRQ#0
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

NB_RST#
SIO_PD#
PM_CLKRUN#
SERIRQ
CLK_PCI_SIO
CLK_14M_SIO

BASE_ADDRESS

+3VS

C210

FIR@

4.7U_0805_10V4Z

+IR_3VS

+3VS

3
14
22

7

8

2

4

5

6

9
10
11
13
12

1
18

Base I/O Address

0 = 004Eh*

1 2

R114 0_1206_5%

1 2

1

R116 0_1206_5%

2

IR1

2

IRED_C

4

RXD

6

VCC

8

GND

TFDU6102-TR3_8P

FIR@

U25

VCC
VCC
VCC

LFRAME#
LDRQ#
LAD0
LAD1
LAD2
LAD3

PCI_RESET#
LPCPD#
CLKRUN#
SER_IRQ
PCI_CLK
CLOCKI
GPIO/SYSOPT1

FIR@
FIR@

SD/MODE

FIR

IRMODE/ALT_IRRX

LPC I/F

GROUND PAD

SIO1036-AEZG_QFN36

SIO2@

PARALLEL I/F

STROBE#

+IR_ANODE

IRRX

IRTX

INIT#

SLCTIN#

PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7

SLCT

BUSY
ACK#

ERROR#

ALF#

VSS

PE

IRTXOUT

16

IRMODE

17

19
20
21
23
24
25
26
27
28
29
30
31
32
33
34
35
36

37

IRRX

15

W=60mil

1

IRED_A

3

TXD

5
7

MODE

Title

Size Docum ent Number Rev

B

Date: Sheet

星期一 五月

IRTXOUT

T = 12mil

IRMODEIRRX

T = 12mil

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3121P

401411

36 51, 08, 2006

D

of

A

B

C

D

E

+3VS

Power ON Circuit

D5
1N4148_SOT23@

R100

1 1

VLDT_EN(28) SB_PWROK (8,19)

VLDT_EN

R106
10K_0402_5%

2006/02/22 Change R100 to 47K

2 2

47K_0402_1%

1 2

C203
1U_0603_10V4Z

+3VALW +3VALW +3VALW +3VALW+3VALW

12

U10A
SN74LVC14APWR_TSSOP14

14

P

1

O2I

G

1

2

+3V POWER + 3V POWER

7

14

P

3

G

7

U10B
SN74LVC14APWR_TSSOP14

R111
10K_0402_5%

@

R112

O4I

1 2

R109
10_0402_5%@

100K_0402_1%

+3VALW +3VALW

14

P

5

O6I

G

7

U10C
SN74LVC14APWR_TSSOP14

U10D
SN74LVC14APWR_TSSOP14

14

P

9

O8I

G

7

C204
1U_0805_25V4Z

R113
180K_0402_5%@

2

1

12

U10E
SN74LVC14APWR_TSSOP14

14

P

11

O10I

G

+3V POWER + 3V POWER

7

note:T1 minimum 15ms,T2 minimum 33ms/maximum 500ms,
SUSP# goes to low after SB_PWRGD goes to low for power
down.

U10F
SN74LVC14APWR_TSSOP14

14

P

13

O

I

G

7

T1

12

R108
10_0402_5%

1 2

R104
10_0402_5%

1 2

R105

100K_0402_5% @

NB_PWROK (14)

VLDT_EN

NB_PWRGD

SB_PWRGD

T2

SUSP#

+1.8VS

TOP Side

12

J3 JO PEN

12

J4 JO PEN

Bottom Side

3 3

ON/OFFBTN#(38)

ON/OFFBTN#

1

CHN202UPT_SC70

RD 11/2 Modify

EC_ON(28)

EC_ON

R290
10K_0402_5%

D10

2

G

+3VALW

1 2

2
3

13

D

S

R281
100K_0402_5%

51ON#

2N7002_SOT23
Q17

Power Button

ON/OFF (28)
51ON# (42)

2

C358
1000P_0402_50V7K

1

12

D11
RLZ20A_LL34

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/09 2006/03/08

C

Compal Secret Data

Deciphered Date

Compal Electronics. inc.

Title

SCHEMATIC, M/B LA-3121P

Size Document Number Rev

B

401411

Date: Sheet

星期四

11, 2006

D

五月

37 51,

E

D

of

R539

100_0805_5%

CIR@

C614

CIR@

4.7U_0805_10V4Z

PWR_LED(28)

+3VALW

12

Update Part N u m ber to SCR36236000

2

G

CIR

IR2

Vs3OUT

1

GND

1

2

GND

TSOP36236TR_4P

CIR@

13

D

S

4
2

PWR_LED#

2N7002_SOT23
Q1

RCIRRX

1

C615

CIR@

1000P_0402_50V7K

2

RCIRRX (28)

+5VS

+5VALW

+5VALW

+5VALW

R538
300_0402_5%

1 2

R331
300_0402_5%

1 2

R332
300_0402_5%

1 2

R537
300_0402_5%

1 2

LED5

2 1
3

HT-110UYG_1204

LED4

2 1
3

HT-110UD_1204

LED2

2 1
3

HT-110UYG_1204

LED6

2 1
3

HT-110UD_1204

PWR_LED#

PWR_SUSP_LED#

BATT_FULL_LED#

BATT_CHGI_LED#

PWR_SUSP_LED# (28)

BATT_FULL_LED# (28)

BATT_CHGI_LED# (28)

MDC Conn.

JP3

1

AC_SDOUT(19)

AC_SYNC(19)

ACZ_SDIN1(19)

AC_RST#(19)

AC_SDOUT

R357 33_0402_5%

1 2

AC_RST#

+3VALW

1

C3
1U_0603_10V4Z

2

AC_SYNC

GND1

3

IAC_SDATA_OUT

5

GND2

7

IAC_SYNC

9

IAC_SDATA_IN

11

IAC_RESET#

GND13GND14GND15GND16GND17GND

Connector for MDC Rev1.5

To LED/B Conn.

+5VS

MEDIA_LED#(28)
CAPS_LED#(28)

NUM_LED#(28)
E-MAIL_LED#(28)
ON/OFFBTN#(37)

E-MAIL_BTN#(28)

IE_BTN#(28)

USER_BTN#(28)

EMPWR_BTN#(28)

CVBS_IN(31)

S_YIN(31)
S_CIN(31)

PWR_LED#

1
3
5
7

9
11
13
15
17
19
21
23
25
27
29

JP2

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

GND31GND32GND33GND34GND35GND

RES0
RES1

3.3V
GND3
GND4

IAC_BITCLK

18

+5VALW

10
12
14
16
18
20
22
24
26
28
30

36

2
4
6
8
10
12

ACES_88018-124G

C435

0.1U_0402_16V4Z

2

2

4

4

6

6

8

8

10
12
14
16
18
20
22
24
26
28
30

ACES_88018-304G

20mil

USB20_N4

USB20_P4

USB20_N6

USB20_P6

AC_BITCLK

1

C432
22P_0402_50V8J

2

1

+

C436
150U_D2_6.3VM

2

+5VALW

USB_EN# (28,34)

AUDIO_INL (31)

AUDIO_INR (31)

+3VALW

AC_BITCLK (19)

USB20_N4 (19)
USB20_P4 (19)

USB20_N6 (19)
USB20_P6 (19)

+5VS

12

R330
300_0402_5%

21

3

LED1
HT-110NBQA_BULE_1204

BT_ON_LED#

+5VS

3

12

21

R329
300_0402_5%

BT_SW WL_SW

5

2005/09/12

1

5

1

2

2

3

3

BTSW_EN# WLSW_EN#

4

6

SW8

6

HSS110_4P

4

BTSW_EN# (28) WLSW_EN# (28)

5

6

LED3
HT-110UD_1204

WL_ON_LED#

1

5

1

2

2

3

3

4

4

6

SW9
HSS110_4P

WL_ON_LED# (28)

+3VALW

12

C634

0.1U_0402_16V4Z

@

BT_ON#(28)

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R564
100K_0402_5%

BT@

G

2

2005/05/09 2006/06/20

S

Q21

BT@

SI2301BDS_SOT23

D

1 3

W=40mils

1

C399

BT@

4.7U_0805_10V4Z

2

1

2

Compal Secret Data

Bluetooth Conn.

C395

BT@

1U_0603_10V4Z

USB20_P5(19)

USB20_N5(19)

+BT_VCC

C398

BT@

0.1U_0402_16V4Z

Deciphered Date

USB20_P5

BT@

L65 WCM2012F2S-900T04_0805

1

1

4

4

2

2

3

3

WLAN_BT_DATA(31)

WLAN_BT_CLK(31)BT_ON_LED# (28)

2006/02/27 Added

Title

Size Docum ent Number Rev

B

Date: Sheet

+BT_VCC

USB20_P5_R
USB20_N5_RUSB20_N5

JP31

1
2
3
4
5
6
7

8

ACES_87212-0800

BT@

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3121P

401411

星期一 五月

D

of

38 51, 08, 2006

A

1 1

2 2

3 3

BEEP#(28)

PCM_SPK#(32)

SB_SPKR(19)

R303

1 2

47K_0402_5%

R295

1 2

47K_0402_5%

R300

1 2

47K_0402_5%

INT_CD_L(23)

INT_CD_R(23)
CD_AGND(23)

1U_0603_10V4Z

1U_0603_10V4Z

1U_0603_10V4Z

1 2

R319 0_0603_5%

1 2

R324 0_0603_5%

1 2

R328 0_0603_5%

1 2

R565 0_0603_5%

1 2

R566 0_0603_5%

B

1 2

1 2

1 2

12
12
12
12

12

R317

6.8K_0402_5%

R304

1 2

560_0402_5%

R299

1 2

560_0402_5%

R302

1 2

560_0402_5%

10K_0402_5%

+VDDA

12

R301

C378

C372

C376

R310 20K_0402_5%
R311 6.8K_0402_5%
R320 6.8K_0402_5%
R318 20K_0402_5%

R314 20K_0402_5%

12

R316

@

0_0402_5%

C

+VDDA

12

R309
10K_0402_5%

12

R307
10K_0402_5%

1

C

Q20

2

B

E

2SC2411K_SC59

3

12

D12
CH751H-40PT _SOD323

2 1

L18

1 2

FBM-L11-160808-800LMT_0603

LINE_L(40)
LINE_R(40)

CD_L_R
CD_R_R CD_R_RC
CD_AGND_R

MIC1_L(40)
MIC1_R(40)

1U_0603_10V4Z

1 2

C387

C380

1 2

1U_0603_10V4Z

1 2

R308

2.4K_0402_5%

C381

10U_0805_10V4Z

LINE_L
LINE_R

MIC1_L
MIC1_R MIC1_C_R

2005/09/12

AZ_RST#(19)
AZ_SYNC(19)

AZ_SDOUT(19)

NBA_PLUG(40)

MONO_IN

1

2

0.1U_0402_16V4Z

LINE_C_L
LINE_C_R
CD_L_RC

CD_AGND_RC
MIC1_C_L

MONO_IN

40mil

1

C384

2

0.1U_0402_16V4Z

1

C389

2

1 2

C393 1U_0603_10V4Z

1 2

C394 1U_0603_10V4Z

1 2

C377 1U_0603_10V4Z

1 2

C385 1U_0603_10V4Z

1 2

C379 1U_0603_10V4Z

1 2

C386 1U_0603_10V4Z

1 2

C392 1U_0603_10V4Z

EAPD(28)

SPDIF(40)

DGND

D

L19

+5VS

1 2

KC FBM-L11-201209-221LMAT_0805
L21

1 2

KC FBM-L11-201209-221LMAT_0805

HD Audio Codec

+AVDD_AC97

U33

AVDD125AVDD2

14

LINE2_L

15

LINE2_R

16

MIC2_L

17

MIC2_R

23

LINE1_L

24

LINE1_R

18

CD_L

20

CD_R

19

CD_GND

21

MIC1_L

22

MIC1_R

12

PCBEEP

11

RESET#

10

SYNC

5

SDATA_OUT

2

GPIO0

3

GPIO1

13

SENSE A

34

SENSE B

47

SPDIFI/EAPD

48

SPDIFO

4

DVSS1

7

DVSS2

ALC883-LF_LQFP48

38

SIDESURR_OUT_L
SIDESURR_OUT_R

MIC1_VREFO_R

20mil

DVDD11DVDD2
FRONT_OUT_L
FRONT_OUT_R

SURR_OUT_L
SURR_OUT_R

CEN_OUT

LFE_OUT

BIT_CLK

SDATA_IN
PIN37_VREFO
LINE1_VREFO
LINE2_VREFO

MIC1_VREFO_L

MIC2_VREFO

VREF

JDREF

VAUX

AVSS1
AVSS2

10U_0805_10V4Z

0.1U_0402_16V4Z

1

C375

2

9

R606 0_0402_5%

35

R607 0_0402_5%

36
39
41
45
46
43
44

6

R297 33_0402_5%

8
37
29
31

10mil

28
32
30
27
40
33
26

42

AGND

E

+5VAMP

1

C390

2

0.1U_0402_16V4Z

1

1

2

0.1U_0402_16V4Z

1 2
1 2

C374 22P_0402_50V8J

1 2

1 2

AC97_VREF

12

R306
20K_0402_1%

C373

2

R608
47K_0402_5%

@

MIC1_VREFO_L
MIC1_VREFO_R

10mil

@

C369
10U_0805_10V4Z

1

C391
10U_0805_10V4Z

2

60mil

1

C397

2

L50

1 2

FBM-L11-160808-800LMT_0603

12

12

R609
47K_0402_5%

@

AZ_BITCLK (19)

ACZ_SDIN0 (19)

F

U34

4

VIN

2

DELAY
ERROR7CNOISE

8

SD

SI9182DH-AD_MSOP8

AMP_LEFT
AMP_RIGHT

G

28.7K for Module Design (VDDA = 4.702)

(output = 250 mA)

SENSE or ADJ

+3VS

40mil

5

VOUT

6
1
3

GND

0.1U_0402_16V4Z

AMP_LEFT (40)
AMP_RIGHT (40)

2006/02/27 Added

30K_0402_1%

4.85V

1

R313

C388
10U_0805_10V4Z

1 2
12

2

R312
10K_0402_1%

1

C396

2

H

+VDDA

GND GNDA

4 4

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

C

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2005/05/09 2006/06/20

E

Compal Secret Data

Deciphered Date

Title

Size Docum ent Number Rev

B

F

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3121P

401411

星期一 五月

G

D

of

39 51, 08, 2006

H

A

+5VAMP

12

R531

1 1

12

R534

@

5.1K_0402_1%

13

SPDIF_PLUG#

2N7002_SOT23 @

2 2

D

2

Q30

G

S

AMP_LEFT(39)

AMP_RIGHT(39)

10K_0402_5%

VOL_AMP

(0.65V -> 10dB )

12

R532

1.5K_0402_1%

C608 0.1U_0402_16V4Z

R530 0_0402_5%

1 2

C610 1U_0603_10V4Z

1 2

C612 1U_0603_10V4Z

0.1U_0402_16V4Z

12

VOL_AMP
VOLMAX

12

NBA_PLUG
AMP_LEFT_C

AMP_RIGHT_C

BYPASS

20mil

1

2

C609

C611

4.7U_0805_10V4Z

+5VAMP

W=40mil

1

2

U43

10

VDD

15

VDD

7

VOLUME

8

VOLMAX

13

SE/BTL#

6

LIN-

3

RIN-

4

BYPASS

APA2068KAI-TRL_SOP16

B

1

C613

4.7U_0805_10V4Z

2

SHUTDOWN#

ROUT­LOUT+

ROUT+

1

MUTE

2
9

LOUT-

16
11
14

5

GND

12

GND

SPKL+

1 2

C383 150U_D_6.3VM

SPKR+

1 2

C382 150U_D_6.3VM

+5VAMP

12

R535
100K_0402_5%

R536

100K_0402_5%

1 2

EC_MUTE

SPKL­SPKR­SPKL+
SPKR+

+

HPOUT_L_1

+

HPOUT_R_1 HPOUT_R_2

1 2

R321 47_0603_5%

1 2

R322 47_0603_5%

C

EC_MUTE (28)

HPOUT_L_2

NBA_PLUG(39)

C400

330P_0402_50V7K

1 2

L27 FBM-11-160808-700T_0603

1 2

L28 FBM-11-160808-700T_0603

+5VAMP

R323 100K_0402_5%

L51 FBM-L11-160808-800LMT_0603

SPDIF(39)

SPDIF

+5VSPDIF

220P_0402_50V7K@

SPKL+
SPKL­SPKR+
SPKR-

2

1

HPOUT_L_3
HPOUT_R_3

12

1 2

C306

D

L20 FBM-11-160808-700T_0603

1 2

L22 FBM-11-160808-700T_0603

1 2

L29 FBM-11-160808-700T_0603

1 2

L30 FBM-11-160808-700T_0603

1 2

20mil

Speaker Conn.

+5VAMP

12

R533
100K_0402_5%

NBA_PLUG

2

C401
330P_0402_50V7K

1

SPDIF_PLUG#

1

2

13

D

SPDIF_PLUG#

2

G

Q32
2N7002_SOT23

S

S/PDIF Out JACK

JP32

1
2
6
3

5
4

7
8

10

9

ACES_20234-0101

+5VSPDIF

+5VAMP

S

D

1 3

SPK_L+
SPK_L­SPK_R+
SPK_R-

G

SPDIF_PLUG#

2

Q31
SI2301BDS_SOT23

20mil

JP12

1
2
3
4

ACES_85204-0400

E

01/03 Added

3 3

LINE_R(39)
LINE_L(39)

Int MIC Conn.

15mil

B

2005/09/06

1 2

R325
0_0402_5%

INT_MIC_L

MIC1_R(39)
MIC1_L(39)

JP13

1
2

ACES_85204-0200

4 4

A

L26 FBM-11-160808-700T_0603

LINE_R

1 2

LINE_L LINE_L_R

1 2

L25 FBM-11-160808-700T_0603

220P_0402_50V7K

2.2K_0402_5%

1 2

L24

1 2

L23

220P_0402_50V7K

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

1

C402

2

12

R326

FBM-11-160808-700T_0603
FBM-11-160808-700T_0603

1

C404

2

2005/05/09 2006/06/20

1

C403

220P_0402_50V7K

2

MIC1_VREFO_RMIC1_VREFO_L

R327

2.2K_0402_5%

C405

220P_0402_50V7K

LINE_R_R

12

MIC1_R_1
MIC1_L_1

1

2

Compal Secret Data

Deciphered Date

LINE-IN JACK

JP33

5
4
3

6
2
1

SUYIN_010164FR006G118ZL

MIC JACK

JP34

5
4
3

6
2
1

SUYIN_010164FR006G118ZL

D

Title

Size Docum ent Number Rev

B

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3121P

401411

星期一 五月

E

of

40 51, 08, 2006

D

A

B

C

D

E

+3VALW TO +3VS

+3VS

+3VALW

U41

8

S

D

1 1

2 2

3 3

7

D

6

D

5

D

SI4800BDY_SO8

1

C560
10U_0805_10V4Z

2

+1.8VALW

8
7
6
5

1

2

S
S
G

U37

D
D
D
D

SI4800BDY_SO8

C443

4.7U_0805_10V4Z

1

C559
10U_0805_10V4Z

2

1
2
3
4

R562 20K_0402_5%

C570

0.1U_0603_25V7K

1 2

+1.8VALW TO +1.8VS

1

S

2

S

3

S

4

G

C632

0.1U_0603_25V7K

1 2

5VS_GATE

12

1

C447

4.7U_0805_10V4Z

2

1 2

1

C562
1U_0805_25V4Z

2

12

R563

60.4K_0402_1%

R500

1M_0402_1%@

1

C446
1U_0805_25V4Z

2

D

S

5VS_GATE

R508

100K_0402_5%

1 2

13

2

G

Q29
2N7002_SOT23

+1.8VS

+VSB

SUSP

12/30 Change R563 to 60.4K

+1.8VALW TO +1.8V

+1.8VALW

U3

8
7
6
5

1

C119
10U_0805_10V4Z

2

1

S

D

2

S

D

3

S

D

4

G

D

SI4856ADY-T1-E3_SO8

1 2

12/30 Change U3 to SI4856ADY

+5VALW TO +5VS

+5VALW

1

2

8
7
6
5

C143

4.7U_0805_10V4Z

+5VS

U7

1

S

D

2

S

D

3

S

D

4

G

D

SI4800BDY_SO8

1 2

2006/2/22 Add C658 0.1uF

2006/4/13 modify package for lead-free part

1

C121
1U_0805_25V4Z

2

SYSON_ALW

C359

0.1U_0603_25V7K

1

C166

4.7U_0805_10V4Z

2

5VS_GATE

C658

0.1U_0603_25V7K

12

R288

+1.8V

1

C122
10U_0805_10V4Z

2

1M_0402_1%@

1

C165
1U_0805_25V4Z

2

R289

100K_0402_5%

1 2

13

D

Q18

S

2N7002_SOT23

2

G

SYSON#

+VSB

+1.8V

1 2
13

D

S

1 2
13

D

S

R224
470_0402_5%

2

G

Q14

2N7002_SOT23

R26
470_0402_5%

SYSON#

2

G

Q6

2N7002_SOT23

+1.8VS

1 2
13

D

S

R270
470_0402_5%

2

G

Q15

2N7002_SOT23

SUSP(46)

SUSP#(28,30,34)

R586
100K_0402_5%

SUSP

SUSP

+5VS+3VS

R181

470_0402_5%

1 2
13

D

SUSPSUSP

2

G

Q10

S

2N7002_SOT23

+5VALW

R167
10K_0402_5%

1 2

13

D

2

G

12

Q12

S

2N7002_SOT23

12/22 Added

+5VALW

Near PU12Near PU8

2

G

Q5

2N7002_SOT23

R31
10K_0402_5%

1 2

13

D

S

+0.9V

1 2
13

D

Q34

S

R587
470_0402_5%

2

G

2N7002_SOT23

R604
470_0402_5%

1 2
13

D

Q36

S

4 4

SYSON#

2

G

2N7002_SOT23 @

@

+1.5VS+2.5VS

1 2
13

D

Q35

S

R588
470_0402_5%

SUSPSUSP

2

G

2N7002_SOT23

SYSON(28,34)

SYSON#(46)

R589
100K_0402_5%

SYSON

SYSON#

12

12/22 Change Q5,Q12 to 2N7002

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/09 2006/03/08

C

Compal Secret Data

Deciphered Date

Compal Electronics. inc.

Title

SCHEMATIC, M/B LA-3121P

Size Document Number Rev

B

401411

Date: Sheet

星期四

11, 2006

D

五月

41 51,

E

D

of

A

PJP1

SINGA_2DC-G756-I06

1

2

G
G

1 1

3

ADPIN VIN

12

PC1

560P_0402_50V7K

PL1

FBMA-L18-453215-900LMA90T_1812

1 2

12

PC2

12P_0402_50V8J

PC3

VIN

12

PC4

12P_0402_50V8J

12

B

560P_0402_50V7K

RLZ24B_LL34

PD1

12

12

PR1
10_1206_5%

VIN

PD2

12

RLS4148_LLDS2

C

PR2

1K_1206_5%

1 2

PR3

1K_1206_5%

1 2

PR4

1K_1206_5%

1 2

PR7

1K_1206_5%

1 2

D

PQ1

12

PR6

TP0610K_SOT23

100K_0402_5%

13

2

B+

12

PR5

100K_0402_5%

PD3

PD4

2 2

BATT+

RB751V-40TE17_SOD323-2

51ON#(37)

3.3V

1 2

560_0603_5%

PR17

3 3

+CHGRTC

PR16

1 2

560_0603_5%

CHGRTCP

PR10

100K_0402_5%

PR11

22K_0402_5%

1 2

RTCVREF

12

PC8

12

12

4.7U_0805_6.3V6K

12

PC5

0.22U_1206_25V7K

PU1

G920AT24U_SOT89

3

OUT

GND

1

PQ4

TP0610K_SOT23

2

IN

33_1206_5%

2

12

12

PR15
200_0805_5%

PC7
1U_0805_25V4Z

PR9

13

RLS4148_LLDS2

1 2
12

12

PC6

0.1U_0603_25V7K

VS

MAINPWON(8,43,45)

ACIN

Precharge detector
Min. typ. Max.

DTC115EUA_SC70

ACOFF(28,44)

VS

1

O

34K_0402_1%

PR12

2.2M_0402_5%

PU2A
LM393DR_SO8

8

P

+

G

4

PR20

VL

12

PR14

100K_0402_1%

PD5

2

ACON(44)

3

RB715F_SOT323

1

12

PC10

0.1U_0603_25V7K

RTCVREF

H-->L 14.589V 14.84V 15.243V
L-->H 15.562V 15.97V 16.388V

PQ2

-

13

2

12

3
2

12

12

PC11

1000P_0402_50V7K

32.3

12

PR22

@

66.5K_0402_1%

BATT ONLY

12

PR8

100K_0402_5%

13

2

12

PR18

191K_0402_1%

PRG++

PQ5

2N7002W T/R7 1N SOT-323

13

D

S

G

DTC115EUA_SC70

499K_0402_1%

2

PQ3

13

B+

PR19

PR21

47K_0402_5%

2

12

PR13
499K_0402_1%

12

12

PC9

12

PQ6
DTC115EUA_SC70

0.01U_0402_25V7K

PACIN (44,45)

+5VALW

Precharge detector
Min. typ. Max.

4 4

H-->L 6.138V 6.214V 6.359V
L-->H 7.196V 7.349V 7.505V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2005/05/09 2006/0926

Compal Secret Data

Deciphered Date

C

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3121P

401411

星期四

11, 2006

五月

D

42 51,

of

D

A

B+

B

C

D

PL2

1 2

1 1

FBMA-L11-322513-151LMA50T_1210

2 2

3 3

B+++

12

PC14

2200P_0402_50V7K

12

PC15

4.7U_1206_25V6K

+5VALWP

1

+

PC23

2

150U_D_6.3VM

PR34

@

PR36

5HG

PL3
10UH_SIL104R-100PF_4.4A_30%

1 2

1 2

10.2K_0402_1%

0_0402_5%

1 2

PQ7

8

G2

7

D1/S2/K

6

D1/S2/K

5

D1/S2/K

AO4916_SO8

VS

S1/A

PZD1

RLZ5.1B_LL34

1 2

+5V Iocp = 5.35A ~ 8.65A

1

D2

2

D2

3

G1

4

PC12

0.1U_0603_25V7K

1 2

0_0603_5%

1 2

PR37

47K_0402_5%

1 2

PR40

30.6

DL5

PR27

LX5

1 2

100K_0402_5%

DH5

12

PC24

0.047U_0603_16V7K

1 2

PR43

1 2

47K_0402_5%

PR23
0_0603_5%

BST5A

1 2

1 2

0_0402_5%

12

PC28

0.047U_0603_16V7K

PD6
CHP202UPT_SOT323-3

PC21

PR35
0_0402_5%

2VREF_1999

PR38

12

2

3

1

PR25

4.7_1206_5%

VL

PC19

1U_1206_25V7K

12

4.7U_0805_10V4Z

14

BST5

16

DH5

15

LX5

19

DL5

21

OUT5

9

FB5

1

N.C.

MAX8734AEEI+_QSOP28

6

SHDN#

4

ON5

3

ON3

12

SKIP#

8

REF

PC26

0.22U_0603_16V7K

B+++

12

12

18

LD05

23

GND

@

20

PU3

PR26

V+

PC27

12

4.7_1206_5%

PC22

12

0.1U_0603_25V7K

13

TON

LDO3

25

12

4.7U_0805_10V4Z

VL

1 2

17

ILIM3

VCC

ILIM5
BST3

OUT3

PGOOD

PRO#

10

1 2

PR24

47_0402_5%

12

DH3

DL3

LX3

FB3

PR41
0_0402_5%

12

2VREF_1999

PC20

1U_0805_16V7K

5

11
28

26
24
27
22

7
2

BST3BBST5B

PC16

0.1U_0603_25V7K

PR29

PR30

100K_0402_1%

1 2

PR32

1 2

499K_0402_1%

SPOK(45)

1 2

100K_0402_1%

PR33

1 2

499K_0402_1%

1 2

BST3A

PC13

0.1U_0603_25V7K

1 2

PR28
0_0603_5%

DH3

B+++

12

PC17

0_0603_5%

12

PC18

2200P_0402_50V7K

4.7U_1206_25V6K

PR31

1 2

DL3

PQ8

1

D2

2

D2

3

G1

4

S1/A

AO4916_SO8

3HG

LX3

D1/S2/K
D1/S2/K
D1/S2/K

8

G2

7
6
5

PL4

1 2

10UH_SIL104R-100PF_4.4A_30%

+3VALWP

PR42

0_0402_5%

PR39

@

1 2

3.57K_0402_1%

1 2

PC25

1

+

2

150U_D_6.3VM

+3.3V Iocp = 5.36A ~ 9.03A

Ipeak=4.5A
Imax=3.5AIpeak=4.5A

Imax=3.5A

MAINPWON (8,42,45)

12

PC29
1U_0603_16V6K

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2005/05/09 2006/09/26

Compal Secret Data

Deciphered Date

C

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3121P

11, 2006

五月

401411

D

星期四

43 51,

of

D

A

B

C

D

E

Charger

Iadp=0~3.25A(65W)

PQ9

AO4407_SO8

PQ13

2

13

ACOFF#

8
7

5

47K

47K

1 3

PQ16
DTC115EUA_SC70

PD11

RLS4148_LLDS2

1 2

PR61

22K_0402_5%

1 2

VIN

1 1

12

PR47

47K_0402_5%

DTA144EUA_SC70

2

13

D

PQ18

2

2 2

3 3

2N7002W T/R7 1N SOT-323

G

S

PACIN(42,45)

ACON(42)

P2

1
2
36

4

12

PC36

0.1U_0603_25V7K

PR51

150K_0402_5%

2

G

CP Point:

Iinput=(64.9K/74.9K)*(75/20)=3.249A

LI-4S:17.8V---BATT-OVP=1.9785

PQ10

AO4407_SO8

1
2
3 6

4

12

PR46
200K_0402_1%

PC38

1U_0603_10V6K
PR50

10K_0402_0.1%

12

12

PC40

PR55

0.1U_0402_16V7K

64.9K_0402_0.1%

13

D

PQ19
2N7002W T/R7 1N SOT-323

S

12

12

0.02_2512_1%

1
2

12

CSSP

6C/8C#(45)

12

PR54

15K_0402_1%

PC45

12

0.01U_0402_25V7K

PR62
0_0402_5%

1 2

100K_0402_5%

PR44

4
3

PQ15

SI2301BDS_SOT23

12

12

PR63

1 2

P3

8
7

5

PC34

0.1U_0603_25V7K

1SS355_SOD323

PD9

VIN

PC37

0.1U_0603_25V7K

12

12

1908LDO

12

IREF(28)

12

PR53

9.31K_0402_1%

24.9K_0402_1%

100K_0402_1%

FSTCHG(28)

PR58

PR59

BATT-OVP=0.111*BATT+

12

PC35

0.1U_0603_25V7K

CSSN

G

2

S

0_0402_5%

PR49

@

PR64

1 2

10K_0402_5%

B+

13

D

12

PC50

0.1U_0402_16V7K

FBMA-L18-453215-900LMA90T_1812

1 2

1

DCIN

17

CELLS

4

REF

3

CLS

12

REFIN

15

VCTL

13

ICTL

11

ACOK#

8

SHDN#

10

ACIN

9

ICHG

28

IINP

7

CCV

CCI

6

PR60

10K_0402_1%

1 2

12

12

PC48

0.01U_0402_25V7K

12

PC51

0.1U_0402_16V7K

PL5

PU4

MAX1908ETI+T_QFN28

CCS

GND

5

14

MAX1908-CCS

1 2

PC49

0.01U_0402_25V7K

12

PC30

PC31

4.7U_1206_25V6K

4.7U_1206_25V6K

27

CSSP

29

TP

26

CSSN

25

DHI

23

LX

21

DLO

24

BST

22

DLOV

2

LDO

19

CSIP

18

CSIN

16

BATT

PGND

20

12

charger_DHI

charger_LX

charger_DLO

charger_BST

charger_DLOV

1908LDO

12

PC32

0.1U_0603_25V7K

1U_0603_10V6K

1 2

BATT+

PC46

PC33

IREF=0.832*Icharge
IREF=0.73~3.3V

VS

PU5B

LM358ADR_SO8

2P4S:4800mAH/cell

0.8C=3.84A

4 4

OVP voltage :

8

5

P

+

7

0

6

-

G

4

BATT_OVP(28)

1

0

LI-3S :17.8V----BATT-OVP=1.9758V
BATT-OVP=0.111*BATT+

A

B

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/05/09 2006/09/26

Compal Secret Data

Deciphered Date

12

2200P_0402_50V7K

33_1206_5%

8

4

CHG_B+

5

4

5

4

PR56
0_0402_5%

1 2

PR57

12

VS

12

PU5A

3

P

+

2

-

G

LM358ADR_SO8

PQ11

AO4407_SO8

1
2
3 6

D8D7D6D

PQ12

S1S2S3G

SI4810BDY-T1-E3_SO8

D8D7D6D

12

PC39

@

1000P_0402_50V7K

PQ17

S1S2S3G

SI4810BDY-T1-E3_SO8

PC41

0.1U_0603_25V7K

1 2
12

PD10
1SS355_SOD323

PC47
1U_0805_25V4Z

1 2

PR48

1 2

CSIP

CSIN

10K_0402_1%

4

1 2

13

PL6

10U_LF919AS-100M-P3_4.5A_20%

8
7

5

PR45

47K_0402_1%

1 2

ACOFF#

PQ14
DTC115EUA_SC70

ACOFF

2

PR52

0.015_2512_1%

1
2

VIN

ACOFF (28,42)

4
3

12

12

PC43

PC42

4.7U_1206_25V6K

4.7U_1206_25V6K

BATT+

12

PC44

4.7U_1206_25V6K

Charge voltage

BATT+

12

PR65
845K_0603_1%

PC52

12

PR66
300K_0603_0.1%

0.01U_0402_25V7K

12

PR69
200K_0402_1%

D

511K_0402_1%

1 2

12

PC53

0.01U_0402_25V7K

Title

Size Docum ent Number Rev

B

Date: Sheet

4S CC-CV MODE : 16.8V

PR68

PQ20

13

D

2N7002W T/R7 1N SOT-323

2

G

S

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3121P

星期四 五月

401411

+3VALW

12

PR67

10K_0402_5%

PQ21

13

D

2N7002W T/R7 1N SOT-323

2

G

S

E

44 51, 11, 2006

6C/8C# (45)

D

of

A

PR70

100K_0402_5%

1 2

BATT++BATT+

PL7

FBMA-L18-453215-900LMA90T_1812

1 1

BATT+

12

1 2

PC54

0.01U_0402_25V7K

PC55

1000P_0402_50V7K

PJP2 battery connector

SMART
Battery:

1.GND

2.SMC

3.SMD

4.TS

5.B/I

2 2

6.ID

7.BATT+

SUYIN_200275MR007G161ZL

12

PJP2

7
6
5
4
3
2
1

BATT++

PR71

1K_0402_5%

PR78

1K_0402_5%

1 2

12

12

PR72

@

1K_0402_5%

100_0402_5%

+3VALWP

6C/8C# (44)

PR81

100_0402_5%

1 2

PR83

1 2

PR75

1K_0402_5%

1 2

PR79

6.49K_0402_1%

1 2

B

BATT_TEMP

BATT_TEMP (28)

+3VALWP

EC_SMB_DA1 (28,30)

EC_SMB_CK1 (28,30)

C

PC57

1000P_0402_50V7K

D

PH1 under CPU botten side :

CPU thermal protection at 90 degree C
Recovery at 70 degree C

PR74

9.76K_0402_1%

PH1

12

VL

12

PR77

82.5K_0603_1%

1 2

12

PC58

100K_0603_1%_TH11-4H104FT

12

1U_0805_16V7K

12

PC56

0.1U_0603_25V7K

TM_REF1

5
6

150K_0402_1%

12

PR82
150K_0402_1%

+

-

PR80

VS

442K_0603_1%

1 2

8

P

O

G

PU2B

LM393DR_SO8

4

12

PR76

7

VL

VL

PR73
150K_0402_1%

1 2

MAINPWON (8,42,43)

Vin Detector
Min. typ. Max.

PQ22

TP0610K_SOT23

B+

12

PR85

100K_0402_5%

PR88

13

D

2

G

S

22K_0402_5%

1 2

PQ23
2N7002W T/R7 1N SOT-323

VL

3 3

SPOK(43)

PR90
100K_0402_5%

PR93

1 2

0_0402_5%

1 2

PC63

@

0.1U_0402_16V7K

12

12

0.22U_1206_25V7K

PC59

13

12

2

+VSBP

PC60

0.1U_0603_25V7K

H-->L 16.976V 17.257V 17.728V
L-->H 17.430V 17.901V 18.384V

VIN

12

PR86

84.5K_0402_1%
PR91

22K_0402_5%

1 2

12

20K_0402_1%

12

PC61

1000P_0402_50V7K

12

PR92

PC62

0.1U_0603_25V7K

1M_0402_1%

1 2

3

+

2

-

PR95

10K_0402_5%

PR84

VS

8

PU6A

P

O

G

LM393DR_SO8

4

12

RTCVREF

1

PZD2

RLZ4.3B_LL34

VIN

PR87

12

10K_0402_5%

12

PR89

10K_0402_5%

1 2

12

PR94
10K_0402_5%

ACIN

PACIN

ACIN (19,28)

PACIN (42,44)

8

PU6B

5

P

+

7

O

6

-

G

LM393DR_SO8

4

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2005/05/09 2006/09/26

Compal Secret Data

Deciphered Date

C

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3121P

11, 2006

五月

401411

D

星期四

45 51,

of

D

5

4

3

2

1

+3VALW

1

PJP3

1

+1.8VALW

1

PJP4

PC65

2

G

1

2

2

12

JUMP_43X79

PR96

1K_0402_1%

13

D

PQ24

S

@

2N7002W T/R7 1N SOT-323

+1.8V

PR99

1K_0402_1%

PU7

VIN1VCNTL

2

12

12

12

PC69

0.1U_0402_16V7K

3
4

APL5331KAC-TRL_SO8

+0.9VP

12

PC70
22U_1206_10V6M

GND
VREF
VOUT

6
5

NC

7

NC

8

NC

9

TP

+3VALW

12

PC66
1U_0603_6.3V6M

+2.5VSP

PC68

22U_1206_10V6M

D D

10U_1206_25VAK

PR162

@

0_0402_5%

SYSON#(41)

C C

1 2

JUMP_43X79

2

2

PR100

200K_0402_1%

+5VALW

PC71

0.047U_0402_16V7K

13

D

S

RTCVREF

1 2

PC67

1U_0603_16V6K

12

PR98

60.4K_0402_1%

PQ25
2N7002W T/R7 1N SOT-323

2

G

1 2

PR163
0_0402_5%

SUSP (41)

1 2

PC64

4.7U_1206_25V6K

12

PR97

10_0603_1%

1 2

1 2

PC72

0.1U_0603_25V7K

CM8562IS_PSOP8

1

VIN

2

VFB

3

VTT

VTT4REFEN

PU8

9

8

PGND

7

AGND

6

VCCA

5

AGND

12

PJP5

2

+3VALWP +3VALW

+5VALWP

+1.2VP_HT

B B

+0.9VP

A A

5

JUMP_43X113

PJP7

2

JUMP_43X113

PJP10

2

JUMP_43X113

PJP12

2

JUMP_43X113

112

112

112

112

+5VALW

+1.2V_HT

+0.9V

+1.8VALWP

+2.5VSP

+1.5VSP

+VSBP +VSB

4

PJP6

2

JUMP_43X113

PJP8

2

JUMP_43X113

PJP11

2

JUMP_43X113

PJP14

2

JUMP_43X113

112

112

112

112

+1.8VALW

+2.5VS

+1.5VS

+1.5VSP

22U_1206_10V6M

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+1.8VALW

1

PJP13

1

JUMP_43X79

2

2

1 2

PC123

CM8562IS_PSOP8

1

VIN

2

VFB

3

VTT

VTT4REFEN

PU12

AGND

9

8

PGND

7

AGND

6

VCCA

5

2

4.7U_1206_25V6K

12

PC125

1 2

2005/05/09 2006/09/26

10_0603_1%

PR164

1 2

PC127

0.1U_0603_25V7K

Compal Secret Data

Deciphered Date

+5VALW

12

PC126

PR166

51K_0402_1%

0.047U_0402_16V7K

13

D

S

Title

Size Docum ent Number Rev

Custom

Date: Sheet

RTCVREF

1 2

PC124

1U_0603_16V6K

12

PR165

60.4K_0402_1%

PQ40
2N7002W T/R7 1N SOT-323

2

G

1 2

PR167
0_0402_5%

Compal Electronics, Inc.

SCHEMATIC , M/B LA-3121P

401411

星|, 11, 2006

薔五月

1

SUSP (41)

of

46 51

D

5

4

3

2

1

12

PL8

1 2

12

PR113

10.2K_0402_1%

12

PR117
10K_0402_1%

B+

+1.8VALWP

1

+

PC92

220U_D2_4VM_R15

2

D D

PC78

PC84

4.7U_0805_6.3V6K

DAP202U_SOT323

SI4800BDY-T1-E3_SO8

+1.2VP_HT

C C

220U_D2_4VM_R15

B B

PC91

1

+

2

PR108

PR116

1.8UH_SIL104R-1R8PF_9.5A_30%

12

12

PC93

3.48K_0402_1%

10K_0402_1%

0.01U_0402_25V7K

12

12

12

1 2

PR109

0_0402_5%

PR119

@

PL9

SI4810BDY-T1-E3_SO8

0_0402_5%

PQ27

PQ29

VLDT_EN_P(28)

5

D8D7D6D

S1S2S3G

4

5

D8D7D6D

S1S2S3G

4

PR114 10K_0402_1%

0.1U_0402_16V7K

1 2

12

10U_1206_25VAK

12

PC89

12

PC79

PD12

BST_1.2VSP

12

PR110

1.27K_0402_1%

1 2

VSE_1.2VSP

PC96

12

PC80

10U_1206_25VAK

10U_1206_25VAK

1

2

3

PC87

0.01U_0402_25V7K

PR106

0_0603_5%

1 2

DH_1.2VSP
LX_1.2VSP

ISE_1.2VSP
DL_1.2VSP

12

0.1U_0402_16V7K

12

PC81

2200P_0402_25V7K

PC85

0.1U_0603_25V7K

12

12

6

5
4

7
2

3

9

10

8

15
11

12

PR121

56.2K_0402_1%

51_1206_5%

PR104

12

SOFT1

BOOT1

UGATE1
PHASE1

ISL6227CAZ-T_SSOP28

ISEN1
LGATE1

PGND1

VOUT1
VSEN1
EN1
PG1

OCSET1

12

14

1

VIN

GND

PU10

+5VALW

PR105

2.2_0603_5%

1 2

28

SOFT2

VCC

BOOT2

UGATE2
PHASE2

ISEN2

LGATE2

PGND2

VOUT2
VSEN2

PG2/REF

OCSET2

DDR

13

EN2

12

PC86

2.2U_0805_10V6K

BST_1.8VP

PC88

0.01U_0402_25V7K

12

17

0_0603_5%

BST_1.8VP-1BST_1.2VSP-1

1 2

23

DH_1.8VP

24

LX_1.8VP

25

ISE_1.8VP

22

DL_1.8V

27

26

20

VSE_1.8VP

19
21
16

18

12

PR107

PR111

1.5K_0402_1%

1 2

PR120

56.2K_0402_1%

PC90

0.1U_0402_16V7K

12

12

PC95

0.1U_0402_16V7K

PR115

1 2

10K_0402_1%@

1 2

PR168

10K_0402_5%

ISL6227B+

5

PQ28

D8D7D6D

SI4800BDY-T1-E3_SO8

S1S2S3G

4

PL10

1.8UH_SIL104R-1R8PF_9.5A_30%

1 2

5

PQ30
SI4810BDY-T1-E3_SO8

D8D7D6D

S1S2S3G

4

+3VALW

+5VALW

PC82

12

PR112

0_0402_5%

12

FBMA-L11-322513-151LMA50T_1210

12

PC83

2200P_0402_25V7K

10U_1206_25VAK

12

PC94

0.01U_0402_25V7K

PR118

@

0_0402_5%

Ipeak=8.5A, Imax=6A

Ipeak=6.47A, Imax=6.47*0.7=4.53A
Iocpmin=7.79A

Iocpmin=8.76A
Iocpmax=13.46A

Iocpmax=11.83A

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/09 2006/09/26

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

2

Date: Sheet

SCHEMATIC, M/B LA-3121P

401411

星期四

, 11, 2006

五月

1

47 51

of

D

5

4

3

2

1

12

PR137

10_0402_5%

0_0402_5%

1 2

CPU_VCC_SENSE(8)

48 51,

B+

+CPU_CORE

PR146

D

of

3 5

241

5

D8D7D6D

PQ32

S1S2S3G

4

PR144 0_0402_5%

1 2

3 5

241

5

PQ38

FDS6676AS_SO8

4

PR160

1 2

0_0402_5%

CPU_B+

PQ31
SI7840DP-T1-E3_SO8

5

D8D7D6D

PQ33

S1S2S3G

4

FDS6676AS_SO8

PQ35
SI7840DP-T1-E3_SO8

FDS6676AS_SO8

5

PQ39

D8D7D6D

S1S2S3G

FDS6676AS_SO8

4

D8D7D6D

S1S2S3G

12

PR131

1 2

3.3_1206_5%

12

PC107

1000P_0603_50V7K

CPU_B+

12

PC114

PR156

3.3_1206_5%

1 2

12

PC120

1000P_0603_50V7K

2

PL11

FBMA-L18-453215-900LMA90T_1812

1 2

12

12

PC98

PC97

4.7U_1206_25V6K

0.36UH_PCMC104T-R36MN1R17_30A_20%

PD13

2 1

SKS30-04AT_TSMA

12

PC115

4.7U_1206_25V6K

2200P_0402_50V7K

12

PC99

4.7U_1206_25V6K

0.01U_0402_25V7K

PL12

PC100

2200P_0402_50V7K

1 2

12

PR134

4.22K_0402_1%

PR136

2.1K_0402_1%

1 2

1 2

0.22U_0603_16V7K

12

12

PC117

PC116

4.7U_1206_25V6K

PD14

2 1

Title

Size Document Number Rev

Custom

Date: Sheet

PH2

10KB_0603_5%_ERTJ1VR103J

1 2

PC109

0.01U_0402_25V7K

SKS30-04AT_TSMA

0.36UH_PCMC104T-R36MN1R17_30A_20%

1 2

PR157

4.22K_0402_1%

1 2

PR159

2.1K_0402_1%

1 2

PC122

0.22U_0603_16V7K

1 2

CSP2

Compal Electronics, Inc.

SCHEMATIC, M/ B LA-3121P

星期四

11, 2006

五月

1

+

PC101

2

PL13

PH3

10KB_0603_5%_ERTJ1VR103J

1 2

401411

1

100U_25V_M

+5VS

+3VS

12

D D

PR123

10K_0402_5%

@

VID0(8)
VID1(8)
VID2(8)
VID3(8)
VID4(8)
VID5(8)

VGATE(28)

+3VS

C C

VR_ON

8)

PR138

0_0402_5%

1 2

POUT(28)

1 2

PC112

0.1U_0402_16V7K

MAX8774_REF

1 2

PR148

31.6K_0402_1%

B B

PSI#(8)

FDV301N_NL 1N SOT23-3

A A

PR149

169K_0603_1%

2

G

2

PQ37

5

200K_0402_1%

PR139

@

1 2

100K_0402_5%

1 2

CPU_B+

12

PQ34

13

D

S

2N7002W T/R7 1N SOT-323

PR154

13

PR135 100K_0402_1%

PR145 10K_0402_1%

1 2

200K_0402_1%

12

12

PR124 0_0402_5%

12

PR125 0_0402_5%

12

PR127 0_0402_5%

12

PR129 0_0402_5%

12

PR130 0_0402_5%

1 2

+3VS

PR152

2

G

12

12

13

D

S

PR132 0_0402_5%
PR133 0_0402_5%

1 2

PR147

200K_0402_1%

PR140 71.5K_0402_1%

1 2

PC113 0.1U_0603_16V7K

PQ36
2N7002W T/R7 1N SOT-323

PR122 10_0402_5%

12

PC103

2.2U_0603_10V6K

1 2

MAX8774_VCC

J1 SHORT PADS

1 2

For EC ATE

MAX8774_VCC

12

150P_0402_50V8J

MAX8774_REF

PR150

0_0402_5%

PC110

12

4

19
31
32
33
34
35
36

1
17
37
38

6

12

8

3
10

7

2

4
39

4700P_0603_50V7K

VCC
D0
D1
D2

PU11

D3

MAX8774GTL+_TQFN40

D4
D5
PWRGD
PHASEGD
TWO-PH
SHDN#
TIME
CCV
POUT
REF
TON
OFS
VRHOT#
SKIP#

EP

41

PC118

PR158

10_0402_5%

PC102

1 2

2.2U_0603_6.3V6K

25

VDD

THRM

BST1

DH1

DL1

PGND1

CSP1
CSN1

GND

BST2

DH2

DL2

PGND2

CSP2
CSN2

LX1

CCI

LX2

5
30
29
28
26
27
16
15
18
40

IC

11

FB

9
20
21
22
24
23
13
14

PR126

0_0603_5%

1 2

DH1
LX1
DL1

AGND

PR141

2K_0603_1%

FB

1 2

1 2

PC111 470P_0402_50V8J

DH2
LX2
DL2

CSP2

GNDS

12

12

12

PR153
100_0402_1%

12

CPU_VSS_SENSE(8)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

PC105

0.01U_0402_25V7K

PC108

1 2

12

0.22U_0603_16V7K

1 2

PR151

0_0603_5%

1 2

PR128

0_0603_5%

1 2

PR142

100_0402_1%

12

PC106

@

4700P_0402_25V7K

PC104

4700P_0402_25V7K

1 2

PR143 20K_0402_1%

12

0.22U_0603_16V7K

PR155
0_0603_5%

1 2

PC121

@

4700P_0402_25V7K

PC119

1 2

2005/05/09 2006/09/26

3

Compal Secret Data

Deciphered Date

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 1

for PWR

Reason for change Rev. PG# Modify List VER PhaseFixed IssueItem

D D

1

Schematic update.

Because schematic update, we don't need this two parts.

0.1 46

Delete PQ24 SB000005M10.

0.1

EVT

2

3
4

5

6

C C

7

8

9

10

11

B B

12

13

14

Schematic update.

BOM error

BOM error BOM error 48 Change PQ37 from SB503010004 to SB503010010

MOSFET thermal issue

BOM error

BOM error BOM error 47 Change PR121 from SD000001500 to SD000001580.

BOM error BOM error 48 Change PR149 from SD014169300 to SD014169380.

BOM error BOM error 44 Change PR55 from SD034100380 to SD034100280.

BOM error BOM error

BOM error BOM error 48 Change PR148 from SD034316200 to SD034316280.

BOM error

BOM error BOM error

High limit issue.

Because schematic update, we don't need this two parts.

0.1

0.1

0.1

Because we need to reduce MOSFET teperature of
high side mos. 48

BOM error 42

0.1

0.1

0.1

0.1

0.1

0.1

0.1

BOM error

0.1

0.1

Because the high is limited, we need to reduce space.

0.1

46

44

Change PQ31 and PQ35 from SB562940000 to SB578400080.

Change PL1,PL5,PL7 and PL11 form SM010018210 to

44

44

46

Delete PR162 SD028000080.

Change PQ15 from SB923010010 to SB923010020.BOM error

SM010020720.

Change PR50 from SD034576280 to SD034140280.

Change PC52,PC53,PC54,PC87,PC88,PC93 and PC94 from

SE075103Z00 to SE075103K80.

Change PC70 from SE153106K80 to SE116226M80.

Change PC101 from SF22004M210 to SF10004M080.48

0.1

0.1

0.1

0.1

0.1

0.1

0.1

0.1

0.1

0.1

0.1

0.1

0.1

EVT

EVT

EVT

EVT

EVT

EVT

EVT

EVT

EVT

EVT

EVT

EVT

EVT

15

16

17

18

A A

BOM error BOM error 48

Power sequence adjust. Power sequence adjust.

Power sequence adjust. Power sequence adjust.

BOM cost issue. BOM cost issue.

5

4

0.1

0.1 47

0.1 47

0.1 42

3

Add PR137 and PR158 SD028100A80.

Add PR168 SD034100280.

Delete PR115 SD034100280.

Change PQ5,PQ18,PQ19,PQ20,PQ21,PQ23,PQ25,PQ34,PQ36,PQ40
from SB000005M10 to SB000006800.

Title

Size Document Number Rev

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3121P

401411

薔五月

0.1 EVT

0.1

0.1

EVT

EVT

0.1 EVT

1

D

of

49 51星|, 11, 2006

5

4

3

2

1

Version change list (P.I.R. List) Page 2 of 2

for PWR

Reason for change Rev. PG# Modify List VER PhaseFixed IssueItem

D D

1

Increase changer accuracy to meet customer request.Charger accuracy issue. 0.2 44 Change PR44 from SE000001E00 to SE000001F00.

0.1

EVT

2

3
4

5

6

C C

7

8

9

10

11

B B

12

13

Charger accuracy issue. Increase changer accuracy to meet customer request. 0.2 44 Change PR50 form SD034140280 to SD000008B00.

Charger accuracy issue. Increase changer accuracy to meet customer request. 0.2 44 Change PR55 from SD034100280 to SD00000CL80.

Improve IC risk. 0.2 44Improve IC risk. Change PR60 from SD034100180 to SD034100280.

Improve OCP point. Improve OCP point. 0.3 43 Change PR29 and PR30 from SD034200380 to SD034100380

Improve OCP point. Improve OCP point. 0.3 47 Change PR120 from SD034499280 to SD000001580.

Improve ripple voltage. Improve ripple voltage. 0.4 46 Change PC68 and PC125 from SE142475K80 to SE116226M80.

Incresr +1.2VP_HT voltage. Incresr +1.2VP_HT voltage. 0.4 47 Change PR108 from SD034340180 to SH034348180.

Incresr +1.8VALWP voltage. Incresr +1.8VALWP voltage. 0.4 47 Change PR113 from SD034100280 to SD028102280.

Improve thermal issue. Improve thermal issue. 0.4 48

Improve thermal issue. Improve thermal issue. 0.4 48 Change PL12, PL13 from SH12056BM00 to SH000005680.

Improve +CPU_CORE OCP point. Improve +CPU_CORE OCP point. 0.4 48 Change PR134, PR157 from SD034150280 to SD034422180

Improve +CPU_CORE OCP point. Improve +CPU_CORE OCP point. 0.4 48 Change PR136 and PR159 from SD034150280 to SH034210180.

Change PQ32, PQ33, 38, PQ39 from SB000003W00 to

SB578320010

0.1

0.1

0.1

0.1

0.1

0.2

0.2

0.2

0.2

0.2

0.2

0.2

EVT

EVT

EVT

EVT

EVT

DVT

DVT

DVT

DVT

DVT

DVT

DVT

14

15

16

Improve +CPU_CORE OCP point. Improve +CPU_CORE OCP point. 0.4 48 Change PC109 and PC122 from SE042333K80 to SE026224K80

Improve CPU load line Improve CPU load line 0.4 48 Change PR141 from SD014255180 to SD014200180

Improve CPU load line Improve CPU load line 0.4 48 Change PR142 and PR153 from SD034100A80 to SD034100080.

0.2 DVT

0.2 DVT

0.2 DVT

17

18

A A

Title

Size Document Number Rev

5

4

3

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3121P

401411

薔五月

D

of

50 51星|, 11, 2006

1

5

4

3

2

1

Page 1 of 2 for RD Modify

PG# Modify List VER PhaseFixed IssueItem

D D

1

2

3

4

5

6

7

8

C C

9

10

11

12

13

14

15

B B

16

17

18

19

20

ATI Recommand. 13 Change R376 82.5 ohm to 100 ohm.

TV-OUT .

阻抗匹配

PCI_R

解決

Fixed USB2.0 EYE Diagram . 19

SB_INT_FLASH_SEL# E改為C.

增加

¹w .

Sometimes run S3 test program will interrupt .

改

改善 訊號品

減少

Add Camera Connect. Add R605,C657,JP35

Bluetooth 加 chock. Add L65

For EMI request Add C330

JP25 5-in-1 connector Spec update (Pin18 from NC to SD-GND)

Modify Package for Lead-free part

Reserve

for solve MS d etect issue

ST# .

漏電問題

可以控制

解M AC , LED .

插 電源 會閃一下的問題

+1.5VS, +2.5VS, +0

留

?+2.5V_LAN Power.



LAN 

Speaker

訊號增益 預留

?

.9V .

放電線路

().

14

Increase R590,R591,R592 150 ohm pull down resister.

18 Change U15,U16 voltage source +3VS to +3VALW.

Change R164 11.8K ohm to 11.3K ohm.

24IMPROVE TV-OUT SIGNAL QUALITY. Change C417,C418,C419,C425,C428,C430 to 220P.

Add R594.28

Add R586,R589,Q5,Q12 change to 2N7002.41

41 Add R587,Q34(+2.5VS),R588,Q35(+1.5VS),R604,Q36(+0.9V).

41

Add C658 0.1uF

37

Change R100 to 47K(Ori : 100K)

26

C281 change to 10uF

27

Change R387,R390,R391,R395,C494,C500 placement to near
Transformer.

39

Add R606(0 ohm),R607(0 ohm),R608(47K ),R609(47K未上 ) 未上

31

38

15

33

Add R610

41

Modify C658 package from 0402 to 0603

28

Add R611, R612, EC_Pin-100

33

Remove C197

0.2

0.2

0.2

0.2

0.2

0.2

DVT
DVT

DVT

DVT

DVT

DVT

0.2 DVT

0.2 DVT

0.3 PVT

0.3

0.3

0.3

0.3

PVT

PVT

PVT

PVT

0.3 PVT

0.3 PVT

0.4

0.4

PVT2

PVT2

PVT20.4

1.0 MP

1.0 MP

A A

Security Classification

Issued Date

THIS SHEET OF ENG INEE RIN G DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY O R DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/05/09 2006/10/10

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-3121P

Size Document Number R ev

Custom

401411

Date: Sheet

星期四 五

11, 2006

2

月

51 51,

1

D

of