COMPAL LA-3091P Schematics

Page 1
5
4
COMPAL CONFIDENTIAL
3
2
1
D D
COMPAL P/N :
MODEL NAME :
PCB NO : Revision :
C C
LA-3091P
1.0
Biathlon (IBM 15R) HEL00
IBM 15R Schematics Document
uFCBGA/uFCPGA Mobile Dothan Alviso 915+ ICH6-M
2 Channel DDR2
B B
2005-12-20
REV : 1.0
SW LED/B LS-3093P
M/B LA-3091P
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
2005/03/01 2006/03/01
Deciphered Date
Title
Bithlon LA3091 Schematic
Size Document Number Rev
LA-3091 1.0
Custom
2
Date: Sheet
TP/B LS-3094P
Tuesday, Janua ry 10, 2006
1
LED/B LS-3092P
144
of
Page 2
5
4
3
2
1
Compal confidential
Block Diagram
Dothan
FAN
+12VALW +5VALW
D D
+3V
page 33
Thermal(CPU)
ADM1032ARZ
+3VS
page 5
+VCCP (1.05V) +VCC_CORE +3V +3VS
uFCPGA CPU
page 6,7,8
Clock Generator
ICS954226AG
+3VS
page 17
Memory
HA#(3..31)
LVDS Conn
B+
CRT Conn
+3VS +5VS
TV-OUT
+2.5VS
C C
IDSEL:AD18 (PIRQG,H#,GNT3#,REQ3#)
page 15,16
Internal GM
Alviso Intel 915 GM GMCH-M
page 8,9,10,11,12
Mini PCI Conn
+3VS +3V +5VS
IDSEL:AD16 (PIRQE#,GNT2#,REQ2#)
VIA6311S 1394
+3VS
B B
page 26
page 27
IDSEL:AD20 (PIRQA,B#,GNT1#,REQ1#),SIRQ
CardBus Controller
ENE CB714
+3VS +CBS_VCC
page 25
PCI BUS
3.3V 33MHz
IDSEL:AD17 (PIRQF#,GNT0#,REQ0#)
RTL 8100CL/100
+3VALW
page 23
System Bus
400 / 533MHz
1257 FC-BGA
DMI
1.5V 100MHz
+3VS +3V +1.5VS +1.5V +2.5VS
HD#(0..63)
+1.5VS +1.8V +VCCP +3VS +2.5VS
ICH6
609 BGA
page 18,19,20,21
BUS(DDR2) Dual Channel
1.8V 266MHz
Channel A
1.8V 266MHz
Channel B
AC97'
ATA100
Parallel ATA
+5VS
3.3V 24.576MHz
page 22
SO-DIMM X 1
BANK 0, 1
+0.9VS +1.8V
SO-DIMM X 1
BANK 2, 3
+0.9VS +1.8V
AC97 CODEC
+3VS +5VS
page 13
page 14
MDC
+5VS +3VS +3V
RTL 250
Cable
page 28
RJ11
page 36
HeadPhone & MIC Conn
+5VAMP
page 29
LED/ BD
+5VALW +3VALW
SW LED/ BD
+3VALW +3VS
T/P BD
+5VS
LS-3092
page 32
LS-3093
page 32
LS-3094
page 32
POWER Circuit
IDE
1394 CONN.
page 26
SDIO CONN.
PCMCIA Slot 0
+CBS_VCC +CBS_VPP
page 25page 25
Transformer
& RJ45
page 24
LPC BUS
3.3V 33MHz
USB2.0
48MHz / 480Mb
USBPORT 0 USBPORT 1
X BUS
SST39VF040
A A
5
+3VALW
page 32
Touch Pad
+5VS
4
+5VALW +3VALW +3VS
page 32
KB910L
page 31
Int.KBD
page 32
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
http://hobi-elektronika.net
USBPORT 2 USBPORT 3 USBPORT 4 USBPORT 5 USBPORT 6 USBPORT 7
3
CD-ROM
+5VCD
page 22
JUSBP2
BT JUSBP1 JUSBP1 JUSBP3
2005/03/01 2006/03/01
+5VS
page 34
page 33
page 34
page 34
page 34
Deciphered Date
AMP & INT. Speaker
page 29
2
INT. MIC Conn
+AUD_VREF
page 29
Custom
Title
Functional Block
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
Date: Sheet
1
of
244
Page 3
5
I2C / SMBUS ADDRESSING
4
3
2
1
External PCI Devices
LAN
D D
CARD BUS Cardreader 1394 Wireless LAN(MINI PCI)
@ Depop
AD17 AD20
AD16 2 AD18
0 1
3
F A B E G,H
State
S0
S1
S3
S5 S4/AC
IDSEL # PIRQREQ/GNT #DEVICE
Signal
+12VALW
+5VALW +3VALW
+12V
+5V +3V
+1.8V
ON
ON ON
ON ON ON
ON ON
ON OFF
+CPU_CORE +VCCP +5VS
+3VS +2.5VS +1.8VS +1.25VS +1.5VS
OFF
OFF
1@ IBM 15R (UMA) 2@ (Discrete)
C C
S5 S4/AC don't exist
Ceramic Capacitor Spec Guide:
Temperature Characteristics:
Symbol
0
CODE
Z5U
8
NP0 SH
H
UK
UJ
9
C0G
I
1
Z5V
A
J
SL
OFF OFF OFF
2
Z5P
B
BJ
3
Y5U
C
CH
4
5
Y5V Y5P
E
D
CK
CJ
X5R
7
6
X7R
F
G
SJ
EVT-Build
DVT-Build
PVT-Build
MP-Build
SCHEMATICS VERSION LIST
VERSION ISSUE DATE REMARK
0.1
0.2
Power Managment table
PCB Rev
0.1
0.2
Data
EVT-Build
DVT-Build
PVT-Build
MP-Build
Tolerance:
CODE
A
+-0.05PF
B B
Symbol
B
+-0.1PF
C
+-0.25PF
D
+-0.5PF +-1PF
F
+-2%
H
G
+-3%
J
+-5%
M
+-20%
N
+-30%
+100,-0%
+30,-10%
V
+20,-10%
+40,-20%
KQ
+-10%
X
Z
+80,-20%
P
SMBUS Control Table
SOURCE
SMB_EC_CK1 SMB_EC_DA1
SMB_EC_CK2
A A
SMB_EC_DA2
ICH_SMBCLK ICH_SMBDATA
LCD_CLK LCD_DAT
KB910L
PU +5VALW
KB910L
PU +5VALW
ICH6-M
PU +3VALW PU +3VS
Alviso GM-GP
PU +2.5VS PU +3VS
5
BATT
SERIAL SENSOR EEPROM
THERMAL CPU
(ADM1032)
Intel PCI WLAN
SO-DIMM1 CLK CHIP SO-DIMM2
4
LCD
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
http://hobi-elektronika.net
3
2005/03/01 2006/03/01
Deciphered Date
2
Title
Design Note
Size Document Number Rev
LA-3091 1.0
Custom
Tuesday, Janua ry 10, 2006
Date: Sheet
1
of
344
Page 4
5
ACIN
4
3
2
1
D D
+3/5/12VALW
32ms
ON/OFF#
EC_ON#
8.5/2.44/3.792ms
PWRBTN_OUT#
SYSON
+1.8/3/5/12V
C C
RSMRST#
t<=10 ms
112ms
8.4ms
3V(370us)5V (450us) 1.8V(1.3ms)
164us
t=100 ms
SLP_S3/4/5#
SUSP#
+1.25/1.5/1.8/3/5VS
+VCCP
VR_ON#
1.25VS(140us) 1.5VS(2.8ms) 3VS(7.44ms) 5VS(11.3ms) 1.8VS(5.48ms)
216ms
t>0
210us 1.3ms PGD
9.2ms
CPU_VID
B B
+CPU_CORE
Vgate
ICHPWRGD
PCIRST/PLTRST#
CPU_RST#
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
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4
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3
2005/03/01 2006/03/01
960us
1.820ms
Deciphered Date
t<110 ms
99ms
2
2<t<3 RTCCLK
1.036ms
61us
Custom
Title
Power Rail
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
Date: Sheet
1
of
444
Page 5
5
4
3
2
1
H_A#[3..31]8
D D
H_REQ#[0..4]8
CLK_ITP_R# CLK_ITP_R
C C
B B
A A
Add pullup s fo r PWRGOOD and THERMTRIP per INTEL
+VCCP
R458 200_0402_5%
TEST2
R530 1K_0402_5%@
TEST1
R464 1K_0402_5%@
1 2
1 2 1 2
CLK_ITP17 CLK_ITP#17
H_PWRGOOD
R110 0_0402_5%@
1 2 1 2
R112 0_0402_5%@
+VCCP
CLK_ITP CLK_ITP#
R78 56_0402_5%
1 2
R111 0_0402_5%@ R109 0_0402_5%@
CLK_CPU_BCLK17 CLK_CPU_BCLK#17
H_RS#[0..2]8
H_PWRGOOD19 H_CPUSLP#8,19
H_THERMTRIP#8,19
H_ADSTB#08 H_ADSTB#18
1 2 1 2
H_ADS#8 H_BNR#8 H_BPRI#8 H_BR0#8 H_DEFER#8 H_DRDY#8 H_HIT#8 H_HITM#8
H_LOCK#8 H_RESET#8
H_TRDY#8
H_DBSY#8 H_DPSLP#19 H_DPRSLP#19 H_DPWR#8
T5 PAD T39 PAD
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_ADSTB#0 H_ADSTB#1
CPU_CK_ITP CPU_CK_ITP#
CLK_CPU_BCLK CLK_CPU_BCLK#
H_ADS# H_BNR# H_BPRI# H_BR0# H_DEFER# H_DRDY# H_HIT# H_HITM# H_IERR# H_LOCK# H_RESET#
H_RS#0 H_RS#1 H_RS#2 H_TRDY#
ITP_BPM#0 ITP_BPM#1 ITP_BPM#2 ITP_BPM#3
ITP_DBRESET# H_DBSY# H_DPSLP# H_DPRSLP#
ITP_BPM#4 ITP_BPM#5 H_PROCHOT#
H_PWRGOOD H_CPUSLP# ITP_TCK ITP_TDI
ITP_TDO TEST1 TEST2
ITP_TMS
ITP_TRST#
H_THERMDA
H_THERMDC
H_THERMTRIP#
JCPU1A
P4
A3#
U4
A4#
V3
A5#
R3
A6#
V2
A7#
W1
A8#
T4
A9#
W2
A10#
Y4
A11#
Y1
A12#
U1
A13#
AA3
A14#
Y3
A15#
AA2
A16#
AF4
A17#
AC4
A18#
AC7
A19#
AC3
A20#
AD3
A21#
AE4
A22#
AD2
A23#
AB4
A24#
AC6
ADDR GROUP
A25#
AD5
A26#
AE2
A27#
AD6
A28#
AF3
A29#
AE1
A30#
AF1
A31#
R2
REQ0#
P3
REQ1#
T2
REQ2#
P1
REQ3#
T1
REQ4#
U3
ADSTB0#
AE5
ADSTB1#
A16
ITP_CLK0
A15
ITP_CLK1
B15
BCLK0
B14
BCLK1
N2
ADS#
L1
BNR#
J3
BPRI#
N4
BR0#
L4
DEFER#
H2
DRDY#
K3
HIT#
K4
HITM#
A4
IERR#
J2
LOCK#
B11
RESET#
H1
RS0#
K1
RS1#
L2
RS2#
M3
TRDY#
C8
BPM0#
B8
BPM1#
A9
BPM2#
C9
BPM3#
A7
DBR#
M2
DBSY#
B7
DPSLP#
G1
DPRSTP#
C19
DPWR#
A10
PRDY#
B10
PREQ#
B17
PROCHOT#
E4
PWRGOOD
A6
SLP#
A13
TCK
C12
TDI
A12
TDO
C5
TEST1
F23
TEST2
C11
TMS
B13
TRST#
B18
THERMDA
A18
THERMDC
C17
THERMTRIP#
TYCO_1612365-1_Dothan
Dothan
DATA GROUP
HOST CLK
CONTROL GROUP
MISC
THERMAL DIODE
LEGACY CPU
D10# D11# D12# D13# D14# D15# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63#
DINV0# DINV1# DINV2# DINV3#
DSTBN0# DSTBN1# DSTBN2# DSTBN3# DSTBP0# DSTBP1# DSTBP2# DSTBP3#
A20M# FERR#
IGNNE#
INIT# LINT0 LINT1
STPCLK#
SMI#
D0# D1# D2# D3# D4# D5# D6# D7# D8# D9#
A25 A22 B21 A24 B26 A21 B20 C20 B24 D24 E24 C26 B23 E23 C25 H23 G25 L23 M26 H24 F25 G24 J23 M23 J25 L26 N24 M25 H26 N25 K25 Y26 AA24 T25 U23 V23 R24 R26 R23 AA23 U26 V24 U25 V26 Y23 AA26 Y25 AB25 AC23 AB24 AC20 AC22 AC25 AD23 AE22 AF23 AD24 AF20 AE21 AD21 AF25 AF22 AF26
D25 J26 T24 AD20
C23 K24 W25 AE24 C22 L24 W24 AE25
C2 D3 A3 B5 D1 D4
C6 B4
H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3
H_A20M# H_FERR# H_IGNNE# H_INIT# H_INTR H_NMI
H_STPCLK# H_SMI#
H_D#0
A19
H_D#[0..63] 8
H_DINV#0 8 H_DINV#1 8 H_DINV#2 8 H_DINV#3 8
H_DSTBN#[0..3] 8
H_DSTBP#[0..3] 8
H_A20M# 19 H_FERR# 19 H_IGNNE# 19 H_INIT# 19 H_INTR 19 H_NMI 19
H_STPCLK# 19 H_SMI# 19
Place near JITP 0.5"
H_RESET#
ITP_TDO
Test pad as closed as posible
R74
22.6_0402_1%
1 2
R87
22.6_0402_1%
1 2
ITP_DBRESET# ITP_BPM#0 ITP_BPM#1 ITP_BPM#2 ITP_BPM#3 ITP_BPM#4 ITP_BPM#5 ITP_TCK CLK_ITP_R#
CLK_ITP_R
ITP_TRST# ITP_TMS ITP_TDI
T7PAD T6PAD T8PAD T10PAD T9PAD T12PAD T11PAD
T4PAD T17PAD
T42PAD T19PAD T15PAD
T16PAD T13PAD T14PAD
Check ITP connector.
CPU HOT
R123 56_0402_5%
+VCCP
12
12
R124 56_0402_5%
H_PROCHOT#
CPU Thermal Sensor
H_THERMDA
H_THERMDC
SMB_EC_CK215,27,31 SMB_EC_DA215,27,31
+VCCP
R561
@
47K_0402_5%
1 2
C526
0.68U_0603_10V6K
+VCCP
1
C141 2200P_0402_50V7K
2
SMB_EC_CK2 SMB_EC_DA2
+CPU_CORE
12
@
R494 75_0402_1%
1 2
H_THERMTRIP#
12
R762 47K_0402_5%
2
B
+3VS
C
2
B
E
U9
2
D+
3
D-
8
SCLK
7
SDATA
ADM1032ARMZ_RM8
1
C
Q39 2SC2411KT146_SC59
E
3
+3V
+VCCP
+VCCP
12
R132 1K_0402_5%
1
Q6 2SC2411KT146_SC59
3
0.1U_0603_25V7K
VDD1
ALERT#
THERM#
GND
MAINPWRON 36,38,41
1 2 1 2
or 39.4Ohm
ITP_DBRESET#
ITP_TDO
H_RESET# ITP_BPM#5
ITP_TMS
ITP_TDI
ITP_TRST#
ITP_TCK
1 2
R79 150_0402_5%
1 2
R90 54.9_0603_1% R76 54.9_0603_1% R745 56_0402_5%
1 2
R479 37.4_0402_1%
1 2
R85 150_0402_5%
1 2
R100 680_0402_5%
1 2
R106 27.4_0402_1%
PROCHOT# 31
+3VS
1
C132
2
1 6 4 5
12
R149 10K_0402_5%
This shall place near CPU
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
2005/03/01 2006/03/01
Deciphered Date
2
Custom
Title
Dothan(1/2)-GTL/ITP
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
Date: Sheet
1
of
544
Page 6
5
4
3
2
1
R470
@
54.9_0402_1%
R465
D D
CPU Voltage ID
VID042 VID142 VID242
C C
VID342 VID442 VID542
R433 0_0402_5% R434 0_0402_5% R435 0_0402_5% R436 0_0402_5% R437 0_0402_5% R438 0_0402_5%
12 12 12 12 12 12
+VCCP
12
12
12
12
@
R413
10K_0402_5%
@
R412
10K_0402_5%
@
R411
@
10K_0402_5%
R410
12
@
10K_0402_5%
R409
10K_0402_5%
+1.5VS
1
1
C516
C150
2
2
10U_1206_6.3V6M
0.01U_0402_16V7K
12
R408
@
10K_0402_5%
H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5
54.9_0402_1%
+CPU_CORE
PSI#42
+VCCP
R_A
12
B B
+V_CPU_GTLREF
12
R155 1K_0402_1%
R_B
R153 2K_0402_1%
Layout close CPU
Layout Note: 500 mil max length
20 mils
12
27.4_0402_1%
R156
5 mils
12
54.9_0402_1%
R157
20 mils
12
27.4_0402_1%
R416
5 mils
12
54.9_0402_1%
R417
Resistor placed within
0.5" of CPU pin.Trace should be at least 25 miles away from any other toggling signal.
+V_CPU_GTLREF
CPU_BSEL017 CPU_BSEL117
1 2 1 2
@
+VCCP
T3 PAD T2 PAD T20 PAD T31 PAD T29 PAD
VCCSENSE VSSSENSE
H_PSI# H_VID0
H_VID1 H_VID2 H_VID3 H_VID4 H_VID5
CPU_BSEL0 CPU_BSEL1
COMP0 COMP1 COMP2 COMP3
JCPU1B
AE7
VCCSENSE
AF6
VSSSENSE
F26
VCCA0
B1
VCCA1
N1
VCCA2
AC26
VCCA3
P23
VCCQ0
W4
VCCQ1
D10
VCCP
D12
VCCP
D14
VCCP
D16
VCCP
E11
VCCP
E13
VCCP
E15
VCCP
F10
VCCP
F12
VCCP
F14
VCCP
F16
VCCP
K6
VCCP
L5
VCCP
L21
VCCP
M6
VCCP
M22
VCCP
N5
VCCP
N21
VCCP
P6
VCCP
P22
VCCP
R5
VCCP
R21
VCCP
T6
VCCP
T22
VCCP
U21
VCCP
D6
VCC
D8
VCC
D18
VCC
D20
VCC
D22
VCC
E5
VCC
E7
VCC
E9
VCC
E17
VCC
E19
VCC
E21
VCC
F6
VCC
F8
VCC
F18
VCC
E1
PSI#
E2
VID0
F2
VID1
F3
VID2
G3
VID3
G4
VID4
H4
VID5
AD26
GTLREF
C16
BSEL0
C14
BSEL1
P25
COMP0
P26
COMP1
AB2
COMP2
AB1
COMP3
B2
RSVD
C3
RSVD
E26
RSVD
AF7
RSVD
AC1
RSVD
TYCO_1612365-1_Dothan
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
Dothan
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
POWER, GROUNG, RESERVED SIGNALS AND NC
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
A2 A5 A8 A11 A14 A17 A20 A23 A26 B3 B6 B9 B12 B16 B19 B22 B25 C1 C4 C7 C10 C13 C15 C18 C21 C24 D2 D5 D7 D9 D11 D13 D15 D17 D19 D21 D23 D26 E3 E6 E8 E10 E12 E14 E16 E18 E20 E22 E25 F1 F4 F5 F7 F9 F11 F13 F15 F17 F19 F21 F24 G2 G6 G22 G23 G26 H3 H5 H21 H25 J1 J4 J6 J22 J24 K2 K5 K21 K23 K26 L3 L6 L22 L25 M1
+CPU_CORE
JCPU1C
F20
VCC
F22
VCC
G5
VCC
G21
VCC
H6
VCC
H22
VCC
J5
VCC
J21
VCC
K22
VCC
U5
VCC
V6
VCC
V22
VCC
W5
VCC
W21
VCC
Y6
VCC
Y22
VCC
AA5
VCC
AA7
VCC
AA9
VCC
AA11
VCC
AA13
VCC
AA15
VCC
AA17
VCC
AA19
VCC
AA21
VCC
AB6
VCC
AB8
VCC
AB10
VCC
AB12
VCC
AB14
VCC
AB16
VCC
AB18
VCC
AB20
VCC
AB22
VCC
AC9
VCC
AC11
VCC
AC13
VCC
AC15
VCC
AC17
VCC
AC19
VCC
AD8
VCC
AD10
VCC
AD12
VCC
AD14
VCC
AD16
VCC
AD18
VCC
AE9
VCC
AE11
VCC
AE13
VCC
AE15
VCC
AE17
VCC
AE19
VCC
AF8
VCC
AF10
VCC
AF12
VCC
AF14
VCC
AF16
VCC
AF18
VCC
M4
VSS
M5
VSS
M21
VSS
M24
VSS
N3
VSS
N6
VSS
N22
VSS
N23
VSS
N26
VSS
P2
VSS
P5
VSS
P21
VSS
P24
VSS
R1
VSS
R4
VSS
R6
VSS
R22
VSS
R25
VSS
T3
VSS
T5
VSS
T21
VSS
T23
VSS
TYCO_1612365-1_Dothan
Dothan
POWER, GROUND
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
T26 U2 U6 U22 U24 V1 V4 V5 V21 V25 W3 W6 W22 W23 W26 Y2 Y5 Y21 Y24 AA1 AA4 AA6 AA8 AA10 AA12 AA14 AA16 AA18 AA20 AA22 AA25 AB3 AB5 AB7 AB9 AB11 AB13 AB15 AB17 AB19 AB21 AB23 AB26 AC2 AC5 AC8 AC10 AC12 AC14 AC16 AC18 AC21 AC24 AD1 AD4 AD7 AD9 AD11 AD13 AD15 AD17 AD19 AD22 AD25 AE3 AE6 AE8 AE10 AE12 AE14 AE16 AE18 AE20 AE23 AE26 AF2 AF5 AF9 AF11 AF13 AF15 AF17 AF19 AF21 AF24
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
2005/03/01 2006/03/01
Deciphered Date
2
Custom
Title
Dothan(2/2)-PWR/GND
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
Date: Sheet
1
of
644
Page 7
5
4
3
2
1
+CPU_CORE
1
C482 10U_0805_6.3V6M
D D
C C
2
+CPU_CORE
1
2
+CPU_CORE
1
2
+CPU_CORE
1
2
C430 10U_0805_6.3V6M
C100 10U_0805_6.3V6M
C512 10U_0805_6.3V6M
1
C483 10U_0805_6.3V6M
2
1
C421 10U_0805_6.3V6M
2
1
C105 10U_0805_6.3V6M
2
1
C507 10U_0805_6.3V6M
2
1
C460 10U_0805_6.3V6M
2
1
C415 10U_0805_6.3V6M
2
1
C109 10U_0805_6.3V6M
2
1
C502 10U_0805_6.3V6M
2
1
C446 10U_0805_6.3V6M
2
1
C416 10U_0805_6.3V6M
2
1
C114 10U_0805_6.3V6M
2
1
C469 10U_0805_6.3V6M
2
1
C431 10U_0805_6.3V6M
2
1
C480 10U_0805_6.3V6M
2
1
C91 10U_0805_6.3V6M
2
1
C442 10U_0805_6.3V6M
2
+CPU_CORE
1
2
+CPU_CORE
1
2
+CPU_CORE
1
2
C422 10U_0805_6.3V6M
C481 10U_0805_6.3V6M
C92 10U_0805_6.3V6M
1
C518 10U_0805_6.3V6M
2
1
C113 10U_0805_6.3V6M
2
1
C121 10U_0805_6.3V6M
2
10uF 1206 X5R -> 85 degree
1
C470 10U_0805_6.3V6M
2
1
C108 10U_0805_6.3V6M
2
1
C120 10U_0805_6.3V6M
2
1
C459 10U_0805_6.3V6M
2
1
C104 10U_0805_6.3V6M
2
1
C383 10U_0805_6.3V6M
2
X7R
High Frequence Decoupling
1
C445 10U_0805_6.3V6M
2
1
C99 10U_0805_6.3V6M
2
1
C522 10U_0805_6.3V6M
2
Near VCORE regulator.
+CPU_CORE
Vcc-core Decoupling SPCAP,Polymer
MLCC 0805 X5R
C,uF ESL,nH
ESR, mohm
3X330uF 9m ohm/3 3.5nH/4 35X10uF
5m ohm/35 0.6nH/35
C358
1
C378
+
2
1
C377
+
+
2
2
330U_D2_2.5VM_R9
330U_D2_2.5VM_R9
1
@
330U_D2_2.5VM_R9
330U_D2_2.5VM_R9
1
C357
+
2
ESR <= 3m ohm Capacitor > 880 uF
B B
+VCCP
1
C664
0.1U_0402_10V6K
2
+VCCP
1
+
C525 150U_D2_6.3VM_R15
2
A A
1
C665
0.1U_0402_10V6K
2
1
C498
0.1U_0402_10V6K
2
1
C666
0.1U_0402_10V6K
2
1
C499
0.1U_0402_10V6K
2
1
C667
0.1U_0402_10V6K
2
1
C504
0.1U_0402_10V6K
2
1
C668
0.1U_0402_10V6K
2
1
C500
0.1U_0402_10V6K
2
1
C669
0.1U_0402_10V6K
2
1
C503
0.1U_0402_10V6K
2
1
C670
0.1U_0402_10V6K
2
1
C463
0.1U_0402_10V6K
2
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
1
C671
0.1U_0402_10V6K
2
1
C441
0.1U_0402_10V6K
2
2005/03/01 2006/03/01
1
C672
0.1U_0402_10V6K
2
1
C424
0.1U_0402_10V6K
2
Deciphered Date
1
C673
0.1U_0402_10V6K
2
1
C450
0.1U_0402_10V6K
2
2
1
C398
0.1U_0402_10V6K
2
Custom
Title
Dothan Bypass
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
Date: Sheet
1
of
744
Page 8
5
4
3
2
1
Layout Guide will show these signals routed differentially.
DMI_TXN020
H_A#[3..31]5
D D
H_REQ#[0..4]5
C C
Layout Guide will show these signals routed differentially.
H_DSTBN#[0..3]5
H_DSTBP#[0..3]5
B B
H_RS#[0..2]5
H_CPUSLP#5,19
Note: "Do not install R418 for Dothan-A, Install R418 for Dothan-B"
A A
T1 PAD@
H_ADSTB#05 H_ADSTB#15
CLK_MCH_BCLK#17 CLK_MCH_BCLK17
H_DINV#05 H_DINV#15 H_DINV#25 H_DINV#35
H_RESET#5 H_ADS#5
H_TRDY#5 H_DPWR#5 H_DRDY#5 H_DEFER#5
@
T27 PAD
H_HITM#5 H_HIT#5 H_LOCK#5 H_BR0#5 H_BNR#5 H_BPRI#5 H_DBSY#5
R418 0_0402_5%
1 2
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
H_PCREQ# H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_ADSTB#0 H_ADSTB#1
H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3
H_RESET# H_ADS#
H_TRDY# H_DRDY#
H_DEFER# H_EDRDY# H_HITM# H_HIT# H_LOCK# H_BR0# H_BNR# H_BPRI# H_DBSY# H_R_CPUSLP# H_RS#0 H_RS#1 H_RS#2
H_R_CPUSLP#
U5A
G9
HA3#
Alviso
C9
HA4#
E9
HA5#
B7
HA6#
A10
HA7#
F9
HA8#
D8
HA9#
B10
HA10#
E10
HA11#
G10
HA12#
D9
HA13#
E11
HA14#
F10
HA15#
G11
HA16#
G13
HA17#
C10
HA18#
C11
HA19#
D11
HA20#
C12
HA21#
B13
HA22#
A12
HA23#
F12
HA24#
G12
HA25#
E12
HA26#
C13
HA27#
B11
HA28#
D13
HA29#
A13
HA30#
F13
HA31#
A11
HPCREQ#
A7
HREQ#0
D7
HREQ#1
B8
HREQ#2
C7
HREQ#3
A8
HREQ#4
B9
HADSTB#0
E13
HADSTB#1
AB1
HCLKN
AB2
HCLKP
G4
HDSTBN#0
K1
HDSTBN#1
R3
HDSTBN#2
V3
HDSTBN#3
G5
HDSTBP#0
K2
HDSTBP#1
R2
HDSTBP#2
W4
HDSTBP#3
H8
HDINV#0
K3
HDINV#1
T7
HDINV#2
U5
HDINV#3
H10
HCPURST#
F8
HADS#
B5
HTRDY#
G6
HDPWR#
F7
HDRDY#
E6
HDEFER#
F6
HEDRDY#
D6
HHITM#
D4
HHIT#
B3
HLOCK#
E7
HBREQ0#
A5
HBNR#
D5
HBPRI#
C6
HDBSY#
G8
HCPUSLP#
A4
HRS0#
C5
HRS1#
B4
HRS2#
ALVISO_BGA1257
Layout Note: H_XRCOMP & H_YRCOMP trace width and spacing is 10/20
HOST
HXRCOMP HXSCOMP HYRCOMP HYSCOMP
HXSWING HYSWING
HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8#
HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63#
HVREF
H_SWNG0
E4 E1 F4 H7 E2 F1 E3 D3 K7 F2 J7 J8 H6 F3 K8 H5 H1 H2 K5 K6 J4 G3 H3 J1 L5 K4 J5 P7 L7 J3 P5 L3 U7 V6 R6 R5 P3 T8 R7 R8 U8 R4 T4 T5 R1 T3 V8 U6 W6 U3 V5 W8 W7 U2 U1 Y5 Y2 V4 Y7 W1 W3 Y3 Y6 W2
J11 C1 C2 T1 L1 D1 P1
C362
0.1U_0402_16V4Z
H_VREF H_XRCOMP H_XSCOMP H_YRCOMP H_YSCOMP H_SWNG0 H_SWNG1
R397
1
R388
2
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
12
221_0603_1%
12
100_0402_1%
1 2
R44 24.9_0402_1%
1 2
R77 24.9_0402_1%
10/20 mils
H_SWNG1
1
2
C385
0.1U_0402_16V4Z
H_D#[0..63] 5
+SDREF_DIMM
+VCCP
12
R41
R66
54.9_0402_1%
54.9_0402_1%
+VCCP+VCCP
12
R67
221_0603_1%
12
R73
100_0603_1%
+1.8V
R835 1K_0402_5%
1 2
R836 1K_0402_5%
1 2
+1.8V
12
R489
80.6_0402_1%
12
+VCCP
12
R372
100_0402_1%
1
12
C379
R376
2
200_0402_1%
0.1U_0402_16V7K
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
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3
DMI_TXN120 DMI_TXN220 DMI_TXN320
DMI_TXP020 DMI_TXP120 DMI_TXP220 DMI_TXP320
DMI_RXN020 DMI_RXN120 DMI_RXN220 DMI_RXN320
DMI_RXP020 DMI_RXP120 DMI_RXP220 DMI_RXP320
DDR_CLK013 DDR_CLK113
DDR_CLK314 DDR_CLK414
DDR_CLK0#13 DDR_CLK1#13
DDR_CLK3#14 DDR_CLK4#14
DDR_CKE0_DIMMA13 DDR_CKE1_DIMMA13 DDR_CKE2_DIMMB14 DDR_CKE3_DIMMB14
DDR_SCS#013 DDR_SCS#113 DDR_SCS#214 DDR_SCS#314
@
T43 PAD
@
T44 PAD
M_ODT013 M_ODT113 M_ODT214 M_ODT314
1 2
R484 80.6_0402_1%
+SDREF_DIMM
CFG[2:0]
CFG5
CFG6
CFG7
CFG9
CFG[13:12] CFG16
(FSB Dynamic ODT)
CFG18 (VCC Select)
CFG19 (VTT Select)
2005/03/01 2006/03/01
DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3
DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3
DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3
DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3
DDR_CLK0 DDR_CLK1
DDR_CLK3 DDR_CLK4
DDR_CLK0# DDR_CLK1#
DDR_CLK3# DDR_CLK4#
DDR_CKE0_DIMMA DDR_CKE1_DIMMA DDR_CKE2_DIMMB DDR_CKE3_DIMMB
DDR_SCS#0 DDR_SCS#1 DDR_SCS#2 DDR_SCS#3
M_OCDOCMP0 M_OCDOCMP1
SMRCOMPN SMRCOMPP
1
1
C428
C419
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Refer to sheet 6 for FSB frequenc y select
Low = DMI x 2 High = DMI x 4 Low = DDR-II High = DDR-I Low = DT/Transportable CPU High = Mobile CPU Low = Reverse Lane High = Normal Operation
00 = Reserved 01 = XOR Mode Enabled 10 = All Z Mode Enabled 11 = Normal Operation (Default)
Low = Disabled High = Enabled Low = 1.05V (Default) High = 1.5V Low = 1.05V (Default) High = 1.2V
Deciphered Date
AA31 AB35 AC31 AD35
AA35 AB31 AC35
AA33 AB37 AC33 AD37
AA37 AB33 AC37
AM33 AE11
AJ34 AC10 AN33 AE10
AJ33 AD10 AP21
AM21 AH21 AK21
AN16 AM14 AH15 AG16
AF22 AF16 AP14
AL15 AM11 AN10
AK10 AK11 AF37
AE27 AE28
AF10
*
*
*
Y31
Y33
AL1
AF6
AK1
AF5
AD1
AF9
U5B
DMIRXN0 DMIRXN1 DMIRXN2 DMIRXN3
DMIRXP0 DMIRXP1 DMIRXP2 DMIRXP3
DMITXN0 DMITXN1 DMITXN2 DMITXN3
DMITXP0 DMITXP1 DMITXP2 DMITXP3
SM_CK0 SM_CK1 SM_CK2 SM_CK3 SM_CK4 SM_CK5
SM_CK0# SM_CK1# SM_CK2# SM_CK3# SM_CK4# SM_CK5#
SM_CKE0 SM_CKE1 SM_CKE2 SM_CKE3
SM_CS0# SM_CS1# SM_CS2# SM_CS3#
SM_OCDCOMP0 SM_OCDCOMP1 SM_ODT0 SM_ODT1 SM_ODT2 SM_ODT3
SMRCOMPN SMRCOMPP SMVREF0 SMVREF1 SMXSLEWIN SMXSLEWOUT SMYSLEWIN SMYSLEWOUT
ALVISO_BGA1257
* *
* *
2
DMIDDR MUXING
DREF_SSCLKP
CLK
DREF_SSCLKN
*
Alviso CFG[17:3] has internal pull-up
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8
CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20
RSVD21 RSVD22
CFG/RSVD
RSVD23 RSVD24 RSVD25 RSVD26 RSVD27
BM_BUSY#
EXT_TS0# EXT_TS1#
THRMTRIP#
PWROK
RSTIN#
PM
DREF_CLKN DREF_CLKP
NC10
NC
NC11
NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9
H13 G14 F16 F15 G15 E16 D17 J16 D15 E15 D14 E14 H12 C14 H15 J15 H14 G22 G23 D23 G25 G24 J17 A31 A30 D26 D25
J23 J21 H22 F5 AD30 AE29
A24 A23 D37 C37
AP37 AN37 AP36 AP2 AP1 AN1 B1 A2 B37 A36 A37
MCH_CLKSEL1 MCH_CLKSEL0
CFG5 CFG6 CFG7
CFG9
CFG12 CFG13
CFG16 CFG18
CFG19
PM_EXTTS#0 PM_EXTTS#1
PLTRST_R#
R384
10K_0402_5%@
R387 10K_0402_5%
MCH_CLKSEL1 17 MCH_CLKSEL0 17
1 2
R492 100_0402_1%
12
12
@
T25PAD T26PAD
CFG0
G16
CFG[17:3] have internal pull-up
CFG0
R367 10K_0402_5%
CFG6
R369 2.2K_0402_5%
CFG5
R370 2.2K_0402_5%@
CFG7
R368 2.2K_0402_5%@
CFG9
R394 2.2K_0402_5%@
CFG12
R374 2.2K_0402_5%@
CFG13
R375 2.2K_0402_5%@
CFG16
R430 2.2K_0402_5%@
CFG[19:18] have internal pull-down
3.5 k reserve for choose
CFG18 CFG19
Custom
Title
Alviso(1/5)-GTL/DMI/DDR-MUX
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
Date: Sheet
@ @
PM_BMBUSY# 20
PM_EXTTS#0
PM_EXTTS#1
1 2 1 2 1 2 1 2
1 2 1 2 1 2
R36 1K_0402_5%@ R37 1K_0402_5%@
1
H_THERMTRIP# 5,19 VGATE 17,20,42 PLTRST_MCH# 18
DREFCLK# 17 DREFCLK 17 SSC_DREFCLK 17 SSC_DREFCLK# 17
R366 10K_0402_5%
12
R365 10K_0402_5%
12
12
1 2 1 2
844
+2.5VS
+VCCP
+2.5VS
of
Page 9
5
D D
4
3
2
1
DDR_A_BS#013 DDR_A_BS#113 DDR_A_BS#213 DDR_A_DM[0..7]13
DDR_A_DQS[0..7]13
DDR_A_DQS#[0..7]13
C C
DDR_A_MA[0..13]13
DDR_A_CAS#13 DDR_A_RAS#13
@
T36 PAD
@
T35 PAD
DDR_A_WE#13
B B
DDR_A_BS#0 DDR_A_BS#1 DDR_A_BS#2
DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7
DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7
DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13
DDR_A_CAS#
DDR_A_RAS# TP_MA_RCVENIN# TP_MA_RCVENOUT#
DDR_A_WE#
AK15 AK16
AL21 AJ37
AP35
AL29
AP24
AK36 AP33 AN29 AP23
AM8 AM4
AK35 AP34 AN30 AN23
AN8 AM5 AH1
AL17 AP17 AP18 AM17 AN18 AM18
AL19 AP20 AM19
AL20 AM16 AN20 AM20 AM15
AN15 AP16 AF29 AF28 AP15
AP9 AP4 AJ2 AD3
AJ1 AE5
AE4
U5C
SA_BS0# SA_BS1# SA_BS2#
SA_DM0 SA_DM1 SA_DM2 SA_DM3 SA_DM4 SA_DM5 SA_DM6 SA_DM7
SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7
SA_DQS0# SA_DQS1# SA_DQS2# SA_DQS3# SA_DQS4# SA_DQS5# SA_DQS6# SA_DQS7#
SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8 SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13
SA_CAS# SA_RAS# SA_RCVENIN# SA_RCVENOUT# SA_WE#
ALVISO_BGA1257
SADQ0 SADQ1 SADQ2 SADQ3 SADQ4 SADQ5 SADQ6 SADQ7 SADQ8
SADQ9 SADQ10 SADQ11 SADQ12 SADQ13 SADQ14 SADQ15 SADQ16 SADQ17 SADQ18 SADQ19 SADQ20 SADQ21 SADQ22 SADQ23 SADQ24 SADQ25 SADQ26 SADQ27 SADQ28 SADQ29 SADQ30 SADQ31 SADQ32 SADQ33 SADQ34 SADQ35 SADQ36 SADQ37 SADQ38 SADQ39 SADQ40 SADQ41 SADQ42 SADQ43
DDR MEMORY SYSTEM A
SADQ44 SADQ45 SADQ46 SADQ47 SADQ48 SADQ49 SADQ50 SADQ51 SADQ52 SADQ53 SADQ54 SADQ55 SADQ56 SADQ57 SADQ58 SADQ59 SADQ60 SADQ61 SADQ62 SADQ63
AH35 AL35 AL37 AH36 AJ35 AK37 AL34 AM36 AN35 AP32 AM31 AM34 AM35 AL32 AM32 AN31 AP31 AN28 AP28 AL30 AM30 AM28 AL28 AP27 AM27 AM23 AM22 AL23 AM24 AN22 AP22 AM9 AL9 AL6 AP7 AP11 AP10 AL7 AM7 AN5 AN6 AN3 AP3 AP6 AM6 AL4 AM3 AK2 AK3 AG2 AG1 AL3 AM2 AH3 AG3 AF3 AE3 AD6 AC4 AF2 AF1 AD4 AD5
DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
DDR_A_D0
AG35
DDR_A_D[0..63] 13
This Symbol as same as Intel CRB schematic, So Layout Guide will show these signals routed differentially.
DDR_B_BS#014 DDR_B_BS#114 DDR_B_BS#214
DDR_B_DM[0..7]14
DDR_B_DQS[0..7]14
DDR_B_DQS#[0..7]14
DDR_B_MA[0..13]14
DDR_B_CAS#14 DDR_B_RAS#14
@
T33 P AD
@
T34 P AD
DDR_B_WE#14
DDR_B_BS#0 DDR_B_BS#1 DDR_B_BS#2
DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7
DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7
DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13
DDR_B_CAS#
DDR_B_RAS# TP_MB_RCVENIN# TP_MB_RCVENOUT#
DDR_B_WE#
AJ15 AG17 AG21
AF32 AK34 AK27 AK24
AJ10
AK5 AE7 AB7
AF34 AK32
AJ28 AK23 AM10
AH6 AF8 AB4
AF35 AK33 AK28
AJ23
AL10
AH7 AF7 AB5
AH17 AK17 AH18
AJ18 AK18
AJ19 AK19 AH19
AJ20 AH20
AJ16 AG18 AG20 AG15
AH14 AK14 AF15 AF14 AH16
U5D
SB_BS0# SB_BS1# SB_BS2#
SB_DM0 SB_DM1 SB_DM2 SB_DM3 SB_DM4 SB_DM5 SB_DM6 SB_DM7
SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7
SB_DQS0# SB_DQS1# SB_DQS2# SB_DQS3# SB_DQS4# SB_DQS5# SB_DQS6# SB_DQS7#
SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8 SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13
SB_CAS# SB_RAS# SB_RCVENIN# SB_RCVENOUT# SB_WE#
ALVISO_BGA1257
SBDQ0 SBDQ1 SBDQ2 SBDQ3 SBDQ4 SBDQ5 SBDQ6 SBDQ7 SBDQ8
SBDQ9 SBDQ10 SBDQ11 SBDQ12 SBDQ13 SBDQ14 SBDQ15 SBDQ16 SBDQ17 SBDQ18 SBDQ19 SBDQ20 SBDQ21 SBDQ22 SBDQ23 SBDQ24 SBDQ25 SBDQ26 SBDQ27 SBDQ28 SBDQ29 SBDQ30 SBDQ31 SBDQ32 SBDQ33 SBDQ34 SBDQ35 SBDQ36 SBDQ37 SBDQ38 SBDQ39 SBDQ40 SBDQ41 SBDQ42
DDR SYSTEM MEMORY B
SBDQ43 SBDQ44 SBDQ45 SBDQ46 SBDQ47 SBDQ48 SBDQ49 SBDQ50 SBDQ51 SBDQ52 SBDQ53 SBDQ54 SBDQ55 SBDQ56 SBDQ57 SBDQ58 SBDQ59 SBDQ60 SBDQ61 SBDQ62 SBDQ63
AE32 AG32 AG36 AE34 AE33 AF31 AF30 AH33 AH32 AK31 AG30 AG34 AG33 AH31 AJ31 AK30 AJ30 AH29 AH28 AK29 AH30 AH27 AG28 AF24 AG23 AJ22 AK22 AH24 AH23 AG22 AJ21 AG10 AG9 AG8 AH8 AH11 AH10 AJ9 AK9 AJ7 AK6 AJ4 AH5 AK8 AJ8 AJ5 AK4 AG5 AG4 AD8 AD9 AH4 AG6 AE8 AD7 AC5 AB8 AB6 AA8 AC8 AC7 AA4 AA5
DDR_B_D1DDR_B_D1 DDR_B_D2DDR_B_D2 DDR_B_D3DDR_B_D3 DDR_B_D4DDR_B_D4 DDR_B_D5DDR_B_D5 DDR_B_D6DDR_B_D6 DDR_B_D7DDR_B_D7 DDR_B_D8DDR_B_D8 DDR_B_D9DDR_B_D9 DDR_B_D10DDR_B_D10 DDR_B_D11DDR_B_D11 DDR_B_D12DDR_B_D12 DDR_B_D13DDR_B_D13 DDR_B_D14DDR_B_D14 DDR_B_D15DDR_B_D15 DDR_B_D16DDR_B_D16 DDR_B_D17DDR_B_D17 DDR_B_D18DDR_B_D18 DDR_B_D19DDR_B_D19 DDR_B_D20DDR_B_D20 DDR_B_D21DDR_B_D21 DDR_B_D22DDR_B_D22 DDR_B_D23DDR_B_D23 DDR_B_D24DDR_B_D24 DDR_B_D25DDR_B_D25 DDR_B_D26DDR_B_D26 DDR_B_D27DDR_B_D27 DDR_B_D28DDR_B_D28 DDR_B_D29DDR_B_D29 DDR_B_D30DDR_B_D30 DDR_B_D31DDR_B_D31 DDR_B_D32DDR_B_D32 DDR_B_D33DDR_B_D33 DDR_B_D34DDR_B_D34 DDR_B_D35DDR_B_D35 DDR_B_D36DDR_B_D36 DDR_B_D37DDR_B_D37 DDR_B_D38DDR_B_D38 DDR_B_D39DDR_B_D39 DDR_B_D40DDR_B_D40 DDR_B_D41DDR_B_D41 DDR_B_D42DDR_B_D42 DDR_B_D43DDR_B_D43 DDR_B_D44DDR_B_D44 DDR_B_D45DDR_B_D45 DDR_B_D46DDR_B_D46 DDR_B_D47DDR_B_D47 DDR_B_D48DDR_B_D48 DDR_B_D49DDR_B_D49 DDR_B_D50DDR_B_D50 DDR_B_D51DDR_B_D51 DDR_B_D52DDR_B_D52 DDR_B_D53DDR_B_D53 DDR_B_D54DDR_B_D54 DDR_B_D55DDR_B_D55 DDR_B_D56DDR_B_D56 DDR_B_D57DDR_B_D57 DDR_B_D58DDR_B_D58 DDR_B_D59DDR_B_D59 DDR_B_D60DDR_B_D60 DDR_B_D61DDR_B_D61 DDR_B_D62DDR_B_D62 DDR_B_D63DDR_B_D63
DDR_B_D0DDR_B_D0
AE31
DDR_B_D[0..63] 14
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
2005/03/01 2006/03/01
Deciphered Date
2
Custom
Title
Alviso(2/5)-DDR A/B
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
Date: Sheet
1
of
944
Page 10
5
4
3
2
1
+1.5VS_PCIE+2.5VS
PEGCOMP
PEG_RXN0 PEG_RXN1 PEG_RXN2 PEG_RXN3 PEG_RXN4 PEG_RXN5 PEG_RXN6 PEG_RXN7 PEG_RXN8 PEG_RXN9 PEG_RXN10 PEG_RXN11 PEG_RXN12 PEG_RXN13 PEG_RXN14 PEG_RXN15
PEG_RXP0 PEG_RXP1 PEG_RXP2 PEG_RXP3 PEG_RXP4 PEG_RXP5 PEG_RXP6 PEG_RXP7 PEG_RXP8 PEG_RXP9 PEG_RXP10 PEG_RXP11 PEG_RXP12 PEG_RXP13 PEG_RXP14 PEG_RXP15
PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7 PEG_TXN8 PEG_TXN9 PEG_TXN10 PEG_TXN11 PEG_TXN12 PEG_TXN13 PEG_TXN14 PEG_TXN15
PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7 PEG_TXP8 PEG_TXP9 PEG_TXP10 PEG_TXP11 PEG_TXP12 PEG_TXP13 PEG_TXP14 PEG_TXP15
R40 24.9_0603_1%
1 2
PEG_RXN[0..15]
PEG_RXP[0..15]
This Symbol as same as Intel CRB schematic, So Layout Guide will show these signals routed differentially.
PEG_TXN[0..15]
PEG_TXP[0..15]
PEG_RXN[0..15] 15
PEG_RXP[0..15] 15
PEG_TXN[0..15] 15
PEG_TXP[0..15] 15
0_0402_5%
12
AB29 AC29
H24 H25
A15
C16
A17 J18 B15 B16 B17
E24 E23
E21 D21 C20
B20
A19
B19 H21 G21
J20
E25
F25 C23 C22
F23
F22
F26 C33 C31
F28
F27
B30
B29 C25 C24
B34
B33
B32
A34
A33
B31
C29 D28 C27
C28 D27 C26
U5G
SDVOCTRL_DATA SDVOCTRL_CLK GCLKN GCLKP
TVDAC_A TVDAC_B TVDAC_C TV_REFSET TV_IRTNA TV_IRTNB TV_IRTNC
DDCCLK DDCDATA BLUE BLUE# GREEN GREEN# RED RED# VSYNC HSYNC REFSET
LBKLT_CTL LBKLT_EN LCTLA_CLK LCTLB_DATA LDDC_CLK LDDC_DATA LVDD_EN LIBG LVBG LVREFH LVREFL
LACLKN LACLKP LBCLKN LBCLKP
LADATAN0 LADATAN1 LADATAN2
LADATAP0 LADATAP1 LADATAP2
LBDATAN0 LBDATAN1 LBDATAN2
LBDATAP0 LBDATAP1 LBDATAP2
ALVISO_BGA1257
EXP_RXN0/SDVO_TVCLKIN#
EXP_RXN1/SDVO_INT#
MISCTVVGALVDS
EXP_RXN2/SDVO_FLDSTALL#
EXP_RXP0/SDVO_TVCLKIN
EXP_RXP1/SDVO_INT
EXP_RXP2/SDVO_FLDSTALL
EXP_TXN0/SDVOB_RED#
EXP_TXN1/SDVOB_GREEN#
EXP_TXN2/SDVOB_BLUE#
EXP_TXN3/SDVOB_CLKN EXP_TXN4/SDVOC_RED#
EXP_TXN5/SDVOC_GREEN#
EXP_TXN6/SDVOC_BLUE#
EXP_TXN7/SDVOC_CLKN
PCI - EXPRESS GRAPHICS
EXP_TXP0/SDVOB_RED
EXP_TXP1/SDVOB_GREEN
EXP_TXP2/SDVOB_BLUE EXP_TXP3/SDVOB_CLKP
EXP_TXP4/SDVOC_RED
EXP_TXP5/SDVOC_GREEN
EXP_TXP6/SDVOC_BLUE EXP_TXP7/SDVOC_CLKP
EXP_COMPI
EXP_ICOMPO
EXP_RXN3 EXP_RXN4 EXP_RXN5 EXP_RXN6 EXP_RXN7 EXP_RXN8
EXP_RXN9 EXP_RXN10 EXP_RXN11 EXP_RXN12 EXP_RXN13 EXP_RXN14 EXP_RXN15
EXP_RXP3
EXP_RXP4
EXP_RXP5
EXP_RXP6
EXP_RXP7
EXP_RXP8
EXP_RXP9 EXP_RXP10 EXP_RXP11 EXP_RXP12 EXP_RXP13 EXP_RXP14 EXP_RXP15
EXP_TXN8
EXP_TXN9 EXP_TXN10 EXP_TXN11 EXP_TXN12 EXP_TXN13 EXP_TXN14 EXP_TXN15
EXP_TXP8
EXP_TXP9
EXP_TXP10 EXP_TXP11 EXP_TXP12 EXP_TXP13 EXP_TXP14 EXP_TXP15
D36 D34
E30 F34 G30 H34 J30 K34 L30 M34 N30 P34 R30 T34 U30 V34 W30 Y34
D30 E34 F30 G34 H30 J34 K30 L34 M30 N34 P30 R34 T30 U34 V30 W34
E32 F36 G32 H36 J32 K36 L32 M36 N32 P36 R32 T36 U32 V36 W32 Y36
D32 E36 F32 G36 H32 J36 K32 L36 M32 N36 P32 R36 T32 U36 V32 W36
R29 3K_0402_5%@
1 2
R30 3K_0402_5%@
12
R34
150_0402_1%
1@
12
1 2
12
R428
4.99K_0603_1%
BIA BK_EN LCTLA_CLK LCTLB_DAT LCD_CLK LCD_DAT EN_LCDVDD
LVDS_AC­LVDS_AC+ LVDS_BC­LVDS_BC+
LVDS_A0­LVDS_A1­LVDS_A2-
LVDS_A0+ LVDS_A1+ LVDS_A2+
LVDS_B0­LVDS_B1­LVDS_B2-
LVDS_B0+ LVDS_B1+ LVDS_B2+
R392
1@
1 2
CLK_DDC2 DAT_DDC2
1 2
R429 255_0402_1%
R378
1.5K_0402_1%
CLK_MCH_3GPLL#17 CLK_MCH_3GPLL17
D D
C C
+2.5VS
1 2
R362 2.2K_0402_5%
1 2
R363 2.2K_0402_5%
1 2
R385 2.2K_0402_5%
1 2
R364 2.2K_0402_5%
1 2
R360 2.2K_0402_5%
1 2
R361 2.2K_0402_5%
B B
LCD_CLK LCD_DAT LCTLA_CLK LCTLB_DAT CLK_DDC2 DAT_DDC2
COMP/B16 Y/G16 C/R16
BK_EN15
12
R33
R32
150_0402_1%
1@
1@
R396 100K_0402_1%
1 2 1 2
R404 100K_0402_1%
150_0402_1%
CLK_DDC216 DAT_DDC216 CRT_BLU16
CRT_GRN16 CRT_RED16 VSYNC16
HSYNC16
LCD_CLK15 LCD_DAT15 EN_LCDVDD15
LVDS_AC-15 LVDS_AC+15 LVDS_BC-15 LVDS_BC+15
LVDS_A0-15 LVDS_A1-15 LVDS_A2-15
LVDS_A0+15 LVDS_A1+15 LVDS_A2+15
LVDS_B0-15 LVDS_B1-15 LVDS_B2-15
LVDS_B0+15 LVDS_B1+15 LVDS_B2+15
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
2005/03/01 2006/03/01
Deciphered Date
2
Custom
Title
Alviso(3/5)-PCI-E/LVDS/TV
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
Date: Sheet
1
of
10 44
Page 11
5
+VCCP
1
C392
C391
D D
C C
B B
2
2.2U_0805_10V6K
4.7U_0805_6.3V6K
C29
0.47U_0603_16V7K
12
C28
0.47U_0603_16V7K
12 12
C74
0.22U_0603_10V7K
12
C52
0.22U_0603_10V7K
0.1U_0402_16V4Z
1
C674
2
U5F
K13
VTT0
J13
VTT1
K12
VTT2
W11
VTT3
V11
1
VTT4
U11
VTT5
T11
VTT6
R11
VTT7
2
P11
POWER
VTT8
N11
VTT9
M11
VTT10
L11
VTT11
K11
VTT12
W10
VTT13
V10
VTT14
U10
VTT15
T10
VTT16
R10
VTT17
P10
VTT18
N10
VTT19
M10
VTT20
K10
VTT21
J10
VTT22
Y9
VTT23
W9
VTT24
U9
VTT25
R9
VTT26
P9
VTT27
N9
VTT28
M9
VTT29
L9
VTT30
J9
VTT31
N8
VTT32
M8
VTT33
N7
VTT34
M7
VTT35
N6
VTT36
M6
VTT37
A6
VTT38
N5
VTT39
M5
VTT40
N4
VTT41
M4
VTT42
N3
VTT43
M3
VTT44
N2
VTT45
M2
VTT46
B2
VTT47
V1
VTT48
N1
VTT49
M1
VTT50
G1
VTT51
ALVISO_BGA1257
VCCSM0 VCCSM1 VCCSM2 VCCSM3 VCCSM4 VCCSM5 VCCSM6 VCCSM7 VCCSM8
VCCSM9 VCCSM10 VCCSM11 VCCSM12 VCCSM13 VCCSM14 VCCSM15 VCCSM16 VCCSM17 VCCSM18 VCCSM19 VCCSM20 VCCSM21 VCCSM22 VCCSM23 VCCSM24 VCCSM25 VCCSM26 VCCSM27 VCCSM28 VCCSM29 VCCSM30 VCCSM31 VCCSM32 VCCSM33 VCCSM34 VCCSM35 VCCSM36 VCCSM37 VCCSM38 VCCSM39 VCCSM40 VCCSM41 VCCSM42 VCCSM43 VCCSM44 VCCSM45 VCCSM46 VCCSM47 VCCSM48 VCCSM49 VCCSM50 VCCSM51 VCCSM52 VCCSM53 VCCSM54 VCCSM55 VCCSM56 VCCSM57 VCCSM58 VCCSM59 VCCSM60 VCCSM61 VCCSM62 VCCSM63 VCCSM64
AM37 AH37 AP29 AD28 AD27 AC27 AP26 AN26 AM26 AL26 AK26 AJ26 AH26 AG26 AF26 AE26 AP25 AN25 AM25 AL25 AK25 AJ25 AH25 AG25 AF25 AE25 AE24 AE23 AE22 AE21 AE20 AE19 AE18 AE17 AE16 AE15 AE14 AP13 AN13 AM13 AL13 AK13 AJ13 AH13 AG13 AF13 AE13 AP12 AN12 AM12 AL12 AK12 AJ12 AH12 AG12 AF12 AE12 AD11 AC11 AB11 AB10 AB9 AP8 AM1 AE1
V1.8_DDR_CAP1 V1.8_DDR_CAP2 V1.8_DDR_CAP5
V1.8_DDR_CAP6 V1.8_DDR_CAP4 V1.8_DDR_CAP3
Note : All VCCSM pin shorted internally.
Note: Place near chip.
10U_1206_6.3V6M
C127
1
2
C429
+VCCP
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C675
C676
2
2
0.1U_0402_16V4Z
1
1
C677
C678
2
2
C478
4
W=20 mils
C468
+VCCP
1
1
1
C393
0.1U_0402_16V7K C855
4.7U_0805_6.3V6K
0.1U_0402_16V4Z
C680
0.1U_0402_16V4Z
C683
C388
2
2
2
0.1U_0402_16V4Z
4.7U_0805_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C681
2
1
C684
2
1
C682
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C685
2
2
1
1
1
C443
2
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
+1.8V
10U_1206_6.3V6M
330U_D2_3VM
1
C135
C130
1
+
2
2
+1.5VS
+1.5VS_DPLLA +1.5VS_DPLLB +1.5VS_HPLL +1.5VS_MPLL
0.1U_0402_16V7K
0.1U_0402_16V7K C465
1
2
0.1U_0402_16V7K
C475
1
1
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
1
C413
C412
2
2
2
C408
0.1U_0402_16V4Z
T29 R29 N29 M29 K29
J29 V28 U28 T28 R28 P28 N28 M28 L28 K28
J28 H28 G28 V27 U27 T27 R27 P27 N27 M27 L27 K27
J27 H27 K26 H26 K25
J25 K24 K23 K22 K21
W20
U20 T20 K20 V19 U19 K19
W18
V18 T18 K18 K17
AC1 AC2 B23 C35 AA1 AA2
0.1U_0402_16V4Z
1
C411
2
U5E
VCC0 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48
VCCD_HMPLL1 VCCD_HMPLL2 VCCA_DPLLA VCCA_DPLLB VCCA_HPLL VCCA_MPLL
ALVISO_BGA1257
1
2
POWER
+1.8V
0.1U_0402_16V4Z
1
C418
2
C420
0.1U_0402_16V4Z
3
VCCA_TVDACA0 VCCA_TVDACA1 VCCA_TVDACB0 VCCA_TVDACB1 VCCA_TVDACC0 VCCA_TVDACC1
VCCDQ_TVDAC
VCCTX_LVDS0 VCCTX_LVDS1 VCCTX_LVDS2
VCCA_CRTDAC0 VCCA_CRTDAC1
VSSA_CRTDAC
VCCA_TVBG VSSA_TVBG
VCCD_TVDAC
VCCD_LVDS0 VCCD_LVDS1 VCCD_LVDS2
VCCA_LVDS
VCCHV0 VCCHV1 VCCHV2
VCCA_SM0 VCCA_SM1 VCCA_SM2 VCCA_SM3
VCC3G0 VCC3G1 VCC3G2 VCC3G3 VCC3G4 VCC3G5 VCC3G6
VCCA_3GPLL0 VCCA_3GPLL1 VCCA_3GPLL2
VCCA_3GBG VSSA_3GBG
VCC_SYNC
F17 E17 D18 C18 F18 E18
H18 G18
D19 H17
B26 B25 A25
A35 B22
B21 A21
B28 A28 A27
AF20 AP19 AF19 AF18
AE37 W37 U37 R37 N37 L37 J37
Y29 Y28 Y27
F37 G37
H20 F19
E19 G19
+3VS
1
C355
2
0.1U_0402_16V4Z
+1.5VS_PM +2.5VS_PM
R740 0_0603_5%1@
1 2
4.7U_0805_6.3V6K
1
C473
C131
2
0.1U_0402_16V4Z
VCC_SYNC +2.5VS_CRT
1
2
C372
0.1U_0402_16V4Z
1
2
100U_D2_10VM
2
+3VS
C366
0.022U_0402_16V7K
1
1
2
2
R736 0_0603_5%1@ R737 0_0603_5%2@
R738 0_0603_5%2@ R739 0_0603_5%1@
C329
C353
0.022U_0402_16V7K
1 2 1 2
1 2 1 2
1
2
+1.5VS
1
1
2
2
C341
0.1U_0402_16V4Z
+2.5VS
1
C340
0.1U_0402_16V4Z
2
C339
0.022U_0402_16V7K
+2.5VS_LVDSPM
+1.5VS_PCIE
+
1
1
+
C380
2
C452
220U_D2_4VM
Route VSSA3GBG gnd from GMCH to decoupling cap ground lead and then conne c t to the gnd plane.
1
C433
2
2
10U_1206_6.3V6M
10U_1206_6.3V6M
+1.5VS
Close B26,B25,A25
C336
0.022U_0402_16V7K
R741 0_0603_5%
1
2
0.1U_0402_16V4Z
1
C30
2
10U_1206_6.3V6M
2@
C126
10U_1206_6.3V6M
C371
C354
1
2
0.1U_0402_16V4Z
+1.5VS_PM
0.1U_0402_16V4Z
1
2
12
R134
0.5_0805_1%
1 2
1
2
10U_1206_6.3V6M
1
2
L14 0_0603_5%
L26 0_0603_5%
3GRLL_R
1
C365
0.1U_0402_16V4Z
2
R838 0_0603_5%
1 2
R31 0_0402_5%
1
1
2
2
C349
0.1U_0402_16V4Z
+1.5VS
+2.5VS +2.5VS
+1.5VS_3GPLL
C399
Note : R31, R837 stuff for Ext. VGA. R28, R838 no stuff for Int. VGA.
VCC_SYNC
+2.5VS_PM
1
1
C352
C346
2
2
0.1U_0402_16V4Z
0.01U_0402_16V7K
12
L13 MBK1608301YZF_0603
C128
0.1U_0402_16V4Z
L9
12
0_0603_5%
12
1@
2@
12
+1.5VS
12
+2.5VS
+VCCP
+2.5VS
C334
10U_1206_6.3V6M
1
2
+2.5VS+2.5VS_3GBG
1
1
1
C342
2
2
0.1U_0402_16V4Z
+1.5VS
1
C438
2
0.1U_0402_16V4Z
1
C31
0.1U_0402_16V4Z
2
+1.5VS+1.5VS_DDRDLL
1
C140
2
0.1U_0402_16V4Z
+1.5VS_DPLLA
0.1U_0402_16V4Z
330U_D2_3VM
1
C345
C330
Note : C330, C348 No stuff for Ext. VGA. Stuff for Int. VGA.
1
+
2
2
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
L19 FBMA-L11-160808-700LMT_0603
1 2
+1.5VS
2005/03/01 2006/03/01
330U_D2_3VM
C81
+1.5VS_HPLL
0.1U_0402_16V4Z
1
C404
1
+
2
2
L23 FBMA-L11-160808-700LMT_0603
+1.5VS
4
+VCCP
1 2
R805
@
10K_0402_5%
+VCCP
A A
1 2
R806
@
10K_0402_5%
12
D21
@
1N4148_SOD80
12
D22
@
1N4148_SOD80
5
+2.5VS
+3VS
L11 FBMA-L11-160808-700LMT_0603
1 2
+1.5VS
1 2
+1.5VS_MPLL
1
+
C403
2
330U_D2_3VM
C409
L20 FBMA-L11-160808-700LMT_0603
1 2
+1.5VS
1
2
0.1U_0402_16V4Z
http://hobi-elektronika.net
+1.5VS_DPLLB
0.1U_0402_16V4Z
330U_D2_3VM
1
C347
C348
1
+
2
2
Deciphered Date
+2.5VS_CRT
1
1
C367
2
C363
2
2
0.1U_0402_16V4Z
0.022U_0402_16V7K
Custom
Title
Size Document Number Rev
Date: Sheet
12
R28
1@
0_0603_5%
1 2
R837
2@
0_0402_5%
+2.5VS
+VCCP
Alviso(4/5)-PWR
LA-3091 1.0
Tuesday, Janua ry 10, 2006
1
11 44
of
Page 12
5
4
3
2
1
+VCCP
W12
W13
AA12 AA13
W14
AA14 AB14
W15
AA15 AB15
W16
AA16 AB16
AA17 AB17 AA18 AB18 AA19 AB19 AA20 AB20
AA21 AB21
AA22 AB22
AA23 AB23
AA24 AB24
AA25 AB25
AA26 AB26
W25
W26
L12 M12 N12
P12 R12
T12 U12
V12
L13 M13 N13
P13 R13
T13 U13
V13
Y12
Y13
L14 M14 N14
P14 R14
T14 U14
V14
Y14
L15 M15 N15
P15 R15
T15 U15
V15
Y15
L16 M16 N16
P16 R16
T16 U16
V16
Y16
R17
Y17
R21
Y21
Y22
Y23
Y24
Y25
Y26
V25
L26 M26 N26
P26 R26
T26 U26
V26
5
U5H
VTT_NCTF17 VTT_NCTF16 VTT_NCTF15 VTT_NCTF14 VTT_NCTF13 VTT_NCTF12 VTT_NCTF11 VTT_NCTF10 VTT_NCTF9 VTT_NCTF8 VTT_NCTF7 VTT_NCTF6 VTT_NCTF5 VTT_NCTF4 VTT_NCTF3 VTT_NCTF2 VTT_NCTF1 VTT_NCTF0
VSS_NCTF68 VSS_NCTF67 VSS_NCTF66 VSS_NCTF65 VSS_NCTF64 VSS_NCTF63 VSS_NCTF62 VSS_NCTF61 VSS_NCTF60 VSS_NCTF59 VSS_NCTF58 VSS_NCTF57 VSS_NCTF56 VSS_NCTF55 VSS_NCTF54 VSS_NCTF53 VSS_NCTF52 VSS_NCTF51 VSS_NCTF50 VSS_NCTF49 VSS_NCTF48 VSS_NCTF47 VSS_NCTF46 VSS_NCTF45 VSS_NCTF44 VSS_NCTF43 VSS_NCTF42 VSS_NCTF41 VSS_NCTF40 VSS_NCTF39 VSS_NCTF38 VSS_NCTF37 VSS_NCTF36 VSS_NCTF35 VSS_NCTF34 VSS_NCTF33 VSS_NCTF32 VSS_NCTF31 VSS_NCTF30 VSS_NCTF29 VSS_NCTF28 VSS_NCTF27 VSS_NCTF26 VSS_NCTF25 VSS_NCTF24 VSS_NCTF23 VSS_NCTF22 VSS_NCTF21 VSS_NCTF20 VSS_NCTF19 VSS_NCTF18 VSS_NCTF17 VSS_NCTF16 VSS_NCTF15 VSS_NCTF14 VSS_NCTF13 VSS_NCTF12 VSS_NCTF11 VSS_NCTF10 VSS_NCTF9 VSS_NCTF8 VSS_NCTF7 VSS_NCTF6 VSS_NCTF5 VSS_NCTF4 VSS_NCTF3 VSS_NCTF2 VSS_NCTF1 VSS_NCTF0
VCC_NCTF10 VCC_NCTF9 VCC_NCTF8 VCC_NCTF7 VCC_NCTF6 VCC_NCTF5 VCC_NCTF4 VCC_NCTF3 VCC_NCTF2 VCC_NCTF1 VCC_NCTF0
ALVISO_BGA1257
VCCSM_NCTF31 VCCSM_NCTF30 VCCSM_NCTF29 VCCSM_NCTF28 VCCSM_NCTF27 VCCSM_NCTF26 VCCSM_NCTF25 VCCSM_NCTF24 VCCSM_NCTF23 VCCSM_NCTF22 VCCSM_NCTF21 VCCSM_NCTF20 VCCSM_NCTF19 VCCSM_NCTF18 VCCSM_NCTF17 VCCSM_NCTF16 VCCSM_NCTF15 VCCSM_NCTF14 VCCSM_NCTF13 VCCSM_NCTF12 VCCSM_NCTF11 VCCSM_NCTF10
VCCSM_NCTF9 VCCSM_NCTF8 VCCSM_NCTF7 VCCSM_NCTF6 VCCSM_NCTF5 VCCSM_NCTF4 VCCSM_NCTF3 VCCSM_NCTF2 VCCSM_NCTF1 VCCSM_NCTF0
VCC_NCTF78 VCC_NCTF77 VCC_NCTF76 VCC_NCTF75 VCC_NCTF74 VCC_NCTF73 VCC_NCTF72 VCC_NCTF71 VCC_NCTF70
NCTF
VCC_NCTF69 VCC_NCTF68 VCC_NCTF67 VCC_NCTF66 VCC_NCTF65 VCC_NCTF64 VCC_NCTF63 VCC_NCTF62 VCC_NCTF61 VCC_NCTF60 VCC_NCTF59 VCC_NCTF58 VCC_NCTF57 VCC_NCTF56 VCC_NCTF55 VCC_NCTF54 VCC_NCTF53 VCC_NCTF52 VCC_NCTF51 VCC_NCTF50 VCC_NCTF49 VCC_NCTF48 VCC_NCTF47 VCC_NCTF46 VCC_NCTF45 VCC_NCTF44 VCC_NCTF43 VCC_NCTF42 VCC_NCTF41 VCC_NCTF40 VCC_NCTF39 VCC_NCTF38 VCC_NCTF37 VCC_NCTF36 VCC_NCTF35 VCC_NCTF34 VCC_NCTF33 VCC_NCTF32 VCC_NCTF31 VCC_NCTF30 VCC_NCTF29 VCC_NCTF28 VCC_NCTF27 VCC_NCTF26 VCC_NCTF25 VCC_NCTF24 VCC_NCTF23 VCC_NCTF22 VCC_NCTF21 VCC_NCTF20 VCC_NCTF19 VCC_NCTF18 VCC_NCTF17 VCC_NCTF16 VCC_NCTF15 VCC_NCTF14 VCC_NCTF13 VCC_NCTF12 VCC_NCTF11
D D
C C
B B
A A
AB12 AC12 AD12 AB13 AC13 AD13 AC14 AD14 AC15 AD15 AC16 AD16 AC17 AD17 AC18 AD18 AC19 AD19 AC20 AD20 AC21 AD21 AC22 AD22 AC23 AD23 AC24 AD24 AC25 AD25 AC26 AD26
L17 M17 N17 P17 T17 U17 V17 W17 L18 M18 N18 P18 R18 Y18 L19 M19 N19 P19 R19 Y19 L20 M20 N20 P20 R20 Y20 L21 M21 N21 P21 T21 U21 V21 W21 L22 M22 N22 P22 R22 T22 U22 V22 W22 L23 M23 N23 P23 R23 T23 U23 V23 W23 L24 M24 N24 P24 R24 T24 U24 V24 W24 L25 M25 N25 P25 R25 T25 U25
+1.8V
1
2
1
2
+VCCP
C686
C689
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C693
2
1
C692
2
0.1U_0402_10V6K
1
1
C687
C688
2
2
U5I
Y1
VSS271
D2
VSS270
G2
VSS269
J2
VSS268
AA10
AG7 AK7 AN7
AA9 AC9 AE9 AH9 AN9 D10
H11
L2 P2 T2
V2 AD2 AE2 AH2 AL2 AN2
A3
C3 AA3 AB3 AC3 AJ3
C4
H4
L4
P4
U4
Y4 AF4 AN4
E5
W5 AL5 AP5
B6 J6 L6 P6
T6 AA6 AC6 AE6 AJ6
G7
V7 AA7
C8
E8
L8
P8
Y8 AL8
A9
H9
K9
T9
V9
L10 Y10
F11 Y11
VSS260 VSS259 VSS258 VSS257 VSS256 VSS255 VSS254 VSS253 VSS252 VSS251 VSS250 VSS249 VSS248 VSS247 VSS246 VSS245 VSS244 VSS243 VSS242 VSS241 VSS240 VSS239 VSS238 VSS237 VSS236 VSS235 VSS234 VSS233 VSS232 VSS231 VSS230 VSS229 VSS228 VSS227 VSS226 VSS225 VSS224 VSS223 VSS222 VSS221 VSS220 VSS219 VSS218 VSS217 VSS216 VSS215 VSS214 VSS213 VSS212 VSS211 VSS210 VSS209 VSS208 VSS207 VSS206 VSS205 VSS204 VSS203 VSS202 VSS201 VSS200 VSS199 VSS198 VSS197 VSS196
ALVISO_BGA1257
VSS
0.1U_0402_10V6K
0.1U_0402_10V6K
1
1
C691
C690
2
2
+VCCP
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
1
1
C694
C695
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
1
1
C698
C699
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
1
C697
C696
2
2
+VCCP
0.1U_0402_10V6K
0.1U_0402_10V6K
1
1
C703
C702
2
2
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
http://hobi-elektronika.net
3
B36
VSSALVDS
AA11
VSS195
AF11
VSS194
AG11
VSS193
AJ11
VSS192
AL11
VSS191
AN11
VSS190
B12
VSS189
D12
VSS188
J12
VSS187
A14
VSS186
B14
VSS185
F14
VSS184
J14
VSS183
K14
VSS182
AG14
VSS181
AJ14
VSS180
AL14
VSS179
AN14
VSS178
C15
VSS177
K15
VSS176
A16
VSS175
D16
VSS174
H16
VSS173
K16
VSS172
AL16
VSS171
C17
VSS170
G17
VSS169
AF17
VSS168
AJ17
VSS167
AN17
VSS166
A18
VSS165
B18
VSS164
U18
VSS163
AL18
VSS162
C19
VSS161
H19
VSS160
J19
VSS159
T19
VSS158
W19
VSS157
AG19
VSS156
AN19
VSS155
A20
VSS154
D20
VSS153
E20
VSS152
F20
VSS151
G20
VSS150
V20
VSS149
AK20
VSS148
C21
VSS147
F21
VSS146
AF21
VSS145
AN21
VSS144
A22
VSS143
D22
VSS142
E22
VSS141
J22
VSS140
AH22
VSS139
AL22
VSS138
H23
VSS137
AF23
VSS136
B24
VSS135
D24
VSS134
F24
VSS133
J24
VSS132
AG24
VSS131
AJ24
VSS130
2005/03/01 2006/03/01
Deciphered Date
U5J
AL24
VSS267
AN24
VSS266
A26
VSS265
E26
VSS264
G26
VSS263
J26
VSS262
B27
VSS261
E27
VSS129
G27
VSS128
W27
VSS127
AA27
VSS126
AB27
VSS125 VSS124 VSS123 VSS122 VSS121 VSS120 VSS119 VSS118 VSS117 VSS116 VSS115 VSS114 VSS113 VSS112 VSS111 VSS110 VSS109 VSS108 VSS107 VSS106 VSS105 VSS104 VSS103 VSS102 VSS101 VSS100 VSS99 VSS98 VSS97 VSS96 VSS95 VSS94 VSS93 VSS92 VSS91 VSS90 VSS89 VSS88 VSS87 VSS86 VSS85 VSS84 VSS83 VSS82 VSS81 VSS80 VSS79 VSS78 VSS77 VSS76 VSS75 VSS74 VSS73 VSS72 VSS71 VSS70 VSS69 VSS68
VSS
Custom
Title
Alviso(5/5)-PWR/GND
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
Date: Sheet
AF27 AG27
AJ27 AL27
AN27
E28
W28 AA28 AB28 AC28
A29 D29 E29 F29 G29 H29
L29 P29 U29 V29
W29 AA29 AD29 AG29
AJ29
AM29
C30
Y30 AA30 AB30 AC30 AE30 AP30
D31
E31
F31
G31
H31
J31
K31
L31 M31 N31 P31 R31 T31 U31 V31
W31 AD31 AG31
AL31
A32 C32
Y32 AA32 AB32
ALVISO_BGA1257
2
VSS67 VSS66 VSS65 VSS64 VSS63 VSS62 VSS61 VSS60 VSS59 VSS58 VSS57 VSS56 VSS55 VSS54 VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34 VSS33 VSS32 VSS31 VSS30 VSS29 VSS28 VSS27 VSS26 VSS25 VSS24 VSS23 VSS22 VSS21 VSS20 VSS19 VSS18 VSS17 VSS16 VSS15 VSS14 VSS13 VSS12 VSS11 VSS10
VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1 VSS0
AC32 AD32 AJ32 AN32 D33 E33 F33 G33 H33 J33 K33 L33 M33 N33 P33 R33 T33 U33 V33 W33 AD33 AF33 AL33 C34 AA34 AB34 AC34 AD34 AH34 AN34 B35 D35 E35 F35 G35 H35 J35 K35 L35 M35 N35 P35 R35 T35 U35 V35 W35 Y35 AE35 C36 AA36 AB36 AC36 AD36 AE36 AF36 AJ36 AL36 AN36 E37 H37 K37 M37 P37 T37 V37 Y37 AG37
of
1
12 44
Page 13
5
DDR_A_DQS#[0..7]9 DDR_A_D[0..63]9 DDR_A_DM[0..7]9 DDR_A_DQS[0..7]9 DDR_A_MA[0..13]9
D D
Layout Note: Place near JDIM1
+1.8V
2.2U_0805_10V6K C780
1
2
0.1U_0402_16V4Z
C786
1
2
C C
Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9VS
C782
C781
1
1
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C787
1
2
2.2U_0805_10V6K
2.2U_0805_10V6K
2.2U_0805_10V6K
2.2U_0805_10V6K C783
1
2
0.1U_0402_16V4Z
C788
1
1
2
2
1
2
C789
C784
+
1
C163 150U_D2_6.3VM_R15
2
+0.9VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C813
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
C815
C814
1
2
C816
1
2
C817
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C818
0.1U_0402_16V4Z
B B
1
2
C811
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C812
+0.9VS
DDR_A_MA5 DDR_A_MA8
DDR_A_MA1 DDR_A_MA3
DDR_A_RAS# DDR_SCS#0
DDR_A_BS#0 DDR_A_MA10
DDR_A_CAS# DDR_A_WE#
DDR_SCS#1 M_ODT1
A A
RP10
1 4 2 3
RP12
56_0404_4P2R_5%
1 4 2 3
56_0404_4P2R_5%
RP14
1 4 2 3
56_0404_4P2R_5%
RP16
1 4 2 3
RP18
56_0404_4P2R_5%
1 4 2 3
56_0404_4P2R_5%
RP20
2 3 1 4
56_0404_4P2R_5%
5
RP11 56_0404_4P2R_5%
DDR_A_BS#2
14
DDR_CKE0_DIMMA
23
RP13 56_0404_4P2R_5%
DDR_A_MA7
14
DDR_A_MA6
23
RP15 56_0404_4P2R_5%
DDR_A_MA9
14
DDR_A_MA12
23
RP17 56_0404_4P2R_5%
DDR_A_MA4
14
DDR_A_MA2
23
RP19 56_0404_4P2R_5%
DDR_A_MA0
14
DDR_A_BS#1
23
RP21 56_0404_4P2R_5%
M_ODT0
14
DDR_A_MA13
23
RP22 56_0404_4P2R_5%
DDR_CKE1_DIMMA
14
DDR_A_MA11
23
4
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
C820
C819
Layout Note: Place these resistor closely JDIM1,all trace length Max=1.5"
4
DDR_CLK0
1
C785
2.2P_0402_50V8C
2
DDR_CLK0#
DDR_CLK1
1
C790
2.2P_0402_50V8C
2
DDR_CLK1#
0.1U_0402_16V4Z
1
2
C821
1
2
C822
3
+1.8V
JDIMM1
1
VREF
3
DDR_A_D4 DDR_A_D1
DDR_A_DQS#0 DDR_A_DQS0
DDR_A_D7 DDR_A_D3
DDR_A_D8 DDR_A_D9
DDR_A_DQS#1 DDR_A_DQS1
DDR_A_D14 DDR_A_D15 DDR_A_D10
DDR_A_D16 DDR_A_D17
DDR_A_DQS#2 DDR_A_DQS2
DDR_A_D18 DDR_A_D19
DDR_A_D24 DDR_A_DM3
DDR_A_D26 DDR_A_D27
DDR_CKE0_DIMMA8
DDR_A_BS#29
DDR_A_BS#09
0.1U_0402_16V4Z
1
2
C823
DDR_A_WE#9 DDR_A_CAS#9
DDR_SCS#18
M_ODT18
CK_SDATA14,17 CK_SCLK14,17
DDR_CKE0_DIMMA
DDR_A_BS#2 DDR_A_MA12
DDR_A_MA9 DDR_A_MA7 DDR_A_MA8
DDR_A_MA5 DDR_A_MA3 DDR_A_MA1
DDR_A_MA10 DDR_A_BS#0 DDR_A_WE#
DDR_A_CAS# DDR_SCS#1
M_ODT1 DDR_A_D37
DDR_A_D36 DDR_A_DQS#4
DDR_A_DQS4 DDR_A_D34
DDR_A_D38 DDR_A_D40
DDR_A_D44 DDR_A_DM5 DDR_A_D47
DDR_A_D46 DDR_A_D49
DDR_A_D48
DDR_A_DQS#6 DDR_A_DQS6
DDR_A_D50 DDR_A_D61
DDR_A_D60 DDR_A_DM7 DDR_A_D59
DDR_A_D58 CK_SDATA
CK_SCLK
+3VS
C749
0.1U_0402_16V4Z
1
2
1
C750
2.2U_0603_6.3V6K
2
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
QTC_C111A-040SP31
SO-DIMM A
DM0 VSS DQ6 DQ7
VSS DQ12 DQ13
VSS
DM1
VSS
CK0#
VSS DQ14 DQ15
VSS
VSS DQ20 DQ21
VSS
DM2
VSS DQ22 DQ23
VSS DQ28 DQ29
VSS
DQS3#
DQS3
VSS DQ30 DQ31
VSS
NC/CKE1
VDD
NC/A15 NC/A14
VDD
VDD
VDD RAS#
VDD ODT0
NC/A13
VDD
VSS DQ36 DQ37
VSS
DM4
VSS DQ38 DQ39
VSS DQ44 DQ45
VSS
DQS5#
DQS5
VSS DQ46 DQ47
VSS DQ52 DQ53
VSS
CK1#
VSS
DM6
VSS DQ54 DQ55
VSS DQ60 DQ61
VSS
DQS7#
DQS7
VSS DQ62 DQ63
VSS
SAO
VSS DQ4 DQ5 VSS
CK0
A11
BA1 S0#
CK1
SA1
NC
A7 A6
A4 A2 A0
NC
STANDARD
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
http://hobi-elektronika.net
3
2005/06/23 2006/06/23
Deciphered Date
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
2
+1.8V
DDR_A_D5 DDR_A_D0
DDR_A_DM0 DDR_A_D6
DDR_A_D2 DDR_A_D13
DDR_A_D12 DDR_A_DM1 DDR_CLK0
DDR_CLK0# DDR_A_D11
DDR_A_D20 DDR_A_D21
DDR_A_DM2 DDR_A_D23
DDR_A_D22 DDR_A_D28DDR_A_D29
DDR_A_D25 DDR_A_DQS#3
DDR_A_DQS3 DDR_A_D31
DDR_A_D30 DDR_CKE1_DIMMA
DDR_A_MA11 DDR_A_MA6 DDR_A_MA4
DDR_A_MA2 DDR_A_MA0
DDR_A_BS#1 DDR_A_RAS# DDR_SCS#0
M_ODT0 DDR_A_MA13
DDR_A_D33 DDR_A_D32
DDR_A_DM4 DDR_A_D35
DDR_A_D39 DDR_A_D45
DDR_A_D41 DDR_A_DQS#5
DDR_A_DQS5 DDR_A_D43
DDR_A_D42 DDR_A_D52
DDR_A_D53 DDR_CLK1
DDR_CLK1# DDR_A_DM6 DDR_A_D51DDR_A_D54
DDR_A_D55 DDR_A_D57
DDR_A_D56 DDR_A_DQS#7
DDR_A_DQS7 DDR_A_D62
DDR_A_D63
12
R821
10K_0402_5%
2
V_DDR_MCH_REF
12
R822
10K_0402_5%
Close to VREF pins of SO-DIMM
0.1U_0402_16V4Z
2.2U_0805_10V6K
1
2
DDR_CLK0 8 DDR_CLK0# 8
DDR_CKE1_DIMMA 8
DDR_A_BS#1 9 DDR_A_RAS# 9 DDR_SCS#0 8
M_ODT0 8
DDR_CLK1 8 DDR_CLK1# 8
C725
C724
1
2
V_DDR_MCH_REF
Title
Size Document Number Rev
Custom
Date: Sheet
Compal Electronics, Inc.
DDRII-SODIMM SLOT1
LA-3091
1
V_DDR_MCH_REF 14
+1.8V
12
R826 1K_0402_5%
12
R827 1K_0402_5%
1
1
C777
0.1U_0402_16V4Z
2
1
C778
0.1U_0402_16V4Z
2
of
13 44Tuesday, Jan ua ry 1 0, 2006
1.0
Page 14
5
DDR_B_DQS#[0..7]9 DDR_B_D[0..63]9 DDR_B_DM[0..7]9 DDR_B_DQS[0..7]9 DDR_B_MA[0..13]9
D D
Layout Note: Place near JDIM2
+1.8V
2.2U_0805_10V6K C800
1
2
0.1U_0402_16V4Z C806
1
2
C C
Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9VS
2.2U_0805_10V6K
2.2U_0805_10V6K
0.1U_0402_16V4Z
C802
C801
1
1
2
2
0.1U_0402_16V4Z C808
C807
1
1
2
2
2.2U_0805_10V6K
2.2U_0805_10V6K
0.1U_0402_16V4Z
C804
C803
1
1
2
2
C809
1
2
+0.9VS
1
2
C830
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C831
1
2
0.1U_0402_16V4Z
C832
Layout Note: Place these resistor closely JDIM2,all trace length Max=1.5"
0.1U_0402_16V4Z
1
2
C825
1
2
C826
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C827
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C824
B B
1
2
C828
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C829
+0.9VS
DDR_B_MA1 DDR_B_MA3
DDR_B_BS#0 DDR_B_MA10
DDR_B_MA0 DDR_B_BS#1
DDR_B_RAS# DDR_SCS#2
DDR_B_CAS#
A A
DDR_B_WE#
DDR_SCS#3 M_ODT3
RP23
1 4 2 3
56_0404_4P2R_5%
RP25
1 4 2 3
RP27
56_0404_4P2R_5%
1 4 2 3
56_0404_4P2R_5%
RP29
1 4 2 3
56_0404_4P2R_5%
RP31
1 4 2 3
RP33
56_0404_4P2R_5%
2 3 1 4
56_0404_4P2R_5%
5
RP24 56_0404_4P2R_5%
DDR_B_MA9
14
DDR_B_MA12
23
RP26 56_0404_4P2R_5%
DDR_CKE3_DIMMB
14
DDR_B_MA11
23
RP28 56_0404_4P2R_5%
DDR_B_MA5
14
DDR_B_MA8
23
RP30 56_0404_4P2R_5%
DDR_B_MA7
14
DDR_B_MA6
23
RP32 56_0404_4P2R_5%
DDR_B_MA4
14
DDR_B_MA2
23
RP34 56_0404_4P2R_5%
M_ODT2
14
DDR_B_MA13
23
RP35
DDR_B_BS#2
14
DDR_CKE2_DIMMB
23
56_0404_4P2R_5%
4
DDR_CLK3
1
C805
2.2P_0402_50V8C
2
DDR_CLK3#
DDR_CLK4
1
C810
2.2P_0402_50V8C
2
DDR_CLK4#
1
2
C834
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
C836
C835
0.1U_0402_16V4Z
1
2
C833
3
+1.8V
JDIMM2
1
VREF
3
DDR_B_D0 DDR_B_D1
DDR_B_DQS#0 DDR_B_DQS0
DDR_B_D2 DDR_B_D3
DDR_B_D8 DDR_B_D11
DDR_B_DQS#1 DDR_B_DQS1
DDR_B_D10 DDR_B_D9
DDR_B_D17 DDR_B_D20
DDR_B_DQS#2 DDR_B_DQS2
DDR_B_D18 DDR_B_D19
DDR_B_D28 DDR_B_D29
DDR_B_DM3
DDR_B_D30 DDR_B_D31
DDR_CKE2_DIMMB8
DDR_B_BS#29
DDR_B_BS#09 DDR_B_WE#9
DDR_B_CAS#9 DDR_SCS#38
M_ODT38
CK_SDATA13,17 CK_SCLK13,17
DDR_CKE2_DIMMB
DDR_B_BS#2 DDR_B_MA12
DDR_B_MA9 DDR_B_MA8
DDR_B_MA5 DDR_B_MA3 DDR_B_MA1
DDR_B_MA10 DDR_B_BS#0 DDR_B_WE#
DDR_B_CAS# DDR_SCS#3
M_ODT3 DDR_B_D32
DDR_B_D37 DDR_B_DQS#4
DDR_B_DQS4 DDR_B_D34
DDR_B_D35 DDR_B_D40
DDR_B_D41 DDR_B_DM5 DDR_B_D42
DDR_B_D43 DDR_B_D48
DDR_B_D49
DDR_B_DQS#6 DDR_B_DQS6
DDR_B_D51 DDR_B_D50
DDR_B_D56 DDR_B_D57 DDR_B_D61
DDR_B_DM7 DDR_B_D59
DDR_B_D58 CK_SDATA
CK_SCLK
+3VS
1
2
1
C776
2.2U_0603_6.3V6K
2
C775
0.1U_0402_16V4Z
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
QTC_C111A-040RP31
SO-DIMM B
DQ4 DQ5
DM0 DQ6
DQ7
DQ12 DQ13
DM1
CK0#
DQ14 DQ15
DQ20 DQ21
DM2
DQ22 DQ23
DQ28 DQ29
DQS3#
DQS3 DQ30
DQ31
NC/CKE1
VDD NC/A15 NC/A14
VDD
VDD
VDD
RAS#
VDD
ODT0
NC/A13
VDD
DQ36 DQ37
DM4
DQ38 DQ39
DQ44 DQ45
DQS5#
DQS5 DQ46
DQ47 DQ52
DQ53
CK1#
DM6
DQ54 DQ55
DQ60 DQ61
DQS7#
DQS7 DQ62
DQ63
SAO
VSS
VSS VSS
VSS
VSS VSS
CK0 VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A11
BA1 S0#
VSS
VSS VSS
VSS
VSS
VSS
VSS
VSS CK1
VSS VSS
VSS
VSS
VSS
VSS SA1
2
+1.8V
V_DDR_MCH_REF
2
DDR_B_D5
4
DDR_B_D4
6 8
DDR_B_DM0
10 12
DDR_B_D6
14
DDR_B_D7
16 18
DDR_B_D12
20
DDR_B_D13
22 24
DDR_B_DM1
26 28
DDR_CLK3
30
DDR_CLK3#
32 34
DDR_B_D14
36
DDR_B_D15
38 40
42
DDR_B_D21
44
DDR_B_D16
46 48 50
NC
A7 A6
A4 A2 A0
NC
52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DDR_B_DM2 DDR_B_D22
DDR_B_D23 DDR_B_D25
DDR_B_D24 DDR_B_DQS#3
DDR_B_DQS3 DDR_B_D26
DDR_B_D27 DDR_CKE3_DIMMB
DDR_B_MA11 DDR_B_MA7 DDR_B_MA6
DDR_B_MA4 DDR_B_MA2 DDR_B_MA0
DDR_B_BS#1 DDR_B_RAS# DDR_SCS#2
M_ODT2 DDR_B_MA13
DDR_B_D33 DDR_B_D36
DDR_B_DM4 DDR_B_D39
DDR_B_D38 DDR_B_D44
DDR_B_D45 DDR_B_DQS#5
DDR_B_DQS5 DDR_B_D46
DDR_B_D47 DDR_B_D52
DDR_B_D53 DDR_CLK4
DDR_CLK4# DDR_B_DM6 DDR_B_D54
DDR_B_D55 DDR_B_D60
DDR_B_DQS#7 DDR_B_DQS7
DDR_B_D62 DDR_B_D63
Close to VREF pins of SO-DIMM
2.2U_0805_10V6K
1
2
DDR_CLK3 8 DDR_CLK3# 8
DDR_CKE3_DIMMB 8
DDR_B_BS#1 9 DDR_B_RAS# 9 DDR_SCS#2 8
M_ODT2 8
DDR_CLK4 8 DDR_CLK4# 8
R824
1 2
10K_0402_5%
12
10K_0402_5%
R825
C751
+3VS
0.1U_0402_16V4Z
1
C752
2
1
V_DDR_MCH_REF 13
REVERSE
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
http://hobi-elektronika.net
3
2005/06/23 2006/06/23
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
DDRII-SODIMM SLOT2
LA-3091
1
14 44Tuesday, January 10, 2006
1.0
of
Page 15
5
PEG_TXN15 PEG_A_TXN_15 PEG_TXP15
PEG_TXN14 PEG_TXP14
C722 0.1U_0201_6.3V6K@
PEG_A_TXN_13
D D
C C
B B
PEG_A_TXP_13
C723 0.1U_0201_6.3V6K@
PEG_RXN[0..15] PEG_RXP[0..15]
PEG_TXP[0..15] PEG_TXN[0..15]
PEG_TXN13 PEG_TXP13
PEG_TXN12 PEG_TXP12
PEG_TXN11 PEG_TXP11
PEG_TXN10 PEG_TXP10
PEG_TXN9 PEG_TXP9
PEG_TXN8 PEG_TXP8
PEG_TXN7 PEG_TXP7
PEG_TXN6 PEG_TXP6
PEG_TXN5 PEG_TXP5
PEG_TXP4 PEG_TXN3
PEG_TXP3 PEG_TXN2
PEG_TXP2 PEG_TXN1
PEG_TXP1
PEG_TXN0 PEG_TXP0
C97 0.1U_0402_16V4Z2@
1 2
C94 0.1U_0402_16V4Z2@
1 2
C93 0.1U_0402_16V4Z2@
1 2
C88 0.1U_0402_16V4Z2@
1 2
C87 0.1U_0402_16V4Z2@
1 2
C83 0.1U_0402_16V4Z2@
1 2
C82 0.1U_0402_16V4Z2@
1 2
C80 0.1U_0402_16V4Z2@
1 2
C79 0.1U_0402_16V4Z2@
1 2
C77 0.1U_0402_16V4Z2@
1 2
C76 0.1U_0402_16V4Z2@
1 2
C73 0.1U_0402_16V4Z2@
1 2
C72 0.1U_0402_16V4Z2@
1 2
C71 0.1U_0402_16V4Z2@
1 2
C70 0.1U_0402_16V4Z2@
1 2
C67 0.1U_0402_16V4Z2@
1 2
C66 0.1U_0402_16V4Z2@
1 2
C65 0.1U_0402_16V4Z2@
1 2
C64 0.1U_0402_16V4Z2@
1 2
C61 0.1U_0402_16V4Z2@
1 2
C59 0.1U_0402_16V4Z2@
1 2
C57 0.1U_0402_16V4Z2@
1 2
C56 0.1U_0402_16V4Z2@
1 2
C55 0.1U_0402_16V4Z2@
1 2
C54 0.1U_0402_16V4Z2@
1 2
C51 0.1U_0402_16V4Z2@
1 2
C50 0.1U_0402_16V4Z2@
1 2
C49 0.1U_0402_16V4Z2@
1 2
C48 0.1U_0402_16V4Z2@
1 2
C44 0.1U_0402_16V4Z2@
1 2
C43 0.1U_0402_16V4Z2@
1 2
C39 0.1U_0402_16V4Z2@
1 2
PEG_RXN[0..15] 10 PEG_RXP[0..15] 10
PEG_TXP[0..15] 10 PEG_TXN[0..15] 10
PEG_A_TXP_15 PEG_A_TXN_14
PEG_A_TXP_14 PEG_A_TXN_13
PEG_A_TXP_13
PEG_A_TXN_12 PEG_A_TXP_12
PEG_A_TXN_11 PEG_A_TXP_11
PEG_A_TXN_10 PEG_A_TXP_10
PEG_A_TXN_9 PEG_A_TXP_9
PEG_A_TXN_8 PEG_A_TXP_8
PEG_A_TXN_7 PEG_A_TXP_7
PEG_A_TXN_6 PEG_A_TXP_6
PEG_A_TXN_5 PEG_A_TXP_5
PEG_A_TXN_4PEG_TXN4 PEG_A_TXP_4
PEG_A_TXN_3 PEG_A_TXP_3
PEG_A_TXN_2 PEG_A_TXP_2
PEG_A_TXN_1 PEG_A_TXP_1
PEG_A_TXN_0 PEG_A_TXP_0
SMB_EC_CK25,27,31 SMB_EC_DA25,27,31 SUSP#23,31,32,35,39,41
C/R_VGA16
Y/G_VGA16 COMP/B_VGA16
VSYNC_VGA16 HSYNC_VGA16
VGA_BLU16 VGA_GRN16 VGA_RED16
SMBCLK_VGA16 SMBDAT_VGA16
SMB_EC_CK2 SMB_EC_DA2
VSYNC_VGA HSYNCVGA
VGA_BLU VGA_GRN VGA_RED
SMBCLK_VGA SMBDAT_VGA
4
JVGA1
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
54
56
56
58
58
60
60
62
62
64
64
66
66
68
68
70
70
72
72
74
74
76
76
78
78
80
80
82
82
84
84
86
86
88
88
90
90
92
92
94
94
96
96
98
98
100
100
102
102
104
104
106
106
108
108
110
110
112
112
114
114
116
116
118
118
120
120
122
122
124
124
126
126
128
128
130
130
132
132
134
134
136
136
138
138
140
140
FOX_QTS0140A-3021
3
2@
1
1 3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99
101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139
3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139
PEG_RXN15 PEG_RXP15
PEG_RXN14 PEG_RXP14
PEG_RXN13 PEG_RXP13
PEG_RXN12 PEG_RXP12
PEG_RXN11 PEG_RXP11
PEG_RXN10 PEG_RXP10
PEG_RXN9 PEG_RXP9
PEG_RXN8 PEG_RXP8
PEG_RXN7 PEG_RXP7
PEG_RXN6 PEG_RXP6
PEG_RXN5 PEG_RXP5
PEG_RXN4 PEG_RXP4
PEG_RXN3 PEG_RXP3
PEG_RXN2 PEG_RXP2
PEG_RXN1 PEG_RXP1
PEG_RXN0 PEG_RXP0
RUNPWROK
PLTRST_VGA# THERMATRIP_VGA# SUSP
CLK_PCIE_VGA# CLK_PCIE_VGA
+5VS +5VALW +12VALW
RUNPWROK PLTRST_VGA# 18,20 THERMATRIP_VGA# 31 SUSP 34,35,40
CLK_PCIE_VGA# 17 CLK_PCIE_VGA 17
DAC_BRIG 31 BKOFF# 31 INVT_PWM 31
LCD EEPROM
LCD_CLK10
LCD_DAT10
LVDS_A0+10 LVDS_A0-10 LVDS_A1+10 LVDS_A1-10 LVDS_A2-10 LVDS_A2+10
LVDS_AC-10 LVDS_AC+10
LVDS_B0-10 LVDS_B0+10 LVDS_B2-10 LVDS_B2+10 LVDS_B1-10 LVDS_B1+10
LVDS_BC-10 LVDS_BC+10
Q20
BSS138LT1G_SOT23
+2.5VS
Q21 BSS138LT1G_SOT23
2N7002_SOT23
EN_LCDVDD10
2
JLVDS1
1@
42
LVDS_A0+ LVDS_A0­LVDS_A1+ LVDS_A1­LVDS_A2­LVDS_A2+
LVDS_AC­LVDS_AC+
LVDS_B0­LVDS_B0+ LVDS_B2­LVDS_B2+ LVDS_B1­LVDS_B1+
LVDS_BC­LVDS_BC+
ACES_88328-4000
+3VS
12
12
R336
1@
2.2K_0402_5%
S
1@
G
G
S
1@
R335
1@
2.2K_0402_5%
D
LCDP_CLK
13
2 2
LCDP_DAT
13
D
+LCDVDD +12VALW +LCDVDD +3VS
1@
1@
R344
470_0402_5%
13
D
Q22
1@
S
R356
100K_0402_5%
2
G
13
2
41
GND
GND
39
40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2
+3VS
37 35 33 31 29
LCDP_CLK
27
LCDP_DAT
25 23 21
PWM
19
DISPLAYOFF#
17 15 13 11
9 7 5 3 1
R4 0_0402_5%1@
INVPWR_B+++
1@
0.1U_0402_16V4Z
1 2
R722
1@
CHENG HANN MCK2012121YZF_0805
1
1
C320
2
2
+3VS
12
G
2
13
D
Q26
SI4410BDY_SO8
1 2 3 6
C321
0.1U_0402_16V4Z
R859
4.7K_0402_5%
BK_EN1
1@
4
1@
Q58
1@
BSS138LT1G_SOT23
BK_EN10 BKOFF#31
10 A, 30 V. RDS(on) = 0.0135 W @ VGS = 10 V RDS(on) = 0.020 W @ VGS = 4.5 V
1@
R355
100K_0402_5%
13
D
2
G
Q23
S
2N7002_SOT23
Q24
1@
DTC124EKAT146_SC59
S
1@
1@
C318
0.1U_0402_16V4Z
12
1@
1@
1 2
R354
150K_0402_5%
1
DAC_BRIG 31 INVT_PWM 31
INVPWR_B+
+LCDVDD
+5VS
5
P
IN1
4
O
IN2
G
U1
1@
3
NC7SZ08P5X_NL_SOT353-5
8 7
5
1@
C323
0.1U_0402_16V4Z
DISPLAYOFF#
4
Q25
1@
2N7002_SOT23
D
S
1 3
G
2
3
INVPWR_B+
8 7
5
1@
C23
B+I
2
2
C308
1
1@
1@
0.1U_0603_25V7K
0.1U_0603_25V7K
C314
Deciphered Date
1
0.1U_0603_25V7K
2005/03/01 2006/03/01
Custom
Title
VGA connector/LVDS Conn
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
2
Date: Sheet
1
of
15 44
B+ B+I
FBM-201209-121LMA40T
L33 CHENG HANN MCK2012121YZF_0805
1 2
0.1U_0603_25V7K
1
C717
2
10U_1206_25V6M
Q1 FDS4435_NL_SO8
1 2
1@
C27
0.1U_0603_25V7K
1@
R27 100K_0402_5%
R357
1@
75K_0402_5%
3 6
+5VS
+3VS
B+P
2
2
C307
1
C309
C313
1
2@
2@
0.1U_0603_25V7K
0.1U_0603_25V7K
1
1
2
0.047U_0402_16V4Z
C310
1
C311
2
2
0.047U_0402_16V4Z
0.047U_0402_16V4Z
C716
R328
2@
FBM-L11-160808-800LMT_0603
1 2
B+I
1 2
R329
2@
FBM-L11-160808-800LMT_0603
+3VS
+1.8VS
A A
0.1U_0402_16V4Z
1
2@
C704
1
2@
C705
2
2
0.1U_0402_16V4Z
B+P
JVGAP1
2@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
ACES_85205-1000
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
Page 16
5
4
3
2
1
1 2 1 2 1 2
1 2
1 2
1 2
Y/G_C
C/R_C
COMP/B_C
+5VS
12
R19
150_0402_1%
12
R18
150_0402_1%
12
R17
150_0402_1%
1
5
P
4
OE#
A2Y
G
U25 74AHCT1G125GW_SOT353-5
3
1
5
P
4
OE#
A2Y
G
U24 74AHCT1G125GW_SOT353-5
3
1
C22 82P_0402_50V8J
2
1
C21 82P_0402_50V8J
2
1
C20 82P_0402_50V8J
2
CRT_R
CRT_G
CRT_B
R339 1K_0402_5%
1 2
1 2
L8 MBK1608301YZF_0603
1 2
L7 MBK1608301YZF_0603
1 2
L6 MBK1608301YZF_0603
12
C14
@
@
3.3P_0402_50V8J
12
R10
75_0402_1%
+5VS
1
2
2
C17 82P_0402_50V8J
1
2
C16 82P_0402_50V8J
1
2
C15 82P_0402_50V8J
1
12
C13
C12
@
3.3P_0402_50V8J
12
R8
R9
75_0402_1%
C305
0.1U_0402_16V4Z
12
3.3P_0402_50V8J
1 2
L3 FCM2012C-800_0805
1 2
L4 FCM2012C-800_0805
1 2
L5
12
FCM2012C-800_0805
75_0402_1%
DDC_MONID0
MSEN#31
L1 FBMA-L11-160808-121LMT_0603
L2 FBMA-L11-160808-121LMT_0603
1 2
1 2
D12
2
DAN217_SC59
DAN217_SC59
1
D9
2
12
C8
3.3P_0402_50V8J
1
@
3
MSEN# CRTR
CRTG
CRTB
@
3
D11
DAN217_SC59
DAN217_SC59
1
D8
2
12
C9
3.3P_0402_50V8J
2
@
3
1
2
1
@
3
C527P_0402_50V8J
DAN217_SC59
1
D7
2
12
C10
3.3P_0402_50V8J
1
2
D10
2
DAN217_SC59
@
3
C627P_0402_50V8J
1
+3VS
1
2
JTV1
1 2
G
S
1 3
D
3 4 5 6 7
SUYIN_33007SR-07T1-C
+5VS
21
+3VS
12
R330
0_0402_5%
2
G
Q19
S
2N7002_SOT23
CRT Connector
16 17
1 2
R322 0_0402_5%2@
1 2
R333 0_0402_5%1@
1 2
R326 0_0402_5%2@
1 2
R332 0_0402_5%1@
SMBDAT_VGA 15
DAT_DDC2 10
SMBCLK_VGA 15 CLK_DDC2 10
SVIDEO_Y SVIDEO_C
SVIDEO_CVBS
@
3
+3VS
+CRT_VCC
+CRT_VCC
12
12
R3252K_0402_5%
R3212K_0402_5%
CRT_DAT
CRT_CLK
1
1
1
C3100P_0402_50V8J
C303100P_0402_50V8J
2
C302100P_0402_50V8J
C4100P_0402_50V8J
2
2
D20
1
RB751V_SOD323
C306
2
0.1U_0402_16V4Z
2
1 3
D
Q18 2N7002_SOT23
JCRT1
6
11
1 7
12
2 8
13
3 9
14
4 10 15
5
FOX_DZ11A91-L7
DA204U
K1 A2
R21 0_0402_5%1@
Y/G10
D D
C C
B B
Y/G_VGA15
C/R10 C/R_VGA15
COMP/B10
COMP/B_VGA15
HSYNC_VGA15 HSYNC10
VSYNC_VGA15 VSYNC10
R342 0_0402_5%2@ R343 0_0402_5%1@
R340 0_0402_5%2@ R341 0_0402_5%1@
1 2
R22 0_0402_5%2@
1 2
R25 0_0402_5%1@
1 2
R26 0_0402_5%2@
1 2
1@
R23 0_0402_5%
1 2
R24 0_0402_5%
1 2
2@
VGA_RED15 VGA_GRN15 VGA_BLU15
CRT_RED10
CRT_GRN10
CRT_BLU10
1 2 1 2
1 2 1 2
R16 0_0402_5%2@ R14 0_0402_5%2@ R12 0_0402_5%2@
R11 0_0402_5%1@
R13 0_0402_5%1@
R15 0_0402_5%1@
CRT_HSYNC
CRT_VSYNC
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
2005/03/01 2006/03/01
Deciphered Date
2
Custom
Title
TV_OUT and CRT CONN
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
Date: Sheet
A1 K2
1
16 44
of
Page 17
5
4
3
2
1
+3VS
12
12
R121
R119
10K_0402_5%
10K_0402_5%
D
ICH_SMBDATA20
D D
ICH_SMBDATA
1 3
2
S
Q4 2N7002_SOT23
G
CK_SDATA
CK_SDATA 13,14
+3VS
2
G
ICH_SMBCLK20
ICH_SMBCLK CK_SCLK
D 1
3
G S
2
2N7002
0 0 1 for Dothan-A 533Mhz 1 0 1 for Dothan-A 400Mhz
FSC FSB FSA CPU
C C
CLKSEL0 CLKSEL1 CLKSEL2
00 0
0
*
0
1
0
1 0
1
0
1
*
1
1
1
1
Table : ICS 954201 / Cypress CY28411
B B
CPU_BSEL06
+VCCP
CPU_BSEL0
1 0 1 0 1 0 0
R486 10K_0402_5%
1 2
R482 10K_0402_5%
1 2
MHz
266 133 200 166 333 100 400
@
@
Q5 2N7002_SOT23
1 3
D
S
CK_VDD_A CK_VDD_REF
1
1
2
2
SRC MHz
C139
PCI MHz
C508
0.047U_0402_16V4Z
4.7U_0805_6.3V6K
100 33.30 100
33.3
100
33.3
100
33.3
100
33.3
100
33.3
100
33.3
RESERVED
R839 8.2K_0402_5%
1 2
R488 1K_0402_5%
CLKSEL0
12
MCH_CLKSEL0 8
CK_VDD_48
C134
C476 33P_0402_50V8J
C487 33P_0402_50V8J
CLK_48M_ICH20
CLK_14M_CODEC28
CLK_33M_139426 CLK_33M_CBS25 CLK_33M_LPCSIO30 CLK_33M_MPCI27 CLK_33M_LAN23 CLK_33M_ICH18 CLK_33M_LPCEC31
CK_SCLK 13,14
1
2
4.7U_0805_6.3V6K
1
2
C133
12
12
+VCCP
R531
@
10K_0402_5%
CPU_BSEL1
A A
1 2
R524
@
10K_0402_5%
1 2
5
R840 8.2K_0402_5%
1 2
R533 1K_0402_5%
CLKSEL1
12
MCH_CLKSEL1 8CPU_BSEL16
4
+3VS
1
C456
2
0.1U_0402_16V4Z
0.047U_0402_16V4Z
Place crystal within 500 mils of CK410
12
X3
14.318MHZ_20P_1BX14318CC1A
R511 33_0402_5%
CLKSEL1
R493 33_0402_1%
CLKSEL0
+3VS
1 2
L25 MBK1608301YZF_0603
+CK_VDD_MAIN2
1 2
L24 MBK1608301YZF_0603
1
2
C123
0.047U_0402_16V4Z
CK_XTAL_IN
CK_XTAL_OUT
R501 12.1_0402_1% R502 12.1_0402_1% R497 33_0402_5% R498 33_0402_5% R491 33_0402_5% R508 33_0402_5% R506 33_0402_5%
1 2
R509 10K_0402_5%
R131 475_0603_1%
+3VS
R513 10K_0402_5%
1 2
CLKSEL2
R512 10K_0402_5%
1 2
+CK_VDD_MAIN
0.047U_0402_16V4Z
2
1
10U_0805_10V4Z
10U_0805_10V4Z
2
1
21 28 34
42
CK_VDD_REF
CK_VDD_48
CLKIREF
48
11
50 49
12 16 53
56
46
47
39
13 29
45 51
12
12
12 12 12 12 12 12 12
1 2
@
1 2
R126 1_0603_5%
1 2
R128 2.2_0603_5%
CLKSEL2
PCICLK5 PCICLK4 PCICLK3 PCICLK2 PCICLKF1
PCICLKF0
CK_SCLK
CK_SDATA
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
http://hobi-elektronika.net
3
1
C457
C444
U31
1 7
5 4 3
9
8
2
6
ICS954226AGLFT_TSSOP56
2
1
2
0.047U_0402_16V4Z
VDD_SRC0 VDD_SRC1 VDD_SRC2
VDD_PCI0 VDD_PCI1
VDD_CPU VDD_REF
VDD_48
XTAL_IN XTAL_OUT
FSA/USB_48 FSB/TEST_MODE FSC/TEST_SEL
PCI5 PCI4 PCI3 PCI2 PCIF1
PCIF0/ITP_EN SCLOCK
SDATA
IREF
VSS_48 VSS_SRC VSS_PCI0 VSS_CPU VSS_REF VSS_PCI1
C137
0.047U_0402_16V4Z
C479
2005/03/01 2006/03/01
0.047U_0402_16V4Z
1
C523
2
0.047U_0402_16V4Z
1
C466
2
R145
2.2_0603_5%
1 2
PCI_STOP#
CPU_STOP#
CPU_2_ITP/SRC_7 CPU_2_ITP/SRC7#
VTT_PWRGD#/PD
1
C511
2
CK_VDD_A
VDD_A
VSS_A
CPU1
CPU1#
CPU0
CPU0#
SRC6
SRC6#
SRC5
SRC5#
SRC4
SRC4#
SRC3
SRC3#
SRC2
SRC2#
SRC1
SRC1#
SRC0
SRC0#
DOT96
DOT96#
REF
Deciphered Date
1
C505
0.047U_0402_16V4Z
2
Place near each pin W>40 mil
Place near CK410M
37 38
H_STP_PCI#
55
H_STP_CPU#
54
CK_CPU1
41 40
44 43
36 35
33 32
31 30
26 27
24 25
22 23
19 20
17 18
14 15
10 52
CK_CPU1#
CK_CPU0 CK_CPU0#
CK_CPU2 CK_CPU2#
CLKREF
1 2
R527 33_0402_5%
1 2
R534 33_0402_5%
1 2
R514 33_0402_5%
1 2
R521 33_0402_5%
1 2
R539 33_0402_5%
1 2
R544 33_0402_5%
1 2
R549 33_0402_5%
SRC5# CLK_MCH_3GPLL#
1 2
R554 33_0402_5%
SRC4
1 2
R553 33_0402_5%
SRC4#
1 2
R558 33_0402_5%
SRC1
1 2
R543 33_0402_5%
SRC1#
1 2
R548 33_0402_5%
SRC0
1 2
R142 33_0402_5%1@
SRC0#
1 2
R538 33_0402_5%1@
DOT96
1 2
R520 33_0402_5%1@
DOT96# DREFCLK#
1 2
R526 33_0402_5%1@
CLK_14M_ICH
1 2
R499
12.1_0402_1% R503
12.1_0402_1%
1 2
2
CLK_14M_SIO
H_STP_PCI# 20 H_STP_CPU# 20,42
CLK_MCH_BCLK CLK_MCH_BCLK#
CLK_CPU_BCLK CLK_CPU_BCLK#
CLK_ITP CLK_ITP#
CLK_MCH_3GPLLSCR5
CLK_PCIE_VGA CLK_PCIE_VGA#
CLK_PCIE_ICH CLK_PCIE_ICH#
SSC_DREFCLK SSC_DREFCLK#
DREFCLK
CLK_MCH_BCLK CLK_MCH_BCLK# CLK_CPU_BCLK CLK_CPU_BCLK# CLK_ITP CLK_ITP# CLK_PCIE_VGA CLK_PCIE_VGA# CLK_PCIE_ICH CLK_PCIE_ICH# CLK_MCH_3GPLL CLK_MCH_3GPLL#
SSC_DREFCLK SSC_DREFCLK# DREFCLK DREFCLK#
CLK_MCH_BCLK 8 CLK_MCH_BCLK# 8
CLK_CPU_BCLK 5 CLK_CPU_BCLK# 5
CLK_ITP 5 CLK_ITP# 5
CLK_MCH_3GPLL 10 CLK_MCH_3GPLL# 10
CLK_PCIE_VGA 15 CLK_PCIE_VGA# 15
CLK_PCIE_ICH 20 CLK_PCIE_ICH# 20
SSC_DREFCLK 8 SSC_DREFCLK# 8
DREFCLK 8 DREFCLK# 8
CLK_14M_ICH 20
CLK_14M_SIO 30
Custom
Title
Clock Generator
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
Date: Sheet
12
R528 49.9_0402_1%
12
R535 49.9_0402_1%
12
R515 49.9_0402_1%
12
R522 49.9_0402_1%
12
R540 49.9_0402_1%
12
R545 49.9_0402_1%
1 2
R552 49.9_0402_1%
1 2
R557 49.9_0402_1%
1 2
R542 49.9_0402_1%
1 2
R547 49.9_0402_1%
1 2
R550 49.9_0402_1%
1 2
R555 49.9_0402_1%
1 2
R146 49.9_0402_1%1@
1 2
R537 49.9_0402_1%1@
1 2
R519 49.9_0402_1%1@
1 2
R525 49.9_0402_1%1@
+3VS
12
R742 10K_0402_5%
R744
13
D
10K_0402_5%
1 2
2
Q45
S
2N7002_SOT23
G
1
2
1
VGATE 8,20,42
C635
0.047U_0402_16V4Z
of
17 44
Page 18
5
4
3
2
1
RP4
+3VS
D D
+3VS
+3VS
1 8 2 7 3 6 4 5
8.2K_0804_8P4R_5%
RP5
1 8 2 7 3 6 4 5
8.2K_0804_8P4R_5%
RP3
1 8 2 7 3 6 4 5
8.2K_0804_8P4R_5%
+3VS
+3VS
C C
PCI_SERR# PCI_FRAME# PCI_TRDY# PCI_STOP#
PCI_IRDY# PCI_PLOCK# PCI_DEVSEL# PCI_PERR#
PCI_PIRQD# PCI_PIRQB# PCI_PIRQH# PCI_PIRQC#
1 2 1 2 1 2 1 2
1 2 1 2 1 2 1 2
1 2 1 2 1 2
R4808.2K_0402_5% R4758.2K_0402_5% R848.2K_0402_5% R728.2K_0402_5%
R4478.2K_0402_5% R708.2K_0402_5% R888.2K_0402_5% R4738.2K_0402_5%
R4488.2K_0402_5% R4788.2K_0402_5% R868.2K_0402_5%
PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQA#
PCI_REQ0# PCI_REQ1# PCI_REQ3# PCI_REQ4#
PCI_REQ2# PCI_REQ5# PCI_REQ6#
PCI_AD[0..31]23,25,26,27
PCI_FRAME#23,25,26,27
PCI_PIRQA#25 PCI_PIRQB#25
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_FRAME#
PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
U7B
E2
AD[0]
E5
AD[1]
C2
AD[2]
F5
AD[3]
F3
AD[4]
E9
AD[5]
F2
AD[6]
D6
AD[7]
E6
AD[8]
D3
AD[9]
A2
AD[10]
D2
AD[11]
D5
AD[12]
H3
AD[13]
B4
AD[14]
J5
AD[15]
K2
AD[16]
K5
AD[17]
D4
AD[18]
L6
AD[19]
G3
AD[20]
H4
AD[21]
H2
AD[22]
H5
AD[23]
B3
AD[24]
M6
AD[25]
B2
AD[26]
K6
AD[27]
K3
AD[28]
A5
AD[29]
L1
AD[30]
K4
AD[31]
J3
FRAME#
Interrupt I/F
N2
PIRQ[A]#
L2
PIRQ[B]#
M1
PIRQ[C]#
L3
PIRQ[D]#
AC5
SATA[1]RXN/RSVD[1]
AD5
SATA[1]RXP/RSVD[2]
AF4
SATA[1]TXN/RSVD[3]
AG4
SATA[1]TXP/RSVD[4]
AC9
SATA[3]RXN/RSVD[5]
AD9
SATA[3]RXP/RSVD[6]
AF8
SATA[3]TXN/RSVD[7]
AG8
SATA[3]TXP/RSVD[8]
U3
TP[3]/RSVD[9]
ICH6_BGA609
PCI
REQ[4]#/GPI[40]
GNT[4]#/GPO[48]
REQ[5]#/GPI[1]
GNT[5]#/GPO[17]
REQ[6]#/GPI[0]
GNT[6]#/GPO[16]
PIRQ[E]#/GPI[2] PIRQ[F]#/GPI[3]
PIRQ[G]#GPI[4]
PIRQ[H]#/GPI[5]
RESERVED
REQ[0]# GNT[0]# REQ[1]# GNT[1]# REQ[2]# GNT[2]# REQ[3]# GNT[3]#
C/BE[0]# C/BE[1]# C/BE[2]# C/BE[3]#
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR# STOP# TRDY#
PLTRST#
PCICLK
PME#
L5 C1 B5 B6 M5 F1 B8 C8 F7 E7 E8 F6 B7 D8
J6 H6 G4 G2
A3 E1 R2 C3 E3 C5 G5 J1 J2
R5 G6 P6
D9 C7 C6 M3
PCI_REQ0# PCI_GNT0# PCI_REQ1# PCI_GNT1# PCI_REQ2# PCI_GNT2# PCI_REQ3# PCI_GNT3# PCI_REQ4# PCI_GNT4# PCI_REQ5#
PCI_REQ6#
PCI_C_BE0# PCI_C_BE1# PCI_C_BE2# PCI_C_BE3#
PCI_IRDY# PCI_PAR PCI_PCIRST# PCI_DEVSEL# PCI_PERR# PCI_PLOCK# PCI_SERR# PCI_STOP# PCI_TRDY#
PLTRST# CLK_33M_ICH ICH_PME#
PCI_PIRQE#PCI_PIRQA# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH#
PCI_REQ0# 23 PCI_GNT0# 23 PCI_REQ1# 25 PCI_GNT1# 25 PCI_REQ2# 26 PCI_GNT2# 26 PCI_REQ3# 27 PCI_GNT3# 27
PCI_C_BE0# 23,25,26,27 PCI_C_BE1# 23,25,26,27 PCI_C_BE2# 23,25,26,27 PCI_C_BE3# 23,25,26,27
PCI_ I RDY# 23,25,26,27 PCI_PAR 23,25,26,27 PCI_PCIRST# 25 PCI_DEVSEL# 23,25,26,27 PCI_PERR# 23,25,26,27
PCI_SERR# 23,25,27 PCI_STOP# 23,25,26,27 PCI_TRDY# 23,25,26,27
PLTRST# 20 CLK_33M_ICH 17
ICH_PME# 23,25,27,30,31
PCI_PIRQE# 26 PCI_PIRQF# 23 PCI_PIRQG# 27 PCI_PIRQH# 27
+3VALW
1 2
R724 10K_0402_5%
ICH_PME#
CLK_33M_ICH
R472
@
10_0402_5%
1 2
CLK_ICH_TERM
1
C410
@
8.2P_0402_50V8J~D
2
C350
B B
BATT1
ML1220T13RE
45@
A A
5
+RTCVCC
2
1
12
3
D16 BAS40-04_SOT23
PLTRST#
4
+3V
http://hobi-elektronika.net
0.1U_0402_16V4Z
U29A
14
74VHC08MTCX_NL_TSSOP14
1
P
A
O
2
B
G
7
12
3
PLTRST_VGA# 15,20
PCI_PCIRST#
+3V
U29B
14
74VHC08MTCX_NL_TSSOP14
4
P
A
PCIRSTB2#
6
O
5
B
G
7
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
R446 0_0402_5%
1 2
R445 0_0402_5%
1 2
2005/03/01 2006/03/01
PLTRST_SIO# 30
PLTRST_MCH# 8
Deciphered Date
2
+3VCHGRTC
14
10
P
A
9
B
G
7
+3V
14
13
P
A
12
B
G
7
U29C 74VHC08MTCX_NL_TSSOP14
8
O
U29D 74VHC08MTCX_NL_TSSOP14
11
O
Custom
Title
Size Document Number Rev
Date: Sheet
PCIRST# 23,25,26,27,31
ICH6(1/4)-PCI/INT
LA-3091 1.0
Tuesday, Janua ry 10, 2006
1
of
18 44
Page 19
5
C62 15P_0603_50V8J
12
Package
D D
+RTCVCC
12
R469 1M_0402_5%
INTRUDER#
C68 15P_0603_50V8J
12
INTRUDER#
9.6X4.06 mm
32.768KHZ_1TJS125BJ4A421P
1 2
+RTCVCC
1
X1
R467 180K_0402_5%
1 2
CMOS_CLR1
@
SHORT PADS
1
2
1 2
C400 0.1U_0402_16V4Z
INTVRMEN
ENABLE IN TEGR A TED VCCSUS1.5 VRMHIGH
LOW
*
IAC_BITCLK28,33
C C
IAC_SDATO_MDC33
B B
IAC_SYNC_MDC33
IAC_RST#_MDC33
R96 33_0402_5%
1 2
R92 33_0402_5%
1 2
R105 33_0402_5%
1 2
R483
@
10_0402_5%
ICH_AC_SDOUT_R
ICH_AC_SYNC_R
ICH_AC_RST_R#
IAC_SYNC28
IAC_RST#28 IAC_SDATAI128
IAC_SDATAI233
1 2
IAC_SDATO28
ICH_AC_BITCLK_TERM
2
C458
10P_0402_50V8J@
1
DISABLE INTEGRATED VCCSUS1.5 VRM
IDE_HIORDY22 IDE_HIRQ22 IDE_HDACK#22 IDE_HDIOW#22 IDE_HDIOR#22
4
ICH_RTCX1
12
R68 10M_0402_5%
ICH_RTCX2 ICH_RTCRST# INTRUDER#
R474
@
0_0402_5%
2
1 2 1 2
1 2
1 2
R9133_0402_5% R10433_0402_5%
R9533_0402_5%
12
R471
0_0402_5%
ICH_AC_SYNC_R ICH_AC_RST_R# IAC_SDATAI1
IAC_SDATAI2
ICH_AC_SDOUT_R
1 2
R101 24.9_0603_1%
IDE_HDIORDY IDE_HIRQ IDE_HDDACK# IDE_HDIOW# IDE_DDREQ IDE_HDIOR#
+3VS +3VS
12
R114
4.7K_0402_5%
IDE_HDIORDY IDE_HIRQ
Y1
Y2 AA2 AA3
AA5
D12 B12 D11 F13
F12 B11 E12
E11 C13
C12 C11 E13
C10
B9 A10 F11
F10 B10
C9
AC19
AE3
AD3 AG2
AF2
AD7 AC7
AF6
AG6 AC2
AC1
AG11 AF11
AF16 AB16 AB15 AC14 AE16
12
R504 10K_0402_5%
U7A
RTCX1 RTCX2
RTCRST# INTRUDER#
INTVRMEN
EE_CS EE_SHCLK EE_DOUT EE_DIN
LAN_CLK LAN_RSTSYNC LANRXD[0]
LANRXD[1] LANRXD[2]
LANTXD[0] LANTXD[1] LANTXD[2]
ACZ_BIT_CLK ACZ_SYNC
ACZ_RST# ACZ_SDIN[0]
ACZ_SDIN[1] ACZ_SDIN[2]
ACZ_SDO
SATALED#
SATA[0]RXN SATA[0]RXP SATA[0]TXN SATA[0]TXP
SATA[2]RXN SATA[2]RXP SATA[2]TXN SATA[2]TXP
SATA_CLKN SATA_CLKP
SATARBIAS# SATARBIAS
IORDY IDEIRQ DDACK# DIOW# DIOR#
ICH6_BGA609
RTC
LAD[0]/FWH[0] LAD[1]/FWH[1] LAD[2]/FWH[2] LAD[3]/FWH[3]
LPC
LDRQ[0]#
LDRQ[1]#/GPI[41]
LFRAME#/FWH[4]
A20GATE
A20M#
LAN
CPUSLP#
CPU
DPRSLP#/TP[4]
DPSLP#/TP[2]
FERR#
CPUPWRGD/GPO[49]
IGNNE#
INIT3_3V#
RCIN#
STPCLK#
THRMTRIP#
DCS1# DCS3#
SATAAC-97/AZALIA
PIDE
DD[10] DD[11] DD[12] DD[13] DD[14] DD[15]
DDREQ
INIT#
INTR
SMI#
DA[0] DA[1] DA[2]
DD[0] DD[1] DD[2] DD[3] DD[4] DD[5] DD[6] DD[7] DD[8] DD[9]
3
LPC_LAD0
P2
LPC_LAD1
N3
LPC_LAD2
N5
LPC_LAD3
N4
LPC_LDRQ0#
N6
LPC_LDRQ1#
P4
LPC_LFRAME#
P3
AF22 AF23
CPUSLP#
AE27
DPRSLP#
AE24 AD27
H_FERR#
AF24 AG25 AG26
AE22 AF27 AG24
KBRST#
AD23 AF25
NMI
AG27 AE26
THRMTRIP_ICH#
AE23
IDE_DA0
AC16
IDE_DA1
AB17
IDE_DA2
AC17
IDE_DCS1#
AD16
IDE_DCS3#
AE17
IDE_HDD0
AD14
IDE_HDD1
AF15
IDE_HDD2
AF14
IDE_HDD3
AD12
IDE_HDD4
AE14
IDE_HDD5
AC11
IDE_HDD6
AD11
IDE_HDD7
AB11
IDE_HDD8
AE13
IDE_HDD9
AF13
IDE_HDD10
AB12
IDE_HDD11
AB13
IDE_HDD12
AC13
IDE_HDD13
AE15
IDE_HDD14
AG15
IDE_HDD15
AD13
AB14
LPC_LAD[0..3] 30,31
LPC_LDRQ0# LPC_LDRQ1# 30
LPC_LFRAME# 30,31
GATEA20 31 H_A20M# 5
R161 0_0402_5% R551 0_0402_5%
H_DPSLP# 5 H_FERR# 5 H_PWRGOOD 5 H_IGNNE# 5 H_INIT# 5
H_INTR 5
KBRST# 31
H_NMI 5 H_SMI# 5
H_STPCLK# 5
1 2
R541 56_0402_5%
IDE_HDA0 22 IDE_HDA1 22 IDE_HDA2 22
IDE_HDCS1# 22 IDE_HDCS3# 22
IDE_HDD[0..15] 22
1 2
R496 0_0402_5%
Note : R169 Do not populate for Dothan-A Populte for Dothan-B.
12 12
IDE_HDREQ
2
C461
1
33P_0402_50V8J
2
H_THERMTRIP# 5,8
IDE_HDREQ 22
H_CPUSLP# 5,8 H_DPRSLP# 5
1
H_FERR#
H_DPRSLP#
Note : R161 Populte zero ohm for Dothan-A, no stuff for Dothan-B. R551 no stuff for Dothan-A, Populte zero ohm for Dothan-B. Stuff R546 for Dothan B, no stuff R352 for Dothan A
R143 56_0402_5%
R546 56_0402_5%
+VCCP
12
12
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
2005/03/01 2006/03/01
Deciphered Date
Title
ICH6(2/4)-IDE/SATA/AC97/CPU
Size Document Number Rev
LA-3091 1.0
Custom
Tuesday, Janua ry 10, 2006
2
Date: Sheet
1
of
19 44
Page 20
5
+3VSUS
R461
D D
ICH_SMBDATA17 ICH_SMBCLK17
R828 10K_0402_5%
C C
+3VSUS
1 2
R457 10K_0402_5%
1 2
R69 10K_0402_5%
1 2
R456 10K_0402_5%
1 2
R455 10K_0402_5%
1 2
R451 680_0402_5%
1 2
2.2K_0402_5%
LID_SWOUT#
LINKALERT#
SYS_RESET#
ACINA
ICH_BATLOW#
ICH_PCIE_W AKE# SIRQ
+3VSUS
R460
2.2K_0402_5%
1 2
R450
R449
10K_0402_5%
10K_0402_5%
1 2
ACIN31,37,38
1 2
1 2
R761 10K_0402_5%
1 2
+3V
(PCI Express Wake Event)
+3VS
B B
+3VS
+3VS
+3VS
1 2
R125 10K_0402_5%
R529 8.2K_0402_5%
1 2
R130 10K_0402_5%
1 2
R518 10K_0402_5%
1 2
CLKRUN#
SIO_THRM#
MCH_SYNC#
SIRQ
2 1
D15
RB751V_SOD323
R725 39K_0402_5%
1 2
ICH_SMBDATA ICH_SMBCLK ICH_SMLINK0 ICH_SMLINK1
@
1 3
D
1 2
R729 0_0402_5%@
EC_THRM# 31
4
2
G
Q47 2N7002_SOT23
S
3
+3VSUS
+3VS
12
12
R71
R117
10K_0402_5%
10K_0402_5%
1 2
R120 33_0402_5%@
ICH_SMBCLK ICH_SMBDATA LINKALERT# ICH_SMLINK0 ICH_SMLINK1 MCH_SYNC#
SPKR29
PM_BMBUSY#8
+3VS
@
EC_SMI#31
LID_SWOUT#31
EC_SCI#31
H_STP_PCI#17
H_STP_CPU#17,42
+3V
PLTRST_VGA#15,18 IDE_HRESET#22 IDE_DRESET#22
EC_FLASH#32
CLKRUN#23,25,27,30,31
SIRQ25,30,31
VGATE8,17,42
T32 PAD@
SLP_S3#31 SLP_S4#31
SLP_S5#31 ICH_PWRGD31 PM_DPRSLPVR42 ICH_BATLOW#31 PWRBTN_OUT#31
PLTRST#18
RSMRST#31
SPKR
T30 PAD@
SYS_RESET# PM_BMBUSY#
R510 10K_0402_5%
1 2
EC_SMI# LID_SWOUT# ACINA
EC_SCI# H_STP_PCI#
H_STP_CPU#
R507 10K_0402_5%@
1 2
R536 0_0402_5%@
1 2
CLKRUN#
ICH_PCIE_W AKE#
R746 0_0402_5%
SIO_THRM# VGATE CLK_14M_ICH CLK_48M_ICH
ICH_SUSCLK
SLP_S3# SLP_S4# SLP_S5#
ICH_PWRGD PM_DPRSLPVR ICH_BATLOW# PWRBTN_OUT# PLTRST# RSMRST#
ICH_RI#
1 2
12
T2
AF17 AE18 AF18 AG18
Y4
W5
Y5 W4 U6
AG21
F8 W3 U2
AD19 AE19
R1 W6 M2
R6
AC21 AB21 AD22
AD20 AD21
V3
P5 R3
T3
AF19 AF20 AC18
U5
AB20 AC20 AF21
E10 A27
V6
T4
T5
T6
AA1
AE20
V2 U1
V5
Y3
12
U7C
RI# SATA[0]GP/GPI[26]
SATA[1]GP/GPI[29] SATA[2]GP/GPI[30] SATA[3]GP/GPI[31]
SMBCLK SMBDATA LINKALERT# SMLINK[0] SMLINK[1] MCH_SYNC# SPKR
SUS_STAT#/LPCPD# SYS_RESET# BM_BUSY#/GPI[6] GPI[7]
GPI[8] SMBALERT#/GPI[11] GPI[12]
GPI[13] STP_PCI#/GPO[18] GPO[19] STP_CPU#/GPO[20]
GPO[21] GPO[23]
GPIO[24] GPIO[25]
GPIO[27] GPIO[28] CLKRUN#/GPIO[32] GPIO[33] GPIO[34]
WAKE# SERIRQ THRM# VRMPWRGD CLK14 CLK48 SUSCLK SLP_S3#
SLP_S4# SLP_S5#
PWROK DPRSLPVR/TP[1] BATLOW#/TP[0] PWRBTN# LAN_RST# RSMRST#
ICH6_BGA609
GPIO
CLOCK
POWER MGT
PERn[1] PERp[1] PETn[1] PETp[1]
PERn[2] PERp[2] PETn[2] PETp[2]
PERn[3] PERp[3] PETn[3] PETp[3]
PERn[4] PERp[4] PETn[4]
PCI-EXPRESSDIRECT MEDIA INTERFACE
PETp[4]
DMI[0]RXN DMI[0]RXP DMI[0]TXN
DMI[0]TXP
DMI[1]RXN DMI[1]RXP DMI[1]TXN
DMI[1]TXP
DMI[2]RXN DMI[2]RXP DMI[2]TXN
DMI[2]TXP
DMI[3]RXN DMI[3]RXP DMI[3]TXN
DMI[3]TXP
DMI_CLKN DMI_CLKP
DMI_ZCOMP
DMI_IRCOMP
OC[4]#/GPI[9] OC[5]#/GPI[10] OC[6]#/GPI[14] OC[7]#/GPI[15]
OC[0]# OC[1]# OC[2]# OC[3]#
USBP[0]N USBP[0]P USBP[1]N USBP[1]P USBP[2]N USBP[2]P USBP[3]N USBP[3]P
USB
USBP[4]N USBP[4]P USBP[5]N USBP[5]P USBP[6]N USBP[6]P USBP[7]N USBP[7]P
USBRBIAS#
USBRBIAS
H25 H24 G27 G26
K25 K24 J27 J26
M25 M24 L27 L26
P24 P23 N27 N26
T25 T24 R27 R26
V25 V24 U27 U26
Y25 Y24 W27 W26
AB24 AB23 AA27 AA26
AD25 AC25
F24 F23 C23
D23 C25 C24
C27 B27 B26 C26
C21 D21 A20 B20 D19 C19 A18 B18 E17 D17 B16 A16 C15 D15 A14 B14
A22 B22
T21 PAD@ T40 PAD@ T23 PAD@ T22 PAD@
DMI_RXN0 DMI_RXP0 DMI_TXN0 DMI_TXP0
DMI_RXN1 DMI_RXP1 DMI_TXN1 DMI_TXP1
DMI_RXN2 DMI_RXP2 DMI_TXN2 DMI_TXP2
DMI_RXN3 DMI_RXP3 DMI_TXN3 DMI_TXP3
CLK_PCIE_ICH# CLK_PCIE_ICH
DMI_IRCOMP OVCUR#4
OVCUR#5 OVCUR#6 OVCUR#7
OVCUR#0 OVCUR#1 OVCUR#2 OVCUR#3
USBP0­USBP0+ USBP1­USBP1+ USBP2­USBP2+ USBP3­USBP3+ USBP4­USBP4+ USBP5­USBP5+ USBP6­USBP6+ USBP7­USBP7+
USBRBIAS
2
DMI_RXN0 8
DMI_RXP0 8 DMI_TXN0 8 DMI_TXP0 8
DMI_RXN1 8
DMI_RXP1 8 DMI_TXN1 8 DMI_TXP1 8
DMI_RXN2 8
DMI_RXP2 8 DMI_TXN2 8 DMI_TXP2 8
DMI_RXN3 8
DMI_RXP3 8 DMI_TXN3 8 DMI_TXP3 8
CLK_PCIE_ICH# 17 CLK_PCIE_ICH 17
R517 24.9_0603_1%
1 2
OVCUR#4 34
OVCUR#5 34
OVCUR#0 34
OVCUR#1
OVCUR#3 34
USBP0- 34
USBP0+ 34
USBP1-
USBP1+
USBP2- 33
USBP2+ 33
USBP3- 34
USBP3+ 34
USBP4- 34
USBP4+ 34
USBP5- 34
USBP5+ 34
USBP6-
USBP6+
USBP7-
USBP7+
1 2
R141
22.6_0603_1%
closed to 500 mils
+1.5VS
OVCUR#0
R781 10K_0402_5%
1
C856 1U_0603_10V6K
2
OVCUR#1
R782 10K_0402_5%
OVCUR#2
R783 10K_0402_5%
OVCUR#3
R784 10K_0402_5%
OVCUR#4
R785 10K_0402_5%
OVCUR#5
R786 10K_0402_5%
1
C858 1U_0603_10V6K
2
OVCUR#6
R787 10K_0402_5%
OVCUR#7
R788 10K_0402_5%
1 2
1 2 1 2 1 2
1 2 1 2
1 2 1 2
1
+3VSUS
R75
10K_0402_5%
10K_0402_5%
R459
@
1 2
CK_14M_ICH_TERM
2
@
1
CLK_14M_ICH CLK_48M_ICH
R487
1 2
10_0402_5%
CK_48M_ICH_TERM
2
C455
1
4.7P_0402_50V8C
R556
10_0402_5%
@
C520
@
4.7P_0402_50V8C
PM_DPRSLPVR
May need pulldown for DPRSLPVR in case the ICH6m does not set this value in time for boot.
4
R516
@
R523
@
+3VS
1 2
1K_0402_5%
12
100K_0402_5%
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
http://hobi-elektronika.net
3
2005/03/01 2006/03/01
Deciphered Date
Title
ICH6(3/4)-USB/DMI/PCIE/GPIO
Size Document Number Rev
LA-3091 1.0
Custom
Tuesday, Janua ry 10, 2006
2
Date: Sheet
1
of
20 44
CLK_14M_ICH17 CLK_48M_ICH17
A A
5
Page 21
5
Near PIN F27(C968),
L27 0_0603_5%
ICH_V5REF_SUS
2
C506
0.1U_0402_16V4Z
1
1 2
C706
0.1U_0402_16V4Z
1
2
+1.5VS
D D
+3VSUS+5VALW
D5
RB751V_SOD323
1 2
21
2
C136 1U_0603_10V4Z
1
R129
10_0402_5%
C C
Near PIN F21
+3VS
+5VS
D4
10_0402_5%
1U_0603_10V4Z
R103
RB751V_SOD323
1 2
C115
21
2
1
2
C485
0.1U_0402_16V4Z
1
ICH_V5REF_RUN
2
C439
0.1U_0402_16V4Z
1
P27(C949), AB27(C950)
+1.5VRUN_L
1
+
2
C524
220U_D2_4VM
0.1U_0402_16V4Z
1
1
C708
C707
2
2
+1.5VS
Near PIN AG5
Near PIN AG9
0.1U_0402_16V4Z
Near PIN A8
+1.5VR
C110
0.1U_0402_16V4Z
ICH6_VCCPLL
1
C519
2
0.01U_0402_16V7K
+3VS
C514
Near PIN E26, E27
+3VSUS
+1.5VS
2
1
0.1U_0402_16V4Z
Near PIN A17
B B
+3VALW +3VSUS
1
C111
0.1U_0402_16V4Z
2
R559
U8 APL5301-15DC-TRL_3P
Vin2Vout
GND
1
L28
MBK1608301YZF_0603
1 2
5
3
1
2
2
C517
1
0.1U_0402_16V4Z
Near PIN AC27
R778 0_0805_5%
+1.5VS
A A
1 2
1_0402_5%
2
C521
C513
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C709
C710
2
+1.5VS
C395
0.1U_0402_16V4Z
Near PIN AE1
2
C490
1
4
2
1
1
2
C405
C426
2
1
0.1U_0402_16V4Z
4
2
C501
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C711
2
2
1
0.1U_0402_16V4Z
2
1
0.1U_0402_16V4Z
ICH6_VCCPLL
+3VS
+3VS
+3VSUS
2
C489
1
3
U7E
AA22
VCC1_5[1]
AA23
VCC1_5[2]
AA24
VCC1_5[3]
AA25
VCC1_5[4]
AB25
VCC1_5[5]
AB26
VCC1_5[6]
AB27
VCC1_5[7]
F25
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
VCC1_5[8]
F26
VCC1_5[9]
F27
VCC1_5[10]
G22
VCC1_5[11]
G23
VCC1_5[12]
G24
VCC1_5[13]
G25
VCC1_5[14]
H21
VCC1_5[15]
H22
VCC1_5[16]
J21
VCC1_5[17]
J22
VCC1_5[18]
K21
VCC1_5[19]
K22
VCC1_5[20]
L21
VCC1_5[21]
L22
VCC1_5[22]
M21
VCC1_5[23]
M22
VCC1_5[24]
N21
VCC1_5[25]
N22
VCC1_5[26]
N23
VCC1_5[27]
N24
VCC1_5[28]
N25
VCC1_5[29]
P21
VCC1_5[30]
P25
VCC1_5[31]
P26
VCC1_5[32]
P27
VCC1_5[33]
R21
VCC1_5[34]
R22
VCC1_5[35]
T21
VCC1_5[36]
T22
VCC1_5[37]
U21
VCC1_5[38]
U22
VCC1_5[39]
V21
VCC1_5[40]
V22
VCC1_5[41]
W21
VCC1_5[42]
W22
VCC1_5[43]
Y21
VCC1_5[44]
Y22
VCC1_5[45]
AA6
VCC1_5[46]
AB4
VCC1_5[47]
AB5
VCC1_5[48]
AB6
VCC1_5[49]
AC4
VCC1_5[50]
AD4
VCC1_5[51]
AE4
VCC1_5[52]
AE5
VCC1_5[53]
AF5
VCC1_5[54]
AG5
VCC1_5[55]
AA7
VCC1_5[56]
AA8
VCC1_5[57]
AA9
VCC1_5[58]
AB8
VCC1_5[59]
AC8
VCC1_5[60]
AD8
VCC1_5[61]
AE8
VCC1_5[62]
AE9
VCC1_5[63]
AF9
VCC1_5[64]
AG9
VCC1_5[65]
AC27
VCCDMIPLL
E26
VCC3_3[1]
AE1
VCCSATAPLL
AG10
VCC3_3[22]
A13
VCCLAN3_3/VCCSUS3_3[1]
F14
VCCLAN3_3/VCCSUS3_3[2]
G13
VCCLAN3_3/VCCSUS3_3[3]
G14
VCCLAN3_3/VCCSUS3_3[4]
A11
VCCSUS3_3[1]
U4
VCCSUS3_3[2]
V1
VCCSUS3_3[3]
V7
VCCSUS3_3[4]
W2
VCCSUS3_3[5]
Y7
VCCSUS3_3[6]
A17
VCCSUS3_3[7]
B17
VCCSUS3_3[8]
C17
VCCSUS3_3[9]
F18
VCCSUS3_3[10]
G17
VCCSUS3_3[11]
G18
VCCSUS3_3[12]
ICH6_BGA609
PCIE
SATA
VCCLAN1_5/VCCSUS1_5[2] VCCLAN1_5/VCCSUS1_5[1]
COREIDE
PCIUSB
USB CORE
PCI/IDE RBP
VCC1_5[98] VCC1_5[97] VCC1_5[96] VCC1_5[95] VCC1_5[94] VCC1_5[93] VCC1_5[92] VCC1_5[91] VCC1_5[90] VCC1_5[89] VCC1_5[88] VCC1_5[87] VCC1_5[86] VCC1_5[85] VCC1_5[84] VCC1_5[83] VCC1_5[82] VCC1_5[81] VCC1_5[80] VCC1_5[79]
VCC3_3[21] VCC3_3[20] VCC3_3[19] VCC3_3[18] VCC3_3[17] VCC3_3[16] VCC3_3[15] VCC3_3[14] VCC3_3[13] VCC3_3[12]
VCC3_3[11] VCC3_3[10]
VCC3_3[9] VCC3_3[8] VCC3_3[7] VCC3_3[6] VCC3_3[5] VCC3_3[4] VCC3_3[3] VCC3_3[2]
VCCSUS1_5[3] VCCSUS1_5[2]
VCCSUS1_5[1]
VCC1_5[78] VCC1_5[77] VCC1_5[76] VCC1_5[75] VCC1_5[74] VCC1_5[73] VCC1_5[72] VCC1_5[71] VCC1_5[70] VCC1_5[69] VCC1_5[68]
VCC1_5[67]
VCC2_5[4] VCC2_5[2]
V5REF[2]
V5REF[1] V5REF_SUS VCCUSBPLL
VCCSUS3_3[20]
VCCRTC
V_CPU_IO[3] V_CPU_IO[2] V_CPU_IO[1]
VCCSUS3_3[19] VCCSUS3_3[18] VCCSUS3_3[17] VCCSUS3_3[16] VCCSUS3_3[15] VCCSUS3_3[14] VCCSUS3_3[13]
F9 U17 U16 U14 U12 U11 T17 T11 P17 P11 M17 M11 L17 L16 L14 L12 L11 AA21 AA20 AA19
AA10 AG19 AG16 AG13 AD17 AC15 AA17 AA15 AA14 AA12
P1 M7 L7 L4 J7 H7 H1 E4 B1 A6
U7 R7
G19 G20
F20 E24 E23 E22 E21 E20 D27 D26 D25 D24
G8 AB18
P7 AA18
A8 F21 A25
A24 AB3 G11
G10 AG23
AD26 AB22
G16 G15 F16 F15 E16 D16 C16
+1.5VS
+1.5VR
C488
0.1U_0402_16V4Z
ICH_V5REF_RUN
ICH_V5REF_SUS
C462
C396
1
2
+1.5VS
1
2
2
1
2
1
+1.5VS
+RTCVCC
+1.5VS
+VCCP
C509
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C484
1
2
C394
1
+3VSUS
+3VS
Near PIN AG13, AG16
0.1U_0402_16V4Z
+3VS
2
C425
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Near PIN A2-A6, D1-H1
+1.5VR
2
1
1
2
C440
0.1U_0402_16V4Z
Near PIN U7
+2.5VS
1
2
Near PIN AB18
Near PIN AG23
+3VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C435
0.1U_0402_16V4Z
C486
C467
1 2
C447
1 2
0.1U_0402_16V4Z
Near PIN AG10
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
http://hobi-elektronika.net
3
2005/03/01 2006/03/01
Deciphered Date
+1.5VS
C497
0.1U_0402_16V4Z
1 2
C477
0.1U_0402_16V4Z
1 2
C471
0.1U_0402_16V4Z
1 2
C491
0.1U_0402_16V4Z
1 2
C492
0.1U_0402_16V4Z
1 2
C474
0.1U_0402_16V4Z
1 2
C454
0.1U_0402_16V4Z
1 2
C453
0.1U_0402_16V4Z
1 2
C464
0.1U_0402_16V4Z
1 2
C434
0.1U_0402_16V4Z
1 2
C515
0.01U_0402_16V7K
1 2
Near PIN A25
C493
0.01U_0402_16V7K
1 2
Near PIN AA19
+3VSUS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Near PIN A24
2
C660
1 2
C661
1 2
C397
1 2
C436
1 2
C472
1 2
C510
1 2
2
1
U7D
E27
VSS[172]
Y6
VSS[171]
Y27
VSS[170]
Y26
VSS[169]
Y23
VSS[168]
W7
VSS[167]
W25
VSS[166]
W24
VSS[165]
W23
VSS[164]
W1
VSS[163]
V4
VSS[162]
V27
VSS[161]
V26
VSS[160]
V23
VSS[159]
U25
VSS[158]
U24
VSS[157]
U23
VSS[156]
U15
VSS[155]
U13
VSS[154]
T7
VSS[153]
T27
VSS[152]
T26
VSS[151]
T23
VSS[150]
T16
VSS[149]
T15
VSS[148]
T14
VSS[147]
T13
VSS[146]
T12
VSS[145]
T1
VSS[144]
R4
VSS[143]
R25
VSS[142]
R24
VSS[141]
R23
VSS[140]
R17
VSS[139]
R16
VSS[138]
R15
VSS[137]
R14
VSS[136]
R13
VSS[135]
R12
VSS[134]
R11
VSS[133]
P22
VSS[132]
P16
VSS[131]
P15
VSS[130]
P14
VSS[129]
P13
VSS[128]
P12
VSS[127]
N7
VSS[126]
N17
VSS[125]
N16
VSS[124]
N15
VSS[123]
N14
VSS[122]
N13
VSS[121]
N12
VSS[120]
N11
VSS[119]
N1
VSS[118]
M4
VSS[117]
M27
VSS[116]
M26
VSS[115]
M23
VSS[114]
M16
VSS[113]
M15
VSS[112]
M14
VSS[111]
M13
VSS[110]
M12
VSS[109]
L25
VSS[108]
L24
VSS[107]
L23
VSS[106]
L15
VSS[105]
L13
VSS[104]
K7
VSS[103]
K27
VSS[102]
K26
VSS[101]
K23
VSS[100]
K1
VSS[99]
J4
VSS[98]
J25
VSS[97]
J24
VSS[96]
J23
VSS[95]
H27
VSS[94]
H26
VSS[93]
H23
VSS[92]
G9
VSS[91]
G7
VSS[90]
G21
VSS[89]
G12
VSS[88]
G1
VSS[87]
ICH6_BGA609
Title
Size Document Number Rev
Date: Sheet
GROUND
+RTCVCC
1
2
C401
0.1U_0402_16V4Z
Custom
ICH6(4/4)-PWR/GND
LA-3091 1.0
Tuesday, Janua ry 10, 2006
1
2
VSS[86] VSS[85] VSS[84] VSS[83] VSS[82] VSS[81] VSS[80] VSS[79] VSS[78] VSS[77] VSS[76] VSS[75] VSS[74] VSS[73] VSS[72] VSS[71] VSS[70] VSS[69] VSS[68] VSS[67] VSS[66] VSS[65] VSS[64] VSS[63] VSS[62] VSS[61] VSS[60] VSS[59] VSS[58] VSS[57] VSS[56] VSS[55] VSS[54] VSS[53] VSS[52] VSS[51] VSS[50] VSS[49] VSS[48] VSS[47] VSS[46] VSS[45] VSS[44] VSS[43] VSS[42] VSS[41] VSS[40] VSS[39] VSS[38] VSS[37] VSS[36] VSS[35] VSS[34] VSS[33] VSS[32] VSS[31] VSS[30] VSS[29] VSS[28] VSS[27] VSS[26] VSS[25] VSS[24] VSS[23] VSS[22] VSS[21] VSS[20] VSS[19] VSS[18] VSS[17] VSS[16] VSS[15] VSS[14] VSS[13] VSS[12] VSS[11] VSS[10]
VSS[9] VSS[8] VSS[7] VSS[6] VSS[5] VSS[4] VSS[3] VSS[2] VSS[1]
C417
0.1U_0402_16V4Z
F4 F22 F19 F17 E25 E19 E18 E15 E14 D7 D22 D20 D18 D14 D13 D10 D1 C4 C22 C20 C18 C14 B25 B24 B23 B21 B19 B15 B13 AG7 AG3 AG22 AG20 AG17 AG14 AG12 AG1 AF7 AF3 AF26 AF12 AF10 AF1 AE7 AE6 AE25 AE21 AE2 AE12 AE11 AE10 AD6 AD24 AD2 AD18 AD15 AD10 AD1 AC6 AC3 AC26 AC24 AC23 AC22 AC12 AC10 AB9 AB7 AB2 AB19 AB10 AB1 AA4 AA16 AA13 AA11 A9 A7 A4 A26 A23 A21 A19 A15 A12 A1
1
21 44
of
Page 22
5
4
3
2
1
D D
+5VS
+5VS
R317 470_0402_5%
1 2
C C
B B
A A
+5VHDD Source
0.1U_0402_16V4Z
1U_0603_10V4Z
1
1
C656
C657
2
2
+12VALW
12
R314 100K_0402_5%
150K_0603_5%
R316
13
D
2
G
Q16
S
2N7002_SOT23
+5VMOD Source
+5VS
1U_0603_10V4Z
C659
1
2
R815 0_0805_5%
1 2
Q17 AO3413_SOT23
S
C292
12
0.1U_0402_16V4Z
C658
1
2
@
G
2
0.01U_0402_16V7K
1
2
S
Q14
AO3413_SOT23
1 2
R816 0_0805_5%
+5VHDD
D
13
Layout No t e : P l a ce close to HDD CONN.
1000P_0402_50V7K
0.1U_0402_16V4Z
1U_0603_10V4Z
10U_0805_10V4Z
1
C296
2
C293
1
1
C301
2
2
1
C294
2
IDE_HDD0 IDE_HDD1 IDE_HDD2 IDE_HDD3 IDE_HDD4 IDE_HDD5 IDE_HDD6 IDE_HDD7 IDE_HDD8
IDE_HDD9 IDE_HDD10 IDE_HDD11 IDE_HDD12 IDE_HDD13 IDE_HDD14 IDE_HDD15
IDE_HDD[0..15] 19 I DE_HRESET#20
+5VHDD
IDE_HDREQ19 IDE_HDIOW#19 IDE_HDIOR#19 IDE_HIORDY19 IDE_HDACK#19 IDE_HIRQ19 IDE_HDA119 IDE_HDA019 IDE_HDCS1#19
1 2
R318 10K_0402_5%
IDE_HRESET# IDE_HDD7 IDE_HDD6 IDE_HDD5 IDE_HDD4 IDE_HDD3 IDE_HDD12 IDE_HDD2 IDE_HDD1 IDE_HDD0 IDE_HDD15
IDE_HDREQ IDE_HDIOW# IDE_HDIOR# IDE_HIORDY IDE_HDACK#
IDE_HIRQ
IDE_HDA1 IDE_HDA0 IDE_HDA2 IDE_DCS1# HDD_ACT#
JHDD1
2 4 6 8
10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44
46
ALLTOP_C17866-14405
1
1
2
3
3
4
5
5
6
7
7
8
9
9
10
11
11
12
13
13
14
15
15
16
17
17
18
19
19
20
21
21
22
23
23
24
25
25
26
27
27
28
29
29
30
31
31
32
33
33
34
35
35
36
37
37
38
39
39
40
41
41
42
43
43
44
GND45GND
IDE_HDD8 IDE_HDD9 IDE_HDD10 IDE_HDD11
IDE_HDD13 IDE_HDD14
R308 470_0402_5%
1 2
R310 10K_0402_5%@
PDIAG# IDE_HCS3#
1 2
R315 10K_0402_5%@
IDE_HDA2 19
+5VHDD
IDE_HDCS3# 19
12
IRQ how to assign
+5VMOD
G
2
13
D
@
Layout No t e : P lace close to CD-ROM CONN.
1000P_0402_50V7K
0.1U_0402_16V4Z
1U_0603_10V4Z
10U_0805_10V4Z
1
C279
2
C281
1
1
C278
2
1
2
2
C280
CD-ROM Connector
+5VS
R814
@
0_0402_5%
1 2
Q48
@
2N7002_SOT23
HDD_ACT#
R865 10_0402_5%
1 2
HDD_ACT1#
2
C854
4.7P_0402_50V8C
1
IDE_DRESET#
@
@
IDE_DRESET#20
1 3
D
1 2
R813 0_0402_5%
INT_CD_L28 CD_GNA28
2
G
S
+5VMOD
R702
4.7K_0402_5%
R703
1 2
C593 47P_0402_50V8J
1 2
1 2
10K_0402_5%
+5VMOD
HDD_ACT#
C595 47P_0402_50V8J
1 2
IDE_HDD7 IDE_HDD6 IDE_HDD5 IDE_HDD11 IDE_HDD4 IDE_HDD3 IDE_HDD2 IDE_HDD1 IDE_HDD0
IDE_HDIOW# IDE_HIORDY IDE_HIRQ IDE_HDA1 IDE_HDA0 IDE_DCS1# HDD_ACT#
SEC_CSEL
HDD_ACT# 32
C594 47P_0402_50V8J
JCDR1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
53
GND54GND
OCTEK_CDR-50JE2
1 2
IDE_HDD8 IDE_HDD9 IDE_HDD10
IDE_HDD12 IDE_HDD13 IDE_HDD14 IDE_HDD15 IDE_HDREQ IDE_HDIOR#
IDE_HDACK# PDIAG#
IDE_HDA2 IDE_HDCS3#
+5VMOD
+5VMOD
Layout Not e: W=80 mils
INT_CD_R 28
R337
10K_0402_5%
1 2
HDD Connector
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
2005/03/01 2006/03/01
Deciphered Date
2
Custom
Title
HDD & CD-ROM CONN.
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
Date: Sheet
1
of
22 44
Page 23
5
+3VALW
1 2
R39
1
C33
1U_0603_10V6K
D D
C C
B B
A A
0_0805_5%
2
1 2
L10
@
KC FBM_L11-201209-601LMT 0805
PCI_AD[0..31]18,25,26,27
CLK_PCI_LAN
12
R45 10_0402_5%
1
C34
4.7P_0402_50V8B
2
@
@
LAN_IO LAN_IO
1
C40 1U_0603_10V6K
2
PCI_AD[0..31]
PCI_C_BE0#18,25,26,27 PCI_C_BE1#18,25,26,27 PCI_C_BE2#18,25,26,27 PCI_C_BE3#18,25,26,27
PCI_AD17
R65 0_0402_5%
1 2
PCI_PAR18,25,26,27 PCI_FRAME#18,25,26,27 PCI_IRDY#18,25,26,27 PCI_TRDY#18,25,26,27 PCI_DEVSEL#18,25,26,27 PCI_STOP#18,25,26,27
PCI_PERR#18,25,26,27 PCI_SERR#18,25,27
PCI_REQ0#18 PCI_GNT0#18
PCI_PIRQF#18 ICH_PME#18,25,27,30,31 PCIRST#18,25,26,27,31 CLK_33M_LAN17
CLKRUN#20,25,27,30,31
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCIRST# CLK_PCI_LAN
R80
@
0_0402_5%
1
C85
0.1U_0402_10V6K
2
12
4
U4
104
AD0
103
AD1
102
AD2
98
AD3
97
AD4
96
AD5
95
AD6
93
AD7
90
AD8
89
AD9
87
AD10
86
AD11
85
AD12
83
AD13
82
AD14
79
AD15
59
AD16
58
AD17
57
AD18
55
AD19
53
AD20
50
AD21
49
AD22
47
AD23
43
AD24
42
AD25
40
AD26
39
AD27
37
AD28
36
AD29
34
AD30
33
AD31
92
C/BE#0
77
C/BE#1
60
C/BE#2
44
C/BE#3
46
IDSEL
76
PAR
61
FRAME#
63
IRDY#
67
TRDY#
68
DEVSEL#
69
STOP#
70
PERR#
75
SERR#
30
REQ#
29
GNT#
25
INTA#
31
PME#
27
RST#
28
CLK
65
CLKRUN#
4
GND/VSS
17
GND/VSS
128
GND/VSS
21
GND/VSSPST
38
GND/VSSPST
51
GND/VSSPST
66
GND/VSSPST
81
GND/VSSPST
91
GND/VSSPST
101
GND/VSSPST
119
GND/VSSPST
35
GND
52
GND
80
GND
100
GND
RTL8100CL-LF_LQFP128
closed to chip about 200 mils
1
C86
0.1U_0402_10V6K
2
PCI I/F
AVDD25/HSDAC-
1
2
EEDO
AUX/EEDI
EESK EECS
LED0 LED1 LED2
NC/LED3
TXD+/MDI0+
TXD-/MDI0-
RXIN+/MDI1+
RXIN-/MDI1-
NC/MDI2+
NC/MDI2-
NC/MDI3+
NC/MDI3-
X1 X2
LWAKE
ISOLATE#
RTSET
NC/SMBCLK
NC/SMBDATA
NC/M66EN NC/AVDDH
NC/HV
NC/HSDAC+
NC/HG NC/LG2 NC/LV2
NC/VSS NC/VSS
NC/GND NC/GND NC/GND NC/GND NC/GND
LAN I/F
NC/GND
CTRL25
RTT3/CRTL18
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
AVDD33/AVDDL AVDD33/AVDDL AVDD33/AVDDL
NC/AVDDL
VDD25/VDD18 VDD25/VDD18 VDD25/VDD18 VDD25/VDD18
NC/VDD18 NC/VDD18 NC/VDD18 NC/VDD18 NC/VDD18
Power
3
LAN_IO
2
C84
0.1U_0402_10V6K
108 109 111 106
117 115 114 113
1 2 5 6
14 15 18 19
121 122
105 23 127 72 74
88 10
120 11
123 124 126
9 13
22 48 62 73 112 118
8 125 26
41 56 71 84 94 107
3 7 20 16
32 54 78 99
24 45 64 110 116
12
1
C69
0.1U_0402_10V6K
2
LAN_IO
12
R82
3.6K_0402_5%
LAN_ACT# CLKOUT XTALFB SPD_10_100_G#
LAN_TX0+ LAN_TX0­LAN_RX1+ LAN_RX1-
LAN_TX2+ LAN_TX2­LAN_TX3+ LAN_TX3-
XTALFB CLKOUT
R421 5.6K_0603_1%
1 2
closed to chip
R81 1K_0402_1%@
1 2
R721 0_0402_5%2@
1 2
R420 0_0402_5%
1 2
R64 0_0402_5%
1 2
R59 0_0402_5%
1 2
R58 0_0402_5%2@
1 2
CTL25 CTL12
LAN_IO
C36
0.1U_0402_10V6K
2@
2
2
1
1
R399
0_0603_5%
1 2
1 2
R48 0_0402_5%2@
1 2
R47 0_0402_5%1@
1
C53
0.1U_0402_10V6K
2
LAN_ACT# 24 SPD_10_100_G# 24
LAN_TX0+ 24 LAN_TX0- 24 LAN_RX1+ 24 LAN_RX1- 24
LAN_TX2+ 24 LAN_TX2- 24 LAN_TX3+ 24 LAN_TX3- 24
R386 0_0603_5%1@
1 2
R379 0_0603_5%2@
1 2
C38
0.1U_0402_10V6K
C89
0.1U_0402_10V6K
2
C35
0.1U_0402_10V6K
1
U6 AT93C46-10SU-2.7_SO8
4
DO
GND
3
DI
NC
2
SK
NC
1
CS
VCC
+3VS
R421: 5.6K for 8100CL
2.49K for 8110SBL
LAN_IO
+1.2V_LAN
1 2
2
2
C90
0.1U_0402_10V6K
1
1
LAN_IO
+2.5V_LAN
5 6 7 8
12
R43 1K_0402_1%
1 2
LAN_IO
R390 0_0603_5%
R395 0_0603_5%2@
2
C103
0.1U_0402_10V6K
1
LAN_IO
R46 15K_0402_1%
SUSP#_LAN
+2.5V_LAN
1@
12
0.1U_0402_10V6K
C75
S
D
1 3
CTL25
CTL12
+1.2V_LAN
2
C63
1
0.1U_0402_10V6K
G
2
Q61 AO3413_SOT23
1
1
2
1
1
25MHZ_20P_1BX25000CK1A
1
C58 27P_0402_50V8J
2
SUSP# 15,31,32,35,39,41
+3VALW
Icmax = 2A
3
Q32 2SB1188_SOT89
2
3
Q33 2SB1188_SOT89
2
2
C37
0.1U_0402_10V6K
Y1
1 2
2
1
C328
1
2
0.1U_0402_10V6K
1
2
2
1
C333
0.1U_0402_10V6K
1 2
L21 0_0805_5%
C332 10U_1206_6.3V6M
C335 10U_1206_6.3V6M
1 2
L22 0_0805_5%
2
C60 27P_0402_50V8J
1
2
C356
0.1U_0402_10V6K
1
1
C364
0.1U_0402_10V6K
2
1
+2.5V_LAN
+1.2V_LAN
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
2005/03/01 2006/03/01
Deciphered Date
2
Custom
Title
LAN RTL 8110SBL/8100CL
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
Date: Sheet
1
of
23 44
Page 24
5
V_DAC
1 2
R405 0_0402_5%2@
C375 0.1U_0402_16V4Z
1 2
D D
2@
C374 0.1U_0402_16V4Z
1 2
2@
C373 0.1U_0402_16V4Z
1 2
C370 0.1U_0402_16V4Z
1 2
LAN_TX3+23
LAN_TX3-23
LAN_TX2+23
LAN_TX2-23
LAN_RX1+23
LAN_RX1-23
LAN_TX0+23
V_DAC
LAN_TX3+
LAN_TX3-
V_DAC
LAN_TX2+
LAN_TX2-
V_DAC
LAN_RX1+
LAN_RX1-
V_DAC
LAN_TX0+
+2.5V_LAN
T28
1 2
3 4 5
6 7 8
9 10 11
TCT1 TD1+
TD1­TCT2 TD21+
TD2­TCT3 TD3+
TD3­TCT4 TD4+
4
2@
1:1
1:1
1:1
1:1
MCT1 MX1+
MX1­MCT2 MX2+
MX2­MCT3 MX3+
MX3­MCT4 MX4+
24
RJ45_TX3+
23
RJ45_TX3-
22 21
RJ45_TX2+
20
RJ45_TX2-
19 18
RJ45_RX1+
17
RJ45_RX1-
16 15
RJ45_TX0+
14
R789 75_0402_1%2@ R790 75_0402_1%2@ R791 75_0402_1%2@ R792 75_0402_1%2@
3
1 2 1 2 1 2 1 2
C32 1000P_1206_2KV7K
12
LAN_IO
LAN_IO
2
SPD_10_100_G#23
1 2
R5 300_0603_5%
LAN_ACT#23
1 2
R20 300_0603_5%
RJ45_TX3­RJ45_TX3+ RJ45_RX1­RJ45_TX2­RJ45_TX2+ RJ45_RX1+ RJ45_TX0­RJ45_TX0+
T=10mil
T=10mil
JLAN1
12
Amber LED-
11
Amber LED+
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
10
Green LED-
9
Green LED+
TYCO_1566597-1
SHLD4 SHLD3
SHLD2 SHLD1
1
16 15
14 13
LAN_TX0-
C C
LAN_TX0-23
12
TD4-
24HST1041A-3_24P
RTL8110SBL used the 24HST1041A-3_24P RTL8100CL used the 24ST0023-3_24P
Layout Note 24HST1041A-3 pls close to conn.
Termination plane should be copled to chassis ground and also depends on safety concern
T41
LAN_TX0­LAN_TX0+ V_DAC
V_DAC LAN_RX1+ RJ45_RX1+
B B
A A
1 2
R811 0_0402_5%2@
1:1
TD-8TX-
7
TD+
6
CT
3
CT
2
RD-
1
RD+
NS0013_16P 1@
TX+
RX­RX+
RJ45_TX0-
9
RJ45_TX0+
10 11
CT
14
CT
RJ45_RX1-LAN_RX1-
15 16
MX4-
RJ45_TX0-
13
1@
75_0402_1%
R759
C45
R50 49.9_0402_1%
LAN_TX0+
LAN_TX0-
LAN_RX1+
LAN_RX1-
LAN_TX2+
LAN_TX2-
LAN_TX3+
LAN_TX3-
12
12
R760
1@
75_0402_1%
Termination plane should be copled to chassis ground and also depends on safety concern
1 2
R49 49.9_0402_1%
1 2
R52 49.9_0402_1%
1 2
R51 49.9_0402_1%
1 2
R54 49.9_0402_1%2@
1 2
R53 49.9_0402_1%2@
1 2
R56 49.9_0402_1%2@
1 2
R55 49.9_0402_1%2@
1 2
Please close to LAN IC
1 2
1 2
1 2
1 2
C1
1 2
0.1U_0402_16V4Z C2
1 2
0.1U_0402_16V4Z C19
1 2
0.1U_0402_16V4Z
C11
1 2
0.1U_0402_16V4Z
0.01U_0402_16V7K
C46
0.01U_0402_16V7K
C47
2@
0.01U_0402_16V7K
C42
2@
0.01U_0402_16V7K
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
2005/03/01 2006/03/01
Deciphered Date
2
Custom
Title
Magnetic & RJ45
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
Date: Sheet
1
of
24 44
Page 25
5
VPPEN0 VPPEN1 CBS_VCCD0# CBS_VCCD1#
C2 C1 D4 D2 D1
E4 E3 E2 F2
F1 G2 G3 H3 H4
J1
J2 N2 M3 N3
K4 M4
K5
L5 M5
K6 M6 N6 M7 N7
L7
K7 N8
E1
J3 N1 N5
G4
J4
K1
K3
L1
L2
L3 M1 M2
A1
B1 H1
L8
L11
F4
K8 N9
K9
N10 L10 N11 M11
M10
J9
E7 G5
E8 H7
MSCLK
SDCLK
SDCMD
SDWP#
U28
AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
CBE3# CBE2# CBE1# CBE0#
PCIRST# FRAME# IRDY# TRDY# DEVSEL# STOP# PERR# SERR# PAR PCIREQ# PCIGNT# PCICLK
RIOUT#_PME# SUSPEND#
IDSEL MFUNC0
MFUNC1 MFUNC2 MFUNC3 MFUNC4 MFUNC5 MFUNC6
GRST#
MFUNC7
VCC_SD GND_SD
SDCD# MSINS#
1 2
D D
PCI_AD[0..31]18,23,26,27
Place clos e to JCBUS
+CBS_VPP
0.01U_0402_16V7K
1
C423
2
C C
+3V
cardbus
PCI_PIRQA#18
1394
12
R42
CK33M_CBS_TERM
C41
2
1
PCI_PIRQB#18
PCI_PCIRST#18
CLK_33M_CBS
@
10_0402_5%
@
4.7P_0402_50V8C
B B
A A
0.01U_0402_16V7K
1
C437
2
R406 10K_0402_5%
PCI_AD20
R382
SIRQ20,30,31 CR_LED#32
CLKRUN#20,23,27,30,31
+CBS_VCC
10U_0805_10V4Z
1
C432
2
PCI_C_BE3#18,23,26,27 PCI_C_BE2#18,23,26,27 PCI_C_BE1#18,23,26,27 PCI_C_BE0#18,23,26,27
PCIRST#18,23,26,27,31 PCI_FRAME#18,23,26,27 PCI_IRDY#18,23,26,27 PCI_TRDY#18,23,26,27 PCI_DEVSEL#18,23,26,27 PCI_STOP#18,23,26,27 PCI_PERR#18,23,26,27 PCI_SERR#18,23,27 PCI_PAR18,23,26,27 PCI_REQ1#18 PCI_GNT1#18 CLK_33M_CBS17
ICH_PME#18,23,27,30,31
1 2
100_0402_5%
1 2
R747 0_0402_5% R748 0_0402_5%
R750 0_0402_5% R751 0_0402_5%@ R442 0_0402_5%@
+3V
12
R441 100K_0402_5%
CBS_GRST#
1
C384 1U_0603_10V4Z
2
5
1 2 1 2
1 2
1 2
+SD_VCC
PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0
PCI_C_BE3# PCI_C_BE2# PCI_C_BE1# PCI_C_BE0#
PCIRST# PCI_FRAME# PCI_IRDY# PCI_TRDY# PCI_DEVSEL# PCI_STOP# PCI_PERR# PCI_SERR# PCI_PAR PCI_REQ1# PCI_GNT1#
CBS_IDSEL
12
CBS_GRST#
SDCD# MSINS#
+CBS_VCC
N12
M12
N13
M13
G13
A7
VPPD0
VPPD1
VCCA1
VCCA2
VCCD0#
VCCD1#
MSCLKE9SDCLKF6SDCMDE5SDWPF8SDCLKIH5MSBSH8MSPWREN#J8SDPWREN33#G7MSDATA3F9MSDATA2G8MSDATA1H9MSDATA0
R39143K_0402_5%
CARDBUS
SD
MS_EN#
MSBS
B4
VCC10
SD_EN#
C8
4
+3V
G1
K2
N4
F3
L6
L9
H11
D12
VCC2
VCC3
VCC4
VCC1
VCC5
VCC9
VCC6
VCC7
VCC8
CAD31/D10
CAD30/D9 CAD29/D1 CAD28/D8 CAD27/D0 CAD26/A0 CAD25/A1 CAD24/A2 CAD23/A3 CAD22/A4 CAD21/A5 CAD20/A6
CAD19/A25
CAD18/A7 CAD17/A24 CAD16/A17
CAD15/IOWR#
CAD14/A9
CAD13/IORD#
CAD12/A11
CAD11/OE#
CAD10/CE2#
CAD9/A10
CAD8/D15
CAD6/D13
CAD4/D12
CAD2/D11
CCBE3#/REG#
CCBE2#/A12
CCBE1#/A8
CCBE0#/CE1#
CRST#/RESET CFRAME#/A23
CIRDY#/A15
CTRDY#/A22
CDEVSEL#/A21
CSTOP#/A20 CPERR#/A14
CSERR#/WAIT#
CPAR/A13
CREQ#/INPACK#
CGNT#/WE#
CSTSCHG/BVD1_STSHG#
CCLK/A16
CCLKRUN#/WP_IOIS16#
CBLOCK#/A19
CINT#/READY_IREQ#
SPKROUT
CAUDIO/BVD2_SPKR#
CCD2#/CD2# CCD1#/CD1#
CVS2/VS2# CVS1/VS1#
CRSV1/D14 CRSV2/A18
CRSV3/D2
G9
MSDATA0 MSDATA1 MSDATA2 MSDATA3
4
B2 C3 B3 A3 C4 A6 D7 C7 A8 D8 A9 C9 A10 B10 D10 E12 F10 E13 F13 F11 G10 G11 G12 H12 H10
CAD7/D7
J11 J12
CAD5/D6
K13 J10
CAD3/D5
K10 K12
CAD1/D4
L13
CAD0/D3
B7 A11 E11 H13
B9 B11 A12 A13 B13 C12 C13 A5 D13 B8 C11 B12
C5 D5
CBS_CCLK_INTERNAL CBS_CBLOCK#
D11 D6 M9
B5 A4
L12 D9 C6
D3
GND1
H2
GND2
L4
GND3
M8
GND4
K11
GND5
F12
GND6
C10
GND7
B6
GND8
J13 E10 A2
H6
RSVD4
J7
RSVD3
J6
RSVD2
J5
RSVD1
E6
SDDAT0
F7
SDDAT1
F5
SDDAT2
G6
SDDAT3
CB714BF B0_LFBGA169
CBS_CAD31 CBS_CAD30 CBS_CAD29 CBS_CAD28 CBS_CAD27 CBS_CAD26 CBS_CAD25 CBS_CAD24 CBS_CAD23 CBS_CAD22 CBS_CAD21 CBS_CAD20 CBS_CAD19 CBS_CAD18 CBS_CAD17 CBS_CAD16 CBS_CAD15 CBS_CAD14 CBS_CAD13 CBS_CAD12 CBS_CAD11 CBS_CAD10 CBS_CAD9 CBS_CAD8 CBS_CAD7 CBS_CAD6 CBS_CAD5 CBS_CAD4 CBS_CAD3 CBS_CAD2 CBS_CAD1 CBS_CAD0
CBS_CC/BE3# CBS_CC/BE2# CBS_CC/BE1# CBS_CC/BE0#
CBS_CRST# CBS_CFRAME# CBS_CIRDY# CBS_CTRDY# CBS_CDEVSEL# CBS_CSTOP# CBS_CPERR# CBS_CSERR# CBS_CPAR CBS_CREQ# CBS_CGNT# CBS_CCLK
CBS_CSTSCHNG CBS_CCLKRUN#
CBS_CINT# CBS_SPK#
CBS_CAUDIO CBS_CCD2#_INTERNAL
CBS_CCD1#_INTERNAL CBS_CVS2 CBS_CVS1
CBS_RSVD/D14 CBS_RSVD/A18 CBS_RSVD/D2
SDDAT0 SDDAT1 SDDAT2 SDDAT3
http://hobi-elektronika.net
3
+3V +3V
12
12
R60
C324
1
2
+3V
3
0.01U_0402_16V7K
1
2
C376
R432 43K_0402_5%@ R419 43K_0402_5%@ R402 43K_0402_5%@ R414 43K_0402_5%@ R431 43K_0402_5%@
R61
8.2K_0402_5%
D2 RB751V_SOD323
D3 RB751V_SOD323
0.01U_0402_16V7K
0.01U_0402_16V7K
1
1
2
2
C382
C381
0_0402_5%
R358
1 2
2
@
C322
1
CBS_CCLK
R83
@
0_0402_5%
@
C95
10P_0402_50V8J
21
21
+CBS_VCC
+CBS_VPP
0.01U_0402_16V7K
1
2
C325
CBS_CCD2# CBS_CCD1#
1 2
270P_0402_50V7K
2
1
12 12 12 12 12
12
1
2
2005/03/01 2006/03/01
8.2K_0402_5%
SD_EN#
MS_EN#
+3V
0.1U_0402_16V4Z
10U_0805_10V4Z
1
2
2
1
C344
C351
12
R37747_0402_5% R440100K_0402_5%
12
CBS_SPK# 29
MSBS MSDATA0 MSDATA3 MSDATA2 MSDATA1
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
12
R62
8.2K_0402_5%
+CBS_VCC
@
R116
0.01U_0402_16V7K
0.01U_0402_16V7K
1
2
C360
R400 0_0402_5%
270P_0402_50V7K
@
C361
+12VALW
12
R63
8.2K_0402_5%
13
D
2
G
S
12
R122
47K_0402_5%
47K_0402_5%
0.01U_0402_16V7K
1
2
C338
@
Q2 AO3400_SOT23
1U_0603_10V4Z
C78
12
CBS_CAD0 CBS_CAD1 CBS_CAD3 CBS_CAD5 CBS_CAD7 CBS_CC/BE0# CBS_CAD9 CBS_CAD11 CBS_CAD12 CBS_CAD14 CBS_CC/BE1# CBS_CPAR CBS_CPERR# CBS_CGNT# CBS_CINT#
CBS_CCLK CBS_CIRDY# CBS_CC/BE2# CBS_CAD18 CBS_CAD20 CBS_CAD21 CBS_CAD22 CBS_CAD23 CBS_CAD24 CBS_CAD25 CBS_CAD26 CBS_CAD27 CBS_CAD29 CBS_RSVD/D2 CBS_CCLKRUN#
+SD_VCC
1
C368
2
10P_0402_50V8J
Deciphered Date
2
1
2
CBS_CCD1#CBS_CCD2#
1
C143
2
@
G
C96
1 2 1 2 1 2 1 2 1 2
10P_0402_50V8J
2
+3V
13
D
Q3 AO3400_SOT23
S
0.1U_0402_16V4Z
1
2
+5V
+SD_VCC
0.1U_0402_16V4Z
JCBS1 SUPER_AC4-3000-250-3_RT
1
GND
2
D3
3
D4
4
D5
5
D6
6
D7
7
CE1#
8
A10
9
OE#
10
A11
11
A9
12
A8
13
A13
14
A14
15
WE#
16
IREQ#
17
VCC
18
VPP1
19
A16
20
A15
21
A12
22
A7
23
A6
24
A5
25
A4
26
A3
INPACK#
27
A2
28
A1
29
A0
STSCHG#
30
D0
31
D1
32
D2
33
IOIS16#
34
GND
69
GND
70
GND
71
GND
SDDAT2
R45443K_0402_5% @
SDCMD
R46843K_0402_5% @
SDDAT0
R49543K_0402_5% @
SDDAT3
R46343K_0402_5% @
SDDAT1
R50043K_0402_5% @
Footprint need to change for #3 <-->#13
2
T48 PAD
1
C386
0.1U_0402_16V4Z
2
+3V
C389
35
GND
36
CD1#
37
D11
38
D12
39
D13
40
D14
41
D15
42
CE2#
43
VS1#
44
IORD#
45
IOWR#
46
A17
47
A18
48
A19
49
A20
50
A21
51
VCC
52
VPP2
53
A22
54
A23
55
A24
56
A25
57
VS2#
58
RESET
59
WAIT#
60 61
REG#
62
SPKR#
63 64
D8
65
D9
66
D10
67
CD2#
68
GND
72
GND
73
GND
74
GND
1
U30 CP2211FD3_SSOP16
9
12V
5
5V
6
5V
3
3.3V
4
1
2
+3V
R505 43K_0402_5%@
R439 43K_0402_5%@
3.3V GND
7
CBS_CCD1# CBS_CAD2 CBS_CAD4 CBS_CAD6 CBS_RSVD/D14 CBS_CAD8 CBS_CAD10 CBS_CVS1 CBS_CAD13 CBS_CAD15 CBS_CAD16 CBS_RSVD/A18 CBS_CBLOCK# CBS_CSTOP# CBS_CDEVSEL#
CBS_CTRDY# CBS_CFRAME# CBS_CAD17 CBS_CAD19 CBS_CVS2 CBS_CRST# CBS_CSERR# CBS_CREQ# CBS_CC/BE3# CBS_CAUDIO CBS_CSTSCHNG CBS_CAD28 CBS_CAD30 CBS_CAD31 CBS_CCD2#
SDDAT1 SDDAT0
SDCLK
SDCMD SDDAT2
MSBS MSDATA1 MSDATA0 MSDATA2 MSINS# MSDATA3 MSCLK SDDAT3
SDWP#
12
SDCD#
12
Custom
Title
CardBus/CB714
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
Date: Sheet
16
SHDN
VCC VCC VCC
VPP
VCCD0 VCCD1 VPPD0 VPPD1
SDCLK
MSCLK
OC
+3V
+CBS_VCC +CBS_VPP
R481 0_0402_5%
R466 0_0402_5%
+SD_VCC
13 12 11
10
CBS_VCCD0#
1
CBS_VCCD1#
2
VPPEN0
15
VPPEN1
14
8
1 2
@
1 2
@
SD_WP
SD_CD
1
R490
@
SD_8 SD_7 SD_6 SD_5 SD_4 SD_3 SD_2 SD_1 SD_9
MS_1 MS_2 MS_3 MS_4 MS_5 MS_6 MS_7 MS_8 MS_9
MS_10
+CBS_VPP
47K_0402_5%
+CBS_VCC
C427
0.1U_0402_16V4Z
C414
1
2
+CBS_VCC
12
12
R462
47K_0402_5%
C451
@
1 2
10P_0402_50V8J
C402
@
1 2
10P_0402_50V8J
SD/ MMC/ MS
JSD1
SD_8 SD_7 SD_6 SD_5 SD_4 SD_3 SD_2 SD_1 SD_9
MS_1
22
GND
MS_2
23
GND
MS_3 MS_4 MS_5 MS_6 MS_7 MS_8 MS_9 MS_10
SD_WP SD_CD
PROCO_MDR019-20-1000
of
25 44
0.1U_0402_16V4Z
1
2
Page 26
5
4
3
2
1
0.1U_0402_16V7K
1
C138
2
D D
CLK_33M_1394
C C
B B
12
R102 22_0402_5%
@
1
C102 15P_0402_50V8D
2
@
PCI_AD16
R115 100_0402_5%
1 2
0.1U_0402_16V7K
1
C147
2
0.1U_0402_16V7K
PCI_AD[0..31]18,23,25,27
PCI_C_BE0#18,23,25,27 PCI_C_BE1#18,23,25,27 PCI_C_BE2#18,23,25,27 PCI_C_BE3#18,23,25,27
PCI_FRAME#18,23,25,27 PCI_IRDY#18,23,25,27 PCI_TRDY#18,23,25,27 PCI_DEVSEL#18,23,25,27 PCI_STOP#18,23,25,27 PCI_PERR#18,23,25,27 PCI_PAR18,23,25,27 PCI_REQ2#18 PCI_GNT2#18 PCI_PIRQE#18 PCIRST#18,23,25,27,31 CLK_33M_139417
1
C125
2
1
C142
2
0.1U_0402_16V7K
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_C_BE0# PCI_C_BE1# PCI_C_BE2# PCI_C_BE3#
1394_IDSEL PCI_FRAME# PCI_IRDY# PCI_TRDY# PCI_DEVSEL# PCI_STOP# PCI_PERR# PCI_PAR PCI_REQ2# PCI_GNT2#
0.1U_0402_16V7K
1
C117
2
117 116 115 114 113 109 107 106 103 102 101
119 104
105 120 121 123 124 125 127 128
BJT_CTL
1
C148
0.1U_0402_16V7K
2
VT6301S:0 ohm
Ra
VT6311S:4.7K ohm 1%
+3VS
12
Ra
+3VS
110
122
17
U12
25
AD0
24
AD1
20
AD2
19
AD3
18
AD4
16
AD5
15
AD6
14
AD7
11
AD8
10
AD9
9
AD10
8
AD11
7
AD12
4
AD13
3
AD14
2
AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26
98
AD27
97
AD28
96
AD29
95
AD30
94
AD31
12
CBE0#
1
CBE1# CBE2# CBE3#
IDSEL FRAME# IRDY# TRDY# DEVSEL# STOP# PERR# PAR
93
REQ#
92
GNT#
88
INTA#
89
PCIRST#
90
PCICLK
Internal Pull-Down PD: enable internal LDO to +VDD 2.5V PU: disable
36
PVD
VCC99VCC
PCI Bus
NC45NC48NC49NC50NC37NC51NC52NC53NC54NC40NC39NC35NC74NC75NC76NC77NC78NC64BJT_CTL81NC82NC83REG_FB84REG_OUT85I2CEN43CARDEN
NC41NC
42
R847 4.7K_0402_5%@
+3VS
32
VCC
VCC5VCC
PWRDET_VCC
IEEE 1394
VT6311S
1 2
R846
4.7K_0402_5%
1
C845
2
0.1U_0402_16V7K
Power
BJT_CTL REG_FB
+VDD_1394+3VS
+VDD_1394
111
21
46
PVD
VCC
VCC
30
0.1U_0402_16V7K
R844 0_0603_5%@
1 2
1 2
R845 0_0402_5%
VCC
NC
1 2
0.1U_0402_16V7K
1
1
C149
2
VT6301S:3.3V
+VDD
VT6311S:2.5V (has internal LDO)
REG_FB
100
108
118
126
31
GND91GND
GND
GND
GND
GND47GND
EEPROM I/F
C146
2
+3VS
112
GND6GND13GND23GND33GND
1
2
POP for VT6311S
38
GND22GND
EEDI/SDA
EECK/SCL
PM & Test
XREXT TPB0M
TPB0P TPA0M TPA0P
TPBIAS0
1394
Differential Pairs
PHYRESET#
XO
VT6311S_LQFP128
58
24.576MHz_16P_3XG-24576-43E1
44
R133
4.7K_0402_5%
OSC
XI
57
+3VS
C129
0.1U_0402_16V7K
59
PVA
62
PVA
72
PVA
73
PVA
86
PVA
87
PVA
61
GND
65
GND
66
GND
79
GND
80
GND
56
GND
26
EECS
27
EEDO
28 29
34
PME#
60
XCPS
63 67
68 69 70 71
55
Y2
0.1U_0402_10V6K
1394SDA 1394SCL
1 2
XCPS
Rb
12
C122 1U_0603_10V4Z
1 2
12
R118 1M_0402_5%
1 2
1 2
1
C107
2
R723 4.7K_0402_5%@
VT6301S:6.34K ohm 1%
Rb
VT6311S:6.2K ohm 1%
C112 47P_0402_50V8J
1 2
R107
C118 10P_0402_50V8J
C124 10P_0402_50V8J
0.1U_0402_10V6K
1
C119
2
0.1U_0402_10V6K
+3VS
6.2K_0603_1%
U11
1
A0
2
A1
3
A2
4
GND
AT24C02N-10SU-2.7_SO8
1 2 1
1
2
C106
C116
0.1U_0402_10V6K
2
R94
54.9_0402_1% R93
54.9_0402_1%
8
VCC
7
WP
6
SCL
5
SDA
L12 0_0805_5%
1 2
1 2
+3VS
R150 510_0402_5%
1394SCL 1394SDA
R98
54.9_0402_1%
1 2
R99
54.9_0402_1%
1 2
1 2
C98
0.33U_0603_10V7K
12
+3VS+3VS
XCPS
C101 270P_0402_50V7K
1 2
R89
4.99K_0402_1%
1 2
R108 2K_0402_5%
@
1 2 12
R113 1K_0402_5%
TPB0­TPB0+ TPA0­TPA0+
J139A1 SUYIN_020204FR004S506ZL
1
1
2
2
3
3
4
4
GND15GND26GND37GND4
8
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
2005/03/01 2006/03/01
Deciphered Date
2
Custom
Title
VIA 6311S 1394
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
Date: Sheet
1
of
26 44
Page 27
5
Intel WLAN HW Spec
Pin36: Channel_Clk/BT _PRIORITY
Pin43: Channel_Data_11b_activity
4
+3VS
3
+3VS
2
1
D D
WLAN_LINK31 WLAN_ACT 31
+3VS
@
12
Q59
@
2N7002_SOT23
SMB_EC_DA25,15,31
C C
SMB_EC_CK25,15,31
B B
A A
SMB_EC_DA2
SMB_EC_CK2 WLAN_CLK
CLK_33M_MPCI
R319
@
10_0402_5%
1 2
CK_33M_MINPCI_TERM
2
C295
@
4.7P_0402_50V8C
1
+3VS
2
C297
0.047U_0402_16V4Z
1
Q60
@
2N7002_SOT23
1 3
D
+3VS
1 3
D
2
C298
0.047U_0402_16V4Z
1
R860
2
G
2K_0402_5%
WLAN_DAT
S
WLAN_DAT33
@
12
R861
2
G
2K_0402_5%
S
2
C290
0.047U_0402_16V4Z
1
HW_RADIO_DIS#31,32,33
PCI_PIRQH#18
CLK_33M_MPCI17 PCI_REQ3#18
R320 0_0402_5%
1 2
2
C299
0.047U_0402_16V4Z
1
PCI_C_BE3#18,23,25,26
PCI_C_BE2#18,23,25,26 PCI_IRDY#18,23,25,26
CLKRUN#20,23,25,30,31 PCI_SERR#18,23,25
PCI_PERR#18,23,25,26 PCI_C_BE1#18,23,25,26
+5VS
2
1
WLAN_LINK HW_RADIO_DIS#
PCI_PIRQH#
CLK_33M_MPCI PCI_REQ3# PCI_AD31
PCI_AD29 PCI_AD27
PCI_AD25 WLAN_DAT1 PCI_C_BE3# PCI_AD23
PCI_AD21 PCI_AD19
PCI_AD17 PCI_C_BE2# PCI_IRDY#
CLKRUN# PCI_SERR#
PCI_PERR# PCI_C_BE1# PCI_AD14
PCI_AD12 PCI_AD10
PCI_AD8 PCI_AD7
PCI_AD5 PCI_AD3 PCI_AD1
+5VS
0.1U_0402_16V4Z
C300
0.047U_0402_16V4Z
2
C607
1
2
C289
0.047U_0402_16V4Z
1
JMPCI1
112
KEY KEY
334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152 535354 555556 575758 595960 616162 636364 656566 676768 696970 717172 737374 757576 777778 797980 818182 838384 858586 878788 898990 919192 939394 959596 979798 9999100
101
101
102
103
103
104
105
105
106
107
107
108
109
109
110
111
111
112
113
113
114
115
115
116
117
117
118
119
119
120
121
121
122
123
123
124
127
127
128
QTC_C102A-056B11-01
2
C288
0.047U_0402_16V4Z
1
2 4
6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124
128
WLAN_ACT
PCI_PIRQG#
PCIRST# PCI_GNT3# SYS_PME#
WLAN_CLK1 PCI_AD30
PCI_AD28 PCI_AD26 PCI_AD24 MINIDSEL
PCI_AD22 PCI_AD20 PCI_PAR PCI_AD18 PCI_AD16
PCI_FRAME# PCI_TRDY# PCI_STOP#
PCI_DEVSEL# PCI_AD15
PCI_AD13 PCI_AD11
PCI_AD9 PCI_C_BE0#
PCI_AD6 PCI_AD4 PCI_AD2 PCI_AD0
2
C291
0.1U_0402_16V4Z
1
2
C287
0.047U_0402_16V4Z
1
+5VS
PCI_PIRQG# 18
PCIRST# 18,23,25,26,31 PCI_GNT3# 18
ICH_PME# 18,23,25,30,31
1 2
R311 0_0402_5%
1 2
R313 100_0402_5%
PCI_PAR 18,23,25,26
PCI_FRAME# 18,23,25,26 PCI_TRDY# 18,23,25,26 PCI_STOP# 18,23,25,26
PCI_DEVSEL# 18,23,25,26
PCI_C_BE0# 18,23,25,26
+3V
PCI_AD18
WLAN_CLK 33
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8
PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
+3V
2
C286
0.1U_0402_16V4Z
1
2
C285
0.1U_0402_16V4Z
1
PCI_AD[0..31] 18,23,25,26
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
2005/03/01 2006/03/01
Deciphered Date
2
Custom
Title
MiniPCI Conn
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
Date: Sheet
1
of
27 44
Page 28
5
4
3
2
1
+5VS
C574
MIC29
MONO_IN29
IAC_RST#19 IAC_SYNC19 IAC_SDATO19
EAPD29
U14
4
VIN
2
DELAY ERROR7CNOISE
8
SD
SI9182DH-AD-T1-E3_MSOP8
1
2
VOUT
SENSE or ADJ
1
C240 10U_0805_10V4Z
2
R228 0_0402_5%
1 2
1 2
C233 0.1U_0402_16V4Z@
CD_L_R
C569 1U_0603_10V4Z@
CD_R_R
C570 1U_0603_10V4Z@
CD_GNA
C568 1U_0603_10V4Z@
MIC
C234 1U_0603_10V4Z
1 2
C235 1U_0603_10V4Z
R299 0_0402_5%
L44
1 2
FBMA-L11-160808-700LMT_0603
GND
HP_SENSE
1 2 1 2 1 2 1 2
5 6 1 3
1
2
C209
0.1U_0402_16V4Z
+VDDA
L18 FCM2012C-800_0805
C_MIC
C_MD_SPK
12
1 2
U16
14
AUX_L
15
AUX_R
16
JD2
17
JD1
23
LINE_IN_L
24
LINE_IN_R
18
CD_L
20
CD_R
19
CD_GND
21
MIC1
22
MIC2
13
PHONE
12
PC_BEEP
11
RESET#
10
SYNC
5
SDATA_OUT
45
NC
46
XTLSEL
47
SPDIFI/EAPD
48
SPDIFO
4
DVSS1
7
DVSS2
ALC250-VD-LF_LQFP48
12
12
+AVDD_AC97
AC97 Codec
1
1
C192
D D
C C
R639 6.8K_0402_5%@ R642 6.8K_0402_5%@
INT_CD_L22 INT_CD_R22
MD_SPK
B B
R640 20K_0402_5%@ R641 20K_0402_5%@
XTLSEL
LOW
*
Floating
R633 20K_0402_5%
1 2
12
R632
0_0402_5%@
10U_0805_10V4Z
1 2 1 2
1 2 1 2
C236 0.01U_0402_16V7K
1 2
1 2
R229 2.4K_0402_5%
1 2
R230 10K_0402_5%
MODE
14.318MHz External
24.576MHz Crystal or External Colck
CD_GNA
12
R638
6.8K_0402_5%
2
2
C210
0.1U_0402_16V4Z
0.1U_0402_16V4Z
For ALC250 disable HW EQ when Headphone plug-in.
NBA_PLUG29
CD_GNA22
+VDDA
+VDDA
1
R222 150K_0603_1%
2
R223 51K_0603_1%
38
AVDD125AVDD2
MONO_OUT/VREFOUT3
(+VDDA~=4.79V)
C219 10U_0805_10V4Z
+DVDD_AC97
9
DVDD11DVDD2 LINE_OUT_L LINE_OUT_R
HP_OUT_L
HP_OUT_R
BIT_CLK
SDATA_IN
XTL_IN
XTL_OUT
AFILT1 AFILT2
VREFOUT
VREF
DCVOL
NC
VREFOUT2
VAUX
SCK SDA
NC AVSS1 AVSS2
1
1
C258
2
2
0.1U_0402_16V4Z C276 1000P_0402_50V7K
C268 1000P_0402_50V7K
LINEL
35 36 37 39 41
6 8 2
3 29 30 28 27 32
31 33 34 43 44
40 26 42
C269 4.7U_0805_10V4Z
LINER
C275 4.7U_0805_10V4Z C577 1U_0805_25V4Z
L43 FBMA-L11-160808-700LMT_0603
1 2
R284 22_0402_5%
1 2
C259 1000P_0402_50V7K C265 1000P_0402_50V7K
12
R643 0_0402_5%
L39 FCM2012C-800_0805
1 2
C271
10U_0805_10V4Z
12
12 1 2 1 2 1 2
12 12
1
@
C241
2
If Project need to implement Realtek Power Off CD play function. It must be supplied power for AVDD(Pin25 & 38) & VAUX(Pin34) & power off for DVDD(Pin1 & 9). When AVDD & VAUX powered and DVDD without power, it will bypass CD_L & CD_R to LINE_OUT_L & LINE_OUT_R.
SHUT DOWN
MODE DVDD(1/9) VAUX(34)
+3VS
When Project need implement Headphone channel output from Audio Codec pin 39 & 41, it must have another driver to support JD function to change signal path from LINE_OUT_L & LINE_OUT_R to HP_OUT_L & HP_OUT_R when headphone insert.
LEFT
LEFT 29
RIGHT
RIGHT 29 MD_MIC
IAC_BITCLK 19,33 IAC_SDATAI1 19
CLK_14M_CODEC
+AUD_VREF
1
C571
2
4.7U_0805_10V4Z
0.1U_0402_16V4Z
POWER OFF CD Play
0 0
0 1
12
R297
1
C277
2
NORMAL NORMAL
10_0402_5%@
15P_0402_50V8J@
1 0
CLK_14M_CODEC 17
1 1
C257
0.1U_0402_16V4Z
+AUD_VREF
1
1
C573
1 2
1 2
1 2
4.7U_0805_10V4Z
2
2
R164 0_0805_5%
R217 0_0805_5%
R694 0_0805_5%
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
2005/03/01 2006/03/01
Deciphered Date
2
Custom
Title
AC97 Codec ALC250
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
Date: Sheet
1
of
28 44
Page 29
5
+5VAMP
12
D D
C C
B B
R219
10K_0402_5%
R625
1.5K_0402_1%
BEEP#31
(0.65V -> 10dB )
VOL_AMP
12
1
C558
0.1U_0402_16V4Z
2
LEFT28 RIGHT28
+3V
1
14
P
OE#
I2O
G
U15A
7
74LVC125APW_TSSOP14
Pin 2
0.47U_0603_16V4Z
LEFT
C557 C556
0.47U_0603_16V4Z
1.3K_0603_5%
fo=1/(2*3.14*R*C)=260Hz R=1.3K / C=0.47U
+3V
12
R258 100K_0402_5%
R232
8.2K_0402_5%
3
1 2
C567
0.22U_0603_10V7K
CBS_SPK#25
SPKR20
HIGH
PIN 6,20 ACTIVE
LOW PIN 5,23 ACTIVE
LEFT_1
1 2
RIGHT_1
1 2
12
12
R624
R623
1.3K_0603_5%
+3V
C554
0.1U_0402_16V4Z
14
U35A SN74LVC14APWLE_TSSOP14
P
1
O2I
G
1
7
2
+3V
14
P
3
O4I
G
7
U35B SN74LVC14APWLE_TSSOP14
C553 0.47U_0603_16V4Z C552 0.47U_0603_16V4Z C212 0.47U_0603_16V4Z C213 0.47U_0603_16V4Z
1 2
4
+5VS
NBA_PLUG28
1 2 1 2 1 2 1 2
1 2
C566 1U_0603_10V4Z
C565 1U_0603_10V4Z
1 2
C563 1U_0603_10V4Z
1 2
1 2
L16 0_0805_5%
560_0402_5%
1 2
NBA_PLUG VOL_AMP INTSPK_L1 INTSPK_R1
1 2
R635 560_0402_5%
R630
R628
560_0402_5%
1 2
R627 10K_0402_5%
+5VAMP
LEFT_2 RIGHT_2RIGHT HP_L HP_R
1
C546
0.047U_0603_16V7K
2
12
W=40Mil
1
1
C548
2
2
0.1U_0402_16V4Z
U34
7
PVDD
SHUTDOWN#
18
PVDD
19
VDD
2
HP/LINE#
3
VOLUME
4
LOUT+
21
ROUT+
5
LLINEIN
23
RLINEIN
6
LHPIN
20
RHPIN
17
CLK
TPA0232PWPRG4_TSSOP24
+VDDA
12
R231 10K_0402_5%
12
R225 10K_0402_5%
1
C
Q10
2
B
2SC2411KT146_SC59
E
3
D19 RB751V_SOD323
2 1
C547
4.7U_0805_10V4Z
SE/BTL#
PC-BEEP
BYPASS
LOUT­ROUT-
GND GND GND GND
LIN
RIN
22 15 14 11 9 16 10 8
1 12 13 24
1
C224 10U_0805_10V4Z
2
1 2
R226
2.4K_0402_5%
1 2
3
SHUTDOWN#
1 2
C549 0.1U_0402_16V4Z
2
2
C561
1
1
1U_0603_10V4Z
(0.47U~1U)
MONO_IN
C239 1U_0603_10V4Z
+5VAMP
12
13
D
S
NBA_PLUG
INTSPK_L2 INTSPK_R2
2
C559
1
0.47U_0603_16V4Z
INTSPK_R1
INTSPK_L1
R617 100K_0402_5%
Q40 2N7002_SOT23
2
G
+5VAMP
R220 100K_0402_5%
1 2
C560
0.47U_0603_16V4Z
MONO_IN 28
C555 150U_D2_6.3VM_R15
INTSPK_R1-2
1 2
+
INTSPK_L1-2
1 2
+
C564 150U_D2_6.3VM_R15
MIC28
EAPD 28
R218 47_0402_5%
1 2 1 2
R221 47_0402_5%
MIC
INTSPK_R1-3 INTSPK_L1-3
L29 0_0603_5%
2
INTSPK_L1 INTSPK_L2 INTSPK_R1 INTSPK_R2
1
2
L15 FBMA-L11-160808-700LMT_0603
1 2
1 2
L17 FBMA-L11-160808-700LMT_0603
JMIC2 ACES_85205-0200
1 2
R645
12
12
2.2K_0402_5%
1
2
R644 0_0402_5%
1 2
12
R671
INT_MIC EXT_MIC
C572
220P_0402_50V7K
INTSPK_R1-4 INTSPK_L1-4
MIC_GND
2.2K_0402_5%
1
1
C160
C161
C162
2
2
22P_0402_25V8K
22P_0402_25V8K
NBA_PLUG
1
1
C226
2
2
330P_0402_50V7K
L45 FBMA-L11-160808-700LMT_0603
1 2
1 2
L46 FBMA-L11-160808-700LMT_0603
+AUD_VREF
JMIC1
CS CN
1 3 4 5
AMP_1-1470184-2
22P_0402_25V8K
C211
1
2
330P_0402_50V7K
JSPK1
1
1
2
2
3
3
4
4
ACES_85205-0400
C159
22P_0402_25V8K
CS CN
1 3 4 5
INT_MICINT_MIC1
1
JHP1
AMP_1-1470184-2
INT. MICPHONE JACK
EXT. MICPHONE JACK
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
2005/03/01 2006/03/01
Deciphered Date
2
Custom
Title
AMP & Audio Jack
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
Date: Sheet
1
of
29 44
Page 30
5
D D
4
3
2
1
12
R403
@
10_0402_5%
1
C369
@
18P_0402_50V8K
2
LPC_LAD[0..3]19,31
C C
LPC_LFRAME#19,31
+3VS
B B
LPC_LDRQ1#19 PLTRST_SIO#18
CLKRUN#20,23,25,27,31
CLK_33M_LPCSIO17
SIRQ20,25,31 ICH_PME#18,23,25,27,31
CLK_14M_SIO17
+3VS +3VS
12
R398
@
10K_0402_5%
12
R401
@
10K_0402_5%
GPIO11 1= 4E 0=2E
LPC_LAD[0..3]
U27
LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3
LPC_LFRAME# LPC_LDRQ1#
PLTRST_SIO#
R415
SIO_PD#
10K_0402_5%
@
PM_CLKRUN# IRMODE CLK_PCI_SIO SIRQ SIO_PME#
CLK_14M_SIO
12
R393
@
10K_0402_5%
SIO_GPIO11 SIO_SMI#
12
R383
@
10K_0402_5%
@
10
LAD0
12
LAD1
13
LAD2
14
LAD3
15
LFRAME#
16
LDRQ#
17
PCI_RESET#
18
LPCPD#
19
CLKRUN#
20
PCI_CLK
21
SER_IRQ
6
IO_PME#
9
CLK14
CLOCK
23
GPIO40
24
GPIO41
25
GPIO42
27
GPIO43
28
GPIO44
29
GPIO45
30
GPIO46
31
GPIO47
32
GPIO10
33
GPIO11/SYSOPT
34
GPIO12/IO_SMI#
35
GPIO13/IRQIN1
36
GPIO14/IRQIN2
40
GPIO23
8
VSS
22
VSS
43
VSS
52
VSS
LPC47N217-JV_STQFP64
LPC I/F
GPIO
POWER
SERIAL I/F
FIR
IRMODE/IRRX3
PARALLEL I/F
RXD1
TXD1 DSR1# RTS1# CTS1# DTR1#
RI1#
DCD1#
IRRX2 IRTX2
INIT#
SLCTIN#
SLCT
BUSY
ACK#
ERROR#
ALF#
STROBE#
VTR VCC VCC VCC VCC
62 63 64 1 2 3 4 5
IRRX
37
IRTXOUT
38 39
41 42 44
PD0
46
PD1
47
PD2
48
PD3
49
PD4
50
PD5
51
PD6
53
PD7
55 56
PE
57 58 59 60 61
7 11 26 45 54
CLK_14M_SIOCLK_PCI_SIO
12
R380
@
10_0402_5%
1
C343
@
10P_0402_50V8J
2
FIR Module
@
T45PAD
@
T46PAD
@
T47PAD
+3VS
1
1
C331
@
C326
2
2
@
1U_0603_10V4Z
1U_0603_10V4Z
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
2005/03/01 2006/03/01
Deciphered Date
2
Custom
Title
SUPER I/O and FIR
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
Date: Sheet
1
of
30 44
Page 31
5
4
3
2
1
+3VALW
ECAGNDM/B_ID
12
L31
+3VALW
12
R720
D D
C C
47K_0402_5%
ECRST#
1
C610
0.1U_0402_16V4Z
2
@
+3VS
Reserved for 87591L
JP4
ACES_85205-0400
LPC_LFRAME#
1 2
R718 10K_0402_5%
+3VALW
@
1
1 2 3 4
ECDEBUG
2
BLUE_LED#
3 4
GATEA2019 KBRST#19
10K_0402_5%
+5VALW
12
12
R713
4.7K_0402_5%
+5VALW
5
12
R710
R709
4.7K_0402_5%
4.7K_0402_5%
SMB_EC_DA1 SMB_EC_CK1 SMB_EC_DA2 SMB_EC_CK2
C284
0.1U_0402_16V4Z
1 2
U19
AT24C16AN-10SU-2-7_SO8
8
VCC
7
WP
6
SCL
5
SDA
4.7K_0402_5%
A0 A1 A2
GND
1 2 3 4
12
R712
B B
SMB_EC_CK136 SMB_EC_DA136
A A
R714
+5VALW
12
12
CLK_33M_LPCEC17
@
15P_0402_50V8D
R309 100K_0402_5%
R305
100K_0402_5%
+3VS
R715 10K_0402_5%
1 2
1 2
GATEA20 KBRST#
1 2
1 2
R719
C609
33_0402_5%
EAL50/51
Pin35: SCROL_LED#
HEL00
Pin40: CAPLOCK# Pin100: NUMLOCK#
LPC_LAD[0..3]19,30
SIRQ20,25,30
@
1 2
R706
Y3
32.768KHZ_1TJS125BJ4A421P
1
C602
2
10P_0402_50V8J
Close to RTC pad
LPC_LAD[0..3]
R753 0_0402_5%
20M_0402_5%
@
12
R708
1
0_0603_5% C601
2
10P_0402_50V8J
4
+3VALW
1 2
LPC_LFRAME#19,30
PCIRST#18,23,25,26,27
EC_SCI#20 CLKRUN#20,23,25,27,30
KSI[0..7]32
KSO[0..15]32
SMB_EC_DA25,15,27 SMB_EC_CK25,15,27 SMB_EC_DA136 SMB_EC_CK136
BLUE_LED#32 PWR_LED#32 NUMLOCK#32 CHARGE_LED#32 BATT_LED#32 CAPLOCK#32
PAD_LOCK#32
SYSON35,39 RSMRST#20
BKOFF#15 SLP_S3#20 LID_SWOUT#20 SLP_S5#20
EC_SMI#20 WLAN_LINK27 LID_SW#32
SUSP#15,23,32,35,39,41
PWRBTN_OUT#20 ICH_PME#18,23,25,27,30
CRY1 CRY2
12
0.1U_0402_16V4Z
1
C604
2
0.1U_0402_16V4Z
1
C608
2
GATEA20 KBRST#
LPC_LFRAME# LPC_LAD3 LPC_LAD2 LPC_LAD1 LPC_LAD0
PCIRST# ECRST# EC_SCI# PM_CLKRUN#
SMB_EC_DA2 SMB_EC_CK2 SMB_EC_DA1 SMB_EC_CK1
ECDEBUG BLUE_LED#
EC_SMI#
CRY1 CRY2
0.1U_0402_16V4Z
1
C596
2
1000P_0402_50V7K
1 2 3 5 6
9 10 12 14 15 42 24 44
KSI0
63
KSI1
64
KSI2
65
KSI3
66
KSI4
67
KSI5
68
KSI6
69
KSI7
70
KSO0
47
KSO1
48
KSO2
49
KSO3
50
KSO4
51
KSO5
52
KSO6
53
KSO7
54
KSO8
55
KSO9
56
KSO10
57
KSO11
58
KSO12
59
KSO13
60
KSO14
61
KSO15
62
EC_TCK
89
EC_TDO
90
88 87 86 85
34 35 38 40 99
101 100 102 104
4
7
8 16 17 18 19 20 21 22 23
140 138
1
2
U37
GA20/ GPIO00/GA20 KBRST#/GPIO01/KBRST# SERIRQ LPC_FRAME# / LFRAME# LPC AD3/LAD3 LPC AD2/LAD2 LPC AD1/LAD1 LPC AD0/LAD0 CLK_PCI_EC/PCICLK PCIRST# EC RST#/ ECRST# EC SCI#/SCI#/GPIO0E PM_CLKRUN#/ CLKRUN#
KSI0/GPIO30 KSI1/GPIO31 KSI2/GPI032 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPI035 KSI6/GPIO36 KSI7/GPIO37
KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24 KSO5/GPIO25 KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F EC URXD/KSO16/GPIO48 EC UTXD/KSO17/GPIO49
EC SMD2/ GPIO47/SDA2 EC SMC2/GPIO46/SCL2 EC SMD1/GPIO44/SDA1 EC SMC1/GPIO44/SCL1
PCM_SPK#/EMAIL_LED#/ GPIO16 SB_SPKR/PWR_SUSP_LED#/ GPIO17 PWRLED#/ GPIO19 NUMLED#/ GPIO1A BATT CHGI LED#/ E51CS# BATT LOW LED#/ E51MR0 CAPS LED#/ E51TMR1 ARROW LED#/ E51 INT0 SYSON/GPIO56/ E51 INT1
EC_RSMRST#/ GPIO02 BKOFF#/GPIO03 PM SLP S3#/GPIO04 EC LID OUT#/GPIO06 PM SLP S05#/ GPIO07 EC SMI#/GPIO08 EC SWI#/GPIO09 LID SW#/ GPIO0A SUSP#/GPIO0B PBTN_OUT#/GPIO0C EC PME#/GPIO0D
XCLKO XCLKI
C592
1000P_0402_50V7K
1
C606
2
Host
INTERFACE
key Matrix
scan
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
http://hobi-elektronika.net
3
+EC_AVCC
+EC_AVCC
75
26
37
105
11
127
141
VCC
VCC
VCC/ EC VCC
VCC / EC VCC
VCC / EC VCC
VCC / EC VCC
DAC_BRIG/DA0/GPIO3D
PWR
EN DFAN2/DA3/ GPIO3F
FAN/PWM
INVT_PWM/GPIO0F/PWM1
OUT BEEP/GPIO12/PWM3
FAN SPEED1/GPIO14/FANFB1 FAN SPEED2/GPIO15/FANFB2
PS2 interface
Data BUS
Address
BUS
SM BUS
GND13GND28GND
GND
GND
GND
39
103
129
139
2005/03/01 2006/03/01
0_0603_5%
1 2
C591
0.1U_0402_16V4Z
BATTEMP/AD0/GPIO38
BATT OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
AD BID0/AD3/GPIO3B
AD INtput or GPI
EC_AVCC / AVCC
EN DFAN1/DA1/GPIO3D
IREF2/DA2
DA output or GPO
BEEP#/GPIO10/PWM2
ACOFF/GPIO18/PWM4
PSCLK1 PSDAT1 PSCLK2 PSDAT2 PSCLK3 PSDAT3
ADB0/D0 ADB1/D1 ADB2/D2
ADB3/ D3
ADB4/D4 ADB5/D5 ADB6/D6 ADB7/D7 KBA0/A0 KBA1/A1 KBA2/A2 KBA3/A3 KBA4/A4 KBA5/A5 KBA6/A6 KBA7/A7 KBA8/A8
KBA9/A9 KBA10/A10 KBA11/A11 KBA12/A12 KBA13/A13 KBA14/A14 KBA15/A15 KBA16/A16 KBA17/A17 KBA18/A18 KBA19/A19
SELIO2#/ GPIO43
SELIO#/ GPIO50
FRD#/RD#
FWR#/WR#
FSEL#/SELMEM#
EC ON/ GPIO1B
AC IN/ GPIO1C
ECTHERM#/GPIO11
ONOFF/GPIO18
PCMRST#/GPIO1E
WL OFF#/GPIO1F
ALI/MH#/GPIO40
FSTCHG/GPIO41
VR ON/ GPIO42 GPIO57/GPIO57 GPIO58/GPIO58 GPIO59/GPIO59
AGND
KB910LQF A1_LQFP144
77
ECAGND
ECAGND
1 2
L30 0_0603_5%
BATT_TEMP
71
BATT_OVP
72
ADPI
73
M/B_ID
74
76 78 79
ICH_PWRGD
80
25 27
ICH_BATLOW#
30 31 32 33
PSCLK1T
91
PSDAT1T
92
PSCLK2
93
PSDAT2
94
PSCLK3
95
PSDAT3
96
ADB0
125
ADB1
126
ADB2
128
ADB3
130
ADB4
131
ADB5
132
ADB6
133
ADB7
134
KBA0
111
KBA1
112
KBA2
113
KBA3
114
KBA4
115
KBA5
116
KBA6
117
KBA7
118
KBA8
119
KBA9
120
KBA10
121
KBA11
122
KBA12
123
KBA13
124
KBA14
110
KBA15
109
KBA16
108
KBA17
107
KBA18
106
KBA19
98 84
97 135 136 144
41 43 29 36
SLP_S4#
45 46
MSEN#
81 82 83 137 142 143
Deciphered Date
R802 10K_0402_5% R803 0_0402_5% R848 0_0402_5% R852 0_0402_5%
BATT_TEMP ECAGND
BATT_TEMP 36 BATT_OVP 37 ACDC_ID 36
DAC_BRIG 15 EN_FAN1 33 IREF 37 ICH_PWRGD 20
INVT_PWM 15 BEEP# 29 ICH_BATLOW# 20 ACOFF 37 FAN1SPD 33 WLAN_ACT 27
12 1 2 1 2 1 2
PSCLK3 32 PSDAT3 32
ADB[0..7] KBA[0..19]
+VCCP_PWRGD 39 USER_BTN2# 32 FRD# 32 FWR# 32 FSEL# 32
EC_ON 32 ACIN 20,37,38 EC_THRM# 20 ON/OFF 32 SLP_S4# 20 USER_BTN1# 32
MSEN# 16 FSTCHG 37 VR_ON 42 THERMATRIP_VGA# 15 PROCHOT# 5
BORAD ID
M/B Ver.
Voltage
2
1 2
C598 0.01U_0402_16V7K
1 2
C600 0.01U_0402_16V7K C597 0.01U_0402_16V7K
ADB[0..7] 32 KBA[0..19] 32
0.2 0.3 1.0
0.1
ECAGNDBATT_OVP
1 2
HW_RADIO_ DI S# 27,32,33 BT_DET# 33 HW_RADIO_LED# 32 BT_ACTIVE 33
0.0 0.4 0.75 1.3
Date: Sheet
+3VALW
USER_BTN2# USER_BTN1#
R734 10K_0402_5%
1 2
R735 10K_0402_5%
1 2
+5VS
12
R793
0_0402_5%
R795 10K_0402_5%@ R796 10K_0402_5% R797 10K_0402_5%@ R798 10K_0402_5%@
1 2
R696 10K_0402_5%
1 2
R695 10K_0402_5%
For NS 87591L
KBA1
R700 10K_0402_5%@
KBA2
R699 10K_0402_5%@
KBA3
R698 10K_0402_5%@
KBA5
R697 10K_0402_5%
MSEN#
R259 100K_0402_5%
12 12 12 12
1 2 1 2 1 2 1 2
1 2
PSCLK1T PSDAT1T
PSCLK2 PSDAT2 PSCLK3 PSDAT3
+3VALW
+3VALW
FSEL#
R300 10K_0402_5%
FRD# EC_SMI#
1 2
R302 10K_0402_5%
1 2
R707 10K_0402_5%
1 2
For KB910
PCIRST#
1 2
R711 100K_0402_5%
+3VALW
EC_TINIT#
1 2
R701 100K_0402_5%
+3VALW
12
R704 150K_0603_5%
M/B_ID
12
100K_0603_5%
1
C599
2
0.1U_0402_16V4Z
of
1
31 44
1.6
Custom
Title
ENE KB910L
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
R705
Page 32
5
4
3
2
1
Killer switch
KeyBoard
D D
C C
KSI1 KSI7 KSI6 KSO9 KSI4 KSI5 KSO0 KSI2 KSI3 KSO5 KSO1 KSI0 KSO2 KSO4 KSO7 KSO8 KSO6
KSO3 KSO12 KSO13 KSO14 KSO11 KSO10 KSO15
JP2
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
ACES_85203-2402
25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
KSI[0..7]31 KSO[0..15]31
KSI1
25
KSI7
26
KSI6
27
KSO9
28
KSI4
29
KSI5
30
KSO0
31
KSI2
32
KSI3
33
KSO5
34
KSO1
35
KSI0
36
KSO2
37
KSO4
38
KSO7
39
KSO8
40
KSO6
41
KSO3
42
KSO12
43
KSO13
44
KSO14
45
KSO11
46
KSO10
47
KSO15
48
KSI[0..7] KSO[0..15]
C164 100P_0402_50V8J
1 2
C165 100P_0402_50V8J
1 2
C166 100P_0402_50V8J
1 2
C167 100P_0402_50V8J
1 2
C168 100P_0402_50V8J
1 2
C169 100P_0402_50V8J
1 2
C170 100P_0402_50V8J
1 2
C171 100P_0402_50V8J
1 2
C172 100P_0402_50V8J
1 2
C173 100P_0402_50V8J
1 2
C174 100P_0402_50V8J
1 2
C175 100P_0402_50V8J
1 2
C176 100P_0402_50V8J
1 2
C177 100P_0402_50V8J
1 2
C178 100P_0402_50V8J
1 2
C179 100P_0402_50V8J
1 2
C180 100P_0402_50V8J
1 2
C181 100P_0402_50V8J
1 2
C182 100P_0402_50V8J
1 2
C183 100P_0402_50V8J
1 2
C184 100P_0402_50V8J
1 2
C185 100P_0402_50V8J
1 2
C186 100P_0402_50V8J
1 2
C187 100P_0402_50V8J
1 2
SW2 SST-1215_3P
+3V
3
12
R306
100K_0402_5%
LID Switch
1
2 43
SW1 SPPB530600_4P
+3V
2
3
11223
D6
@
DAN217_SC59
1
+3VALW
1 2
HW_RADIO_DIS#
R726 10K_0402_5%
LID_SW#
HW_RADIO_DIS# 27,31,33
LID_SW# 31
Power BTN
EC_ON31
EC_ON
ON/OFFBTN#
+3VALW
12
R349 510K_0402_5%
1 2
R347 22K_0402_5%
D14
1
DAN202U_SC70
2
+3VALW
12
R346 100K_0402_5%
ON/OFF
3 2
13
Q27 DTC124EKAT146_SC59
ON/OFF 31 51ON# 41
C319
12
D13 RLZ20A_LL34
1000P_0402_50V7K
1
2
T/P
+5VS +5VS
JTP1
1 7 2 8 3 9
4
PSDAT331 PSCLK331
B B
10
5
11
6
12
ACES_85203-0602
BIOS ROM/512K
KBA11 KBA9 KBA8
+3VALW
A A
1 2
R304 0_0603_5%
+3VBIOS
C282
1
2
0.1U_0402_16V4Z
KBA13 KBA14 KBA17 FWE#
KBA18
1
KBA16 KBA15 KBA12
2
KBA7
C283
KBA6 KBA5
10U_1206_10V4Z
PSDAT3
C840 100P_0402_50V8J
PSCLK3
C841 100P_0402_50V8J
ADB[0..7] KBA[0..19]
U38
1
A11
2
A9
3
A8
4
A13
5
A14
6
A17
7
WE#
8
VCC
9
A18
10
A16
11
A15
12
A12
13
A7
14
A6
15
A5
16
A4
SST39VF040-70-4C-WHE_TSOP32
1 2 1 2
OE#
A10 CE# DQ7 DQ6 DQ5 DQ4 DQ3 VSS DQ2 DQ1 DQ0
A0 A1 A2 A3
ADB[0..7] 31 KBA[0..19] 31
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
FRD# KBA10 FSEL# ADB7 ADB6 ADB5 ADB4 ADB3
ADB2 ADB1 ADB0 KBA0 KBA1 KBA2 KBA3KBA4
FRD# 31 FSEL# 31
SW Board
+3VALW
+3VS
+3VALW
+3VS
FWE#
4
NC7SZ32P5X_NLU_SSOP5
U17
JPSWP1 SUYIN_80065AR-020G2T
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
USER_BTN1# USER_BTN2# ON/OFFBTN# NUM_LED# BLUE_LED# CAPS_LED# HDD_ACT# CR_LED# PAD_LOCK#
C874 47P_0402_50V8J C875 47P_0402_50V8J
+3VALW
5
2
P
I0
O
1
I1
G
3
USER_BTN1# USER_BTN2# ON/OFFBTN# NUM_LED# BLUE_LED# CAPS_LED# HDD_ACT#
R359 0_0402_5%
CR_LED1# PAD_LOCK#
C865 47P_0402_50V8J
1 2
C866 47P_0402_50V8J
1 2
C867 47P_0402_50V8J
1 2
C868 47P_0402_50V8J
1 2
C869 47P_0402_50V8J
1 2
C870 47P_0402_50V8J
1 2
C871 47P_0402_50V8J
1 2
C872 47P_0402_50V8J
1 2
C873 47P_0402_50V8J
1 2
1 2 1 2
+3VALW
12
R301 100K_0402_5%
2
G
1 3
D
Q15 2N7002_SOT23
1 2
S
CR_LED#
SUSP# 15,23,31,35,39,41
EC_FLASH# 20
FWR# 31
USER_BTN1# 31 USER_BTN2# 31
NUMLOCK# 31 BLUE_LED# 31 CAPLOCK# 31 HDD_ACT# 22
CR_LED# 25 PAD_LOCK# 31
LED Board
+5VALW
HW_RADIO_LED#31
+3VALW
PWR_LED#31 CHARGE_LED#31 BATT_LED#31
JLED1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
10
ACES_85205-0800
9
9
10
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
2005/03/01 2006/03/01
Deciphered Date
2
Custom
Title
BIOS & I/O Port
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
Date: Sheet
1
of
32 44
Page 33
5
4
3
2
1
@
2
B
1
1
1
H13 HOLEA
H1 HOLEA
H18 HOLEA
1
CF11
@
CF15
@
1
1
@
C
2222
1
1
1
CF2
@
CF14
@
H4 HOLEA
1
3
E
1
1
H2
H3
HOLEA
HOLEA
@
@
1
1
Blue Tooth
FAN1 Control and Tachometer
0_0603_5%
FAN1_ON
D17
@
@
+5VALW +5VS
12
R807
G
3
2 1
12
R808 0_0603_5%
6
2
1
D
S
Q41
4 5
SI3456BDV-T1-E3_TSOP6
1
C537
2
22U_1206_10V4Z
@
FAN1_VOUT
1
C155
2
10K_0402_5%
1000P_0402_50V7K
+3VS +BT_PWR
+3VS
Q53 AO3413_SOT23
D
S
USB2+ USB2­BT_ACTIVE WLAN_DAT WLAN_CLK BT_DET#
13
G
2
BT_ACTIVE
BT_DET#
1
C605
0.1U_0402_16V4Z
2
JBTP1
1 2 3 4 5
11
6
12 7 8 9 10
JST_BM10B-SRSS-TB
EN_FAN131
MDC CONN.
JP3 ACES_88023-12001~N
1
GND1
IAC_SDATO_MDC19 IAC_SYNC_MDC19 IAC_RST#_MDC19 IAC_BITCLK 19,28
3
IAC_SDATA_OUT
5
GND2
7
IAC_SYNC
9
IAC_SDATA_IN
11
IAC_RESET#
IAC_BITCLK
131314141515161617171818191920
Connector for MDC Rev1.5
check Azalia MDC Module
RES0 RES1
3.3V GND3 GND4
2 4
W=20 mil
6 8 10 12
20
5 6
+3V
+IN
OUT
-IN
U33B LM358ADT_SO8
1
2
R622 100K_0402_5%
1 2
7
1
C850
2
4.7U_0805_10V4Z
+12VALW
8
FAN1VREF FAN1_VFB
1
C551
2
1U_0603_10V4Z
R616
1 2
150K_0402_5%
C851
0.1U_0402_16V4Z
IAC_BITCLK
P
3
+IN
OUT
2
-IN
U33A
G
LM358ADT_SO8
4
C545 2200P_0402_50V7K
1 2
R590 100K_0402_5%
12
RB751V_SOD323
12
IAC_BITCLK_TERM
1
2
1
R857 10_0402_5%
C852 10P_0402_50V8J
D D
HW_RADIO_DIS#27,31,32
C C
B B
IAC_SDATAI219
A A
10K_0402_5%
USBP2+20 USBP2-20 BT_ACTIVE31 WLAN_DAT27 WLAN_CLK27 BT_DET#31
1 2
R636 22_0402_5%
R849
2
G
+BT_PWR
IAC_SDATAI2_MDC
12
13
D
Q54
AO3400_SOT23
S
1 2
R850 10K_0402_5%
1 2
R864 10K_0402_5%
+3V
12
R809
FAN1
JFAN1
1 2 3
ACES_85205-0300
@
+3VS
12
R163 10K_0402_5%
1
C156
0.01U_0402_16V7K
2
FM1
FM2
@
@
1
CF9
CF3
@
@
1
CF6
CF8
@
@
1
H10 HOLEA
@
1
H7 HOLEA
1
H8 HOLEA
1
H21
HOLEA
@
@
1
H20 HOLEA
@
1
@
1
1
1
H23 HOLEA
H6 HOLEA
H9 HOLEA
1
H17 HOLEA
1
1
1
FM3
@
CF1
@
CF5
@
@
@
FAN1SPD 31
FM5
@
1
CF7
@
1
CF13
@
1
H22 HOLEA
@
1
H5 HOLEA
1
H16 HOLEA
1
H14 HOLEA
1
SYMBOL(SOT23-NEW)
FM6
FM4
@
@
1
1
CF10
CF4
@
@
1
1
CF12
CF16
@
@
1
1
H24
H25
HOLEA
HOLEA
@
1
1
H11
H12
HOLEA
HOLEA
1
1
H15 HOLEA
1
H19 HOLEA
1
M1 HOLEA
@
1
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
2005/03/01 2006/03/01
Deciphered Date
Title
MDC / Blue Tooth / Fan
Size Document Number Rev
LA-3091 1.0
Custom
Tuesday, Janua ry 10, 2006
2
Date: Sheet
1
of
33 44
Page 34
5
4
3
2
1
OUT OUT OUT OC#
4
1
OUT OUT OUT OC#
1
2
8 7 6 5
C157
4
1
8 7 6 5
1
C312
2
470P_0402_50V7K
USB_P5­USB_P5+
+USB_BS
4
5
Vp
CH4 CH11Vn2CH2
+USB_AS
1 2
R862 0_0402_5%
1
C853 1U_0603_10V6K
2
1
+
C528
2
470P_0402_50V7K
USB_P0+ USB_P0-
+USB_AS
4
5
Vp
CH4
D30
CH11Vn2CH2
+USB_BS
OVCUR#5 20
+USB_BS
JUSBP3 SUYIN_020173MR004S512ZL
1 2 3 4
6
CH3
3
+USB_AS
1
2
6
CH3
3
VCC D­D+ GND
GND1 GND3
GND2 GND4
OVCUR#0 20
JUSBP2 SUYIN_2569AR-04G5T
1
VCC
2
D-
3
D+
4
GND
5
GND1
6
GND2
1000P_0402_50V7K
12
R833 22K_0402_5%
13
D
G
Q51
S
2N7002_SOT23
@
1000P_0402_50V7K
5 7
6
JUSBP3_G2
8
Add Shape for Stick Pin
C859
@
+USB_AS +USB_AS
SUSP
2
1
C863
2
+USB_BS +USB_BS
12
R831 22K_0402_5%
13
D
S
1
2
SUSP
2
G
Q50 2N7002_SOT23
1
C860 1000P_0402_50V7K
2
1
C864 1000P_0402_50V7K
2
@
@
+5VS
U13
1
GND
12
C154
0.1U_0402_16V4Z
SUSP15,35,40
D D
+5VS +USB_CS
U3
1
GND
2
IN
1
C18
2
0.1U_0402_16V4Z
SUSP15,35,40
C C
USBP4-20 USBP4+20
B B
A A
1 2
R830 0_0402_5%
L34
3
2
WCM2012F2S-900T04_0805
JUSBP3 Port 5
3 4
G548B2P8U_MSOP8
12
R6 100K_0402_5%
150U_D2_6.3VM_R15
3
2
4
1
NUP4301MR6T1_TSOP6
IN EN#
4
1
D28
8
OUT
7
OUT
6
OUT
5
C317
Vp
1 2
R754 0_0402_5%
1 2
R755 0_0402_5%
1
1
C316
2
@
2
470P_0402_50V7K
470P_0402_50V7K
USB_P4­USB_P4+
6
CH3
3
JUSBP1_G2
Add Shape for Stick Pin
OC#
+USB_CS
1
+
C25
2
+USB_CS +USB_CS
4
5
CH4 CH11Vn2CH2
JUSBP1 Port 3,4
OVCUR#3 20 OVCUR#4 20
JUSBP1 SUYIN_020122MR008S540ZU
1
VCC
VCC
2
D0-
D1-
3
D0+
D1+
4
VSS
VSS
G210G1
12
G311G4
1000P_0402_50V7K
12
R829 22K_0402_5%
13
D
SUSP
2
G
Q49
S
2N7002_SOT23
5
USB_P3-
6
USB_P3+
7 8
9
C861
@
+USB_CS +USB_CS
1
1
C862
@
2
1000P_0402_50V7K
2
4
5
Vp
CH4 CH11Vn2CH2
L35
3
3
2
2
WCM2012F2S-900T04_0805
6
CH3
D29 NUP4301MR6T1_TSOP6
3
SUSP15,35,40
1 2
R832 0_0402_5%
USBP0-20 USBP0+20
4
4
1
1
+5VS
12
C315
0.1U_0402_16V4Z
1 2
R834 0_0402_5%
USBP5-20 USBP5+20
WCM2012F2S-900T04_0805
3
2
2
IN
3
IN
4
EN#
G548B2P8U_MSOP8
12
R158 100K_0402_5%
150U_D2_6.3VM_R15
L36
3
3
2
2
NUP4301MR6T1_TSOP6
USBP3- 20 USBP3+ 20
U26
1
GND
2
IN
3
IN
4
EN#
G548B2P8U_MSOP8
12
R345 100K_0402_5%
150U_D2_6.3VM_R15
L37
WCM2012F2S-900T04_0805
C24
3
4
1
2
NUP4301MR6T1_TSOP6
4
1
+
D31
JUSBP2 Port 0
Current Limit U13
Current Limit U26
5
Current Limit U3
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
http://hobi-elektronika.net
3
2005/03/01 2006/03/01
Deciphered Date
2
Custom
Title
USB Conn
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
Date: Sheet
1
of
34 44
Page 35
5
4
3
2
1
+3VALW to +3VS Transfer
+3VALW +3VS
Q8
S
D
S
D
S
D
G
D
AO4422_SO8
1
C713
@
2
0.1U_0402_16V4Z
C260
0.01U_0402_16V7K
1 2 3 4
RUNON_3.3
C848
0.22U_0603_16V7K
+5VALW
Q13
8
D
7
D
6
D
5
D
AO4422_SO8
RUNON
C220
12
S S S
G
22U_1206_10V4Z
R854 100K_0402_5%
1 2
+5VS
1 2 3 4
C225
0.1U_0402_16V4Z
C264
0.1U_0402_16V7K
13
D
S
+12VALW
12
1 3
1
2
R224 470_0402_5%
2
G
Q9 2N7002_SOT23
R853 100K_0402_5%
R867
@
0_0402_5%
1 2
S
2
G
D
Q55 AOS3401_SOT23
C272
13
D
22U_1206_10V4Z
S
RUNON
R290 470_0402_5%
SUSP
2
G
Q11 2N7002_SOT23
8 7 6
C222
C274
5
C223
22U_1206_10V4Z
10U_1206_10V4Z
1
C712
@
2
10U_1206_10V4Z
0.1U_0402_16V4Z
R289
1M_0402_5%
+12VALW
12
SUSP
C221
22U_1206_10V4Z
C273
R291
100K_0402_5%
13
D
2
G
Q12
S
10U_1206_10V4Z
D D
C C
B B
+5VALW to +5VS Transfer
2N7002_SOT23
+1.8V to +1.8VS Transfer
+1.8VS+1.8V
Q7
S
D
S
D
S
D
G
D
AO4422_SO8 C158 10U_1206_10V4Z
1 2 3 4
C152
RUNON_1.8
C849
1U_0603_16V6K
D
S
R868
@
0_0402_5%
1 2
2
G
Q56 AOS3401_SOT23
R858 470_0402_5%
13
2
G
Q57 2N7002_SOT23
RUNON
SUSP
C151
22U_1206_10V4Z
0.1U_0402_16V7K
+12VALW
12
R855
R856 100K_0402_5%
1 2
12
100K_0402_5%
S
D
1 3
8 7 6 5
A A
+3VALW to +3V Transfer
Q38
8
S
D
7
S
D
6
S
D
5
G
C494
C495
10U_1206_10V4Z
10U_1206_10V4Z
D
AO4422_SO8
C496 10U_1206_10V4Z
+5VALW to +5V Transfer
+5VALW +5V
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C715
C714
C662
@
10U_1206_10V4Z
2
2
@
SUSON
+12VALW to +12V Transfer
+12VALW+12VALW
@
SUSON
@
2N7002_SOT23
@
12
2
C387
Q36
R452
1
6800P_0402_25V7K
2
G
G
100K_0402_5%
2
R453
@
51K_0402_5%
13
D
S
+3VS +5VALW +5VS
C846
1 2
0.1U_0402_16V4Z
+3V+3VALW
1 2 3 4
SUSON
Q35 AO3400_SOT23
D
S
1 3
G
2
Q37
@
NDS352AP_NL_SOT23
S
D
1 3
1
C406
@
4.7U_1206_25V6K
2
C449
+12V
22U_1206_10V4Z
C663
10U_1206_10V4Z
C448
0.1U_0402_16V7K
1
C390
2
0.1U_0402_16V4Z
C847
1 2
0.1U_0402_16V4Z
R407 470_0402_5%
13
D
S
SYSON#SUSP
2
G
Q34 2N7002_SOT23
SYSON31,39
47K_0402_5%
SUSP15,34,40
SUSP#15,23,31,32,39,41
R866
12
2
G
+12VALW
12
13
D
S
SUSP
SUSP#
2
G
R620 47K_0402_5%
SYSON#
Q44 2N7002_SOT23
+5VALW
2
G
12
R618 10K_0402_5%
13
D
Q42 2N7002_SOT23
S
+12VALW
12
R619 47K_0402_5%
13
D
Q43
S
2N7002_SOT23
SUSON
12
1
R621
C550
2
1M_0402_5%
0.01U_0402_16V7K
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
2005/03/01 2006/03/01
Deciphered Date
2
Custom
Title
DC Power Control
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
Date: Sheet
1
of
35 44
Page 36
5
SM A R T Ba t te r y: 1 .BA T +
2. I D 3 .B / I 4 . T S
5. S M D
6. S MC
7. G N D
4
3
2
1
P1
3
D D
C C
3
2
5
4
1
PJP5 JST_S5B-EH(LF)(SN)
2
5
4
1
P1
ADAP_ID
21
PF1 7A_24VDC_429007.WRML
+3VALWP
1 2
PR200 0_0402_5%@
12
1 2
12
VL
12
PR16
100K_0402_1%
MAINPWRON5,38,41
ACON37
B B
PD2
2 3
RB715F_SOT323
1
12
PC11
0.1U_0603_25V7K
N2
ACIN
Precharge detector
VL
Min. typ. Max. H-->L 14.589V 14.84V 15.243V L-->H 15.562V 15.97V 16.388V
FBMA-L18-453215-900LMA90T_1812
N1
12
PC2
PC1
560P_0402_50V7K
12P_0402_50V8J
PR201
@
10K_0402_1%
PC169
0.01U_0402_25V7K
@
2.2M_0402_5%
VS
1
O
PR23
34K_0402_1%
PL1
1 2
PR14
12
PU1A
LM393DR_SO8
8
3
P
+
2
-
G
4
12
66.5K_0402_1%
12
PC3
ACDC_ID 31
N5
12
PC12
1000P_0402_50V7K
12
PR26
12
12P_0402_50V8J
12
PRG++
13
D
S
VIN
12
PR5 10_1206_5%
N6
12
PC4
560P_0402_50V7K
PD30 RLZ24B_LL34
N4
PR19
191K_0402_1%
RHU002N06_SOT323
PQ1
N3
2
G
13
B+
12
12
47K_0402_5%
PR24
12
PQ2 DTC115EUA_SC70
2
PR17 499K_0402_1%
PR20 499K_0402_1%
BATT+
PL2
FBMA-L18-453215-900LMA90T_1812
BATT+
1 2
12
PC7
0.01U_0402_25V7K
N11
12
PC8 1000P_0402_50V7K
PJPB1 battery connector
12
PC10 1000P_0402_50V7K
PACIN
PACIN 37
+5VALWP
BATT++
21
PF2 12A_65V_451012MRL
PJP1
1
BATT+
2
ID
N10
3
B/I
4
TS
5
SMD
9 8
6
SMC
G
GND7G
SUYIN_200275MR007G113ZL
VIN
PD1 RLS4148_LLDS2
12
PR18
1K_0402_5%
VIN+
12
N9
N8
N7
1 2
PR22
100_0402_5%
1 2
PR25
100_0402_5%
1.5K_1206_5%
1 2
1.5K_1206_5%
1 2
1.5K_1206_5%
1 2
1.5K_1206_5%
1 2
PR10
PR11
PR12
PR13
1 2
PR15
1K_0402_5%
1 2
PR21
6.49K_0402_1%
BATT_TEMP
B+
BATT_TEMP 31
+3VALWP
SMB_EC_DA1 31
SMB_EC_CK1 31
BATT ONLY
Precharge detector
Min. typ. Max. H-->L 6 .138V 6.214V 6.359V L-->H 7. 196V 7.349V 7.505V
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
2005/09/12 2006/09/12
Deciphered Date
Title
DCIN & DETECTOR & Precharge
Size Document Number Rev
LA-3091 1.0Custom
2
Date: Sheet
1
of
36 44Tuesday, January 10, 2006
Page 37
5
4
3
2
1
Iadp=0~3A(65W)
Charger
PQ31
AO4407_SO8
VIN
D D
DTA144EUA_SC70
12
PR158
47K_0402_5%
N46 ACOFF#
13
D
2
G
S
PQ37
RHU002N06_SOT323
C C
PQ34
N45
13
2
ACOFF#
ACON36
PACIN36
ACIN 20,31,38
ACIN
1 2
B B
PR4
10K_0402_5%
8 7
5
47K
2
47K
1 3
PQ35
DTC115EUA_SC70
150K_0402_5%
RHU002N06_SOT323
PD28
1SS355_SOD323
1 2
ACON
PR171
22K_0402_5%
1 2
12
PD31
RLZ4.3B_LL34
PR162
PQ39
2
G
P2
1 2 36
4
12
12
PC141
0.1U_0603_25V7K
12
N44
13
D
PR167
100K_0402_1%
S
PACIN
PR175
158K_0603_1%@
2P4S:4300mAH/cell
0.7C=3.0A
OVP voltage : LI-3S :17.8V----BATT-OVP=1.9758V BATT-OVP=0.111*BATT+
A A
5
PQ32
AO4407_SO8
1 2 3 6
4
PR159
200K_0402_1%
N42
PC142
1U_0603_10V6K
150K_0402_1%
PR164
12
N33
12
12
PC144
0.1U_0402_16V7K
IREF31
PR172
2K_0402_5%
12
PQ40
DTC115EUA_SC70
8
P
7
0
G
4
8 7
5
12
1908LDO
PR190 0_0402_5%@
12
13
PU14B
5
+
6
-
LM358ADT_SO8
4
VIN
N17
12
PR166
9.31K_0402_1%
0_0402_5%
12
1908LDO
12
2
FSTCHG31
PACIN
P3
12
@
1SS355_SOD323
PD25
0.1U_0603_25V7K
12
PR168
0.01U_0402_25V7K
PR173
100K_0402_1%
N19
PR180
150K_0402_1%
1 2
PR194
681K_0603_1%
1 2
PR157
0.01_2512_1%
PC158
0.1U_0603_25V7K
N15
12
PC143
PR184
15K_0402_1%
N13
12
PC149
PR177
0_0402_5%
1 2
PR193
100K_0402_5%
VIN
12
12
PR182 20K_0402_1%
4 3
N16
12
0_0402_5%
12
N36
1 2
PR178
10K_0402_5%
N22
http://hobi-elektronika.net
B+
12
PC159
0.1U_0603_25V7K
@
PU13
1
PR163
N35
17
12
4 3
N20
12
15 13
11
8
N39
10
12
PR169
1 2
N30 N31
12
0.1U_0402_16V7K
N18
12
9
28
7
PR174
10K_0402_1%
PC152
PC154
PC155
0.1U_0402_16V7K
0_0402_5%
1 2
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PL16
FBMA-L18-453215-900LMA90T_1812
1 2
DCIN
CELLS
REF CLS
REFIN
VCTL ICTL
ACOK# SHDN# ACIN ICHG
IINP CCV
CCI
CCS
5
MAX1908-CCS
1 2
PC153
1000P_0402_50V7K
GND
14
6
N29
12
1000P_0402_50V7K
BATT_OVP31
2005/09/12 2006/09/12
3
12
12
PC138
4.7U_1206_25V6K
CSSP
TP
CSSN
DHI
LX
DLO
BST
DLOV
LDO
CSIP CSIN
BATT
PGND
20
MAX1908ETI+T_QFN28
1
0
12
PC140
PC139
4.7U_1206_25V6K
4.7U_1206_25V6K
N14
27 29 26
N34
25
N21
23
N28
21
24
N32
22 2
1908LDO 19 18 16
1 2
N25
N27
BATT+
VS
12
8
PU14A
3
P
+
2
-
G
LM358ADT_SO8
4
Deciphered Date
PC151 1U_0603_10V6K
PC156
0.01U_0402_25V7K
PQ38
8
G2
7
D1/S2/K
6
D1/S2/K
5
D1/S2/K
AO4916_SO8
1000P_0402_50V7K
1 2
PR1 0_0402_5%
BATT+
12
PR179 845K_0603_1%
N43
12
PR181 300K_0603_0.1%
N23
12
PR183 143K_0402_1%
N24
D2 D2 G1
S1/A
12
PC18
12
PR170
33_1206_5%
2
1 2 3 4
12
1 2
N40N41
12
PC150 1U_0805_25V4Z
1 2
PC157
0.01U_0402_25V7K
4
PQ33 AO4407_SO8
47K_0402_5%
N37
1 2
1 2 13
PQ36 DTC115EUA_SC70
PL17
N26
8 7
5
PR160
2
1 2 3 6
PR161
10K_0402_5%
1 2
16UH_LF919AS-160M=P3_3.7A_20% PC145
0.1U_0603_25V7K
PD27 1SS355_SOD323
4S CC-CV MODE : 16.8V
Title
Charger
Size Document Number Rev
LA-3091 1.0Custom
Date: Sheet
VIN
12
PD32 RLZ22B_LL34@
PD24 1SS355_SOD323@
1 2
PD26
1SS355_SOD323
4 3
ACOFF31
N47
1 2
N38
1 2
PR165
0.015_2512_1%
Charge voltage
1
BATT+
12
12
12
PC146
PC147
4.7U_1206_25V6K
PC148
4.7U_1206_25V6K
4.7U_1206_25V6K
of
37 44Tuesday, January 10, 2006
Page 38
5
4
3
2
1
+3.3V/+5V/+12V
B+
D D
PL8
FBMA-L18-453215-900LMA90T_1812
1 2
B+++
N55
21
PF3 7A_24VDC_429007.WRML
12
12
PC73
PC74
4.7U_1206_25V6K
C C
10U_LF919AS-100M-P3_4.5A_20%
+3VALWP
1
B B
+
2
PC85
150U_V_6.3VM_R18
2200P_0402_50V7K
12
PC81 47P_0402_50V8J
1 2
12
N58
PR94
1M_0402_1%
1.27K_0402_1%
1.27K_0402_1%
1 2
ACIN20,31,37
PL10
12
PC84
1 2
3.32K_0402_1%
1 2
100P_0402_50V8J
PR104
10K_0402_1%
PR101
2 1
SKUL30-02AT_SMA
PD17
PQ17
1
D2
2
D2
3
G1
4
S1/A
AO4916_SO8
PR92
PR93
PC71
0.1U_0603_25V7K
1 2
8
G2
7
D1/S2/K
6
D1/S2/K
5
D1/S2/K
12
0.47U_0603_16V7K PC82
PR97
619_0402_1%
1 2
1 2
PR98
10K_0402_5%
300K_0402_5%@
PR105
0_0402_5%
BST31
12
PR100
VS
12
12
PC91 1U_0805_25V4Z
@
BST51
0.1U_0603_25V7K PC72
2.5VREF
PR91
1 2
1 2
0_0402_5%
0.47U_0603_16V7K
PC83
8 7 6 5
12
PQ18
G2 D1/S2/K D1/S2/K D1/S2/K
AO4916_SO8
12
PR99 698_0402_1%
12
PR103
12
PR106 10K_0402_1%
B+++
D2 D2 G1
S1/A
10.2K_0402_1%
2
1
12
ACIN
RHU002N06_SOT323
21
12OUT
VL
VDD
BST5
DH5
LX5
DL5 PGND CSH5
CSL5
FB5
SEQ REF
SYNC
RESET#
GND
MAX1902EAI+T_SSOP28
8
3
PC75
4.7U_0805_6.3V6K
2
G
PQ41
4
N48
5
BST5
18
DH5
16
LX5
17
DL5
19 20
CSH5
14
CSL5
13
FB5
12 15 9
N54
6 11
PR102
0_0402_5%
1 2
12
N49
13
D
S
+12VALWP
PR187
2.7K_1206_5%
12
12
PC87
4.7U_0805_6.3V6K
PC162
4.7U_1206_25V6K
PD14
DAP202U_SOT323
VS
VL
12
PR89
PD15
0_0402_5%
1SS355_SOD323
33_1206_5%
N59
PC78
0.1U_0603_25V7K
25
DH3
27
LX3
26
DL3
24
CSH3 CSL3
N57
12
FB3
10 23
N52
28
12
PC86 1000P_0402_50V7K
PU6
1 2 3
7
VL
PR2
N53
12
BST3 DH3 LX3
DL3
CSH3 CSL3 FB3 SKIP# SHDN#
TIME/ON5 RUN/ON3
12
PR236 806K_0603_1%
1 2
N60
12
22
V+
MAINPWRON 5,36,41
N51
12
PC90
0.47U_0603_16V7K
1 2 3 4
PR96
1.54K_0402_1%
12
PC89 100P_0402_50V8J
1 2
PC161 470P_0805_100V7K
12
PR186 22_1206_5%
21
PF4 7A_24VDC_429007.WRML
N50
12
12
PC77
PC76
4.7U_1206_25V6K
2200P_0402_50V7K
12
FLYBACKSNB
PC160 10U_1206_25V6M
1 2
12
PD29 EC11FS2_SOD106
1 4
3 2
12
PC79 47P_0402_50V8J
N56
12
PR95 2M_0402_1%
2 1
PD18 SKUL30-02AT_SMA
PL9 10UH_SDT-1205P-100-118 GP_5A_20%
+5VALWP
1
+
PC88
2
150U_V_6.3VM_R18
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
2005/09/12 2006/09/12
Deciphered Date
Title
3.3V / 5V / 12V
Size Document Number Rev
LA-3091 1.0Custom
2
Date: Sheet of
1
38 44Tuesday, January 10, 2006
Page 39
5
4
3
2
1
+1.8VP / +VCCPP
D D
MAX8743_B+
N62
12
12
1 2
PC35
0.1U_0603_25V7K
C C
+VCCPP
1
+
PC50
2
B B
3.3UH_PCMB104E-3R3MS_11A_20%
12
12
PC51
220U_D2_4VM
4.7U_0805_6.3V6K PR61 499_0402_1%
12
PR64 10K_0402_1%
PL5
1 2
SUSP#15,23,31,32,35,41
PQ12
1
D2
2
D2
3
G1
4
S1/A
AO4916_SO8
PC34
2200P_0402_50V7K
D1/S2/K D1/S2/K D1/S2/K
G2
PR68
0_0402_5%
PC36
8 7 6 5
4.7U_1206_25V6K
PC46
0.1U_0603_25V7K
ONVCCP
12
PR237
3.3K_0402_5%
21
PF5 7A_24VDC_429007.WRML
1
PD7 DAP202U_SOT323
2
3
0.1U_0603_25V7K
BSTVCCPA
12
PC54
0.01U_0402_25V7K@
PC38
25
BST1
26
DH1
27
LX1
24
DL1
28
CS1
1
OUT1
2
FB1
11
ON1
12
0.22U_0603_10V7K
4
V+
PU4
MAX8743EEI+T_QSOP28
GND
OVP
8
23
SUSP#15,23,31,32,35,41
1 2
PR54
BSTVCCPB
0_0402_5%
12
DHVCCP LXVCCP LX2.5
DLVCCP CSVCCP
FBVCCP
12
1U_0805_25V4Z
PC44
20_0603_5%
8743VCC
12
22
9
VCC
SKIP
6
10
N63
12
PC45
PR53
1 2
VDD
UVP
BST2
DH2
LX2 DL2 CS2
OUT2
FB2
ON2
PGOOD
TON
ILIM2 ILIM1
REF
PR58
33K_0402_1%
PR59 0_0402_5%
+5VALW
21 19
18 17 20 16
15 14 12
7 5
13 3
12 12
0_0402_5%
12
BST2.5A DH2.5
DL2.5 CS2.5
FB2.5 ON2.5
ILIM2.5 ILIMVCCP
PR65
PR238
PC39
4.7U_0805_6.3V6K
1 2
12
0_0402_5%@
12
BST2.5B
PR55
0_0402_5%
12
N90
PR66
100K_0402_1%
2
G
12
PC47
0.1U_0603_25V7K
PR239 10K_0402_5%
1 2
N89
2
13
D
PQ44
S
RHU002N06_SOT323
G
1 2
PR67
0_0402_5%
+3VALWP+3VALWP
1 2
13
D
PQ45 RHU002N06_SOT323
S
PQ13
8
G2
7
D1/S2/K
6
D1/S2/K
5
D1/S2/K
AO4916_SO8
PR69 10K_0402_5%
D2 D2 G1
S1/A
PR240 510K_0402_5%@
1 2
N61
1 2 3 4
4.7U_LF919AS-4R7M-P3_5.2A_20%
1 2
SYSON 31,35
+VCCP_PWRGD 31
21
PF6 7A_24VDC_429007.WRML
12
PC40
2200P_0402_50V7K
PL6
PL3
FBMA-L18-453215-900LMA90T_1812
1 2
1 2
PC5
12
12
PC42
4.7U_1206_25V6K
12
PR198
8.06K_0402_1%
12
PR199 10K_0402_1%
1 2
PC43
4.7U_1206_25V6K
B+
1 2
PC6
1U_0805_50V4Z
0.1U_0603_25V7K@
@
PC41
0.1U_0603_25V7K
+1.8VP
1
12
+
2
220U_D2_4VM
PC49
PC48
4.7U_0805_6.3V6K
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
2005/09/12 2006/09/12
Deciphered Date
Title
+1.8VP & +VCCPP
Size Document Number Rev
LA-3091 1.0Custom
2
Date: Sheet
1
of
39 44Tuesday, January 10, 2006
Page 40
5
4
3
2
1
+0.9VSP / +2.5VSP
D D
+5VALWP
PJP2
3MM
21
+5VALW
+12VALWP
PJP3
2MM
21
+12VALW
PJP4
3MM
PJP9
3MM
PJP6
3MM
PJP11
3MM
21
21
21
+1.8V
2.5VIN
21
12
PC171
1U_0603_10V6K
+3VALWP +3VALW
+2.5VSP +2.5VS
+1.8VP
C C
+3VS
B B
+0.9VSP
+1.5VSP
+VCCPP +VCCP
PU10
2
IN
OUT
GND
1
PJP8
3MM
21
PJP10
3MM
21
PJP7
3MM
21
+2.5VSP
3
APL5508-25DC-TRL_SOT89-3
12
PC172
4.7U_0805_6.3V6K
+0.9VS
+1.5VS
12
PC173 10U_1206_25V6M
+1.8VP
12
PC93 10U_1206_6.3V7K
PU9
VIN1VCNTL
12
PC97
0.1U_0603_25V7K
2
GND
3
VREF
4
VOUT
APL5331KAC-TRL_SO8
12
PR107 1K_0402_1%
N64
12
PR108 1K_0402_1%
6 5
NC
7
NC
8
NC
9
TP
+3VALW
12
PC92 1U_0603_16V6K
13
N65
SUSP15,34,35
A A
1 2
PR109 237K_0402_1%
12
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
D
PQ20
2
RHU002N06_SOT323
G
S
PC192
0.1U_0402_16V7K
2005/09/12 2006/09/12
1
+
2
220U_D2_4VM@
PC98
Deciphered Date
+0.9VSP
12
PC99
4.7U_0805_6.3V6K
2
Title
+0.9VSP / +2.5VP
Size Document Number Rev
LA-3091 1.0Custom
Date: Sheet
1
of
40 44Tuesday, January 10, 2006
Page 41
5
PH1 under CPU botten side :
CPU thermal protection at 90 +-3 degree C Recovery at 50 +-3 degree C
4
3
RTC Battery & OTP & +1.5VSP
2
VIN
1
VL
N78N77
5 6
PR75 470K_0402_1%
PR76 470K_0402_1%
12
0.1U_0603_25V7K
PC175
12
PR72
470K_0402_1%
1 2
VS
8
P
+
O
-
G
4
12
VL
PC176
2200P_0402_50V7K
1 2
PC193
0.1U_0402_16V7K@
4
12
7
PU1B LM393DR_SO8
PR207 0_0402_5%
FCCM1.5
EN1.5
PC182
PC55
0.1U_0603_25V7K
N87
VIN1.5
PU15
1
VIN
2
VCC
3
FCCM
4
EN
COMP1.5
12
12
N79
12
22P_0402_50V8J
VL
1 2
+6269_VCC
12
N80
PR203
17
16
GND
PGOOD
COMP5FB6FSET
PR209
49.9K_0402_1%
PC183
6800P_0603_50V7K
FB1.5
12
MAINPWRON5,36,38
PR71 470K_0402_1%
13
D
2
G
PQ43
S
RHU002N06_SOT323
PHASE1.5
10K_0402_5%
15
PHASE
7
FSET1.5
12
PR230
57.6K_0402_1%
PR233
2.21K_0402_1%
UG1.5
14
UG
N81
13
BOOT
VO
8
12
2.2U_0603_6.3V6K
1 2
PR204 0_0402_5%
PVCC
LG
PGND
ISEN
ISL6269CRZ-T_QFN16
PC184
0.01U_0402_25V7K
PR232
1 2
3.32K_0402_1%
12
11
10
9
+5VS
12
PVCC1.5
LG1.5
ISEN1.5
N82
1 2
PC179
0.22U_0603_16V7K
PR205
0_0402_5%
@
1 2
PR206
2.2_0603_5%
1 2
1 2
PR231
11.5K_0402_1%
PC180
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
http://hobi-elektronika.net
3
BATT+
PR80
200_0805_5%
51ON#32
CHGRTCP N86
12
PD33 RLZ20A_LL34@
+6269_VCC
2005/09/12 2006/09/12
12
PD10 RB751V-40TE17_SOD323-2
N84
12
PR81
100K_0402_5%
1 2
PR83
22K_0402_5%
G920AT24U_SOT89
2
IN
12
PC67 1U_0805_25V4Z
PQ42
8
G2
7
D1/S2/K
6
D1/S2/K
5
D1/S2/K
AO4916_SO8
PL7
4.7U_LF919AS-4R7M-P3_5.2A_20%
1 2
Deciphered Date
S1/A
PU7
13
12
1 2
3
OUT
GND
1
1
D2
2
D2
3
G1
4
2
2
PC65
0.22U_1206_25V7K
N85
RTCVREF
12
PC68
4.7U_0805_6.3V6K
PQ16 TP0610K-T1-E3_SOT23
1 2
PR85
560_0603_5%
1
+
2
PC177
12
D D
12
PC191
0.22U_0603_16V7K
C C
B+
B B
A A
5
PH2 100K_0603_1%_TH11-4H104FT
N88
PR234 0_0402_5%
1 2
PR73 215K_0402_1%
1 2
PR235 20K_0402_1%
1 2
2 1
PF7 7A_24VDC_429007.WRML
+6269_VCC
SUSP#15,23,31,32,35,39
TM_REF1
12
PC190
1000P_0402_50V7K
12
4.7U_1206_25V6K
PC174
1 2
PR30
80.6K_0402_1%
12
1 2
12
PC181
2.2U_0603_6.3V6K
PD9 RLS4148_LLDS2
1 2
N83
12
12
PR79
PR202
68_1206_5%
68_1206_5%
12
PC63
0.1U_0603_25V7K
1 2
PR86
560_0603_5%
VS
CHGRTC
+1.5VSP
12
PC189
220U_D2_4VM
4.7U_0805_6.3V6K
Title
Size Document Number Rev
LA-3091 1.0Custom
Date: Sheet
1
41 44Tuesday, January 10, 2006
of
Page 42
5
4
3
2
1
21
+CPU_CORE
PC125 1000P_0402_50V7K
1 2
B+
+CPU_CORE
+3V
12
1 2
12
PC126 270P_0402_50V7K
PC128
0.22U_0603_16V7K
PQ26
RHU002N06_SOT323
1 2
N66
13
D
2
G
S
12
PR121 10_0402_5%
PC121 1U_0603_16V6K
1532VCC
1532VROK 1532S0 1532VCC 1532SHDN 1532TIME 1532CCV 1532TON 1532REF 1532ILIM 1532OFS1532FB 1532SUS 1532SKIP
1 2
PC131 27P_0402_50V8J
PR153 10K_0402_1%
PQ29 RHU002N06_SOT323
D D
PR122
10K_0402_5%
PR123 0_0402_5%
VID06 VID16 VID26 VID36 VID46 VID56
VGATE8,17,20
C C
H_STP_CPU#17,20
B B
VR_ON 31
RHU002N06_SOT323
PM_DPRSLPVR20
PR138 0_0402_5%
1 2
PR144
78.7K_0603_1%
1 2
1 2
PR145 100K_0402_1%
PQ25
2
G
PSI#6
1 2
13
D
S
PR149
0_0402_5%
1 2
PR139 100K_0402_5%@
1 2
PR142
200K_0402_5%
PR147
1 2
10.7K_0402_1%
+5VS
12
PR124 0_0402_5%
12
PR126 0_0402_5%
12
PR128 0_0402_5%
12
PR130 0_0402_5%
12
PR131 0_0402_5%
12
PR133 0_0402_5%
1 2
PR140 30.1K_0402_1%
12
PC130 100P_0402_50V8J
2
G
PR151 20K_0402_1%
PR154 100K_0402_1%
1 2
N76
1
PQ30
2
PMBT2222A_SOT23-3
3
1 2
1 2
13
D
S
1 2
10
D0
24
D1
23
D2
22
D3
21
D4
20
D5
19 25
12
18 11
+5VS
PU12
VCC D0 D1 D2 D3 D4 D5 VROK
4
S0
5
S1
6
SHDN
1
TIME CCV
2
TON
8
REF
9
ILIM
7
OFS
3
SUS SKIP GND
MAX1532AETL+T_TQFN40
PC120
2.2U_0603_6.3V6K
VDD
V+
BSTM
DHM
LXM DLM
PGND
CMP CMN
OAIN+
OAIN-
FB
CCI
BSTS
DHS
LXS DLS CSP CSN
GNDS
TP
OAIN+
1000P_0402_50V7K
OAIN+
1000P_0402_50V7K
30 36 26 28 27 29 31 37 38 17 16 15 14 35 33 34 32 40 39 13 41
PC19
PC20
1 2
1532BSTMA 1532DHM
1532DLM
1532CMP 1532CMN OAIN+ OAIN­1532FB 1532CCI 1532BSTSA 1532DHS 1532LXS 1532DLS 1532CSP 1532CSN
12
12
2 1
PD20 EP10QY03
12
PC122
0.01U_0402_25V7K
1 2
PR125 2_0402_5%
PC127
1 2
470P_0402_50V7K
1532BSTMB
12
PC123
0.22U_0603_16V7K
PR6 0_0402_5%
PR148
2_0402_5%
1 2
1532BSTSB
12
PC136
0.22U_0603_16V7K
+5VS
21
PR7 0_0402_5%
N68
12
PD22 EP10QY03
N70
12
CPU_B+
5
D8D7D6D
PQ23
S1S2S3G
SI4684DY-T1-E3_SO8
4
5
D8D7D6D
S1S2S3G
4
PQ24 SI4856ADY-T1-E3_SO8
PR141 909_0402_1%
1 2
5
D8D7D6D
PQ27
S1S2S3G
SI4684DY-T1-E3_SO8
4
5
D8D7D6D
S1S2S3G
4
PQ28 SI4856ADY-T1-E3_SO8
12
4.7U_1206_25V6K
PC114
4.7_1206_5%
12
PD21
EC31QS04
12
PC132
PR3
12
12
12
4.7U_1206_25V6K
PC115
0.56UH_ETQP4LR56WFC_21A_20%
1 2
N74
12
PC15
680P_0603_50V8J
CPU_B+
12
12
PC134
PC133
4.7U_1206_25V6K
2200P_0402_50V7K
PR8
4.7_1206_5%
1 2
PD23
EC31QS04
N75
12
PC16 680P_0603_50V8J
12
PC116
PC117
0.01U_0402_25V7K
2200P_0402_50V7K
PL14
1 2
12
PR134 909_0402_1%
1 2
PC124
0.47U_0603_16V7K
1 2
12
PC135
4.7U_1206_25V6K
0.01U_0402_25V7K
0.56UH_ETQP4LR56WFC_21A_20%
1 2
12
PR155 909_0402_1%
0.47U_0603_16V7K
1
+
PC14
2
N691532LXM
1 2
PR143
3K_0603_1%
N67
PC129
0.022U_0402_16V7K
PL15
1 2
PC137
FBMA-L18-453215-900LMA90T_1812
PL13
1 2
100U_25V_M
1 2
PR129
0.001_2512_5%
12
PR135 499_0402_1%
1 2
PR146 0_0402_5%
N73
PF8 7A_24VDC_429007.WRML
12
PR136
499_0402_1%
PR137
3K_0603_1%
CPU VCC SENSE
1 2
1 2
PR156
909_0402_1%
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
2005/09/12 2006/09/12
Deciphered Date
Title
+CPU_CORE
Size Document Number Rev
LA-3091 1.0Custom
2
Date: Sheet
1
of
42 44Tuesday, January 10, 2006
Page 43
5
Version change list (P.I.R. List)
4
3
Modify List PG# Rev.Reason for changeItem Phase
2
1
D D
Solve NB thermal issue
Avoid +LCDVDD voltage transfer loss from +3.3V to +3.1V1Change Q26 to S TR SI4410DY-T1-A 1N SO-8 15
2
3
Avoid can't turn on LCD
Add C855 S CER CAP 4.7U 6.3V K X5R 0805 Change C393 to S CER CAP 4.7U 6.3V K X5R 0805
11
15Change U1 to S IC NC7SZ08P5X_NL SC70 5P AND
0.2 EVT to DVT
Add Q58 S TR BSS138LT1G 1N SOT23 W/D Add R859 S RES 1/16W 4.7K +-5% 0402
Fix R G B rising time fail Change L3,L4,L5 to S SUPPRE_ TAI-TECH FCM2012CF-800T06 0805
4
Common Clock Generator Design
5
6
Correct can't power on when adapter plug-in
7
Avoid TP short when plug-in Delete JTP1 pin2 net from +5VS 32
8
C C
9
10
11
Change MDC module from V1.0 to V1.5 34Change JP3 from S H-CONN ACES 88021-30011 30P P0.8 to S H-CONN FOXCON QT8A0121-6011-8F 12P P.8
Remove Q47 S TR 2N7002 1N SOT-23 only for BOM
Add R853,R854 S RES 1/16W 100K +-5% 0402Fine tune +3VS power sequence
C848 S CER CAP .22U 16V K X7R 0603
Add R855,R856 S RES 1/16W 100K +-5% 0402Fine tune +1.8VS power sequence
C849 S CER CAP 1U 16V K X5R 0603 TAIYO
Add R858 S RES 1/16W 470 +-5% 0402Add +1.8VS dis-charge circuit
Q55 S TR AO3401L 1P SOT23
Q56 S TR AO3401L 1P SOT23
Q57 S TR 2N7002 1N SOT-23
Change NB L material to reduce Voltage lose Change L11,L19,L20L23 from S SUPPRE_ CHENG-HANN MBK1608301YZF 0603 to S SUPPRE_ KC FBMA-L11-160808-700LMT 0603 1112
Reduce USB over current signal nosie Add C856,C858 S CER CAP 1U 10V K X5R 0603 20
13
14
Fix ODD can't detect issue
Remove Q17,Q14 only fro BOM and delete D27,R813
16
17Change U31 to S IC ICS954226AGLFT TSSOP 56P CLK GEN
20
36
36
36
0.3 DVT to PVT & SVT
22
Add R813 S RES 1/16W 0 +-5% 0402
15
Eliminate LAN ISOLATE# voltage leakage Add Q61 S TR AO3413 1P SOT23-3 R43 S RES 1/16W 1K +-1% 0402 R46 S RES 1/16W 15K +-1% 0402 23
16
Fix MS/SD can't detect issue Remove R454,R468,R495,R463,R500,R505,R439 S RES 1/16W 43K +-5% 0402 fro SD
25 Remove R432,R419,R402,R414,R431 S RES 1/16W 43K +-5% 0402 for MS Delete U30 pin9 link to +12V
17
B B
Fix SPK niose issue Remove R639,R642,R640,R641,C569,C568,C570
Change R851 to L44 S SUPPRE_ KC FBMA-L11-160808-700LMT 0603
28
Change L18,L39 to S SUPPRE_ TAI-TECH FCM2012CF-800T06 0805 Change R285 to L44 S SUPPRE_ KC FBMA-L11-160808-700LMT 0603
Fix SPK niose issue Add C162,C161,C160,C159 S CER CAP 22P 25V K NPO 0402 29Add L45,L46 S SUPPRE_ KC FBMA-L11-160808-700LMT 0603
18
Deletet C844 S CER CAP 220P 50V K X7R 0402 Change L29 to S RES 1/10W 0 +-5% 0603
Fix MDC can't wake up on ring issue Change JP3 pin6 link to +3V 33
19
Delete USB Conn Delete JUSBP4,D32,L38,C839 34
20
21
Eliminate SYSON voltage surge issue Add R866 S RES 1/16W 47K +-5% 0402 35
22 1.0 SVT to MP v2.0Fix USB can't detect issue Del ete L40,L41,L42 34
23 Avoid CRT voltage leakage to +5VS Change R321 and R325 link to +CRT_VCC (original link to +5VS) 16 MP v2.0 to MP v3.0
A A
Custom
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
2005/09/12 2006/09/12
Deciphered Date
2
PIR HW
Title
PIR HW
Size Document Number Rev
LA-3091 1.0
Date: Sheet
1
of
43 44Tuesday, Jan ua ry 1 0, 2006
Page 44
5
4
3
2
Version change list (P.I.R. List) Page 1 of 2
Reason for change PG#Modify List B.Ver# PhaseItem
1
D D
C C
1
Adjust 0.9VSP power sequence Add PR109 237K_0402_1% and PC192 0.1U_0402_16V delay 0.9VSP.
2
Adjust 1.5VSP power sequence Add PR30 80.6K_0402_1% and PC193 0.1U_0402_16V delay 1.5VSP.
3
Improve 1.8VP VCCP 1.
4
To solve susp# leakage from +3valwp Delete PD3 39
5
To avoid +VCC_PWRGD trun on beofre +VCCP turn on. Add PQ44 PQ45 RHU002N06_SOT323,
6
、、
5VSP transient response Change PC50 PC48 PC177
、、
Delete PC193 at BOM. Adjust 1.5v back to A-test status. 41 B42 2005.12.01
from 150u 6.3v to 220u 4v 40 B42
PR238 0_0402_5%, PR239 10K_0402_5% 39 2005.12.01
41
42
2005.10.23
2005.10.23
2005.10.23
2005.12.01
7
8
9
10
11
B B
12
13
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
http://hobi-elektronika.net
3
2005/03/01 2006/03/01
Deciphered Date
2
Custom
Title
PIR PWR
Size Document Number Rev
LA-3091 1.0
Tuesday, Janua ry 10, 2006
Date: Sheet
1
of
44 44
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