Mobile Yonah uFCPGA with Intel
Calistoga_GM+ICH7-M core logic
33
44
A
B
2006-02-27
REV:0.5
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2006/02/272007/02/27
Compal Secret Data
Deciphered Date
Feb 27, 2007
Title
Size Docume nt NumberRe v
D
Date :Sheeto f
Compal Electronics, Inc.
Cover Sheet
LA-3031P
149Tuesd ay, Febru ary 28, 2006
E
0.5
A
Compal confidential
File Name : LA-3031
B
C
Heavenly 2.0
D
E
11
22
DOCK/DVI
page 34
DVI controller
CH 7307C- DE
page 17
CRT/TV-OUT
pag e 16
LCD CONN
page 17page 29
Fan Control
SD VO
PCI-E BUS
page 4
Mobile Yonah & Merom
uF CPGA-478 CPU
page 4,5,6
H_ A# (3.. 31)
FSB
533/667MHz
Intel Calistoga GMCH
945GM
PCBG A 1466
page 7,8,9,10,11,12
DM I
H_ D#( 0..6 3)
Thermal Sensor
ADM1032AR
page 4
DDR2 -400/533/667
Dual Channel
USB2.0
Clock Generator
IC S9L P306
DDR- SO-DIMM X2
BAN K 0, 1, 2, 3
FingerPrinter
AES2501
page 13,14
page 29
USB conn x3
BT Conn
page 29
page 15
MDC1. 5
page 31
PCI BUS
Intel ICH7-M
Gigabit LAN
BC M 5 75 3M
page 24
33
RTC CKT.
page 19
RJ45 /11 CONN
page 25
Mini C ard
socket
page 26
CardBus Controller
TI PCI6 612
page 22,23
Slot 0
page 23
SD/SDIO Slot
page 22
mBGA-652
page 18,19,20,21
SPI ROM
25LF080A
AC-LINK/Azalia
SATA Master
SPI
page 31
LPC BUS
Power OK C KT.
page 36
SMSC Super I/O
Power On/Off CKT.
page 33
44
DC/DC Interface CKT.
page 35
COM1 on
Docking side
LPC47N217
page 30
page 30
Touch Pad CONN.Int.KBD
page 33
SMSC KBC 1021
page 32
page 33
page 31
Audio CKT
AD1981HD
page 27
SATA HDD
Co nnector
page 19
SST49LF008A
AMP & Audio Jack
page 28
Docking CONN.
*RJ-45(LED*2)
*RJ-11(Pass Through)
*CRT
*COMPOSITE Video Out
*TVOUT
*DVI
*LINE IN
*LINE OUT
*PCI-E x2
Flash ROMSecurity Module
page 31
*Serial Port
*Parallel Port
*PS/2 x2
*USB x2
*DC JACK
page 34
Power Circuit DC/DC
36,37,38,39,40,41,42,43
A
LPT on
Docking side
page 30
FIR
B
page 30
Digitizer
page 17
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2006/02/272007/02/27
Compal Secret Data
Deciphered Date
D
Title
Size Docume nt NumberRe v
Date :Sheeto f
Compal Electronics, Inc.
Block Diagram
LA-3031P
249Tuesd ay, Febru ary 28, 2006
E
0.5
A
Voltage RailsSymbol note:
Power Plane
VIN
B+
+CPU_CORE
+VCCP
+0.9VS
+1.5VS
+1.8V
+2.5VS
+3VALW
+3V
+5VALW
+5V
+5VS
RTCVCC
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Description
Adapter power supply (19V)
AC or battery power rail for power circuit
Core voltage for CPU
1.05V power rail for Processor I/O and MCH core power
0.9V switched power rail for DDRII Vtt
1.5V switched power rail for PCI-E interface
1.8V power rail for DDRII
3.3V always on power rail
3V power rail
3.3V switched power rail+3VS
5V always on power rail
5V power rail
5V switched power rail
RTC power
S0-S1
N/A
ONOFF
ON
ON
ON
ON
ON
ON
ONOFF
ON
ON
ON
ON
S3
N/A
N/A
OFF
OFF
OFF
ON
ON2.5V always on power rail+2.5VALWON*ON
OFF
ON
ON
OFF
ON
ON
OFF
ON
S5
N/A
N/AN/A
OFF
OFF
OFF
OFF
OFF
OFF2.5V switched power rail for MCH video PLL
ON*
OFF
ON*
OFF
OFF
ONON
:means digital ground.
:means analog ground.
:means reserved.@
@ : means just reserve , no build
SPI@ : means just build when SPI I/F BIOS function enable.
FWH@ : means just build when FWH I/F BIOS function enable.
NOXDP@ : means just build when XDP function disable.
XDP@ : means just build when XDP function enable. When this time, docking PCI express will not work.
TPM@ : means just build when TPM1.2 function enable.
250@ : means just build when SMsC LPC47N250 chip selected.
1021@ : means just build when SMsC KBC1021 chip selected.
45@ : means need be mounted when 45 level assy or rework stage.
ACCEL@ : means just build when Accelerometer chip LIS3LV02DQ selected.
DVI_7307@ : means just build when DVI chip CH7307 selected.
DVI_1362@ : means just build when DVI chip SIL1362 selected.
11
Internal PCI Devices
DE VICE
L AN
Az ali aD27
USB1 .1/2 .0
PCI to PC I (D MI to PCI)
AC9 7 MO DEM
AC9 7 Au di o
PA TA /S ATA
LPC I/F
SM BU S
PCI Devi ce ID
D8
D28PCI- E
D29
D30
D30
D30
D31
D31
D31
IDS EL #
AD2 4
AD1 1
AD1 2
AD1 3
AD1 4
AD1 4
AD1 4
AD1 5
AD1 5
AD1 5
(D is ab le d by BI OS )
(D is ab le d by BI OS )
(P AT A is D is abled b y B IOS)
External PCI Devices
DE VICE
CA RD BU S
PCI Devi ce ID
D6
I2C / SMBUS ADDRESSING
DE VICE
DDR S O-DIMM 0
DDR S O-DIMM 1
CL OC K G EN ER ATOR (E XT.)
HEX
A0
A4
D2
IDS EL #
AD2 2
AD DRESS
1 0 1 0 0 0 0 0
1 0 1 0 0 1 0 0
1 1 0 1 0 0 1 0
REQ /G NT #
2
PIR Q
C D E G
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
2006/02/272007/02/27
Compal Secret Data
Deciphered Date
Title
Size Docume nt NumberRe v
Date :Sheeto f
Compal Electronics, Inc.
Notes List
LA-3031P
349Tuesd ay, Febru ary 28, 2006
0.5
5
4
3
2
1
H_A#[3 ..31]7
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
DD
H_REQ# [0..4]7
H_ADSTB#07
CC
R560
56_0402_5%
12
+VCCP
BB
H_PROCHOT #43
12
+VCCP
68_0402_5%
H_ADSTB#17
CLK_CPU _BCLK15
CLK_CPU_ BCLK#15
H_BPRI#7
H_DEF ER#7
H_D RDY#7
H_HITM#7
H_LOCK#7
H_RESET#7
H_RS# [0..2]7
H_TR DY#7
XDP_DBRESET#20
H_DB SY#7
H_DPSLP#19
H_DPRSTP#19,43
H_DPW R#7
R561
H_PWR GOOD19
H_CPUSLP #7
R5621K_0402_5%@
12
R56351_0402_5%
12
H_ADS#7
H_BNR #7
H_BR0#7
H_HIT#7
7/14
H_THERMDA, H _THERMDC routing together.
Trace width / Spacing = 10 / 10 mil
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/02/272007/02/27
Compal Secret Data
Deciphered Date
Title
Size Docume nt NumberRe v
2
Date :Sheet
Compal Electronics, Inc.
Yonah CPU in mFCPGA479
LA-3031P
1
o f
549Tuesd ay, Febru ary 28, 2006
0.5
5
4
3
2
1
DD
Place these capacitors on L8
(North side ,Secondary Layer)
Place these capacitors on L8
(North side ,Secondary Layer)
Place these capacitors on L8
(Sorth side ,Secondary Layer)
CC
Place these capacitors on L8
(Sorth side ,Secondary Layer)
South Side S econdary
BB
330U_D2E_2. 5VM_R9@
+VCC_C ORE
1
C593
10U_0805_6.3V6M
2
+VCC_C ORE
1
C601
10U_0805_6.3V6M
2
+VCC_C ORE
1
C609
10U_0805_6.3V6M
2
+VCC_C ORE
1
C617
10U_0805_6.3V6M
2
+VCC_C ORE
1
+
C626
C625
2
330U_D2E_2. 5VM_R9
1/41/4
330U_D2E_2. 5VM_R9
1
+
C627
2
1
C594
10U_0805_6.3V6M
2
1
C602
10U_0805_6.3V6M
2
1
C610
10U_0805_6.3V6M
2
1
C618
10U_0805_6.3V6M
2
1
+
C628
2
330U_D2E_2. 5VM_R9
@
1
+
2
1
2
1
2
1
2
1
2
330U_D2E_2. 5VM_R9
C629
C595
10U_0805_6.3V6M
C603
10U_0805_6.3V6M
C611
10U_0805_6.3V6M
C619
10U_0805_6.3V6M
1
+
C630
2
1
C596
10U_0805_6.3V6M
2
1
C604
10U_0805_6.3V6M
2
1
C612
10U_0805_6.3V6M
2
1
C620
10U_0805_6.3V6M
2
North Side S econdary
1
+
2
330U_D2E_2. 5VM_R9
1
C597
10U_0805_6.3V6M
2
1
C605
10U_0805_6.3V6M
2
1
C613
10U_0805_6.3V6M
2
1
C621
10U_0805_6.3V6M
2
1
C598
10U_0805_6.3V6M
2
1
C606
10U_0805_6.3V6M
2
1
C614
10U_0805_6.3V6M
2
1
C622
10U_0805_6.3V6M
2
1
C599
10U_0805_6.3V6M
2
1
C607
10U_0805_6.3V6M
2
1
C615
10U_0805_6.3V6M
2
1
C623
10U_0805_6.3V6M
2
ESR = 1.5m ohm
Capacitor = 1980uF
1
C600
10U_0805_6.3V6M
2
1
C608
10U_0805_6.3V6M
2
1
C616
10U_0805_6.3V6M
2
1
C624
10U_0805_6.3V6M
2
Mid Frequence Decoupling
+VCCP
220U_D2_2VK_R9
1
+
C634
2
AA
1
C635
0.1U_0402_16 V4Z
2
1
C636
0.1U_0402_ 16V4Z
2
1
C637
0.1U_0402_16 V4Z
2
1
C638
0.1U_0402_16 V4Z
2
1
C639
0.1U_0402_16 V4Z
2
1
C640
0.1U_0402_16 V4Z
2
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Place these inside
socket cavi ty on L8
(North side
Secondary)
2006/02/272007/02/27
Compal Secret Data
Deciphered Date
2
Title
Size Docume nt NumberRe v
Date :Sheetof
Compal Electronics, Inc.
CPU Bypass capacitors
LA-3031P
649Tuesd ay, Febru ary 28, 2006
1
0.5
5
4
3
2
1
H_D# [0..63]4
DD
CC
+VCCP
12
12
R577
R578
54.9_0402_1%
L
H_XS COMP /H_Y SCOM P tr ace
width a nd spacin g is 5/20.
Layout Note :
V_DDR_MCH_R EF
trace width and
spacing is 20/20.
8/29
V_DDR_ MCH_REF
1
C641
2
0.1U_0402_16 V4Z
Stuff R590 & R591 for A1 Calistoga
C643
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/02/272007/02/27
Compal Secret Data
Deciphered Date
2
Title
Size Docume nt NumberRe v
Date :Sheetof
Compal Electronics, Inc.
Calistoga (2/6)
LA-3031P
849Tuesd ay, Febru ary 28, 2006
1
0.5
5
4
3
2
1
DD
U15C
LIBG
12
12
255_0402_1%
L64
L66
L68
H27
SDVOCTRL_DATA
H28
SDVOCTRL_CLK
B37
LA_DATA0
B34
LA_DATA1
A36
LA_DATA2
C37
LA_DATA#0
B35
LA_DATA#1
A37
LA_DATA#2
F30
LB_DATA0
D29
LB_DATA1
F28
LB_DATA2
G30
LB_DATA#0
D30
LB_DATA#1
F29
LB_DATA#2
A32
LA_CLK
A33
LA_CLK#
E26
LB_CLK
E27
LB_CLK#
D32
LBKLT_CTL
J30
LBKLT_EN
H30
LCTLA_CLK
H29
LCTLB_DATA
G26
LDDC_CLK
G25
LDDC_DATA
F32
LVDD_EN
B38
LIBG
C35
LVBG
C33
LVREFH
C32
LVREFL
A16
TVDAC_A
C18
TVDAC_B
A19
TVDAC_C
J20
TV_IREF
B16
TV_IRTNA
B18
TV_IRTNB
B19
TV_IRTNC
J29
TV_DCONSEL1
K30
TV_DCONSEL0
C26
DDCCLK
C25
DDCDATA
H23
VSYNC
G23
HSYNC
E23
BLUE
D23
BLUE#
C22
GREEN
B22
GREEN#
A21
RED
B21
RED#
J22
CRT_IREF
QG82945GM QK56 A3 FCBGA 1466
TVCRT
D_RE D 16,34
D_GREE N 16,34
D_BLUE 16,34
LVDS
PCI-EXPRESS GRAPHICS
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SDVO_SDAT17
SDVO_SCLK17
TXA0+17
TXA1+17
TXA2+17
TXA0-17
TXA1-17
TXA2-17
TXB0+17
TXB1+17
TXB2+17
+3VS
12
12
R603
CC
LCD_CL K17
LCD_DAT17
TV-Out Termination
COMPS
LUMA
CRMA
BB
10K_0402_5%
LCD_CL K
LCD_DAT
Place close t o U15
R608
12
R609
75_0402_1%
12
75_0402_1%
CRT Termination/EMI Filter
C_RE D
C_BLU
R611
12
75_0402_1%
5
AA
12
75_0402_1%
R612
HLC0603CSCC 39NJT_0603
HLC0603CSCC 39NJT_0603
HLC0603CSCC 39NJT_0603
12
R613
75_0402_1%
12
R610
75_0402_1%
L63
12
L65
12
L67
12
R604
10K_0402_5%
1
2
18P_0402_50V8J
C655
TXB0-17
TXB1-17
TXB2-17
TXACLK+17
TXACLK-17
TXBCLK+17
TXBCLK-17
ENAVD D17
DDCC LK16
DDCDAT A16
VSYNC16
HSYNC16
Place close t o U15
C_RED_ L
C_GRN _LC_G RN
C_BLU_L
1
C656
2
18P_0402_50V8J
TXB0+
TXB1+
TXB2+
TXB0ÂTXB1ÂTXB2-
TXBCLK+
TXBCLK-
BKLT_CTL
ENABLT
ENAV DD
R6051.5K_0402_1%
COMPS
LUMA
CRMA
12
R606
4.99K_0603_1%
C_BLU
C_G RN
C_RE D
R607
12
HLC0603CSCC R11JT_0603
12
HLC0603CSCC R11JT_0603
12
HLC0603CSCC R11JT_0603
1
C657
18P_0402_50V8J
2
4
PEG COM P t race wid th
and s paci ng i s 18/ 25 mi ls.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
0 = Only PCIE or SDVO is
operational.
1 = PCIE/SDV O are operating
simu.
CFG57
CFG77
CFG97
CFG117
CFG127
CFG137
CFG167
CFG187
CFG197
CFG207
R6232.2K_0402_5%@
R6242.2K_0402_5%@
R6252.2K_0402_5%@
R6262.2K_0402_5%@
R6272.2K_0402_5%@
R6282.2K_0402_5%@
R6292.2K_0402_5%@
R6301K_0402_5%@
R6311K_0402_5%@
R6321K_0402_5%@
*
12
12
12
8/1
12
12
12
12
12
12
12
(Default)
*
(Default)
*
(Default)
*
+3VS
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/02/272007/02/27
Compal Secret Data
Deciphered Date
Title
Size Docume nt NumberRe v
2
Date :Sheetof
Compal Electronics, Inc.
Calistoga (6/6)
LA-3031P
1249Tuesd ay, Febru ary 28, 2006
1
0.5
5
4
3
2
1
DDR_A_ DQS#[0..7 ]8
DDR_ A_D[0..63 ]8
DDR_A_ DM[0..7]8
DDR_A _DQS[0..7 ]8
DDR_A_ MA[0..13]8
DD
+1.8V
2.2U_0805_16 V4Z
C458
1
2
0.1U_0402_16 V4Z
1
2
CC
Layout Note:
Place one cap clo se to every 2 pullup
resistors terminated to +0.9V_DDR_VTT
+0.9VS
0.1U_0402_16 V4Z
0.1U_0402_16 V4Z
0.1U_0402_16 V4Z
1
1
2
2
C239
BB
AA
C229
DDR_A_MA5
DDR_A_MA8
DDR_A_MA1
DDR_A_MA3
DDR_A_ RAS#
DDR_CS0_D IMMA#
DDR_A_BS #0
DDR_A_MA10
DDR_A_ CAS#
DDR_A_W E#
DDR_CS1_D IMMA#
M_ODT1
1
2
C250
RP27
RP29
RP32
RP31
RP33
5
0.1U_0402_16 V4Z
0.1U_0402_16 V4Z
1
2
C257
14
23
56_0404_4P2R_5%
14
23
56_0404_4P2R_5%
14
23
56_0404_4P2R_5%
14
23
56_0404_4P2R_5%
14
23
56_0404_4P2R_5%
RP35
23
14
56_0404_4P2R_5%
1
2
C272
+0.9VS
0.1U_0402_16 V4Z
1
2
0.1U_0402_16 V4Z
C279
RP22 56_0404_ 4P2R_5%
RP26 56_0404_ 4P2R_5%
RP25 56_0404_ 4P2R_5%
RP28 56_0404_ 4P2R_5%
RP30 56_0404_ 4P2R_5%
RP34 56_0404_ 4P2R_5%
RP24 56_0404_ 4P2R_5%
0.1U_0402_16 V4Z
1
1
2
2
C274
C281
DDR_A_BS #2
14
DDR_CKE0 _DIMMA
23
DDR_A_MA7
14
DDR_A_MA6
23
DDR_A_MA9
14
DDR_A_MA12
23
DDR_A_MA4
14
DDR_A_MA2
23
DDR_A_MA0
14
DDR_A_BS #1
23
M_ODT0
14
DDR_A_MA13
23
DDR_CKE1 _DIMMA
14
DDR_A_MA11
23
0.1U_0402_16 V4Z
2.2U_0805_16 V4Z
1
2
C255
1
2
C268
Layou t No te:
Pla ce ne ar JP3 4
2.2U_0805_16 V4Z
C498
1
2
0.1U_0402_16 V4Z
C242
1
2
0.1U_0402_16 V4Z
0.1U_0402_16 V4Z
1
2
C252
2.2U_0805_16 V4Z
C473
C491
1
2
0.1U_0402_16 V4Z
0.1U_0402_16 V4Z
C280
1
2
0.1U_0402_16 V4Z
1
1
2
2
C234
C241
Layout Note:
Pla ce thes e res istor
closely JP34,all
trace length <750 mil
Lay out No te:
Pl ace th es e re sist or
clo sely JP 34,all
tra ce l ength Max=1 .3"
4
DDR_A _D0
DDR_A _D1
DDR_A_ DQS#0
DDR_A_ DQS0
DDR_A _D2
DDR_A _D3
DDR_A _D8
2.2U_0805_16 V4Z
C465
1
2
C235
1
2
DDR_CKE0_D IMMA7
DDR_A_BS# 28
DDR_A_BS# 08
DDR_A_W E#8
DDR_A_ CAS#8
DDR_CS1_DI MMA#7
0.1U_0402_16 V4Z
1
2
C227
M_ODT17
ICH_SMBDATA4, 14,15,20,24,26
ICH_SMBCL K4,14,15,2 0,24,26
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Layout Note:
Place one cap clo se to every 2 pullup
resistors terminated to +0.9V_DDR_VTT
+0.9VS
0.1U_0402_16 V4Z
0.1U_0402_16 V4Z
0.1U_0402_16 V4Z
0.1U_0402_16 V4Z
1
1
1
2
2
C179
RP14
14
23
56_0404_4P2R_5%
RP17
14
23
RP16
56_0404_4P2R_5%
14
23
56_0404_4P2R_5%
RP18
14
23
RP19
56_0404_4P2R_5%
14
23
56_0404_4P2R_5%
RP23
23
14
56_0404_4P2R_5%
2
C186
+0.9VS
5
C176
BB
AA
DDR_B_MA1
DDR_B_MA3
DDR_B_BS #0
DDR_B_MA10
DDR_B_MA0
DDR_B_BS #1
DDR_B_ RAS#
DDR_CS2_D IMMB#
DDR_B_ CAS#
DDR_B_W E#
DDR_CS3_D IMMB#
M_ODT3
0.1U_0402_16 V4Z
1
1
2
2
C197
C213
RP10 56_0404_ 4P2R_5%
RP11 56_0404_ 4P2R_5%
RP12 56_0404_ 4P2R_5%
RP13 56_0404_ 4P2R_5%
RP15 56_0404_ 4P2R_5%
RP21 56_0404_ 4P2R_5%
RP9
56_0404_4P2R_5%
0.1U_0402_16 V4Z
1
2
14
23
14
23
14
23
14
23
14
23
14
23
14
23
4
Layou t No te:
Pla ce ne ar JP1 0
2.2U_0805_16 V4Z
2.2U_0805_16 V4Z
C265
1
1
2
2
0.1U_0402_16 V4Z
C219
C166
1
1
2
2
0.1U_0402_16 V4Z
0.1U_0402_16 V4Z
1
1
2
C173
Layout Note:
Pla ce thes e res istor
closely JP10,all
trace length <750 mil
Lay out No te:
Pl ace th es e re sist or
clo sely JP 10,all
tra ce l ength Max=1 .3"
1
2
2
C218
C163
4
3
+1.8V
JP10
1
VREF
3
DDR_B _D0
DDR_B _D1
DDR_B_ DQS#0
DDR_B_ DQS0
DDR_B _D2
DDR_B _D3
DDR_B _D8
2.2U_0805_16 V4Z
2.2U_0805_16 V4Z
C159
C247
0.1U_0402_16 V4Z
C188
1
2
0.1U_0402_16 V4Z
1
2
C177
C164
1
1
2
2
0.1U_0402_16 V4Z
C161
1
2
DDR_CKE2_ DIMMB7
DDR_B_BS# 28
DDR_B_BS# 08
DDR_B_W E#8
DDR_B_ CAS#8
DDR_CS3_DI MMB#7
M_ODT37
ICH_SMBDATA4, 13,15,20,24,26
ICH_SMBCL K4,13,15,2 0,24,26
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1
C722
0.1U_0402_16 V4Z
2
R635
12
1_0805_1%
12
R636
2.2_0805_1%
1
C729
0.1U_0402_16 V4Z
2
LCDCLK_SST/SRCCLKT0
LCDCLK_SSC/SRCCLKC0
SATA1/SRCCLKT4
SATA1/SRCCLKC4
SATA2/SRCCLKT5
SATA2/SRCCLKC5
*CPUCLKT2_ITP/CLKREQC#
*CPUCLKC2_ITP/CLKREQD#
2006/02/272007/02/27
3
CK_V DD_REF
CK_VDD_ 48
SATACLKT
SATACLKC
CPUCLKT0
CPUCLKC0
CPUCLKT1
CPUCLKC1
*CLKREQA#
SRCCLKT2
SRCCLKC2
*CLKREQB#
SRCCLKT1
SRCCLKC1
SRCCLKT3
SRCCLKC3
SRCCLKT6
SRCCLKC6
SRCCLKT8
SRCCLKC8
SRCCLKT7
SRCCLKC7
Pla ce c ryst al wit hin
500 mils of CK4 10
C73033P_0402_50V8J
12
CLK_XTAL_IN
57
X1
CLK_XTAL_OUT
56
X2
28
29
CPU_BC LK
52
CPU_BCL K#
51
MCH_BCLK
49
MCH_BCLK#
48
64
SSCD REFCLK
18
SSCDREF CLK#
19
PCIE_LOM
22
PCIE_LOM#
23
PCIE_SATA
30
PCIE_SATA#CLK_PCIE_SATA#
31
63
20
21
PCIE_D OCKC LK_PCIE_DOC K
26
27
PCIE _ICH
35
PCIE _ICH#
34
CPU_XDP
45
MCH_3GPLL
37
MCH_3GPLL#
36
43
42
CPU_XDP#
44
PCIE_M CARD
39
PCIE_M CARD#
38
Y3
14.31818MHZ_20P_6X1430004201
C73133P_0402_50V8J
Routing th e t race at leas t 10mil
R639
12
R6410_0402_5%
12
Routing th e t race at leas t 10mil
12
R64224_0402_5%
12
R64424_0402_5%
12
R64724_0402_5%
12
R65324_0402_5%
9/16
12
R94324_0402_5%
12
R94424_0402_5%
9/16
12
R67824_0402_5%
12
R68224_0402_5%
12
R66624_0402_5%
12
R66924_0402_5%
9/16
R67510K_0402_5%
9/16
12
R68524_0402_5%
12
R68724_0402_5%
12
R68924_0402_5%
12
R69124_0402_5%
R69410K_0402_5%NOXDP@
R6960_0402_5%NOXDP@
12
R69924_0402_5%XDP@
12
R70224_0402_5%
12
R70524_0402_5%
9/16
R7110_0402_5%NOXDP@
12
R71224_0402_5%XDP@
12
R71324_0402_5%
12
R71424_0402_5%
9/16
+3VS
R69510K_0402_5%@
Compal Secret Data
Deciphered Date
2
12
12
0_0402_5%
CLK_CP U_BCLK
CLK_CPU _BCLK#
CLK_MCH_B CLK
CLK_MCH_BCL K#
CLKREQA#
MCH_SS CDREFCLK
MCH_SS CDREFCLK#
12
12
R71010K_0402_5%NOXDP@
12
10/04
CLK_PCIE_LOM
CLK_PCIE_LOM#
CLK_PCIE_SATA
CPPE#CLKREQ B#
CLK_PC IE_DOCK#PCIE_D OCK#
CLK_ PCIE_ICH
CLK_PC IE_ICH#
12
CLKREQ C#
CLK_CPU_XDP
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
12
CLKREQ D#
CLK_CPU_XDP#
CLK_PC IE_MCARD
CLK_PC IE_MCARD#
5/23
12
2
CLKREQA# 24
10/04
PCI_ EC
1
CLKREQA#
CLKREQB#
CLKREQ C#
CLKREQ D#
1/12
Place near U25
12
C1050
@
1000P_0402_50V7K
12
C1051
1000P_0402_50V7K@
12
C1052
1000P_0402_50V7K@
12
C1049
1000P_0402_50V7K
Place near U25
Place these components
near each pin within 40
mils.
CLK_CPU _BCLK 4
CLK_CPU_ BCLK# 4
CLK_MCH_BCL K 7
CLK_MCH_BCL K# 7
MCH_SS CDREFCLK 7
MCH_SS CDREFCLK# 7
CLK_PCIE_LOM 24
CLK_PCIE_LOM# 24
CLK_PCIE_SATA 19
CLK_PCIE_SATA# 19
CPPE# 18,34
CLK_PC IE_DOCK 34
CLK_PC IE_DOCK# 34
CLK_P CIE_ICH 20
CLK_PC IE_ICH# 20
+3VS
CLKREQC # 7
CLK_CPU_XDP 4
CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7
+3VS
CLKREQD # 26
CLK_CPU_XDP# 4
CLK_PC IE_MCARD 26
CLK_PC IE_MCARD# 26
Title
Size Docume nt NumberRe v
Date :Sheetof
CLK_CP U_BCLK
CLK_CPU _BCLK#
CLK_MCH_B CLK
CLK_MCH_BCL K#
MCH_SS CDREFCLK
MCH_SS CDREFCLK#
CLK_PCIE_LOM
CLK_PCIE_LOM#
CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
CLK_PC IE_MCARD
CLK_PC IE_MCARD#
CLK_ PCIE_ICH
CLK_PC IE_ICH#
CLK_CPU_XDP
CLK_CPU_XDP#
CLK_PC IE_DOCK
CLK_PC IE_DOCK#
CLK_MC H_DREFCLK
CLK_MC H_DREFCLK#
R64349.9_0402_1%@
R64549.9_0402_1%@
R64849.9_0402_1%@
R65449.9_0402_1%@
12
R65949.9_0402_1%@
12
R66149.9_0402_1%@
12
R66249.9_0402_1%@
12
R66349.9_0402_1%@
12
R66749.9_0402_1%@
12
R67049.9_0402_1%@
12
R67949.9_0402_1%@
12
R68349.9_0402_1% @
12
R68649.9_0402_1%@
12
R68849.9_0402_1%@
12
R69049.9_0402_1%@
12
R69249.9_0402_1%@
R70349.9_0402_1%@
R70649.9_0402_1%@
R70849.9_0402_1%@
R70949.9_0402_1%@
R98149.9_0402_1%@
R98249.9_0402_1%@
9/16
If LP Chip st uff, al l 49.9_0402
cou ld be remov ed .
Compal Electronics, Inc.
Clock generator
LA-3031P
1
12
12
12
12
12
12
12
12
12
12
0.5
1549Tuesd ay, Febru ary 28, 2006
A
CRT Connector
B
C
D
E
1.1A_6 VDC_FUSE
1/12
L79
12
L80
12
L81
12
C310
12P_0402_50V8J
@
+5VS
CRTVDD+3VS
F1
D18
21
21
CH491D _SC59
0.1U_0402_16 V4Z
RED_ R
GREEN_ R
BLUE_R
D_DD CCLK
C315
D_DDCD ATA
1
2
11
HSYNC9
VSYNC9
DDCC LK9
DDCDAT A9
22
HSY NC
VSYN C
DDC CLK
DDCDAT A
C319
0.22U_0603_10V7K
1
2
CRTVD D
U19
13
SYNC_IN1
15
SYNC_IN2
10
DDC_IN1
11
DDC_IN2
8
BYP
HSY NC
R510K_0402_5%
12
VSYN C
R610K_0402_5%
12
C3
12
0.22U_0603_10V7K
+3VS
C321
12
0.22U_0603_10V7K
+2.5VS
1
2
7
VCC_DDC
VCC_SYNC
VCC_VIDEO
VIDEO_1
VIDEO_2
VIDEO_3
SYNC_OUT1
SYNC_OUT2
DDC_OUT1
DDC_OUT2
GND
6
D_BLUE
3
D_GREE N
4
D_RE D
5
R9880_0402_5%
12
R9890_0402_5%
14
12
16
9
12
CM2009-00QR_QSOP16
D_DD CCLK
D_DDCD ATA
D_H SYNC
D_ VSYNC
D_DD CCLK 34
D_DDCD ATA 34
D_H SYNC 3 4
D_V SYNC 34
D_RE D9,34
D_GRE EN9, 34
D_BLUE9,3 4
D_RE D
D_GREE N
D_BLUE
1
C313
12P_0402_50V8J
2
@
D_H SYNC
D_ VSYNC
DDC CLK
DDCDAT A
D_DD CCLK
D_DDCD ATA
BK2125LL560-T 0805
BK2125LL560-T 0805
BK2125LL560-T 0805
12
12
12
12
1
2
1
C314
12P_0402_50V8J
2
@
R22.2K_0402_5%
R42.2K_0402_5%
R12.2K_0402_5%
R32.2K_0402_5%
CRTVD D+RCRT_VCC
W=40mils
JP2
6
11
18
1
7
12
2
8
13
3
9
14
4
10
15
19
5
SUYIN_ 070453FR015S2 08ZR
1/12
TV-Out Connector
33
Please close to JP1
D3
DAN217_SC5 9@
D5
DAN217_SC5 9@
1
2
3
2
D1
DAN217_SC5 9@
1
3
1
2
+3VS
3
10/5
1
2
12
12
12
C1039
18P_0402_50V8J@
R991
0_0603_5%
R992
0_0603_5%
R993
0_0603_5%
LUMA_C
CRMA_C
COMPS_C
JP1
1
2
3
4
5
6
7
SUYIN_330 07SR-07T1-C
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DVI_CL K-
13
DVI_CLK+
14
DVI_TX0-
16
DVI_TX0+
17
DVI_TX1-
19
DVI_TX1+
20
DVI_TX2-
22
DVI_TX2+
23
DVI_DETECT
29
DVI_ DDC_CLK
11
DVI_DD C_DAT
10
9
8
SDVO_SDAT
5
SDVO_SCLK
4
Issued Date
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
R78 9 need be rem ove d w hen ICH7M ES2 sam ples used ,
but nee d b e s tuffed wh en I CH7M ES1 sam ples used .
8.2K_0402_5%
D44
21
CH751H-40 _SC76
12
R794 0_ 0402_5%@
J7
21
PAD-SH ORT 2x2m
DPRSLP VR
11/14
USB_OC#5 _R
1
2
11/14
R545
12
C96
1K_0402_5%
1000P_0402_50V7K
USB_OC#3
USB_OC#0
USB_OC#1
USB_OC#7
7/21
USB_OC#4
USB_OC#2
USB_OC#6
10K_1206_8P4R_5%
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2006/02/272007/02/27
Compal Secret Data
Deciphered Date
Title
Size Docume nt NumberRe v
D
Date :Sheetof
Compal Electronics, Inc.
TI PCI6612 CB/NewCard/SmartCard
LA-3031P
2349Tuesd ay, Febru ary 28, 2006
E
0.5
5
R10130_0402_5%@
7/11
R10304.7K_0402_5%
R10314.7K_0402_5%
V_3P3_LAN+3VALW
10K_0402_5%
S
V_3P3_LAN
2
1
R860
12
12
12
5753_GPIO1
ICH_SMBC LK_LAN
ICH_SMBDATA _LAN
5753_EECLK
5753_EEDAT
LAN_SI
LAN_SO
LAN_SCLK
LAN_CS#
V_3P3_LAN
12
R1043
LANLINK_STATUS#
LANLINK_STATUS#
LAN_ACT#
R1046
12
10K_0402_5%
XTALO
XTALI
C825
27P_0402_50V8J
12
R861
1K_0402_5%
1K_0402_5%
7/11
U53
4
CS#
3
RESET#
2
SCK
1
SI
AT45DB011B-SI_SO8
@
12
4.7K_0402_5%
R852
V_3P3_LAN
12
R862
R10140_0402_5%@
12
1K_0402_5%
WP#
VCC
GND
SO
ICH_SMBC LK4,13,14, 15,20,26
ICH_SMBDATA4, 13,14,15,20,26
DD
V_3P3_LAN
10/11
11/24
R1044
CC
10K_0402_5%
LANLINK_STATUS#_SB20
LANLINK_STATUS#25,34
R849
10K_0402_5%
12
12
10/04
V_3P3_LAN
10K_0402_5%
12
R1042
12
2
G
13
D
Q108 2N7002_SOT23
R1045
12
0_0402_5%@
LAN_ACT#25,34
11/24
12
R857200_0402_1%
Y5
12
BB
AA
4.7K_0402_5%@
25MHZ_16P_XSL025000FK1H
2
C824
27P_0402_50V8J
1
C827
12
0.1U_0402_16 V4Z
U44
1
A0
2
A1
3
NC
4
GND
AT24C64AN-1 0SU-2.7_SO8
R964
12
10/6
VCC
WP
SCL
SDA
12
R92
@
4.7K_0402_5%
LAN_CS#
8
7
6
5
LAN_SCLK
V_3P3_LANV_3P3_LAN
5
5753_GPIO1
5753_EECLK
5753_EEDAT
ICH_SMBC LK_LAN
ICH_SMBDATA _LAN
U6A
J10
GPIO0_TST_CLKOUT
J12
GPIO1
D9
SMB_CLK
D8
SMB_DATA
H10
EECLK
J11
EEDATA
F11
SI
E10
SO
D10
SCLK
D11
CS#
5/20
H2
PWR_IND#
J2
ATTN_IND#
B3
ATTN_BTTN#
B10
LINKLED#
C10
SPD100LED#
B11
SPD1000LED#
C9
TRAFFICLED#
N10
XTALO
M10
XTALI
BCM5753KFBG C1_FPBGA196~D
5
6
7
LAN_SILAN_SO
8
4
BCM5753
Misc
Hot Plug
Support
LED
Clock
Lay out No tice : No h igh
sp eed sign al sh ou ld b e
rou ted near RD AC o r on
adj acent layer to RDAC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PLT_RST#7,17,18, 20,22,26,30,31,3 2
V_1P2_LAN
V_2P5_LAN
V_3P3_LAN
PCIE_TXN1 20
PCIE_TXP1 20
5/20
11/15
V_3P3_LAN +3VS
R1021
2
C1036
Issued Date
3
R1006
0_0402_5%
@
PLT_RST#_LAN
NIC_ PD25
PCIE_RXN1 20
PCIE_RXP1 20
CLK_PCIE_LOM# 15
CLK_PCIE_LOM 15
12
R855
4.7K_0402_5%
R1022
0_0402_5%
12
12
5
P
O4I
R10250_04 02_5%
1
NC
G
SN74LVC1G17DBVR_SOT 23-5
3
U54
3
SI2301BDS_SOT23
S
Q100
12
NIC _PD
11/22
9/27
D
13
ADP_PRES32,3 9,40
10/04
G
11/17
2
0.1U_0402_16 V4Z@
SLP_S3#20,26,27, 28,32,34,35,39,4 1,42
10K_0402_5%
R1017
0_0402_5%
@
1
C1044
2
220K_0402_5%
0_0402_5%@
Q81
10/11
R853
LAN_WAKE#
12
NIC _PD
11/15
R1007
R850
2
G
V_3P3_LAN
12
V_3P3_LAN
2
G
LOM_LOW_PWR20
12
21
12
13
D
S
13
D
2N7002_SOT23
S
13
D
2
G
S
11/22
13
D
Q103
12
NIC_ PD_N
13
D
Q104
G
S
12
R1020
10K_0402_5%
@
NIC_ PD#
13
D
Q105
@
S
11/22
@
RB751V_SOD323
D64
9/27
Q80
LP_EN#
2
G
2N7002_SOT23
Q83
2N7002_SOT23
NIC _PD
2
G
S
BSS84_SOT23
@
R10150_0402_5%
12
100K_0402_5%@
BSS84_SOT23@
2
@
12
12
0_0402_5%@
2N7002_SOT23
11/22
12
2006/02/272007/02/27
CLKREQA# 15
CKT No tice : CABLE IN , CABLE_DET ECT=0
CABLE OUT, C ABLE_DETECT=1
CABLE_DETECT20, 25
Compal Secret Data
Deciphered Date
2
+3VALW
12
R845
4.7K_0402_5%
R848
4.7U_0805_ 10V4Z
R1016
0_0402_5%
R1018
R1019
LOM_LOW_PWR
SN74LVC1G17DBVR_SOT23-5@
2
J8
PAD-NO SHORT 2x2m
S
Q79
SI2301BDS_SOT23
12
47K_0402_5%
L
REGSUP12
2
2
C813
1
1
11/18
V_3P3_LAN
+3VS
10/7
U43
1
10/7
CABLE_DETECT
C829
0.1U_0402_16 V4Z
1
21
D
13
G
2
Mus t hav in g m axi miz ed
copper unde r pi n 2 & 4 of Q82
BCP69_SOT223
Q82
3
C814
0.1U_0402_16 V4Z
VAUX_1.2_CTL
LOM_PCIE_WAKE# 20
Lay out No tice : Plac e as close
ch ip a s po ssi ble.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2006/02/272007/02/27
Compal Secret Data
Deciphered Date
D
Title
Size Docume nt NumberRe v
Date :Sheetof
Compal Electronics, Inc.
Mini-Card/ACCELEROMETER
LA-3031P
2649Tuesd ay, Febru ary 28, 2006
E
0.5
A
VDDA _CODEC
11
PCM_SPK22
SB_SPKR20
22
33
12
R329
10K_0402_5%
13
D
Q35
2
2N7002_SOT23
G
S
VDDA _CODEC
12
R350
10K_0402_5%
13
D
Q37
2
G
2N7002_SOT23
S
DLINE _IN_L34R_HP28
DLIN E_IN_R34
VDDA_ CODEC
7/15
SENSE_A
44
SENSE_B
A
R980
0_0402_5%@
12
B
C390
12
0.1U_0402_16 V4Z
C396
12
0.1U_0402_16 V4Z
R969
2.67K_0402_1%
12
2
C917
1U_0402_6. 3V4Z@
1
12
150K_0402_1%
12
150K_0402_1%
R3704.7K_0402_5%
R3754.7K_0402_5%
12
R3694.7K_0402_5%
R3744.7K_0402_5%
12
39.2K_0402_1%
12
R970
20K_0402_1%
12
R972
10K_0402_1%
12
R973
B
R341
R359
INT_MIC28
12
12
SENSE_A_C
2N7002_SOT23
7/15
MIC128
MIC228
VDDA _CODEC
SENSE_A_A 2 8
SENSE_A_B 2 8
D
Q95
S
7/15
DLINE_ IN_R_L
DLIN E_IN_R_R
AC97_RST# _CODEC19
AC97 _SYNC_COD EC19
AC97_SDO UT_CODEC19
13
2
G
C
12
R330
10K_0402_5%
0.1U_0402_16 V4Z
VDDA_ CODEC
R985
12
100K_0402_5%
C
0.1U_0402_16 V4Z
2
C377
.01U_0402_16V7K
1
VDDA_ CODEC
1
C862
C861
2
0.1U_0402_16 V4Z
C922
12
1U_0603_10V4Z
C923
12
1U_0603_10V4Z
C869
12
1U_0603_10V4Z
C870
12
1U_0603_10V4Z
C924
12
1U_0603_10V4Z
C925
12
1U_0603_10V4Z
12
R966 2.2K_0402_5%
R9940_0402_5%@
EAPD28,32
7/15
R974
@
0_0402_5%
12
LINE_I N_SENSE
1
C918
0.1U_0402_16 V4Z
2
C391
MONO_I N_HD
12
0.1U_0402_ 16V4Z
1
C863
2
1
1
C864
2
2
10U_0805_10V4Z
T24PAD
T25PAD
DLIN E_IN_RC_L
DLIN E_IN_RC _R
T28PAD
T29PAD
T30PAD
MIC1_C
MIC2_C
SENSE_A
SENSE_B
12
0.1U_0402_16 V4Z
C865
8/9
12
L78CHB1 608B121_0603
7/28
LINE_I N_SENSE 34
T37PAD
D
+5VAMP
1
+
C548
22U_B_10V
2
E
2
C552
1U_0603_10V4Z
1
SLP_S3#20,24,26,2 8,32,34,35,39,41 ,42
2
C551
100P_0402_50V8J
1
R258
12
0_1206_5%
7/11
F
U18
1
IN
OUT
3
EN
ADJ
2
GND
MIC5205YM5_SOT23-5
.01U_0402_16V7K
7/19
+3VS
0.1U_0402_16 V4Z
2
1
38
U14
AVDD125AVDD2
14
AUX_L
15
AUX_R
16
MIC3
17
MIC4
23
LINE_IN_L
24
LINE_IN_R
18
CD_L
20
CD_R
19
CD_GND
21
MIC1
22
MIC2
13
SENSEA
34
SENSEB
11
RESET#
10
SYNC
5
SDATA_OUT
47
EAPD
48
SPDIFO
4
DVSS1
7
DVSS2
AD1981HDJST Z-REEL_LQFP48
LINE_OUT_L
LINE_OUT_R
MONO_OUT
HP_LOUT_L
HP_LOUT_R
MIC_BIAS_B
MIC_BIAS_C
MIC_BIAS_F
MIC_BIAS_D
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
R908 shou ld b e placed less
than 100 mils from U45 & U46.
L
R908
12
SPI_SO
SPI_SO 20
12
R907
12
3.3K_0402_5%SPI@
3.3K_0402_5%SPI@
U21
13
FWH0
14
FWH1
15
FWH2
17
FWH3
23
FWH4
7
WP#
8
TBL#
2
RST#
24
INIT#
31
CLK
6
FGPI0
5
FGPI1
4
FGPI2
3
FGPI3
30
FGPI4
1
NC
22
NC
26
NC
27
NC
FWH@1M8 _PLCC32
SPI_WP#
SPI_HOL D#
GND
GND
VDD
VDD
RES
RES
RES
RES
25
32
16
28
21
20
19
18
12
ID0
11
ID1
10
ID2
9
ID3
FWH _IC
29
IC
KSI_D_1117,3 2,33KSO15 32,33
KSI_D_1232,33
ON/O FF#33,34
KSI_D_11KSO15
KSI_D_12KSO15
ON/OFF & SLEEP Button
ON/O FF#
STB_LED#26,32,34
TPM1.2
U47
LAD0
LAD1
LAD2
LAD3
LCLK
LFRAME#
LRESET#
SERIRQ
CLKRUN#
7
PP
TPM_XTALI
TPM@
10M_0402_5%
TPM_XTALO
+3VS+3VALW
19
10
VDD24VDD
VDD
TPM
SLB 9635 TT 1.2
GND4GND11GND18GND
12
R914
1
2
5
VSB
LPCPD#
TESTB1/BADD
TEST1
XTALO
XTALI
GPIO2
GPIO
SLB9635TT_TSSOP28TPM@
25
C889
12
1
IN
4
OUT
Y6
C891
12
C888
NC
NC
NC
32.768KHZ_ 12.5P_1TJS125BJ2A251TPM@
0.1U_0402_16 V4ZTPM@
LPC_PD R#
28
9
R910
8
TPM_XTALO
14
TPM_XTALI
13
GPIO2
2
GPIO
6
1
3
12
18P_0402_50V8JTPM@
2
NC
3
NC
18P_0402_50V8JTPM@
4
0.1U_0402_16 V4ZTPM@
1
1
C885
BB
LPC_AD [0..3]19,26,30 ,32
+3VS
@
4.7K_0402_5%
12
R912
12
R913
0_0402_5%TPM@
AA
2
0.1U_0402_16 V4ZTPM@
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
5
+3VALW
1
2
CLK_PCI_TC G
LPC_FRAME#
PLT_RST#
SIRQ
PM_CLKRU N#
C890
CLK_PCI_TC G15
LPC_FRAME#19,2 6,30,32
SIRQ20, 22,30,32
PM_CLKRUN #20,22,30,32
1
C886
C887
TPM@
0.1U_0402_16 V4Z
2
2
26
23
20
17
21
22
16
27
15
0.1U_0402_16 V4ZTPM@
LPC_PD R#
Base I/O Add ress
0 = 02Eh
* 1 = 04Eh
12
0_0402_5%TPM@
T48
PAD
T49
PAD
TPM_XTALI
12
LPC_PD# 20,32
R9590_0 402_5%
+3VS
12
R909
4.7K_0402_5%TPM@
12
R911
4.7K_0402_5%@
R1010
12
0_0402_5%@
CLK_TPM 32
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PWR_G D 32,3 6,43,44
+5VS
12
R116
470_0402_5%
13
D
Q16
2
2N7002_SOT23
G
S
2006/02/272007/02/27
Compal Secret Data
Deciphered Date
D
Title
Size Docume nt NumberRe v
Date :Sheeto f
Compal Electronics, Inc.
DC/DC Circuits
LA-3031P
3549Tuesday, F ebruary 2 8, 2006
E
0.5
+VCCP
+3VS+3VS
+3VL+3VL
R996
1K_0402_5%
12
2
B
R82
330_0402_5%
C
Q99
MMBT3904_SOT23
E
31
R931
1K_0402_5%
12
560K_0402_5%
+1.5VS
330_0402_5%
12
R281
330_0402_5%
2
B
12
R37
R932
2
B
E
12
C
Q10
MMBT3904_SOT23
E
31
+5VS
330_0402_5%
12
C
Q94
MMBT3904_SOT23
31
1
12
R43
180K_0402_5%
1
C47
0.1U_0402_16 V4Z
2
+2.5VS+2.5VS
R23
12
C
Q93
2
B
E
31
14
U5A
P
O2I
G
SN74LVC14APWLE_TSSOP14
7
+3VL
14
5
7
11
MMBT3904_SOT23
R38
12
47K_0402_5%
1
2
U5C
P
O6I
G
SN74LVC14APWLE_TSSOP14
+3VL
SN74LVC14APWLE_TSSOP14
14
U5E
P
G
7
C25
0.1U_0402_16 V4Z
O10I
1
2
14
U5B
P
3
O4I
G
SN74LVC14APWLE_TSSOP14
7
C48
0.1U_0402_ 16V4Z
13
D
2
G
S
13
D
2
G
S
+3VS
12
13
D
2
G
S
Q9
2N7002_SOT23
Q2
2N7002_SOT23
R1048
10K_0402_5%
Q110
2N7002_SOT23
2/20
VCCP_O N 41
D8
21
RB751V_SOD323
J2
PAD-SH ORT 2x2m
+3VS
21
12
R47
10K_0402_5%
PWR_G D 32,3 5,43,44
+3VL
12
R24
560K_0402_5%
1
C26
0.1U_0402_16 V4Z
2
EMI Clip PAD
EP1
1
PAD_177X80@
+3VL
12
R7
+3VL
14
U5D
P
9
O8I
G
SN74LVC14APWLE_TSSOP14
7
FM6
FM3
FM1
CF1
FM2
1
CF2
1
1
1
1
CF3
CF5
1
1
1
10K_0402_5%
1
1
VCC1_P WRGD 32
CF6
1
CF4
1
CF8
CF12
CF7
1
CF11
1
13
D
Q3
2
2N7002_SOT23
G
S
FM5
FM4
1
1
CF9
1
CF10
1
9/29
EP2
1
PAD_177X80@
H35
HOLEA
1
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2006/02/272007/02/27
Compal Secret Data
Deciphered Date
H29
HOLEA
1
H14
HOLEA
1
H33
HOLEA
1
H2
HOLEA
1
H16
HOLEA
1
H12
HOLEA
1
H10
H3
HOLEA
1
H24
HOLEA
1
H11
HOLEA
1
H9
HOLEA
HOLEA
1
1
H18
H6
HOLEA
HOLEA
1
1
H34
H1
HOLEA
HOLEA
1
1
Title
Size Docume nt NumberRe v
Date :Sheeto f
H5
HOLEA
1
H21
HOLEA
1
H13
HOLEA
1
H17
HOLEA
1
H22
HOLEA
1
H26
HOLEA
1
H4
HOLEA
1
H19
HOLEA
1
H27
HOLEA
1
Compal Electronics, Inc.
POK CKT
LA-3031P
H25
HOLEA
1
H15
HOLEA
1
H30
HOLEA
1
3649Tuesday, F ebruary 2 8, 2006
H28
HOLEA
H23
HOLEA
H31
HOLEA
1
1
1
H32
HOLEA
1
0.5
5
4
3
2
1
AC
VIN
Adapter
DD
in
MAINP WON
+3VALW
APL5508
LDO
(2.5V)
ADP_EN#
REVBLK
SWITCH
+2.5VALW 400mA
ON 5
B+B+
MAX8734A
DC/DC
CHGCTRL
MAX1908
BATT
BATSELB_A#
CC
ADP_PRES
Charger
(3V/5V)
SHDN#
+3VALWP 3A
+5VALWP 4.5A
MAX8743
DC/DC
(1.8V/1.05V)
B+
+5VAL W
Vcc
+1.5VS
APL5331
LDO
(0.9V)
+1.8VSP 6A
DDR II
SLP_S3
EN
+0.9VS 1.5A
+5 VS
VR _O N
VC CSH DN #
MAX8770
DC/DC
(CPU_CORE)
CPU_CORE
(YONAH PEAK 36A)
SLP_S5#/PWR_GD
ON1/ON2
+1.05VSP 6A
+5 VS
(MEROM PEAK 44A)
Vcc
BB
VIN
CHGCTRL/
BATSELB_A#
VS
BATT
BATT_B
VS 1
AA
REVBLK
MAX1538
Battery
Selector
LM393
ONE SHOT
5
B+
Battery A
8 Cell
Battery
Connector
VS1/V S
VMB_AVMB_B
BATT_VID
CHG/DIS
A
SWITCH
BATT_A
TRAVE L
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
BATT_B
Compal Secret Data
2006/02/272007/02/27
4
Battery B
8 Cell
Battery
Connector
B
Deciphered Date
B+
SLP_S3#
3
MAX8578
DC/DC
(1.5V)
EN
+1.5VALW 3A
Title
Size Document NumberR e v
Compal Electronics, Inc.
POWER BLOCK DIAGRAM
LA-3031P
Dat e:Sheeto f
2
3749Tuesday, F ebruary 28, 2006
1
0.5
A
B
C
D
ADP_SI GNAL 34 ,44
PCN 1
1
Low_PWR
9
GND_4
8
GND_3
11
7
GND_2
6
GND_1
MH1
MH2
DC+_1
DC+_2
DC-_1
DC-_2
2
3
4
5
PC1
100P_0402_50V8J
FBMA-L18-453215-900LMA90T_1812
12
12
PL1
12
PC2
1000P_0402_50V7K
12
PC3
100P_0402_50V8 J
12
PC4
1000P_0402_50V7K
12
PR270
15K_0402_5%
VIN
FOX_JPD113 E-LB103-7F
PCN 2
1
BATT+
SMD
7
8
22
SMC
GND
GND
GND
SUYIN_ 200275MR006G1 13ZL
B/I
TS
2
3
4
5
6
100_0402_5%
EC_SMD_A
EC_SMC_A
AB/I_ A
PR4
12
PR5
100_0402_5%
PR1
TS_A
PR3
1K_0402_5%
12
12
1K_0402_5%
12
PR2 210K_0402_1%
+3VL
12
VMB_A
12
EC_SMD_A1
EC_SMC_A1
PL2
FBMA-L18-453215-900LMA90T_1812
12
12
PC5
1000P_0402_50V7K
PC6
0.01U_040 2_25V7K
THM_MAIN# 32
AB1A_DATA 32
AB1A_CLK 32
BATT_A 39
VMB_A
VMB_B
PD3
12
RLS4148_S OD80
PD6
12
RLS4148_S OD80
VS1
PD45
RLS4148_S OD80
12
VS
33
PCN 3
1
BATT+
8
GND
7
GND
SUYIN_ 20163S-06G1-K
SMD
SMC
GND
TS
B/I
EC_SMD_B
2
EC_SMC_B
3
AB/I_ B
4
TS_B
5
6
PR15
100_0402_5%
2
+3VL
3
1
PD43
@SM24_SOT23
PR10
12
1K_0402_5%
12
PR12
1K_0402_5%
12
12
12
PR16
@SM05_SOT23
100_0402_5%
3
2
PR11 210K_0402_1%
PD42
1
EC_SMD_B1
EC_SMC_B1
44
A
VMB_B
PL3
FBMA-L18-453215-900LMA90T_1812
12
12
PC9
1000P_0402_50V7K
THM_MBAY# 32
AB1B_DATA 32
AB1B_CLK 32
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
CHG_B+
PC17
10U_1206_25V6M
8
7
6
5
Issued Date
PL5
12
MSS1038-153NLC
C
PQ2
SI4835B DY_SO8
1
2
36
ADP_EN#44
PR27
12
13
D
S
RHU002N06_SOT 323
8
7
5
4
0.015_2512_1%
12
3K_0402_5%
PQ65
RHU002N06_SOT 323
+3VL
CHR G
12
2
G
13
D
PQ79
S
2006/02/272007/02/27
DCIN
PD47
12
RLS4148_SOD80
PR455
12
@0_0402_5%
2
+3VL
G
SLP_S3#20,24,26, 27,28,32,34,35,4 1,42
BATT
PR312
12
12
12
PC25
PC23
10U_1206_25V6M
4.7U_1206_25V6K
PQ31
FDS4925_SO8
PR300
DISB
12
12
PR302
2K_0402_5%
13
D
2
G
S
PR321
100K_0402_5%
PQ78
RHU002N06_SOT 323
ADP_PRES
2
G
Compal Secret Data
Deciphered Date
C
8
7
5
PR157
150K_0402_5%
PD46
@
12
@RLS4148_SOD80
13
D
S
PQ82
@RHU002N06_SOT323
47P_0402_50V8J
36
241
PQ5
40.2K_0402_1%
PR459
BATT_B38BATT_A38
578
604K_0402_1%
3
1
2
4
S1
S2
G2
G1
D2
D1
D2
D1
8
5
7
6
8
5
7
6
PQ32
D2
D1
D2
D1
G2
S1
S2
G1
2
3
1
4
PQ62
RHU002N06_SOT 323
PQ3
SI4835BD Y_SO8
4
12
200K_0402_5%
12
PC172
0.1U_0603_16V7K
PQ76
DTA144EUA_SC70
13
47K
47K
2
PC168
12
SI4835BD Y_SO8
12
PR269
0_0402_5%
FDS4925_SO8
PR299
3K_0402_5%
12
PR301
2K_0402_5%
13
D
2
G
S
VIN
1
2
36
PR156
12
12
PR308
10_1206_5%
PR320
47K_0402_5%
12
MAX1538ETI+T_QFN28
ADPPW R
DCIN
12
13
D
PQ48
NDS0610_SOT23
D
S
13
12
PR253
887K_0603_1%
G
2
ADPPW R
DCIN
42.2K_0603_0.1%
12
1U_0805_50V4Z
12
PC13
PU2
11
ADPIN
12
ADPPWR
13
REVBLK
16
EXTLD
14
ADPBLK
18
DISBAT
17
CHGIN
19
CHGA
20
CHGB
23
DISB
24
DISA
22
BATB
25
BATA
29
GND
PC33
12
1000P_0603_50V7K
OUT0
BATSELB_A#
CHR G
2
PQ67
DTC115EUA_ SC70
Travel
ADP_PRES
Title
Size Docume nt NumberRe v
Date :Sheeto f
ACDET
PR17
GND
27
12
PC34
2
1
10
AIRDET
MINVA
1
PR38
200K_0402_1%
12
PR41
12
1000P_0603_50V7K
+3VL
5
PU19
74LVC1G86_SOT353
P
A
Y
B
G
3
O4I
1
NC
2
1
1.62K_0603_0.1%
180K_0402_1%
+3VL
+3VL
I0
I1
PR18
12
9
ACDET
CHRG
BATSEL
RELRN
OUT2
OUT1
OUT0
BATSUP
NC2
NC1
VDD
MINVB
2
100K_0402_1%
12
4
PU18
SN74LVC1G17DBVR_SOT 23-5
5
P
2
12
G
3
5
PU20
P
4
O
G
TC7SH32FU_ SSOP5
3
Compal Electronics, Inc.
Charger
LA-3031P
D
PR19
5.49K_0603_0.1%
12
5
3
4
8
7
6
26
21
15
28
PR256
12
PR257
180K_0402_1%
+3VL
2
G
0.022U_0603_25V7K
12
PD41
PR304
RLS4148_SOD80
CHR G
12
PR279
1M_0402_1%
PR22
12
0_0402_5%
OUT1
VS
12
PC26
0.1U_0603_50 V4Z
+3VL
1
PC36
2
1U_0603_10V4Z
12
PR306
200K_0402_5%
13
D
PQ69
RHU002N06_SOT 323
S
PC166
12
10K_0402_5%
470K_0402_1%
12
PC16
0.1U_0402_16V7K
OUT0
12
PR30
RHU002N06_SOT 323
PR311
3949Tuesd ay, Febru ary 28, 2006
PR310
10K_0402_5%
BATSELB_A#32
OUT2
PR309
0_0402_5%
ADP_PRES24,3 2,40
PR26
12
100K_0402_5%
100K_0402_5%
PR313
@100K_0402_5%
ADP_PRES
2
G
13
D
S
PQ68
BATCON 32
12
CHGCT RL
1SS355_SOD323
PD39
12
12
12
12
0.5
A
B
C
D
E
+3.3V/+5V
B+
11
22
33
12
PL6
FBM-L11-322513-151LMAT_1210
B++
12
PC218
PC48
33P_0603_50V8J
12
12
PC50
2200P_0402_50V7K
10U_1206_25V6M
MSS1038-103NLC
PL18
12
1
2
3
4
D2
D2
D1/S2/K
G1
D1/S2/K
D1/S2/K
S1/A
AO4916_SO8
PQ9
G2
+5VALWP
B++
PC63
1
PR71
+
12
2
150U_D2_6.3VM
@10.2K_0402_1%
PR76
0_0402_5%
12
PR74
47K_0402_5%
8
7
6
5
12
12
PC66
PC44
0.1U_0603_ 50V4Z
12
5HG
12
DL5
VL
0.1U_0603_25V7K
PR57
0_0402_5%
LX5
2VREF_1999
PR77
499K_0603_1%
DH5
ADP_PRES24,3 2,39
MAINPW ON
12
12
PC67
0.1U_0603_16V7K
RHU002N06_SOT 323
PR56
0_0402_5%
12
PR332
0_0402_5%
12
PQ70
BST5A
@0_0402_5%
12
12
10K_0402_5%
PR331
PR67
2VREF_1999
PR314
13
100K_0402_5%
D
2
G
S
D
S
3
PD17
1
CHP202U _SC70
VL
PC51
4.7U_0805_10 V4Z
PU7
14
BST5
16
DH5
15
LX5
19
DL5
21
OUT5
9
FB5
1
N.C.
6
SHDN#
4
ON5
3
ON3
12
SKIP#
8
REF
12
PC164
0.22U_0603_10V7K
+3VL
12
13
ADP_PRES
2
G
PQ77
RHU002N06_SOT 323
2
1
2
B++
PC52
20
18
V+
LD05
GND
23
PC165
4.7U_0805_10 V4Z
13
D
S
VL
PR287
12
47_0402_5%
12
0.1U_0603_50 V4Z
12
13
17
VCC
ILIM3
TON
ILIM5
BST3
DH3
DL3
LX3
OUT3
FB3
PGOOD
PRO#
LDO3
MAX8734AEEI+_QSOP28
10
25
+3VLP
1
PR293
0_0402_5%
2
12
2
G
PQ71
RHU002N06_SOT 323
12
2VREF_1999
PC163
1U_0805_16V7K
5
11
28
26
24
27
22
7
2
PC161
0.1U_0603_16V7K
BST3BBST5B
PR289
12
12
220K_0402_1%
PR291
PR292
12
12
499K_0402_1%
KBC_PWR_ON 32
PC43
0.1U_0603_50 V4Z
12
B++
PR54
0_0402_5%
12
BST3A
PR290
220K_0402_1%
499K_0402_1%
DH3
12
PC45
0_0402_5%
2200P_0402_50V7K
PR53
12
PC46
4.7U_1206_25V6K
12
PQ8
1
D2
2
D2
3
G1
4
S1/A
AO4916_SO8
3HG
LX3
DL3
D1/S2/K
D1/S2/K
D1/S2/K
8
G2
7
6
5
12
PL7
MSS1038-103NLC
+3VALWP
PC59
1
PR68
12
@3.57K_0402_1%
PR75
12
0_0402_5%
+
2
150U_D2_6.3VM
44
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2006/02/272007/02/27
Compal Secret Data
Deciphered Date
Title
Size Docume nt NumberRe v
D
Date :Sheeto f
Compal Electronics, Inc.
3.3V / 5V
LA-3031P
4049Tuesday, F ebruary 2 8, 2006
E
0.5
A
11
12
12
PC69
PC68
2200P_0402_50V7K
PQ12
AO4422_SO8
8.2K_0603_0.1%
PL9
MSS1038-522NLC
12
PQ14
AO4702_SO8
22
33
+1.8VP
1
+
2
12
PC80
220U_D2_4VM
PC81
4.7U_0805_ 6.3V6K
12
PR456
12
PR457
10K_0603_0.1%
10U_1206_25V6M
5
D8D7D6D
S1S2S3G
4
5
D8D7D6D
S1S2S3G
4
+1.5VS
PU9
10U_0805_10V4Z
RHU002N06_SOT 323
SLP_S335
44
12
PR427
0_0402_5%
PC175
@0.1U_0402_16V7K
PQ85
13
D
2
G
S
12
12
12
PC87
+1.8V
12
PC88
PR425
1K_0402_1%
10U_0805_10V4Z
12
PR426
1K_0402_1%
12
PC176
0.1U_0402_16V7K
VIN1VCNTL
2
GND
3
VREF
4
VOUT
G2992F1U_SO8
12
PC93
22U_1206_6.3V6M
+0.9VSP
B
0.1U_0603_50 V4Z
PC78
12
SLP_S5#20, 35
SLP_S4#20
6
5
NC
7
NC
8
NC
9
TP
1
PD22
3
2
CHP202U _SC70
12
BST1.8
PR79
0_0402_5%
12
PR84
0_0402_5%
12
1U_0805_50V4Z
DH1. 8
LX1.8
DL1.8
12
PR87
0_0402_5%
12
PR441
@0_0402_5%
MAX1845_VCC
+5VALW
PC178
1U_0603_10V6K
PR78
0_0402_5%
PC75
12
0.1U_0603_50 V4Z
PC76
12
PU8
25
BST1
26
DH1
27
LX1
24
DL1
28
CS1
1
OUT1
2
FB1
11
ON1
@0_0402_5%
B++++
12
1U_0805_16V7K
4
V+
GND
OVP
8
23
PR160
PR161
0_0402_5%
PC77
MAX1845_VCC
12
22
VCC
MAX8743EEI+T_QSOP28~N
SKIP
6
12
12
PR80
20_0603_5%
12
9
VDD
UVP
BST2
DH2
LX2
DL2
CS2
OUT2
FB2
ON2
PGOOD
TON
ILIM2
ILIM1
REF
PR201
10
0_0402_5%
PR90
0_0402_5%
12
PC86
0.22U_0603_10V7K
21
19
18
17
20
16
15
14
12
7
5
13
3
+5VALW
12
12
12
PC71
4.7U_0805_10V6K
BSTVCCP
PR81
0_0402_5%
12
BST2VCCP
DHV CCP
12
12
0_0402_5%
PR91
100K_0402_1%
C
12
PC79
0.1U_0603_50 V4Z
12
PR82
PR86
0_0402_5%@
PR202
100K_0402_1%
5
4
LXVCCP
DLVC CP
12
5
4
SLP_S3# 20,2 4,26,27 ,28,32,34,35, 39,42
VCCP_ON 36
2/20
D8D7D6D
PQ83
AO4422_SO8
S1S2S3G
D8D7D6D
AO4702_SO8
S1S2S3G
FBM-L11-322513-151LMAT_1210
12
PC219
@220P_0402_50V7K
PQ84
12
12
PC72
33P_0402_50V8J
PL10
2.2UH_IHLP- 2525CZ-01_8A_+-2 0%_2525CZ
12
PL8
12
12
PC216
2200P_0402_50V7K
12
12
D
PC73
10U_1206_25V6M
PR85
5.1K_0402_1%
PR88
100K_0402_1%
B+
+1.05V_VCCP
1
12
+
PC82
PC83
2
4.7U_0805_ 6.3V6K
330U_D2E_2.5VM
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2006/02/272007/02/27
Compal Secret Data
Deciphered Date
C
Title
Size Docume nt NumberRe v
Date :Sheeto f
Compal Electronics, Inc.
DDRII/+1.05VSP/+1.8VSP
LA-3031P
D
4149Tuesd ay, Febru ary 28, 2006
0.5
A
SLP_S3# 20,24,26,27,28,32,34,35,39,41
11
PR428
@0_0402_5%
12
4.99K_0402_1%
9
DH
EN
LX
DL
BST
12
PR429
12
0_0402_5%
12
PC173
@0.1U_0603_16V7K
8
7
5
6
12
1.5V_BST
PR432
0_0402_5%
12
1.5VLX
PC180
0.1U_0402_16V7K
1.5V_ DH
8
7
6
5
G2
D1/S2/K
D1/S2/K
D1/S2/K
AO4916_SO8
S1/A
PQ86
D2
D2
G1
1
2
3
4
1.5VDL
12
12
PC174
PR430
0.01U_0402_25V7K
10
PU15
1
FB
OCSET
2
+5VS
12
PR431
12
0_0402_5%
PC177
3300P_0402_50V7K
22
SS
3
1U_0603_10V6K
VCC
PC179
12
MAX8578
GND
4
PD48
1SS355_SOD323
B
B+
12
PL17
FBM-L11-322513-151LMAT_1210
12
12
PC139
4.7U_1206_25V6K
3.3UH_MPL73 -3R3_6A_20%
12
PL16
12
PR433
15K_0402_1%
PC181
12
0.033U_0603_25V7K
PR333
12
787_0603_1%
12
PR334
499_0402_1%
PC138
33P_0402_50V8J
12
PC217
2200P_0402_50V7K
12
PR434
30_0402_5%
12
PC182
0.1U_0402_16V7K
C
12
PC220
@220P_0402_50V7K
D
+1.5VSP
1
+
PC148
2
220U_B2_2.5VM
+3VALWP
12
PC183
APL5508_SOT89
PU21
2
IN
GND
1
1U_0603_10V6K
(400mA,40mil s ,Via NO.= 1)
+2.5VALWP
3
OUT
12
PC184
4.7U_0805_ 6.3V6K
33
PJP2
+1.5VSP
+1.8VP
+1.05V_VCCP
+2.5VALWP
44
+3VLP
+0.9VSP
12
PAD-OP EN 3x3m
PJP4
PAD-OP EN 4x4m
12
PJP11
PAD-OP EN 4x4m
12
PJP6
PAD-OP EN 4x4m
12
PJP7
12
PAD-OP EN 3x3m
PJP9
21
PAD-OP EN 2x2m
PJP10
12
PAD-OP EN 3x3m
+1.5VS
(3A,120mils ,Via NO.=6)
(6A,240mils ,Via NO.= 12)
+1.8V
(6A,240mils ,Via NO.= 12)
+VCCP
(400mA,40mil s ,Via NO.= 1)
+2.5VALW
(100mA,20mil s ,Via NO.= 1)
+3VL
(2A,80mils ,Via NO.= 4)
+0.9VS
A
+5VALWP
(4.5A,180mil s ,Via NO.= 9)
+3VALWP
(3A,120mils ,Via NO.= 6)
PJP3
12
PAD-OP EN 4x4m
PJP5
12
PAD-OP EN 4x4m
+5VALW
+3VALW
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2006/02/272007/02/27
Compal Secret Data
Deciphered Date
C
Title
Size Docume nt NumberRe v
Date :Sheeto f
Compal Electronics, Inc.
2.5VALWP/1.5VSP
LA-3031P
D
4249Tuesd ay, Febru ary 28, 2006
0.5
5
DD
PR336
13K_0402_5%
NTC
@470KB_0402_5%_ERTJ0EV474J
PH3
12
CPU_V ID05
CPU_V ID15
CPU_V ID25
CPU_V ID35
CPU_V ID45
CPU_V ID55
CPU_V ID65
CC
VGATE7,15,20
CLK_ENABLE#15
PWR_G D32,3 5,36,44
BB
AA
PR351
0_0402_5%
12
0_0402_5%
PR352
12
12
PR353
0_0402_5%
DPRSLPV R7 ,20
H_DPRSTP#4,19
H_PROCHOT #4
H_PSI#5
+3VS
PR349
1.91K_0402_1%
12
12
PR3380_0402_5%
PR3390_0402_5%
PR3400_0402_5%
PR3410_0402_5%
PR3420_0402_5%
PR3430_0402_5%
PR3440_0402_5%
PR346499_0402_1%
PR3470_0402_5%
PR3480_0402_5%
PR354
@10K_0402_5%
POUT
12
12
12
12
12
12
12
12
12
12
PR350
2K_0402_1%
12
PR356 @0_0402_5%
12
12
PR35710K_0402_5%
PC187
0.1U_0402_16V7K
12
12
PR34571. 5K_0402_1%
12
PC188 0.22U_0603_16V7K
7/8
4
+5VS
12
PR335
10_0402_5%
PC201
PC185
1U_0603_16V6K
12
VCC
19
6
31
32
33
34
35
36
37
7
12
9
12
PC186470P_0402_50V8J
11
39
40
3
2
1
38
5
4
2.2U_0603_6.3V6K
PU22
Vcc
THRM
D0
D1
D2
D3
D4
D5
D6
TIME
CCV
REF
DPRSLPVR
DPRSTP
PSI
PWRGD
CLKEN
SHDN
VRHOT
POUT
MAX8770GTL+_TQFN40
VSSSENSE5
VDD
TON
BST1
DH1
DL1
PGND1
GND
CSP1
CSN1
DH2
BST2
DL2
PGND2
CSP2
CSN2
GNDS
LX1
FB
CCI
LX2
TP
41
100_0402_5%
12
25
8
30
29
28
26
27
18
17
16
12
10
21
20
22
24
23
14
15
13
PC189
PR363
VSSSENSE
BST1_CPU
DH1__C PU
LX1__CPU
DL1__C PU
CSP1__CP U
CSN1_C PU
FB_C PU
CCI _CPU
DH2_ CPU
BST2_CPU
LX2_CPU
DL2__C PU
CSP2_CP U
CSN2__ CPU
12
12
12
PR377
200K_0402_5%
12
PR376 0_0402_5%
1000P_0402_50V7K
12
PC200
0.01U_0402_25V7K
3
BSTM1_CPU
12
PC199
PR364
12
BSTM2_CPU
12
PC190
2
CPU_B+
12
12
PC203
PC202
PQ87
D8D7D6D
IRF7413 Z_SO8
S1S3G
S
2
D8D7D6D
PQ89
S1S3G
S
FDS6688S_SO8
2
PR371 0_0402_5%
12
12
PC195
D8D7D6D
PC192
S1S3G
S
2
D8D7D6D
S1S3G
S
2
PR358 0_0402_5%
12
10U_1206_25VAK
12
10U_1206_25VAK
5
0.22U_0603_16V7K
0_0402_5%
0.22U_0603_16V7K
PR450 0_0402_5%
12
PQ88
PR370@3K_0603_1%
PR369 3.65K_0402_1%
12
NTC
PR366
@3K_0603_1%
12
PR365
20K_0402_1%
PR451 0_0402_5%
PQ91
FDS6688S_SO8
5
FDS6688S_SO8
4
12
12
12
5
4
2
S
2
IRF7413 Z_SO8
D8D7D6D
S1S3G
S
D8D7D6D
S1S3G
DL1__C PU
12
PR367
@3K_0603_1%
PQ90
PQ92
DL2__C PU
4
5
4
470P_0402_50V8J
5
4
5
FDS6688S_SO8
4
PC204
10U_1206_25VAK
.36UH_MPC1040 LR36_ 24A_20%
PR375
3.48K_0402_1%
12
2.1K_0603_1%
12
PC198 0.22U_0603_16V7K
PC197@0.0 22U_0402_16V7K
12
12
PR368 100_0402_5%
PC196
4700P_0402_25V7K
12
12
PC193
PC194
10U_1206_25VAK
12
PL21
FBM-L11-322513-151LMAT_1210
12
12
2200P_0402_50V7K
12
PR374
12
2200P_0402_50V7K
PR361
2.1K_0603_1%
PL19
NTC
PH1
12
10KB_0603_5%_ERTJ1VR 103J
12
CPU_B+
PL20
.36UH_MPC1040 LR36_ 24A_20%
12
PR359
3.48K_0402_1%
12
12
PC191 0.22U_0603_16V7K
1
+
2
12
10KB_0603_5%_ERTJ1VR 103J
B+
PC205
68U_25V_M_R0.44
+VCC_ CORE
VCCSEN SE
NTC
PH2
1
+VCC_C ORE
VCCSENS E 5
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2006/02/272007/02/27
3
Compal Secret Data
Deciphered Date
Compal Electronics, Inc.
Title
Size Docum ent NumberR ev
2
Date :Sheeto f
+CPU_CORE
LA-3031P
4349Tues day, Februa ry 28, 2006
1
0.5
5
4
3
2
1
3
2
12
PC209
0.027U_06 03_16V7K
PC215
1U_0603_1 0V +-10% X7R
12
PR415470K_0402_5%
PR447
71.5K_0402_1%
PR420
21K_0402_1%
PR448
3.48K_0402_1%
+5VS
8
PU29A
P
+
-
G
LM393DR_SO8
4
OCP#4,20
12
PC211
0.1U_0603 _16V7K
PR398
12
100K_0402_5%
1
O
12
PR399
604K_0603_1%
12
12
PR449
21K_0402_1%
DD
PR443
10K_0402_5%
PR397
13
2
G
PR458
47K_0402_5%
12
PR396
133K_0402_1%
12
80.6K_0402_1%
PR395
12
0_0402_5%
D
PQ96
RHU002N 06_SOT323
S
12
12
+3VS
12
12
12
PR391
330K_0402_5%
+5VS
B
2
12
VIN
12
PR410
220K_0402_5%
12
PR435
1K_0402_5%
E
3
PQ101
C
MMBT3906_SOT23
1
PR411
10K_0402_5%
2
G
12
PR412
220K_0402_5%
12
PR390
3.9K_0402_5%
PD53
12
CH355PT_SO D323-2
12
12
PR446
3.9K_0402_5%
PC214 3900P_0402_50V7K
+3VALW
ADP_ ID32
12
PR413
47K_0402_5%
ADP_E N32ADP_PS132
13
D
PQ99
RHU002N0 6_SOT323
S
PR414
100K_0402_5%
12
12
PR436
10K_0402_5%
@
PC212 0.22U_0 603_16V7K
12
1
12
12
PR409
12
PR437
10K_0402_5%
47K_0402_5%
PD52
RLS4148_S OD80
ADP_EN # 39
1908_IN P
PR438
1908_RE F
ADP_SI GNAL
12
100K_0402_1%
PR440
12
10K_0402_1%
12
12
12
PR404
0_0402_5%
PR444
182K_0402_1%
PR402
1M_0402_5%
12
PR445
10K_0402_1%
13
D
2
G
PQ97
S
@RHU002N0 6_SOT323
PC213
VIN
12
12
PR405
22.6K_0402_1%
12
PR406
0_0402_5%
12
PR407
10K_0402_1%
CC
BB
AA
PU28
LMV321M7_SC70-5
12
PR439
11.5K_0402_1%
1000P_0402_50V7K
NDS0610_SOT23
2
3
G
-
4
O
1
+
P
5
+5VS
PQ98
D
S
13
VIN
G
2
5
6
3
2
1M_0402_5%
12
8
P
+
-
G
4
8
PU25A
P
+
O
-
G
LM393DR_SO8
4
PR408
PU25B
7
O
LM393DR_SO8
12
8
PU29B
5
P
+
7
O
6
-
G
LM393DR_SO8
4
PR392
12
0_0402_5%
PD49
@CH751 H-40_SOD323
12
PWR _GD 32 ,35,36,43
2
B
E
12
C
31
12
PR394
12
470K_0402_5%
PR225
0_0402_5%
PQ100
MMBT3904_SOT23
ACN39
ACOCP_ EN#34
PR416
10K_0402_5%
+5VS+3VS
12
PR417
1M_0402_5%
12
PR423
1M_0402_5%
12
PR442
10K_0402_5%
VIN
150K_0402_5%
1SS355_SOD323
PR453
1K_0402_5%
+5VS
8
PU26A
3
P
+
2
-
G
LM393DR_SO8
4
+5VS
8
PU26B
5
P
+
6
-
G
LM393DR_SO8
4
DTA144EUA_ SC70
PR454
PD55
12
1
O
7
O
47K
PQ102
47K
2
12
12
+3VS
12
+3VS
12
PR424
10K_0402_5%
13
12
12
ADP_SI GNAL
PR418
10K_0402_5%
ADP_PS032
PD54
1SS355_SOD323
PR452
210K_0402_1%
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2006/02/272007/02/27
3
Compal Secret Data
Deciphered Date
Title
Size Docum ent Numb erRe v
2
Dat e:Sheeto f
Compal Electronics, Inc.
ADP_OCP
LA-3031P
4449Tues day, Feb ruary 28, 2006
1
0.5
1
2
3
4
5
EE PIR list
DB Build:
07/19/2005
Page 4 -Rem ove R5 65 an d R566 and discon nect from +VCCP.
Page 1 0 - A dd a 4 7uF c ap on U15H.E 21,F2 1 for re solution o f possible wavy vide o issues..
Page 1 0 - A dd a 4 7uF c ap on R615-2 for resolution of possib le wavy vid eo issues.
11
Page 1 6 - A dd R98 8 and R989 to lea ve th e option in the fu ture to ch ange the v alues for
impeda nce ma tching.
Page 2 0 - M ake U2 8C.E23 a test point .
Page 2 7 - C hange DOCK_ HPS# to P ORT_A_SNS at R965
Page 2 7 - d elete R979 and j umper
Page 2 7 - d elete R894 and j umper
Page 2 7 - d elete R900 and j umper
Page 2 7 - C hange CODEC _REF t o MIC_BIAS _B on pin 28 of U14
Page 2 7 - C onnect LINE _IN_SE NSE to pin 27 of JP30A doc king conne ctor
Page 2 7 - C hange R526 fro m 1uF to 0 .1uF
Page 2 7 - R eserve C 917.
Page 2 7 - R eserve R90 1
Page 2 8 - a dd zer o ohm mic b ias op tions to V DDA_CODEC and MIC_BI AS_B
Page 2 8 - a dd inv ertin g fet and PORT_A_ SNS sense signal
Page 2 8 - C hange R252, R253 from 0402 to 0805 p ackage size .
Page 3 2 - R emove R928
Page 3 2 - R emove R538 and di sconnec t net EC_GP IO12 from +3VL.
R emove J10 a nd J12 . EC_ GPIO1 2 should b e directly connected to ADP_PS1
22
Page 3 2 - R emove J15 a nd dis connect ne t BATCON f rom OUT0.
Page 3 2 - R emove J11 a nd con nect d iode CH751H -40_SC76 (pin 2) t o EC_GPIO1 3 and pin1 to ADP_PRE S.
Page 3 4 - C onnect JP30A .27 to LIN E_IN_SENSE
07/20/2005
Page 2 8 - C onnect R418 and R 417 si de 1 togeth er to app ly the bias voltage ( VDDA_Codec or the
option al MI C_BIAS _B) t o both the tip and r ing.
Page 3 2 - Re move D62
07/21/2005
Page 2 0 - R emove conne ctions for U SB_OC #3 and USB_O C#4 from t he USB port s and USB_ OC#2 net f rom RP55.
Page 2 0 - R eserve R789 f or Calisto ga A1.
Page 2 0 - C onnect Net PM_EXT TS#0 ( U15B.F2 5) to JP34. 50 and JP1 0.50 for T S.
Page 2 6 - R emove Mini-Card Clip JP38 .
Page 2 6 - R eserve 0-oh m opti on res istor from XMIT _OFF to XM IT_OFF# to bypass Q92
07/22/2005
33
Page 1 7 - M odify fingerpri nt signal.
Page 2 0 - C hange PCIE port 5 to PC IE port 4 for the PCIE chan nel for th e dock
07/25/2005
Page 7 - Re serve R586. becau se IMV P6 VR had insta lled a ser ies Resisto r (500-Ohm )
07/27/2005
Page 1 7 - a dd 2 p ins G ND by removi ng B+ _LCD * 1 and LC DVDD *1 an d modify a ll signals except LVD S
Page 2 9 - I nstall D54, D55 and D56 for H P request.
07/28/2005
Page 4 - Ad d C932 and C 933 for EM I request.
Page 2 7 - A dd L78 for EMI request.
07/29/2005
44
Page 4 - Mo dify t he th ermal sensor fr om ADM1032 to ADT7461 .
Page11 - Re serve R626 per th e lates t Intel CRB schematic s v1.502
Page19 - Re move + 3VS f rom SATA f or HP requ est.
08/01/2005
Page22 - Mo dify R 957 a nd R95 8 from 2.2K to 100 K for TI r equest.
Page26 - Re serve R950 .
1
2
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
08/03/2005
Page16 - Ad d R991 , R992 and R993 f or EMI.
08/09/2005
Page 2 7 - a dd ope n pul l down resis tor (R 994) optio n on SENSE B for ADI request.
Page 2 7 - d elete C915 and C916 f or ADI req uest.
Page 2 8 - a dd res istor (R995 ) jump er op tion be tween pins 1 and 2 o f Q97 for A DI request .
Page 2 8 - c hange C224 from 1 uF to 4.7uF for ADI r equest.
Page 2 8 - c hange C487, C486 from 4. 7uF to 10uF for ADI r equest.
08/12/2005
Page 1 7 - c hange D62.4 from _USB _VCCA to + 3VS.
08/13/2005
Page 2 8 - c hange the o ption b ypass R995 to bypass Q28
Page 2 8 - C hange C502 and C503 from 0.1u F to 0.22uF
08/15/2005
Page 2 4 - r eserve R856b y Boardcom request.
08/17/2005
Page 2 8 - C hange C502 and C503 from 0.22 uF to 0.1uF
SI-1 Build:
08/19/2005
Page 7 - In stall R587 and R592 for V_DDR_ MCH_REF.
Page 2 6 - M ove +3 VL fr om JP3 7.39 t o JP3 7.45 and move CAPS _LED# from jp37.41 t o JP37.51.
09/08/2005
Page 4 - Ch ange t he Th ermal Sensor U16 back to AD M1032.
Page 1 8 - I nstall R742 to co nnect ACCEL_INT to PCI_PI RQH# (U28B. G7).
Page 2 0 - R 793 on U28C .E20 s hould be NC (with @ sy mbol NOT A CCEL@) to disconnect U28C.E20 f rom ACCEL_ INT.
Page 2 5 - d isconn ect R2 70 & R271 from C320.
Add an other 1000p F 2 t o 3KV capaci tor to ground for R270 & R27 1 connecti on
Page 2 9 - C hange the t iming capaci tor C58 2 on U12 p in 3 from 0.1UF to 0 .001UF
Page 3 2 - R 78 sho uld h ave an "250@ " sym bol and should not be install ed for the 1021.
Page 3 4 - R oute A COCP_ EN# fr om the circ uit to the d ocking con nector JP30 A.29 and r emove net SM_ADPTR.
09/12/2005
Page 2 0 - R emove R792 and R7 93 and disc onnect nets ADP_ID a nd ACCEL_I NT from U2 8C.E20. Ma ke U28C.E2 0 a TP.
Page 3 2 - A dd R99 8 for KBC TX issue.
09/14/2005
Page 1 7, 20 - Con nect JP28.4 0 to U 28.E23 for digitizer sleep pin.
Page 2 6 - i nstall R990 and u n-inst all R 891, R892 and Q92 fo r BIOS code implement .
09/16/2005
Page 1 5 - M odify R660 from 4 75 ohm to 4.7K ohm to meet I CS spec
Page 1 5 - I nstall R639 , R641 to m eet ICS sp ec
Page 1 5 - M odify R642, R644, R647, R653 , R943 , R94 4, R666, R669, R678 , R682, R6 85, R687, R 689, R691, R702,
R705, R713, R714 from 33 oh m to 24 ohm to meet I CS spec
Page 1 9 - C hange R754, R755, R756, R757 , R759, R760, R765 , R766 fro m 33Ohm to 39Ohm.
Add 39 Ohm s eries resis tors to AC97_SDIN 0, AC97_SDI N1.
Issued Date
2006/02/272007/02/27
3
Compal Secret Data
Deciphered Date
4
Title
Size Docume nt NumberRe v
Date :Sheetof
Compal Electronics, Inc.
H/W2 EE Dept. PIR SHEET
LA-3031P
5
4549Tuesd ay, Febru ary 28, 2006
0.5
1
2
3
4
5
EE PIR list (II)
9/21/2005
Page 2 7 - I nstall 10K ohm re sistor in t he R898 l ocation an d install R901 with 0 ohm.
Page 2 8 - R esisto r R99 5 shou ld be placed f rom gate of Q28 to dr ain pin 1
9/23/2005
Page 2 2 - A dd dam ping resistor on SD_DAT/ SD_CMD.
11
Page 2 3 - M odify R983 from 4 .7K to 33 ohm for C ARDBUS issu e.
9/27/2005
Page 1 0 - A dd pla cehol der fo r 47uF capa citor at R61 6.2 to GND and R617.2 to GND fo r bulk cap acitance
on +3V S_TVD ACB and +3VS_TVDA CA.
Page 2 4 - D isconn ect P LT_RST from U6A.C 2. Add circuit shown for PLT_RST#_ LAN and con nect signa l
PLT_RS T#_LA N to U6A. C2.
Page 2 6 - A dd cir cuit for +3 VS_MIN I. Ad d pads for JP37.24 t o +3VS and +3VALW.
Page 2 9 - A t R454 .2 no de, ad d plac eholder NI for @0.1u F cap to G ND.
Page 3 1 - A dd CLK _TPM signal at R9 29.1 with N I @0Ohm option. Connect th is to U47.1 3 with ano ther
NI @0O hm op tion on this pin.
Page 3 4 - A t JP30 B.P2, add p lacehol der for 22u F NI @ cap acitor.
9/28/2005
Page 2 5 - M odify C320 and C9 34 from 1 000p 3KV t o 2200p 2KV .
9/29/2005
22
Page 2 2 - A dd the term inatio n resi stor fo r SD card o vershot an d undersho t.
Page 2 7 - i nstall R965 to fi x the issue of "i nternal speaker n o sound" t hat found o n all DB-B M/B.
Page 3 6 - R emove the PGD_I N circuit
Page 3 6 - R emove the VGA TE_INTEL c ircuit
10/04/2005
Page 1 5 - M ove PC IE_LO M/PCIE _LOM# from SCRCLKT1/ C1 to SRCCL KT2/C2 (U2 5.22, U25. 23).
Page 2 4 - A dd Cir cuits to p revent leak age fr om BCM575 3M and is u rgent to i mplement i n SI-1.
Page 2 4 - R emove R656 and di sconne ct fro m +3VS and connect C LKREQA# to circuit
Page 2 4 - A dd 0-O hm NI resis tors o n ICH_ SMBCLK and ICH_SMBDA TA on U6A.D 9/D8.
This i s to leave I2C d isconn ected and reser ved for AS F implement ation.
10/06/2005
Page 7 - ad d 0-Oh m jum per Inst alled for DDR_THERM#.
Page 2 2 - A t U23B .G6, add O- Ohm ju mper to +S1_V CC. Chang e R829 to 0-Ohm and NI R829.
Page 2 4 - C hange U44 f rom AT 24C512 N (51 2kB) to AT 24C64A whi ch is a 64k bit EEPROM .
33
10/07/2005
Page 1 8 - C hange U39.5 and U40.5 to +3VALW.
Page 2 4 - A dd 4.7 kOhm pulldo wn to GND on LO M_LOW_PWR U6A.J5 andN I U43.
Page 2 4 - C hange R865.1 r ail to +3V ALW
10/11/2005
Page 2 0 - m odify R522 from 1 0K to 100k an d the rail from V_3P 3_LAN to + 3VALW
Page 2 4 - I nstall 4.7k Ohm Pu llup R esist ors to +V_ 3P3_LAN at R1013.2 an d R1014.2.
Page 2 5 - C hange R871 to 10 K-Ohm.
11/10/2005
Page 1 5 - R eserve the workar ound circ uit for MA XIM IC issu e.
Page 2 0 - S wap PA NEL_F LIP# f rom GP IO39 to GPIO12 an d add a pu ll-up resi stor.
11/14/2005
Page 1 7,20, 29 - C hange USB20 _P1, N 1 to No Con nects. Connect U SB20_P2,N2 to Fingerp rint. Chan ge JP11.2
44
Page 2 5 - A dd 4x 12nF 100V c apacit or pl acehold ers at R26 9.2, R270. 2, R271.2, and R272.2 .
Page 2 8 - A dd the R103 4(1Koh m) and the R995(0 Ohm) betwe en EAPD and EAPD#. Ch ange net n ame
11/15/2005
Page 2 0 - M ove LP _EN# from G PIO27 (U28C .B21) to GPIO8 (U28C.E21) . Make U2 8C.B21 a T est Point.
Page 2 4 - A F30 ha ve bl ack sc reen i ssue whe n AC plug-i n(LP_EN# i nactive).
and JP 11.4 from U SB20_ N2/P2 to USB 20_N5 /P5 respe ctively. S wap USB_OC #5 and USB _OC#2.
from E APD# to MUTE_L ED#.
This i ssue is cau sed b y PLT_RS T# dropped to 1.12V.
Change R100 7 from 0 oh m to 2 20K ohm f or solving this issue .
1
2
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Add R1 025 ( 10k oh m) in PLT _RST#_LAN.
11/17/2005
Page 2 4 - A dd C10 44 (0 .1uF cap .) to GND at Q57.2.
Page 2 5 - C hange C1040 , C104 1, C10 42, C 1043 i n series with R269- 2, R270-2, R271-2, a nd R272-2.
INSTAL L C10 40, C1 041, C1042, and C1043. Remove C 934.
Connec t C32 0 to R 269-1 , R270- 1, R271-1, and R272-2 .
11/18/2005
Page 2 5 - C hange C1040 ,C1041 ,C1042 ,C1043 valu e from 12n F to 10nF.
Page 2 4 - C hange Q103. 1 net na me to LOM_ PCIE_WAKE#.
Page 2 0 - C hange Q77.3 net n ame to LOM_P CIE_WAKE# and discon nect from R 796.1.
Instal l R79 6 and give R796.1 ne t name PCI E_WAKE#.
Page 2 4 - C hange C1044 to no stuff.
11/22/2005
Page 2 4 - N I C826 ,R859 ,C828, R1017, R1016, R101 8, R1020 a nd Q105.
Revers e Q10 3.1 to LAN_ WAKE# and Q103.3 to LOM_PC IE_WAKE#.
NI R10 21 an d Inst all R 1022. +3VS should be powering this Schm idt Trigge r.
Remove R102 3, we don't need this o ption. Connect N IC_PD_N to D63.1 dir ectly.
At Q86 .1, a dd 0-O hm(R1 037) I nstall ed option and call output NIC_ PD_N.
Add Op tion 10K oh m(R10 36) Pu llup a t Q86.1 but NI and pull-up t o V_3P3_LA N.
Add a NI Ze ner Di ode R B751V_ SOD23(D 64) in para llel with R1007.
11/23/2005
Page 2 1 - C hange C753 to 2 20uF 6.3V.
Page 1 7 - C hange the L CD Pow er Circuit from AF a nd Caymus.
Delete R12, R474 a nd C2 8. Add R1038 ,R1039 and C1045. No install C 20.
On JP2 8.40, add 0 -Ohm j umper on D IGI_SLEEP.
Page 1 8 - C hange U39.5 and U 40.5 t o +3VS. In stall R742 and NI R7 41.
Page 1 9 - R emove R984 and di sconne ct from +3 VS. Make U28A.AA5 a TP.
Page 2 0 - C hange R522.2 to V_3P3_LAN .
Page 3 3 - A dd fun ction board ESD s olution. A dd C1046,C 1047 and D 65.
11/24/2005
Page 1 7 - A dd 0-O hm Ju mper o n JP28.18 a lso (DIG_R ESET).
Page 2 0 - C hange R522.2 to +3VALW.
Page 3 4 - C hange R529 to 220 K and at no de SLP _S5#_5R a dd 2N7002 FET (NI) p in 1, pin 3 to GND,
and Pi n 2 o utput shoul d have 1uF 1 0V Ca p to G ND NI, and 22KOhm ser ies NI. C onnect out put
of 22K to PRE P#.
Page 2 0 - A dd LAN LINK_ STATUS # isol ation circu it.Cange U26C.R4 (GP IO14) to L ANLINK_STA TUS#_SB.
Add 0- Ohm o ption NI to bypas s this circ uit if nec essary.
Page 1 9 - C hange C516 and C5 28 fro m 10pf t o 15pf to s olve the R TC issue.
Page 2 4 - O n DC m ode w ithout LAN c able plugge d, system dose not p rovide pow er for LAN chip.
So LAN LINK_ STATUS # wil l be dri ven low by LAN chip.
We wil l add isola tion CKT to sol ve this is sue.
Add R1 042,R 1043,R 1044,R1046 ,Q108.
11/29/2005
Page 2 9 - C hange C582 from 0.001 uF to 0.04 7uF.
Page 2 6 - J 9 shor t and J10 o pen to solv e that 3.3V Aux power is not presen t on Mini Card slot.
12/09/2005
Page 2 8 - A dd Q28 and delete R1034 because au dio driver not ready .
Page 2 9 - C hange C582 from 0.047u F to 1500p F.
01/04/2006
Page 6 - Re serve C625 and C6 29 to sol ve PCA Aco ustic Noise .
Page 2 6 - A dd C10 49 to so lve EMI is sue.
Page 2 6 - S hort J 10 an d un-s hort J9 to fix WLAN l eakage.
2006/02/272007/02/27
3
Compal Secret Data
Deciphered Date
4
Title
Size Docume nt NumberRe v
Date :Sheetof
Compal Electronics, Inc.
H/W2 EE Dept. PIR SHEET 2
LA-3031P
4649Tuesd ay, Febru ary 28, 2006
5
0.5
1
2
3
4
5
EE PIR list (II)
1/10/2006
Page 2 6 - C hange J10.1 from +3VS t o V_3 P3_LAN to en sure that WoWLAN is s upported b ut no leak age on DC.
1/12/2006
Page 1 5 - R eserve C105 0, C1051 and C1052 for EMI.
Page 1 6 - A dd L79 , L80 and L81 to fix EMI issue.
11
Page 2 4 - C hange RDAC R858 fr om 1.24kOh m to 1.21kO hm.
Page 2 9 - C hange R513 to 1kO hm, C5 82 to 2200p F and C102 to 220uF.
Page 3 3 - R eserve D66 on TP_DA TA / TP CL K for EMI.
Page 3 3 - A dd C10 53 an d C105 4 on MO D_TIP / MOD _RING near RJ-11.
2/20/2006
Page 3 6 - A dd the circ uit fo r powe r seque nce timing between + 1.5VS and VCCP.
22
33
44
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
1
2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/02/272007/02/27
Compal Secret Data
Deciphered Date
Title
Size Docume nt NumberRe v
4
Date :Sheetof
Compal Electronics, Inc.
H/W2 EE Dept. PIR SHEET 3
LA-3031P
4749Tuesd ay, Febru ary 28, 2006
5
0.5
5
Version Change List ( P. I. R. List ) for Power Circuit
Version Change List ( P. I. R. List ) for Power Circuit
Version Change List ( P. I. R. List ) for Power CircuitVersion Change List ( P. I. R. List ) for Power Circuit
Requ
Request
IIIItem
temIssue Descr
Pa ge#
temtem
DD
111144
ge#Tit
PaPa
ge#ge#
44HP
4444
Tit le
le
TitTit
lele
ADP _OCP
_OCP7/29
ADPADP
_OCP_OCP
Da te
DaDa
7/29PC212 chang
7/297/29
te
tete
RequRequ
Owner
Owner
OwnerOwner
HPADP
HPHP
4
est
estest
PC212 change from 2200pF to 0.22uF
PC212 changPC212 chang
Issue Description
Issue DescrIssue Descr
e from 2200pF to 0.22uF
e from 2200pF to 0.22uFe from 2200pF to 0.22uF
iptionDa
iptioniption
3
Solut
Solution Description
ion DescriptionRRRRev.
SolutSolut
ion Descriptionion Description
PC212 chang
PC212 change from 2200pF to 0.22uF
PC212 changPC212 chang
2
e from 2200pF to 0.22uF
e from 2200pF to 0.22uFe from 2200pF to 0.22uF
1
ev.Pa
ev.ev.
222244
333344
444444
CC
666639
777739
888844
999944
10
1044
1010
BB
11
1144
1111
44ADP
4444
44ADP
4444
44ADP
4444
411.0
4141
39Charger/OCP
3939
39Charger/OCP
3939
44ADP
4444
44ADP
4444
44ADP
4444
44ADP
4444
ADP _OCP
_OCP7/29
ADPADP
_OCP_OCP
ADP _OCP
_OCP7/29
ADPADP
_OCP_OCP
ADP _OCP
_OCP7/29
ADPADP
_OCP_OCP
1.05V/1.8VP
5V/1.8VPIntel modify DDR2 spec can not less
1.01.0
5V/1.8VP5V/1.8VP
Charger/OCP11
Charger/OCPCharger/OCP
Charger/OCP11
Charger/OCPCharger/OCP
ADP _OCP
_OCP11
ADPADP
_OCP_OCP
ADP _OCP
_OCP11
ADPADP
_OCP_OCP
ADP _OCP
_OCP11
ADPADP
_OCP_OCP
ADP _OCP
_OCP11
ADPADP
_OCP_OCP
7/29HP
7/297/29
7/29HP
7/297/29
7/29HP
7/297/29
10/3
10/3In
10/310/3
11 /14
/14H P
1111
/14/14
11 /14
/14H P
1111
/14/14
11 /14
/14H P
1111
/14/14
11 /14
/14H P
1111
/14/14
11 /14
/14H P
1111
/14/14
11 /14
/14H P
1111
/14/14
HPPR416 cha
HPHP
HPPR449 cha
HPHP
HPPC211 change fr
HPHP
Intel
tel41
InIn
teltel
HPRem
HPHP
HPPR36 chang
HPHP
HPPR390 cha
HPHP
HPPC209 c
HPHP
HPPR399 cha
HPHP
HPPC21
HPHP
PR416 cha nge from 10K to 3.3K
PR416 chaPR416 cha
PR449 cha nge from 3.3K to 10K
PR449 chaPR449 cha
PC211 change from 2.2uF to 10U_0805_6.3V6M
PC211 change frPC211 change fr
Intel modify DDR2 spec can not less than 1.75V.
Intel modify DDR2 spec can not less Intel modify DDR2 spec can not less
Remove PQ82 and PD46
ove PQ82 and PD46Rem
RemRem
ove PQ82 and PD46ove PQ82 and PD46
PR36 change from 560k to 1M.
PR36 changPR36 chang
PR390 cha nge from 27K to 3.9K_5%
PR390 chaPR390 cha
PC209 change from 0.22uF to 0.027uF
PC209 cPC209 c
PR399 cha nge from 649K to 604K
PR399 chaPR399 cha
PC211 change from 10uF to 0.1uF X7R
PC21PC21
nge from 10K to 3.3KPR416 cha
nge from 10K to 3.3Knge from 10K to 3.3K
nge from 3.3K to 10KPR449 cha
nge from 3.3K to 10Knge from 3.3K to 10K
om 2.2uF to 10U_0805_6.3V6M PC211 change fr
om 2.2uF to 10U_0805_6.3V6Mom 2.2uF to 10U_0805_6.3V6M
than 1.75V. Modify 1.8VP
than 1.75V.than 1.75V.
e from 560k to 1M.PR36 chang
e from 560k to 1M.e from 560k to 1M.
nge from 27K to 3.9K_5%
nge from 27K to 3.9K_5%nge from 27K to 3.9K_5%
hange from 0.22uF to 0.027uF
hange from 0.22uF to 0.027uFhange from 0.22uF to 0.027uF
nge from 649K to 604K
nge from 649K to 604Knge from 649K to 604K
1 change from 10uF to 0.1uF X7R
1 change from 10uF to 0.1uF X7R1 change from 10uF to 0.1uF X7R
PR416 cha nge from 10K to 3.3K
PR416 chaPR416 cha
PR449 cha nge from 3.3K to 10K
PR449 chaPR449 cha
PC211 change from 2.2uF to 10U_0805_6.3V6M
PC211 change frPC211 change fr
Modify 1.8VP soultion from fix mode to adjustable mode.
Modify 1.8VPModify 1.8VP
Remove PQ82 and PD46
ove PQ82 and PD46
RemRem
ove PQ82 and PD46ove PQ82 and PD46
PR36 change from 560k to 1M.
PR36 changPR36 chang
PR390 cha
PR390 cha nge from 27K to 3.9K_5%
PR390 chaPR390 cha
PC209 c
PC209 change from 0.22uF to 0.027uF
PC209 cPC209 c
PR399 cha
PR399 cha nge from 649K to 604K
PR399 chaPR399 cha
PC21
PC211 change from 10uF to 0.1uF X7R
PC21PC21
nge from 10K to 3.3K
nge from 10K to 3.3Knge from 10K to 3.3K
nge from 3.3K to 10K
nge from 3.3K to 10Knge from 3.3K to 10K
om 2.2uF to 10U_0805_6.3V6M
om 2.2uF to 10U_0805_6.3V6Mom 2.2uF to 10U_0805_6.3V6M
soultion from fix mode to adjustable mode.5555
soultion from fix mode to adjustable mode. soultion from fix mode to adjustable mode.
e from 560k to 1M.
e from 560k to 1M.e from 560k to 1M.
nge from 27K to 3.9K_5%
nge from 27K to 3.9K_5%nge from 27K to 3.9K_5%
hange from 0.22uF to 0.027uF
hange from 0.22uF to 0.027uFhange from 0.22uF to 0.027uF
nge from 649K to 604K
nge from 649K to 604Knge from 649K to 604K
1 change from 10uF to 0.1uF X7R
1 change from 10uF to 0.1uF X7R1 change from 10uF to 0.1uF X7R
12
1244
1212
13
1344
1313
14
1444
1414
15
1544
1515
AA
16
1644
1616
44ADP
4444
44ADP
4444
44ADP
4444
44ADP
4444
44ADP
4444
ADP _OCP
ADPADP
ADP _OCP
ADPADP
ADP _OCP
ADPADP
ADP _OCP
ADPADP
ADP _OCP
ADPADP
5
_OCP11
_OCP_OCP
_OCP11
_OCP_OCP
_OCP11
_OCP_OCP
_OCP11
_OCP_OCP
_OCP11
_OCP_OCP
11 /14
1111
11 /14
1111
11 /14
1111
11 /14
1111
11 /14
1111
/14H P
/14/14
/14H P
/14/14
/14H P
/14/14
/14H P
/14/14
/14H P
/14/14
HPPR411 cha
HPHP
HPPR420 cha
HPHP
HPR448 ch
HPHP
HPPR416 cha
HPHP
HPPR449 cha
HPHP
PR411 cha nge from 47K to 10K_5%
PR411 chaPR411 cha
PR420 cha nge from 10K to 21K_1%
PR420 chaPR420 cha
R448 change from 11.5K to 3.48K_1%
R448 chR448 ch
PR416 cha nge from 3.3K to 10K_5%
PR416 chaPR416 cha
PR449 cha nge from 10K to 21K_1%
PR449 chaPR449 cha
4
nge from 47K to 10K_5%
nge from 47K to 10K_5%nge from 47K to 10K_5%
nge from 10K to 21K_1%
nge from 10K to 21K_1%nge from 10K to 21K_1%
ange from 11.5K to 3.48K_1%
ange from 11.5K to 3.48K_1%ange from 11.5K to 3.48K_1%
nge from 3.3K to 10K_5%
nge from 3.3K to 10K_5%nge from 3.3K to 10K_5%
nge from 10K to 21K_1%
nge from 10K to 21K_1%nge from 10K to 21K_1%
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
PR411 cha
PR411 cha nge from 47K to 10K_5%
PR411 chaPR411 cha
PR420 cha
PR420 cha nge from 10K to 21K_1%
PR420 chaPR420 cha
R448 ch
R448 change from 11.5K to 3.48K_1%
R448 chR448 ch
PR416 cha
PR416 cha nge from 3.3K to 10K_5%
PR416 chaPR416 cha
PR449 cha
PR449 cha nge from 10K to 21K_1%
PR449 chaPR449 cha
2006/01/102007/01/10
Compal Secret Data
nge from 47K to 10K_5%
nge from 47K to 10K_5%nge from 47K to 10K_5%
nge from 10K to 21K_1%
nge from 10K to 21K_1%nge from 10K to 21K_1%
ange from 11.5K to 3.48K_1%
ange from 11.5K to 3.48K_1%ange from 11.5K to 3.48K_1%
nge from 3.3K to 10K_5%
nge from 3.3K to 10K_5%nge from 3.3K to 10K_5%
nge from 10K to 21K_1%
nge from 10K to 21K_1%nge from 10K to 21K_1%
Deciphered Date
2
Title
Size Docume nt NumberRe v
Date :Sheeto f
Compal Electronics, Inc.
Changed-List History-1
LA-3031
1
4849Tuesday, F ebruary 2 8, 2006
0.4
5
Version Change List ( P. I. R. List ) for Power Circuit
Version Change List ( P. I. R. List ) for Power Circuit
Version Change List ( P. I. R. List ) for Power CircuitVersion Change List ( P. I. R. List ) for Power Circuit
Requ
Request
Da
Pa ge#
tem
temtem
DD
17
17HP
1717
18
1844
1818
19
19
1919
20
20
2020
21
2102
2121
ge#IIIItem
PaPa
ge#ge#
4411
4444
44HP
4444
41
4101
4141
40
403.3V/5V
4040
41
4141
Tit
Tit le
le
TitTit
lele
ADP _OCP
_OCPAdd new 47K_5% resistor
ADPADP
_OCP_OCP
ADP _OCP
_OCP11
ADPADP
_OCP_OCP
0.9VSP
VSP
0.90.9
VSPVSP
3.3V/5VHP
3.3V/5V3.3V/5V
1.05V41
1.05V1.05V
Da te
DaDa
11 /14
1111
11 /14
1111
01 /10
0101
02 /27
0202
02 /27
0202
RequRequ
tePa
tete
Owner
Owner
OwnerOwner
/14ADP
/14/14
/14Add new
/14/14
/10CCCCompal
/10/10
/27
/27/27
/271.05V
/27/27
HP44
HPHP
HPADP
HPHP
ompalChange PU9 from APL5
ompalompal
HP02
HPHP
HP
HP
HPHP
4
est
estest
Add new 47K_5% resistor in series with PR415-2
Add new 47K_5% resistorAdd new 47K_5% resistor
Add new 1uF X7R capacitor from PR415-2 to GND
Add newAdd new
Change PU9 from APL5331 to G2992F1U
Change PU9 from APL5Change PU9 from APL5
WW
WW AN noise issue
WWWW
WW AN noise issue
WWWW
1uF X7R capacitor from PR415-2 to GND
1uF X7R capacitor from PR415-2 to GND 1uF X7R capacitor from PR415-2 to GND
AN noise issue
AN noise issueAN noise issue
AN noise issue
AN noise issueAN noise issue
Issue Description
Issue DescrIssue Descr
in series with PR415-2
in series with PR415-2 in series with PR415-2
331 to G2992F1U0.9
331 to G2992F1U331 to G2992F1U
iption
iptioniption
3
2
Solution Description
ion DescriptionIssue Descr
SolutSolut
ion Descriptionion Description
Add new 47K_5% resistor
Add new 47K_5% resistor in series with PR415-2
Add new 47K_5% resistorAdd new 47K_5% resistor
Add new
Add new 1uF X7R capacitor from PR415-2 to GND
Add newAdd new
Add new 33pF
Add new 33pF X7R capacitor from PL6,2 to PC59 2.
Add new 33pF Add new 33pF
Add new 2200pF X7R capacito
Add new 2200pF X7R capacitor to parallel PC72
Add new 2200pF X7R capacitoAdd new 2200pF X7R capacito
1uF X7R capacitor from PR415-2 to GND
1uF X7R capacitor from PR415-2 to GND 1uF X7R capacitor from PR415-2 to GND
X7R capacitor from PL6,2 to PC59 2.
X7R capacitor from PL6,2 to PC59 2.X7R capacitor from PL6,2 to PC59 2.
in series with PR415-2
in series with PR415-2 in series with PR415-2
r to parallel PC72WW
r to parallel PC72r to parallel PC72
1
RRRRev.
ev.Solut
ev.ev.
CC
22
22
2222
23
231111.5V
2323
24
24
2424
25
2525
261111.5V
2626
BB
41
4141
41
41
4141
41
4141
41
4125
4141
41
4126
4141
1.05V
1.05VChange PC
1.05V1.05V
.5V02
.5V.5V
1111.5V
.5V02
.5V.5V
1.05V
1.05VHP
1.05V1.05V
.5V02
.5V.5V
02
02 /27
/27WW
0202
/27/27
02 /27
/27
0202
/27/27
02 /27
/2741
0202
/27/27
02
02 /28
/28
0202
/28/28
02 /28
/28
0202
/28/28
HP41
HPHP
HP
HP
HPHP
HP
HP
HPHP
HP
HPHP
HP
HP
HPHP
WW AN noise issue
AN noise issueHP
WWWW
AN noise issueAN noise issue
WW
WW AN noise issue
AN noise issue
WWWW
AN noise issueAN noise issue
WW
WW AN noise issue
AN noise issue
WWWW
AN noise issueAN noise issue
EMI
EMI issue
issue
EMI EMI
issueissue
EMI
EMI issue
issueReserve PC220 220pF X7R capacitor to pa
EMI EMI
issueissue
Change PC73 from 2200pF to 33pF X7R capacitor.
Change PCChange PC
Add new 2200pF X7R capacitor
Add new 2200pF X7R capacitor to parallel PC138
Add new 2200pF X7R capacitorAdd new 2200pF X7R capacitor
Change PC1
Change PC138 from 2200pF to 33pF X7R capacitor.
Change PC1Change PC1
Reserve PC219 220pF X7R capacitor to p
Reserve PC219 220pF X7R capacitor to parallel PC72
Reserve PC219 220pF X7R capacitor to pReserve PC219 220pF X7R capacitor to p
Reserve PC220 220pF X7R capacitor to pa rallel PC138
Reserve PC220 220pF X7R capacitor to paReserve PC220 220pF X7R capacitor to pa
73 from 2200pF to 33pF X7R capacitor.
73 from 2200pF to 33pF X7R capacitor.73 from 2200pF to 33pF X7R capacitor.
to parallel PC138
to parallel PC138 to parallel PC138
38 from 2200pF to 33pF X7R capacitor.
38 from 2200pF to 33pF X7R capacitor.38 from 2200pF to 33pF X7R capacitor.
arallel PC72
arallel PC72arallel PC72
rallel PC138
rallel PC138rallel PC138
AA
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/01/102007/01/10
Compal Secret Data
Deciphered Date
Title
Size Docume nt NumberRe v
2
Date :Sheeto f
Compal Electronics, Inc.
Changed-List History-2
LA-3031
1
4949Tuesday, F ebruary 2 8, 2006
0.4
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