Compal LA-2921P HBL50, Aspire 3690, Aspire 5610, Aspire 5610Z, Aspire 5630 Schematic

A

1 1

B

C

D

E

Compal Confidential

2 2

HBL50 Schematics Document

Intel Yonah Processor with 945GM/945PM + DDRII + ICH7M

(With nVIDIA G73M/72MV)

3 3

2005-11-08

REV: 0.3

4 4

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

D

Date: Sheet

Compal Electronics, Inc.

Cover Page

HBL50 LA-2921P

E

0.3

of

159Friday, November 11, 2005

A

B

C

D

E

Compal Confidential

Thermal Sensor

F75383M

page 4

Memory BUS(DDRII)

Dual Channel

1.8V DDRII 400/533

Model Nam e : H BL50

Fan Control

page 47

File Name : LA-2921

1 1

DVI-D Conn.

page 25

DVI

LCD Conn.

page 23

CRT & TV-out

page 24

LVDS

CH7307C SDVO

page 25

LVDSDVI

PCI-Express

H_A#(3..31)

Yonah

uPGA-478 Package

page 4,5

PSB

533/667MHz

Intel 945PM/GM

uFCBGA-1466

page 6,7,8,9,10,11

H_D#(0..63)

nVidia G73M/(72M)/72MV

with 64/128/256MB VRAM

page 15,16,17,18,19,20,21,22 page 37

DMI

New Card
Socket

PCI Express

2 2

IDSEL:AD16
(PIRQE#,
GNT#2,
REQ#2)

IEEE 1394

VT6311S

page 38

IDSEL:AD18
(PIRQG/H#,
GNT#3,
REQ#3)

Mini PCI
socket

(WLAN)
(TV-Tuner)

page 36

1394 Conn.

page 38

3.3V 33 MHz

IDSEL:AD17
(PIRQF#,
GNT#3,
REQ#3)

LAN (10/100)

BCM4401E

page 34

RJ45

page 35

PCI BUS

IDSEL:AD20
(PIRQA#,
GNT#2,
REQ#2)

CardBus

ENE CB714

Slot 0

page 33

page 32

6 in 1
socket

page 33

Intel ICH7-M

BGA-652

page 26,27,28,29

3.3V 48MHz

3.3V 24.576MHz/48Mhz

3.3V ATA-100
S-ATA

port 0

S-ATA HDD
Conn.

page 30

USB port 1

IDE

port 0

SATA-to-IDE

SPIF3811-HV096

page 30

LPC BUS

3 3

RTC CKT.

page 43

Power On/Off CKT.

page 43

DC/DC Int erface CKT.

page 48

Switch/B Conn.

USB port4, 6

page 42

CD-PLAY/B Conn.

page 42

ENE KB910Q

Touch Pad

page 43

EC I/O Bu ffer

page 41

page 40

Int.KBD

page 41

BIOS

page 41

Super I/O

SMsC LPC47N207

page 39

FIR

TFDU6102-TR3

page 39

TPM1.2

SLB9635 TT 1.2

page 39

Clock Generator

ICS9LPRS325

page 14

200pin DDRII-SO-DIMM X2

BANK 0, 1, 2, 3

LAN(GbE)

BCM5789

page 34

MINI CARD x2

page 36

HD Audio

CDROM
Conn.

page 31

HDD
Conn.

page 30

page 12,13

USB conn x4

USB port 3, 7

MDC 1.5
Conn

page 42

Audio AMP

Phone Jack x3

page 37

USB port 0, 2

HDA Codec

ALC883

page 45

page 45

Bluetooth
Conn

page 44

Subwoofer

page 46

page 42

USB port5

Power Circuit DC/DC

page 49,50,51,52

4 4

53,54,55,56

A

MEDIA/B Conn.

page 42

CIR

page 42

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

D

Date: Sheet

Compal Electronics, Inc.

Block Diagrams

HBL50 LA-2921P

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259Friday, November 11, 2005

A

Voltage Rails

Power Plane Description

VIN

1 1

2 2

B+
+CPU_CORE
+0.9VS 0.9V switched power rail for DDR terminator
+1.05VS
+1.5VS
+1.8V
+1.8VS 1.8V switched power rail
+2.5VS
+3VALW
+3VS
+5VALW
+5VS
+VSB VSB always on power rail ON ON *
+RT C V C C RTC power

Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU

1.05V switched power rail

1.5V switched power rail

1.8V power rail for DDR

2.5V switched power rail

3.3V always on power rail

3.3V switched power rail
5V always on power rail
5V switched power rail

B

S1 S3 S5

N/A N/A N/A

ON OFF
ON OFF
ON OFF OFF
ON OFF OFF
ON
ON
ON
ON
ON
ON

ON
ON

N/AN/AN/A
OFF
OFF

ON

OFF
OFF

OFF

OFF

OFF

ON ON*

OFF

OFF

ON*

ON

OFFON

OFF

ONON

C

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SIGNAL

SLP_S1# SLP_S3#

HIGH HIGH HIGH HIGH

LOW

LOW

LOW LOW LOW LOW

SLP_S4# SLP_S5# +VALW +V +VS Clock

LOW

HIGH

LOWLOWLOW

D

HIGHHIGHHIGH

HIGH

HIGH

Board ID / SK U I D T ab l e for AD channel

Vcc 3.3V +/- 5%

Board ID

0
1
2
3
4
5
6
7 NC

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

0

8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%

AD_BID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

Vtyp

ONONON ON

ON

ON

OFF

OFF

V

ON

OFF

OFF

OFF

AD_BID

ON

ON

ON

ON

AD_BID

0 V 0 V

0.503 V

0.819 V

0.538 V

0.875 V

1.185 V 1.264 V

2.200 V

3.300 V

2.341 V

3.300 V

E

LOW

OFF

OFF

OFF

max

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

External PCI Devices

Device IDSEL # REQ # / GN T # Interrupts

CardBus(SD)

1394
LAN(10/100)

Mini-PCI(WLAN/TV-Tuner)

AD20
AD16 0
AD17
AD18

2

3
1

PIRQA/PIRQB
PIRQE
PIRQF
PIRQG/PORQH

BOARD ID Table

Board ID

0
1
2
3
4
5
6
7

PCB Revision

0.1

BTO Option Table

BTO Item BOM Structure

VGA
UMA

UMA's DVI 7307@

LAN(10/100)

LAN(GIGA)
MINI CARD1
MINI CARD2

SATA-to-IDE 3811@

PM@ + VGA@
GM@

4401@
5789@
MINI1@
MINI2@

PATA PATA@

EC SM Bus1 address

3 3

Device

Smart Battery
EEPROM(24C16/02)
GMT G781-1

Address Address

1010 000X b
1001 101X b

EC SM Bus2 address

Device

Fintek F75383M

1001 100X b0001 011X b

SKU ID Table

SKU ID

0
1
2
3

SKU

PM
GM

4
5

ICH7M SM Bus address

Device

Clock Generator
(ICS9LPRS325AKLFT_MLF72)

DDR DIMM0
DDR DIMM2

Address

1101 001Xb

1001 000Xb
1001 010Xb

6
7

GRAPEVINE

G72MV Only
G73 Only

VRAM X76@
VRAM 64M
VRAM 128M
VRAM 256M 64@+128@+256@

MEDIA/B MEDIA@

CIR CIR@
FIR FIR@

GENEVA

LCM LCM@
Sub-woofer SUB@
5789&5787 8789@
4401&5789 0189@
VP1020 VP1020@

GRA@
G72@
G73@

64@
64@+128@

GEN@

INTMIC@INTERNAL MIC

1394 1394@

4 4

SATA HDD SATA@

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

D

Date: Sheet

Compal Electronics, Inc.

Notes List

HBL50 LA-2921P

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of

359Friday, November 11, 2005

5

4

3

2

1

H_A#[3..31]6

D D

H_REQ#[0..4]6

C C

H_RS#[0..2]6

B B

A A

H_A#[3..31]

H_REQ#[0..4]

H_ADSTB#06
H_ADSTB#16

CLK_CPU_BCLK14

CLK_CPU_BCLK#14

H_ADS#6
H_BNR#6

H_BPRI#6

H_BR0#6

H_DEFER#6

H_DRDY#6

H_HIT#6
H_HITM#6

H_LOCK#6

H_RESET#6

H_RS#[0..2]

H_TRDY#6

PAD

T5

PAD

T3

PAD

T1

PAD

T4

ITP_DBRESET#28

H_DBSY#6
H_DPSLP#27
H_DPRSTP#27,56
H_DPWR#6

PAD

T2

H_PWRGOOD27

H_CPUSLP#6

H_THERMTRIP#6,27

Layout Note:
THERMDA & THERMDC Trace / Space = 10 / 10 mil

5

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_IERR#
H_RESET#

H_RS#0
H_RS#1
H_RS#2

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3

ITP_DBRRESET#

ITP_BPM#4
ITP_BPM#5
H_PROCHOT#

H_PWRGOOD
H_CPUSLP#
ITP_TCK
ITP_TDI
ITP_TDO
TEST1
TEST2
ITP_TMS
ITP_TRST#

THERMDA
THERMDC

JP18A

J4

A3#

L4

A4#

M3

A5#

K5

A6#

M1

A7#

N2

A8#

J1

A9#

N3

A10#

P5

A11#

P2

A12#

L1

A13#

P4

A14#

P1

A15#

R1

A16#

Y2

A17#

U5

A18#

R3

A19#

W6

A20#

U4

A21#

Y5

A22#

U2

A23#

R4

A24#

T5

ADDR GROUP

A25#

T3

A26#

W3

A27#

W5

A28#

Y4

A29#

W2

A30#

Y1

A31#

K3

REQ0#

H2

REQ1#

K2

REQ2#

J3

REQ3#

L5

REQ4#

L2

ADSTB0#

V4

ADSTB1#

A22

BCLK0

A21

H1

E2

G5

F1

H5

F21

G6

E4

D20

H4

B1

F3

F4
G3
G2

AD4
AD3
AD1
AC4

C20

E1

B5

E5

D24
AC2
AC1
D21

D6
D7

AC5
AA6
AB3
C26
D25
AB5
AB6

A24
A25

C7

HOST CLK

BCLK1

ADS#
BNR#
BPRI#
BR0#
DEFER#
DRDY#
HIT#

CONTROL

HITM#
IERR#
LOCK#
RESET#

RS0#
RS1#
RS2#
TRDY#

BPM0#
BPM1#
BPM2#
BPM3#

DBR#
DBSY#
DPSLP#
DPRSTP#
DPWR#
PRDY#
PREQ#
PROCHOT#

PWRGOOD
SLP#
TCK
TDI
TDO
TEST1
TEST2
TMS
TRST#

THERMAL

THERMDA

DIODE

THERMDC
THERMTRIP#

FOX_PZ47903-2741-42_YONAH

4

YONAH

MISC

DATA GROUP

LEGACY CPU

D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DINV0#
DINV1#
DINV2#
DINV3#

DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#

A20M#
FERR#

IGNNE#

INIT#
LINT0
LINT1

STPCLK#

SMI#

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#

H_D#1

F24

H_D#2

E26

H_D#3

H22

H_D#4

F23

H_D#5

G25

H_D#6

E25

H_D#7

E23

H_D#8

K24

H_D#9

G24

H_D#10

J24

H_D#11

J23

H_D#12

H26

H_D#13

F26

H_D#14

K22

H_D#15

H25

H_D#16

N22

H_D#17

K25

H_D#18

P26

H_D#19

R23

H_D#20

L25

H_D#21

L22

H_D#22

L23

H_D#23

M23

H_D#24

P25

H_D#25

P22

H_D#26

P23

H_D#27

T24

H_D#28

R24

H_D#29

L26

H_D#30

T25

H_D#31

N24

H_D#32

AA23

H_D#33

AB24

H_D#34

V24

H_D#35

V26

H_D#36

W25

H_D#37

U23

H_D#38

U25

H_D#39

U22

H_D#40

AB25

H_D#41

W22

H_D#42

Y23

H_D#43

AA26

H_D#44

Y26

H_D#45

Y22

H_D#46

AC26

H_D#47

AA24

H_D#48

AC22

H_D#49

AC23

H_D#50

AB22

H_D#51

AA21

H_D#52

AB21

H_D#53

AC25

H_D#54

AD20

H_D#55

AE22

H_D#56

AF23

H_D#57

AD24

H_D#58

AE21

H_D#59

AD21

H_D#60

AE25

H_D#61

AF25

H_D#62

AF22

H_D#63

AF26

J26
M26
V23
AC20

H23
M24
W24
AD23
G22
N25
Y25
AE24

A6
A5
C4
B3
C6
B4

D5
A3

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

H_DINV#0 6
H_DINV#1 6
H_DINV#2 6
H_DINV#3 6

H_DSTBN#0 6
H_DSTBN#1 6
H_DSTBN#2 6
H_DSTBN#3 6
H_DSTBP#0 6
H_DSTBP#1 6
H_DSTBP#2 6
H_DSTBP#3 6

H_A20M# 27
H_FERR# 27
H_IGNNE# 27
H_INIT# 27
H_INTR 27
H_NMI 27

H_STPCLK# 27
H_SMI# 27

3

2005/06/20 2006/06/20

H_D#0

E22

H_D#[0..63]

Compal Secret Data

Deciphered Date

H_D#[0..63] 6

2200P_0402_50V7K

C625

+3VS

C624

0.1U_0402_16V4Z

1 2

ITP_TCK

U37

1

VDD

2

D+

3

D­THERM#4GND

ADM1032ARMZ-2REEL_MSOP8

F75383M_MSOP8

R15 56_0402_5%
R17 56_0402_5%
R16 56_0402_5%
R500 75_0402_5%
R18 56_0402_5%
R501 56_0402_5%

R19 56_0402_5%
R20 56_0402_5%
R513 1K_0402_5%@
R512 51_0402_5%

Title

Size Document Number Rev

Custom

Date: Sheet

8

SCLK

7

SDATA

6

ALERT#

5

12
12
12
12
12
12

12
12
12
12

HBL50 LA-2921P

EC_SMB_CK2 40
EC_SMB_DA2 40

+1.05VS

Compal Electronics, Inc.

Yonah (1/2)

459Friday, November 11, 2005

1

0.3

of

1

THERMDA

2

THERMDC

ITP_TDI
ITP_TDO
ITP_TMS
H_PROCHOT#
ITP_BPM#5
H_IERR#

ITP_TRST#

TEST1
TEST2

2

5

Layout Note:
Route VCCSENSE and VSSSENSE traces at 27.4Ohms
with 50 mil spacing.
Place PU and PD wihin 1 inch of CPU.

+CPU_CORE

D D

+1.5VS

10U_0805_10V4Z

C C

R510 2K_0402_1%

VCCSENSE56

R499 100_0402_1%

1 2

R498 100_0402_1%

1 2

VSSSENSE56

20mils

1

2

+1.05VS

1

C626

0.01U_0402_16V7K

2

12

PSI#56

CPU_VID056
CPU_VID156
CPU_VID256
CPU_VID356
CPU_VID456
CPU_VID556
CPU_VID656

CPU_BSEL014
CPU_BSEL114
CPU_BSEL214

+CPU_CORE

C628

Layout Note:
Place C14 near Pin B26

R511
1K_0402_1%

1 2

+1.05VS

VCCSENSE
VSSSENSE

GTL_REF0

COMP0
COMP1
COMP2
COMP3

BSEL2 BSEL1 BSEL0 BCLK

01
01

B B

0

R515 27.4_0402_1%

1 2

R514 54.9_0402_1%

1 2

R13 27.4_0402_1%

1 2

R14 54.9_0402_1%

1 2

133
166

1

COMP0
COMP1
COMP2
COMP3

JP18B

AF7

VCCSENSE

AE7

VSSSENSE

B26

VCCA

K6

VCCP

J6

VCCP

M6

VCCP

N6

VCCP

T6

VCCP

R6

VCCP

K21

VCCP

J21

VCCP

M21

VCCP

N21

VCCP

T21

VCCP

R21

VCCP

V21

VCCP

W21

VCCP

V6

VCCP

G21

VCCP

AE6

PSI#

AD6

VID0

AF5

VID1

AE5

VID2

AF4

VID3

AE3

VID4

AF2

VID5

AE2

VID6

AD26

GTLREF

B22

BSEL0

B23

BSEL1

C21

BSEL2

R26

COMP0

U26

COMP1

U1

COMP2

V1

COMP3

E7

VCC

AB20

VCC

AA20

VCC

AF20

VCC

AE20

VCC

AB18

VCC

AB17

VCC

AA18

VCC

AA17

VCC

AD18

VCC

AD17

VCC

AC18

VCC

AC17

VCC

AF18

VCC

AF17

VCC

D2

RSVD

F6

RSVD

D3

RSVD

C1

RSVD

AF1

RSVD

D22

RSVD

C23

RSVD

C24

RSVD

AA1

RSVD

AA4

RSVD

AB2

RSVD

AA3

RSVD

M4

RSVD

N5

RSVD

T2

RSVD

V3

RSVD

B2

RSVD

C3

RSVD

T22

RSVD

B25

RSVD

FOX_PZ47903-2741-42_YONAH

TRACE CLOSELY CPU < 0.5'

COMP0, COMP2 layout : Width 18mils and Space 25mils (27.4Ohms)
COMP1, COMP3 layout : Space 25mils (55Ohms)

4

YONAH

POWER, GROUNG, RESERVED SIGNALS AND NC

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AB26
AA25
AD25
AE26
AB23
AC24
AF24
AE23
AA22
AD22
AC21
AF21
AB19
AA19
AD19
AC19
AF19
AE19
AB16
AA16
AD16
AC16
AF16
AE16
AB13
AA14
AD13
AC14
AF13
AE14
AB11
AA11
AD11
AC11
AF11
AE11
AB8
AA8
AD8
AC8
AF8
AE8
AA5
AD5
AC6
AF6
AB4
AC3
AF3
AE4
AB1
AA2
AD2
AE1
B6
C5
F5
E6
H6
J5
M5
L6
P6
R5
V5
U6
Y6
A4
D4
E3
H3
G4
K4
L3
P3
N4
T4
U3
Y3
W4
D1
C2
F2
G1

+CPU_CORE

1

2

22U_0805_6.3V6M

+CPU_CORE

1

2

22U_0805_6.3V6M

+CPU_CORE

1

2

22U_0805_6.3V6M

+CPU_CORE

1

2

22U_0805_6.3V6M

C13

220U_D2_2VMR15

3

+CPU_CORE

1

+

2

3 x 330uF(9mOhm/3)

C614

@

330U_D2E_2.5VM_R9

South Side Secondary

+CPU_CORE

1

+

2

3 x 330uF(9mOhm/3)

C620
330U_D2E_2.5VM_R9

North Side Secondary

22U_0805_6.3V6M

1

C31

C623

C611

C21

C33

2

22U_0805_6.3V6M

(Place these capacitors on South side,Secondary Layer)

22U_0805_6.3V6M

1

C618

2

22U_0805_6.3V6M

(Place these capacitors on South side,Secondary Layer)

22U_0805_6.3V6M

1

C607

2

22U_0805_6.3V6M

(Place these capacitors on North side,Secondary Layer)

22U_0805_6.3V6M

1

C19

2

22U_0805_6.3V6M

+CPU-CORE
Decoupling
SPCAP,Polymer

MLCC 0805 X5R

+1.05VS

0.1U_0402_16V4Z

1

1

+

2

C34

2

22U_0805_6.3V6M

1

C35

2

22U_0805_6.3V6M

1

C616

2

22U_0805_6.3V6M

1

C29

2

22U_0805_6.3V6M

1

C622

2

(Place these capacitors on North side,Secondary Layer)

C,uF ESR, mohm ESL,nH
6X330uF 9m ohm/6 1.8nH/6

32X22uF 3m ohm/32 0.6nH/32

0.1U_0402_16V4Z

1

1

C36

C38

2

2

0.1U_0402_16V4Z

1

+

C609
330U_D2E_2.5VM_R9

2

1

+

C608

@

330U_D2E_2.5VM_R9

2

1

C32

2

22U_0805_6.3V6M

1

C613

2

22U_0805_6.3V6M

1

C27

2

22U_0805_6.3V6M

1

C617

2

22U_0805_6.3V6M

0.1U_0402_16V4Z

1

C37

2

0.1U_0402_16V4Z

22U_0805_6.3V6M

1

C30

2

22U_0805_6.3V6M

1

C22

2

22U_0805_6.3V6M

1

C25

2

22U_0805_6.3V6M

1

C615

2

1

C16

2

1

+

C621
330U_D2E_2.5VM_R9

2

1

+

C619
330U_D2E_2.5VM_R9

2

1

C28

2

22U_0805_6.3V6M

1

C20

2

1

C23

2

1

C612

2

22U_0805_6.3V6M

0.1U_0402_16V4Z

1

C18

2

0.1U_0402_16V4Z

1

C17

@

2

22U_0805_6.3V6M

1

C26

2

22U_0805_6.3V6M

1

C610

2

1

C15

@

2

0.1U_0402_16V4Z

2

+CPU_CORE

1

C24

2

1

C606

2

JP18C

AE18

VCC

AE17

VCC

AB15

VCC

AA15

VCC

AD15

VCC

AC15

VCC

AF15

VCC

AE15

VCC

AB14

VCC

AA13

VCC

AD14

VCC

AC13

VCC

AF14

VCC

AE13

VCC

AB12

VCC

AA12

VCC

AD12

VCC

AC12

VCC

AF12

VCC

AE12

VCC

AB10

VCC

AB9

VCC

AA10

VCC

AA9

VCC

AD10

VCC

AD9

VCC

AC10

VCC

AC9

VCC

AF10

VCC

AF9

VCC

AE10

POWER, GROUND

VCC

AE9

VCC

AB7

VCC

AA7

VCC

AD7

VCC

AC7

VCC

B20

VCC

A20

VCC

F20

VCC

E20

VCC

B18

VCC

B17

VCC

A18

VCC

A17

VCC

D18

VCC

D17

VCC

C18

VCC

C17

VCC

F18

VCC

F17

VCC

E18

VCC

E17

VCC

B15

VCC

A15

VCC

D15

VCC

C15

VCC

F15

VCC

E15

VCC

B14

VCC

A13

VCC

D14

VCC

C13

VCC

F14

VCC

E13

VCC

B12

VCC

A12

VCC

D12

VCC

C12

VCC

F12

VCC

E12

VCC

B10

VCC

B9

VCC

A10

VCC

A9

VCC

D10

VCC

D9

VCC

C10

VCC

C9

VCC

F10

VCC

F9

VCC

E10

VCC

E9

VCC

B7

VCC

A7

VCC

F7

VCC

FOX_PZ47903-2741-42_YONAH

YONAH

1

K1

VSS

J2

VSS

M2

VSS

N1

VSS

T1

VSS

R2

VSS

V2

VSS

W1

VSS

A26

VSS

D26

VSS

C25

VSS

F25

VSS

B24

VSS

A23

VSS

D23

VSS

E24

VSS

B21

VSS

C22

VSS

F22

VSS

E21

VSS

B19

VSS

A19

VSS

D19

VSS

C19

VSS

F19

VSS

E19

VSS

B16

VSS

A16

VSS

D16

VSS

C16

VSS

F16

VSS

E16

VSS

B13

VSS

A14

VSS

D13

VSS

C14

VSS

F13

VSS

E14

VSS

B11

VSS

A11

VSS

D11

VSS

C11

VSS

F11

VSS

E11

VSS

B8

VSS

A8

VSS

D8

VSS

C8

VSS

F8

VSS

E8

VSS

G26

VSS

K26

VSS

J25

VSS

M25

VSS

N26

VSS

T26

VSS

R25

VSS

V25

VSS

W26

VSS

H24

VSS

G23

VSS

K23

VSS

L24

VSS

P24

VSS

N23

VSS

T23

VSS

U24

VSS

Y24

VSS

W23

VSS

H21

VSS

J22

VSS

M22

VSS

L21

VSS

P21

VSS

R22

VSS

V22

VSS

U21

VSS

Y21

VSS

A A

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

2

Date: Sheet

Compal Electronics, Inc.

Yonah (2/2)

HBL50 LA-2921P

1

0.3

of

559Friday, November 11, 2005

5

945GM(A-3)(QK56)[QS]: SA0000059D0(ABO!)
945PM(A-3)(QK58)[QS]: SA00000KD70(ABO!)

4

3

2

1

H_D#[0..63]4

D D

C C

+1.05VS

R532

R530

B B

A A

1 2

54.9_0402_1%

1 2

54.9_0402_1%

R531

24.9_0402_1%

+1.05VS

R60

1 2

12

R53

12

100_0402_1%

200_0603_1%

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_VREF
H_XRCOMP
H_XSCOMP
H_YRCOMP
H_YSCOMP
H_SWNG0
H_SWNG1

12

R529

24.9_0402_1%

Layout Note:
H_XRCOMP / H_YRCOMP / H_VREF / H_SWNG0 /
H_SWNG1 trace width and spacing is 10/20.

H_VREF

1

C66

2

0.1U_0402_16V4Z

5

U40A

F1

HD0#

J1

HD1#

H1

HD2#

J6

HD3#

H3

HD4#

K2

HD5#

G1

HD6#

G2

HD7#

K9

HD8#

K1

HD9#

K7

HD10#

J8

HD11#

H4

HD12#

J3

HD13#

K11

HD14#

G4

HD15#

T10

HD16#

W11

HD17#

T3

HD18#

U7

HD19#

U9

HD20#

U11

HD21#

T11

HD22#

W9

HD23#

T1

HD24#

T8

HD25#

T4

HD26#

W7

HD27#

U5

HD28#

T9

HD29#

W6

HD30#

T5

HD31#

AB7

HD32#

AA9

HD33#

W4

HD34#

W3

HD35#

Y3

HD36#

Y7

HD37#

W5

HD38#

Y10

HD39#

AB8

HD40#

W2

HD41#

AA4

HD42#

AA7

HD43#

AA2

HD44#

AA6

HD45#

AA10

HD46#

Y8

HD47#

AA1

HD48#

AB4

HD49#

AC9

HD50#

AB11

HD51#

AC11

HD52#

AB3

HD53#

AC2

HD54#

AD1

HD55#

AD9

HD56#

AC1

HD57#

AD7

HD58#

AC6

HD59#

AB5

HD60#

AD10

HD61#

AD4

HD62#

AC8

HD63#

J13

HVREF0

K13

HVREF1

E1

HXRCOMP

E2

HXSCOMP

Y1

HYRCOMP

U1

HYSCOMP

E4

HXSWING

W1

HYSWING

CALISTOGA_FCBGA1466~D

PM@

H9

HA3#

C9

HA4#

E11

HA5#

G11

HA6#

F11

HA7#

G12

HA8#

F9

HA9#

H11

HA10#

J12

HA11#

G14

HA12#

D9

HA13#

J14

HA14#

H13

HA15#

J15

HA16#

F14

HA17#

D12

HA18#

A11

HA19#

C11

HA20#

A12

HA21#

A13

HA22#

E13

HA23#

G13

HA24#

F12

HA25#

B12

HA26#

B14

HA27#

C12

HA28#

A14

HA29#

C14

HA30#

D14

HA31#

D8

HREQ#0

G8

HREQ#1

B8

HREQ#2

F8

HREQ#3

A8

HREQ#4

B9

HADSTB#0

C13

HADSTB#1

HCLKN
HCLKP

HDSTBN#0
HDSTBN#1
HDSTBN#2
HDSTBN#3
HDSTBP#0
HDSTBP#1
HDSTBP#2
HDSTBP#3

HDINV#0
HDINV#1
HDINV#2
HDINV#3

HCPURST#

HADS#

HTRDY#

HDPWR#

HDRDY#

HDEFER#

HHITM#

HHIT#

HLOCK#

HBREQ0#

HBNR#

HBPRI#

HDBSY#

HCPUSLP#

HRS0#
HRS1#
HRS2#

12

R528

R44

1 2

AG1
AG2

K4
T7
Y5
AC4
K3
T6
AA5
AC5

J7
W8
U3
AB10

B7
E8
E7
J9
H8
C3
D4
D3
B3
C7
C6
F6
A7
E3

B4
E6
D6

221_0603_1%

100_0402_1%

HOST

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_ADSTB#0
H_ADSTB#1

CLK_MCH_BCLK#
CLK_MCH_BCLK

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_RESET#
H_ADS#
H_TRDY#
H_DPWR#
H_DRDY#
H_DEFER#
H_HITM#
H_HIT#
H_LOCK#
H_BR0#
H_BNR#
H_BPRI#
H_DBSY#
H_CPUSLP#

H_RS#0
H_RS#1
H_RS#2

H_SWNG0

1

C48

2

0.1U_0402_16V4Z

4

H_DSTBN#0 4
H_DSTBN#1 4
H_DSTBN#2 4
H_DSTBN#3 4
H_DSTBP#0 4
H_DSTBP#1 4
H_DSTBP#2 4
H_DSTBP#3 4

+1.05VS+1.05VS

12

R527

R526

1 2

H_A#[3..31] 4

H_REQ#[0..4] 4

H_ADSTB#0 4
H_ADSTB#1 4

CLK_MCH_BCLK# 14
CLK_MCH_BCLK 14

H_DINV#0 4
H_DINV#1 4
H_DINV#2 4
H_DINV#3 4

H_RESET# 4
H_ADS# 4
H_TRDY# 4
H_DPWR# 4
H_DRDY# 4
H_DEFER# 4
H_HITM# 4
H_HIT# 4
H_LOCK# 4
H_BR0# 4
H_BNR# 4
H_BPRI# 4
H_DBSY# 4
H_CPUSLP# 4

H_RS#[0..2] 4

221_0603_1%

H_SWNG1

1

C641

2

100_0402_1%

0.1U_0402_16V4Z

U40B

AE35

DMIRXN0

AF39

DMIRXN1

AG35

DMIRXN2

AH39

DMIRXN3

AC35

DMIRXP0

AE39

DMIRXP1

AF35

DMIRXP2

AG39

DMIRXP3

AE37

DMITXN0

AF41

DMITXN1

AG37

DMITXN2

AH41

DMITXN3

AC37

DMITXP0

AE41

DMITXP1

AF37

DMITXP2

AG41

DMITXP3

AY35

SM_CK0

AR1

SM_CK1

AW7

SM_CK2

AW40

SM_CK3

AW35

SM_CK0#

AT1

SM_CK1#

AY7

SM_CK2#

AY40

SM_CK3#

AU20

SM_CKE0

AT20

SM_CKE1

BA29

SM_CKE2

AY29

SM_CKE3

AW13

SM_CS0#

AW12

SM_CS1#

AY21

SM_CS2#

AW21

SM_CS3#

AL20

SM_OCDCOMP0

AF10

SM_OCDCOMP1

BA13

SM_ODT0

BA12

SM_ODT1

AY20

SM_ODT2

AU21

SM_ODT3

AV9

SM_RCOMPN

AT9

SM_RCOMPP

AK1

SM_VREF0

AK41

SM_VREF1

G28

PM_BMBUSY#

F25

PM_EXTTS0#

H26

PM_EXTTS1#

G6

PM_THERMTRIP#

AH33

PWROK

AH34

RSTIN#

K28

ICH_SYNC#

CALISTOGA_FCBGA1466~D

PM@

Deciphered Date

GMCH_PWROK

PAD
PAD

1

2

C46

0.1U_0402_16V4Z

DMI_ITX_MRX_N0
DMI_ITX_MRX_N1
DMI_ITX_MRX_N2
DMI_ITX_MRX_N3

DMI_ITX_MRX_P0
DMI_ITX_MRX_P1
DMI_ITX_MRX_P2
DMI_ITX_MRX_P3

DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3

DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3

M_OCDOCMP0
M_OCDOCMP1

SMRCOMPN
SMRCOMPP

PM_BMBUSY#
PM_EXTTS#0
PM_EXTTS#1
H_THERMTRIP#
GMCH_PWROK
PLTRST_R#

+1.8V

R577

100_0402_1%

1 2

R578

100_0402_1%

1 2

Compal Secret Data

DMI_ITX_MRX_N028
DMI_ITX_MRX_N128
DMI_ITX_MRX_N228
DMI_ITX_MRX_N328

DMI_ITX_MRX_P028
DMI_ITX_MRX_P128
DMI_ITX_MRX_P228
DMI_ITX_MRX_P328

DMI_MTX_IRX_N028
DMI_MTX_IRX_N128
DMI_MTX_IRX_N228
DMI_MTX_IRX_N328

DMI_MTX_IRX_P028
DMI_MTX_IRX_P128
DMI_MTX_IRX_P228
DMI_MTX_IRX_P328

DDRA_CLK012
DDRA_CLK112
DDRB_CLK013
DDRB_CLK113

DDRA_CLK0#12
DDRA_CLK1#12
DDRB_CLK0#13
DDRB_CLK1#13

DDRA_CKE012
DDRA_CKE112
DDRB_CKE013
DDRB_CKE113

DDRA_SCS#012
DDRA_SCS#112
DDRB_SCS#013
DDRB_SCS#113

T17
T6

DDRA_ODT012
DDRA_ODT112

R47 80.6_0402_1%
R46 80.6_0402_1%

PLT_RST#26,28,31,34,39,40

3

DDRB_ODT013
DDRB_ODT113

1 2
1 2

SMVREF

PM_BMBUSY#28

PM_EXTTS#012,13

H_THERMTRIP#4,27

1 2

R128 100_0402_1%

MCH_ICH_SYNC#26

Layout Note:
SMVREF trace
width and spacing
is 20/20.

SMVREF

2005/06/20 2006/06/20

+1.8V

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DMI

PM_DPRSLPVR28,56

2

DDR MUXING

PM

R127 0_0402_5%@

1 2

R130 0_0402_5%

1 2

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8

CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16

CFG

CFG17
CFG18
CFG19
CFG20

G_CLKP
G_CLKN

D_REF_CLKN
D_REF_CLKP

CLKNC

D_REF_SSCLKN
D_REF_SSCLKP

CLK_REQ#

NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8

NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18

RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED6
RESERVED7
RESERVED8

RESERVED9
RESERVED10
RESERVED11
RESERVED12
RESERVED13

RESERVED

VGATE

SYS_PWROK

1 2

R121 0_0402_5%

Title

Size Document Number Rev

B

Date: Sheet

Description at page10

MCH_CLKSEL0

K16

MCH_CLKSEL1

K18

MCH_CLKSEL2

J18

CFG3

F18
E15
F15
E18
D19
D16
G16
E16
D15
G15
K15
C15
H16
G18
H15
J25
K27
J26

AG33
AF33

A27
A26

C40
D41

H32

A3
A39
A4
A40
AW1
AW41
AY1
BA1
BA2
BA3
BA39
BA40
BA41
C1
AY41
B2
B41
C41
D1

T32
R32
F3
F7
AG11
AF11
H7
J19
A41
A34
D28
D27
A35

VGATE 14,28,56

SYS_PWROK 28,43

PM_EXTTS#0

PM_EXTTS#1

PAD

CFG4

PAD

CFG5
CFG6

PAD

CFG7
CFG8

PAD

CFG9
CFG10

PAD

CFG11
CFG12
CFG13
CFG14

PAD

CFG15

PAD

CFG16
CFG17

PAD

CFG18
CFG19
CFG20

CLK_MCH_3GPLL
CLK_MCH_3GPLL#

CLK_DREF_96M#
CLK_DREF_96M

CLK_DREF_SSC#
CLK_DREF_SSC

MCH_CLKREQ#

10K_0402_5%

1 2

10K_0402_5%@

1 2

R111

R100

2005/09/20

Compal Electronics, Inc.

Calistoga (1/6)

HBL50 LA-2921P

MCH_CLKSEL0 14
MCH_CLKSEL1 14

MCH_CLKSEL2 14

T15
T8

CFG5 10

T14

CFG7 10

T11

CFG9 10

T12

CFG11 10

CFG12 10

CFG13 10

T7
T13

CFG16 10

T9

CFG18 10

CFG19 10

CFG20 10

CLK_MCH_3GPLL 14
CLK_MCH_3GPLL# 14

CLK_DREF_96M# 14
CLK_DREF_96M 14

CLK_DREF_SSC# 14
CLK_DREF_SSC 14

MCH_CLKREQ# 14

+3VS

1

0.3

of

659Friday, November 11, 2005

5

4

3

2

1

DDRA_SDQ[0..63]12

DDRA_SDM0
DDRA_SDM1
DDRA_SDM2
DDRA_SDM3
DDRA_SDM4
DDRA_SDM5
DDRA_SDM6
DDRA_SDM7

DDRA_SDQS0
DDRA_SDQS1
DDRA_SDQS2
DDRA_SDQS3
DDRA_SDQS4
DDRA_SDQS5
DDRA_SDQS6
DDRA_SDQS7

DDRA_SDQS0#
DDRA_SDQS1#
DDRA_SDQS2#
DDRA_SDQS3#
DDRA_SDQS4#
DDRA_SDQS5#
DDRA_SDQS6#
DDRA_SDQS7#

DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12
DDRA_SMA13

SA_RCVENIN#
SA_RCVENOUT#

DDRA_SMA[0..13]12

AU12
AV14
BA20

AJ33

AM35

AL26

AN22

AM14

AL9
AR3
AH4

AK33
AT33
AN28

AM22

AN12

AN8
AP3

AG5

AK32
AU33

AN27
AM21
AM12

AL8
AN3
AH5

AY16
AU14

AW16

BA16
BA17
AU16
AV17
AU17

AW17

AT16
AU13
AT17
AV20
AV12

AY13

AW14

AY14
AK23
AK24

U40D

SA_BS0
SA_BS1
SA_BS2

SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7

SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13

SA_CAS#
SA_RAS#
SA_WE#
SA_RCVENIN#
SA_RCVENOUT#

CALISTOGA_FCBGA1466~D

PM@

D D

DDRA_SBS0#12
DDRA_SBS1#12
DDRA_SBS2#12

DDRA_SDM[0..7]12 DDRB_SDM[0..7]13

DDRA_SDQS012
DDRA_SDQS112
DDRA_SDQS212

C C

B B

DDRA_SDQS312
DDRA_SDQS412
DDRA_SDQS512
DDRA_SDQS612
DDRA_SDQS712

DDRA_SDQS0#12
DDRA_SDQS1#12
DDRA_SDQS2#12
DDRA_SDQS3#12
DDRA_SDQS4#12
DDRA_SDQS5#12
DDRA_SDQS6#12
DDRA_SDQS7#12

DDRA_SCAS#12
DDRA_SRAS#12
DDRA_SWE#12

PAD

T18

PAD

T19

check layout check layout

DDRA_SDQ[0..63]

DDRA_SMA[0..13]

SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8

SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39

DDR SYS MEMORY A

SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63

AJ35
AJ34
AM31
AM33
AJ36
AK35
AJ32
AH31
AN35
AP33
AR31
AP31
AN38
AM36
AM34
AN33
AK26
AL27
AM26
AN24
AK28
AL28
AM24
AP26
AP23
AL22
AP21
AN20
AL23
AP24
AP20
AT21
AR12
AR14
AP13
AP12
AT13
AT12
AL14
AL12
AK9
AN7
AK8
AK7
AP9
AN9
AT5
AL5
AY2
AW2
AP1
AN2
AV2
AT3
AN1
AL2
AG7
AF9
AG4
AF6
AG9
AH6
AF4
AF8

DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63

DDRB_SBS0#13
DDRB_SBS1#13
DDRB_SBS2#13

DDRB_SDQS013
DDRB_SDQS113
DDRB_SDQS213
DDRB_SDQS313
DDRB_SDQS413
DDRB_SDQS513
DDRB_SDQS613
DDRB_SDQS713

DDRB_SDQS0#13
DDRB_SDQS1#13
DDRB_SDQS2#13
DDRB_SDQS3#13
DDRB_SDQS4#13
DDRB_SDQS5#13
DDRB_SDQS6#13
DDRB_SDQS7#13

DDRB_SCAS#13
DDRB_SRAS#13
DDRB_SWE#13

PAD

T10

PAD

T16

DDRB_SDQ[0..63]13

DDRB_SMA[0..13]13

DDRB_SDM0
DDRB_SDM1
DDRB_SDM2
DDRB_SDM3
DDRB_SDM4
DDRB_SDM5
DDRB_SDM6
DDRB_SDM7

DDRB_SDQS0
DDRB_SDQS1
DDRB_SDQS2
DDRB_SDQS3
DDRB_SDQS4
DDRB_SDQS5
DDRB_SDQS6
DDRB_SDQS7

DDRB_SDQS0#
DDRB_SDQS1#
DDRB_SDQS2#
DDRB_SDQS3#
DDRB_SDQS4#
DDRB_SDQS5#
DDRB_SDQS6#
DDRB_SDQS7#

DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12
DDRB_SMA13

SB_RCVENIN#
SB_RCVENOUT#

U40E

AT24

SB_BS0

AV23

SB_BS1

AY28

SB_BS2

AK36

SB_DM0

AR38

SB_DM1

AT36

SB_DM2

BA31

SB_DM3

AL17

SB_DM4

AH8

SB_DM5

BA5

SB_DM6

AN4

SB_DM7

AM39

SB_DQS0

AT39

SB_DQS1

AU35

SB_DQS2

AR29

SB_DQS3

AR16

SB_DQS4

AR10

SB_DQS5

AR7

SB_DQS6

AN5

SB_DQS7

AM40

SB_DQS0#

AU39

SB_DQS1#

AT35

SB_DQS2#

AP29

SB_DQS3#

AP16

SB_DQS4#

AT10

SB_DQS5#

AT7

SB_DQS6#

AP5

SB_DQS7#

AY23

SB_MA0

AW24

SB_MA1

AY24

SB_MA2

AR28

SB_MA3

AT27

SB_MA4

AT28

SB_MA5

AU27

SB_MA6

AV28

SB_MA7

AV27

SB_MA8

AW27

SB_MA9

AV24

SB_MA10

BA27

SB_MA11

AY27

SB_MA12

AR23

SB_MA13

AR24

SB_CAS#

AU23

SB_RAS#

AR27

SB_WE#

AK16

SB_RCVENIN#

AK18

SB_RCVENOUT#

CALISTOGA_FCBGA1466~D

PM@

DDRB_SDQ[0..63]

DDRB_SMA[0..13]

DDR SYS MEMORY B

SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8

SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63

AK39
AJ37
AP39
AR41
AJ38
AK38
AN41
AP41
AT40
AV41
AU38
AV38
AP38
AR40
AW38
AY38
BA38
AV36
AR36
AP36
BA36
AU36
AP35
AP34
AY33
BA33
AT31
AU29
AU31
AW31
AV29
AW29
AM19
AL19
AP14
AN14
AN17
AM16
AP15
AL15
AJ11
AH10
AJ9
AN10
AK13
AH11
AK10
AJ8
BA10
AW10
BA4
AW4
AY10
AY9
AW5
AY5
AV4
AR5
AK4
AK3
AT4
AK5
AJ5
AJ3

DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQ62
DDRB_SDQ63

A A

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

2

Date: Sheet

Compal Electronics, Inc.

Calistoga (2/6)

HBL50 LA-2921P

1

0.3

of

759Friday, November 11, 2005

5

D D

4

3

2

1

U40C

TV_IREF

CRT_IREF

H27

SDVOCTRL_DATA

H28

SDVOCTRL_CLK

B37

LA_DATA0

B34

LA_DATA1

A36

LA_DATA2

C37

LA_DATA#0

B35

LA_DATA#1

A37

LA_DATA#2

F30

LB_DATA0

D29

LB_DATA1

F28

LB_DATA2

G30

LB_DATA#0

D30

LB_DATA#1

F29

LB_DATA#2

A32

LA_CLK

A33

LA_CLK#

E26

LB_CLK

E27

LB_CLK#

D32

LBKLT_CTL

J30

LBKLT_EN

H30

LCTLA_CLK

H29

LCTLB_DATA

G26

LDDC_CLK

G25

LDDC_DATA

F32

LVDD_EN

B38

LIBG

C35

LVBG

C33

LVREFH

C32

LVREFL

A16

TVDAC_A

C18

TVDAC_B

A19

TVDAC_C

J20

TV_IREF

B16

TV_IRTNA

B18

TV_IRTNB

B19

TV_IRTNC

J29

TV_DCONSEL1

K30

TV_DCONSEL0

C26

DDCCLK

C25

DDCDATA

H23

VSYNC

G23

HSYNC

E23

BLUE

D23

BLUE#

C22

GREEN

B22

GREEN#

A21

RED

B21

RED#

J22

CRT_IREF

CALISTOGA_FCBGA1466~D

PM@

EXP_COMPI

EXP_COMPO

EXP_RXN0
EXP_RXN1
EXP_RXN2
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7

LVDS

TV CRT

EXP_RXN8

EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15

EXP_RXP0

EXP_RXP1

EXP_RXP2

EXP_RXP3

EXP_RXP4

EXP_RXP5

EXP_RXP6

EXP_RXP7

EXP_RXP8

EXP_RXP9

EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15

EXP_TXN0

EXP_TXN1

EXP_TXN2

EXP_TXN3

EXP_TXN4

EXP_TXN5

EXP_TXN6

EXP_TXN7

EXP_TXN8

PCI-EXPRESS GRAPHICS

EXP_TXN9

EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15

EXP_TXP0

EXP_TXP1

EXP_TXP2

EXP_TXP3

EXP_TXP4

EXP_TXP5

EXP_TXP6

EXP_TXP7

EXP_TXP8

EXP_TXP9

EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15

SDVO_SDAT25
SDVO_SCLK25

GMCH_TXOUT0+23
GMCH_TXOUT1+23
GMCH_TXOUT2+23

GMCH_TXOUT0-23
GMCH_TXOUT1-23
GMCH_TXOUT2-23

GMCH_TZOUT0+23
GMCH_TZOUT1+23
GMCH_TZOUT2+23

GMCH_TZOUT0-23
GMCH_TZOUT1-23
GMCH_TZOUT2-23

GMCH_TXCLK+23
GMCH_TXCLK-23
GMCH_TZCLK+23

R567 150_0402_1%
R565 150_0402_1%
R564 150_0402_1%

GMCH_LCD_CLK
GMCH_LCD_DATA
LCTLB_DATA
LCTLA_CLK
GMCH_CRT_CLK
GMCH_CRT_DATA

GMCH_TZCLK-23

GMCH_LCD_CLK23

GMCH_LCD_DATA23

GMCH_ENVDD23

12
12
12

LBKLT_EN
LIBG
GMCH_TV_COMPS
GMCH_TV_LUMA
GMCH_TV_CRMA

C C

B B

A A

ENBKL15,40

R108 0_0402_5%GM@

1 2

GMCH_TV_COMPS24
GMCH_TV_LUMA24
GMCH_TV_CRMA24

GMCH_CRT_CLK24
GMCH_CRT_DATA24

GMCH_CRT_VSYNC24
GMCH_CRT_HSYNC24

GMCH_CRT_B24
GMCH_CRT_G24
GMCH_CRT_R24

+3VS

R122 10K_0402_5%

1 2

R104 10K_0402_5%

1 2

R125 10K_0402_5%

1 2

R117 10K_0402_5%

1 2

R107 4.7K_0402_5%

1 2

R94 4.7K_0402_5%

1 2

R109 100K_0402_5%

1 2

R576 1.5K_0402_1%

1 2

R541 150_0402_1%

1 2

R544 150_0402_1%

1 2

R563 150_0402_1%

1 2

LBKLT_EN

GMCH_TV_COMPS
GMCH_TV_LUMA
GMCH_TV_CRMA

GMCH_CRT_CLK
GMCH_CRT_DATA

GMCH_TXOUT0+
GMCH_TXOUT1+
GMCH_TXOUT2+

GMCH_TXOUT0­GMCH_TXOUT1­GMCH_TXOUT2-

GMCH_TZOUT0+
GMCH_TZOUT1+
GMCH_TZOUT2+

GMCH_TZOUT0­GMCH_TZOUT1­GMCH_TZOUT2-

GMCH_TXCLK+
GMCH_TXCLK­GMCH_TZCLK+
GMCH_TZCLK-

LBKLT_EN
LCTLA_CLK
LCTLB_DATA
GMCH_LCD_CLK
GMCH_LCD_DATA
GMCH_ENVDD

LIBG

1 2

R82 4.99K_0402_1%

1 2

R91 255_0402_1%

10mils

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

PEG_COMP

D40
D38

F34
G38
H34
J38
L34
M38
N34
P38
R34
T38
V34
W38
Y34
AA38
AB34
AC38

D34
F38
G34
H38
J34
L38
M34
N38
P34
R38
T34
V38
W34
Y38
AA34
AB38

F36
G40
H36
J40
L36
M40
N36
P40
R36
T40
V36
W40
Y36
AA40
AB36
AC40

D36
F40
G36
H40
J36
L40
M36
N40
P36
R40
T36
V40
W36
Y40
AA36
AB40

10mils

PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_N15

PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_P15

PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N15

PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P15

2005/06/20 2006/06/20

1 2

R138 24.9_0402_1%

C715 0.1U_0402_16V4ZPM@

1 2

C710 0.1U_0402_16V4ZPM@

1 2

C708 0.1U_0402_16V4ZPM@

1 2

C706 0.1U_0402_16V4ZPM@

1 2

C704 0.1U_0402_16V4ZPM@

1 2

C702 0.1U_0402_16V4ZPM@

1 2

C700 0.1U_0402_16V4ZPM@

1 2

C743 0.1U_0402_16V4ZPM@

1 2

C716 0.1U_0402_16V4ZPM@

1 2

C711 0.1U_0402_16V4ZPM@

1 2

C709 0.1U_0402_16V4ZPM@

1 2

C707 0.1U_0402_16V4ZPM@

1 2

C705 0.1U_0402_16V4ZPM@

1 2

C703 0.1U_0402_16V4ZPM@

1 2

C701 0.1U_0402_16V4ZPM@

1 2

C744 0.1U_0402_16V4ZPM@

1 2

PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_P1

PCIE_MTX_GRX_N0
PCIE_MTX_GRX_P0

PCIE_MTX_GRX_N1
PCIE_MTX_GRX_P1

PCIE_MTX_GRX_N2
PCIE_MTX_GRX_P2

PCIE_MTX_GRX_N3
PCIE_MTX_GRX_P3

Compal Secret Data

Deciphered Date

+1.5VS_PCIE

PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]

PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]

C698 0.1U_0402_16V4ZPM@

1 2

C713 0.1U_0402_16V4ZPM@

1 2

C733 0.1U_0402_16V4ZPM@

1 2

C732 0.1U_0402_16V4ZPM@

1 2

C729 0.1U_0402_16V4ZPM@

1 2

C727 0.1U_0402_16V4ZPM@

1 2

C725 0.1U_0402_16V4ZPM@

1 2

C723 0.1U_0402_16V4ZPM@

1 2

C697 0.1U_0402_16V4ZPM@

1 2

C714 0.1U_0402_16V4ZPM@

1 2

C734 0.1U_0402_16V4ZPM@

1 2

C731 0.1U_0402_16V4ZPM@

1 2

C730 0.1U_0402_16V4ZPM@

1 2

C728 0.1U_0402_16V4ZPM@

1 2

C726 0.1U_0402_16V4ZPM@

1 2

C724 0.1U_0402_16V4ZPM@

1 2

C695 0.1U_0402_16V4Z7307@

1 2

C209 0.1U_0402_16V4Z7307@

1 2

C239 0.1U_0402_16V4Z7307@

1 2

C241 0.1U_0402_16V4Z7307@

1 2

C234 0.1U_0402_16V4Z7307@

1 2

2

PCIE_MTX_C_GRX_N[0..15] 15

PCIE_MTX_C_GRX_P[0..15] 15

PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_N2

PCIE_MTX_C_GRX_N3

PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_N15

PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_P15

C696 0.1U_0402_16V4Z7307@

1 2

C216 0.1U_0402_16V4Z7307@

1 2

C240 0.1U_0402_16V4Z7307@

1 2

C242 0.1U_0402_16V4Z7307@

1 2

C235 0.1U_0402_16V4Z7307@

1 2

Title

Size Document Number Rev

B

Date: Sheet

PCIE_GTX_C_MRX_N[0..15] 15
PCIE_GTX_C_MRX_P[0..15] 15

Compal Electronics, Inc.

Calistoga (3/6)

HBL50 LA-2921P

SDVO_INT# 25
SDVO_INT 25

SDVOB_R# 25
SDVOB_R 25

SDVOB_G# 25
SDVOB_G 25

SDVOB_B# 25
SDVOB_B 25

SDVOB_CLK# 25
SDVOB_CLK 25

1

0.3

of

859Friday, November 11, 2005

5

4

3

2

1

D7

RB751V_SOD323@

+1.05VS +2.5VS

+1.5VS +3VS

D D

C C

B B

A A

2 1

D6

RB751V_SOD323@

2 1

220U_D2_2VMR15

C627

1

C630

2

0.22U_0603_16V7K

5

4.7U_0805_10V4Z

C633

R101

10_0402_5%@

1 2

R93

10_0402_5%@

1 2

+2.5VS

+1.05VS

(800mA)

1

+

C629

2

1

1

C67

2

2

2.2U_0805_10V6K

MCH_A6

1

C643

2

0.47U_0603_16V4Z

MCH_D2

1

+1.5VS

C632

MCH_AB1

1

2

0.47U_0603_16V4Z

2

0.22U_0603_16V7K

U40H

AC14

VTT0

AB14

VTT1

W14

VTT2

V14

VTT3

T14

VTT4

R14

VTT5

P14

VTT6

N14

VTT7

M14

VTT8

L14

VTT9

AD13

VTT10

AC13

VTT11

AB13

VTT12

AA13

VTT13

Y13

VTT14

W13

VTT15

V13

VTT16

U13

VTT17

T13

VTT18

R13

VTT19

N13

VTT20

M13

VTT21

L13

VTT22

AB12

VTT23

AA12

VTT24

Y12

VTT25

W12

VTT26

V12

VTT27

U12

VTT28

T12

VTT29

R12

VTT30

P12

VTT31

N12

VTT32

M12

VTT33

L12

VTT34

R11

VTT35

P11

VTT36

N11

VTT37

M11

VTT38

R10

VTT39

P10

VTT40

N10

VTT41

M10

VTT42

P9

VTT43

N9

VTT44

M9

VTT45

R8

VTT46

P8

VTT47

N8

VTT48

M8

VTT49

P7

VTT50

N7

VTT51

M7

VTT52

R6

VTT53

P6

VTT54

M6

VTT55

A6

VTT56

R5

VTT57

P5

VTT58

N5

VTT59

M5

VTT60

P4

VTT61

N4

VTT62

M4

VTT63

R3

VTT64

P3

VTT65

N3

VTT66

M3

VTT67

R2

VTT68

P2

VTT69

M2

VTT70

D2

VTT71

AB1

VTT72

R1

VTT73

P1

VTT74

N1

VTT75

M1

VTT76

AG14

VCCAUX32

AF14

VCCAUX33

AE14

VCCAUX34

Y14

VCCAUX35

AF13

VCCAUX36

AE13

VCCAUX37

AF12

VCCAUX38

AE12

VCCAUX39

AD12

VCCAUX40

CALISTOGA_FCBGA1466~D

PM@

P O W E R

VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2

VCCA_CRTDAC0
VCCA_CRTDAC1

VSSA_CRTDAC2

VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0

VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1

VCCD_HMPLL0
VCCD_HMPLL1

VCCDQ_TVDAC

4

VCC_SYNC

VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6

VCCA_3GPLL

VCCA_3GBG
VSSA_3GBG

VCCA_DPLLA
VCCA_DPLLB

VCCA_HPLL

VCCA_LVDS
VSSA_LVDS

VCCA_MPLL
VCCA_TVBG

VSSA_TVBG

VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2

VCCD_TVDAC

VCCHV0
VCCHV1
VCCHV2

VCCAUX0
VCCAUX1
VCCAUX2
VCCAUX3
VCCAUX4
VCCAUX5
VCCAUX6
VCCAUX7
VCCAUX8

VCCAUX9
VCCAUX10
VCCAUX11
VCCAUX12
VCCAUX13
VCCAUX14
VCCAUX15
VCCAUX16
VCCAUX17
VCCAUX18
VCCAUX19
VCCAUX20
VCCAUX21
VCCAUX22
VCCAUX23
VCCAUX24
VCCAUX25
VCCAUX26
VCCAUX27
VCCAUX28
VCCAUX29
VCCAUX30
VCCAUX31

H22

B30
C30
A30

AB41
AJ41
L41
N41
R41
V41
Y41

AC33
G41
H41

E21
F21
G21

B26
C39
AF1

A38
B39

AF2
H20

G20

E19
F19
C20
D20
E20
F20

AH1
AH2

A28
B28
C28

D21
H19

A23
B23
B25

AK31
AF31
AE31
AC31
AL30
AK30
AJ30
AH30
AG30
AF30
AE30
AD30
AC30
AG29
AF29
AE29
AD29
AC29
AG28
AF28
AE28
AH22
AJ21
AH21
AJ20
AH20
AH19
P19
P16
AH15
P15
AH14

(60mA)

(70mA)

(50mA)
(50mA)
(45mA)

(10mA)

(45mA)

(150mA)

(24mA)

1 2

C117

0.1U_0402_16V4Z

+2.5VS

W=60 mils

(1500mA)

(20mA)

(40mA)

C739

220U_D2_2VMR15

+1.5VS_3GPLL
+2.5VS

(2mA)

+2.5VS_CRTDAC

+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL

+2.5VS

+1.5VS_MPLL
+3VS_TVBG

(120mA)

+3VS_TVDACA
+3VS_TVDACB
+3VS_TVDACC

+1.5VS

+1.5VS_TVDAC

1

C111

2

0.1U_0402_16V4Z

+1.5VS

1

C68

2

+1.5VS_PCIE

1

+

C712

2

1

2

1

2

10U_0805_10V4Z

C118

0.022U_0402_16V7K

R580

0_0805_5%

1

C722

2

10U_0805_10V4Z

L8

MBK1608301YZF_0603

1

C106

2

0.1U_0402_16V4Z

C195

0.01U_0402_16V7K

12

+2.5VS

1

2

12

+1.5VS

+2.5VS

1

2005/09/21

+

C887
220U_D2_4VM

2

1

2

close pin G41

CRTDAC: Route caps within
250mil of Alviso. Route FB
within 3" o f Calistoga

C180

0.1U_0402_16V4Z

+2.5VS

1

C194

2

0.1U_0402_16V4Z

close pin A38

+3VS+3VS_TVBG

R90

0_0603_5%

12

C109

0.1U_0402_16V4Z

2005/06/20 2006/06/20

C127

0.1U_0402_16V4Z

+3VS

1

2

10U_0805_10V4Z

1

1

C108

2

2

0.022U_0402_16V7K

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

PCI-E/MEM/PSB PLL decoupling

1

C141

2

0.1U_0402_16V4Z

+1.5VS_MPLL

45mA Max. 45mA Max.

1

C637

2

0.1U_0402_16V4Z

Compal Secret Data

Deciphered Date

+1.5VS_DPLLA +1.5VS_DPLLB

1

C683

2

0.1U_0402_16V4Z

1

C105

2

1

C93

2

R112
0_0603_5%

12

1

2

R517
0_0603_5%

2

@

12

C139

1

2

10U_0805_10V4Z

C636

10U_0805_10V4Z

L46

MBK1608301YZF_0603

1

+

C687

330U_D2E_2.5VM

2

MBK1608301YZF_0603

1

2

0.022U_0402_16V7K

MBK1608301YZF_0603

1

2

0.022U_0402_16V7K

+1.5VS+1.5VS_3GPLL

1

C140

2

0.1U_0402_16V4Z

12

L7

C92

0.1U_0402_16V4Z

L4

C107

0.1U_0402_16V4Z

+1.5VS_TVDAC +1.5VS

C119

L45

MBK1608301YZF_0603

1

1

+

C196

12

+3VS+3VS_TVDACC

12

1

1

2

2

0.1U_0402_16V4Z

+1.5VS_HPLL

1

C638

2

0.1U_0402_16V4Z

Title

Size Document Number Rev

B

Date: Sheet

C690

330U_D2E_2.5VM

2

2

0.1U_0402_16V4Z

MBK1608301YZF_0603

1

1

C84

2

2

0.022U_0402_16V7K

R568
0_0603_5%

12

C94

@

0.022U_0402_16V7K

R516
0_0603_5%

1

C631

2

10U_0805_10V4Z

Compal Electronics, Inc.

HBL50 LA-2921P

12

+3VS+3VS_TVDACA+3VS+3VS_TVDACB

L5

12

C85

0.1U_0402_16V4Z

1

C672

2

0.1U_0402_16V4Z

12

+1.5VS+1.5VS

Calistoga (4/6)

1

+1.5VS+1.5VS

2005/09/19

1

+

C49
220U_D2_4VM

2

959Friday, November 11, 2005

of

0.3

5

4

3

2

1

Strap Pin Table

CFG[3:17] have internal pull up

+1.05VS

(3500mA)

D D

1

1

1

C42

C639

0.22U_0603_16V7K

C45

10U_0805_10V4Z

C C

220U_D2_2VMR15

220U_D2_2VMR15

B B

C640

2

2

2

1

2

0.22U_0603_16V7K

0.22U_0603_16V7K

1

1

C43

C44

2

2

1U_0603_10V4Z

10U_0805_10V4Z

1

+

C41

2

1

+

C40

@

2

+1.05VS

U40F

AD27

VCC_NCTF0

AC27

VCC_NCTF1

AB27

VCC_NCTF2

AA27

VCC_NCTF3

Y27

VCC_NCTF4

W27

VCC_NCTF5

V27

VCC_NCTF6

U27

VCC_NCTF7

T27

VCC_NCTF8

R27

VCC_NCTF9

AD26

VCC_NCTF10

AC26

VCC_NCTF11

AB26

VCC_NCTF12

AA26

VCC_NCTF13

Y26

VCC_NCTF14

W26

VCC_NCTF15

V26

VCC_NCTF16

U26

VCC_NCTF17

T26

VCC_NCTF18

R26

VCC_NCTF19

AD25

VCC_NCTF20

AC25

VCC_NCTF21

AB25

VCC_NCTF22

AA25

VCC_NCTF23

Y25

VCC_NCTF24

W25

VCC_NCTF25

V25

VCC_NCTF26

U25

VCC_NCTF27

T25

VCC_NCTF28

R25

VCC_NCTF29

AD24

VCC_NCTF30

AC24

VCC_NCTF31

AB24

VCC_NCTF32

AA24

VCC_NCTF33

Y24

VCC_NCTF34

W24

VCC_NCTF35

V24

VCC_NCTF36

U24

VCC_NCTF37

T24

VCC_NCTF38

R24

VCC_NCTF39

AD23

VCC_NCTF40

V23

VCC_NCTF41

U23

VCC_NCTF42

T23

VCC_NCTF43

R23

VCC_NCTF44

AD22

VCC_NCTF45

V22

VCC_NCTF46

U22

VCC_NCTF47

T22

VCC_NCTF48

R22

VCC_NCTF49

AD21

VCC_NCTF50

V21

VCC_NCTF51

U21

VCC_NCTF52

T21

VCC_NCTF53

R21

VCC_NCTF54

AD20

VCC_NCTF55

V20

VCC_NCTF56

U20

VCC_NCTF57

T20

VCC_NCTF58

R20

VCC_NCTF59

AD19

VCC_NCTF60

V19

VCC_NCTF61

U19

VCC_NCTF62

T19

VCC_NCTF63

AD18

VCC_NCTF64

AC18

VCC_NCTF65

AB18

VCC_NCTF66

AA18

VCC_NCTF67

Y18

VCC_NCTF68

W18

VCC_NCTF69

V18

VCC_NCTF70

U18

VCC_NCTF71

T18

VCC_NCTF72

M19

VCC100

L19

VCC101

N18

VCC102

M18

VCC103

L18

VCC104

P17

VCC105

N17

VCC106

M17

VCC107

N16

VCC108

M16

VCC109

L16

VCC110

CALISTOGA_FCBGA1466~D

PM@

VCCAUX_NCTF0
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8

VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36

P O W E R

VCCAUX_NCTF37
VCCAUX_NCTF38
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57

VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8

VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12

VCC_SM100

VCC_SM101

VCC_SM102

VCC_SM103

VCC_SM104

VCC_SM105

VCC_SM106

VCC_SM107

AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
T15
R15

AE27
AE26
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AC17
Y17
U17

AR6
AP6
AN6
AL6
AK6
AJ6
AV1
AJ1

+1.5VS

MCH_AV1
MCH_AJ1

+1.8V

1

1

C635

C634

2

2

0.47U_0603_16V4Z

0.47U_0603_16V4Z

Place near pin AV1 & AJ1

A A

+1.05VS

U40G

AA33

VCC0

W33

VCC1

P33

VCC2

N33

VCC3

L33

VCC4

J33

VCC5

AA32

VCC6

Y32

VCC7

W32

VCC8

V32

VCC9

P32

VCC10

N32

VCC11

M32

VCC12

L32

VCC13

J32

VCC14

AA31

VCC15

W31

VCC16

V31

VCC17

T31

VCC18

R31

VCC19

P31

VCC20

N31

VCC21

M31

VCC22

AA30

VCC23

Y30

VCC24

W30

VCC25

V30

VCC26

U30

VCC27

T30

VCC28

R30

VCC29

P30

VCC30

N30

VCC31

M30

VCC32

L30

VCC33

AA29

VCC34

Y29

VCC35

W29

VCC36

V29

VCC37

U29

VCC38

R29

VCC39

P29

VCC40

M29

VCC41

L29

VCC42

AB28

VCC43

AA28

VCC44

Y28

VCC45

V28

VCC46

U28

VCC47

T28

VCC48

R28

VCC49

P28

VCC50

N28

VCC51

M28

VCC52

L28

VCC53

P27

VCC54

N27

VCC55

M27

VCC56

L27

VCC57

P26

VCC58

N26

VCC59

L26

VCC60

N25

VCC61

M25

VCC62

L25

VCC63

P24

VCC64

N24

VCC65

M24

VCC66

AB23

VCC67

AA23

VCC68

Y23

VCC69

P23

VCC70

N23

VCC71

M23

VCC72

L23

VCC73

AC22

VCC74

AB22

VCC75

Y22

VCC76

W22

VCC77

P22

VCC78

N22

VCC79

M22

VCC80

L22

VCC81

AC21

VCC82

AA21

VCC83

W21

VCC84

N21

VCC85

M21

VCC86

L21

VCC87

AC20

VCC88

AB20

VCC89

Y20

VCC90

W20

VCC91

P20

VCC92

N20

VCC93

M20

VCC94

L20

VCC95

AB19

VCC96

AA19

VCC97

Y19

VCC98

N19

VCC99

CALISTOGA_FCBGA1466~D

PM@

P O W E R

VCC_SM0
VCC_SM1
VCC_SM2
VCC_SM3
VCC_SM4
VCC_SM5
VCC_SM6
VCC_SM7
VCC_SM8

VCC_SM9
VCC_SM10
VCC_SM11
VCC_SM12
VCC_SM13
VCC_SM14
VCC_SM15
VCC_SM16
VCC_SM17
VCC_SM18
VCC_SM19
VCC_SM20
VCC_SM21
VCC_SM22
VCC_SM23
VCC_SM24
VCC_SM25
VCC_SM26
VCC_SM27
VCC_SM28
VCC_SM29
VCC_SM30
VCC_SM31
VCC_SM32
VCC_SM33
VCC_SM34
VCC_SM35
VCC_SM36
VCC_SM37
VCC_SM38
VCC_SM39
VCC_SM40
VCC_SM41
VCC_SM42
VCC_SM43
VCC_SM44
VCC_SM45
VCC_SM46
VCC_SM47
VCC_SM48
VCC_SM49
VCC_SM50
VCC_SM51
VCC_SM52
VCC_SM53
VCC_SM54
VCC_SM55
VCC_SM56
VCC_SM57
VCC_SM58
VCC_SM59
VCC_SM60
VCC_SM61
VCC_SM62
VCC_SM63
VCC_SM64
VCC_SM65
VCC_SM66
VCC_SM67
VCC_SM68
VCC_SM69
VCC_SM70
VCC_SM71
VCC_SM72
VCC_SM73
VCC_SM74
VCC_SM75
VCC_SM76
VCC_SM77
VCC_SM78
VCC_SM79
VCC_SM80
VCC_SM81
VCC_SM82
VCC_SM83
VCC_SM84
VCC_SM85
VCC_SM86
VCC_SM87
VCC_SM88
VCC_SM89
VCC_SM90
VCC_SM91
VCC_SM92
VCC_SM93
VCC_SM94
VCC_SM95
VCC_SM96
VCC_SM97
VCC_SM98
VCC_SM99

AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6

+1.8V

MCH_AT41
MCH_AM41

1

1

C718

C717

2

2

0.47U_0603_16V4Z

0.47U_0603_16V4Z

Place near pin AT41 & AM41

1

1

C75

2

2

0.1U_0402_16V4Z

1

C679

2

0.47U_0603_16V4Z

Place near pin BA23

1

1

C719

C720

C650

2

2

10U_0805_10V4Z

10U_0805_10V4Z

1

2

0.47U_0603_16V4Z

Place near pin BA15

C121

0.1U_0402_16V4Z

1

1

C86

2

2

0.1U_0402_16V4Z

1

+

C735
330U_D2E_2.5VM_R9

2

CFG[2:0]

CFG5

CFG7

CFG9

CFG11

PSB 4X CLK Enable 1 = Calistoga

CFG[13:12]

CFG16

CFG18

C129

0.1U_0402_16V4Z

CFG19

SDVO_CTRLDATA

CFG20

(PCIE/SDVO select)

2005/09/20

CFG[19:18] have internal pull down

011 = 667MT/s FSB
001 = 533MT/s FSB

0 = DMI x 2
1 = DMI x 4

0 = Reserved
1 = Mobile Yonah CPU

0 = Lane Reversal Enable
1 = Normal Operation

(Default)

*

(Default)

*

(Default)

*

0 = Reserved

*

00 = Reserved
01 = XOR Mode Enabled
10 = All Z Mode Enabled
11 = Normal Operation

0 = Dynamic ODT Disabled
1 = Dynamic ODT Enabled (Default)

0 = 1.05V
1 = 1.5V

0 = Normal Operation
1 = DMI Lane Reversal Enable

0 = No SDVO Device Present

*

(Default)

(Default)

1 = SDVO Device Present

0 = Only PCIE or SDVO is
operational.
1 = PCIE/SDVO are operating
simu.

R58 2.2K_0402_5%@

CFG56

R81 2.2K_0402_5%@

CFG76

R67 2.2K_0402_5%@

CFG96

CFG116

CFG126
CFG136
CFG166

CFG186
CFG196
CFG206

R57 2.2K_0402_5%@
R59 2.2K_0402_5%@
R69 2.2K_0402_5%@
R68 2.2K_0402_5%@

R92 1K_0402_5%@
R95 1K_0402_5%@
R118 1K_0402_5%@

*

1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2

*

*

(Default)

(Default)

*

(Default)

*

+3VS

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

2

Date: Sheet

Compal Electronics, Inc.

Calistoga (5/6)

HBL50 LA-2921P

10 59Friday, November 11, 2005

1

0.3

of

5

4

3

2

1

U40I

AC41

VSS0

AA41

VSS1

W41

VSS2

T41

VSS3

P41

VSS4

M41

D D

C C

B B

A A

VSS5

J41

VSS6

F41

VSS7

AV40

VSS8

AP40

VSS9

AN40

VSS10

AK40

VSS11

AJ40

VSS12

AH40

VSS13

AG40

VSS14

AF40

VSS15

AE40

VSS16

B40

VSS17

AY39

VSS18

AW39

VSS19

AV39

VSS20

AR39

VSS21

AN39

VSS22

AJ39

VSS23

AC39

VSS24

AB39

VSS25

AA39

VSS26

Y39

VSS27

W39

VSS28

V39

VSS29

T39

VSS30

R39

VSS31

P39

VSS32

N39

VSS33

M39

VSS34

L39

VSS35

J39

VSS36

H39

VSS37

G39

VSS38

F39

VSS39

D39

VSS40

AT38

VSS41

AM38

VSS42

AH38

VSS43

AG38

VSS44

AF38

VSS45

AE38

VSS46

C38

VSS47

AK37

VSS48

AH37

VSS49

AB37

VSS50

AA37

VSS51

Y37

VSS52

W37

VSS53

V37

VSS54

T37

VSS55

R37

VSS56

P37

VSS57

N37

VSS58

M37

VSS59

L37

VSS60

J37

VSS61

H37

VSS62

G37

VSS63

F37

VSS64

D37

VSS65

AY36

VSS66

AW36

VSS67

AN36

VSS68

AH36

VSS69

AG36

VSS70

AF36

VSS71

AE36

VSS72

AC36

VSS73

C36

VSS74

B36

VSS75

BA35

VSS76

AV35

VSS77

AR35

VSS78

AH35

VSS79

AB35

VSS80

AA35

VSS81

Y35

VSS82

W35

VSS83

V35

VSS84

T35

VSS85

R35

VSS86

P35

VSS87

N35

VSS88

M35

VSS89

L35

VSS90

J35

VSS91

H35

VSS92

G35

VSS93

F35

VSS94

D35

VSS95

AN34

VSS96

AK34

VSS97

AG34

VSS98

AF34

VSS99

CALISTOGA_FCBGA1466~D

PM@

P O W E R

VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199

AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
T33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
AJ31
AG31
AB31
Y31
AB30
E30
AT29
AN29
AB29
T29
N29
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
J28
E28
AP27
AM27
AK27
J27
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23
AT23
AN23
AM23
AH23
AC23
W23
K23
J23
F23
C23
AA22
K22
G22
F22
E22
D22
A22
BA21
AV21
AR21

U40J

AN21

VSS200

AL21

VSS201

AB21

VSS202

Y21

VSS203

P21

VSS204

K21

VSS205

J21

VSS206

H21

VSS207

C21

VSS208

AW20

VSS209

AR20

VSS210

AM20

VSS211

AA20

VSS212

K20

VSS213

B20

VSS214

A20

VSS215

AN19

VSS216

AC19

VSS217

W19

VSS218

K19

VSS219

G19

VSS220

C19

VSS221

AH18

VSS222

P18

VSS223

H18

VSS224

D18

VSS225

A18

VSS226

AY17

VSS227

AR17

VSS228

AP17

VSS229

AM17

VSS230

AK17

VSS231

AV16

VSS232

AN16

VSS233

AL16

VSS234

J16

VSS235

F16

VSS236

C16

VSS237

AN15

VSS238

AM15

VSS239

AK15

VSS240

N15

VSS241

M15

VSS242

L15

VSS243

B15

VSS244

A15

VSS245

BA14

VSS246

AT14

VSS247

AK14

VSS248

AD14

VSS249

AA14

VSS250

U14

VSS251

K14

VSS252

H14

VSS253

E14

VSS254

AV13

VSS255

AR13

VSS256

AN13

VSS257

AM13

VSS258

AL13

VSS259

AG13

VSS260

P13

VSS261

F13

VSS262

D13

VSS265

B13

VSS264

AY12

VSS263

AC12

VSS266

K12

VSS267

H12

VSS268

E12

VSS269

AD11

VSS270

AA11

VSS271

Y11

VSS272

J11

VSS273

D11

VSS274

B11

VSS275

AV10

VSS276

AP10

VSS277

AL10

VSS278

AJ10

VSS279

CALISTOGA_FCBGA1466~D

PM@

P O W E R

VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS286
VSS287
VSS288
VSS289
VSS290
VSS292
VSS291
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS301
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313
VSS314
VSS315
VSS316
VSS317
VSS318
VSS319
VSS320
VSS321
VSS322
VSS323
VSS324
VSS325
VSS326
VSS327
VSS328
VSS329
VSS330
VSS331
VSS332
VSS333
VSS334
VSS335
VSS336
VSS337
VSS338
VSS339
VSS340
VSS341
VSS342
VSS343
VSS344
VSS345
VSS346
VSS347
VSS348
VSS349
VSS350
VSS351
VSS352
VSS353
VSS354
VSS355
VSS356
VSS357
VSS358
VSS359
VSS360

AG10
AC10
W10
U10
BA9
AW9
AR9
AH9
AB9
Y9
R9
G9
E9
A9
AG8
AD8
AA8
U8
K8
C8
BA7
AV7
AP7
AL7
AJ7
AH7
AF7
AC7
R7
G7
D7
AG6
AD6
AB6
Y6
U6
N6
K6
H6
B6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
AJ4
Y4
U4
R4
J4
F4
C4
AY3
AW3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
G3
AT2
AR2
AP2
AK2
AJ2
AD2
AB2
Y2
U2
T2
N2
J2
H2
F2
C2
AL1

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

2

Date: Sheet

Compal Electronics, Inc.

Calistoga (6/6)

HBL50 LA-2921P

11 59Friday, November 11, 2005

1

0.3

of

5

+DIMM_VREF

DDRA_SDQ4 DDRA_SDQ0
DDRA_SDQ1

DDRA_SDQS0#7
DDRA_SDQS07

D D

DDRA_SDQS1#7
DDRA_SDQS17

DDRA_SDQS2#7
DDRA_SDQS27

DDRA_CKE06

C C

DDRA_SBS2#7

DDRA_SBS0#7
DDRA_SWE#7

DDRA_SCAS#7
DDRA_SCS#16

DDRA_ODT16

DDRA_SDQS4#7
DDRA_SDQS47

B B

DDRA_SDQS6#7
DDRA_SDQS67

D_CK_SDATA13,14
D_CK_SCLK13,14

A A

DDRA_SDQS0#
DDRA_SDQS0

DDRA_SDQ2
DDRA_SDQ3

DDRA_SDQ8
DDRA_SDQ14

DDRA_SDQS1#
DDRA_SDQS1

DDRA_SDQ9
DDRA_SDQ15

DDRA_SDQ16
DDRA_SDQ17

DDRA_SDQS2#
DDRA_SDQS2

DDRA_SDQ18
DDRA_SDQ19

DDRA_SDQ29
DDRA_SDQ24 DDRA_SDQ25

DDRA_SDM3

DDRA_SDQ26
DDRA_SDQ27

DDRA_SBS2#
DDRA_SMA12

DDRA_SMA9
DDRA_SMA8

DDRA_SMA5
DDRA_SMA3
DDRA_SMA1

DDRA_SMA10
DDRA_SBS0#
DDRA_SWE#

DDRA_SCAS#
DDRA_SCS#1

DDRA_ODT1
DDRA_SDQ37

DDRA_SDQ36
DDRA_SDQS4#

DDRA_SDQS4
DDRA_SDQ35

DDRA_SDQ32
DDRA_SDQ40

DDRA_SDQ44
DDRA_SDM5
DDRA_SDQ41

DDRA_SDQ46
DDRA_SDQ49

DDRA_SDQ48

DDRA_SDQS6#
DDRA_SDQS6

DDRA_SDQ54
DDRA_SDQ50

DDRA_SDQ61
DDRA_SDM7
DDRA_SDQ59

DDRA_SDQ58
D_CK_SDATA

D_CK_SCLK

+3VS

+1.8V +1.8V

JP22

1
3
5
7
9

11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97

99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

P-TWO_A5692A-A0G16-N

Change PCB F ootprint

VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS

VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD

***

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7

VSS
DQ12
DQ13

VSS

DM1

VSS

CK0

CK0#

VSS
DQ14
DQ15

VSS

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3#

DQS3

VSS
DQ30
DQ31

VSS

NC/CKE1

VDD

NC/A15
NC/A14

VDD

VDD

VDD

RAS#

VDD
ODT0

NC/A13

VDD

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5#

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

CK1

CK1#

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7#

DQS7

VSS
DQ62
DQ63

VSS

SAO

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50

NC

52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90

A11

92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106

BA1

108
110

S0#

112
114
116
118
120

NC

122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

SA1

DIMM0 STD H:9.2mm (BOT)

4

DDRA_SDQ6

DDRA_SDM0
DDRA_SDQ5

DDRA_SDQ7
DDRA_SDQ13

DDRA_SDQ12
DDRA_SDM1

DDRA_SDQ11
DDRA_SDQ10

DDRA_SDQ20
DDRA_SDQ21

DDRA_SDM2
DDRA_SDQ23

DDRA_SDQ22
DDRA_SDQ28

DDRA_SDQS3#
DDRA_SDQS3

DDRA_SDQ31
DDRA_SDQ30

DDRA_CKE1DDRA_CKE0

DDRA_SMA11
DDRA_SMA7
DDRA_SMA6

DDRA_SMA4
DDRA_SMA2
DDRA_SMA0

DDRA_SBS1#
DDRA_SRAS#
DDRA_SCS#0

DDRA_ODT0
DDRA_SMA13

DDRA_SDQ39
DDRA_SDQ38

DDRA_SDM4
DDRA_SDQ34

DDRA_SDQ33
DDRA_SDQ45

DDRA_SDQ43
DDRA_SDQS5#

DDRA_SDQS5
DDRA_SDQ47

DDRA_SDQ42
DDRA_SDQ52

DDRA_SDQ53

DDRA_SDM6
DDRA_SDQ51

DDRA_SDQ55
DDRA_SDQ57DDRA_SDQ60

DDRA_SDQ56
DDRA_SDQS7#

DDRA_SDQS7
DDRA_SDQ62

DDRA_SDQ63

R23 10K_0402_5%

1 2

R21 10K_0402_5%

1 2

R119

DDRA_CLK0 6
DDRA_CLK0# 6

0_0402_5%

1 2

DDRA_CKE1 6

DDRA_SBS1# 7
DDRA_SRAS# 7
DDRA_SCS#0 6

DDRA_ODT0 6

DDRA_CLK1 6
DDRA_CLK1# 6

DDRA_SDQS3# 7
DDRA_SDQS3 7

DDRA_SDQS5# 7
DDRA_SDQS5 7

DDRA_SDQS7# 7
DDRA_SDQS7 7

PM_EXTTS#0 6,13

3

+DIMM_VREF

DDRA_SMA[0..13]7
DDRA_SDQ[0..63]7

DDRA_SDM[0..7]7

DDRA_SBS2#
DDRA_CKE0

RP41 56_0404_4P2R_5%

DDRA_SMA9
DDRA_SMA12

RP39 56_0404_4P2R_5%

DDRA_SMA5
DDRA_SMA8

RP37 56_0404_4P2R_5%

DDRA_SMA1
DDRA_SMA3

RP35 56_0404_4P2R_5%

DDRA_SBS0#
DDRA_SMA10

RP33 56_0404_4P2R_5%

DDRA_SCAS#
DDRA_SWE#

RP31 56_0404_4P2R_5%

DDRA_ODT1
DDRA_SCS#1

RP29 56_0404_4P2R_5%

DDRA_CKE1
DDRA_SMA11

RP12 56_0404_4P2R_5%

DDRA_SMA7
DDRA_SMA6

RP10 56_0404_4P2R_5%

DDRA_SMA4
DDRA_SMA2

RP8 56_0404_4P2R_5%

DDRA_SMA0
DDRA_SBS1#

RP6 56_0404_4P2R_5%

DDRA_SRAS#
DDRA_SCS#0

RP4 56_0404_4P2R_5%

DDRA_ODT0
DDRA_SMA13

RP2 56_0404_4P2R_5%

20mils

1

C281

0.1U_0402_16V4Z

2

DDRA_SMA[0..13]
DDRA_SDQ[0..63]
DDRA_SDM[0..7]

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1

C294

2.2U_0805_10V6K

2

+0.9VS

+1.8V

12

12

R153
1K_0402_1%

R156
1K_0402_1%

2

+1.8V

1

C71

2.2U_0805_10V6K

2

+1.8V

1

C115

0.1U_0402_16V4Z

2

+0.9VS

1

C645

0.1U_0402_16V4Z

2

+0.9VS

1

C671

0.1U_0402_16V4Z

2

+0.9VS

1

C80

0.1U_0402_16V4Z

2

1

1

C53

2.2U_0805_10V6K

2

1

C113

0.1U_0402_16V4Z

2

1

C648

0.1U_0402_16V4Z

2

1

C678

0.1U_0402_16V4Z

2

1

C88

0.1U_0402_16V4Z

2

1

C123

2.2U_0805_10V6K

2

1

C62

0.1U_0402_16V4Z

2

1

C653

0.1U_0402_16V4Z

2

1

C104

0.1U_0402_16V4Z

2

1

C95

0.1U_0402_16V4Z

2

1

C125

2.2U_0805_10V6K

2

1

C63

0.1U_0402_16V4Z

2

1

C660

0.1U_0402_16V4Z

2

1

C69

0.1U_0402_16V4Z

2

1

C54

2.2U_0805_10V6K

2

1

C667

0.1U_0402_16V4Z

2

1

C76

0.1U_0402_16V4Z

2

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

2

Date: Sheet

Compal Electronics, Inc.

DDRII-SODIMM0

HBL50 LA-2921P

1

0.3

of

12 59Friday, November 11, 2005

A

VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS

VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD

***

NC/CKE1

NC/A15
NC/A14

NC/A13

JP21

+DIMM_VREF

DDRB_SDQ0
DDRB_SDQ1

DDRB_SDQS0#7
DDRB_SDQS07

1 1

DDRB_SDQS1#7
DDRB_SDQS17

DDRB_SDQS2#7
DDRB_SDQS27

DDRB_CKE06

2 2

DDRB_SBS2#7

DDRB_SBS0#7
DDRB_SWE#7

DDRB_SCAS#7
DDRB_SCS#16

DDRB_ODT16

DDRB_SDQS4#7
DDRB_SDQS47

3 3

DDRB_SDQS6#7
DDRB_SDQS67

D_CK_SDATA12,14
D_CK_SCLK12,14

4 4

DDRB_SDQS0#
DDRB_SDQS0

DDRB_SDQ2
DDRB_SDQ3

DDRB_SDQ8
DDRB_SDQ9

DDRB_SDQS1#
DDRB_SDQS1

DDRB_SDQ10
DDRB_SDQ11

DDRB_SDQ17

DDRB_SDQS2#
DDRB_SDQS2

DDRB_SDQ18
DDRB_SDQ19

DDRB_SDQ28
DDRB_SDQ25

DDRB_SDM3

DDRB_SDQ30 DDRB_SDQ29
DDRB_SDQ31

DDRB_CKE0

DDRB_SBS2#
DDRB_SMA12

DDRB_SMA9
DDRB_SMA8

DDRB_SMA5
DDRB_SMA3
DDRB_SMA1

DDRB_SMA10
DDRB_SBS0#
DDRB_SWE#

DDRB_SCAS#
DDRB_SCS#1

DDRB_ODT1
DDRB_SDQ32

DDRB_SDQ33
DDRB_SDQS4#

DDRB_SDQS4
DDRB_SDQ34

DDRB_SDQ35
DDRB_SDQ40

DDRB_SDQ41
DDRB_SDM5
DDRB_SDQ42

DDRB_SDQ43
DDRB_SDQ48

DDRB_SDQ49

DDRB_SDQS6#
DDRB_SDQS6

DDRB_SDQ51
DDRB_SDQ50

DDRB_SDQ56

DDRB_SDM7
DDRB_SDQ59

DDRB_SDQ58
D_CK_SDATA

D_CK_SCLK

+3VS

DIMM1 STD H:5.2mm (BOT)

1
3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99

101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

P-TWO_A5652C-A0G16

VSS
DQ4
DQ5

VSS
DM0

VSS
DQ6
DQ7

VSS

DQ12
DQ13

VSS
DM1

VSS

CK0

CK0#

VSS

DQ14
DQ15

VSS

VSS

DQ20
DQ21

VSS
DM2

VSS

DQ22
DQ23

VSS

DQ28
DQ29

VSS

DQS3#

DQS3

VSS

DQ30
DQ31

VSS
VDD

VDD

A11

VDD

VDD

BA1

RAS#

S0#
VDD

ODT0

VDD

VSS

DQ36
DQ37

VSS
DM4

VSS

DQ38
DQ39

VSS

DQ44
DQ45

VSS

DQS5#

DQS5

VSS

DQ46
DQ47

VSS

DQ52
DQ53

VSS

CK1

CK1#

VSS
DM6

VSS

DQ54
DQ55

VSS

DQ60
DQ61

VSS

DQS7#

DQS7

VSS

DQ62
DQ63

VSS
SAO

SA1

+1.8V+1.8V

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50

NC

52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106
108
110
112
114
116
118
120

NC

122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

B

DDRB_SDQ5
DDRB_SDQ4

DDRB_SDM0
DDRB_SDQ6

DDRB_SDQ7
DDRB_SDQ12

DDRB_SDQ13
DDRB_SDM1

DDRB_SDQ14
DDRB_SDQ15

DDRB_SDQ21
DDRB_SDQ16DDRB_SDQ20

R120

DDRB_SDM2
DDRB_SDQ22

DDRB_SDQ23
DDRB_SDQ26

DDRB_SDQ24
DDRB_SDQS3#

DDRB_SDQS3

DDRB_SDQ27
DDRB_CKE1

DDRB_SMA11
DDRB_SMA7
DDRB_SMA6

DDRB_SMA4
DDRB_SMA2
DDRB_SMA0

DDRB_SBS1#
DDRB_SRAS#
DDRB_SCS#0

DDRB_ODT0
DDRB_SMA13

DDRB_SDQ36
DDRB_SDQ37

DDRB_SDM4
DDRB_SDQ39

DDRB_SDQ38
DDRB_SDQ44

DDRB_SDQ45
DDRB_SDQS5#

DDRB_SDQS5
DDRB_SDQ46

DDRB_SDQ47
DDRB_SDQ52

DDRB_SDQ53

DDRB_SDM6
DDRB_SDQ54

DDRB_SDQ55
DDRB_SDQ60

DDRB_SDQ57DDRB_SDQ61
DDRB_SDQS7#

DDRB_SDQS7
DDRB_SDQ62

DDRB_SDQ63

1 2

R24 10K_0402_5%

1 2

R22 10K_0402_5%

1 2

DDRB_CLK1 6
DDRB_CLK1# 6

0_0402_5%

DDRB_SDQS3# 7
DDRB_SDQS3 7

DDRB_CKE1 6

DDRB_SBS1# 7
DDRB_SRAS# 7
DDRB_SCS#0 6

DDRB_ODT0 6

DDRB_SDQS5# 7
DDRB_SDQS5 7

DDRB_CLK0 6
DDRB_CLK0# 6

DDRB_SDQS7# 7
DDRB_SDQS7 7

+3VS

PM_EXTTS#0 6,12

DDRB_SMA[0..13]7

DDRB_SDQ[0..63]7

DDRB_SDM[0..7]7

C

1

C263

2.2U_0805_10V6K

2

DDRB_SBS2#
DDRB_CKE0

DDRB_SMA9
DDRB_SMA12

DDRB_SMA5
DDRB_SMA8

DDRB_SMA1
DDRB_SMA3

DDRB_SBS0#
DDRB_SMA10

DDRB_SCAS#
DDRB_SWE#

DDRB_ODT1
DDRB_SCS#1

DDRB_CKE1
DDRB_SMA11

DDRB_SMA7
DDRB_SMA6

DDRB_SMA4
DDRB_SMA2

DDRB_SMA0
DDRB_SBS1#

DDRB_SRAS#
DDRB_SCS#0

DDRB_ODT0
DDRB_SMA13

1

C276

2

0.1U_0402_16V4Z

DDRB_SMA[0..13]
DDRB_SDQ[0..63]
DDRB_SDM[0..7]

1 4
2 3

RP13 56_0404_4P2R_5%

1 4
2 3

RP11 56_0404_4P2R_5%

1 4
2 3

RP9 56_0404_4P2R_5%

1 4
2 3

RP7 56_0404_4P2R_5%

1 4
2 3

RP5 56_0404_4P2R_5%

1 4
2 3

RP3 56_0404_4P2R_5%

1 4
2 3

RP1 56_0404_4P2R_5%

1 4
2 3

RP40 56_0404_4P2R_5%

1 4
2 3

RP38 56_0404_4P2R_5%

1 4
2 3

RP36 56_0404_4P2R_5%

1 4
2 3

RP34 56_0404_4P2R_5%

1 4
2 3

RP32 56_0404_4P2R_5%

1 4
2 3

RP30 56_0404_4P2R_5%

D

+1.8V+DIMM_VREF

1

1

+

+

C290

C39
150U_D2_6.3VM@

2

330U_D2E_2.5VM_R9

+1.8V

1

C50

2.2U_0805_10V6K

2

+0.9VS

+1.8V

1

C64

2

0.1U_0402_16V4Z

+0.9VS

1

C669

2

0.1U_0402_16V4Z

+0.9VS

1

C662

0.1U_0402_16V4Z

2

+0.9VS

1

C65

0.1U_0402_16V4Z

2

C78

0.1U_0402_16V4Z

2

1

C55

2

2.2U_0805_10V6K

1

C61

0.1U_0402_16V4Z

2

1

C677

0.1U_0402_16V4Z

2

1

C87

2

0.1U_0402_16V4Z

1

C73

2

0.1U_0402_16V4Z

C124

2.2U_0805_10V6K

C114

0.1U_0402_16V4Z

C647

0.1U_0402_16V4Z

C91

0.1U_0402_16V4Z

C77

0.1U_0402_16V4Z

1

C89

2

0.1U_0402_16V4Z

1

2

1

2

1

2

1

2

1

2

1

C79

0.1U_0402_16V4Z

2

1

C126

2

2.2U_0805_10V6K

1

C116

0.1U_0402_16V4Z

2

1

C652

0.1U_0402_16V4Z

2

1

C97

2

0.1U_0402_16V4Z

1

C90

2

0.1U_0402_16V4Z

1

C70

2.2U_0805_10V6K

2

1

C659

2

0.1U_0402_16V4Z

1

C110

0.1U_0402_16V4Z

2

E

1

2

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

D

Date: Sheet

Compal Electronics, Inc.

DDRII-SODIMM1

HBL50 LA-2921P

E

0.3

of

13 59Friday, November 11, 2005

A

FSLC FSLB FSLA CPU

CLKSEL2 CLKSEL1 CLKSEL0

0

0

01

1 1

**SEL_PCI5/REF1
**SEL_PCI6/PCICLK1
**SEL_24M/PCICLK2
**SEL_48M/PCICLK3

MHz

133 100 33.3

1
1

Table : ICS9LPR325

01
CLKREQ3# 33.3MHz PCICLK5
CLKREQ5# 33.3MHz PCICLK6
TESTMODE 24MHz Output
CLKREQ7# 48MHz_1 Output

ITP_EN/PCICLK_F0 SRC pair C P U_ IT P pai r

**SEL_24M/PCICLK2=0=TESTMODE
**SEL_PCI6/PCICLK1=0=CLKREQ5#

+3VS

**SEL_PCI5=1=PCICLK5

1 2

R712 10K_0402_5%

1 2

R619 10K_0402_5%

ITP_EN/PCICLK_F0=0=SRC pair

2 2

1 2

R711 10K_0402_5%

2005/08/31

3 3

ICH_SMBDATA28,34,36,37

2005/08/31

ICH_SMBCLK28,34,36,37

4 4

CLK_PCI4

R621

8.2K_0402_5%

1 2

1 2

R616
1K_0402_5%@

A

CLK_REF

CLK_PCI0

+3VS

2005/10/18

1 2

R620 10K_0402_5%

+3VS

2

G

1 3

D

+3VS

2

G

1 3

D

R623

56_0402_5%@
R622

1K_0402_5%

1 2

1 2

1 2

R615
0_0402_5%

R387

4.7K_0402_5%

1 2

S

Q15
2N7002_SOT23

R386

4.7K_0402_5%

1 2

S

Q14
2N7002_SOT23

SRC
MHz

CLK_ICH_48M28
CLK_SD_48M32

CLK_14M_SIO39

CLK_PCI_SIO39
CLK_PCI_MINI36
CLK_PCI_LAN34

CLK_PCI_PCM32
CLK_PCI_LPC40

CLK_PCI_TPM39

CLK_ICH_14M28

CLK_DREF_96M6

CLK_DREF_96M#6

CLK_PCI_ICH26

CLK_ENABLE#56

CLK_ENABLE#

D_CK_SDATA

D_CK_SCLK

MCH_CLKSEL0 6

B

PCI
MHz

33.3100166

+3VS

+3VS

CPU_BSEL0 5

B

C

1

C432
10U_0805_10V4Z

2

C466

33P_0402_50V8J

1 2

C468

33P_0402_50V8J

1 2

12

Y3

CLK_ICH_48M
CLK_SD_48M CLKSEL0

CLK_14M_SIO

CLK_PCI_SIO
CLK_PCI_MINI
CLK_PCI_LAN

CLK_PCI_PCM

CLK_PCI_TPM
CLK_ICH_14M CLK_REF

CLK_DREF_96M
CLK_DREF_96M#

CLK_PCI_ICH

14.31818MHz_20P_1BX14318BE1A

CLK_ENABLE#

D_CK_SCLK12,13

D_CK_SDATA12,13

2005/10/18

CLK_ENABLE#

1 3

CLKSEL1CLKSEL0 CLKSEL2

1

C444

0.047U_0402_16V7K

2

+CLK_VDD2

1 2

R376 1_0603_5%

1 2

R316 2.2_0603_5%

R288 12_0402_5%

1 2

R307 12_0402_5%

1 2

R349 33_0402_5%

R326 12_0402_5%FIR@
R327 12_0402_5%
R333 33_0402_5%4401@

R338 33_0402_5%
R345 33_0402_5%

R344 12_0402_5%@
R353 33_0402_5%

R306 0_0402_5%
R305 0_0402_5%

R308 33_0402_5%

R657 0_0402_5%

2

D

1 2

R617
0_0402_5%@

12

1 2
1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2

1 2

D_CK_SCLK

D_CK_SDATA

VGATE 6,28,56

G

S

Q38
2N7002_SOT23

+1.05VS+1.05VS +1.05VS

R624

1K_0402_5%@
R625

1K_0402_5%

1 2

1 2

1 2

R618
0_0402_5%

C

+CLK_VDD1

+CLK_VDDREF

+CLK_VDD48

CLK_XTALIN

CLK_XTALOUT

D

R377
0_0805_5%

+CLK_VDDREF+CLK_VDD48

1

C474

0.047U_0402_16V7K

2

15mil
15mil

U19

1
49
54
65

30
36

12
18
40

20

19

41
45
23

34
33
32
27

22

43
44

37

39

9

16

17

4
15
21
31
35
42
68

73
74
75
76

+CLK_VDD1

CLKSEL1
CLKSEL2

CLK_PCI4
CLK_PCI3

CLK_PCI2

CLK_PCI1CLK_PCI_LPC

CLK_DOT
CLK_DOT#

CLK_PCI0

CLKIREF

15mil

G73M: ICS9LPR325CKLFT_MLF72: SA00000RE20

+3VS

VDDSRC
VDDSRC
VDDSRC
VDDSRC

VDDPCI
VDDPCI

VDDCPU
VDDREF
VDD48

X1

X2

USB_48MHz/FSLA
FSLB/TEST_MODE/24Mhz
REF0/FSLC/TEST_SEL

PCICLK4/FCTSEL1
SEL_48M/PCICLK3
SEL_24M/PCICLK2
SEL_PCI6/PCICLK1

SEL_PCI5/REF1

DOTT_96MHz/27MHz_Nonspread
DOTC_96MHz/27MHz_spread

ITP_EN/PCICLK_F0

VTT_PWRGD#/PD

GND

SMBCLK

SMBDAT

GNDSRC
GNDCPU
GNDREF
GNDPCI
GNDPCI
GND48
GNDSRC

THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD

ICS9LPR325AKLFT_MLF72

G72@

1 2

CPUCLKT2_ITP/SRCCLKT10LP

CPUCLKC2_ITP/SRCCLKC10LP

CLKREQ7#/48Mhz_1

CLKREQ5#/PCICLK6

CLKREQ3#/PCICLK5

LCD100/96/SRC0_TLP
LCD100/96/SRC0_CLP

G72M:SLG8LP465VTR: SA00000TS00

R643

8.2K_0402_5%

MCH_CLKSEL1 6

CPU_BSEL1 5

1 2

1 2

R646
0_0402_5%@

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

1

C452
10U_0805_10V4Z

2

VDDA

GNDA

PCI_SRC_STOP#

CPU_STOP#

CPUCLKT1LP
CPUCLKC1LP

CPUCLKT0LP
CPUCLKC0LP

SRCCLKT9LP
SRCCLKC9LP

CLKREQ9#
SRCCLKT8LP
SRCCLKC8LP

CLKREQ8#
SRCCLKT7LP
SRCCLKC7LP

SRCCLKT6LP
SRCCLKC6LP

CLKREQ6#
SRCCLKT5LP
SRCCLKC5LP

SRCCLKT4LP
SRCCLKC4LP

CLKREQ4#
SRCCLKT3LP
SRCCLKC3LP

SRCCLKT2LP
SRCCLKC2LP

CLKREQ2#
SRCCLKT1LP
SRCCLKC1LP

CLKREQ1#

1 2

E

F

40mil

1

C477

0.047U_0402_16V7K

2

20mil

1
7
8

25
24

11
10

14
13

6
5

3
2
72
70
69
71
66
67
38
63
64
62
60
61
29
58
59
57
55
56
28
52
53
26
50
51
46
47
48

R638

1K_0402_5%@
R645

1K_0402_5%

1 2

1 2

R642
0_0402_5%

2005/06/20 2006/06/20

C483
10U_0805_10V4Z

2

PM_STP_PCI#
PM_STP_CPU#

CLK_CPU1

R373 0_0402_5%

CLK_CPU1#

R372 0_0402_5%

CLK_CPU0

R375 0_0402_5%

CLK_CPU0#

R374 0_0402_5%

CLK_SRC9

R371 0_0402_5%EXP@

CLK_SRC9#

R370 0_0402_5%EXP@

R658 10K_0402_5%

CLK_SRC8

R367 0_0402_5%MINI2@

CLK_SRC8# CLK_PCIE_MINI2#

R365 0_0402_5%MINI2@

R659 10K_0402_5%

CLK_SRC6

R355 0_0402_5%

CLK_SRC6#

R361 0_0402_5%

R647 10K_0402_5%

CLK_SRC5

R347 0_0402_5%

CLK_SRC5#

R351 0_0402_5%
R637 10K_0402_5%

CLK_SRC4

R336 0_0402_5%8789@

CLK_SRC4#

R340 0_0402_5%8789@
R640 10K_0402_5%@

CLK_SRC3

R323 0_0402_5%VGA@

CLK_SRC3#

R329 0_0402_5%VGA@

CLK_PCI5

R636 10K_0402_5%@
R334 33_0402_5%1394@

CLK_SRC2

R300 0_0402_5%

CLK_SRC2#

R299 0_0402_5%

R639 10K_0402_5%

CLK_SRC1

R302 0_0402_5%MINI1@

CLK_SRC1#

R301 0_0402_5%MINI1@

R626 10K_0402_5%

CLK_SRC0

R304 0_0402_5%

CLK_SRC0#

R303 0_0402_5%

MCH_CLKSEL2 6

CPU_BSEL2 5

Compal Secret Data

E

+CLK_VCCA

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2

1 2

1 2
1 2

1 2
1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2

1 2

1 2
1 2

1 2

Deciphered Date

1

C443

0.047U_0402_16V7K

2

1

C476

0.047U_0402_16V7K

2

PM_STP_PCI# 28
PM_STP_CPU# 28

12

1 2

R379

2.2_0603_5%

CLK_MCH_BCLK
CLK_MCH_BCLK#

CLK_CPU_BCLK
CLK_CPU_BCLK#

CLK_PCIE_CARD
CLK_PCIE_CARD#

CLK_PCIE_MINI2

CLK_PCIE_SATA
CLK_PCIE_SATA#

CLK_PCIE_ICH
CLK_PCIE_ICH#

CLK_PCIE_LAN
CLK_PCIE_LAN#

CLK_PCIE_VGA
CLK_PCIE_VGA#

CLK_MCH_3GPLL
CLK_MCH_3GPLL#

CLK_PCIE_MINI1
CLK_PCIE_MINI1#

CLK_DREF_SSC
CLK_DREF_SSC#

F

CLK_PCI_1394

1

C469

0.047U_0402_16V7K

2

+CLK_VDD1

0.047U_0402_16V7K

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+CLK_VDD1

1

C475

0.047U_0402_16V7K

2

+CLK_VDD2

40mil

1

C457

0.047U_0402_16V7K

2

CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6

CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4

CLK_PCIE_CARD 37
CLK_PCIE_CARD# 37
EXP_CLKREQ# 37
CLK_PCIE_MINI2 36
CLK_PCIE_MINI2# 36
MINI2_CLKREQ# 36

CLK_PCIE_SATA 27
CLK_PCIE_SATA# 27
SATA_CLKREQ# 28
CLK_PCIE_ICH 28
CLK_PCIE_ICH# 28

CLK_PCIE_LAN 34
CLK_PCIE_LAN# 34

CLK_PCIE_VGA 15
CLK_PCIE_VGA# 15

CLK_PCI_1394 38

CLK_MCH_3GPLL 6
CLK_MCH_3GPLL# 6
MCH_CLKREQ# 6
CLK_PCIE_MINI1 36
CLK_PCIE_MINI1# 36
MINI1_CLKREQ# 36
CLK_DREF_SSC 6
CLK_DREF_SSC# 6

Size Document Number Rev

Date: Sheet

G

Clock Generator

1

C460

10U_0805_10V4Z

2

CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_CPU_BCLK
CLK_CPU_BCLK#

CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_PCIE_MINI2
CLK_PCIE_MINI2#
CLK_PCIE_ICH
CLK_PCIE_ICH#
CLK_PCIE_MINI1
CLK_PCIE_MINI1#
CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_DREF_SSC
CLK_DREF_SSC#
CLK_DREF_96M
CLK_DREF_96M#
CLK_PCIE_CARD
CLK_PCIE_CARD#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
CLK_PCIE_LAN
CLK_PCIE_LAN#

Title

B

Compal Electronics, Inc.

HBL50 LA-2921P

G

R315
0_0805_5%

1 2

1

C440

2

1 2

R383 49.9_0402_1%@

1 2

R382 49.9_0402_1%@

1 2

R385 49.9_0402_1%@

1 2

R384 49.9_0402_1%@

1 2

R322 49.9_0402_1%@

1 2

R328 49.9_0402_1%@

1 2

R366 49.9_0402_1%@

1 2

R364 49.9_0402_1%@

1 2

R346 49.9_0402_1%@

1 2

R350 49.9_0402_1%@

1 2

R283 49.9_0402_1%@

1 2

R282 49.9_0402_1%@

1 2

R354 49.9_0402_1%@

1 2

R360 49.9_0402_1%@

1 2

R285 49.9_0402_1%@

1 2

R284 49.9_0402_1%@

1 2

R287 49.9_0402_1%@

1 2

R286 49.9_0402_1%@

1 2

R381 49.9_0402_1%@

1 2

R380 49.9_0402_1%@

1 2

R281 49.9_0402_1%@

1 2

R280 49.9_0402_1%@

1 2

R335 49.9_0402_1%@

1 2

R339 49.9_0402_1%@

Clock Generator

H

+3VS

0.3

of

14 59Friday, November 11, 2005

H

5

4

3

2

1

PCIE_MTX_C_GRX_P0

PCIE_MTX_C_GRX_N[0..15]8
PCIE_MTX_C_GRX_P[0..15]8
PCIE_GTX_C_MRX_N[0..15]8
PCIE_GTX_C_MRX_P[0..15]8

D D

PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N3

C C

PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N4 PCIE_GTX_MRX_N4
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N15

B B

C663

VGA@

A A

18P_0402_50V8J

PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]

C183 0.1U_0402_16V4ZVGA@

C191 0.1U_0402_16V4ZVGA@
C204 0.1U_0402_16V4ZVGA@
C214 0.1U_0402_16V4ZVGA@
C225 0.1U_0402_16V4ZVGA@
C236 0.1U_0402_16V4ZVGA@
C250 0.1U_0402_16V4ZVGA@
C256 0.1U_0402_16V4ZVGA@
C264 0.1U_0402_16V4ZVGA@
C274 0.1U_0402_16V4ZVGA@
C278 0.1U_0402_16V4ZVGA@
C282 0.1U_0402_16V4ZVGA@
C291 0.1U_0402_16V4ZVGA@
C295 0.1U_0402_16V4ZVGA@
C299 0.1U_0402_16V4ZVGA@
C308 0.1U_0402_16V4ZVGA@
C316 0.1U_0402_16V4ZVGA@

1

2

1 2

1 2

C193 0.1U_0402_16V4ZVGA@

1 2

1 2

C208 0.1U_0402_16V4ZVGA@

1 2

1 2

C217 0.1U_0402_16V4ZVGA@

1 2

1 2

C226 0.1U_0402_16V4ZVGA@

1 2

1 2

C244 0.1U_0402_16V4ZVGA@

1 2

1 2

C251 0.1U_0402_16V4ZVGA@

1 2

1 2

C257 0.1U_0402_16V4ZVGA@

1 2

1 2

C265 0.1U_0402_16V4ZVGA@

1 2

1 2

C275 0.1U_0402_16V4ZVGA@

1 2

1 2

C279 0.1U_0402_16V4ZVGA@

1 2

1 2

C283 0.1U_0402_16V4ZVGA@

1 2

1 2

C292 0.1U_0402_16V4ZVGA@

1 2

1 2

C297 0.1U_0402_16V4ZVGA@

1 2

1 2

C300 0.1U_0402_16V4ZVGA@

1 2

1 2

C310 0.1U_0402_16V4ZVGA@

1 2

1 2

CLK_PCIE_VGA14
CLK_PCIE_VGA#14

PLTRST_VGA#26

+3VS

Y5

4

OUT

GND

1

GND

IN

27MHZ_16PF_X7S027000BG1H-U

VGA@

2005/09/23

5

C686
C682

3
2

PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15

PCIE_GTX_MRX_P0
PCIE_GTX_MRX_N0
PCIE_GTX_MRX_P1
PCIE_GTX_MRX_N1
PCIE_GTX_MRX_P2
PCIE_GTX_MRX_N2
PCIE_GTX_MRX_P3
PCIE_GTX_MRX_N3
PCIE_GTX_MRX_P4

PCIE_GTX_MRX_P5
PCIE_GTX_MRX_N5
PCIE_GTX_MRX_P6
PCIE_GTX_MRX_N6
PCIE_GTX_MRX_P7
PCIE_GTX_MRX_N7
PCIE_GTX_MRX_P8
PCIE_GTX_MRX_N8
PCIE_GTX_MRX_P9
PCIE_GTX_MRX_N9
PCIE_GTX_MRX_P10
PCIE_GTX_MRX_N10
PCIE_GTX_MRX_P11
PCIE_GTX_MRX_N11
PCIE_GTX_MRX_P12
PCIE_GTX_MRX_N12
PCIE_GTX_MRX_P13
PCIE_GTX_MRX_N13
PCIE_GTX_MRX_P14
PCIE_GTX_MRX_N14
PCIE_GTX_MRX_P15
PCIE_GTX_MRX_N15

CLK_PCIE_VGA
CLK_PCIE_VGA#

PLTRST_VGA#

R579 10K_0402_5%VGA@

1 2

R99 10K_0402_5%VGA@

1 2

R574 10K_0402_5%VGA@

1 2

R573 10K_0402_5%@

1 2

R572 10K_0402_5%@

1 2

R575 10K_0402_5%VGA@

1 2

IFPAB_VPROBE

1 2

0.01U_0402_16V7K@

IFPCD_VPROBE

1 2

0.01U_0402_16V7K@

XTALIN
XTALOUT

1

C664

VGA@

18P_0402_50V8J

2

If Spread spectrum not stuff than stuff resistor

R538

12

R540

10K_0402_5%@

AK13
AK14
AM14
AM15

AL15

AL16
AK16
AK17

AL17

AL18
AM18
AM19
AK19
AK20

AL20

AL21
AM21
AM22
AK22
AK23

AL23

AL24
AM24
AM25
AK25
AK26

AL26

AL27
AM27
AM28

AL28

AL29

AJ15
AK15
AH16
AG16
AG17
AH17
AG18
AH18
AK18

AJ18

AJ19
AH19
AG20
AH20
AG21
AH21
AK21

AJ21

AJ22
AH22
AG23
AH23
AK24

AJ24

AJ25
AH25
AH26
AG26
AK27

AJ27

AJ28
AH27

AH14

AJ14
AH15

AM12
AM11

AJ11
AK12

AL12
AK11

AL13

AM4

1 2

U42A

PEX_RX0
PEX_RX0_N
PEX_RX1
PEX_RX1_N
PEX_RX2
PEX_RX2_N
PEX_RX3
PEX_RX3_N
PEX_RX4
PEX_RX4_N
PEX_RX5
PEX_RX5_N
PEX_RX6
PEX_RX6_N
PEX_RX7
PEX_RX7_N
PEX_RX8
PEX_RX8_N
PEX_RX9
PEX_RX9_N
PEX_RX10
PEX_RX10_N
PEX_RX11
PEX_RX11_N
PEX_RX12
PEX_RX12_N
PEX_RX13
PEX_RX13_N
PEX_RX14
PEX_RX14_N
PEX_RX15
PEX_RX15_N

PEX_TX0
PEX_TX0_N
PEX_TX1
PEX_TX1_N
PEX_TX2
PEX_TX2_N
PEX_TX3
PEX_TX3_N
PEX_TX4
PEX_TX4_N
PEX_TX5
PEX_TX5_N
PEX_TX6
PEX_TX6_N
PEX_TX7
PEX_TX7_N
PEX_TX8
PEX_TX8_N
PEX_TX9
PEX_TX9_N
PEX_TX10
PEX_TX10_N
PEX_TX11
PEX_TX11_N
PEX_TX12
PEX_TX12_N
PEX_TX13
PEX_TX13_N
PEX_TX14
PEX_TX14_N
PEX_TX15
PEX_TX15_N

PEX_REFCLK
PEX_REFCLK_N

PEX_RST_N

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT_N

A26

TESTMEMCLK

H2

TESTMODE
JTAG_TCK

JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_N

IFPAB_VPROBE

AK3

IFPCD_VPROBE

U1

XTALIN

U2

XTALOUT

T2

XTALOUTBUFF

T1

XTALSSIN

NV43M_BGA820 G73@

OSC_SPREAD

22_0402_5%VGA@

OSC_OUT

12

R537

10K_0402_5%@

4

Part 1 of 6

PCI EXPRESS

TEST

CLK

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO11
GPIO12

MIOAD0
MIOAD1
MIOAD2
MIOAD3
MIOAD4
MIOAD5
MIOAD6
MIOAD7
MIOAD8

MIOAD9
MIOAD10
MIOAD11

MIOA_HSYNC
MIOA_VSYNC

DVO / GPIO

MIOA_DE

MIOA_CTL3

MIOA_CLKIN

MIOA_CLKOUT

MIOA_CLKOUT_N

MIOA_VREF

MIOBD0

MIOBD1

MIOBD2

MIOBD3

MIOBD4

MIOBD5

MIOBD6

MIOBD7

MIOBD8

MIOBD9
MIOBD10
MIOBD11

MIOB_HSYNC
MIOB_VSYNC

MIOB_DE

MIOB_CTL3

MIOB_CLKIN

MIOB_CLKOUT

MIOB_CLKOUT_N

MIOB_VREF

DACA_HSYNC
DACA_VSYNC

DACA_RED

DACA_BLUE

DACA_GREEN

DACA_IDUMP

DACA_RSET
DACA_VREF

DACC_HSYNC
DACC_VSYNC

DACC_RED

DACC_BLUE

DACC_GREEN

DACsI2C

DACC_IDUMP

DACC_RSET
DACC_VREF

DACB_RED

DACB_BLUE

DACB_GREEN

DACB_IDUMP

DACB_RSET
DACB_VREF

I2CA_SCL
I2CA_SDA
I2CB_SCL
I2CB_SDA
I2CC_SCL

I2CC_SDA

I2CH_SCL

I2CH_SDA

DVI_DET

K3
H1

NV_INVTPWM

K5

ENVDD

G5

ENBKL

E2
J5
G6
K6

THER_ALERT#

E1
D2
H5
F4
E3

P2
N2
N1
N3
M1
M3
P5
N6
N5
M4
L4
L5

R3
R1
P1
P3

M5
R4
P4

L2
AC3

AC1
AC2
AB2
AB1
AA1
AB3
AA3
AC5
AB5
AB4
AA5

AF3
AE3
AD1
AD3

AE4
AD4
AD5

Y2
AF10

AK10
AH11
AH12
AJ12
AG9
AH9

AH10
AG7

AG5
AF6
AE5
AG6
AG4
AF5

AH4
R6

T6
T5
V7
R7

R5
K2

J3
H4
J4
G2
G1
G3
H3

R78 2K_0402_5%

PEX_PLL_TERM
SUB_VENDOR

PEX_CFG0
PEX_CFG1

PEX_CFG2

1 2

R562 2K_0402_5%VGA@

1 2

R543 2K_0402_5%@

R96 10K_0402_5%

R61 10K_0402_5%VGA@

DACAVREF

RAM_CFG0
RAM_CFG1
CRYSTAL_0
PCI_DEVID2
PCI_DEVID0
PCI_DEVID1
CRYSTAL_1
MOBILE_MODE
RAM_CFG2
RAM_CFG3

PCI_DEVID3

VGA_CRT_HSYNC
VGA_CRT_ VSYNC
VGA_CRT_R
VGA_CRT_B
VGA_CRT_G

DACA_RSET

1 2

C155 0.01U_0402_16V7K

VGA@

VGA_TV_CRMA
VGA_TV_COMPS
VGA_TV_LUMA

DACB_RSET
DACBVREF

VGA_DDC_CLK
VGA_DDC_DATA
VGA_DVI_SCLK
VGA_DVI_SDATA
I2CC_SCL
I2CC_SDA

VGA@

NVidia suggestion

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DVI_DET 25

PAD

T20

ENVDD 23
ENBKL 8,40
POWER_SEL 57

1 2

VGA@

PEX_PLL_TERM 18
SUB_VENDOR 18

PEX_CFG0 18
PEX_CFG1 18

PEX_CFG2 18

12

RAM_CFG0 18
RAM_CFG1 18
CRYSTAL_0 18
PCI_DEVID2 18
PCI_DEVID0 18
PCI_DEVID1 18
CRYSTAL_1 18
MOBILE_MODE 18
RAM_CFG2 18
RAM_CFG3 18

PCI_DEVID3 18

12

VGA_CRT_HSYNC 24
VGA_CRT_VSYNC 24
VGA_CRT_R 24
VGA_CRT_B 24

R571 124_0603_1%

R114 124_0603_1%

VGA_CRT_G 24

1 2

VGA@

VGA_TV_CRMA 24
VGA_TV_COMPS 24
VGA_TV_LUMA 24

1 2
VGA@

C130 0.1U_0402_16V4Z

1 2

VGA@

VGA_DDC_CLK 24
VGA_DDC_DATA 24
VGA_DVI_SCLK 25
VGA_DVI_SDATA 25
I2CC_SCL 23
I2CC_SDA 23

I2CC_SDA

R556 4.7K_0402_5%VGA@
R555 4.7K_0402_5%VGA@

2005/06/20 2006/06/20

3

+3VS

+3VS

1 2
1 2

LVDSAC+23

LVDSAC-23
LVDSA0+23

LVDSA0-23

LVDSA1+23

LVDSA1-23

LVDSA2+23

LVDSA2-23

LVDSBC+23

LVDSBC-23
LVDSB0+23

LVDSB0-23

LVDSB1+23

LVDSB1-23

LVDSB2+23

LVDSB2-23

R570 1K_0402_5%@

1 2

VGA_DVI_TXC+25

VGA_DVI_TXC-25

VGA_DVI_TXD0+25

VGA_DVI_TXD0-25

VGA_DVI_TXD1+25

VGA_DVI_TXD1-25

VGA_DVI_TXD2+25

VGA_DVI_TXD2-25

R569 1K_0402_5%@

1 2

VGA_TV_LUMA
VGA_TV_CRMA
VGA_TV_COMPS

VGA_CRT_R
VGA_CRT_G
VGA_CRT_B

Compal Secret Data

Deciphered Date

LVDSAC+
LVDSAC­LVDSA0+
LVDSA0­LVDSA1+
LVDSA1­LVDSA2+
LVDSA2-

LVDSBC+
LVDSBC­LVDSB0+
LVDSB0­LVDSB1+
LVDSB1­LVDSB2+
LVDSB2-

VGA_DVI_TXC+
VGA_DVI_TXC­VGA_DVI_TXD0+
VGA_DVI_TXD0­VGA_DVI_TXD1+
VGA_DVI_TXD1­VGA_DVI_TXD2+
VGA_DVI_TXD2-

VGA termination, close chip

R97 150_0402_1%VGA@

1 2

R102 150_0402_1%VGA@

1 2

R113 150_0402_1%VGA@

1 2

R126 150_0402_1%VGA@

1 2

R131 150_0402_1%VGA@

1 2

R124 150_0402_1%VGA@

1 2

+3VS

AK9
AJ9

AH6

AJ6
AH8
AH7

AJ8
AK8

AJ5
AH5
AK4
AL4
AM6
AM5
AM7
AL7
AK6
AK5
AK7
AL8

AL5
AM2

AM3
AE2
AE1
AF1
AF2
AG1
AH1
AG3
AH2
AK1

AJ1
AL2
AL1

AJ2

AJ3
AH3

C665

0.1U_0402_16V4Z

2

U42D

IFPA_TXC
IFPA_TXC_N
IFPA_TXD0
IFPA_TXD0_N
IFPA_TXD1
IFPA_TXD1_N
IFPA_TXD2
IFPA_TXD2_N
IFPA_TXD3
IFPA_TXD3_N
IFPB_TXC
IFPB_TXC_N
IFPB_TXD4
IFPB_TXD4_N
IFPB_TXD5
IFPB_TXD5_N
IFPB_TXD6
IFPB_TXD6_N
IFPB_TXD7
IFPB_TXD7_N

IFPAB_RSET
IFPC_TXC

IFPC_TXC_N
IFPC_TXD0
IFPC_TXD0_N
IFPC_TXD1
IFPC_TXD1_N
IFPC_TXD2
IFPC_TXD2_N
IFPD_TXC
IFPD_TXC_N
IFPD_TXD4
IFPD_TXD4_N
IFPD_TXD5
IFPD_TXD5_N
IFPD_TXD6
IFPD_TXD6_N

IFPCD_RSET

NV43M_BGA820

G73@

VGA@

12

D+

1

C666
2200P_0402_50V7K

D-I2CC_SCL

2

@

Close to Sensor

Part 4 of 6

NC

LVDS/TMDS

MEMSTRAPSEL0
MEMSTRAPSEL1
MEMSTRAPSEL2
MEMSTRAPSEL3

SWAPRDY_A

GENERAL

SERIAL

+3VS

Spread spectrum

C60 0.1U_0402_16V4Z

1 2

VGA@

U3

7

REF

OSC_OUT OSC_SPREAD

+3VS

12

VDD

1

MODOUT

XIN

8

XOUT

NC

2

PD#

VSS

ASM3P1819N-SR_SO8

VGA@

Thermal sensor

R554
200_0402_5%

VGA@

I2C address
1001 101x

U38

1

VCC

SMBCLK

2

DXP

SMBDATA

3

ALERT

DXN
THERM4GND

G781-1_SOP8

VGA@

Title

Size Document Number Rev

B

Date: Sheet

B32

NC_0

C20

NC_1

D1

NC_2

J6

NC_3

U3

NC_4

U4

NC_5

U5

NC_6

U6

NC_7

V1

NC_8

V3

NC_9

V4

NC_10

V5

NC_11

V6

NC_12

W1

NC_13

W3

NC_14

W4

NC_15

W5

NC_16

Y5

NC_17

Y6

NC_18

Y30

NC_19

AC26

NC_20

AG12

NC_21

AH13

NC_22

AM8

NC_23

AM9

NC_24

AM10

NC_25

F3

BUFRST_N

AE26
AD26
AH31
AH32
T3

STEREO

F1

STRAP

M6
J1

THERMDN

K1

THERMDP

AA7

ROM_SCLK

W2

ROM_SI

AA6

ROM_SO

AA4

ROMCS_N

5

VGA@

4

1 2

R64 22_0402_5%

3
6

8
7

THER_ALERT#

6
5

Compal Electronics, Inc.

G72/G73 Main

HBL50 LA-2921P

FAE recommand 6/29

D­D+

EC_SMB_CK1 40,41,45,53
EC_SMB_DA1 40,41,45,53

1

0.3

of

15 59Friday, November 11, 2005

5

4

3

2

1

FBAD[0..63]

D D

AD29
AE29
AD28
AC28
AB29
AA30

AB30

AM30

AF30

AJ31
AJ30
AJ32

AK29

AM31

AL30
AE32
AE30
AE31
AD30
AC31
AC32
AB32
AB31
AG27
AF28
AH28
AG28
AG29
AD27
AF27
AE28

N27

M27

N28
L29
K27
K28

J29

J28
P30
N31
N30
N32
L31
L30

J30
L32
H30
K30
H31
F30
H32
E31
D30
E30
H28
H29
E29

J27
F27
E27
E28
F28

Y28

U42B

FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63

NV43M_BGA820

G73@

FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15

C C

B B

FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33 FBADQM#5
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63

FBAA[0..12]

FBBA[2..5]

FBADQS[0..7]

FBADQS#[0..7] FBCDQS#[0..7]

FBADQM#[0..7]

Part 2 of 6

MEMORY INTERFACE A

FBA_REFCLK_N

FBAD[0..63] 19,20

FBAA[0..12] 19,20

FBBA[2..5] 20

FBADQS[0..7] 19,20

FBADQS#[0..7] 19,20 FBCDQS#[0..7] 21,22

FBADQM#[0..7] 19,20

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8

FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26

FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7

FBADQS_RN0
FBADQS_RN1
FBADQS_RN2
FBADQS_RN3
FBADQS_RN4
FBADQS_RN5
FBADQS_RN6
FBADQS_RN7

FBADQS_WP0
FBADQS_WP1
FBADQS_WP2
FBADQS_WP3
FBADQS_WP4
FBADQS_WP5
FBADQS_WP6
FBADQS_WP7

FB_VREF1
FBA_CLK0

FBA_CLK0_N

FBA_CLK1
FBA_CLK1_N
FBA_REFCLK

FBA_DEBUG

FBAA3

P32

FBAA0

U27

FBAA2

P31

FBAA1

U30

FBBA3

Y31

FBBA4

W32

FBBA5

W31

FBACS1#

T32

FBACS0#

V27

FBAWE# FBCWE#

T28

FBA_BA0

T31

FBA_CKE

U32

AODT0 FBAODT0

W29

FBBA2

W30

FBAA12 FBCA12

T27

FBARAS#

V28

FBAA11

V30

FBAA10

U31

FBA_BA1

R27

FBAA8

V29

FBAA9

T30

FBAA6

W28

FBAA5

R29

FBAA7

R30

FBAA4

P29

FBACAS#

U28
Y32

FBADQM#0

M29

FBADQM#1

M30

FBADQM#2

G30

FBADQM#3

F29

FBADQM#4

AA29
AK30

FBADQM#6

AC30

FBADQM#7

AG30

FBADQS#0

M28

FBADQS#1

K32

FBADQS#2

G31

FBADQS#3

G27

FBADQS#4

AA28

FBADQS#5

AL31

FBADQS#6

AF31

FBADQS#7

AH29

FBADQS0

L28

FBADQS1

K31

FBADQS2

G32

FBADQS3

G28

FBADQS4

AB28

FBADQS5

AL32

FBADQS6

AF32

FBADQS7

AH30

FB_VREF1

E32
P28

R28
Y27
AA27
D32
D31

FBA_DEBUG FBC_DEBUG

AC27

R183

PAD

FBACS0# 19,20
FBAWE# 19,20
FBA_BA0 19,20

1 2

FBARAS# 19,20

FBA_BA1 19,20

FBACAS# 19,20

FBACLK0 19
FBACLK0# 19
FBACLK1 20
FBACLK1# 20

PAD

T24

0_0402_5%64@

T23

C752

VGA@

0.1U_0402_16V4Z

1

2

12

R185
10K_0402_5%

VGA@

+1.8VS

12

12

FBA_CKE 19,20

R587
1K_0402_1%

VGA@

R588
1K_0402_1%

VGA@

FBCD0
FBCD1
FBCD2
FBCD3
FBCD4
FBCD5
FBCD6
FBCD7
FBCD8
FBCD9
FBCD10
FBCD11
FBCD12
FBCD13
FBCD14
FBCD15
FBCD16
FBCD17
FBCD18
FBCD19
FBCD20
FBCD21
FBCD22
FBCD23
FBCD24
FBCD25
FBCD26
FBCD27
FBCD28
FBCD29
FBCD30
FBCD31
FBCD32
FBCD33
FBCD34

FBCD36
FBCD37
FBCD38
FBCD39
FBCD40
FBCD41
FBCD42
FBCD43
FBCD44
FBCD45
FBCD46
FBCD47
FBCD48
FBCD49
FBCD50
FBCD51
FBCD52
FBCD53
FBCD54
FBCD55
FBCD56
FBCD57
FBCD58
FBCD59
FBCD60
FBCD61
FBCD62
FBCD63

B7
A7

C7

A2
B2

C4

A5
B5
F9

F10

D12

D9
E12
D11

E8

D8

E7

F7
D6
D5
D3

E4
C3

B4

C10
B10

C8

A10
C11
C12
A11
B11
B28
C27
C26
B26
C30
B31
C29
A31
D28
D27
F26
D24
E23
E26
E24
F23
B23
A23
C25
C23
A22
C22
C21
B22
E22
D22
D21
E21
E18
D19
D18
E19

FB_VREF1=0.5 x FBVDD

U42C

FBCD0
FBCD1
FBCD2
FBCD3
FBCD4
FBCD5
FBCD6
FBCD7
FBCD8
FBCD9
FBCD10
FBCD11
FBCD12
FBCD13
FBCD14
FBCD15
FBCD16
FBCD17
FBCD18
FBCD19
FBCD20
FBCD21
FBCD22
FBCD23
FBCD24
FBCD25
FBCD26
FBCD27
FBCD28
FBCD29
FBCD30
FBCD31
FBCD32
FBCD33
FBCD34
FBCD35
FBCD36
FBCD37
FBCD38
FBCD39
FBCD40
FBCD41
FBCD42
FBCD43
FBCD44
FBCD45
FBCD46
FBCD47
FBCD48
FBCD49
FBCD50
FBCD51
FBCD52
FBCD53
FBCD54
FBCD55
FBCD56
FBCD57
FBCD58
FBCD59
FBCD60
FBCD61
FBCD62
FBCD63

NV43M_BGA820

G73@

FBCD[0..63]

FBCA[0..12]

FBDA[2..5]

FBCDQS[0..7]

FBCDQM#[0..7]

Part 3 of 6

MEMORY INTERFACE B

FBCD[0..63] 21,22

FBCA[0..12] 21,22

FBDA[2..5] 22

FBCDQS[0..7] 21,22

FBCDQM#[0..7] 21,22

FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8

FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26

FBCDQM0
FBCDQM1
FBCDQM2
FBCDQM3
FBCDQM4
FBCDQM5
FBCDQM6
FBCDQM7

FBCDQS_RN0
FBCDQS_RN1
FBCDQS_RN2
FBCDQS_RN3
FBCDQS_RN4
FBCDQS_RN5
FBCDQS_RN6
FBCDQS_RN7

FBCDQS_WP0
FBCDQS_WP1
FBCDQS_WP2
FBCDQS_WP3
FBCDQS_WP4
FBCDQS_WP5
FBCDQS_WP6
FBCDQS_WP7

FB_VREF2
FBC_CLK0

FBC_CLK0_N

FBC_CLK1

FBC_CLK1_N

FBC_REFCLK

FBC_REFCLK_N

FBC_DEBUG

FBCA3

C13

FBCA0

A16

FBCA2

A13

FBCA1

B17

FBDA3

B20

FBDA4

A19

FBDA5

B19

FBCCS1#

B14

FBCCS0#

E16
A14

FBC_BA0

C15

FBC_CKE

B16
F17

FBDA2

C19
D15

FBCRAS#

C17

FBCA11

A17

FBCA10

C16

FBC_BA1

D14

FBCA8

F16

FBCA9

C14

FBCA6

C18

FBCA5

E14

FBCA7

B13

FBCA4

E15

FBCCAS#

F15
A20

FBCDQM#0

A4

FBCDQM#1

E11

FBCDQM#2

F5

FBCDQM#3

C9

FBCDQM#4

C28

FBCDQM#5

F24

FBCDQM#6

C24

FBCDQM#7FBCD35

E20

FBCDQS#0

C6

FBCDQS#1

E9

FBCDQS#2

E6

FBCDQS#3

A8

FBCDQS#4

B29

FBCDQS#5

E25

FBCDQS#6

A25

FBCDQS#7

F21

FBCDQS0

C5

FBCDQS1

E10

FBCDQS2

E5

FBCDQS3

B8

FBCDQS4

A29

FBCDQS5

D25

FBCDQS6

B25

FBCDQS7

F20

FB_VREF2

A28
E13

F13
F18
E17
B1
C1
F12

R140

PAD

FBCCS0# 21,22
FBCWE# 21,22
FBC_BA0 21,22

1 2

FBCRAS# 21,22

FBC_BA1 21,22

FBCCAS# 21,22

FBCCLK0 21
FBCCLK0# 21
FBCCLK1 22
FBCCLK1# 22

PAD

T22

FBCODT0CODT0

0_0402_5%256@

T21

FBCODT0 21,22FBAODT0 19,20

15mil15mil

C736

@

0.1U_0402_16V4Z

1

2

12

R136
10K_0402_5%

256@

+1.8VS

FBC_CKE 21,22

12

R582
1K_0402_1%

@

12

R581
1K_0402_1%

@

FB_VREF2=0.5 x FB VDD

FBAODT0

12

R186

A A

5

10K_0402_5%

VGA@

4

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

FBCODT0

12

R139
10K_0402_5%

VGA@

Title

Size Document Number Rev

B

2

Date: Sheet

Compal Electronics, Inc.

G72/G73 Memory

HBL50 LA-2921P

1

0.3

of

16 59Friday, November 11, 2005

5

L13

+1.2VS

MBK1608121YZF_0603

VGA@

1 2

2.2U_0603_6.3V6K

D D

+2.5VS

2.2U_0603_6.3V6K

+2.5VS

2.2U_0603_6.3V6K

+1.2VS

C C

2.2U_0603_6.3V6K

B B

+3VS

A A

1

C82

VGA@

2

L11
MBK1608121YZF_0603

VGA@

1 2

C172

VGA@

L47
MBK1608121YZF_0603

VGA@

1 2

C693

VGA@

L16
MBK1608121YZF_0603

VGA@

1 2

C222

VGA@

L10

+1.2VS

MBK1608121YZF_0603

VGA@

1 2

VGA@

2.2U_0603_6.3V6K

L9
MBK1608121YZF_0603

VGA@

1 2

VGA@

2.2U_0603_6.3V6K

L6
MBK1608121YZF_0603

VGA@

1 2

VGA@

2.2U_0603_6.3V6K

1

C162

VGA@

2

4700P_0402_25V7K

1

C137

VGA@

2

4700P_0402_25V7K

1

C150

VGA@

2

1

C259

VGA@

2

4700P_0402_25V7K

1

C177

VGA@

2

4700P_0402_25V7K

1

C134

VGA@

2

4700P_0402_25V7K

1

C72

VGA@

2

5

NV_PLLVDD

8mA

0.1U_0402_16V4Z

VID_PLLVDD

1

1

C151

VGA@

2

2

470P_0402_50V7K

PLLVDD

1

1

C149

VGA@

2

2

470P_0402_50V7K

FBA_PLLAVDD

1

2

FBC_PLLAVDD

1

C147

2

4700P_0402_25V7K

1

C153

C154

VGA@

2

470P_0402_50V7K

1

C131

C133

VGA@

2

470P_0402_50V7K

40mA

30mA

DACA_VDD

1

2

DACB_VDD

1

2

+VGA_CORE

10U_0805_10V4Z

C203

VGA@

4700P_0402_25V7K

C223

VGA@

+3VS

1U_0603_10V4Z

+1.8VS

1

C98

VGA@

2

4.7U_0805_10V4Z

330U_D2E_2.5VM

0.1U_0402_16V4Z

1

1

C184

C174

VGA@

VGA@

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C224

C211

VGA@

VGA@

2

2

0.1U_0402_16V4Z

4700P_0402_25V7K

1

C189

VGA@

2

4700P_0402_25V7K

C178

VGA@

10U_0805_10V4Z

4700P_0402_25V7K

1

C143

C132

VGA@

VGA@

2

4700P_0402_25V7K

1

C661

C156

VGA@

VGA@

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C144

C148

VGA@

VGA@

2

0.1U_0402_16V4Z

+VGA_CORE +1.8VS

C253

VGA@

Average to place around +VGA_CORE
plane.

1

C175

VGA@

2

0.1U_0402_16V4Z

1

C181

VGA@

2

0.1U_0402_16V4Z

4700P_0402_25V7K

1

C202

VGA@

2

470P_0402_50V7K

1

C163

VGA@

2

1

C157

VGA@

2

0.022U_0402_16V7K

0.1U_0402_16V4Z

1

C164

VGA@

2

0.01U_0402_16V7K

1

C230

VGA@

2

1

+

2

4

0.1U_0402_16V4Z

1

C185

VGA@

2

0.1U_0402_16V4Z

1

C190

VGA@

2

1

C219

VGA@

2

4700P_0402_25V7K

1

C161

VGA@

2

470P_0402_50V7K

0.022U_0402_16V7K

1

C165

VGA@

2

1

2

1

C252

VGA@

2

0.01U_0402_16V7K

2005/10/20

1

C96

+

VGA@

330U_D2E_2.5VM

2

4

1

C218

VGA@

2

0.1U_0402_16V4Z

1

C182

VGA@

2

0.1U_0402_16V4Z

1

C201

VGA@

2

470P_0402_50V7K

1

C210

VGA@

2

1

C145

VGA@

2

0.022U_0402_16V7K

+1.8VS

0.01U_0402_16V7K

1

C187

VGA@

2

1

2

1

2

1

2

0.022U_0402_16V7K

1

C138

VGA@

2

VID_PLLVDD
PLLVDD

FBA_PLLAVDD
FBC_PLLAVDD

R152

1 2

1

1

C200

VGA@

2

2

0.01U_0402_16V7K

1

+

C362

VGA@

330U_D2E_2.5VM

2

1

2

NV_PLLVDD

40mA
30mA

30mA
30mA

40.2_0402_1%VGA@

3

1420mA

U42E

K16
K17
N13
N14
N16
N17
N19
N20
P13
P14
P16
P17
P19
R16
R17
T13
T14
T15
T18
T19
U13
U14
U15
U19
V16
V17

W13
W14
W16
W17
W19

Y13
Y14
Y16
Y17
Y19
Y20

U18

P20
T20
T23
U20
U23

W20

H7

J7
K7
L7
L8

L10

M10
AC11
AC12
AC24
AD24
AE11
AE12

T10

T9

G25

G10

G23

G8

K26

H16

H17

J9
J10
J23
J24

K9
K11
K12
K21
K22
K24
L23

M23

T25

U25
AA23
AB23

F6

2005/09/21

1

+

C529

VGA@

330U_D2E_2.5VM

2

VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16
VDD_17
VDD_18
VDD_19
VDD_20
VDD_21
VDD_22
VDD_23
VDD_24
VDD_25
VDD_26
VDD_27
VDD_28
VDD_29
VDD_30
VDD_31
VDD_32
VDD_33
VDD_34
VDD_35
VDD_36
VDD_37

VDD_LP_0
VDD_LP_1
VDD_LP_2
VDD_LP_3
VDD_LP_4
VDD_LP_5

VDD33_0
VDD33_1
VDD33_2
VDD33_3
VDD33_4
VDD33_5
VDD33_6
VDD33_7
VDD33_8
VDD33_9
VDD33_10
VDD33_11
VDD33_12

VID_PLLVDD
PLLVDD

FBA_PLLAVDD
FBC_PLLAVDD
FBA_PLLVDD
FBC_PLLVDD
FBCAL_PD_VDDQ

FBVTT_0
FBVTT_1
FBVTT_2
FBVTT_3
FBVTT_4
FBVTT_5
FBVTT_6
FBVTT_7
FBVTT_8
FBVTT_9
FBVTT_10
FBVTT_11
FBVTT_12
FBVTT_13
FBVTT_14
FBVTT_15
FBVTT_16
FBVTT_17

CLAMP

NV43M_BGA820

G73@

Part 5 of 6

PEX_IOVDD_0
PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
PEX_IOVDD_5

PEX_IOVDDQ_0
PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8
PEX_IOVDDQ_9

PEX_IOVDDQ_10

PEX_PLLAVDD
PEX_PLLDVDD

MIOA_VDDQ_0
MIOA_VDDQ_1
MIOA_VDDQ_2
MIOA_VDDQ_3
MIOA_VDDQ_4
MIOB_VDDQ_0
MIOB_VDDQ_1
MIOB_VDDQ_2
MIOB_VDDQ_3

MIOB_VDDQ_4
MIOACAL_PD_VDDQ
MIOBCAL_PD_VDDQ

IFPA_IOVDD
IFPB_IOVDD
IFPC_IOVDD
IFPD_IOVDD

IFPAB_PLLVDD

IFPCD_PLLVDD

POWER

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

AD23
AF23
AF24
AF25
AG24
AG25

AC16
AC17
AC21
AC22
AE18
AE21
AE22
AF12
AF18
AF21
AF22

+PEX_PLLAVDD

AF15

+PEX_PLLDVDD

AE15
M7

M8
R8
T8
U9
AA8
AB7

0.1U_0402_16V4Z

AB8
AC6
AC7
L1
Y1

IFPA_IOVDD

130mA

AF9

130mA

AF8

150mA

AD6

IFPD_IOVDD

150mA

AE7

35mA

AC9

35mA

AA10

135mA

AD10

DACA_VDD
DACB_VDD
DACC_VDD

FBVDD_0
FBVDD_1
FBVDD_2
FBVDD_3
FBVDD_4
FBVDD_5
FBVDD_6
FBVDD_7
FBVDD_8

FBVDD_9
FBVDD_10
FBVDD_11
FBVDD_12
FBVDD_13
FBVDD_14
FBVDD_15
FBVDD_16
FBVDD_17
FBVDD_18
FBVDD_19

FBVDDQ_0
FBVDDQ_1
FBVDDQ_2
FBVDDQ_3
FBVDDQ_4
FBVDDQ_5
FBVDDQ_6
FBVDDQ_7
FBVDDQ_8

FBVDDQ_9
FBVDDQ_10
FBVDDQ_11
FBVDDQ_12
FBVDDQ_13
FBVDDQ_14
FBVDDQ_15
FBVDDQ_16
FBVDDQ_17
FBVDDQ_18
FBVDDQ_19
FBVDDQ_20
FBVDDQ_21
FBVDDQ_22
FBVDDQ_23

2005/06/20 2006/06/20

200mA

V8

200mA

AD7
A3

A6
A9
A12
A15
A18
A21
A24
A27
A30
C32
F32
J32
M32
R32
V32
AA32
AD32
AG32
AK32

G11
G12
G15
G18
G21
G22
H11
H12
H15
H18
H21
L25
L26
M25
M26
R25
R26
V25
V26
AA25
AA26
AB25
AB26
H22

Compal Secret Data

0.022U_0402_16V7K

1

C249

VGA@

2

0.022U_0402_16V7K

0.01U_0402_16V7K

1

C255

VGA@

2

0.01U_0402_16V7K

+3VS

0.1U_0402_16V4Z

1

C136

C135

VGA@

VGA@

2

1 2

IFPAB_CD_PLLVDD

DACA_VDD
DACB_VDD
DACC_VDD

12

R110
10K_0402_5%

VGA@

4700P_0402_25V7K

1

C271

C212

VGA@

VGA@

2

4700P_0402_25V7K

0.022U_0402_16V7K

1

C213

C221

VGA@

VGA@

2

0.022U_0402_16V7K

Deciphered Date

C243

VGA@

C228

VGA@

100mA
20mA

1

2

R103 10K_0402_5%VGA@

470P_0402_50V7K

1

C229

VGA@

2

0.022U_0402_16V7K

1

C248

VGA@

2

0.01U_0402_16V7K

1

2

470P_0402_50V7K

+3VSDVI

4700P_0402_25V7K

1

C152

VGA@

2

4700P_0402_25V7K

1

1

C220

VGA@

2

2

1

1

C247

VGA@

2

2

0.1U_0402_16V4Z

2

1

2

1

2

4700P_0402_25V7K

C81

VGA@

VGA@

4700P_0402_25V7K

0.1U_0402_16V4Z

2

0.022U_0402_16V7K

1

C266

C238

VGA@

2

0.01U_0402_16V7K

1

C260

C254

VGA@

VGA@

2

0.01U_0402_16V7K

1

C142

VGA@

2

1

C146

VGA@

2

4700P_0402_25V7K

1

C261

C237

VGA@

2

1

C227

C199

VGA@

VGA@

2

0.1U_0402_16V4Z

1

0.022U_0402_16V7KVGA@

2

0.01U_0402_16V7K

1

C262

VGA@

2

L3

VGA@

1 2

MBK1608121YZF_0603

1

C74

VGA@

2

2.2U_0603_6.3V6K

L12

VGA@

1 2

MBK1608121YZF_0603

1

C692

VGA@

2

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

1

1

C267

VGA@

2

2

0.022U_0402_16V7K

0.1U_0402_16V4Z

1

1

C198

VGA@

2

2

1

+1.2VS

10U_0805_10V4Z

1

1

C56

VGA@

2

10U_0805_10V4Z

+1.8VS

+2.5VS

C649

VGA@

2

VDD_PWRGOOD57

1

VGA@

2

1

C57

C52

VGA@

VGA@

2

10U_0805_10V4Z

1

C197

VGA@

2

0.1U_0402_16V4Z

1

C179

VGA@

2

0.1U_0402_16V4Z

+3VSDVI +3VS

1

C658

2

4700P_0402_25V7K

1

2

L15

VGA@

1 2

MBK1608121YZF_0603

1

C192

VGA@

2

2.2U_0603_6.3V6K
L14

VGA@

1 2

MBK1608121YZF_0603

1

C83

VGA@

2

2.2U_0603_6.3V6K

+5VS

R536
10K_0402_5%

VGA@

1 2

0.1U_0402_16V4Z@

1 2

C646

2

G

1 3

D

S

Q30

AO3402_SOT23

VGA@

L44

1 2

@

MBK1608121YZF_0603

+1.2VS

For NV43 DVI leakage issue

C332

VGA@

+1.8VS

1

2

of

17 59Friday, November 11, 2005

1

0.022U_0402_16V7K
C270

VGA@

C186

VGA@

0.1U_0402_16V4Z

Title

Size Document Number Rev

B

Date: Sheet

4.7U_0805_10V4Z

1

1

1

2

1

2

C334

C272

VGA@

VGA@

2

0.022U_0402_16V7K

0.1U_0402_16V4Z

1

C269

C268

VGA@

VGA@

2

0.1U_0402_16V4Z

2

4.7U_0805_10V4Z

1

2

Compal Electronics, Inc.

G72/G73 Power

HBL50 LA-2921P

0.3

5

4

3

2

1

G73M

STRAPS PIN DESCRIPTION

CRYSTAL[1:0] 10

ROM_TYPE[1:0]

SUB_VENDOR

MIOBD[6,2]

MIOBD
[11:10]

MIOAD1

PEX_PLL_TERM MIOAD0

PEX_CFG[2:0]

RAM_CFG[3:0]

MIOAD
[9,8,6]

MIOAD[5:2]

VIPD[5:3]PCI_DEVID[3:0]

MOBILE_MODE MIOBD7 For NV44M/G7x

+3VS

10K_0402_5%

12

R55

X76@

12

R56

X76@

10K_0402_5%

10K_0402_5%

10K_0402_5%

12

12

R539

X76@

12

12

R553

X76@

10K_0402_5%

10K_0402_5%

R51

X76@

R52

X76@

10K_0402_5%

12

12

Vendor
Samsung
Hynix
Infineon

+3VS

+3VS

RAM_CFG0
RAM_CFG1
RAM_CFG2
RAM_CFG3
PCI_DEVID0
PCI_DEVID1
PCI_DEVID2
PCI_DEVID3
PEX_CFG0
PEX_CFG1
PEX_CFG2
PEX_PLL_TERM

R553, R55
R539, R55
R553, R56

U42F

B3

GND_0

B6

GND_1

B9

GND_2

B12

GND_3

B15

GND_4

B18

D D

C C

B B

B21
B24
B27
B30

C2

C31

D4

D7
D10
D13
D17
D20
D23
D26
D29

F2

F8
F11
F14
F19
F22
F25
F31

G4

G7
G26
G29
H27

H6

J2
J16
J17
J31
K10
K23
K29

K4

L6
L27

M2
M12
M21
M31

N4
N15
N18
N29

P6
P15
P18
P27

R2
R13
R14
R15
R18
R19
R20
R31

T4
T16
T17
T24
T29

U8
U16
U17
U24
U29

V2
V13
V14
V15
V18
V19
V20
V31

W6

GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83

NV43M_BGA820

G73@

Part 6 of 6

GND

MIOACAL_PU_GND
MIOBCAL_PU_GND

FBCAL_TERM_GND

IFPAB_PLLGND
IFPCD_PLLGND

PEX_PLLGND

FBA_PLLGND
FBC_PLLGND

FBCAL_PU_GND

GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
GND_95
GND_96
GND_97
GND_98

GND_99
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154

PLLGND

W18
Y4
Y15
Y18
Y29
AA2
AA12
AA21
AA31
AB6
AB27
AC4
AC10
AC23
AC29
AD2
AD16
AD17
AD31
AE6
AE17
AE27
AF4
AF7
AF11
AF26
AF29
AG2
AG8
AG10
AG11
AG13
AG14
AG15
AG19
AG22
AG31
AH24
AJ4
AJ7
AJ10
AJ13
AJ16
AJ17
AJ20
AJ23
AJ26
AJ29
AK2
AL3
AL6
AL9
AL10
AK28
AK31
AL11
AL14
AL19
AL22
AL25
AM13
AM16
AM17
AM20
AM23
AM26
AM29
D16
W27
W15

AD9
AB10

L3
Y3

AE16
U10
G24

G9

R148 30.1_0402_1%VGA@

H26

R150 0_0402_5%

J26

1 2
1 2

@

NVidia suggestion

CRYSTAL_115

CRYSTAL_015

SUB_VENDOR15

MOBILE_MODE15

MOBILE_MODE

G73M : SA00000QZ00
G72M : SA00000QY00
G72MV : SA00000QY20

FULL 32M

R50 2K_0402_5%

R535 2K_0402_5%

SUB_VENDOR

R73 2K_0402_5%

R49
R48HALF

1 2

VGA@

1 2

VGA@

R561 2K_0402_5%

1 2

VGA@

1 2

@

For all G7x series.

RAM_CFG015
RAM_CFG115
RAM_CFG215
RAM_CFG315
PCI_DEVID015
PCI_DEVID115
PCI_DEVID215
PCI_DEVID315
PEX_CFG015
PEX_CFG115
PEX_CFG215
PEX_PLL_TERM15

RAM TypeBandwidth

R51
R52

16M

G72MV

27MHz=10, 14.318MHz=01, 13.5MHz=00

Parallel=00, SERIAL M25P10=01,
Serial SST45VF=10

VBIOS on card (pull high)
VBIOS with system BIOS (pull down)

Recommended for G7x

16Mx16x4 1.8V (128bit G73M)

16Mx16x4 1.8V (128bit G73M)

16Mx16x4 1.8V (64bit G73M)

16Mx16x4 1.8V (64bit G73M)

16Mx16x4 1.8V (64bit G72MV)

16Mx16x4 1.8V (64bit G72MV)

G73M-xxxx8
G72M-0x01D8MIOA_HSYNC

G72MV-0x01D7
TBD/TBD

RAM_CFG[1:0]
(Manufacture)
(01=Sam, 10=Inf, 11=Hyn)

RAM_CFG[2] (0=16M or 1=32M)
RAM_CFG[3] (Bandwidth 0=Full, 1=Half)

2K_0402_5%

12

R557

R48

G72@

X76@

12

R49

R72

X76@

@

2K_0402_5%

10K_0402_5%

2K_0402_5%

12

R558

G72@

12

R71

@

2K_0402_5%

2K_0402_5%

12

R542

G72@

12

R70

@

2K_0402_5%

2K_0402_5%

12

R54

G73@

12

R63

@

2K_0402_5%

2005/10/15

2K_0402_5%

12

R786

VGA@

12

R560

@

2K_0402_5%

2K_0402_5%

12

R76

@

12

R787

VGA@

2K_0402_5%

2K_0402_5%

12

R788

@

12

R77

VGA@

2K_0402_5%

12

R559

VGA@

2K_0402_5%

Value

01

0

0

010

0001

0011

1001

1011

0001

0011

1000

0111

Value

Samsung

Hynix

Samsung

Hynix

Samsung

Hynix

0

Package

A A

(10*12.5)
(11*13)
(8*13)

Infineon GDDR2(400): SA00000S800 (HYB18T256161AFL-25)
Samsung GDDR2 (400): SA00000FG10 (K4N56163QF-ZC25)
Hynix GDDR2 (400): SA00000FF10 (HY5PS561621AFP-25) Hynix GDDR2 (350): SA00000TJ00 (HY5PS561621AFP-28)

Infineon GDDR2(350): SA 00000T700 (HYB18T256161AF-28)
Samsung GDDR2 (350): SA00000TB00 (K4N56163QF-ZC2A)

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

2

Date: Sheet

Compal Electronics, Inc.

G72/G73 GND & STRAP

HBL50 LA-2921P

1

0.3

of

18 59Friday, November 11, 2005

5

4

3

2

1

FBA_BA0

D D

C C

+1.8VS

12

12

R593
1K_0402_1%

64@

1

C790

0.047U_0402_16V4Z

64@

2

Close to U7 Close to U8

+VRAM_VREFA +VRAM_VREFA

R597

1K_0402_1%

64@

FBA_BA1
FBAA12

FBAA11
FBAA10
FBAA9
FBAA8
FBAA7
FBAA6
FBAA5
FBAA4
FBAA3
FBAA2
FBAA1
FBAA0

FBACLK0#
FBACLK0

FBA_CKE

FBACS0#
FBAWE#
FBARAS#
FBACAS#
FBADQM#0

FBADQM#1

FBAODT0

FBADQS0
FBADQS#0

FBADQS1
FBADQS#1

(SSTL-1.8) VREF = .5*VDDQ

U46

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25X76@

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDDQ10

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

FBAD14

B9

FBAD11

B1

FBAD13

D9

FBAD8

D1

FBAD9

D3

FBAD12

D7

FBAD10

C2

FBAD15

C8

FBAD6

F9

FBAD1

F1

FBAD7 FBAD17

H9

FBAD0

H1

FBAD3

H3

FBAD5

H7

FBAD2

G2

FBAD4

G8

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

+1.8VS +1.8VS

1

C812

0.1U_0402_16V4Z

64@

2

1

C814
1U_0402_6.3V4Z

64@

2

1

C340

0.047U_0402_16V4Z

64@

2

FBA_BA0
FBA_BA1

FBAA12
FBAA11
FBAA10
FBAA9
FBAA8
FBAA7
FBAA6
FBAA5
FBAA4
FBAA3
FBAA2
FBAA1
FBAA0

FBACLK0#
FBACLK0

FBA_CKE

FBACS0#
FBAWE#
FBARAS#
FBACAS#
FBADQM#2

FBADQM#3

FBAODT0

FBADQS2
FBADQS#2

FBADQS3
FBADQS#3

(SSTL-1.8) VREF = .5*VDDQ

U11

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25X76@

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDDQ10

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

FBAD25

B9

FBAD31

B1

FBAD27

D9

FBAD30

D1

FBAD26

D3

FBAD28

D7

FBAD29

C2

FBAD24

C8

FBAD18

F9

FBAD23

F1
H9

FBAD21

H1

FBAD19

H3

FBAD16

H7

FBAD22

G2

FBAD20

G8

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

1

C364

0.1U_0402_16V4Z

64@

2

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

1

C368
1U_0402_6.3V4Z

64@

2

FBACLK016

FBACLK0#16

FBAD[0..63]16,20

FBAA[0..12]16,20

FBADQS[0..7]16,20

FBADQS#[0..7]16,20

FBADQM#[0..7]16,20

FBA_BA016,20

FBA_BA116,20
FBAODT016,20
FBA_CKE16,20
FBARAS#16,20
FBACAS#16,20
FBAWE#16,20
FBACS0#16,20

Close to U8

12

R596
120_0402_5%

64@

FBAD[0..63]

FBAA[0..12]

FBADQS[0..7]

FBADQS#[0..7]

FBADQM#[0..7]

FBA_BA0
FBA_BA1

FBAODT0

FBA_CKE
FBARAS#
FBACAS#

FBAWE#

FBACS0#

FBACLK0

R596 is 120 Ohm (SD028120080) for G72MV
R596 is 475 Ohm (SD034475080) for G73M

FBACLK0#

B B

+1.8VS

1

C811

64@

2

1000P_0402_50V7K

A A

DDR2 BGA MEMORY

0.01U_0402_16V7K

1

C785

64@

2

0.01U_0402_16V7K

0.1U_0402_16V4Z

1

C787

64@

2

1

C799

64@

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

C802

64@

2

1

C810

64@

2

0.1U_0402_16V4Z

1

2

C815

64@

1

C816

0.01U_0402_16V7K

64@

2

+1.8VS

0.01U_0402_16V7K

1

C367

64@

2

1000P_0402_50V7K

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

DDR2 BGA MEMORY

1

C331

C335

64@

64@

2

0.01U_0402_16V7K

0.1U_0402_16V4Z

1

2

1

2

2005/06/20 2006/06/20

0.1U_0402_16V4Z

1

C353

C349

64@

64@

2

1U_0402_6.3V4Z

Compal Secret Data

1

C366

64@

2

0.1U_0402_16V4Z

Deciphered Date

1

C375

64@

2

1

C374

0.01U_0402_16V7K

64@

2

2

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

VRAM DDRA

HBL50 LA-2921P

1

of

19 59Friday, November 11, 2005

0.3

5

D D

FBA_BA0
FBA_BA1

FBAA12
FBAA11
FBAA10
FBAA9
FBAA8
FBAA7
FBAA6
FBBA5
FBBA4
FBBA3
FBBA2
FBAA1
FBAA0

FBACLK1#
FBACLK1

FBA_CKE

FBACS0#

C C

+1.8VS

12

12

R592
1K_0402_1%

128@

1

C784

0.047U_0402_16V4Z

128@

2

Close to U9 Close to U10

+VRAM_VREFB

R594

1K_0402_1%

128@

B B

FBAWE#
FBARAS#
FBACAS#
FBADQM#7

FBADQM#5

FBAODT0

FBADQS7
FBADQS#7

FBADQS5
FBADQS#5

(SSTL-1.8) VREF = .5*VDDQ

U45

L2
L3

R2

P7

M2

P3
P8
P2

N7
N3
N8
N2
M7
M3
M8

K8
J8

K2

L8
K3
K7
L7
F3

B3

K9

F7
E8

B7
A8

J2
A2

E2
L1

R3
R7
R8

HY5PS561621F-25X76@

DDR2 BGA MEMORY DDR2 BGA MEMORY

0.01U_0402_16V7K

1

C805

128@

2

1000P_0402_50V7K

1

C813

128@

2

0.01U_0402_16V7K

1

2

BA0
BA1

A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

CK
CK

CKE

CS
WE
RAS
CAS
LDM

UDM

ODT

LDQS
LDQS

UDQS
UDQS

VREF
NC#A2

NC#E2
NC#L1
NC#R3
NC#R7
NC#R8

0.1U_0402_16V4Z

1

C809

128@

2

4

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDDQ10

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

1

C807

128@

2

1U_0402_6.3V4Z

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

0.1U_0402_16V4Z

1

C806

128@

2

FBAD44
FBAD46
FBAD41
FBAD40
FBAD45
FBAD43
FBAD47
FBAD42
FBAD63
FBAD58
FBAD61
FBAD56
FBAD60
FBAD57
FBAD59
FBAD62

1

C757

0.1U_0402_16V4Z

128@

2

1

C789

128@

2

0.1U_0402_16V4Z

C791

128@

1

C808

0.01U_0402_16V7K

128@

2

1

C758
1U_0402_6.3V4Z

128@

2

+VRAM_VREFB

1

2

3

(SSTL-1.8) VREF = .5*VDDQ

C329

0.047U_0402_16V4Z

128@

FBA_BA0
FBA_BA1

FBAA12
FBAA11
FBAA10
FBAA9
FBAA8
FBAA7
FBAA6
FBBA5
FBBA4
FBBA3
FBBA2
FBAA1
FBAA0

FBACLK1#
FBACLK1

FBA_CKE

FBACS0#
FBAWE#
FBARAS#
FBACAS#
FBADQM#6

FBADQM#4

FBAODT0

FBADQS6
FBADQS#6

FBADQS4
FBADQS#4

+1.8VS+1.8VS

1

2

1000P_0402_50V7K

U12

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25X76@

0.01U_0402_16V7K

1

C373

C337

128@

128@

2

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDDQ10

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

0.1U_0402_16V4Z

1

C342

128@

2

0.01U_0402_16V7K

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

1

2

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

1

C370

128@

2

1U_0402_6.3V4Z

FBAD32
FBAD36
FBAD33
FBAD38
FBAD39
FBAD35
FBAD37
FBAD34
FBAD50
FBAD55
FBAD49
FBAD54
FBAD52
FBAD53
FBAD51
FBAD48

1

C321

0.1U_0402_16V4Z

128@

2

0.1U_0402_16V4Z

1

C372

128@

2

2

+1.8VS+1.8VS

1

C369

C371

128@

128@

2

0.1U_0402_16V4Z

1

C325
1U_0402_6.3V4Z

128@

2

FBACLK116

FBACLK1#16

1

C365

0.01U_0402_16V7K

128@

2

1

FBAD[0..63]

FBAA[0..12]

FBBA[2..5]

FBADQS[0..7]

FBADQS#[0..7]

FBADQM#[0..7]

FBA_BA0

FBA_BA1
FBAODT0
FBA_CKE

FBARAS#
FBACAS#

FBAWE#

FBACS0#

FBACLK1

FBACLK1#

FBADQS[0..7]16,19

FBADQS#[0..7]16,19

FBADQM#[0..7]16,19

FBAD[0..63]16,19

FBAA[0..12]16,19

FBBA[2..5]16

FBA_BA016,19
FBA_BA116,19

FBAODT016,19
FBA_CKE16,19
FBARAS#16,19
FBACAS#16,19
FBAWE#16,19
FBACS0#16,19

12

R200
120_0402_5%

128@

Close to U10

R200 is 120 Ohm (SD028120080) for G72MV
R200 is 481 Ohm (SD00000CA80) for G73M

A A

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

VRAM DDRB

HBL50 LA-2921P

1

0.3

of

20 59Friday, November 11, 2005

5

4

3

2

1

U41

L2

BA0

L3

D D

C C

+1.8VS

12

12

R86
1K_0402_1%

256@

1

C101

0.047U_0402_16V4Z

256@

2

+VRAM_VREFC

R85

1K_0402_1%

256@

FBCA12
FBCA11
FBCA10
FBCA9
FBCA8
FBCA7
FBCA6
FBCA5
FBCA4
FBCA3
FBCA2
FBCA1
FBCA0

FBCCLK0#
FBCCLK0

FBC_CKE

FBCCS0#
FBCWE#
FBCRAS#
FBCCAS#
FBCDQM#1 FBCDQM#0

FBCDQM#3

FBCODT0

FBCDQS1 FBCDQS0
FBCDQS#1

FBCDQS3
FBCDQS#3

Close to U11

B B

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25X76@

DDR2 BGA MEMORY DDR2 BGA MEMORY

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDDQ10

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

FBCD26

B9

FBCD31

B1

FBCD24

D9

FBCD28

D1

FBCD29

D3

FBCD27

D7

FBCD30

C2

FBCD25

C8

FBCD15

F9

FBCD12

F1

FBCD8

H9

FBCD10

H1

FBCD9

H3

FBCD11

H7

FBCD13

G2

FBCD14

G8

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

1

C691

0.1U_0402_16V4Z

256@

2

+1.8VS

1

C694
1U_0402_6.3V4Z

256@

2

+VRAM_VREFC

1

C670

0.047U_0402_16V4Z

256@

2

Close to U12

FBC_BA0FBC_BA0
FBC_BA1FBC_BA1

FBCA12
FBCA11
FBCA10

FBCA9
FBCA8
FBCA7
FBCA6
FBCA5
FBCA4
FBCA3
FBCA2
FBCA1
FBCA0

FBCCLK0#

FBCCLK0
FBC_CKE

FBCCS0#

FBCWE#

FBCRAS#
FBCCAS#

FBCDQM#2

FBCODT0

FBCDQS#0

FBCDQS2

FBCDQS#2

(SSTL-1.8) VREF = .5*VDDQ(SSTL-1.8) VREF = .5*VDDQ

U4

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25X76@

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDDQ10

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

FBCD19

B9

FBCD21

B1

FBCD16

D9

FBCD22

D1

FBCD20

D3

FBCD17

D7

FBCD23

C2

FBCD18

C8

FBCD0

F9

FBCD5

F1

FBCD2

H9

FBCD3

H1

FBCD7

H3

FBCD6

H7

FBCD4

G2

FBCD1

G8

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

1

C102

0.1U_0402_16V4Z

256@

2

+1.8VS

1

C103
1U_0402_6.3V4Z

256@

2

FBCCLK016

FBCCLK0#16

FBCD[0..63]16,22

FBCA[0..12]16,22

FBCDQS[0..7]16,22

FBCDQS#[0..7]16,22

FBCDQM#[0..7]16,22

FBC_BA016,22

FBC_BA116,22
FBCODT016,22
FBC_CKE16,22
FBCRAS#16,22
FBCCAS#16,22
FBCWE#16,22
FBCCS0#16,22

Close to U12

12

R566
120_0402_5%

256@

R566 is 120 Ohm (SD028120080) for G72MV
R566 is 481 Ohm (SD00000CA80) for G73M

FBCD[0..63]

FBCA[0..12]

FBCDQS[0..7]

FBCDQS#[0..7]

FBCDQM#[0..7]

FBC_BA0

FBC_BA1
FBCODT0
FBC_CKE

FBCRAS#
FBCCAS#

FBCWE#

FBCCS0#

FBCCLK0

FBCCLK0#

+1.8VS+1.8VS

0.01U_0402_16V7K

1

1

C674

256@

2

2

1000P_0402_50V7K

A A

1

C685

C673

256@

256@

2

0.01U_0402_16V7K

0.1U_0402_16V4Z

1

2

1

C680

256@

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

C742

C688

256@

256@

2

1

C676

256@

2

0.1U_0402_16V4Z

1

C675

0.01U_0402_16V7K

256@

2

0.01U_0402_16V7K

1

C160

256@

2

1000P_0402_50V7K

1

2

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

0.1U_0402_16V4Z

1

1

C112

C171

256@

256@

2

0.01U_0402_16V7K

2

2005/06/20 2006/06/20

0.1U_0402_16V4Z

1

C122

C280

256@

256@

2

1U_0402_6.3V4Z

Compal Secret Data

Deciphered Date

1

C128

256@

2

0.1U_0402_16V4Z

1

2

C99

256@

1

C100

0.01U_0402_16V7K

256@

2

2

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

VRAM DDRC

HBL50 LA-2921P

1

of

21 59Friday, November 11, 2005

0.3

5

4

3

2

1

U43

L2

BA0

L3

D D

C C

+1.8VS

12

12

R585
1K_0402_1%

256@

1

C749

0.047U_0402_16V4Z

256@

2

Close to U13 Close to U14

+VRAM_VREFD

R584

1K_0402_1%

256@

B B

FBCA12
FBCA11
FBCA10
FBCA9
FBCA8
FBCA7
FBCA6
FBDA5
FBDA4
FBDA3
FBDA2
FBCA1
FBCA0

FBCCLK1#
FBCCLK1

FBC_CKE

FBCCS0#
FBCWE#
FBCRAS#
FBCCAS#
FBCDQM#6

FBCDQM#4

FBCODT0

FBCDQS6
FBCDQS#6

FBCDQS4
FBCDQS#4

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25X76@

DDR2 BGA MEMORY DDR2 BGA MEMORY

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDDQ10

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

FBCD33

B9

FBCD39

B1

FBCD35

D9

FBCD37

D1

FBCD38

D3

FBCD32

D7

FBCD36

C2

FBCD34

C8

FBCD52

F9

FBCD48

F1

FBCD54

H9

FBCD50

H1

FBCD49

H3

FBCD53

H7

FBCD51

G2

FBCD55

G8

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

1

C745

0.1U_0402_16V4Z

256@

2

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

1

C684
1U_0402_6.3V4Z

256@

2

+VRAM_VREFD

1

C309

0.047U_0402_16V4Z

256@

2

FBC_BA0FBC_BA0
FBC_BA1FBC_BA1

FBCA12
FBCA11
FBCA10
FBCA9
FBCA8
FBCA7
FBCA6
FBDA5
FBDA4
FBDA3
FBDA2
FBCA1
FBCA0

FBCCLK1#
FBCCLK1

FBC_CKE

FBCCS0#
FBCWE#
FBCRAS#
FBCCAS#
FBCDQM#5

FBCDQM#7

FBCODT0

FBCDQS5
FBCDQS#5

FBCDQS7
FBCDQS#7

(SSTL-1.8) VREF = .5*VDDQ(SSTL-1.8) VREF = .5*VDDQ

U5

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25X76@

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDDQ10

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

FBCD57

B9

FBCD63

B1

FBCD59

D9

FBCD62

D1

FBCD60

D3

FBCD58

D7

FBCD61

C2

FBCD56

C8

FBCD41

F9

FBCD44

F1

FBCD40

H9

FBCD47

H1

FBCD43

H3

FBCD42

H7

FBCD46

G2

FBCD45

G8

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

1

C289

0.1U_0402_16V4Z

256@

2

+1.8VS+1.8VS

1

C120
1U_0402_6.3V4Z

256@

2

FBCD[0..63]16,21

FBCA[0..12]16,21

FBDA[2..5]16

FBCDQS[0..7]16,21

FBCDQS#[0..7]16,21

FBCDQM#[0..7]16,21

FBC_BA016,21

FBC_BA116,21
FBCODT016,21
FBC_CKE16,21
FBCRAS#16,21
FBCCAS#16,21
FBCWE#16,21
FBCCS0#16,21

FBCCLK116

FBCCLK1#16

FBCD[0..63]

FBCA[0..12]

FBDA[2..5]

FBCDQS[0..7]

FBCDQS#[0..7]

FBCDQM#[0..7]

FBC_BA0
FBC_BA1
FBCODT0
FBC_CKE
FBCRAS#
FBCCAS#
FBCWE#
FBCCS0#

FBCCLK1

12

R170
120_0402_5%

256@

FBCCLK1#

Close to U14

R170 is 120 Ohm (SD028120080) for G72MV
R170 is 481 Ohm (SD00000CA80) for G73M

+1.8VS+1.8VS

0.01U_0402_16V7K

1

1

C750

256@

2

2

1000P_0402_50V7K

A A

1

C751

C699

256@

256@

2

0.01U_0402_16V7K

0.1U_0402_16V4Z

1

C738

256@

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

C747

256@

2

1

C748

256@

2

0.1U_0402_16V4Z

1

2

C721

256@

1

C737

0.01U_0402_16V7K

256@

2

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0.01U_0402_16V7K

1

C277

256@

2

1000P_0402_50V7K

3

1

C307

C306

256@

256@

2

0.01U_0402_16V7K

0.1U_0402_16V4Z

1

2

1

2

2005/06/20 2006/06/20

0.1U_0402_16V4Z

1

C304

C305

256@

256@

2

1U_0402_6.3V4Z

Compal Secret Data

Deciphered Date

1

C233

256@

2

0.1U_0402_16V4Z

1

C246

256@

2

2

1

C273

0.01U_0402_16V7K

256@

2

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

VRAM DDRD

HBL50 LA-2921P

1

of

22 59Friday, November 11, 2005

0.3

5

4

3

2

1

LCD POWER CIRCUIT

+3VS

12

+LCDVDD

1

2

+3VS

S

G

2

D

1 3

1

C593

4.7U_0805_10V4Z

2

R492

4.7K_0402_5%

DAC_BRIG 40
INVT_PWM 40

C586
10U_0805_10V4Z

W=60mils

Q28
SI2301BDS_SOT23

+LCDVDD

1

C591

0.1U_0402_16V4Z

2

1

C12

4.7U_0805_10V4Z

2

AOS 3413

W=60mils

1

C597

0.1U_0402_16V4Z

2

TXOUT0­TXOUT0+

TXOUT1­TXOUT1+

TXOUT2+
TXOUT2-

TXCLK­TXCLK+

TZOUT0­TZOUT0+

TZOUT1+
TZOUT1-

TZOUT2+
TZOUT2-

TZCLK­TZCLK+

I2CC_SDA
TXOUT0-

TXOUT0+
TXOUT1-

TXOUT1+
TXOUT2+

TXOUT2­TXCLK-

TXCLK+
TZOUT0-

TZOUT0+
TZOUT1+

TZOUT1­TZOUT2+

TZOUT2­TZCLK-

TZCLK+

R25 0_0402_5%VGA@

1 2

R26 0_0402_5%VGA@

1 2

R27 0_0402_5%VGA@

1 2

R28 0_0402_5%VGA@

1 2

R29 0_0402_5%VGA@

1 2

R30 0_0402_5%VGA@

1 2

R31 0_0402_5%VGA@

1 2

R32 0_0402_5%VGA@

1 2

R33 0_0402_5%VGA@

1 2

R34 0_0402_5%VGA@

1 2

R35 0_0402_5%VGA@

1 2

R36 0_0402_5%VGA@

1 2

R37 0_0402_5%VGA@

1 2

R38 0_0402_5%VGA@

1 2

R39 0_0402_5%VGA@

1 2

R40 0_0402_5%VGA@

1 2

R41 0_0402_5%GM@

1 2

R42 0_0402_5%GM@

1 2

R509 0_0402_5%GM@

1 2

R508 0_0402_5%GM@

1 2

R507 0_0402_5%GM@

1 2

R506 0_0402_5%GM@

1 2

R505 0_0402_5%GM@

1 2

R504 0_0402_5%GM@

1 2

R503 0_0402_5%GM@

1 2

R502 0_0402_5%GM@

1 2

R525 0_0402_5%GM@

1 2

R524 0_0402_5%GM@

1 2

R523 0_0402_5%GM@

1 2

R522 0_0402_5%GM@

1 2

R521 0_0402_5%GM@

1 2

R520 0_0402_5%GM@

1 2

R519 0_0402_5%GM@

1 2

R518 0_0402_5%GM@

1 2

LVDSA0­LVDSA0+

LVDSA1­LVDSA1+

LVDSA2+
LVDSA2-

LVDSAC­LVDSAC+

LVDSB0­LVDSB0+

LVDSB1+
LVDSB1-

LVDSB2+
LVDSB2-

LVDSBC­LVDSBC+

GMCH_LCD_CLKI2CC_SCL
GMCH_LCD_DATA

GMCH_TXOUT0­GMCH_TXOUT0+

GMCH_TXOUT1­GMCH_TXOUT1+

GMCH_TXOUT2+
GMCH_TXOUT2-

GMCH_TXCLK­GMCH_TXCLK+

GMCH_TZOUT0­GMCH_TZOUT0+

GMCH_TZOUT1+
GMCH_TZOUT1-

GMCH_TZOUT2+
GMCH_TZOUT2-

GMCH_TZCLK­GMCH_TZCLK+

LVDSA0- 15

LVDSA0+ 15
LVDSA1- 15

LVDSA1+ 15

LVDSA2+ 15

LVDSA2- 15

LVDSAC- 15

LVDSAC+ 15

LVDSB0- 15

LVDSB0+ 15
LVDSB1+ 15

LVDSB1- 15

LVDSB2+ 15

LVDSB2- 15

LVDSBC- 15

LVDSBC+ 15

GMCH_LCD_CLK 8
GMCH_LCD_DATA 8

GMCH_TXOUT0- 8
GMCH_TXOUT0+ 8

GMCH_TXOUT1- 8
GMCH_TXOUT1+ 8

GMCH_TXOUT2+ 8
GMCH_TXOUT2- 8

GMCH_TXCLK- 8
GMCH_TXCLK+ 8

GMCH_TZOUT0- 8

GMCH_TZOUT0+ 8
GMCH_TZOUT1+ 8

GMCH_TZOUT1- 8

GMCH_TZOUT2+ 8

GMCH_TZOUT2- 8

GMCH_TZCLK- 8

GMCH_TZCLK+ 8

+LCDVDD

12

D D

GMCH_ENVDD8

ENVDD15

C C

R495 0_0402_5%
R494 0_0402_5%

300_0402_5%

2N7002_SOT23

1 2
1 2

R485

Q25

BKOFF#40

GM@
VGA@

10K_0402_5%

13

D

S

+3VALW

12

R493
100K_0402_5%

D27
RB751V_SOD323

21

12

C600

1

0.047U_0402_16V7K

2

2

G

2

G

12

R490

BKOFF# DISPOFF#

13

D

Q1
2N7002_SOT23

S

R496 1K_0402_5%

LCD/PANEL BD. Conn.

+INVPWR_B+

+3VS +LCDVDD
I2CC_SCL15
I2CC_SDA15

B B

I2CC_SCL
I2CC_SDA

TZOUT0-

TZOUT1+
TZOUT1-

TZOUT2+
TZOUT2-

TZCLK­TZCLK+

JP1

20

40

19

39

18

38

17

37

16

36

15

35

14

34

13

33

12

32

11

31

10

30

9

29

8

28

7

27

6

26

5

25

4

24

3

23

2

22

1

21

ACES_88107-4000G

(SAME AS ACES_87216-4016)

C930

680P_0603_50V7K

L1

KC FBM-L11-201209-221LMAT_0805

L2

KC FBM-L11-201209-221LMAT_0805

1

2

1

C10
68P_0402_50V8K

2

12

12

B+

DAC_BRIG
INVT_PWM
DISPOFF#

(60 MIL)

TXOUT0­TXOUT0+TZOUT0+

TXOUT1­TXOUT1+

TXOUT2+
TXOUT2-

TXCLK­TXCLK+

+3VS+INVPWR_B+

1

C11

0.1U_0402_16V4Z

2

A A

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

2

Date: Sheet

Compal Electronics, Inc.

LCD Connector

HBL50 LA-2921P

1

0.3

of

23 59Friday, November 11, 2005

A

B

C

D

E

D22

2 1

RB411D_SOT23

C573

100P_0402_50V8J

2

G

S

2

G

1 3

D

Q26
2N7002_SOT23

2005/10/18

W=40mils

DDC_MD2

1

2

C579

68P_0402_50V8K

R98 0_0402_5%GM@

R129

S

F1

21

1.1A_6VDC_FUSE

C575

0.1U_0402_16V4Z

1

2

4.7K_0402_5%

1 2

12

12

0_0402_5%GM@

1 2

W=40mils

1

2

SUYIN_070549FR015S208CR

DSUB_12

DSUB_15

1

C572
68P_0402_50V8K

2

+3VS

12

R781

PM@

R480
0_0402_5%PM@

R476
0_0402_5%PM@

R782

4.7K_0402_5%

PM@

1 2

+3VS

+CRT_VCC+R_ CRT_VCC

JP15

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

VGA_DDC_DATA 15

GMCH_CRT_DATA 8

GMCH_CRT_CLK 8

VGA_DDC_CLK 15

CRT Connector

PM@

+3VS

GM@

1 1

VGA_CRT_R15

GMCH_CRT_R8

VGA_CRT_G15

GMCH_CRT_G8

VGA_CRT_B15

GMCH_CRT_B8

2 2

Place closed to chipset

R80 0_0402_5%PM@

1 2

1 2

R83 0_0402_5%GM@
R84 0_0402_5%PM@

1 2

1 2

R87 0_0402_5%GM@
R88 0_0402_5%PM@

1 2

1 2

R89 0_0402_5%GM@

VGA_CRT_HSYNC15
GMCH_CRT_HSYNC8

R477

150_0402_1%

1 2

R105 0_0402_5%PM@

1 2

R106 39_0402_5%GM@

12

VGA:8P_0402_50V8K
UMA:10P_0402_50V8J

12

R483

150_0402_1%

1 2

C584 0.1U_0402_16V4Z

CRT_HSYNC CRT_HSYNC_B

Place closed to chipset

VGA_CRT_ VSYNC15
GMCH_CRT_VSYNC8

1 2

R115 0_0402_5%PM@

1 2

R116 39_0402_5%GM@

TV-OUT Conn.

3 3

VGA_TV_LUMA15
GMCH_TV_LUMA8
VGA_TV_CRMA15
GMCH_TV_CRMA8
VGA_TV_COMPS15
GMCH_TV_COMPS8

Place closed to chipset

1 2

R66 0_0402_5%PM@

1 2

R74 0_0402_5%GM@

1 2

R75 0_0402_5%PM@

1 2

R79 0_0402_5%GM@

1 2

R62 0_0402_5%PM@

1 2

R65 0_0402_5%GM@

12

R486

150_0402_1%

150_0402_1%

12

R488

150_0402_1%

12

TV_LUMA

TV_CRMA

TV_COMPS

R484

1

C589

C596

2

150P_0402_50V8J

150P_0402_50V8J

VGA:82P_0402_50V8J
UMA:6P_0402_50V8J

1

C583

2

150P_0402_50V8J

+2.5VS

CRT_R

CRT_G

CRT_B

12

R487

8P_0402_50V8K

150_0402_1%

+CRT_VCC

1

5

P

OE#

A2Y

G

SN74AHCT1G125DCKR_SC70-5

3

1 2

C590 0.1U_0402_16V4Z

+3VS

C582 22P_0402_50V8J

1 2

1 2

L39 FCM1608C-121T_0603PM@

C595 22P_0402_50V8J

1 2

1 2

L43 FCM1608C-121T_0603PM@

C588 22P_0402_50V8J

1 2

1 2

L41 FCM1608C-121T_0603PM@

2005/09/22

1

2

150P_0402_50V8J

1

C592

PM@

2

8P_0402_50V8K

U35

4

CRT_VSYNC CRT_VSYNC_B

D1

@

DAN217_SC59

1

C587

2

L39, L41, L43 must change to SM010006T00 for VGA
L39, L41, L43 must change to SM010010710 for UMA

R475

12

0_0603_5%

R474

12

0_0603_5%

1

C581

PM@

8P_0402_50V8K

2

+CRT_VCC

5

1

P

OE#

A2Y

G

SN74AHCT1G125DCKR_SC70-5

3

1

2

3

C594

150P_0402_50V8J

+CRT_PULLUP

1 2

L36

FCM2012C-800_0805

1 2

L37

FCM2012C-800_0805

1 2

L42

FCM2012C-800_0805

1

C571

PM@

2

12

R489 10K_0402_5%

U36

4

D23

@

DAN217_SC59

2

1

2

1

3

D24

@

DAN217_SC59

1

C585

150P_0402_50V8J

2

CRT_R_L

CRT_G_L

CRT_B_L

C580

8P_0402_50V8K

PM@

1

2

3

TV_CRMA_L
TV_COMPS_L

TV_LUMA_L

D20

@

DAN217_SC59

1

2

D21

@

DAN217_SC59

1

2

1 2

L38 FCM1608C-121T_0603

1 2

L40 FCM1608C-121T_0603

1

2

3

1

C578
8P_0402_50V8K

2

PM@

10P_0402_50V8K

4.7K_0402_5%

DSUB_12

DSUB_15

JP14

3
6
7
5
2
4
1
8
9

SUYIN_030107FR007SX08FU

(ECQ60)

3

D26

@

DAN217_SC59

2

1

C576

8P_0402_50V8K

2

PM@

CRT_HSYNC_L

CRT_VSYNC_L

C577

+CRT_VCC

12

R479

1

3

1

1

C574
10P_0402_50V8K

2

2

Place closed to chipset

12

R478

4.7K_0402_5%

1 3

Q27
2N7002_SOT23

+5VS

+3VS

D

4 4

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

D

Date: Sheet

Compal Electronics, Inc.

CRT & TV-OUT Connector

HBL50 LA-2921P

E

0.3

of

24 59Friday, November 11, 2005

5

+2.5VS +3VS

0.1U_0402_16V4Z

D D

C C

1

10U_0805_10V4Z

2

C5

7307@

1

2

C3

7307@

+2.5VS

0.1U_0402_16V4Z

12

R10
10K_0402_5%

7307@

AS

12

R9
10K_0402_5%

@

1

2

C9

7307@

4

1

C4

7307@

10U_0805_10V4Z

2

0.1U_0402_16V4Z

1

2

SDVO_INT8
SDVO_INT#8

SDVOB_R8
SDVOB_R#8

SDVOB_G8
SDVOB_G#8

SDVOB_B8
SDVOB_B#8

SDVOB_CLK8
SDVOB_CLK#8

PLT_RST_BUF#26,36,39

R6

1.2K_0402_5%

7307@

C8

7307@

0.1U_0402_16V4Z

12

R1
10K_0402_5%

7307@

1

2

C6

7307@

12

AS

12

R5
10K_0402_5%

7307@

U1

32
33

37
38

40
41

43
44

46
47

3
2

25
27

26

SDVOB_INT+
SDVOB_INT-

SDVOB_R+
SDVOB_R-

SDVOB_G+
SDVOB_G-

SDVOB_B+
SDVOB_B-

SDVOB_CLK+
SDVOB_CLK-

AS
RESET#
VSWING

ATPG
SCEN

3

+3VS

+2.5VS

1

28

21

TVDD15TVDD

DVDD12DVDD

AVDD_PLL

DGND7DGND30AGND31AGND39AGND45TGND18TGND24AGND_PLL

48

AVDD36AVDD42AVDD

SC_PROM
SD_PROM

6

34

DVI_TXC-

13

TDC0#

TDC0

TDC1#

TDC1

TDC2#

TDC2

HPDET

SC_DDC
SD_DDC

NC

NC

35

TLC#

TLC

SPD
SPC

DVI_TXC+

14

DVI_TXD0-

16

DVI_TXD0+

17

DVI_TXD1-

19

DVI_TXD1+

20

DVI_TXD2-

22

DVI_TXD2+

23

DVI_DET

29

DVI_SCLK

11

DVI_SDATA

10
9

8

SDVO_SDAT

5

SDVO_SCLK

4

Keep 30mil spacing to o t her signals

CH7307_LQFP487307@

SDVO_SDAT 8
SDVO_SCLK 8

2

7307@
VGA@ StuffNo_Stuff

@

SDVO_SDAT

SDVO_SCLK

R12 5.6K_0402_5%7307@

R11 5.6K_0402_5%7307@

1

DVI fro m SD VO DVI from Discrete VGABOM structure

Stuff No_Stuff

No_Stuff No_Stuff

+2.5VS

1 2

1 2

DVI-D Connector

VGA_DVI_TXD0-15
VGA_DVI_TXD0+15

VGA_DVI_TXD1-15
VGA_DVI_TXD1+15

VGA_DVI_TXD2-15
VGA_DVI_TXD2+15

B B

VGA_DVI_TXC+15
VGA_DVI_TXC-15

1 4
2 3

RP27 10_0404_4P2R_5%DVI@

1 4
2 3

RP26 10_0404_4P2R_5%DVI@

1 4
2 3

RP25 10_0404_4P2R_5%DVI@

2 3
1 4

RP28 10_0404_4P2R_5%DVI@

DVI_TXD0­DVI_TXD0+

DVI_TXD1­DVI_TXD1+

DVI_TXD2­DVI_TXD2+

DVI_TXC+
DVI_TXC-

Place close to CH7307C

+DVI_VCC

12

R481

4.7K_0402_5%

DVI@

R4 0_0402_5%DVI@

VGA_DVI_SCLK15

A A

VGA_DVI_SDATA15

1 2

R3 0_0402_5%DVI@

1 2

DVI_SCLK

DVI_SDATA

12

R482

4.7K_0402_5%

DVI@

JP16

17

TMDS_DATA0-

18

TMDS_DATA0+

9

TMDS_DATA1-

10

TMDS_DATA1+

1

TMDS_DATA2-

2

TMDS_DATA2+

12

TMDS_DATA3-

13

TMDS_DATA3+

4

TMDS_DATA4-

5

TMDS_DATA4+

20

TMDS_DATA5-

21

TMDS_DATA5+

23

TMDS_Clock+

24

TMDS_Clock-

8

Analog VSYNC

SUYIN_070939FR024S531PLDVI@

DVI_DET15

TMDS_DATA2/4 shield
TMDS_DATA1/3 shield
TMDS_DATA0/5 shield

DVI_DET

D2

SKS10-04AT_TSMA@

DDC_CLOCK

DDC_DATA

Hot Plug Detect

TMDS_Clock shield

GND

2 1

+5V

14

W=40mils

6

7

16

3
11
19
22

15

12

R7

VGA@

100K_0402_5%

DVI_SCLK

DVI_SDATA

R2

1 2

20K_0402_5%

DVI@

+DVI_VCC

1

2

D25

RB411D_SOT23DVI@

C1

0.1U_0402_16V4Z

DVI@

21

+5VS

(HDQ70)

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

2

Date: Sheet

Compal Electronics, Inc.

CH7307 & DVI-D Connector

HBL50 LA-2921P

25 59Friday, November 11, 2005

1

0.3

of

5

D D

+3VS

4

ICH7M(B-0)(QK65)[QS]:SA00000V160
ICH7M-DH(B-0)(QK17)[QS]:SA00000JK60

3

2

1

R665 8.2K_0402_5%

1 2

R629 8.2K_0402_5%

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

R630 8.2K_0402_5%
R631 8.2K_0402_5%
R648 8.2K_0402_5%
R668 8.2K_0402_5%
R666 8.2K_0402_5%
R628 8.2K_0402_5%
R664 8.2K_0402_5%
R649 8.2K_0402_5%

C C

+3VS

R670 8.2K_0402_5%
R669 8.2K_0402_5%
R655 8.2K_0402_5%
R660 8.2K_0402_5%
R632 8.2K_0402_5%
R644 8.2K_0402_5%
R324 8.2K_0402_5%
R650 8.2K_0402_5%
R633 8.2K_0402_5%
R652 8.2K_0402_5%
R651 8.2K_0402_5%
R654 8.2K_0402_5%

B B

PCI_DEVSEL#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#
PCI_PLOCK#
PCI_IRDY#
PCI_SERR#
PCI_PERR#
PCI_REQ#4
PCI_REQ#3

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#5

PCI_AD[0..31]32,34,36,38

PCI_PIRQA#32
PCI_PIRQB#32

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

U48B

E18

AD0

C18

AD1

A16

AD2

F18

AD3

E16

AD4

A18

AD5

E17

AD6

A17

AD7

A15

AD8

C14

AD9

E14

AD10

D14

AD11

B12

AD12

C13

AD13

G15

AD14

G13

AD15

E12

AD16

C11

AD17

D11

AD18

A11

AD19

A10

AD20

F11

AD21

F10

AD22

E9

AD23

D9

AD24

B9

AD25

A8

AD26

A6

AD27

C7

AD28

B6

AD29

E6

AD30

D6

AD31

Interrupt I/F

A3

PIRQA#

B4

PIRQB#

C5

PIRQC#

B5

PIRQD#

AE5

RSVD[1]

AD5

RSVD[2]

AG4

RSVD[3]

AH4

RSVD[4]

AD9

RSVD[5]

ICH7_BGA652~D

PCI

REQ4# / GPIO22

GNT4# / GPIO48

GPIO1 / REQ5#

GPIO17 / GNT5#

GPIO2 / PIRQE#
GPIO3 / PIRQF#
GPIO4 / PIRQG#
GPIO5 / PIRQH#

MISC

MCH_SYNC#

REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#

C/BE0#
C/BE1#
C/BE2#
C/BE3#

IRDY#

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR#
STOP#
TRDY#

FRAME#

PLTRST#

PCICLK

PME#

RSVD[6]
RSVD[7]
RSVD[8]
RSVD[9]

PAR

D7
E7
C16
D16
C17
D17
E13
F13
A13
A14
C8
D8

B15
C12
D12
C15

A7
E10
B18
A12
C9
E11
B10
F15
F14
F16

C26
A9
B19

G8
F7
F8
G7

AE9
AG8
AH8
F21
AH20

PCI_REQ#0
PCI_GNT#0
PCI_REQ#1
PCI_GNT#1
PCI_REQ#2
PCI_GNT#2
PCI_REQ#3
PCI_GNT#3
PCI_REQ#4

PCI_REQ#5

PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3

PCI_IRDY#
PCI_PAR
PCI_RST#
PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#

PCI_FRAME#

PLT_RST#
CLK_PCI_ICH
PCI_PME#

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

PCI_REQ#0 38
PCI_GNT#0 38
PCI_REQ#1 36
PCI_GNT#1 36
PCI_REQ#2 32
PCI_GNT#2 32
PCI_REQ#3 34
PCI_GNT#3 34

PCI_CBE#0 32,34,36,38
PCI_CBE#1 32,34,36,38
PCI_CBE#2 32,34,36,38
PCI_CBE#3 32,34,36,38

PCI_ I RDY# 32,34,36,38
PCI_PAR 32,34,36,38
PCI_RST# 32,34,36,37,38
PCI_DEVSEL# 32,34,36,38
PCI_PERR# 32,34,36,38

PCI_SERR# 32,34,36
PCI_STOP# 32,34,36,38
PCI_TRDY# 32,34,36,38
PCI_FRAME# 32,34,36,38

PLT_RST# 6,28,31,34,39,40
CLK_PCI_ICH 14
PCI_PME# 34,36,40

PCI_PIRQE# 38
PCI_PIRQF# 34
PCI_PIRQG# 36
PCI_PIRQH# 36

MCH_ICH_SYNC# 6

PLT_RST#

NC7SZ08P5X_NL_SC70-5

2
1

R331 0_0402_5%@

R330 0_0402_5%

Place closely pin A9

CLK_PCI_ICH

R667

10_0402_5%

10P_0402_50V8K

+3VS

5

U17

P

B
A

@

C851

4

Y

G

3

12

12

1 2
1

@

2

PLT_RST_BUF# 25,36,39

PLTRST_VGA# 15

A A

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

2

Date: Sheet

Compal Electronics, Inc.

ICH7-M(1/4)

HBL50 LA-2921P

26 59Friday, November 11, 2005

1

0.3

of

5

4

3

2

1

+RTCVCC

12

R274
1M_0402_5%

D D

C C

B B

+RTCVCC

12

+3VS

12

SM_INTRUDER#

ENABLE INTERNAL

1.05V
SUSPEND
REGULARTOR

R278
332K_0402_1%

ICH_INTVRMEN

R610
10K_0402_5%

SATA_LED#

ICH_BITCLK_AUDIO44

ICH_SYNC_AUDIO44

ICH_RST_AUDIO#44

ICH_SDOUT_AUDIO44

+3VS

1 2

1 2

ICH_AC_BITCLK

ICH_AC_SYNC_R

ICH_AC_RST_R#

ICH_AC_SDOUT_R

1 2

R634 39_0402_5%

1 2

R297 39_0402_5%

1 2

R320 39_0402_5%

1 2

R291 39_0402_5%

R612 4.7K_0402_5%

R611 8.2K_0402_5%

32.768KHZ_12.5P_1TJS125DJ2A073

Change P/N SJ100001V00

+RTCVCC

close to RAM door

ICH_BITCLK_MDC42

ICH_SYNC_MDC42
ICH_RST_MDC#42

ICH_SDOUT_MDC42

IDE_IRQ

R263
20K_0402_5%

SATA_DTX_C_IRX_N030
SATA_DTX_C_IRX_P030

C826

18P_0402_50V8J

12

X3

NC
NC

C827

12

R627 39_0402_5%
R298 39_0402_5%
R313 39_0402_5%

ICH_AC_SDIN044
ICH_AC_SDIN142

R292 39_0402_5%

SATA_LED#40

IDE_IRQ30,31

4

OUT

1

IN

12

1 2
1 2
1 2

1 2

3
2

18P_0402_50V8J

1 2

J3 JOPEN@

C427

1U_0603_10V4Z

1 2

CLK_PCIE_SATA#14
CLK_PCIE_SATA14

R613 24.9_0402_1%

1 2

IDE_DIORDY30,31

IDE_DDACK#30,31
IDE_DIOW#30,31
IDE_DIOR#30,31

ICH_RTCX1

R614

10M_0402_5%

ICH_RTCX2

ICH_RTCRST#

ICH_INTVRMEN
SM_INTRUDER#

ICH_AC_BITCLK
ICH_AC_SYNC_R
ICH_AC_RST_R#

ICH_AC_SDOUT_R

SATA_LED#

SATA_DTX_C_IRX_N0
SATA_DTX_C_IRX_P0
SATA_ITX_DRX_N0
SATA_ITX_DRX_P0

SATA_DTX_C_IRX_N2
SATA_DTX_C_IRX_P2

CLK_PCIE_SATA#
CLK_PCIE_SATA

SATARBIAS

10mils

IDE_DIORDYIDE_DIORDY
IDE_IRQ
IDE_DDACK#
IDE_DIOW#
IDE_DIOR#

12

AB1
AB2

AA3

AF18

AF3
AE3
AG2
AH2

AF7
AE7
AG6
AH6

AF1
AE1

AH10
AG10

AG16
AH16
AF16
AH15
AF15

W4

Y5

W1

Y1
Y2

W3

V3
U3
U5

V4

T5

U7
V6
V7

U1
R6

R5

T2
T3
T1

T4

U48A

RTXC1
RTCX2

RTCRST#
INTVRMEN

INTRUDER#

EE_CS
EE_SHCLK
EE_DOUT
EE_DIN

LAN_CLK
LAN_RSTSYNC
LAN_RXD0

LAN_RXD1
LAN_RXD2

LAN_TXD0
LAN_TXD1
LAN_TXD2

ACZ_BCLK
ACZ_SYNC

ACZ_RST#
ACZ_SDIN0

ACZ_SDIN1
ACZ_SDIN2

ACZ_SDOUT

SATALED#

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

SATA_CLKN
SATA_CLKP

SATARBIASN
SATARBIASP

IORDY
IDEIRQ
DDACK#
DIOW#
DIOR#

ICH7_BGA652~D

RTC

GPIO49 / CPUPWRGD

LAD0
LAD1
LAD2
LAD3

LDRQ0#

LPCCPU

LDRQ1# / GPIO23

LFRAME#

LAN

A20GATE

A20M#

CPUSLP#

TP1 / DPRSTP#

TP2 / DPSLP#

FERR#

IGNNE#

INIT3_3V#

INIT#

INTR

AC-97/AZALIA

RCIN#

SMI#

STPCLK#

THERMTRIP#

DCS1#
DCS3#

SATA

DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8

DD9
DD10
DD11
DD12
DD13

IDE

DD14
DD15

DDREQ

LPC_AD0

AA6

LPC_AD1

AB5

LPC_AD2

AC4

LPC_AD3

Y6

LPC_DRQ0#

AC3
AA5

LPC_FRAME#

AB3

EC_GA20

AE22

H_A20M#

AH28

H_CPUSLP_R#

AG27

DPRSTP#

AF24

H_DPSLP#

AH25

H_FERR#

AG26

H_PWRGOOD

AG24

H_IGNNE#

AG22
AG21

H_INIT#

AF22

H_INTR

AF25

EC_KBRST#

AG23

H_SMI#

AF23

H_NMI

AH24

NMI

DA0
DA1
DA2

AH22
AF26

AH17
AE17
AF17

AE16
AD16

AB15
AE14
AG13
AF13
AD14
AC13
AD12
AC12
AE12
AF12
AB13
AC14
AF14
AH13
AH14
AC15

AE15

H_STPCLK#
THRMTRIP_ICH#

IDE_DA0
IDE_DA1
IDE_DA2

IDE_DCS1#
IDE_DCS3#

IDE_DD0
IDE_DD1
IDE_DD2
IDE_DD3
IDE_DD4
IDE_DD5
IDE_DD6
IDE_DD7
IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15

IDE_DDREQ

LPC_AD0 39,40
LPC_AD1 39,40
LPC_AD2 39,40
LPC_AD3 39,40

LPC_DRQ#0 39

LPC_FRAME# 39,40

R249 10K_0402_5%

12

EC_GA20 40
H_A20M# 4

PAD

R240 0_0402_5%

1 2

R239 10K_0402_5%

T25

H_DPSLP# 4
H_FERR# 4
H_PWRGOOD 4
H_IGNNE# 4
H_INIT# 4

H_INTR 4

12

EC_KBRST# 40
H_SMI# 4

H_NMI 4
H_STPCLK# 4

R606 24.9_0402_1%

1 2

IDE_DA[0..2] 30,31

IDE_DCS1# 30,31
IDE_DCS3# 30,31

IDE_DD[0..15] 30,31

IDE_DDREQ 30,31

+3VS

H_DPRSTP# 4,56

R604 56_0402_5%

12

+1.05VS

+3VS

12

+1.05VS

R605
56_0402_5%

H_THERMTRIP#

R222

330_0402_5%@

1 2

+1.05VS

H_THERMTRIP# 4,6

2

B

H_THERMTRIP#

1

C

Q6

E

2SC2411K_SC59

3

@

MAINPWON 50,51,53

SATA_ITX_DRX_N0

SATA_ITX_DRX_P0 SATA_ITX_C_DRX_P0

C824 3900P_0402_50V7K

C823 3900P_0402_50V7K

1 2

1 2

SATA_ITX_C_DRX_N0

SATA_ITX_C_DRX_N0 30

SATA_ITX_C_DRX_P0 30

close ICH7

1 2

R248 1K_0402_5%

1 2

R254

SATA_DTX_C_IRX_N2
SATA_DTX_C_IRX_P2

1K_0402_5%

SATA_RXn/p need tie to ground when SATA port no used

A A

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

ICH7-M(2/4)

HBL50 LA-2921P

1

0.3

of

27 59Friday, November 11, 2005

5

4

3

2

1

Place closely pin B2 Place closely pin AC1

+3VS

10K_0402_5%

R607

1 2

8.2K_0402_5%

R609

1 2

10K_0402_5%

R256

1 2

+3VALW

D D

C C

R671

R352

R359

R672

R342

R314

R321

R310

R635

R311

R348

R676

R675

R674

R262

R677

10K_0402_5%

1 2

10K_0402_5%

1 2

10K_0402_5%

1 2

10K_0402_5%

1 2

150_0402_1%

1 2

1 2

8.2K_0402_5%

10K_0402_5%

1 2

10K_0402_5%

1 2

10K_0402_5%

1 2

10K_0402_5%

1 2

10K_0402_5%GEN@

1 2

10K_0402_5%GRA@

1 2

10K_0402_5%

1 2

100K_0402_5%

1 2

10K_0402_5%@

1 2

PROJECT_ID[0:1]

00 = Grapevine
01 = Geneva

B B

A A

SERIRQ

PM_CLKRUN#

ICH_VGATE

ICH_SMBCLK14,34,36,37

EC_SWI#

ICH_SMLINK0

ICH_SMLINK1

LINKALERT#

ITP_DBRESET#

1K_0402_5%

ICH_PCIE_W AKE#

PM_BATLOW# PM_BATLOW#

12

SPI_MOSI

SPI_MISO

+3VALW

2005/09/05

PCIE_PTX_C_IRX_N137

PCIE_PTX_C_IRX_P137
PCIE_ITX_C_PRX_N137
PCIE_ITX_C_PRX_P137

PCIE_PTX_C_IRX_N236

PCIE_PTX_C_IRX_P236
PCIE_ITX_C_PRX_N236
PCIE_ITX_C_PRX_P236

PCIE_PTX_C_IRX_N334

PCIE_PTX_C_IRX_P334
PCIE_ITX_C_PRX_N334
PCIE_ITX_C_PRX_P334

PCIE_PTX_C_IRX_N436

PCIE_PTX_C_IRX_P436
PCIE_ITX_C_PRX_N436
PCIE_ITX_C_PRX_P436

SPI_CS#

SMBALERT#

PROJECT_ID0

PROJECT_ID1

PM_DPRSLPVR

SUS_CLK

ICH_SMBDATA14,34,36,37

SUS_STAT#39,41

ITP_DBRESET#4

PM_BMBUSY#6

PM_STP_PCI#14

PM_STP_CPU#14

PM_CLKRUN#34,36,39

SB_INT_FLASH_SEL#41

IDE_HRESET#31

ICH_PCIE_W AKE#34,36,37

EC_THERM#40

RP44

45
36
27
18

10K_1206_8P4R_5%

RP43

45
36
27
18

10K_1206_8P4R_5%

EC_SWI#40
SB_SPKR44

SERIRQ32,39,40

EC_SMI#40

USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4

USB_OC#6
USB_OC#7
USB_OC#5

R325

2.2K_0402_5%

VGATE6,14,56

C839 0.1U_0402_16V4ZEXP@
C837 0.1U_0402_16V4ZEXP@

C835 0.1U_0402_16V4ZMINI2@
C832 0.1U_0402_16V4ZMINI2@

C831 0.1U_0402_16V4Z8789@
C830 0.1U_0402_16V4Z8789@

C829 0.1U_0402_16V4ZMINI1@
C828 0.1U_0402_16V4ZMINI1@

+3VALW

12

EC_SWI#
SB_SPKR
ITP_DBRESET#
PM_BMBUSY#
SMBALERT#
PM_STP_PCI#

PM_STP_CPU#

CP_PE#37

PM_CLKRUN#

IDE_HRESET#
ICH_PCIE_W AKE#

SERIRQ
EC_THERM#

R255 0_0402_5%

EC_SMI#

12
12

12
12

12
12

12
12

12

R332

2.2K_0402_5%

SUS_STAT#

ICH_SMBCLK
ICH_SMBDATA
LINKALERT#
ICH_SMLINK0
ICH_SMLINK1

PROJECT_ID0
PROJECT_ID1

ICH_VGATE

12

USB_OC#037

U48C

C22

SMBCLK

B22

SMBDATA

A26

LINKALERT#

B25

SMLINK0

A25

SMLINK1

A28

RI#

A19

SPKR

A27

SUS_STAT#

A22

SYS_RST#

AB18

GPIO0 / BM_BUSY#

B23

GPIO11 / SMBALERT#

AC20

GPIO18 / STPPCI#

AF21

GPIO20 / STPCPU#

A21

GPIO26

B21

GPIO27

E23

GPIO28

AG18

GPIO32 / CLKRUN#

AC19

GPIO33 / AZ_DOCK_EN#

U2

GPIO34 / AZ_DOCK_RST#

F20

WAKE#

AH21

SERIRQ

AF20

THRM#

AD22

VRMPWRGD

AC21

GPIO6

AC18

GPIO7

E21

GPIO8

ICH7_BGA652~D

PCIE_PTX_C_IRX_N1
PCIE_PTX_C_IRX_P1

PCIE_ITX_PRX_N1
PCIE_ITX_PRX_P1

PCIE_PTX_C_IRX_N2
PCIE_PTX_C_IRX_P2

PCIE_ITX_PRX_N2
PCIE_ITX_PRX_P2

PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P3

PCIE_ITX_PRX_N3
PCIE_ITX_PRX_P3

PCIE_PTX_C_IRX_N4
PCIE_PTX_C_IRX_P4

PCIE_ITX_PRX_N4
PCIE_ITX_PRX_P4

SPI_CS#

SPI_MOSI
SPI_MISO

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7

SMB

SATA

SYS

GPIO

GPIO

Need update symbol

U48D

F26

PERn1

F25

PERp1

E28

PETn1

E27

PETp1

H26

PERn2

H25

PERp2

G28

PETn2

G27

PETp2

K26

PERn3

K25

PERp3

J28

PETn3

J27

PETp3

M26

PERn4

M25

PERp4

L28

PETn4

L27

PETp4

P26

PERn5

P25

PERp5

N28

PETn5

N27

PETp5

T25

PERn6

T24

PERp6

R28

PETn6

R27

PETp6

R2

SPI_CLK

P6

SPI_CS#

P1

SPI_ARB

P5

SPI_MOSI

P2

SPI_MISO

D3

OC0#

C4

OC1#

D5

OC2#

D4

OC3#

E5

OC4#

C3

OC5# / GPIO29

A2

OC6# / GPIO30

B3

OC7# / GPIO31

ICH7_BGA652~D

GPIO21 / SATA0GP
GPIO19 / SATA1GP
GPIO36 / SATA2GP
GPIO37 / SATA3GP

GPIO

Clocks

GPIO16 / DPRSLPVR

TP0 / BATLOW#

PWRBTN#

LAN_RST#

POWER MGT

RSMRST#

GPIO35 / SATAREQ#

PCI-EXPRESS

DIRECT MEDIA INTERFACE

SPI

USB

CLK14
CLK48

SUSCLK

SLP_S3#
SLP_S4#
SLP_S5#

PWROK

GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO24
GPIO25

GPIO38
GPIO39

DMI0RXN

DMI0RXP
DMI0TXN
DMI0TXP

DMI1RXN

DMI1RXP
DMI1TXN
DMI1TXP

DMI2RXN

DMI2RXP
DMI2TXN
DMI2TXP

DMI3RXN

DMI3RXP
DMI3TXN
DMI3TXP

DMI_CLKN
DMI_CLKP

DMI_ZCOMP

DMI_IRCOMP

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P

USBRBIAS#

USBRBIAS

AF19
AH18
AH19
AE19

AC1
B2

C20
B24

D23
F22

AA4
AC22
C21
C23
C19
Y4

E20
A20
F19
E19
R4
E22
R3
D20
AD21
AD20
AE20

V26
V25
U28
U27

Y26
Y25
W28
W27

AB26
AB25
AA28
AA27

AD25
AD24
AC28
AC27

AE28
AE27

C25
D25

F1
F2
G4
G3
H1
H2
J4
J3
K1
K2
L4
L5
M1
M2
N4
N3

D2
D1

R608

1 2

100_0402_5%

CLK_ICH_14M
CLK_ICH_48M

SUS_CLK
PM_SLP_S3#

SLP_S4#
SLP_S5#

SYS_PWROK
PM_DPRSLPVR

PBTN_OUT#

EC_RSMRST#

R277 10K_0402_5%

1 2

EC_SCI#

EC_LID_OUT#

EC_FLASH#

DMI_MTX_IRX_N0
DMI_MTX_IRX_P0
DMI_ITX_MRX_N0
DMI_ITX_MRX_P0

DMI_MTX_IRX_N1
DMI_MTX_IRX_P1
DMI_ITX_MRX_N1
DMI_ITX_MRX_P1

DMI_MTX_IRX_N2
DMI_MTX_IRX_P2
DMI_ITX_MRX_N2
DMI_ITX_MRX_P2

DMI_MTX_IRX_N3
DMI_MTX_IRX_P3
DMI_ITX_MRX_N3
DMI_ITX_MRX_P3

CLK_PCIE_ICH#
CLK_PCIE_ICH

DMI_IRCOMP
USB20_N0

USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7

USBRBIAS

CLK_ICH_14M 14
CLK_ICH_48M 14

PM_SLP_S3# 40

SYS_PWROK 6,43

1 2

PM_DPRSLPVR 6,56

PBTN_OUT# 40
PLT_RST# 6,26,31,34,39,40
EC_RSMRST# 40

EC_SCI# 40

EC_LID_OUT# 40

SATA_CLKREQ# 14

DMI_MTX_IRX_N0 6

DMI_MTX_IRX_P0 6
DMI_ITX_MRX_N0 6
DMI_ITX_MRX_P0 6

DMI_MTX_IRX_N1 6

DMI_MTX_IRX_P1 6
DMI_ITX_MRX_N1 6
DMI_ITX_MRX_P1 6

DMI_MTX_IRX_N2 6

DMI_MTX_IRX_P2 6
DMI_ITX_MRX_N2 6
DMI_ITX_MRX_P2 6

DMI_MTX_IRX_N3 6

DMI_MTX_IRX_P3 6
DMI_ITX_MRX_N3 6
DMI_ITX_MRX_P3 6

R673 24.9_0402_1%

1 2

R653 22.6_0402_1%

1 2

Within 500 mils

R264
10K_0402_5%

ACIN 40,54

EC_FLASH# 41

CLK_PCIE_ICH# 14
CLK_PCIE_ICH 14

USB20_N0 37
USB20_P0 37
USB20_N1 37
USB20_P1 37
USB20_N2 37
USB20_P2 37
USB20_N3 36
USB20_P3 36
USB20_N4 42
USB20_P4 42
USB20_N5 42
USB20_P5 42
USB20_N6 42
USB20_P6 42
USB20_N7 36
USB20_P7 36

Within 500 mils

+1.5VS

CLK_ICH_48M

12

R656
10_0402_5%

@

1

C844
10P_0402_50V8K

@

2

PM_DPRSLPVR : Need to series
a 500Ohm resistor to IMVP6

+3VALW

C451

0.1U_0402_16V4Z

NC7SZ08P5X_NL_SC70-5

SLP_S4#
SLP_S5#

12

5

U18

2

P

B

1

A

G

3

Y

12

R258
10_0402_5%

@

1

C406
10P_0402_50V8K

@

2

4

CLK_ICH_14M

PM_SLP_S5# 40

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

ICH7-M(3/4)

HBL50 LA-2921P

1

0.3

of

28 59Friday, November 11, 2005

5

4

3

2

1

ICH_V5REF_RUN

C433

220U_D2_2VMR15

15mils

C425

0.1U_0402_16V4Z

C819

10U_0805_10V4Z

+3VS

+1.5VS

C842

0.1U_0402_16V4Z

+1.5VS

1

+

C408

2

0.1U_0402_16V4Z

+1.5VS_DMIPLL

1

1

C820

2

2

0.01U_0402_16V7K

1

C825

2

0.1U_0402_16V4Z

1

2

1

2

Place closely pin
D28,T28,AD28.

Place closely pin AG5.

Place closely pin AG9.

D D

C C

B B

A A

+5VS

R259

100_0402_5%

1U_0603_10V4Z

R641

10_0402_5%

1 2

+3VALW+5VALW

1 2

+3VS

21

D11
RB751V_SOD323

2

C424

1

21

D31
RB751V_SOD323

ICH_V5REF_SUS

2

C838
1U_0603_10V4Z

1

(1uF x1, 0.1uF x1)

+1.5VS

0.5_0603_1%

1 2

ICH_V5REF_RUN

2

C410

1

0.1U_0402_16V4Z

(1uF x1, 0.1uF x1)

2

C840

0.1U_0402_16V4Z

1

Place closely pin AG28 within 100mlis.

+1.5VS_DMIPLLR

R226

+1.5VS

+3VALW

0.1U_0402_16V4Z

15mils

C841

1 2

0_0603_5%

1

C405

2

1

2

2

1

R225

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C449

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+1.5VS

C404

0.1U_0402_16V4Z

+1.5VS

C397

1U_0603_10V4Z

PAD

T26

PAD

T27

+3VALW

ICH_V5REF_SUS

1

C853

2

+3VS

1

C855

2

+1.5VS_DMIPLL

1

2

1

2

ICH_AA2
ICH_Y7

G10

AD17

F6

AA22
AA23
AB22
AB23
AC23
AC24
AC25
AC26
AD26
AD27
AD28

D26
D27
D28
E24
E25
E26
F23
F24
G22
G23
H22
H23

J22

J23
K22
K23

L22

L23
M22
M23
N22
N23
P22
P23
R22
R23
R24
R25
R26
T22
T23
T26
T27
T28
U22
U23
V22
V23

W22
W23

Y22
Y23

B27

AG28

AB7
AC6
AC7
AD6
AE6
AF5
AF6

AG5

AH5
AD2

AH11
AB10

AB9

AC10
AD10
AE10
AF10

AF9

AG9

AH9

E3

C1

AA2

Y7
V5

V1
W2
W7

1

C430

0.1U_0402_16V4Z

2

U48F

V5REF[1]
V5REF[2]
V5REF_Sus
Vcc1_5_B[1]

Vcc1_5_B[2]
Vcc1_5_B[3]
Vcc1_5_B[4]
Vcc1_5_B[5]
Vcc1_5_B[6]
Vcc1_5_B[7]
Vcc1_5_B[8]
Vcc1_5_B[9]
Vcc1_5_B[10]
Vcc1_5_B[11]
Vcc1_5_B[12]
Vcc1_5_B[13]
Vcc1_5_B[14]
Vcc1_5_B[15]
Vcc1_5_B[16]
Vcc1_5_B[17]
Vcc1_5_B[18]
Vcc1_5_B[19]
Vcc1_5_B[20]
Vcc1_5_B[21]
Vcc1_5_B[22]
Vcc1_5_B[23]
Vcc1_5_B[24]
Vcc1_5_B[25]
Vcc1_5_B[26]
Vcc1_5_B[27]
Vcc1_5_B[28]
Vcc1_5_B[29]
Vcc1_5_B[30]
Vcc1_5_B[31]
Vcc1_5_B[32]
Vcc1_5_B[33]
Vcc1_5_B[34]
Vcc1_5_B[35]
Vcc1_5_B[36]
Vcc1_5_B[37]
Vcc1_5_B[38]
Vcc1_5_B[39]
Vcc1_5_B[40]
Vcc1_5_B[41]
Vcc1_5_B[42]
Vcc1_5_B[43]
Vcc1_5_B[44]
Vcc1_5_B[45]
Vcc1_5_B[46]
Vcc1_5_B[47]
Vcc1_5_B[48]
Vcc1_5_B[49]
Vcc1_5_B[50]
Vcc1_5_B[51]
Vcc1_5_B[52]
Vcc1_5_B[53]

Vcc3_3[1]
VccDMIPLL
Vcc1_5_A[1]

Vcc1_5_A[2]
Vcc1_5_A[3]
Vcc1_5_A[4]
Vcc1_5_A[5]
Vcc1_5_A[6]
Vcc1_5_A[7]
Vcc1_5_A[8]
Vcc1_5_A[9]

VccSATAPLL
Vcc3_3[2]
Vcc1_5_A[10]

Vcc1_5_A[11]
Vcc1_5_A[12]
Vcc1_5_A[13]
Vcc1_5_A[14]
Vcc1_5_A[15]
Vcc1_5_A[16]
Vcc1_5_A[17]
Vcc1_5_A[18]

VccSus3_3[19]
VccUSBPLL
VccSus1_05/VccLAN1_05[1]

VccSus1_05/VccLAN1_05[2]
VccSus3_3/VccLAN3_3[1]

VccSus3_3/VccLAN3_3[2]
VccSus3_3/VccLAN3_3[3]
VccSus3_3/VccLAN3_3[4]

ICH7_BGA652~D

Vcc1_05[1]
Vcc1_05[2]
Vcc1_05[3]
Vcc1_05[4]
Vcc1_05[5]
Vcc1_05[6]
Vcc1_05[7]
Vcc1_05[8]

Vcc1_05[9]
Vcc1_05[10]
Vcc1_05[11]
Vcc1_05[12]
Vcc1_05[13]
Vcc1_05[14]
Vcc1_05[15]
Vcc1_05[16]
Vcc1_05[17]
Vcc1_05[18]
Vcc1_05[19]
Vcc1_05[20]

Vcc3_3 / VccHDA

VccSus3_3/VccSusHDA

V_CPU_IO[1]
V_CPU_IO[2]
V_CPU_IO[3]

Vcc3_3[3]
Vcc3_3[4]
Vcc3_3[5]
Vcc3_3[6]
Vcc3_3[7]
Vcc3_3[8]

Vcc3_3[9]
Vcc3_3[10]
Vcc3_3[11]

Vcc3_3[12]
Vcc3_3[13]
Vcc3_3[14]
Vcc3_3[15]
Vcc3_3[16]
Vcc3_3[17]
Vcc3_3[18]
Vcc3_3[19]
Vcc3_3[20]
Vcc3_3[21]

VccRTC
VccSus3_3[1]
VccSus3_3[2]

VccSus3_3[3]
VccSus3_3[4]
VccSus3_3[5]
VccSus3_3[6]

VccSus3_3[7]
VccSus3_3[8]
VccSus3_3[9]

VccSus3_3[10]
VccSus3_3[11]
VccSus3_3[12]
VccSus3_3[13]
VccSus3_3[14]
VccSus3_3[15]
VccSus3_3[16]
VccSus3_3[17]
VccSus3_3[18]

Vcc1_5_A[19]
Vcc1_5_A[20]

Vcc1_5_A[21]
Vcc1_5_A[22]
Vcc1_5_A[23]

Vcc1_5_A[24]
Vcc1_5_A[25]

VccSus1_05[1]
VccSus1_05[2]

VccSus1_05[3]

Vcc1_5_A[26]
Vcc1_5_A[27]
Vcc1_5_A[28]
Vcc1_5_A[29]
Vcc1_5_A[30]

L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

U6
R7
AE23

AE26
AH26

AA7
AB12
AB20
AC16
AD13
AD18
AG12
AG15
AG19

A5
B13
B16
B7
C10
D15
F9
G11
G12
G16

W5
P7
A24

C24
D19
D22
G19

K3
K4
K5
K6
L1
L2
L3
L6
L7
M6
M7
N7

AB17
AC17

T7
F17
G17

AB8
AC8

K7
C28

G20
A1

H6
H7
J6
J7

+1.05VS

0.1U_0402_16V4Z

1

C426

C439

2

1U_0603_10V4Z

1

C409

2

0.1U_0402_16V4Z

1

C856

0.1U_0402_16V4Z

2

1

C441

0.1U_0402_16V4Z

2

+1.5VS

1 2

C411 0.1U_0402_16V4Z

ICH_K7
ICH_C28

ICH_G20

+1.5VS

1

C852

0.1U_0402_16V4Z

2

1

2

+3VALW

+3VS

1

C412

0.1U_0402_16V4Z

2

1

1

C413

2

2

0.1U_0402_16V4Z

1

C854

0.1U_0402_16V4Z

2

1

C834

0.1U_0402_16V4Z

2

PAD
PAD

PAD

1

+

C390
220U_D2_2VMR15

2

+3VS

C415

0.1U_0402_16V4Z

+3VALW

+3VALW

T28
T30

T29

+1.05VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

4.7U_0805_10V4Z

C435

1 2

1 2

C446

1 2

C428

+3VS

1

C442

0.1U_0402_16V4Z

2

2005/09/12

+RTCVCC

1

1

C431

C437

2

2

0.1U_0402_16V4Z

1U_0402_6.3V4Z

U48E

A4

VSS[0]

A23

VSS[1]

B1

VSS[2]

B8

VSS[3]

B11

VSS[4]

B14

VSS[5]

B17

VSS[6]

B20

VSS[7]

B26

VSS[8]

B28

VSS[9]

C2

VSS[10]

C6

VSS[11]

C27

VSS[12]

D10

VSS[13]

D13

VSS[14]

D18

VSS[15]

D21

VSS[16]

D24

VSS[17]

E1

VSS[18]

E2

VSS[19]

E4

VSS[21]

E8

VSS[22]

E15

VSS[23]

F3

VSS[24]

F4

VSS[25]

F5

VSS[26]

F12

VSS[27]

F27

VSS[28]

F28

VSS[29]

G1

VSS[30]

G2

VSS[31]

G5

VSS[32]

G6

VSS[33]

G9

VSS[34]

G14

VSS[35]

G18

VSS[36]

G21

VSS[37]

G24

VSS[38]

G25

VSS[39]

G26

VSS[40]

H3

VSS[41]

H4

VSS[42]

H5

VSS[43]

H24

VSS[44]

H27

VSS[45]

H28

VSS[46]

J1

VSS[47]

J2

VSS[48]

J5

VSS[49]

J24

VSS[50]

J25

VSS[51]

J26

VSS[52]

K24

VSS[53]

K27

VSS[54]

K28

VSS[55]

L13

VSS[56]

L15

VSS[57]

L24

VSS[58]

L25

VSS[59]

L26

VSS[60]

M3

VSS[61]

M4

VSS[62]

M5

VSS[63]

M12

VSS[64]

M13

VSS[65]

M14

VSS[66]

M15

VSS[67]

M16

VSS[68]

M17

VSS[69]

M24

VSS[70]

M27

VSS[71]

M28

VSS[72]

N1

VSS[73]

N2

VSS[74]

N5

VSS[75]

N6

VSS[76]

N11

VSS[77]

N12

VSS[78]

N13

VSS[79]

N14

VSS[80]

N15

VSS[81]

N16

VSS[82]

N17

VSS[83]

N18

VSS[84]

N24

VSS[85]

N25

VSS[86]

N26

VSS[87]

P3

VSS[88]

P4

VSS[89]

P12

VSS[90]

P13

VSS[91]

P14

VSS[92]

P15

VSS[93]

P16

VSS[94]

P17

VSS[95]

P24

VSS[96]

P27

VSS[97]

ICH7_BGA652~D

VSS[98]

VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]

P28
R1
R11
R12
R13
R14
R15
R16
R17
R18
T6
T12
T13
T14
T15
T16
T17
U4
U12
U13
U14
U15
U16
U17
U24
U25
U26
V2
V13
V15
V24
V27
V28
W6
W24
W25
W26
Y3
Y24
Y27
Y28
AA1
AA24
AA25
AA26
AB4
AB6
AB11
AB14
AB16
AB19
AB21
AB24
AB27
AB28
AC2
AC5
AC9
AC11
AD1
AD3
AD4
AD7
AD8
AD11
AD15
AD19
AD23
AE2
AE4
AE8
AE11
AE13
AE18
AE21
AE24
AE25
AF2
AF4
AF8
AF11
AF27
AF28
AG1
AG3
AG7
AG11
AG14
AG17
AG20
AG25
AH1
AH3
AH7
AH12
AH23
AH27

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

2

Date: Sheet

Compal Electronics, Inc.

ICH7-M(4/4)

HBL50 LA-2921P

1

0.3

of

29 59Friday, November 11, 2005

A

PIDE_DD0
PIDE_DD1
PIDE_DD2
PIDE_DD3
PIDE_DD4
PIDE_DD5
PIDE_DD6

1 1

R798
10K_0402_5%

@

1 2

12

R799
10K_0402_5%

8040@

2 2

3 3

4 4

PIDE_DD7
PIDE_DD8
PIDE_DD9
PIDE_DD10
PIDE_DD11
PIDE_DD12
PIDE_DD13
PIDE_DD14
PIDE_DD15

PIDE_DA0
PIDE_DA1
PIDE_DA2
PIDE_CS0#
PIDE_CS1#

PIDE_HIOCS16#
PIDE_INTRQ
PIDE_DMACK#
PIDE_DIORDY
PIDE_DIOR#
PIDE_DIOW#
PIDE_DREQ
PIDE_R_RESET#

T32
PAD

PAD
T33

+1.8VS +3VS

0.1U_0402_16V4Z

+5VS

1000P_0402_50V7K

PIDE_RESET#
PIDE_DD7
PIDE_DD6
PIDE_DD5
PIDE_DD4
PIDE_DD3
PIDE_DD2
PIDE_DD1
PIDE_DD0

PIDE_DREQ
PIDE_DIOW#
PIDE_DIOR#
PIDE_DIORDY
PIDE_DMACK#
PIDE_INTRQ
PIDE_DA1
PIDE_DA0
PIDE_CS0# PIDE_CS1#
PIDE_LED#

U26

62

HDD0

64

HDD1

2

HDD2

5

HDD3

7

HDD4

11

HDD5

13

HDD6

15

HDD7

14

HDD8

12

HDD9

10

HDD10

6

HDD11

3

HDD12

1

HDD13

63

HDD14

61

HDD15

50

HDA0

51

HDA1

49

HDA2

48

HCS0#

47

HCS1#

52

HIOCS16#

53

HINTRQ

54

HDMACK#

55

HIORDY

58

HDIOR#

59

HDIOW#

60

HDMARQ

16

HRESET#

46

HPDIAG#

UAO

45

UAI

43

0.1U_0402_16V4Z

1

C501

8040@

2

Place closed to Connector

PIDE_DIORDY

PIDE_DREQ
PIDE_INTRQ
PIDE_DD7

0.1U_0402_16V4Z

1

C868

2

PATA HDD Conn.

UART

UAO
UAI

88SA8040_QFN64

8040@

1

1

C488

C515

8040@

8040@

4.7U_0805_10V4Z

2

2

1 2

R419 4.7K_0402_5%8040@

1 2

R807 33_0402_5%8040@

1 2

R408 5.6K_0402_5%8040@

1 2

R426 10K_0402_5%8040@

1 2

R356 10K_0402_5%@

1

C869

2

1U_0603_10V4Z

JP33

112
334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344

OCTEK_HDD-22SG1G_NR

Parallel ATA

1

C530

2

SATA

Config & Debug

Power

10U_0805_10V4Z

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44

CNFG2
CNFG1
CNFG0

ATAIOSEL

XTLIN/OSC

XTLOUT

VDDIO_0
VDDIO_1

VDD_0
VDD_1
VDD_2

GND_0
GND_1
GND_2

PIDE_RESET#PIDE_R_RESET#

1

C531

2

PIDE_DD8
PIDE_DD9
PIDE_DD10
PIDE_DD11
PIDE_DD12
PIDE_DD13
PIDE_DD14
PIDE_DD15

PCSEL

R417 475_0402_1%

PIDE_PDIAG#
PIDE_DA2

32

TXP

31

TXM

27

RXP

28

RXM

17

RST#

33

T0

34

T1

35

T2

36

T3

37

T4

38

T5

39

T6

40

T7

20
19
18
21

22
23

26

ISET

44
4
9
41
56
24

VAA1

29

VAA2

25

VSS1

30

VSS2

8
42
57

0.1U_0402_16V4Z

+3VS

10U_0805_10V4Z

1 2

+5VS+5VS

(NEW)

A

B

SATA_DTX_IRX_P0
SATA_DTX_IRX_N0
SATA_ITX_C_DRX_P0
SATA_ITX_C_DRX_N0

SATA_RESET#

T2

R804 10K_0402_5%@

T3
T5

T6

CNFG1
CNFG0
ATAIOSEL

SATA_XTALI
SATA_XTALO

R415 12.1K_0603_1%

1 2

0.1U_0402_16V4Z

1

C505

8040@

2

1

C867

2

1 2

R797 10K_0402_5%8040@

1 2

R421 4.7K_0402_5%8040@

1 2

R805 10K_0402_5%@

1 2

R406 10K_0402_5%@

1 2

R397 10K_0402_5%@

1 2

R407 10K_0402_5%8040@

1 2

8040@

+3VS
+1.8VS

R424

0_0603_5%

1 2

@

1

1

C489

C516

8040@

8040@

2

2

0.1U_0402_16V4Z

B

SATA_ITX_C_DRX_P0 27
SATA_ITX_C_DRX_N0 27

+1.8VS_VDDA

1

C866

8040@

0.01U_0402_16V7K

2

1

C519

8040@

4.7U_0805_10V4Z

2

+3VS

1

C504

8040@

2

0.1U_0402_16V4Z

1 2

L31 MBK1608121YZF_06038040@

1

C517

8040@

4.7U_0805_10V4Z

2

2005/09/04

PIDE_DD2 IDE_DD2
PIDE_DD12 IDE_DD12
PIDE_DD3 IDE_DD3
PIDE_DD11 IDE_DD11
PIDE_DD4
PIDE_DD10
PIDE_DD5
PIDE_DD9
PIDE_DD6
PIDE_DD8
PIDE_DD7
PIDE_RESET#
PIDE_DD0
PIDE_DD14
PIDE_DD1
PIDE_DD13

1 2

R713 0_0402_5%PATA@

1 2

R714 0_0402_5%PATA@

1 2

R715 0_0402_5%PATA@

1 2

R716 0_0402_5%PATA@

1 2

R717 0_0402_5%PATA@

1 2

R718 0_0402_5%PATA@

1 2

R719 0_0402_5%PATA@

1 2

R720 0_0402_5%PATA@

1 2

R721 0_0402_5%PATA@

1 2

R722 0_0402_5%PATA@

1 2

R723 0_0402_5%PATA@

1 2

R724 0_0402_5%PATA@

1 2

R725 0_0402_5%PATA@

1 2

R726 0_0402_5%PATA@

1 2

R727 0_0402_5%PATA@

1 2

R728 0_0402_5%PATA@

Security Classification

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

IDE_DD4
IDE_DD10
IDE_DD5
IDE_DD9
IDE_DD6
IDE_DD8
IDE_DD7
IDE_RST#
IDE_DD0
IDE_DD14
IDE_DD1
IDE_DD13

Issued Date

C

SATA_XTALI SATA_XTALO

1

C498
12P_0402_50V8J

8040@

2

Y4

1 2

25MHZ_12PF_1BG25000CK1B

R411 1M_0402_5%

8040@

12P_0402_50V8J

+3VS

2005/09/04

SATA_DTX_C_IRX_N027

SATA_DTX_C_IRX_P027

PIDE_DIOR#
PIDE_DIOW#
PIDE_DREQ
PIDE_DD15 IDE_DD15
PIDE_DA1
PIDE_INTRQ
PIDE_DMACK#
PIDE_DIORDY
PIDE_CS1#
PIDE_CS0#
PIDE_DA2

IDE_RST# 31

PIDE_DA0

PIDE_LED#
PIDE_PDIAG#

2005/06/20 2006/06/20

C

SATA_RESET#

12

R800
0_0402_5%

8040@

1

C500

8040@

2

SATA_ITX_C_R_DRX_P0
SATA_ITX_C_R_DRX_N0

SATA_DTX_R_IRX_N0
SATA_DTX_R_IRX_P0

SATA_DTX_C_IRX_N0

SATA_DTX_C_IRX_P0

IDE_DD[0..15]
IDE_DA[0..2]

1 2

R729 0_0402_5%PATA@

1 2

R730 0_0402_5%PATA@

1 2

R731 0_0402_5%PATA@

1 2

R732 0_0402_5%PATA@

1 2

R733 0_0402_5%PATA@

1 2

R734 0_0402_5%PATA@

1 2

R735 0_0402_5%PATA@

1 2

R736 0_0402_5%PATA@

1 2

R737 0_0402_5%PATA@

1 2

R738 0_0402_5%PATA@

1 2

R739 0_0402_5%PATA@

1 2

R740 0_0402_5%PATA@

1 2

R435 0_0402_5%PATA@

1 2

R428 0_0402_5%PATA@

Compal Secret Data

Deciphered Date

D

+3VS

0_0402_5%8040@

2005/10/20

IDE_RST#

SATA

SATA_ITX_C_DRX_P0
SATA_ITX_C_DRX_N0

SATA_DTX_IRX_N0
SATA_DTX_IRX_P0

SATA_DTX_IRX_N0

SATA_DTX_IRX_P0

12

R395
100K_0402_5%

R394

@

1 2

1

C486

@

1U_0603_10V4Z

2

ICH7M SATA Bridge

SATA@
2 3
1 4

RP45 0_0404_4P2R_5%

SATA@
2 3
1 4

RP46 0_0404_4P2R_5%

1 2

C507 3900P_0402_50V7K

1 2

C510 3900P_0402_50V7K

Place closed to U21

IDE_DD[0..15] 27,31

IDE_DA[0..2] 27,31

IDE_DIOR#
IDE_DIOW#
IDE_DDREQ

IDE_DA1
IDE_IRQ
IDE_DDACK#
IDE_DIORDY
IDE_DCS3#
IDE_DCS1#
IDE_DA2
IDE_DA0

IDE_LED#
IDE_PDIAG#

IDE_DIOR# 27,31
IDE_DIOW# 27,31
IDE_DDREQ 27,31

IDE_IRQ 27,31
IDE_DDACK# 27,31
IDE_DIORDY 27,31
IDE_DCS3# 27,31
IDE_DCS1# 27,31

IDE_LED# 31,40
IDE_PDIAG# 31

For PATA HDD+ODD only

D

E

SATA SATA

R

+3VS

1

C865

0.1U_0402_16V4Z

2

SATA@

Connector

SATA HDD Conn.

JP32

1

SATA_ITX_C_R_DRX_P0
SATA_ITX_C_R_DRX_N0

SATA_DTX_R_IRX_N0
SATA_DTX_R_IRX_P0

+3VS

+5VS

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

SATA Bridge

HBL50 LA-2921P

GND

2

HTX+

3

HTX-

4

GND

5

HRX-

6

HRX+

7

GND

8

VCC3.3

9

VCC3.3

10

VCC3.3

11

GND

12

GND

13

GND

14

VCC5

15

VCC5

16

VCC5

17

GND

18

RESERVED

19

GND

20

VCC12

21

VCC12

22

VCC12

OCTEK_SAT-22SG1G_NR

(NEW)

Change Library

30 59Friday, November 11, 2005

E

of

0.3

A

Placea caps. near ODD CONN.

+5VS

0.1U_0402_16V4Z

C206

+5VS

1

C207

2

1U_0603_10V4Z

IDE_DIOW#27,30

IDE_DIORDY27,30

IDE_IRQ27,30

IDE_DCS1#27,30

IDE_LED#30,40

+5VS +5VS

1 2

R133 475_0402_1%@

1 2

R134 475_0402_1%

1

1 1

2 2

2

1000P_0402_50V7K

IDE_CSEL
Grounding for Master (When use SATA HDD)
Open or Hi gh fo r Slave r (N ormal)

1

C205

2

B

10U_0805_10V4Z

1

C231

2

IDE_RST#
IDE_DD7
IDE_DD6
IDE_DD5
IDE_DD4

IDE_DD2
IDE_DD1
IDE_DD0

IDE_DIOW#
IDE_DIORDY
IDE_IRQ

IDE_DA1

IDE_DA0
IDE_DCS1#
IDE_LED#

IDE_CSEL

1

C232

2

10U_0805_10V4Z

+5VS

C

JP24

1
3
5
7
9

11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49

OCTEK_CDR-50JL1G

(NEW)

R146 100K_0402_5%

2005/10/20

2

1

2

4

3

4

6

5

6

8

7

8

10

9

10

12

11

12

14

13

14

16

15

16

18

17

18

20

19

20

22

21

22

24

23

24

26

25

26

28

27

28

30

29

30

32

31

32

34

33

34

36

35

36

38

37

38

40

39

40

42

41

42

44

43

44

46

45

46

48

47

48

50

49

50

12

IDE_DD[0..15]27,30

IDE_DA[0..2]27,30

IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13IDE_DD3
IDE_DD14
IDE_DD15
IDE_DDREQ
IDE_DIOR#

IDE_DDACK#
IDE_PDIAG#

IDE_DA2
IDE_DCS3#

IDE_LED#

1 2

IDE_PDIAG#

IDE_DD[0..15]
IDE_DA[0..2]

IDE_DDREQ 27,30
IDE_DIOR# 27,30

IDE_DDACK# 27,30

R149

100K_0402_5%

IDE_DCS3# 27,30

IDE_PDIAG# 30

D

+5VS

E

IDE_HRESET#28

PLT_RST#6,26,28,34,39,40

F

IDE_HRESET#
PLT_RST#

NC7SZ08P5X_NL_SC70-5

G

+3VS

C293

0.1U_0402_16V4Z

1 2

5

U6

2

P

B

1

A

G

3

IDE_RST#

4

Y

IDE_RST# 30

H

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

C

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2005/06/20 2006/06/20

E

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

F

Date: Sheet

Compal Electronics, Inc.

ODD & SATA HDD Connector
HBL50 LA-2921P

G

0.3

of

31 59Friday, November 11, 2005

H

A

+3VS

40mil

0.1U_0402_16V4Z

1

1

C863

C857

0.1U_0402_16V4Z

1 2

R662 43K_0402_5%

SM_CD#

1 1

+3VS

2 2

3 3

2

2

0.1U_0402_16V4Z

1

C848

2

0.1U_0402_16V4Z

MFUNC5[3:0] = (0 1 0 1)
MFUNC5[4] = 1

1

C861

2

MS_PWREN#33

0.1U_0402_16V4Z

PCI_CBE#[0..3]26,34,36,38

PCI_AD[0..31]26,34,36,38

+3VS

SDCK_XDWE#33

1

C862

2

12

1

2

B

0.1U_0402_16V4Z

1

C850

2

CLK_PCI_PCM

R393

10_0402_5%@

C485

15P_0402_50V8J@

1 2

R663 10K_0402_5%

R368
0_0402_5%

@

1

C849

2

0.1U_0402_16V4Z

PCI_AD[0..31]
PCI_CBE#[0..3]

CLK_SD_48M

12

R678

1

C858

2

1 2

R681 33_0402_5%4IN1@

1 2

SDCM_XDALE33

SDDA0_XDD733
SDDA1_XDD033
SDDA2_XDCL33
SDDA3_XDD433

10_0402_5%@

15P_0402_50V8J@

PCI_FRAME#26,34,36,38

PCI_DEVSEL#26,34,36,38

CLK_PCI_PCM14

PCI_AD20

PCI_PIRQA#26
PCI_PIRQB#26

SD_PWREN#33

CLK_SD_48M14

C

+3VS

VPPD033
VPPD133
VCCD0#33
VCCD1#33

PCI_RST#26,34,36,37,38

PCI_IRDY#26,34,36,38

PCI_TRDY#26,34,36,38
PCI_STOP#26,34,36,38

PCI_PERR#26,34,36,38
PCI_SERR#26,34,36

PCI_PAR26,34,36,38
PCI_REQ#226
PCI_GNT#226

1 2

R680 100_0402_5%

SERIRQ28,39,40
5IN1_LED#40
SDOC#33

+VCC_SD

SD_CD#33
SD_WP#33

VPPD0
VPPD1
VCCD0#
VCCD1#

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0

PCI_RST#

PCI_REQ#2
CLK_PCI_PCM

SD_PULLHIGH

SM_CD#
5IN1_LED#

SDOC#

PCI_RST#

SD_CD#
SD_WP#
SD_PWREN#

CLK_SD_48M
SD_CLK

SDCM_XDALE
SDDA0_XDD7
SDDA1_XDD0
SDDA2_XDCL
SDDA3_XDD4

U22

C2

AD31

C1

AD30

D4

AD29

D2

AD28

D1

AD27

E4

AD26

E3

AD25

E2

AD24

F2

AD23

F1

AD22

G2

AD21

G3

AD20

H3

AD19

H4

AD18

J1

AD17

J2

AD16

N2

AD15

M3

AD14

N3

AD13

K4

AD12

M4

AD11

K5

AD10

L5

AD9

M5

AD8

K6

AD7

M6

AD6

N6

AD5

M7

AD4

N7

AD3

L7

AD2

K7

AD1

N8

AD0

E1

CBE3#

J3

CBE2#

N1

CBE1#

N5

CBE0#

G4

PCIRST#

J4

FRAME#

K1

IRDY#

K3

TRDY#

L1

DEVSEL#

L2

STOP#

L3

PERR#

M1

SERR#

M2

PAR

A1

PCIREQ#

B1

PCIGNT#

H1

PCICLK

L8

RIOUT#_PME#

L11

SUSPEND#

F4

IDSEL

K8

MFUNC0

N9

MFUNC1

K9

MFUNC2

N10

MFUNC3

L10

MFUNC4

N11

MFUNC5

M11

MFUNC6

J9

MFUNC7

M10

GRST#

E7

VCC_SD

E8

SDCD#

F8

SDWP/SMWPD#

G7

SDPWREN33#

H5

SDCLKI

F6

SDCLK/SMWE#

E5

SDCMD/SMALE

E6

SDDAT0/SMDATA7

F7

SDDAT1/SMDATA0

F5

SDDAT2/SMCLE

G6

SDDAT3/SMDATA4

G5

GND_SD

+S1_VCC

N12

M12

N13

M13

VPPD0

VPPD1

VCCD0#

VCCD1#

PCI Interface

SD/MMC/MS/SM

G13

A7

VCCA1

VCCA2

GND1D3GND2H2GND3L4GND4M8GND5

K2

N4

L6

C8

L9

H11

D12

B4

VCC3

VCC4

VCC5

VCC9

VCC6

VCC7

VCC8

VCC10

CAD15/IOWR#

CAD13/IORD#

CCBE3#/REG#

CCBE0#/CE1#

CARDBUS

CRST#/RESET

CFRAME#/A23

CDEVSEL#/A21

CSERR#/WAIT#

CREQ#/INPACK#

CSTSCHG/BVD1_STSCHG#

CCLKRUN#/WP_IOIS16#

CBLOCK#/A19

CINT#/READY_IREQ#

CAUDIO/BVD2_SPKR#

MSPWREN#/SMPWREN#

MSBS/SMDATA1

MSCLK/SMRE#
MSDATA0/SMDATA2
MSDATA1/SMDATA6
MSDATA2/SMDATA5
MSDATA3/SMDATA3

GND6

GND7

GND8

CB714_LFBGA169

B6

4IN1@

F12

K11

C10

G1

F3

VCC2

VCC1

CAD31/D10

CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6

CAD19/A25

CAD18/A7
CAD17/A24
CAD16/A17

CAD14/A9
CAD12/A11

CAD11/OE#

CAD10/CE2#

CAD9/A10

CAD8/D15

CAD7/D7

CAD6/D13

CAD5/D6

CAD4/D12

CAD3/D5

CAD2/D11

CAD1/D4
CAD0/D3

CCBE2#/A12

CCBE1#/A8

CIRDY#/A15

CTRDY#/A22
CSTOP#/A20

CPERR#/A14

CPAR/A13

CGNT#/WE#

CCLK/A16

SPKROUT

CCD2#/CD2#
CCD1#/CD1#

CVS2/VS2#

CVS1/VS1

CRSV3/D2
CRSV2/A18
CRSV1/D14

MSINS#

SMBSY#

SMCD#

SMWP#

SMCE#

B2
C3
B3
A3
C4
A6
D7
C7
A8
D8
A9
C9
A10
B10
D10
E12
F10
E13
F13
F11
G10
G11
G12
H12
H10
J11
J12
K13
J10
K10
K12
L13

B7
A11
E11
H13

B9
B11
A12
A13
B13
C12
C13
A5
D13
B8
C11
B12

C5
D5

D11
D6
M9

B5
A4

L12
D9
C6
A2
E10
J13

H7
J8
H8
E9
G9
H9
G8
F9

H6
J7
J6
J5

S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3

S1_REG#
S1_A12
S1_A8
S1_CE1#

S1_RST
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A14
S1_WAIT#
S1_A13
S1_INPACK#
S1_WE#

S1_BVD1
S1_WP

S1_A19
S1_RDY#
PCM_SPK#

S1_BVD2
S1_CD2#

S1_CD1#
S1_VS2
S1_VS1
S1_D2
S1_A18
S1_D14

XD_PWREN#
MSBS_XDD1
MS_CLK
MSD0_XDD2
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3

XD_CD#
XD_WP#

R661

2.2K_0402_5%

4IN1@

1 2

D

1 2

R416 33_0402_5%

R683 33_0402_5%4IN1@

1 2

S1_IOWR# 33
S1_IORD# 33
S1_OE# 33

S1_CE2# 33

S1_REG# 33

S1_CE1# 33
S1_RST 33

S1_WAIT# 33
S1_INPACK# 33

S1_WE# 33

S1_A16

S1_BVD1 33
S1_WP 33

S1_RDY# 33
PCM_SPK# 44

S1_BVD2 33
S1_CD2# 33

S1_CD1# 33
S1_VS2 33
S1_VS1 33

XD_BSY# 33
XD_CD# 33
XD_WP# 33
XD_CE# 33

S1_A[0..25]
S1_D[0..15]

MS_INS# 33
XD_PWREN# 33
MSBS_XDD1 33

MSCLK_XDRE# 33
MSD0_XDD2 33
MSD1_XDD6 33
MSD2_XDD5 33
MSD3_XDD3 33

E

S1_A[0..25] 33
S1_D[0..15] 33

+3VS

2

1

1

C859

0.1U_0402_16V4Z

2

1

C860

0.1U_0402_16V4Z

2

1

C472

4.7U_0805_10V4Z

2

+S1_VCC

1

C864

0.1U_0402_16V4Z

2

S1_CD2# S1_CD1#

C506
10P_0402_50V8K

C487

2

10P_0402_50V8K

1

**CB714 use B0 version

4 4

A

B

CB714 P/N: SA007140B50
CB1410 P/N: SA014100310

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

D

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

Cardbus Controller CB714
HBL50 LA-2921P

E

of

32 59Friday, November 11, 2005

0.3

A

PCMCIA Power Control

+S1_VCC

1 1

W=40mil

C479
10U_0805_10V4Z

1

2

1

C480

2

0.1U_0402_16V4Z

W=40mil

1

C482
10U_0805_10V4Z

2

2 2

1

C481

2

0.1U_0402_16V4Z

+5VS

+3VS

12

R396
10K_0402_5%

U23

9

12V

5

5V

6

5V

3

3.3V

4

3.3V

7

VCCD0#

R392 10K_0402_5%

VCCD1#

R389 10K_0402_5%

VCC
VCC
VCC

VPP

VCCD0
VCCD1
VPPD0
VPPD1

OC

GND

SHDN

CP2211FD3_SSOP16

16

1 2
1 2

40mil

13
12
11

10

1
2
15
14

8

VCCD0#
VCCD1#
VPPD0
VPPD1

SD/MS Power Control

XD Power Control

+3VS

R191

10K_0402_5%

4IN1@

XD_PWREN#

3 3

SD_PWREN#32
MS_PWREN#32

SD_PWREN#

1 2

12

R190
0_0402_5%

4IN1@

U9

1

GND

2

IN

3

IN

4

EN#

G528_SO8

4IN1@

XD_PWREN#

1 2

R209 0_0603_5%

OUT
OUT
OUT
FLG

4IN1@

40mil

+VCC_XD+3VS

8
7
6
5

12

R589
300_0402_5%

4IN1@

13

D

2

G

S

+VCC_SD+VCC_XD

40mil

+3VS

SDOC#

Q34
2N7002_SOT23

4IN1@

B

+S1_VPP

1

2

R192
10K_0402_5%

4IN1@

1 2

C522

0.1U_0402_16V4Z

VCCD0# 32
VCCD1# 32
VPPD0 32
VPPD1 32

SDOC# 32XD_PWREN#32

C

+S1_VCC

1

C502

10U_0805_10V4Z

2

+S1_VPP

1

C493

2

10U_0805_10V4Z

S1_OE#

1 2

R684 43K_0402_5%

S1_WP

R410 43K_0402_5%

S1_RST

1 2

R429 43K_0402_5%

S1_CE1#

1 2

R679 43K_0402_5%

S1_CE2#

1 2

R682 43K_0402_5%

xD PU and PD. Close to Socket

+3VS +VCC_XD

R208 43K_0402_5%4IN1@

+VCC_XD

1 2

R203 2.2K_0402_5%4IN1@

1 2

R196 2.2K_0402_5%4IN1@

1 2

R201 2.2K_0402_5%4IN1@

1 2

R205 2.2K_0402_5%4IN1@

Reserve for SD,MS CLK.
Close to Socket

SDCK_XDWE#

C783 10P_0402_50V8K

MSCLK_XDRE#

C788 10P_0402_50V8K

C520

12

XD_CD#

12

MSCLK_XDRE#

1 2

1 2

1

C494

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

2

SDCK_XDWE#

XD_CE#
XD_BSY#

4IN1@

4IN1@

+S1_VCC
+S1_VCC
+S1_VCC
+S1_VCC
+S1_VCC

+VCC_SD

C793

4IN1@

10U_0805_10V4Z

C754

4IN1@

10U_0805_10V4Z

S1_A[0..25]32
S1_D[0..15]32

1

4IN1@

2

0.1U_0402_16V4Z

1

4IN1@

2

SDDA3_XDD432

SDDA0_XDD732

1

C804

4IN1@

0.1U_0402_16V4Z

2

1

C753

0.1U_0402_16V4Z

2

SDDA1_XDD032
MSBS_XDD132
MSD0_XDD232
MSD3_XDD332

MSD2_XDD532
MSD1_XDD632

SDCK_XDWE#32

XD_WP#32

SDCM_XDALE32

XD_CD#32

XD_BSY#32

MSCLK_XDRE#32

XD_CE#32

SDDA2_XDCL32

C803

S1_A[0..25]

S1_D[0..15]

1

2

SDDA1_XDD0
MSBS_XDD1
MSD0_XDD2
MSD3_XDD3
SDDA3_XDD4
MSD2_XDD5
MSD1_XDD6
SDDA0_XDD7

SDCK_XDWE#
XD_WP#
SDCM_XDALE
XD_CD#
XD_BSY#
MSCLK_XDRE#
XD_CE#
SDDA2_XDCL

PCMCIA Socket

S1_INPACK#32

JP27

34

XD-VCC

SD / MMC / MS(PRO) / XD

26

XD-D0

27

XD-D1

28

XD-D2

29

XD-D3

30

XD-D4

31

XD-D5

32

XD-D6

33

XD-D7

24

XD-WE

25

XD-WP

23

XD-ALE

18

XD-CD

19

XD-R/B

20

XD-RE

21

XD-CE

22

XD-CLE

TAITW_R007-520-L3

4IN1@

D

S1_CD1#32

S1_CE1#32

S1_CE2#32

S1_OE#32
S1_VS132

S1_IORD#32

S1_IOWR#32

S1_WE#32

S1_RDY#32

+S1_VCC
+S1_VCC

+S1_VPP
+S1_VPP

S1_VS232
S1_RST32

S1_WAIT#32

S1_REG#32

S1_BVD232
S1_BVD132

S1_WP32

S1_CD2#32

4 IN 1 CONN

S1_D3

S1_CD1#

S1_D4

S1_D11

S1_D5

S1_D12

S1_D6

S1_D13

S1_D7

S1_D14

S1_CE1#

S1_D15

S1_A10

S1_CE2#

S1_OE#
S1_VS1

S1_A11

S1_IORD#

S1_A9

S1_IOWR#

S1_A8
S1_A17
S1_A13
S1_A18
S1_A14
S1_A19

S1_WE#

S1_A20

S1_RDY#

S1_A21

S1_A16
S1_A22
S1_A15
S1_A23
S1_A12
S1_A24

S1_A7
S1_A25

S1_A6

S1_VS2

S1_A5

S1_RST

S1_A4

S1_WAIT#

S1_A3

S1_INPACK#

S1_A2

S1_REG#

S1_A1

S1_BVD2

S1_A0

S1_BVD1

S1_D0

S1_D8

S1_D1

S1_D9

S1_D2

S1_D10

S1_WP

S1_CD2#

SD-VCC

MS-VCC

SD-CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3

SD-CMD

SD-CD-SW

SD-WP-SW

MS-SCLK
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3

MS-INS

MS-BS

4IN1-GND
4IN1-GND

1

GND

35

GND

2

DATA3

36

CD1#

3

DATA4

37

DATA11

4

DATA5

38

DATA12

5

DATA6

39

DATA13

6

DATA7

40

DATA14

7

CE1#

41

DATA15

8

ADD10

42

CE2#

9

OE#

43

VS1#

10

ADD11

44

IORD#

11

ADD9

45

IOWR#

12

ADD8

46

ADD17

13

ADD13

47

ADD18

14

ADD14

48

ADD19

15

WE#

49

ADD20

16

READY

50

ADD21

17

VCC

51

VCC

18

VPP

52

VPP

19

ADD16

53

ADD22

20

ADD15

54

ADD23

21

ADD12

55

ADD24

22

ADD7

56

ADD25

23

ADD6

57

VS2#

24

ADD5

58

RESET

25

ADD4

59

WAIT#

26

ADD3

60

INPACK#

27

ADD2

61

REG#

28

ADD1

62

BVD2

29

ADD0

63

BVD1

30

DATA0

64

DATA8

31

DATA1

65

DATA9

GND

32

DATA2

GND

66

DATA10

33

WP

67

CD2#

34

GND

68

GND

SANTA_130601-7_LT

4 IN 1 Socket

(HDQ70)

14
3

SDCK_XDWE#

15

SDDA0_XDD7

16

SDDA1_XDD0

17

SDDA2_XDCL

11

SDDA3_XDD4

12

SDCM_XDALE

13

SD_CD#

2

SD_WP#

35

MSCLK_XDRE#

4

MSD0_XDD2

8

MSD1_XDD6

9

MSD2_XDD5

7

MSD3_XDD3

5

MS_INS#

6

MSBS_XDD1

10
1

36

E

JP9

(NEW)

69
70

+VCC_SD+VCC_XD

SD_CD# 32

SD_WP# 32

MS_INS# 32

4 4

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

D

Date: Sheet of

Compal Electronics, Inc.

PCMCIA Socket

HBL50 LA-2921P

E

33 59Friday, November 11, 2005

0.3

+3VALW

4.7U_0805_10V4Z

PCI_AD0

D D

C C

B B

PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5

PCI_AD11 AD11
PCI_AD14 AD14
PCI_AD16 AD16

BLM18AG601SN1D_0603

+3VALW

BLM18AG601SN1D_0603

+2.5V_LAN

BLM18AG601SN1D_0603

+3VALW

BLM18AG601SN1D_0603

+2.5V_LAN

+3VALW

+3VS
+3VS

PCI_FRAME#26,32,36,38

PCI_TRDY#26,32,36,38

PCI_DEVSEL#26,32,36,38

PCI_PERR#26,32,36,38
PCI_SERR#26,32,36

PCI_PIRQF#26

PM_CLKRUN#28,36,39

LAN_PME#26,36,40

ICH_PCIE_WAKE#28,36,37

PCIE_PTX_C_IRX_P328
PCIE_PTX_C_IRX_N328

PCIE_ITX_C_PRX_P328
PCIE_ITX_C_PRX_N328

CLK_PCI_LAN

(SA00000OD10) (SA00000SZ00)

4401E(10/100 LAN) 5789(10/100/1000 LAN)

PIN
RDAC 1.27K 1.24K

A A

4401@
5789@ StuffNo_Stuff
5787@ No_Stuff
8789@ StuffNo_Stuff

@ No_Stuff No_Stuff

5

0.1U_0402_16V4Z

1

1

C359

2

0.1U_0402_16V4Z

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2

+LAN_XTALVDD

1

C336

0.1U_0402_16V4Z

2

+LAN_BIASVDD

1

C314

0.1U_0402_16V4Z

2

PCI_AD[0..31]26,32,36,38

1 2
1 2
1 2

C381 0.1U_0402_16V4Z8789@
C380 0.1U_0402_16V4Z8789@

CLK_PCIE_LAN14

CLK_PCIE_LAN#14

1

2

R206 0_0402_5%4401@

R211 0_0402_5%4401@
R176 0_0402_5%4401@

R204 0_0402_5%4401@
R242 0_0402_5%4401@
R243 0_0402_5%8789@

1 2
1 2

C379

2

R237 0_0402_5%4401@
R216 0_0402_5%5787@
R232 0_0402_5%4401@
R221 0_0402_5%5787@
R231 0_0402_5%4401@
R230 0_0402_5%5787@
R228 0_0402_5%4401@
R217 0_0402_5%5787@
R229 0_0402_5%4401@
R218 0_0402_5%5787@
R236 0_0402_5%4401@
R215 0_0402_5%5787@

R783 0_0402_5%4401@
R784 0_0402_5%4401@
R785 0_0402_5%4401@

L23

1 2

4401@

L22

1 2

8789@

L19

1 2

4401@

L18

1 2

8789@

R177 4.7K_0402_5%5787@
R808 4.7K_0402_5%5789@
R212 1K_0402_5%@

PCI_CBE#026,32,36,38
PCI_CBE#126,32,36,38
PCI_CBE#226,32,36,38
PCI_CBE#326,32,36,38

PCI_IRDY#26,32,36,38

PCI_STOP#26,32,36,38

PCI_RST#26,32,36,37,38

PLT_RST#6,26,28,31,39,40
PCI_GNT#326
PCI_REQ#326

12

R178
10_0402_5%

@

1

C302
18P_0402_50V8J

@

2

4401E(10/100 LAN) 5789(10/100/1000 LAN)BOM structure

Stuff No_Stuff

5

0.1U_0402_16V4Z

1

C350

C355

2

AD0
AD1
AD2
AD3
AD4
AD5

2005/10/20

PCI_AD[0..31]

SERR#

CBE#1

R213 0_0402_5%4401@

1 2

R172 0_0402_5%4401@

1 2

PCI_AD17

R179 100_0402_5%4401@

1 2

1 2
1 2

1 2
1 2
1 2

2005/09/21

+3VS

PCI_PAR26,32,36,38

CLK_PCI_LAN14

R175 0_0402_5%

1 2

R182 0_0402_5%@

1 2

PCIE_ITX_C_PRX_P3
PCIE_ITX_C_PRX_N3

5789 only

R193 4.7K_0402_5%5789@

1 2

R194 4.7K_0402_5%@

1 2

(SA00000YJ00)

5787(10/100/1000 LAN)

1.24K

5787(10/100/1000 LAN)

No_Stuff Stuff

+2.5V_LAN

0.1U_0402_16V4Z

AD0
AD1
AD2
AD3 LAN_MIDI2­AD4
AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
AD11
PCI_AD12
PCI_AD13
AD14
PCI_AD15
AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

CBE#1
CBE#3

1 2

DEVSEL#
PERR#

SERR#

CLK_PCI_LAN

LAN_INTA#
LAN_RESET#

PM_CLKRUN#

PCIE_PTX_IRX_P3
PCIE_PTX_IRX_N3

No_Stuff
No_Stuff

Stuff
No_Stuff

1

C317

8789@

2

LAN_IDSEL

4

0.1U_0402_16V4Z

1

C311

8789@

2

0.1U_0402_16V4Z

C387 100U_B2_4VM

C361 0.1U_0402_16V4Z

U13A

M7

AD0/(NC)

N7

AD1/(NC)

P7

AD2/(NC)

P5

AD3/(NC)

N5

AD4/(NC)

M5

AD5/(NC)

P4

AD6/(NC)

N4

AD7/(NC)

P3

AD8/(NC)

N3

AD9/(NC)

N2

AD10/(NC)

M1

AD11/(NC)

M2

AD12/(NC)

M3

AD13/(NC)

L1

AD14/(NC)

L2

AD15/(NC)

K1

AD16/(NC)

E3

AD17/(NC)

D1

AD18/(NC)

D2

AD19/(NC)

D3

AD20/(NC)

C1

AD21/(NC)

B1

AD22/(NC)

B2

AD23/(NC)

D4

AD24/(NC)

A5

AD25/(NC)

B5

AD26/(NC)

B6

AD27/(NC)

C6

AD28/(NC)

C7

AD29/(NC)

C8

AD30/(NC)

C9

AD31/(NC)

M4

CBE0#/(NC)

L3

CBE1#/(NC)

F3

CBE2#/(NC)

C4

CBE3#/(NC)

A4

IDSEL/(NC)

F2

FRAME#/(NC)

F1

IRDY#/(NC)

G3

TRDY#/(NC)

H3

DEVSEL#/(NC)

H1

STOP#/(NC)

J2

PERR#/(ATTN_IND#)

A2

SERR#/(ATTN_BTTN#)

J1

PAR/(NC)

A3

PCI_CLK/(NC)

H2

INTA#/(PWR_IND#)

C2

PCI_RST#/(PERST#)

J3

GNT#/(NC)

C3

REQ#/(NC)

H4

CLKRUN#/(NC)

A6

PME#/(WAKE#)

N6

NC_N6/(PCIE_TXDP)

P6

NC_P6/(PCIE_TXDN)

P10

RESERVED_P10/(PCIE_RXDP)

N10

RESERVED_N10/(PCIE_RXDN)

N8

RESERVED_N8/(REFCLK+)

P8

RESERVED_P8/(REFCLK-)

F4

DC_F4/(REFCLK_SEL)

BCM4401E_BCM5789

4401@

+LAN_18_12

+LAN_18_12

4

1

C384

8789@

2

+REGOUT25

12

+

8789@

Colsed to M14

1 2

BCM4401E
/(BCM5789)

L21

BLM18AG601SN1D_0603

1 2

1

C322

4.7U_0805_10V4Z

BLM18AG601SN1D_0603

1 2

4.7U_0805_10V4Z

2

L24

C326

+PLLVDD

1

2

1 2

+3VALW

R224 0_0805_5%4401@

1 2

+3VS

R223 0_0805_5%5789@

5789 only

R214 0_0603_5%4401@

1 2

R220 0_0603_5%8789@

1 2

DC_E13/(TRD3+)

DC_E14/(TRD3-)

DC_D13/(TRD2+)

DC_D14/(TRD2-)

TRD1+

TRD1-

TRD0+

TRD0-

PLLVDD/(GPHY_PLLVDD)

REGSUP18_1/(REGSUP25)
REGSUP18_0/(REGSUP12)

DC_J13/(REGCTL12)

REG18OUT/(REGSEN12)

REGSUP18/(REGOUT25)

SPROM_CS/(EEDATA)

SPROM_CLK/(EECLK)

SPROM_DOUT/(NC)

SPROM_DIN/(NC)

GPIO0/(GPIO0_TST_CLKOUT)

+AVDDL

VAUX_PRSNT

GPIO1

DC_G13/(GPIO2)

LINK_LED10/(LINKLED#)

LINK_LED100/(SPD100LED#)

COL_LED/(SPD1000LED#)
ACT_LED/(TRAFFICLED#)

TRST#

XTALVDD

XTALO

EEDATA_PXE/(SI)

EECLK_PXE/(SCLK)

EXT_POR/(DC)

VREF/(NC)

TEST_MODE/(LOW_PWR)

DC_D8/(PCIE_TST)

BIASVDD

1

C320

0.47U_0603_16V4Z

2

1

C330

0.1U_0402_16V4Z

2

3

+3V_LAN

0.1U_0402_16V4Z

1

1

2

4.7U_0805_10V4Z

LAN_MIDI3+

E13

LAN_MIDI3-

E14

LAN_MIDI2+

D13
D14

LAN_MIDI1+

C13

LAN_MIDI1-

C14

LAN_MIDI0+

B13

LAN_MIDI0-

B14

+PLLVDD

G14

L14
K14

J13

J14

+REGOUT25

M14

SPROM_CS

L10

SPROM_CLK

K11

SPROM_DOUT

J11

SPROM_DIN

N13

R181 1K_0402_5%

J12

R168 10K_0402_5%@

G12

SPROM_WP

H13

R197 10K_0402_5%

G13

A11
B11

R180 0_0402_5%8789@

TCK

TDO
TMS

XTALI

RDAC

A12
B10

D7
H12

TDI

D6
C11
D12

H14
N12
P12

E12
E11

L9
K13
L6

D8

A14
A10

1

2

1 2

TCK

TMS
TRST#

+LAN_XTALVDD

LAN_XTALI

R171 10K_0402_5%
R174 4.7K_0402_5%5789@

+LAN_BIASVDD

R165 1.27K_0402_1%4401@
R173 1.24K_0402_1%8789@

1 2

25MHZ_20PF_6X25000017

C382
27P_0402_50V8J

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

C319

C363

2

+3VALW
+2.5V_LAN

LAN_MIDI3+ 35
LAN_MIDI3- 35
LAN_MIDI2+ 35
LAN_MIDI2- 35
LAN_MIDI1+ 35
LAN_MIDI1- 35
LAN_MIDI0+ 35
LAN_MIDI0- 35

+3VALW

Q4

MMJT9435T1G_SOT223

1

8789@

2 3

4

0.1U_0402_16V4Z

1 2
1 2

1 2

8789@

R166 4.7K_0402_5%4401@

1 2

R184 4.7K_0402_5%5789@

1 2

R167 4.7K_0402_5%

1 2

R219 200_0402_5%

1 2

1 2
1 2

1 2
1 2

Y1

LAN_XTALOLAN_XTALI

27P_0402_50V8J

2005/06/20 2006/06/20

0.1U_0402_16V4Z

1

1

2

0.1U_0402_16V4Z

C333

C328

2

For BCM4401E

SPROM_CS
SPROM_CLK
SPROM_DOUT
SPROM_DIN

Place closed to L14 & K14

C360 0.1U_0402_16V4Z

1 2

C354 4.7U_0805_10V4Z

1 2

+LAN_18_12

1

1

C348

1

2

LAN_LINK# 35

C383

C352
10U_0805_10V4Z

2

2

+3VALW

LAN_ACTIVITY# 35

LAN_XTALOXTALO

+LAN_18_12

+LAN_18_12

Compal Secret Data

Deciphered Date

+LAN_18_12

4.7U_0805_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+2.5V_LAN

2

+LAN_18_12

0.1U_0402_16V4Z

1

C341

2

4.7U_0805_10V4Z

U8

1

CS

VCC

2

SK

NC

3

DI

NC

4

DO

GND

AT93C46-10SI-2.7_SO8

4401@

+3V_LAN

C376

12

C351

12

C358

12

C324

12

+3VALW

+AVDDL
+PCIE_PLLVDD

+PCIE_SDSVDD

+AVDD_A13
+AVDD_F14

L26

BLM18AG601SN1D_0603

1 2

8789@

C400

8789@

4.7U_0805_10V4Z

L25

BLM18AG601SN1D_0603

1 2

8789@

C378

8789@

4.7U_0805_10V4Z

2

1

C318

2

8
7
6
5

B8
E5
E6
E7
E8
E9

E10

F5

F10

G4

J4
J5

J10

K4
K5
K6
K7
K8

A7
B3

C5

E1
E4

G1

K3
L4
P2

P1

G2

A1

D11
G11

K12

F12
F13

M8
M6

A8

D5

P13
A13
F14

+PCIE_PLLVDD

1

2

+PCIE_SDSVDD

1

2

0.1U_0402_16V4Z

1

C312

2

0.1U_0402_16V4Z

+3VALW

1

C301

0.1U_0402_16V4Z

4401@

2

U13B

VDDC_B8

BCM4401E

VDDC_E5
VDDC_E6

/(BCM5789)

VDDC_E7
VDDC_E8
VDDC_E9
VDDC_E10
VDDC_F5
VDDC_F10
VDDC_G4
VDDC_J4
VDDC_J5
VDDC_J10
VDDC_K4
VDDC_K5
VDDC_K6
VDDC_K7
VDDC_K8

VDDIOPCI_A7
VDDIOPCI_B3
VDDIOPCI_C5
VDDIOPCI_E1
VDDIOPCI_E4
VDDIOPCI_G1
VDDIOPCI_K3
VDDIOPCI_L4
VDDIOPCI_P2

VESD1
VESD2
VESD3

VDDIO_D11
VDDIO_G11
VDDIO_K12

AVDD_F12/(AVDDL)
AVDD_F13/(AVDDL)
DC_M8/(PCIE_PLLVDD)
DC_M6/(PCIE_SDS_VDD)

DC_A8/(VDDP)
DC_D5/(VDDP)
DC_P13/(VDDP)

DC_A13/(AVDD)
DC_F14/(AVDD)

BCM4401E_BCM5789

4401@

D9
D10

1

C385

8789@

0.1U_0402_16V4Z

2

1

C377

8789@

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

1

C347

2

0.1U_0402_16V4Z

For BCM5789

1K_0402_5%

SPROM_WP
SPROM_CLK
SPROM_CS

R244 0_0402_5%5787@

1 2

R245 0_0402_5%5787@

1 2

+2.5V_LAN

+2.5V_LAN

Title

Size Document Number Rev

B

Date: Sheet

1

1

C346

2

1K_0402_5%

12

R188

R187

8789@

8789@

DC_A9/(NC)
DC_B9/(NC)

DC_C10/(NC)

DC_C12/(CS#)

DC_D9/NC)
DC_D10/(NC)
DC_F11/(SO)

DC_K9

DC_K10

DC_L5

DC_L7/(NC)

DC_L8

DC_H11

DC_L11
DC_L12/(NC)
DC_L13/(NC)

DC_M9

DC_M10/(NC)

DC_M11
DC_M12/(NC)
DC_M13/(NC)
DC_N11/(NC)
DC_N14/(NC)
DC_P11/(NC)
DC_P14/(NC)

VSS_B4

VSS_B7

VSS_B12

VSS_E2

VSS_F6

VSS_F7

VSS_F8

VSS_F9

VSS_G5

VSS_G6

VSS_G7

VSS_G8

VSS_G9

VSS_G10

VSS_H5

VSS_H6

VSS_H7

VSS_H8

VSS_H9

VSS_H10

VSS_J6
VSS_J7
VSS_J8

VSS_J9
VSS_K2
VSS_N1
VSS_N9
VSS_P9

BLM18AG601SN1D_0603

1 2

BLM18AG601SN1D_0603

1 2

L17

L20

C345

2

+3VALW

12

12

A9
B9
C10
C12
D9
D10
F11
K9
K10
L5
L7
L8
H11
L11
L12
L13
M9
M10
M11
M12
M13
N11
N14
P11
P14

B4
B7
B12
E2
F6
F7
F8
F9
G5
G6
G7
G8
G9
G10
H5
H6
H7
H8
H9
H10
J6
J7
J8
J9
K2
N1
N9
P9

8789@

8789@

1

C303

2

0.1U_0402_16V4Z

R189
1K_0402_5%

8789@

C12
D9
D10

5787@

R250 4.7K_0402_5%

1 2

CTL25

R251 0_0402_5%5787@

1 2

R234 0_0402_5%5787@

1 2

R233 0_0402_5%5787@

1 2

+AVDD_A13

1

2

+AVDD_F14

1

2

Compal Electronics, Inc.

LAN BCM4401E/Jade15

HBL50 LA-2921P

1

1 2

8789@

C315

0.1U_0402_16V4Z

U7

8

VCC

7

WP

6

SCL

5

SDA

AT24C256_SO8

8789@

R806

1 2

1

A0

2

A1

3

NC

4

GND

5787@

4.7K_0402_5%

+3VALW

1 2

C388

5787@

0.1U_0402_16V4Z

1 2

C389

5787@

4.7U_0805_10V4Z

Q5

MBT35200MT1G_TSOP6

5787@

3

+REGOUT25

41

256

Change Q5 P/N:SB000004M10

ICH_SMBDATA 14,28,36,37
ICH_SMBCLK 14,28,36,37

C313

8789@

0.1U_0402_16V4Z

C327

8789@

0.1U_0402_16V4Z

of

34 59Friday, November 11, 2005

0.3

5

4

3

2

1

LAN BCM4401E/ BCM5789

D D

Place these components colsed to LAN chip

unpop when use BCM4401E(10/100)

GbE Transformer: GST5009 (SP050005610)
10/100 Transformer : TST1284-LF (SP050001X10)

12

R151
0_0603_5%

4401@

1

C245

C188

2

0.1U_0402_16V4Z

RJ45_MIDI3+
RJ45_MIDI3-

RJ45_MIDI2+
RJ45_MIDI2-

T31

1

TCT1

MCT1

2

TD1+

MX1+

3

TD1-

MX1-

4

TCT2

MCT2

5

TD2+

MX2+

TD2-6MX2-

7

TCT3

MCT3

8

TD3+

MX3+

9

TD3-

MX3-

10

TCT4

MCT4

11

TD4+

MX4+

12

TD4-

MX4-

0.5u_GST5009

4401@

1

C215

0.1U_0402_16V4Z

2

R141 0_0402_5%4401@

1 2

R137 0_0402_5%4401@

1 2

R144 0_0402_5%4401@

1 2

R143 0_0402_5%4401@

1 2

75_0402_1%

24
23
22

21
20
19

18
17
16

15
14
13

R147

12

R142

75_0402_1%

12

R145
75_0402_1%

RJ45_TER2

12

RJ45_TER3

12

RJ45_MIDI3-

RJ45_MIDI3+

RJ45_MIDI2-

RJ45_MIDI2+

RJ45_MIDI1-

RJ45_MIDI1+

RJ45_MIDI0-

RJ45_MIDI0+

R135
75_0402_1%

RJ45_GND

+3VALW

+3VALW

LAN_ACTIVITY#34

L55

MBK1608301YZF_0603

LAN_LINK#34

L56

MBK1608301YZF_0603

LAN_ACTIVITY#

R132 300_0402_5%

12

LAN_LINK#

R155 300_0402_5%

12

RJ45_GND LANGND

12

RJ45_MIDI3­RJ45_MIDI3+
RJ45_MIDI1­RJ45_MIDI2­RJ45_MIDI2+
RJ45_MIDI1+
RJ45_MIDI0­RJ45_MIDI0+

12

R163

5789@

R158

0189@

1

C288

0.1U_0402_16V4Z

5789@

2

12

12

R164

5789@

49.9_0402_1%

12

12

R157

49.9_0402_1%

0189@

1

C285

0189@

0.1U_0402_16V4Z

2

LAN_MIDI3­LAN_MIDI3+

LAN_MIDI2­LAN_MIDI2+

LAN_MIDI1­LAN_MIDI1+

LAN_MIDI0­LAN_MIDI0+

+2.5V_LAN +3VALW

12

R154
0_0603_5%

8789@

0.1U_0402_16V4Z

1

1

C258

2

2

0.1U_0402_16V4Z

1

C287

0.1U_0402_16V4Z

5789@

2

12

12

49.9_0402_1%

C C

B B

R161

5789@

49.9_0402_1%

LAN_MIDI3-34
LAN_MIDI3+34

LAN_MIDI2-34
LAN_MIDI2+34

LAN_MIDI1-34
LAN_MIDI1+34

LAN_MIDI0-34
LAN_MIDI0+34

R160

49.9_0402_1%

0189@

R162

5789@

12

12

R159

49.9_0402_1%

0189@

1

C286

0189@

0.1U_0402_16V4Z

2

49.9_0402_1%

49.9_0402_1%

reseved for BCM4401E(10/100)

1 2

C932
220P_0402_50V7K

JP23

12

Amber LED-

11

Amber LED+

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

10

Green LED-

9

Green LED+

SUYIN_100073FR012S100ZL

1 2

C933
220P_0402_50V7K

1 2

C284
1000P_1206_2KV7K

SHLD4
SHLD3

SHLD2
SHLD1

1

C296

2

0.1U_0402_16V4Z

16
15

14
13

1

C298

4.7U_0805_10V4Z

2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/06/20 2006/06/20

3

Compal Secret Data

Deciphered Date

Title

Size Do cument Number Rev

B

2

Date: Sheet of

Compal Electronics, Inc.

LAN Magnetic & RJ45/RJ11

HBL50 LA-2921P

35 59Friday, Novem ber 11, 2005

1

0.3

A

B

C

D

E

+3VALW

1

1

C795

C792

2

0.1U_0402_16V4Z

2

ICH_PCIE_WAKE#28,34,37

MINI1_CLKREQ#14

CLK_PCIE_MINI1#14

CLK_PCIE_MINI114

1

C14

MINI1@

4.7U_0805_10V4Z

2

1

C605

MINI1@

0.1U_0402_16V4Z

2

ICH_PCIE_W AKE#
WLAN_BT_DATA
WLAN_BT_CLK

2005/09/05

PCIE_PTX_C_IRX_N428

PCIE_PTX_C_IRX_P428

PCIE_ITX_C_PRX_N428
PCIE_ITX_C_PRX_P428

+5VS

+3VALW

PCI_RST# 26,32,34,37,38
+3VS
PCI_GNT#1 26

MINI_PME# 26,34,40

WLAN_BT_CLK 42

PCI_AD18

PCI_PIRQG# 26

+3VS +3VALW

1

C450

MINI2@

4.7U_0805_10V4Z

2

MINI2_CLKREQ#14

CLK_PCIE_MINI2#14

CLK_PCIE_MINI214

1

C420

MINI2@

0.1U_0402_16V4Z

2

ICH_PCIE_W AKE#
WLAN_BT_DATA
WLAN_BT_CLK

2005/09/05

PCIE_PTX_C_IRX_N228
PCIE_PTX_C_IRX_P228

PCIE_ITX_C_PRX_N228

PCIE_ITX_C_PRX_P228

+3VS

2005/09/27 modified.
Base on OPTION GTM351E Datasheet Rev0.1

Vcc 3.3V +/- 8%
Peak Icc 2750mA
with max supply droop 50mA
Average Icc 1000mA

+UIM_PWR

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/06/20 2006/06/20

+UIM_PWR
UIM_RESET
UIM_CLK

UIM_VPP
UIM_DATA

1

2

Compal Secret Data

Deciphered Date

@

@

1

2

C847

22P_0402_50V8J

U49

1

K1

2

A

3

C846

K2

0.1U_0402_16V4Z
NNCD6.8RL-A

@

1

C603

MINI1@

4.7U_0805_10V4Z

2

JP17

1

1

3
5
7

D

2

3

4

5

6

7

8
9910
111112
131314
151516

171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152

G153G254G355G3

FOX_AS0B226-S99N-7F

56

MINI1@

+1.5VS

1

C436

MINI2@

4.7U_0805_10V4Z

2

JP30

1

1

3
5
7
9

K4

K3

2

3

4

5

6

7

8

9

10
111112
131314
151516

171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152

G153G254G355G3

FOX_AS0B226-S99N-7F

56

MINI2@

C836 1U_0603_10V4Z

1 2

@

1

5

2

4

2
4
6
8
10
12
14
16

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

2
4
6
8
10
12
14
16

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

@

C845

(MINI1_LED#)

1

2

22P_0402_50V8J

1

C602

MINI1@

0.1U_0402_16V4Z

2

C421

MINI2@

0.1U_0402_16V4Z

(WWAN_LED#)

@

1

2

C843

1

C604

MINI1@

0.1U_0402_16V4Z

2

MINI1_OFF#
PLT_RST_BUF#

ICH_SMBCLK
ICH_SMBDATA

1

C429

MINI2@

0.1U_0402_16V4Z

2

+UIM_PWR
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP

MINI2_OFF#
PLT_RST_BUF#

ICH_SMBCLK
ICH_SMBDATA

+UIM_PWR

1
3
5
7
9

11

22P_0402_50V8J

Title

Size Document Number Rev

B

Date: Sheet

JP31

GND1
IAC_SDATA_OUT
GND2
IAC_SYNC
IAC_SDATA_IN
IAC_RESET#

Connector for MDC Rev1.5

Compal Electronics, Inc.

HBL50 LA-2921P

1

C801

2

RINGTIP

+3VS

1

C394

4.7U_0805_10V4Z

2

W=40mils

W=40mils
W=40mils

PCI_GNT#1

WLAN_BT_CLK
PCI_AD30

PCI_AD28
PCI_AD26
PCI_AD24
MINI_IDSEL1

PCI_AD22
PCI_AD20

PCI_AD18
PCI_AD16

PCI_FRAME#
PCI_TRDY#
PCI_STOP#

PCI_DEVSEL#
PCI_AD15

PCI_AD13
PCI_AD11

PCI_AD9
PCI_CBE#0

PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

AUDIO_INR

W=40mils

1

C796

0.1U_0402_16V4Z

2

1000P_0402_50V7K

R598

1 2

100_0402_5%

PCI_PAR 26,32,34,38

PCI_FRAME# 26,32,34,38
PCI_TRDY# 26,32,34,38
PCI_STOP# 26,32,34,38

PCI_DEVSEL# 26,32,34,38PCI_PERR#26,32,34,38

PCI_CBE#0 26,32,34,38

TV_THERM# 40,56

AUDIO_INR 42

+3VALW

0.1U_0402_16V4Z

1

C794

1 1

2 2

3 3

2

1000P_0402_50V7K

PCI_PIRQH#26

CLK_PCI_MINI

12

R241
10_0402_5%@

1

C395
10P_0402_50V8K@

2

+5VS

1

2

1

C393

WLAN_BT_DATA42

C392

10U_0805_10V4Z

2

WL_OFF#40

S_YIN42 S_CIN 42

CLK_PCI_MINI14

PCI_REQ#126

PCI_CBE#326,32,34,38

PCI_CBE#226,32,34,38

PCI_IRDY#26,32,34,38

PM_CLKRUN#28,34,39

PCI_SERR#26,32,34

PCI_CBE#126,32,34,38

CVBS_IN42

AUDIO_INL42

1000P_0402_50V7K

WL_OFF#

RB751V_SOD323

W=40mils

+3VS

S_YIN S_CIN
CLK_PCI_MINI
PCI_REQ#1
PCI_AD31

PCI_AD29
PCI_AD27

PCI_AD25
WLAN_BT_DATA

PCI_AD23
PCI_AD21

PCI_AD19
PCI_AD17

PCI_CBE#2
PCI_IRDY#

PCI_SERR#
PCI_PERR#

PCI_CBE#1
PCI_AD14

PCI_AD12
PCI_AD10

PCI_AD8
PCI_AD7

PCI_AD5
CVBS_IN
PCI_AD3

+5VS

PCI_AD1

AUDIO_INL

+5VS

W=30mils W=20mils

1

C797

2

W=40mils

1000P_0402_50V7K

1

C798

2

0.1U_0402_16V4Z

PCI_AD[0..31]

D10

21

101
103
105
107
109
111
113
115
117
119
121
123

P-TWO_A53921-A0G16-P

1

C800

2

JP28

112

KEY KEY

334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
535354
555556
575758
595960
616162
636364
656566
676768
696970
717172
737374
757576
777778
797980
818182
838384
858586
878788
898990
919192
939394
959596
979798
9999100
101

102

103

104

105

106

107

108

109

110

111

112

113

114

115

116

117

118

119

120

121

122

123

124

0.1U_0402_16V4Z

PCI_AD[0.. 3 1] 26,32,34,38

2
4

6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

(Change to SP070003200)

+5VS

A

1

C895

0.1U_0402_16V4Z

2

GEN@

USB20_N3 28
USB20_P3 28

Power

+3VS
+3VALW
+1.5VS

Mini Card Power Rating
Primary Power (mA)
Peak Normal
1000
330
500

750
250
375

B

Auxiliary Power (mA)

Normal

250 (wake enable)
5 (Not wake enable)

2005/09/06

JP38

1

1

2

4 4

2

3

3

4

4

5

5

6

GND1

7

GND2

ACES_88266-05001

GEN@

+3VALW+3VS +1.5VS

1

C601

MINI1@

0.1U_0402_16V4Z

2

+3VS
+1.5VS

MINI1_OFF# 40
PLT_RST_BUF# 25,26,39

+3VALW

ICH_SMBCLK 14,28,34,37
ICH_SMBDATA 14,28,34,37

1

C386

MINI2@

0.1U_0402_16V4Z

2

+3VS

MINI2_OFF# 40

USB20_N7 28
USB20_P7 28

2

RES0

4

RES1

6

3.3V

8

GND3

10

GND4

12

ACES_88018-124G

18

@

+1.5VS

JP43

1
2
3
4
5
6

ACES_85201-0605

+UIM_PWR

+3VALW

+UIM_PWR
UIM_RESET
UIM_CLK

UIM_VPP
UIM_DATA

GND13GND14GND15GND16GND17GND

IAC_BITCLK

MINI-PCI Slot (WLAN)

E

0.3

of

36 59Friday, November 11, 2005

A

B

C

D

E

New Card Power Switch

U32

+3VS

1 1

EXP@

R431 100K_0402_5%

EXP@

+3VALW

2 2

10U_0805_10V4Z

EXP@

1 2

R436 100K_0402_5%

1 2

SUSP#40,41,43,49,54
SYSON40,49,55

PCI_RST#26,32,34,36,38

+3VS +1.5VS+3VALW

1

C524

2

1

C541

10U_0805_10V4Z

2

EXP@

+3VALW

+1.5VS

CP_USB#
CP_PE#
SUSP#
SYSON
PCI_RST#

5

3.3Vin1

6

3.3Vin2

21

3.3Vaux_in

18

1.5Vin1

19

1.5Vin2

14

CPUSB#

15

CPPE#

4

STBY#
SHDN#3RCLKEN

2

SYSRST#

GND

11

1

C523

10U_0805_10V4Z

2

EXP@

3.3Vout1

3.3Vout2

Aux_out

1.5Vout1

1.5Vout2

PERST#

NC11NC210NC312NC413NC5

24

60mils

7
8

40mil

20

40mil

16
17

23

OC#

RCLKEN1

22

PERST1#

9

TPS2231PWPR_PWP24

EXP@

+3VS_CARD1

+3VALW_CARD1

+1.5VS_CARD1

+3VALW_CARD1 +3VS_CARD1 +1.5VS_CARD1

1

C540

10U_0805_10V4Z

EXP@

10K_0402_5%

EXP@

RCLKEN1

2

R686

G

1

C871

2

2

0.1U_0402_16V4Z

EXP@

+3VS

10K_0402_5%

12

13

D

S

EXP@

CLKREQ1#

NC7SZ32P5X_NL_SC70-5 EXP@
Q36
2N7002_SOT23

EXP@

R685

1

C525

10U_0805_10V4Z

2

EXP@

+3VS +3VS

12

2

B

1

A

Imax = 1.35A Imax = 0.75AImax = 0.275A

0.1U_0402_16V4Z

EXP@

5

U50

Vcc

Y

G

3

1

C872

2

1

C873

0.1U_0402_16V4Z

2

EXP@

4

1

C534

10U_0805_10V4Z

2

EXP@

EXP_CLKREQ# 14

1

C870

2

0.1U_0402_16V4Z

EXP@

New Card Socket (Left)

USB20_N128

2005/08/31

ICH_SMBDATA14,28,34,36

+1.5VS_CARD1

ICH_PCIE_WAKE#28,34,36

+3VALW_CARD1

CLK_PCIE_CARD#14
CLK_PCIE_CARD14

PCIE_PTX_C_IRX_N128
PCIE_PTX_C_IRX_P128

PCIE_ITX_C_PRX_N128
PCIE_ITX_C_PRX_P128

USB20_P128

ICH_SMBCLK14,28,34,36

+3VS_CARD1

CP_PE#28

CP_USB#

PERST1#

CLKREQ1#
CP_PE#

JP34

1

GND

2

USB_D-

3

USB_D+

4

CPUSB#

5

RSV

6

RSV

7

SMB_CLK

8

SMB_DATA

9

+1.5V

10

+1.5V

11

WAKE#

12

+3.3VAUX

13

PERST#

14

+3.3V

15

+3.3V

16

CLKREQ#

17

CPPE#

18

REFCLK-

19

REFCLK+

20

GND

21

PERn0

22

PERp0

23

GND

24

PETn0

25

PETp0

26

GND

27

GND

28

GND

TYCO_1759056-1

EXP@

(NEW)

USB CONN. 1 & 2

+USB_VCCA+USB_VCCA

+USB_VCCA

1

+

C651

3 3

USB_EN#40,42

+5VALW

1

C668

4.7U_0805_10V4Z

2

USB_EN#

U39

1
2
3
4

G528_SO8

GND
IN
IN
EN#

OUT
OUT
OUT

8
7
6
5

FLG

+USB_VCCA

+3VALW

12

R533
100K_0402_5%

10K_0402_5%

1 2

R534

1

C642

0.1U_0402_16V4Z

2

USB_OC#0 28

150U_D_6.3VM

2

USB20_N028
USB20_P028

1

C644
470P_0402_50V7K

2

USB20_P0

1

2

SUYIN_020173MR004S312ZL

D29

4

VCC

GND

3

I/O

I/O

PRTR5V0U2X_SOT143@

2005/09/06 2005/09/06

JP5

1
2
3
4

ECQ60 ECQ60

+USB_VCCA

+USB_VCCA

1

+

C681
150U_D_6.3VM

2

USB20_N228
USB20_P228

SUYIN_020173MR004G533ZR_4P

4 4

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

D

USB20_P2 USB20_N2USB20_P0 USB20_N0

W=80milsW=80mils

1

C689
470P_0402_50V7K

2

USB20_N2USB20_N0
USB20_P2

D28

1

GND

2

I/O

PRTR5V0U2X_SOT143@

SUYIN_020173MR004G533ZR_4P

Title

Size Document Number Rev

B

Date: Sheet

JP4

1
2
3
4

SUYIN_020173MR004S312ZL

4

VCC

I/O

+USB_VCCA

3

Compal Electronics, Inc.

NEW CARD SOCKET

HBL50 LA-2921P

E

0.3

of

37 59Friday, November 11, 2005

A

B

C

D

E

C402

0.1U_0402_16V4Z

1394@

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10

PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

PCI_STOP#
PCI_PERR#
PCI_PAR
PCI_PIRQE#

CLK_PCI_1394

PCI_GNT#0
PCI_REQ#0
1394_IDSEL

PCI_IRDY#
PCI_TRDY#

PCI_DEVSEL#

PCI_FRAME#

12

R319

10_0402_5%@

1

C456

10P_0402_50V8K@

2

+2.5VS_1394

1

2

C462

0.1U_0402_16V4Z

1394@

+2.5VS_1394

U15

94

AD31

95

AD30

96

AD29

97

AD28

98

AD27

101

AD26

102

AD25

103

AD24

106

AD23

107

AD22

109

AD21

113

AD20

114

AD19

115

AD18

116

AD17

117

AD16

2

AD15

3

AD14

4

AD13

7

AD12

8

AD11

9

AD10

10

AD9

11

AD8

14

AD7

PCI I/F

15

AD6

16

AD5

18

AD4

19

AD3

20

AD2

24

AD1

25

AD0

104

CBE3#

119

CBE2#

1

CBE1#

12

CBE0#

125

STOP#

127

PERR#

128

PAR

88

INTA#

89

PCIRST#

90

PCICLK

92

GNT#

93

REQ#

105

IDSEL

34

PME#

121

IRDY#

123

TRDY#

124

DEVSEL#

120

FRAME#

1

C414

0.1U_0402_16V4Z

2

1394@

+3VS

111

122

VDD446VDD330VDD221VDD1

VCC699VCC536VCC417VCC35VCC2

VT6311S

OSCILLATOR

PHY PORT0

PHY PORT1

GNDATX166GNDARX165GNDATX280GNDARX279GND19

GND18

GND17

GND16

GND1591GND1061GND956GND847GND738GND633GND531GND423GND322GND26GND113GND0

118

112

108

100

1

C438

0.1U_0402_16V4Z

2

1394@

110

PVA587PVA486PVA373PVA272PVA162PVA0

VCC1

EEPROM

others

1

C396

0.1U_0402_16V4Z

2

1394@

20mils

+1394_PLLVDD

59

EECS

EEDO

SDA/EEDI

SCL/EECK

PHYRST#

BJT_CTL

I2CEN

PWRDET

REG_FB

REG_OUT

XCPS

XREXT

XI

XO

XTPB0M

XTPB0P

XTPA0M

XTPA0P

XTPBIAS0

XTPB1M

XTPB1P

XTPA1M

XTPA1P

XTPBIAS1

NC17
NC16
NC15
NC14
NC13
NC12
NC11
NC10

NC9
NC8
NC7
NC6
NC5
NC4
NC3
NC2
NC1
NC0

VT6311S_LQFP128

126

1394@

26
27
28
29

55
81
43
32

84
85
60

63
57
58
67

68
69
70
71

74
75
76
77
78

83
82
64
54
53
52
51
50
49
48
45
44
42
41
40
39
37
35

0.1U_0402_16V4Z

EECS
EEDI

EECK

I2CEEN

REG_FB
REG_OUT

XREXT

10mils

1394_XI
1394_XO
TPB0-

TPB0+
TPA0­TPA0+
TPBIAS0

1

2

0.1U_0402_16V4Z

1

2

C448

1394@

1

2

C403

1394@

C422

1394@

0.1U_0402_16V4Z

2005/10/20

R261 4.7K_0402_5%1394@

1 2

C391 1U_0603_10V4Z1394@

1 2

R279 4.7K_0402_5%@

1 2

R246 4.7K_0402_5%@

1 2

R257 4.7K_0402_5%1394@

1 2

C407 0.1U_0402_16V4Z

1 2

1394@

R227 1K_0402_5%1394@

1 2

R235 6.19K_0603_1%1394@

1 2

C399 47P_0402_50V8J1394@

1 2

MBK1608301YZF_0603

1 2

1

C447

4.7U_0805_10V4Z

1394@

2

+3VS

VCC

SDA

+3VS

8
7

WP

SCL

6
5

2

B

EECK
EEDI

+3VS

31

E

Q35

2SB1197K_SOT23

C

@

+2.5VS_1394

12

R253
510_0402_5%

@

2005/10/20

U14

1

A0

2

A1

3

A2

4

GND

AT24C02N-10SU-2.7_SO8

@

EECK and EEDI is pull high internal

L27

1394@

+3VS

+3VS

C398

10P_0402_50V8K

1394@

1 2

Y2

1394@

24.576MHZ_16P_X8A024576FG1H

1 2

1 2

C401

10P_0402_50V8K

1394@

External pull h igh ci rcuit is unnecessary

When use ext er nal EEPROM
Populate U14, R246, R253
Un-populate R261

REG_OUT

REG_FB

When use external BJT
Populate Q35, R279

15mils

1

C445

0.33U_0603_10V7K

1394@

2

JP29

4

4

3

6

3

6

5

2

5

2

1

1

FOX_UV31413-4R1-TR

1394@

(ECQ60)

TPBIAS0
TPA0+
TPA0­TPB0+
TPB0-

12

R293

54.9_0402_1%

1394@

12

R275

54.9_0402_1%

1394@

1

C434
270P_0402_50V7K

1394@

2

12

R309

54.9_0402_1%

1394@

12

R289

54.9_0402_1%

1394@

12

R276

4.99K_0402_1%

1394@

+3VS

1

C461

0.1U_0402_16V4Z

2

1394@

1 1

2 2

3 3

4 4

1

C454

0.1U_0402_16V4Z

2

1394@

PCI_AD[0..31]26,32,34,36

IDSEL:PCI_AD16

PCI_AD16 1394_IDSEL

1 2

R341 100_0402_5%1394@

1

2

PCI_AD[0..31]

C463

0.1U_0402_16V4Z

1394@

PCI_CBE#326,32,34,36
PCI_CBE#226,32,34,36
PCI_CBE#126,32,34,36
PCI_CBE#026,32,34,36

PCI_STOP#26,32,34,36
PCI_PERR#26,32,34,36

PCI_PAR26,32,34,36

PCI_PIRQE#26

PCI_RST#26,32,34,36,37

CLK_PCI_139414

PCI_GNT#026
PCI_REQ#026

PCI_IRDY#26,32,34,36
PCI_TRDY#26,32,34,36

PCI_DEVSEL#26,32,34,36

PCI_FRAME#26,32,34,36

CLK_PCI_1394

1

2

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

D

Date: Sheet

Compal Electronics, Inc.

IEEE1394 VIA VT6311S

HBL50 LA-2921P

E

0.3

of

38 59Friday, November 11, 2005

SUPER I/O SMsC LPC47N207

+3VS

1

C786

FIR@

2

0.1U_0402_16V4Z

+3VS

0.1U_0402_16V4Z

1

C817

FIR@

2

1

C818

FIR@

0.1U_0402_16V4Z

2

+3VALW

+3VS

R601
10_0402_5%@

C822

15P_0402_50V8J@

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_DRQ#0
LPC_FRAME#
PM_CLKRUN#

SERIRQ
CLK_PCI_SIO
PLT_RST#
CLK_14M_SIO
SIO_PD#
SIO_PME#

CLK_PCI_SIO

+3VS
+3VS

1 2

R602 10K_0402_5%FIR@

1 2

R595 10K_0402_5%FIR@

CLK_14M_SIO

LPC_AD027,40
LPC_AD127,40
LPC_AD227,40
LPC_AD327,40

LPC_DRQ#027

LPC_FRAME#27,40

PM_CLKRUN#28,34,36

SERIRQ28,32,40

CLK_PCI_SIO14

PLT_RST#6,26,28,31,34,40

CLK_14M_SIO14

1 2

2

1

Place on the BOT side(near MINIPCI conn.)

+5VS

RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1

JP35

1
2
3
4
5
6
7
8
9

10

ACES_85201-10051

@

For SW debug use when no seial port

R600
33_0402_5%@

1 2
2

C821

22P_0402_50V8J@

1

U47

64

LAD0

2

LAD1

4

LAD2

7

LAD3

10

LPC_CLK_33

12

LDRQ1#

24

LDRQ0#

14

LFRAME#

16

CLKRUN#

19

SERIRQ

21

PCI_CLK

22

PCIRST#

23

SIO_14M

25

LPCPD#

47

IO_PME#

63

DLAD0

1

DLAD1

3

DLAD2

6

DLAD3

9

DLPC_CLK_33

11

DLDRQ1#

13

DLFRAME#

15

DCLKRUN#

18

DSER_IRQ

26

DSIO_14M

LPC47N207-JN_STQFP64

FIR@

RTS#1

Base I/O Address

0 = 02Eh

*

1 = 04Eh

DCD#1
RI#1
CTS#1
DSR#1

3.3V53.3V173.3V313.3V423.3V

LPC I/F

DLPC I/F

RP42

1 8
2 7
3 6
4 5

4.7K_1206_8P4R_5%

FIR@

60

48

VTR

GPIO12/IO_SMI#

GPIO13/IRQIN1
GPIO14/IRQIN2

RTS1#/SYSOPT0
DTR1#/SYSOPT1

SERIAL I/F

IRMODE/IRRX3

IR GPIO

GND08GND120GND229GND337GND445GND5

+3VS

GPIO10
GPIO11

GPIO15
GPIO16
GPIO17
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37

RXD1

TXD1

DRSR1#

CTS1#

RI1#

DCD1#

IRTX2
IRRX2

62

+3VS

5

19

LAD0
LAD1
LAD2
LAD3

LCLK
LFRAME#
LRESET#
SERIRQ
CLKRUN#
PP

1

2

10

VSB

VDD24VDD

VDD

TESTB1/BADD

TPM
SLB 9635 TT 1.1

GND4GND11GND18GND

25

FIR@

1 2

R195 0_1206_5%

FIR@

1 2

R202 0_1206_5%

IR1

2

IRED_C

4

RXD

6

VCC

8

GND

TFDU6102-TR3_8P

FIR@

Base I/O Address

0 = 02Eh
1 = 04Eh

28

LPCPD#

9
8

TEST1

14

XTALO

13

XTALI

2

GPIO2

6

GPIO

1

NC

3

NC

12

NC

SLB-9635-TT-1.2_TSSOP28

@

TPM_XTALI

TPM_XTALO

*

R437 0_0402_5%@

1 2

TPM_XTALO
TPM_XTALI

@

12

32.768KHZ_12.5P_1TJS125DJ2A073

10M_0402_5%

R448

+IR_ANODE

SUS_STAT# 28,41

C551

18P_0402_50V8J

1 2

X2

1

IN

4

OUT

@

1 2

@

C552
18P_0402_50V8J

W=60mil

1

IRED_A

3

TXD

5

SD/MODE

7

MODE

Title

Size Document Number Rev

B

Date: Sheet

IRTXOUT

T = 12mil

IRMODEIRRX

T = 12mil

Compal Electronics, Inc.

SIO1036 & FIR

HBL50 LA-2921P

U31

27
28
30
32
33
34
35
36
38
39
40
41
43
44
46
61

RXD1

52

TXD1

53

DSR#1

54

RTS#1

55

CTS#1

56

DTR#1

57

RI#1

58

DCD#1

59

IRTXOUT

49

IRRX

50

IRMODE

51

1 2

R603 10K_0402_5%FIR@

1 2

R599 10K_0402_5%FIR@

R198 10K_0402_5%FIR@
R199 10K_0402_5%FIR@

R591

10K_0402_5%

1 2
1 2

1 2

FIR@

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VS

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

CLK_PCI_TPM
LPC_FRAME#

SERIRQ

PM_CLKRUN#

CLK_PCI_TPM

R439
10_0402_5%@

1 2
2

C536

15P_0402_50V8J@

1

+3VS

+3VS

CLK_PCI_TPM14
PLT_RST_BUF#25,26,36

R432 4.7K_0402_5%@

1 2

FIR Module

FIR@

1 2

+3VS

R210
47_1206_5%

2005/06/20 2006/06/20

+IR_3VS

1

C357

FIR@

10U_0805_10V4Z

2

Compal Secret Data

W=40mil

1

C356

FIR@

0.1U_0402_16V4Z

2

Deciphered Date

+IR_3VS

26
23
20
17

21
22
16
27
15

7

C323

FIR@

4.7U_0805_10V4Z

12

R441

4.7K_0402_5%

@

12

R444

4.7K_0402_5%

@

@

2

NC

3

NC

0.3

of

39 59Friday, November 11, 2005

5

KBA[0..19]

ADB[0..7]

L28

1 2

FBM-L11-160808-800LMT_0603

D D

C C

+5VS

+3VALW

+3VALW

B B

+3VS

+5VALW

+5VS

+3VALW

A A

MINI_PME#26,34,36

LAN_PME#26,34,36

PCI_PME#26,34,36

RCIRRX42,46

RP14

1 8
2 7
3 6
4 5

4.7K_1206_8P4R_5%

RP15

1 8
2 7
3 6
4 5

10K_1206_8P4R_5%

RP22

1 8
2 7
3 6
4 5

100K_1206_8P4R_5%

1 2

R357 10K_0402_5%

RP19

1 8
2 7
3 6
4 5

4.7K_1206_8P4R_5%

22P_0402_50V8J@

KB_CLK
KB_DATA
PS_CLK
PS_DATA

FRD#
SELIO#
FSEL#

IE_BTN#
EMPWR_BTN#
E-MAIL_BTN#
USER_BTN#

5IN1_LED#

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

12

R2694.7K_0402_5%

12

R2684.7K_0402_5%

12

R2671K_0402_5%

12

R2661K_0402_5%

12

R2651K_0402_5%

KBA[0..19] 41
ADB[0..7] 41

ECAGND

C497

12

CLK_PCI_LPC14

+3VALW

R337

10K_0402_5%

D12

RB751V_SOD323

TP_CLK

TP_DATA

KBA1
KBA4
KBA5

5

20mil

R402 33_0402_5%@

R378
10K_0402_5%

1 2

EC_PME#

+3VALW

1 2

EC_RCIRRX

21

+3VALW

0.1U_0402_16V4Z

12

+3VALW

1 2

R706 100K_0402_5%

1 2

R369 100K_0402_5%

1 2

R403 100K_0402_5%

1 2

R708 100K_0402_5%

1 2

R709 100K_0402_5%

1 2

R710 100K_0402_5%

+3VALW

C492 0.1U_0402_16V4Z

12

12

R409 47K_0402_5%

1 2

R404 100K_0402_5%

1 2

R401 1K_0402_5%

1 2

R400 1K_0402_5%

1

C473

2

ENBKL
DPLL_TP
TEST_TP

4

+3VALW

C416

0.1U_0402_16V4Z

LPC_AD027,39
LPC_AD127,39
LPC_AD227,39

LPC_AD327,39
PLT_RST#6,26,28,31,34,39
SERIRQ28,32,39

FRD#41

FWR#41

FSEL#41

TP_CLK43

EC_SCI#28

ENBKL8,15
BKOFF#23

FSTCHG52

EC_SMI#28

LID_SW#43

BT_ON#42
SYSON37,49,55
SUSP#37,41,43,49,54

VR_ON56

0.1U_0402_16V4Z

1

1

C453

2

12

2

C467

1000P_0402_50V7K

2

1

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

FRD#
FWR#
FSEL#
SELIO#
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19 TV_THERM#
TV_BTN#

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

EMPWR_BTN#
EC_SCI#

E-MAIL_BTN#

IE_BTN#
ENBKL
BKOFF#

FSTCHG

EC_SMI#
IDE_LED#
USER_BTN#

3GSW_EN#
LID_SW#
BT_ON#
SYSON
SUSP#
VR_ON

BTSW_EN#
PBTN_OUT#

CAPS_LED#
NUM_LED#
SATA_LED#

KB_CLK
KB_DATA
PS_CLK
PS_DATA
TP_CLK
TP_DATA

15
14
13
10

165

18
25

24

150
151
173
152
138
139
140
141
144
145
146
147
124
125
126
127
128
131
132
133
143
142
135
134
130
129
121
120
113
112
104
103
108
105

110
111
114
115
116
117

163
164
169
170

20
21
22
27
28
48
62
63
69
70

75
109
118
119
148
149
155
156
162
168

55

54

23

41

19

31

C491

U20

LAD0
LAD1
LAD2
LAD3

9

LFRAME#
LRST#/GPIO2C
LCLK

7

SERIRQ
CLKRUN#/GPIO0C
LPCPD#/GPIO0B

RD#
WR#
MEMCS#
IOCS#
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1/XIOP_TP
A2
A3
A4/DMRP_TP
A5/EMWB_TP
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20/GPIO23
E51CS#/GPIO20/ISPEN

PSCLK1
PSDAT1
PSCLK2

PS2 Interface

PSDAT2
PSCLK3
PSDAT3

SCL1
SDA1
SCL2
SDA2

8

GPIO04
GPIO07
GPIO08
GPIO09
GPIO0D
GPIO0E
GPIO10
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO2A
GPIO2B
GPIO2D

FnLock#/GPIO12
CapLock#/GPIO011
NumLock#/GPIO0A
ScrollLock#/GPIO0F
ECRST#

5

GA20/GPIO02

6

KBRST#/GPIO03
ECSCI#

2

1

LPC Interface

1 2

FBM-L11-160808-800LMT_0603

C478
1000P_0402_50V7K

VCC16VCC34VCC45VCC

*

*

X-BUS Interface

SMBus

GPIO

*

*
*

*

MISC

0.1U_0402_16V4Z

1

2

LPC_FRAME#27,39

DSP_WP#45

3G_LED#42

3GSW_EN#
BTSW_EN#
WLSW_EN#

TV_BTN#
MUSIC_BTN#

MOVIE_BTN#

TV_BTN#42

R271 100K_0402_5%

TP_DATA43

EC_SMB_CK115,41,45,53
EC_SMB_DA115,41,45,53
EC_SMB_CK24
EC_SMB_DA24

EMPWR_BTN#42

E-MAIL_BTN#42

IE_BTN#42

IDE_LED#30,31

USER_BTN#42
EC_SWI#28

ARCADE#42

3GSW_EN#42

5IN1_LED#32

BTSW_EN#42
PBTN_OUT#28 EC_THERM# 28

CAPS_LED#42
NUM_LED#42 EAPD 44

SATA_LED#27

EC_GA2027

EC_KBRST#27

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

L29

+EC_VCCA

20mil

1

2

ECAGND

123

136

157

166

95

96

161

VCC

VCC

VCC

VCCA

AGND

Pulse Width

Wake Up Pin

ENE-KB910-B4

Analog To Digital

Digital To Analog

Expanded I/O

FAN

TEST_TP/GPIO05/FAN3PWM

Timer Pin

GND17GND35GND46GND

GND

GND

122

137

167

20mil

C423

0.1U_0402_16V4Z

159

GPOK0/KSO0
GPOK1/KSO1

VCCBAT

BATGND

GPOK2/KSO2
GPOK3/KSO3
GPOK4/KSO4
GPOK5/KSO5
GPOK6/KSO6
GPOK7/KSO7
GPOK8/KSO8

GPOK9/KSO9
GPOK10/KSO10
GPOK11/KSO11
GPOK12/KSO12
GPOK13/KSO13
GPOK14/KSO14
GPOK15/KSO15
GPOK16/KSO16
GPOK17/KSO17

GPIK0/KSI0
GPIK1/KSI1
GPIK2/KSI2
GPIK3/KSI3
GPIK4/KSI4

Internal Keyboard

GPIK5/KSI5
GPIK6/KSI6
GPIK7/KSI7

GPOW0/PWM0
GPOW1/PWM1

FAN2PWM/GPOW2/PWM2

GPOW3/PWM3
GPOW4/PWM4
GPOW5/PWM5
GPOW6/PWM6

FAN1PWM/GPOW7/PWM7

TIN1/GPWU6

TIN2/FANFB2/GPWU7

GPIAD0/AD0
GPIAD1/AD1
GPIAD2/AD2
GPIAD3/AD3
GPIAD4/AD4
GPIAD5/AD5
GPIAD6/AD6
GPIAD7/AD7

GPODA0/DA0

GPODA1/DA1

GPODA2/DA2

GPODA3/DA3

GPODA4/DA4

GPODA5/DA5

GPODA6/DA6

GPODA7/DA7

GPIO18/XIO8CS#

*

GPIO19/XIO9CS#

*

GPIO1A/XIOACS#

*
*

GPIO1B/XIOBCS#

GPIO1C/XIOCCS#

*

GPIO1D/XIODCS#

*

GPIO1E/XIOECS#

*

GPIO1F/XIOFCS#

*

GPIO2E/TOUT1/FANFB1

DPLL_TP/GPIO06/FANFB3

TOUT2/GPIO2F

E51IT0/GPIO00

E51IT1/GPIO01
E51RXD/GPIO21/ISPCLK
E51TXD/GPIO22/ISPDAT

KB910Q B4_LQFP176

KB910 C1 VERSION

0.1U_0402_16V4Z

GPWU0
GPWU1
GPWU2
GPWU3
GPWU4
GPWU5

XCLKI

XCLKO

2005/06/20 2006/06/20

3

+3VALW

1

1

C496

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
153
154

71
72
73
74
77
78
79
80

32
33
36
37
38
39
40
43

2
26
29
30
44
76
172
176

81
82
83
84
87
88
89
90

99
100
101
102
1
42
47
174

85
86
91
92
93
94
97
98

171
12
11

175
3

4
106
107

158
160

C484
1U_0603_10V4Z

2

2

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

INVT_PWM
BEEP#

ACOFF
EC_ON

EC_LID_OUT#
EC_MUTE

ON/OFF
5WAY_BTN

PM_SLP_S3#
PM_SLP_S5#
EC_RCIRRX
EC_PME#
FAN_SPEED2

BATT_TEMP
SKU_ID
BATT_OVP

MOVIE_BTN#

MUSIC_BTN#
AD_BID0

DAC_BRIG
EN_DFAN2
IREF
EN_DFAN1

EC_PWROK
PWR_LED

PWR_SUSP_LED#
BATT_GRN_LED#
BATT_AMB_LED#
WL_LED#
BT_LED#
E-MAIL_LED#
MEDIA_LED#

FAN_SPEED1
DPLL_TP
TEST_TP

EC_THERM#

WLSW_EN#
E51_RXD
E51_TXD

CRY2
CRY1

Compal Secret Data

Deciphered Date

Analog Board ID definition,
Please see page 3.

KSO16 42
KSO17 42

INVT_PWM 23
BEEP# 44
MUTE_WOOFER# 47
ACOFF 50,52
USB_EN# 37,42
EC_ON 43
EC_LID_OUT# 28
EC_MUTE 46,47

ON/OFF 43

ACIN 28,54

5WAY_BTN 42
PM_SLP_S3# 28
PM_SLP_S5# 28

FAN_SPEED2 48

BATT_OVP 52

MOVIE_BTN# 42

MUSIC_BTN# 42
TV_THERM# 36,56

POUT 56

DAC_BRIG 23
EN_DFAN2 48

IREF 52

EN_DFAN1 48

WL_OFF# 36
MINI1_OFF# 36
MINI2_OFF# 36

EC_PWROK 43

PWR_LED 42
PWR_SUSP_LED# 42
BATT_GRN_LED# 42
BATT_AMB_LED# 42
WL_LED# 42
BT_LED# 42
E-MAIL_LED# 42
MEDIA_LED# 42

FAN_SPEED1 48

EC_RSMRST# 28

WLSW_EN# 42

2

KSI[0..7]
KSO[0..15]

R270 0_0402_5%
R793 0_0402_5%@

2

For EC Tools

KSI[0..7] 41,42
KSO[0..15] 41

ACES_85205-0400@

SKU ID definition,
Please see page 3.

+3VALW +3VALW

R273
100K_0402_5%

Ra

1 2

AD_BID0

1

R272

Rb

8.2K_0402_5%

1 2

12

C459 0.01U_0402_16V7K

1 2
1 2

C417

2

0.1U_0402_16V4Z

R296

100K_0402_5%

ECAGND

5WAY_BTNTV_THERM#

EAPD

R405

100K_0402_5%

10P_0402_50V8K

EAPD

R260

100K_0402_5%

@

Title

Size Document Number Rev

B

Date: Sheet

JP26

Rc

Rd

R168 change to 8.2K (GM@)

BATT_TEMP 53

C471

1

+3VALW

1

1

E51_RXD

2

2

E51_TXD

3

3

4

4

R312

100K_0402_5%GM@

1 2

SKU_ID

1

R318
0_0402_5%

PM@

1 2

12

12

CRY1 CRY2

1

2

32.768KHZ_12.5P_1TJS125DJ2A073

HD_EAPD# 44

12

C458

0.1U_0402_16V4Z

2

+3VS

1

C470

4

1

IN

X1

2

10P_0402_50V8K

OUT

NC3NC

2

Change P/N SJ100001V00

+3VS

Compal Electronics, Inc.

EC ENE KB910

HBL50 LA-2921P

1

0.3

of

40 59Friday, November 11, 2005

+3VALW

C526

1 2

0.1U_0402_16V4Z

FWE#

4

Y

Check PCB Footprint

EC_SMB_CK115,40,45,53
EC_SMB_DA115,40,45,53

FOR DEBUG ONLY

SUS_STAT#28,39 FSEL#40

SN74AHCT1G125DCKR_SC70-5

KBA[0..19]40
ADB[0..7]40

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

INT_FSEL#

FRD#40

FRD#
FWE#

+3VALW

12

R434
100K_0402_5%

5

U29

2

B

Vcc

1

A

G

NC7SZ32P5X_NL_SC70-5

3

+5VALW

C503 0.1U_0402_16V4Z

1 2

U24

8
7
6
5

A0

VCC

A1

WP
SCL

A2

SDA

GND

AT24C16N10SC-2.7_SO8

+3VALW +3VALW

5

P

A2Y

G

U30

@

3

1MB Flash ROM

KBA[0..19]
ADB[0..7]

U25

21

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19

CE#
OE#
WE#

VCC0
VCC1

READY/BUSY#

GND0
GND1

RP#

NC0
NC1

D0
D1
D2
D3
D4
D5
D6
D7

NC

20
19
18
17
16
15
14

8
7

36

6
5
4
3
2

1
40
13
37

22
24

9

SST39VF080-70_TSOP40

2

G

1 3

D

Q18
2N7002_SOT23

1
2
3
4

1

4

OE#

31
30

25
26
27
28
32
33
34
35

10
11
12
29
38

23
39

S

FWR# 40

+5VALW

12

R413
100K_0402_5%

12

R398
100K_0402_5%

INT_FLASH_SEL

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

RESET#

SUSP# 37,40,43,49,54

EC_FLASH# 28

SB_INT_FLASH_SEL# 28

+3VALW

1

C499

0.1U_0402_16V4Z

2

1 2

R412 100K_0402_5%

+3VALW

INT_FLASH_EN#

1

5

P

OE#

A2Y

G

3

U21

@

SN74AHCT1G125DCKR_SC70-5

1 2

R418 0_0402_5%

KBA16 KBA17
KBA15
KBA14

KBA12
KBA11
KBA9
KBA8
FWE#
RESET#
INT_FLASH_EN#
INT_FLASH_SEL
KBA18
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2

Security Classification

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C490 0.1U_0402_16V4Z@

1 2

R391 100K_0402_5%@

1 2

1 2

INT_FSEL#FSEL#

4

+3VALW

R390 22_0402_5%@

12

R388

@

10K_0402_5%

1MB ROM Socket

JP10

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40

SUYIN_80065AR-040G2T@

Issued Date

2005/06/20 2006/06/20

KBA19KBA13
KBA10
ADB7
ADB6
ADB5
ADB4

ADB3
ADB2
ADB1
ADB0
FRD#

FSEL#
KBA0KBA1

+3VALW

Compal Secret Data

Deciphered Date

KSO15
KSO14
KSO13
KSO12

KSI0
KSO11
KSO10
KSI1

KSI2
KSO9
KSI3
KSO8

C759 100P_0402_50V8J

1 2

C760 100P_0402_50V8J

1 2

C761 100P_0402_50V8J

1 2

C762 100P_0402_50V8J

1 2

C763 100P_0402_50V8J

1 2

C764 100P_0402_50V8J

1 2

C765 100P_0402_50V8J

1 2

C766 100P_0402_50V8J

1 2

C767 100P_0402_50V8J

1 2

C768 100P_0402_50V8J

1 2

C769 100P_0402_50V8J

1 2

C770 100P_0402_50V8J

1 2

INT_KBD Conn.

KSI[0..7]
KSO[0..15]

Title

Size Document Number Rev

B

Date: Sheet

KSI[0..7] 40,42
KSO[0..15] 40

ACES_85201-24051

C771 100P_0402_50V8J

1 2

C772 100P_0402_50V8J

1 2

C773 100P_0402_50V8J

1 2

C774 100P_0402_50V8J

1 2

C775 100P_0402_50V8J

1 2

C776 100P_0402_50V8J

1 2

C777 100P_0402_50V8J

1 2

C778 100P_0402_50V8J

1 2

C779 100P_0402_50V8J

1 2

C780 100P_0402_50V8J

1 2

C781 100P_0402_50V8J

1 2

C782 100P_0402_50V8J

1 2

JP8

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

(Right)

(Left)

KSO7
KSO6
KSO5
KSO4

KSO3
KSI4
KSO2
KSO1

KSO0
KSI5
KSI6
KSI7

KSO15
KSO14
KSO13
KSO12
KSI0
KSO11
KSO10
KSI1
KSI2
KSO9
KSI3
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSI4
KSO2
KSO1
KSO0
KSI5
KSI6
KSI7

Compal Electronics, Inc.

BIOS, I/O Port & K/B Connector

HBL50 LA-2921P

41 59Friday, November 11, 2005

of

0.3

PWR_LED40

1

5

67

2

3
4

SW9
HSS112_7P

GRA@

KSI640,41

KSI040,41
KSI140,41
KSI240,41
KSI540,41

KSO1640

KSI340,41
KSI440,41

KSO1740

5WAY_BTN40

12

R470
300_0402_5%

21

3

2005/09/04

3GSW_EN#

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6

To CD-PLAY/B Conn.

ACES_85201-24051

+5VS+5VS

3

LEFT
VOL_DOWN
ENTER

RECORD

JP11

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

GEN@

12

R471
300_0402_5%

21

LED1
HT-110NBQA_BULE_1204

BT_LED#WL_LED#

WL_SWBT_SW & 3G_SW

5

1

5

1

2

2

3

3

4

4

6

SW8

6

HSS110_4P

GRA@

2005/09/04

2005/09/04

+5VS

C555

GEN@

0.1U_0402_16V4Z

2005/09/12

WLSW_EN#

KSI2
KSI3
KSI4
KSI5

ARCADE_BTN#
MOVIEBTN#
TVBTN#
MUSICBTN#

+5VS

KSI6

KSI0

KSI1

KSI2

KSI5

KSO16

KSI3

KSI4

KSO17

5WAY_BTN

PWR_LED#

13

D

2

G

Q9

S

2N7002_SOT23

LED2
HT-110UD_1204

WL_LED# 40 BT_LED# 40

3GSW_EN# 40

BTSW_EN# 40

Geneva Grapevine

KSO16 KSO17

VOL_UP
RIGHT
PLAY
STOP
NEXT
REV

KSO16

PLAY

STOP
NEXT
REV

ARCADE_BTN#

TVBTN#

MOVIEBTN#

MUSICBTN#

+5VS

+5VALW

+5VALW

+5VALW

+5VS

WLSW_EN# 40

KSO17

VOL_UP
VOL_DOWN
ARCADE_TV

1

DAN202U_SC70

1

DAN202U_SC70

1

DAN202U_SC70

1

DAN202U_SC70

R472
300_0402_5%

1 2

R704
300_0402_5%

1 2

R473
300_0402_5%

1 2

R703
300_0402_5%

1 2

R707
300_0402_5%MINI2@

1 2

94/08/04

R705

100_0805_5%

CIR@

C894

CIR@

4.7U_0805_10V4Z

1 2

D13

GEN@

D32

GEN@

D33

GEN@

D34

GEN@

+3VALW

12

R343 100K_0402_5%

2

51ON#

3

2

51ON#

3

2

51ON#

3

2

51ON#

3

LED9

2 1

HT-170UYG-DT GRN_0805

GEN@

LED3

2 1
3

HT-110UYG_1204

GRA@

LED8

2 1

HT-170UD_0805

GEN@

LED6

2 1
3

HT-110UD_1204

GRA@

LED10

2 1

HT-170UYG-DT GRN_0805

GEN@

LED4

2 1
3

HT-110UYG_1204

GRA@

LED11

2 1

HT-170UD_0805

GEN@

LED5

2 1
3

HT-110UD_1204

GRA@

LED7

2 1
3

HT-110UYG_1204

MINI2@

Update Part N u m ber to SCR36236000

CIR

IR2

Vs3OUT

1

GND

1

2

GND

TSOP36236TR_4P

CIR@

Security Classification

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

ARCADE# 40
51ON# 43,50

TV_BTN# 40

MOVIE_BTN# 40

MUSIC_BTN# 40

PWR_LED#

PWR_SUSP_LED#

BATT_GRN_LED#

BATT_AMB_LED#

3G_LED#

4
2

Issued Date

+3VALW

PWR_SUSP_LED# 40

BATT_GRN_LED# 40

BATT_AMB_LED# 40

RCIRRXBTSW_EN#

1

C893

CIR@

1000P_0402_50V7K

2

ICH_SDOUT_MDC27

ICH_SYNC_MDC27

ICH_AC_SDIN127

ICH_RST_MDC#27

RCIRRX 40,46

100K_0402_5%

BT_ON#40

2005/06/20 2006/06/20

ICH_SDOUT_MDC

ICH_SYNC_MDC

R491 33_0402_5%

1 2

ICH_RST_MDC#

12

R796

C929

@

0.1U_0402_16V4Z

G

2

Compal Secret Data

Deciphered Date

MEDIA_LED#40

CAPS_LED#40

E-MAIL_LED#40
ON/OFFBTN#43

E-MAIL_BTN#40

EMPWR_BTN#40

+3VALW

S

D

1 3

1

C875

4.7U_0805_10V4Z

2

+5VS

NUM_LED#40

IE_BTN#40

USER_BTN#40

CVBS_IN36

S_YIN36

S_CIN363G_LED# 40

Q37
SI2301BDS_SOT23

W=40mils

MDC Conn.

JP3

1

GND1

3

IAC_SDATA_OUT

5

GND2

7

IAC_SYNC

9

IAC_SDATA_IN

11

IAC_RESET#

GND13GND14GND15GND16GND17GND

Connector for MDC Rev1.5

JP37

1

WLSW_EN#
WL_LED#
BTSW_EN#
BT_LED#
3GSW_EN#
3G_LED#

2
3
4
5
6
7
8
9

10

ACES_85201-10051

GEN@

To LED/B Conn.

+5VS

PWR_LED#

Bluetooth Conn.

1

C874
1U_0603_10V4Z

2

+BT_VCC

C877

0.1U_0402_16V4Z

+3VALW

1

2

RES0

4
6
8
10
12

20mil

ICH_BITCLK_MDC

1

C598
22P_0402_50V8J

2

+3VALW

RES1

3.3V
GND3
GND4

IAC_BITCLK

18

ACES_88018-124G

2005/09/04

KSO17
KSI2
KSI5
KSO16
KSI3
KSI4

+5VALW

C2

0.1U_0402_16V4Z

JP2

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

GND31GND32GND33GND34GND35GND

WLAN_BT_DATA36
WLAN_BT_CLK36

Title

Size Document Number Rev

B

Date: Sheet

2

2

4

4

6

6

8

8

USB20_N4

10

10
12
14
16
18
20
22
24
26
28
30

36

USB20_P528
USB20_N528

USB20_P4

12
14

USB20_N6

16

USB20_P6

18
20
22
24
26
28
30

ACES_88018-304G

+BT_VCC

Compal Electronics, Inc.

CD-PLAY / MDC / BT / CIR / LED

HBL50 LA-2921P

2

ICH_BITCLK_MDC 27

JP6

1
2
3
4
5
6
7
8
9

10

ACES_85201-10051

GRA@

Delete C7

+5VALW

USB20_N4 28
USB20_P4 28

USB20_N6 28
USB20_P6 28

USB_EN# 37,40

AUDIO_INL 36

AUDIO_INR 36

JP36

1
2
3
4
5
6
7
8

ACES_87212-0800

C599
1U_0603_10V4Z

of

42 59Friday, November 11, 2005

0.3

A

ON/OFF switch

TOP Side

12

J2 JOPEN@

12

J1 JOPEN@

1 1

ON/OFFBTN#42

Bottom Side

ON/OFFBTN#

D14

1

DAN202U_SC70

+3VALW

2
3

R399
100K_0402_5%

1 2

51ON#

C495
1000P_0402_50V7K

B

Power Button

ON/OFF 40

51ON# 42,50

2

1

12

D15
RLZ20A_LL34

C

Lid Switch

Change P/N : SN111000207

SW1

3

4

MPU-101-81_4P

1

2

2005/09/04

2

1

+3VALW

12

3

D3

@

PSOT24C_SOT23

R8
100K_0402_5%

LID_SW# 40

D

Change BATT1 P/N : SP093PA0200 (Panasonic)
SP093MX0000 (MAXELL)

RTC Battery

BATT1

-+

RTCBATT45@

+RTCVCC

1

2

12

C833

0.1U_0402_16V4Z

+RTCBATT

+RTCBATT

3

1

E

D30
BAS40-04_SOT23

2

CHGRTC

13

D

Q16

2

G

2N7002_SOT23

S

Power ON Circuit

Change P/N : SA00000LR00

+3VALW+3VALW

U28A
SN74LVC14APWLE_TSSOP14

14

P

O2I

G

+3VALW POWER

7

+3VALW +3VALW

U28C

14

SN74LVC14APWLE_TSSOP14

P

O6I

G

7

+3VALW

C511

0.1U_0402_16V4Z

1 2

U28E

14

SN74LVC14APWLE_TSSOP14

P

O10I

G

7

3

9

+3VALW

13

B

U28B
SN74LVC14APWLE_TSSOP14

14

P

G

7

U28D

14

SN74LVC14APWLE_TSSOP14

P

G

7

U28F

14

SN74LVC14APWLE_TSSOP14

P

G

7

O4I

+3VALW POWER

EC_PWROK40

O8I

O12I

1 2

R789 0_0402_5%@

For South Bridge

1 2

R790 0_0402_5%

2005/10/20

For +VCCP/+1.05VS

VGA_ON 57SUSP#37,40,41,49,54

SW5
EVQPLHA15_4P

3
4

SYS_PWROK 6,28

BTN_L

3
4

+5VS

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

TP_DATA40
TP_CLK40VS_ON 55

C176

0.1U_0402_16V4Z

2005/06/20 2006/06/20

1
2

5

6

Left Right

SW3
EVQPLHA15_4P

1
2

5

6

+5VS

Compal Secret Data

10K_0402_5%

R420

180K_0402_5%

C512

1U_0805_25V4Z

R425

62K_0402_1%

2 1

C521

0.1U_0402_16V4Z

1 2

21

RB751V_SOD323

PM@

C513

PM@

0.1U_0402_16V4Z

EC_ON

+3VS

+3VS

R414

12

2

1

12

2

1

2

1

1 2

1

5

11

EC_ON40

2 2

2005/10/20

13

D

2N7002_SOT23

2005/10/20

RB751V_SOD323

A

2

G

Q41

S

D36

2005/10/20

R422 62K_0402_1%PM@

+3VS

D37

SUSP49,53,54

3 3

4 4

Scroll Up

SW2
EVQPLHA15_4P

SCRL_U

3
4

5

6

Scroll Down

SW7

SCRL_D

EVQPLHA15_4P

3
4

5

6

To TP/B Conn.

JP7

1

TP_DATA
TP_CLK

BTN_R
SCRL_R
SCRL_U
SCRL_L
SCRL_D
BTN_L

Deciphered Date

2
3
4
5
6
7
8
9
10
11
12

ACES_87151-1207

1
2

Scroll RightScroll Left

SW6
EVQPLHA15_4P

BTN_R
SCRL_R
SCRL_U
SCRL_L
SCRL_D
BTN_L
TP_DATA
TP_CLK

3
4

3
4

1
2

5

6

SW4
EVQPLHA15_4P

1
2

5

6

C168 100P_0402_50V8J@

1 2

C169 100P_0402_50V8J@

1 2

C170 100P_0402_50V8J@

1 2

C158 100P_0402_50V8J@

1 2

C166 100P_0402_50V8J@

1 2

C173 100P_0402_50V8J@

1 2

C167 100P_0402_50V8J@

1 2

C159 100P_0402_50V8J@

1 2

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

Power OK, R eset and RTC Circuit, TP

HBL50 LA-2921P

SCRL_RSCRL_L

1
2

BTN_R

D

2

1

2

1

2

1

SCRL_R
BTN_R

3

D17

@

PSOT24C_SOT23

SCRL_L
SCRL_U

3

D19

@

PSOT24C_SOT23

SCRL_D
BTN_L

3

D18

@

PSOT24C_SOT23

E

0.3

of

43 59Friday, November 11, 2005

A

1 1

2 2

3 3

BEEP#40

PCM_SPK#32

SB_SPKR28

2005/09/20

1U_0603_10V4Z

1U_0603_10V4Z

1U_0603_10V4Z

J4

112

JUMP_43X79
J5

112

JUMP_43X79

1 2

R465 0_0603_5%

1 2

R440 0_0603_5%

1 2

R695 0_0603_5%

C527

C528

C533

B

+VDDA

12

R689
10K_0402_5%

12

R688

1 2

1 2

1 2

R430

1 2

560_0402_5%

R433

1 2

560_0402_5%

R438

1 2

560_0402_5%

10K_0402_5%

+VDDA

R442

10K_0402_5%

1

C

Q19

2

B

E

2SC2411K_SC59

3

12

D16
RB751V_SOD323

2 1

L34

1 2

FBM-L11-160808-800LMT_0603

LINE_L46
LINE_R46

2005/10/26

MIC1_L46
MIC1_R46

@

2

@

2

C

1 2

C542 1U_0603_10V4Z

C535

1 2

1U_0603_10V4Z

1 2

R687

2.4K_0402_5%

0.1U_0402_16V4Z

1

1

C545

C549

10U_0805_10V4Z

LINE_L
LINE_R

MIC1_L
MIC1_R MIC1_C_R

2

2

1 2

C556 1U_0603_10V4Z

1 2

C557 1U_0603_10V4Z

1 2

C543 1U_0603_10V4Z@

1 2

C546 1U_0603_10V4Z@

1 2

C544 1U_0603_10V4Z@

1 2

C547 1U_0603_10V4Z

1 2

C554 1U_0603_10V4Z

2005/09/12

ICH_RST_AUDIO#27
ICH_SYNC_AUDIO27

ICH_SDOUT_AUDIO27

EAPD40

NBA_PLUG46,47

HD_EAPD#40

SPDIF46

MONO_IN

40mil

1

C559

2

0.1U_0402_16V4Z

LINE_C_L
LINE_C_R
CD_L_RC
CD_R_RC
CD_AGND_RC
MIC1_C_L

MONO_IN

DGND

D

L32

+5VS

1 2

KC FBM-L11-201209-221LMAT_0805

L33

1 2

KC FBM-L11-201209-221LMAT_0805

HD Audio Codec

+AVDD_AC97

U33

AVDD125AVDD2

14

LINE2_L

15

LINE2_R

16

MIC2_L

17

MIC2_R

23

LINE1_L

24

LINE1_R

18

CD_L

20

CD_R

19

CD_GND

21

MIC1_L

22

MIC1_R

12

PCBEEP

11

RESET#

10

SYNC

5

SDATA_OUT

2

GPIO0

3

GPIO1

13

SENSE A

34

SENSE B

47

SPDIFI/EAPD

48

SPDIFO

4

DVSS1

7

DVSS2

ALC883-LF_LQFP48

38

FRONT_OUT_L
FRONT_OUT_R

SURR_OUT_R

SIDESURR_OUT_L

SIDESURR_OUT_R

PIN37_VREFO
LINE1_VREFO
LINE2_VREFO

MIC1_VREFO_L

MIC1_VREFO_R

20mil

DVDD11DVDD2

SURR_OUT_L

CEN_OUT

LFE_OUT

BIT_CLK

SDATA_IN

MIC2_VREFO

VREF

JDREF

VAUX

AVSS1
AVSS2

0.1U_0402_16V4Z

1

C537

2

9

AMP_LEFT

35

AMP_RIGHT

36
39
41
45
46
43
44

6

R443 33_0402_5%

8
37
29
31

10mil

28
32
30
27
40
33
26

42

AGND

E

+5VAMP

1

C550

10U_0805_10V4Z

2

0.1U_0402_16V4Z

MBK1608301YZF_0603

+3VS_DVDD

1

1

2

0.1U_0402_16V4Z

C538 22P_0402_50V8J

1 2

1 2

AC97_VREF

12

R445
20K_0402_1%

C539

MIC1_VREFO_L
MIC1_VREFO_R

10mil

@

C532
10U_0805_10V4Z

2

1

C561
10U_0805_10V4Z

2

1

C553

2

L57

60mil

12

+3VS

AMP_LEFT 45,46
AMP_RIGHT 45,46

MONO_OUT 47

ICH_BITCLK_AUDIO 27

ICH_AC_SDIN0 27

F

U34

4

VIN

2

DELAY
ERROR7CNOISE

8

SD

SI9182DH-AD_MSOP8

G

28.7K for Module Design (VDDA = 4.702)

(output = 250 mA)

40mil

VOUT

SENSE or ADJ

GND

5
6
1
3

1

2

0.1U_0402_16V4Z

C548

30K_0402_1%

1 2
12

1

R452

2

R451
10K_0402_1%

+VDDA

4.85V

C558
10U_0805_10V4Z

H

4 4

A

GND GNDA

B

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

C

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2005/06/20 2006/06/20

E

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

F

Date: Sheet

Compal Electronics, Inc.

HD Audio Codec ALC883
HBL50 LA-2921P

G

0.3

of

44 59Friday, November 11, 2005

H

A

B

C

D

E

+1.8VS_DSP

+5VAMP

MIC1_DSP_P46
MIC1_DSP_N46

A

2

1

C906
1U_0603_10V4Z

VP1020@

+5VAMP

+5VAMP

1 3

D

1 3

D

12

+5VAMP

3

IN+

12

2

IN-

Change P/N : SA00000QP00

12

+5VAMP

5

IN+

12

6

IN-

2

G

DSP_EECK

Q39

S

2N7002_SOT23

VP1020@

2

G

DSP_EEDA

Q40

S

2N7002_SOT23

VP1020@

1

2

MIC1_DSP_P
MIC1_DSP_N

U61A

8

LM358M_SO8

VP1020@

P

O

G

4

U61B

8

LM358M_SO8

VP1020@

P

O

G

4

1 1

2 2

AMP_RIGHT44,46

AMP_LEFT44,46

3 3

DSP_WP#40 DSP_ENABLE#46

EC_SMB_CK115,40,41,53

4 4

EC_SMB_DA115,40,41,53

C897
1U_0603_10V4Z

VP1020@

R777
1M_0402_5%

VP1020@

1 2

C925
1U_0603_10V4Z

VP1020@

R778
1M_0402_5%

VP1020@

R779
1M_0402_5%

VP1020@

1 2

C926
1U_0603_10V4Z

VP1020@

R780
1M_0402_5%

VP1020@

DSP_WP#

DSP_WP#

1
2
3

APL5301-18BC-TR_SOT23-5

VP1020@

R753

1 2

2.2K_0402_5%

1 2

1

7

U58

VOUT
GND
VIN

C914
1U_0603_10V4Z

VP1020@

1 2

5

BP

4

SHDN#

C907 4.7U_0805_10V4Z

1 2

R742

1 2

2.2K_0402_5%

VP1020@

R748 100_0402_5%

1 2

VP1020@

C912

VP1020@

0.012U_0603_25V7K

1 2

R754 100_0402_5%

VP1020@

C916
1U_0603_10V4Z

VP1020@

VP1020@

VP1020@

13MHZ_16PF_X6G013000FG1H

VP1020@

DSP_EECK
DSP_EEDA

1 2

C896

0.01U_0402_16V7K

VP1020@

+5VAMP

VP1020@

1 2

R743 1K_0402_5%

VP1020@
VP1020@

C908

0.1U_0402_16V4Z

1

C911

0.1U_0402_16V4Z

VP1020@

2

VP1020@

R756 1K_0402_5%

1 2

R758 1K_0402_5%

1 2
VP1020@

C917 0.039U_0603_16V7K

12

VP1020@

+3VS_DSP

1 2

C920
20P_0402_50V8J

Y6

1 2

C923
20P_0402_50V8J

DSP_SMB_CK

DSP_SMB_DA

R770
10K_0402_5%

VP1020@

VP1020@

12

1 2

R769 10K_0402_5%

VP1020@

1 2

R773 10K_0402_5%

@

R771

10K_0402_5%

1 2

1 2

VP1020@

DSP_WP#

2

G

B

+1.8VS_DSP +1.8VS_DSPA +3VS +3VS_DSP

1 2

L52 FBM-L11-160808-800LMT_0603

VP1020@

1

C898

4.7U_0805_10V4Z

2

VP1020@

C899
1U_0603_10V4Z

VP1020@

2

C900

1

0.1U_0402_16V4Z

VP1020@

1

2

VP1020@

1

C901

0.1U_0402_16V4Z

2

1

C902

2

4.7U_0805_10V4Z

VP1020@

1 2

L53 FBM-L11-160808-800LMT_0603

VP1020@

1

C903

4.7U_0805_10V4Z

2

VP1020@

closed to Pin37

+3VS_DSP

19

2

4

35

NC

NC

VDD_S

VDD_D

LINE_OUT

SCL_EE
SDA_EE

UART_TX

UART_RX

SPK_OUT_P

SPK_OUT_N

BYPASS

SEG_SEL

VSS_A

1

VSS_D

VSS_D

7

18

DSP_ENABLE#

GND_D

29

+3VS

R803
10K_0402_5%

VP1020@

1 2

R801
10K_0402_5%

VP1020@

1 2

1

2

Compal Secret Data

VSS_A

38

2005/06/20 2006/06/20

GPIO5: High for SHI, Low for EEPROM

20

GPIO6

21

GPIO5

17

GPIO7

VP1020@

47

C909

0.1U_0402_16V4Z

DSP_EECK

16

DSP_EEDA

15

R755 100K_0402_5%

13

1 2

12

34

SW10

36

SW15

48
3

32

TEST1

14

10
46

REF2

44

REF1

22

GPIO4

+3VS

1 3

D

C931
1U_0603_10V4Z

VP1020@

Deciphered Date

R744 100K_0402_5%VP1020@

1 2

R745 100K_0402_5%VP1020@

1 2

R746 10K_0402_5%@

1 2

R747 10K_0402_5%VP1020@

1 2

12

C918 1U_0603_10V4ZVP1020@

1 2

C919 1U_0603_10V4ZVP1020@

1 2

R761 100K_0402_5%VP1020@

1 2

R764 100K_0402_5%VP1020@

1 2

C922 1U_0603_10V4ZVP1020@

1 2

C924 1U_0603_10V4ZVP1020@

1 2

R768 100K_0402_5%VP1020@

1 2

2

G

S

Q43

2N7002_SOT23

VP1020@

R750

1 2

100_0402_5%

VP1020@

VP1020@

+3VS

1

A

2

B

D

5

P

G

3

4

Y

U62

VP1020@

SN74AHCT1G86DCKR_SC70-5

MIC1_VREFO_L

VP1020@

R749

12
12

VP1020@

C915

0.1U_0402_16V4Z

R759 10K_0402_5%VP1020@

R760 100K_0402_5%

VP1020@

1M_0402_5%

1 2

R765 330_0402_5%VP1020@
R766 100K_0402_5%VP1020@

R767 100K_0402_5%VP1020@

+3VS_DSP

R772
10K_0402_5%

VP1020@

1 2

12

R774
10K_0402_5%

VP1020@

13

D

Q42

VP1020@

2N7002_SOT23

S

1 2

1K_0402_5%
R752

1 2

1K_0402_5%

VP1020@

VP1020@

12

1 2

R757 0_0402_5%

1 2

DSP_RST#

DSP_SMB_CK
DSP_SMB_DA

1 2

R763

1 2
1 2

1 2

+3VS_DSP

+3VS_DSP

Need to change P/N to "24C02BN-10SU-1.8"

U60

8

VCC

7

WP

6

SCL

5

SDA

AT24C02N-10SU-2.7_SO8

VP1020@

+1.8VS_DSPA

U59

33

37

GND

A0
A1
A2

5
6

39
40
41
42
43
11

30
31

23
24

8
9

27
28

25
26

VP1020-N_QFN48

VP1020@

1
2
3
4

NC
NC

MIC0_P
MIC0_N
NC
NC
LINE_IN
NC

PWD#
RST#

SCL
SDA

NC
NC

XTAL_IN
XTAL_OUT

VOLDN
VOLUP

V10

V15

VP1020

VSS_REF

45

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2

1

1

C905

2

0.1U_0402_16V4Z

VP1020@

C904
1U_0603_10V4Z

VP1020@

closed to Codec

+3VS_DSP

C913

0.039U_0603_16V7K

VP1020@

VP1020@

0.1U_0402_16V4Z
C910

12

1 2

R762

VP1020@

1

2

R802

10K_0402_5%

VP1020@

2

G

Title

Size Document Number Rev

B

Date: Sheet

R751 0_0402_5%

100K_0402_5%

1 2

C921
1U_0603_10V4Z

VP1020@

+3VS_DSP

1 2

DSP_RST#

VP1020@

13

D

2N7002_SOT23
Q44

S

Compal Electronics, Inc.

Echo Cancellation

HBL50 LA-2921P

1 2

DSP_ENABLE#

INT_MIC_L

VP1020@

E

INT_MIC_L 46

45 59Friday, November 11, 2005

0.3

of

A

+5VAMP

12

R458

12

1 2

C566 1U_0603_10V4Z

1 2

C568 1U_0603_10V4Z

12

R792

@

1K_0402_5%

10K_0402_5%

VOL_AMP

(0.65V -> 10dB )

R457

1.5K_0402_1%

C882 0.1U_0402_16V4Z

12

12

R690 0_0402_5%

BYPASS47

C881

0.1U_0402_16V4Z

VOL_AMP
VOLMAX
NBA_PLUG
AMP_LEFT_C

AMP_RIGHT_C

BYPASS

20mil

1

C886

4.7U_0805_10V4Z

2

1 1

12

R455

@

5.1K_0402_1%

13

SPDIF_PLUG#

2N7002_SOT23 @

C927

0.47U_0603_16V4Z

AMP_LEFT44,45

AMP_RIGHT44,45

2 2

1 2
1 2

C928

0.47U_0603_16V4Z

2

Q20

G

R791

@

1K_0402_5%

D

S

AMP_LEFT_C-1

AMP_RIGHT_C-1

12

HPF Fc = 338Hz

3 3

Int MIC Conn.

MIC1_DSP_P45

ACES_85204-0200

4 4

A

+5VAMP

W=40mil

1

2

U56

10

VDD

15

VDD

7

VOLUME

8

VOLMAX

13

SE/BTL#

6

LIN-

3

RIN-

4

BYPASS

APA2068KAI-TRL_SOP16

JP13

1
2

B

1

C892

4.7U_0805_10V4Z

2

SHUTDOWN#

LOUT+
ROUT+

2005/09/06

15mil

1 2

R741
0_0402_5%

INTMIC@

B

1

MUTE

2
9

LOUT-

16

ROUT-

11
14

5

GND

12

GND

SPKL+

1 2

C891 150U_D_6.3VM

SPKR+

1 2

C888 150U_D_6.3VM

MIC1_DSP_N 45

+5VAMP

12

R467
100K_0402_5%

+

+

1K_0402_5%

INT_MIC_L

R468

100K_0402_5%

1 2

SPKL­SPKR­SPKL+
SPKR+

HPOUT_L_1
HPOUT_R_1

12

R794

@

LINE_R44
LINE_L44

INT_MIC_L 45

MIC1_R44
MIC1_L44

C

SPKL+
SPKL­SPKR+
SPKR-

EC_MUTE

EC_MUTE 40,47

C563

330P_0402_50V7K

NBA_PLUG44,47

2

1

NBA_PLUG

2

C562
330P_0402_50V7K

1

2005/09/05

1 2

R702 47_0603_5%

1 2

R699 47_0603_5%

12

R795

@

1K_0402_5%

LINE_R
LINE_L L I N E _L_R

HPOUT_L_2
HPOUT_R_2

L48 FBM-11-160808-700T_0603

1 2
1 2

L49 FBM-11-160808-700T_0603

220P_0402_50V7K

1 2

L54

1 2

L35

220P_0402_50V7K

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C885

R775

2.2K_0402_5%
FBM-11-160808-700T_0603
FBM-11-160808-700T_0603

C569

C

1 2

L51 FBM-11-160808-700T_0603

1 2

L50 FBM-11-160808-700T_0603

+5VAMP

SPDIF

1

2

12

1

2

2005/06/20 2006/06/20

HPOUT_L_3
HPOUT_R_3

SPDIF44

+5VSPDIF

1

2

1

2

MIC1_VREFO_RMIC1_VREFO_L

R776

C876

12

C879
100P_0402_50V8J

@

LINE_R_R

12

MIC1_R_1
MIC1_L_1

1

2

R456 100K_0402_5%

C884

220P_0402_50V7K

2.2K_0402_5%

220P_0402_50V7K

Compal Secret Data

SPDIF_PLUG#

SPDIF

Deciphered Date

R462 0_0603_5%
R464 0_0603_5%
R466 0_0603_5%
R469 0_0603_5%

20mil

Speaker Conn.

+5VAMP

12

R698
100K_0402_5%

13

D

SPDIF_PLUG#

2

G

Q21
2N7002_SOT23

S

S/PDIF Out JACK

JP40

1
2
6
3

5
4

7
8

10

9

ACES_20234-0101

GRA@

LINE-IN JACK

JP41

5
4
3

6
2
1

SUYIN_010164FR006G118ZL

GRA@

DSP_ENABLE#

MIC JACK

JP42

5
4
3

6
2
1

SUYIN_010164FR006G118ZL

GRA@

D

1 2
1 2
1 2
1 2

D

+5VSPDIF

DSP_ENABLE# 45

E

JP12

1
2
3
4

ACES_85204-0400

+5VAMP

S

D

1 3

SPK_L+
SPK_L­SPK_R+
SPK_R-

G

SPDIF_PLUG#

2

Q22
SI2301BDS_SOT23

20mil

2005/09/09

INT_MIC_L
MIC1_L_1
MIC1_R_1
LINE_R_R
LINE_L_R

HPOUT_R_3
HPOUT_L_3

DSP_ENABLE#

+5VSPDIF

RCIRRX40,42

SPDIF_PLUG#
SPDIF

+3VALW

Compal Electronics, Inc.

Amplifier & Audio Jack

HBL50 LA-2921P

Title

Size Document Number Rev

B

Date: Sheet

E

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16

ACES_87213-1600G

46 59Friday, November 11, 2005

JP44

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

GEN@

0.3

of

A

1 1

B

C

D

E

+5VAMP

BYPASS

BYPASS46

R459

MONO_OUT44

2 2

1 2

C560 1U_0603_10V4Z

SUB@

12

100K_0402_5%

SUB@

1 2

R460 0_0402_5%

1 2

C565

0.1U_0402_16V4Z

SUB@

1 2

1U_0603_10V4Z

SUB@

C564

SUB@

R461
43K_0402_5%

SUB@

8

3

+

2

-

4

12

SUB@

C567 1U_0603_10V4Z

1 2

U57A
TLV2462CDR_SO8

SUB@

P

1

O

G

R700
1K_0402_5%

SUB@

12

C889 0.68U_0603_10V6K

1 2

SUB@

R701

12

10K_0402_5%

SUB@

2

C570

SUB@

0.47U_0603_16V4Z

1

BYPASS

5
6

+5VAMP

8

+

-

4

P

G

7

O

U57B
TLV2462CDR_SO8

SUB@

C890

12

0.22U_0603_16V7K

SUB@

MIX_OUT

10mil

10mil

fo= 725 Hz

Fc(high)= 33.8Hz

R697
20K_0402_5%

SUB@

2

G

D

Q23
2N7002_SOT23

SUB@

S

MUTEWOOFER#

NBA_PLUG44,46

MUTE_WOOFER#40

3 3

EC_MUTE40,46

1 2

R694 10K_0402_5%

SUB@

2

G

13

WOOFER_INMIX_OUT WOOFER-

12

13

D

Q24
2N7002_SOT23

SUB@

S

0.1U_0402_16V4Z

C880

SUB@

+5VAMP

2

1

U55

1

IN

2

SD#

3

VDD
BYPASS4VO+

TPA0211DGN_MSOP8

2

C878

SUB@

SUB@

1

0.47U_0603_16V4Z

GND

SE/BTL#

VO-

JP20

8
7
6
5

WOOFER+

12

R691

SUB@

100K_0402_5%

30mil

1
2

ACES_85204-0200

SUB@

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/06/20 2006/06/20

C

Compal Secret Data

Deciphered Date

Title

Size Do cument Number Rev

B

D

Date: Sheet

Compal Electronics, Inc.

Subwoofer

HBL50 LA-2921P

47 59Friday, Novem ber 11, 2005

E

0.3

of

H1

H_S394D138

FAN1 Conn

+5VS

+VCC_FAN1

EN_DFAN140

EN_DFAN1

C47 10U_1206_16V4Z

U2

1

VEN

2

VIN

3

VO

4

VSET

G993P1UF_SOP8

FAN_SPEED140

1 2

GND
GND
GND
GND

8
7
6
5

+3VS

12

R45
10K_0402_5%

1

C59
1000P_0402_50V7K

2

40mil

+VCC_FAN1

+5VS

12

D4
1SS355_SOD323

1N4148_SOT23

1 2

10U_1206_16V4Z

1000P_0402_50V7K

D5

C51

1 2

C58

1 2

JP19

1
2
3

ACES_85205-03001

@

1

H7

H_TC236BC165D165

@

1

H14

H_S394D138

@

1

H16

H_TC177BC144D144

@

1

H29

H_C236D162

@

1

H4

H_S315D138

@

1

H8

H_TC236BC165D165

@

1

H15

H_S394D138

@

1

H19

H_TC177BC144D144

@

1

H28

H_S354X335D138

@

1

H3

H_C236D162

@

1

H9

H_TC236BC165D165

@

1

H13

H_S374X354D138

@

1

H20

H_C158D158N

@

1

H26

H_O217X157D217X157N

@

1

H2

H_S366D138

@

1

H10

H_TC236BC165D165

@

1

H23

H_TS559X295BS394X276D138

@

1

H21

H_S394X374D138

@

1

2005/09/20

H27

H_S315D138

@

1

H5

H_C197D197N

@

1

H6

H_C236D162

@

1

H22

H_S394D138

@

1

H24

H_S354X293D138

@

1

H25

H_S374X354D138

@

1

FD1

CF14

CF16

@

1

@

1

@

1

H12

H_O87X68D47X28

@

1

FD5

FD3

@

1

CF21

CF18

@

1

CF13

CF19

@

1

1

1

1

H18

H_O87X68D47X28

@

1

GND
GND
GND
GND

+3VS

8
7
6
5

12

1

2

FAN2 Conn

R207
10K_0402_5%

C344
1000P_0402_50V7K

+VCC_FAN2

40mil

+5VS

12

D8
1SS355_SOD323

1N4148_SOT23

1 2

10U_1206_16V4Z

1000P_0402_50V7K

D9

C339

1 2

C343

1 2

JP25

1
2
3

ACES_85204-0300

FD2

@

1

CF20

@

1

CF17

@

1

CF8

@

1

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

+5VS

+VCC_FAN2

EN_DFAN240

EN_DFAN2

C338 10U_1206_16V4Z

U10

1

VEN

2

VIN

3

VO

4

VSET

G993P1UF_SOP8

FAN_SPEED240

1 2

FD4

@

1

CF7

@

1

CF9

@

1

H17

H_O87X68D47X28

@

1

FD6

@

@

1

CF10

@

@

1

CF1

@

@

1

H11

H_O87X68D47X28

@

1

CF12

CF4

@

1

1

CF3

CF2

@

1

1

Title

Size Document Number Rev

B

Date: Sheet

CF15

CF6

CF5

@

@

1

1

CF11

@

@

1

1

@

@

Compal Electronics, Inc.

FAN & Screw Hole

HBL50 LA-2921P

of

48 59Friday, November 11, 2005

0.3

A

+5VALW TO +5VS

1

C419

2

10U_0805_10V4Z

R317
200K_0402_5%

SUSP

2N7002_SOT23

12

Q11

+5VALW

1

2

2

G

U16

8

D

7

D

6

D

5

D

SI4800BDY_SO8

AOS 4422

5VS_GATE

13

D

S

+5VS

1

S

2

S

3

S

C464

4

G

10U_0805_10V4Z

1

C455

0.1U_0603_25V7K

2

1

2

1

C465

2

1U_0603_10V4Z

1 1

C418
10U_0805_10V4Z

+VSB

2 2

+3VALW TO +3VS

+3VALW

U27

8

S

D

7

S

D

6

S

D

1

C508

C509

10U_0805_10V4Z

2

10U_0805_10V4Z

3 3

5

1

2

G

D

SI4800BDY_SO8

AOS 4422 AOS 4422

5VS_GATE

1
2
3
4

+3VS

1

C514
10U_0805_10V4Z

2

1

C518

2

1U_0603_10V4Z

B

R358
470_0603_5%

1 2
13

D

SUSP

2

G

Q12

S

2N7002_SOT23

C

D

+5VALW

R294
100K_0402_5%

1 2

SYSON#

13

SYSON37,40,55

SUSP43,53,54

SUSP#37,40,41,43,54

SYSON

R295

100K_0402_5%

100K_0402_5%

SUSP

R363

D

Q8

2

2N7002_SOT23

G

S

12

+5VALW

R362
100K_0402_5%

1 2

13

D

Q13

2

2N7002_SOT23

G

S

12

E

+1.8V to +1.8VS

+1.8V

U44

8

S

D

7

S

D

6

S

R423
470_0603_5%

1 2
13

D

SUSP

2

G

Q17

S

2N7002_SOT23

1

C741
10U_0805_10V4Z

2

+VSB

R586
510K_0402_5%

SUSP

C740

10U_0805_10V4Z

Q31
2N7002_SOT23

D

5

1

2

12

2

G

D

SI4800BDY_SO8

1.8VS_GATE

13

D

S

G

1
2
3
4

+1.8VS

1

C755
10U_0805_10V4Z

2

1

C746

0.1U_0603_25V7K

2

1

C756

2

1U_0603_10V4Z

1 2
13

D

S

R590

470_0603_5%

SUSP

2

G

Q33
2N7002_SOT23

+1.5VS +2.5VS +1.05VS +1.8V+0.9VS +VGA_CORE

2005/09/04 2005/09/04 2005/09/04

R290
470_0603_5%

1 2
13

D

SUSP SUSP SUSP SUSP SUSP SYSON#

2

G

Q10

S

4 4

2N7002_SOT23

A

R238
470_0603_5%

1 2
13

D

S

2

G

Q7
2N7002_SOT23

R497
470_0603_5%

1 2
13

D

S

2

G

Q29
2N7002_SOT23

R43
470_0603_5%

@

1 2
13

D

S

2

G

Q2
2N7002_SOT23

@

R123
470_0603_5%

@

1 2
13

D

S

2

G

Q3
2N7002_SOT23

@

Security Classification

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

S

Issued Date

R583
470_0603_5%

@

1 2
13

G

Q32
2N7002_SOT23

@

C

2

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

D

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

DC Interface

HBL50 LA-2921P

E

0.3

of

49 59Friday, November 11, 2005

A

B

C

D

PL2

FBMA-L18-453215-900LMA90T_1812

1 2

12

PC2

12P_0402_50V8J

TP0610K-T1-E3_SOT23

0.22U_1206_25V7K

PQ4

PC3

PR9

33_1206_5%

13

2

3.3V

PR18

1 2

PR19

560_0402_5%

12

12P_0402_50V8J

VIN

CHGRTC

12

PC4

560P_0402_50V7K

PD4
1N4148_SOD80

1 2
12

12

PC6

0.1U_0603_25V4Z

RLZ24B_LL34

VS

ACIN

Precharge detector

Min. typ. Max.
H-->L 14.589V 14.84V 15.243V
L-->H 15.562V 15.97V 16.388V

BATT ONLY

Precharge detector

CHGRTCP

PR12

PR14

1 2

PU2

OUT

GND

1

ADPIN

12

PC1

560P_0402_50V7K

BATT+

RB751V-40TE17_SOD323-2

1 2

12

PC5

RTCVREF

3

12

PC11

PD3

12

1 2

560_0402_5%

4.7U_0805_6.3V6K

PCN1

1 1

2 2

3 3

12

12

1

2

G
G

3

SINGA_2DC-G756I200

51ON#42,43

PR17
200_0603_5%

2

PC10
1U_0805_25V4Z

100K_0402_5%

22K_0402_5%

G920AT24U_SOT89

IN

PD2

VIN

12

12

PR2
10_1206_5%

MAINPWON27,51,53

ACON52

VIN

2
3

PD1

1N4148_SOD80

PR13

100K_0402_1%

PD5

1

RB715F_SOT323

RTCVREF

12

VL

12

12

PC8

0.1U_0402_16V7K

ACOFF40,52

PR1

1K_1206_5%

1 2

PR3

1K_1206_5%

1 2

PR6

1K_1206_5%

1 2

PR7

1K_1206_5%

1 2

DTC115EUA_SC70

VS

1

O

PR20

34K_0402_1%

PQ2

2

PR10

2.2M_0402_5%

12

LM393DR_SO8

PU1A

8

3

P

+

2

-

G

4

12

66.5K_0402_1%@

12

PR4

470K_0402_5%

13

12

PC9

1000P_0402_50V7K

PR22

PQ1

TP0610K-T1-E3_SOT23

13

12

PR5

470K_0402_5%

2

12

PR8
470K_0402_5%

13

PQ3

2

DTC115EUA_SC70

B+

B+

12

PR11
499K_0402_1%

13

PR16

PR21
47K_0402_5%

2

12

12

PC7

12

PQ6
DTC115EUA_SC70

0.01U_0402_25V7Z

PACIN 52,54

+5VALWP

12

12

PR15
191K_0402_1%

PRG++

RHU002N06_SOT323

PQ5

13

D

2

G

S

499K_0402_1%

Min. typ. Max.

4 4

H-->L 6.138V 6.214V 6.359V
L-->H 7.196V 7.349V 7.505V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

C

Title

Size Do cument Number Rev

B

Date: Sheet

Compal Electronics, Inc.

DCIN/DECTOR/RTC

HBL50 LA-2921P

D

50 59Friday, Novem ber 11, 2005

of

0.2

A

1 1

B

C

D

PC12

PQ7

G2
D1/S2/K
D1/S2/K
D1/S2/K

AO4916L_SO8

1 2

VS

PZD1

RLZ5.1B_LL34

0.1U_0603_25V7K

1 2

1

D2

2

D2

3

G1

4

S1/A

47K_0402_5%

1 2

MAINPW O N27,50,53

PR23

0_0402_5%

1 2

MAX8734A_B+

DL5

PR31

PR32

1U_0603_6.3V6M

12

1 2

100K_0402_5%

PC28

PR26
0_0402_5%

1 2

PC24

0.047U_0402_16V7-K

PR36
0_0402_5%

1 2

PR41

47K_0402_5%

12

VL

PC22

4.7U_0805_6.3V6K

0_0402_5%
PR34

1 2

1 2

PC26

12

PC29

0.047U_0402_16V7-K

12

BST5A_5V

12

0.22U_0603_10V7K

MAX8734A_B+

PC19

1U_1206_25V7K

14

DH5

16

LX5

15

DL5

19
21

9
1

6
4
3

12

8

2VREF_1999

12

PR24

4.7_1206_5%

12

18

20

BST5
DH5
LX5

DL5
OUT5
FB5
N.C.

SHDN#
ON5
ON3

V+

LD05

PU3

MAX8734AEEI+_QSOP28

SKIP#
REF

GND

23

PC27

4.7U_0805_10V6K

12

25

12

LDO3

BST5B_5V

PC20

13

TON

0.1U_0603_25V7K

17

VCC

OUT3

PGOOD

PRO#

10

1 2

ILIM3

ILIM5

BST3

DH3

DL3
LX3

FB3

PR40
0_0402_5%

BST3B_3V

2

3

PD6

CHP202UPT_SOT323-3

1

PR27

1 2

47_0402_5%

12

PC21

1U_0805_16V7K

ILM3

5

ILM5

11

BST3A

28

DH3

26

DL3

24

LX3

27
22

7
2

VL

12

PC14

0.1U_0603_25V7K

SPOK 53

ILM3

1 2

2VREF_1999

PR38

1 2

100K_0402_1%

PR42

1 2

499K_0402_1%

PR28
0_0402_5%

PR29

0_0402_5%

1 2

1 2

1 2

PR39

100K_0402_1%

ILM5

PR43

499K_0402_1%

12

PC17

B+

PL3

FBMA-L11-322513-151LMA50T_1210

5HG

1 2

MAX8734A_B+ MAX8734A_B+

12

12

PC16

PC15

2 2

2200P_0402_50V7K

4.7U_1206_25V6K

PL4

1 2

10U_LF919AS- 100M-P3_4.5A_20%

8
7
6
5

+5VALWP

1

PR30

+

@

1 2

3 3

PC23

150U_D_6.3VM

10.2K_0402_1%

2

PR35

0_0402_5%

1 2

PC13

0.1U_0603_25V7K

1 2

3HG

12

PC18

2200P_0402_50V7K

4.7U_1206_25V6K

PR37

PQ8

1

D2

2

D2

3

G1

4

S1/A

AO4916L_SO8

PR33

1 2

1 2

0_0402_5%

D1/S2/K
D1/S2/K
D1/S2/K

3.57K_0402_1%@

8

G2

7
6
5

PL5

1 2

10U_LF919AS- 100M-P3_4.5A_20%

+3VALWP

1

+

PC25
150U_D_6.3VM

2

+5VALWP Ipeak = 6.66A ~ 10A +3VALWP Ipeak = 6.66A ~ 10A

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

C

Title

Size Do cument Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

+5VALWP/+3VALWP

HBL50 LA-2921P

D

51 59Friday, Novem ber 11, 2005

0.2

A

B

C

D

E

Charger

Iadp=0~4.74A(90W)

PQ9

AO4407L_SO8~N

PQ12

2

13

ACOFF#

8
7

5

47K

47K

1 3

PQ14
DTC115EUA_SC70

PD8

1 2

1N4148_SOD80
PR64

22K_0402_5%

1 2

VIN

1 1

12

PR46
47K_0402_5%

DTA144EUA_SC70

2

13

D

PQ16

2

2 2

3 3

G

S

RHU002N06_SOT323

PACIN50,54

ACON50

P2

1
2
36

4

12

12

PC34

0.1U_0603_25V7K

12

PR55

150K_0402_5%

13

D

2

G

S

PQ10

AO4407L_SO8~N

1
2
3 6

PR45
200K_0402_1%

PR201

RHU002N06_SOT323

4

1U_0603_10V6K

57.6K_0402_1%
PR198

12

100K_0402_1%

PQ17

PC148

8
7

5

12

12

1908LDO

12

PC151

0.1U_0402_16V7K

IREF40

9.31K_0402_1%

P3

PC146

0.1U_0603_25V7K

1SS355_SOD323

PD13

VIN

PC149

0.1U_0603_25V7K

12

PR199

24.9K_0402_1%
PR204

PR205

100K_0402_1%

FSTCHG40

LI-4S :17.8V--BATT-OVP=1.9758V

12

12

12

15K_0402_1%

12

12

100K_0402_5%

PR44

0.01_2512_1%

6C/8C#53

SI2301DS_SOT23~D

PR200

12

PR207

0_0402_5%

1 2

PR208

PQ42

12

12

PC153

0.01U_0402_25V7K

1 2

BATT-OVP=0.111*BATT+

12

G

S

PR197
0_0402_5% @

PR209

10K_0402_5%

B+

PC147

0.1U_0603_25V7K

2

13

D

12

0.1U_0402_16V7K

1 2

FBMA-L18-453215-900LMA90T_1812

1 2

PU4

MAX1908ETI_QFN28

1

DCIN

17

CELLS

4

REF

3

CLS

12

REFIN

15

VCTL

13

ICTL

11

ACOK#

8

SHDN#

10

ACIN

9

ICHG

28

IINP

7

CCV

CCI

6

PR206

1K_0402_1%

1 2

12

12

PC156

0.01U_0402_25V7K

PC158

12

PC159

0.1U_0402_16V7K

PL6

CCS

5

MAX1908-CCS

1 2

PC157

0.01U_0402_25V7K

12

PC30

PC31

4.7U_1206_25V6K

4.7U_1206_25V6K

27

CSSP

26

CSSN

25

DHI

23

LX

21

DLO

24

BST

22

DLOV

2

LDO

19

CSIP

18

CSIN

16

BATT

PGND

GND

20

14

12

charger_DHI

charger_LX

charger_DLO

charger_BST

charger_DLOV

1908LDO

PC32

0.1U_0603_25V7K

1 2

BATT+

12

PC33

PC154
1U_0603_10V6K

IREF=0.832*Icharge
IREF=0.73~3.3V

VS

2P4S:4800mAH/cell

0.8C=3.84A

4 4

OVP voltage :

8

PU5A

3

P

+

1

0

2

-

G

LM358ADR_SO8

4

BATT_OVP40

7

LI-3S :17.8V----BATT-OVP=1.9758V
BATT-OVP=0.111*BATT+

A

B

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

12

2200P_0402_50V7K

1 2

PR202 0_0402_5%

8

P

0

G

4

CHG_B+

5

D8D7D6D

S1S2S3G

4

5

D8D7D6D

S1S2S3G

4

12

PR203

33_1206_5%

VS

12

PC49

PU5B

5

+

6

-

LM358ADR_SO8

D

0.01U_0402_25V7Z

PQ15

SI4810BDY-T1-E3_SO8

PQ41

SI4810BDY-T1-E3_SO8

1 2

12

PC150

@

1000P_0402_50V7K

PC152

0.1U_0603_25V7K

1 2
12

PD14
1SS355_SOD323

PC155
1U_0805_25V4Z

BATT+

12

PR67
845K_0603_1%

12

PR68

300K_0603_0.1%

12

PR71

200K_0402_1%

PQ11

AO4407L_SO8~N

1
2
3 6

PR49

10K_0402_1%

1 2

4

1 2

13

PL7

10U_LF919AS-100M-P3_4.5A_20%

8
7

5

PR47

47K_0402_1%

1 2

ACOFF#

PQ13
DTC115EUA_SC70

ACOFF

2

0.015_2512_1%

1 2

PR61

VIN

ACOFF 40,50

12

12

PC47

PC46

4.7U_1206_25V6K

4.7U_1206_25V6K

Charge voltage

4S CC-CV MODE : 16.8V

+3VALWP

PR210

511K_0402_1%

1 2

12

PC50

0.01U_0402_25V7Z

Title

Size Document Number Rev

B

Date: Sheet

RHU002N06_SOT323

PQ43

13

D

2

G

S

Compal Electronics, Inc.

Charger

HBL50 LA-2921P

12

13

D

S

E

2

G

RHU002N06_SOT323
PQ44

12

PC48

4.7U_1206_25V6K

PR211
10K_0402_5%

6C/8C# 53

of

52 59Friday, November 11, 2005

BATT+

0.2

A

PR212

100K_0402_5%

BATT++BATT+

PL8

FBMA-L18-453215-900LMA90T_1812

BATT+

1 1

12

PC53

0.01U_0402_25V7Z

1 2

1000P_0402_50V7K

PC54

PJP2 battery connector

SMART
Battery:

1.GND

2.SMC

3.SMD

4.TS

5.B/I

2 2

6.ID

7.BATT+

SUYIN_200275MR007G161ZL

12

PJP1

7
6
5
4
3
2
1

BATT++

1 2

PR213

1K_0402_5%

1 2

PR84

1K_0402_5%

12

PR214
1K_0402_5%

@

12

+3VALWP

6C/8C# 52

1 2

1 2

1 2

B

PR85

1K_0402_5%

PR87

6.49K_0402_1%

PR89

100_0402_5%

PR90

100_0402_5%

1 2

BATT_TEMP

BATT_TEMP 40

+3VALWP

EC_SMB_DA1 15,40,41,45

EC_SMB_CK1 15,40,41,45

PC56

1000P_0402_50V7K

C

PH1 under CPU botten side :

CPU thermal protection at 80 degree C
Recovery at 44(45) degree C

5
6

150K_0402_1%

PR88

12

150K_0402_1%

1 2

442K_0603_1%

VS

8

P

+

-

G

4

PR86

12

PR77

PU1B

7

O

LM393DR_SO8

VL

PR81

10.7K_0402_1%

12

100K_0603_1%_TH11-4H104FT

VL

PH1

12

61.9K_0402_1%
PR83

1 2

12

TM_REF1

12

PC57

1U_0805_25V4Z

D

VL

PR80

12

PC55

0.1U_0603_25V7K

150K_0402_1%

1 2

MAINPWON 27,50,51

+1.8V

PU6

PQ20

TP0610K-T1-E3_SOT23

PC58

3 3

4 4

B+

12

PR92

100K_0402_5%

VL

PR96
100K_0402_5%

PR97

1 2

SPOK51

0_0402_5%

1 2

0.1U_0402_16V7K@

2

G

12

PC66

12

PR94
22K_0402_5%

1 2

13

D

PQ22
RHU002N06_SOT323

S

PC60

0.22U_1206_25V7K

13

12

2

+VSBP

PC61

0.1U_0603_25V7K

SUSP43,49,54

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2005/06/20 2006/06/20

10U_1206_6.3V7K

PR95

0_0402_5%

SUSP

1 2

PC65

0.1U_0402_16V7K@

Compal Secret Data

Deciphered Date

12

1K_0402_1%

13

D

2

G

S

12

C

RHU002N06_SOT323

PQ21

PR91

PR93

1K_0402_1%

12

12

12

PC62

0.1U_0402_16V7K

VIN1VCNTL

2

GND

3

VREF

4

VOUT

APL5331KAC-TRL_SO8

12

12

PC63

22U_1206_6.3V6M

Title

BATTERY CONN. / OTP/+0.9VSP

Size Do cument Number Rev

B

Date: Sheet

6
5

NC

7

NC

8

NC

9

TP

+0.9VSP

PC64

@

22U_1206_6.3V6M

12

Compal Electronics, Inc.

HBL50 LA-2921P

D

+3VALW

PC59
1U_0603_6.3V6M

53 59Friday, Novem ber 11, 2005

0.2

of

5

4

3

2

1

AC Adapter Detector

1 2

0_0402_5%

1.5V_DL1

1 2

4.7_0402_5%
PR109

PC78

680P_0603_50V8J

PJ2

1 2

PAD-OPEN 3x3m

PJ4

1 2

PAD-OPEN 3x3m

PJ6

1 2

PAD-OPEN 3x3m

PJ8

112

JUMP_43X79

PC72

1U_0805_25V4Z@

PR108

12

PC83

825_0402_1%

+1.8V

+0.9VS

+2.5VS

2

0_0402_5%

PR106

1 2

12

12

+VSB

PQ23

8

G2

7

D1/S2/K

6

D1/S2/K

5

D1/S2/K

AO4916L_SO8

3.0UH_SPC-07040-3R0GP_5A_30%

12

PR113

7.15K_0402_1%

PR112

4.7_1206_5%

12

PR117

0.033U_0603_25V7K

SUSP# 37,40,41,43,49

1

D2

2

D2

3

G1

4

S1/A

1.5V_DL2

PL10

1 2

PR116

1.5K_0402_1%

1 2

1 2

PC84

1000P_0402_50V7K

12

PR114

30_0402_5%

PC85

0.1U_0603_25V7K

1 2

PC52

1

+

PC80

2

Vin Detector

17.90V/17.24V

12

+1.5VSP

330U_D2E_2.5VM

VIN

12

PR69

84.5K_0402_1%

1 2

12

PR72

20K_0402_1%

PR74

22K_0402_5%

12

PC51

0.1U_0603_25V7K

+3VALW

PR75

1 2

1M_0402_1%

VS

8

PU7A

3

P

+

1

O

2

-

G

LM393DR_SO8

PR70

10K_0402_5%

4

12

RLZ4.3B_LL34

RTCVREF

CM8562IS_PSOP8

1

+2.5VSP

1 2

PC75

4.7U_1206_25V6K

12

PR110

10_0603_1%

1 2

PC81

0.1U_0603_25V7K

2

3

4

PC79

1 2

22U_1206_6.3V6M

VIN

VFB

VTT

VTT

VIN

12

12

PZD2

8

PU7B

5

P

+

O

6

-

G

LM393DR_SO8

4

PU9

PGND

AGND

VCCA

REFEN

AGND

9

1 2

PR111

200K_0402_1%

AGND

PC82

0.047U_0402_16V4Z

PR73
10K_0402_5%

7

8

AGND

7

6

5

12

PR98

10K_0402_5%

1 2

12

PR99
10K_0402_5%

REF_EN

64.9K_0402_1%

RHU002N06_SOT323

13

D

PQ24

2

G

S

PR115

ACIN

PACIN

12

SUSP

+5VALW

PC77

1U_0603_6.3V6M

ACIN 28,40

PACIN 50,52

1 2

RTCVREF

SUSP 43,49,53

PJ1

PJ3

1 2

PAD-OPEN 3x3m

21

PAD-OPEN 3x3m

D D

(2.5A,100mils ,Via NO.=5)

+5VALWP

(5A,200mils ,Via NO.= 10)

PJ5

+3VALWP

1 2

PAD-OPEN 3x3m

(4.5A,180mils ,Via NO.= 9)

PJ7

+1.05VSP

1 2

PAD-OPEN 3x3m

+1.5VS+1.5VSP

+5VALW

+3VALW

+1.05VS

+1.8VP

(6A,240mils ,Via NO.= 12)

+0.9VSP

(0.3A,40mils ,Via NO.= 2)

+2.5VSP

(0.3A,40mils ,Via NO.= 2)

+VSBP

(2A,80mils ,Via NO.= 4)

C C

B+

B B

PL9

FBMA-L11-322513-151LMA50T_1210

1 2

PR107

4.99K_0402_1%

12

PC74

3300P_0402_50V7K

1 2

+5VS

1 2

12

4.7U_0805_6.3V6K

MAX8578_B+

PC70

0.1U_0603_25V7K

PC73

0.01U_0402_25V7Z

1.5V_OCSET

1.5V_SS

1.5V_FB

1.5V_VL

PC76

12

12

PC71

4.7U_1206_25V6K

PU8

10

OCSET

2

SS

1

FB

3

VL

4

GND

BST

MAX8578EUB+T_UMAX10

PD9

1SS355_SOD323

1.5V_EN

9

EN

1.5V_DH1 1.5V_DH2

8

DH

1.5V_LX

7

LX

5

DL

6

1.5V_BST

12

1 2

0.1U_0603_25V7K

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/06/20 2006/06/20

3

Compal Secret Data

Deciphered Date

Title

Size Do cument Number Rev

B

2

Date: Sheet

Compal Electronics, Inc.

+1.5VSP/RTCVREF

HBL50 LA-2921P

54 59Friday, Novem ber 11, 2005

1

0.2

of

5

D D

4

3

2

1

MAX8743_B+

PL1

1 2

12

12

PC86

2200P_0402_50V7K

C C

PQ26

SI4800BDY-T1-E3_SO8

PL11

+1.8VP

1

12

+

PC96

2

150U_D_6.3VM

B B

1.8U_D104C-919AS-1R8N_9.5A_30%

PC98

@

PR219

12

8.2K_0402_5%

4.7U_0805_6.3V6K

1 2

5

4

5

4

@

D8D7D6D

S1S2S3G

PQ27

D8D7D6D

SI4810BDY-T1-E3_SO8

S1S2S3G

12

PR220

10K_0402_1%

SYSON37,40,49

PC87

4.7U_1206_25V6K

0.1U_0603_25V7K
PC92

12

PR123

0_0402_5%

0.01U_0402_25V7Z@

1

PD10
DAP202U_SOT323

2

3

1U_0805_25V4Z

0.1U_0603_25V7K
PC94

BST1B_1.8V

PR119
0_0402_5%

1 2

BST1A_1.8V
DH_1.8V BST2A_1.05V
LX_1.8V

DL_1.8V

12

PC100

12

PU10

25

BST1

26

DH1

27

LX1

24

DL1

28

CS1

1

OUT1

2

FB1

11

ON1

12

PC95

12

4

V+

MAX8743EEI_QSOP28

SKIP

GND

OVP

6

8

23

PC101

0.22U_0603_10V7K

22

VCC

PR118

20_0603_5%

1 2

9

VDD

UVP

BST2

DH2

LX2
DL2
CS2

OUT2

FB2

ON2

PGOOD

TON

ILIM2
ILIM1

REF

PR125

10

33K_0402_1%

PR126

15K_0402_1%

12

21
19

18
17
20
16

15
14
12

7
5

13
3

+5VALW

LX_1.05V
DL_1.05V

12
12

12

DH_1.05V

PR127

100K_0402_1%

PC88

4.7U_0805_6.3V6K

BST2B_1.05V

12

12

0.1U_0603_25V7K
PC93

12

PR120
0_0402_5%

1 2

PR128

100K_0402_1%

SI4800BDY-T1-E3_SO8

PQ25

1 2

PR124

0_0402_5%

5

D8D7D6D

S1S2S3G

4

5

PQ28

D8D7D6D

SI4810BDY-T1-E3_SO8

S1S2S3G

PL12

1.8U_D104C-919AS-1R8N_9.5A_30%

1 2

4

VS_ON 43

FBMA-L11-322513-151LMA50T_1210

12

12

PC89

2200P_0402_50V7K

@

PC90

12

PR121

499_0402_1%

12

PR122

10K_0402_1%

12

4.7U_1206_25V6K

@

B+

PC91

4.7U_1206_25V6K

+1.05VSP

1

12

+

PC99

4.7U_0805_6.3V6K

PC97

2

150U_D_6.3VM

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/06/20 2006/06/20

3

Compal Secret Data

Deciphered Date

Title

Size Do cument Number Rev

B

2

Date: Sheet

Compal Electronics, Inc.
+1.05VSP/+1.8VP

HBL50 LA-2921P

55 59Friday, Novem ber 11, 2005

1

0.2

of

5

D D

PR132

13K_0402_1%

NTC

PH2

100K_0603_1%_TH11-4H104FT

1 2

1 2

1 2

1 2
1 2
1 2

PR155

2K_0402_1%@

PR167

PC126

0.1U_0402_16V7K

1 2

12
12
12
12
12
12

56_0402_5%

0_0402_5% @

1 2

1 2

PR168 10K_0402_5%

PR134 0_0402_5%
PR136 0_0402_5%
PR137 0_0402_5%
PR138 0_0402_5%
PR140 0_0402_5%
PR142 0_0402_5%
PR143 0_0402_5%

C C

PR148 499_0402_1%
PR149 0_0402_5%
PR150 0_0402_5%

PR158

0_0402_5%

VGATE6,14,28

CLK_ENABLE#14

VR_ON40

B B

A A

1 2

1 2

1 2

0_0402_5%

0_0402_5%
PR161

PR163

CPU_VID05
CPU_VID15
CPU_VID25
CPU_VID35
CPU_VID45
CPU_VID55
CPU_VID65

PM_DPRSLPVR6,28

H_DPRSTP#4,27

PSI#5

+3VS

PR154

2K_0402_1%@

1 2

PR164

10K_0402_5%@

1 2

TV_THERM#36,40

POUT40

1 2

PR147 71.5K_0402_1%

1 2

PC115 0.22U_0603_16V7K

+3VS

12

PR166

4

+5VS

PR129

12

PR130
10_0402_5%

VCC

12
12

PC113470P_0402_50V8J

VRHOT

5VS1

PC110
1U_0603_6.3V6M

1 2

PU11

19

Vcc

6

THRM

31

D0

32

D1

33

D2

34

D3

35

D4

36

D5

37

D6

7

TIME

9

CCV

11

REF

39

DPRSLPVR

40

DPRSTP

3

PSI

2

PWRGD

1

CLKEN

38

SHDN

5

VRHOT

4

POUT

MAX8770GTL+_TQFN40

VSSSENSE5

12

0_1206_5%

PC109

2.2U_0603_6.3V6K

VDD
TON

BST1

DH1

LX1

DL1

PGND1

GND

CSP1

CSN1

FB

CCI

DH2

BST2

LX2

DL2

PGND2

CSP2

CSN2

GNDS

PC119

1000P_0402_50V7K

VSSSENSE

12

12

PR131

1 2

25
8
30
29
28
26
27
18
17
16
12
10
21
20
22
24
23
14
15
13

PR165

100_0402_5%

PR169

10_0402_5% @

200K_0402_5%

0_0402_5%

BST1_CPU BSTM1_CPU

LX1__CPU
DL1__CPU

CSP1__CPU
CSN1_CPU
FB_CPU
CCI_CPU
DH2_CPU
BST2_CPU
LX2_CPU
DL2__CPU

CSP2_CPU
CSN2__CPU

1 2

PR135

1 2

1 2

12

3

CPU_B+

PC103

0.01U_0402_25V7Z

0.22U_0603_16V7K

PR153

0_0402_5%

1 2

BSTM2_CPU

12

PC120

0.22U_0603_16V7K

PC111

1 2

IRF8113PBF_SO8

PQ30

IRF8113PBF_SO8

NTC

3K_0603_1%@

1 2

PR162

20K_0402_1%

0_0402_5%

PR216

1 2

PQ34

0_0402_5%

PR215

1 2

578

3 6

241

PR152 1K_0402_1%@

1 2

PR156 3.65K_0402_1%

1 2

PQ32

SI7840DP_SO8

578

3 6

241

1 2

PR159

DL1__CPU

1 2

PR160
3K_0603_1%@

DL2__CPU

PQ29
SI7840DP_SO8

3 5

241

578

3 6

241

PQ31

IRF8113PBF_SO8

PR151 0_0402_5%

1 2

1 2

PC118

470P_0402_50V8J

3 5

241

578

3 6

241

PR174 0_0402_5%

1 2

2

PC104

10U_1206_25VAK

PR139

@

PC121

10U_1206_25VAK

PR170

@

PQ33

IRF8113PBF_SO8

12

12

12

PC105

PC106

10U_1206_25VAK

10U_1206_25VAK

P_0.36H_ETQP4LR36WFC_24A_20%

12

4.7_1206_5%
PR141

3.48K_0402_1%

1 2

2.1K_0402_1%

12

PC116 1000P_0402_50V7K@

1 2

12

12

4.7_1206_5%

12

PR145

1 2

10KB_0603_1%_TH11-3H103FT

PC112

PC114 0.22U_0603_16V7K

680P_0402_50V7-K

@

1 2

1 2

PR157 100_0402_5%

PC117
4700P_0402_25V7K

12

12

PC122

PC123

10U_1206_25VAK

10U_1206_25VAK

12

PC127

680P_0402_50V7-K

@

PL13

FBMA-L11-322513-201LMA40T_1210

12

12

PC108

PC107

PC124

PR171

2.1K_0402_1%

0.1U_0603_25V7K

PL14

1 2

0.1U_0603_25V7K

2200P_0402_50V7K

12

NTC

PH3

1 2

CPU_VCC_SENSE

CPU_B+

12

12

PC125

2200P_0402_50V7K

PL15

P_0.36H_ETQP4LR36WFC_24A_20%

PR172

3.48K_0402_1%

1 2

10KB_0603_1%_TH11-3H103FT

1 2

PC128 0.22U_0603_16V7K

12

12

B+

1

+

PC102

100U_25V_M

2

+CPU_CORE

12

@

PR144 10_0402_5%

NTC

PH4

1 2

VCCSENSE

12

1

+CPU_CORE

PR194
0_0402_5%

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.

2005/06/20 2006/06/20

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

2

Date: Sheet

+CPU_CORE
HBL50 LA-2921P

0.2

of

56 59Friday, November 11, 2005

1

5

4

3

2

1

POWER_SEL

+VGA_CORE FOR G73.

H

L

+1.025V+0.95V(VGA@+G72@)

+VGA_CORE FOR G72. +1.1V(VGA@)

D D

VGA_B+

PL18

12

FBMA-L11-322513-151LMA50T_1210

12

PC130

4.7U_1206_25V6K

1 2

PR182

49.9K_0402_1%

1 2

@

PR178

10K_0402_1%

PR217

12

12

@

4.7_1206_5%

PC134

4.7U_1206_25V6K

12

12

PC160

680P_0402_50V7-K

@

PR180

1 2

100K_0402_1%

@

12

PC132

2200P_0402_50V7K

@

0.1U_0603_25V7K
PC135

REF_VGA

12

VGA_ON

PR176
2_0402_5%

1 2

BST1A_VGA

1 2

PR185

0_0402_5%

DH_VGA
LX_VGA

DL_VGA

FB_VGA

1

PD12
DAP202U_SOT323

2

3

0.1U_0603_25V7K

BST1B_VGA

25
26
27

24
28

1
2

11

PC137

12

4

PU12

BST1

V+

DH1
LX1

DL1
CS1

OUT1
FB1

MAX8743EEI_QSOP28

ON1

GND

OVP

8

23

0.22U_0603_10V7K

BST2B_1.2V

1U_0805_25V4Z
PC138

12

9

22

UVP

VCC

BST2

OUT2

PGOOD

ILIM2
ILIM1

SKIP

REF

6

10

REF_VGA

12

PC144

PR175

20_0603_5%

1 2

21

VDD

19
18

DH2

17

LX2

20

DL2

16

CS2

15
14

FB2

12

ON2

7
5

TON

13
3

PR188

205K_0402_1%

PR189

15K_0402_1%

+5VALW

BST1A_1.2V
LX_1.2V

DL_1.2V

FB_1.2V

12
12

PR191

200K_0402_1%

12

12

PC131

4.7U_0805_6.3V6K

1 2

DH_1.2V

0.1U_0603_25V7K
PC136

12

PR177
0_0402_5%

1 2

PR184 0_0402_5%

REF_VGA

12

PR195

0_0402_5% @

12

PR192

100K_0402_1%

PQ35

8

G2

7

D1/S2/K

6

D1/S2/K

5

D1/S2/K

AO4916L_SO8

1

D2

2

D2

3

G1

4

S1/A

3.0UH_SPC-07040-3R0GP_5A_30%

VGA_ON

VGA_ON 43

VDD_PWRGOOD 17

12

PC129

2200P_0402_50V7K

@

PL16

1 2

12

PC133

4.7U_1206_25V6K

PQ36

PL17

1 2

13

D

S

SI7840DP_SO8

2

RHU002N06_SOT323@

+VGA_CORE_P

+VGA_CORE_P

C C

1

+

PC140

2

12

330U_D2E_2.5VM

PC141

@

0.01U_0402_25V7Z@

+VGA_CORE

PR193

100K_0402_5%@

PC145

B B

POWER_SEL15

0.56UH_ETQP4LR56WFC_21A_20%

1 2

12

PR179

4.7U_0805_6.3V6K
15K_0402_1%

12

PR196

15K_0402_1%

@

+5VALW

PR190

100K_0402_5%@

12

2

G

12

DL_VGA

PR186

210K_0402_1%

@

G

PQ40

12

13

D

S

578

3 6

PQ39

RHU002N06_SOT323@

241

3 5

241

PQ37
AO4410_SO8

DL_VGA

12

PR187

150K_0402_1%

578

3 6

0_0402_5%

241

PQ38

AO4410_SO8

PR218

B+

+1.2VSP

1

12

+

PC142

4.7U_0805_6.3V6K

2

+1.2VSP

PC139

150U_D_6.3VM

PJ10

1 2

A A

+VGA_CORE_P

+VGA_CORE_P + V GA_ CORE

5

PAD-OPEN 3x3m

PJ9

1 2

PAD-OPEN 3x3m

PJ11

1 2

PAD-OPEN 3x3m

+1.2VS+1.2VSP

+VGA_CORE

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/06/20 2006/06/20

3

Compal Secret Data

Deciphered Date

Title

Size Do cument Number Rev

B

2

Date: Sheet of

Compal Electronics, Inc.
+VGA_CORE_P/+1.2VSP

HBL50 LA-2921P

57 59Friday, Novem ber 11, 2005

1

0.2

5

A --> B Change List

1. Page06 : No stuff R100 10K_0402_5%

2. Page09 : Add C49 & C887 220U_D2_4VM

3. Page10 : No stuff R57 2.2K_0402_5%

4. Page14 : Add R711 10K_0402_5% to set 96MHz output
Change Q14 & Q15 pin1 net name to connect to ICH7M
Change U19 ICS9LPRS325CKLFT part number to SA00000RE20

D D

C C

5. Page15 : Change C663, C664 from 22P_0402_50V8J to 18P_0402_50V8J.

6. Page18 : Modify VGA Device ID for G72MV & G73.

7. Page24 : Change VGA_DDC_CLK & VGA_DDC_DATA to Q26 & Q27 Level shift.
Add R781 & R782 4.7K_0402_5%
Change C589, C596, C583, C587, C594, C585 to 150P_0402_50V8J

8. Page28 : Change SB_INT_FLASH_SEL# from ICH7M GPIO38 to GPIO33.

9. Page29 : Change C437 from 0.1U_0402_16V4Z to 1U_0402_6.3V4Z

10. Page30 : Change PATA HDD+ODD select resistor form RP to R_0402 (0_0402_5%)

11. Page34 : Stuff R175 & no stuff R182( 0_0402_5%) for BCM4401E/BCM5789M/BCM5787M

12. Page35 : Modify LAN_ACTIVITY# & LAN_LINK# LED color

13. Page 36 : Add JP38 & C895 for CAMERA.
Swap JP17 PCIE TX & RX Signal.
Swap JP30 PCIE TX & RX Signal.

14. Page37 : Connect JP34 SMBus interface to ICH7M
Change JP4 & JP5 USB connector to BOTTOM.

15. Page38 : Add 1394@ BOM Structure.

16. Page41 : Delete LCM interface Extension I/O.
No stuff R390 & Stuff R418 for Flash ROM interface.

17. Page42 : Change JP11 from 34 pin to 24 pin.
Change SW8 & SW9.
Add JP37.

18. Page43 : Change U28 Part Number.
Change SW1 Part Number.
Change R425 from 10K_0402_5% to 62K_0402_1%
Change R422 from 10K_0402_5% to 62K_0402_1% & add C513 0.1U_0402_16V4Z

19. Page44 : Add C554 for MIC_R
Add R440, R695 (0_0603_5%) & J4, J5 for EMI request.

4

3

2

1

B --> C Change List

1. Page05 : No stuff C608, C614

2. Page12 : Change JP22 Footprint

3. Page14 : Change R620 from 2K_0402_5% to 10K_0402_5% & add Q38

4. Page15 : Delete DVI pull high resistor

5. Page17 : AddC96 330U for +VGA_CORE

6. Page18 : Modify PEX_CFG[0..2] setting from 02 to 01.

7. Page30 : Delete R395 & C486, add R394 for SATA bridge reset timing
Modify SATA HDD connector library

8. Page31 : Delete IDE_CD_L, IDE_CD_R & CD_GNDA

9. Page34 : Add R783, R784, R785 for BCM5787M, stuff R214 when use BCM4401E,
Del R168, change Q5 P/N

10. Page36 : Add +3VS, GND at JP30 for 3G device

11. Page38 : No stuff U14, R253, R246 & stuff R261

12. Page40 : Reserved R793 for ALC883 pin47 EAPD, & define KB910 Pin174 as EC_PWROK

13. Page41 : No stuff U21, U30, C490, R391, R390, R388 & stuff R418

14. Page42 : Modify SW9 Pin1, Pin5 as NC, no stuff C7

15. Page43 : Modify Power OK circuit. add R790 for EC_PWROK, reserved Q41, R420, C512
add D35, D3 7, Change BATT1 P / N to SP093PA0200

16. Page44 : Delete ALC883 CD input circuit, add HD_EAPD# signal

17. Page46 : Add C927, C928, reserved R791, R792

18. Page49 : Stuff Q33

20. Page45 : Add Echo Cancellation function.

21. Page46 : Correct Headphone L & R signal.
Reserved C879 for EMI request
Modify MIC Jack circuit. add R741, R775, R776, L54, C876
Change JP44 from 14 pin to 16 pin

22. Page48 : H27 connect to GNDA.

B B

23. Page49 : Add R290, R238, R497, Q10, Q7, Q29
Change R317 to 200K_0402_5%
Change R586 to 510K_0402_5%

A A

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

2

Date: Sheet

Compal Electronics, Inc.

HW PIR

HBL50 LA-2921P

1

0.3

of

58 59Friday, November 11, 2005

5

D D

C C

4

3

2

1

B B

A A

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

2

Date: Sheet

Compal Electronics, Inc.

PWR PIR

HBL50 LA-2921P

1

0.3

of

59 59Friday, November 11, 2005