COMPAL LA-2891 Schematics

A

1 1

B

C

D

E

HBL30 (Sakhir 20C)

2 2

LA-2891 Schematics Document

Intel Dothan / AlvisoGM / DDR-II / ICH6-M / Fixed Bay

3 3

2005 / 05 / 03

Rev:0.1

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/04/21 2006/09/01

C

Compal Secret Data

Deciphered Date

Title

Size Do cum e nt Number R e v

Custom

D

Dat e : Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2891
401376

期二 五月

149¬P , 24, 2005

E

A

of

A

Compal confidential

B

C

D

E

File Name : LA-2891

CRT/TV-OUT

1 1

page 14

Integrated Gfx

page 15

LCD CONN

page 15

Fan Control

page 35

Intel Dothan CPU

H_A#(3..31)

FSB

400 / 533 Mhz

Intel A lviso
GM( GML)

PCBGA 1257

page 4,5

H_D#(0..63)

page 6,7,8,9,10

Therma l Sensor
ADM1032ARM

page 4

DDR-II

Dual Ch annel DDR-II

1.8V DDR II 400/533

Clock Generator
ICS954226

page 13

DDR II-SO-DIMM X2

BANK 0, 1, 2, 3

page 11,12

DMIX4

RJ45&RJ11 c onn
Serie s Port

2 2

in LS-2494 sub-board

Mini PCI
socket

page 27

3 3

TI Controller

PCI7411/4510

1394
Conn.

page 22

page 36

PCMCIA Slot 0

MARVELL LAN

88E8036RJ45 CONN
88E8053

PCI BUS

3.3V 33MHz

page 21,22

page 25,26

5in1 CardReader

page 25

Slot

PCI-E BUS

page 23

Intel ICH6-M

mBGA-609

LPC BUS

3.3V 33MHz

page 17 , 1 8 ,19,20

USB 2.0

USB 2.0

AC-LINK

3.3V 24.576MHz

SATA

3.3V,5V 1.5GHz

PATA

3.3V ATA100

USB conn

page 36

BT Conn

Audio CKT
ALC250-D

page 28

SATA HDD

connector

page 20

ODD
Connector

page 20

page 33

USB Port x3
in LS-2493 sub-board

Docking
Audio

page 29

Power Switch & LED
in LS-2495 sub-board

Touch Pad(2 buttom)
in LS-2496 sub-board

RJ45&RJ11 c onn
USB Port x1
in LS-2494 sub-board

AMP & Audio Jack

page 30

SMsC LPC47N217

page 32

ENE KB910/910L

page 33

Power On/Off CKT.

page 38

4 4

DC/DC Interface CKT.

page 39

Power Circuit DC/DC

page 41~47

A

RTC CKT.

page 17

Power OK CKT.

page 38

B

Parellel
Port

page 31

Serial
Port

page 36

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Touch Pad
CONN.

2005/04/21 2006/09/01

C

page 33

Compal Secret Data

Deciphered Date

Int. KBD

page 33

BIOS

page 34

Title

Size Do cum e nt Number R e v

Custom

D

Dat e : Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2891
401376

期二 五月

Docki n g CONN.

*RJ-11 / 45(LED*2)
*COMPOSITE Video Out
*TVOUT
*LINE IN / OUT
*PS/2
*Print port
*1394
*USB
*DC JACK

E

page 37

of

249¬P , 24, 2005

A

A

B

C

D

E

Voltage Rails

Power Plane Description

1 1

2 2

VIN
B+
+CPU_CORE
+1.05VS
+DDRVTT
+1.5VALW 1.5V always on power rail
+1.5VS
+1.8VS (No Use) 1.8V switched power rail
+DDRVCC
+2.5VS
+3VALW
+3V
+3VS
+5VALW
+5VS
+5VCD
+5VMOD
+12VALW 12V always on power rail
+RTC VCC RTC power

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

Adapte r power supply (15V)
AC or battery power rail for power circuit.
Core voltage for CPU

1.05V switched power rail

0.9V switched power rail for DDR II terminator

1.5V switched power rail

1.8V p o we r r a i l f or DDR II

2.5V switched power rail

3.3V always on power rail

3.3V power rail

3.3V switched power rail
5V always on power rail
5V switched power rail
5V switched power rail for Direct CD
5V switched power rail for Module Bay

S1 S3 S5

N/A N/A N/A

N/AN/AN/A
ON OFF
ON OFF
ON OFF O FF
ON
ON OFF O FF
ON OFF O FF
ON
ON
ON
ON
ON
ON

ON ONON

OFF

OFF

ON*ON

OFF

ON

OFF

OFF
ON ON*

OFF

ON
OFF

OFF

ON

ON*

OFF

OFFON

OFF OFFON
OFF OFFON
ONON ON*

External PCI Devices

Device IDSEL# REQ# / G NT # Interrupts

CardBus
1394
SD
Mini-PCI

AD20
AD20 2
AD20
AD18

2

2
1

PIRQ A/PI RQB
PIRQ A/PI RQB
PIRQ A/PI RQB
PIRQG/PIRQH

STATE
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)

Board ID / SKU I D Ta ble for A D c hanne l

Vcc 3.3V +/- 5%

Ra/Rc/Re

Board ID

0
1
2
3
4
5
6
7

BOARD ID Table

Board ID

SIGNAL

100K +/- 5%
Rb / Rd / Rf V min

8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%

100K +/- 5%
200K +/- 5%

0
1
2
3
4
5
6

3 3

EC SM Bus1 address

Device

Smart Battery
EEPROM( 24C16/ 02)

(24C04)

Address Address

1010 000X b
1011 000Xb

EC SM Bus2 address

Device

ADM1032
Codec
Docking

1001 110X b0001 011X b
1001 011X b
1010 000X b

SKU ID Table

SKU_ID_CHECK_0

SKU_ID_CHECK_0

7

SLP_S1# SLP_S3#

HIGH
LOW
LOW
LOW
LOW

0

NC

PCB Revision

0.1

0.2

0.3

1.0

1.A

SKU_ID_CHECK_1

SLP_S4# SLP_S5# +VALW +V +VS Clock
HIGH
HIGH
LOW
LOW
LOW

AD_BID

0.216 V

0.436 V

0.712 V

1.036 V

HIGH
HIGH
HIGH
LOW
LOW LOW

0 V

HIGH
HIGH
HIGH
HIGH

V

ON
ON
ON
ON
ON

typ max

AD_BID

0 V 0 V

0.250 V 0.289 V

0.503 V

0.819 V

1.185 V 1.264 V

ON
ON
ON
OFF
OFF

V

AD_BID

0.538 V

0.875 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

2.200 V

3.300 V

2.341 V

3.300 V

BOM St ruc ture Table

BOM Structure

PM@

GM@/GML@

WD@ & WOD@

SWDJ@
4510@
5IN1@

1000@ & 10@

WLAN@

IMIC@
LPT@ & LPT1@
PS@ & WOPS@

BT@

FIR@

45@

3-Buttons1-Button

Parallel Port on docking or on MB

6

915PM(NO USE)
915GM / 910GML
W or WO Docking
SWDJ(NO USE)

Cardbus Only

5 in 1 & Cardbus

Giga or 10/100 LAN

Wireless LAN

Internal Microphone

W or WO Power Sticker

57

7-Buttons

ON
ON
OFF
OFF
OFF

Function

Bluetooth

FIR

45 Level

ON
LOW
OFF
OFF
OFF

0

ICH6M SM Bus address

Device

4 4

Clock G e ne rator
( ICS 954226)

DDR DIMM 0
DDR DIMM 2

A

Address

1101 001Xb

1001 000Xb
1001 010Xb

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/04/21 2006/09/01

C

2
3
4
5
6

Compal Secret Data

Deciphered Date

1

20C

3 2(No USE)

D

12

Title

Size Do cum e nt Number R e v

Custom

Dat e : Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2891
401376

期二 五月

349¬P , 24, 2005

E

of

A

5

4

3

2

1

JP7A

H_A#3
H_A#4

H_A#[3..31]6

D D

H_REQ#[0..4]6

C C

H_RS#[0..2]6

B B

A A

H_A#[3..31]

H_REQ#[0..4]

H_RS#[0..2]

H_ADSTB#06
H_ADSTB#16

CLK_CPU_BCLK13

CLK_CPU_BCLK#13

H_ADS#6
H_BNR#6

H_BPRI#6

H_BR0#6

H_DEFER#6

H_DRDY#6

H_HIT#6
H_HITM#6

H_LOCK#6

H_CPURST#6

H_TRDY#6

H_DBSY#6
H_DPSLP#17
H_DPRSTP#17
H_DPWR#6

H_PWRGOOD17

H_CPUSLP#6,17

H_THERMTRIP#6,17

H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_IERR#
H_CPURST#

H_RS#0
H_RS#1
H_RS#2

ITP_DBRRESET#

PRO_CHOT#
H_PWRGOOD

H_CPUSLP#
ITP_TCK
ITP_TDI
ITP_TDO
TEST1
TEST2
ITP_TMS
ITP_TRST#

THERMDA
THERMDC

P4

A3#

U4

A4#

V3

A5#

R3

A6#

V2

A7#

W1

A8#

T4

A9#

W2

A10#

Y4

A11#

Y1

A12#

U1

A13#

AA3

A14#

Y3

A15#

AA2

A16#

AF4

A17#

AC4

A18#

AC7

A19#

AC3

A20#

AD3

A21#

AE4

A22#

AD2

A23#

AB4

A24#

AC6

ADDR GROUP

A25#

AD5

A26#

AE2

A27#

AD6

A28#

AF3

A29#

AE1

A30#

AF1

A31#

R2

REQ0#

P3

REQ1#

T2

REQ2#

P1

REQ3#

T1

REQ4#

U3

ADSTB0#

AE5

ADSTB1#

A16

ITP_CLK0

A15

ITP_CLK1

B15

BCLK0

B14

BCLK1

N2

ADS#

L1

BNR#

J3

BPRI#

N4

BR0#

L4

DEFER#

H2

DRDY#

K3

HIT#

K4

HITM#

A4

IERR#

J2

LOCK#

B11

RESET#

H1

RS0#

K1

RS1#

L2

RS2#

M3

TRDY#

C8

BPM0#

B8

BPM1#

A9

BPM2#

C9

BPM3#

A7

DBR#

M2

DBSY#

B7

DPSLP#

G1

DPRSTP#

C19

DPWR#

A10

PRDY#

B10

PREQ#

B17

PROCHOT#

E4

PWRGOOD

A6

SLP#

A13

TCK

C12

TDI

A12

TDO

C5

TEST1

F23

TEST2

C11

TMS

B13

TRST#

B18

THERMDA

A18

THERMDC

C17

THERMTRIP#

TYCO_1612365-1_Dothan

Dothan

DATA GROUP

HOST CLK

CONTROL GROUP

MISC

THERMAL
DIODE

LEGACY CPU

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#

D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DINV0#
DINV1#
DINV2#
DINV3#

DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#

A20M#

FERR#

IGNNE#

INIT#

LINT0
LINT1

STPCLK#

SMI#

A19
A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26

D25
J26
T24
AD20

C23
K24
W25
AE24
C22
L24
W24
AE25

C2
D3
A3
B5
D1
D4

C6
B4

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_DINV#0 6
H_DINV#1 6
H_DINV#2 6
H_DINV#3 6

H_DSTBN#0 6
H_DSTBN#1 6
H_DSTBN#2 6
H_DSTBN#3 6
H_DSTBP#0 6
H_DSTBP#1 6
H_DSTBP#2 6
H_DSTBP#3 6

H_A20M# 17
H_FERR# 17
H_IGNNE# 17
H_INIT# 17
H_INTR 17
H_NMI 17

H_STPCLK# 17
H_SMI# 17

Security Classification

2005/04/21 2006/09/01

3

THERMDA & THERMDC Trace / Space = 10 / 10 mil

5

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

H_D#[0..63]

2200P_0402_50V7K

EC_SMB_CK228,32,37
EC_SMB_DA228,32,37

Compal Secret Data

Deciphered Date

H_D#[0..63] 6

C17

1

2

ITP_TDI
ITP_TDO
H_CPURST#
ITP_TMS
PRO_CHOT#
H_PWRGOOD
H_IERR#

ITP_DBRRESET#

ITP_TRST#

ITP_TCK
TEST1
TEST2

THERMDA
THERMDC

H_PWRGOOD
H_FERR#
H_CPUSLP#
H_INTR
H_STPCLK#
H_INIT#
H_SMI#
H_IGNNE#
H_NMI
H_A20M#

2
3
8
7

R508 150_0402_5%
R29 54.9_0402_1%@
R28 54.9_0402_1%@
R27 40.2_0402_1%
R31 56_0402_5%
R24 200_0402_5%
R23 56_0402_5%

R26 150_0402_5%

R509 680_0402_5%
R30 27.4_0402_1%
R25 1K_0402_5%@
R46 1K_0402_5%@

C764 180P_0402_50V8J@
C765 180P_0402_50V8J@
C766 180P_0402_50V8J@
C767 180P_0402_50V8J@
C768 180P_0402_50V8J@
C769 180P_0402_50V8J@
C770 180P_0402_50V8J@
C771 180P_0402_50V8J@
C772 180P_0402_50V8J@
C773 180P_0402_50V8J@

Close t o C P U side

2

+3VS

1

C12

0.1U_0402_16V4Z

2

U3

D+
D­SCLK
SDATA

ADM1032ARM_RM8

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

Title

Size Do cum e nt Number R e v

Custom

Dat e : Sheet

1

VDD1

6

ALERT#

4

THERM#

5

GND

12
12
12
12
12
12
12

12

12
12
12
12

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2891
401376

期二 五月

+1.05VS

+3VS

12

R20

10K_0402_5%@

of

449¬P , 24, 2005

1

A

5

JP7B

1

2

+1.05VS

C26

VCCSENSE
VSSSENSE

GTL_REF0

COMP0
COMP1
COMP2
COMP3

AE7

VCCSENSE

AF6

VSSSENSE

F26

VCCA0

B1

VCCA1

N1

VCCA2

AC26

VCCA3

P23

VCCQ0

W4

VCCQ1

D10

VCCP

D12

VCCP

D14

VCCP

D16

VCCP

E11

VCCP

E13

VCCP

E15

VCCP

F10

VCCP

F12

VCCP

F14

VCCP

F16

VCCP

K6

VCCP

L5

VCCP

L21

VCCP

M6

VCCP

M22

VCCP

N5

VCCP

N21

VCCP

P6

VCCP

P22

VCCP

R5

VCCP

R21

VCCP

T6

VCCP

T22

VCCP

U21

VCCP

D6

VCC

D8

VCC

D18

VCC

D20

VCC

D22

VCC

E5

VCC

E7

VCC

E9

VCC

E17

VCC

E19

VCC

E21

VCC

F6

VCC

F8

VCC

F18

VCC

E1

PSI#

E2

VID0

F2

VID1

F3

VID2

G3

VID3

G4

VID4

H4

VID5

AD26

GTLREF

C16

BSEL0

C14

BSEL1

P25

COMP0

P26

COMP1

AB2

COMP2

AB1

COMP3

B2

RSVD

C3

RSVD

E26

RSVD

AF7

RSVD

AC1

RSVD

TYCO_1612365-1_Dothan

COMP0
COMP1
COMP2
COMP3

Dothan

R85 54.9_0402_1%@

1 2

R84 54.9_0402_1%@

1 2

+VCCA

D D

1.5V FOR DOTHAN-B

1 2

+1.5VS

R56 0_1206_5%

1

C25

2

0.01U_0402_16V7K

C C

+1.05VS

R75
1K_0402_1%

B B

A A

1 2

R78 2K_0402_1%

10U_0805_6.3V6M

+CPU_CORE

PSI#47
CPU_VID047

CPU_VID147
CPU_VID247

12

CPU_VID347
CPU_VID447
CPU_VID547

CPU_BSEL013
CPU_BSEL113

R69 27.4_0402_1%

1 2

R70 54.9_0402_1%

1 2

R83 27.4_0402_1%

1 2

R82 54.9_0402_1%

1 2

TRACE CLOSELY CPU < 0.5'

COMP0, COMP2 layout : Width 18mils and Space 25mils
COMP1, COMP3 layout : Space 25mils

5

4

A2

VSS

A5

VSS

A8

VSS

A11

VSS

A14

VSS

A17

VSS

A20

VSS

A23

VSS

A26

VSS

B3

VSS

B6

VSS

B9

VSS

B12

VSS

B16

VSS

B19

VSS

B22

VSS

B25

VSS

C1

VSS

C4

VSS

C7

VSS

C10

VSS

C13

VSS

C15

VSS

C18

VSS

C21

VSS

C24

VSS

D2

VSS

D5

VSS

D7

VSS

D9

VSS

D11

VSS

D13

VSS

D15

VSS

D17

VSS

D19

VSS

D21

VSS

D23

VSS

D26

VSS

E3

VSS

E6

VSS

E8

VSS

E10

VSS

E12

VSS

E14

VSS

E16

VSS

E18

VSS

E20

VSS

E22

VSS

POWER, GROUNG, RESERVED SIGNALS AND NC

E25

VSS

F1

VSS

F4

VSS

F5

VSS

F7

VSS

F9

VSS

F11

VSS

F13

VSS

F15

VSS

F17

VSS

F19

VSS

F21

VSS

F24

VSS

G2

VSS

G6

VSS

G22

VSS

G23

VSS

G26

VSS

H3

VSS

H5

VSS

H21

VSS

H25

VSS

J1

VSS

J4

VSS

J6

VSS

J22

VSS

J24

VSS

K2

VSS

K5

VSS

K21

VSS

K23

VSS

K26

VSS

L3

VSS

L6

VSS

L22

VSS

L25

VSS

M1

VSS

4

3

+CPU_CORE

330U_D_2VM

+

10U_0805_6.3V6M

1

2

10U_0805_6.3V6M

1

C42

2

10U_0805_6.3V6M

1

C455

2

10U_0805_6.3V6M

1

C70

2

10U_0805_6.3V6M

1

C510

2

0.1U_0402_16V4Z

1

C16

2

1

+

C472

2

220U_D2_4VM_R12@

C46

C45

10U_0805_6.3V6M

C40

10U_0805_6.3V6M

C64

10U_0805_6.3V6M

C429

10U_0805_6.3V6M

C511

10U_0805_6.3V6M

C,uF ESR, mohm ESL,nH

2X330uF 7m ohm/2 3.5nH/2
35X10uF 5m ohm/35 0.6nH/35

C458

+1.05VS

1

+

2

150U_D2_6.3VM

220U_D2_4VM_R12@

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

Vcc-core
Decoupling
SPCAP,Polymer

MLCC 0805 X5R

0.1U_0402_16V4Z

1

C435

C445

2

1

C441

2

+CPU_CORE

1

C47

2

+CPU_CORE

1

C33

2

+CPU_CORE

1

C454

2

+CPU_CORE

1

C69

2

+CPU_CORE

1

C509

2

1

2

0.1U_0402_16V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/04/21 2006/09/01

3

330U_D_2VM

1

+

C427

2

10U_0805_6.3V6M

1

1

C48

2

2

10U_0805_6.3V6M

1

1

C41

2

2

10U_0805_6.3V6M

1

1

C65

2

2

10U_0805_6.3V6M

1

1

C470

2

2

10U_0805_6.3V6M

1

1

C512

2

2

0.1U_0402_16V4Z

1

1

C13

2

2

0.1U_0402_16V4Z

Compal Secret Data

1

+

C460

2

10U_0805_6.3V6M

1

C30

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C39

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C66

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C430

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C513

2

10U_0805_6.3V6M

0.1U_0402_16V4Z

1

C15

C14

2

0.1U_0402_16V4Z

Deciphered Date

1

C31

2

10U_0805_6.3V6M

1

C444

2

10U_0805_6.3V6M

1

C67

2

10U_0805_6.3V6M

1

C471

2

10U_0805_6.3V6M

1

C514

2

10U_0805_6.3V6M

1

2

1

C32

2

1

C443

2

1

C68

2

1

C516

2

1

C515

2

1

C461

2

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1

C453

2

2

1

C448

2

0.1U_0402_16V4Z

+CPU_CORE

C442

1

JP7C

F20

VCC

F22

VCC

G5

VCC

G21

VCC

H6

VCC

H22

VCC

J5

VCC

J21

VCC

K22

VCC

U5

VCC

V6

VCC

V22

VCC

W5

VCC

W21

VCC

Y6

VCC

Y22
AA5
AA7

AA9
AA11
AA13
AA15
AA17
AA19
AA21

AB6

AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22

AC9
AC11
AC13
AC15
AC17
AC19

AD8
AD10
AD12
AD14
AD16
AD18

AE9
AE11
AE13
AE15
AE17
AE19

AF8

AF10
AF12
AF14
AF16
AF18

M4

M5
M21
M24

N3

N6
N22
N23
N26

P2

P5
P21
P24

R1

R4

R6
R22
R25

T3

T5
T21
T23

TYCO_1612365-1_Dothan

Title

Size Do cum e nt Number R e v

Custom

Dat e : Sheet

Dothan

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

POWER, GROUND

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2891
401376

期二 五月

T26

VSS

U2

VSS

U6

VSS

U22

VSS

U24

VSS

V1

VSS

V4

VSS

V5

VSS

V21

VSS

V25

VSS

W3

VSS

W6

VSS

W22

VSS

W23

VSS

W26

VSS

Y2

VSS

Y5

VSS

Y21

VSS

Y24

VSS

AA1

VSS

AA4

VSS

AA6

VSS

AA8

VSS

AA10

VSS

AA12

VSS

AA14

VSS

AA16

VSS

AA18

VSS

AA20

VSS

AA22

VSS

AA25

VSS

AB3

VSS

AB5

VSS

AB7

VSS

AB9

VSS

AB11

VSS

AB13

VSS

AB15

VSS

AB17

VSS

AB19

VSS

AB21

VSS

AB23

VSS

AB26

VSS

AC2

VSS

AC5

VSS

AC8

VSS

AC10

VSS

AC12

VSS

AC14

VSS

AC16

VSS

AC18

VSS

AC21

VSS

AC24

VSS

AD1

VSS

AD4

VSS

AD7

VSS

AD9

VSS

AD11

VSS

AD13

VSS

AD15

VSS

AD17

VSS

AD19

VSS

AD22

VSS

AD25

VSS

AE3

VSS

AE6

VSS

AE8

VSS

AE10

VSS

AE12

VSS

AE14

VSS

AE16

VSS

AE18

VSS

AE20

VSS

AE23

VSS

AE26

VSS

AF2

VSS

AF5

VSS

AF9

VSS

AF11

VSS

AF13

VSS

AF15

VSS

AF17

VSS

AF19

VSS

AF21

VSS

AF24

VSS

of

549¬P , 24, 2005

1

A

5

H_RS#[0..2]

H_A#[3..31]4
H_REQ#[0..4]4

D D

C C

CLK_MCH_BCLK#13
CLK_MCH_BCLK13

B B

H_A#[3..31]

H_ADSTB#04
H_ADSTB#14

H_DSTBN#04
H_DSTBN#14
H_DSTBN#24
H_DSTBN#34
H_DSTBP#04
H_DSTBP#14
H_DSTBP#24
H_DSTBP#34
H_DINV#04
H_DINV#14
H_DINV#24
H_DINV#34

H_CPURST#4

H_ADS#4
H_TRDY#4

H_DPWR#4

H_DRDY#4
H_DEFER#4

H_HITM#4
H_HIT#4
H_LOCK#4
H_BR0#4
H_BNR#4
H_BPRI#4
H_DBSY#4

Un-pop for Dothan-A

R54 0_0402_5%

H_CPUSLP#4,17

A A

(5mil:15mil) (12mil:10mil)

H_VREF

1

C436

0.1U_0402_16V4Z

2

1 2

12

R388
100_0603_1%

12

R387
200_0603_1%

5

H_RS#[0..2] 4

U5A

H_A#3

G9

HA3#

A10

B10
E10
G10

E11
G11

G13
C10
C11
D11
C12
B13
A12

G12
E12
C13
B11
D13
A13

A11

E13
AB1

AB2

H10

C9
E9
B7

F9
D8

D9

F10

F12

F13

A7
D7
B8
C7
A8
B9

G4

K1
R3
V3

G5

K2
R2

W4

H8
K3
T7
U5

F8
B5

G6

F7
E6
F6
D6
D4
B3
E7
A5
D5
C6

G8

A4
C5
B4

Alviso

HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#

HPCREQ#
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HADSTB#0
HADSTB#1

HCLKN
HCLKP

HDSTBN#0
HDSTBN#1
HDSTBN#2
HDSTBN#3
HDSTBP#0
HDSTBP#1
HDSTBP#2
HDSTBP#3
HDINV#0
HDINV#1
HDINV#2
HDINV#3

HCPURST#
HADS#

HTRDY#
HDPWR#
HDRDY#
HDEFER#
HEDRDY#
HHITM#
HHIT#
HLOCK#
HBREQ0#
HBNR#
HBPRI#
HDBSY#
HCPUSLP#
HRS0#
HRS1#
HRS2#

CPU_SLP#

1

C423

0.1U_0402_16V4Z

2

H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

CPU_SLP#
H_RS#0
H_RS#1
H_RS#2

H_XSWING H_YSWING

HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#

HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#

HOST

HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

HVREF
HXRCOMP
HXSCOMP
HYRCOMP
HYSCOMP

HXSWING
HYSWING

ALVISO_BGA1257

GM@

+1.05VS +1.05VS+1.05VS

12

12

R406
221_0603_1%

R405
100_0603_1%

4

H_D#[0..63]H_REQ#[0..4]

H_D#0

E4

H_D#1

E1

H_D#2

F4

H_D#3

H7

H_D#4

E2

H_D#5

F1

H_D#6

E3

H_D#7

D3

H_D#8

K7

H_D#9

F2

H_D#10

J7

H_D#11

J8

H_D#12

H6

H_D#13

F3

H_D#14

K8

H_D#15

H5

H_D#16

H1

H_D#17

H2

H_D#18

K5

H_D#19

K6

H_D#20

J4

H_D#21

G3

H_D#22

H3

H_D#23

J1

H_D#24

L5

H_D#25

K4

H_D#26

J5

H_D#27

P7

H_D#28

L7

H_D#29

J3

H_D#30

P5

H_D#31

L3

H_D#32

U7

H_D#33

V6

H_D#34

R6

H_D#35

R5

H_D#36

P3

H_D#37

T8

H_D#38

R7

H_D#39

R8

H_D#40

U8

H_D#41

R4

H_D#42

T4

H_D#43

T5

H_D#44

R1

H_D#45

T3

H_D#46

V8

H_D#47

U6

H_D#48

W6

H_D#49

U3

H_D#50

V5

H_D#51

W8

H_D#52

W7

H_D#53

U2

H_D#54

U1

H_D#55

Y5

H_D#56

Y2

H_D#57

V4

H_D#58

Y7

H_D#59

W1

H_D#60

W3

H_D#61

Y3

H_D#62

Y6

H_D#63

W2

H_VREF

J11

H_XRCOMP

C1
C2
T1
L1
D1
P1

H_XRCOMP & H_YRCOMP
Trace / Space = 10 / 20 mil

0.1U_0402_16V4Z

4

R50 24.9_0402_1%

H_XSCOMP

R47 54.9_0402_1%

H_YRCOMP

R72 24.9_0402_1%

H_YSCOMP

R68 54.9_0402_1%
H_XSWING
H_YSWING

C459

1

2

1 2
1 2

100_0603_1%

+DDRVCC

12
12

12

R420
221_0603_1%

(12mil:10mil)

12

R419

3

H_D#[0..63] 4

U5B

DMI_ITX_MRX_N018
DMI_ITX_MRX_N118
DMI_ITX_MRX_N218
DMI_ITX_MRX_N318

DMI_ITX_MRX_P018
DMI_ITX_MRX_P118
DMI_ITX_MRX_P218
DMI_ITX_MRX_P318

DMI_MTX_IRX_N018
DMI_MTX_IRX_N118
DMI_MTX_IRX_N218
DMI_MTX_IRX_N318

DMI_MTX_IRX_P018
DMI_MTX_IRX_P118
DMI_MTX_IRX_P218
DMI_MTX_IRX_P318

DDRA_CLK011
DDRA_CLK111

DDRB_CLK012
DDRB_CLK112

DDRA_CLK0#11
DDRA_CLK1#11

DDRB_CLK0#12
DDRB_CLK1#12

DDRA_CKE011
DDRA_CKE111
DDRB_CKE012
DDRB_CKE112

DDRA_SCS#011
DDRA_SCS#111
DDRB_SCS#012
DDRB_SCS#112

R426 40.2_0402_1%

1 2

R427 40.2_0402_1%

1 2

DDRA_ODT011
DDRA_ODT111
DDRB_ODT012
DDRB_ODT112

R429 80.6_0402_1%

1 2

R430 80.6_0402_1%

1 2

+1.05VS

(10mil:20mil)

+DDRVCC

R635

1K_0402_1%

R636

1K_0402_1%

12

12

DMI_ITX_MRX_N0
DMI_ITX_MRX_N1
DMI_ITX_MRX_N2
DMI_ITX_MRX_N3

DMI_ITX_MRX_P0
DMI_ITX_MRX_P1
DMI_ITX_MRX_P2
DMI_ITX_MRX_P3

DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3

DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3

DDRA_CKE0
DDRA_CKE1
DDRB_CKE0
DDRB_CKE1

DDRA_SCS#0
DDRA_SCS#1
DDRB_SCS#0
DDRB_SCS#1

M_OCDCOMP0
M_OCDCOMP1

M_RCOMPN
M_RCOMPP
SMVREF0
SMVREF1
M_XSLEW

M_YSELW

+DDRVCC

R423

1K_0402_1%

R421

1K_0402_1%

0.1U_0402_16V4Z

1

C757

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/04/21 2006/09/01

3

AA31

DMIRXN0

AB35

DMIRXN1

AC31

DMIRXN2

AD35

DMIRXN3

Y31

DMIRXP0

AA35

DMIRXP1

AB31

DMIRXP2

AC35

DMIRXP3

AA33

DMITXN0

AB37

DMITXN1

AC33

DMITXN2

AD37

DMITXN3

Y33

DMITXP0

AA37

DMITXP1

AB33

DMITXP2

AC37

DMITXP3

AM33

SM_CK0

AL1

SM_CK1

AE11

SM_CK2

AJ34

SM_CK3

AF6

SM_CK4

AC10

SM_CK5

AN33

SM_CK0#

AK1

SM_CK1#

AE10

SM_CK2#

AJ33

SM_CK3#

AF5

SM_CK4#

AD10

SM_CK5#

AP21

SM_CKE0

AM21

SM_CKE1

AH21

SM_CKE2

AK21

SM_CKE3

AN16

SM_CS0#

AM14

SM_CS1#

AH15

SM_CS2#

AG16

SM_CS3#

AF22

SM_OCDCOMP0

AF16

SM_OCDCOMP1

AP14

SM_ODT0

AL15

SM_ODT1

AM11

SM_ODT2

AN10

SM_ODT3

AK10

SMRCOMPN

AK11

SMRCOMPP

AF37

SMVREF0

AD1

SMVREF1

AE27

SMXSLEWIN

AE28

SMXSLEWOUT

AF9

SMYSLEWIN

AF10

SMYSLEWOUT

12

ALVISO_BGA1257
GM@

0.1U_0402_16V4Z

12

1

C488

2

SMVREF1

15mils

1

C758

0.1U_0402_16V4Z

2

Compal Secret Data

Deciphered Date

DMIDDR MUXING

SMVREF0

1

15mils

C489

0.1U_0402_16V4Z

2

2

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8

CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

RSVD21
RSVD22

CFG/RSVD

RSVD23
RSVD24
RSVD25
RSVD26
RSVD27

BM_BUSY#

EXT_TS0#
EXT_TS1#

THRMTRIP#

PWROK

RSTIN#

PM

DREF_CLKN
DREF_CLKP

DREF_SSCLKP

CLK

DREF_SSCLKN

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9

NC10

NC

NC11

2

G16
H13
G14
F16
F15
G15
E16
D17
J16
D15
E15
D14
E14
H12
C14
H15
J15
H14
G22
G23
D23
G25
G24
J17
A31
A30
D26
D25

J23
J21
H22
F5
AD30
AE29

A24
A23
D37
C37

AP37
AN37
AP36
AP2
AP1
AN1
B1
A2
B37
A36
A37

1

CLK_DREF_SSC
CLK_DREF_SSC#

CFG0
MCH_CLKSEL1
MCH_CLKSEL0

CFG5
CFG6
CFG7

CFG9

CFG12
CFG13

CFG16 CFG6
CFG18

CFG19

R51 0_0402_5%PM@

1 2

R52 0_0402_5%PM@

1 2

MCH_CLKSEL1 13
MCH_CLKSEL0 13

CFG0

R40 10K_0402_5%

CFG5

R413 1K_0402_5%@

R407 1K_0402_5%

CFG7

R408 1K_0402_5%@

CFG9

R404 1K_0402_5%@

CFG12

R409 1K_0402_5%@

CFG13

R412 1K_0402_5%@

CFG16

R417 1K_0402_5%@

1 2

1 2

1 2
1 2
1 2
1 2
1 2
1 2

CFG[17:3]: internal pu ll-u p

CFG18

R41 1K_0402_5%@

CFG19

CFG[19:1 8 ] : i n t e rnal pull -down

EXT_TS#0
EXT_TS#1
H_THERMTRIP#

CLK_DREF_96M#
CLK_DREF_96M
CLK_DREF_SSC
CLK_DREF_SSC#

PM_BMBUSY# 18

H_THERMTRIP# 4,17

VGATE 13,18,47
PLT_RST# 15,16,18,20,22,25,31,32

CLK_DREF_96M# 13
CLK_DREF_96M 13
CLK_DREF_SSC 13
CLK_DREF_SSC# 13

EXT_TS#0
EXT_TS#1

CFG[2:0]
CFG5
CFG6
CFG7

CFG9

CFG[13:12]

CFG16
(FSB Dynamic
ODT)

CFG18
(VCC Se lect)

CFG19
(VTT Se l e c t )

Title

Size Do cum e nt Number R e v

Custom

Dat e : Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2891
401376

期二 五月

1 2

R42 1K_0402_5%@

1 2

R416 10K_0402_5%

1 2

R411 10K_0402_5%

1 2

Refer to sheet 6 for FSB
frequency select
Low = DMI x 2

High = DMI x 4
Low = DDR-II

High = DDR-I
Low = DT/Tr a n s p ortable CPU

High = Mobile CPU
Low = Reverse Lane

High = N o rmal Operation
00 = Reserved

01 = XOR Mode Enabled
10 = Al l Z Mode Enabled
11 = Normal Operation (Default)

Low = Disabled
High = Enabled

Low = 1.05V (Default)
High = 1.5V

Low = 1.05V (Default)
High = 1.2V

*
*

*

*

1

+1.5VS

*

*

649¬P , 24, 2005

+1.05VS

+2.5VS

+2.5VS

*

*

A

of

5

4

3

2

1

DDRA_SDQ[0..63]11

DDRA_SDM[0..7]11

DDRA_SDQS[0..7]11

D D

C C

B B

DDRA_SMA[0..13]11 DDRB_SMA[0..13]12

DDRA_SBS0#11
DDRA_SBS1#11
DDRA_SBS2#11 DDRB_SBS2#12

DDRA_SDQS0#11
DDRA_SDQS1#11
DDRA_SDQS2#11
DDRA_SDQS3#11
DDRA_SDQS4#11
DDRA_SDQS5#11
DDRA_SDQS6#11
DDRA_SDQS7#11

DDRA_SCAS#11
DDRA_SRAS#11

DDRA_SWE#11 DDRB_SWE#12

DDRA_SDQ[0..63]
DDRA_SDM[0..7]
DDRA_SDQS[0..7]
DDRA_SMA[0..13] DDRB_SMA[0..13]

DDRA_SDM0
DDRA_SDM1
DDRA_SDM2
DDRA_SDM3
DDRA_SDM4
DDRA_SDM5
DDRA_SDM6
DDRA_SDM7

DDRA_SDQS0
DDRA_SDQS1
DDRA_SDQS2
DDRA_SDQS3
DDRA_SDQS4
DDRA_SDQS5
DDRA_SDQS6
DDRA_SDQS7

DDRA_SDQS0#
DDRA_SDQS1#
DDRA_SDQS2#
DDRA_SDQS3#
DDRA_SDQS4#
DDRA_SDQS5#
DDRA_SDQS6#
DDRA_SDQS7#

DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12

AK15
AK16

AL21
AJ37

AP35

AL29

AP24

AP9
AP4

AJ2

AD3

AK36
AP33
AN29
AP23

AM8
AM4

AJ1

AE5

AK35
AP34
AN30
AN23

AN8
AM5
AH1

AE4

AL17
AP17
AP18
AM17
AN18
AM18

AL19
AP20
AM19

AL20
AM16
AN20
AM20
AM15

AN15
AP16

AF29

AF28
AP15

SA_BS0#
SA_BS1#
SA_BS2#

SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7

SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13

SA_CAS#
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#

ALVISO_BGA1257
GM@

U5C

SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8

SADQ9
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43

DDR MEMORY SYSTEM A

SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63

AG35
AH35
AL35
AL37
AH36
AJ35
AK37
AL34
AM36
AN35
AP32
AM31
AM34
AM35
AL32
AM32
AN31
AP31
AN28
AP28
AL30
AM30
AM28
AL28
AP27
AM27
AM23
AM22
AL23
AM24
AN22
AP22
AM9
AL9
AL6
AP7
AP11
AP10
AL7
AM7
AN5
AN6
AN3
AP3
AP6
AM6
AL4
AM3
AK2
AK3
AG2
AG1
AL3
AM2
AH3
AG3
AF3
AE3
AD6
AC4
AF2
AF1
AD4
AD5

DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44DDRA_SMA13
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63

DDRB_SDQ[0..63]12
DDRB_SDM[0..7]12

DDRB_SBS0#12
DDRB_SBS1#12

DDRB_SDQS012
DDRB_SDQS112
DDRB_SDQS212
DDRB_SDQS312
DDRB_SDQS412
DDRB_SDQS512
DDRB_SDQS612
DDRB_SDQS712

DDRB_SDQS0#12
DDRB_SDQS1#12
DDRB_SDQS2#12
DDRB_SDQS3#12
DDRB_SDQS4#12
DDRB_SDQS5#12
DDRB_SDQS6#12
DDRB_SDQS7#12

DDRB_SCAS#12
DDRB_SRAS#12

DDRB_SDQ[0..63]
DDRB_SDM[0..7]

DDRB_SDM0
DDRB_SDM1
DDRB_SDM2
DDRB_SDM3
DDRB_SDM4
DDRB_SDM5
DDRB_SDM6
DDRB_SDM7

DDRB_SDQS0
DDRB_SDQS1
DDRB_SDQS2
DDRB_SDQS3
DDRB_SDQS4
DDRB_SDQS5
DDRB_SDQS6
DDRB_SDQS7

DDRB_SDQS0#
DDRB_SDQS1#
DDRB_SDQS2#
DDRB_SDQS3#
DDRB_SDQS4#
DDRB_SDQS5#
DDRB_SDQS6#
DDRB_SDQS7#

DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12
DDRB_SMA13

AJ15
AG17
AG21

AF32
AK34
AK27
AK24

AJ10

AK5
AE7
AB7

AF34
AK32

AJ28
AK23
AM10

AH6
AF8
AB4

AF35
AK33
AK28

AJ23

AL10

AH7
AF7
AB5

AH17
AK17
AH18

AJ18
AK18

AJ19
AK19
AH19

AJ20
AH20

AJ16
AG18
AG20
AG15

AH14
AK14

AF15

AF14
AH16

SB_BS0#
SB_BS1#
SB_BS2#

SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7

SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7

SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13

SB_CAS#
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#

U5D

SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8

SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37
SBDQ38
SBDQ39
SBDQ40
SBDQ41
SBDQ42

DDR SYSTEM MEMORY B

SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63

ALVISO_BGA1257

GM@

AE31
AE32
AG32
AG36
AE34
AE33
AF31
AF30
AH33
AH32
AK31
AG30
AG34
AG33
AH31
AJ31
AK30
AJ30
AH29
AH28
AK29
AH30
AH27
AG28
AF24
AG23
AJ22
AK22
AH24
AH23
AG22
AJ21
AG10
AG9
AG8
AH8
AH11
AH10
AJ9
AK9
AJ7
AK6
AJ4
AH5
AK8
AJ8
AJ5
AK4
AG5
AG4
AD8
AD9
AH4
AG6
AE8
AD7
AC5
AB8
AB6
AA8
AC8
AC7
AA4
AA5

DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQ62
DDRB_SDQ63

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/04/21 2006/09/01

3

Compal Secret Data

Deciphered Date

Title

Size Do cum e nt Number R e v

Custom

2

Dat e : Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2891

401376

期二 五月

1

A

of

749¬P , 24, 2005

5

+3VS +2.5VS

12

R402

2.2K_0402_5%GM@

D D

C C

+2.5VS

B B

GM@

4.7K_0402_5%

LDDC_CLK

A A

GMCH_ENBKL15,32

GMCH_TV_LUMA14
GMCH_TV_CRMA14

R381 4.7K_0402_5%

1 2

R382 4.7K_0402_5%

1 2

R400 2.2K_0402_5%

1 2

R39 2.2K_0402_5%

1 2

R398 100K_0402_5%

1 2

R403 1.5K_0402_1%

1 2

R44 75_0402_1%

1 2

R515 150_0402_5%

1 2

R516 150_0402_5%

1 2

+2.5VS

R45

BSS138_SOT23 GM@

G

2

1 2

S

Q6

+2.5VS

GMCH_LCD_CLK

13

D

1 3

GMCH_CRT_CLK14
GMCH_CRT_DATA14
GMCH_CRT_B14

GMCH_CRT_G14
GMCH_CRT_R14

GMCH_CRT_VSYNC14
GMCH_CRT_HSYNC14

GMCH_CRT_CLK
GMCH_CRT_DATA
LCTLB_DATA
LCTLA_CLK

2

G

LBKLT_EN

D

S

Q44

BSS138_SOT23GM@

GMCH_TV_LUMA
GMCH_TV_CRMA

LBKLT_EN
LIBG
GMCH_TV_COMPS
GMCH_TV_LUMA
GMCH_TV_CRMA

+3VS

R49

1 2

+3VS

R418 4.99K_0402_1%

GMCH_CRT_CLK
GMCH_CRT_DATA

R384 150_0402_5%
R385 150_0402_5%
R386 150_0402_5%

4.7K_0402_5%GM@

GMCH_LCD_CLK 15

GMCH_TV_COMPS

+2.5VS

CLK_MCH_3GPLL#13
CLK_MCH_3GPLL13

12

4

R38 3K_0402_1%@

1 2

R383 3K_0402_1%@

1 2

TV_REFSET

R399 0_0402_5%

12

12
12
12

1 2

R414 255_0402_1%

GMCH_ENVDD15

GMCH_TXCLK-15
GMCH_TXCLK+15
GMCH_TZCLK-15
GMCH_TZCLK+15

GMCH_TXOUT0-15
GMCH_TXOUT1-15
GMCH_TXOUT2-15

GMCH_TXOUT0+15
GMCH_TXOUT1+15
GMCH_TXOUT2+15

GMCH_TZOUT0-15
GMCH_TZOUT1-15
GMCH_TZOUT2-15

GMCH_TZOUT0+15
GMCH_TZOUT1+15
GMCH_TZOUT2+15

REFSET

LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
GMCH_ENVDD
LIBG

GMCH_TXCLK­GMCH_TXCLK+
GMCH_TZCLK­GMCH_TZCLK+

GMCH_TXOUT0­GMCH_TXOUT1­GMCH_TXOUT2-

GMCH_TXOUT0+
GMCH_TXOUT1+
GMCH_TXOUT2+

GMCH_TZOUT0­GMCH_TZOUT1­GMCH_TZOUT2-

GMCH_TZOUT0+
GMCH_TZOUT1+
GMCH_TZOUT2+

U5G

H24

H25
AB29
AC29

A15

C16

A17

J18
B15
B16
B17

E24
E23
E21
D21
C20
B20
A19
B19
H21
G21

J20

E25

F25
C23
C22

F23

F22

F26
C33
C31

F28

F27
B30

B29
C25
C24

B34
B33
B32

A34
A33
B31

C29
D28
C27

C28
D27
C26

ALVISO_BGA1257
GM@

SDVOCTRL_DATA
SDVOCTRL_CLK
GCLKN
GCLKP

TVDAC_A
TVDAC_B
TVDAC_C
TV_REFSET
TV_IRTNA
TV_IRTNB
TV_IRTNC

DDCCLK
DDCDATA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
VSYNC
HSYNC
REFSET

LBKLT_CTL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL

LACLKN
LACLKP
LBCLKN
LBCLKP

LADATAN0
LADATAN1
LADATAN2

LADATAP0
LADATAP1
LADATAP2

LBDATAN0
LBDATAN1
LBDATAN2

LBDATAP0
LBDATAP1
LBDATAP2

3

EXP_RXN0/SDVO_TVCLKIN#

MISCTVVGALVDS

EXP_RXN1/SDVO_INT#

EXP_RXN2/SDVO_FLDSTALL#

EXP_RXP0/SDVO_TVCLKIN

EXP_RXP1/SDVO_INT

EXP_RXP2/SDVO_FLDSTALL

EXP_TXN0/SDVOB_RED#

EXP_TXN1/SDVOB_GREEN#

EXP_TXN2/SDVOB_BLUE#

EXP_TXN3/SDVOB_CLKN
EXP_TXN4/SDVOC_RED#

EXP_TXN5/SDVOC_GREEN#

EXP_TXN6/SDVOC_BLUE#

EXP_TXN7/SDVOC_CLKN

PCI - EXPRESS GRAPHICS

EXP_TXP0/SDVOB_RED

EXP_TXP1/SDVOB_GREEN

EXP_TXP2/SDVOB_BLUE
EXP_TXP3/SDVOB_CLKP

EXP_TXP4/SDVOC_RED

EXP_TXP5/SDVOC_GREEN

EXP_TXP6/SDVOC_BLUE
EXP_TXP7/SDVOC_CLKP

EXP_COMPI

EXP_ICOMPO

EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8

EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15

EXP_RXP3

EXP_RXP4

EXP_RXP5

EXP_RXP6

EXP_RXP7

EXP_RXP8

EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15

EXP_TXN8

EXP_TXN9

EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15

EXP_TXP8

EXP_TXP9
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15

2

PCIE_MTX_C_GRX_N[0..15]15

PCIE_MTX_C_GRX_P[0..15]15
PCEI_GTX_C_MRX_N[0..15]15
PCEI_GTX_C_MRX_P[0..15]15

PEG_COMP

D36
D34

PCEI_GTX_C_MRX_N0

E30

PCEI_GTX_C_MRX_N1

F34

PCEI_GTX_C_MRX_N2

G30

PCEI_GTX_C_MRX_N3

H34

PCEI_GTX_C_MRX_N4

J30

PCEI_GTX_C_MRX_N5

K34

PCEI_GTX_C_MRX_N6

L30

PCEI_GTX_C_MRX_N7

M34

PCEI_GTX_C_MRX_N8

N30

PCEI_GTX_C_MRX_N9

P34

PCEI_GTX_C_MRX_N10

R30

PCEI_GTX_C_MRX_N11

T34

PCEI_GTX_C_MRX_N12

U30

PCEI_GTX_C_MRX_N13

V34

PCEI_GTX_C_MRX_N14

W30

PCEI_GTX_C_MRX_N15

Y34

PCEI_GTX_C_MRX_P0

D30

PCEI_GTX_C_MRX_P1

E34

PCEI_GTX_C_MRX_P2

F30

PCEI_GTX_C_MRX_P3

G34

PCEI_GTX_C_MRX_P4

H30

PCEI_GTX_C_MRX_P5

J34

PCEI_GTX_C_MRX_P6

K30

PCEI_GTX_C_MRX_P7

L34

PCEI_GTX_C_MRX_P8

M30

PCEI_GTX_C_MRX_P9

N34

PCEI_GTX_C_MRX_P10

P30

PCEI_GTX_C_MRX_P11

R34

PCEI_GTX_C_MRX_P12

T30

PCEI_GTX_C_MRX_P13

U34

PCEI_GTX_C_MRX_P14

V30

PCEI_GTX_C_MRX_P15

W34

PCIE_MTX_GRX_N0

E32

PCIE_MTX_GRX_N1

F36

PCIE_MTX_GRX_N2

G32

PCIE_MTX_GRX_N3

H36

PCIE_MTX_GRX_N4 PCIE_MTX_C_GRX_N4

J32

PCIE_MTX_GRX_N5

K36

PCIE_MTX_GRX_N6

L32

PCIE_MTX_GRX_N7

M36

PCIE_MTX_GRX_N8

N32

PCIE_MTX_GRX_N9

P36

PCIE_MTX_GRX_N10

R32

PCIE_MTX_GRX_N11

T36

PCIE_MTX_GRX_N12

U32

PCIE_MTX_GRX_N13

V36

PCIE_MTX_GRX_N14

W32

PCIE_MTX_GRX_N15

Y36

PCIE_MTX_GRX_P0

D32

PCIE_MTX_GRX_P1

E36

PCIE_MTX_GRX_P2

F32

PCIE_MTX_GRX_P3

G36

PCIE_MTX_GRX_P4

H32

PCIE_MTX_GRX_P5

J36

PCIE_MTX_GRX_P6

K32

PCIE_MTX_GRX_P7

L36

PCIE_MTX_GRX_P8

M32

PCIE_MTX_GRX_P9

N36

PCIE_MTX_GRX_P10

P32

PCIE_MTX_GRX_P11

R36

PCIE_MTX_GRX_P12

T32

PCIE_MTX_GRX_P13

U36

PCIE_MTX_GRX_P14

V32

PCIE_MTX_GRX_P15

W36

1 2

R48 24.9_0402_1%

C59 0.1U_0402_16V4ZPM@

1 2

C71 0.1U_0402_16V4ZPM@

1 2

C76 0.1U_0402_16V4ZPM@

1 2

C80 0.1U_0402_16V4ZPM@

1 2

C91 0.1U_0402_16V4ZPM@

1 2

C100 0.1U_0402_16V4ZPM@

1 2

C109 0.1U_0402_16V4ZPM@

1 2

C116 0.1U_0402_16V4ZPM@

1 2

C58 0.1U_0402_16V4ZPM@

1 2

C63 0.1U_0402_16V4ZPM@

1 2

C75 0.1U_0402_16V4ZPM@

1 2

C79 0.1U_0402_16V4ZPM@

1 2

C89 0.1U_0402_16V4ZPM@

1 2

C98 0.1U_0402_16V4ZPM@

1 2

C105 0.1U_0402_16V4ZPM@

1 2

C115 0.1U_0402_16V4ZPM@

1 2

PCIE_MTX_C_GRX_N[0..15]

PCIE_MTX_C_GRX_P[0..15]
PCEI_GTX_C_MRX_N[0..15]
PCEI_GTX_C_MRX_P[0..15]

+1.5VS

C57 0.1U_0402_16V4ZPM@

1 2

C62 0.1U_0402_16V4ZPM@

1 2

C74 0.1U_0402_16V4ZPM@

1 2

C78 0.1U_0402_16V4ZPM@

1 2

C87 0.1U_0402_16V4ZPM@

1 2

C97 0.1U_0402_16V4ZPM@

1 2

C104 0.1U_0402_16V4ZPM@

1 2

C114 0.1U_0402_16V4ZPM@

1 2

C56 0.1U_0402_16V4ZPM@

1 2

C60 0.1U_0402_16V4ZPM@

1 2

C73 0.1U_0402_16V4ZPM@

1 2

C77 0.1U_0402_16V4ZPM@

1 2

C83 0.1U_0402_16V4ZPM@

1 2

C92 0.1U_0402_16V4ZPM@

1 2

C101 0.1U_0402_16V4ZPM@

1 2

C110 0.1U_0402_16V4ZPM@

1 2

1

PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_N2

PCIE_MTX_C_GRX_N3

PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_N15

PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_P15

GM@

R397

4.7K_0402_5%

LDDC_DATA

R401

G

2

1 2

S

Q43 BSS138_SOT23GM@

5

GMCH_LCD_DATA

13

D

4.7K_0402_5%GM@

1 2

GMCH_LCD_DATA 15

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/04/21 2006/09/01

3

Compal Secret Data

Deciphered Date

2

Title

Size Do cum e nt Number R e v

B

Dat e : Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2891

401376

期二 五月

849¬P , 24, 2005

1

of

A

5

4

3

2

1

U5E

+1.05VS

D D

C C

+1.5VS

+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
+1.5VS_MPLL

B B

+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
+1.5VS_MPLL

T29

VCC0

R29

VCC1

N29

VCC2

M29

VCC3

K29

VCC4

J29

VCC5

V28

VCC6

U28

VCC7

T28

VCC8

R28

VCC9

P28

VCC10

N28

VCC11

M28

VCC12

L28

VCC13

K28

VCC14

J28

VCC15

H28

VCC16

G28

VCC17

V27

VCC18

U27

VCC19

T27

VCC20

R27

VCC21

P27

VCC22

N27

VCC23

M27

VCC24

L27

VCC25

K27

VCC26

J27

VCC27

H27

VCC28

K26

VCC29

H26

VCC30

K25

VCC31

J25

VCC32

K24

VCC33

K23

VCC34

K22

VCC35

K21

VCC36

W20

VCC37

U20

VCC38

T20

VCC39

K20

VCC40

V19

VCC41

U19

VCC42

K19

VCC43

W18

VCC44

V18

VCC45

T18

VCC46

K18

VCC47

K17

VCC48

AC1

VCCD_HMPLL1

AC2

VCCD_HMPLL2

B23

VCCA_DPLLA

C35

VCCA_DPLLB

AA1

VCCA_HPLL

AA2

VCCA_MPLL

ALVISO_BGA1257
GM@

POWER

VCCA_CRTDAC0
VCCA_CRTDAC1

VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1

VCCA_TVBG
VSSA_TVBG

VCCD_TVDAC

VCCDQ_TVDAC

VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2

VCCA_LVDS

VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2

VCCA_SM0
VCCA_SM1
VCCA_SM2
VCCA_SM3

VCCA_3GPLL0
VCCA_3GPLL1
VCCA_3GPLL2

VCCA_3GBG

VSSA_3GBG

VCC_SYNC

VSSA_CRTDAC

VCCHV0
VCCHV1
VCCHV2

VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6

F17
E17
D18
C18
F18
E18

H18
G18

D19
H17

B26
B25
A25

A35
B22

B21
A21

B28
A28
A27

AF20
AP19
AF19
AF18

AE37
W37
U37
R37
N37
L37
J37

Y29
Y28
Y27

F37
G37

H20
F19

E19
G19

0.15mA

120mA

24mA

60mA

10mA
2mA

60mA

1000mA

70mA

+3VS_DAC

+1.5VS

+2.5VS

+1.5VS_DDRDLL

+1.5VS_PEG

0.47U_0603_16V4Z

+1.5VS_3GPLL

+2.5VS_3GBG

+2.5VS

0.47U_0603_16V4Z

+1.05VS

C23

1

2

1

C24

2

C49

0.22U_0402_10V4Z

0.22U_0402_10V4Z

1

2

C34

U5F

K13

VTT0

J13

VTT1

K12

VTT2

W11

VTT3

V11

VTT4

U11

VTT5

T11

VTT6

R11

VTT7

P11
N11
M11
L11
K11

W10

V10
U10
T10
R10
P10
N10
M10
K10

J10
W9

M9

M8
M7
M6

M5
M4
M3
M2

M1
G1

1

2

VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22

Y9

VTT23
VTT24

U9

VTT25

R9

VTT26

P9

VTT27

N9

VTT28
VTT29

L9

VTT30

J9

VTT31

N8

VTT32
VTT33

N7

VTT34
VTT35

N6

VTT36
VTT37

A6

VTT38

N5

VTT39
VTT40

N4

VTT41
VTT42

N3

VTT43
VTT44

N2

VTT45
VTT46

B2

VTT47

V1

VTT48

N1

VTT49
VTT50
VTT51

ALVISO_BGA1257
GM@

POWER

VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8

VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37
VCCSM38
VCCSM39
VCCSM40
VCCSM41
VCCSM42
VCCSM43
VCCSM44
VCCSM45
VCCSM46
VCCSM47
VCCSM48
VCCSM49
VCCSM50
VCCSM51
VCCSM52
VCCSM53
VCCSM54
VCCSM55
VCCSM56
VCCSM57
VCCSM58
VCCSM59
VCCSM60
VCCSM61
VCCSM62
VCCSM63
VCCSM64

AM37
AH37
AP29
AD28
AD27
AC27
AP26
AN26
AM26
AL26
AK26
AJ26
AH26
AG26
AF26
AE26
AP25
AN25
AM25
AL25
AK25
AJ25
AH25
AG25
AF25
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AE17
AE16
AE15
AE14
AP13
AN13
AM13
AL13
AK13
AJ13
AH13
AG13
AF13
AE13
AP12
AN12
AM12
AL12
AK12
AJ12
AH12
AG12
AF12
AE12
AD11
AC11
AB11
AB10
AB9

V1.8_DDR_CAP6

AP8

V1.8_DDR_CAP4

AM1

V1.8_DDR_CAP3

AE1

V1.8_DDR_CAP1
V1.8_DDR_CAP2
V1.8_DDR_CAP5

C519

0.1U_0402_16V4Z

+DDRVCC

+DDRVCC

C88

330U_D2E_2.5VM

VCCA_LVDS (Ball A35)

VCC_SYNC(Ball H20)

C82

0.1U_0402_16V4Z

12

0.1U_0402_16V4Z

12

2200mA

0.1U_0402_16V4Z

1

+

C494

2

+2.5VS

1

C417

2

0.1U_0402_16V4Z

+2.5VS

1

C22

2

4.7U_0805_10V4Z

C517

0.1U_0402_16V4Z

12

C490

C505

0.1U_0402_16V4Z

12

C520

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

4.7U_0805_10V4Z

12

12

C487

1

C419

2

0.01U_0402_16V7K

1

C434

2

0.1U_0402_16V4Z

Check when PVT

+1.05VS

C450

22U_1206_16V4Z_V1

0.1U_0402_16V4Z

C86

1

2

1

2

VCCHV(Ball A21,B21,B22)

1

2

VCCA_CRTDAC(Ball F19,E19)

1

2

+1.5VS

1

C20

C415

2

0.1U_0402_16V4Z

+1.05VS

Remove o r 0805

+1.5VS

1

C462

2

2.2U_0603_6.3V6K

+3VS

CHB1608U301_0603

1

+

C689
GM@

2

150U_D2_6.3VM

+1.5VS_DPLLA

+1.5VS_HPLL

A A

60mA

1

C412

2

22U_1206_16V4Z_V1

60mA

1

C50

2

22U_1206_16V4Z_V1

L6
CHB1608U301_0603

1 2

Change to 0 ohm

1

C418

2

0.1U_0402_16V4Z

L7
CHB1608U301_0603

1 2

Change to 0 ohm Change to 0 ohm

1

C478

2

0.1U_0402_16V4Z

+1.5VS_DPLLB

+1.5VS

+1.5VS_MPLL

+1.5VS

60mA

1

C426

2

22U_1206_16V4Z_V1

60mA

1

C52

2

22U_1206_16V4Z_V1

L25
CHB1608U301_0603

1 2

Change to 0 ohm

1

C420

2

0.1U_0402_16V4Z

L8
CHB1608U301_0603

1 2

1

C482

2

0.1U_0402_16V4Z

+1.5VS_DDRDLL

+1.5VS

+1.5VS_3GPLL

+1.5VS

1

C84

2

22U_1206_16V4Z_V1

1

C55
10U_1206_16V4Z

2

R86
0_0603_5%

1 2

1

C496

2

0.1U_0402_16V4Z

R79

0.5_0603_1%
+3GPLL

1 2

1

C475

2

0.1U_0402_16V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+1.5VS_PEG

+1.5VS

1

2

L9
CHB1608U301_0603

1 2

Change to 0 ohm

3

R415
0_0603_5%

1 2

1

C446

22U_1206_16V4Z_V1

+1.5VS

2005/04/21 2006/09/01

C449

2

4.7U_0805_10V4Z

+2.5VS_3GBG

1 2

R410 0_0603_5%

1

C428

0.1U_0402_16V4Z

2

Compal Secret Data

1

2

Deciphered Date

C439

4.7U_0805_10V4Z

+2.5VS

1

+

2

2

C53

470U_D2_2.5VM

4000mA

2.2U_0603_6.3V6K

1

2

0.1U_0402_16V4Z

C413

4.7U_0805_10V4Z

C498

1

C457

2

0.1U_0402_16V4Z

1

2

1

C456

2

2.2U_0603_6.3V6K

1

C81

2

0.1U_0402_16V4Z

1

C416

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C451

2

0.1U_0402_16V4Z

1

C481

2

1

C21

2

4.7U_0805_10V4Z

0.1U_0402_16V4Z

C483

1

C447

2

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C452

2

1

C486

2

1

C414

2

0.1U_0402_16V4Z

VCCTX_LVDS(Ball A27,A28,B28)

1

C424

0.1U_0402_16V4Z

C431

2

0.022U_0402_16V7K

VCCD_TVDAC (Ball D19)

1

2

0.1U_0402_16V4Z

1

C421

2

1

C425

2

0.022U_0402_16V7K

0.1U_0402_16V4Z

1

C440

2

1

C437

2

0.022U_0402_16V7K

VCCDQ_TVDAC (Ball H17)VCCD_LVDS(Ball A25,B25,B26)

950mA

L35

1 2

1

C463

2

2.2U_0603_6.3V6K

VCCA_TVDAC VCCA_TVBG

+3VS_DAC

1

2

0.1U_0402_16V4Z

1

C474

2

2.2U_0603_6.3V6K

0.022U_0402_16V7K

1

C432

C422

2

0.1U_0402_16V4Z

1

2

(Ball H18)

0.022U_0402_16V7K

1

1

C433

2

2

C469

2.2U_0603_6.3V6K

C438

120mA

Title

Size Do cum e nt Number R e v

Custom

Dat e : Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2891

401376

期二 五月

949¬P , 24, 2005

1

of

A

5

4

3

2

1

U5H

+1.05VS

D D

C C

B B

+1.05VS

A A

L12

VTT_NCTF17

M12

VTT_NCTF16

N12

VTT_NCTF15

P12

VTT_NCTF14

R12

VTT_NCTF13

T12

VTT_NCTF12

U12

VTT_NCTF11

V12

VTT_NCTF10

W12

VTT_NCTF9

L13

VTT_NCTF8

M13

VTT_NCTF7

N13

VTT_NCTF6

P13

VTT_NCTF5

R13

VTT_NCTF4

T13

VTT_NCTF3

U13

VTT_NCTF2

V13

VTT_NCTF1

W13

VTT_NCTF0

Y12

VSS_NCTF68

AA12

VSS_NCTF67

Y13

VSS_NCTF66

AA13

VSS_NCTF65

L14

VSS_NCTF64

M14

VSS_NCTF63

N14

VSS_NCTF62

P14

VSS_NCTF61

R14

VSS_NCTF60

T14

VSS_NCTF59

U14

VSS_NCTF58

V14

VSS_NCTF57

W14

VSS_NCTF56

Y14

VSS_NCTF55

AA14

VSS_NCTF54

AB14

VSS_NCTF53

L15

VSS_NCTF52

M15

VSS_NCTF51

N15

VSS_NCTF50

P15

VSS_NCTF49

R15

VSS_NCTF48

T15

VSS_NCTF47

U15

VSS_NCTF46

V15

VSS_NCTF45

W15

VSS_NCTF44

Y15

VSS_NCTF43

AA15

VSS_NCTF42

AB15

VSS_NCTF41

L16

VSS_NCTF40

M16

VSS_NCTF39

N16

VSS_NCTF38

P16

VSS_NCTF37

R16

VSS_NCTF36

T16

VSS_NCTF35

U16

VSS_NCTF34

V16

VSS_NCTF33

W16

VSS_NCTF32

Y16

VSS_NCTF31

AA16

VSS_NCTF30

AB16

VSS_NCTF29

R17

VSS_NCTF28

Y17

VSS_NCTF27

AA17

VSS_NCTF26

AB17

VSS_NCTF25

AA18

VSS_NCTF24

AB18

VSS_NCTF23

AA19

VSS_NCTF22

AB19

VSS_NCTF21

AA20

VSS_NCTF20

AB20

VSS_NCTF19

R21

VSS_NCTF18

Y21

VSS_NCTF17

AA21

VSS_NCTF16

AB21

VSS_NCTF15

Y22

VSS_NCTF14

AA22

VSS_NCTF13

AB22

VSS_NCTF12

Y23

VSS_NCTF11

AA23

VSS_NCTF10

AB23

VSS_NCTF9

Y24

VSS_NCTF8

AA24

VSS_NCTF7

AB24

VSS_NCTF6

Y25

VSS_NCTF5

AA25

VSS_NCTF4

AB25

VSS_NCTF3

Y26

VSS_NCTF2

AA26

VSS_NCTF1

AB26

VSS_NCTF0

V25

VCC_NCTF10

W25

VCC_NCTF9

L26

VCC_NCTF8

M26

VCC_NCTF7

N26

VCC_NCTF6

P26

VCC_NCTF5

R26

VCC_NCTF4

T26

VCC_NCTF3

U26

VCC_NCTF2

V26

VCC_NCTF1

W26

VCC_NCTF0

ALVISO_BGA1257
GM@

5

VCCSM_NCTF31
VCCSM_NCTF30
VCCSM_NCTF29
VCCSM_NCTF28
VCCSM_NCTF27
VCCSM_NCTF26
VCCSM_NCTF25
VCCSM_NCTF24
VCCSM_NCTF23
VCCSM_NCTF22
VCCSM_NCTF21
VCCSM_NCTF20
VCCSM_NCTF19
VCCSM_NCTF18
VCCSM_NCTF17
VCCSM_NCTF16
VCCSM_NCTF15
VCCSM_NCTF14
VCCSM_NCTF13
VCCSM_NCTF12
VCCSM_NCTF11
VCCSM_NCTF10

VCCSM_NCTF9
VCCSM_NCTF8
VCCSM_NCTF7
VCCSM_NCTF6
VCCSM_NCTF5
VCCSM_NCTF4
VCCSM_NCTF3
VCCSM_NCTF2
VCCSM_NCTF1
VCCSM_NCTF0

VCC_NCTF78
VCC_NCTF77
VCC_NCTF76
VCC_NCTF75
VCC_NCTF74
VCC_NCTF73
VCC_NCTF72
VCC_NCTF71
VCC_NCTF70

NCTF

VCC_NCTF69
VCC_NCTF68
VCC_NCTF67
VCC_NCTF66
VCC_NCTF65
VCC_NCTF64
VCC_NCTF63
VCC_NCTF62
VCC_NCTF61
VCC_NCTF60
VCC_NCTF59
VCC_NCTF58
VCC_NCTF57
VCC_NCTF56
VCC_NCTF55
VCC_NCTF54
VCC_NCTF53
VCC_NCTF52
VCC_NCTF51
VCC_NCTF50
VCC_NCTF49
VCC_NCTF48
VCC_NCTF47
VCC_NCTF46
VCC_NCTF45
VCC_NCTF44
VCC_NCTF43
VCC_NCTF42
VCC_NCTF41
VCC_NCTF40
VCC_NCTF39
VCC_NCTF38
VCC_NCTF37
VCC_NCTF36
VCC_NCTF35
VCC_NCTF34
VCC_NCTF33
VCC_NCTF32
VCC_NCTF31
VCC_NCTF30
VCC_NCTF29
VCC_NCTF28
VCC_NCTF27
VCC_NCTF26
VCC_NCTF25
VCC_NCTF24
VCC_NCTF23
VCC_NCTF22
VCC_NCTF21
VCC_NCTF20
VCC_NCTF19
VCC_NCTF18
VCC_NCTF17
VCC_NCTF16
VCC_NCTF15
VCC_NCTF14
VCC_NCTF13
VCC_NCTF12
VCC_NCTF11

AB12
AC12
AD12
AB13
AC13
AD13
AC14
AD14
AC15
AD15
AC16
AD16
AC17
AD17
AC18
AD18
AC19
AD19
AC20
AD20
AC21
AD21
AC22
AD22
AC23
AD23
AC24
AD24
AC25
AD25
AC26
AD26

L17
M17
N17
P17
T17
U17
V17
W17
L18
M18
N18
P18
R18
Y18
L19
M19
N19
P19
R19
Y19
L20
M20
N20
P20
R20
Y20
L21
M21
N21
P21
T21
U21
V21
W21
L22
M22
N22
P22
R22
T22
U22
V22
W22
L23
M23
N23
P23
R23
T23
U23
V23
W23
L24
M24
N24
P24
R24
T24
U24
V24
W24
L25
M25
N25
P25
R25
T25
U25

+DDRVCC

+1.05VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

U5I

Y1
D2

G2

J2
L2
P2
T2
V2

AD2
AE2
AH2

AL2

AN2

A3
C3

AA3
AB3
AC3

AJ3

C4
H4
L4
P4
U4
Y4

AF4
AN4

E5

W5

AL5

AP5

B6

J6
L6
P6
T6

AA6
AC6
AE6

AJ6

G7

V7

AA7
AG7
AK7
AN7

C8
E8
L8
P8
Y8

AL8

A9
H9
K9
T9
V9

AA9
AC9
AE9
AH9
AN9
D10

L10
Y10

AA10

F11

H11

Y11

ALVISO_BGA1257
GM@

VSS271
VSS270
VSS269
VSS268
VSS260
VSS259
VSS258
VSS257
VSS256
VSS255
VSS254
VSS253
VSS252
VSS251
VSS250
VSS249
VSS248
VSS247
VSS246
VSS245
VSS244
VSS243
VSS242
VSS241
VSS240
VSS239
VSS238
VSS237
VSS236
VSS235
VSS234
VSS233
VSS232
VSS231
VSS230
VSS229
VSS228
VSS227
VSS226
VSS225
VSS224
VSS223
VSS222
VSS221
VSS220
VSS219
VSS218
VSS217
VSS216
VSS215
VSS214
VSS213
VSS212
VSS211
VSS210
VSS209
VSS208
VSS207
VSS206
VSS205
VSS204
VSS203
VSS202
VSS201
VSS200
VSS199
VSS198
VSS197
VSS196

VSS

2005/04/21 2006/09/01

3

Compal Secret Data

VSSALVDS

VSS195
VSS194
VSS193
VSS192
VSS191
VSS190
VSS189
VSS188
VSS187
VSS186
VSS185
VSS184
VSS183
VSS182
VSS181
VSS180
VSS179
VSS178
VSS177
VSS176
VSS175
VSS174
VSS173
VSS172
VSS171
VSS170
VSS169
VSS168
VSS167
VSS166
VSS165
VSS164
VSS163
VSS162
VSS161
VSS160
VSS159
VSS158
VSS157
VSS156
VSS155
VSS154
VSS153
VSS152
VSS151
VSS150
VSS149
VSS148
VSS147
VSS146
VSS145
VSS144
VSS143
VSS142
VSS141
VSS140
VSS139
VSS138
VSS137
VSS136
VSS135
VSS134
VSS133
VSS132
VSS131
VSS130

Deciphered Date

B36
AA11

AF11
AG11
AJ11
AL11
AN11
B12
D12
J12
A14
B14
F14
J14
K14
AG14
AJ14
AL14
AN14
C15
K15
A16
D16
H16
K16
AL16
C17
G17
AF17
AJ17
AN17
A18
B18
U18
AL18
C19
H19
J19
T19
W19
AG19
AN19
A20
D20
E20
F20
G20
V20
AK20
C21
F21
AF21
AN21
A22
D22
E22
J22
AH22
AL22
H23
AF23
B24
D24
F24
J24
AG24
AJ24

U5J

AL24

VSS267

AN24

VSS266

A26

VSS265

E26

VSS264

G26

VSS263

J26

VSS262

B27

VSS261

E27

VSS129

G27

VSS128

W27

VSS127

AA27

VSS126

AB27

VSS125

AF27

VSS124

AG27

VSS123

AJ27

VSS122

AL27

VSS121

AN27

VSS120

E28

VSS119

W28

VSS118

AA28

VSS117

AB28

VSS116

AC28

VSS115

A29

VSS114

D29

VSS113

E29

VSS112

F29

VSS111

G29

VSS110

H29

VSS109

L29

VSS108

P29

VSS107

U29

VSS106

V29

VSS105

W29

VSS104

AA29

VSS103

AD29

VSS102

AG29

VSS101

AJ29

VSS100

AM29

VSS99

C30

VSS98

Y30

VSS97

AA30

VSS96

AB30

VSS95

AC30

VSS94

AE30

VSS93

AP30

VSS92

D31

VSS91

E31

VSS90

F31

VSS89

G31

VSS88

H31

VSS87

J31

VSS86

K31

VSS85

L31

VSS84

M31

VSS83

N31

VSS82

P31

VSS81

R31

VSS80

T31

VSS79

U31

VSS78

V31

VSS77

W31

VSS76

AD31

VSS75

AG31

VSS74

AL31

VSS73

A32

VSS72

C32

VSS71

Y32

VSS70

AA32

VSS69

AB32

VSS68

ALVISO_BGA1257
GM@

2

VSS

Title

Size Do cum e nt Number R e v

Custom

Dat e : Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2891

401376

期二 五月

VSS67
VSS66
VSS65
VSS64
VSS63
VSS62
VSS61
VSS60
VSS59
VSS58
VSS57
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10

VSS9
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
VSS0

1

AC32
AD32
AJ32
AN32
D33
E33
F33
G33
H33
J33
K33
L33
M33
N33
P33
R33
T33
U33
V33
W33
AD33
AF33
AL33
C34
AA34
AB34
AC34
AD34
AH34
AN34
B35
D35
E35
F35
G35
H35
J35
K35
L35
M35
N35
P35
R35
T35
U35
V35
W35
Y35
AE35
C36
AA36
AB36
AC36
AD36
AE36
AF36
AJ36
AL36
AN36
E37
H37
K37
M37
P37
T37
V37
Y37
AG37

A

of

10 49¬P , 24, 2005

5

+DIMM_VREF

DDRA_SDQ0
DDRA_SDQ1

DDRA_SDQS0#7
DDRA_SDQS07

D D

DDRA_SDQS1#7
DDRA_SDQS17

DDRA_SDQS2#7
DDRA_SDQS27

C C

DDRA_CKE06

DDRA_SBS2#7

DDRA_SBS0#7
DDRA_SWE#7

DDRA_SCAS#7
DDRA_SCS#16

DDRA_ODT16

DDRA_SDQS4#7

B B

A A

DDRA_SDQS47

DDRA_SDQS6#7
DDRA_SDQS67

D_CK_SDATA12,13
D_CK_SCLK12,13

DDRA_SDQS0#
DDRA_SDQS0

DDRA_SDQ2
DDRA_SDQ3

DDRA_SDQ8
DDRA_SDQ9

DDRA_SDQS1#
DDRA_SDQS1

DDRA_SDQ10
DDRA_SDQ11

DDRA_SDQ16
DDRA_SDQ17

DDRA_SDQS2#
DDRA_SDQS2

DDRA_SDQ18
DDRA_SDQ19

DDRA_SDQ24
DDRA_SDQ25

DDRA_SDM3

DDRA_SDQ26
DDRA_SDQ27

DDRA_SBS2#
DDRA_SMA12

DDRA_SMA9
DDRA_SMA8

DDRA_SMA5
DDRA_SMA3
DDRA_SMA1

DDRA_SMA10
DDRA_SBS0#
DDRA_SWE#

DDRA_SCAS#
DDRA_SCS#1

DDRA_ODT1
DDRA_SDQ32

DDRA_SDQ33
DDRA_SDQS4#

DDRA_SDQS4
DDRA_SDQ34

DDRA_SDQ35
DDRA_SDQ40

DDRA_SDQ41
DDRA_SDM5
DDRA_SDQ42

DDRA_SDQ43
DDRA_SDQ48

DDRA_SDQ49

DDRA_SDQS6#
DDRA_SDQS6

DDRA_SDQ50
DDRA_SDQ51

DDRA_SDQ56
DDRA_SDQ57

DDRA_SDM7
DDRA_SDQ58

DDRA_SDQ59
D_CK_SDATA

D_CK_SCLK

+3VS

+DDRVCC +DDRVCC

JP33

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

FOX_ASOA426-M2RN-7F

DIMM0 STD H:52mm (BOT)

5

***

VSS
DQ4
DQ5
VSS

DM0

VSS
DQ6
DQ7

VSS
DQ12
DQ13

VSS

DM1

VSS

CK0
CK0#

VSS
DQ14
DQ15

VSS

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3#

DQS3

VSS
DQ30
DQ31

VSS

NC/CKE1

VDD
NC/A15
NC/A14

VDD

A11

VDD

VDD

BA1

RAS#

S0#

VDD

ODT0

NC/A13

VDD

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5#

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

CK1
CK1#

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7#

DQS7

VSS
DQ62
DQ63

VSS

SA0

SA1

4

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50

NC

52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106
108
110
112
114
116
118
120

NC

122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDRA_SDQ4
DDRA_SDQ5

DDRA_SDM0
DDRA_SDQ6

DDRA_SDQ7
DDRA_SDQ12

DDRA_SDQ13
DDRA_SDM1

DDRA_SDQ14
DDRA_SDQ15

DDRA_SDQ20
DDRA_SDQ21

DDRA_SDM2
DDRA_SDQ22

DDRA_SDQ23
DDRA_SDQ28

DDRA_SDQ29
DDRA_SDQS3#

DDRA_SDQS3
DDRA_SDQ30

DDRA_SDQ31
DDRA_CKE1DDRA_CKE0

DDRA_SMA11
DDRA_SMA7
DDRA_SMA6

DDRA_SMA4
DDRA_SMA2
DDRA_SMA0

DDRA_SBS1#
DDRA_SRAS#
DDRA_SCS#0

DDRA_ODT0
DDRA_SMA13

DDRA_SDQ36
DDRA_SDQ37

DDRA_SDM4
DDRA_SDQ38

DDRA_SDQ39
DDRA_SDQ44

DDRA_SDQ45
DDRA_SDQS5#

DDRA_SDQS5
DDRA_SDQ46

DDRA_SDQ47
DDRA_SDQ52

DDRA_SDQ53

DDRA_SDM6
DDRA_SDQ54

DDRA_SDQ55
DDRA_SDQ60

DDRA_SDQ61
DDRA_SDQS7#

DDRA_SDQS7
DDRA_SDQ62

DDRA_SDQ63

1 2

R630 10K_0402_5%

1 2

R631 10K_0402_5%

DDRA_CLK0 6
DDRA_CLK0# 6

DDRA_SDQS3# 7
DDRA_SDQS3 7

DDRA_CKE1 6

DDRA_SBS1# 7
DDRA_SRAS# 7
DDRA_SCS#0 6

DDRA_ODT0 6

DDRA_SDQS5# 7
DDRA_SDQS5 7

DDRA_CLK1 6
DDRA_CLK1# 6

DDRA_SDQS7# 7
DDRA_SDQS7 7

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+DDRVCC

+DIMM_VREF

C694

0.1U_0402_16V4Z

DDRA_SMA[0..13]7

DDRA_SDQ[0..63]7
DDRA_SDM[0..7]7

DDRA_SBS2#
DDRA_CKE0

DDRA_SMA9
DDRA_SMA12

DDRA_SMA5
DDRA_SMA8

DDRA_SMA1
DDRA_SMA3

DDRA_SBS0#
DDRA_SMA10

DDRA_SCS#0
DDRA_SWE#

DDRA_ODT1
DDRA_SRAS#

DDRA_CKE1
DDRA_SMA11

DDRA_SMA7
DDRA_SMA6

DDRA_SMA4
DDRA_SMA2

DDRA_SMA0
DDRA_SBS1#

DDRA_SCS#1
DDRA_SCAS#

DDRA_ODT0
DDRA_SMA13

2005/04/21 2006/09/01

3

Compal Secret Data

2.2U_0805_16V4Z

C695

DDRA_SMA[0..13]
DDRA_SDQ[0..63]
DDRA_SDM[0..7]

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1

2

1

2

RP94 56_0404_4P2R_5%

RP95 56_0404_4P2R_5%

RP96 56_0404_4P2R_5%

RP97 56_0404_4P2R_5%

RP98 56_0404_4P2R_5%

RP99 56_0404_4P2R_5%

RP100 56_0404_4P2R_5%

RP101 56_0404_4P2R_5%

RP102 56_0404_4P2R_5%

RP103 56_0404_4P2R_5%

RP104 56_0404_4P2R_5%

RP105 56_0404_4P2R_5%

RP106 56_0404_4P2R_5%

Deciphered Date

+DDRVTT

2

12

R628
1K_0402_1%

12

R629
1K_0402_1%

2

1

+DDRVCC

2.2U_0805_16V4Z

1

C699

2

0.1U_0402_16V4Z

1

C704

2

1

C708

2

0.1U_0402_16V4Z

1

C713

2

0.1U_0402_16V4Z

1

2

1

C700

2

1

2

0.1U_0402_16V4Z

1

C709

2

0.1U_0402_16V4Z

1

C714

2

1

2.2U_0805_16V4Z

2

1

2

1

2

C696

2.2U_0805_16V4Z

C701

0.1U_0402_16V4Z

C705

0.1U_0402_16V4Z

C710

0.1U_0402_16V4Z

C715

0.1U_0402_16V4Z

1

2

+DDRVCC

1

2

+DDRVTT

1

2

+DDRVTT

1

2

+DDRVTT

1

2

2.2U_0805_16V4Z

1

C697

2

2.2U_0805_16V4Z

0.1U_0402_16V4Z

1

C702

2

0.1U_0402_16V4Z

1

C706

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C711

2

0.1U_0402_16V4Z

1

C716

2

0.1U_0402_16V4Z

C698

C703

0.1U_0402_16V4Z

C707

C712

C717

0.1U_0402_16V4Z

close to DIMM of corresponding control and command signals

Title

Size Do cum e nt Number R e v

Dat e : Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2891
401376

期二 五月

11 49¬P , 24, 2005

1

of

A

A

JP34

+DIMM_VREF

DDRB_SDQ0
DDRB_SDQ1

DDRB_SDQS0#7
DDRB_SDQS07

1 1

DDRB_SDQS1#7
DDRB_SDQS17

DDRB_SDQS2#7
DDRB_SDQS27

2 2

DDRB_CKE06

DDRB_SBS2#7

DDRB_SBS0#7
DDRB_SWE#7

DDRB_SCAS#7
DDRB_SCS#16

DDRB_ODT16

DDRB_SDQS4#7

3 3

4 4

DDRB_SDQS47

DDRB_SDQS6#7
DDRB_SDQS67

D_CK_SDATA11,13
D_CK_SCLK11,13

DDRB_SDQS0#
DDRB_SDQS0

DDRB_SDQ2
DDRB_SDQ3

DDRB_SDQ8
DDRB_SDQ9

DDRB_SDQS1#
DDRB_SDQS1

DDRB_SDQ10
DDRB_SDQ11

DDRB_SDQ16
DDRB_SDQ17

DDRB_SDQS2#
DDRB_SDQS2

DDRB_SDQ18
DDRB_SDQ19

DDRB_SDQ24
DDRB_SDQ25

DDRB_SDM3

DDRB_SDQ26
DDRB_SDQ27

DDRB_CKE0

DDRB_SBS2#
DDRB_SMA12

DDRB_SMA9
DDRB_SMA8

DDRB_SMA5
DDRB_SMA3
DDRB_SMA1

DDRB_SMA10
DDRB_SBS0#
DDRB_SWE#

DDRB_SCAS#
DDRB_SCS#1

DDRB_ODT1
DDRB_SDQ32

DDRB_SDQ33
DDRB_SDQS4#

DDRB_SDQS4
DDRB_SDQ34

DDRB_SDQ35
DDRB_SDQ40

DDRB_SDQ41
DDRB_SDM5
DDRB_SDQ42

DDRB_SDQ43
DDRB_SDQ48

DDRB_SDQ49

DDRB_SDQS6#
DDRB_SDQS6

DDRB_SDQ50
DDRB_SDQ51

DDRB_SDQ56
DDRB_SDQ57

DDRB_SDM7
DDRB_SDQ58

DDRB_SDQ59
D_CK_SDATA

D_CK_SCLK

+3VS

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

201

GND

TYCO_1565917-4~D

***

DQS3#

DQS3

NC/CKE1

NC/A15
NC/A14

ODT0

NC/A13

DQS5#

DQS5

DQS7#

DQS7

DIMM1 REV H:52mm (BOT)

A

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7

VSS
DQ12
DQ13

VSS

DM1

VSS

CK0
CK0#

VSS
DQ14
DQ15

VSS

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

VSS
DQ30
DQ31

VSS

VDD

VDD

VDD

VDD

BA1
RAS#

VDD

VDD

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

CK1
CK1#

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

VSS
DQ62
DQ63

VSS

SAO

SA1

GND

A11

S0#

B

+DDRVCC+DDRVCC

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50

NC

52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106
108
110
112
114
116
118
120

NC

122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

202

B

DDRB_SDQ4
DDRB_SDQ5

DDRB_SDM0
DDRB_SDQ6

DDRB_SDQ7
DDRB_SDQ12

DDRB_SDQ13
DDRB_SDM1

DDRB_SDQ14
DDRB_SDQ15

DDRB_SDQ20
DDRB_SDQ21

DDRB_SDM2
DDRB_SDQ22

DDRB_SDQ23
DDRB_SDQ28

DDRB_SDQ29
DDRB_SDQS3#

DDRB_SDQS3
DDRB_SDQ30

DDRB_SDQ31
DDRB_CKE1

DDRB_SMA11
DDRB_SMA7
DDRB_SMA6

DDRB_SMA4
DDRB_SMA2
DDRB_SMA0

DDRB_SBS1#
DDRB_SRAS#
DDRB_SCS#0

DDRB_ODT0
DDRB_SMA13

DDRB_SDQ36
DDRB_SDQ37

DDRB_SDM4
DDRB_SDQ38

DDRB_SDQ39
DDRB_SDQ44

DDRB_SDQ45
DDRB_SDQS5#

DDRB_SDQS5
DDRB_SDQ46

DDRB_SDQ47
DDRB_SDQ52

DDRB_SDQ53

DDRB_SDM6
DDRB_SDQ54

DDRB_SDQ55
DDRB_SDQ60

DDRB_SDQ61
DDRB_SDQS7#

DDRB_SDQS7
DDRB_SDQ62

DDRB_SDQ63

1 2

R632 10K_0402_5%

1 2

R633 10K_0402_5%

DDRB_CLK0 6
DDRB_CLK0# 6

DDRB_SDQS3# 7
DDRB_SDQS3 7

DDRB_CKE1 6

DDRB_SBS1# 7
DDRB_SRAS# 7
DDRB_SCS#0 6

DDRB_ODT0 6

DDRB_SDQS5# 7
DDRB_SDQS5 7

DDRB_CLK1 6
DDRB_CLK1# 6

DDRB_SDQS7# 7
DDRB_SDQS7 7

+3VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

+DIMM_VREF

1

C720

2.2U_0805_16V4Z

2

DDRB_SMA[0..13]7

DDRB_SDQ[0..63]7
DDRB_SDM[0..7]7

2005/04/21 2006/09/01

C

1

C721

0.1U_0402_16V4Z

2

DDRB_SMA[0..13]
DDRB_SDQ[0..63]
DDRB_SDM[0..7]

DDRB_SBS2#
DDRB_CKE0

DDRB_SMA9
DDRB_SMA12

DDRB_SMA5
DDRB_SMA8

DDRB_SMA1
DDRB_SMA3

DDRB_SBS0#
DDRB_SMA10

DDRB_SCAS#
DDRB_SWE#

DDRB_ODT1
DDRB_SCS#1

DDRB_CKE1
DDRB_SMA11

DDRB_SMA7
DDRB_SMA6

DDRB_SMA4
DDRB_SMA2

DDRB_SMA0
DDRB_SBS1#

DDRB_SRAS#
DDRB_SCS#0

DDRB_ODT0
DDRB_SMA13

Compal Secret Data

150U_D2_6.3VM

1 4
2 3

RP107 56_0404_4P2R_5%

1 4
2 3

RP108 56_0404_4P2R_5%

1 4
2 3

RP109 56_0404_4P2R_5%

1 4
2 3

RP110 56_0404_4P2R_5%

1 4
2 3

RP111 56_0404_4P2R_5%

1 4
2 3

RP112 56_0404_4P2R_5%

1 4
2 3

RP113 56_0404_4P2R_5%

1 4
2 3

RP114 56_0404_4P2R_5%

1 4
2 3

RP115 56_0404_4P2R_5%

1 4
2 3

RP116 56_0404_4P2R_5%

1 4
2 3

RP117 56_0404_4P2R_5%

1 4
2 3

RP118 56_0404_4P2R_5%

1 4
2 3

RP119 56_0404_4P2R_5%

Deciphered Date

D

+DDRVCC

1

+

C718

2

+DDRVCC

1

C728

2

0.1U_0402_16V4Z

2.2U_0805_16V4Z

+DDRVTT

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

D

E

150U_D2_6.3VM

1

+

C719

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C729

2

0.1U_0402_16V4Z

+DDRVCC

C734

+DDRVCC

C739

C743

C748

C753

C722

C730

1

2

2.2U_0805_16V4Z

1

2

+DDRVTT

1

2

0.1U_0402_16V4Z

+DDRVTT

1

2

0.1U_0402_16V4Z

+DDRVTT

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

1

2

C735

1

C723

2

0.1U_0402_16V4Z

1

C731

2

2.2U_0805_16V4Z

1

C736

2

0.1U_0402_16V4Z

1

C740

C741

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C744

C745

2

0.1U_0402_16V4Z

1

C749

C750

2

0.1U_0402_16V4Z

1

C754

C755

2

C724

0.1U_0402_16V4Z

C732

0.1U_0402_16V4Z

1

2

1

2

1

2

1

2

1

2

0.1U_0402_16V4Z

1

C725

2

0.1U_0402_16V4Z

1

C733

2

2.2U_0805_16V4Z

1

C737

2

2.2U_0805_16V4Z

0.1U_0402_16V4Z

1

C742

2

0.1U_0402_16V4Z

1

C746

2

0.1U_0402_16V4Z

1

C751

2

0.1U_0402_16V4Z

1

C726

2

0.1U_0402_16V4Z

1

2

1

C738

2

1

C747

2

0.1U_0402_16V4Z

1

C752

2

close to DIMM of corresponding control and command signals

Title

Size Do cum e nt Number R e v

Dat e : Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2891
401376

期二 五月

E

1

2

12 49¬P , 24, 2005

0.1U_0402_16V4Z

1

C727

2

A

of

A

FSC FSB FSA CPU

CLKSEL0 CLKSEL1 CLKSEL2

*

1 1

0
0

0
0
1
1

+3VS

1 2

R139 10K_0402_5%

1 2

R145 10K_0402_5%

1 2

R153 10K_0402_5%

1 2

R141 10K_0402_5%

2 2

3 3

R460

4.7K_0402_5%

CLKSEL0

4 4

1 2
1 2

R458
0_0402_5%@

CLKSEL2

CLK_PCI0

CLK_PCI2

CLK_PCI1

+1.05VS

R456

1 2

R459
0_0402_5%

A

CLK_ICH_48M18
CLK_SD_48M22

CLK_14M_CODEC28

1K_0402_5%@
R457

0_0402_5%

1 2

11
1
1
00

33P_0402_50V8J

CLK_PCI_MINI27
CLK_PCI_SIO31
CLK_PCI_PCM22
CLK_PCI_LPC32

CLK_PCI_ICH16

12

B

SRC

MHz

100
133
166
200

PCI

MHz

MHz

100 33.3
100

33.3

100

33.3

100

33.3

Table : IC S 9 5 4206B

C162

1 2

33P_0402_50V8J

1 2

D_CK_SCLK11,12

D_CK_SDATA11,12

CK_SCLK18

CK_SDATA18

MCH_CLKSEL0 6

CPU_BSEL0 5

Y1

14.318MHZ_16PF_DSX840GA

C161

CLK_ICH_48M

CLK_14M_CODEC CLKSEL0

CLKSEL1

R451
0_0402_5%@

B

C

+CLK_VDD48 +CLK_VDDREF

1

C555

2

2.2U_0603_6.3V6K

+CLK_VDD2

1 2

R135 1_0402_5%

12

R143 12_0402_5%
R147 12_0402_5%5IN1@

CLK_PCI_MINI CLK_PCI4

CLK_PCI_ICH
D_CK_SCLK

D_CK_SDATA

+3VS

2

G

1 3

D

+3VS

2

G

1 3

D

R453

4.7K_0402_5%

1 2
1 2

1 2

R455 2.2_0402_5%

1 2
1 2

12

R15133_0402_5%

1 2

R150 33_0402_5%

1 2

R149 33_0402_5%

1 2

R154 33_0402_5%

1 2

R142 33_0402_5%

1 2

R146 33_0402_5%

R452 475_0402_1%

R462

4.7K_0402_5%

1 2

D_CK_SCLK

S

Q16
2N7002_SOT23

R461

4.7K_0402_5%

1 2

D_CK_SDATA

S

Q17
2N7002_SOT23

+1.05VS

R454

1K_0402_5%@
R450

0_0402_5%

1 2

1 2

R448
0_0402_5%

1 2

+3VS

+3VS

12

C

1

C157

2

0.047U_0402_16V7K

+CLK_VDD1

+CLK_VDD1

+CLK_VDDREF

+CLK_VDD48

XTALIN
XTALOUT

CLKSEL2CLK_SD_48M

CLKSEL1

CLK_PCI3CLK_PCI_SIO
CLK_PCI2CLK_PCI_PCM
CLK_PCI1CLK_PCI_LPC

CLK_PCI0

CLKIREF

MCH_CLKSEL1 6

CPU_BSEL1 5

D

L10
KC F BM-L11-201209-221LMAT_0805

1 2

+3VS

1

C156

0.047U_0402_16V7K

2

U8

21

VDDPCIEX_0

28

VDDPCIEX_1

34

VDDPCIEX_2

1

VDDPCI_0

7

VDDPCI_1

42

VDDCPU

48

VDDREF

15mil

11

VDD48

15mil

50

X1

49

X2

12

FS_A/USB_48MHz

53

REF1/FSLC/TEST_SEL

16

FSLB/TEST_MODE

5

PCICLK5

4

PCICLK4

3

PCICLK3

56

PCICLK2/REQ_SEL

9

SELPCIEX_LCDCLK#/PCICLK_F1

8

ITP_EN/PCICLK_F0

46

SCLK

47

SDATA

39

IREF

15mil

13

GND_0

29

GND_1

2

GND_2

45

GND_3

51

GND_4

6

GND_5

ICS954226AGT_TSSOP56

Change to 0 ohm

VDDA

GNDA

PCI/SRC_STOP#

CPU_STOP#

CPUCLKT1
CPUCLKC1

CPUCLKT0
CPUCLKC0

CPUCLKT2_ITP/PCIEXT6

CPUCLKC2_ITP/PCIEXC6

PEREQ1#/PCIEXT5
PEREQ2#/PCIEXC5

PCIEXT4

PCIEXC4

SATACLKT
SATACLKC

PCIEXT3

PCIEXC3

PCIEXT2

PCIEXC2

PCIEXT1

PCIEXC1

LCDCLK_SS/PCIEX0T
LCDCLK_SS/PCIEX0C

DOTT_96MHz
DOTC_96MHz

VTT_PWRGD#/PD

REF0

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2005/04/21 2006/09/01

E

1

C144

2.2U_0603_6.3V6K

2

1

37
38

55
54

41
40

44
43

36
35

33
32

31
30

26
27

24
25

22
23

19
20

17
18

14
15

10
52

2

STP_PCI#
STP_CPU#

CLK_CPU1
CLK_CPU1#

CLK_CPU0
CLK_CPU0#

CLK_CPU2
CLK_CPU2#

CLK_SRC5
CLK_SRC5#

CLK_SRC4
CLK_SRC4#

CLK_SRC3
CLK_SRC3#

CLK_SRC2
CLK_SRC2#

CLK_SRC1
CLK_SRC1#

CLK_SRC0
CLK_SRC0#

CLK_DOT
CLK_DOT#

CLK_REF CLK_14M_SIO

1

C149

0.047U_0402_16V7K

2

+CLK_VCCA

40mil

C553

2.2U_0603_6.3V6K

R124 33_0402_5%

1 2

R120 33_0402_5%

1 2

R134 33_0402_5%

1 2

R128 33_0402_5%

1 2

R113 33_0402_5%

1 2

R109 33_0402_5%

1 2

R105 33_0402_5%

1 2

R99 33_0402_5%

1 2

R100 33_0402_5%

1 2

R96 33_0402_5%

1 2

R106 33_0402_5%

1 2

R102 33_0402_5%

1 2

R114 33_0402_5%

1 2

R110 33_0402_5%

1 2

R121 33_0402_5%

1 2

R117 33_0402_5%

1 2

R129 33_0402_5%

1 2

R125 33_0402_5%

1 2

R136 33_0402_5%

1 2

R131 33_0402_5%

1 2

1 2

R144 12_0402_5%

1 2

R148 12_0402_5%

Compal Secret Data

Deciphered Date

E

1

2

CLK_ICH_14M

F

1

2

1 2

R449

2.2_0402_5%

C150

0.047U_0402_16V7K

PM_STP_PCI# 18
PM_STP_CPU# 18,47

CLK_MCH_BCLK
CLK_MCH_BCLK#

CLK_CPU_BCLK
CLK_CPU_BCLK#

CLK_CPU_ITP
CLK_CPU_ITP#

CLK_PCIE_LAN
CLK_PCIE_LAN#

CLK_PCIE_SATA
CLK_PCIE_SATA#

CLK_MCH_3GPLL
CLK_MCH_3GPLL#

CLK_PCIE_VGA
CLK_PCIE_VGA#

CLK_PCIE_ICH
CLK_PCIE_ICH#

CLK_DREF_SSC
CLK_DREF_SSC#

CLK_DREF_96M
CLK_DREF_96M#

+3VS

F

C145

0.047U_0402_16V7K

+CLK_VDD1

+3VS

1 2

R138 10K_0402_5%

VTT_POWERGD#

CLK_14M_SIO 31

CLK_ICH_14M 18

G

Title

+CLK_VDD1

1

C152

0.047U_0402_16V7K

2

1

C165

2

2.2U_0603_6.3V6K

2

G

1 3

D

S

Q14
2N7002_SOT23

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2891
401376

期二 五月

G

40mil

1

C147

0.047U_0402_16V7K

2

L11

KC F BM-L11-201209-221LMAT_0805

1 2

Change to 0 ohm

CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6

CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4

CLK_PCIE_LAN 25
CLK_PCIE_LAN# 25

CLK_PCIE_SATA 17
CLK_PCIE_SATA# 17

CLK_MCH_3GPLL 8
CLK_MCH_3GPLL# 8

CLK_PCIE_VGA 15
CLK_PCIE_VGA# 15

CLK_PCIE_ICH 18
CLK_PCIE_ICH# 18

CLK_DREF_SSC 6
CLK_DREF_SSC# 6

CLK_DREF_96M 6
CLK_DREF_96M# 6

Size Do cum e nt Number R e v

Custom

Dat e : Sheet

Clock G enerator

40mil

1

C159

2

0.047U_0402_16V7K

CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_CPU_ITP
CLK_CPU_ITP#
CLK_PCIE_LAN
CLK_PCIE_LAN#
CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_PCIE_ICH
CLK_PCIE_ICH#
CLK_DREF_SSC
CLK_DREF_SSC#
CLK_DREF_96M
CLK_DREF_96M#

VGATE 6,18,47

+CLK_VDD2

1 2

R123 49.9_0402_1%

1 2

R119 49.9_0402_1%

1 2

R133 49.9_0402_1%

1 2

R127 49.9_0402_1%

1 2

R112 49.9_0402_1%

1 2

R108 49.9_0402_1%

1 2

R104 49.9_0402_1%

1 2

R98 49.9_0402_1%

1 2

R101 49.9_0402_1%

1 2

R97 49.9_0402_1%

1 2

R107 49.9_0402_1%

1 2

R103 49.9_0402_1%

1 2

R115 49.9_0402_1%

1 2

R111 49.9_0402_1%

1 2

R122 49.9_0402_1%

1 2

R118 49.9_0402_1%

1 2

R130 49.9_0402_1%

1 2

R126 49.9_0402_1%

1 2

R137 49.9_0402_1%

1 2

R132 49.9_0402_1%

H

1

C163

2

0.047U_0402_16V7K

of

13 49¬P , 24, 2005

H

A

A

CRT Connector

U4

DOCKIN#

CRT_R_F
CRT_G_F

1 2
1 2
1 2

DOCKIN#32,37

CRT_R
CRT_G
CRT_BCRT_B_F

1 1

R34 0_0402_5%PM@

VGA_CRT_R15
GMCH_CRT_R8

VGA_CRT_G15
GMCH_CRT_G8

VGA_CRT_B15
GMCH_CRT_B8

1 2
1 2

R33 0_0402_5%GM@
R32 0_0402_5%PM@

1 2
1 2

R21 0_0402_5%GM@
R19 0_0402_5%PM@

1 2
1 2

R18 0_0402_5%GM@

CRT_R_F

R570 0_0402_5%WOD@

CRT_G_F

R571 0_0402_5%WOD@
R572 0_0402_5%WOD@

Pop wit h No-Docking

+2.5VS

1 3

D

Q42

BSS138_SOT23GM@

1 2

+2.5VS

1 3

D

Q41

BSS138_SOT23GM@

1 2

VGA_CRT_HSYNC15
GMCH_CRT_HSYNC8

2

G

S

2

G

S

2 2

D_DDC_DATA37

R380 0_0402_5%PM@

3 3

A

D_DDC_CLK

R379 0_0402_5%PM@

1 2

R422 0_0402_5%PM@

1 2

R424 0_0402_5%GM@

1 2

R434 0_0402_5%PM@

1 2

R433 0_0402_5%GM@

D_DDC_CLK37

VGA_TV_LUMA15

GMCH_TV_LUMA8

VGA_TV_CRMA15
GMCH_TV_CRMA8

4 4

CRT_B_F

VGA_DDC_DATAD_DDC_DATA

VGA_DDC_CLK

12

R432

150_0402_5%

1

SEL

15

OE#

4

1A

7

2A

9

3A

12

4A

8

GND

WD@
FSAV330MTC_TSSOP16

12

R428

150_0402_5%

VCC

1B1
2B1
3B1
4B1

1B2
2B2
3B2
4B2

1 2

R8 0_0402_5%PM@

1 2

R7 39_0402_5%GM@

VGA_CRT_VSYNC15
GMCH_CRT_VSYNC8

B

+5VS

1 2

C18 0.1U_0402_16V4Z

16

D_CRT_R

2

D_CRT_G

5

D_CRT_B

11
14

3
6
10
13

12

12

R1

R2

150_0402_5%

C518

12

270P_0402_50V7K

B

150_0402_5%

1 2

C10 0.1U_0402_16V4Z

1 2

R377 0_0402_5%PM@

1 2

R378 39_0402_5%GM@

12

C

D_CRT_R

R517 470_0402_5%
D_CRT_G
D_CRT_B

WD@

D_CRT_R 37
D_CRT_G 37
D_CRT_B 37

CRT_R CRT_R_L

CRT_G

CRT_B

12

R3

150_0402_5%

+CRT_VCC

CRT_HSYNC D_CRT_HSYNC

C410 0.1U_0402_16V4Z

L27

1 2

FBM-11-160808-121T_0603

L28

1 2

FBM-11-160808-121T_0603

C495

270P_0402_50V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

R518 470_0402_5%

1 2

R519 470_0402_5%

1 2

1

C9

2

8P_0402_50V8K

1

5

P

4

OE#

A2Y

G

U1

SN74AHCT1G125GW_SOT353-5

3

1 2

330P_0402_50V7K

1

C8

2

8P_0402_50V8K

+CRT_VCC

1

5

CRT_VSYNC D_CRT_VSYNC

12

C44

P

A2Y

G

3

LUMA_1
CRMA_1

12

330P_0402_50V7K

2005/04/21 2006/09/01

C

+3VS

1 2

L3

FCM2012C-800_0805

1 2

L4

FCM2012C-800_0805

1 2

L5

FCM2012C-800_0805

1

C7

8P_0402_50V8K@

2

8P_0402_50V8K

10P for GMCH

12

R6 10K_0402_5%

4

OE#

U35
SN74AHCT1G125GW_SOT353-5

L33
FBM-11-160808-121T_0603

1 2

JP10

1
2
3
4

SUYIN_030244FS004TX01ZA

C54

TV-OUT Conn.

Compal Secret Data

CRT_G_L

CRT_B_L

C1

1

5

2

5

6

3

6

4

Deciphered Date

D23

DAN217_SC59@

1

2

1

2

1 2

L1 FCM1608C-121T_0603

1 2

L2 FCM1608C-121T_0603

1. Y ground

2. C ground

3. Y (lu minance+sync)

4. C (crominance)

3

C2

8P_0402_50V8K@

D

D22

DAN217_SC59@

1

2

3

1

2

10P_0402_50V8J

33P for GMCH

D_CRT_HSYNC 37

D_CRT_VSYNC 37

4.7K_0402_5%

DSUB_15

D

1

2

C5

+CRT_VCC

R4

1

2

3

C3
8P_0402_50V8K@

1

2

12

4.7K_0402_5%

E

+5VS

D1

2 1

RB411D_SOT23

D21

DAN217_SC59@

C408

HSYNC_L

VSYNC_L

1

2

12

R5

Q1
BSS138_SOT23

100P_0402_50V8J

C6
10P_0402_50V8J

R9 0_0402_5%PM@

R10 0_0402_5%GM@

2

G

1 3

D

S

1 3

D

Q2

BSS138_SOT23

Title

Size Do cum e nt Number R e v

Custom

Dat e : Sheet

0.1U_0402_16V4Z

DDC_MD2

1

2

68P_0402_50V8K

1 2

1 2

2

G

S

W=40mils

POLYSWITCH_1A

C4

1

2

C409

R11 0_0402_5%GM@

VGA_DDC_DATADSUB_12

VGA_DDC_CLK

R12

0_0402_5%GM@

F1

12

12

W=40mils

1

2

SUYIN_070453FR015S208CU

DSUB_12

DSUB_15

1

C407
68P_0402_50V8K

2

GMCH_CRT_DATA 8

VGA_DDC_DATA 15

VGA_DDC_CLK 15

GMCH_CRT_CLK 8

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2891
401376

期二 五月

E

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

+3VS

+2.5VS

14 49¬P , 24, 2005

+CRT_VCC+R_CRT_VCC

JP1

16
17

A

of

5

4

3

2

1

LCD POWE R CIRCUIT

C663

GMCH_ENVDD

2

1

1

C27

2

21

1

5

P

OE#

I2O

G

3

R62

0.047U_0402_16V7KGM@

D32
RB751V_SOD323

U44
74LVC1G125GW_SOT3535

4

1 2

100_0402_5%GM@

+3VS

12

R477

4.7K_0402_5%

G

2

Q9

+3VS

S

GM@
SI2301BDS_SOT23

D

1 3

1

C28

2

+LCDVDD

1

C29

4.7U_0805_10V4ZGM@

0.1U_0402_16V4ZGM@

2

PLTRST_VGA#18

VGA_CRT_R14
VGA_CRT_G14
VGA_CRT_B14 VGA_CRT_HSYNC 14

+3VALW

+2.5VS

DVI_TXC+37
DVI_TXC-37

DVI_TXD0+37
DVI_TXD0-37

DVI_TXD1+37
DVI_TXD1-37

DVI_TXD2+37
DVI_TXD2-37

R510 0_0402_5%PM@

1 2

R511 0_0402_5%@

PLT_RST#6,16,18,20,22,25,31,32

1 2

GMCH_ENVDD8

+3VALW

D D

C C

+LCDVDD

12

R53

300_0402_5%GM@

13

D

Q8

2N7002_SOT23GM@

2

G

S

+3VS

0.01U_0402_25V7KGM@

R55

100K_0402_5%GM@

1 2

1

C19

0.1U_0402_16V4Z@

2

BKOFF#32

B B

BKOFF# DISPOFF#

LCD/PANEL BD. Conn.

JP6

B+

+3VS

GMCH_LCD_CLK8

GMCH_LCD_DATA8

GMCH_TZOUT0-8
GMCH_TZOUT0+8

GMCH_TZOUT1+8
GMCH_TZOUT1-8
GMCH_TZOUT2+8
GMCH_TZOUT2-8

GMCH_TZCLK-8

A A

GMCH_TZCLK+8

LCD_ID16,31

GMCH_LCD_CLK
GMCH_LCD_DATA

GMCH_TZOUT0-

GMCH_TZOUT1+
GMCH_TZOUT1­GMCH_TZOUT2+
GMCH_TZOUT2-

GMCH_TZCLK­GMCH_TZCLK+

LCD_ID

1

1

2

3

3

4

5

5

6

7

7

8

9

9

10

11

11

12

13

13

14

15

15

16

17

17

18

19

19

20

21

21

22

23

23

24

25

25

26

27

27

28

29

29

30

31

31

32

33

33

34

35

35

36

37

37

38

39

39

40

ACES_87216-4012GM@

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

DAC_BRIG
INVT_PWM
DISPOFF#

GMCH_TXOUT0­GMCH_TXOUT0+GMCH_TZOUT0+

GMCH_TXOUT1­GMCH_TXOUT1+
GMCH_TXOUT2+
GMCH_TXOUT2-

GMCH_TXCLK­GMCH_TXCLK+

DAC_BRIG 32
INVT_PWM 32

+LCDVDD

GMCH_TXOUT0- 8
GMCH_TXOUT0+ 8

GMCH_TXOUT1- 8
GMCH_TXOUT1+ 8
GMCH_TXOUT2+ 8
GMCH_TXOUT2- 8

GMCH_TXCLK- 8
GMCH_TXCLK+ 8

PCEI_GTX_C_MRX_N[0..15]8
PCEI_GTX_C_MRX_P[0..15]8

PCIE_MTX_C_GRX_N[0..15]8
PCIE_MTX_C_GRX_P[0..15]8

B+

DAC_BRIG
DISPOFF#

INVT_PWM
VGA_CRT_R
VGA_CRT_G
VGA_CRT_B

PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0

PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1

PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2

PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3

PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4

PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5

PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6

PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7

PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8

PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9

PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10

PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11

PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12

PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13

PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14

PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15

PCEI_GTX_C_MRX_N[0..15]

PCEI_GTX_C_MRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]

VGA BOARD Conn.

JP11

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
57 58
59 60
61 62
63 64
65 66
67 68
69 70
71 72
73 74
75 76
77 78
79 80
81 82
83 84
85 86
87 88
89 90
91 92
93 94
95 96
97 98
99 100
101 102
103 104
105 106
107 108
109 110
111 112
113 114
115 116
117 118
119 120
121 122
123 124
125 126
127 128
129 130
131 132
133 134
135 136
137 138
139 140
141 142
143 144
145 146
147 148
149 150
151 152
153 154
155 156
157 158
159 160

ACES_88081-1600PM@

VGA_DDC_CLK
VGA_DDC_DATA

VGA_TV_LUMA
VGA_TV_CRMA
VGA_CRT_VSYNC

VGA_CRT_HSYNC
SUSP#
GMCH_ENBKL

+3VS

+5VS

+5VALW

LCD_ID

PCEI_GTX_C_MRX_P0
PCEI_GTX_C_MRX_N0

PCEI_GTX_C_MRX_P1
PCEI_GTX_C_MRX_N1

PCEI_GTX_C_MRX_P2
PCEI_GTX_C_MRX_N2

PCEI_GTX_C_MRX_P3
PCEI_GTX_C_MRX_N3

PCEI_GTX_C_MRX_P4
PCEI_GTX_C_MRX_N4

PCEI_GTX_C_MRX_P5
PCEI_GTX_C_MRX_N5

PCEI_GTX_C_MRX_P6
PCEI_GTX_C_MRX_N6

PCEI_GTX_C_MRX_P7
PCEI_GTX_C_MRX_N7

PCEI_GTX_C_MRX_P8
PCEI_GTX_C_MRX_N8

PCEI_GTX_C_MRX_P9
PCEI_GTX_C_MRX_N9

PCEI_GTX_C_MRX_P10
PCEI_GTX_C_MRX_N10

PCEI_GTX_C_MRX_P11
PCEI_GTX_C_MRX_N11

PCEI_GTX_C_MRX_P12
PCEI_GTX_C_MRX_N12

PCEI_GTX_C_MRX_P13
PCEI_GTX_C_MRX_N13

PCEI_GTX_C_MRX_P14
PCEI_GTX_C_MRX_N14

PCEI_GTX_C_MRX_P15
PCEI_GTX_C_MRX_N15

B+

VGA_DDC_CLK 14

VGA_DDC_DATA 14

VGA_TV_LUMA 14
VGA_TV_CRMA 14
VGA_CRT_VSYNC 14
SUSP# 24,30,32,34,35,39,45,46

GMCH_ENBKL 8,32

+1.5VS

DVI_DET 37

DVI_SCLK 37

DVI_SDATA 37

CLK_PCIE_VGA 13
CLK_PCIE_VGA# 13

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/04/21 2006/09/01

3

Compal Secret Data

Deciphered Date

Title

Size Do cum e nt Number R e v

Custom

2

Dat e : Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2891

401376

期二 五月

1

A

of

15 49¬P , 24, 2005