Compal LA-2861, Inspiron 9400, Satellite M50 Schematic

Page 1
A
1 1
B
C
D
E
HAZ00/HTW01
2 2
LA-2861
3 3
REV 1.0 Schematic
UFC-PGA Dothan/ RC410MD(RC410MB)/ SB450
2005-07-11 Rev.1.0
4 4
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
C
Deciphered Date
Compal Electronics, Inc.
Title
Black Diagram
Size Document Number Rev
HAZ00/BL10E (LA2861) 1.0
B
Thursday, A ugus t 04, 2005
D
Date: Sheet
142
E
of
Page 2
A
B
C
D
E
HAZ00 & HTW01 LA-2861 FUNCTION BLOCK DIAGRAM
4 4
CRT Conn.
page 13
LCD Conn
page 12
LVDS & TV-OUT Conn.
3 3
2 2
CARDBUS
CB1410
PAGE 20
CARD BUS SOCKET
PAGE 21
TSB43AB21
PAGE 22
1394-Port
PAGE 22
page 12
PCI BUS
33MHz (3.3V)
LAN
RTL8100CL
PAGE 19
Mini PCI FOR WLAN
PAGE 23
INTEL Celeron 479 pin
FSB
400MHz
ATI-RC410MB
VGA M10P Embeded
707 pin BGA
A-Link Express x 4
2.5GHz(1.2V)
Bandwidth 500MB
ATI-SB450
564 pin BGA
PAGE 21,22,23,24,25
LPC BUS 33MHz (3.3V)
Embedded Controller
ENE KB910
PAGE 29
PAGE 4,5,6
PAGE 6,7,8
Thermal Sensor ADM1032ARM
400/533/667MHz (1.8V)
Memory Bus
480MHz(5V)
Primary ATA-100 (5V)
Secondary ATA-100 (5V)
AC-LINK
14.318MHz(3.3V)
Clock Generator ICS951411AGT
PAGE 5
SO-DIMM x 2(DDRII)
BANK 0,1,2,3
USB 2.0 Port *3 0,2,4
IDE HDD
HAZ00 IDE ODD
BL10E IDE ODD
AC97 CODEC
ALC 250
PAGE 36
PAGE 26
PAGE 26
PAGE 26
PAGE 24
PAGE 11
PAGE 9,10
CPU VID
Audio Amplifier
APA2068
PAGE 5
PAGE 25
FANController
RTC Battery
DC/DC Interface
LID/Kill Switch Power Buttom
DCIN&DETECTOR
BATT CONN/OTP
CHARGER
3V/5V/12V
DDR_1.8V/0.9VEP
1.8VCORE
1.5V/PROCHOT
CPU_CORE
PAGE 33
PAGE 14
PAGE 34
PAGE 31
PAGE 35
PAGE 36
PAGE 37
PAGE 38
PAGE 40
PAGE 39
PAGE 40
PAGE 41
RJ-45
PAGE 19
1 1
A
B
BIOS(1M)
& I/O PORT
PAGE 30
Scan KB
PAGE 30
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
C
MDC
Connector
Deciphered Date
PAGE 33
Compal Electronics, Inc.
Title
Black Diagram
Size Document Number Rev
HAZ00/BL10E (LA2861) 1.0
B
Thursday, A ugus t 04, 2005
D
Date: Sheet
242
E
of
Page 3
A
B
C
D
E
Rb
0
NC7
SIGNAL
HIGH
LOW
LOW
AD_BID
0.436 V
0.712 V
1.036 V
1.935 V
2.500 V
SLP_S5#STATE
HIGHHIGH
HIGH
HIGH
HIGH
LOWLOW
minV
0 V
+VALW
ON
ON
ON
ON
ON
+V
ON
ON
ON
OFF
OFF
AD_BID
0.503 V
0.819 V
1.650 V1.453 V
2.200 V
3.300 V
typV
0 V
+VSSLP_S3#
ON
OFF
OFF
OFF
Clock
ONON
LOW
OFF
OFF
OFF
V
AD_BID
0.289 V0.250 V0.216 V
0.538 V
0.875 V
1.264 V1.185 V
1.759 V
2.341 V
3.300 V
max
0 V
Voltage Rails
Power Plane Description
1 1
2 2
VIN B+ +CPU_CORE +CPUVID +VGA_CORE ON OFF OFF1.0V/1.2V switched power rail for VGA chip +1.2VS 1 .2 VS fo r PCI-Express OFFON OF F +0.9VS 0.9V switched power rail +1.5VS +1.8VS 1.8VS switched power rail OFFOFFON +1.8VALW 1.8V always on power rail ON *ONON +1.8V +3VALW +3VS
+5VS +12VALW +RTCVCC
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Adapter power supply (19V) AC or batte ry power rail for power circuit. Core voltage for CPU
1.2V switched power rail for CPU AGTL Bus
DOTHAN B
1.8V power rail
3.3V always on power rail
3.3V switched power rail 5V always on power rail 5V switched power rail
RTC power
S1 S3 S5
ON ON ONONON ON OFF ON OFF
ON OFF OF F ON OFF OF F
ON ON ON ON ON+5VALW ON ON ON
OFF ON OFF ON ON
ON
OFF OFF
OFF ON*ON OFF ON* OFF ON*12V always on power rail ON
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
Board ID Table for AD channel
Vcc Ra
Board ID
0 1 2 3 4 5 6
3.3V +/- 5% 100K +/- 5%
8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%
External PCI Devices
Device IDSEL # REQ # / GNT # Interrupts
TI 1410
LAN Mini-PCI(WLAN) 1394
AD20
AD22
AD18 AD16
2
1PIRQG
3 0
PIRQA/PIRQB
PIRQF/PIRQG PIRQA
Board ID
0 1 2 3 4
3 3
5 6 7
PCB Revision
0.1, 0.2
0.3
1.0
EC SM Bus1 address
Device
Smart Battery
Address Address
EC SM Bus2 address
Device
ADM1032
1001 110X b0001 011X b
SKU ID
0 1 2
SKU Status
HDD Password
0 1
NO Yes
3 4 5
1 Buttons
6 7 7 Buttons
SB450 SM Bus address
4 4
Device
Clock Generator (ICS951413BGLFT)
DDR DIMM0
DDR DIMM1
A
Address
1101 001Xb
1010 0100b 1010 0110b
A4 A6
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
C
Deciphered Date
Title
Size Document Number Rev
B
D
Date: Sheet
Compal Electronics, Inc.
Notes List
HAZ00/BL10E (LA2861) 1.0
Thursday, A ugus t 04, 2005
342
E
of
Page 4
5
4
H_D#[0..63]
H_D#[0..63] 6
3
2
1
+3VS
H_A#[3..31]6
H_REQ#[0..4]6
H_RS#[0..2]6
D D
C C
B B
A A
H_A#[3..31] H_REQ#[0..4] H_RS#[0..2]
H_ADSTB#06 H_ADSTB#16
CLK_BCLK11
CLK_BCLK#11
H_ADS#6 H_BNR#6
H_BPRI#6
H_DEFER#6
H_DRDY#6
H_HIT#6 H_HITM#6
H_LOCK#6
H_RESET#6,14
H_TRDY#6
H_DBSY#6
H_DPWR#6
H_PWRGOOD14
H_CPUSLP#14
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_BR0#
H_IERR# H_RESET#
H_RS#0 H_RS#1 H_RS#2
ITP_DBRRESET#
H_DPSLP#
H_DPRSTP#
PREQ#
PROCHOT# H_PWRGOOD
H_CPUSLP# ITP_TCK ITP_TDI ITP_TDO TEST1 TEST2 ITP_TMS ITP_TRST#
THERMDA THERMDC H_THERMTRIP#
JP19A
P4
A3#
U4
A4#
V3
A5#
R3
A6#
V2
A7#
W1
A8#
T4
A9#
W2
A10#
Y4
A11#
Y1
A12#
U1
A13#
AA3
A14#
Y3
A15#
AA2
A16#
AF4
A17#
AC4
A18#
AC7
A19#
AC3
A20#
AD3
A21#
AE4
A22#
AD2
A23#
AB4
A24#
AC6
ADDR GROUP
A25#
AD5
A26#
AE2
A27#
AD6
A28#
AF3
A29#
AE1
A30#
AF1
A31#
R2
REQ0#
P3
REQ1#
T2
REQ2#
P1
REQ3#
T1
REQ4#
U3
ADSTB0#
AE5
ADSTB1#
A16
ITP_CLK0
A15
ITP_CLK1
B15
BCLK0
B14
BCLK1
N2
ADS#
L1
BNR#
J3
BPRI#
N4
BR0#
L4
DEFER#
H2
DRDY#
K3
HIT#
K4
HITM#
A4
IERR#
J2
LOCK#
B11
RESET#
H1
RS0#
K1
RS1#
L2
RS2#
M3
TRDY#
C8
BPM0#
B8
BPM1#
A9
BPM2#
C9
BPM3#
A7
DBR#
M2
DBSY#
B7
DPSLP#
G1
DPRSTP#
C19
DPWR#
A10
PRDY#
B10
PREQ#
B17
PROCHOT#
E4
PWRGOOD
A6
SLP#
A13
TCK
C12
TDI
A12
TDO
C5
TEST1
F23
TEST2
C11
TMS
B13
TRST#
B18
THERMDA
A18
THERMDC
C17
THERMTRIP#
TYCO_1612365-1_Dothan
Dothan
DATA GROUP
HOST CLK
CONTROL GROUP
MISC
THERMAL DIODE
LEGACY CPU
D10# D11# D12# D13# D14# D15# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63#
DINV0# DINV1# DINV2# DINV3#
DSTBN0# DSTBN1# DSTBN2# DSTBN3# DSTBP0# DSTBP1# DSTBP2# DSTBP3#
A20M#
FERR#
IGNNE#
INIT# LINT0 LINT1
STPCLK#
SMI#
D0# D1# D2# D3# D4# D5# D6# D7# D8# D9#
A25 A22 B21 A24 B26 A21 B20 C20 B24 D24 E24 C26 B23 E23 C25 H23 G25 L23 M26 H24 F25 G24 J23 M23 J25 L26 N24 M25 H26 N25 K25 Y26 AA24 T25 U23 V23 R24 R26 R23 AA23 U26 V24 U25 V26 Y23 AA26 Y25 AB25 AC23 AB24 AC20 AC22 AC25 AD23 AE22 AF23 AD24 AF20 AE21 AD21 AF25 AF22 AF26
D25 J26 T24 AD20
C23 K24 W25 AE24 C22 L24 W24 AE25
C2 D3 A3 B5 D1 D4
C6 B4
H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_DINV#0 6 H_DINV#1 6 H_DINV#2 6 H_DINV#3 6
H_DSTBN#0 6 H_DSTBN#1 6 H_DSTBN#2 6 H_DSTBN#3 6 H_DSTBP#0 6 H_DSTBP#1 6 H_DSTBP#2 6 H_DSTBP#3 6
H_A20M# 14 H_FERR# 14 H_IGNNE# 14 H_INIT# 14 H_INTR 14 H_NMI 14
H_STPCLK# 14 H_SMI# 14
R68
47K_0402_5%@
1 2
C260
0.1U_0603_25V7K@
+1.05VS
H_THERMTRIP#
+1.05VS +CPU_CORE
12
12
R69 47K_0402_5%
MAINPWON 15,34,35,37,38
1
C
2
B
Q22
E
2SC2411K_SC59
3
1 2
R67 56_0402_5%
Place Caps Close to CPU Socket
C263 180P_0402_50V8J
1 2
C255 180P_0402_50V8J
1 2
C264 180P_0402_50V8J
1 2
C254 180P_0402_50V8J
1 2
C262 180P_0402_50V8J
1 2
C257 180P_0402_50V8J
1 2
C261 180P_0402_50V8J@
1 2
C256 180P_0402_50V8J
1 2
C265 180P_0402_50V8J
1 2
C640 180P_0402_50V8J
1 2
H_INIT# H_A20M# H_CPUSLP# H_INTR H_NMI H_SMI# H_STPCLK# H_IGNNE# H_PWRGOOD H_FERR#
2200P_0402_50V7K
EC_SMB_CK228 EC_SMB_DA228
CPU_STP#11,14,40
C503
1
THERMDA
2
THERMDC
2 3 8 7
R166 470_0402_5%
H_FERR# PREQ# H_DPSLP# H_BR0# H_DPRSTP# ITP_TDI ITP_TDO H_RESET# ITP_TMS PROCHOT# H_IERR#
H_PWRGOOD
H_CPUSLP#
ITP_DBRRESET#
ITP_TRST#
ITP_TCK TEST1 TEST2
H_D#0
A19
1
C502
0.1U_0402_16V4Z
2
U26
D+ D­SCLK SDATA
ADM1032ARM_RM8
12
1
VDD1
6
ALERT#
4
THERM#
5
GND
+1.05VS
R172
1 2
Q27
2
3 1
MMBT3904_SOT23
R72 56_0402_5% R77 56_0402_5%@ R62 200_0402_5%
1 2
R70 200_0402_5%
1 2
R71 56_0402_5%@ R79 150_0402_5% R78 54.9_0402_1%@ R63 54.9_0402_1%@ R64 40.2_0402_1% R66 56_0402_5% R75 56_0402_5% R82 200_0402_5% R81 200_0402_5%
1 2
R76 150_0402_5%@
R80 680_0402_5% R65 27.4_0402_1% R61 1K_0402_5%@ R294 1K_0402_5%@
470_0402_5%
2
H_DPSLP#
Q26 MMBT3904_SOT23
3 1
12 12
12 12 12 12 12 12 12 12
12
12 12 12 12
12
R303
10K_0402_5%@
+1.05VS
+3VS
THERMDA & THERMDC Trace / Space = 10 / 10 mil
5
Security Classification
Issued Date
THIS SHEET OF ENG INEE RIN G DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
3
Compal Secret Data
Deciphered Date
Compal Electronics, Inc.
Title
Dothan(1/2)
Size Document Number R ev
HAZ00/BL10E (LA2861) 1.0
Custom
2
Date: Sheet
442Monday, August 08, 2005
1
of
Page 5
5
JP19B
R45 54.9_0402_1%@
1 2
R44 54.9_0402_1%@
1 2
D D
1.5V FOR DOTHAN-B
+VCCA
+1.5VS
0.01U_0402_16V7K
C C
R249 1K_0402_1%
B B
1 2
R250 2K_0402_1%
C495
+1.05VS
12
20mils
1
2
+CPU_CORE
CPU_BSEL07,11 CPU_BSEL111
VCCSENSE VSSSENSE
+1.05VS
C489
1
10U_0805_6.3V6M
2
PSI#40
CPU_VID040 CPU_VID140 CPU_VID240 CPU_VID340 CPU_VID440 CPU_VID540
Width 12mils spacing 15mils
GTL_REF0
CPU_BSEL0 CPU_BSEL1
COMP0 COMP1 COMP2 COMP3
AE7
VCCSENSE
AF6
VSSSENSE
F26
VCCA0
B1
VCCA1
N1
VCCA2
AC26
VCCA3
P23
VCCQ0
W4
VCCQ1
D10
VCCP
D12
VCCP
D14
VCCP
D16
VCCP
E11
VCCP
E13
VCCP
E15
VCCP
F10
VCCP
F12
VCCP
F14
VCCP
F16
VCCP
K6
VCCP
L5
VCCP
L21
VCCP
M6
VCCP
M22
VCCP
N5
VCCP
N21
VCCP
P6
VCCP
P22
VCCP
R5
VCCP
R21
VCCP
T6
VCCP
T22
VCCP
U21
VCCP
D6
VCC
D8
VCC
D18
VCC
D20
VCC
D22
VCC
E5
VCC
E7
VCC
E9
VCC
E17
VCC
E19
VCC
E21
VCC
F6
VCC
F8
VCC
F18
VCC
E1
PSI#
E2
VID0
F2
VID1
F3
VID2
G3
VID3
G4
VID4
H4
VID5
AD26
GTLREF
C16
BSEL0
C14
BSEL1
P25
COMP0
P26
COMP1
AB2
COMP2
AB1
COMP3
B2
RSVD
C3
RSVD
E26
RSVD
AF7
RSVD
AC1
RSVD
TYCO_1612365-1_Dothan
Dothan
4
A2
VSS
A5
VSS
A8
VSS
A11
VSS
A14
VSS
A17
VSS
A20
VSS
A23
VSS
A26
VSS
B3
VSS
B6
VSS
B9
VSS
B12
VSS
B16
VSS
B19
VSS
B22
VSS
B25
VSS
C1
VSS
C4
VSS
C7
VSS
C10
VSS
C13
VSS
C15
VSS
C18
VSS
C21
VSS
C24
VSS
D2
VSS
D5
VSS
D7
VSS
D9
VSS
D11
VSS
D13
VSS
D15
VSS
D17
VSS
D19
VSS
D21
VSS
D23
VSS
D26
VSS
E3
VSS
E6
VSS
E8
VSS
E10
VSS
E12
VSS
E14
VSS
E16
VSS
E18
VSS
E20
VSS
E22
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
E25 F1 F4 F5 F7 F9 F11 F13 F15 F17 F19 F21 F24 G2 G6 G22 G23 G26 H3 H5 H21 H25 J1 J4 J6 J22 J24 K2 K5 K21 K23 K26 L3 L6 L22 L25 M1
+1.05VS
1
+
2
150U_D2_6.3VM
POWER, GROUNG, RESERVED SIGNALS AND NC
330U_D_2VM
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
Vcc-core Decoupling
SPCAP,Polymer MLCC 0805 X5R
0.1U_0402_16V4Z
1
C211
C467
2
+CPU_CORE
330U_D_2VM
1
+
C180
2
+CPU_CORE
10U_0805_6.3V6M
1
C193
2
+CPU_CORE
10U_0805_6.3V6M
1
C214
2
+CPU_CORE
10U_0805_6.3V6M
1
C206
2
+CPU_CORE
10U_0805_6.3V6M
1
C477
2
+CPU_CORE
10U_0805_6.3V6M
1
C475
2
0.1U_0402_16V4Z
1
C459
2
0.1U_0402_16V4Z
3
330U_D_2VM@
1
2
1
C192
2
10U_0805_6.3V6M
1
C215
2
10U_0805_6.3V6M
1
C207
2
10U_0805_6.3V6M
1
C479
2
10U_0805_6.3V6M
1
C451
2
10U_0805_6.3V6M
+
C492
330U_D_2VM@
1
C194
2
10U_0805_6.3V6M
1
C216
2
10U_0805_6.3V6M
1
C465
2
10U_0805_6.3V6M
1
C480
2
10U_0805_6.3V6M
1
C473
2
1
2
10U_0805_6.3V6M
+
C209
C195
C217
C464
C481
C469
1
+
C466
2
1
1
C196
2
2
10U_0805_6.3V6M
1
1
C218
2
2
10U_0805_6.3V6M
1
1
C463
2
2
10U_0805_6.3V6M
1
1
C478
2
2
10U_0805_6.3V6M
1
1
C474
2
2
10U_0805_6.3V6M
4 x 330uF(12mOhm/4)
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
C,uF ESR, mohm ESL,nH
4X330uF 7m ohm/2 3.5nH/2 35X10uF 5m ohm/35 0.6nH/35
1
C205
2
0.1U_0402_16V4Z
1
1
C199
2
2
0.1U_0402_16V4Z
1
C210
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C212
1
C197
2
10U_0805_6.3V6M
1
C219
2
10U_0805_6.3V6M
1
C462
2
10U_0805_6.3V6M
1
C460
2
10U_0805_6.3V6M
1
C472
2
10U_0805_6.3V6M
1
2
1
C198
2
1
C220
2
1
C461
2
1
C482
2
1
C468
2
1
C201
2
0.1U_0402_16V4Z
2
1
C454
2
0.1U_0402_16V4Z
1
C453
2
0.1U_0402_16V4Z
1
C452
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C470
C191
2
0.1U_0402_16V4Z
+CPU_CORE
1
C471
2
JP19C
F20
VCC
F22
VCC
G5
VCC
G21
VCC
H6
VCC
H22
VCC
J5
VCC
J21
VCC
K22
VCC
U5
VCC
V6
VCC
V22
VCC
W5
VCC
W21
VCC
Y6
VCC
Y22
VCC
AA5
VCC
AA7
VCC
AA9
VCC
AA11
VCC
AA13
VCC
AA15
VCC
AA17
VCC
AA19
VCC
AA21
VCC
AB6
VCC
AB8
VCC
AB10
VCC
AB12
VCC
AB14
VCC
AB16
VCC
AB18
VCC
AB20
VCC
AB22
VCC
AC9
VCC
AC11
VCC
AC13
VCC
AC15
VCC
AC17
VCC
AC19
VCC
AD8
VCC
AD10
VCC
AD12
VCC
AD14
VCC
AD16
VCC
AD18
VCC
AE9
VCC
AE11
VCC
AE13
VCC
AE15
VCC
AE17
VCC
AE19
VCC
AF8
VCC
AF10
VCC
AF12
VCC
AF14
VCC
AF16
VCC
AF18
VCC
M4
VSS
M5
VSS
M21
VSS
M24
VSS
N3
VSS
N6
VSS
N22
VSS
N23
VSS
N26
VSS
P2
VSS
P5
VSS
P21
VSS
P24
VSS
R1
VSS
R4
VSS
R6
VSS
R22
VSS
R25
VSS
T3
VSS
T5
VSS
T21
VSS
T23
VSS
TYCO_1612365-1_Dothan
Dothan
POWER, GROUND
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
1
T26 U2 U6 U22 U24 V1 V4 V5 V21 V25 W3 W6 W22 W23 W26 Y2 Y5 Y21 Y24 AA1 AA4 AA6 AA8 AA10 AA12 AA14 AA16 AA18 AA20 AA22 AA25 AB3 AB5 AB7 AB9 AB11 AB13 AB15 AB17 AB19 AB21 AB23 AB26 AC2 AC5 AC8 AC10 AC12 AC14 AC16 AC18 AC21 AC24 AD1 AD4 AD7 AD9 AD11 AD13 AD15 AD17 AD19 AD22 AD25 AE3 AE6 AE8 AE10 AE12 AE14 AE16 AE18 AE20 AE23 AE26 AF2 AF5 AF9 AF11 AF13 AF15 AF17 AF19 AF21 AF24
R275 27.4_0402_1%
A A
1 2
R274 54.9_0402_1%
1 2
R243 27.4_0402_1%
1 2
R245 54.9_0402_1%
1 2
TRACE CLOSELY CPU < 0.5'
COMP0, COMP2 layout : Width 18mils and Space 25mils COMP1, COMP3 layout : Space 25mils
5
COMP0 COMP1 COMP2 COMP3
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
3
Deciphered Date
Compal Electronics, Inc.
Title
Dothan(2/2)
Size Document Number Rev
HAZ00/BL10E (LA2861) 1.0
B
2
Date: Sheet
542Monday, August 08, 2005
1
of
Page 6
A
H_A#[3..31]4
H_REQ#[0..4]4
H_RS#[0..2]4
12
12
A
U21A
G28
CPU_A3#
H26
CPU_A4#
G27
CPU_A5#
G30
CPU_A6#
G29
CPU_A7#
G26
CPU_A8#
H28
CPU_A9#
J28
CPU_A10#
H25
CPU_A11#
K28
CPU_A12#
H29
CPU_A13#
J29
CPU_A14#
K24
CPU_A15#
K25
CPU_A16#
F29
CPU_REQ0#
G25
CPU_REQ1#
F26
CPU_REQ2#
F28
CPU_REQ3#
E29
CPU_REQ4#
H27
CPU_ADSTB0#
M28
CPU_A17#
K29
CPU_A18#
K30
CPU_A19#
J26
CPU_A20#
L28
CPU_A21#
L29
CPU_A22#
M30
CPU_A23#
K27
CPU_A24#
M29
CPU_A25#
K26
CPU_A26#
N28
CPU_A27#
L26
CPU_A28#
N25
CPU_A29#
L25
CPU_A30#
N24
CPU_A31#
L27
CPU_ADSTB1#
F25
CPU_ADS#
F24
CPU_BNR#
E23
CPU_BPRI#
E25
CPU_DEFER#
G24
CPU_DRDY#
F23
CPU_DBSY#
E27
CPU_LOCK#
C11
CPU_CPURSET#
D23
CPU_RS2#
G23
CPU_RS1#
E26
CPU_RS0#
F22
CPU_TRDY#
D26
CPU_HIT#
E24
CPU_HITM#
D11
CPU_COMP_N
B11
CPU_COMP_P
H22
CPU_VREF
D25
RESERVED0
E11
RESERVED1
G22
CPU_DPWR#
R38
49.9_0402_1%
***
R37 100_0402_1%
ADDR. GROUP
ADDR. GROUP
PART 1 OF 6
0
1
CPU I/F
CONTROLMISC.
RC410MD
216CPP4AKA21HK_BGA707
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9
***
R30
12
R234
12
CPU_VREF
1
C123
2
C121
H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15
H_A#16 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_RS#2 H_RS#1 H_RS#0
HSCOMP
HRCOMP
+1.05VS
1
2
1U_0402_6.3V4Z
1 1
H_ADSTB#04
2 2
H_ADSTB#14
H_ADS#4 H_BNR#4 H_BPRI#4 H_DEFER#4 H_DRDY#4 H_DBSY#4
H_LOCK#4 H_RESET#4,14
H_TRDY#4 H_HIT#4 H_HITM#4
3 3
+1.05VS
24.9_0402_1%
49.9_0402_1%
220P_0402_50V9J
Place C close to Ball H22
H_DPWR#4
4 4
CPU_VREF Trace=12Mil Space=15Mil
CPU_VREF
CPU_D0# CPU_D1# CPU_D2# CPU_D3# CPU_D4# CPU_D5# CPU_D6# CPU_D7# CPU_D8#
CPU_D9# CPU_D10# CPU_D11# CPU_D12# CPU_D13#
DATA GROUP 0
CPU_D14# CPU_D15#
CPU_DBI0# CPU_DSTBN0# CPU_DSTBP0#
CPU_D16# CPU_D17# CPU_D18# CPU_D19# CPU_D20# CPU_D21# CPU_D22# CPU_D23# CPU_D24# CPU_D25# CPU_D26# CPU_D27# CPU_D28#
DATA GROUP 1
CPU_D29# CPU_D30# CPU_D31#
CPU_DBI1# CPU_DSTBN1# CPU_DSTBP1#
CPU_D32# CPU_D33# CPU_D34# CPU_D35# CPU_D36# CPU_D37# CPU_D38# CPU_D39# CPU_D40# CPU_D41# CPU_D42# CPU_D43# CPU_D44# CPU_D45# CPU_D46# CPU_D47#
DATA GROUP 2
CPU_DBI2# CPU_DSTBN2# CPU_DSTBP2#
CPU_D48# CPU_D49# CPU_D50# CPU_D51# CPU_D52# CPU_D53# CPU_D54# CPU_D55# CPU_D56# CPU_D57# CPU_D58# CPU_D59# CPU_D60# CPU_D61# CPU_D62# CPU_D63#
DATA GROUP
3
CPU_DBI3# CPU_DSTBN3# CPU_DSTBP3#
B
H_D#[0..63] 4 H_DINV#[0..3] 4 H_DSTBN#[0..3] 4 H_DSTBP#[0..3] 4
H_D#0
E28
H_D#1
D28
H_D#2
D29
H_D#3
C29
H_D#4
D30
H_D#5
C30
H_D#6
B29
H_D#7
C28
H_D#8
C26
H_D#9
B25
H_D#10
B27
H_D#11
C25
H_D#12
A27
H_D#13
C24
H_D#14
A24
H_D#15
B26
H_DINV#0
C27
H_DSTBN#0
A28
H_DSTBP#0
B28
H_D#16
C19
H_D#17
C23
H_D#18
C20
H_D#19
C22
H_D#20
B22
H_D#21
B23
H_D#22
C21
H_D#23
B24
H_D#24
E21
H_D#25
B21
H_D#26
B20
H_D#27
G19
H_D#28
F21
H_D#29
B19
H_D#30
E20
H_D#31
D21
H_DINV#1
A21
H_DSTBN#1
D22
H_DSTBP#1
E22
H_D#32
C18
H_D#33
F19
H_D#34
E19
H_D#35
A18
H_D#36
D19 B18 C17 B17 E17 B16 C15 A15 B15 F16 G18 F18 C16 D18 E18
E16 D16 C14 B14 E15 D15 C13 E14 F13 B13 A12 C12 E12 D13 D12 B12 E13 F15 G15
H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46
H_D#47 H_DINV#2 H_DSTBN#2 H_DSTBP#2
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63 H_DINV#3 H_DSTBN#3 H_DSTBP#3
+1.2VS
SB_A_RXN0
SB_A_RXP0
SB_A_RXN1
SB_A_RXP1 NB_A_RXN0 NB_A_RXP0 NB_A_RXN1 NB_A_RXP1
Place R Close to Ball
C430 0.1U_0402_10V6K
C427 0.1U_0402_10V6K
CLK_NB_ALINK#11 CLK_NB_ALINK11
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
ATI recommendation R40, R41
PCE_RXISET
R2910K_0402_1%
12
PCE_TXISET
R348.25K_0402_1%
12
PCE_NCAL
R3382.5_0402_1%
12
PCE_PCAL
R28150_0402_1%
12
C432
1 2
C429
1 2
0.1U_0402_10V6K
0.1U_0402_10V6K
SB_A_RXN[0..1] SB_A_RXP[0..1]
NB_A_RXN[0..1] NB_A_RXP[0..1]
1 2
1 2
To SB A-PCIE Link
2005/03/01 2006/03/01
C
J4 J5
L4
K4 L5
L6
M4 M5
P4 N4
P5 P6
R4 R5
T3 T4
U5 U6
V4 V5
W3 W4
Y5 Y6
AA4 AA5
AB3 AB4
AC5 AC6
AD4 AD5
10 mils 10 mils 10 mils
10 mils
NB_A_TXN0 NB_A_TXP0 NB_A_TXN1 NB_A_TXP1
AJ12 AK13 AG12 AH12
AJ11
AJ10 AK10
AK9
AG10
AG9
AF10
AE9
L2 K2
SB_A_RXN[0..1] 14 SB_A_RXP[0..1] 14
NB_A_RXN[0..1] 14 NB_A_RXP[0..1] 14
Deciphered Date
U21C
GFX_RX0N GFX_RX0P
GFX_RX1N GFX_RX1P
GFX_RX2N GFX_RX2P
GFX_RX3N GFX_RX3P
GFX_RX4N GFX_RX4P
GFX_RX5N GFX_RX5P
GFX_RX6N GFX_RX6P
GFX_RX7N GFX_RX7P
GFX_RX8N GFX_RX8P
GFX_RX9N GFX_RX9P
GFX_RX10N GFX_RX10P
GFX_RX11N GFX_RX11P
GFX_RX12N GFX_RX12P
GFX_RX13N GFX_RX13P
GFX_RX14N GFX_RX14P
GFX_RX15N GFX_RX15P
PCE_ISET PCE_TXISET PCE_NCAL PCE_PCAL
SB_TX0N SB_TX0P SB_TX1N SB_TX1P
SB_RX0N SB_RX0P SB_RX1N SB_RX1P
SB_CLKN SB_CLKP
D
PART 3 OF 6
PCI EXPRESS I/F
RC410MD
A-LINK EXPRESS I/F
216CPP4AKA21HK_BGA707
D
E
N2
GFX_TX0N
N1
GFX_TX0P
R2
GFX_TX1N
P2
GFX_TX1P
T1
GFX_TX2N
R1
GFX_TX2P
U2
GFX_TX3N
T2
GFX_TX3P
V1
GFX_TX4N
V2
GFX_TX4P
W2
GFX_TX5N
W1
GFX_TX5P
AA2
GFX_TX6N
Y2
GFX_TX6P
AB1
GFX_TX7N
AA1
GFX_TX7P
AC2
GFX_TX8N
AB2
GFX_TX8P
AD1
GFX_TX9N
PCI EXPRESS I/F
GFX_TX10N GFX_TX10P
GFX_TX11N GFX_TX11P
GFX_TX12N GFX_TX12P
GFX_TX13N GFX_TX13P
GFX_TX14N GFX_TX14P
GFX_TX15N GFX_TX15P
GPP_TX0N/SB_TX2N GPP_TX0P/SB_TX2P GPP_TX1N/SB_TX3N GPP_TX1P/SB_TX3P
GPP_RX0N/SB_RX2N GPP_RX0P/SB_RX2P GPP_RX1N/SB_RX3N GPP_RX1P/SB_RX3P
AD2
GFX_TX9P
AE2 AE1
AG2 AF2
AH1 AG1
AJ2 AH2
AJ4 AJ3
AJ5 AK4
M1
GFX_CLKN
M2
GFX_CLKP
AJ9 AJ8 AF6 AE6 AK6
GPP_TX2N
AJ6
GPP_TX2P
AF4
GPP_TX3N
AE4
GPP_TX3P
AG8 AF8 AG7 AG6 AJ7
GPP_RX2N
AK7
GPP_RX2P
AH4
GPP_RX3N
AG4
GPP_RX3P
Compal Electronics, Inc.
Title
RC410MD-FSB, PCIE,A-PCIE
Size Document Number Rev
HAZ00/BL10E (LA2861) 1.0
B
Monday, August 08, 2005
Date: Sheet
E
642
of
Page 7
A
DDR_DQ[0..63] DDR_DQS[0..7] DDR_DQS#[0..7] DDR_DM[0..7]
DDR_SMA[0..17]
1 1
+1.8V
12
R42
1
C172
1K_0603_1%
1K_0603_1%
2 2
+1.8V
R242
12
***
61.9_0603_1%
R237
12
3 3
C435
61.9_0603_1%
Place these R and C close to relative Ball.
FSB SPEED
100MHZ
133MHZ
4 4
2
0.1U_0402_10V6K
12
R46
1
C174
2
0.1U_0402_10V6K
MEM_COMPN MEM_COMPP
1
1
C450
2
2
0.47U_0603_10V7K
NB STRAPING PINS
BM_REQ# NB_CRT_HSYNC NB_CRT_VSYNC
0 0
BM_REQ#
NB_CRT_HSYNC
NB_CRT_VSYNC
DDR_DQ[0..63] 9,10 DDR_DQS[0..7] 9,10 DDR_DQS#[0..7] 9,10 DDR_DM[0..7] 9,10
DDR_SMA[0..17] 9,10
DDR_SRAS#9,10 DDR_SCAS#9,10 DDR_SWE#9,10
DDR_CLK0#9 DDR_CLK09
DDR_CLK1#9 DDR_CLK19
DDR_CLK3#10
+DDR_VREF
DDR_CLK310 DDR_CLK4#10
DDR_CLK410
DDR_SCKE09 DDR_SCKE19 DDR_SCKE29,10 DDR_SCKE39,10
DDR_SCS#09 DDR_SCS#19 DDR_SCS#29,10 DDR_SCS#39,10 DDR_ODT09 DDR_ODT19,10 DDR_ODT29 DDR_ODT39,10
MEM_VMODE: 1.8V: DDR2
MEM_CAP1 MEM_CAP2
0.47U_0603_10V7K
0 0
R223 4.7K_0402_5%@
1 2
R222 4.7K_0402_5%
1 2
R20 4.7K_040 2_5%
1 2
R228
1 2
4.7K_0402_5%
MMBT3904_SOT23
A
R43 1K_0402_5%
+1.8V
0 1
+3VS
12
R227
4.7K_0402_5%
Q35
3 1
1 2
MEM_CAP1 MEM_CAP2 MEM_COMPP MEM_COMPN +DDR_VREF
R229
2
4.7K_0402_5%
DDR_SMA0 DDR_SMA1 DDR_SMA2 DDR_SMA3 DDR_SMA4 DDR_SMA5 DDR_SMA6 DDR_SMA7 DDR_SMA8 DDR_SMA9 DDR_SMA10 DDR_SMA11 DDR_SMA12 DDR_SMA13 DDR_SMA14 DDR_SMA15 DDR_SMA16 DDR_SMA17
DDR_SCS#0 DDR_SCS#1 DDR_SCS#2 DDR_SCS#3
DDR_ODT0 DDR_ODT1
DDR_ODT2 DDR_ODT3
DDR_DQS#0 DDR_DQS0
DDR_DQS#1 DDR_DQS1
DDR_DQS#2 DDR_DQS2
DDR_DQS#3 DDR_DQS3
DDR_DQS#4 DDR_DQS4
DDR_DQS#5 DDR_DQS5
DDR_DQS#6 DDR_DQS6
DDR_DQS#7 DDR_DQS7
+3VS
12
10mil 10mil 10mil 10mil 20mil
U21B
AK27
MEM_A0
AJ27
MEM_A1
AH26
MEM_A2
AJ26
MEM_A3
AH25
MEM_A4
AJ25
MEM_A5
AH24
MEM_A6
AH23
MEM_A7
AJ24
MEM_A8
AJ23
MEM_A9
AH27
MEM_A10
AH22
MEM_A11
AJ22
MEM_A12
AF28
MEM_A13
AJ21
MEM_A14
AG27
MEM_A15
AJ28
MEM_A16
AH21
MEM_A17
AJ29
MEM_RAS#
AG28
MEM_CAS#
AH30
MEM_WE#
AC26
MEM_CK0N
AC25
MEM_CK0P
AF16
MEM_CK1N
AE16
MEM_CK1P
V29
MEM_CK2N
V30
MEM_CK2P
AC24
MEM_CK3N
AC23
MEM_CK3P
AG17
MEM_CK4N
AF17
MEM_CK4P
W29
MEM_CK5N
W28
MEM_CK5P
AH20
MEM_CKE0
AJ20
MEM_CKE1
AE24
MEM_CKE2
AE21
MEM_CKE3
AH29
MEM_CS#0
AG29
MEM_CS#1
AH28
MEM_CS#2
AF29
MEM_CS#3
AG30
MEM_ODT0
AE28
MEM_ODT1
AC30
MEM_ODT2/RSV2
Y30
MEM_ODT3/RSV3
AD28
MEM_VMODE
AJ14
MEM_CAP1
N30
MEM_CAP2
AJ15
MEM_COMPP
AE29
MEM_COMPN
AB27
MEM_VREF
AH17
MEM_DQS0N
AJ18
MEM_DQS0P
AF15
MEM_DQS1N
AE14
MEM_DQS1P
AE22
MEM_DQS2N
AF22
MEM_DQS2P
AF26
MEM_DQS3N
AE25
MEM_DQS3P
W26
MEM_DQS4N
W27
MEM_DQS4P
AB30
MEM_DQS5N
AB29
MEM_DQS5P
R25
MEM_DQS6N
P25
MEM_DQS6P
R30
MEM_DQS7N
R29
MEM_DQS7P
CPU_BSEL0 5,11
B
PART 2 OF
6
ADDRESS
MEMORY I/F
RC410MD
DATA CLKMISC
216CPP4AKA21HK_BGA707
STRP_DATA
NB_DDC_CLK
MMBT3904_SOT23
B
DATA
4.7K_0402_5%
4.7K_0402_5%@
Q5
3 1
MEM_DQ0 MEM_DQ1 MEM_DQ2 MEM_DQ3 MEM_DQ4 MEM_DQ5 MEM_DQ6 MEM_DQ7 MEM_DQ8
MEM_DQ9 MEM_DQ10 MEM_DQ11 MEM_DQ12 MEM_DQ13 MEM_DQ14 MEM_DQ15 MEM_DQ16 MEM_DQ17 MEM_DQ18 MEM_DQ19 MEM_DQ20 MEM_DQ21 MEM_DQ22 MEM_DQ23 MEM_DQ24 MEM_DQ25 MEM_DQ26 MEM_DQ27 MEM_DQ28 MEM_DQ29 MEM_DQ30 MEM_DQ31 MEM_DQ32 MEM_DQ33 MEM_DQ34 MEM_DQ35 MEM_DQ36 MEM_DQ37 MEM_DQ38 MEM_DQ39 MEM_DQ40 MEM_DQ41 MEM_DQ42 MEM_DQ43 MEM_DQ44 MEM_DQ45 MEM_DQ46 MEM_DQ47 MEM_DQ48 MEM_DQ49 MEM_DQ50 MEM_DQ51 MEM_DQ52 MEM_DQ53 MEM_DQ54 MEM_DQ55 MEM_DQ56 MEM_DQ57 MEM_DQ58 MEM_DQ59 MEM_DQ60 MEM_DQ61 MEM_DQ62 MEM_DQ63
MEM_DM0
MEM_DM1
MEM_DM2
MEM_DM3
MEM_DM4
MEM_DM5
MEM_DM6
MEM_DM7
R225
1 2
R220
1 2
1 2
2
2K_0402_5%
R11
C
AJ16 AH16 AJ19 AH19 AH15 AK16 AH18 AK19 AF13 AF14 AE19 AF19 AE13 AG13 AF18 AE17 AF20 AF21 AG23 AF24 AG19 AG20 AG22 AF23 AD25 AG25 AE27 AD27 AE23 AD24 AE26 AD26 AA25 Y26 W24 U25 AA26 Y25 V26 W25 AC28 AC29 AA29 Y29 AD30 AD29 AA30 Y28 U27 T27 N26 M27 U26 T26 P27 P26 U29 T29 P29 N29 U28 T28 P28 N27
AJ17 AG15 AE20 AF25 Y27 AB28 R26 R28
DDR_DQ0 DDR_DQ1 DDR_DQ2 DDR_DQ3 DDR_DQ4 DDR_DQ5 DDR_DQ6 DDR_DQ7 DDR_DQ8 DDR_DQ9 DDR_DQ10 DDR_DQ11 DDR_DQ12 DDR_DQ13 DDR_DQ14 DDR_DQ15 DDR_DQ16 DDR_DQ17 DDR_DQ18 DDR_DQ19 DDR_DQ20 DDR_DQ21 DDR_DQ22 DDR_DQ23 DDR_DQ24 DDR_DQ25 DDR_DQ26 DDR_DQ27 DDR_DQ28 DDR_DQ29 DDR_DQ30 DDR_DQ31 DDR_DQ32 DDR_DQ33 DDR_DQ34 DDR_DQ35 DDR_DQ36 DDR_DQ37 DDR_DQ38 DDR_DQ39 DDR_DQ40 DDR_DQ41 DDR_DQ42 DDR_DQ43 DDR_DQ44 DDR_DQ45 DDR_DQ46 DDR_DQ47 DDR_DQ48 DDR_DQ49 DDR_DQ50 DDR_DQ51 DDR_DQ52 DDR_DQ53 DDR_DQ54 DDR_DQ55 DDR_DQ56 DDR_DQ57 DDR_DQ58 DDR_DQ59 DDR_DQ60 DDR_DQ61 DDR_DQ62 DDR_DQ63
DDR_DM0 DDR_DM1 DDR_DM2 DDR_DM3 DDR_DM4 DDR_DM5 DDR_DM6 DDR_DM7
NB_LUMA12
NB_CRMA12
1 2
R27 75_0402_1%
NB_CRT_R13 NB_CRT_G13 NB_CRT_B13
NB_CRT_HSYNC13
NB_CRT_VSYNC13
1 2
R232 715_0402_1%
NB_DDC_CLK13 NB_DDC_DATA13
CLK_NB_14M11
CLK_NB_BCLK11 CLK_NB_BCLK#11
NB_EDID_CLK12
NB_EDID_DATA12
R230
1 2
Low: Normal Mode(Fixed) High: Test Mode
R219
1 2
4.7K_0402_5% R226
1 2
+3VS
4.7K_0402_5% R23
1 2
4.7K_0402_5%@
C422
12
15P_0402_50V8D@
10_0402_5%
R217 10K_0402_5%
NB_EDID_CLK NB_EDID_DATA NB_DVI_DDCDATA STRP_DATA TESTMODE
4.7K_0402_5%
NB_EDID_CLK
NB_EDID_DATA
NB_DVI_DDCDATA
U19
1
NC
2
A1
3
A2
4
VSS
AT24C04N-10SI-2.7_SO8~D@
NB_COMPS
NB_DDC_CLK NB_DDC_DATA
12
1 2
0.1U_0402_10V6K@
VCC
SDA
RSET
15mil
R218
WP
SCL
C420
8 7 6 5
F9 D9 E9
F10 E10 D10
C3 B3
B10
B2 C2
G1
F1 G2
J1
K1
D2 C1 H3 D1 C4
AH13
AJ13
R22
1 2
4.7K_0402_5%
2
1
**
+3VS
STRP_DATA: DEBUG STRAP DEFAULT: 1 0: MEMORY CHA NNEL STRAPING 1: E2PROM STRAPING
NB_DDC_CLK: CPU VCC SEL DEFAULT: 1 1: DESKTOP CPU 0: MOBILE CPU
SB_PWRGD# 16
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2005/03/01 2006/03/01
Compal Secret Data
Deciphered Date
U21D
Y C COMP
RED GREEN BLUE
DACHSYNC DACVSYNC
RSET DACSCL
DACSDA
OSCIN
OSCOUT TVCLKIN CPU_CLKP
CPU_CLKN
I2C_CLK I2C_DATA DDC_DATA STRP_DATA TESTMODE THERMALDIODE_P THERMALDIODE_N
+3VS
12
R214
1K_0402_5%@
NB_EDID_CLK STRP_DATA
D
CRT & TV
I/F
CLK. GEN.
216CPP4AKA21HK_BGA707
LVDS_ENBKL
LVDS_ENVDD
D
PART 4 OF 6
RC410MD
SUS_STAT#
NB_PWRGD
E
TXCLK_UN TXCLK_UP
TXCLK_LN TXCLK_LP
BMREQ#
TMDS_HPD
+1.8V
R236
4.7K_0402_5%
1 2
+3VALW
14
U5A
P
A
O
B
G
SN74LVC08APW_TSSOP14
7
B4 A4 B5 C6 B6 A6 B7 A7 F7 F8
E5 F5 D5 C5 E6 D6 E7 E8 G6 F6
G3 E2 F2
A3 AH14 E3
H2
J2
3
2 1
2 1
LVDS_ENBKL LVDS_ENVDD
NB_TXOUT0­NB_TXOUT0+ NB_TXOUT1­NB_TXOUT1+ NB_TXOUT2­NB_TXOUT2+
NB_TXCLK­NB_TXCLK+
1 2 1 2
NB_RST# SUS_STAT# NB_PWRGD
BM_REQ#
12
R216
10K_0402_5%
D21
CH751H-40_SC76 D20
NB_RST#
CH751H-40_SC76
ENBKL 28
NB_TXOUT0- 12 NB_TXOUT0+ 12 NB_TXOUT1- 12 NB_TXOUT1+ 12 NB_TXOUT2- 12 NB_TXOUT2+ 12
NB_TXCLK- 12 NB_TXCLK+ 12
R21 4.7K_0402_5%@ R224
NB_RST# 14 NB_PWRGD 16
BM_REQ# 14
4.7K_0402_5%@
NB_SUS_STAT# 15
LVDS
POWERGOOD
TXOUT_U0N TXOUT_U0P TXOUT_U1N TXOUT_U1P TXOUT_U2N TXOUT_U2P TXOUT_U3N TXOUT_U3P
TXOUT_L0N TXOUT_L0P TXOUT_L1N TXOUT_L1P TXOUT_L2N TXOUT_L2P TXOUT_L3N TXOUT_L3P
LVDS_BLON
LVDS_DIGON
LVDS_BLEN
SYSRESET# SUS_STAT#
1 2
***
+3VALW
14
U5B
4
P
A
6
O
5
B
G
SN74LVC08APW_TSSOP14
7
Compal Electronics, Inc.
Title
RC410MD-DDR/DISP/MISC
Size Document Number Re v
Date: Sheet
HAZ00/BL10E (LA2861) 1.0
Custom
Monday, August 08, 2005
NB_ENVDD 12
E
742
of
Page 8
A
C53
220U_D_6.3VM
0.1U_0402_16V4Z
+1.05VS
1
2
0.1U_0402_16V4Z
1
+
2
C47
1
2
+1.2VS
0.1U_0402_16V4Z
+AVDDQ
1
C57
2
1U_0402_6.3V4Z
C650
22U_1206_6.3V6M
1
2
A
5A
+1.05VS
5A
+AVDD
2
C46
+CPVDD +MPVDD
1
1U_0402_6.3V4Z
ATI recommend 2.2uF
1
C29
0.1U_0402_16V4Z
2
+LPVDD
1
C30
C33
1U_0402_6.3V4Z
2
10U_0805_10V4Z
+1.2VS
M13 M15 M17 M19 N12 N14 N16 N18 P13 P15 P17 P19 R12 R14 R16 R18 T13 T15 T17 T19 U12 U14 U16 U18 V13 V15 V17
V19 W12 W14 W16 W18
A10
F11
F12
F17
G11
G12
G13
G14
G16
G17
G20
H11
H12
H13
H14
H16
H17
H19
H23
H24
L23
L24
N23
P23
P24
C9
B8
D8
H21
AB26
1
C44
2
L6
1 2
CHB2012U170_0805
U21E
VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE
VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU
AVDD AVDDQ
AVDDDI CPVDD
MPVDD
+AVDD
1
C32
1U_0402_6.3V4Z
2
L5
+1.8VS
1 2
CHB2012U170_0805
CORE PWR
216CPP4AKA21HK_BGA707
+1.8VS
1 2
C65 10U_0805_10V4Z
1 2
C64 10U_0805_10V4Z
1 2
C75 0.1U_0402_16V4Z
1 2
C107 0.1U_0402_16V4Z
1 2
C88 0.1U_0402_16V4Z
1 2
C90 0.1U_0402_16V4Z
1 2
C104 0.1U_0402_16V4Z
1 1
1 2
C73 0.1U_0402_16V4Z
1 2
C74 0.1U_0402_16V4Z
1 2
C105 0.1U_0402_16V4Z
1 2
C36 0.1U_0402_16V4Z
1 2
C55 0.1U_0402_16V4Z
1 2
C89 0.1U_0402_16V4Z
1 2
C71 0.1U_0402_16V4Z
1 2
C106 0.1U_0402_16V4Z
1 2
C49 0.1U_0402_16V4Z
1 2
C50 0.1U_0402_16V4Z
1 2
C79 10U_0805_10V4Z
1 2
C118 10U_0805_10V4Z
1 2
C80 0.1U_0402_16V4Z
2 2
1 2
C100 0.1U_0402_16V4Z
1 2
C131 0.1U_0402_16V4Z
1 2
C91 0.1U_0402_16V4Z
1 2
C69 0.1U_0402_16V4Z
1 2
C133 0.1U_0402_16V4Z
1 2
C150 0.1U_0402_16V4Z
1 2
C151 0.1U_0402_16V4Z
1 2
C92 0.1U_0402_16V4Z
1 2
C95 0.1U_0402_16V4Z
1 2
C99 0.1U_0402_16V4Z
1 2
C144 0.1U_0402_16V4Z
1 2
C59 0.1U_0402_16V4Z
Place C between Ball D8,C8
+1.8VS
3 3
4 4
L8
1 2
CHB1608U301_0603
C48
C54
1
1
2
2
0.1U_0402_16V4Z
B
PART 5 OF
6
POWER
RC410MD
+3VS
1
+
C289 470U_D2_2.5VM
2
B
MEM I/F PWR
CPU I/F
VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM
PWR
+CPVDD
LVDDR18D LVDDR18A LVDDR18A
C137
0.1A
VDD_18 VDD_18 VDD_18 VDD_18
VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12
0.75A
VDDA_18 VDDA_18 VDDA_18 VDDA_18 VDDA_18 VDDA_18 VDDA_18 VDDA_18 VDDA_18 VDDA_18 VDDA_18
VDDR3 VDDR3
LPVDD
PLLVDD
1
C648
10U_0805_10V4Z
2
1
C138
2
10U_0805_10V4Z
+1.8V
2A
AB23 AB24 AC13 AC16 AC19 AC21 AC22 AD13 AD16 AD19 AD21 AD22 AD23 AK21 AK24 AK28 T23 T24 V23 V24 Y23 Y24
AB22 AB9 J22 J9
2.25A
AB7 AC7 AC8 AD9 H4 H5 J6 K6 L7 L8 M7 M8 P7 P8 T7 T8 W7 W8
AB8 AC10 AC9 AD10 AE11 AF11 AG11 U7 U8 Y7 Y8
0.1A
G4 G5 J8 C7 H7 H8 H10
0.1U_0402_16V4Z
1
2
1
1
2
2
1U_0402_6.3V4Z
C
**
1 2
C87 0.1U_0402_16V4Z
1 2
C103 0.1U_0402_16V4Z
1 2
C149 0.1U_0402_16V4Z
L4
1 2
CHB1608U301_0603
+1.2VS
+VDDQ +LPVDD
+PLLVDD
C649
L11
1 2
CHB1608U301_0603
C114
0.1U_0402_16V4Z
1 2
C134 0.1U_0402_16V4Z
1 2
C135 0.1U_0402_16V4Z
1 2
C58 0.1U_0402_16V4Z
1 2
C67 0.1U_0402_16V4Z
1 2
C31 10U_0805_10V4Z
1 2
C28 10U_0805_10V4Z
L7
1 2
CHB1608U301_0603
1 2
C70 0.1U_0402_16V4Z
1 2
C56 1U_0402_6.3V4Z
1 2
C68 0.1U_0402_16V4Z
1 2
C63 0.1U_0402_16V4Z
1 2
C62 0.1U_0402_16V4Z
1 2
C51 0.1U_0402_16V4Z
1 2
C45 10U_0805_10V4Z
20mils
20mils
ATI recommend separate pure power
20mils
1 2
CHB2012U170_0805
1
C37
0.1U_0402_16V4Z
2
1
C158
2
+1.8VS
+3VS+VDDQ
L37
+1.8VS
1U_0402_6.3V4Z
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
C
+1.8V
1 2
C115 10U_0805_10V4Z
1 2
C72 10U_0805_10V4Z
1 2
C119 10U_0805_10V4Z
1 2
C93 10U_0805_10V4Z
1 2
C166 0.1U_0402_16V4Z
1 2
C76 0.1U_0402_16V4Z
1 2
C124 0.1U_0402_16V4Z
1 2
C152 0.1U_0402_16V4Z
1 2
C132 0.1U_0402_16V4Z
1 2
C117 0.1U_0402_16V4Z
1 2
C122 0.1U_0402_16V4Z
1 2
C139 0.1U_0402_16V4Z
1 2
C110 0.1U_0402_16V4Z
1 2
C86 0.1U_0402_16V4Z
1 2
C77 0.1U_0402_16V4Z
1 2
C130 0.1U_0402_16V4Z
1 2
C129 0.1U_0402_16V4Z
+1.8VS
C641
10U_0805_10V4Z
2005/03/01 2006/03/01
1 2
C141 0.1U_0402_16V4Z
1 2
C140 0.1U_0402_16V4Z
+1.2VS
1 2
C61 10U_0805_10V4Z
1 2
C418 10U_0805_10V4Z
1 2
C66 10U_0805_10V4Z
1 2
C23 10U_0805_10V4Z
1 2
C417 10U_0805_10V4Z
1 2
C22 1U_0402_6.3V4Z
1 2
C25 1U_0402_6.3V4Z
1 2
C85 0.1U_0402_16V4Z
1 2
C43 0.1U_0402_16V4Z
1 2
C84 0.1U_0402_16V4Z
1 2
C102 0.1U_0402_16V4Z
1 2
C41 0.1U_0402_16V4Z
1 2
C42 0.1U_0402_16V4Z
1 2
C78 0.1U_0402_16V4Z
1 2
C40 0.1U_0402_16V4Z
+
1 2
470U_D2_2.5VM
C414
+
1 2
470U_D2_2.5VM
C15
Place L close to Ball AB26 Place C between Ball AB26,AA27
L12
1 2
CHB1608U301_0603
1
1
1
C175
C159
0.1U_0402_16V4Z
2
2
2
1U_0402_6.3V4Z
Compal Secret Data
Deciphered Date
+1.8VS+MPVDD
D
D
A13 A16 A19
A22 A25 A29
AA23 AA24 AA28 AC11 AC12 AC14 AC15 AC17 AC18 AC20 AC27 AD11 AD12 AD14 AD15 AD17 AD18 AD20 AE30 AF12
AF27 AG14 AG16 AG18 AG21 AG24 AG26 AH11
AJ1
AJ30 AK12 AK15 AK18
AK2 AK22 AK25 AK29
B30
D14
D17
D20
D24
D27
F27
F30
G10
H15
H18
J23
J24
J27
J30
K23
M12 M14 M16 M18 M23 M24 M26 N13 N15 N17 N19 P12 P14 P16 P18
C60
0.1U_0402_16V4Z
E
U21F
VSS VSS VSS
A2
VSS VSS VSS VSS
A9
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
B1
VSS VSS VSS VSS VSS VSS VSS
D3
VSS
D4
VSS VSS
F3
VSS VSS
F4
VSS VSS VSS VSS VSS VSS VSS
J3
VSS VSS VSS
K8
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
216CPP4AKA21HK_BGA707
+PLLVDD
1
1
2
C81
1U_0402_6.3V4Z
2
Title
RC410MB PWR/GND
Size Document Number Rev
HAZ00/BL10E (LA2861) 1.0
Custom
Date: Sheet
PART 6 OF 6
GOUNDRC410MD
+1.8VS
L10
1 2
CHB1608U301_0603
1
C82
10U_0805_10V4Z
2
Compal Electronics, Inc.
Thursday, August 04, 2005
E
R13
VSS
R15
VSS
R17
VSS
R19
VSS
R23
VSS
R24
VSS
R27
VSS
T12
VSS
T14
VSS
T16
VSS
T18
VSS
T30
VSS
U13
VSS
U15
VSS
U17
VSS
U19
VSS
U23
VSS
U24
VSS
V12
VSS
V14
VSS
V16
VSS
V18
VSS
V27
VSS
V28
VSS
W13
VSS
W15
VSS
W17
VSS
W19
VSS
W23
VSS
W30
VSS
AA3
VSSA
AA7
VSSA
AA8
VSSA
AB5
VSSA
AB6
VSSA
AC3
VSSA
AD3
VSSA
AD7
VSSA
AD8
VSSA
AE8
VSSA
AF3
VSSA
AF5
VSSA
AF7
VSSA
AF9
VSSA
AG5
VSSA
AH10
VSSA
AH3
VSSA
AH5
VSSA
AH6
VSSA
AH7
VSSA
AH8
VSSA
AH9
VSSA
K5
VSSA
L3
VSSA
M3
VSSA
N5
VSSA
N6
VSSA
N7
VSSA
N8
VSSA
P3
VSSA
R3
VSSA
R7
VSSA
R8
VSSA
T5
VSSA
T6
VSSA
U3
VSSA
V3
VSSA
V7
VSSA
V8
VSSA
W5
VSSA
W6
VSSA
Y3
VSSA
C10
AVSSN
B9
AVSSQ
C8
AVSSDI
J7
LPVSS
G7
LVSSR
G8
LVSSR
G9
LVSSR
H9
PLLVSS
H20
CPVSS
AA27
MPVSS
1
C116
10U_0805_10V4Z
2
of
842
Page 9
A
B
C
D
E
F
G
H
12
12
C176 22U_1206_6.3V6M
1
2
+1.8V
R13
1K_0402_5%
R14
1K_0402_5%
C177 22U_1206_6.3V6M
1
2
2
C19
0.1U_0402_16V4Z
1
C18 0.1U_0402_16V4Z
1
2
DDR_SCKE07
DDR_SWE#7,10 DDR_SCAS#7,10
DDR_SCS#17 DDR_ODT27
DDR_DQS#6 DDR_DQS6
DDR_DQ50 DDR_DQ55 DDR_DQ54
DDR_DQ61 DDR_DM7 DDR_DQS#7 DDR_DQ62
SB_SMDATA10,11,15 SB_SMCLK10,11,15
DDR_DQ58
+3VS
Layout Note: Place near JDIM1
+1.8V
1 1
C148
470U_D2_2.5VM
2 2
3 3
4 4
1
+
2
+0.9VS
C447 0.1U_0402_16V4Z
1
2
DDR_SCKE37,10
DDR_SCS#27,10
DDR_ODT37,10
C143 0.1U_0402_16V4Z
1
2
C445 0.1U_0402_16V4Z
1
2
C154 0.1U_0402_16V4Z
C101 0.1U_0402_16V4Z
C162 0.1U_0402_16V4Z
C163 0.1U_0402_16V4Z
C111 0.1U_0402_16V4Z
1
1
2
C439 0.1U_0402_16V4Z
C438 0.1U_0402_16V4Z
1
1
2
2
RP1
1 8 2 7 3 6 4 5
56_1206_8P4R_5%
RP2
1 8 2 7 3 6 4 5
56_1206_8P4R_5%
RP3
1 8 2 7 3 6 4 5
56_1206_8P4R_5%
RP4
1 8 2 7 3 6 4 5
56_1206_8P4R_5%
1
2
C437 0.1U_0402_16V4Z
1
2
+0.9VS
1
2
2
Layout Note: Place one cap close to every 2 pullup resistors terminated to V_DDR_MCH_REF
C443 0.1U_0402_16V4Z
C444 0.1U_0402_16V4Z
1
1
2
2
DDR_SCKE1 DDR_SCKE3 DDR_SCKE2
DDR_SMA17
DDR_SMA9 DDR_SMA2 DDR_SMA5
DDR_SMA15 DDR_SMA0 DDR_SRAS# DDR_SCAS#
DDR_SCS#2 DDR_SMA13 DDR_SCS#1 DDR_ODT3
1
2
C436 0.1U_0402_16V4Z
1
2
1 2
56_0402_5%
C96 0.1U_0402_16V4Z
1
2
C161 0.1U_0402_16V4Z
1
2
RP11
56_1206_8P4R_5% RP12
56_1206_8P4R_5% RP13
56_1206_8P4R_5% RP14
56_1206_8P4R_5%
R40
DDR_SCKE0
45 36
DDR_SMA11DDR_SMA14
27
DDR_SMA12
18
DDR_SMA6DDR_SMA7
45
DDR_SMA8
36
DDR_SMA4
27
DDR_SMA3
18
DDR_SMA10
45
DDR_SMA1
36
DDR_SMA16
27
DDR_SWE#
18
45 36 27 18
C113 0.1U_0402_16V4Z
1
2
C156 0.1U_0402_16V4Z
1
2
DDR_SCS#0 DDR_ODT0 DDR_ODT1 DDR_SCS#3
DDR_ODT2
C145 0.1U_0402_16V4Z
1
2
C94 0.1U_0402_16V4Z
1
2
C642 0.1U_0402_16V4Z
1
2
C83 0.1U_0402_16V4Z
1
1
2
2
DDR_SCKE2 7,10
DDR_ODT1 7,10 DDR_SCS#3 7,10
C136 0.1U_0402_16V4Z
C643 0.1U_0402_16V4Z
1
2
C120 0.1U_0402_16V4Z
1
2
DDR_VREF1
C644 0.1U_0402_16V4Z
1
2
C108 0.1U_0402_16V4Z
C147 0.1U_0402_16V4Z
1
1
2
2
Layout Note: Place these resistor closely JDIM2,all trace length<750 mil
Layout Note: Place these resistor closely JDIM2,all trace length Max=1.3"
+1.8V +1.8V
DDR_VREF1
JP16
1
VREF
3
C185
1
2
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
P-TWO_A5692B-A0G16-P
DIMMA Reverse
DDR_DQ10 DDR_DQ14
DDR_DQS#1
DDR_DQS1 DDR_DQ9
DDR_DQ13 DDR_DQ1
DDR_DQ0
DDR_DQS#0
DDR_DQS0 DDR_DQ3 DDR_DQ6
DDR_DQ2 DDR_DQ7
DDR_DQ16 DDR_DQ20
DDR_DQS#2
DDR_DQS2 DDR_DQ23
DDR_DQ19 DDR_DQ28
DDR_DQ25 DDR_DM3
DDR_DQ26 DDR_DQ27
DDR_SCKE0
DDR_SMA17 DDR_SMA12
DDR_SMA9 DDR_SMA7 DDR_SMA8
DDR_SMA5 DDR_SMA3 DDR_SMA1
DDR_SMA10 DDR_SMA15 DDR_SWE#
DDR_SCAS# DDR_SCS#1
DDR_ODT2 DDR_DQ32
DDR_DQ36
DDR_DQS#4
DDR_DQS4 DDR_DQ38
DDR_DQ35 DDR_DQ45
DDR_DQ40 DDR_DM5
DDR_DQ43 DDR_DQ52
2.2U_0805_10V6K
C187 0.1U_0402_16V4Z
1
2
DQ12 DQ13
CK0# DQ14
DQ15
DQ20 DQ21
DQ22 DQ23
DQ28 DQ29
DQS3#
DQS3 DQ30
DQ31
NC/CKE1
NC/A15 NC/A14
RAS#
ODT0
NC/A13
DQ36 DQ37
DQ38 DQ39
DQ44 DQ45
DQS5#
DQS5 DQ46
DQ47 DQ52
DQ53
CK1#
DQ54 DQ55
DQ60 DQ61
DQS7#
DQS7 DQ62
DQ63
2
VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7 VSS
VSS DM1 VSS CK0
VSS
VSS
VSS
VSS
NC DM2 VSS
VSS
VSS
VSS
VSS VDD
VDD
A11
A7 A6
VDD
A4 A2 A0
VDD
BA1 S0#
VDD
VDD
NC VSS
VSS DM4 VSS
VSS
VSS
VSS
VSS
VSS CK1
VSS DM6 VSS
VSS
VSS
VSS
VSS SAO
SA1
4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DDR_DQ15 DDR_DQ12
DDR_DM1 DDR_DQ8
DDR_DQ11 DDR_DQ4
DDR_DQ5 DDR_DM0 DDR_CLK1
DDR_CLK1#
DDR_DQ17 DDR_DQ21
DDR_DM2 DDR_DQ22
DDR_DQ18 DDR_DQ29
DDR_DQ24 DDR_DQS#3
DDR_DQS3 DDR_DQ30
DDR_DQ31
DDR_SCKE1
DDR_SMA14 DDR_SMA11 DDR_SMA6 DDR_SMA4
DDR_SMA2 DDR_SMA0
DDR_SMA16 DDR_SRAS# DDR_SCS#0
DDR_ODT0 DDR_SMA13
DDR_DQ37 DDR_DQ33
DDR_DM4 DDR_DQ39
DDR_DQ34 DDR_DQ44
DDR_DQ41
DDR_DQS#5
DDR_DQS5 DDR_DQ42DDR_DQ46
DDR_DQ47 DDR_DQ53
DDR_DQ49DDR_DQ48 DDR_CLK0
DDR_CLK0#
DDR_DM6
DDR_DQ51 DDR_DQ60DDR_DQ56
DDR_DQ57
DDR_DQS7 DDR_DQ63
DDR_DQ59
ATI recommendation
+3VS
Trace=20mil
DDR_CLK1 7 DDR_CLK1# 7
DDR_SCKE1 7
DDR_SRAS# 7,10 DDR_SCS#0 7
DDR_ODT0 7
DDR_CLK0 7 DDR_CLK0# 7
DDR_DQ[0..63] DDR_DQS[0..7] DDR_DQS#[0..7] DDR_DM[0..7]
DDR_SMA[0..17]
DDR_DQ[0..63] 7,10 DDR_DQS[0..7] 7,10 DDR_DQS#[0..7] 7,10 DDR_DM[0..7] 7,10
DDR_SMA[0..17] 7,10
Security Cl assification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAI NS
A
B
C
D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITT EN CO NSE NT OF COMPAL ELECTRONICS, INC.
E
2005/03/01 2006/03/01
Compal Secret Data
Deciphered Date
F
Compal Electronics, Inc.
Title
DDRII-SODIMM2
Size Documen t N u mb er Re v
HAZ00/BL10E (LA2861) 1.0
C
Monday, August 08, 2005
Date: Sheet of
G
942
H
Page 10
A
DDR_DQ[0..63]7,9 DDR_DQS[0..7]7, 9
DDR_DQS#[0..7]7,9
1 1
2 2
3 3
DDR_DM[0..7]7,9
DDR_SMA[0..17]7,9
DDR_DQ[0..63] DDR_DQS[0..7] DDR_DQS#[0..7] DDR_DM[0..7] DDR_SMA[0..17]
DDR_SCKE27,9
DDR_SWE#7,9
DDR_SCAS#7,9 DDR_SCS#37,9
DDR_ODT37,9
SB_SMDATA9,11,15 SB_SMCLK9,11,15
B
+3VS
DDR_DQ10 DDR_DQ14
DDR_DQS#1 DDR_DQS1
DDR_DQ9 DDR_DQ13
DDR_DQ1 DDR_DQ0
DDR_DQS#0 DDR_DQS0
DDR_DQ3 DDR_DQ2
DDR_DQ16 DDR_DQ20
DDR_DQS#2 DDR_DQS2
DDR_DQ23 DDR_DQ19
DDR_DQ25 DDR_DM3
DDR_DQ26 DDR_DQ27
DDR_SCKE2
DDR_SMA17 DDR_SMA12
DDR_SMA9 DDR_SMA8
DDR_SMA5 DDR_SMA3 DDR_SMA1
DDR_SMA10 DDR_SMA15 DDR_SWE#
DDR_SCAS# DDR_SCS#3
DDR_ODT3 DDR_DQ32
DDR_DQ36 DDR_DQS#4
DDR_DQS4 DDR_DQ38
DDR_DQ35 DDR_DQ45
DDR_DQ40 DDR_DM5 DDR_DQ46
DDR_DQ43 DDR_DQ52
DDR_DQ48
DDR_DQS#6 DDR_DQS6
DDR_DQ50 DDR_DQ54
DDR_DQ56 DDR_DQ61
DDR_DM7 DDR_DQ62
DDR_DQ58
0.1U_0402_16V4Z
+1.8V +1.8V
DDR_VREF2
Trace=20mil
JP15
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3 VSS DQ8 DQ9 VSS DQS1# DQS1 VSS DQ10 DQ11 VSS
VSS DQ16 DQ17 VSS DQS2# DQS2 VSS DQ18 DQ19 VSS DQ24 DQ25 VSS DM3 NC VSS DQ26 DQ27 VSS CKE0 VDD NC BA2 VDD A12 A9 A8 VDD A5 A3 A1 VDD A10/AP BA0 WE# VDD CAS# NC/S1# VDD NC/ODT1 VSS DQ32 DQ33 VSS DQS4# DQS4 VSS DQ34 DQ35 VSS DQ40 DQ41 VSS DM5 VSS DQ42 DQ43 VSS DQ48 DQ49 VSS NC,TEST VSS DQS6# DQS6 VSS DQ50 DQ51 VSS DQ56 DQ57 VSS DM7 VSS DQ58 DQ59 VSS SDA SCL VDDSPD
DIMMB Reverse
DQ12 DQ13
DQ14 DQ15
DQ20 DQ21
DQ22 DQ23
DQ28 DQ29
DQS3#
DQS3 DQ30
DQ31
NC/CKE1
NC/A15 NC/A14
RAS#
ODT0
NC/A13
DQ36 DQ37
DQ38 DQ39
DQ44 DQ45
DQS5#
DQS5 DQ46
DQ47 DQ52
DQ53
DQ54 DQ55
DQ60 DQ61
DQS7#
DQS7 DQ62
DQ63
1
2
2.2U_0805_10V6K
C186
1
2
C184
21 23 25 27 29 31 33 35 37 39
41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97
99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199
PTI_A5652D-A0G16- P
CK0#
CK1#
C
2
VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7 VSS
VSS DM1 VSS CK0
VSS
VSS
VSS
VSS
NC DM2 VSS
VSS
VSS
VSS
VSS VDD
VDD
A11
A7 A6
VDD
A4 A2
A0 VDD BA1
S0#
VDD
VDD
NC
VSS
VSS DM4 VSS
VSS
VSS
VSS
VSS
VSS CK1
VSS DM6 VSS
VSS
VSS
VSS
VSS SAO SA1
DDR_DQ15
4
DDR_DQ12
6 8
DDR_DM1
10 12
DDR_DQ8
14
DDR_DQ11
16 18
DDR_DQ4
20
DDR_DQ5
22 24
DDR_DM0
26 28
DDR_CLK4
30
DDR_CLK4#
32 34
DDR_DQ6
36
DDR_DQ7
38 40
42
DDR_DQ17
44
DDR_DQ21
46 48 50
DDR_DM2
52 54
DDR_DQ22
56
DDR_DQ18
58 60
DDR_DQ29DDR_DQ28
62
DDR_DQ24
64 66
DDR_DQS#3
68
DDR_DQS3
70 72
DDR_DQ30
74
DDR_DQ31
76 78
DDR_SCKE3
80 82 84
DDR_SMA14
86 88
DDR_SMA11
90
DDR_SMA7
92
DDR_SMA6
94 96
DDR_SMA4
98
DDR_SMA2
100
DDR_SMA0
102 104
DDR_SMA16
106
DDR_SRAS#
108
DDR_SCS#2
110 112
DDR_ODT1
114
DDR_SMA13
116 118 120 122
DDR_DQ37
124
DDR_DQ33
126 128
DDR_DM4
130 132
DDR_DQ39
134
DDR_DQ34
136 138
DDR_DQ44
140
DDR_DQ41
142 144
DDR_DQS#5
146
DDR_DQS5
148 150
DDR_DQ42
152
DDR_DQ47
154 156
DDR_DQ53
158
DDR_DQ49
160 162
DDR_CLK3
164
DDR_CLK3#
166 168
DDR_DM6
170 172
DDR_DQ55
174
DDR_DQ51
176 178
DDR_DQ60
180
DDR_DQ57
182 184
DDR_DQS#7
186
DDR_DQS7
188 190
DDR_DQ63
192
DDR_DQ59
194 196 198 200
DDR_CLK4 7
DDR_CLK4# 7
DDR_SCKE3 7,9
DDR_SRAS# 7,9 DDR_SCS#2 7,9
DDR_ODT1 7,9
DDR_CLK3 7
DDR_CLK3# 7
+3VS
C52
470U_D2_2.5VM
+1.8V
C112 0.1U_0402_16V4Z
1
1
+
2
2
C97 0.1U_0402_16V4Z
1
2
D
Layout Note: Place near JDIM1
C165 0.1U_0402_16V4Z
1
1
2
2
C157 0.1U_0402_16V4Z
1
2
C125 0.1U_0402_16V4Z
C98 0.1U_0402_16V4Z
1
2
DDR_VREF2
C155 0.1U_0402_16V4Z
1
2
C142 0.1U_0402_16V4Z
1
2
12
1K_0402_5%
12
1K_0402_5%
C109 0.1U_0402_16V4Z
1
2
+1.8V
R15
R16
C164 0.1U_0402_16V4Z
1
2
1
C21
0.1U_0402_16V4Z
2
1
C20
0.1U_0402_16V4Z
2
E
C645 0.1U_0402_16V4Z
1
2
C646 0.1U_0402_16V4Z
1
2
C647 0.1U_0402_16V4Z
1
2
4 4
Security Cl assification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAI NS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITT EN CO NSE NT OF COMPAL ELECTRONICS, INC.
C
2005/03/01 2006/03/01
Compal Secret Data
Deciphered Date
D
Compal Electronics, Inc.
Title
DDR-II SODIMM1
Size Documen t N u mb er Re v
HAZ00/BL10E (LA2861) 1.0
C
Monday, August 08, 2005
Date: Sheet
E
of
10 42
Page 11
A
Clock Generator
1 1
1 2
+3VS
KC FBM-L11-201209-221LMAT_0805
L14
1 2
+3VS
CHB1608U301_0603
L33
1 2
+3VS
CHB1608U301_0603
2 2
+CLK_VDD1
10K_0402_5%
CLK_OK15,16
+CLK_VDD1
L16
C497
4.7U_0805_10V4Z
R281
1 2
1
C221
10U_0805_10V4Z
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C203
10U_0805_10V4Z
2
0.1U_0402_16V4Z
1
2
13
D
Q40
2
G
S
2N7002_SOT23
0.1U_0402_16V4Z
1
C188
2
1
C189
2
1
C484
2
0.1U_0402_16V4Z
1
1
C458
C486
2
2
0.1U_0402_16V4Z
1
C190
0.1U_0402_16V4Z
2
22P_0402_50V8J
22P_0402_50V8J
+CLK_VDD1 CPU_STP#4,14,40
1
C485
2
C500
B
0.1U_0402_16V4Z
1
C456
2
+3VS
1 2
C501
12
Y3
1 2
XTALOUT_CLK
14.31818MHZ_20P_6X1430004201
SB_SMCLK9,10,15
SB_SMDATA9 , 10,15
1 2
L13 CHB1608U301_0603
2
2
XTALIN_CLK
C457
10U_0805_10V4Z
12
R269 4.7K_0402_5%@ R255 0_0402_5%
R277 1M_0402_5%@
C182
1
1
12 12
C
1- PLACE ALL THE SERIES TERMINATION RESISTORS AS CLOSE TO CLOCK GEN AS POSSIBLE
2- ROUTE ALL CPUCLK/#, NBCLK/#, ITPCLK/# AND SCR/# ,AS DIFFERENT PAIR RULE
3- PUT DECOUPLING CAPS CLOSE TO CLOCK GEN POWER PIN
U23
45
R260
0.1U_0402_16V4Z
12
VDDCPU
51
VDDPCI
32
VDDATI
35
VDDSRC
14
VDDSRC
21
VDDSRC
3
VDD48
56
VDDREF
39
VDDA
44
GNDCPU
49
GNDPCI
31
GNDATI
36
GNDSRC
26
GNDSRC
20
GNDSRC
15
GNDSRC
5
GND
55
GND
38
GNDA
1
XIN
2
XOUT
6
VTT_PWRGD#/PD
48
CPU_STOP#
7
SCLK
8
SDATA
37
IREF
ICS951413CGLFT_TSSOP56
CPUCLKT0
CPUCLKC0
CPUCLKT1
CPUCLKC1
CPUCLKT2_ITP
CPUCLKC2_ITP
SRCCLKT0
SRCCLKC0 ATIGCLKT0 ATIGCLKC0 ATIGCLKT1 ATIGCLKC1
SRCCLKT3 SRCCLKC3
SRCCLKT4 SRCCLKC4
SRCCLKT5 SRCCLKC5
SRCCLKT6 SRCCLKC6
SRCCLKT7 SRCCLKC7
CLKREQA# CLKREQB#
CK410#/PCICLK0
USB_48MHZ
FS_B/REF1 FS_A/REF0
TEST_SEL/REF2
ICS951413
475_0402_1%
FS_C
47 46 43 42 41 40
34 33 30 29 27 28 24 25 22 23 18 19 16 17 12 13
10 11
50 4
9 53 54 52
CPUCLKT0 CPUCLKC0 CPUCLKT1 CPUCLKC1
SRCCLKT0 SRCCLKC0
SRCCLKT3 SRCCLKC3
10K_0402_5%
FS_C FS_B/REF1 FS_A/REF0 TEST_SEL/REF2
D
R270 33_0402_5%
1 2
R271 33_0402_5%
1 2
R272 33_0402_5%
1 2
R273 33_0402_5%
1 2
R261 33_0402_5%
1 2
R263 33_0402_5%
1 2
R285 33_0402_5%
1 2
R278 33_0402_5%
1 2
R283
12
R284
12
10K_0402_5%
R254 4.7K_0402_5%
1 2 1 2
R268 4.7K_0402_5%@
R266 33_0402_5%
1 2
R252 33_0402_5%
1 2
R267 33_0402_5%
1 2
R265 33_0402_5%
1 2
R256
R257
R258
1 2
1 2
49.9_0402_1%
+CLK_VDD1 +CLK_VDD1
+CLK_VDD1
1 2 1 2 1 2
1 2
12
R279
49.9_0402_1%
49.9_0402_1%
49.9_0402_1%
R282 4.7K_0402_5% R253 4.7K_0402_5% R251 4.7K_0402_5%
R259
1 2
12
R286
49.9_0402_1%
49.9_0402_1%
R264
12
49.9_0402_1%
R262
E
CLK_NB_BCLK 7 CLK_NB_BCLK# 7 CLK_BCLK 4 CLK_BCLK# 4
12
49.9_0402_1%
CPU_BSEL0 5,7 CPU_BSEL1 5
+CLK_VDD1
CLK_SB_14M 15
CLK_14M_SIO 29
CLK_NB_14M 7
CLK_AUDIO_14M 24
CLK_SB_ALINK 14 CLK_SB_ALINK# 14
CLK_NB_ALINK 6 CLK_NB_ALINK# 6
3 3
FS_C FS_B FS_A
10 0
0
CPU SRC PCI REF USB 1 1
100.00
133.33
100.00
100.00
33.33
33.33
14.318
14.318
48.000
48.000
111 --- --- --- --- ---
4 4
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
C
Deciphered Date
Compal Electronics, Inc.
Title
ClockGen ICS 951411
Size Document Number Rev
HAZ00/BL10E (LA2861) 1.0
B
Monday, August 08, 2005
D
Date: Sheet
E
11 42
of
Page 12
A
B
C
D
E
TV-OUT CONNECTOR
Reduce LUMA_1 and CRMA_1 length As short as possible
1
1
C223
82P_0402_50V8J
2
D8
2
DAN217_SC59@
LUMA_2 CRMA_2
3
1
C200
2
1 1
22P_0402_50V8J
C204
1 2
NB_LUMA7
NB_CRMA7
R57
75_0603_1%
2 2
12
R59
12
75_0603_1%
NB_LUMA
NB_CRMA
82P_0402_50V8J
+3VS
BKOFF#28
C202
1
C213
2
1 2
R209 10K_0402_5%
D19 CH751H-40_SC76
1 2
L15 CHB1608B121_0603
22P_0402_50V8J
C224
1 2
1 2
L17 CHB1608B121_0603
1
82P_0402_50V8J
2
DISPOFF#
21
220P_0402_50V7K
C410
1 2
D7
2
DAN217_SC59@
82P_0402_50V8J
1
3
1. Y ground
2. C ground
3. Y (luminance+sync)
4. C (crominance)
+3VS
JP18
ALLTO_C10877-104A1-L_4P
1
1
2
5
2
5
3
6
3
6
4
4
JUMP_43X118@
1
1
2
2
PANEL +LCDVDD CTRL CKT
+3VALW
S
Q2
G
2
SI2301BDS_SOT23
D
R9
1 3 12
R7 100_0402_5%
12
R8
1
C13
100K_0402_5%
2
Q34
G
2
+3VS
80mil
S
SI2301BDS_SOT23
D
1 3
80mil
1
C404
4.7U_0805_10V4Z
2
1
2
+LCDVDD
1
2
C411
4.7U_0805_10V4Z
C405
0.1U_0402_16V4Z
+LCDVDD
12
13
D
S
NB_ENVDD
2
G
2N7002_SOT23
12
100K_0402_5%
NB_ENVDD7
R10
2
J1
J4
2
JUMP_43X118@
1
1
470_0402_5%
Q3
+LCDVDD Width: 40mils
0.047U_0402_16V7K
LCD/PANEL BD. Conn.
1
C406
0.1U_0402_16V4Z@
+3VS
+LCDVDD
3 3
0.1U_0402_16V4Z@
4 4
A
C407
1
2
L40 FBM-L11-201209-221LMA30T_0805
1 2
2
1 2
L38 FBM-L11-201209-221LMA30T_0805
NB_EDID_CLK7 NB_EDID_DATA7
DAC_BRIG28 INVT_PWM28
1 2
B+
FBM-L11-201209-221LMA30T_0805
B
NB_EDID_CLK NB_EDID_DATA DAC_BRIG INVT_PWM DISPOFF# NB_TXOUT1+
L39
NB_EDID_CLK
NB_EDID_DATA
JP1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
ACES_88242-3000
1 2
C408 47P_0402_50V8J
1 2
C409 47P_0402_50V8J
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NB_TXCLK­NB_TXCLK+
NB_TXOUT0­NB_TXOUT0+
NB_TXOUT2­NB_TXOUT2+
NB_TXOUT1-
C
NB_TXCLK- 7 NB_TXCLK+ 7
NB_TXOUT0- 7 NB_TXOUT0+ 7
NB_TXOUT2- 7 NB_TXOUT2+ 7
NB_TXOUT1- 7 NB_TXOUT1+ 7
2005/03/01 2006/03/01
Deciphered Date
Compal Electronics, Inc.
Title
TV-OUT, LVDS CONNECTOR
Size Document Number Rev
HAZ00/BL10E (LA2861) 1.0
B
Monday, August 08, 2005
D
Date: Sheet
E
12 42
of
Page 13
5
4
3
2
1
CRT CONNECTOR
D D
1
D2
DAN217_SC59@
2
3
L1
NB_CRT_R7
NB_CRT_G7
NB_CRT_B7
1
1
12
75_0603_1%
+CRT_VCC
U3
12
R3
6P_0402_50V8K
75_0603_1%
1
5
P
OE#
A2Y
G
3
C10
2
6P_0402_50V8K
+CRT_VCC
4
1 2
C11
0.1U_0402_16V4Z
C8
2
A2Y
C C
NB_CRT_HSYNC7
NB_CRT_VSYNC7
B B
75_0603_1%
12
R1
R2
C12
1 2
0.1U_0402_16V4Z
SN74AHCT1G125GW_SOT353-5
1 2
FCM2012C-800_0805
L2
1 2
FCM2012C-800_0805
L3
1 2
FCM2012C-800_0805
1
C5 6P_0402_50V8K
2
R4
1K_0402_5%
1 2
1
5
P
4
OE#
U2
G
SN74AHCT1G125GW_SOT353-5
3
1
C4
2
6P_0402_50V8K@
L29
1 2
CHB1608B121_0603
L30
1 2
CHB1608B121_0603
1
D1
DAN217_SC59@
2
3
1
C6 6P_0402_50V8K@
2
1
C401
68P_0402_50V8K@
2
1
D3
DAN217_SC59@
2
1
C7
2
6P_0402_50V8K@
1
C403 68P_0402_50V8K@
2
+3VS
3
DVI_HSYNC
DVI_VSYNC
+5VS +R_CRT_VCC
D4
2 1
CH491D_SC59
1A_6VDC_MINISMDC110
0.1U_0402_16V4Z
DVI_R
DVI_G
DVI_B
1
C402
2
220P_0402_50V7K
C398
68P_0402_50V8K
F1
21
1
2
+CRT_VCC
1
C400
2
1
C9
2
68P_0402_50V8K
CRT Conn.
JP14
6
11
1 7
12
2 8
13
3 9
14
4 10 15
5
TYCO_1470801-1
R204
1 2
4.7K_0402_5%
R207
1 2
4.7K_0402_5%
Q32
2N7002_SOT23
2N7002_SOT23
1 2
2.2K_0402_5%
2
1 3
D
Q33
R205
G
S
1 3
D
10K_0402_5%
2
G
S
1 2
R206
+3VS+CRT_VCC +3VS+CRT_VCC +3VS
R208
1 2
10K_0402_5%
NB_DDC_DATA 7
NB_DDC_CLK 7
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
3
Deciphered Date
Compal Electronics, Inc.
Title
CRT CONNECTOR
Size Document Number Rev
HAZ00/BL10E (LA2861) 1.0
B
Thursday, A ugus t 04, 2005
2
Date: Sheet
1
13 42
of
Page 14
5
+3VS
8.2K_1206_8P4R_5%
D D
C C
B B
A A
8.2K_1206_8P4R_5%
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
R382 8.2K_0402_5%
1 2
R162 8.2K_0402_5%
1 2
C285 10U_0805_10V4Z C291 10U_0805_10V4Z C552 0.1U_0402_16V4Z C550 0.1U_0402_16V4Z C537 0.1U_0402_16V4Z C562 0.1U_0402_16V4Z C559 0.1U_0402_16V4Z C561 0.1U_0402_16V4Z C558 0.1U_0402_16V4Z C541 0.1U_0402_16V4Z C531 0.1U_0402_16V4Z
SB_32KH0
Y1
18P_0402_50V8J
1
C286
2
32.768KHZ_12.5P_1TJS125DJ2A073
45 36 27 18
RP23
45 36 27 18
RP22
RP25
8.2K_1206_8P4R_5%
8.2K_1206_8P4R_5%
45 36 27 18
RP10 RP8
8.2K_1206_8P4R_5%
RP9
8.2K_1206_8P4R_5%
RP24
8.2K_1206_8P4R_5%
C288
470U_D2_2.5VM
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
R103
1 2
20M_0603_5%
SB_32KHI
4
1
IN
OUT
NC3NC
2
PCI_PIRQD# PCI_PIRQC# PCI_PIRQB# PCI_PIRQA#
PCI_PIRQG# PCI_PIRQH# PCI_PIRQE# PCI_PIRQF#
PCI_REQ#3 PCI_REQ#0 PCI_REQ#2 PCI_REQ#1
PCI_REQ#4 PCI_REQ#5 PCI_GNT#0 PCI_GNT#1
PCI_STOP# PCI_TRDY# PCI_FRAME# PCI_IRDY#
PCI_SERR# PCI_PERR# LOCK# PCI_DEVSEL#
PCI_GNT#5 PCI_GNT#4 PCI_GNT#3 PCI_GNT#2
12
+
***
5
PCI_REQ#6 PCI_GNT#6
18P_0402_50V8J
1
C287
2
+1.8VS
NB_A_RXP06 NB_A_RXN06 NB_A_RXP16 NB_A_RXN16
C313 1U_0402_6.3V4Z C314 10U_0805_10V4Z
C312
0.1U_0402_10V6K
L22 CHB2012U170_0805
+PCIE_VDDR
1 2
R102 20M_0603_5%
1 2
NB_RST#7
CLK_SB_ALINK11
CLK_SB_ALINK#11
***
+1.8VS
L24
1 2
1 2
1 2
1 2
Pull-high on CPU side
+PCIE_VDDR
CHB2012U170_0805
80mA
+PCIE_VDDR
CPU_STP#4 ,11,40
PCI_PIRQA#20,22
PCI_PIRQF#23 PCI_PIRQG#19,23
H_PWRGOOD4
1 2 1 2 1 2 1 2
SB_A_RXP06 SB_A_RXN06 SB_A_RXP16 SB_A_RXN16
PCIE_PVDD
H_INTR4
H_NMI4
H_INIT#4
H_SMI#4
H_CPUSLP#4
H_IGNNE#4
H_A20M#4
H_FERR#4
H_STPCLK#4 DPRSLPVR40
BM_REQ#7 H_RESET#4,6
4
PCI_AD[0..31]18,19,20,22,23
R163 8.2K_0402_5%
1 2
NB_RST#
SB_A_TXP0
C3000.1U_0402_10V6K C3050.1U_0402_10V6K C2950.1U_0402_10V6K C2980.1U_0402_10V6K
50mil trace lenght
SB_A_TXN0
SB_A_TXP1
SB_A_TXN1
Trace width
R108 150_0402_1% R110 150_0402_1%
1 2
R343 4.12K_0603_1%
R167 0_0402_5%
1 2
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_GNT#1 PCI_PIRQH#
SB_32KHI
SB_32KH0
H_PWRGD
H_A20M#
R336
1 2
10K_0402_5%
R317
1 2
0_0402_5%@
12 12
U9A
AH8
A_RST#
L27
PCIE_RCLKP
M27
PCIE_RCLKN
M30
PCIE_TX0P
N30
PCIE_TX0N
K30
PCIE_TX1P
L30
PCIE_TX1N
H30
PCIE_TX2P
J30
PCIE_TX2N
F30
PCIE_TX3P
G30
PCIE_TX3N
M29
PCIE_RX0P
N29
PCIE_RX0N
M28
PCIE_RX1P
N28
PCIE_RX1N
J29
PCIE_RX2P
K29
PCIE_RX2N
J28
PCIE_RX3P
K28
PCIE_RX3N
G27
PCIE_CALRP
H27
PCIE_CALRN
G28
PCIE_CALI
R30
PCIE_PVDD
F26
PCIE_VDDR_1
R29
PCIE_VDDR_2
G26
PCIE_VDDR_3
P26
PCIE_VDDR_4
K26
PCIE_VDDR_5
L26
PCIE_VDDR_6
P28
PCIE_VDDR_7
N26
PCIE_VDDR_8
P27
PCIE_VDDR_9
H28
PCIE_VSS_1
F29
PCIE_VSS_2
H29
PCIE_VSS_3
H26
PCIE_VSS_4
F27
PCIE_VSS_5
G29
PCIE_VSS_6
L29
PCIE_VSS_7
J26
PCIE_VSS_8
L28
PCIE_VSS_9
J27
PCIE_VSS_10
N27
PCIE_VSS_11
M26
PCIE_VSS_12
K27
PCIE_VSS_13
P29
PCIE_VSS_14
P30
PCIE_VSS_15
AJ8
CPU_STP#/DPSLP#
AK7
PCI_STP#
AG5
INTA#
AH5
INTB#
AJ5
INTC#
AH6
INTD#
AJ6
INTE#/GPIO33
AK6
INTF#/GPIO34
AG7
INTG#/GPIO35
AH7
INTH#/GPIO36
B2
X1
B1
X2
C29
CPU_PG/LDT_PG
A28
INTR/LINT0
C28
NMI/LINT1
B29
INIT#
D29
SMI#
E4
SLP#/LDT_STP#
B30
IGNNE#
F28
A20M#
E28
FERR#
E29
STPCLK#/ALLOW_LDTSTP
D25
LDT_PG/SSMUXSEL/GPIO0
E27
DPRSLPVR
D27
BMREQ#
D28
LDT_RST#
CHS-215SB400-02_BGA564
SB400
PCI EXPRESS INTERFACE
PCI INTERFACE
REQ4#/PLL_BP33/PDMA_REQ1#
GNT3#/PLL_BP66/PDMA_GNT0# GNT4#/PLL_BP50/PDMA_GNT1#
XTAL
CPU
RTC_IRQ#/ACPWR_STRAP
RTC
3
PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5 PCICLK6 PCICLK7 PCICLK8 PCICLK9
PCI CLKS
PCICLK_FB
PCIRST# AD0/ROMA18 AD1/ROMA17 AD2/ROMA16 AD3/ROMA15 AD4/ROMA14 AD5/ROMA13 AD6/ROMA12 AD7/ROMA11
AD8/ROMA9
AD9/ROMA8 AD10/ROMA7 AD11/ROMA6 AD12/ROMA5 AD13/ROMA4 AD14/ROMA3 AD15/ROMA2 AD16/ROMD0 AD17/ROMD1 AD18/ROMD2 AD19/ROMD3 AD20/ROMD4 AD21/ROMD5 AD22/ROMD6 AD23/ROMD7
AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
CBE0#/ROMA10
CBE1#/ROMA1
CBE2#/ROMWE#
CBE3#
FRAME#
DEVSEL#/ROMA0
IRDY#
TRDY#/ROMOE#
PAR/ROMA19
STOP# PERR# SERR# REQ0# REQ1# REQ2#
REQ3#/PDMA_REQ0#
REQ5#/GPIO13 REQ6#/GPIO31
GNT0# GNT1# GNT2#
GNT5#/GPIO14 GNT6#/GPIO32
CLKRUN#
LOCK#
LAD0 LAD1 LAD2 LAD3
LFRAME#
LDRQ0#
LPC
LDRQ1#
SERIRQ
RTCCLK
VBAT
RTC_GND
PCI_AD[0..31]
L4 L3 L2 L1 M4 M3 M2 M1 N4 N3 N2
AJ7 W3 Y2 W4 Y3 V1 Y4 V2 W2 AA4 V4 AA3 U1 AA2 U2 AA1 U3 T4 AC1 R2 AD4 R3 AD3 R4 AD2 P2 AE3 P3 AE2 P4 AF2 N1 AF1 V3 AB4 AC2 AE4 T3 AC4 AC3 T2 U4 T1 AB2 AB3 AF4 AF3 AG2 AG3 AH1 AH2 AH3 AJ2 AK2 AJ3 AK3 AG4 AH4 AJ4 AG1 AB1
AG25 AH25 AJ25 AH24 AG24 AH26 AG26
AK27
C2 F3
A2 A1
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
PCI_CLK0_R PCI_CLK1_R PCI_CLK2_R PCI_CLK3_R PCI_CLK4_R PCI_CLK5_R PCI_CLK6_R PCI_CLK7_R PCI_CLK8_R PCICLK9_R PCICLKFB
PCIRST# PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_FRAME# PCI_DEVSEL# PCI_IRDY# PCI_TRDY# PCI_PAR PCI_STOP# PCI_PERR# PCI_SERR# PCI_REQ#0 PCI_REQ#1 PCI_REQ#2 PCI_REQ#3 PCI_REQ#4 PCI_REQ#5 PCI_REQ#6 PCI_GNT#0
PCI_GNT#2 PCI_GNT#3 PCI_GNT#4 PCI_GNT#5 PCI_GNT#6 PM_CLKRUN# LOCK#
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# LPC_DRQ0# LPC_DRQ1#
SERIRQ
RTC_CLK
R340 22_0402_5%
1 2
R333 22_0402_5%
1 2
R117 22_0402_5%
1 2
R118 22_0402_5%
1 2
R354 22_0402_5%
1 2
R344 22_0402_5%
1 2
R349 22_0402_5%
1 2
R124 22_0402_5%
1 2
R365 22_0402_5%
1 2
R363 22_0402_5%
1 2
12
R165
8.2K_0402_5%
PCI_C/BE#0 19,20,22,23 PCI_C/BE#1 19,20,22,23 PCI_C/BE#2 19,20,22,23 PCI_C/BE#3 19,20,22,23 PCI_FRAME# 19,20,22,23 PCI_DEVSEL# 19,20,22,23 PCI_ I RDY# 19,20,22,23 PCI_TRDY # 19,20,22,23 PCI_PAR 19,20,22,23 PCI_STOP# 19,20,22,23 PCI_PERR# 19,20,22,23 PCI_SERR# 19,20,22,23 PCI_REQ#0 22 PCI_REQ#1 19 PCI_REQ#2 20 PCI_REQ#3 23PCI_PIRQB# PCI_REQ#4 PCI_REQ#5
PCI_GNT#0 22 PCI_GNT#1 19 PCI_GNT#2 20 PCI_GNT#3 23
PM_CLKRUN# 19,20,22,23,28
LPC_AD0 28,29 LPC_AD1 28,29 LPC_AD2 28,29 LPC_AD3 28,29 LPC_FRAME# 28,29
LPC_DRQ1#
SERIRQ 20,28,29
RTC_CLK 18
+SB_VBAT
AUTO_ON# 18
Consider
--connect
C563
1 2
PCIRST# 19,20,22,23,28,29
100P_0402_50V8J@
+SB_VBAT
C278
RTC_CLK to EC
2005/03/01 2006/03/01
Compal Secret Data
Deciphered Date
2
CLK_PCI_MINI CLK_PCI_CB CLK_PCI2 CLK_PCI3 CLK_PCI_LAN CLK_PCI_LPC CLK_PCI_1394 CLK_PCI7 CLK_PCI_SIO
Place J1 close to DDR-SODIMM
R87
1 2
470_0805_5%
1
W=20mils
2
1U_0402_6.3V4Z
Size Document Number Re v
Date: Sheet
1
CLK_PCI_MINI 23 CLK_PCI_CB 20 CLK_PCI2 18 CLK_PCI3 18 CLK_PCI_LAN 18,19 CLK_PCI_LPC 18,28
CLK_PCI_1394 18,22 CLK_PCI7 18
CLK_PCI_SIO 18,29
PCI_PAR
R136 8.2K_0402_5%
1 2
LPC_DRQ1# LPC_DRQ0#
SERIRQ
LPC_AD2 LPC_AD1 LPC_AD0 LPC_AD3
PM_CLKRUN#
4 5 3 6 2 7 1 8
RP20 10K_1206_8P4R_5%
4 5 3 6 2 7 1 8
RP21 100K_1206_8P4R_5%
1 2
R151 4.7K_0402_5%
RTC Battery
BATT1
-+
RTCBATT45@
+RTCVCC
R88
1 2
470_0805_5%
1
No short
JOPEN1
1
JUMP_43X39 @
2
2
Compal Electronics, Inc.
Title
1
2
+RTCBATT
+RTCBATT
12
3
C274
0.1U_0402_16V4Z
1
2
PCI_EXP/LPC/RTC
HAZ00/BL10E (LA2861) 1.0
Monday, August 08, 2005
14 42
1
+3VS
D12 BAS40-04_SOT23
+CHGRTC
of
Page 15
5
+3VALW
RP17
1 8 2 7 3 6 4 5
10K_1206_8P4R_5%
D D
+3VS
C C
B B
SB_GA20
SB_KBRST#
MAINPWON_R
A A
RP6
1 8 2 7 3 6 4 5
4.7K_1206_8P4R_5%
R96 4.7K_0402_5%
1 2
R99 10K_0402_5%
1 2
R94 10K_0402_5%
1 2
R326 10K_0402_5%
1 2
R337 10K_0402_5%
1 2
R90 10K_0402_5%
1 2
R385 10K_0402_5%
1 2
R384 10K_0402_5%
1 2
R98 2.2K_0402_5%
1 2
R325 2.2K_0402_5%
1 2
RP7
1 8 2 7 3 6 4 5
10K_1206_8P4R_5%
10K_1206_8P4R_5%
4 5 3 6 2 7 1 8
RP15
D32
2 1
R393
1 2
0_0402_5%
2 1
D31
R392
1 2
0_0402_5%
CH751H-40_SC76
2 1
D11
+3VALW
12
0_0603_5%
R84
R74 10K_0402_5%
1 2 1
C267
0.1U_0402_10V6K
2
5
MASTER_RST# EC_THRM# EC_PME# AC_RST#
EXTEVENT0# PCIE_PME# EC_FLASH# PM_SLP_S5#
EC_SWI# PM_SLP_S3# PBTN_OUT#
**
AGP_BUSY# AGP_STP#
SIO_SMI# SB_GA20
SB_KBRST# SB_SMCLK SB_SMDATA
AC_BITCLK AC_SDIN1 AC_SDIN2 AC_SDIN0
**
CH751H-40_SC76@
CH751H-40_SC76@
X1 48MHZ_4P_FN4800002
4
VDD
1
GND
OE
GPIO12
GPIO8
GPIO11
GPIO9
GATEA20
KBRST#
OUT
OSCLIN
3 2
GATEA20 28
KBRST# 28
MAINPWON 4,34,35,37,38
4
EC_THRM#28
EC_FLASH#29
EC_SWI#28
PM_SLP_S3#28 PM_SLP_S5#28
PBTN_OUT#28
SB_INT_FLASH_SEL29
SB_PWRGD16
SIO_SMI#
H_PROCHOT#
R97
0_0402_5%
<BOM Structu re>
SIDERST#26
CLK_OK11,16
PIDERST#26
SPKR25
SB_SMCLK9,10,11
SB_SMDATA9 , 10,11
AC_BITCLK AC_SDOUT AC_SDIN0 AC_SDIN1 AC_SDIN2 AC_SYNC AC_RST# SPDIF_OUT
**
NB_SUS_STAT#7
CLK_SB_14M11
AC_BITCLK24,32
AC_SDOUT18,24,32
AC_SDIN024 AC_SDIN132
AC_SYNC24,32
AC_RST#24,32
SPDIF_OUT18
EC_THRM# EC_SWI#
EXTEVENT0# PM_SLP_S3# PM_SLP_S5#
PBTN_OUT#
R308 0_0402_5%
1 2
R319 10K_0402_5%
1 2
R314 10K_0402_5%
1 2
SB_GA20 SB_KBRST# MAINPWON_R EC_PME# SIO_SMI#
MASTER_RST# PCIE_PME#
EC_RSMRST#
12
1
C279 15P_0402_50V8D@
2
SB_INT_FLASH_SEL
R327 33_0402_5%
1 2
R113 33_0402_5%
1 2
R330 33_0402_5%
1 2
AGP_STP# AGP_BUSY#
SPKR SB_SMCLK SB_SMDATA GPIO9 GPIO8 GPIO11 GPIO12
Control by EC Delay 50ms after +3VALW ready
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
U9B
C6
TALERT#/TEMP_ALERT#/GPIO10
D5
BLINK/GPM6#
C4
PCI_PME#/GEVENT4#
D3
RI#/EXTEVNT0#
B4
SLP_S3#
E3
SLP_S5#
B3
PWR_BTN#
C3
PWR_GOOD
D4
SUS_STAT#
F2
TEST1
E2
TEST0
AJ26
GA20IN
AJ27
KBRST#
D6
SMBALERT#/THRMTRIP#/GEVENT2#
C5
LPC_PME#/GEVENT3#
A25
LPC_SMI#/EXTEVNT1#
D8
VOLT_ALERT#/S3_STATE/GEVENT5#
D7
SYS_RESET#/GPM7#
D2
WAKE#/GEVENT8#
D1
RSMRST#
A23
14M_X1/OSC
B23
14M_X2
AK24
SIO_CLK
B25
ROM_CS#/GPIO1
C25
GHI#/GPIO6
C23
VGATE/GPIO7
D24
AGP_STP#/GPIO4
D23
AGP_BUSY#/GPIO5
A27
FANOUT0/GPIO3
C24
SPKR/GPIO2
A26
SCL0/GPOC0#
B26
SDA0/GPOC1#
B27
DDC1_SCL/GPIO9
C26
DDC1_SDA/GPIO8
C27
DDC2_SCL/GPIO11
D26
DDC2_SDA/GPIO12
J2
NC1
K3
NC4
J3
NC3
K2
NC2
G1
AC_BITCLK
G2
AC_SDOUT
H4
AC_SDIN0
G3
AC_SDIN1
G4
AC_SDIN2
H1
AC_SYNC
H3
AC_RST#
H2
SPDIF_OUT
CLK / RST
SB400
ACPI/WAKE UP EVENTS
USB_OC6#/FAN_ALERT#/GEVENT6#
USB_OC7#/CASE_ALERT#/GEVENT7#
GPIOAC97 (NOT USED)
48M_X1/USBCLK
USB_VREFOUT
USB_OC0#/GPM0# USB_OC1#/GPM1#
USB_OC2#/FANOUT1/GPM2#
USB_OC3#/GPM3# USB_OC4#/GPM4# USB_OC5#/GPM5#
USB INTERFACE
USB PWR
CHS-215SB400-02_BGA564
EC_RSMRST#28
2005/03/01 2006/03/01
3
Deciphered Date
12
R137 47K_0402_5%
48M_X2
USB_RCOMP USB_ATEST1
USB_ATEST0
USB_HSDP7+ USB_HSDM7-
USB_HSDP6+ USB_HSDM6-
USB_HSDP5+ USB_HSDM5-
USB_HSDP4+ USB_HSDM4-
USB_HSDP3+ USB_HSDM3-
USB_HSDP2+ USB_HSDM2-
USB_HSDP1+ USB_HSDM1-
USB_HSDP0+ USB_HSDM0-
AVDDTX_0 AVDDTX_1 AVDDTX_2 AVDDTX_3 AVDDRX_0 AVDDRX_1 AVDDRX_2 AVDDRX_3
AVDDC AVSSC
AVSS_USB_1 AVSS_USB_2 AVSS_USB_3 AVSS_USB_4 AVSS_USB_5 AVSS_USB_6 AVSS_USB_7 AVSS_USB_8
AVSS_USB_9 AVSS_USB_10 AVSS_USB_11 AVSS_USB_12 AVSS_USB_13 AVSS_USB_14 AVSS_USB_15 AVSS_USB_16 AVSS_USB_17 AVSS_USB_18 AVSS_USB_19 AVSS_USB_20 AVSS_USB_21 AVSS_USB_22 AVSS_USB_23 AVSS_USB_24
EC_RSMRST#
2
OSCLIN
1 2
R100 10K_0402_5%@
A15
R307 10K_0402_5%@
B15
USB_RCOMP
C15 D16 C16 D15 B8 C8 C7
EC_LID_OUT#
B7 B6 A6 B5 A5
A11 B11
A10 B10
A14 B14
A13 B13
A18 B18
A17 B17
A21 B21
A20 B20
C21 C18 D13 D10 D20 D17 C14 C11
A16 B16 A9
A12 A19 A22 B9 B12 B19 B22 C9 C10 C12 C13 C17 C19 C20 C22 D9 D11 D12 D14 D18 D19 D21 D22
2
R95 0_0402_5%
1 2 1 2
R318 11.3K_0603_1%
1 2
USB_OC0# USB_OC1# USB_OC2#
USB_OC4# EC_SCI# USB_OC6# EC_SMI#
USBP4+ USBP4-
USBP2+ USBP2-
USBP0+ USBP0-
AVDDTX
AVDDRX
AVDDC
EC_LID_OUT# 28 EC_SCI# 28 EC_SMI# 28
USBP4+ 27
USBP4- 27
USBP2+ 27 USBP2- 27
USBP0+ 27
USBP0- 27
L18 FBM-10-201209-260-T_0805
AVDDTX
AVDDRX
AVDDC
Title
Size Document Number Rev
Custom
Date: Sheet
1 2
C268 10U_0805_10V4Z
1 2
C281 1U_0402_6.3V4Z
1 2
C512 0.1U_0402_16V4Z
1 2
C513 0.1U_0402_16V4Z
1 2
C514 0.1U_0402_16V4Z
1 2
L19 FBM-10-201209-260-T_0805
1 2
C270 10U_0805_10V4Z
1 2
C283 1U_0402_6.3V4Z
1 2
C521 0.1U_0402_16V4Z
1 2
C510 0.1U_0402_16V4Z
1 2
C511 0.1U_0402_16V4Z
1 2
L21 FBM-10-201209-260-T_0805
1 2
C277 10U_0805_10V4Z
1 2
C276 1U_0402_6.3V4Z
1 2
C504 0.1U_0402_16V4Z
1 2
Compal Electronics, Inc.
SB450 USB/ACPI/AC97/GPIO
HAZ00/BL10E (LA2861) 1.0
Monday, August 08, 2005
1
EC_LID_OUT# USB_OC2# USB_OC0# USB_OC1#
EC_SMI# USB_OC6# EC_SCI# USB_OC4#
1
10K_1206_8P4R_5%
10K_1206_8P4R_5%
45 36 27 18
RP16
45 36 27 18
RP5
15 42
of
+3VALW
+3VALW
Page 16
5
D D
C C
4
U9C
AK22
SATA_TX0+
AJ22
AK21
AJ21
AK19
AJ19
AK18
AJ18
AK14
AJ14
AK13
AJ13
AK11
AJ11
AK10
AJ10 AJ15 AJ16
AK16
AK8 AH15 AH16 AG10
AG14 AH12 AG12 AG18 AG21 AH18 AG20
AG9 AF10 AF11 AF12 AF13 AF14 AF15 AF16 AF17 AF18 AF19 AF20 AF21 AF22
AH9 AG11 AG15 AG17 AG19 AG22 AG23
AH17 AH23 AH13 AH20
AK9
AJ12 AK17 AK23 AH10
AJ23
AF9
SATA_TX0­SATA_RX0-
SATA_RX0+ SATA_TX1+
SATA_TX1­SATA_RX1-
SATA_RX1+ SATA_TX2+
SATA_TX2­SATA_RX2-
SATA_RX2+ SATA_TX3+
SATA_TX3­SATA_RX3-
SATA_RX3+ SATA_CAL SATA_X1 SATA_X2 SATA_ACT# PLLVDD_SATA XTLVDD_SATA AVDD_SATA_1
AVDD_SATA_2 AVDD_SATA_3 AVDD_SATA_4 AVDD_SATA_5 AVDD_SATA_6 AVDD_SATA_7 AVDD_SATA_8
AVSS_SATA_1 AVSS_SATA_2 AVSS_SATA_3 AVSS_SATA_4 AVSS_SATA_5 AVSS_SATA_6 AVSS_SATA_7 AVSS_SATA_8 AVSS_SATA_9 AVSS_SATA_10 AVSS_SATA_11 AVSS_SATA_12 AVSS_SATA_13 AVSS_SATA_14 AVSS_SATA_15 AVSS_SATA_16 AVSS_SATA_17 AVSS_SATA_18 AVSS_SATA_19 AVSS_SATA_20 AVSS_SATA_21 AVSS_SATA_22 AVSS_SATA_23 AVSS_SATA_24 AVSS_SATA_25 AVSS_SATA_26 AVSS_SATA_27 AVSS_SATA_28 AVSS_SATA_29 AVSS_SATA_30 AVSS_SATA_31 AVSS_SATA_32
SB400
SERIAL ATA
SERIAL ATA POWER
PIDE_IORDY
PIDE_DACK#
PIDE_DRQ
PIDE_IOR# PIDE_IOW# PIDE_CS1# PIDE_CS3#
PRIMARY ATA 66/100
SIDE_IORDY
SIDE_DACK#
SIDE_DRQ
SIDE_IOR# SIDE_IOW# SIDE_CS1# SIDE_CS3#
SIDE_D0/GPIO15 SIDE_D1/GPIO16 SIDE_D2/GPIO17 SIDE_D3/GPIO18 SIDE_D4/GPIO19 SIDE_D5/GPIO20 SIDE_D6/GPIO21 SIDE_D7/GPIO22 SIDE_D8/GPIO23
SIDE_D9/GPIO24 SIDE_D10/GPIO25 SIDE_D11/GPIO26 SIDE_D12/GPIO27
SECONDARY A TA 66/100
SIDE_D13/GPIO28 SIDE_D14/GPIO29 SIDE_D15/GPIO30
AVSS_SATA_33 AVSS_SATA_34 AVSS_SATA_35 AVSS_SATA_36 AVSS_SATA_37 AVSS_SATA_38 AVSS_SATA_39 AVSS_SATA_40 AVSS_SATA_41 AVSS_SATA_42 AVSS_SATA_43 AVSS_SATA_44 AVSS_SATA_45
PIDE_IRQ
PIDE_A0 PIDE_A1 PIDE_A2
PIDE_D0 PIDE_D1 PIDE_D2 PIDE_D3 PIDE_D4 PIDE_D5 PIDE_D6 PIDE_D7 PIDE_D8
PIDE_D9 PIDE_D10 PIDE_D11 PIDE_D12 PIDE_D13 PIDE_D14 PIDE_D15
SIDE_IRQ
SIDE_A0
SIDE_A1
SIDE_A2
AD30 AE28 AD27 AC27 AD28 AD29 AE27 AE30 AE29 AC28 AC29
AF29 AF27 AG29 AH30 AH28 AK29 AK28 AH27 AG27 AJ28 AJ29 AH29 AG28 AG30 AF30 AF28
V29 T27 T28 U29 T29 V30 U28 W29 W30 R27 R28
V28 W28 Y30 AA30 Y28 AA28 AB28 AB27 AB29 AA27 Y27 AA29 W27 Y29 V27 U27
AG13 AH22 AK12 AH11 AJ17 AH14 AH19 AJ20 AH21 AJ9 AG16 AK15 AK20
3
IDE_PDIO RDY INT_IRQ14 IDE_PDA0 IDE_PDA1 IDE_PDA2 IDE_PDDACK# IDE_PDDREQ IDE_PDIOR# IDE_PDIOW# IDE_PDCS1# IDE_PDCS3#
IDE_PDD0 IDE_PDD1 IDE_PDD2 IDE_PDD3 IDE_PDD4 IDE_PDD5 IDE_PDD6 IDE_PDD7 IDE_PDD8 IDE_PDD9 IDE_PDD10 IDE_PDD11 IDE_PDD12 IDE_PDD13 IDE_PDD14 IDE_PDD15
IDE_SDIO RDY INT_IRQ15 IDE_SDA0 IDE_SDA1 IDE_SDA2 IDE_SDDACK# IDE_SDDREQ IDE_SDIOR# IDE_SDIOW# IDE_SDCS1# IDE_SDCS3#
IDE_SDD0 IDE_SDD1 IDE_SDD2 IDE_SDD3 IDE_SDD4 IDE_SDD5 IDE_SDD6 IDE_SDD7 IDE_SDD8 IDE_SDD9 IDE_SDD10 IDE_SDD11 IDE_SDD12 IDE_SDD13 IDE_SDD14 IDE_SDD15
IDE_PDIORDY 26 INT_IRQ14 26 IDE_PDA0 26 IDE_PDA1 26 IDE_PDA2 26 IDE_PDDACK# 18,26 IDE_PDDREQ 26 IDE_PDIOR# 26 IDE_PDIOW# 26 IDE_PDCS1# 26 IDE_PDCS3# 26
IDE_PDD[0..15] 26
IDE_SDIORDY 26 INT_IRQ15 26 IDE_SDA0 26 IDE_SDA1 26 IDE_SDA2 26 IDE_SDDACK# 26 IDE_SDDREQ 26 IDE_SDIOR# 26 IDE_SDIOW# 26 IDE_SDCS1# 26 IDE_SDCS3# 26
IDE_SDD[0..15] 26
2
1
B B
+3VS
12
R129
10K_0402_5%
VGATE40
A A
1M_0402_5%
R128
12
5
+3VALW +3VALW +3VALW+3VALW+3VALW
14
P
1
O2I
G
U7A
7
SN74LVC14APWLE_TSSOP14
14
P
3
O4I
G
U7B
7
SN74LVC14APWLE_TSSOP14
R130
1 2
330K_0402_5%
0.1U_0402_10V6K
CLK_OK
C308
4
+3VALW +3VALW
14
CHS-215SB400-02_BGA564
P
5
O6I
G
1
7
2
SN74LVC14APWLE_TSSOP14
CLK_OK 11,15
U7C
U11-->please close to SB450(U7)
14
P
9
O8I
G
U7D
7
SN74LVC14APWLE_TSSOP14
R115
1 2
0_0402_5%
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTI AL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS , INC.
3
CLK_OK
R111
1 2
330K_0402_5%
+3VALW
12
A
13
B
C127 0.1U_0402_16V4Z
14
P
11
O10I
G
1
C293
0.47U_0603_10V7K
14
P
G
7
2005/03/01 2006/03/01
2
SN74LVC14APWLE_TSSOP14
U5D
11
O
SN74LVC08APW_TSSOP14
NB_PWRGD 7
Compal Secret Data
U7E
7
Deciphered Date
2
14
P
13
O12I
G
U7F
7
SN74LVC14APWLE_TSSOP14
SB_PWRGD# 7
C128 0.1U_0402_16V4Z
14
U5C
9
P
A
8
CLK_OK
O
10
B
G
SN74LVC08APW_TSSOP14
7
Compal Electronics, Inc.
Title
SB450 IDE/SATA
Size Document Number R ev
HAZ00/BL10E (LA2861) 1.0
Custom
Monday, August 08, 2005
Date: Sheet
SB_PWRGD 15
1
of
16 42
Page 17
+3VS +1.8VALW
1
C660
2
22U_1210_10V4Z
+3VS
+5VS
2 1
CH751H-40_SC76
1 2
1
C661
2
22U_1210_10V4Z
D14
R154
1K_0402_5%
C536 1U_0402_6.3V4Z
1 2
C657 1U_0402_6.3V4Z
1 2
C526 0.1U_0402_16V4Z
1 2
C530 0.1U_0402_16V4Z
1 2
C524 0.1U_0402_16V4Z
1 2
C534 0.1U_0402_16V4Z
1 2
C532 0.1U_0402_16V4Z
1 2
C540 0.1U_0402_16V4Z
1 2
C533 0.1U_0402_16V4Z
1 2
V5_VREF
2
C337
1U_0402_6.3V4Z
2
1
1
C587 1U_0402_6.3V4Z
1 2
C585 1U_0402_6.3V4Z
1 2
C651 1U_0402_6.3V4Z
1 2
C652 1U_0402_6.3V4Z
1 2
C520 0.1U_0402_16V4Z
1 2
C543 0.1U_0402_16V4Z
1 2
C522 0.1U_0402_16V4Z
1 2
C542 0.1U_0402_16V4Z
1 2
C564 0.1U_0402_16V4Z
1 2
C579 0.1U_0402_16V4Z
1 2
C584 0.1U_0402_16V4Z
1 2
C568 0.1U_0402_16V4Z
1 2
C576 0.1U_0402_16V4Z
1 2
C565 0.1U_0402_16V4Z
1 2
C586 0.1U_0402_16V4Z
1 2
C581 0.1U_0402_16V4Z
1 2
C594 0.1U_0402_16V4Z
1 2
C519 0.1U_0402_16V4Z
1 2
C598 0.1U_0402_16V4Z
1 2
C596 0.1U_0402_16V4Z
1 2
C597 0.1U_0402_16V4Z
1 2
C566 1U_0402_6.3V4Z
1 2
C553 1U_0402_6.3V4Z
1 2
C560 1U_0402_6.3V4Z
1 2
C573 1U_0402_6.3V4Z
1 2
C653 1U_0402_6.3V4Z
1 2
C654 1U_0402_6.3V4Z
1 2
C655 1U_0402_6.3V4Z
1 2
C656 1U_0402_6.3V4Z
1 2
C570 0.1U_0402_16V4Z
1 2
C569 0.1U_0402_16V4Z
1 2
C547 0.1U_0402_16V4Z
1 2
C571 0.1U_0402_16V4Z
1 2
C556 0.1U_0402_16V4Z
1 2
C554 0.1U_0402_16V4Z
1 2
C572 0.1U_0402_16V4Z
1 2
C578 0.1U_0402_16V4Z
1 2
C557 0.1U_0402_16V4Z
1 2
C577 0.1U_0402_16V4Z
1 2
C555 0.1U_0402_16V4Z
1 2
C546 0.1U_0402_16V4Z
1 2
C266 10U_0805_10V4Z
1 2
C275 10U_0805_10V4Z
1 2
C508 0.1U_0402_16V4Z
1 2
C507 0.1U_0402_16V4Z
1 2
C523 0.1U_0402_16V4Z
1 2
C525 0.1U_0402_16V4Z
1 2
C535 0.1U_0402_16V4Z
1 2
C589
0.1U_0402_16V4Z
C269 10U_0805_10V4Z
1 2
C282 1U_0402_6.3V4Z
1 2
C280 0.1U_0402_16V4Z
1 2
+1.8VALW
+1.8VS
+3VALW
C516
+1.05VS
R86
0_0805_5%
+3VS
220mA
0.1U_0402_16V4Z
1 2
+1.8VS
12
AVDD_CK
U9D
A30
VDDQ_1
D30
VDDQ_2
E24
VDDQ_3
E25
VDDQ_4
J5
VDDQ_5
K1
VDDQ_6
K5
VDDQ_7
N5
VDDQ_8
P5
VDDQ_9
R1
VDDQ_10
U5
VDDQ_11
U26
VDDQ_12
U30
VDDQ_13
V5
VDDQ_14
V26
VDDQ_15
Y1
VDDQ_16
Y26
VDDQ_17
AA5
VDDQ_18
AA26
VDDQ_19
AB5
VDDQ_20
AC30
VDDQ_21
AD5
VDDQ_22
AD26
VDDQ_23
AE1
VDDQ_24
AE5
VDDQ_25
AE26
VDDQ_26
AF6
VDDQ_27
AF7
VDDQ_28
AF24
VDDQ_29
AF25
VDDQ_30
AK1
VDDQ_31
AK4
VDDQ_32
AK26
VDDQ_33
AK30
VDDQ_34
M12
VDD_1
M13
VDD_2
M18
VDD_3
M19
VDD_4
N12
VDD_5
N13
VDD_6
N18
VDD_7
N19
VDD_8
V12
VDD_9
V13
VDD_10
V18
VDD_11
V19
VDD_12
W12
VDD_13
W13
VDD_14
W18
VDD_15
W19
VDD_16
A3
S5_3.3V_1
A7
S5_3.3V_2
E6
S5_3.3V_3
E7
S5_3.3V_4
E1
S5_3.3V_5
F5
S5_3.3V_6
E9
S5_1.8V_1
E10
S5_1.8V_2
E20
S5_1.8V_3
E21
S5_1.8V_4
E13
USB_PHY_1.8V_1
E14
USB_PHY_1.8V_2
E16
USB_PHY_1.8V_3
E17
USB_PHY_1.8V_4
C30
CPU_PWR
AG6
V5_VREF
A24
AVDDCK
B24
AVSSCK
A4
VSS_1
A8
VSS_2
A29
VSS_3
B28
VSS_4
C1
VSS_5
E5
VSS_6
E8
VSS_7
E11
VSS_8
E12
VSS_9
E15
VSS_10
E18
VSS_11
CHS-215SB400-02_BGA564
SB400
POWER
VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98
E19 E22 E23 E26 E30 F1 F4 G5 H5 J1 J4 K4 L5 M5 P1 R5 R26 T5 T26 T30 W1 W5 W26 Y5 AB26 AB30 AC5 AC26 AD1 AF5 AF8 AF23 AF26 AG8 AJ1 AJ24 AJ30 AK5 AK25 M14 M15 M16 M17 N14 N15 N16 N17 P12 P13 P14 P15 P16 P17 P18 P19 R12 R13 R14 R15 R16 R17 R18 R19 T12 T13 T14 T15 T16 T17 T18 T19 U12 U13 U14 U15 U16 U17 U18 U19 V14 V15 V16 V17 W14 W15 W16 W17
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
Deciphered Date
Compal Electronics, Inc.
Title
SB450/POWER/GND
Size Document Number Rev
B
HAZ00/BL10E (LA2861) 1.0
Thursday, A ugus t 04, 2005
Date: Sheet
of
17 42
Page 18
5
+3VALW +3VS +3VALW +3VS +3VS +3VS +3VS +3VS +3VS +3VS
12
R315
10K_0402_5%
AUTO_ON#14 AC_SDOUT15,24,32 RTC_CLK14
D D
SPDIF_OUT15 CLK_PCI314 CLK_PCI_LAN14,19 CLK_PCI_LPC14,28 CLK_PCI_139414,22 CLK_PCI714 CLK_PCI_SIO14,29
4
12
R329
10K_0402_5%@
12
R328
10K_0402_5%
12
R309
10K_0402_5%
12
R321 10K_0402_5%@
12
R320
10K_0402_5%
12
R341
10K_0402_5%
12
R342 10K_0402_5%@
12
R355
10K_0402_5%@
12
R356 10K_0402_5%
3
12
R345 10K_0402_5%
12
R346 10K_0402_5%@
12
R351 10K_0402_5%@
12
R350
10K_0402_5%
12
R122 10K_0402_5%
12
R123 10K_0402_5%@
12
R367 10K_0402_5%@
12
R366
10K_0402_5%
2
+3VS
12
R335
10K_0402_5%
CLK_PCI214
1
Selects type of 48MHz clock pad
12
R334 10K_0402_5%@
REQUIRED STRAPS
ACPWRON
AUTO_ON#
PULL
C C
IDE_PDDACK#16,26
PCI_AD3114,19,20,22,23 PCI_AD3014,19,20,22,23 PCI_AD2914,19,20,22,23 PCI_AD2814,19,20,22,23 PCI_AD2714,19,20,22,23 PCI_AD2614,19,20,22,23
B B
PCI_AD2514,19,20,22,23 PCI_AD2414,19,20,22,23 PCI_AD2314,19,20,22,23
HIGH
PULL LOW
Pop R634 when debug .
MANUAL PWR ON
DEFAULT
AUTO PWR ON
+3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS
12
R142 10K_0402_5%
12
R143 10K_0402_5%@
AC97_SDOUT SPDIF_OUT
USE DEBUG STRAPS
IGNORE DEBUG STRAPS
DEFAULT
12
R149 10K_0402_5%@
12
R148 10K_0402_5%@
RTC_CLK
INTERNAL RTC
DEFAULT
EXTERNAL RTC (NOT SUPPORTED W/ IT8712 )
12
R127 10K_0402_5%@
12
R126 10K_0402_5%@
PU for 48Mhz XTAL mode
48M OSC mode
DEFAULT
R146 10K_0402_5%@
R147 10K_0402_5%@
12
R373 10K_0402_5%@
12
R374 10K_0402_5%@
12
12
CLK_PCI3
USB PHY PWRDOWN DISABLE
USB PHY PWRDOWN ENABLE
DEFAULT
12
R141 10K_0402_5%@
12
R140
10K_0402_5%
CLK_PCI_LAN
Internal PLL
External
Clock
DEFAULT
12
R369 10K_0402_5%@
12
R370
10K_0402_5%
CLK_PCI_LPC
PCIE CM_SET low
DEFAULT
PCIE CM_SET HIGH
12
R381 10K_0402_5%@
12
R380
10K_0402_5%
PCI_CLK6
CPU I/F = K8
CPU I/F = P4
DEFAULT
12
R132 10K_0402_5%@
12
R131
10K_0402_5%
12
12
R138 10K_0402_5%@
**
R139 10K_0402_5%@
PCI_CLK7
ROM TYPE H,H = PCI ROM
H,L = LPC ROM I
L,H = LPC ROM II
L,L = FWH ROM
PCI_CLK8
CLK_PCI_MINI2
Clock input buffer
DEFAULT
Crytsal Pad
DEBUG STRAPS
IDE_PDDACK#
PULL HIGH
PULL
A A
LOW
USE LONG RESET
DEFAULT
USE SHORT RESET
PCI_AD31
Reserved
PCI_AD30
Reserved
PCI_AD29
PCI_AD28
Reserved R eserved
PCI_AD27 PCI_AD26
BYPASS PCI PLL
USE PCI PLL
DEFAULT
BYPASS ACPI BCLK
USE ACPI BCLK
DEFAULT
PCI_AD25 PCI_AD24
BYPASS IDE PLL
USE IDE PLL
DEFAULT
USE EEPROM PCIE STRAPS
USE DEFAULT PCIE STRAPS
DEFAULT
PCI_AD23
Reserved
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2005/03/01 2006/03/01
Compal Secret Data
Deciphered Date
Compal Electronics, Inc.
Title
HARDWARE TRAP
Size Document Number Re v
HAZ00/BL10E (LA2861) 1.0
Custom
Monday, August 08, 2005
2
Date: Sheet
1
of
18 42
Page 19
A
1 1
PCI_C/BE#014,20,22,23 PCI_C/BE#114,20,22,23
PCI_DEVSEL#14,20,22,23
CLK_PCI_LAN14,18
PM_CLKRUN#14,20,22,23,28
PCI_FRAME#14,20,22,23
PCI_TRDY#14,20,22,23 PCI_STOP#14,20,22,23 PCI_PERR#14,20,22,23
PCI_SERR#14,20,22,23
PCI_PIRQG#14,23
PCI_AD22
PCI_PAR14,20,22,23
PCI_IRDY#14,20,22,23
PCI_REQ#114 PCI_GNT#114
LAN_PME#22 ,23,28
PCIRST#14,20,22,23,28,29
PCI_C/BE#214,20,22,23 PCI_C/BE#314,20,22,23
PCI_PIRQG#
R235
10_0402_5%
C433
22P_0402_50V8J
1 2
R238
1 2 1
2
100_0402_5%
2 2
3 3
4 4
PCI_AD[0..31]14,18,20,22,23
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_C/BE#0 PCI_C/BE#1 PCI_C/BE#2 PCI_C/BE#3
B
PCI_AD[0..31]
U20
104
AD0
103
AD1
102
AD2
98
AD3
97
AD4
96
AD5
95
AD6
93
AD7
90
AD8
89
AD9
87
AD10
86
AD11
85
AD12
83
AD13
82
AD14
79
AD15
59
AD16
58
AD17
57
AD18
55
AD19
53
AD20
50
AD21
49
AD22
47
AD23
43
AD24
42
AD25
40
AD26
39
AD27
37
AD28
36
AD29
34
AD30
33
AD31
92 77 60 44
46 76
61 63 67 68 69
70 75
30 29
25 31 27 28
65
4
17
128
21 38 51 66 81
91 101 119
35
52
80 100
PCI I/F
C/BE#0 C/BE#1 C/BE#2 C/BE#3
IDSEL PAR
FRAME# IRDY# TRDY# DEVSEL# STOP#
PERR# SERR#
REQ# GNT#
INTA# PME# RST# CLK
CLKRUN#
GND/VSS GND/VSS GND/VSS
GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST
GND GND GND GND
RTL8100CL_LQFP128
AVDD25/HSDAC-
AVDD33/AVDDL AVDD33/AVDDL AVDD33/AVDDL
C
108
EEDO
109
AUX/EEDI
111
EESK
106
EECS
117
LED0
115
LED1
114
LED2
113
NC/LED3
NC/MDI2+
NC/MDI2-
NC/MDI3+
NC/MDI3-
LWAKE
ISOLATE#
RTSET
NC/M66EN NC/AVDDH
NC/HV
GND GND
NC/LV2
NC/VSS NC/VSS
NC/GND NC/GND NC/GND NC/GND NC/GND NC/GND
CTRL25
VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33
NC/AVDDL
NC/VDD18 NC/VDD18 NC/VDD18 NC/VDD18 NC/VDD18
1 2 5 6
14 15 18 19
121
X1
122
X2
105
10mil
23 127
10mil
72 74
88 10
120 11
123 124 126
9 13
22 48 62 73 112 118
8 125 26
41 56 71 84 94 107
3 7 20 16
32 54 78 99
24 45 64 110 116
12
20mil
0.1U_0402_16V4Z
TXD+/MDI0+
TXD-/MDI0-
RXIN+/MDI1+
RXIN-/MDI1-
NC/SMBCLK
NC/SMBDATA
NC/HSDAC+
LAN I/F
RTT3/CRTL18
VDD25/VDD18 VDD25/VDD18 VDD25/VDD18 VDD25/VDD18
Power
D
R215 4.7K_0402_5%
EEDO EEDI EESK EECS
ACTIVITY# LINK_10_100#
LAN_TD+ LAN_TD­LAN_RD+ LAN_RD-
LAN_X1 LAN_X2
R233
12 12
R221
+LAN_DVDD CTRL25
CTRL25
+3VALW
+LAN_AVDDL
40mil
1
C428
0.1U_0402_16V4Z
2
+LAN_DVDD
40mil
2
C421
0.1U_0402_16V4Z
1
+2.5V_LAN_VDD
1
2
1
C38
2
0.1U_0402_16V4Z
C39
15K_0402_5%
5.6K_0603_1%
CHB2012U170_0805
12
U4
4
DO
3
DI
2
SK
1
CS
AT93C46-10SI-2.7_SO8
12
R2311K_0402_5%
10U_0805_10V4Z
C416
27P_0402_50V8J
1
C425
0.1U_0402_16V4Z
2
2
C431
0.1U_0402_16V4Z
1
L9
+3VS
12
+3VALW
5
GND
6
NC
7
NC
8
VCC
+3VALW
31
E
Q8
2
B
2SB1197K_SOT23
C
1
C34
2
Y2
1
25MHZ_20P
2
1 2
KC FBM-L11-201209-221LMAT_0805
1
C423
0.1U_0402_16V4Z
2
1 2
KC FBM-L11-201209-221LMAT_0805
2
C440
0.1U_0402_16V4Z
1
E
2
1
C17
0.1U_0402_16V4Z
40mil
L31
LAN_X2LAN_X1
12
L32
+2.5V_LAN
1
2
+2.5V_LAN
C35
0.1U_0402_16V4Z
2
1
+3VALW
C415 27P_0402_50V8J
+3VALW
+3VALW
1 3
ACTIVITY#
1 3
LINK_10_100#
F
10K
2
Q31 DTA114YKA_SC59
47K
10K
2
Q1 DTA114YKA_SC59
47K
R203 300_0402_5%
1 2
R200 300_0402_5%
RJ45_RX-
RJ45_RX+ RJ45_TX­RJ45_TX+
1 2
75_0402_5%
RJ45_PR
R201
G
10mil
12
Termination plane should be coupled to chassis ground
Layout Note TS6121 pls close to conn.
LAN_TD+ RJ45_TX+ LAN_TD-
12
12
1
C412
0.1U_0402_16V4Z
2
C419
R211
49.9_0402_1%
49.9_0402_1%
0.1U_0402_16V4Z
1
2
C426
1
2
0.1U_0402_16V4Z
R212
C442
R210
49.9_0402_1%
+3VALW
Closed to RTL8100CL Closed to RTL8100CL
+2.5V_LAN
+3VALW
1
2
0.1U_0402_16V4Z
LAN_RD+ RJ45_RX+ LAN_RD-
12
12
R213
49.9_0402_1%
1
C413
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1
2
C424
1
C441
2
0.1U_0402_16V4Z
10mil
12
R202 75_0402_5%
1000P_1206_2KV7K
1 3 2 4 5 7 6
1
C14
0.1U_0402_16V4Z
2
1
C434
0.1U_0402_16V4Z
2
JP12
12
Amber LED+
11
Amber LED-
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
10
Green LED-
9
Green LED+
TYCO_3-440470-4
C391
1 2
U18
TD+ TD­CT NC NC CT RD+ RD-8RX-
0.5u_TS6121C
0.1U_0402_16V4Z
1
C1
2
16
TX+
14
TX-
15
CT
13
NC
12
NC
10
CT
11
RX+
9
R5
75_0402_5%
H
SHLD2 SHLD1
SHLD2 SHLD1
1
2
12
16 15
14 13
LANGND
C2
4.7U_0805_10V4Z
RJ45_TX-
RJ45_RX-
12
R6 75_0402_5%
RJ45_PR
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
2005/03/01 2006/03/01
Deciphered Date
E
Compal Electronics, Inc.
Title
RTL8100CL
Size Document Number Rev
HAZ00/BL10E (LA2861) 1.0
B
Monday, August 08, 2005
F
Date: Sheet
G
19 42
of
H
Page 20
5
VPPD021
VPPD121 VCCD0#21 VCCD1#21
U29
PCI_AD[0..31]14,18,19,22,23
D D
CLK_PCI_CB
12
R407 10_0402_5%@
1
C612 18P_0402_50V8K@
C C
B B
2
IDSEL: PCI_AD20
PCI_C/BE#314,19,22,23 PCI_C/BE#214,19,22,23 PCI_C/BE#114,19,22,23 PCI_C/BE#014,19,22,23
PCIRST#14,19,22,23,28,29
PCI_FRAME#14,19,22,23
PCI_IRDY#14,19,22,23
PCI_TRDY#14,19,22,23
PCI_DEVSEL#14,19,22,23
PCI_STOP#14,19,22,23 PCI_PERR#14,19,22,23
PCI_SERR#14,19,22,23
PCI_PAR14,19,22,23 PCI_REQ#214 PCI_GNT#214
CLK_PCI_CB14
+3VS
PCI_PIRQA#14,22
SERIRQ14,28,29
PM_CLKRUN#14,19,22,23,28
R159 10K_0402_5% R406 100_0402_5%
PCI_PIRQA#
PCI_AD[0..31]
PCI_AD31
C2
N10 N11
M11
M10
C1 D4 D2 D1 E4 E3 E2
F2
F1 G2 G3 H3 H4
J1
J2 N2
M3
N3 K4
M4
K5
L5
M5
K6
M6
N6
M7
N7
L7 K7 N8
E1
J3 N1 N5
G4
J4 K1 K3
L1
L2
L3
M1 M2
A1 B1 H1
L8
L11
F4 K8
N9 K9
L10
J9
AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
CBE3# CBE2# CBE1# CBE0#
PCIRST# FRAME# IRDY# TRDY# DEVSEL# STOP# PERR# SERR# PAR PCIREQ# PCIGNT# PCICLK
RIOUT#_PME# SUSPEND#
IDSEL MFUNC0
MFUNC1 MFUNC2 MFUNC3 MFUNC4 MFUNC5 MFUNC6 MFUNC7
GRST#
PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0
PCIRST#
CLK_PCI_CB A16_CLK
3V_PCM_SUSP
1 2 1 2
PCM_IDPCI_AD20
1 2 1 2
1 2
1 2
R161 0_0402_5%
PCIRST#
R17410K_0402_5%@ R17110K_0402_5%@
R16810K_0402_5%@
N13
M13
VCCD1#
VCCD0#
4
M12
3
+S1_VCC +3VS
G13
A7
B4
C8
N12
VPPD0
VPPD1
VCCA2
D12
VCC9
VCC10
VCCA1
PCI Interface
CSTSCHG/BVD1_STSCHG#
G1
K2
N4
F3
L6
L9
H11
VCC2
VCC3
VCC4
VCC1
VCC5
VCC6
VCC7
VCC8
CAD31/D10
CAD30/D9 CAD29/D1 CAD28/D8 CAD27/D0 CAD26/A0 CAD25/A1 CAD24/A2 CAD23/A3 CAD22/A4 CAD21/A5 CAD20/A6
CAD19/A25
CAD18/A7 CAD17/A24 CAD16/A17
CAD15/IOWR#
CAD14/A9
CAD13/IORD#
CAD12/A11
CAD11/OE#
CAD10/CE2#
CAD9/A10
CAD8/D15
CAD7/D7
CAD6/D13
CAD5/D6
CAD4/D12
CAD3/D5
CAD2/D11
CAD1/D4 CAD0/D3
CCBE3#/REG#
CCBE2#/A12
CCBE1#/A8
CCBE0#/CE1#
CARDBUS
CRST#/RESET
CFRAME#/A23
CIRDY#/A15
CTRDY#/A22
CDEVSEL#/A21
CSTOP#/A20 CPERR#/A14
CSERR#/WAIT#
CPAR/A13
CREQ#/INPACK#
CGNT#/WE#
CCLK/A16
CCLKRUN#/WP_IOIS16#
CBLOCK#/A19
CINT#/READY_IREQ#
SPKROUT
CAUDIO/BVD2_SPKR#
CCD2#/CD2# CCD1#/CD1#
CVS2/VS2#
CVS1/VS1
CRSV3/D2 CRSV2/A18 CRSV1/D14
B2 C3 B3 A3 C4 A6 D7 C7 A8 D8 A9 C9 A10 B10 D10 E12 F10 E13 F13 F11 G10 G11 G12 H12 H10 J11 J12 K13 J10 K10 K12 L13
B7 A11 E11 H13
B9 B11 A12 A13 B13 C12 C13 A5 D13 B8 C11 B12
C5 D5
D11 D6 M9
B5 A4
L12 D9 C6 A2 E10 J13
S1_A[0..25] S1_D[0..15]
S1_D10 S1_D9 S1_D1 S1_D8 S1_D0 S1_A0 S1_A1 S1_A2 S1_A3 S1_A4 S1_A5 S1_A6 S1_A25 S1_A7 S1_A24 S1_A17 S1_IOWR# S1_A9 S1_IORD# S1_A11 S1_OE# S1_CE2# S1_A10 S1_D15 S1_D7 S1_D13 S1_D6 S1_D12 S1_D5 S1_D11 S1_D4 S1_D3
S1_REG# S1_A12 S1_A8 S1_CE1#
S1_RST S1_A23 S1_A15 S1_A22 S1_A21 S1_A20 S1_A14 S1_WAIT# S1_A13 S1_INPACK# S1_WE#
S1_BVD1 S1_WP
S1_A19 S1_RDY# PCM_SPK#
S1_BVD2 S1_CD2#
S1_CD1# S1_VS2 S1_VS1 S1_D2 S1_A18 S1_D14
S1_A[0..25] 21 S1_D[0..15] 21
S1_IOWR# 21 S1_IORD# 21 S1_OE# 21
S1_CE2# 21
S1_REG# 21
S1_CE1# 21 S1_RST 21
S1_WAIT# 21 S1_INPACK# 21
S1_WE# 21
1 2
R160 33_0402_5%
S1_A16
S1_BVD1 21 S1_WP 21
S1_RDY# 21 PCM_SPK# 25
S1_BVD2 21 S1_CD2# 21
S1_CD1# 21 S1_VS2 21 S1_VS1 21
+3VS
1
2
+3VS
1
2
+S1_VCC
1
2
C345
0.1U_0402_16V4Z
C343
0.1U_0402_16V4Z
C351
0.1U_0402_16V4Z
2
1
C355
0.1U_0402_16V4Z
2
1
C347
0.1U_0402_16V4Z
2
1
C334
0.1U_0402_16V4Z
2
S1_CD1# S1_CD2#
10P_0402_50V8J
C336
1
2
1
2
1
2
1
2
Close chip termenal
+S1_VCC
12
R180 43K_0402_5%@
S1_WP
C348
0.1U_0402_16V4Z
C359
0.1U_0402_16V4Z
C340
0.1U_0402_16V4Z
10P_0402_50V8J
Closed to Pin A4Closed to Pin L12
2
C354
0.1U_0402_16V4Z
1
1
C358
0.1U_0402_16V4Z
2
1
C349
0.1U_0402_16V4Z
2
1
C357
2
1
GND1D3GND2H2GND3L4GND4M8GND5
GND6
GND7
GND8
PCI1410AGGU_PBGA144
B6
F12
K11
C10
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
3
Deciphered Date
Compal Electronics, Inc.
Title
ENE-CB1410
Size Document Number Rev
HAZ00/BL10E (LA2861) 1.0
B
Thursday, A ugus t 04, 2005
2
Date: Sheet
1
20 42
of
Page 21
5
4
3
2
1
C321
+S1_VPP+S1_VCC
S1_A[0..25]20
S1_D[0..15]20
CardBus Socket
JP7
69
GND
70
GND
SANTA_130606-1_LT
GND GND
DATA3
CD1#
DATA4
DATA11
DATA5
DATA12
DATA6
DATA13
DATA7
DATA14
CE1#
DATA15
ADD10
CE2#
OE#
VS1#
ADD11
IORD#
ADD9
IOWR#
ADD8 ADD17 ADD13 ADD18 ADD14 ADD19
WE#
ADD20
READY
ADD21
VCC VCC VPP
VPP ADD16 ADD22 ADD15 ADD23 ADD12 ADD24
ADD7
ADD25
ADD6
VS2#
ADD5
RESET
ADD4
WAIT#
ADD3
INPACK#
ADD2 REG# ADD1 BVD2 ADD0
BVD1 DATA0 DATA8 DATA1 DATA9 DATA2
DATA10
CD2#
GND GND
1 35 2 36 3 37 4 38 5 39 6 40 7 41 8 42 9 43 10 44 11 45 12 46 13 47 14 48 15 49 16 50 17 51 18 52 19 53 20 54 21 55 22 56 23 57 24 58 25 59 26 60 27 61 28 62 29 63 30 64 31 65 32 66 33
WP
67 34 68
S1_D[0..15]
S1_D3
S1_CD1#
S1_D4
S1_D11
S1_D5
S1_D12
S1_D6
S1_D13
S1_D7
S1_D14
S1_CE1#
S1_D15
S1_A10 S1_CE2# S1_OE#
S1_VS1
S1_A11
S1_IORD#
S1_A9
S1_IOWR#
S1_A8 S1_A17 S1_A13 S1_A18 S1_A14 S1_A19
S1_WE#
S1_A20
S1_RDY#
S1_A21
S1_A16 S1_A22 S1_A15 S1_A23 S1_A12 S1_A24
S1_A7 S1_A25
S1_A6 S1_VS2
S1_A5 S1_RST
S1_A4
S1_WAIT#
S1_A3
S1_INPACK#
S1_A2
S1_REG#
S1_A1
S1_BVD2
S1_A0
S1_BVD1
S1_D0 S1_D8
S1_D1 S1_D9
S1_D2
S1_D10
S1_WP
S1_CD2#
S1_A[0..25]
+S1_VCC +S1_VPP
PCMCIA Power Controller
U10
9
D D
+5VS
12V
W=40mil
1
C335
10U_0805_6.3V6M
10U_0805_10V4Z
C C
2
C329
C325
0.1U_0402_16V4Z
1
2
1
1
C331
0.1U_0402_16V4Z
2
2
W=40mil
1
C326
2
0.1U_0402_16V4Z
+3VS
5 6
3 4
12
R135 10K_0402_5%
5V 5V
3.3V
3.3V
VCC VCC VCC
VPP
VCCD0 VCCD1
VPPD0 VPPD1
OC
GND
SHDN
TPS2211AIDBR_SSOP16
7
16
40mil
13 12 11
10
1 2 15 14
8
+S1_VCC
VCCD0# VCCD1# VPPD0 VPPD1
1
C303
4.7U_0805_10V4Z
2
+S1_VPP
40mil
1
C304
0.1U_0402_16V4Z
2
VCCD0# 20
VCCD1# 20 VPPD0 20 VPPD1 20
C317
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CardBus Socket
1
C316
0.1U_0402_16V4Z
2
1
0.01U_0402_25V4Z
2
S1_A[0..25] S1_D[0..15]
+S1_VCC
C319
+S1_VPP
C323
Reserve for Debug.
S1_WP
1
2
1
2
S1_OE# S1_RST S1_CE1# S1_CE2#
+S1_VCC
12
R17343K_0402_5%
12
R33247K_0402_5%
12
R15347K_0402_5%
12
R31647K_0402_5%
12
R32447K_0402_5%
S1_A[0..25]20
S1_D[0..15]20
Close to CardBus Conn.
10U_0805_10V4Z
B B
C320
4.7U_0805_10V4Z
+S1_VCC +S1_VPP
C318
0.1U_0402_16V4Z
0.1U_0402_16V4Z
S1_CD1# 20
S1_CE1# 20
S1_CE2# 20 S1_OE# 20 S1_VS1 20
S1_IORD# 20 S1_IOWR# 20
S1_WE# 20 S1_RDY# 20
S1_VS2 20 S1_RST 20 S1_WAIT# 20 S1_INPACK# 20 S1_REG# 20 S1_BVD2 20 S1_BVD1 20
S1_WP 20 S1_CD2# 20
C322
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
3
Deciphered Date
Compal Electronics, Inc.
Title
CARD BUS SOCKET
Size Document Number Rev
HAZ00/BL10E (LA2861) 1.0
B
Thursday, A ugus t 04, 2005
2
Date: Sheet
1
21 42
of
Page 22
5
D D
PCI_AD[0..31]14,18,19,20,23
C C
IDSEL:PCI_AD16
PCI_AD16
1 2
B B
CLK_PCI_1394
R144
1394@
1394_IDSEL
100_0402_5%
PCI_C/BE#314,19,20,23 PCI_C/BE#214,19,20,23 PCI_C/BE#114,19,20,23 PCI_C/BE#014,19,20,23
CLK_PCI_139414,18
PCI_GNT#014 PCI_REQ#014
PCI_FRAME#14,19,20,23
PCI_IRDY#14,19,20,23
PCI_TRDY#14,19,20,23
PCI_DEVSEL#14,19,20,23
PCI_STOP#14,19,20,23
PCI_PERR#14,19,20,23
PCI_PIRQA#14,20
1394_PME#19 ,23,28
PCI_SERR#14,19,20,23
PM_CLKRUN#14,19,20,23,28
12
R364 10_0402_5%
@
C567 10P_0402_50V8K
@
PCI_AD[0..31]
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8
PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_C/BE#3 PCI_C/BE#2 PCI_C/BE#1 PCI_C/BE#0
CLK_PCI_1394
PCI_GNT#0 PCI_REQ#0 1394_IDSEL
PCI_FRAME#
PCI_IRDY# PCI_TRDY#
PCI_DEVSEL#
PCI_STOP# PCI_PERR# PCI_PIRQA# 1394_PME# PCI_SERR#
PCI_PAR14,19,20,23 PCIRST#14,19,20,23,28,29
PCI_PAR PM_CLKRUN# PCIRST# TPA0+
R352 220_0402_5%1394@
1 2
R353
1 2
U27
84 82 81 80 79 77 76 74 71 70 69 67 66 65 63 61 46 45 43 42 41 40 38 37 32 31 29 28 26 25 24 22 34 47 60 73 16 18 19 36 49 50 52 53 54 56 13 21 57 58 12 85
14 89
90
220_0402_5%1394@
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 PCI_C/BE3 PCI_C/BE2 PCI_C/BE1 PCI_C/BE0 PCI_CLK PCI_GNT PCI_REQ PCI_IDSEL PCI_FRAME PCI_IRDY PCI_TRDY PCI_DEVSEL PCI_STOP PCI_PERR PCI_INTA/CINT PCI_PME/CSTSCHG PCI_SERR PCI_PAR PCI_CLKRUN PCI_RST
G_RST GPIO3
GPIO2
4
+3VS
VDDP20VDDP35VDDP48VDDP62VDDP
TSB43AB21 /(TSB43AB22)
PCI BUS INTERFACE
PLLGND18REG_EN9AGND
AGND
AGND
AGND
AGND
AGND
AGND
109
110
111
117
126
127
128
87
78
86
96
CNA
TEST1710TEST16
CYCLEIN
CYCLEOUT/CARDBUS
NC/(TPBIAS1)
NC/(TPA1+) NC/(TPB1+)
BIAS CURRENT
OSCILLATOR
FILTER
EEPROM 2 WIRE BUS
POWER CLASS
PHY PORT 1
DGND17DGND23REG1830DGND33DGND44DGND55DGND64DGND68DGND75DGND83REG1893DGND
103
C583
0.1U_0402_16V4Z1394@
C549
1 2 1 2 1 2 1 2
11
DVDD DVDD DVDD DVDD DVDD DVDD DVDD DVDD
PLLVDD
AVDD AVDD AVDD AVDD AVDD
CPS
NC/(TPA1-) NC/(TPB1-)
FILTER0 FILTER1
SDA
SCL PC0
PC1 PC2
TPBIAS0
TPA0+
TPA0-
TPB0 +
TPB0 -
TEST9 TEST8
TEST3 TEST2 TEST1 TEST0
TSB43AB21_PQFP1281394@
0.1U_0402_16V4Z1394@
R361
1394@
R362
1394@
R338
1394@
R359
1394@
R360
R0
R1 X0
X1
4.7K_0402_5% 10K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
12
4.7K_0402_5%1394@
15 27 39 51 59 72 88 100 7 1 2 107 108 120
1 2
106
125 124 123 122 121
118
R121
6.34K_0603_1%
119 6
5
C302
3 4
1 2
92
1 2
91 99
98 97
TPBIAS0
116 115
TPA0-
114
TPB0+
113
TPB0-
112
94 95
101 102 104 105
+3VS
1394_PLLVDD
R120
1K_0402_5%1394@
1394@
0.1U_0402_16V4Z1394@ R347
220_0402_5%1394@
R348
220_0402_5%1394@
3
+3VS
+3VS
1 2
C299
0.1U_0402_16V4Z1394@
X3
2
+3VS
C527
0.33U_0603_16V4Z1394@
0.1U_0402_16V4Z1394@
C592 1000P_0402_50V7K1394@
C297
C590
0.1U_0402_16V4Z1394@
C591
1000P_0402_50V7K1394@
JP22
4
4
3
6
3
G
2
5
2
G
1
1
1
TYCO_1470383-21394@
J2
1
JUMP_43X118
@
2
2
C593
0.1U_0402_16V4Z1394@
C538
0.1U_0402_16V4Z1394@
+3VS
C310
1000P_0402_50V7K1394@
C307
0.01U_0402_25V4Z1394@
C548
22P_0402_50V8J1394@
24.576MHz_16P_3XG-24576-43E11394@
C539
C311
22P_0402_50V8J1394@
1394@
1394@
C575 1000P_0402_50V7K1394@
1 2
4.7U_0805_10V4Z1394@
R322
56.2_0603_1%
R312
56.2_0603_1%
C518 220P_0402_50V8K1394@
C574
0.1U_0402_16V4Z1394@
L25
BLM21A601SPT_08051394@
56.2_0603_1%1394@
R311
R323
R313
C296
0.1U_0402_16V4Z1394@
C580
1000P_0402_50V7K1394@
56.2_0603_1%1394@
5.11K_0603_1%1394@
1
C582
0.1U_0402_16V4Z1394@
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
3
Deciphered Date
Compal Electronics, Inc.
Title
TSB43AB21
Size Document Number Rev
HAZ00/BL10E (LA2861) 1.0
B
Monday, August 08, 2005
2
Date: Sheet
1
22 42
of
Page 23
MINI_PCI SOCKET FOR WLAN (BOTTOM)
WL_OFF#28 KILL_SW#28,30
CLK_PCI_MINI
12
R331 10_0402_5%
@
1
C544 22P_0402_50V8J@
2
+3VS
PCI_AD[0..31]
+3VALW
C126
12
0.1U_0402_16V4ZWL@
5
U30
1
P
B
4
Y
2
A
G
3
TC7SH08FU_SSOP5WL@
+5VS
+5VS
PCI_PIRQG#
CLK_PCI_MINI
PCI_AD31 PCI_AD29
PCI_AD27 PCI_AD25
PCI_AD23 PCI_AD21
PCI_AD19 PCI_AD17
PM_CLKRUN#
PCI_AD14 PCI_AD12
PCI_AD10 PCI_AD8
PCI_AD7 PCI_AD5 PCI_AD3 PCI_AD1
PCI_PIRQG#14,19
W=40mils
CLK_PCI_MINI14
PCI_REQ#314
PCI_C/BE#314,19,20,22
PCI_C/BE#214,19,20,22
PCI_IRDY#14,19,20,22
PM_CLKRUN#14,19,20,22,28
PCI_SERR#14,19,20,22
PCI_PERR#14,19,20,22 PCI_C/BE#114,19,20,22
TIP
LAN RESERVED
CH751H-40_SC76WL@ D30
21
W=30mils
W=30mils W=20mils
JP24
112
KEY KEY
334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152 535354 555556 575758 595960 616162 636364 656566 676768 696970 717172 737374 757576 777778 797980 818182 838384 858586 878788 898990 919192 939394 959596 979798 9999100
101
101
103
103
105
105
107
107
109
109
111
111
113
113
115
115
117
117
119
119
121
121
123
123
125
125
FOX_AS0A226-S2T
102 104 106 108 110 112 114 116 118 120 122 124
126
PCI_AD[0..31] 14,18,19,20,22
RING
2 4
LAN RESERVED
6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124
126
PCI_PIRQF#
W=40mils
PCIRST#
PCI_AD30 PCI_AD28
PCI_AD26 PCI_AD24
PCI_AD22 PCI_AD20
PCI_AD18 PCI_AD16
2
1
W=30mils
MINI_IDSEL
PCI_AD15 PCI_AD13 PCI_AD11
PCI_AD9
PCI_AD6 PCI_AD4 PCI_AD2 PCI_AD0
C609
0.1U_0402_16V4ZWL@
+3VALW
PCIRST# 14,19,20,22,28,29 PCI_GNT#3 14 WLANPME# 19,22,28
1 2
R368 100_0402_1%WL@
PCI_PAR 14 , 19,20,22
PCI_FRAME# 14,19,20,22 PCI_T R D Y # 14,19,20,22 PCI_STOP# 14,19,20,22
PCI_DEVSEL# 14,19,20,22
PCI_C/BE#0 14,19,20,22
+3VALW
+5VS
PCI_PIRQF# 14
PCI_AD18
1
C602
2
1000P_0402_50V7KWL@
2
C545
1
0.1U_0402_16V4ZWL@
W=40mils
+3VS
IDSEL : PCI_AD18
0.1U_0402_16V4ZWL@
2
C614
1
0.1U_0402_16V4ZWL@
2
C599
1
2
C528
1
0.1U_0402_16V4ZWL@
2
C600
1
0.1U_0402_16V4ZWL@
10U_0805_10V4ZWL@
1
C605
2
0.1U_0402_16V4ZWL@
2
C529
1
2
C588
1
0.1U_0402_16V4ZWL@
+5VS
1
C517
2
10U_0805_10V4ZWL@
10U_0805_10V4ZWL@
+3VS
1
C551
2
Port 80 Debug Card Connector
CLK_PCI_MINI
R456
1 2
0_0402_5%@
+5VS
PCI_C/BE#0
PCI_AD6 PCI_AD4 PCI_AD2 PCI_AD0 PCI_AD1 PCI_AD3 PCI_AD5 PCI_AD7
PCI_AD8 PCI_C/BE#1 PCI_C/BE#2 PCI_C/BE#3
PCIRST#
PCI_FRAME#
PCI_TRDY#
PCI_AD9
**
JP29
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
ACES_85201-2005@
Place under MiniPCI Socket
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
Deciphered Date
Compal Electronics, Inc.
Title
MINI PCI SLOT
Size Document Number Rev
HAZ00/BL10E (LA2861) 1.0
B
Monday, August 08, 2005
Date: Sheet
of
23 42
Page 24
5
4
3
2
1
Adjustable Output
U14
4
VIN
2
SENSE or ADJ
DELAY
C362
ERROR7CNOISE
8
SD
SI9182DH-AD_MSOP8
D D
SUSP#28,29,33,38,39
C369
4.7U_0805_10V4Z
0.1U_0402_16V4Z
VOUT
GND
5 6 1 3
C606 0.1U_0402_16V4Z
R405
69.8K_0603_1%
1 2
12
R404 24K _0402_1%
AC97 Codec
+AVDD_AC97
L28
+VDDA
C C
B B
RA
A A
1 2
CHB2012U170_0805
0.1U_0402_16V4Z
1 2
SPK_SEL28 NBA_PLUG25,30
MIC30
MONO_IN25
AC_RST#15,32 AC_SYNC15,32 AC_SDOUT15,18,32
R436 0_0402_5%
1 2
C379 1U_0402_6.3V4Z
1 2
C620 0.1U_0402_16V4Z
CD_L CD_R
CD_GNA
C376 1U_0402_6.3V4Z
1 2
C616 1U_0402_6.3V4Z
1 2
C615 1U_0402_6.3V4Z
1 2
C619 0.1U_0402_16V4Z
R419 R422 R427
EAPD28
C389
1 2
C_MIC
22_0402_5%
1 2
22_0402_5%
1 2
22_0402_5%
DGND
10U_0805_10V4Z
C388
1
2
14 15 16 17 23 24 18 20 19 21 22 13 12
12
11 10
5
45 46
47 48
4 7
38
U16
AVDD125AVDD2 AUX_L AUX_R JD2
MONO_OUT/VREFOUT3 JD1 LINE_IN_L LINE_IN_R CD_L CD_R CD_GND MIC1 MIC2 PHONE PC_BEEP
RESET# SYNC SDATA_OUT SDA
XTLSEL SPDIFI/EAPD SPDIFO DVSS1
DVSS2
ALC250-VD_LQFP48
+3VS
DVDD11DVDD2
LINE_OUT_L LINE_OUT_R
HP_OUT_L
HP_OUT_R
BIT_CLK
SDATA_IN
XTL_IN
XTL_OUT
AFILT1 AFILT2
VREFOUT
VREF
DCVOL
VREFOUT2
VAUX
DISABLE#
SCK
AVSS1 AVSS2
9
35 36 37 39 41
6 8 2
3 29 30 28 27 32
31
NC
33 34 43 44
40
NC
26 42
C632
0.1U_0402_16V4Z
C635 1000P_0402_50V7K@
C634 1000P_0402_50V7K@
LINEL LINER
1 2
C633 1U_0402_6.3V4Z
1 2
C638 1U_0402_6.3V4Z
1 2
C630 27P_0402_50V8J
1 2
R429 22_0402_5%
1 2
R426 22_0402_5%
CLK_AUDIO_14M
C623 1000P_0402_50V7K C628 1000P_0402_50V7K
AGND
AGND
+VDDA
1
2
+VDDA+5VALW
C367 4.7U_0805_10V4Z
C383 10U_0805_10V4Z
CLK_AUDIO_14M 11
+AUD_VREF
AMP_LEFT AMP_RIGHT
AC_BITCLK 15,32
AC_SDIN0 15
R421 0_0603_5%
1 2 1 2
R437 10K_0402_5%
<BOM Structu re>
AMP_LEFT 25 AMP_RIGHT 25
+AVDD_AC97 +3VS
Audio Signal Bias Circuit
CD_L
INT_CD_L26
INT_CD_R26
12
R412 20K_0402_1%
12
R413 20K_0402_1%
R414
6.8K_0402_5%
1 2
C377 1U_0402_6.3V4Z
1 2
C375 1U_0402_6.3V4Z
12
12
R411
6.8K_0402_5%
CD_R
CD_AGND To CD_GNA Bypass
CD_AGND26
12
Analog Reference V
C363 0.1U_0402_16V4Z
R409 20K_0402_1%
R410 0_0402_5%
12
12
+AUD_VREF
C365
CD_GNA
R408
6.8K_0402_5%
4.7U_0805_10V4Z
DGND To AGND Bypass
R198
1 2
0_0603_5%
R187
1 2
0_0603_5%
R441
1 2
1
1
2
2
1 2
R428 0_0402_5%@
C629 0.01U_0402_16V7K
C627 1U_0402_6.3V4Z
1
2
C378 1U_0402_6.3V4Z
C621 0.1U_0402_16V4Z
DGND
0_0603_5%
AGND
WITH 14.318MHz : RA POP WITH 24.576MHz : RA DEPOP
5
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
3
Deciphered Date
Compal Electronics, Inc.
Title
AC97 CODEC ALC250D
Size Document Number Rev
HAZ00/BL10E (LA2861) 1.0
B
Monday, August 08, 2005
2
Date: Sheet
1
24 42
of
Page 25
A
B
C
D
E
SPKL+ 30 SPKR+ 30
+5VS+5VS
12
R190 100K_0402_5%
13
D
S
Q29 2N7002_SOT23
2
G
EC_EAPD 28
C617
1
0.1U_0402_16V4Z
2
+5VS
VOL_AMP VOLMAX NBA_PLUG
BYPASS
1
2
U15
10
VDD
15
SHUTDOWN#
VDD
7
VOLUME
8
VOLMAX
13
SE/BTL#
6
LIN-
3
RIN-
4
BYPASS
APA2068KAI-TRL_SOP16
MUTE
LOUT-
ROUT­LOUT+ ROUT+
GND GND
1 2
9 16 11 14
5 12
AMP_MUTE 28
SPKL­SPKR­SPKL+ SPKR+
SHUTDOWN#
W=30mil
12
R442
4 4
3 3
100K_0402_5%
NBA_PLUG
VOLMAX
12
R402 0_0402_5%
10U_0805_10V4Z
1 2 1 2
C356
1
22U_1206_16V4Z
2
VOL_AMP30
NBA_PLUG24,30
0.47U_0603_10V7K
C364
C380
1
2
AMP_LEFT24
AMP_RIGHT24
C360 1U_0402_6.3V4Z C613 1U_0402_6.3V4Z
Speaker Conn.
ACES_85204-0400
3
D5
PSOT24C_SOT23@
JP2
4 3 2 1
SPKL+
R35 0_0603_5%
EC Beep
+AVDD_AC97
12
12
R430 10K_0402_5%
2
3 1
D34
CH751H-40_SC76
2 1
R431 10K_0402_5%
1
2
Q30 MMBT3904_SOT23
C386 1U_0402_6.3V4Z
@
1 2
1U_0402_6.3V4Z R189
2.4K_0402_5%
1 2
C381
MONO_IN
MONO_IN 24
TI_BUG28
CH751H-40_SC76
R462
TI_BIG
1 2
4.7K_0402_5%
D37
+S1_VCC
2 1
2
C662
4.7U_0603_6.3V6M
1
R461
4.7K_0402_5%
1 2
1U_0402_6.3V4Z
2
C390
1U_0402_6.3V4Z
1
1 2
C385
1 2
BEEP#28
2 2
CardBus Beep
PCM_SPK#20
0.01U_0402_16V7K
C387
1 2
R199
1 2
560_0402_5%
R197
560_0402_5%
TI_BIG2#
PCI Beep
C384
1 2
SPKR15
1 2
1U_0402_6.3V4Z
R196
560_0402_5%
R440
10K_0402_5%
12
2
SPKL­SPKR+ SPKR-
TI_BIG2#
Q52
MMBT3904_SOT23
3 1
1 2
R36 0_0603_5%
1 2
R25 0_0603_5%
1 2
R26 0_0603_5%
1 2
D6
PSOT24C_SOT23@
2
3
2
1
1
1 1
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
C
Deciphered Date
Title
Size Document Number Rev
B
D
Date: Sheet
Compal Electronics, Inc.
AMP&Audio Jack
HAZ00/BL10E (LA2861) 1.0
Monday, August 08, 2005
E
25 42
of
Page 26
1 2
R339 10K_0402_1%@
R383 5.6K_0603_1% @
HDD CONNECTOR
PIDERST#15
IDE_PDDREQ16
IDE_PDIOW#16
IDE_PDIOR#16
IDE_PDDACK#16,18
IDE_PDA116 IDE_PDA016
1 2
R403
IDE_PDD[0..15]
100K_0402_5%
IDE_PDD7 IDE_PDD6 IDE_PDD5 IDE_PDD4 IDE_PDD3 IDE_PDD2 IDE_PDD1 IDE_PDD0
IDE_PDDREQ IDE_PDIOW# IDE_PDIOR#
IDE_PDDACK# IDE_PDA1
IDE_PDA0 IDE_PDCS1#
+5VS
JP25
1 3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43
OCTEK_HDS-22TA1_44P_RV
2
1
2
4
3
4
6
5
6
8
7
8
10
9
10
12
11
12
14
13
14
16
15
16
18
17
18
20
19
20
22
21
22
24
23
24
26
25
26
28
27
28
30
29
30
32
31
32
34
33
34
36
35
36
38
37
38
40
39
40
42
41
42
44
43
44
IDE_PDD8 IDE_PDD9 IDE_PDD10 IDE_PDD11 IDE_PDD12 IDE_PDD13 IDE_PDD14 IDE_PDD15
PCSEL
1 2
470_0805_5%
IDE_PDA2
IDE_PDCS3#
+5VS
R397
IDE_PDA2 16 IDE_PDCS3# 16IDE_PDCS1#16
+3VALW
IDE_PDD[0..15]16
+3VS
R386
4.7K_0402_5%
IDE_PDIORDY16
INT_IRQ1416
IDE_PDD7
IDE_PDDREQ
12
8.2K_0402_5%
INT_IRQ14
R399
1 2
PHDD_LED#28
1 2
+5VS
HAZ00 ODD CO NNECTOR
IDE_SDD[0..15]16
+5VS
R276
INT_CD_L CD_AGND
IDE_SDD7 IDE_SDD6 IDE_SDD5 IDE_SDD4 IDE_SDD3 IDE_SDD2 IDE_SDD1 IDE_SDD0
IDE_SDIOW#
IDE_SDIORDY
INT_IRQ15 IDE_SDA1 IDE_SDA0 IDE_SDCS1# SHDD_LED#
470_0805_5%
1 2
INT_CD_L24 CD_AGND24 SIDERST#15
+3VS
R302
4.7K_0402_5%
IDE_SDIORDY16
INT_IRQ1516
1 2
12
R300
8.2K_0402_5%
+5VS
SHDD_LED#28
IDE_SDIOW#16
IDE_SDA116 IDE_SDA016
IDE_SDCS1#16
1 2
R293 100K_0402_5%
1 3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43
SUYIN 200109MA044G243ZR 44P
IDE_SDD[0..15]
JP21
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44
INT_CD_R ODD_DET IDE_SDD8 IDE_SDD9 IDE_SDD10 IDE_SDD11 IDE_SDD12 IDE_SDD13 IDE_SDD14 IDE_SDD15 IDE_SDDREQ IDE_SDIOR#
IDE_SDDACK# IDE_SDA2
IDE_SDCS3#
1 2
C476
0.1U_0402_10V6K
INT_CD_R 24
R296
1 2
100K_0402_5%
IDE_SDDREQ 16
IDE_SDIOR# 16
+5VS
IDE_SDA2 16
IDE_SDCS3# 16 +5VS +5VS
R455
4.7K_0402_5%
1 2
ODD_DET 28
IDE_SDDACK# 16
1 2
R305 10K_0402_1%@
R304 5.6K_0603_1% @
12
IDE_SDD7
IDE_SDDREQ
+5VS
C373 1000P_0402_50V7K
Placea caps. near HDD CONN.
1
C372 10U_0805_10V4Z
2
1
C366 10U_0805_10V4Z
2
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1
C368 1U_0402_6.3V4Z
2
2005/03/01 2006/03/01
C374
0.1U_0402_16V4Z
Deciphered Date
Compal Electronics, Inc.
Title
IDE/ ODD CONNECTORS
Size Document Number Rev
HAZ00/BL10E (LA2861) 1.0
B
Thursday, A ugus t 04, 2005
Date: Sheet
of
26 42
Page 27
+5VALW
1
2
+5VALW
1
C3
0.1U_0402_16V4Z
2
60 mils
USB_EN#28
C294
0.1U_0402_16V4Z
60 mils
USB_EN#
USB_EN#
1 2 3 4
1.4A
U1
GND IN IN EN#
G528_SO8
U6
1 2 3 4
1.4A
GND IN IN EN#
G528_SO8
OUT OUT OUT
FLG
8 7 6 5
8
OUT
7
OUT
6
OUT
5
FLG
+USB_BS
0.1U_0402_16V4Z
+USB_AS=60 mils
+USB_AS
+USB_AS
C506
0.1U_0402_16V4Z
+USB_BS=60 mils
+USB_BS
C395
1
+
2
150U_D_6.3VM
C399
1
+
C505 150U_D_6.3VM
2
C394
0.1U_0402_16V4Z
Keep 20 mils minimum spacing between USB signals and others signals
+USB_AS
L34
1
USBP0-15 USBP0+15
USBP0­USBP0+
1
4
4
WCM2012F2S-900T04_0805
2
2
C_USB0­C_USB0+
3
3
USB CONNECTOR
JP23
1
VBUS
S_GND
2
D-
3
D+
4
GND
S_GND
TYCO_3-1470859-1
5
6
1
J3
1
JUMP_43X118@
2
2
CF14 SMD40M80
CF2 SMD40M80
FD2 FIDUCAL
USB CONNECTOR
L35
1
4
WCM2012F2S-900T04_0805
CF4 SMD40M80
1
CF3 SMD40M80
1
1
4
CF7 SMD40M80
CF5 SMD40M80
USBP2-15 USBP4- 15
USBP2+15 USBP4+ 15
CF9 SMD40M80
1
CF15 SMD40M80
1
FD5 FIDUCAL
CF12 SMD40M80
1
CF16 SMD40M80
1
FD4 FIDUCAL
CF8 SMD40M80
CF13 SMD40M80
FD1 FIDUCAL
1
1
1
1
USBP2- C_USB2- USBP4­USBP2+
CF6 SMD40M80
1
CF1 SMD40M80
1
FD6 FIDUCAL
FD3 FIDUCAL
2
2
3
1
1
C_USB2+
3
+USB_BS
H32
H_S315D118
1
H28
H_C157D157N
1
H8
H_C315D118
JP13
1
VCC
2
D0-
3
D0+
4
VSS G210G1
12
G4
TYCO_1470748-1
H20
H_S315D118
1
H16
H_C118D118N
1
H15
H_C79D79N
5
VCC
6
D1-
7
D1+
8
VSS
9 11
G3
H1
H_C118D118N
H11
H_C118D118N
H_S315D118
1
1
H27
+USB_BS
C_USB4­C_USB4+
H4
H_S295D110
1
H7
H_C177D177N
1
H21
H_S315D118
2
2
3
3
WCM2012F2S-900T04_0805
H2
H_C138D138N
H23
H_C177D177N
1
1
H9
H_S315D118
H_O276X177D276X177N
H_C315D118
L36
1
1
4
4
H3
1
H14
1
H5
H_S315D142X118
USBP4+
H18
H_C256D177
H13
H_S315D157
1
H_C118D118N
1
H6
H25
H_C256D165
H10
H_C79D79N
1
H_S315D118
1
H22
H19
H_C256D177
1
H31
H_S315D118
H24
H_C256D177
1
H30
H_S315D118
H33
H_S236D118
1
H26
H_S315D118
H34
H_S236D118
1
1
1
1
1
1
1
1
1
1
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
1
Deciphered Date
1
1
1
1
1
1
Compal Electronics, Inc.
Title
USB Conn.
Size Document Number Rev
HAZ00/BL10E (LA2861) 1.0
B
Thursday, A ugus t 04, 2005
Date: Sheet
1
of
27 42
Page 28
5
KBA[0..19]
ADB[0..7]
L20
1 2
FBM-L11-160808-800LMT_0603
D D
C C
WLANPME#19,22,23
LAN_PME#1 9, 22, 23
1394_PME#19,22, 23
+3VALW
RP18
1 8 2 7 3 6 4 5
10K_1206_8P4R_5%
+3VALW
RP19
1 8 2 7 3 6 4 5
+5VALW
B B
Analog Board ID definition, Please see page 3.
A A
Ra
Rb
100K_1206_8P4R_5%
1 2
R375 4.7K_0402_5%
1 2
R371 4.7K_0402_5%
1 2
R156 1.5K_0402_1%
1 2
R157 1.5K_0402_1%
1 2
R112 100K_0402_5%
+3VALW
R92 100K_0402_5%
1 2
R101
1 2
18K_0402_5%
PSCLK1 PSDATA1 PSCLK2 PSDATA2
MODE#
FRD# SELIO# FSEL#
EC_SMB_CK1 EC_SMB_DA1
EC_SMB_CK2 EC_SMB_DA2
100P_0402_50V8J@
ENBKL
AD_BID0
1
C284
2
KBA[0..19] 29 ADB[0..7] 29
ECAGND
C306
22P_0402_50V8J @
+3VALW
R152
10K_0402_5%
1 2
CLK_PCI_LPC14,18
12
EC_PME#
R125 10_0402_5% @
12
0.1U_0402_16V4Z
1
C309
2
0.1U_0402_16V4Z
**
1
1
C333
0.1U_0402_16V4Z
5
C332
100P_0402_50V8J@
2
2
C301 0.1U_0402_16V4Z
+3VALW
R150
1 2
20M_0603_5%@
1
C338
2
10P_0402_50V8J
32.768KHZ_12.5P_1TJS125DJ2A073
4
1
IN
OUT
NC3NC
2
12
12
R119 47K_0402_5%
CRY2CRY1
1
C342
X2
2
10P_0402_50V8J
LPC_FRAME#14,29
PM_CLKRUN#14,19 , 20,22,23
+3VALW
EC_SMB_CK129,35 EC_SMB_DA129,35
EC_SMB_CK24 EC_SMB_DA24
CAPS_LED#31
NUM_LED#31
PHDD_LED#26
C292
1
2
LPC_AD014,29 LPC_AD114,29 LPC_AD214,29 LPC_AD314,29
PCIRST#14,19,20,22,23,29
SERIRQ14,20,29
FSEL#29
IE_BTN#30
TP_CLK31
TP_DATA31
ODD_DET26 EC_SCI#15
ENBKL7 BKOFF#12
FSTCHG36
EC_SMI#15
WL_OFF#23
EC_SWI#15
LID_SW#30
MODE#30 SYSON30,33 SUSP#24 , 2 9, 33, 38,39
VR_ON40
AMP_MUTE25 PBTN_OUT#15 PADS_LED#31
GATEA2015 KBRST#15
4
0.1U_0402_16V4Z
1
C328
2
0.1U_0402_16V4Z
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
FRD#
FRD#29
FWR#
FWR#29
FSEL# SELIO# ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7 KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7 KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15 KBA16 KBA17 KBA18 KBA19 IE_BTN#
R114 100K_0402_5%
EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2
ODD_DET EC_SCI#
ENBKL BKOFF#
FSTCHG
EC_SMI#
LID_SW# MODE# SYSON SUSP# VR_ON AMP_MUTE
PADS_LED# CAPS_LED# NUM_LED#
TP_CLK
1 2
R357
TP_DATA
1 2
R358
KBA1
1 2
R372 1K_0402_5%
KBA4
1 2
R376 1K_0402_5%
KBA5
1 2
R377 1K_0402_5%
4
1
C273
2
12
PSCLK1 PSDATA1 PSCLK2 PSDATA2 TP_CLK TP_DATA
PBTN_OUT#
4.7K_0402_5%
4.7K_0402_5%
2
C315
1000P_0402_50V7K
1
U8
15
LAD0
14
LAD1
13
LAD2
10
LAD3
9
LFRAME#
165
LRST#/GPIO2C
18
LCLK
7
SERIRQ
25
CLKRUN#/GPIO0C
24
LPCPD#/GPIO0B
150
RD#
151
WR#
173
MEMCS#
152
IOCS#
138
D0
139
D1
140
D2
141
D3
144
D4
145
D5
146
D6
147
D7
124
A0
125
A1/XIOP_TP
126
A2
127
A3
128
A4/DMRP_TP
131
A5/EMWB_TP
132
A6
133
A7
143
A8
142
A9
135
A10
134
A11
130
A12
129
A13
121
A14
120
A15
113
A16
112
A17
104
A18
103
A19
108
A20/GPIO23
105
E51CS#/GPIO20/ISPEN
110
PSCLK1
111
PSDAT1
114
PSCLK2
115
PSDAT2
116
PSCLK3
117
PSDAT3
163
SCL1
164
SDA1
169
SCL2
170
SDA2
8
GPIO04
20
GPIO07
21
GPIO08
22
GPIO09
27
GPIO0D
28
GPIO0E
48
GPIO10
62
GPIO13
63
GPIO14
69
GPIO15
70
GPIO16
75
GPIO17
109
GPIO24
118
GPIO25
119
GPIO26
148
GPIO27
149
GPIO28
155
GPIO29
156
GPIO2A
162
GPIO2B
168
GPIO2D
55
FnLock#/GPIO12
54
CapLock#/GPIO011
23
NumLock#/GPIO0A
41
ScrollLock#/GPIO0F
19
ECRST#
5
GA20/GPIO02
6
KBRST#/GPIO03
31
ECSCI#
+5VS
+3VALW
+3VALW
1 2
FBM-L11-160808-800LMT_0603
2
C330 1000P_0402_50V7K
1
VCC16VCC34VCC45VCC
LPC Interface
*
*
X-BUS Interface
PS2 Interface
SMBus
GPIO
*
*
* *
MISC
3
L23
1
C290
2
0.1U_0402_16V4Z
ECAGND
95
123
136
157
166
VCC
VCC
VCC
159
96
161
VCCA
AGND
VCCBAT
BATGND
FAN2PWM/GPOW2/PWM2
Pulse Width
FAN1PWM/GPOW7/PWM7
Wake Up Pin
ENE-KB910-B4
Analog To Digital
Digital To Analog
Expanded I/O
GPIO2E/TOUT1/FANFB1
DPLL_TP/GPIO06/FANFB3
FAN
TEST_TP/GPIO05/FAN3PWM
Timer Pin
E51RXD/GPIO21/ISPCLK E51TXD/GPIO22/ISPDAT
GND17GND35GND46GND
GND
GND
122
137
167
Security Class i f ication
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PR OPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. A ND CONTAIN S CONFIDENT IAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF T HE COMPETEN T DIVISION O F R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SH EET NOR THE INFORMATION IT CONTAIN S MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRON ICS, INC.
3
GPOK0/KSO0 GPOK1/KSO1 GPOK2/KSO2 GPOK3/KSO3 GPOK4/KSO4 GPOK5/KSO5 GPOK6/KSO6 GPOK7/KSO7 GPOK8/KSO8
GPOK9/KSO9 GPOK10/KSO10 GPOK11/KSO11 GPOK12/KSO12 GPOK13/KSO13 GPOK14/KSO14 GPOK15/KSO15 GPOK16/KSO16 GPOK17/KSO17
GPIK0/KSI0 GPIK1/KSI1 GPIK2/KSI2 GPIK3/KSI3 GPIK4/KSI4
Internal Keyboard
GPIK5/KSI5 GPIK6/KSI6 GPIK7/KSI7
GPOW0/PWM0 GPOW1/PWM1
GPOW3/PWM3 GPOW4/PWM4 GPOW5/PWM5 GPOW6/PWM6
GPWU0 GPWU1 GPWU2 GPWU3 GPWU4 GPWU5
TIN1/GPWU6
TIN2/FANFB2/GPWU7
GPIAD0/AD0 GPIAD1/AD1 GPIAD2/AD2 GPIAD3/AD3 GPIAD4/AD4 GPIAD5/AD5 GPIAD6/AD6 GPIAD7/AD7
GPODA0/DA0
GPODA1/DA1
GPODA2/DA2
GPODA3/DA3
GPODA4/DA4
GPODA5/DA5
GPODA6/DA6
GPODA7/DA7
GPIO18/XIO8CS#
*
GPIO19/XIO9CS#
*
GPIO1A/XIOACS#
*
*
GPIO1B/XIOBCS# GPIO1C/XIOCCS#
*
GPIO1D/XIODCS#
*
GPIO1E/XIOECS#
*
GPIO1F/XIOFCS#
*
TOUT2/GPIO2F E51IT0/GPIO00
E51IT1/GPIO01
XCLKI
XCLKO
KB910Q B4_LQFP176
0.1U_0402_16V4Z
2005/03/01 2006/03/01
1
C327
2
KSO0
49
KSO1
50
KSO2
51
KSO3
52
KSO4
53
KSO5
56
KSO6
57
KSO7
58
KSO8
59
KSO9
60
KSO10
61
KSO11
64
KSO12
65
KSO13
66
KSO14
67
KSO15
68 153
KSO17
154 71
72 73 74 77 78 79 80
INVT_PWM
32
BEEP#
33
PWR_S USP _LED
36
ACOFF
37
USB_EN#
38
EC_ON
39
EC_LID_OUT#
40
EC_EAPD
43 2
26
KILL_SW#
29 30 44 76
EC_PME#
172
HDD_PWRD
176
BATT_TEMP
81
SKU_ID1
82
BATT_OVP
83 84
ALI/MH#
87 88
AD_BID0
89 90
DAC_BRIG
99 100
IREF
101
EN_DFAN1#
102 1 42 47 174
PWR_LED#
85 86
HDD_LED#
91
BATT_LOW_LED#
92
BATT_CHGI_LED#
93
EAPD
94 97 98
FAN_SPEED1
171 12
1 2
R133 1K_0402_5%
11
EC_THRM#
175 3
4 106 107
158 160
+3VALW
R155 0_0805_5%
1 2
1
C339 1U_0402_6.3V4Z
2
KSO0 31 KSO1 31 KSO2 31 KSO3 31 KSO4 31 KSO5 31 KSO6 31 KSO7 31 KSO8 31 KSO9 31
KSO10 31 KSO11 31 KSO12 31 KSO13 31 KSO14 31 KSO15 31
KSO17 30
KSI0
EC_PLAYBTN# 30,31
KSI1
EC_STOPBTN# 30,31
KSI2
EC_FRDBTN# 30,31
KSI3
EC_REVBTN# 30,31
KSI4
KSI4 31
KSI5
KSI5 31
KSI6
KSI6 31
KSI7
KSI7 31
INVT_PWM 12 BEEP# 25
ACOFF 36
USB_EN# 27
EC_ON 30 EC_LID_OUT# 15 EC_EAPD 25
ON/OFF 30
PM_SLP_S3# 15 PM_SLP_S5# 15
BATT_OVP 36 ALI/MH# 35,36
DAC_BRIG 12 IREF 36
EN_DFAN1 32
PWR_LED# 30
WL_BT_LED# 30 HDD_LED# 30 BATT_LOW_LED# 30 BATT_CHGI_LED# 30 EAPD 24 TI_BUG 25
FAN_SPEED1 32 SPK_SEL 24 EC_THRM# 15
EC_RSMRST# 15
E51_RXD E51_TXD
CRY2 CRY1
Compal Secret Data
SHDD_LED# 26
Deciphered Date
PWR_SUSP_LED 30
KILL_SW# 23,30
SKU_ID1 30
2
+3VALW
C272 0.01U_0402_16V7K
1 2
R93
1 2
C271 0.22U_0603_16V4Z
2
R116 10K_0402_5%
1 2
D13
2 1
CH751H-40_SC76
ECAGND
12
100K_0402_5%
R310
12
10K_0402_5%
1
For EC Tools
JP6
1
1
E51_RXD
2
2
E51_TXD
3
3
4
4
ACES_85205-0400@
KSI[0..7] KSO[0..15]
ACIN 30,34
BATT_TEMPA 35
ADP_I 36
+S1_VCC
Compal Electronics, Inc.
Title
ENE-KB910
Size Document Number Re v
HAZ00/BL10E (LA2861) 1.0
Custom
Monday, August 08, 2005
Date: Sheet
KSI[0..7] 30,31 KSO[0..15] 31
SKU_ID1
HDD_PWRD
0: NO 1: YES
1
+3VALW
+3VALW
100K_0402_5%
1 2
+3VALW
1 2
1 2
R91
R459
10K_0402_5% @
R460
10K_0402_5%
28 42
of
Page 29
EC_SMB_CK128,35 EC_SMB_DA128,35
FWE#
SN74LVC32APWLE_TSSOP14
C341
1 2
0.1U_0402_16V4Z
6
U12B
+5VALW
+3VALW
O
1 2
14
P
A B
G
7
C324
0.1U_0402_16V4Z
U11
8 7 6 5
AT24C16AN-10SI-2.7_SO8
4 5
VCC WP SCL SDA
A0 A1 A2
GND
+3VALW
12
R170 100K_0402_5%
+5VALW
12
R145 100K_0402_5%
1 2 3 4
12
R158
100K_0402_5%
INT_FSEL#
R178
1 2
22_0402_5%
Reserve R4, if U1B is single gate.
2
G
1 3
D
Q28 2N7002_SOT23
S
SUSP# 24,28,33,38,39
EC_FLASH# 15
FWR# 28
3
O
+3VALW
14
1
P
A
2
B
G
7
U12A SN74LVC32APWLE_TSSOP14
R177
1 2
0_0402_5%@
INT_FLASH_EN# FSEL#
R176 100K_0402_5%
1 2
FSEL# 28
LPC Debug Port
+5VS +3VS
JP30
1
1
2
2
3
3
4
4
5
5
CLK_14M_SIO
6
6
LPC_AD0
7
7
LPC_AD1
8
8
LPC_AD2
9
9
LPC_AD3
10
10
LPC_FRAME#
11
11
LPC_DRQ1#
12
12
PCIRST#
13
13
1 2
14
14
R458 0_0402_5%@
15
15
SERIRQ
16
16
17
17
18
18
19
19
20
20
ACES_85201-2005@
LPC_AD[0..3]14,28
CLK_14M_SIO 11 LPC_AD0 14,28 LPC_AD1 14,28 LPC_AD2 14,28 LPC_AD3 14,28
LPC_FRAME# 14,28
LPC_DRQ#1
CLK_PCI_SIO
PCIRST# 14 ,1 9 ,20,22,23,28
CLK_PCI_SIO 14,18
SERIRQ 14,20,28
close to Moden Conn.
LPC_AD[0..3]
CLK_PCI_SIO
@
22_0402_5%
10P_0402_50V8K@
R457
C658
1 2
1
2
KBA[0..19]28 ADB[0..7]28
KBA[0..19] ADB[0..7]
1MB Flash ROM
1 2
+3VALW
1
C352
0.1U_0402_16V4Z
2
SB_INT_FLASH_SEL tie to ATI SB GPIO1 and pull down
+3VALW
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SB_INT_FLASH_SEL15
2005/03/01 2006/03/01
Deciphered Date
1MB ROM Socket
KBA16 KBA15 KBA14 KBA13 KBA12 KBA11 KBA9 KBA8 FWE# RESET# INT_FLASH_EN# SB_INT_FLASH_SEL KBA18 KBA7 KBA6 KBA5 KBA4 KBA3 KBA2 KBA1
JP8
SUYIN_80065AR-040G2T@
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
KBA17
KBA19 KBA10 ADB7 ADB6 ADB5 ADB4
ADB3 ADB2 ADB1 ADB0 FRD#
FSEL# KBA0
+3VALW
Compal Electronics, Inc.
Title
BIOS& I/O PORT
Size Document Number Rev
HAZ00/BL10E (LA2861) 1.0
B
Monday, August 08, 2005
Date: Sheet
of
29 42
KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7 KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15 KBA16 KBA17 KBA18 KBA19
INT_FSEL#
FRD#28
FRD# FWE#
U13
21
A0
20
A1
19
A2
18
A3
17
A4
16
A5
15
A6
14
A7
8
A8
7
A9
36
A10
6
A11
5
A12
4
A13
3
A14
2
A15
1
A16
READY/BUSY#
40
A17
13
A18
37
A19
22
CE#
24
OE#
9
WE#
SST39VF080-70_TSOP40
VCC0 VCC1
RP#
NC0 NC1
GND0 GND1
31 30
ADB0
25
D0 D1 D2 D3 D4 D5 D6 D7
NC
ADB1
26
ADB2
27
ADB3
28
ADB4
32
ADB5
33
ADB6
34
ADB7
35
RESET#
10 11 12 29 38
23 39
R179 100K_0402_5%
Page 30
5
4
3
2
1
Switch Board Conn.
+3VALW
PWR_LED_1# PWR_SUSPLED#
SKU_ID128
KSO1728
D D
EC_PLAYBTN#28,31 EC_STOPBTN#28,31
EC_FRDBTN#28,31
EC_REVBTN#28,31
SKU_ID1 ON/OFFBTN#
IEBTN# MODEBTN# EC_PLAYBTN# EC_STOPBTN# EC_FRDBTN# EC_REVBTN#
JP3
1 2 3 4 5 6 7 8 9 10 11 12
ACES_85201-1205
KSO17 ON/OFFBTN# PWR_LED_1# PWR_SUSPLED# IEBTN# MODEBTN# EC_REVBTN# EC_FRDBTN# EC_PLAYBTN# EC_STOPBTN#
C173 220P_0402_50V7K
1 2
C179 220P_0402_50V7K
1 2
C168 220P_0402_50V7K
1 2
C153 220P_0402_50V7K
1 2
C160 220P_0402_50V7K
1 2
C178 220P_0402_50V7K
1 2
C181 220P_0402_50V7K
1 2
C169 220P_0402_50V7K
1 2
C146 220P_0402_50V7K
1 2
C167 220P_0402_50V7K
1 2
100K_0402_5%
R447
12
R446
12
120_0402_5% R445
12
470_0402_5%
KILL_SW# WL_PW LID_PW
+AUD_VREF
+5VS
KILL_SW#23,28
WL_BT_LED#28
NBA_PLUG24,25
LID_SW#28
VOL_AMP25
VR Conn.
SPKR+25 SPKL+25
MIC
MIC24
R448
1 2
2.2K_0402_5%
1 2
R443 100K_0402_5%
1 2
R444 4.53K_0603_1%
KILL_SW# WL_PW WL_BT_LED# LID_PW
+AUD_VREF1
VOL_CTRL2 VOL_CTRL1
VOL_AMP
NBA_PLUG SPKR+ SPKL+ LID_SW#
JP28
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
ACES_85201-1605
+3VALW
2
G
1 3
D
S
2 3
D15
2 1
SYSON
PWR_SUSPLED#
PWR_SUSPLED1#
+3VALW
R246 100K_0402_5%
1 2
51_ON#
DTA114YKA_SC59
PWR_SUSP_LED 28 PWR_LED# 28
IE_BTN# 28
13
D
Q50
ACIN28,34
2
G
2N7002_SOT23
S
47K
10K
1 3
+3VALW
SUSPLEDS#
R48
R50
IEBTN#
R194
1 2
C C
B B
Q13
2N7002_SOT23
2
Q12
DTA114YKA_SC59
Change from 300 to 120
1 2
120_0402_5%
1 2
120_0402_5%
1
D27 DAN202U_SC70
AC IN LED
120_0402_5%
HT-191UYG-DT_GRN_0603
BATTERY CHG
+3VALW
Q11
47K
PWR_LEDS
1 3
2N7002_SOT23
2
10K
Change from 120 to 300
R49
1 2
R47
1 2
Q14
1 3
D
120_0402_5%
120_0402_5%
2
G
S
PWR_LED#PWR_SUSP_LED
PWR_LED_0#
PWR_LED_1#
SYSON 28,33
1 2
SW6
5
6
SMT1-05_4P
EC_ON28
3 4
ON/OFFBTN#
EC_ON
4.7K_0402_5%
R247
1 2
POWER/ON LED
MODEBTN#
1
D25 DAN202U_SC70
2 3
51_ON#
MODE# 28
51_ON# 34
PWR_SUSPLED1#
PWR_LED_0#
+3VS
R195
1 2
2 1
HT-191UD_AMBER_0603
2 1
HT-191UYG-DT_GRN_0603
120_0402_5%
D16
D35
HDD LED
D18
2 1
HT-191UYG-DT_GRN_0603
100K_0402_5%
D26
1
CHN202U_SC70
2
+3VALW
R244
1 2
3 2
13
D
G
S
2N7002_SOT23
Power Button
51_ON#
1000P_0402_50V7K
C455
Q38
HDD_LED# 28
ON/OFF 28 51_ON# 34
D24
12
MMGZ5248B_LL34
2 1
A A
+3VALW
R192
1 2
120_0402_5%
R193
1 2
120_0402_5%
5
2 1
D17 HT-191UD_AMBER_0603
2 1
HT-191UYG-DT_GRN_0603
D36
BATT_LOW_LED#
BATT_CHGI_LED#
BATT_LOW_LED# 28
BATT_CHGI_LED# 28
4
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
2005/03/01 2006/03/01
Compal Secret Data
Deciphered Date
2
Compal Electronics, Inc.
Title
Kill SW/ Sub Conn./LEDS
Size Document Number Re v
HAZ00/BL10E (LA2861) 1.0
Custom
Thursday, August 04, 2005
Date: Sheet
1
of
30 42
Page 31
5
4
3
2
1
KSI[0..7] KSO[0..15]
D D
TP CONN.
TP_DATA28
TP_CLK28
C C
TP_DATA TP_CLK
Touchpad mount direction: Standard: N/A, Reverse: Stuff
TP_CLK
1
C259
180P_0402_50V8J@
2
TP_DATA
1
C258
180P_0402_50V8J@
2
ACES_87151-0405
D10 DAN217_SC59@
1
1
D9 DAN217_SC59@
+5VS
JP4
4 3 2 1
2 3
2 3
C183
0.1U_0402_16V4Z
+5VS
INT_KBD CONN.
JP5
1 2 3 4
KSO15
5
KSO14
6
KSO10
7
KSO11
8
KSO8
9
KSO9
10
KSO13
11
KSI7
12
KSO3
13
KSO7
14
KSO12
15
KSI4
16
KSI6
17
KSI5
18
KSO6
19
KSO5
20
KSI3
21
KSI0
22
KSO0
23
KSO1
24
KSI1
25
KSI2
26
KSO2
27
KSO4
28 29 30 31 32 33 34
ACES_88170-3400
KSI[0..7] 28,30 KSO[0..15] 28
NUM_LED# 28 PADS_LED# 28 CAPS_LED# 28
1 2
1 2
1 2
R298300_0402_5%
R299300_0402_5%
+3VS
R297300_0402_5%
+3VS
+3VS
KSO7
C241 100P_0402_25V8K
KSO6
C236 100P_0402_25V8K
KSO5
C235 100P_0402_25V8K
KSO4
C227 100P_0402_25V8K
KSO3
B B
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
C242 100P_0402_25V8K
KSI4
C239 100P_0402_25V8K
KSO2
C228 100P_0402_25V8K
KSO1
C231 100P_0402_25V8K
KSO0
C232 100P_0402_25V8K
KSI5 KSI6
C238 100P_0402_25V8K
KSI7 KSO8
C246 100P_0402_25V8K
2005/03/01 2006/03/01
Compal Secret Data
Deciphered Date
KSO15 KSO14 KSO13 KSO12 KSI0 KSO11 KSO10 KSI1 KSI2 KSO9 KSI3 PADS_LED# NUM_LED# CAPS_LED#
2
C250 100P_0402_25V8K C249 100P_0402_25V8K C244 100P_0402_25V8K C240 100P_0402_25V8K C233 100P_0402_25V8K C247 100P_0402_25V8K C248 100P_0402_25V8K C230 100P_0402_25V8K C229 100P_0402_25V8K C245 100P_0402_25V8KC237 100P_0402_25V8K C234 100P_0402_25V8K C252 100P_0402_25V8KC243 100P_0402_25V8K C253 100P_0402_25V8K C251 100P_0402_25V8K
Compal Electronics, Inc.
Title
KB/Touch Pad& hibernation
Size Document Number Re v
HAZ00/BL10E (LA2861) 1.0
Custom
Thursday, August 04, 2005
Date: Sheet
1
of
31 42
Page 32
A
B
C
D
E
FAN Conn
2
B
1 2
+5VS
1
C
Q36 FMMT619_SOT23
E
3
12
D23 1N4148_SOT23
FAN1
+3VALW
12
D22 1SS355_SOD323
2
C170
1000P_0402_50V7K@
1
2
1
C171 1000P_0402_50V7K@
12
C449 10U_1206_16V4Z
JP17
3 2 1
ACES_85205-0300
14
9
P
A
8
O
10
B
G
7
U12C SN74LVC32APWLE_TSSOP14
+3VALW
14
12
P
A
11
O
13
B
G
7
U12D SN74LVC32APWLE_TSSOP14
1
U22A
LM358A_SO8
+12VALW
OUT
8
P
3
+IN
2
-IN G
4
+12VALW
1 2
C446
0.1U_0402_16V4Z
R239
10K_0402_5%
EN_DFAN1
12
1 1
2 2
EN_DFAN128
5
+IN
6
-IN
1 2
R240 8.2K_0402_5%
OUT
U22B LM358A_SO8
7
EN_FAN1
1 2
R241 100_0402_5%
+3VS
2
C448
0.1U_0402_16V4Z@
1
R41 10K_0402_5%
FAN_SPEED128
MDC CONN.
JP27 TYCO_1-1775149-2~D
1
R183 22_0402_5%
AC_SDOUT15,18,24
AC_SYNC15,24
AC_SDIN115
AC_RST#15,24
3 3
4 4
1 2
R181
1 2
R184
1 2
R185 22_0402_5%
1 2
22_0402_5% 22_0402_5%
GND1
3
IAC_SDATA_OUT
5
GND2
7
IAC_SYNC
9
IAC_SDATA_IN
11
IAC_RESET#
IAC_BITCLK
GND13GND14GND15GND16GND17GND
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
RES0
4
RES1
6
3.3V
8
GND3
10
GND4
12
18
Connector for MDC Rev1.5
2005/03/01 2006/03/01
C
1 2
R186 22_0402_5%
Deciphered Date
+3VALW
AC_BITCLK 15,24
+3VALW
1
C353
0.1U_0402_16V4Z
2
Title
Size Document Number Rev
B
D
Date: Sheet
+3VALW
1
C350 1U_0402_6.3V4Z
2
Compal Electronics, Inc.
FAN & MDC
HAZ00/BL10E (LA2861) 1.0
Thursday, A ugus t 04, 2005
E
32 42
of
Page 33
A
B
C
D
E
+1.8VALW TO +1.8VS
+1.8V
Q19
8
D
1 1
7
D
6
D
5
D
SI4800BDY_SO8
1
C208
2
4.7U_0805_10V4Z
S S S G
1 2 3 4
1
C222
2
0.1U_0402_16V7K
+1.8VS
1
C226
2
1U_0402_6.3V4Z
13
D
S
2
1
R58
1 2
100K_0402_1%
2
G
Q18 2N7002_SOT23
C225 10U_0805_10V4Z
+12VALW
SUSP
Q17
+5VALW
R52
470_0805_5%
1 2 13
D
2
G
S
2N7002_SOT23
Q46
8
D
7
D
6
D
5
D
SI4800BDY_SO8
1
C607
2
4.7U_0805_10V4Z
+5VALW TO +5VS
+5VS
C625
1
S
2
S
3
S
4
G
1U_0402_6.3V4Z
1
C618
2
0.1U_0402_16V7K
4.7U_0805_10V4Z
1
2
13
D
2
G
Q45
S
2N7002_SOT23
1
C624
2
R417
1 2
6.8K_0402_5%
SUSP
+12VALW
Q47
R418
2
G
470_0805_5%
1 2 13
D
S
2N7002_SOT23
+1.8VALW TO +1.8V
SUSP
+5VALW
R55 10K_0402_5%
1 2 13
D
S
Q16 2N7002_SOT23
2
G
1 2
SYSON#
SYSON28,30
SYSON#
R54
10K_0402_5%
+5VALW
R56 10K_0402_5%
1 2 13
D
S
Q15 2N7002_SOT23
2
G
1 2
2 2
+1.8VALW +1.8V
S S S
G
C27
1 2 3 4
1
2
0.1U_0402_16V7K
1U_0402_6.3V4Z
C26
Q4
8
D
7
D
6
D
5
D
SI4800BDY_SO8
1
C16
2
4.7U_0805_10V4Z
1
C24 4.7U_0805_10V4Z
2
1 2
13
D
2
G
Q7
S
2N7002_SOT23
1
2
R18 100K_0402_1%
SYSON#
+12VALW
R24
470_0805_5%
1 2 13
D
2
G
Q9
S
2N7002_SOT23
SUSP39
SUSP#24,28,29,38,39
R53
10K_0402_5%
3 3
+3VALW TO +3VS
+3VALW +3VS
1
S S S
G
A
C608
1 2 3 4
1
2
0.1U_0402_16V7K
2
1U_0402_6.3V4Z
D
C611
S
13
Q48
8
D
7
D
6
D
5
D
SI4800BDY_SO8
1
C622
2
4.7U_0805_10V4Z
4 4
1
C610 4.7U_0805_10V4Z
2
R416
1 2
68K_0402_1%
2
G
Q51 2N7002_SOT23
+12VALW
SUSP
Q49
R415
2
G
470_0805_5%
1 2 13
D
S
2N7002_SOT23
B
+1.2VS +0.9VS
R39
470_0805_5%
1 2 13
D
S
2N7002_SOT23
SUSP SUSP
2
G
Q10
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
R109
470_0805_5%
1 2
@
13
D
2
G
Q25
S
2N7002_SOT23
@
2005/03/01 2006/03/01
C
+1.8VS
1 2 13
D
S
Deciphered Date
R60 470_0805_5%
SUSP
2
G
Q20 2N7002_SOT23
Compal Electronics, Inc.
Title
DC-DC INTERFACE
Size Document Number Rev
HAZ00/BL10E (LA2861) 1.0
B
Monday, August 08, 2005
D
Date: Sheet
E
33 42
of
Page 34
A
DC301000F00
PJP1
1
1
2
2
3
SINGA_2DW-0005-B03@
1 2
560_0603_5%
3 4
PR20
4
51_ON#30
1 1
2 2
+CHGRTC
DC_IN_S1 DC_IN_S2
BATT+
CHGRTCP
PR21
1 2
560_0603_5%
PF1
7A_24VDC_429007.WRML
PD3
12
1N4148_SOD80
1 2
PR11 200_0603_5%
100K_0402_1%
PR14 22K_0402_1%
RTCVREF
PR13
1 2
12
3.3V
12
PC10 10U_0805_10V4Z
21
12
PC1
1000P_0402_50V7K
PU2 G920AT24U_SOT89
3
OUT
N1
12
PC7
0.22U_1206_25V7M
GND
1
IN
12
PQ1
TP0610K-T1-E3_SOT23
2
12
PR16 200_0603_5%
2
12
PC9
1U_0805_25V4Z
PL1
1 2
FBM-L18-453215-900LMA90T_1812
PC2
100P_0402_50V8J
PR9
68_1206_5%
N2
VIN
1N4148_SOD80
1 2 12
13
12
PD2
12
PR155 68_1206_5%
PC8
0.1U_0603_25V7K
PD5 RLZ16B_LL34
2 1
12
VS
PC3 1000P_0402_50V7K
B
VIN
12
PC4 100P_0402_50V8J
MAINPWON4,15,35,37,38
ACON36
PC5
1000P_0402_50V7K
12
2 3
VIN
12
PR3
84.5K_0402_1%
12
PR6 20K_0402_1%
VIN
VL
PD6
1
RB715F_SOT323
1 2
PR5 22K_0402_1%
12
PC6
0.1U_0402_16V7K
PD4
12
1N4148_SOD80
1 2
100K_0402_1%
PR17
1000P_0402_50V7K
1 2
PR1 1M_0402_1%
VS
8
PU1A
3
P
+
O
2
-
G
LM393M_SO8
4
PR8
12
10K_0402_5%
1 2
PR10 1K_1206_5%
N3
1 2
PR12 1K_1206_5%
1 2
PR15 1K_1206_5%
LM393M_SO8
PC12
C
1
RTCVREF
3.3V
PU1B
7
O
12
1000P_0402_50V7K
PD1
RLZ4.3B_LL34
PR18
8
5
P
+
6
-
G
4
PC13
VS
12
PR2
5.6K_0402_5%
12
12
2.2M_0402_5%
12
12
PR22 34K_0402_1%
PR24
66.5K_0402_1%
PR4 1K_0402_5%
12
PR7 10K_0402_5%
12
VL
1 2
PACIN
ACIN 28,30
PACIN 36,37
Vin Detector
High 18.384 17.901 17.430 Low 17.728 17.257 16.976
B+
12
PR19 499K_0402_1%
12
PR25 191K_0402_1%
PR23 499K_0402_1%
12
D
12
PC11 1000P_0402_50V7K
3 3
PJ1
+3VALWP +3VALW
+5VALWP +5VALW
+12VALWP +12VALW
(120mA,40mils ,Via NO.= 2)
(5A,200mils ,Via NO.= 10) (4.5A,180mils ,Via NO.= 9)
4 4
2
112
(5A,200mils ,Via NO.= 10)
(5A,200mils ,Via NO.= 10)
JUMP_43X118@
PJ3
2
112
JUMP_43X118@
PJ5
2
112
JUMP_43X39 @
PJ7
2
112
JUMP_43X79 @
A
+1.8VALWP +1.8VALW
+1.5VSP +1.5VS
(0.1A,20mils ,Via NO.=1)
(2A,80mils ,Via NO.= 4)
+1.05VS+1.05VSP +1.2VS+1.2VSP
PJ2
2
112
JUMP_43X118@
(6A,240mils ,Via NO.= 12)
PJ4
2
112
JUMP_43X118@
PJ6
2
112
JUMP_43X118@
PJ8
2
112
JUMP_43X118@
+0.9VS+0.9VSP
PQ2
13
D
2N7002-7-F_SOT23-3
2
PR26 47K_0402_5%
Precharge detector
15.97V/14.84V FOR ADAPTOR
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Compal Secret Data
Deciphered Date
C
2006/03/012005/03/01
G
S
13
PQ3 DTC115EUA_SC70
2
Title
Size Document Number Re v
Date: Sheet
PACIN
12
+5VALWP
Compal Electronics, Inc.
DCIN & DETECTOR
D
0.3
of
34 42Thursday, August 04, 2005
Page 35
A
B
C
D
PH1 under CPU botten side :
CPU thermal protection at 84 degree C Recovery at 45 degree C
VL VS
12
PF2
12A_65VDC_451012
1 2
47K_0402_5%
PR37
6.49K_0402_1%
21
PR30
12
1 1
PJP2
SUYIN_250005MR007G132ZR@
BATT+
SMD SMC GND
1
ALI/NIMH#
2
ID
AB/I
3
B/I
TS
TS_A
4
EC_SMDA
5
EC_SMCA
6 7
PR33
100_0402_5%
1 2
BATT_S1
1K_0402_5%
PR34
100_0402_5%
1 2
PR39
1K_0402_5%
PR28
1 2
PR32
12
1K_0402_5%
2 2
+3VALWP
VMB
PL2
1 2
FBM-L18-453215-900LMA90T_1812
12
PC15 1000P_0402_50V7K
ALI/MH# 28,36
+3VALWP
BATT_TEMPA 28
EC_SMB_DA1 28,29
12
PC16
0.01U_0402_25V
PR31
PC14
TM_REF1
12
PC18
1000P_0402_50V7K
12
3 2
12
PR38 100K_0402_1%
1 2
8
47K_0402_1% PU3A
P
+
-
G
LM393M_SO8
4
PR36
100K_0402_1%
12
0.1U_0603_25V7K
PH1
100K_0603_1%_TH11-4H104FT
1 2
13.7K_0402_1%
12
12
PC17
0.22U_0805_16V7K
PR35
22K_0402_1%
PH2 near main Battery CONN :
BAT. thermal protection at 79 degree C Recovery at 45 degree C
12
O
PR29
VL
PR27 47K_0402_1%
1 2
1
PD7
1SS355_SOD323
12
2
13
PQ4 DTC115EUA_SC70
MAINPWON 4,15,34,37,38BATT+
VL
EC_SMB_CK1 28,29
1
PD20
BAS40-04_SOT23@
2
3
3 3
+5VALW
1
PD21 BAS40-04_SOT23@
2
3
PC19
0.22U_0805_16V7K
12
PH2
12
100K_0603_1%_TH11-4H104FT
1 2
10.7K_0402_1%
12
PR43 22K_0402_1%
PR42
TM_REF1
5
+
6
-
1 2
47K_0402_1%
PR41
8
PU3B
P
O
G
LM393M_SO8
4
7
VLVL
PR40 47K_0402_1%
1 2
PD8
1SS355_SOD323
12
4 4
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Compal Secret Data
Deciphered Date
C
2006/03/012005/03/01
Title
Size Document Number Re v
Date: Sheet
Compal Electronics, Inc.
BATTERY CONN / OTP
D
35 42Thursday, August 04, 2005
0.3
of
Page 36
A
P2
PQ6 AO4407_SO8
VIN
1 1
12
PR46 47K_0402_5%
2
13
D
PQ12
2
2N7002-7-F_SOT23-3
G
S
2 2
PACIN34,37
ACON34
8 7
5
47K
2
47K
13
PQ10 DTC115EUA_SC70
ACOFF#
PACIN
1 3
1SS355_SOD323
1 2
PR57 3K_0402_1%
ACON
1 2 36
4
PQ8
DTA144EUA_SC70
PC23
0.1U_0603_25V7K
150K_0402_1%
PD9
1 2
PR53
12
2
G
PQ7 AO4407_SO8
1 2 3 6
12
PR45
200K_0402_1%
12
PC26
13
D
PQ13 2N7002-7-F_SOT23-3
S
4
12
0.1U_0402_16V7K
12
IREF28
8 7
5
ADP_I28
PR51 10K_0402_1%
12
162K_0402_1%
1 2
100K_0402_1%
IREF=1.31*Icharge
P3
12
PR50 30K_0402_1%
PC29
0.1U_0402_16V7K
PR56
12
PR61
1 2
4700P_0402_25V7K
1 2
1000P_0402_50V7K
12
PC33
0.1U_0402_16V7K
IREF=0.73~3.3V
+3VALWP
12
PR64 47K_0402_5%
2
13
PQ15 DTC115EUA_SC70
3 3
FSTCHG28
2
OVP voltage : LI
4S1P/4S2P : 17.4V--> BATT_OVP= 1.935V 3S2P : 13.05V--> BATT_OVP= 1.45V
(BAT_OVP=0.1111 *VMB)
BATT_OVP28
4 4
CS
13
PQ14 DTC115EUA_SC70
12
PR68
2.21K_0402_1%
LM358A_SO8
PU5A
1
+5VALWP
0
VMB
12
PR66 340K_0402_1%
12
PR67 499K_0402_1%
8
3
P
+
2
-
G
4
105K_0402_1%
PR69
12
B
Iadp=0~3.125A
PR44
12
0.02_2512_1%
12
PR49 100K_0402_1%
PC27
PR52
1 2
10K_0402_5%
PC30
PR54
1 2
1K_0402_5%
12
PR59 10K_0402_5%
PR154
1 2
VL
100K_0402_1%
ALI/MH#28,35
DTC115EUA_SC70
12
PC37
0.01U_0402_25V
B+
PU4
1
-INC2
2
OUTC2
3
+INE2
4
-INE2
5
FB2
6
VREF
7
FB1
8
-INE1
9
+INE1
10
OUTC1
11
OUTD
12
-INC1
MB3387PFV-ERE1_SSOP24~N
S
G
2
13
2
PQ39
2
24
+INC2
23
GND
22
CS
21
VCC(o)
20
OUT
19
VH
18
VCC
17
RT
16
-INE3
15
FB3
14
CTL
13
+INC1
PQ38
D
2N7002-7-F_SOT23-3
13
PJ9
112
JUMP_43X118@
CS
1 2
PC28
0.1U_0603_25V7K
1 2
PR55
68.1K_0402_1%
PR60
1 2
47K_0402_5%
ACON
PR62
12
150K_0603_0.1%
PR65
12
300K_0603_0.1%
12
PC20
4.7U_1206_25V6K
PC24
0.022U_0402_16V7K
1 2
PC25
1 2
0.1U_0603_25V7K
1 2
PC31
0.1U_0603_25V7K
PC32
1 2
1500P_0402_50V7K
4.2V
C
PQ5
AO4407_SO8
1 2 3 6
B++
DH_CHG
12
PC22
4.7U_1206_25V6K
36
578
241
PQ9 AO4407_SO8
LX_CHG
PR48
10K_0402_5%
ACOFF#
1 2 13
DTC115EUA_SC70
CC=0.5~3.1A CV=16.8V(4/8 CELLS LI-ION)
12
PC21
4.7U_1206_25V6K
PR47
1 2
47K_0402_5%
2
PQ11
4
8 7
5
VIN
ACOFF 28
D
CV=12.6V(6 CELLS LI-ION)
PL3
1 2
16UH_D104C-919AS-160M_3.7A_20%
12
12
ALI/MH#
0V
0V
3.3V
PD10 EC31QS04
ISE_CHG+
PR63
300K_0603_0.1%
BATT Type Charge Current IREF
4 CELL 1.5A
8 CEL L 3A 3.144V
6 CELL 3A 3.144V
PR58
1 2
0.02_2512_1%
12
PC34
4.7U_1206_25V6K
1.572V
4.7U_1206_25V6K
12
PC35
4.7U_1206_25V6K
BATT+
12
PC36
Triggle Charg e 5 00mA IREF=0.524V
PU5B
LM358A_SO8
7
A
5
+
0
6
-
B
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Compal Secret Data
Deciphered Date
C
2006/03/012005/03/01
Title
Size Document Number Re v
Date: Sheet
Compal Electronics, Inc.
CHARGER
D
36 42Monday, August 08, 2005
of
0.3
Page 37
5
4
3
2
1
N4
B+++
PL11
D D
1 2
B+
FBM-L18-453215-900LMA90T_1812
4.7U_1206_25V6K
PC41
12
4.7U_1206_25V6K
12
PC42
D8D7D6D
S1S2S3G
5
4
5
D8D7D6D
S1S2S3G
12
PC49
12
47P_0402_50V8J
10U_LF919AS-100M-P3_4.5A_20%
PL4
C C
+3VALWP
1
150U_D2E_6.3V_R18
+
PC53
2
B B
1M_0402_1%
PD14
SKUL30-02AT_SMA
2 1
PR77
1 2
3.32K_0402_1% PR82
1.87K_0402_1%
1 2
1 2
4
PR73
3.74K_0402_1%
PR78
0_0402_5%
12
VSE_3V
PR85 10K_0402_1%
PC40
1 2
0.1U_0603_25V7K
PQ16
SI4800DY-T1-E3_SO8
PR71 0_0603_5%
DH_3V-2
PQ18 SI4810DY-T1-E3_SO8
DL_3V
12
12
PC51
PR75
0.47U_0603_16V7K
1 2
12
PACIN34,36
PC54 100P_0402_50V8J
1 2
VS
47K_0402_5%
0.1U_0603_25V7K @
12
LX_3V
PR79
1.24K_0402_1%
1 2
PR80
10K_0402_5%
PR83
PC59
BST_3V
12
DH_3V-1
ISE_3V+ ISE_3V-
12
12
PC47
0.1U_0603_25V7K
PU6
25
BST3
27
DH3
26
LX3
24
DL3
1
CSH3
2
CSL3
3
FB3
10
SKIP#
23
SHDN#
7
TIME/ON5
28
RUN/ON3
12
PC56 1000P_0402_50V7K
PR87 220K_0402_5%
12
PC60
0.47U_0603_16V7K
VS
PD13
1SS355_SOD323
1 2
22
V+
12
2
3
PD12 DAP202U_SOT323
1
VL
12
PC46
4.7U_0805_6.3V6K
21
4
12OUT
VL
5
VDD
18
BST5
16
DH5
17
LX5
19
DL5
20
PGND
14
CSH5
13
CSL5
12
FB5
15
SEQ
9
REF
6
SYNC
11
RST#
GND
MAX1902AEAI_SSOP28
8
VL
MAINPWON 4,15,34,35,38
BST_5V
+12VALWP
12
PC48
1U_0805_25V4Z
12
PC122
1U_0805_25V4Z
POK
+2.5VREF
12
PC55
4.7U_0805_6.3V6K
PC43
1 2
0.1U_0603_25V7K
PC52
0.47U_0603_16V7K
10.2K_0402_1%
VSE_5V
PC44
4.7U_1206_25V6K
LX_5V
12
PR84
12
PR74 0_0603_5%
12
PR81 576_0402_1%
12
12
PR86
10K_0402_1%
B+++
12
4.7U_1206_25V6K
12
DL_5V
12
PC45
DH_5V-2DH_5V-1
SI4810DY-T1-E3_SO8
PC57 100P_0402_50V8J
1 2
PQ19
ISE_5V+
PC39 470P_0805_100V7K
12
PR70 22_1206_5%
5
PQ17
D8D7D6D
SI4800DY-T1-E3_SO8
S1S2S3G
4
1.27K_0402_1%
5
D8D7D6D
S1S2S3G
4
FLYBACKSNB
PR72
12
PC50 47P_0402_50V8J
12
PR76 2M_0402_1%
PC38
1 2
12
PD11
4.7U_1210_25V
EC11FS2_SOD106
PT1
10UH_SDT-1403P-100-120GP_4.5A
1 4
3 2
12
1
150U_D2E_6.3V_R18
+
PC58
2
SKUL30-02AT_SMA
2 1
+5VALWP
PD15
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Deciphered Date
2006/03/012005/03/01
Title
Size Document Number Re v
2
Date: Sheet
Compal Electronics, Inc.
3V / 5V / 12V
37 42Thursday, Augus t 0 4, 2005
1
0.3
of
Page 38
A
B
C
D
PL12
1 2
PC61
12
4.7U_1206_25V6K
D8D7D6D
S1S2S3G
D8D7D6D
S1S2S3G
5
PQ20
SI4800DY-T1-E3_SO8
4
DH_1.8V-2
5
0.1U_0402_16V7K PQ22 SI4810DY-T1-E3_SO8
4
PC70
1 2
PR96
1 2
2K_0402_1%
DL_1.8V
1 1
+1.8V
+1.8VALWP
1
+
PC72 220U_6.3V_M_R13
2
2 2
PR94
10.2K_0402_1%
1.8U_D104C-919AS-1R8N_9.5A_30%
0.01U_0402_25V
12
12
PC73
PR95 0_0402_5%
1 2
1 2
PL5
PR157
4.7_1206_5%
PC123
680P_0603_50V8J
LX_1.8V
1 2
1 2
PC62
12
4.7U_1206_25V6K
12
PD16
DAP202U_SOT323
2
BST_1.8V-1
PR90
12
1 2
2.2_0603_5%
PR92 0_0603_5%
PC65
1
4.7U_0805_6.3V6K
3
BST_1.2V-1
PC68
12
12
4700P_0402_25V7K
6
5 4
ISE_1.8V ISE_1.2V
7 2
3
12
9
10
8
15 11
PR107 100K_0402_1%
12
PR103
10K_0402_1%
1 2
VSE_1.8V
PR105
0_0402_5%@
MAINPWON4,15,34,35,37 SUSP# 24,28 ,29,33,39
+3VALW
1 2
PR100
47K_0402_1%@
1 2
PR156
47K_0402_1%
12
PC76
0.1U_0402_16V7K@
PR88
0_1206_5%
12
PC66
0.1U_0603_25V7K
PU7
SOFT1
BOOT1
UGATE1 PHASE1
ISEN1 LGATE1
PGND1
VOUT1 VSEN1 EN1 PG1
OCSET1
12
PC63
12
4.7U_1206_25V6K
+5VALW
12
17
23
24 25
22 27
26
20 19 21 16
18
PR106
PC67
2.2U_0805_10V6K
PC69
12
0.01U_0402_25V
BST_1.2V-2BST_1.8V-2
1 2
PR91
2.2_0603_5%
DH_1.2V-1 DH_1.2V-2DH_1.8V-1
12
0.1U_0402_16V7K
PR93
1 2
0_0603_5%
PR97 2K_0402_1%
1 2
12
PC71
12
LX_1.2V
PQ23
SI4810DY-T1-E3_SO8
DL_1.2V
1 2
PR101
PC77
10K_0402_1%
0.1U_0402_16V7K@
5
4
5
4
PQ21
D8D7D6D
SI4800DY-T1-E3_SO8
S1S2S3G
D8D7D6D
1 2
S1S2S3G
1 2
PR89
2.2_0603_5%
1 2
14
28
VCC
SOFT2
VIN
BOOT2
UGATE2 PHASE2
ISEN2
LGATE2
PGND2
VOUT2 VSEN2
EN2
PG2/REF
GND
1
OCSET2
DDR
ISL6227CAZ-T_SSOP28
13
100K_0402_1%
FBM-L18-453215-900LMA90T_1812
12
PC64
4.7U_1206_25V6K
1 2
PR158
4.7_1206_5%
PC124 680P_0603_50V8J
PL6
1.8U_D104C-919AS-1R8N_9.5A_30%
PR98
0_0402_5%
VSE_1.2V
PR102
0_0402_5%@
1 2
1 2
B+
0.01U_0402_25V PC75
12
2.21K_0402_1%
PR99
+1.2V
12
12
PR104
6.49K_0402_1%
+1.2VSP
1
+
PC74 220U_6.3V_M_R13
2
3 3
4 4
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Compal Secret Data
Deciphered Date
C
2006/03/012005/03/01
Title
Size Document Number Re v
Date: Sheet
Compal Electronics, Inc.
1.8V / VGA_CORE
D
38 42Thursday, August 04, 2005
0.3
of
Page 39
5
4
3
2
1
+1.2VS
+5VS
D D
7
PR111
0_0402_5%
SUSP#24,28,29,33,38
PJ14
0.1U_0402_16V7K@
112
JUMP_43X118 @
1 2
PC84
2
12
0_0402_5%
SUSP#24,28,29,33,38
C C
+3VALWP +1.5VSP
B B
POK
8
EN
PU8 APL5912-KAC-TRL_SO8~N
12
PC88 1U_0603_6.3V6M
12
PR117
12
PC78
1U_0603_6.3V6M
6
5
VIN
3
VOUT
VCNTL
4
VOUT
2
FB
9
VIN
GND
1
PU10
1
IN
2
GND SHDN3BYP
G914GF_SOT23-5
PC94
0.1U_0402_16V7K@
1 2
1
PJ12
1
JUMP_43X79
@
2
2
12
PC79 22U_1206_6.3V6M
+1.05VSP
12
PC85
12
PR113 1K_0402_1%
12
0.01U_0402_25V
12
PC90 1U_0603_6.3V6M
PC80
22U_1206_6.3V6M
PR112
316_0402_1%
5
OUT
4
12
PC93
0.33U_0603_10V7K
1
12
150U_D2E_6.3VM_R18@
+
PC83
2
+1.8V
1
PJ13
1
JUMP_43X118@
2
2
12
PC86
10U_1206_6.3V7K
PR115
0_0402_5%
SUSP33
1 2
0.1U_0402_16V7K@
PC92
13
D
2
G
S
12
12
PR114
1K_0402_1%
12
PQ28 2N7002-7-F_SOT23-3
PR116
1K_0402_1%
12
PC89
0.1U_0402_16V7K
PU9
VIN1VCNTL
2
GND
3
VREF
4
VOUT
APL5331KAC-TRL_SO8
+0.9VSP
12
PC91 10U_1206_6.3V7K
6 5
NC
7
NC
8
NC
9
TP
+3VALWP
12
PC87 1U_0603_6.3V6M
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Deciphered Date
2006/03/012005/03/01
Title
Size Document Number Re v
2
Date: Sheet
Compal Electronics, Inc.
1.5V / 1.25V / 1.2V
39 42Thursday, Augus t 0 4, 2005
1
0.3
of
Page 40
CPU_STP#4,11,14
DPRSLPVR14
VR_ON28
1 2
VSE_CPU
1 2
PR142 100K_0402_1%
PSI#5
PR141
68.1K_0402_1%
PQ32
2
G
PR136 0_0402_5%
1 2
1 2
PR139 200K_0402_1%
13
D
PR144
RHU002N06_SOT323
S
PR146
0_0402_5%
1 2
CPU_VID05 CPU_VID15 CPU_VID25 CPU_VID35 CPU_VID45 CPU_VID55
VGATE16
12
1 2
10.7K_0402_1%
+5VS
PR150
100K_0402_1%
2
B
1U_0603_6.3V6M
PR137 30.1K_0402_1%
PC111
1 2
270P_0402_50V7K
1 2
PC113 0.22U_0805_16V7K
PC115
PQ33
2
100P_0402_50V8J
G
1 2
1
C
E
3
HMBT2222A_SOT23
13
D
S
1 2
PR148
20K_0402_1%
PQ37
PC104
1 2
12
RHU002N06_SOT323
1 2
PC116
PR149
10K_0402_1%
1 2 13
D
PQ36
2
RHU002N06_SOT323
G
S
12
PR121 10_0402_5%
VCC
VCC
27P_0402_50V8J
10 24 23 22 21 20 19 25
12
18 11
+5VS
PU12
VCC D0 D1 D2 D3 D4 D5 VROK
4
S0
5
S1
6
SHDN#
1
TIME CCV
2
TON
8
REF
9
ILIM
7
OFS
3
SUS SKIP GND
MAX1532AETL+T_TQFN40
VDD
BSTM
DHM
LXM DLM
PGND
CMP CMN
OAIN+
OAIN-
BSTS
DHS LXS DLS CSP CSN
GNDS
FB
CCI
V+
PC105
2.2U_0603_6.3V6K
1 2
30 36
BST_CPU1-1
26 28 27 29 31 37 38 17 16 15 14
PC112 470P_0402_50V8J
35 33 34 32
ISE_CPU2+
40
ISE_CPU2-
39 13
PD18
EP10QY03
2 1
12
PC106
PR124
2.2_0603_5%
DH_CPU1-1 DH_CPU1-2 LX_CPU1 DL_CPU1
ISE_CPU1+ ISE_CPU1-
OAIN+ OAIN-
VSE_CPU
1 2
BST_CPU2-1 DH_CPU2-1 LX_CPU2 DL_CPU2
0.01U_0402_25V
12
BST_CPU1-2
12
PC107
0_0603_5%
PR145
1 2
BST_CPU2-2
12
PC119
0.22U_0805_16V7K PR126
2.2_0603_5%
0_0603_5%
0.22U_0805_16V7K
12
IRF7821PBF_SO8
PR147
12
IRF7832PBF_SO8
EP10QY03
PQ34
DH_CPU2-2
PQ35
CPU_B+ B+
1
12
5
PQ30
D8D7D6D
IRF7821PBF_SO8
S1S3G
S
4
2
5
PQ31
D8D7D6D
IRF7832PBF_SO8
S1S3G
S
4
2
PR138 909_0402_1%
1 2
+5VS
21
PD19
5
D8D7D6D
S1S3G
S
4
2
5
D8D7D6D
S1S3G
S
4
2
12
PC102
4.7U_1206_25V6K
PR131
4.7_1206_5%
1 2
PC108 680P_0603_50V8J
1 2
12
PC117
4.7U_1206_25V6K
PR151
1 2
PC120
1 2
12
PC118
4.7_1206_5%
680P_0603_50V8J
+
PC100
220U_25V_M@
2
PC103
4.7U_1206_25V6K
PL9
1 2
0.56UH_ETQP4LR56WFC_21A_20%
12
PC110
1 2
PR132 909_0402_1%
0.47U_0603_16V7K
2200P_0402_50V7K
CPU_B+
4.7U_1206_25V6K
0.56UH_ETQP4LR56WFC_21A_20%
12
PR152 909_0402_1%
1 2
PC114
PL10
1 2
1 2
PC121
0.47U_0603_16V7K
1 2
PL8
1 2
FBM-L18-453215-900LMA90T_1812
PR128
1 2
0.001_2512_5%
12
PR133 499_0402_1%
2.7K_0402_1%
1 2
PR140
PR143
0_0402_5%
PR134 499_0402_1%
12
PR135
2.7K_0402_1%
+CPU_CORE
CPU VCC SENSE
1 2
1 2
@
PC109
1000P_0402_50V7K
909_0402_1%
1 2
PR153
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
Compal Secret Data
Deciphered Date
2006/03/012005/03/01
Title
Size Document Number Re v
Date: Sheet
Compal Electronics, Inc.
CPU_CORE
40 42Monday, August 08, 2005
0.3
of
Page 41
5
4
3
2
1
0.1==>0.2
Writed by Timo
Date Page Action Purpose 6/12
6/12
10
9
Add C642, C643 and C644 Add C645, C646 and C647
For Increase the DDR bypass capaciotrs
For Increase the DDR bypass capaciotrs
12 Modify JP18 circuit Making TV out function become correct
D D
24 Del @ on R436 Solving MDC issue and sound slow issue
Add @ on R317 Metting ATI reference circuit15
26 Del R306 (move to sub board) To differentiate between HAZ00 and HTW01 BIOS 28 Add @ on Super I/O circuit For DVT build 29 Modify pin74 net-name of KB910 Solv ing reserve button no function 31 Modify D16, D17
Add D35, D36 Change from double colors to signal color LED
6/22 27 Add H34, H33 For Me update new drawing
0.2==>0.3
7/8 8
Writed by Timo
Add C648, C649 and C650 Seperate the AVDD and DVDD for TVout and CRT
17 Add C651~C657
Change C585, C587, C566, C533, C560, C573, C536 from
C C
7/11
34 Change C225 from 4.7 to 10U 25 Del R456
10 to 4.7U
For height limited of SB For height limited of SB
Add Q52 For insert card bus device beep sound issue. Del R449~R45427 For EMI request
7/13
Del Super I/O circuit 29 Add JP30, R457, C658 For LPC debug port 23 ADD JP29, R456 For Port80 Debug card connector 28 ADD R459, R460 For HDD password detect pin 12 ADD J1, J4 22 27
0.3==>1.0
B B
ADD J2
ADD J3 For EMI request
Writed by Timo
25 Add C662, R461, D37, R462, Q52 For Insert card bus device PoPo noise sound7/28 29 Change R101 from 8.2k to 18kohm For Board ID change
14 17
Change C587, C585, C651, C652, C566, C553, C560, C573, C653, C654, C655, C656, C536, C657 from 4.7U to 1U
Change C288 from 150U fo 470UF Add C660, C661
For avoide the interfere area of HDD Making the capacitors of 1.8VS source blance of SB Making the capacitors of 1.8VALW and 3VS
sources blance of SB
7/30
A A
4
Add @ in C261 For throttle issue
5
Add @ in C180 For cost down Add L38, L39, L40 For EMI issue12
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Deciphered Date
2006/03/012005/03/01
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
PIR
41 42Monday, August 08, 2005
1
1.0
of
Page 42
5
4
3
2
1
EVT
page 37 12V noise Change PC38 from 4.7u_1206_25V to 4.7u_1210_25V 37 Lead free parts Change PC53,PC58 to NEC lead free parts.
D D
38 Modify 1.8V power sequence for HW requirement Change PR100 from 0_0402_5% to 47K_0402_1%
39 Modify 1.05V circuit Delete PQ24,PQ26,PL7,PD17,PC82,PC81,PR109,PQ25,PQ27,PR110
39 Delete reserved 1.5V circuit Delete PU11,PC95,PR118,PR120,PQ29,PR119,PC99,PC97,PC98,PC96 39 Change 1.5V IC Change PU10 from APL5151 to G914 40 Add snubber for CPU CORE Add 4.7_1206_5% to PR131,PR151
C C
Reason for change Modify list
Add 0.1u_0402_16V at PC76
Change PU8 to APL5912-KAC-TRL Change PC85 to 0.01u_0402_25V Change PR112 to 316_0402_1% Change PR13 to 1K_0402_1%
Add 680P_0603_50V to PC108,PC120
Add bead at 3V/5V and 1.2V/1.8V input
Add PL11,PL12 to replace PJ10,PJ1137,38
for EMI requirement
DVT
34 Change VS resistor to 33 ohm Change PR9 from 47_1206_5% to 33_1206_5%
34 Change 1N4148 to lead free P/N Change PD2,PD3,PD4 P/N to SC11N414880
40 Change HMBT2222 to lead free P/N Change PQ37 P/N to SB322220080
38 Raise 1.8V to 1.82V for HW requirement Change PR94 from 10K_0402_1% to 10.2K_0402_1%
PVT
34 Change VS resistor to standard part Change PR9 from 33_1206_5% to 68_1206_5%
Add 68_1206_5% at PR155
38 Change 1.8VALWP power sequence for
B B
HW requirement
Change 47K_0402_1% from PR100 to PR156 Delete PC76 Change PC68 from 0.01u_0402_25V to 4700P_0402_25V
Pre-MP
38 Add BOOST 2.2 ohm and snubber at
1.8V / 1.2V for EMI
42 Change CPU CORE mosfet for EMI Chan ge PQ30,PQ34 from AO4408 to IRF7821
42 Delete CPU VID 0 ohm debug resistor Delete PR122,PR123,PR125,PR127,PR129,PR130
A A
5
4
Add 4.7_1206_5% to PR157,PR158 Add 680P_0603_50V to PC123,PC124 Change PR90,PR91 from 0_0603_5% to 2.2_0603_5%
Change PQ31,PQ35 from AO4410 to IRF7832
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Deciphered Date
2006/03/012005/03/01
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
PIR
42 42Thursday, August 04, 2005
1
0.3
of
Page 43
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