COMPAL LA-2831 Schematics

Page 1
A
1 1
2 2
B
C
D
E
WT2 HAR00 LA-2831 Schematic
3 3
4 4
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
C
2005/03/11 2006/03/11
Deciphered Date
Title
Size Document Number Rev
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
,
星期一
06, 2006
三月
E
D
of
159
Page 2
5
4
3
2
1
Compal confidential
Block Diagram
15.4" LCD Dothan
D D
DDR333 8Mx16x2
page 45
Flash memory 1Mx8
page 40
Image Processor LVDS Rx
PW172A-10VL THC63LVDF84B
SBUS video
EXT IO TE7782
C C
LVDS
Video Engine
Chromakey
XILINX XC3S400
RGB:8:8:8 RGB:6:6:6
page 38,39
page 41
page 43,44,47
MPEG4 DECODER
EM8475
page 35,36,46
page 42
SDRAM 2Mx32
page 37
CRT CONN.
& TV-OUT/D Conn.
LVDS
3.3V 33MHz
uFCPGA CPU
HA#(3..31)
System Bus
400 / 533MHz
Alviso Intel 915 GM
GMCH-M
1257 FC-BGA
page 5,6,7
HD#(0..63)
page 8,9,10,11,12
Memory BUS(DDR II) Dual Channel
1.8V 400MHz
Channel A
1.8V 400MHz
Channel B
SO-DIMM X 1
BANK 0, 1
SO-DIMM X 1
BANK 0, 1
page 13
page 14
Clock Generator
ICS
page 17
Fan Control X1
LED/B
SW LED BD
T/P
DMI
TV Module
PCI-IF
page 26
+3VS +2.5VS +1.5VS
IDSEL:AD17 (PIRQA/B#,GNT#2,REQ#2)
CardBus Controller
B B
1394 CONN.
page 25
R5C841
SDIO CONN.
SD/MS/xD Combo Slot
page 25
MINI PCI
page 24,25
Slot 0
page 25
page 26
3.3V 33MHz
PCI BUS
10/100 LAN Ctrl.
RTL 8100CL
page 23
Transformer
& RJ45
page 23
3.3V 33MHz
PCIE Card
page 24
PCI-E
LPC BUS
3.3V 33MHz
X BUS
SST39VF080
A A
5
page 31
4
1.5V 100MHz
KB910
Int.KBD
ICH6M
609 BGA
page 18,19,20,21,22
page 30
3.3V 24.576MHz
PATA100 SATA
SATA
SATA TO PATA SATA TO PATA
page 22 page 22
CDROM
page 22
1st. HDD
page 22 page 22
48MHz / 480Mb
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
USB2.0
2005/03/11 2006/03/11
3
2nd. HDD
USBPORT 0 USBPORT 1 USBPORT 2 USBPORT 3 USBPORT 4 USBPORT 5 USBPORT 6 USBPORT 7
Compal Secret Data
Deciphered Date
JUSBP0 JUSBP1 JUSBP2 JUSBP3 PCIE Card
Video Engine
Touch Pad Remote Ctr.
2
page 24
page 42
page 31
page 29
MDC
page 32
AC-LINK
AC97 CODEC
AD1981B
page 27
AMP &
Phone/ MIC
page 28
Jack
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
星@, 06, 2006
薑三月
DC IN
BATT IN/+2.5V
1.5V/1.05V(+VCCP)
5V/3.3V/15V
1.8V / 0.9V
VCORE
CHARGER
of
1
259
D
Page 3
5
4
3
2
1
I2C / SMBUS ADDRESSING
External PCI Devices
D D
LAN CARD BUS
IDSEL #
AD17 AD20
0
1 Cardreader 1394 Wireless LAN(MINI PCI)
AD16 2 AD18
3
PIRQREQ/GNT #DEVICE
F A B E G,H
Power Managment table
Signal
State
S0
S1
S3
S5 S4/AC
S5 S4/AC don't exist
+12VALW +3V +3VALW +5VALW
ON
+2.5V +5V
+12V
ON ON
ON ON ON
ON ON
ON OFF
OFF OFF OFF
+CPU_CORE +VCCP +5VS
+3VS +2.5VS +1.8VS +1.25VS +1.5VS
OFF
OFF
PCB Rev
Bringup-Build
ES-Build
PP-Build
MP1-Build
MP-Build
0.1
SCHEMATICS VERSION LIST
Data
VERSION ISSUE DATE REMARK
C C
Ceramic Capacitor Spec Guide:
Temperature Characteristics:
9
C0G
Z5V
1
Z5P
A
BJ
Symbol
CODE
0
Z5U
8
NP0 SH
3
2
Y5U X7R
C
B
CH
4
Y5V Y5P
CJ
5
E
D
CK
X5R
0.0A
6
7
F
G
SJ
First Release
I
H
UK
UJ
J
SL
Tolerance:
Symbol
B B
SMBUS Control Table
SOURCE
SMB_EC_CK1 SMB_EC_DA1
SMB_EC_CK2 SMB_EC_DA2
ICH_SMBCLK ICH_SMBDATA
A A
LCD_DDCCLK LCD_DDCDATA
PC87591L
PC87591L
ICH6-M
Alviso GM-GP
5
INVERTER BATT
SERIAL SENSOR EEPROM
THERMAL (CPU)
4
THERMAL SENSOR (LM75)
SODIMM CLK CHIP
CODE
+-10%
A
+-0.05PF
M
KQ
+-20%
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
+-0.1PF
N
+-30%
MINI PCI
C
+-0.25PF
+100,-0%
2005/03/11 2006/03/11
3
+-0.5PF +-1PF
P
+30,-10%
LCD
D
VGA Thermal
F
V
+20,-10%
ADM1032
Compal Secret Data
G
+-2%
X
+40,-20%
Deciphered Date
H
+-3%
Z
+80,-20%
J
+-5%
2
Title
Size Document Number Rev
Date: Sheet
SCHEMATIC, M /B LA-2831
, 06, 2006
三月
401362
星期一
359
1
of
Compal Electronics, Inc.
D
Page 4
ACIN
5
4
3
2
1
+3/5/12VALW
D D
32ms
ON/OFF#
8.5/2.44/3.792ms
t<=10 ms
EC_ON
t=100 ms
PWRBTN_OUT#
438ms
364us
t=109 ms
SYSON
+12/3/5V
3/5V 400us 2.5V(1.8ms)
C C
RSMRST#
7.856ms t<110 ms
117ms
PM_SLP_S3/4/5#
SUSP#
1.5/1.8/2.5/3/5VS
+VCCP
VR_ON#
1.25VS(104us) 1.5VS(2.64ms) 3VS(7.044ms) 5VS(10.26ms) 2.5VS(4.966ms)
92.88ms
t>0
2.166ms
1.3ms PGD
5.6ms
B B
CPU_VID
+CPU_CORE
Vgate
SYSPOK(ICH_PWRGD) PCIRST/PLTRST#
726us
815.2us
t<110 ms
99ms
t<100 us
1.036ms
2<t<3 RTCCLK
61us
CPU_RST#(H_RESET#)
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/11 2006/03/11
3
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M /B LA-2831
, 06, 2006
三月
401362
星期一
459
1
D
of
Page 5
5
4
3
2
1
H_A#[3..31]8
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8
CLK_CPU_BCLK CLK_CPU_BCLK#
ITP_DBRESET#
H_PROCHOT#
R634
1 2
1K_0402_5%@
R707
1 2
1K_0402_5%@
H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_ADSTB#0 H_ADSTB#1
CPU_CK_ITP CPU_CK_ITP#
H_ADS# H_BNR# H_BPRI# H_BR0# H_DEFER# H_DRDY# H_HIT# H_HITM# H_IERR# H_LOCK# H_RESET#
H_RS#0 H_RS#1 H_RS#2 H_TRDY#
ITP_BPM#0 ITP_BPM#1 ITP_BPM#2 ITP_BPM#3
H_DBSY# H_DPSLP# H_DPRSLP#
ITP_BPM#4 ITP_BPM#5
H_CPUSLP# ITP_TCK ITP_TDI ITP_TDO TEST1 TEST2 ITP_TMS ITP_TRST#
H_THERMDA H_THERMDC
D D
H_REQ#[0..4]8
CLK_ITP_R#
R664 0_0402_5% R662 0_0402_5%
CLK_ITP17 CLK_ITP#17
1 2 1 2
@ @
1 2
CLK_ITP CLK_ITP#
R71056_0402_5%
H_RS#[0..2]8
H_ADSTB#08 H_ADSTB#18
R661 0_0402_5%@
1 2
R663 0_0402_5%@
1 2
CLK_CPU_BCLK17 CLK_CPU_BCLK#17
H_ADS#8 H_BNR#8 H_BPRI#8 H_BR0#8 H_DEFER#8 H_DRDY#8 H_HIT#8 H_HITM#8
H_LOCK#8 H_RESET#8
H_TRDY#8
H_DBSY#8 H_DPSLP#19 H_DPRSLP#19 H_DPWR#8
H_PWRGOOD19
H_CPUSLP#8,19
T72 PAD T34 PAD
H_THERMDA32 H_THERMDC32 H_THERMTRIP#8,19
TEST2
TEST1
CLK_ITP_R
C C
+VCCP
B B
A A
JCPU1A
P4
A3#
U4
A4#
V3
A5#
R3
A6#
V2
A7#
W1
A8#
T4
A9#
W2
A10#
Y4
A11#
Y1
A12#
U1
A13#
AA3
A14#
Y3
A15#
AA2
A16#
AF4
A17#
AC4
A18#
AC7
A19#
AC3
A20#
AD3
A21#
AE4
A22#
AD2
A23#
AB4
A24#
AC6
ADDR GROUP
A25#
AD5
A26#
AE2
A27#
AD6
A28#
AF3
A29#
AE1
A30#
AF1
A31#
R2
REQ0#
P3
REQ1#
T2
REQ2#
P1
REQ3#
T1
REQ4#
U3
ADSTB0#
AE5
ADSTB1#
A16
ITP_CLK0
A15
ITP_CLK1
B15
BCLK0
B14
BCLK1
N2
ADS#
L1
BNR#
J3
BPRI#
N4
BR0#
L4
DEFER#
H2
DRDY#
K3
HIT#
K4
HITM#
A4
IERR#
J2
LOCK#
B11
RESET#
H1
RS0#
K1
RS1#
L2
RS2#
M3
TRDY#
C8
BPM0#
B8
BPM1#
A9
BPM2#
C9
BPM3#
A7
DBR#
M2
DBSY#
B7
DPSLP#
G1
DPRSTP#
C19
DPWR#
A10
PRDY#
B10
PREQ#
B17
PROCHOT#
E4
PWRGOOD
A6
SLP#
A13
TCK
C12
TDI
A12
TDO
C5
TEST1
F23
TEST2
C11
TMS
B13
TRST#
B18
THERMDA
A18
THERMDC
C17
THERMTRIP#
TYCO_1612365-1_Dothan
Dothan
DATA GROUP
HOST CLK
CONTROL GROUP
MISC
THERMAL DIODE
LEGACY CPU
D10# D11# D12# D13# D14# D15# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63#
DINV0# DINV1# DINV2# DINV3#
DSTBN0# DSTBN1# DSTBN2# DSTBN3# DSTBP0# DSTBP1# DSTBP2# DSTBP3#
A20M# FERR#
IGNNE#
INIT# LINT0 LINT1
STPCLK#
SMI#
D0# D1# D2# D3# D4# D5# D6# D7# D8# D9#
A25 A22 B21 A24 B26 A21 B20 C20 B24 D24 E24 C26 B23 E23 C25 H23 G25 L23 M26 H24 F25 G24 J23 M23 J25 L26 N24 M25 H26 N25 K25 Y26 AA24 T25 U23 V23 R24 R26 R23 AA23 U26 V24 U25 V26 Y23 AA26 Y25 AB25 AC23 AB24 AC20 AC22 AC25 AD23 AE22 AF23 AD24 AF20 AE21 AD21 AF25 AF22 AF26
D25 J26 T24 AD20
C23 K24 W25 AE24 C22 L24 W24 AE25
C2 D3 A3 B5 D1 D4
C6 B4
H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3
H_A20M# H_FERR# H_IGNNE# H_INIT# H_INTR H_NMI
H_STPCLK#
H_SMI#
H_DINV#0 8 H_DINV#1 8 H_DINV#2 8 H_DINV#3 8
H_A20M# 19 H_FERR# 19 H_IGNNE# 19 H_INIT# 19 H_INTR 19 H_NMI 19
H_STPCLK# 19 H_SMI# 19
H_D#0
A19
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
H_D#[0..63] 8
Test pad as closed as posible
ITP_DBRESET# ITP_TDO ITP_BPM#0 ITP_BPM#1
Place near JITP 0.5"
H_RESET#
ITP_TDO
R678
22.6_0402_1% 1 2
R673
22.6_0402_1% 1 2
ITP_BPM#2 ITP_BPM#3 ITP_BPM#4 ITP_BPM#5 ITP_TCK
CLK_ITP_R
ITP_TRST# ITP_TMS ITP_TDI
Check ITP connector.
R646 56_0402_5%
H_DSTBN#[0..3] 8
H_DSTBP#[0..3] 8
R715 200_0402_5%
1 2
+VCCP
2005/03/11 2006/03/11
Compal Secret Data
Add pullups for PWRGOOD and THERMTRIP per INTEL
H_PWRGOOD
Deciphered Date
2
T73PAD T71PAD T70PAD T69PAD T66PAD T64PAD T65PAD
T63PAD T58PAD
T55PAD T61PAD
T59PAD T67PAD T62PAD
+VCCP
12
R647 56_0402_5%
12
H_PROCHOT#
Date: Sheet
+3V
R708
150_0402_5%
1 2
+VCCP
54.9_0603_1%
1 2
R692 56_0402_5%
+VCCP
37.4_0402_1%
1 2
150_0402_5%
1 2
680_0402_5%
1 2
27.4_0402_1%
1 2
+3VS
12
R640 1K_0402_5%
1
C
Q42
2
B
2SC2411K_SC59
E
3
Title
Size Document Number Rev
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
星@, 06, 2006
薑三月
R674
R679
54.9_0603_1%
1 2 1 2
R693
R675
This shall place near CPU
R669
R668
401362
ITP_DBRESET#
H_RESET# ITP_BPM#5
39.4
ITP_TMS
ITP_TDI
ITP_TRST#
ITP_TCK
1
PROCHOT# 30
of
559
D
Page 6
5
D D
For test onl y ,Cmos output
CPU Voltage ID
H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5
C C
B B
R727 0_0402_5% R732 0_0402_5% R731 0_0402_5% R730 0_0402_5% R729 0_0402_5% R728 0_0402_5%
12 12 12 12 12 12
1 2
@
+VCCP
R737 10K_0402_5%
R738 10K_0402_5%
R227 0_0402_5%
@
12
1 2
R736 10K_0402_5%
@
R228 0_0402_5%
R739 10K_0402_5%
@
@
@
12
12
12
12
R229 0_0402_5%
1 2
@
OPEN OPEN OPEN OPEN OPEN OPEN
+VCCP
R_A
12
+V_CPU_GTLREF
R631 1K_0402_1%
R_B
12
R630 2K_0402_1%
4
R740 10K_0402_5%
R735 10K_0402_5%
@
@
12
R230 0_0402_5%
1 2
@
Layout close CPU
Layout Note: 500 mil max length
R633
1 2
@
20 mils
12
27.4_0402_1% R632
+1.5VS
R231 0_0402_5%
5 mils
12
54.9_0402_1%
1 2
@
20 mils
12
27.4_0402_1%
R717
R232 0_0402_5%
54.9_0402_1%
R718
VCCSENSE56
VSSSENSE56
+VCCA_PROC
1
C605
2
0.01U_0402_16V7K
VID0 56 VID1 56 VID2 56 VID3 56 VID4 56 VID5 56
H_PSI#56
5 mils
12
Resistor placed within
0.5" of CPU pin.Trace should be at least 25 miles away from any other toggling signal.
3
R697 0_0402_5%
12
R709 0_0402_5%
12
R701
54.9_0402_1%@
54.9_0402_1%@
1
C607
2
10U_1206_6.3V6M
CPU_BSEL017 CPU_BSEL117
1 2 1 2
R705
+CPU_CORE
+V_CPU_GTLREF
VCCSENSEC VSSSENSEC
+VCCP
T79 PAD T80 PAD T35 PAD T68 PAD T84 PAD
H_PSI# H_VID0
H_VID1 H_VID2 H_VID3 H_VID4 H_VID5
CPU_BSEL0 CPU_BSEL1
COMP0 COMP1 COMP2 COMP3
JCPU1B
AE7
VCCSENSE
AF6
VSSSENSE
F26
VCCA0
B1
VCCA1
N1
VCCA2
AC26
VCCA3
P23
VCCQ0
W4
VCCQ1
D10
VCCP
D12
VCCP
D14
VCCP
D16
VCCP
E11
VCCP
E13
VCCP
E15
VCCP
F10
VCCP
F12
VCCP
F14
VCCP
F16
VCCP
K6
VCCP
L5
VCCP
L21
VCCP
M6
VCCP
M22
VCCP
N5
VCCP
N21
VCCP
P6
VCCP
P22
VCCP
R5
VCCP
R21
VCCP
T6
VCCP
T22
VCCP
U21
VCCP
D6
VCC
D8
VCC
D18
VCC
D20
VCC
D22
VCC
E5
VCC
E7
VCC
E9
VCC
E17
VCC
E19
VCC
E21
VCC
F6
VCC
F8
VCC
F18
VCC
E1
PSI#
E2
VID0
F2
VID1
F3
VID2
G3
VID3
G4
VID4
H4
VID5
AD26
GTLREF
C16
BSEL0
C14
BSEL1
P25
COMP0
P26
COMP1
AB2
COMP2
AB1
COMP3
B2
RSVD
C3
RSVD
E26
RSVD
AF7
RSVD
AC1
RSVD
TYCO_1612365-1_Dothan
Dothan
POWER, GROUNG, RESERVED SIGNALS AND NC
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
2
+CPU_CORE
A2 A5 A8 A11 A14 A17 A20 A23 A26 B3 B6 B9 B12 B16 B19 B22 B25 C1 C4 C7 C10 C13 C15 C18 C21 C24 D2 D5 D7 D9 D11 D13 D15 D17 D19 D21 D23 D26 E3 E6 E8 E10 E12 E14 E16 E18 E20 E22 E25 F1 F4 F5 F7 F9 F11 F13 F15 F17 F19 F21 F24 G2 G6 G22 G23 G26 H3 H5 H21 H25 J1 J4 J6 J22 J24 K2 K5 K21 K23 K26 L3 L6 L22 L25 M1
JCPU1C
F20
VCC
F22
VCC
G5
VCC
G21
VCC
H6
VCC
H22
VCC
J5
VCC
J21
VCC
K22
VCC
U5
VCC
V6
VCC
V22
VCC
W5
VCC
W21
VCC
Y6
VCC
Y22
VCC
AA5
VCC
AA7
VCC
AA9
VCC
AA11
VCC
AA13
VCC
AA15
VCC
AA17
VCC
AA19
VCC
AA21
VCC
AB6
VCC
AB8
VCC
AB10
VCC
AB12
VCC
AB14
VCC
AB16
VCC
AB18
VCC
AB20
VCC
AB22
VCC
AC9
VCC
AC11
VCC
AC13
VCC
AC15
VCC
AC17
VCC
AC19
VCC
AD8
VCC
AD10
VCC
AD12
VCC
AD14
VCC
AD16
VCC
AD18
VCC
AE9
VCC
AE11
VCC
AE13
VCC
AE15
VCC
AE17
VCC
AE19
VCC
AF8
VCC
AF10
VCC
AF12
VCC
AF14
VCC
AF16
VCC
AF18
VCC
M4
VSS
M5
VSS
M21
VSS
M24
VSS
N3
VSS
N6
VSS
N22
VSS
N23
VSS
N26
VSS
P2
VSS
P5
VSS
P21
VSS
P24
VSS
R1
VSS
R4
VSS
R6
VSS
R22
VSS
R25
VSS
T3
VSS
T5
VSS
T21
VSS
T23
VSS
TYCO_1612365-1_Dothan
Dothan
POWER, GROUND
1
T26
VSS
U2
VSS
U6
VSS
U22
VSS
U24
VSS
V1
VSS
V4
VSS
V5
VSS
V21
VSS
V25
VSS
W3
VSS
W6
VSS
W22
VSS
W23
VSS
W26
VSS
Y2
VSS
Y5
VSS
Y21
VSS
Y24
VSS
AA1
VSS
AA4
VSS
AA6
VSS
AA8
VSS
AA10
VSS
AA12
VSS
AA14
VSS
AA16
VSS
AA18
VSS
AA20
VSS
AA22
VSS
AA25
VSS
AB3
VSS
AB5
VSS
AB7
VSS
AB9
VSS
AB11
VSS
AB13
VSS
AB15
VSS
AB17
VSS
AB19
VSS
AB21
VSS
AB23
VSS
AB26
VSS
AC2
VSS
AC5
VSS
AC8
VSS
AC10
VSS
AC12
VSS
AC14
VSS
AC16
VSS
AC18
VSS
AC21
VSS
AC24
VSS
AD1
VSS
AD4
VSS
AD7
VSS
AD9
VSS
AD11
VSS
AD13
VSS
AD15
VSS
AD17
VSS
AD19
VSS
AD22
VSS
AD25
VSS
AE3
VSS
AE6
VSS
AE8
VSS
AE10
VSS
AE12
VSS
AE14
VSS
AE16
VSS
AE18
VSS
AE20
VSS
AE23
VSS
AE26
VSS
AF2
VSS
AF5
VSS
AF9
VSS
AF11
VSS
AF13
VSS
AF15
VSS
AF17
VSS
AF19
VSS
AF21
VSS
AF24
VSS
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2005/03/11 2006/03/11
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
星@, 06, 2006
薑三月
1
659
D
of
Page 7
5
4
3
2
1
+CPU_CORE
1
C687 10U_0805_6.3V6M
2
+CPU_CORE
1
2
+CPU_CORE
1
2
+CPU_CORE
1
2
C125 10U_0805_6.3V6M
C715 10U_0805_6.3V6M
C679 10U_0805_6.3V6M
D D
C C
1
C148 10U_0805_6.3V6M
2
1
C121 10U_0805_6.3V6M
2
1
C680 10U_0805_6.3V6M
2
1
C673 10U_0805_6.3V6M
2
1
C132 10U_0805_6.3V6M
2
1
C174 10U_0805_6.3V6M
2
1
C700 10U_0805_6.3V6M
2
1
C672 10U_0805_6.3V6M
2
1
C183 10U_0805_6.3V6M
2
1
C172 10U_0805_6.3V6M
2
1
C671 10U_0805_6.3V6M
2
1
C724 10U_0805_6.3V6M
2
1
C126 10U_0805_6.3V6M
2
1
C157 10U_0805_6.3V6M
2
1
C685 10U_0805_6.3V6M
2
1
C185 10U_0805_6.3V6M
2
+CPU_CORE
1
2
+CPU_CORE
1
2
+CPU_CORE
1
2
C123 10U_0805_6.3V6M
C120 10U_0805_6.3V6M
C723 10U_0805_6.3V6M
1
C695 10U_0805_6.3V6M
2
1
C173 10U_0805_6.3V6M
2
1
C717 10U_0805_6.3V6M
2
10uF 1206 X5R -> 85 degree
1
C165 10U_0805_6.3V6M
2
1
C184 10U_0805_6.3V6M
2
1
C701 10U_0805_6.3V6M
2
1
C143 10U_0805_6.3V6M
2
1
C697 10U_0805_6.3V6M
2
1
C696 10U_0805_6.3V6M
2
X7R
High Frequence Decoupling
1
C725 10U_0805_6.3V6M
2
1
C688 10U_0805_6.3V6M
2
1
C686 10U_0805_6.3V6M
2
Near VCORE regulator.
+CPU_CORE
@
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
@
1
C648
C710
B B
+
2
1
1
C140
+
+
2
2
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
1
C139
+
2
ESR <= 3m ohm Capacitor > 880 uF
+VCCP
1
C195
0.1U_0402_10V6K
2
+VCCP
1
+
C669 150U_D2_6.3VM
2
A A
1
C100
0.1U_0402_10V6K
2
1
C196
0.1U_0402_10V6K
2
1
C101
0.1U_0402_10V6K
2
1
C197
0.1U_0402_10V6K
2
1
C102
0.1U_0402_10V6K
2
1
C198
0.1U_0402_10V6K
2
1
C103
0.1U_0402_10V6K
2
1
C199
0.1U_0402_10V6K
2
1
C164
0.1U_0402_10V6K
2
1
C200
0.1U_0402_10V6K
2
1
C155
0.1U_0402_10V6K
2
1
C201
0.1U_0402_10V6K
2
1
C150
0.1U_0402_10V6K
2
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1
C99
0.1U_0402_10V6K
2
1
C144
0.1U_0402_10V6K
2
2005/03/11 2006/03/11
1
C98
0.1U_0402_10V6K
2
1
C137
0.1U_0402_10V6K
2
Compal Secret Data
Deciphered Date
1
C97
0.1U_0402_10V6K
2
1
C129
0.1U_0402_10V6K
2
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
星@, 06, 2006
薑三月
of
1
759
D
Page 8
5
H_A#[3..31]5
D D
H_REQ#[0..4]5
C C
Layout Guide will show these signals routed differentially.
B B
A A
H_DSTBN#[0..3]5
H_DSTBP#[0..3]5
H_RS#[0..2]5
H_CPUSLP#5,19
T3 PAD
H_ADSTB#05 H_ADSTB#15
CLK_MCH_BCLK#17 CLK_MCH_BCLK17
H_DINV#05 H_DINV#15 H_DINV#25 H_DINV#35
H_RESET#5 H_ADS#5
H_TRDY#5 H_DPWR#5 H_DRDY#5 H_DEFER#5
T2 PAD H_HITM#5 H_HIT#5 H_LOCK#5
H_BR0#5 H_BNR#5 H_BPRI#5 H_DBSY#5
R127 0_0402_5%
H_CPUSLP# H_R_CPUSLP#
1 2
Note: "Do not install R for Dothan-A, Install R97 for Dothan-B"
5
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
TP_H_PCREQ#
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_ADSTB#0 H_ADSTB#1
H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3
H_RESET# H_ADS#
H_TRDY# H_DRDY#
H_DEFER# TP_H_EDRDY#
@
H_HITM# H_HIT# H_LOCK# H_BR0# H_BNR# H_BPRI# H_DBSY#
H_R_CPUSLP#
H_RS#0 H_RS#1 H_RS#2
U48A
G9
HA3#
C9
HA4#
E9
HA5#
B7
HA6#
A10
HA7#
F9
HA8#
D8
HA9#
B10
HA10#
E10
HA11#
G10
HA12#
D9
HA13#
E11
HA14#
F10
HA15#
G11
HA16#
G13
HA17#
C10
HA18#
C11
HA19#
D11
HA20#
C12
HA21#
B13
HA22#
A12
HA23#
F12
HA24#
G12
HA25#
E12
HA26#
C13
HA27#
B11
HA28#
D13
HA29#
A13
HA30#
F13
HA31#
A11
HPCREQ#
A7
HREQ#0
D7
HREQ#1
B8
HREQ#2
C7
HREQ#3
A8
HREQ#4
B9
HADSTB#0
E13
HADSTB#1
AB1
HCLKN
AB2
HCLKP
G4
HDSTBN#0
K1
HDSTBN#1
R3
HDSTBN#2
V3
HDSTBN#3
G5
HDSTBP#0
K2
HDSTBP#1
R2
HDSTBP#2
W4
HDSTBP#3
H8
HDINV#0
K3
HDINV#1
T7
HDINV#2
U5
HDINV#3
H10
HCPURST#
F8
HADS#
B5
HTRDY#
G6
HDPWR#
F7
HDRDY#
E6
HDEFER#
F6
HEDRDY#
D6
HHITM#
D4
HHIT#
B3
HLOCK#
E7
HBREQ0#
A5
HBNR#
D5
HBPRI#
C6
HDBSY#
G8
HCPUSLP#
A4
HRS0#
C5
HRS1#
B4
HRS2#
ALVISO_BGA1257
Alviso
HOST
H_SWNG0
C644
0.1U_0402_16V4Z
HXRCOMP HXSCOMP HYRCOMP HYSCOMP
HXSWING HYSWING
1
2
HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8#
HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63#
HVREF
R638
221_0603_1%
R642
100_0402_1%
4
@
R158
40.2_0402_1%
12
R643
24.9_0402_1%
24.9_0402_1%
+SDREF_DIMM
H_D#[0..63] 5
Layout Note: Rote as short as possible
12
12
@
R136
40.2_0402_1%
+VCCP
12
R644
R639
54.9_0402_1%
54.9_0402_1%
12
10/20 mils
M_OCDOCMP0 M_OCDOCMP1
12
+1.8V
1 2
1 2
H_D#0
E4
H_D#1
E1
H_D#2
F4
H_D#3
H7
H_D#4
E2
H_D#5
F1
H_D#6
E3
H_D#7
D3
H_D#8
K7
H_D#9
F2
H_D#10
J7
H_D#11
J8
H_D#12
H6
H_D#13
F3
H_D#14
K8
H_D#15
H5
H_D#16
H1
H_D#17
H2
H_D#18
K5
H_D#19
K6
H_D#20
J4
H_D#21
G3
H_D#22
H3
H_D#23
J1
H_D#24
L5
H_D#25
K4
H_D#26
J5
H_D#27
P7
H_D#28
L7
H_D#29
J3
H_D#30
P5
H_D#31
L3
H_D#32
U7
H_D#33
V6
H_D#34
R6
H_D#35
R5
H_D#36
P3
H_D#37
T8
H_D#38
R7
H_D#39
R8
H_D#40
U8
H_D#41
R4
H_D#42
T4
H_D#43
T5
H_D#44
R1
H_D#45
T3
H_D#46
V8
H_D#47
U6
H_D#48
W6
H_D#49
U3
H_D#50
V5
H_D#51
W8
H_D#52
W7
H_D#53
U2
H_D#54
U1
H_D#55
Y5
H_D#56
Y2
H_D#57
V4
H_D#58
Y7
H_D#59
W1
H_D#60
W3
H_D#61
Y3
H_D#62
Y6
H_D#63
W2
H_VREF
J11
H_XRCOMP
C1
H_XSCOMP
C2
H_YRCOMP
T1
H_YSCOMP
L1
H_SWNG0
D1
H_SWNG1
P1
R636
+VCCP+VCCP
12
H_SWNG1
12
C646
4
12
R82
221_0603_1%
12
1
R641
2
0.1U_0402_16V4Z
100_0603_1%
3
Layout Guide will show these signals routed differentially.
DMI_TXN020 DMI_TXN120 DMI_TXN220 DMI_TXN320
DMI_TXP020 DMI_TXP120 DMI_TXP220 DMI_TXP320
DMI_RXN020 DMI_RXN120 DMI_RXN220 DMI_RXN320
DMI_RXP020 DMI_RXP120 DMI_RXP220 DMI_RXP320
DDR_CLK013 DDR_CLK113
DDR_CLK314 DDR_CLK414
DDR_CLK0#13 DDR_CLK1#13
DDR_CLK3#14 DDR_CLK4#14
DDR_CKE0_DIMMA13 DDR_CKE1_DIMMA13 DDR_CKE2_DIMMB14 DDR_CKE3_DIMMB14
DDR_SCS#013 DDR_SCS#113 DDR_SCS#214 DDR_SCS#314
M_ODT013 M_ODT113
1 2
+SDREF_DIMM
M_ODT214 M_ODT314
+1.8V
R125 80.6_0402_1%
12
R126
80.6_0402_1%
+VCCP
12
R680
100_0402_1%
1
R681
C718
2
200_0402_1%
0.1U_0402_16V7K
CFG[2:0]
12
CFG5
CFG6
CFG7
CFG9
R219 1K_0402_5%
R220 1K_0402_5%
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
CFG[13:12] CFG16
(FSB Dynamic ODT)
CFG18 (VCC Select)
CFG19 (VTT Select)
2005/03/11 2006/03/11
DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3
DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3
DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3
DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3
DDR_CLK0 DDR_CLK1
DDR_CLK3 DDR_CLK4
DDR_CLK0# DDR_CLK1#
DDR_CLK3# DDR_CLK4#
DDR_CKE0_DIMMA DDR_CKE1_DIMMA DDR_CKE2_DIMMB DDR_CKE3_DIMMB
DDR_SCS#0 DDR_SCS#1 DDR_SCS#2 DDR_SCS#3
M_OCDOCMP0 M_OCDOCMP1
SMRCOMPN SMRCOMPP
1
1
C792
C640
Refer to sheet 6 for FSB frequency select
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Low = DMI x 2 High = DMI x 4 Low = DDR-II High = DDR-I Low = DT/Transportable CPU High = Mobile CPU Low = Reverse Lane High = Normal Operation
00 = Reserved 01 = XOR Mode Enabled 10 = All Z Mode Enabled 11 = Normal Operation (Default)
Low = Disabled High = Enabled Low = 1.05V (Default) High = 1.5V Low = 1.05V (Default)
High = 1.2V
Compal Secret Data
Deciphered Date
*
AA31 AB35 AC31 AD35
AA35 AB31 AC35
AA33 AB37 AC33 AD37
AA37 AB33 AC37
AM33 AE11
AJ34 AC10 AN33 AE10
AJ33 AD10 AP21
AM21 AH21 AK21
AN16 AM14 AH15 AG16
AF22 AF16 AP14
AL15 AM11 AN10
AK10 AK11 AF37
AE27 AE28
AF10
*
*
Y31
Y33
AL1
AF6
AK1
AF5
AD1
AF9
*
2
U48B
DMIRXN0 DMIRXN1 DMIRXN2 DMIRXN3
DMIRXP0 DMIRXP1 DMIRXP2 DMIRXP3
DMITXN0 DMITXN1 DMITXN2 DMITXN3
DMITXP0 DMITXP1 DMITXP2 DMITXP3
SM_CK0 SM_CK1 SM_CK2 SM_CK3 SM_CK4 SM_CK5
SM_CK0# SM_CK1# SM_CK2# SM_CK3# SM_CK4# SM_CK5#
SM_CKE0 SM_CKE1 SM_CKE2 SM_CKE3
SM_CS0# SM_CS1# SM_CS2# SM_CS3#
SM_OCDCOMP0 SM_OCDCOMP1 SM_ODT0 SM_ODT1 SM_ODT2 SM_ODT3
SMRCOMPN SMRCOMPP SMVREF0 SMVREF1 SMXSLEWIN SMXSLEWOUT SMYSLEWIN SMYSLEWOUT
ALVISO_BGA1257
*
*
*
*
2
DMIDDR MUXING
PM
DREF_SSCLKP
CLK
DREF_SSCLKN
NC
Alviso CFG[1 7 : 3 ] has internal pull-up
CFG0
G16
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8
CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20
RSVD21 RSVD22
CFG/RSVD
RSVD23 RSVD24 RSVD25 RSVD26 RSVD27
BM_BUSY#
EXT_TS0# EXT_TS1#
THRMTRIP#
PWROK
RSTIN#
DREF_CLKN DREF_CLKP
NC10 NC11
MCH_CLKSEL1
H13
MCH_CLKSEL0
G14 F16 F15 G15 E16 D17 J16 D15 E15 D14 E14 H12 C14 H15 J15 H14 G22 G23 D23 G25 G24 J17 A31 A30 D26 D25
J23
PM_EXTTS#0
J21
PM_EXTTS#1
H22 F5 AD30
PLTRST_R#
AE29
R719 10K_0402_5%@ A24 A23 D37 C37
R251 10K_0402_5% AP37
NC1
AN37
NC2
AP36
NC3
AP2
NC4
AP1
NC5
AN1
NC6
B1
NC7
A2
NC8
B37
NC9
A36 A37
CFG[17:3] hav e i n t e r n a l p u l l-up
3.5 k reserve for choose
Title
Size Document Number Rev
Date: Sheet
@
T6PAD
@
T7PAD
CFG5 CFG6 CFG7
CFG9
CFG12 CFG13
CFG16 CFG18
CFG19
H_THERMTRIP#
1 2
R185 100_0402_1%
12
12
@
CFG0
CFG5 CFG7 CFG9 CFG6 CFG12 CFG13 CFG16
CFG18 CFG19
R1642.2K_0402_5%@
12
R1722.2K_0402_5%@
12
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
星@, 06, 2006
薑三月
R637 56_0402_5%
1 2
@
PM_EXTTS#0
PM_EXTTS#1
R134 10K_0402_5%
R131 2.2K_0402_5%@ R133 2.2K_0402_5%@ R132 2.2K_0402_5%@ R135 2.2K_0402_5% R128 2.2K_0402_5%@ R129 2.2K_0402_5%@ R130 2.2K_0402_5%@
R165 1K_0402_5%@ R173 1K_0402_5%@
CFG[19:18] have internal pull-down
401362
1
MCH_CLKSEL1 17 MCH_CLKSEL0 17
+VCCP
PM_BMBUSY# 20
H_THERMTRIP# 5,19 VGATE 17,20,30,56
DREFCLK# 17
DREFCLK 17 SSC_DREFCLK 17 SSC_DREFCLK# 17
R189
10K_0402_5%
R190
10K_0402_5%
12
1 2 1 2 1 2 1 2 1 2 1 2 1 2
3.5 k reserve for choose
1 2 1 2
1
PLTRST_MCH# 18
+2.5VS
12
12
+VCCP
+2.5VS
D
of
859
Page 9
5
D D
4
3
2
1
DDR_A_BS#013 DDR_A_BS#113
DDR_A_DM[0..7]13
DDR_A_DQS[0..7]13
DDR_A_DQS#[0..7]13
C C
DDR_A_MA[0..13]13
DDR_A_CAS#13 DDR_A_RAS#13
T9 PAD T8 PAD
DDR_A_WE#13
B B
DDR_A_BS#0 DDR_A_BS#1 DDR_A_BS#2
DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7
DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7
DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13
DDR_A_CAS# DDR_A_RAS#
TP_MA_RCVENIN#
TP_MA_RCVENOUT#
DDR_A_WE#
AK15 AK16
AL21 AJ37
AP35
AL29
AP24
AK36 AP33 AN29 AP23
AM8 AM4
AK35 AP34 AN30 AN23
AM5
AL17 AP17 AP18
AM17
AN18
AM18
AL19 AP20
AM19
AL20
AM16
AN20
AM20 AM15
AN15 AP16 AF29 AF28 AP15
AP9 AP4 AJ2 AD3
AJ1 AE5
AN8 AH1
AE4
U48C
SA_BS0# SA_BS1# SA_BS2#
SA_DM0 SA_DM1 SA_DM2 SA_DM3 SA_DM4 SA_DM5 SA_DM6 SA_DM7
SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7
SA_DQS0# SA_DQS1# SA_DQS2# SA_DQS3# SA_DQS4# SA_DQS5# SA_DQS6# SA_DQS7#
SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8 SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13
SA_CAS# SA_RAS# SA_RCVENIN# SA_RCVENOUT# SA_WE#
ALVISO_BGA1257
SADQ0 SADQ1 SADQ2 SADQ3 SADQ4 SADQ5 SADQ6 SADQ7 SADQ8
SADQ9 SADQ10 SADQ11 SADQ12 SADQ13 SADQ14 SADQ15 SADQ16 SADQ17 SADQ18 SADQ19 SADQ20 SADQ21 SADQ22 SADQ23 SADQ24 SADQ25 SADQ26 SADQ27 SADQ28 SADQ29 SADQ30 SADQ31 SADQ32 SADQ33 SADQ34 SADQ35 SADQ36 SADQ37 SADQ38 SADQ39 SADQ40 SADQ41 SADQ42 SADQ43
DDR MEMORY SYSTEM A
SADQ44 SADQ45 SADQ46 SADQ47 SADQ48 SADQ49 SADQ50 SADQ51 SADQ52 SADQ53 SADQ54 SADQ55 SADQ56 SADQ57 SADQ58 SADQ59 SADQ60 SADQ61 SADQ62 SADQ63
AH35 AL35 AL37 AH36 AJ35 AK37 AL34 AM36 AN35 AP32 AM31 AM34 AM35 AL32 AM32 AN31 AP31 AN28 AP28 AL30 AM30 AM28 AL28 AP27 AM27 AM23 AM22 AL23 AM24 AN22 AP22 AM9 AL9 AL6 AP7 AP11 AP10 AL7 AM7 AN5 AN6 AN3 AP3 AP6 AM6 AL4 AM3 AK2 AK3 AG2 AG1 AL3 AM2 AH3 AG3 AF3 AE3 AD6 AC4 AF2 AF1 AD4 AD5
DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
DDR_A_D0
AG35
DDR_A_D[0..63] 13
This Symbol as same as Intel CRB schematic, So Layout Guide will show these signals routed differentially.
T5 PAD T4 PAD
DDR_B_BS#014 DDR_B_BS#114 DDR_B_BS#214DDR_A_BS#213 DDR_B_DM[0..7]14
DDR_B_DQS[0..7]14
DDR_B_DQS#[0..7]14
DDR_B_MA[0..13]14
DDR_B_CAS#14 DDR_B_RAS#14
DDR_B_WE#14
DDR_B_BS#0 DDR_B_BS#1 DDR_B_BS#2
DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7
DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7
DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13
DDR_B_CAS# DDR_B_RAS#
TP_MB_RCVENIN#
TP_MB_RCVENOUT#
DDR_B_WE#
AJ15 AG17 AG21
AF32 AK34 AK27 AK24
AJ10
AF34 AK32
AJ28
AK23
AM10
AF35 AK33 AK28
AJ23
AL10
AH17 AK17 AH18
AJ18
AK18
AJ19
AK19 AH19
AJ20
AH20
AJ16 AG18 AG20 AG15
AH14 AK14 AF15 AF14 AH16
AK5 AE7 AB7
AH6 AF8 AB4
AH7 AF7 AB5
U48D
SB_BS0# SB_BS1# SB_BS2#
SB_DM0 SB_DM1 SB_DM2 SB_DM3 SB_DM4 SB_DM5 SB_DM6 SB_DM7
SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7
SB_DQS0# SB_DQS1# SB_DQS2# SB_DQS3# SB_DQS4# SB_DQS5# SB_DQS6# SB_DQS7#
SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8 SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13
SB_CAS# SB_RAS# SB_RCVENIN# SB_RCVENOUT# SB_WE#
ALVISO_BGA1257
SBDQ0 SBDQ1 SBDQ2 SBDQ3 SBDQ4 SBDQ5 SBDQ6 SBDQ7 SBDQ8
SBDQ9 SBDQ10 SBDQ11 SBDQ12 SBDQ13 SBDQ14 SBDQ15 SBDQ16 SBDQ17 SBDQ18 SBDQ19 SBDQ20 SBDQ21 SBDQ22 SBDQ23 SBDQ24 SBDQ25 SBDQ26 SBDQ27 SBDQ28 SBDQ29 SBDQ30 SBDQ31 SBDQ32 SBDQ33 SBDQ34 SBDQ35 SBDQ36 SBDQ37 SBDQ38 SBDQ39 SBDQ40 SBDQ41 SBDQ42
DDR SYSTEM MEMORY B
SBDQ43 SBDQ44 SBDQ45 SBDQ46 SBDQ47 SBDQ48 SBDQ49 SBDQ50 SBDQ51 SBDQ52 SBDQ53 SBDQ54 SBDQ55 SBDQ56 SBDQ57 SBDQ58 SBDQ59 SBDQ60 SBDQ61 SBDQ62 SBDQ63
AE32 AG32 AG36 AE34 AE33 AF31 AF30 AH33 AH32 AK31 AG30 AG34 AG33 AH31 AJ31 AK30 AJ30 AH29 AH28 AK29 AH30 AH27 AG28 AF24 AG23 AJ22 AK22 AH24 AH23 AG22 AJ21 AG10 AG9 AG8 AH8 AH11 AH10 AJ9 AK9 AJ7 AK6 AJ4 AH5 AK8 AJ8 AJ5 AK4 AG5 AG4 AD8 AD9 AH4 AG6 AE8 AD7 AC5 AB8 AB6 AA8 AC8 AC7 AA4 AA5
DDR_B_D1D DR_B_D1 DDR_B_D2D DR_B_D2 DDR_B_D3D DR_B_D3 DDR_B_D4D DR_B_D4 DDR_B_D5D DR_B_D5 DDR_B_D6D DR_B_D6 DDR_B_D7D DR_B_D7 DDR_B_D8D DR_B_D8 DDR_B_D9D DR_B_D9 DDR_B_D10DDR_B_D10 DDR_B_D11DDR_B_D11 DDR_B_D12DDR_B_D12 DDR_B_D13DDR_B_D13 DDR_B_D14DDR_B_D14 DDR_B_D15DDR_B_D15 DDR_B_D16DDR_B_D16 DDR_B_D17DDR_B_D17 DDR_B_D18DDR_B_D18 DDR_B_D19DDR_B_D19 DDR_B_D20DDR_B_D20 DDR_B_D21DDR_B_D21 DDR_B_D22DDR_B_D22 DDR_B_D23DDR_B_D23 DDR_B_D24DDR_B_D24 DDR_B_D25DDR_B_D25 DDR_B_D26DDR_B_D26 DDR_B_D27DDR_B_D27 DDR_B_D28DDR_B_D28 DDR_B_D29DDR_B_D29 DDR_B_D30DDR_B_D30 DDR_B_D31DDR_B_D31 DDR_B_D32DDR_B_D32 DDR_B_D33DDR_B_D33 DDR_B_D34DDR_B_D34 DDR_B_D35DDR_B_D35 DDR_B_D36DDR_B_D36 DDR_B_D37DDR_B_D37 DDR_B_D38DDR_B_D38 DDR_B_D39DDR_B_D39 DDR_B_D40DDR_B_D40 DDR_B_D41DDR_B_D41 DDR_B_D42DDR_B_D42 DDR_B_D43DDR_B_D43 DDR_B_D44DDR_B_D44 DDR_B_D45DDR_B_D45 DDR_B_D46DDR_B_D46 DDR_B_D47DDR_B_D47 DDR_B_D48DDR_B_D48 DDR_B_D49DDR_B_D49 DDR_B_D50DDR_B_D50 DDR_B_D51DDR_B_D51 DDR_B_D52DDR_B_D52 DDR_B_D53DDR_B_D53 DDR_B_D54DDR_B_D54 DDR_B_D55DDR_B_D55 DDR_B_D56DDR_B_D56 DDR_B_D57DDR_B_D57 DDR_B_D58DDR_B_D58 DDR_B_D59DDR_B_D59 DDR_B_D60DDR_B_D60 DDR_B_D61DDR_B_D61 DDR_B_D62DDR_B_D62 DDR_B_D63DDR_B_D63
DDR_B_D0D DR_B_D0
AE31
DDR_B_D[0..63] 14
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2005/03/11 2006/03/11
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
星@, 06, 2006
薑三月
1
959
D
of
Page 10
5
CRT_BLU CRT_GRN
@
R100375_0402_1%
R100275_0402_1%
1 2
CRT_RED
@
R100175_0402_1%
1 2
R186 100K_0402_1%
1 2 1 2
R187100K_0402_1%
R2491.5K_0402_1%
@
1 2
D D
COMP/B_VGA16
Y/G_VGA16
C/R_VGA16
CRT_BLU16 CRT_GRN16 CRT_RED16
C C
B B
12
R694
150_0402_1%
BK_EN15
R1001~R1003
要W 150 ohm
CLK_MCH_3GPLL#17 CLK_MCH_3GPLL17
12
R699
150_0402_1%
CLK_DDC216 DAT_DDC216
VSYNC16 HSYNC16
LCD_CLK15 LCD_DAT15 LCD_EN30
12
LVDS_AC-42 LVDS_AC+42
LVDS_A0-42 LVDS_A1-42 LVDS_A2-42
LVDS_A0+42 LVDS_A1+42 LVDS_A2+42
時值為
+2.5VS
12
R704
150_0402_1%
為預留
R157
4.99K_0603_1%
LBKLT_CTL BK_EN
R200 3K_0402_5%@ 1 2 1 2
12
0_0402_5%
1 2
CLK_DDC2 DAT_DDC2
1 2
R149
255_0402_1%
LCTLA_CLK LCTLB_DAT LCD_CLK LCD_DAT LCD_EN
LVDS_AC­LVDS_AC+
LVDS_A0­LVDS_A1­LVDS_A2-
LVDS_A0+ LVDS_A1+ LVDS_A2+
R199
3K_0402_5%@
R689
AB29 AC29
H24 H25
A15 C16 A17
J18 B15 B16 B17
E24 E23 E21 D21 C20 B20 A19 B19 H21 G21
J20
E25 F25 C23 C22 F23 F22 F26 C33 C31 F28 F27
B30 B29 C25 C24
B34 B33 B32
A34 A33 B31
C29 D28 C27
C28 D27 C26
4
U48G
SDVOCTRL_DATA SDVOCTRL_CLK GCLKN GCLKP
TVDAC_A TVDAC_B TVDAC_C TV_REFSET TV_IRTNA TV_IRTNB TV_IRTNC
DDCCLK DDCDATA BLUE BLUE# GREEN GREEN# RED RED# VSYNC HSYNC REFSET
LBKLT_CTL LBKLT_EN LCTLA_CLK LCTLB_DATA LDDC_CLK LDDC_DATA LVDD_EN LIBG LVBG LVREFH LVREFL
LACLKN LACLKP LBCLKN LBCLKP
LADATAN0 LADATAN1 LADATAN2
LADATAP0 LADATAP1 LADATAP2
LBDATAN0 LBDATAN1 LBDATAN2
LBDATAP0 LBDATAP1 LBDATAP2
ALVISO_BGA1257
EXP_RXN0/SDVO_TVCLKIN#
MISCTVVGALVDS
EXP_RXN1/SDVO_INT#
EXP_RXN2/SDVO_FLDSTALL#
EXP_RXP0/SDVO_TVCLKIN
EXP_RXP1/SDVO_INT
EXP_RXP2/SDVO_FLDSTALL
EXP_TXN0/SDVOB_RED#
EXP_TXN1/SDVOB_GREEN#
EXP_TXN2/SDVOB_BLUE#
EXP_TXN3/SDVOB_CLKN EXP_TXN4/SDVOC_RED#
EXP_TXN5/SDVOC_GREEN#
EXP_TXN6/SDVOC_BLUE#
EXP_TXN7/SDVOC_CLKN
PCI - EXPRESS GRAPHICS
EXP_TXP0/SDVOB_RED
EXP_TXP1/SDVOB_GREEN
EXP_TXP2/SDVOB_BLUE EXP_TXP3/SDVOB_CLKP
EXP_TXP4/SDVOC_RED
EXP_TXP5/SDVOC_GREEN
EXP_TXP6/SDVOC_BLUE EXP_TXP7/SDVOC_CLKP
EXP_COMPI
EXP_ICOMPO
EXP_RXN3 EXP_RXN4 EXP_RXN5 EXP_RXN6 EXP_RXN7 EXP_RXN8
EXP_RXN9 EXP_RXN10 EXP_RXN11 EXP_RXN12 EXP_RXN13 EXP_RXN14 EXP_RXN15
EXP_RXP3
EXP_RXP4
EXP_RXP5
EXP_RXP6
EXP_RXP7
EXP_RXP8
EXP_RXP9
EXP_RXP10 EXP_RXP11 EXP_RXP12 EXP_RXP13 EXP_RXP14 EXP_RXP15
EXP_TXN8
EXP_TXN9
EXP_TXN10 EXP_TXN11 EXP_TXN12 EXP_TXN13 EXP_TXN14 EXP_TXN15
EXP_TXP8
EXP_TXP9
EXP_TXP10 EXP_TXP11 EXP_TXP12 EXP_TXP13 EXP_TXP14 EXP_TXP15
D36 D34
E30 F34 G30 H34 J30 K34 L30 M34 N30 P34 R30 T34 U30 V34 W30 Y34
D30 E34 F30 G34 H30 J34 K30 L34 M30 N34 P30 R34 T30 U34 V30 W34
E32 F36 G32 H36 J32 K36 L32 M36 N32 P36 R32 T36 U32 V36 W32 Y36
D32 E36 F32 G36 H32 J36 K32 L36 M32 N36 P32 R36 T32 U36 V32 W36
PEGCOMP
3
R250
24.9_0603_1%~D 1 2
LBKLT_CTL
+1.5VS
+3VS
2
A
R854
@
1 2
0_0402_5%
5
U58
P
4
Y
G
NC7SZ14M5X_SOT23-5
3
+2.5VS
1 2 1 2 1 2 1 2 1 2 1 2
BIA 30
2
LCD_CLK
R154 2.2K_0402_5%
LCD_DAT
R153 2.2K_0402_5%
LCTLA_CLK
R160 2.2K_0402_5%
LCTLB_DAT
R159 2.2K_0402_5%
CLK_DDC2
R182 2.2K_0402_5%
DAT_DDC2
R181 2.2K_0402_5%
1
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2005/03/11 2006/03/11
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
星@, 06, 2006
薑三月
1
10 59
D
of
Page 11
5
U48F
K13
VTT0
J13
VTT1
K12
VTT2
W11
VTT3
V11
VTT4
U11
VTT5
T11
VTT6
R11
VTT7
P11
POWER
VTT8
N11
VTT9
M11
D D
+VCCP
1
1
+
C936 150U_D2_6.3VM
C C
B B
1
+
2
2
2
C250 2.2U_0805_10V6K
C635 4.7U_0805_6.3V6K
C937 150U_D2_6.3VM
1
C692
0.47U_0603_16V7K
2
1
1
C634
C632
2
2
0.47U_0603_16V7K
0.1U_0402_16V4Z
1
@
C159
C192
2
VTT10
L11
VTT11
K11
VTT12
W10
VTT13
V10
VTT14
U10
VTT15
T10
VTT16
R10
VTT17
P10
VTT18
N10
VTT19
M10
VTT20
K10
VTT21
J10
1
VTT22
Y9
VTT23
W9
VTT24
U9
VTT25
2
R9
VTT26
P9
VTT27
N9
VTT28
M9
VTT29
L9
VTT30
J9
VTT31
N8
VTT32
M8
VTT33
N7
VTT34
M7
VTT35
N6
VTT36
M6
VTT37
A6
VTT38
N5
VTT39
M5
VTT40
N4
VTT41
M4
VTT42
N3
VTT43
M3
VTT44
N2
VTT45
M2
VTT46
B2
VTT47
V1
VTT48
N1
VTT49
M1
VTT50
G1
VTT51
1
C633
2
0.22U_0603_10V7K
0.22U_0603_10V7K
ALVISO_BGA1257
+VCCP
0.1U_0402_16V4Z
1
@
@
C189
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z 1
1
@
@
C211
C210
2
2
VCCSM0 VCCSM1 VCCSM2 VCCSM3 VCCSM4 VCCSM5 VCCSM6 VCCSM7 VCCSM8
VCCSM9 VCCSM10 VCCSM11 VCCSM12 VCCSM13 VCCSM14 VCCSM15 VCCSM16 VCCSM17 VCCSM18 VCCSM19 VCCSM20 VCCSM21 VCCSM22 VCCSM23 VCCSM24 VCCSM25 VCCSM26 VCCSM27 VCCSM28 VCCSM29 VCCSM30 VCCSM31 VCCSM32 VCCSM33 VCCSM34 VCCSM35 VCCSM36 VCCSM37 VCCSM38 VCCSM39 VCCSM40 VCCSM41 VCCSM42 VCCSM43 VCCSM44 VCCSM45 VCCSM46 VCCSM47 VCCSM48 VCCSM49 VCCSM50 VCCSM51 VCCSM52 VCCSM53 VCCSM54 VCCSM55 VCCSM56 VCCSM57 VCCSM58 VCCSM59 VCCSM60 VCCSM61 VCCSM62 VCCSM63 VCCSM64
0.1U_0402_16V4Z
1
2
AM37 AH37 AP29 AD28 AD27 AC27 AP26 AN26 AM26 AL26 AK26 AJ26 AH26 AG26 AF26 AE26 AP25 AN25 AM25 AL25 AK25 AJ25 AH25 AG25 AF25 AE25 AE24 AE23 AE22 AE21 AE20 AE19 AE18 AE17 AE16 AE15 AE14 AP13 AN13 AM13 AL13 AK13 AJ13 AH13 AG13 AF13 AE13 AP12 AN12 AM12 AL12 AK12 AJ12 AH12 AG12 AF12 AE12 AD11 AC11 AB11 AB10 AB9 AP8 AM1 AE1
V1.8_DDR_CAP1 V1.8_DDR_CAP2 V1.8_DDR_CAP5
V1.8_DDR_CAP6 V1.8_DDR_CAP4 V1.8_DDR_CAP3
C163
V1.8_DDR_CAP1 V1.8_DDR_CAP2 V1.8_DDR_CAP5
Note : All VCCSM pin shorted internally.
V1.8_DDR_CAP6 V1.8_DDR_CAP4 V1.8_DDR_CAP3
Note: Place near chip.
10U_1206_6.3V6M
C729
C757
1
1
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C175
2
2
C641
10U_1206_6.3V6M
C194
+1.8V
C767
4
W=20 mils
U48E
+VCCP
C794
+1.8V
C228
0.1U_0402_16V7K
1
2
1
C623
2
10U_1206_6.3V6M
+1.5VS_DPLLA +1.5VS_DPLLB
+1.5VS_HPLL +1.5VS_MPLL
0.1U_0402_16V4Z
C266
0.1U_0402_16V4Z
+1.5VS
1
1
2
0.1U_0402_16V7K
1
2
1
+
2
0.1U_0402_16V4Z
1
2
1
C793
C775
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K C702
C642
1
1
2
2
330U_D2E_2.5VM
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C209
C214
2
2
T29
VCC0
R29
VCC1
N29
VCC2
M29
VCC3
K29
VCC4
J29
1
2
VCC5
V28
VCC6
U28
VCC7
T28
VCC8
R28
VCC9
P28
VCC10
N28
VCC11
M28
VCC12
L28
VCC13
K28
VCC14
J28
VCC15
H28
VCC16
G28
VCC17
V27
VCC18
U27
VCC19
T27
VCC20
R27
VCC21
P27
VCC22
N27
VCC23
M27
VCC24
L27
VCC25
K27
VCC26
J27
VCC27
H27
VCC28
K26
VCC29
H26
VCC30
K25
VCC31
J25
VCC32
K24
VCC33
K23
VCC34
K22
VCC35
K21
VCC36
W20
VCC37
U20
VCC38
T20
VCC39
K20
VCC40
V19
VCC41
U19
VCC42
K19
VCC43
W18
VCC44
V18
VCC45
T18
VCC46
K18
VCC47
K17
VCC48
AC1
VCCD_HMPLL1
AC2
VCCD_HMPLL2
B23
VCCA_DPLLA
C35
VCCA_DPLLB
AA1
VCCA_HPLL
AA2
VCCA_MPLL
ALVISO_BGA1257
VCC_SYNC
1
C740
2
10U_1206_6.3V6M
POWER
+2.5VS
1
C224
2
0.1U_0402_16V4Z
3
VCCA_TVDACA0 VCCA_TVDACA1 VCCA_TVDACB0 VCCA_TVDACB1 VCCA_TVDACC0 VCCA_TVDACC1
VCCA_TVBG
VSSA_TVBG
VCCD_TVDAC
VCCDQ_TVDAC
VCCD_LVDS0 VCCD_LVDS1 VCCD_LVDS2
VCCA_LVDS
VCCHV0 VCCHV1 VCCHV2
VCCTX_LVDS0 VCCTX_LVDS1 VCCTX_LVDS2
VCCA_SM0 VCCA_SM1 VCCA_SM2 VCCA_SM3
VCC3G0 VCC3G1 VCC3G2 VCC3G3 VCC3G4 VCC3G5 VCC3G6
VCCA_3GPLL0 VCCA_3GPLL1 VCCA_3GPLL2
VCCA_3GBG VSSA_3GBG
VCC_SYNC
VCCA_CRTDAC0 VCCA_CRTDAC1
VSSA_CRTDAC
12
R144 0_0402_5%
12
R145
0_0402_5%@
F17 E17 D18 C18 F18 E18
H18 G18
D19 H17
B26 B25 A25
A35 B22
B21 A21
B28 A28 A27
AF20 AP19 AF19 AF18
AE37 W37 U37 R37 N37 L37 J37
Y29 Y28 Y27
F37 G37
H20 F19
E19 G19
1
C212
2
0.1U_0402_16V4Z
+1.5VS_PM
R722 0_0603_5%
+2.5VS_PM
R745 0_0603_5%
+2.5VS
4.7U_0805_6.3V6K
1
C225
2
0.1U_0402_16V4Z
VCC_SYNC
C743
0.1U_0402_16V4Z 1
1
C237
C229
2
2
1
2
C731
1
C732
2
0.1U_0402_16V4Z
1 2
1 2
C774
1
+
C739
2
100U_D2_6.3VM
1
1
2
2
0.1U_0402_16V4Z
0.022U_0402_16V7K
0.1U_0402_16V4Z 1
C235
2
+3VS
0.022U_0402_16V7K
1
2
C217
1
2
C804
220U_D2_4VM
+2.5VS_CRTDAC
C744
GND_CRTDAC
0.1U_0402_16V4Z 1
C158
2
1
1
2
2
C218
0.022U_0402_16V7K
0.1U_0402_16V4Z C208 0.022U_0402_16V7K
+1.5VS
+2.5VS
R724 0_0603_5%
1 2
1
C773
0.1U_0402_16V4Z
2
1
1
+
C798
C797
2
2
10U_1206_6.3V6M
CHB1608U301_0603
1 2
+VCCP
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z 1
1
C190
C149
2
2
2
C639
0.1U_0402_16V4Z +2.5VS
1
2
10U_1206_6.3V6M
L81
Close B26,B25,A25
+1.5VS
1
1
2
2
C759
C638 0.022U_0402_16V7K
1
C791
C267
2
0.1U_0402_16V4Z
10U_1206_6.3V6M
0.5--->1.0 ADD
+1.5VS_PM
0.1U_0402_16V4Z
1
2
L50
L26
R753
1 2
0.5_0805_1%
1
2
Route VSSA3GBG gnd from GMCH to decoupling cap ground lead and then connect to the gnd plane.
10U_1206_6.3V6M
1
2
C783
12
0_0603_5%
12
0_0603_5%
3GRLL_R
CHB1608U301_0603
1
C790
0.1U_0402_16V4Z
2
+2.5VS_PM
1
2
0.01U_0402_16V7K
L57
0_0603_5%
C782
1
2
0.1U_0402_16V4Z
+1.5VS+1.5VS_3GPLL
L59
12
C805
12
C233
10U_1206_6.3V6M
1
2
0.1U_0402_16V4Z +2.5VS+2.5VS_3GBG
+2.5VS
1
1
C220
2
2
0.1U_0402_16V4Z
+1.5VS
1
C364
2
0.1U_0402_16V4Z
1
C801
0.1U_0402_16V4Z
2
1
1
+
C965
+1.5VS
C745
0.1U_0402_16V4Z
2
330U_D2E_2.5VM
1
2
L58
CHB1608U301_0603
+1.5VS
A A
1 2
C803
+VCCP +VCCP+2.5VS +3VS
R148
1 2
10K_0402_5%
@
330U_D2E_2.5VM
1
C789
+
2
D3
1N4148_SOD80
@
5
0.1U_0402_16V4Z
1
2
12
+1.5VS
CHB1608U301_0603
1 2
L15
C612
R140
1 2
10K_0402_5%
@
+1.5VS_HPLL
330U_D2E_2.5VM
1
C636
+
2
1N4148_SOD80
CHB1608U301_0603
0.1U_0402_16V4Z
+1.5VS
1
2
D2
12
@
1 2
4
+1.5VS_MPLL
L16
1
1
+
C613
C637
2
2
0.1U_0402_16V4Z
330U_D2E_2.5VM
+1.5VS
CHB1608U301_0603
1 2
+1.5VS_DPLLA+1.5VS_DPLLB
L48
0.1U_0402_16V4Z
330U_D2E_2.5VM
1
C749
C748
1
+
2
2
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
+2.5VS +2.5VS_CRTDAC
2005/03/11 2006/03/11
L80
CHB1608U301_0603
1 2
0.5--->1.0 ADD
Compal Secret Data
Deciphered Date
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
星@, 06, 2006
薑三月
of
1
11 59
D
Page 12
5
4
3
2
1
+VCCP
W12
W13
AA12 AA13
W14
AA14 AB14
W15
AA15 AB15
W16
AA16 AB16
AA17 AB17 AA18 AB18 AA19 AB19 AA20 AB20
AA21 AB21
AA22 AB22
AA23 AB23
AA24 AB24
AA25 AB25
AA26 AB26
W25
W26
L12 M12 N12 P12 R12
T12 U12 V12
L13 M13 N13 P13 R13
T13 U13 V13
Y12 Y13
L14 M14 N14 P14 R14
T14 U14 V14
Y14
L15 M15 N15 P15 R15
T15 U15 V15
Y15
L16 M16 N16 P16 R16
T16 U16 V16
Y16
R17 Y17
R21 Y21
Y22
Y23
Y24
Y25
Y26
V25
L26 M26 N26 P26 R26
T26 U26 V26
5
U48H
VTT_NCTF17 VTT_NCTF16 VTT_NCTF15 VTT_NCTF14 VTT_NCTF13 VTT_NCTF12 VTT_NCTF11 VTT_NCTF10 VTT_NCTF9 VTT_NCTF8 VTT_NCTF7 VTT_NCTF6 VTT_NCTF5 VTT_NCTF4 VTT_NCTF3 VTT_NCTF2 VTT_NCTF1 VTT_NCTF0
VSS_NCTF68 VSS_NCTF67 VSS_NCTF66 VSS_NCTF65 VSS_NCTF64 VSS_NCTF63 VSS_NCTF62 VSS_NCTF61 VSS_NCTF60 VSS_NCTF59 VSS_NCTF58 VSS_NCTF57 VSS_NCTF56 VSS_NCTF55 VSS_NCTF54 VSS_NCTF53 VSS_NCTF52 VSS_NCTF51 VSS_NCTF50 VSS_NCTF49 VSS_NCTF48 VSS_NCTF47 VSS_NCTF46 VSS_NCTF45 VSS_NCTF44 VSS_NCTF43 VSS_NCTF42 VSS_NCTF41 VSS_NCTF40 VSS_NCTF39 VSS_NCTF38 VSS_NCTF37 VSS_NCTF36 VSS_NCTF35 VSS_NCTF34 VSS_NCTF33 VSS_NCTF32 VSS_NCTF31 VSS_NCTF30 VSS_NCTF29 VSS_NCTF28 VSS_NCTF27 VSS_NCTF26 VSS_NCTF25 VSS_NCTF24 VSS_NCTF23 VSS_NCTF22 VSS_NCTF21 VSS_NCTF20 VSS_NCTF19 VSS_NCTF18 VSS_NCTF17 VSS_NCTF16 VSS_NCTF15 VSS_NCTF14 VSS_NCTF13 VSS_NCTF12 VSS_NCTF11 VSS_NCTF10 VSS_NCTF9 VSS_NCTF8 VSS_NCTF7 VSS_NCTF6 VSS_NCTF5 VSS_NCTF4 VSS_NCTF3 VSS_NCTF2 VSS_NCTF1 VSS_NCTF0
VCC_NCTF10 VCC_NCTF9 VCC_NCTF8 VCC_NCTF7 VCC_NCTF6 VCC_NCTF5 VCC_NCTF4 VCC_NCTF3 VCC_NCTF2 VCC_NCTF1 VCC_NCTF0
ALVISO_BGA1257
VCCSM_NCTF31 VCCSM_NCTF30 VCCSM_NCTF29 VCCSM_NCTF28 VCCSM_NCTF27 VCCSM_NCTF26 VCCSM_NCTF25 VCCSM_NCTF24 VCCSM_NCTF23 VCCSM_NCTF22 VCCSM_NCTF21 VCCSM_NCTF20 VCCSM_NCTF19 VCCSM_NCTF18 VCCSM_NCTF17 VCCSM_NCTF16 VCCSM_NCTF15 VCCSM_NCTF14 VCCSM_NCTF13 VCCSM_NCTF12 VCCSM_NCTF11 VCCSM_NCTF10
VCCSM_NCTF9 VCCSM_NCTF8 VCCSM_NCTF7 VCCSM_NCTF6 VCCSM_NCTF5 VCCSM_NCTF4 VCCSM_NCTF3 VCCSM_NCTF2 VCCSM_NCTF1 VCCSM_NCTF0
VCC_NCTF78 VCC_NCTF77 VCC_NCTF76 VCC_NCTF75 VCC_NCTF74 VCC_NCTF73 VCC_NCTF72 VCC_NCTF71 VCC_NCTF70
NCTF
VCC_NCTF69 VCC_NCTF68 VCC_NCTF67 VCC_NCTF66 VCC_NCTF65 VCC_NCTF64 VCC_NCTF63 VCC_NCTF62 VCC_NCTF61 VCC_NCTF60 VCC_NCTF59 VCC_NCTF58 VCC_NCTF57 VCC_NCTF56 VCC_NCTF55 VCC_NCTF54 VCC_NCTF53 VCC_NCTF52 VCC_NCTF51 VCC_NCTF50 VCC_NCTF49 VCC_NCTF48 VCC_NCTF47 VCC_NCTF46 VCC_NCTF45 VCC_NCTF44 VCC_NCTF43 VCC_NCTF42 VCC_NCTF41 VCC_NCTF40 VCC_NCTF39 VCC_NCTF38 VCC_NCTF37 VCC_NCTF36 VCC_NCTF35 VCC_NCTF34 VCC_NCTF33 VCC_NCTF32 VCC_NCTF31 VCC_NCTF30 VCC_NCTF29 VCC_NCTF28 VCC_NCTF27 VCC_NCTF26 VCC_NCTF25 VCC_NCTF24 VCC_NCTF23 VCC_NCTF22 VCC_NCTF21 VCC_NCTF20 VCC_NCTF19 VCC_NCTF18 VCC_NCTF17 VCC_NCTF16 VCC_NCTF15 VCC_NCTF14 VCC_NCTF13 VCC_NCTF12 VCC_NCTF11
D D
C C
B B
A A
AB12 AC12 AD12 AB13 AC13 AD13 AC14 AD14 AC15 AD15 AC16 AD16 AC17 AD17 AC18 AD18 AC19 AD19 AC20 AD20 AC21 AD21 AC22 AD22 AC23 AD23 AC24 AD24 AC25 AD25 AC26 AD26
L17 M17 N17 P17 T17 U17 V17 W17 L18 M18 N18 P18 R18 Y18 L19 M19 N19 P19 R19 Y19 L20 M20 N20 P20 R20 Y20 L21 M21 N21 P21 T21 U21 V21 W21 L22 M22 N22 P22 R22 T22 U22 V22 W22 L23 M23 N23 P23 R23 T23 U23 V23 W23 L24 M24 N24 P24 R24 T24 U24 V24 W24 L25 M25 N25 P25 R25 T25 U25
+1.8V
C236
+VCCP
C191
0.1U_0402_10V6K
0.1U_0402_10V6K
1
1
C178
C241
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
1
C223
C188
2
2
0.1U_0402_10V6K 1
1
C275
C274
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K 1
1
C255
C726
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
1
C272
C242
2
2
+VCCP
0.1U_0402_10V6K
0.1U_0402_10V6K 1
1
C276
C156
2
2
4
0.1U_0402_10V6K
1
1
C754
2
2
U48I
Y1
VSS271
D2
VSS270
G2
VSS269
J2
VSS268
L2
VSS260
P2
VSS259
T2
VSS258
V2
VSS257
AD2
VSS256
AE2
VSS255
AH2
VSS254
AL2
VSS253
AN2
VSS252
A3
C3 AA3 AB3
AC3
AJ3
C4
H4
L4
P4
U4
Y4 AF4
AN4
E5
W5 AL5 AP5
B6 J6 L6 P6 T6
AA6
AC6
AE6 AJ6
G7
V7
AA7
AG7
AK7
AN7
C8 E8 L8 P8 Y8
AL8
A9 H9 K9 T9 V9
AA9
AC9
AE9
AH9 AN9
D10
L10 Y10
AA10
F11 H11
+VCCP
0.1U_0402_10V6K
1
1
C273
2
2
0.1U_0402_10V6K 1
+
C606
2
330U_D2E_2.5VM_R9
Y11
C610
10U_0805_10V4Z
2
1
C609
@
ALVISO_BGA1257
22U_1206_6.3V6M
0.1U_0402_10V6K
2
1
VSS
VSS251 VSS250 VSS249 VSS248 VSS247 VSS246 VSS245 VSS244 VSS243 VSS242 VSS241 VSS240 VSS239 VSS238 VSS237 VSS236 VSS235 VSS234 VSS233 VSS232 VSS231 VSS230 VSS229 VSS228 VSS227 VSS226 VSS225 VSS224 VSS223 VSS222 VSS221 VSS220 VSS219 VSS218 VSS217 VSS216 VSS215 VSS214 VSS213 VSS212 VSS211 VSS210 VSS209 VSS208 VSS207 VSS206 VSS205 VSS204 VSS203 VSS202 VSS201 VSS200 VSS199 VSS198 VSS197 VSS196
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
B36
VSSALVDS
AA11
VSS195
AF11
VSS194
AG11
VSS193
AJ11
VSS192
AL11
VSS191
AN11
VSS190
B12
VSS189
D12
VSS188
J12
VSS187
A14
VSS186
B14
VSS185
F14
VSS184
J14
VSS183
K14
VSS182
AG14
VSS181
AJ14
VSS180
AL14
VSS179
AN14
VSS178
C15
VSS177
K15
VSS176
A16
VSS175
D16
VSS174
H16
VSS173
K16
VSS172
AL16
VSS171
C17
VSS170
G17
VSS169
AF17
VSS168
AJ17
VSS167
AN17
VSS166
A18
VSS165
B18
VSS164
U18
VSS163
AL18
VSS162
C19
VSS161
H19
VSS160
J19
VSS159
T19
VSS158
W19
VSS157
AG19
VSS156
AN19
VSS155
A20
VSS154
D20
VSS153
E20
VSS152
F20
VSS151
G20
VSS150
V20
VSS149
AK20
VSS148
C21
VSS147
F21
VSS146
AF21
VSS145
AN21
VSS144
A22
VSS143
D22
VSS142
E22
VSS141
J22
VSS140
AH22
VSS139
AL22
VSS138
H23
VSS137
AF23
VSS136
B24
VSS135
D24
VSS134
F24
VSS133
J24
VSS132
AG24
VSS131
AJ24
VSS130
2005/03/01 2006/03/01
Compal Secret Data
Deciphered Date
U48J
AL24
VSS267
AN24
VSS266
A26
VSS265
E26
VSS264
G26
VSS263
J26
VSS262
B27
VSS261
E27
VSS129
G27
VSS128
W27
VSS127
AA27
VSS126
AB27
VSS125 VSS124 VSS123 VSS122 VSS121 VSS120 VSS119 VSS118 VSS117 VSS116 VSS115 VSS114 VSS113 VSS112 VSS111 VSS110 VSS109 VSS108 VSS107 VSS106 VSS105 VSS104 VSS103 VSS102 VSS101 VSS100 VSS99 VSS98 VSS97 VSS96 VSS95 VSS94 VSS93 VSS92 VSS91 VSS90 VSS89 VSS88 VSS87 VSS86 VSS85 VSS84 VSS83 VSS82 VSS81 VSS80 VSS79 VSS78 VSS77 VSS76 VSS75 VSS74 VSS73 VSS72 VSS71 VSS70 VSS69 VSS68
VSS
Title
Size Document Number Rev
星@, 06, 2006
Date: Sheet
AF27
AG27
AJ27 AL27 AN27
E28
W28 AA28 AB28 AC28
A29 D29 E29 F29 G29 H29
L29 P29 U29 V29
W29 AA29 AD29
AG29
AJ29
AM29
C30
Y30 AA30 AB30 AC30 AE30 AP30
D31
E31
F31
G31
H31
J31
K31
L31
M31
N31
P31
R31
T31
U31
V31
W31
AD31
AG31
AL31
A32
C32
Y32 AA32 AB32
ALVISO_BGA1257
2
AC32
VSS67
AD32
VSS66
AJ32
VSS65
AN32
VSS64
D33
VSS63
E33
VSS62
F33
VSS61
G33
VSS60
H33
VSS59
J33
VSS58
K33
VSS57
L33
VSS56
M33
VSS55
N33
VSS54
P33
VSS53
R33
VSS52
T33
VSS51
U33
VSS50
V33
VSS49
W33
VSS48
AD33
VSS47
AF33
VSS46
AL33
VSS45
C34
VSS44
AA34
VSS43
AB34
VSS42
AC34
VSS41
AD34
VSS40
AH34
VSS39
AN34
VSS38
B35
VSS37
D35
VSS36
E35
VSS35
F35
VSS34
G35
VSS33
H35
VSS32
J35
VSS31
K35
VSS30
L35
VSS29
M35
VSS28
N35
VSS27
P35
VSS26
R35
VSS25
T35
VSS24
U35
VSS23
V35
VSS22
W35
VSS21
Y35
VSS20
AE35
VSS19
C36
VSS18
AA36
VSS17
AB36
VSS16
AC36
VSS15
AD36
VSS14
AE36
VSS13
AF36
VSS12
AJ36
VSS11
AL36
VSS10
AN36
VSS9
E37
VSS8
H37
VSS7
K37
VSS6
M37
VSS5
P37
VSS4
T37
VSS3
V37
VSS2
Y37
VSS1
AG37
VSS0
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
薑三月
1
12 59
D
of
Page 13
A
DDR_A_D[0..63]9 DDR_A_DM[0..7]9 DDR_A_DQS[0..7]9 DDR_A_MA[0..13]9 DDR_A_DQS#[0..7]9
1 1
2 2
3 3
4 4
+1.8V
+0.9VS
0.1U_0402_16V4Z~D
2.2U_0805_10V6K~D 1
2
0.1U_0402_16V4Z~D
1
2
C320
DDR_A_BS#2 DDR_A_MA12 DDR_A_MA9 DDR_A_MA8
DDR_A_MA5 DDR_A_MA1 DDR_A_MA10 DDR_A_BS#0
DDR_A_WE# DDR_A_CAS# DDR_SCS#1 M_ODT1
2.2U_0805_10V6K~D
C277
0.1U_0402_16V4Z~D 1
2
1
2
C314
56_0804_8P4R_5%
56_0804_8P4R_5%
DDR_A_D[0..63] DDR_A_DM[0..7] DDR_A_DQS[0..7] DDR_A_MA[0..13] DDR_A_DQS#[0..7]
2.2U_0805_10V6K~D
C319
1
1
2
2
0.1U_0402_16V4Z~D C335
C313
1
2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
2
C294
RP59
RP52
56_0804_8P4R_5%
RP50
2.2U_0805_10V6K~D
C347
1
2
0.1U_0402_16V4Z~D C303
1
2
0.1U_0402_16V4Z~D
1
2
C268
+0.9VS
18 27 36 45
56_0804_8P4R_5%
18 27 36 45
56_0804_8P4R_5%
18 27 36 45
56_0804_8P4R_5%
1 2
R236 56_0402_5%
1 2
R747 56_0402_5%
C253
0.1U_0402_16V4Z~D
1
2
C787
RP16
RP14
RP12
2.2U_0805_10V6K~D C334
1
2
C285
1
2
0.1U_0402_16V4Z~D
1
2
C766
DDR_A_MA4
18
DDR_A_MA6
27
DDR_A_MA7
36
DDR_CKE1_DIMMA
45
DDR_A_BS#1
18
DDR_A_MA0
27
DDR_A_MA3
36
DDR_A_MA2
45
DDR_A_MA13
18
M_ODT0
27
DDR_SCS#0
36
DDR_A_RAS#
45
DDR_A_MA11 DDR_CKE0_DIMMA
1
+
C349 330U_D2E_2.5VM_R9
2
0.1U_0402_16V4Z~D
1
2
C772
B
@
DDR_CLK0
10P_0402_50V8J~D
1
C376
2
DDR_CLK0#
@
DDR_CLK1
10P_0402_50V8J~D
1
C203
2
DDR_CLK1#
0.1U_0402_16V4Z~D
1
2
C781
C
DDR_A_D0 DDR_A_D1
DDR_A_DQS#0 DDR_A_DQS0
DDR_A_D2 DDR_A_D3
DDR_A_D8 DDR_A_D9
DDR_A_DQS#1 DDR_CLK0 DDR_A_DQS1
DDR_A_D10 DDR_A_D11
DDR_A_D16 DDR_A_D17
DDR_A_DQS#2 DDR_A_DQS2
DDR_A_D18 DDR_A_D19
DDR_A_D24 DDR_A_D25
DDR_A_DM3
DDR_A_D26 DDR_A_D27
DDR_CKE0_DIMMA8
DDR_A_BS#29
DDR_A_BS#09 DDR_A_WE#9
DDR_A_CAS#9
DDR_SCS#18
M_ODT18
CK_SDATA14,17 CK_SCLK14,17
DDR_CKE0_DIMMA
DDR_A_BS#2 DDR_A_MA12
DDR_A_MA9 DDR_A_MA7 DDR_A_MA8
DDR_A_MA5 DDR_A_MA3 DDR_A_MA1
DDR_A_MA10 DDR_A_BS#0 DDR_A_WE#
DDR_A_CAS# DDR_SCS#1
M_ODT1 DDR_A_D32
DDR_A_D33 DDR_A_DQS#4
DDR_A_DQS4 DDR_A_D34
DDR_A_D35 DDR_A_D40
DDR_A_D41 DDR_A_DM5 DDR_A_D42
DDR_A_D43 DDR_A_D48
DDR_A_D49
DDR_A_DQS#6 DDR_A_DQS6
DDR_A_D50 DDR_A_D51
DDR_A_D56 DDR_A_D57
DDR_A_DM7 DDR_A_D58
DDR_A_D59 CK_SDATA
CK_SCLK
+3VS
+1.8V +1.8V
JDIM1 1 3 5 7 9
11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97
99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199
0.1U_0402_16V4Z~D C90
1
2
201
2.2U_0805_10V6K~D C92
1
2
FOX_ASOA426-M2R-TR
VREF VSS DQ0 DQ1 VSS DQS0# DQS0 VSS DQ2 DQ3 VSS DQ8 DQ9 VSS DQS1# DQS1 VSS DQ10 DQ11 VSS
VSS DQ16 DQ17 VSS DQS2# DQS2 VSS DQ18 DQ19 VSS DQ24 DQ25 VSS DM3 NC VSS DQ26 DQ27 VSS CKE0 VDD NC BA2 VDD A12 A9 A8 VDD A5 A3 A1 VDD A10/AP BA0 WE# VDD CAS# NC/S1# VDD NC/ODT1 VSS DQ32 DQ33 VSS DQS4# DQS4 VSS DQ34 DQ35 VSS DQ40 DQ41 VSS DM5 VSS DQ42 DQ43 VSS DQ48 DQ49 VSS NC,TEST VSS DQS6# DQS6 VSS DQ50 DQ51 VSS DQ56 DQ57 VSS DM7 VSS DQ58 DQ59 VSS SDA SCL VDDSPD GND
DIMMA
D
DQ4 DQ5 VSS DM0 VSS DQ6 DQ7
VSS DQ12 DQ13
VSS
DM1
VSS
CK0
CK0#
VSS DQ14 DQ15
VSS
VSS DQ20 DQ21
VSS
DM2
VSS DQ22 DQ23
VSS DQ28 DQ29
VSS
DQS3#
DQS3
VSS DQ30 DQ31
VSS
NC/CKE1
VDD
NC/A15 NC/A14
VDD
VDD
VDD RAS#
VDD ODT0
NC/A13
VDD
VSS DQ36 DQ37
VSS
DM4
VSS DQ38 DQ39
VSS DQ44 DQ45
VSS
DQS5#
DQS5
VSS DQ46 DQ47
VSS DQ52 DQ53
VSS
CK1
CK1#
VSS
DM6
VSS DQ54 DQ55
VSS DQ60 DQ61
VSS
DQS7#
DQS7
VSS DQ62 DQ63
VSS
SAO
GND
VSS
A11
BA1 S0#
SA1
E
V_DDR_MCH_REF
2
DDR_A_D4
4
DDR_A_D5
6 8
DDR_A_DM0
10 12
DDR_A_D6
14
DDR_A_D7
16 18
DDR_A_D12
20
DDR_A_D13
22 24
DDR_A_DM1
26 28 30
DDR_CLK0#
32 34
DDR_A_D14
36
DDR_A_D15
38 40
42
DDR_A_D20
44
DDR_A_D21
46 48 50
NC
A7 A6
A4 A2 A0
NC
52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202
DDR_A_DM2 DDR_A_D22
DDR_A_D23 DDR_A_D28
DDR_A_D29 DDR_A_DQS#3
DDR_A_DQS3 DDR_A_D30
DDR_A_D31 DDR_CKE1_DIMMA
DDR_A_MA11 DDR_A_MA6 DDR_A_MA4
DDR_A_MA2 DDR_A_MA0
DDR_A_BS#1 DDR_A_RAS# DDR_SCS#0
M_ODT0 DDR_A_MA13
DDR_A_D36 DDR_A_D37
DDR_A_DM4 DDR_A_D38
DDR_A_D39 DDR_A_D44
DDR_A_D45 DDR_A_DQS#5
DDR_A_DQS5 DDR_A_D46
DDR_A_D47 DDR_A_D52
DDR_A_D53 DDR_CLK1
DDR_CLK1# DDR_A_DM6 DDR_A_D54
DDR_A_D55 DDR_A_D60
DDR_A_D61 DDR_A_DQS#7
DDR_A_DQS7 DDR_A_D62
DDR_A_D63
10K_0402_5%~D
10K_0402_5%~D
12
R118
R111
1 2
0.1U_0402_16V4Z~D
2.2U_0805_10V6K~D
1
C400
2
DDR_CLK0 8 DDR_CLK0# 8
DDR_CKE1_DIMMA 8
DDR_A_BS#1 9 DDR_A_RAS# 9
DDR_SCS#0 8
M_ODT0 8
DDR_CLK1 8 DDR_CLK1# 8
1
2
V_DDR_MCH_REF 14
C398
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2005/03/11 2006/03/11
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
星@, 06, 2006
薑三月
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
13 59
E
D
of
Page 14
A
DDR_B_D[0..63]9 DDR_B_DM[0..7]9 DDR_B_DQS[0..7]9 DDR_B_MA[0..13]9 DDR_B_DQS#[0..7]9
1 1
2 2
3 3
4 4
+1.8V
2.2U_0805_10V6K~D
0.1U_0402_16V4Z~D
+0.9VS
0.1U_0402_16V4Z~D
DDR_B_BS#0 DDR_B_MA10 DDR_B_MA1 DDR_B_MA3
DDR_B_RAS# DDR_SCS#2 M_ODT2 DDR_B_MA13
M_ODT3 DDR_SCS#3 DDR_B_CAS# DDR_B_WE#
1
2
1
2
1
2
C770
56_0804_8P4R_5%
A
DDR_B_D[0..63] DDR_B_DM[0..7] DDR_B_DQS[0..7] DDR_B_MA[0..13] DDR_B_DQS#[0..7]
2.2U_0805_10V6K~D
C337
C256
1
2
0.1U_0402_16V4Z~D
C283
C304
1
2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
2
2
C308
RP15
56_0804_8P4R_5%
RP51 1 8 2 7 3 6 4 5
RP13
56_0804_8P4R_5%
2.2U_0805_10V6K~D 1
2
0.1U_0402_16V4Z~D 1
2
0.1U_0402_16V4Z~D
1
2
C776
+0.9VS
18 27 36 45
56_0804_8P4R_5%
18 27 36 45
56_0804_8P4R_5%
R237 56_0402_5% R244 56_0402_5%
2.2U_0805_10V6K~D
C321
0.1U_0402_16V4Z~D
C271
0.1U_0402_16V4Z~D
C780
1 8 2 7 3 6 4 5
56_0804_8P4R_5%
1 2 1 2
RP60
RP53
1
2
1
2
1
2
RP17
C784
C344
C310
2.2U_0805_10V6K~D
0.1U_0402_16V4Z~D
1
2
18 27 36 45
18 27 36 45
B
1
C257
1
+
2
2
0.1U_0402_16V4Z~D
1
2
C295
C270
DDR_B_MA5 DDR_B_MA8 DDR_B_MA9 DDR_B_MA12
DDR_CKE3_DIMMB DDR_B_MA11 DDR_B_MA7 DDR_B_MA6
DDR_B_MA4 DDR_B_MA2 DDR_B_MA0 DDR_B_BS#1
DDR_B_BS#2 DDR_CKE2_DIMMB
B
C299 330U_D2E_2.5VM_R9
0.1U_0402_16V4Z~D
1
2
C316
C
@
DDR_CLK3
10P_0402_50V8J~D
1
C380
2
DDR_CLK3#
@
DDR_CLK4
10P_0402_50V8J~D
1
C204
2
DDR_CLK4#
Layout Note: Place these resistor closely JDIM1,all trace length<750 mil
Layout Note: Place these resistor closely JDIM1,all trace length Max=1.3"
C
D
DDR_CKE2_DIMMB8
DDR_B_BS#29
DDR_B_BS#09 DDR_B_WE#9
DDR_B_CAS#9
DDR_SCS#38
CK_SDATA13,17 CK_SCLK13,17
E
DDR_B_D0 DDR_B_D1
DDR_B_DQS#0 DDR_B_DQS0
DDR_B_D2 DDR_B_D3
DDR_B_D8 DDR_B_D9
DDR_B_DQS#1 DDR_B_DQS1
DDR_B_D10 DDR_B_D11
DDR_B_D16 DDR_B_D17
DDR_B_DQS#2 DDR_B_DQS2
DDR_B_D18 DDR_B_D19
DDR_B_D24 DDR_B_D25
DDR_B_DM3
DDR_B_D26 DDR_B_D27
DDR_CKE2_DIMMB
DDR_B_BS#2 DDR_B_MA12
DDR_B_MA9 DDR_B_MA8
DDR_B_MA5 DDR_B_MA3 DDR_B_MA1
DDR_B_MA10 DDR_B_BS#0 DDR_B_WE#
DDR_B_CAS#
M_ODT38
M_ODT3 DDR_B_D32
DDR_B_D33 DDR_B_DQS#4
DDR_B_DQS4 DDR_B_D34
DDR_B_D35 DDR_B_D40
DDR_B_D41 DDR_B_DM5 DDR_B_D42
DDR_B_D43 DDR_B_D48
DDR_B_D49
DDR_B_DQS#6 DDR_B_DQS6
DDR_B_D50 DDR_B_D51
DDR_B_D56 DDR_B_D57
DDR_B_DM7 DDR_B_D58
DDR_B_D59 CK_SDATA
CK_SCLK
+3VS
+1.8V +1.8V
2.2U_0805_10V6K~D
0.1U_0402_16V4Z~D C93
C91
1
1
2
2
F
JDIM2
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
201
GND
FOX_ASOA426-M2R-TR
DIMMB
DQ12 DQ13
DQ14 DQ15
DQ20 DQ21
DQ22 DQ23
DQ28 DQ29
DQS3#
DQS3 DQ30
DQ31
NC/CKE1
NC/A15 NC/A14
ODT0
NC/A13
DQ36 DQ37
DQ38 DQ39
DQ44 DQ45
DQS5#
DQS5 DQ46
DQ47 DQ52
DQ53
DQ54 DQ55
DQ60 DQ61
DQS7#
DQS7 DQ62
DQ63
STANDARD
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
2005/03/11 2006/03/11
E
Compal Secret Data
Deciphered Date
F
VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7 VSS
VSS DM1 VSS CK0
CK0#
VSS
VSS
VSS
VSS DM2
VSS
VSS
VSS
VSS
VSS VDD
VDD
A11
VDD
VDD
BA1
RAS#
S0# VDD
VDD VSS
VSS DM4 VSS
VSS
VSS
VSS
VSS
VSS CK1
CK1#
VSS DM6 VSS
VSS
VSS
VSS
VSS SAO
SA1
GND
G
V_DDR_MCH_REF
2
DDR_B_D4
4
DDR_B_D5
6 8
DDR_B_DM0
10 12
DDR_B_D6
14
DDR_B_D7
16 18
DDR_B_D12
20
DDR_B_D13
22 24
DDR_B_DM1
26 28
M_CLK_DDR3
30
M_CLK_DDR#3
32 34
DDR_B_D14
36
DDR_B_D15
38 40
42
DDR_B_D20
44
DDR_B_D21
46 48 50
NC
A7 A6
A4 A2 A0
NC
52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202
DDR_B_DM2 DDR_B_D22
DDR_B_D23 DDR_B_D28
DDR_B_D29 DDR_B_DQS#3
DDR_B_DQS3 DDR_B_D30
DDR_B_D31 DDR_CKE3_DIMMB
DDR_B_MA11 DDR_B_MA7 DDR_B_MA6
DDR_B_MA4 DDR_B_MA2 DDR_B_MA0
DDR_B_BS#1 DDR_B_RAS# DDR_SCS#2
M_ODT2 DDR_B_MA13DDR_SCS#3
DDR_B_D36 DDR_B_D37
DDR_B_DM4 DDR_B_D38
DDR_B_D39 DDR_B_D44
DDR_B_D45 DDR_B_DQS#5
DDR_B_DQS5 DDR_B_D46
DDR_B_D47 DDR_B_D52
DDR_B_D53 M_CLK_DDR4
M_CLK_DDR#4 DDR_B_DM6 DDR_B_D54
DDR_B_D55 DDR_B_D60
DDR_B_D61 DDR_B_DQS#7
DDR_B_DQS7 DDR_B_D62
DDR_B_D63
10K_0402_5%~D
12
Title
Size Document Number Rev
Date: Sheet
G
R84
1 2
10K_0402_5%~D
R112
星@, 06, 2006
薑三月
2.2U_0805_10V6K~D
0.1U_0402_16V4Z~D
1
C401
2
DDR_CLK3 8
DDR_CLK3# 8
12
V_DDR_MCH_REF
12
DDR_CKE3_DIMMB 8
DDR_B_BS#1 9 DDR_B_RAS# 9
DDR_SCS#2 8
M_ODT2 8
DDR_CLK4 8
DDR_CLK4# 8
+3VS
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
1
C399
2
+1.8V
R329 1K_0402_5%
R340 1K_0402_5%
H
V_DDR_MCH_REF 13
1
C394
0.1U_0402_16V4Z
2
1
C397
0.1U_0402_16V4Z
2
of
14 59
H
D
Page 15
5
G
G
R607
2 2
L72
L73
L76
R839
1 2
0_0402_5%
+3VS
12
D
13
LCDP_DAT
13
D
4
1
4
1
3
2
3
2
4
1
12
2.2K_0402_5%
LCDP_CLK
WCM-2012-670T
WCM-2012-670T
WCM-2012-670T
2.2K_0402_5%
Q33
BSS138_SOT23
Q34
BSS138_SOT23
3
3
2
2
3
3
2
2
L74
4
4
1
1
WCM-2012-670T
L75
4
4
1
1
WCM-2012-670T
3
3
2
2
S
S
TX_A0+43
TX_A0-43
D D
C C
B B
TX_A1+43
TX_A1-43
TX_A2-43
TX_A2+43
TX_AC-43
TX_AC+43
TX_A3-43
TX_A3+43
INVT_PWM30
LCD_CLK10
LCD EEPROM
LCD_DAT10
+2.5VS
4
1
4
1
3
2
3
2
4
1
LTX_A0+
LTX_A0-
LTX_A1+
LTX_A1-
LTX_A2-
LTX_A2+
LTX_AC-
LTX_AC+
LTX_A3-
LTX_A3+
PWM
R606
C47
+LCDVDD
1 2
+3VS
1
2
0.047U_0402_16V4Z
4
R9
0_0805_5%
1
C39
2
0.047U_0402_16V4Z
1
C21
2
0.1U_0402_16V4Z
1
C916
2
0.047U_0402_16V4Z
1
C22
2
0.1U_0402_16V4Z
B+I
2
C589
1
0.1U_0603_50V4Z
LTX_A0­LTX_A0+
LTX_A1­LTX_A1+
LTX_A2­LTX_A2+
LTX_AC­LTX_AC+
LTX_A3­LTX_A3+
BK_EN10
BKOFF#30
2
C588
1
0.1U_0603_50V4Z
3
JLVDS1
1
21
2
22
3
23
4
24
5
25
6
26
7
27
8
28
9
29
10
30
11
31
12
32
13
33
14
34
15
35
16
36
17
37
18
38
19
39
20
40
ACES_88107-4000G
+3VS
5
U39
1
P
A
2
O
B
G
3
NC7ST08P5X_SC70-5
DISPLAYOFF# PWR_LED1#
BATT_LED1# CHARGE_LED1#
DISPLAYOFF#
4
LCD_VDD_EN30
0.1U_0603_50V4Z
PWM
CIR_OUT#
LCDP_CLK LCDP_DAT
LCD_INVB+
C11
DAC_BRIG 30
CIR_OUT# 29
2N7002_SOT23
1
2
1
C1
2
1000P_0402_50V7K
+LCDVDD
13
D
Q7
S
F2
21
2.5A_32V
2
1
470_0402_5%
R48
2
G
2
2
PWR_LED#30,31
+5VALW
C579
0.1U_0402_10V6K
BATT_LED#30,31
CHARGE_LED#30,31
R49 100K_0402_5%
LCD_VDD_EN#
13
Q6 DTC124EK_SC59
INVPWR_B+
B+_BIAS
2
G
PWR_LED1#
R947 330_0603_5%
1 2
Power LED Color:White
BATT_LED1#
R948 330_0603_5%
1 2
Battery low LED Color:Amber
CHARGE_LED1#
CHARGE LED Color :Amber
R608
1 2
330_0603_5%
R609
1 2
330_0603_5%
1 2
R949 330_0603_5%
1 2
+LCDVDD +3VS
80mil 80mil
R50 100K_0402_5%
13
D
Q5 2N7002_SOT23
S
LCD_VDD_ENL#
C40
0.1U_0402_16V4Z
R611
1 2
1M_0603_1%
R612
1 2
1M_0603_1%
R610
330_0603_5%
R613
1 2
1M_0603_1%
SI2302DS_SOT23
S
G
1
2
B
E
2
B
E
2
B
E
Q3
D
13
2
R34 150K_0402_5%
C
Q37 MMBT3904_SOT23
3 1
C
Q38 MMBT3904_SOT23
3 1
C
Q39 MMBT3904_SOT23
3 1
C37
0.1U_0402_16V4Z
1 2
R975 10K_0402_5%@
8 7
5
C13
INVPWR_B+
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/11 2006/03/11
3
Compal Secret Data
Deciphered Date
2
+5VALW
12
R978
@
100K_0402_5%
LCD_VDD_EN# LCD_VDD_ENL#
10K_0402_5%
1 2
R979
@
2
1
0.01U_0402_16V7K
C951
@
Compal Electronics, Inc.
Title
Size Document Number Rev
星期一
Date: Sheet
SCHEMATIC, M /B LA-2831
401362
, 06, 2006
三月
1
of
15 59
D
B+I
1 2 3 6
2N7002_SOT23
+5VS
Q2 FDS4435_SO8
4
Q40
D
1 3
2
4
0.1U_0603_50V4Z
S
G
B+
R1
1 2
C43
0.1U_0603_50V4Z
A A
0_0805_5%
5
L9
FBM-L11-322513-151LMAT_1210
1 2
1
C585
C38
10U_1206_25V6M
2
0.1U_0603_50V4Z
B+I
R617 100K_0402_5%
R616
75K_0402_5%
Page 16
5
4
3
2
1
SMBDAT_VGA
13
D
Q35 2N7002_SOT23
SMBCLK_VGA
13
D
Q36 2N7002_SOT23
C/R_VGA
Y/G_VGA
COMP/B_VGA
12
R23
150_0402_1%
12
R21
150_0402_1%
12
R22
150_0402_1%
D D
C C
DAT_DDC210 CLK_DDC210
DAT_DDC2 CLK_DDC2
C/R_VGA10
Y/G_VGA10
COMP/B_VGA10
+3VS
+3VS
R910
G
2
4.7K_0402_5%
S
+3VS
+3VS
R911
G
2
4.7K_0402_5%
S
DVI Interface
CRT_RED10
B B
HSYNC10
VSYNC10
A A
CRT_GRN10
CRT_BLU10
HSYNC_VGA
VSYNC_VGA
0.1U_0402_16V4Z
R1004
1 2
R1006
1 2
+5VS
C30
0_0402_5%
0_0402_5%
+5VS
1
2
5
5
R20 1K_0402_5%
1 2
1
P
4
OE#
A2Y
G
U1
3
SN74AHCT1G125GW_SOT353-5
1
P
4
OE#
A2Y
G
U2
3
SN74AHCT1G125GW_SOT353-5
1
2
1
2
1
2
1 2
L8 CHB1608U301_0603
C25 82P_0402_50V8J
1 2
L6 CHB1608U301_0603
C23 82P_0402_50V8J
1 2
L7 CHB1608U301_0603
C24 82P_0402_50V8J
DDC_MONID0
MSEN#30
C19
10P_0402_50V8J
1 2
33_0402_5%
1 2
10P_0402_50V8J
1
2
12
R8
75_0402_1%
R1005
R1007
33_0402_5%
C18
R7
12
12
12
MSEN#
1
2
12
R6
75_0402_1%
C16 82P_0402_50V8J
C14 82P_0402_50V8J
C15 82P_0402_50V8J
1
C17 10P_0402_50V8J
2
1 2
L1 FCM2012C-800_0805
1 2
L2 FCM2012C-800_0805
1 2
L3
12
FCM2012C-800_0805
75_0402_1%
SVIDEO_C
SVIDEO_Y SVIDEO_COMP/B
D14
DAN217_SC59@
2
CRTR
CRTG
CRTB
12
C3
3.3P_0402_50V8J
1 2
L4 CHB1608U301_0603
1 2
L5 CHB1608U301_0603
12
12
R3
2K_0402_5%
1
1
C10
2
2
SUYIN_030001FR007T200FU
8
7 8 6
9 5 4 3 2 1
JTV1
W=40mils
100P_0402_50V8J
TV-OUT Connector
9
F1
1.1A_6VDC_FUSE
1
C12
0.1U_0402_16V4Z
2
SMBDAT_VGA SMBCLK_VGA
JCRT1
6
11
1 7
12
2 8
13
3 9
14
4
10
17
15
16
5
SUYIN_7849S-15G2T-HC
+CRT_VCCF+CRT_VCC
21
D20 RB751V_SOD323
CRT Connector
21
+5VS
1
C584
0.1U_0402_16V4Z
2
R842
@
1 2
0_0402_5%
1
D18
2
3
DAN217_SC59@
1
3
1
C6
2
27P_0402_50V8J
D17
DAN217_SC59@
D15
DAN217_SC59@
1
2
3
12
C4
3.3P_0402_50V8J
1
C7
2
27P_0402_50V8J
2
1
3
D19
D16
DAN217_SC59@
1
2
3
12
C5
3.3P_0402_50V8J
1
2
3
+3VS
DAN217_SC59@
+CRT_VCC
R2
2K_0402_5%
+3VS
1
C2
100P_0402_50V8J
1
C8
2
C9
2
100P_0402_50V8J
100P_0402_50V8J
DA204U
K1 A2
A1 K2
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2005/03/11 2006/03/11
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
星@, 06, 2006
薑三月
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
1
16 59
D
of
Page 17
5
+3VS
ICH_SMBDATA20,24
D D
ICH_SMBCLK20,24
ICH_SMBDATA
+3VS
ICH_SMBCLK
D
1 3
1 3
D
D 1
3
G
S
2
2N7002
12
12
R756
10K_0402_5%
S
Q45 2N7002_SOT23
G
2
2
G
Q46 2N7002_SOT23
S
CK_VDD_A CK_VDD_REF
C811
R759
10K_0402_5%
1
2
4.7U_0805_6.3V6K
CK_SDATA
CK_SCLK
0 0 1 for Dothan-A 533Mhz 1 0 1 for Dothan-A 400Mhz
FSC FSB FSA CPU
CLKSEL0 CLKSEL1 CLKSEL2
C C
*
0 0 0 1 1 1
00 0
1 0
1 11 0
0
0
1 0
1
0
11 Table : ICS 954201 / Cypress CY28411
+VCCP
R346 10K_0402_5%
R347
@
1K_0402_5%
1 2
1 2
R344 10K_0402_5% @
1 2
R758
1 2
R295 10K_0402_5% @
1 2
B B
R912
CLKSEL0
1 2
8.2K_0402_5%
CPU_BSEL06
+VCCP
A A
CPU_BSEL16
CLKSEL1
5
MHz
266 133 200 166 333 100 400
RESERVED
10K_0402_5%@
1 2
R288 1K_0402_5%
SRC MHz
100 33.30 100 100 100 100 100 100
PCI MHz
33.3
33.3
33.3
33.3
33.3
33.3
MCH_CLKSEL1 8
CLK_48M_CBUF47 CLK_48M_ICH20
CLK_14M_CODEC27
CLK_33M_CBS24,26 CLK_33M_LPCSIO47 CLK_33M_MPCI26 CLK_33M_LAN23 CLK_33M_ICH18,31 CLK_33M_LPCEC30
MCH_CLKSEL0 8
1
2
C812
0.047U_0402_16V7K
33P_0402_50V8J
33P_0402_50V8J
+3VS
4
CK_VDD_48
C828
C377
C382
R343 10K_0402_5%
1 2
CLKSEL2
R345 10K_0402_5% @
1 2
4
CK_SDATA 13,14
CK_SCLK 13,14
1
1
2
4.7U_0805_6.3V6K
12
12
2
C827
0.047U_0402_16V7K
Place crystal within 500 mils of CK410
12
X4 14.318MHZ_20P_1BX14318CC1A
CLK_48M_CBUF
CLKSEL1 CLK_14M_CODEC CLKSEL0
CLK_33M_CBS CLK_33M_LPCSIO CLK_33M_MPCI CLK_33M_LAN CLK_33M_ICH CLK_33M_LPCEC
+3VS
+3VS
1
C830
2
0.1U_0402_16V4Z
L64
1 2
CHB1608U301_0603
+CK_VDD_MAIN2
L29
1 2
CHB1608U301_0603
1
2
C819
0.047U_0402_16V7K
CK_XTAL_IN
CK_XTAL_OUT
12
R962 12.1_0402_1%
12
R320 12.1_0402_1%
12
R29633_0402_1%
@
12
R317 12.1_0402_1%
12
R330 12.1_0402_1%
12
R316 33_0402_5%
12
R315 33_0402_5%
12
R308 33_0402_5%
12
R319 33_0402_5%
12
R331 33_0402_5%
1 2
R318 10K_0402_5%
PCICLKF0
CK_SCLK
CK_SDATA
1 2
R294 475_0603_1%
Security Classification
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+CK_VDD_MAIN
1 2
R771 1_0603_5%
1 2
R774
2.2_0603_5%
CLKSEL2CLK_48M_ICH
PCICLK5 PCICLK4 PCICLK3 PCICLK2 PCICLKF1
Issued Date
3
CK_VDD_REF
CK_VDD_48
CLKIREF
3
2
C829 10U_0805_10V4Z
1
2
C387 10U_0805_10V4Z
1
U24
21
VDD_SRC0
28
VDD_SRC1
34
VDD_SRC2
1
VDD_PCI0
7
VDD_PCI1
42
VDD_CPU
48
VDD_REF
11
VDD_48
50
XTAL_IN
49
XTAL_OUT
12
FSA/USB_48
16
FSB/TEST_MODE
53
FSC/TEST_SEL
5
PCI5
4
PCI4
3
PCI3
56
PCI2
9
PCIF1
8
PCIF0/ITP_EN
46
SCLOCK
47
SDATA
39
IREF
13
VSS_48
29
VSS_SRC
2
VSS_PCI0
45
VSS_CPU
51
VSS_REF
6
VSS_PCI1
ICS954206AG
1
C825
0.047U_0402_16V7K 2
1
C388
0.047U_0402_16V7K 2
2005/03/11 2006/03/11
1
C820
0.047U_0402_16V7K 2
1
C389
0.047U_0402_16V7K 2
R770
2.2_0603_5%
VDD_A
VSS_A
PCI_STOP#
CPU_STOP#
CPU1
CPU1#
CPU0
CPU0#
SRC6
SRC6#
SRC5
SRC5#
SRC4
SRC4#
SRC3
SRC3#
SRC2
SRC2#
SRC1
SRC1#
SRC0
SRC0#
DOT96
DOT96#
VTT_PWRGD#/PD
REF
CK_VDD_A
1 2
CPU_2_ITP/SRC_7 CPU_2_ITP/SRC7#
Compal Secret Data
Deciphered Date
37 38
55 54
41 40
44 43
36 35
33 32
31 30
26 27
24 25
22 23
19 20
17 18
14 15
10 52
2
1
C821
0.047U_0402_16V7K 2
1
C826
0.047U_0402_16V7K
2
Place near each pin W>40 mil
Place near CK410M
H_STP_PCI# H_STP_CPU#
CK_CPU1
1 2
R301 33_0402_5%
CK_CPU1#
1 2
R302 33_0402_5%
CK_CPU0 CK_CPU0#
CK_CPU2 CK_CPU2#
SCR5 SRC5#
SRC4 SRC4#
SRC2 SRC2# CLK_PCIE_SATA#
SRC1 SRC1# CLK_PCIE_ICH#
SRC0 SRC0# SSC_DREFCLK#
CLK_DOT96 CLK_DOT96#
CLKREF
1 2
R299 33_0402_5%
1 2
R300 33_0402_5%
1 2
R303 33_0402_5%
1 2
R304 33_0402_5%
1 2
R305 33_0402_5%
1 2
R306 33_0402_5%
1 2
R327 33_0402_5%
1 2
R328 33_0402_5%
1 2
R388 33_0402_5%
1 2
R398 33_0402_5%
1 2
R325 33_0402_5%
1 2
R326 33_0402_5%
1 2
R323 33_0402_5%
1 2
R324 33_0402_5%
1 2
R321 33_0402_5%
1 2
R322 33_0402_5%
1 2
R915 49.9_0402_1%
1 2
R916 49.9_0402_1%
CLK_14M_ICH
1 2
R297 12.1_0402_1%
CLK_14M_SIO
1 2
R298 12.1_0402_1%
2
H_STP_PCI# 20 H_STP_CPU# 20,56
CLK_MCH_BCLK CLK_MCH_BCLK#
CLK_CPU_BCLK CLK_CPU_BCLK#
CLK_ITP CLK_ITP#
CLK_MCH_3GPLL CLK_MCH_3GPLL#
CLK_PCIE_CARD CLK_PCIE_CARD#
CLK_PCIE_SATA
CLK_PCIE_ICH
SSC_DREFCLK
DREFCLK DREFCLK#
CLK_14M_ICH 20
CLK_14M_SIO 31
Size Document Number Rev
Date: Sheet
BSS138_SOT23
Title
CLK_MCH_BCLK CLK_MCH_BCLK# CLK_CPU_BCLK CLK_CPU_BCLK# CLK_ITP CLK_ITP# CLK_PCIE_CARD CLK_PCIE_CARD# CLK_PCIE_ICH CLK_PCIE_ICH# CLK_MCH_3GPLL CLK_MCH_3GPLL# CLK_PCIE_SATA CLK_PCIE_SATA#
SSC_DREFCLK SSC_DREFCLK# DREFCLK DREFCLK#
CLK_PCIE_CARD 24 CLK_PCIE_CARD# 24
CLK_PCIE_SATA 19 CLK_PCIE_SATA# 19
CLK_PCIE_ICH 20 CLK_PCIE_ICH# 20
SSC_DREFCLK 8 SSC_DREFCLK# 8
DREFCLK 8 DREFCLK# 8
+3VS
12
R342
10K_0402_5%
13
D
Q12
S
Compal Electronics, Inc.
星@, 06, 2006
薑三月
1
12
R282 49.9_0402_1%
12
R283 49.9_0402_1%
12
R280 49.9_0402_1%
12
R281 49.9_0402_1%
12
R284 49.9_0402_1%
12
R285 49.9_0402_1%
1 2
R338 49.9_0402_1%
1 2
R339 49.9_0402_1%
1 2
R336 49.9_0402_1%
1 2
R337 49.9_0402_1%
1 2
R286 49.9_0402_1%
1 2
R287 49.9_0402_1%
1 2
R558 49.9_0402_1%
1 2
R555 49.9_0402_1%
1 2
R334 49.9_0402_1%
1 2
R335 49.9_0402_1%
1 2
R332 49.9_0402_1%
1 2
R333 49.9_0402_1%
CLK_MCH_BCLK 8 CLK_MCH_BCLK# 8
CLK_CPU_BCLK 5 CLK_CPU_BCLK# 5
CLK_ITP 5 CLK_ITP# 5
CLK_MCH_3GPLL 10 CLK_MCH_3GPLL# 10
R348 10K_0402_5%
1 2
2
G
1
C405
2
0.047U_0402_16V4Z
SCHEMATIC, M/B LA-2831
401362
1
17 59
VGATE 8,20,30,56
D
of
Page 18
5
RP38
+3VS
D D
+3VS
+3VS
+3VS
C C
+3VS
+3VALW
B B
A A
1 8 2 7 3 6 4 5
8.2K_0804_8P4R_5%
RP39
1 8 2 7 3 6 4 5
8.2K_0804_8P4R_5% RP37
1 8 2 7 3 6 4 5
8.2K_0804_8P4R_5%
PCI_SERR# PCI_FRAME# PCI_TRDY# PCI_STOP#
PCI_IRDY# PCI_PLOCK# PCI_DEVSEL# PCI_PERR#
PCI_PIRQD# PCI_PIRQB# PCI_PIRQH# PCI_PIRQC#
R8518.2K_0402_5%
1 2
R8528.2K_0402_5%
1 2
R8538.2K_0402_5%
1 2
R5328.2K_0402_5%
1 2
R8148.2K_0402_5%
1 2
R5538.2K_0402_5%
1 2
R5528.2K_0402_5%
1 2
R8198.2K_0402_5%
1 2
R8108.2K_0402_5%
1 2
R8598.2K_0402_5%
1 2
R5618.2K_0402_5%
1 2 1 2
R467 10K_0402_1%
ICH_PME#
RTC Battery
JRTC1
2
-
MAXELL_1220G
PCI_PIRQE# PCI_PIRQF#
PCI_PIRQA#
PCI_REQ0# PCI_REQ1# PCI_REQ3# PCI_REQ4#
PCI_REQ2# PCI_REQ5# PCI_REQ6#
PCI_AD[0..31]23,24,26,35
CHGRTC
2
1
+
+RTCVCC
3
1
PCI_FRAME#23,24,26,35
PCI_PIRQA#24 PCI_PIRQB#26 PCI_PIRQC#35
BAS40-04_SOT23 D6
4
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27PCI_PIRQG# PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_FRAME#
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
PLTRST#
PCI_PCIRST#
U33B
E2
AD[0]
E5
AD[1]
C2
AD[2]
F5
AD[3]
F3
AD[4]
E9
AD[5]
F2
AD[6]
D6
AD[7]
E6
AD[8]
D3
AD[9]
A2
AD[10]
D2
AD[11]
D5
AD[12]
H3
AD[13]
B4
AD[14]
J5
AD[15]
K2
AD[16]
K5
AD[17]
D4
AD[18]
L6
AD[19]
G3
AD[20]
H4
AD[21]
H2
AD[22]
H5
AD[23]
B3
AD[24]
M6
AD[25]
B2
AD[26]
K6
AD[27]
K3
AD[28]
A5
AD[29]
L1
AD[30]
K4
AD[31]
J3
FRAME#
Interrupt I/F
N2
PIRQ[A]#
L2
PIRQ[B]#
M1
PIRQ[C]#
L3
PIRQ[D]#
AC5
SATA[1]RXN/RSVD[1]
AD5
SATA[1]RXP/RSVD[2]
AF4
SATA[1]TXN/RSVD[3]
AG4
SATA[1]TXP/RSVD[4]
AC9
SATA[3]RXN/RSVD[5]
AD9
SATA[3]RXP/RSVD[6]
AF8
SATA[3]TXN/RSVD[7]
AG8
SATA[3]TXP/RSVD[8]
U3
TP[3]/RSVD[9]
ICH6_BGA609
+3V
PCI
REQ[4]#/GPI[40]
GNT[4]#/GPO[48]
REQ[5]#/GPI[1]
GNT[5]#/GPO[17]
REQ[6]#/GPI[0]
GNT[6]#/GPO[16]
PIRQ[E]#/GPI[2] PIRQ[F]#/GPI[3]
PIRQ[G]#GPI[4]
PIRQ[H]#/GPI[5]
RESERVED
14
4
P
A
5
B
G
7
+3V
14
10
P
A
9
B
G
7
R804
@ 33_0402_5%
1 2
+3V
13
A
12
B
L5
REQ[0]#
C1
GNT[0]#
B5
REQ[1]#
B6
GNT[1]#
M5
REQ[2]#
F1
GNT[2]#
B8
REQ[3]#
C8
GNT[3]#
F7 E7 E8 F6 B7 D8
J6
C/BE[0]#
H6
C/BE[1]#
G4
C/BE[2]#
G2
C/BE[3]#
A3
IRDY#
E1
PAR
R2
PCIRST#
C3
DEVSEL#
E3
PERR#
C5
PLOCK#
G5
SERR#
J1
STOP#
J2
TRDY#
R5
PLTRST#
G6
PCICLK
P6
PME#
D9 C7 C6 M3
U53B
6
O
74VHC08MTC_TSSOP14
R812
@
1 2
33_0402_5%
R807
@
1 2
33_0402_5%
U53C
8
O
74VHC08MTC_TSSOP14
14
U53D
P
11
O
G
74VHC08MTC_TSSOP14
7
3
PCI_REQ0# PCI_GNT0# PCI_REQ1# PCI_GNT1# PCI_REQ2# PCI_GNT2# PCI_REQ3# PCI_GNT3# PCI_REQ4# PCI_GNT4# PCI_REQ5#
PCI_REQ6#
PCI_C_BE0# PCI_C_BE1# PCI_C_BE2# PCI_C_BE3#
PCI_IRDY# PCI_PAR PCI_PCIRST# PCI_DEVSEL# PCI_PERR# PCI_PLOCK# PCI_SERR# PCI_STOP# PCI_TRDY#
PLTRST# CLK_33M_ICH
PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH#
C881
0.1U_0402_16V4Z 12
PCI_REQ0# 23
PCI_GNT0# 23
PCI_REQ1# 24
PCI_GNT1# 24
PCI_REQ2# 26
PCI_GNT2# 26
PCI_REQ3# 26
PCI_GNT3# 26
PCI_REQ4# 35
PCI_GNT4# 35
PCI_C_BE0# 23,24,26,35 PCI_C_BE1# 23,24,26,35 PCI_C_BE2# 23,24,26,35 PCI_C_BE3# 23,24,26,35
PCI_ I RDY# 23,24,26,35 PCI_PAR 23,24,26,35
PCI_DEVSEL# 23,24,26,35 PCI_PERR# 23,24,26
PCI_SERR# 23,24,26 PCI_STOP# 23,24,26,35 PCI_TRDY# 23,24,26,35
PLTRST# 20 CLK_33M_ICH 17,31
PCI_PIRQE# 24 PCI_PIRQF# 23 PCI_PIRQG# 24,26 PCI_PIRQH# 26
PLTRST_MCH# 8
PLTRST_SIO# 25
PCIRST# 20,23,24,26,30,31,35,47
R535
1 2
0_0402_5%
Q18
2N7002_SOT23
D
S
13
G
2
R530
12
10K_0402_5%
@
@
ICH_PME#
+3V
2
ICH_PME# 23,24,26,30
CLK_33M_ICH
R817 10_0402_5% @
1 2
CLK_ICH_TERM
1
C887
8.2P_0402_50V8J~D@
2
1
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2005/03/11 2006/03/11
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
星@, 06, 2006
薑三月
1
18 59
D
of
Page 19
5
R522
1 2
20M_0603_5%
ICH_RTCX2
1
D D
+RTCVCC
C C
B B
12
R793 1M_0402_5%
INTRUDER#
IAC_SDATO_MDC32
IAC_SYNC_MDC32
IAC_RST#_MDC32
+3VS
2
12
ICH_RTCX1
4
1
IN
OUT
C503
12P_0402_50V8J
NC3NC
2
Y4
32.768KHZ_1TJS125BJ2A251
IAC_BITCLK27,32
R858 33_0402_5%
1 2
R560 33_0402_5%
1 2
R559 33_0402_5%
1 2
R581 10K_0402_5%
SATALED#
12
20M_0603_5%
C500
@
1
R515
12P_0402_50V8J
2
+RTCVCC
CMOSJ1
2 1
ACES_86841-0200
IAC_SYNC27
IAC_RST#27
R849 10_0402_5% @
1 2
IAC_SDATO27
ICH_AC_BITCLK_TERM
2
C921
10P_0402_50V8J@
1
ICH_AC_SDOUT_R
ICH_AC_SYNC_R
ICH_AC_RST_R#
+3VS +3VS
12
R500
4.7K_0402_5%
IDE_HDIORDY
12
R790 10K_0402_5%
1 2
180K_0402_5%
0.1U_0402_16V4Z
IDE_HIRQ
R794
SATA_IRX_DTX_N022 SATA_IRX_DTX_P022
SATA_IRX_DTX_N122 SATA_IRX_DTX_P122
CLK_PCIE_SATA#17
CLK_PCIE_SATA17
C504
IAC_SDATAI127 IAC_SDATAI232
IDE_HIORDY22 IDE_HIRQ22 IDE_HDACK#22
IDE_HDIOW#22
IDE_HDIOR#22
4
2
1
1 2 1 2
R850
1 2
33_0402_5%
ICH_RTCX1 ICH_RTCX2
ICH_RTCRST# INTRUDER#
R795
1 2
0_0402_5%
R796
@
0_0402_5%
ICH_AC_SYNC_R
R55133_0402_5%
ICH_AC_RST_R#
R55433_0402_5%
IAC_SDATAI1 IAC_SDATAI2
ICH_AC_SDOUT_R
SATALED#
SATA_ITX_DRX_N0 SATA_ITX_DRX_P0
SATA_ITX_DRX_N1 SATA_ITX_DRX_P1
1 2
SATA_ITX_DRX_P0 SATA_ITX_DRX_N0
SATA_ITX_DRX_P1 SATA_ITX_DRX_N1
3
U33A
Y1
Y2 AA2 AA3
AA5
D12 B12
R917
20K_0402_5%
D11
12
F13 F12 B11 E12
E11 C13
C12 C11 E13
C10
B9 A10 F11
F10 B10
C9
AC19
AE3
AD3 AG2
AF2
AD7 AC7
AF6
AG6 AC2
AC1
AG11 AF11
AF16 AB16 AB15 AC14 AE16
12
R499
24.9_0603_1%
IDE_HDIORDY IDE_HIRQ IDE_HDDACK# IDE_HDIOW# IDE_DDREQ IDE_HDIOR#
RTCX1 RTCX2
RTCRST# INTRUDER#
INTVRMEN
EE_CS EE_SHCLK EE_DOUT EE_DIN
LAN_CLK LAN_RSTSYNC LANRXD[0]
LANRXD[1] LANRXD[2]
LANTXD[0] LANTXD[1] LANTXD[2]
ACZ_BIT_CLK ACZ_SYNC
ACZ_RST# ACZ_SDIN[0]
ACZ_SDIN[1] ACZ_SDIN[2]
ACZ_SDO
SATALED#
SATA[0]RXN SATA[0]RXP SATA[0]TXN SATA[0]TXP
SATA[2]RXN SATA[2]RXP SATA[2]TXN SATA[2]TXP
SATA_CLKN SATA_CLKP
SATARBIAS# SATARBIAS
IORDY IDEIRQ DDACK# DIOW# DIOR#
ICH6_BGA609
RTC
LAD[0]/FWH[0] LAD[1]/FWH[1] LAD[2]/FWH[2] LAD[3]/FWH[3]
LPC
LDRQ[0]#
LDRQ[1]#/GPI[41]
LFRAME#/FWH[4]
A20GATE
A20M#
LAN
CPUSLP#
CPU
DPRSLP#/TP[4]
DPSLP#/TP[2]
FERR#
CPUPWRGD/GPO[49]
IGNNE#
INIT3_3V#
RCIN#
STPCLK#
THRMTRIP#
DCS1# DCS3#
SATAAC-97/AZALIA
PIDE
DD[10] DD[11] DD[12] DD[13] DD[14] DD[15]
DDREQ
INIT#
INTR
SMI#
DA[0] DA[1] DA[2]
DD[0] DD[1] DD[2] DD[3] DD[4] DD[5] DD[6] DD[7] DD[8] DD[9]
NMI
P2 N3 N5 N4
N6 P4
P3
AF22 AF23
AE27 AE24
AD27 AF24 AG25 AG26
AE22 AF27 AG24
AD23 AF25
AG27 AE26 AE23
AC16 AB17 AC17
AD16 AE17
AD14 AF15 AF14 AD12 AE14 AC11 AD11 AB11 AE13 AF13 AB12 AB13 AC13 AE15 AG15 AD13
AB14
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
LPC_DRQ1# LPC_FRAME#
GATEA20 A20M#
CPUSLP#
DPSLP# FERR# H_PWRGOOD IGNNE# ICH4_INIT#
INTR
KBRST# NMI
SMI# STPCLK# THRMTRIP_ICH#
IDE_DA0 IDE_DA1 IDE_DA2
IDE_DCS1# IDE_DCS3#
IDE_HDD0 IDE_HDD1 IDE_HDD2 IDE_HDD3 IDE_HDD4 IDE_HDD5 IDE_HDD6 IDE_HDD7 IDE_HDD8 IDE_HDD9 IDE_HDD10 IDE_HDD11 IDE_HDD12 IDE_HDD13 IDE_HDD14 IDE_HDD15
Close ICH6M
C461 0.01U_0402_16V7K
1 2
C460 0.01U_0402_16V7K
1 2
C419 0.01U_0402_16V7K
1 2
C422 0.01U_0402_16V7K
1 2
SATA_ITX_C_DRX_P0 22 SATA_ITX_C_DRX_N0 22
SATA_ITX_C_DRX_P1 22 SATA_ITX_C_DRX_N1 22
LPC_AD[0..3] 30,31
LPC_DRQ1# 31 LPC_FRAME# 30,31
R506 0_0402_5% R486 0_0402_5% R489 0_0402_5%
R501 0_0402_5% R490 56_0402_5%
R488 0_0402_5% R487 0_0402_5%
R505 0_0402_5%
R504 0_0402_5% R503 0_0402_5%
R502 0_0402_5%
IDE_HDA0 22 IDE_HDA1 22 IDE_HDA2 22
IDE_HDCS1# 22 IDE_HDCS3# 22
IDE_HDD[0..15] 22
R791 0_0402_5%
1 2
1 2
C868
12 12 12
12 12
12 12
12
12 12
12
33P_0402_50V8J
R492 56_0402_5%
IDE_HDREQ
2
1
2
H_A20M# H_CPUSLP# H_DPRSLP#DPRSLP#
H_DPSLP#
H_IGNNE# H_INIT#
H_INTR
H_NMI H_SMI#
H_STPCLK# H_THERMTRIP#
IDE_HDREQ 22
GATEA20 30
H_A20M# 5 H_CPUSLP# 5,8 H_DPRSLP# 5
H_DPSLP# 5 H_FERR# 5 H_PWRGOOD 5 H_IGNNE# 5 H_INIT# 5
H_INTR 5
KBRST# 30
H_NMI 5 H_SMI# 5
H_STPCLK# 5
+CPU_CORE
+VCCP
H_THERMTRIP#5,8
+VCCP
R477 47K_0402_5%
1 2
R478 47K_0402_5%@
1 2
1 2
C453
@
0.68U_0603_10V6K 1 2
R491 75_0402_5%
H_FERR#
H_DPRSLP#
1
C
2
B
E
3
56_0402_5%
56_0402_5%
Q17 2SC2411K_SC59
H_THERMTRIP#
1
R481
12
R480
12
MAINPWRON 48,50,51
+VCCP
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2005/03/11 2006/03/11
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
星@, 06, 2006
薑三月
1
19 59
D
of
Page 20
5
4
+3VSUS
3
2
1
12
OVCUR#0
IDE_HRESET#
SLP_S4# SLP_S5#
OVCUR#1 OVCUR#2 OVCUR#3 OVCUR#4PCIE_PERn0 OVCUR#5 OVCUR#6 OVCUR#7
星@, 06, 2006
薑三月
R529
10K_0402_5%
D D
+3VSUS
2.2K_0402_5%
R797
ICH_SMBDATA17,24
ICH_SMBCLK17,24
C C
B B
+3VSUS
1 2
ICH_SMBDATA ICH_SMBCLK ICH_SMLINK0 ICH_SMLINK1
R582
R493
CLKRUN#
+3VSUS
ACIN30,48
+3V
VGATE
2.2K_0402_5% 10K_0402_5%
R510
1 2
1 2
10K_0402_5%
R800
R799
1 2
+3VS
12
10K_0402_5%
+3VS
12
10K_0402_5%
R815
10K_0402_5%
1 2
@
04---->05 Swap net U33.w2,m2 Add R997
R997 10K_0402_5%
1 2
R803 0_0402_5%@
1 2
D
1 3
@
S
Q48
2N7002_SOT23
G
2
LID_SWOUT#
R996
1 2
1K_0402_5%
+3V
PAD T108
HDD2_DET#22
ICH_PCIE_W AKE#24
(PCI Express Wake Event)
@
R816
1 2
CK_14M_ICH_TERM
C886
CLK_14M_ICH
CLK_48M_ICH
10_0402_5%
2
1
4.7P_0402_50V8C
@
1 2
CK_48M_ICH_TERM
2
1
R550
@
C534
@
10_0402_5%
4.7P_0402_50V8C
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
R792 10K_0402_5%
1 2
R527 10K_0402_5%
1 2
R801
@
10K_0402_5%
1 2
R528 10K_0402_5%
1 2
R802 680_0402_5%
1 2
4
CLK_14M_ICH17
CLK_48M_ICH17
+3VS
R781
1 2
1K_0402_5%
@
PM_DPRSLPVR
@
5
12
R783
100K_0402_5%
A A
May need pulldown for DPRSLPVR in case the ICH6m does not set this value in time for boot.
R508 R509 R583 R586
SPKR27
PM_BMBUSY#8
LID_SWOUT#30
H_STP_PCI#17
H_STP_CPU#17,56
R787 10K_0402_5%@ @
IDE_DRESET#22
PM_SLP_S3#25,30
ICH_PWRGD30
PM_DPRSLPVR56
ICH_BATLOW#30
PWRBTN_OUT#30
R788 10K_0402_5%
+3VS
EC_SMI#30
EC_SCI#30
1 2 1 2
R786 0_0402_5%@
EC_FLASH#31
CLKRUN#24,26
SIRQ24,30,31
VGATE8,17,30,56
PAD @
PLTRST#18
RSMRST#30
LINKALERT#
SYS_RESET#
ACINA
ICH_BATLOW#
ICH_PCIE_W AKE#
1 2
PAD T105
@
T113PAD
SIRQ
T106PAD
@
T107
100_0402_5% 100_0402_5% 100_0402_5% 100_0402_5%
ICH_SMBCLK ICH_SMBDATA LINKALERT# ICH_SMLINK0 ICH_SMLINK1 MCH_SYNC# SPKR
T104
SYS_RESET# PM_BMBUSY#
EC_SMI#
LID_SWOUT#
EC_SCI#
H_STP_PCI#
H_STP_CPU#
IDE_HRESET#
CLKRUN#
ICH_PCIE_W AKE#
@
1 2 SIO_THRM# VGATE CLK_14M_ICH
CLK_48M_ICH
ICH_SUSCLK
PM_SLP_S3# SLP_S4# SLP_S5#
ICH_PWRGD PM_DPRSLPVR ICH_BATLOW# PWRBTN_OUT# PLTRST# RSMRST#
ICH_RI#
PAD
@
ACINA
R789
0_0402_5%
12
10K_0402_5%
R519
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
12
R798
T2
AF17 AE18 AF18 AG18
Y4
W5
Y5
W4
U6
AG21
F8
W3
U2 AD19 AE19
R1
W6
M2
R6 AC21 AB21 AD22
AD20 AD21
V3 P5
R3
T3 AF19 AF20 AC18
U5 AB20 AC20 AF21
E10 A27
V6 T4
T5 T6
AA1
AE20
V2
U1
V5 Y3
10K_0402_5%
U33C
RI# SATA[0]GP/GPI[26]
SATA[1]GP/GPI[29] SATA[2]GP/GPI[30] SATA[3]GP/GPI[31]
SMBCLK SMBDATA LINKALERT# SMLINK[0] SMLINK[1] MCH_SYNC# SPKR
SUS_STAT#/LPCPD# SYS_RESET# BM_BUSY#/GPI[6] GPI[7]
GPI[8] SMBALERT#/GPI[11] GPI[12]
GPI[13] STP_PCI#/GPO[18] GPO[19] STP_CPU#/GPO[20]
GPO[21] GPO[23]
GPIO[24] GPIO[25]
GPIO[27] GPIO[28] CLKRUN#/GPIO[32] GPIO[33] GPIO[34]
WAKE# SERIRQ THRM# VRMPWRGD CLK14 CLK48 SUSCLK SLP_S3#
SLP_S4# SLP_S5#
PWROK DPRSLPVR/TP[1] BATLOW#/TP[0] PWRBTN# LAN_RST# RSMRST#
ICH6_BGA609
+3VS
+3VS
+3VS
GPIO
CLOCK
POWER MGT
R782
8.2K_0402_5%
1 2
R507 10K_0402_5%
1 2
R784 10K_0402_5%
1 2
DMI_IRCOMP
OC[4]#/GPI[9] OC[5]#/GPI[10] OC[6]#/GPI[14] OC[7]#/GPI[15]
USB
2005/03/11 2006/03/11
H25
PERn[1]
H24
PERp[1]
G27
PETn[1]
G26
PETp[1]
K25
PERn[2]
K24
PERp[2]
J27
PETn[2]
J26
PETp[2]
M25
PERn[3]
M24
PERp[3]
L27
PETn[3]
L26
PETp[3]
P24
PERn[4]
P23
PERp[4]
N27
PETn[4]
N26
PCI-EXPRESSDIRECT MEDIA INTERFACE
PETp[4]
T25
DMI[0]RXN
T24
DMI[0]RXP
R27
DMI[0]TXN
R26
DMI[0]TXP
V25
DMI[1]RXN
V24
DMI[1]RXP
U27
DMI[1]TXN
U26
DMI[1]TXP
Y25
DMI[2]RXN
Y24
DMI[2]RXP
W27
DMI[2]TXN
W26
DMI[2]TXP
AB24
DMI[3]RXN
AB23
DMI[3]RXP
AA27
DMI[3]TXN
AA26
DMI[3]TXP
AD25
DMI_CLKN
AC25
DMI_CLKP
F24
DMI_ZCOMP
F23 C23
D23 C25 C24
C27
OC[0]#
B27
OC[1]#
B26
OC[2]#
C26
OC[3]#
C21
USBP[0]N
D21
USBP[0]P
A20
USBP[1]N
B20
USBP[1]P
D19
USBP[2]N
C19
USBP[2]P
A18
USBP[3]N
B18
USBP[3]P
E17
USBP[4]N
D17
USBP[4]P
B16
USBP[5]N
A16
USBP[5]P
C15
USBP[6]N
D15
USBP[6]P
A14
USBP[7]N
B14
USBP[7]P
A22
USBRBIAS#
B22
USBRBIAS
SIO_THRM#
MCH_SYNC#
SIRQ
Compal Secret Data
Deciphered Date
PCIE_PERp0 PCIE_PEHTn0 PCIE_PEHTp0
DMI_RXN0 DMI_RXP0 DMI_TXN0 DMI_TXP0
DMI_RXN1 DMI_RXP1 DMI_TXN1 DMI_TXP1
DMI_RXN2 DMI_RXP2 DMI_TXN2 DMI_TXP2
DMI_RXN3 DMI_RXP3 DMI_TXN3 DMI_TXP3
CLK_PCIE_ICH# CLK_PCIE_ICH
DMI_IRCOMP
OVCUR#4 OVCUR#5 OVCUR#6 OVCUR#7
OVCUR#0 OVCUR#1 OVCUR#2 OVCUR#3
USBP0­USBP0+ USBP1­USBP1+ USBP2­USBP2+ USBP3­USBP3+ USBP4­USBP4+ USBP5­USBP5+
USBP7­USBP7+
USBRBIAS
D27
2 1
RB751V_SOD323
R785 39K_0402_5%
1 2
@
C931
C930
1 2
1 2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
R825 24.9_0603_1%
1 2
1 2
22.6_0603_1%
EC_THRM# 30
2
DMI_RXN0 8
DMI_RXP0 8 DMI_TXN0 8 DMI_TXP0 8
DMI_RXN1 8
DMI_RXP1 8 DMI_TXN1 8 DMI_TXP1 8
DMI_RXN2 8
DMI_RXP2 8 DMI_TXN2 8 DMI_TXP2 8
DMI_RXN3 8
DMI_RXP3 8 DMI_TXN3 8 DMI_TXP3 8
CLK_PCIE_ICH# 17
CLK_PCIE_ICH 17
closed to 500 mils
OVCUR#0 33 OVCUR#1 33 OVCUR#2 33 OVCUR#3 33
USBP0- 33 USBP0+ 33 USBP1- 33 USBP1+ 33 USBP2- 33 USBP2+ 33 USBP3- 33 USBP3+ 33 USBP4- 24 USBP4+ 24 USBP5- 41 USBP5+ 41
USBP7- 29 USBP7+ 29
R556
PCIRST#18,23,24,26,30,31,35,47
PCIE_PERn0 24 PCIE_PERp0 24
PCIE_PETn0 24 PCIE_PETp0 24
+1.5VS
Title
Size Document Number Rev
Date: Sheet
R541 10K_0402_5%
1 2
R545 10K_0402_5%
1 2
R547 10K_0402_5%
1 2
R543 10K_0402_5%
1 2
R848 10K_0402_5%
1 2
R847 10K_0402_5%
1 2
R845 10K_0402_5%
1 2
R846 10K_0402_5%
1 2
+5VS
14
U62B
4
P
I0
6
O
5
I1
G
74HCT08PW_TSSOP14
7
+3VSUS
5
U63
1
P
A
4
O
2
B
G
3
NC7ST08P5X_SC70-5
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
1
+3VSUS
SATA_RST# 22
PM_SLP_S5# 29,30
of
20 59
D
Page 21
5
Near PIN F27(C968), P27(C949), AB27(C950)
1
+
2
C497
220U_D2_4VM
0.1U_0402_16V4Z
1
1
C883
C890
2
2
+1.5VS
0.1U_0402_16V4Z
+3VS
+5VS
D10
RB751V_SOD323
1 2
R861
1 2
21
2
C536 1U_0603_10V4Z
1
+3VSUS+5VALW
D29
21
RB751V_SOD323
2
C919 1U_0603_10V4Z
1
R564
10_0402_5%
D D
10_0402_5%
C C
+1.5VS
ICH_V5REF_RUN
2
C528
0.1U_0402_16V4Z
1
2
1
1 2
ICH_V5REF_SUS
C917
0.1U_0402_16V4Z
L37 0_0603_5%
+1.5VRUN_L
2
C875
0.1U_0402_16V4Z
1
1
C519
2
0.1U_0402_16V4Z
Near PIN AG5
Replacing by this circuit?
Near PIN AG9
+3VS
Near PIN E26, E27
ICH6_VCCPLL
1
2
+1.5VS
C900
0.1U_0402_16V4Z
2
1
+3VSUS
Near PIN A17
Note: Intel will update design guide.
R565 10_0402_5% @
R862 10_0402_5% @
@
Vin2Vout
5
ICH_V5REF_RUN
ICH_V5REF_SUS
U34
@
APL5301-15DC_3P
3
GND
1
L36
CHB1608U301_0603
1 2
+1.5VR
1
2
2
C498
1
0.1U_0402_16V4Z
C530
0.1U_0402_16V4Z
C499
0.01U_0402_16V7K
Near PIN AC27
1 2
+5V
B B
+3V
R570 0_0805_5%
1
C535
0.1U_0402_16V4Z
2
R514
1 2
1_0402_5%
1 2
+5VALW
+3VALW
+3VSUS
<BOM Structure> R569 0_0805_5%
+1.5VS
A A
2
2
C507
C518
1
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C877
C506
2
2
C869
10U_1206_10V4Z
C870
10U_1206_10V4Z
+1.5VS
2
C496
1
0.1U_0402_16V4Z
Near PIN AE1
2
C531
1
4
4
C465
C464
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
2
1
2
C502
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C501
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
ICH6_VCCPLL
+3VS
+3VS
+3VSUS
2
C522
1
0.1U_0402_16V4Z
U33E
AA22
VCC1_5[1]
AA23
VCC1_5[2]
AA24
VCC1_5[3]
AA25
VCC1_5[4]
AB25
VCC1_5[5]
AB26
VCC1_5[6]
AB27
VCC1_5[7]
F25
VCC1_5[8]
F26
VCC1_5[9]
F27
VCC1_5[10]
G22
VCC1_5[11]
G23
VCC1_5[12]
G24
VCC1_5[13]
G25
VCC1_5[14]
H21
VCC1_5[15]
H22
VCC1_5[16]
J21
VCC1_5[17]
J22
VCC1_5[18]
K21
VCC1_5[19]
K22
VCC1_5[20]
L21
VCC1_5[21]
L22
VCC1_5[22]
M21
VCC1_5[23]
M22
VCC1_5[24]
N21
VCC1_5[25]
N22
VCC1_5[26]
N23
VCC1_5[27]
N24
VCC1_5[28]
N25
VCC1_5[29]
P21
VCC1_5[30]
P25
VCC1_5[31]
P26
VCC1_5[32]
P27
VCC1_5[33]
R21
VCC1_5[34]
R22
VCC1_5[35]
T21
VCC1_5[36]
T22
VCC1_5[37]
U21
VCC1_5[38]
U22
VCC1_5[39]
V21
VCC1_5[40]
V22
VCC1_5[41]
W21
VCC1_5[42]
W22
VCC1_5[43]
Y21
VCC1_5[44]
Y22
VCC1_5[45]
AA6
VCC1_5[46]
AB4
VCC1_5[47]
AB5
VCC1_5[48]
AB6
VCC1_5[49]
AC4
VCC1_5[50]
AD4
VCC1_5[51]
AE4
VCC1_5[52]
AE5
VCC1_5[53]
AF5
VCC1_5[54]
AG5
VCC1_5[55]
AA7
VCC1_5[56]
AA8
VCC1_5[57]
AA9
VCC1_5[58]
AB8
VCC1_5[59]
AC8
VCC1_5[60]
AD8
VCC1_5[61]
AE8
VCC1_5[62]
AE9
VCC1_5[63]
AF9
VCC1_5[64]
AG9
VCC1_5[65]
AC27
VCCDMIPLL
E26
VCC3_3[1]
AE1
VCCSATAPLL
AG10
VCC3_3[22]
A13
VCCLAN3_3/VCCSUS3_3[1]
F14
VCCLAN3_3/VCCSUS3_3[2]
G13
VCCLAN3_3/VCCSUS3_3[3]
G14
VCCLAN3_3/VCCSUS3_3[4]
A11
VCCSUS3_3[1]
U4
VCCSUS3_3[2]
V1
VCCSUS3_3[3]
V7
VCCSUS3_3[4]
W2
VCCSUS3_3[5]
Y7
VCCSUS3_3[6]
A17
VCCSUS3_3[7]
B17
VCCSUS3_3[8]
C17
VCCSUS3_3[9]
F18
VCCSUS3_3[10]
G17
VCCSUS3_3[11]
G18
VCCSUS3_3[12]
ICH6_BGA609
COREIDE
PCIE
PCIUSB
VCCSUS1_5[3] VCCSUS1_5[2]
VCCSUS1_5[1]
SATA
USB CORE
PCI/IDE RBP
VCCSUS3_3[20]
VCCLAN1_5/VCCSUS1_5[2] VCCLAN1_5/VCCSUS1_5[1]
V_CPU_IO[3] V_CPU_IO[2] V_CPU_IO[1]
VCCSUS3_3[19] VCCSUS3_3[18] VCCSUS3_3[17] VCCSUS3_3[16] VCCSUS3_3[15] VCCSUS3_3[14] VCCSUS3_3[13]
VCC1_5[98] VCC1_5[97] VCC1_5[96] VCC1_5[95] VCC1_5[94] VCC1_5[93] VCC1_5[92] VCC1_5[91] VCC1_5[90] VCC1_5[89] VCC1_5[88] VCC1_5[87] VCC1_5[86] VCC1_5[85] VCC1_5[84] VCC1_5[83] VCC1_5[82] VCC1_5[81] VCC1_5[80] VCC1_5[79]
VCC3_3[21] VCC3_3[20] VCC3_3[19] VCC3_3[18] VCC3_3[17] VCC3_3[16] VCC3_3[15] VCC3_3[14] VCC3_3[13] VCC3_3[12]
VCC3_3[11] VCC3_3[10]
VCC3_3[9] VCC3_3[8] VCC3_3[7] VCC3_3[6] VCC3_3[5] VCC3_3[4] VCC3_3[3] VCC3_3[2]
VCC1_5[78] VCC1_5[77] VCC1_5[76] VCC1_5[75] VCC1_5[74] VCC1_5[73] VCC1_5[72] VCC1_5[71] VCC1_5[70] VCC1_5[69] VCC1_5[68]
VCC1_5[67]
VCC2_5[4] VCC2_5[2]
V5REF[2] V5REF[1]
V5REF_SUS
VCCUSBPLL
VCCRTC
3
F9 U17 U16 U14 U12 U11 T17 T11 P17 P11 M17 M11 L17 L16 L14 L12 L11 AA21 AA20 AA19
AA10 AG19 AG16 AG13 AD17 AC15 AA17 AA15 AA14 AA12
P1 M7 L7 L4 J7 H7 H1 E4 B1 A6
U7 R7
G19 G20
F20 E24 E23 E22 E21 E20 D27 D26 D25 D24
G8 AB18
P7 AA18
A8 F21 A25
A24 AB3 G11
G10 AG23
AD26 AB22
G16 G15 F16 F15 E16 D16 C16
+1.5VS
+1.5VR
C896
0.1U_0402_16V4Z
ICH_V5REF_RUN
ICH_V5REF_SUS
C471
C521
1
2
+1.5VS
1
2
2
1
2
1
+1.5VS
C469
0.1U_0402_16V4Z
+RTCVCC
+1.5VS
+VCCP
2
C463
1
0.1U_0402_16V4Z
2
C512
1
0.1U_0402_16V4Z
Near PIN U7
+3VSUS
Near PIN AG23
+3VS
Near PIN AG13, AG16
0.1U_0402_16V4Z
+3VS
2
C529
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Near PIN A2-A6, D1-H1
+1.5VR
2
1
1
2
C882
0.1U_0402_16V4Z
+2.5VS
1
2
Near PIN AB18
+3VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C879
0.1U_0402_16V4Z
C873
C470
1 2
C466
1 2
0.1U_0402_16V4Z
+1.5VS
C468
0.1U_0402_16V4Z 1 2
C895
0.1U_0402_16V4Z 1 2
C908
0.1U_0402_16V4Z 1 2
C889
0.1U_0402_16V4Z 1 2
C880
0.1U_0402_16V4Z 1 2
C884
0.1U_0402_16V4Z 1 2
C885
0.1U_0402_16V4Z 1 2
C893
0.1U_0402_16V4Z 1 2
C878
0.1U_0402_16V4Z 1 2
C467
0.1U_0402_16V4Z 1 2
C525
0.01U_0402_16V7K 1 2
Near PIN A25
C874
0.01U_0402_16V7K 1 2
Near PIN AA19
+3VSUS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Near PIN A24
2
C527
1 2
C505
1 2
C876
1 2
C891
1 2
C892
1 2
C526
1 2
Near PIN AG10
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2005/03/11 2006/03/11
Compal Secret Data
Deciphered Date
2
1
U33D
E27
VSS[172]
Y6
VSS[171]
Y27
VSS[170]
Y26
VSS[169]
Y23
VSS[168]
W7
VSS[167]
W25
VSS[166]
W24
VSS[165]
W23
VSS[164]
W1
VSS[163]
V4
VSS[162]
V27
VSS[161]
V26
VSS[160]
V23
VSS[159]
U25
VSS[158]
U24
VSS[157]
U23
VSS[156]
U15
VSS[155]
U13
VSS[154]
T7
VSS[153]
T27
VSS[152]
T26
VSS[151]
T23
VSS[150]
T16
VSS[149]
T15
VSS[148]
T14
VSS[147]
T13
VSS[146]
T12
VSS[145]
T1
VSS[144]
R4
VSS[143]
R25
VSS[142]
R24
VSS[141]
R23
VSS[140]
R17
VSS[139]
R16
VSS[138]
R15
VSS[137]
R14
VSS[136]
R13
VSS[135]
R12
VSS[134]
R11
VSS[133]
P22
VSS[132]
P16
VSS[131]
P15
VSS[130]
P14
VSS[129]
P13
VSS[128]
P12
VSS[127]
N7
VSS[126]
N17
VSS[125]
N16
VSS[124]
N15
VSS[123]
N14
VSS[122]
N13
VSS[121]
N12
VSS[120]
N11
VSS[119]
N1
VSS[118]
M4
VSS[117]
M27
VSS[116]
M26
VSS[115]
M23
VSS[114]
M16
VSS[113]
M15
VSS[112]
M14
VSS[111]
M13
VSS[110]
M12
VSS[109]
L25
VSS[108]
L24
VSS[107]
L23
VSS[106]
L15
VSS[105]
L13
VSS[104]
K7
VSS[103]
K27
VSS[102]
K26
VSS[101]
K23
VSS[100]
K1
VSS[99]
J4
VSS[98]
J25
VSS[97]
J24
VSS[96]
J23
VSS[95]
H27
VSS[94]
H26
VSS[93]
H23
VSS[92]
G9
VSS[91]
G7
VSS[90]
G21
VSS[89]
G12
VSS[88]
G1
VSS[87]
ICH6_BGA609
Title
Size Document Number Rev
Date: Sheet
GROUND
+RTCVCC
1
2
C872
0.1U_0402_16V4Z
星@, 06, 2006
薑三月
F4
VSS[86]
F22
VSS[85]
F19
VSS[84]
F17
VSS[83]
E25
VSS[82]
E19
VSS[81]
E18
VSS[80]
E15
VSS[79]
E14
VSS[78]
D7
VSS[77]
D22
VSS[76]
D20
VSS[75]
D18
VSS[74]
D14
VSS[73]
D13
VSS[72]
D10
VSS[71]
D1
VSS[70]
C4
VSS[69]
C22
VSS[68]
C20
VSS[67]
C18
VSS[66]
C14
VSS[65]
B25
VSS[64]
B24
VSS[63]
B23
VSS[62]
B21
VSS[61]
B19
VSS[60]
B15
VSS[59]
B13
VSS[58]
AG7
VSS[57]
AG3
VSS[56]
AG22
VSS[55]
AG20
VSS[54]
AG17
VSS[53]
AG14
VSS[52]
AG12
VSS[51]
AG1
VSS[50]
AF7
VSS[49]
AF3
VSS[48]
AF26
VSS[47]
AF12
VSS[46]
AF10
VSS[45]
AF1
VSS[44]
AE7
VSS[43]
AE6
VSS[42]
AE25
VSS[41]
AE21
VSS[40]
AE2
VSS[39]
AE12
VSS[38]
AE11
VSS[37]
AE10
VSS[36]
AD6
VSS[35]
AD24
VSS[34]
AD2
VSS[33]
AD18
VSS[32]
AD15
VSS[31]
AD10
VSS[30]
AD1
VSS[29]
AC6
VSS[28]
AC3
VSS[27]
AC26
VSS[26]
AC24
VSS[25]
AC23
VSS[24]
AC22
VSS[23]
AC12
VSS[22]
AC10
VSS[21]
AB9
VSS[20]
AB7
VSS[19]
AB2
VSS[18]
AB19
VSS[17]
AB10
VSS[16]
AB1
VSS[15]
AA4
VSS[14]
AA16
VSS[13]
AA13
VSS[12]
AA11
VSS[11]
A9
VSS[10]
A7
VSS[9]
A4
VSS[8]
A26
VSS[7]
A23
VSS[6]
A21
VSS[5]
A19
VSS[4]
A15
VSS[3]
A12
VSS[2]
A1
VSS[1]
1
2
C871
0.1U_0402_16V4Z
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
1
of
21 59
D
Page 22
A
IDE_PHDD0 IDE_PHDD1 IDE_PHDD2 IDE_PHDD3 IDE_PHDD4 IDE_PHDD5 IDE_PHDD6 IDE_PHDD7
12
R523
10K_0402_5%
IDE_PHDD8 IDE_PHDD9 IDE_PHDD10 IDE_PHDD11 IDE_PHDD12 IDE_PHDD13 IDE_PHDD14 IDE_PHDD15
IDE_PHDA0 IDE_PHDA1 IDE_PHDA2 IDE_PHCS0# IDE_PHCS1#
IDE_PHIOCS16# IDE_PHINTRQ IDE_PHDMACK# IDE_PHIORDY IDE_PHDIOR# IDE_PHDIOW# IDE_PHDREQ
R513 33_0402_5%
1 2
12
R521
T24 PAD T23 PAD
@ @
1 1
+3VS
10K_0402_5%
IDE_PHRESET#
2 2
U32
62
HDD0
64
HDD1
2
HDD2
5
HDD3
7
HDD4
11
HDD5
13
HDD6
15
HDD7
14
HDD8
12
HDD9
10
HDD10
6
HDD11
3
HDD12
1
HDD13
63
HDD14
61
HDD15
50
HDA0
51
HDA1
49
HDA2
48
HCS0#
47
HCS1#
52
HIOCS16#
53
HINTRQ
54
HDMACK#
55
HIORDY
58
HDIOR#
59
HDIOW#
60
HDMARQ
16
HRESET#
46
HPDIAG#
45
UAO
43
UAI
88SA8040_TQFP64
HDD Connector
IDE_PHRESET# IDE_PHDD7 IDE_PHDD6 IDE_PHDD5 IDE_PHDD4 IDE_PHDD3 IDE_PHDD2 IDE_PHDD1 IDE_PHDD0
IDE_PHDREQ IDE_PHDIOW# IDE_PHDIOR# IDE_PHIORDY IDE_PHDMACK#
IDE_PHINTRQ
IDE_PHDA1 IDE_PHDA0 IDE_PHDA2 IDE_PHCS0#
+5VS
1U_0603_10V4Z
1
2
R597 100K_0402_5%
Q30
1
C436
2
HDD1_LED#
0.1U_0402_16V4Z
C564
1
2
R599 12 150K_0603_5%
1U_0603_10V4Z
C434
Q28 AO3413_SOT23
S
G
2
1
2
0.1U_0402_16V4Z
1
2
1 2
+5VS
1 2
R594 470_0402_5%
2
R584 10K_0402_5%
Layout No t e : P l a ce close to HDD CONN.
C566
B+_BIAS
12
13
D
G
S
2N7002_SOT23
+5VS
A
+5VHDD
3 3
4 4
B
SATA
Parallel ATA
Power
UART
JHDD2
1
1
2
3
3
4
5
5
6
7
7
8
9
9
10
11
11
12
13
13
14
15
15
16
17
17
18
19
19
20
21
21
22
23
23
24
25
25
26
27
27
28
29
29
30
31
31
32
33
33
34
35
35
36
37
37
38
39
39
40
41
41
42
43
43
44
GND45GND
ALLTOP_C17866-14405
+5VHDD
D
13
10U_0805_10V4Z
1
C567
2
C572
0.01U_0402_16V7K
+5VMOD
G
2
13
D
S
AO3413_SOT23 Q16
10U_0805_10V4Z
B
SATA_IRX_B_DTX_P0
SATA_IRX_B_DTX_N0
32
TXP
31
TXM
27
RXP
28
RXM
17
RST#
R511 10K_0402_5%@
33
T0 T1 T2 T3 T4 T5 T6
T7 CNFG2 CNFG1 CNFG0
ATAIOSEL
XTLIN/OSC
XTLOUT
Config & Debug
ISET VDDIO_0 VDDIO_1
VDD_0 VDD_1 VDD_2
VAA1 VAA2
VSS1
VSS2 GND_0 GND_1 GND_2
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44
46
IDE_PHDD8 IDE_PHDD9 IDE_PHDD10 IDE_PHDD11 IDE_PHDD12 IDE_PHDD13 IDE_PHDD14 IDE_PHDD15
R872 470_0402_5% R879 10K_0402_5%
IDE_PHCS1#
1 2 1 2
1 2
R512 10K_0402_5%@
34
1 2
R516 10K_0402_5%@
35
1 2
R517 10K_0402_5%
36
1 2
37
R518 10K_0402_5%
38
1 2
R520 10K_0402_5%
39
1 2
40
PCNFG2
20
PCNFG1
19
PCNFG0
18
ATAPIOSEL
21
XTLIN
22 23
R482 12.1K_0603_1%
26
1 2 44 4 9 41 56 24 29
25 30 8 42 57
VSS_SATA
+5VHDD
0.01U_0402_16V7K 1
2
PPDIAG#
+5VHDD Source
1U_0603_10V4Z
C561
1
1
C565
2
2
1
C560
2
R314
1 2
100_0402_1%
+5VS
C395
1U_0603_10V4Z
1
2
1
2
1000P_0402_50V7K
0.1U_0402_16V4Z
+5VMOD Source
Layout Note: Place close to CD-ROM CONN.
1U_0603_10V4Z
1
1
C423
C418
2
2
1000P_0402_50V7K
0.1U_0402_16V4Z C417
1
1
C413
2
2
C
1 2 C457 0.01U_0402_16V7K C458
1 2
0.01U_0402_16V7K
+3VS +1.8VS
+3VS_SATA
1000P_0402_50V7K
0.1U_0402_16V4Z
C456
C396
C385
0.1U_0402_16V4Z
C
C459
1
2
R882 10K_0402_5%
1 2
0.1U_0402_16V4Z
1
2
C462
1
2
+1.8VS
0.1U_0402_16V4Z C953
1
2
0.1U_0402_16V4Z
Q11 AO3413_SOT23
S
G
2.2U_0805_10V6K 1
2
D
13
2
SATA_IRX_DTX_P0 19 SATA_IRX_DTX_N0 19
SATA_ITX_C_DRX_P0 19 SATA_ITX_C_DRX_N0 19 SATA_RST# 20
+3VS
VSS_SATA
+3VS
L35
1 2
FBM-L11-321611-260-LMT_1206
C454
HDD2_DET
+3VS
12
R479 0_0402_5%
4
1
C455
1 2
HDD1_LED# HDD2_LED#
+5VHDD1
10U_0805_10V4Z
2
R562
0_0805_5%
1
C390
2
1
25MHZ_30P_1XSA025000AVH
1U_0603_10V4Z
1
C391
2
D
+3VS
4.7K_0402_5%
1 2
4.7K_0402_5%
1 2
+3VS
12
10K_0402_5%
13
D
2N7002_SOT23
S
3
2
IDE_PHIORDY
IDE_SHIORDY
ATAPIOSEL
ATASIOSEL
IDE_PHINTRQ
IDE_PHDREQ
IDE_SHINTRQ
IDE_SHDREQ
ATASIOSEL
Q59
R888
10_0402_5%
R494
10_0402_5%
VSS_SATA
R341 10K_0402_5%
R525
R417
R495
1 2
10K_0402_5%@
R412
1 2
10K_0402_5%@
R524
1 2
R526
1 2
R420
1 2
R411
1 2
X6
Vdd
OUT
GND
CONT
VSS_SATA
HDD1_LED# 31 HDD2_LED# 31
10K_0402_5%
5.6K_0402_5%
10K_0402_5%
5.6K_0402_5%
R909
2
G
+5VHDD1
CD-ROM Connector
1000P_0402_50V7K
0.1U_0402_16V4Z
C392
1
1
ODD_ACT#30,31
D
C393
2
2
ODD_ACT#
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
E
IDE_SHDD0 IDE_SHDD1 IDE_SHDD2 IDE_SHDD3 IDE_SHDD4 IDE_SHDD5 IDE_SHDD6 IDE_SHDD7 IDE_SHDD8 IDE_SHDD9 IDE_SHDD10 IDE_SHDD11 IDE_SHDD12 IDE_SHDD13
+3VS
10K_0402_5%
IDE_SHRESET#
12
12
1 2
IDE_SHDD14 IDE_SHDD15
12
IDE_SHDA0
R424
IDE_SHDA1 IDE_SHDA2 IDE_SHCS0# IDE_SHCS1#
IDE_SHIOCS16# IDE_SHINTRQ IDE_SHDMACK# IDE_SHIORDY IDE_SHDIOR# IDE_SHDIOW# IDE_SHDREQ
R389 33_0402_5%
1 2
10K_0402_5%
12
R452
T19 PAD T18 PAD
IDE_SHRESET#
IDE_SHDD7
XTLIN2
IDE_SHDD6 IDE_SHDD5 IDE_SHDD4 IDE_SHDD3 IDE_SHDD2
XTLIN
IDE_SHDD1 IDE_SHDD0
IDE_SHDREQ IDE_SHDIOW#
IDE_SHDIOR#
IDE_SHIORDY IDE_SHDMACK#
IDE_SHINTRQ
IDE_SHDA1 IDE_SHDA0 IDE_SHDA2 IDE_SHCS0#
HDD2_LED#
Q14 2N7002_SOT23
D
S
1 3
G
2
+5VMOD
10K_0402_5%
IDE_HDIOW#19
R415
IDE_HIORDY19 IDE_HDACK# 19
IDE_HIRQ19 IDE_HDA119 IDE_HDA019
1 2
IDE_HDCS1#19
2005/03/11 2006/03/11
E
U26
62
HDD0
64
HDD1
2
HDD2
5
HDD3
7
HDD4
11
HDD5
13
HDD6
15
HDD7
14
HDD8
12
HDD9
10
HDD10
6
HDD11
3
HDD12
1
HDD13
63
HDD14
61
HDD15
50
HDA0
51
HDA1
49
HDA2
48
HCS0#
47
HCS1#
52
HIOCS16#
53
HINTRQ
54
HDMACK#
55
HIORDY
58
HDIOR#
59
HDIOW#
60
HDMARQ
16
HRESET#
46
HPDIAG#
45
43 @ @
HDD Connector
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
ALLTOP_C17866-14405
2
1
+5VMOD
R416
1 2
470_0402_5%
UART
UAO UAI
88SA8040_TQFP64
JHDD1 1 3 5 7 9
2
1
2
4
3
4
6
5
6
8
7
8
10
9
10
12
11
12
14
13
14
16
15
16
18
17
18
20
19
20
22
21
22
24
23
24
26
25
26
28
27
28
30
29
30
32
31
32
34
33
34
36
35
36
38
37
38
40
39
40
42
41
42
44
43
44
46
GND45GND
C415 47P_0402_50V8J
IDE_HDD7 IDE_HDD6 IDE_HDD5 IDE_HDD11 IDE_HDD4 IDE_HDD3 IDE_HDD2 IDE_HDD1 IDE_HDD0
IDE_HDIOW# IDE_HIORDY
IDE_HIRQ IDE_HDA1 IDE_HDA0 IDE_DCS1#
SEC_CSEL
Compal Secret Data
Deciphered Date
F
SATA
Parallel ATA
Power
OCTEK_CDR-50JE2
F
SATA_IRX_B_DTX_P1
SATA_IRX_B_DTX_N1
32
TXP
31
TXM
27
RXP
28
RXM
17
RST#
CNFG2 CNFG1 CNFG0
ATAIOSEL
XTLIN/OSC
XTLOUT
Config & Debug
ISET VDDIO_0 VDDIO_1
VDD_0 VDD_1 VDD_2
VAA1 VAA2
VSS1
VSS2 GND_0 GND_1 GND_2
IDE_SHDD8 IDE_SHDD9 IDE_SHDD10 IDE_SHDD11 IDE_SHDD12 IDE_SHDD13 IDE_SHDD14 IDE_SHDD15
HDD2_DET
R392 470_0402_5%
1 2
R382 10K_0402_5%
1 2
IDE_SHCS1#
JCDR1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
54
535354
R446 10K_0402_5%@
33
T0
R447 10K_0402_5%@
34
T1
R448 10K_0402_5%@
35
T2
R449 10K_0402_5%
36
T3
37
T4
R450 10K_0402_5%
38
T5
R451 10K_0402_5%
39
T6
40
T7
20 19 18 21
22 23
26 44 4 9 41 56 24 29
VSS_SATA2
25 30 8 42 57
10K_0402_5%
33_0402_5%
R905
1 2
SPDIAG#
+5VHDD1
IDE_HDD8 IDE_HDD9
IDE_HDD10 IDE_HDD12
IDE_HDD13 IDE_HDD14 IDE_HDD15
IDE_HDREQ
IDE_HDIOR# IDE_HDACK#
PDIAG# IDE_HDA2 IDE_HDCS3#
ON_DISC
G
C429 0.01U_0402_16V7K
1 2
C427 0.01U_0402_16V7K
1 2
+3VS
1 2 1 2 1 2 1 2
1 2 1 2
SCNFG2 SCNFG1 SCNFG0
ATASIOSEL
XTLIN2
R423 12.1K_0603_1%
1 2
R580
0_0603_5%
+3VS
R904
12
HDD2_DET#
R362 10K_0402_5%
1 2
R385 10K_0402_5%@
1 2
Date: Sheet
+3VS +1.8VS
+3VS_SATA
0.1U_0402_16V4Z
0.01U_0402_16V7K
ON_DISC 30
Title
Size Document Number Rev
C416
C426
1
1
2
2
VSS_SATA2VSS_SATA
IDE_HDREQ 19 IDE_HDIOR# 19
IDE_HDA2 19 IDE_HDCS3# 19
+5VMOD
SCHEMATIC, M/B LA-2831
星@, 06, 2006
薑三月
G
VSS_SATA2
L30
1000P_0402_50V7K
+5VMOD
1 2
2.2U_0805_10V6K FBM-L11-321611-260-LMT_1206
C425
C414
1
1
2
2
+3VS +3VS +3VS
10K_0402_5%@
R483
10K_0402_5%@
12
10K_0402_5%
R496
10K_0402_5%@
12
HDD2_DET# 20
+3VS +3VS +3VS
R407
10K_0402_5%@
10K_0402_5%@
12
10K_0402_5%
R408
10K_0402_5%@
12
IDE_HDD0 IDE_HDD1 IDE_HDD2 IDE_HDD3 IDE_HDD4 IDE_HDD5 IDE_HDD6 IDE_HDD7 IDE_HDD8
IDE_HDD9 IDE_HDD10 IDE_HDD11 IDE_HDD12 IDE_HDD13 IDE_HDD14 IDE_HDD15
Layout Note: W=80 mils
ON_DISC
Compal Electronics, Inc.
401362
SATA_IRX_DTX_P1 19 SATA_IRX_DTX_N1 19 SATA_ITX_C_DRX_P1 19 SATA_ITX_C_DRX_N1 19 SATA_RST# 20
+3VS
R484
10K_0402_5%@
12
12
R497
10K_0402_5%@
12
12
10K_0402_5%@
R401
12
12
10K_0402_5%@
R402
12
12
1 2
4.7K_0402_5%
H
R485
R498
R395
R396
R891
22 59
H
PCNFG2 PCNFG1 PCNFG0
SCNFG2 SCNFG1 SCNFG0
IDE_HDD[0..15] 19IDE_DRESET#20
+3VALW
+1.8VS
0.1U_0402_16V4Z C952
1
2
D
of
Page 23
5
+3V
L19
1 2
KC FBM_L11-201209-601LMT 0805
1
C142
1U_0603_10V6K
D D
C C
B B
A A
2
+LAN_IO
1
C81
0.1U_0402_10V6K
2
PCI_C_BE0#18,24,26,35 PCI_C_BE1#18,24,26,35 PCI_C_BE2#18,24,26,35 PCI_C_BE3#18,24,26,35
PCI_AD19
PCI_PAR18,24,26, 35 PCI_FRAME#18,24,26,35 PCI_IRDY#18,24,26,35 PCI_TRDY#18, 24, 26, 35 PCI_DEVSEL#18,24,26, 35 PCI_STOP#18 ,24,26,35
PCI_PERR#18,24,26 PCI_SERR#18,24,26
PCI_REQ0#18 PCI_GNT0#18
PCI_PIRQF#18 ICH_PME#18,24,26,30 PCIRST#18,20,24,26,30, 31,35, 47
CLK_33M_LAN17 PCI_CLKRUN#30,31
1
2
PCI_AD[0..31]18,24,26,35
5
+LAN_IO
1
C136 1U_0603_10V6K
2
closed to chip about 200 mils
1
C133
0.1U_0402_10V6K
0.1U_0402_10V6K
2
PCI_AD[0..31]
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
1 2
R110 0_0402_5%
PCIRST# CLK_33M_LAN
R103 0_0402_5%@
C79
104 103 102
98 97 96 95 93 90 89 87 86 85 83 82 79 59 58 57 55 53 50 49 47 43 42 40 39 37 36 34 33
92 77 60 44
46 76
61 63 67 68 69
70 75
30 29
25 31 27 28
65
12
17
128
21 38 51 66 81
91 101 119
35
52
80 100
1
C134
0.1U_0402_10V6K
2
U8
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE#0 C/BE#1 C/BE#2 C/BE#3
IDSEL PAR
FRAME# IRDY# TRDY# DEVSEL# STOP#
PERR# SERR#
REQ# GNT#
INTA# PME# RST# CLK
CLKRUN#
4
GND/VSS GND/VSS GND/VSS
GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST
GND GND GND GND
RTL8100CL_LQFP128
1
C65
0.1U_0402_10V6K
2
EEDO
AUX/EEDI
EESK
EECS
LED0 LED1 LED2
NC/LED3
TXD+/MDI0+
TXD-/MDI0-
RXIN+/MDI1+
RXIN-/MDI1-
NC/MDI2+
NC/MDI2-
NC/MDI3+
NC/MDI3-
LWAKE
ISOLATE#
RTSET
NC/SMBCLK
NC/SMBDATA
NC/M66EN
NC/AVDDH
NC/HV
PCI I/F
NC/HSDAC+
NC/HG
NC/LG2
NC/LV2
NC/VSS NC/VSS
NC/GND NC/GND NC/GND NC/GND NC/GND
LAN I/F
NC/GND
CTRL25
RTT3/CRTL18
VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33
AVDD33/AVDDL AVDD33/AVDDL AVDD33/AVDDL
NC/AVDDL
VDD25/VDD18 VDD25/VDD18 VDD25/VDD18 VDD25/VDD18
NC/VDD18 NC/VDD18 NC/VDD18 NC/VDD18 NC/VDD18
Power
AVDD25/HSDAC-
4
2
C70
0.1U_0402_10V6K
1
+LAN_IO
108 109 111 106
117 115 114 113
LAN_TX0+
1
LAN_TX0-
2
LAN_RX1+
5
LAN_RX1-
6 14
15 18 19
XTALFB
121
X1
CLKOUT
122
X2
105 23
R51 5.6K_0603_1%
127
1 2 72 74
closed to chip
R73 1K_0402_1%@
88
1 2 10
120
R67 0_0402_5%
11
R53 0_0402_5%
123
R52 0_0402_5%
124 126
9 13
22 48 62 73 112 118
CTL25
8 125 26
41 56 71 84 94 107
3 7 20 16
32 54 78 99
24 45 64 110 116
12
C74
0.1U_0402_10V6K
4
12
R55
3.6K_0402_5%
5.6k for 8100C
1 2 1 2 1 2
0.1U_0402_10V6K
C82
0.1U_0402_10V6K
C113
0.1U_0402_10V6K
1 2
L13 0_0603_5%
2
1
Reserve for SATA bridge
12
R895 1M_0402_5%~D @
1
C934 12P_0402_50V8J~D
2
@
R906
@
0_0603_5%
U6
4
DO
3
DI
2
SK
1
CS
AT93C46-10SI-2.7_SO8
+LAN_IO
2
1
+LAN_IO
2
1
C61
GND
NC NC
VCC
2
C60
0.1U_0402_10V6K
1
2
C94
0.1U_0402_10V6K
1
2
1
5 6 7 8
+2.5V_LAN
2
C87
0.1U_0402_10V6K
1
+2.5V_LAN
3
0.4-->0.5
IDE_XTLOUT_R
12
R896
Y7
+3VS
IDE_XTLOUTIDE_XTLIN
12
R83
1K_0402_1%@
R80
15K_0402_1% @
1 2
CTL25
1 2
@ 25MHZ_20P_1BG25000CK1A
+LAN_IO
2
C46
0.1U_0402_10V6K
1
@
0_0402_5%~D
1
C935
2
12P_0402_50V8J~D
@
SUSP# 30,31,34,50,52,55
+3V
3
Q43 2SB1188_SOT89
1
2
0.1U_0402_10V6K
CLKOUT XTALFB
25MHZ_20P_1BX25000CK1A
1
C48 27P_0402_50V8J
2
C630
2
1
Y1
1 2
2
C595
0.1U_0402_10V6K
1
1 2
L42 0_0805_5%
1
C647 10U_1206_6.3V6M
2
T1
LAN_TX0­LAN_TX0+
V_DAC LAN_RX1­LAN_RX1+
Layout Note 24ST0023P pls close to conn.
LAN_TX0+
LAN_TX0-
LAN_RX1+
LAN_RX1-
2
C49 27P_0402_50V8J
1
TD-8TX-
7
TD+
6
CT
3
CT
2
RD-
1
RD+
NS0013_16P
ACES_88231-0200
G G 2 1
JP7
R619 49.9_0402_1%
1 2
R618 49.9_0402_1%
1 2
R626 49.9_0402_1%
1 2
R625 49.9_0402_1%
1 2
+2.5V_LAN
2
C616
0.1U_0402_10V6K
1
1:1
4 3 2 1
@: DePop
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R &D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2005/03/11 2006/03/11
Compal Secret Data
Deciphered Date
TX+
CT
CT
RX-
RX+
2
RJ45_TX0-
3
RJ45_TX0+
2
WCM2012F2S-900T04_0805
RJ45_RX1-
3
RJ45_RX1+
2
WCM2012F2S-900T04_0805
RJ45_TX0-
9
RJ45_TX0+
10 11
14
RJ45_RX1-
15
RJ45_RX1+
16
1 2
3 4
FOX_JM34613-L002-7F~D
1 2
C587
0.01U_0402_16V7K
1 2
C603
0.01U_0402_16V7K
R5 75_0402_5%
1 2
R4 75_0402_5%
1 2
2
C20 1000P_1206_2KV7K
1
CLK_33M_LAN
2
3
2
3
2
JLAN2
1 2
S1
G
S2
G
12.3
12
R90 30_0402_5%
1
C117 22P_0402_50V8J
2
1
L78
@
RJ45_TX0-
4
4
RJ45_TX0+
1
1
L79
@
RJ45_RX1-
4
4
RJ45_RX1+
1
1
12
12
R623
75_0402_1%
5
5
6
6
7 8
R620 75_0402_1%
2
C586 1000P_1206_2KV7K
1
RJ45_TX0­RJ45_TX0+ RJ45_RX1+
RJ45_RX1-
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
, 06,
星期一 三月
2 1 3 4 5 6 7 8
FOX_JM36113-L0H7-7F
401362
2006
C29 0.1U_0402_16V4Z@
C27 0.1U_0402_16V4Z@
C28 0.1U_0402_16V4Z@
C26 0.1U_0402_16V4Z@
JLAN1
PR1­PR1+ PR2+ PR3+ PR3­PR2­PR4+ PR4-
1 2
1 2
1 2
1 2
1
SHLD19SHLD2
10
of
23 59
D
Page 24
5
PCI_AD[0..31]18,23,26,35
D D
PCI_C_BE3#18,23,26,35 PCI_C_BE2#18,23,26,35 PCI_C_BE1#18,23,26,35 PCI_C_BE0#18,23,26,35
PCI_PAR18,23,26,35
PCI_FRAME#18,23,26,35 PCI_TRDY#18,23,26,35
C C
B B
CLK_33M_CBS @
10_0402_5%
12
R89
@
A A
4.7P_0402_50V8C
CK33M_CBS_TERM
C104
2
1
PCI_AD20
CLK_33M_CBS17,26
PCIRST#18,20,23,26,30,31,35,47
CBS_RST#30
CLKRUN#20,26
+3V
+3V
+3V
33K_0402_5%
12
R96
CBS_GRST#
1U_0603_10V4Z
1
C118
2
5
PCI_IRDY#18,23,26,35 PCI_STOP#18,23,26,35 PCI_DEVSEL#18,23,26,35
1 2
PCI_PERR#18,23,26 PCI_SERR#18,23,26
PCI_REQ1#18 PCI_GNT1#18
R885 0_0402_5%@ R87 0_0402_5%@ R86 10K_0402_5%
PCI_PIRQA#18 PCI_PIRQE#18 PCI_PIRQG#18,26 CBS_CVS1 25
+3V
ICH_PME#18,23,26,30 CBS_SPK27 CBS_SPND#30
R832 10K_0402_5%@ R102 100K_0402_5%
12 1 2 1 2
R648 10K_0402_5%
1 2
R645 10K_0402_5%
1 2
R99 10K_0402_5%
1 2
12
1 2
PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 CBS_CAD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5
T11
PCI_AD4
V11
PCI_AD3
W11
PCI_AD2
T12
PCI_AD1
V12
PCI_AD0
W12
PCI_C_BE3# PCI_C_BE2# PCI_C_BE1# PCI_C_BE0#
PCI_PAR
PCI_FRAME# PCI_TRDY# PCI_IRDY# PCI_STOP# PCI_DEVSEL# CBS_IDSEL
R76100_0402_5%
PCI_PERR# PCI_SERR#
PCI_REQ1# PCI_GNT1#
PCI_RST# CBS_GRST#
SIRQ20,30,31
CBS_SPK
IEEE1394_TPBIAS0
IEEE1394_TPAP0 IEEE1394_TPAN0 IEEE1394_TPBP0 IEEE1394_TPBN0
R117
R114
C691
56.2_0603_1%
12
56.2_0603_1%
12
Z3008
270P_0402_50V7K
2
1
4
U9A
M2
AD31
M1
AD30
N5
AD29
N4
AD28
N2
AD27
N1
AD26
P5
AD25
P4
AD24
R4
AD23
R2
AD22
R1
AD21
T2
AD20
T1
AD19
U2
AD18
U1
AD17
V1
AD16
T7
AD15
V7
AD14
W7
AD13
R8
AD12
T8
AD11
V8
AD10
W8
AD9
R9
AD8
V9
AD7
W9
AD6 AD5 AD4 AD3 AD2 AD1 AD0
P2
C/BE3#
W2
C/BE2#
W6
C/BE1#
T9
C/BE0#
V6
PAR
V3
FRAME#
W4
TRDY#
V4
IRDY#
V5
STOP#
T5
DEVSEL#
P1
IDSEL
W5
PERR#
T6
SERR#
M4
REQ#
M5
GNT#
K1
PCICLK
L4
PCIRST#
G2
GBRST#
L5
CLKRUN#
J2
INTA#
K4
INTB#
K2
INTC#
J4
UDIO0/SERIRQ#
H1
UDIO1
H2
UDIO2
H4
UDIO3
H5
UDIO4
G1
UDIO5
G4
RI_OUT#/PME#
F1
SPKROUT
F2
HWSPND#
F4
TEST
R5C841_CSP208~D
R116
R115
R670
Placement Near Card Bus Controller
56.2_0603_1%
12
56.2_0603_1%
12
5.1K_0603_1%
1 2
4
R5C841
0.01U_0402_16V7K
C693
1
2
CAD31/CDATA10
CAD30/CDATA9 CAD29/CDATA1 CAD28/CDATA8 CAD27/CDATA0
CAD26/CADR0 CAD25/CADR1 CAD24/CADR2 CAD23/CADR3 CAD22/CADR4 CAD21/CADR5 CAD20/CADR6
CAD19/CADR25
CAD18/CADR7 CAD17/CADR24 CAD16/CADR17
CAD15/IOWR#
CAD14/CADR9
CAD13/IORD#
CAD12/CADR11
CAD9/CADR10 CAD8/CDATA15
CAD7/CDATA7 CAD6/CDATA13
CAD5/CDATA6 CAD4/CDATA12
CAD3/CDATA5 CAD2/CDATA11
CAD1/CDATA4
CAD0/CDATA3
CC/BE3#/REG#
CC/BE2#/CADR12
CC/BE1#/CADR8
CC/BE0#/CE1#
CPAR/CADR13
CFRAME#/CADR23
CTRDY#/CADR22
CIRDY#/CADR15
CSTOP#/CADR20
CDEVSEL#/CADR21
RESERVED/CADR19
CPERR#/CADR14
CSERR#/WAIT#
CREQ#/INPACK#
CSTSCHG/BVD1(STSCHG#/RI#)
CCLKRUN#/WP(IOIS16#)
CCLK/CADR16
CINT#/RDY(IREQ#)
CRST#/RESET
CAUDIO/BVD2(SPKR#/LED)
RESERVED/CDATA14
RESERVED/CDATA2 RESERVED/CADR18
0.33U_0603_10V7K
C694
1
2
B19 C18 D19 D18 E19 E16 F18 F15 G18 G15 H18 H15 J18 J16 J15 P16 P19 R19 P18 R18 T19
CAD11/OE#
T18
CAD10/CE2#
U19 U18 W17 V17 W16 V16 W15 V15 T15 R14
F16 K18 P15 V19
N15
K16 L16 K15 M16 L18 N19 N18 G16 G19 M15
CGNT#/WE#
E18 A18 L19
M18
H19
F19
T14
CCD1#/CD1#
D15
CCD2#/CD2#
R16
CVS1/VS1#
H16
CVS2/VS2#
W18 C19 N16
J139A1 4 3 2 1
SUYIN_020204FR004S507ZL
CBS_CAD31 CBS_CAD30 CBS_CAD29 CBS_CAD28 CBS_CAD27 CBS_CAD26 CBS_CAD25 CBS_CAD24 CBS_CAD23 CBS_CAD22 CBS_CAD21 CBS_CAD20 CBS_CAD19 CBS_CAD18
CBS_CAD16 CBS_CAD15 CBS_CAD14 CBS_CAD13 CBS_CAD12 CBS_CAD11 CBS_CAD10 CBS_CAD9 CBS_CAD8 CBS_CAD7 CBS_CAD6 CBS_CAD5 CBS_CAD4 CBS_CAD3 CBS_CAD2 CBS_CAD1 CBS_CAD0
CBS_CC/BE3# CBS_CC/BE2# CBS_CC/BE1# CBS_CC/BE0#
CBS_CPAR
CBS_CFRAME# CBS_CIRDY#
CBS_CSTOP# CBS_CDEVSEL# CBS_CBLOCK# CBS_CPERR# CBS_CSERR# CBS_CREQ# CBS_CGNT# CBS_CSTSCHNG CBS_CCLKRUN# CBS_CCLK_INTERNAL
CBS_CINT#
CBS_CRST#
CBS_CAUDIO
CBS_CCD1C# CBS_CCD2C# CBS_CVS1 CBS_CVS2
CBS_RSVD/D14 CBS_RSVD/D2 CBS_RSVD/A18
4 3 2
8
1
8
55667
7
3
CBS_CAD[0..31] 25
C141 0.01U_0402_16V7K
1 2
VCC5EN#25 VCC3EN#25
R69 0_0402_5%
1 2
270P_0402_50V7K
2
1
3
3
2
2
EXPR_CPUSB#
T109 PAD
VPPEN025 VPPEN125
+3V
1 2
R68 100K_0402_5%
CBS_CCD2# 25 CBS_CCD1# 25
12 12
@
Deciphered Date
C147
R5C841XI
12
22P_0402_50V8J
C146
22P_0402_50V8J
CBS_CC/BE3# 25 CBS_CC/BE2# 25 CBS_CC/BE1# 25 CBS_CC/BE0# 25
CBS_CPAR 25
CBS_CFRAME# 25 CBS_CTRDY# 25 CBS_CIRDY# 25 CBS_CSTOP# 25 CBS_CDEVSEL# 25 CBS_CBLOCK# 25 CBS_CPERR# 25
CBS_CSERR# 25 CBS_CREQ# 25
CBS_CGNT# 25
CBS_CSTSCHNG 25
CBS_CCLKRUN# 25
R81 22_0402_5%
CBS_CINT# 25
1 2
C119 0.01U_0402_16V7K
CBS_CRST# 25
CBS_CAUDIO 25
CBS_CVS2 25
CBS_RSVD/D14 25 CBS_RSVD/D2 25 CBS_RSVD/A18 25
USBP4-20 USBP4+20
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
X1
24.576MHz_16P_3XG-24576-43E1
1 2
R5C841XO
12
12
USBP4-
USBP4+
EXPR_CPUSB#25
ICH_SMBCLK17,20
ICH_SMBDATA17,20
ICH_PCIE_WAKE#20
PCIE_PERST#25
PCIE_CPPE#25
CLK_PCIE_CARD#17
CLK_PCIE_CARD17
PCIE_PERn020 PCIE_PERp020
PCIE_PETn020 PCIE_PETp020
0.01U_0402_16V7K 10K_0603_1%
C668
2
R660
1
1 2
SDLED#_MSLED#_XDLED#
CBS_CCLK 25
0_0402_5%
R105
1 2
270P_0402_50V7K
C127
C72
2
1
L77 WCM2012F2S-900T04_0805
4
4
1
1
R884 0_0402_5% R883 0_0402_5%
ICH_PCIE_W AKE# PCIE_PERST#
PCIE_CPPE#
PCIE_PERn0 PCIE_PERp0
PCIE_PETn0 PCIE_PETp0
2005/03/11 2006/03/11
Compal Secret Data
+3V_PHY
R5C841XI R5C841XO
IEEE1394_TPAP0 IEEE1394_TPAN0
IEEE1394_TPBP0 IEEE1394_TPBN0
IEEE1394_TPBIAS0
R635
R650
1 2
0_0603_5%
+3V_CARD_AUX
+3V_CARD
2
2
D11
A16 B16 A14
B12 A12
B13 A13
B10 A10
B11 A11
D12 D10
D13
B14
V14
W14
V13
W13
R13
T13
R7
100K_0402_5%
12
+1.5V_CARD
U9B
CPS
R5C841
XI XO FIL0
TPAP0 TPAN0
TPBP0 TPBN0
TPAP1 TPAN1
TPBP1 TPBN1
TPBIAS0 TPBIAS1
VREF REXT
USBDP USBDM
VPPEN0 VPPEN1
VCC5EN# VCC3EN#
REGEN#
R5C841_CSP208~D
CARD_LED 31
JP5
1
GND
2
USB_D-
3
USB_D+
4
CPUSB#
5
RSV
6
RSV
7
SMB_CLK
8
SMB_DATA
9
+1.5V
10
+1.5V
11
WAKE#
12
+3.3VAUX
13
PERST#
14
+3.3V
15
+3.3V
16
CLKREQ#
17
CPPE#
18
REFCLK-
19
REFCLK+
20
GND
21
PERn0
22
PERp0
23
GND
24
PETn0
25
PETp0
26
GND
27
GND
28
GND
29
GND
30
GND
FOX_1CH4110C
1
MDIO00 MDIO01 MDIO02 MDIO03 MDIO04 MDIO05 MDIO06 MDIO07 MDIO08 MDIO09 MDIO10 MDIO11 MDIO12 MDIO13 MDIO14 MDIO15 MDIO16 MDIO17 MDIO18 MDIO19
B1 A2 A3 B3 B4 A5
SDLED#_MSLED#_XDLED#
B5 D5
R113
A6 B6
22_0402_5%
D6 E6 A7 B7 D7 E7 A8 B8 D8 E8
12
SDDET#_XDDET0# 25 MSDET#_XDDET1# 25 XDCE# 25
SDWP#_XDRB# 25
SD_EN 25
XDWP 25
SDCMD_MSBS_XDWE# 25
SDCLK_MSCLK_XDRE# 25 SDDATA0_MSDATA0_XDDATA0 25 SDDATA1_MSDATA1_XDDATA1 25 SDDATA2_MSDATA2_XDDATA2 25 SDDATA3_MSDATA3_XDDATA3 25 XDDATA4 25 XDDATA5 25 XDDATA6 25 XDDATA7 25 XDCLE 25 XDALE 25
Function Seclect
UDIO3 UD IO4 VPPEN0 SD MS
0
00
00 1
01 0
101
010
10 1
11 0
11 1
*
Title
Size Document Number Rev
Date: Sheet
Compal Ele ctronics, Inc.
SCHEMATIC, M/B LA-2831
401362
星@, 06, 2006
薑三月
XX
XX
EnableX
Enable EnableX
Enable X X
Enable EnableX
Enable Enable X
Enable Enable E nable
of
1
24 59
Enable
D
Page 25
5
+3V
0.01U_0402_16V7K
0.01U_0402_16V7K
10U_0805_10V4Z
C96
1
1
2
2
0.01U_0402_16V7K
1
2
C145
0.01U_0402_16V7K
C663
1
1
2
2
0.47U_0603_16V4Z
C628
1
1
2
2
+5V
0.1U_0402_16V4Z
C153
1
2
MSDET#_XDDET1#
1 2
R665 100K_0402_5%@
1 2
R691 100K_0402_5%@
5
C624
+3V
1
2
0.01U_0402_16V7K
0.47U_0603_16V4Z
C138
C670
1
+3VS
D D
C66
1
2
C C
B B
SDDATA3_MSDATA3_XDDATA324 SDCMD_MSBS_XDWE#24
SDCLK_MSCLK_XDRE#24 SDDATA3_MSDATA3_XDDATA324 MSDET#_XDDET1#24
SDDATA2_MSDATA2_XDDATA224
SDDATA0_MSDATA0_XDDATA024 SDDATA1_MSDATA1_XDDATA124 SDCMD_MSBS_XDWE#24
SDCLK_MSCLK_XDRE#24 SDDATA0_MSDATA0_XDDATA024
A A
2
10U_0805_10V4Z
C620
+3V
C625
C85
VPPEN024 VPPEN124
VCC3EN#24 VCC5EN#24
0.01U_0402_16V7K
0.01U_0402_16V7K
C619
C71
1
1
2
2
10U_0805_10V4Z
0.1U_0402_16V4Z
C656
C89
2
1
1
2
0.01U_0402_16V7K
0.01U_0402_16V7K
C655
C86
1
1
2
2
0.1U_0402_16V4Z
C154
1
2
SD_MS_XDDATA1
SDDET#_XDDET0#24
+3VS
+3VS
SDWP#_XDRB#24
0.01U_0402_16V7K
0.01U_0402_16V7K
C105
1
1
2
2
0.01U_0402_16V7K
10U_0805_10V4Z
C661
1
2
+3V_PHY
U14
11
VCC3IN
13
VCC5IN
15
VCC5IN
3
EN0
4
EN1
2
VCC3_EN
1
VCC5_EN
5
FLG
16
GND
R5531V002-E2-FA_SSOP16~D
SD_MS_XDDATA2
1 2
R950 22_0402_5%
1 2
R951 22_0402_5%
+SD_VCC
R952 22_0402_5%
1 2
R953 22_0402_5%
1 2 1 2
R954 22_0402_5%
1 2
R955 22_0402_5%
1 2
R956 22_0402_5%
1 2
R957 22_0402_5%
1 2
R958 22_0402_5%
+SD_VCC
1 2
R959 22_0402_5%
1 2
R960 22_0402_5%
1 2
R961 22_0402_5%
SDDET#_XDDET0#
SDWP#_XDRB#
U9C
F5
VCC_3V1
G5
VCC_3V2
J19
VCC_3V3
K19
VCC_3V4
W3
VCC_PCI3V1
R11
VCC_PCI3V2
R12
VCC_PCI3V3
A4
VCC_MD3V
R6
VCC_RIN1
E13
VCC_RIN2
L1
VCC_ROUT1
E14
VCC_ROUT2
E10
AVCC_PHY1
E11
AVCC_PHY2
A17
AVCC_PHY3
B17
AVCC_PHY4
A9
AGND1
B9
AGND2
D9
AGND3
D14
AGND4
A15
AGND5
B15
AGND6
J1
GND1
J5
GND2
K5
GND3
E9
GND4
R10
GND5
T10
GND6
V10
GND7
W10
GND8
L15
GND9
M19
GND10
R5C841_CSP208~D
VCCOUT VCCOUT VCCOUT
VPPOUT
NC NC NC
SD9 SD1 SD2 SD3
MS10
MS9 MS8 MS7 MS6 MS5 MS4 MS3 MS2 MS1
SD4 SD5 SD6 SD7 SD8
R5C841
9 14 12
+CBS_VPP
8
C205
7 6 10
JSD1
D2 CD/D3 CMD VSS
VSS VCC SCLK D3 INS D2 D0 D1 BS VSS
VDD CLK VSS D0 D1
4
CD_SW
3
COMMDN
1
WP_SW
ALPS_SCDE1C0102
1
2
0.1U_0402_16V4Z C206
JSD1 Pin1
4
1
C675
1U_0805_25V4Z
2
+3VSUS
1
C915
2
R843
1 2
R836
1 2
R824
1 2
R823
1 2
12
R659 0_0805_5%
1 2
13
D
S
G
@
Q44
2
AOS3401_SOT23
D25 RB751V_SOD323 2 1
2 1 D26
RB751V_SOD323
1
1
C910
0.1U_0402_16V
100K_0402_5% 10K_0402_5% 100K_0402_5% 100K_0402_5%
SDWP#_XDRB# 24 SDCLK_MSCLK_XDRE# 24 XDCE# 24 XDCLE 24 XDALE 24 SDCMD_MSBS_XDWE# 24 XDWP 24
+XD_VCC
C911
2
2
PLTRST_SIO#
PM_SLP_S3#
@
PCIE_CPPE# EXPR_CPUSB#
PCIE_CPPE#24
EXPR_CPUSB#24
CBS_CCLK24
SDDATA0_MSDATA0_XDDATA0 24 SDDATA1_MSDATA1_XDDATA1 24 SDDATA2_MSDATA2_XDDATA2 24 SDDATA3_MSDATA3_XDDATA3 24 XDDATA4 24 XDDATA5 24 XDDATA6 24 XDDATA7 24
+SD_VCC
L2
NC1
C1
NC2
D1
NC3
E1
NC4 NC5 NC6 NC7 NC8 NC9
+CBS_VCC+3V
0.01U_0402_16V7K
C166
1
1
2
2
0.01U_0402_16V7K
1
2
XD1
GND
XD0
1 2
R924 22_0402_5%
XD2
1 2
R925 22_0402_5%
XD3
1 2
R926 22_0402_5%
XD4
1 2
R927 22_0402_5%
XD5
1 2
R928 22_0402_5%
XD6
1 2
R929 22_0402_5%
XD7
1 2
R930 22_0402_5%
XD8
1 2
R931 22_0402_5%
XD9 XD10
1 2
R932 22_0402_5%
XD11
1 2
R933 22_0402_5%
XD12
1 2
R934 22_0402_5%
XD13
1 2
R935 22_0402_5%
XD14
1 2
R936 22_0402_5%
XD15
1 2
R937 22_0402_5%
XD16
1 2
R938 22_0402_5%
XD17
1 2
R939 22_0402_5%
XD18
2
GND
GND
R/-B
CLE
-WE
-WP
VCC
CD
-RE
-CE ALE
D0 D1 D2 D3 D4 D5 D6 D7
C2 D2 E2 E4 E12
PLTRST_SIO#18
+3VSUS +3VSUS
C177
10U_0805_10V4Z
R64 0_0402_5%
XDDET0#
SDDET#_XDDET0#
0.1U_0402_16V
+3V
+3VS
XDDET0#
JSD1 Pin3 Short (L)
SD UnWP SD WPOp en (H)
4
3
+XD_VCC
1
C713
2.2U_0603_6.3V4Z
2
+3VS
12
R658 33K_0402_5%
XDDET0#MSDET#_XDDET1#
+1.5VS+3VS
U56
0.1U_0402_16V 12
1.5Vin
14
1.5Vin
2
3.3Vin
4
3.3Vin AUX_IN17AUX_OUT
6
SYSRST#
20
SHDN#
1
STBY#
10
CPPE#
9
CPUSB#
18
RCLKEN
R5538_QFN20~D
PM_SLP_S3#20,30
CBS_CC/BE0#24
CBS_CC/BE1#24 CBS_CPAR24 CBS_CPERR#24 CBS_CGNT#24
CBS_CCLK_E
12
2
33_0402_5%
1
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
CBS_CAD13 CBS_CAD13_L
CBS_CAD15 CBS_CAD15_L
USB Signals for Epress Card
SDDATA1_MSDATA1_XDDATA124
SDDATA2_MSDATA2_XDDATA224
+1.5V_CARD
0.1U_0402_16V 1
C904
C903
2
11
1.5Vout 13
1.5Vout
3
3.3Vout 5
3.3Vout 15
19
OC#
PCIE_PERST#
8
PERST#
16
NC
7
GND
PM_SLP_S3# PCIE_CPPE# EXPR_CPUSB#
CBS_CINT#24
+CBS_VCC
CBS_CIRDY#24 CBS_CC/BE2#24
R677
C714 22P_0402_50V8J
CBS_RSVD/D224 CBS_CCLKRUN#24
CBS_CAD0 CBS_CAD1 CBS_CAD3 CBS_CAD5 CBS_CAD7 CBS_CC/BE0# CBS_CAD9 CBS_CAD10 CBS_CAD11 CBS_CAD12 CBS_CAD13_L CBS_CAD14 CBS_CAD15_L CBS_CC/BE1# CBS_CPAR
CBS_CGNT# CBS_CINT#
+CBS_VPP
CBS_CIRDY#
CBS_CC/BE2# CBS_CAD18 CBS_CAD19 CBS_CAD20 CBS_CAD21 CBS_CAD22 CBS_CAD23 CBS_CAD24 CBS_CAD25 CBS_CAD26 CBS_CAD27 CBS_CAD28 CBS_CAD29 CBS_CAD30 CBS_RSVD/D2 CBS_CCLKRUN#
2005/03/11 2006/03/11
L49
1 2
BLM21A601SPT_0805@
L47
1 2
BLM21A601SPT_0805@
R151
1 2
0_0402_5%
R141
1 2
0_0402_5%
SDDET#_XDDET0#
SDDET#_XDDET0#
1
1
0.1U_0402_16V C899
2
2
10U_0805_10V4Z~N
PCIE_PERST# 24
C913
0.1U_0402_16V
SANTA_130632-1_LB
Compal Secret Data
Deciphered Date
0.1U_0402_16V 1
C898 C901 2
+3V_CARD_AUX
1
2
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
2
U45
2
B
4
OE
SN74CBT1G384_SOT23-5
U40
VCC
2
B
4
+3V_CARD
10U_0805_10V4Z~N
JP9
A
OE
GND
SN74CBT1G384_SOT23-5
1
1
0.1U_0402_16V
C902
2
2
SD_EN24
1
C914
0.1U_0402_16V 2
35
1
35
36
2
36
37
3
37
38
4
38
39
5
39
40
6
40
41
7
41
42
8
42
43
9
43
44
10
44
45
11
45
46
12
46
47
13
47
48
14
48
49
15
49
50
16
50
51
17
51
52
18
52
53
19
53
54
20
54
55
21
55
56
22
56
57
23
57
58
24
58
59
25
59
60
26
60
61
27
61
62
28
62
63
29
63
64
30
64
65
31
65
66
32
66
67
33
67
68
34
68
69
69
70
70
71
71
72
72
2
5
VCC
1
A
3
GND
+5VS
5
SD_MS_XDDATA2
1 3
SDCMD_MSBS_XDWE#
SD_EN
CBS_CCD1# CBS_CAD2 CBS_CAD4 CBS_CAD6 CBS_RSVD/D14 CBS_CAD8
CBS_CVS1
CBS_CAD16 CBS_RSVD/A18 CBS_CBLOCK#CBS_CPERR# CBS_CSTOP# CBS_CDEVSEL#
CBS_CTRDY# CBS_CFRAME# CBS_CAD17
CBS_CVS2 CBS_CRST# CBS_CSERR# CBS_CREQ# CBS_CC/BE3# CBS_CAUDIO CBS_CSTSCHNG
CBS_CAD31 CBS_CCD2#
R657
+5VS
SD_MS_XDDATA1
+3VS
10K_0402_5%
12
CBS_CRST#
1
L17
1 2
+3V
BLM21A601SPT_0805
C135
1
2
22U_1206_10V4Z
1
1
C130
2
0.1U_0402_16V4Z
1
C131
0.1U_0402_16V4Z
C674
C657
2
2
1000P_0402_50V7K
+XD_VCC
12
R61
+3VS
12
R60 33K_0402_5%
U44
3
VIN
VOUT
4
VIN/CE
VOUT
2
GND
RT9701-CB_SOT23-5
CBS_CCD1# 24
CBS_RSVD/D14 24
CBS_CVS1 24
CBS_RSVD/A18 24 CBS_CBLOCK# 24 CBS_CSTOP# 24 CBS_CDEVSEL# 24
CBS_CTRDY# 24 CBS_CFRAME# 24
CBS_CVS2 24 CBS_CRST# 24 CBS_CSERR# 24 CBS_CREQ# 24 CBS_CC/BE3# 24 CBS_CAUDIO 24 CBS_CSTSCHNG 24
CBS_CCD2# 24
2
C684
0.01U_0402_16V7K
1
@
Title
Size Document Number Rev
Date: Sheet
2.2K_0402_5%
XDCE#
1 5
C703
0.01U_0402_16V7K
+CBS_VCC +CBS_VPP
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
星@, 06, 2006
薑三月
SDCLK_MSCLK_XDRE#
+SD_VCC
1
1
2
2
CBS_CAD31 CBS_CAD30 CBS_CAD29 CBS_CAD28 CBS_CAD27 CBS_CAD26 CBS_CAD25 CBS_CAD24 CBS_CAD23 CBS_CAD22 CBS_CAD21 CBS_CAD20 CBS_CAD19 CBS_CAD18 CBS_CAD17 CBS_CAD16 CBS_CAD15 CBS_CAD14 CBS_CAD13 CBS_CAD12 CBS_CAD11 CBS_CAD10 CBS_CAD9 CBS_CAD8 CBS_CAD7 CBS_CAD6 CBS_CAD5 CBS_CAD4 CBS_CAD3 CBS_CAD2 CBS_CAD1 CBS_CAD0
1
C709
1U_0603_10V4Z
+3VS
12
12
R63 33_0402_5%
2
C56 22P_0402_50V8J
1
CBS_CAD[0..31] 24
of
25 59
+3V_PHY
1
2
1000P_0402_50V7K
R62 33K_0402_5%
D
Page 26
5
4
3
2
1
PCI_AD[0..31]
EMVD[0..7]35
D D
C55 0.1U_0402_16V4Z
+1.5VS
1
1
C C
+
C510.1U_0402_16V4Z
C967330U_D2E_2.5VM
@
2
2
47U_B2_6.3VM_R55
PCI_AD[0.. 3 1] 18,23,24,35
EMVD[0..7]
+3VS +3VS
12
0_0402_5%
R624
+5VS
TV_VOICER29
1 2
T111
EMVDHS35 PCI_PIRQB#18
CLK_33M_CBS17,24
PCI_REQ2#18 PCI_GNT2# 18
PCI_C_BE3#18,23,24,35
PCI_C_BE2#18,23,24,35 PCI_IRDY#18,23,24,35
PCI_SERR#18,23,24 PCI_PERR#18,23,24
PCI_C_BE1#18,23,24,35
+2.5VS
1
1
+
C50
C966
2
2
TV_VOICER
EMVDHS PCI_PIRQB#
CLK_33M_CBS PCI_REQ2#
PCI_AD31 PCI_AD29 PCI_AD27 PCI_AD25 PCI_C_BE3# PCI_AD23 PCI_AD21 PCI_AD19
PCI_AD17 PCI_C_BE2# PCI_IRDY#
PCI_SERR# PCI_PERR#
PCI_C_BE1# PCI_AD14
PCI_AD12 PCI_AD10
PCI_AD8 PCI_AD7
PCI_AD5 PCI_AD3
PCI_AD1 EMVD7 EMVD5 EMVD3 EMVD1
TV_G1
0.1U_0402_16V4Z
JTVMD1
92
GND
90
90
88
88
86
86
84
84
82
82
80
80
78
78
76
76
74
74
72
72
70
70
68
68
66
66
64
64
62
62
60
60
58
58
56
56
54
54
52
52
50
50
48
48
46
46
44
44
42
42
40
40
38
38
36
36
34
34
32
32
30
30
28
28
26
26
24
24
22
22
20
20
18
18
16
16
14
14
12
12
10
10
8
8
6
6
4
4
2
2
MOLEX_53625-0974_90P
GND
89 87 85 83 81 79 77 75 73 71 69 67 65 63 61 59 57 55 53 51 49 47 45 43 41 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11
9 7 5 3 1
12
R56
0_0402_5%
+5VS
91
TV_G2
89 87 85 83 81 79 77 75 73 71 69 67 65 63 61 59 57 55 53 51 49 47 45 43 41 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1
TV_VOICEL
EMVDVS PCIRST# PCI_GNT2#
PCI_AD30 PCI_AD28
PCI_AD26 PCI_AD24
1 2
PCI_AD22
R54 100_0402_5% PCI_AD20 PCI_PAR PCI_AD18 PCI_AD16
PCI_FRAME# PCI_TRDY# PCI_STOP#
PCI_DEVSEL# PCI_AD15
PCI_AD13 PCI_AD11
PCI_AD9 PCI_C_BE0#
PCI_AD6 PCI_AD4 PCI_AD2 PCI_AD0
EMVD6 EMVD4 EMVD2 EMVD0
EMVDCLK_TM EMVDCLK
R973 0_0402_5%
TV_VOICEL 29
T110
EMVDVS 35 PCIRST# 18,20,23,24,30,31,35,47
PCI_PAR 18,23,24,35
PCI_FRAME# 18,23,24,35 PCI_TRDY# 18,23,24,35 PCI_STOP# 18,23,24,35
PCI_DEVSEL# 18,23,24,35
PCI_C_BE0# 18,23,24,35
PCI_PIRQH#18
CLK_33M_MPCI17 PCI_REQ3#18
C596 0.1U_0402_16V4Z
1 2
PCI_C_BE3#18,23,24,35
PCI_C_BE2#18,23,24,35
PCI_AD21TVDSEL
PCI_IRDY#18,23,24,35 CLKRUN#20,24
PCI_SERR#18,23,24 PCI_PERR#18,23,24
PCI_C_BE1#18,23,24,35
+1.5VS
2
1
+2.5VS
1
2
EMVDCLK 35,47
WLAN_LINK30
WLAN_OFF#30,31
C591
0.1U_0402_16V4Z
C590
0.1U_0402_16V4Z
WLAN_OFF#
COEX2_WLAN_ACTIVE
T22
+5VS
WLAN_LINK WLAN_ACT
1 2
R779 0_0402_5%
PCI_PIRQH#
CLK_33M_MPCI PCI_REQ3# PCI_AD31
PCI_AD29 PCI_AD27
R780
PCI_AD25
0_0402_5%
1 2 PCI_C_BE3# PCI_AD23
PCI_AD21 PCI_AD19
PCI_AD17 PCI_C_BE2# PCI_IRDY#
CLKRUN# PCI_SERR#
PCI_PERR# PCI_C_BE1# PCI_AD14
PCI_AD12 PCI_AD10
PCI_AD8 PCI_AD7
PCI_AD5 PCI_AD3 PCI_AD1
+5VS
2
C863
0.1U_0402_16V4Z
1
+3VS
JMPCI1
112
KEY KEY
334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152 535354 555556 575758 595960 616162 636364 656566 676768 696970 717172 737374 757576 777778 797980 818182 838384 858586 878788 898990 919192 939394 959596 979798 9999100
101
101
103
103
105
105
107
107
109
109
111
111
113
113
115
115
117
117
119
119
121
121
123
123
125
125
TYCO_1734064-3
102 104 106 108 110 112 114 116 118 120 122 124 126
CLK_33M_CBS
R622
B B
30_0402_5%
1 2
CLK_PCI_TVMD_TERM
2
C593 22P_0402_50V8J
1
+3VS
2
C54
0.047U_0402_16V4Z
1
0.047U_0402_16V4Z 2
C52
1
2
C53
1
0.047U_0402_16V4Z
0.047U_0402_16V4Z 2
C592
1
2
C594
1
0.047U_0402_16V4Z
CLK_33M_MPCI
R778 10_0402_5%@
1 2
CK_33M_MINPCI_TERM
2
C867
4.7P_0402_50V8C
@
1
WLAN_LINK
12
R963
10K_0402_5%
WLAN_ACT
2
G
2 4
6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126
+3VS
10K_0402_5%
+3VS
R464 0_0402_5%
+3V
12
R903
WLAN_LINK
13
D
Q58 2N7002_SOT23
S
PCI_PIRQG#
PCIRST# PCI_GNT3# SYS_PME#
1 2
PCI_AD30 PCI_AD28
PCI_AD26 PCI_AD24 MINIDSEL
PCI_AD22 PCI_AD20 PCI_PAR PCI_AD18 PCI_AD16
PCI_FRAME# PCI_TRDY# PCI_STOP#
PCI_DEVSEL# PCI_AD15
PCI_AD13 PCI_AD11
PCI_AD9 PCI_C_BE0#
PCI_AD6 PCI_AD4 PCI_AD2 PCI_AD0
2
C439
0.1U_0402_16V4Z
1
WLAN_ACT#
PCI_PIRQG# 18,24
PCIRST# 18,20,23,24,30,31,35,47 PCI_GNT3# 18
ICH_PME# 18,23,24,30
10K_0402_5%
1 2
R468
100_0402_5%
+3VS
5
U31
1
P
B
4
Y
2
A
G
TC7SH08FU_SSOP5
3
R465
12
PCI_AD18
PCI_PAR 18,23,24,35
PCI_FRAME# 18,23,24,35 PCI_TRDY# 18,23,24,35 PCI_STOP# 18,23,24,35
PCI_DEVSEL# 18,23,24,35
PCI_C_BE0# 18,23,24,35
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8
PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
WLAN_LED
+3V
R466
0_0402_5%
2
C444
0.1U_0402_16V4Z
1
PCI_AD[0.. 3 1] 18,23,24,35
WLAN_LED 31
+5VS
2
C861
0.1U_0402_16V4Z
1
COEX1_BT_ACTIVE
+3VS
2
C443
0.047U_0402_16V4Z
A A
1
2
C441
0.047U_0402_16V4Z
1
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
C440
0.047U_0402_16V4Z
1
2005/03/11 2006/03/11
Compal Secret Data
2
C865
0.047U_0402_16V4Z
1
Deciphered Date
2
2
C864
0.047U_0402_16V4Z
1
2
C442
0.047U_0402_16V4Z
1
Title
Size Document Number Rev
星@, 06, 2006
Date: Sheet
2
C862
0.047U_0402_16V4Z
1
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
薑三月
2
C866
0.047U_0402_16V4Z
1
of
1
26 59
D
Page 27
5
4
3
2
1
+3V
14
U55A SN74LVC14APWLE_TSSOP14
P
BEEP#30
D D
1
O2I
G
7
+3V
14
U55B SN74LVC14APWLE_TSSOP14
P
CBS_SPK24
3
O4I
G
7
1 2
R826 560_0402_5%
1 2
R827 560_0402_5%
+12VWS
1
12
+3V
5
U54
1
BEEP_OFF#30
TC7SH08FU_SSOP5
P
B
2
A
G
3
R820
10K_0402_5%
13
4
Y
D
2
G
S
2
Q49
2N7002_SOT23
C894 10U_0805_10V4Z
BUZZER_OUT
R818
@
2.4K_0402_5%
1 2
4.7U_0805_10V4Z
JPBUZ1
1 2
ACES_85204-0200
C704
+5VS
1
2
1
C716
2
0.1U_0402_10V6K
12
R702
10K_0402_5%
U46
4
VIN
2
SENSE or ADJ
DELAY ERROR7CNOISE
8
SD
SI9182DH-AD_MSOP8
VOUT
GND
5 6 1 3
1 2
12
30.1K_0402_1%
1
R684
C727
10K_0603_1%
2
0.01U_0402_16V7K
R695
1
C750
4.7U_0805_10V4Z 2
+VDDA
1
C758
0.1U_0402_10V6K
2
+AVDD_AC97
+3V
DVDD11DVDD2 LINE_OUT_L LINE_OUT_R
MONO_OUT HP_LOUT_L HP_LOUT_R
BIT_CLK
SDATA_IN
XTL_IN
XTL_OUT
VREFOUT
VREF
AFILT1 AFILT2 AFILT3 AFILT4
AVSS1 AVSS2 AVSS3 AVSS4
1
C761
0.1U_0402_10V6K
2
9
35 36 37 39 41
6 8 2
3
28 27
29 30 31 32
12
NC
42
NC
26 40 44 33
1
2
1M_0402_5%@
14
U55C SN74LVC14APWLE_TSSOP14
P
SPKR20
C C
5
O6I
G
7
1 2
R829 560_0402_5%
@ 10K_0402_5%
R833
12
D28 RB751V_SOD323
2 1
@
U18
14
R222 10K_0402_5%
1 2
R216 0_0402_5%
1 2
LINE_IN_L29
LINE_IN_R29
R171 4.7K_0402_5% R170 4.7K_0402_5%
12 12
1 2
C261 2.2U_0603_6.3V4Z
1 2
C260 2.2U_0603_6.3V4Z
LINE_IN_LA LINE_IN_RA
15 16 17 23 24 18 20 19
C298 1U_0603_10V6K
MIC128 MIC228
B B
R945
1 2
0_0603_5%
R946
1 2
0_0603_5%
R180
1 2
0_1206_5%
C742
12
0.1U_0402_10V6K C350
12
1 2
C282 1U_0603_10V6K
1 2
IAC_RST#19 IAC_SYNC19 IAC_SDATO19
R726 4.7K_0402_5% R733 4.7K_0402_5%
EAPD28,29,30 SPDIFO28
R748 1K_0402_5%
R247 22_0402_5%
1 2
1 2
R246 22_0402_5%
1 2
R741 33_0402_5% 1 2 1 2
L53 MBK1608301 L25 MBK1608301
C950 390P_0402_50V7K
1 2
1 2
ICH_AC_RST#
21 22 13
11 10
5
45 46
47
12
48
12
4 7
1
C286
0.1U_0402_10V6K
2
2
C279
0.1U_0402_10V6K
1
38
AVDD125AVDD2
AVDD434AVDD3 AUX_L AUX_R JS1 JS0 LINE_IN_L LINE_IN_R CD_L CD_R CD_GND MIC1 MIC2 PHONE
RESET# SYNC SDATA_OUT ID0
ID1 EAPD SPDIFO DVSS1
DVSS2
AD1981BJST_LQFP48
43
+AVDD_AC97
1
C763
0.1U_0402_10V6K
2
C328
0.1U_0402_10V6K
1
C786
0.1U_0402_10V6K
2
LINE_OUTL LINE_OUTR Wfout HP_OUTL HP_OUTR
R742 33_0402_5% R743 22_0402_5%
R254
AUD_REF
AFILT1 AFILT2 AFILT3 AFILT4
12 12
12
XTL_IN
XTL_OUT
+AUD_VREF
1 2
C247
1 2
C246
1 2
C245 270P_0402_50V7K
1 2
C244 270P_0402_50V7K
1
C259 10U_1206_6.3V6M
2
270P_0402_50V7K 270P_0402_50V7K
R720
1 2
0_0805_5%
R749
1 2
1
MBK1608301
C788 10U_0805_10V4Z
2
LINE_OUTL 28 LINE_OUTR 28
Wfout 29
HP_OUTL 28 HP_OUTR 28
IAC_SDATAI1 19
24.576MHz_16P_3XG-24576-43E1
1
C346
2
+VDDA
+AUD_VREF
1
+3VS
2
C779 22P_0402_50V8J
1
@
X3
@
1 2
1
22P_0402_50V8J@
1
2
C248 1U_0603_10V6K
2
0.1U_0402_16V4Z
1 2
R268 0_0402_5%
C345
22P_0402_50V8J@
1
C249
0.1U_0402_10V6K
2
C762
IAC_BITCLK 19,32
CLK_14M_CODEC
1
C771
12
R267
1
C358
2
4.7U_0805_10V4Z
2
10_0402_5%@
15P_0402_50V8J@
CLK_14M_CODEC 17
2
0.1U_0402_10V6K C730
12
0.1U_0402_10V6K
A A
C741
12
0.1U_0402_10V6K
GNDA
GNDA 26,28,29,46
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2005/03/11 2006/03/11
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
星@, 06, 2006
薑三月
1
27 59
D
of
Page 28
A
R696 0_0402_5%
12
R690
2.2K_0402_5%
1 1
2 2
3 3
4 4
MIC227 EAPD27,29,30 MIC127
HP_PLUG# EAPD
LINE_OUTR27
LINE_OUTL27
C721 C722
U64
1
A
2
B
AMP_VREF
C698
1 2
820P_0402_25V7K
AMP_VREF
C699
1 2
820P_0402_25V7K
R649 0_0805_5%
1 2
1U_0603_10V4Z
1 2 1 2
1U_0603_10V4Z
+3VS
5
P
4
O
G
3
NC7ST08P5X_SC70-5
R656
10K_0402_5%
R666
27K_0402_5%
R893
1 2
33K_0603_5%
R653
10K_0402_5%
R667
27K_0402_5%
R894
1 2
33K_0603_5%
A
MIC2_1 MIC1_1
EC_MUTE#
MUTE_H_E
1 2
1 2
12
R686
2.2K_0402_5%
FBM-11-160808-700T_0603
FBM-11-160808-700T_0603
+5VS
U65
1
A
2
B
+VDDA
8
LMV358A_SO8
P
3
+IN
OUT
12
2
-IN
G
4
R651
1 2
27K_0402_5%
C650
1 2
150P_0402_50V8J
U41B
LMV358A_SO8
5
+IN
OUT
12
6
-IN
R652
1 2
27K_0402_5%
C651
1 2
150P_0402_50V8J
Connect AMPGND to GND via one single point to HOLE close to Amplifier
12
L45
1 2 1 2
L46
220P_0402_50V7K
5
P
4
O
G
3
NC7ST08P5X_SC70-5
U41A
C652
1 2
1
0.027U_0603_16V7K
C653
1 2
7
0.027U_0603_16V7K
10U_1206_16V4Z
10U_1206_16V4Z
B
+AUD_VREF
1
C736
2
MUTE
1 2
R999
@
12
R654 27K_0402_5%
C681
1 2
0.1U_0402_25V4K
1
C705
2
R655 27K_0402_5%
1 2
C682
1 2
0.1U_0402_25V4K
1
C707
2
B
MIC2_2 MIC1_2
1
C737 220P_0402_50V7K
2
MUTE 29 0_0402_5%
+12VWS
1
2
1 2
10K_0603_5%
MUTE
R671
1 2
10K_0603_5%
1
C711 1U_0805_16V6K
2
C660
0.1U_0402_25V4K
1 2
10K_0603_5%
MUTE
R672
1 2
10K_0603_5%
1
C712 1U_0805_16V6K
2
PDN_MUTE 46
C659
0.1U_0402_25V4K
R886
+12VWS
1
2
R887
C
R676
0_0603_5%
U47
EAPD HP_OUTR1-1
EC_MUTE#30
HP_OUTR27
HP_OUTL27
U42
3
S-VDD
2
IN
5
SHUT DOWN
6
BYPASS-1
1
BYPASS-2
4
NC
7
S-GND
15
GNDA
LM4680SD-SRC14A
U43
3
S-VDD
2
IN
5
SHUT DOWN
6
BYPASS-1
1
BYPASS-2
4
NC
7
S-GND
15
GNDA
LM4680SD-SRC14A
HP_OUTR HP_OUTL
0.1U_0402_16V7K
P-VDD OUT_1 OUT_2
NC NC NC
P-GND
0.1U_0402_16V7K
P-VDD OUT_1 OUT_2
NC NC NC
P-GND
10 12 9 14
13 8 11
10 12 9 14
13 8 11
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
R698 0_0402_5%
1 2
R706 0_0402_5%@
1 2
+12VWS
C689
+12VWS
C690
2.2U_0603_6.3V4Z
C746
1 2
C747
1 2
2.2U_0603_6.3V4Z
1
2
1
2
C
R713 6.8K_0603_5%
1 2
R714 6.8K_0603_5%
1 2
1
C719
2
C598 .22U_1206_25V
1
2
C601
.22U_1206_25V
1
2
C597 .22U_1206_25V
1
2
C600 .22U_1206_25V
1
2
C602 .22U_1206_25V
1
2
C599 .22U_1206_25V
1
Deciphered Date
2
1U_0603_10V4Z
INTSPK_R1
INTSPK_R2
INTSPK_L1
INTSPK_L2
1U_0603_10V4Z
1
C706 10U_1206_16V4Z
2
L39
12
27uH
L38
12
27uH
1
C708 10U_1206_16V4Z
2
L41
27uH
27uH
2005/03/11 2006/03/11
12
L40
12
Compal Secret Data
14
SHDNR#
18
SHDNL#
15
INR
13
INL
1
C1P
3
C1N
C720
R687 47_0402_5%
R688 47_0402_5%
R712
4.7K_0402_5%
R711
4.7K_0402_5%
D
+3VS
12
Reserve the 0 ohm resistor. for voltage filtering
12
C728 1U_0603_10V4Z
10
19
PVss
5
1
2
1 2 1 2
+VDDA
12
12
PVDD
SVss
7
D
SVDD
PGND
2
HP_OUTR1-2HP_OUTR1-1 HP_OUTL1-2
AMP_VREF
11
OUTR
9
OUTL
4
NC-4
6
NC-6
8
NC-8
12
NC-12
16
NC-16
20
NC-20
SGND
MAX4411ETP-T_TQFN20
17
1
C738 10U_0805_10V4Z
2
0.4--->0.5 Change package smd-->dip(pcb footprint)
INTSPK_R1
1 2
INTSPK_R2
1 2
INTSPK_L1
1 2
INTSPK_L2
1 2
HP_PLUG#
L43
FBM-11-160808-700T_0603
1 2 1 2
L44
FBM-11-160808-700T_0603
AMP_VREF 29,46
Title
Size Document Number Rev
Date: Sheet
R941 0_0603_5% R942 0_0603_5% R943 0_0603_5% R944 0_0603_5%
R700
C733
HP_OUTL1-1
+3VS
10K_0402_5%
1 2
HP_OUTR1-3 HP_OUTL1-3HP_OUTL1-1
1
C735
2
0.1U_0402_10V6K
330P_0402_50V7K
JHP1 Pin1
HP_PLUG#
Compal Electronics, Inc.
星期一
, 06, 2006
三月
E
PW On (EAPD)
+12VS
En XP
EAPD
EC_MUTE#
RE_MUTE#
INTSPKB_R1 INTSPKB_R2 INTSPKB_L1 INTSPKB_L2
1
1
C581
C582
2
2
22P_0402_25V8K
@
@
+5VS
SPDIFO27
MIC2_2 MIC1_2
330P_0402_50V7K
C580
22P_0402_25V8K
@
C583
@
1
2
1
2
22P_0402_25V8K
1
C734
2
JHP1 Pin5
Short Open
HP Plug-In
HP Plug-Out
SPDIF Plug-Out
SCHEMATIC, M /B LA-2831
401362
E
Ex XP
P-TWO_AW 6044-B0D1Z
4
4
3
3
2
2
1
1
JSPK1
1
2
22P_0402_25V8K
JP2
1 2 3 4 5 6 7 8 9 10
11
G
12
G
ACES_85201-1005
HP Plug-In SPDIF Plug-In
SPDIF Plug-Out
of
28 59
D
Page 29
5
4
3
2
1
+5VALWR
U38
16
PTD6
+5VS
D13
1 2
1SS355_SOD323
D12
1 2
1SS355_SOD323
R585
1 2
1.5M_0402_5%
R598
1 2
100K_0603_5%
R579 0_0402_5%@
1 2 1 2
R578 0_0402_5%
CIR_OUT#15
D D
CIR_OUT#
PC_TV#30
PC_TV#
OSC0
OSC1
22 11
23
19 20 21
24 25 26 27
14
PTE2/TCH1 PTE1/TCH0
PET0/TCLK
PTA6/KBA6# PTA5/KBA5# PTA4/KBA4#
PTA3 PTA2 PTA1 PTA0
PTC0
2
OSC1
3
OSC2
RRX6000-0808L_SO28
IRQ#
PTA7/KBA7#
PTE4/D-
PTE3/D+
PTD5 PTD4 PTD3 PTD2 PTD1 PTD0
RST#
VREG
Y5
1 2
2
KDS_SMD-49TA
C563
33P_0402_50V8J
1
C C
2
C555
1
33P_0402_50V8J
0.1U_0402_10V6K
Compal P/N: SJ106P0M200 Foot_print: CIS f
Compal P/N: SJ106P0M200 Foot_print: Y_XSL02500
R169
AMP_VREF28,46
WFOUT27
AMP_VREF
C243
0.47U_0603_10V4Z
A_OUT
0.22U_0402_10V4Z
B B
AMP_VREF
R716 10K_0402_5%
1 2
C221
1 2
1 2
27K_0603_5%
12
R146
1 2
1 2
15K_0603_5%
R138
4.7K_0402_5%
R177
R139
1 2
27K_0603_5%
C222
2
1
0.027U_0603_16V7K
C234
+VDDA
050707 customer request GND change to GNDA
1 2
1
C573
5
VDD
2
0.1U_0603_50V4Z
1
VSS
15 18 13 12 17
10 9 8 7 6
28 4
C571
4.7U_0805_10V4Z
R577 100K_0603_5%
1 2
R576 100K_0603_5%
1 2 USBP7_1-1 USBP7_2-1 USBP7+ CIR_ONOFF#
1
1
2
2
R596 24_0402_5% R595 24_0402_5%
1
C574
2
1 2 1 2
CIR_ONOFF# 30
D11 1SS355_SOD323
R57510K_0402_5%
C550
12
12
1U_0603_25V4Z
此料未上 無
代用的為
ootprint
0FK1H_2P
1 2
9.1K_0603_5%
U15
3
A_+INPUT
A_OUT
2
A_-INPUT
5
B_+INPUT
B_OUT
6
B_-INPUT
8
VCC
4
GND
NJM4580V_SSOP8~N
R156 0_0603_5%
1 2
A_OUT
1
7
R174
1 2
1.5K_0603_5%
+5VALWR
1
C546
2
22U_1206_10V4Z
USBP7-
12
12
R600
15K_0402_1%
+5VALWR
LID_SW#30,31
PM_SLP_S5#20,30
Woofer_out
2
C239
0.22U_0402_10V4Z
1
050707 customer request GND change to GNDA
R601
15K_0402_1%
USBP7- 20 USBP7+ 20
R1008 0_0402_5%
1 2
12
2
I0
1
I1
EAPD27,28,30
@
+3VALW+5VALW
12
R1011 0_0402_5% 5
@
P
O
G
U67
3
TC7SH32FU_SSOP5
10P_0603_50V8J
R1012 0_0402_5%
4
1 2
0_0402_5%
+3VS
EAPD
R196 0_0402_5%
C296
VD_AUDIO_SEL35
TV_VOICER26
TV_VOICEL26
B+_BIAS
R1013
2
G
Woofer_out
12
R194
4.7K_0402_5%
1 2
Y3
1
10MHZ_20P_1BG25000CK1A
2
0.047U_0402_10V4M
VD_AUDIO_SEL
TV_VOICER TV_VOICEL
AOUTR
AOUTR46
AOUTL
AOUTL46
+3VS
C932
1 2
C751
1 2
L27
1 2
BLM11A601S_0603
B+_BIAS
12
R991
RM_ON
13
D
2
G
S
1
C765 33P_0402_25V8K
2
47K_0402_5%
Q62 2N7002_SOT23
R993 1M_0402_5%
U19
2
INL
3
INR
7
SCL
8
SDA
6
RESET
10
OSC0
9
OSC1
MX3000ASG_SO16
12
12
R992 47K_0402_5%
LID_SW
13
D
Q63 2N7002_SOT23
S
C265 1 2
4.7U_0805_10V4Z
12
R195
4.7K_0402_5%
1
C262
@
4.7U_0805_10V4Z~N
2
R218
1 2
510K_0402_5%
1 2
1
C318 10P_0603_50V8J
2
+12VWS +12VWS
C933 2.2U_1206_25VFZ
1 2
2.2U_1206_25VFZ C752 2.2U_1206_25VFZ
1 2
2.2U_1206_25VFZ
1
C817
0.1U_0402_16V4Z
2
050707 customer request GND change to GNDA
+5VALW
C957
10U_1206_10V4Z
1
C956
2
0.01U_0402_16V7K
+3VS
11
DVDD
12
DVSS
5
AVDD
4
AVSS
1
REF0V
14
OUTL
13
OUTR
16
CAP
15
MXBSOUT
0.015U_0402_16V7K
U50
1
IN1
5
IN2
2
S1A
4
S2A
9
S1B
7
S2B
8
VDD
3
GND ADG836YRMZ-REEL_MSOP10~N
0.1U_0402_16V4Z
@
1
C958
2
RM_ON
1
C338
2
0.1U_0603_16V7K
OUTSL OUTSR
1
C336
2
1 2
Q61 AO3400_SOT23
D
1 3
1
C339
10U_1206_16V4Z
2
+
C315 100U_D_16VM
D1
D2
2
10
6
S
G
1
C263
2
LINE_IN_R
LINE_IN_L
C959
10U_1206_10V4Z
1
C264
2
0.1U_0603_16V7K
+5VALWR
1
2
0.1U_0402_16V4Z
L52
1 2
BLM11A601S_0603
10U_0805_10V3M
LINE_IN_R 27
LINE_IN_L 27
C960
+3VS
0.1U_0402_25V4K
10 12 9 14
13 8 11
2
1
C822
1
C379
10U_1206_16V4Z 2
L63
12
27uH
L62
12
27uH
2
C383 .22U_1206_25V
1
2
C384 .22U_1206_25V
1
2
C386 .22U_1206_25V
1
JP10
1
1
2
2
3
G
4
G
MOLEX_53398-0271~D
1
C831
0.1U_0402_25V4K
2
12
R243 10K_0402_5%
12
R242 10K_0402_5%
R263
1 2
0_0603_5%
Subwoof
Subwoof MUTE
MUTE28
10U_1206_16V4Z
1U_0805_10V7K
1
C378
2
C823
12
OUTSL
1
C341
2
33P_0402_25V8K
1
A A
OUTSR
C340
2
33P_0402_25V8K
R312
1 2
10K_0603_5%
1
C824 1U_0805_16V6K
2
R773
1 2
10K_0603_5%
U25
3
S-VDD
2
IN
5
SHUT DOWN
6
BYPASS-1
1
BYPASS-2
4
NC
7
S-GND
15
GNDA
LM4680SD-SRC14A
P-VDD OUT_1 OUT_2
P-GND
NC NC NC
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2005/03/11 2006/03/11
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
星@, 06, 2006
薑三月
D
of
29 59
1
Page 30
5
4
3
2
1
+3VALW
12
L66 0_0603_5%
+EC_AVCC
D D
C905
1 2
0.1U_0402_16V4Z
+3VALW_EC
12
R855 47K_0402_5%
ECRST#
1
C918
0.1U_0402_16V4Z
2
+3VALW
C C
CD_EJECT
+3VS
R531 10K_0402_5%
1 2
B B
JOPEN1
1 2
KB_ID
R536 10K_0402_5%
1 2
GATEA2019 KBRST#19
1
A A
C925
10P_0402_50V8J
2
Y6
32.768KHZ_1TJS125BJ2A251
+5V
10K_0402_5%
4
1
IN
2
SW2 HDK632AR-ST_2P
2 1
RP61
10K_0804_8P4R_5%
1 2
R857 10K_0402_5%
1 2
R860 10K_0402_5%
R869
1
2
OUT
NC3NC
+3VALW
ECAGND
L67
1 2
LPC_AD[0..3]19,31
CLK_33M_LPCEC17
Reserved for 87591L
EC_TCK EC_TDO
PSDAT2
18
PSCLK2
27
PSDAT1
36
PSCLK1
45
PSCLK3 PSDAT3
+3VS
R867 10K_0402_5%
1 2
1 2
GATEA20 KBRST#
CRY1
CRY2
C924 10P_0402_50V8J
5
R567 0_0805_5%
1 2
0_0603_5%
1 2 C920 22P_0402_50V8J
JP6
1
1
2
2
3
3
4
4
ACES_85205-0400
PSCLK331 PSDAT331
+3VALW_EC
1
C542
2
0.1U_0402_16V4Z
SIRQ20,24,31 LPC_FRAME#19,31
LPC_AD[0..3]
1 2 R856 30_0402_5%
KSI[0..7]31 KSO[0..15]31
KSO1631 KSO1731
R964 0_0402_5% R965 0_0402_5%
RSMRST#20
+VCCP_PWRGD52
EC_SCI#20
EAPD27,28,29 INTERNET_ON#31
LCD_VDD_EN15
PCI_CLKRUN#23,31
DVD_BTN#31
BKOFF#15 SCROLLOCK#31
FSTCHG49 CAPLOCK#31 NUMLOCK#31
EC_SMI#20 MSEN#16 VGATE8,17,20,56 LCD_EN10 PROCHOT#5
0.1U_0402_16V4Z 1
C922
2
1000P_0402_50V7K
R865 10K_0402_5%@
+3VS
1 2 1 2
DIMMER31
KBA[0..19]31
ADB[0..7]31
Close to RTC pad
1
C923
2
1 2
LPC_FRAME# LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
ECRST#
GATEA20 KBRST#
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7
KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14
KSO15 KSO16 KSO17
CRY1 CRY2
EC_SCI# CD_EJECT
INTERNET_ON# LCD_VDD_EN PCI_CLKRUN# DVD_BTN#
SCROLLOCK#
EC_SMI# VGATE
LCD_EN
0.1U_0402_16V4Z 1
C909
2
7
9 15 14 13 10 18 19 31
5
6 71
72 73 74 77 78 79 80
49 50 51 52 53 56 57 58 59 60 61 64 65 66 67 68
153 154
PSCLK1
110
PSDAT1
111
PSCLK2
114
PSDAT2
115 116 117
158 160
3
4
DIMMER
8 20 21 22 23 24 25 27 28 41
48 54 55 62 63 69 70 75
KBA[0..19]
ADB[0..7]
JOPEN2 close to DDR-SODIMM
4
1000P_0402_50V7K
1
C888
2
U57
SERIRQ LFRAME# LAD0/FWH0 LAD1/FWH1 LAD2/FWH2 LAD3/FWH3 LCLK ECRST# ECSCI#
GPIO02/GA20 GPIO03/KBRST#
KSI0/GPIK0 KSI1/GPIK1 KSI2/GPIK2 KSI3/GPIK3 KSI4/GPIK4 KSI5/GPIK5 KSI6/GPIK6 KSI7/GPIK7
KSO0/GPOK0 KSO1/GPOK1 KSO2/GPOK2 KSO3/GPOK3 KSO4/GPOK4 KSO5/GPOK5 KSO6/GPOK6 KSO7/GPOK7 KSO8/GPOK8 KSO9/GPOK9 KSO10/GPOK10 KSO11/GPOK11 KSO12/GPOK12 KSO13/GPOK13 KSO14/GPOK14 KSO15/GPOK15 KSO16/GPOK16 KSO17/GPOK17
PSCLK1 PSDAT1 PSCLK2 PSDAT2 PSCLK3 PSDAT3
XCLKI XCLKO
GPIO00/E51IT0 GPIO01/E51IT1 GPIO04 GPIO07 GPIO08 GPIO09 NUMLOCK#/GPIO0A GPIO0B CLKRUN#/GPIO0C GPIO0D GPIO0E SCROLLLOCK#/GPIO0F
GPIO10 CAPLOCK#/GPIO11 FNLOCK#/GPIO12 GPIO13
GPIO1
GPIO14 GPIO15 GPIO16 GPIO17
A0
124
KBA0
125A2126A3127
KBA1
123
VCC016VCC134VCC245VCC3
Host interface
Key matrix scan
PS2 interface
GPIO0
A1/XIOP_TP
A4/DMRP_TP
A5/EMWB_TP
128
131A6132A7133
KBA3
KBA6
KBA2
KBA7
KBA5
KBA4
136
143A9142
KBA8
157
VCC4
A8
KBA9
+EC_AVCC
ECAGND
159
166
VCC5
135
KBA10
VCC6
A10
134
KBA11
PWR/GND
A12
A11
130
KBA13
KBA12
BIOS I/F
A13
A14
129
121
KBA14
GND117GND235GND346GND4
A15
120
113
KBA15
KBA16
122
A16
A17
A18
112
104
KBA17
KBA18
95
167
137
GND6
GND7
DA output or GPO
FAN/PWM
SM BUS
GPIO2
GPWU or GPI
D0
A19
138D1139D2140D3141D4144D5145D6146D7147
103
KBA19
ADB0
ADB2
ADB1
96
161
VCCA
AGND
VCCBAT
BATGND
AD Input or GPI
PWM or GPOW
PWM2/GPOW2/FAN1PWM PWM7/GPOW7/FAN2PWM
GPIO05/FAN3PWM/TEST_TP
FANFB1/TOUT1/GPIO2E
GPWU7/TIN2/FANFB2
GPIO06/FANFB3/DPLL_TP
GPIO20/E51CS#/ISPEN_TP
GPIO21/E51RXD/ISPCLK GPIO22/E51TXD/ISPDAT
ADB4
ADB7
ADB3
ADB6
ADB5
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
+3VALW_EC
1
C927 1U_0805_25V4Z
2
BATT_TEMP
81
AD0/GPIAD0 AD1/GPIAD1 AD2/GPIAD2 AD3/GPIAD3 AD4/GPIAD4 AD5/GPIAD5 AD6/GPIAD6 AD7/GPIAD7
DA0/GPODA0 DA1/GPODA1 DA2/GPODA2 DA3/GPODA3 DA4/GPODA4 DA5/GPODA5 DA6/GPODA6 DA7/GPODA7
PWM0/GPOW0 PWM1/GPOW1 PWM3/GPOW3 PWM4/GPOW4 PWM5/GPOW5 PWM6/GPOW6
SCL1
SDA1
SCL2
SDA2
A20/GPIO23
GPIO24 GPIO25 GPIO26 GPIO27 GPIO28
GPIO29 GPIO2A GPIO2B
LRST#/GPIO2C
GPIO2D
TOUT2/GPIO2F
GPWU0 GPWU1 GPWU2 GPWU3 GPWU4 GPWU5
GPWU6/TIN1
GPIO18/XIO8CS#
GPIO19/XIO9CS# GPIO1A/XIOACS# GPIO1B/XIOBCS#
GPIO1C/XIOCCS# GPIO1D/XIODCS#
GPIO1E/XIOECS# GPIO1F/XIOFCS#
RD#
WR#
IOCS#
MEMCS#
150
151
152
173
2005/03/11 2006/03/11
M/B_ID
82
BATT_OVP
83
KB_ID
84 87 88 89 90
99 100 101 102
ICH_PWRGD
1 42 47 174
32 33 37
ICH_BATLOW#
38 39 40
36 43
MAIL_ONOFF#
11 171 176
DPLL_TP
12
SMB_EC_CK1
163
SMB_EC_DA1
164
SMB_EC_CK2
169
SMB_EC_DA2
170
EC_TINIT#
105
EC_TCK
106
EC_TDO
107
EC_TDI
108
CIR_ONOFF#
109 118 119 148 149 155
G_RST#
156 162
PCIRST#
165 168 175
2 26
ON_DISC
29 30 44
TV_BTN#
76
ICH_PME#
172 85
86
BUTTON_Bri_D
91
BUTTON_Bri_U
92
BUTTON_Visual
93 94 97
CBS_SPND#
98
KB910_LQFP176
FSEL# 31 FWR# 31 FRD# 31
Compal Secret Data
T112
+3VALW
12
R533 100K_0603_5%
M/B_ID
12
R534 100K_0603_5%
Deciphered Date
TV_BTN# DVD_BTN# ICH_PME# CIR_ONOFF# LID_SW#
INTERNET_ON#
0.1U_0402_16V4Z
1 2
BATT_TEMP
BATT_TEMP 48,49
PANEL_VCC_EN 38
BL_EN 38
ADP_I 49
DAC_BRIG 15 EN_FAN1 32
IREF 49 BEEP_OFF# 27
PC_TV# 29 Visual_Out 38
INVT_PWM 15 BEEP# 27 ACOFF 49 ICH_BATLOW# 20 EC_ON 31 CHARGE_LED# 15,31
PWR_LED# 15,31 BATT_LED# 15,31 MAIL_ON# 31 FAN1SPD 32 BIA 10
SMB_EC_CK1 31,48 SMB_EC_DA1 31,48 SMB_EC_CK2 32 SMB_EC_DA2 32
CIR_ONOFF# 29 LID_SW# 29,31 EC_MUTE# 28 SYSON 34,51,54 SUSP# 23,31,34,50,52,55 VR_ON 34,56
VCCP_ON 52 PCIRST# 18,20,23,24,26,31,35,47 PWRBTN_OUT# 20 EC_THRM# 20
ON/OFF 31 ACIN 20,48 ON_DISC 22 PM_SLP_S3# 20,25 PM_SLP_S5# 20,29 TV_BTN# 31 ICH_PME# 18,23,24,26
WLAN_LINK# 31 LID_SWOUT# 20 BUTTON_Bri_D 38 BUTTON_Bri_U 38 BUTTON_Visual 38 WLAN_OFF# 26,31
WLAN_LINK 26
CBS_SPND# 24
1
2
C514 0.01U_0402_16V7K
1 2
C513 0.01U_0402_16V7K
1 2
C515 0.01U_0402_16V7K
0_0402_5%
R1014
@
ICH_PWRGD 20
R811 10K_0402_5%
1 2
R838 10K_0402_5%
1 2
R874 10K_0402_5%
1 2
R841 10K_0402_5%
1 2
R563 10K_0402_5%
1 2
R914 10K_0402_5%
1 2
C508
2
Pin8, 22, 54, 82, 84, 89 and 172 is diffrence define with 87591 R181, R191, R192 and R193 are reserved for KB910. R187 & R176 are reserced for 87591L BTDIS# signal is reservedfor BT modula, BTON# signal is reserved for MDC\BT module
12
ECAGNDM/B_ID ECAGND ECAGNDBATT_OVP
ODD_ACT# 22,31
PCB3.0->4.0 add
M/B Ver.
Voltage
0.1
0.30.2 1.0
0.0 0.4 0.8 1.0
1.6
BORAD ID
+5VALW
12
12
12
12
R881
R875
R572
R571
4.7K_0402_5%
SMB_EC_DA1 SMB_EC_CK1 SMB_EC_DA2 SMB_EC_CK2
For NS 87591L
KBA1
1 2
R866 10K_0402_5%@
KBA2
1 2
R868 10K_0402_5%@
KBA3
1 2
R870 10K_0402_5%@
KBA5
1 2
R871 10K_0402_5%
FSEL# FRD# EC_SMI#
100K_0402_5%
G_RST#
PCIRST#18,20,23,24,26,31,35,47
+3VALW
Title
Size Document Number Rev
星@, 06, 2006
薑三月
Date: Sheet
1 2
R873 10K_0402_5%
1 2
R574 10K_0402_5%
1 2
R809 10K_0402_5%
+3VALW
12
R566
+3VALW
2 1
For KB910
PCIRST#
R573 100K_0402_5%
EC_TINIT#
R834 100K_0402_5%
TEST_TP
R864 100K_0402_5%
DPLL_TP
R863 100K_0402_5%
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
@
4.7K_0402_5%
4.7K_0402_5%
5
U35
@
NC7ST32P5X_SC70
1 2
1 2
1 2 1 2
1
@
4.7K_0402_5%
+3VALW
+3VALW
4
30 59
CBS_RST# 24
+3VALW
of
D
Page 31
A
B
C
D
E
Killer switch
+3VS
12
R35
@
100K_0402_5%
R994
1.5M_0402_5%
1 2
LPC DEBUG CONN
ADB[0..7]30
KBA[0..19]30
FWE#
FSEL#30
FRD#30
B
SW1
1BS003-1211L_3P
11223
JDBUG1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
ACES_85201-2005@
ADB[0..7]
KBA[0..19]
KBA0 KBA1 KBA2 KBA3 KBA4
KBA6 KBA7 KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15 KBA16 KBA17 KBA18 KBA19
FSEL# FRD# FWE#
D1 Pin3 Open PAST & MASK layer
WLAN LED
3
13
ADB0 ADB1KBA5 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
2
G
+3VALW
CARD_LED24
1 2
R878 10K_0402_5%@
D
Q1 2N7002_SOT23
S
HDD1_LED#22 HDD2_LED#22
WLAN_LED26
WLAN_OFF#
+5VS +3VS
CLK_14M_SIO LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# LPC_DRQ#1 PCIRST# PCI_CLKRUN# CLK_33M_ICH SIRQ
U60
21
A0
20
A1
19
A2
18
A3
17
A4
16
A5
15
A6
14
A7
8
A8
7
A9
36
A10
6
A11
5
A12
4
A13
3
A14
2
A15
1
A16
40
A17
13
A18
37
A19
22
CE#
24
OE#
9
WE#
SST39VF080-70-4C-EIE_TSOP40~N
WLAN_OFF# 26,30
CLK_14M_SIO 17 LPC_AD0 19,30 LPC_AD1 19,30 LPC_AD2 19,30 LPC_AD3 19,30 LPC_FRAME# 19,30 LPC_DRQ1# 19 PCIRST# 18,2 0, 2 3,24,26,30,35,47 PCI_CLKRUN# 23,30 CLK_33M_ICH 17,18 SIRQ 20 ,24,30
VCC0 VCC1
D0 D1 D2 D3 D4 D5 D6 D7
RP#
NC
READY/BUSY#
NC0 NC1
GND0 GND1
WLAN_LED
WLAN_LINK#30
LID_SW#29,30
31 30
25 26 27 28 32 33 34 35
10 11 12 29 38
23 39
BIOS_RST#
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/11 2006/03/11
C
D21 12-21-BHC-ZL1M2RY-2C_GREEN
D22 12-21-BHC-ZL1M2RY-2C_AMBER
13
D
Q41
2
G
2N7002_SOT23
S
ACES_85201-0405
6 5
JLSW1
+3VALW
1
C578
0.1U_0402_16V4Z
2
+3VALW
Compal Secret Data
12
12
GND GND 4 3 2 1
ODD_ACT#22,30
R980
@
1 2
0_0603_5%
CARD_LED24
Deciphered Date
1 2
100_0603_1%
1 2
390_0603_1%
EC_ON30
+5VS
14
1
P
I0
O
2
I1
G
7
CARD_LED#
C539
0.1U_0402_16V4Z
FWE#
TC7SH32FU_SSOP5
R32
R621
R995
2
G
U62A
3
74HCT08PW_TSSOP14
R981
2
G
12
4
U36
+3VS
+5VS
12
10K_0402_5%
13
D
2N7002_SOT23
S
HDD_ACT#
+5VS
12
13
D
S
+3VALW
5
O
3
1 2
R876 0_0402_5%@
D
ON/OFFBTN#
+3VALW
EC_ON
22K_0402_5%
ODD_ACT
Q64
10K_0402_5%
CARD_LED#
Q60
2N7002_SOT23
2
P
I0
1
I1
G
12
R544 22K_0402_5%
1 2
R546
KSI[0..7]30
+3VALW
D8
1
DAN202U_SC70
+5VS
12
R568 100K_0402_5%
2
INTERNET_ON#30
MAIL_ON#30
DVD_BTN#30
CAPLOCK#30
SCROLLOCK#30
NUMLOCK#30
DIMMER30
CHARGE_LED#15,30
BATT_LED#15,30 PWR_LED#15,30
2
1 3
D
Q26 2N7002_SOT23
+3VALW
3 2
KSO1730 KSO1630
TV_BTN#30
G
S
12
13
FWR# 30
R537 100K_0402_5%
ON/OFF
Q21 DTC124EK_SC59
1000P_0402_50V7K
+5VALW
Power BTN
1
2
C520
12
LED Board
INTERNET_ON# KSO17 KSO16
MAIL_ONOFF#
KSI4 KSI3 KSI2 KSI1
KSI0 TV_BTN# DVD_BTN# ON/OFFBTN#
CAPS_LED# SCROLLOCK#
NUM_LED# ODD_ACT CARD_LED#
HDD_ACT#
DIMMER
SUSP# 23,30,34,50,52,55
EC_FLASH# 20
ON/OFF 30 51ON# 50
D7
RLZ20A_LL34
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1
ACES_85201-3005
JPSWP1
Compal Electronics, Inc.
Title
Size Document Number Rev
星期一
Date: Sheet
SCHEMATIC, M /B LA-2831
401362
, 06, 2006
三月
E
of
31 59
D
KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8
KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7
1
2
SMB_EC_CK130,48 SMB_EC_DA130,48
Debug Tool
JDBUG2
SUYIN_127212FA034G200ZX@
KSI[0..7]
KSO[0..15]
100P_0402_25V8K
1 2
C487
C488 100P_0402_25V8K
100P_0402_25V8K
1 2
C492 100P_0402_25V8K
C491
100P_0402_25V8K
1 2
C495
C473 100P_0402_25V8K
100P_0402_25V8K
1 2
C475
C476 100P_0402_25V8K
100P_0402_25V8K
1 2
C479
C480 100P_0402_25V8K
100P_0402_25V8K
1 2
C483
C484 100P_0402_25V8K
PSDAT3
1
2
C948
100P_0402_25V8K
+5VALW
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
A
KeyBoard
1 2
C489 100P_0402_25V8K
1 2
C490 100P_0402_25V8K
1 2
C493 100P_0402_25V8K
1 2
C494 100P_0402_25V8K
1 2
C472 100P_0402_25V8K
1 2
C474 100P_0402_25V8K
1 2
C477 100P_0402_25V8K
1 2
C478 100P_0402_25V8K
1 2
C481 100P_0402_25V8K
1 2
C482 100P_0402_25V8K
1 2
C485 100P_0402_25V8K
1 2
C486 100P_0402_25V8K
10
9
PSCLK3
1
C949100P_0402_25V8K
2
C568
0.1U_0402_16V4Z
1 2
U61
8
VCC
7
WP
6
SCL
5
SDA
AT24C16N-10SI-2.7_SO8
+3VALW
FSEL# FRD# FWE# ADB7 ADB6 ADB5 ADB4 ADB3 ADB2 ADB1 ADB0 KBA19 KBA18 KBA17 KBA16 KBA15
1 2
1 2
1 2
1 2
1 2
1 2
ACES_85201-0805
GND GND 8 7 6 5 4 3 2 1
JTP1
1
A0
2
A1
3
A2
4
GND
+3VALW
+5VALW
12
R591 100K_0402_5%
12
R588 100K_0402_5%
1 2
R877 10K_0402_5%
KSI[0..7]30
KSO[0..15]30
ACES_85201-2405
26
G
25
G
JP4
24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1
1 1
Touch Pad Board
2 2
PSDAT330 PSCLK330
+5VS
C947
0.01U_0402_16V7K
3 3
KBA14 KBA13 KBA12 KBA11 KBA10
KBA9 KBA8 KBA7 KBA6
4 4
KBA5 KBA4 KBA3 KBA2 KBA1 KBA0
BIOS_RST#
Page 32
5
4
3
2
1
1
2
R307
+3VS
+3VS
12
R108 10K_0402_5%
12
1
C370
0.01U_0402_16V7K
2
FAN1SPD 30
+5VS
12
R627
D D
+3V
IAC_SDATO_MDC19
IAC_RST#_MDC19
C C
SMB_EC_DA230 SMB_EC_CK230
C
B
E3
1 3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35
SMB_EC_DA2 SMB_EC_CK2
2
JP8
MONO_OUT/PC_BEEP GND AUXA_RIGHT AUXA_LEFT CD_GND CD_RIGHT CD_LEFT GND
3.3Vaux GND
3.3Vmain AC97_SDATA_OUT AC97_RESET# GND AC97_MSTRCLK GND GND GND
MDC CONN.
ACES_88023-3010
U59
1
SDA
2
SCL
3
OS#
4
GND
LM75CIMMX-5_MSOP8
@
1
AUDIO_PWDN
MONO_PHONE
Bluetooth Enable
GND
USB Data+
USB Data-
PRIMARY DN
GND
AC97_SYNC AC97_SDATA_IN1 AC97_SDATA_IN0
GND
AC97_BITCLK
GND GND GND
8
VCC
7
A0
6
A1
5
A2
2 4 6 8 10
+5V
12 14
Definition
16 18
5Vd
20
+5VS
22 24 26 28 30 32 34 36
1 2
1
C926
0.1U_0402_16V4Z
2
R880 1K_0402_5% @
1 2
R629 0_0402_5%
1 2
12 @
2
@
1
@
2222 SYMBOL(SOT23-NEW)
B B
0_0402_5% @
C604 @
1 2
R628 10K_0402_5%
R77 0_0402_5%
R940 33_0402_5%
C944
22P_0402_50V8J
0.1U_0402_16V4Z
1 2
1 2
R7122_0402_5%
1 2
R7422_0402_5% @
+3V
IAC_SYNC_MDC 19 IAC_SDATAI2 19
IAC_BITCLK 19,27
EN_FAN130
R310
100K_0402_5%
1 2
C373
+12VWS
+IN
-IN
C371
1 2
R760
8
P
OUT G
4
12
H_THERMDA
H_THERMDC
+3V
U22A
1
LM358A_SO8
1
2
SMB_EC_CK2 SMB_EC_DA2
FAN1_ON
RB751V_SOD323
C122 2200P_0402_50V7K
R98
8.2K_0402_5%
2
1
G
3
D4
2 1
12
+5VS
12
R276 0_0805_5%
6
D
Q9
S
SI3456DV-T1_TSOP6
4 5
1
2
C366
22U_1206_10V4Z
12
R101
8.2K_0402_5%
FAN1_VOUT
1
2
U11
2
D+
3
ALERT#
D-
8
THERM#
SCLK
7
SDATA
ADM1032ARM_RM8
FAN1 Control and Tachometer
12
R291 0_0402_5% @
C368
1000P_0402_50V7K
H_THERMDA5
H_THERMDC5 SMB_EC_CK230 SMB_EC_DA230
FAN1VREF FAN1_VFB
1
2
1U_0603_10V4Z
R757
1 2
150K_0402_5%
3 2
2200P_0402_50V7K
100K_0402_5%
0.1U_0603_25V7M
1
VDD1
6 4 5
GND
10K_0402_5%
FAN1SPDC FAN1_VOUTC
JFAN1
1 2 3
4
G
5
G
MOLEX_53398-0371~N
FAN1
C114
FM2
FM3
@
@
1
CF5
CF7
@
@
1
CF19
CF9
@
@
1
CF17
CF15
@
@
A A
1
FM4
FM1
@
@
1
1
CF2
CF24
@
@
1
1
CF18
CF16
@
@
1
1
CF26
CF1
@
@
1
1
FM6
FM5
@
@
CF21 @
CF11 @
CF4 @
1
1
CF23 @
1
CF14 @
1
CF8 @
1
CF22
CF20
@
@
1
1
1
CF6
CF3
@
@
CF10 @
1
1
CF13
CF12 @
1
CF25
@
@
1
1
1
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2005/03/11 2006/03/11
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
星@, 06, 2006
薑三月
1
32 59
D
of
1
1
1
1
1
1
5
Page 33
A
+5VS
U20
1
GND
2
12
R292 100K_0402_5%
12
R43
@
100K_0402_5%
U29
1 2 3 4
TPS2061IDGN_MSOP8
12
R455 100K_0402_5%
3
3
2
2
3 4
1 2 3 4
GND IN IN EN#
@
@
1
C367
0.1U_0402_16V4Z
SUSP34
SUSP34
+5VS
SUSP34
2
+5VS
1
C45
0.1U_0402_16V4Z
2
1
C435
0.1U_0402_16V4Z
2
1 2
R762 0_0402_5%
1 2
R42 0_0402_5%
1 2
R456 0_0402_5%
L71
4
4
1
1
WCM2012F2S-900T04_0805
A
1 1
2 2
3 3
USBP1-20 USBP1+20
4 4
OUT
IN
OUT OUT
IN
OC#
EN#
TPS2061IDGN_MSOP8
U3
GND
OUT
IN
OUT OUT
IN
OC#
EN#
TPS2061IDGN_MSOP8
W=40mils
8
OUT
7
OUT
6
OUT
5
OC#
4
5
CH4 CH11Vn2CH2
+USB_AS
8 7 6 5
+USB_BS
8 7 6 5
R37 0_0402_5%
+USB_CS
C42 150U_D2_6.3VM
CON-USBP1­CON-USBP1+
6
D23
Vp
NUP4301MR6T1_TSOP6
CH3
3
B
W=40mils
OVCUR#0 20
W=40mils
R38 0_0402_5%
1 2
1 2
OVCUR#3 20
470P_0402_50V7K
1
+
2
B
12
R761 22K_0402_5%
13
D
Q47
S
2N7002_SOT23
OVCUR#2 20
OVCUR#1 20
12
R435 22K_0402_5%
13
D
2
G
Q15
S
2N7002_SOT23
+USB_BS
1
C31
2
JUSBP1
1 2 3 4
5 6 7
SUYIN_020173MR004S512ZL
2
G
SUSP
VCC D­D+ GND
GND1 GND2 GND3
C
3
2
WCM2012F2S-900T04_0805
SUSP
USBP0-20 USBP0+20
0.4--->0.5 Change USB ESD diode package Change D1,D5,D23,D24 package Remove 10P-NI C32,C33,C35,C36,C240,C251,C408,C409
12
R41 22K_0402_5%
13
D
S
SUSP
2
G
Q4 2N7002_SOT23
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/11 2006/03/11
C
USBP2-20
USBP2+20
USBP3-20
USBP3+20
Compal Secret Data
Deciphered Date
L69
4
1
WCM2012F2S-900T04_0805
3
2
WCM2012F2S-900T04_0805
D
470P_0402_50V7K
1
2
470P_0402_50V7K
1
1
2
2
470P_0402_50V7K
1
1
2
2
1
2
+USB_BS
C34
+USB_CS
C420
C331 150U_D2_6.3VM
L68
3
2
4
1
3
2
4
4
1
1
6
4
5
Vp
CH4 CH11Vn2CH2
3
150U_D2_6.3VM
3
3
2
2
L70
4
4
1
1
4
5
Vp
CH4 CH11Vn2CH2
150U_D2_6.3VM
4
5
Vp
CH4 CH11Vn2CH2
6
3
6
3
+
CON-USBP0­CON-USBP0+
D1 NUP4301MR6T1_TSOP6
CH3
+
C41
CON-USBP2­CON-USBP2+
D24 NUP4301MR6T1_TSOP6
CH3
+
C430
CON-USBP3­CON-USBP3+
D5 NUP4301MR6T1_TSOP6
CH3
E
+USB_AS
C307
1 2 3 4
5 6 7
SUYIN_2537A-04G5T
JUSBP2
1
VCC
2
D-
3
D+
4
GND
5
GND1
6
GND2
7
GND3
SUYIN_2537A-04G5T
JUSBP4
1
VCC
2
D-
3
D+
4
GND
5
GND1
6
GND2
7
GND3
SUYIN_020173MR004S512ZL
JUSBP3
VCC D­D+ GND
GND1 GND2 GND3
Compal Electronics, Inc.
Title
Size Document Number Rev
星期一
D
Date: Sheet
SCHEMATIC, M /B LA-2831
401362
, 06, 2006
三月
E
of
33 59
D
Page 34
5
4
3
2
1
+3VALW +3VS
Q19
8
S
D
7
S
D
6
S
D
1
C537
1
C532
2
2
22U_1206_10V4Z
22U_1206_10V4Z
D D
5
D
AO4422_SO8 C523 10U_1206_10V4Z
G
+3VALW to +3V Transfer
Q20
D D D D
AO4422_SO8
@
1
C557
2
10U_1206_10V4Z
RUNON
G
0.1U_0402_16V4Z
S S S
C556
1 2 3 4
+5VALW
0.1U_0402_16V4Z
@
1
2
1 2
8 7
R604 100K_0402_5%
R605 1M_0402_5%
D
Q32 2N7002_SOT23
S
6 5
C524 10U_1206_10V4Z
C559
C538
10U_1206_10V4Z
C C
B B
SUSP
C533
10U_1206_10V4Z
C558
10U_1206_10V4Z
B+_BIAS
12
13
2
G
+3VALW to +3VS Transfer
1 2
1 3 4
1 2
1
2
+3V+3VALW
1
C511
2
22U_1206_10V4Z
1 2
0_0402_5%
1
C907
@
0.1U_0402_16V4Z
2
C516
2
22U_1206_10V4Z
0_0402_5% C906
@
0.1U_0402_16V4Z
R831
R830
C509
0.1U_0402_16V4Z
RUNON
C510
0.1U_0402_16V7K
SUSON
+5VALW to +5VS Transfer
S S S G
+5VS
1 2
0.1U_0402_16V7K
3 4
C575
0.01U_0402_16V7K
C576
Q29 8 7 6 5
AO4422_SO8
R602
0_0402_5%
D D D D
R821
470_0402_5%
Q52
13
D
SUSP
2
2N7002_SOT23
G
S
VR_ON30,56
R822 470_0402_5%
13
D
Q53
SYSON#
2
2N7002_SOT23
G
S
SYSON30,51,54
@
10K_0402_5%
1
C577
2
R603
470_0402_5%
22U_1206_10V4Z
13
D
Q31
SUSP
2
G
2N7002_SOT23
S
+5VALW
C543
10U_1206_10V4Z
+3VALW +CPU_CORE
@
VR_ON
R977
C544
13
2
G
2
1 2
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
@
@
1
1
C545
2
2
R549 100K_0402_5%
D
Q25 2N7002_SOT23 @
S
2
G
3
D9 SM05_SOT23
@
B+_BIAS
12
13
SUSON
2
G
R539 47K_0402_5%
SYSON#
D
Q22 2N7002_SOT23
S
Q27 AO3400_SOT23
D
1 3
R557 330_0603_5% @
13
D
Q24 2N7002_SOT23 @
S
2
G
S
G
2
B+_BIAS
12
SUSON
13
D
S
10U_1206_10V4Z
R540 47K_0402_5%
Q23 2N7002_SOT23
R538 1M_0402_5%
C541
12
1
0.1U_0402_16V4Z
2
1
C517
0.01U_0402_16V7K
2
C540
+5VALW
12
R840 10K_0402_1%
R976
@
SUSON
@
2N7002_SOT23
SUSP
SUSP#
2
G
1 2
B+_BIAS B+_BIAS
12
2
@
1
@
13
D
2
G
Q56
S
13
D
Q54 2N7002_SOT23
S
R837
@
100K_0402_5%
G
2
R835 51K_0402_5%
Q51
@
NDS352AP P-CHANNEL_SOT23
S
D
1 3
1
C897
@
4.7U_1206_16V6K
2
SUSP33
SUSP#23,30,31,50,52,55
10K_0402_5%
+5V
C912
0.1U_0402_16V4Z
+1.5VS+1.5V
+1.8V
0.1U_0402_16V4Z
0.1U_0402_16V4Z @
@
1
C404
1
C402
2
2
C403
10U_1206_10V4Z
A A
RUNON
Q13 AO3400_SOT23
D
1 3
G
2
S
C407
10U_1206_10V4Z
1
C406
0.1U_0402_16V4Z
2
+1.8VS
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Q10
8
S
D
7
S
D
6
S
D
5
G
D
AO4422_SO8 C372 10U_1206_10V4Z
2005/03/11 2006/03/11
+1.5V to +1.5VS Transfer
1 2
1 3 4
C375
2
22U_1206_10V4Z 1 2
0_0402_5%
R313
C381
0.1U_0402_16V7K
Compal Secret Data
Deciphered Date
RUNON
C374
0.1U_0402_16V7K
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
星@, 06, 2006
薑三月
of
34 59
1
D
Page 35
5
+3VS
DCMD31
R4534.7K_0402_5% @
1 2
R4444.7K_0402_5% @
1 2
R4254.7K_0402_5% @
1 2
R4214.7K_0402_5%
1 2
R3994.7K_0402_5% @
T20
1 2
R3934.7K_0402_5% @
1 2
R4094.7K_0402_5% @
1 2
R3904.7K_0402_5% @
1 2
R3834.7K_0402_5% @
1 2
R3864.7K_0402_5% @
1 2
R4034.7K_0402_5%
1 2
R4184.7K_0402_5%
1 2
R4134.7K_0402_5% @
1 2
R4364.7K_0402_5% @
1 2
R4384.7K_0402_5%
1 2
R4404.7K_0402_5%
1 2
R3804.7K_0402_5% @
1 2
R3634.7K_0402_5% @
1 2
R3564.7K_0402_5% @
1 2
R3504.7K_0402_5% @
1 2
R3494.7K_0402_5% @
1 2
R3584.7K_0402_5% @
1 2
R3524.7K_0402_5%
1 2
R3514.7K_0402_5% @
1 2
R3594.7K_0402_5%
1 2
@
R3534.7K_0402_5%
1 2
@
R8974.7K_0402_5%
1 2
@
R8984.7K_0402_5% @
1 2
R8994.7K_0402_5%
1 2
@
R9004.7K_0402_5%
1 2
@
R9014.7K_0402_5%
1 2
@
R3704.7K_0402_5%
1 2
TP_EM_H20
D D
C C
B B
DCMD30 DCMD29 DCMD28 DCMD27 DCMD26 DCMD25 DCMD24 DCMD23 DCMD22 DCMD21 DCMD20 DCMD19 DCMD18 DCMD17 DCMD16 DCMD15 DCMD14 DCMD13 DCMD12 DCMD11 DCMD10 DCMD9 DCMD8 DCMD7 DCMD6 DCMD5 DCMD4 DCMD3 DCMD2 DCMD1
DCMD0
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
R454 4.7K_0402_5% R445 4.7K_0402_5% R426 4.7K_0402_5% R422 4.7K_0402_5%@ R400 4.7K_0402_5% R394 4.7K_0402_5% R410 4.7K_0402_5% R391 4.7K_0402_5% R384 4.7K_0402_5% R387 4.7K_0402_5% R404 4.7K_0402_5%@ R419 4.7K_0402_5%@ R414 4.7K_0402_5% R437 4.7K_0402_5% R439 4.7K_0402_5%@ R441 4.7K_0402_5%@ R381 4.7K_0402_5% R364 4.7K_0402_5% R375 4.7K_0402_5% R376 4.7K_0402_5% R365 4.7K_0402_5% R368 4.7K_0402_5% R367 4.7K_0402_5%@ R366 4.7K_0402_5% R377 4.7K_0402_5% R369 4.7K_0402_5% R357 4.7K_0402_5% R379 4.7K_0402_5% R355 4.7K_0402_5% R378 4.7K_0402_5% R354 4.7K_0402_5%
+3VS
DCMCLK37 DCMCAS37 DCMRAS37 DCMWE37 DCMCS37
DCDQM337 DCDQM237 DCDQM137 DCDQM037
DZF46
DAC_PDN46
R775 4.7K_0402_5%
1 2 1 2 1 2 1 2 1 2 1 2 1 2
EM_SCL46 EM_SDA46
VD_ACTIVE38
VD_AUDIO_SEL29
1 2
R458 4.7K_0402_5% R459 4.7K_0402_5% R776 4.7K_0402_5% R777 4.7K_0402_5% R460 4.7K_0402_5% R474 4.7K_0402_5% R475 4.7K_0402_5%
4
DCMA0 DCMA1 DCMA2 DCMA3 DCMA4 DCMA5 DCMA6 DCMA7 DCMA8 DCMA9 DCMA10 DCMA11
DCMD31 DCMD30 DCMD29 DCMD28 DCMD27 DCMD26 DCMD25 DCMD24 DCMD23 DCMD22 DCMD21 DCMD20 DCMD19 DCMD18 DCMD17 DCMD16 DCMD15 DCMD14 DCMD13 DCMD12 DCMD11 DCMD10 DCMD9 DCMD8 DCMD7 DCMD6 DCMD5 DCMD4 DCMD3 DCMD2 DCMD1 DCMD0
R373
1 2
47_0402_5%
DCMA[0..11] DCMD[0..31] AD[0..31]
EN_VD[0..7]
W8
Y6 Y5
W5
Y4
V6 W6 W7
V9 W9
Y9
V10
J20
K19 M19 M17 R20
T20
P17
T18 W20
V20 R18 N17
P20 M18
L20
K20
Y20
Y19
V17
V16 W16 U14 W15
Y15 U13
V14
Y16
V15
Y17 W17 W18 W19
Y18 W14 U12 W12
V11 U11 W13
Y10
V13
B10
B15 D14
B16
A17 G19
F20
J17 H20 H19 H17 G18
F19 E20 F18
C10
U28A
MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11
MD31 MD30 MD29 MD28 MD27 MD26 MD25 MD24 MD23 MD22 MD21 MD20 MD19 MD18 MD17 MD16 MD15 MD14 MD13 MD12 MD11 MD10
SDRAM INTERFACE
MD9 MD8 MD7 MD6 MD5 MD4 MD3 MD2 MD1 MD0
MCLK CAS RAS WE CS DQM3 DQM2 DQM1 DQM0
PIO14 PIO13 PIO12 PIO11 PIO10 PIO9 PIO8 PIO7
GPIO
PIO6 PIO5 PIO4 PIO3 PIO2 PIO1 PIO0 TEST
EM8475-LF_BGA328
AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10
AD9 AD8 AD7 AD6 AD5
PCI HOST INTERFACE
AD4 AD3 AD2 AD1 AD0
C/BE0# C/BE1# C/BE2# C/BE3#
STOP#
IDSEL
PAR
FRAME#
IRDY#
TRDY#
DEVSEL#
INTA#
RST#
PCICLK
GNT#
REQ#
ACLK/O1 SCOUT/O1 SCOUT/O2 SFOUT/O2
S/PDIFOUT
SDIN
DAMCK
DABCK
AUDIO I/O
DADAT
DALRK
CVBS SVidY/R/V CVBS/B/U SVidY/G/Y
COMP
VREF
RESET
ANALOG VIDEO
OUTPUT
B1 D3 C2 C1 D2 E3 D1 G4 F1 H4 G1 H2 J4 J3 J1 K3 P3 R2 P4 T2 U1 U2 V1 W1 V2 V3 W2 Y1 V4 W3 Y2 Y3
U3 N4 K4 E1
N2 G3 N3 L2 M1 M2 M4 C5 B3 A2 B2 C3
D20 E18 D19 C20 B20 D18 J19 J18 H18 G20
C14 A13 A14 B12 A11 C11 D11
DCMA[0..11]37
DCMD[0..31]37
PCI_AD[0..31]18,23,24,26
EN_VD[0..7]38
TP_EM_H20
3
CONNECT TO PCI BUS
PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0
T101
T100 T21 T103 T102
C447
0.01U_0402_16V7K
R472 68_0402_5%
1 2
R471 68_0402_5%
1 2
27MCLK147
PCI_C_BE0# 18, 23,24,26 PCI_C_BE1# 18, 23,24,26 PCI_C_BE2# 18, 23,24,26 PCI_C_BE3# 18, 23,24,26
PCI_STOP# 18,23,24,26 PCI_PAR 1 8 ,23,24,26
PCI_FRAME# 18, 23,24,26 PCI_IRDY# 18,23,24,26 PCI_T R D Y # 18,23,24,26 PCI_DEVSEL# 18, 23,24,26 PCI_PIRQC# 18 PCIRST# 18,2 0, 2 3,24,26,30,31,47
PCI_GNT4# 18 PCI_REQ4# 18
MCKO 46 ABCLK 46 ADATA 46 ALRCLK 46
+3VS
1 2
22P_0402_50V8J
1 2
2
C446
0.1U_0402_16V7K
1
12
R473
33_0402_5%
2
C448
1
R984 0_0402_5%
27MCLK1
PCI_AD22
R457 100_0402_5%
CLK_33M_LPCSIO2 47
CLK_33M_LPCSIO2
12
2
1
12
@ 33_0402_5% R920
@ 22P_0402_50V8J C940
U28B
Y11
H_DATA0
W10
H_DATA1
U10
H_DATA2
Y8
H_DATA3
Y7
H_DATA4
V8
H_DATA5
U8
H_DATA6
V7
H_DATA7
U7
H_DATA8
W4
H_DATA9
U6
H_DATA10
V5
H_DATA11
T3
H_DATA12
R4
H_DATA13
R3
H_DATA14
T1
H_DATA15
K1
H_ADDR0
K2
H_ADDR1
J2
H_ADDR2
H1
H_ADDR3
H3
H_ADDR4
G2
H_ADDR5
F2
H_ADDR6
F3
H_ADDR7
E2
H_ADDR8
L4
H_CS
L3
H_WAIT
N1
H_RD
M3
H_WR
R1
H_RESET
Y14
H_INT
P1
H_DIN0
P2
H_DIN1
L1
H_RDY
Y13
H_CLK
Y12
H_RDEN
W11
H_WREN
V12
H_WRWAIT
A7
GCLK
D4
N/C
D5
N/C
D6
N/C
D15
N/C
D16
N/C
E4
N/C
E11
N/C
E12
N/C
E13
N/C
E14
N/C
F4
N/C
F6
N/C
F7
N/C
F14
N/C
F15
N/C
F17
N/C
G6
N/C
G15
N/C
G17
N/C
H6
N/C
P6
N/C
P15
N/C
R6
N/C
R7
N/C
R15
N/C
T4
N/C
T5
N/C
T17
N/C
U4
N/C
U5
N/C
U15
N/C
U16
N/C
U17
N/C
EM8475-LF_BGA328
2
LOCAL BUS INTERFACE
DIGITAL I/O
HSYNC VSYNC
VVLD/HS
PCLK VCLK
V_D0 V_D1 V_D2 V_D3 V_D4 V_D5 V_D6 V_D7 V_D8
V_D9 V_D10 V_D11 V_D12 V_D13 V_D14 V_D15
V_DHS
V_DVS
V_DCLK
A19
P0
C17
P1
B18
P2
A18
P3
B17
P4
C16
P5
C15
P6
A16
P7
D10
P8
A9
P9
B9
P10
C9
P11
D8
P12
C7
P13
C6
P14
D7
P15
A8
P16
A6
P17
B6
P18
B5
P20
A5
P19
B4
P21
C4
P22
A1
P23
R469 47_0402_5%
A20
R470 47_0402_5%
B19 C18 A4 A3
R983
K17 K18 L19 L18 L17 M20 N20 N19 N18 P19 P18 R19 T19 U20 U19 R17 V19 U18 V18
CONNECT TO PW172A
EN_VD0B EN_VD1B EN_VD2B EN_VD3B EN_VD4B EN_VD5B EN_VD6B EN_VD7B
1 2 1 2
R982 33_0402_5%
1 2
0_0402_5%
EMVD0 EMVD1 EMVD2 EMVD3 EMVD4 EMVD5 EMVD6 EMVD7
12
0_0402_5%
R361
12
27MCLK3
EMVD[0..7]
1 2 1 2
12
0_0402_5%
R360
47_0402_5%
1 2
R374
1
EN_VD0B EN_VD2B EN_VD3B
47_0804_8P4R_5%
EN_VD4B EN_VD5B EN_VD6B EN_VD7B
47_0804_8P4R_5%
1 2
R919
R371 47_0402_5%@
R372 47_0402_5%@
+3VS
1 2
1 2
RP35
18 27 36 45
RP36
18 27 36 45
CONNECT TO PW172A
EN_VDHS 38 EN_VDVS 38
EN_VDCK0 38
27MCLK3 46,47
C939
33_0402_5%
10P_0402_50V8J
EMVD[0..7] 26
CONNECT TO TV BOARD
EMVDHS 26 EMVDVS 26
R967 820_0402_5%
EMVDCLK 26,47
R968 680_0402_5%
EN_VD0 EN_VD2 EN_VD3 EN_VD1EN_VD1B
EN_VD4 EN_VD5 EN_VD6 EN_VD7
12
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
, 06, 2006
三月
401362
1
星期一
of
35 59
D
Page 36
5
D D
+3VS
L32
C C
B B
1 2
BLM11A601S_0603
+3VS
+3VS_EMADD
C438
4
C835
3
U28C
D17
VDD33
E7
VDD33
E8
VDD33
E9
VDD33
E10
VDD33
E15
VDD33
E16
VDD33
E17
VDD33
M5
VDD33
N5
VDD33
P5
VDD33
R5
VDD33
R16
VDD33
T14
VDD33
T15
VDD33
T16
VDD33
E19
AVDD33
F5
VDD25
G5
VDD25
H5
VDD25
H16
VDD25
J5
VDD25
J16
VDD25
K16
VDD25
L16
VDD25
M16
VDD25
T8
VDD25
T9
VDD25
T10
VDD25
T11
VDD25
U9
VDD25
A12
AVDD25
B11
AVDD25
B14
AVDD25
C13
AVDD25
D12
AVDD25
D9
PLLVDD25
B8
PLLVDD25
EM8475-LF_BGA328
+2.5VS
L33
L34
0.1U_0402_16V7K
0.1U_0402_16V7K
1
C852
2
1
2
C834
100U_B2_6.3VM_R55
+2.5VS_EM
EM_VSS
+2.5VS_EMPLL
C853
1
+
2
1
2
C847
C854
C851
0.1U_0402_16V7K
C849
0.1U_0402_16V7K
1
2
+2.5VEMVDD
1
C838
2
0.1U_0402_16V7K
1
C445
2
0.1U_0402_16V7K
1
C449
2
0.1U_0402_16V7K
C848
0.1U_0402_16V7K
0.1U_0402_16V7K
1
1
C837
2
2
1
1
2
2
C836
0.1U_0402_16V7K
0.1U_0402_16V7K
1
1
0.1U_0402_16V7K
C452
0.1U_0402_16V7K
C451
2
0.1U_0402_16V7K
1
2
0.1U_0402_16V7K
2
1
2
0.1U_0402_16V7K
C437
+2.5VS
0.1U_0402_16V7K
1
1
C833
C850
2
2
1
100U_B2_6.3VM_R55
+
C832
2
1
1
10U_1206_10V4Z
2
2
0.1U_0402_16V7K
EM_VSS
1 2
BLM11A601S_0603
1 2
BLM11A601S_0603
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
POWER AND GROUD
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AVSS AVSS AVSS AVSS AVSS VSSA
B7 C8 E5 E6 F16 G16 J9 J10 J11 J12 K5 K9 K10 K11 K12 L5 L9 L10 L11 L12 M9 M10 M11 M12 N16 P16 T6 T7 T12 T13
A10 A15 B13 C12 D13 C19
2
EM_VSS
0_0603_5%
R907
12
EM_VSS
1
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc. SCHE MATIC, M/B LA-2831
星期一
, 06, 2006
三月
401362
1
of
36 59
D
Page 37
5
4
3
2
1
RP26
RP31
RP32
C840
DCMA2U
18
DCMA1U
27
DCMA0U
36
DCMA10U
45
DCMA3U DCMA4U DCMA5U
DCMA6U DCMA7U DCMA8U DCMA9U
+3VS
DCMCS35 DCMWE35 DCMCAS35 DCMRAS35
DCDQM035 DCDQM135 DCDQM235 DCDQM335
1
1
1
C841
C842
2
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
C843
DCMA11
1
1
C844
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
R429
1 2
R428 2.7K_0402_5%
1 2
R461 2.7K_0402_5%
1 2
R430 22_0402_5%
1 2
R433 22_0402_5%
1 2
R432 22_0402_5%
1 2
R431 22_0402_5%
1 2
R434 22_0402_5%
1 2
R462 22_0402_5%
1 2
R427 22_0402_5%
1 2
R463 22_0402_5%
1 2
C845
1
2
0.1U_0402_16V7K
C846
1
1
C839
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
C857
1
2
0.1U_0402_16V7K
DCMA0U DCMA1U DCMA2U DCMA3U DCMA4U DCMA5U DCMA6U DCMA7U DCMA8U DCMA9U DCMA10U
22_0402_5%
U30
25
A0
26
A1
27
A2
60
A3
61
A4
62
A5
63
A6
64
A7
65
A8
66
A9
24
A10
22
BA0
23
BA1
68
CLK
67
CKE
20
CS#
17
WE#
18
CAS#
19
RAS#
16
DQM0
71
DQM2
28
DQM3
59
DQM3
1
VDD
15
VDD
29
VDD
43
VDD
3
VDDQ
9
VDDQ
35
VDDQ
41
VDDQ
49
VDDQ
55
VDDQ
75
VDDQ
81
VDDQ
86
VSS
72
VSS
58
VSS
44
VSS
6
VSSQ
12
VSSQ
32
VSSQ
38
VSSQ
46
VSSQ
52
VSSQ
78
VSSQ
84
VSSQ
MT48LC2M32B2_TSOP86
DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ23 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10
DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
DCMD31U
56
DCMD30U
54
DCMD29U
53
DCMD28U
51
DCMD27U
50
DCMD26U
48
DCMD25U
47
DCMD24U
45
DCMD23U
42
DCMD22U
40
DCMD21U
39
DCMD20U
37
DCMD19U
36
DCMD18U
34
DCMD17U DCMD19U
33
DCMD16U
31
DCMD15U
85
DCMD14U
83
DCMD13U
82
DCMD12U
80
DCMD11U
79
DCMD10U
77
DCMD9U
76
DCMD8U
74
DCMD7U
13
DCMD6U
11
DCMD5U
10
DCMD4U
8
DCMD3U
7
DCMD2U
5
DCMD1U
4
DCMD0U
2
14
NC
21
NC
30
NC
57
NC
69
NC
70
NC
73
NC
DCMD9U
DCMD7U DCMD6U DCMD5U DCMD4U
DCMA[0..11]35
D D
DCMA[0..11]
DCMA2 DCMA1 DCMA0 DCMA10
22_0804_8P4R_5%
1 8
DCMA3
2 7
DCMA4
3 6
DCMA5
4 5
22_0804_8P4R_5%
DCMA6
1 8
DCMA7
2 7
DCMA8
3 6
DCMA9
4 5
22_0804_8P4R_5%
DCMCLK35
12
R476
33_0402_5%
C C
+3VS
L65
1 2
BLM11A601S
1
C860
2
0.1U_0402_16V7K
B B
+3VS_SDRAM
1
C859
2
22P_0402_50V8J
1
C855
2
10U_1206_10V4Z
0.1U_0402_16V7K
C450
C856
2
1
1
1
C858
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
RP30
DCMD28DCMD28U
18
DCMD29DCMD29U
27
DCMD30DCMD30U
36
DCMD31DCMD31U
22_0804_8P4R_5%
22_0804_8P4R_5%
DCMD22U DCMD21U DCMD20U
DCMD18U DCMD17U DCMD16U
22_0804_8P4R_5%
RP33
DCMD8U
DCMD10U DCMD10 DCMD11U DCMD11
DCMD3U DCMD2U DCMD1U DCMD0U
45
RP29
18 27 36 45
RP24
1 8 2 7 3 6 4 5
22_0804_8P4R_5%
RP25
1 8 2 7 3 6 4 5
22_0804_8P4R_5%
RP34
18 27 36 45
18 27 36 45
22_0804_8P4R_5%
RP27
1 8 2 7 3 6 4 5
22_0804_8P4R_5%
RP28
1 8 2 7 3 6 4 5
22_0804_8P4R_5%
DCMD24DCMD24U DCMD25DCMD25U DCMD26DCMD26U DCMD27DCMD27U
DCMD23DCMD23U DCMD22 DCMD21 DCMD20
DCMD19 DCMD18 DCMD17 DCMD16
DCMD12DCMD12U DCMD13DCMD13U DCMD14DCMD14U DCMD15DCMD15U
DCMD8 DCMD9
DCMD7 DCMD6 DCMD5 DCMD4
DCMD3
DCMD2
DCMD1
DCMD0
DCMD[0..31]
DCMD[0..31] 35
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
, 06, 2006
三月
401362
37 59
1
星期一
D
of
Page 38
5
4
3
2
1
BUTTON_Bri_D BUTTON_Bri_U BUTTON_Visual
BUTTON_Bri_D BUTTON_Bri_U
BUTTON_Visual
T10 T17
T14 T11
T16 T12
T15
CONNECT TO GPIO (adjust)
UART_Tx UART_Rx
1 2
R902
10K_0402_5%@
12
R152
0_0402_5%
C230 18P_0402_50V8J
FPGA_UNLOCK 43 FPGA_DONE 43
SDO 43
SDI 43 SCK 43 SEN 43
VD_ACTIVE 35
FPGA_PDOWN 43 FPGA_XRSTI 43
NVRAM_SDA 39 NVRAM_SCL 39
PANEL_VCC_EN 30 BL_EN 30 Visual_Out 30
R769
1 2
0_0603_5%
UART_Tx 43 UART_Rx 43
+3VS
1 2 1 2 1 2
R205
C258
R985 0_0402_5%
R986 0_0402_5%
12
2
1
EN_VDVS35 EN_VDHS35
12
GCLK42,43
D D
C C
EN_VDCK035
B B
GEN42,43 GVS42,43 GHS42,43
33_0402_5%
22P_0402_50V8J
U51A
12
A10
GCLK
B9
GPEN
A9
GVS
C10
GHS
B10
GSOG
A11
GFBK
D2
GRE7
D3
GRE6
C1
GRE5
C2
GRE4
F4
GRE3
B1
GRE2
C3
GRE1
E4
GRE0
B7
GGE7
A7
GGE6
C8
GGE5
B8
GGE4
A8
GGE3
B11
GGE2
B12
GGE1
C11
GGE0
A15
GBE7
A16
GBE6
A17
GBE5
B16
GBE4
A19
GBE3
B17
GBE2
A20
GBE1
B18
GBE0
A4
GRO7
C6
GRO6
B5
GRO5
D7
GRO4
A5
GRO3
B6
GRO2
C7
GRO1
A6
GRO0
A12
GGO7
B13
GGO6
C12
GGO5
A13
GGO4
B14
GGO3
A14
GGO2
B15
GGO1
C13
GGO0
D14
GBO7
C15
GBO6
C16
GBO5
E16
GBO4
B19
GBO3
C17
GBO2
E17
GBO1
C18
GBO0
D10
GREF
C14
GBLKSPL
A18
GCOAST
C9
GHSFOUT
E1
VCLK
E3
VVS
F3
VHS
D1
FIELD
N2
VPEN
G1
VR7
H2
VR6
H3
VR5
G2
VR4
G3
VR3
F2
VR2
F1
VR1
E2
VR0
PW172A-10VL_PBGA_352P~N
PW172A
GRAPHIC PORT
VIDEO PORT
E20
DBO0
E19
DBO1
E18
DBO2
F17
DBO3
D20
DBO4
D19
DBO5
D16
DBO6
D17
DBO7
H18
DGO0
H17
DGO1
G20
DGO2
G19
DGO3
G18
DGO4
F20
DGO5
F19
DGO6
F18
DGO7
K19
DRO0
K20
DRO1
K18
DRO2
J20
DRO3
J18
DRO4
J19
DRO5
H20
DRO6
H19
DRO7
M17
DBE0
N20
DBE1
M20
DBE2
L17
DBE3
M19
DBE4
K17
DBE5
L19
DBE6
L20
DBE7
T19
DGE0
T20
DGE1
R19
DGE2
R20
DGE3
M18
DGE4
P18
DGE5
P19
DGE6
DISPLAY PORT
DGE7 DRE0
DRE1 DRE2 DRE3 DRE4 DRE5 DRE6 DRE7
DEN DHS DVS
DCLK
DCKEXT
VB0 VB1 VB2 VB3 VB4 VB5 VB6 VB7
VG0 VG1 VG2 VG3 VG4 VG5 VG6 VG7
P20 V19
Y20 R16 U19 R18 W20 V20 U20
R750 47_0402_5%
N19
R203 47_0402_5%
D18
R723 47_0402_5%
C20
R223 47_0402_5%
J17 D6
L2 L1 L3 L4 M3 M1 N1 M2
J4 H1 J3 J2 J1 K3 K2 K1
DDEB0 DDEB1 DDEB2 DDEB3 DDEB4 DDEB5 DDEB6 DDEB7
DDEG0 DDEG1 DDEG2 DDEG3 DDEG4 DDEG5 DDEG6 DDEG7
DDER0 DDER1 DDER2 DDER3 DDER4 DDER5 DDER6 DDER7
EN_VD0 EN_VD1 EN_VD2 EN_VD3 EN_VD4 EN_VD5 EN_VD6 EN_VD7
DDEB[0:7] DDEG[0:7] DDER[0:7]
1 2 1 2 1 2 1 2
ROMOE40 ROMWE40
EN_VD[0..7]
FMA[0:19]40
FMD[0:15]40
DDEB[0:7] 43 DDEG[0:7] 43 DDER[0:7] 43
+3VS
R767
EN_VD[0..7] 35
R768
10K_0402_5%
1 2
DEN 43 DHS 43 DVS 43 DCLK 43
FMA[0:19]
FMD[0:15]
1 2
10K_0402_5%
U51B
FMA19
P3
FMA18 FMA17 FMA16 FMA15 FMA14 FMA13 FMA12 FMA11 FMA10 FMA9 FMA8 FMA7 FMA6 FMA5 FMA4 FMA3 FMA2 FMA1 FMA0
FMD15 FMD14 FMD13 FMD12 FMD11 FMD10 FMD9 FMD8 FMD7 FMD6 FMD5 FMD4 FMD3 FMD2 FMD1 FMD0
TERD41 TEWR41 TEBHE41
TECS41 TEINT41
A19
R1
A18
R2
A17
PW172A
A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
RD WR BHEN
ROMOE ROMWE
RAMOE RAMWE
CS1 CS0
EXTINT NMI
PW172A-10VL_PBGA_352P~N
Y10 V10
W12
U10
W10
T1
U1
T2 R3 P4 V1 R4
W1
U2 V2
T3
W2
Y1 U3 V3
T4 U4
U6 U7 V6
Y6
W6
V7 U8
W7
V8
W8
Y8 V9
W9
Y9
W3
Y3
V5
W4 W5
Y5
Y4 V4
MICROPROCESSOR
MISCELLANEOUS
MICROPROCESSOR DEBUG PORT
PERIPHERAL
X'TAL
T17
PORTC0
V16
PORTC1
W16
PORTC2
Y16
PORTC3
V17
PORTC4
U17
PORTC5
W17
PORTC6
Y17
PORTC7
R17
PORTB0
W18
PORTB1
V18
PORTB2
Y18
PORTB3
U18
PORTB4
Y19
PORTB5
W19
PORTB6
T18
PORTB7
V13
PORTA0
W13
PORTA1
Y13
PORTA2
Y14
PORTA3
W14
PORTA4
Y15
PORTA5
W15
PORTA6
V15
PORTA7
U15
ADR24B
E5
MCKEXT
Y11
RESET
V12
TXD
Y12
RXD
V11
IRRCVR0
W11
IRRCVR1
U16
MODE0
N4
MODE1
T5
MODE2
P2
MODE3
C5
XO
A3
XI
R147 1M_0402_5%
1 2
Y2
12
14.318MHZ_16P_6X C231 18P_0402_50V8J
R766 R751 R752
BUTTON_Bri_D 30 BUTTON_Bri_U 30 BUTTON_Visual 30
PAD-OPEN 2x2m
J4
@
2 1
R763
1 2
10K_0402_5%
10K_0402_5% 10K_0402_5% 10K_0402_5%
Connect to Button board
H_RESET 41,47
+3VS
R772
12
1K_0402_5%
+3VS
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
SCHE MATIC, M/B LA-2831
, 06, 2006
三月
401362
星期一
1
of
38 59
D
Page 39
5
4
3
2
1
+1.5VS
L54
1 2
D D
FBMA-L11-321611_1206
1
C800
2
0.1U_0402_16V7K
C C
B B
A A
+1.5VS_PW
1
C306
C284
2
100P_0402_50V8J
1
2
C756
1 4 3
12
C963
0.01U_0402_25V7Z
1
1
C317
2
2
0.1U_0402_16V7K
1
C311
C290
2
4.7U_0805_10V4Z~N 100P_0402_50V8J
U66
IN BYP SHDN
G914E_SOT23-5
1
C348
2
0.1U_0402_16V7K
+2.5VS_172
1
C802
2
1
2
0.1U_0402_16V7K
OUT
GND
C297
1
C288
C287
2
0.1U_0402_16V7K
0.1U_0402_16V7K
L60
1 2
BLM11A601S_0603
0.1U_0402_16V7K
1
1
C351
2
2
0.1U_0402_16V7K
+3VS
C818
0.1U_0402_16V7K
5
2
1
2
+2.5VS_PW
C332
0.1U_0402_16V7K
0.1U_0402_16V7K
1
2
12
1
2
C799
4.7U_0805_10V4Z~N
+3VS
L51
1 2
BLM11A601S_0603
1
C753
2
0.1U_0402_16V7K~N
0.4--->0.5 Improve power sequence Add C962,C963,C964,U66
+3VS +2.5VS_172
C962
4.7U_0805_6.3V6K
+3VS_PW
12
5
1
1
C356
C326
2
2
0.1U_0402_16V7K
1
2
C807
1
C325
2
0.1U_0402_16V7K
0.1U_0402_16V7K
8 7 1
2 3
AT24C32AN-10SU-2.7
C964
4.7U_0805_6.3V6K
4
1
C343
2
0.1U_0402_16V7K
1
C361
2
4.7U_0805_10V4Z~N
1
C333
C291
2
0.1U_0402_16V7K
U52
VCC
SDA
WP
SCL A0 A1 A2
GND
C342
0.1U_0402_16V7K
100P_0402_50V8J
1
2
0.1U_0402_16V7K
5 6
4
C357
C353
1
2
+3VS
1
C289
2
0.1U_0402_16V7K
1
2
0.1U_0402_16V7K
1
C359
2
0.1U_0402_16V7K
12
R765
3.3K_0402_5%
1
1
C354
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
1
C360
2
0.1U_0402_16V7K
1
1
C301
C352
2
0.1U_0402_16V7K
2
0.1U_0402_16V7K
0.1U_0402_16V7K
NVRAM_SDA 38
NVRAM_SCL 38
1
C355
2
0.1U_0402_16V7K
C293
0.1U_0402_16V7K
+3VS
12
3.3K_0402_5%
0.1U_0402_16V7K
C363
1
2
R764
1
C312
2
0.1U_0402_16V7K
1
2
0.1U_0402_16V7K
C302
0.1U_0402_16V7K
1
2
0.1U_0402_16V7K
1
C362
2
1
C292
2
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
U51C
E7
VDD1.5V
E9
VDD1.5V
E10
VDD1.5V
E11
VDD1.5V
E12
VDD1.5V
E13
VDD1.5V
E14
VDD1.5V
E15
VDD1.5V
F16
VDD1.5V
H5
VDD1.5V
H16
VDD1.5V
J5
VDD1.5V
K5
VDD1.5V
K16
VDD1.5V
L5
VDD1.5V
N5
VDD1.5V
N6
VDD1.5V
N15
VDD1.5V
N16
VDD1.5V
P5
VDD1.5V
P6
VDD1.5V
P15
VDD1.5V
P16
VDD1.5V
R13
VDD1.5V
R14
VDD1.5V
R15
VDD1.5V
T6
VDD1.5V
T7
VDD1.5V
T9
VDD1.5V
T10
VDD1.5V
T11
VDD1.5V
T12
VDD1.5V
T13
VDD1.5V
T14
VDD1.5V
T15
VDD1.5V
A2
VDD2.5
T16
VDD2.5
U5
VDD2.5
U9
VDD2.5
U11
VDD2.5
U13
VDD2.5
E6
VDD3.3
E8
VDD3.3
F5
VDD3.3
F6
VDD3.3
F7
VDD3.3
F14
VDD3.3
F15
VDD3.3
G5
VDD3.3
G6
VDD3.3
G15
VDD3.3
G16
VDD3.3
J16
VDD3.3
L16
VDD3.3
M5
VDD3.3
M16
VDD3.3
R6
VDD3.3
R7
VDD3.3
R8
VDD3.3
T8
VDD3.3
PW172A-10VL_PBGA_352P~N
Compal Secret Data
Deciphered Date
PW172A
2
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VDD1.5VP VDD1.5VP
CPUTDI CPUTDO CPUTMS CPUTCK
A1 B2 B3 D4 D5 D8 D9 D11 D12 D13 D15 G4 G17 H4 H8 H9 H10 H11 H12 H13 J8 J9 J10 J11 J12 J13 K4 K8 K9 K10 K11 K12 K13 L8 L9 L10 L11 L12 L13 L18 M8 M9 M10 M11 M12 M13 N8 N9 N10 N11 N12 N13 N17 N18 P17 R5 U12 U14 Y7
B4 C4
B20
NC
C19
NC
V14
NC
M4 N3 P1 Y2
1
C232
2
0.1U_0402_16V7K
0.1U_0402_16V7K
1
C254
2
FBMA-L11-321611_1206
+1.5VS_PW_VP
1
1
C269
2
2
C226
100P_0402_50V8J
L24
1 2
4.7U_0805_10V4Z~N
+1.5VS
C213
1
0.1U_0402_16V7K~N
2
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
SCHEMATIC, M/B LA-2831
, 06, 2006
三月
401362
星期一
1
of
39 59
D
Page 40
5
4
3
2
1
FMA[0..19]38
D D
C C
FMA[0..19]
FMA0 TEA0 FMA1 FMA2 FMA3
FMA4 FMA5 FMA6 FMA7 TEA7
FMA12 TEA12
FMA11
FMA10
FMA9
FMA16 FMA15 FMA14 FMA13 TEA13
FMA17 FMA19 FMA18 TEA18
FMA8
47_0804_8P4R_5%
4 5 3 6 2 7 1 8
RP54 47_0804_8P4R_5%
4 5 3 6 2 7 1 8
RP55 RP57
1 8 2 7 3 6 4 5
47_0804_8P4R_5%
RP58
1 8 2 7 3 6 4 5
47_0804_8P4R_5% RP56
1 8 2 7 3 6 4 5
47_0804_8P4R_5%
+3VS
J3 PA D-OPEN 2x2m@
2 1
1 2
TEA0 41
TEA1 TEA2 TEA3
TEA4 TEA5 TEA6
TEA11 TEA10 TEA9
TEA16 TEA15 TEA14
TEA17 TEA19
TEA8
R703 3.3K_0402_5%
TEA[1..7] TED[0..15]
ROMOE38
ROMWE38
TEA[1..7] 41 TED[0..15] 41
TEA1 TEA2 TEA3 TEA4 TEA5 TEA6
TEA8 TEA9 TEA10 TEA11 TEA12 TEA13 TEA14 TEA15 TEA16 TEA17 TEA18 TEA19
U49
25
A0
24 23 22 21 20 19 18
8 7 6 5 4 3 2
1 48 17 16
9 10
26 28 11 15 14 47
DQ0
A1
DQ1
A2
DQ2
A3
DQ3
A4
DQ4
A5
DQ5
A6
DQ6
A7
DQ7
A8
DQ8
A9
DQ9
A10
DQ10
A11
DQ11
A12
DQ12
A13
DQ13
A14
DQ14
A15
DQ15/A-1 A16 A17 A18
RESET# A21 A20
VDD CE# OE# WE#
VSS
A19
VSS WP# VIO
ACC
AM29LV641DL90REI_TSOP48
29 31 33 35 38 40 42 44 30 32 34 36 39 41 43 45
12
37
27 46
13
TED0 TED1 TED2 TED3 TED4 TED5 TED6TEA7 TED7 TED8 TED9 TED10 TED11 TED12 TED13 TED14 TED15
R685 3.3K_0402_5%
1 2
RP46
TED9
1 8
TED1 FMD1
2 7
TED8
3 6
TED0
4 5
TED13
1 8
TED5
2 7
TED12
3 6
TED4
4 5
TED11
1 8
TED3 FMD3
2 7
TED10
3 6
TED2
4 5
TED15
1 8
TED7
2 7
TED14
3 6
TED6 FMD6
4 5
C168
FMD9 FMD8
FMD0 47_0804_8P4R_5% RP48
FMD13 FMD5 FMD12 FMD4
47_0804_8P4R_5% RP47
FMD11 FMD10
FMD2 47_0804_8P4R_5%
RP49
FMD15 FMD7 FMD14
47_0804_8P4R_5%
L21
1 2
1
BLM11A601S
0.1U_0402_16V7K
2
+3VS
1
2
FMD[0..15]
+3VS
C169
0.1U_0402_16V7K
FMD[0..15] 38
+3VS
JP3
ROMWE38
R256
+3VS
@
FMA19 FMA8 FMA6 FMA4 FMA2
B B
3.3K_0402_5%
A A
FMA1 FMD0
FMD1 FMD2 FMD3
FMD12 FMD13 FMD14 FMD15
FMA15 FMA13 FMA11 FMA9
R262 22_0402_5%@ R266 22_0402_5%@ R271 22_0402_5%@ R274 22_0402_5%@ R278 22_0402_5%@
R167 22_0402_5%@ R176 22_0402_5%@
R184 22_0402_5%@ R197 22_0402_5%@ R204 22_0402_5%@
R209 22_0402_5%@ R213 22_0402_5%@ R215 22_0402_5%@ R221 22_0402_5%@
R233 22_0402_5%@ R235 22_0402_5%@ R241 22_0402_5%@ R248 22_0402_5%@
1 2 1 2 1 2 1 2 1 2
1 2 1 2
1 2 1 2 1 2 1 2
1 2 1 2 1 2 1 2
1 2 1 2 1 2 1 2
R163 22_0402_5%@
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
@
2 4 6
8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50
ACES_87216-5002
1
1
2
3
3
4
5
5
6
7
7
8
9
9
10
11
11
12
13
13
14
15
15
16
17
17
18
19
19
20
21
21
22
23
23
24
25
25
26
27
27
28
29
29
30
31
31
32
33
33
34
35
35
36
37
37
38
39
39
40
41
41
42
43
43
44
45
45
46
47
47
48
49
49
50
Compal Secret Data
Deciphered Date
R155 22@
1 2
R162 22_0402_5%@
1 2
R166 22_0402_5%@
1 2
R175 22_0402_5%@
1 2
R183 22_0402_5%@
1 2
R191 22_0402_5%@
1 2
R201 22_0402_5%@
1 2
R206 22_0402_5%@
1 2
R210 22_0402_5%@
1 2
R214 22_0402_5%@
1 2
R217 22_0402_5%@
1 2
R224 22_0402_5%@
1 2
R234 22_0402_5%@
1 2
R238 22_0402_5%@
1 2
R245 22_0402_5%@
1 2
R261 22_0402_5%@
1 2
R265 22_0402_5%@
1 2
R270 22_0402_5%@
1 2
R273 22_0402_5%@
1 2
FMD8 FMD9 FMD10 FMD11 FMD4 FMD5 FMD6 FMD7
FMA17 FMA16 FMA14 FMA12 FMA10
FMA18
FMA7 FMA5 FMA3
2
ROMWE 38
ROMOE 38
R150
@
1 2
J1
@
PAD-OPEN 2x2m
3.3K_0402_5%
2 1
R255 3.3K_0402_5%@
1 2
Compal Electronics, Inc.
Title
SCHE MATIC, M/B LA-2831
Size Document Number Rev
星期一
Date: Sheet
, 06, 2006
三月
401362
1
of
40 59
D
Page 41
5
4
3
2
+3VS
1
D D
C C
B B
TED[0..15]40
TEA[0..7]40
+3VS
+3VS
TED[0..15]
TEA[0..7]
TECS38 TEWR38 TERD38
TEBHE38
TEINT38
R208 10K_0402_5% R207 10K_0402_5% R212 10K_0402_5%
1 2 1 2 1 2
1 2
R137
3.3K_0402_5%
TED15 TED14 TED13 TED12 TED11 TED10 TED9 TED8 TED7 TED6 TED5 TED4 TED3 TED2 TED1 TED0
TEA7 TEA6 TEA5 TEA4 TEA3 TEA2 TEA1 TEA0
R192
1 2
0_0402_5%
U16A
124
SD15
125
SD14
128
SD13
129
SD12
130
SD11
131
SD10
132
SD9
133
SD8
134
SD7
135
SD6
136
SD5
137
SD4
139
SD3
140
SD2
141
SD1
142
SD0
5
#SCS
6
#SWR
7
#SRD
10
SA7
11
SA6
12
SA5
13
SA4
14
SA3
15
SA2
16
SA1
17
SA0
27
#SBHE
2
#SINT
3
SDREQ
28
SDACK
51
HD15
52
HD14
53
HD13
56
HD12
57
HD11
58
HD10
59
HD9
60
HD8
61
HD7
62
HD6
63
HD5
64
HD4
67
HD3
68
HD2
69
HD1
70
HD0
31
#HCS
32
#HWR
33
#HRD
35
HA8
36
HA7
37
HA6
38
HA5
39
HA4
40
HA3
41
HA2
42
HA1
TE7782_LQFP_144
SBUS HBUS
UP8 UP7 UP6 UP5 UP4 UP3 UP2 UP1
RMIN
DRVDP
USBSENSE
#INVALID
WAKEUP
P38 P37 P36 P35 P34 P33 P32 P31
P28 P27 P26 P25 P24 P23 P22 P21
P18 P17 P16 P15 P14 P13 P12 P11
Extension I/O USB
HDACK
HDREQ
#HINT
123 122 121 120 119 118 115 114
46 34 25
R178 27_0402_5%
22
DN
R179 27_0402_5%
20
DP
44 113
112 111 110 109 108 107 106 105
104 103 100 99 98 97 96 95
94 93 92 89 88 87 85 83
82
P8
80
P7
79
P6
78
P5
77
P4
76
P3
75
P2
74
P1
43 72
71
R1009 0_0402_5% @
0_0402_5%
R1010
1 2 1 2
R240
1 2
10K_0402_5%
T74 T75 T76 T77 T78 T81 T82 T83
T86 T85 T87 T88 T89 T90 T91 T92
T93 T94 T95 T96 T98 T97 T99
R239
+3VS
1 2
12
+3VS
+3VS
1 2
1.5K_0402_5% R264
1 2
+3VS
0_0402_5%
C171
USBP5+
USBP5+
C323
C170
C777
0.1U_0402_16V4Z~N
0.1U_0402_16V4Z~N
USBP5- 20 USBP5+ 20
C324
C322
0.1U_0402_16V4Z~N
0.1U_0402_16V4Z~N
C760
C238
0.1U_0402_16V4Z~N
0.1U_0402_16V4Z~N
C219
C207
0.1U_0402_16V4Z~N
0.1U_0402_16V4Z~N
C755
0.1U_0402_16V4Z~N
0.1U_0402_16V4Z~N
C252
0.1U_0402_16V4Z~N
0.1U_0402_16V4Z~N
U16B
1
VDD
18
VDD
24
VDD
48
VDD
54
VDD
65
VDD
73
VDD
84
VDD
90
VDD
101
VDD
116
VDD
126
VDD
9
VSS
19
VSS
30
VSS
45
VSS
47
VSS
49
VSS
50
VSS
55
VSS
66
VSS
81
VSS
86
VSS
91
VSS
102
VSS
117
VSS
127
VSS
138
VSS
TE7782_LQFP_144
21
N.C
23
N.C
VDD VSS
RST
UBUSS
ABUSS
MODE1 MODE0
MCLK
8
26 4
144 143
TECLK
29
R193
1 2
10K_0402_5% R143
1 2
10K_0402_5%
R682
1 2
0_0402_5% R683
1 2
0_0402_5%
12
R202 33_0402_5%
H_RESET 38,47
+3VS
TECLK 47
2
C278 22P_0402_50V8J
1
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/11 2006/03/11
3
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA -2831
401362
星期一
, 06, 2006
三月
1
of
41 59
D
Page 42
5
4
3
2
1
D D
LVDS_A0+10
LVDS_A0-10 LVDS_A1+10
LVDS_A1-10 LVDS_A2+10
LVDS_A2-10
C C
B B
LVDS_AC+10
LVDS_AC-10
CONNECT TO I915GM-LVDSout
LVDS_A0+N
LVDS_A0-N LVDS_A1+N
LVDS_A1-N LVDS_A2+N
LVDS_A2-N
LVDS_AC+N
LVDS_AC-N
+3VS
1 2
BLM11A601S_0603
L56
C796
0.1U_0402_16V7K
LVDSVCC
1
2
12
12
12
12
R754 0_0402_5%
1 2
+3VS
+3VS
R260 100_0402_5%
R259 100_0402_5%
R258 100_0402_5%
R257 100_0402_5%
L61
1 2
BLM11A601S_0603
L55
1 2
BLM11A601S_0603
1
C816
2
0.1U_0402_16V7K
LVD_VSS
0.1U_0402_16V7K C815
0_0603_5%
U21
10
RA+
9
LVDS DATA IN
RA-
12
RB+
11
RB-
16
RC+
15
RC-
20
RD+
19
RD-
18
RCLK+
LVDS
17
CLK-IN
RCLK-
25
1
0.1U_0402_16V7K C814
2
C795
1
0.1U_0402_16V7K C813
2
1
2
LVD_VSS
LVD_VSS
R908
12
1
0.1U_0402_16V7K
2
LVDSVCC
/PDWN
56
VCC
48
VCC
40
VCC
31
VCC
23
PLLVCC
13
LVDSVCC
52
GND
44
GND
36 28
21 14
24 22
GNDVCC
GND GND
4
GND LVDSGND
LVDSGND
8
LVDSGND PLLGND
PLLGND
THC63LVDF84B_TSSOP56
PIXEL
LVDS DATA OUT
CLKOUT
CLK-OUT
RA6 RA5 RA4 RA3 RA2 RA1 RA0
RB6 RB5 RB4 RB3 RB2 RB1 RB0
RC6 RC5 RC4 RC3 RC2 RC1 RC0
RD6 RD5 RD4 RD3 RD2 RD1 RD0
GGE0R
37
GRE5R
35
GRE4R
33
GRE3R
32
GRE2R
30
GRE1R
GBE1R GBE0R GGE5R GGE4R GGE3R GGE2R GGE1R
GENR GVSR GHSR GBE5R GBE4R GBE3R GBE2R
22_0402_5%
1 2
R252
22_0402_5%
1 2
R253
1 2
22_0402_5%
R311
GRE0GRE0R
GBE4
GRE0 43
GBE4 43
GCLKGCL KR
GCLK 38,43
22_0804_8P4R_5%
29 27
51 47 46 45 43 39 38
6 5 3 1 55 54 53
2 50 49 42 41 34 7
26
RP20
18
GRE5R GGE0R GGE0 GGE1R
22_0804_8P4R_5%
GRE4R GRE4
22_0804_8P4R_5%
22_0804_8P4R_5% 22_0804_8P4R_5%
GBE3R GBE2R GBE1R GBE1
GBE5R GHSR GVSR GENR
GRE5
27 36
GGE1
45
45
GRE3GRE3R
36
GRE2GRE2R
27
GRE1GRE1R
18
RP19
45
GBE0GBE0R
36
GGE5GGE5R
27
GGE4GGE4R
18
RP22 RP21
GGE2GGE2R
18 27 36
GGE3GGE3R
45
GBE3
45
GBE2
36 27 18
RP23
22_0804_8P4R_5%
GBE5
4 5
GHS
3 6
GVS
2 7
GEN
1 8
RP18
GRE5 43 GGE0 43 GGE1 43
GRE4 43
GRE3 43
GRE2 43
GRE1 43
GBE0 43 GGE5 43 GGE4 43
GGE2 43
GGE3 43
GBE3 43 GBE2 43 GBE1 43
GBE5 43
GHS 38,43 GVS 38,43
GEN 38,43
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/11 2006/03/11
3
Compal Secret Data
Deciphered Date
2
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA -2831
Size Document Number Rev
Date: Sheet
星期一
401362
, 06, 2006
三月
1
of
42 59
D
Page 43
5
U10A
R987 0_0402_5%
GVS38,42 GHS38,42 GEN38,42
GBE042 GBE142 GBE242 GBE342 GBE442 GBE542
GGE042 GGE142 GGE242 GGE342 GGE442 GGE542
GRE042 GRE142 GRE242 GRE342 GRE442 GRE542
@
R119
12
330_0402_5%
RP11 1 8 2 7 3 6 4 5
47_0804_8P4R_5%
RP10 1 8 2 7 3 6 4 5
47_0804_8P4R_5%
RP9 1 8 2 7 3 6 4 5
47_0804_8P4R_5%
RP7 1 8 2 7 3 6 4 5
47_0804_8P4R_5%
RP6 1 8 2 7 3 6 4 5
47_0804_8P4R_5%
RP5 1 8 2 7 3 6 4 5
47_0804_8P4R_5%
1
C216
C215
2
GCLK
R988 33_0402_5%
DVS38 DHS38 DEN38
DDEB3CDDEB3 DDEB0CDDEB0 DDEB2CDDEB2 DDEB1CDDEB1
DDEB7CDDEB7
DDEB4CDDEB4
DDEG2CDDEG2 DDEG3CDDEG3 DDEG0C DDEG1C
DDEG5C DDEG6C DDEG7C DDEG4CDDEG4
DDER1CDDER1 DDER3CDDER3 DDER2CDDER2 DDER0CDDER0
DDER5CDDER5 DDER7CDDER7 DDER4CDDER4 DDER6CDDER6
1
0.1U_0402_16V7K
2
5
GCLK38,42
D D
GCLK
12
R548
@
33_0402_5%
2
C547
@
22P_0402_50V8J
1
DCLK38
C176
C C
B B
+3VS
A A
@
1 2
22P_0402_50V8J
DDEB338 DDEB038 DDEB238 DDEB138
DDEB738 DDEB638 DDEB538 DDEB438
DDEG238 DDEG338 DDEG038 DDEG138
DDEG538 DDEG638 DDEG738 DDEG438
DDER138 DDER338 DDER238 DDER038
DDER538 DDER738 DDER438 DDER638
L23
1 2
BLM11A601S_0603
0.1U_0402_16V7K
DDEB6 DDEB6C DDEB5 DDEB5C
DDEG0 DDEG1
DDEG5 DDEG6 DDEG7
12
N6 M6
T14 T13 R13 P13 T12 R12 P12 N12 R11 P11 N11 T10 R10 P10 N10 M10
R7 P7 N7 M7 R6 P6
12
P8 K4 K5
DDEB0C
R5
DDEB1C
P5
DDEB2C
N5 DDEB3C DDEB4C
R4 DDEB5C DDEB6C
R3 DDEB7C
R1
DDEG0C
P1
DDEG1C
P2
DDEG2C
N1
DDEG3C
N2
DDEG4C
N3
DDEG5C
M1
DDEG6C
M2
DDEG7C
M3
DDER0C
M4
DDER1C DDER2C DDER3C DDER4C DDER5C DDER6C
K2
DDER7C
K3
R142 0_0402_5%
12
@
T9
DVIRCLK DRVSYNCN DRHSYNCN
T5
DRENBI
DDRGBDI0 DDRGBDI1 DDRGBDI2 DDRGBDI3 DDRGBDI4 DDRGBDI5 DDRGBDI6 DDRGBDI7 DDRGBDI8 DDRGBDI9 DDRGBDI10 DDRGBDI11 DDRGBDI12 DDRGBDI13 DDRGBDI14 DDRGBDI15
T8
DDRGBDI16
T7
DDRGBDI17 DDRGBDI18 DDRGBDI19 DDRGBDI20 DDRGBDI21 DDRGBDI22 DDRGBDI23
SVIRCLK SRVSYNCN SRHSYNCN
J3
SRENBI
SRRGBDI0 SRRGBDI1 SRRGBDI2
T4
SRRGBDI3 SRRGBDI4
T3
SRRGBDI5 SRRGBDI6 SRRGBDI7 SRRGBDI8 SRRGBDI9 SRRGBDI10 SRRGBDI11 SRRGBDI12 SRRGBDI13 SRRGBDI14 SRRGBDI15 SRRGBDI16
L2
SRRGBDI17
L3
SRRGBDI18
L4
SRRGBDI19
L5
SRRGBDI20
J4
SRRGBDI21 SRRGBDI22 SRRGBDI23
Chromakey_FPGA
X2
4
VDD
1
OE
133MHZ_4P
0.4--->0.5 FOR EMI Improve Remove R121 33 ohm 0402 5% Add R998,C961
R120
3
OUT
10_0402_5%
2
GND
C161
2
1
4
CLK133M
22P_0402_50V8J
4
12
R998
33_0402_5%
1
C961 10P_0402_50V8J
2
DDR_ADR[0..11]45
DDR_ADR3 DDR_ADR2 DDR_ADR1 DDR_ADR0
DDR_ADR7 DDR_ADR6 DDR_ADR4 DDR_ADR5
10_0804_8P4R_5%
DDR_ADR11 DDR_ADR10 DDR_ADR9 DDR_ADR8
10_0804_8P4R_5%
+3VS
1
C75
0.1U_0402_16V7K
2
TDI TMS TCK
GCLK
22P_0402_50V8J
close to U10.R9
RP8 1 8 2 7 3 6 4 5
10_0804_8P4R_5%
RP4
18 27 36 45
RP3
18 27 36 45
+2.5VS
C955
12
3
DDR_ADR[0..11]
DDR_CK45 DDR_CKB45 DDR_CKE45
0.1U_0402_16V7K
U5
20
VCCJ
19
VCCO
18
VCCINT
4
TDI
5
TMS
6
TCK
2
NC
9
OE/xRESET
NC
12
NC
14
NC
15
NC
16
NC
11
GND
XCF02S
R989 820_0402_5%
R990
@
680_0402_5%
DDR_BA045 DDR_BA145
DDR_XCS045 DDR_XRAS45 DDR_XCAS45 DDR_XWE45
4.7K_0402_5%
4.7K_0402_5%
TDO
xCF
xCEO
xCE
CLK
DO
+3VS
R124
17 7 13 10 3 8 1
R66 10K_0402_5%
1 2
HSWAP_EN
R65 0_0402_5% @
DDR_ADR3C DDR_ADR2C DDR_ADR1C DDR_ADR0C
DDR_ADR7C DDR_ADR6C DDR_ADR4C DDR_ADR5C
DDR_ADR11C DDR_ADR10C DDR_ADR9C DDR_ADR8C
1
C44
2
+3VS
1 2
1 2
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
R104 R88 R70
R91 R97
4.7K_0402_5%
TDO TMS TCK
R123
R122
FPGA_XRSTI38
FPGA_PDOWN38 FPGA_UNLOCK38
SCK38 SEN38 SDI38 SDO38
2005/03/11 2006/03/11
33_0402_5% 33_0402_5% 10_0402_5%
10_0402_5% 10_0402_5%
DDR_ADR0C DDR_ADR1C DDR_ADR2C DDR_ADR3C DDR_ADR4C DDR_ADR5C DDR_ADR6C DDR_ADR7C DDR_ADR8C DDR_ADR9C DDR_ADR10C DDR_ADR11C
R100 10_0402_5% R85
10_0402_5%
R79
10_0402_5%
R75
10_0402_5%
TP_A2
CLK133M
HSWAP_EN
TP_T15 TP_M11
FPGA_DONE 38
TP_A2 TP_T15 TP_M11
Compal Secret Data
U10B
H15
DDR_CK
G16
DDR_CKB
D11
DDR_CKE
G15
DDR_BA0
G14
DDR_BA1
H14
DDR_ADR0
H13
DDR_ADR1
P16
DDR_ADR2
R16
DDR_ADR3
A14
DDR_ADR4
B14
DDR_ADR5
B13
DDR_ADR6
A12
DDR_ADR7
B12
DDR_ADR8
C12
DDR_ADR9
B11
DDR_ADR10
C11
DDR_ADR11
G13
DDR_XCS0
F15
DDR_XRAS
F14
DDR_XCAS
C16
DDR_XWE
A2
TDI
A15
TDO
C13
TMS
C14
TCK
E1
XRSTI
R9
CLK133M
D3
PDOWN
C3
DCMOK
C2
SCK
C1
SEN
D1
SDI
D2
SDO
B3
PROG_B
C4
HSWAP_EN
P3
M0
T2
M1
P4
M2
R14
DONE
T15
CCLK
N9
INIT
M11
DINT
P9
DOUT
A5
NC
D8
NC
N8
GCLK2
D9
GCLK4
C9
GCLK5
A8
GCLK6
B8
GCLK7
Chromakey_FPGA
T26 T60 T54
Deciphered Date
2
10_0402_5%
E11
DDR_DQM
47_0402_5%
N16
DDR_DQS0 DDR_DQS1 DDR_DQS2
DDR_DQ0 DDR_DQ1 DDR_DQ2 DDR_DQ3 DDR_DQ4 DDR_DQ5 DDR_DQ6 DDR_DQ7 DDR_DQ8
DDR_DQ9 DDR_DQ10 DDR_DQ11 DDR_DQ12 DDR_DQ13 DDR_DQ14 DDR_DQ15 DDR_DQ16 DDR_DQ17 DDR_DQ18 DDR_DQ19 DDR_DQ20 DDR_DQ21 DDR_DQ22 DDR_DQ23
TX_N0 TX_N1 TX_N2 TX_N3
TXCLK_P
TXCLK_N
T_CLK
T_DEN
T_RGB0 T_RGB1 T_RGB2 T_RGB3 T_RGB4 T_RGB5 T_RGB6 T_RGB7 T_RGB8
T_RGB9 T_RGB10 T_RGB11 T_RGB12 T_RGB13 T_RGB14 T_RGB15 T_RGB16 T_RGB17 T_RGB18 T_RGB19 T_RGB20 T_RGB21 T_RGB22 T_RGB23
2
TX_P0 TX_P1 TX_P2 TX_P3
T_VS
T_HS
UART_Tx38
UART_Rx38
K15 D15
M13 L13 M15 M16 M14 N14 P14 P15 J13 J14 K12 K13 K14 K16 L14 L15 C15 D14 E16 E15 E14 E13 F13 F12
D6 E6 B6 C6 B5 C5 A4 B4
B7 C7
K1 E7 D7 B1
J2 J1 H4 H3 H1 G5 G4 G3 G2 G1 F5 F4 F3 F2 E4 E3 E2 E10 D10 C10 B10 A7 A9 B16
47_0402_5% 47_0402_5%
DDR_DQ0C DDR_DQ1C DDR_DQ2C DDR_DQ3C DDR_DQ4C DDR_DQ5C DDR_DQ6C
DDR_DQ7C DDR_DQ8C DDR_DQ9C DDR_DQ10C DDR_DQ11C DDR_DQ12C DDR_DQ13C DDR_DQ14C DDR_DQ15C DDR_DQ16C DDR_DQ17C DDR_DQ18C DDR_DQ19C DDR_DQ20C DDR_DQ21C DDR_DQ22C DDR_DQ23C
R72
DDR_DQM 45
R109
T52 T37 T33 T32
T51 T53 T56 T50 T47 T57 T46 T44 T45 T49 T48 T28 T30 T27 T29 T31 T25 T43 T36 T38 T41 T40 T39 T42
R44
UART_Tx UART_Rx
+2.5VS
Title
SCHEMATIC, M/B LA-2831
Size Document Number Re v
Date: Sheet
DDR_DQS0 45
R106
DDR_DQS1 45
R78
DDR_DQS2 45
TX_A0+ 15 TX_A0- 15 TX_A1+ 15 TX_A1- 15 TX_A2+ 15 TX_A2- 15 TX_A3+ 15 TX_A3- 15
TX_AC+ 15 TX_AC- 15
CONNECT TO LVDS PANEL
+3VS
R47
1 2
10K_0402_5%
1 2
R45 0_0402_5%
10K_0402_5%
R46 0_0402_5%
TDO TDI TMS TCK
Compal Electronics, Inc.
401362
, 06
星期一 三月
, 2006
12 12
1
DDR_DQ4C DDR_DQ2C DDR_DQ3C DDR_DQ1C
DDR_DQ0C DDR_DQ6C DDR_DQ7C DDR_DQ5C
47_0804_8P4R_5%
DDR_DQ11C DDR_DQ9C DDR_DQ10C DDR_DQ8C
DDR_DQ15C DDR_DQ14C DDR_DQ13C DDR_DQ12C
47_0804_8P4R_5%
DDR_DQ19C DDR_DQ18C DDR_DQ17C DDR_DQ16C
DDR_DQ23C DDR_DQ22C DDR_DQ21C DDR_DQ20C
TP_A2
1
DDR_DQ[0..23] 45
RP44
DDR_DQ4
1 8
DDR_DQ2
2 7
DDR_DQ3
3 6
DDR_DQ1
4 5
47_0804_8P4R_5% RP45
DDR_DQ0
1 8
DDR_DQ6
2 7
DDR_DQ7
3 6
DDR_DQ5
4 5
RP42
DDR_DQ11
1 8
DDR_DQ9
2 7
DDR_DQ10
3 6
DDR_DQ8
4 5
47_0804_8P4R_5% RP43
DDR_DQ15
1 8
DDR_DQ14
2 7
DDR_DQ13
3 6
DDR_DQ12
4 5
RP40
DDR_DQ19
1 8
DDR_DQ18
2 7
DDR_DQ17
3 6
DDR_DQ16
4 5
47_0804_8P4R_5% RP41
DDR_DQ23
1 8
DDR_DQ22
2 7
DDR_DQ21
3 6
DDR_DQ20
4 5
47_0804_8P4R_5%
+5VS
JP1
ACES_85201-1005 @
43 59
1 2 3 4 5 6 7 8 9 10
D
of
Page 44
5
0.4-->0.5 change L22,L12,L11 package from 0603 to 0805
+2.5VS
D D
C C
C202
10U_0805_10V4Z~N
+3VS
1
2
B B
1
1
C193
2
2
+1.2VS
L11
1 2
KC FBM_L11-201209-601LMT 0805
KC FBM_L11-201209-601LMT 0805
1
C78
C77
2
10U_0805_10V4Z~N
L22
1 2
KC FBM_L11-201209-601LMT 0805
0.1U_0402_10V6K
1
C64
C63
2
10U_0805_10V4Z~N
+2.5VS_CHR
L14
1 2
0.1U_0402_10V6K
+2.5VS_CH
L12
1 2
KC FBM_L11-201209-601LMT 0805
1
2
0.1U_0402_10V6K
+3VS_CH
0.1U_0402_10V6K
0.1U_0402_10V6K
+1.2VS_CH
C654
C80
C621
0.1U_0402_10V6K
C83
0.1U_0402_10V6K
4
0.1U_0402_10V6K
0.1U_0402_10V6K
C618
0.1U_0402_10V6K
C678
0.1U_0402_10V6K
C124
C627
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
C162
C160
C73
C76
C614
0.1U_0402_10V6K
C645
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K C617
C626
0.1U_0402_10V6K
0.1U_0402_10V6K
C666
C649
0.1U_0402_10V6K
0.1U_0402_10V6K
DDR_VREF45
0.1U_0402_10V6K
0.1U_0402_10V6K
C68
0.1U_0402_10V6K
C683
0.1U_0402_10V6K
C69
0.1U_0402_10V6K
C88
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
C62
C95
C67
C629
0.1U_0402_10V6K
C109
C677
0.1U_0402_10V6K
C615
0.1U_0402_10V6K
C658
0.1U_0402_10V6K
0.1U_0402_10V6K C84
C608
0.1U_0402_10V6K
3
U10C
A6
VCCAUX
A11
T11
D13 E12 M12 N13
G11 H11 H12
K11
A10 A13
D16 G12 H16
N15
VCCAUX
F1
VCCAUX
F16
VCCAUX
L1
VCCAUX
L16
VCCAUX
T6
VCCAUX VCCAUX
D4
VCCINT VCCINT
E5
VCCINT VCCINT
M5
VCCINT VCCINT
N4
VCCINT VCCINT
E8
VCC_0
F7
VCC_0
F8
VCC_0
E9
VCC_1
F9
VCC_1
F10
VCC_1 VCC_2
VCC_2 VCC_2
J11
VCC_3
J12
VCC_3 VCC_3
L9
VCC_4
L10
VCC_4
M9
VCC_4
L7
VCC_5
L8
VCC_5
M8
VCC_5
J5
VCC_6
J6
VCC_6
K6
VCC_6
G6
VCC_7
H5
VCC_7
H6
VCC_7
A3
VREF_0a
C8
VREF_0b
D5
VREF_0c VREF_1a
VREF_1b VREF_2a
VREF_2b VREF_2c
J16
VREF_3a
L12
VREF_3b VREF_3c
0.1U_0402_10V6K C128
C611
0.1U_0402_10V6K
C643
C665
C631
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
C676
C662
0.1U_0402_10V6K
0.1U_0402_10V6K
C664
C667
0.1U_0402_10V6K
C622
0.1U_0402_10V6K
2
A1
GND
A16
GND
B2
GND
B9
GND
B15
GND
F6
GND
F11
GND
G7
GND
G8
GND
G9
GND
G10
GND
H2
GND
H7
GND
H8
GND
H9
GND
H10
GND
J7
GND
J8
GND
J9
GND
J10
GND
J15
GND
K7
GND
K8
GND
K9
GND
K10
GND
L6
GND
L11
GND
R2
GND
R8
GND
R15
GND
T1
GND
T16
GND
1
Chromakey_FPGA
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/11 2006/03/11
3
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA -2831
401362
星期一
, 06, 2006
三月
1
of
44 59
D
Page 45
5
D D
4
3
2
1
U13
DDR_ADR043 DDR_ADR143 DDR_ADR243 DDR_ADR343 DDR_ADR443 DDR_ADR543
DDR_ADR843 DDR_ADR943 DDR_ADR1043 DDR_ADR1143
DDR_BA043 DDR_BA143
DDR_XCS043 DDR_XRAS43 DDR_XCAS43 DDR_XWE43
C C
DDR_CKB43 DDR_CK43 DDR_CKE43
DDR_DQM43
R59
330_0603_5%
DDR_CKB DDR_CK
DDR_CKBDDR_CK
DDR_VREF
Near U13
B B
29
A0
30
A1
31
A2
32
A3
35
A4
36
A5
37
A6
38
A7
39
A8
40
A9
28
A10(AP)
41
A11
26
BA0
27
BA1
24
/CS
23
/RAS
22
/CAS
21
/WE
47
UDM
20
LDM
46
/CK
45
CK
44
CKE
49
VREF
1
VDD
18
VDD
33
VDD
34
VSS
48
VSS
66
VSS
EDD1216AATA_TSOP66
DQ15 DQ14 DQ13 DQ12 DQ11 DQ10
DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
UDQS
LDQS
VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ
65 63 62 60 59 57 56 54 13 11 10 8 7 5 4 2
51 16
53
NC
50
NC NC NC NC NC NC NC
43 42 25 19 17 14
3 9 15 55 61
6 12 52 58 64
R890 0_0402_5%
DDR_DQ[0..15] 43
DDR_DQ15 DDR_DQ14 DDR_DQ13 DDR_DQ12 DDR_DQ11 DDR_DQ10
DDR_DQ9 DDR_DQ7
DDR_DQ6 DDR_DQ5 DDR_DQ4 DDR_DQ3 DDR_DQ2 DDR_DQ1 DDR_DQ0
DDR_DQS1 43 DDR_DQS2 43 DDR_DQS0 43
12
@
C167
C181
1
1
1
2
2
10U_0805_10V4Z~N
0.1U_0402_10V7K
1
1
2
2
2
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
DDR_CKB43 DDR_CK43 DDR_CKE43
L20
+2.5VS_DR
1 2
BLM11A601S_0603
C186
C180
1
1
2
2
0.1U_0402_10V7K
0.1U_0402_10V7K
C116
C187
C179
1
1
2
2
0.1U_0402_10V7K
0.1U_0402_10V7K
+2.5VS
C182
C115
DDR_CKB DDR_CK
330_0603_5%
12
R95 10K_0402_1%
DDR_VREF
12
R94 10K_0402_1%
DDR_CKB DDR_CK
+2.5VS
R58
Near U7
DDR_ADR043 DDR_ADR143 DDR_ADR243 DDR_ADR343 DDR_ADR443 DDR_ADR543 DDR_ADR643 DDR_ADR743DDR_ADR643 DDR_ADR843DDR_ADR743 DDR_ADR943 DDR_ADR1043 DDR_ADR1143
DDR_BA043 DDR_BA143
DDR_XCS043 DDR_XRAS43 DDR_XCAS43 DDR_XWE43 DDR_DQM43
DDR_VREF 44
DDR_VREF
U7
29
A0
30
A1
31
A2
32
A3
35
A4
36
A5
37
A6
38
A7
39
A8
40
A9
28
A10(AP)
41
A11
26
BA0
27
BA1
24
/CS
23
/RAS
22
/CAS
21
/WE
47
UDM
20
LDM
46
/CK
45
CK
44
CKE
49
VREF
1
VDD
18
VDD
33
VDD
34
VSS
48
VSS
66
VSS
EDD1216AATA_TSOP66
DQ15 DQ14 DQ13 DQ12 DQ11 DQ10
DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
UDQS
LDQS
VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ
65 63 62 60 59 57 56 54 13 11 10 8 7 5 4 2
51 16
53
NC
50
NC
43
NC
42
NC
25
NC
19
NC
17
NC
14
NC
3 9 15 55 61
6 12 52 58 64
1 8 2 7 3 6 4 5
DDR_DQ23DDR_DQ8 DDR_DQ22 DDR_DQ21 DDR_DQ20 DDR_DQ19 DDR_DQ18 DDR_DQ17 DDR_DQ16
R57
R889 0_0402_5%
RP1
10K_0804_8P4R_5%
10K_0402_5%
1 2
12
@
C59
C58
C57
C108
1
1
1
1
2
2
2
2
10U_0805_10V4Z~N
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
RP2
1 8 2 7 3 6 4 5
10K_0804_8P4R_5%
+2.5VS
DDR_DQ[16..23]
C106
C111
C110
1
1
1
2
2
2
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
C112
1
2
0.1U_0402_10V7K
+2.5VS_DR
C107
1
2
0.1U_0402_10V7K
DDR_DQ[16..23] 43
L10
1 2
BLM11A601S_0603
+2.5VS
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/11 2006/03/11
3
Compal Secret Data
Deciphered Date
2
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA -2831
Size Document Number Rev
Date: Sheet
星期一
401362
, 06, 2006
三月
1
of
45 59
D
Page 46
5
4
3
2
1
H35
H26 HOLEA@
H34 HOLEA@
1
1
D HOLEC354D197BR354I237P2
H22 HOLEA@
D D
1
TV MODULE
C C
U23
2
NC
27MCLK335,47
1 2
0_0402_5%
1
C808
2
ABCLK35 ADATA35 ALRCLK35
EM_SCL35 EM_SDA35
+3VS
C365
0.1U_0402_16V7K
12
R290
33_0402_5%
2
C369
22P_0402_50V8J
B B
1
+3VS
DAC_PDN35
PDN_MUTE28
R1000
+3VS
L28
1 2
BLM11A601S_0603
0.1U_0402_16V7K
5
MCKI
6
BICK
7
SDTI
8
LRCK
9
PDN
11
SCL/CCLK
12
SDA/CDTI
10
CSN
14
TTL
15
I2C
22
AVDD
3
DVDD
4
DVSS
21
AVSS
AK4363VF_VSOP24
1
2
AOUTR
AOUTL
MCKO
VCOM
DZF
CAD1 CAD0
TST
FLT
18 19
1
20
24
23
17 16
13
H4
H41 HOLEA@
1
E HOLEC315D126BR354X354I166P2
H10 HOLEA@
1
H8
HOLEA
1
R277
1 2
47_0402_5%
12
1
C806
0.22U_0402_10V4Z
2
HOLEA@
1
H18 HOLEA@
1
H7
HOLEA
1
C329
C330
DZF 35
0.1U_0402_16V7K
R755
5.1K_0402_5%
HOLEA@
1
H17 HOLEA@
1
H25
HOLEA
1
1 2
2.2U_1206_25VFZ
1 2
2.2U_1206_25VFZ
1
C810
2
H1
H5
H2 HOLEA@
1
H21 HOLEA@
1
H24
HOLEA
1
AOUTR_AK
AOUTL_AK
MCKO 35
1
C809 10U_0805_10V4Z
2
HOLEA@
1
H14
H27
HOLEA@
HOLEA@
1
F HOLEC276D126I166P2
MDC
R225
9.1K_0603_5%
R226
9.1K_0603_5%
HOLEA@
1
H15 HOLEA@
1
1 2
1 2
H23 HOLEA@
1
CONNECT TO AD1981-AUXin
1
H9
HOLEA
1
H11 HOLEA@
H36 HOLEA@
1
1
CPU
AMP_VREF28,29
H33
H30
HOLEA@
HOLEA@
1
H32 HOLEA@
1
B H_C354D236
H12 HOLEA@
1
AMP_VREF
1
H29 HOLEA@
1
H19 HOLEA@
1
AMP_VREF
H39 HOLEA@
1
H13 HOLEA@
R188
R744
H40 HOLEA@
1
H38 HOLEA@
1
1
1 2
9.1K_0603_5%
1 2
9.1K_0603_5%
H20 HOLEA@
H31 HOLEA@
1
H6 HOLEA@
1
1
3 2
1 2
15K_0603_5%
5 6
1 2
15K_0603_5%
H28 HOLEA@
+VDDA
+IN
-IN
R198
1 2
+IN
-IN
R734
1 2
1
H43 HOLEA@
8
4
P
OUT
G
OUT
H3 HOLEA@
1
H42 HOLEA@
1
1
U17A
1
LMV358A_SO8
C945 220P_0402_25V8J
U17B
7
LMV358A_SO8
C946 220P_0402_25V8J
AOUTR 29
AOUTL 29
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/11 2006/03/11
3
Compal Secret Data
Deciphered Date
2
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA -2831
Size Document Number Rev
Date: Sheet
星期一
401362
, 06, 2006
三月
1
of
46 59
D
Page 47
5
4
3
2
1
R168
2
G
2N7002_SOT23
1 2
BLM11A601S_0603
1
2
+3VS
L31
12
10K_0402_5%
13
D
Q8
S
R161
100_0402_5%
X5
4
VDD
1
OE
1
27MHZ_15P
C421
2
0.1U_0402_16V7K
OUT
GND
1
C227
2
3 2
0.1U_0402_16V7K
R397
1 2
0_0402_5%
JROMP1
2 1
ACES_86841-0200
27MCLKX
0_0402_5% @
27MCLKX
C412
0.1U_0402_16V7K
H_RESET 38,41
R974
1
@
2
10U_0805_10V4Z~N
27MCLKX_B
12
EMVDCLK26,35
+3VS
EMVDCLK
1
C431
0.1U_0402_16V7K
2
CLK_48M_CBUF17
+3VS
1 2
1 2
CLK_33M_LPCSIO17
1
C428
2
R969 820_0402_5%
100_0402_5%
1 2
R970
R971 680_0402_5%
27MCLKX
SN74LVC125APWLE_TSSOP14
27MCLKX_B
SN74LVC125APWLE_TSSOP14
SN74LVC125APWLE_TSSOP14
SN74LVC125APWLE_TSSOP14
1
14
U27A
P
3
OE#
I2O
G
7
4
U27B
6
OE#
I5O
10
U27C
8
OE#
I9O
13
U27D
11
OE#
I12O
R406
1 2
22_0402_5%
R405
1 2
22_0402_5%
R442
1 2
22_0402_5%
R443
1 2
22_0402_5%
27MCLK1 35
C411 10P_0402_50V8J~N
TECLK 41
C410 10P_0402_50V8J~N
27MCLK3 35,46
C432 10P_0402_50V8J~N
CLK_33M_LPCSIO2 35
C433 10P_0402_50V8J~N
D D
PCIRST#18,20,23,24,26,30,31,35
C C
+3VS
C424
10U_0805_10V4Z~N
B B
CLK_48M_CBUF
12
R921
@
33_0402_5%
2
C941
@
22P_0402_50V8J
A A
5
1
EMVDCLK
12
R922 180_0402_5%
2
C942
1
4.7P_0402_50V8C
4
CLK_33M_LPCSIO
12
R923
@
33_0402_5%
2
C943
@
22P_0402_50V8J
1
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/11 2006/03/11
3
Compal Secret Data
Deciphered Date
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA -2831
Size Document Number Rev
2
Date: Sheet
星期一
401362
, 06, 2006
三月
1
47 59
D
of
Page 48
5
4
3
2
1
PJP1
4
4
3
D D
C C
3
2
1
SINGA_2WA-8291T041
2
1
MAINPWRON19,50,51
ACON49
PF1
10A_65VDC_451010
47K_0402_1%
PD2
2 3
RB715F_SOT323
Precharge detector
ACIN
P1
P1 BATT++
21
12
VL
12
PR8
1
12
PC9
0.1U_0603_25V7K
FBMA-L11-322513-151LMA50T_1210
12
PC4
100P_0402_50V8J~N
715K_0402_1%
1000P_0402_50V7K~N
PR6
1
PC3
PL1
1 2
12
VS
8
PU1A
P
+
O
-
G
LM393DG_SO8
4
3.3V
12
3 2
Min. typ. Max.
H-->L 13.604V 13.975V 14.340V
B B
L-->H 15.832V 16.248V 16.660V
Precharge detector
BATT
PC5
100P_0402_50V8J~N
12
PR14 121K_0402_1%
PRG++
13
D
PQ1
2
G
2N7002-7-F_SOT23-3
S
VIN
12
PC6 1000P_0402_50V7K~N
B+
12
12
13
PR9 332K_0402_1%
PR13 464K_0402_1%
220K_0402_5%
PR18
PQ2 DTC115EUA_SC70
2
12
PC8 1000P_0402_50V7K~N
12
+5VALWP
PACIN 49,51
Min. typ. Max. H-->L 4.818V 4.921V 5.019V L-->H 7. 045V 7.194V 7.338V
12
PC167 1000P_0402_50V7K~N
BATT+
PL2
FBMA-L18-453215-900LMA90T_1812
BATT+
1 2
12
PC1
0.01U_0402_25V7K~N
PJPB1 battery connector
SMART
Battery:
1.BAT+
2.BAT+
3.ID
4.B/I
5.TS
6.SMD
7.SMC
8.GND
9.GND
PC11
12
SUYIN_200275MR009G154ZL_RV
10
GND
11
GND
VIN
12
PR16
82.5K_0402_1%
12
12
PR20
19.6K_0402_1%
0.047U_0402_16V4Z~N
PR201
10K_0402_5%
PC2 1000P_0402_50V7K~N
12
BATT+ BATT+
SMD
SMC GND­GND-
PJP18
ID
B/I
TS
PC166
12
12
2200P_0402_50V7K~N
12
BATT++
1 2
1K_0402_5%
3 4 5 6 7 8 9
PR200
100K_0402_5%
PR19
22K_0402_1%
1 2
PC12 1000P_0402_50V7K~N
21
PF2 15A_65VDC_451015
PR3
12
PC7
0.1U_0402_16V7K~N
@
1 2
5
+
6
-
PR22
1 2
3.3V
10K_0402_5%
Place clsoe to EC pin
1 2
1K_0402_5%
1 2
1 2
PR5
100_0402_5%
1 2
PR7
100_0402_5%
PR10
4.7K_0402_5%@
1 2
PR11 1M_0402_1%
1 2
12
PC10
8
PU1B
P
0.01U_0402_25V7K~N
7
O
G
LM393DG_SO8
4
RTCVREF 50,51
BATT_TEMP
PR2
PR4
6.49K_0402_1%
PC185
0.1U_0402_16V7K~N
1 2
@
+3VALWP
SMB_EC_DA1 30,31
SMB_EC_CK1 30,31
VINVS
12
PR17
10K_0402_5%
12
PD3
MMPZ5229BPT_SC76
BATT_TEMP 30,49
PR12 10K_0402_5%
1 2
12
PR21 100K_0402_5%
12
PR15 33K_0402_5%
ACIN 20,30
PACIN 49,51
ACIN detector
Min. typ. Max. H-->L 16.648V 16.926V 17.390V L-->H 17.442V 17.914V 18.397V
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2005/03/11 2006/03/11
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
星@, 06, 2006
薑三月
1
48 59
D
of
Page 49
5
4
3
2
1
P2
PQ4
AO4407L_SO8~N
PD8
RB751V_SOD323
1 2
PD4
RB751V_SOD323
1 2
PR32
47K_0402_5%
1 2
8
D
7
D
6
D
5
D
VIN
12
PR24
4.7K_0805_5%
D D
ACON48
ACOFF#
ACOFF#
PACIN48,51
1
S
2
S
3
S
G
4
2
PC18 470P_0402_50V8J~N
1 2
@
12
12
13
1 2 3
PR25 39K_0402_5%
PR28 10K_0402_5%
PQ7 DTC115EUA_SC70
PQ5
AO4413L_SO8~N
S S S
G
4
8
D
7
D
6
D
5
D
ADP_I30
12
Adaptor I limit: 3.72A (4A*93%)
C C
D.A.C.A. (C.P.) on 60W adaptor: Take PR41= 10K
3.72A*0.015*20 = 5*PR41/(PR41+PR40)<> PR40<>34.8KK
IREF30
IREF=1.0288*Icharge IREF=0.6V~2.9V=0.6A~2.8A
12
PC171
PR209
1 2
143K_0402_1%
PR212
100K_0402_1%
PR204
0.1U_0402_16V7K~N
12
Iadp=0~4A(75W @19V)
12
PR203
1500P_0402_50V7K
34.8K _0402_1%
10K_0402_1%
12
PC173
0.1U_0402_16V7K~N
12
PC177
0.1U_0402_16V7K~N
1 2
1 2
100K_0402_1%
PC170
PR210
10K_0402_5%
PR23
0.015_2512_1% 4 3
PR202
12
PR205
1 2
10K_0402_5%
PR207
PC174
1 2
1000P_0402_50V7K~N
1K_0402_5%
12
1 2
FB7
10
11
12
B+
PL3
FBMA-L18-453215-900LMA90T_1812
1 2
12
PC13
0.01U_0402_25V7K~N
Charger
PU2
1
2
3
4
5
6
7
8
9
24
-INC2
+INC2
23
OUTC2
GND
22
+INE2
CS
21
-INE2
VCC(o)
20
FB2
OUT
19
VREF
VH
18
FB1
VCC
17
-INE1
RT
16
+INE1
-INE3
15
OUTC1
FB3
14
OUTD
CTL
13
-INC1
+INC1
MB3387PFV-ERE1_SSOP24~N
12
CS7
DH7FB8
PC172
1 2
0.1U_0603_25V7K
1 2 PR208 68K_0402_5%
PR211
FB9
1 2 47K_0402_5%
CTL pin = 0 > >Charger Shutdown.
12
PC14
4.7U_1206_25V6K~N
0.1U_0603_25V7K
1500P_0402_50V7K
PC15
4.7U_1206_25V6K~N
PC168
0.022U_0402_16V7K~N 1 2
PC169 1 2
0.1U_0603_25V7K
PC175
1 2
PC176
1 2
FSTCHG 30
12
12
PC16
PC17
0.1U_0603_25V7K
4.7U_1206_25V6K~N
3
S
HG7
4
G
D6D5D7D
12
PR206
0_0603_5%
12
B++
PR26
1.2M_0402_5%
1 2
PR29
1M_0402_5%
1 2
ACOFF##50
2
1
S
8
10U_LF919AS-100M-P3_4.5A_20%
PD9
EC31QS04
PQ8
S
AO4407L_SO8~N
LX7
1 2
12
PD10
ACOFF#
PL4
EC31QS04
PR38
0.02_2512_1% 1 2
BATT+
DTC115EUA_SC70
C
4 3
E
3 1
PQ3
AO4413L_SO8~N
1
S
2
S
3
S
G
4
13
ACOFF#
12
12
PR31
1 2
13
2
PQ6
PR30
220K_0402_5%
PR34 47K_0402_5%
PQ10
1 2
2
B
PMBT3904_SOT23
V(8xNiMH-max)=14.4V
12
12
PC26
PC25
4.7U_1206_25V6K~N
CC=2.8A
V(8x1.8V_NiMH-max)=14.4V
8
D
7
D
6
D
5
D
PR27
4.7K_0402_5%
VIN
12
100K_0402_5%
PD6
1 2
2
PQ9
DTC115EUA_SC70
BATT+
12
PC27
4.7U_1206_25V6K~N
4.7U_1206_25V6K~N
PD5
RLZ22B_LL34
1SS355_SOD323
30
ACOFF
PD7
1 2
1SS355_SOD323
BATT+
PR213
12
150K_0603_1%
B B
V(-INE3)=4.2V
PR214
365K_0603_1%
12
Batt_OTP = 0.2V at the following conditions:
Charge_OTP = 0.8702V@68 degreeC.
PR241
1 2
B+
100_0805_5%~N
+5VALW
PR242
470K_0402_5%
1 2
12
PR243
1 2
PD39
220K_0402_5%
1SS355_SOD323
2
G
220K_0402_5%
A A
5
12
PC198
0.1U_0603_16V7K
PR244
1 2
TP0610K-T1-E3_SOT23
13
2
13
D
PQ44 2N7002-7-F_SOT23-3
S
PQ43
PC197
B+_BIAS
12
PD38
RLZ18B_LL34
1 2
0.1U_0805_25V7M
+3VALWP
4
Discharge_O TP = 0.7056V@78 degreeC
PR47 47K_0402_5%
1 2
VL
BATT_OTP#51
PR52 100K_0402_1%
12
3
OTP_Vref=0.5V
12
PC35
0.1U_0402_16V4Z
Security Cl assification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAI NS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITT EN CO NSE NT OF COMPAL ELECTRONICS, INC.
PR48 2M_0402_1%
12
VL
8
PU3B
5
P
+
7
O
6
12
-
G
12
LM393DG_SO8
4
PC33
12
0.1U_0402_16V7K~N
PR54
17.8K_0402_1%
PR50
332K_0402_1%
13
D
PQ11
2
G
2N7002-7-F_SOT23-3
S
2005/03/11 2006/03/11
Compal Secret Data
12
PR49 105K_0402_1%
12
PR51
121K_0402_1%
1 2
100K_0402_1%
Deciphered Date
BATT_TEMP 30,48
12
PR218
2
PC34 1000P_0402_50V7K~N
FSTCHG 30
Title
Size Docum e nt N u m be r Re v
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
, 06,
星期一 三月
2006
of
1
49 59
D
Page 50
5
4
3
2
1
PD30 RB751V_SOD323 @
PR230
+1.5V
21
PJP13 3MM
1U_0603_6.3V6M~N
PC180
2 3 4
0.025_1206_1%
PU5
VIN1VCNTL GND VREF VOUT
APL5331KAC-TRL_SO8~N
PR225
6 5
NC
7
NC
8
NC
9
TP
12
12
10U_0805_6.3V6M
PC43
+3VS
1 2
PC37
1U_0603_10V6K
1.2V +-5% @0.3A
2.6A current limit @125 degree C
+1.2VSP
1
+
PC41 @
2
150U_D2_6.3VM
13
D
S
0.1U_0402_16V7K~N
+1.5V_VIN_+1.2V
12
PR63
2.49K_0402_1%
12
12
PR65
10K_0402_1%
PQ41
RHU002N06_SOT323
12
PC40
12
2
G
12
PC184
@
PH2 under CPU botten side :
CPU thermal protection at 87 degree C Recovery at 70 degree C
12
PC38 1000P_0402_50V7K~N
RB751V_SOD323
12
VL
12
PR57
6.8K_0402_1%
12
PH1
PD13
PR70
100K_0402_5%@
1 2
PR75
22K_0402_5%@
1.62K_0402_1%~N
PR58
1 2
10KB_0603_1%_TH11-3H103FT
12
1 2
1 2
12
12
12
TM_REF1
PC39
PC46
@
0_0402_5%
PR215
PC178
0.1U_0603_25V7K
1U_0603_10V6K
TP0610K-T1-E3_SOT23@
0.22U_1206_25V7K
150K_0402_1%
12
PR62 150K_0402_1%
PR216
200_0805_5%
1 2
PQ12
2
PR61
47K_0402_1%
1 2
VL
3
+
2
-
12
PR66 200_0805_5%
13
ACOFF##49
PR55
8
PU3A
P
O
G
LM393DG_SO8
4
VL
12
PC36
0.1U_0603_25V7K
1
VIN
PD12
RLS4148_LLDS2
1 2 12
12
12
PC45
0.1U_0603_25V7K
2
PR231 200_0805_5%
PR71
470K_0402_5%
1 2
13
PQ14 DTC115EUA_SC70
VL
PR56 47K_0402_1%
1 2
VS
PR69
1 2
MAINPWRON 19,48,51
PQ13
TP0610K-T1-E3_SOT23
470K_0402_5%
2
PR73
470K_0402_5%
1 2 13
2
0_1206_5%
1 2
13
PQ15 DTC115EUA_SC70
PR245
10U_0805_6.3V6M
+3VS
12
PR229
10K_0402_5%
13
2
G
0_0402_5%
1 2
D
PQ42
S
RHU002N06_SOT323
SUSP_PWR53
SUSP#23,30,31,34,52,55
PR68
1.5K_1206_5%
VIN+
1 2
PR72
1.5K_1206_5%
1 2
PR74
1.5K_1206_5%
1 2
PR76
1.5K_1206_5%
1 2
B+
D D
C C
BATT+
PR67
B B
200_0805_5%
51ON#31
12
PC48
4.7U_0805_6.3V6K
RTCVREF 48,51
1 2
PR77
560_0402_5%
1 2
PR78
560_0402_5%
4
CHGRTC
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2005/03/11 2006/03/11
Compal Secret Data
Deciphered Date
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
星@, 06, 2006
薑三月
of
1
50 59
D
PU6
12
PC47
1U_0805_25V4Z
5
G920AT24U_SOT89
2
IN
GND
3
OUT
1
CHGRTCP
A A
Page 51
5
4
3
2
1
B+++
D D
12
12
PC50
PC49
4.7U_1206_25V6K~N
4.7U_1206_25V6K~N
+5VALWP
1
12
+
PC67
C C
2
2 1
PD19
SKUL30-02AT_SMA
@
PC69
0.1U_0402_16V7K~N
330U_D3L_6.3VM_R25M
Typical:7.55A OCP=9.82A
Use Rds(on) * 1.3 to calculate O . C.P.(9.844A~11.03A)
For 5V output
Rds_ls=13mOhm , PR95=100KOhm , VL=5V delta I2=(Vin-Vo)*D/L*f=[(19-5)*(5/19)]/4.7u*200K=3.92A
B B
Iimit=(VILM2*0.1)/Rds(on) +1/2DeltaI Delt a I2=3.92A Iimit Min=(VI L M2*0.1)*0.93/(13m*1.3)+1/2*3.92= 9.82A VILM2=1.428V VILM2=VL*(PR95/PR95+PR91)=1.428V PR91<>249K, then VILM2=1.433 Iimit Max=(1.433*0.1)*1.07/(13m*1.3)+1/2*3.92= 11.03A Iimit Min=(1.433*0.1)*0.93/(13m*1.3)+1/2*3.92= 9.844A
PL6
1 2
4.7U_SIL104R-4R7PF_5.7A_+-30%
MAINPWRON19,48,50
AO4704L_SO8~N
BATT_OTP#49
SYSON30,34,54
PQ19
12
PC71
0.1U_0402_16V7K~N
12
PC51
0.1U_0603_25V7K
Place these CAPs close to FETs
5
PQ17
D8D7D6D
SI4800BDY-T1-E3_SO8
S1S2S3G
4
578
3 6
241
PD28
1 2
RB751V_SOD323
@
12
PR227
0_0402_5%
PC75
@
0.047U_0603_25V7M
12
PC52
@
VS
1 2
2200P_0402_50V7K~N
12
PC65
0.1U_0603_25V7K 1 2
1 2
PR88
2K_0402_5%
1 2
PR89
100K_0402_5%
@
VL
PR219
@
2K_0402_5%
12
12
PD29
RLZ5.1B_LL34@
12
PR93
2K_0402_5%
12
12
DC/DC +3V/ +5V/ +12V
PR79
0_1206_5%
@
1 2
12
PC58
4.7U_1206_25V6K~N
PR87 0_0603_5% 1 2
PR237 0_0603_5%
12
12
PC72 1000P_0402_50V7K~N
PR228 100K_0402_5%
PR80
15_1206_5%
PC59
0.1U_0603_25V7K
LX_5V DL_5V OUT_5V
@
12
PR82
PR81
@
@
1 2
1 2
0_0402_5%
22_1206_5%
15_1206_5%
BST_5V-2 BST_3V-2
20
13
18
PU7
BST_5V
14
BST5
V+
LD05
16
DH5
15
LX5
19
DL5
21
OUT5
9
FB5
1
N.C.
6
SHDN#
4
ON5
3
ON3
12
SKIP#
8
REF
GND
LDO3
23
25
12
PC70
0.22U_0603_16V7K
3VL
12
12
PR98 0_0402_5% @
PR99
12
PR100 0_0402_5%
PACIN 48,49
VL
12
PC60
4.7U_0805_6.3V6K
17
ILIM3
TON
VCC
ILIM5
BST3
DH3 DL3
LX3
OUT3
FB3
PGOOD
PRO#
MAX8734AEEI+_QSOP28
10
PC74
4.7U_0805_6.3V6K
12
PC76
0.1U_0402_16V7K~N
2
5
11 28
26 24 27 22
7 2
PR83
47_0603_5%
12
PR85
4.7_0805_5%
1
3
PR86 0_0603_5% 1 2
BST_3V
1 2
DL_3V LX_3V
OUT_3V
12
PD17
RB717F_SOT323
PR238
0_0603_5%
+3VALWP
PR97
1 2
RTCVREF 48,50
12
PC61
1U_0603_10V6K
PC64
0.1U_0603_25V7K
1 2
100K_0402_5%
12
VL
12
PC53
12
4.7U_1206_25V6K~N
PC73
0.1U_0402_16V7K~N
Place these CAPs close to FETs
12
PC54
4.7U_1206_25V6K~N
Place these CAPs close to FETs
5
D8D7D6D
PQ16
RSS090N03_SO8
S1S2S3G
4
578
PQ18 AO4704L_SO8~N
3 6
241
PR90
732K_0402_1%
1 2
1 2
PR94
1 2
1 2
150K_0402_1%
2 1
12
PC56
PC55
0.1U_0603_25V7K
@
2200P_0402_50V7K~N
PL7
1 2
4.7U_SIL104R-4R7PF_5.7A_+-30%
12
PR92
@
PR91
249K_0402_1%
0_0402_5%
12
PR96 0_0402_5%
PR95
100K_0402_1%
FBMA-L18-453215-900LMA90T_1812
PF3
12A_65V_451012MRL
12
PC68
Typical:4.33A
OCP=5.63A
Use Rds(on) * 1.3 to calculate O . C.P.(5.65A~6.35A)
For 3.3V output Rds_ls=13mOhm , RP94=150KOhm , VL=5V delta I2=(Vin-Vo)*D/L*f=[(19-3.3)*(3.3/19)]/4.7u*300K=1.93A
Iimit=(VILM2*0.1)/Rds(on) +1/2DeltaI2 De l ta I2=1.93A Iimit Min=(VI L M2*0.1)*0.93/(13m*1.3)+1/2*1.93= 5.63A VILM2=0.8477V VILM2=VL*(PR94/PR94+PR90)=0.8477V PR90<>732K, then VILM2=0.85 Iimit Max=(0.85*0.1)*1.07/(13m*1.3)+1/2*1.93= 6.35A Iimit Min=(0.85*0.1)*0.93/(13m*1.3)+1/2*1.93= 5.65A
PL5
0.1U_0402_16V7K~N
+3VALWP
1
+
2
12
PC66
B+
12
PC57
0.01U_0402_25V7K~N
PD18
2 1
SKUL30-02AT_SMA
@
330U_D3L_6.3VM_R25M
A A
Security Cl assification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAI NS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITT EN CO NSE NT OF COMPAL ELECTRONICS, INC.
3
2005/03/11 2006/03/11
Compal Secret Data
Deciphered Date
2
Title
Size Docum e nt N u m be r Re v
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
, 06,
星期一 三月
2006
1
51 59
D
of
Page 52
5
4
3
2
1
Low_side MOS Rds(on) t yp=17mOhm, Max=24mOhm To use L-side Rds(on)*1.5 to calcute OCP
D D
Set OCP=4.55A, RIsen=PR106=2.05K (Iocp*Rds(on)*1.5)/PR106+104=76.045uA
12
Rocset=PR117=10.3V/(76.045uA+8uA)=122K, Set PR117=121K
Typical:3.5A OCP:4.55A
5
D8D7D6D
PQ21 RSS090N03_SO8
S1S2S3G
4
5
D8D7D6D
S1S2S3G
4
RSS090N03_SO8
PQ22
RB751V_SOD323 @
+2.5VSP
C C
1
+
PC90
2
12
PC91
330U_D3L_6.3VM_R25M
PR109
18.2K_0402_1%
12
0.01U_0402_25V7K~N
PL9
1 2
4.7U_LF919AS-4R7M-P3_5.2A_20%
12
PR105 0_0402_5%
0.9V 0.9V
12
B B
PR114
10K_0402_1%
12
PR116
0_0402_5%@
PC77
0.1U_0603_25V7K
0.1U_0603_25V7K
LX_2.5V
VOUT_2.5V
PR111
1 2
0_0402_5%
PD32
1 2
0.1U_0402_16V7K~N@
12
PC78
4.7U_1206_25V6K~N
1
2
BST_2.5V-2
1 2
12
PC88
PR106
2.05K_0402_1%
1 2
VSE_2.5V
PC95
12
PC79
@
4.7U_1206_25V6K~N
12
PD21
RB717F_SOT323
3
PC86
12
0.01U_0402_25V7K~N BST_2.5V-1
PR103 0_0603_5%
DH_2.5V
ISE_2.5V DL_2.5V
12
12
PR117 121K_0402_1%
PR101
+5VALWP
1 2
10_0805_5%
12
PC83
PC85
2.2U_0805_10V6K
0.1U_0603_25V7K
SOFT1
BOOT1
UGATE1 PHASE1
ISEN1 LGATE1
PGND1
VOUT1 VSEN1 EN1 PG1
OCSET1
0_0402_5%
PR223
14
VIN
GND
1
12
PU8
12
6
5 4
7 2
3
9
10
8
15 11
PR102
1 2
2.2_0603_5%
28
SOFT2
VCC
BOOT2
UGATE2
PHASE2
ISEN2
LGATE2
PGND2
VOUT2 VSEN2
EN2
PG2/REF OCSET2
DDR
ISL6227CAZ-T_SSOP28
13
124K_0402_1%
BST_1.2V-2
17
0.01U_0402_25V7K~N
23
24 25
22 27
26
20 19 21 16
18
PR118
Vout=0.9V*(1+PR109/PR114)=0.9V*(1+18.2K/10K)=2.538V
B+++++
12
PC84
2.2U_0805_10V6K
PC87
12
BST_1.2V-1
1 2
PR104
0_0603_5% DH_1.2V LX_1.2V
ISE_1.2V DL_1.2V
VOUT_1.2V VSE_1.2V
+VCCP_PWRGD
12
PC94
0.1U_0402_16V7K~N@
12
PC80
@
4.7U_1206_25V6K~N
0.1U_0603_25V7K
PR107
2.05K_0402_1%
1 2
12
FBMA-L11-322513-151LMA50T_1210
12
PC81
4.7U_1206_25V6K~N
12
PC89
1 2
PR112 0_0402_5%
PD34
RB751V_SOD323 @
1 2
PR226 0_0402_5% @
PL8
12
PC82
0.1U_0603_25V7K
5
PQ20
D8D7D6D
SI4800BDY-T1-E3_SO8
S1S2S3G
4
1.8U_D104C-919AS-1R8N_9.5A_30%
578
PQ23 AO4704L_SO8~N
3 6
241
12
PD33
RB751V_SOD323 @
12
PF4
12
2 1
7A_24VDC_429007.WRML
B+
Low_side MOS Rds(on) t yp=17mOhm, Max=24mOhm To use L-side Rds(on)*1.5 to calcute OCP Set OCP=8.45A, RIsen=PR107=2.05K (Iocp*Rds(on)*1.5)/PR107+104=141.226uA
Rocset=PR117=10.3V/(141.226uA+8uA)=69K, Set PR118=69.8K
Typical:6.5A OCP:8.45A
PL10
1 2
SUSP# 23,30,31,34,50,55SUSP#23,30,31,34,50,55
PR108
0_0402_5%
12
12
PR115 0_0402_5%@
12
12
PC93
0.01U_0402_25V7K~N
12
VCCP_ON 30
Vout=0.9V*(1+PR110/PR113)=0.9V*(1+1.74K/10K)=1.0566V
PC92
PR110
1.74K_0402_1%
PR113
10K_0402_1%
1
+
2
330U_D2_2VK_R9
+VCCPP
12
12
PC186
10U_0805_6.3V6M~N
12
PC187
PC191
10U_0805_6.3V6M~N
@
10U_0805_6.3V6M~N
@
+3VS
12
PR60
10K_0402_5%
+VCCP_PWRGD 30
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/11 2006/03/11
3
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
星期一
, 06, 2006
三月
SCHEMATIC, M /B LA-2831
401362
52 59
1
D
of
Page 53
A
1 1
B
C
D
+1.8VP
PU9
VIN1VCNTL
2
GND
3
VREF
4
VOUT
APL5331KAC-TRL_SO8~N
12
1U_0603_6.3V6M~N
1
+
PC99
2
150U_D2_6.3VM @
PR120
1K_0402_1%
12
PR119
1K_0402_1%
12
PC98
12
PC97
10U_0805_6.3V6M
PJP14 3MM
21
PJP3 3MM
21
2 2
+5VALWP
PJP5 3MM
+3VALWP +3VALW
PJP7 3MM
+2.5VSP
PJP19 3MM
PJP9
3 3
+1.5VP
3MM
+5VALW
PJP15 3MM
21
PJP6
21
21
+2.5VS
+VCCPP +VCCP
+1.8VP +1.8V
3MM
PJP16 3MM
PJP8 3MM
21
21
21
SUSP_PWR50
21
PJP10 3MM
21
+1.5V
+1.2VSP
21
+1.2VS
PD31 RB751V_SOD323 @
1 2
PR121
0_0402_5%
12
2
G
13
D
PQ24
RHU002N06_SOT323
S
12
PC183
@
0.1U_0402_16V7K~N
6 5
NC
7
NC
8
NC
9
TP
+3VS
12
PC96 1U_0603_10V6K
+0.9V (Main DDR2 1A + VRAM 1A)
+0.9VSP
12
PC100 10U_0805_6.3V6M
12
PR122
0.025_1206_1%
PJP11
+12VWSP
3MM
4 4
A
+12VWS
21
+0.9VSP
PJP12 3MM
+0.9VS
21
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
2005/03/11 2006/03/11
Compal Secret Data
Deciphered Date
C
Title
Size Document Number Rev
Date: Sheet of
Compal Electronics, Inc.
SCHEMATIC, M /B LA-2831
, 06, 2006
三月
401362
星期一
D
D
53 59
Page 54
5
4
3
2
1
D D
Low_side MOS Rds(on) Max=13mOhm To use L-side Rds(on)*1.5 to calcute OCP Set OCP=9.61A, RIsen=PR128=2.05K (Iocp*Rds(on)*1.5)/(PR128+140)=85.568uA Rocset=PR139=10.3V/(85.568uA+8uA)=110K, Set PR139=110K
Typical:7.39A OCP:9.61A
+1.5VP
C C
1
2
PC114
330U_D2_2VK_R9
PR131
7.32K_0402_1%
+
12
12
1.8UH_SIL104R-1R8P F_9. 5A_30%
12
PR136
10K_0402_1%
PL12
1 2
12
PR127
PC115
0_0402_5%
0.01U_0402_25V7K~N
12
PR138
0_0402_5% @
D8D7D6D
S1S2S3G
241
3 6
5
PQ26 RSS090N03_SO8
4
PQ27
578
AO4704L_SO8~N
RB751V_SOD323 @
12
PC101
VOUT_1.5V
1 2
0_0402_5%
1 2
0.1U_0402_16V7K~N@
0.1U_0603_25V7K
PC112
0.1U_0603_25V7K
LX_1.5V
PR133
PD35
12
PC102
4.7U_1206_25V6K~N
1
2
3
BST_1.5V-2
12
1 2
PR125 0_0603_5%
PR128
2.05K_0402_1% 1 2
VSE_1.5V
12
PC119
12
PC103
@
4.7U_1206_25V6K~N
12
PD23
RB717F_SOT323
PC110
12
0.01U_0402_25V7K~N BST_1.5V-1
DH_1.5VDH_1.5V
ISE_1.5V DL_1.5V
12
PR139 110K_0402_1%
PC107
2.2U_0805_10V6K
PU10
12
SOFT1
6
BOOT1
5
UGATE1
4
PHASE1
7
ISEN1
2
LGATE1
3
PGND1
9
VOUT1
10
VSEN1
8
EN1
15
PG1
11
OCSET1
0_0402_5%
12
PR224
1 2
PC109
0.1U_0603_25V7K
14
VIN
GND
1
12
PR123
10_0805_5%
+5VALWP
PR124
1 2
2.2_0603_5%
28
SOFT2
VCC
BOOT2
UGATE2 PHASE2
ISEN2
LGATE2
PGND2
VOUT2 VSEN2
PG2/REF
OCSET2
DDR
ISL6227CAZ-T_SSOP28
13
17
23
24 25
22 27
26
20 19 21
EN2
16 18
Vout=0.9V*(1+PR131/PR136)=0.9V*(1+7.32K/10K)=1.5588V Vout=0.9V*(1+PR132/PR135)=0.9V*(1+10.2K/10K)=1.818V
B B
B++++
12
PC108
2.2U_0805_10V6K
BST_1.8V-2
PC111
12
0.01U_0402_25V7K~N BST_1.8V-1
1 2
PR126
0_0603_5% DH_1.8V LX_1.8V
ISE_1.8V DL_1.8V
VOUT_1.8V VSE_1.8V
12
PR140 121K_0402_1%
12
PC104
@
4.7U_1206_25V6K~N
0.1U_0603_25V7K
PR129
2.05K_0402_1%
1 2
FBMA-L11-322513-151LMA50T_1210
12
PC105
4.7U_1206_25V6K~N
5
4
12
PC113
578
1 2
PR134 0_0402_5%
PD36 RB751V_SOD323 @
12
PC118
0.1U_0402_16V7K~N@
PL11
12
PC106
0.1U_0603_25V7K
PQ25
D8D7D6D
SI4800BDY-T1-E3_SO8
S1S2S3G
1.8UH_SIL104R-1R8P F_9. 5A_30% 1 2
PQ28 AO4704L_SO8~N
3 6
241
12
PL13
SYSON 30,34,51SYSON30,34,51
0_0402_5%
0_0402_5% @
12
PR130
PR137
PF5
2 1
7A_24VDC_429007.WRML
12
12
PC117
0.01U_0402_25V7K~N
12
B+
Low_side MOS Rds(on) typ=13 . 3mOhm, Max=16.5mOhm To use L-side Rds(on)*1.5 to calcute OCP Set OCP=8.67A, RIsen=PR129=2.05K (Iocp*Rds(on)*1.5)/PR129+104=78.634uA
Rocset=PR140=10.3V/(200.557uA+8uA)=118.89K, Set PR140=121K
Typical:6.67A OCP:8.67A
+1.8VP
1
+
2
PC116
12
330U_D2_2VK_R9
PR132
10.2K_0402_1%
0.9V0.9V
12
PR135
10K_0402_1%
A A
Security Cl assification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAI NS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITT EN CO NSE NT OF COMPAL ELECTRONICS, INC.
3
2005/03/11 2006/03/11
Compal Secret Data
Deciphered Date
2
Title
Size Docum e nt N u m be r Re v
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
, 06,
星期一 三月
2006
1
54 59
D
of
Page 55
5
4
3
2
1
12
PC121
4.7U_1206_25V6K~N
1000P_0603_50V7K@
12
PR236
4.7K_0402_1%
PR145 0_0603_5%
1 2
1 2
@
B++++++
PC188
PR149
12
1K_0402_1%
PC122
4.7U_1206_25V6K~N
@
12
SI4840DY_SO8
PR146
100_0402_1%
PL15
1 2
10UH_SPC-1205P-100 GP_4.5A_20%
PC123
1 2
10U_1210_25V6M
PC124
1 2
10U_1210_25V6M
PC126
1 2
10U_1210_25V6M@
PC127
1 2
10U_1210_25V6M@
PR232
12
2.2_0805_1%@
578
PQ29
3 6
241
12
PR222
0_0402_5%
1 2
PL16
1 2
10UH_SPC-1205P-100 GP_4.5A_20%
578
PQ30 SI4840DY_SO8
@
3 6
241
4
3
PR221
0.01_2512_1%
2
1
PD24
EC31QS04
PD25
EC31QS04
PD26
EC31QS04
12
@
2.2_0805_1% PR233
@
12
1000P_0603_50V7K PC190
PR150 442K_0402_1%
1.25V
PR153
61.9K_0402_1%
thermal:1.5A
peak:2.0A
OCP:2.4A
1
12
+
PC129
220U_25V_M
2
PC130
PJP20
3MM
21
PL20
12
PC131
10U_1206_25V6M~N
10U_1206_25V6M~N
1 2
2.2UH_SPC-06703-2R2_20% @
1
+
PC189
2
@
+12VWSP
12
12
220U_25V_M
PC194
PC193
10U_1206_25V6M~N
10U_1206_25V6M~N
12
12
12
PC135
100P_0402_50V8J~N@
PC136
220P_0402_50V7K~N
12
12
12
12
PF6
B+
2 1
7A_24VDC_429007.WRML
D D
+5VALW
PR147
12
10_0603_5%
C C
PR152
SUSP#23,30,31,34,50,52
B B
0_0402_5%
1 2
PR234
165K_0402_1%
12
12
PC132
1U_0603_10V6K
12
PC134
0.22U_0603_16V7K
PL14
FBMA-L11-322513-151LMA50T_1210
9
PU11
VCC
10
SHDN#
1
LDO
2
FREQ
4
REF
GND
MAX668
3
PR235
1 2
47K_0402_1%
EXT
CS+
PGND
FB
12
12
PC120
4.7U_1206_25V6K~N
12
PC192
1000P_0402_50V7K~N
8
6
12
PC133
1000P_0402_50V7K~N
7
5
PR220
0_0402_5%
1 2
Vout=1.25V*(1+PR150/PR153)=1.25V*(1+442K/49.9K)=12.32V
A A
Security Cl assification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAI NS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITT EN CO NSE NT OF COMPAL ELECTRONICS, INC.
3
2005/03/11 2006/03/11
Compal Secret Data
Deciphered Date
2
Title
Size Docum e nt N u m be r Re v
Date: Sheet
Compal Electronics, Inc.
, 06,
星期一 三月
2006
SCHEMATIC, M/B LA-2831
401362
1
55 59
D
of
Page 56
A
B
C
D
delta I= (Vin-Vo)*D/L*f=[(19-1.308)*(1.308/19)]/(.56u*300K)=7.25A
OCP=35.1A(TYP), DCR=1.4mOhm Ilimit(min) per phase=35.1/2-7.25/2=13.925A
+5VS
CPU_B+
13.925A*1.4mOHM(DCR)*1.3(temperature factor)*20=VLLIM(TYP)=0.50687V Take PR178=237K, PR180=90.9K VILIM=VREF*PR180/(PR178+PR180)=0.554(TYP)
1 1
VILIM/20=Ilimit*DCR*1.3 OCP(TYP)=(0.554/20/1.3/1.4mOHM+delta I/2)*2=37.689A OCP(min)=((0.554/20-2mV)/1.3/1.4mOHM+delta I/2)*2=35.515A OCP(max)=((0.554/20+2mV)/1.3/1.4mOHM+delta I/2)*2=39.887A
VGATE8,17,20,30
PR180
90.9K_0402_1%
13
D
2
G
S
PQ34
RHU002N06_SOT323
+3VS
2
PQ40
VID06 VID16 VID26 VID36 VID46 VID56
PC182
1 2
0.22U_0603_16V7K @ 1 2
PR178 237K_0402_1%
PR184
1 2
10.7K_0402_1%
1 2
PR195 100K_0402_1%
1 2
13
1 2
1 2
1 2
RB751V_SOD323 @
1 2
+3VS
@
@
1 2
1 2
FB5
100K_0402_1%
1 2
@
PR158 0_0402_5%
PR162 0_0402_5%
PR165 0_0402_5%
PD37
PR173 0_0402_5%
1 2
1 2
PR182
PR187 0_0402_5%
PR190 100K_0402_1%
1532VCC
1532REF
2 2
VR_ON30,34
H_STP_CPU#17,20
PM_DPRSLPVR20
3 3
H_PSI#6
DTC115EUA_SC70
4 4
PC145
1U_0603_10V6K
PR155
12
0_0402_5% PR156
12
0_0402_5% PR160
12
0_0402_5% PR163
12
0_0402_5% PR164
12
0_0402_5% PR167
12
0_0402_5% PR169
1 2
0_0402_5%
PR176 30.1K_0402_1%
PC150 270P_0402_50V7K~N
PC152 0.22U_0603_16V7K
12
PC154 100P_0402_50V8J~N
2
G
PR191 0_0402_5%
12
PR193 100K_0402_1%
1532VCC
1 2
1 2
13
D
S
PQ35
2
G
1 2
RHU002N06_SOT323
12
PR154 10_0402_5%
1532VCC
1 2
12
PC155
12
PR194 100K_0402_1%
13
D
PQ39
S
PR171 0_0402_5%
TIME
1532REF
1 2
RHU002N06_SOT323
470P_0402_50V8J~N
PU12
10
VCC
24
D0
23
D1
22
D2
21
D3
20
D4
19
D5
25
VROK
4
S0
5
S1
6
SHDN
1
TIME
12
CCV
2
TON
8
REF
9
ILIM
7
OFS
3
SUS
18
SKIP
11
GND
MAX1532AETL+T_TQFN40
LX5
OAIN+
LX6
PC144
2.2U_0603_6.3V6K
VDD
BSTM
DHM
LXM DLM
PGND
CMP CMN
OAIN+
OAIN-
FB
CCI
BSTS
DHS LXS DLS CSP CSN
GNDS
TP
12
PR196 100K_0402_1% @
12
PR198 100K_0402_1% @
1 2
30 36
V+
26 28 27 29 31 37 38 17 16 15 14 35 33 34 32 40 39 13 41
12
PC146
BST5
PC151 470P_0402_50V8J~N
CS6+
CS6-
0.01U_0402_25V7K~N
PR157
1 2
2.2_0603_5%
DH5 HG5
PR161
1 2
2.2_0603_5%
CS5+ CS5-
OAIN+
OAIN-
FB5
1 2
BST6
LX6 DL6
1 2 12
LX5
DL5
DH6
PR192
PC162
PC147
2.2_0603_5%
0.22U_0603_16V7K
12
12
HG6
1 2
@
1 2
@
0.22U_0603_16V7K
PR188
2.2_0603_5%
578
PD27
BST5
2 3
RB717F_SOT323
12
PC156 1000P_0402_50V7K~N
IRF7821PBF_SO8~N
PC164 1000P_0402_50V7K~N
PC165 1000P_0402_50V7K~N
PQ36
OAIN+
OAIN+
PQ31 IRF7821PBF_SO8~N
3 6
241
578
3 6
241
PR177 866_0402_1%
1 2
1
578
3 6
241
578
3 6
241
PR199
1 2
866_0402_1%
12
PC137
4.7U_1206_25V6K~N
578
PQ32 IRF8113PBF_SO8
3 6
+5VS
0.022U_0402_16V7K~N
PQ37 IRF8113PBF_SO8
12
PC138
4.7U_1206_25V6K~N
PQ33 IRF8113PBF_SO8 @
241
1 2
PC153
12
12
PC158
PC157
2200P_0402_50V7K~N
578
3K_0402_1%
1 6
CPU CORE
FBMA-L18-453215-900LMA90T_1812
12
12
12
PC141
PC140
PC139
1 2
12
1 2
PR179
4.7U_1206_25V6K~N
243
0.1U_0603_25V7K
4.7U_1206_25V6K~N
C*R>=L/DCR<> 0.47UF*PR147=0.56UH/1.4mOhm <> PR147=851Ohm<>866 Ohm
PL18
0.56UH_MPC1040LR56_23A_20% 1 2
12
PR239
@
4.7_1206_5% PC148
PR166 866_0603_1%
1 2 PC195 680P_0805_50V8K
0.47U_0603_16V7K
@
1 2
PR183
0_0402_5%
12
12
PC159
PC160
4.7U_1206_25V6K~N
4.7U_1206_25V6K~N
PR240
@
1 2
12
PC196
PQ38
680P_0805_50V8K
IRF8113_SO8
@
@
PC142
2200P_0402_50V7K~N
CRS_-
PR170 499_0402_1%
1 2
CPU_B+
100_0402_5%
12
PC161
0.01U_0402_25V7K~N PL19
0.56UH_MPC1040LR56_23A_20% 1 2
PR197 866_0603_1%
4.7_1206_5% 1 2
1 2
1 2
1
+
220U_25V_M
2
PR159
0.001_2512_5% 1 2
12
PR185
PC163
0.47U_0603_16V7K
PL17
1 2
CPU_Fuse
8A_1255VDC_451008
4 3
1 2
PR172 499_0402_1%
1 2
PR189
10_0402_5%
2 1
PF7
PR168 10_0402_5%
PR174 3K_0402_1%
PR186
0_0402_5%
12
+CPU_CORE
1 2
1 2
PR181 0_0402_5%
1 2
CPU Remote -
- Sensing Pairs.
B+
PC143
0.01U_0402_25V7K~N
PC149 1000P_0402_50V7K~N
1 2
@
VCCSENSE 6
VSSSENSE 6
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/11 2006/03/11
Compal Secret Data
Deciphered Date
C
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
星期一 三月
401362
06
D
D
of
56 59, 06, 20
Page 57
5
4
3
2
1
Version Change List ( P. I. R. List )
Page 1
Request
Item Issue DescriptionDate
1
D D
256
350
4
5
6
C C
7
8 NEC
10 Compal
51
+3V/5V
07/05
CPU_CORE 07/05 To improve EMI To add PR239,PC196 and PR240,PC195 connect to Phase node
CPU OTP function 07/05 To meet 87 degree C CPU OTP To change PR57 to 1.96K and PR58 to 6.8K
54
49
51
49
55
49
1.5V/1.8V 07/05 H/W ask to change 1.5V to 1.55V To change PR131 to 7.32K
Battery OTP function 08/01 To prevent mainpwon is pull low To change PR52 pin2 connect to +3VALWP
+3V/5V 08/05 To p revent choke is too hot remove the +12VALWP function (remove PD16,PC63,PR84,PC62,PD15)
charger 08/05 To prevent 5Vchoke is too hot
charger 08/29 Change OTP@ charge to 68 degree C to avoid shut down on production line To change PR50 to 332K
Owner
Compal
Compal
Compal
Compal
Compal
Compal
Compal
To improve EMI To add PR237 and PR238 connect to High-side Gate
New add B+_BIAS function to replace +12VALWP(Add PR241,PR242 PQ43,PC197,PD38,PR243,PC198,PR244,PD39,PQ44)
Follow NEC requied+12VWSP
Solution Description Rev.Page# Title
0.1
To change PR153 to 61.9K08/15
11 Compal
12
13
B B
14
15
16
17
A A
51
51
+3V/5V 08/29 To prevent 3V/5Vchoke is too hot at S5 mode Depop PR99 and Pop PR100
+3V/5V 09/26
Compal
Batt OTP circuit has problem Depop PD28
Compal Electronics, Inc.
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Next: PR238, PC202, PQ56, PD42, PJP21
5
4
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
SCHEMATIC, M/B LA-2831
Size Document Number Rev
401362
Date: Sheet
, 06, 2006
星期一 三月
1
of
5957
D
Page 58
5
4
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Version change list (P.I.R. List) Page 1 of 2
1
D D
1
2
3
4
5
6
C C
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8
then can't boot by pwr botton.
9
10
USB2.0 fail DIODE using wrong 33 change D1,D5,D23,D24 from PSOT24C to BAT54A(SCSBAT540A0)
11
12
13
14
It had POP noise when enter S4. The subwoofer shut down timing to late 29 EAPD connect to U19 RESET pin
B B
15
The AUDIO can not turn off when the LCD close. The EC can not control amplifier shutdown 28 EC_MUTE# connect to amplifier shutdown pin
16
Reason for change Rev. PG# Modify List B.Ver# PhaseFixed IssueItem
LVDS output EMI solution
EC control PWR_LED#,BATT_LED#,CHARGE_LED#
PANEL Backlight only control by EC&NB
U50 output left/right channel are wrong 29
control PANEL by EC 30
LID switch on/offEC judge LID switch is not open,
EMI solution for MDC IAC_BITCLK 32 Add R940 (33ohm) and C944 (22pF)
AK4363 sound output signal unstable.LM358 issue
U27 clock buffer EMI solution
Change touch pad from USB to PS2 interface 30,31 Del USBP5-;USBP5+ Add PSDAT3; PSCLK3
Change R10,R11,R12,R13,R14,R15,R16,R17,R18,R19
15
to (L72,L73,L74,L75,L76)
15
add JLVDS1 Pin35 connection to LCD_INVB+modify JLVDS1 to fit in new inverter
Change Q37,Q38,Q39 to MMBT3904,
15
add R947,R948,R949 330ohm,R611,R612,R613 change to 1M ohm then connect to GND
del U4B15
CLK_33M_CBS connect to JTVMD1 pin7417CLK_33M_MPCI connect to MPCI & TV too long
27Buzzer is too quiet change R820 to 100ohm
swap U50 pin6&pin10(pin6 connect to LINE_IN_L) (pin10 connect to LINE_IN_R)
EC(U57)pin24 connect to LCD_VDD_EN pin70 connect to LCD_EN
31 change JLSW1 pin4 connect from +3V to +3VALW
change R225,R226 to 9.1K ohm, R198,R734 to 15K ohm add C945 220PF between U17A pin1&pin2, add C946 220PF between U17A pin6&pin7
46
U17A pin2 connect to R225, U17B pin6 connect to R226 R744,R188 connect to AMP_VREF
47 Add R921,R922,R923 33ohm and C941,C942,C943 22PF
Video-Engine function abnormal The EMVDCLK waveform break 35,47 Add R967,R968,R969,R970,R971 to smooth EMVDCLK waveform
17
USB2.0 fail (0.4--
18
AW172A power sequence fail (0.4-->0.5) +2.5VS too fast (0.4-->0.5) 39
19
>0.5) ESD DIODE
20
Iprove voltage drop(0.4-->0.5) Iprove component DCR(0.4-->0.5) change L22,L12,L11 package from 0603 to 0805(0.4-->0.5)44
21
22
A A
5
Improve Lan test(0.4-->0.5) 23 Add L78,L79 0805(0.4-->0.5)
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
16 Change D1,D5,D23,D24 package
Add one power regulator
PJP1,JSPK1 SMD-->DIP(0.4-->0.5)PJP1,JSPK1 packake change(0.4-->0.5) 28,48
2005/03/11 2006/03/11
Compal Secret Data
Deciphered Date
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
星@, 06, 2006
薑三月
1
of
58 59
D
Page 59
5
4
3
2
Version change list (P.I.R. List) Page 2 of 2
1
D D
1
2
3
4
5
6
C C
7
8
Reason for change Rev. PG# Modify List B.Ver# PhaseFixed IssueItem
16
Add two resistors to HSYNC,VSYNC
Add resistors from EM8475_DAC_PDN to MUTE for noise resume S4
Add FB to VCC-CRT-DAC & VSS-CRT-DAC
Power plan reservation for RRX6000 29 Add R1012,R1013
Circuit reservation for TE7782 41 Add R 1 0 0 9,R1010
Improve EMVDCLK Layout
EC pin 90 connect to ODD_ACT# (optional)
Add R1004,R10 05,R1006,R1007
46
Add R999,R1000
11
Add L80,L81
Add C966,C96726Improve 2.5VS
26
Delete C954
30
Add R1014
9
10
11
12
13
14
B B
15
16
17
18
19
20
21
22
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2005/03/11 2006/03/11
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2831
401362
星@, 06, 2006
薑三月
1
of
59 59
D
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