Compal LA-2761, Aspire 3600, Aspire 5500, Aspire 5500Z, TravelMate 2400 Schematic

A

B

C

D

E

Page Index

===============

P01-Cover Page
P02-Block Diagram
P03-Notes List
P04-Dothan(1/2)

1 1

Compal Confidential

EFL50/ EFT51 Schematics Document

2 2

Intel Dothan/ Celeron M/ Alviso GM(PM) / DDR-2 / ICH6-M

(Daughter Card: ATi M24P/ M26P)

2005 / 03 / 08 (B-Test EVT)

Rev:0.2

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/03/08 2006/03/08

C

Compal Secret Data

Deciphered Date

Custom

D

P05-Dothan(2/2)
P06-Alviso HOST(1/5)
P07-Alviso DDR(2/5)
P08-Alviso PCI-E(3/5)
P09-Alviso POWER(4/5)
P10-Alviso POWER(5/5)
P11-DDRI-SODIMM0
P12-DDRI-SODIMM1
P13-DDR Decoupling
P14-Clock Generator
P15-CRT Conn.
P16-VGA / LCD Conn.
P17-ICH6(1/4)_HUB,PCI,HOST
P18-ICH6(2/4)_CPU,AC97,IDE,LPC
P19-ICH6(3/4)_USB,PM,LAN,GPIO
P20-ICH6(4/4)_POWER&GND
P21-HDD/CDROM
P22-DVI / TV_Out Conn
P23-PCMCIA ENE CB1410 & CB714
P24-PCMCIA SOCKET
P25-TI 1394A TSB43AB21A
P26-LAN BCM5788M
P27-LAN Magnetic & RJ45/RJ11
P28-Mimi-PCI Slot
P29-AC97 Codec_ALC250D
P30-Audio Line in Switch
P31-AMP & Audio Jack
P32-Super IO SMC217
P33-ENE-KB910
P34-MDC / BT / KBD / TP Conn.
P35-BIOS & I/O Port & SATA HDD
P36-RJ11/LID Switch / Fan / FIR
P37-USB2.0 Conn
P38-Docking Conn.
P39-PWR_OK / RTC
P40-DC INTERFACE
P41-Screws
P42-PWR-DCIN / Precharge
P43-PWR-Charger
P44-PWR-Battery Select
P45-PWR-3V/5V/12V
P46-PWR-GMCH_CORE/1.8V/0.9V
P47-PWR-1.5V/2.5V
P48-PWR-CPU_CORE
P49-PWR-OTP
P50-PWR-PIR

Title

Cover Sheet

Size Document Number Rev

EFL50 LA-2761

Date: Sheet

151Wednesday, April 20, 2005

E

of

0.2

A

Compal confidential

B

C

D

E

Project Code: EFL50/ EFT51

Intel Dothan/ Celeron M CPU

File Name : LA-2761

CRT & TV-OUT

1 1

page 15

H_A#(3..31)

FSB

400 / 533 Mhz

page 4,5

H_D#(0..63)

Thermal Se nsor
ADM1032ARM

page 4

Clock Generator
ICS954226AGT

page 14

Daughter Card Slot
PCI-Express x16

page 15

PCI-E BUS

Intel Alviso GM(PM)

DDR-2

DDRII-SO-DIMM X2

BANK 0, 1, 2, 3

page 11,12,13

PCBGA 1257

ATi M24P/ M26P

VGA Board

page 16

page 6,7,8,9,10

Two Channel DDR-2

DMI

LCD CONN

page 16

2 2

Intel ICH6-M

PCI BUS

Mini PCI
Socket

page 28

3 3

BroadCOM
BCM4401KFB
BCM57 88M

page 26

RJ45 CONN

page 27

ENE Controller

CB712

Slot 0

page 24

3in1 CardReader
Slot

page 23,24

page 24

1394 Controller
TSB43AB21

page 25

1394
Conn.

page 25

LPC BUS

Power On/Off CKT.

page 39

SMsC LPC47N217

DC/DC Interface CKT.

page 40

RTC CKT.

page 39

page 32

mBGA-609

page 17,18,19,20

ENE KB910Q

USB 2.0

USB 2.0

AC-LINK

SATA

PATA

page 33

USB conn x 3

BT Conn

page 37

page 34

Audio CKT
ALC250-D

MDC Conn.

page 29

page 36

SATA HDD Conn.

page 21

HDD Conn.
CDROM Conn.

page 21

AMP & Audio Jack

RJ11 CONN

page 31

page 36

Docking Conn.
PCI-E Bridge

RJ45
VGA
DVI
TV-Out
HP-Out/ Line-Out
Mic-in/ Line-in
SPDIF
Parallel Port

Jack x2

page 36

Serial Port

Int. KBD

Power Circuit DC/DC

4 4

page 42~49

Power OK CKT.

page 39

Parellel Port

page 38

Serial Port

DOCKING CONNDOCKING CONN

page 38

Touch Pad
CONN.

page 34

Button

LED

page 38

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/03/08 2006/03/08

C

Compal Secret Data

Deciphered Date

page 34

BIOS

page 35

Title

Size Document Number Rev

Custom

D

Date: Sheet

KB/ Mouse (PS/2)

Block Diagrams

EFL50 LA-2761

page 39

0.2

251Wednesday, April 20, 2005

E

of

A

Voltage Rails

Power Plane Description

1 1

2 2

VIN
B+
+CPU_CORE
+1.05VS
+DDRVTT 0.9V switched power rail for DDR terminator
+1.5VALW 1.5V always on power rail
+1.5VS
+1.8VS 1.8V switched power rail
+DDRVCC
+2.5VS
+3VALW
+3V
+3VS
+5VALW
+5VS
+5VMO D 5 V sw i tc he d po we r rail for Module Bay
+12VALW 12V always on power rail
+RTC V C C RTC power

Adapter power supply (19V)
AC or batte ry power rail for power circuit.
Core voltage for CPU

1.05V switched power rail

1.5V switched power rail

1.8V power rail for DDR

2.5V switched power rail

3.3V always on power rail

3.3V power rail

3.3V switched power rail
5V always on power rail
5V switched power rail

B

S1 S3 S4/ S5

N/A N/A N/A

ON OFF
ON OFF
ON OFF OF F
ON
ON OFF OF F
ON OFF OF F
ON
ON
ON
ON
ON
ON

ON ONON

N/AN/AN/A
OFF
OFF

ON*ON

OFF

ON

OFF

OFF
ON ON*

OFF

ON
OFF

OFF

ON

ON*

OFF

OFFON
OFF OFFON
ONON ON*

C

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SIGNAL

SLP_S1# SLP_S3#

HIGH HIGH HIGH HIGH

LOW

LOW

LOW LOW LOW LOW

D

LOW

Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0
1
2
3
4
5
6
7 NC

100K +/- 5%Ra / Rc

Rb / Rd V min

AD_BID

0

8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

E

SLP_S4# SLP_S5# +VA LW +V +VS Clock

0 V

HIGH

LOWLOWLOW

ON

HIGHHIGHHIGH

HIGH

HIGH

Vtyp

ON

ON

ON

ON

AD_BID

0 V 0 V

0.503 V

0.819 V

ON

ON

ON

OFF

OFF

V

AD_BID

0.538 V

0.875 V

ON ON

ON

OFF

OFF

OFF

max

1.185 V 1.264 V

2.200 V

3.300 V

2.341 V

3.300 V

LOW

OFF

OFF

OFF

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

External PCI Devices

Device IDSEL # REQ # / GNT # Interrupts

CardBus

1394
SD

Mini-PCI

LAN

3 3

AD20
AD16 0
AD20
AD18
AD17 3

2

2
1

PIRQA/PIRQB
PIRQE
PIRQA/PIRQB
PIRQG/PIRQH
PIRQF

BOARD ID Table

Board ID

0
1
2
3
4
5
6
7

PCB Revision

0.1

0.2

BTO Item BOM Structure

UMA
Discrete
LAN 10/100
LAN GIGA
1 Spindle 1S@
2 Spindle 2S@
2 Spindle with SATA

1 Spindle with SATA

EC SM Bus1 address

Device

Smart Battery
EEPROM(24C16/02)

(24C04)

Address Address

1010 000X b
1011 000Xb

EC SM Bus2 address

Device

ADM1032

1001 110X b0001 011X b

SKU ID Table

SKU ID

0
1
2

SKU

1 Spindle with PATA
With Docking
Without Docking
With 1394
With 1394 4pin
With 1394 6pin

BTO Option Table

GM@
PM@
4401@
5788@

2SS@
2SP@2 Spindle with PATA
1SS@
1SP@
WD@
ND@
1394@
1394<4>@

1394<6>@

3
4
5

ICH6M SM Bus address

Device

4 4

Clock Generator
(ICS 954226AGT)

DDRII DIMM0
DDRII DIMM2

A

Address

1101 001Xb

1001 000Xb
1001 010Xb

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/03/08 2006/03/08

C

6
7

Compal Secret Data

Deciphered Date

Title

Notes

Size Document Number Rev

Custom

EFL50 LA-2761

D

Date: Sheet

351Wednesday, April 20, 2005

E

0.2

of

5

H_A#[3..31]6

H_REQ#[0..4]6

H_RS#[0..2]6
H_D#[0..63]6

D D

C C

B B

A A

H_A#[3..31]
H_REQ#[0..4]
H_RS#[0..2]
H_D#[0..63]

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_ADSTB#06
H_ADSTB#16

CLK_CPU_BCLK13

CLK_CPU_BCLK#13

H_ADS#6
H_BNR#6

H_BPRI#6

H_BR0#6

H_DEFER#6

H_DRDY#6

H_HIT#6
H_HITM#6

H_LOCK#6

H_CPURST#6

H_TRDY#6

H_DBSY#6
H_DPSLP#17
H_DPRSTP#17
H_DPWR#6

H_PWRGOOD17

H_CPUSLP#6,17

H_THERMTRIP#6,17

H_ADSTB#0
H_ADSTB#1

CLK_CPU_BCLK
CLK_CPU_BCLK#

H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRDY#
H_HIT#
H_HITM#
H_IERR#
H_LOCK#
H_CPURST#

H_RS#0
H_RS#1
H_RS#2
H_TRDY#

ITP_DBRRESET#
H_DBSY#
H_DPSLP#
H_DPRSTP#
H_DPWR#

PRO_CHOT#
H_PWRGOOD

H_CPUSLP#
ITP_TCK
ITP_TDI
ITP_TDO
TEST1
TEST2
ITP_TMS
ITP_TRST#

THERMDA
THERMDC
H_THERMTRIP#

4

JP20A

P4

A3#

U4

A4#

V3

A5#

R3

A6#

V2

A7#

W1

A8#

T4

A9#

W2

A10#

Y4

A11#

Y1

A12#

U1

A13#

AA3

A14#

Y3

A15#

AA2

A16#

AF4

A17#

AC4

A18#

AC7

A19#

AC3

A20#

AD3

A21#

AE4

A22#

AD2

A23#

AB4

A24#

AC6

ADDR GROUP

A25#

AD5

A26#

AE2

A27#

AD6

A28#

AF3

A29#

AE1

A30#

AF1

A31#

R2

REQ0#

P3

REQ1#

T2

REQ2#

P1

REQ3#

T1

REQ4#

U3

ADSTB0#

AE5

ADSTB1#

A16

ITP_CLK0

A15

ITP_CLK1

B15

BCLK0

B14

BCLK1

N2

ADS#

L1

BNR#

J3

BPRI#

N4

BR0#

L4

DEFER#

H2

DRDY#

K3

HIT#

K4

HITM#

A4

IERR#

J2

LOCK#

B11

RESET#

H1

RS0#

K1

RS1#

L2

RS2#

M3

TRDY#

C8

BPM0#

B8

BPM1#

A9

BPM2#

C9

BPM3#

A7

DBR#

M2

DBSY#

B7

DPSLP#

G1

DPRSTP#

C19

DPWR#

A10

PRDY#

B10

PREQ#

B17

PROCHOT#

E4

PWRGOOD

A6

SLP#

A13

TCK

C12

TDI

A12

TDO

C5

TEST1

F23

TEST2

C11

TMS

B13

TRST#

B18

THERMDA

A18

THERMDC

C17

THERMTRIP#

TYCO_1612365-1_Dothan

Dothan

DATA GROUP

HOST CLK

CONTROL GROUP

MISC

THERMAL
DIODE

LEGACY CPU

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#

D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DINV0#
DINV1#
DINV2#
DINV3#

DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#

A20M#
FERR#

IGNNE#

INIT#

LINT0
LINT1

STPCLK#

SMI#

A19
A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26

D25
J26
T24
AD20

C23
K24
W25
AE24
C22
L24
W24
AE25

C2
D3
A3
B5
D1
D4

C6
B4

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_A20M#
H_FERR#
H_IGNNE#
H_INIT#
H_INTR
H_NMI

H_STPCLK#
H_SMI#

3

C402

2200P_0402_50V7K

EC_SMB_CK233
EC_SMB_DA233

1

2

2

THERMDA

THERMDC
EC_SMB_CK2
EC_SMB_DA2

U29

2

D+

3

D-

8

SCLK

7

SDATA

ADM1032ARM_RM8

+3VS

1

C401

0.1U_0402_16V4Z

2

VDD1

ALERT#

THERM#

GND

1

12

R379

10K_0402_5%@

1
6
4
5

SMBus Address: 1001110X (b)

+1.05VS

H_DINV#0 6
H_DINV#1 6
H_DINV#2 6
H_DINV#3 6

H_DSTBN#0 6
H_DSTBN#1 6
H_DSTBN#2 6
H_DSTBN#3 6
H_DSTBP#0 6
H_DSTBP#1 6
H_DSTBP#2 6
H_DSTBP#3 6

H_A20M# 17
H_FERR# 17
H_IGNNE# 17
H_INIT# 17
H_INTR 17
H_NMI 17

H_STPCLK# 17
H_SMI# 17

ITP_TDI
ITP_TDO
H_CPURST#
ITP_TMS
PRO_CHOT#
H_PWRGOOD
H_IERR#

ITP_DBRRESET#

ITP_TRST#

ITP_TCK
TEST1
TEST2

0415

H_INIT#

H_NMI

H_SMI#

H_CPURST#

R53 150_0402_5%
R383 54.9_0402_1%@
R382 54.9_0402_1%@
R54 40.2_0402_1%
R386 56_0402_5%
R56 200_0402_5%
R380 56_0402_5%

R381 150_0402_5%

R384 680_0402_5%
R385 27.4_0402_1%
R55 1K_0402_5%@
R401 1K_0402_5%@

C685 47P_0402_50V8J

1 2

C686 47P_0402_50V8J

1 2

C687 47P_0402_50V8J

1 2

C688 47P_0402_50V8J

1 2

12
12
12
12
12
12
12

12

12
12
12
12

+3VS

THERMDA & THERMDC Trace / Space = 10 / 10 mil

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/03/08 2006/03/08

3

Compal Secret Data

Deciphered Date

Title

Dothon Processor in mFCPGA479

Size Document Number Rev

Custom

EFL50 LA-2761

2

Date: Sheet

451Wednesday, April 20, 2005

1

0.2

of

5

JP20B

+1.05VS

VCCSENSE
VSSSENSE

VCCA0
VCCA1
VCCA2
VCCA3

PSI#
CPU_VID0

CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5

GTL_REF0

CPU_BSEL0
CPU_BSEL1

COMP0
COMP1
COMP2
COMP3

AE7

VCCSENSE

AF6

VSSSENSE

F26

VCCA0

B1

VCCA1

N1

VCCA2

AC26

VCCA3

P23

VCCQ0

W4

VCCQ1

D10

VCCP

D12

VCCP

D14

VCCP

D16

VCCP

E11

VCCP

E13

VCCP

E15

VCCP

F10

VCCP

F12

VCCP

F14

VCCP

F16

VCCP

K6

VCCP

L5

VCCP

L21

VCCP

M6

VCCP

M22

VCCP

N5

VCCP

N21

VCCP

P6

VCCP

P22

VCCP

R5

VCCP

R21

VCCP

T6

VCCP

T22

VCCP

U21

VCCP

D6

VCC

D8

VCC

D18

VCC

D20

VCC

D22

VCC

E5

VCC

E7

VCC

E9

VCC

E17

VCC

E19

VCC

E21

VCC

F6

VCC

F8

VCC

F18

VCC

E1

PSI#

E2

VID0

F2

VID1

F3

VID2

G3

VID3

G4

VID4

H4

VID5

AD26

GTLREF

C16

BSEL0

C14

BSEL1

P25

COMP0

P26

COMP1

AB2

COMP2

AB1

COMP3

B2

RSVD

C3

RSVD

E26

RSVD

AF7

RSVD

AC1

RSVD

TYCO_1612365-1_Dothan

R144 54.9_0402_1%@

1 2

R141 54.9_0402_1%@

1 2

30 mils

R393 0_0603_5%

1 2

R388 0_0603_5%@

+VCCA

D D

1.8V FOR DOTHAN-A

1 2

+1.8VS

R419 0_1206_5%@

1 2

R387 0_0603_5%@

1 2

R417 0_0603_5%@

1 2

1.5V FOR DOTHAN-B

1 2

+1.5VS

R399 0_1206_5%

Trace Width>= 40 mils

C C

B B

+VCCA

0.01U_0402_16V7K

C405

R422
1K_0402_1%

1 2

R420 2K_0402_1%

1

2

+1.05VS

12

CPU_BSEL013
CPU_BSEL113

1

C463

2

10U_0805_10V4Z

+CPU_CORE

PSI#46
CPU_VID046

CPU_VID146
CPU_VID246
CPU_VID346
CPU_VID446
CPU_VID546

500 mils

R408 27.4_0402_1%

A A

50 mils

1 2

R407 54.9_0402_1%

1 2

R424 27.4_0402_1%

1 2

R425 54.9_0402_1%

1 2

COMP0
COMP1
COMP2
COMP3

TRACE CLOSELY CPU > 50 mils

COMP0, COMP2 layout : Width 18mils and Space 25mils
COMP1, COMP3 layout : Space 25mils

5

4

A2

VSS

A5

VSS

A8

VSS

A11

VSS

A14

VSS

A17

VSS

A20

VSS

A23

VSS

A26

VSS

B3

VSS

B6

VSS

B9

VSS

B12

Dothan

VSS

B16

VSS

B19

VSS

B22

VSS

B25

VSS

C1

VSS

C4

VSS

C7

VSS

C10

VSS

C13

VSS

C15

VSS

C18

VSS

C21

VSS

C24

VSS

D2

VSS

D5

VSS

D7

VSS

D9

VSS

D11

VSS

D13

VSS

D15

VSS

D17

VSS

D19

VSS

D21

VSS

D23

VSS

D26

VSS

E3

VSS

E6

VSS

E8

VSS

E10

VSS

E12

VSS

E14

VSS

E16

VSS

E18

VSS

E20

VSS

E22

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

E25
F1
F4
F5
F7
F9
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
G23
G26
H3
H5
H21
H25
J1
J4
J6
J22
J24
K2
K5
K21
K23
K26
L3
L6
L22
L25
M1

POWER, GROUNG, RESERVED SIGNALS AND NC

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+1.05VS

1

+

2

150U_D2_6.3VM

Issued Date

+CPU_CORE

220U_D2_4VM_R12

1

+

C49

2

220U_D2_4VM_R12

+CPU_CORE

10U_0805_10V4Z

1

C455

2

10U_0805_10V4Z

+CPU_CORE

10U_0805_10V4Z

1

C423

2

10U_0805_10V4Z

+CPU_CORE

10U_0805_10V4Z

1

C60

2

10U_0805_10V4Z

+CPU_CORE

10U_0805_10V4Z

1

C71

2

10U_0805_10V4Z

+CPU_CORE

10U_0805_10V4Z

1

C667

2

10U_0805_10V4Z

Vcc-core
Decoupling

SPCAP,Polymer
MLCC 0805 X5R

0.1U_0402_16V4Z

1

C404

C63

2

3

220U_D2_4VM_R12

1

+

C50

2

220U_D2_4VM_R12

1

C456

2

10U_0805_10V4Z

1

C112

2

10U_0805_10V4Z

1

C57

2

10U_0805_10V4Z

1

C81

2

10U_0805_10V4Z

1

C668

2

10U_0805_10V4Z

1

C150

2

10U_0805_10V4Z

1

C424

2

10U_0805_10V4Z

1

C421

2

10U_0805_10V4Z

1

C61

2

10U_0805_10V4Z

1

C452

2

10U_0805_10V4Z

1

C669

2

+

1

C435

2

1

C420

2

1

C72

2

1

C113

2

1

C670

2

1

+

C151

2

10U_0805_10V4Z

1

C443

2

10U_0805_10V4Z

10U_0805_10V4Z

1

C434

2

10U_0805_10V4Z

10U_0805_10V4Z

1

C82

2

10U_0805_10V4Z

10U_0805_10V4Z

1

C96

2

10U_0805_10V4Z

10U_0805_10V4Z

1

C671

2

10U_0805_10V4Z

1

C448

2

1

C442

2

1

C97

2

1

C108

2

1

C672

2

1

C453

2

10U_0805_10V4Z

1

C447

2

10U_0805_10V4Z

1

C109

2

10U_0805_10V4Z

1

C58

2

10U_0805_10V4Z

1

C673

2

10U_0805_10V4Z

0331

C,uF ESR, mohm ESL,nH

3X330uF 9m ohm/3 3.5nH/4
35X10uF 5m ohm/35 0.6nH/35

1

C75

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C43

C85

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C68

2

2

0.1U_0402_16V4Z

2005/03/08 2006/03/08

3

0.1U_0402_16V4Z

1

C78

C90

2

0.1U_0402_16V4Z

Compal Secret Data

1

2

Deciphered Date

2

0.1U_0402_16V4Z

1

C42

2

2

1

C41

2

1

+CPU_CORE

1

C98

2

0.1U_0402_16V4Z

Custom

JP20C

F20

VCC

F22

VCC

G5

VCC

G21

VCC

H6

VCC

H22

VCC

J5

VCC

J21

VCC

K22

VCC

U5

VCC

V6

VCC

V22

VCC

W5

VCC

W21

VCC

Y6

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

POWER, GROUND

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

Dothan

Y22
AA5
AA7

AA9
AA11
AA13
AA15
AA17
AA19
AA21

AB6

AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22

AC9
AC11
AC13
AC15
AC17
AC19

AD8
AD10
AD12
AD14
AD16
AD18

AE9
AE11
AE13
AE15
AE17
AE19

AF8

AF10
AF12
AF14
AF16
AF18

M4

M5
M21
M24

N3

N6
N22
N23
N26

P2

P5
P21
P24

R1

R4

R6
R22
R25

T3

T5

T21
T23

TYCO_1612365-1_Dothan

Title

Dothan Processor in mFCPGA479

Size Document Number Rev

EFL50 LA-2761

Date: Sheet

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

1

T26
U2
U6
U22
U24
V1
V4
V5
V21
V25
W3
W6
W22
W23
W26
Y2
Y5
Y21
Y24
AA1
AA4
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC21
AC24
AD1
AD4
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE3
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF2
AF5
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF24

551Wednesday, April 20, 2005

0.2

of

5

H_RS#[0..2]

H_A#[3..31]4
H_REQ#[0..4]4

D D

C C

CLK_MCH_BCLK#13
CLK_MCH_BCLK13

B B

H_A#[3..31]

H_ADSTB#04
H_ADSTB#14

H_DSTBN#04
H_DSTBN#14
H_DSTBN#24
H_DSTBN#34
H_DSTBP#04
H_DSTBP#14
H_DSTBP#24
H_DSTBP#34
H_DINV#04
H_DINV#14
H_DINV#24
H_DINV#34

H_CPURST#4

H_ADS#4
H_TRDY#4

H_DPWR#4

H_DRDY#4
H_DEFER#4

H_HITM#4
H_HIT#4
H_LOCK#4
H_BR0#4
H_BNR#4
H_BPRI#4
H_DBSY#4

CLK_MCH_BCLK#
CLK_MCH_BCLK

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_CPURST#
H_ADS#

H_TRDY#
H_DPWR#
H_DRDY#
H_DEFER#

H_HITM#
H_HIT#
H_LOCK#
H_BR0#
H_BNR#
H_BPRI#
H_DBSY#

Un-pop for Dothan-A

H_CPUSLP#4,17

A A

(5mil:15mil) (12mil:10mil)

H_VREF H_XSWING

1

C138

0.1U_0402_16V4Z

2

H_CPUSLP# CPU_SLP#

+1.05VS

12

R405
100_0603_1%

12

R406
200_0603_1%

5

H_RS#[0..2] 4

U31A

H_A#3

G9

HA3#

A10

B10
E10
G10

E11
G11

G13
C10
C11
D11
C12
B13
A12

G12
E12
C13
B11
D13
A13

A11

E13
AB1

AB2

H10

C9

E9
B7

F9

D8

D9

F10

F12

F13

A7

D7

B8

C7

A8
B9

G4

K1

R3

V3

G5

K2
R2
W4
H8

K3

T7
U5

F8

B5
G6

F7

E6

F6
D6
D4

B3

E7

A5
D5
C6
G8

A4
C5

B4

Alviso

HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#

HPCREQ#
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HADSTB#0
HADSTB#1

HCLKN
HCLKP

HDSTBN#0
HDSTBN#1
HDSTBN#2
HDSTBN#3
HDSTBP#0
HDSTBP#1
HDSTBP#2
HDSTBP#3
HDINV#0
HDINV#1
HDINV#2
HDINV#3

HCPURST#
HADS#

HTRDY#
HDPWR#
HDRDY#
HDEFER#
HEDRDY#
HHITM#
HHIT#
HLOCK#
HBREQ0#
HBNR#
HBPRI#
HDBSY#
HCPUSLP#
HRS0#
HRS1#
HRS2#

1

C459

0.1U_0402_16V4Z

2

H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3

H_REQ#4
H_ADSTB#0
H_ADSTB#1

CPU_SLP#
H_RS#0
H_RS#1
H_RS#2

R130 0_0402_5%

1 2

HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#

HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#

HOST

HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

HVREF
HXRCOMP
HXSCOMP
HYRCOMP
HYSCOMP

HXSWING
HYSWING

ALVISO_BGA1257

+1.05VS

12

R409
221_0603_1%

12

R411
100_0603_1%

E4
E1
F4
H7
E2
F1
E3
D3
K7
F2
J7
J8
H6
F3
K8
H5
H1
H2
K5
K6
J4
G3
H3
J1
L5
K4
J5
P7
L7
J3
P5
L3
U7
V6
R6
R5
P3
T8
R7
R8
U8
R4
T4
T5
R1
T3
V8
U6
W6
U3
V5
W8
W7
U2
U1
Y5
Y2
V4
Y7
W1
W3
Y3
Y6
W2

J11
C1
C2
T1
L1
D1
P1

4

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_VREF
H_XRCOMP
H_XSCOMP
H_YRCOMP
H_YSCOMP
H_XSWING
H_YSWING

H_D#[0..63]H_REQ#[0..4]

+1.8V

R120 24.9_0402_1%
R111 54.9_0402_1%
R151 24.9_0402_1%
R145 54.9_0402_1%

1 2
1 2

12
12

H_D#[0..63] 4

R162 40.2_0402_1%

1 2

R163 40.2_0402_1%

1 2

R165 80.6_0402_1%

1 2

R166 80.6_0402_1%

1 2

+1.05VS

3

DMI_ITX_MRX_N018
DMI_ITX_MRX_N118
DMI_ITX_MRX_N218
DMI_ITX_MRX_N318

DMI_ITX_MRX_P018
DMI_ITX_MRX_P118
DMI_ITX_MRX_P218
DMI_ITX_MRX_P318

DMI_MTX_IRX_N018
DMI_MTX_IRX_N118
DMI_MTX_IRX_N218
DMI_MTX_IRX_N318

DMI_MTX_IRX_P018
DMI_MTX_IRX_P118
DMI_MTX_IRX_P218
DMI_MTX_IRX_P318

M_CLK_DDR011
M_CLK_DDR111

M_CLK_DDR312
M_CLK_DDR412

M_CLK_DDR#011
M_CLK_DDR#111

M_CLK_DDR#312
M_CLK_DDR#412

DDR_CKE0_DIMMA11
DDR_CKE1_DIMMA11
DDR_CKE2_DIMMB12
DDR_CKE3_DIMMB12

DDR_CS0_DIMMA#11
DDR_CS1_DIMMA#11
DDR_CS2_DIMMB#12
DDR_CS3_DIMMB#12

10mils

10mils

(10mil:20mil)

H_XRCOMP & H_YRCOMP Trace / Space = 10 / 20 mil

+1.05VS

12

R421
221_0603_1%

4

H_YSWING

1

C149

0.1U_0402_16V4Z

2

(12mil:10mil)

12

R423
100_0603_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

U31B

DMI_ITX_MRX_N0
DMI_ITX_MRX_N1
DMI_ITX_MRX_N2
DMI_ITX_MRX_N3

DMI_ITX_MRX_P0
DMI_ITX_MRX_P1
DMI_ITX_MRX_P2
DMI_ITX_MRX_P3

DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3

DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3

M_CLK_DDR0
M_CLK_DDR1

M_CLK_DDR3
M_CLK_DDR4

M_CLK_DDR#0
M_CLK_DDR#1

M_CLK_DDR#3
M_CLK_DDR#4

DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB

DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#

M_OCDCOMP0
M_OCDCOMP1

M_ODT011
M_ODT111
M_ODT212
M_ODT312

M_RCOMPN
M_RCOMPP
SMVREF

M_XSLEW
M_YSLEW

10mils

R164

1K_0402_1%

R158

1K_0402_1%

2005/03/08 2006/03/08

AA31

DMIRXN0

AB35

DMIRXN1

AC31

DMIRXN2

AD35

DMIRXN3

Y31

DMIRXP0

AA35

DMIRXP1

AB31

DMIRXP2

AC35

DMIRXP3

AA33

DMITXN0

AB37

DMITXN1

AC33

DMITXN2

AD37

DMITXN3

Y33

DMITXP0

AA37

DMITXP1

AB33

DMITXP2

AC37

DMITXP3

AM33

SM_CK0

AL1

SM_CK1

AE11

SM_CK2

AJ34

SM_CK3

AF6

SM_CK4

AC10

SM_CK5

AN33

SM_CK0#

AK1

SM_CK1#

AE10

SM_CK2#

AJ33

SM_CK3#

AF5

SM_CK4#

AD10

SM_CK5#

AP21

SM_CKE0

AM21

SM_CKE1

AH21

SM_CKE2

AK21

SM_CKE3

AN16

SM_CS0#

AM14

SM_CS1#

AH15

SM_CS2#

AG16

SM_CS3#

AF22

SM_OCDCOMP0

AF16

AP14

AL15
AM11
AN10

AK10
AK11

AF37

AD1
AE27
AE28

AF9

AF10

12

0.1U_0402_16V4Z

12

C185

SM_OCDCOMP1
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3

SMRCOMPN
SMRCOMPP
SMVREF0
SMVREF1
SMXSLEWIN
SMXSLEWOUT
SMYSLEWIN
SMYSLEWOUT

ALVISO_BGA1257

1

2

M_ODT0
M_ODT1
M_ODT2
M_ODT3

+1.8V

Compal Secret Data

Deciphered Date

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8

CFG9
CFG10
CFG11
CFG12

DMIDDR MUXING

1

2

CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

RSVD21
RSVD22

CFG/RSVD

RSVD23
RSVD24
RSVD25
RSVD26
RSVD27

BM_BUSY#

EXT_TS0#
EXT_TS1#

THRMTRIP#

PWROK

RSTIN#

PM

DREF_CLKN

DREF_CLKP

DREF_SSCLKP

CLK

DREF_SSCLKN

NC

SMVREF

C179

0.1U_0402_16V4Z

2

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8

NC9
NC10
NC11

CLK_DREF_SSC
CLK_DREF_SSC#

CFG0

G16

MCH_CLKSEL1

H13

MCH_CLKSEL0

G14
F16
F15

CFG5

G15

CFG6

E16

CFG7

D17
J16

CFG9

D15
E15
D14

CFG12

E14

CFG13

H12
C14
H15

CFG16 CFG6

J15
H14

CFG18

G22

CFG19

G23
D23
G25
G24
J17
A31
A30
D26
D25

PM_BMBUSY#

J23

EXT_TS#0

J21

EXT_TS#1

H22

H_THERMTRIP#

F5

VGATE

AD30

PLT_RST#

AE29

CLK_DREF_96M#

A24

CLK_DREF_96M

A23

CLK_DREF_SSC

D37

CLK_DREF_SSC#

C37

AP37
AN37
AP36
AP2
AP1
AN1
B1
A2
B37
A36
A37

CFG[2:0]
CFG5
CFG6
CFG7

CFG9

CFG[13:12]

CFG16
(FSB Dynamic
ODT)

CFG18
(VCC Select)

CFG19
(VTT Select)

Title

Size Document Number Rev

Custom

Date: Sheet

R114 0_0402_5%PM@

1 2

R122 0_0402_5%PM@

1 2

MCH_CLKSEL1 13
MCH_CLKSEL0 13

CFG0

R131 10K_0402_5%

1 2

CFG0

R132 1K_0402_5%@

CFG5

CFG7
CFG9
CFG12
CFG13
CFG16

1 2

R127 1K_0402_5%@

1 2

R124 1K_0402_5%

1 2

R117 1K_0402_5%@

1 2

R119 1K_0402_5%@

1 2

R125 1K_0402_5%@

1 2

R137 1K_0402_5%@

1 2

R140 1K_0402_5%@

1 2

CFG[17:3]: internal pull-up

CFG18

R128 1K_0402_5%@

CFG19

1 2

R135 1K_0402_5%@

1 2

CFG[19:18]: internal pull-down

PM_BMBUSY# 18

H_THERMTRIP# 4,17

VGATE 13,18,46
PLT_RST# 16,18,20,32,33,41

CLK_DREF_96M# 13
CLK_DREF_96M 13
CLK_DREF_SSC 13
CLK_DREF_SSC# 13

EXT_TS#0

R139 10K_0402_5%

EXT_TS#1

1 2

R136 10K_0402_5%

1 2

Refer to sheet 6 for FSB
frequency select
Low = DMI x 2

High = DMI x 4
Low = DDR-II

High = DDR-I
Low = DT/Transportable CPU

High = Mobile CPU
Low = Reverse Lane

High = Normal Operation
00 = Reserved

01 = XOR Mode Enabled
10 = All Z Mode Enabled
11 = Normal Operation (Default)

Low = Disabled
High = Enabled

Low = 1.05V (Default)
High = 1.5V

Low = 1.05V (Default)
High = 1.2V

Alviso HOST (1/5)

EFL50 LA-2761

1

+1.5VS

+1.05VS

+2.5VS

+2.5VS

*
*

*

*

*

*

*

*

0.2

651Wednesday, April 20, 2005

1

of

5

D D

4

3

2

1

DDR_A_BS#011
DDR_A_BS#111
DDR_A_BS#211

DDR_A_DM[0..7]11

DDR_A_DQS[0..7]11

C C

B B

DDR_A_DQS#[0..7]11

DDR_A_MA[0..13]11

DDR_A_CAS#11
DDR_A_RAS#11

DDR_A_WE#11 DDR_B_WE#12

DDR_A_BS#0
DDR_A_BS#1
DDR_A_BS#2

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13

DDR_A_CAS#
DDR_A_RAS#

DDR_A_WE# DDR_B_WE#

AK15
AK16

AL21
AJ37

AP35

AL29

AP24

AP9
AP4

AJ2

AD3

AK36
AP33
AN29
AP23

AM8
AM4

AJ1

AE5

AK35
AP34
AN30
AN23

AN8
AM5
AH1

AE4

AL17
AP17
AP18
AM17
AN18
AM18

AL19
AP20
AM19

AL20
AM16
AN20
AM20
AM15

AN15
AP16

AF29

AF28
AP15

SA_BS0#
SA_BS1#
SA_BS2#

SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7

SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13

SA_CAS#
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#

U31C

SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8

SADQ9
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43

DDR MEMORY SYSTEM A

SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63

ALVISO_BGA1257

AG35
AH35
AL35
AL37
AH36
AJ35
AK37
AL34
AM36
AN35
AP32
AM31
AM34
AM35
AL32
AM32
AN31
AP31
AN28
AP28
AL30
AM30
AM28
AL28
AP27
AM27
AM23
AM22
AL23
AM24
AN22
AP22
AM9
AL9
AL6
AP7
AP11
AP10
AL7
AM7
AN5
AN6
AN3
AP3
AP6
AM6
AL4
AM3
AK2
AK3
AG2
AG1
AL3
AM2
AH3
AG3
AF3
AE3
AD6
AC4
AF2
AF1
AD4
AD5

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

DDR_B_BS#012
DDR_B_BS#112
DDR_B_BS#212

DDR_B_DM[0..7]12

DDR_B_DQS[0..7]12

DDR_B_DQS#[0..7]12

DDR_B_MA[0..13]12

DDR_B_CAS#12
DDR_B_RAS#12

DDR_B_BS#0
DDR_B_BS#1
DDR_B_BS#2

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13

DDR_B_CAS#
DDR_B_RAS#

AJ15
AG17
AG21

AF32
AK34
AK27
AK24

AJ10

AK5
AE7
AB7

AF34
AK32

AJ28
AK23
AM10

AH6
AF8
AB4

AF35
AK33
AK28

AJ23

AL10

AH7
AF7
AB5

AH17
AK17
AH18

AJ18
AK18

AJ19
AK19
AH19

AJ20
AH20

AJ16
AG18
AG20
AG15

AH14
AK14

AF15

AF14
AH16

SB_BS0#
SB_BS1#
SB_BS2#

SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7

SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7

SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13

SB_CAS#
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#

U31D

SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8

SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37
SBDQ38
SBDQ39
SBDQ40
SBDQ41
SBDQ42

DDR SYSTEM MEMORY B

SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63

ALVISO_BGA1257

AE31
AE32
AG32
AG36
AE34
AE33
AF31
AF30
AH33
AH32
AK31
AG30
AG34
AG33
AH31
AJ31
AK30
AJ30
AH29
AH28
AK29
AH30
AH27
AG28
AF24
AG23
AJ22
AK22
AH24
AH23
AG22
AJ21
AG10
AG9
AG8
AH8
AH11
AH10
AJ9
AK9
AJ7
AK6
AJ4
AH5
AK8
AJ8
AJ5
AK4
AG5
AG4
AD8
AD9
AH4
AG6
AE8
AD7
AC5
AB8
AB6
AA8
AC8
AC7
AA4
AA5

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

DDR_B_D[0..63] 12DDR_A_D[0..63] 11

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/03/08 2006/03/08

3

Compal Secret Data

Deciphered Date

Title

Alviso DDR (2/5)

Size Document Number Rev

Custom

EFL50 LA-2761

2

Date: Sheet

751Wednesday, April 20, 2005

1

0.2

of

5

+3VS +2.5VS

12

R92

2.2K_0402_5%GM@

+2.5VS

S

GMCH_TV_COMPS21
GMCH_TV_LUMA21
GMCH_TV_CRMA21

G

2

GMCH_ENBKL

GMCH_LCD_CLK

13

D

Q9

2N7002_SOT23GM@

GMCH_CRT_CLK14
GMCH_CRT_DATA14
GMCH_CRT_B14

GMCH_CRT_G14
GMCH_CRT_R14

GMCH_CRT_VSYNC14
GMCH_CRT_HSYNC14

GMCH_ENBKL15,33

D D

C C

+2.5VS

R97 4.7K_0402_5%

1 2

R98 4.7K_0402_5%

1 2

R100 2.2K_0402_5%

1 2

R99 2.2K_0402_5%

1 2

R134 100K_0402_5%

1 2

R112 1.5K_0402_1%

B B

GM@

4.7K_0402_5%

LDDC_CLK

1 2

R109 150_0402_5%PM@

1 2

R118 150_0402_5%PM@

1 2

R101 150_0402_5%PM@

1 2

R104

1 2

2

G

1 3

D

S

Q10

R88 0_0402_5%@

GMCH_TV_COMPS
GMCH_TV_LUMA
GMCH_TV_CRMA

GMCH_CRT_CLK
GMCH_CRT_DATA
LCTLB_DATA
LCTLA_CLK

LBKLT_EN
LIBG
GMCH_TV_COMPS
GMCH_TV_LUMA
GMCH_TV_CRMA

+3VS

R87

4.7K_0402_5%GM@

1 2

BSS138_SOT23GM@

LBKLT_EN

12

R143 4.99K_0603_1%

GMCH_CRT_CLK
GMCH_CRT_DATA

R121 150_0402_5%PM@
R107 150_0402_5%PM@
R403 150_0402_5%PM@

GMCH_LCD_CLK 15

4

SDVO_SDAT15,41
SDVO_SCLK15,41
CLK_MCH_3GPLL#13
CLK_MCH_3GPLL13

12

12
12
12

GMCH_ENVDD15

GMCH_TXCLK-15
GMCH_TXCLK+15
GMCH_TZCLK-15
GMCH_TZCLK+15

GMCH_TXOUT0-15
GMCH_TXOUT1-15
GMCH_TXOUT2-15

GMCH_TXOUT0+15
GMCH_TXOUT1+15
GMCH_TXOUT2+15

GMCH_TZOUT0-15
GMCH_TZOUT1-15
GMCH_TZOUT2-15

GMCH_TZOUT0+15
GMCH_TZOUT1+15
GMCH_TZOUT2+15

SDVO_SDAT
SDVO_SCLK
CLK_MCH_3GPLL#
CLK_MCH_3GPLL

TV_REFSET

12

R108 0_0402_5%

GMCH_CRT_B
GMCH_CRT_G
GMCH_CRT_R
GMCH_CRT_VSYNC

GMCH_CRT_HSYNC

1 2

R142 255_0402_1%

REFSET

LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
GMCH_ENVDD
LIBG

GMCH_TXCLK­GMCH_TXCLK+
GMCH_TZCLK­GMCH_TZCLK+

GMCH_TXOUT0­GMCH_TXOUT1­GMCH_TXOUT2-

GMCH_TXOUT0+
GMCH_TXOUT1+
GMCH_TXOUT2+

GMCH_TZOUT0­GMCH_TZOUT1­GMCH_TZOUT2-

GMCH_TZOUT0+
GMCH_TZOUT1+
GMCH_TZOUT2+

U31G

H24

H25
AB29
AC29

A15

C16

A17

J18
B15
B16
B17

E24
E23
E21
D21
C20
B20
A19
B19
H21
G21

J20

E25

F25
C23
C22

F23

F22

F26
C33
C31

F28

F27
B30

B29
C25
C24

B34
B33
B32

A34
A33
B31

C29
D28
C27

C28
D27
C26

ALVISO_BGA1257

SDVOCTRL_DATA
SDVOCTRL_CLK
GCLKN
GCLKP

TVDAC_A
TVDAC_B
TVDAC_C
TV_REFSET
TV_IRTNA
TV_IRTNB
TV_IRTNC

DDCCLK
DDCDATA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
VSYNC
HSYNC
REFSET

LBKLT_CTL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL

LACLKN
LACLKP
LBCLKN
LBCLKP

LADATAN0
LADATAN1
LADATAN2

LADATAP0
LADATAP1
LADATAP2

LBDATAN0
LBDATAN1
LBDATAN2

LBDATAP0
LBDATAP1
LBDATAP2

3

EXP_RXN0/SDVO_TVCLKIN#

MISCTVVGALVDS

EXP_RXN1/SDVO_INT#

EXP_RXN2/SDVO_FLDSTALL#

EXP_RXP0/SDVO_TVCLKIN

EXP_RXP1/SDVO_INT

EXP_RXP2/SDVO_FLDSTALL

EXP_TXN0/SDVOB_RED#

EXP_TXN1/SDVOB_GREEN#

EXP_TXN2/SDVOB_BLUE#

EXP_TXN3/SDVOB_CLKN
EXP_TXN4/SDVOC_RED#

EXP_TXN5/SDVOC_GREEN#

EXP_TXN6/SDVOC_BLUE#

EXP_TXN7/SDVOC_CLKN

PCI - EXPRESS GRAPHICS

EXP_TXP0/SDVOB_RED

EXP_TXP1/SDVOB_GREEN

EXP_TXP2/SDVOB_BLUE
EXP_TXP3/SDVOB_CLKP

EXP_TXP4/SDVOC_RED

EXP_TXP5/SDVOC_GREEN

EXP_TXP6/SDVOC_BLUE
EXP_TXP7/SDVOC_CLKP

EXP_COMPI

EXP_ICOMPO

EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8

EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15

EXP_RXP3

EXP_RXP4

EXP_RXP5

EXP_RXP6

EXP_RXP7

EXP_RXP8

EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15

EXP_TXN8

EXP_TXN9

EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15

EXP_TXP8

EXP_TXP9
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15

2

PCIE_MTX_C_GRX_N[0..15]15,41

PCIE_MTX_C_GRX_P[0..15]15,41
PCEI_GTX_C_MRX_N[0..15]15,41
PCEI_GTX_C_MRX_P[0..15]15,41

PEG_COMP

D36
D34

PCEI_GTX_C_MRX_N0

E30

PCEI_GTX_C_MRX_N1

F34

PCEI_GTX_C_MRX_N2

G30

PCEI_GTX_C_MRX_N3

H34

PCEI_GTX_C_MRX_N4

J30

PCEI_GTX_C_MRX_N5

K34

PCEI_GTX_C_MRX_N6

L30

PCEI_GTX_C_MRX_N7

M34

PCEI_GTX_C_MRX_N8

N30

PCEI_GTX_C_MRX_N9

P34

PCEI_GTX_C_MRX_N10

R30

PCEI_GTX_C_MRX_N11

T34

PCEI_GTX_C_MRX_N12

U30

PCEI_GTX_C_MRX_N13

V34

PCEI_GTX_C_MRX_N14

W30

PCEI_GTX_C_MRX_N15

Y34

PCEI_GTX_C_MRX_P0

D30

PCEI_GTX_C_MRX_P1

E34

PCEI_GTX_C_MRX_P2

F30

PCEI_GTX_C_MRX_P3

G34

PCEI_GTX_C_MRX_P4

H30

PCEI_GTX_C_MRX_P5

J34

PCEI_GTX_C_MRX_P6

K30

PCEI_GTX_C_MRX_P7

L34

PCEI_GTX_C_MRX_P8

M30

PCEI_GTX_C_MRX_P9

N34

PCEI_GTX_C_MRX_P10

P30

PCEI_GTX_C_MRX_P11

R34

PCEI_GTX_C_MRX_P12

T30

PCEI_GTX_C_MRX_P13

U34

PCEI_GTX_C_MRX_P14

V30

PCEI_GTX_C_MRX_P15

W34

PCIE_MTX_GRX_N0

E32

PCIE_MTX_GRX_N1

F36

PCIE_MTX_GRX_N2

G32

PCIE_MTX_GRX_N3

H36

PCIE_MTX_GRX_N4 PCIE_MTX_C_GRX_N4

J32

PCIE_MTX_GRX_N5

K36

PCIE_MTX_GRX_N6

L32

PCIE_MTX_GRX_N7

M36

PCIE_MTX_GRX_N8

N32

PCIE_MTX_GRX_N9

P36

PCIE_MTX_GRX_N10

R32

PCIE_MTX_GRX_N11

T36

PCIE_MTX_GRX_N12

U32

PCIE_MTX_GRX_N13

V36

PCIE_MTX_GRX_N14

W32

PCIE_MTX_GRX_N15

Y36

PCIE_MTX_GRX_P0

D32

PCIE_MTX_GRX_P1

E36

PCIE_MTX_GRX_P2

F32

PCIE_MTX_GRX_P3

G36

PCIE_MTX_GRX_P4

H32

PCIE_MTX_GRX_P5

J36

PCIE_MTX_GRX_P6

K32

PCIE_MTX_GRX_P7

L36

PCIE_MTX_GRX_P8

M32

PCIE_MTX_GRX_P9

N36

PCIE_MTX_GRX_P10

P32

PCIE_MTX_GRX_P11

R36

PCIE_MTX_GRX_P12

T32

PCIE_MTX_GRX_P13

U36

PCIE_MTX_GRX_P14

V32

PCIE_MTX_GRX_P15

W36

1 2

R115 24.9_0402_1%

C422 0.1U_0402_16V4Z

1 2

C437 0.1U_0402_16V4Z

1 2

C445 0.1U_0402_16V4Z

1 2

C451 0.1U_0402_16V4Z

1 2

C460 0.1U_0402_16V4Z

1 2

C465 0.1U_0402_16V4Z

1 2

C469 0.1U_0402_16V4Z

1 2

C476 0.1U_0402_16V4Z

1 2

C418 0.1U_0402_16V4Z

1 2

C430 0.1U_0402_16V4Z

1 2

C444 0.1U_0402_16V4Z

1 2

C450 0.1U_0402_16V4Z

1 2

C458 0.1U_0402_16V4Z

1 2

C464 0.1U_0402_16V4Z

1 2

C468 0.1U_0402_16V4Z

1 2

C475 0.1U_0402_16V4Z

1 2

PCIE_MTX_C_GRX_N[0..15]

PCIE_MTX_C_GRX_P[0..15]
PCEI_GTX_C_MRX_N[0..15]
PCEI_GTX_C_MRX_P[0..15]

+1.5VS

C416 0.1U_0402_16V4Z

1 2

C428 0.1U_0402_16V4Z

1 2

C440 0.1U_0402_16V4Z

1 2

C449 0.1U_0402_16V4Z

1 2

C457 0.1U_0402_16V4Z

1 2

C462 0.1U_0402_16V4Z

1 2

C467 0.1U_0402_16V4Z

1 2

C474 0.1U_0402_16V4Z

1 2

C413 0.1U_0402_16V4Z

1 2

C425 0.1U_0402_16V4Z

1 2

C438 0.1U_0402_16V4Z

1 2

C446 0.1U_0402_16V4Z

1 2

C454 0.1U_0402_16V4Z

1 2

C461 0.1U_0402_16V4Z

1 2

C466 0.1U_0402_16V4Z

1 2

C470 0.1U_0402_16V4Z

1 2

1

PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_N3

PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_N15

PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_P15

A A

GM@

4.7K_0402_5%

LDDC_DATA

R105

+2.5VS

G

2

1 2

S

GMCH_LCD_DATA

13

D

Q32

5

2N7002_SOT23GM@

+3VS

R404

4.7K_0402_5%GM@

1 2

GMCH_LCD_DATA 15

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/03/08 2006/03/08

3

Compal Secret Data

Deciphered Date

2

Title

Alviso PCI-E (3/5)

Size Document Number Rev

B

EFL50 LA-2761

Date: Sheet

851Wednesday, April 20, 2005

1

of

0.2

5

4

3

2

1

10U_1206_16V4Z

0.1U_0402_16V4Z

1

C188

2

+1.5VS

1

C93

2

+1.05VS

1

C165

2

2.2U_0603_6.3V6K

+3VS_TVDAC

+1.05VS

1

2

VCCHV(Ball A21,B21,B22)

C104

0.1U_0402_16V4Z

1000P_0402_50V7K@

U31E

+1.05VS

D D

C C

+1.5VS

+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
+1.5VS_MPLL

B B

+1.5VS_DPLLA

1

2

+1.5VS_HPLL

A A

1

2

+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
+1.5VS_MPLL

150U_D2_6.3VM TV@

60mA

+1.5VS_DPLLA

1

C59

C70

2

10U_1206_16V4Z
1000P_0402_50V7K@

60mA

+1.5VS_HPLL

1

C481

C478

2

10U_1206_16V4Z
1000P_0402_50V7K@

T29

VCC0

R29

VCC1

N29

VCC2

M29

VCC3

K29

VCC4

J29

VCC5

V28

VCC6

U28

VCC7

T28

R28

P28
N28
M28

L28

K28

J28
H28
G28

V27
U27

T27
R27

P27
N27
M27

L27

K27

J27
H27

K26
H26

K25

J25

K24

K23

K22

K21

W20

U20

T20

K20

V19
U19

K19

W18

V18

T18

K18

K17

AC1
AC2

B23
C35
AA1
AA2

Please Closed to U31-H20

1

+

C663

2

L15
CHB1608U301_0603

1 2

1

C77

2

0.1U_0402_16V4Z

L31
CHB1608U301_0603

1 2

1

C477

2

0.1U_0402_16V4Z

5

POWER

VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48

VCCD_HMPLL1
VCCD_HMPLL2
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL

ALVISO_BGA1257

1

C664

2

0.1U_0402_16V4Z

+1.5VS_DPLLB

+1.5VS

+1.5VS_MPLL

+1.5VS

1000P_0402_50V7K@

1

2

1

2

C73

10U_1206_16V4Z
1000P_0402_50V7K@

C161

10U_1206_16V4Z
1000P_0402_50V7K@

VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1

VCCA_TVBG

VSSA_TVBG

VCCD_TVDAC

VCCDQ_TVDAC

VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2

VCCA_LVDS

VCCHV0
VCCHV1
VCCHV2

VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2

VCCA_SM0
VCCA_SM1
VCCA_SM2
VCCA_SM3

VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6

VCCA_3GPLL0
VCCA_3GPLL1
VCCA_3GPLL2

VCCA_3GBG

VSSA_3GBG

VCC_SYNC

VCCA_CRTDAC0
VCCA_CRTDAC1

VSSA_CRTDAC

1

C665

2

60mA

+1.5VS_DPLLB

1

C87

2

60mA

+1.5VS_MPLL

1

C167

2

0307

120mA

F17
E17
D18
C18
F18
E18

H18
G18

D19
H17

24mA

B26
B25
A25

60mA

A35

10mA

B22
B21

2mA

A21
B28

A28

60mA

A27
AF20

AP19
AF19
AF18

AE37
W37
U37
R37

1500mA

N37
L37
J37

Y29
Y28
Y27

F37

0.15mA

G37
H20
F19

E19
G19

L16
CHB1608U301_0603

1 2

1

C80

2

0.1U_0402_16V4Z

L21
CHB1608U301_0603

1 2

1

C155

2

0.1U_0402_16V4Z

+3VS_TVDAC

1

+

C55

2

+1.5VS

+2.5VS

+1.5VS_DDRDLL

+1.5VS_PEG

0.47U_0603_16V4Z

+1.5VS_3GPLL

+2.5VS_3GBG

+2.5VS

70mA

0.47U_0603_16V4Z

+2.5VS

+1.5VS_DDRDLL

+1.5VS

+1.5VS_3GPLL

+1.5VS

4

150U_D2_6.3VMTV@

C432

C431

0.22U_0402_10V4Z

0.22U_0402_10V4Z

+1.5VS_DDRDLL

1

C183

2

10U_1206_16V4Z

1000P_0402_50V7K@

+1.5VS_3GPLL

1

C184

2

10U_1206_16V4Z
1000P_0402_50V7K@

+1.05VS

1

2

1

2

C163

1

2

1

2

1

C131

2

1

1

C181

2

2

R159

0.5_0603_1%

1 2

1

C171

C170

2

0.1U_0402_16V4Z

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

U31F

K13

VTT0

J13

VTT1

K12

VTT2

W11

VTT3

V11

VTT4

U11

VTT5

T11

VTT6

R11

VTT7

P11

VTT8

N11

VTT9

M11

VTT10

L11

VTT11

K11

VTT12

W10

VTT13

V10

VTT14

U10

VTT15

T10

VTT16

R10

VTT17

P10

VTT18

N10

VTT19

M10

VTT20

K10

VTT21

J10

VTT22

Y9

VTT23

W9

VTT24

U9

VTT25

R9

VTT26

P9

VTT27

N9

VTT28

M9

VTT29

L9

VTT30

J9

VTT31

N8

VTT32

M8

VTT33

N7

VTT34

M7

VTT35

N6

VTT36

M6

VTT37

A6

VTT38

N5

VTT39

M5

VTT40

N4

VTT41

M4

VTT42

N3

VTT43

M3

VTT44

N2

VTT45

M2

VTT46

B2

VTT47

V1

VTT48

N1

VTT49

M1

VTT50

G1

VTT51

ALVISO_BGA1257

R160
0_0603_5%

1 2

C186

0.1U_0402_16V4Z

+3GPLL

Issued Date

POWER

+1.5VS_PEG

+1.5VS

1

C146

2

10U_1206_16V4Z

L24
CHB1608U301_0603

1 2

0.1U_0402_16V4Z

3

VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8

VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37
VCCSM38
VCCSM39
VCCSM40
VCCSM41
VCCSM42
VCCSM43
VCCSM44
VCCSM45
VCCSM46
VCCSM47
VCCSM48
VCCSM49
VCCSM50
VCCSM51
VCCSM52
VCCSM53
VCCSM54
VCCSM55
VCCSM56
VCCSM57
VCCSM58
VCCSM59
VCCSM60
VCCSM61
VCCSM62
VCCSM63
VCCSM64

+1.5VS_PEG

+2.5VS_3GBG

+1.5VS

1

2

2005/03/08 2006/03/08

V1.8_DDR_CAP2

AH37

V1.8_DDR_CAP5

AP29
AD28
AD27
AC27
AP26
AN26
AM26
AL26
AK26
AJ26
AH26
AG26
AF26
AE26
AP25
AN25
AM25
AL25
AK25
AJ25
AH25
AG25
AF25
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AE17
AE16
AE15
AE14
AP13
AN13
AM13
AL13
AK13
AJ13
AH13
AG13
AF13
AE13
AP12
AN12
AM12
AL12
AK12
AJ12
AH12
AG12
AF12
AE12
AD11
AC11
AB11
AB10
AB9

V1.8_DDR_CAP6

AP8

V1.8_DDR_CAP4

AM1

V1.8_DDR_CAP3

AE1

1

C153

2

4.7U_0805_10V4Z
1000P_0402_50V7K@

+2.5VS_3GBG

1

C129

2

1000P_0402_50V7K@

Compal Secret Data

V1.8_DDR_CAP1

AM37

C195

0.1U_0402_16V4Z

+1.8V

C200

330U_D2E_2.5VM

C199

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C157

C141

2

2

4.7U_0805_10V4Z

1 2

R123 0_0603_5%

C128

Deciphered Date

C189

0.1U_0402_16V4Z

12

12

C198

0.1U_0402_16V4Z

+1.8V

2200mA

0.1U_0402_16V4Z

1

2

+2.5VS

1

2

+

C174

C101

0.1U_0402_16V4Z

1

C175

2

0.1U_0402_16V4Z

1

C100

2

0.01U_0402_16V7K

VCCA_LVDS (Ball A35)

+2.5VS

1

C91

2

4.7U_0805_10V4Z

1

C133

2

0.1U_0402_16V4Z

VCC_SYNC(Ball H20)

C197

0.1U_0402_16V4Z

12

12

C182

R153

1 2

0_0805_5%

12

+3VS

+2.5VS

1

+

2

4.7U_0805_10V4Z

+1.5VS

C168

470U_D2_2.5VM

L17

CHB1608U301_0603

1 2

1

C65

2

10U_1206_16V4Z

2

12

1000P_0402_50V7K

4000mA

2.2U_0603_6.3V6K

1

C169

C160

2

1

C176

2

0.1U_0402_16V4Z

1

C94

2

4.7U_0805_10V4Z

1

2

0.1U_0402_16V4Z

1

C154

2

2.2U_0603_6.3V6K

1

C172

2

0.1U_0402_16V4Z

1

C107

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C144

2

0.1U_0402_16V4Z

1

C178

2

1

C92

2

4.7U_0805_10V4Z

0.1U_0402_16V4Z

C177

1

C152

2

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C143

2

1

C187

2

1

C102

2

0.1U_0402_16V4Z

VCCTX_LVDS(Ball A27,A28,B28)

VCCA_CRTD AC(Ball F19 ,E19)

1

C126

2

0.1U_0402_16V4Z

1

C103

2

0.022U_0402_16V7K

VCCD_TVDAC (Ball D19)

0.1U_0402_16V4Z

1

C140

2

1

C134

2

0.022U_0402_16V7K

1

2

0.1U_0402_16V4Z

1

C120

2

1

C122

2

0.022U_0402_16V7K

VCCDQ_TVDAC (Ball H17)VCCD_LVDS(Ball A25,B25,B26)

950mA

1

C166

2

1

C158

2

2.2U_0603_6.3V6K

1

C159

2

2.2U_0603_6.3V6K

1

C132

2

2.2U_0603_6.3V6K

VCCA_TVDAC VCCA_TVBG (Ball H18)

1

1

C74

2

1

C139

C123

2

2

1000P_0402_50V7K

0.1U_0402_16V4Z

1

C136

2

0.1U_0402_16V4Z

0.022U_0402_16V7K

1

2

120mA

Title

Alviso POWER (4/5)

Size Document Number Rev

Custom

EFL50 LA-2761

Date: Sheet

951Wednesday, April 20, 2005

1

of

C130

0.2

5

4

3

2

1

U31H

+1.05VS

D D

C C

B B

+1.05VS

A A

L12

VTT_NCTF17

M12

VTT_NCTF16

N12

VTT_NCTF15

P12

VTT_NCTF14

R12

VTT_NCTF13

T12

VTT_NCTF12

U12

VTT_NCTF11

V12

VTT_NCTF10

W12

VTT_NCTF9

L13

VTT_NCTF8

M13

VTT_NCTF7

N13

VTT_NCTF6

P13

VTT_NCTF5

R13

VTT_NCTF4

T13

VTT_NCTF3

U13

VTT_NCTF2

V13

VTT_NCTF1

W13

VTT_NCTF0

Y12

VSS_NCTF68

AA12

VSS_NCTF67

Y13

VSS_NCTF66

AA13

VSS_NCTF65

L14

VSS_NCTF64

M14

VSS_NCTF63

N14

VSS_NCTF62

P14

VSS_NCTF61

R14

VSS_NCTF60

T14

VSS_NCTF59

U14

VSS_NCTF58

V14

VSS_NCTF57

W14

VSS_NCTF56

Y14

VSS_NCTF55

AA14

VSS_NCTF54

AB14

VSS_NCTF53

L15

VSS_NCTF52

M15

VSS_NCTF51

N15

VSS_NCTF50

P15

VSS_NCTF49

R15

VSS_NCTF48

T15

VSS_NCTF47

U15

VSS_NCTF46

V15

VSS_NCTF45

W15

VSS_NCTF44

Y15

VSS_NCTF43

AA15

VSS_NCTF42

AB15

VSS_NCTF41

L16

VSS_NCTF40

M16

VSS_NCTF39

N16

VSS_NCTF38

P16

VSS_NCTF37

R16

VSS_NCTF36

T16

VSS_NCTF35

U16

VSS_NCTF34

V16

VSS_NCTF33

W16

VSS_NCTF32

Y16

VSS_NCTF31

AA16

VSS_NCTF30

AB16

VSS_NCTF29

R17

VSS_NCTF28

Y17

VSS_NCTF27

AA17

VSS_NCTF26

AB17

VSS_NCTF25

AA18

VSS_NCTF24

AB18

VSS_NCTF23

AA19

VSS_NCTF22

AB19

VSS_NCTF21

AA20

VSS_NCTF20

AB20

VSS_NCTF19

R21

VSS_NCTF18

Y21

VSS_NCTF17

AA21

VSS_NCTF16

AB21

VSS_NCTF15

Y22

VSS_NCTF14

AA22

VSS_NCTF13

AB22

VSS_NCTF12

Y23

VSS_NCTF11

AA23

VSS_NCTF10

AB23

VSS_NCTF9

Y24

VSS_NCTF8

AA24

VSS_NCTF7

AB24

VSS_NCTF6

Y25

VSS_NCTF5

AA25

VSS_NCTF4

AB25

VSS_NCTF3

Y26

VSS_NCTF2

AA26

VSS_NCTF1

AB26

VSS_NCTF0

V25

VCC_NCTF10

W25

VCC_NCTF9

L26

VCC_NCTF8

M26

VCC_NCTF7

N26

VCC_NCTF6

P26

VCC_NCTF5

R26

VCC_NCTF4

T26

VCC_NCTF3

U26

VCC_NCTF2

V26

VCC_NCTF1

W26

VCC_NCTF0

ALVISO_BGA1257

5

VCCSM_NCTF31
VCCSM_NCTF30
VCCSM_NCTF29
VCCSM_NCTF28
VCCSM_NCTF27
VCCSM_NCTF26
VCCSM_NCTF25
VCCSM_NCTF24
VCCSM_NCTF23
VCCSM_NCTF22
VCCSM_NCTF21
VCCSM_NCTF20
VCCSM_NCTF19
VCCSM_NCTF18
VCCSM_NCTF17
VCCSM_NCTF16
VCCSM_NCTF15
VCCSM_NCTF14
VCCSM_NCTF13
VCCSM_NCTF12
VCCSM_NCTF11
VCCSM_NCTF10

VCCSM_NCTF9
VCCSM_NCTF8
VCCSM_NCTF7
VCCSM_NCTF6
VCCSM_NCTF5
VCCSM_NCTF4
VCCSM_NCTF3
VCCSM_NCTF2
VCCSM_NCTF1
VCCSM_NCTF0

VCC_NCTF78
VCC_NCTF77
VCC_NCTF76
VCC_NCTF75
VCC_NCTF74
VCC_NCTF73
VCC_NCTF72
VCC_NCTF71
VCC_NCTF70

NCTF

VCC_NCTF69
VCC_NCTF68
VCC_NCTF67
VCC_NCTF66
VCC_NCTF65
VCC_NCTF64
VCC_NCTF63
VCC_NCTF62
VCC_NCTF61
VCC_NCTF60
VCC_NCTF59
VCC_NCTF58
VCC_NCTF57
VCC_NCTF56
VCC_NCTF55
VCC_NCTF54
VCC_NCTF53
VCC_NCTF52
VCC_NCTF51
VCC_NCTF50
VCC_NCTF49
VCC_NCTF48
VCC_NCTF47
VCC_NCTF46
VCC_NCTF45
VCC_NCTF44
VCC_NCTF43
VCC_NCTF42
VCC_NCTF41
VCC_NCTF40
VCC_NCTF39
VCC_NCTF38
VCC_NCTF37
VCC_NCTF36
VCC_NCTF35
VCC_NCTF34
VCC_NCTF33
VCC_NCTF32
VCC_NCTF31
VCC_NCTF30
VCC_NCTF29
VCC_NCTF28
VCC_NCTF27
VCC_NCTF26
VCC_NCTF25
VCC_NCTF24
VCC_NCTF23
VCC_NCTF22
VCC_NCTF21
VCC_NCTF20
VCC_NCTF19
VCC_NCTF18
VCC_NCTF17
VCC_NCTF16
VCC_NCTF15
VCC_NCTF14
VCC_NCTF13
VCC_NCTF12
VCC_NCTF11

AB12
AC12
AD12
AB13
AC13
AD13
AC14
AD14
AC15
AD15
AC16
AD16
AC17
AD17
AC18
AD18
AC19
AD19
AC20
AD20
AC21
AD21
AC22
AD22
AC23
AD23
AC24
AD24
AC25
AD25
AC26
AD26

L17
M17
N17
P17
T17
U17
V17
W17
L18
M18
N18
P18
R18
Y18
L19
M19
N19
P19
R19
Y19
L20
M20
N20
P20
R20
Y20
L21
M21
N21
P21
T21
U21
V21
W21
L22
M22
N22
P22
R22
T22
U22
V22
W22
L23
M23
N23
P23
R23
T23
U23
V23
W23
L24
M24
N24
P24
R24
T24
U24
V24
W24
L25
M25
N25
P25
R25
T25
U25

+1.8V

+1.05VS

1

C?

2

0.1U_0603_16V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

U31I

Y1

VSS271

D2

VSS270

G2

VSS269

J2

VSS268

L2

VSS260

P2

VSS259

T2

VSS258

V2

VSS257

AD2

VSS256

AE2

VSS255

AH2

VSS254

AL2

VSS253

AN2

VSS252

A3

VSS251

C3

VSS250

AA3

VSS249

AB3

VSS248

AC3

VSS247

AJ3

VSS246

C4

VSS245

H4

VSS244

L4

VSS243

P4

VSS242

U4

VSS241

Y4

VSS240

AF4

VSS239

AN4

VSS238

E5

VSS237

W5

VSS236

AL5

VSS235

AP5

VSS234

B6

VSS233

J6

VSS232

L6

VSS231

P6

VSS230

T6

VSS229

AA6

VSS228

AC6

VSS227

AE6

VSS226

AJ6

VSS225

G7

VSS224

V7

VSS223

AA7

VSS222

AG7

VSS221

AK7

VSS220

AN7

VSS219

C8

VSS218

E8

VSS217

L8

VSS216

P8

VSS215

Y8

VSS214

AL8

VSS213

A9

VSS212

H9

VSS211

K9

VSS210

T9

VSS209

V9

VSS208

AA9

VSS207

AC9

VSS206

AE9

VSS205

AH9

VSS204

AN9

VSS203

D10

VSS202

L10

VSS201

Y10

VSS200

AA10

VSS199

F11

VSS198

H11

VSS197

Y11

VSS196

ALVISO_BGA1257

1

C?

2

0.1U_0603_16V7K

VSSALVDS

VSS

1

C?

2

0.1U_0603_16V7K

2005/03/08 2006/03/08

3

Compal Secret Data

B36
AA11

VSS195

AF11

VSS194

AG11

VSS193

AJ11

VSS192

AL11

VSS191

AN11

VSS190

B12

VSS189

D12

VSS188

J12

VSS187

A14

VSS186

B14

VSS185

F14

VSS184

J14

VSS183

K14

VSS182

AG14

VSS181

AJ14

VSS180

AL14

VSS179

AN14

VSS178

C15

VSS177

K15

VSS176

A16

VSS175

D16

VSS174

H16

VSS173

K16

VSS172

AL16

VSS171

C17

VSS170

G17

VSS169

AF17

VSS168

AJ17

VSS167

AN17

VSS166

A18

VSS165

B18

VSS164

U18

VSS163

AL18

VSS162

C19

VSS161

H19

VSS160

J19

VSS159

T19

VSS158

W19

VSS157

AG19

VSS156

AN19

VSS155

A20

VSS154

D20

VSS153

E20

VSS152

F20

VSS151

G20

VSS150

V20

VSS149

AK20

VSS148

C21

VSS147

F21

VSS146

AF21

VSS145

AN21

VSS144

A22

VSS143

D22

VSS142

E22

VSS141

J22

VSS140

AH22

VSS139

AL22

VSS138

H23

VSS137

AF23

VSS136

B24

VSS135

D24

VSS134

F24

VSS133

J24

VSS132

AG24

VSS131

AJ24

VSS130

+1.5VS+1.05VS

1

C689

2

0.1U_0402_16V4Z

Deciphered Date

1

C690

2

0.1U_0402_16V4Z

U31J

AL24

VSS267

AN24

VSS266

A26

VSS265

E26

VSS264

G26

VSS263

J26

VSS262

B27

VSS261

E27

VSS129

G27

VSS128

W27

VSS127

AA27

VSS126

AB27

VSS125

AF27

VSS124

AG27

VSS123

AJ27

VSS122

AL27

VSS121

AN27

VSS120

E28

VSS119

W28

VSS118

AA28

VSS117

AB28

VSS116

AC28

VSS115

A29

VSS114

D29

VSS113

E29

VSS112

F29

VSS111

G29

VSS110

H29

VSS109

L29

VSS108

P29

VSS107

U29

VSS106

V29

VSS105

W29

VSS104

AA29

VSS103

AD29

VSS102

AG29

VSS101

AJ29

VSS100

AM29

VSS99

C30

VSS98

Y30

VSS97

AA30

VSS96

AB30

VSS95

AC30

VSS94

AE30

VSS93

AP30

VSS92

D31

VSS91

E31

VSS90

F31

VSS89

G31

VSS88

H31

VSS87

J31

VSS86

K31

VSS85

L31

VSS84

M31

VSS83

N31

VSS82

P31

VSS81

R31

VSS80

T31

VSS79

U31

VSS78

V31

VSS77

W31

VSS76

AD31

VSS75

AG31

VSS74

AL31

VSS73

A32

VSS72

C32

VSS71

Y32

VSS70

AA32

VSS69

AB32

VSS68

ALVISO_BGA1257

1

C691

2

0.1U_0402_16V4Z

2

VSS

1

C692

2

0.1U_0402_16V4Z

Title

Alviso POWER (5/5)

Size Document Number Rev

B

EFL50 LA-2761

Date: Sheet

1

C693

2

0.1U_0402_16V4Z

VSS67
VSS66
VSS65
VSS64
VSS63
VSS62
VSS61
VSS60
VSS59
VSS58
VSS57
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10

VSS9
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
VSS0

1

AC32
AD32
AJ32
AN32
D33
E33
F33
G33
H33
J33
K33
L33
M33
N33
P33
R33
T33
U33
V33
W33
AD33
AF33
AL33
C34
AA34
AB34
AC34
AD34
AH34
AN34
B35
D35
E35
F35
G35
H35
J35
K35
L35
M35
N35
P35
R35
T35
U35
V35
W35
Y35
AE35
C36
AA36
AB36
AC36
AD36
AE36
AF36
AJ36
AL36
AN36
E37
H37
K37
M37
P37
T37
V37
Y37
AG37

1

C694

2

0.1U_0402_16V4Z

10 51Wednesday, April 20, 2005

of

0.2

5

+1.8V +1.8V

12

C658

+1.8V +1.8V

D D

12

C660

+1.8V

12

C662

0304 EMI

C C

B B

A A

12

C659

@680P_0402_50V7K

12

C661

@680P_0402_50V7K

@680P_0402_50V7K

DDR_CKE0_DIMMA6

DDR_A_BS#27

DDR_A_BS#07
DDR_A_WE#7

DDR_A_CAS#7

DDR_CS1_DIMMA#6

D_CK_SDATA12,13,38
D_CK_SCLK1 2 ,13,38

@680P_0402_50V7K

@680P_0402_50V7K

M_ODT16

DDR_A_D0
DDR_A_D1

DDR_A_DQS#0
DDR_A_DQS0

DDR_A_D2
DDR_A_D3

DDR_A_D8
DDR_A_D9

DDR_A_DQS#1 M_CLK_DDR0
DDR_A_DQS1

DDR_A_D10
DDR_A_D11

DDR_A_D16
DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D18
DDR_A_D19

DDR_A_D24
DDR_A_D25

DDR_A_DM3

DDR_A_D26
DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS#2
DDR_A_MA12

DDR_A_MA9 DDR_A_MA7
DDR_A_MA8

DDR_A_MA5
DDR_A_MA3
DDR_A_MA1

DDR_A_MA10
DDR_A_BS#0
DDR_A_WE#

DDR_A_CAS#
DDR_CS1_DIMMA#

M_ODT1
DDR_A_D32

DDR_A_D33
DDR_A_DQS#4

DDR_A_DQS4
DDR_A_D34

DDR_A_D35
DDR_A_D40

DDR_A_D41
DDR_A_DM5
DDR_A_D42

DDR_A_D43
DDR_A_D48

DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D51

DDR_A_D56
DDR_A_D57

DDR_A_DM7
DDR_A_D58

DDR_A_D59
D_CK_SDATA

D_CK_SCLK

+3VS

+1.8V +1.8V

JP31

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

1 2

C278

0.1U_0402_16V4Z

VDDSPD

P-TWO_A5640C-A0G16-N

Address: 1001 000X b

4

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7

VSS
DQ12
DQ13

VSS

DM1

VSS

CK0

CK0#

VSS
DQ14
DQ15

VSS

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3#

DQS3

VSS
DQ30
DQ31

VSS

NC/CKE1

VDD

NC/A15
NC/A14

VDD

VDD

VDD

BA1

RAS#

VDD
ODT0

NC/A13

VDD

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5#

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

CK1

CK1#

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7#

DQS7

VSS
DQ62
DQ63

VSS

SAO

SA1

3

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50

NC

52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90

A11

92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106
108
110

S0#

112
114
116
118
120

NC

122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_A_D4
DDR_A_D5

DDR_A_DM0
DDR_A_D6

DDR_A_D7
DDR_A_D12

DDR_A_D13
DDR_A_DM1

M_CLK_DDR#0
DDR_A_D14

DDR_A_D15

DDR_A_D20
DDR_A_D21

DDR_A_DM2
DDR_A_D22

DDR_A_D23
DDR_A_D28

DDR_A_D29
DDR_A_DQS#3

DDR_A_DQS3
DDR_A_D30

DDR_A_D31
DDR_CKE1_DIMMA

DDR_A_MA11
DDR_A_MA6
DDR_A_MA4

DDR_A_MA2
DDR_A_MA0

DDR_A_BS#1
DDR_A_RAS#
DDR_CS0_DIMMA#

M_ODT0
DDR_A_MA13

DDR_A_D36
DDR_A_D37

DDR_A_DM4
DDR_A_D38

DDR_A_D39
DDR_A_D44

DDR_A_D45
DDR_A_DQS#5

DDR_A_DQS5
DDR_A_D46

DDR_A_D47
DDR_A_D52

DDR_A_D53
M_CLK_DDR1

M_CLK_DDR#1
DDR_A_DM6
DDR_A_D54

DDR_A_D55
DDR_A_D60

DDR_A_D61
DDR_A_DQS#7

DDR_A_DQS7
DDR_A_D62

DDR_A_D63

R242 10K_0402_5%

1 2

R243 10K_0402_5%

1 2

C273

M_CLK_DDR0 6
M_CLK_DDR#0 6

DDR_CKE1_DIMMA 6

DDR_A_BS#1 7
DDR_A_RAS# 7
DDR_CS0_DIMMA# 6

M_ODT0 6

M_CLK_DDR1 6
M_CLK_DDR#1 6

0.1U_0402_16V4Z

1

2

4.7U_0805_10V4Z

10U_0805_10V4Z

@

1

2

C272

+1.8V

+0.9VS

+1.8V+DIMM_VREF

12

12

@

10U_0805_10V4Z

1

1

C292

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C303

DDR_A_MA2
DDR_A_MA4

DDR_A_MA5
DDR_A_MA8

DDR_A_MA10
DDR_A_MA11

DDR_A_BS#0
DDR_A_BS#2

DDR_A_RAS#
DDR_CKE0_DIMMA

DDR_CKE1_DIMMA
M_ODT1

R228

1K_0402_1%

R226

1K_0402_1%

@

10U_0805_10V4Z

1

1

C294

C293

10U_0805_10V4Z

@

0.1U_0402_16V4Z

1

2

C302

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS

C295

2

2

10U_0805_10V4Z

@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C301

R264 56_0402_5%
R263 56_0402_5%

R247 56_0402_5%
R246 56_0402_5%

R248 56_0402_5%
R262 56_0402_5%

R249 56_0402_5%
R245 56_0402_5%

R265 56_0402_5%
R244 56_0402_5%

R261 56_0402_5%
R250 56_0402_5%

1

2

C300

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1

2

C299

@

10U_0805_10V4Z

1

C296

2

0.1U_0402_16V4Z

1

2

C321

+0.9VS

2

DDR_A_D[0..63]7

DDR_A_DM[0..7]7

DDR_A_DQS[0..7]7

DDR_A_MA[0..13]7

DDR_A_DQS#[0..7]7

1

1

C298

C297

2

2

10U_0805_10V4Z

@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

1

2

2

C316

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

2

C305

C317

R269 56_0402_5%
R254 56_0402_5%

R253 56_0402_5%
R268 56_0402_5%

R267 56_0402_5%
R252 56_0402_5%

R251 56_0402_5%
R273 56_0402_5%

R270 56_0402_5%
R255 56_0402_5%

R256 56_0402_5%
R271 56_0402_5%

R257 56_0402_5%
R272 56_0402_5%

DDR_A_D[0..63]
DDR_A_DM[0..7]
DDR_A_DQS[0..7]
DDR_A_MA[0..13]
DDR_A_DQS#[0..7]

+1.8V

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C304

1

C310

C312

2

4.7U_0805_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C318

DDR_A_MA0
DDR_A_MA1

DDR_A_MA3
DDR_A_MA6

DDR_A_MA7
DDR_A_MA9

DDR_A_MA12
DDR_A_MA13

DDR_A_BS#1
DDR_A_WE#

DDR_A_CAS#

DDR_CS0_DIMMA#
DDR_CS1_DIMMA#

M_ODT0

1

Layout Note:
Place near DIMM

1

1

1

2

4.7U_0805_10V4Z

C260

1

2

0.1U_0402_16V4Z

C319

C311

C313

2

4.7U_0805_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C277

1

1

2

2

1

2

C320

Layout Note:
Place these resistor
closely DIMM0,all
trace length<750 mil

Layout Note:
Place these resistor
closely DIMM0,all
trace length
Max=1.3"

1

C314

2

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z

0.1U_0402_16V4Z

C276

C275

1

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS , INC . AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.

2005/03/08 200 6/03/08

3

Compal Secret Data

Deciphered Date

Title

DDRII- SODIMM SLOT0

Size Document Number Rev

Custom

EFL50 LA-2761

2

Date: Sheet

11 51Wednesda y, Ap r il 20, 2005

1

0.2

of

A

+1.8V

JP26

1

VREF

3

DDR_B_D0
DDR_B_D1

DDR_B_DQS#0
DDR_B_DQS0

1 1

2 2

3 3

4 4

DDR_CKE2_DIMMB6

DDR_B_BS#27

DDR_B_BS#07
DDR_B_WE#7

DDR_B_CAS#7

DDR_CS3_DIMMB#6

M_ODT36

D_CK_SDATA11,13,38
D_CK_SCLK1 1 ,13,38

A

DDR_B_D2
DDR_B_D3

DDR_B_D8
DDR_B_D9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D10
DDR_B_D11

DDR_B_D16
DDR_B_D17

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D18
DDR_B_D19

DDR_B_D24
DDR_B_D25

DDR_B_DM3

DDR_B_D26
DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS#2
DDR_B_MA12

DDR_B_MA9
DDR_B_MA8

DDR_B_MA5
DDR_B_MA3
DDR_B_MA1

DDR_B_MA10
DDR_B_BS#0
DDR_B_WE#

DDR_B_CAS#
DDR_CS3_DIMMB#

M_ODT3
DDR_B_D32

DDR_B_D33
DDR_B_DQS#4

DDR_B_DQS4
DDR_B_D34

DDR_B_D35
DDR_B_D40

DDR_B_D41
DDR_B_DM5
DDR_B_D42

DDR_B_D43
DDR_B_D48

DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D50
DDR_B_D51

DDR_B_D56
DDR_B_D57

DDR_B_DM7
DDR_B_D58

DDR_B_D59
D_CK_SDATA

D_CK_SCLK

+3VS

C244

0.1U_0402_16V4Z

1 2

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

SUPER_AKH-110A-092-3 2S@

Address: 1001 010X b

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7

VSS
DQ12
DQ13

VSS

DM1

VSS

CK0
CK0#

VSS
DQ14
DQ15

VSS

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3#

DQS3

VSS
DQ30
DQ31

VSS

NC/CKE1

VDD
NC/A15
NC/A14

VDD

VDD

VDD

BA1

RAS#

VDD

ODT0

NC/A13

VDD

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5#

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

CK1
CK1#

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7#

DQS7

VSS
DQ62
DQ63

VSS

SAO

SA1

B

+1.8V

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50

NC

52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90

A11

92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106
108
110

S0#

112
114
116
118
120

NC

122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_B_D4
DDR_B_D5

DDR_B_DM0
DDR_B_D6

DDR_B_D7
DDR_B_D12

DDR_B_D13
DDR_B_DM1
M_CLK_DDR3

M_CLK_DDR#3
DDR_B_D14

DDR_B_D15

DDR_B_D20
DDR_B_D21

DDR_B_DM2
DDR_B_D22

DDR_B_D23
DDR_B_D28

DDR_B_D29
DDR_B_DQS#3

DDR_B_DQS3
DDR_B_D30

DDR_B_D31
DDR_CKE3_DIMMB

DDR_B_MA11
DDR_B_MA7
DDR_B_MA6

DDR_B_MA4
DDR_B_MA2
DDR_B_MA0

DDR_B_BS#1
DDR_B_RAS#
DDR_CS2_DIMMB#

M_ODT2
DDR_B_MA13

DDR_B_D36
DDR_B_D37

DDR_B_DM4
DDR_B_D38

DDR_B_D39
DDR_B_D44

DDR_B_D45
DDR_B_DQS#5

DDR_B_DQS5
DDR_B_D46

DDR_B_D47
DDR_B_D52

DDR_B_D53
M_CLK_DDR4

M_CLK_DDR#4
DDR_B_DM6
DDR_B_D54

DDR_B_D55
DDR_B_D60

DDR_B_D61
DDR_B_DQS#7

DDR_B_DQS7
DDR_B_D62

DDR_B_D63

+DIMM_VREF

M_CLK_DDR3 6
M_CLK_DDR#3 6

DDR_CKE3_DIMMB 6

DDR_B_BS#1 7
DDR_B_RAS# 7
DDR_CS2_DIMMB# 6

M_ODT2 6

M_CLK_DDR4 6
M_CLK_DDR#4 6

R222 10K_0402_5%

1 2

R223 10K_0402_5%

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS , INC . AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.

C252

C

0.1U_0402_16V4Z

1

1

2

2

4.7U_0805_10V4Z

+1.8V

1

C250

0.1U_0402_16V4Z

2

+0.9VS

0.1U_0402_16V4Z

+3VS

2005/03/08 200 6/03/08

C

DDR_B_D[0..63]7

DDR_B_DM[0..7]7

DDR_B_DQS[0..7]7

C251

DDR_B_MA[0..13]7

DDR_B_DQS#[0..7]7

+1.8V

1

C289

0.1U_0402_16V4Z

2

1

C249

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

C282

1

2

2

C285

C284

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS

DDR_B_BS#2
DDR_CKE2_DIMMB

DDR_B_MA5
DDR_B_MA8

DDR_B_BS#0
DDR_B_MA10

M_ODT3
DDR_CS3_DIMMB#

DDR_B_MA7
DDR_B_MA6

DDR_B_RAS#
DDR_CS2_DIMMB#

Compal Secret Data

DDR_B_D[0..63]
DDR_B_DM[0..7]
DDR_B_DQS[0..7]
DDR_B_MA[0..13]
DDR_B_DQS#[0..7]

1

C288

0.1U_0402_16V4Z

2

1

C248

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C259

R203 56_0402_5%

1 2

R202 56_0402_5%

1 2

R205 56_0402_5%

1 2

R204 56_0402_5%

1 2

R207 56_0402_5%

1 2

R206 56_0402_5%

1 2

R209 56_0402_5%

1 2

R208 56_0402_5%

1 2

R229 56_0402_5%

1 2

R230 56_0402_5%

1 2

R231 56_0402_5%

1 2

R232 56_0402_5%

1 2

Deciphered Date

0.1U_0402_16V4Z

C283

Layout Note:
Place near DIMM

1

C286

0.1U_0402_16V4Z

2

1

C247

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1

1

2

2

C254

C253

D

1

C287

0.1U_0402_16V4Z

2

1

C246

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C255

C256

+0.9VS

R211 56_0402_5%

1 2

R210 56_0402_5%

1 2

R213 56_0402_5%

1 2

R212 56_0402_5%

1 2

R215 56_0402_5%

1 2

R214 56_0402_5%

1 2

R233 56_0402_5%

1 2

R234 56_0402_5%

1 2

R235 56_0402_5%

1 2

R236 56_0402_5%

1 2

R237 56_0402_5%

1 2

R238 56_0402_5%

1 2

R239 56_0402_5%

1 2

R240 56_0402_5%

1 2

D

E

+1.8V

1

C325

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z

0.1U_0402_16V4Z

C262

1

2

1

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1

1

2

2

C258

C257

DDR_B_MA9
DDR_B_MA12

DDR_B_MA1
DDR_B_MA3

DDR_B_CAS#
DDR_B_WE#

DDR_CKE3_DIMMB
DDR_B_MA11

DDR_B_MA4
DDR_B_MA2

DDR_B_MA0
DDR_B_BS#1

M_ODT2
DDR_B_MA13

C261

1

2

C274

C322

0.1U_0402_16V4Z

1

2

+1.8V

C323

0.1U_0402_16V4Z

1

2

1

C245

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C280

C281

Title

DDRII-SODIMM SLOT1

Size Document Number Rev

Custom

EFL50 LA-2761

Date: Sheet

1

1

C324

2

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C264

C263

1

2

1

C291

0.1U_0402_16V4Z

2

1

+

C328
150U_D2_6.3VM

2

Layout Note:
Place these resistor
closely DIMM0,all
trace length<750 mil

Layout Note:
Place these resistor
closely DIMM0,all
trace length
Max=1.3"

E

C326

1

2

4.7U_0805_10V4Z

C265

1

2

1

2

0.1U_0402_16V4Z

1

+

C306
150U_D2_6.3VM

2

of

12 51Wednesda y, Ap r il 20, 2005

C290

0.2

A

FSC FSB FSA CPU

CLKSEL0 CLKSEL1 CLKSEL2

*

1 1

0
0

0
0
1
1

+3VS

A

CLKSEL2

CLK_PCI2

CLK_PCI0

CLK_PCI1

CK_SCLK

CK_SDATA

+1.05VS

R522

1 2

R512
0_0402_5%

1 2

R495 10K_0402_5%

1 2

R523 10K_0402_5%

1 2

R500 10K_0402_5%

1 2

R492 10K_0402_5%

2 2

CLK_PCI0 = 0, Pin 35,36
are PCIe CLK pair

CLK_PCI1 = 0, Pin 17,18
are 96Mhz

3 3

CK_SCLK18

CK_SDATA18

R519

4.7K_0402_5%

CLKSEL0

4 4

1 2
1 2

R526
0_0402_5%@

11
1
1
00

CLK_PCI2 = 1, Pin 32,33
are PEREQ# pin

CLK_ICH_48M18
CLK_SD_48M22

CLK_14M_CODEC29

CLK_PCI_PCM22
CLK_PCI_LAN25
CLK_PCI_MINI127
CLK_PCI_MINI228
CLK_PCI_SIO32
CLK_PCI_139424
CLK_PCI_LPC33
CLK_PCI_ICH16

D_CK_SCLK11,12,38

D_CK_SDATA11,12,38

+3VS

2

G

1 3

D

S

Q33
2N7002_SOT23

+3VS

2

G

1 3

D

S

Q34
2N7002_SOT23

1K_0402_5%@
R518

0_0402_5%

1 2

MCH_CLKSEL0
CPU_BSEL0

12

22P_0402_50V8J

R503

4.7K_0402_5%

1 2

R502

4.7K_0402_5%

1 2

B

+CLK_VDD48 +CLK_VDDREF

1

C541

2

2.2U_0603_6.3V6K

+CLK_VDD2

MHz

100
133
166
200

SRC

PCI

MHz

MHz

100 33.3
100

33.3

100

33.3

100

33.3

Table : ICS 954206B

C544

1 2

C542

22P_0402_50V8J

1 2

D_CK_SCLK

D_CK_SDATA

Y3

14.318MHZ_16PF_DSX840GA

12

CLK_ICH_48M

CLK_14M_CODEC CLKSEL0

CLK_PCI_PCM

CLK_PCI_MINI1 CLK_PCI4
CLK_PCI_MINI2

CLK_PCI_1394
CLK_PCI_LPC
CLK_PCI_ICH
D_CK_SCLK

D_CK_SDATA

+3VS

+3VS

MCH_CLKSEL0 6

CPU_BSEL0 5

B

R494 12_0402_5%
R499 12_0402_5%
R520 33_0402_5%

1 2

R506

1 2

R507 12_0402_5%

1 2

R510 33_0402_5%2S@

1 2

R511 33_0402_5%1S@

1 2

R516 33_0402_5%

1 2

R524 33_0402_5%

1 2

R493 33_0402_5%

1 2

R501 33_0402_5%

R515

4.7K_0402_5%

CLKSEL1 MCH_CLKSEL1

1 2
1 2

R521
0_0402_5%@

1 2
1 2

12_0402_5%

+1.05VS

1 2

1 2

R508 1_0402_5%

1 2

R517 2.2_0402_5%

12

R475 475_0402_1%

R525

R509
0_0402_5%

C

CLK_PCI3
CLK_PCI2
CLK_PCI1

1 2

1K_0402_5%@
R505

0_0402_5%

1 2

C

1

C537

2

0.047U_0402_16V7K

+CLK_VDD1

+CLK_VDD1

+CLK_VDDREF

+CLK_VDD48

XTALIN
XTALOUT

CLKSEL2CLK_SD_48M

CLKSEL1

CLK_PCI5CLK_PCI_LAN

CLK_PCI0

CLKIREF

CPU_BSEL1

12

1

C539

0.047U_0402_16V7K

2

U33

21

VDDPCIEX_0

28

VDDPCIEX_1

34

VDDPCIEX_2

1

VDDPCI_0

7

VDDPCI_1

42

VDDCPU

48

VDDREF

15mil

11

VDD48

15mil

50

X1

49

X2

12

FS_A/USB_48MHz

53

REF1/FSLC/TEST_SEL

16

FSLB/TEST_MODE

5

PCICLK5

4

PCICLK4

3

PCICLK3

56

PCICLK2/REQ_SEL

9

SELPCIEX_LCDCLK#/PCICLK_F1

8

ITP_EN/PCICLK_F0

46

SCLK

47

SDATA

39

IREF

15mil

13

GND_0

29

GND_1

2

GND_2

45

GND_3

51

GND_4

6

GND_5

ICS954226AGT_TSSOP56

MCH_CLKSEL1 6

CPU_BSEL1 5

D

L32
KC FBM-L11-201209-221LMAT_0805

1 2

+3VS

VDDA
GNDA

PCI/SRC_STOP#

CPU_STOP#

CPUCLKT1
CPUCLKC1

CPUCLKT0
CPUCLKC0

CPUCLKT2_ITP/PCIEXT6

CPUCLKC2_ITP/PCIEXC6

PEREQ1#/PCIEXT5
PEREQ2#/PCIEXC5

PCIEXT4
PCIEXC4

SATACLKT
SATACLKC

PCIEXT3
PCIEXC3

PCIEXT2
PCIEXC2

PCIEXT1
PCIEXC1

LCDCLK_SS/PCIEX0T

LCDCLK_SS/PCIEX0C

DOTT_96MHz
DOTC_96MHz

VTT_PWRGD#/PD

REF0

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

E

1

C524

2.2U_0603_6.3V6K

2

1

37
38

55
54

41
40

44
43

36
35

33
32

31
30

26
27

24
25

22
23

19
20

17
18

14
15

10
52

2

PM_STP_PCI#
PM_STP_CPU#

CLK_CPU1
CLK_CPU1#

CLK_CPU0
CLK_CPU0#

CLK_SRC3
CLK_SRC3# CLK_MCH_3GPLL#

PEREQ2#
PEREQ1#

CLK_SRC2#

CLK_SRC4
CLK_SRC4#

CLK_SRC6
CLK_SRC6#

CLK_SRC7
CLK_SRC7#

CLK_SRC1
CLK_SRC1#

CLK_SRC0
CLK_SRC0#

CLK_DOT
CLK_DOT#

CLK_REF CLK_14M_SIO

E

1

C525

0.047U_0402_16V7K

2

+CLK_VCCA

40mil

C523

2.2U_0603_6.3V6K

R485 33_0402_5%
R478 33_0402_5%

R497 33_0402_5%
R490 33_0402_5%

R468 33_0402_5%
R463 33_0402_5%

R455 0_0402_5%
R456 0_0402_5%

R450 33_0402_5%
R446 33_0402_5%

R447 33_0402_5%
R442 33_0402_5%

R453 33_0402_5%
R451 33_0402_5%

R460 33_0402_5%
R457 33_0402_5%

R470 33_0402_5%
R465 33_0402_5%

R479 33_0402_5%
R473 33_0402_5%

R486 33_0402_5%
R481 33_0402_5%

1 2

R513 12_0402_5%

1 2

R514 12_0402_5%

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1

2

F

1 2

R472

2.2_0402_5%

C532

0.047U_0402_16V7K

PM_STP_PCI# 18
PM_STP_CPU# 18,46

CLK_ICH_14M

F

1

C536

0.047U_0402_16V7K

2

+CLK_VDD1

CLK_MCH_BCLK
CLK_MCH_BCLK#

CLK_CPU_BCLK
CLK_CPU_BCLK#

CLK_MCH_3GPLL

PE_REQ2#
PE_REQ1#

CLK_PCIE_VGACLK_SRC2
CLK_PCIE_VGA#

CLK_EZ_CLK2
CLK_EZ_CLK2#

CLK_EZ_CLK1
CLK_EZ_CLK1#

CLK_PCIE_ICH
CLK_PCIE_ICH#

CLK_PCIE_SATA
CLK_PCIE_SATA#

CLK_DREF_SSC
CLK_DREF_SSC#

CLK_DREF_96M
CLK_DREF_96M#

1 2

+3VS

R488 10K_0402_5%

VTT_POWERGD#

CLK_14M_SIO 32

CLK_ICH_14M 18

+3VS

G

40mil

1

C529

0.047U_0402_16V7K

2

L33

KC FBM-L11-201209-221LMAT_0805

1 2

CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6

CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4

CLK_MCH_3GPLL 8
CLK_MCH_3GPLL# 8

PE_REQ2# 33
PE_REQ1# 33

CLK_PCIE_VGA 15
CLK_PCIE_VGA# 15

CLK_EZ_CLK2 38
CLK_EZ_CLK2# 38

CLK_EZ_CLK1 38
CLK_EZ_CLK1# 38

CLK_PCIE_ICH 18
CLK_PCIE_ICH# 18

CLK_PCIE_SATA 17
CLK_PCIE_SATA# 17

CLK_DREF_SSC 6
CLK_DREF_SSC# 6

CLK_DREF_96M 6
CLK_DREF_96M# 6

Title

Size Document Number Rev

Date: Sheet

+CLK_VDD1

+CLK_VDD1

1

C546

2

2.2U_0603_6.3V6K

1 3

Wednesday, April 20, 2005

G

1

C533

0.047U_0402_16V7K

2

VGATE

2

G

D

S

Q35
2N7002_SOT23

Compal Electronics, Inc.

Clock Generator

40mil

+CLK_VDD2

1

C545

2

0.047U_0402_16V7K

CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_EZ_CLK1
CLK_EZ_CLK1#

CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_MCH_3GPLLCLK_PCI_SIO
CLK_MCH_3GPLL#
CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_PCIE_ICH
CLK_PCIE_ICH#
CLK_DREF_SSC
CLK_DREF_SSC#
CLK_DREF_96M
CLK_DREF_96M#
CLK_EZ_CLK2
CLK_EZ_CLK2#

VGATE 6,18,46

Clock Generator

EFL50 LA-2761

H

+CLK_VDD2

1

C538

2

0.047U_0402_16V7K

1 2

R484 49.9_0402_1%

1 2

R477 49.9_0402_1%

1 2

R496 49.9_0402_1%

1 2

R489 49.9_0402_1%

1 2

R454 49.9_0402_1%

1 2

R452 49.9_0402_1%

1 2

R471 49.9_0402_1%

1 2

R466 49.9_0402_1%

1 2

R467 49.9_0402_1%

1 2

R462 49.9_0402_1%

1 2

R449 49.9_0402_1%

1 2

R445 49.9_0402_1%

1 2

R461 49.9_0402_1%

1 2

R458 49.9_0402_1%

1 2

R480 49.9_0402_1%

1 2

R474 49.9_0402_1%

1 2

R487 49.9_0402_1%

1 2

R482 49.9_0402_1%

1 2

R448 49.9_0402_1%

1 2

R443 49.9_0402_1%

13 51

H

0.2

of

A

CRT Connector

CRT_RQ
CRT_GQ
CRT_BQ

1 1

VGA_CRT_R
GMCH_CRT_R

VGA_CRT_G
GMCH_CRT_G

VGA_CRT_B
GMCH_CRT_B

VGA_CRT_R15
GMCH_CRT_R8

VGA_CRT_G15
GMCH_CRT_G8

VGA_CRT_B15
GMCH_CRT_B8

2 2

R40 0_0402_5%PM@

1 2
1 2

R39 0_0402_5%GM@
R37 0_0402_5%PM@

1 2
1 2

R38 0_0402_5%GM@
R59 0_0402_5%PM@

1 2
1 2

R60 0_0402_5%GM@

VGA_CRT_R
GMCH_CRT_R

VGA_CRT_G
GMCH_CRT_G

VGA_CRT_B
GMCH_CRT_B

1 2

R375 0_0402_5%ND@

1 2

R376 0_0402_5%ND@

1 2

R389 0_0402_5%ND@

DOCKIN#21,26,33,38

VGA_CRT_HSYNC15
GMCH_CRT_HSYNC8

CRT_R
CRT_G
CRT_B

DOCKIN#

CRT_RQ
CRT_GQ
CRT_BQ

VGA_CRT_HSYNC
GMCH_CRT_HSYNC

VGA_CRT_VSYNC15
GMCH_CRT_VSYNC8

U4

1

SEL

15

OE#

4

1A

7

2A

9

3A

12

4A

8

GND

FSAV330MTC_TSSOP16WD@

B

16

VCC

2

1B1

5

2B1

11

3B1

14

4B1

3

1B2

6

2B2

10

3B2

13

4B2

150_0402_5%

1 2

R373 0_0402_5%PM@

1 2

R372 39_0402_5%GM@

VGA_CRT_VSYNC
GMCH_CRT_VSYNC

+5VS

1 2

C22

D_CRT_R
D_CRT_G
D_CRT_B

12

12

R32

R30

150_0402_5%

1 2

C399 0.1U_0402_16V4Z

1 2

R377 0_0402_5%PM@

1 2

R378 39_0402_5%GM@

C

0.1U_0402_16V4Z

+3VS

D_CRT_R 38
D_CRT_G 38
D_CRT_B 38

CRT_R CRT_R_L

CRT_G

CRT_B

12

R25

150_0402_5%

CRT_HSYNC D_CRT_HSYNC

1

C5

2

8P_0402_50V8K

+CRT_VCC

1

5

P

4

OE#

A2Y

G

U27

SN74AHCT1G125GW_SOT353-5

3

1 2

C400 0.1U_0402_16V4Z

1

C10

2

8P_0402_50V8K

+CRT_VCC

5

CRT_VSYNC D_CRT_VSYNC

P

A2Y

G

3

1 2

L5

FCM2012C-800_0805

1 2

L4

FCM2012C-800_0805

1 2

L2

FCM2012C-800_0805

1

C14

2

R370 10K_0402_5%

8P_0402_50V8K

8P_0402_50V8K

10P for GMCH

12

1

4

OE#

U28
SN74AHCT1G125GW_SOT353-5

CRT_G_L

CRT_B_L

C16

D21

DAN217_SC59@

1

2

3

1

C11

2

8P_0402_50V8K

1 2

L3 FCM1608C-121T_0603

1 2

L1 FCM1608C-121T_0603

D

D20

DAN217_SC59@

1

2

3

1

2

10P_0402_50V8J

33P for GMCH

1

D19

DAN217_SC59@

2

3

1

C8

8P_0402_50V8K

2

HSYNC_L

VSYNC_L

1

C9

2

D_CRT_HSYNC 38

D_CRT_VSYNC 38

+5VS

RB411D_SOT23

1

C6
10P_0402_50V8J

2

D18

2 1

W=40mils

F1

1.1A_6VDC_FUSE

0.1U_0402_16V4Z

DDC_MD2

C4

100P_0402_25V8K

1

2

C13
68P_0402_50V8K

21

C398

E

W=40mils

1

2

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

SUYIN_070112FR015S2227U

D_DDC_DATA

D_DDC_CLK

1

C3
68P_0402_50V8K

2

+CRT_VCC+R_CRT_VCC

JP3

(CL55)

3 3

D_DDC_DATA38

D_DDC_CLK38

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

4.7K_0402_5%

D_DDC_CLK

+CRT_VCC

R371

12

4.7K_0402_5%

12

R374

Q3
2N7002_SOT23

D

R43 0_0402_5%PM@

1 2

R48 0_0402_5%GM@

1 2

2

G

1 3

D

S

2

1 3

D

Q4
2N7002_SOT23

+3VS

+2.5VS

R41 0_0402_5%GM@

G

S

R47

Title

Size Document Number Rev

Date: Sheet

GMCH_CRT_DATA

12

VGA_DDC_DATAD_DDC_DATA

VGA_DDC_CLK

GMCH_CRT_CLK

12

0_0402_5%GM@

Compal Electronics, Inc.

CRT & TVout Connector

Wednesday, April 20, 2005

EFL50 LA-2761

GMCH_CRT_DATA 8

VGA_DDC_DATA 15

VGA_DDC_CLK 15

GMCH_CRT_CLK 8

14 51

E

of

0.2

5

4

3

2

1

PCEI_GTX_C_MRX_N[0..15]8,41

LCD POWER CIRCUIT

D D

2

G

12

INVT_PWM

1U_0603_10V4Z@

2

G

+3V

R63
1K_0402_5%

1 2

13

D

S

Q43
BSS138_SOT23

BKOFF#33

+3VS

R624

12

1

C29

2

0.047U_0402_16V7KGM@

D3
RB751V_SOD323

21

100K_0402_5%

GM@

R65

100K_0402_5%GM@

1 2

BKOFF# DISPO FF#

GMCH_ENBKL8,33

G

2

1 3

1

4.7U_0805_10V4ZGM@

2

+3VS

12

R57

4.7K_0402_5%

1 2

R86 0_0402_5%GM@

W=60mils

S

Q6

W=60mils

D

+LCDVDD

C21

SI2301BDS_SOT23GM@

+LCDVDD

1

C27

0.1U_0402_16V4ZGM@

2

ENBKLGMCH_ENBKL

+LCDVDD

12

R61

300_0603_1%GM@

13

D

Q7

2N7002_SOT23GM@

GMCH_ENVDD8

C C

+3VS

1

C25

2

D5

1N4148_SOT23@

B B

GMCH_ENVDD

10K_0402_5%

0.1U_0402_16V4Z@

12

S

R625

1

C33

2

LCD/PANEL BD. Conn.

B+

+3VS

GMCH_LCD_CLK8

GMCH_LCD_DATA8

GMCH_TZOUT0-8
GMCH_TZOUT0+8

GMCH_TZOUT1+8
GMCH_TZOUT1-8

GMCH_TZOUT2+8
GMCH_TZOUT2-8

GMCH_TZCLK-8

A A

GMCH_TZCLK+8

GMCH_LCD_CLK
GMCH_LCD_DATA

GMCH_TZOUT0-

GMCH_TZOUT1+
GMCH_TZOUT1-

GMCH_TZOUT2+
GMCH_TZOUT2-

GMCH_TZCLK­GMCH_TZCLK+

LCD_ID

JP16

1

21

2

22

3

23

4

24

5

25

6

26

7

27

8

28

9

29

10

30

11

31

12

32

13

33

14

34

15

35

16

36

17

37

18

38

19

39

20

40

ACES_88107-4000G

GM@

DAC_BRIG
INVT_PWM
DISPOFF#

GMCH_TXOUT0­GMCH_TXOUT0+GMCH_TZOUT0+

GMCH_TXOUT1­GMCH_TXOUT1+

GMCH_TXOUT2+
GMCH_TXOUT2-

GMCH_TXCLK­GMCH_TXCLK+

DAC_BRIG 33
INVT_PWM 33

+LCDVDD

GMCH_TXOUT0- 8
GMCH_TXOUT0+ 8

GMCH_TXOUT1- 8
GMCH_TXOUT1+ 8

GMCH_TXOUT2+ 8
GMCH_TXOUT2- 8

GMCH_TXCLK- 8
GMCH_TXCLK+ 8

PCEI_GTX_C_MRX_P[0..15]8,41

PCIE_MTX_C_GRX_N[0..15]8,41
PCIE_MTX_C_GRX_P[0..15]8,41

VGA_CRT_R14
VGA_CRT_G14

VGA_CRT_B14
VGA_CRT_VSYNC14
VGA_CRT_HSYNC14

VGA_DDC_CLK14
VGA_DDC_DATA14

DVI_TXC+41
DVI_TXC-41
DVI_TXD0+41
DVI_TXD0-41

DVI_TXD1+41
DVI_TXD1-41
DVI_TXD2+41
DVI_TXD2-41

CLK_PCIE_VGA13
CLK_PCIE_VGA#13

+5VALW

+5VS

+3VALW

+2.5VS
+1.8VS

PCEI_GTX_C_MRX_N[0..15]
PCEI_GTX_C_MRX_P[0..15]

PCIE_MTX_C_GRX_N[0..15]

PCIE_MTX_C_GRX_P[0..15]

VGA_CRT_R
VGA_CRT_G
VGA_CRT_B
VGA_CRT_VSYNC
VGA_CRT_HSYNC

PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0

PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1

PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2

PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3

PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4

PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5

PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6

PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7

PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8

PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9

PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10

PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11

PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12

PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13

PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14

PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15

VGA_DDC_CLK
VGA_DDC_DATA

DVI_TXC+
DVI_TXC­DVI_TXD0+
DVI_TXD0-

DVI_TXD1+
DVI_TXD1­DVI_TXD2+
DVI_TXD2-

CLK_PCIE_VGA
CLK_PCIE_VGA#

VGA BOARD Conn.

JP22

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
57 58
59 60
61 62
63 64
65 66
67 68
69 70
71 72
73 74
75 76
77 78
79 80
81 82
83 84
85 86
87 88
89 90
91 92
93 94
95 96
97 98
99 100
101 102
103 104
105 106
107 108
109 110
111 112
113 114
115 116
117 118
119 120
121 122
123 124
125 126
127 128
129 130
131 132
133 134
135 136
137 138
139 140
141 142
143 144
145 146
147 148
149 150
151 152
153 154
155 156
157 158
159 160

ACES_88081-1600PM@

Reverse for Layout

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

VGA_CRT_R
VGA_CRT_G
VGA_CRT_B
VGA_TV_LUMA
VGA_TV_CRMA
VGA_TV_COMPS

R618 150_0402_5%

1 2

R619 150_0402_5%

1 2

R620 150_0402_5%

1 2

R621 150_0402_5%

1 2

R622 150_0402_5%

1 2

R623 150_0402_5%

1 2

2005/01/24

B+

VGA_TV_LUMA
VGA_TV_CRMA
VGA_TV_COMPS

PCEI_GTX_C_MRX_P0
PCEI_GTX_C_MRX_N0

PCEI_GTX_C_MRX_P1
PCEI_GTX_C_MRX_N1

PCEI_GTX_C_MRX_P2
PCEI_GTX_C_MRX_N2

PCEI_GTX_C_MRX_P3
PCEI_GTX_C_MRX_N3

PCEI_GTX_C_MRX_P4
PCEI_GTX_C_MRX_N4

PCEI_GTX_C_MRX_P5
PCEI_GTX_C_MRX_N5

PCEI_GTX_C_MRX_P6
PCEI_GTX_C_MRX_N6

PCEI_GTX_C_MRX_P7
PCEI_GTX_C_MRX_N7

PCEI_GTX_C_MRX_P8
PCEI_GTX_C_MRX_N8

PCEI_GTX_C_MRX_P9
PCEI_GTX_C_MRX_N9

PCEI_GTX_C_MRX_P10
PCEI_GTX_C_MRX_N10

PCEI_GTX_C_MRX_P11
PCEI_GTX_C_MRX_N11

PCEI_GTX_C_MRX_P12
PCEI_GTX_C_MRX_N12

PCEI_GTX_C_MRX_P13
PCEI_GTX_C_MRX_N13

PCEI_GTX_C_MRX_P14
PCEI_GTX_C_MRX_N14

PCEI_GTX_C_MRX_P15
PCEI_GTX_C_MRX_N15

SDVO_SCLK
SDVO_SDAT
DVI_DET
DVI_SCLK
DVI_SDATA
DAC_BRIG
DISPOFF#
INVT_PWM
PLTRST_VGA#
SUSP#
ENBKL
LCD_ID

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

EFL50 LA-2761

Wednesday, April 20, 2005

VGA_TV_LUMA 21
VGA_TV_CRMA 21

VGA_TV_COMPS 21

SDVO_SCLK 8,41
SDVO_SDAT 8,41
DVI_DET 38,41
DVI_SCLK 38,41
DVI_SDATA 38,41

PLTRST_VGA# 18,41

SUSP# 33,35,40
ENBKL 33
LCD_ID 18

+1.5VS
+3VS

+1.8VS

VGA / LCD CONN.

1

15 51

0.2

of

5

4

3

2

1

RP14

+3VS

D D

+3VS

+3VS

+3VS

C C

+3VS

+3VS

1 8
2 7
3 6
4 5

8.2K_1206_8P4R_5%

RP11

1 8
2 7
3 6
4 5

8.2K_1206_8P4R_5%

RP15

1 8
2 7
3 6
4 5

8.2K_1206_8P4R_5%

RP12

1 8
2 7
3 6
4 5

8.2K_1206_8P4R_5%

RP13

1 8
2 7
3 6
4 5

8.2K_1206_8P4R_5%

RP23

1 8
2 7
3 6
4 5

8.2K_1206_8P4R_5%

PCI_SERR#
PCI_TRDY#
PCI_FRAME#
PCI_STOP#

PCI_PLOCK#
PCI_IRDY#
PCI_PERR#
PCI_DEVSEL#

PCI_PIRQD#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQA#

PCI_PIRQE#
PCI_PIRQF#
D_USB_SMI#2
PCI_PIRQG#

PCI_REQ#3
D_USB_SMI#1
PCI_REQ#4
PCI_REQ#1

PCI_GNT#6
PCI_REQ#0
PCI_REQ#2
PCI_PIRQH#

PCI_AD[0..31]22,24,25,27,28

PCI_FRAME#22,24,25,27,28

PCI_PIRQA#22
PCI_PIRQB#22

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_FRAME#

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

U13B

E2

AD[0]

E5

AD[1]

C2

AD[2]

F5

AD[3]

F3

AD[4]

E9

AD[5]

F2

AD[6]

D6

AD[7]

E6

AD[8]

D3

AD[9]

A2

AD[10]

D2

AD[11]

D5

AD[12]

H3

AD[13]

B4

AD[14]

J5

AD[15]

K2

AD[16]

K5

AD[17]

D4

AD[18]

L6

AD[19]

G3

AD[20]

H4

AD[21]

H2

AD[22]

H5

AD[23]

B3

AD[24]

M6

AD[25]

B2

AD[26]

K6

AD[27]

K3

AD[28]

A5

AD[29]

L1

AD[30]

K4

AD[31]

J3

FRAME#

Interrupt I/F

N2

PIRQ[A]#

L2

PIRQ[B]#

M1

PIRQ[C]#

L3

PIRQ[D]#

AC5

SATA[1]RXN/RSVD[1]

AD5

SATA[1]RXP/RSVD[2]

AF4

SATA[1]TXN/RSVD[3]

AG4

SATA[1]TXP/RSVD[4]

AC9

SATA[3]RXN/RSVD[5]

AD9

SATA[3]RXP/RSVD[6]

AF8

SATA[3]TXN/RSVD[7]

AG8

SATA[3]TXP/RSVD[8]

U3

TP[3]/RSVD[9]

ICH6_BGA609

PCI

REQ[4]#/GPI[40]

GNT[4]#/GPO[48]

REQ[5]#/GPI[1]

GNT[5]#/GPO[17]

REQ[6]#/GPI[0]

GNT[6]#/GPO[16]

PIRQ[E]#/GPI[2]
PIRQ[F]#/GPI[3]
PIRQ[G]#GPI[4]

PIRQ[H]#/GPI[5]

RESERVED

REQ[0]#
GNT[0]#
REQ[1]#
GNT[1]#
REQ[2]#
GNT[2]#
REQ[3]#
GNT[3]#

C/BE[0]#
C/BE[1]#
C/BE[2]#
C/BE[3]#

IRDY#

PAR

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR#
STOP#
TRDY#

PLTRST#

PCICLK

PME#

L5
C1
B5
B6
M5
F1
B8
C8
F7
E7
E8
F6
B7
D8

J6
H6
G4
G2

A3
E1
R2
C3
E3
C5
G5
J1
J2

R5
G6
P6

D9
C7
C6
M3

PCI_REQ#0
PCI_GNT#0
PCI_REQ#1
PCI_GNT#1
PCI_REQ#2
PCI_GNT#2
PCI_REQ#3
PCI_GNT#3
PCI_REQ#4

D_USB_SMI#1
PCI_GNT#5
D_USB_SMI#2
PCI_GNT#6

PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3

PCI_IRDY#
PCI_PAR
PCI_RST#
PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#

PLT_RST#
CLK_ICH_PCI

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

PCI_REQ#0 24
PCI_GNT#0 24
PCI_REQ#1 27,28
PCI_GNT#1 27,28
PCI_REQ#2 22
PCI_GNT#2 22
PCI_REQ#3 25
PCI_GNT#3 25

D_USB_SMI#1 38
D_USB_SMI#2 38

PCI_C/BE#0 22,24,25,27,28
PCI_C/BE#1 22,24,25,27,28
PCI_C/BE#2 22,24,25,27,28
PCI_C/BE#3 22,24,25,27,28

PCI_IRDY# 22,24,25,27,28
PCI_PAR 2 2 ,2 4,25,27,28
PCI_RST# 22,24, 25,27,28,32,33
PCI_DEVSEL# 22, 24 ,25,27,28
PCI_PERR # 22,24,25,27,28

PCI_SERR # 22,24,25,27,28
PCI_STOP# 22,24,25,27,28
PCI_T R D Y # 22,24,25,27,28

PLT_RST# 6,18,20,32,33,41
CLK_PCI_ICH 13

PCI_PIRQE# 24
PCI_PIRQF# 25
PCI_PIRQG# 27,28
PCI_PI R QH# 27,28

Internal Pull-up.
Sample hi g h de stina tion is LPC.

PCI_GNT#5

12

R154

0_0402_5%@

CLK_PCI_ICH

R157

10_0402_5%@

1 2
1

C173

10P_0402_50V8J@

2

B B

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

ICH6(1/4)

EFL50 LA-2761

16 51Wednesday, April 20, 2005

1

0.2

of

5

+RTCVCC

12

R440

+3VS

1M_0402_1%

INTRUDER#

+3VS

12

R185
10K_0402_5%

PHDD_LED#

R189 4.7K_0402_5%

1 2

R201 8.2K_0402_5%

1 2

D D

C C

B B

32.768KHZ_12.5P_1TJS125DJ2A073

+RTCVCC

close to RAM door

ICH_AC_BITCLK29,34

ICH_AC_SYNC29,34
ICH_AC_RST#29,34

ICH_AC_SDOUT29,34

PHDD_LED#33

IDE_DIORDY

IDE_IRQ

ICH_AC_SYNC AC97_SYNC_R
ICH_AC_RST#

ICH_AC_SDOUT AC_SDOUT

PHDD_LED# P_HDD_LED#

3
2

1 2

R444
20K_0402_5%

J3 JOPEN

C522

1U_0402_6.3V4Z

1 2

R150 33_0402_5%
R146 33_0402_5%

R427 33_0402_5%

R4641K_0402_5%

12

R4591K_0402_5%

12

R4911K_0402_5%

12

R4831K_0402_5%

12

R188 24.9_0402_1%

Place near ICH6 side.

SATA_DTX_IRX_N0

SATA_DTX_IRX_P0 SATA_DTX_C_IRX_P0

SATA_ITX_DRX_N0

SATA_ITX_DRX_P0 SATA_ITX_C_DRX_P0

C531 0.01U_0402_16V7K

C530 0.01U_0402_16V7K

C535 0.01U_0402_16V7K

C534 0.01U_0402_16V7K

SATA_DTX_C_IRX_N0

12

12

SATA_ITX_C_DRX_N0

12

12

4

C205

18P_0402_50V8J

12

Y2

4

OUT

NC
NC

18P_0402_50V8J

C203

1

IN

12

12

C142

10P_0402_50V8J@

1 2

12

1 2

ICH_AC_SDIN029
ICH_AC_SDIN134

12

1 2

R184 33_0402_5%

CLK_PCIE_SATA#13
CLK_PCIE_SATA13

1 2

IDE_DIORDY20

IDE_IRQ20
IDE_DDACK#20
IDE_DIOW#20
IDE_DIOR#20

ICH_RTCX1

12

R171

10M_0402_5%

ICH_RTCX2

ICH_RTCRST#

INTRUDER#

R149
10_0402_5%@

12

ICH_AC_BITCLK

AC97_RST_R#

ICH_AC_SDIN0
ICH_AC_SDIN1

SATA_DTX_IRX_N0
SATA_DTX_IRX_P0
SATA_ITX_DRX_N0
SATA_ITX_DRX_P0

SATA_DTX_IRX_N2
SATA_DTX_IRX_P2

CLK_PCIE_SATA#
CLK_PCIE_SATA

SATARBIAS

IDE_DIORDY
IDE_IRQ
IDE_DDACK#
IDE_DIOW#
IDE_DIOR#

SATA_DTX_C_IRX_N0 20

SATA_DTX_C_IRX_P0 20

SATA_ITX_C_DRX_N0 20

SATA_ITX_C_DRX_P0 20

AA2
AA3

AA5

D12
B12
D11
F13

F12
B11
E12

E11
C13

C12
C11
E13

C10

A10
F11

F10
B10

AC19

AE3
AD3
AG2

AF2

AD7
AC7

AF6

AG6
AC2

AC1

AG11

AF11

AF16
AB16
AB15
AC14
AE16

Y1
Y2

B9

C9

U13A

RTCX1
RTCX2

RTCRST#
INTRUDER#

INTVRMEN

EE_CS
EE_SHCLK
EE_DOUT
EE_DIN

LAN_CLK
LAN_RSTSYNC
LANRXD[0]

LANRXD[1]
LANRXD[2]

LANTXD[0]
LANTXD[1]
LANTXD[2]

ACZ_BIT_CLK
ACZ_SYNC

ACZ_RST#
ACZ_SDIN[0]

ACZ_SDIN[1]
ACZ_SDIN[2]

ACZ_SDO

SATALED#

SATA[0]RXN
SATA[0]RXP
SATA[0]TXN
SATA[0]TXP

SATA[2]RXN
SATA[2]RXP
SATA[2]TXN
SATA[2]TXP

SATA_CLKN
SATA_CLKP

SATARBIAS#
SATARBIAS

IORDY
IDEIRQ
DDACK#
DIOW#
DIOR#

ICH6_BGA609

3

RTC

LAD[0]/FWH[0]
LAD[1]/FWH[1]
LAD[2]/FWH[2]
LAD[3]/FWH[3]

LPC

LDRQ[0]#

LDRQ[1]#/GPI[41]

LFRAME#/FWH[4]

A20GATE

A20M#

LAN

CPUSLP#

CPU

DPRSLP#/TP[4]

DPSLP#/TP[2]

FERR#

CPUPWRGD/GPO[49]

IGNNE#

INIT3_3V#

INIT#
INTR

RCIN#

SMI#

STPCLK#

THRMTRIP#

DA[0]
DA[1]
DA[2]

DCS1#
DCS3#

SATAAC-97/AZALIA

DD[0]
DD[1]
DD[2]
DD[3]

PIDE

DD[4]
DD[5]
DD[6]
DD[7]
DD[8]

DD[9]
DD[10]
DD[11]
DD[12]
DD[13]
DD[14]
DD[15]

DDREQ

NMI

P2
N3
N5
N4

N6
P4

P3

AF22
AF23

AE27
AE24

AD27
AF24
AG25
AG26

AE22
AF27
AG24

AD23
AF25

AG27
AE26
AE23

AC16
AB17
AC17

AD16
AE17

AD14
AF15
AF14
AD12
AE14
AC11
AD11
AB11
AE13
AF13
AB12
AB13
AC13
AE15
AG15
AD13

AB14

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

LPC_DRQ#1
LPC_FRAME#

EC_GA20
H_A20M#

R176 0_0402_5% @

DPRSTP#
DPSLP#

H_PWRGOOD
H_IGNNE#
H_INIT#

H_INTR

KB_RST#
H_NMI

H_SMI#
H_STPCLK#
THRMTRIP#

IDE_DA0
IDE_DA1
IDE_DA2

IDE_DCS1#
IDE_DCS3#

IDE_DD0
IDE_DD1
IDE_DD2
IDE_DD3
IDE_DD4
IDE_DD5
IDE_DD6
IDE_DD7
IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15

IDE_DDREQ

1 2

R180 0_0402_5%@

1 2

R182 56_0402_5%

1 2

LPC_AD0 32,33
LPC_AD1 32,33
LPC_AD2 32,33
LPC_AD3 32,33

LPC_DRQ#1 32

LPC_FRAME# 32,33

R199 10K_0402_5%

H_DPSLP# 4

IDE_DA[0..2] 20

IDE_DCS1# 20
IDE_DCS3# 20

IDE_DD[0..15] 20

IDE_DDREQ 20

1 2

R195

10K_0402_5%

1 2

EC_GA20 33
H_A20M# 4

H_PWRGOOD 4
H_IGNNE# 4
H_INIT# 4

H_INTR 4

EC_KBRST# 33

H_NMI 4
H_SMI# 4

H_STPCLK# 4

2

H_CPUSLP#CPUSLP#
H_DPRSTP#

H_FERR#FERR#

+3VS

+3VS

H_CPUSLP# 4,6

H_DPRSTP# 4

H_FERR# 4

+1.05VS

+1.05VS

R187 75_0402_1%

R194

330_0402_5%@

1 2

1 2

H_FERR#
H_DPRSTP#

2

B

1

C

E

3

1

1 2

R183 56_0402_5%

1 2

R181 56_0402_5%@

MAINPW O N

Q16

2SC2411K_SC59@

R186
56_0402_5%

H_THERMTRIP#

MAINPWON 40 ,42,44,45

THRMTRIP#

12

H_THERMTRIP# 4,6

+1.05VS

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

ICH6(2/4)

EFL50 LA-2761

17 51Wednesday, April 20, 2005

1

0.2

of

5

4

3

2

1

+3VALW

1 2

R439 10K_0402_5%

1 2

R434 10K_0402_5%

1 2

R438 2.2K_0402_5%

1 2

D D

C C

B B

R437 2.2K_0402_5%

1 2

R436 10K_0402_5%

1 2

R431 10K_0402_5%

1 2

R167 10K_0402_5%

1 2

R168 8.2K_0402_5%

1 2

R433 1K_0402_5%

1 2

R170 10K_0402_5%

+3VS

1 2

R190 10K_0402_5%

1 2

R191 8.2K_0402_5%

1 2

R196 10K_0402_5%

1 2

R193 10K_0402_5%

1 2

R197 10K_0402_5%

1 2

R430 10K_0402_5%

1 2

R172 10K_0402_5%@

1 2

R441 10K_0402_5%

RP16

4 5
3 6
2 7
1 8

100_1206_8P4R_5%

1 2

R192 100K_0402_5%

ICH_SMLINK0
ICH_SMLINK1
CK_SCLK
CK_SDATA
LINKALERT#
EC_LID_OUT#
EC_SWI#
PM_BATLOW#
PE_WAKE#
SYSRST#

EZ_PE_REQ2#33,38

EC_LID_OUT#33

EC_LID_OUT# LID_OUT#

R432 0_0402_5%@

ICH_GPI7
PM_CLKRUN#
ICH_VGATE
MCH_SYNC#
SERIRQ
LID_OUT#

SYS_PWROK
EC_RSMRST#

GPI29
GPI28
GPI27
GPI26

PM_DPRSLPVR

EZ_PE_REQ2#

EC_LID_OUT# LID_OUT#

12

D8

RB751V_SOD323

D25

RB751V_SOD323

21

21

SB_INT_FLASH_SEL#35

PE_WAKE#

PM_DPRSLPVR46

EC_SWI#33

CK_SCLK13

CK_SDATA13

SB_SPKR29

SUS_STAT#35

PM_BMBUSY#6

EC_SMI#33

ACIN133

EC_SCI#33

PM_STP_PCI#13

PM_STP_CPU#13,46

PLTRST_VGA#15,41

IDE_HRESET#20

LCD_ID15

EC_FLASH#35

PM_CLKRUN#24,25,27,28,32,33

R435 0_0402_5%

SERIRQ22,32,33

EC_THERM#33

VGATE6,13,46

PM_SLP_S3#33

SYS_PWROK39

PBTN_OUT#33

EC_RSMRST#33

VGATE

RTC_CLK33

PLT_RST#6,16,20,32,33,41

EC_SWI#
GPI26

GPI27
GPI28
GPI29

CK_SCLK
CK_SDATA
LINKALERT#
ICH_SMLINK0
ICH_SMLINK1
MCH_SYNC#
SB_SPKR

SUS_STAT#
SYSRST#
PM_BMBUSY#
ICH_GPI7

EC_SMI#
ACIN1

EC_SCI#
PM_STP_PCI#
SB_INT_FLASH_SEL#

PLTRST_VGA#
IDE_HRESET#
LCD_ID
EC_FLASH#

PM_CLKRUN#

12

SERIRQ
EC_THERM#

ICH_VGATE

12

R198 0_0402_5%

CLK_14M_ICH
CLK_48M_ICH
RTC_CLK
SLP_S3#

SLP_S4#
SLP_S5#

SYS_PWROK
PM_DPRSLPVR
PM_BATLOW#
PBTN_OUT#
PLT_RST#
EC_RSMRST#

WAKE#

U13C

T2

RI#

AF17

SATA[0]GP/GPI[26]

AE18

SATA[1]GP/GPI[29]

AF18

SATA[2]GP/GPI[30]

AG18

SATA[3]GP/GPI[31]

Y4

SMBCLK

W5

SMBDATA

Y5

LINKALERT#

W4

SMLINK[0]

U6

SMLINK[1]

AG21

MCH_SYNC#

F8

SPKR

W3

SUS_STAT#/LPCPD#

U2

SYS_RESET#

AD19

BM_BUSY#/GPI[6]

AE19

GPI[7]

R1

GPI[8]

W6

SMBALERT#/GPI[11]

M2

GPI[12]

R6

GPI[13]

AC21

STP_PCI#/GPO[18]

AB21

GPO[19]

AD22

STP_CPU#/GPO[20]

AD20

GPO[21]

AD21

GPO[23]

V3

GPIO[24]

P5

GPIO[25]

R3

GPIO[27]

T3

GPIO[28]

AF19

CLKRUN#/GPIO[32]

AF20

GPIO[33]

AC18

GPIO[34]

U5

WAKE#

AB20

SERIRQ

AC20

THRM#

AF21

VRMPWRGD

E10

CLK14

A27

CLK48

V6

SUSCLK

T4

SLP_S3#

T5

SLP_S4#

T6

SLP_S5#

AA1

PWROK

AE20

DPRSLPVR/TP[1]

V2

BATLOW#/TP[0]

U1

PWRBTN#

V5

LAN_RST#

Y3

RSMRST#

ICH6_BGA609

PERn[1]
PERp[1]

PETn[1]
PETp[1]

PERn[2]
PERp[2]

PETn[2]
PETp[2]

PERn[3]
PERp[3]

PETn[3]
PETp[3]

GPIO

PERn[4]
PERp[4]

PETn[4]

PCI-EXPRESSDIRECT MEDIA INTERFACE

PETp[4]

DMI[0]RXN

DMI[0]RXP
DMI[0]TXN
DMI[0]TXP

DMI[1]RXN

DMI[1]RXP
DMI[1]TXN
DMI[1]TXP

DMI[2]RXN

DMI[2]RXP
DMI[2]TXN
DMI[2]TXP

DMI[3]RXN

DMI[3]RXP
DMI[3]TXN
DMI[3]TXP

DMI_CLKN

DMI_CLKP

DMI_ZCOMP
DMI_IRCOMP
OC[4]#/GPI[9]

OC[5]#/GPI[10]
OC[6]#/GPI[14]
OC[7]#/GPI[15]

OC[0]#
OC[1]#
OC[2]#
OC[3]#

USBP[0]N
USBP[0]P
USBP[1]N

CLOCK

USBP[1]P
USBP[2]N
USBP[2]P
USBP[3]N
USBP[3]P

USB

USBP[4]N
USBP[4]P
USBP[5]N
USBP[5]P
USBP[6]N
USBP[6]P
USBP[7]N

POWER MGT

USBP[7]P

USBRBIAS#

USBRBIAS

H25
H24
G27
G26

K25
K24
J27
J26

M25
M24
L27
L26

P24
P23
N27
N26

T25
T24
R27
R26

V25
V24
U27
U26

Y25
Y24
W27
W26

AB24
AB23
AA27
AA26

AD25
AC25

F24
F23
C23

D23
C25
C24

C27
B27
B26
C26

C21
D21
A20
B20
D19
C19
A18
B18
E17
D17
B16
A16
C15
D15
A14
B14

A22
B22

EZ_PCIE_RXN1
EZ_PCIE_RXP1

EZ_PCIE_C_TXP1
EZ_PCIE_RXN2

EZ_PCIE_RXP2
EZ_PCIE_C_TXP2

DMI_MTX_IRX_N0
DMI_MTX_IRX_P0
DMI_ITX_MRX_N0
DMI_ITX_MRX_P0

DMI_MTX_IRX_N1
DMI_MTX_IRX_P1
DMI_ITX_MRX_N1
DMI_ITX_MRX_P1

DMI_MTX_IRX_N2
DMI_MTX_IRX_P2
DMI_ITX_MRX_N2
DMI_ITX_MRX_P2PM_STP_CPU#

DMI_MTX_IRX_N3
DMI_MTX_IRX_P3
DMI_ITX_MRX_N3
DMI_ITX_MRX_P3

CLK_PCIE_ICH#
CLK_PCIE_ICH

DMI_IRCOMP
USB_OC#4

USB_OC#5
USB_OC#6
USB_OC#7

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3

USB20_N0
USB20_P0

USB20_N2
USB20_P2

USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6

USBRBIAS

C489 0.1U_0402_16V4Z1@

1 2

1 2

C490 0.1U_0402_16V4Z1@

C494 0.1U_0402_16V4Z1@

1 2

1 2

C495 0.1U_0402_16V4Z1@

DMI_MTX_IRX_N0 6
DMI_MTX_IRX_P0 6
DMI_ITX_MRX_N0 6
DMI_ITX_MRX_P0 6

DMI_MTX_IRX_N1 6
DMI_MTX_IRX_P1 6
DMI_ITX_MRX_N1 6
DMI_ITX_MRX_P1 6

DMI_MTX_IRX_N2 6
DMI_MTX_IRX_P2 6
DMI_ITX_MRX_N2 6
DMI_ITX_MRX_P2 6

DMI_MTX_IRX_N3 6
DMI_MTX_IRX_P3 6
DMI_ITX_MRX_N3 6
DMI_ITX_MRX_P3 6

CLK_PCIE_ICH# 13
CLK_PCIE_ICH 13

R429 24.9_0402_1%

1 2

USB_OC#4 37
USB_OC#6 37

1231_Modify

USB_OC#0 37
USB_OC#2 37

USB20_N0 37
USB20_P0 37

USB20_N2 37
USB20_P2 37

USB20_N4 37
USB20_P4 37
USB20_N5 34
USB20_P5 34
USB20_N6 37
USB20_P6 37

1 2

R426 22.6_0402_1%

+1.5VS

EZ_PCIE_TXN1EZ_PCIE_C_TXN1
EZ_PCIE_TXP1

EZ_PCIE_TXN2EZ_PCIE_C_TXN2
EZ_PCIE_TXP2

USB_OC#5
USB_OC#6

USB_OC#7

USB_OC#3
USB_OC#0
USB_OC#1

EZ_PCIE_RXN1 38
EZ_PCIE_RXP1 38
EZ_PCIE_TXN1 38
EZ_PCIE_TXP1 38

EZ_PCIE_RXN2 38
EZ_PCIE_RXP2 38
EZ_PCIE_TXN2 38
EZ_PCIE_TXP2 38

RP9

4 5
3 6
2 7
1 8

10K_1206_8P4R_5%

RP10

4 5
3 6
2 7
1 8

10K_1206_8P4R_5%

+3VALW

+3VALW

U14

CLK_ICH_48M13 CLK_ICH_14M13

CLK_48M_ICH

12

A A

R152

10_0402_5%@

1

C162

10P_0402_50V8J@

2

5

CLK_14M_ICH

12

R428

10_0402_5%@

1

C486

10P_0402_50V8J@

2

4

PM_SLP_S5#33

PM_SLP_S5#

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

O

3

C201

0.1U_0402_16V4Z

1 2

5

SLP_S4#

1

P

IN1

SLP_S5#

2

IN2

G

3

SN74AHC1G08DCKR_SC70

Title

Size Document Number Rev

2

Date: Sheet

Compal Electronics, Inc.

ICH6(3/4)

EFL50 LA-2761

18 51Wednesday, April 20, 2005

1

0.2

of

5

Near PIN F27(C155),
P27(C154), AB27(C157)

+1.5VS

D D

+5VS

+3VS

21

C147

D7

RB751V_SOD323

2

1

0.1U_0402_16V4Z

ICH_V5REF_RUN

2

C148

1

R148

10_0402_5%

C C

1 2

1U_0603_10V4Z

C219

+1.5VS

1

+

2

220U_D2_4VM_R12

2

C515

0.1U_0402_16V4Z

1

Near PIN AG5

+1.5VS

+3VALW

+5VALW

1 2

L25

1 2

21

D6

RB751V_SOD323

ICH_V5REF_SUS

2

C145
1U_0603_10V4Z

1

ICH6_VCCDMIPLL ICH6_VCCPLL

5

2

C487

0.1U_0402_16V4Z

1

R173

0.5_0603_1%

1 2

C208

0.1U_0402_16V4Z

B B

R147

10_0402_5%

CHB1608U301_0603

+1.5VS

A A

Near PIN AG9

+3VS

0.1U_0402_16V4Z

1

2

2

1

C207

0.01U_0402_16V7K

Near PIN
AC27

C483

2

1

+3VALW

Near PIN A17

2

C504

1

0.1U_0402_16V4Z

2

1

2

1

Near PIN
E26, E27

4

2

2

C499

C500

1

1

0.1U_0402_16V4Z

C521

0.1U_0402_16V4Z

C517

0.1U_0402_16V4Z

ICH6_VCCPLL

+1.5VS

+3VS

+3VS

+3VALW

2

2

C479

1

1

0.1U_0402_16V4Z

4

0.1U_0402_16V4Z

C480

0.1U_0402_16V4Z

U13E

AA22

VCC1_5[1]

AA23

VCC1_5[2]

AA24

VCC1_5[3]

AA25

VCC1_5[4]

AB25

VCC1_5[5]

AB26

VCC1_5[6]

AB27

VCC1_5[7]

F25

VCC1_5[8]

F26

VCC1_5[9]

F27

VCC1_5[10]

G22

VCC1_5[11]

G23

VCC1_5[12]

G24

VCC1_5[13]

G25

VCC1_5[14]

H21

VCC1_5[15]

H22

VCC1_5[16]

J21

VCC1_5[17]

J22

VCC1_5[18]

K21

VCC1_5[19]

K22

VCC1_5[20]

L21

VCC1_5[21]

L22

VCC1_5[22]

M21

VCC1_5[23]

M22

VCC1_5[24]

N21

VCC1_5[25]

N22

VCC1_5[26]

N23

VCC1_5[27]

N24

VCC1_5[28]

N25

VCC1_5[29]

P21

VCC1_5[30]

P25

VCC1_5[31]

P26

VCC1_5[32]

P27

VCC1_5[33]

R21

VCC1_5[34]

R22

VCC1_5[35]

T21

VCC1_5[36]

T22

VCC1_5[37]

U21

VCC1_5[38]

U22

VCC1_5[39]

V21

VCC1_5[40]

V22

VCC1_5[41]

W21

VCC1_5[42]

W22

VCC1_5[43]

Y21

VCC1_5[44]

Y22

VCC1_5[45]

AA6

VCC1_5[46]

AB4

VCC1_5[47]

AB5

VCC1_5[48]

AB6

VCC1_5[49]

AC4

VCC1_5[50]

AD4

VCC1_5[51]

AE4

VCC1_5[52]

AE5

VCC1_5[53]

AF5

VCC1_5[54]

AG5

VCC1_5[55]

AA7

VCC1_5[56]

AA8

VCC1_5[57]

AA9

VCC1_5[58]

AB8

VCC1_5[59]

AC8

VCC1_5[60]

AD8

VCC1_5[61]

AE8

VCC1_5[62]

AE9

VCC1_5[63]

AF9

VCC1_5[64]

AG9

VCC1_5[65]

AC27

VCCDMIPLL

E26

VCC3_3[1]

AE1

VCCSATAPLL

AG10

VCC3_3[22]

A13

VCCLAN3_3/VCCSUS3_3[1]

F14

VCCLAN3_3/VCCSUS3_3[2]

G13

VCCLAN3_3/VCCSUS3_3[3]

G14

VCCLAN3_3/VCCSUS3_3[4]

A11

VCCSUS3_3[1]

U4

VCCSUS3_3[2]

V1

VCCSUS3_3[3]

V7

VCCSUS3_3[4]

W2

VCCSUS3_3[5]

Y7

VCCSUS3_3[6]

A17

VCCSUS3_3[7]

B17

VCCSUS3_3[8]

C17

VCCSUS3_3[9]

F18

VCCSUS3_3[10]

G17

VCCSUS3_3[11]

G18

VCCSUS3_3[12]

ICH6_BGA609

COREIDE

PCIE

PCIUSB

VCCSUS1_5[3]
VCCSUS1_5[2]

VCCSUS1_5[1]

SATA

USB CORE

PCI/IDE RBP

V5REF_SUS

VCCUSBPLL

VCCSUS3_3[20]

VCCLAN1_5/VCCSUS1_5[2]
VCCLAN1_5/VCCSUS1_5[1]

V_CPU_IO[3]
V_CPU_IO[2]
V_CPU_IO[1]

VCCSUS3_3[19]
VCCSUS3_3[18]
VCCSUS3_3[17]
VCCSUS3_3[16]
VCCSUS3_3[15]
VCCSUS3_3[14]
VCCSUS3_3[13]

3

VCC1_5[98]
VCC1_5[97]
VCC1_5[96]
VCC1_5[95]
VCC1_5[94]
VCC1_5[93]
VCC1_5[92]
VCC1_5[91]
VCC1_5[90]
VCC1_5[89]
VCC1_5[88]
VCC1_5[87]
VCC1_5[86]
VCC1_5[85]
VCC1_5[84]
VCC1_5[83]
VCC1_5[82]
VCC1_5[81]
VCC1_5[80]
VCC1_5[79]

VCC3_3[21]
VCC3_3[20]
VCC3_3[19]
VCC3_3[18]
VCC3_3[17]
VCC3_3[16]
VCC3_3[15]
VCC3_3[14]
VCC3_3[13]
VCC3_3[12]

VCC3_3[11]
VCC3_3[10]

VCC3_3[9]
VCC3_3[8]
VCC3_3[7]
VCC3_3[6]
VCC3_3[5]
VCC3_3[4]
VCC3_3[3]
VCC3_3[2]

VCC1_5[78]
VCC1_5[77]
VCC1_5[76]
VCC1_5[75]
VCC1_5[74]
VCC1_5[73]
VCC1_5[72]
VCC1_5[71]
VCC1_5[70]
VCC1_5[69]
VCC1_5[68]

VCC1_5[67]

VCC2_5[4]
VCC2_5[2]

V5REF[2]
V5REF[1]

VCCRTC

F9
U17
U16
U14
U12
U11
T17
T11
P17
P11
M17
M11
L17
L16
L14
L12
L11
AA21
AA20
AA19

AA10
AG19
AG16
AG13
AD17
AC15
AA17
AA15
AA14
AA12

P1
M7
L7
L4
J7
H7
H1
E4
B1
A6

U7
R7

G19
G20

F20
E24
E23
E22
E21
E20
D27
D26
D25
D24

G8
AB18

P7
AA18

A8
F21
A25

A24
AB3
G11

G10
AG23

AD26
AB22

G16
G15
F16
F15
E16
D16
C16

+1.5VS

0.1U_0402_16V4Z

ICH_V5REF_RUN

ICH_V5REF_SUS

+RTCVCC

C527

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C496

2

C501

1

0.1U_0402_16V4Z

2

1

+1.5VS

+1.5VS
+3VALW

+RTCVCC

+1.5VS

+1.05VS

2

C528

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

C509

2

C485

1

2

1

C526

+3VS

Near PIN
AG13, AG16

2

C491

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C505

+2.5VS

Near PIN AB18

Near PIN AG23

2

1

+3VS

C492

Near PIN

0.1U_0402_16V4Z

A2-A6, D1-H1

2

1

2

1

2

C510

1

C516

0.1U_0402_16V4Z

2

+1.5VALW

0.1U_0402_16V4Z

+1.5VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.01U_0402_16V7K

Near PIN A25

0.01U_0402_16V7K

Near PIN AA19

+3VALW

C520

0.1U_0402_16V4Z

1 2

C488

0.1U_0402_16V4Z

1 2

C511

0.1U_0402_16V4Z

1 2

C514

0.1U_0402_16V4Z

1 2

Near PIN A24

+3VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Near PIN AG10

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

1

C508

1 2

C512

1 2

C507

1 2

C497

1 2

C503

1 2

C513

1 2

C484

1 2

C482

1 2

C493

1 2

C498

1 2

C502

1 2

C506

1 2

C518

1 2

C519

1 2

Title

Size Document Number Rev

Date: Sheet

U13D

E27
Y27

Y26
Y23

W25
W24
W23

V27
V26

V23
U25
U24
U23
U15
U13

T27

T26

T23

T16

T15

T14

T13

T12

R25
R24
R23
R17
R16
R15
R14
R13
R12
R11

P22

P16

P15

P14

P13

P12
N17

N16
N15
N14
N13
N12
N11

M27
M26
M23
M16
M15
M14
M13
M12

L25

L24

L23

L15

L13

K27

K26

K23

H27
H26
H23

G21
G12

Y6

W7

W1

V4

T7

T1
R4

N7

N1

M4

K7

K1

J4
J25
J24
J23

G9
G7

G1

VSS[172]
VSS[171]
VSS[170]
VSS[169]
VSS[168]
VSS[167]
VSS[166]
VSS[165]
VSS[164]
VSS[163]
VSS[162]
VSS[161]
VSS[160]
VSS[159]
VSS[158]
VSS[157]
VSS[156]
VSS[155]
VSS[154]
VSS[153]
VSS[152]
VSS[151]
VSS[150]
VSS[149]
VSS[148]
VSS[147]
VSS[146]
VSS[145]
VSS[144]
VSS[143]
VSS[142]
VSS[141]
VSS[140]
VSS[139]
VSS[138]
VSS[137]
VSS[136]
VSS[135]
VSS[134]
VSS[133]
VSS[132]
VSS[131]
VSS[130]
VSS[129]
VSS[128]
VSS[127]
VSS[126]
VSS[125]
VSS[124]
VSS[123]
VSS[122]
VSS[121]
VSS[120]
VSS[119]
VSS[118]
VSS[117]
VSS[116]
VSS[115]
VSS[114]
VSS[113]
VSS[112]
VSS[111]
VSS[110]
VSS[109]
VSS[108]
VSS[107]
VSS[106]
VSS[105]
VSS[104]
VSS[103]
VSS[102]
VSS[101]
VSS[100]
VSS[99]
VSS[98]
VSS[97]
VSS[96]
VSS[95]
VSS[94]
VSS[93]
VSS[92]
VSS[91]
VSS[90]
VSS[89]
VSS[88]
VSS[87]

ICH6_BGA609

VSS[86]
VSS[85]
VSS[84]
VSS[83]
VSS[82]
VSS[81]
VSS[80]
VSS[79]
VSS[78]
VSS[77]
VSS[76]
VSS[75]
VSS[74]
VSS[73]
VSS[72]
VSS[71]
VSS[70]
VSS[69]
VSS[68]
VSS[67]
VSS[66]
VSS[65]
VSS[64]
VSS[63]
VSS[62]
VSS[61]
VSS[60]
VSS[59]
VSS[58]
VSS[57]
VSS[56]
VSS[55]
VSS[54]
VSS[53]
VSS[52]
VSS[51]
VSS[50]
VSS[49]
VSS[48]
VSS[47]
VSS[46]
VSS[45]
VSS[44]
VSS[43]
VSS[42]
VSS[41]

GROUND

VSS[40]
VSS[39]
VSS[38]
VSS[37]
VSS[36]
VSS[35]
VSS[34]
VSS[33]
VSS[32]
VSS[31]
VSS[30]
VSS[29]
VSS[28]
VSS[27]
VSS[26]
VSS[25]
VSS[24]
VSS[23]
VSS[22]
VSS[21]
VSS[20]
VSS[19]
VSS[18]
VSS[17]
VSS[16]
VSS[15]
VSS[14]
VSS[13]
VSS[12]
VSS[11]
VSS[10]

Compal Electronics, Inc.

ICH6(4/4)

EFL50 LA-2761

19 51Wednesday, April 20, 2005

1

VSS[9]
VSS[8]
VSS[7]
VSS[6]
VSS[5]
VSS[4]
VSS[3]
VSS[2]
VSS[1]

F4
F22
F19
F17
E25
E19
E18
E15
E14
D7
D22
D20
D18
D14
D13
D10
D1
C4
C22
C20
C18
C14
B25
B24
B23
B21
B19
B15
B13
AG7
AG3
AG22
AG20
AG17
AG14
AG12
AG1
AF7
AF3
AF26
AF12
AF10
AF1
AE7
AE6
AE25
AE21
AE2
AE12
AE11
AE10
AD6
AD24
AD2
AD18
AD15
AD10
AD1
AC6
AC3
AC26
AC24
AC23
AC22
AC12
AC10
AB9
AB7
AB2
AB19
AB10
AB1
AA4
AA16
AA13
AA11
A9
A7
A4
A26
A23
A21
A19
A15
A12
A1

0.2

of

5

4

3

2

1

HDD CONN

IDE_DD[0..15]17

IDE_DA[0..2]17

IDE_DD[0..15]
IDE_DA[0..2]

D D

+5VS

IDE_DDREQ17
IDE_DIOW#17

12

1

2

IDE_DIOR#17
IDE_DIORDY17
IDE_DDACK#17
IDE_IRQ17

IDE_DCS1#17

0.1U_0402_16V4Z

1

C593

2

R224

100K_0402_5%

IDE_LED#33

C C

10U_0805_10V4Z

C598

IDE_LED#

+5VS

1

C594

2

0.1U_0402_16V4Z

+5VS

1

C590

2

1000P_0402_50V7K

IDE_RESET#
IDE_DD7
IDE_DD6
IDE_DD5
IDE_DD4
IDE_DD3
IDE_DD2
IDE_DD1
IDE_DD0

IDE_DDREQ
IDE_DIOW#
IDE_DIOR#
IDE_DIORDY
IDE_DDACK#
IDE_IRQ
IDE_DA1
IDE_DA0
IDE_DCS1#
IDE_LED#

JP28

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44

2SP@

SUYIN_200138FR044G272ZU_RV

For 2 Spindle

IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15

IDE_CSEL

R219 470_0402_5%

1 2

PDIAG#
IDE_DA2
IDE_DCS3#

80mils80mils

IDE_HRESET#18

IDE_DCS3# 17

+5VS

PLT_RST#6,16,18,32,33,41

IDE_HRESET#
PLT_RST#

+3VS

1

B

2

A

1 2

5

U19

P

4

Y

G

TC7SH08FU_SSOP5

3

C269

0.1U_0402_16V4Z

IDE_RESET#

+5VS

10U_0805_10V4Z

1

C279

2

1

C270

2

1U_0603_10V4Z

0.1U_0402_16V4Z

1

C268

2

1

C267

2

1000P_0402_50V7K

B B

SATA HDD CONN

JP29

S1

SATA_ITX_C_DRX_P017
SATA_ITX_C_DRX_N017

SATA_DTX_C_IRX_N017
SATA_DTX_C_IRX_P017

SATA_ITX_C_DRX_P0

SATA_DTX_C_IRX_N0
SATA_DTX_C_IRX_P0

+3VS

+5VS

A A

GND

S2

HTX+

S3

HTX-

S4

GND

S5

HRX-

S6

HRX+

S7

GND

P1

VCC3.3

P2

VCC3.3

P3

VCC3.3

P4

GND

P5

GND

P6

GND

P7

VCC5

P8

VCC5

P9

VCC5

P10

GND

P11

RESERVED

P12

GND

P13

VCC12

P14

VCC12

P15

VCC12

OCTEK_SAT-22RD1_REVERS

2SS@

For 2 Spindle

5

4

INT_CD_L29
CD_AGND29

+5VS

R567 470_0402_5%@

If CDROM is Slave
then SD_CSEL= Floating
else SD_CSEL= Low

CDROM_L
CD_AGND
IDE_RESET#SATA_ITX_C_DRX_N0
IDE_DD7
IDE_DD6
IDE_DD5
IDE_DD4
IDE_DD3
IDE_DD2
IDE_DD1
IDE_DD0

IDE_DIOW#
IDE_DIORDY
IDE_IRQ
IDE_DA1
IDE_DA0 IDE_DA2
IDE_DCS1#
IDE_LED#

SD_CSEL

12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CDROM CONN

JP39

1
3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51 52

OCTEK_CDR-50JD1

2S@

3

CDROM_R

2
4

IDE_DD8

6

IDE_DD9

8

IDE_DD10

10

IDE_DD11

12

IDE_DD12

14

IDE_DD13

16

IDE_DD14

18

IDE_DD15

20

IDE_DDREQ

22

IDE_DIOR#

24
26

IDE_DDACK#

28
30

PDIAG#

32
34

IDE_DCS3#

36
38
40
42
44
46
48
50

1 2

R566
@100K_0402_5%

80mils

INT_CD_R 29

+5VS

+5VS

Title

Size Document Number Rev

2

Date: Sheet of

Compal Electronics, Inc.

HDD & CDROM Connector

EFL50 LA-2761

1

0.2

20 51Wednesday, April 20, 2005

5

D D

4

3

2

1

1

2

1

C30

2

330P_0402_50V7K

D22
@DAN217_SOT23

3

CRMA_L
COMPS_L

LUMA_L

(CL55)

+3VS

JP17

3
6
7
5
2
4
1
8
9

SUYIN_030107FR007SX08FU

1

1

C48

2

2

1

2

3

L8

1 2

FBM-11-160808-121T_0603
L14

1 2

FBM-11-160808-121T_0603
L13

1 2

FBM-11-160808-121T_0603

C28

270P_0402_50V7K

C C

D23

@DAN217_SOT23

12

1

C40

2

270P_0402_50V7K

270P_0402_50V7K

VCC

1B1
2B1
3B1
4B1

1B2
2B2
3B2
4B2

16
2

5
11
14

3
6
10
13

+5VS

D_TV_LUMA
D_TV_CRMA
D_TV_COMPS

LUMA

CRMA

COMPS

R66

150_0402_5%

D_TV_LUMA 38
D_TV_CRMA 38
D_TV_COMPS 38

12

12

R74

150_0402_5%

150_0402_5%

R62

U5

DOCKIN#14,26,33,38

VGA_TV_LUMA15
GMCH_TV_LUMA8
VGA_TV_CRMA15
GMCH_TV_CRMA8

VGA_TV_COMPS15
GMCH_TV_COMPS8

B B

VGA_TV_LUMA
GMCH_TV_LUMA
VGA_TV_CRMA
GMCH_TV_CRMA

VGA_TV_COMPS
GMCH_TV_COMPS

1 2

R69 0_0402_5%PM@

1 2

R67 0_0402_5%GM@

1 2

R71 0_0402_5%PM@

1 2

R75 0_0402_5%GM@

1 2

R77 0_0402_5%PM@

1 2

R78 0_0402_5%GM@

LUMA_Q LUMA
CRMA_Q CRMA
COMPS_Q COMPS

DOCKIN#

LUMA_Q
CRMA_Q
COMPS_Q

1 2

R391 0_0402_5%ND@

1 2

R392 0_0402_5%ND@

1 2

R80 0_0402_5%ND@

1

SEL

15

OE#

4

1A

7

2A

9

3A

12

4A

8

GND

FSAV330MTC_TSSOP16

WD@

1

D24
@DAN217_SOT23

2

3

1

1

C44

2

2

330P_0402_50V7K

330P_0402_50V7K

C53

A A

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

PATA / SATA HDD Connector

EFL50 LA-2761

21 51Wednesday, April 20, 2005

1

0.2

of

5

D D

CLK_PCI_PCM

12

R581
@10_0402_5%

1

C591
@15P_0402_50V8J

2

C C

IDSEL:

R561
0_0402_5%

SDOC#23
XDOC#23

PCI_AD20

1 2

+3VS

CLK_SD_48M13

SDCM_XDALE23

SDDA0_XDD723
SDDA1_XDD023
SDDA2_XDCL23
SDDA3_XDD423

+3VS

SD_PULLHIGH23

1 2

R565
43K_0402_5%

1 2

SDCK23

XDWE#23

SDCD#
SDWP
MSINS#

5

MSPWREN#23

R570 22_0402_5%

1 2

R569 22_0402_5%

1 2

SDCD# & SDWP# & MSINS# have
internal 30Kohm pull up resistor

B B

CARD_LED#33

+3VS

A A

R297

43K_0402_5%

CLK_SD_48M

12

R296

@10_0402_5%

1

C344

15P_0402_50V8J

2

Chip has inter n al pull high

1 2

R592 @43K_0402_5%

1 2

R568 @43K_0402_5%

1 2

R587 @43K_0402_5%

Close chip termenal

4

VPPD023

VPPD123
VCCD0#23
VCCD1#23

N13

M13

U39

1 2
1 2

4

PCI_AD[0..31]

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

PCI_RST#

CLK_PCI_PCM

PCM_ID

PCI_PIRQA#
SD_PULLHIGH

PCI_PIRQB#

PCI_RST#

SDCD#
SDWP

CLK_SD_48M

SDCM_XDALE
SDDA0_XDD7
SDDA1_XDD0
SDDA2_XDCL
SDDA3_XDD4

L11

N10

L10
N11
M11

M10

C2
C1
D4
D2
D1
E4
E3
E2
F2

F1
G2
G3

H3

H4

J1
J2

N2
M3

N3

K4
M4

K5

L5
M5

K6
M6

N6
M7

N7

L7

K7

N8

E1

J3
N1
N5

G4

J4
K1
K3
L1
L2
L3

M1
M2

A1
B1
H1

L8

F4
K8

N9
K9

J9

E7
E8

F8

G7

H5
F6

E5
E6
F7
F5

G6
G5

PCI_AD[0..31]16,24,25,27,28

PCI_C/BE#316,24,25,27,28 S1_REG# 23
PCI_C/BE#216,24,25,27,28
PCI_C/BE#116,24,25,27,28
PCI_C/BE#016,24,25,27,28

PCI_RST#16,24,25,27,28,32,33

PCI_FRAME#16,24,25,27,28

PCI_IRDY#16,24,25,27,28

PCI_TRDY#16,24,25,27,28

PCI_DEVSEL#16,24,25,27,28

PCI_STOP#16,24,25,27,28
PCI_PERR#16,24,25,27,28

PCI_SERR#16,24,25,27,28

PCI_PAR16,24,25,27,28
PCI_REQ#216
PCI_GNT#216

CLK_PCI_PCM13

R563 10K_0402_5%

PCI_AD20

R584 100_0402_1%

PCI_PIRQA#16

PCI_PIRQB#16

SERIRQ18,32,33

SDOC#
XDOC#

+VCC_5IN1

SDCD#23
SDWP23

SDPWREN#23

VCCD1#

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

CBE3#
CBE2#
CBE1#
CBE0#

PCIRST#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
PAR
PCIREQ#
PCIGNT#
PCICLK

RIOUT#_PME#
SUSPEND#

IDSEL
MFUNC0

MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6
MFUNC7

GRST#

VCC_SD
SDCD#

SDWP/SMWPD#
SDPWREN33#

SDCLKI
SDCLK/SMWE#

SDCMD/SMALE
SDDAT0/SMDATA7
SDDAT1/SMDATA0
SDDAT2/SMCLE
SDDAT3/SMDATA4

GND_SD

G13

A7

N12

M12

VPPD0

VPPD1

VCCA2

VCCD0#

PCI Interface

SD/MMC/MS/SM

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B4

C8

VCC9

VCC10

VCCA1

GND1D3GND2H2GND3L4GND4M8GND5

GND6

F12

K11

3

G1

K2

N4

F3

L6

L9

H11

D12

VCC2

VCC3

VCC4

VCC1

VCC5

VCC6

VCC7

VCC8

CAD31/D10

CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6

CAD19/A25

CAD18/A7
CAD17/A24
CAD16/A17

CAD15/IOWR#

CAD14/A9

CAD13/IORD#

CAD12/A11

CAD11/OE#

CAD10/CE2#

CAD9/A10

CAD8/D15

CAD7/D7

CAD6/D13

CAD5/D6

CAD4/D12

CAD3/D5

CAD2/D11

CAD1/D4
CAD0/D3

CCBE3#/REG#

CCBE2#/A12

CCBE1#/A8

CCBE0#/CE1#

CARDBUS

CRST#/RESET
CFRAME#/A23

CIRDY#/A15

CTRDY#/A22

CDEVSEL#/A21

CSTOP#/A20
CPERR#/A14

CSERR#/WAIT#

CPAR/A13

CREQ#/INPACK#

CGNT#/WE#

CCLK/A16

CSTSCHG/BVD1_STSCHG#

CCLKRUN#/WP_IOIS16#

CBLOCK#/A19

CINT#/READY_IREQ#

SPKROUT

CAUDIO/BVD2_SPKR#

CCD2#/CD2#
CCD1#/CD1#

CVS2/VS2#

CVS1/VS1

CRSV3/D2
CRSV2/A18
CRSV1/D14

MSPWREN#/SMPWREN#

GND7

GND8

B6

C10

3

MSINS#

MSBS/SMDATA1

MSCLK/SMRE#
MSDATA0/SMDATA2
MSDATA1/SMDATA6
MSDATA2/SMDATA5
MSDATA3/SMDATA3

SMBSY#

SMCD#

SMWP#

SMCE#

CB714_LFBGA169

+S1_VCC
+3VS

B2
C3
B3
A3
C4
A6
D7
C7
A8
D8
A9
C9
A10
B10
D10
E12
F10
E13
F13
F11
G10
G11
G12
H12
H10
J11
J12
K13
J10
K10
K12
L13

B7
A11
E11
H13

B9
B11
A12
A13
B13
C12
C13
A5
D13
B8
C11
B12

C5
D5

D11
D6
M9

B5
A4

L12
D9
C6
A2
E10
J13

H7
J8
H8
E9
G9
H9
G8
F9

H6
J7
J6
J5

S1_A[0..25]
S1_D[0..15]

S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3

S1_REG#
S1_A12
S1_A8
S1_CE1#

S1_RST
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A14
S1_WAIT#
S1_A13
S1_INPACK#
S1_WE#
A16_CLK

S1_BVD1
S1_WP

S1_A19
S1_RDY#
PCM_SPK#

S1_BVD2
S1_CD2#

S1_CD1#
S1_VS2
S1_VS1
S1_D2
S1_A18
S1_D14

MSINS#
MSBS_XDD1
MSD0_XDD2

MSD1_XDD6
MSD2_XDD5
MSD3_XDD3

S1_A[0..25] 23
S1_D[0..15] 23

1 2

R593 33_0402_5%

XDWP#

R574

2.2K_0402_5%

1 2

2

S1_IOWR# 23
S1_IORD# 23
S1_OE# 23

S1_CE2# 23

S1_CE1# 23
S1_RST 23

S1_WAIT# 23
S1_INPACK# 23

S1_WE# 23

S1_BVD1 23
S1_WP 23

S1_RDY# 23
PCM_SPK# 29

S1_BVD2 23
S1_CD2# 23

S1_CD1# 23
S1_VS2 23
S1_VS1 23

MSINS# 23

XD_MS_PWREN# 23
MSBS_XDD1 23

MSD0_XDD2 23
MSD1_XDD6 23
MSD2_XDD5 23
MSD3_XDD3 23

XDBSY# 23

XDCD# 23
XDWP# 23
XDCE# 23

2

+3VS

1

C347

0.1U_0402_16V4Z

2

+3VS

1

C349

0.1U_0402_16V4Z

2

+S1_VCC

1

C617

0.1U_0402_16V4Z

2

S1_A16

1 2

R590 33_0402_5%

1

1

C346

0.1U_0402_16V4Z

2

1

C357

0.1U_0402_16V4Z

2

1

C618

0.1U_0402_16V4Z

2

S1_CD1#

10P_0402_50V8K

1

2

1

2

C348

C620

0.1U_0402_16V4Z

C605

0.1U_0402_16V4Z

1

C616

0.1U_0402_16V4Z

2

1

2

2

1

1

2

S1_CD2#

10P_0402_50V8K

C623

0.1U_0402_16V4Z

C599

0.1U_0402_16V4Z

1

C615

0.1U_0402_16V4Z

2

1

C619

2

Closed to Pin A4Closed to Pin L12

Chip has internal pull low

MSD0_XDD2
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3
MSBS_XDD1

1 2

R582 @43K_0402_5%

1 2

R579 @43K_0402_5%

1 2

R585 @43K_0402_5%

1 2

R588 @43K_0402_5%

1 2

R575 @43K_0402_5%

Close chip termenal

MSCLK_XDRE# 23

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics , Inc.

PCMCIA Controller

EFL50 LA-2761

22 51Wednesday, April 20, 2005

1

of

0.2

5

PCMCIA Power Controller

+5VS

+3VS

U36

9

12V

5

5V

6

5V

3

3.3V

4

3.3V
GND

7

1 2

XDBSY# 22

XDCE# 22

XDWE# 22

Don't support 12V card

D D

C5730.1U_0402_16V4Z
C5704.7U_0805_10V4Z

C5740.1U_0402_16V4Z
C5714.7U_0805_10V4Z

R562

10K_0402_5%

C C

+VCC_SM/XD

XDBSY#

12

R551 43K_0402_5%

1 2

R547 43K_0402_5%
R564 43K_0402_5%
R545 2.2K_0402_5%

MSCLK_XDRE#

12

XDWE#

12

+SD_PULLHIGH by BIOS setting

SD_PULLHIGH22

1 2

R294 0_0603_5%@

1 2

B B

R557 43K_0402_5%@

1 2

R553 43K_0402_5%@

1 2

R541 43K_0402_5%@

1 2

R560 43K_0402_5%@

1 2

R559 43K_0402_5%@

SD_PULLHIGH

SD_PULLHIGH
SDCM_XDALE
SDDA0_XDD7
SDDA1_XDD0
SDDA2_XDCL
SDDA3_XDD4

Close to 5 in 1 socket

+3VS

R536

A A

XD_MS_PWREN#22

4.7K_0402_5%

1 2

SDPWREN#22
MSPWREN#22

1 2

R632 0_0402_5%

13

VCC

12

VCC

11

VCC

10

VPP

1

VCCD0

2

VCCD1

15

VPPD0

14

VPPD1

8

OC

SHDN

16

CP2211D3_SSOP16

Reserve for SD pull high issue.

SD CLK

MS CLK

+3VS

40mil

20mil

SDCK22

10P_0402_50V8K

MSCLK_XDRE#22

@10P_0402_50V8K

1
2
3
4

0307

5

4

+S1_VCC

+S1_VPP

12

C585 0.1U_0402_16V4Z
C584 0.1U_0402_16V4Z
C586 10U_0805_10V4Z
C583 0.01U_0402_16V7K
C587 1U_0603_10V4Z

VCCD0# 22
VCCD1# 22
VPPD0 22
VPPD1 22

R550
@0_0805_5%

C579

R549

@0_0402_5%

C572

1 2

1 2
1 2
1 2

1

2

SDCK

MSCLK_XDRE#

12

1

2

5 IN 1 PWR Control

U49

GND
IN
IN
EN#

TPS2041ADR_SO8

8

OUT

7

OUT

6

OUT

5

OC#

4

+VCC_5IN1

12

R531
100K_0402_5%

3

Chip has internal pull high

43K_0402_5%@

XDCD# XD_CD#

C580

SD-VCC
MS-VCC

SD-CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3

SD-CMD

SD-CD-SW

SD-WP-SW

MS-SCLK

MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3

MS-INS

MS-BS

4IN1-GND
4IN1-GND

0.1U_0402_16V4Z

1

1

C554

C553

2

2

+3VS

R627

1 2
13

100K

2

100K

C589

4 IN 1 CONN

0.1U_0402_16V4Z

1

1

C556

2

2

+3VS

R629

1 2

DTC115EKA_SOT23
Q44

XDCD#22

SDDA3_XDD4
SDDA1_XDD0
SDDA0_XDD7
SDCM_XDALE
SDDA2_XDCL
MSBS_XDD1
MSD1_XDD6
MSD0_XDD2
MSD2_XDD5
MSINS#
MSD3_XDD3
SDWP
SDCD#

1

0.1U_0402_16V4Z

2

C555

0.1U_0402_16V4Z

10K_0402_5%

Close to
CardBus Conn.

1

C337

C343

0.1U_0402_16V4Z

2

1

2

10U_0805_10V4Z

4.7U_0805_10V4Z

SD/ MMC/ MS

+VCC_SM/XD

SDDA1_XDD0
MSBS_XDD1
MSD0_XDD2
MSD3_XDD3
SDDA3_XDD4
MSD2_XDD5
MSD1_XDD6
SDDA0_XDD7

XDWE#

XDWP#22

1U_0603_10V4Z

R538

1 2

0_0402_5%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

XDWP#
SDCM_XDALE
XD_CD#
XDBSY#
MSCLK_XDRE#
XDCE#
SDDA2_XDCL

+VCC_SM/XD

1

C656

+3VS

1 2

+VCC_5IN1 +VCC_SM/XD

1

2

2

0.1U_0402_16V4Z

R537
10K_0402_5%

R633

1 2

0_0402_5%

C657

SDOC# 22

0308

1 2

3

+S1_VCC

C339

+S1_VPP

C341

0.01U_0402_16V7K

1U_0603_10V4Z

XDOC#

XD_MS_PWREN#22

R571

0_0603_5%

1

2

1

2

1U_0603_10V4Z

JP36

34

XD-VCC

SD / MMC / MS(PRO) / XD

26

XD-D0

27

XD-D1

28

XD-D2

29

XD-D3

30

XD-D4

31

XD-D5

32

XD-D6

33

XD-D7

24

XD-WE

25

XD-WP

23

XD-ALE

18

XD-CD

19

XD-R/B

20

XD-RE

21

XD-CE

22

XD-CLE

TAITW_R007-520-L3

+VCC_5IN1

1

C551

2

0.1U_0402_16V4Z

4.7K_0402_5%

0307

2

+3VS

12

R552

1 3

D

2N7002_SOT23

C588

0.1U_0402_16V4Z

14
3

SDCK

15

SDDA0_XDD7

16

SDDA1_XDD0

17

SDDA2_XDCL

11

SDDA3_XDD4

12

SDCM_XDALE

13

SDCD#

2

SDWP

35

MSCLK_XDRE#

4

MSD0_XDD2

8

MSD1_XDD6

9

MSD2_XDD5

7

MSD3_XDD3

5

MSINS#

6

MSBS_XDD1

10
1

36

+3VS

2

MSINS#

2

G

S

Q45

SDDA3_XDD4 22

SDDA1_XDD0 22

SDDA0_XDD7 22

SDCM_XDALE 22

SDDA2_XDCL 22

MSBS_XDD1 22
MSD1_XDD6 22
MSD0_XDD2 22
MSD2_XDD5 22

MSINS# 22

MSD3_XDD3 22

SDWP 22

SDCD# 22

+VCC_5IN1

69
70

5 IN 1 PWR Control

U48

4

FLG

VIN

VOUT

CE1GND

RT9702ACB_SOT23-5

Title

Size Document Number Rev

B

Date: Sheet

1

S1_A[0..25]22

S1_D[0..15]22

CardBus Socket

JP7

GND
GND

SANTA_130609-1_LT

3
5
2

GND
GND

DATA3

CD1#

DATA4

DATA11

DATA5

DATA12

DATA6

DATA13

DATA7

DATA14

CE1#

DATA15

ADD10

CE2#

OE#

VS1#

ADD11

IORD#

ADD9

IOWR#

ADD8
ADD17
ADD13
ADD18
ADD14
ADD19

WE#
ADD20
READY
ADD21

VCC
VCC
VPP

VPP
ADD16
ADD22
ADD15
ADD23
ADD12
ADD24

ADD7

ADD25

ADD6

VS2#

ADD5

RESET

ADD4

WAIT#

ADD3

INPACK#

ADD2
REG#
ADD1
BVD2
ADD0

BVD1
DATA0
DATA8
DATA1
DATA9
DATA2

DATA10

WP

CD2#

GND
GND

+VCC_SM/XD

1
35
2
36
3
37
4
38
5
39
6
40
7
41
8
42
9
43
10
44
11
45
12
46
13
47
14
48
15
49
16
50
17
51
18
52
19
53
20
54
21
55
22
56
23
57
24
58
25
59
26
60
27
61
28
62
29
63
30
64
31
65
32
66
33
67
34
68

1 2

0_0402_5%

12

R630
100K_0402_5%

R628

S1_D3
S1_CD1#
S1_D4
S1_D11
S1_D5
S1_D12
S1_D6
S1_D13
S1_D7
S1_D14
S1_CE1#
S1_D15
S1_A10
S1_CE2#
S1_OE#
S1_VS1
S1_A11
S1_IORD#
S1_A9
S1_IOWR#
S1_A8
S1_A17
S1_A13
S1_A18
S1_A14
S1_A19
S1_WE#
S1_A20
S1_RDY#
S1_A21

S1_A16
S1_A22
S1_A15
S1_A23
S1_A12
S1_A24
S1_A7
S1_A25
S1_A6
S1_VS2
S1_A5
S1_RST
S1_A4
S1_WAIT#
S1_A3
S1_INPACK#
S1_A2
S1_REG#
S1_A1
S1_BVD2
S1_A0
S1_BVD1
S1_D0
S1_D8
S1_D1
S1_D9
S1_D2
S1_D10
S1_WP
S1_CD2#

+3VS

1 2

1

2

Compal Electronic s, Inc.

PCMCIA Socket

EFL50 LA-2761

1

S1_A[0..25]
S1_D[0..15]

S1_CD1# 22

S1_CE1# 22

S1_CE2# 22
S1_OE# 22
S1_VS1 22

S1_IORD# 22
S1_IOWR# 22

S1_WE# 22
S1_RDY# 22

+S1_VCC
+S1_VCC
+S1_VPP
+S1_VPP

S1_VS2 22
S1_RST 22
S1_WAIT# 22
S1_INPACK# 22
S1_REG# 22
S1_BVD2 22
S1_BVD1 22

S1_WP 22
S1_CD2# 22

R626
10K_0402_5%

XDOC#

C666

0.1U_0402_16V4Z

@

23 51Wednesday, April 20, 2005

of

XDOC# 22

0.2

5

4

3

2

1

+3VS

1394_CYCLEIN
1394_CYCLEOUT

+3VS

D D

84
82
81
80
79
77
76
74
71
70
69
67
66
65
63
61
46
45
43
42
41
40
38
37
32
31
29
28
26
25
24
22
34
47
60
73
16
18
19
36
49
50
52
53
54
56
13
21
57
58
12
85

14
89

90

R540
10_0402_5%

C565
10P_0402_50V8K@

U37

TSB43AB21_PQFP128

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_C/BE3
PCI_C/BE2
PCI_C/BE1
PCI_C/BE0
PCI_CLK
PCI_GNT
PCI_REQ
PCI_IDSEL
PCI_FRAME
PCI_IRDY
PCI_TRDY
PCI_DEVSEL
PCI_STOP
PCI_PERR
PCI_INTA/CINT
PCI_PME/CSTSCHG
PCI_SERR
PCI_PAR
PCI_CLKRUN
PCI_RST

G_RST
GPIO3

GPIO2

PLLGND18REG_EN9AGND

78

VDDP20VDDP35VDDP48VDDP62VDDP

TSB43AB21
/(TSB43AB22)

PCI BUS INTERFACE

AGND

AGND

AGND

AGND

AGND

AGND

DGND17DGND23REG1830DGND33DGND44DGND55DGND64DGND68DGND75DGND83REG1893DGND

109

110

111

117

126

127

128

1

2

4

87

CYCLEIN

BIAS CURRENT

OSCILLATOR

FILTER

EEPROM 2 WIRE BUS

POWER CLASS

PHY PORT 1

C561

0.1U_0402_16V4Z

PCI_AD[0..31]16,22,25,27,28

C C

IDSEL:PCI_AD16

PCI_AD16

1 2

R533

B B

A A

1394_IDSEL

100_0402_5%

PCI_C/BE#316,22,25,27,28
PCI_C/BE#216,22,25,27,28
PCI_C/BE#116,22,25,27,28
PCI_C/BE#016,22,25,27,28

CLK_PCI_139413

PCI_GNT#016
PCI_REQ#016

PCI_FRAME#16,22,25,27,28

PCI_IRDY#16,22,25,27,28
PCI_TRDY#16,22,25,27,28

PCI_DEVSEL#16,22,25,27,28

PCI_STOP#16,22,25,27,28
PCI_PERR#16,22,25,27,28

PCI_PIRQE#16

1394_PME#33
PCI_SERR#16,22,25,27,28

PM_CLKRUN#18,25,27,28,32,33

PCI_RST#16,22,25,27,28,32,33

RP24

45
36
27
18

220_1206_8P4R_5%

5

1394_GPIO3
1394_GPIO2
1394_SCL
1394_SDA

PCI_AD[0..31]

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8

PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0

CLK_PCI_1394

PCI_GNT#0
PCI_REQ#0
1394_IDSEL

PCI_FRAME#

PCI_IRDY#
PCI_TRDY#

PCI_DEVSEL#

PCI_STOP#
PCI_PERR#
PCI_PIRQE#
1394_PME#
PCI_SERR#

PCI_PAR16,22,25,27,28

PCI_PAR
PM_CLKRUN#
PCI_RST#

1394_GPIO3

1394_GPIO2

CLK_PCI_1394

12

@

1

2

1394_CNA
1394_TEST17
1394_TEST16

86

11

96

15

DVDD

CNA

TEST1710TEST16

CYCLEOUT/CARDBUS

NC/(TPBIAS1)

NC/(TPA1+)
NC/(TPB1+)

103

1

C577

2

0.1U_0402_16V4Z

27

DVDD

39

DVDD

51

DVDD

59

DVDD

72

DVDD

88

DVDD

100

DVDD

7

PLLVDD

1

AVDD

2

AVDD

107

AVDD

108

AVDD

120

AVDD

106

CPS

125
124
123

NC/(TPA1-)

122
121

NC/(TPB1-)

118

R0

119

R1

6

X0

5

X1

3

FILTER0

4

FILTER1

92

SDA

91

SCL

99

PC0

98

PC1

97

PC2

116

TPBIAS0

115

TPA0+

114

TPA0-

113

TPB0 +

112

TPB0 -

94

TEST9

95

TEST8

101

TEST3

102

TEST2

104

TEST1

105

TEST0

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R548
R546
R554
R542
R543 4.7K_0402_5%

1394_CPS

1394_BIAS0

6.34K_0402_1%

1394_BIAS1

1394_X0

1394_X1

C578

1 2

0.1U_0402_16V4Z

1394_SDA
1394_SCL

PC1
PC2

3

1 2

4.7K_0402_5%

1 2

10K_0402_5%

1 2

4.7K_0402_5%

1 2

4.7K_0402_5%

12

+3VS

+1394_PLLVDD

+3VS

1 2

R558 1K_0402_5%

1 2

R555 1K_0402_5%

1 2

R556

1 2

TPBIAS0
TPA0+
TPA0­TPB0+
TPB0-

1 2

1 2

@

0.01U_0402_16V7K

1

1

C569

C568

2

@
1394<4>@

C575 22P_0402_50V8J

X2

24.576MHz_16P_3XG-24576-43E1
C576 22P_0402_50V8J

PC1

PC2

4.7U_0805_10V4Z

2

1 2

1 2

12

R217

56.2_0402_1%

12

R220

56.2_0402_1%

1

C271
220P_0402_50V7K

2

R6140_0402_5%

R615 4.7K_0402_5%

R617 4.7K_0402_5%

R6160_0402_5%

2005/01/24

+3VS

1

2

+3VS

1

2

L34
BLM21A601SPT_0805

1 2

+3VS

12

12

12

12

@

12

C582

0.1U_0402_16V4Z

C563
1000P_0402_50V7K

+3VS

R218

56.2_0402_1%

R225

56.2_0402_1%

R221

5.11K_0402_1%

+3VS

2

1

C581

0.1U_0402_16V4Z

2

1

C559
1000P_0402_50V7K

2

1

C266

0.33U_0603_16V4Z

2

1

C564

0.1U_0402_16V4Z

2

1

C558
1000P_0402_50V7K

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

1

C567

0.1U_0402_16V4Z

2

1

C557
1000P_0402_50V7K

2

4
3

GND15GND26GND37GND4

2
1

8

JP30

4
3
2
1

SUYIN_020204FR004S506ZL

1394<4>@

TI TSB43AB21A 1394A CONTROLLER

EFL50 LA-2761

24 51Wednesday, April 20, 2005

1

0.2

5

EN_WOL# = Low,
System can wake on LAN
( keep Low when Power On)

EN_WOL#33

VGS(th) = -0.45V

D D

C C

B B

A A

IDmax = 2.3A

PCI_AD[0..31]16,22,24,27,28

CLK_PCI_LAN

PCI_AD17 LAN_IDSEL

+3V_LAN

ONBD_LAN_PME#33

LAN_X1 LAN_X2

1

C54
27P_0402_50V8J

2

EN_WOL#

+3VS for BCM5788
+3V_LAN for BCM4401

12

R103

@

10_0402_5%

1

C95
18P_0402_50V8K@

2

PCI_C/BE#316,22,24,27,28
PCI_C/BE#216,22,24,27,28
PCI_C/BE#116,22,24,27,28
PCI_C/BE#016,22,24,27,28

100_0402_5%
R96

1 2

PCI_FRAME#16,22,24,27,28

PCI_IRDY#16,22,24,27,28

PCI_TRDY#16,22,24,27,28

PCI_DEVSEL#16,22,24,27,28

PCI_STOP#16,22,24,27,28
PCI_PERR#16,22,24,27,28
PCI_SERR#16,22,24,27,28

PCI_PAR16,22,24,27,28

CLK_PCI_LAN13

PCI_PIRQF#16

PCI_RST#16,22,24,27,28,32,33

PCI_GNT#316

PCI_REQ#316

1 2

R396 1K_0402_5%

Y1

12

25MHZ_20P

+3VALW

G

2

SI2301DS_SOT23

@

+3V_LAN

PCI_AD[0..31]

PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0

PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_DEVSEL#
PCI_STOP#
PCI_PERR#
PCI_SERR#
PCI_PAR
CLK_PCI_LAN

PCI_PIRQF#
PCI_RST#
PCI_GNT#3
PCI_REQ#3

LAN_AUXPWR

ONBD_LAN_PME#

1

C47

27P_0402_50V8J

2

5

S

D

Q11

1 3

+3V_LAN

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

PCI_C/BE#3

12

R129
0_1206_5%

+3VS

U8A

B8

AD31

A8

AD30

C7

AD29

C6

AD28

B6

AD27

B5

AD26

A5

AD25

B4

AD24

B2

AD23

B1

AD22

C1

AD21

D3

AD20

D2

AD19

D1

AD18

E3

AD17

K1

AD16

L2

AD15

L1

AD14

M3

AD13

M2

AD12

M1

AD11

N2

AD10

N3

AD9

P3

AD8

N4

AD7

P4

AD6

M5

AD5

N5

AD4

P5

AD3

P6

AD2

M7

AD1

N7

AD0

C4

CBE3

F3

CBE2

L3

CBE1

M4

CBE0

A4

IDSEL

F2

FRAME

F1

IRDY

G3

TRDY

H3

DEVSEL

H1

STOP

J2

PERR

A2

SERR

J1

PAR

A3

PCI_CLK

H2

INTA

C2

PCI_RST

J3

GNT

C3

REQ

J12

VAUXPRSNT

F4

M66EN/(NC_F4)

A6

PME

BCM5788M_FBGA196

1 2

L19 0_0603_5%

4401@

1 2

L20 0_0603_5%5788@

BCM5788M

/(BCM4401)

10U_0805_10V4Z

4

+3V_LAN

1

C114

2

10U_0805_10V4Z

+3V_LOM_PCI

0.1U_0402_16V4Z

1

C76

2

10U_0805_10V4Z

REGSUP12/(NC_B9)

REGCTL12/(NC_B10)

REGSEN12/(REG18OUT)
REGSUP25/(REGSUP18)

REGCTL25/(NC_C11)

REGSEN25/(REGSUP18)

EEDATA/(SPROM_CS)

EECLK/(SPROM_CLK)

LINKLED/(LINKLED10)

SPD100LED/(LINKLED100)

SPD1000LED/(COL_LED)

TRAFFICLED/(ACT_LED)

PLLVDD2/(PLLVDD)

NC_E10/(EEDATA_PXE)

NC_E11/(EECLK_PXE)

4

80mils

0.1U_0402_16V4Z

1

C119

2

20mils

1

C118

2

0.1U_0402_16V4Z

TRD3+/(NC_E13)

TRD3-/(NC_E14)

TRD2+/(NC_D13)

TRD2-/(NC_D14)

TRD1+/(RDP)

TRD1-/(RDN)
TRD0+/(TDP)
TRD0-/(TDN)

VESD1
VESD2
VESD3

GPIO0/(NC_H12)
GPIO1/(NC_K13)
GPIO2/(NC_J13)

NC_P7

TCK

TDO
TMS

TRST

XTALVDD

XTALO

XTALI

NC_G11

NC_H11

BIASVDD

RDAC

NC_A10

NC_C9

1

1

C111

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C84

2

2

E13
E14
D13
D14
C13
C14
B13
B14

B9
B10
A9

B11
C11
C10

P1
G2
A1

P10
M10

H12
K13
J13

G13
H13
G12
G14

20mils

H14
P7

C12
D12

TDI

B12
A12
D11

J14
N10
N11

G11
E10
E11
H11

10mils

A14
D10

10mils

A10
C9

0.1U_0402_16V4Z

1

C99

2

0.1U_0402_16V4Z

1

C88

C116

2

0.1U_0402_16V4Z

LAN_MDI3+
LAN_MDI3­LAN_MDI2+
LAN_MDI2­LAN_MDI1+
LAN_MDI1­LAN_MDI0+
LAN_MDI0-

LAN_CTRL_1.2V

LAN_CTRL_2.5V

LAN_EEDA
LAN_EECLK

LAN_EEWP

R394 10K_0402_5%

1

C52

2

0.1U_0402_16V4Z

1

2

LAN_MIDI3+ 26
LAN_MIDI3- 26
LAN_MIDI2+ 26
LAN_MIDI2- 26
LAN_MIDI1+ 26
LAN_MIDI1- 26
LAN_MIDI0+ 26
LAN_MIDI0- 26

+2.5V_LAN
+1.2V_LAN
+3V_LAN
+2.5V_LAN
+3V_LAN

1 2

0.1U_0402_16V4Z

1

C415

C417

2

1

C117

C79

2

0.1U_0402_16V4Z

(Output 3.3V for BCM4401)
(Output 1.8V for BCM4401)

+3V_LAN

unpop R554 when use BCM4401

LAN_LINK#
LAN_LINK#1G

LAN_ACTIVITY#

+1.2V_LAN_PLLVDD

LAN_TRST#

LAN_X1
LAN_X2_R

+LAN_BIASVDD
LAN_RDAC

LAN_A10
LAN_C9

R397 0_0402_5%

1 2

LAN_ACTIVITY# 26

0.1U_0402_16V4Z
C35

1 2

R398 4.7K_0402_5%

+2.5V_LAN

1 2

R82 200_0402_1%

1.24K for BCM5788

1.27K for BCM4401

1 2

R400 1.24K_0402_1%

1 2

R84 10K_0402_5%

1 2

R402 10K_0402_5%@

1

1

C31

2

2

LAN_X2

C36 1000P_0402_50V7K

1 2

@

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+1.2V_LAN_PLLVDD

1 2

L7
0_0603_5%

4.7U_0805_10V4Z

1 2

L9
0_0603_5%

3

LAN_CTRL_2.5V LAN_CTRL_1.2V

+3V_LAN

3

+1.2V_LAN

+3V_LOM_PCI

LAN_LINK# 26

+1.2V_LAN

+2.5V_LAN

+3V_LAN

PM_CLKRUN#18,24,27,28,32,33

+2.5V_LAN

+3V_LAN

3

unpop when use BCM4401

1

Q5

5788@

BCP69_SOT223

10U_0805_10V4Z

2
4

10U_0805_10V4Z

+1.2V_LAN

0.1U_0402_16V4Z

PM_CLKRUN#

1

C66

2

1

C419

2

0.1U_0402_16V4Z

1

C411

2

0.1U_0402_16V4Z

60mils

0.1U_0402_16V4Z

1

C439

2

U8B

E12

VDDC_E12

H5

VDDC_H5

H6

VDDC_H6

H7

VDDC_H7

H8

VDDC_H8

J5

VDDC_J5

J6

VDDC_J6

J7

VDDC_J7

J8

VDDC_J8

J9

VDDC_J9

J10

VDDC_J10

K5

VDDC_K5

K6

VDDC_K6

K7

VDDC_K7

K8

VDDC_K8

K9

VDDC_K9

K10

VDDC_K10

L5

VDDC_L5

L10

VDDC_L10

M14

VDDC_M14

N14

VDDC_N14

P8

VDDC_P8

P12

VDDC_P12

P13

VDDC_P13

P14

VDDC_P14

A7

VDDIO-PCI_A7

B3

VDDIO-PCI_B3

C5

VDDIO-PCI_C5

E1

VDDIO-PCI_E1

E4

VDDIO-PCI_E4

G1

VDDIO-PCI_G1

K3

VDDIO-PCI_K3

L4

VDDIO-PCI_L4

N6

VDDIO-PCI_N6

P2

VDDIO-PCI_P2

K14

VDDP_K14/(NC_K14)

L13

VDDP_L13/(NC_L13)

P11

VDDP_P11/(NC_P11)

A11

VDDIO_A11

F11

VDDIO_F11

K12

VDDIO_K12

L12

VDDIO_L12

C8

NC_C8

H4

CLKRUN

H10

NC_H10

J4

NC_J4

K4

NC_K4

J11

NC_J11/(GPIO_1)

K11

NC_K11/(GPIO_0)

L7

NC_L7

L8

NC_L8

BCM5788M_FBGA196

AT93C46 for BCM4401

LAN_EEDA
LAN_EECLK
LAN_EEDI
LAN_EEDO

U10

1

CS

2

SK

3

DI

4

DO

AT93C46-10SI-2.7_SO8

4401@

2

60mils

0.1U_0402_16V4Z

1

1

C408

2

2

1

1

C429

2

2

0.1U_0402_16V4Z

BCM5788M

/(BCM4401)

AVDDL_F12/(AVDD_F12)
AVDDL_F13/(AVDD_F13)

LOW_POWER/(TESTMODE)

8

VCC

7

NC

6

NC

5

GND

0.1U_0402_16V4Z

4401@

2

Q8

1

+2.5V_LAN +1.2V_LAN

1

C409

C410

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C436

C441

2

0.1U_0402_16V4Z

VSS_B7
VSS_D4
VSS_D5
VSS_D6
VSS_D7
VSS_D8

VSS_D9/(NC_D9)

VSS_E2
VSS_E5
VSS_E6
VSS_E7
VSS_E8
VSS_E9
VSS_F5
VSS_F6
VSS_F7
VSS_F8
VSS_F9

VSS_F10

VSS_G4
VSS_G5
VSS_G6
VSS_G7
VSS_G8
VSS_G9

VSS_G10

VSS_H9
VSS_K2

VSS_L6
VSS_L9

VSS_M6

VSS_M12

VSS_M13/(NC_M13)

VSS_N1
VSS_N12
VSS_N13

AVDD_F14/(NC_F14)

AVDD_A13/(NC_A13)

NC_L11/(VSS_L11)
NC_L14/(VSS_L14)

NC_M8

NC_M9/(VREF)

NC_N8/(EXT_POR)

NC_N9/(DOUT)

NC_P9/(DIN)

+3V_LAN

1

C89

2

BCP69_SOT223

2

3

4

0.1U_0402_16V4Z

1

1

C426

2

2

B7
D4
D5
D6
D7
D8
D9
E2
E5
E6
E7
E8
E9
F5
F6
F7
F8
F9
F10
G4
G5
G6
G7
G8
G9
G10
H9
K2
L6
L9
M6
M12
M13
N1
N12
N13

+1.2V_LAN_AVDD

F12
F13

+2.5V_LAN_AVDD

F14
A13

C38

0.1U_0402_16V4Z

L11
L14
M8
M9

LAN_TESTMODE

M11
N8

LAN_EEDI

N9

LAN_EEDO

P9

5788@

4.7K_0402_5%

LAN_EEWP
LAN_EECLK
LAN_EEDA

24C256 for BCM5788

Title

Size Document Number Rev

B

Date: Sheet

1

5788@

0.1U_0402_16V4Z

1

1

C406

C407

2

2

10U_0805_10V4Z

1

C412

C414

2

0.1U_0402_16V4Z

5788 4401
L18
L19
Q17
Q18
R318

Pop

Pop

Pop

1.24K 1.27K

U18

C424

U19

R319
R320

Pop

Pop

Pop

C423 Pop

1

2

R93

1

2

1 2

1 2

L11
0_0603_5%

1 2

L10
0_0603_5%

C37

0.1U_0402_16V4Z

1 2

R395 10K_0402_5%

+3V_LAN

R89

4.7K_0402_5%

1 2

Unpop when use BCM4401

5788@

8
7
6
5

+1.2V_LAN
+2.5V_LAN

C83

1 2

0.1U_0402_16V4Z

U9

VCC
WP
SCL
SDA

AT24C256_SO8~D

5788@

Compal Electronic s, Inc.

LAN BCM5788M

EFL50 LA-2761

1

GND

A0
A1
NC

Pop

Pop
Pop

5788@

25 51Wednesday, April 20, 2005

20mils
20mils

1
2
3
4

0.2

of

5

LAN_MIDI3­LAN_MIDI3+

LAN_MIDI2-

D D

C C

LAN_MIDI2+

LAN_MIDI1­LAN_MIDI1+

LAN_MIDI0­LAN_MIDI0+

LAN_LINK#
LAN_ACTIVITY#

RP19

1 4
2 3

0_0404_4P2R_5%ND@

RP20

1 4
2 3

0_0404_4P2R_5%ND@

RP21

1 4
2 3

0_0404_4P2R_5%ND@

RP22

1 4
2 3

0_0404_4P2R_5%ND@

RP18

1 4
2 3

0_0404_4P2R_5%ND@

L_LAN_MDI3­L_LAN_MDI3+

L_LAN_MDI2­L_LAN_MDI2+

L_LAN_MDI1­L_LAN_MDI1+

L_LAN_MDI0­L_LAN_MDI0+

L_LAN_LINK#
L_LAN_ACTIVITY#

unpop when use BCM4401(10/100)

+2.5V_LAN

L_LAN_MDI0+
L_LAN_MDI0-

L_LAN_MDI1+
L_LAN_MDI1-

L_LAN_MDI2+
L_LAN_MDI2-

B B

L_LAN_MDI3+
L_LAN_MDI3-

0.01U_0402_16V7K

1

1

C124

C135

2

2

0.01U_0402_16V7K

0.01U_0402_16V7K

1

C110

2

4

R73

49.9_0402_1%

LAN_MIDI0+
LAN_MIDI0­LAN_MIDI1+
LAN_MIDI1-

LAN_MIDI2+
LAN_MIDI2­LAN_MIDI3+
LAN_MIDI3-

49.9_0402_1%

5788@

5788@

1

C46

0.1U_0402_16V4Z

2

12

12

R76

49.9_0402_1%

49.9_0402_1%

12

12

R70

R72

49.9_0402_1%

5788@

C39

1

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

R79

R68

5788@

49.9_0402_1%

0.1U_0402_16V4Z

5788@

C51

12

12

C34

1

2

12

R83

49.9_0402_1%

12

R64

49.9_0402_1%

5788@

1

2

3

LAN BCM5788M/BCM4401KFB

24ST0023-3(SP050004200) for BCM4401(10/100)
24HST1041A-3(SP050002110) for BCM5788M(GbE)

T1

1

TCT1

2

TD1+

3

TD1-

4

TCT2

5

TD2+
TD2-6MX2-

7

TCT3

8

TD3+

9

TD3-

10

TCT4

11

TD4+

12

TD4-

24HST1041A-3

1

C86

0.01U_0402_16V7K

2

MCT1

MX1+

MX1-

MCT2

MX2+

MCT3

MX3+

MX3-

MCT4

MX4+

MX4-

24
23
22

21
20
19

18
17
16

15
14
13

R95

75_0402_1%

12

12

R110
75_0402_1%

RJ45_MDI0+
RJ45_MDI0-

RJ45_MDI1+
RJ45_MDI1-

RJ45_MDI2+
RJ45_MDI2-

RJ45_MDI3+
RJ45_MDI3-

LAN_MIDI0+25
LAN_MIDI0-25

LAN_MIDI1+25
LAN_MIDI1-25

LAN_MIDI2+25
LAN_MIDI2-25

LAN_MIDI3+25
LAN_MIDI3-25

DOCKIN#14,21,33,38

LAN_ACTIVITY#25

LAN_LINK#25

MOLEX_53398-0290

JP23

+3V_LAN

+3V_LAN

1
2

LAN_MIDI0+
LAN_MIDI0-

LAN_MIDI1+
LAN_MIDI1-

LAN_MIDI2+
LAN_MIDI2-

LAN_MIDI3+
LAN_MIDI3-

DOCKIN#

LAN_ACTIVITY#
LAN_LINK#

1 2

2

2
3

7
8

11
12

14
15

17

19
20
54

5

300_0603_5%

1 2

300_0603_5%

MOD_RING

+3V_LAN

56

U6

A0
A1

A2
A3

A4
A5

A6
A7

SEL

LED0
LED1
LED2

NC

GND01GND16GND29GND313GND416GND521GND624GND728GND833GND939GND1044GND1149GND1253GND13

R90

R133

L22 0_0603_5%
L23 0_0603_5%

VDD04VDD110VDD218VDD327VDD438VDD550VDD6

RJ45_MDI1­RJ45_MDI1+
RJ45_MDI0­RJ45_MDI0+
RJ45_MDI3­RJ45_MDI3+
RJ45_MDI2­RJ45_MDI2+

LAN_LED_LINK

1 2
1 2

48

0B1

47

1B1

43

2B1

42

3B1

37

4B1

36

5B1

32

6B1

31

7B1

22

0LED1

23

1LED1

52

2LED1

46

0B2

45

1B2

41

2B2

40

3B2

35

4B2

34

5B2

30

6B2

29

7B2

25

0LED2

26

1LED2

51

2LED2

PI3L500E_TQFN56~D

55

WD@

LAN_LED_ACTIVE
L_LAN_ACTIVITY#

L_LAN_LINK#

RJ11_RING
RJ11_TIPMOD_TIP

D_LAN_MDI0+
D_LAN_MDI0-

D_LAN_MDI1+
D_LAN_MDI1-

D_LAN_MDI2+
D_LAN_MDI2-

D_LAN_MDI3+
D_LAN_MDI3-

D_LAN_ACTIVITY#
D_LAN_LINK#

L_LAN_MDI0+
L_LAN_MDI0-

L_LAN_MDI1+
L_LAN_MDI1-

L_LAN_MDI2+
L_LAN_MDI2-

L_LAN_MDI3+
L_LAN_MDI3-

L_LAN_ACTIVITY#
L_LAN_LINK#

JP19

1

Yellow LED+

2

Yellow LED-

5

RX1-

8

RX1+

9

TX1-

10

TX1+

3

RX2-

4

RX2+

6

TX2-

7

TX2+

12

Green LED-

11

Green LED+

13

RJ11_1

14

RJ11_2

1

D_LAN_MDI0+ 38
D_LAN_MDI0- 38

D_LAN_MDI1+ 38
D_LAN_MDI1- 38

D_LAN_MDI2+ 38
D_LAN_MDI2- 38

D_LAN_MDI3+ 38
D_LAN_MDI3- 38

D_LAN_ACTIVITY# 38
D_LAN_LINK# 38

RJ45 / LED

RJ11

TYCO_1770365-1

SGND1
SGND2

15
16

RJ45_MDI3+
RJ45_MDI3-

RJ45_MDI2+
RJ45_MDI2-

A A

5

reseved for BCM4401(10/100)

R94

1 2

R91

1 2

R106 0_0402_5%

1 2

R102

1 2

4

4401@

0_0402_5%
0_0402_5%

4401@
4401@

4401@

0_0402_5%

R126

75_0402_1%

12

12

R138
75_0402_1%

RJ45_GND

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

RJ45_GND LANGND

2

1 2

C64
1000P_1206_2KV7K

Title

Size Document Number Rev

B

Date: Sheet

0.1U_0402_16V4Z

Compal Electronic s, Inc.

LAN Magnetic & RJ45/RJ11

EFL50 LA-2761

1

2

C62

1

1

C67

4.7U_0805_10V4Z

2

26 51Wednesday, April 20, 2005

0.2

of

A

1 1

B

PCI_AD[0..31]

C

PCI_AD[0..31] 16,22,24,25,28

D

E

MINI_PCI SOCKET

TIP

LAN RESERVED

D10

RB751V_SOD3232S@

WL_ON
PCI_PIRQH#

CLK_PCI_MINI1

PCI_REQ#1 PCI_GNT#1
PCI_AD31

PCI_AD29
PCI_AD27

PCI_AD25
WLAN_BT_DATA
PCI_C/BE#3
PCI_AD23

PCI_AD21
PCI_AD19

PCI_AD17
PCI_C/BE#2
PCI_IRDY#

PCI_SERR#
PCI_PERR#

PCI_C/BE#1
PCI_AD14

PCI_AD12
PCI_AD10

PCI_AD8
PCI_AD7

PCI_AD5
PCI_AD3
PCI_AD1

W=30mils W=20mils

+5VS_MINIPCI1

0603

PCI_PIRQH#16,28

W= 40mils

PCI_REQ#116,28

WLAN_BT_DATA28,34

PCI_C/BE#316,22,24,25,28

WL_ON28,33

+3VS_MINIPCI1

+3VS

2 2

CLK_PCI_MINI1

12

R544

33_0402_5%@

L29

1 2

0_0603_5%

2S@

CLK_PCI_MINI113

1

C566

10P_0402_50V8J@

2

3 3

PM_CLKRUN#18,24,25,28,32,33

+5VS

PCI_C/BE#216,22,24,25,28

PCI_IRDY#16,22,24,25,28

PCI_SERR#16,22,24,25,28

PCI_PERR#16,22,24,25,28
PCI_C/BE#116,22,24,25,28

+5VS_MINIPCI1

1 2

L30 0_0603_5%2S@

21

W=30mils

JP35

1

1

3

3

5

5

7

7

9

9
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
535354
555556
575758
595960
616162
636364
656566
676768
696970
717172
737374
757576
777778
797980
818182
838384
858586
878788
898990
919192
939394
959596
979798
9999100

101

101

103

103

105

105

107

107

109

109

111

111

113

113

115

115

117

117

119

119

121

121

123

123

QTC_C102A-040B31-4

2S@

RING

2

2

4

4

6

6

8

8

10

102
104
106
108
110
112
114
116
118
120
122
124

LAN RESERVED

10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

W=30mils

PCI_PIRQG#

W=40mils

PCI_RST#

WLANPME#
WLAN_BT_CLK
PCI_AD30

PCI_AD28
PCI_AD26
PCI_AD24
MINI_IDSEL1

PCI_AD22
PCI_AD20

PCI_AD18
PCI_AD16

PCI_FRAME#
PCI_TRDY#PM_CLKRUN#
PCI_STOP#

PCI_DEVSEL#
PCI_AD15

PCI_AD13
PCI_AD11

PCI_AD9
PCI_C/BE#0

PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

2

C378

0.1U_0402_16V4Z2S@

1

PCI_PIRQG# 16,28

PCI_RST# 16,22, 24,25,28,32,33

WLAN_BT_CLK 28,34

1 2

R281

100_0402_5%

2S@

PCI_PAR 16,22,24,25,28

PCI_FRAME# 16, 2 2,24,25,28
PCI_T R D Y # 16,22,24,25,28
PCI_STOP# 16,22,24,25,28

PCI_DEVSEL# 16, 22 ,24,25,28

PCI_C/BE#0 16,22,24,25,28

+3V

+5VS_MINIPCI1

+3V

PCI_GNT#1 16,28
WLANPME# 28,33

PCI_AD18

W= 40mils

IDSEL : PCI_AD18

1

C381
1000P_0402_50V7K

2

2S@

2

C355

0.1U_0402_16V4Z

1

2S@

+3VS_MINIPCI1

L26

1 2

0_0603_5%

2S@

+3VS

2

C327

0.1U_0402_16V4Z

1

2S@

2

C352

0.1U_0402_16V4Z

1

2S@

2

1

2

C345

0.1U_0402_16V4Z

1

2S@

C364

0.1U_0402_16V4Z

2S@

2

1

1

2

C334

0.1U_0402_16V4Z

2S@

+5VS_MINIPCI1

C315
10U_1206_16V4Z

2S@

2

C330

0.1U_0402_16V4Z

1

2S@

+3VS_MINIPCI1

1

C331
10U_1206_16V4Z

2

2S@

4 4

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Mini PCI Slot

EFL50 LA-2761

27 51Wednesday, April 20, 2005

E

0.2

of

A

1 1

B

PCI_AD[0..31]

C

PCI_AD[0..31] 16,22,24,25,27

D

E

MINI_PCI SOCKET

TIP

LAN RESERVED

D4

RB751V_SOD3231S@

21

PCI_PIRQH#

W=30mils

W=30mils W=20mils

PCI_PIRQH#16,27

PCI_REQ#116,27

PCI_C/BE#316,22,24,25,27

PCI_IRDY#16,22,24,25,27

+5VS_MINIPCI2

1 2

L6 0_0603_5%1S@

WL_ON27,33

CLK_PCI_MINI2

PCI_AD31
PCI_AD29

PCI_AD27
PCI_AD25

PCI_AD23
PCI_AD21

PCI_AD19
PCI_AD17

PCI_AD14
PCI_AD12

PCI_AD10
PCI_AD8

PCI_AD7
PCI_AD5
PCI_AD3
PCI_AD1

+5VS_MINIPCI2

0603

+3VS_MINIPCI2

+3VS

2 2

CLK_PCI_MINI2

12

R390

33_0402_5%@

L12

1 2

0_0603_5%

1S@

W= 40mils

CLK_PCI_MINI213

WLAN_BT_DATA27,34

1

C403

10P_0402_50V8J@

2

3 3

PM_CLKRUN#18,24,25,27,32,33

+5VS

PCI_C/BE#216,22,24,25,27

PCI_SERR#16,22,24,25,27

PCI_PERR#16,22,24,25,27
PCI_C/BE#116,22,24,25,27

JP18

1

1

3

3

5

5

7

7

9

9
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
535354
555556
575758
595960
616162
636364
656566
676768
696970
717172
737374
757576
777778
797980
818182
838384
858586
878788
898990
919192
939394
959596
979798
9999100

101

101

103

103

105

105

107

107

109

109

111

111

113

113

115

115

117

117

119

119

121

121

123

123

QTC_C102A-040B31-4

1S@

RING

2

2

4

4

6

6

8

8

10

102
104
106
108
110
112
114
116
118
120
122
124

LAN RESERVED

10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

W=30mils

PCI_PIRQG#

W=40mils

PCI_RST#

PCI_AD30
PCI_AD28

PCI_AD26
PCI_AD24
MINI_IDSEL2

PCI_AD22
PCI_AD20

PCI_AD18
PCI_AD16

PCI_AD15
PCI_AD13
PCI_AD11

PCI_AD9

PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

2

C26

0.1U_0402_16V4Z

1

1S@

PCI_PIRQG# 16,27

PCI_RST# 16,22, 24,25,27,32,33
PCI_GNT#1 16,27
WLANPME# 27,33

WLAN_BT_CLK 27,34

1 2

R81

100_0402_5%

1S@

PCI_PAR 16,22,24,25,27

PCI_FRAME# 16, 2 2,24,25,27
PCI_T R D Y # 16,22,24,25,27
PCI_STOP# 16,22,24,25,27

PCI_DEVSEL# 16, 22 ,24,25,27

PCI_C/BE#0 16,22,24,25,27

+3V

+5VS_MINIPCI2

+3V

PCI_AD18

W= 40mils

IDSEL : PCI_AD18

1

C137
1000P_0402_50V7K

2

1S@

2

C24

0.1U_0402_16V4Z

1

1S@

+3VS_MINIPCI2

L18

1 2

0_0603_5%

1S@

+3VS

2

C164

0.1U_0402_16V4Z

1

1S@

2

C32

0.1U_0402_16V4Z

1

1S@

2

1

2

C125

0.1U_0402_16V4Z

1

1S@

C23

0.1U_0402_16V4Z

1S@

2

1

1

2

C127

0.1U_0402_16V4Z

1S@

+5VS_MINIPCI2

C156
10U_1206_16V4Z

1S@

2

C45

0.1U_0402_16V4Z

1

1S@

+3VS_MINIPCI2

1

C69
10U_1206_16V4Z

2

1S@

4 4

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Mini PCI Slot

EFL50 LA2761

28 51Wednesday, April 20, 2005

E

0.2

of

A

+3V

C560

1 2

U34A

14

SN74LVC14APWLE_TSSOP14

P

I

+3V

I

+3V

I

R597

12

2

O

G

7

14

P

4

O

G

7

14

P

6

O

G

7

R320 20K_0402_5%
R318 6.8K_0402_5%
R328 6.8K_0402_5%
R324 20K_0402_5%

20K_0402_5%

R596
0_0402_5%

BEEP#33

1 1

PCM_SPK#22

SN74LVC14APWLE_TSSOP14

SB_SPKR18

SN74LVC14APWLE_TSSOP14

2 2

3 3

+AUD_VREF

12

R332

2.2K_0402_5%

@

4 4

CD_AGND20

1

3

U34B

5

U34C

INT_CD_L20

INT_CD_R20

MIC

A

0.1U_0402_16V4Z

C550

1U_0402_6.3V4Z

1000P_0402_50V7K

1U_0402_6.3V4Z

ICH_AC_RST#17,34
ICH_AC_SYNC17,34
ICH_AC_SDOUT17,34

CD_GNACD_AGND

12

12

R598

6.8K_0402_5%

B

C549

C552

B

12

+VDDA

12
12
12
12

R530

1 2

560_0402_5%

R529

12

1 2

560_0402_5%

R528

1 2

12

560_0402_5%

10K_0402_5%

1 2

FBM-L10-160808-301-T_0603

NBA_PLUG_M31,33

NBA_PLUG31

LINE_IN_L_AC30
LINE_IN_R_AC30

MIC31

ICH_AC_RST#
ICH_AC_SYNC
ICH_AC_SDOUT

+VDDA

12

R326
10K_0402_5%

12

R321
10K_0402_5%

1

C

Q20

2

B

2SC2411K_SC59

E

3

12

R527

L36

CD_R_L

CD_R_R

C365 0.1U_0402_16V4Z@

R317

0_0402_5%

D27

RB751V_SOD323

2 1

C638

10U_0805_10V4Z

C602 1U_0603_10V4Z

1 2

C601 1U_0603_10V4Z

1 2

C368 1U_0402_6.3V4Z

1 2

C369 1U_0402_6.3V4Z

1 2

C607 1U_0603_10V4Z

1 2

MIC

1 2

C612 1U_0603_10V4Z

1 2

C613 1U_0603_10V4Z

1 2

1 2

With 14.318Mhz : R321 POP
With 24.576Mhz : R321 DEPOP

C

C366
1U_0402_6.3V4Z

12

C367

1 2

1U_0402_6.3V4Z

1 2

R323

2.4K_0402_5%

0.1U_0402_16V4Z

1

1

C628

2

2

0.1U_0402_16V4Z

R319 0_0402_5%

1 2

NBA_PLUG
LINE_IN_L_AC
LINE_IN_R_AC

C_MIC
C_MIC2

MDC_RC_SPK

EAPD33

SPDIFO31

C

MONO_IN

1

C627

2

AUDIO_AUX_R

250_XTLSEL
EAPD
SPDIFO

D

+5VS

KC FBM-L11-201209-221LMAT_0805
KC FBM-L11-201209-221LMAT_0805

10U_0805_10V4Z

C634

1

2

AC97 Codec

+AVDD_AC97

38

AVDD125AVDD2

14

AUX_L

15

AUX_R

16

JD2

MONO_OUT/VREFOUT3
JD1
LINE_IN_L
LINE_IN_R
CD_L
CD_R
CD_GND
MIC1
MIC2
PHONE
PC_BEEP

RESET#
SYNC

5

SDATA_OUT
SDA

XTLSEL
SPDIFI/EAPD
SPDIFO

4

DVSS1

7

DVSS2

U40 ALC250-VD_LQFP48

CD_RC_L
CD_RC_R
CD_GNDACD_GNA

MONO_IN

17
23
24
18
20
19
21
22
13
12

11
10

45
46

47
48

DGND AGND

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

DVDD11DVDD2

LINE_OUT_L

LINE_OUT_R

HP_OUT_L
HP_OUT_R

BIT_CLK

SDATA_IN

XTL_IN

XTL_OUT

AFILT1
AFILT2

VREFOUT

VREF

DCVOL

VREFOUT2

VAUX

DISABLE#

SCK

AVSS1
AVSS2

9

NC

NC

E

L42

1 2

L37

1 2

0.1U_0402_16V4Z

1

C597

2

35
36
37
39
41

6
8
2

3
29
30
28
27
32

31
33
34
43
44

40
26
42

E

60mil

10U_1206_16V4Z

1

2

0.1U_0402_16V4Z

250_LINE_OUTLAUDIO_AUX_L

27P_0402_50V8J

C595

1 2

250_BIT_CLK

250_SDIN

250_XTL_IN

C375 1000P_0402_50V7K
C374 1000P_0402_50V7K

250_VREF

C630 0.01U_0402_16V7K
C642 1U_0603_10V4Z

C641 1U_0603_10V4Z

R336 0_0402_5%@

1 2

1

C596

1 2
1 2

+AUD_VREF

1 2
1 2

1 2

12

C592
10U_1206_16V4Z

2

1000P_0402_50V7K

R578

1 2

R311 22_0402_5%

1 2

R322

20K_0402_5%@

F

+5VAMP

1

C643

2

1U_0603_10V4Z

+3VS

C625

22_0402_5%

F

U44

4

VIN

2

DELAY
ERROR7CNOISE

8

SD

SI9182DH-AD_MSOP8

+AUD_VREF

1

C640

2

1

2

VOUT

SENSE or ADJ

GND

10mil

1U_0402_6.3V4Z

1

C629

0.1U_0402_16V4Z

2

1

C626

1000P_0402_50V7K

2

C635 4.7U_0805_10V4Z

1 2

C636 4.7U_0805_10V4Z

1 2

ICH_AC_BITCLK
ICH_AC_SDIN0

1 2

R310

0_0402_5%

1

C362
22P_0402_50V8J

2

@

1

1

C632

2

2

Title

Size Document Number Rev

Date: Sheet

G

H

28.7K for Module Design (VDDA = 4.702)

(output = 250 mA)

40mil

5
6
1
3

1

C650

2

0.1U_0402_16V4Z

R603
150K_0603_1%

1 2
12

R601
51K_0603_1%

R583 0_0603_5%

R580 0_0603_5%

R608 0_0603_5%

1 2

1 2

1 2

+VDDA

4.85V

1

C637
10U_0805_10V4Z

2

GND GNDA

ICH_AC_BITCL K 17,34
ICH_AC_SDIN0 17

CLK_14M_CODEC

C631

0.1U_0402_16V4Z

LINE_OUTL
LINE_OUTR250_LINE_OUTR

LINE_OUTL 31
LINE_OUTR 31

CLK_14M_CODEC 13

Compal Electronics, Inc.

AC97 CODEC

EFL50 LA2761

G

29 51Wednesday, April 20, 2005

H

0.2

of

5

4

3

2

1

R325 6.8K_0402_5%@

D D

LINE_IN_L31

LINE_IN_R31

LINE_IN_L

LINE_IN_R

R333 6.8K_0402_5%@
R327 6.8K_0402_5%

R329 6.8K_0402_5%

AUD_INL31

12
12

1

2

LINE_IN_L_AC

LINE_IN_R_AC

1

C376

1U_0402_6.3V4Z@

2

LINE_IN_L_AC 29

LINE_IN_R_AC 29

12

12

LINE_IN_L_R

LINE_IN_R_R

1 2

1 2

C371
1U_0402_6.3V4Z

C373
1U_0402_6.3V4Z

C370

1U_0402_6.3V4Z@

AUD_INR31

C C

B B

A A

Compal Electronics, Inc.

Audio Line Switch

EFL50 LA-2761

30 51Wednesday, April 20, 2005

1

0.2

of

PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

Title

Size Document Number Rev

3

2

Date: Sheet

A

B

C

D

E

Speaker Conn.

SPKR+O
SPKR-O

+5VAMP

W=40mil

C648 100P_0603_50V8J

1 1

0330

LINE_OUTR29

LINE_OUTL29

2 2

3 3

4 4

LINE_OUTR
LINE_OUTL

+5VAMP

0.1U_0402_16V4Z

NBA_PLUG

TC7SH32FU_SSOP5

A

1 2

R348 33K_0402_5%

C649 100P_0603_50V8J

R347 33K_0402_5%

SPDIFO29

AUD_INR30
AUD_INL30

SPDIFO29

AUD_INR30
AUD_INL30

C651

1 2

1 2

1 2

1 2

RIGHT_2

1 2

C644 0.47U_0603_16V4Z
C645 0.47U_0603_16V4Z

NBA_PLUG29

4

LEFT_2

1 2

R314100K_0402_5%

12

+5VSPDIF

+5VAMP +5VAMP

5

U25

2

P

I0

O

1

I1

G

3

SPKR+RIN

SPKL+LIN

R346 10K_0402_5%

1 2

R345 10K_0402_5%

1 2

AMP_MUTE33

100K_0402_5%

SPDIFO
HP_S
DOCK_MIC_S
SPKR+
SPKL+
AGND
AUD_MIC2
AGND
AUD_INR
AUD_INL

SPDIFO
HP_S
DOCK_MIC_S
SPKR+
SPKL+
AGND
AUD_MIC2
AGND
AUD_INR
AUD_INL
NBA_PLUG_S

1 2

1
2
3
4
5
6
7
8
9

10

ACES_87212-1000

12
11
10

9
8
7
6
5
4
3
2
1

R349
100K_0402_5%

1 2

NBA_PLUG_S
HP_S

R352
100K_0402_5%

JP38

1
2
3
4
5
6
7
8
9
10

@

ACES_87213-1200

12
11
10
9
8
7
6
5
4
3
2
1

JP37

C363

0.1U_0402_16V4Z

AMP_MUTE
NBA_PLUG

12

R313

B

1

1

2

2

RIN
LIN

1

C621

4.7U_0805_10V4Z

2

C603

4.7U_0805_10V4Z

U41

16

RVDD

9

LVDD

2

RIN

7

LIN

12

MUTE

14

SE/BTL#

1

RBYPASS
LBYPASS8GND

APA2066KAI-TRL_SOP16

SPKL+

1

C695

2

SHUTDOWN

SPKR+

MOLEX_53398-0290

@

10

SPKR+

3

ROUT+

LOUT+
ROUT-

LOUT-

GND
GND

+5VAMP

JP10

1
2

C608
C622

SPKL+

6

SPKR-

15

SPKL-

11
4

5
13

R316

1 2

10K_0402_5%

NBA_PLUG_S#

150U_D2_6.3VM

150U_D2_6.3VM

LINE_IN_R30
LINE_IN_L30

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

INTSPK_L1-2 INTSPK_L1-3

1 2

+

INTSPK_R1-2 INTSPK_R1-3

1 2

+

WM-64PCY_2P

SPKL+O
SPKL-O

R638

1 2

1K_0402_5%

0.1U_0402_16V4Z

2N7002_SOT23

47_0402_5%

1 2

R591

1 2

R604

47_0402_5%

LINE_IN_R
LINE_IN_L LINE_IN_L-1

+5VAMP

MIC1

1
2

C

JP9

4

4

3

3

2

2

1

1

ACES_85205-0400

EC_MUTE

EC_MUTE 33

0419

L43 FBM-11-160808-700T_0603

1 2

L44 FBM-11-160808-700T_0603

1 2

L45 FBM-11-160808-700T_0603

1 2

L46 FBM-11-160808-700T_0603

1 2

NBA_PLUG_S

Q37

13

D

2

G

S

FBM-11-160808-700T_0603

L35

1 2
1 2

L38

R589

1K_0402_5%@

L39
FBM-11-160808-700T_0603
L40
FBM-11-160808-700T_0603

NBA_PLUG_M29,33

R602

1 2

10K_0402_5%

NBA_PLUG_MP

1

C384
220P_0402_50V7K

2

12

1 2
1 2

12

R607
1K_0402_5%

@

NBA_PLUG_M

Q42

2N7002_SOT23

2

INT_MIC1

FBM-11-160808-700T_0603

LINE_IN_R-1

13

D

G

S

0228

SPKR+O
SPKL+O
SPKR-O
SPKL-O

Docking MIC

INTSPK_L1-4
INTSPK_R1-4

C379

330P_0402_50V7K

AUD_MIC1INT_MIC1

SPKR+O

R634 0_0603_5%

SPKR-O

R635 0_0603_5%

SPKL+O

R636 0_0603_5%

SPKL-O

R637 0_0603_5%

+AUD_VREF

R337

2.2K_0402_5%

AUD_MIC2
AUD_MIC1

C380

220P_0402_50V7K

C382
330P_0402_50V7K

+5VS +5VSPDIF

0304

2.2K_0402_5%

1 2

L41
FBM-11-160808-700T_0603

220P_0402_50V7K

D

1 2
1 2
1 2
1 2

12

MIC_S -->ON Channel

-------------------------

L -->B1

H --->B2

1
2

1

SN74LVC1G3157DCKR_SC70-6
R342 0_0402_5%2@

2

U24

B2
GND
B13A

1 2

JP42

4

4

3

3

2

2

1

1

ACES_85205-0400

DOCK_MIC_S

DOCK_MIC_S

6

S

5

VCC

4

Docking : MIC plug ---> HIGH
Docking : MIC Unplug ---> LOW

+VDDA

12

MIC 29

R338
100K_0402_5%

HeadPhone JACK

JP40

1
2
6

NBA_PLUG_S#

SPDIFO29

+5VSPDIF

NBA_PLUG_S#

G

2

13

D

S

NDS352AP_SOT23
Q38

+AUD_VREF

NBA_PLUG_MP

12

12

R350

C385

Title

Size Document Number Rev

B
Date: Sheet

R351

2.2K_0402_5% @

LINE_IN_R-1
LINE_IN_L-1

1

1

C386
220P_0402_50V7K

2

2

Compal Electronics, Inc.

AMP & Audio Jack

3
5
4

7
8

10

9

FOX_2F11381-SJ5-TR

5
4
3

6
2
1

EFL50 LA-2761

E

MIC JACK

JP41

PHONEJACK

31 51Wednesday, April 20, 2005

of

0.2

A

B

C

D

E

SUPER I/O SMsC LPC47N217

+3VS

+5VS

SIO_PD#
SIO_SMI#

CLK_PCI_SIOCLK_SIO_14M

R52

10_0402_5%@

1 2
1

C20

15P_0402_50V8J@

2

2 1

D2
RB420D_SOT23

1@

LPD0
LPD1
LPD2
LPD3
LPD4
LPD5
LPD6
LPD7

+5V_PRN

PCI_RST#16,22,24,25,27,28,33
PLT_RST#6,16,18,20,33,41

LPTSLCT
LPTPE
LPTBUSY
LPTACK#
AFD#/3M#
LPTERR#
LPTINIT#
LPTSLCTIN#

FD0 38
FD1 38
FD2 38
FD3 38
FD4 38
FD5 38
FD6 38
FD7 38

R51 10K_0402_5%

1 2

R42 10K_0402_5%

1 1

2 2

3 3

4 4

10K_0402_5%@

15P_0402_50V8J@

+5V_PRN

1 2

SIO_IRQ

R36 10K_0402_5%

IRRX

R35 10K_0402_5%

1 2

R33

1 2
1

C17

2

R22 2.7K_0402_5% @

1 2

R17 2.7K_0402_5% @

1 2

R21 2.7K_0402_5% @

1 2

R16 2.7K_0402_5% @

1 2

R15 2.7K_0402_5% @

1 2

R20 2.7K_0402_5% @

1 2

R34 2.7K_0402_5% @

1 2

R31 2.7K_0402_5% @

1 2

R26 33_0402_5%

1 2

R27 33_0402_5%

1 2

R29 33_0402_5%

1 2

R28 33_0402_5%

1 2

R24 33_0402_5%

1 2

R19 33_0402_5%

1 2

R23 33_0402_5%

1 2

R18 33_0402_5%

1 2

A

12

LPC_AD[0..3]17,33

LPC_FRAME#17,33

LPC_DRQ#117

R50 0_0402_5% @

1 2

R49 0_0402_5%

1 2

PM_CLKRUN#18,24,25,27,28,33

CLK_PCI_SIO13

SERIRQ18,22,33

SIO_PME#33

CLK_14M_SIO13

B

LPC_AD[0..3]

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_FRAME#
LPC_DRQ#1

SIO_PD#

PM_CLKRUN#
CLK_PCI_SIO
SERIRQ
SIO_PME#

CLK_SIO_14M

SIO_GPIO11
SIO_SMI#
SIO_IRQ

U3

10

LAD0

12

LAD1

13

LAD2

14

LAD3

15

LFRAME#

16

LDRQ#

17

PCI_RESET#

18

LPCPD#

19

CLKRUN#

20

PCI_CLK

21

SER_IRQ

6

IO_PME#

9

CLK14

23

GPIO40

24

GPIO41

25

GPIO42

27

GPIO43

28

GPIO44

29

GPIO45

30

GPIO46

31

GPIO47

32

GPIO10

33

GPIO11/SYSOPT

34

GPIO12/IO_SMI#

35

GPIO13/IRQIN1

36

GPIO14/IRQIN2

40

GPIO23

8

VSS

22

VSS

43

VSS

52

VSS

LPC47N217_STQFP64

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

LPC I/F

CLOCK

GPIO

POWER

C

RXD1

TXD1

DSR1#

RTS1#
CTS1#

DTR1#

RI1#

SERIAL I/F

DCD1#

IRRX2

FIR

IRTX2

IRMODE/IRRX3

INIT#

SLCTIN#

PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7

SLCT

BUSY

PARALLEL I/F

ACK#

ERROR#

ALF#

STROBE#

VTR
VCC
VCC
VCC
VCC

PE

RXD

62

TXD

63

DSR#

64

RTS#

1

CTS#

2

DTR#

3

RI#

4

DCD#

5

IRRX

37

IRTXOUT

38

IRMODE

39

LPTINIT#

41

LPTSLCTIN#

42

LPD0

44

LPD1

46

LPD2

47

LPD3

48

LPD4

49

LPD5

50

LPD6

51

LPD7

53

LPTSLCT

55

LPTPE

56

LPTBUSY

57

LPTACK#

58

LPTERR#

59

AFD#/3M#

60

R_LPTSTB#

61

7
11
26
45
54

+3VS

RXD 38
TXD 38
DSR# 38
RTS# 38
CTS# 38
DTR# 38
RI# 38
DCD# 38

IRRX 37

IRTXOUT 37

IRMODE 37

LPTINIT# 38

LPTSLCTIN# 38

LPTSLCT 38
LPTPE 38
LPTBUSY 38
LPTACK# 38
LPTERR# 38

AFD#/3M# 38

R_LPTSTB# 38

1

C15

0.1U_0402_16V4Z

2

+3VS

1

C7

4.7U_0805_10V4Z

2

+3VS

D

1

C12

0.1U_0402_16V4Z

2

+5VS

RXD
TXD
DSR#
RTS#
CTS#
DTR#
RI#
DCD#

Title

Size Document Number Rev

Date: Sheet

1

C18

0.1U_0402_16V4Z

2

+3VS

R44

10K_0402_5%@

Base I/O Address

1 2

SIO_GPIO11

0 = 02Eh
1 = 04Eh

R46
1K_0402_5%

1 2

JP15

1
2
3
4
5
6
7
8
9
10

ACES_85201-1005@

Compal Electronics, Ltd.

LPC-Super I/O 217

EFL50 LA2751

1

C19

0.1U_0402_16V4Z

2

*

0.2

of

32 51Wednesday, April 20, 2005

E

5

KBA[0..19]

ADB[0..7]

L27

1 2

Rc

Rd

+5VS

+3VALW

+5VALW

+5VS

+3VALW

ONBD_LAN_PME#25

+3VALW

R258
100K_0402_5%

1 2

R259
0_0402_5%

1 2

RP17

1 8
2 7
3 6
4 5

4.7K_1206_8P4R_5%

RP26

1 8
2 7
3 6
4 5

10K_1206_8P4R_5%

RP25

1 8
2 7
3 6
4 5

4.7K_1206_8P4R_5%

FBM-L11-160808-800LMT_0603

1394_PME#24
WLANPME#27,28

SIO_PME#32

GMCH_ENBKL8,15

PCI_RST#16,22,2 4,25,27,28,32
PLT_RST#6,16,18,20,32,41

SKU ID definition,
Please see page 3.

D D

C C

B B

A A

KBA[0..19] 35
ADB[0..7] 35

ECAGND

C338

22P_0402_50V8J@

R302 0_0402_5%
R298 0_0402_5%
R303 0_0402_5%
R299 0_0402_5%

R277 0_0402_5%

R573 0_0402_5%@
R572 0_0402_5%

SKU_ID

1

C309

0.1U_0402_16V4Z

2

KB_CLK
KB_DATA
PS_CLK
PS_DATA

EC_SMI#
FRD#
SELIO#
FSEL#

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

TP_CLK

12

R2874.7K_0402_5%

TP_DATA

12

R2864.7K_0402_5%

KBA1

12

R2921K_0402_5%

KBA4

12

R2931K_0402_5%

KBA5

12

R2951K_0402_5%

LID_SW#

12

R28920K_0402_5%

DOCKIN#

12

R26010K_0402_5%

5

12

1 2
1 2
1 2
1 2

1 2

1 2
1 2

R285 33_0402_5%@

12

CLK_PCI_LPC13

+3VALW

R305
10K_0402_5%

1 2

0.1U_0402_16V4Z

+3VALW

1 2

R278 120K_0402_5%@

1 2

R290 1K_0402_5%

1 2

R291 1K_0402_5%

EC_PME#

ENBKL

LRST#

12

C335

+3VALW

R28447K_0402_5%

12

0.1U_0402_16V4Z

4

0.1U_0402_16V4Z
C351

1

2

LPC_AD017,32
LPC_AD117,32
LPC_AD217,32
LPC_AD317,32

SERIRQ18,22,32

KB_CLK38
KB_DATA38
PS_CLK38
PS_DATA38

TP_DATA34

EC_SMB_CK135,45
EC_SMB_DA135,45
EC_SMB_CK24
EC_SMB_DA24

EC_SCI#18

FSTCHG43

EC_SMI#18

IDE_LED#20

EN_WL#34,39

EC_SWI#18

EN_WOL#25
PE_REQ1#13

LID_SW#36

VR_ON46,47

CARD_LED#22

PE_REQ2#13

PBTN_OUT#18

1394PWRON24

CAPSLED#39
NUMLED#39

PHDD_LED#17

EC_GA2017

EC_KBRST#17

4

1

2

0.1U_0402_16V4Z

FRD#35

FWR#35

FSEL#35

12

TP_CLK34

ENBKL15

BKOFF#15

BT_ON#34
SYSON37,40,48
SUSP#15,35,40

1

C342

2

LPC_FRAME#17,32

PM_CLKRUN#18,24,25,27,28,32

R280 100K_0402_5%

EZ_SMBUS_ON#38

EZ_PE_REQ1#38
EZ_PE_REQ2#18,38

ENBKL
DPLL_TP
TEST_TP

3

+3VALW

*

*

SMBus

GPIO

*

*

*

*

MISC

L28

1 2

95

123

136

157

166

VCC16VCC34VCC45VCC

VCC

VCC

VCC

X-BUS Interface

Pulse Width

ENE-KB910-B4

Analog To Digital

Digital To Analog

Expanded I/O

GND17GND35GND46GND

3

1

C332

2

0.1U_0402_16V4Z

ECAGND

96

161

159

VCCA

AGND

VCCBAT

BATGND

Internal Keyboard

FAN2PWM/GPOW2/PWM2

FAN1PWM/GPOW7/PWM7

Wake Up Pin

GPIO2E/TOUT1/FANFB1

DPLL_TP/GPIO06/FANFB3

FAN

TEST_TP/GPIO05/FAN3PWM

Timer Pin

E51RXD/GPIO21/ISPCLK
E51TXD/GPIO22/ISPDAT

GND

GND

122

137

167

0.1U_0402_16V4Z

GPOK0/KSO0
GPOK1/KSO1
GPOK2/KSO2
GPOK3/KSO3
GPOK4/KSO4
GPOK5/KSO5
GPOK6/KSO6
GPOK7/KSO7
GPOK8/KSO8

GPOK9/KSO9
GPOK10/KSO10
GPOK11/KSO11
GPOK12/KSO12
GPOK13/KSO13
GPOK14/KSO14
GPOK15/KSO15
GPOK16/KSO16
GPOK17/KSO17

GPIK0/KSI0
GPIK1/KSI1
GPIK2/KSI2
GPIK3/KSI3
GPIK4/KSI4
GPIK5/KSI5
GPIK6/KSI6
GPIK7/KSI7

GPOW0/PWM0
GPOW1/PWM1

GPOW3/PWM3
GPOW4/PWM4
GPOW5/PWM5
GPOW6/PWM6

GPWU0
GPWU1
GPWU2
GPWU3
GPWU4
GPWU5

TIN1/GPWU6

TIN2/FANFB2/GPWU7

GPIAD0/AD0
GPIAD1/AD1
GPIAD2/AD2
GPIAD3/AD3
GPIAD4/AD4
GPIAD5/AD5
GPIAD6/AD6
GPIAD7/AD7

GPODA0/DA0

GPODA1/DA1

GPODA2/DA2

GPODA3/DA3

GPODA4/DA4

GPODA5/DA5

GPODA6/DA6

GPODA7/DA7

GPIO18/XIO8CS#

*

GPIO19/XIO9CS#

*

GPIO1A/XIOACS#

*

*

GPIO1B/XIOBCS#
GPIO1C/XIOCCS#

*

GPIO1D/XIODCS#

*

GPIO1E/XIOECS#

*

GPIO1F/XIOFCS#

*

TOUT2/GPIO2F
E51IT0/GPIO00

E51IT1/GPIO01

XCLKI

XCLKO

KB910Q B4_LQFP176

C353

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
153
154

71
72
73
74
77
78
79
80

32
33
36
37
38
39
40
43

2
26
29
30
44
76
172
176

81
82
83
84
87
88
89
90

99
100
101
102
1
42
47
174

85
86
91
92
93
94
97
98

171
12
11

175
3

4
106
107

158
160

0.1U_0402_16V4Z

1

C354

2

LRST#

FRD#
FWR#
FSEL#
SELIO#
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

KB_CLK
KB_DATA
PS_CLK
PS_DATA
TP_CLK
TP_DATA

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

EC_SCI#

ENBKL
BKOFF#

FSTCHG

EC_SMI#

PE_REQ1#
LID_SW#
BT_ON#
SYSON
SUSP#
VR_ON

PE_REQ2#
PBTN_OUT#

1394PWRON
CAPSLED#
NUMLED#

2

C340

1000P_0402_50V7K

1

15
14
13
10

9

165

18

7
25
24

150
151
173
152
138
139
140
141
144
145
146
147
124
125
126
127
128
131
132
133
143
142
135
134
130
129
121
120
113
112
104
103
108
105

110
111
114
115
116
117

163
164
169
170

8
20
21
22
27
28
48
62
63
69
70
75

109
118
119
148
149
155
156
162
168

55
54
23
41
19

5

6
31

TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C350

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#

PROPRIETARY NOTE THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND

FBM-L11-160808-800LMT_0603

2

C333
1000P_0402_50V7K

1

U20

LAD0
LAD1
LAD2
LAD3

LPC Interface

LFRAME#
LRST#/GPIO2C
LCLK
SERIRQ
CLKRUN#/GPIO0C
LPCPD#/GPIO0B

RD#
WR#
MEMCS#
IOCS#
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1/XIOP_TP
A2
A3
A4/DMRP_TP
A5/EMWB_TP
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20/GPIO23
E51CS#/GPIO20/ISPEN

PSCLK1
PSDAT1
PSCLK2

PS2 Interface

PSDAT2
PSCLK3
PSDAT3

SCL1
SDA1
SCL2
SDA2

GPIO04
GPIO07
GPIO08
GPIO09
GPIO0D
GPIO0E
GPIO10
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO2A
GPIO2B
GPIO2D

FnLock#/GPIO12
CapLock#/GPIO011
NumLock#/GPIO0A
ScrollLock#/GPIO0F
ECRST#
GA20/GPIO02
KBRST#/GPIO03
ECSCI#

2

+3VALW

R304
0_0402_5%

1 2

1

1

C356
1U_0603_10V4Z

2

2

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

INVT_PWM
BEEP#

ACOFF
EC_ON

EC_LID_OUT#
EC_MUTE

ON/OFF

PM_SLP_S3#
PM_SLP_S5#
EN_BT#
EC_PME#

BATT_TEMP
SKU_ID
BATT_OVP
ADP_I-R ADP_I

DOCKIN#
AD_BID0

R276 0_0402_5%

1 2

DAC_BRIG
IREF

EN_DFAN1#
WL_ON
AMP_MUTE

PWR_LED#
PWR_SUSP_LED#
BATT_FULL_LED#
BATT_CHGI_LED#
WL_ON_LED#
BT_ON_LED#
E_MAIL_LED#
MEDIA_LED#

FAN_SPEED1
DPLL_TP
TEST_TP

EC_THERM#

EC_TCK
EC_TDO

CRY2

R577 0_0402_5%@

1 2

CRY1

2

KSI[0..7]
KSO[0..15]

KSO16 39

INVT_PWM 15
BEEP# 29

ACOFF 42,43
EC_ON 39

EC_LID_OUT# 18
EC_MUTE 31

ON/OFF 39

PM_SLP_S3# 18
PM_SLP_S5# 18
EN_BT# 34,39

BATT_OVP 43

DOCKIN # 14, 21,26,38

NBA_PLUG_M 29,31

DAC_BRIG 15
EZ_SUSON 38
IREF 43
EN_DFAN1 36
WL_ON 27,28
AMP_MUTE 31
EZ_MAINON 38
EZ_PERST# 38

PWR_LED# 34,39

PWR_SUSP_LED# 34,39
BATT_FULL_LED# 34,39
BATT_CHGI_LED# 34,39
WL_ON_LED# 34,39

BT_ON_LED# 34,39
E_MAIL_LED# 39
MEDIA_LED# 39

FAN_SPEED1 36

EC_THERM# 18

EC_RSMRST# 18

EAPD 29

RTC_CLK

Title

Size Document Number Rev

Date: Sheet

C307 0.01U_0402_16V7K

For EC Tools

+5VALW

EC_TCK
EC_TDO

KSI[0.. 7 ] 34,39
KSO[0..15] 34

Analog Board ID definition,
Please see page 3.

+3VALW

Ra

1 2

Rb

1 2

+3VALW

R279
10K_0402_5%

1 2

D11 CH751H-40_SC76

2 1

ECAGND

12

R266

1

2

1 2

RTC_CLK 18

ACIN 42
ACIN1 18

100K_0402_5%

C308

0.1U_0402_16V4Z

1231_Modify

1

C359

2

10P_0402_50V8J

32.768KHZ_12.5P_1TJS125DJ2A073

Compal Electronics, Inc.

ENE-KB910

EFL50 LA2761

1

R274
100K_0402_5%

R275
0_0402_5%

BATT_TEMP 45

R300

1 2

20M_0603_5%@

4

1

IN

2

1

@

ACES_85205-0400

1

1

2

2

3

3

4

4

JP33

AD_BID0

1

C329

0.1U_0402_16V4Z

2

ADP_I

CRY2CRY1

X1

OUT

NC3NC

33 51Wednesday, April 20, 2005

R312
0_0402_5%

1 2

1

C358

2

of

10P_0402_50V8J

0.2

TO M/B

MDC CONN.

JP14

1

GND1

ICH_AC_SDOUT17,29
ICH_AC_SYNC17,29

ICH_AC_SDIN117
ICH_AC_RST#17,29

1 2

R13 22_0402_5%

ICH_AC_SYNC
ICHAC_SDIN1_MDC

3

IAC_SDATA_OUT

5

GND2

7

IAC_SYNC

9

IAC_SDATA_IN

11

IAC_RESET#

IAC_BITCLK

RES0
RES1

3.3V
GND3
GND4

2
4
6
8
10
12

+3V

ICHAC_BITCLK_MDC

+3V

1

C2

1U_0805_25V4Z

2

1 2

R14 22_0402_5%

ICH_AC_BITCLK 17,29

+5VS

TP_CLK33
TP_DATA33

TP_CLK
TP_DATA

ACES_85201-0605

6
5
4
3
2
1

JP5

KSO8

C215 100P_0402_25V8K

KSI3

C217 100P_0402_25V8K

KSO9

C220 100P_0402_25V8K

KSI2

C222 100P_0402_25V8K

KSI1

C224 100P_0402_25V8K

KSO10

C227 100P_0402_25V8K

KSO11

C233 100P_0402_25V8K

KSI0

C235 100P_0402_25V8K

KSO12

C237 100P_0402_25V8K

KSO13

C239 100P_0402_25V8K

KSO14

C241 100P_0402_25V8K

KSO15

C242 100P_0402_25V8K

INT_KBD CONN.

KSO15
KSO14
KSO13
KSO12
KSI0
KSO11
KSO10
KSI1
KSI2
KSO9
KSI3
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSI4
KSO2
KSO1
KSO0
KSI5
KSI6
KSI7

JP4

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

ACES_85201-2405

(Right)

(Left)

KSI[0..7]
KSO[0..15]

(EMW80)

<>

KSI[0. . 7 ] 33,39
KSO[0..15] 33

KSI7
KSI6
KSI5
KSO0
KSO1
KSO2
KSI4
KSO3
KSO4
KSO5
KSO6
KSO7

131314141515161617171818191920

FOX_QT8A0121-4011~D

20

Connector for MDC Rev1.5

C238 100P_0402_25V8K
C236 100P_0402_25V8K
C234 100P_0402_25V8K
C232 100P_0402_25V8K
C226 100P_0402_25V8K
C223 100P_0402_25V8K
C221 100P_0402_25V8K
C218 100P_0402_25V8K
C216 100P_0402_25V8K
C214 100P_0402_25V8K
C213 100P_0402_25V8K
C212 100P_0402_25V8K

TP_DATA33
TP_CLK33

EN_WL#33,39

EN_BT#33,39
WL_ON_LED#33,39
BT_ON_LED#33,39

PWR_SUSP_LED#33,39
PWR_LED#33,39
BATT_FULL_LED#33,39
BATT_CHGI_LED#33,39

+5VALW

BlueTooth Interface

BT_ON#33

USB20_P518

USB20_N518

WLAN_BT_DATA27,28
WLAN_BT_CLK27,28

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

USB20_P5
USB20_N5

BT_VCC

10U_0805_10V4Z

C396

TO M/B

@

ACES_85201-1605

16

16

15

TP_DATA
TP_CLK

+5VS

EN_WL#

EN_BT#
WL_ON_LED#
BT_ON_LED#

+3VALW

S

Q31

G

2

D

1 3

1

1

C397

0.1U_0402_16V4Z

2

2

Title

Size Document Number Rev

Date: Sheet

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

JP6

SI2301BDS_SOT23

BT_VCC

ACES_87213-0800

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

JP1

Bluetooth Connector

Compal Electronics, Inc.

MDC / BT / KBD / TP

EFL50 LA2761

34 51W ednesday, April 20, 2005

0.2

of

SB_INT_FLASH_SEL# 18

8

U22C

10

OE#

I9O

SUS_STAT# 18

KBA[0..19]33

ADB[0..7]33

KBA[0..19]
ADB[0..7]

+3VALW

INT_FLASH_SEL

SN74LVC125APWLE_TSSOP14

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
KBA0
ADB0
ADB1
ADB2

U42

1

NC

2

A16

3

A15

4

A12

5

A7

6

A6

7

A5

8

A4

9

A3

10

A2

11

A1

12

A0

13

DQ0

14

DQ1

15

DQ2

16

VSS

29F040/SST39VF040_PLCC

1MB Flash ROM

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

INT_FSEL#
FRD#
FWE#

U38

21

A0

20

A1

19

A2

18

A3

17

A4

16

A5

15

A6

14

A7

8

A8

7

A9

36

A10

6

A11

5

A12

4

A13

3

A14

2

A15

1

A16

40

A17

13

A18

37

A19

22

CE#

24

OE#

9

WE#

SST39VF080-70_TSOP40

@

(CL55)

VCC0
VCC1

RP#

READY/BUSY#

NC0
NC1

GND0
GND1

2

C614

0.1U_0402_16V4Z

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

1 2

R301
100K_0402_5%@

1

FRD# 33
FSEL# 33

+3VALW

1

C383

@

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

+3VALW

32

VCC

FWE#

31

WE*

KBA17

30

A17

KBA14

29

A14

KBA13

28

A13

KBA8

27

A8

KBA9

26

A9

KBA11

25

A11

FRD#

24

OE*

KBA10

23

A10

FSEL#

22

CE*

ADB7

21

DQ7

ADB6

20

DQ6

ADB5

19

DQ5

ADB4

18

DQ4

ADB3

17

DQ3

31
30

25

D0

26

D1

27

D2

28

D3

32

D4

33

D5

34

D6

35

D7

RESET#

10
11

NC

12
29
38

23
39

1 2

FWE#

C372

+3VALW

4

O

+3VALW

12

R335
100K_0402_5%

5

U23

2

P

I0

1

I1

G

TC7SH32FU_SSOP5

3

1MB ROM Socket

KBA16 KBA17
KBA15
KBA14

KBA12
KBA11
KBA9
KBA8
FWE#
RESET#
INT_FLASH_EN#
INT_FLASH_SEL
KBA18
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1

JP8

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40

SUYIN_80065AR-040G2T@

2

G

1 3

D

Q21
2N7002_SOT23

FWR# 33

S

KBA19KBA13
KBA10
ADB7
ADB6
ADB5
ADB4

ADB3
ADB2
ADB1
ADB0
FRD#

FSEL#
KBA0

SUSP# 15,33,40

EC_FLASH# 18

+3VALW

INT_FSEL# FSEL#

1 2

R331 22_0402_5%

EC_SMB_CK133,45
EC_SMB_DA133,45

+3VALW

R330
10K_0402_5%

SN74LVC125APWLE_TSSOP14

+5VALW

0.1U_0402_16V4Z

INT_FLASH_EN#

1 2

4

U22B

6

C361 0.1U_0402_16V4Z

5

OE#

I

O

1 2

U21

8
7
6
5

AT24C16AN-10SI-2.7_SO8

VCC
WP
SCL
SDA

GND

A0
A1
A2

C377

R334
100K_0402_5%

+5VALW

1
2
3
4

1 2

1 2

12

R315
100K_0402_5%

12

R309
100K_0402_5%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

BIOS & EXT. I/O PORT & SATA HDD

EFL50 LA-2761

35 51W ednesday, April 20, 2005

0.2

FAN Conn

+5VS

VSB

1 2

8

C231

0.1U_0402_16V4Z

EN_DFAN133

EN_DFAN1

P

3

+IN

OUT

2

-IN
G

4

1 2

C210 @2200P_0402_50V7K

1 2

R177 120K_0402_5%

R175
100K_0402_5%

1 2

1

U15A
LM358A_SO8

93/05/16

FAN_SPEED133

EN_FAN1

+3VS

12

R576
10K_0402_5%

93/05/16

3

1

G

6

2

D

S

4 5

D26

RB751V_SOD323

2 1

Q15
SI3456DV-T1_TSOP6

AO6400

+VCC_FAN1

FAN1

C543 @1000P_0402_50V7K

1

C121
@1000P_0402_50V7K

2

1 2

C540 10U_1206_16V4Z

1 2

JP21

1
2
3

ACES_85205-0300

+5VS

+VCC_FAN1

EN_DFAN1

1

C547
10U_1206_16V4Z

2

U18

1

VEN

2

VIN

3

VO

4

VSET

G993P1U_SOP8L

GND
GND
GND
GND

8
7
6
5

1

2

SW1
MPU-101-81_4P

(ELW80)

3

4

2

LID_SW# 33

3

D1

PSOT24C_SOT23@

1

+5VS

1

C548

+

150U_D2_6.3VM@

2

Compal Electronics, Inc.

Close to SATA HDD

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

FAN / FIR / RJ11/Lid_Switch

Size Document Number Rev

Date: Sheet of

EFL50 LA-2761

36 51W ednesday, April 20, 2005

0.2

5

4

3

2

1

+5VALW

1

SYSON3 3,40,48

+5VALW

1

2

SYSON3 3,40,48

C390

SYSON#

+5VALW

C654

+3VS

1 2
1

C600

0.1U_0402_16V4Z

2

2

SYSON

1

2

SYSON

R594
47_1206_5%

1
2
3
4

IRRX32

U16

G528_SO8

SYSON#40

4.7U_0805_10V4Z

C211

4.7U_0805_10V4Z

1

C604

2

D D

4.7U_0805_10V4Z

C C

B B

10U_1206_16V4Z

A A

U26

4

VIN

CE1GND

RT9702ACB_SOT23-5

FLG

VOUT

3
5
2

+USB_AS

Cost-Down from G528 to RT9702

+3VALW

12

R178
10K_0402_5%

1 2

R179

10K_0402_5%

1 2

R174

10K_0402_5%

0.1U_0402_16V4Z

3
5
2

+USB_CS

GND
IN
IN
EN#

+USB_BS

8

OUT

7

OUT

6

OUT

5

FLG

U46

4

FLG

VIN

VOUT

CE1GND

RT9702ACB_SOT23-5

Cost-Down from G528 to RT9702

FIR Module

+3VS

C610

10U_1206_16V4Z

IRRX IRMODE
IR_3VS

2
4
6
8

SD/MODE: SHUTDOWN MODE, HIGH ACTIVE
MODE: HIGH/LOW SPEED SELECT

1 2
1 2

1

2

IR1

IRED_C
RXD
VCC
GND

TFDU6102-TR3_8P

R605

4.7_1206_5%

R606

4.7_1206_5%

IRED_A

TXD

SD/MODE

MODE

C206

1
3
5
7

1

2

+IR_ANODE

IRTXOUT

USB_OC#0 18

1

C209

0.1U_0402_16V4Z

2

USB_OC#6 18

C624

1 2

+

150U_D2_6.3VM@

1 2

R586

0_0402_5%@

USB_OC#4 18

USB_OC#2 18

IRTXOUT 32
IRMODE 32

+USB_AS

+USB_BS

470P_0402_50V7K

1

+

C204

150U_D2_6.3VM

USB20_N218
USB20_P218

1

C202

2

2

JP24

1
2
3
4

SUYIN_020173MR004S312ZL

(Left)

USB20_N018
USB20_P018

150U_D2_6.3VM

C388

470P_0402_50V7K

1

+

C387

2

1

2

SUYIN_020173MR004G533ZR

0307

JP13

1

VCC

2

D-

3

D+

4

GND

5

GND1

6

GND2

7

GND3

8

GND4

(Rear)

USB20_N0 USB20_P0

USB20_N2 USB20_P2

USB20_P4 USB20_N4

150U_D2_6.3VM

USB20_N418
USB20_P418

1
2
3

C240

U32

AS
GND
VDD

IP4220CZ6_SOT23-6@

470P_0402_50V7K

1

+

C225

2

6

SDA

5

ALERT

4

SCL

+USB_BS

1

2

JP25

SUYIN_020173MR004S312ZL

(Left)

+USB_BS

USB20_N618
USB20_P618

1
2
3
4

USB20_N6 USB20_P6

U1

1

AS

2

GND

3

VDD

IP4220CZ6_SOT23-6@

C652
150U_D2_6.3VM

@

U47

1

AS

2

GND

3

VDD

IP4220CZ6_SOT23-6@

SDA

ALERT

SCL

470P_0402_50V7K

1

C655

+

@

2

SDA

ALERT

SCL

6
5
4

+USB_CS

1

2

6
5
4

+USB_AS

JP11

1

1

2

2

3

3

4

4

ACES_85205-0400

@

(1 SPINDLE)

+USB_CS

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

USB Conn

EFL50 LA-2761

37 51W ednesday, April 20, 2005

1

0.2

of

A

B

C

D

E

+3VALW

1@

10K_0402_5%

R3

R1

1 1

2 2

3 3

4 4

1 2

10K_0402_5%1@

D_USB_SMI#116

D_USB_SMI#216

KB_DATA33
PS_DATA33

D_CK_SDATA11,12,13

A

12

MZIN_EM#

KB_CLK33
PS_CLK33

100K_0402_5% @

+3VALW

C1

5

U2

1

P

B

2

A

G

TC7SH08FU_SSOP5

1@

3

D13

2 1

1@

RB751V_SOD323

D12

2 1

1@

RB751V_SOD323

KB_DATA
KB_CLK
PS_DATA
PS_CLK

+3VS

R369

1 2

2

G

Q1

1 3

D

S

1 2

R10 0_0603_5%

1@

12

DOCKIN#

4

Y

D_LAN_ACTIVITY#26

R8 0_0402_5%WD@

1 2

R7 0_0402_5%WD@

1 2

R6 0_0402_5%WD@

1 2

R5 0_0402_5%WD@

1 2

2

G

Q30

1 3

D

S

D_CK_SCLK11,12,13

2N7002_SOT23@

1@

0.1U_0402_16V4Z

D_LAN_MDI0+26
D_LAN_MDI0-26
D_LAN_MDI1+26

D_LAN_MDI1-26

D_LAN_LINK#26

R_LPTSTB#32
AFD#/3M#32

FD032
LPTERR#32
FD132

LPTINIT#32

FD232

LPTSLCTIN#32

FD332
FD432
FD532
FD632
FD732
LPTACK#32
LPTBUSY32
LPTPE32
LPTSLCT32

CLK_EZ_CLK113
CLK_EZ_CLK1#13

D_LAN_MDI2+26
D_LAN_MDI2-26

D_LAN_MDI3+26
D_LAN_MDI3-26

EZ_SUSON33
EZ_MAINON33
EZ_PERST#33

EZ_PCIE_TXP118
EZ_PCIE_TXN118

D_DVI_TXD2-41
D_DVI_TXD2+41

2N7002_SOT23@

R362 0_0603_5%

DOCKI N # 14,21,26,33

RI#32

DTR#32

CTS#32
TXD32
RTS#32

RXD32

DSR#32

DCD#32

EZ_SMBUS_ON# 33

2

G

Q28

1 3

D

S

1 2

1@

B

D_LAN_MDI0+
D_LAN_MDI0­D_LAN_MDI1+

D_LAN_MDI1-

D_LAN_LINK#
R_LPTSTB#
AFD#/3M#
FD0
LPTERR#
FD1
LPTINIT#
FD2
LPTSLCTIN#
FD3
FD4
FD5
FD6
FD7
LPTACK#
LPTBUSY
LPTPE
LPTSLCT

CLK_EZ_CLK1
CLK_EZ_CLK1#

D_LAN_ACTIVITY#

D_LAN_MDI2+
D_LAN_MDI2-

D_LAN_MDI3+
D_LAN_MDI3-

D_HP_S
D_SPDIFO

RI#
DTR#
CTS#
TXD
RTS#
RXD
DSR#
DCD#

EZ_PCIE_TXP1
EZ_PCIE_TXN1
D_DVI_TXD2­D_DVI_TXD2+

2N7002_SOT23@

1 2

R361 4.7K_0402_5% @

EZ_SMB_CLK

1 2

R9 4.7K_0402_5% @

EZ_SMB_DAT

D_DVI_DET

Docking Conn.

JP12

1

LAN0+

2

LAN0-

3

GND

4

LAN1+

5

LAN1-

6

GND

7

GND
LAN_LINK#8AUD_INR

9

PP_STB#

10

PP_AFD#

11

PP_D0

12

PP_ERR#

13

PP_D1

14

PP_INIT#

15

PP_D2
PP_SLIN#16VGA_HS

17

PP_D3

18

PP_D4

19

PP_D5

20

PP_D6

21

PP_D7
PP_ACK#22EZIN_ME#
PP_BUSY23PE_REQ2#

24

PP_PE
PP_SLCT25PE_REQ1#

26

PE_WAKE#

27

GND

28

GND

29

PCIECLK1+

30

PCIECLK1-

31

LAN_ACT#

32

RESERVE

33

GND

34

LAN2+

35

LAN2-

36

GND

37

LAN3+

38

LAN3-

39

GND

40

HP_S

41

SPDIF

42

COM_RI#

43

COM_DTR#
COM_CTS#44VGA_R
COM_SOUT45VGA_G
COM_RTS#46VGA_B

47

COM_SIN

48

COM_DSR#
COM_DCD#49PCIERX2+

50

GND

51

PS2_KBDT

52

PS2_KBCK
PS2_MSDT53PCIETX2+
PS2_MSCK54PCIETX2-

55

SUSON

56

MAINON
PE_RST#57PCIECLK2+

58

GND

59

PCIETX1+

60

PCIETX1-

61

DVI2-

62

DVI2+

FOX_QL10303-C4444R-4F_124P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PCIECLK2-

+3VS

+3VS

GND

DVI_DET
DVI_DAT

GND

DVI_CLK

EZIN_EM#

MIC_S

AUD_INL

AGND

AUD_MIC

AUD_OR

AUD_OL

AGND

GND

VGA_VS
VGA_DAT
VGA_CLK

SERIRQ
PE_CLK

PE_DAT

GND

PCIERX1+

PCIERX1-

DVI1-

DVI1+

GND

DVI0-

DVI0+

GND

DVICLK+

DVICLK-

GND
GND

TV_COMP

TV_Y
TV_C

GND
GND

GND
GND

PCIERX2-

GND
GND

GND
GND

VCC
VCC
GND
GND

C

63
64

65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124

D_DVI_DET

DVI_DET15,41 D_DVI_DET

R2

1 2

100K_0402_5%1@

D_DVI_DET
DE_DVI_SDATA

DE_DVI_SCLK
MZIN_EM#
D_MIC_S
D_AUD_INR
D_AUD_INL
D_AGND
D_AUD_MIC2
D_AUD_OR
D_AUD_OL
D_AGND

D_CRT_HSYNC
D_CRT_VSYNC
D_DDC_DATA
D_DDC_CLK

EZ_SMB_CLK
MZIN_ME#

EZ_SMB_DAT

EZ_PCIE_RXP1
EZ_PCIE_RXN1

D_DVI_TXD1­D_DVI_TXD1+

D_DVI_TXD0­D_DVI_TXD0+

D:DVI_TXC+
D_DVI_TXC-

D_TV_COMPS
D_TV_LUMA
D_TV_CRMA

D_CRT_R
D_CRT_G
D_CRT_B

EZ_PCIE_RXP2
EZ_PCIE_RXN2

EZ_PCIE_TXP2
EZ_PCIE_TXN2

CLK_EZ_CLK2
CLK_EZ_CLK2#

1@

SKS10-04AT_TSMA@

PJP1
JUMP_43X118

112

10K_0402_5%

0307

DVI_DET

D15

2

+5VS

D14

2 1

RB411D_SOT23

4.7K_0402_5%

D_DVI_DET

D_CRT_HSYNC 14
D_CRT_VSYNC 14
D_DDC_DATA 14
D_DDC_CLK 14

R4 1K_0402_5%

CLK_EZ_CLK2 13
CLK_EZ_CLK2# 13

DE_DVI_SDATA

DE_DVI_SCLK

1@

1 2

EZ_PE_REQ2# 18,33
EZ_PE_REQ1# 33
EZ_PCIE_RXP1 18

EZ_PCIE_RXN1 18
D_DVI_TXD1- 41
D_DVI_TXD1+ 41

D_DVI_TXD0- 41
D_DVI_TXD0+ 41

D_DVI_TXC+ 41
D_DVI_TXC- 41

D_TV_COMPS 21
D_TV_LUMA 21
D_TV_CRMA 21

D_CRT_R 14
D_CRT_G 14
D_CRT_B 14

EZ_PCIE_RXP2 18
EZ_PCIE_RXN2 18

EZ_PCIE_TXP2 18
EZ_PCIE_TXN2 18

DKN_B+

+5VS

VIN

+5VS

12

R469

R357

1 2

100_0402_5%

12

R359
100K_0603_5%

2 1

D

12

R356

30mil

0307

+3VS

+5VS

R11

0_0402_5%

PM@

12

R355

4.7K_0402_5%

1 3

D

2N7002_SOT23

2N7002_SOT23

VIN

0.1U_0402_25V4K

1

C392

2

0.1U_0402_25V4K

Title

Size Document Number Rev

Date: Sheet of

R363
0_0402_5%

R366 6.8K_0402_5%GM@

1 2

2

G

Q27

S

1 3

D

0.1U_0402_25V4K

1

C391

2

GM@

1 2

DVI_SDATA

2

G

Q26

S

1

C393

2

0.1U_0402_25V4K

R365 6.8K_0402_5%PM@

DVI_SCLK

R360 6.8K_0402_5%PM@

R364 6.8K_0402_5%GM@

D_SPDIFO
D_HP_S
D_MIC_S
D_AUD_INR
D_AUD_INL
D_AGND
D_AUD_MIC2
D_AGND
D_AUD_OR
D_AUD_OL

1

2

12

12

0.1U_0402_25V4K

C395

Compal Electronics, Inc.

Docking

EFL50 LA-2761

E

+5VS

+3VS

12

+3VS

12

+5VS

JP2

1
2
3
4
5
6
7
8
9

10

ACES_87213-1000

1

C394

2

38 51Wednesday, April 20, 2005

DVI_SDATA 15,41

DVI_SCLK 15,41

1
2
3
4
5
6
7
8
9
10

0.2

A

B

C

D

E

TOP Side

12

J1 JOPEN

12

J2 JOPEN

SW3

1 1

2 2

EVQPLHA15_4P

3
4

5

1
2

6

EC_ON33

Bottom Side

EC_ON

Q29

2N7002_SOT23

ON/OFFBTN#

+3VALW

R368

4.7K_0402_5%

1 2

13

D

S

DAN202U_SC70

1 2

R367
33K_0402_5%

DTC124EK_SC59

2

G

1

Power ON Circuit

+3V +3V+3VS

12

R539

180K_0402_5%

2

C562

1U_0805_25V4Z

3 3

1

U34D
SN74LVC14APWLE_TSSOP14

14

P

9

8

O

I

G

+3V POWER +3V POWER

7

11

I

RTC Battery

BATT1

-+

RTCBATT

+RTCVCC

1

4 4

A

2

+RTCBATT

+RTCBATT

12

3

C243

0.1U_0402_16V4Z

1

D9
BAS40-04_SOT23

2

+3VALW

R358
100K_0402_5%

1 2

D16

2
3

13

2

Q2

U34E
SN74LVC14APWLE_TSSOP14

14

P

10

O

G

7

CHGRTC

R535

100K_0402_5%

B

Power Button

51ON#

ON/OFF 33
51ON# 42

2

C389
1000P_0402_50V7K

1

SYS_PWROK 18

E-Mail_BTN Internet_BTN

SW2
EVQPLHA15_4P

12

D17
RLZ20A_LL34

KSO1633 KSO1633

3
4

e/eManager_BTN Launch Manager_BTN

KSO1633 KSO1633

3
4

5

6

SW5
EVQPLHA15_4P

5

6

1
2

1
2

KSI3 33,34

KSI0 33,34 KSI1 33,34

BlueTooth_BTN Wireless_BTN

SW7

1 2

PTS-042_2P

PWR_SUSP_LED#33,34

E_MAIL_LED#33

CAPSLED#33

NUMLED#33

PWR_LED#33,34

BATT_FULL_LED#33,34

BATT_CHGI_LED#33,34

MEDIA_LED#33

WL_ON_LED#33,34

BT_ON_LED#33,34

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

LED7 HT-170UD_0805

LED1 HT-170UYG-DT GRN_0805

LED2 HT-170UYG-DT GRN_0805

LED3 HT-170UYG-DT GRN_0805

LED5 HT-170UYG-DT GRN_0805

LED6 HT-170UYG-DT GRN_0805

LED8 HT-170UD_0805

LED4 HT-170UYG-DT GRN_0805

LED10

1

12-21UYOC/S530-A2/TR8_YEL

LED9

1

12-21UYOC/S530-A2/TR8_YEL

EN_BT# 33,34 EN_WL# 33,34

LED Indicator

21

21

21

21

21

21

21

21

3
2

3
2

PWR_SUSP_LED#D

E_MAIL_LED#D

CAPSLED#D

NUMLED#D

PWR_LED#D

BATT_FULL_LED#D

BATT_CHGI_LED#D

MEDIA_LED#D

WL_ON_LED#D

BT_ON_LED#D

D

SW4
EVQPLHA15_4P

3
4

3
4

SW8

1 2

PTS-042_2P

R612 360_0402_5%

R12 360_0402_5%

R45 360_0402_5%

R58 360_0402_5%

R613 360_0402_5%

R610 360_0402_5%

R611 360_0402_5%

R85 360_0402_5%

R353 360_0402_5%

R354 360_0402_5%

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.
Power OK/Reset/RTC battery

5

6

SW6
EVQPLHA15_4P

5

6

12

12

12

12

12

12

12

12

12

12

EFL50 LA-2761

1
2

1
2

E

KSI2 33,34

+5VALW

+5VS

+5VS

+5VS

+5VALW

+5VALW

+5VALW

+5VS

+5VALW

+5VALW

of

39 51Wednesday, April 20, 2005

0.2

A

B

C

D

E

+3VALW TO +3V

1

C611
10U_1206_16V4Z

1
2
3
4

2

SYSON_ALW

2

C639

0.1U_0402_16V4Z

1

+3VALW

1 1

U43

8

D

7

D

6

D

5

D

SI4800DY_SO8

1

C633
10U_1206_16V4Z

2

S
S
S
G

+3V

1

2

12

R341

1M_0402_1%@

C609
1U_0805_25V4Z

100K_0402_5%

1 2

13

D

S

R340

SYSON#

2

G

Q24
2N7002_SOT23

VSB

+5VALW

1

2

8
7
6
5

+5VALW TO +5VS

+5VS

U45

1

S

D

2

S

D

3

S

D

4

G

D

SI4800DY_SO8

C653

4.7U_0805_10V4Z

1

C647

4.7U_0805_10V4Z

2

5VS_GATE

1

C646
1U_0805_25V4Z

2

+3VALW TO +3VS

+3VS

2 2

+3VALW

U11

8

S

D

7

S

D

6

S

D

5

G

D

SI4800DY_SO8

1

C196
10U_1206_16V4Z

2

1
2
3
4

2

1

1

C194
10U_1206_16V4Z

2

5VS_GATE

C180

0.1U_0402_16V4Z

1

2

12

R155

1M_0402_1%@

C190
1U_0805_25V4Z

100K_0402_5%

1 2

13

D

S

R161

SUSP

2

G

Q12
2N7002_SOT23

VSB

+1.5VALW

8
7
6
5

1

2

+1.5VALW TO +1.5VS

+1.5VS

U17

1

S

D

2

S

D

3

S

D

4

G

D

SI4800DY_SO8

C228

4.7U_0805_10V4Z

1

C230

4.7U_0805_10V4Z

2

5VS_GATE

1

C229
1U_0805_25V4Z

2

+3V

D

S

D

S

+1.5VS

D

S

1 2
13

1 2
13

1 2
13

R339
470_0402_5%

SYSON#

2

G

Q23

2N7002_SOT23

R156
470_0402_5%

2

G

Q13

2N7002_SOT23

R200
470_0402_5%

SUSP

2

G

Q17

2N7002_SOT23

SUSP#15,33,35

+1.8VS

D

S

D

S

SUSP49

DTC115EKA_SOT23
Q25

1 2
13

+5VS+3VS

1 2
13

R169
470_0402_5%

SUSP

2

G

Q14

2N7002_SOT23

R609

470_0402_5%

SUSPSUSP

2

G

Q41

2N7002_SOT23

SUSP

+5VALW

R343
10K_0402_5%

1 2
13

100K

2

100K

3 3

+5VALW

+1.8V

R631

+1.8V

U12

8
7
6
5

1

4 4

2

1

S

D

2

S

D

3

S

D

4

G

D

SI4800DY_SO8

C193

4.7U_0805_10V4Z

+1.8VS

1

C192

4.7U_0805_10V4Z

2

5VS_GATE

A

1

C191
1U_0805_25V4Z

2

+1.8V TO +1.8VS (DDR2)

PROPRIETARY NOTE

B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

1 2
13

D

S

0304

470_0402_5%

SYSON#

2

G

Q46

2N7002_SOT23

Title

Size Document Number Rev

B

D

Date: Sheet

SYSON#37

SYSON33,37,48

DTC115EKA_SOT23
Q22

Compal Electronics, Inc.

POWER CONTROL CKT

SYSON#

SYSON

2

EFL50 LA-2761

100K

100K

E

R344
10K_0402_5%

1 2
13

40 51W ednesday, April 20, 2005

0.2

of

5

CF1

CF8

SMD40M80

SMD40M80

1

CF6
SMD40M80

D D

CF17
PAD_C197

FD3
FIDUCAL

C C

B B

1

CF5
SMD40M80

1

1

CF18
PAD_C197

1

1

FD6
FIDUCAL

1

1

VSB

U15B

5

+IN

7

OUT

6

-IN

LM358A_SO8

CF14
SMD40M80

1

CF4
SMD40M80

1

FD1
FIDUCAL

1

CF16
SMD40M80

1

CF13
SMD40M80

1

FD4
FIDUCAL

1

CF15
SMD40M80

1

CF7
SMD40M80

1

CF21
PAD_C197

1

FD2
FIDUCAL

1

CF11
PAD_181X138

1

PCEI_GTX_C_MRX_P18,15
PCEI_GTX_C_MRX_N18,15

PCIE_MTX_C_GRX_P08,15
PCIE_MTX_C_GRX_N08,15

PCIE_MTX_C_GRX_P18,15
PCIE_MTX_C_GRX_N18,15

PCIE_MTX_C_GRX_P28,15
PCIE_MTX_C_GRX_N28,15

PCIE_MTX_C_GRX_P38,15
PCIE_MTX_C_GRX_N38,15

PLTRST_VGA#15,18
PLT_RST#6,16,18,20,32,33

CF2
SMD40M80

1

CF9
SMD40M80

1

CF22
PAD_C197

1

FD5
FIDUCAL

1

CF12
PAD_181X138

1

CF3
SMD40M80

1

CF10
SMD40M80

1

PCEI_GTX_C_MRX_P1
PCEI_GTX_C_MRX_N1

PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0

PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1

PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2

PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3

PLT_RST#

4

H1

H_S354D118

1

H21

H_S354D118

1

H6

H_C394BC217D177

1

C427

R412 0_0402_5%

1 2

R410 0_0402_5%

1 2

H23

H_S354D118

H7

H_S354D118

H13

H_C394BC217D177

0.1U_0402_16V4Z

C433 0.1U_0402_16V4Z

RP1

14
23

0_0404_4P2R_5%

RP2

14
23

0_0404_4P2R_5%

RP3

14
23

0_0404_4P2R_5%

RP4

14
23

0_0404_4P2R_5%

@

1.2K_0402_5%

1

1

1

SDVOB_INT+
SDVOB_INT-

H20

H_S354D118

H14

H_S354D118

H10

H_C394BC217D177

PCIE_MTX_C_GRX_P0-R
PCIE_MTX_C_GRX_N0-R

PCIE_MTX_C_GRX_P1-R
PCIE_MTX_C_GRX_N1-R

PCIE_MTX_C_GRX_P2-R
PCIE_MTX_C_GRX_N2-R

PCIE_MTX_C_GRX_P3-R
PCIE_MTX_C_GRX_N3-R

CH_VSWING

12

R418

10K_0402_5%

1

1

1

R415

H19

H_S354D118

1

H2

H_C276D173

1

H11

H_C394BC217D177

1

AS
CH_RST#PLTRST_VGA#

12

R416
10K_0402_5%

1 2

3

H18

H_S354D118

1

H5

H_C276D173

1

H3

H_S433D118

1

H16

H_C315D165

1

H15

H_C315D315N

1

H9

H_R551X350D165

1

H17

H_C315D165

0307

H4

H_O335X236D256X157

H8

H_S354D165

DVI CONTROLLER

+3VS

+2.5VS

1

28

21

DVDD12DVDD

48

TVDD15TVDD

AVDD36AVDD42AVDD

AVDD_PLL

HPDET

SC_DDC
SD_DDC

SC_PROM
SD_PROM

NC

NC

6

35

34

U30

32
33

37
38

40
41

43
44

46
47

3
2

25
27

26

SDVOB_INT+
SDVOB_INT-

SDVOB_R+
SDVOB_R-

SDVOB_G+
SDVOB_G-

SDVOB_B+
SDVOB_B-

SDVOB_CLK+
SDVOB_CLK-

AS
RESET#
VSWING

ATPG
SCEN

DGND7DGND30AGND31AGND39AGND45TGND18TGND24AGND_PLL

1

1

1

+2.5VS

13

TLC#

14

TLC

16

TDC0#

17

TDC0

19

TDC1#

20

TDC1

22

TDC2#

23

TDC2

29
11

10
9

8
5

SPD

4

SPC

CH7307C_LQFP48

GM@

H12

H_R354X348D118

1

H22

H_S429D157

1

D_DVI_TXC­D_DVI_TXC+
D_DVI_TXD0­D_DVI_TXD0+
D_DVI_TXD1­D_DVI_TXD1+
D_DVI_TXD2­D_DVI_TXD2+

DVI_DET
DVI_SCLK

DVI_SDATA

SDVO_SDAT
SDVO_SCLK

SDVO_SDAT
SDVO_SCLK

2

Chip_Name Labe l _Name

EXP_TXP0/SDVOB_RED

EXP_TXN0/SDVOB_RED#

EXP_TXP1/SDVOB_GREEN

EXP_TXN1/SDVOB_GREEN#

EXP_TXP2/SDVOB_BLUE

EXP_TXN2/SDVOB_BLUE#

EXP_TXP3/SDVOB_CLKP

EXP_TXN3/SDVOB_CLKN

EXP_RXP1/SDVO_INT

EXP_RXN1/SDVO_INT#

D_DVI_TXC­D_DVI_TXC+

D_DVI_TXD0-

D_DVI_TXD0+

D_DVI_TXD1-

D_DVI_TXD1+

D_DVI_TXD2-

D_DVI_TXD2+

1 4
2 3

0_0404_4P2R_5%

1 4
2 3

0_0404_4P2R_5%

1 4
2 3

0_0404_4P2R_5%

1 4
2 3

0_0404_4P2R_5%

DVI_DET 15,38
DVI_SCLK 15,38

DVI_SDATA 15,38

R116 5.6K_0402_5%

1 2

R113 5.6K_0402_5%

1 2

SDVO_SDAT 8,15
SDVO_SCLK 8 ,1 5

RP8

RP7

RP6

RP5

PCIE_MTX_C_GRX_P0

PCIE_MTX_C_GRX_N0

PCIE_MTX_C_GRX_P1

PCIE_MTX_C_GRX_N1

PCIE_MTX_C_GRX_P2

PCIE_MTX_C_GRX_N2

PCIE_MTX_C_GRX_P3

PCIE_MTX_C_GRX_N3

PCEI_GTX_C_MRX_P1

PCEI_GTX_C_MRX_N1

D_DVI_TXC- 38
D_DVI_TXC+ 38

D_DVI_TXD0- 38
D_DVI_TXD0+ 38

D_DVI_TXD1- 38
D_DVI_TXD1+ 38

D_DVI_TXD2- 38
D_DVI_TXD2+ 38

+2.5VS

DVI_TXC­DVI_TXC+

DVI_TXD0­DVI_TXD0+

DVI_TXD1­DVI_TXD1+

DVI_TXD2­DVI_TXD2+

+2.5VS

12

R413
10K_0402_5%

W=20 mils

12

R414

10K_0402_5%@

DVI_TXC- 15
DVI_TXC+ 15

DVI_TXD0- 15
DVI_TXD0+ 15

DVI_TXD1- 15
DVI_TXD1+ 15

DVI_TXD2- 15
DVI_TXD2+ 15

AS

1

+3VALW

1 2

C360 0.1U_0402_16V4Z

13

OE#

I12O

A A

SN74LVC125APWLE_TSSOP14

1

14

P

OE#

I2O
G

7

SN74LVC125APWLE_TSSOP14

U22D

11

5

U22A

3

+3V

14

U34F

P

13

O12I

G

SN74LVC14APWLE_TSSOP14

7

+1.5VS +3VS

+1.5VS +3VS

+1.5VS +3VS

+1.5VS +1.8V

+5VS +1.8V

+5VS +1.8V

+5VS +1.8V

+5VS +1.8V

4

C674 1000P_0603_50V8J@

1 2

C676 1000P_0603_50V8J@

1 2

C678 1000P_0603_50V8J@

1 2

C680 1000P_0603_50V8J@

1 2

C681 1000P_0603_50V8J@

1 2

C682 1000P_0603_50V8J@

1 2

C683 1000P_0603_50V8J@

1 2

C684 1000P_0603_50V8J@

1 2

+5VS +3VS

+5VS +3VS

+5VS +3VS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

C675 1000P_0603_50V8J@

1 2

C677 1000P_0603_50V8J@

1 2

C679 1000P_0603_50V8J@

1 2

For EMI

DVI_DVDD_2.5V

C471

1

2

1

2

1

C106

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Title

Screws and CH7307

Size Docum ent Number Rev

2

Date: Sheet

C105

0.1U_0402_16V4Z

DVI_AVDD_3V

C472

0.1U_0402_16V4Z

Compal Electronics, Inc.

EFL50 LA-2761

C115
10U_1206_16V4Z

C473
10U_1206_16V4Z

41 51Wednesday, April 20, 2005

+2.5VS

+3VS

0.2

of

A

PJP3

1

2

1

2

BATT+

51ON#39

PR26

1 2

300_0603_5%

PJP4

PAD-OPEN 3x3m

PJP6

1 2

PAD-OPEN 3x3m

PJP8

1 2

PAD-OPEN 3x3m

PJP10

1 2

PAD-OPEN 3x3m

1

2

1

2

PR27

1 2

300_0603_5%

21

1000P_0603_50V7K

PD3

RB751V_SOD323

CHGRTCP

PR14

100K_0603_5%

PR17

1 2

RTCVREF

3.3V

12

PC14
10U_0805_10V4Z

+1.5VALW+1.5VALWP

+5VALW

+3VALW

+1.05VS

12

12

22K_0603_5%

PU2

3

+0.9VP

ADPIN

PL1

1 2

FBM-L11-453215-900LMA60T_2P

12

PR11

33_1206_5%

PQ1

TP0610K_SOT23

13

2

12

PR21
200_0805_5%

12

PC13
1U_0805_25V4Z

PJP7

PAD-OPEN 3x3m

PC1

12

OUT

GND

+1.8VP

12

12

PC2

100P_0603_50V8J

PC7

0.22U_1206_25V7K

2

IN

1

G920AT24U_SOT89

PJP5

1 2

PAD-OPEN 3x3m

1 2

(0.3A,40mils ,Via NO.= 2)

PJP9

+2.5VP +2.5VS

1 2

PAD-OPEN 3x3m

(0.3A,40mils ,Via NO.= 2)

ADIN

12

PC3

PC4

1000P_0603_50V7K

100P_0603_50V8J

VIN

PD2
1N4148_SOD80

1 2
12

12

PC8

0.1U_0805_25V7K

+1.8V

+0.9VS

VS

3

G

4

G

5

G

SINGATRON 2DC-S026-I07
PCN1

3
4
5

CHGRTC

G

G

G

SINGA 2DC-S026-B07_3P

1 1

2 2

3 3

(2.5A,100mils ,Via NO.=5) (6A,240mils ,Via NO.= 12)

+5VALWP

(5A,200mils ,Via NO.= 10)

+3VALWP

4 4

(4.5A,180mils ,Via NO.= 9)

+1.05VP

(2A,80mils ,Via NO.= 4)

A

B

PD26

SBM1040-13_POWERMITE3

2
3

2200P_0603_50V7K

MAINPW O N17,40,44,45

B

C

PR170

VIN

PR6

20K_0603_1%

VIN

12

PR3

84.5K_0603_1%

PR5

1 2

22K_0603_5%

12

PD4

1N4148_SOD80

VL

12

12

12

VIN

1

12

PC5

PD5 RB751V_SOD323

ACON43

PD6 RB751V_SOD323

1 2

10K_0603_5%

12

PC6
1000P_0603_16V7K

10K_0603_5%

ACOFF33,43

PR18

1 2

10K_0603_5%

0.1U_0603_16V7K

PR8

1 2

1 2

1 2

Precharge detector

AC ADAPTOR

14.04 13.70 13.40

12.90 12.60 12.40

PC139

<BOM Structu re>

PR1

1 2

1M_0603_1%

VS

8

PU1A

3

P

+

O

2

-

G

LM393M_SO8

4

12

PR9
1K_1206_5%

PR10
1K_1206_5%

PR12
1K_1206_5%

PR15

1 2

1K_1206_5%

DTC115EUA_SC70

PC11

1 2

0.01U_0603_16V7K

1

RLZ4.3B_LL34

RTCVREF

3.3V

PR167

PQ34

2

7

O

12

1000P_0603_50V7K

VIN

PZD1

12

12

PR168

100K_0402_5%

13

DTC115EUA_SC70

PR19

12

1.5M_0603_5%

8

PU1B

5

P

+

@66.5K_0603_1%

6

-

G

LM393M_SO8

4

12

PC12

12

PR2
10K_0603_5%

12

100K_0402_5%

PQ33

2

PR24

1 2

RTCVREF

12

2
12

13

PR23

34K_0603_1%

1 2

1 2

PACIN

PR7
10K_0603_5%

TP0610K_SOT23

13

PR169
100K_0402_5%

12

PR25

137K_0603_1%

13

D

PQ2

2

G

2N7002_SOT23

S

PR4
0_0603_5%

Vin Detector

High 18.764 17.901 17.063
Low 17.745 16.903 16.038

PQ35

12

12

634K_0603_1%

13

PR20
330K_0603_1%

PR22

PQ3
DTC115EUA_SC70

2

D

ACIN 33

PACIN 43

B+

12

PC10
1000P_0603_50V8J

PR28

12

47K_0603_5%

PACIN

+5VALWP

Precharge detector

BATTERY

5.85 5.74 5.64

4.74 4.65 4.60

THIS SHEET OF EN GINE ERI NG DR AWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION I T CONTA INS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.

C

Compal Electronics, Inc.

Title

DCIN & DETECTOR

Size Document Number Rev

B

Date: Sheet of

EFL50 LA-2761 0.1

D

42 51Wednesday, April 20, 2005

A

P2

B

C

D

PC22

PR40

1 2

PR41

1 2

10K_0603_1%

PR186

@0_0402_5%

1 2

@0_0402_5%

Iadp=0~2.84A

PR29

0.02_2512_1%

PR36

12

10K_0603_1%

PR183

1 2

1 2

MB39A126

B

0_0402_5%

PR181

1 2

0_0402_5%

PR45
10K_0603_1%

1 2

12

10K_0603_1%

12

12

PR182
@0_0402_5%

PR53

2.2K_0603_5%

PU3

1

-INC2

2

OUTC2

3

+INE2

4

-INE2

5

FB2

6

VREF

7

FB1

8

-INE1

9

+INE1

10

OUTC1

11

OUTD

12

-INC1

MB3887_SSOP24

1

0

B+

+INC2

GND

CS

VCC(o)

OUT

VH

VCC

RT

-INE3

FB3

CTL

+INC1

PR49

150K_0603_0.1%

VS

PC32

8

PU4A

3

P

+

2

-

G

LM358A_SO8

4

1 2

24

23

22

21

20

PC23

1 2

19

0.1U_0603_25V7K

18

1 2

17

68K_0402_1%

16

1 2

15

14

13

12

12

0.1U_0603_50V4Z

PR54

105K_0603_0.5%

PC17

PL2

FBM-L11-453215-900LMA60T_2P

PR42

12

PC15

4.7UF_1206_25V

12

PR34
0_0603_5%

PC19 220P_0402_25V8K

1 2

PC20

1 2

0.1U_0603_25V7K

PC26 0.1UF_0805_25V

1 2

PR46

1 2

47K_0402_1%

PC27
1500P_0603_50V7K

12

PC148 @10P_0402_25V8K

PR184

1 2

@0_0402_5%

MB39A126VREF_MB39A126

4.2V

VMB

12

PR51
340K_0603_1%

12

PR52
187K_0603_1%

12

12

PC33

THIS SHEET OF EN GINE ERI NG DR AWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION I T CONTA INS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.

0.01U_0402_25V7K

C

2200P_0603_50V7K

12

PC16

4.7UF_1206_25V

PR192

1 2

FSTCHG 33

12

PR48
47K_0603_1%

300K_0603_0.1%

2.2_0402_5%

PR50

1 2

7

0

PC18

0.1U_0805_25V7K

1 2

36

578

PQ7

10U_SIQB125-100A_4.5A_20%

1 2

PD9

PD24

2 1

2 1

SKS30-04AT_TSMA

SKS30-04AT_TSMA

12

PC31
22P_0603_50V8J

PU4B

5

+

6

-

LM358A_SO8

B++

PQ6
AO4407_SO8

1
2
3 6

8
7

5

4

ACOFF#

PR32

1 2

10K_0603_5%

PR33

1 2

47K_0603_5%

241

13

PQ8

AO4407_SO8

LXCHRG

DTC115EUA_SC70

PD8

1 2

2

1SS355_SOD323

CC=0.5~3.3A

PL3

CV=12.6V(6 OR 9 CELLS LI-ION)

PR44

1 2

0.02_2512_1%

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

CHARGER

EFL50 LA-2761 0.1

D

12

PC29

4.7UF_1206_25V

PC30

VIN

ACOFF 33,42

BATT+

12

4.7UF_1206_25V

43 51W ednesday, April 20, 2005

12

PR38

4700P_0603_50V7K

12

@0_0402_5%

2200P_0603_50V7K

PC24

0.1U_0603_25V7K

12

12

P3

1 2

PC25

1 2

PC28

0.1U_0402_16V7K

PR185

PQ4

AO4407_SO8

PQ38

DTA144EUA_SC70

47K

2

47K

13

PQ37
DTC115EUA_SC70

ACOFF#

8
7

5

0.1U_0603_25V7K

1 3

PD7

1 2

1SS355_SOD323

1 2

VIN

1 1

12

PR30
47K_0402_5%

2

13

D

PQ36

2

G

2 2

3 3

2N7002_SOT23

S

PACIN42

ACON42

4

PC140

PR37
10K_0603_5%

1
2
36

12

12

12

13

D

2

G

S

1
2
3 6

PR31
200K_0603_1%

0.1U_0603_25V7K

PR35
150K_0603_5%

PQ9
2N7002_SOT23

PQ5

AO4407_SO8

8
7

5

4

ADP_I33

12

12

PC21

IREF33

PR39

10K_0603_1%

VREF_MB39A126

PR43

1 2

133K_0603_1%

100K_0603_1%

34K_0603_1%

PR187

1 2

PR47

IREF=0.9323Icharge
IREF=0.466~3.1V FOR 6 CELL

FOR 9 CELL

BATT_OVP33

4 4

OVP voltage : LI

6 CELL : 13.24V--> BATT_OVP= 2.2V

(BAT_OVP=0.124 *VMB)

A

A

B+

B

C

D

PL4
FBM-L18-453215-900LMA90T_1812

1 2

1 1

2 2

B+++

12

PC36

2200P_0402_50V7K

12

PC37

4.7U_1206_25V6K

5HG

12

PL6
SIL104R-100

8
7
6
5

G2
D1/S2/K
D1/S2/K
D1/S2/K

AO4912_SO8

PQ11

S1/A

D2
D2

G1

+5VALWP

1

PR68

+

1 2

10.2K_0402_1%

@

PC48

2

150U_D_6.3VM

3 3

1 2

PR71

0_0402_5%

VS

PZD4

1 2

RLZ5.1B_LL34

+3.3V Ipeak = 6.66A ~ 10A

1
2
3
4

1 2

47K_0402_5%

PC34

0.1U_0603_50V4Z

1 2

PR57

0_0603_5%

1 2

PR72

1 2

DL5

LX5

PR172

100K_0603_5%

12

DH5

PC54

0.047U_0603_16V7K

PR55
0_0603_5%

1 2

PR173

1 2

47K_0402_5%

BST5A

1 2

1 2

12

PC141

0.047U_0603_16V7K

PC44

PR62
0_0402_5%

2VREF_1999

PR65

0_0402_5%

12

3

1

PR56

4.7_1206_5%

VL

PC43

12

4.7U_0805_10V4Z

14

BST5

16

DH5

15

LX5

19

DL5

21

OUT5

9

FB5

1

N.C.

6

SHDN#

4

ON5

3

ON3

12

SKIP#

8

REF

PC50

0.22U_0603_10V7K

2

PD10
CHP202U_SC70

B+++

12

12

PR171

12

MAX1999EEI_QSOP28

1U_1206_25V7K

18

LD05

GND

23

20

PU5

V+

PC46

12

25

13

TON

LDO3

@4.7_1206_5%

0.1U_0603_50V4Z

12

PC55

4.7U_0805_10V4Z

VL

1 2

17

ILIM3

VCC

ILIM5
BST3

OUT3

PGOOD

PRO#

10

1 2

PR59

47_0402_5%

12

PC47

5

11
28

26

DH3

24

DL3

27

LX3

22
7

FB3

2

PR74
0_0402_5%

12

PC41

0.1U_0603_16V7K

2VREF_1999

1U_0805_16V7K

SPOK45

PR67

1 2

PR60

1 2

BST3BBST5B

1 2

200K_0402_1%

1 2

499K_0402_1%

PR69

200K_0402_1%

PR63

499K_0402_1%

0.1U_0603_50V4Z

1 2

PR58
0_0603_5%

1 2

BST3A

PC38

DH3

B+++

12

PC42

0_0603_5%

12

PC40

2200P_0402_50V7K

4.7U_1206_25V6K

PR64

1 2

DL3

PQ10

1

D2

2

D2

3

G1

4

S1/A

AO4912_SO8

3HG

LX3

1 2

1 2

PR70

PR73

D1/S2/K
D1/S2/K
D1/S2/K

3.57K_0402_1%@

0_0402_5%

8

G2

7
6
5

12

PL5
SIL104R-100

1

+

PC53
150U_D_6.3VM

2

+5V Ipeak = 6.66A ~ 10A

+3VALWP

MAINPWON 17 ,40,42,45

12

PC51
1U_0603_16V6M

4 4

THIS SHEET OF EN GINE ERI NG DR AWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION I T CONTA INS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

A

B

INC.

C

Compal Electronics, Inc.

Title

5V/3.3V/12V

Size Document Number Rev

B

Date: Sheet of

EFL50 LA-2761 0.1

D

44 51Wednesday, April 20, 2005

A

B

C

D

VMB

PJP11

5

BATT+

1 1

TS

SMC

7

SMD

G

6

GND

G

P_SUYIN_200275MR005G179ZL

TSA

4

EC_SMC1

3

EC_SMD1

2
1

1

PD15

1

PD16

12

PR77

100_0603_1%

12

PR78

100_0603_1%

12

PR86
1K_0603_1%

PR84

1 2

@BAS40-04_SOT23

1

6.49K_0603_1%

3

12

PC152
1000P_0603_50V7K

12

+3VALWP

PL7

1 2

FBM-L18-453215-900LMA90T_1812

PC56
1000P_0603_50V7K

12

PC57

0.01U_0603_50V7K

BATT+

PC59

1000P_0402_50V7K

2

2

2 2

3

@BAS40-04_SOT23

2

@BAS40-04_SOT23

3

PD14

BATT_TEMP 33

EC_SMB_CK1 33,35

+3VALWP

EC_SMB_DA1 33,35

PH1 under CPU botten side :

CPU thermal protection at 80 degree C
Recovery at 44(45) degree C

PR85

17.8K_0603_1%

12

VL

PR83
154K_0603_1%

TM_REF1

12

12

PC58

0.1U_0603_50V4Z

12

1 2

12

PH1
100K_0603_1%_TH11-4H104FT

PC60

12

1U_0805_50V4Z

3

+

2

-

PR87

100K_0603_1%

PR88
100K_0603_1%

VS

PR81

1 2

442K_0603_1%

8

PU6A

P

O

G

LM393M_SO8

4

12

1

VL

VL

PR80
150K_0603_1%

1 2

MAINPWON 17 ,40,42,44

PQ40

TP0610K_SOT23

B+

12

PR176

100K_0603_5%

13

D

S

PR180

1 2

22K_0603_5%

VL

3 3

SPOK44

PR175
100K_0603_1%

1 2

0_0402_5%

1 2

0.1U_0402_16V7K@

PR174

PC142

12

PQ39
2N7002_SOT23

2

G

12

PC143

0.22U_1206_25V7K

13

12

2

VSB

PC144

0.1U_0805_25V7K

8

PU6B

5

P

+

7

O

6

-

G

LM393M_SO8

4

4 4

THIS SHEET OF EN GINE ERI NG DR AWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION I T CONTA INS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

A

B

INC.

C

Compal Electronics, Inc.

Title

BATTERY CONN / OTP/1.2V

Size Document Number Rev

B

Date: Sheet of

EFL50 LA-2761 0.1

D

45 51Wednesday, April 20, 2005

5

+3VS

D D

100K_0402_5% @

PR107

PR92 0_0402_5%
PR93 0_0402_5%
PR95

0_0402_5%

PR96 0_0402_5%
PR98 0_0402_5%
PR99 0_0402_5%

1 2

PR101 0_0402_5%

CPU_VID05
CPU_VID15
CPU_VID25
CPU_VID35
CPU_VID45
CPU_VID55

VGATE6,13,18

PR106

C C

VR_ON33,47

0_0402_5%

1 2

1 2

1 2

13

D

PR115

S

PR117

0_0402_5%

1 2

PR109

200K_0402_1%

1 2

10.7K_0402_1%

5VS1

PR121

100K_0402_1%

PC75 0.22U_0603_16V7K

12

PC77

100P_0402_50V8J

PR111

78.7K_0603_1%

1 2

FB

PR113 100K_0402_1%

PM_STP_CPU#13,18

PQ17

RHU002N06_SOT323

B B

PM_DPRSLPVR18

1 2

2

G

1 2

1

C

PSI#5

2

B

E

3

12

@

PR91 100K_0402_5%

12
12
12
12
12
12

PR108 30.1K_0402_1%

PC73

1 2

270P_0402_50V7K

1 2

13

D

2

G

S

PQ18

@RHU002N06_SOT323

1 2

PR118

20K_0402_1%

PQ20

2

G

PQ23

HMBT2222A_SOT23

4

12

PR90 10_0402_5%

1 2

12

1 2

PC78

27P_0402_50V8J

PR120

10K_0402_1%

1 2
13

D

RHU002N06_SOT323

S

PC68
1U_0603_16V6K

VCC

10
24
23
22
21
20
19
25

4

VCC

5
6
1

12

2
8
9
7

3
18
11

PR89

5VS1

PU7

2.2U_0603_6.3V6K

VCC
D0
D1
D2
D3
D4
D5
VROK
S0
S1
SHDN#
TIME
CCV
TON
REF
ILIM
OFS
SUS
SKIP
GND

MAX1532AETL_TQFN40

12

0_1206_5%

PC67

VDD

V+

BSTM

DHM

LXM

DLM

PGND

CMP
CMN

OAIN+

OAIN-

FB

CCI

BSTS

DHS

LXS

DLS
CSP
CSN

GNDS

+5VS

2

1

30
36
26

DHM1

28
27
29
31
37
38
17
16

FB

15
14

PC74 470P_0402_50V8J

35

DHS1

33
34
32

CSP

40

CSN

39
13

PC69

1 2

12

0.01U_0402_25V7Z

PR94

1 2

OAIN+
OAIN-

3

PC70

2.2_0402_5%

CMP
CMN

PC84

12

0.22U_0603_16V7K

PR116

2.2_0402_5%

1 2

12

0.22U_0603_16V7K

BSTMA

BSTMA

1 2

PR190

1 2

2

3

PR191

2.2_0402_5%

CPUB+

AO4408_SO8

2.2_0402_5%

LXM

AO4410_SO8

DLM

PR110 909_0402_1%

1 2

PD18

1

CHP202U_SC70

LXS

DHM

PQ14

PQ16

5VS1

DHS

AO4408_SO8

PQ19

578

3 6

578

3 6

241

241

578

3 6

578

2

FBM-L11-322513-201LMAT_1210

12

12

PC63

4.7U_1206_25V6K

PR189

1 2

12

PC150

680P_0603_50V8J

12

PC81

4.7U_1206_25V6K

241

PR188

1 2
12

AO4410_SO8

3 6

241

PC149

PQ22

PL8

12

PC64

4.7U_1206_25V6K

0.56UH_ETQP4LR56WFC_21A_20%

12

PC154

2200P_0402_50V7K

PL9

12

4.7_1206_5%

PR100

1 2

100K_0402_1%@

PC71

PR102 909_0402_1%

1 2

0.47U_0603_16V7K

1 2

PR112

3K_0603_1%

1 2

PC76

0.022U_0402_16V7K

CPUB+

12

PC82

4.7U_1206_25V6K

PL10

0.56UH_ETQP4LR56WFC_21A_20%

12

4.7_1206_5%
PR122 909_0402_1%

680P_0603_50V8J

0.47U_0603_16V7K

12

PC155

2200P_0402_50V7K

12

1 2

0_0402_5%

PR119

100K_0402_1%@

12

1 2

PC85

12

PC157

PC156

2200P_0402_50V7K

2200P_0402_50V7K

PR97

1 2

0.001_2512_5%

12

PR103 499_0402_1%

PR114

12

1

12

12

PC158

2200P_0402_50V7K

12

PR104 499_0402_1%

12

PC66

PC159

2200P_0402_50V7K

+CPU_CORE

1 2

PR105

3K_0603_1%

CPU VCC SENSE

B+

1

+

100U_25V_M

2

1 2

PC72

1000P_0402_50V7K

@

Compal Electronics, Inc.

+VCC_H_CORE

EFL50 LA-2761

0.1

of

46 51Wednesday, April 20, 2005

1

OAIN+
OAIN+

PR123 909_0402_1%

1 2

Title

Size Document Number Rev

B

2

Date: Sheet

A A

PC124
1000P_0402_50V7K

12
12

PC125

5

4

1000P_0402_50V7K

3

5

PL18
FBM-L11-322513-151LMAT_1210

1 2

B+

D D

12

PC138

3300P_0402_50V7K

C C

+5VALWP

PR165

4.12K_0402_1%

12

4.7U_0805_6.3V6K

4

PC133

1 2

1 2

12

PC128

0.1U_0603_25V7K

PC127

0.01U_0402_25V7Z
PU8

10

OCSET

2

SS

1

FB

3

VCC

4

GND

MAX8578EUB

12

9

IN

VCCP_HG1 VCCP_HG2

8

DH

VCCP_PHASE

7

LX

5

DL

6

BST

BSTVCCP

PD25

12

1SS355_SOD323

0.1U_0603_25V7K

PC130

4.7U_1206_25V6K

VCCP_LG1

1 2

1 2

PC134

1 2

PC132

@0.1U_0603_16V4Z

1 2

PR161

0_0402_5%

12

4.7_0402_5%
PR162

PR193

4.7_1206_5%

PR159

0_0402_5%

8
7
6
5

1 2

12

3

G2
D1/S2/K
D1/S2/K
D1/S2/K

AO4912_SO8

12

4.7K_0402_1%

12

PR163

+3VS

PQ32

1

D2

2

D2

3

G1

4

S1/A

VCCP_LG2

PL17 1.8U_SIL104R-1R8_9.5A_30%

12

PR166

PR160
750_0402_5%

1 2

1 2

PC135

6800P_0402_25V7K

866_0402_1%

12

PR164

30_0402_5%

PC136

0.1U_0603_25V7K

1 2

2

1

+1.05VP

1

+

PC137

2

220U_D2_4VM_R15

PC153

680P_0603_50V8J

B B

A A

Compal Electronics, Inc.

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

1.5V & 1.8V

Size Docum ent Number Rev

B

Date: Sheet

EFL50 LA-2761

1

of

47 51Wednesday, April 20, 2005

0.1

5

4

3

2

1

+1.8VP O.C.P. =8.1A ~ 10.36A

+1.5VP Current limit = 8.2A ~10.64A

B++++

D D

4.7U_1206_25V6K

4.7U_0805_6.3V6K

5

D8D7D6D

+1.5VALWP

1

C C

B B

+

2

PC104

150U_D_2V18

6.81K_0402_1%

PR140

12

12

1.8U_SIL104R-1R8_9.5A_30%

12

PR155

10K_0402_1%

PC107

0.01U_0402_25V7Z

1 2

12

PR141
0_0402_5%

12

PR133

0_0402_5%@

PL14

S1S2S3G

4

D8D7D6D

S1S2S3G

+5VALWP

5

PQ31
AO4702_SO8

4

PC99

PC101

PQ25
AO4422_SO8

0.1U_0402_16V7K

LX_VGA

12

PC97

0.1U_0603_25V7K

12

PD22

DAP202U_SOT323

PC100

12

2.05K_0402_1%

1 2

PR153

1 2

0_0402_5%

PC123

0.1U_0402_16V7K@

12

2

BST_1.5V-2

1 2

PR135
0_0603_5%

PR136

VSE_1.5V

12

1

3

0.01U_0402_25V7Z

PC103

0.1U_0603_25V7K

PC106

12

12

BST_1.5V-1

6

DH_1.5V

5
4

ISE_1.5V

7

DL_1.5V DL_1.8V

2

3

9

10

8

15
11

12

PR157

71.5K_0402_1%

PR137

0_1206_5%

12

PU9

SOFT1

BOOT1

UGATE1
PHASE1

ISEN1
LGATE1

PGND1

VOUT1
VSEN1
EN1
PG1

OCSET1

12

+5VALWP

PC126

PR156

2.2_0603_5%

14

VIN

GND

1

1 2

28

SOFT2

VCC

BOOT2

UGATE2
PHASE2

ISEN2

LGATE2

PGND2

VOUT2
VSEN2

EN2

PG2/REF

OCSET2

DDR

13

ISL6227CA-T_SSOP28

12

2.2U_0805_10V6K

BST_1.8V-2

PC112

17

12

0.01U_0402_25V7Z

BST_1.8V-1

23

1 2

0_0603_5%

DH_1.8V

24

LX_1.8V

25

ISE_1.8V

22
27

26

VOUT_1.8VVOUT_1.5V

20

VSE_1.8V

19
21
16

18

12

PR148

PR154

1.74K_0402_1%

1 2

PR158

80.6K_0402_1%

PC111

0.1U_0402_16V7K

12

PQ27

AO4702_SO8

1 2

PR152 0_0402_5%

12

PC108

0.1U_0402_16V7K@

5

D8D7D6D

S1S2S3G

4

5

D8D7D6D

S1S2S3G

4

12

PC110

4.7U_1206_25V6K

PQ26
AO4422_SO8

1.8U_SIL104R-1R8_9.5A_30%

1 2

SYSON 33,37,40

1 2

PL15

PR146

0_0402_5%

PR147

0_0402_5%@

12

12

PL13
FBM-L11-322513-151LMAT_1210

12

PC117

0.01U_0402_25V7Z

B+

12

PR143
11K_0402_1%

12

PR142
10K_0402_1%

+1.8VP

PC114

1

+

2

330U_D_3VM

915PM(DISCRETE)

915GM (UMA)

A A

Compal Electronics, Inc.

Title

5

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

4

3

1.5VP

Size Docum ent Number Rev

B

EFL50 LA-2761

2

PR143=11K 1.8VP=1.867V

PR143=10.5K 1.8VP=1.8V

0.1

1

5

D D

4

3

2

1

+3VALWP

PJP12

2

112

C C

JUMP_43X118

+2.5VP

12

PC113

4.7U_1206_25V6K

1 2

10_0603_1%

PR177

1 2

PC145

0.1U_0603_50V4Z

B B

1 2

PC115

4.7U_1206_25V6K

PU11

1

VIN

2

VFB

3

VTT

VTT4REFEN

PGND

AGND

VCCA

AGND

CM8562IS_PSOP8

9

+5VALWP

RTCVREF

8

7

6

PC147

1 2

1U_0603_16V6K

5

PR179

12

12

PR178

200K_0402_1%

1 2

PC146

2200PF_0603_16V7K

13

D

2N7002_SOT23

S

64.9K_0402_1%

PQ41

2

G

SUSP 40

+1.8VP

1

PJ2

1

JUMP_43X118

2

2

12

PC118

10U_1206_6.3V7K

A A

SUSP40

5

4

SUSP

0_0402_5%

1 2

0.1U_0402_16V7K@

PR150

PC122

12

PQ30

13

D

2N7002_SOT23

2

G

S

12

PR149

1.07K_0402_1%

12

PR151

1K_0402_1%

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

12

PC120

0.1U_0402_16V7K

12

PU12

VIN1VCNTL

2

GND

3

VREF

4

VOUT

APL5331KAC-TR_SO8

+0.9VP

PC121
10U_1206_6.3V7K

6
5

NC

7

NC

8

NC

9

TP

+3VALWP

12

PC119
1U_0603_6.3V6M

2

Compal Electronics, Inc.

Title

1.8VP/0.9VP/2.5VP

Size Docum ent Number Rev

B

Date: Sheet

EFL50 LA-2761

1

of

49 51Wednesday, April 20, 2005

0.1

5

4

3

2

1

Version change list (P.I.R. List) Page 1 o f 1 for HW

Reason for change Rev. PG # Modify List VER P haseFixed IssueItem

D D

1

Add C663, C664, C665 For +2.5V (VCC_SYNC)

Add C658, C659, C660,
C661, C662

2

For EMI Solution

0.2 9

0.2

11

Change L43, L44, L45,
L46 Net

3

Improve Audio 0.2

31

4

C C

5

6

7

8

B B

9

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/03/08 2006/03/08

3

Compal Secret Data

Deciphered Date

Title

PIR (HW)

Size Document Number Rev

Custom

EFL50 LA-2761

2

Date: Sheet

50 51Wednesday, April 20, 2005

1

0.2

of

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 1

for PWR

Reason for change Rev. PG# Modify List VER PhaseFixed IssueItem

1

D D

2

3
4

Modify PU8 IC

Modify 1.05VP voltage level

change prechar ge detect point

Modify disable precharge respond time

1. change PU8 from MAX8576 to MAX8578

47

2delete PC132

1. change PR166 from 7.15k to 4.7k ,

47

PC135 from 6800P to 0.047u 0603

1. change PR20 from 412k to 330k

42

1. change PR167/PR168/PR169 from 470k to 100k 42

DVT

DVT

DVT

DVT

5

6

C C

7

PD16 PIN2 AND PIN3 are wrong

for decrease BATT connector EMI

for decrease CPU CORE switching ring effect
and add EMI solution : snubber

8

for decreaseVCCP ripple

add EMI solution 1. add PC152

9

10

11

B B

add EMI s olution in 1.05VP power regulator 47

45 1. modify PD16 schematic,and delete PD16(only reserve)

45

1. add PC151/PC152/PC153 :680PF

DVT

DVT

1. change PR94/PR116 from 0 to 2.2 2.
add PR189//PR188 4.7 1206 ,add PC150/PC149 680P

46

DVT

47 1. change PC137 from 150u 35m to 220u 15m DVT2
45

46

1. add PR190/191:2.2

43

1. add PR192:2.2

47

1. add PL18 FBM L11 add EMI solution

1. add PC153=680PF ,PR193=4.7

DVT2

PVT

PVT

8

9

A A

Title

Size Document Number Rev

5

4

3

2

Date: Sheet

Compal Electronics, Inc.

PIR (PWR)

LA-2511

0.1

of

51 51Wednesday, April 20, 2005

1