Compal LA-2721 Boston, Satellite M55 Schematic

A

1 1

B

C

D

E

Boston

LA-2721 Schematics Document

2 2

Intel Dothan / Alviso GM(PM) / DDR-1 / ICH6-M

(nVIDIA NV44MV / ATi M24C)

Rev:1.0

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

C

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

D

Date: Sheet

Compal Electronics, Inc.

Cover Sheet

Boston LA-2721

下午

E

of

1532005/5/6 11:47:55

1.0

A

B

C

D

E

Compal confidential

File Name : LA-2721

CRT/TV-OUT

1 1

page 15

Fan Conn

page 38

Intel Dothan CPU

page 4,5

H_A#(3..31) H_D#(0..63)

FSB

400 / 533 Mhz

Thermal Se nsor
ADM1032ARM

page 4

Clock Generator
ICS954226

page 14

NV44MV/M24C

VGA Board

page 16

LCD CONN

page 16

Intel Alviso
GM( GML,PM)

PCBGA 1257

page 6,7,8,9,10

DMI

DDR-1

333 Mhz

Signal Channel DDR-1

DDR-SO-DIMM X2

BANK 0, 1, 2, 3

page 11,12,13

Docking
Audio

page 31

AMP & Audio Jack

page 32

MARVELL LAN

2 2

IDSEL:PCI_AD18
GNT#1
REQ#1
IRQG#
IRQH#

Mini PCI
socket

page 29

3 3

page 28

IDSEL: PCI_AD20
GNT#2
REQ#2
IRQA#
IRQB#
IRQC#
IRQD#

1394
Conn.

page 24

88E8036RJ45 CONN
88E8053

page 27

PCI BUS

TI Controller

PCI7411/6411/4510/1510

Slot 0

page 26

5in1 CardReader
Slot

Power On/Off CKT.

page 39

DC/DC Interface CKT.

page 42

Power Circuit DC/DC

4 4

page 44~50

RTC CKT.

page 41

Power OK CKT.

page 41

PCI-E BUS

page 23,24

page 25

SMsC LPC47N217
LPC47N207

page 33,34

FIR

page 38

Intel ICH6-M

mBGA-609

page 17,18,19,20

LPC BUS

ENE KB910

Touch Pad
CONN.

page 36

USB 2.0

USB 2.0

AC-LINK

SATA

PATA

page 35

USB conn x 4

Audio CKT
ALC250-D

Int. KBD

page 36

BIOS

page 37

page 39

BT Conn

MDC

page 36

page 30

page 35

SATA to PATA

88SA8040

page 21

CDROM
Connector

page 22

PATA HDD

conn

page 21

Docking CONN.

*RJ-11 / 45(LED*2)
*COMPOSITE Video Out
*LINE IN / OUT
*PS/2
*Print port
*1394
*USB
*DC JACK

page 39

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

C

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

D

Date: Sheet

Compal Electronics, Inc.

Block Diagrams

Boston LA-2721

下午

E

of

2532005/5/6 11:47:56

1.0

A

Voltage Rails

Power Plane Description

1 1

2 2

VIN
B+
+CPU_CORE
+1.05VS
+DDRVTT 1.25V switched power rail for DDR terminator
+1.5VALW 1.5V always on power rail
+1.5VS
+1.8VS 1.8V switched power rail
+DDRVCC
+2.5VS
+3VALW
+3V
+3VS
+5VALW
+5VS
+5VCD 5V switched power rail for CDROM
+12VALW 12V always on power rail
+RTC V C C RTC power
+5VAMP 5V switched power rail for amplifier O N OFF OFF

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

Adapter power supply (19V)
AC or batte ry power rail for power circuit.
Core voltage for CPU

1.05V switched power rail

1.5V switched power rail

2.5V power rail for DDR

2.5V switched power rail

3.3V always on power rail

3.3V power rail

3.3V switched power rail
5V always on power rail
5V switched power rail

B

S1 S3 S5

N/A N/A N/A

ON OFF
ON OFF
ON OFF OF F
ON
ON OFF OF F
ON OFF OF F
ON
ON
ON
ON
ON
ON

ON ONON

N/AN/AN/A
OFF
OFF

ON*ON

OFF

ON

OFF

OFF
ON ON*

OFF

ON
OFF

OFF

ON

ON*

OFF

OFFON
OFF OFFON
ONON ON*

C

STATE

S0 (Full ON)

S1 (Power On Suspend)

S3 (Suspend to RAM)

SIGNAL

SLP_S1# SLP_S3#

HIGH HIGH HIGH HIGH

LOW

LOW

D

LOW

S4 (Suspend to Disk)

S5 (Soft OFF)

LOW LOW LOW LOW

Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0
1
2
3
4
5
6
7 NC

100K +/- 1%Ra/Rc/Re

Rb / Rd / Rf V min

AD_BID

0

8.2K +/- 1%
18K +/- 1%
33K +/- 1%
56K +/- 1%
100K +/- 1%
200K +/- 1%

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

E

SLP_S4# SLP_S5# +VA LW +V +VS Clock

0 V

HIGH

LOWLOWLOW

ON

HIGHHIGHHIGH

HIGH

HIGH

ON

ON

ON

ON

Vtyp

AD_BID

0 V 0.100 V

0.503 V

0.819 V

ON

ON

ON

OFF

OFF

V

AD_BID

0.538 V

0.875 V

ON ON

ON

OFF

OFF

OFF

max

1.185 V 1.264 V

2.200 V

3.300 V

2.341 V

3.300 V

LOW

OFF

OFF

OFF

BOARD ID Table

External PCI Devices

Device IDSEL # REQ # / GNT # Interrupts

CardBus
1394
Card reader
Mini-PCI

AD20
AD20
AD20
AD18

2
2
2
1

PIRQA/PIRQB/PIRQC/PIRQD
PIRQA/PIRQB/PIRQC/PIRQD
PIRQA/PIRQB/PIRQC/PIRQD
PIRQG/PIRQH

0
1
2
3
4
5
6

Board ID

3 3

7

PCB Revision

0.1

0.2

0.3

1.0

SKU ID Table

EC SM Bus1 address

Device

Smart Battery
EEPROM(24C16/02)

(24C04)

Address Address

1010 000X b
1011 000Xb

EC SM Bus2 address

Device

ADM1032
2'nd Battery
Docking

1001 110X b0001 011X b
1001 011X b
1010 000X b

SKU_ID

0
1
2
3

SKU_ID1

10
10C
10G
10GC

1
Button

0123456

1

5
7

3
Button

8
C
9

D

4
5
6

ICH6M SM Bus address

Device

4 4

Clock Generator
( ICS 952623)

DDR DIMM0

DDR DIMM1

A

Address

1101 001Xb

1001 000Xb
1001 001Xb

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

C

7

Compal Secret Data

Deciphered Date

D

7
Button

0
23
4
6

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Notes

Boston LA-2721

下午

E

of

3532005/5/6 11:47:55

1.0

5

H_A#[3..31]<6>

D D

H_REQ#[0..4]<6>

C C

H_RS#[0..2]<6>

B B

A A

H_A#[3..31]

H_REQ#[0..4]

H_RS#[0..2]

H_ADSTB#0<6>
H_ADSTB#1<6>

CLK_CPU_BCLK<14>
CLK_CPU_BCLK#<14>

H_ADS#<6>
H_BNR#<6>

H_BPRI#<6>

H_BR0#<6>

H_DEFER#<6>

H_DRDY#<6>

H_HIT#<6>
H_HITM#<6>

H_LOCK#<6>

H_CPURST#<6>

H_TRDY#<6>

H_DBSY#<6>
H_DPSLP#<18>
H_DPRSTP#<18>
H_DPWR#<6>

H_PWRGOOD<18>
H_CPUSLP#<6,18>

H_THERMTRIP#<6,18>

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_IERR#
H_CPURST#

H_RS#0
H_RS#1
H_RS#2

ITP_DBRRESET#

PRO_CHOT#
H_PWRGOOD

H_CPUSLP#
ITP_TCK
ITP_TDI
ITP_TDO
TEST1
TEST2
ITP_TMS
ITP_TRST#

THERMDA
THERMDC

AA3
AA2

AF4
AC4
AC7
AC3
AD3
AE4
AD2
AB4
AC6
AD5
AE2
AD6
AF3
AE1
AF1

AE5

A16
A15

B15
B14

B11

C19
A10
B10
B17

A13
C12
A12

F23
C11
B13

B18
A18
C17

W1
W2

M3

M2
G1

4

JP23A

P4

A3#

U4

A4#

V3

A5#

R3

A6#

V2

A7#
A8#

T4

A9#
A10#

Y4

A11#

Y1

A12#

U1

A13#
A14#

Y3

A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#

ADDR GROUP

A25#
A26#
A27#
A28#
A29#
A30#
A31#

R2

REQ0#

P3

REQ1#

T2

REQ2#

P1

REQ3#

T1

REQ4#

U3

ADSTB0#
ADSTB1#

ITP_CLK0
ITP_CLK1

BCLK0

HOST CLK

BCLK1

N2

ADS#

L1

BNR#

J3

BPRI#

N4

BR0#

L4

DEFER#

H2

DRDY#

K3

HIT#

K4
A4

J2

H1
K1
L2

C8
B8
A9
C9

A7
B7

E4
A6

C5

CONTROL GROUP

HITM#
IERR#
LOCK#
RESET#

RS0#
RS1#
RS2#
TRDY#

BPM0#
BPM1#
BPM2#
BPM3#

DBR#
DBSY#
DPSLP#
DPRSTP#
DPWR#
PRDY#
PREQ#
PROCHOT#

PWRGOOD
SLP#
TCK
TDI
TDO

TYCO_1612365-1_Dothan

TEST1
TEST2
TMS
TRST#

THERMDA
THERMDC
THERMTRIP#

Dothan

MISC

THERMAL
DIODE

DATA GROUP

LEGACY CPU

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#

D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DINV0#
DINV1#
DINV2#
DINV3#

DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#

A20M#

FERR#

IGNNE#

INIT#

LINT0
LINT1

STPCLK#

SMI#

A19
A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26

D25
J26
T24
AD20

C23
K24
W25
AE24
C22
L24
W24
AE25

C2
D3
A3
B5
D1
D4

C6
B4

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_A20M#
H_FERR#
H_IGNNE#
H_INIT#
H_INTR

NMI

H_STPCLK#

H_SMI#

3

H_DINV#0 <6>
H_DINV#1 <6>
H_DINV#2 <6>
H_DINV#3 <6>

H_DSTBN#0 <6>
H_DSTBN#1 <6>
H_DSTBN#2 <6>
H_DSTBN#3 <6>
H_DSTBP#0 <6>
H_DSTBP#1 <6>
H_DSTBP#2 <6>
H_DSTBP#3 <6>

H_A20M# <18>
H_FERR# <18>
H_IGNNE# <18>
H_INIT# <18>
H_INTR <18>

H_STPCLK# <18>
H_SMI# <18>

H_D#[0..63]

2200P_0402_50V7K

EC_SMB_CK2<30,35,40>

EC_SMB_DA2<30,35,40>

R614 0_0402_5%

12

2

H_D#[0..63] <6>

1

C553

THERMDA

2

THERMDC

Reserve for debug
C677 close to South Bridge (U13)

H_NMI <18>

Reserve for debug
C675, C678, C679, C681 ~ C686
close to CPU (JP13)

U37

2

D+

3

D-

8

SCLK

7

SDATA

ADM1032ARM_RM8

ITP_TDI
ITP_TDO
H_CPURST#
ITP_TMS
PRO_CHOT#
H_PWRGOOD
H_IERR#

ITP_DBRRESET#

ITP_TRST#

ITP_TCK
TEST1
TEST2

H_SMI#
H_INIT#

NMI
H_A20M#
H_INTR
H_IGNNE#

H_STPCLK#

H_PWRGOOD

H_CPUSLP#

+3VS

1

C552

0.1U_0402_16V4Z

2

1

VDD1

6

ALERT#

4

THERM#

5

GND

R73 150_0402_5%
R74 54.9_0402_1%@
R72 54.9_0402_1%@
R71 39.2_0603_1%
R77 56_0402_5%
R67 200_0402_5%
R69 56_0402_5%

R70 150_0402_5%

R75 680_0402_5%
R76 27.4_0402_1%
R68 1K_0402_5%@
R65 1K_0402_5%@

H_FERR#

C677 220P_0402_50V8J

C678 180P_0402_50V8J@
C679 180P_0402_50V8J@
C675 680P_0402_50V8J
C681 180P_0402_50V8J@
C682 180P_0402_50V8J@
C683 180P_0402_50V8J@
C684 180P_0402_50V8J@
C685 180P_0402_50V8J@
C686 180P_0402_50V8J@

12

12
12
12
12
12
12
12
12
12

1

12

R490

10K_0402_5%@

+1.05VS

12
12
12
12
12
12
12

+3VS

12

12
12
12
12

THERMDA & THERMDC Trace / Space = 10 / 10 mil

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

2

Date: Sheet

Compal Electronics, Inc.

Dothan Processor in mFCPGA479

Boston LA-2721

下午

1

of

4532005/5/6 11:47:59

1.0

5

JP23B

1

2

+1.05VS

C500

VCCSENSE
VSSSENSE

GTL_REF0

COMP0
COMP1
COMP2
COMP3

AE7

VCCSENSE

AF6

VSSSENSE

F26

VCCA0

B1

VCCA1

N1

VCCA2

AC26

VCCA3

P23

VCCQ0

W4

VCCQ1

D10

VCCP

D12

VCCP

D14

VCCP

D16

VCCP

E11

VCCP

E13

VCCP

E15

VCCP

F10

VCCP

F12

VCCP

F14

VCCP

F16

VCCP

K6

VCCP

L5

VCCP

L21

VCCP

M6

VCCP

M22

VCCP

N5

VCCP

N21

VCCP

P6

VCCP

P22

VCCP

R5

VCCP

R21

VCCP

T6

VCCP

T22

VCCP

U21

VCCP

D6

VCC

D8

VCC

D18

VCC

D20

VCC

D22

VCC

E5

VCC

E7

VCC

E9

VCC

E17

VCC

E19

VCC

E21

VCC

F6

VCC

F8

VCC

F18

VCC

E1

PSI#

E2

VID0

F2

VID1

F3

VID2

G3

VID3

G4

VID4

H4

VID5

AD26

GTLREF

C16

BSEL0

C14

BSEL1

P25

COMP0

P26

COMP1

AB2

COMP2

AB1

COMP3

B2

RSVD

C3

RSVD

E26

RSVD

AF7

RSVD

AC1

RSVD

TYCO_1612365-1_Dothan

COMP0
COMP1
COMP2
COMP3

Dothan

R390 54.9_0402_1%@

1 2

R391 54.9_0402_1%@

1 2

+VCCA

D D

1.5V FOR DOTHAN-B

1 2

+1.5VS

R454 0_1206_5%

1

C501

2

0.01U_0402_16V7K

C C

+1.05VS

R388
1K_0402_1%

B B

A A

1 2

R389 2K_0402_1%

10U_0805_6.3V6M

+CPU_CORE

PSI#<50>
CPU_VID0<50>

CPU_VID1<50>
CPU_VID2<50>

12

CPU_VID3<50>
CPU_VID4<50>
CPU_VID5<50>

CPU_BSEL0<14>
CPU_BSEL1<14>

R444 27.4_0402_1%

1 2

R441 54.9_0402_1%

1 2

R392 27.4_0402_1%

1 2

R393 54.9_0402_1%

1 2

TRACE CLOSELY CPU < 0.5'

COMP0, COMP2 layout : Width 18mils and Space 25mils
COMP1, COMP3 layout : Space 25mils

5

4

A2

VSS

A5

VSS

A8

VSS

A11

VSS

A14

VSS

A17

VSS

A20

VSS

A23

VSS

A26

VSS

B3

VSS

B6

VSS

B9

VSS

B12

VSS

B16

VSS

B19

VSS

B22

VSS

B25

VSS

C1

VSS

C4

VSS

C7

VSS

C10

VSS

C13

VSS

C15

VSS

C18

VSS

C21

VSS

C24

VSS

D2

VSS

D5

VSS

D7

VSS

D9

VSS

D11

VSS

D13

VSS

D15

VSS

D17

VSS

D19

VSS

D21

VSS

D23

VSS

D26

VSS

E3

VSS

E6

VSS

E8

VSS

E10

VSS

E12

VSS

E14

VSS

E16

VSS

E18

VSS

E20

VSS

E22

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

E25
F1
F4
F5
F7
F9
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
G23
G26
H3
H5
H21
H25
J1
J4
J6
J22
J24
K2
K5
K21
K23
K26
L3
L6
L22
L25
M1

+1.05VS

1

+

2

150U_D2_6.3VM

POWER, GROUNG, RESERVED SIGNALS AND NC

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

Vcc-core
Decoupling

SPCAP,Polymer
MLCC 0805 X5R

0.1U_0402_16V4Z

1

C72

C431

2

+CPU_CORE

1

+

C38

2

330U_D_2VM

+CPU_CORE

10U_0805_6.3V6M

1

C464

2

+CPU_CORE

10U_0805_6.3V6M

1

C495

2

+CPU_CORE

10U_0805_6.3V6M

1

C436

2

+CPU_CORE

10U_0805_6.3V6M

1

C84

2

+CPU_CORE

10U_0805_6.3V6M

1

C83

2

1

2

0.1U_0402_16V4Z

3

+

C64
330U_D_2VM

10U_0805_6.3V6M

1

C463

2

10U_0805_6.3V6M

1

C475

2

10U_0805_6.3V6M

1

C485

2

10U_0805_6.3V6M

1

C57

2

10U_0805_6.3V6M

1

C54

2

330U_D_2VM

1

+

C43

2

1

1

C498

2

2

10U_0805_6.3V6M

1

1

C479

2

2

10U_0805_6.3V6M

1

1

C462

2

2

10U_0805_6.3V6M

1

1

C80

2

2

10U_0805_6.3V6M

1

1

C82

2

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C497

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C70

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C494

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C56

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C79

2

10U_0805_6.3V6M

C496

C71

C60

C55

C58

1

2

1

2

1

2

1

2

1

2

1

C465

2

10U_0805_6.3V6M

1

C474

2

10U_0805_6.3V6M

1

C435

2

10U_0805_6.3V6M

1

C434

2

10U_0805_6.3V6M

1

C78

2

10U_0805_6.3V6M

1

2

C466

C478

C484

C81

C59

C,uF ESR, mohm ESL,nH

3X330uF 7m ohm/2 3.5nH/2
35X10uF 5m ohm/35 0.6nH/35

1

C67

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C62

2

Compal Secret Data

0.1U_0402_16V4Z

1

C73

2

2005/05/06 2006/05/06

3

1

C65

2

0.1U_0402_16V4Z

Deciphered Date

0.1U_0402_16V4Z

1

C77

C75

2

1

2

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1

C61

C66

2

2

+CPU_CORE

1

C53

2

0.1U_0402_16V4Z

1

JP23C

F20

VCC

F22

VCC

G5

VCC

G21

VCC

H6

VCC

H22

VCC

J5

VCC

J21

VCC

K22

VCC

U5

VCC

V6

VCC

V22

VCC

W5

VCC

W21

VCC

Y6

VCC

Y22
AA5
AA7

AA9
AA11
AA13
AA15
AA17
AA19
AA21

AB6

AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22

AC9
AC11
AC13
AC15
AC17
AC19

AD8
AD10
AD12
AD14
AD16
AD18

AE9
AE11
AE13
AE15
AE17
AE19

AF8
AF10
AF12
AF14
AF16
AF18

M4

M5
M21
M24

N3

N6
N22
N23
N26

P2

P5
P21
P24

R1
R4

R6
R22
R25

T3

T5
T21
T23

TYCO_1612365-1_Dothan

Title

Dothan Processor in mFCPGA479

Size Document Number Rev

Date: Sheet of

Dothan

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

POWER, GROUND

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

Compal Electronics, Inc.

Boston LA-2721

下午

T26

VSS

U2

VSS

U6

VSS

U22

VSS

U24

VSS

V1

VSS

V4

VSS

V5

VSS

V21

VSS

V25

VSS

W3

VSS

W6

VSS

W22

VSS

W23

VSS

W26

VSS

Y2

VSS

Y5

VSS

Y21

VSS

Y24

VSS

AA1

VSS

AA4

VSS

AA6

VSS

AA8

VSS

AA10

VSS

AA12

VSS

AA14

VSS

AA16

VSS

AA18

VSS

AA20

VSS

AA22

VSS

AA25

VSS

AB3

VSS

AB5

VSS

AB7

VSS

AB9

VSS

AB11

VSS

AB13

VSS

AB15

VSS

AB17

VSS

AB19

VSS

AB21

VSS

AB23

VSS

AB26

VSS

AC2

VSS

AC5

VSS

AC8

VSS

AC10

VSS

AC12

VSS

AC14

VSS

AC16

VSS

AC18

VSS

AC21

VSS

AC24

VSS

AD1

VSS

AD4

VSS

AD7

VSS

AD9

VSS

AD11

VSS

AD13

VSS

AD15

VSS

AD17

VSS

AD19

VSS

AD22

VSS

AD25

VSS

AE3

VSS

AE6

VSS

AE8

VSS

AE10

VSS

AE12

VSS

AE14

VSS

AE16

VSS

AE18

VSS

AE20

VSS

AE23

VSS

AE26

VSS

AF2

VSS

AF5

VSS

AF9

VSS

AF11

VSS

AF13

VSS

AF15

VSS

AF17

VSS

AF19

VSS

AF21

VSS

AF24

VSS

5532005/5/6 11:47:54

1

1.0

5

H_RS#[0..2]

H_A#[3..31]<4>
H_REQ#[0..4]<4>

D D

C C

CLK_MCH_BCLK#<14>
CLK_MCH_BCLK<14>

B B

A A

(5mil:15mil) (12mil:10mil)

H_VREF H_XSWING

1

C414

0.1U_0402_16V4Z

2

H_A#[3..31]
H_REQ#[0..4]

H_ADSTB#0<4>
H_ADSTB#1<4>

H_DSTBN#0<4>
H_DSTBN#1<4>
H_DSTBN#2<4>
H_DSTBN#3<4>
H_DSTBP#0<4>
H_DSTBP#1<4>
H_DSTBP#2<4>
H_DSTBP#3<4>
H_DINV#0<4>
H_DINV#1<4>
H_DINV#2<4>
H_DINV#3<4>

H_CPURST#<4>
H_ADS#<4>

H_TRDY#<4>

H_DPWR#<4>
H_DRDY#<4>

H_DEFER#<4>

H_HITM#<4>
H_HIT#<4>
H_LOCK#<4>
H_BR0#<4>
H_BNR#<4>

H_BPRI#<4>

H_DBSY#<4>

H_CPUSLP#<4,18>

+1.05VS

12

R387
100_0603_1%

12

R385
200_0603_1%

5

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

H_RS#[0..2] <4>

U4A

G9

HA3#

C9

HA4#

E9

HA5#

B7

HA6#

A10

HA7#

F9

HA8#

D8

HA9#

B10

HA10#

E10

HA11#

G10

HA12#

D9

HA13#

E11

HA14#

F10

HA15#

G11

HA16#

G13

HA17#

C10

HA18#

C11

HA19#

D11

HA20#

C12

HA21#

B13

HA22#

A12

HA23#

F12

HA24#

G12

HA25#

E12

HA26#

C13

HA27#

B11

HA28#

D13

HA29#

A13

HA30#

F13

HA31#

A11

HPCREQ#

A7

HREQ#0

D7

HREQ#1

B8

HREQ#2

C7

HREQ#3

A8

HREQ#4

B9

HADSTB#0

E13

HADSTB#1

AB1

HCLKN

AB2

HCLKP

G4

HDSTBN#0

K1

HDSTBN#1

R3

HDSTBN#2

V3

HDSTBN#3

G5

HDSTBP#0

K2

HDSTBP#1

R2

HDSTBP#2

W4

HDSTBP#3

H8

HDINV#0

K3

HDINV#1

T7

HDINV#2

U5

HDINV#3

H10

HCPURST#

F8

HADS#

B5

HTRDY#

G6

HDPWR#

F7

HDRDY#

E6

HDEFER#

F6

HEDRDY#

D6

HHITM#

D4

HHIT#

B3

HLOCK#

E7

HBREQ0#

A5

HBNR#

D5

HBPRI#

C6

HDBSY#

G8

HCPUSLP#

A4

HRS0#

C5

HRS1#

B4

HRS2#

Alviso

ALVISO_BGA1257R3PM@

1

C437

0.1U_0402_16V4Z

2

HOST

HXRCOMP
HXSCOMP
HYRCOMP
HYSCOMP

HXSWING
HYSWING

HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#

HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

HVREF

+1.05VS

12

12

R395
221_0603_1%

R394
100_0603_1%

E4
E1
F4
H7
E2
F1
E3
D3
K7
F2
J7
J8
H6
F3
K8
H5
H1
H2
K5
K6
J4
G3
H3
J1
L5
K4
J5
P7
L7
J3
P5
L3
U7
V6
R6
R5
P3
T8
R7
R8
U8
R4
T4
T5
R1
T3
V8
U6
W6
U3
V5
W8
W7
U2
U1
Y5
Y2
V4
Y7
W1
W3
Y3
Y6
W2

J11
C1
C2
T1
L1
D1
P1

4

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_VREF
H_XRCOMP
H_XSCOMP
H_YRCOMP
H_YSCOMP
H_XSWING
H_YSWING

H_D#[0..63]

Reserve for DDR2

+DDRVCC

R54 24.9_0402_1%
R53 54.9_0402_1%
R56 24.9_0402_1%
R55 54.9_0402_1%

1 2
1 2

12
12

H_D#[0..63] <4>

R352 40.2_0402_1%@

1 2

R368 40.2_0402_1%

1 2

@

R384 80.6_0402_1%

1 2

R386 80.6_0402_1%

1 2

+1.05VS

3

DMI_ITX_MRX_N0<19>
DMI_ITX_MRX_N1<19>
DMI_ITX_MRX_N2<19>
DMI_ITX_MRX_N3<19>

DMI_ITX_MRX_P0<19>
DMI_ITX_MRX_P1<19>
DMI_ITX_MRX_P2<19>
DMI_ITX_MRX_P3<19>

DMI_MTX_IRX_N0<19>
DMI_MTX_IRX_N1<19>
DMI_MTX_IRX_N2<19>
DMI_MTX_IRX_N3<19>

DMI_MTX_IRX_P0<19>
DMI_MTX_IRX_P1<19>
DMI_MTX_IRX_P2<19>
DMI_MTX_IRX_P3<19>

DDRA_CLK1<11>
DDRA_CLK2<11>

DDRB_CLK1<12>
DDRB_CLK2<12>

DDRA_CLK1#<11>
DDRA_CLK2#<11>

DDRB_CLK1#<12>
DDRB_CLK2#<12>

DDRA_CKE0<11>
DDRA_CKE1<11>
DDRB_CKE0<12>
DDRB_CKE1<12>

DDRA_SCS#0<11>
DDRA_SCS#1<11>
DDRB_SCS#0<12>
DDRB_SCS#1<12>

(10mil:20mil)

H_XRCOMP & H_YRCOMP Trace / Space = 10 / 20 mil

+1.05VS

12

R399
221_0603_1%

4

H_YSWING

1

C443

0.1U_0402_16V4Z

2

(12mil:10mil)

12

R397
100_0603_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

U4B

DMI_ITX_MRX_N0
DMI_ITX_MRX_N1
DMI_ITX_MRX_N2
DMI_ITX_MRX_N3

DMI_ITX_MRX_P0
DMI_ITX_MRX_P1
DMI_ITX_MRX_P2
DMI_ITX_MRX_P3

DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3

DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3

DDRA_CKE0
DDRA_CKE1
DDRB_CKE0
DDRB_CKE1

DDRA_SCS#0
DDRA_SCS#1
DDRB_SCS#0
DDRB_SCS#1

M_OCDCOMP0
M_OCDCOMP1

M_RCOMPN
M_RCOMPP
SMVREF

M_XSLEW
M_YSELW

+DDRVCC

R398

1K_0402_1%

R396

1K_0402_1%

2005/05/06 2006/05/06

AA31

DMIRXN0

AB35

DMIRXN1

AC31

DMIRXN2

AD35

DMIRXN3

Y31

DMIRXP0

AA35

DMIRXP1

AB31

DMIRXP2

AC35

DMIRXP3

AA33

DMITXN0

AB37

DMITXN1

AC33

DMITXN2

AD37

DMITXN3

Y33

DMITXP0

AA37

DMITXP1

AB33

DMITXP2

AC37

DMITXP3

AM33

SM_CK0

AL1

SM_CK1

AE11

SM_CK2

AJ34

SM_CK3

AF6

SM_CK4

AC10

SM_CK5

AN33

SM_CK0#

AK1

SM_CK1#

AE10

SM_CK2#

AJ33

SM_CK3#

AF5

SM_CK4#

AD10

SM_CK5#

AP21

SM_CKE0

AM21

SM_CKE1

AH21

SM_CKE2

AK21

SM_CKE3

AN16

SM_CS0#

AM14

SM_CS1#

AH15

SM_CS2#

AG16

SM_CS3#

AF22

SM_OCDCOMP0

AF16

SM_OCDCOMP1

AP14

SM_ODT0

AL15

SM_ODT1

AM11

SM_ODT2

AN10

SM_ODT3

AK10

SMRCOMPN

AK11

SMRCOMPP

AF37

SMVREF0

AD1

SMVREF1

AE27

SMXSLEWIN

AE28

SMXSLEWOUT

AF9

SMYSLEWIN

AF10

SMYSLEWOUT

ALVISO_BGA1257

R3PM@

12

0.1U_0402_16V4Z

12

C445

1

2

Compal Secret Data

Deciphered Date

DMIDDR MUXING

DREF_SSCLKP
DREF_SSCLKN

SMVREF

1

C450

0.1U_0402_16V4Z

2

RSVD21
RSVD22

CFG/RSVD

RSVD23
RSVD24
RSVD25
RSVD26
RSVD27

BM_BUSY#

EXT_TS0#
EXT_TS1#

THRMTRIP#

PWROK

RSTIN#

PM

DREF_CLKN

DREF_CLKP

CLK

NC

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8

CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8

NC9
NC10
NC11

2

CLK_DREF_SSC
CLK_DREF_SSC#

CFG0

G16

MCH_CLKSEL1

H13

MCH_CLKSEL0

G14
F16
F15

CFG5

G15

CFG6

E16

CFG7

D17
J16

CFG9

D15
E15
D14

CFG12

E14

CFG13

H12
C14
H15

CFG16 CFG6

J15
H14

CFG18

G22

CFG19

G23
D23
G25
G24
J17
A31
A30
D26
D25

J23

EXT_TS#0

J21

EXT_TS#1

H22

H_THERMTRIP#

F5
AD30
AE29

CLK_DREF_96M#

A24

CLK_DREF_96M

A23

CLK_DREF_SSC

D37

CLK_DREF_SSC#

C37

AP37
AN37
AP36
AP2
AP1
AN1
B1
A2
B37
A36
A37

CFG[2:0]
CFG5
CFG6
CFG7

CFG9

CFG[13:12]

CFG16
(FSB Dynamic
ODT)

CFG18
(VCC Select)

CFG19
(VTT Select)

Title

Size Document Number Rev

Date: Sheet of

1

R32 0_0402_5%VGA@

1 2

R33 0_0402_5%VGA@

1 2

MCH_CLKSEL1 <14>
MCH_CLKSEL0 <14>

CFG0

R378 10K_0402_5%

1 2

CFG5

R371 1K_0402_5%@

1 2

R373 1K_0402_5%@

CFG7
CFG9
CFG12
CFG13
CFG16

1 2

R361 1K_0402_5%@

1 2

R376 1K_0402_5%@

1 2

R382 1K_0402_5%@

1 2

R381 1K_0402_5%@

1 2

R377 1K_0402_5%@

1 2

CFG[17:3]: internal pull-up

CFG18

R46 1K_0402_5%@

CFG19

1 2

R45 1K_0402_5%@

1 2

CFG[19:18]: internal pull-down

PM_BMBUSY# <19>

H_THERMTRIP# <4,18>

VGATE <14,19,50>

PLT_RST# <16,17,19,21,22,24,27,34,35>

CLK_DREF_96M# <14>

CLK_DREF_96M <14>

CLK_DREF_SSC <14>

CLK_DREF_SSC# <14>

EXT_TS#0

R354 10K_0402_5%

EXT_TS#1

1 2

R351 10K_0402_5%

1 2

Refer to sheet 14 for FSB
frequency select
Low = DMI x 2

High = DMI x 4
Low = DDR-II

High = DDR-I
Low = DT/Transportable CPU

High = Mobile CPU
Low = Reverse Lane

High = Normal Operation
00 = Reserved

01 = XOR Mode Enabled
10 = All Z Mode Enabled
11 = Normal Operation (Default)

Low = Disabled
High = Enabled

Low = 1.05V (Default)
High = 1.5V

Low = 1.05V (Default)
High = 1.2V

Compal Electronics, Inc.

Alviso HOST(1/5)
Boston LA-2721

下午

1

+1.5VS

+1.05VS

+2.5VS

+2.5VS

*
*

*

*

*

*

*

*

1.0

6532005/5/6 11:47:58

5

4

3

2

1

DDRA_SDQ[0..63]<11>

DDRA_SDM[0..7]<11>

DDRA_SDQS[0..7]<11>

D D

C C

B B

DDRA_SMA[0..13]<11>

DDRA_SBS0<11>
DDRA_SBS1<11>

DDRA_SCAS#<11>
DDRA_SRAS#<11>

DDRA_SWE#<11>

DDRA_SDQ[0..63]
DDRA_SDM[0..7]
DDRA_SDQS[0..7]
DDRA_SMA[0..13] DDRB_SMA[0..13]

AK15

SA_BS0#

AK16

SA_BS1#

AL21

DDRA_SDM0
DDRA_SDM1
DDRA_SDM2
DDRA_SDM3
DDRA_SDM4
DDRA_SDM5
DDRA_SDM6
DDRA_SDM7

DDRA_SDQS0
DDRA_SDQS1
DDRA_SDQS2
DDRA_SDQS3
DDRA_SDQS4
DDRA_SDQS5
DDRA_SDQS6
DDRA_SDQS7

DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12
DDRA_SMA13 DDRB_SMA13

AJ37

AP35

AL29

AP24

AP9
AP4

AJ2

AD3

AK36
AP33
AN29
AP23

AM8
AM4

AJ1

AE5

AK35
AP34
AN30
AN23

AN8
AM5
AH1

AE4

AL17
AP17
AP18
AM17
AN18
AM18

AL19
AP20
AM19

AL20
AM16
AN20
AM20
AM15

AN15
AP16

AF29

AF28
AP15

SA_BS2#
SA_DM0

SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7

SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13

SA_CAS#
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#

U4C

SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8

SADQ9
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43

DDR MEMORY SYSTEM A

SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63

ALVISO_BGA1257R3PM@

AG35
AH35
AL35
AL37
AH36
AJ35
AK37
AL34
AM36
AN35
AP32
AM31
AM34
AM35
AL32
AM32
AN31
AP31
AN28
AP28
AL30
AM30
AM28
AL28
AP27
AM27
AM23
AM22
AL23
AM24
AN22
AP22
AM9
AL9
AL6
AP7
AP11
AP10
AL7
AM7
AN5
AN6
AN3
AP3
AP6
AM6
AL4
AM3
AK2
AK3
AG2
AG1
AL3
AM2
AH3
AG3
AF3
AE3
AD6
AC4
AF2
AF1
AD4
AD5

DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63

DDRB_SMA[0..13]<12>

DDRB_SBS0<12>
DDRB_SBS1<12>

DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12

DDRB_SCAS#<12>
DDRB_SRAS#<12>

DDRB_SWE#<12>

AJ15
AG17
AG21

AF32
AK34
AK27
AK24

AJ10

AK5
AE7
AB7

AF34
AK32

AJ28
AK23
AM10

AH6
AF8
AB4

AF35
AK33
AK28

AJ23

AL10

AH7
AF7
AB5

AH17
AK17
AH18

AJ18
AK18

AJ19
AK19
AH19

AJ20
AH20

AJ16
AG18
AG20
AG15

AH14
AK14

AF15

AF14
AH16

SB_BS0#
SB_BS1#
SB_BS2#

SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7

SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7

SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13

SB_CAS#
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#

U4D

AE31

SBDQ0

AE32

SBDQ1

AG32

SBDQ2

AG36

SBDQ3

AE34

SBDQ4

AE33

SBDQ5

AF31

SBDQ6

AF30

SBDQ7

AH33

SBDQ8

AH32

SBDQ9

AK31

SBDQ10

AG30

SBDQ11

AG34

SBDQ12

AG33

SBDQ13

AH31

SBDQ14

AJ31

SBDQ15

AK30

SBDQ16

AJ30

SBDQ17

AH29

SBDQ18

AH28

SBDQ19

AK29

SBDQ20

AH30

SBDQ21

AH27

SBDQ22

AG28

SBDQ23

AF24

SBDQ24

AG23

SBDQ25

AJ22

SBDQ26

AK22

SBDQ27

AH24

SBDQ28

AH23

SBDQ29

AG22

SBDQ30

AJ21

SBDQ31

AG10

SBDQ32

AG9

SBDQ33

AG8

SBDQ34

AH8

SBDQ35

AH11

SBDQ36

AH10

SBDQ37

AJ9

SBDQ38

AK9

SBDQ39

AJ7

SBDQ40

AK6

SBDQ41

AJ4

SBDQ42
SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63

AH5
AK8
AJ8
AJ5
AK4
AG5
AG4
AD8
AD9
AH4
AG6
AE8
AD7
AC5
AB8
AB6
AA8
AC8
AC7
AA4
AA5

DDR SYSTEM MEMORY B

ALVISO_BGA1257R3PM@

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

2

Date: Sheet of

Compal Electronics, Inc.

Alviso DDR(2/5)
Boston LA-2721

下午

7532005/5/6 11:47:55

1

1.0

5

+3VS +2.5VS

12

R36

2.2K_0402_5%

NOVGA@

D D

C C

+2.5VS

B B

2.2K_0402_5%

NOVGA@

LDDC_CLK

GMCH_ENBKL<16,35>

GMCH_TV_LUMA<15>
GMCH_TV_CRMA<15>

R41 2.2K_0402_5%

1 2

R43 2.2K_0402_5%

1 2

R357 2.2K_0402_5%

1 2

R44 2.2K_0402_5%

1 2

R39 100K_0402_5%

1 2

R347 1.5K_0402_1%

1 2

R379 75_0402_1%

1 2

R370 150_0402_1%

1 2

R372 150_0402_1%

1 2

R332

+2.5VS

G

2

1 2

S

GMCH_LCD_CLK

13

D

Q46
BSS138_SOT23NOVGA@

GMCH_CRT_CLK<15>
GMCH_CRT_DATA<15>
GMCH_CRT_B<15>

GMCH_CRT_G<15>
GMCH_CRT_R<15>
GMCH_CRT_VSYNC<15>

GMCH_CRT_HSYNC<15>

GMCH_CRT_CLK
GMCH_CRT_DATA

2

G

LBKLT_EN

1 3

D

S

Q9 BSS138_SOT23

NOVGA@

GMCH_TV_LUMA
GMCH_TV_CRMA

LCTLB_DATA
LCTLA_CLK

LBKLT_EN
LIBG
GMCH_TV_COMPS
GMCH_TV_LUMA
GMCH_TV_CRMA

+3VS

R327

1 2

R364 4.99K_0402_1%

GMCH_CRT_CLK
GMCH_CRT_DATA

R355 150_0402_1%
R360 150_0402_1%
R367 150_0402_1%

4.7K_0402_5%

NOVGA@

GMCH_LCD_CLK <16>

GMCH_TV_COMPS

+2.5VS
CLK_MCH_3GPLL#<14>

CLK_MCH_3GPLL<14>

12

GMCH_ENVDD< 16>

GMCH_TXCLK-<16>
GMCH_TXCLK+<16>

GMCH_TXOUT0-<16>
GMCH_TXOUT1-<16>
GMCH_TXOUT2-<16>

GMCH_TXOUT0+<16>
GMCH_TXOUT1+<16>
GMCH_TXOUT2+<16>

12
12
12

4

R40 3K_0402_1%@

1 2

R349 3K_0402_1%@

1 2

R366 0_0402_5%

1 2

R359 255_0402_1%

TV_REFSET

12

REFSET

LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
GMCH_ENVDD
LIBG

GMCH_TXCLK­GMCH_TXCLK+

GMCH_TXOUT0­GMCH_TXOUT1­GMCH_TXOUT2-

GMCH_TXOUT0+
GMCH_TXOUT1+
GMCH_TXOUT2+

H24

H25
AB29
AC29

A15

C16

A17

B15

B16

B17

E24

E23

E21

D21

C20

B20

A19

B19

H21

G21

E25

C23

C22

C33

C31

B30

B29

C25

C24

B34

B33

B32

A34

A33

B31

C29

D28

C27

C28

D27

C26

J18

J20

F25

F23
F22
F26

F28
F27

U4G

SDVOCTRL_DATA
SDVOCTRL_CLK
GCLKN
GCLKP

TVDAC_A
TVDAC_B
TVDAC_C
TV_REFSET
TV_IRTNA
TV_IRTNB
TV_IRTNC

DDCCLK
DDCDATA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
VSYNC
HSYNC
REFSET

LBKLT_CTL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL

LACLKN
LACLKP
LBCLKN
LBCLKP

LADATAN0
LADATAN1
LADATAN2

LADATAP0
LADATAP1
LADATAP2

LBDATAN0
LBDATAN1
LBDATAN2

LBDATAP0
LBDATAP1
LBDATAP2

ALVISO_BGA1257R3PM@

3

EXP_RXN0/SDVO_TVCLKIN#

MISCTVVGALVDS

EXP_RXN1/SDVO_INT#

EXP_RXN2/SDVO_FLDSTALL#

EXP_RXP0/SDVO_TVCLKIN

EXP_RXP1/SDVO_INT

EXP_RXP2/SDVO_FLDSTALL

EXP_TXN0/SDVOB_RED#

EXP_TXN1/SDVOB_GREEN#

EXP_TXN2/SDVOB_BLUE#

EXP_TXN3/SDVOB_CLKN

EXP_TXN4/SDVOC_RED#

EXP_TXN5/SDVOC_GREEN#

EXP_TXN6/SDVOC_BLUE#

EXP_TXN7/SDVOC_CLKN

PCI - EXPRESS GRAPHICS

EXP_TXP0/SDVOB_RED

EXP_TXP1/SDVOB_GREEN

EXP_TXP2/SDVOB_BLUE
EXP_TXP3/SDVOB_CLKP

EXP_TXP4/SDVOC_RED

EXP_TXP5/SDVOC_GREEN

EXP_TXP6/SDVOC_BLUE
EXP_TXP7/SDVOC_CLKP

EXP_COMPI

EXP_ICOMPO

EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8

EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15

EXP_RXP3

EXP_RXP4

EXP_RXP5

EXP_RXP6

EXP_RXP7

EXP_RXP8

EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15

EXP_TXN8

EXP_TXN9

EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15

EXP_TXP8

EXP_TXP9
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15

2

PCIE_MTX_C_GRX_N[0..15]<16>
PCIE_MTX_C_GRX_P[0..15]<16>

PCEI_GTX_C_MRX_N[0..15]<16>
PCEI_GTX_C_MRX_P[0..15]<16>

PEG_COMP

D36
D34

PCEI_GTX_C_MRX_N0

E30

PCEI_GTX_C_MRX_N1

F34

PCEI_GTX_C_MRX_N2

G30

PCEI_GTX_C_MRX_N3

H34

PCEI_GTX_C_MRX_N4

J30

PCEI_GTX_C_MRX_N5

K34

PCEI_GTX_C_MRX_N6

L30

PCEI_GTX_C_MRX_N7

M34

PCEI_GTX_C_MRX_N8

N30

PCEI_GTX_C_MRX_N9

P34

PCEI_GTX_C_MRX_N10

R30

PCEI_GTX_C_MRX_N11

T34

PCEI_GTX_C_MRX_N12

U30

PCEI_GTX_C_MRX_N13

V34

PCEI_GTX_C_MRX_N14

W30

PCEI_GTX_C_MRX_N15

Y34

PCEI_GTX_C_MRX_P0

D30

PCEI_GTX_C_MRX_P1

E34

PCEI_GTX_C_MRX_P2

F30

PCEI_GTX_C_MRX_P3

G34

PCEI_GTX_C_MRX_P4

H30

PCEI_GTX_C_MRX_P5

J34

PCEI_GTX_C_MRX_P6

K30

PCEI_GTX_C_MRX_P7

L34

PCEI_GTX_C_MRX_P8

M30

PCEI_GTX_C_MRX_P9

N34

PCEI_GTX_C_MRX_P10

P30

PCEI_GTX_C_MRX_P11

R34

PCEI_GTX_C_MRX_P12

T30

PCEI_GTX_C_MRX_P13

U34

PCEI_GTX_C_MRX_P14

V30

PCEI_GTX_C_MRX_P15

W34

PCIE_MTX_GRX_N0

E32

PCIE_MTX_GRX_N1

F36

PCIE_MTX_GRX_N2

G32

PCIE_MTX_GRX_N3

H36

PCIE_MTX_GRX_N4 PCIE_MTX_C_GRX_N4

J32

PCIE_MTX_GRX_N5

K36

PCIE_MTX_GRX_N6

L32

PCIE_MTX_GRX_N7

M36

PCIE_MTX_GRX_N8

N32

PCIE_MTX_GRX_N9

P36

PCIE_MTX_GRX_N10

R32

PCIE_MTX_GRX_N11

T36

PCIE_MTX_GRX_N12

U32

PCIE_MTX_GRX_N13

V36

PCIE_MTX_GRX_N14

W32

PCIE_MTX_GRX_N15

Y36

PCIE_MTX_GRX_P0

D32

PCIE_MTX_GRX_P1

E36

PCIE_MTX_GRX_P2

F32

PCIE_MTX_GRX_P3

G36

PCIE_MTX_GRX_P4

H32

PCIE_MTX_GRX_P5

J36

PCIE_MTX_GRX_P6

K32

PCIE_MTX_GRX_P7

L36

PCIE_MTX_GRX_P8

M32

PCIE_MTX_GRX_P9

N36

PCIE_MTX_GRX_P10

P32

PCIE_MTX_GRX_P11

R36

PCIE_MTX_GRX_P12

T32

PCIE_MTX_GRX_P13

U36

PCIE_MTX_GRX_P14

V32

PCIE_MTX_GRX_P15

W36

1 2

R31 24.9_0402_1%

C16 0.1U_0402_16V4ZVGA@

1 2

C18 0.1U_0402_16V4ZVGA@

1 2

C20 0.1U_0402_16V4ZVGA@

1 2

C23 0.1U_0402_16V4ZVGA@

1 2

C26 0.1U_0402_16V4ZVGA@

1 2

C28 0.1U_0402_16V4ZVGA@

1 2

C31 0.1U_0402_16V4ZVGA@

1 2

C36 0.1U_0402_16V4ZVGA@

1 2

C14 0.1U_0402_16V4ZVGA@

1 2

C17 0.1U_0402_16V4ZVGA@

1 2

C19 0.1U_0402_16V4ZVGA@

1 2

C22 0.1U_0402_16V4ZVGA@

1 2

C24 0.1U_0402_16V4ZVGA@

1 2

C27 0.1U_0402_16V4ZVGA@

1 2

C29 0.1U_0402_16V4ZVGA@

1 2

C34 0.1U_0402_16V4ZVGA@

1 2

PCIE_MTX_C_GRX_N[0..15]

PCIE_MTX_C_GRX_P[0..15]
PCEI_GTX_C_MRX_N[0..15]
PCEI_GTX_C_MRX_P[0..15]

+1.5VS

C326 0.1U_0402_16V4ZVGA@

1 2

C331 0.1U_0402_16V4ZVGA@

1 2

C341 0.1U_0402_16V4ZVGA@

1 2

C357 0.1U_0402_16V4ZVGA@

1 2

C365 0.1U_0402_16V4ZVGA@

1 2

C374 0.1U_0402_16V4ZVGA@

1 2

C388 0.1U_0402_16V4ZVGA@

1 2

C402 0.1U_0402_16V4ZVGA@

1 2

C317 0.1U_0402_16V4ZVGA@

1 2

C329 0.1U_0402_16V4ZVGA@

1 2

C335 0.1U_0402_16V4ZVGA@

1 2

C347 0.1U_0402_16V4ZVGA@

1 2

C362 0.1U_0402_16V4ZVGA@

1 2

C371 0.1U_0402_16V4ZVGA@

1 2

C383 0.1U_0402_16V4ZVGA@

1 2

C400 0.1U_0402_16V4ZVGA@

1 2

1

PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_N2

PCIE_MTX_C_GRX_N3

PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_N15

PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_P15

A A

2.2K_0402_5%

NOVGA@

LDDC_DATA

R28

+2.5VS

G

2

1 2

S

GMCH_LCD_DATA

13

D

Q6
BSS138_SOT23NOVGA@

5

+3VS

1 2

R25

4.7K_0402_5%

NOVGA@

GMCH_LCD_DATA <16>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

2

Date: Sheet of

Compal Electronics, Inc.

Alviso PCI-E(3/5)
Boston LA-2721

下午

8532005/5/6 11:47:55

1

1.0

5

4

3

2

1

U4E

+1.05VS

D D

C C

+1.5VS

+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
+1.5VS_MPLL

B B

+1.5VS_DPLLA

1

2

+1.5VS_HPLL

A A

1

2

+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
+1.5VS_MPLL

60mA

C358

22U_1206_16V4Z_V1

60mA

C52

22U_1206_16V4Z_V1

T29
R29
N29

M29

K29
J29
V28

U28

T28

R28

P28
N28
M28

L28

K28

J28
H28
G28

V27
U27

T27
R27

P27
N27
M27

L27

K27

J27
H27

K26
H26

K25

J25

K24

K23

K22

K21

W20

U20

T20

K20

V19
U19

K19

W18

V18

T18

K18

K17

AC1
AC2

B23
C35
AA1
AA2

R348
0_0603_5%

1 2

1

C364

2

0.1U_0402_16V4Z

R57
0_0603_5%

1 2

1

C50

2

0.1U_0402_16V4Z

5

VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48

VCCD_HMPLL1
VCCD_HMPLL2
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL

ALVISO_BGA1257R3PM@

+1.5VS

+1.5VS

VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1

POWER

VCCA_CRTDAC0
VCCA_CRTDAC1

+1.5VS_DPLLB

1

C15

2

22U_1206_16V4Z_V1

+1.5VS_MPLL

1

C451

2

22U_1206_16V4Z_V1

VCCA_TVBG
VSSA_TVBG

VCCD_TVDAC

VCCDQ_TVDAC

VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2

VCCA_LVDS

VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2

VCCA_SM0
VCCA_SM1
VCCA_SM2
VCCA_SM3

VCCA_3GPLL0
VCCA_3GPLL1
VCCA_3GPLL2

VCCA_3GBG
VSSA_3GBG

VCC_SYNC

VSSA_CRTDAC

60mA

60mA

VCCHV0
VCCHV1
VCCHV2

VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6

F17
E17
D18
C18
F18
E18

H18
G18

D19
H17

B26
B25
A25

A35
B22

B21
A21

B28
A28
A27

AF20
AP19
AF19
AF18

AE37
W37
U37
R37
N37
L37
J37

Y29
Y28
Y27

F37
G37

H20
F19

E19
G19

R37
0_0603_5%

1 2

1

C323

2

0.1U_0402_16V4Z

R400
0_0603_5%

1 2

1

C440

2

0.1U_0402_16V4Z

120mA

24mA

60mA

10mA
2mA

60mA

70mA

+1.5VS

+1.5VS

+3VS_DAC

+1.5VS

+2.5VS

+1.5VS_DDRDLL

+1.5VS_PEG

0.47U_0603_16V4Z

+1.5VS_3GPLL

+2.5VS_3GBG

+2.5VS_DAC

0.47U_0603_16V4Z

+1.5VS_DDRDLL

+1.5VS_3GPLL

4

+1.05VS

C44

1

2

1

C46

2

C49

0.22U_0402_10V4Z

0.22U_0402_10V4Z

1

C25

2

22U_1206_16V4Z_V1

1

C306

2

10U_1206_16V4Z

1

2

1

C51

2

1

2

R337

0.5_0603_1%

1 2

1

C343

2

0.1U_0402_16V4Z

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

U4F

K13

VTT0

J13

VTT1

K12

VTT2

W11

VTT3

V11

VTT4

U11

VTT5

T11

VTT6

R11

VTT7

P11

VTT8

N11

VTT9

M11

VTT10

L11

VTT11

K11

VTT12

W10

VTT13

V10

VTT14

U10

VTT15

T10

VTT16

R10

VTT17

P10

VTT18

N10

VTT19

M10

VTT20

K10

VTT21

J10

VTT22

Y9

VTT23

W9

VTT24

U9

VTT25

R9

VTT26

P9

VTT27

N9

VTT28

M9

VTT29

L9

VTT30

J9

VTT31

N8

VTT32

M8

VTT33

N7

VTT34

M7

VTT35

N6

VTT36

M6

VTT37

A6

VTT38

N5

VTT39

M5

VTT40

N4

VTT41

M4

VTT42

N3

VTT43

M3

VTT44

N2

VTT45

M2

VTT46

B2

VTT47

V1

VTT48

N1

VTT49

M1

VTT50

G1

VTT51

ALVISO_BGA1257R3PM@

R42
0_0603_5%

1 2

C378

0.1U_0402_16V4Z

+3GPLL

Issued Date

POWER

+1.5VS_PEG

+1.5VS

22U_1206_16V4Z_V1

R336
0_0603_5%

1 2

VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8

VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37
VCCSM38
VCCSM39
VCCSM40
VCCSM41
VCCSM42
VCCSM43
VCCSM44
VCCSM45
VCCSM46
VCCSM47
VCCSM48
VCCSM49
VCCSM50
VCCSM51
VCCSM52
VCCSM53
VCCSM54
VCCSM55
VCCSM56
VCCSM57
VCCSM58
VCCSM59
VCCSM60
VCCSM61
VCCSM62
VCCSM63
VCCSM64

AH37
AP29
AD28
AD27
AC27
AP26
AN26
AM26
AL26
AK26
AJ26
AH26
AG26
AF26
AE26
AP25
AN25
AM25
AL25
AK25
AJ25
AH25
AG25
AF25
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AE17
AE16
AE15
AE14
AP13
AN13
AM13
AL13
AK13
AJ13
AH13
AG13
AF13
AE13
AP12
AN12
AM12
AL12
AK12
AJ12
AH12
AG12
AF12
AE12
AD11
AC11
AB11
AB10
AB9

V1.8_DDR_CAP6

AP8

V1.8_DDR_CAP4

AM1

V1.8_DDR_CAP3

AE1

V1.8_DDR_CAP2
V1.8_DDR_CAP5

V1.8_DDR_CAP1

AM37

1000mA

4.7U_0805_10V4Z

C12

+1.5VS

1

2

1

2

2005/05/06 2006/05/06

3

1

C307

2

+2.5VS_3GBG

1

2

Compal Secret Data

C13

4.7U_0805_10V4Z

1 2

R338 0_0603_5%
C309

0.1U_0402_16V4Z

C310

0.1U_0402_16V4Z

+DDRVCC

330U_D2E_2.5VM

C42

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R30

470U_D2_2.5VM

1 2

0_1206_5%

0.15mA

Deciphered Date

C311

0.1U_0402_16V4Z

12

12

C334

0.1U_0402_16V4Z

+DDRVCC

2200mA

0.1U_0402_16V4Z

C483

1

2

+2.5VS

1

2

+

C355

C315

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

VCCA_LVDS (Ball A35)

+2.5VS_DAC

1

C394

2

4.7U_0805_10V4Z

VCC_SYNC(Ball H20)

C439

0.1U_0402_16V4Z

12

12

C438

1

+

C11

2

Reserve for debug

+2.5VS

4.7U_0805_10V4Z

12

+1.5VS

21

D28

RB751V_SOD323@

1 2

R575 1K_0402_5%@

2

12

C413

1

C324

2

0.01U_0402_16V7K

1

C381

2

0.1U_0402_16V4Z

+1.05VS

C369

22U_1206_16V4Z_V1

0.1U_0402_16V4Z

1

2

C353

1

2

VCCHV(Ball A21,B21,B22)

VCCA_CRTD AC(Ball F19 ,E19)

+1.5VS

1

2

+1.05VS

1

C412

2

2.2U_0603_6.3V6K

+3VS

1

+

2

C350

0.1U_0402_16V4Z

L1

CHB1608U301_0603

1 2

C32
150U_D2_6.3VM

C21

4000mA

2.2U_0603_6.3V6K

1

C348

2

1

C409

2

0.1U_0402_16V4Z

1

C373

2

4.7U_0805_10V4Z

1

2

2.2U_0603_6.3V6K

0.1U_0402_16V4Z

C354

1

2

0.1U_0402_16V4Z

1

C339

C406

2

1

C407

2

0.1U_0402_16V4Z

C368

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C401

2

1

C340

2

4.7U_0805_10V4Z

1

C418

2

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C426

2

1

C351

2

1

C344

2

0.1U_0402_16V4Z

VCCTX_LVDS(Ball A27,A28,B28)

R375
0_0603_5%

1

C376

2

0.1U_0402_16V4Z

1 2

1

C380

2

0.022U_0402_16V7K

+2.5VS

VCCD_TVDAC (Ball D19)

0.1U_0402_16V4Z

1

C395

2

1

C397

2

0.022U_0402_16V7K

1

2

0.1U_0402_16V4Z

1

C359

2

1

C375

2

0.022U_0402_16V7K

VCCDQ_TVDAC (Ball H17)VCCD_LVDS(Ball A25,B25,B26)

950mA

1

C405

2

2.2U_0603_6.3V6K

1

C390

2

2.2U_0603_6.3V6K

1

C372

2

2.2U_0603_6.3V6K

VCCA_TVDAC VCCA_TVBG (Ball H18)

120mA

+3VS_DAC

1

1

2

0.1U_0402_16V4Z

0.022U_0402_16V7K

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

下午

C392

C391

2

0.1U_0402_16V4Z

Alviso POWER(4/5)
Boston LA-2721

1

C386

2

1

1

C384

2

0.022U_0402_16V7K

of

9532005/5/6 11:47:54

1.0

5

4

3

2

1

U4H

+1.05VS

D D

C C

B B

+1.05VS

A A

L12

VTT_NCTF17

M12

VTT_NCTF16

N12

VTT_NCTF15

P12

VTT_NCTF14

R12

VTT_NCTF13

T12

VTT_NCTF12

U12

VTT_NCTF11

V12

VTT_NCTF10

W12

VTT_NCTF9

L13

VTT_NCTF8

M13

VTT_NCTF7

N13

VTT_NCTF6

P13

VTT_NCTF5

R13

VTT_NCTF4

T13

VTT_NCTF3

U13

VTT_NCTF2

V13

VTT_NCTF1

W13

VTT_NCTF0

Y12

VSS_NCTF68

AA12

VSS_NCTF67

Y13

VSS_NCTF66

AA13

VSS_NCTF65

L14

VSS_NCTF64

M14

VSS_NCTF63

N14

VSS_NCTF62

P14

VSS_NCTF61

R14

VSS_NCTF60

T14

VSS_NCTF59

U14

VSS_NCTF58

V14

VSS_NCTF57

W14

VSS_NCTF56

Y14

VSS_NCTF55

AA14

VSS_NCTF54

AB14

VSS_NCTF53

L15

VSS_NCTF52

M15

VSS_NCTF51

N15

VSS_NCTF50

P15

VSS_NCTF49

R15

VSS_NCTF48

T15

VSS_NCTF47

U15

VSS_NCTF46

V15

VSS_NCTF45

W15

VSS_NCTF44

Y15

VSS_NCTF43

AA15

VSS_NCTF42

AB15

VSS_NCTF41

L16

VSS_NCTF40

M16

VSS_NCTF39

N16

VSS_NCTF38

P16

VSS_NCTF37

R16

VSS_NCTF36

T16

VSS_NCTF35

U16

VSS_NCTF34

V16

VSS_NCTF33

W16

VSS_NCTF32

Y16

VSS_NCTF31

AA16

VSS_NCTF30

AB16

VSS_NCTF29

R17

VSS_NCTF28

Y17

VSS_NCTF27

AA17

VSS_NCTF26

AB17

VSS_NCTF25

AA18

VSS_NCTF24

AB18

VSS_NCTF23

AA19

VSS_NCTF22

AB19

VSS_NCTF21

AA20

VSS_NCTF20

AB20

VSS_NCTF19

R21

VSS_NCTF18

Y21

VSS_NCTF17

AA21

VSS_NCTF16

AB21

VSS_NCTF15

Y22

VSS_NCTF14

AA22

VSS_NCTF13

AB22

VSS_NCTF12

Y23

VSS_NCTF11

AA23

VSS_NCTF10

AB23

VSS_NCTF9

Y24

VSS_NCTF8

AA24

VSS_NCTF7

AB24

VSS_NCTF6

Y25

VSS_NCTF5

AA25

VSS_NCTF4

AB25

VSS_NCTF3

Y26

VSS_NCTF2

AA26

VSS_NCTF1

AB26

VSS_NCTF0

V25

VCC_NCTF10

W25

VCC_NCTF9

L26

VCC_NCTF8

M26

VCC_NCTF7

N26

VCC_NCTF6

P26

VCC_NCTF5

R26

VCC_NCTF4

T26

VCC_NCTF3

U26

VCC_NCTF2

V26

VCC_NCTF1

W26

VCC_NCTF0

ALVISO_BGA1257R3PM@

5

VCCSM_NCTF31
VCCSM_NCTF30
VCCSM_NCTF29
VCCSM_NCTF28
VCCSM_NCTF27
VCCSM_NCTF26
VCCSM_NCTF25
VCCSM_NCTF24
VCCSM_NCTF23
VCCSM_NCTF22
VCCSM_NCTF21
VCCSM_NCTF20
VCCSM_NCTF19
VCCSM_NCTF18
VCCSM_NCTF17
VCCSM_NCTF16
VCCSM_NCTF15
VCCSM_NCTF14
VCCSM_NCTF13
VCCSM_NCTF12
VCCSM_NCTF11
VCCSM_NCTF10

VCCSM_NCTF9
VCCSM_NCTF8
VCCSM_NCTF7
VCCSM_NCTF6
VCCSM_NCTF5
VCCSM_NCTF4
VCCSM_NCTF3
VCCSM_NCTF2
VCCSM_NCTF1
VCCSM_NCTF0

VCC_NCTF78
VCC_NCTF77
VCC_NCTF76
VCC_NCTF75
VCC_NCTF74
VCC_NCTF73
VCC_NCTF72
VCC_NCTF71
VCC_NCTF70

NCTF

VCC_NCTF69
VCC_NCTF68
VCC_NCTF67
VCC_NCTF66
VCC_NCTF65
VCC_NCTF64
VCC_NCTF63
VCC_NCTF62
VCC_NCTF61
VCC_NCTF60
VCC_NCTF59
VCC_NCTF58
VCC_NCTF57
VCC_NCTF56
VCC_NCTF55
VCC_NCTF54
VCC_NCTF53
VCC_NCTF52
VCC_NCTF51
VCC_NCTF50
VCC_NCTF49
VCC_NCTF48
VCC_NCTF47
VCC_NCTF46
VCC_NCTF45
VCC_NCTF44
VCC_NCTF43
VCC_NCTF42
VCC_NCTF41
VCC_NCTF40
VCC_NCTF39
VCC_NCTF38
VCC_NCTF37
VCC_NCTF36
VCC_NCTF35
VCC_NCTF34
VCC_NCTF33
VCC_NCTF32
VCC_NCTF31
VCC_NCTF30
VCC_NCTF29
VCC_NCTF28
VCC_NCTF27
VCC_NCTF26
VCC_NCTF25
VCC_NCTF24
VCC_NCTF23
VCC_NCTF22
VCC_NCTF21
VCC_NCTF20
VCC_NCTF19
VCC_NCTF18
VCC_NCTF17
VCC_NCTF16
VCC_NCTF15
VCC_NCTF14
VCC_NCTF13
VCC_NCTF12
VCC_NCTF11

AB12
AC12
AD12
AB13
AC13
AD13
AC14
AD14
AC15
AD15
AC16
AD16
AC17
AD17
AC18
AD18
AC19
AD19
AC20
AD20
AC21
AD21
AC22
AD22
AC23
AD23
AC24
AD24
AC25
AD25
AC26
AD26

L17
M17
N17
P17
T17
U17
V17
W17
L18
M18
N18
P18
R18
Y18
L19
M19
N19
P19
R19
Y19
L20
M20
N20
P20
R20
Y20
L21
M21
N21
P21
T21
U21
V21
W21
L22
M22
N22
P22
R22
T22
U22
V22
W22
L23
M23
N23
P23
R23
T23
U23
V23
W23
L24
M24
N24
P24
R24
T24
U24
V24
W24
L25
M25
N25
P25
R25
T25
U25

+DDRVCC

+1.05VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AD2
AE2
AH2

AN2

AA3
AB3
AC3

AF4
AN4

AP5

AA6
AC6
AE6

AA7
AG7
AK7
AN7

AA9
AC9
AE9
AH9
AN9
D10

AA10

H11

AL2

AJ3

AL5

AJ6

AL8

L10
Y10

F11
Y11

U4I

Y1

VSS271

D2

VSS270

G2

VSS269

J2

VSS268

L2

VSS260

P2

VSS259

T2

VSS258

V2

VSS257
VSS256
VSS255
VSS254
VSS253
VSS252

A3

VSS251

C3

VSS250
VSS249
VSS248
VSS247
VSS246

C4

VSS245

H4

VSS244

L4

VSS243

P4

VSS242

U4

VSS241

Y4

VSS240
VSS239
VSS238

E5

VSS237

W5

VSS236
VSS235
VSS234

B6

VSS233

J6

VSS232

L6

VSS231

P6

VSS230

T6

VSS229
VSS228
VSS227
VSS226
VSS225

G7

VSS224

V7

VSS223
VSS222
VSS221
VSS220
VSS219

C8

VSS218

E8

VSS217

L8

VSS216

P8

VSS215

Y8

VSS214
VSS213

A9

VSS212

H9

VSS211

K9

VSS210

T9

VSS209

V9

VSS208
VSS207
VSS206
VSS205
VSS204
VSS203
VSS202
VSS201
VSS200
VSS199
VSS198
VSS197
VSS196

ALVISO_BGA1257R3PM@

VSS

2005/05/06 2006/05/06

3

VSSALVDS

Compal Secret Data

B36
AA11

VSS195

AF11

VSS194

AG11

VSS193

AJ11

VSS192

AL11

VSS191

AN11

VSS190

B12

VSS189

D12

VSS188

J12

VSS187

A14

VSS186

B14

VSS185

F14

VSS184

J14

VSS183

K14

VSS182

AG14

VSS181

AJ14

VSS180

AL14

VSS179

AN14

VSS178

C15

VSS177

K15

VSS176

A16

VSS175

D16

VSS174

H16

VSS173

K16

VSS172

AL16

VSS171

C17

VSS170

G17

VSS169

AF17

VSS168

AJ17

VSS167

AN17

VSS166

A18

VSS165

B18

VSS164

U18

VSS163

AL18

VSS162

C19

VSS161

H19

VSS160

J19

VSS159

T19

VSS158

W19

VSS157

AG19

VSS156

AN19

VSS155

A20

VSS154

D20

VSS153

E20

VSS152

F20

VSS151

G20

VSS150

V20

VSS149

AK20

VSS148

C21

VSS147

F21

VSS146

AF21

VSS145

AN21

VSS144

A22

VSS143

D22

VSS142

E22

VSS141

J22

VSS140

AH22

VSS139

AL22

VSS138

H23

VSS137

AF23

VSS136

B24

VSS135

D24

VSS134

F24

VSS133

J24

VSS132

AG24

VSS131

AJ24

VSS130

Deciphered Date

2

AL24

AN24

A26
E26
G26

B27
E27
G27

W27
AA27
AB27
AF27

AG27

AJ27
AL27

AN27

E28

W28
AA28
AB28

AC28

A29
D29
E29

G29
H29

P29
U29
V29

W29
AA29

AD29
AG29

AJ29

AM29

C30

Y30
AA30
AB30

AC30

AE30
AP30

D31

E31

G31

H31

K31

M31

N31

P31

R31

U31

V31

W31
AD31
AG31

AL31

A32
C32

Y32
AA32
AB32

J26

F29

L29

F31

J31
L31

T31

U4J

VSS267
VSS266
VSS265
VSS264
VSS263
VSS262
VSS261
VSS129
VSS128
VSS127
VSS126
VSS125
VSS124
VSS123
VSS122
VSS121
VSS120
VSS119
VSS118
VSS117
VSS116
VSS115
VSS114
VSS113
VSS112
VSS111
VSS110
VSS109
VSS108
VSS107
VSS106
VSS105
VSS104
VSS103
VSS102
VSS101
VSS100
VSS99
VSS98
VSS97
VSS96
VSS95
VSS94
VSS93
VSS92
VSS91
VSS90
VSS89
VSS88
VSS87
VSS86
VSS85
VSS84
VSS83
VSS82
VSS81
VSS80
VSS79
VSS78
VSS77
VSS76
VSS75
VSS74
VSS73
VSS72
VSS71
VSS70
VSS69
VSS68

ALVISO_BGA1257

R3PM@

VSS

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Alviso POWER(5/5)
Boston LA-2721

下午

VSS67
VSS66
VSS65
VSS64
VSS63
VSS62
VSS61
VSS60
VSS59
VSS58
VSS57
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10

VSS9
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
VSS0

1

AC32
AD32
AJ32
AN32
D33
E33
F33
G33
H33
J33
K33
L33
M33
N33
P33
R33
T33
U33
V33
W33
AD33
AF33
AL33
C34
AA34
AB34
AC34
AD34
AH34
AN34
B35
D35
E35
F35
G35
H35
J35
K35
L35
M35
N35
P35
R35
T35
U35
V35
W35
Y35
AE35
C36
AA36
AB36
AC36
AD36
AE36
AF36
AJ36
AL36
AN36
E37
H37
K37
M37
P37
T37
V37
Y37
AG37

10 532005/5/6 11:47:54

1.0

of

5

4

3

2

1

+DDRVCC

DDRA_DQ1
DDRA_DQ5

DDRA_DQS0
DDRA_DQ7

D D

DDRA_CLK1<6>
DDRA_CLK1#<6>

C C

DDRA_CKE1<6>

DDRA_SBS0<7>
DDRA_SWE#<7>
DDRA_SCS#0<6>

B B

A A

D_CK_SDATA<12,14>
D_CK_SCLK<12,14>

DDRA_DQ3
DDRA_DQ13

DDRA_DQ9
DDRA_DQS1

DDRA_DQ15
DDRA_DQ11

DDRA_DQ16
DDRA_DQ20

DDRA_DQS2
DDRA_DQ18

DDRA_DQ22
DDRA_DQ25

DDRA_DQ29
DDRA_DQS3

DDRA_DQ27
DDRA_DQ30

DDRA_CKE1
DDRA_SMA12

DDRA_SMA9
DDRA_SMA7

DDRA_SMA5
DDRA_SMA3
DDRA_SMA1

DDRA_SMA10
DDRA_SBS0
DDRA_SWE#

DDRA_SMA13
DDRA_DQ36

DDRA_DQ33
DDRA_DQS4

DDRA_DQ38
DDRA_DQ35

DDRA_DQ41
DDRA_DQ44

DDRA_DQS5
DDRA_DQ46

DDRA_DQ47

DDRA_DQ52
DDRA_DQ53

DDRA_DQS6
DDRA_DQ54

DDRA_DQ50
DDRA_DQ60

DDRA_DQ56
DDRA_DQS7

DDRA_DQ57
DDRA_DQ62

D_CK_SDATA
D_CK_SCLK

5

+3VS

101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99

1
3
5
7
9

JP7

VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0#
VSS

DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2#
VDD
CKE1
DU/A13
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE#
S0#
DU
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD_SPD
VDD_ID

AMP_1565917-1

DIMM0

VREF

VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7

DQ12

VDD

DQ13

DM1

VSS
DQ14
DQ15

VDD

VDD

VSS

VSS

DQ20
DQ21

VDD

DM2
DQ22

VSS
DQ23
DQ28

VDD
DQ29

DM3

VSS
DQ30
DQ31

VDD

CB4

CB5
VSS
DM8

CB6
VDD

CB7

DU/RESET#

VSS
VSS
VDD
VDD

CKE0

DU/BA2

VSS

VDD

BA1

RAS#
CAS#

VSS

DQ36
DQ37

VDD
DM4

DQ38

VSS

DQ39
DQ44

VDD

DQ45

DM5
VSS

DQ46
DQ47

VDD

CK1#

CK1
VSS

DQ52
DQ53

VDD
DM6

DQ54

VSS

DQ55
DQ60

VDD

DQ61

DM7
VSS

DQ62
DQ63

VDD

SA0

SA1

SA2

A11

S1#

A8
A6

A4
A2
A0

DU

DU

+DDRVCC +DDRVCC

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

4

DDRA_DQ0
DDRA_DQ4

DDRA_DM0
DDRA_DQ6

DDRA_DQ2
DDRA_DQ8

DDRA_DQ12
DDRA_DM1

DDRA_DQ14
DDRA_DQ10

DDRA_DQ17
DDRA_DQ21

DDRA_DM2
DDRA_DQ19

DDRA_DQ23
DDRA_DQ24

DDRA_DQ28
DDRA_DM3

DDRA_DQ26
DDRA_DQ31

DDRA_CKE0
DDRA_SMA11

DDRA_SMA8
DDRA_SMA6

DDRA_SMA4
DDRA_SMA2
DDRA_SMA0

DDRA_SBS1
DDRA_SRAS#
DDRA_SCAS#
DDRA_SCS#1DDRA_SCS#0

DDRA_DQ37
DDRA_DQ32

DDRA_DM4
DDRA_DQ39

DDRA_DQ34
DDRA_DQ45

DDRA_DQ40
DDRA_DM5

DDRA_DQ42
DDRA_DQ43

DDRA_DQ49
DDRA_DQ48

DDRA_DM6
DDRA_DQ55

DDRA_DQ51
DDRA_DQ61

DDRA_DQ58
DDRA_DM7

DDRA_DQ63
DDRA_DQ59

+DIMM_VREF

12

12

1

2

C298

0.1U_0402_16V4Z

DDRA_CKE0 <6>

DDRA_SBS1 <7>
DDRA_SRAS# <7>
DDRA_SCAS# <7>
DDRA_SCS#1 <6>

DDRA_CLK2# <6>
DDRA_CLK2 <6>

R321

1K_0402_1%

R322

1K_0402_1%

DDRA_SDQ0
DDRA_SDQ1

DDRA_SDM0
DDRA_SDQS0

DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ10
DDRA_SDQ11

DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ20
DDRA_SDQ21

DDRA_SDQS2
DDRA_SDM2

DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ31
DDRA_SDQ30

DDRA_SDQ37
DDRA_SDQ36
DDRA_SDQ33
DDRA_SDQ32

DDRA_SDQS4
DDRA_SDM4

DDRA_SDQ46
DDRA_SDQ42
DDRA_SDQ47
DDRA_SDQ43

DDRA_SDQ52
DDRA_SDQ49
DDRA_SDQ53
DDRA_SDQ48

DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ50
DDRA_SDQ51

DDRA_SDQS7
DDRA_SDM7 DDRA_SDQ63

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

3

RP1

1 8
2 7
3 6
4 5

1 4
2 3

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 4
2 3

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 4
2 3

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 4
2 3

DDRA_DQ0
DDRA_DQ1
DDRA_DQ4DDRA_SDQ4
DDRA_DQ5DDRA_SDQ5

10_0804_8P4R_5%

RP2

DDRA_DM0
DDRA_DQS0

10_0404_4P2R_5%

RP6

DDRA_DQ14
DDRA_DQ15
DDRA_DQ10
DDRA_DQ11

10_0804_8P4R_5%

RP7

DDRA_DQ16
DDRA_DQ17
DDRA_DQ20
DDRA_DQ21

10_0804_8P4R_5%

RP8

DDRA_DQS2

10_0404_4P2R_5%
RP12

DDRA_DQ26
DDRA_DQ27
DDRA_DQ31

DDRA_DQ30

10_0804_8P4R_5%
RP16

DDRA_DQ37

DDRA_DQ36

DDRA_DQ33

10_0804_8P4R_5%

RP17

DDRA_DQS4

DDRA_DM4

10_0404_4P2R_5%
RP21

DDRA_DQ46

DDRA_DQ42

DDRA_DQ47

DDRA_DQ43

10_0804_8P4R_5%
RP22

DDRA_DQ52

DDRA_DQ49

DDRA_DQ53

DDRA_DQ48

10_0804_8P4R_5%
RP24

DDRA_DQ54

DDRA_DQ55

DDRA_DQ50

DDRA_DQ51

10_0804_8P4R_5%

RP26

DDRA_DQS7

DDRA_DM7

10_0404_4P2R_5%

DDRA_DM2

Compal Secret Data

Deciphered Date

DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ2
DDRA_SDQ3

DDRA_SDQ8
DDRA_SDQ13
DDRA_SDQ12
DDRA_SDQ9

DDRA_SDM1
DDRA_SDQS1

DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ22
DDRA_SDQ23

DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ28
DDRA_SDQ29

DDRA_SDM3
DDRA_SDQS3

DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ35
DDRA_SDQ34

DDRA_SDQ41
DDRA_SDQ45 DDRA_DQ45
DDRA_SDQ44
DDRA_SDQ40

DDRA_SDQS5 DDRA_ DQS5

DDRA_SDQS6
DDRA_SDM6

DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ56
DDRA_SDQ58

DDRA_SDQ57
DDRA_SDQ59

DDRA_SDQ62

2

RP3

1 8
2 7
3 6
4 5

10_0804_8P4R_5%
RP4

1 8
2 7
3 6
4 5

10_0804_8P4R_5%

RP5

1 4
2 3

10_0404_4P2R_5%
RP9

1 8
2 7
3 6
4 5

10_0804_8P4R_5%
RP10

1 8
2 7
3 6
4 5

10_0804_8P4R_5%

RP11

1 4
2 3

10_0404_4P2R_5%

RP18

1 8
2 7
3 6
4 5

10_0804_8P4R_5%
RP19

1 8
2 7
3 6
4 5

10_0804_8P4R_5%
10_0404_4P2R_5%

2 3
1 4

RP20

RP23

1 4
2 3

10_0404_4P2R_5%

RP25

1 8
2 7
3 6
4 5

10_0804_8P4R_5%
RP27

1 8
2 7
3 6
4 5

10_0804_8P4R_5%

DDRA_DQ6
DDRA_DQ7
DDRA_DQ2
DDRA_DQ3

DDRA_DQ8
DDRA_DQ13
DDRA_DQ12
DDRA_DQ9

DDRA_DM1
DDRA_DQS1

DDRA_DQ18

DDRA_DQ19
DDRA_DQ22
DDRA_DQ23

DDRA_DQ24
DDRA_DQ25
DDRA_DQ28
DDRA_DQ29

DDRA_DM3
DDRA_DQS3

DDRA_DQ38
DDRA_DQ39
DDRA_DQ35
DDRA_DQ34DDRA_DQ32

DDRA_DQ41
DDRA_DQ44

DDRA_DQ40

DDRA_DM5DDRA_SDM5

DDRA_DQS6
DDRA_DM6

DDRA_DQ60
DDRA_DQ61
DDRA_DQ56
DDRA_DQ58

DDRA_DQ57
DDRA_DQ63
DDRA_DQ59
DDRA_DQ62

Title

Size Document Number Rev

Date: Sheet of

DDRA_SMA4
DDRA_SMA6
DDRA_SMA8
DDRA_SMA11

DDRA_SRAS#
DDRA_SBS1
DDRA_SMA0
DDRA_SMA2

DDRA_SCAS#
DDRA_SCS#1

DDRA_SMA5
DDRA_SMA7
DDRA_SMA9
DDRA_SMA12

DDRA_SBS0
DDRA_SMA10
DDRA_SMA1
DDRA_SMA3

DDRA_SWE#
DDRA_SCS#0

DDRA_SMA13
DDRA_CKE1
DDRA_CKE0

DDRA_DQ[0..63]
DDRA_DM[0..7]
DDRA_DQS[0..7]

DDRA_SDQ[0..63]<7>
DDRA_SDM[0..7]<7>
DDRA_SDQS[0..7]<7>
DDRA_SMA[0..13]<7>

Compal Electronics, Inc.

DDR-SODIMM SLOT0
Boston LA-2721

下午

RP57

4 5
3 6
2 7
1 8

56_0804_8P4R_5%

RP60

4 5
3 6
2 7
1 8

56_0804_8P4R_5%

56_0404_4P2R_5%

1 4
2 3

RP62
56_0804_8P4R_5%

1 8
2 7
3 6
4 5

RP13

56_0804_8P4R_5%

1 8
2 7
3 6
4 5

RP14

RP15

2 3
1 4

56_0404_4P2R_5%

1 2

R48 56_0402_5%

1 2

R47 56_0402_5%

1 2

R369 56_0402_5%

DDRA_DQ[0..63] <12>

DDRA_DM[0..7] <12>

DDRA_DQS[0..7] <12>

DDRA_SDQ[0..63]
DDRA_SDM[0..7]
DDRA_SDQS[0..7]
DDRA_SMA[0..13]

11 532005/5/6 11:47:58

1

+DDRVTT

1.0

A

+DDRVTT

RP40

DDRA_DQ1
DDRA_DQ0
DDRA_DQ5
DDRA_DQ4

1 1

DDRA_DQ3
DDRA_DQ2
DDRA_DQ13
DDRA_DQ8

DDRA_DQ16
DDRA_DQ17
DDRA_DQ20
DDRA_DQ21

DDRA_DQ22

2 2

DDRA_DQ23
DDRA_DQ25
DDRA_DQ24

DDRB_SMA11
DDRB_SMA8
DDRB_SMA6
DDRB_SMA4

DDRB_SMA2
DDRB_SMA0
DDRB_SBS1
DDRB_SRAS#

3 3

DDRB_SCAS#
DDRB_SCS#1
DDRB_SCS#0
DDRB_SMA13

DDRA_DQ36
DDRA_DQ37
DDRA_DQ33
DDRA_DQ32

DDRA_DQ35
DDRA_DQ34
DDRA_DQ41
DDRA_DQ45

4 4

DDRA_DQS6
DDRA_DM6
DDRA_DQ54
DDRA_DQ55

4 5
3 6
2 7
1 8

56_0804_8P4R_5%

RP42

4 5
3 6
2 7
1 8

56_0804_8P4R_5%

RP47

4 5
3 6
2 7
1 8

56_0804_8P4R_5%

RP50

4 5
3 6
2 7
1 8

56_0804_8P4R_5%

RP56

4 5
3 6
2 7
1 8

56_0804_8P4R_5%

RP59

4 5
3 6
2 7
1 8

56_0804_8P4R_5%
RP63

4 5
3 6
2 7
1 8

56_0804_8P4R_5%

RP64

4 5
3 6
2 7
1 8

56_0804_8P4R_5%

RP66

4 5
3 6
2 7
1 8

56_0804_8P4R_5%

RP70

4 5
3 6
2 7
1 8

56_0804_8P4R_5%

A

RP41

45
36
27
18

56_0804_8P4R_5%

RP44

45
36
27
18

56_0804_8P4R_5%
RP45

45
36
27
18

56_0804_8P4R_5%
RP49

45
36
27
18

56_0804_8P4R_5%

RP52

45
36
27
18

56_0804_8P4R_5%
RP53

45
36
27
18

56_0804_8P4R_5%
RP58

45
36
27
18

56_0804_8P4R_5%

RP61

45
36
27
18

56_0804_8P4R_5%

RP65

45
36
27
18

56_0804_8P4R_5%
RP67

45
36
27
18

56_0804_8P4R_5%
RP68

45
36
27
18

56_0804_8P4R_5%
RP69

45
36
27
18

56_0804_8P4R_5%

DDRA_DQS0
DDRA_DM0
DDRA_DQ7
DDRA_DQ6

DDRA_DQ9
DDRA_DQ12
DDRA_DQS1
DDRA_DM1

DDRA_DQ15
DDRA_DQ14
DDRA_DQ11
DDRA_DQ10

DDRA_DQS2
DDRA_DM2
DDRA_DQ18
DDRA_DQ19

DDRA_DQ29
DDRA_DQ28
DDRA_DQS3
DDRA_DM3

DDRA_DQ27
DDRA_DQ26
DDRA_DQ30
DDRA_DQ31

DDRB_SMA12
DDRB_SMA9
DDRB_SMA7
DDRB_SMA5

DDRB_SMA3
DDRB_SMA1
DDRB_SBS0
DDRB_SWE#

DDRA_DQS4
DDRA_DQ38

DDRA_DQ39

DDRA_DQ44
DDRA_DQ40
DDRA_DQS5
DDRA_DM5

DDRA_DQ46
DDRA_DQ42
DDRA_DQ47
DDRA_DQ43

DDRA_DQ52
DDRA_DQ49
DDRA_DQ53
DDRA_DQ48

+DDRVTT

B

DDRA_DQ[0..63]<11>
DDRA_DM[0..7]<11>
DDRA_DQS[0..7]<11>
DDRB_SMA[0..13]<7>

RP72

RP73

B

DDRB_SMA10

12

R38356_0402_5%

DDRB_CKE1

12

R36556_0402_5%

DDRB_CKE0

12

R36256_0402_5%

RP71

DDRA_DQ50

45

DDRA_DQ51

36

DDRA_DQ60

27

DDRA_DQ61

18

56_0804_8P4R_5%

45
36
27
18

56_0804_8P4R_5%

45
36
27
18

56_0804_8P4R_5%

DDRA_DQ[0..63]
DDRA_DM[0..7]
DDRA_DQS[0..7]
DDRB_SMA[0..13]

DDRA_DQ56DDRA_DM4
DDRA_DQ58
DDRA_DQS7
DDRA_DM7

DDRA_DQ57
DDRA_DQ63
DDRA_DQ62
DDRA_DQ59

C

+DDRVCC +DDRVCC

DDRB_CLK1<6>
DDRB_CLK1#<6>

DDRB_CKE1<6>

DDRB_SBS0<7>
DDRB_SWE#<7>
DDRB_SCS#0<6>

D_CK_SDATA<11,14>
D_CK_SCLK<11,14>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

C

+DIMM_VREF

DDRA_DQ1
DDRA_DQ5

DDRA_DQS0
DDRA_DQ7

DDRA_DQ3
DDRA_DQ13

DDRA_DQ9
DDRA_DQS1

DDRA_DQ15
DDRA_DQ11

DDRA_DQ16
DDRA_DQ20

DDRA_DQS2
DDRA_DQ18

DDRA_DQ22
DDRA_DQ25

DDRA_DQ29
DDRA_DQS3

DDRA_DQ27
DDRA_DQ30

DDRB_CKE1
DDRB_SMA12

DDRB_SMA9
DDRB_SMA7

DDRB_SMA5
DDRB_SMA3
DDRB_SMA1

DDRB_SMA10
DDRB_SBS0
DDRB_SWE#
DDRB_SCS#0
DDRB_SMA13

DDRA_DQ36
DDRA_DQ33

DDRA_DQS4
DDRA_DQ38

DDRA_DQ35
DDRA_DQ41

DDRA_DQ44
DDRA_DQS5

DDRA_DQ46
DDRA_DQ47

DDRA_DQ52
DDRA_DQ53

DDRA_DQS6
DDRA_DQ54

DDRA_DQ50
DDRA_DQ60

DDRA_DQ56
DDRA_DQS7

DDRA_DQ57
DDRA_DQ62

D_CK_SDATA
D_CK_SCLK

+3VS

Compal Secret Data

JP20

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0#

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2#

93

VDD

95

CKE1

97

DU/A13

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE#

121

S0#

123

DU

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD_SPD

199

VDD_ID

AMP_1565918-1

Deciphered Date

D

DU/RESET#

DU/BA2

D

VREF

VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7

DQ12

VDD

DQ13

DM1

VSS
DQ14
DQ15

VDD

VDD

VSS

VSS

DQ20
DQ21

VDD

DM2
DQ22

VSS
DQ23
DQ28

VDD
DQ29

DM3

VSS
DQ30
DQ31

VDD

CB4

CB5

VSS

DM8

CB6

VDD

CB7

VSS

VSS

VDD

VDD

CKE0

VSS

VDD

BA1

RAS#
CAS#

VSS
DQ36
DQ37

VDD

DM4
DQ38

VSS
DQ39
DQ44

VDD
DQ45

DM5

VSS
DQ46
DQ47

VDD
CK1#

CK1

VSS
DQ52
DQ53

VDD

DM6
DQ54

VSS
DQ55
DQ60

VDD
DQ61

DM7

VSS
DQ62
DQ63

VDD

SA0

SA1

SA2

A11

S1#

E

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102

A8

104
106

A6

108

A4

110

A2

112

A0

114
116
118
120
122
124

DU

126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DU

DDRA_DQ0
DDRA_DQ4

DDRA_DM0
DDRA_DQ6

DDRA_DQ2
DDRA_DQ8

DDRA_DQ12
DDRA_DM1

DDRA_DQ14
DDRA_DQ10

DDRA_DQ17
DDRA_DQ21

DDRA_DM2
DDRA_DQ19

DDRA_DQ23
DDRA_DQ24

DDRA_DQ28
DDRA_DM3

DDRA_DQ26
DDRA_DQ31

DDRB_CKE0
DDRB_SMA11

DDRB_SMA8
DDRB_SMA6

DDRB_SMA4
DDRB_SMA2
DDRB_SMA0

DDRB_SBS1
DDRB_SRAS#
DDRB_SCAS#
DDRB_SCS#1

DDRA_DQ37
DDRA_DQ32

DDRA_DM4
DDRA_DQ39

DDRA_DQ34
DDRA_DQ45

DDRA_DQ40
DDRA_DM5

DDRA_DQ42
DDRA_DQ43

DDRA_DQ49
DDRA_DQ48

DDRA_DM6
DDRA_DQ55

DDRA_DQ51
DDRA_DQ61

DDRA_DQ58
DDRA_DM7

DDRA_DQ63
DDRA_DQ59

+3VS

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

DDR-SODIMM SLOT1
Boston LA-2721

下午

+DIMM_VREF

1

C297

0.1U_0402_16V4Z

2

DDRB_CKE0 <6>

DDRB_SBS1 <7>
DDRB_SRAS# <7>
DDRB_SCAS# <7>
DDRB_SCS#1 <6>

DDRB_CLK2# <6>
DDRB_CLK2 <6>

E

1.0

12 532005/5/6 11:47:58

A

B

C

D

E

Layout note :

Distribute as clo se as possible
to DDR-SODIMM.

+DDRVCC

1 1

1

C316

0.1U_0402_16V4Z

2

1

C313

0.1U_0402_16V4Z

2

1

C304

0.1U_0402_16V4Z

2

1

C411

0.1U_0402_16V4Z

2

1

C460

0.1U_0402_16V4Z

2

+DDRVCC+DDRVCC

1

C449

0.1U_0402_16V4Z

2

1

C448

0.1U_0402_16V4Z

2

1

C396

0.1U_0402_16V4Z

2

1

C300

0.1U_0402_16V4Z

2

1

C377

0.1U_0402_16V4Z

2

1

C457

0.1U_0402_16V4Z

2

1

C337

0.1U_0402_16V4Z

2

1

C349

0.1U_0402_16V4Z

2

1

+

C35
150U_D2_6.3VM

2

1

+

C8
150U_D2_6.3VM

2

Layout note :

2 2

3 3

Place one cap close to every 2 pull up resistors termination to
+1.25V

+DDRVTT

1

2

+DDRVTT

1

2

+DDRVTT

1

2

+DDRVTT

1

2

C338

0.1U_0402_16V4Z

C308

0.1U_0402_16V4Z

C455

0.1U_0402_16V4Z

C442

0.1U_0402_16V4Z

1

C305

0.1U_0402_16V4Z

2

1

C314

0.1U_0402_16V4Z

2

1

C454

0.1U_0402_16V4Z

2

1

C458

0.1U_0402_16V4Z

2

1

C366

0.1U_0402_16V4Z

2

1

C325

0.1U_0402_16V4Z

2

1

C430

0.1U_0402_16V4Z

2

1

C40

0.1U_0402_16V4Z

2

1

C422

0.1U_0402_16V4Z

2

1

C379

0.1U_0402_16V4Z

2

1

C459

0.1U_0402_16V4Z

2

1

C301

0.1U_0402_16V4Z

2

1

C452

0.1U_0402_16V4Z

2

1

C345

0.1U_0402_16V4Z

2

1

C456

0.1U_0402_16V4Z

2

1

C425

0.1U_0402_16V4Z

2

1

C389

0.1U_0402_16V4Z

2

1

C408

0.1U_0402_16V4Z

2

1

C403

0.1U_0402_16V4Z

2

1

C420

0.1U_0402_16V4Z

2

1

C303

0.1U_0402_16V4Z

2

1

C453

0.1U_0402_16V4Z

2

1

C419

0.1U_0402_16V4Z

2

1

C370

0.1U_0402_16V4Z

2

1

C387

0.1U_0402_16V4Z

2

1

C416

0.1U_0402_16V4Z

2

1

C433

0.1U_0402_16V4Z

2

1

C382

0.1U_0402_16V4Z

2

+DDRVTT

1

2

C39

0.1U_0402_16V4Z

+DDRVTT

1

C361

0.1U_0402_16V4Z

2

1

C33

0.1U_0402_16V4Z

2

1

C333

0.1U_0402_16V4Z

2

1

C37

0.1U_0402_16V4Z

2

1

C356

0.1U_0402_16V4Z

2

1

C428

0.1U_0402_16V4Z

2

1

C327

0.1U_0402_16V4Z

2

1

C30

0.1U_0402_16V4Z

2

1

C398

0.1U_0402_16V4Z

2

1

C446

0.1U_0402_16V4Z

2

1

C410

0.1U_0402_16V4Z

2

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

C

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

D

Date: Sheet

Compal Electronics, Inc.

DDR SODIMM Decoupling
Boston LA-2721

下午

E

of

13 532005/5/6 11:47:56

1.0

A

FSC FSB FSA CPU

CLKSEL0 CLKSEL1 CLKSEL2

*

1 1

0

*

0

0
0
1
1

+3VS

CLKSEL1

CLKSEL0

A

CLKSEL2

CLK_PCI0

CLK_PCI2

CLK_PCI1

+3VS

2

1 3

D

R439
0_0402_5%@

R448
0_0402_5%@

1 2

R401 10K_0402_5%

1 2

R420 10K_0402_5%

1 2

R466 10K_0402_5%

1 2

R419 10K_0402_5%

2 2

3 3

CK_SCLK<19>

4 4

CLK_ICH_48M<19>
CLK_SD_48M<24>

CLK_14M_CODEC<30>

R457

4.7K_0402_5%

G

1 2

S

Q51
2N7002_SOT23

R422

4.7K_0402_5%

1 2
1 2

R455

4.7K_0402_5%

1 2
1 2

11
1
1
00

30P_0402_50V8J

D_CK_SCLK

+1.05VS

R432

1 2

R440
0_0402_5%

+1.05VS

R450

1 2

R456
0_0402_5%

B

1

C461

2

2.2U_0603_6.3V6K

+CLK_VDD2

MHz

100
133
166
200

SRC

PCI

MHz

MHz

100 33.3
100

33.3

100

33.3

100

33.3

Table : ICS 95 4226AGT

C511

30P_0402_50V8J

CLK_PCI_MINI<29>
CLK_PCI_SIO<33,34>
CLK_PCI_PCM<24>
CLK_PCI_LPC<35>

CLK_PCI_ICH<17>
D_CK_SCLK<11,12>

D_CK_SDATA<11,12>

+3VS

1K_0402_5%@
R429

0_0402_5%

1 2

1K_0402_5%@
R451

0_0402_5%

1 2

1 2

C510

1 2

Y4

14.318MHZ_16PF_DSX840GA

12

CLK_ICH_48M

CLK_14M_CODEC CLKSEL0

CK_SDATA<19>

12

12

B

R402 12_0402_5%

1 2

R403 12_0402_5%

1 2

R463 12_0402_5%

CLK_PCI_MINI CLK_PCI4

CLK_PCI_ICH
D_CK_SCLK

D_CK_SDATA

MCH_CLKSEL1 <6>
CPU_BSEL1 <5>

MCH_CLKSEL0 <6>
CPU_BSEL0 <5>

1 2

R430 33_0402_5%

1 2

R431 33_0402_5%

1 2

R467 33_0402_5%

1 2

R410 33_0402_5%

1 2

R411 33_0402_5%

+3VS

2

G

1 3

D

S

Q50
2N7002_SOT23

C

+CLK_VDD48 +CLK_VDDREF

1 2

R465 1_0402_5%

1 2

R412 2.2_0402_5%

12

R464 475_0402_1%

R449

4.7K_0402_5%

1 2

5IN1@

1 2

D_CK_SDATA

1

C470

2

0.047U_0402_16V7K

+CLK_VDD1

+CLK_VDD1

+CLK_VDDREF

15mil

+CLK_VDD48

15mil

XTALIN
XTALOUT

CLKSEL2CLK_SD_48M

CLKSEL1

CLK_PCI3CLK_PCI_SIO
CLK_PCI2CLK_PCI_PCM
CLK_PCI1CLK_PCI_LPC

CLK_PCI0

CLKIREF

15mil

+3VS

U35

21

VDDPCIEX_0

28

VDDPCIEX_1

34

VDDPCIEX_2

1

VDDPCI_0

7

VDDPCI_1

42

VDDCPU

48

VDDREF

11

VDD48

50

X1

49

X2

12

FS_A/USB_48MHz

53

REF1/FSLC/TEST_SEL

16

FSLB/TEST_MODE

5

PCICLK5

4

PCICLK4

3

PCICLK3

56

PCICLK2/REQ_SEL

9

SELPCIEX_LCDCLK#/PCICLK_F1

8

ITP_EN/PCICLK_F0

46

SCLK

47

SDATA

39

IREF

13

GND_0

29

GND_1

2

GND_2

45

GND_3

51

GND_4

6

GND_5

ICS954226AGT_TSSOP56

D

1

C505

0.047U_0402_16V7K

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

R443 0_0805_5%

1 2

+3VS

VDDA
GNDA

PCI/SRC_STOP#

CPU_STOP#

CPUCLKT1
CPUCLKC1

CPUCLKT0
CPUCLKC0

CPUCLKT2_ITP/PCIEXT6

CPUCLKC2_ITP/PCIEXC6

PEREQ1#/PCIEXT5
PEREQ2#/PCIEXC5

PCIEXT4

PCIEXC4

SATACLKT
SATACLKC

PCIEXT3

PCIEXC3

PCIEXT2

PCIEXC2

PCIEXT1

PCIEXC1

LCDCLK_SS/PCIEX0T

LCDCLK_SS/PCIEX0C

DOTT_96MHz
DOTC_96MHz

VTT_PWRGD#/PD

REF0

2005/05/06 2006/05/06

E

1

C468

2.2U_0603_6.3V6K

2

1

37
38

55
54

41
40

44
43

36
35

33
32

31
30

26
27

24
25

22
23

19
20

17
18

14
15

10
52

2

STP_PCI#
STP_CPU#

CLK_CPU1
CLK_CPU1#

CLK_CPU0
CLK_CPU0#

CLK_CPU2
CLK_CPU2#

CLK_SRC5
CLK_SRC5#

CLK_SRC4
CLK_SRC4#

CLK_SRC3
CLK_SRC3#

CLK_SRC2
CLK_SRC2#

CLK_SRC1
CLK_SRC1#

CLK_SRC0
CLK_SRC0#

CLK_DOT
CLK_DOT#

CLK_REF CLK_14M_SIO

1

C472

0.047U_0402_16V7K

2

+CLK_VCCA

40mil

C515

2.2U_0603_6.3V6K

R473 33_0402_5%

1 2

R472 33_0402_5%

1 2

R475 33_0402_5%

1 2

R474 33_0402_5%

1 2

R471 33_0402_5%@

1 2

R470 33_0402_5%@

1 2

R469 33_0402_5%

1 2

R468 33_0402_5%

1 2

R414 33_0402_5%

1 2

R413 33_0402_5%

1 2

R434 33_0402_5%

1 2

R433 33_0402_5%

1 2

R416 33_0402_5%

1 2

R415 33_0402_5%

1 2

R436 33_0402_5%

1 2

R435 33_0402_5%

1 2

R418 33_0402_5%

1 2

R417 33_0402_5%

1 2

R438 33_0402_5%

1 2

R437 33_0402_5%

1 2

1 2

R461 12_0402_5%

1 2

R462 12_0402_5%

Compal Secret Data

Deciphered Date

E

F

1 2

R483

2.2_0402_5%

1

C506

2

0.047U_0402_16V7K

PM_STP_PCI# <19>
PM_STP_CPU# <19,50>

CLK_ICH_14M

F

1

C471

0.047U_0402_16V7K

2

+CLK_VDD1

+3VS

CLK_MCH_BCLK
CLK_MCH_BCLK#

CLK_CPU_BCLK
CLK_CPU_BCLK#

CLK_CPU_ITP
CLK_CPU_ITP#

CLK_PCIE_LAN
CLK_PCIE_LAN#

CLK_PCIE_SATA
CLK_PCIE_SATA#

CLK_MCH_3GPLL
CLK_MCH_3GPLL#

CLK_PCIE_VGA
CLK_PCIE_VGA#

CLK_PCIE_ICH
CLK_PCIE_ICH#

CLK_DREF_SSC
CLK_DREF_SSC#

CLK_DREF_96M
CLK_DREF_96M#

1 2

+3VS

R421 10K_0402_5%

VTT_POWERGD#

CLK_14M_SIO <33,34>

CLK_ICH_14M <19>

G

40mil

+CLK_VDD1

1

C503

0.047U_0402_16V7K

2

R442 0_0805_5%

1 2

CLK_MCH_BCLK <6>
CLK_MCH_BCLK# <6>

CLK_CPU_BCLK <4>
CLK_CPU_BCLK# <4>

CLK_PCIE_LAN <27>
CLK_PCIE_LAN# <27>

CLK_PCIE_SATA <18>
CLK_PCIE_SATA# <18>

CLK_MCH_3GPLL <8>
CLK_MCH_3GPLL# <8>

CLK_PCIE_VGA <16>
CLK_PCIE_VGA# <16>

CLK_PCIE_ICH <19>
CLK_PCIE_ICH# <19>

CLK_DREF_SSC <6>
CLK_DREF_SSC# <6>

CLK_DREF_96M <6>
CLK_DREF_96M# <6>

Title

Size Document Number Rev

Date: Sheet

1

C504

0.047U_0402_16V7K

2

1

C477

2

2.2U_0603_6.3V6K

2

G

1 3

D

S

Q47
2N7002_SOT23

Compal Electronics, Inc.

Clock Generator
Boston LA-2721

下午

G

Clock Generator

40mil

1

C473

2

0.047U_0402_16V7K

CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_CPU_ITP
CLK_CPU_ITP#
CLK_PCIE_LAN
CLK_PCIE_LAN#
CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_PCIE_ICH
CLK_PCIE_ICH#
CLK_DREF_SSC
CLK_DREF_SSC#
CLK_DREF_96M
CLK_DREF_96M#

VGATE <6,19,50>

+CLK_VDD2

1 2

R485 49.9_0402_1%

1 2

R484 49.9_0402_1%

1 2

R487 49.9_0402_1%

1 2

R486 49.9_0402_1%

1 2

R482 49.9_0402_1%@

1 2

R481 49.9_0402_1%@

1 2

R480 49.9_0402_1%

1 2

R479 49.9_0402_1%

1 2

R405 49.9_0402_1%

1 2

R404 49.9_0402_1%

1 2

R424 49.9_0402_1%

1 2

R423 49.9_0402_1%

1 2

R407 49.9_0402_1%

1 2

R406 49.9_0402_1%

1 2

R426 49.9_0402_1%

1 2

R425 49.9_0402_1%

1 2

R409 49.9_0402_1%

1 2

R408 49.9_0402_1%

1 2

R428 49.9_0402_1%

1 2

R427 49.9_0402_1%

H

1

C476

2

0.047U_0402_16V7K

of

14 532005/5/6 11:47:58

H

1.0

A

CRT Connector

1 1

VGA_CRT_R<16>
GMCH_CRT_R<8>

VGA_CRT_G<16>
GMCH_CRT_G<8>

VGA_CRT_B<16>
GMCH_CRT_B<8>

1 2

R15 0_0402_5%NO VGA@

1 2

R24 0_0402_5%NO VGA@

1 2

R16 0_0402_5%NO VGA@

DOCKIN#<35,40>

Close to VGA conn.

VGA_CRT_R
VGA_CRT_G

2 2

3 3

1 2

R10 0_0402_5%WOD@

1 2

R21 0_0402_5%WOD@

1 2

R12 0_0402_5%WOD@

Pop with No-Docking

CRT_R
CRT_G
CRT_BVGA_CRT_B

VGA_CRT_HSYNC<16>

GMCH_CRT_HSYNC<8>

VGA_CRT_VSYNC<16>

GMCH_CRT_VSYNC<8>

+3VS

+2.5VS

GMCH_CRT_DATA<8>

VGA_DDC_DATA<16>

VGA_DDC_CLK<16>

GMCH_CRT_CLK<8>

DOCKIN#

1 2

VGA_DDC_DATA

1 2

0_0402_5% NOVGA@

B

1

SEL

15

OE#

4

1A

7

2A

9

3A

12

4A

8

GND

WD@

1 2

R26 39_0402_5%NOVGA@

1 2

R22 39_0402_5%NOVGA@

U3

FSAV330MTC_TSSOP16

16

VCC

2

1B1

5

2B1

11

3B1

14

4B1

3

1B2

6

2B2

10

3B2

13

4B2

1 2

C299 0.1U_0402_16V4Z

Close to VGA conn.

R270_0402_5% VGA@

12

R230_0402_5% NOVGA@

12

R140_0402_5%NOVGA@

G

2

4.7K_0402_5%

13

D

S

G

2

BSS138_SOT23

13

D

S

Q3

BSS138_SOT23

R9

+5VS

C10

D_CRT_R
D_CRT_G
D_CRT_B

R7

150_0402_1%

12

R11

Q5

0.1U_0402_16V4Z

1 2

WD@

12

R18

150_0402_1%

C296 0.1U_0402_16V4Z

+5VS

12

R19

4.7K_0402_5%

D_CRT_R
D_CRT_G
D_CRT_B

D_CRT_R <40>
D_CRT_G <40>
D_CRT_B <40>

12

12

R8

150_0402_1%

+5VS

1

5

P

4

OE#

A2Y

G

U33

SN74AHCT1G125GW_SOT353-5

3

1 2

DSUB_12_DATA

DSUB_15_CLKVGA_DDC_CLK

C

R4 470_0402_1%

1 2

R320 470_0402_1%

1 2

R5 470_0402_1%

1 2

CRT_R

CRT_B

R319 10K_0402_5%

+5VS

1

5

P

4

OE#

A2Y

G

U32
SN74AHCT1G125GW_SOT353-5

3

2

1

12

D_CRT_HSYNC

D_CRT_VSYNC

8P_0402_50V8K

8P_0402_50V8K

2

C671

C672

1

8P_0402_50V8K

2

C673

1

L20

FCM2012C-800_0805

L21

FCM2012C-800_0805

L22

FCM2012C-800_0805

D

1 2
1 2
1 2

8P_0402_50V8K

D_CRT_HSYNC <40>

D_CRT_VSYNC <40>

VGA_DDC_DATA

VGA_DDC_CLK

C670

CRT Board

+5VS

R611

1 2

W=40mils

0_1206_5%

+3VS

DSUB_12_DATA
DSUB_15_CLK
HSYNC

VSYNC
CRT_R_L
CRT_G_LCRT_G
CRT_B_L

1

C669

2

8P_0402_50V8K

1

1

C668

2

2

8P_0402_50V8K

D_CRT_VSYNC VSYNC

+2.5VS

G

2

13

D

S

BSS138_SOT23 NOVGA@

+2.5VS

G

2

13

D

S

Q8

BSS138_SOT23 NOVGA@

JP2

1
2
3
4
5
6
7
8
9
10
11
12

ACES_85201-1205

For EMI request

1 2

L18 FCM1608C-121T_0603

1 2

L19 FCM1608C-121T_0603

10P_0402_50V8J

D_DDC_DATA

Q7

12

R290_0402_5% VGA@

D_DDC_CLK

12

R340_0402_5% VGA@

E

HSYNCD_CRT_HSYNC

1

C667

2

D_DDC_DATA <40>

D_DDC_CLK <40>

1

C666
10P_0402_50V8J

2

Close to VGA conn.

C85

1 2

22P_0402_50V8J

VGA_TV_LUMA<16>
GMCH_TV_LUMA<8>

VGA_TV_CRMA<16>
GMCH_TV_CRMA<8>

4 4

1 2

R17 0_0402_5%NOVGA@

1 2

R20 0_0402_5%NOVGA@

Close to VGA conn.

A

12

R66

150_0402_1%

12

R63

150_0402_1%

C87
100P_0402_25V8K

B

L2

L3

C76
100P_0402_25V8K

@

1 2

FBM-11-160808-121T_0603

1 2

FBM-11-160808-121T_0603

C86

CRMA_1
LUMA_1

1 2

C88
22P_0402_50V8J

@

C89

100P_0402_25V8K

100P_0402_25V8K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

C

TV-OUT Conn.

JP24

4

4

3

3

2

2

1

1

ALLTO_C10877-104A1-L_4P

Compal Secret Data

Deciphered Date

6
5

3. Y (luminance+sync)

5

4. C (crominance)

1. Y ground

2. C ground

6

Title

Size Document Number Rev

D

Date: Sheet of

Compal Electronics, Inc.

CRT & TVout Connector
Boston LA-2721

下午

15 532005/5/6 11:47:56

E

1.0

5

LCD POWER CIRCUIT

R1
300_0402_5%

NOVGA@

Q2

2N7002_SOT23

NOVGA@

BKOFF#<35>

+LCDVDD

12

13

D

S

BKOFF# DISPO FF#

D D

C C

B B

GMCH_ENVDD<8>

+3VALW

0.01U_0402_16V7K

NOVGA@

2

G

R3
100K_0402_5%

1 2

NOVGA@

D1
RB751V_SOD323

21

GMCH_ENVDD

U2

1

5

P

OE#

A2Y

1

C5

2

1

C3

2

0.047U_0402_16V7K

NOVGA@

+3VS

12

R6

4.7K_0402_5%

G

3

LCD/PANEL BD. Conn.

+3VS

1

C4

0.1U_0402_16V4Z@

A A

2

+LCDVDD

GMCH_LCD_CLK<8>
GMCH_LCD_DATA<8>

DAC_BRIG<35>
INVT_PWM<35>

GMCH_LCD_CLK
GMCH_LCD_DATA

DAC_BRIG
INVT_PWM

DISPOFF#

B+

4

SN74AHCT1G125GW_SOT353-5

NOVGA@

4

R2

1 2

100_0402_5%

NOVGA@

JP4

2
4
6
8
10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

ACES_88242-3000

NOVGA@

G

2

1
3
5
7
9

+3VS

S

D

1 3

1

C2

2

Q1

NOVGA@

AO3413_SOT23

4.7U_0805_10V4Z

NOVGA@

GMCH_TXOUT0- <8>
GMCH_TXOUT0+ <8>

GMCH_TXOUT1- <8>
GMCH_TXOUT1+ <8>

GMCH_TXOUT2+ <8>
GMCH_TXOUT2- <8>

GMCH_TXCLK- <8>
GMCH_TXCLK+ <8>

+LCDVDD

1

2

C1

0.1U_0402_16V4Z

NOVGA@

PLTRST_VGA#<19>
PLT_RST#<6,17,19,21,22,24,27,34,35>

3

PCIE_MTX_C_GRX_N[0..15]<8>
PCIE_MTX_C_GRX_P[0..15]<8>

PCEI_GTX_C_MRX_N[0..15]<8>
PCEI_GTX_C_MRX_P[0..15]<8>

2

PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]

PCEI_GTX_C_MRX_N[0..15]

PCEI_GTX_C_MRX_P[0..15]

1

VGA BOARD Conn.

JP19

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
57 58
59 60
61 62
63 64
65 66
67 68
69 70
71 72
73 74
75 76
77 78
79 80
81 82
83 84
85 86
87 88
89 90
91 92
93 94
95 96
97 98
99 100
101 102
103 104
105 106
107 108
109 110
111 112
113 114
115 116
117 118
119 120
121 122
123 124
125 126
127 128
129 130
131 132
133 134
135 136
137 138
139 140
141 142
143 144
145 146
147 148
149 150
151 152
153 154
155 156
157 158
159 160

ACES_88081-1600VGA@

VGA_DDC_CLK
VGA_DDC_DATA

VGA_TV_LUMA
VGA_TV_CRMA
VGA_CRT_VSYNC

VGA_CRT_HSYNC
SUSP#
GMCH_ENBKL

+3VS

+5VS

+5VALW

PCIE_MTX_C_GRX_P0

PCIE_MTX_C_GRX_N0

PCIE_MTX_C_GRX_P1

PCIE_MTX_C_GRX_N1

PCIE_MTX_C_GRX_P2

PCIE_MTX_C_GRX_N2

PCIE_MTX_C_GRX_P3

PCIE_MTX_C_GRX_N3

PCIE_MTX_C_GRX_P4

PCIE_MTX_C_GRX_N4

PCIE_MTX_C_GRX_P5

PCIE_MTX_C_GRX_N5

PCIE_MTX_C_GRX_P6

PCIE_MTX_C_GRX_N6

PCIE_MTX_C_GRX_P7

PCIE_MTX_C_GRX_N7

PCIE_MTX_C_GRX_P8

PCIE_MTX_C_GRX_N8

PCIE_MTX_C_GRX_P9

PCIE_MTX_C_GRX_N9

PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10

PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11

PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12

PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13

PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14

PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15

B+

VGA_DDC_CLK <15>
VGA_DDC_DATA <15>

VGA_TV_LUMA <15>
VGA_TV_CRMA <15>
VGA_CRT_VSYNC <15>

VGA_CRT_HSYNC <15>
SUSP# <26,30,32,35,37,38,42,49>
GMCH_ENBKL <8,35>

+1.5VS
DVI_DET <40>
DVI_SCLK <40>
DVI_SDATA <40>

CLK_PCIE_VGA <14>
CLK_PCIE_VGA# <14>

VGA_CRT_R<15>
VGA_CRT_G<15>
VGA_CRT_B<15>

DVI_TXC+< 40>
DVI_TXC-<40>

DVI_TXD0+<40>
DVI_TXD0-<40>

DVI_TXD1+<40>
DVI_TXD1-<40>

DVI_TXD2+<40>
DVI_TXD2-<40>

R38 0_0402_5%VGA@
R35 0_0402_5%@

+3VALW

+2.5VS

1 2
1 2

B+

DAC_BRIG
DISPOFF#

INVT_PWM
VGA_CRT_R
VGA_CRT_G
VGA_CRT_B

PCEI_GTX_C_MRX_P0
PCEI_GTX_C_MRX_N0

PCEI_GTX_C_MRX_P1
PCEI_GTX_C_MRX_N1

PCEI_GTX_C_MRX_P2
PCEI_GTX_C_MRX_N2

PCEI_GTX_C_MRX_P3
PCEI_GTX_C_MRX_N3

PCEI_GTX_C_MRX_P4
PCEI_GTX_C_MRX_N4

PCEI_GTX_C_MRX_P5
PCEI_GTX_C_MRX_N5

PCEI_GTX_C_MRX_P6
PCEI_GTX_C_MRX_N6

PCEI_GTX_C_MRX_P7
PCEI_GTX_C_MRX_N7

PCEI_GTX_C_MRX_P8
PCEI_GTX_C_MRX_N8

PCEI_GTX_C_MRX_P9
PCEI_GTX_C_MRX_N9

PCEI_GTX_C_MRX_P10
PCEI_GTX_C_MRX_N10

PCEI_GTX_C_MRX_P11
PCEI_GTX_C_MRX_N11

PCEI_GTX_C_MRX_P12
PCEI_GTX_C_MRX_N12

PCEI_GTX_C_MRX_P13
PCEI_GTX_C_MRX_N13

PCEI_GTX_C_MRX_P14
PCEI_GTX_C_MRX_N14

PCEI_GTX_C_MRX_P15
PCEI_GTX_C_MRX_N15

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

2

Date: Sheet of

Compal Electronics, Inc.

VGA / LCD CONN.
Boston LA-2721

下午

16 532005/5/6 11:47:55

1

1.0

5

4

3

2

1

RP37

+3VS

D D

+3VS

+3VS

+3VS

C C

+3VS

+3VS

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

RP36

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

RP39

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

RP35

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

RP34

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

RP38

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

PCI_SERR#
PCI_TRDY#
PCI_FRAME#
PCI_STOP#

PCI_PLOCK#
PCI_IRDY#
PCI_PERR#
PCI_DEVSEL#

PCI_PIRQD#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQA#

PCI_PIRQE#
PCI_PIRQF#

PCI_REQ#6

PCI_REQ#5
PCI_REQ#3
PCI_REQ#1
PCI_REQ#4

PCI_REQ#0
PCI_REQ#2
PCI_PIRQH#

PCI_AD[0..31]<24,29>

PCI_FRAME#<24,29>

PCI_PIRQA#<24>

PCI_PIRQB#<24>
PCI_PIRQC#<24>
PCI_PIRQD#<24>

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27PCI_PIRQG#
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_FRAME#

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

U13B

E2

AD[0]

E5

AD[1]

C2

AD[2]

F5

AD[3]

F3

AD[4]

E9

AD[5]

F2

AD[6]

D6

AD[7]

E6

AD[8]

D3

AD[9]

A2

AD[10]

D2

AD[11]

D5

AD[12]

H3

AD[13]

B4

AD[14]

J5

AD[15]

K2

AD[16]

K5

AD[17]

D4

AD[18]

L6

AD[19]

G3

AD[20]

H4

AD[21]

H2

AD[22]

H5

AD[23]

B3

AD[24]

M6

AD[25]

B2

AD[26]

K6

AD[27]

K3

AD[28]

A5

AD[29]

L1

AD[30]

K4

AD[31]

J3

FRAME#

Interrupt I/F

N2

PIRQ[A]#

L2

PIRQ[B]#

M1

PIRQ[C]#

L3

PIRQ[D]#

AC5

SATA[1]RXN/RSVD[1]

AD5

SATA[1]RXP/RSVD[2]

AF4

SATA[1]TXN/RSVD[3]

AG4

SATA[1]TXP/RSVD[4]

AC9

SATA[3]RXN/RSVD[5]

AD9

SATA[3]RXP/RSVD[6]

AF8

SATA[3]TXN/RSVD[7]

AG8

SATA[3]TXP/RSVD[8]

U3

TP[3]/RSVD[9]

ICH6_BGA609R3SB@

PCI

REQ[4]#/GPI[40]

GNT[4]#/GPO[48]

REQ[5]#/GPI[1]

GNT[5]#/GPO[17]

REQ[6]#/GPI[0]

GNT[6]#/GPO[16]

DEVSEL#

PIRQ[E]#/GPI[2]

PIRQ[F]#/GPI[3]
PIRQ[G]#GPI[4]

PIRQ[H]#/GPI[5]

RESERVED

REQ[0]#
GNT[0]#
REQ[1]#
GNT[1]#
REQ[2]#
GNT[2]#
REQ[3]#
GNT[3]#

C/BE[0]#
C/BE[1]#
C/BE[2]#
C/BE[3]#

IRDY#

PAR

PCIRST#

PERR#

PLOCK#

SERR#
STOP#
TRDY#

PLTRST#

PCICLK

PME#

L5
C1
B5
B6
M5
F1
B8
C8
F7
E7
E8
F6
B7
D8

J6
H6
G4
G2

A3
E1
R2
C3
E3
C5
G5
J1
J2

R5
G6
P6

D9
C7
C6
M3

PCI_REQ#0
PCI_REQ#1

PCI_GNT#1
PCI_REQ#2
PCI_GNT#2
PCI_REQ#3

PCI_REQ#4
PCI_REQ#5

PCI_GNT#5
PCI_REQ#6

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

PCI_IRDY#
PCI_PAR
PCI_RST#
PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#

PLT_RST#
CLK_PCI_ICH

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

PCI_REQ#1 <29>
PCI_GNT#1 <29>
PCI_REQ#2 <24>
PCI_GNT#2 <24>

R230 0_0402_5%NOSIO@

PCI_IRDY# <24,29>
PCI_PAR <24,29>

PCI_DEVSEL# <24,29>
PCI_PERR# <24,29>

PCI_STOP# <24,29>
PCI_TRDY# <24,29>

PLT_RST# <6,16,19,21,22,24,27,34,35>
CLK_PCI_ICH <14>

PCI_PIRQG# <29>
PCI_PIRQH# <29>

T5PAD~D

T3PAD~D
T4PAD~D

12

PCI_C/BE#0 <24,29>
PCI_C/BE#1 <24,29>
PCI_C/BE#2 <24,29>
PCI_C/BE#3 <24,29>

PCI_RST# <24,29,34,35>

BT_DET# <33,34,36>

C676 180P_0402_50V8J@

Internal Pull-up.
Sample hig h des tinatio n is LPC.

PCI_GNT#5

12

R529

0_0402_5%@

T2PAD~D

12

PCI_SERR# <24,29>

CLK_PCI_ICH

R528

10_0402_5%@

1 2
1

C615

10P_0402_50V8J@

2

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

2

Date: Sheet

Compal Electronics, Inc.

ICH6(1/4)
Boston LA-2721

下午

1

of

17 532005/5/6 11:47:55

1.0

5

4

3

2

1

+1.05VS

+RTCVCC

12

R228

32.768KHZ_12.5P_1TJS125BJ2A251

+RTCVCC

close to RAM door

ICH_AC_BITCLK
ICH_AC_SYNC AC_SYNC

ICH_AC_RST#

ICH_AC_SDOUT

SATA_DTX_C_IRX_N0<21>
SATA_DTX_C_IRX_P0<21>

+3VS

12

1M_0402_1%

INTRUDER#

R135
10K_0402_5%

PHDD_LED#

+3VS

R174 4.7K_0402_5%

1 2

R523 8.2K_0402_5%

1 2

ICH_AC_BITCLK<30,36>
ICH_AC_SYNC<30,36>

ICH_AC_RST#<30,36>

ICH_AC_SDOUT<30,36>

IDE_DIORDY

IDE_IRQ

D D

C C

B B

C201 18P_0402_50V8J
Y2

3

OUT

NC

2

IN

NC

C202 18P_0402_50V8J

R227
20K_0402_5%

R171 33_0402_5%

12

12

J2 JOPEN

C204

1U_0402_6.3V4Z

1 2

C607

22P_0402_50V8J

1 2

1 2

R178 24.9_0402_1%

ICH_AC_SDIN0<30>
ICH_AC_SDIN1<36>

PHDD_LED#<35>

CLK_PCIE_SATA#<14>

CLK_PCIE_SATA<14>

1 2

IDE_DIORDY<22>

IDE_IRQ<22>
IDE_DDACK#<22>
IDE_DIOW#<22>
IDE_DIOR#<22>

ICH_RTCX1

4
1

ICH_RTCX2

ICH_RTCRST#

R527
10_0402_5%

ICH_AC_SDIN0
ICH_AC_SDIN1

SATA_DTX_C_IRX_N0
SATA_DTX_C_IRX_P0
SATA_ITX_DRX_N0
SATA_ITX_DRX_P0

R193 1K_0402_5%
R197 1K_0402_5%

IDE_DIORDY
IDE_IRQ
IDE_DDACK#
IDE_DIOW#
IDE_DIOR#

12

R219

10M_0402_5%

INTRUDER#
INTVRMEN

12

PHDD_LED#

12
12

CLK_PCIE_SATA#
CLK_PCIE_SATA

SATARBIAS

AA2
AA3

AA5

D12
B12
D11
F13

F12
B11
E12

E11
C13

C12
C11
E13

C10

A10
F11

F10
B10

AC19

AE3
AD3
AG2

AF2
AD7

AC7

AF6
AG6

AC2
AC1

AG11

AF11

AF16
AB16
AB15
AC14
AE16

Y1
Y2

B9

C9

U13A

RTCX1
RTCX2

RTCRST#
INTRUDER#

INTVRMEN

EE_CS
EE_SHCLK
EE_DOUT
EE_DIN

LAN_CLK
LAN_RSTSYNC
LANRXD[0]

LANRXD[1]
LANRXD[2]

LANTXD[0]
LANTXD[1]
LANTXD[2]

ACZ_BIT_CLK
ACZ_SYNC

ACZ_RST#
ACZ_SDIN[0]

ACZ_SDIN[1]
ACZ_SDIN[2]

ACZ_SDO

SATALED#

SATA[0]RXN
SATA[0]RXP
SATA[0]TXN
SATA[0]TXP

SATA[2]RXN
SATA[2]RXP
SATA[2]TXN
SATA[2]TXP

SATA_CLKN
SATA_CLKP

SATARBIAS#
SATARBIAS

IORDY
IDEIRQ
DDACK#
DIOW#
DIOR#

ICH6_BGA609R3SB@

RTC

LAD[0]/FWH[0]
LAD[1]/FWH[1]
LAD[2]/FWH[2]
LAD[3]/FWH[3]

LPC

LDRQ[0]#

LDRQ[1]#/GPI[41]

LFRAME#/FWH[4]

A20GATE

A20M#

LAN

CPUSLP#

CPU

DPRSLP#/TP[4]

DPSLP#/TP[2]

FERR#

CPUPWRGD/GPO[49]

IGNNE#

INIT3_3V#

INIT#
INTR

RCIN#

SMI#

STPCLK#

THRMTRIP#

DA[0]
DA[1]
DA[2]

DCS1#
DCS3#

SATAAC-97/AZALIA

DD[0]
DD[1]
DD[2]
DD[3]

PIDE

DD[4]
DD[5]
DD[6]
DD[7]
DD[8]

DD[9]
DD[10]
DD[11]
DD[12]
DD[13]
DD[14]
DD[15]

DDREQ

NMI

LPC_LAD0

P2

LPC_LAD1

N3

LPC_LAD2

N5

LPC_LAD3

N4
N6

LPC_DRQ#1

P4

LPC_FRAME#

P3

EC_GA20

AF22

H_A20M#

AF23

R94 0_0402_5%@

AE27
AE24

AD27
AF24

R95 56_0402_5%

H_PWRGOOD

AG25

H_IGNNE#

AG26
AE22

H_INIT#

AF27

H_INTR

AG24

EC_KBRST#

AD23

H_NMI

AF25

H_SMI#

AG27

H_STPCLK#

AE26

THRMTRIP#

AE23

IDE_DA0

AC16

IDE_DA1

AB17

IDE_DA2

AC17

IDE_DCS1#

AD16

IDE_DCS3#

AE17

IDE_DD0

AD14

IDE_DD1

AF15

IDE_DD2

AF14

IDE_DD3

AD12

IDE_DD4

AE14

IDE_DD5

AC11

IDE_DD6

AD11

IDE_DD7

AB11

IDE_DD8

AE13

IDE_DD9

AF13

IDE_DD10

AB12

IDE_DD11

AB13

IDE_DD12

AC13

IDE_DD13

AE15

IDE_DD14

AG15

IDE_DD15

AD13

IDE_DDREQ

AB14

1 2

1 2

H_FERR#

LPC_AD0 <33,34,35>
LPC_AD1 <33,34,35>
LPC_AD2 <33,34,35>
LPC_AD3 <33,34,35>

LPC_DRQ#1 <33,34>
LPC_FRAME# <33,34,35>

R139 10K_0402_5%

EC_GA20 <35>
H_A20M# <4>

H_DPSLP# <4>

H_PWRGOOD <4>
H_IGNNE# <4>
H_INIT# <4>

H_INTR <4>

EC_KBRST# <35>
H_NMI <4>

H_SMI# <4>
H_STPCLK# <4>

1 2

H_CPUSLP#
H_DPRSTP#

H_FERR#FE RR#

R134

10K_0402_5%

1 2

IDE_DA[0..2] <22>

IDE_DCS1# <22>
IDE_DCS3# <22>

IDE_DD[0..15] <22>

IDE_DDREQ <22>

1 2

R96 56_0402_5%

+3VS

H_CPUSLP# <4,6>
H_DPRSTP# <4>

H_FERR# <4>

+3VS

R118

330_0402_5%@

+1.05VS

1 2

Place near ICH6 side.

SATA_ITX_DRX_N0

A A

SATA_ITX_DRX_P0 SATA_ITX_C_DRX_P0

C179 0.01U_0402_16V7K

C181 0.01U_0402_16V7K

5

SATA_ITX_C_DRX_N0

12

12

SATA_ITX_C_DRX_N0 <21>

SATA_ITX_C_DRX_P0 <21>

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

3

Compal Secret Data

Deciphered Date

2

+1.05VS

1 2

R121 75_0402_1%

Title

Size Document Number Rev

Date: Sheet

1

C

Q15

2

B

2SC2411K_SC59@

E

3

R124
56_0402_5%

H_THERMTRIP#

Compal Electronics, Inc.

ICH6(2/4)
Boston LA-2721

下午

MAINPWON <44,45,47>

THRMTRIP#

12

1

H_THERMTRIP# <4,6>

of

18 532005/5/6 11:47:55

1.0

5

+3VALW

1 2

R225 10K_0402_5%

1 2

R244 10K_0402_5%

1 2

R525 2.2K_0402_5%

1 2

R524 2.2K_0402_5%

1 2

R237 10K_0402_5%

D D

1 2

R222 10K_0402_5%@

1 2

R223 10K_0402_5%

1 2

R226 8.2K_0402_5%

1 2

R236 1K_0402_5%

1 2

R224 10K_0402_5%

+3VS

1 2

R155 10K_0402_5%

1 2

R154 8.2K_0402_5%

1 2

R150 10K_0402_5%

1 2

R145 10K_0402_5%

1 2

R146 10K_0402_5%

1 2

C680 33P_0402_50V8J@

ICH_SMLINK0
ICH_SMLINK1
CK_SCLK
CK_SDATA
LINKALERT#
EC_LID_OUT#
EC_SWI#
PM_BATLOW#
ICH_PCIE_WAKE#
SYSRST#

ICH_GPI7
PM_CLKRUN#
ICH_VGATE
MCH_SYNC#
SERIRQ

Reserve for noise

C C

B B

1 2

R220 10K_0402_5%

1 2

R234 10K_0402_5%

RP30

4 5
3 6
2 7
1 8

100_1206_8P4R_5%

1 2

R140 100K_0402_5%

SYS_PWROK
EC_RSMRST#

GPI29
GPI28
GPI27
GPI26

PM_DPRSLPVR

4

EC_SWI#<35>

CK_SCLK<14>
CK_SDATA<14>

SB_SPKR<30>

SUS_STAT#<37>

PM_BMBUSY#<6>

EC_SMI#<35>
ACIN<35,39,44>
EC_LID_OUT#<35>

EC_SCI#<35>

PM_STP_PCI#<14>

SB_INT_FLASH_SEL#<37>

PM_STP_CPU#<14,50>

PLTRST_VGA#<16>
IDE_HRESET#<21>
IDE_MRESET#<35>
EC_FLASH#<37>

PM_CLKRUN#<29,33,34>

ICH_PCIE_WAKE#<27>

SERIRQ<24,33,34,35>
EC_THERM#<35>
VGATE<6,14,50>

PM_SLP_S3#<35>
PM_SLP_S4#<35>
PM_SLP_S5#<35>

SYS_PWROK<41>
PM_DPRSLPVR<50>
PM_BATLOW#<35>

PBTN_OUT#<35>

PLT_RST#<6,16,17,21,22,24,27,34,35>

EC_RSMRST#<35>

EC_SWI#
GPI26

GPI27
GPI28
GPI29

CK_SCLK
CK_SDATA
LINKALERT#
ICH_SMLINK0
ICH_SMLINK1
MCH_SYNC#
SB_SPKR

SYSRST#
PM_BMBUSY#
ICH_GPI7

EC_SMI#
ACIN
EC_LID_OUT#

EC_SCI#
PM_STP_PCI#

PM_STP_CPU#

PLTRST_VGA#
IDE_HRESET#
IDE_MRESET#
EC_FLASH#

PM_CLKRUN#

ICH_PCIE_WAKE#
SERIRQ
EC_THERM#

R151 0_0402_5%

CLK_ICH_14M
CLK_ICH_48M

T6

PAD~D

PM_SLP_S3#
PM_SLP_S4#
PM_SLP_S5#

SYS_PWROK
PM_DPRSLPVR
PM_BATLOW#
PBTN_OUT#
PLT_RST#
EC_RSMRST#

ICH_VGATE

12

AE18
AG18

AG21

AD19
AE19

AC21
AB21
AD22

AD20
AD21

AC18

AB20
AC20

AE20

U13C

T2

RI#

AF17

SATA[0]GP/GPI[26]
SATA[1]GP/GPI[29]

AF18

SATA[2]GP/GPI[30]
SATA[3]GP/GPI[31]

Y4

SMBCLK

W5

SMBDATA

Y5

LINKALERT#

W4

SMLINK[0]

U6

SMLINK[1]
MCH_SYNC#

F8

SPKR

W3

SUS_STAT#/LPCPD#

U2

SYS_RESET#
BM_BUSY#/GPI[6]
GPI[7]

R1

GPI[8]

W6

SMBALERT#/GPI[11]

M2

GPI[12]

R6

GPI[13]
STP_PCI#/GPO[18]
GPO[19]
STP_CPU#/GPO[20]

GPO[21]
GPO[23]

V3

GPIO[24]

P5

GPIO[25]

R3

GPIO[27]

T3

GPIO[28]

AF19

CLKRUN#/GPIO[32]

AF20

GPIO[33]
GPIO[34]

U5

WAKE#
SERIRQ
THRM#

AF21

VRMPWRGD

E10

CLK14

A27

CLK48

V6

SUSCLK

T4

SLP_S3#

T5

SLP_S4#

T6

SLP_S5#

AA1

PWROK
DPRSLPVR/TP[1]

V2

BATLOW#/TP[0]

U1

PWRBTN#

V5

LAN_RST#

Y3

RSMRST#

ICH6_BGA609R3SB@

3

PCIE_PTX_C_IRX_N1

H25

PERn[1]
PERp[1]

PETn[1]
PETp[1]

PERn[2]
PERp[2]

PETn[2]
PETp[2]

PERn[3]
PERp[3]

PETn[3]
PETp[3]

GPIO

PERn[4]
PERp[4]

PETn[4]

PCI-EXPRESSDIRECT MEDIA INTERFACE

PETp[4]

DMI[0]RXN
DMI[0]RXP
DMI[0]TXN
DMI[0]TXP

DMI[1]RXN
DMI[1]RXP
DMI[1]TXN
DMI[1]TXP

DMI[2]RXN
DMI[2]RXP
DMI[2]TXN
DMI[2]TXP

DMI[3]RXN
DMI[3]RXP
DMI[3]TXN
DMI[3]TXP

DMI_CLKN
DMI_CLKP

DMI_ZCOMP
DMI_IRCOMP
OC[4]#/GPI[9]

OC[5]#/GPI[10]
OC[6]#/GPI[14]
OC[7]#/GPI[15]

OC[0]#
OC[1]#
OC[2]#
OC[3]#

USBP[0]N
USBP[0]P
USBP[1]N

CLOCK

USBP[1]P
USBP[2]N
USBP[2]P
USBP[3]N
USBP[3]P

USB

USBP[4]N
USBP[4]P
USBP[5]N
USBP[5]P
USBP[6]N
USBP[6]P
USBP[7]N

POWER MGT

USBP[7]P

USBRBIAS#

USBRBIAS

PCIE_PTX_C_IRX_P1

H24

PCIE_ITX_PRX_N1

G27

PCIE_ITX_PRX_P1

G26
K25

K24
J27
J26

M25
M24
L27
L26

P24
P23
N27
N26

DMI_MTX_IRX_N0

T25

DMI_MTX_IRX_P0

T24

DMI_ITX_MRX_N0

R27

DMI_ITX_MRX_P0

R26

DMI_MTX_IRX_N1

V25

DMI_MTX_IRX_P1

V24

DMI_ITX_MRX_N1

U27

DMI_ITX_MRX_P1

U26

DMI_MTX_IRX_N2

Y25

DMI_MTX_IRX_P2

Y24

DMI_ITX_MRX_N2

W27

DMI_ITX_MRX_P2

W26

DMI_MTX_IRX_N3

AB24

DMI_MTX_IRX_P3

AB23

DMI_ITX_MRX_N3

AA27

DMI_ITX_MRX_P3

AA26

CLK_PCIE_ICH#

AD25

CLK_PCIE_ICH

AC25

F24

DMI_IRCOMP

F23

USB_OC#4

C23

USB_OC#5

D23

USB_OC#6

C25

USB_OC#7

C24

USB_OC#0

C27

USB_OC#1

B27

USB_OC#2

B26

USB_OC#3

C26

USB20_N0

C21

USB20_P0

D21

USB20_N1

A20

USB20_P1

B20

USB20_N2

D19

USB20_P2

C19

USB20_N3

A18

USB20_P3

B18

USB20_N4

E17

USB20_P4

D17

USB20_N5

B16

USB20_P5

A16
C15
D15
A14
B14

A22
B22

USBRBIAS

2

PCIE_PTX_C_IRX_N1 <27>
PCIE_PTX_C_IRX_P1 <27>

1 2

C112 0.1U_0402_16V4Z

1 2

C113 0.1U_0402_16V4Z

DMI_MTX_IRX_N0 <6>
DMI_MTX_IRX_P0 <6>
DMI_ITX_MRX_N0 <6>
DMI_ITX_MRX_P0 <6>

DMI_MTX_IRX_N1 <6>
DMI_MTX_IRX_P1 <6>
DMI_ITX_MRX_N1 <6>
DMI_ITX_MRX_P1 <6>

DMI_MTX_IRX_N2 <6>
DMI_MTX_IRX_P2 <6>
DMI_ITX_MRX_N2 <6>
DMI_ITX_MRX_P2 <6>

DMI_MTX_IRX_N3 <6>
DMI_MTX_IRX_P3 <6>
DMI_ITX_MRX_N3 <6>
DMI_ITX_MRX_P3 <6>

CLK_PCIE_ICH# <14>
CLK_PCIE_ICH <14>

R510 24.9_0402_1%

1 2

USB20_N0 <40>
USB20_P0 <40>
USB20_N1 <39>
USB20_P1 <39>
USB20_N2 <39>
USB20_P2 <39>
USB20_N3 <39>
USB20_P3 <39>
USB20_N4 <39>
USB20_P4 <39>
USB20_N5 <36>
USB20_P5 <36>

1 2

R512 22_0402_1%

PCIE_ITX_C_PRX_N1
PCIE_ITX_C_PRX_P1

+1.5VS

USB PORT#

0
1
2
3
4
5
6
7

USB_OC#5
USB_OC#4
USB_OC#6
USB_OC#7

USB_OC#3
USB_OC#0
USB_OC#1
USB_OC#2

1

PCIE_ITX_C_PRX_N1 <27>
PCIE_ITX_C_PRX_P1 <27>

+3VALW

RP29

4 5
3 6
2 7
1 8

10K_0804_8P4R_5%

RP28

4 5
3 6
2 7
1 8

10K_0804_8P4R_5%

DESTINATION

Docking
JP3
JP17
JP3
JP17
BlueTooth
Reserve
Reserve

5

CLK_ICH_48M

12

R507

10_0402_5%@

1

C581

10P_0402_50V8J@

2

CLK_ICH_48M<14> CLK_ICH_14M<14>

A A

CLK_ICH_14M

12

R526

10_0402_5%@

1

C608

10P_0402_50V8J@

2

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

3

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

ICH6(3/4)
Boston LA-2721

下午

1

of

19 532005/5/6 11:47:57

1.0

5

Near PIN F27(C155),
P27(C154), AB27(C157)

+1.5VS

1

+

C160

D D

+5VS

+3VS

21

C177

D13

RB751V_SOD323

2

1

0.1U_0402_16V4Z

ICH_V5REF_RUN

C614

R192

10_0402_5%

C C

1 2

1U_0603_10V4Z

2

220U_D2_4VM_R12

+1.5VS

2

C599

0.1U_0402_16V4Z

1

2

1

Near PIN AG5

+1.5VS

+3VALW

+5VALW

1 2

R92
0_0603_5%

1 2

21

D9

RB751V_SOD323

ICH_V5REF_SUS

2

C142
1U_0603_10V4Z

1

ICH6_VCCDMIPLL ICH6_VCCPLL

5

2

C593

0.1U_0402_16V4Z

1

R93

0.5_0603_1%

1 2

C107

0.1U_0402_16V4Z

B B

R147

10_0402_5%

+1.5VS

A A

Near PIN AG9

+3VS

0.1U_0402_16V4Z

2

1

1

2

C111

0.01U_0402_16V7K

Near PIN
AC27

C578

2

1

+3VALW

Near PIN A17

2

C588

1

0.1U_0402_16V4Z

2

1

2

1

Near PIN
E26, E27

4

2

2

C576

C613

1

1

0.1U_0402_16V4Z

C621

0.1U_0402_16V4Z

C612

0.1U_0402_16V4Z

ICH6_VCCPLL

+1.5VS

+3VS

+3VS

+3VALW

2

2

C597

1

1

0.1U_0402_16V4Z

4

0.1U_0402_16V4Z

C598

0.1U_0402_16V4Z

3

F9
U17
U16
U14
U12
U11
T17
T11
P17
P11
M17
M11
L17
L16
L14
L12
L11
AA21
AA20
AA19

AA10
AG19
AG16
AG13
AD17
AC15
AA17
AA15
AA14
AA12

P1
M7
L7
L4
J7
H7
H1
E4
B1
A6

U7
R7

G19
G20

F20
E24
E23
E22
E21
E20
D27
D26
D25
D24

G8
AB18

P7
AA18

A8
F21
A25

A24
AB3
G11

G10
AG23

AD26
AB22

G16
G15
F16
F15
E16
D16
C16

+1.5VS

U13E

AA22

VCC1_5[1]

AA23

VCC1_5[2]

AA24

VCC1_5[3]

AA25

VCC1_5[4]

AB25

VCC1_5[5]

AB26

VCC1_5[6]

AB27

VCC1_5[7]

F25

VCC1_5[8]

F26

VCC1_5[9]

F27

VCC1_5[10]

G22

VCC1_5[11]

G23

VCC1_5[12]

G24

VCC1_5[13]

G25

VCC1_5[14]

H21

VCC1_5[15]

H22

VCC1_5[16]

J21

VCC1_5[17]

J22

VCC1_5[18]

K21

VCC1_5[19]

K22

VCC1_5[20]

L21

VCC1_5[21]

L22

VCC1_5[22]

M21

VCC1_5[23]

M22

VCC1_5[24]

N21

VCC1_5[25]

N22

VCC1_5[26]

N23

VCC1_5[27]

N24

VCC1_5[28]

N25

VCC1_5[29]

P21

VCC1_5[30]

P25

VCC1_5[31]

P26

VCC1_5[32]

P27

VCC1_5[33]

R21

VCC1_5[34]

R22

VCC1_5[35]

T21

VCC1_5[36]

T22

VCC1_5[37]

U21

VCC1_5[38]

U22

VCC1_5[39]

V21

VCC1_5[40]

V22

VCC1_5[41]

W21

VCC1_5[42]

W22

VCC1_5[43]

Y21

VCC1_5[44]

Y22

VCC1_5[45]

AA6

VCC1_5[46]

AB4

VCC1_5[47]

AB5

VCC1_5[48]

AB6

VCC1_5[49]

AC4

VCC1_5[50]

AD4

VCC1_5[51]

AE4

VCC1_5[52]

AE5

VCC1_5[53]

AF5

VCC1_5[54]

AG5

VCC1_5[55]

AA7

VCC1_5[56]

AA8

VCC1_5[57]

AA9

VCC1_5[58]

AB8

VCC1_5[59]

AC8

VCC1_5[60]

AD8

VCC1_5[61]

AE8

VCC1_5[62]

AE9

VCC1_5[63]

AF9

VCC1_5[64]

AG9

VCC1_5[65]

AC27

VCCDMIPLL

E26

VCC3_3[1]

AE1

VCCSATAPLL

AG10

VCC3_3[22]

A13

VCCLAN3_3/VCCSUS3_3[1]

F14

VCCLAN3_3/VCCSUS3_3[2]

G13

VCCLAN3_3/VCCSUS3_3[3]

G14

VCCLAN3_3/VCCSUS3_3[4]

A11

VCCSUS3_3[1]

U4

VCCSUS3_3[2]

V1

VCCSUS3_3[3]

V7

VCCSUS3_3[4]

W2

VCCSUS3_3[5]

Y7

VCCSUS3_3[6]

A17

VCCSUS3_3[7]

B17

VCCSUS3_3[8]

C17

VCCSUS3_3[9]

F18

VCCSUS3_3[10]

G17

VCCSUS3_3[11]

G18

VCCSUS3_3[12]

ICH6_BGA609R3SB@

COREIDE

PCIE

PCIUSB

VCCSUS1_5[3]
VCCSUS1_5[2]

VCCSUS1_5[1]

SATA

USB CORE

PCI/IDE RBP

V5REF_SUS

VCCUSBPLL

VCCSUS3_3[20]

VCCLAN1_5/VCCSUS1_5[2]
VCCLAN1_5/VCCSUS1_5[1]

V_CPU_IO[3]
V_CPU_IO[2]
V_CPU_IO[1]

VCCSUS3_3[19]
VCCSUS3_3[18]
VCCSUS3_3[17]
VCCSUS3_3[16]
VCCSUS3_3[15]
VCCSUS3_3[14]
VCCSUS3_3[13]

VCC1_5[98]
VCC1_5[97]
VCC1_5[96]
VCC1_5[95]
VCC1_5[94]
VCC1_5[93]
VCC1_5[92]
VCC1_5[91]
VCC1_5[90]
VCC1_5[89]
VCC1_5[88]
VCC1_5[87]
VCC1_5[86]
VCC1_5[85]
VCC1_5[84]
VCC1_5[83]
VCC1_5[82]
VCC1_5[81]
VCC1_5[80]
VCC1_5[79]

VCC3_3[21]
VCC3_3[20]
VCC3_3[19]
VCC3_3[18]
VCC3_3[17]
VCC3_3[16]
VCC3_3[15]
VCC3_3[14]
VCC3_3[13]
VCC3_3[12]

VCC3_3[11]
VCC3_3[10]

VCC3_3[9]
VCC3_3[8]
VCC3_3[7]
VCC3_3[6]
VCC3_3[5]
VCC3_3[4]
VCC3_3[3]
VCC3_3[2]

VCC1_5[78]
VCC1_5[77]
VCC1_5[76]
VCC1_5[75]
VCC1_5[74]
VCC1_5[73]
VCC1_5[72]
VCC1_5[71]
VCC1_5[70]
VCC1_5[69]
VCC1_5[68]

VCC1_5[67]

VCC2_5[4]
VCC2_5[2]

V5REF[2]
V5REF[1]

VCCRTC

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

3

+RTCVCC

2

1

C623

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

2

1

1

C619

0.1U_0402_16V4Z

2

2

C620

C624

1

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

C617

1

+1.5VS

ICH_V5REF_RUN

ICH_V5REF_SUS

+1.5VS
+3VALW

+RTCVCC

+1.5VS

+1.05VS

2

Near PIN AG23

C590

1

0.1U_0402_16V4Z

Compal Secret Data

Deciphered Date

0.1U_0402_16V4Z

C196

+3VS

C605

Near PIN
AG13, AG16

2

C625

1

0.1U_0402_16V4Z
C595

+2.5VS

Near PIN AB18

2

1

+3VS

0.1U_0402_16V4Z

Near PIN
A2-A6, D1-H1

2

2

C616

1

1

2

C596

1

0.1U_0402_16V4Z

2

+1.5VALW

0.1U_0402_16V4Z

2

+1.5VS

C606

0.1U_0402_16V4Z

1 2

C580

0.1U_0402_16V4Z

1 2

C610

0.1U_0402_16V4Z

1 2

C585

0.1U_0402_16V4Z

1 2

C601

0.1U_0402_16V4Z

1 2

C611

0.1U_0402_16V4Z

1 2

C622

0.1U_0402_16V4Z

1 2

C602

0.1U_0402_16V4Z

1 2

C592

0.1U_0402_16V4Z

1 2

C591

0.1U_0402_16V4Z

1 2

C584

0.01U_0402_16V7K

1 2

Near PIN A25

C583

0.01U_0402_16V7K

1 2

Near PIN AA19

+3VALW

C603

0.1U_0402_16V4Z

1 2

C600

0.1U_0402_16V4Z

1 2

C618

0.1U_0402_16V4Z

1 2

C586

0.1U_0402_16V4Z

1 2

Near PIN A24

+3VS

C609

0.1U_0402_16V4Z

1 2

C153

0.1U_0402_16V4Z

1 2

Near PIN AG10

1

U13D

E27

VSS[172]

Y6

VSS[171]

Y27

VSS[170]

Y26

VSS[169]

Y23

VSS[168]

W7

VSS[167]

W25

VSS[166]

W24

VSS[165]

W23

VSS[164]

W1

VSS[163]

V4

VSS[162]

V27

VSS[161]

V26

VSS[160]

V23

VSS[159]

U25

VSS[158]

U24

VSS[157]

U23

VSS[156]

U15

VSS[155]

U13

VSS[154]

T7

VSS[153]

T27

VSS[152]

T26

VSS[151]

T23

VSS[150]

T16

VSS[149]

T15

VSS[148]

T14

VSS[147]

T13

VSS[146]

T12

VSS[145]

T1

VSS[144]

R4

VSS[143]

R25

VSS[142]

R24

VSS[141]

R23

VSS[140]

R17

VSS[139]

R16

VSS[138]

R15

VSS[137]

R14

VSS[136]

R13

VSS[135]

R12

VSS[134]

R11

VSS[133]

P22

VSS[132]

P16

VSS[131]

P15

VSS[130]

P14

VSS[129]

P13

VSS[128]

P12

VSS[127]

N7

VSS[126]

N17

VSS[125]

N16

VSS[124]

N15

VSS[123]

N14

VSS[122]

N13

VSS[121]

N12

VSS[120]

N11

VSS[119]

N1

VSS[118]

M4

VSS[117]

M27

VSS[116]

M26

VSS[115]

M23

VSS[114]

M16

VSS[113]

M15

VSS[112]

M14

VSS[111]

M13

VSS[110]

M12

VSS[109]

L25

VSS[108]

L24

VSS[107]

L23

VSS[106]

L15

VSS[105]

L13

VSS[104]

K7

VSS[103]

K27

VSS[102]

K26

VSS[101]

K23

VSS[100]

K1

VSS[99]

J4

VSS[98]

J25

VSS[97]

J24

VSS[96]

J23

VSS[95]

H27

VSS[94]

H26

VSS[93]

H23

VSS[92]

G9

VSS[91]

G7

VSS[90]

G21

VSS[89]

G12

VSS[88]

G1

VSS[87]

ICH6_BGA609R3SB@

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

ICH6(4/4)
Boston LA-2721

下午

GROUND

1

VSS[86]
VSS[85]
VSS[84]
VSS[83]
VSS[82]
VSS[81]
VSS[80]
VSS[79]
VSS[78]
VSS[77]
VSS[76]
VSS[75]
VSS[74]
VSS[73]
VSS[72]
VSS[71]
VSS[70]
VSS[69]
VSS[68]
VSS[67]
VSS[66]
VSS[65]
VSS[64]
VSS[63]
VSS[62]
VSS[61]
VSS[60]
VSS[59]
VSS[58]
VSS[57]
VSS[56]
VSS[55]
VSS[54]
VSS[53]
VSS[52]
VSS[51]
VSS[50]
VSS[49]
VSS[48]
VSS[47]
VSS[46]
VSS[45]
VSS[44]
VSS[43]
VSS[42]
VSS[41]
VSS[40]
VSS[39]
VSS[38]
VSS[37]
VSS[36]
VSS[35]
VSS[34]
VSS[33]
VSS[32]
VSS[31]
VSS[30]
VSS[29]
VSS[28]
VSS[27]
VSS[26]
VSS[25]
VSS[24]
VSS[23]
VSS[22]
VSS[21]
VSS[20]
VSS[19]
VSS[18]
VSS[17]
VSS[16]
VSS[15]
VSS[14]
VSS[13]
VSS[12]
VSS[11]
VSS[10]

VSS[9]
VSS[8]
VSS[7]
VSS[6]
VSS[5]
VSS[4]
VSS[3]
VSS[2]
VSS[1]

20 532005/5/6 11:47:58

F4
F22
F19
F17
E25
E19
E18
E15
E14
D7
D22
D20
D18
D14
D13
D10
D1
C4
C22
C20
C18
C14
B25
B24
B23
B21
B19
B15
B13
AG7
AG3
AG22
AG20
AG17
AG14
AG12
AG1
AF7
AF3
AF26
AF12
AF10
AF1
AE7
AE6
AE25
AE21
AE2
AE12
AE11
AE10
AD6
AD24
AD2
AD18
AD15
AD10
AD1
AC6
AC3
AC26
AC24
AC23
AC22
AC12
AC10
AB9
AB7
AB2
AB19
AB10
AB1
AA4
AA16
AA13
AA11
A9
A7
A4
A26
A23
A21
A19
A15
A12
A1

of

1.0

5

4

3

2

1

+5VS

1

2

1

C136

2

0.1U_0402_16V4Z

C243

1

C247

2

+3VS

1 2

R502 10K_0402_5%

1 2

R503 4.7K_0402_5%

1 2

R506 10K_0402_5%

1 2

R129 10K_0402_5%@

1 2

R131 10K_0402_5%@

1 2

R132 10K_0402_5%

1 2

R133 10K_0402_5%

ATAIOSEL
PIDE_HIORDY
PIDE_HIOCS16#

T0
T2
T3
T6

PLT_RST#<6,16,17,19,22,24,27,34,35>

PLT_RST#

1 2

0_0402_5%

IDE_HRESET#<19>

R86

0.1U_0402_16V4Z

1

C266

2

1000P_0402_50V7K

D D

+1.8VS

1

C94

2

4.7U_0805_10V4Z

1

C260

2

1U_0603_10V4Z

Pleace near HD CONN

0.1U_0402_16V4Z

1

C106

2

0.1U_0402_16V4Z

+3VS

1

B

2

A

C98

0.1U_0402_16V4Z

1 2

5

U10

P

4

Y

G

TC7SH08FU_SSOP5

3

SATA_RST#

Pleace near U178

U8

PIDE_HDD0
PIDE_HDD1

R505

PIDE_HDD2
PIDE_HDD3
PIDE_HDD4
PIDE_HDD5
PIDE_HDD6
PIDE_HDD7

PIDE_HDD9
PIDE_HDD10
PIDE_HDD11
PIDE_HDD12
PIDE_HDD13
PIDE_HDD14
PIDE_HDD15

PIDE_HDA0
PIDE_HDA1
PIDE_HDA2
PIDE_HCS0#
PIDE_HCS1#

PIDE_HIOCS16#
PIDE_HINTRQ

12

PIDE_HDMACK#
PIDE_HIORDY
PIDE_HDIOR#
PIDE_HDIOW #
PIDE_HDREQ

12

PIDE_R_HRESET#

12

R126
10K_0402_5%

C C

10K_0402_5%

R89 5.6K_0402_5%

PIDE_HRESET#

B B

1 2

R78 33_0402_5%

62

HDD0

64

HDD1

2

HDD2

5

HDD3

7

HDD4

11

HDD5

13

HDD6

15

HDD7

14

HDD8

12

HDD9

10

HDD10

6

HDD11

3

HDD12

1

HDD13

63

HDD14

61

HDD15

50

HDA0

51

HDA1

49

HDA2

48

HCS0#

47

HCS1#

52

HIOCS16#

53

HINTRQ

54

HDMACK#

55

HIORDY

58

HDIOR#

59

HDIOW#

60

HDMARQ

16

HRESET#

46

HPDIAG#

45

UAO

43

UAI

88SA8040_TQFP64

UART

SATA

ATAIOSEL

XTLIN/OSC

Config & Debug

Parallel ATA

VDDIO_0
VDDIO_1

Power

TXP
TXM
RXP

RXM

RST#

CNFG2
CNFG1
CNFG0

XTLOUT

ISET

VDD_0
VDD_1
VDD_2

VAA1
VAA2

VSS1

VSS2
GND_0
GND_1
GND_2

T0
T1
T2
T3
T4
T5
T6
T7

SATA_DTX_IRX_P0

32

SATA_DTX_IRX_N0

31

SATA_ITX_C_DRX_P0

27

SATA_ITX_C_DRX_N0

28

SATA_RST#

17

T0

33
34

T2PIDE_HDD8

35

T3

36
37

T5

38

T6

39
40
20

CNFG1

19
18

ATAIOSEL

21

IDE_XTLIN

22
23

26

R104 12.1K_0603_1%

44
4
9
41
56
24
29

25
30
8
42
57

C124

0.01U_0402_16V7K

12

R127
0_0603_5%

C575 0.01U_0402_16V7K
C572 0.01U_0402_16V7K

T1T1

1 2

R125 10K_0402_5%

1 2

R500 10K_0402_5%

12

0.1U_0402_16V4Z

1

C109

2

1

1

2

2

C110

1000P_0402_50V7K

12
12

SATA_ITX_C_DRX_P0 <18>
SATA_ITX_C_DRX_N0 <18>

+3VS +3VS+1.8VS

1

C133

2.2U_0603_6.3V6K

2

Close to pin29, pin30

+3VS

12

R105

0_0402_5%

X1

4

VDD

A A

1

C114

0.1U_0402_16V4Z

2

OUT

1

CONT

VSS

OSC 25MHZ SG645PCG

5

IDE_XTLIN

3

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SATA_DTX_C_IRX_P0
SATA_DTX_C_IRX_N0

12

R13010K_0402_5%

L5

0_0603_5%

Change to 0 ohm

4.7U_0805_10V4Z

SATA_DTX_C_IRX_P0 <18>
SATA_DTX_C_IRX_N0 <18>

R266

1 2

+3VS

1

C95

2

2005/05/06 2006/05/06

3

0.1U_0402_16V4Z

1

C137

0.1U_0402_16V4Z

2

Compal Secret Data

1

C96

2

Deciphered Date

P-ATA HDD Conn.

PIDE_HRESET#
PIDE_HDD7
PIDE_HDD6
PIDE_HDD5
PIDE_HDD4
PIDE_HDD3
PIDE_HDD2
PIDE_HDD1
PIDE_HDD0

PIDE_HDREQ
PIDE_HDIOW #
PIDE_HDIOR#
PIDE_HIORDY
PIDE_HDMACK#
PIDE_HINTRQ
PIDE_HDA1
PIDE_HDA0
PIDE_HCS0#

10K_0402_5%

@

2

11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43

OCTEK_HDS-22TA1_44P_RV

JP29

1
3
5
7
9

2

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

Title

Size Document Number Rev

Date: Sheet of

PIDE_HDD8

4

PIDE_HDD9

6

PIDE_HDD10

8

PIDE_HDD11

10

PIDE_HDD12

12

PIDE_HDD13

14

PIDE_HDD14

16

PIDE_HDD15

18
20
22
24
26

SEC_CSEL

R240 470_0402_5%

28
30
32
34

PIDE_HDA2

36

PIDE_HCS1#

38
40
42
44

1 2

R251 10K_0402_5%

1 2

R255 10K_0402_5%

1 2

+5VS+5VS

Compal Electronics, Inc.

PATA / SATA HDD Connector

Boston LA-2721

下午

21 532005/5/6 11:47:58

1

1.0

5

Placea caps. near CDROM

+5VS

CONN.

1

C507

2

D D

C C

B B

0.1U_0402_16V4Z

1000P_0402_50V7K

C512

1

2

1U_0603_10V4Z

1

C502

2

10U_1206_16V4Z

ODD_RESET#<35>

1

C493

2

INT_CD_L<30>

PLT_RST#<6,16,17,19,21,24,27,34,35>

+5VS +5VS

SHDD_LED#<35>

IDE_DIOW#<18>
IDE_DIORDY<18>
IDE_IRQ<18>
IDE_DA1<18>
IDE_DA0<18>

1 2

R477 100K_0402_5%

R600 0_0402_5%@

1 2

R599
22_0402_5%

R452

470_0402_5%

IDE_DD[0..15]<18>

IDE_DA[0..2]<18>

CDROM CONN

C559

12

10U_0805_10V4Z

INT_CD_L

12

IDE_DD7
IDE_DD6
IDE_DD5 IDE_DD11
IDE_DD4
IDE_DD3
IDE_DD2
IDE_DD1 IDE_DD15
IDE_DD0

+5VS

SD_CSEL

1 2

4

IDE_DD[0..15]

IDE_DA[0..2]

CD_AGND

JP25

1
3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
53 54

OCTEK_CDR-50JD1

CD_AGND <30>

3

INT_CD_R

2
4

IDE_DD8

6

IDE_DD9

8

IDE_DD10

10
12

IDE_DD12

14

IDE_DD13

16

IDE_DD14

18
20
22
24
26
28
30

PDIAG#

DCS3#DC S1#

W=80mils

1 2

R447 100K_0402_5%@

1 2

32
34
36
38
40
42
44
46
48
50

INT_CD_R <30>

1 2

R494 0_0603_5%@

IDE_DDREQ <18>
IDE_DIOR# <18>

IDE_DDACK# <18>

R476 100K_0402_5%

IDE_DA2 <18>

+5VS

+5VS

2

IDE_DCS3#<18>

IDE_DCS1#<18>

1 2

R583 0_0402_5%

1 2

R584 0_0402_5%

1

DCS3#
DCS1#

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

2

Date: Sheet of

Compal Electronics, Inc.

ODD Connector

Boston LA-2721

下午

1

1.0

22 532005/5/6 11:47:54

5

4

+3VS+S1_VCC

3

2

1

S1_A[0..25]<26>

D D

S1_D[0..15]<26>

C C

B B

C166

10P_0402_50V8J

A A

S1_A[0..25]
S1_D[0..15]

S1_IOWR#<26>
S1_IORD#<26>
S1_OE#<26>

S1_CE2#<26>

S1_REG#<26>

S1_CE1#<26>

S1_WAIT#<26>
S1_INPACK#<26>
S1_WE#<26>
S1_BVD1<26>
S1_WP<26>

R117 33_0402_5%

S1_RDY#<26>

S1_RST<26>
S1_BVD2<26>
S1_CD1#<26>

S1_CD2#<26>
S1_VS1<26>
S1_VS2<26>

+3VS

R182 10K_0402_5%
R179 10K_0402_5%

S1_CD1# S1_CD2#

1

2

10P_0402_50V8J

12

C172

S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3

S1_REG#
S1_A12
S1_A8
S1_CE1#

S1_A13
S1_A23
S1_A22
S1_A15
S1_A20
S1_A21
S1_A19
S1_A14
S1_WAIT#
S1_INPACK#
S1_WE#

S1_BVD1

S1_WP

A16_CLKS1_A16
S1_RDY#

S1_RST
S1_BVD2
S1_CD1#

S1_CD2#

S1_VS1
S1_VS2

S1_D14
S1_D2
S1_A18

12
12

U12A

D1

A_CAD31/A_D10

C1

A_CAD30/A_D9

D3

A_CAD29/A_D1

C2

A_CAD28/A_D8

B1

A_CAD27/A_D0

B4

A_CAD26/A_A0

A4

A_CAD25/A_A1

E6

A_CAD24/A_A2

B5

A_CAD23/A_A3

C6

A_CAD22/A_A4

B6

A_CAD21/A_A5

G9

A_CAD20/A_A6

C7

A_CAD19/A_A25

B7

A_CAD18/A_A7

A7

A_CAD17/A_A24

A10

A_CAD16/A_A17

E11

A_CAD15/A_IOWR#

G11

A_CAD14/A_A9

C11

A_CAD13/A_IORD#

B11

A_CAD12/A_A11

C12

A_CAD11/A_OE#

B12

A_CAD10/A_CE2#

A12

A_CAD9/A_A10

E12

A_CAD8/A_D15

C13

A_CAD7/A_D7

F12

A_CAD6/A_D13

A13

A_CAD5/A_D6

C14

A_CAD4/A_D12

E13

A_CAD3/A_D5

A14

A_CAD2/A_D11

B14

A_CAD1/A_D4

E14

A_CAD0/A_D3

C5

A_CC/BE3#/A_REG#

F9

A_CC/BE2#/A_A12

B10

A_CC/BE1#/A_A8

G12

A_CC/BE0#/A_CE1#

G10

A_CPAR/A_A13

C8

A_CFRAME#/A_A23

A8

A_CTRDY#/A_A22

B8

A_CIRDY#/A_A15

A9

A_CSTOP#/A_A20

C9

A_CDEVSEL#/A_A21

E10

A_CBLOCK#/A_A19

F10

A_CPERR#/A_A14

B3

A_CSERR#/A_WAIT#

E7

A_CREQ#/A_INPACK#

B9

A_CGNT#/A_WE#

B2

A_CSTSCHG/A_BVD1(STSCHG/RI)

C3

A_CCLKRUN#/A_WP(IOIS16)

E9

A_CCLK/A_A16

C4

A_CINT#/A_READY(IREQ)

A6

A_CRST#/A_RESET

A2

A_CAUDIO/A_BVD2(SPKR#)

C15

A_CCD1#/A_CD1#

E5

A_CCD2#/A_CD2#

A3

A_CVS1/A_VS1#

E8

A_CVS2/A_VS2#

B13

A_CRSVD/A_D14

D2

A_CRSVD/A_D2

C10

A_CRSVD/A_A18

E2

A_USB_EN#

E1

B_USB_EN#

1

2

A11

H10

H11

VCCH8VCCH9VCC

VCCAA5VCCA

VCC

PCI 7411

GNDG7GNDG8GND

GND

GNDJ9GND

GND

J10

J11

H13

G13

H12

VCC

GNDK9GND

K10

VCCJ8VCCM7VCC

GND

K11

J12

M10

VCCM9VCC

GNDL8GNDL9GND

L10

M12

L11

VCC

GND

L12

VCCK8VCC

GND

K12

M8

GND

D19

K19

N7

VCC

RSVD

RSVD

PCI7411GHK_PBGA2887411@

DATA
CLOCK
LATCH

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

N1
L6
N2

B15
A16
B16
A17
C16
D17
C19
D18
E17
E19
G15
F18
H14
H15
G17
K17
L13
K18
L15
L17
L18
L19
M17
M14
M15
N19
N18
N15
M13
P18
P17
P19
F15
G18
K14
M18
K13
G19
H17
J13
J17
H19
J19
J18
B18
E18
J15
F14

4510_2

A18
H18
B19
F17
C17
N13
B17
C18
F19
N17
A15
K15

R187 1K_0402_5%4510@

Reserve for TI PCI4510

DATA <26>
CLOCK <26>
LATCH <26>

12

+3VS

1

2

+3VS

0.1U_0402_16V4Z

1

2

+S1_VCC

1

2

0.1U_0402_16V4Z

C132

0.1U_0402_16V4Z

C156

0.1U_0402_16V4Z

C171

0.1U_0402_16V4Z

1

C170

2

1

C158

2

1

C167

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1

C173

2

0.1U_0402_16V4Z

1

C131

2

2

1

0.1U_0402_16V4Z

1

C129

2

0.1U_0402_16V4Z

1U_0603_10V4Z

C176

2.2U_0603_6.3V6K

2

C163

1

1

C162

2

Closed to Pin E5Closed to Pin C15

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

2

Date: Sheet of

Compal Electronics, Inc.

PCI7421(1/2)

Boston LA-2721

下午

1

1.0

23 532005/5/6 11:47:55

5

4

3

2

1

VCCP

W3

VCCP

PCI7411GHK_PBGA2887411@

0.1U_0402_16V4Z4510@

FILTER1

0.1U_0402_16V4Z7411@

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10

AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

C/BE3#
C/BE2#
C/BE1#
C/BE0#

PAR

FRAME#

TRDY#

IRDY#

STOP#

DEVSEL#

IDSEL
PERR#
SERR#

REQ#

GNT#

PCICLK

PCIRST#

GRST#

RI_OUT#/PME#

SUSPEND#

SPKROUT

MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6

SCL
SDA

VR_EN#

10U_0805_10V4Z

PCI_AD31

U2

PCI_AD30

V1

PCI_AD29

V2

PCI_AD28

U3

PCI_AD27

W2

PCI_AD26

V3

PCI_AD25

U4

PCI_AD24

V4

PCI_AD23

V5

PCI_AD22

U5

PCI_AD21

R6

PCI_AD20

P6

PCI_AD19

W6

PCI_AD18

V6

PCI_AD17

U6

PCI_AD16

R7

PCI_AD15

V9

PCI_AD14

U9

PCI_AD13

R9

PCI_AD12

N9

PCI_AD11

V10

PCI_AD10

U10

PCI_AD9

R10

PCI_AD8

N10

PCI_AD7

V11

PCI_AD6

U11

PCI_AD5

R11

PCI_AD4

W12

PCI_AD3

V12

PCI_AD2

U12

PCI_AD1

N11

PCI_AD0

W13

W4
W7
W9
W11

P9
V7
R8
U7
W8
N8
W5
V8
U8
U1
T2

P5
R3
T1
T3

R2
L7
N3

M5
P1
P2
P3
N5
R1

M3
M2

CLK_PCI_PCM <14>

12

R128 0_0402_5%

R136 4.7K_0402_5%

PCM_SPK#
PCI_PIRQA#

PCI_PIRQB#
PCI_PIRQC#
SERIRQ
PCI_PIRQD#
5IN1_LED#

R153 220_0402_5%

1 2

R149 220_0402_5%

1 2

H2

R165
220_0402_5%

1 2

2

Close U12 pin V19

0.1U_0402_16V4Z

1

C139

C168

2

0.1U_0402_16V4Z

PCI_AD[0..31] <17,29>

R148

12

1K_0402_5%4510@

1

2

C125

0.1U_0402_16V4Z

1

1

C130

2

2

0.1U_0402_16V4Z

1

C169

C128

2

0.1U_0402_16V4Z

PCI_AD[0..31]

1

2

Reserve for TI PCI4510

PCI_C/BE#3 <17,29>
PCI_C/BE#2 <17,29>
PCI_C/BE#1 <17,29>
PCI_C/BE#0 <17,29>

PCI_PAR <17,29>
PCI_FRAME# <17,29>
PCI_TRDY# <17,29>
PCI_IRDY# <17,29>
PCI_STOP# <17,29>
PCI_DEVSEL# <17,29>

PCI_PERR# <17,29>
PCI_SERR# <17,29>

PCI_REQ#2 <17>
PCI_GNT#2 <17>

R123 0_0402_5%
R120 0_0402_5%@

12

PCM_SPK# <30>
PCI_PIRQA# <17>

PCI_PIRQB# <17>
PCI_PIRQC# <17>
SERIRQ <19,33,34,35>
PCI_PIRQD# <17>
5IN1_LED <25,39>

1

C148

0.1U_0402_16V4Z

R112 100_0402_5%

12
12

R144 10K_0402_5%

1 2

R137 10K_0402_5%@

1 2

PCM_SPK#

PCI_AD20PCM_ID

12

PCI_RST# <17,29,34,35>
PLT_RST# <6,16,17,19,21,22,27,34,35>

+3VS

R103 10K_0402_5%

1 2

+3VS

2

LED R MAY CHANGE TO 150OHM

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCI7421(2/2)

Boston LA-2721

下午

1

+3VS

2

1

1U_0603_10V4Z

24 532005/5/6 11:47:54

C175

1.0

C143

+AVDD_7421

AVDD_7421

1

2

R58

56.2_0402_1%

1394@

1 2

R60

56.2_0402_1%

1394@

1 2

0.1U_0402_16V4Z

1

C126

2

C134

0.1U_0402_16V4Z

TPBIAS0

TPA0+
TPA0­TPB0+
TPB0-

0.1U_0402_16V4Z

1

C582

2

D D

C C

10U_1206_16V4Z

JP22

4

6

3

G

5

2

G

1

TYCO_1470383-2

1394@

1

2

1 2

R59

56.2_0402_1%

1394@

R62

56.2_0402_1%

1394@

C127

0.1U_0402_16V4Z

1394@

1 2

1 2

C135

C63 1U_0603_25V4Z

4
3
2
1

L13

Change to 0 ohm

1

2

MSBS_SDCMD_SMWE2<25>
MSDATA3_SDDAT3_SMD3<25>
MSDATA2_SDDAT2_SMD2<25>
MSDATA1_SDDATA1_SMD1<25>
MSDATA0_SDDAT0_SMD0<25>

0_0603_5%

MSCLK_SDCLK<25>
SMELWP#<25>

SMRE#<25>

MC_PWR_CTRL_0<25>

1

1 2

1 2

1 2

C68
220P_0402_50V7K

2

1394@

R114

56.2_0402_1%

WD@

1 2

R110

56.2_0402_1%

WD@

1 2

TPBIAS1 TPBIAS1

AVDD_7421

TPA1+
TPA1­TPB1+
TPB1-

R61

B B

A A

5.11K_0402_1%

1394@

C116 1U_0603_25V4Z

1 2

WD@

R115

56.2_0402_1%

WD@

TPA1+<40>
TPA1-<40>
TPB1+<40>
TPB1-<40>

R111

56.2_0402_1%

WD@

+3VS

SDCD#<25>
MSCD#<25>
SMCD#<25>

SMALE<25>
SMD4<25>
SMD5<25>
SMD6<25>
SMD7<25>

SDWP_SMCE#<25>

SMCLE<25>

SMRB#<25>

+3VS

VCCD1#<26>

+3VS

R101 1K_0402_5%
R116 4.7K_0402_5%

C589 18P_0402_50V8J

24.576MHz_16P_3XG-24576-43E1

C587 18P_0402_50V8J

R176 0_0402_5%@

R157 33_0402_5%5IN1@
R164 33_0402_5%5IN1@

R152 33_0402_5%5IN1@

1 2

SMALE
SMD4
SMD5
SMD6
SMD7
SDWP_SMCE# CLK_SD_48M

SMCLE
SMRB#

R143 10K_0402_5%

1 2

CLK_SD_48M<14>

R109 4.7K_0402_5%

1 2

R138 6.34K_0402_1%

1 2

1 2

12

MC_PWR_CTRL_0

1 2

SDCD#
MSCD#
SMCD#

12
12

MSBS_SDCMD_SMWE2
MSDATA3_SDDAT3_SMD3
MSDATA2_SDDAT2_SMD2
MSDATA1_SDDAT1_SMD1
MSDATA0_SDDAT0_SMD0

FILTER1

CLK_SD_48M

TPBIAS0
TPA0+
TPA0­TPB0+
TPB0-

TPA1+
TPA1­TPB1+
TPB1-

X3

1 2

+AVDD_7421

U12B

F1

MC_PWR_CTRL_0

F2

MC_PWR_CTRL_1

E3

SD_CD#

F5

MS_CD#

F6

SM_CD#

G5

MS_CLK/SD_CLK/SM_EL_WP#

F3

MS_BS/SD_CMD/SM_WE#

H5

MS_DATA3/SD_DAT3/SM_D3

G3

MS_DATA2/SD_DAT2/SM_D2

G2

MS_DATA1/SD_DAT1/SM_D1

G1

MS_SDIO(DATA0)/SD_DAT0/SM_D0

J5

SD_CLK/SM_RE#/SC_GPIO1

J3

SD_CMD/SM_ALE/SC_GPIO2

H3

SD_DAT0/SM_D4/SC_GPIO6

J6

SD_DAT1/SM_D5/SC_GPIO5

J1

SD_DAT2/SM_D6/SC_GPIO4

J2

SD_DAT3/SM_D7/SC_GPIO3

H7

SD_WP/SM_CE#

J7

SM_CLE/SC_GPIO0

K1

SM_R/B

K2

SM_PHYS_WP#/SC_FCB

L2

RSVD

K5

RSVD

K3

RSVD

K7

RSVD

L1

RSVD

L3

RSVD

L5

RSVD

P12

TEST0

W17

NC

T19

RSVD

M1

CLK_48

R17

PHY_TEST_MA

U18

R0

U19

R1

U15

TPBIAS0

V15

TPA0P

W15

TPA0N

V14

TPB0P

W14

TPB0N

U17

TPBIAS1

V18

TPA1P

W18

TPA1N

V16

TPB1P

W16

TPB1N

M11

CPS

P15

CNA

R19

XO

R18

XI

R12

PC0(TEST1)

U13

PC1(TEST2)

V13

PC2(TEST3)

+3VS

R13

R14

V17

AVDD

AVDD

AVDD

PCI7411

AGND

N12

1 2

C146

1 2

C149 1U_0603_25V4Z

1 2

+3VS

M19

H1

VDPLL_15

W10

VR_PORT

VR_PORT

VSSPLL

VSSPLL

T17

P14

U14

T18

V19

VDPLL_33

AGND

AGND

U16

1

5.11K_0402_1%

WD@

5

R98

1 2

C118
220P_0402_50V7K

2

WD@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

3

Compal Secret Data

Deciphered Date

5

D D

4

3

2

1

5 in 1 CardReader Conn.

JP27

41

MSDATA0_SDDAT0_SMD0<24>
MSDATA1_SDDATA1_SMD1<24>
MSDATA2_SDDAT2_SMD2<24>

+3VS

R245 10K_0402_5%
R243 10K_0402_5%
R163 10K_0402_5%

C C

+VCC_5IN1

R162 2.2K_0402_5%

R161 2.2K_0402_5%

12
12
12

12

12

5IN1@

5IN1@

SDCD#
MSCD#
SMCD#

SMRB#

SDWP_SMCE#

MSDATA3_SDDAT3_SMD3<24>

SMD4<24>
SMD5<24>
SMD6<24>
SMD7<24>

MSBS_SDCMD_SMWE2<24>

SMELWP#<24>
SMALE<24>
SMCD#<24>
SMRB#<24>
SMRE#<24>
SDWP_SMCE#<24>
SMCLE<24>

MSDATA0_SDDAT0_SMD0
MSDATA1_SDDATA1_SMD1
MSDATA2_SDDAT2_SMD2

MSDATA3_SDDAT3_SMD3
SMD4
SMD5
SMD6
SMD7

MSBS_SDCMD_SMWE2
SMELWP#
SMALE

SMCD#

SMRB#

R168 0_0402_5%5IN1@

SDWP_SMCE#
SMCLE

12

XD-VCC

33

XD-D0

34
35
36
37
38
39
40

30
31
29
23
25
26
27
28

32
24

42
18

TAITW_R007-530-L35IN1@

XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7

XD-WE
XD-WP
XD-ALE
XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE

XD-GND
XD-GND

N.C.
N.C.

4 IN 1 CONN

SD-CD-COM

SD-WP-SW

SD-WP-COM

SD-VCC
MS-VCC

SD_CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3

SD-CMD

SD-CD-SW

MS-SCLK
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3

MS-INS

MS-BS
SD-GND
SD-GND

MS-GND
MS-GND

15
9

MSCLK_SDCLK

16

MSDATA0_SDDAT0_SMD0

19

MSDATA1_SDDATA1_SMD1

20

MSDATA2_SDDAT2_SMD2

11

MSDATA3_SDDAT3_SMD3

12

MSBS_SDCMD_SMWE2

13

SDCD#

21
22

SDWP_SMCE#

43
44

MSCLK_SDCLK

8

MSDATA0_SDDAT0_SMD0

4

MSDATA1_SDDATA1_SMD1

3

MSDATA2_SDDAT2_SMD2

5

MSDATA3_SDDAT3_SMD3

7

MSCD#

6

MSBS_SDCMD_SMWE2

2
14
17
1
10

+VCC_5IN1+VCC_5IN1

MSCLK_SDCLK <24>

SDCD# <24>
SDWP_SMCE# <24>

MSCD# <24>

+VCC_5IN1

1U_0603_10V4Z

C208

5IN1@

2

C209

C200

1

4.7U_0805_10V4Z

+3VS

2

1

5IN1@

0.1U_0402_16V4Z

5IN1@

C192

Title

Size Document Number Rev

Date: Sheet of

B B

MC_PWR_CTRL_0<24>

5IN1_LED<24,39>

R203

10K_0402_5%

A A

R201

10K_0402_5%

2

G

1 2

+3VS

1 2

13

R200

12

0_0402_5%

5IN1@

D

Q17

2N7002_SOT23@

S

C180

0.1U_0402_16V4Z@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SD/XD/MS PWR SWITCH

+3VS

U21

1

GND

2
3
4

OUT

IN

OUT
OUT

IN

FLG

EN#

G528_SO8

5IN1@

100_0402_5%

5IN1@

2005/05/06 2006/05/06

3

+VCC_5IN1

8
7
6
5

R580

1 2
13

D

Q60

2N7002_SOT23

S

5IN1@

G

Compal Secret Data

Deciphered Date

+3VS

2

R199
10K_0402_5%

5IN1@

1 2

MC_PWR_CTRL_0

C194

0.1U_0402_16V4Z

5IN1@

4.7U_0805_10V4Z

5IN1@

2

4.7K_0402_5%

@

2

1

2

C198
1U_0603_10V4Z

1

R204

1 2

5IN1@

Compal Electronics, Inc.

5 IN 1 Stocket

Boston LA-2721

下午

1

1.0

25 532005/5/6 11:47:58

5

4

3

2

1

Power Switch for PCMCIA

+5VS

+3VS

For 7411

U38

3

DATA

4

CLOCK

5

LATCH

12

RESET#

15

OC#

21

SHDN#

8

AVPP

19

NC0

9

AVCC

10

AVCC

17

NC1

18

NC2

TPS2220ADBR_SSOP247464@

For 4510

U11

9

12V

5

5V

6

5V

3

3.3V

4

3.3V
GND

7

+3VS

12V
12V

NC3

3.3V

NC4

5V
5V

GND

NC5
NC6
NC7
NC8

VCC
VCC
VCC

VPP

VCCD0
VCCD1
VPPD0
VPPD1

SHDN

16

12

R91

4.7K_0402_5%

4515@

C161

+S1_VPP+S1_VCC

S1_A[0..25]<23>

S1_D[0..15]<23>

CardBus Socket

JP12

69

GND

70

GND

SANTA_130606-1_LT

GND
GND

DATA3

CD1#

DATA4

DATA11

DATA5

DATA12

DATA6

DATA13

DATA7

DATA14

CE1#

DATA15

ADD10

CE2#

OE#

VS1#

ADD11

IORD#

ADD9

IOWR#

ADD8
ADD17
ADD13
ADD18
ADD14
ADD19

WE#
ADD20
READY
ADD21

VCC
VCC
VPP

VPP
ADD16
ADD22
ADD15
ADD23
ADD12
ADD24

ADD7

ADD25

ADD6

VS2#

ADD5

RESET

ADD4

WAIT#

ADD3

INPACK#

ADD2
REG#
ADD1
BVD2
ADD0

BVD1
DATA0
DATA8
DATA1
DATA9
DATA2

DATA10

CD2#

GND
GND

1
35
2
36
3
37
4
38
5
39
6
40
7
41
8
42
9
43
10
44
11
45
12
46
13
47
14
48
15
49
16
50
17
51
18
52
19
53
20
54
21
55
22
56
23
57
24
58
25
59
26
60
27
61
28
62
29
63
30
64
31
65
32
66
33

WP

67
34
68

S1_A[0..25]

S1_D[0..15]

S1_D3

S1_CD1#

S1_D4

S1_D11

S1_D5

S1_D12

S1_D6

S1_D13

S1_D7

S1_D14

S1_CE1#

S1_D15
S1_A10
S1_CE2#
S1_OE#

S1_VS1
S1_A11

S1_IORD#

S1_A9

S1_IOWR#

S1_A8

S1_A17
S1_A13

S1_A18
S1_A14

S1_A19

S1_WE#

S1_A20

S1_RDY#

S1_A21

S1_A16

S1_A22
S1_A15

S1_A23
S1_A12

S1_A24

S1_A7

S1_A25

S1_A6

S1_VS2

S1_A5

S1_RST

S1_A4

S1_WAIT#

S1_A3

S1_INPACK#

S1_A2

S1_REG#

S1_A1

S1_BVD2

S1_A0

S1_BVD1

S1_D0

S1_D8

S1_D1

S1_D9

S1_D2

S1_D10

S1_WP

S1_CD2#

+S1_VCC
+S1_VPP

+3VS

C152

20
7

14
13

24
2
1

11

23
22
16
6

+S1_VCC

13
12
11

+S1_VPP

10

1
2
15
14

8

OC

TPS2211AIDBR_SSOP164515@

C573
C571

+5VS

C560 0.1U_0402_16V4Z
C561 4.7U_0805_10V4Z

1 2

C569

1 2

C103

1 2

C100

4515@

CLOCK
F_VCCD1#
LATCH
DATA

7464@
7464@

10U_0805_10V4Z4515@

0.01U_0402_16V7K4515@

1U_0402_6.3V4Z

R102

0.1U_0402_16V4Z7464@

4.7U_0805_10V4Z7464@

12

0_0402_5%4515@

VCCD1# <24>

0.1U_0402_16V4Z

0.1U_0402_16V4ZR495 10K_0402_5%7464@

+S1_VCC +S1_VPP

C157

0.1U_0402_16V4Z

0.1U_0402_16V4Z

S1_CD1# <23>

S1_CE1# <23>

S1_CE2# <23>

S1_OE# <23>

S1_VS1 <23>
S1_IORD# <23>
S1_IOWR# <23>

S1_WE# <23>

S1_RDY# <23>

S1_VS2 <23>
S1_RST <23>
S1_WAIT# <23>
S1_INPACK# <23>
S1_REG# <23>
S1_BVD2 <23>
S1_BVD1 <23>

S1_WP <23>

S1_CD2# <23>

C165

DATA<23>
CLOCK<23>

D D

C C

B B

A A

LATCH<23>
SUSP#<16,30,32,35,37,38,42,49>

+3VS

0.1U_0402_16V4Z4515@

C102

C104

0.1U_0402_16V4Z4515@

DATA
CLOCK
LATCH

12

12

C564

12

C563

12

C570

+S1_VPP

20mil

+S1_VCC

40mil

C101

4.7U_0805_10V4Z4515@

C105

4.7U_0805_10V4Z4515@

0.01U_0402_16V7K7464@

1U_0402_6.3V4Z7464@

10U_1206_16V4Z7464@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

2

Date: Sheet

Compal Electronics, Inc.

CardBUS Socket

Boston LA-2721

下午

1

1.0

of

26 532005/5/6 11:47:54

5

4

3

2

1

U36

PCIE_PTX_IRX_P1
PCIE_PTX_IRX_N1

VPD_CLK
VPD_DATA

LAN_X1
LAN_X2

12
12

12

8053@

12

LAN_CTRL25
LAN_CTRL12

2K for 88E8036 R445 --

4.87K for 88E8053

12

R501
100K_0402_5%

49

TX_P

50

TX_N

54

RX_P

53

RX_N

6

WAKEn

55

REFCLKP

56

REFCLKN

5

PERSTn

17

MDIP0

18

MDIN0

20

MDIP1

21

MDIN1

26

MDIP2

27

MDIN2

30

MDIP3

31

MDIN3

38

VPD_CLK

41

VPD_DATA

34

SPI_DO

35

SPI_DI

37

SPI_CLK

36

SPI_CS

15

XTALI

14

XTALO

10

LOM_DISABLEn

12

VAUX_AVLBL

11

SWITCH_VCC

47

VMAIN_AVLBL

9

SWITCH_VAUX

24

HSDACP

25

HSDACN

16

RSET

4

CTRL25

3

CTRL12

88E8053_QFN64

8053@

PCI-E

Media

EEPROM

FLASH
MEMORY

CLOCK

Analog

1

C487

0.1U_0402_16V4Z

2

LED

LED_LINK10/100n

TEST

POWER

&

GROUND

1

C490

0.1U_0402_16V4Z

2

LED_ACTn

LED_LINK1000n

LED_LINKn

TESTMODE

TSTPT
VDD25

AVDDL
AVDDL
AVDDL
AVDDL
AVDDL
AVDDL
AVDDL

AVDD

VDDO_TTL
VDDO_TTL
VDDO_TTL
VDDO_TTL
VDDO_TTL

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

EPAD

SMCLK/NC

SMDATA/NC

1

C516

0.1U_0402_16V4Z

2

12
12

PCIE_PTX_C_IRX_P1
PCIE_PTX_C_IRX_N1
PCIE_ITX_C_PRX_P1
PCIE_ITX_C_PRX_N1

ICH_PCIE_WAKE#<19>

VPD_CLK
VPD_DATA

PCIE_PTX_C_IRX_P1<19>
PCIE_PTX_C_IRX_N1<19>

PCIE_ITX_C_PRX_P1<19>

D D

+3VALW

R458 4.7K_0402_5%
R459 4.7K_0402_5%

C C

B B

C555 0.1U_0402_16V4Z

1 2

C554 0.1U_0402_16V4Z

1 2

CLK_PCIE_LAN<14>
CLK_PCIE_LAN#<14>
PLT_RST#<6,16,17,19,21,22,24,34,35>

LAN_MIDI0+<28>
LAN_MIDI0-<28>
LAN_MIDI1+<28>
LAN_MIDI1-<28>
LAN_MIDI2+<28>
LAN_MIDI2-<28>
LAN_MIDI3+<28>
LAN_MIDI3-<28>

VPD_CLK
VPD_DATA

+3VALW

+3VALW

C566 0.1U_0402_16V4Z

1 2

U41

8

VCC

7

WP

6

SCL

5

SDA

AT24C16AN-10SI-2.7_SO8

PLT_RST#
LAN_MDI0+

LAN_MDI0­LAN_MDI1+
LAN_MDI1­LAN_MDI2+
LAN_MDI2­LAN_MDI3+
LAN_MDI3-

R460 10K_0402_5%
R453 10K_0402_5%

R478 10K_0402_5%

R445 4.87K_0402_1%

1

A0

2

A1

3

A2

4

GND

LAN_ACTIVITY#

59
60
62

LAN_LINK#

63
46

29

+LAN_AVDD25

64

+LAN_AVDDL

19
22
28
32
51
52
57

23
1

8
40
45
61

2
7
13
33
39
44
48
58

65
42

43

1

C489

0.1U_0402_16V4Z

2

L12 0_0603_5%

+LAN_AVDDL

1

C531

0.1U_0402_16V4Z

2

LAN_ACTIVITY# <28,40>

LAN_LINK# <28,40>PCIE_ITX_C_PRX_N1<19>

+LAN_AVDD25

1 2

C488 0.1U_0402_16V4Z

1 2

+3VALW

+LAN_VDD12

1

C508

0.1U_0402_16V4Z

2

1

C548

0.1U_0402_16V4Z

2

1

C509

0.1U_0402_16V4Z

2

1

C547

0.1U_0402_16V4Z

2

+3VALW

1

C551

0.1U_0402_16V4Z

2

+LAN_AVDDL

1

C549

0.1U_0402_16V4Z

2

R492

4.7K_0402_5%

LAN_CTRL12

R493

4.7K_0402_5%

LAN_CTRL25

4.7U_0805_10V4Z

+3VALW

12

3

1

12

1

C558

2

4

40mil

1

C557

4.7U_0805_10V4Z

2

+3VALW

3

2

4

40mil

1

2

Q52
BCP69_SOT223

Q53
BCP69_SOT223

1

C556

0.1U_0402_16V4Z

2

+LAN_VDD12

+LAN_AVDD25

+LAN_VDD12

Y3

LAN_X2LAN_X1

25MHZ_20P_1BX25000CK1A

1

A A

C482
27P_0402_50V8J

2

1

C491
27P_0402_50V8J

2

1

C550

0.1U_0402_16V4Z

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

C532

0.1U_0402_16V4Z

2

1

C492

0.1U_0402_16V4Z

2

2005/05/06 2006/05/06

3

1

C514

0.1U_0402_16V4Z

2

Compal Secret Data

Deciphered Date

1

C517

0.1U_0402_16V4Z

2

2

1

C513

0.1U_0402_16V4Z

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

LAN Marvell 88E8053

Boston LA-2721

下午

1

of

27 532005/5/6 11:47:56

1.0

5

unpop when use 88E8036(10/100)

R345

R340

1

C322

2

0.1U_0402_16V4Z

12

12

R346

49.9_0402_1%

12

12

R339

49.9_0402_1%

1

C319

0.1U_0402_16V4Z

2

1

C321

D D

49.9_0402_1%

8053@

LAN_MIDI1-<27>

LAN_MIDI1+<27>

LAN_MIDI3-<27>

LAN_MIDI3+<27>

C C

LAN_MIDI2-<27>

LAN_MIDI2+<27>

LAN_MIDI0-<27>

LAN_MIDI0+<27>

49.9_0402_1%

8053@

B B

R343

R342

2

0.1U_0402_16V4Z

8053@

12

12

R344

49.9_0402_1%

8053@

49.9_0402_1%

12

12

R341

49.9_0402_1%

8053@

1

C320

0.1U_0402_16V4Z

2

8053@

49.9_0402_1%

4

+LAN_AVDD25

3

TST1284B(SP050001X00) for 88E8036(10/100)
GST5009(SP050005600) for 88E8053(GbE)

T1

12

TD4-

11

TD4+

10

TCT4

9

TD3-

8

TD3+

7

TCT3
TD2-6MX2-

5

TD2+

4

TCT2

3

TD1-

2

TD1+

1

TCT1

0.5u_GST5009

8053@

MX4-

MX4+

MCT4

MX3-

MX3+

MCT3

MX2+

MCT2

MX1-

MX1+

MCT1

13
14

MCT2

15
16

17
18

19
20
21

22
23

MCT1

24

12

12

R328

75_0402_1%

R329
75_0402_1%

RJ45_MDI1-_C

RJ45_MDI1+_C

RJ45_MDI3-_C

RJ45_MDI3+_C

RJ45_MDI2-_C

RJ45_MDI2+_C

RJ45_MDI0-_C

RJ45_MDI0+_C

2

Q41

10K

DTA114YKA_SC59

2

10K

DTA114YKA_SC59

2

2

2

3

3

2

2

3

3

2

2

3

3

2

2

3

3

13

13

+3V

LAN_ACTIVITY#<27,40>

LAN_LINK#<27,40>

RJ45_MDI1-_C

RJ45_MDI1+_C RJ45_MDI1+

RJ45_MDI3-_C

RJ45_MDI3+_C

RJ45_MDI2-_C

RJ45_MDI2+_C

RJ45_MDI0-_C

RJ45_MDI0+_C

LAN_ACTIVITY#

+3V

LAN_LINK#

Q45

1 2

R618 0_0402_5%@

L23

1

1

4

4

WCM2012F2S-900T04_0805

1 2

R619 0_0402_5%@

1 2

R620 0_0402_5%@

L24

1

1

4

4

WCM2012F2S-900T04_0805

1 2

R621 0_0402_5%@

1 2

R622 0_0402_5%@

L25

1

1

4

4

WCM2012F2S-900T04_0805

1 2

R623 0_0402_5%@

1 2

R624 0_0402_5%@

L26

1

1

4

4

WCM2012F2S-900T04_0805

1 2

R625 0_0402_5%@

47K

47K

1 2

R312
300_0402_5%

1 2

R318
300_0402_5%

RJ45_MDI1-

RJ45_MDI3-

RJ45_MDI3+

RJ45_MDI2-

RJ45_MDI2+

RJ45_MDI0-

RJ45_MDI0+

1

T=10mil

LAN_ACT

T=10mil

LAN_LINK

EMI Solution Reserve.

RJ45_MDI3­RJ45_MDI3+

RJ45_MDI2­RJ45_MDI2+

reseved for 88E8036(10/100)

A A

5

R326 0_0402_5% 8036@

1 2

R325 0_0402_5% 8036@

1 2

R323 0_0402_5% 8036@

1 2

R324 0_0402_5% 8036@

1 2

4

12

12

R330

75_0402_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

R331
75_0402_1%

RJ45_GND

2005/05/06 2006/05/06

RJ45_GND <40>

Compal Secret Data

Deciphered Date

RJ45_MDI3-<40>
RJ45_MDI3+<40>

RJ45_MDI2-<40>
RJ45_MDI2+<40>

RJ45_MDI1-<40>
RJ45_MDI1+<40>

RJ45_MDI0-<40>
RJ45_MDI0+<40>

2

LAN_LINK
LAN_ACT

RJ45_GND
RJ45_MDI3­RJ45_MDI3+

RJ45_GND
RJ45_MDI2­RJ45_MDI2+

RJ45_GND
RJ45_MDI1­RJ45_MDI1+

RJ45_GND
RJ45_MDI0­RJ45_MDI0+

JP5

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

ACES_87213-1600

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

LAN Conn.

Boston LA-2721

下午

1 2

R615 0_0603_5%

1 2

R616 0_0603_5%

1 2

R617 0_0603_5%

DGND RJ45_GND

of

28 532005/5/6 11:47:55

1

1.0

A

B

C

D

E

1 1

WL_OFF#<35>
KILL_SW#<35,36,38>

+3VS_MINIPCI

+3V

2 2

CLK_PCI_MINI

12

R302

33_0402_5%@

L9

1 2

0_0603_5%

CH_DATA<36>

CLK_PCI_MINI<14>

1

C291

10P_0402_50V8J@

2

3 3

4 4

+3V

C277 0.1U_0402_16V4Z

5

U29

1

P

B

Y

2

A

G

TC7SH08FU_SSOP5

3

KILL@

PCI_PIRQH#<17>

W=40mils

PCI_REQ#1<17>

R588 0_0402_5%BT@

PCI_C/BE#3<17,24>

PCI_C/BE#2<17,24>
PCI_IRDY#<17,24>

PM_CLKRUN#<19,33,34>

PCI_SERR#<17,24>
PCI_PERR#<17,24>

PCI_C/BE#1<17,24>

+5VS

12

+5VS_MINIPCI

1 2

L11 0_0603_5%

1 2

KILL@

4

LAN RESERVED

D21
RB751V_SOD323

KILL@

PCI_PIRQH#

CLK_PCI_MINI

PCI_AD31
PCI_AD29

PCI_AD27
PCI_AD25

PCI_AD23
PCI_AD21

PCI_AD19
PCI_AD17

PCI_AD14
PCI_AD12 PCI_AD11

PCI_AD10
PCI_AD8

PCI_AD7
PCI_AD5
PCI_AD3

W=30mils

PCI_AD1

W=30mils W=20mils

+5VS_MINIPCI

0603

TIP

21

MINI_PCI SOCKET

JP30

2

112

KEY KEY

4

334

6

556

8

778

10

9910

12

111112

14

131314

16

151516

18

171718

20

191920

22

212122

24

232324

26

252526

28

272728

30

292930

32

313132

34

333334

36

353536

38

373738

40

393940

42

414142

44

434344

46

454546

48

474748

50

494950

52

515152

54

535354

56

555556

58

575758

60

595960

62

616162

64

636364

66

656566

68

676768

70

696970

72

717172

74

737374

76

757576

78

777778

80

797980

82

818182

84

838384

86

858586

88

878788

90

898990

92

919192

94

939394

96

959596

98

979798

100

9999100

101
103
105
107
109
111
113
115
117
119
121
123

102

101

102

104

103

104

106

105

106

108

107

108

110

109

110

112

111

112

114

113

114

116

115

116

118

117

118

120

119

120

122

121

122

124

123

124

TYCO_1470422-3

RING

LAN RESERVED

W=30mils

PCI_PIRQG#

W=40mils

PCI_RST#

PCI_AD30
PCI_AD28

PCI_AD26
PCI_AD24

MINI_IDSEL

PCI_AD22
PCI_AD20

PCI_AD18
PCI_AD16

PCI_AD15
PCI_AD13

PCI_AD9

PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

2

C273

0.1U_0402_16V4Z

1

1 2

R287

+3V

PCI_AD[0..31]

+5VS_MINIPCI

PCI_PIRQG# <17>

+3V

PCI_RST# <17,24,34,35>
PCI_GNT#1 <17>
PME# <33,34,35>

PCI_AD18

100_0402_5%

PCI_PAR <17,24>

PCI_FRAME# <17,24>
PCI_TRDY# <17,24>
PCI_STOP# <17,24>

PCI_DEVSEL# <17,24>

PCI_C/BE#0 <17,24>

PCI_AD[0..31] <17,24>

+3VS_MINIPCI

W=40mils

1 2

0_0603_5%

R589 0_0402_5%BT@

IDSEL : PCI_AD18

1

2

2

1

L10

12

C274

1000P_0402_50V7K@

C289

0.1U_0402_16V4Z

+3V

2

1

CH_CLK <36>

2

C286

0.1U_0402_16V4Z@

1

C290

0.1U_0402_16V4Z

2

1

2

C288

0.1U_0402_16V4Z

1

C287

0.1U_0402_16V4Z@

2

C270

0.1U_0402_16V4Z

1

1

2

+5VS_MINIPCI

C280

10U_1206_16V4Z@

2

C269

0.1U_0402_16V4Z

1

+3VS_MINIPCI

1

C271
10U_1206_16V4Z

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

C

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

D

Date: Sheet

Compal Electronics, Inc.

Mini PCI Slot

Boston LA-2721

下午

E

1.0

of

29 532005/5/6 11:47:56

A

+3V

C272

1 2

U31A

14

SN74LVC14APWLE_TSSOP14

P

BEEP#<35>

1 1

PCM_SPK#<24>

SB_SPKR<19>

2 2

3 3

CD_AGND<22>

R221 0_0603_5%

R309 0_0603_5%

4 4

R286 0_0603_5%

R601 0_0603_5%@

1

3

5

INT_CD_L<22>

INT_CD_R<22>

R537 20K_0402_5%

12

R536
0_0402_5%

1 2

1 2

1 2

1 2

2

O

I

G

7

+3V

U31B

14

SN74LVC14APWLE_TSSOP14

P

4

O

I

G

7

+3V

U31C

14

SN74LVC14APWLE_TSSOP14

P

6

O

I

G

7

12

12

R246

6.8K_0402_5%

DGND AGND

A

B

0.1U_0402_16V4Z

C279

1U_0402_6.3V4Z

C285

1U_0402_6.3V4Z

C284

1U_0402_6.3V4Z

+VDDA

R242 6.8K_0402_5%
R254 6.8K_0402_5%
R534 20K_0402_5%
R539 20K_0402_5%

ICH_AC_RST#<18,36>
ICH_AC_SYNC<18,36>
ICH_AC_SDOUT<18,36>

R295

1 2

12

560_0402_5%

R300

12

1 2

560_0402_5%

R299

1 2

12

560_0402_5%

10K_0402_5%

L8

1 2

FBM-L10-160808-301-T_0603

10U_0805_10V4Z

SPKSEL<35>
NBA_PLUG<32,35>

12
12
12
12

MIC<32>

CD_GNA

R296

With 14.318Mhz : R553 POP
With 24.576Mhz : R553 DEPOP

B

C

+VDDA

12

R288
10K_0402_5%

12

R291
10K_0402_5%

1

C

Q32

2

B

2SC2411K_SC59

E

3

12

D16

RB751V_SOD323

2 1

0.1U_0402_16V4Z

1

C230

CD_GNA

R538
R257
R543

C657

2

C233 1U_0603_10V4Z

1 2

C633 1U_0603_10V4Z

1 2

C224

1 2

1U_0603_10V4Z

C630 0.1U_0402_16V4Z

1 2

C631 0.1U_0402_16V4Z

1 2

C632 1U_0603_10V4Z

1 2
1 2

C234 1U_0603_10V4Z

1 2

C235 1U_0603_10V4Z

1 2

C225 0.1U_0402_16V4Z

12

22_0402_5%

1 2

R553

0_0402_5%

12

22_0402_5%

12

22_0402_5%

EAPD<32,35>

C

D

C276
1U_0402_6.3V4Z

12

C275

1 2

1U_0402_6.3V4Z

1 2

R289

2.4K_0402_5%

1

1

2

C232

2

0.1U_0402_16V4Z

LINEL
LINER

C_MIC

MONO_IN

AUDIO_AC_RST#
AUDIO_AC_SYNC
AUDIO_AC_SDOUT

SMB_DATA

MONO_IN

+AVDD_AC97

38

AVDD125AVDD2

14

AUX_L

15

AUX_R

16

JD2

17

JD1

23

LINE_IN_L

24

LINE_IN_R

18

CD_L

20

CD_R

19

CD_GND

21

MIC1

22

MIC2

13

PHONE

12

PC_BEEP

11

RESET#

10

SYNC

5

SDATA_OUT

45

SDA

46

XTLSEL

47

SPDIFI/EAPD

48

SPDIFO

4

DVSS1

7

DVSS2

U46 ALC250-VD_LQFP48

LINE_OUT_L
LINE_OUT_R

MONO_OUT/VREFOUT3

HP_OUT_R

VREFOUT2

HP_OUT_L

SDATA_IN

VREFOUT

DISABLE#

DGND AGND

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

AC97 Codec

0.1U_0402_16V4Z

1

2

9

DVDD11DVDD2

35
36
37
39
41

AUDIO_AC_BITCLK

6

BIT_CLK

XTL_IN

XTL_OUT

AFILT1
AFILT2

VREF

DCVOL

VAUX

SCK

AVSS1
AVSS2

R541 22_0402_5%

8
2

3
29
30
28
27
32

31

NC

33
34
43

SMB_CLK

44
40

NC

26
42

2005/05/06 2006/05/06

E

+5VALW

SYSON<35,39,41,42,48>
SUSP#<16,26,32,35,37,38,42,49>

+AC97_DVDD

1

C651

C237

2

0.1U_0402_16V4Z

LINE_OUT_L
LINE_OUT_R

1 2

R545 0_0402_5%

1 2

C645 1000P_0402_50V7K

1 2

C646 1000P_0402_50V7K

1 2

+AUD_VREF

C242 0.01U_0402_16V7K

1 2

C236 1U_0603_10V4Z

1 2

C649 1U_0603_10V4Z

1 2

R547 0_0402_5%@

1 2

R555 0_0603_5%@

1 2

R556 0_0402_5%@

1 2

R557 10K_0402_5%

1

C210
22U_1206_16V4Z_V1

2

LINE_IN_L<31>

LINE_IN_R<31>

1

C248
10U_1206_16V4Z

2

HP_OUT_L <31>
HP_OUT_R <31>

R542 33_0402_5%

1 2

1 2

Compal Secret Data

Deciphered Date

E

1

C213

0.1U_0402_16V4Z

2

+VDDA=V power

R612 0_0402_5%
R613 0_0402_5%@

R267 0_0603_5%

1 2

R268 0_0603_5%@

1 2

Change to 0 ohm

AMP_LEFT<32>

AMP_RIGHT<32>

12
12

+VDDA=VS power

ICH_AC_SDIN0 <18>

CLK_14M_CODEC<14>

+AVDD_AC97

EC_IDERST <35>

+3VS

LINE_OUT_L
LINE_OUT_R

F

60mil

R248 6.8K_0402_5%@
R249 6.8K_0402_5%@
R247

WD@

R250

WD@

U23

4
2

8

SI9182DH-AD_MSOP8

12
12
12

6.8K_0402_5%

12

6.8K_0402_5%

+3VS

+3V

Close to U42

R594 0_0402_5%

1 2

R595 0_0402_5%

1 2

R596 0_0402_5%@
R597 0_0402_5%@

ICH_AC_BITCLK <18,36>

1U_0402_6.3V4Z

1

C642

2

F

G

H

28.7K for Module Design (VDDA = 4.702)

(output = 250 mA)

40mil

VIN

SENSE or ADJ

DELAY
ERROR7CNOISE
SD

VOUT

GND

5
6
1
3

1 2

1 2

R533
30K_0402_1%

1

C629

2

0.1U_0402_16V4Z

C215

1U_0402_6.3V4ZWD@

C218

1U_0402_6.3V4ZWD@

C216

1U_0402_6.3V4ZWOD@

1 2
12

R532
10K_0402_1%

Reserve for Hardware EQ

+5VAMP

R592 0_0402_5%@

1 2

R593 0_0402_5%@

1 2

1 2
1 2

EC_SMB_CK2<4,35,40>
EC_SMB_DA2<4,35,40>

1

C639

0.1U_0402_16V4Z

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

AC97 CODEC

下午

G

EQ_IN_LEFT
EQ_IN_RIGHT

EQ_OUT_LEFT
EQ_OUT_RIGHT

1 2

R561 0_0402_5%

1 2

R563 0_0402_5%

Boston LA-2721

1

2

+VDDA

4.85V

1

C212
10U_1206_16V4Z

2

LINEL

LINER

1

C217

1U_0402_6.3V4ZWOD@

2

JP31

8
7
6
5
4
3
2
1

ACES_20301-0800@

SMB_CLK
SMB_DATA

30 532005/5/6 11:47:55

H

1.0

5

LINEIL#<40>

LINEIL<40>

D D

LINEIR#<40>

LINEIR<40>

C C

HP_OUT_L<30>

1 2

C254 1U_0402_6.3V4ZWD@

1 2

C255

1 2

C259

1 2

C258

1U_0402_6.3V4ZWD@

1U_0402_6.3V4Z

WD@

1U_0402_6.3V4Z

WD@

1U_0402_6.3V4Z

WD@

1 2

C238

+DOCK_AUD_VREF

R275

1 2

R276

1 2

+DOCK_AUD_VREF

R278 1K_0402_5%WD@

1 2

R277

1 2

+DOCK_AUD_VREF

R273

22K_0402_5%WD@

1 2

2

C252

0.1U_0402_16V4Z

1

WD@

1K_0402_5%WD@

1K_0402_5%WD@

1K_0402_5%WD@

R279 22K_0402_5%WD@

C245 68P_0402_50V8KWD@

4

1

C249 1000P_0402_50V7KWD@

2
1

C256 1000P_0402_50V7KWD@

2

1

C250 1000P_0402_50V7KWD@

2
1

C257 1000P_0402_50V7KWD@

2

1 2

1 2

+VDDA

4

9

-

V+

O

10

+

V-

U45C

11

R269 10K_0402_5%WD@

1 2

R270 10K_0402_5%WD@

1 2

R263 4.7K_0402_5%WD@

1 2

R272 10K_0402_5%WD@

1 2

R271 10K_0402_5%WD@

1 2

R264

1 2

4.7K_0402_5%WD@

8

LMV824MTX_TSSOP14WD@

R262 4.7K_0402_5%WD@

1 2

+VDDA

C223

1 2

4

2

-

V+

1

O

3

+

V-

U43A

LMV824MTX_TSSOP14WD@

11

R265 4.7K_0402_5%WD@

1 2

+VDDA

4

6

-

V+

7

O

5

+

V-

U43B

LMV824MTX_TSSOP14WD@

11

R258

4.7K_0402_5%

WD@

3

1U_0402_6.3V4ZWD@

LINE_IN_L <30>

LINE_IN_R <30>

+VDDA

C220

1 2

4

­+

11

WD@

+VDDA

1U_0402_6.3V4Z

V+

1

O

V-

U45A

LMV824MTX_TSSOP14WD@

12

WD@

C219 1U_0402_6.3V4Z

2
3

1 2

R259 4.7K_0402_5%

+VDDA

1 2

WD@

2

R552

1 2

100K_0402_5%WD@

100K_0402_5%WD@

R551

1 2

C655

1

2

0.1U_0402_16V4Z

WD@

LINEOL <40>

+VDDA

9

-

10

+

4

V+

8

O

V-

U43C

LMV824MTX_TSSOP14

11

WD@

1

+DOCK_AUD_VREF

+DOCK_AUD_VREF

1

C654

2

1U_0402_6.3V4ZWD@

4

6

-

V+

7

O

+DOCK_AUD_VREF

C226

0.1U_0402_16V4Z

R261

+VDDA

4

2

-

V+

3

+

V-

11

+VDDA

WD@

1 2

C222 1U_0402_6.3V4Z

WD@

1

O

U44A

LMV824MTX_TSSOP14WD@

4.7K_0402_5%WD@

12

B B

R280

C246

1U_0402_6.3V4ZWD@

HP_OUT_R<30>

1 2

C240

+DOCK_AUD_VREF

R274
22K_0402_5%WD@

1 2

2

C253

0.1U_0402_16V4Z

1

WD@

9

10

1 2

1 2

+VDDA

4

-

V+

+

V-

11

68P_0402_50V8KWD@

O

U44C

22K_0402_5%WD@

8

LMV824MTX_TSSOP14WD@

R260

4.7K_0402_5%WD@

1 2

5

+

2

V-

11

1

C221 1U_0402_6.3V4Z

U45B

1 2

LMV824MTX_TSSOP14WD@

WD@

1 2

C239 1U_0402_6.3V4Z

WD@

LINEOR <40>

LINEOL# <40>

4

6

-

V+

A A

+DOCK_AUD_VREF

C227

0.1U_0402_16V4Z

WD@

2

1

5

Security Classification

Issued Date

PROPRIETARY NOTE

5

4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

7

O

+

V-

U44B

11

LMV824MTX_TSSOP14WD@

2005/05/06 2006/05/06

3

1 2

C241 1U_0402_6.3V4Z

WD@

Compal Secret Data

Deciphered Date

LINEOR# <40>

Title

Size Document Number Rev

2

Date: Sheet of

Compal Electronics, Inc.

Docking Audio

Boston LA-2721

下午

1

1.0

31 532005/5/6 11:47:57

A

B

C

D

E

22
15
14
11
9
16
10
8

1
12
13
24

+5VAMP

12

R540
100K_0402_5%

SHUTDOWN#

NBA_PLUG
BYPASS

1U_0402_6.3V4Z

Q27

13

D

2N7002_SOT23

2

G

S

13

D

Q30

2

G

2N7002_SOT23@

S

R546 100K_0402_5%

C650 0.1U_0402_16V4Z

2

C251

1

1U_0402_6.3V4Z

1 2

1 2

2

C244

1

SPKR+
SPKL+

EAPD

SPKL­SPKR-

C267 150U_4A_10VM
C268 150U_4A_10VM

2

C647
1U_0402_6.3V4Z

1

+

1 2

+

1 2

EC_MUTE <35>

EAPD <30,35>

+5VAMP

WM-64PCY_2P

45MIC@

MIC1

1
2

1 2

R573 0_0402_5%

1 2

R572 0_0402_5%

MIC<30>

1

C660

2

220P_0402_50V7K

MIC@

SPKL+

R350 0_0603_5%

SPKL­SPKR+
SPKR-

NBA_PLUG<30,35>

1 2

R353 0_0603_5%

1 2

R356 0_0603_5%

1 2

R363 0_0603_5%

1 2

+AUD_VREF

R570

4.7K_0402_5%

MIC

1 2

L17 FBM-11-160808-700T_0603

C663

220P_0402_50V7K

L16

1 2

FBM-11-160808-700T_0603

L15

1 2

FBM-11-160808-700T_0603

330P_0402_50V7K

Speaker Conn.

JP6

4
3
2
1

ACES_85204-0400

12

12

R571

4.7K_0402_5%

1

2

HeadPhone JACK

NBA_PLUG

C661

C662

330P_0402_50V7K

MIC JACK

JP16

5
4
3

6
2
1

FOX_JA6033L-5S3-TR

JP15

5
4
3

6
2
1

FOX_JA6033L-5S3-TR

Reserve for debug

+5VAMP

J4

2

1 1

2 2

2

C626
10U_1206_16V4Z

1

PATH_SEL_1

2N7002_SOT23@

Q28

AMP_LEFT<30>
AMP_RIGHT<30>

+5VAMP

1 2
13

D

S

R535

JUMP_43X118@

1

C627

0.1U_0402_16V4Z

2

R253 100K_0402_5%

1 2

100K_0402_5%@

SUSP#

2

G

+5VS

112

SPKL+
SPKR+

C640

0.1U_0402_16V4Z

PATH_SEL_1

1 2

C636 1U_0402_6.3V4Z

1 2

C635 1U_0402_6.3V4Z

2

2

1

1

C638

0.1U_0402_16V4Z

SUSP# <16,26,30,35,37,38,42,49>

0.1U_0402_16V4Z

VOL_AMP

LEFT_2
RIGHT_2

1

C228

2

0.1U_0402_16V4Z

+5VAMP

1

C644

2

18
19

21
23
20
17

1

C648

0.047U_0402_16V7K

2

W=40mil

1

C643

4.7U_0805_10V4Z

2

U42

7

PVDD

SHUTDOWN#

PVDD

SE/BTL#

VDD

PC-BEEP

HP/LINE#
VOLUME
LOUT+
ROUT+
LLINEIN
RLINEIN
LHPIN
RHPIN

CLK

BYPASS

2
3
4

5
6

TPA0232PWP_TSSOP24

LOUT-

ROUT-

GND
GND
GND
GND

LIN
RIN

3 3

4 4

VR

R569 3.9K_0402_5%

R564
100K_0402_5%

2

G

Q57

2N7002_SOT23

A

1 2

VR1

+5VAMP

+5VAMP

0.01W_10KC_EVUTWRB49C14

NBA_PLUG

5

12

3.3K_0603_1%

13

D

S

R568

2

G

4

3

2

1

12

13

D

Q58
2N7002_SOT23

S

2

C664

1

12

R567

6.19K_0603_1%

R569

R568

R567

0.1U_0402_16V4Z@

VOL_AMP

Bias
(Gain)

3.9K

3.3K

6.19K

SPK

0.67 V
10 dB

HP

1.54 V

-6 dB

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

C

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

D

Date: Sheet of

Compal Electronics, Inc.

AMP & Audio Jack

Boston LA-2721

下午

E

1.0

32 532005/5/6 11:47:54

A

B

C

D

E

SUPER I/O SMsC LPC47N207

+3VS

1 1

LPC_AD[0..3]<18,34,35>

LPC_AD[0..3]

+3V

1

C579

0.1U_0402_16V4ZSI207@

2

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_DRQ#1<18,34>

LPC_FRAME#<18,34,35>

PM_CLKRUN#<19,29,34>

SERIRQ<19,24,34,35>

2 2

3 3

CLK_PCI_SIO<14,34>

SIO_RST#<34>

CLK_14M_SIO<14,34>

SIO_PD#<34>

PME#<29,34,35>

LPC_DRQ#1
LPC_FRAME#
PM_CLKRUN#
SERIRQ
CLK_PCI_SIO

CLK_14M_SIO
SIO_PD#
PME#

1

C565

2

U40

64

2
4
7

10
12
24
14
16
19
21
22
23
25
47

63

1
3
6

9
11
13
15
18
26

4.7U_0805_10V4ZSI207@

LAD0
LAD1
LAD2
LAD3

LPC_CLK_33
LDRQ1#
LDRQ0#
LFRAME#
CLKRUN#
SERIRQ
PCI_CLK
PCIRST#
SIO_14M
LPCPD#
IO_PME#

DLAD0
DLAD1
DLAD2
DLAD3

DLPC_CLK_33
DLDRQ1#
DLFRAME#
DCLKRUN#
DSER_IRQ
DSIO_14M

LPC47N207-JN_STQFP64SI207@

60

3.3V53.3V173.3V313.3V423.3V

LPC I/F

SERIAL I/F

DLPC I/F

IR GPIO

1

2

48

VTR

GPIO10
GPIO11

GPIO12/IO_SMI#

GPIO13/IRQIN1
GPIO14/IRQIN2

GPIO15
GPIO16
GPIO17
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37

RXD1

TXD1

DRSR1#

RTS1#/SYSOPT0

CTS1#

DTR1#/SYSOPT1

DCD1#

IRTX2
IRRX2

IRMODE/IRRX3

GND08GND120GND229GND337GND445GND5

62

RI1#

C594

0.1U_0402_16V4ZSI207@

27
28

SIO_SMI#

30

SIO_IRQ

32
33
34
35
36
38
39
40

BT_DET#

41

FIR_DET#

43
44
46
61

RXD1

52

TXD1

53

DSR#1

54

RTS#1

55

CTS#1

56

DTR#1

57

RI#1

58

DCD#1

59

IRTXOUT

49

IRRX

50

IRMODE

51

DCD#1
RI#1
CTS#1
DSR#1

RP74

1 8
2 7
3 6
4 5

4.7K_8P4R_1206_5%

SIO_SMI# <34>

SIO_ IRQ <34>

RXD1 <34,38>
TXD1 <34,38>
DSR#1 <34,38>
RTS#1 <34,38>
CTS#1 <34,38>
DTR#1 <34,38>
RI#1 <34,38>
DCD#1 <34,38>

IRTXOUT <34,38>
IRRX <34,38>
IRMODE <34,38>

+3VS

BT_DET# <17,34,36>

FIR_DET# <34,38>

RXD1

1 2

R516 1K_0402_5%SI207@

DTR#1

1 2

R513 10K_0402_5%SI207@

RTS#1

Base I/O Address

0 = 02Eh

*

1 = 04Eh

+3VS

R521

10K_0402_5%@

Base I/O Address

1 2

0 = 02Eh

*

1 = 04Eh

R520

1K_0402_5%SI207@

1 2

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

C

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

D

Date: Sheet of

Compal Electronics, Inc.

LPC-Super I/O 207

Boston LA-2721

下午

E

1.0

33 532005/5/6 11:47:57

A

B

C

D

E

SUPER I/O SMsC LPC47N217

LPC_AD[0..3]<18,33,35>

+3VS

R496 10K_0402_5%

1 2

R518 10K_0402_5%

1 2

1 1

R509 100K_0402_5%
R511 100K_0402_5%

SIO_IRQ
IRRX

12
12

R519 10K_0402_5%@
R515 10K_0402_5%

1 2

Agilent IRRX unpop 10K
Vishay IRRX pop 10K

2 2

R499

10K_0402_5%NOSIO@

1 2
1

C562

15P_0402_50V8JNOSIO@

2

SIO_PD#
SIO_SMI#
FIR_DET#
BT_DET#

R498 0_0402_5%

PCI_RST#<17,24,29,35>
PLT_RST#<6,16,17,19,21,22,24,27,35>
SIO_RST#<33>

12

CLK_PCI_SIOCLK_14M_SIO

R504

10_0402_5%@

1 2

1

C574

15P_0402_50V8J@

2

1 2

R497 0_0402_5%@

1 2

FIR_DET#<33,38>
BT_DET#<17,33,36>

LPC_FRAME#<18,33,35>
LPC_DRQ#1<18,33>

PM_CLKRUN#<19,29,33>

CLK_PCI_SIO<14,33>

SERIRQ<19,24,33,35>

PME#<29,33,35>

CLK_14M_SIO<14,33>

FIR_DET#
BT_DET#

SIO_SMI#<33>
SIO_IRQ<33>

SIO_RST#

SIO_PD#<33>

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_FRAME#
LPC_DRQ#1

SIO_PD#

PM_CLKRUN#
CLK_PCI_SIO
SERIRQ
PME#

CLK_14M_SIO

SIO_GPIO11
SIO_SMI#
SIO_IRQ

U39

10

LAD0

12

LAD1

13

LAD2

14

LAD3

15

LFRAME#

16

LDRQ#

17

PCI_RESET#

18

LPCPD#

19

CLKRUN#

20

PCI_CLK

21

SER_IRQ

6

IO_PME#

9

CLK14

23

GPIO40

24

GPIO41

25

GPIO42

27

GPIO43

28

GPIO44

29

GPIO45

30

GPIO46

31

GPIO47

32

GPIO10

33

GPIO11/SYSOPT

34

GPIO12/IO_SMI#

35

GPIO13/IRQIN1

36

GPIO14/IRQIN2

40

GPIO23

8

VSS

22

VSS

43

VSS

52

VSS

LPC47N217_STQFP64217@

LPC_AD[0..3]

CLOCK

GPIO

POWER

FIR

LPC I/F

IRMODE/IRRX3

SERIAL I/F

PARALLEL I/F

STROBE#

RXD1

TXD1
DSR1#
RTS1#
CTS1#
DTR1#

RI1#

DCD1#

IRRX2

IRTX2

INIT#

SLCTIN#

PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7

SLCT

BUSY
ACK#

ERROR#

ALF#

VTR
VCC
VCC
VCC
VCC

RXD1

62

TXD1

63

DSR#1

64

RTS#1

1

CTS#1

2

DTR#1

3

RI#1

4

DCD#1

5

IRRX

37

IRTXOUT

38

IRMODE

39

INIT#

41

SLCTIN#

42

LPD0

44

LPD1

46

LPD2

47

LPD3

48

LPD4

49

LPD5

50

LPD6

51

LPD7

53

LPTSLCT

55

LPTPE

56

PE

LPTBUSY

57

LPTACK#

58

LPTERR#

59

LPTAFD#

60

LPTSTB#

61

7
11
26
45
54

+3VS

RXD1 <33,38>
TXD1 <33,38>
DSR#1 <33,38>
RTS#1 <33,38>
CTS#1 <33,38>
DTR#1 <33,38>
RI#1 <33,38>
DCD#1 <33,38>

IRRX <33,38>
IRTXOUT <33,38>
IRMODE <33,38>

LPTSLCT <40>

LPTPE <40>
LPTBUSY <40>
LPTACK# <40>
LPTERR# <40>

1

C568

2

+3V

0.1U_0402_16V4Z217@

+3VS

1

C567

4.7U_0805_10V4Z

2

217@

SIO_GPIO11

1

C577

0.1U_0402_16V4Z

2

217@

+3VS

R514

10K_0402_5%@

Base I/O Address

1 2

0 = 02Eh

*

1 = 04Eh

R517

1K_0402_5%

217@

1 2

Docking Parallel Port

+5V_PRN

RB420D_SOT23217@

RP51

1 8
2 7
3 6
4 5

68_1206_8P4R_5%217@

RP43

4 5
3 6
2 7
1 8

68_1206_8P4R_5%217@

D23

2 1

R_LPTSTB#
AFD#/3M#
LPTINIT#
LPTSLCTIN#SLCTIN#

FD0
FD1
FD2
FD3

FD7
FD6
FD5

12

R315

217@

2.2K_0402_5%

C295

1 2

220P_0402_50V7K217@

R_LPTSTB# <40>
AFD#/3M# <40>
LPTINIT# <40>
LPTSLCTIN# <40>

FD0 <40>
FD1 <40>
FD2 <40>
FD3 <40>

FD7 <40>
FD6 <40>
FD5 <40>
FD4 <40>

3 3

LPTSTB#

R316 33_0402_5%

LPTAFD#
INIT#

4 4

1 2

R358 33_0402_5%

1 2

R374 33_0402_5%

1 2

R380 33_0402_5%

1 2

+5VS

217@
217@
217@
217@

LPD0
LPD1
LPD2
LPD3

LPD7
LPD6
LPD5
LPD4 FD4

A

C404 220P_0402_50V7K@

1 2

C399 220P_0402_50V7K@

1 2

C393 220P_0402_50V7K@

1 2

C385 220P_0402_50V7K@

1 2

C346 220P_0402_50V7K@

1 2

C342 220P_0402_50V7K@

1 2

C336 220P_0402_50V7K@

1 2

C332 220P_0402_50V7K@

1 2

C352 220P_0402_50V7K@

1 2

C360 220P_0402_50V7K@

1 2

C363 220P_0402_50V7K@

1 2

C367 220P_0402_50V7K@

1 2

C318 220P_0402_50V7K@

1 2

C330
C312 220P_0402_50V7K@

1 2

C328 220P_0402_50V7K@

1 2
1 2

B

220P_0402_50V7K@

Close to Docking

LPTSLCTIN#
LPTINIT#
LPTERR#
AFD#/3M#
LPTACK#
LPTBUSY
LPTPE
LPTSLCT
FD0
FD1
FD2
FD3
FD4
FD5
FD6
FD7

+5V_PRN

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

RP48

2.7K_1206_8P4R_5%217@
RP55

2.7K_1206_8P4R_5%217@
RP54

2.7K_1206_8P4R_5%217@
RP46

2.7K_1206_8P4R_5%217@

LPTSLCT
LPTPE
LPTBUSY
LPTACK#

AFD#/3M#
LPTERR#
LPTINIT#
LPTSLCTIN#

FD0
FD1
FD2
FD3

FD7
FD6
FD5
FD4

Compal Secret Data

Deciphered Date

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

2005/05/06 2006/05/06

C

D

Serial Port
for Debug

+5VS

JP13

1

1

2

RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

LPC-Super I/O 217

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

E&T_96212-1011S@

Boston LA-2721

下午

34 532005/5/6 11:47:57

E

1.0

5

KBA[0..19]

ADB[0..7]

L4

1 2

D D

C C

Rc

Rd

B B

A A

FBM-L11-160808-800LMT_0603

PME#<29,33,34>

GMCH_ENBKL<8,16>

PCI_RST#<17,24,29,34>
PLT_RST#<6,16,17,19,21,22,24,27,34>

+3VALW +3VALW

SKU ID definition,
Please see page 3.

R99
100K_0402_1%

1 2

C123 0.1U_0402_16V4Z

1 2

R108 0_0402_5%
R605 8.2K_0402_1%
R606 18K_0402_1%
R607 33K_0402_1%
R608 56K_0402_1%
R609 100K_0402_1%
R610 200K_0402_1%

+3VALW

RP32

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

+5VALW

RP33

1 8
2 7
3 6
4 5

4.7K_0804_8P4R_5%

+5VS

+3VALW

SKU_ID

12

10@

12

10C@

12

10G@

12

10GC@

12

SID4@

12

SID5@

12

SID6@

MODE#
FRD#
SELIO#
FSEL#

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

22P_0402_50V8J@

R1804.7K_0402_5%
R1834.7K_0402_5%

R1861K_0402_5%
R1881K_0402_5%
R1891K_0402_5%
R206100K_0402_5%

5

+3VALW

PME#

12
12

12
12
12
12

KBA[0..19] <37>
ADB[0..7] <37>

ECAGND

C154

1 2

R181 33_0402_5%@

12

CLK_PCI_LPC<14>

R208
10K_0402_5%

R166 0_0402_5%

1 2

R213 0_0402_5%

1 2

R217 0_0402_5%@

1 2

Re

Rf

+5VS

RP31

1 8
2 7
3 6
4 5

4.7K_0804_8P4R_5%

TP_CLK

TP_DATA

KBA1
KBA4
KBA5

EJCTSW#

12

SKU ID1 definition

R113
100K_0402_1%

1 2

SKU_ID1

R106
0_0402_5%@

1 2

KB_CLK
KB_DATA
PS_CLK
PS_DATA

C150 0.1U_0402_16V4Z

+3VALW

R173 47K_0402_5%

1 2

R158 120K_0402_5%@

1 2

R107 10K_0402_5%

1 2

R184 1K_0402_5%

1 2

R185 1K_0402_5%

0.1U_0402_16V4Z

ENBKL

LRST#

12

12

1394_PHYRST_S3P

1394_DILSON_S3P

4

0.1U_0402_16V4Z

1

1

C147

2

2

LPC_AD0<18,33,34>
LPC_AD1<18,33,34>
LPC_AD2<18,33,34>
LPC_AD3<18,33,34>

LPC_FRAME#<18,33,34>

SERIRQ<19,24,33,34>

DOCKIN#<15,40>

IE_BTN#<39>

+3VALW

R160 100K_0402_5%

KB_CLK<40>

KB_DATA<40>

PS_CLK<40>

PS_DATA<40>

TP_CLK<36>
TP_DATA<36>

EC_SMB_CK1<37,45>
EC_SMB_DA1<37,45>
EC_SMB_CK2<4,30,40>
EC_SMB_DA2<4,30,40>

DKN_B+_ON<46>

BT_RST#<36>
BT_WAKE_UP<36>

BKOFF#<16>
FSTCHG<46>
EC_SMI#<19>

ODD_RESET#<22>

WL_OFF#<29>
EC_SWI#<19>

S4_LATCH<41>

S4_SATA<41>
LID_SW#<39>
MODE#<39>

SYSON<30,39,41,42,48>

SUSP#<16,26,30,32,37,38,42,49>

VR_ON<50>

EJCTSW#<40>

BT_DETACH<36>

PBTN_OUT#<19>

PADS_LED#<36>

CAPS_LED#<36>

NUM_LED#<36>

PHDD_LED#<18>

EC_GA20<18>

EC_KBRST#<18>

ENBKL

DPCONF_S5P_R

4

C184

1

2

0.1U_0402_16V4Z

FRD#<37>
FWR#<37>
FSEL#<37>

EC_SCI#<19>

0.1U_0402_16V4Z

1

C182

2

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LRST#

DOCKIN#

FRD#
FWR#
FSEL#
SELIO#
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

IE_BTN#

12

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

DKN_B+_ON
EC_SCI#
BT_RST#
BT_WAKE_UP
ENBKL
BKOFF#

FSTCHG

EC_SMI#
ODD_RESET#

LID_SW#
MODE#
SYSON
SUSP#
VR_ON
EJCTSW#
BT_DETACH

PBTN_OUT#

PADS_LED#
CAPS_LED#
NUM_LED#

C164

KB_CLK
KB_DATA
PS_CLK
PS_DATA
TP_CLK
TP_DATA

3

+3VALW

L7

Change to 0 ohm

1 2

2

1000P_0402_50V7K

1

15
14
13
10

165

18
25

24

150
151
173
152
138
139
140
141
144
145
146
147
124
125
126
127
128
131
132
133
143
142
135
134
130
129
121
120
113
112
104
103
108
105

110
111
114
115
116
117

163
164
169
170

20
21
22
27
28
48
62
63
69
70

75
109
118
119
148
149
155
156
162
168

55

54

23

41

19

31

C122

U14

LAD0
LAD1
LAD2
LAD3

9

LFRAME#
LRST#/GPIO2C
LCLK

7

SERIRQ
CLKRUN#/GPIO0C
LPCPD#/GPIO0B

RD#
WR#
MEMCS#
IOCS#
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1/XIOP_TP
A2
A3
A4/DMRP_TP
A5/EMWB_TP
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20/GPIO23
E51CS#/GPIO20/ISPEN

PSCLK1
PSDAT1
PSCLK2

PS2 Interface

PSDAT2
PSCLK3
PSDAT3

SCL1
SDA1
SCL2
SDA2

8

GPIO04
GPIO07
GPIO08
GPIO09
GPIO0D
GPIO0E
GPIO10
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO2A
GPIO2B
GPIO2D

FnLock#/GPIO12
CapLock#/GPIO011
NumLock#/GPIO0A
ScrollLock#/GPIO0F
ECRST#

5

GA20/GPIO02

6

KBRST#/GPIO03
ECSCI#

2

1

LPC Interface

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS , INC . AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.

0_0603_5%

C191
1000P_0402_50V7K

VCC16VCC34VCC45VCC

*

*

X-BUS Interface

SMBus

GPIO

*

*

*

*

MISC

1

C144

2

0.1U_0402_16V4Z

ECAGND

95

136

157

166

VCC

VCC

VCC

96

161

159

VCCA

AGND

VCCBAT

BATGND

FAN2PWM/GPOW2/PWM2

Pulse Width

FAN1PWM/GPOW7/PWM7

GPOK0/KSO0
GPOK1/KSO1
GPOK2/KSO2
GPOK3/KSO3
GPOK4/KSO4
GPOK5/KSO5
GPOK6/KSO6
GPOK7/KSO7
GPOK8/KSO8

GPOK9/KSO9
GPOK10/KSO10
GPOK11/KSO11
GPOK12/KSO12
GPOK13/KSO13
GPOK14/KSO14
GPOK15/KSO15
GPOK16/KSO16
GPOK17/KSO17

Internal Keyboard

GPOW0/PWM0
GPOW1/PWM1

GPOW3/PWM3
GPOW4/PWM4
GPOW5/PWM5
GPOW6/PWM6

GPIK0/KSI0
GPIK1/KSI1
GPIK2/KSI2
GPIK3/KSI3
GPIK4/KSI4
GPIK5/KSI5
GPIK6/KSI6
GPIK7/KSI7

123

Wake Up Pin

TIN1/GPWU6

TIN2/FANFB2/GPWU7

GPIAD0/AD0
GPIAD1/AD1
GPIAD2/AD2

ENE-KB910-B4

Analog To Digital

Digital To Analog

Expanded I/O

FAN

TEST_TP/GPIO05/FAN3PWM

Timer Pin

GND17GND35GND46GND

GND

GND

122

137

167

2005/05/06 200 6/05/06

3

GPIAD3/AD3
GPIAD4/AD4
GPIAD5/AD5
GPIAD6/AD6
GPIAD7/AD7

GPODA0/DA0

GPODA1/DA1

GPODA2/DA2

GPODA3/DA3

GPODA4/DA4

GPODA5/DA5

GPODA6/DA6

GPODA7/DA7

GPIO18/XIO8CS#

*

GPIO19/XIO9CS#

*

GPIO1A/XIOACS#

*

*

GPIO1B/XIOBCS#
GPIO1C/XIOCCS#

*

GPIO1D/XIODCS#

*

GPIO1E/XIOECS#

*

GPIO1F/XIOFCS#

*

GPIO2E/TOUT1/FANFB1

DPLL_TP/GPIO06/FANFB3

TOUT2/GPIO2F
E51IT0/GPIO00

E51IT1/GPIO01
E51RXD/GPIO21/ISPCLK
E51TXD/GPIO22/ISPDAT

KB910Q B4_LQFP176

Compal Secret Data

Deciphered Date

0.1U_0402_16V4Z

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
153
154

71
72
73
74
77
78
79
80

32
33
36
37
38
39
40
43

2

GPWU0

26

GPWU1

29

GPWU2

30

GPWU3

44

GPWU4

76

GPWU5

172
176

81
82
83
84
87
88
89
90

99
100
101
102
1
42
47
174

85
86
91
92
93
94
97
98

171
12
11

175
3

4
106
107

158

XCLKI

160

XCLKO

C183

PWR_SUSP_LED

AUD_SUDMUT_P3#
PWR_LED#

WL_BT_LED#

HDD_LED#
BATT_LOW_LED#
BATT_CHGI_LED#

1394_PHYRST_S3P
1394_DILSON_S3P

+3VALW

R216
0_0402_5%

1 2

1

1

C189
1U_0603_10V4Z

2

2

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

KSO17
KSI0

KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

INVT_PWM
BEEP#

ACOFF
EC_ON

EC_LID_OUT#
EC_MUTE

ON/OFF
KILL_SW#

PM_SLP_S3#
PM_SLP_S5#
IDE_MRESET#
PME#
PM_SLP_S4#

BATT_TEMP
SKU_ID
BATT_AOVP
DPCONF_S5P_R
ALI/MH#

SKU_ID1

AD_BID0

DAC_BRIG
BT_PWR
IREF
EN_DFAN1#

R141 0_0402_5%@

EC_IDERST

SPKSEL
NBA_PLUG

FAN_SPEED1

EC_THERM#

SHDD_LED#
E51_RXD
E51_TXD

CRY2
CRY1

2

2

KSI[0..7]
KSO[0..15]

KSO17 <39>
EC_PLAYBTN# <36,39>

EC_STOPBTN# <36,39>
EC_REVBTN# <36,39>
EC_FRDBTN# <36,39>

INVT_PWM <16>
BEEP# <30>
PWR_SUSP_LED <39>
ACOFF <46>

EC_ON <41>
EC_LID_OUT# <19>
EC_MUTE <32>

ON/OFF <41>
KILL_SW# <29,36,38>

PM_SLP_S3# <19>
PM_SLP_S5# <19>
IDE_MRESET# <19>

PM_SLP_S4# <19>

BATT_AOVP <46>

R604 5.6K_0402_5%

1 2

ALI/MH# <45>
SKU_ID1 <39>

DAC_BRIG <16>
BT_PWR <36>
IREF <46>
EN_DFAN1 <38>

1 2

EC_IDERST <30>
AUD_SUDMUT_P3# <40>

PWR_LED# <39>
WL_BT_LED# <39>
HDD_LED# <39>
BATT_LOW_LED# <39>
BATT_CHGI_LED# <39>

SPKSEL <30>
NBA_PLUG <30,32>

FAN_SPEED1 <38>
1394_PHYRST_S3P <40>
1394_DILSON_S3P <40>

EC_THERM# <19>
EC_RSMRST# <19>

SHDD_LED# <22>

1 2

R169 0_0402_5%

For EC Tools

JP14

1
2
3
4

ACES_85205-0400@

KSI[0..7] <36,39>
KSO[0..15] <36>

Analog Board ID definition,
Please see page 3.

+3VALW

Ra

Rb

+3VALW

R170
10K_0402_5%

1 2

D10

2 1

RB751V_SOD323

ECAGND

12

C121 0.01U_0402_16V7K

1 2

100K_0402_5%

R142

1 2

C140 0.22U_0402_10V4Z

PM_BATLOW#

Title

Size Document Number Rev

Date: Sheet

PM_BATLOW# <19>

EAPD <30,32>

Compal Electronics, Inc.

ENE-KB910

Boston LA-2721

下午

1

1

E51_RXD

2

E51_TXD

3
4

R119
100K_0402_5%

1 2

R122
33K_0402_1%

1 2

ACIN <19,39,44>

DPCONF_S5P <40>

C199

1

2

BATT_TEMP <45>

ADP_I <46>

CRY1

1 2

1

1

IN

2

10P_0402_50V8J

2

32.768KHZ_12.5P_1TJS125BJ2A251

1

+5VALW

AD_BID0

C138

0.1U_0402_16V4Z

CRY2

R211
20M_0603_5%@

4

X2

OUT

NC3NC

of

35 532005/5/6 11:47:54

R212
0_0402_5%

1 2

1

C205

2

10P_0402_50V8J

1.0

MDC CONN.

ICH_AC_SDOUT

18,30>

ICH_AC_RST#

18,30>

SW_L

KSO7
KSO6
KSO5
KSO4
KSO3
KSI4
KSO2
KSO1
KSO0
KSI5
KSI6
KSI7
KSO8

+3V
+3VS

1 2

Change to 0 ohm

1 2

L14 0_0603_5%MDC@
R175
R177

TP CONN.

TP Button

SW1

1
2

3
4

SMT1-05_4P

5

6

C525 100P_0402_25V8K
C537 100P_0402_25V8K
C522 100P_0402_25V8K
C518 100P_0402_25V8K
C540 100P_0402_25V8K
C524 100P_0402_25V8K
C533 100P_0402_25V8K
C520 100P_0402_25V8K
C535 100P_0402_25V8K
C523 100P_0402_25V8K
C538 100P_0402_25V8K
C526 100P_0402_25V8K
C542 100P_0402_25V8K

R522
0_0402_5%

MDC@

MDC_AC_SDOUT

12

22_0402_5%MDC@

MDC_AC_RST#

12

22_0402_5%MDC@

+3VS_MDC

SW_R

TP_DATA<35>
TP_CLK<35>

SW2

1
2

KSI[0..7]
KSO[0..15]

5

6

1
3
5
7

9
11
13
15
17
19
21
23
25
27
29

SMT1-05_4P

JP26

MONO_OUT/PC_BEEP
GND
AUXA_RIGHT
AUXA_LEFT
CD_GND
CD_RIGHT
CD_LEFT
GND
+3.3Vaux/BT_VCC
GND
+3.3Vmain
AC97_SDATA_OUT
AC97_RESET#
GND
AC97_MSTRCLK

ACES_88018-3010

MDC@

TP_DATA
TP_CLK

SW_L
SW_R

R79

3
4

KSI[0..7] <35,39>
KSO[0..15] <35>

KSO15

C544 100P_0402_25V8K

KSO14

C529 100P_0402_25V8K

KSO13

C541 100P_0402_25V8K

KSO12

C539 100P_0402_25V8K

KSI0

C521 100P_0402_25V8K

KSO11

C528 100P_0402_25V8K

KSO10

C543 100P_0402_25V8K

KSI1

C534 100P_0402_25V8K

KSI2

C519 100P_0402_25V8K

KSO9

C527 100P_0402_25V8K

KSI3

C536 100P_0402_25V8K

PADS_LED#

C530 100P_0402_25V8K

NUM_LED#

C546 100P_0402_25V8K

CAPS_LED#

C545 100P_0402_25V8K

AUDIO_PWRDN/DETECH

MONO_PHONE

RESERVED/BT_ON#

RESERVED/PRIMARY_DN

RESERVED/+5VD/WAKEUP

12

0_0402_5%@

Touchpad mount direction:
Standard: N/A, Reverse: Stuff

GND

+5Vmain

RESERVED/USB+

RESERVED/USB-

RESERVED/GND

AC97_SYNC
AC97_SDATA_IN1
AC97_SDATA_IN0

GND

AC97_BITCLK

JP10

12
11
10
9
8
7
6
5
4
3
2
1

ACES_87151-1207

+5VS

2
4
6
8

+5VS_MDC

10
12
14
16

R156 10K_0402_5%

18
20
22
24
26
28
30

1 2

R159

C90

0.1U_0402_16V4Z

1

C141
1U_0805_25V4Z

2

MDC@

Change to 0 ohm

1 2

L6 0_0603_5%

1 2

MDC@

0_0402_5%

MDC@

R167 22_0402_5%MDC@

R172

1 2

R602

1 2

1

2
1

2

MDC@

R603

1 2

10_0402_5%@

C486

180P_0402_50V8J@

C91

180P_0402_50V8J@

+3VS

1 2

22_0402_5%MDC@

TP_CLK

TP_DATA

+3VS_MDC

1

2

0_0402_5%M DC@

C674

12

10P_0402_50V8J@

D24 DAN217_SC59@

1

1

D4 DAN217_SC59@

C604
1U_0805_25V4Z

MDC@

+5VS

ICH_AC_SDIN1 <18>
ICH_AC_BITCLK <18,30>

2
3

2
3

+5VS_MDC+3V

1

C145
1U_0805_25V4Z

2

MDC@

ICH_AC_SYNC <18,30>

+5VS

INT_KBD CONN.

JP11

1
2
3
4

KSO15

5

KSO14

6

KSO10

7

KSO11

8

KSO8

9

KSO9

10

KSO13

11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

ACES_88170-3400

KSI7

KSO3

KSO7

KSO12

KSI4

KSI6

KSI5

KSO6

KSO5

KSI3

KSI0

KSO0

KSO1

KSI1

KSI2

KSO4

KSO2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

NUM_LED# <35>

PADS_LED# <35>

CAPS_LED# <35>

1 2

1 2

1 2

R491300_0402_5%

R488300_0402_5%

Compal Secret Data

Deciphered Date

R489300_0402_5%

+3VS

+3VS

+3VS

BlueTooth Interface

+3VS+5VS

R446
100K_0402_5%

BT@

1 2

Q49
DTC124EK_SC59BT@

BT_PWR<35>

CH_CLK<29>

USB20_P5<19>

USB20_N5<19>

CH_DATA<29>

13

2

Module ID

Indication for polarity of reset
Reset input High Active --> Low ,
Reset input Low Active --> Open

0.1U_0402_16V4Z@

KILL_SW#<29,35,38>
BT_RST#<35>

BT_DET#<17,33,34>

BT_WAKE_UP<35>

BT_DETACH<35>

R590

USB20_P5
USB20_N5

R591

Title

MDC / BT / KBD / TP

Size Document Number Rev

Date: Sheet of

C481

0.1U_0402_16V4Z

BT@

C69

1

B

2

A

1 2

R64

+BT_VCC

(MAX=200mA)

0.1U_0402_16V4Z

BT@

Compal Electronics, Inc.

Boston LA-2721

下午

+3VS

5

U6

P

Y

G

TC7SH08FU_SSOP5@

3

0_0402_5%

BT@

BT_DET#

BT_RESET#
BT_WAKE_UP

12

100K_0402_5%@

12

100K_0402_5%@

C467

G

2

4

C480

0.1U_0402_16V4Z

BT@

S

Q48

D

AO3413_SOT23BT@

1 3

+BT_VCC

C469
10U_1206_16V4Z

BT_RESET#

JP9

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

ACES_87151-2005

BT@

(Top Contact)

Bluetooth Connector

36 532005/5/6 11:47:58

1.0

FWE#

C203

1 2

0.1U_0402_16V4Z

4

+3VALW

5

U22

2

P

I0

O

1

I1

G

TC7SH32FU_SSOP5

3

+5VALW

C214 0.1U_0402_16V4Z

1 2

+3VALW

12

R241
100K_0402_5%

1 3

+5VALW

12

R235
100K_0402_5%

2

G

D

S

Q24
2N7002_SOT23

SUSP# <16,26,30,32,35,38,42,49>

EC_FLASH# <19>

FWR# <35>

INT_FSEL#

INT_FLASH_SEL

SN74LVC125APWLE_TSSOP14

R229
10K_0402_5%

R232 22_0402_5%

1 2

13

U26D

O

10

O

12

OE#

I

INT_FLASH_EN#

9

OE#

I

11

+3VALW

1 2

U26C

8

SN74LVC125APWLE_TSSOP14

SB_INT_FLASH_SEL# <19>

SUS_STAT# <19>

C211 0.1U_0402_16V4Z

1 2

R239

1 2

100K_0402_5%

FSEL# <35>

U25

8

VCC

7

WP

EC_SMB_CK1<35,45>

EC_SMB_DA1<35,45>

6

SCL

5

SDA

AT24C16AN-10SI-2.7_SO8

GND

1

A0

2

A1

3

A2

4

12

R231
100K_0402_5%

KBA[0..19]<35>
ADB[0..7]<35>

1 2

R233 0_0402_5%@

KBA[0..19]
ADB[0..7]

1MB ROM Socket

1MB Flash ROM

KBA16 KBA17
KBA15
KBA14

KBA12
KBA11
KBA9
KBA8
FWE#
RESET#
INT_FLASH_EN#
INT_FLASH_SEL
KBA18
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1

Compal Secret Data

Deciphered Date

1 2

+3VALW

1

C229

0.1U_0402_16V4Z

2

+3VALW

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

INT_FSEL#

FRD#<35>

FRD#
FWE#

U24

21

A0

20

A1

19

A2

18

A3

17

A4

16

A5

15

A6

14

A7

8

A8

7

A9

36

A10

6

A11

5

A12

4

A13

3

A14

2

A15

1

A16

READY/BUSY#

40

A17

13

A18

37

A19

22

CE#

24

OE#

9

WE#

SST39VF080-70_TSOP40

VCC0
VCC1

RP#

NC0
NC1

GND0
GND1

31
30

ADB0

25

D0
D1
D2
D3
D4
D5
D6
D7

NC

ADB1

26

ADB2

27

ADB3

28

ADB4

32

ADB5

33

ADB6

34

ADB7

35

RESET#

10
11
12
29
38

23
39

R256 100K_0402_5%

JP28

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40

SUYIN_80065AR-040G2T@

KBA19KBA13
KBA10
ADB7
ADB6
ADB5
ADB4

ADB3
ADB2
ADB1
ADB0
FRD#

FSEL#
KBA0

+3VALW

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

BIOS & EXT. I/O PORT

Boston LA-2721

下午

of

37 532005/5/6 11:47:56

1.0

C1+

C1­C2+

C2­TIN1
TIN2
TIN3
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5
ROUTB2

FORCEON
FORCEOFF#

MAX3243CAI_SSOP28WD@

+3V

26

U7

27

V+

VCC

3

V-

9

TOUT1

10

TOUT2

11

TOUT3

4

RIN1

5

RIN2

6

RIN3

7

RIN4

8

RIN5

21

INVLD#

25

GND

12

C120 0.1U_0402_16V4ZWD@

12

C92 0.1U_0402_16V4ZWD@

DTR#
RTS#
TXD
CTS#
RI#
RXD
DCD#
DSR#

DTR# <40>

RTS# <40>

TXD <40>

CTS# <40>

RI# <40>

RXD <40>
DCD# <40>
DSR# <40>

Kill SWITCH

+3V

2

D26
DAN217_SC59KILL@

3

11223

SW31BS003-1211L_3P KILL@

3

1

+3V

R550
100K_0402_5%

1 2

KILL_SW#

KILL_SW# <29,35,36>

Close to Docking

DTR#1<33,34>
RTS#1<33,34>
TXD1<33,34>

CTS#1<33,34>
RI#1<33,34>
RXD1<33,34>
DCD#1<33,34>
DSR#1<33,34>

SUSP#<16,26,30,32,35,37,42,49>

2

C119

0.1U_0402_16V4ZWD@

1

28

2

C115

0.1U_0402_16V4ZWD@

0.1U_0402_16V4ZWD@

C93

24

1

1

2

2

1

14
13
12
19
18
17
16
15
20

23
22

FAN Conn

1 2

FAN_SPEED1<35>

+5VS

2

B

1

C

Q10
FMMT619_SOT23

E

3

12

D3
1N4148_SOT23

FAN1

2

1

12

JP21

ACES_85205-0300

C423
1000P_0402_50V7K@

C47
10U_1206_16V4Z

3
2
1

FIR Module

IRRX<33,34>

FIR_DET#

+3VS

1

C652

2

IRRX IRMODE

(30mil, 3via)

SD/MODE: SHUTDOWN MODE, HIGH ACTIVE
MODE: HIGH/LOW SPEED SELECT

FIR_DET#<33,34>

+3VS

1

C653

10U_0805_10V4Z@

10U_1206_16V4ZFIR@

2

C658

R559
0_1206_5%

FIR@

1 2

+IR_3VS

(30mil)

1

1

C659

0.1U_0402_16V4ZFIR@

2

2

22U_1206_16V4Z_V1

L: R POP; FIR Enable
H: R De-POPFIR Disable

R508 1K_0402_5%

(60mil)

2
4
6
8

1 2

IR1

IRED_C
RXD
VCC
GND

TFDU6102-TR3_8PFIR@

FIR@

R548 4.7_1206_5%@

1 2
1 2

R549 4.7_1206_5%

FIR@

IRED_A

SD/MODE

MODE

TXD

+IR_ANODE

1
3
5
7

(60mil)

IRTXOUT

IRTXOUT <33,34>
IRMODE <33,34>

12

D2
1SS355_SOD323

2

C45

1000P_0402_50V7K@

1

+12VALW

1 2

C41

0.1U_0402_16V4Z

8

P

3

+IN

2

-IN

1 2

R50 8.2K_0402_5%

OUT
G

4

EN_FAN1

1

U5A
LM358A_SO8

1 2

R51
100_0402_5%

+3VS

2

C48

0.1U_0402_16V4Z@

1

R52 10K_0402_5%

R49

10K_0402_5%

EN_DFAN1

12

EN_DFAN1<35>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

FAN1 / FIR / Kill

Boston LA-2721

下午

38 532005/5/6 11:47:56

1.0

5

4

3

2

1

Switch Board Conn.

USB Board Conn.

SKU_ID1<35>

KSO17<35>

2
3

+3VALW

1 2

51ON#

ON/OFFBTN#<41>

EC_PLAYBTN#<35,36>
EC_STOPBTN#<35,36>
EC_FRDBTN#<35,36>
EC_REVBTN#<35,36>

R100
100K_0402_5%

IE_BTN# <35>

MODE# <35>
51ON# <41,44>

ACES_87213-1000

1

JP3

2
3
4
5
6
7
8
9

10

D D

C C

B B

+5VALW +5VALW

1
2
3
4
5
6
7
8
9
10

+3VALW

47K

2

10K

Q16

DTA114YKA_SC59

1 3

R87 120_0402_5%

R576 120_0402_5%

RTCVREF

R598

0.1U_0402_16V4Z

Change from 300 to 120

1 2

1 2

USB20_N1 <19>
USB20_P1 <19>

USB20_N3 <19>
USB20_P3 <19>

Q61

2N7002_SOT23

1 3

R586

1 2

1 2

0_0402_5%

C292

SYSON# <42>

2

G

D

S

0_0402_5%@

4

1

2

SYSON

PWR_SUSP_LED

PWR_SU SPLED#

PWR_SUSPLED1#

1 2

R298 47K_0402_5%
U30

A3212EEH_MLP6

VDD5OUTPUT

NC

ACES_87213-1000

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

JP17

1

1

2

NC

GND

3

2

SYSON#

PWR_SUSP_LED <35>

LID

C282

10P_0402_25V8K

USB20_N2 <19>
USB20_P2 <19>

USB20_N4 <19>
USB20_P4 <19>

1

D12
DAN202U_SC70

2
3

LID_SW#

IEBTN#

MODEBTN#

1 2

LID_SW# <35>
S4_LID_SW# <41>

1

D8
DAN202U_SC70

1

D7
DAN202U_SC70

R205100K_0402_5%

2
3

+3VALW

PWR_LED_1#
PWR_SU SPLED#

ON/OFFBTN#
IEBTN#
MODEBTN#
EC_PLAYBTN#
EC_STOPBTN#
EC_FRDBTN#
EC_REVBTN#

JP8

1
2
3
4
5
6
7
8
9
10
11
12

ACES_85201-1205

PWR_SUSPLED1#

PWR_LED_0#51ON#

+5VALW

1 2

R304 300_0402_5%

+5VALW

1 2

R293 300_0402_5%

1 2

R292 300_0402_5%

+5VS

1 2

R301 300_0402_5%

KSO17
ON/OFFBTN#
PWR_LED_1#
PWR_SU SPLED#
IEBTN#
MODEBTN#
EC_REVBTN#
EC_FRDBTN#
EC_PLAYBTN#
EC_STOPBTN#

C432 220P_0402_50V7K
C444 220P_0402_50V7K
C427 220P_0402_50V7K
C417 220P_0402_50V7K
C421 220P_0402_50V7K

D17

3 4

2 1

HT-297UD/NB_BLUE/AMB_0603

B@

D18

2 1

HT-191NB_BLUE_0603

B@

BATTERY CHG

B@

HT-297UD/NB_BLUE/AMB_0603

3 4

2 1

D19

HDD LED

D20

2 1

HT-191NB_BLUE_0603

B@

1 2
1 2
1 2
1 2
1 2

ACIN<19,35,44>

POWER/ON LED

AC IN LED

BATT_LOW_LED#

BATT_CHGI_LED#

C441 220P_0402_50V7K

1 2

C447 220P_0402_50V7K

1 2

C429 220P_0402_50V7K

1 2

C415 220P_0402_50V7K

1 2

C424 220P_0402_50V7K

1 2

13

D

Q40

2

G

2N7002_SOT23

S

BATT_LOW_LED# <35>

BATT_CHGI_LED# <35>

HDD_LED# <35>

Lid SW

+3VALW

1 2

R558 300_0402_5%KILL@

+5VALW

Q39

DTA114YKA_SC59

A A

47K

1 3

5

2N7002_SOT23

2

10K

Change from 120 to 300

R297 300_0402_5%

1 2

R303 300_0402_5%

1 2

R587

1 2

Q62

1 3

D

2

G

0_0402_5%@

PWR_LED#

S

PWR_LED_0#

PWR_LED_1#

SYSON <30,35,41,42,48>

PWR_LED# <35>

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

3

Compal Secret Data

Deciphered Date

+5VS

1 2

R554 300_0402_5%

2

WL&BT LED

D27

2 1

HT-191UD_AMBER_0603KILL@

WL_BT_LED# <35>

5IN1 LED

D25

2 1

5IN1@

HT-191NB_BLUE_0603

B@
5IN1_LED<24,25>

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Switchs & LED

Boston LA-2721

下午

13

D

Q35

2

G

2N7002_SOT23

5IN1@

S

1

1.0

of

39 532005/5/6 11:47:56

A

Docking Conn.

JP18A

1 1

+DC_IN_S1 +DC_IN_S1

DKN_B+ DKN_B+ DKN_B+ DKN_B+

+5VS +5VS +5VS +5VS

PS_CLK<35>
KB_CLK<35>

1394_PHYRST_S3P<35>

DPCONF_S5P<35>

D_DDC_CLK<15>
D_CRT_R<15>
D_CRT_G<15>
D_CRT_B<15>
D_CRT_VSYNC<15>
DVI_SCLK<16>

DVI_TXD2+<16>

2 2

3 3

4 4

DVI_TXD2-<16>
DVI_TXD1+<16>
DVI_TXD1-<16>
DVI_TXD0+<16>
DVI_TXD0-<16>

DVI_TXC+<16>
DVI_TXC-<16>
DVI_DET<16>

RJ45_MDI3+<28>
RJ45_MDI3-<28>

MDC to Docking Conn.

MDC1_RING
MDC2_TIP

DCOCT1#
PS_CLK PS_DATA

KB_CLK KB_DATA
1394_PHYRST_S3P

DPCONF_S5P

D_DDC_CLK
D_CRT_R
D_CRT_G
D_CRT_B
D_CRT_VSYNC
DVI_SCLK DVI_SDATA

DVI_TXD2+
DVI_TXD2­DVI_TXD1+
DVI_TXD1­DVI_TXD0+
DVI_TXD0-

DVI_TXC+
DVI_TXC­DVI_DET

RJ45_MDI3+
RJ45_MDI3-

MDC1_RING
MDC2_TIP

JP1

1
2
3
4

ACES_87213-0410WD@

A

245

GND
GND

VCC

S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S11
S12
S13
S14
S15
S16
S17
S18
S19
S20
S21
S22
S23
S24
S25
S26
S27
S28
S29
S30
S31
S32
S33
S34
S35
S36
S37
S38
S39
S40
S41
S42
S43
S44
S45
S46
S47
S48
S49
S50
S51
S52

S55
S56

M59
M60

GND

GND
GND

VCC

S61
S62
S63
S64
S65
S66
S67
S68
S69
S70
S71
S72
S73
S74
S75
S76
S77
S78
S79
S80
S81
S82
S83
S84
S85
S86
S87
S88
S89
S90
S91
S92
S93
S94
S95
S96
S97
S98

S99
S100
S101
S102
S103
S104
S105
S106
S107
S108
S109
S110
S111
S112

S115
S117

MODEM

TYCO_1674036WD@

246
241

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52

55
56

59
60

253

B

+3VALW

10K_0402_5%WD@
R334
R333

247
248

242

61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112

115
117

EJCTSW#

1394_DILSON_S3P

D_DDC_DATA

Pin 73, 74 and 75 for VGA GND

D_CRT_HSYNC

RJ45_MDI2­RJ45_MDI2+

100K_0402_5%WD@

EC_SMB_DA2<4,30,35>

12

1 2

EJCTSW# <35>

PS_DATA <35>
KB_DATA <35>

1394_DILSON_S3P <35>

D_DDC_DATA <15>

D_CRT_HSYNC <15>

DVI_SDATA <16>

RJ45_MDI2- <28>
RJ45_MDI2+ <28>

+5VALW

R314

1 2

G

2

S

Q43

2N7002_SOT23WD@

10K_0402_5%WD@

+3VALW

2

1 3

D

EC_SMB_CK2<4,30,35>

13

D

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

G

S

C

+3VALW

C302

5

DCOCT1#
DCOCT2#

Q44

2N7002_SOT23WD@

U34

2

P

I0

O

1

I1

G

3

AUD_SUDMUT_P3#<35>

DOCK_ON/OFFBTN#<41>

G

2

13

D

S

Q42

2N7002_SOT23WD@

2005/05/06 2006/05/06

C

0.1U_0402_16V4ZWD@

12

DOCKIN#

4

TC7SH32FU_SSOP5WD@

+5VALW

TPA1+<24>
TPB1+<24>

LINEOL<31>
LINEIL<31>
LINEIR#<31>

DCD#<38>
DSR#<38>

TXD<38>

RI#<38>
LPTPE<34>
FD7<34>
FD6<34>

FD4<34>
FD1<34>
FD2<34>
FD0<34>
R_LPTSTB#<34>

+3VALW

RJ45_GND<28>
RJ45_MDI0+<28>
RJ45_MDI0-<28>

1 2

R313

1 2

R311

Compal Secret Data

Deciphered Date

+3VALW

D_EC_SMB_CK2 D_EC_SMB_DA2

TPA1+ TPA1­TPB1+ TPB1-

AUD_SUDMUT_P3#
LINEOL

LINEIL
LINEIR#

DOCK_ON/OFFBTN#
DCD#
DSR#
TXD
RI#
LPTPE
FD7
FD6

FD4
FD1
FD2
FD0
R_LPTSTB#

RJ45_GND
RJ45_MDI0+
RJ45_MDI0-

1394_DILSON_S3P

4.7K_0402_5%WD@

D_EC_SMB_CK2

4.7K_0402_5%

WD@

D_EC_SMB_DA2

12

R335
100K_0402_5%

D

DOCKIN# <15,35>

+5VALW

+5VALW

D

E

JP18B

249

GND

250

GND

243

VCC

121

S121

122

S122

123

S123

124

S124

125

S125

126

S126

127

S127

128

S128

129

S129

130

S130

131

S131

132

S132

133

S133

134

S134

135

S135

136

S136

137

S137

138

S138

139

S139

140

S140

141

S141

142

S142

143

S143

144

S144

145

S145

146

S146

147

S147

148

S148

149

S149

150

S150

151

S151

152

S152

153

S153

154

S154

155

S155

156

S156

157

S157

158

S158

159

S159

160

S160

161

S161

162

S162

163

S163

164

S164

165

S165

166

S166

167

S167

168

S168

169

S169

170

S170

171

S171

172

S172

173

S173

175

S175

178

L178

179

L179

180

L180

TYCO_1674036WD@

251

GND

252

GND

244

VCC

181

S181

182

S182

183

S183

184

S184

185

S185

186

S186

187

S187

188

S188

189

S189

190

S190

191

S191

192

S192

193

S193

194

S194

195

S195

196

S196

197

S197

198

S198

199

S199

200

S200

201

S201

202

S202

203

S203

204

S204

205

S205

206

S206

207

S207

208

S208

209

S209

210

S210

211

S211

212

S212

213

S213

214

S214

215

S215

216

S216

217

S217

218

S218

219

S219

220

S220

221

S221

222

S222

223

S223

224

S224

225

S225

226

S226

227

S227

228

S228

229

S229

230

S230

231

S231

232

S232

233

S233

234

S234

235

S235

236

S236

LAN

239

L239

240

L240

254

GND

Title

Size Document Number Rev

Date: Sheet of

USB20_P0
USB20_N0

LINEOR
LINEOR#
LINEOL#
LINEIL#
LINEIR

RXD
RTS#
CTS#
DTR#
LPTSLCT
LPTBUSY
LPTACK#
FD5

FD3
LPTSLCTIN#
LPTINIT#
LPTERR#
AFD#/3M#

LAN_ACTIVITY#
LAN_LINK#
DCOCT2#

RJ45_MDI1+
RJ45_MDI1-

LAN_ACTIVITY# <27,28>

RJ45_MDI1+ <28>

RJ45_MDI1- <28>

Compal Electronics, Inc.

Docking

Boston LA-2721

下午

E

TPA1- <24>
TPB1- <24>

USB20_P0 <19>

USB20_N0 <19>

LINEOR <31>

LINEOR# <31>

LINEOL# <31>

LINEIL# <31>

LINEIR <31>

RXD <38>

RTS# <38>

CTS# <38>

DTR# <38>

LPTSLCT <34>

LPTBUSY <34>

LPTACK# <34>

FD5 <34>

FD3 <34>

LPTSLCTIN# <34>

LPTINIT# <34>

LPTERR# <34>

AFD#/3M# <34>

LAN_LINK# <27,28>

40 532005/5/6 11:47:55

1.0

A

Reserved power button

SW4

5

6

ON/OFFBTN#

RTCVREF

R83

S

Q11

2N7002_SOT23

WD@

1 2

R85 0_0402_5%@

+3VALW

D

Q12

S

3
4

SMT1-05_4P@

1 2

G

2

13

D

R80

4.7K_0402_5%

1 2

1 2

R82
33K_0402_5%

13

2

G

D5

1

DAN202U_SC70

2

Q13

DTC124EK_SC59

1
2

1 1

ON/OFFBTN#<39>

R84

100K_0402_5%

WD@

DOCK_ON/OFFBTN#<40>

2 2

EC_ON<35>

3 3

100K_0402_5%

WD@

1 2

EC_ON

2N7002_SOT23

Power ON Circuit

+3VS

+3V +3V

12

R284

180K_0402_5%

2

C264

1U_0805_25V4Z

4 4

1

U31D

14

SN74LVC14APWLE_TSSOP14

P

9

8

O

I

G

+3V POWER + 3V POWER

7

U31E

14

SN74LVC14APWLE_TSSOP14

P

11

O

I

G

7

10

+3VALW

R81
100K_0402_5%

1 2

2
3

13

R285

100K_0402_5%

B

Power Button

51ON#

SYS_PWROK <19>

ON/OFF <35>
51ON# <39,44>

2

C99
1000P_0402_50V7K

1

C

D

E

RTC Battery

BATT1

-+

RTCBATT

45@

+RTCVCC

1

2

12

D6

RLZ20A_LL34

S4_LID_SW#<39>

S4_LATCH<35>

1 2

RTCVREF RTCVREF RTCVREF RTCVREF

12

100K_0402_5%

R218
10K_0402_5%

S4_SATA<35>

R198

12

2

G

RTCVREF

+3VALW

R190
100K_0402_5%

C178 1U_0805_16V7K

13

D

S

1 2

R252
10K_0402_5%

1 2

Q20
2N7002_SOT23

RTCVREF

1 2

R238
10K_0402_5%

12

R191
680K_0402_5%

1 2

R202
10K_0402_5%

1

C207

1U_0805_16V7K@

2

D14

2 1

RB751V_SOD323

12

D11

1N4148_SOT23

+RTCBATT

+RTCBATT

12

1

3

C261

0.1U_0402_16V4Z

C193 0.1U_0402_16V4Z

1 2

5

P

2

C190 1U_0805_16V7K

4

A

Y

G

U17

3

NC7SZ14M5X_SOT23-5

SYSON<30,35,39,42,48>

1 2

U19

1

CD1#

2

D1

CD2#

3

CP1

4

SD1#

5

Q1

SD2#

6

Q1#

7

GND

74LCX74MTC_TSSOP14

D_SET_S4

D15
BAS40-04_SOT23

2

2N7002_SOT23

14

VCC

13
12

D2

11

CP2

10
09

Q2

08

Q2#

+CHGRTC

1 2

R214
10K_0402_5%

2

G

Q23

RTCVREF

C197 0.1U_0402_16V4Z

13

D

S

1 2

ON/OFFBTN#

2

2

3

13

D

S

13

D

S

Q26
2N7002_SOT23

Q25
2N7002_SOT23

2

G

2

G

C665

1

0.1U_0402_16V4Z

D29

1

PSOT24C_SOT23

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

C

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

D

Date: Sheet of

Compal Electronics, Inc.

Power OK/Reset/RTC battery

Boston LA-2721

下午

41 532005/5/6 11:47:53

E

1.0

A

B

C

D

E

+3VALW TO +3V

1

C263
10U_1206_16V4Z

1
2
3
4

2

SYSON_ALW

2

C265

0.1U_0402_16V4Z

1

+3VALW

1 1

U27

8

D

7

D

6

D

5

D

SI4800DY_SO8

1

C231
10U_1206_16V4Z

2

S
S
S
G

+3V

1

2

12

R282

1M_0402_5%@

C262
1U_0805_25V4Z

100K_0402_5%

1 2

13

D

S

R283

SYSON#

2

G

Q29
2N7002_SOT23

+12VALW

+5VALW

1

2

8
7
6
5

+5VALW TO +5VS

+5VS

U15

1

S

D

2

S

D

3

S

D

4

G

D

SI4800DY_SO8

C174

4.7U_0805_10V4Z

1

C155

4.7U_0805_10V4Z

2

5VS_GATE

1

C151
1U_0805_25V4Z

2

+3V

R281
470_0402_5%@

1 2
13

D

SYSON#

2

G

Q31

S

2N7002_SOT23@

+2.5VS

D

S

+5VS+3VS

R13
470_0402_5%

@

1 2
13

Q4

SUSP

2

G

2N7002_SOT23@

+1.5VALW TO +1.5VS

100K

D

S

100K

@

1 2
13

Q34

+5VALW

1 2
13

D

R307
470_0402_5%

2

G

2N7002_SOT23@

R194
10K_0402_5%

SYSON<30,35,39,41,48>

Title

POWER CONTROL CKT

Size Document Number Rev

Date: Sheet of

+1.5VALW

8
7
6

+3VALW TO +3VS

+3VS

2 2

+3VALW

U28

8

S

D

7

S

D

6

S

D

5

G

D

SI4800DY_SO8

1

C281
10U_1206_16V4Z

2

R209

0_0402_5%

C185

0.1U_0402_16V4Z@

R210

0_0402_5%

C186

0.1U_0402_16V4Z@

3 3

4 4

1
2
3
4

+3V

+3VS

2

1

12

2

1

12

2

1

1

C278
10U_1206_16V4Z

2

5VS_GATE

C293

0.1U_0402_16V4Z

+3VALW

14

U16A

P

1

O

I

G

SN74LVC14APWLE_TSSOP14

7

14

U16C

P

5

O

I

G

+3VALW POWER

SN74LVC14APWLE_TSSOP14

7

12

R290

2

1

2

6

1

C283
1U_0805_25V4Z

2

1M_0402_5%@

C159

0.1U_0402_16V4Z

R294

100K_0402_5%

1 2

13

D

2

G

Q33

S

2N7002_SOT23

+3VALW

14

U16B

P

3

4

O

I

G

+3VALW POWER+3VALW POWER

SN74LVC14APWLE_TSSOP14

7

+3VALW+3VALW

14

U16D

P

9

O

I

G

SN74LVC14APWLE_TSSOP14

7

+12VALW

SUSP

8

+3VALW POWER

V_ON <48>

VS_ON <49>

5

1

C206

4.7U_0805_10V4Z

2

+DDRVCC +2.5VS

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+1.5VS

U20

1

S

D

2

S

D

S

D

G

D

SI4800DY_SO8

3
4

1

C187

4.7U_0805_10V4Z

2

5VS_GATE

1

C188
1U_0805_25V4Z

2

+DDRVCC to +2.5VS (DDR1)

U1

S

D

S

D

S

D

G

D

SI4800DY_SO8

1
2
3
4

1

C6

4.7U_0805_10V4Z

2

5VS_GATE

2005/05/06 2006/05/06

C

1

2

Compal Secret Data

8
7
6
5

1

C7

4.7U_0805_10V4Z

2

Issued Date

C9
1U_0805_25V4Z

SUSP<49> SYSON#<39>

SUSP#<16,26,30,32,35,37,38,49>

SUSP

DTC115EKA_SOT23
Q18

2

Deciphered Date

R308

470_0402_5%@

1 2
13

D

SUSPSUSP

2

G

Q38

S

2N7002_SOT23@

+1.5VS

R90
470_0402_5%

@

1 2
13

D

SUSP

2

G

Q14

S

2N7002_SOT23@

+5VALW

R195
10K_0402_5%

1 2

SYSON#

13

SYSON

DTC115EKA_SOT23
Q19

100K

2

100K

Compal Electronics, Inc.

Boston LA-2721

下午

42 532005/5/6 11:47:56

E

1.0

5

CF2

CF8

SMD40M80

SMD40M80

1

1

CF6

D D

H11

SCREW S315D118

C C

1

H1

SCREW S315D118

1

CF1

SMD40M80

SMD40M80

1

FD3

FD6

FIDUCAL

FIDUCAL

1

H22

SCREW S315D118

1

H12

SCREW S315D118

1

1

1

CF5

CF3

SMD40M80

SMD40M80

1

1

CF9

CF10

SMD40M80

SMD40M80

1

1

FD4

FD5

FIDUCAL

FIDUCAL

1

1

H15

SCREW S315D118

1

H18

SCREW S315D118

1

CF7
SMD40M80

1

CF4
SMD40M80

1

FD1

FD2

FIDUCAL

FIDUCAL

1

H2

SCREW S315D118

1

H23

SCREW S315D118

1

1

4

H16

SCREW S315D118

1

H21

SCREW S315D118

1

H5

SCREW S394D157

1

3

14

U16F

P

13

O12I

G

SN74LVC14APWLE_TSSOP14

7

+3VALW

14

U16E

P

11

O10I

G

SN74LVC14APWLE_TSSOP14

7

2

+VDDA

4

13

-

V+

14

O

12

+

V-

U43D

LMV824MTX_TSSOP14WD@

11

+VDDA

4

13

-

V+

14

O

12

+

V-

U44D

LMV824MTX_TSSOP14WD@

11

+VDDA

4

13

-

V+

14

O

12

+

V-

U45D

LMV824MTX_TSSOP14WD@

11

1

+3V+3VALW

U31F

14

SN74LVC14APWLE_TSSOP14

P

13

O12I

G

7

+12VALW

U5B

5

+IN

OUT

6

-IN

LM358A_SO8

7

1

M2

SCREW C295D117

1

H10

1

M3

SCREW O276X197D276X197

H14

SCREW C295D117

1

1

H3

SCREW C315D157

1

H4

SCREW C79D79N

1

H7

SCREW C315D118

1

H6

SCREW C315D157

1

SCREW C79D79N

4

SCREW C315D118

H8

1

H20

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

3

Compal Secret Data

Deciphered Date

4

U26B

6

OE#

I5O

SN74LVC125APWLE_TSSOP14

2

+3VALW

1

14

U26A

P

OE#

I2O
G

SN74LVC125APWLE_TSSOP14

7

Size Document Number Rev

Date: Sheet

Title

3

Compal Electronics, Inc.

Screws

Boston LA-2721

下午

43 532005/5/6 11:47:58

1

1.0

of

H9

SCREW C295D177

1

B B

A A

H17

SCREW C236D157

1

NPTH

M1

SCREW C197D197

1

H13

SCREW C295D117

1

H19

SCREW C236D157

SCREW C236D236

5

A

B

C

D

VIN

12

PC4
100P_0402_50V8J

MAINPWON<18,45,47>
ACON<46>

1000P_0402_50V7K

PC5

VL

12

VIN

10K_0402_1%

1 2

PD5
RB715F_SOT323

2
3

1000P_0402_50V7K

VIN

12

PR2

61.9K_0402_1%

12

PR6
20K_0402_1%

PR19

PC12

PR5

15.4K_0402_1%

1 2

PD4

1N4148_SOD80

1

12

1000P_0402_50V7K

12

PC6

0.1U_0402_16V7K

12

PU1B

7

O

LM393M_SO8

8

P

+

G

4

PC13

1 2

3

+

2

-

PR8

10K_0402_1%

5
6

-

12

PR1

1M_0402_1%

VS

8

PU1A
LM393M_SO8

P

1

O

G

4

12

RTCVREF

3.3V

PR11

1K_1206_5%

1 2

PR13

1K_1206_5%

1 2

PR15

1K_1206_5%

1 2

PR20

2.2M_0402_5%

1 2

1 2

PR22

34K_0402_1%

12

PR24

66.5K_0402_1%

SN7002N_SOT23

RLZ4.3B_LL34

PQ2

Precharge detector

14.3V/13.18V for adapter

+DDRVTT

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

Compal Secret Data

INC.

Deciphered Date

C

DTC115EUA_SC70

VL

D

S

VS

12

12

PD1

12

PR23
237K_0402_1%

13

2

G

PQ3

PR3

5.6K_0402_5%
1K_0402_1%

1 2

12

PR7
10K_0402_1%

PR4

PACIN

ACIN <19,35,39>

PACIN <46,47>

Vin Detector

High 14.57 14.01 13.46
Low 14.06 13.51 12.98

B+

12

PR16
499K_0402_1%

12

PR21
499K_0402_1%

PR25

47K_0402_1%

1 2

13

2

Title

Size Document Number Rev

Date: Sheet of

12

PC11
1000P_0402_50V7K

PACIN

+5VALWP

Compal Electronics, Inc.

DCIN & DETECTOR

Boston LA-2721

下午

D

44 532005/5/6 11:47:57

1.0

3

+1.05VS+1.05VSP

1538VCC

12

PU2

OUT

+DC_IN_S1

+DC_IN_S1

12

PC1
1000P_0402_50V7K

PQ1

TP0610K_SOT23

PC7

0.22U_1206_25V7K

IN

GND

1

2

2

12

PC9
1U_0805_25V4Z

+1.8VSP +1.8VS

(150mA,40mils ,Via NO.= 2)

+1.5VALWP +1.5VALW

(4A,160mils ,Via NO.= 8)

+1.25VSP

(2A,80mils ,Via NO.= 4)

JST_S4B-EH

4

4

3

3

2

1 1

2 2

+CHGRTC

3 3

2

1

1

PJP1

BATT_A

51ON#<39,41>

PR17

510_0603_5%

1 2

+3VALWP +3VALW

(5A,200mils ,Via NO.= 10)

+5VALWP +5VALW

(5A,200mils ,Via NO.= 10)

+12VALWP +12VALW

(120mA,40mils ,Via NO.= 2)

+2.5VP +DDRVCC

4 4

(8A,320mils ,Via NO.= 16)

(4A,160mils ,Via NO.= 8)

DC_IN_S2

FBM-L18-453215-900LMA90T_1812

1N4148_SOD80

200_0603_5%

CHGRTCP

1 2

100K_0402_1%

1 2

22K_0402_1%

RTCVREF

PR18

510_0603_5%

1 2

PJ1

2

112

JUMP_43X118

PJ3

2

112

JUMP_43X118

PJ5

2

112

JUMP_43X39

PJ7

2

112

JUMP_43X118

PJ8

2

112

JUMP_43X118

PJ9

2

112

JUMP_43X118

A

1 2

PL1

PD2

12

PR10

12

PR12

PR14

S-812C33AUA-C2N-T2_SOT89

3.3V

12

PC10
10U_0805_10V4Z

12A_65VDC_451012

12

PC2

100P_0402_50V8J

VIN

PD3
1N4148_SOD80

1 2
12

PR9
33_1206_5%

13

12

PC8

0.1U_0603_25V7K

2

2

2

PF1

21

PJ2

112

JUMP_43X79

PJ4

112

JUMP_43X118

PJ6

112

JUMP_43X118

12

PC3
1000P_0402_50V7K

VS

B

A

B

C

D

PH1 under CPU botten side :

CPU thermal protection at 84 degree C

1 1

+3VALWP

VMB_A

12

PL2

FBM-L18-453215-900LMA90T_1812

1 2

PC15
1000P_0402_50V7K

ALI/MH# <35>

BATT_TEMP <35>

EC_SMB_DA1 <35,37>
EC_SMB_CK1 <35,37>

12

PC16

0.01U_0402_25V7Z

BATT_A

0.22U_0805_16V7K_V2

PF2

PR27

1K_0402_1%

1 2

12

PR30

12

12A_65VDC_451012

21

47K_0402_1%

1 2

PR35

6.49K_0402_1%

PR28

+3VALWP MAINPWON <18,44,47>

12

PJP2

BATT+

ID
B/I
TS

SMD
SMC
GND

TYCO_1775828-1_7P_RV

2 2

BATT_A_S1

1

ALI/NIMH#

2

AB/I

3

TS_A

4

EC_SMDA

5

EC_SMCA

6
7

PR32

100_0402_5%

1 2

1K_0402_1%

PR33

100_0402_5%

1 2

PR37

1K_0402_1%

Recovery at 45 degree C

VL VS

12

PH1

10KB_0603_1%_TH11-3H103FT

PC17

12

12

1000P_0402_50V7K

PR31

1 2

16.9K_0402_1%

PR34

3.32K_0402_1%

PC18

TM_REF1

12

12

12

PC14

0.1U_0603_25V7K

PR38
100K_0402_1%

1 2

47K_0402_1%

8

PU3A

3

P

+

2

-

G

LM393M_SO8

4

PR36

100K_0402_1%

PR29

O

12

VL

PR26
47K_0402_1%

1 2

1

1SS355_SOD323

VL

PD6

12

13

PQ4
DTC115EUA_SC70

2

PH2 near main Battery CONN :

BAT. thermal protection at 79 degree C
Recovery at 45 degree C

VLVL

3 3

0.22U_0805_16V7K_V2

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2005/05/06 2006/05/06

INC.

PC19

Compal Secret Data

12

12

12

Deciphered Date

C

PH2
10KB_0603_1%_TH11-3H103FT

PR41

14.7K_0402_1%

1 2

PR42

3.48K_0402_1%

TM_REF1

PR39
47K_0402_1%

1 2

7

O

Title

BATTERY CONN / OTP

Size Document Number Rev

Date: Sheet of

12

PD7

1SS355_SOD323

Compal Electronics, Inc.

Boston LA-2721

下午

D

47K_0402_1%

1 2

5

+

6

-

PR40

8

PU3B

P

G

LM393M_SO8

4

1.0

45 532005/5/6 11:47:56

A

B

C

D

P2

PQ6
AO4407_SO8

8
7

5

DTA144EUA_SC70

47K

2

47K

13

PQ10

DTC115EUA_SC70

ACOFF#

1SS355_SOD323

PACIN

1 3

1 2

1 2

3K_0402_1%

VIN

1 1

2 2

2

G

12

PR44
47K_0402_1%

2

13

D

PQ12

S

SN7002N_SOT23

PACIN<44,47>

ACON<44>

PQ8

PD11

PR56

1
2
36

4

100K_0402_1%

12

PC23

0.1U_0603_25V7K

PR52

2

G

PQ7
AO4407_SO8

1
2
3 6

12

PR45
200K_0402_1%

PC26

0.1U_0402_16V7K

12

13

D

IREF<35>

PQ13

SN7002N_SOT23

S

4

12

8
7

5

ADP_I<35>

12

PR49

10K_0402_1%

1 2

PR55

143K_0402_1%

100K_0402_1%

P3 B+

12

PR50

25.5K_0402_1%

12

PC29

0.1U_0402_16V7K

12

PR60

12

IREF=1.31*Icharge
IREF=0.6V~3.21V

+3VALWP

12

PR63
47K_0402_1%

3 3

FSTCHG<35>

2

13

PQ15
DTC115EUA_SC70

2

CS

13

PQ14
DTC115EUA_SC70

OVP voltage : LI

3S2P : 13.5V--> BATT_OVP= 1.5V

(BAT_OVP=0.1111 *VMB)

4 4

BATT_AOVP<35>

PR68

2.2K_0402_5%

A

LM358A_SO8

12

PU5A

1

+5VALWP

0

8

3

P

+

2

-

G

4

PR69

105K_0402_1%

Iadp=0~4.7A

0.015_2512_1%

PR48

100K_0402_1%

1 2

PC27

4700P_0402_25V7K

1 2

PC30

1000P_0402_50V7K

10K_0402_1%

PC33

0.1U_0402_16V7K

VMB_A

12

PR66
340K_0402_1%

12

PR67
499K_0402_1%

12

B

PR43

12

PU4

1

-INC2

+INC2

12

PR51

10K_0402_1%

1 2

PR53

1K_0402_1%

1 2

PR58

12

12

PC38

0.01U_0402_25V7Z

Security Classification

PR61

150K_0603_0.1%

2

OUTC2

3

+INE2

4

-INE2

5

FB2

6

VREF

7

FB1

8

-INE1

9

+INE1

10

OUTC1

11

OUTD

12

-INC1

MB3887_SSOP24

12

VCC(o)

+INC1

LM358A_SO8

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PJ10

2

GND

CS

OUT

VH

VCC

RT

-INE3

FB3

CTL

JUMP_43X118

24

23

22

21

20

PC28

0.1U_0603_25V7K

1 2

19

18

1 2

17

PR54

68K_0402_5%

16

47K_0402_1%

1 2

15

ACON

14

13

112

PR59

CS

1500P_0402_50V7K

SE_CHG+

12

PC20

4.7U_1206_25V6K

PC24

0.022U_0402_16V7K

1 2

1 2

PC25

0.1U_0603_25V7K

PC31

0.1U_0603_25V7K

1 2

1 2

PC32

12

PC21

4.7U_1206_25V6K

4.2V

PU5B

7

5

+

0

6

-

2005/05/06 2006/05/06

Compal Secret Data

INC.

Deciphered Date

C

PR62

300K_0603_0.1%

12

PC22

4.7U_1206_25V6K

DH_CHG

15U_SPC-1204P-150_4A_20%

12

36

578

12

PQ5

241

B++

PQ9
AO4407_SO8

LX_CHG

ACOFF#

PR47
1K_0402_1%

1 2
13

DTC115EUA_SC70

AO4407_SO8

1
2
3 6

PR46

47K_0402_1%

1 2

2

PQ11

8
7

5

4

CC=0.5~3.3A
CV=12.6V(6 CELLS LI-ION)

PL3

1 2

PD12
EC31QS04

B+

1 2

PR57

0.02_2512_1%

4.7U_1206_25V6K

PR64

27K_0402_1%

1 2

1 2

PC37
1U_1206_25V7K

DKN_B+_ON<35>

DTC115EUA_SC70

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

CHARGER

Boston LA-2721

下午

8
7

5

2

PQ17

PC34

PQ16
AO4407_SO8

12

12

1
2
36

4

PR65
10K_0402_1%

1 2
13

D

VIN

ACOFF <35>

12

PC36

4.7U_1206_25V6K

PC35

4.7U_1206_25V6K

B+DKN_B+

46 532005/5/6 11:47:58

BATT_A

1.0

5

D D

B+++

112

12

12

PC42

PC43

4.7U_1206_25V6K

D8D7D6D

S1S2S3G

5

PQ18
SI4800BDY_SO8

4

0.1U_0603_25V7K

B+

PJ11

2

JUMP_43X118

4.7U_1206_25V6K

5

D8D7D6D

PQ20
SI4810BDY-T1_SO8

S1S2S3G

12

C C

220U_6.3VM_R15

B B

10UH_SPC-1205P-100_4.5A_20%

+3VALWP

1

+

PC54

2

2 1

PL4

1M_0402_1%

PD16
SKUL30-02AT_SMA

100P_0402_50V8J@

12

PR75

1 2

3.32K_0402_1%

12

PC59

PC50
47P_0402_50V8J

PR80

4

PR72

1.27K_0402_1%
PR73

1.27K_0402_1%

PR76

0_0402_5%

12

PC55
100P_0402_50V8J

1 2

PR83
10K_0402_1%

1 2

12

12

VSE_3V

PACIN<44,46>

1 2

VS

PC41

1 2

DL_3.3V

12

PC52

0.47U_0603_16V7K

620_0402_5%

PR81

47K_0402_1%

1 2

0.047U_0603_25V7M@

4

LX_3.3V

PR77

12

1 2

PR78

10K_0402_1%

PC61

BST_3.3V

ISE_3.3V+

ISE_3.3V-

DH_3.3V

12

1SS355_SOD323

12

PC48

0.1U_0603_25V7K

PU6

25

BST3

27

DH3

26

LX3

24

DL3

1

CSH3

2

CSL3

3

FB3

10

SKIP#

23

SHDN#

7

TIME/ON5

28

RUN/ON3

12

PC57
1000P_0402_50V7K

PR85

220K_0402_5%

12

PC63

0.47U_0603_16V7K

PD15

3

BST_5V

2

1 2

22

V+

GND

8

VL

3

PD14
DAP202U_SOT323

1

VL

12

PC47

4.7U_0805_6.3V6K

21

4

12OUT

VL

5

VDD

18

BST5

16

DH5

17

LX5

19

DL5

20

PGND

14

CSH5

13

CSL5

12

FB5

15

SEQ

9

REF

6

SYNC

11

RST#

MAX1902EAI_SSOP28

MAINPWON <18,44,45>

+12VALWP

12

DH_5V
LX_5V
DL_5V

ISE_5V+

PC49

4.7U_1206_25V6K

12

PC56

4.7U_0805_6.3V6K

POK <48>

2.5VREF

1 2

PC44

0.1U_0603_25V7K

4.7U_1206_25V6K

10.2K_0402_1%

VSE_5V

10K_0402_1%

12

VS

12

2

12

PC45

PC53

0.47U_0603_16V7K

12

PR82

12

PR84

N4

PC40

470P_0805_100V7K

B+++

12

PC46

4.7U_1206_25V6K

SI4810BDY-T1_SO8

12

PR79
698_0402_1%

12

PC58
100P_0402_50V8J

12

PC62
100P_0402_50V8J@

PQ21

1

PC39

4.7U_1210_25V6K

1 2

12

PD13

1 2

22_1206_5%

5

PR70

D8D7D6D

FLYBACKSNB

12

PQ19
SI4800BDY_SO8

S1S2S3G

4

5

12

D8D7D6D

12

S1S2S3G

4

220U_6.3VM_R15

EC11FS2_SOD106

1 4

3 2

PT1

10uH_SDT-1205P-100-118_5A_20%

12

PR71

1.54K_0402_1%

PC51
47P_0402_50V8J

PR74
2M_0402_1%

1

+

PC60

2

PD17
SKUL30-02AT_SMA

2 1

+5VALWP

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

2

Date: Sheet of

Compal Electronics, Inc.

5V/3.3V/12V

Boston LA-2721

下午

1

1.0

47 532005/5/6 11:47:55

A

B

C

D

PJ12

2

JUMP_43X118

PC67

4.7U_1206_25V6K

12

12

12

PR100

0_0402_5%

@

112

PC78

0.01U_0402_25V7Z
PR95

6.81K_0402_1%

B+

+1.5V

+1.5VALWP

1

+

12

2

12

PR101
10K_0402_1%

PC77
220U_6.3VM_R15

4.7U_1206_25V6K

5

4

5

4

ISL6227B+

12

PC66

D8D7D6D

PQ23
SI4800BDY_SO8

S1S2S3G

POK <47>

PL6

1 2

PR94

0_0402_5%

2.2UH_SPC-1205P-2R2B_13A_30%

D8D7D6D

PQ25
SI4810BDY-T1_SO8

S1S2S3G

12

12

1 1

PC64

4.7U_1206_25V6K

PC68

4.7U_0805_6.3V6K

5

D8D7D6D

2.5V

+2.5VP

1

+

PC75

2 2

220U_6.3VM_R15

2

18.2K_0402_1%

PR90

12

12

PC76

0.01U_0402_25V7Z

PL5

2.2UH_SPC-1205P-2R2B_13A_30%

1 2

SI4810BDY-T1_SO8

12

PR93
0_0402_5%

PQ22

SI4800BDY_SO8

PQ24

S1S2S3G

4

5

D8D7D6D

S1S2S3G

4

12

PC65

4.7U_1206_25V6K

12

BST_2.5V

12

PC73

0.1U_0402_16V7K

PR91

1.87K_0402_1%

1 2

0_1206_5%

1

PD18

2

3

DAP202U_SOT323

0.01U_0402_25V7Z

1 2

PR88

0_0603_5%

DH_2.5V

PC69

0.1U_0603_25V7K

PC71

12

12

6

5

PU7

4

ISE_2.5V
DL_2.5V DL_1.5V

7
2

3

9

10

12

PR103
100K_0402_1%

8

15
11

12

PR98

10K_0402_1%

3 3

12

PR99

@

0_0402_5%

SYSON<30,35,39,41,42>

V_ON<42>

1 2

PR97

0_0402_5%@

1 2

PR106

0_0402_5%

0.1U_0402_16V7K@

PC80

12

PR86

SOFT1

BOOT1

UGATE1
PHASE1

ISEN1
LGATE1

PGND1

VOUT1
VSEN1
EN1
PG1

OCSET1

12

+5VALWP

BST_1.5V

PC72

0.01U_0402_25V7Z

17

BST_1.5V-1BST_2.5V-1

23

24
25

ISE_1.5V

22
27

26

20
19
21
16

18

PR102

100K_0402_1%

12

PC70

2.2U_0805_10V6K

12

1 2

PR89

0_0603_5%

DH_1.5V

LX_1.5VLX_2.5V

PR92

1.54K_0402_1%

1 2

VSE_1.5VVSE_2.5V

12

PC74

0.1U_0402_16V7K

1 2

PR96

0_0402_5%

12

PC79

0.1U_0402_16V7K@

12

12

14

VIN

PR87

2.2_0603_5%

1 2

28

SOFT2

VCC

BOOT2

UGATE2
PHASE2

ISEN2

LGATE2

PGND2

VOUT2
VSEN2

EN2

PG2/REF

GND

1

OCSET2

DDR

ISL6227CA-T_SSOP28

13

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2005/05/06 2006/05/06

Compal Secret Data

Deciphered Date

C

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

2.5V/1.5V
Boston LA-2721

下午

D

48 532005/5/6 11:47:56

1.0

5

D D

PR140

100K_0402_1%

VL

PR139
0_0402_5%

VS_ON

1 2

PR138
0_0402_5%@

SUSP#

1 2

PC87

0.1U_0402_16V7K@

C C

12

2

G

1 2

6.49K_0402_1%

13

D

PQ38
SN7002N_SOT23

S

PR105

2

G

1 2

13

D

S

PQ27
SN7002N_SOT23

4

12

PC84
470P_0603_50V7K

7

6

3

VSE_1.05V

7.15K_0402_1%

12

5

PU8

VCC

OCSET

BOOT

UGATE

FB

PHASE

GND

APW7057KC-TR_SOP8

PR108

LGATE

1 2

PR104

10_0603_5%

1 2

PC81
1U_0603_6.3V6M

BST_1.05V

1

0.1U_0402_16V7K

DH_1.05V

2

LX_1.05V

8

4

DL_1.05V

PR107

2.26K_0402_1%

1 2

1 2

PC88

0.1U_0402_16V7K

3

PJ13

2

112

+1.05VSP

JUMP_43X118

12

PC82
22U_1206_6.3V6M

D8D7D6D

PQ26
SI4800BDY_SO8

S1S2S3G

PL7

3UH_SPC-07040-3R0_5A_30%

D8D7D6D

12

PQ28
SI4800BDY_SO8

PC85

PD19
1N4148_SOD80

1 2

12

5

4

5

S1S2S3G

4

12

PC83
22U_1206_6.3V6M

1

+

PC86
220U_6.3VM_R15

2

+5VALW

2

1

+DDRVCC

1

PJ14

1

JUMP_43X118

PC89

1U_0603_6.3V6M

12

PC93

PU10

1

VOUT

2

GND

3

VIN

12

SHDN#

APL5301-18BC-TR_SOT23-5

BP

PC90

0.1U_0402_16V7K

1 2

5

1 2

4

1 2

PR141

0_0402_5%@

PR142

0_0402_5%

4

SUSP#

VS_ON

SUSP# <16,26,30,32,35,37,38,42>

VS_ON <42>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

10U_1206_6.3V7K

PR110

0_0402_5%

SUSP

SUSP<42>

1 2

12

PC96

0.1U_0402_16V7K@

2005/05/06 2006/05/06

3

Compal Secret Data

B B

+1.8VSP

+3V

1U_0603_6.3V6M

A A

5

2

2

12

PC91

13

D

2

G

S

SN7002N_SOT23

Deciphered Date

1K_0402_1%

PQ29

PR109

12

12

PR111
1K_0402_1%

12

PC94

0.1U_0402_16V7K

2

12

PU9

VIN1VCNTL

2

GND

3

VREF

4

VOUT

APL5331KAC-TR_SO8

+1.25VSP

PC95

10U_1206_6.3V7K

6
5

NC

7

NC

8

NC

9

TP

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

1.05V/1.8V/1.25V
Boston LA-2721

下午

+3VALWP

12

PC92
1U_0603_6.3V6M

1

1.0

49 532005/5/6 11:47:54

+5VS

12

PR112
10_0603_5%

PC101

VCC
D0
D1
D2
D3
D4
D5
VROK
S0
S1
SHDN#
TIME
CCV
TON
REF
ILIM
OFS
SUS
SKIP
GND

2.2U_0603_6.3V6K

VDD

V+

BSTM

DHM

LXM
DLM

PGND

CMP
CMN

OAIN+

OAIN-

FB

CCI

BSTS

DHS

LXS

DLS
CSP
CSN

GNDS

1 2

30
36
26
28
27
29
31
37
38
17
16
15
14
35
33
34
32
40
39
13

PC102

1U_0603_16V6K

CPU_VID0<5>
CPU_VID1<5>
CPU_VID2<5>
CPU_VID3<5>
CPU_VID4<5>
CPU_VID5<5>

VGATE<6,14,19>

PR122

0_0402_5%

66.5K_0402_1%

1 2

1 2

100K_0402_1%

1 2

PR127

PR128

2

PQ32

G

13

D

S

1 2

PR132

0_0402_5%

PSI#<5>

PR125

200K_0402_1%

1 2

PR130

10.7K_0402_1%

100K_0402_1%

1 2

+5VS

PR135

12

2

B

VR_ON<35>

VSE_CPU

PM_STP_CPU#<14,19>

RHU002N06_SOT323

PM_DPRSLPVR<19>

PR115 0_0402_5%

VCC

PR117 0_0402_5%@

REF

PR120 0_0402_5%@

PR123 30.1K_0402_1%

PC107
270P_0402_50V7K

PC109 0.22U_0603_16V7K

PC111

C

E

13

2

100P_0402_50V8J

G

1 2

PR133

20K_0402_1%

1 2

1

PQ37
HMBT2222A_SOT23

3

1 2
1 2
1 2

12

1 2

1 2

D

PQ33
RHU002N06_SOT323

S

1 2
13

D

2

G

S

1 2

PC112
27P_0402_50V8J

1 2

PR134
10K_0402_1%

PQ36
RHU002N06_SOT323

VCC

VCC

REF

PU11

10
24
23
22
21
20
19
25

4
5
6
1

12

2
8
9
7

3
18
11

MAX1532AETL_TQFN40

PD20

EP10QY03

2 1

12

DH_CPU1_1
LX_CPU1
DL_CPU1

ISE_CPU1+
ISE_CPU1-

VSE_CPU

1 2

BST_CPU2-1
DH_CPU2_1
LX_CPU2
DL_CPU2

PC103

0.01U_0402_25V7Z

PR113

0_0603_5%

BST_CPU1-1

CM_CPU+
CM_CPU-

PC108 470P_0402_50V8J

ISE_CPU2+
ISE_CPU2-

BST_CPU1

12

12

PC104

0.22U_0603_16V7K

0_0603_5%

PR131

0_0603_5%

1 2

BST_CPU2

12

PR145

PC115

1 2

0.22U_0603_16V7K

12

PR146

0_0603_5%

DH_CPU2

DH_CPU1

EP10QY03

AO4408_SO8

AO4410_SO8

PD22

PQ34

PQ35

CPU_B+

578

PQ30
AO4408_SO8

3 6

241

578

PQ31
AO4410_SO8

3 6

241

PR124 909_0402_1%

1 2

+5VS

21

578

3 6

241

578

3 6

241

12

PC97

4.7U_1206_25V6K

12

PR143

4.7_1206_5%

12

680P_0603_50V8J

12

PC113

4.7U_1206_25V6K

12

PR144

4.7_1206_5%

12

PC118
680P_0603_50V8J

12

PC117

12

PC114

1

+

PC99

100U_25V_M

PC98

4.7U_1206_25V6K

CPU_B+

4.7U_1206_25V6K

2

0.56UH_ETQP4LR56WFC_21A_20%

1 2

12

PR116
909_0402_1%

0.47U_0603_16V7K

PL8

FBM-L18-453215-900LMA90T_1812

1 2

+

PC100

100U_25V_M

1 2

PR126

3K_0402_1%

PR114

0.001_2512_5%

1 2

12

PR118
499_0402_1%

1 2

0_0402_5%

1

2

PL9

PC106

1 2

1 2

PC110

0.022U_0402_16V7K

PL10

0.56UH_ETQP4LR56WFC_21A_20%

1 2

12

PR136
909_0402_1%

1 2

PC116

0.47U_0603_16V7K

PR119

499_0402_1%

PR129

B+

+CPU_CORE

PR121

1 2

3K_0402_1%

CPU VCC SENSE

1 2

PC105

1000P_0402_50V7K

@

12

1 2

PR137
909_0402_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

CPU_CORE

Boston LA-2721

下午

50 532005/5/6 11:47:54

1.0

5

4

3

2

1

ECU00 PIR List

From Rev:0.1 to Rev:0.2 PIR List********** **********

1. Change R30 from 0603 package to 1206 package (Page9)

D D

C C

B B

A A

2. Add filter at CRT signal for EMI request (Page15)

3. Delete F1, D22 and change +CRT_VCC to +5VS (Page15)

4. Delete Software DJ circuit and change +5VCD to +5VS (Page21,22,32)

5. Chnage LAN_LINK and LAN_ACT signal to JP5 pin1,2 (Page28)

6. Add R588, R589, R590, R591 for co-existance function (Page29,36)

7. Add JP31 and R592~R597 for hardware EQ reserve (Page30)

8. Add SKU ID table (Page3,35)

9. Change JP3 and JP17 to 10pin (Page39)

10. Change U30 power from +3VALW to +CHGRTC (Page39)

From Rev:0.2 to Rev:0.3 PIR List********** **********

11. Reverse Q41, Q45 pin1, pin3 (Page28)

12. Non-stuff R586, R587 (Page39)

13. Change D27 to Amber LED (Page39)

14. Change U30 power to RTCVREF (Page39)

15. Non-stuff R268, R556 and Stuff R268, R557 (Page30)

16. Remove SATA 88SA8040 crystal reserve (Page21)

17. Change L1 to SM010012500 (Page9)

18. Add R602, C674 for EMI request (Page36)

19. Change ODD reset to PLT_RST# (Page22)

20. Connect Codec pin16, 17 to EC for EQ (Page30, 35)

21. Add D29 (Page41)

22. Add R604 and change R107 to 470ohm (Page35)

23. Change R568 to 3.3kohm (Page32)

24. Add R611 (Page15)

From Rev:0.2 to Rev:0.3 PIR List********** **********

25. Replace JP2 (Page15)

26. Replace R358 for interfer (Page15)

27. Add three while area for ME.

28. .JP29 change from OCTEK_HDS-22TA1_44P_RV to OCTEK_HDS-22TA1_44P_RV-S.

29. JP30, update Mini PCI new Foot print form QTC to AMP to update outline.

30. U30. update new Foot print from A3212EEH_MLP6_5P to A3212EEH_MLP6_5P-S.

31. Change PCB PN to Rev1.0.

32. C146 BOM Structure 7411@ ,

33. R603 BOM Structure MDC@ ,

34. R199 BOM Structure 7411@

的 後有空格

的 後有空格

的改為

delete.

delete.

5IN1@

35. Change Q6 and Q46 from 2N7002 to SB501380009

36. Add C675 680P for H_NMI.

37. Reserve C676 180P for PCI_SERR#

38. Add C677 220P for H_FERR#

39. Reserve C678 ~ C686 180P for H_SMI#, H_INIT#, SERRIRQ, H_A20M#, H_INTR, H_IGNNE#, H_STPCLK#, H_PWRGOOD and H_CPUSLP#.

40. Add R615 ~ R617 0Ohm for EMI solution link DGND and RJ45_GND.

41. Change R542 from 22 Ohm to 33 Ohm.

42. R527 and C607 change from @ to mount for audio EMI.

43. Add L23 ~ L26 (SM070000H00) and Reserve R618 ~ R625 for EMI

44. Change U2 to SA411250200

45. Change C510 and C511 from 33P to 30P (SE071300J00)

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/06 2006/05/06

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

2

Date: Sheet

Compal Electronics, Inc.

PIR

Boston LA-2721

上午

1

1.0

of

51 532005/5/7 11:21:11

5

4

Version Change List ( P. I. R. List ) for Power Circuit

3

2

1

Item DescriptionDate

D D

1 ADD PR145, PR146

2 Change PL3 to 15UH

50

46

Owner

3 47 Change PC39 to 4.7U_1210

C C

Rev.Page# Title

Request

B B

A A

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/05/06 2006/05/06

Compal Secret Data

Deciphered Date

Title

Size Document Number R e v

2

Date: Sheet

Compal Electronics, Inc.

Power changed-List History-1

Boston LA-2721

下午

1

52 532005/5/6 11:47:58

1.0

of

5

4

3

2

1

45@

JST_S4B-EH

4

4

3

3

2

2

1

1

D D

C C

PJP1

ZZZ

DA800001L10

--PCB ZKL LA-2721
REV1 M/B

DA800001L10

U4

SA0091500N0

--S IC A51 915GM-C1
BGA 1257P GMCH R3

SA0091500N0R3GM@

U4

SA0000187A0

--S IC A51 910GML-C1
BGA 1257P GMCH R3

SA0000187A0R3GML@

U4

SA0091500M0

--S IC A51 915GM-C1
BGA 1257P GMCH R1

SA0091500M0R1GM@

U4

SA000018790

--S IC A51 910GML-C1
BGA 1257P GMCH R1

SA000018790R1GML@

U4

SA0091501J0

--S IC 915PM-C1
BGA 1257P GMCH R1

SA0091501J0R1PM@

U13

SA8280108B0

--S IC A51 FW82801FBM
SL7W6 B2 BGA 609P!

SA8280108B0R 1SB@

U12

SA000013200

--S IC PCI1510RGVF PBGA
253P PC CARD CTRL

SA0000132001510@

U12

SA045100110

--S IC PCI4510RGVF PBGA
224P PCI-CARD BUS

SA0451001104510@

U12

SA064110000

--S IC PCI6411ZHK PBGA­ 288 PCI-CARD BUS

SA0641100006411@

U36

SA880360000

--S IC88E88036 10/100
LAN CTRL

SA8803600008036@

T1

SP050001X00

--TST1284B 10/100
LAN Transformer

SP050001X008036@

R445 2K_0402_1%

12

8036@

D18

2 1

HT-191UYG-DT_GRN_0603

G@

D20

2 1

HT-191UYG-DT_GRN_0603

G@

D25

2 1

HT-191UYG-DT_GRN_0603

G@

D17

2 1

A

4 3

YG

HT-297DQ/GQ_AMB/YG_0603

G@

D19

2 1

A

4 3

YG

HT-297DQ/GQ_AMB/YG_0603

G@

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/04/25 2006/04/25

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

2

Date: Sheet

Compal Electronics, Inc.

For BOM create

Boston LA-2721

下午

1

1.0

of

53 532005/5/6 11:50:26