COMPAL LA-2691 Schematics

Page 1
A
B
C
D
E
Compal Confidential
Model Name : EAL30
Fan Control
File Name : LA-2691
1 1
LCD Conn.
page 20
CRT Conn.
TV-OUT Conn.
page 21
page 21
ATI M24/M22 Ver A23
with 32/64/128MB On Board VRAM
page 13,14,15,16,17,18
page 4
16X PCI-E
Intel Dothan CPU
uFCPGA-478 CPU
H_A#(3..31) H_D#(0..63)
FSB
400 / 533 Mhz
page 4,5
Intel Alviso GM(PM)
PCBGA 1257
page 6,7,8,9
DMI
Thermal Sensor ADI ADM1032AR
page 4
Memory BUS(DDR)
2.5V DDR200/266/333
Clock Generator
ICS954226
page 12
200pin DDR-SO-DIMM X2
BANK 0, 1, 2, 3
USB conn x 2
Port 2,3
page 35
page 10,11
2 2
IDSEL:AD18 (PIRQ[G..H]#, GNT#3/4, REQ#3/4)
Mini PCI socket
page 30
IDSEL:AD17 (PIRQB#, GNT#1, REQ#1)
LAN RTL8100CL
page 26
RJ45/RJ11
page 26
3 3
RTC CKT.
page 24
Power On/Off CKT.
page 37
page 19
3.3V 33 MHz
IDSEL:AD20 (PIRQA#,B#,C#,D#, GNT#2, REQ#2)
TI Controller
1394 Conn.
page 24
Touch Pad
Slot 0
page 26
PCI BUS
PCI7411
page 23,24
5in1 CardReader Slot
ENE KB910 ENE KB910L
page 34,34
page 25
Int.KBD
Intel ICH6-M
LPC BUS
page 36
mBGA-609
page 22,23,24
3.3V 33MHz
SMsC LPC47N217
Super I/O
PARALLEL
page 33
USB 2.0
3.3V 48MHz
3.3V 24.57 6MHz
3.3V ATA-100
IDE
SATA
page 33
FIR
page 33
AC-LINK
CDROM Conn.
page 25
SATA to PATA
88SA8040
page 25
HDD Conn.
USB conn x 1
Port 4
page 35
AC97 Codec
ALC250 Ver.D
AMP TPA0232
Audio Board Conn
LS-2691
page 31
page 32
MDC Conn
page 32
page 31
EAL30 Sub Board
LED/SW Board Conn LS-2462
page 36
T/P Board Conn LS-2461
page 36
WL-KSW Board
LS-2692
DC/DC Int erface CKT.
4 4
page 38
1MB BIOS
page 35
Power Circuit DC/DC
page 38,39,40,41 42,43,44,45
A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2005/03/01 2006/03/01
Deciphered Date
Title
Size Document Number Rev
Custom
D
Date: Sheet
Compal Electro ni cs, Inc.
Block Diagram
星|, 03, 2005
薔三月
EAL30 LA-2691
E
1.0
of
152
Page 2
A
1 1
B
C
D
E
Compal Confidential
2 2
Fortworth Alviso EAL30 LA-2691 Schematic
uFC-PGA Dothan / 915 PM/GM/910GML
3 3
ATI M24/M24C/M22 Ver A23 with 64M/128M VRAM / ICH6-M
2005-03-01
REV:1.0
4 4
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
2005/03/01 2006/03/01
C
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
Custom
D
Date: Sheet
Compal Electronics, Inc.
Cover Sheet
, 04, 2005
五三月
EAL30 LA-2691
星期
E
1.0
of
152
Page 3
A
Voltage Rails
Symbol note:
:means digital ground.
Power Plane
VIN B+ +CPU_CORE +1.05VS +1.25VS +VGA_CORE +1.2VS +1.5VALW +1.5VS +1.8VS +2.5V +3VALW +3V +3VS +5VALW +5VS +12VALW RTCVCC
Note : ON * m e a n s t h a t t hi s p ow e r pl a ne is ON only with AC power available, otherwise it is OFF.
1 1
ICH6-M I2C / SMB US ADDRESSING
DEVICE
DDR SO-DIMM 0 DDR SO-DIMM 1 CLOCK GENERATOR (EXT.)
Description
Adapter power supply (19V) AC or battery power rail for power circuit Core voltage for CPU
1.05V rail for Processor I/O
1.25V switched power ra il for DDR Vtt
1.2V/1.0V switched power rail for VGA core power
1.2V for VGA PCIE power ON O FF O FF
1.5V always on power rail
1.5V switched power rail
1.8V switched power rail for VGA frame buffer
2.5V power rail for system DDR
3.3V always on power rail
3.3V switched power rail
3.3V switched power rail 5V always on power rail 5V switched power rail 12V always on power rail RTC power
HEX
A0 A2 D2
ADDRESS
1 0 1 0 0 0 0 X 1 0 1 0 0 0 1 X 1 1 0 1 0 0 1 X
S0-S1
N/A
ON OFF ON ON ON
ON ON ON ON ON ON ON OFF ON ON ON ON
S5
S3
N/A
N/A N/AN/A
N/A
OFF OFF
OFF
OFF
OFF OFF
OFF
ON*
ON
OFF
OFF OFF
OFF OFF
ON ON ON*
OFF
ON OFF
ON*ON
OFF
OFF ON ON* ON
ON*
:means analog ground. :means reserved.@
Fortworth Alviso Comparison Table
Item
VGA VRAM
*
Descrite PageUMA
ATi M22P/24P
128MB/64MB
UMA
N/A
Board ID Tabl e for AD channel
Vcc 3.3V +/- 5%
BID/PID
0 1 2 3 4 5 3.465 V3.135 V
10K +/- 5%Ra
Rb/Rc V min
0
8.2K +/- 5%
AD_BID
0 V
1.412 V 1.560 V 18K +/- 5% 33K +/- 5% 56K +/- 5%
NC 3.300 V
15 ~ 18
19 ~ 20
V typ
AD_BID
0 V 0.1 V
1.486 V
2.121 V
2.533 V
2.800 V
V
AD_BID
max
2.227 V2.015 V
2.659 V2.406 V
2.940 V2.660 V
KB910 I2C / SMBUS ADDRESSING
DEVICE
SM1 24C16 SM1 SMART BATTERY SM2 ADM0132
CPU THERMAL MONITOR SM2 ALC250 codec 00H 0 0 0 0 0 0 0 X b
HEX
A0H
98H
External PCI Devices
DEVICE
1394 AD20 LAN CARD BUS
Mini-PCI
PCI Device ID
D0 D1 D4
D2
IDSEL #
AD17 AD20
AD18
ADDRESS
1 0 1 0 0 0 0 X b 0 0 0 1 0 1 1 X b16H 1 0 0 1 1 0 0 X b
REQ/GNT #
Board ID
0
*
1
PCB Revision
0.1
2 3 4 5
PIRQ
2 3 2 25IN1 D4 AD20 1
A,B,C,D F A,B,C,D A,B,C,D G,H
6 7
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
A
Compal Secret Data
Deciphered Date
2006/03/012005/03/01
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Notes List EAL30 LA-2691
星期
, 03, 2005
四三月
of
352
1.0
Page 4
A
H_A#[3..31]6
4 4
H_REQ#[0..4]6
3 3
H_RS#[0..2]6
2 2
1 1
H_A#[3..31]
H_REQ#[0..4]
H_RS#[0..2]
H_ADSTB#06 H_ADSTB#16
CLK_CPU_BCLK14
CLK_CPU_BCLK#14
H_ADS#6 H_BNR#6
H_BPRI#6
H_BR0#6
H_DEFER#6
H_DRDY#6
H_HIT#6 H_HITM#6
H_LOCK#6
H_CPURST#6
H_TRDY#6
H_DBSY#6 H_DPSLP#24 H_DPRSTP#24 H_DPWR#6
H_PWRGOOD24
H_CPUSLP#6,24
H_THERMTRIP#6,24
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_IERR# H_CPURST#
H_RS#0 H_RS#1 H_RS#2
ITP_DBRRESET#
PRO_CHOT# H_PWRGOOD
H_CPUSLP# ITP_TCK ITP_TDI ITP_TDO TEST1 TEST2 ITP_TMS ITP_TRST#
THERMDA THERMDC
P4 U4 V3 R3 V2
W1
T4
W2
Y4 Y1 U1
AA3
Y3 AA2 AF4 AC4 AC7 AC3 AD3 AE4 AD2 AB4 AC6 AD5 AE2 AD6 AF3 AE1 AF1
R2
P3
T2
P1
T1
U3 AE5
A16 A15
B15 B14
N2
L1
J3
N4
L4
H2
K3
K4
A4
J2 B11
H1
K1
L2
M3
C8
B8
A9
C9
A7
M2
B7
G1 C19 A10 B10 B17
E4
A6 A13 C12 A12
C5 F23 C11 B13
B18 A18 C17
THERMDA & THERMDC Trace / Space = 10 / 10 mil
B
U7A
A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31#
REQ0# REQ1# REQ2# REQ3# REQ4#
ADSTB0# ADSTB1#
ITP_CLK0 ITP_CLK1
BCLK0 BCLK1
ADS# BNR# BPRI# BR0# DEFER# DRDY# HIT# HITM# IERR# LOCK# RESET#
RS0# RS1# RS2# TRDY#
BPM0# BPM1# BPM2# BPM3#
DBR# DBSY# DPSLP# DPRSTP# DPWR# PRDY# PREQ# PROCHOT#
PWRGOOD SLP# TCK TDI TDO TEST1 TEST2 TMS TRST#
THERMDA THERMDC THERMTRIP#
TYCO_1612365-1_Dothan
Dothan
ADDR GROUP
HOST CLK
CONTROL GROUP
MISC
THERMAL DIODE
DATA GROUP
LEGACY CPU
D10# D11# D12# D13# D14# D15# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63#
DINV0# DINV1# DINV2# DINV3#
DSTBN0# DSTBN1# DSTBN2# DSTBN3# DSTBP0# DSTBP1# DSTBP2# DSTBP3#
A20M# FERR#
IGNNE#
INIT# LINT0 LINT1
STPCLK#
SMI#
C
H_D#[0..63]
H_D#0
A19
D0# D1# D2# D3# D4# D5# D6# D7# D8# D9#
A25 A22 B21 A24 B26 A21 B20 C20 B24 D24 E24 C26 B23 E23 C25 H23 G25 L23 M26 H24 F25 G24 J23 M23 J25 L26 N24 M25 H26 N25 K25 Y26 AA24 T25 U23 V23 R24 R26 R23 AA23 U26 V24 U25 V26 Y23 AA26 Y25 AB25 AC23 AB24 AC20 AC22 AC25 AD23 AE22 AF23 AD24 AF20 AE21 AD21 AF25 AF22 AF26
D25 J26 T24 AD20
C23 K24 W25 AE24 C22 L24 W24 AE25
C2 D3 A3 B5 D1 D4
C6 B4
H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_DINV#0 6 H_DINV#1 6 H_DINV#2 6 H_DINV#3 6
H_DSTBN#0 6 H_DSTBN#1 6 H_DSTBN#2 6 H_DSTBN#3 6 H_DSTBP#0 6 H_DSTBP#1 6 H_DSTBP#2 6 H_DSTBP#3 6
H_A20M# 24 H_FERR# 24 H_IGNNE# 24 H_INIT# 24 H_INTR 24 H_NMI 24
H_STPCLK# 24 H_SMI# 24
EN_DFAN139
H_D#[0..63] 6
1 2
R45 10K_0402_5%
D
ITP_TDI ITP_TDO H_CPURST# ITP_TMS PRO_CHOT# H_PWRGOOD H_IERR#
ITP_DBRRESET# ITP_TRST#
ITP_TCK TEST1 TEST2
R426 150_0402_5% R423 54.9_0402_1%@ R424 54.9_0402_1%@ R427 40.2_0402_1% R23 56_0402_5% R422 200_0402_5% R418 56_0402_5%
R415 150_0402_5%@ R22 680_0402_5% R21 27.4_0402_1% R421 1K_0402_5%@ R414 1K_0402_5%@
12 12 12 12 12 12 12
12 12 12 12 12
Reserve For Testability
H_FERR# H_CPUSLP# H_DPSLP# H_STPCLK# H_INIT# H_SMI# H_IGNNE# H_NMI
Thermal Sensor ADI ADM1032AR
+3VS
2
12
C457
R18
@
1
1
C20
2
2200P_0402_25V7K
10K_0402_5%
0.1U_0402_16V4Z
W=15mil
THERMDA THERMDC
C44 100P_0402_50V8J@
1 2
C32 100P_0402_50V8J@
1 2
C46 100P_0402_50V8J@
1 2
C41 100P_0402_50V8J@
1 2
C34 100P_0402_50V8J@
1 2
C33 100P_0402_50V8J@
1 2
C29 100P_0402_50V8J@
1 2
C49 100P_0402_50V8J@
1 2
U31
1
VDD
2
D+
3
D­THERM#4GND
ADM1032AR_SOP8
Address:1001_100X
SCLK
SDATA
ALERT#
Fan Control circuit
PU5B
LM358A_SO8
5
+
FAN1_ON
7
0
6
-
P@
1 2
R46 8.2K_0402_5%
1 2
R47 100_0402_5%
C64
0.1U_0402_16V4Z
FANSPEED139
+3VS
2
B
1
2
+1.05VS
+3VS
8 7 6 5
+5VS
1
C
Q3 FMMT619_SOT23
E
3 12
D8 1N4148_SOD80
1 2
R362 10K_0402_5%
1
@
C444 1000P_0402_50V7K
2
E
12
D7 1SS355_SOD323
FAN1_VOUT
1
@
2
EC_SMC_2 36,39 EC_SMD_2 36,39
1
C43 10U_0805_10V4Z
2
JP7
1 2 3
ACES_85205-0300
C448 1000P_0402_50V7K
Close to Fan Conn.
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Deciphered Date
2006/03/012005/03/01
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
INTEL Dothan(1/2) EAL30 LA-2691
星期四 三月
, 03, 2005
E
452
1.0
of
Page 5
A
U7B
AE7
VCCSENSE
AF6
VSSSENSE
F26
VCCA0
B1
VCCA1
N1
VCCA2
AC26
VCCA3
P23
VCCQ0
W4
VCCQ1
D10
VCCP
D12
VCCP
D14
VCCP
D16
VCCP
E11
VCCP
E13
VCCP
E15
VCCP
F10
VCCP
F12
VCCP
F14
VCCP
F16
VCCP
K6
VCCP
L5
VCCP
L21
VCCP
M6
VCCP
M22
VCCP
N5
VCCP
N21
VCCP
P6
VCCP
P22
VCCP
R5
VCCP
R21
VCCP
T6
VCCP
T22
VCCP
U21
VCCP
D6
VCC
D8
VCC
D18
VCC
D20
VCC
D22
VCC
E5
VCC
E7
VCC
E9
VCC
E17
VCC
E19
VCC
E21
VCC
F6
VCC
F8
VCC
F18
VCC
E1
PSI#
E2
VID0
F2
VID1
F3
VID2
G3
VID3
G4
VID4
H4
VID5
AD26
GTLREF
C16
BSEL0
C14
BSEL1
P25
COMP0
P26
COMP1
AB2
COMP2
AB1
COMP3
B2
RSVD
C3
RSVD
E26
RSVD
AF7
RSVD
AC1
RSVD
TYCO_1612365-1_Dothan
COMP0 COMP1 COMP2 COMP3
+1.05VS
VCCSENSE VSSSENSE
R83 54.9_0402_1%@
1 2
R82 54.9_0402_1%@
1 2
+VCCA
1 1
1.8V FOR DOTHAN-A
1 2
+1.8VS
R301 0_1206_5%@
1.5V FOR DOTHAN-B
1 2
+1.5VS
R302 0_1206_5%
1
1
C30
0.01U_0402_16V7K
2 2
+1.05VS
12
R62 1K_0402_1%
1 2
R59 2K_0402_1%
3 3
R44 27.4_0402_1% R42 54.9_0402_1% R81 27.4_0402_1%
4 4
R80 54.9_0402_1%
2
10U_0805_6.3V6M
+CPU_CORE
PSI#50 CPU_VID050
CPU_VID150 CPU_VID250 CPU_VID350 CPU_VID450 CPU_VID550
CPU_BSEL014 CPU_BSEL114
1 2 1 2 1 2 1 2
C24
2
GTL_REF0
COMP0 COMP1 COMP2 COMP3
B
A2
VSS
A5
VSS
A8
VSS
A11
VSS
A14
VSS
A17
VSS
A20
VSS
A23
VSS
A26
VSS
B3
VSS
B6
VSS
B9
VSS
B12
Dothan
VSS
B16
VSS
B19
VSS
B22
VSS
B25
VSS
C1
VSS
C4
VSS
C7
VSS
C10
VSS
C13
VSS
C15
VSS
C18
VSS
C21
VSS
C24
VSS
D2
VSS
D5
VSS
D7
VSS
D9
VSS
D11
VSS
D13
VSS
D15
VSS
D17
VSS
D19
VSS
D21
VSS
D23
VSS
D26
VSS
E3
VSS
E6
VSS
E8
VSS
E10
VSS
E12
VSS
E14
VSS
E16
VSS
E18
VSS
E20
VSS
E22
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
E25 F1 F4 F5 F7 F9 F11 F13 F15 F17 F19 F21 F24 G2 G6 G22 G23 G26 H3 H5 H21 H25 J1 J4 J6 J22 J24 K2 K5 K21 K23 K26 L3 L6 L22 L25 M1
POWER, GROUNG, RESERVED SIGNALS AND NC
+1.05VS
1
+
2
150U_D2_6.3VM
0.1U_0402_16V4Z
1
C104
2
330U_D_2VM
+CPU_CORE
10U_0805_6.3V6M
1
C35
2
10U_0805_6.3V6M
+CPU_CORE
10U_0805_6.3V6M
1
C65
C52
2
10U_0805_6.3V6M
+CPU_CORE
10U_0805_6.3V6M
1
C74
C73
2
10U_0805_6.3V6M
+CPU_CORE
10U_0805_6.3V6M
1
C540
C541
2
10U_0805_6.3V6M
+CPU_CORE
10U_0805_6.3V6M
1
C585
C569
2
10U_0805_6.3V6M
Vcc-core Decoupling SPCAP,Polymer
MLCC 0805 X5R
0.1U_0402_16V4Z
1
C520
C519
2
0.1U_0402_16V4Z
C
+CPU_CORE
330U_D_2VM
1
1
+
C475
2
1
1
C36
C37
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
1
C48
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
1
C75
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
1
C539
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
1
C612
2
2
10U_0805_6.3V6M
C,uF ESL,nH
1
+
C474
@
2
2
330U_D_2VM
10U_0805_6.3V6M
1
C38
C39
2
10U_0805_6.3V6M
1
C53
C66
2
10U_0805_6.3V6M
1
C76
C544
2
10U_0805_6.3V6M
1
C564
C570
2
10U_0805_6.3V6M
1
C611
C610
2
10U_0805_6.3V6M
ESR, mohm
+
C473
10U_0805_6.3V6M
1
2
10U_0805_6.3V6M
1
2
10U_0805_6.3V6M
1
2
10U_0805_6.3V6M
1
2
10U_0805_6.3V6M
1
2
C40
C71
C543
C586
C609
1
2
1
2
1
2
1
2
1
2
3X330uF 9m ohm/3 3.5nH/4
1
2
35X10uF
1
C518
2
0.1U_0402_16V4Z
5m ohm/35 0.6nH/35
0.1U_0402_16V4Z
1
C517
2
1
C554
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C575
1
2
1
C47
2
10U_0805_6.3V6M
1
C72
2
10U_0805_6.3V6M
1
C542
2
10U_0805_6.3V6M
1
C563
2
10U_0805_6.3V6M
1
C608
2
10U_0805_6.3V6M
0.1U_0402_16V4Z
1
C591
C560
2
0.1U_0402_16V4Z
1
C584
2
D
+CPU_CORE
1
C602
2
0.1U_0402_16V4Z
U7C
F20
VCC
F22
VCC
G5
VCC
G21
VCC
H6
VCC
H22
VCC
J5
VCC
J21
VCC
K22
VCC
U5
VCC
V6
VCC
V22
VCC
W5
VCC
W21
VCC
Y6
VCC
Y22
VCC
AA5
VCC
AA7
VCC
AA9
VCC
AA11
VCC
AA13
VCC
AA15
VCC
AA17
VCC
AA19
VCC
AA21
VCC
AB6
VCC
AB8
VCC
AB10
VCC
AB12
VCC
AB14
VCC
AB16
VCC
AB18
VCC
AB20
VCC
AB22
VCC
AC9
VCC
AC11
VCC
AC13
VCC
AC15
VCC
AC17
VCC
AC19
VCC
AD8
VCC
AD10
VCC
AD12
VCC
AD14
VCC
AD16
VCC
AD18
VCC
AE9
VCC
AE11
VCC
AE13
VCC
AE15
VCC
AE17
VCC
AE19
VCC
AF8
VCC
AF10
VCC
AF12
VCC
AF14
VCC
AF16
VCC
AF18
VCC
M4
VSS
M5
VSS
M21
VSS
M24
VSS
N3
VSS
N6
VSS
N22
VSS
N23
VSS
N26
VSS
P2
VSS
P5
VSS
P21
VSS
P24
VSS
R1
VSS
R4
VSS
R6
VSS
R22
VSS
R25
VSS
T3
VSS
T5
VSS
T21
VSS
T23
VSS
TYCO_1612365-1_Dothan
Dothan
POWER, GROUND
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
E
T26 U2 U6 U22 U24 V1 V4 V5 V21 V25 W3 W6 W22 W23 W26 Y2 Y5 Y21 Y24 AA1 AA4 AA6 AA8 AA10 AA12 AA14 AA16 AA18 AA20 AA22 AA25 AB3 AB5 AB7 AB9 AB11 AB13 AB15 AB17 AB19 AB21 AB23 AB26 AC2 AC5 AC8 AC10 AC12 AC14 AC16 AC18 AC21 AC24 AD1 AD4 AD7 AD9 AD11 AD13 AD15 AD17 AD19 AD22 AD25 AE3 AE6 AE8 AE10 AE12 AE14 AE16 AE18 AE20 AE23 AE26 AF2 AF5 AF9 AF11 AF13 AF15 AF17 AF19 AF21 AF24
TRACE CLOSELY CPU < 0.5'
COMP0, COMP2 layout : Width 18mils and Space 25mils COMP1, COMP3 layout : Space 25mils
A
B
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
C
Compal Secret Data
Deciphered Date
2005/03/012006/03/01
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
INTEL Dothan(2/2) EAL30 LA-2691
星期
, 03, 2005
四三月
E
of
552
1.0
Page 6
5
4
3
2
1
H_RS#[0..2]
H_A#[3..31]4 H_REQ#[0..4]4
D D
C C
CLK_MCH_BCLK#14 CLK_MCH_BCLK14
B B
(5mil:15mil) (12mil:10mil)
A A
H_VREF
1
C148
0.1U_0402_16V4Z
2
H_A#[3..31]
H_REQ#[0..4]
H_ADSTB#04 H_ADSTB#14
H_DSTBN#04 H_DSTBN#14 H_DSTBN#24 H_DSTBN#34 H_DSTBP#04 H_DSTBP#14 H_DSTBP#24 H_DSTBP#34 H_DINV#04 H_DINV#14 H_DINV#24 H_DINV#34
H_CPURST#4
H_ADS#4 H_TRDY#4
H_DPWR#4
H_DRDY#4 H_DEFER#4
H_HITM#4 H_HIT#4 H_LOCK#4 H_BR0#4 H_BNR#4 H_BPRI#4 H_DBSY#4
H_CPUSLP#4,24
12
R108 100_0603_1%
12
R111 200_0603_1%
5
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_RS#0 H_RS#1 H_RS#2
H_RS#[0..2] 4
U44A
G9
HA3#
Alviso
C9
HA4#
E9
HA5#
B7
HA6#
A10
HA7#
F9
HA8#
D8
HA9#
B10
HA10#
E10
HA11#
G10
HA12#
D9
HA13#
E11
HA14#
F10
HA15#
G11
HA16#
G13
HA17#
C10
HA18#
C11
HA19#
D11
HA20#
C12
HA21#
B13
HA22#
A12
HA23#
F12
HA24#
G12
HA25#
E12
HA26#
C13
HA27#
B11
HA28#
D13
HA29#
A13
HA30#
F13
HA31#
A11
HPCREQ#
A7
HREQ#0
D7
HREQ#1
B8
HREQ#2
C7
HREQ#3
A8
HREQ#4
B9
HADSTB#0
E13
HADSTB#1
AB1
HCLKN
AB2
HCLKP
G4
HDSTBN#0
K1
HDSTBN#1
R3
HDSTBN#2
V3
HDSTBN#3
G5
HDSTBP#0
K2
HDSTBP#1
R2
HDSTBP#2
W4
HDSTBP#3
H8
HDINV#0
K3
HDINV#1
T7
HDINV#2
U5
HDINV#3
H10
HCPURST#
F8
HADS#
B5
HTRDY#
G6
HDPWR#
F7
HDRDY#
E6
HDEFER#
F6
HEDRDY#
D6
HHITM#
D4
HHIT#
B3
HLOCK#
E7
HBREQ0#
A5
HBNR#
D5
HBPRI#
C6
HDBSY#
G8
HCPUSLP#
A4
HRS0#
C5
HRS1#
B4
HRS2#
82915PM-C0
HOST
ALVISO_BGA1257915PM@
(R3:SA009150180) (R1:SA009150160)
H_XSWING
1
C686
0.1U_0402_16V4Z
2
HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8#
HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63#
HVREF HXRCOMP HXSCOMP HYRCOMP HYSCOMP
HXSWING HYSWING
E4 E1 F4 H7 E2 F1 E3 D3 K7 F2 J7 J8 H6 F3 K8 H5 H1 H2 K5 K6 J4 G3 H3 J1 L5 K4 J5 P7 L7 J3 P5 L3 U7 V6 R6 R5 P3 T8 R7 R8 U8 R4 T4 T5 R1 T3 V8 U6 W6 U3 V5 W8 W7 U2 U1 Y5 Y2 V4 Y7 W1 W3 Y3 Y6 W2
J11 C1 C2 T1 L1 D1 P1
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_VREF H_XRCOMP
R473 24.9_0402_1%
H_XSCOMP
R474 54.9_0402_1%
H_YRCOMP
R480 24.9_0402_1%
H_YSCOMP
R484 54.9_0402_1%
H_XSWING H_YSWING
H_D#[0..63]
1 2 1 2
12 12
H_D#[0..63] 4
+2.5V
+1.05VS
H_XRCOMP & H_YRCOMP Trace / Space = 10 / 20 mil
+1.05VS +1.05VS+1.05VS
12
R470 221_0603_1%
12
R462 100_0603_1%
4
H_YSWING
1
C694
0.1U_0402_16V4Z
2
12
R467 221_0603_1%
(12mil:10mil)
12
R483 100_0603_1%
CLK_DREF_SSC
2
G16 H13 G14 F16 F15 G15 E16 D17 J16 D15 E15 D14 E14 H12 C14 H15 J15 H14 G22 G23 D23 G25 G24 J17 A31 A30 D26 D25
J23 J21 H22 F5 AD30 AE29
A24 A23 D37 C37
AP37 AN37 AP36 AP2 AP1 AN1 B1 A2 B37 A36 A37
2006/03/012005/03/01
CLK_DREF_SSC#
EXT_TS#0 EXT_TS#1
H_THERMTRIP#
CLK_DREF_96M# CLK_DREF_96M CLK_DREF_SSC CLK_DREF_SSC#
DMI_ITX_MRX_N025 DMI_ITX_MRX_N125 DMI_ITX_MRX_N225 DMI_ITX_MRX_N325
DMI_ITX_MRX_P025 DMI_ITX_MRX_P125 DMI_ITX_MRX_P225 DMI_ITX_MRX_P325
DMI_MTX_IRX_N025 DMI_MTX_IRX_N125 DMI_MTX_IRX_N225 DMI_MTX_IRX_N325
DMI_MTX_IRX_P025 DMI_MTX_IRX_P125 DMI_MTX_IRX_P225 DMI_MTX_IRX_P325
DDRA_CLK111 DDRA_CLK211
DDRB_CLK112 DDRB_CLK212
DDRA_CLK1#11 DDRA_CLK2#11
DDRB_CLK1#12 DDRB_CLK2#12
DDRA_CKE011 DDRA_CKE111 DDRB_CKE012 DDRB_CKE112
DDRA_SCS#011 DDRA_SCS#111 DDRB_SCS#012 DDRB_SCS#112
R135 40.2_0402_1%@
1 2
R120 40.2_0402_1%@
1 2
DMI_ITX_MRX_N0 DMI_ITX_MRX_N1 DMI_ITX_MRX_N2 DMI_ITX_MRX_N3
DMI_ITX_MRX_P0 DMI_ITX_MRX_P1 DMI_ITX_MRX_P2 DMI_ITX_MRX_P3
DMI_MTX_IRX_N0 DMI_MTX_IRX_N1 DMI_MTX_IRX_N2 DMI_MTX_IRX_N3
DMI_MTX_IRX_P0 DMI_MTX_IRX_P1 DMI_MTX_IRX_P2 DMI_MTX_IRX_P3
DDRA_CKE0 DDRA_CKE1 DDRB_CKE0 DDRB_CKE1
DDRA_SCS#0 DDRA_SCS#1 DDRB_SCS#0 DDRB_SCS#1
M_OCDCOMP0 M_OCDCOMP1
Intel new update
R106 80.6_0402_1%
1 2
R105 80.6_0402_1%
1 2
M_RCOMPN M_RCOMPP SMVREF
M_XSLEW M_YSELW
(10mil:20mil)
+2.5V
12
R466
1K_0402_1%
12
R475
1K_0402_1%
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
U44B
AA31
DMIRXN0
AB35
DMIRXN1
AC31
DMIRXN2
AD35
DMIRXN3
Y31
DMIRXP0
AA35
DMIRXP1
AB31
DMIRXP2
AC35
DMIRXP3
AA33
DMITXN0
AB37
DMITXN1
AC33
DMITXN2
AD37
DMITXN3
Y33
DMITXP0
AA37
DMITXP1
AB33
DMITXP2
AC37
DMITXP3
AM33
SM_CK0
AL1
SM_CK1
AE11
SM_CK2
AJ34
SM_CK3
AF6
SM_CK4
AC10
SM_CK5
AN33
SM_CK0#
AK1
SM_CK1#
AE10
SM_CK2#
AJ33
SM_CK3#
AF5
SM_CK4#
AD10
SM_CK5#
AP21
SM_CKE0
AM21
SM_CKE1
AH21
SM_CKE2
AK21
SM_CKE3
AN16
SM_CS0#
AM14
SM_CS1#
AH15
SM_CS2#
AG16
SM_CS3#
AF22
SM_OCDCOMP0
AF16
SM_OCDCOMP1
AP14
SM_ODT0
AL15
SM_ODT1
AM11
SM_ODT2
AN10
SM_ODT3
AK10
SMRCOMPN
AK11
SMRCOMPP
AF37
SMVREF0
AD1
SMVREF1
AE27
SMXSLEWIN
AE28
SMXSLEWOUT
AF9
SMYSLEWIN
AF10
SMYSLEWOUT
ALVISO_BGA1257915PM@
0.1U_0402_16V4Z
1
C236
2
Compal Secret Data
DMIDDR MUXING
SMVREF
1
C691
0.1U_0402_16V4Z
2
Deciphered Date
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8
CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20
RSVD21 RSVD22
CFG/RSVD
RSVD23 RSVD24 RSVD25 RSVD26 RSVD27
BM_BUSY#
EXT_TS0# EXT_TS1#
THRMTRIP#
PWROK
RSTIN#
PM
DREF_CLKN
DREF_CLKP
DREF_SSCLKP
CLK
DREF_SSCLKN
NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9
NC10
NC
NC11
CFG0 MCH_CLKSEL1 MCH_CLKSEL0
CFG5 CFG6 CFG7
CFG9
CFG12 CFG13
CFG16 CFG18
CFG19
CFG[2:0] CFG5 CFG6 CFG7
CFG9
CFG[13:12]
CFG16 (FSB Dynamic ODT)
CFG18 (VCC Select)
CFG19 (VTT Select)
R158 0_0402_5%PM@
1 2
R157 0_0402_5%PM@
1 2
MCH_CLKSEL1 14 MCH_CLKSEL0 14
CFG0
R121 10K_0402_5%
1 2
CFG5
R115 1K_0402_5%@
1 2
CFG6
R117 1K_0402_5%@
CFG7 CFG9 CFG12 CFG13 CFG16
1 2
R122 1K_0402_5%@
1 2
R113 1K_0402_5%@
1 2
R114 1K_0402_5%@
1 2
R107 1K_0402_5%@
1 2
R116 1K_0402_5%@
1 2
CFG[17:3]: internal pull-up
CFG18
R140 1K_0402_5%@
CFG19
1 2
R137 1K_0402_5%@
1 2
CFG[19:18]: internal pull-down
PM_BMBUSY# 25
H_THERMTRIP# 4,24 VGATE 14,25,50 PLT_RST# 15,23,25,27,28,31,35,39
CLK_DREF_96M# 14 CLK_DREF_96M 14 CLK_DREF_SSC 14 CLK_DREF_SSC# 14
EXT_TS#0
R134 10K_0402_5%
EXT_TS#1
Title
Size Document Number Rev
Date: Sheet
1 2
R139 10K_0402_5%
1 2
Refer to sheet 6 for FSB frequency select Low = DMI x 2
High = DMI x 4 Low = DDR-II
High = DDR-I Low = DT/Transportable CPU
High = Mobile CPU Low = Reverse Lane
High = Normal Operation 00 = Reserved
01 = XOR Mode Enabled 10 = All Z Mode Enabled 11 = Normal Operation (Default)
Low = Disabled High = Enabled
Low = 1.05V (Default) High = 1.5V
Low = 1.05V (Default) High = 1.2V
Compal Electronics, Inc.
INTEL Alviso HOST(1/5) EAL30 LA-2691
星期
, 03, 2005
四三月
+1.5VS
+1.05VS
+2.5VS
+2.5VS
* *
*
*
*
*
*
*
1.0
of
652
1
Page 7
5
4
3
2
1
PCIE_MTX_C_GRX_N[0..15]15
PCIE_MTX_C_GRX_P[0..15]15 PCIE_GTX_C_MRX_N[0..15]15 PCIE_GTX_C_MRX_P[0..15]15
R142 3K_0402_1%@
D D
GMCH_TV_LUMA22 GMCH_TV_CRMA22
GMCH_CRT_CLK22 GMCH_CRT_DATA22 GMCH_CRT_B22
GMCH_CRT_G22 GMCH_CRT_R22
GMCH_CRT_VSYNC22 GMCH_CRT_HSYNC22
C C
+2.5VS
R130 4.7K_0402_5%
1 2
R126 4.7K_0402_5%
1 2
R133 2.2K_0402_5%GM@
1 2
R141 2.2K_0402_5%GM@
1 2
Intel Recommand
R146 100K_0402_5%
1 2
R152 1.5K_0402_1%
1 2
R529 75_0402_1%
1 2
R531 150_0402_1%
1 2
R532 150_0402_1%
1 2
B B
+2.5VS
+3VS
GMCH_TV_LUMA GMCH_TV_CRMA
GMCH_CRT_CLK GMCH_CRT_DATA LCTLB_DATA LCTLA_CLK
LBKLT_EN LIBG GMCH_TV_COMPS GMCH_TV_LUMA GMCH_TV_CRMA
GMCH_CRT_CLK GMCH_CRT_DATA
+2.5VS
CLK_MCH_3GPLL#14 CLK_MCH_3GPLL14
GMCH_TV_COMPS
R125 4.99K_0402_1%
12
R124 150_0402_1% R127 150_0402_1% R119 150_0402_1%
12 12 12
GMCH_ENVDD21
GMCH_TXCLK-21 GMCH_TXCLK+21 GMCH_TZCLK-21 GMCH_TZCLK+21
GMCH_TXOUT0-21 GMCH_TXOUT1-21 GMCH_TXOUT2-21
GMCH_TXOUT0+21 GMCH_TXOUT1+21 GMCH_TXOUT2+21
GMCH_TZOUT0-21 GMCH_TZOUT1-21 GMCH_TZOUT2-21
GMCH_TZOUT0+21 GMCH_TZOUT1+21 GMCH_TZOUT2+21
1 2
R143 3K_0402_1%@
1 2
R527 0_0402_5%
12
1 2
R131 255_0402_1%
LBKLT_EN LCTLA_CLK LCTLB_DATA LDDC_CLK LDDC_DATA GMCH_ENVDD LIBG
GMCH_TXCLK­GMCH_TXCLK+ GMCH_TZCLK­GMCH_TZCLK+
GMCH_TXOUT0­GMCH_TXOUT1­GMCH_TXOUT2-
GMCH_TXOUT0+ GMCH_TXOUT1+ GMCH_TXOUT2+
GMCH_TZOUT0­GMCH_TZOUT1­GMCH_TZOUT2-
GMCH_TZOUT0+ GMCH_TZOUT1+ GMCH_TZOUT2+
TV_REFSET
REFSET
H24
H25 AB29 AC29
A15
C16
A17
B15
B16
B17
E24
E23
E21
D21
C20
B20
A19
B19
H21
G21
E25
F25
C23
C22
F23
F22
F26
C33
C31
F28
F27
B30
B29
C25
C24
B34
B33
B32
A34
A33
B31
C29
D28
C27
C28
D27
C26
J18
J20
U44G
SDVOCTRL_DATA SDVOCTRL_CLK GCLKN GCLKP
TVDAC_A TVDAC_B TVDAC_C TV_REFSET TV_IRTNA TV_IRTNB TV_IRTNC
DDCCLK DDCDATA BLUE BLUE# GREEN GREEN# RED RED# VSYNC HSYNC REFSET
LBKLT_CTL LBKLT_EN LCTLA_CLK LCTLB_DATA LDDC_CLK LDDC_DATA LVDD_EN LIBG LVBG LVREFH LVREFL
LACLKN LACLKP LBCLKN LBCLKP
LADATAN0 LADATAN1 LADATAN2
LADATAP0 LADATAP1 LADATAP2
LBDATAN0 LBDATAN1 LBDATAN2
LBDATAP0 LBDATAP1 LBDATAP2
ALVISO_BGA1257915PM@
EXP_RXN0/SDVO_TVCLKIN#
MISCTVVGALVDS
EXP_RXN1/SDVO_INT#
EXP_RXN2/SDVO_FLDSTALL#
EXP_RXP0/SDVO_TVCLKIN
EXP_RXP1/SDVO_INT
EXP_RXP2/SDVO_FLDSTALL
EXP_TXN0/SDVOB_RED#
EXP_TXN1/SDVOB_GREEN#
EXP_TXN2/SDVOB_BLUE#
EXP_TXN3/SDVOB_CLKN EXP_TXN4/SDVOC_RED#
EXP_TXN5/SDVOC_GREEN#
EXP_TXN6/SDVOC_BLUE#
EXP_TXN7/SDVOC_CLKN
PCI - EXPRESS GRAPHICS
EXP_TXP0/SDVOB_RED
EXP_TXP1/SDVOB_GREEN
EXP_TXP2/SDVOB_BLUE EXP_TXP3/SDVOB_CLKP
EXP_TXP4/SDVOC_RED
EXP_TXP5/SDVOC_GREEN
EXP_TXP6/SDVOC_BLUE EXP_TXP7/SDVOC_CLKP
EXP_COMPI
EXP_ICOMPO
EXP_RXN3 EXP_RXN4 EXP_RXN5 EXP_RXN6 EXP_RXN7 EXP_RXN8
EXP_RXN9 EXP_RXN10 EXP_RXN11 EXP_RXN12 EXP_RXN13 EXP_RXN14 EXP_RXN15
EXP_RXP3
EXP_RXP4
EXP_RXP5
EXP_RXP6
EXP_RXP7
EXP_RXP8
EXP_RXP9 EXP_RXP10 EXP_RXP11 EXP_RXP12 EXP_RXP13 EXP_RXP14 EXP_RXP15
EXP_TXN8
EXP_TXN9 EXP_TXN10 EXP_TXN11 EXP_TXN12 EXP_TXN13 EXP_TXN14 EXP_TXN15
EXP_TXP8
EXP_TXP9 EXP_TXP10 EXP_TXP11 EXP_TXP12 EXP_TXP13 EXP_TXP14 EXP_TXP15
D36 D34
PCIE_GTX_C_MRX_N0
E30
PCIE_GTX_C_MRX_N1
F34
PCIE_GTX_C_MRX_N2
G30
PCIE_GTX_C_MRX_N3
H34
PCIE_GTX_C_MRX_N4
J30
PCIE_GTX_C_MRX_N5
K34
PCIE_GTX_C_MRX_N6
L30
PCIE_GTX_C_MRX_N7
M34
PCIE_GTX_C_MRX_N8
N30
PCIE_GTX_C_MRX_N9
P34
PCIE_GTX_C_MRX_N10
R30
PCIE_GTX_C_MRX_N11
T34
PCIE_GTX_C_MRX_N12
U30
PCIE_GTX_C_MRX_N13
V34
PCIE_GTX_C_MRX_N14
W30
PCIE_GTX_C_MRX_N15
Y34
PCIE_GTX_C_MRX_P0
D30
PCIE_GTX_C_MRX_P1
E34
PCIE_GTX_C_MRX_P2
F30
PCIE_GTX_C_MRX_P3
G34
PCIE_GTX_C_MRX_P4
H30
PCIE_GTX_C_MRX_P5
J34
PCIE_GTX_C_MRX_P6
K30
PCIE_GTX_C_MRX_P7
L34
PCIE_GTX_C_MRX_P8
M30
PCIE_GTX_C_MRX_P9
N34
PCIE_GTX_C_MRX_P10
P30
PCIE_GTX_C_MRX_P11
R34
PCIE_GTX_C_MRX_P12
T30
PCIE_GTX_C_MRX_P13
U34
PCIE_GTX_C_MRX_P14
V30
PCIE_GTX_C_MRX_P15
W34
PCIE_MTX_GRX_N0
E32
PCIE_MTX_GRX_N1
F36
PCIE_MTX_GRX_N2
G32
PCIE_MTX_GRX_N3
H36
PCIE_MTX_GRX_N4
J32
PCIE_MTX_GRX_N5
K36
PCIE_MTX_GRX_N6
L32
PCIE_MTX_GRX_N7
M36
PCIE_MTX_GRX_N8
N32
PCIE_MTX_GRX_N9
P36
PCIE_MTX_GRX_N10
R32
PCIE_MTX_GRX_N11
T36
PCIE_MTX_GRX_N12
U32
PCIE_MTX_GRX_N13
V36
PCIE_MTX_GRX_N14
W32
PCIE_MTX_GRX_N15
Y36
PCIE_MTX_GRX_P0
D32
PCIE_MTX_GRX_P1
E36
PCIE_MTX_GRX_P2
F32
PCIE_MTX_GRX_P3
G36
PCIE_MTX_GRX_P4
H32
PCIE_MTX_GRX_P5
J36
PCIE_MTX_GRX_P6
K32
PCIE_MTX_GRX_P7
L36
PCIE_MTX_GRX_P8
M32
PCIE_MTX_GRX_P9
N36
PCIE_MTX_GRX_P10
P32
PCIE_MTX_GRX_P11
R36
PCIE_MTX_GRX_P12
T32
PCIE_MTX_GRX_P13
U36
PCIE_MTX_GRX_P14
V32
PCIE_MTX_GRX_P15
W36
PEG_COMP
1 2
R156 24.9_0402_1%
C132 0.1U_0402_16V4ZPM@
1 2
C134 0.1U_0402_16V4ZPM@
1 2
C136 0.1U_0402_16V4ZPM@
1 2
C138 0.1U_0402_16V4ZPM@
1 2
C140 0.1U_0402_16V4ZPM@
1 2
C142 0.1U_0402_16V4ZPM@
1 2
C144 0.1U_0402_16V4ZPM@
1 2
C146 0.1U_0402_16V4ZPM@
1 2
C131 0.1U_0402_16V4ZPM@
1 2
C133 0.1U_0402_16V4ZPM@
1 2
C135 0.1U_0402_16V4ZPM@
1 2
C137 0.1U_0402_16V4ZPM@
1 2
C139 0.1U_0402_16V4ZPM@
1 2
C141 0.1U_0402_16V4ZPM@
1 2
C143 0.1U_0402_16V4ZPM@
1 2
C145 0.1U_0402_16V4ZPM@
1 2
+1.5VS
C153 0.1U_0402_16V4ZPM@
1 2
C155 0.1U_0402_16V4ZPM@
1 2
C157 0.1U_0402_16V4ZPM@
1 2
C159 0.1U_0402_16V4ZPM@
1 2
C161 0.1U_0402_16V4ZPM@
1 2
C163 0.1U_0402_16V4ZPM@
1 2
C165 0.1U_0402_16V4ZPM@
1 2
C167 0.1U_0402_16V4ZPM@
1 2
C152 0.1U_0402_16V4ZPM@
1 2
C154 0.1U_0402_16V4ZPM@
1 2
C156 0.1U_0402_16V4ZPM@
1 2
C158 0.1U_0402_16V4ZPM@
1 2
C160 0.1U_0402_16V4ZPM@
1 2
C162 0.1U_0402_16V4ZPM@
1 2
C164 0.1U_0402_16V4ZPM@
1 2
C166 0.1U_0402_16V4ZPM@
1 2
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15] PCIE_GTX_C_MRX_N[0..15] PCIE_GTX_C_MRX_P[0..15]
PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_N8 PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_N13 PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_P0 PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_P3 PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_P5 PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_P7 PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_P15
+3VS
R154
4.7K_0402_5%GM@
1 2
1 2
R150
GMCH_LCD_CLK 21
ENBKL15,39
4.7K_0402_5%GM@
GMCH_LCD_DATA 21
4
+3VS +2.5VS
12
R144
2.2K_0402_5%GM@
2
1 3
D
Q8
G
LBKLT_EN
S
BSS138_SOT23GM@
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Deciphered Date
2006/03/012005/03/01
2
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
INTEL Alviso PCI-E(2/5) EAL30 LA-2691
星期
, 03, 2005
四三月
1
of
752
1.0
GM@
A A
GM@
R155
4.7K_0402_5%
LDDC_CLK
R153
4.7K_0402_5%
LDDC_DATA
G
2
1 2
1 2
5
S
+2.5VS
S
G
2
GMCH_LCD_CLK
13
D
Q10
2N7002_SOT23GM@
GMCH_LCD_DATA
13
D
Q9
2N7002_SOT23GM@
Page 8
5
D D
DDRA_SDQ[0..63]11
DDRA_SDM[0..7]11
DDRA_SDQS[0..7]11
DDRA_SMA[0..13]11 DDRB_SMA[0..13]12
DDRA_SDQ[0..63] DDRA_SDM[0..7] DDRA_SDQS[0..7] DDRA_SMA[0..13]
4
3
DDRB_SMA[0..13]
2
1
DDRA_SBS011 DDRA_SBS111
DDRA_SDM0 DDRA_SDM1 DDRA_SDM2 DDRA_SDM3 DDRA_SDM4 DDRA_SDM5 DDRA_SDM6 DDRA_SDM7
DDRA_SDQS0 DDRA_SDQS1
C C
B B
DDRA_SCAS#11 DDRA_SRAS#11
DDRA_SWE#11 DDRB_SWE#12
DDRA_SDQS2 DDRA_SDQS3 DDRA_SDQS4 DDRA_SDQS5 DDRA_SDQS6 DDRA_SDQS7
DDRA_SMA0 DDRA_SMA1 DDRA_SMA2 DDRA_SMA3 DDRA_SMA4 DDRA_SMA5 DDRA_SMA6 DDRA_SMA7 DDRA_SMA8 DDRA_SMA9 DDRA_SMA10 DDRA_SMA11 DDRA_SMA12 DDRA_SMA13 DDRB_SMA13
AK15 AK16 AL21
AJ37 AP35 AL29 AP24
AP9 AP4 AJ2 AD3
AK36 AP33 AN29 AP23
AM8 AM4
AJ1
AE5
AK35 AP34 AN30 AN23
AN8 AM5 AH1 AE4
AL17 AP17 AP18 AM17 AN18 AM18 AL19 AP20 AM19 AL20 AM16 AN20 AM20 AM15
AN15 AP16 AF29 AF28 AP15
SA_BS0# SA_BS1# SA_BS2#
SA_DM0 SA_DM1 SA_DM2 SA_DM3 SA_DM4 SA_DM5 SA_DM6 SA_DM7
SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7
SA_DQS0# SA_DQS1# SA_DQS2# SA_DQS3# SA_DQS4# SA_DQS5# SA_DQS6# SA_DQS7#
SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8 SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13
SA_CAS# SA_RAS# SA_RCVENIN# SA_RCVENOUT# SA_WE#
U44C
SADQ0 SADQ1 SADQ2 SADQ3 SADQ4 SADQ5 SADQ6 SADQ7 SADQ8
SADQ9 SADQ10 SADQ11 SADQ12 SADQ13 SADQ14 SADQ15 SADQ16 SADQ17 SADQ18 SADQ19 SADQ20 SADQ21 SADQ22 SADQ23 SADQ24 SADQ25 SADQ26 SADQ27 SADQ28 SADQ29 SADQ30 SADQ31 SADQ32 SADQ33 SADQ34 SADQ35 SADQ36 SADQ37 SADQ38 SADQ39 SADQ40 SADQ41 SADQ42 SADQ43
DDR MEMORY SYSTEM A
SADQ44 SADQ45 SADQ46 SADQ47 SADQ48 SADQ49 SADQ50 SADQ51 SADQ52 SADQ53 SADQ54 SADQ55 SADQ56 SADQ57 SADQ58 SADQ59 SADQ60 SADQ61 SADQ62 SADQ63
ALVISO_BGA1257915PM@
AG35 AH35 AL35 AL37 AH36 AJ35 AK37 AL34 AM36 AN35 AP32 AM31 AM34 AM35 AL32 AM32 AN31 AP31 AN28 AP28 AL30 AM30 AM28 AL28 AP27 AM27 AM23 AM22 AL23 AM24 AN22 AP22 AM9 AL9 AL6 AP7 AP11 AP10 AL7 AM7 AN5 AN6 AN3 AP3 AP6 AM6 AL4 AM3 AK2 AK3 AG2 AG1 AL3 AM2 AH3 AG3 AF3 AE3 AD6 AC4 AF2 AF1 AD4 AD5
DDRA_SDQ0 DDRA_SDQ1 DDRA_SDQ2 DDRA_SDQ3 DDRA_SDQ4 DDRA_SDQ5 DDRA_SDQ6 DDRA_SDQ7 DDRA_SDQ8 DDRA_SDQ9 DDRA_SDQ10 DDRA_SDQ11 DDRA_SDQ12 DDRA_SDQ13 DDRA_SDQ14 DDRA_SDQ15 DDRA_SDQ16 DDRA_SDQ17 DDRA_SDQ18 DDRA_SDQ19 DDRA_SDQ20 DDRA_SDQ21 DDRA_SDQ22 DDRA_SDQ23 DDRA_SDQ24 DDRA_SDQ25 DDRA_SDQ26 DDRA_SDQ27 DDRA_SDQ28 DDRA_SDQ29 DDRA_SDQ30 DDRA_SDQ31 DDRA_SDQ32 DDRA_SDQ33 DDRA_SDQ34 DDRA_SDQ35 DDRA_SDQ36 DDRA_SDQ37 DDRA_SDQ38 DDRA_SDQ39 DDRA_SDQ40 DDRA_SDQ41 DDRA_SDQ42 DDRA_SDQ43 DDRA_SDQ44 DDRA_SDQ45 DDRA_SDQ46 DDRA_SDQ47 DDRA_SDQ48 DDRA_SDQ49 DDRA_SDQ50 DDRA_SDQ51 DDRA_SDQ52 DDRA_SDQ53 DDRA_SDQ54 DDRA_SDQ55 DDRA_SDQ56 DDRA_SDQ57 DDRA_SDQ58 DDRA_SDQ59 DDRA_SDQ60 DDRA_SDQ61 DDRA_SDQ62 DDRA_SDQ63
DDRB_SBS012 DDRB_SBS112
DDRB_SMA0 DDRB_SMA1 DDRB_SMA2 DDRB_SMA3 DDRB_SMA4 DDRB_SMA5 DDRB_SMA6 DDRB_SMA7 DDRB_SMA8 DDRB_SMA9 DDRB_SMA10 DDRB_SMA11 DDRB_SMA12
DDRB_SCAS#12 DDRB_SRAS#12
AJ15 AG17 AG21
AF32
AK34
AK27
AK24
AJ10
AF34
AK32
AJ28
AK23 AM10
AF35
AK33
AK28
AJ23
AL10
AH17
AK17 AH18
AJ18
AK18
AJ19
AK19 AH19
AJ20 AH20
AJ16 AG18 AG20 AG15
AH14
AK14
AF15
AF14 AH16
AK5 AE7 AB7
AH6 AF8 AB4
AH7 AF7 AB5
SB_BS0# SB_BS1# SB_BS2#
SB_DM0 SB_DM1 SB_DM2 SB_DM3 SB_DM4 SB_DM5 SB_DM6 SB_DM7
SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7
SB_DQS0# SB_DQS1# SB_DQS2# SB_DQS3# SB_DQS4# SB_DQS5# SB_DQS6# SB_DQS7#
SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8 SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13
SB_CAS# SB_RAS# SB_RCVENIN# SB_RCVENOUT# SB_WE#
U44D
AE31
SBDQ0
AE32
SBDQ1
AG32
SBDQ2
AG36
SBDQ3
AE34
SBDQ4
AE33
SBDQ5
AF31
SBDQ6
AF30
SBDQ7
AH33
SBDQ8
AH32
SBDQ9
AK31
SBDQ10
AG30
SBDQ11
AG34
SBDQ12
AG33
SBDQ13
AH31
SBDQ14
AJ31
SBDQ15
AK30
SBDQ16
AJ30
SBDQ17
AH29
SBDQ18
AH28
SBDQ19
AK29
SBDQ20
AH30
SBDQ21
AH27
SBDQ22
AG28
SBDQ23
AF24
SBDQ24
AG23
SBDQ25
AJ22
SBDQ26
AK22
SBDQ27
AH24
SBDQ28
AH23
SBDQ29
AG22
SBDQ30
AJ21
SBDQ31
AG10
SBDQ32
AG9
SBDQ33
AG8
SBDQ34
AH8
SBDQ35
AH11
SBDQ36
AH10
SBDQ37
AJ9
SBDQ38
AK9
SBDQ39
AJ7
SBDQ40
AK6
SBDQ41
AJ4
SBDQ42 SBDQ43 SBDQ44 SBDQ45 SBDQ46 SBDQ47 SBDQ48 SBDQ49 SBDQ50 SBDQ51 SBDQ52 SBDQ53 SBDQ54 SBDQ55 SBDQ56 SBDQ57 SBDQ58 SBDQ59 SBDQ60 SBDQ61 SBDQ62 SBDQ63
AH5 AK8 AJ8 AJ5 AK4 AG5 AG4 AD8 AD9 AH4 AG6 AE8 AD7 AC5 AB8 AB6 AA8 AC8 AC7 AA4 AA5
DDR SYSTEM MEMORY B
ALVISO_BGA1257915PM@
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Deciphered Date
Compal Electronics, Inc.
2006/03/012005/03/01
2
Title
Size Document Number Rev
Date: Sheet
INTEL Alviso DDR(3/5) EAL30 LA-2691
星期
, 03, 2005
四三月
1
of
852
1.0
Page 9
5
4
3
2
1
+1.05VS
12
C129
22U_1206_16V4Z_V1
0.1U_0402_16V4Z
1
1
C204
2
2
VCCHV(Ball A21,B21,B22)
+1.5VS
1
C220
C218
2
0.1U_0402_16V4Z
+1.05VS
1
C130
2
2.2U_0603_6.3V6K
U44E
+1.05VS
3900mA
D D
C C
+1.5VS_DPLLA +1.5VS_DPLLB +1.5VS_HPLL +1.5VS_MPLL
+1.5VS
+1.5VS_DPLLA +1.5VS_DPLLB +1.5VS_HPLL +1.5VS_MPLL
180mA
B B
60mA
1
C208
2
22U_1206_16V4Z_V1
T29 R29
N29 M29 K29
J29 V28 U28
T28 R28 P28 N28 M28
L28 K28
J28 H28 G28 V27 U27
T27 R27 P27 N27 M27
L27 K27
J27 H27 K26 H26 K25
J25 K24 K23 K22 K21
W20
U20
T20 K20 V19 U19 K19
W18
V18
T18 K18 K17
AC1 AC2
B23 C35 AA1 AA2
L11 0_0603_5%
1 2
1
C209
2
0.1U_0402_16V4Z
VCC0 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48
VCCD_HMPLL1 VCCD_HMPLL2 VCCA_DPLLA VCCA_DPLLB VCCA_HPLL VCCA_MPLL
ALVISO_BGA1257915PM@
+1.5VS +1.5VS
POWER
+1.5VS_DPLLB+1.5VS_DPLLA
1
C235
2
22U_1206_16V4Z_V1
VCCA_TVDACA0 VCCA_TVDACA1 VCCA_TVDACB0 VCCA_TVDACB1 VCCA_TVDACC0 VCCA_TVDACC1
VCCA_TVBG VSSA_TVBG
VCCD_TVDAC
VCCDQ_TVDAC
VCCD_LVDS0 VCCD_LVDS1 VCCD_LVDS2
VCCA_LVDS
VCCTX_LVDS0 VCCTX_LVDS1 VCCTX_LVDS2
VCCA_3GPLL0 VCCA_3GPLL1 VCCA_3GPLL2
VCCA_3GBG VSSA_3GBG
VCCA_CRTDAC0 VCCA_CRTDAC1
VSSA_CRTDAC
60mA
VCCHV0 VCCHV1 VCCHV2
VCCA_SM0 VCCA_SM1 VCCA_SM2 VCCA_SM3
VCC3G0 VCC3G1 VCC3G2 VCC3G3 VCC3G4 VCC3G5 VCC3G6
VCC_SYNC
F17 E17 D18 C18 F18 E18
H18 G18
D19 H17
B26 B25 A25
A35 B22
B21 A21
B28 A28 A27
AF20 AP19 AF19 AF18
AE37 W37 U37 R37 N37 L37 J37
Y29 Y28 Y27
F37
15mA
G37 H20 F19
E19 G19
L14 0_0603_5%
1 2
1
C233
2
0.1U_0402_16V4Z
120mA
24mA
60mA
20mA 10mA
60mA
1000mA
70mA
+3VS_DAC
+1.5VS
+2.5VS
+1.5VS_DDRDLL
+1.5VS_PEG
0.47U_0603_16V4Z
+1.5VS_3GPLL
+2.5VS_3GBG
+2.5VS
0.47U_0603_16V4Z
+1.5VS_DDRDLL
+1.05VS
810mA
C715
1
2
1
C682
2
C693
0.22U_0402_10V4Z
0.22U_0402_10V4Z
1
C190
2
22U_1206_16V4Z_V1
1
2
C688
K13
J13
K12
W11
V11 U11 T11 R11 P11 N11 M11 L11 K11
W10
V10 U10 T10 R10 P10 N10 M10 K10
J10
Y9
W9
U9 R9 P9 N9 M9
L9
J9 N8 M8 N7 M7 N6 M6 A6 N5 M5 N4 M4 N3 M3 N2 M2 B2 V1 N1 M1 G1
1
2
R129 0_0603_5%
1 2
1
C196
2
0.1U_0402_16V4Z
U44F
VTT0 VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9 VTT10 VTT11 VTT12 VTT13 VTT14 VTT15 VTT16 VTT17 VTT18 VTT19 VTT20 VTT21 VTT22 VTT23 VTT24 VTT25 VTT26 VTT27 VTT28 VTT29 VTT30 VTT31 VTT32 VTT33 VTT34 VTT35 VTT36 VTT37 VTT38 VTT39 VTT40 VTT41 VTT42 VTT43 VTT44 VTT45 VTT46 VTT47 VTT48 VTT49 VTT50 VTT51
ALVISO_BGA1257915PM@
POWER
+1.5VS_PEG
+1.5VS
1
2
VCCSM0 VCCSM1 VCCSM2 VCCSM3 VCCSM4 VCCSM5 VCCSM6 VCCSM7 VCCSM8
VCCSM9 VCCSM10 VCCSM11 VCCSM12 VCCSM13 VCCSM14 VCCSM15 VCCSM16 VCCSM17 VCCSM18 VCCSM19 VCCSM20 VCCSM21 VCCSM22 VCCSM23 VCCSM24 VCCSM25 VCCSM26 VCCSM27 VCCSM28 VCCSM29 VCCSM30 VCCSM31 VCCSM32 VCCSM33 VCCSM34 VCCSM35 VCCSM36 VCCSM37 VCCSM38 VCCSM39 VCCSM40 VCCSM41 VCCSM42 VCCSM43 VCCSM44 VCCSM45 VCCSM46 VCCSM47 VCCSM48 VCCSM49 VCCSM50 VCCSM51 VCCSM52 VCCSM53 VCCSM54 VCCSM55 VCCSM56 VCCSM57 VCCSM58 VCCSM59 VCCSM60 VCCSM61 VCCSM62 VCCSM63 VCCSM64
C243
22U_1206_16V4Z_V1
AM37 AH37 AP29 AD28 AD27 AC27 AP26 AN26 AM26 AL26 AK26 AJ26 AH26 AG26 AF26 AE26 AP25 AN25 AM25 AL25 AK25 AJ25 AH25 AG25 AF25 AE25 AE24 AE23 AE22 AE21 AE20 AE19 AE18 AE17 AE16 AE15 AE14 AP13 AN13 AM13 AL13 AK13 AJ13 AH13 AG13 AF13 AE13 AP12 AN12 AM12 AL12 AK12 AJ12 AH12 AG12 AF12 AE12 AD11 AC11 AB11 AB10 AB9
V1.8_DDR_CAP6
AP8
V1.8_DDR_CAP4
AM1
V1.8_DDR_CAP3
AE1
1
C242
2
4.7U_0805_10V4Z
V1.8_DDR_CAP1 V1.8_DDR_CAP2 V1.8_DDR_CAP5
C238
0.1U_0402_16V4Z
+2.5V
2200mA
+2.5V
C745
330U_D2E_2.5VM
VCCA_LVDS (Ball A35)
VCC_SYNC(Ball H20)
C127
0.1U_0402_16V4Z
12
0.1U_0402_16V4Z
1
C244
2
4.7U_0805_10V4Z
12
2200mA
0.1U_0402_16V4Z
1
+
C128
2
+2.5VS
1
C231
2
0.1U_0402_16V4Z
+2.5VS
1
C189
2
4.7U_0805_10V4Z
C120
0.1U_0402_16V4Z
12
12
C689
R160 0_0805_5%
1 2
C237
0.1U_0402_16V4Z
12
C227
0.1U_0402_16V4Z
1
C168
2
0.1U_0402_16V4Z
1
C232
2
0.01U_0402_16V7K
1
C194
2
0.1U_0402_16V4Z
4.7U_0805_10V4Z
+1.5VS
1
+
C234
2
470U_D2_2.5VM
2.2U_0603_6.3V6K
1
C212
2
1
C213
2
0.1U_0402_16V4Z
1
C202
2
4.7U_0805_10V4Z
4000mA
1
2
0.1U_0402_16V4Z
C222
0.1U_0402_16V4Z
1
C214
2
2.2U_0603_6.3V6K
1
C180
2
0.1U_0402_16V4Z
1
C206
2
0.1U_0402_16V4Z
C126
VCCA_CRTDAC(Ball F19,E19)
1
C200
2
0.1U_0402_16V4Z
1
2
1
C205
2
0.022U_0402_16V7K
VCCD_TVDAC (Ball D19)
0.1U_0402_16V4Z
1
C184
C185
2
0.022U_0402_16V7K
1
2
950mA
1
C170
2
2.2U_0603_6.3V6K
1
2
0.1U_0402_16V4Z
1
1
1
C224
C179
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C217
2
1
C225
2
4.7U_0805_10V4Z
C147
2
0.1U_0402_16V4Z
1
2
1
C223
2
0.1U_0402_16V4Z
VCCTX_LVDS(Ball A27,A28,B28)
0.1U_0402_16V4Z
1
1
C181
C178
2
2
0.022U_0402_16V7K
VCCDQ_TVDAC (Ball H17)VCCD_LVDS(Ball A25,B25,B26)
1
C198
2.2U_0603_6.3V6K
C173
2
2.2U_0603_6.3V6K
VCCA_TVDAC
L38
C855
CHB1608U301_0603
1 2
1
+
2
4.7U_0805_10V4Z 22U_1206_16V4Z_V1
+1.5VS_HPLL
A A
60mA
1
C690
2
22U_1206_16V4Z_V1
L27 0_0603_5%
1 2
1
C692
2
0.1U_0402_16V4Z
+1.5VS_MPLL +1.5VS_3GPLL
+1.5VS
60mA
1
C112
2
22U_1206_16V4Z_V1
L7 0_0603_5%
1 2
1
C114
2
0.1U_0402_16V4Z
+1.5VS
1
C221
2
10U_1206_16V4Z
R145
0.5_0603_1%
1 2
1
C226
2
0.1U_0402_16V4Z
+3GPLL
L13 0_0603_5%
1 2
+1.5VS
+2.5VS_3GBG
1
2
1 2
R159 0_0603_5%
C241
0.1U_0402_16V4Z
+2.5VS
+3VS
150U_D2_6.3VM
+3VS_DAC
C856
1
2
C857
1
C177
2
0.1U_0402_16V4Z
1
2
1
2
VCCA_TVBG (Ball H18)
C188
0.022U_0402_16V7K
1
C187
2
0.1U_0402_16V4Z
1
C195
2
0.022U_0402_16V7K
120mA
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Deciphered Date
Compal Electronics, Inc.
2006/03/012005/03/01
2
Title
Size Document Number Rev
Date: Sheet
INTEL Alviso POWER(4/5) EAL30 LA-2691
星期
, 03, 2005
四三月
1
of
952
1.0
Page 10
5
4
3
2
1
U44H
+1.05VS
D D
C C
B B
+1.05VS
A A
L12
VTT_NCTF17
M12
VTT_NCTF16
N12
VTT_NCTF15
P12
VTT_NCTF14
R12
VTT_NCTF13
T12
VTT_NCTF12
U12
VTT_NCTF11
V12
VTT_NCTF10
W12
VTT_NCTF9
L13
VTT_NCTF8
M13
VTT_NCTF7
N13
VTT_NCTF6
P13
VTT_NCTF5
R13
VTT_NCTF4
T13
VTT_NCTF3
U13
VTT_NCTF2
V13
VTT_NCTF1
W13
VTT_NCTF0
Y12
VSS_NCTF68
AA12
VSS_NCTF67
Y13
VSS_NCTF66
AA13
VSS_NCTF65
L14
VSS_NCTF64
M14
VSS_NCTF63
N14
VSS_NCTF62
P14
VSS_NCTF61
R14
VSS_NCTF60
T14
VSS_NCTF59
U14
VSS_NCTF58
V14
VSS_NCTF57
W14
VSS_NCTF56
Y14
VSS_NCTF55
AA14
VSS_NCTF54
AB14
VSS_NCTF53
L15
VSS_NCTF52
M15
VSS_NCTF51
N15
VSS_NCTF50
P15
VSS_NCTF49
R15
VSS_NCTF48
T15
VSS_NCTF47
U15
VSS_NCTF46
V15
VSS_NCTF45
W15
VSS_NCTF44
Y15
VSS_NCTF43
AA15
VSS_NCTF42
AB15
VSS_NCTF41
L16
VSS_NCTF40
M16
VSS_NCTF39
N16
VSS_NCTF38
P16
VSS_NCTF37
R16
VSS_NCTF36
T16
VSS_NCTF35
U16
VSS_NCTF34
V16
VSS_NCTF33
W16
VSS_NCTF32
Y16
VSS_NCTF31
AA16
VSS_NCTF30
AB16
VSS_NCTF29
R17
VSS_NCTF28
Y17
VSS_NCTF27
AA17
VSS_NCTF26
AB17
VSS_NCTF25
AA18
VSS_NCTF24
AB18
VSS_NCTF23
AA19
VSS_NCTF22
AB19
VSS_NCTF21
AA20
VSS_NCTF20
AB20
VSS_NCTF19
R21
VSS_NCTF18
Y21
VSS_NCTF17
AA21
VSS_NCTF16
AB21
VSS_NCTF15
Y22
VSS_NCTF14
AA22
VSS_NCTF13
AB22
VSS_NCTF12
Y23
VSS_NCTF11
AA23
VSS_NCTF10
AB23
VSS_NCTF9
Y24
VSS_NCTF8
AA24
VSS_NCTF7
AB24
VSS_NCTF6
Y25
VSS_NCTF5
AA25
VSS_NCTF4
AB25
VSS_NCTF3
Y26
VSS_NCTF2
AA26
VSS_NCTF1
AB26
VSS_NCTF0
V25
VCC_NCTF10
W25
VCC_NCTF9
L26
VCC_NCTF8
M26
VCC_NCTF7
N26
VCC_NCTF6
P26
VCC_NCTF5
R26
VCC_NCTF4
T26
VCC_NCTF3
U26
VCC_NCTF2
V26
VCC_NCTF1
W26
VCC_NCTF0
ALVISO_BGA1257915PM@
5
VCCSM_NCTF31 VCCSM_NCTF30 VCCSM_NCTF29 VCCSM_NCTF28 VCCSM_NCTF27 VCCSM_NCTF26 VCCSM_NCTF25 VCCSM_NCTF24 VCCSM_NCTF23 VCCSM_NCTF22 VCCSM_NCTF21 VCCSM_NCTF20 VCCSM_NCTF19 VCCSM_NCTF18 VCCSM_NCTF17 VCCSM_NCTF16 VCCSM_NCTF15 VCCSM_NCTF14 VCCSM_NCTF13 VCCSM_NCTF12 VCCSM_NCTF11 VCCSM_NCTF10
VCCSM_NCTF9 VCCSM_NCTF8 VCCSM_NCTF7 VCCSM_NCTF6 VCCSM_NCTF5 VCCSM_NCTF4 VCCSM_NCTF3 VCCSM_NCTF2 VCCSM_NCTF1 VCCSM_NCTF0
VCC_NCTF78 VCC_NCTF77 VCC_NCTF76 VCC_NCTF75 VCC_NCTF74 VCC_NCTF73 VCC_NCTF72 VCC_NCTF71 VCC_NCTF70
NCTF
VCC_NCTF69 VCC_NCTF68 VCC_NCTF67 VCC_NCTF66 VCC_NCTF65 VCC_NCTF64 VCC_NCTF63 VCC_NCTF62 VCC_NCTF61 VCC_NCTF60 VCC_NCTF59 VCC_NCTF58 VCC_NCTF57 VCC_NCTF56 VCC_NCTF55 VCC_NCTF54 VCC_NCTF53 VCC_NCTF52 VCC_NCTF51 VCC_NCTF50 VCC_NCTF49 VCC_NCTF48 VCC_NCTF47 VCC_NCTF46 VCC_NCTF45 VCC_NCTF44 VCC_NCTF43 VCC_NCTF42 VCC_NCTF41 VCC_NCTF40 VCC_NCTF39 VCC_NCTF38 VCC_NCTF37 VCC_NCTF36 VCC_NCTF35 VCC_NCTF34 VCC_NCTF33 VCC_NCTF32 VCC_NCTF31 VCC_NCTF30 VCC_NCTF29 VCC_NCTF28 VCC_NCTF27 VCC_NCTF26 VCC_NCTF25 VCC_NCTF24 VCC_NCTF23 VCC_NCTF22 VCC_NCTF21 VCC_NCTF20 VCC_NCTF19 VCC_NCTF18 VCC_NCTF17 VCC_NCTF16 VCC_NCTF15 VCC_NCTF14 VCC_NCTF13 VCC_NCTF12 VCC_NCTF11
AB12 AC12 AD12 AB13 AC13 AD13 AC14 AD14 AC15 AD15 AC16 AD16 AC17 AD17 AC18 AD18 AC19 AD19 AC20 AD20 AC21 AD21 AC22 AD22 AC23 AD23 AC24 AD24 AC25 AD25 AC26 AD26
L17 M17 N17 P17 T17 U17 V17 W17 L18 M18 N18 P18 R18 Y18 L19 M19 N19 P19 R19 Y19 L20 M20 N20 P20 R20 Y20 L21 M21 N21 P21 T21 U21 V21 W21 L22 M22 N22 P22 R22 T22 U22 V22 W22 L23 M23 N23 P23 R23 T23 U23 V23 W23 L24 M24 N24 P24 R24 T24 U24 V24 W24 L25 M25 N25 P25 R25 T25 U25
+2.5V
+1.05VS
4
U44I
Y1
VSS271
D2
VSS270
G2
VSS269
J2
VSS268
L2
VSS260
P2
VSS259
T2
VSS258
V2
VSS257
AD2
VSS256
AE2
VSS255
AH2
VSS254
AL2
VSS253
AN2
VSS252 VSS251 VSS250 VSS249 VSS248 VSS247 VSS246 VSS245 VSS244 VSS243 VSS242 VSS241 VSS240 VSS239 VSS238 VSS237 VSS236 VSS235 VSS234 VSS233 VSS232 VSS231 VSS230 VSS229 VSS228 VSS227 VSS226 VSS225 VSS224 VSS223 VSS222 VSS221 VSS220 VSS219 VSS218 VSS217 VSS216 VSS215 VSS214 VSS213 VSS212 VSS211 VSS210 VSS209 VSS208 VSS207 VSS206 VSS205 VSS204 VSS203 VSS202 VSS201 VSS200 VSS199 VSS198 VSS197 VSS196
VSS
AA3 AB3 AC3
AF4 AN4
AP5
AA6 AC6 AE6
AA7 AG7 AK7 AN7
AA9 AC9 AE9 AH9 AN9 D10
AA10
H11
A3
C3
AJ3
C4 H4
L4 P4
U4
Y4
E5 W5 AL5
B6
J6
L6
P6
T6
AJ6
G7
V7
C8
E8
L8
P8
Y8 AL8
A9
H9
K9
T9
V9
L10 Y10
F11 Y11
ALVISO_BGA1257915PM@
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
VSSALVDS
VSS195 VSS194 VSS193 VSS192 VSS191 VSS190 VSS189 VSS188 VSS187 VSS186 VSS185 VSS184 VSS183 VSS182 VSS181 VSS180 VSS179 VSS178 VSS177 VSS176 VSS175 VSS174 VSS173 VSS172 VSS171 VSS170 VSS169 VSS168 VSS167 VSS166 VSS165 VSS164 VSS163 VSS162 VSS161 VSS160 VSS159 VSS158 VSS157 VSS156 VSS155 VSS154 VSS153 VSS152 VSS151 VSS150 VSS149 VSS148 VSS147 VSS146 VSS145 VSS144 VSS143 VSS142 VSS141 VSS140 VSS139 VSS138 VSS137 VSS136 VSS135 VSS134 VSS133 VSS132 VSS131 VSS130
B36 AA11
AF11 AG11 AJ11 AL11 AN11 B12 D12 J12 A14 B14 F14 J14 K14 AG14 AJ14 AL14 AN14 C15 K15 A16 D16 H16 K16 AL16 C17 G17 AF17 AJ17 AN17 A18 B18 U18 AL18 C19 H19 J19 T19 W19 AG19 AN19 A20 D20 E20 F20 G20 V20 AK20 C21 F21 AF21 AN21 A22 D22 E22 J22 AH22 AL22 H23 AF23 B24 D24 F24 J24 AG24 AJ24
Compal Secret Data
Deciphered Date
AL24
AN24
A26 E26 G26
B27 E27 G27
W27 AA27 AB27 AF27 AG27
AJ27 AL27
AN27
E28
W28 AA28 AB28 AC28
A29 D29 E29
G29 H29
P29 U29 V29
W29 AA29 AD29 AG29
AJ29
AM29
C30
Y30 AA30 AB30 AC30 AE30 AP30
D31
E31
G31
H31
K31
M31
N31
P31
R31
U31
V31
W31 AD31 AG31
AL31
A32 C32
Y32 AA32 AB32
2
U44J
VSS267 VSS266 VSS265 VSS264 VSS263
J26
VSS262 VSS261 VSS129 VSS128 VSS127 VSS126 VSS125
VSS
VSS124 VSS123 VSS122 VSS121 VSS120 VSS119 VSS118 VSS117 VSS116 VSS115 VSS114 VSS113 VSS112
F29
VSS111 VSS110 VSS109
L29
VSS108 VSS107 VSS106 VSS105 VSS104 VSS103 VSS102 VSS101 VSS100 VSS99 VSS98 VSS97 VSS96 VSS95 VSS94 VSS93 VSS92 VSS91 VSS90
F31
VSS89 VSS88 VSS87
J31
VSS86 VSS85
L31
VSS84 VSS83 VSS82 VSS81 VSS80
T31
VSS79 VSS78 VSS77 VSS76 VSS75 VSS74 VSS73 VSS72 VSS71 VSS70 VSS69 VSS68
ALVISO_BGA1257915PM@
Title
Size Document Number Rev
星期
Date: Sheet
AC32
VSS67
AD32
VSS66
AJ32
VSS65
AN32
VSS64
D33
VSS63
E33
VSS62
F33
VSS61
G33
VSS60
H33
VSS59
J33
VSS58
K33
VSS57
L33
VSS56
M33
VSS55
N33
VSS54
P33
VSS53
R33
VSS52
T33
VSS51
U33
VSS50
V33
VSS49
W33
VSS48
AD33
VSS47
AF33
VSS46
AL33
VSS45
C34
VSS44
AA34
VSS43
AB34
VSS42
AC34
VSS41
AD34
VSS40
AH34
VSS39
AN34
VSS38
B35
VSS37
D35
VSS36
E35
VSS35
F35
VSS34
G35
VSS33
H35
VSS32
J35
VSS31
K35
VSS30
L35
VSS29
M35
VSS28
N35
VSS27
P35
VSS26
R35
VSS25
T35
VSS24
U35
VSS23
V35
VSS22
W35
VSS21
Y35
VSS20
AE35
VSS19
C36
VSS18
AA36
VSS17
AB36
VSS16
AC36
VSS15
AD36
VSS14
AE36
VSS13
AF36
VSS12
AJ36
VSS11
AL36
VSS10
AN36
VSS9
E37
VSS8
H37
VSS7
K37
VSS6
M37
VSS5
P37
VSS4
T37
VSS3
V37
VSS2
Y37
VSS1
AG37
VSS0
Compal Electronics, Inc.
INTEL Alviso POWER(5/5) EAL30 LA-2691
, 03, 2005
四三月
1
of
10 52
1.0
Page 11
5
4
3
2
1
+2.5V
DDRA_DQ1
D D
DDRA_CLK16 DDRA_CLK1#6
C C
DDRA_CKE16
DDRA_SBS08 DDRA_SWE#8 DDRA_SCS#06 DDRA_SCS#1 6
B B
A A
D_CK_SDATA12,14 D_CK_SCLK12,14
DDRA_DQ5 DDRA_DQS0
DDRA_DQ7 DDRA_DQ3
DDRA_DQ13 DDRA_DQ9
DDRA_DQS1 DDRA_DQ15
DDRA_DQ11
DDRA_DQ16 DDRA_DQ20
DDRA_DQS2 DDRA_DQ18
DDRA_DQ22 DDRA_DQ25
DDRA_DQ29 DDRA_DQS3
DDRA_DQ27 DDRA_DQ30
DDRA_CKE1 DDRA_SMA12
DDRA_SMA9 DDRA_SMA7
DDRA_SMA5 DDRA_SMA3 DDRA_SMA1
DDRA_SMA10 DDRA_SBS0 DDRA_SWE#
DDRA_SMA13 DDRA_DQ36
DDRA_DQ33 DDRA_DQS4
DDRA_DQ38 DDRA_DQ35
DDRA_DQ41 DDRA_DQ44
DDRA_DQS5 DDRA_DQ46
DDRA_DQ47
DDRA_DQ52 DDRA_DQ53
DDRA_DQS6 DDRA_DQ54
DDRA_DQ50 DDRA_DQ60
DDRA_DQ56 DDRA_DQS7
DDRA_DQ57 DDRA_DQ62
D_CK_SDATA D_CK_SCLK
5
+3VS
JP25
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
AMP_1565917-1
DIMM0
VREF
VDD
DQ12
VDD
DQ13
DQ14 DQ15
VDD VDD
DQ20 DQ21
VDD DQ22 DQ23
DQ28
VDD DQ29
DQ30 DQ31
VDD
VDD
DU/RESET#
VDD
VDD
CKE0
DU/BA2
VDD
RAS# CAS#
DQ36 DQ37
VDD DQ38 DQ39
DQ44
VDD DQ45
DQ46 DQ47
VDD CK1#
DQ52 DQ53
VDD DQ54 DQ55
DQ60
VDD DQ61
DQ62 DQ63
VDD
VSS DQ4 DQ5
DM0 DQ6 VSS DQ7
DM1 VSS
VSS VSS
DM2 VSS
DM3 VSS
CB4 CB5 VSS DM8 CB6
CB7 VSS
VSS
VSS
BA1
VSS
DM4 VSS
DM5 VSS
CK1 VSS
DM6 VSS
DM7 VSS
SA0 SA1 SA2
A11
A8 A6
A4 A2 A0
S1#
DU
DU
+2.5V +2.5V
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
4
DDRA_DQ0 DDRA_DQ4
DDRA_DM0 DDRA_DQ6
DDRA_DQ2 DDRA_DQ8
DDRA_DQ12 DDRA_DM1
DDRA_DQ14 DDRA_DQ10
DDRA_DQ17 DDRA_DQ21
DDRA_DM2 DDRA_DQ19
DDRA_DQ23 DDRA_DQ24
DDRA_DQ28 DDRA_DM3
DDRA_DQ26 DDRA_DQ31
DDRA_CKE0 DDRA_SMA11
DDRA_SMA8 DDRA_SMA6
DDRA_SMA4 DDRA_SMA2 DDRA_SMA0
DDRA_SBS1 DDRA_SRAS# DDRA_SCAS# DDRA_SCS#1DDRA_SCS#0
DDRA_DQ37 DDRA_DQ32
DDRA_DM4 DDRA_DQ39
DDRA_DQ34 DDRA_DQ45
DDRA_DQ40 DDRA_DM5
DDRA_DQ42 DDRA_DQ43
DDRA_DQ49 DDRA_DQ48
DDRA_DM6 DDRA_DQ55
DDRA_DQ51 DDRA_DQ61
DDRA_DQ58 DDRA_DM7
DDRA_DQ63 DDRA_DQ59
+DIMM_VREF
1
2
C250
0.1U_0402_16V4Z
RP35
10_0404_4P2R_5%
RP34
10_0404_4P2R_5%
RP33
10_0404_4P2R_5%
RP32
10_0404_4P2R_5%
RP31
10_0404_4P2R_5%
RP30
10_0404_4P2R_5%
RP29
10_0404_4P2R_5%
RP28
10_0404_4P2R_5%
RP27
10_0404_4P2R_5%
RP26
10_0404_4P2R_5%
RP15
10_0404_4P2R_5%
RP14
10_0404_4P2R_5%
RP13
10_0404_4P2R_5%
RP12
10_0404_4P2R_5%
RP11
10_0404_4P2R_5%
RP10
10_0404_4P2R_5%
RP9
10_0404_4P2R_5%
RP8
10_0404_4P2R_5%
RP7
10_0404_4P2R_5%
RP6
10_0404_4P2R_5%
DDRA_DQ0
14
DDRA_DQ4
23
DDRA_DM0DDRA_SDM0
14
DDRA_DQ6
23
DDRA_DQ2
14
DDRA_DQ8DDRA_SDQ8
23
DDRA_DQ12
14
DDRA_DM1
23
DDRA_DQ14
14
DDRA_DQ10
23
DDRA_DQ17
14
DDRA_DQ21
23
DDRA_DM2
14
DDRA_DQ19
23
DDRA_DQ23DDRA_SDQ23
14
DDRA_DQ24
23
DDRA_DQ28
14
DDRA_DM3
23
DDRA_DQ26
14
DDRA_DQ31DDRA_SDQ31
23
DDRA_DQ37
14
DDRA_DQ32
23
DDRA_DM4
14
DDRA_DQ39
23
DDRA_DQ34
14
DDRA_DQ45
23
DDRA_DQ40
14
DDRA_DM5
23
DDRA_DQ42
14
DDRA_DQ43
23
DDRA_DQ49
14
DDRA_DQ48
23
DDRA_DM6
14
DDRA_DQ55
23
DDRA_DQ51
14
DDRA_DQ61
23
DDRA_DQ58
14
DDRA_DM7
23
DDRA_DQ63
14
DDRA_DQ59
23
Compal Secret Data
12
R168
1K_0402_1%
12
R170
1K_0402_1%
DDRA_CKE0 6
DDRA_SBS1 8 DDRA_SRAS# 8 DDRA_SCAS# 8
DDRA_CLK2# 6 DDRA_CLK2 6
Security Classification
DDRA_SDQ0 DDRA_SDQ4
DDRA_SDQ6
DDRA_SDQ2
DDRA_SDQ12 DDRA_SDM1
DDRA_SDQ14 DDRA_SDQ10
DDRA_SDQ17 DDRA_SDQ21
DDRA_SDM2 DDRA_SDQ19
DDRA_SDQ24
DDRA_SDQ28 DDRA_SDM3
DDRA_SDQ26
DDRA_SDQ37 DDRA_SDQ32
DDRA_SDM4 DDRA_SDQ39
DDRA_SDQ34 DDRA_SDQ45
DDRA_SDQ40 DDRA_SDM5
DDRA_SDQ42 DDRA_SDQ43
DDRA_SDQ49 DDRA_SDQ48
DDRA_SDM6 DDRA_SDQ55
DDRA_SDQ51 DDRA_SDQ61
DDRA_SDQ58 DDRA_SDM7
DDRA_SDQ63 DDRA_SDQ59
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
DDRA_SDQ1 DDRA_SDQ5
DDRA_SDQS0 DDRA_SDQ7
DDRA_SDQ3 DDRA_SDQ13
DDRA_SDQ9 DDRA_SDQS1
DDRA_SDQ15 DDRA_SDQ11
DDRA_SDQ16 DDRA_SDQ20
DDRA_SDQS2 DDRA_SDQ18
DDRA_SDQ22 DDRA_SDQ25
DDRA_SDQ29 DDRA_SDQS3
DDRA_SDQ27 DDRA_SDQ30
DDRA_SDQ36 DDRA_SDQ33
DDRA_SDQS4 DDRA_SDQ38
DDRA_SDQ35 DDRA_SDQ41
DDRA_SDQ44 DDRA_SDQS5
DDRA_SDQ46 DDRA_SDQ47
DDRA_SDQ52 DDRA_SDQ53
DDRA_SDQS6 DDRA_SDQ54
DDRA_SDQ50 DDRA_SDQ60
DDRA_SDQ56 DDRA_SDQS7
DDRA_SDQ57 DDRA_SDQ62
Deciphered Date
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
RP118
DDRA_DQ1 DDRA_DQ5
10_0404_4P2R_5%
RP115
DDRA_DQS0 DDRA_DQ7
10_0404_4P2R_5%
RP112
DDRA_DQ3 DDRA_DQ13
10_0404_4P2R_5%
RP109
DDRA_DQ9 DDRA_DQS1
10_0404_4P2R_5%
RP106
DDRA_DQ15 DDRA_DQ11
10_0404_4P2R_5%
RP102
DDRA_DQ16 DDRA_DQ20
10_0404_4P2R_5%
RP99
DDRA_DQS2 DDRA_DQ18
10_0404_4P2R_5%
RP97
DDRA_DQ22 DDRA_DQ25
10_0404_4P2R_5%
RP94
DDRA_DQ29 DDRA_DQS3
10_0404_4P2R_5%
RP91
DDRA_DQ27 DDRA_DQ30
10_0404_4P2R_5%
RP77
DDRA_DQ36 DDRA_DQ33
10_0404_4P2R_5%
RP74
DDRA_DQS4 DDRA_DQ38
10_0404_4P2R_5%
RP72
DDRA_DQ35 DDRA_DQ41
10_0404_4P2R_5%
RP69
DDRA_DQ44 DDRA_DQS5
10_0404_4P2R_5%
RP66
DDRA_DQ46 DDRA_DQ47
10_0404_4P2R_5%
RP62
DDRA_DQ52 DDRA_DQ53
10_0404_4P2R_5%
RP60
DDRA_DQS6 DDRA_DQ54
10_0404_4P2R_5%
RP57
DDRA_DQ50 DDRA_DQ60
10_0404_4P2R_5%
RP54
DDRA_DQ56 DDRA_DQS7
10_0404_4P2R_5%
RP51
DDRA_DQ57 DDRA_DQ62
10_0404_4P2R_5%
2006/03/012005/03/01
2
+1.25VS
DDRA_SMA11 DDRA_SMA8
DDRA_SMA6 DDRA_SMA4
DDRA_SMA2 DDRA_SMA0
DDRA_SBS1 DDRA_SRAS#
DDRA_SCAS# DDRA_SCS#1
DDRA_SMA12 DDRA_SMA9
DDRA_SMA7 DDRA_SMA5
DDRA_SMA3 DDRA_SMA1
DDRA_SMA10 DDRA_SBS0
DDRA_SWE# DDRA_SCS#0
DDRA_SMA13 DDRA_CKE1 DDRA_CKE0
DDRA_DQ[0..63] DDRA_DM[0..7] DDRA_DQS[0..7]
DDRA_SDQ[0..63]8
DDRA_SDM[0..7]8
DDRA_SDQS[0..7]8
DDRA_SMA[0..13]8
Title
Size Document Number Rev
星期
, 03, 2005
四三月
Date: Sheet
RP87
1 4 2 3
56_0404_4P2R_5%
RP86
1 4 2 3
56_0404_4P2R_5%
RP84
1 4 2 3
56_0404_4P2R_5%
RP82
1 4 2 3
56_0404_4P2R_5%
RP80
1 4 2 3
56_0404_4P2R_5%
RP24
2 3 1 4
56_0404_4P2R_5%
RP22
2 3 1 4
56_0404_4P2R_5%
RP20
2 3 1 4
56_0404_4P2R_5%
RP18
2 3 1 4
56_0404_4P2R_5%
RP16
2 3 1 4
56_0404_4P2R_5%
1 2
R112 56_0402_5%
1 2
R138 56_0402_5%
1 2
R544 56_0402_5%
DDRA_DQ[0..63] 12 DDRA_DM[0..7] 12 DDRA_DQS[0..7] 12
DDRA_SDQ[0..63] DDRA_SDM[0..7] DDRA_SDQS[0..7] DDRA_SMA[0..13]
Compal Electronics, Inc.
DDR-SODIMM0
EAL30 LA-2691
1
11 52
of
1.0
Page 12
5
4
3
2
1
+2.5V
+1.25VS
+1.25VS
56_0404_4P2R_5%
56_0404_4P2R_5%
56_0404_4P2R_5%
56_0404_4P2R_5%
56_0404_4P2R_5%
56_0404_4P2R_5%
56_0404_4P2R_5%
56_0404_4P2R_5%
DDRA_DQ[0..63]11
DDRA_DM[0..7]11
DDRA_DQS[0..7]11
DDRB_SMA[0..13]8
12
R29456_0402_5%
12
R54556_0402_5%
12
R13656_0402_5%
RP58
14 23
RP55
14 23
RP52
14 23
RP49
14 23
14 23
RP59
14 23
RP56
14 23
RP53
14 23
RP50
DDRA_DQ0 DDRA_DQ4
D D
C C
B B
A A
DDRA_DM0 DDRA_DQ6
DDRA_DQ2 DDRA_DQ8
DDRA_DQ12 DDRA_DM1
DDRA_DQ14 DDRA_DQ10
DDRA_DQ17 DDRA_DQ21
DDRA_DM2 DDRA_DQ19
DDRA_DQ23 DDRA_DQ24
DDRA_DQ28 DDRA_DM3
DDRA_DQ26 DDRA_DQ31
DDRB_SMA11 DDRB_SMA8
DDRB_SMA6 DDRB_SMA4
DDRB_SMA2 DDRB_SMA0
DDRB_SBS1 DDRB_SRAS#
DDRB_SCAS# DDRB_SCS#1
DDRA_DQ37 DDRA_DQ32
DDRA_DM4 DDRA_DQ39
DDRA_DQ34 DDRA_DQ45
DDRA_DQ40 DDRA_DM5
DDRA_DQ42 DDRA_DQ43
DDRA_DQ49 DDRA_DQ48
RP117
1 4 2 3
56_0404_4P2R_5%
RP114
1 4 2 3
56_0404_4P2R_5%
RP111
1 4 2 3
56_0404_4P2R_5%
RP108
1 4 2 3
56_0404_4P2R_5%
RP105
1 4 2 3
56_0404_4P2R_5%
RP101
1 4 2 3
56_0404_4P2R_5%
RP98
1 4 2 3
56_0404_4P2R_5%
RP95
1 4 2 3
56_0404_4P2R_5%
RP92
1 4 2 3
56_0404_4P2R_5%
RP89
1 4 2 3
56_0404_4P2R_5%
RP25
1 4 2 3
56_0404_4P2R_5%
RP23
1 4 2 3
56_0404_4P2R_5%
RP21
1 4 2 3
56_0404_4P2R_5%
RP19
1 4 2 3
56_0404_4P2R_5%
RP17
1 4 2 3
56_0404_4P2R_5%
RP76
1 4 2 3
56_0404_4P2R_5%
RP73
1 4 2 3
56_0404_4P2R_5%
RP70
1 4 2 3
56_0404_4P2R_5%
RP67
1 4 2 3
56_0404_4P2R_5%
RP64
1 4 2 3
56_0404_4P2R_5%
RP61
1 4 2 3
56_0404_4P2R_5%
56_0404_4P2R_5%
RP116
56_0404_4P2R_5%
RP113
56_0404_4P2R_5%
RP110
56_0404_4P2R_5%
RP107
56_0404_4P2R_5%
RP104
56_0404_4P2R_5%
RP103
56_0404_4P2R_5%
RP100
56_0404_4P2R_5%
RP96
56_0404_4P2R_5%
RP93
56_0404_4P2R_5%
RP90
56_0404_4P2R_5%
RP88
56_0404_4P2R_5%
RP85
56_0404_4P2R_5%
RP83
56_0404_4P2R_5%
RP81
56_0404_4P2R_5%
RP79
56_0404_4P2R_5%
RP78
56_0404_4P2R_5%
RP75
56_0404_4P2R_5%
RP71
56_0404_4P2R_5%
RP68
56_0404_4P2R_5%
RP65
56_0404_4P2R_5%
RP63
14 23
14 23
14 23
14 23
14 23
14 23
14 23
14 23
14 23
14 23
14 23
14 23
14 23
14 23
14 23
14 23
14 23
14 23
14 23
14 23
14 23
DDRA_DQ1 DDRA_DQ5
DDRA_DQS0 DDRA_DQ7
DDRA_DQ3 DDRA_DQ13
DDRA_DQ9 DDRA_DQS1
DDRA_DQ15 DDRA_DQ11
DDRA_DQ16 DDRA_DQ20
DDRA_DQS2 DDRA_DQ18
DDRA_DQ22 DDRA_DQ25
DDRA_DQ29 DDRA_DQS3
DDRA_DQ27 DDRA_DQ30
DDRB_SMA12 DDRB_SMA9
DDRB_SMA7 DDRB_SMA5
DDRB_SMA3 DDRB_SMA1
DDRB_SBS0 DDRB_SWE#
DDRB_SCS#0 DDRB_SMA13
DDRA_DQ36 DDRA_DQ33
DDRA_DQS4 DDRA_DQ38
DDRA_DQ35 DDRA_DQ41
DDRA_DQ44 DDRA_DQS5
DDRA_DQ46 DDRA_DQ47
DDRA_DQ52 DDRA_DQ53
DDRB_SMA10 DDRB_CKE1 DDRB_CKE0
DDRA_DM6 DDRA_DQ55
DDRA_DQ51 DDRA_DQ61
DDRA_DQ58 DDRA_DM7
DDRA_DQ63 DDRA_DQ59
DDRA_DQS6 DDRA_DQ54
DDRA_DQ50 DDRA_DQ60
DDRA_DQ56 DDRA_DQS7
DDRA_DQ57 DDRA_DQ62
DDRA_DQ[0..63] DDRA_DM[0..7] DDRA_DQS[0..7] DDRB_SMA[0..13]
DDRB_CLK16 DDRB_CLK1#6
DDRB_CKE16
DDRB_SBS08 DDRB_SWE#8 DDRB_SCS#06 DDRB_SCS#1 6
D_CK_SDATA11,14 D_CK_SCLK11,14
DDRA_DQ1 DDRA_DQ5
DDRA_DQS0 DDRA_DQ7
DDRA_DQ3 DDRA_DQ13
DDRA_DQ9 DDRA_DQS1
DDRA_DQ15 DDRA_DQ11
DDRA_DQ16 DDRA_DQ20
DDRA_DQS2 DDRA_DQ18
DDRA_DQ22 DDRA_DQ25
DDRA_DQ29 DDRA_DQS3
DDRA_DQ27 DDRA_DQ30
DDRB_CKE1 DDRB_SMA12
DDRB_SMA9 DDRB_SMA7
DDRB_SMA5 DDRB_SMA3 DDRB_SMA1
DDRB_SMA10 DDRB_SBS0 DDRB_SWE#
DDRB_SMA13 DDRA_DQ36
DDRA_DQ33 DDRA_DQS4
DDRA_DQ38 DDRA_DQ35
DDRA_DQ41 DDRA_DQ44
DDRA_DQS5 DDRA_DQ46
DDRA_DQ47
DDRA_DQ52 DDRA_DQ53
DDRA_DQS6 DDRA_DQ54
DDRA_DQ50 DDRA_DQ60
DDRA_DQ56 DDRA_DQS7
DDRA_DQ57 DDRA_DQ62
D_CK_SDATA D_CK_SCLK
+3VS
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
JP12
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
DU/RESET#
AMP_1565917-1
Compal Secret Data
Deciphered Date
VREF
VSS DQ4 DQ5 VDD DM0 DQ6 VSS DQ7
DQ12
VDD
DQ13
DM1
VSS DQ14 DQ15
VDD
VDD
VSS
VSS
DQ20 DQ21
VDD
DM2 DQ22
VSS DQ23 DQ28
VDD DQ29
DM3
VSS DQ30 DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
VSS
VSS
VDD
VDD
CKE0
DU/BA2
VSS
VDD
BA1
RAS# CAS#
VSS DQ36 DQ37
VDD
DM4 DQ38
VSS DQ39 DQ44
VDD DQ45
DM5
VSS DQ46 DQ47
VDD CK1#
CK1
VSS DQ52 DQ53
VDD
DM6 DQ54
VSS DQ55 DQ60
VDD DQ61
DM7
VSS DQ62 DQ63
VDD
SA0
SA1
SA2
A11
A8 A6
A4 A2 A0
S1#
DU
DU
+2.5V +DIMM_VREF
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DDRA_DQ0 DDRA_DQ4
DDRA_DM0 DDRA_DQ6
DDRA_DQ2 DDRA_DQ8
DDRA_DQ12 DDRA_DM1
DDRA_DQ14 DDRA_DQ10
DDRA_DQ17 DDRA_DQ21
DDRA_DM2 DDRA_DQ19
DDRA_DQ23 DDRA_DQ24
DDRA_DQ28 DDRA_DM3
DDRA_DQ26 DDRA_DQ31
DDRB_CKE0 DDRB_SMA11
DDRB_SMA8 DDRB_SMA6
DDRB_SMA4 DDRB_SMA2 DDRB_SMA0
DDRB_SBS1 DDRB_SRAS# DDRB_SCAS# DDRB_SCS#1DDRB_SCS#0
DDRA_DQ37 DDRA_DQ32
DDRA_DM4 DDRA_DQ39
DDRA_DQ34 DDRA_DQ45
DDRA_DQ40 DDRA_DM5
DDRA_DQ42 DDRA_DQ43
DDRA_DQ49 DDRA_DQ48
DDRA_DM6 DDRA_DQ55
DDRA_DQ51 DDRA_DQ61
DDRA_DQ58 DDRA_DM7
DDRA_DQ63 DDRA_DQ59
2006/03/012005/03/01
2
1
C263
0.1U_0402_16V4Z
2
DDRB_CKE0 6
DDRB_SBS1 8 DDRB_SRAS# 8 DDRB_SCAS# 8
DDRB_CLK2# 6 DDRB_CLK2 6
+3VS
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
DDR-SODIMM1
, 03, 2005
四三月
EAL30 LA-2691
1
星期
12 52
1.0
of
Page 13
A
B
C
D
E
Layout note :
Distribute as close as possible to DDR-SODIMM.
1 1
+2.5V
1
2
1
2
C110
0.1U_0402_16V4Z
C705
0.1U_0402_16V4Z
1
C119
0.1U_0402_16V4Z
2
1
C762
0.1U_0402_16V4Z
2
1
C123
0.1U_0402_16V4Z
2
1
C783
0.1U_0402_16V4Z
2
1
C216
0.1U_0402_16V4Z
2
1
C795
0.1U_0402_16V4Z
2
1
C230
0.1U_0402_16V4Z
2
+2.5V+2.5V
1
+
C684 150U_D2_6.3VM
2
1
C248
0.1U_0402_16V4Z
2
1
+
C799 150U_D2_6.3VM
2
1
C324
0.1U_0402_16V4Z
2
1
C680
0.1U_0402_16V4Z
2
1
C683
0.1U_0402_16V4Z
2
2 2
3 3
4 4
Layout note :
Place one cap close to every 2 pull up resistors termination to +1.25V
+1.25VS
1
2
+1.25VS
1
2
+1.25VS
1
2
+1.25VS
1
2
+1.25VS
1
2
C737
0.1U_0402_16V4Z
C717
0.1U_0402_16V4Z
C767
0.1U_0402_16V4Z
C701
0.1U_0402_16V4Z
C782
0.1U_0402_16V4Z
1
C695
0.1U_0402_16V4Z
2
1
C721
0.1U_0402_16V4Z
2
1
C771
0.1U_0402_16V4Z
2
1
C720
0.1U_0402_16V4Z
2
1
C797
0.1U_0402_16V4Z
2
1
C697
0.1U_0402_16V4Z
2
1
C724
0.1U_0402_16V4Z
2
1
C780
0.1U_0402_16V4Z
2
1
C723
0.1U_0402_16V4Z
2
1
C808
0.1U_0402_16V4Z
2
1
C183
0.1U_0402_16V4Z
2
1
C734
0.1U_0402_16V4Z
2
1
C768
0.1U_0402_16V4Z
2
1
C725
0.1U_0402_16V4Z
2
1
C814
0.1U_0402_16V4Z
2
1
C191
0.1U_0402_16V4Z
2
1
C741
0.1U_0402_16V4Z
2
1
C798
0.1U_0402_16V4Z
2
1
C731
0.1U_0402_16V4Z
2
1
C818
0.1U_0402_16V4Z
2
1
C700
0.1U_0402_16V4Z
2
1
C746
0.1U_0402_16V4Z
2
1
C811
0.1U_0402_16V4Z
2
1
C712
0.1U_0402_16V4Z
2
1
C169
0.1U_0402_16V4Z
2
1
C703
0.1U_0402_16V4Z
2
1
C203
0.1U_0402_16V4Z
2
1
C816
0.1U_0402_16V4Z
2
1
C744
0.1U_0402_16V4Z
2
1
C174
0.1U_0402_16V4Z
2
1
C711
0.1U_0402_16V4Z
2
1
C763
0.1U_0402_16V4Z
2
1
C823
0.1U_0402_16V4Z
2
1
C772
0.1U_0402_16V4Z
2
1
C150
0.1U_0402_16V4Z
2
+1.25VS
1
2
C199
0.1U_0402_16V4Z
1
C685
0.1U_0402_16V4Z
2
1
C696
0.1U_0402_16V4Z
2
1
C698
0.1U_0402_16V4Z
2
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Deciphered Date
2006/03/012005/03/01
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
DDR SODIMM Decoupling
EAL30 LA-2691
星期四 三月
, 03, 2005
E
of
13 52
1.0
Page 14
A
B
C
D
E
F
G
H
change 0 ohm
L6
+CLK_VDD48
FSC FSB FSA CPU
CLKSEL0 CLKSEL1 CLKSEL2
0
1 1
0 0
+3VS
1 2
R499 10K_0402_5%
1 2
R508 10K_0402_5%
1 2
R101 10K_0402_5%
1 2
R502 10K_0402_5%
2 2
3 3
4 4
CLKSEL0
R94
4.7K_0402_5%
1 2
1 2
R90 0_0402_5%@
CLKSEL2
CLK_PCI0
CLK_PCI2
CLK_PCI1
CK_SCLK25
CK_SDATA25
+1.05VS +1.05VS
1 2
0 1 1
R92
1K_0402_5%@ R85
0_0402_5%
1 2
R86 0_0402_5%
CLK_ICH_48M25 CLK_SD_48M31
CLK_14M_CODEC36
11 1 1 00
+3VS
2
1 3
D
+3VS
2
1 3
D
12
SRC
MHz
100 133 166 200
C716
33P_0402_50V8J
33P_0402_50V8J
CLK_PCI_LAN29 CLK_PCI_MINI34 CLK_PCI_SIO35 CLK_PCI_PCM31 CLK_PCI_LPC39
CLK_PCI_ICH23
D_CK_SCLK11,12
D_CK_SDATA11,12
R97
4.7K_0402_5%
G
1 2
D_CK_SCLK
S
Q5 2N7002_SOT23
R103
4.7K_0402_5%
G
1 2
D_CK_SDATA
S
Q7 2N7002_SOT23
MCH_CLKSEL0 6 MCH_CLKSEL1 6
CPU_BSEL0 5
PCI
MHz
MHz
100 33.3 100
33.3
100
33.3
100
33.3
Y6
14.318MHZ_16PF_DSX840GA
1 2
C713
1 2
12
CLK_ICH_48M
CLK_SD_48M
CLK_PCI_LAN CLK_PCI5 CLK_PCI_MINI
CLK_PCI_PCM CLK_PCI2
CLK_PCI_ICH D_CK_SCLK
D_CK_SDATA
+3VS
+3VS
CLKSEL1
1
C117
2
2.2U_0603_6.3V6K
+CLK_VDD2
R498 12_0402_5%
1 2
R497 12_0402_5%5IN1@
1 2
R800 33_0402_5%
1 2
1 2
R520 33_0402_5%
1 2
R521 33_0402_5%
1 2
R522 33_0402_5%
1 2
R515 33_0402_5%
1 2
R501 33_0402_5%
1 2
R507 33_0402_5%
R93
4.7K_0402_5%
1 2
1 2
R96 0_0402_5%@
1
C115
2
0.047U_0402_16V7K
+CLK_VDD1
+CLK_VDD1
+CLK_VDDREF
1 2
R100 1_0402_5%
+CLK_VDD48
1 2
R99 2.2_0402_5%
R461 475_0402_1%
1 2
R91
1K_0402_5%@ R95
0_0402_5%
1 2
1 2
R89 0_0402_5%
CLK_X1 CLK_X2
CLKSEL2 CLKSEL0
CLKSEL1
CLK_PCI4 CLK_PCI3CLK_PCI_SIO
CLK_PCI1CLK_PCI_LPC
CLK_PCI0
CLKIREF
12
15mil 15mil
15mil
CPU_BSEL1 5
+CLK_VDDREF
1
C118
0.047U_0402_16V7K
2
U40
21
VDDPCIEX_0
28
VDDPCIEX_1
34
VDDPCIEX_2
1
VDDPCI_0
7
VDDPCI_1
42
VDDCPU
48
VDDREF
11
VDD48
50
X1
49
X2
12
FS_A/USB_48MHz
53
REF1/FSLC/TEST_SEL
16
FSLB/TEST_MODE
5
PCICLK5
4
PCICLK4
3
PCICLK3
56
PCICLK2/REQ_SEL
9
SELPCIEX_LCDCLK#/PCICLK_F1
8
ITP_EN/PCICLK_F0
46
SCLK
47
SDATA
39
IREF
13
GND_0
29
GND_1
2
GND_2
45
GND_3
51
GND_4
6
GND_5
ICS954226AGT_TSSOP56
Security Classification
CPUCLKT2_ITP/PCIEXT6
CPUCLKC2_ITP/PCIEXC6
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
D
KC FBM-L11-201209-221LMAT_0805
1 2
+3VS
VDDA
GNDA
PCI/SRC_STOP#
CPU_STOP#
CPUCLKT1 CPUCLKC1
CPUCLKT0 CPUCLKC0
PEREQ1#/PCIEXT5
PEREQ2#/PCIEXC5
PCIEXT4 PCIEXC4
SATACLKT SATACLKC
PCIEXT3 PCIEXC3
PCIEXT2 PCIEXC2
PCIEXT1 PCIEXC1
LCDCLK_SS/PCIEX0T
LCDCLK_SS/PCIEX0C
DOTT_96MHz DOTC_96MHz
VTT_PWRGD#/PD
REF0
37 38
55 54
41 40
44 43
36 35
33 32
31 30
26 27
24 25
22 23
19 20
17 18
14 15
10 52
1
C107
2.2U_0603_6.3V6K
2
STP_PCI# STP_CPU#
CLK_CPU1 CLK_CPU1#
CLK_CPU0 CLK_CPU0#
1
C116
0.047U_0402_16V7K
2
+CLK_VCCA
40mil
1
C111
2
2.2U_0603_6.3V6K
R479 33_0402_5% R472 33_0402_5%
R493 33_0402_5% R489 33_0402_5%
1
2
1 2 1 2
1 2 1 2
1
2
1 2
R88
2.2_0402_5%
C108
0.047U_0402_16V7K
PM_STP_PCI# 25 PM_STP_CPU# 25,50
CLK_MCH_BCLK CLK_MCH_BCLK#
CLK_CPU_BCLK CLK_CPU_BCLK#
delete ITP clock
delete pci E clock for Lan
CLK_SRC4
R443 33_0402_5%
CLK_SRC4#
R440 33_0402_5%
CLK_SRC3
R453 33_0402_5%
CLK_SRC3#
R445 33_0402_5%
CLK_SRC2
R463 33_0402_5%
CLK_SRC2#
R457 33_0402_5%
CLK_SRC1
R476 33_0402_5%
CLK_SRC1#
R468 33_0402_5%
CLK_SRC0
R486 33_0402_5%
CLK_SRC0#
R481 33_0402_5%
CLK_DOT
R495 33_0402_5%
CLK_DOT#
R490 33_0402_5%
CLK_REF
1 2
R500 12_0402_5%
1 2
R505 12_0402_5%
Compal Secret Data
E
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
Deciphered Date
1.0
CLK_14M_SIO
CLK_ICH_14M
CLK_PCIE_SATA CLK_PCIE_SATA#
CLK_MCH_3GPLL CLK_MCH_3GPLL#
CLK_PCIE_VGA CLK_PCIE_VGA#
CLK_PCIE_ICH CLK_PCIE_ICH#
CLK_DREF_SSC CLK_DREF_SSC#
CLK_DREF_96M CLK_DREF_96M#
C109
0.047U_0402_16V7K
+3VS
F
40mil
1
C105
0.047U_0402_16V7K
2
+3VS
1 2
2006/03/012005/03/01
change 0 ohm
L28 KC FBM-L11-201209-221LMAT_0805
1 2
CLK_MCH_BCLK 6 CLK_MCH_BCLK# 6
CLK_CPU_BCLK 4 CLK_CPU_BCLK# 4
CLK_PCIE_SATA 24 CLK_PCIE_SATA# 24
CLK_MCH_3GPLL 7 CLK_MCH_3GPLL# 7
CLK_PCIE_VGA 15 CLK_PCIE_VGA# 15
CLK_PCIE_ICH 25 CLK_PCIE_ICH# 25
CLK_DREF_SSC 6 CLK_DREF_SSC# 6
CLK_DREF_96M 6 CLK_DREF_96M# 6
+CLK_VDD1
R98 10K_0402_5%
VTT_POWERGD#
CLK_14M_SIO 35
CLK_ICH_14M 25
+CLK_VDD1
1
C106
0.047U_0402_16V7K
2
1
C122
2
2.2U_0603_6.3V6K
Clock Generator
+CLK_VDD2
40mil
1
C124
2
0.047U_0402_16V7K
CLK_MCH_BCLK CLK_MCH_BCLK# CLK_CPU_BCLK CLK_CPU_BCLK#
1 2
R478 49.9_0402_1%
1 2
R471 49.9_0402_1%
1 2
R492 49.9_0402_1%
1 2
R488 49.9_0402_1%
1
C125
2
0.047U_0402_16V7K
delete ITP clock
delete pci E clock for Lan
CLK_PCIE_SATA CLK_PCIE_SATA# CLK_MCH_3GPLL CLK_MCH_3GPLL# CLK_PCIE_VGA CLK_PCIE_VGA# CLK_PCIE_ICH CLK_PCIE_ICH# CLK_DREF_SSC CLK_DREF_SSC# CLK_DREF_96M CLK_DREF_96M#
2
G
1 3
D
S
Q6 2N7002_SOT23
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
星期
, 03, 2005
四三月
G
1 2
R444 49.9_0402_1%
1 2
R441 49.9_0402_1%
1 2
R454 49.9_0402_1%
1 2
R446 49.9_0402_1%
1 2
R464 49.9_0402_1%
1 2
R458 49.9_0402_1%
1 2
R477 49.9_0402_1%
1 2
R469 49.9_0402_1%
1 2
R487 49.9_0402_1%
1 2
R482 49.9_0402_1%
1 2
R496 49.9_0402_1%
1 2
R491 49.9_0402_1%
VGATE 6,25,50
Clock Generator EAL30 LA-2691
of
14 52
H
Page 15
5
8
D D
C C
100K_0402_5%
B B
R268
PLTRST_VGA#25
PLT_RST#
,31,35,39
A A
1 2
0_0402_5%PM@
R272
1 2
0_0402_5%@
PCIE_GTX_C_MRX_N[0..15]7
PCIE_GTX_C_MRX_P[0..15]7 PCIE_MTX_C_GRX_N[0:15]7 PCIE_MTX_C_GRX_P[0:15]7
PCIE_GTX_C_MRX_P0 PCIE_GTX_C_MRX_N0 PCIE_GTX_C_MRX_P1 PCIE_GTX_C_MRX_N1 PCIE_GTX_C_MRX_P2 PCIE_GTX_C_MRX_N2 PCIE_GTX_C_MRX_P3 PCIE_GTX_C_MRX_N3 PCIE_GTX_C_MRX_P4 PCIE_GTX_C_MRX_N4 PCIE_GTX_C_MRX_P5 PCIE_GTX_C_MRX_N5 PCIE_GTX_C_MRX_P6 PCIE_GTX_C_MRX_N6 PCIE_GTX_C_MRX_P7 PCIE_GTX_C_MRX_N7 PCIE_GTX_C_MRX_P8 PCIE_GTX_C_MRX_N8 PCIE_GTX_C_MRX_P9 PCIE_GTX_C_MRX_N9 PCIE_GTX_C_MRX_P10 PCIE_GTX_C_MRX_N10 PCIE_GTX_C_MRX_P11 PCIE_GTX_C_MRX_N11 PCIE_GTX_C_MRX_P12 PCIE_GTX_C_MRX_N12 PCIE_GTX_C_MRX_P13 PCIE_GTX_C_MRX_N13 PCIE_GTX_C_MRX_P14 PCIE_GTX_C_MRX_N14 PCIE_GTX_C_MRX_P15 PCIE_GTX_C_MRX_N15
12
PM@
R260
Q30
13
D
2
G
S
2N7002_SOT23
PM@
Voltage divider Reduce Voltage from 3.3V to 1.2V
Q29
2
G
+3VS
12
R261 100K_0402_5%
PM@
13
D
S
OSC_IN
2N7002_SOT23
PM@
C666 0.1U_0402_10V6KPM@ C665 0.1U_0402_10V6KPM@ C644 0.1U_0402_10V6KPM@ C643 0.1U_0402_10V6KPM@ C664 0.1U_0402_10V6KPM@ C663 0.1U_0402_10V6KPM@ C642 0.1U_0402_10V6KPM@ C641 0.1U_0402_10V6KPM@ C662 0.1U_0402_10V6KPM@ C661 0.1U_0402_10V6KPM@ C640 0.1U_0402_10V6KPM@ C639 0.1U_0402_10V6KPM@ C660 0.1U_0402_10V6KPM@ C659 0.1U_0402_10V6KPM@ C638 0.1U_0402_10V6KPM@ C637 0.1U_0402_10V6KPM@ C658 0.1U_0402_10V6KPM@ C657 0.1U_0402_10V6KPM@ C636 0.1U_0402_10V6KPM@ C635 0.1U_0402_10V6KPM@ C656 0.1U_0402_10V6KPM@ C655 0.1U_0402_10V6KPM@ C634 0.1U_0402_10V6KPM@ C633 0.1U_0402_10V6KPM@ C654 0.1U_0402_10V6KPM@ C653 0.1U_0402_10V6KPM@ C646 0.1U_0402_10V6KPM@ C645 0.1U_0402_10V6KPM@ C652 0.1U_0402_10V6KPM@ C651 0.1U_0402_10V6KPM@ C632 0.1U_0402_10V6KPM@ C631 0.1U_0402_10V6KPM@
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
+1.2VS
VGA_TV_LUMA22
VGA_TV_CRMA22
R79
1 2
121_0603_1%
PM@
R71
PM@
71.5_0402_1%
+3VS
CLK_PCIE_VGA14 CLK_PCIE_VGA#14
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
12
Reserve for M26 test
VGA_CRT_VSYNC
5
4
R258 150_0402_1%PM@
1 2
R259 100_0402_1%PM@
1 2
R262 10K_0402_1%PM@ R263 10K_0402_5%
1 2
1 2
R264 1K_0402_5% R266 715_0402_1%
PM@
1 2
R269 75_0402_5%
VGA_TV_LUMA
R273150_0402_1% PM @
12
VGA_TV_CRMA
12
R274150_0402_1% PM @
R280 1K_0402_5%
R282 10K_0402_5%PM@
12
R283 10K_0402_5%@
4
PCIE_MTX_C_GRX_P0 PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_P3 PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_P5 PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_P7 PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_N8 PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_N13 PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_P15 PCIE_MTX_C_GRX_N15
PCIE_GTX_MRX_P0
PCIE_GTX_MRX_N0
PCIE_GTX_MRX_P1
PCIE_GTX_MRX_N1
PCIE_GTX_MRX_P2
PCIE_GTX_MRX_N2
PCIE_GTX_MRX_P3
PCIE_GTX_MRX_N3
PCIE_GTX_MRX_P4
PCIE_GTX_MRX_N4
PCIE_GTX_MRX_P5
PCIE_GTX_MRX_N5
PCIE_GTX_MRX_P6
PCIE_GTX_MRX_N6
PCIE_GTX_MRX_P7
PCIE_GTX_MRX_N7
PCIE_GTX_MRX_P8
PCIE_GTX_MRX_N8
PCIE_GTX_MRX_P9
PCIE_GTX_MRX_N9
PCIE_GTX_MRX_P10
PCIE_GTX_MRX_N10
PCIE_GTX_MRX_P11
PCIE_GTX_MRX_N11
PCIE_GTX_MRX_P12
PCIE_GTX_MRX_N12
PCIE_GTX_MRX_P13
PCIE_GTX_MRX_N13
PCIE_GTX_MRX_P14
PCIE_GTX_MRX_N14
PCIE_GTX_MRX_P15
PCIE_GTX_MRX_N15
CLK_PCIE_VGA CLK_PCIE_VGA#
12
@
R_PLTRST_VGA#
PM@ PM@
12
VGA_TV_LUMA VGA_TV_CRMA
VGA_COMPS
12
PM@
XTALIN
PM@
12
12
+3VS
R27710K_0402_5%
U6A
AH30
PCIE_RX0P
AG30
PCIE_RX0N
AG29
PCIE_RX1P
AF29
PCIE_RX1N
AE29
PCIE_RX2P
AE30
PCIE_RX2N
AD30
PCIE_RX3P
AD29
PCIE_RX3N
AC29
PCIE_RX4P
AB29
PCIE_RX4N
AB30
PCIE_RX5P
AA30
PCIE_RX5N
AA29
PCIE_RX6P
Y29
PCIE_RX6N
W29
PCIE_RX7P
W30
PCIE_RX7N
V30
PCIE_RX8P
V29
PCIE_RX8N
U29
PCIE_RX9P
T29
PCIE_RX9N
T30
PCIE_RX10P
R30
PCIE_RX10N
R29
PCIE_RX11P
P29
PCIE_RX11N
N29
PCIE_RX12P
N30
PCIE_RX12N
M30
PCIE_RX13P
M29
PCIE_RX13N
L29
PCIE_RX14P
K29
PCIE_RX14N
K30
PCIE_RX15P
J30
PCIE_RX15N
AF26
PCIE_TX0P
AE26
PCIE_TX0N
AC25
PCIE_TX1P
AB25
PCIE_TX1N
AC27
PCIE_TX2P
AB27
PCIE_TX2N
AC26
PCIE_TX3P
AB26
PCIE_TX3N
Y25
PCIE_TX4P
W25
PCIE_TX4N
Y27
PCIE_TX5P
W27
PCIE_TX5N
Y26
PCIE_TX6P
W26
PCIE_TX6N
U25
PCIE_TX7P
T25
PCIE_TX7N
U27
PCIE_TX8P
T27
PCIE_TX8N
U26
PCIE_TX9P
T26
PCIE_TX9N
P25
PCIE_TX10P
N25
PCIE_TX10N
P27
PCIE_TX11P
N27
PCIE_TX11N
P26
PCIE_TX12P
N26
PCIE_TX12N
L25
PCIE_TX13P
K25
PCIE_TX13N
L27
PCIE_TX14P
K27
PCIE_TX14N
L26
PCIE_TX15P
K26
PCIE_TX15N
AF27
PCIE_REFCLKP
AE27
PCIE_REFCLKN
AC23
PCIE_CALRP
AB24
PCIE_CALRN
AB23
PCIE_CALI
AE25
PCIE_TESTIN
AD25
PWRGD
AD24
PWRGD_MASK
AH21
R2SET
AK21
Y_G
AJ22
C_R_PR
AK22
COMP_B_PB
AJ24
H2SYNC
AK24
V2SYNC
AG22
DDC3CLK
AG23
DDC3DATA
AJ23
SSIN
AH24
SSOUT
AH28
XTALIN
AJ29
XTALOUT
AH27
TESTEN
E8
TEST_YCLK
B6
TEST_MCLK
AF25
PLLTEST
AH25
STEREOSYNC
M24P_BGA708 M24@
3
Part 1 of 5
GPIO_PWRCNTL
PCI EXPRESS
DAC2CLK
SS
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8
GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14
GPIO_MEMSSIN
DVOMODE
DVPDATA_0 DVPDATA_1 DVPDATA_2 DVPDATA_3 DVPDATA_4 DVPDATA_5 DVPDATA_6 DVPDATA_7 DVPDATA_8
DVPDATA_9 DVPDATA_10 DVPDATA_11 DVPDATA_12 DVPDATA_13 DVPDATA_14 DPVDATA_15
DVO / EXT TMDS / GPIOTMDSDAC1
DVPDATA_16 DVPDATA_17 DVPDATA_18 DVPDATA_19 DVPDATA_20 DVPDATA_21 DVPDATA_22 DVPDATA_23
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
DVPCNTL_3
VREFG
TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P
TXOUT_L3N
TXOUT_L3P
TXCLK_LN
TXCLK_LP TXOUT_U0N TXOUT_U0P TXOUT_U1N TXOUT_U1P TXOUT_U2N
LVDS
TXOUT_U2P TXOUT_U3N TXOUT_U3P
TXCLK_UN TXCLK_UP
DIGON
BLON TX0M
TX0P
TX1M
TX1P
TX2M
TX2P TXCM TXCP
DDC2CLK
DDC2DATA
HPD1
HSYNC VSYNC
RSET
DDC1DATA
DDC1CLK
GPIO_AUXWIN
DPLUS
DMINUS
THERM
R G B
VGA_GPIO1
AH5
VGA_GPIO2
AJ4
VGA_GPIO3
AK4
VGA_GPIO4
AH4
VGA_GPIO5
AF4
VGA_GPIO6
AJ3 AK3 AH3 AJ2 AH2
POWER_SEL(High 3.3V):VDDC=1.05V
AH1
(Low 0V ):VDDC=1.20V
AG3 AG1 AG2
POWER_SEL
AF3 AF2
AE10
MEM_ID0
AH6
MEM_ID1
AJ6
MEM_ID2
AK6 AH7 AK7 AJ7 AH8 AJ8 AH9 AJ9 AK9 AH10 AE6 AG6 AF6 AE7 AF7 AE8 AG8 AF8 AE9 AF9 AG10 AF10
AJ10 AK10 AJ11 AH11
+VREFG
AG4
(15mils)
AH15 AH16 AJ16 AJ17 AJ18 AK18 AJ20 AJ21 AK19 AJ19 AG16 AG17 AF16 AF17 AE18 AE19 AF19 AF20 AG19 AG20
AE12 AG12
R265 10K_0402_5%
AK13 AJ13 AJ14 AJ15 AK15 AK16 AJ12 AK12
AE13 AE14 AF12
AK27 AJ27 AJ26 AJ25 AK25
DAC_RSET
AH26 AG25 AF24 AG24
AF11 AE11
+3VS +3VS
VGA_GPIO0
AJ5
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
1 2
R243 10K_0402_5%PM@
1 2
R244 10K_0402_5%@
1 2
R245 10K_0402_5%@
1 2
R246 10K_0402_5%@
1 2
R247 10K_0402_5%@
1 2
R248 10K_0402_5%@
1 2
R249 10K_0402_5%@
1 2
R20 10K_0402_5%PM@
R250 10K_0402_5%@
1 2
R251 10K_0402_5%@
1 2
R252 10K_0402_5%@
1 2
R253 4.7K_0402_5%PM@
1 2
R254 4.7K_0402_5%PM@
1 2
R255 10K_0402_5%@
1 2
RESRRVED FOR M24 TEST
1 8 2 7 3 6 4 5
RP36 10K_0804_8P4R_5%
ENVDD
1 2
PM@
VGA_CRT_R VGA_CRT_G VGA_CRT_B
VGA_CRT_R VGA_CRT_G VGA_CRT_B
R279 499_0402_1%PM@
R281 10K_0402_5%
+3VS
PM@
VGA_TXOUT0- 21 VGA_TXOUT0+ 21 VGA_TXOUT1- 21 VGA_TXOUT1+ 21 VGA_TXOUT2- 21 VGA_TXOUT2+ 21
VGA_TXCLK- 21
VGA_TXCLK+ 21
VGA_TZOUT0- 21
VGA_TZOUT0+ 21
VGA_TZOUT1- 21
VGA_TZOUT1+ 21
VGA_TZOUT2- 21
VGA_TZOUT2+ 21
VGA_TZCLK- 21
VGA_TZCLK+ 21
R267 150_0402_1% R270 150_0402_1% R271 150_0402_1%
1 2
12
PM@
VGA_DDC_DATA
R8054.7K_0402_5% PM@
12
VGA_DDC_CLK
R8064.7K_0402_5% PM@
12
Compal Secret Data
Deciphered Date
OSC_SPREAD
VGA_LCD_DATA 21 VGA_LCD_CLK 21
ENVDD 21 ENBKL 7,39
PM@
1 2
PM@
1 2
PM@
1 2
2
+3VS
POWER_SEL 47
+3VS
+3VS
+3VS
Place +VREFG divider Res and decoupling Cap close to Ball AG4
VGA_CRT_R 22 VGA_CRT_G 22 VGA_CRT_B 22 VGA_CRT_HSYNC 22 VGA_CRT_VSYNC 22
VGA_DDC_DATA 22 VGA_DDC_CLK 22
If GPIO_AUXWIN not used, pulled it to GND.
2006/03/012005/03/01
2
+3VS
+VREFG
MEM_ID0
1K_0402_1%
PM@
1
General Straping (VGA Internal PD) 0:Disable, 1:Enable
Full Transmitter Output Swing Power
GPIO0 GPIO1
Transmitter De-emphasis Enable
GPIO(3:2)
00: PCI Express 1.0A mode 01: Kyrene-compatible mode 10: PCI Express 1. 0 mode 11: PCI Express 1.0A mode and short-circuit internal loopback mode (Rx connected directly to Tx of PHY)
GPIO4
Transmitter Extra Current PCI-E Lane Reversal Enable
GPIO5
Force chip to go to compliance state quickly for test purposes
Reduced PLL bandwidth
GPIO6
Vedio Memory Config. (VGA Internal PD) 1.8V only
0 0 1 1 0 0 1 1
MEM_ID2
MEM_ID1
1
1 128MB
1
Default
1
0
1
1
0
0
0
1
0
0
0
1
64MB 0
64MB 128MB 32MB 64MB 32MB 64MB
DEFAULT : 1 DEFAULT : 0 DEFAULT : 00
DEFAULT : 0
DEFAULT : 0
DEFAULT : 0
Size Vendor Chips
8Mx32 Samsung x2 8Mx32 Samsung x4 8Mx32 Hynix x2 8Mx32 Hynix x4 4Mx32 Samsung x2 4Mx32 Samsung x4 4Mx32 Hynix x2 4Mx32 Hynix x4
M22 Core speed MAX 300MHz M24 Core speed MAX 400MHz
R256
1 2
PM@
1
2
0.1U_0402_16V4Z
PM@
PM@
Keep away from other signal at last 25mils
ATI suggest 100 ohm Current Value same as EAT10
12
R257
C360
PM@
1K_0402_1%
+3VS
C361
12
12
0.1U_0402_16V4Z
C865
12
10U_0805_10V4Z
Spread spectrum
L19 CHB1608U301_0603
PM@
U22
7
REF
VDD
1
MODOUT
XIN
8
XOUT
NC
2
PD#
VSS
ASM3P1819N-SR_SO8
PM@
Y1
PM@
4
GND
OUT
1
IN
1
2
Title
Size Document Number Rev
Custom
星期
Date: Sheet
GND
27MHz_16PF_6P27000126 C385 16P_0603_50V8J
PM@
Compal Electronics, Inc.
M22P/24P PCIE,LVDS,GPIO,CLK EAL30 LA-2691
, 03, 2005
四三月
OSC_IN
5
1 2
4
R275 22_0402_5%
3
R276 10K_0402_5%@
6
R278 10K_0402_5%@
3 2
1
PM@
12 12
1
C383 16P_0603_50V8J
2
PM@
OSC_SPREAD
15 52
1.0
of
Page 16
5
4
3
2
1
MDA[0..63]
D D
C C
B B
A A
DQSA[0..7] DQMA#[0..7] MAA[0..13]
MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63
MDA[0..63] 19 DQSA[0..7] 19 DQMA#[0..7] 19 MAA[0..13] 19
U6B
H28
DQA0
H29
DQA1
J28
DQA2
J29
DQA3
J26
DQA4
H25
DQA5
H26
DQA6
G26
DQA7
G30
DQA8
D29
DQA9
D28
DQA10
E28
DQA11
E29
DQA12
G29
DQA13
G28
DQA14
F28
DQA15
G25
DQA16
F26
DQA17
E26
DQA18
F25
DQA19
E24
DQA20
F23
DQA21
E23
DQA22
D22
DQA23
B29
DQA24
C29
DQA25
C25
DQA26
C27
DQA27
B28
DQA28
B25
DQA29
C26
DQA30
B26
DQA31
F17
DQA32
E17
DQA33
D16
DQA34
F16
DQA35
E15
DQA36
F14
DQA37
E14
DQA38
F13
DQA39
C17
DQA40
B18
DQA41
B17
DQA42
B15
DQA43
C13
DQA44
B14
DQA45
C14
DQA46
C16
DQA47
A13
DQA48
A12
DQA49
C12
DQA50
B12
DQA51
C10
DQA52
C9
DQA53
B9
DQA54
B10
DQA55
E13
DQA56
E12
DQA57
E10
DQA58
F12
DQA59
F11
DQA60
E9
DQA61
F9
DQA62
F8
DQA63
M24P_BGA708
M24@
MDB[0..63] DQSB[0..7] DQMB#[0..7] MAB[0..13]
Part 2 of 5
MEMORY INTERFACE A
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8
MAA9 MAA10 MAA11 MAA12 MAA13 MAA14
DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7
QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7 RASA# CASA#
WEA#
CSA0# CSA1#
CKEA
CLKA0
CLKA0#
CLKA1
CLKA1#
MVREFD MVREFS
DIMA_0 DIMA_1
MDB[0..63] 20 DQSB[0..7] 20 DQMB#[0..7] 20 MAB[0..13] 20
MAA0
E22
MAA1
B22
MAA2
B23
MAA3
B24
MAA4
C23
MAA5
C22
MAA6
F22
MAA7
F21
MAA8
C21
MAA9
A24
MAA10
C24
MAA11
A25
MAA12
E21
MAA13
B20 C19
DQMA#0
J25
DQMA#1
F29
DQMA#2
E25
DQMA#3
A27
DQMA#4
F15
DQMA#5
C15
DQMA#6
C11
DQMA#7
E11
DQSA0
J27
DQSA1
F30
DQSA2
F24
DQSA3
B27
DQSA4
E16
DQSA5
B16
DQSA6
B11
DQSA7
F10
MRASA#
A19
MCASA#
E18
MWEA#
E19
MCSA0#
E20 F20
MCKEA
B19
MCLKA0
B21
MCLKA0#
C20
MCLKA1
C18
MCLKA1#
A18
(15mils)
+MVREFD
B7 B8
D30 B13
(15mils) (15mils)
0.1U_0402_16V4Z
+MVREFS
PM@
C528
(15mils)
1
2
Memory speed MAX200MHz
MRASA# 19 MCASA# 19 MWEA# 19 MCSA0# 19
MCKEA 19
MCLKA0 19 MCLKA0# 19
MCLKA1 19 MCLKA1# 19
+1.8VS +1.8VS
12
PM@
R410 100_0402_1%
12
R413
PM@
100_0402_1%
+MVREFD+MVREFS
C500
PM@
0.1U_0402_16V4Z
R405
1 2
R403
+1.8VS
12
MEMVMODE0 MEMVMODE1
NC
R409
47_0402_1%
Default
MRASB# 20 MCASB# 20 MWEB# 20 MCSB0# 20
MCKEB 20 MCLKB0 20
MCLKB0# 20 MCLKB1 20
MCLKB1# 20
PM@
1 2
MEMVMODE1
MEMVMODE0
PM@
4.7K_0402_5%
PM@
4.7K_0402_5%
Pull-high
MAB0
N5
MAB1
M1
MAB2
M3
MAB3
L3
MAB4
L2
MAB5
M2
MAB6
M5
MAB7
P6
MAB8
N3
MAB9
K2
MAB10
K3
MAB11
J2
MAB12
P5
MAB13
P3 P2
DQMB#0
E6
DQMB#1
B2
DQMB#2
J5
DQMB#3
G3
DQMB#4
W6
DQMB#5
W2
DQMB#6
AC6
DQMB#7
AD2
DQSB0
F6
DQSB1
B3
DQSB2
K6
DQSB3
G1
DQSB4
V5
DQSB5
W1
DQSB6
AC5
DQSB7
AD1
MRASB#
R2
MCASB#
T5
MWEB#
T6
MCSB0#
R5 R6
MCKEB
R3
MCLKB0
N1
MCLKB0#
N2
MCLKB1
T2
MCLKB1#
T3
E3 AA3
AF5
MEMVMODE0
C6
MEMVMODE1
C7
MEMTEST
C8
(15mil)
change to 240 ohm when use M26
MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8
MAB9 MAB10 MAB11 MAB12 MAB13 MAB14
DQMB#0 DQMB#1 DQMB#2 DQMB#3 DQMB#4 DQMB#5 DQMB#6 DQMB#7
QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7 RASB# CASB#
WEB# CSB0# CSB1#
CKEB CLKB0
CLKB0#
CLKB1
CLKB1#
DIMB_0 DIMB_1
ROMCS#
MEMVMODE_0 MEMVMODE_1
MEMTEST
Pull-low
NC
M22/24(1.8V VRAM)
M26(1.8V VRAM)
AD6 AD5
AC2 AC3 AD3
D7
F7
E7 G6 G5
F5
E5 C4
B5 C5
A4
B4 C2 D3 D1 D2 G4 H6 H5
J6
K5
K4
L6
L5 G2
F3 H2
E2
F2
J3
F1 H3 U6 U5 U3
V6
W5 W4
Y6
Y5 U2
V2
V1
V3
W3
Y2
Y3
AA2 AA6 AA5 AB6 AB5
AE5 AE4 AB2 AB3
AE1 AE2 AE3
U6C
DQB0 DQB1 DQB2 DQB3 DQB4 DQB5 DQB6 DQB7 DQB8 DQB9 DQB10 DQB11 DQB12 DQB13 DQB14 DQB15 DQB16 DQB17 DQB18 DQB19 DQB20 DQB21 DQB22 DQB23 DQB24 DQB25 DQB26 DQB27 DQB28 DQB29 DQB30 DQB31 DQB32 DQB33 DQB34 DQB35 DQB36 DQB37 DQB38 DQB39 DQB40 DQB41 DQB42 DQB43 DQB44 DQB45 DQB46 DQB47 DQB48 DQB49 DQB50 DQB51 DQB52 DQB53 DQB54 DQB55 DQB56 DQB57 DQB58 DQB59 DQB60 DQB61 DQB62
DQB63
M24P_BGA708
M24@
Part 3 of 5
MEMORY INTERFACE B
MDB0 MDB1 MDB2 MDB3 MDB4 MDB5 MDB6 MDB7 MDB8 MDB9 MDB10 MDB11 MDB12 MDB13 MDB14 MDB15 MDB16 MDB17 MDB18 MDB19 MDB20 MDB21 MDB22 MDB23 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30 MDB31 MDB32 MDB33 MDB34 MDB35 MDB36 MDB37 MDB38 MDB39 MDB40 MDB41 MDB42 MDB43 MDB44 MDB45 MDB46 MDB47 MDB48 MDB49 MDB50 MDB51 MDB52 MDB53 MDB54 MDB55 MDB56 MDB57 MDB58 MDB59 MDB60 MDB61 MDB62 MDB63
12
R408
PM@
100_0402_1%
12
1
R404 100_0402_1%PM@
2
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Deciphered Date
2006/03/012005/03/01
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
M22P/24P Memory Interface EAL30 LA-2691
星期
, 03, 2005
四三月
1.0
of
16 52
1
Page 17
5
4
3
2
1
+1.8VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
12
0.1U_0402_16V4Z
12
0.1U_0402_16V4Z
12
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
+VDD_PLL2_1.8
+1.8VS
+VDD_PLL2_1.8
1
2
0.1U_0402_16V4Z
C599
PM@
1 2
C362
PM@
1 2
C597
PM@
1 2
C502
PM@
1 2
C601
PM@
1 2
C600
PM@
1 2
C605
PM@
1 2
C505
PM@
1 2
C547
PM@
1 2
C592
PM@
1 2
C507
PM@
1 2
C565
PM@
1 2
C552
PM@
1 2
C619
PM@
1 2
+VDD_PNLIO2.5
+1.8VS
C487
PM@
0.1U_0402_16V4Z
+VDD_DAC2.5
+AVDD1.8
+1.8VS
+VDD_PLL1.8
+VDD_PLL2_1.8
0.1U_0402_16V4Z
1
C863
PM@
2
PM@
1000P_0402_50V7K
PM@
1000P_0402_50V7K
PM@
1000P_0402_50V7K
PM@
1000P_0402_50V7K
PM@
1000P_0402_50V7K
PM@
1000P_0402_50V7K
PM@
1000P_0402_50V7K
PM@
1000P_0402_50V7K
PM@
1000P_0402_50V7K
PM@
1000P_0402_50V7K
PM@
1000P_0402_50V7K
PM@
1000P_0402_50V7K
PM@
1000P_0402_50V7K
PM@
1000P_0402_50V7K
0.1U_0402_16V4Z
1
C489
PM@
2
C838
PM@
1 2
22U_1206_10V4Z
C313
ATi suggestion: Using filter is acceptable (Default) Using liner regulator is optimal. (Reserve)
D D
+3VS
C317
470P_0402_50V7K@
U24
1
VIN
4
PG
3
1
EN
MIC5205-2.8BM5_SOT23-5~D@
2
+VDD_PNLIO2.5
VOUT
GND
5
2
SA052050010(MIC5205-2.8BM5), max:150mA
+VDD_PNLIO2.5
R296
+2.5VS
C C
+1.8VS
B B
A A
+1.8VS
+1.8VS
+1.8VS
1 2
10U_0805_10V4Z
1 2
0.1U_0402_16V4Z
C486
1 2
R29
1 2
PM@
R841
1 2
PM@
0_0603_5%
PM@
C835
PM@
R600
0_0603_5%
PM@
1
C504
2
PM@
0.1U_0402_16V4Z
R601
0_0603_5%
PM@
0.1U_0402_16V4Z
0_0603_5%
0.1U_0402_16V4Z
2.2_0603_5%
2
C837
PM@
1
0.1U_0402_16V4Z
+VDD_DAC2.5
1
C841
PM@
2
0.1U_0402_16V4Z
1
2
PM@
1
C840
PM@
2
1
C28
PM@
2
2
C85922U_1206_10V4Z
PM@
1
0.1U_0402_16V4Z
1
1
C839
PM@
2
2
0.1U_0402_16V4Z
1
C845
PM@
2
0.1U_0402_16V4Z
1
C527
2
PM@
+AVDD1.8
1
C844
PM@
2
+VDD_PLL1.8
0.1U_0402_16V4Z
1
C31
PM@
2
2
PM@
1
10U_0805_10V4Z
0.1U_0402_16V4Z
C864
PM@
22U_1206_10V4Z
PM@
22U_1206_10V4Z
PM@
22U_1206_10V4Z
PM@
10U_0805_10V4Z
PM@
10U_0805_10V4Z
PM@
220U_D2_4VM_R12
1
C549
PM@
2
0.1U_0402_16V4Z
1 2
C834
1 2
C467
1 2
C843
C847
C848
C622
PM@
+
C598
1 2
C363
1 2
C508
1 2
C496
1 2
C593
1 2
C604
1 2
C613
1 2
C497
1 2
C555
1 2
C577
1 2
C495
1 2
C490
1 2
C620
1 2
C615
1 2
1
2
70mA
+1.8VS
200mA
400mA
60mA
15mA
400mA
120mA
5mA
10mA
30mA 10mA
U6D
T7
VDDR1_0
R4
VDDR1_1
R1
VDDR1_2
N8
VDDR1_3
N7
VDDR1_4
M4
VDDR1_5
L8
VDDR1_6
K23
VDDR1_7
K24
VDDR1_8
N4
VDDR1_9
J8
VDDR1_10
J7
VDDR1_11
J4
VDDR1_12
J1
VDDR1_13
H10
VDDR1_14
H13
VDDR1_15
H15
VDDR1_16
H17
VDDR1_17
T8
VDDR1_18
V4
VDDR1_19
V7
VDDR1_20
V8
VDDR1_21
AA1
VDDR1_22
AA4
VDDR1_23
AA7
VDDR1_24
AA8
VDDR1_25
A3
VDDR1_26
A9
VDDR1_27
A15
VDDR1_28
A21
VDDR1_29
A28
VDDR1_30
B1
VDDR1_31
B30
VDDR1_32
D26
VDDR1_33
D23
VDDR1_34
D20
VDDR1_35
D17
VDDR1_36
D14
VDDR1_37
D11
VDDR1_38
D8
VDDR1_39
D5
VDDR1_40
E27
VDDR1_41
F4
VDDR1_42
G7
VDDR1_43
G10
VDDR1_44
G13
VDDR1_45
G15
VDDR1_46
G19
VDDR1_47
G22
VDDR1_48
G27
VDDR1_49
H22
VDDR1_50
H19
VDDR1_51
AD4
VDDR1_52
L23
VDDR1_53
AE16
LVDDR_25_0
AE17
LVDDR_25_1
AF15
LVDDR_18_0
AE15
LVDDR_18_1
AH19
LPVDD
AH13
TPVDD
AF13
TXVDDR_0
AF14
TXVDDR_1
F18
VDDRH0
N6
VDDRH1
AF21
A2VDD_0
AE20
A2VDD_1
AF23
A2VDDQ
AH23
AVDD
AE23
VDD1DI
AE22
VDD2DI
AK28
PVDD
A7
MPVDD
M24P_BGA708
M24@
Security Classification
Part 4 of 5
POWER
VDDC_0 VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8
VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22 VDDC_23 VDDC_24 VDDC_25 VDDC_26 VDDC_27 VDDC_28 VDDC_29 VDDC_30 VDDC_31 VDDC_32 VDDC_33 VDDC_34 VDDC_35 VDDC_36 VDDC_37 VDDC_38 VDDC_39 VDDC_40
VDDC1_0 VDDC1_1 VDDC1_2 VDDC1_3
VDD15_0 VDD15_1 VDD15_2 VDD15_3 VDD15_4 VDD15_5 VDD15_6 VDD15_7
VDDR3_0 VDDR3_1 VDDR3_2 VDDR3_3 VDDR3_4 VDDR3_5 VDDR3_6
VDDR4_0 VDDR4_1 VDDR4_2 VDDR4_3 VDDR4_4
PCIE_VDDR_12_0 PCIE_VDDR_12_1 PCIE_VDDR_12_2 PCIE_VDDR_12_3 PCIE_VDDR_12_4
PCIE_PVDD_12_0 PCIE_PVDD_12_1 PCIE_PVDD_12_2
PCIE_PVDD_18_0 PCIE_PVDD_18_1 PCIE_PVDD_18_2 PCIE_PVDD_18_3
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
7500mA
AC13 AD13 AD15 AC15 AC17 P17 P18 P19 U12 U13 U14 U17 U18 U19 V19 V18 V17 V14 V13 V12 N18 N17 N14 W17 W18 W12 W13 W14 N13 N19 M19 M18 M12 N12 M13 M14 P12 P13 P14 M17 W19
0.1U_0402_16V4Z
W16 M15 R19 T12
50mA
P8 Y8 AC11 AC20 H20 H11 M23 Y23
AD7 AD19 AD21 AC22 AC8 AC21 AC19
AG7 AD9 AC9 AC10 AD10
AG26 AK29 AJ30 AG28 AG27
N24 N23 P23
U23 T23 V23 W23
C526
0.1U_0402_16V4Z
+VGA_CORE
C557
PM@
1 2
22U_1206_10V4Z
C314
PM@
1 2
22U_1206_10V4Z
C562
PM@
1 2
0.1U_0402_16V4Z C545
PM@
1 2
0.1U_0402_16V4Z C533
PM@
1 2
0.1U_0402_16V4Z C521
PM@
1 2
0.1U_0402_16V4Z C532
PM@
1 2
0.1U_0402_16V4Z C590
PM@
1 2
0.1U_0402_16V4Z C580
PM@
1 2
0.1U_0402_16V4Z C579
PM@
1 2
0.1U_0402_16V4Z C556
PM@
1 2
500mA
C530
0.1U_0402_16V4Z
1
C535
0.1U_0402_16V4Z
2
50mA
1000P_0402_50V7K
1
C501
PM@
2
1000P_0402_50V7K
1100mA
0.1U_0402_16V4Z
100mA
500mA
0.1U_0402_16V4Z
1
C548
PM@
2
Compal Secret Data
Deciphered Date
1
PM@
2
0.1U_0402_16V4Z
PM@
C596
1
2
1000P_0402_50V7K
1
PM@
2
C558
PM@
1 2
22U_1206_10V4Z
C312
PM@
1 2
22U_1206_10V4Z
C566
1 2
PM@
0.1U_0402_16V4Z C550
1 2
PM@
0.1U_0402_16V4Z C536
PM@
1 2
0.1U_0402_16V4Z C537
PM@
1 2
0.1U_0402_16V4Z C573
PM@
1 2
0.1U_0402_16V4Z C589
PM@
1 2
0.1U_0402_16V4Z C588
PM@
1 2
0.1U_0402_16V4Z C587
PM@
1 2
0.1U_0402_16V4Z C561
PM@
1 2
0.1U_0402_16V4Z
1
C553
C516
PM@
2
0.1U_0402_16V4Z
1
C606
C511
PM@
2
0.1U_0402_16V4Z
1
C509
PM@
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C614
PM@
2
0.1U_0402_16V4Z
1
C650
PM@
PM@
2
(20 mil)
1
C546
PM@
2
0.1U_0402_16V4Z
+VGA_CORE
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
0.1U_0402_16V4Z
1
C529
PM@
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C576
PM@
2
0.1U_0402_16V4Z
1
1
C525
PM@
2
2
1
C629
PM@
2
1000P_0402_50V7K
1
C92
2
0.1U_0402_16V4Z
2006/03/012005/03/01
2
C534
PM@
1 2
C315
PM@
1 2
C538
PM@
1 2
C531
PM@
1 2
C574
PM@
1 2
10U_0805_10V4Z
1
C567
PM@
2
1
C842
PM@
2
1
C568
C498
PM@
PM@
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C647
PM@
2
C98
PM@
2
C559
PM@
22U_1206_10V4Z
1
+VGA_CORE
1
1
+
330U_D_2VM
C836
PM@
+
C456 470U_D2_2.5VM
@
2
2
Reserve
2
2
C522
PM@
PM@
1
1
10U_0805_10V4Z
2
PM@
10U_0805_10V4Z
1
0.1U_0402_16V4Z
1
2
+1.8VS
+1.5VS
1
1
C571
C572
PM@
PM@
2
2
0.1U_0402_16V4Z
2
C648
PM@
PM@
1
10U_0805_10V4Z
PM@
Title
Size Document Number Rev
Custom
Date: Sheet
Compal Electron i cs, Inc.
M22P/24PWR
星期
, 03, 2005
四三月
+3VS 2
C846
PM@
10U_0805_10V4Z
1
+1.2VS
1
C630
PM@
22U_1206_10V4Z
2
2
C99 10U_0805_10V4Z
1
EAL30 LA-2691
1
of
17 52
1.0
Page 18
5
D D
C C
B B
A A
4
U6E
A2
AD12
AG5 AG9
AG11
AC4 AC12 AC14 AD16 AC16 AC18 AD18
W15
A10 A16 A22 A29
C28 C30 D27 D24 D21 D18 D15 D12 D10
F27 G12
G16 G18 G21 G24 H27 H23 H21 H18 H16 H14 H12
AB8 AB7 AB1
AK2 AJ1 M16 N16 N15 P15 P16 R18 R17 R16 R15 R14 R13 R12 T13 T14 T15
V16 V15 U15 U16 T19 T18 T17 T16
C1 C3
D6 D4
G9
H9 H8
H4 J23 J24
R7
P4 M7 M8
L4
K1
K7
K8 R8
T1 U4 U8
W7 W8
Y4
VSS_0 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91
M24P_BGA708
M24@
Part 5 of 5
GND
3
PCIE_VSS_0 PCIE_VSS_1 PCIE_VSS_2 PCIE_VSS_3 PCIE_VSS_4 PCIE_VSS_5 PCIE_VSS_6 PCIE_VSS_7 PCIE_VSS_8
PCIE_VSS_9 PCIE_VSS_10 PCIE_VSS_11 PCIE_VSS_12 PCIE_VSS_13 PCIE_VSS_14 PCIE_VSS_15 PCIE_VSS_16 PCIE_VSS_17 PCIE_VSS_18 PCIE_VSS_19 PCIE_VSS_20 PCIE_VSS_21 PCIE_VSS_22 PCIE_VSS_23 PCIE_VSS_24 PCIE_VSS_25 PCIE_VSS_26 PCIE_VSS_27 PCIE_VSS_28 PCIE_VSS_29 PCIE_VSS_30 PCIE_VSS_31 PCIE_VSS_32 PCIE_VSS_33 PCIE_VSS_34 PCIE_VSS_35 PCIE_VSS_36 PCIE_VSS_37 PCIE_VSS_38 PCIE_VSS_39
NC_0 NC_1 NC_2 NC_3 NC_4 NC_5 NC_6
AVSSQ
LVSSR_0 LVSSR_1 LVSSR_2 LVSSR_3
LPVSS TPVSS
TXVSSR_0 TXVSSR_1 TXVSSR_2
VSSRH0 VSSRH1
A2VSSN_0 A2VSSN_1
A2VSSQ
AVSSN
VSS1DI VSS2DI
PVSS
MPVSS
K28 L28 M27 M26 M24 M25 M28 P28 N28 R25 R23 R24 R26 R27 R28 T28 T24 U28 V24 V26 V27 V25 V28 Y28 W24 W28 AA26 AA27 AA23 AA24 AA25 AA28 AB28 AC28 AD28 AD26 AD27 AE28 AF28 AH29
D9 D13 D19 D25 E4 T4 AB4
AD22
AF18 AH17 AG15 AG18
AH18 AH12
AH14 AG13 AG14
F19 M6
AH20 AG21
AF22 AH22
AE24 AE21
AJ28
A6
2
1
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Deciphered Date
2006/03/012005/03/01
2
Title
Size Document Number Rev
Custom
Date: Sheet
Compal Electron i cs, Inc.
M22P/24P GND
, 03, 2005
EAL30 LA-2691
1
星期
四三月
of
18 52
1.0
Page 19
5
4
3
2
1
DQMA#[0..7]16 MAA[0..13]16
D D
C C
B B
MDA[0..63]16 DQSA[0..7]16
+1.8VS
R34
PM@
R36
PM@
C578
470P_0402_50V7K
@
12
12
DQMA#[0..7] MAA[0..13] MDA[0..63] DQSA[0..7]
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13
DQMA#1 DQMA#2
1
2
0.1U_0402_16V4Z
1 2 1 2
DQMA#3 DQMA#0
DQSA1 DQSA2 DQSA3 DQSA0
VR_VREF_1
MRASA# MCASA# MWEA# MCSA0#
MCKEA
1K_0402_1%
(25mil) (25mil)
C51
PM@
1K_0402_1%
MRASA#16 MCASA#16 MWEA#16 MCSA0#16
MCKEA16 MCLKA016
MCLKA0#16
R428 56_0402_1%@
12
R425 56_0402_1%@
B11
D10
VSSQB4VSSQ
VSSQD4VSSQD5VSSQD6VSSQD9VSSQ
VSS THF6VSS THF7VSS THF8VSS THF9VSS THG6VSS THG7VSS THG8VSS THG9VSS THH6VSS THH7VSS THH8VSS THH9VSS THJ6VSS THJ7VSS THJ8VSS TH
N10 N11
H12
H13
N13 M13
M10
N12 M11
M12
C11 H11
U8
N5
A0
N6
A1
M6
A2
N7
A3
N8
A4
M9
A5
N9
A6 A7 A8/AP
M8
A9
L6
A10
M7
A11
N4
BA0
M5
BA1
B3
DM0 DM1
H3
DM2
B12
DM3
B2
DQS0 DQS1
H2
DQS2
B13
DQS3 VREF
MCL
L9
RFU1 RFU2
M2
RAS#
L2
CAS#
L3
WE#
N2
CS# CKE CK
CK#
C4
NC NC
H4
NC NC
L12
NC
L13
NC
M3
NC
M4
NC
N3
NC
E7
VSS
E8
VSS
E10
VSS
K6
VSS
K7
VSS
K8
VSS
K9
VSS
L5
VSS
L10
VSS
E5
VSS
D11
VSSQ
VSSQE6VSSQE9VSSQF5VSSQ
F10
G10
VSSQG5VSSQ
H10
J10
K10
VSSQH5VSSQ
VSSQJ5VSSQ
VSSQK5VSSQ
B7
DQ0
C6
DQ1
B6
DQ2
B5
DQ3
C2
DQ4
D3
DQ5
D2
DQ6
E2
DQ7
K13
DQ8
K12
DQ9
J13
DQ10
J12
DQ11
G13
DQ12
G12
DQ13
F13
DQ14
F12
DQ15
F3
DQ16
F2
DQ17
G3
DQ18
G2
DQ19
J3
DQ20
J2
DQ21
K2
DQ22
K3
DQ23
E13
DQ24
D13
DQ25
D12
DQ26
C13
DQ27
B10
DQ28
B9
DQ29
C9
DQ30
B8
DQ31
C3
VDDQ
C5
VDDQ
C7
VDDQ
C8
VDDQ
C10
VDDQ
C12
VDDQ
E3
VDDQ
E12
VDDQ
F4
VDDQ
F11
VDDQ
G4
VDDQ
G11
VDDQ
J4
VDDQ
J11
VDDQ
K4
VDDQ
K11
VDDQ
D7
VDD
D8
VDD
E4
VDD
E11
VDD
L4
VDD
L7
VDD
L8
VDD
L11
VDD
K4D55323QF-GC33_FBGA144
J9
@
MDA9 MDA10 MDA12 MDA11 MDA15 MDA8 MDA13 MDA14 MDA22 MDA23 MDA21 MDA20 MDA18 MDA17 MDA19 MDA16 MDA29 MDA26 MDA30 MDA31 MDA27 MDA28 MDA24 MDA25 MDA0 MDA1 MDA2 MDA3 MDA5 MDA4 MDA6 MDA7
+1.8VS +1.8VS
+1.8VS
12
R28
PM@
12
R25
PM@
MCLKA116 MCLKA1#16
12
C485
470P_0402_50V7K
@
1K_0402_1%
1
C22
PM@
2
1K_0402_1%
1 2
R400 56_0402_1%@
1 2
R396 56_0402_1%@
B11
D10
D11
F10
G10
H10
J10
U5
VSSQB4VSSQ
VSSQD4VSSQD5VSSQD6VSSQD9VSSQ
VSSQ
VSSQE6VSSQE9VSSQF5VSSQ
MAA0
N5
MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13
DQMA#4 DQMA#6 DQMA#5 DQMA#7
DQSA4 DQSA6 DQSA5 DQSA7
VR_VREF_2
0.1U_0402_16V4Z
MRASA# MCASA# MWEA# MCSA0#
MCKEA
A0
N6
A1
M6
A2
N7
A3
N8
A4
M9
A5
N9
A6
N10
A7
N11
A8/AP
M8
A9
L6
A10
M7
A11
N4
BA0
M5
BA1
B3
DM0
H12
DM1
H3
DM2
B12
DM3
B2
DQS0
H13
DQS1
H2
DQS2
B13
DQS3
N13
VREF
M13
MCL
L9
RFU1
M10
RFU2
M2
RAS#
L2
CAS#
L3
WE#
N2
CS#
N12
CKE
M11
CK
M12
CK#
C4
NC
C11
NC
H4
NC
H11
NC
L12
NC
L13
NC
M3
NC
M4
NC
N3
NC
E7
VSS
E8
VSS
E10
VSS
K6
VSS
K7
VSS
K8
VSS
K9
VSS
L5
VSS
L10
VSS
E5
VSS
VSS THF6VSS THF7VSS THF8VSS THF9VSS THG6VSS THG7VSS THG8VSS THG9VSS THH6VSS THH7VSS THH8VSS THH9VSS THJ6VSS THJ7VSS THJ8VSS TH
VSSQG5VSSQ
K10
VSSQH5VSSQ
VSSQJ5VSSQ
VSSQK5VSSQ
B7
DQ0
C6
DQ1
B6
DQ2
B5
DQ3
C2
DQ4
D3
DQ5
D2
DQ6
E2
DQ7
K13
DQ8
K12
DQ9
J13
DQ10
J12
DQ11
G13
DQ12
G12
DQ13
F13
DQ14
F12
DQ15
F3
DQ16
F2
DQ17
G3
DQ18
G2
DQ19
J3
DQ20
J2
DQ21
K2
DQ22
K3
DQ23
E13
DQ24
D13
DQ25
D12
DQ26
C13
DQ27
B10
DQ28
B9
DQ29
C9
DQ30
B8
DQ31
C3
VDDQ
C5
VDDQ
C7
VDDQ
C8
VDDQ
C10
VDDQ
C12
VDDQ
E3
VDDQ
E12
VDDQ
F4
VDDQ
F11
VDDQ
G4
VDDQ
G11
VDDQ
J4
VDDQ
J11
VDDQ
K4
VDDQ
K11
VDDQ
D7
VDD
D8
VDD
E4
VDD
E11
VDD
L4
VDD
L7
VDD
L8
VDD
L11
VDD
K4D55323QF-GC33_FBGA144
J9
@
MDA39 MDA38 MDA37 MDA36 MDA35 MDA34 MDA33 MDA32 MDA51 MDA49 MDA50 MDA48 MDA54 MDA55 MDA53 MDA52 MDA44 MDA46 MDA43 MDA45 MDA42 MDA47 MDA41 MDA40 MDA63 MDA61 MDA62 MDA58 MDA57 MDA60 MDA56 MDA59
+1.8VS
10U_0805_10V4Z
C621
PM@
1
C594
2
PM@
0.1U_0402_16V4Z
1
2
10U_0805_10V4Z
A A
1
C581
PM@
2
0.1U_0402_16V4Z
As close as possible to relatived pin
0.1U_0402_16V4Z
1
C582
PM@
2
1
C583
PM@
2
0.1U_0402_16V4Z
1
2
C595
PM@
0.1U_0402_16V4Z
1
C607
PM@
2
0.1U_0402_16V4Z
1
C618
PM@
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C617
PM@
2
1
C616
PM@
2
0.1U_0402_16V4Z
1
C603
PM@
2
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
+1.8VS
10U_0805_10V4Z
1
C472
PM@
2
10U_0805_10V4Z
1
2
C491
PM@
0.1U_0402_16V4Z
1
C477
PM@
2
Compal Secret Data
Deciphered Date
0.1U_0402_16V4Z
1
C478
PM@
2
1
C479
PM@
2
0.1U_0402_16V4Z
2006/03/012005/03/01
2
0.1U_0402_16V4Z
1
C480
PM@
2
1
C514
PM@
2
0.1U_0402_16V4Z
1
C513
PM@
2
0.1U_0402_16V4Z
1
19 52
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
Size Document Number Rev
Date: Sheet
C492
PM@
Title
Custom
1
C499
PM@
2
0.1U_0402_16V4Z
Compal Electronics, Inc.
VGA DDR CHANNEL A EAL30 LA-2691
星期
, 03, 2005
四三月
1
C512
PM@
2
1.0
of
Page 20
5
4
3
2
1
NON32M@
(25mil)
C9
1 2
R349 56_0402_1%@
1 2
R350 56_0402_1%@
1
2
DQSB[0..7] MDB[0..63] DQMB#[0..7] MAB[0..13]
0.1U_0402_16V4Z
MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13
DQMB#0 DQMB#3 DQMB#1 DQMB#2
DQSB0 DQSB3 DQSB1 DQSB2
VR_VREF_3
MRASB# MCASB# MWEB# MCSB0#
MCKEB
B11
D10
VSSQB4VSSQ
VSSQD4VSSQD5VSSQD6VSSQD9VSSQ
VSS THF6VSS THF7VSS THF8VSS THF9VSS THG6VSS THG7VSS THG8VSS THG9VSS THH6VSS THH7VSS THH8VSS THH9VSS THJ6VSS THJ7VSS THJ8VSS TH
M13 M10
M11 M12
U2
N5
A0
N6
A1
M6
A2
N7
A3
N8
A4
M9
A5
N9
A6
N10
A7
N11
A8/AP
M8
A9
L6
A10
M7
A11
N4
BA0
M5
BA1
B3
DM0
H12
DM1
H3
DM2
B12
DM3
B2
DQS0
H13
DQS1
H2
DQS2
B13
DQS3
N13
VREF MCL
L9
RFU1 RFU2
M2
RAS#
L2
CAS#
L3
WE#
N2
CS#
N12
CKE CK
CK#
C4
NC
C11
NC
H4
NC
H11
NC
L12
NC
L13
NC
M3
NC
M4
NC
N3
NC
E7
VSS
E8
VSS
E10
VSS
K6
VSS
K7
VSS
K8
VSS
K9
VSS
L5
VSS
L10
VSS
E5
VSS
D11
VSSQ
VSSQE6VSSQE9VSSQF5VSSQ
F10
G10
VSSQG5VSSQ
H10
J10
K10
VSSQH5VSSQ
VSSQJ5VSSQ
VSSQK5VSSQ
B7
DQ0
C6
DQ1
B6
DQ2
B5
DQ3
C2
DQ4
D3
DQ5
D2
DQ6
E2
DQ7
K13
DQ8
K12
DQ9
J13
DQ10
J12
DQ11
G13
DQ12
G12
DQ13
F13
DQ14
F12
DQ15
F3
DQ16
F2
DQ17
G3
DQ18
G2
DQ19
J3
DQ20
J2
DQ21
K2
DQ22
K3
DQ23
E13
DQ24
D13
DQ25
D12
DQ26
C13
DQ27
B10
DQ28
B9
DQ29
C9
DQ30
B8
DQ31
C3
VDDQ
C5
VDDQ
C7
VDDQ
C8
VDDQ
C10
VDDQ
C12
VDDQ
E3
VDDQ
E12
VDDQ
F4
VDDQ
F11
VDDQ
G4
VDDQ
G11
VDDQ
J4
VDDQ
J11
VDDQ
K4
VDDQ
K11
VDDQ
D7
VDD
D8
VDD
E4
VDD
E11
VDD
L4
VDD
L7
VDD
L8
VDD
L11
VDD
K4D55323QF-GC33_FBGA144
J9
@
MDB7 MDB4 MDB6 MDB5 MDB0 MDB1 MDB2 MDB3 MDB24 MDB26 MDB29 MDB31 MDB30 MDB28 MDB25 MDB27 MDB14 MDB15 MDB13 MDB12 MDB9 MDB11 MDB8 MDB10 MDB21 MDB23 MDB22 MDB20 MDB16 MDB18 MDB17 MDB19
+1.8VS
+1.8VS
12
R12
NON32M@
12
R13
NON32M@
12
C412
470P_0402_50V7K
@
NON32M@
1K_0402_1%
(25mil)
C8
1K_0402_1%
MCLKB116 MCLKB1#16
1 2
R351 56_0402_1%@
1 2
R352 56_0402_1%@
B11
D10
D11
F10
G10
H10
J10
U1
VSSQB4VSSQ
VSSQD4VSSQD5VSSQD6VSSQD9VSSQ
VSSQ
VSSQE6VSSQE9VSSQF5VSSQ
MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13
DQMB#4 DQMB#7 DQMB#5 DQMB#6
DQSB4
1
DQSB7 DQSB5 DQSB6
2
VR_VREF_4
0.1U_0402_16V4Z
MRASB# MCASB# MWEB# MCSB0#
MCKEB
N5
A0
N6
A1
M6
A2
N7
A3
N8
A4
M9
A5
N9
A6
N10
A7
N11
A8/AP
M8
A9
L6
A10
M7
A11
N4
BA0
M5
BA1
B3
DM0
H12
DM1
H3
DM2
B12
DM3
B2
DQS0
H13
DQS1
H2
DQS2
B13
DQS3
N13
VREF
M13
MCL
L9
RFU1
M10
RFU2
M2
RAS#
L2
CAS#
L3
WE#
N2
CS#
N12
CKE
M11
CK
M12
CK#
C4
NC
C11
NC
H4
NC
H11
NC
L12
NC
L13
NC
M3
NC
M4
NC
N3
NC
E7
VSS
E8
VSS
E10
VSS
K6
VSS
K7
VSS
K8
VSS
K9
VSS
L5
VSS
L10
VSS
E5
VSS
VSS THF6VSS THF7VSS THF8VSS THF9VSS THG6VSS THG7VSS THG8VSS THG9VSS THH6VSS THH7VSS THH8VSS THH9VSS THJ6VSS THJ7VSS THJ8VSS TH
VSSQG5VSSQ
K10
VSSQH5VSSQ
VSSQJ5VSSQ
VSSQK5VSSQ
B7
DQ0
C6
DQ1
B6
DQ2
B5
DQ3
C2
DQ4
D3
DQ5
D2
DQ6
E2
DQ7
K13
DQ8
K12
DQ9
J13
DQ10
J12
DQ11
G13
DQ12
G12
DQ13
F13
DQ14
F12
DQ15
F3
DQ16
F2
DQ17
G3
DQ18
G2
DQ19
J3
DQ20
J2
DQ21
K2
DQ22
K3
DQ23
E13
DQ24
D13
DQ25
D12
DQ26
C13
DQ27
B10
DQ28
B9
DQ29
C9
DQ30
B8
DQ31
C3
VDDQ
C5
VDDQ
C7
VDDQ
C8
VDDQ
C10
VDDQ
C12
VDDQ
E3
VDDQ
E12
VDDQ
F4
VDDQ
F11
VDDQ
G4
VDDQ
G11
VDDQ
J4
VDDQ
J11
VDDQ
K4
VDDQ
K11
VDDQ
D7
VDD
D8
VDD
E4
VDD
E11
VDD
L4
VDD
L7
VDD
L8
VDD
L11
VDD
K4D55323QF-GC33_FBGA144
J9
@
MDB38 MDB39 MDB37 MDB36 MDB34 MDB35 MDB33 MDB32 MDB63 MDB62 MDB60 MDB61 MDB56 MDB58 MDB59 MDB57 MDB47 MDB45 MDB46 MDB44 MDB40 MDB43 MDB41 MDB42 MDB52 MDB54 MDB55 MDB53 MDB51 MDB50 MDB48 MDB49
+1.8VS
DQSB[0..7]16 MDB[0..63]16 DQMB#[0..7]16
D D
C C
B B
MAB[0..13]16
+1.8VS
12
R11
NON32M@
12
R14
NON32M@
MRASB#16 MCASB#16 MWEB#16 MCSB0#16
MCKEB16 MCLKB016
MCLKB0#16
12
C415
470P_0402_50V7K
@
1K_0402_1%
1K_0402_1%
+1.8VS +1.8VS
10U_0805_10V4Z
C436
NON32M@
10U_0805_10V4Z
1
2
5
C422
NON32M@
1
2
A A
As close as possible to relatived pin
1
C435
NON32M@
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C428
NON32M@
2
0.1U_0402_16V4Z
1
C446
NON32M@
2
0.1U_0402_16V4Z
1
C454
NON32M@
2
1
C452
NON32M@
2
0.1U_0402_16V4Z
4
0.1U_0402_16V4Z
1
C442
NON32M@
2
1
C438
NON32M@
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C433
NON32M@
2
Security Classification
1
C453
NON32M@
2
0.1U_0402_16V4Z
10U_0805_10V4Z
1
C427
NON32M@
2
10U_0805_10V4Z
1
C447
NON32M@
2
0.1U_0402_16V4Z
Compal Secret Data
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
0.1U_0402_16V4Z
1
C432
NON32M@
2
Deciphered Date
1
C437
NON32M@
2
1
C429
NON32M@
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1
C451
NON32M@
2
2006/03/012005/03/01
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
1
C450
NON32M@
C449
NON32M@
2
0.1U_0402_16V4Z
Compal Electron i cs, Inc.
Title
Size Document Number Rev
Custom
Date: Sheet
VGA DDR CHANNEL B EAL30 LA-2691
星期
, 03, 2005
四三月
1
C434
NON32M@
2
0.1U_0402_16V4Z
1
C441
NON32M@
2
1
0.1U_0402_16V4Z
1
C417
NON32M@
2
of
20 52
1.0
Page 21
5
4
3
2
1
LCD CONN.
LCD POWER CIRCUIT
GM@
GMCH_ENVDD7
ENVDD15
D D
+LCDVDD
12
R26
300_0402_5%
13
D
Q2
2N7002_SOT23
C C
B B
From EC
BKOFF#39
2
G
S
1 2
R192 0_0402_5%
+3VALW
2
1
R27 100K_0402_5%
1 2
+3VS
21
D4 RB751V_SOD323
reserved for GMCH
5
1
P
A2Y
G
C26
3
1U_0402_6.3V4Z
12
R10
4.7K_0402_5%
DISPOFF#
U4 SN74AHCT1G125GW_SOT353-5
4
OE#
R24 100_0402_5%
1 2
1
C23
2
0.047U_0402_16V7K
2
0.1U_0603_25V7K
+3VS
Q1
1 3
1
C21
4.7U_0805_10V4Z
2
1
C14
2
SI2301DS_SOT23
width = 60mil
INVPWR_B+
1 2 1 2
1
C15 68P_0402_50V8K
2
+LCDVDD
1
C19
0.1U_0402_16V4Z
2
L4 FBM-L11-201209-121LMT_0805
L5 FBM-L11-201209-121LMT_0805
B+
C18
0.1U_0402_16V4Z
INVPWR_B+
+3VS
R19 0_0805_5%
1
2
For ATI M24
DAC_BRIG39
INVT_PWM39 1 2
Width: 40mils
DAC_BRIG INVT_PWM
+3VS_LCD
LCD_CLK
TZCLK­TZCLK+
TZOUT1­TZOUT1+ TZOUT2+ TZOUT2­TZOUT0+ TZOUT0-
VGA_TXOUT0-15 VGA_TXOUT0+15 VGA_TXOUT1-15 VGA_TXOUT1+15 VGA_TXOUT2-15 VGA_TXOUT2+15 VGA_TXCLK-15 VGA_TXCLK+15 VGA_TZOUT0-15 VGA_TZOUT0+15 VGA_TZOUT1-15 VGA_TZOUT1+15 VGA_TZOUT2-15 VGA_TZOUT2+15 VGA_TZCLK-15 VGA_TZCLK+15
VGA_LCD_DATA15 VGA_LCD_CLK15
GMCH_TXOUT0-7 GMCH_TXOUT0+7 GMCH_TXOUT1-7 GMCH_TXOUT1+7 GMCH_TXOUT2-7 GMCH_TXOUT2+7 GMCH_TXCLK-7 GMCH_TXCLK+7 GMCH_TZOUT0-7 GMCH_TZOUT0+7 GMCH_TZOUT1-7 GMCH_TZOUT1+7 GMCH_TZOUT2-7 GMCH_TZOUT2+7 GMCH_TZCLK-7 GMCH_TZCLK+7
GMCH_LCD_DATA7 GMCH_LCD_CLK7
JP6
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
ACES_87216-3002
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15
R328 0_0402_5%PM@
1 2
R329 0_0402_5%PM@
1 2
R326 0_0402_5%PM@
1 2
R327 0_0402_5%PM@
1 2
R325 0_0402_5%PM@
1 2
R324 0_0402_5%PM@
1 2
R323 0_0402_5%PM@
1 2
R322 0_0402_5%PM@
1 2
R370 0_0402_5%PM@
1 2
R369 0_0402_5%PM@
1 2
R365 0_0402_5%PM@
1 2
R366 0_0402_5%PM@
1 2
R368 0_0402_5%PM@
1 2
R367 0_0402_5%PM@
1 2
R364 0_0402_5%PM@
1 2
R363 0_0402_5%PM@
1 2
R335 0_0402_5%PM@
1 2
R360 0_0402_5%PM@
1 2
R343 0_0402_5%GM@
1 2
R344 0_0402_5%GM@
1 2
R341 0_0402_5%GM@
1 2
R342 0_0402_5%GM@
1 2
R340 0_0402_5%GM@
1 2
R339 0_0402_5%GM@
1 2
R338 0_0402_5%GM@
1 2
R337 0_0402_5%GM@
1 2
R382 0_0402_5%GM@
1 2
R381 0_0402_5%GM@
1 2
R377 0_0402_5%GM@
1 2
R378 0_0402_5%GM@
1 2
R380 0_0402_5%GM@
1 2
R379 0_0402_5%GM@
1 2
R376 0_0402_5%GM@
1 2
R375 0_0402_5%GM@
1 2
R359 0_0402_5%GM@
1 2
R371 0_0402_5%GM@
1 2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
DISPOFF# +LCDVDD_LCD
LCD_DATA TXCLK+
TXCLK­TXOUT2+
TXOUT2­TXOUT1­TXOUT1+ TXOUT0­TXOUT0+
INVPWR_B+
1 2
R358 0_1206_5%
TXOUT0­TXOUT0+ TXOUT1­TXOUT1+ TXOUT2­TXOUT2+ TXCLK­TXCLK+ TZOUT0­TZOUT0+ TZOUT1­TZOUT1+ TZOUT2­TZOUT2+ TZCLK­TZCLK+
LCD_DATA LCD_CLK
TXOUT0­TXOUT0+ TXOUT1­TXOUT1+ TXOUT2­TXOUT2+ TXCLK­TXCLK+ TZOUT0­TZOUT0+ TZOUT1­TZOUT1+ TZOUT2­TZOUT2+ TZCLK­TZCLK+
LCD_DATA LCD_CLK
+LCDVDD
For GMCH
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Deciphered Date
Compal Electronics, Inc.
2006/03/012005/03/01
2
Title
Size Document Number Rev
Custom
Date: Sheet
星期
, 03, 2005
四三月
LCD CONN EAL30 LA-2691
1
of
21 52
1.0
Page 22
A
B
C
D
E
D3
3
HSYNC_L
VSYNC_L
1
2
D20
DAN217_SC59@
1
2
DSUB_12
DSUB_15
DAN217_SC59@
+5VS
2 1
RB411D_SOT23
100P_0402_50V8J
C391 10P_0402_50V8J
+CRT_VCC
R310
4.7K_0402_5%
1
D23
C390
12
W=40mils
POLYSWITCH_1A
0.1U_0402_16V4Z
DDC_MD2
1
2
C393
68P_0402_50V8K
12
R309
4.7K_0402_5%
Q31 BSS138_SOT23
F1
1
C1
2
1
2
1
2
R312 0_0402_5%PM@
R311 0_0402_5%GM@
2
G
1 3
D
S
1 3
D
Q32
BSS138_SOT23
C389 68P_0402_50V8K
1 2
1 2
2
D1
CRT_R_L
CRT_G_L
CRT_B_L
C3
@
DAN217_SC59@
1
2
CRT Connector
1 1
R4 0_0402_5%PM@
VGA_CRT_R15 GMCH_CRT_R7
VGA_CRT_G15 GMCH_CRT_G7
VGA_CRT_B15 GMCH_CRT_B7
2 2
3 3
R5 0_0402_5%GM@ R1 0_0402_5%PM@
R6 0_0402_5%GM@ R2 0_0402_5%PM@
R3 0_0402_5%GM@
VGA_CRT_HSYNC15 GMCH_CRT_HSYNC7
1 2 1 2
1 2 1 2
1 2 1 2
1 2
R315 0_0402_5%PM@
1 2
R317 39_0402_5%GM@
VGA_CRT_VSYNC15 GMCH_CRT_VSYNC7
R8
150_0402_1%
C396 0.1U_0402_16V4Z
12
12
1 2
R314 0_0402_5%PM@ R313 39_0402_5%GM@
CRT_R
CRT_G
CRT_B
12
R9
150_0402_1%
CRT_HSYNC D_CRT_HSYNC
1 2 1 2
1
R7
150_0402_1%
C7
2
8P_0402_50V8K
+CRT_VCC
5
1
P
4
OE#
A2Y
G
U27
SN74AHCT1G125GW_SOT353-5
3
1 2
C395 0.1U_0402_16V4Z
CRT_VSYNC
1
C6
2
8P_0402_50V8K
+CRT_VCC
5
P
A2Y
G
3
1
OE#
U26 SN74AHCT1G125GW_SOT353-5
+3VS
1 2
L2
FCM2012C-800_0805
1 2
L1
FCM2012C-800_0805
1 2
L3
FCM2012C-800_0805
1
C2
2
R316 10K_0402_5%
4
8P_0402_50V8K
8P_0402_50V8K
12
D_CRT_VSYNC
TV-Out Connector
D2
DAN217_SC59@
1
2
@
8P_0402_50V8K
1 2
L20 FCM1608C-121T_0603
1 2
L21 FCM1608C-121T_0603
1
3
2
3
1
C5
@
C4
2
8P_0402_50V8K
10P_0402_50V8J
D21
1
2
1
2
C392
DAN217_SC59@
1
W=40mils
6
11
1 7
12
2 8
13
3 9
14
4 10 15
5
DSUB_12
DSUB_15
G
S
+CRT_VCC+R_CRT_VCC
JP1 FOX_DZ11A91-L7
R303 0_0402_5%GM@
R803 0_0402_5%PM@
1 2
R804 0_0402_5%PM@
1 2
R318
+3VS
+2.5VS
12
0_0402_5%GM@
12
GMCH_CRT_DATA 7
VGA_DDC_DATA 15
VGA_DDC_CLK 15
GMCH_CRT_CLK 7
VGA_TV_LUMA15
GMCH_TV_LUMA7
VGA_TV_CRMA15 GMCH_TV_CRMA7
4 4
1 2
R332 0_0402_5%PM@
1 2
R333 0_0402_5%GM@
1 2
R331 0_0402_5%PM@
1 2
R330 0_0402_5%GM@
12
R321
150_0402_1%
12
R320
150_0402_1%
C402 100P_0402_50V8J
L23
1 2
FBM-11-160808-121-T_0603
L22
1 2
FBM-11-160808-121-T_0603
C401 100P_0402_50V8J
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
C
2
3
LUMA_1
CRMA_1
C398 100P_0402_50V8J
2
3
C397 100P_0402_50V8J
Compal Secret Data
Deciphered Date
+3VS
JP3
1
1
2 3 4
SUYIN_030336FR004T115ZU
5
2
GND
6
3
GND
4
TV-OUT Conn.
D
1. Y ground
2. C ground
3. Y (luminance+sync)
4. C (crominance)
2006/03/012005/03/01
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
CRT & TV-OUT Connector EAL30 LA-2691
星期
, 03, 2005
四三月
E
of
22 52
1.0
Page 23
A
1 1
B
C
D
RP2
+3VS
+3VS
2 2
+3VS
+3VS
+3VS
3 3
+3VS
1 8 2 7 3 6 4 5
8.2K_0804_8P4R_5%
RP46
1 8 2 7 3 6 4 5
8.2K_0804_8P4R_5%
RP45
1 8 2 7 3 6 4 5
8.2K_0804_8P4R_5%
RP1
1 8 2 7 3 6 4 5
8.2K_0804_8P4R_5%
RP47
1 8 2 7 3 6 4 5
8.2K_0804_8P4R_5%
RP3
1 8 2 7 3 6 4 5
8.2K_0804_8P4R_5%
PCI_SERR# PCI_TRDY# PCI_FRAME# PCI_STOP#
PCI_PLOCK# PCI_IRDY# PCI_PERR# PCI_REQ#4 PCI_DEVSEL#
PCI_PIRQD# PCI_PIRQB# PCI_PIRQC# PCI_PIRQA#
PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_REQ#6
PCI_REQ#5 PCI_REQ#3 PCI_REQ#1 PCI_REQ#4
PCI_REQ#0 PCI_REQ#2 PCI_PIRQH#
PCI_AD[0..31]29,31,34
PCI_FRAME#29,31,34
PCI_PIRQA#31 PCI_PIRQB#31
PCI_PIRQC#31 PCI_PIRQD#31 PCI_PIRQH# 34
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_FRAME#
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
U36B
E2
AD[0]
E5
AD[1]
C2
AD[2]
F5
AD[3]
F3
AD[4]
E9
AD[5]
F2
AD[6]
D6
AD[7]
E6
AD[8]
D3
AD[9]
A2
AD[10]
D2
AD[11]
D5
AD[12]
H3
AD[13]
B4
AD[14]
J5
AD[15]
K2
AD[16]
K5
AD[17]
D4
AD[18]
L6
AD[19]
G3
AD[20]
H4
AD[21]
H2
AD[22]
H5
AD[23]
B3
AD[24]
M6
AD[25]
B2
AD[26]
K6
AD[27]
K3
AD[28]
A5
AD[29]
L1
AD[30]
K4
AD[31]
J3
FRAME#
Interrupt I/F
N2
PIRQ[A]#
L2
PIRQ[B]#
M1
PIRQ[C]#
L3
PIRQ[D]#
AC5
SATA[1]RXN/RSVD[1]
AD5
SATA[1]RXP/RSVD[2]
AF4
SATA[1]TXN/RSVD[3]
AG4
SATA[1]TXP/RSVD[4]
AC9
SATA[3]RXN/RSVD[5]
AD9
SATA[3]RXP/RSVD[6]
AF8
SATA[3]TXN/RSVD[7]
AG8
SATA[3]TXP/RSVD[8]
U3
TP[3]/RSVD[9]
ICH6_BGA609
PCI
REQ[4]#/GPI[40]
GNT[4]#/GPO[48]
REQ[5]#/GPI[1]
GNT[5]#/GPO[17]
REQ[6]#/GPI[0]
GNT[6]#/GPO[16]
PIRQ[E]#/GPI[2]
PIRQ[F]#/GPI[3] PIRQ[G]#GPI[4]
PIRQ[H]#/GPI[5]
RESERVED
REQ[0]#
GNT[0]#
REQ[1]#
GNT[1]#
REQ[2]#
GNT[2]#
REQ[3]#
GNT[3]#
C/BE[0]# C/BE[1]# C/BE[2]# C/BE[3]#
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR# STOP# TRDY#
PLTRST#
PCICLK
PME#
PCI_REQ#0
L5 C1
PCI_REQ#1
B5
PCI_GNT#1
B6
PCI_REQ#2
M5
PCI_GNT#2
F1
PCI_REQ#3
B8
PCI_GNT#3
C8 F7 E7
PCI_REQ#5
E8
PCI_GNT#5
F6
PCI_REQ#6
B7 D8
PCI_CBE#0
J6
PCI_CBE#1
H6
PCI_CBE#2
G4
PCI_CBE#3
G2
PCI_IRDY#
A3
PCI_PAR
E1
PCI_RST#
R2
PCI_DEVSEL#
C3
PCI_PERR#
E3
PCI_PLOCK#
C5
PCI_SERR#
G5
PCI_STOP#
J1
PCI_TRDY#
J2
PLT_RST#
R5
CLK_ICH_PCI
G6 P6
PCI_PIRQE#
D9
PCI_PIRQF#
C7
PCI_PIRQG#
C6
PCI_PIRQH#
M3
PCI_REQ#1 34 PCI_GNT#1 34
PCI_REQ#2 31
PCI_GNT#2 31 PCI_REQ#3 29 PCI_GNT#3 29
PCI_CBE#0 29,31,34 PCI_CBE#1 29,31,34 PCI_CBE#2 29,31,34 PCI_CBE#3 29,31,34
PCI_ I RDY# 29,31,34 PCI_PAR 29,31,34 PCI_RST# 28,29,31,34,35,39 PCI_DEVSEL# 29,31,34 PCI_PERR# 29,31,34
PCI_SERR# 29,31,34 PCI_STOP# 29,31,34 PCI_TRDY# 29,31,34
PLT_RST# 6,15,25,27,28,31,35,39 CLK_PCI_ICH 14
add PIRQF for PCI LAN
PCI_PIRQF# 29 PCI_PIRQG# 34
Internal Pull-up. Sample high de s tina tion is LPC.
PCI_GNT#5
12
R38
0_0402_5%@
CLK_PCI_ICH
R43
10_0402_5%@
1 2 1
C67
10P_0402_50V8J@
2
ICH6-M (R3:SA828010890) (R1:SA8280108B0)
4 4
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Deciphered Date
C
2006/03/012005/03/01
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
ICH6(1/4)_HUB,PCI,HOST
EAL30 LA-2691
星期四 三月
, 03, 2005
D
of
23 52
1.0
Page 24
A
C628
18P_0402_50V8J
12
Y5
NC NC
C627
12
10P_0402_50V8J@
1 2
AC97_SDIN036 AC97_SDIN136
PHDD_LED#39
IDE_IRQ28
OUT
IN
12
C54
1 2
4 1
12
12
SATA_DTX_C_IRX_N0 SATA_DTX_C_IRX_P0 SATA_ITX_DRX_N0 SATA_ITX_DRX_P0
3 2
18P_0402_50V8J
@
C649
1 2
R32 33_0402_5% R30 33_0402_5%
R35 33_0402_5%
CLK_PCIE_SATA#14 CLK_PCIE_SATA14
1 2
IDE_DIORDY28
IDE_DDACK#28 IDE_DIOW#28 IDE_DIOR#28
+3VS
+RTCVCC
12
R73 1M_0402_1%
INTRUDER#
+3VS
12
R75 10K_0402_5%
PHDD_LED#
SATA_ITX_C_DRX_N027
SATA_ITX_C_DRX_P027
R451 4.7K_0402_5%
R76 8.2K_0402_5%
R834 1K_0402_5% R835 1K_0402_5%
1 2
1 2
1 2 1 2
32.768KHZ_12.5P_1TJS125DJ2A073
+RTCVCC
close to RAM door
AC97_BITCLK36
AC97_SYNC36 AC97_RST#36
AC97_SDOUT36
SATA_DTX_C_IRX_N027 SATA_DTX_C_IRX_P027
Place near ICH6 side.
IDE_DIORDY
IDE_IRQ
SATA2_RXN SATA2_RXP
1 2
R74 20K_0402_5%
J1 JOPEN
1U_0402_6.3V4Z
1 2
C6690.01U_0402_16V7K
1 2
C6680.01U_0402_16V7K
R450 24.9_0402_1%
1 1
2 2
3 3
ICH_RTCX1
R438
ICH_RTCX2
ICH_RTCRST#
R33 10_0402_5%@
AC97_BITCLK AC97_SYNC_R
AC97_RST_R# AC_SDIN0
AC97_SDOUT_R
PHDD_LED#
SATA2_RXN SATA2_RXP
CLK_PCIE_SATA# CLK_PCIE_SATA
IDE_DIORDY IDE_IRQ IDE_DDACK# IDE_DIOW# IDE_DIOR#
B
12
10M_0402_5%
INTRUDER# INTVRMEN
12
SATARBIAS
AC19
AG11
AF11
AF16 AB16 AB15 AC14 AE16
AG2 AF2
AD7 AC7 AF6 AG6
AC2 AC1
AA2 AA3
AA5
D12 B12 D11 F13
F12 B11 E12
E11 C13
C12 C11 E13
C10
A10 F11
F10 B10
C9
AE3 AD3
U36A
Y1
RTCX1
Y2
RTCX2 RTCRST# INTRUDER#
INTVRMEN
EE_CS EE_SHCLK EE_DOUT EE_DIN
LAN_CLK LAN_RSTSYNC LANRXD[0]
LANRXD[1] LANRXD[2]
LANTXD[0] LANTXD[1] LANTXD[2]
ACZ_BIT_CLK
B9
ACZ_SYNC ACZ_RST# ACZ_SDIN[0]
ACZ_SDIN[1] ACZ_SDIN[2]
ACZ_SDO
SATALED#
SATA[0]RXN SATA[0]RXP SATA[0]TXN SATA[0]TXP
SATA[2]RXN SATA[2]RXP SATA[2]TXN SATA[2]TXP
SATA_CLKN SATA_CLKP
SATARBIAS# SATARBIAS
IORDY IDEIRQ DDACK# DIOW# DIOR#
ICH6_BGA609ICH6@
RTC
LAD[0]/FWH[0] LAD[1]/FWH[1] LAD[2]/FWH[2] LAD[3]/FWH[3]
LPC
LDRQ[0]#
LDRQ[1]#/GPI[41]
LFRAME#/FWH[4]
A20GATE
A20M#
LAN
CPUSLP#
CPU
DPRSLP#/TP[4]
DPSLP#/TP[2]
FERR#
CPUPWRGD/GPO[49]
IGNNE#
INIT3_3V#
RCIN#
STPCLK#
THRMTRIP#
DCS1# DCS3#
SATAAC-97/AZALIA
DD[0] DD[1] DD[2] DD[3]
PIDE
DD[4] DD[5] DD[6] DD[7] DD[8]
DD[9] DD[10] DD[11] DD[12] DD[13] DD[14] DD[15]
DDREQ
INIT# INTR
NMI
SMI#
DA[0] DA[1] DA[2]
LPC_LAD0
P2
LPC_LAD1
N3
LPC_LAD2
N5
LPC_LAD3
N4 N6
LPC_DRQ#1
P4
LPC_FRAME#
P3
EC_GA20
AF22
H_A20M#
AF23
R437 0_0402_5%@
AE27
R431 0_0402_5%
AE24 AD27
AF24
H_PWRGOOD
AG25
H_IGNNE#
AG26 AE22
H_INIT#
AF27
H_INTR
AG24
KB_RST#
AD23
H_NMI
AF25
H_SMI#
AG27
H_STPCLK#
AE26
THRMTRIP#
AE23
IDE_DA0
AC16
IDE_DA1
AB17
IDE_DA2
AC17
IDE_DCS1#
AD16
IDE_DCS3#
AE17
IDE_DD0
AD14
IDE_DD1
AF15
IDE_DD2
AF14
IDE_DD3
AD12
IDE_DD4
AE14
IDE_DD5
AC11
IDE_DD6
AD11
IDE_DD7
AB11
IDE_DD8
AE13
IDE_DD9
AF13
IDE_DD10
AB12
IDE_DD11
AB13
IDE_DD12
AC13
IDE_DD13
AE15
IDE_DD14
AG15
IDE_DD15
AD13
IDE_DDREQ
AB14
C
LPC_AD0 35,39 LPC_AD1 35,39 LPC_AD2 35,39 LPC_AD3 35,39
LPC_DRQ#1 35
LPC_FRAME# 35,39
R442 10K_0402_5%
EC_GA20 39 H_A20M# 4
1 2 1 2
H_DPSLP# 4
1 2
R434 56_0402_5%
H_PWRGOOD 4 H_IGNNE# 4 H_INIT# 4
H_INTR 4
EC_KBRST# 39
H_NMI 4 H_SMI# 4
H_STPCLK# 4
IDE_DA0 28 IDE_DA1 28 IDE_DA2 28
IDE_DCS1# 28 IDE_DCS3# 28
IDE_DD[0..15] 28
IDE_DDREQ 28
1 2
H_CPUSLP# H_DPRSTP#
H_FERR#
R460
10K_0402_5%
1 2
+3VS
+3VS
H_CPUSLP# 4,6
H_DPRSTP# 4
H_FERR# 4
+1.05VS
+1.05VS
H_FERR# H_DPRSTP#
Intel Recommand
R465
330_0402_5%@
1 2
1 2
R459 75_0402_1%
2
B
D
1 2
R435 56_0402_5%
1 2
R432 56_0402_5%@
Q36
2SC2411K_SC59@
R452 56_0402_5%
H_THERMTRIP#
MAINPWON 43,44,46
12
1
C
E
3
+1.05VS
THRMTRIP#
H_THERMTRIP# 4,6
4 4
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Deciphered Date
C
2006/03/012005/03/01
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
ICH6(2/4)_CPU,AC97,IDE,LPC EAL30 LA-2691
星期四 三月
D
1.0
of
24 52, 03, 2005
Page 25
A
B
C
D
E
F
G
H
+3VALW
1 2
R60 10K_0402_5%
1 2
R54 10K_0402_5%
1 2
R63 2.2K_0402_5%
1 1
2 2
1 2
R64 2.2K_0402_5%
1 2
R70 10K_0402_5%
1 2
R49 10K_0402_5%@
1 2
R55 10K_0402_5%
1 2
R66 8.2K_0402_5%
1 2
R240 1K_0402_1%
1 2
R61 10K_0402_5%
+3VS
1 2
R455 10K_0402_5%
1 2
R447 8.2K_0402_5%
1 2
R448 10K_0402_5%
1 2
R449 10K_0402_5%
1 2
R69 10K_0402_5%
1 2
R77 10K_0402_5%
1 2
R65 10K_0402_5%
RP48
4 5 3 6 2 7 1 8
100_1206_8P4R_5%
1 2
R288 100K_0402_5%
Intel new update
3 3
ICH_SMLINK0 ICH_SMLINK1 CK_SCLK CK_SDATA LINKALERT# EC_LID_OUT# EC_SWI# PM_BATLOW# WAKE# SYSRST#
ICH_GPI7 PM_CLKRUN# ICH_VGATE MCH_SYNC# SERIRQ
SYS_PWROK EC_RSMRST#
GPI29 GPI28 GPI27 GPI26
PM_DPRSLPVR
R439 0_0402_5%
1 2
ACIN38,39,43
D25 RB751V_SOD323
+3VALW
21
@
12
R218100K_0402_5% @
EC_SWI#39
CK_SCLK14
CK_SDATA14
SB_SPKR36
SUS_STAT#40
PM_BMBUSY#6
EC_SMI#39
EC_LID_OUT#39
EC_SCI#39
PM_STP_PCI#14
SB_INT_FLASH_SEL#40
PM_STP_CPU#14,50
PLTRST_VGA#15
IDE_HDDRST#27 IDE_ODDRST#39
EC_FLASH#40
PM_CLKRUN#29,34,35
SERIRQ31,35,39
EC_THERM#39
VGATE6,14,50
PM_SLP_S3#39
SYS_PWROK38
PM_DPRSLPVR50
PBTN_OUT#39
PLT_RST#6,15,23,27,28,31,35,39
EC_RSMRST#39
EC_SWI# GPI26
GPI27 GPI28 GPI29
CK_SCLK CK_SDATA LINKALERT# ICH_SMLINK0 ICH_SMLINK1 MCH_SYNC# SB_SPKR
SYSRST# PM_BMBUSY# ICH_GPI7
EC_SMI#
EC_LID_OUT# EC_SCI#
PM_STP_PCI#
PM_STP_CPU#
PLTRST_VGA#
EC_FLASH# PM_CLKRUN#
WAKE# SERIRQ EC_THERM#
ICH_VGATE
12
R456 0_0402_5%
CLK_14M_ICH CLK_48M_ICH
SLP_S3# SLP_S4# SLP_S5#
SYS_PWROK PM_DPRSLPVR PM_BATLOW# PBTN_OUT# PLT_RST# EC_RSMRST#
U36C
T2
RI#
AF17
SATA[0]GP/GPI[26]
AE18
SATA[1]GP/GPI[29]
AF18
SATA[2]GP/GPI[30]
AG18
SATA[3]GP/GPI[31]
Y4
SMBCLK
W5
SMBDATA
Y5
LINKALERT#
W4
SMLINK[0]
U6
SMLINK[1]
AG21
MCH_SYNC#
F8
SPKR
W3
SUS_STAT#/LPCPD#
U2
SYS_RESET#
AD19
BM_BUSY#/GPI[6]
AE19
GPI[7]
R1
GPI[8]
W6
SMBALERT#/GPI[11]
M2
GPI[12]
R6
GPI[13]
AC21
STP_PCI#/GPO[18]
AB21
GPO[19]
AD22
STP_CPU#/GPO[20]
AD20
GPO[21]
AD21
GPO[23]
V3
GPIO[24]
P5
GPIO[25]
R3
GPIO[27]
T3
GPIO[28]
AF19
CLKRUN#/GPIO[32]
AF20
GPIO[33]
AC18
GPIO[34]
U5
WAKE#
AB20
SERIRQ
AC20
THRM#
AF21
VRMPWRGD
E10
CLK14
A27
CLK48
V6
SUSCLK
T4
SLP_S3#
T5
SLP_S4#
T6
SLP_S5#
AA1
PWROK
AE20
DPRSLPVR/TP[1]
V2
BATLOW#/TP[0]
U1
PWRBTN#
V5
LAN_RST#
Y3
RSMRST#
ICH6_BGA609
GPIO
CLOCK
POWER MGT
PERn[1] PERp[1]
PETn[1] PETp[1]
PERn[2] PERp[2]
PETn[2] PETp[2]
PERn[3] PERp[3]
PETn[3] PETp[3]
PERn[4] PERp[4]
PETn[4]
PCI-EXPRESSDIRECT MEDIA INTERFACE
PETp[4]
DMI[0]RXN
DMI[0]RXP DMI[0]TXN DMI[0]TXP
DMI[1]RXN
DMI[1]RXP DMI[1]TXN DMI[1]TXP
DMI[2]RXN
DMI[2]RXP DMI[2]TXN DMI[2]TXP
DMI[3]RXN
DMI[3]RXP DMI[3]TXN DMI[3]TXP
DMI_CLKN
DMI_CLKP
DMI_ZCOMP
DMI_IRCOMP
OC[4]#/GPI[9] OC[5]#/GPI[10] OC[6]#/GPI[14] OC[7]#/GPI[15]
OC[0]# OC[1]# OC[2]# OC[3]#
USBP[0]N USBP[0]P USBP[1]N USBP[1]P USBP[2]N USBP[2]P USBP[3]N USBP[3]P
USB
USBP[4]N USBP[4]P USBP[5]N USBP[5]P USBP[6]N USBP[6]P USBP[7]N USBP[7]P
USBRBIAS#
USBRBIAS
H25 H24 G27 G26
K25 K24 J27 J26
M25 M24 L27 L26
P24 P23 N27 N26
T25 T24 R27 R26
V25 V24 U27 U26
Y25 Y24 W27 W26
AB24 AB23 AA27 AA26
AD25 AC25
F24 F23 C23
D23 C25 C24
C27 B27 B26 C26
C21 D21 A20 B20 D19 C19 A18 B18 E17 D17 B16 A16 C15 D15 A14 B14
A22 B22
DMI_MTX_IRX_N0 DMI_MTX_IRX_P0 DMI_ITX_MRX_N0 DMI_ITX_MRX_P0
DMI_MTX_IRX_N1 DMI_MTX_IRX_P1 DMI_ITX_MRX_N1 DMI_ITX_MRX_P1
DMI_MTX_IRX_N2 DMI_MTX_IRX_P2 DMI_ITX_MRX_N2 DMI_ITX_MRX_P2
DMI_MTX_IRX_N3 DMI_MTX_IRX_P3 DMI_ITX_MRX_N3 DMI_ITX_MRX_P3
CLK_PCIE_ICH# CLK_PCIE_ICH
DMI_IRCOMP USB_OC#4
USB_OC#5 USB_OC#6 USB_OC#7
USB_OC#0 USB_OC#1 USB_OC#2 USB_OC#3
USB20_N0 USB20_P0
USB20_N2 USB20_P2
USB20_N4 USB20_P4
USBRBIAS
DMI_MTX_IRX_N0 6 DMI_MTX_IRX_P0 6 DMI_ITX_MRX_N0 6 DMI_ITX_MRX_P0 6
DMI_MTX_IRX_N1 6 DMI_MTX_IRX_P1 6 DMI_ITX_MRX_N1 6 DMI_ITX_MRX_P1 6
DMI_MTX_IRX_N2 6 DMI_MTX_IRX_P2 6 DMI_ITX_MRX_N2 6 DMI_ITX_MRX_P2 6
DMI_MTX_IRX_N3 6 DMI_MTX_IRX_P3 6 DMI_ITX_MRX_N3 6 DMI_ITX_MRX_P3 6
CLK_PCIE_ICH# 14 CLK_PCIE_ICH 14
R39 24.9_0402_1%
1 2
USB_OC#4 41
USB_OC#0 41 USB_OC#2 41
USB20_N0 41 USB20_P0 41
USB20_N2 41 USB20_P2 41
USB20_N4 41 USB20_P4 41
1 2
R31 21.5_0402_1%
+1.5VS
USB_OC#5 USB_OC#7 USB_OC#6 USB_OC#3
USB_OC#1
+3VALW
RP4
4 5 3 6 2 7 1 8
10K_0804_8P4R_5%
1 2
R411 10K_0402_5%
+3VALW
C623
0.1U_0402_16V4Z
1 2
14
CLK_ICH_48M14 CLK_ICH_14M14
4 4
CLK_48M_ICH CLK_14M_ICH
12
R412
10_0402_5%@
1
C506
10P_0402_50V8J@
2
12
R41
10_0402_5%@
1
C68
10P_0402_50V8J@
2
PM_SLP_S5#39
U13B
6
O
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
C
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
SLP_S4#
4
P
A
SLP_S5#
5
B
G
7
SN74LVC08APW_TSSOP14
E
Deciphered Date
2006/03/012005/03/01
F
RTC Battery
BATT1
45@
-
ML1220T13RE
BAS40-04_SOT23
+RTCVCC
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
星期四 三月
, 03, 2005
G
+RTCPWR
+
12
1
D26
3
1 2
0.1U_0402_16V4Z
2
C679
+CHGRTC
ICH6(3/4)_USB,PM,LAN,GPIO EAL30 LA-2691
25 52
of
H
1.0
Page 26
5
4
3
2
1
+1.5VALW
+1.5VS
0.1U_0402_16V4Z
1 2
0.1U_0402_16V4Z
1 2
0.1U_0402_16V4Z
1 2
0.1U_0402_16V4Z
1 2
0.1U_0402_16V4Z
1 2
0.1U_0402_16V4Z
1 2
0.1U_0402_16V4Z
1 2
0.1U_0402_16V4Z
1 2
0.1U_0402_16V4Z
1 2
0.1U_0402_16V4Z
1 2
0.01U_0402_16V7K
1 2
Near PIN A25
0.01U_0402_16V7K
1 2
Near PIN AA19
+3VALW
C61
0.1U_0402_16V4Z
1 2
C89
0.1U_0402_16V4Z
1 2
C91
0.1U_0402_16V4Z
1 2
C523
0.1U_0402_16V4Z
1 2
Near PIN A24
+3VS
0.1U_0402_16V4Z
1 2
0.1U_0402_16V4Z
1 2
Near PIN AG10
2
C69
C77
C83
C90
C78
C667
C94
C85
C86
C79
C524
C93
C62
C671
2006/03/012005/03/01
U36D
E27
VSS[172]
Y6
VSS[171]
Y27
VSS[170]
Y26
VSS[169]
Y23
VSS[168]
W7
VSS[167]
W25
VSS[166]
W24
VSS[165]
W23
VSS[164]
W1
VSS[163]
V4
VSS[162]
V27
VSS[161]
V26
VSS[160]
V23
VSS[159]
U25
VSS[158]
U24
VSS[157]
U23
VSS[156]
U15
VSS[155]
U13
VSS[154]
T7
VSS[153]
T27
VSS[152]
T26
VSS[151]
T23
VSS[150]
T16
VSS[149]
T15
VSS[148]
T14
VSS[147]
T13
VSS[146]
T12
VSS[145]
T1
VSS[144]
R4
VSS[143]
R25
VSS[142]
R24
VSS[141]
R23
VSS[140]
R17
VSS[139]
R16
VSS[138]
R15
VSS[137]
R14
VSS[136]
R13
VSS[135]
R12
VSS[134]
R11
VSS[133]
P22
VSS[132]
P16
VSS[131]
P15
VSS[130]
P14
VSS[129]
P13
VSS[128]
P12
VSS[127]
N7
VSS[126]
N17
VSS[125]
N16
VSS[124]
N15
VSS[123]
N14
VSS[122]
N13
VSS[121]
N12
VSS[120]
N11
VSS[119]
N1
VSS[118]
M4
VSS[117]
M27
VSS[116]
M26
VSS[115]
M23
VSS[114]
M16
VSS[113]
M15
VSS[112]
M14
VSS[111]
M13
VSS[110]
M12
VSS[109]
L25
VSS[108]
L24
VSS[107]
L23
VSS[106]
L15
VSS[105]
L13
VSS[104]
K7
VSS[103]
K27
VSS[102]
K26
VSS[101]
K23
VSS[100]
K1
VSS[99]
J4
VSS[98]
J25
VSS[97]
J24
VSS[96]
J23
VSS[95]
H27
VSS[94]
H26
VSS[93]
H23
VSS[92]
G9
VSS[91]
G7
VSS[90]
G21
VSS[89]
G12
VSS[88]
G1
VSS[87]
ICH6_BGA609
Title
Size Document Number Rev
星期
Date: Sheet
四三月
GROUND
Compal Electronics, Inc.
ICH6(4/4)_POWER&GND EAL30 LA-2691
, 03, 2005
VSS[86] VSS[85] VSS[84] VSS[83] VSS[82] VSS[81] VSS[80] VSS[79] VSS[78] VSS[77] VSS[76] VSS[75] VSS[74] VSS[73] VSS[72] VSS[71] VSS[70] VSS[69] VSS[68] VSS[67] VSS[66] VSS[65] VSS[64] VSS[63] VSS[62] VSS[61] VSS[60] VSS[59] VSS[58] VSS[57] VSS[56] VSS[55] VSS[54] VSS[53] VSS[52] VSS[51] VSS[50] VSS[49] VSS[48] VSS[47] VSS[46] VSS[45] VSS[44] VSS[43] VSS[42] VSS[41] VSS[40] VSS[39] VSS[38] VSS[37] VSS[36] VSS[35] VSS[34] VSS[33] VSS[32] VSS[31] VSS[30] VSS[29] VSS[28] VSS[27] VSS[26] VSS[25] VSS[24] VSS[23] VSS[22] VSS[21] VSS[20] VSS[19] VSS[18] VSS[17] VSS[16] VSS[15] VSS[14] VSS[13] VSS[12] VSS[11] VSS[10]
VSS[9] VSS[8] VSS[7] VSS[6] VSS[5] VSS[4] VSS[3] VSS[2] VSS[1]
F4 F22 F19 F17 E25 E19 E18 E15 E14 D7 D22 D20 D18 D14 D13 D10 D1 C4 C22 C20 C18 C14 B25 B24 B23 B21 B19 B15 B13 AG7 AG3 AG22 AG20 AG17 AG14 AG12 AG1 AF7 AF3 AF26 AF12 AF10 AF1 AE7 AE6 AE25 AE21 AE2 AE12 AE11 AE10 AD6 AD24 AD2 AD18 AD15 AD10 AD1 AC6 AC3 AC26 AC24 AC23 AC22 AC12 AC10 AB9 AB7 AB2 AB19 AB10 AB1 AA4 AA16 AA13 AA11 A9 A7 A4 A26 A23 A21 A19 A15 A12 A1
26 52
1
of
1.0
Near PIN F27(C 155), P27(C154), AB27(C157)
+1.5VS
1
+
C510
D D
FOR SW DJ FUNCTION
10_0402_5%
1 2
+5VS
R485
1 2
1U_0603_10V4Z
C687
+3VS
21
D27
2
1
RB751V_SOD323
ICH_V5REF_RUN
C678
0.1U_0402_16V4Z
+5VCD
R815
1K_0402_5%@
C C
2
220U_D2_4VM_R12
2
1
+1.5VS
2
C681
0.1U_0402_16V4Z
1
Near PIN AG5
+1.5VS
+3VALW
+5VALWP
1 2
21
D24
RB751V_SOD323
ICH_V5REF_SUS
2
C515 1U_0603_10V4Z
1
2
C60
0.1U_0402_16V4Z
1
R406
10_0402_5%
B B
change 0 ohm
L26
CHB1608U301_0603
1 2
+1.5VS
A A
ICH6_VCCDMIPLL
R436
0.5_0603_1%
1 2
C624
0.1U_0402_16V4Z
Near PIN AG9
+3VS
0.1U_0402_16V4Z
ICH6_VCCPLL
2
1
1
2
C625
0.01U_0402_16V7K
Near PIN AC27
C50
2
1
+3VALW
Near PIN A17
2
C95
1
2
1
2
1
Near PIN E26, E27
2
C56
C81
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C674
0.1U_0402_16V4Z
C675
0.1U_0402_16V4Z
ICH6_VCCPLL
+1.5VS
+3VALW
2
C42
1
0.1U_0402_16V4Z
2
1
+3VS
+3VS
2
1
0.1U_0402_16V4Z
C45
U36E
AA22
VCC1_5[1]
AA23
VCC1_5[2]
AA24
VCC1_5[3]
AA25
VCC1_5[4]
AB25
VCC1_5[5]
AB26
VCC1_5[6]
AB27
VCC1_5[7]
F25
VCC1_5[8]
F26
VCC1_5[9]
F27
VCC1_5[10]
G22
VCC1_5[11]
G23
VCC1_5[12]
G24
VCC1_5[13]
G25
VCC1_5[14]
H21
VCC1_5[15]
H22
VCC1_5[16]
J21
VCC1_5[17]
J22
VCC1_5[18]
K21
VCC1_5[19]
K22
VCC1_5[20]
L21
VCC1_5[21]
L22
VCC1_5[22]
M21
VCC1_5[23]
M22
VCC1_5[24]
N21
VCC1_5[25]
N22
VCC1_5[26]
N23
VCC1_5[27]
N24
VCC1_5[28]
N25
VCC1_5[29]
P21
VCC1_5[30]
P25
VCC1_5[31]
P26
VCC1_5[32]
P27
VCC1_5[33]
R21
VCC1_5[34]
R22
VCC1_5[35]
T21
VCC1_5[36]
T22
VCC1_5[37]
U21
VCC1_5[38]
U22
VCC1_5[39]
V21
VCC1_5[40]
V22
VCC1_5[41]
W21
VCC1_5[42]
W22
VCC1_5[43]
Y21
VCC1_5[44]
Y22
VCC1_5[45]
AA6
VCC1_5[46]
AB4
VCC1_5[47]
AB5
VCC1_5[48]
AB6
VCC1_5[49]
AC4
VCC1_5[50]
AD4
VCC1_5[51]
AE4
VCC1_5[52]
AE5
VCC1_5[53]
AF5
VCC1_5[54]
AG5
VCC1_5[55]
AA7
VCC1_5[56]
AA8
VCC1_5[57]
AA9
VCC1_5[58]
AB8
VCC1_5[59]
AC8
VCC1_5[60]
AD8
VCC1_5[61]
AE8
VCC1_5[62]
AE9
VCC1_5[63]
AF9
VCC1_5[64]
AG9
VCC1_5[65]
AC27
VCCDMIPLL
E26
VCC3_3[1]
AE1
VCCSATAPLL
AG10
VCC3_3[22]
A13
VCCLAN3_3/VCCSUS3_3[1]
F14
VCCLAN3_3/VCCSUS3_3[2]
G13
VCCLAN3_3/VCCSUS3_3[3]
G14
VCCLAN3_3/VCCSUS3_3[4]
A11
VCCSUS3_3[1]
U4
VCCSUS3_3[2]
V1
VCCSUS3_3[3]
V7
VCCSUS3_3[4]
W2
VCCSUS3_3[5]
Y7
VCCSUS3_3[6]
A17
VCCSUS3_3[7]
B17
VCCSUS3_3[8]
C17
VCCSUS3_3[9]
F18
VCCSUS3_3[10]
G17
VCCSUS3_3[11]
G18
VCCSUS3_3[12]
ICH6_BGA609
0.1U_0402_16V4Z
PCIE
SATA
VCCLAN1_5/VCCSUS1_5[2] VCCLAN1_5/VCCSUS1_5[1]
PCI/IDE RBP
VCC1_5[98] VCC1_5[97] VCC1_5[96] VCC1_5[95] VCC1_5[94] VCC1_5[93] VCC1_5[92] VCC1_5[91] VCC1_5[90] VCC1_5[89] VCC1_5[88] VCC1_5[87] VCC1_5[86]
COREIDE
VCC1_5[85] VCC1_5[84] VCC1_5[83] VCC1_5[82] VCC1_5[81] VCC1_5[80] VCC1_5[79]
VCC3_3[21] VCC3_3[20] VCC3_3[19] VCC3_3[18] VCC3_3[17] VCC3_3[16] VCC3_3[15] VCC3_3[14] VCC3_3[13] VCC3_3[12]
VCC3_3[11] VCC3_3[10]
VCC3_3[9] VCC3_3[8] VCC3_3[7] VCC3_3[6] VCC3_3[5] VCC3_3[4]
PCIUSB
VCC3_3[3] VCC3_3[2]
VCCSUS1_5[3] VCCSUS1_5[2]
VCCSUS1_5[1]
VCC1_5[78] VCC1_5[77] VCC1_5[76] VCC1_5[75] VCC1_5[74] VCC1_5[73] VCC1_5[72] VCC1_5[71] VCC1_5[70] VCC1_5[69]
USB CORE
VCC1_5[68] VCC1_5[67]
VCC2_5[4] VCC2_5[2]
V5REF[2] V5REF[1]
V5REF_SUS
VCCUSBPLL
VCCSUS3_3[20]
VCCRTC
V_CPU_IO[3] V_CPU_IO[2] V_CPU_IO[1]
VCCSUS3_3[19] VCCSUS3_3[18] VCCSUS3_3[17] VCCSUS3_3[16] VCCSUS3_3[15] VCCSUS3_3[14] VCCSUS3_3[13]
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
F9 U17 U16 U14 U12 U11 T17 T11 P17 P11 M17 M11 L17 L16 L14 L12 L11 AA21 AA20 AA19
AA10 AG19 AG16 AG13 AD17 AC15 AA17 AA15 AA14 AA12
P1 M7 L7 L4 J7 H7 H1 E4 B1 A6
U7 R7
G19 G20
F20 E24 E23 E22 E21 E20 D27 D26 D25 D24
G8 AB18
P7 AA18
A8 F21 A25
A24 AB3 G11
G10 AG23
AD26 AB22
G16 G15 F16 F15 E16 D16 C16
+1.5VS
0.1U_0402_16V4Z
ICH_V5REF_RUN
ICH_V5REF_SUS
+RTCVCC
C673
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C676
2
C96
C55
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
+1.5VS
+1.5VS +3VALW
+RTCVCC
+1.5VS
+1.05VS
2
C670
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C672
1
+3VS
2
C677
Near PIN
1
AG13, AG16
2
2
1
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z C84
C58
+2.5VS
Near PIN AB18
Near PIN AG23
Compal Secret Data
2
1
+3VS
C63
0.1U_0402_16V4Z
Near PIN A2-A6, D1-H1
2
2
C87
1
1
2
C80
1
0.1U_0402_16V4Z
Deciphered Date
0.1U_0402_16V4Z
Page 27
5
4.7U_0805_10V4Z
UART
+1.8VS
C25
SATA
Parallel ATA
Power
1
2
Config & Debug
+5VS
0.1U_0402_16V4Z
1
C100
2
1000P_0402_50V7K
D D
C C
PIDE_HRESET#
12
1
C102
2
Pleace near HD CONN
1 2
R392 33_0402_5%
R407 10K_0402_5%
+3VS
1U_0603_10V4Z
0.1U_0402_16V4Z
1
C103
2
PIDE_HDD0 PIDE_HDD1 PIDE_HDD2 PIDE_HDD3 PIDE_HDD4 PIDE_HDD5 PIDE_HDD6 PIDE_HDD7 PIDE_HDD8 PIDE_HDD9 PIDE_HDD10 PIDE_HDD11 PIDE_HDD12 PIDE_HDD13 PIDE_HDD14 PIDE_HDD15
PIDE_HDA0 PIDE_HDA1 PIDE_HDA2 PIDE_HCS0# PIDE_HCS1#
PIDE_HIOCS16# PIDE_HINTRQ PIDE_HDMACK# PIDE_HIORDY PIDE_HDA1 PIDE_HDIOR# PIDE_HDIOW# PIDE_HDREQ PIDE_R_HRESET#
1
C97
2
U35
62
HDD0
64
HDD1
2
HDD2
5
HDD3
7
HDD4
11
HDD5
13
HDD6
15
HDD7
14
HDD8
12
HDD9
10
HDD10
6
HDD11
3
HDD12
1
HDD13
63
HDD14
61
HDD15
50
HDA0
51
HDA1
49
HDA2
48
HCS0#
47
HCS1#
52
HIOCS16#
53
HINTRQ
54
HDMACK#
55
HIORDY
58
HDIOR#
59
HDIOW#
60
HDMARQ
16
HRESET#
46
HPDIAG#
45
UAO
43
UAI
88SA8040_TQFP64
4
0.1U_0402_16V4Z
1
C551
2
Pleace near U178
32
TXP
31
TXM
27
RXP
28
RXM
17
RST#
33
T0
34
T1
35
T2
36
T3
37
T4
38
T5
39
T6
40
T7
20
CNFG2
19
CNFG1
18
CNFG0
21
ATAIOSEL
22
XTLIN/OSC
23
XTLOUT
26
ISET
44
VDDIO_0
4
VDDIO_1
9
VDD_0
41
VDD_1
56
VDD_2
24
VAA1
29
VAA2
25
VSS1
30
VSS2
8
GND_0
42
GND_1
57
GND_2
1
C488
2
0.1U_0402_16V4Z
SATA_DTX_IRX_P0 SATA_DTX_IRX_N0 SATA_ITX_C_DRX_P0 SATA_ITX_C_DRX_N0
SATA_RST# T0 T1 T2 T3
T5 T6
CNFG1 ATAIOSEL IDE_XTLIN
IDE_XTLOUT
R373 12.1K_0603_1%
0.01U_0402_16V7K
12
1 2
R397 10K_0402_5%
1 2
R390 10K_0402_5%
12
0.1U_0402_16V4Z
1
1
C459
2
2
C468
R384 0_0603_5%
1000P_0402_50V7K
+3VS
1 2
R389 10K_0402_5%
1 2
R420 4.7K_0402_5%
1 2
R419 10K_0402_5%
1 2
R391 10K_0402_5%@
1 2
R394 10K_0402_5%@
1 2
R398 10K_0402_5%
1 2
R401 10K_0402_5%
C465 0.01U_0402_16V7K
12
C466 0.01U_0402_16V7K
12
SATA_ITX_C_DRX_P0 24 SATA_ITX_C_DRX_N0 24
+3VS +3VS
+1.8VS
1 2
L25 CHB1608U800_0603
1
1
C461
2.2U_0603_6.3V6K
2
2
C460
3
ATAIOSEL PIDE_HIORDY PIDE_HIOCS16#
T0 T2 T3 T6
1 2
R393 10K_0402_5%
R417 5.6K_0402_5%
R416 10K_0402_5%
SATA_DTX_C_IRX_P0 24 SATA_DTX_C_IRX_N0 24
2
SATA Module
Sets maximum transfer rate and UDMA mode
*
000
CNFG0CNFG2 CNFG1
INT PDINT PD
12
12
T1
PIDE_HDREQ
PIDE_HINTRQ
001 010 100
110 110 0 1 1 Reserved 1 1 1 Reserved
P-ATA HDD Conn.
PIDE_HRESET# PIDE_HDD7 PIDE_HDD8 PIDE_HDD6 PIDE_HDD9 PIDE_HDD5 PIDE_HDD10 PIDE_HDD4 PIDE_HDD11 PIDE_HDD3 PIDE_HDD12 PIDE_HDD2 PIDE_HDD13 PIDE_HDD1 PIDE_HDD14 PIDE_HDD0 PIDE_HDD15
PIDE_HDREQ
PIDE_HDIOW# PIDE_HDIOR# PIDE_HIORDY SEC_CSEL PIDE_HDMACK# PIDE_HINTRQ
PIDE_HDA0 PIDE_HDA2 PIDE_HCS0# PIDE_HCS1#
+5VS +5VS
1 2
10K_0402_5%R78 @
SUYIN_200055FB044GX03ZX
1
1
2
3
3
4
5
5
6
7
7
8
9
9
10
11
11
12
13
13
14
15
15
16
17
17
18
19
19
20
21
21
22
23
23
24
25
25
26
27
27
28
29
29
30
31
31
32
33
33
34
35
35
36
37
37
38
39
39
40
41
41
42
43
43
44
JP8
NOTE
Device Mode 100MB/s Device Mode 133MB/s Device Mode 150MB/s
Host Mode 100MB/s
Host Mode 133MB/s Host Mode 150MB/s
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44
R429 470_0402_5% R430 10K_0402_5%
R433 10K_0402_5%
1
1 2 1 2
1 2
1
C27
4.7U_0805_10V4Z
2
B B
1
C503
0.1U_0402_16V4Z
2
Place near connector side.
A A
5
1
C493
0.1U_0402_16V4Z
2
Y3
IDE_XTLOUTIDE_XTLIN
1 2
1
C470 12P_0402_50V8J@
2
25MHZ_12PF_1BG25000CK1B@
R372 1M_0402_5%@
12
R374 0_0402_5%@
1
C439 12P_0402_50V8J@
2
25MHz reference clock T[4:3] = 01
C370 1U_0603_10V4Z
+1.8VS
+3VS
12
GM@
U25
1 2 3
1
C3691U_0603_10V4Z
APL5301-18BC-TR_SOT23-5
GM@
GM@
2
4
VOUT GND VIN
BP
SHDN#
5
GM@
4
C321
1 2
0.1U_0402_16V4Z
SUSP# 33,39,40,42,47,49
EC_IDERST36,39
+3VALW
C710
0.1U_0402_16V4Z
1 2
14
U13A
1
IDE_HDDRST#25
+3VS
PLT_RST#6,15,23,25,28,31,35,39
12
R840
1
C862
2
0_0402_5%
0.1U_0402_16V4Z
PLT_RST#
SN74LVC08APW_TSSOP14
X5
4
VDD
OUT
1
CONT
VSS
OSC 25MHZ SG645PCG
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
P
A
3
O
2
B
G
7
IDE_XTLIN
3
2
Compal Secret Data
Deciphered Date
R833
1 2
2006/03/012005/03/01
2
0_0402_5%
@
+3VALW
12
R832 10K_0402_5%
Title
Size Document Number Rev
Date: Sheet
+3VALW
14
U13D
12
P
A
13
B
G
7
SN74LVC08APW_TSSOP14
SATA_RST#
11
O
Compal Electronics, Inc.
SATA/PATA-HDD, PATA ODD Connector
EAL30 LA-2691
星期
, 03, 2005
四三月
1
of
27 52
1.0
Page 28
5
4
3
2
1
Reserve for SWDJ
Q58 AOS 3401_SOT23
@
+5VALW
D D
+5VALW
R816
1 2
240K_0402_5%@
C851
1 2
1U_0603_10V4Z@
13
2
R817 10K_0402_5%@
PJ20
2
JUMP_43X118@
12
13
112
Q59 DTC124EK_SC59@
2
+5VCD
+5VS
CD_PLAY
CD_PLAY 39
Placea caps. near CDROM
+5VCD
CONN.
1
1
C764 1000P_0402_50V7K
C C
INT_CD_L36
ODD_RST#39
B B
+5VCD
SHDD_LED#39
IDE_DIOW#24
IDE_DIORDY24
IDE_IRQ24
IDE_DA124 IDE_DA024
1 2
R553 100K_0402_5%
470_0402_5%
2
0.1U_0402_16V4Z
CDROM CONN
C149
CD_AGND
12
10U_0805_10V4Z
INT_CD_L
IDE_DD7 IDE_DD6 IDE_DD5 IDE_DD11 IDE_DD4 IDE_DD3 IDE_DD2 IDE_DD1 IDE_DD0
+5VCD
SD_CSEL
R557
1 2
IDE_DD[0..15]24
C766
2
1 3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49
ALLTOP_C12431-1-5001
1
C769
1U_0603_10V4Z
2
CD_AGND 36
IDE_DD[0..15]
1
2
JP13
C779 10U_1206_16V4Z
INT_CD_R
2 4
IDE_DD8
6
IDE_DD9
8
IDE_DD10
10 12
IDE_DD12
14
IDE_DD13
16
IDE_DD14
18
IDE_DD15
20 22 24 26 28 30
PDIAG#
32 34
SW_SD_CS#3SW_SD_CS#1
36 38 40 42 44 46 48 50 5251
W=80mils
1 2
R564 100K_0402_5%@
R551
1 2
INT_CD_R 36
1 2
R102 0_0603_5%@
IDE_DDREQ 24 IDE_DIOR# 24
IDE_DDACK# 24
100K_0402_5%
IDE_DA2 24 +5VCD
+5VCD
IDE_DCS3#24
IDE_DCS1#24
+5VCD
Reserve for SWDJ
+3VALW
C852
12
0.1U_0402_16V4Z@
IDE_DCS3#
IDE_DCS1#
14
P
I2O
G
7
R830 0_0402_5%
1 2
Reserve for SWDJ
I5O
SN74LVC125APWLE_TSSOP14@
R831 0_0402_5%
1 2
PCI_RST#23,29,31,34,35,39
PLT_RST#6,15,23,25,27,31,35,39
+5VCD
G_PCI_RST#
1
U50A
OE#
SN74LVC125APWLE_TSSOP14@
G_PCI_RST#
4
U50B
OE#
12
R818 10K_0402_5%@
+5VCD
12
SW_SD_CS#1
SW_SD_CS#3
R819 10K_0402_5%@
3
6
Reserve for SWDJ
R821 0_0402_5%@
1 2
1 2
R822 0_0402_5%@
R_PCIRST#
+3VALW
12
R820 10K_0402_5%@
G_PCI_RST#
13
D
2
G
2N7002_SOT23@ Q60
S
A A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Deciphered Date
2006/03/012005/03/01
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
CDROM Connector & Direct CD
EAL30 LA-2691
星期四 三月
1
1.0
of
28 52, 03, 2005
Page 29
5
4
3
2
1
R385
49.9_0402_1%
+3V
ACTIVITY#
+3V
LINK10_100#
0.1U_0402_16V4Z
1
C481
2
+3V
1
C494
0.1U_0402_16V4Z
2
LAN_RD+ LAN_RD-
LAN_TD+ LAN_TD-
12
12
R386
49.9_0402_1%
1
C464
0.01U_0402_25V7Z
2
E
3 1
3 1
C
47K
B
10K
2
E
C
47K
B
10K
Q35 DTA114YKA_SOT23
2
1
C483
2
0.1U_0402_16V4Z
1
C463
0.1U_0402_16V4Z
2
Q33 DTA114YKA_SOT23
1 2
R336 300_0402_5%
RJ45_RX-
RJ45_RX+ RJ45_TX­RJ45_TX+
1 2
R334 300_0402_5%
RJ45_GND
20mil
1
C418
0.1U_0402_16V4Z
2
H=1.98mm
U30
1
RD+
2
RD-
3
CT
4
NC
5
NC
6
CT TD+7TX+
8
TD-
LF-H80P_16P
10mil
10mil
12
12
R346
75_0402_1%
C403 1000P_1206_2KV7K
LAN RTL8100C(L)
16
RX+
15
RX-
14
CT
13
NC
12
NC
11
CT
10 9
TX-
R354
75_0402_1%
12 11
8 7 6 5 4 3 2 1
10
9
R345 75_0402_1%
1 2
Termination plane should be closed to chassis ground and also depends on safety concern
RJ45_RX+ RJ45_RX-
RJ45_TX+ RJ45_TX-
12
12
R353 75_0402_1%
RJ45_GND
JP4
Amber LED+ Amber LED­PR4­PR4+ PR2­PR3­PR3+ PR2+ PR1­PR1+ Green LED­Green LED+
AMP RJ45/RJ11 with LED
SHLD4 SHLD3
SHLD2 SHLD1
1
C404
2
0.1U_0402_16V4Z
16 15
14 13
LANGND
1
C409
4.7U_0805_10V4Z
2
PCI_AD[0..31]23,31,34
D D
12
@
R355
10_0402_5%
1
@
C416
15P_0402_50V8J
C C
B B
LAN_X1 LAN_X2
1
2
2
Y4
25MHZ_20P_1BX25000CK1A
C455 27P_0402_50V8J
PCI_AD[0..3 1]
CLK_PCI_LAN
PCI_CBE#023,31,34 PCI_CBE#123,31,34 PCI_CBE#223,31,34 PCI_CBE#323,31,34
PCI_AD17 LAN_IDSEL
R383 100_0402_5%
PCI_PAR23,31,34
PCI_FRAME#23,31,34
PCI_IRDY#23,31,34
PCI_TRDY#23,31,34
PCI_DEVSEL#23,31,34
PCI_STOP#23,31,34
PCI_PERR#23,31,34 PCI_SERR#23,31,34
PCI_REQ#323 PCI_GNT#323
PCI_PIRQF#23
ONBD_LAN_PME#34,39
PCI_RST#23,28,31,34,35,39
CLK_PCI_LAN14 PM_CLKRUN#25,34,35
1
2
1 2
C445 27P_0402_50V8J
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_CBE#0 PCI_CBE#1 PCI_CBE#2 PCI_CBE#3
CLK_PCI_LAN PM_CLKRUN#
U28
104
AD0
103
AD1
102
AD2
98
AD3
97
AD4
96
AD5
95
AD6
93
AD7
90
AD8
89
AD9
87
AD10
86
AD11
85
AD12
83
AD13
82
AD14
79
AD15
59
AD16
58
AD17
57
AD18
55
AD19
53
AD20
50
AD21
49
AD22
47
AD23
43
AD24
42
AD25
40
AD26
39
AD27
37
AD28
36
AD29
34
AD30
33
AD31
92
C/BE#0
77
C/BE#1
60
C/BE#2
44
C/BE#3
46
IDSEL
76
PAR
61
FRAME#
63
IRDY#
67
TRDY#
68
DEVSEL#
69
STOP#
70
PERR#
75
SERR#
30
REQ#
29
GNT#
25
INTA#
31
PME#
27
RST#
28
CLK
65
CLKRUN#
4
GND/VSS
17
GND/VSS
128
GND/VSS
21
GND/VSSPST
38
GND/VSSPST
51
GND/VSSPST
66
GND/VSSPST
81
GND/VSSPST
91
GND/VSSPST
101
GND/VSSPST
119
GND/VSSPST
35
GND
52
GND
80
GND
100
GND
RTL8100C_QFP128
EEDO
AUX/EEDI
EESK EECS
LED0 LED1 LED2
NC/LED3
TXD+/MDI0+
TXD-/MDI0-
RXIN+/MDI1+
RXIN-/MDI1-
NC/MDI2+
NC/MDI2-
NC/MDI3+
NC/MDI3-
X1 X2
LWAKE
ISOLATE#
RTSET
NC/SMBCLK
NC/SMBDATA
NC/M66EN
NC/AVDDH
PCI I/F
NC/HV
NC/HSDAC+
NC/HG NC/LG2 NC/LV2
NC/VSS NC/VSS
NC/GND NC/GND NC/GND NC/GND
LAN I/F
NC/GND NC/GND
CTRL25
RTT3/CRTL18
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
AVDD33/AVDDL AVDD33/AVDDL AVDD33/AVDDL
NC/AVDDL
VDD25/VDD18 VDD25/VDD18 VDD25/VDD18 VDD25/VDD18
NC/VDD18 NC/VDD18 NC/VDD18 NC/VDD18 NC/VDD18
Power
AVDD25/HSDAC-
LAN_EEDO
108
LAN_EEDI
109
LAN_EECLK
111
LAN_EECS
106
ACTIVITY#
117
LINK10_100#
115 114 113
LAN_TD+
1
LAN_TD-
2
LAN_RD+
5
LAN_RD-
6 14
15 18 19
LAN_X1
121
LAN_X2
122 105
LAN_ISOLATE#
23
LOAN_RTSET
127 72 74
88 10
120 11
123 124
+LAN_DVDD
126
9 13
22 48 62 73 112 118
CTRL25
8 125 26
41 56 71 84 94 107
+LAN_AVDDL
3 7 20 16
32 54 78
+LAN_DVDD
99
24 45 64 110 116
+2.5V_LAN_VDD
12
20mil
C424
0.1U_0402_16V4Z
1 2
R402
3.6K_0402_5%
10mil
R356 1K_0402_5%
1 2
R357 15K_0402_5%
1 2
R361 5.6K_0603_1%
10mil
+3V
40mil
0.1U_0402_16V4Z
40mil
1 2
1
0.1U_0402_16V4Z
C419
2
1
0.1U_0402_16V4Z
C471
2
0.1U_0402_16V4Z
1
1
2
2
CTRL25
C421
10U_0805_10V4Z
1
1
C425
0.1U_0402_16V4Z
2
2
1
1
C458
0.1U_0402_16V4Z
2
2
1 2
R348 0_0805_5%
C420 10U_0805_10V4Z
+3V
+3V
31
E
2
B
C
1
2
1 2
L24 0_0805_5%
C426
1 2
R347 0_0805_5%
C482
LAN_EECS LAN_EECLK LAN_EEDI LAN_EEDO
+3VS
Q34 2SB1197K_SOT23
40mil
1
C423
0.1U_0402_16V4Z
2
+3V
+2.5V_LAN
49.9_0402_1%
0.01U_0402_25V7Z
+2.5V_LAN
+3V
+2.5V_LAN
0.1U_0402_16V4Z
1
1
C462
2
2
0.1U_0402_16V4Z
U32
1
CS
VCC
2
SK
3
DI
4
DO
GND
AT93C46-10SI-2.7_SO8
12
R387
C469
1
C440
2
0.1U_0402_16V4Z
8 7
NC
6
NC
5
12
R388
49.9_0402_1%
1
2
C484
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Deciphered Date
2006/03/012005/03/01
2
Title
Size Document Number Rev
Custom
Date: Sheet
Compal Electron i cs, Inc.
LAN RTL8100CL EAL30 LA-2691
星期
, 03, 2005
四三月
1
of
29 52
1.0
Page 30
A
1 1
S1_IOWR#33
S1_IORD#33
S1_OE#33
S1_CE2#33
2 2
S1_REG#33
S1_CE1#33
S1_WAIT#33
S1_INPACK#33
S1_WE#33
S1_BVD133
S1_WP33
S1_A16
3 3
+3VS
R534 33_0402_5%
S1_RDY#33
S1_RST33 S1_BVD233 S1_CD1#33
S1_CD2#33
S1_VS133
S1_VS233
R504 10K_0402_5%@ R503 10K_0402_5%@
B
12
S1_A[0..25]
S1_D[0..15]
S1_D10
S1_D9 S1_D1 S1_D8 S1_D0 S1_A0 S1_A1 S1_A2 S1_A3 S1_A4 S1_A5 S1_A6
S1_A7
S1_IOWR#
S1_A9
S1_IORD# S1_OE#
S1_CE2#
S1_D15 S1_D7
S1_D6 S1_D5 S1_D4
S1_D3
S1_REG#
S1_A12 S1_A8
S1_CE1#
S1_A13 S1_A23 S1_A22 S1_A15 S1_A20 S1_A21
S1_A19
S1_A14 S1_WAIT# S1_INPACK# S1_WE#
S1_BVD1
S1_WP
A16_CLK S1_RDY#
S1_RST S1_BVD2 S1_CD1#
S1_CD2#
S1_VS1 S1_VS2
S1_D14 S1_D2 S1_A18
12 12
S1_A25 S1_A24
S1_A17
S1_A11
S1_A10
S1_D13 S1_D12 S1_D11
U43A
D1
A_CAD31/A_D10
C1
A_CAD30/A_D9
D3
A_CAD29/A_D1
C2
A_CAD28/A_D8
B1
A_CAD27/A_D0
B4
A_CAD26/A_A0
A4
A_CAD25/A_A1
E6
A_CAD24/A_A2
B5
A_CAD23/A_A3
C6
A_CAD22/A_A4
B6
A_CAD21/A_A5
G9
A_CAD20/A_A6
C7
A_CAD19/A_A25
B7
A_CAD18/A_A7
A7
A_CAD17/A_A24
A10
A_CAD16/A_A17
E11
A_CAD15/A_IOWR#
G11
A_CAD14/A_A9
C11
A_CAD13/A_IORD#
B11
A_CAD12/A_A11
C12
A_CAD11/A_OE#
B12
A_CAD10/A_CE2#
A12
A_CAD9/A_A10
E12
A_CAD8/A_D15
C13
A_CAD7/A_D7
F12
A_CAD6/A_D13
A13
A_CAD5/A_D6
C14
A_CAD4/A_D12
E13
A_CAD3/A_D5
A14
A_CAD2/A_D11
B14
A_CAD1/A_D4
E14
A_CAD0/A_D3
C5
A_CC/BE3#/A_REG#
F9
A_CC/BE2#/A_A12
B10
A_CC/BE1#/A_A8
G12
A_CC/BE0#/A_CE1#
G10
A_CPAR/A_A13
C8
A_CFRAME#/A_A23
A8
A_CTRDY#/A_A22
B8
A_CIRDY#/A_A15
A9
A_CSTOP#/A_A20
C9
A_CDEVSEL#/A_A21
E10
A_CBLOCK#/A_A19
F10
A_CPERR#/A_A14
B3
A_CSERR#/A_WAIT#
E7
A_CREQ#/A_INPACK#
B9
A_CGNT#/A_WE#
B2
A_CSTSCHG/A_BVD1(STSCHG/RI)
C3
A_CCLKRUN#/A_WP(IOIS16)
E9
A_CCLK/A_A16
C4
A_CINT#/A_READY(IREQ)
A6
A_CRST#/A_RESET
A2
A_CAUDIO/A_BVD2(SPKR#)
C15
A_CCD1#/A_CD1#
E5
A_CCD2#/A_CD2#
A3
A_CVS1/A_VS1#
E8
A_CVS2/A_VS2#
B13
A_CRSVD/A_D14
D2
A_CRSVD/A_D2
C10
A_CRSVD/A_A18
E2
A_USB_EN#
E1
B_USB_EN#
A11
VCCH8VCCH9VCC
VCCAA5VCCA
PCI 7411
GNDG7GNDG8GND
GND
GNDJ9GND
H13
G13
S1_A[0..25]33
S1_D[0..15]33
C
+3VS+S1_VCC
D19
H10
H11
H12
J12
M10
VCC
VCC
VCCJ8VCCM7VCC
VCCM9VCC
K19
M12
K12
N7
VCC
VCCK8VCC
VCC
RSVD
RSVD
DATA CLOCK LATCH
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
N1 L6 N2
B15 A16 B16 A17 C16 D17 C19 D18 E17 E19 G15 F18 H14 H15 G17 K17 L13 K18 L15 L17 L18 L19 M17 M14 M15 N19 N18 N15 M13 P18 P17 P19 F15 G18 K14 M18 K13 G19 H17 J13 J17 H19 J19 J18 B18 E18 J15 F14
4510_2
A18 H18 B19 F17 C17 N13 B17 C18 F19 N17 A15 K15
R542 1K_0402_5%
Reserve for TI PCI4510
D
For Cardbus TI7411 & TI6411
DATA_CB 33
CLOCK_CB 33
LATCH_CB 33
+3VS
0.1U_0402_16V4Z
12
(44+1)10@
1
2
+3VS
0.1U_0402_16V4Z
1
2
+S1_VCC
1
2
C708
C172
C726
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
1
2
C740
C754
C728
0.1U_0402_16V4Z
PCI4510 =one Slot Cardbus + 1394
0.1U_0402_16V4Z
1
C707
2
0.1U_0402_16V4Z
1
C759
2
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C735
0.1U_0402_16V4Z
E
2
C729
1
1
C714
2
1
2
1U_0603_10V4Z
2
C722
1
1
C757
10U_0805_10V4Z
2
C736
0.1U_0402_16V4Z
PCI1510 =one Slot Cardb us
GND
GNDK9GND
GND
GNDL8GNDL9GND
GND
GND
GND
PCI7411GHK_PBGA2887411@
J10
J11
K10
M8
L10
L11
L12
K11
PCI6411 =one Slot Cardbus + 5 in 1 PCI7411 =one Slot Cardbus + 5 in 1 + 1394
4 4
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
C
Compal Secret Data
Deciphered Date
2006/03/012005/03/01
D
Title
Size Document Number Rev
Custom
Date: Sheet
Compal Electronics, Inc.
PCI7411-1
EAL30 LA-2691
星期
, 03, 2005
四三月
1.0
of
30 52
E
Page 31
A
change 0 ohm
+3VS
L10
CHB1608U301_0603
1 2
C210
10U_0805_10V4Z
1 1
change 0 ohm
+3VS
CHB1608U301_0603
L8
2 2
C322
15P_0402_50V8J@
R293
12
CLK_SD_48M
12
10_0402_5%@
+AVDD_7411
12
0.1U_0402_16V4Z
MC_PWR_CTRL_032
MSCLK_SDCLK32 SMELWP#32
MSBS_SDCMD_SMWE232 MSDATA3_SDDAT3_SMD332 MSDATA2_SDDAT2_SMD232
MSDATA1_SDDATA1_SMD132
MSDATA0_SDDAT0_SMD032
SMRE#32
SDWP_SMCE#32
SM_PHYS_WP#32
Reserve for TI PCI4510
3 3
EAL20 CONN
1U_0603_10V4Z
FOX_UV31413-4R1-TR
6
6
5
5
1394@
Connect To Shielding GND
4 4
JP20
1
1394@
C750
4
4
3
3
2
2
1
1
56.2_0603_1%
2
56.2_0603_1%
5.11K_0603_1%
1394@
R539
1394@
R535
1394@
R533
56.2_0603_1%
1 2
56.2_0603_1% 1394@
1 2
220P_0402_50V7K
1 2
1394@
R541
R536
1394@
C730
+3VS
1 2
+AVDD_7411
1 2
R128 4.7K_0402_5%1394@
1
2
24.576MHz_16P_3XG-24576-43E1
R550 6.34K_0402_1%
1
2
1
2
SDCD#32 MSCD#32 SMCD#32
SMALE32
SMD432 SMD532 SMD632 SMD732
SMCLE32
SMRB#32
+3VS
VCCD1#33
CLK_SD_48M14
1 2
1 2
R543 1K_0402_5%1394@
1 2
R540 1K_0402_5%1394@
12
1394@
1394@
B
0.01U_0402_16V7K
1
C211
C197
R514
C207
2
0.01U_0402_16V7K
0.1U_0402_16V4Z
1
C176
2
MC_PWR_CTRL_0
R519 0_0402_5%@
R284 33_0402_5%5IN1@ R104 33_0402_5%5IN1@
5IN1@
33_0402_5%
1 2
SMALE SMD4 SMD5 SMD6 SMD7 SDWP_SMCE#
SMCLE SMRB# SM_PHYS_WP#
R109 10K_0402_5%
1 2
R118 1K_0402_5%
1 2
R552 4.7K_0402_5%
1 2
1394@
C371 1U_0603_10V4Z1394@
1 2
R123 1K_0402_5%1394@
C76118P_0402_50V8J
X3
C75818P_0402_50V8J
0.1U_0402_16V4Z
1
C219
2
0.01U_0402_16V7K
1
C201
2
0.01U_0402_16V7K
1 2
SDCD# MSCD# SMCD#
1 2
1 2
MSBS_SDCMD_SMWE2 MSDATA3_SDDAT3_SMD3 MSDATA2_SDDAT2_SMD2 MSDATA1_SDDAT1_SMD1 MSDATA0_SDDAT0_SMD0
12
FILTER1
R2871K_0402_5% (44+1)10@
CLK_SD_48M
TPBIAS0
TPA0+
TPA0-
TPB0+
TPB0-
12
1 2
1
2
1
C215
2
0.1U_0402_16V4Z
1
C171
C186
2
10U_0805_10V4Z
U43B
MC_PWR_CTRL_0 MC_PWR_CTRL_1
SD_CD# MS_CD# SM_CD#
MS_CLK/SD_CLK/SM_EL_WP# MS_BS/SD_CMD/SM_WE# MS_DATA3/SD_DAT3/SM_D3 MS_DATA2/SD_DAT2/SM_D2 MS_DATA1/SD_DAT1/SM_D1 MS_SDIO(DATA0)/SD_DAT0/SM_D0
SD_CLK/SM_RE#/SC_GPIO1 SD_CMD/SM_ALE/SC_GPIO2 SD_DAT0/SM_D4/SC_GPIO6 SD_DAT1/SM_D5/SC_GPIO5 SD_DAT2/SM_D6/SC_GPIO4 SD_DAT3/SM_D7/SC_GPIO3 SD_WP/SM_CE#
SM_CLE/SC_GPIO0 SM_R/B SM_PHYS_WP#/SC_FCB
RSVD RSVD RSVD RSVD RSVD RSVD RSVD
TEST0 NC RSVD
CLK_48
PHY_TEST_MA
R0 R1 TPBIAS0 TPA0P TPA0N TPB0P TPB0N TPBIAS1 TPA1P TPA1N TPB1P TPB1N CPS CNA XO XI PC0(TEST1) PC1(TEST2) PC2(TEST3)
W17
W15 W14
W18 W16
1
2
F1 F2
E3 F5 F6
G5 F3 H5 G3 G2 G1
J5 J3
H3
J6 J1 J2
H7
J7 K1 K2
L2 K5 K3 K7 L1 L3 L5
P12 T19
M1
R17
U18 U19 U15 V15
V14 U17
V18 V16 M11
P15 R19 R18 R12 U13 V13
+VDPLL_33
R13
R14
V17
AVDD
AVDD
AVDD
PCI7411
AGND
N12
U14
C
C854
(44+1)10@
FILTER1
1 2
0.1U_0402_16V4Z
C755
7411@
1 2
0.1U_0402_16V4Z
C704
2
1
1U_0603_10V4Z
M19
H1
T18
V19
AGND
U16
VDPLL_33
AGND
VDPLL_15
W10
W3
VCCP
VCCP
VR_PORT
VR_PORT
DEVSEL#
RI_OUT#/PME#
SUSPEND#
SPKROUT
VSSPLL
VSSPLL
PCI7411GHK_PBGA2887411@
T17
P14
Place C854 near T18 and T19
Place C755 near T17 and T18
0.1U_0402_16V4Z
1
2
PCI_AD31
U2
AD31
PCI_AD30
V1
AD30
PCI_AD29
V2
AD29
PCI_AD28
U3
AD28
PCI_AD27
W2
AD27
PCI_AD26
V3
AD26
PCI_AD25
U4
AD25
PCI_AD24
V4
AD24
PCI_AD23
V5
AD23
PCI_AD22
U5
AD22
PCI_AD21
R6
AD21
PCI_AD20
P6
AD20
PCI_AD19
W6
AD19
PCI_AD18
V6
AD18
PCI_AD17
U6
AD17
PCI_AD16
R7
AD16
PCI_AD15
V9
AD15
PCI_AD14
U9
AD14
PCI_AD13
R9
AD13
PCI_AD12
N9
AD12
PCI_AD11
V10
AD11
PCI_AD10
U10
AD10
C/BE3# C/BE2# C/BE1# C/BE0#
FRAME#
TRDY#
IRDY#
STOP#
IDSEL PERR# SERR#
REQ# GNT#
PCICLK
PCIRST#
GRST#
MFUNC0 MFUNC1 MFUNC2 MFUNC3 MFUNC4 MFUNC5 MFUNC6
VR_EN#
PAR
SDA
PCI_AD9
R10
AD9
PCI_AD8
N10
AD8
PCI_AD7
V11
AD7
PCI_AD6
U11
AD6
PCI_AD5
R11
AD5
PCI_AD4
W12
AD4
PCI_AD3
V12
AD3
PCI_AD2
U12
AD2
PCI_AD1
N11
AD1
PCI_AD0
W13
AD0
W4 W7 W9 W11
P9 V7 R8 U7 W8 N8 W5 V8 U8 U1 T2
P5 R3 T1 T3
R2
PCM_SPK#
L7
7411_PIRQA#
N3
7411_PIRQB#
M5
7411_PIRQC#
P1 P2
7411_PIRQD#
P3 N5 R1
M3
1 2
SCL
R510 300_0402_5%
M2
1 2
R518 300_0402_5%
H2
1 2
R511 1K_0402_5%
C175
0.1U_0402_16V4Z
R523100_0402_5%
5IN1_LED
D
0.01U_0402_16V7K
1
2
12
1
2
1
C733
2
PCI_AD[0..31]
PCI_CBE#3 23,29,34 PCI_CBE#2 23,29,34 PCI_CBE#1 23,29,34 PCI_CBE#0 23,29,34
PCI_PAR 23,29,34 PCI_FRAME# 23,29,34 PCI_TRDY# 23,29,34 PCI_ I RDY# 23,29,34 PCI_STOP# 23,29,34 PCI_DEVSEL# 23,29,34
PCI_PERR# 23,29,34
PCI_SERR# 23,29,34
PCI_REQ#2 23
PCI_GNT#2 23
R512 0_0402_5% R513 0_0402_5%@
1 2
R516 4.7K_0402_5%
PCI_PIRQA# 23 PCI_PIRQB# 23 PCI_PIRQC# 23
SERIRQ 25,35,39
PCI_PIRQD# 23
5IN1_LED 32
C706
0.1U_0402_16V4Z
C151
0.01U_0402_16V7K
PCI_AD[0.. 31 ] 23,29,34
12 12
+3VS
1U_0603_10V4Z
C182
2
1
PCI_AD20PCM_ID
12
12
1
2
+3VS
R517 10K_0402_5%@
R509 10K_0402_5%
C719
5IN1 LED Side View
5IN1_LED
2
Q4
5IN1@
DTC114YKA_SC59
R292
10_0402_5%
CLK_PCI_PCM
C323
1 2
@
15P_0402_50V8J
R110 33K_0603_1%
1 2
1 2
@
PCI_RST# 23,28,29,34,35,39 PLT_RST# 6,15,23,25,27,28,35,39
+3VS
E
+3VS
12
R587 120_0402_5%
5IN1@
21
D29 HT-110UYG-CT_YEL/GRN
5IN1@
13
10K
47K
PCM_SPK# 36
21
D9
V-PORT-0603-220 M-V05_0603
@
CLK_PCI_PCM 14
PCI1510 & PCI6411 UNMOUNT THOSE PARTS
A
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Deciphered Date
2006/03/012005/03/01
D
Title
Size Document Number Rev
Custom
Date: Sheet
Compal Electronics, Inc.
PCI7411-2
EAL30 LA-2691
星期四 三月
E
1.0
of
31 52, 03, 2005
Page 32
5
D D
+VCC_5IN1
12
R285
2.2K_0402_5%
5IN1@
C C
B B
+3VS +3VS +3VS
R528
10K_0402_5%
@
1 2
R836
1 2
10K_0402_5%
0_0402_5%5IN1@
R555
SM_PHYS_WPS#SM_W P-IN
R524 10K_0402_5%
@
1 2
SMELWP#31
@
1 2
SM_PHYS_WPS# SMELWP#
SDCD# MSCD# SMCD# SMRB#
10K_0402_5% @
MC_PWR_CTRL_031
4
+3VS
1 2
1 2
13
D
S
5IN1@
R530 0_0603_5%
5IN1@
MSDATA0_SDDAT0_SMD0 MSDATA1_SDDAT1_SMD1 MSDATA2_SDDAT2_SMD2 MSDATA3_SDDAT3_SMD3 SMD4 SMD5 SMD6 SMD7
SM_WP-IN SM_PHYS_WPS# MSBS_SDCMD_SMWE2 SMALE
SMCD# SMRB#
SMRE# SDWP_SMCE# SMCD#
SMCLE
SD/XD/MS/SM PWR SWITCH
1
C718
2
@
MSDATA0_SDDAT0_SMD031
MSDATA1_SDDATA1_SMD131
MSDATA2_SDDAT2_SMD231 MSDATA3_SDDAT3_SMD331
SM_PHYS_WP#31
R286
1 2
5IN1_LED31
10K_0402_5%
+3VS+3VS
5
U21
1
P
B
2
A
G
TC7SH08FU_SSOP5@
3
R837 0_0402_5%
1 2
5IN1@
MC_PWR_CTRL_1
R506
MSBS_SDCMD_SMWE231
***
Y
1 2
R298 0_0402_5%@
1 2
SDWP_SMCE#31
C316
@
0.1U_0402_16V4Z
SM_WP-IN
4
10K_0402_5%
2N7002_SOT23
5IN1@
SMD431 SMD531 SMD631 SMD731
SMALE31
SMCD#31
+VCC_5IN1 SMRB#31 SMRE#31
SMCLE31
R526
5IN1@
2
G
Q37
1 2 3 4
1U_0603_10V6K
3
12
R5370_0402_5%@
U41
GND
OUT
IN
OUT OUT
IN
FLG
EN#
G528_SO8 5IN1@
8 7 6 5
1U_0603_10V4Z
34 33 32 31 21 22 23 24
35 43 36 37
25 29
26 27 28 30
38
JP15
SM-D0 / XD-D0 SM-D1 / XD-D1 SM-D2 / XD-D2 SM-D3 / XD-D3 SM-D4 / XD-D4 SM-D5 / XD-D5 SM-D6 / XD-D6 SM-D7 / XD-D7
SM_WP-IN / XD_WP-IN SM-WP-SW #SM_-WE / XD_-WE #SM-ALE / XD-ALE
SM-LVD
3
SM-CD-SW SM_-VCC / XD_-VCC #SM_R/-B / XD_R/-B #SM_-RE / XD_-RE #SM_-CE / XD_-CE #SM_-CD
2
SM-CD-COM SM-CLE / XD-CLE
TAITW_R007-010-N3
+VCC_5IN1
C743
5IN1@
**
5 IN 1 CONN
5IN1@
0.1U_0402_16V4Z
1
2
C742
5IN1@
SD-DAT3 SD-DAT2 SD-DAT1 SD-DAT0
SD-WP-SW
SD-CMD SD_CLK SD-VCC
N/C
SD-CD-SW
SD-CD-COM
MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3
MS-SCLK
MS-INS
MS-BS
MS-VCC XD-VCC
XD-CD
GND GND
1
4.7U_0805_10V4Z
5IN1@
C739
2
2
11 12 6 7 5 10 8 9 4 42 41
15 14 16 18 19 17 13 20
40 39 1 44
MSDATA3_SDDAT3_SMD3 MSDATA2_SDDAT2_SMD2 MSDATA1_SDDAT1_SMD1 MSDATA0_SDDAT0_SMD0
SDWP_SMCE#
MSBS_SDCMD_SMWE2
MSCLK_SDCLK
SDCD#
MSDATA0_SDDAT0_SMD0 MSDATA1_SDDAT1_SMD1 MSDATA2_SDDAT2_SMD2 MSDATA3_SDDAT3_SMD3
MSCLK_SDCLK
MSBS_SDCMD_SMWE2
+VCC_5IN1
12
R538 470_0402_5%
5IN1@
13
D
G
Q57
S
2N7002_SOT23
5IN1@
MSCD#
SMCD#
2
+VCC_5IN1
R838 0_0402_5%@ R839 0_0402_5%5IN1@
R295
1 2
MSCLK_SDCLK 31
SDCD# 31
MSCD# 31
12 12
1
2.2K_0402_5%
5IN1@
SMCD#
MC_PWR_CTRL_0
+VCC_5IN1
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Deciphered Date
2006/03/012005/03/01
2
Title
Size Document Number Rev
Custom
Date: Sheet
Compal Electronics, Inc.
5IN 1 CON
EAL30 LA-2691
星期
, 03, 2005
四三月
1.0
of
32 52
1
Page 33
5
Power Switch for PCMCIA
4
Power Switch for PCMCIA (PCI7411 & PCI6411 only)
3
2
1
U17
3
DATA
4
CLOCK
5
LATCH
12
RESET#
15
OC#
21
SHDN#
8
AVPP
19
NC0
9
AVCC
10
AVCC
17
NC1
18
NC2
TPS2220ADBR_SSOP24
7464@
12V 12V
NC3
3.3V
NC4
GND
NC5 NC6 NC7 NC8
20 7
14
R161 0_1206_5%@
13
24
R180 0_1206_5%@
2
5V
1
5V
11
23 22 16 6
+3VS
C245 0.1U_0402_16V4Z
12
C246 4.7U_0805_10V4Z
+5VS
12
C289 0.1U_0402_16V4Z C269 4.7U_0805_10V4Z
7464@ 7464@
7464@ 7464@
CardBus Socket
S1_CE1#30
S1_WE#30 S1_RDY#30
+S1_VCC
+S1_VPP
S1_WP30
S1_A[0..25]30
S1_D[0..15]30
S1_A[0..25] S1_D[0..15]
S1_D3 S1_D4 S1_D5 S1_D6 S1_D7 S1_CE1# S1_A10 S1_OE# S1_A11 S1_A9 S1_A8 S1_A13 S1_A14 S1_WE# S1_RDY#
S1_A16 S1_A15 S1_A12 S1_A7 S1_A6 S1_A5 S1_A4 S1_A3 S1_A2 S1_A1 S1_A0 S1_D0 S1_D1 S1_D2 S1_WP
JP14
1
GND
2
D3 / CAD0
3
D4 / CAD1
4
D5 / CAD3
5
D6 / CAD5
6
D7 / CAD7
7
CE1# / CCBE0#
8
A10 / CAD9
9
OE# / CAD11
10
A11 / CAD12
11
A9 / CAD14
12
A8 / CCBE1#
13
A13 / CPAR
14
A14 / CPERR#
15
WE# / CGNT#
16
IREQ# / CINT#
17
VCC
18
VPP1
19
A16 / CCLK
20
A15 / CIRDY#
21
A12 / CCBE2#
22
A7 / CAD18
23
A6 / CAD20
24
A5 / CAD21
25
A4 / CAD22
26
A3 / CAD23
27
A2 / CAD24
28
A1 / CAD25
29
A0 / CAD26
30
D0 / CAD27
31
D1 / CAD29
32
D2 / RFU
33
IOIS16# / CCLKRUN#
34
GND
69
GND
71
GND
73
GND
75
GND
77
GND
79
GND
81
GND
83
GND
85
GND
87
GND
FOX_WZ21131-G2-P4_RT
GND
CD1# / CCD1#
D11 / CAD2 D12 / CAD4
D13/ CAD6
D14/ RFU
D15 / CAD8
CE2# / CAD10
VS1# / CVS1 IORD# / CAD13 IOWR# /CAD15
A17 / CAD16
A18 / RFU
A19 / CBLOCK#
A20 / CSTOP#
A21 / CDEVSEL#
VCC
VPP2
A22 / CTRDY#
A23 / CFRAME#
A24 / CAD17 A25 / CAD19
VS2# / CVS2
RESET / CRST#
WAIT# / CSERR#
INPACK# / CREQ#
REG# / CCBE3#
SPKR# / CAUDIO
STSCHG# / CSTSCHG
D8 / CAD28
D9 / CAD30
D10 / CAD31
CD2# / CCD2#
GND
GND GND GND GND GND GND GND GND GND GND
35
S1_CD1#
36
S1_D11
37
S1_D12
38
S1_D13
39
S1_D14
40
S1_D15
41
S1_CE2#
42
S1_VS1
43
S1_IORD#
44
S1_IOWR#
45
S1_A17
46
S1_A18
47
S1_A19
48
S1_A20
49
S1_A21
50 51 52
S1_A22
53
S1_A23
54
S1_A24
55
S1_A25
56
S1_VS2
57
S1_RST
58
S1_WAIT#
59
S1_INPACK#
60
S1_REG#
61
S1_BVD2
62
S1_BVD1
63
S1_D8
64
S1_D9
65
S1_D10
66
S1_CD2#
67 68
70 72 74 76 78 80 82 84 86 88
S1_CD1# 30
S1_CE2# 30 S1_VS1 30S1_OE#30 S1_IORD# 30 S1_IOWR# 30
+S1_VCC +S1_VPP
S1_VS2 30 S1_RST 30 S1_WAIT# 30 S1_INPACK# 30 S1_REG# 30 S1_BVD2 30 S1_BVD1 30
S1_CD2# 30
12
1
7464@
2
C247
10U_0805_10V4Z
VPPD1 VCCD0# VPPD0
+S1_VCC
1
40mil
7464@ 2
20mil
D D
C C
CLOCK_CB30
R177
47K_0402_5%
7464@
+3VS
12
+S1_VPP
R176 10K_0402_5%
1U_0603_10V4Z
2
7464@
1
C261
0.01U_0402_16V7K
LATCH_CB30
DATA_CB30
SUSP#27,39,40,42,47,49
7464@
C262
Power Switch for PCMCIA (PCI1510 & PCI4510 only)
40mil
20mil
VCCD0# VPPD0
VPPD1
+S1_VCC
+S1_VPP
+5VS
+3VS
U18
9
12V
5
5V
6
5V
3
3.3V
4
3.3V GND
7
1 2
13
VCC
12
VCC
11
VCC
10
VPP
1
VCCD0
2
VCCD1
15
VPPD0
14
VPPD1
8
OC
SHDN
TPS2211AIDBR_SSOP16
16
15PWS@
B B
15PWS@
C3040.1U_0402_16V4Z C3074.7U_0805_10V4Z
15PWS@
15PWS@
C2940.1U_0402_16V4Z C2924.7U_0805_10V4Z
15PWS@
R182
10K_0402_5% 15PWS@
15PWS@
1 2
C296 0.1U_0402_16V4Z
15PWS@
C297 0.1U_0402_16V4Z
15PWS@
1 2
C298 10U_0805_10V4Z
15PWS@
1 2
C302 0.01U_0402_25V4Z
15PWS@
1 2
C305 1U_0603_10V4Z
VCCD1# 31
Close to CardBus Conn.
C756
10U_0805_10V4Z
1
0.1U_0402_16V4Z
2
4.7U_0805_10V4Z
C753
C751
1
2
1
2
C752
0.1U_0402_16V4Z
C747
+S1_VCC
1
2
+S1_VPP
2
1
0.01U_0402_16V7K
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Deciphered Date
Compal Electronics, Inc.
2006/03/012005/03/01
2
Title
Size Document Number Rev
Custom
Date: Sheet
星期
, 03, 2005
四三月
PCMCIA Socket
EAL30 LA-2691
1
of
33 52
1.0
Page 34
A
B
C
D
E
1
2
+3VS
1
C121
2
4.7U_0805_10V4Z
W=40mils
W=40mils W=40mils
PCI_GNT#1
1 2
KS@
+5VS
+3V
PCI_RST# 23,28,29,31,35,39
+3VS PCI_GNT#1 23
R525
100_0402_5%KS@
PCI_PAR 2 3 ,29,31
PCI_FRAME# 23,29,31 PCI_TRDY# 2 3,29,31 PCI_STOP# 23,29,31
PCI_DEVSEL# 2 3 ,29,31PCI_PERR#23,29,31
PCI_CBE#0 23,29,31
+3V
PCI_AD18
PCI_PIRQG# 23
R842 0_0402_5%@
1 2
0.1U_0402_16V4Z
1
C702
KS@
2
1000P_0402_50V7K
MINI_PME# 29,39
C240
KS@
+3VS
0.1U_0402_16V4Z
1
2
W=40mils
1
C727
KS@
W=40mils
KS@
2
PCI_AD[0..3 1]
JP11
112
KEY KEY
334 556 778
D10
9910 111112
21
131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152 535354 555556 575758 595960 616162 636364 656566 676768 696970 717172 737374 757576 777778 797980 818182 838384 858586 878788 898990 919192 939394 959596 979798 9999100
101
101
103
103
105
105
107
107
109
109
111
111
113
113
115
115
117
117
119
119
121
121
123
123
AMP_1318644-1KS@
4.7U_0805_10V4Z
RB751V_SOD323
CLK_PCI_MINI PCI_REQ#1 PCI_AD31
PCI_AD29 PCI_AD27
PCI_AD25
PCI_AD23 PCI_AD21
PCI_AD19 PCI_AD17
PCI_CBE#2 PCI_IRDY#
PCI_SERR# PCI_PERR#
PCI_CBE#1 PCI_AD14
PCI_AD12 PCI_AD10
PCI_AD8 PCI_AD7
PCI_AD5 PCI_AD3 PCI_AD1
W=30mils W=40mils
C748
KS@
1000P_0402_50V7K
2 4
6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102
102
104
104
106
106
108
108
110
110
112
112
114
114
116
116
118
118
120
120
122
122
124
124
1
C738
KS@
2
PCI_AD[0..31] 23,29,31
RINGTIP
PCI_AD30 PCI_AD28
PCI_AD26 PCI_AD24 MINI_IDSEL
PCI_AD22 PCI_AD20
PCI_AD18 PCI_AD16
PCI_FRAME# PCI_TRDY# PCI_STOP#
PCI_DEVSEL# PCI_AD15
PCI_AD13 PCI_AD11
PCI_AD9 PCI_CBE#0
PCI_AD6 PCI_AD4 PCI_AD2 PCI_AD0
1
2
+5VS
1
C776
KS@
10U_0805_10V4Z
2
WL_OFF#39 KILL_SW#37,39
0.1U_0402_16V4Z
1
C732
KS@
1000P_0402_50V7K
+3VALW
C709 0.1U_0402_16V4Z
KS@
5
U51 TC7SH08FU_SSOP5
1
P
B
Y
2
A
G
3
PCI_PIRQH#23
CLK_PCI_MINI14
PM_CLKRUN#25,29,35
C749
KS@
2
KS@
4
+3VS
PCI_REQ#123
PCI_CBE#323,29,31
PCI_CBE#223,29,31 PCI_IRDY#23,29,31
PCI_SERR#23,29,31
PCI_CBE#123,29,31
+5VS
+5VS
0.1U_0402_16V4Z
1
C760
KS@
1 1
2 2
3 3
1000P_0402_50V7K
C784
KS@
2
CLK_PCI_MINI
12
R494 10_0402_5%@
1
C699 10P_0402_50V8K@
2
1
2
+3V
1
C239
KS@
2
4.7U_0805_10V4Z
4 4
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
C
Compal Secret Data
Deciphered Date
2006/03/012005/03/01
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Mini PCI Slot
, 04, 2005
五三月
EAL30 LA-2691
E
星期
of
34 52
1.0
Page 35
10
SUPER I/O SMsC LPC47N217
H H
C59
+3VS
4.7U_0805_10V4Z
SIO@
C70
1
SIO@
2
0.1U_0402_16V4Z
1
2
G G
R57 0_0402_5%
,28,29,31,34,39 ,25,27,28,31,39
F F
E E
PCI_RST# PLT_RST#
+3VS
R53 1K_0402_5%
SIO@
CLK_14M_SIO
D D
1 2
R58 0_0402_5%@
1 2
+3VS
1 2
R37 10K_0402_5%SIO@
12
+3VS
R52
10_0402_5%
@ 1 2
2
C88
15P_0402_50V8J
@
1
C C
B B
Place on the TOP side(Under MDC conn.)
+5VS
JP10
1
1
2
RXD1 TXD1 DSR#1 RTS#1 CTS#1 DTR#1
A A
RI#1 DCD#1
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
E&T_96212-1011S@
For SW debug use when no seial port
10
9
1
C57
2
0.1U_0402_16V4Z
R56 10K_0402_5%SIO@
1 2
+3VS
+3VS
SIO@
R51 10K_0402_5%
1 2
R50 10K_0402_5%SIO@
1 2
CLK_PCI_SIO
1
SIO@
C626
SIO@
2
0.1U_0402_16V4Z
LPC_AD024,39 LPC_AD124,39 LPC_AD224,39 LPC_AD324,39
LPC_FRAME#24,39
LPC_DRQ#124
PM_CLKRUN#25,29,34
CLK_PCI_SIO14
SERIRQ25,31,39
CLK_14M_SIO14
R67 100K_0402_5% NOT-FIR@
FIR_DET# LPT_DET#
R193 100K_0402_5% NOT-PIO@
R72 33_0402_5%
@ 1 2
2
C101 22P_0402_50V8J
@
1
9
12
12
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
LPC_FRAME# LPC_DRQ#1
SIO_PD# PM_CLKRUN#
CLK_PCI_SIO SERIRQ SIO_PME#
CLK_14M_SIO
SIO_GPIO11 SIO_SMI# SIO_IRQ
8
U10
10
LAD0
12
LAD1
13
LAD2
14
LAD3
15
LFRAME#
16
LDRQ#
17
PCI_RESET#
18
LPCPD#
19
CLKRUN#
20
PCI_CLK
21
SER_IRQ
6
IO_PME#
9
CLK14
23
GPIO40
24
GPIO41
25
GPIO42
27
GPIO43
28
GPIO44
29
GPIO45
30
GPIO46
31
GPIO47
32
GPIO10
33
GPIO11/SYSOPT
34
GPIO12/IO_SMI#
35
GPIO13/IRQIN1
36
GPIO14/IRQIN2
40
GPIO23
8
VSS
22
VSS
43
VSS
52
VSS
LPC47N217_STQFP64 SIO@
Base I/O Address
0 = 02Eh
*
1 = 04Eh
8
CLOCK
LPC I/F
GPIO
POWER
7
RXD1
TXD1 DSR1# RTS1# CTS1# DTR1#
SERIAL I/F
DCD1#
IRRX2
FIR
IRTX2
IRMODE/IRRX3
INIT#
SLCTIN#
SLCT
BUSY
PARALLEL I/F
ACK#
ERROR#
ALF#
STROBE#
7
RI1#
VCC VCC VCC VCC
PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7
VTR
PE
DCD#1
RI#1
DSR#1
CTS#1
4.7K_1206_8P4R_5%
RXD1
62
TXD1
63
DSR#1
64
RTS#1
1
CTS#1
2
DTR#1
3
RI#1
4
DCD#1
5
IRRX
37
IRTXOUT
38
IRMODE
39
LPTINIT#
41
LPTSLCTIN#
42
LPD0
44
LPD1
46
LPD2
47
LPD3
48
LPD4
49
LPD5
50
LPD6
51
LPD7
53
LPTSLCT
55
LPTPE
56
LPTBUSY
57
LPTACK#
58
LPTERR#
59
LPTAFD#
60
LPTSTB#
61
7 11 26 45 54
SIO@
RP5
R40
6
+3VS
18 27 36 45
1K_0402_5%SIO@
1 2
1 2
R48 10K_0402_5%
SIO@
5
FIR Module
+3VS
12
R549
FIR@
47_1206_5%
FIR@
10U_0805_10V4Z
C388
+IR_3VS
1
2
4
L: R POP; FIR Enable H: R De-POPFIR Disable
22U_1206_16V4Z_V1
W=40mil
1
C387
FIR@
0.1U_0402_16V4Z
2
Parallel Port
+5V_PRN
D19
2 1
+5VS
PIO@
RB420D_SOT23
+3VS
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
6
LPTSTB#
LPTAFD#
L: R POP; PIO Enable H: R De-POP PIO Disable
LPT_DET#
Compal Secret Data
5
1 2
R307 33_0402_5%PIO@
1 2
R304 33_0402_5%PIO@
1 2
R68 0_0402_5%PIO@
Deciphered Date
2.2K_0402_5%
W=20mil
+5V_PRN_R
AFD/3M# FD0 LPTERR# FD1 LPT_INIT# FD2 SLCTIN# FD3
FD4 FD5 FD6 FD7 LPTACK# LPTBUSY LPTPE LPTSLCT
4
R308
PIO@
FIR_DET#
+3VS
FIR@
12
1 2
R546 0_0402_5%FIR@
C853
+IR_3VS
W=20mil
JP2
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9 22 10 23 11 24 12 25 13
FOX_DZ11391-H7PIO@
2006/03/012005/03/01
3
1
2
2 4 6 8
1
PIO@
C394
0.1U_0402_16V4Z
2
3
2
+IR_ANODE
1 2
R299 4.7_1206_5% FIR@
1 2
R300 4.7_1206_5% FIR@
U11
IRED_C RXD VCC GND
TFDU6102-TR3_8P FIR@
IRED_A
TXD
SD/MODE
MODE
+5V_PRN
RP41
1 8 2 7 3 6 4 5
2.7K_1206_8P4R_5%PIO@
RP42
1 8 2 7 3 6 4 5
2.7K_1206_8P4R_5%PIO@
RP39
1 8 2 7 3 6 4 5
2.7K_1206_8P4R_5%PIO@
RP44
1 8 2 7 3 6 4 5
2.7K_1206_8P4R_5%PIO@
Compal Electronics, Inc.
Title
Size Document Number Rev
Custom
Date: Sheet
星期
W=60mil
1 3 5 7
FD0 FD1
FD2 FD3
FD7 FD6 FD5 FD4
SLCTIN# LPT_INIT# LPTERR# AFD/3M#
LPTACK# LPTBUSY LPTPE LPTSLCT
IRTXOUT
T = 12mil
IRMODEIRRX
T = 12mil
LPD3 FD3
1 8
LPD2
2 7
LPD1
3 6
LPD0
4 5
LPD7
1 8
LPD6
2 7
LPD5
3 6
LPD4
4 5
1 2
LPTSLCTIN# SLCTIN#
R306 33_0402_5%PIO@
1 2
AFD/3M# LPTERR# LPT_INIT# SLCTIN#
PIO@
220P_1206_8P4C_50V8K
LPTACK# LPTBUSY LPTPE LPTSLCT
PIO@
220P_1206_8P4C_50V8K
FD0 FD1 FD2 FD3
PIO@
220P_1206_8P4C_50V8K
FD4 FD5 FD6 FD7
PIO@
220P_1206_8P4C_50V8K
SMsC LAP47N217 SIO,PIO,FIR EAL30 LA-2691
, 04, 2005
五三月
2
1
RP40
33_1206_8P4R_5%PIO@ RP43
33_1206_8P4R_5%PIO@
R305 33_0402_5%PIO@
CP2
2 3 4 5
CP4
2 3 4 5
CP3
2 3 4 5
CP1
2 3 4 5
of
35 52
1
LPT_INIT#LPTINIT#
FD2 FD1 FD0
FD7 FD6 FD5 FD4
81 7 6
81 7 6
81 7 6
81 7 6
1.0
Page 36
A
AC97 Codec
INT_CD_L28 INT_CD_R28
CD_AGND28
1 1
INT_CD_L INT_CD_R
1 2
Use to isolate +5VALW and +AC97_DVDD
2 2
+AC97_DVDD
+AC97_DVDD
3 3
R823 10K_0402_5%@ R824 1K_0402_5%@
2N7002_SOT23@
EC_SMD_24,39
R826 10K_0402_5%@ R827 1K_0402_5%@
2N7002_SOT23@
EC_SMC_24,39
12
R579 20K_0402_5%
12
R583 20K_0402_5%
12
R581 20K_0402_5% R589 0_0402_5%
bypass EQ when NBA_PLUG = High
12 12
2
G
Q61
1 3
D
S
1 2
R825 0_0402_5%@
12 12
2
G
Q62
1 3
D
S
1 2
R829 0_0402_5%@
12
R582
6.8K_0402_5%
EC_SM_D2
EC_SM_C2
B
1 2
+5VAMP
CD_L CD_R
CD_GNA
12
12
R584
R580
6.8K_0402_5%
6.8K_0402_5%
SPEAKER_ID39
NBA_PLUG37
AC97_RST#24 AC97_SYNC24 AC97_SDOUT24
Ra
UnPoped:Clock source from X'tal Poped: Clock source from Clock Gen
NBA_PLUG
MIC37
12
R562 0_0402_5%
L29
0.1U_0402_16V4Z
AC97_RST# AC97_SYNC AC97_SDOUT
0_0805_5%
C765
SPEAKER_ID
1 2
C812 1U_0402_6.3V4Z
1 2
C809 0.1U_0402_16V4Z
1 2
C810 0.1U_0402_16V4Z
CD_L
C800 1U_0402_6.3V4Z
CD_R
C802 1U_0402_6.3V4Z
CD_GNA
C801 1U_0402_6.3V4Z
MIC
C803 1U_0402_6.3V4Z
C806 1U_0402_6.3V4Z
MONO_IN
1 2
R576 22_0402_5%
R575 22_0402_5% R569 22_0402_5%
EAPD37,39
C
1
2
12 12 12 12
12
DGND
1
C807 10U_0805_10V4Z
2
CD_LIN CD_RIN CD_GNA1 C_MIC
12 12
EC_SM_D2
+AVDD_AC97
38
AVDD125AVDD2
14
AUX_L
15
AUX_R
16
JD2
17
JD1
23
LINE_IN_L
24
LINE_IN_R
18
CD_L
20
CD_R
19
CD_GND
21
MIC1
22
MIC2
13
PHONE
12
PC_BEEP
11
RESET#
10
SYNC
5
SDATA_OUT
45
SDA
46
XTLSEL
47
SPDIFI/EAPD
48
SPDIFO
4
DVSS1
7
DVSS2
U45 ALC250-VD_LQFP48
Place these components close to Codec
24.576MHz_16P_3XG-24576-43E1
1
C773
2
22P_0402_50V8J
@
D
+AC97_DVDD
DVDD11DVDD2
LINE_OUT_L
LINE_OUT_R
MONO_OUT/VREFOUT3
HP_OUT_L HP_OUT_R
BIT_CLK
SDATA_IN
XTL_IN
XTL_OUT
AFILT1 AFILT2
VREFOUT
VREF
DCVOL
VREFOUT2
VAUX
DISABLE#
AVSS1 AVSS2
1 2
R566 1M_0402_5%@
X4
XTL_IN
12
@
NC
SCK
NC
XTL_OUT
1
2
9
35 36 37 39 41
6 8 2
3 29 30 28 27 32
31 33 34 43 44
40 26 42
C781
L30
1 2
L31
0_0805_5%@
1 2
0_0805_5%
C770
0.1U_0402_16V4Z
C778 1000P_0402_50V7K@ C774 1000P_0402_50V7K@
LINEL
1 2
C777 1U_0402_6.3V4Z
LINER
1 2
C775 1U_0402_6.3V4Z
C788 47P_0402_50V8J@
12
1 2
R570 22_0402_5%
1 2
R572 22_0402_5%
XTL_IN
XTL_OUT
1 2
C791 1000P_0402_50V7K
1 2
C789 1000P_0402_50V7K
+VREFOUT
1 2
R573 0_0603_5%
EC_SM_C2
AGND
AGND
1
2
22P_0402_50V8J
@
E
1
C792 10U_0805_10V4Z
2
1 2 1 2
AC97_BITCLK 24 AC97_SDIN0 24
+AUD_VREF
1 2
R563 10K_0402_5%
1 2
R828 0_0402_5%
+AUD_VREF
+3VS +3V
AMP_LEFT AMP_RIGHT
12
R567
@
C787
0_0402_5%
+3VS
C796 4.7U_0805_10V4Z
1 2 1 2
C790 0.1U_0402_16V4Z
R801
1 2
1
C785
1
2
2
1U_0402_6.3V4Z
EC_IDERST 27,39
AMP_LEFT 37
AMP_RIGHT 37
0_0402_5%
C786
0.01U_0402_16V7K
F
R574
1M_0402_5%
1
C793
2
1U_0402_6.3V4Z
+AVDD_AC97
@
1 2
1
2
0.1U_0402_16V4Z
CLK_14M_CODEC 14
1
C794
2
1U_0402_6.3V4Z
G
H
+AVDD_AC97
12
C
2
B
E
2 1
R577 10K_0402_5%
12
R588 10K_0402_5%
MONO_IN_O
1
Q42
3
2SC2411K_SC59
D17 RB751V_SOD323
1
C821 10U_0805_10V4Z
2
C805
12
1U_0402_6.3V4Z
R586
1 2
2.4K_0402_5%
MONO_IN
Security Classification
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
System Sound
C325
BEEP#39
PCM_SPK#31
4 4
SB_SPKR25
A
2
1
1 2
1U_0402_6.3V4Z
C326
1 2
1U_0402_6.3V4Z
C866
0.01U_0402_16V7K
C327
1 2
1U_0402_6.3V4Z
B
R188
1 2
560_0402_5%
R189
1 2
560_0402_5%
R190
1 2
560_0402_5%
10K_0402_5%
MONO_IN_I
12
R191
C
MDC Connector
+3V
+3VS
AC97_SDOUT AC97_RST#
Issued Date
10U_0805_10V4Z
0_0603_5%
+3VS_MDC
1 2
L9
C192
10U_0805_10V4Z
R547
1 2 1 2
R548
12
R1320_0805_5%
2
C193
+3V_MDC
1
2
1
0_0402_5% 0_0402_5%
E
JP16
1
MONO_OUT/PC_BEEP
3
GND
5
AUXA_RIGHT
7
AUXA_LEFT
9
CD_GND
11
CD_RIGHT
13
CD_LEFT
15
GND
17
+3.3Vaux/BT_VCC
19
GND
21
+3.3Vmain
23
AC97_SDATA_OUT
25
AC97_RESET#
27
GND
29
AC97_MSTRCLK
ACES_88018-3010
Deciphered Date
AUDIO_PWRDN/DETECH
RESERVED/PRIMARY_DN
RESERVED/+5VD/WAKEUP
2006/03/012005/03/01
F
MONO_PHONE
RESERVED/BT_ON#
GND
+5Vmain
RESERVED/USB+
RESERVED/USB-
RESERVED/GND
AC97_SYNC AC97_SDATA_IN1 AC97_SDATA_IN0
GND
AC97_BITCLK
+5VS_MDC
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
2
1
+3VS_MDC_R
R554 0_0402_5% R148 0_0402_5% R147 22_0402_5%
Title
Size Document Number Rev
Date: Sheet
星期四 三月
G
L12
1 2
C228 1U_0603_10V4Z
R149
1 2
10K_0402_5%
1 2
12
1 2
R151 22_0402_5%
0_0603_5%
1 2
+5VS
+3VS
Compal Electronics, Inc.
AC97 CODEC ALC250 Ver.C EAL30 LA-2691
AC97_SYNC
AC97_SDIN1 24
AC97_BITCLK
36 52, 03, 2005
H
1.0
of
Page 37
A
Audio AMP
1 1
fo=1/(2*3.14*R*C)=260Hz R=1.5K / C=0.47U
HIGH
Pin 22
NBA_PLUG36
12
C265 0.1U_0402_16V4Z
AMP_LEFT36 AMP_RIGHT36
2 2
AMP_LEFT AMP_RIGHT
AMP_RIGHT
C270 0.47U_0603_16V4Z C824 0.47U_0603_16V4Z C271 0.47U_0603_16V4Z C829 0.47U_0603_16V4Z
1 2 1 2 1 2 1 2
12 12
AMP_L AMP_R
R1781.5K_0402_5% R5911.5K_0402_5%
PIN 10,4 ACTIVE
LOW PIN 9,5 ACTIVE
NBA_PLUG VOL_AMP INTSPK_L1 INTSPK_R1
1 2
C266 0.47U_0603_16V4Z
1 2
C828 0.47U_0603_16V4Z
HP_LAMP_LEFT HP_R
AMP_L AMP_R
B
W=40Mil
0.1U_0402_16V4Z
AMP_LIN AMP_RIN
1
2
+5VAMP
1
C293
2
U16
7
PVDD
SHUTDOWN#
18
PVDD
19
VDD
2
HP/LINE#
3
VOLUME
4
LOUT+
21
ROUT+
5
LLINEIN
23
RLINEIN
6
LHPIN
20
RHPIN
17
CLK
TPA0232PWP_TSSOP24
C328
0.047U_0402_16V4Z
1
C826
4.7U_0805_10V4Z
2
SE/BTL#
PC-BEEP
BYPASS
LOUT-
ROUT-
LIN RIN
GND GND GND GND
22 15 14 11 9 16 10 8
1 12 13 24
NBA_PLUG
2
1
(0.47U~1U)
SHUTDOWN#
INTSPK_L2 INTSPK_R2
C301
+5VAMP
12
R592 100K_0402_5%
Q41
13
D
Q24
C268 0.1U_0402_16V4Z
1 2
0.47U_0603_16V4Z
2
G
2N7002_SOT23@
S
1
C299
2
0.47U_0603_16V4Z
C
13
D
S
1
C300
2
2N7002_SOT23
2
G
0.47U_0603_16V4Z
EC_MUTE 39
EAPD 36,39
D
Speaker Connector
Audio Board Connector
JP22
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
ACES_85203-1202
+AUD_VREF
WL_LED#39
KILL_SW#34,39
+5VAMP
MIC36
NBA_PLUG VOL_AMP
MIC INTSPK_R1
INTSPK_L1
E
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
change 0 ohm
INTSPK_R1 INTSPK_R2 INTSPK_L1
Regulator for AMP
+5VALW TO +5VLDO
+5VALWP
R184 10K_0402_5%
1 2
3 3
R183
10K_0402_5%
SYSON38,39,42,49
2N7002_SOT23
4 4
+12VALW+5VALWP
12
12
R171 1K_0402_5%
13
D
Q13
2
G
2N7002_SOT23
S
13
D
2
G
Q14
S
1
C303 1U_0603_10V4Z
2
1
@
2
1U_0805_25V4Z
D12
C264
LM431SB_SOT23
1
A
2
K
R
AOS 3401_SOT23
1 3
5
4
2
3
Q12
+5VALW_LDO
U15
D8D7D6D
SI4800DY_SO8
S1S2S3G
12
R590
3.9K_0603_1%
12
R593
4.99K_0603_1%
+5VLDO
+5VAMP TO +5VLDO
+5VLDO +5VAMP
A
B
+5VALW DECOUPLING
+5VALWP
1
C306
@
2
22U_1206_16V4Z_V1
(4.5V)
+5VLDO DECOUPLING
+5VLDO
1
C804
2
22U_1206_16V4Z_V1
L32
1 2
0_0805_5%
L33
1 2
0_0805_5%
1
C295
2
1U_0603_10V4Z
22U_1206_16V4Z_V1
1
1
2
C291
C290
2
1U_0603_10V4Z
(4.5V)
1
1
C822
C813
@
2
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1
1
C827
C825
@
1U_0603_10V4Z
2
2
1U_0603_10V4Z
Security Classification
1
1
C820
C819
@
2
2
0.1U_0402_10V6K
0.1U_0402_16V4Z
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
INTSPK_L2
SM05_SOT23
Moat Bridge
1 2
R179 0_0805_5%
1 2
R561 0_0805_5%
1 2
R571 0_0805_5%
Deciphered Date
2
3
D38
3
@
1
1
2006/03/012005/03/01
D
L37 FBM-11-160808-121-T_0603
1 2
L36 FBM-11-160808-121-T_0603
1 2
L35 FBM-11-160808-121-T_0603
1 2
L34 FBM-11-160808-121-T_0603
1 2
2
D39
SM05_SOT23@
Title
Size Document Number Rev
Custom
Date: Sheet
Compal Electronics, Inc.
AMP & Audio Jack EAL30 LA-2691
星期四 三月
ACES_85204-0400
E
JP21
37 52, 03, 2005
1 2 3 4
1.0
of
Page 38
LID Switch
LID_SW#39
SW/LED Connector
ACES_85203-1402
Touch Pad Connector
ACES_85203-1202
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
Battery mode Hibernation
100K_0402_5%
S4_LID_SW#
SYSON37,39,42,49
S4_LATCH39
S4_DATA39
+3VALW
12
R319
100K_0402_5%
S4_LID_SW#
V-PORT-0603-220 M-V05_0603
1 2 3 4 5 6 7 8 9 10 11 12 13 14
12 11 10 9 8 7 6 5 4 3 2 1
RTCVREF
R195
RTCVREF
+3VALW
PWR_LED# PWR_SUSP_LED EC_STOPBTN# EC_PLAYBTN# EC_FRDBTN# EC_REVBTN# EC_UTXD/KSO17
MUL_KEY_ESD# ON/OFF
PWR_LED#
PWR_SUSP_LED
12
2
G
10K_0402_5%
C229 0.1U_0402_16V4Z
12
13
D
S
R201
1U_0805_25V4Z @
1 2
R202 10K_0402_5%
JP17
10 11 12 13 14
12 11 10
JP18
1 2 3 4 5 6 7 8 9
9 8 7 6 5 4 3 2 1
DAN202U_SC70 D22
2
1
3
D5
@
1 2
+5V
+5VS
2
C249
0.1U_0402_16V4Z
1
+5VS
+5V
+5VALW
RTCVREF
680K_0402_5%
R196 100K_0402_5%
1 2
C372 1U_0603_10V6K
Q44 2N7002_SOT23
RTCVREF
R221
1 2
10K_0402_5%
1 2
1
C365
2
D15
2 1
RB751V_SOD323
SW1
1
3
ESE11MV9_4P
2 1
MODE_LED# 39 HDD_LED# 39
KSI1 39 KSI0 39 KSI3 39 KSI2 39
KSO17 39
DAN202U_SC70
TP_CLK 39
TP_DATA 39
ACIN 25,39,43 POWER_LED# 39
SUSP_LED 39
BATT_CHGI_LED# 39
BATT_LOW_LED# 39
12
12
R197
1 2
R200 10K_0402_5%
1
D18 1N4148_SOD80
2
4
D11
51_ON#
3
MUL_KEY#
2
RTCVREF
C331 0.1U_0402_16V4Z
1 2
5
U19
P
2
A
Y
G
NC7SZ14M5X_SOT23-5
3
1 2
C366 1U_0603_10V4Z
U47
1
CD1#
2
D1
3
CP1
4
SD1#
5
Q1
6
Q1#
7
GND
74LCX74MTC_TSSOP14
BTN TOP
SW2
5
6
SMT1-05_4P@
MUL_KEY# 39
1 2
R198 10K_0402_5%
2
Q45
2N7002_SOT23
RTCVREF
14 13 12 11 10 09 08
3 4
G
2N7002_SOT23
4
VCC
CD2#
D2
CP2
SD2#
Q2
Q2#
D_SET_S4
1 2
ON/OFF BUTTON
5
6
SMT1-05_4P@
+5V
MODE_LED# HDD_LED# PWR_LED# PWR_SUSP_LED EC_STOPBTN# EC_PLAYBTN# EC_FRDBTN# EC_REVBTN# EC_UTXD/KSO17 MUL_KEY_ESD# ON/OFF
ON/OFF
13
D
S
13
D
S
3 4
SW3
2N7002_SOT23@
Q43 2N7002_SOT23
220P_0402_50V7K
1
C341
2
Q16
1 2
EC_ON39
2
G
13
D
S
0.1U_0402_16V4Z
1 2
C333
Q18
2
G
for ON/OFF switch
+3VALW
12
R194
2 3
2
3
1
100K_0402_5%
ON/OFFBTN#
51_ON#
13
Q15
DTC124EK_SC59
D34 PSOT24C_SOT23
ON/OFFBTN# 39 51_ON# 43
1
C329
2
0.01U_0402_16V7K
+5VALW
SUSON42
Compal Secret Data
12
D13 RLZ20A_LL34
WHEN R=0,Vbe=1.35V WHEN R=33K,Vbe=0.8V
1 2
R297 0_0805_5%@
AO3402_SOT23 Q17
D
1 3
2
Deciphered Date
S
G
+5V
1
C330
0.1U_0402_16V4Z
2
Power OK Circuit
R199
330K_0402_5%
C364
1U_0603_10V6K
2006/03/012005/03/01
PADS_LED#39
+3VS
12
1
2
1
DAN202U_SC70
R219
4.7K_0402_5%
R220
1 2
0_0402_5%
2
G
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
D28
2
ON/OFF
+3VALW
12
13
D
S
C867 470P_0402_50V7K@ C868 470P_0402_50V7K@ C869 470P_0402_50V7K@ C870 470P_0402_50V7K@ C871 470P_0402_50V7K@ C872 470P_0402_50V7K@ C873 470P_0402_50V7K@ C874 470P_0402_50V7K@ C875 470P_0402_50V7K@ C876 470P_0402_50V7K@ C877 470P_0402_50V7K@ C878 470P_0402_50V7K@
1
C858
220P_0402_50V7K
2
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
INT_KBD CONN.
KEYBOARD CONN.
PADS_LED#
R181
+3VS
300_0402_5%
+3VS
+3VALW +3VALW
1
SN74LVC14APWLE_TSSOP14
12
KSO14 KSO11
KSO9
KSI7
KSO7
KSI4 KSI5
KSO5
KSI0
KSO1
KSI2
KSO4
R173
12
300_0402_5%
PADS_LED#
12
C287100P_0402_50V8J
KSO14
12
C284100P_0402_50V8J
KSO11
12
C282100P_0402_50V8J
KSO9
12
C281100P_0402_50V8J
KSI7
12
C280100P_0402_50V8J
KSO7
12
C279100P_0402_50V8J
KSI4
12
C278100P_0402_50V8J
KSI5
12
C277100P_0402_50V8J
KSO5
12
C272100P_0402_50V8J
KSI0
12
C276100P_0402_50V8J
KSO1
12
C275100P_0402_50V8J
KSI2
12
C274100P_0402_50V8J
KSO4
12
C273100P_0402_50V8J
14
U48A
P
O2I
G
7
SN74LVC14APWLE_TSSOP14
Title
Size Document Number Rev
星期
Date: Sheet
KSI[0..7] KSO[0..15]
ACES_88172-3400
37 38 33 31 29 27 25 23 21 19 17 15 13 11
9 7 5 3 1
35
JP19
14
U48B
P
3
O4I
G
7
NUM_LED#
34
CAPS_LED#
32
KSO15
30
KSO10
28
KSO8
26
KSO13
24
KSO3
22
KSO12
20
KSI6
18
KSO6
16
KSI3
14
KSO0
12
KSI1
10
KSO2
8
R174
6
1 2
300_0402_5%
4 2 36
NUM_LED# CAPS_LED#
C332
1 2
0.1U_0402_16V4Z
12
1 2
C288 100P_0402_50V8J
1 2
C286 100P_0402_50V8J
KSO15
1 2
C285 100P_0402_50V8J
KSO10
1 2
C283 100P_0402_50V8J
KSO8
1 2
C260 100P_0402_50V8J
KSO13
1 2
C259 100P_0402_50V8J
KSO3
1 2
C258 100P_0402_50V8J
KSO12
1 2
C257 100P_0402_50V8J
KSI6
1 2
C256 100P_0402_50V8J
KSO6
1 2
C255 100P_0402_50V8J
KSI3
1 2
C254 100P_0402_50V8J
KSO0
1 2
C253 100P_0402_50V8J
KSI1
1 2
C252 100P_0402_50V8J
KSO2
1 2
C251 100P_0402_50V8J
R222 100K_0402_5%
@
Pull Low at SB
Compal Electronics, Inc.
S4R,LID,PIO,SYS CONN
EAL30 LA-2691
, 03, 2005
四三月
38 52
KSI[0..7] 39 KSO[0..15] 39
NUM_LED# 39 CAPS_LED# 39
+3VS
SYS_PWROK 25
1.0
of
Page 39
A
+3VALW
4.7U_0805_10V4Z
+3VALW
FBM-L11-160808-800LMT_0603
1 1
+5VS
,23,25,27,28,31,35
2 2
+3VALW
+5VALWP
3 3
+3VALW
4 4
0.1U_0402_16V4Z
1
C367
FBM-L11-160808-800LMT_0603
PCI_RST#23,28 ,29,31,34,35 PLT_RST#
CLK_PCI_LPC
12
R399 10_0402_5%@
1
C476 10P_0402_50V8K@
2
1
2
2
L15
1 2
C348
0.1U_0402_16V4Z
L16
1 2
1 2
R807 10K_0402_5%
1 2
R808 10K_0402_5%
1 2
R809 10K_0402_5%
1 2
R810 10K_0402_5%
1 2
R231 10K_0402_5%
1 2
R233 10K_0402_5%
R234 0_0402_5% R235 0_0402_5%@
1 2
R236 10K_0402_5%
1 2
R237 10K_0402_5%
1 2
R596 10K_0402_5%
1 2
R203 10K_0402_5%
1 2
R241 10K_0402_5%
1 2
R811 10K_0402_5%
1 2
R812 10K_0402_5%
1 2
R813 10K_0402_5%
1 2
R814 10K_0402_5%
1 2
R205 20K_0402_5%
1000P_0402_50V7K
1
C343
C342
2
0.1U_0402_16V4Z
2
1
ECAGND
1000P_0402_50V7K
PSCLK1 PSDATA1 TP_DATA TP_CLK
PSDATA2 PSCLK2
1 2 1 2
FSEL#
MUL_KEY# FREAD# EC_SMI#
SELIO#
EC_SMD_2 EC_SMC_2 EC_SMC_1 EC_SMD_1
LID_SW#
1
C344
2
1
C345
2
4.7U_0805_10V4Z
+EC_AVCC
C368
+3VALW
0.1U_0402_16V4Z
1
2
LRST#
1
C347
2
R595 10K_0402_5%
+3VALW
R172
1 2
47K_0402_5%
12
C335
0.1U_0402_16V4Z
B
U33
LPC_AD024,35 LPC_AD124,35 LPC_AD224,35 LPC_AD324,35
LPC_FRAME#24,35
CLK_PCI_LPC14
SERIRQ25,31,35
FREAD#40
FWR#40 FSEL#40
12
TP_CLK38
TP_DATA38
EC_SMC_140,44 EC_SMD_140,44 EC_SMC_24,36 EC_SMD_24,36
EC_SCI#25
SPEAKER_ID36
ENBKL7,15 BKOFF#21 FSTCHG45
EC_SMI#25
ODD_RST#28
WL_OFF#34
EC_SWI#25
S4_LATCH38
LID_SW#38
MUL_KEY#38
SYSON37,38,42,49
SUSP#2 7 ,3 3,40,42,47,49
VR_ON50
PBTN_OUT#25
PADS_LED#38 CAPS_LED#38
NUM_LED#38
PHDD_LED#24
EC_GA2024
EC_KBRST#24
LRST# CLK_PCI_LPC
SKU_ID1
FREAD#
FWR# FSEL# SELIO#
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19 EC_TINIT#
PSCLK1
PSDATA1
PSCLK2
PSDATA2
TP_CLK
TP_DATA
EC_SMC_1 EC_SMD_1 EC_SMC_2 EC_SMD_2
SPEAKER_ID
ENBKL
EC_SMI#
LID_SW#
MUL_KEY#
PADS_LED#
CAPS_LED# NUM_LED# PHDD_LED# EC_RST#
15
LAD0
14
LAD1
13
LAD2
10
LAD3
9
LFRAME#
165
LRST#/GPIO2C
18
LCLK
7
SERIRQ
25
CLKRUN#/GPIO0C
24
LPCPD#/GPIO0B
150
RD#
151
WR#
173
MEMCS#
152
IOCS#
138
D0
139
D1
140
D2
141
D3
144
D4
145
D5
146
D6
147
D7
124
A0
125
A1/XIOP_TP
126
A2
127
A3
128
A4/DMRP_TP
131
A5/EMWB_TP
132
A6
133
A7
143
A8
142
A9
135
A10
134
A11
130
A12
129
A13
121
A14
120
A15
113
A16
112
A17
104
A18
103
A19
108
A20/GPIO23
105
E51CS#/GPIO20/ISPEN
110
PSCLK1
111
PSDAT1
114
PSCLK2
115
PSDAT2
116
PSCLK3
117
PSDAT3
163
SCL1
164
SDA1
169
SCL2
170
SDA2
8
GPIO04
20
GPIO07
21
GPIO08
22
GPIO09
27
GPIO0D
28
GPIO0E
48
GPIO10
62
GPIO13
63
GPIO14
69
GPIO15
70
GPIO16
75
GPIO17
109
GPIO24
118
GPIO25
119
GPIO26
148
GPIO27
149
GPIO28
155
GPIO29
156
GPIO2A
162
GPIO2B
168
GPIO2D
55
FnLock#/GPIO12
54
CapLock#/GPIO011
23
NumLock#/GPIO0A
41
ScrollLock#/GPIO0F
19
ECRST#
5
GA20/GPIO02
6
KBRST#/GPIO03
31
ECSCI#
+3VALW
LPC Interface
*
*
PS2 Interface
SMBus
GPIO
*
*
*
*
MISC
C
+EC_AVCC
95
123
136
157
166
VCC16VCC34VCC45VCC
VCC
VCC
VCC
VCCA
X-BUS Interface
Pulse Width
ENE-KB910-B4
Analog To Digital
Digital To Analog
Expanded I/O
GND17GND35GND46GND
+EC_RTCVCC
ECAGND
96
161
159
AGND
VCCBAT
BATGND
Internal Keyboard
FAN2PWM/GPOW2/PWM2
FAN1PWM/GPOW7/PWM7
Wake Up Pin
TIN2/FANFB2/GPWU7
*
*
* * *
GPIO2E/TOUT1/FANFB1
DPLL_TP/GPIO06/FANFB3
FAN
TEST_TP/GPIO05/FAN3PWM
Timer Pin
E51RXD/GPIO21/ISPCLK E51TXD/GPIO22/ISPDAT
GND
GND
122
137
167
1 2
R223 0_0402_5%
1 2
R224 0_0402_5%@
2
C373 1U_0603_10V4Z
1
GPOK0/KSO0 GPOK1/KSO1 GPOK2/KSO2 GPOK3/KSO3 GPOK4/KSO4 GPOK5/KSO5 GPOK6/KSO6 GPOK7/KSO7 GPOK8/KSO8
GPOK9/KSO9 GPOK10/KSO10 GPOK11/KSO11 GPOK12/KSO12 GPOK13/KSO13 GPOK14/KSO14 GPOK15/KSO15 GPOK16/KSO16 GPOK17/KSO17
GPIK0/KSI0 GPIK1/KSI1 GPIK2/KSI2 GPIK3/KSI3 GPIK4/KSI4 GPIK5/KSI5 GPIK6/KSI6 GPIK7/KSI7
GPOW0/PWM0 GPOW1/PWM1
GPOW3/PWM3 GPOW4/PWM4 GPOW5/PWM5 GPOW6/PWM6
GPWU0 GPWU1 GPWU2 GPWU3 GPWU4 GPWU5
TIN1/GPWU6
GPIAD0/AD0 GPIAD1/AD1 GPIAD2/AD2 GPIAD3/AD3 GPIAD4/AD4 GPIAD5/AD5 GPIAD6/AD6 GPIAD7/AD7
GPODA0/DA0
GPODA1/DA1
GPODA2/DA2
GPODA3/DA3
GPODA4/DA4
GPODA5/DA5
GPODA6/DA6
GPODA7/DA7
GPIO18/XIO8CS#
*
GPIO19/XIO9CS#
*
GPIO1A/XIOACS#
*
GPIO1B/XIOBCS# GPIO1C/XIOCCS# GPIO1D/XIODCS# GPIO1E/XIOECS#
GPIO1F/XIOFCS#
TOUT2/GPIO2F
E51IT0/GPIO00 E51IT1/GPIO01
XCLKI
XCLKO
KB910Q B4_LQFP176
+3VALW +RTCVCC
For ENE KB910 Rev.B4
KSO0
49
KSO1
50
KSO2
51
KSO3
52
KSO4
53
KSO5
56
KSO6
57
KSO7
58
KSO8
59
KSO9
60
KSO10
61
KSO11
64
KSO12
65
KSO13
66
KSO14
67
KSO15
68 153
KSO17
154
KSI0
71
KSI1
72
KSI2
73
KSI3
74
KSI4
77
KSI5
78
KSI6
79
KSI7
80 32
33 36 37 38 39 40 43
2 26 29 30 44 76 172 176
81 82 83 84 87 88 89 90
99 100 101 102 1 42 47 174
85 86 91 92 93 94 97 98
171 12 11
175 3
4 106 107
158 160
KSO17 38
PCI_PME#
C334
AD_BID0 ADP_IR
CD_PLAY
1 2 1 2
E51_RXD E51_TXD
CRY1 CRY2
32.768KHZ_12.5P_1TJS125DJ2A073
D
INVT_PWM 21 BEEP# 36 SUSP_LED 38 ACOFF 45
EC_ON 38 EC_LID_OUT# 25
EC_MUTE 37
ON/OFFBTN# 38 KILL_SW# 34,37
PM_SLP_S3# 25 PM_SLP_S5# 25 IDE_ODDRST# 25 PCI_PME# 29,34 BATT_TEMP 44
1 2
0.01U_0402_16V7K
BATT_OVP 45 LI/NIMH# 44
DAC_BRIG 21 IREF 45
EN_DFAN1 4
CD_PLAY 28
EC_IDERST 27,36
POWER_LED# 38 WL_LED# 37 HDD_LED# 38 BATT_LOW_LED# 38 BATT_CHGI_LED# 38 MODE_LED# 38S4_DATA38
FANSPEED1 4
R1691K_0402_5%
R1751K_0402_5%
EC_THERM# 25
EC_RSMRST# 25 SHDD_LED# 28
1 2
R242 0_0402_5%
R165 R163
1 2
0_0402_5%
JP26
ACES_85205-0400@
KSO[0..15]
KSI[0..7]
ADB[0..7]
KBA[0..19]
ECAGND
20M_0603_5%@
1
C336
2
10P_0402_50V8K
1
1
2
2
3
3
4
4
E51_RXD
E51_TXD
KSO[0..15] 38
KSI[0..7] 38
ADB[0..7] 40 KBA[0..19] 40
+3VALW
SKU_ID0 SKU_ID1
EC dont use this function
R239
12
CD_PLAY
4
OUT
NC3NC
ACIN_D
EAPD 36,37
C337
1
Y2
IN
2
ADP_IRSKU_ID0
1
2
1
2
2
3
D40
SM05_SOT23@
1
10P_0402_50V8K
2 1
1 2
C374
0.22U_0603_16V7K
JP24
1 2 3 4 5 6 7 8 9
10
E&T_96212-1011S@
KBA5 KBA4 KBA1
10K_0402_5%
12
+3VALW
R238
10K_0402_5%
Board ID
For EC Tools
1 2 3
E51_TXD
4 5 6 7
E51_RXD
8 9 10
1 2
R225 1K_0402_5%
1 2
R226 1K_0402_5%
1 2
R227 1K_0402_5%
1 2
R228 10K_0402_5%@
1 2
R229 10K_0402_5%@
1 2
R230 10K_0402_5%
1 2
R232 10K_0402_5%
ACIN 25,38,43
D16RB751V_SOD323
ADP_I 45
+3VALW
Ra
AD_BID0
*
Rb
MINI_PME#29,34
ONBD_LAN_PME#29,34
E
12
R594 10K_0402_5%
12
R204 0_0402_5%
+3VALW
+3VALW
100K_0402_5%
PCI_PME#
R84
+3VALW
12
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
C
Compal Secret Data
Deciphered Date
Compal Electronics, Inc.
2006/03/012005/03/01
D
Title
Size Document Number Rev
Custom
Date: Sheet
星期
, 03, 2005
四三月
EC KB910(LPC) EAL30 LA-2691
E
of
39 52
1.0
Page 40
5
4
3
INT_FLASH_SEL
SN74LVC08APW_TSSOP14
U13C
8
O
2
14
9
P
A
SN74LVC14APWLE_TSSOP14
10
B
G
7
U48C
O6I
1
14
P
5
G
7
SB_INT_FLASH_SEL# 25
SUS_STAT# 25
D D
INT_FSEL#
SN74LVC32APWLE_TSSOP14
KBA[0..19]39
ADB[0..7]39
1MB Flash ROM
KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7 KBA8
1 2
KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15 KBA16 KBA17 KBA18 KBA19
INT_FSEL# FREAD# FWE#
C311
0.1U_0402_16V4Z
C C
FREAD#39
B B
EC_SMC_139,44 EC_SMD_139,44
U38
21
A0
20
A1
19
A2
18
A3
17
A4
16
A5
15
A6
14
A7
8
A8
7
A9
36
A10
6
A11
5
A12
4
A13
3
A14
2
A15
1
A16
40
A17
13
A18
37
A19
22
CE#
24
OE#
9
WE#
SST39VF080-70_TSOP40
U20
8
VCC
7
WP
6
SCL
5
SDA
AT24C16N-10SI-2.7_SO8
KBA[0..19] ADB[0..7]
VCC0 VCC1
RP#
READY/BUSY#
NC0 NC1
GND0 GND1
1
A0
2
A1
3
A2
4
GND
+3VALW
31 30
ADB0
25
D0 D1 D2 D3 D4 D5 D6 D7
NC
26 27 28 32 33 34 35
RESET#
10 11 12 29 38
23 39
+3VALW+3VALW
12
R186 100K_0402_5%
12
R185 100K_0402_5%
ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
R87 100K_0402_5%
1 2
1
C113
0.1U_0402_16V4Z
2
+3VALW
FWE#
SN74LVC32APWLE_TSSOP14
+3VALW
14
U23B
4
P
A
6
O
B
G
7
+3VALW
14
U23A
P
A
3
O
B
G
7
5
R207
1 2
INT_FLASH_EN#
12
100K_0402_5%
12
0.1U_0402_16V4Z
+3VALW
12
20K_0402_5%
R289
C318
2
1 3
D
G
Q19 2N7002_SOT23
S
1MB ROM Socket
KBA16 KBA17 KBA15 KBA14
KBA12 KBA11 KBA9 KBA8 FWE# RESET# INT_FLASH_EN# INT_FLASH_SEL KBA18 KBA7 KBA6 KBA5 KBA4 KBA3 KBA2 KBA1
JP9
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
SUYIN_80065AR-040G2T@
KBA19KBA13 KBA10 ADB7 ADB6 ADB5 ADB4
ADB3 ADB2 ADB1 ADB0 FREAD#
FSEL# KBA0
FSEL# 39
SUSP# 27,33,39,42,47,49
EC_FLASH# 25
FWR# 39
+3VALW
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Deciphered Date
2006/03/012005/03/01
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
BIOS/WL-SW/Screw Hole/USB EAL30 LA-2691
星期
, 03, 2005
四三月
1
40 52
of
1.0
Page 41
+USB_VCCA +3VALW
12
U29
1
GND
C443
2
IN
3
IN
4
EN#
1
G528_SO8
2
+5VALWP
SYSON#42
SYSON# SYSON#
4.7U_0805_10V4Z
OUT OUT OUT FLG
8 7 6 5
1 2
0_0402_5%@
Close to JP20
USB CONN. 1
W=40mils
1
+
C431
150U_D2_6.3VM
USB20_N025 USB20_N2 25 USB20_P025
C406
0.1U_0402_16V4Z
2
2
3
D35
SM05_SOT23@
1
1
1
2
C411
2
C408
1
1
@
@
2
2
10P_0402_50V8K
R17 100K_0402_5%
R16
1000P_0402_50V7K
C407
R15
1 2
47K_0402_5%
5
VCC
6
D1-
7
D1+
8
VSS
9
G311G4
SUYIN_020122MR008S540ZU
10P_0402_50V8K
1
C13
0.1U_0402_16V4Z
2
1000P_0402_50V7K
JP5
1
VCC
2
D0-
3
D0+
4
VSS
G210G1
12
USB_OC#2 25 USB_OC#0 25 USB_OC#4 25
+5VALWP
1
2
Close to JP21
USB CONN. 2
W=40mils W=40mils
1
2
10P_0402_50V8K
C410
1
+
150U_D2_6.3VM
2
2
3
D36
SM05_SOT23@
1
C430
1
C405
2
C413
1
@
2
10P_0402_50V8K
0.1U_0402_16V4Z
C414
1
@
2
U46
1
GND
2
IN
3
IN
4
EN#
C830
G528_SO8
4.7U_0805_10V4Z
USB20_P2 25
OUT OUT OUT FLG
8 7 6 5
USB20_N425
USB20_P425
+3VALW+USB_VCCC
R597
1 2
0_0402_5%@
C309
150U_D2_6.3VM
D37
SM05_SOT23@
12
R598 100K_0402_5%
R599
1 2
47K_0402_5%
1
2
USB CONN. 3
+USB_VCCC+USB_VCCA+USB_VCCA
1
+
C308
0.1U_0402_16V4Z
2
2
3
@
1
C831
0.1U_0402_16V4Z
1
2
C833
C832
1
1
@
2
2
10P_0402_50V8K
10P_0402_50V8K
1
C310 1000P_0402_50V7K
2
JP23
1 2 3 4
SUYIN_2569A-04G3T
+3VALW
14
U48D
P
9
O8I
G
SN74LVC14APWLE_TSSOP14
7
+3VALW
14
U23C
9
P
A
O
10
B
G
SN74LVC32APWLE_TSSOP14
7
+3VALW
14
U23D
12
P
A
O
13
B
G
SN74LVC32APWLE_TSSOP14
7
10
I9O
SN74LVC125APWLE_TSSOP14@
13
I12O
SN74LVC125APWLE_TSSOP14@
OE#
OE#
8
11
U50C
8
U50D
11
H12
H13
H_S315D126
FD2
@
@
FD5
@
1
1
CF13
CF8
1
1
@
@
CF14
CF12
1
1
@
@
FD4
@
1
CF21
1
1
@
@
CF9
1
1
@
@
@
CF15
CF19
@
@
1
1
CF4
CF18
1
1
@
@
CF6
CF17
1
1
@
@
FD1
FD3
CF11
FD6
1
@
@
1
CF5
1
CF10
1
@
CF22
1
@
@
CF2
1
@
@
CF1
CF20
1
1
@
CF3
CF16
1
1
@
CF7
1
H_S315D126
@
1
H4
H_O126X157D126X157N
@
1
H16
H_C394D122
@
1
@
H17
H_C394D122
@
1
1
H_S315D126
@
H_C126D126N
@
H_C394D122
@
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
H21
H11
H_S315D126
@
1
H9
1
H18
H_C394D122
@
1
H_S315D126
@
1
H22
H_C126D126N
@
1
H19
1
H20
H24
H_S315D126
@
1
1
H10
H_O157X126D157X126N
@
1
H15
H_O79X126D40X87
@
1
Deciphered Date
H23
H_S315D126
@
1
H3
H_T256D161
@
1
H14
H_O79X126D40X87
@
1
H_S315D126
@
H_T256D161
@
@
2006/03/012005/03/01
H25
1
H7
1
H6
H_S276D118
1
H5
H_S315D161
H_S315D161
@
@
1
H26
H_C315D157
H_C315D157
@
@
1
H1
H_S276D118
@
1
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
星期四 三月
H2
H8
H_S315D161
@
1
1
H27
@
1
H28
H_C315D161
1
H29
H_C315D161
@
1
BIOS/WL-SW/Screw Hole/USB EAL30 LA-2691
of
41 52, 03, 2005
1.0
Page 42
A
B
C
D
E
+3VALW to +3V Transfer
+3VALW +3V
8 7 6
C376
5
10U_0805_10V4Z
U42
S
D
S
D
S
D
G
D
SI4800DY_SO8
1
C356
0.01U_0402_16V7K
2
1 2 3 4
1
C354
2
0.1U_0402_16V4Z
12
1
2
C378
R211 470_0402_5%
13
D
SYSON#
2
G
Q21
S
10U_0805_10V4Z
2N7002_SOT23
100K_0402_5%
SUSP
SUSON38
SYSON#
+12VALW
2
G
12
R210 100K_0402_5%
13
D
Q26
2N7002_SOT23
S
1
2
SUSON
1 1
+3VALW to +3VS Transfer
+3VALW
8 7 6 5
C379 10U_0805_10V4Z
RUNON
U39
D D D D
SI4800DY_SO8
1
C358
0.1U_0402_16V4Z
2
100K_0402_5%
SUSP
+12VALW
R213
2
G
12
13
D
Q11 2N7002_SOT23
S
1
2
2 2
S S S G
1 2 3 4
+3VS
1
C357
10U_0805_10V4Z
2
0.1U_0402_16V4Z
C380
12
R214 470_0402_5%
13
D
S
SUSP
2
G
Q28 2N7002_SOT23
10U_0805_10V4Z
1
2
+5VALW to +5VS Transfer
+5VALW
+12VALW
R208
2
G
12
13
D
Q25 2N7002_SOT23
S
1
2
5VS_ON
8 7 6 5
C384 10U_0805_10V4Z
U14
S
D
S
D
S
D
G
D
SI4800DY_SO8
1
C355
0.01U_0402_16V7K
2
1 2 3 4
0.1U_0402_16V4Z
+1.5VALW to +1.5VS Transfer
+1.5VALW +1.5VS
U3
S
D
S
D
S
D
G
D
SI4800DY_SO8
1 2 3 4
C10
1
2
10U_0805_10V4Z
8 7 6
C11
5
1
C12 10U_0805_10V4Z
2
1
2
+5VS
1
C353
2
22U_1206_16V4Z_V1
RUNON
1
C377
10U_0805_10V4Z
2
2N7002_SOT23
1
C17
2
0.1U_0402_16V4Z
12
R209 470_0402_5%
13
D
Q20
1
C16
2
SUSP
2
G
S
SYSON#41
SYSON37,38,39,49
12
R216 470_0402_5%@
13
D
SUSP
Q22
2
G
2N7002_SOT23@
S
SUSP#27,33,39,40,47,49
SYSON
SUSP48
SYSON#
SUSP
2
G
2
G
+5VALW
+5VALW
12
R212 100K_0402_5%
13
D
Q27 2N7002_SOT23
S
12
R215 100K_0402_5%
13
D
Q40 2N7002_SOT23
S
3 3
+2.5V to +2.5VS Transfer
+2.5V +2.5VS
U49
S
D
S
D
S
D
G
D
SI4800DY_SO8
RUNON
1 2 3 4
0.1U_0402_16V4Z
1
C359
2
1
C382
10U_0805_10V4Z
2
12
R217 470_0402_5%@
13
D
SUSP
2
G
Q23
2N7002_SOT23@
S
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Deciphered Date
2006/03/012005/03/01
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
DC/DC Interface
星期四 三月
EAL30 LA-2691
05
E
42
1.0
52, 03, 20
of
8 7 6
1
5
C381
2
10U_0805_10V4Z
4 4
A
Page 43
A
PJP1
1
6
G
5
G
4
G
2
3
1 1
2 2
3 3
G
SINGA_2DC-G213-B20
51_ON#38
PR20
+CHGRTC
1 2
200_0603_5%
+3VALWP +3VALW
(5A,200mils ,Via NO.= 10)
+5VALWP +5VALW
(5A,200mils ,Via NO.= 10)
+12VALWP +12VALW
(120mA,40mils ,Via NO.= 2)
+2.5VP +2.5V
DC_IN_S1 DC_IN_S2
1
2
BATT+
CHGRTCP
PR21
1 2
200_0603_5%
PJ21
2
JUMP_43X118@ PJ1
2
JUMP_43X118@
PJ3
2
JUMP_43X118@
PJ5
2
@
JUMP_43X39
PJ7
2
JUMP_43X118@
PF1
7A_24VDC_429007
PD3
12
1N4148_SOD80
1 2
PR11 200_0603_5%
100K_0402_5%
PR14 22K_0402_5%
RTCVREF
PR13
1 2
12
S-812C33AUA-C2N-T2_SOT89
3.3V
12
PC10 10U_0805_10V4Z
112
112
112
112
112
21
3
12
OUT
GND
12
PC1 1000P_0402_50V7K
N1
PC7
0.22U_1206_25V7M
PU2
2
IN
1
12
TP0610K_SOT23
2
12
PR16 200_0603_5%
12
PC9
1U_0805_25V4Z
+1.8VSP +1.8VS
+1.5VALWP +1.5VALW
(8A,320mils ,Via NO.= 16)
PJ11
2
112
4 4
(3.5A,140mils ,Via NO.= 7)
JUMP_43X118 @
+1.05VS+1.05VSP
+VGA_COREP +VGA_CORE
PL1
1 2
FBM-L18-453215-900LMA90T_1812
PC2
100P_0402_50V8J
PQ1
N2
(1A,40mils ,Via NO.= 2)
(3.5A,140mils ,Via NO.= 7)
(2A,80mils ,Via NO.= 4)
(2A,80mils ,Via NO.= 4)
VIN
1N4148_SOD80
1 2 12
13
12
PD2
PR9 47_1206_5%
PC8
0.1U_0603_25V7K
PD5 RLZ16B_LL34
2 1
PJ2
2
112
JUMP_43X118@
PJ4
2
112
JUMP_43X118@
PJ6
2
JUMP_43X118@
PJ8
2
JUMP_43X118@
PJ9
2
JUMP_43X118@ PJ10
2
JUMP_43X118@
12
VS
112
112
112
112
(11A,440mils ,Via NO.= 22)
A
B
PC3 1000P_0402_50V7K
+1.25VS+1.25VSP
+1.2VS+1.2VSP
B
VIN
12
PC4 100P_0402_50V8J
MAINPWON24,44,46
ACON45
C
PR18
8
P
G
4
PC13
+
-
PD1
5 6
VS
12
12
12
2.2M_0402_5%
12
PC5
1000P_0402_50V7K
12
2 3
VIN
12
PR3
84.5K_0402_1%
12
PR6 20K_0402_1%
VIN
VL
PD6
1
RB715F_SOT323
1 2
PR5 22K_0402_1%
12
PC6
0.1U_0402_16V7K
PD4
12
1N4148_SOD80
1 2
100K_0402_5%
PR17
1000P_0402_50V7K
1 2
PR1 1M_0402_1%
VS
8
PU1A
3
P
+
O
2
-
G
LM393M_SO8
4
PR8
12
10K_0402_5%
1 2
PR10 1K_1206_5%
N3
1 2
PR12 1K_1206_5%
1 2
PR15 1K_1206_5%
PC12
1
RTCVREF
3.3V
PU1B
7
O
LM393M_SO8
12
1000P_0402_50V7K
RLZ4.3B_LL34
Precharge detector
15.97V/14.84V FOR ADAPTOR
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Compal Secret Data
Deciphered Date
C
PR2
5.6K_0402_5%
PR22
12
34K_0402_1%
PR24
66.5K_0402_1%
2006/03/012005/03/01
PR4 1K_0402_5%
12
PR7 10K_0402_5%
12
VL
1 2
PACIN
ACIN 25,38,39
PACIN 45,46
Vin Detector
High 18.384 17.901 17.430 Low 17.728 17.257 16.976
B+
12
PR19 499K_0402_1%
12
12
13
D
S
PR23
499K_0402_1% PR25 191K_0402_1%
PQ2
2
PR26 47K_0402_5%
2N7002_SOT23
G
13
PQ3 DTC115EUA_SC70
2
Title
Size Document Number Rev
星期
五三月
Date: Sheet
D
12
PC11 1000P_0402_50V7K
PACIN
12
+5VALWP
Compal Electronics, Inc.
DCIN & DETECTOR
EAL30 LA-2691
, 04, 2005
D
of
43 52
1.0
Page 44
A
B
C
D
PH1 under CPU botten side :
CPU thermal protection at 84 degree C Recovery at 45 degree C
VL VS
BATT+
PC17
12
12
PH1
12
PR35
3.32K_0402_1%
1000P_0402_50V7K
PR32
1 2
16.9K_0402_1%
TM_REF1
12
PC18
12
PC14
0.1U_0603_25V7K
3
+
2
-
PR37
100K_0402_1%
12
PR39 100K_0402_1%
1 2
8
P
G
4
+3VALWP
VMB
1 2
12
PC15 1000P_0402_50V7K
LI/NIMH# 39
PL2 FBM-L18-453215-900LMA90T_1812
12
BATT_TEMP 39
EC_SMD_1 39,40 EC_SMC_1 39,40
PC16
0.01U_0402_25V7Z
0.22U_0805_16V7K_V2
10KB_0603_1%_TH11-3H103FT
PH2 near main Battery CONN :
BAT. thermal protection at 79 degree C
1 1
8 9
SUYIN_200275MR007G170ZR
2 2
GND GND
BATT+
SMD SMC
GND-
PJP2
B/I TS
BATT_S1
1K_0402_5%
PR34
100_0402_5%
1 2
PR38
1K_0402_5%
1K_0402_5%
PR28
1 2
PR31
12
1
ALI/NIMH#
2
ID
AB/I
3
TS_A
4
EC_SMDA
5
EC_SMCA
6 7
PR33
100_0402_5%
1 2
12
PF2
12A_65VDC_451012
21
PR29
1 2
47K_0402_5%
PR36
12
6.49K_0402_1%
+3VALWP
PR30 47K_0402_1% PU3A
1
O
LM393M_SO8
12
VL
VL
PR27 47K_0402_1%
1 2
PD7
12
1SS355_SOD323
MAINPWON 24,43,46
13
PQ4 DTC115EUA_SC70
2
Recovery at 45 degree C
VLVL
12
PH2 10KB_0603_1%_TH11-3H103FT
3 3
12
PC19
0.22U_0805_16V7K_V2
14.7K_0402_1%
1 2
12
PR43
3.48K_0402_1%
PR42
TM_REF1
5
+
6
-
PR41
1 2
47K_0402_1%
8
PU3B
P
G
LM393M_SO8
4
PR40 47K_0402_1%
1 2
7
O
PD8
12
1SS355_SOD323
4 4
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Compal Secret Data
Deciphered Date
C
2006/03/012005/03/01
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
BATTERY CONN / OTP
EAL30 LA-2691
星期
, 04, 2005
五三月
D
of
44 52
1.0
Page 45
A
PC23
1 2 36
PR53
2
G
P2
12
PR45
12
12
13
D
S
PQ7 AO4407_SO8
1 2 3 6
200K_0402_1%
0.1U_0402_16V7K
PC26
IREF39
PQ13 2N7002_SOT23
4
12
8 7
5
ADP_I39
12
PR51 10K_0402_1%
205K_0402_1%
1 2
PR56
100K_0402_1%
12
PR61
PQ6 AO4407_SO8
VIN
1 1
12
PR46 47K_0402_5%
2
13
D
PQ12
2
2N7002_SOT23
G
S
2 2
PACIN43,46
ACON43
8 7
5
47K
2
47K
13
PQ10 DTC115EUA_SC70
ACOFF#
PACIN
4
PQ8
DTA144EUA_SC70
0.1U_0603_25V7K
1 3
PD12
1 2
1SS355_SOD323
1 2
PR57 3K_0402_1%
ACON
150K_0402_1%
IREF=1.31*Icharge
P3
12
PR50
25.5K_0402_1%
PC29
0.1U_0402_16V7K
12
12
0.1U_0402_16V7K
1 2
4700P_0402_25V7K
1 2
1000P_0402_50V7K
PC33
IREF=0.73~3.3V
B
Iadp=0~3.52A
PR44
12
0.02_2512_1%
12
PR49 100K_0402_5%
PR52
PC27
1 2
10K_0402_5%
PC30
PR54
1 2
1K_0402_5%
12
PR59 10K_0402_5%
B+
PU4
1
-INC2
2
OUTC2
3
+INE2
4
-INE2
5
FB2
6
VREF
7
FB1
8
-INE1
9
+INE1
10
OUTC1
11
OUTD
12
-INC1
MB3887_SSOP24
+INC2
GND
VCC(o)
OUT
VCC
-INE3
+INC1
CS
VH
RT
FB3
CTL
PL3
1 2
FBM-L18-453215-900LMA90T_1812
24
23
CS
22
21
20
1 2
19
PC28
0.1U_0603_25V7K
18
17
16
15
14
13
1 2
PR55 68K_0402_5%
PR60
1 2
47K_0402_5%
ACON
0.1U_0603_25V7K
1500P_0402_50V7K
12
PC20
4.7U_1206_25V6K
PC24
0.022U_0402_16V7K
1 2
PC25
1 2
0.1U_0603_25V7K
1 2
PC31
PC32
1 2
C
PQ5
AO4407_SO8
1 2 3 6
B++
12
PC21
4.7U_1206_25V6K
12
PC22
4.7U_1206_25V6K
36
241
N18
578
LXCHRG
1 2
16UH_D104C-919AS-160M_3.7A_20%
12
PD13 EC31QS04
PQ9 AO4407_SO8
PL4
PR48
10K_0402_5%
ACOFF#
1 2 13
DTC115EUA_SC70
CC=0.5~2.7A CV=16.8V(12 CELLS LI-ION)
PR58
1 2
0.02_2512_1%
PR47
1 2
47K_0402_5%
2
PQ11
4.7U_1206_25V6K
4
4.7U_1206_25V6K
12
PC34
PC35
8 7
5
VIN
ACOFF 39
12
4.7U_1206_25V6K
D
BATT+
12
PC36
+3VALWP
12
PR64 47K_0402_5%
2
13
PQ15 DTC115EUA_SC70
3 3
FSTCHG39
2
OVP voltage : LI
4S2P : 17.4V--> BATT_OVP= 1.935V
(BAT_OVP=0.1111 *VMB)
BATT_OVP39
4 4
CS
13
PQ14 DTC115EUA_SC70
12
PR68
2.2K_0402_5%
LM358A_SO8
PU5A
1
+12VALWP
8
0
4
P
G
+
-
3 2
105K_0402_1%
PR69
VMB
12
12
12
PR66 340K_0402_1%
PR67 499K_0402_1%
12
PR62
95.3K_0603_0.1% PR65
95.3K_0603_0.1%
PC37
0.01U_0402_25V7Z
12
12
65W 75WUMA M22/M24
Iadp=2.87A PR50=33.2K
4.2V
Iadp=3.52A PR50=25.5K
PR63
12
143K_0603_0.1%
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Compal Secret Data
Deciphered Date
C
2006/03/012005/03/01
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
CHARGER
EAL30 LA-2691
星期
, 04, 2005
五三月
D
of
45 52
1.0
Page 46
5
4
3
2
1
N4
PJ17
D D
C C
B B
2
B+
JUMP_43X118@
B+++
112
12
12
1
+
2
PC42
4.7U_1206_25V6K
PL6
PD17
SKUL30-02AT_SMA
2 1
PC41
4.7U_1206_25V6K
10UH_D104C-919AS-100M_4.5A_20%
+3VALWP
470U_6.3V_M
PC53
12
PC49
12
47P_0402_50V8J
1M_0402_1%
PR75
1 2
3.32K_0402_1% PR80
1.87K_0402_1%
1 2
1 2
5
D8D7D6D
S1S2S3G
4
5
D8D7D6D
S1S2S3G
4
PR72
PR73
3.74K_0402_1%
PR76
0_0402_5%
12
PC54 100P_0402_50V8J
PR83 10K_0402_1%
1 2
PQ16 SI4800DY-T1_SO8
PQ18 SI4810DY_SO8
PDL3
12
12
PC51
0.47U_0603_16V7K
1 2
12
PACIN43,45
1 2
VS
47K_0402_5%
0.047U_0402_16V4Z@
PC40
0.1U_0603_25V7K
PLX3
PR77
1.24K_0402_1%
1 2
PR78
10K_0402_5%
PR81
PC59
12
BST31
CSH3 CSL3
12
PDH3
12
PC47
0.1U_0603_25V7K
PU6
25
BST3
27
DH3
26
LX3
24
DL3
1
CSH3
2
CSL3
3
FB3
10
SKIP#
23
SHDN#
7
TIME/ON5
28
RUN/ON3
12
PC56 1000P_0402_50V7K
PR85 220K_0402_5%
12
PC60
0.47U_0603_16V7K
VS
PD16
1SS355_SOD323
1 2
22
V+
12
2
3
1
VL
12
21
12OUT
VL
VDD
BST5
DH5 LX5 DL5
PGND
CSH5 CSL5
FB5
SEQ
REF
SYNC
RST#
GND
MAX1902EAI_SSOP28
8
VL
MAINPWON 24,43,44
PD15 DAP202U_SOT323
PC46
4.7U_0805_6.3V6K
4 5 18 16 17 19 20 14 13 12 15 9 6 11
BST51
+12VALWP
12
PC48
4.7U_1206_25V6K
12
PC55
4.7U_0805_6.3V6K
+2.5VREF
PC43
1 2
0.1U_0603_25V7K
PDH5
PLX5
PC52
0.47U_0603_16V7K
10.2K_0402_1%
12
PC44
4.7U_1206_25V6K
12
12
12
PR82
12
PR84
10K_0402_1%
B+++
12
PC45
4.7U_1206_25V6K
PDL5
PR79
1.82K_0402_1%
12
PC57 100P_0402_50V8J
SI4810DY_SO8
PC39 470P_0805_100V7K
1 2
PR70 22_1206_5%
5
PQ17
SI4800DY-T1_SO8
4
5
PQ19
4
12
D8D7D6D
S1S2S3G
1.27K_0402_1%
D8D7D6D
S1S2S3G
CSH5
FLYBACKSNB
PR71
12
PC50 47P_0402_50V8J
12
PR74 2M_0402_1%
PC38
1 2
12
PD14
4.7U_1206_25V6K
EC11FS2_SOD106
PT1
10uH_SDT-1205P-100-118_5A_20%
1 4
3 2
12
1
470U_6.3V_M
PC58
+
2
PD18
SKUL30-02AT_SMA
2 1
+5VALWP
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Deciphered Date
2006/03/012005/03/01
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
3V / 5V / 12V
EAL30 LA-2691
星期
, 04, 2005
五三月
1
of
46 52
1.0
Page 47
A
B
C
D
PJ18
2
112
JUMP_43X118@
4.7U_1206_25V6K1@
PL9
1.8UH_D104C-919AS-1R8N_9.5A_20%1@
0.01U_0402_25V7Z1@
PR145
0_0402_5% 1@
PR147
0_0402_5%@
12
1 2
1 2
0_1206_5%1@
PU7
SOFT1
BOOT1
UGATE1 PHASE1
ISEN1 LGATE1
PGND1
VOUT1 VSEN1 EN1 PG1
OCSET1
PR86
12
PC64
0.1U_0603_25V7K1@
12
+5VALWP
PR87
2.2_0603_5%1@
1 2
14
28
13
VCC
DDR
SOFT2
BOOT2
UGATE2 PHASE2
ISEN2
LGATE2
PGND2
VOUT2 VSEN2
EN2
PG2/REF
OCSET2
ISL6227CA-T_SSOP28 1@
VIN
GND
1
12
PC65
2.2U_0805_10V6K1@
PC67
12
17
0.01U_0402_25V7Z1@
1 2
23
PR89
PC69
0_0603_5%1@
24 25
PR92 2K_0402_1%1@
1 2
22 27
26
20 19 21 16
18
12
PR98
71.5K_0402_1% 1@
0.1U_0402_16V7K1@
1 2
12
PC75
12
PR95
PC62
12
4.7U_1206_25V6K1@
5
4
5
PQ23
SI4810DY_SO81@
4
N12
10K_0402_1%1@
0.1U_0402_16V7K@
D8D7D6D
PQ21
SI4800DY-T1_SO81@
S1S2S3G
VGA_PHASE
D8D7D6D
S1S2S3G
12
PC63
1 2
PC61
12
4.7U_1206_25V6K1@
1 1
5
+1.8V
+1.8VSP
1
+
PC70
470U_6.3V_M1@
2
2 2
PR90
10K_0402_1%1@
1.8UH_D104C-919AS-1R8N_9.5A_20%1@
0.01U_0402_25V7Z1@
12
12
PC71
PR144
1 2
12
PR97
10K_0402_1%1@
PR146
1 2
PL8
1 2
0_0402_5% 1@
0_0402_5%@
SI4800DY-T1_SO81@
SI4810DY_SO81@
PQ20
1.8V_PHASE
PQ22
SUSP#2 7 ,3 3,39,40,42,49
D8D7D6D
S1S2S3G
4
D8D7D6D
S1S2S3G
5
4
PC68
0.1U_0402_16V7K1@
SUSP# SUSP#
1 2
PR94
0_0402_5%
1@
0.1U_0402_16V7K@
PC141
12
4.7U_1206_25V6K1@
12
1
3
PC66
0.01U_0402_25V7Z1@ PR88
1 2
0_0603_5%1@
PR91 2K_0402_1%
PC142
4.7U_0805_6.3V6K1@
12
12
6
5 4
7 2
3
9
10
8
15 11
12
PR99 100K_0402_1% 1@
PD19
DAP202U_SOT3231@
2
12
N9 N11
1 2
1@
N10
12
PC74
PC73
B+
+1.2V/+1.0V
+VGA_COREP
12
PR93
2.21K_0402_1%1@
1
+
PC72
470U_6.3V_M1@
2
PR105
3 3
PR105=10K PR96=20K
4 4
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
with selector without selector
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
fix 1.2V unpop PR105 PR96=6.49K
POWER_SEL15
Low:1.2V High:1.0V
PR102
100K_0402_5%@
Compal Secret Data
Deciphered Date
C
PR143
100K_0402_5%@
VL
12
PC83
1 2
0.01U_0402_16V7K@
2006/03/012005/03/01
10K_0402_1%@
1 2
2N7002_SOT23@
12
13
D
PQ43
2
G
S
13
D
PQ28
2
G
S
2N7002_SOT23@
Title
Size Document Number Rev
星期
Date: Sheet
12
PR96
6.49K_0402_1%
1@
12
0.1U_0402_16V7K@
PC144
Compal Electronics, Inc.
1.8V / VGA_CORE
EAL30 LA-2691
, 04, 2005
五三月
D
of
47 52
1.0
Page 48
5
4
3
2
1
PR100
1 2
10_0603_5%
12
PC76
5
VCC
BOOT
UGATE
PHASE
LGATE
PR104
9.53K_0402_1%
1 2
PC84
1 2
0.1U_0402_16V7K
6 5
NC
7
NC
8
NC
9
TP
1U_0603_6.3V6M
0.1U_0402_16V7K
1
2
1.5V_PHASE
8
4
PC103
12
12
PC79
12
470P_0402_50V8J
PU8
7
OCSET
6
FB
3
GND
APW7057KC-TR_SOP8
PU12
VIN1VCNTL
2
GND
3
VREF
4
VOUT
APL5331KAC-TR_SO8
+1.25VSP
PC104 10U_1206_6.3V7K
PR101
6.81K_0402_1%
PR106
PR117
PR119
1K_0402_1%
1 2
1 2
12
12
0.1U_0402_16V7K
D D
10.7K_0402_1%
C C
+2.5V
B B
1
PJ16
1
JUMP_43X118@
2
2
12
PC101
10U_1206_6.3V7K
PR118
0_0402_5%
SUSP
SUSP42
A A
1 2
0.1U_0402_16V7K@
PC105
1K_0402_1%
13
D
PQ34 2N7002_SOT23
2
G
S
12
PC80
N20
N21
+3VALWP
12
PC102 1U_0603_6.3V6M
PD20
1N4148_SOD80
1 2
12
PC78
12
4.7U_1206_25V6K
5
D8D7D6D
PQ24
SI4800DY-T1_SO8
S1S2S3G
4
5
4
SUSP
PL10
1.8UH_D104C-919AS-1R8N_9.5A_20%
D8D7D6D
PQ26
SI4810DY_SO8
S1S2S3G
10U_1206_6.3V7K1@
PR115
0_0402_5%1@
1 2
PC100
0.1U_0402_16V7K@
12
PC96
PJ12
2
112
JUMP_43X118@
1
+
PC77
470U_6.3V_M
2
1
+
PC81
470U_6.3V_M
2
+2.5V
1
PJ15
1
JUMP_43X118@
2
2
12
PR114
1.07K_0402_1%1@
PQ33
13
D
2N7002_SOT231@
2
G
12
PR116
1K_0402_1% 1@
S
+1.5VALWP
12
12
PC98
0.1U_0402_16V7K1@
+5VALWP
12
12
PU11
VIN1VCNTL
2
GND
3
VREF
4
VOUT
APL5331KAC-TR_SO81@
+1.2VSP
PC99
10U_1206_6.3V7K1@
6 5
NC
7
NC
8
NC
9
TP
+3VALWP
12
PC97
1U_0603_6.3V6M1@
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Deciphered Date
2006/03/012005/03/01
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
1.5V / 1.25V / 1.2V
EAL30 LA-2691
星期
, 04, 2005
五三月
1
of
48 52
1.0
Page 49
5
4
3
2
1
PJ19
2
112
JUMP_43X118@
PL17
1.8UH_D104C-919AS-1R8N_9.5A_20%
PR156
PR163
0.01U_0402_25V7Z
12
1 2
1 2
0_0402_5%
0_0402_5%@
PR158
0_0402_5%
12
PC126
4.7U_1206_25V6K
PD26
1
DAP202U_SOT323
2
3
0.01U_0402_25V7Z PR150
1 2
12
0_0603_5%
PR154
1 2
2K_0402_1%
12
PC139
PC131
12
PC143
12
4.7U_0805_6.3V6K
PC129
0.1U_0603_25V7K
12
12
6
5 4
7 2
3
9
10
8
15 11
PR165 100K_0402_1%
12
PC125
4.7U_1206_25V6K
D D
5
+1.05V
+1.05VSP
1
+
PC135
220U_6.3VM_R15
C C
2
PR152
1.65K_0402_1%
1.8UH_D104C-919AS-1R8N_9.5A_20%
0.01U_0402_25V7Z
12
12
PC136
1 2
12
PR161 10K_0402_1%
1 2
PL16
1 2
PR153 0_0402_5%
PR162
0_0402_5%@
SI4800DY-T1_SO8
SI4810DY_SO8
D8D7D6D
PQ44
1.05V_PHASE
PQ46
S1S2S3G
4
N13
5
D8D7D6D
S1S2S3G
4
SUSP#2 7 ,3 3,39,40,42,47 SYSON 37,38,39,42
SUSP#
PC133
0.1U_0402_16V7K
N14
1 2
0.1U_0402_16V7K@
0_1206_5%
PU14
SOFT1
BOOT1
UGATE1 PHASE1
ISEN1 LGATE1
PGND1
VOUT1 VSEN1 EN1 PG1
OCSET1
PR148
12
12
+5VALWP
PC132
17
0.01U_0402_25V7Z
1 2
23
PR151
0_0603_5%
24 25
PR155 2K_0402_1%
1 2
22 27
26
20 19 21 16
18
12
PR164
12
PC130
2.2U_0805_10V6K
12
PC134
0.1U_0402_16V7K
12
1 2
12
PC140
PR149
14
VIN
GND
1
2.2_0603_5%
1 2
28
SOFT2
VCC
BOOT2
UGATE2 PHASE2
ISEN2
LGATE2
PGND2
VOUT2 VSEN2
EN2
PG2/REF
OCSET2
DDR
ISL6227CA-T_SSOP28
13
100K_0402_1%
4.7U_1206_25V6K
PR159 10K_0402_1%
0.1U_0402_16V7K@
N15
N16
PC127
12
5
D8D7D6D
SI4800DY-T1_SO8
S1S2S3G
4
5
D8D7D6D
S1S2S3G
4
PQ45
2.5V_PHASE
PQ47
SI4810DY_SO8
12
PC128
4.7U_1206_25V6K
1 2
PC138
PR157
17.8K_0402_1%
B+
12
12
PR160 10K_0402_1%
+2.5V
PC137
220U_6.3VM_R15
+2.5VP
1
+
2
B B
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Deciphered Date
2006/03/012005/03/01
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
2.5V / 1.05V
EAL30 LA-2691
星期
, 04, 2005
五三月
1
of
49 52
1.0
Page 50
PM_STP_CPU#
4,25
PR127 0_0402_5%
1 2
VR_ON 39
FB
PR133 100K_0402_1%
PM_DPRSLPVR25
PR132
78.7K_0402_1%
1 2
1 2
2
PSI#5
PQ37
G
1 2
PR130 200K_0402_1%
13
D
PR135
10.7K_0402_1%
RHU002N06_SOT323
S
PR137
0_0402_5%
1 2
CPU_VID05 CPU_VID15 CPU_VID25 CPU_VID35 CPU_VID45 CPU_VID55
VGATE6,14,25
12
1 2
+5VS
PR140
100K_0402_1%
2
B
PR128 30.1K_0402_1%
PC115
1 2
270P_0402_50V7K
1 2
PC117 0.22U_0603_16V7K
PC119
13
D
PQ38
2
100P_0402_50V8J
G
S
1 2
PR138
20K_0402_1%
1 2
1
C
E
3
2
PQ42
HMBT2222A_SOT23
1 2
12
RHU002N06_SOT323
1 2
PC120
PR139
10K_0402_1%
1 2 13
D
PQ41
RHU002N06_SOT323
G
S
12
PR120 10_0402_5%
PC110 1U_0603_6.3V6M
VCC
10 24 23 22 21 20 19 25
VCC
12
18 11
27P_0402_50V8J
+5VS
PU13
VCC D0 D1 D2 D3 D4 D5 VROK
4
S0
5
S1
6
SHDN#
1
TIME CCV
2
TON
8
REF
9
ILIM
7
OFS
3
SUS SKIP GND
MAX1532AETL_TQFN40
PC109
2.2U_0603_6.3V6K
VDD
V+
BSTM
DHM
LXM DLM
PGND
CMP CMN
OAIN+
OAIN-
FB
CCI
BSTS
DHS
LXS DLS CSP CSN
GNDS
2
1
30 36 26 28 27 29 31 37 38 17 16
FB
15 14
PC116 470P_0402_50V8J
35 33 34 32 40 39 13
EP10QY03
2 1
12
PC111
PR121
2.2_0603_5%
N5
1 2
PD22
CPU_B+ B+
PL12
1 2
FBM-L18-453215-900LMA90T_1812
1 2
0.001_2512_5%
12
PR124 499_0402_1%
2.7K_0402_1%
1 2
PR122
PR131
PR134
0_0402_5%
12
2.7K_0402_1%
PR125 499_0402_1%
PR126
+CPU_CORE
CPU VCC SENSE
1 2
1 2
@
PC113
1000P_0402_50V7K
12
12
PC107
PC108
4.7U_1206_25V6K
EC31QS04
PC121
4.7U_1206_25V6K
PD25
EC31QS04
@
CPU_B+
12
PC122
4.7U_1206_25V6K
CPUPHASE2
4.7U_1206_25V6K
PR123 909_0402_1%
578
PQ35 AO4408_SO8
12
PC112
0.01U_0402_25V7Z
12
PR136
PC123
1 2
12
0.22U_0603_16V7K
2.2_0603_5%
0.22U_0603_16V7K
N6
PQ36
AO4410_SO8
21
PD24
EP10QY03
PQ39
AO4408_SO8
N7
PQ40
AO4410_SO8
N8
3 6
241
578
3 6
241
PR129 909_0402_1%
1 2
+5VS
578
3 6
241
578
3 6
241
CPUPHASE1
12
PD23
@
12
12
1
+
PC106 220U_25V_M
2
PL13
1 2
0.56UH_ETQP4LR56WFC_21A_20%
12
PC114
1 2
0.47U_0603_16V7K
1 2
1 2
PC118
2200P_0402_50V7K
PL14
1 2
0.56UH_ETQP4LR56WFC_21A_20%
12
PR141 909_0402_1%
1 2
PC124
0.47U_0603_16V7K
909_0402_1%
1 2
PR142
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
Compal Secret Data
Deciphered Date
2006/03/012005/03/01
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
CPU_CORE
EAL30 LA-2691
星期
, 04, 2005
五三月
of
50 52
1.0
Page 51
5
4
3
2
1
REV 0.2
Location
P.37 Delete C267 For sound volume change slow issue 12/06
P.32 ADD C854 To solve PCI 4510 1394 issue12/06
D D
P.21 Change L4,L5 to FBM-L11-201209-121LMT To solve EMI issue12/06
P.22 Change C398,C397 from 270P to 100P
P.22 Change R320,R321,R7,R8,R9 from 150_0402_5%
P.07 Change R124,R127,R119,R531,R532
P.15 Change R273,R274,R267,R270,R271
C401,C402 from 330P to 100P
to 150_0402_1%
from 150_0402_5% to 150_0402_1%
from 150_0402_5% to 150_0402_1%
P.32 Change 5in1 SMWP design ,Add R836,R837 follow EAT10 design12/26
DescriptionDate Page
for ESD protectionAdd ESD diode D3412/06 P.38
For customer request 12/26
For customer request 12/26
For customer request 12/26
For customer request 12/26
REV 0.3
DescriptionDate Page Location
Add rating current Change R160 size to 0805 0 ohm2/06 P.09
C C
2/06 P.24
2/06 P.32
2/06 P.27
For TV-out wave issue Add C859,C864 change R841 to 2.2 ohm
Change 5in1 card reader discharge control from card detect to card power enable .Add R838,R839
Reserve for chip issue Reserve R840,C862,X5
REV 1.0
DescriptionDate Page Location
Reserve for CyberTan issue ADD R842 2/14 P.34
2/26 P.36
2/26 P.24
2/26 P.24
B B
A A
Add for solve modem card noiseAdd C866
Add for solve 3Dmark low performace issueAdd C865
Reserve for New Wireless Lan CardAdd R842
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
HW PIR
, 04, 2005
五三月
EAL30 LA-2691
星期
of
51 52
1.0
5
4
3
2
1
Page 52
5
4
3
2
1
DescriptionPage Location
Reason
45 PR50 Change from 33.2K_0402_1% to 25.5K_0402_1% For ATI M22/M24 sku, update to 75W 47 PR9 6 Change from 20 K _ 0402_1% to 6.49K_0402_1%
Fix POWER_SEL at 1.2V
Unpop PR105,PQ28,PR143,PQ43,PR102,PC83,PC144
D D
47 PR9 8 Change from 90 . 9K_0402_1% to 71.5K_0402_1% E nlarge VGA_CORE OCP point
43 PD3 Change from RB751 to 1N4148 For common design 43 PR9 Change from 33_1206_5% to 47_1206_5% For common design 48 Delete PC96,PR114,PU11,PC97,PR115,PQ33,PR116,
For UMA SKU, delete 1.2VS
PC98,PC99
48 PR104
PR106
C C
Change PR104 from 9.09K_0402_1% to 9.53K_0402_1% Change PR106 from 10.5K_0402_1% to 10.7K_0402_1%
For HW require ment to raise 1.5V voltage
B B
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Deciphered Date
2006/03/012005/03/01
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
POWER PIR
EAL30 LA-2691
星期
, 04, 2005
五三月
1
of
52 52
1.0
Page 53
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