Compal LA-2601 Dunlin, TravelMate 4150, TravelMate 4650 Schematic

A

B

C

D

E

Page Index

===============

P01-Cover Page
P02-Block Diagram
P03-Notes List
P04-Dothan(1/2)

1 1

Dunlin LA-2601 Schematics Document

2 2

Intel Dothan / Alviso GM(PM) / DDR-1(DDR-2) / ICH6-M

(NV43/44M)

2004 / 11 / 15 (For A-TEST)

Rev:0.1

3 3

4 4

P05-Dothan(2/2)
P06-Alviso HOST(1/5)
P07-Alviso DDR(2/5)
P08-Alviso PCI-E(3/5)
P09-Alviso POWER(4/5)
P10-Alviso POWER(5/5)
P11-DDRI-SODIMM0
P12-DDRI-SODIMM1
P13-DDR Decoupling
P14-Clock Generator
P15-CRT Conn.
P16-VGA / LCD Conn.
P17-ICH6(1/4)_HUB,PCI,HOST
P18-ICH6(2/4)_CPU,AC97,IDE,LPC
P19-ICH6(3/4)_USB,PM,LAN,GPIO
P20-ICH6(4/4)_POWER&GND
P21-HDD/CDROM
P22-DVI / TV_Out Conn
P23-PCMCIA ENE CB1410 & CB714
P24-PCMCIA SOCKET
P25-TI 1394A TSB43AB21A
P26-LAN BCM5788M
P27-LAN Magnetic & RJ45/RJ11
P28-Mimi-PCI Slot
P29-AC97 Codec_ALC250D
P30-Audio Line in Switch
P31-AMP & Audio Jack
P32-Super IO SMC217
P33-ENE-KB910
P34-MDC / BT / KBD / TP Conn.
P35-BIOS & I/O Port & SATA HDD
P36-RJ11/LID Switch / Fan / FIR
P37-USB2.0 Conn
P38-Docking Conn.
P39-PWR_OK / RTC
P40-DC INTERFACE
P41-Screws
P42-PWR-DCIN / Precharge
P43-PWR-Charger
P44-PWR-Battery Select
P45-PWR-3V/5V/12V
P46-PWR-GMCH_CORE/1.8V/0.9V
P47-PWR-1.5V/2.5V
P48-PWR-CPU_CORE
P49-PWR-OTP
P50-PWR-PIR

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Cover Sheet

EDL00 LA-2601

151Tuesday, November 16, 2004

E

0.1

of

A

B

C

D

E

Compal confidential

File Name : LA-2601

CRT/TV-OUT

1 1

page 15

H_A#(3..31)

Intel Dothan CPU

page 4,5

FSB

400 / 533 Mhz

H_D#(0..63)

Thermal Se nsor
ADM1032ARM

page 4

Clock Generator
ICS954226AGT

page 14

MV43 / MV44
VGA Board

page 16

Intel Alviso GM(PM)

DDR-2

DDR-SO-DIMM X2

BANK 0, 1, 2, 3

page 11,12,13

PCBGA 1257

LCD CONN

page 16

page 6,7,8,9,10

Signal Channel DDR-1
Two Channel DDR-2

DMI

2 2

Intel ICH6-M

PCI-E BUS

PCI BUS

Mini PCI
socket

page 28

3 3

BROADCOM
BCM57 88M
BCM4401

page 26

RJ45 CONN

page 27

ENE Controller

CB714

5in1 CardReader

Slot 0

page 24

Slot

page 23,24

page 24

1394 Controller
TSB43AB21

page 25

1394
Conn.

page 25

LPC BUS

Power On/Off CKT.

page 39

SMsC LPC47N217

DC/DC Interface CKT.

page 40

Power Circuit DC/DC

4 4

page 42~49

A

RTC CKT.

page 39

Power OK CKT.

page 39

Parellel Port

page 38

B

page 32

Serial Port

DOCKING CONNDOCKING CONN

page 38

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

mBGA-609

page 17,18,19,20

ENE KB910/910L

Touch Pad
CONN.

C

page 34

USB 2.0

USB 2.0

AC-LINK

SATA

PATA

page 33

USB conn x 4

Audio CKT

ALC250-D

PATA HDD
SATA HDD

Int. KBD

page 34

BIOS

page 35

BT Conn

page 29

MODULE
Connector

D

page 37

page 34

conn

page 21

page 21

RJ11 CONN

page 36

AMP & Audio Jack

page 31

Docking CONN.

*RJ-11 / 45(LED*2)
*COMPOSITE Video Out
*TVOUT
*LINE IN / OUT
*PS/2
*Print port
*1394
*USB
*DC JACK

page 39

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Block Diagrams
EDL00 LA-2601

251Monday, November 15, 2004

E

of

0.1

A

Voltage Rails

Power Plane Description

1 1

2 2

VIN
B+
+CPU_CORE
+1.05VS
+DDRVTT 1.25V switched power rail for DDR terminator
+1.5VALW 1.5V always on power rail
+1.5VS
+1.8VS 1.8V switched power rail
+DDRVCC
+2.5VS
+3VALW
+3V
+3VS
+5VALW
+5VS
+5VMO D 5 V sw i tc he d po we r rail for Module Bay
+12VALW 12V always on power rail
+RTC V C C RTC power

Adapter power supply (19V)
AC or batte ry power rail for power circuit.
Core voltage for CPU

1.05V switched power rail

1.5V switched power rail

2.5V power rail for DDR

2.5V switched power rail

3.3V always on power rail

3.3V power rail

3.3V switched power rail
5V always on power rail
5V switched power rail

B

S1 S3 S5

N/A N/A N/A

ON OFF
ON OFF
ON OFF OF F
ON
ON OFF OF F
ON OFF OF F
ON
ON
ON
ON
ON
ON

ON ONON

N/AN/AN/A
OFF
OFF

ON*ON

OFF

ON

OFF

OFF
ON ON*

OFF

ON
OFF

OFF

ON

ON*

OFF

OFFON
OFF OFFON
ONON ON*

C

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

SIGNAL

SLP_S1# SLP_S3#

HIGH HIGH HIGH HIGH

LOW

LOW

D

LOW

S4 (Suspend to Disk)

S5 (Soft OFF)

LOW LOW LOW LOW

Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0
1
2
3
4
5
6
7 NC

100K +/- 5%Ra / Rc

Rb / Rd V min

AD_BID

0

8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

E

SLP_S4# SLP_S5# +VALW +V +VS Clock

0 V

HIGH

LOWLOWLOW

ON

HIGHHIGHHIGH

HIGH

HIGH

ON

ON

ON

ON

Vtyp

AD_BID

0 V 0 V

0.503 V

0.819 V

ON

ON

ON

OFF

OFF

V

AD_BID

0.538 V

0.875 V

ON ON

ON

OFF

OFF

OFF

max

1.185 V 1.264 V

2.200 V

3.300 V

2.341 V

3.300 V

LOW

OFF

OFF

OFF

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

External PCI Devices

Device IDSEL # REQ # / GNT # Interrupts

CardBus

1394
SD

Mini-PCI

LAN

3 3

AD20
AD16 0
AD20
AD18
AD17 3

EC SM Bus1 address

Device

Smart Battery
EEPROM(24C16/02)

(24C04)

Address Address

1010 000X b
1011 000Xb

2

2
1

PIRQA/PIRQB
PIRQE
PIRQA/PIRQB
PIRQG/PIRQH
PIRQF

EC SM Bus2 address

Device

ADM1032
2'nd Battery

1001 110X b0001 011X b
1001 011X b

BOARD ID Table

Board ID

0
1
2
3
4
5
6
7

PCB Revision

0.1

ICH6M SM Bus address

Device

4 4

Clock Generator
( ICS 952623)

DDR DIMM0

DDR DIMM2

A

Address

1101 001Xb

1010 000Xb
1010 010Xb

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Notes

EDL00 LA-2601

351Monday, November 15, 2004

E

0.1

of

5

4

3

2

1

H_D#[0..63]

H_A#[3..31]<6>

D D

H_REQ#[0..4]<6>

C C

H_RS#[0..2]<6>

B B

A A

H_A#[3..31]

H_REQ#[0..4]

H_RS#[0..2]

H_ADSTB#0<6>
H_ADSTB#1<6>

CLK_CPU_BCLK<14>

CLK_CPU_BCLK#<14>

H_ADS#<6>
H_BNR#<6>

H_BPRI#<6>

H_BR0#<6>

H_DEFER#<6>

H_DRDY#<6>

H_HIT#<6>
H_HITM#<6>

H_LOCK#<6>

H_CPURST#<6>

H_TRDY#<6>

H_DBSY#<6>
H_DPSLP#<18>
H_DPRSTP#<18>
H_DPWR#<6>

H_PWRGOOD<18>

H_CPUSLP#<6,18>

H_THERMTRIP#<6,18>

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_IERR#
H_CPURST#

H_RS#0
H_RS#1
H_RS#2

ITP_DBRRESET#

PRO_CHOT#
H_PWRGOOD

H_CPUSLP#
ITP_TCK
ITP_TDI
ITP_TDO
TEST1
TEST2
ITP_TMS
ITP_TRST#

THERMDA
THERMDC

THERMDA & THERMDC Trace / Space = 10 / 10 mil

5

JP7A

P4

A3#

U4

A4#

V3

A5#

R3

A6#

V2

A7#

W1

A8#

T4

A9#

W2

A10#

Y4

A11#

Y1

A12#

U1

A13#

AA3

A14#

Y3

A15#

AA2

A16#

AF4

A17#

AC4

A18#

AC7

A19#

AC3

A20#

AD3

A21#

AE4

A22#

AD2

A23#

AB4

A24#

AC6

ADDR GROUP

A25#

AD5

A26#

AE2

A27#

AD6

A28#

AF3

A29#

AE1

A30#

AF1

A31#

R2

REQ0#

P3

REQ1#

T2

REQ2#

P1

REQ3#

T1

REQ4#

U3

ADSTB0#

AE5

ADSTB1#

A16

ITP_CLK0

A15

ITP_CLK1

B15

BCLK0

B14

BCLK1

N2

ADS#

L1

BNR#

J3

BPRI#

N4

BR0#

L4

DEFER#

H2

DRDY#

K3

HIT#

K4

HITM#

A4

IERR#

J2

LOCK#

B11

RESET#

H1

RS0#

K1

RS1#

L2

RS2#

M3

TRDY#

C8

BPM0#

B8

BPM1#

A9

BPM2#

C9

BPM3#

A7

DBR#

M2

DBSY#

B7

DPSLP#

G1

DPRSTP#

C19

DPWR#

A10

PRDY#

B10

PREQ#

B17

PROCHOT#

E4

PWRGOOD

A6

SLP#

A13

TCK

C12

TDI

A12

TDO

C5

TEST1

F23

TEST2

C11

TMS

B13

TRST#

B18

THERMDA

A18

THERMDC

C17

THERMTRIP#

TYCO_1612365-1_Dothan

4

Dothan

DATA GROUP

HOST CLK

CONTROL GROUP

MISC

THERMAL
DIODE

LEGACY CPU

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#

D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DINV0#
DINV1#
DINV2#
DINV3#

DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#

A20M#
FERR#

IGNNE#

INIT#

LINT0
LINT1

STPCLK#

SMI#

H_D#0

A19

H_D#1

A25

H_D#2

A22

H_D#3

B21

H_D#4

A24

H_D#5

B26

H_D#6

A21

H_D#7

B20

H_D#8

C20

H_D#9

B24

H_D#10

D24

H_D#11

E24

H_D#12

C26

H_D#13

B23

H_D#14

E23

H_D#15

C25

H_D#16

H23

H_D#17

G25

H_D#18

L23

H_D#19

M26

H_D#20

H24

H_D#21

F25

H_D#22

G24

H_D#23

J23

H_D#24

M23

H_D#25

J25

H_D#26

L26

H_D#27

N24

H_D#28

M25

H_D#29

H26

H_D#30

N25

H_D#31

K25

H_D#32

Y26

H_D#33

AA24

H_D#34

T25

H_D#35

U23

H_D#36

V23

H_D#37

R24

H_D#38

R26

H_D#39

R23

H_D#40

AA23

H_D#41

U26

H_D#42

V24

H_D#43

U25

H_D#44

V26

H_D#45

Y23

H_D#46

AA26

H_D#47

Y25

H_D#48

AB25

H_D#49

AC23

H_D#50

AB24

H_D#51

AC20

H_D#52

AC22

H_D#53

AC25

H_D#54

AD23

H_D#55

AE22

H_D#56

AF23

H_D#57

AD24

H_D#58

AF20

H_D#59

AE21

H_D#60

AD21

H_D#61

AF25

H_D#62

AF22

H_D#63

AF26

D25
J26
T24
AD20

C23
K24
W25
AE24
C22
L24
W24
AE25

C2
D3
A3
B5
D1
D4

C6
B4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

H_DINV#0 <6>
H_DINV#1 <6>
H_DINV#2 <6>
H_DINV#3 <6>

H_DSTBN#0 <6>
H_DSTBN#1 <6>
H_DSTBN#2 <6>
H_DSTBN#3 <6>
H_DSTBP#0 <6>
H_DSTBP#1 <6>
H_DSTBP#2 <6>
H_DSTBP#3 <6>

H_A20M# <18>
H_FERR# <18>
H_IGNNE# <18>
H_INIT# <18>
H_INTR <18>
H_NMI <18>

H_STPCLK# <18>
H_SMI# <18>

3

H_D#[0..63] <6>

2200P_0402_50V7K

EC_SMB_CK2<33,44>
EC_SMB_DA2<33,44>

C17

1

2

THERMDA
THERMDC

ITP_TDI
ITP_TDO
H_CPURST#
ITP_TMS
PRO_CHOT#
H_PWRGOOD
H_IERR#

ITP_DBRRESET#

ITP_TRST#

ITP_TCK
TEST1
TEST2

2

+3VS

1

C12

0.1U_0402_16V4Z

2

U3

2
3
8
7

R508 150_0402_5%
R29 54.9_0402_1%@
R28 54.9_0402_1%@
R27 40.2_0402_1%
R31 56_0402_5%
R24 200_0402_5%
R23 56_0402_5%

R26 150_0402_5%

R509 680_0402_5%
R30 27.4_0402_1%
R25 1K_0402_5%@
R46 1K_0402_5%@

VDD1

D+

ALERT#

D-

THERM#

SCLK
SDATA

GND

ADM1032ARM_RM8

12
12
12
12
12
12
12

12

12
12
12
12

Title

Size Document Number Rev

Date: Sheet

12

R20

10K_0402_5%@

1
6
4
5

+1.05VS

+3VS

Compal Electronics, Inc.

Dothan Processor in mFCPGA479

EDL00 LA-2601

451Monday, November 15, 2004

1

0.1

of

5

JP7B

1

2

+1.05VS

C26

VCCSENSE
VSSSENSE

GTL_REF0

COMP0
COMP1
COMP2
COMP3

AE7

VCCSENSE

AF6

VSSSENSE

F26

VCCA0

B1

VCCA1

N1

VCCA2

AC26

VCCA3

P23

VCCQ0

W4

VCCQ1

D10

VCCP

D12

VCCP

D14

VCCP

D16

VCCP

E11

VCCP

E13

VCCP

E15

VCCP

F10

VCCP

F12

VCCP

F14

VCCP

F16

VCCP

K6

VCCP

L5

VCCP

L21

VCCP

M6

VCCP

M22

VCCP

N5

VCCP

N21

VCCP

P6

VCCP

P22

VCCP

R5

VCCP

R21

VCCP

T6

VCCP

T22

VCCP

U21

VCCP

D6

VCC

D8

VCC

D18

VCC

D20

VCC

D22

VCC

E5

VCC

E7

VCC

E9

VCC

E17

VCC

E19

VCC

E21

VCC

F6

VCC

F8

VCC

F18

VCC

E1

PSI#

E2

VID0

F2

VID1

F3

VID2

G3

VID3

G4

VID4

H4

VID5

AD26

GTLREF

C16

BSEL0

C14

BSEL1

P25

COMP0

P26

COMP1

AB2

COMP2

AB1

COMP3

B2

RSVD

C3

RSVD

E26

RSVD

AF7

RSVD

AC1

RSVD

TYCO_1612365-1_Dothan

COMP0
COMP1
COMP2
COMP3

Dothan

R85 54.9_0402_1%@

1 2

R84 54.9_0402_1%@

1 2

+VCCA

D D

1.8V FOR DOTHAN-A

1 2

+1.8VS

R63 0_1206_5%@

1.5V FOR DOTHAN-B

1 2

+1.5VS

R56 0_1206_5%

1

C25

2

0.01U_0402_16V7K

C C

+1.05VS

R75
1K_0402_1%

B B

A A

1 2

R78 2K_0402_1%

10U_0805_10V4Z

+CPU_CORE

PSI#<48>
CPU_VID0<48>

CPU_VID1<48>
CPU_VID2<48>

12

CPU_VID3<48>
CPU_VID4<48>
CPU_VID5<48>

CPU_BSEL0<14>
CPU_BSEL1<14>

R69 27.4_0402_1%

1 2

R70 54.9_0402_1%

1 2

R83 27.4_0402_1%

1 2

R82 54.9_0402_1%

1 2

TRACE CLOSELY CPU < 0.5'

COMP0, COMP2 layout : Width 18mils and Space 25mils
COMP1, COMP3 layout : Space 25mils

5

4

A2

VSS

A5

VSS

A8

VSS

A11

VSS

A14

VSS

A17

VSS

A20

VSS

A23

VSS

A26

VSS

B3

VSS

B6

VSS

B9

VSS

B12

VSS

B16

VSS

B19

VSS

B22

VSS

B25

VSS

C1

VSS

C4

VSS

C7

VSS

C10

VSS

C13

VSS

C15

VSS

C18

VSS

C21

VSS

C24

VSS

D2

VSS

D5

VSS

D7

VSS

D9

VSS

D11

VSS

D13

VSS

D15

VSS

D17

VSS

D19

VSS

D21

VSS

D23

VSS

D26

VSS

E3

VSS

E6

VSS

E8

VSS

E10

VSS

E12

VSS

E14

VSS

E16

VSS

E18

VSS

E20

VSS

E22

VSS

POWER, GROUNG, RESERVED SIGNALS AND NC

E25

VSS

F1

VSS

F4

VSS

F5

VSS

F7

VSS

F9

VSS

F11

VSS

F13

VSS

F15

VSS

F17

VSS

F19

VSS

F21

VSS

F24

VSS

G2

VSS

G6

VSS

G22

VSS

G23

VSS

G26

VSS

H3

VSS

H5

VSS

H21

VSS

H25

VSS

J1

VSS

J4

VSS

J6

VSS

J22

VSS

J24

VSS

K2

VSS

K5

VSS

K21

VSS

K23

VSS

K26

VSS

L3

VSS

L6

VSS

L22

VSS

L25

VSS

M1

VSS

4

+1.05VS

1

+

2

150U_D2_6.3VM

3

+CPU_CORE

220U_D2_4VM_R12

1

C441

2

220U_D2_4VM_R12

+CPU_CORE

1

2

10U_0805_10V4Z

+CPU_CORE

1

2

10U_0805_10V4Z

+CPU_CORE

1

2

10U_0805_10V4Z

+CPU_CORE

1

2

10U_0805_10V4Z

+CPU_CORE

1

2

10U_0805_10V4Z

Vcc-core
Decoupling

SPCAP,Polymer
MLCC 0805 X5R

0.1U_0402_16V4Z

1

1

C435

C445

2

2

0.1U_0402_16V4Z

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+

10U_0805_10V4Z

C47

10U_0805_10V4Z

C33

10U_0805_10V4Z

C454

10U_0805_10V4Z

C69

10U_0805_10V4Z

C509

0.1U_0402_16V4Z

C16

3

1

+

C472

2

220U_D2_4VM_R12

1

C46

2

10U_0805_10V4Z

1

C42

2

10U_0805_10V4Z

1

C455

2

10U_0805_10V4Z

1

C70

2

10U_0805_10V4Z

1

C510

2

10U_0805_10V4Z

C,uF ESR, mohm ESL,nH

3X330uF 9m ohm/3 3.5nH/4
35X10uF 5m ohm/35 0.6nH/35

1

C458

2

220U_D2_4VM_R12

1

+

C427

2

10U_0805_10V4Z

1

1

C45

2

2

10U_0805_10V4Z

1

1

C40

2

2

10U_0805_10V4Z

1

1

C64

2

2

10U_0805_10V4Z

1

1

C429

2

2

10U_0805_10V4Z

1

1

C511

2

2

0.1U_0402_16V4Z

1

1

C13

2

2

0.1U_0402_16V4Z

1

+

C460

2

C48

10U_0805_10V4Z

C41

10U_0805_10V4Z

C65

10U_0805_10V4Z

C470

10U_0805_10V4Z

C512

10U_0805_10V4Z

C15

0.1U_0402_16V4Z

10U_0805_10V4Z

1

C30

2

10U_0805_10V4Z

1

C39

2

10U_0805_10V4Z

1

C66

2

10U_0805_10V4Z

1

C430

2

10U_0805_10V4Z

1

C513

2

0.1U_0402_16V4Z

1

C14

2

1

C31

2

1

C444

2

1

C67

2

1

C471

2

1

C514

2

1

C461

2

1

2

10U_0805_10V4Z

1

2

10U_0805_10V4Z

1

2

10U_0805_10V4Z

1

2

10U_0805_10V4Z

1

2

10U_0805_10V4Z

1

2

0.1U_0402_16V4Z

2

C32

C443

C68

C516

C515

0.1U_0402_16V4Z

1

C453

2

2

C448

0.1U_0402_16V4Z

1

2

+CPU_CORE

C442

1

JP7C

F20

VCC

F22

VCC

G5

VCC

G21

VCC

H6

VCC

H22

VCC

J5

VCC

J21

VCC

K22

VCC

U5

VCC

V6

VCC

V22

VCC

W5

VCC

W21

VCC

Y6

VCC

Y22
AA5
AA7

AA9
AA11
AA13
AA15
AA17
AA19
AA21

AB6

AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22

AC9
AC11
AC13
AC15
AC17
AC19

AD8
AD10
AD12
AD14
AD16
AD18

AE9
AE11
AE13
AE15
AE17
AE19

AF8
AF10
AF12
AF14
AF16
AF18

M4

M5
M21
M24

N3

N6
N22
N23
N26

P2

P5
P21
P24

R1

R4

R6
R22
R25

T3

T5

T21
T23

TYCO_1612365-1_Dothan

Title

Size Document Number Rev

Date: Sheet of

Dothan

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

POWER, GROUND

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

Compal Electronics, Inc.

Dothan Processor in mFCPGA479

EDL00 LA-2601

T26

VSS

U2

VSS

U6

VSS

U22

VSS

U24

VSS

V1

VSS

V4

VSS

V5

VSS

V21

VSS

V25

VSS

W3

VSS

W6

VSS

W22

VSS

W23

VSS

W26

VSS

Y2

VSS

Y5

VSS

Y21

VSS

Y24

VSS

AA1

VSS

AA4

VSS

AA6

VSS

AA8

VSS

AA10

VSS

AA12

VSS

AA14

VSS

AA16

VSS

AA18

VSS

AA20

VSS

AA22

VSS

AA25

VSS

AB3

VSS

AB5

VSS

AB7

VSS

AB9

VSS

AB11

VSS

AB13

VSS

AB15

VSS

AB17

VSS

AB19

VSS

AB21

VSS

AB23

VSS

AB26

VSS

AC2

VSS

AC5

VSS

AC8

VSS

AC10

VSS

AC12

VSS

AC14

VSS

AC16

VSS

AC18

VSS

AC21

VSS

AC24

VSS

AD1

VSS

AD4

VSS

AD7

VSS

AD9

VSS

AD11

VSS

AD13

VSS

AD15

VSS

AD17

VSS

AD19

VSS

AD22

VSS

AD25

VSS

AE3

VSS

AE6

VSS

AE8

VSS

AE10

VSS

AE12

VSS

AE14

VSS

AE16

VSS

AE18

VSS

AE20

VSS

AE23

VSS

AE26

VSS

AF2

VSS

AF5

VSS

AF9

VSS

AF11

VSS

AF13

VSS

AF15

VSS

AF17

VSS

AF19

VSS

AF21

VSS

AF24

VSS

551Monday, November 15, 2004

1

0.1

5

H_RS#[0..2]

H_A#[3..31]<4>
H_REQ#[0..4]<4>

D D

C C

CLK_MCH_BCLK#<14>
CLK_MCH_BCLK<14>

B B

H_A#[3..31]

H_ADSTB#0<4>
H_ADSTB#1<4>

H_DSTBN#0<4>
H_DSTBN#1<4>
H_DSTBN#2<4>
H_DSTBN#3<4>
H_DSTBP#0<4>
H_DSTBP#1<4>
H_DSTBP#2<4>
H_DSTBP#3<4>
H_DINV#0<4>
H_DINV#1<4>
H_DINV#2<4>
H_DINV#3<4>

H_CPURST#<4>

H_ADS#<4>
H_TRDY#<4>

H_DPWR#<4>

H_DRDY#<4>
H_DEFER#<4>

H_HITM#<4>
H_HIT#<4>
H_LOCK#<4>
H_BR0#<4>
H_BNR#<4>
H_BPRI#<4>
H_DBSY#<4>

Un-pop for Dothan-A

R54 0_0402_5%

H_CPUSLP#<4,18>

A A

(5mil:15mil) (12mil:10mil)

H_VREF H_XSWING H_YSWING

1

C436

0.1U_0402_16V4Z

2

1 2

12

R388
100_0603_1%

12

R387
200_0603_1%

5

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

CPU_SLP#
H_RS#0
H_RS#1
H_RS#2

H_RS#[0..2] <4>

U5A

G9

HA3#

C9

HA4#

E9

HA5#

B7

HA6#

A10

HA7#

F9

HA8#

D8

HA9#

B10

HA10#

E10

HA11#

G10

HA12#

D9

HA13#

E11

HA14#

F10

HA15#

G11

HA16#

G13

HA17#

C10

HA18#

C11

HA19#

D11

HA20#

C12

HA21#

B13

HA22#

A12

HA23#

F12

HA24#

G12

HA25#

E12

HA26#

C13

HA27#

B11

HA28#

D13

HA29#

A13

HA30#

F13

HA31#

A11

HPCREQ#

A7

HREQ#0

D7

HREQ#1

B8

HREQ#2

C7

HREQ#3

A8

HREQ#4

B9

HADSTB#0

E13

HADSTB#1

AB1

HCLKN

AB2

HCLKP

G4

HDSTBN#0

K1

HDSTBN#1

R3

HDSTBN#2

V3

HDSTBN#3

G5

HDSTBP#0

K2

HDSTBP#1

R2

HDSTBP#2

W4

HDSTBP#3

H8

HDINV#0

K3

HDINV#1

T7

HDINV#2

U5

HDINV#3

H10

HCPURST#

F8

HADS#

B5

HTRDY#

G6

HDPWR#

F7

HDRDY#

E6

HDEFER#

F6

HEDRDY#

D6

HHITM#

D4

HHIT#

B3

HLOCK#

E7

HBREQ0#

A5

HBNR#

D5

HBPRI#

C6

HDBSY#

G8

HCPUSLP#

A4

HRS0#

C5

HRS1#

B4

HRS2#

CPU_SLP#

Alviso

ALVISO_BGA1257

1

C423

0.1U_0402_16V4Z

2

HOST

HXRCOMP
HXSCOMP
HYRCOMP
HYSCOMP

HXSWING
HYSWING

+1.05VS +1.05VS+1.05VS

HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

HVREF

HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#

12

R406
221_0603_1%

12

R405
100_0603_1%

E4
E1
F4
H7
E2
F1
E3
D3
K7
F2
J7
J8
H6
F3
K8
H5
H1
H2
K5
K6
J4
G3
H3
J1
L5
K4
J5
P7
L7
J3
P5
L3
U7
V6
R6
R5
P3
T8
R7
R8
U8
R4
T4
T5
R1
T3
V8
U6
W6
U3
V5
W8
W7
U2
U1
Y5
Y2
V4
Y7
W1
W3
Y3
Y6
W2

J11
C1
C2
T1
L1
D1
P1

4

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_VREF
H_XRCOMP
H_XSCOMP
H_YRCOMP
H_YSCOMP
H_XSWING
H_YSWING

H_D#[0..63]H_REQ#[0..4]

+DDRVCC

R50 24.9_0402_1%
R47 54.9_0402_1%
R72 24.9_0402_1%
R68 54.9_0402_1%

1 2
1 2

12
12

H_D#[0..63] <4>

R426 40.2_0402_1%

1 2

R427 40.2_0402_1%

1 2

R429 80.6_0402_1%

1 2

R430 80.6_0402_1%

1 2

+1.05VS

3

DMI_ITX_MRX_N0<19>
DMI_ITX_MRX_N1<19>
DMI_ITX_MRX_N2<19>
DMI_ITX_MRX_N3<19>

DMI_ITX_MRX_P0<19>
DMI_ITX_MRX_P1<19>
DMI_ITX_MRX_P2<19>
DMI_ITX_MRX_P3<19>

DMI_MTX_IRX_N0<19>
DMI_MTX_IRX_N1<19>
DMI_MTX_IRX_N2<19>
DMI_MTX_IRX_N3<19>

DMI_MTX_IRX_P0<19>
DMI_MTX_IRX_P1<19>
DMI_MTX_IRX_P2<19>
DMI_MTX_IRX_P3<19>

M_CLK_DDR0<11>
M_CLK_DDR1<11>

M_CLK_DDR3<12>
M_CLK_DDR4<12>

M_CLK_DDR#0<11>
M_CLK_DDR#1<11>

M_CLK_DDR#3<12>
M_CLK_DDR#4<12>

DDR_CKE0_DIMMA<11>
DDR_CKE1_DIMMA<11>
DDR_CKE2_DIMMB<12>
DDR_CKE3_DIMMB<12>

DDR_CS0_DIMMA#<11>
DDR_CS1_DIMMA#<11>
DDR_CS2_DIMMB#<12>
DDR_CS3_DIMMB#<12>

(10mil:20mil)

H_XRCOMP & H_YRCOMP Trace / Space = 10 / 20 mil

12

R420
221_0603_1%

(12mil:10mil)

1

C459

0.1U_0402_16V4Z

2

4

12

R419
100_0603_1%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

M_ODT0<11>
M_ODT1<11>
M_ODT2<12>
M_ODT3<12>

1K_0402_1%

1K_0402_1%

DMI_ITX_MRX_N0
DMI_ITX_MRX_N1
DMI_ITX_MRX_N2
DMI_ITX_MRX_N3

DMI_ITX_MRX_P0
DMI_ITX_MRX_P1
DMI_ITX_MRX_P2
DMI_ITX_MRX_P3

DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3

DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3

DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB

DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#

M_OCDCOMP0
M_OCDCOMP1

M_ODT0
M_ODT1
M_ODT2
M_ODT3

M_RCOMPN
M_RCOMPP
SMVREF

M_XSLEW
M_YSLEW

+DDRVCC

12

R423

0.1U_0402_16V4Z

12

R421

C488

U5B

AA31
AB35
AC31
AD35

Y31
AA35
AB31
AC35

AA33
AB37
AC33
AD37

Y33
AA37
AB33
AC37

AM33

AL1
AE11

AJ34

AF6
AC10

AN33

AK1
AE10

AJ33

AF5
AD10

AP21
AM21
AH21
AK21

AN16
AM14
AH15
AG16

AF22
AF16

AP14

AL15
AM11
AN10

AK10
AK11

AF37

AD1
AE27
AE28

AF9

AF10

ALVISO_BGA1257

1

2

DMIRXN0
DMIRXN1
DMIRXN2
DMIRXN3

DMIRXP0
DMIRXP1
DMIRXP2
DMIRXP3

DMITXN0
DMITXN1
DMITXN2
DMITXN3

DMITXP0
DMITXP1
DMITXP2
DMITXP3

SM_CK0
SM_CK1
SM_CK2
SM_CK3
SM_CK4
SM_CK5

SM_CK0#
SM_CK1#
SM_CK2#
SM_CK3#
SM_CK4#
SM_CK5#

SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3

SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#

SM_OCDCOMP0
SM_OCDCOMP1
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3

SMRCOMPN
SMRCOMPP
SMVREF0
SMVREF1
SMXSLEWIN
SMXSLEWOUT
SMYSLEWIN
SMYSLEWOUT

SMVREF

1

C489

0.1U_0402_16V4Z

2

2

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8

CFG9
CFG10
CFG11
CFG12

DMIDDR MUXING

CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

RSVD21
RSVD22

CFG/RSVD

RSVD23
RSVD24
RSVD25
RSVD26
RSVD27

BM_BUSY#

EXT_TS0#
EXT_TS1#

THRMTRIP#

PWROK

RSTIN#

PM

DREF_CLKN

DREF_CLKP

DREF_SSCLKP

CLK

DREF_SSCLKN

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9

NC10

NC

NC11

2

CLK_DREF_SSC
CLK_DREF_SSC#

CFG0

G16

MCH_CLKSEL1

H13

MCH_CLKSEL0

G14
F16
F15

CFG5

G15

CFG6

E16

CFG7

D17
J16

CFG9

D15
E15
D14

CFG12

E14

CFG13

H12
C14
H15

CFG16 CFG6

J15
H14

CFG18

G22

CFG19

G23
D23
G25
G24
J17
A31
A30
D26
D25

J23

EXT_TS#0

J21

EXT_TS#1

H22

H_THERMTRIP#

F5
AD30
AE29

CLK_DREF_96M#

A24

CLK_DREF_96M

A23

CLK_DREF_SSC

D37

CLK_DREF_SSC#

C37

AP37
AN37
AP36
AP2
AP1
AN1
B1
A2
B37
A36
A37

CFG[2:0]
CFG5
CFG6
CFG7

CFG9

CFG[13:12]

CFG16
(FSB Dynamic
ODT)

CFG18
(VCC Select)

CFG19
(VTT Select)

Title

Size Document Number Rev

Date: Sheet

R51 0_0402_5%PM@

1 2

R52 0_0402_5%PM@

1 2

MCH_CLKSEL1 <14>
MCH_CLKSEL0 <14>

CFG0

R40 10K_0402_5%

1 2

CFG5

R413 1K_0402_5%@

1 2

R407 1K_0402_5%

CFG7
CFG9
CFG12
CFG13
CFG16

1 2

R408 1K_0402_5%@

1 2

R404 1K_0402_5%@

1 2

R409 1K_0402_5%@

1 2

R412 1K_0402_5%@

1 2

R417 1K_0402_5%@

1 2

CFG[17:3]: internal pull-up

CFG18

R41 1K_0402_5%@

CFG19

1 2

R42 1K_0402_5%@

1 2

CFG[19:18]: internal pull-down

PM_BMBUSY# <19>

H_THERMTRIP# <4,18>

VGATE <14,19,48>
PLT_RST# <17,19,21,32,33>

CLK_DREF_96M# <14>
CLK_DREF_96M <14>
CLK_DREF_SSC <14>
CLK_DREF_SSC# <14>

EXT_TS#0

R416 10K_0402_5%

EXT_TS#1

1 2

R411 10K_0402_5%

1 2

Refer to sheet 6 for FSB
frequency select
Low = DMI x 2

High = DMI x 4
Low = DDR-II

High = DDR-I
Low = DT/Transportable CPU

High = Mobile CPU
Low = Reverse Lane

High = Normal Operation
00 = Reserved

01 = XOR Mode Enabled
10 = All Z Mode Enabled
11 = Normal Operation (Default)

Low = Disabled
High = Enabled

Low = 1.05V (Default)
High = 1.5V

Low = 1.05V (Default)
High = 1.2V

Compal Electronics, Inc.

Alviso HOST(1/5)

EDL00 LA-2601

1

+1.5VS

+1.05VS

+2.5VS

+2.5VS

*
*

*

*

*

*

*

*

0.1

of

651Monday, November 15, 2004

1

5

D D

4

3

2

1

DDR_A_BS#0<11>
DDR_A_BS#1<11>
DDR_A_BS#2<11>

DDR_A_DM[0..7]<11>

DDR_A_DQS[0..7]<11>

C C

B B

DDR_A_DQS#[0..7]<11>

DDR_A_MA[0..13]<11>

DDR_A_CAS#<11>
DDR_A_RAS#<11>

DDR_A_WE#<11> DDR_B_WE#<12>

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13

AK15
AK16

AL21
AJ37

AP35

AL29

AP24

AP9
AP4

AJ2

AD3

AK36
AP33
AN29
AP23

AM8
AM4

AJ1

AE5

AK35
AP34
AN30
AN23

AN8
AM5
AH1

AE4

AL17
AP17
AP18
AM17
AN18
AM18

AL19
AP20
AM19

AL20
AM16
AN20
AM20
AM15

AN15
AP16

AF29

AF28
AP15

SA_BS0#
SA_BS1#
SA_BS2#

SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7

SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13

SA_CAS#
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#

U5C

SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8

SADQ9
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43

DDR MEMORY SYSTEM A

SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63

ALVISO_BGA1257

AG35
AH35
AL35
AL37
AH36
AJ35
AK37
AL34
AM36
AN35
AP32
AM31
AM34
AM35
AL32
AM32
AN31
AP31
AN28
AP28
AL30
AM30
AM28
AL28
AP27
AM27
AM23
AM22
AL23
AM24
AN22
AP22
AM9
AL9
AL6
AP7
AP11
AP10
AL7
AM7
AN5
AN6
AN3
AP3
AP6
AM6
AL4
AM3
AK2
AK3
AG2
AG1
AL3
AM2
AH3
AG3
AF3
AE3
AD6
AC4
AF2
AF1
AD4
AD5

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

DDR_B_BS#0<12>
DDR_B_BS#1<12>
DDR_B_BS#2<12>

DDR_B_DM[0..7]<12>

DDR_B_DQS[0..7]<12>

DDR_B_DQS#[0..7]<12>

DDR_B_MA[0..13]<12>

DDR_B_CAS#<12>
DDR_B_RAS#<12>

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13

AJ15
AG17
AG21

AF32
AK34
AK27
AK24

AJ10

AK5
AE7
AB7

AF34
AK32

AJ28
AK23
AM10

AH6
AF8
AB4

AF35
AK33
AK28

AJ23

AL10

AH7
AF7
AB5

AH17
AK17
AH18

AJ18
AK18

AJ19
AK19
AH19

AJ20
AH20

AJ16
AG18
AG20
AG15

AH14
AK14

AF15

AF14
AH16

SB_BS0#
SB_BS1#
SB_BS2#

SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7

SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7

SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13

SB_CAS#
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#

U5D

SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8

SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37
SBDQ38
SBDQ39
SBDQ40
SBDQ41
SBDQ42

DDR SYSTEM MEMORY B

SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63

ALVISO_BGA1257

AE31
AE32
AG32
AG36
AE34
AE33
AF31
AF30
AH33
AH32
AK31
AG30
AG34
AG33
AH31
AJ31
AK30
AJ30
AH29
AH28
AK29
AH30
AH27
AG28
AF24
AG23
AJ22
AK22
AH24
AH23
AG22
AJ21
AG10
AG9
AG8
AH8
AH11
AH10
AJ9
AK9
AJ7
AK6
AJ4
AH5
AK8
AJ8
AJ5
AK4
AG5
AG4
AD8
AD9
AH4
AG6
AE8
AD7
AC5
AB8
AB6
AA8
AC8
AC7
AA4
AA5

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

DDR_B_D[0..63] <12>DDR_A_D[0..63] <11>

A A

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Alviso DDR(2/5)
EDL00 LA-2601

751Monday, November 15, 2004

1

0.1

of

5

+3VS +2.5VS

12

R402

2.2K_0402_5%GM@

D D

C C

+2.5VS

B B

4.7K_0402_5%

LDDC_CLK

GMCH_ENBKL<16,33>

GMCH_TV_COMPS<22>
GMCH_TV_LUMA<22>
GMCH_TV_CRMA<22>

R381 4.7K_0402_5%

1 2

R382 4.7K_0402_5%

1 2

R400 2.2K_0402_5%

1 2

R39 2.2K_0402_5%

1 2

R398 100K_0402_5%

1 2

R403 1.5K_0402_1%

1 2

R44 150_0402_5%

1 2

R515 150_0402_5%

1 2

R516 150_0402_5%

1 2

+2.5VS

R45

G

2

1 2

S

GMCH_LCD_CLK

13

D

Q6

2N7002_SOT23GM@

GMCH_CRT_CLK<15>
GMCH_CRT_DATA<15>
GMCH_CRT_B<15>

GMCH_CRT_G<15>
GMCH_CRT_R<15>

GMCH_CRT_VSYNC<15>
GMCH_CRT_HSYNC<15>

2

G

1 3

D

S

Q44

BSS138_SOT23GM@

GMCH_TV_COMPS
GMCH_TV_LUMA
GMCH_TV_CRMA

GMCH_CRT_CLK
GMCH_CRT_DATA
LCTLB_DATA
LCTLA_CLK

LBKLT_EN
LIBG
GMCH_TV_COMPS
GMCH_TV_LUMA
GMCH_TV_CRMA

+3VS

R49

1 2

LBKLT_EN

R418 4.99K_0603_1%

GMCH_CRT_CLK
GMCH_CRT_DATA

R384 150_0402_5%
R385 150_0402_5%
R386 150_0402_5%

4.7K_0402_5%GM@

GMCH_LCD_CLK <16>

4

SDVO_SDAT<16>
SDVO_SCLK<16>
CLK_MCH_3GPLL#<14>
CLK_MCH_3GPLL<14>

12

SDVO_SDAT
SDVO_SCLK

TV_REFSET

12

R399 0_0402_5%

12
12
12

1 2

R414 255_0402_1%

GMCH_ENVDD<16>

GMCH_TXCLK-<16>
GMCH_TXCLK+<16>
GMCH_TZCLK-<16>
GMCH_TZCLK+<16>

GMCH_TXOUT0-<16>
GMCH_TXOUT1-<16>
GMCH_TXOUT2-<16>

GMCH_TXOUT0+<16>
GMCH_TXOUT1+<16>
GMCH_TXOUT2+<16>

GMCH_TZOUT0-<16>
GMCH_TZOUT1-<16>
GMCH_TZOUT2-<16>

GMCH_TZOUT0+<16>
GMCH_TZOUT1+<16>
GMCH_TZOUT2+<16>

REFSET

LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
GMCH_ENVDD
LIBG

GMCH_TXCLK­GMCH_TXCLK+
GMCH_TZCLK­GMCH_TZCLK+

GMCH_TXOUT0­GMCH_TXOUT1­GMCH_TXOUT2-

GMCH_TXOUT0+
GMCH_TXOUT1+
GMCH_TXOUT2+

GMCH_TZOUT0­GMCH_TZOUT1­GMCH_TZOUT2-

GMCH_TZOUT0+
GMCH_TZOUT1+
GMCH_TZOUT2+

U5G

H24

H25
AB29
AC29

A15

C16

A17

J18
B15
B16
B17

E24
E23
E21
D21
C20
B20
A19
B19
H21
G21

J20

E25
F25
C23
C22
F23
F22
F26
C33
C31
F28
F27

B30
B29
C25
C24

B34
B33
B32

A34
A33
B31

C29
D28
C27

C28
D27
C26

ALVISO_BGA1257

SDVOCTRL_DATA
SDVOCTRL_CLK
GCLKN
GCLKP

TVDAC_A
TVDAC_B
TVDAC_C
TV_REFSET
TV_IRTNA
TV_IRTNB
TV_IRTNC

DDCCLK
DDCDATA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
VSYNC
HSYNC
REFSET

LBKLT_CTL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL

LACLKN
LACLKP
LBCLKN
LBCLKP

LADATAN0
LADATAN1
LADATAN2

LADATAP0
LADATAP1
LADATAP2

LBDATAN0
LBDATAN1
LBDATAN2

LBDATAP0
LBDATAP1
LBDATAP2

3

EXP_RXN0/SDVO_TVCLKIN#

MISCTVVGALVDS

EXP_RXN1/SDVO_INT#

EXP_RXN2/SDVO_FLDSTALL#

EXP_RXP0/SDVO_TVCLKIN

EXP_RXP1/SDVO_INT

EXP_RXP2/SDVO_FLDSTALL

EXP_TXN0/SDVOB_RED#

EXP_TXN1/SDVOB_GREEN#

EXP_TXN2/SDVOB_BLUE#

EXP_TXN3/SDVOB_CLKN
EXP_TXN4/SDVOC_RED#

EXP_TXN5/SDVOC_GREEN#

EXP_TXN6/SDVOC_BLUE#

EXP_TXN7/SDVOC_CLKN

PCI - EXPRESS GRAPHICS

EXP_TXP0/SDVOB_RED

EXP_TXP1/SDVOB_GREEN

EXP_TXP2/SDVOB_BLUE
EXP_TXP3/SDVOB_CLKP

EXP_TXP4/SDVOC_RED

EXP_TXP5/SDVOC_GREEN

EXP_TXP6/SDVOC_BLUE
EXP_TXP7/SDVOC_CLKP

EXP_COMPI

EXP_ICOMPO

EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8

EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15

EXP_RXP3

EXP_RXP4

EXP_RXP5

EXP_RXP6

EXP_RXP7

EXP_RXP8

EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15

EXP_TXN8

EXP_TXN9

EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15

EXP_TXP8

EXP_TXP9
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15

2

PCIE_MTX_C_GRX_N[0..15]<16>

PCIE_MTX_C_GRX_P[0..15]<16>
PCEI_GTX_C_MRX_N[0..15]<16>
PCEI_GTX_C_MRX_P[0..15]<16>

PEG_COMP

D36
D34

PCEI_GTX_C_MRX_N0

E30

PCEI_GTX_C_MRX_N1

F34

PCEI_GTX_C_MRX_N2

G30

PCEI_GTX_C_MRX_N3

H34

PCEI_GTX_C_MRX_N4

J30

PCEI_GTX_C_MRX_N5

K34

PCEI_GTX_C_MRX_N6

L30

PCEI_GTX_C_MRX_N7

M34

PCEI_GTX_C_MRX_N8

N30

PCEI_GTX_C_MRX_N9

P34

PCEI_GTX_C_MRX_N10

R30

PCEI_GTX_C_MRX_N11

T34

PCEI_GTX_C_MRX_N12

U30

PCEI_GTX_C_MRX_N13

V34

PCEI_GTX_C_MRX_N14

W30

PCEI_GTX_C_MRX_N15

Y34

PCEI_GTX_C_MRX_P0

D30

PCEI_GTX_C_MRX_P1

E34

PCEI_GTX_C_MRX_P2

F30

PCEI_GTX_C_MRX_P3

G34

PCEI_GTX_C_MRX_P4

H30

PCEI_GTX_C_MRX_P5

J34

PCEI_GTX_C_MRX_P6

K30

PCEI_GTX_C_MRX_P7

L34

PCEI_GTX_C_MRX_P8

M30

PCEI_GTX_C_MRX_P9

N34

PCEI_GTX_C_MRX_P10

P30

PCEI_GTX_C_MRX_P11

R34

PCEI_GTX_C_MRX_P12

T30

PCEI_GTX_C_MRX_P13

U34

PCEI_GTX_C_MRX_P14

V30

PCEI_GTX_C_MRX_P15

W34

PCIE_MTX_GRX_N0

E32

PCIE_MTX_GRX_N1

F36

PCIE_MTX_GRX_N2

G32

PCIE_MTX_GRX_N3

H36

PCIE_MTX_GRX_N4 PCIE_MTX_C_GRX_N4

J32

PCIE_MTX_GRX_N5

K36

PCIE_MTX_GRX_N6

L32

PCIE_MTX_GRX_N7

M36

PCIE_MTX_GRX_N8

N32

PCIE_MTX_GRX_N9

P36

PCIE_MTX_GRX_N10

R32

PCIE_MTX_GRX_N11

T36

PCIE_MTX_GRX_N12

U32

PCIE_MTX_GRX_N13

V36

PCIE_MTX_GRX_N14

W32

PCIE_MTX_GRX_N15

Y36

PCIE_MTX_GRX_P0

D32

PCIE_MTX_GRX_P1

E36

PCIE_MTX_GRX_P2

F32

PCIE_MTX_GRX_P3

G36

PCIE_MTX_GRX_P4

H32

PCIE_MTX_GRX_P5

J36

PCIE_MTX_GRX_P6

K32

PCIE_MTX_GRX_P7

L36

PCIE_MTX_GRX_P8

M32

PCIE_MTX_GRX_P9

N36

PCIE_MTX_GRX_P10

P32

PCIE_MTX_GRX_P11

R36

PCIE_MTX_GRX_P12

T32

PCIE_MTX_GRX_P13

U36

PCIE_MTX_GRX_P14

V32

PCIE_MTX_GRX_P15

W36

1 2

R48 24.9_0402_1%

C59 0.1U_0402_16V4Z

1 2

C71 0.1U_0402_16V4Z

1 2

C76 0.1U_0402_16V4Z

1 2

C80 0.1U_0402_16V4Z

1 2

C91 0.1U_0402_16V4Z

1 2

C100 0.1U_0402_16V4Z

1 2

C109 0.1U_0402_16V4Z

1 2

C116 0.1U_0402_16V4Z

1 2

C58 0.1U_0402_16V4Z

1 2

C63 0.1U_0402_16V4Z

1 2

C75 0.1U_0402_16V4Z

1 2

C79 0.1U_0402_16V4Z

1 2

C89 0.1U_0402_16V4Z

1 2

C98 0.1U_0402_16V4Z

1 2

C105 0.1U_0402_16V4Z

1 2

C115 0.1U_0402_16V4Z

1 2

PCIE_MTX_C_GRX_N[0..15]

PCIE_MTX_C_GRX_P[0..15]
PCEI_GTX_C_MRX_N[0..15]
PCEI_GTX_C_MRX_P[0..15]

+1.5VS

C57 0.1U_0402_16V4Z

1 2

C62 0.1U_0402_16V4Z

1 2

C74 0.1U_0402_16V4Z

1 2

C78 0.1U_0402_16V4Z

1 2

C87 0.1U_0402_16V4Z

1 2

C97 0.1U_0402_16V4Z

1 2

C104 0.1U_0402_16V4Z

1 2

C114 0.1U_0402_16V4Z

1 2

C56 0.1U_0402_16V4Z

1 2

C60 0.1U_0402_16V4Z

1 2

C73 0.1U_0402_16V4Z

1 2

C77 0.1U_0402_16V4Z

1 2

C83 0.1U_0402_16V4Z

1 2

C92 0.1U_0402_16V4Z

1 2

C101 0.1U_0402_16V4Z

1 2

C110 0.1U_0402_16V4Z

1 2

1

PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_N3

PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_N15

PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_P15

A A

4.7K_0402_5%

LDDC_DATA

R397

+2.5VS

G

2

1 2

S

GMCH_LCD_DATA

13

D

Q43

5

2N7002_SOT23GM@

+3VS

R401

4.7K_0402_5%GM@

1 2

GMCH_LCD_DATA <16>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Alviso PCI-E(3/5)
EDL00 LA-2601

851Monday, November 15, 2004

1

0.1

of

5

4

3

2

1

U5E

+1.05VS

D D

C C

+1.5VS

+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
+1.5VS_MPLL

B B

+1.5VS_DPLLA

1

2

+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
+1.5VS_MPLL

60mA

C412

22U_1206_16V4Z_V1

T29
R29
N29

M29

K29
J29
V28

U28

T28

R28

P28
N28
M28

L28

K28

J28
H28
G28

V27
U27

T27
R27

P27
N27
M27

L27

K27

J27
H27

K26
H26

K25

J25

K24

K23

K22

K21

W20

U20

T20

K20

V19
U19

K19

W18

V18

T18

K18

K17

AC1
AC2

B23
C35
AA1
AA2

ALVISO_BGA1257

L6
CHB1608U301_0603

1 2

1

C418

2

0.1U_0402_16V4Z

VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7

POWER

VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48

VCCD_HMPLL1
VCCD_HMPLL2
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL

+1.5VS

+1.5VS_DPLLB

1

C426

2

22U_1206_16V4Z_V1

VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1

VCCA_TVBG
VSSA_TVBG

VCCD_TVDAC

VCCDQ_TVDAC

VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2

VCCA_LVDS

VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2

VCCA_SM0
VCCA_SM1
VCCA_SM2
VCCA_SM3

VCCA_3GPLL0
VCCA_3GPLL1
VCCA_3GPLL2

VCCA_3GBG
VSSA_3GBG

VCC_SYNC

VCCA_CRTDAC0
VCCA_CRTDAC1

VSSA_CRTDAC

60mA

VCCHV0
VCCHV1
VCCHV2

VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6

F17
E17
D18
C18

120mA

F18
E18

H18
G18

D19
H17

24mA

B26
B25
A25

60mA

A35

10mA

B22
B21

2mA

A21
B28

A28

60mA

A27
AF20

AP19
AF19
AF18

AE37
W37
U37
R37

1500mA

N37
L37
J37

Y29
Y28
Y27

F37

0.15mA

G37
H20
F19

E19
G19

L25
CHB1608U301_0603

1 2

1

C420

2

0.1U_0402_16V4Z

+3VS

+1.5VS

+2.5VS

+1.5VS_DDRDLL

+1.5VS_PEG

0.47U_0603_16V4Z

+1.5VS_3GPLL

+2.5VS_3GBG

+2.5VS

70mA

0.47U_0603_16V4Z

+1.5VS_DDRDLL

+1.5VS

+1.05VS

C23

1

2

1

C24

2

C49

0.22U_0402_10V4Z

0.22U_0402_10V4Z

1

C84

2

22U_1206_16V4Z_V1

C34

1

2

1

2

1

2

U5F

K13

VTT0

J13

VTT1

K12

VTT2

W11

VTT3

V11

VTT4

U11

VTT5

T11

VTT6

R11

VTT7

P11

VTT8

N11

VTT9

M11

VTT10

L11

VTT11

K11

VTT12

W10

VTT13

V10

VTT14

U10

VTT15

T10

VTT16

R10

VTT17

P10

VTT18

N10

VTT19

M10

VTT20

K10

VTT21

J10

VTT22

Y9

VTT23

W9

VTT24

U9

VTT25

R9

VTT26

P9

VTT27

N9

VTT28

M9

VTT29

L9

VTT30

J9

VTT31

N8

VTT32

M8

VTT33

N7

VTT34

M7

VTT35

N6

VTT36

M6

VTT37

A6

VTT38

N5

VTT39

M5

VTT40

N4

VTT41

M4

VTT42

N3

VTT43

M3

VTT44

N2

VTT45

M2

VTT46

B2

VTT47

V1

VTT48

N1

VTT49

M1

VTT50

G1

VTT51

ALVISO_BGA1257

R86
0_0603_5%

1 2

C496

0.1U_0402_16V4Z

POWER

+1.5VS_PEG

+1.5VS

1

2

VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8

VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37
VCCSM38
VCCSM39
VCCSM40
VCCSM41
VCCSM42
VCCSM43
VCCSM44
VCCSM45
VCCSM46
VCCSM47
VCCSM48
VCCSM49
VCCSM50
VCCSM51
VCCSM52
VCCSM53
VCCSM54
VCCSM55
VCCSM56
VCCSM57
VCCSM58
VCCSM59
VCCSM60
VCCSM61
VCCSM62
VCCSM63
VCCSM64

C446

22U_1206_16V4Z_V1

AM37
AH37
AP29
AD28
AD27
AC27
AP26
AN26
AM26
AL26
AK26
AJ26
AH26
AG26
AF26
AE26
AP25
AN25
AM25
AL25
AK25
AJ25
AH25
AG25
AF25
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AE17
AE16
AE15
AE14
AP13
AN13
AM13
AL13
AK13
AJ13
AH13
AG13
AF13
AE13
AP12
AN12
AM12
AL12
AK12
AJ12
AH12
AG12
AF12
AE12
AD11
AC11
AB11
AB10
AB9

V1.8_DDR_CAP6

AP8

V1.8_DDR_CAP4

AM1

V1.8_DDR_CAP3

AE1

1

C449

2

4.7U_0805_10V4Z

V1.8_DDR_CAP1
V1.8_DDR_CAP2
V1.8_DDR_CAP5

C519

0.1U_0402_16V4Z

+DDRVCC

+DDRVCC

C88

330U_D2E_2.5VM

VCCA_LVDS (Ball A35)

VCC_SYNC(Ball H20)

C82

0.1U_0402_16V4Z

12

0.1U_0402_16V4Z

1

C439

2

4.7U_0805_10V4Z

12

2200mA

0.1U_0402_16V4Z

1

+

C494

2

+2.5VS

1

C417

2

0.1U_0402_16V4Z

+2.5VS

1

C22

2

4.7U_0805_10V4Z

C517

0.1U_0402_16V4Z

12

12

C490

R415

1 2

0_0805_5%

C505

0.1U_0402_16V4Z

12

C520

0.1U_0402_16V4Z

1

C487

2

0.1U_0402_16V4Z

1

C419

2

0.01U_0402_16V7K

1

C434

2

0.1U_0402_16V4Z

4.7U_0805_10V4Z

+1.5VS

1

+

C53

2

470U_D2_2.5VM

12

+1.05VS

C450

22U_1206_16V4Z_V1

0.1U_0402_16V4Z

1

2

C86

1

2

VCCHV(Ball A21,B21,B22)

+1.5VS

1

C20

C415

2

0.1U_0402_16V4Z

+1.05VS

1

C462

2

2.2U_0603_6.3V6K

VCCA_TVDAC VCCA_TVBG (Ball H18)

+3VS

4000mA

2.2U_0603_6.3V6K

1

C457

2

1

C498

2

0.1U_0402_16V4Z

1

C413

2

4.7U_0805_10V4Z

1

2

2.2U_0603_6.3V6K

0.1U_0402_16V4Z

C81

1

2

0.1U_0402_16V4Z

1

C451

C456

2

1

C481

2

0.1U_0402_16V4Z

C416

0.1U_0402_16V4Z

VCCA_CRTD AC(Ball F19 ,E19)

1

C424

2

0.1U_0402_16V4Z

1

C431

2

0.022U_0402_16V7K

VCCD_TVDAC (Ball D19)

0.1U_0402_16V4Z

C421

1

2

1

2

1

C425

2

0.022U_0402_16V7K

950mA

1

C463

2

2.2U_0603_6.3V6K

1

2

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

1

2

1

C21

2

4.7U_0805_10V4Z

1

C447

2

0.1U_0402_16V4Z

1

C483

2

0.1U_0402_16V4Z

C452

1

C486

2

1

C414

2

0.1U_0402_16V4Z

1

2

VCCTX_LVDS(Ball A27,A28,B28)

0.1U_0402_16V4Z

C440

1

2

1

C437

2

0.022U_0402_16V7K

VCCDQ_TVDAC (Ball H17)VCCD_LVDS(Ball A25,B25,B26)

1

C474

2.2U_0603_6.3V6K

C469

2

2.2U_0603_6.3V6K

1

+1.5VS_HPLL

A A

60mA

1

C50

2

22U_1206_16V4Z_V1

L7
CHB1608U301_0603

1 2

1

C478

2

0.1U_0402_16V4Z

5

+1.5VS

+1.5VS_MPLL

1

C52

2

22U_1206_16V4Z_V1

60mA

L8
CHB1608U301_0603

1 2

1

C482

2

0.1U_0402_16V4Z

+1.5VS

4

+1.5VS_3GPLL

1

C55

2

10U_1206_16V4Z

R79

0.5_0603_1%

1 2

1

C475

2

0.1U_0402_16V4Z

+1.5VS

+2.5VS_3GBG

1

2

1 2

R410 0_0603_5%

C428

0.1U_0402_16V4Z

+2.5VS

2

L9
CHB1608U301_0603

+3GPLL

1 2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

C432

2

0.1U_0402_16V4Z

1

C422

2

0.022U_0402_16V7K

1

C433

2

0.1U_0402_16V4Z

1

C438

2

0.022U_0402_16V7K

120mA

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Alviso POWER(4/5)

EDL00 LA-2601

951Monday, November 15, 2004

1

of

0.1

5

4

3

2

1

U5H

+1.05VS

D D

C C

B B

+1.05VS

A A

L12

VTT_NCTF17

M12

VTT_NCTF16

N12

VTT_NCTF15

P12

VTT_NCTF14

R12

VTT_NCTF13

T12

VTT_NCTF12

U12

VTT_NCTF11

V12

VTT_NCTF10

W12

VTT_NCTF9

L13

VTT_NCTF8

M13

VTT_NCTF7

N13

VTT_NCTF6

P13

VTT_NCTF5

R13

VTT_NCTF4

T13

VTT_NCTF3

U13

VTT_NCTF2

V13

VTT_NCTF1

W13

VTT_NCTF0

Y12

VSS_NCTF68

AA12

VSS_NCTF67

Y13

VSS_NCTF66

AA13

VSS_NCTF65

L14

VSS_NCTF64

M14

VSS_NCTF63

N14

VSS_NCTF62

P14

VSS_NCTF61

R14

VSS_NCTF60

T14

VSS_NCTF59

U14

VSS_NCTF58

V14

VSS_NCTF57

W14

VSS_NCTF56

Y14

VSS_NCTF55

AA14

VSS_NCTF54

AB14

VSS_NCTF53

L15

VSS_NCTF52

M15

VSS_NCTF51

N15

VSS_NCTF50

P15

VSS_NCTF49

R15

VSS_NCTF48

T15

VSS_NCTF47

U15

VSS_NCTF46

V15

VSS_NCTF45

W15

VSS_NCTF44

Y15

VSS_NCTF43

AA15

VSS_NCTF42

AB15

VSS_NCTF41

L16

VSS_NCTF40

M16

VSS_NCTF39

N16

VSS_NCTF38

P16

VSS_NCTF37

R16

VSS_NCTF36

T16

VSS_NCTF35

U16

VSS_NCTF34

V16

VSS_NCTF33

W16

VSS_NCTF32

Y16

VSS_NCTF31

AA16

VSS_NCTF30

AB16

VSS_NCTF29

R17

VSS_NCTF28

Y17

VSS_NCTF27

AA17

VSS_NCTF26

AB17

VSS_NCTF25

AA18

VSS_NCTF24

AB18

VSS_NCTF23

AA19

VSS_NCTF22

AB19

VSS_NCTF21

AA20

VSS_NCTF20

AB20

VSS_NCTF19

R21

VSS_NCTF18

Y21

VSS_NCTF17

AA21

VSS_NCTF16

AB21

VSS_NCTF15

Y22

VSS_NCTF14

AA22

VSS_NCTF13

AB22

VSS_NCTF12

Y23

VSS_NCTF11

AA23

VSS_NCTF10

AB23

VSS_NCTF9

Y24

VSS_NCTF8

AA24

VSS_NCTF7

AB24

VSS_NCTF6

Y25

VSS_NCTF5

AA25

VSS_NCTF4

AB25

VSS_NCTF3

Y26

VSS_NCTF2

AA26

VSS_NCTF1

AB26

VSS_NCTF0

V25

VCC_NCTF10

W25

VCC_NCTF9

L26

VCC_NCTF8

M26

VCC_NCTF7

N26

VCC_NCTF6

P26

VCC_NCTF5

R26

VCC_NCTF4

T26

VCC_NCTF3

U26

VCC_NCTF2

V26

VCC_NCTF1

W26

VCC_NCTF0

ALVISO_BGA1257

5

VCCSM_NCTF31
VCCSM_NCTF30
VCCSM_NCTF29
VCCSM_NCTF28
VCCSM_NCTF27
VCCSM_NCTF26
VCCSM_NCTF25
VCCSM_NCTF24
VCCSM_NCTF23
VCCSM_NCTF22
VCCSM_NCTF21
VCCSM_NCTF20
VCCSM_NCTF19
VCCSM_NCTF18
VCCSM_NCTF17
VCCSM_NCTF16
VCCSM_NCTF15
VCCSM_NCTF14
VCCSM_NCTF13
VCCSM_NCTF12
VCCSM_NCTF11
VCCSM_NCTF10

VCCSM_NCTF9
VCCSM_NCTF8
VCCSM_NCTF7
VCCSM_NCTF6
VCCSM_NCTF5
VCCSM_NCTF4
VCCSM_NCTF3
VCCSM_NCTF2
VCCSM_NCTF1
VCCSM_NCTF0

VCC_NCTF78
VCC_NCTF77
VCC_NCTF76
VCC_NCTF75
VCC_NCTF74
VCC_NCTF73
VCC_NCTF72
VCC_NCTF71
VCC_NCTF70

NCTF

VCC_NCTF69
VCC_NCTF68
VCC_NCTF67
VCC_NCTF66
VCC_NCTF65
VCC_NCTF64
VCC_NCTF63
VCC_NCTF62
VCC_NCTF61
VCC_NCTF60
VCC_NCTF59
VCC_NCTF58
VCC_NCTF57
VCC_NCTF56
VCC_NCTF55
VCC_NCTF54
VCC_NCTF53
VCC_NCTF52
VCC_NCTF51
VCC_NCTF50
VCC_NCTF49
VCC_NCTF48
VCC_NCTF47
VCC_NCTF46
VCC_NCTF45
VCC_NCTF44
VCC_NCTF43
VCC_NCTF42
VCC_NCTF41
VCC_NCTF40
VCC_NCTF39
VCC_NCTF38
VCC_NCTF37
VCC_NCTF36
VCC_NCTF35
VCC_NCTF34
VCC_NCTF33
VCC_NCTF32
VCC_NCTF31
VCC_NCTF30
VCC_NCTF29
VCC_NCTF28
VCC_NCTF27
VCC_NCTF26
VCC_NCTF25
VCC_NCTF24
VCC_NCTF23
VCC_NCTF22
VCC_NCTF21
VCC_NCTF20
VCC_NCTF19
VCC_NCTF18
VCC_NCTF17
VCC_NCTF16
VCC_NCTF15
VCC_NCTF14
VCC_NCTF13
VCC_NCTF12
VCC_NCTF11

AB12
AC12
AD12
AB13
AC13
AD13
AC14
AD14
AC15
AD15
AC16
AD16
AC17
AD17
AC18
AD18
AC19
AD19
AC20
AD20
AC21
AD21
AC22
AD22
AC23
AD23
AC24
AD24
AC25
AD25
AC26
AD26

L17
M17
N17
P17
T17
U17
V17
W17
L18
M18
N18
P18
R18
Y18
L19
M19
N19
P19
R19
Y19
L20
M20
N20
P20
R20
Y20
L21
M21
N21
P21
T21
U21
V21
W21
L22
M22
N22
P22
R22
T22
U22
V22
W22
L23
M23
N23
P23
R23
T23
U23
V23
W23
L24
M24
N24
P24
R24
T24
U24
V24
W24
L25
M25
N25
P25
R25
T25
U25

+DDRVCC

+1.05VS

4

U5I

Y1

VSS271

D2

VSS270

G2

VSS269

J2

VSS268

L2

VSS260

P2

VSS259

T2

VSS258

V2

VSS257

AD2

VSS256

AE2

VSS255

AH2

VSS254

AL2

VSS253

AN2

VSS252

A3

VSS251

C3

VSS250

AA3

VSS249

AB3

VSS248

AC3

VSS247

AJ3

VSS246

C4

VSS245

H4

VSS244

L4

VSS243

P4

VSS242

U4

VSS241

Y4

VSS240

AF4

VSS239

AN4

VSS238

E5

VSS237

W5

VSS236

AL5

VSS235

AP5

VSS234

B6

VSS233

J6

VSS232

L6

VSS231

P6

VSS230

T6

VSS229

AA6

VSS228

AC6

VSS227

AE6

VSS226

AJ6

VSS225

G7

VSS224

V7

VSS223

AA7

VSS222

AG7

VSS221

AK7

VSS220

AN7

VSS219

C8

VSS218

E8

VSS217

L8

VSS216

P8

VSS215

Y8

VSS214

AL8

VSS213

A9

VSS212

H9

VSS211

K9

VSS210

T9

VSS209

V9

VSS208

AA9

VSS207

AC9

VSS206

AE9

VSS205

AH9

VSS204

AN9

VSS203

D10

VSS202

L10

VSS201

Y10

VSS200

AA10

VSS199

F11

VSS198

H11

VSS197

Y11

VSS196

ALVISO_BGA1257

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

VSS

3

VSSALVDS

VSS195
VSS194
VSS193
VSS192
VSS191
VSS190
VSS189
VSS188
VSS187
VSS186
VSS185
VSS184
VSS183
VSS182
VSS181
VSS180
VSS179
VSS178
VSS177
VSS176
VSS175
VSS174
VSS173
VSS172
VSS171
VSS170
VSS169
VSS168
VSS167
VSS166
VSS165
VSS164
VSS163
VSS162
VSS161
VSS160
VSS159
VSS158
VSS157
VSS156
VSS155
VSS154
VSS153
VSS152
VSS151
VSS150
VSS149
VSS148
VSS147
VSS146
VSS145
VSS144
VSS143
VSS142
VSS141
VSS140
VSS139
VSS138
VSS137
VSS136
VSS135
VSS134
VSS133
VSS132
VSS131
VSS130

B36
AA11

AF11
AG11
AJ11
AL11
AN11
B12
D12
J12
A14
B14
F14
J14
K14
AG14
AJ14
AL14
AN14
C15
K15
A16
D16
H16
K16
AL16
C17
G17
AF17
AJ17
AN17
A18
B18
U18
AL18
C19
H19
J19
T19
W19
AG19
AN19
A20
D20
E20
F20
G20
V20
AK20
C21
F21
AF21
AN21
A22
D22
E22
J22
AH22
AL22
H23
AF23
B24
D24
F24
J24
AG24
AJ24

2

AL24

AN24

A26
E26
G26

B27
E27
G27

W27
AA27
AB27

AF27

AG27

AJ27
AL27

AN27

E28

W28
AA28
AB28
AC28

A29
D29
E29

G29
H29

P29
U29
V29

W29
AA29
AD29
AG29

AJ29

AM29

C30

Y30
AA30
AB30
AC30
AE30
AP30

D31

E31

G31

H31

K31

M31

N31

P31

R31

U31

V31

W31
AD31
AG31

AL31

A32
C32

Y32
AA32
AB32

J26

F29

L29

F31

J31
L31

T31

U5J

VSS267
VSS266
VSS265
VSS264
VSS263
VSS262
VSS261
VSS129
VSS128
VSS127
VSS126
VSS125
VSS124
VSS123
VSS122
VSS121
VSS120
VSS119
VSS118
VSS117
VSS116
VSS115
VSS114
VSS113
VSS112
VSS111
VSS110
VSS109
VSS108
VSS107
VSS106
VSS105
VSS104
VSS103
VSS102
VSS101
VSS100
VSS99
VSS98
VSS97
VSS96
VSS95
VSS94
VSS93
VSS92
VSS91
VSS90
VSS89
VSS88
VSS87
VSS86
VSS85
VSS84
VSS83
VSS82
VSS81
VSS80
VSS79
VSS78
VSS77
VSS76
VSS75
VSS74
VSS73
VSS72
VSS71
VSS70
VSS69
VSS68

ALVISO_BGA1257

VSS

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Alviso POWER(5/5)

EDL00 LA-2601

VSS67
VSS66
VSS65
VSS64
VSS63
VSS62
VSS61
VSS60
VSS59
VSS58
VSS57
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10

VSS9
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
VSS0

1

AC32
AD32
AJ32
AN32
D33
E33
F33
G33
H33
J33
K33
L33
M33
N33
P33
R33
T33
U33
V33
W33
AD33
AF33
AL33
C34
AA34
AB34
AC34
AD34
AH34
AN34
B35
D35
E35
F35
G35
H35
J35
K35
L35
M35
N35
P35
R35
T35
U35
V35
W35
Y35
AE35
C36
AA36
AB36
AC36
AD36
AE36
AF36
AJ36
AL36
AN36
E37
H37
K37
M37
P37
T37
V37
Y37
AG37

10 51Monday, November 15, 2004

0.1

of

5

DDR_A_D0
DDR_A_D1

DDR_A_DQS#0
DDR_A_DQS0

D D

C C

DDR_CKE0_DIMMA<6>

DDR_A_BS#2<7>

DDR_A_BS#0<7>
DDR_A_WE#<7>

DDR_A_CAS#<7>

DDR_CS1_DIMMA#<6>

M_ODT1<6>

B B

A A

D_CK_SDATA<12,14,38>
D_CK_SCLK<12,14,38>

5

DDR_A_D2
DDR_A_D3

DDR_A_D8
DDR_A_D9

DDR_A_DQS#1 M_CLK_DDR0
DDR_A_DQS1

DDR_A_D10
DDR_A_D11

DDR_A_D16
DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D18
DDR_A_D19

DDR_A_D24
DDR_A_D25

DDR_A_DM3

DDR_A_D26
DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS#2
DDR_A_MA12

DDR_A_MA9 DDR_A_MA7
DDR_A_MA8

DDR_A_MA5
DDR_A_MA3
DDR_A_MA1

DDR_A_MA10
DDR_A_BS#0
DDR_A_WE#

DDR_A_CAS#
DDR_CS1_DIMMA#

M_ODT1
DDR_A_D32

DDR_A_D33
DDR_A_DQS#4

DDR_A_DQS4
DDR_A_D34

DDR_A_D35
DDR_A_D40

DDR_A_D41
DDR_A_DM5
DDR_A_D42

DDR_A_D43
DDR_A_D48

DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D51

DDR_A_D56
DDR_A_D57

DDR_A_DM7
DDR_A_D58

DDR_A_D59
D_CK_SDATA

D_CK_SCLK

+3VS

C857

0.1U_0402_16V4Z

+DDRVCC +DDRVCC

JP24

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

1 2

VDDSPD

JAE_MM50-200B1-1R~D

4

VSS
DQ4
DQ5
VSS

DM0

VSS
DQ6
DQ7

VSS
DQ12
DQ13

VSS

DM1

VSS

CK0
CK0#

VSS
DQ14
DQ15

VSS

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3#

DQS3

VSS
DQ30
DQ31

VSS

NC/CKE1

VDD
NC/A15
NC/A14

VDD

VDD

VDD

BA1

RAS#

VDD

ODT0

NC/A13

VDD

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5#

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

CK1
CK1#

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7#

DQS7

VSS
DQ62
DQ63

VSS

SAO

SA1

4

A11

S0#

3

1

2

4.7U_0805_10V4Z

0.1U_0402_16V4Z

1

2

3

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50

NC

52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106
108
110
112
114
116
118
120

NC

122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_A_D4
DDR_A_D5

DDR_A_DM0

DDR_A_D6
DDR_A_D7

DDR_A_D12
DDR_A_D13

DDR_A_DM1

M_CLK_DDR#0
DDR_A_D14

DDR_A_D15

DDR_A_D20
DDR_A_D21

DDR_A_DM2
DDR_A_D22

DDR_A_D23
DDR_A_D28

DDR_A_D29
DDR_A_DQS#3

DDR_A_DQS3
DDR_A_D30

DDR_A_D31
DDR_CKE1_DIMMA

DDR_A_MA11
DDR_A_MA6
DDR_A_MA4

DDR_A_MA2
DDR_A_MA0

DDR_A_BS#1
DDR_A_RAS#
DDR_CS0_DIMMA#

M_ODT0
DDR_A_MA13

DDR_A_D36
DDR_A_D37

DDR_A_DM4
DDR_A_D38

DDR_A_D39
DDR_A_D44

DDR_A_D45
DDR_A_DQS#5

DDR_A_DQS5
DDR_A_D46

DDR_A_D47
DDR_A_D52

DDR_A_D53
M_CLK_DDR1

M_CLK_DDR#1
DDR_A_DM6
DDR_A_D54

DDR_A_D55
DDR_A_D60

DDR_A_D61
DDR_A_DQS#7

DDR_A_DQS7
DDR_A_D62

DDR_A_D63

R692 10K_0402_5%

1 2

R693 10K_0402_5%

1 2

C840

M_CLK_DDR0 <6>
M_CLK_DDR#0 <6>

DDR_CKE1_DIMMA <6>

DDR_A_BS#1 <7>
DDR_A_RAS# <7>
DDR_CS0_DIMMA# <6>

M_ODT0 <6>

M_CLK_DDR1 <6>
M_CLK_DDR#1 <6>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+DDRVCC+DIMM_VREF

12

R92

C121

1K_0402_1%

12

R91

1K_0402_1%

+0.9V_DDR_VTT

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C804

DDR_A_MA8
DDR_A_MA5

DDR_A_MA3
DDR_A_MA1

DDR_A_RAS#
DDR_CS0_DIMMA#

56_0404_4P2R_5%

DDR_A_MA10
DDR_A_BS#0

56_0404_4P2R_5%

DDR_A_WE#
DDR_A_CAS#

56_0404_4P2R_5%

M_ODT1
DDR_CS1_DIMMA#

56_0404_4P2R_5%

+DDRVCC

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C806

1

2

C807

RP30

1 4
2 3

RP29

1 4
2 3

RP28

1 4
2 3

RP27

1 4
2 3

RP26

1 4
2 3

RP31

2 3
1 4

1

2

C805

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V_DDR_VTT

56_0404_4P2R_5%

56_0404_4P2R_5%

2

DDR_A_D[0..63]<7>
DDR_A_DM[0..7]<7>

DDR_A_DQS[0..7]<7>
DDR_A_MA[0..13]<7>

DDR_A_DQS#[0..7]<7>

C795

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C808

+0.9V_DDR_VTT

2

1

C796

2

4.7U_0805_10V4Z

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

1

1

2

2

C809

RP59

RP58

RP57

RP35

RP34

RP33

RP32

1

C797

2

4.7U_0805_10V4Z

0.1U_0402_16V4Z

C800

1

2

0.1U_0402_16V4Z

1

2

C810

C811

DDR_CKE0_DIMMA

14

DDR_A_BS#2

23

56_0404_4P2R_5%

DDR_A_MA7

14

DDR_A_MA6

23

56_0404_4P2R_5%

DDR_A_MA12

14

DDR_A_MA9

23

56_0404_4P2R_5%

DDR_A_MA4

14

DDR_A_MA2

23

56_0404_4P2R_5%

DDR_A_MA0

14

DDR_A_BS#1

23

56_0404_4P2R_5%

M_ODT0

14

DDR_A_MA13

23

56_0404_4P2R_5%

DDR_CKE1_DIMMA

14

DDR_A_MA11

23

56_0404_4P2R_5%

1

DDR_A_D[0..63]
DDR_A_DM[0..7]
DDR_A_DQS[0..7]
DDR_A_MA[0..13]
DDR_A_DQS#[0..7]

Layout Note:

1

1

C798

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z

0.1U_0402_16V4Z

C801

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C812

Title

Size Document Number Rev

Date: Sheet

1

C799

2

2

4.7U_0805_10V4Z

0.1U_0402_16V4Z

C802

C803

1

2

0.1U_0402_16V4Z

1

1

2

2

C814

C813

Compal Electronics, Inc.

Place near DIMM

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C815

C816

Layout Note:
Place these resistor
closely DIMM0,all
trace length<750 mil

Layout Note:
Place these resistor
closely DIMM0,all
trace length
Max=1.3"

DDR-SODIMM SLOT0

EDL00 LA-2601

1

of

11 51Monday, November 15, 2004

0.1

A

B

C

D

E

+DDRVCC

JP25

1

VREF

3

DDR_B_D0
DDR_B_D1

DDR_B_DQS#0

1 1

2 2

DDR_CKE2_DIMMB<6>

DDR_B_BS#2<7>

DDR_B_BS#0<7>
DDR_B_WE#<7>

DDR_B_CAS#<7>

DDR_CS3_DIMMB#<6>

M_ODT3<6>

3 3

4 4

D_CK_SDATA<11,14,38>
D_CK_SCLK<11,14,38>

A

DDR_B_DQS0
DDR_B_D2

DDR_B_D3
DDR_B_D8

DDR_B_D9
DDR_B_DQS#1

DDR_B_DQS1
DDR_B_D10

DDR_B_D11

DDR_B_D16
DDR_B_D17

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D18
DDR_B_D19

DDR_B_D24
DDR_B_D25

DDR_B_DM3

DDR_B_D26
DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS#2
DDR_B_MA12

DDR_B_MA9
DDR_B_MA8

DDR_B_MA5
DDR_B_MA3
DDR_B_MA1

DDR_B_MA10
DDR_B_BS#0
DDR_B_WE#

DDR_B_CAS#
DDR_CS3_DIMMB#

M_ODT3
DDR_B_D32

DDR_B_D33
DDR_B_DQS#4

DDR_B_DQS4
DDR_B_D34

DDR_B_D35
DDR_B_D40

DDR_B_D41
DDR_B_DM5
DDR_B_D42

DDR_B_D43
DDR_B_D48

DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D50
DDR_B_D51

DDR_B_D56
DDR_B_D57

DDR_B_DM7
DDR_B_D58

DDR_B_D59
D_CK_SDATA

D_CK_SCLK

+3VS

C858

0.1U_0402_16V4Z

1 2

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

JAE_MM50-200B1-1~D

DQS3#

DQS3

NC/CKE1

NC/A15
NC/A14

RAS#

ODT0

NC/A13

DQS5#

DQS5

DQS7#

DQS7

VSS
DQ4
DQ5

VSS
DM0

VSS
DQ6
DQ7

VSS

DQ12
DQ13

VSS
DM1

VSS

CK0

CK0#

VSS

DQ14
DQ15

VSS

VSS

DQ20
DQ21

VSS
DM2

VSS

DQ22
DQ23

VSS

DQ28
DQ29

VSS

VSS

DQ30
DQ31

VSS
VDD

VDD

VDD

VDD

BA1

VDD

VDD

VSS

DQ36
DQ37

VSS
DM4

VSS

DQ38
DQ39

VSS

DQ44
DQ45

VSS

VSS

DQ46
DQ47

VSS

DQ52
DQ53

VSS

CK1

CK1#

VSS
DM6

VSS

DQ54
DQ55

VSS

DQ60
DQ61

VSS

VSS

DQ62
DQ63

VSS
SAO

SA1

A11

S0#

B

+DDRVCC

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50

NC

52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106
108
110
112
114
116
118
120

NC

122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_B_D4
DDR_B_D5

DDR_B_DM0
DDR_B_D6

DDR_B_D7
DDR_B_D12

DDR_B_D13
DDR_B_DM1
M_CLK_DDR3

M_CLK_DDR#3
DDR_B_D14

DDR_B_D15

DDR_B_D20
DDR_B_D21

DDR_B_DM2
DDR_B_D22

DDR_B_D23
DDR_B_D28

DDR_B_D29
DDR_B_DQS#3

DDR_B_DQS3
DDR_B_D30

DDR_B_D31
DDR_CKE3_DIMMB

DDR_B_MA11
DDR_B_MA7
DDR_B_MA6

DDR_B_MA4
DDR_B_MA2
DDR_B_MA0

DDR_B_BS#1
DDR_B_RAS#
DDR_CS2_DIMMB#

M_ODT2
DDR_B_MA13

DDR_B_D36
DDR_B_D37

DDR_B_DM4
DDR_B_D38

DDR_B_D39
DDR_B_D44

DDR_B_D45
DDR_B_DQS#5

DDR_B_DQS5
DDR_B_D46

DDR_B_D47
DDR_B_D52

DDR_B_D53
M_CLK_DDR4

M_CLK_DDR#4
DDR_B_DM6
DDR_B_D54

DDR_B_D55
DDR_B_D60

DDR_B_D61
DDR_B_DQS#7

DDR_B_DQS7
DDR_B_D62

DDR_B_D63

R695 10K_0402_5%

1 2

R694 10K_0402_5%

1 2

+DIMM_VREF

0.1U_0402_16V4Z

1

1

C841

2

4.7U_0805_10V4Z

M_CLK_DDR3 <6>
M_CLK_DDR#3 <6>

DDR_CKE3_DIMMB <6>

DDR_B_BS#1 <7>
DDR_B_RAS# <7>
DDR_CS2_DIMMB# <6>

M_ODT2 <6>

M_CLK_DDR4 <6>
M_CLK_DDR#4 <6>

+3VS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C843

2

+0.9V_DDR_VTT

0.1U_0402_16V4Z

1

2

56_0404_4P2R_5%

56_0404_4P2R_5%

56_0404_4P2R_5%

56_0404_4P2R_5%

56_0404_4P2R_5%

56_0404_4P2R_5%

C

+DDRVCC

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C827

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V_DDR_VTT

DDR_B_MA3
DDR_B_MA1

DDR_B_MA10
DDR_B_BS#0

DDR_B_MA0
DDR_B_BS#1

DDR_B_RAS#
DDR_CS2_DIMMB#

DDR_B_WE#
DDR_B_CAS#

M_ODT3
DDR_CS3_DIMMB#

0.1U_0402_16V4Z

C828

1

2

C829

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

2 3
1 4

0.1U_0402_16V4Z

DDR_B_D[0..63]<7>
DDR_B_DM[0..7]<7>

DDR_B_DQS[0..7]<7>
DDR_B_MA[0..13]<7>

DDR_B_DQS#[0..7]<7>

C817

4.7U_0805_10V4Z

C822

1

2

1

2

C830

+0.9V_DDR_VTT

RP71

RP70

RP69

RP68

RP67

RP56

1

C818

2

4.7U_0805_10V4Z

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

1

2

C831

D

1

1

C819

2

2

4.7U_0805_10V4Z

0.1U_0402_16V4Z

C823

C824

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C832

RP66

14
23

56_0404_4P2R_5%

RP65

14
23

56_0404_4P2R_5%

RP64

14
23

56_0404_4P2R_5%

RP63

14
23

56_0404_4P2R_5%

RP62

14
23

56_0404_4P2R_5%

RP61

14
23

56_0404_4P2R_5%

RP60

14
23

56_0404_4P2R_5%

DDR_B_D[0..63]
DDR_B_DM[0..7]
DDR_B_DQS[0..7]
DDR_B_MA[0..13]
DDR_B_DQS#[0..7]

1

2

0.1U_0402_16V4Z

C825

0.1U_0402_16V4Z

C834

1

C821

4.7U_0805_10V4Z

C826

1

2

Layout Note:
Place near DIMM

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C838

C837

Layout Note:
Place these resistor
closely DIMM0,all
trace length<750 mil

Layout Note:
Place these resistor
closely DIMM0,all
trace length
Max=1.3"

1

2

C835

0.1U_0402_16V4Z

1

2

C836

Compal Electronics, Inc.

DDR-SODIMM SLOT1

EDL00 LA-2601

0.1U_0402_16V4Z

1

2

C839

E

of

12 51Monday, November 15, 2004

C820

4.7U_0805_10V4Z

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

1

2

C833

DDR_B_MA12
DDR_B_MA9

DDR_CKE3_DIMMB
DDR_B_MA11

DDR_B_MA8
DDR_B_MA5

DDR_B_MA7
DDR_B_MA6

DDR_B_MA4
DDR_B_MA2

M_ODT2
DDR_B_MA13

DDR_CKE2_DIMMB
DDR_B_BS#2

Title

Size Document Number Rev

Date: Sheet

0.1

A

B

C

D

E

Layout note :

Distribute as clo se as possible
to DDR-SODIMM.

+DDRVCC

1 1

1

C117

0.1U_0402_16V4Z

2

1

C103

0.1U_0402_16V4Z

2

1

C122

0.1U_0402_16V4Z

2

1

C102

0.1U_0402_16V4Z

2

1

C99

0.1U_0402_16V4Z

2

+DDRVCC+DDRVCC

1

C118

0.1U_0402_16V4Z

2

1

C136

0.1U_0402_16V4Z

2

1

C119

0.1U_0402_16V4Z

2

1

C138

0.1U_0402_16V4Z

2

1

C137

0.1U_0402_16V4Z

2

2 2

3 3

1

C135

0.1U_0402_16V4Z

2

1

C124

0.1U_0402_16V4Z

2

1

C123

0.1U_0402_16V4Z

2

1

+

C85
150U_D2_6.3VM

2

1

+

C139
150U_D2_6.3VM

2

4 4

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DDR SODIMM Decoupling

EDL00 LA-2601

Monday, November 15, 2004

E

of

13 51

0.1

A

FSC FSB FSA CPU

CLKSEL0 CLKSEL1 CLKSEL2

*

1 1

0
0

0
0
1
1

+3VS

1 2

R139 10K_0402_5%

1 2

R153 10K_0402_5%

1 2

R145 10K_0402_5%

1 2

R141 10K_0402_5%

2 2

CLK_PCI0 = 0, Pin 35,36
are PCIe CLK pair

CLK_PCI1 = 0, Pin 17,18
are 96Mhz

3 3

4 4

R460

4.7K_0402_5%

CLKSEL0 CLKSEL1

1 2
1 2

R458
0_0402_5%@

CLKSEL2

CLK_PCI2

CLK_PCI0

CLK_PCI1

CK_SCLK<19>

CK_SDATA<19>

+1.05VS +1.05VS

R456

1 2

R459
0_0402_5%

A

11
1
1
00

CLK_PCI2 = 1, Pin 32,33
are PEREQ# pin

CLK_ICH_48M<19>
CLK_SD_48M<23>

CLK_14M_CODEC<29>

+3VS

2

1 3

D

+3VS

2

1 3

D

1K_0402_5%@
R457

0_0402_5%

1 2

12

33P_0402_50V8J

CLK_PCI_PCM<23>
CLK_PCI_LAN<26>
CLK_PCI_MINI<28>
CLK_PCI_SIO<32>
CLK_PCI_1394<25>
CLK_PCI_LPC<33>

CLK_PCI_ICH<17>

G

G

B

SRC

MHz

MHz

100

100 33.3
100

133

100

166

100

200

Table : ICS 954206B

C162

14.318MHZ_16PF_DSX840GA

1 2

C161

33P_0402_50V8J

1 2

CLK_ICH_48M

CLK_14M_CODEC CLKSEL0

D_CK_SCLK<11,12,38>

D_CK_SDATA<11,12,38>

R462

4.7K_0402_5%

1 2

S

Q16
2N7002_SOT23

R461

4.7K_0402_5%

1 2

D_CK_SDATA

S

Q17
2N7002_SOT23

MCH_CLKSEL0 <6>

+3VS

D_CK_SCLK

+3VS

B

C

+CLK_VDD48 +CLK_VDDREF

PCI
MHz

1

C555

2

2.2U_0603_6.3V6K

1

C157

2

0.047U_0402_16V7K

33.3

33.3

33.3

Y1

12

CLK_PCI_MINI CLK_PCI4

CLK_PCI_ICH
D_CK_SCLK

D_CK_SDATA

+CLK_VDD2

1 2

R135 1_0402_5%

1 2

R455 2.2_0402_5%

R143 12_0402_5%

1 2

R147 12_0402_5%

1 2

R151 12_0402_5%

R451
0_0402_5%@

12

R77 12_0402_5%

1 2
1 2

R71 12_0402_5%

1 2

R150 33_0402_5%

1 2

R149 33_0402_5%

1 2

R154 33_0402_5%

1 2

R142 33_0402_5%

1 2

R146 33_0402_5%

1 2

R452 475_0402_1%

R454

R453

4.7K_0402_5%

1 2
1 2

1 2

R448
0_0402_5%

+CLK_VDDREF

+CLK_VDD48

1K_0402_5%@
R450

0_0402_5%

1 2

C

+CLK_VDD1

+CLK_VDD1

XTALIN
XTALOUT

CLKSEL2CLK_SD_48M

CLKSEL1

CLK_PCI5CLK_PCI_LAN

CLK_PCI3CLK_PCI_SIO
CLK_PCI2CLK_PCI_1394
CLK_PCI1CLK_PCI_LPC

CLK_PCI0

CLKIREF

12

1

C156

0.047U_0402_16V7K

2

U8

21

VDDPCIEX_0

28

VDDPCIEX_1

34

VDDPCIEX_2

1

VDDPCI_0

7

VDDPCI_1

42

VDDCPU

48

VDDREF

15mil

11

VDD48

15mil

50

X1

49

X2

12

FS_A/USB_48MHz

53

REF1/FSLC/TEST_SEL

16

FSLB/TEST_MODE

5

PCICLK5

4

PCICLK4

3

PCICLK3

56

PCICLK2/REQ_SEL

9

SELPCIEX_LCDCLK#/PCICLK_F1

8

ITP_EN/PCICLK_F0

46

SCLK

47

SDATA

39

IREF

15mil

13

GND_0

29

GND_1

2

GND_2

45

GND_3

51

GND_4

6

GND_5

ICS954226AGT_TSSOP56

MCH_CLKSEL1 <6>

CPU_BSEL1 <5>CPU_BSEL0 <5>

D

L10
KC FBM-L11-201209-221LMAT_0805

1 2

+3VS

VDDA
GNDA

PCI/SRC_STOP#

CPU_STOP#

CPUCLKT1
CPUCLKC1

CPUCLKT0
CPUCLKC0

CPUCLKT2_ITP/PCIEXT6

CPUCLKC2_ITP/PCIEXC6

PEREQ1#/PCIEXT5
PEREQ2#/PCIEXC5

PCIEXT4

PCIEXC4

SATACLKT
SATACLKC

PCIEXT3
PCIEXC3

PCIEXT2
PCIEXC2

PCIEXT1
PCIEXC1

LCDCLK_SS/PCIEX0T

LCDCLK_SS/PCIEX0C

DOTT_96MHz
DOTC_96MHz

VTT_PWRGD#/PD

REF0

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

E

1

C144

2.2U_0603_6.3V6K

2

1

37
38

55
54

41
40

44
43

36
35

33
32

31
30

26
27

24
25

22
23

19
20

17
18

14
15

10
52

2

STP_PCI#
STP_CPU#

CLK_CPU1
CLK_CPU1#

CLK_CPU0
CLK_CPU0#

CLK_SRC3
CLK_SRC3# CLK_MCH_3GPLL#

PEREQ1#
PEREQ2# PE_REQ2#

CLK_SRC2#

CLK_SRC4
CLK_SRC4#

CLK_SRC6
CLK_SRC6#

CLK_SRC7
CLK_SRC7#

CLK_SRC1
CLK_SRC1#

CLK_SRC0
CLK_SRC0#

CLK_DOT
CLK_DOT#

CLK_REF CLK_14M_SIO

E

1

C149

0.047U_0402_16V7K

2

+CLK_VCCA

40mil

C553

2.2U_0603_6.3V6K

R124 33_0402_5%
R120 33_0402_5%

R134 33_0402_5%
R128 33_0402_5%

R106 33_0402_5%
R102 33_0402_5%

R684 0_0402_5%
R685 0_0402_5%

R114 33_0402_5%
R110 33_0402_5%

R100 33_0402_5%
R96 33_0402_5%

R678 33_0402_5%
R679 33_0402_5%

R113 33_0402_5%
R109 33_0402_5%

R121 33_0402_5%
R117 33_0402_5%

R129 33_0402_5%
R125 33_0402_5%

R136 33_0402_5%
R131 33_0402_5%

1 2

R144 12_0402_5%

1 2

R148 12_0402_5%

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1

2

F

1 2

R449

2.2_0402_5%

C150

0.047U_0402_16V7K

PM_STP_PCI# <19>
PM_STP_CPU# <19,48>

CLK_ICH_14M

F

1

C145

0.047U_0402_16V7K

2

+CLK_VDD1

CLK_MCH_BCLK
CLK_MCH_BCLK#

CLK_CPU_BCLK
CLK_CPU_BCLK#

CLK_MCH_3GPLL

PE_REQ1#

CLK_PCIE_VGACLK_SRC2
CLK_PCIE_VGA#

CLK_PCIE_SATA
CLK_PCIE_SATA#

CLK_EZ_CLK2
CLK_EZ_CLK2#

CLK_EZ_CLK1
CLK_EZ_CLK1#

CLK_PCIE_ICH
CLK_PCIE_ICH#

CLK_DREF_SSC
CLK_DREF_SSC#

CLK_DREF_96M
CLK_DREF_96M#

1 2

+3VS

R138 10K_0402_5%

VTT_POWERGD#

CLK_14M_SIO <32>

CLK_ICH_14M <19>

+3VS

G

40mil

+CLK_VDD1

1

C147

0.047U_0402_16V7K

2

L11

KC FBM-L11-201209-221LMAT_0805

1 2

CLK_MCH_BCLK <6>
CLK_MCH_BCLK# <6>

CLK_CPU_BCLK <4>
CLK_CPU_BCLK# <4>

CLK_MCH_3GPLL <8>
CLK_MCH_3GPLL# <8>

PE_REQ1# <33>
PE_REQ2# <33>

CLK_PCIE_VGA <16>
CLK_PCIE_VGA# <16>

CLK_PCIE_SATA <18>
CLK_PCIE_SATA# <18>

CLK_EZ_CLK2 <38>
CLK_EZ_CLK2# <38>

CLK_EZ_CLK1 <38>
CLK_EZ_CLK1# <38>

CLK_PCIE_ICH <19>
CLK_PCIE_ICH# <19>

CLK_DREF_SSC <6>
CLK_DREF_SSC# <6>

CLK_DREF_96M <6>
CLK_DREF_96M# <6>

Title

Size Document Number Rev

Date: Sheet

1

C152

0.047U_0402_16V7K

2

1

C165

2

2.2U_0603_6.3V6K

2

G

1 3

D

S

Q14
2N7002_SOT23

Compal Electronics, Inc.

Monday, November 15, 2004

G

Clock Generator

40mil

1

C159

2

0.047U_0402_16V7K

CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_EZ_CLK1
CLK_EZ_CLK1#

CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_PCIE_ICH
CLK_PCIE_ICH#
CLK_DREF_SSC
CLK_DREF_SSC#
CLK_DREF_96M
CLK_DREF_96M#
CLK_EZ_CLK2
CLK_EZ_CLK2#

VGATE <6,19,48>

Clock Generator
EDL00 LA-2601

H

+CLK_VDD2

1

C163

2

0.047U_0402_16V7K

1 2

R123 49.9_0402_1%

1 2

R119 49.9_0402_1%

1 2

R133 49.9_0402_1%

1 2

R127 49.9_0402_1%

1 2

R112 49.9_0402_1%

1 2

R108 49.9_0402_1%

1 2

R101 49.9_0402_1%

1 2

R97 49.9_0402_1%

1 2

R107 49.9_0402_1%

1 2

R103 49.9_0402_1%

1 2

R115 49.9_0402_1%

1 2

R111 49.9_0402_1%

1 2

R122 49.9_0402_1%

1 2

R118 49.9_0402_1%

1 2

R130 49.9_0402_1%

1 2

R126 49.9_0402_1%

1 2

R137 49.9_0402_1%

1 2

R132 49.9_0402_1%

1 2

R680 49.9_0402_1%

1 2

R681 49.9_0402_1%

14 51

H

0.1

of

A

CRT Connector

U4

1 1

R34 0_0402_5%PM@

VGA_CRT_R<16>
GMCH_CRT_R<8>

VGA_CRT_G< 16>
GMCH_CRT_G<8>

VGA_CRT_B<16>
GMCH_CRT_B<8>

2 2

1 2
1 2

R33 0_0402_5%GM@
R32 0_0402_5%PM@

1 2
1 2

R21 0_0402_5%GM@
R19 0_0402_5%PM@

1 2
1 2

R18 0_0402_5%GM@

DOCKIN#<22,27,33,38>

DOCKIN#

VGA_CRT_HSYNC<16>
GMCH_CRT_HSYNC<8>

1

SEL

15

OE#

4

1A

7

2A

9

3A

12

4A

8

GND

FSAV330MTC_TSSOP16

VCC

1B1
2B1
3B1
4B1

1B2
2B2
3B2
4B2

1 2

R8 0_0402_5%PM@

1 2

R7 39_0402_5%GM@

VGA_CRT_VSYNC<16>
GMCH_CRT_VSYNC<8>

B

+5VS

1 2

C18

16

D_CRT_R

2

D_CRT_G

5

D_CRT_B

11

14

3

6

10

13

R1

150_0402_5%

C10 0.1U_0402_16V4Z

C

0.1U_0402_16V4Z

D_CRT_R <38>
D_CRT_G <38>
D_CRT_B <38>

CRT_R CRT_R_L

CRT_G

CRT_B

12

12

R2

150_0402_5%

1 2

1 2

R377 0_0402_5%PM@

1 2

R378 39_0402_5%GM@

12

R3

150_0402_5%

CRT_HSYNC D_CRT_HSYNC

1

C9

2

8P_0402_50V8K

+CRT_VCC

1

5

P

4

OE#

A2Y

G

U1

SN74AHCT1G125GW_SOT353-5

3

1 2

C410 0.1U_0402_16V4Z

1

C8

2

8P_0402_50V8K

R6 10K_0402_5%

+CRT_VCC

1

5

CRT_VSYNC D_CRT_VSYNC

P

4

OE#

A2Y

G

U35
SN74AHCT1G125GW_SOT353-5

3

+3VS

1 2

L3

FCM2012C-800_0805

1 2

L4

FCM2012C-800_0805

1 2

L5

FCM2012C-800_0805

1

C7

8P_0402_50V8K

2

8P_0402_50V8K

10P for GMCH

12

CRT_G_L

CRT_B_L

C1

D23

DAN217_SC59@

1

2

3

1

C2

2

8P_0402_50V8K

1 2

L1 FCM1608C-121T_0603

1 2

L2 FCM1608C-121T_0603

D

D22

DAN217_SC59@

1

2

3

1

2

10P_0402_50V8J

33P for GMCH

D_CRT_HSYNC <38>

D_CRT_VSYNC <38>

1

2

3

1

C3

8P_0402_50V8K

2

1

C5

2

D21

DAN217_SC59@

HSYNC_L

VSYNC_L

+5VS

RB411D_SOT23

1

C6
10P_0402_50V8J

2

D1

2 1

W=40mils

POLYSWITCH_1A

0.1U_0402_16V4Z

DDC_MD2

C408

100P_0402_25V8K

1

2

C409

68P_0402_50V8K

F1

C4

E

W=40mils

1

2

DSUB_12

DSUB_15

1

C407
68P_0402_50V8K

2

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

+CRT_VCC+R_CRT_VCC

JP1
CRT-15P

(CL55)

3 3

D_DDC_DATA<38>

D_DDC_CLK<38>

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

4.7K_0402_5%

DSUB_15

+CRT_VCC

R4

12

4.7K_0402_5%

12

R5

Q1
BSS138_SOT23

D

R9 0_0402_5%PM@

1 2

R10 0_0402_5%GM@

1 2

2

G

1 3

D

S

2

1 3

D

Q2

BSS138_SOT23

+3VS

+2.5VS

R11 0_0402_5%GM@

12

VGA_DDC_DATADSUB_12

G

VGA_DDC_CLK

S

12

R12

0_0402_5%GM@

Title

Size Document Number Rev

Date: Sheet

Monday, November 15, 2004

GMCH_CRT_DATA <8>

VGA_DDC_DATA <16>

VGA_DDC_CLK <16>

GMCH_CRT_CLK <8>

Compal Electronics, Inc.

CRT & TVout Connector

EDL00 LA-2601

E

15 51

of

0.1

5

LCD POWER CIRCUIT

GMCH_ENVDD<8>

D D

C C

B B

+LCDVDD

12

R53

301_0402_1%GM@

13

D

Q8

2N7002_SOT23GM@

S

0.01U_0402_16V7KGM@

2

G

BKOFF#<33>

GMCH_ENVDD

+3VALW

C860

1

2

5

P

A2Y

G

3

U33

1

SN74AHCT1G125GW_SOT353-5GM@

4

OE#

R62

100_0402_5%GM@

1

+3VS

R55

100K_0402_5%GM@

1 2

C27

2

0.047U_0402_16V7KGM@

1

C19

0.1U_0402_16V4Z@

2

BKOFF# DISPO FF#

D32
RB751V_SOD323

21

LCD/PANEL BD. Conn.

JP6

B+

+3VS

GMCH_LCD_CLK<8>

GMCH_LCD_DATA<8>

GMCH_TZOUT0-<8>
GMCH_TZOUT0+<8>

GMCH_TZOUT1+<8>
GMCH_TZOUT1-<8>
GMCH_TZOUT2+<8>
GMCH_TZOUT2-<8>

GMCH_TZCLK-<8>

A A

GMCH_TZCLK+<8>

GMCH_LCD_CLK
GMCH_LCD_DATA

GMCH_TZOUT0-

GMCH_TZOUT1+
GMCH_TZOUT1­GMCH_TZOUT2+
GMCH_TZOUT2-

GMCH_TZCLK­GMCH_TZCLK+

1
3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

2

1

2

4

3

4

6

5

6

8

7

8

10

9

10

12

11

12

14

13

14

16

15

16

18

17

18

20

19

20

22

21

22

24

23

24

26

25

26

28

27

28

30

29

30

32

31

32

34

33

34

36

35

36

38

37

38

40

39

40

ACES_87216-4012GM@

1 2

4

+3VS

2

1 3

1

C28

2

+3VS

12

R477

4.7K_0402_5%

DAC_BRIG
INVT_PWM
DISPOFF#

GMCH_TXOUT0­GMCH_TXOUT0+GMCH_TZOUT0+

GMCH_TXOUT1­GMCH_TXOUT1+
GMCH_TXOUT2+
GMCH_TXOUT2-

GMCH_TXCLK­GMCH_TXCLK+

Q9

SI2301DS_SOT23GM@

4.7U_0805_10V4ZGM@

DAC_BRIG <33>
INVT_PWM <33>

B+

0.1U_0402_25V4K

1

C866

2

+LCDVDD

1

C29

2

+LCDVDD

GMCH_TXOUT0- <8>
GMCH_TXOUT0+ <8>

GMCH_TXOUT1- <8>
GMCH_TXOUT1+ <8>
GMCH_TXOUT2+ <8>
GMCH_TXOUT2- <8>

GMCH_TXCLK- <8>
GMCH_TXCLK+ <8>

3

1

C867

2

0.1U_0402_25V4K

0.1U_0402_25V4K

1

2

0.1U_0402_25V4K

C868

0.1U_0402_25V4K

1

C869

2

Bypass CAP under B+ trace(+25V)

0.1U_0402_16V4ZGM@

PLTRST_VGA#<19>

2

PCEI_GTX_C_MRX_N[0..15]<8>
PCEI_GTX_C_MRX_P[0..15]<8>

1

C870

2

PCIE_MTX_C_GRX_N[0..15]<8>
PCIE_MTX_C_GRX_P[0..15]<8>

PCEI_GTX_C_MRX_N[0..15]

PCEI_GTX_C_MRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]

1

VGA BOARD Conn.

B+

DAC_BRIG
DISPOFF#
INVT_PWM

VGA_CRT_R<15>
VGA_CRT_G< 15>
VGA_CRT_B<15> VGA_CRT_HSYNC <15>

DVI_TXC+<22>
DVI_TXC-<22>

DVI_TXD0+<22>
DVI_TXD0-<22>

DVI_TXD1+<22>
DVI_TXD1-<22>

DVI_TXD2+<22>
DVI_TXD2-<22>

R510 0_0402_5%

GMCH_ENBKL<8,33>

VGA_CRT_R
VGA_CRT_G
VGA_CRT_B VGA_CRT_HSYNC

+3VALW

+2.5VS

1 2

GMCH_ENBKL

PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0

PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1

PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2

PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3

PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4

PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5

PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6

PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7

PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8

PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9

PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10

PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11

PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12

PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13

PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14

PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15

JP11

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
57 58
59 60
61 62
63 64
65 66
67 68
69 70
71 72
73 74
75 76
77 78
79 80
81 82
83 84
85 86
87 88
89 90
91 92
93 94
95 96
97 98
99 100
101 102
103 104
105 106
107 108
109 110
111 112
113 114
115 116
117 118
119 120
121 122
123 124
125 126
127 128
129 130
131 132
133 134
135 136
137 138
139 140
141 142
143 144
145 146
147 148
149 150
151 152
153 154
155 156
157 158
159 160

ACES_88081-1600

VGA_DDC_CLK
VGA_DDC_DATA

VGA_TV_LUMA
VGA_TV_CRMA
VGA_TV_COMPS
SUSP#

VGA_CRT_VSYNC

+3VS

+5VALW

SDVO_SCLK
SDVO_SDAT

PCEI_GTX_C_MRX_P0
PCEI_GTX_C_MRX_N0

PCEI_GTX_C_MRX_P1
PCEI_GTX_C_MRX_N1

PCEI_GTX_C_MRX_P2
PCEI_GTX_C_MRX_N2

PCEI_GTX_C_MRX_P3
PCEI_GTX_C_MRX_N3

PCEI_GTX_C_MRX_P4
PCEI_GTX_C_MRX_N4

PCEI_GTX_C_MRX_P5
PCEI_GTX_C_MRX_N5

PCEI_GTX_C_MRX_P6
PCEI_GTX_C_MRX_N6

PCEI_GTX_C_MRX_P7
PCEI_GTX_C_MRX_N7

PCEI_GTX_C_MRX_P8
PCEI_GTX_C_MRX_N8

PCEI_GTX_C_MRX_P9
PCEI_GTX_C_MRX_N9

PCEI_GTX_C_MRX_P10
PCEI_GTX_C_MRX_N10

PCEI_GTX_C_MRX_P11
PCEI_GTX_C_MRX_N11

PCEI_GTX_C_MRX_P12
PCEI_GTX_C_MRX_N12

PCEI_GTX_C_MRX_P13
PCEI_GTX_C_MRX_N13

PCEI_GTX_C_MRX_P14
PCEI_GTX_C_MRX_N14

PCEI_GTX_C_MRX_P15
PCEI_GTX_C_MRX_N15

B+

VGA_DDC_CLK <15>

VGA_DDC_DATA <15>

VGA_TV_LUMA <22>
VGA_TV_CRMA <22>
VGA_TV_COMPS <22>
SUSP# <33,35,40,47>

VGA_CRT_VSYNC <15>

+1.5VS

DVI_DET <22>

DVI_SCLK <22>

DVI_SDATA <22>

+5VS

SDVO_SCLK <8>
SDVO_SDAT <8>
CLK_PCIE_VGA <14>
CLK_PCIE_VGA# <14>

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

VGA / LCD CONN.

EDL00 LA-2601

Monday, November 15, 2004

1

of

16 51

0.1

5

4

3

2

1

RP89

+3VS

D D

+3VS

+3VS

+3VS

C C

+3VS

+3VS

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

RP88

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

RP91

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

RP92

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

RP87

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

RP90

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

PCI_SERR#
PCI_TRDY#
PCI_FRAME#
PCI_STOP#

PCI_PLOCK#
PCI_IRDY#
PCI_PERR#
PCI_DEVSEL#

PCI_PIRQD#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQA#

PCI_PIRQE#
PCI_PIRQF#

PCI_PIRQG#

PCI_REQ#3
D_USB_SMI#1
PCI_REQ#4
PCI_REQ#1

PCI_REQ#0
PCI_REQ#2
PCI_PIRQH#

PCI_AD[0..31]<23,25,26,28>

PCI_FRAME#<23,25,26,28>

PCI_PIRQA#<23>
PCI_PIRQB#<23>

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27D_USB_SMI#2
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_FRAME#

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

U17B

E2

AD[0]

E5

AD[1]

C2

AD[2]

F5

AD[3]

F3

AD[4]

E9

AD[5]

F2

AD[6]

D6

AD[7]

E6

AD[8]

D3

AD[9]

A2

AD[10]

D2

AD[11]

D5

AD[12]

H3

AD[13]

B4

AD[14]

J5

AD[15]

K2

AD[16]

K5

AD[17]

D4

AD[18]

L6

AD[19]

G3

AD[20]

H4

AD[21]

H2

AD[22]

H5

AD[23]

B3

AD[24]

M6

AD[25]

B2

AD[26]

K6

AD[27]

K3

AD[28]

A5

AD[29]

L1

AD[30]

K4

AD[31]

J3

FRAME#

Interrupt I/F

N2

PIRQ[A]#

L2

PIRQ[B]#

M1

PIRQ[C]#

L3

PIRQ[D]#

AC5

SATA[1]RXN/RSVD[1]

AD5

SATA[1]RXP/RSVD[2]

AF4

SATA[1]TXN/RSVD[3]

AG4

SATA[1]TXP/RSVD[4]

AC9

SATA[3]RXN/RSVD[5]

AD9

SATA[3]RXP/RSVD[6]

AF8

SATA[3]TXN/RSVD[7]

AG8

SATA[3]TXP/RSVD[8]

U3

TP[3]/RSVD[9]

ICH6_BGA609

PCI

REQ[4]#/GPI[40]

GNT[4]#/GPO[48]

REQ[5]#/GPI[1]

GNT[5]#/GPO[17]

REQ[6]#/GPI[0]

GNT[6]#/GPO[16]

DEVSEL#

PLTRST#

PIRQ[E]#/GPI[2]
PIRQ[F]#/GPI[3]
PIRQ[G]#GPI[4]

PIRQ[H]#/GPI[5]

RESERVED

REQ[0]#
GNT[0]#
REQ[1]#
GNT[1]#
REQ[2]#
GNT[2]#
REQ[3]#
GNT[3]#

C/BE[0]#
C/BE[1]#
C/BE[2]#
C/BE[3]#

IRDY#

PAR

PCIRST#

PERR#

PLOCK#

SERR#
STOP#

TRDY#

PCICLK

PME#

L5
C1
B5
B6
M5
F1
B8
C8
F7
E7
E8
F6
B7
D8

J6
H6
G4
G2

A3
E1
R2
C3
E3
C5
G5
J1
J2

R5
G6
P6

D9
C7
C6
M3

PCI_REQ#0
PCI_GNT#0
PCI_REQ#1
PCI_GNT#1
PCI_REQ#2
PCI_GNT#2
PCI_REQ#3
PCI_GNT#3
PCI_REQ#4

D_USB_SMI#1
PCI_GNT#5
D_USB_SMI#2

PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3

PCI_IRDY#
PCI_PAR
PCI_RST#
PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#

PLT_RST#
CLK_ICH_PCI

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

PCI_REQ#0 <25>
PCI_GNT#0 <25>
PCI_REQ#1 <28>
PCI_GNT#1 <28>
PCI_REQ#2 <23>
PCI_GNT#2 <23>
PCI_REQ#3 <26>
PCI_GNT#3 <26>

D_USB_SMI#1 <38>
D_USB_SMI#2 <38>

PCI_C/BE#0 <23,25,26,28>
PCI_C/BE#1 <23,25,26,28>
PCI_C/BE#2 <23,25,26,28>
PCI_C/BE#3 <23,25,26,28>

PCI_IRDY# <23,25,26,28>
PCI_PAR <23,25,26,28>
PCI_RST# <23,25,26,28,32,33>
PCI_DEVSEL# <23,25,26,28>
PCI_PERR# <23,25,26,28>

PCI_SERR# <23,25,26,28>
PCI_STOP# <23,25,26,28>
PCI_TRDY# <23,25,26,28>

PLT_RST# <6,19,21,32,33>
CLK_PCI_ICH <14>

PCI_PIRQE# <25>
PCI_PIRQF# <26>
PCI_PIRQG# <28>
PCI_PIRQH# <28>

Internal Pull-up.
Sample hi g h de stina tion is LPC.

PCI_GNT#5

12

R231

0_0402_5%@

CLK_PCI_ICH

R177

10_0402_5%@

1 2
1

C192

10P_0402_50V8J@

2

B B

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

ICH6(1/4)

EDL00 LA-2601

17 51Monday, November 15, 2004

1

0.1

of

5

+RTCVCC

12

R244

D D

1M_0402_1%

INTRUDER#

32.768KHZ_12.5P_1TJS125DJ2A073

+RTCVCC

close to RAM door

C C

B B

R201 4.7K_0402_5%

+3VS

1 2

R203 8.2K_0402_5%

1 2

ICH_AC_BITCLK<29,34>

ICH_AC_SYNC<29,34>
ICH_AC_RST#<29,34>

ICH_AC_SDOUT<29,34>

PHDD_LED#<33>

IDE_DIORDY

IDE_IRQ

3
2

1 2

R439
20K_0402_5%

J1 JOPEN

C271

1U_0402_6.3V4Z

1 2

R215 33_0402_5%
R210 33_0402_5%

R206 33_0402_5%

PHDD_LED# P_HDD_LED#

SATA_DTX_C_IRX_N2<21>
SATA_DTX_C_IRX_P2<21>

R209 24.9_0402_1%

4

C269

12P_0402_50V8J

12

Y3

4

OUT

NC
NC

12P_0402_50V8J

C270

1

IN

12

12

C224

10P_0402_50V8J@

1 2

12

1 2

ICH_AC_SDIN0<29>
ICH_AC_SDIN1<34>

12

1 2

R514 33_0402_5%

CLK_PCIE_SATA#<14>
CLK_PCIE_SATA<14>

1 2

IDE_DIORDY<21>

IDE_IRQ<21>
IDE_DDACK#<21>
IDE_DIOW#<21>
IDE_DIOR#<21>

ICH_RTCX1

12

R246

10M_0402_5%

ICH_RTCX2

ICH_RTCRST#

INTRUDER#

R207
10_0402_5%@

12

AC97_BITCLK
AC97_SYNC_R

AC97_RST_R#
AC_SDIN0

AC97_SDOUT_R

SATA_DTX_IRX_N0
SATA_DTX_IRX_P0
SATA_ITX_DRX_N0
SATA_ITX_DRX_P0

SATA_DTX_C_IRX_N2
SATA_DTX_C_IRX_P2
SATA_ITX_DRX_N2
SATA_ITX_DRX_P2

CLK_PCIE_SATA#
CLK_PCIE_SATA

SATARBIAS

IDE_DIORDY
IDE_IRQ
IDE_DDACK#
IDE_DIOW#
IDE_DIOR#

AA2
AA3

AA5

D12
B12
D11
F13

F12
B11
E12

E11
C13

C12
C11
E13

C10

A10
F11

F10
B10

AC19

AE3
AD3

AG2

AF2

AD7
AC7

AF6

AG6
AC2

AC1

AG11

AF11

AF16
AB16
AB15
AC14
AE16

Y1
Y2

B9

C9

U17A

RTCX1
RTCX2

RTCRST#
INTRUDER#

INTVRMEN

EE_CS
EE_SHCLK
EE_DOUT
EE_DIN

LAN_CLK
LAN_RSTSYNC
LANRXD[0]

LANRXD[1]
LANRXD[2]

LANTXD[0]
LANTXD[1]
LANTXD[2]

ACZ_BIT_CLK
ACZ_SYNC

ACZ_RST#
ACZ_SDIN[0]

ACZ_SDIN[1]
ACZ_SDIN[2]

ACZ_SDO

SATALED#

SATA[0]RXN
SATA[0]RXP
SATA[0]TXN
SATA[0]TXP

SATA[2]RXN
SATA[2]RXP
SATA[2]TXN
SATA[2]TXP

SATA_CLKN
SATA_CLKP

SATARBIAS#
SATARBIAS

IORDY
IDEIRQ
DDACK#
DIOW#
DIOR#

ICH6_BGA609

3

RTC

LAD[0]/FWH[0]
LAD[1]/FWH[1]
LAD[2]/FWH[2]
LAD[3]/FWH[3]

LPC

LDRQ[0]#

LDRQ[1]#/GPI[41]

LFRAME#/FWH[4]

A20GATE

A20M#

LAN

CPUSLP#

CPU

DPRSLP#/TP[4]

DPSLP#/TP[2]

FERR#

CPUPWRGD/GPO[49]

IGNNE#

INIT3_3V#

INIT#
INTR

RCIN#

SMI#

STPCLK#

THRMTRIP#

DA[0]
DA[1]
DA[2]

DCS1#
DCS3#

SATAAC-97/AZALIA

DD[0]
DD[1]
DD[2]
DD[3]

PIDE

DD[4]
DD[5]
DD[6]
DD[7]
DD[8]

DD[9]
DD[10]
DD[11]
DD[12]
DD[13]
DD[14]
DD[15]

DDREQ

NMI

LPC_LAD0

P2

LPC_LAD1

N3

LPC_LAD2

N5

LPC_LAD3

N4
N6

LPC_DRQ#1

P4

LPC_FRAME#

P3

EC_GA20

AF22

H_A20M#

AF23

R520 0_0402_5% @

AE27
AE24

AD27
AF24
AG25
AG26

AE22
AF27
AG24

AD23
AF25

AG27
AE26
AE23

AC16
AB17
AC17

AD16
AE17

AD14
AF15
AF14
AD12
AE14
AC11
AD11
AB11
AE13
AF13
AB12
AB13
AC13
AE15
AG15
AD13

AB14

1 2

R180 0_0402_5%@

1 2

R696 56_0402_5%

1 2

H_PWRGOOD
H_IGNNE#
H_INIT#

H_INTR

KB_RST#
H_NMI

H_SMI#
H_STPCLK#
THRMTRIP#

IDE_DA0
IDE_DA1
IDE_DA2

IDE_DCS1#
IDE_DCS3#

IDE_DD0
IDE_DD1
IDE_DD2
IDE_DD3
IDE_DD4
IDE_DD5
IDE_DD6
IDE_DD7
IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15

IDE_DDREQ

LPC_AD0 <32,33>
LPC_AD1 <32,33>
LPC_AD2 <32,33>
LPC_AD3 <32,33>

LPC_DRQ#1 <32>

LPC_FRAME# <32,33>

R190 10K_0402_5%

IDE_DA[0..2] <21>

IDE_DCS1# <21>
IDE_DCS3# <21>

IDE_DD[0..15] <21>

IDE_DDREQ <21>

1 2

H_CPUSLP#
H_DPRSTP#

H_FERR#

R188

10K_0402_5%

1 2

EC_GA20 <33>
H_A20M# <4>

H_DPSLP# <4>

H_PWRGOOD <4>
H_IGNNE# <4>
H_INIT# <4>

H_INTR <4>

EC_KBRST# <33>

H_NMI <4>
H_SMI# <4>

H_STPCLK# <4>

2

+3VS

+3VS

H_CPUSLP# <4,6>

H_DPRSTP# <4>

H_FERR# <4>

+1.05VS

+1.05VS

H_FERR#
H_DPRSTP#

R181

330_0402_5%@

1 2

1 2

R182 75_0402_1%

2

B

1

1 2

R186 56_0402_5%

1 2

R176 56_0402_5%@

MAINPWON <42,45,49>

1

C

Q22

2SC2411K_SC59@

E

3

12

R187
56_0402_5%

H_THERMTRIP#

+1.05VS

THRMTRIP#

H_THERMTRIP# <4,6>

Place near ICH6 side.

SATA_DTX_IRX_N0

SATA_DTX_IRX_P0 SATA_DTX_C_IRX_P0

SATA_ITX_DRX_N0

SATA_ITX_DRX_P0 SATA_ITX_C_DRX_P0

A A

SATA_ITX_DRX_N2

SATA_ITX_DRX_P2 SATA_ITX_C_DRX_P2

5

C845 0.01U_0402_16V7K@

C846 0.01U_0402_16V7K@

C256 0.01U_0402_16V7K@

C257 0.01U_0402_16V7K @

C847 0.01U_0402_16V7K

C848 0.01U_0402_16V7K

SATA_DTX_C_IRX_N0

12

12

SATA_ITX_C_DRX_N0

12

12

SATA_ITX_C_DRX_N2

12

12

SATA_DTX_C_IRX_N0 <36>

SATA_DTX_C_IRX_P0 <36>

SATA_ITX_C_DRX_N0 <36>

SATA_ITX_C_DRX_P0 <36>

SATA_ITX_C_DRX_N2 <21>

SATA_ITX_C_DRX_P2 <21>

4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

ICH6(2/4)

EDL00 LA-2601

18 51Monday, November 15, 2004

1

of

0.1

5

4

3

2

1

+3VALW

1 2

R259 10K_0402_5%

1 2

R257 10K_0402_5%

1 2

R464 2.2K_0402_5%

1 2

D D

C C

B B

R465 2.2K_0402_5%

1 2

R260 10K_0402_5%

1 2

R255 10K_0402_5%

1 2

R256 10K_0402_5%

1 2

R249 8.2K_0402_5%

1 2

R258 1K_0402_5%

1 2

R261 10K_0402_5%

+3VS

1 2

R197 10K_0402_5%

1 2

R196 8.2K_0402_5%

1 2

R193 10K_0402_5%

1 2

R195 10K_0402_5%

1 2

R198 10K_0402_5%

1 2

R60 10K_0402_5%

1 2

R248 10K_0402_5%

1 2

R262 10K_0402_5%

RP85

4 5
3 6
2 7
1 8

100_1206_8P4R_5%

1 2

R705 100K_0402_5%

ICH_SMLINK0
ICH_SMLINK1
CK_SCLK
CK_SDATA
LINKALERT#
EC_LID_OUT#
EC_SWI#
PM_BATLOW#
PE_WAKE#
SYSRST#

ICH_GPI7
PM_CLKRUN#
ICH_VGATE
MCH_SYNC#
SERIRQ
LID_OUT#

SYS_PWROK
EC_RSMRST#

GPI29
GPI28
GPI27
GPI26

PM_DPRSLPVR

EC_SWI#<33>

CK_SCLK<14>

CK_SDATA<14>

SB_SPKR<29>

SUS_STAT#<35>

EZ_PE_REQ2#<33,38>

EC_LID_OUT#<33>

D39

RB751V_SOD323

D35

RB751V_SOD323

21

21

SB_INT_FLASH_SEL#<35>

PE_WAKE#

PM_DPRSLPVR<48>

PM_BMBUSY#<6>

EC_SMI#<33>

ACIN<33,42,45>

EC_SCI#<33>

PM_STP_PCI#<14>

PM_STP_CPU#<14,48>

PLTRST_VGA#<16>

IDE_HRESET#<21>

SATA_DET#<36>

EC_FLASH#<35>
PM_CLKRUN#<25,26,28,32,33>
CD_DK_ON<21>

SIDE_RSET#<21>

R676 0_0402_5%

SERIRQ<23,32,33>

EC_THERM#<33>

VGATE<6,14,48>

RTC_CLK<33>

PM_SLP_S3#<33>

SYS_PWROK<39>

PBTN_OUT#<33>

PLT_RST#<6,17,21,32,33>

EC_RSMRST#<33>

EC_SWI#
GPI26

GPI27
GPI28
GPI29

CK_SCLK
CK_SDATA
LINKALERT#
ICH_SMLINK0
ICH_SMLINK1
MCH_SYNC#
SB_SPKR

SYSRST#
PM_BMBUSY#
ICH_GPI7

EC_SMI#
ACIN
LID_OUT#

EC_SCI#
PM_STP_PCI#

PLTRST_VGA#
IDE_HRESET#

SATA_DET#
EC_FLASH#
PM_CLKRUN#
CD_DK_ON
SIDE_RSET#

12

SERIRQ
EC_THERM#

ICH_VGATE

12

R194 0_0402_5%

CLK_14M_ICH
CLK_48M_ICH
RTC_CLK
SLP_S3#

SLP_S4#
SLP_S5#

SYS_PWROK
PM_DPRSLPVR
PM_BATLOW#
PBTN_OUT#
PLT_RST#
EC_RSMRST#

U17C

T2

RI#

AF17

SATA[0]GP/GPI[26]

AE18

SATA[1]GP/GPI[29]

AF18

SATA[2]GP/GPI[30]

AG18

SATA[3]GP/GPI[31]

Y4

SMBCLK

W5

SMBDATA

Y5

LINKALERT#

W4

SMLINK[0]

U6

SMLINK[1]

AG21

MCH_SYNC#

F8

SPKR

W3

SUS_STAT#/LPCPD#

U2

SYS_RESET#

AD19

BM_BUSY#/GPI[6]

AE19

GPI[7]

R1

GPI[8]

W6

SMBALERT#/GPI[11]

M2

GPI[12]

R6

GPI[13]

AC21

STP_PCI#/GPO[18]

AB21

GPO[19]

AD22

STP_CPU#/GPO[20]

AD20

GPO[21]

AD21

GPO[23]

V3

GPIO[24]

P5

GPIO[25]

R3

GPIO[27]

T3

GPIO[28]

AF19

CLKRUN#/GPIO[32]

AF20

GPIO[33]

AC18

GPIO[34]

U5

WAKE#

AB20

SERIRQ

AC20

THRM#

AF21

VRMPWRGD

E10

CLK14

A27

CLK48

V6

SUSCLK

T4

SLP_S3#

T5

SLP_S4#

T6

SLP_S5#

AA1

PWROK

AE20

DPRSLPVR/TP[1]

V2

BATLOW#/TP[0]

U1

PWRBTN#

V5

LAN_RST#

Y3

RSMRST#

ICH6_BGA609

PERn[1]
PERp[1]

PETn[1]
PETp[1]

PERn[2]
PERp[2]

PETn[2]
PETp[2]

PERn[3]
PERp[3]

PETn[3]
PETp[3]

GPIO

PERn[4]
PERp[4]

PETn[4]

PCI-EXPRESSDIRECT MEDIA INTERFACE

PETp[4]

DMI[0]RXN
DMI[0]RXP
DMI[0]TXN
DMI[0]TXP

DMI[1]RXN
DMI[1]RXP
DMI[1]TXN
DMI[1]TXP

DMI[2]RXN
DMI[2]RXP
DMI[2]TXN
DMI[2]TXP

DMI[3]RXN
DMI[3]RXP
DMI[3]TXN
DMI[3]TXP

DMI_CLKN

DMI_CLKP

DMI_ZCOMP
DMI_IRCOMP
OC[4]#/GPI[9]

OC[5]#/GPI[10]
OC[6]#/GPI[14]
OC[7]#/GPI[15]

OC[0]#
OC[1]#
OC[2]#
OC[3]#

USBP[0]N
USBP[0]P
USBP[1]N

CLOCK

USBP[1]P
USBP[2]N
USBP[2]P
USBP[3]N
USBP[3]P

USB

USBP[4]N
USBP[4]P
USBP[5]N
USBP[5]P
USBP[6]N
USBP[6]P
USBP[7]N

POWER MGT

USBP[7]P

USBRBIAS#

USBRBIAS

H25
H24
G27
G26

K25
K24
J27
J26

M25
M24
L27
L26

P24
P23
N27
N26

T25
T24
R27
R26

V25
V24
U27
U26

Y25
Y24
W27
W26

AB24
AB23
AA27
AA26

AD25
AC25

F24
F23
C23

D23
C25
C24

C27
B27
B26
C26

C21
D21
A20
B20
D19
C19
A18
B18
E17
D17
B16
A16
C15
D15
A14
B14

A22
B22

EZ_PCIE_RXN1
EZ_PCIE_RXP1

EZ_PCIE_C_TXP1
EZ_PCIE_RXN2

EZ_PCIE_RXP2
EZ_PCIE_C_TXP2

DMI_MTX_IRX_N0
DMI_MTX_IRX_P0
DMI_ITX_MRX_N0
DMI_ITX_MRX_P0

DMI_MTX_IRX_N1
DMI_MTX_IRX_P1
DMI_ITX_MRX_N1
DMI_ITX_MRX_P1

DMI_MTX_IRX_N2
DMI_MTX_IRX_P2
DMI_ITX_MRX_N2
DMI_ITX_MRX_P2PM_STP_CPU#

DMI_MTX_IRX_N3
DMI_MTX_IRX_P3
DMI_ITX_MRX_N3
DMI_ITX_MRX_P3

CLK_PCIE_ICH#
CLK_PCIE_ICH

DMI_IRCOMP
USB_OC#4

USB_OC#5
USB_OC#6
USB_OC#7

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3

USB20_N0
USB20_P0

USB20_N2
USB20_P2

USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6

USBRBIAS

C791 0.1U_0402_16V4Z1@

1 2

1 2

C792 0.1U_0402_16V4Z1@

C793 0.1U_0402_16V4Z1@

1 2

1 2

C794 0.1U_0402_16V4Z1@

DMI_MTX_IRX_N0 <6>
DMI_MTX_IRX_P0 <6>
DMI_ITX_MRX_N0 <6>
DMI_ITX_MRX_P0 <6>

DMI_MTX_IRX_N1 <6>
DMI_MTX_IRX_P1 <6>
DMI_ITX_MRX_N1 <6>
DMI_ITX_MRX_P1 <6>

DMI_MTX_IRX_N2 <6>
DMI_MTX_IRX_P2 <6>
DMI_ITX_MRX_N2 <6>
DMI_ITX_MRX_P2 <6>

DMI_MTX_IRX_N3 <6>
DMI_MTX_IRX_P3 <6>
DMI_ITX_MRX_N3 <6>
DMI_ITX_MRX_P3 <6>

CLK_PCIE_ICH# <14>
CLK_PCIE_ICH <14>

R472 24.9_0402_1%

1 2

USB_OC#4 <37>
USB_OC#6 <37>

USB_OC#0 <37>
USB_OC#2 <37>

USB20_N0 <37>
USB20_P0 <37>

USB20_N2 <37>
USB20_P2 <37>

USB20_N4 <37>
USB20_P4 <37>
USB20_N5 <34>
USB20_P5 <34>
USB20_N6 <37>
USB20_P6 <37>

1 2

R189 22.6_0402_1%

+1.5VS

EZ_PCIE_TXN1EZ_PCIE_C_TXN1
EZ_PCIE_TXP1

EZ_PCIE_TXN2EZ_PCIE_C_TXN2
EZ_PCIE_TXP2

USB_OC#5
USB_OC#4
USB_OC#6
USB_OC#7

USB_OC#3
USB_OC#0
USB_OC#1
USB_OC#2

EZ_PCIE_RXN1 <38>
EZ_PCIE_RXP1 <38>
EZ_PCIE_TXN1 <38>
EZ_PCIE_TXP1 <38>

EZ_PCIE_RXN2 <38>
EZ_PCIE_RXP2 <38>
EZ_PCIE_TXN2 <38>
EZ_PCIE_TXP2 <38>

RP83

4 5
3 6
2 7
1 8

10K_1206_8P4R_5%

RP82

4 5
3 6
2 7
1 8

10K_1206_8P4R_5%

+3VALW

+3VALW

U21

CLK_ICH_48M<14> CLK_ICH_14M<14>

CLK_48M_ICH

12

A A

R470

10_0402_5%@

1

C559

10P_0402_50V8J@

2

5

CLK_14M_ICH

12

R218

10_0402_5%@

1

C235

10P_0402_50V8J@

2

4

PM_SLP_S5#<33>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

O

3

C275

0.1U_0402_16V4Z

1 2

5

SLP_S4#

1

P

IN1

SLP_S5#

2

IN2

G

3

SN74AHC1G08DCKR_SC70

Title

Size Document Number Rev

2

Date: Sheet

Compal Electronics, Inc.

ICH6(3/4)

EDL00 LA-2601

19 51Monday, November 15, 2004

1

0.1

of

5

Near PIN F27(C155),
P27(C154), AB27(C157)

+1.5VS

D D

+5VS

+3VS

21

C243

D10

RB751V_SOD323

2

1

0.1U_0402_16V4Z

ICH_V5REF_RUN

2

C237

1

R214

10_0402_5%

C C

1 2

1U_0603_10V4Z

C242

+1.5VS

1

+

2

220U_D2_4VM_R12

2

C233

0.1U_0402_16V4Z

1

Near PIN AG5

+1.5VS

+3VALW

+5VALW

B B

R191

10_0402_5%

+1.5VS

A A

21

D9

2

1

L15

RB751V_SOD323

ICH_V5REF_SUS

C213
1U_0603_10V4Z

1 2

CHB1608U301_0603

1 2

2

C568

0.1U_0402_16V4Z

1

R179

ICH6_VCCDMIPLL ICH6_VCCPLL

5

0.5_0603_1%

1 2

C195

0.1U_0402_16V4Z

Near PIN AG9

+3VS

0.1U_0402_16V4Z

1

2

2

1

C205

0.01U_0402_16V7K

Near PIN
AC27

C560

2

1

+3VALW

Near PIN A17

2

C193

1

0.1U_0402_16V4Z

2

1

2

1

Near PIN
E26, E27

4

2

2

C194

C561

1

1

0.1U_0402_16V4Z

C232

0.1U_0402_16V4Z

C234

0.1U_0402_16V4Z

ICH6_VCCPLL

+1.5VS

+3VS

+3VS

+3VALW

2

2

C221

1

1

0.1U_0402_16V4Z

4

AA22
AA23
AA24
AA25
AB25
AB26
AB27

0.1U_0402_16V4Z

AC27

AG10

C229

0.1U_0402_16V4Z

U17E

VCC1_5[1]
VCC1_5[2]
VCC1_5[3]
VCC1_5[4]
VCC1_5[5]
VCC1_5[6]
VCC1_5[7]

F25

VCC1_5[8]

F26

VCC1_5[9]

F27

VCC1_5[10]

G22

VCC1_5[11]

G23

VCC1_5[12]

G24

VCC1_5[13]

G25

VCC1_5[14]

H21

VCC1_5[15]

H22

VCC1_5[16]

J21

VCC1_5[17]

J22

VCC1_5[18]

K21

VCC1_5[19]

K22

VCC1_5[20]

L21

VCC1_5[21]

L22

VCC1_5[22]

M21

VCC1_5[23]

M22

VCC1_5[24]

N21

VCC1_5[25]

N22

VCC1_5[26]

N23

VCC1_5[27]

N24

VCC1_5[28]

N25

VCC1_5[29]

P21

VCC1_5[30]

P25

VCC1_5[31]

P26

VCC1_5[32]

P27

VCC1_5[33]

R21

VCC1_5[34]

R22

VCC1_5[35]

T21

VCC1_5[36]

T22

VCC1_5[37]

U21

VCC1_5[38]

U22

VCC1_5[39]

V21

VCC1_5[40]

V22

VCC1_5[41]

W21

VCC1_5[42]

W22

VCC1_5[43]

Y21

VCC1_5[44]

Y22

VCC1_5[45]

AA6

VCC1_5[46]

AB4

VCC1_5[47]

AB5

VCC1_5[48]

AB6

VCC1_5[49]

AC4

VCC1_5[50]

AD4

VCC1_5[51]

AE4

VCC1_5[52]

AE5

VCC1_5[53]

AF5

VCC1_5[54]

AG5

VCC1_5[55]

AA7

VCC1_5[56]

AA8

VCC1_5[57]

AA9

VCC1_5[58]

AB8

VCC1_5[59]

AC8

VCC1_5[60]

AD8

VCC1_5[61]

AE8

VCC1_5[62]

AE9

VCC1_5[63]

AF9

VCC1_5[64]

AG9

VCC1_5[65]
VCCDMIPLL

E26

VCC3_3[1]

AE1

VCCSATAPLL
VCC3_3[22]

A13

VCCLAN3_3/VCCSUS3_3[1]

F14

VCCLAN3_3/VCCSUS3_3[2]

G13

VCCLAN3_3/VCCSUS3_3[3]

G14

VCCLAN3_3/VCCSUS3_3[4]

A11

VCCSUS3_3[1]

U4

VCCSUS3_3[2]

V1

VCCSUS3_3[3]

V7

VCCSUS3_3[4]

W2

VCCSUS3_3[5]

Y7

VCCSUS3_3[6]

A17

VCCSUS3_3[7]

B17

VCCSUS3_3[8]

C17

VCCSUS3_3[9]

F18

VCCSUS3_3[10]

G17

VCCSUS3_3[11]

G18

VCCSUS3_3[12]

ICH6_BGA609

COREIDE

PCIE

PCIUSB

VCCSUS1_5[3]
VCCSUS1_5[2]

VCCSUS1_5[1]

SATA

USB CORE

PCI/IDE RBP

V5REF_SUS

VCCUSBPLL

VCCSUS3_3[20]

VCCLAN1_5/VCCSUS1_5[2]
VCCLAN1_5/VCCSUS1_5[1]

V_CPU_IO[3]
V_CPU_IO[2]
V_CPU_IO[1]

VCCSUS3_3[19]
VCCSUS3_3[18]
VCCSUS3_3[17]
VCCSUS3_3[16]
VCCSUS3_3[15]
VCCSUS3_3[14]
VCCSUS3_3[13]

3

VCC1_5[98]
VCC1_5[97]
VCC1_5[96]
VCC1_5[95]
VCC1_5[94]
VCC1_5[93]
VCC1_5[92]
VCC1_5[91]
VCC1_5[90]
VCC1_5[89]
VCC1_5[88]
VCC1_5[87]
VCC1_5[86]
VCC1_5[85]
VCC1_5[84]
VCC1_5[83]
VCC1_5[82]
VCC1_5[81]
VCC1_5[80]
VCC1_5[79]

VCC3_3[21]
VCC3_3[20]
VCC3_3[19]
VCC3_3[18]
VCC3_3[17]
VCC3_3[16]
VCC3_3[15]
VCC3_3[14]
VCC3_3[13]
VCC3_3[12]

VCC3_3[11]
VCC3_3[10]

VCC3_3[9]
VCC3_3[8]
VCC3_3[7]
VCC3_3[6]
VCC3_3[5]
VCC3_3[4]
VCC3_3[3]
VCC3_3[2]

VCC1_5[78]
VCC1_5[77]
VCC1_5[76]
VCC1_5[75]
VCC1_5[74]
VCC1_5[73]
VCC1_5[72]
VCC1_5[71]
VCC1_5[70]
VCC1_5[69]
VCC1_5[68]

VCC1_5[67]

VCC2_5[4]
VCC2_5[2]

V5REF[2]
V5REF[1]

VCCRTC

F9
U17
U16
U14
U12
U11
T17
T11
P17
P11
M17
M11
L17
L16
L14
L12
L11
AA21
AA20
AA19

AA10
AG19
AG16
AG13
AD17
AC15
AA17
AA15
AA14
AA12

P1
M7
L7
L4
J7
H7
H1
E4
B1
A6

U7
R7

G19
G20

F20
E24
E23
E22
E21
E20
D27
D26
D25
D24

G8
AB18

P7
AA18

A8
F21
A25

A24
AB3
G11

G10
AG23

AD26
AB22

G16
G15
F16
F15
E16
D16
C16

+1.5VS

0.1U_0402_16V4Z

ICH_V5REF_RUN

ICH_V5REF_SUS

+RTCVCC

C277

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C223

2

C240

1

0.1U_0402_16V4Z

2

1

+1.5VS

+1.5VS
+3VALW

+RTCVCC

+1.5VS

+1.05VS

2

C212

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

C569

2

C226

1

2

1

C278

+3VS

Near PIN
AG13, AG16

2

C266

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C571

+2.5VS

Near PIN AB18

Near PIN AG23

2

1

+3VS

C265

Near PIN

0.1U_0402_16V4Z

A2-A6, D1-H1

2

1

2

1

+1.5VALW

2

C570

1

0.1U_0402_16V4Z

C572

0.1U_0402_16V4Z

2

+1.5VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.01U_0402_16V7K

Near PIN A25

0.01U_0402_16V7K

Near PIN AA19

+3VALW

C574

0.1U_0402_16V4Z

1 2

C573

0.1U_0402_16V4Z

1 2

C267

0.1U_0402_16V4Z

1 2

C210

0.1U_0402_16V4Z

1 2

Near PIN A24

+3VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Near PIN AG10

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

1

C204

1 2

C562

1 2

C199

1 2

C564

1 2

C201

1 2

C200

1 2

C203

1 2

C202

1 2

C567

1 2

C565

1 2

C563

1 2

C566

1 2

C228

1 2

C230

1 2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

U17D

E27

VSS[172]

Y6

VSS[171]

Y27

VSS[170]

Y26

VSS[169]

Y23

VSS[168]

W7

VSS[167]

W25

VSS[166]

W24

VSS[165]

W23

VSS[164]

W1

VSS[163]

V4

VSS[162]

V27

VSS[161]

V26

VSS[160]

V23

VSS[159]

U25

VSS[158]

U24

VSS[157]

U23

VSS[156]

U15

VSS[155]

U13

VSS[154]

T7

VSS[153]

T27

VSS[152]

T26

VSS[151]

T23

VSS[150]

T16

VSS[149]

T15

VSS[148]

T14

VSS[147]

T13

VSS[146]

T12

VSS[145]

T1

VSS[144]

R4

VSS[143]

R25

VSS[142]

R24

VSS[141]

R23

VSS[140]

R17

VSS[139]

R16

VSS[138]

R15

VSS[137]

R14

VSS[136]

R13

VSS[135]

R12

VSS[134]

R11

VSS[133]

P22

VSS[132]

P16

VSS[131]

P15

VSS[130]

P14

VSS[129]

P13

VSS[128]

P12

VSS[127]

N7

VSS[126]

N17

VSS[125]

N16

VSS[124]

N15

VSS[123]

N14

VSS[122]

N13

VSS[121]

N12

VSS[120]

N11

VSS[119]

N1

VSS[118]

M4

VSS[117]

M27

VSS[116]

M26

VSS[115]

M23

VSS[114]

M16

VSS[113]

M15

VSS[112]

M14

VSS[111]

M13

VSS[110]

M12

VSS[109]

L25

VSS[108]

L24

VSS[107]

L23

VSS[106]

L15

VSS[105]

L13

VSS[104]

K7

VSS[103]

K27

VSS[102]

K26

VSS[101]

K23

VSS[100]

K1

VSS[99]

J4

VSS[98]

J25

VSS[97]

J24

VSS[96]

J23

VSS[95]

H27

VSS[94]

H26

VSS[93]

H23

VSS[92]

G9

VSS[91]

G7

VSS[90]

G21

VSS[89]

G12

VSS[88]

G1

VSS[87]

ICH6_BGA609

ICH6(4/4)

EDL00 LA-2601

VSS[86]
VSS[85]
VSS[84]
VSS[83]
VSS[82]
VSS[81]
VSS[80]
VSS[79]
VSS[78]
VSS[77]
VSS[76]
VSS[75]
VSS[74]
VSS[73]
VSS[72]
VSS[71]
VSS[70]
VSS[69]
VSS[68]
VSS[67]
VSS[66]
VSS[65]
VSS[64]
VSS[63]
VSS[62]
VSS[61]
VSS[60]
VSS[59]
VSS[58]
VSS[57]
VSS[56]
VSS[55]
VSS[54]
VSS[53]
VSS[52]
VSS[51]
VSS[50]
VSS[49]
VSS[48]
VSS[47]
VSS[46]
VSS[45]
VSS[44]
VSS[43]
VSS[42]
VSS[41]

GROUND

VSS[40]
VSS[39]
VSS[38]
VSS[37]
VSS[36]
VSS[35]
VSS[34]
VSS[33]
VSS[32]
VSS[31]
VSS[30]
VSS[29]
VSS[28]
VSS[27]
VSS[26]
VSS[25]
VSS[24]
VSS[23]
VSS[22]
VSS[21]
VSS[20]
VSS[19]
VSS[18]
VSS[17]
VSS[16]
VSS[15]
VSS[14]
VSS[13]
VSS[12]
VSS[11]
VSS[10]

VSS[9]
VSS[8]
VSS[7]
VSS[6]
VSS[5]
VSS[4]
VSS[3]
VSS[2]
VSS[1]

20 51Monday, November 15, 2004

1

F4
F22
F19
F17
E25
E19
E18
E15
E14
D7
D22
D20
D18
D14
D13
D10
D1
C4
C22
C20
C18
C14
B25
B24
B23
B21
B19
B15
B13
AG7
AG3
AG22
AG20
AG17
AG14
AG12
AG1
AF7
AF3
AF26
AF12
AF10
AF1
AE7
AE6
AE25
AE21
AE2
AE12
AE11
AE10
AD6
AD24
AD2
AD18
AD15
AD10
AD1
AC6
AC3
AC26
AC24
AC23
AC22
AC12
AC10
AB9
AB7
AB2
AB19
AB10
AB1
AA4
AA16
AA13
AA11
A9
A7
A4
A26
A23
A21
A19
A15
A12
A1

0.1

of

5

4

3

2

1

HDD CONN

HOT CDROM CONN(DCL55)

D D

+5VMOD

+3VMOD

+1.8VMOD

CD_DK#<33>

SATA_DTX_C_IRX_P2<18>
SATA_DTX_C_IRX_N2<18>

SATA_ITX_C_DRX_P2<18>
SATA_ITX_C_DRX_N2<18>

C C

+5VALW

B B

A A

1 2

R686 240K_0402_5%1@

C849 1U_0805_25V4Z1@

CDR_PSWITCH

CD_DK#
CD_RESET#

SATA_DTX_C_IRX_P2
SATA_DTX_C_IRX_N2

SATA_ITX_C_DRX_P2
SATA_ITX_C_DRX_N2

12

2

22K

+5VS

R687 10K_0402_5%1@

+12VALW

13

22K

CD_DK_ON<19>

R702

100K_0402_5%1@

1@

DTC124EK_SOT23

JP49

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50

FOXCONNQL11253-A606

Q63
AOS 3401_SOT23

2

CDR_PSWITCH

12

DTC124EK_SOT231@

1000P_0402_50V7K

1@

C861

R703

200K_0402_5%1@

Q56

+5VS

IDE_DCS3#<18>

+5VMOD

13

2

C850
10U_1206_16V4Z1@

1

13

22K

2

22K

Q64

+3VS

13

D

2

G

S

C852

1@

0.1U_0402_16V4Z

+1.8VS

13

D

2

1@

G

S

1

2

1

2

Q65
SI2302DS_SOT231@

+3VMOD

1@

1

2

Q66

SI2302DS_SOT23

+1.8VMOD

C865

0.1U_0402_16V4Z 1@

C862

0.1U_0402_16V4Z1@

C853

4.7U_0805_10V4Z

C863

0.1U_0402_16V4Z1@

IDE_DD[0..15]<18>

IDE_DA[0..2]<18>

80mils 80mils

IDE_DCS3#

IDE_DA2
PDIAG#

IDE_CSEL

12

R637 470_0402_5%

IDE_DD15
IDE_DD14
IDE_DD13
IDE_DD12
IDE_DD11
IDE_DD10
IDE_DD9
IDE_DD8

SUYIN_200138FR044G272ZU_44P

SIDE_RSET#<19>

R688

INT_CD_L<29>
CD_AGND<29>

+5VS

+5VS

12

R639 @470_0402_5%

IDE_DD[0..15]
IDE_DA[0..2]

JP36

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44

IDE_LED#
IDE_DCS1#
IDE_DA0
IDE_DA1
IDE_IRQ
IDE_DDACK#
IDE_DIORDY
IDE_DIOR#
IDE_DIOW#
IDE_DDREQ

IDE_DD0
IDE_DD1
IDE_DD2
IDE_DD3
IDE_DD4
IDE_DD5
IDE_DD6
IDE_DD7
IDE_RESET#

+3VS

5

C851

1
2

1

2

B
A

3

0.1U_0402_16V4Z

1@

+3VMOD

1 2

10K_0402_5%1@

CDROM CONN

CDROM_L
CD_AGND
IDE_RESET#
IDE_DD7
IDE_DD6
IDE_DD5
IDE_DD4
IDE_DD3
IDE_DD2
IDE_DD1
IDE_DD0

IDE_DIOW#
IDE_DIORDY
IDE_IRQ
IDE_DA1
IDE_DA0 IDE_DA2
IDE_DCS1#
IDE_LED#

SD_CSEL

JP4

1

1

3

3

5

5

7

7

9

10

9

11

12

11

13

14

13

15

16

15

17

18

17

19

20

19

21

22

21

23

24

23

25

26

25

27

28

27

29

30

29

31

32

31

33

34

33

35

36

35

37

38

37

39

40

39

41

42

41

43

44

43

45

46

45

47

48

47

49

50

49

OCTEK_CDR-50DC1

2

2

4

4

6

6

8

8

10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

P

G

+5VS

U64

4

Y

1@

+5VS

12

R638
100K_0402_5%

IDE_DCS1# <18>

IDE_IRQ <18>
IDE_DDACK# <18>
IDE_DIORDY <18>
IDE_DIOR# <18>
IDE_DIOW # <18>
IDE_DDREQ <18>

CD_RESET#

TC7SH08FU_SSOP5

CDROM_R
IDE_DD8

IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15
IDE_DDREQ
IDE_DIOR#

IDE_DDACK#
PDIAG#
IDE_DCS3#

80mils

1 2

R640
@100K_0402_5%

IDE_LED# <33>

INT_CD_R <29>

+5VS

+5VS

IDE_HRESET#<19>

PLT_RST#<6,17,19,32,33>

+5VS

10U_0805_10V4Z

1

C751

2

+5VS

10U_0805_10V4Z

1

C746

2

IDE_HRESET#
PLT_RST#

C752

0.1U_0402_16V4Z

1

C747

2

1U_0603_10V4Z

0.1U_0402_16V4Z

1

C753

2

0.1U_0402_16V4Z

+3VS

1 2

5

U56

1

P

B

2

A

G

TC7SH08FU_SSOP5

3

1

2

1

C748

2

1000P_0402_50V7K

C750

0.1U_0402_16V4Z

IDE_RESET#

4

Y

1

C754

2

1000P_0402_50V7K

1

C749

2

C854

1@

0.1U_0402_16V4Z

5

4

C855

4.7U_0805_10V4Z

1@

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

HDD & CDROM Connector

1

0.1

21 51Monday, November 15, 2004

5

PI_PWR

R531 0_1206_5%@
R532 0_1206_5%

56

U61

0B1

D D

C C

DVI_TXD2-<16>
DVI_TXD2+<16>

DVI_TXD1-<16>
DVI_TXD1+<16>

DVI_TXD0-<16>
DVI_TXD0+<16>

DVI_TXC+<16>
DVI_TXC-<16>

DVI_DET<16>
DVI_SDATA<16>
DVI_SCLK<16>

DVI_TXD2­DVI_TXD2+

DVI_TXD1­DVI_TXD1+

DVI_TXD0­DVI_TXD0+

DVI_TXC+
DVI_TXC-

DOCKIN#

DVI_DET
DVI_SDATA
DVI_SCLK

2

A0

3

A1

7

A2

8

A3

11

A4

12

A5

14

A6

15

A7

17

SEL

19

LED0

20

LED1

54

LED2

5

NC

GND01GND16GND29GND313GND416GND521GND624GND728GND833GND939GND1044GND1149GND1253GND13

VDD04VDD110VDD218VDD327VDD438VDD550VDD6

0LED1
1LED1
2LED1

0LED2
1LED2
2LED2

1B1
2B1

3B1
4B1

5B1
6B1

7B1

0B2
1B2

2B2
3B2

4B2
5B2

6B2
7B2

PI3L500E_TQFN56~D

55

1 2
1 2

48
47

43
42

37
36

32
31

22
23
52

46
45

41
40

35
34

30
29

25
26
51

4

1@

D_DVI_TXD2­D_DVI_TXD2+

D_DVI_TXD1­D_DVI_TXD1+

D_DVI_TXD0­D_DVI_TXD0+

D_DVI_TXC+
D_DVI_TXC-

D_DVI_DET
D_DVI_SDATA
D_DVI_SCLK

M_DVI_TXD2­M_DVI_TXD2+

M_DVI_TXD1­M_DVI_TXD1+

M_DVI_TXD0­M_DVI_TXD0+

M_DVI_TXC+
M_DVI_TXC-

M_DVI_DET
M_DVI_SDATA
M_DVI_SCLK

+3VALW
+3VS

D_DVI_TXD2- <38>
D_DVI_TXD2+ <38>

D_DVI_TXD1- <38>
D_DVI_TXD1+ <38>

D_DVI_TXD0- <38>
D_DVI_TXD0+ <38>

D_DVI_TXC+ <38>
D_DVI_TXC- <38>

D_DVI_DET <38>
D_DVI_SDATA <38>
D_DVI_SCLK <38>

R650

4.7K_0402_5%

I2CB_SDA

I2CB_SLC

3

+DVI_VCC

12

4.7K_0402_5%

12

R651

Q10
BSS138_SOT23

+3VS

1 2

2

1 3

D

BSS138_SOT23

R652
0_0402_5%

G

S

1 3

D

Q11

2

G

S

R654

R653 6.8K_0402_5%

12

M_DVI_SDATA

M_DVI_SCLK

12

6.8K_0402_5%

+3VS

+3VS

+5VS

21

D37
RB411D_SOT23

0.1U_0402_16V4Z

1

C758

2

2

M_DVI_TXD0­M_DVI_TXD0+

M_DVI_TXD1-

M_DVI_TXD1+
M_DVI_TXD2-

M_DVI_TXD2+

M_DVI_TXC+
M_DVI_TXC-

+DVI_VCC

JP41

17

TMDS_DATA0-

18

TMDS_DATA0+

9

TMDS_DATA1-

10

TMDS_DATA1+

1

TMDS_DATA2-

2

TMDS_DATA2+

12

TMDS_DATA3-

13

TMDS_DATA3+

4

TMDS_DATA4-

5

TMDS_DATA4+

20

TMDS_DATA5-

21

TMDS_DATA5+

23

TMDS_Clock+

24

TMDS_Clock-

C1

Analog Red

C2

Analog Green

C3

Analog Blue

C4

Analog HSYNC

8

Analog VSYNC

TYCO_1470881-1

M_DVI_DET

SKS10-04AT_TSMA@

TMDS_DATA2/4 shield
TMDS_DATA1/3 shield
TMDS_DATA0/5 shield

TMDS_Clock shield

D38

1

+5V

DDC_CLOCK

DDC_DATA

Hot Plug Detect

Analog GND

Analog GND(C5)

GND

2 1

14

6

7

16

3
11
19
22

C5
C6

15

1 2

12

R649
100K_0603_5%

+DVI_VCC

I2CB_SLC

I2CB_SDA

R648

20K_0603_5%

1

B B

VCC

1B1
2B1
3B1
4B1

1B2
2B2
3B2
4B2

16
2

5
11
14

3
6
10
13

+5VS

D_TV_LUMA
D_TV_CRMA
D_TV_COMPS

D_TV_LUMA <38>
D_TV_CRMA <38>
D_TV_COMPS <38>

LUMA

CRMA

COMPS

12

12

R643

R432

R428

150_0402_5%

150_0402_5%

150_0402_5%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

U58

DOCKIN#<15,27,33,38>

5

1 2

R422 0_0402_5%PM@

1 2

R424 0_0402_5%GM@

1 2

R434 0_0402_5%PM@

1 2

R433 0_0402_5%GM@

1 2

R644 0_0402_5%PM@

1 2

R645 0_0402_5%GM@

VGA_TV_LUMA<16>
GMCH_TV_LUMA<8>
VGA_TV_CRMA<16>
GMCH_TV_CRMA<8>

VGA_TV_COMPS<16>
GMCH_TV_COMPS<8>

A A

DOCKIN#

1

SEL

15

OE#

4

1A

7

2A

9

3A

12

4A

8

GND

FSAV330MTC_TSSOP16

4

D25

@DAN217_SOT23

12

1

C518

2

270P_0402_50V7K

3

2

L27
FBM-11-160808-121T_0603

L28
FBM-11-160808-121T_0603

L41
FBM-11-160808-121T_0603

1

1

C506

C495

2

2

270P_0402_50V7K

270P_0402_50V7K

3

1 2

1 2

1 2

1

D2
@DAN217_SOT23

2

3

LUMA_L

CRMA_L
COMPS_L

1

1

C485

2

2

330P_0402_50V7K

330P_0402_50V7K

C44

1

2

1

C54

2

330P_0402_50V7K

2

D36
@DAN217_SOT23

3

JP10

1
2
3
4
5
6
7

S CONN._SUYIN

(CL55)

+3VS

Title

Size Document Number Rev

Date: Sheet

DVI_TXD2+
DVI_TXD2-

DVI_TXD1+
DVI_TXD1-

DVI_TXD0+
DVI_TXD0-

DVI_TXC­DVI_TXC+

DVI_DET

DVI_SDATA

Compal Electronics, Inc.

RP120

1 4
2 3

2@

1 4
2 3

2@

1 4
2 3

1 4
2 3

2@

R682

1 4
2 3

M_DVI_TXD2+
M_DVI_TXD2-

0_0404_4P2R_5%

RP121

M_DVI_TXD1+
M_DVI_TXD1-

0_0404_4P2R_5%

RP122

M_DVI_TXD0+
M_DVI_TXD0-

0_0404_4P2R_5%2@

RP123

M_DVI_TXC­M_DVI_TXC+

0_0404_4P2R_5%

12

0_0402_5%

2@

RP124

M_DVI_SDATA
M_DVI_SCLKDVI_SCLK

0_0404_4P2R_5%2@

M_DVI_DET

PATA / SATA HDD Connector

EDL00 LA-2601

22 51Monday, November 15, 2004

1

0.1

of

5

4

3

2

1

+3VS

1

2

+3VS

1

2

S1_WAIT# <24>
S1_INPACK# <24>

S1_WE# <24>

MSINS# <24>
XD_MS_PWREN# <24>
MSBS_XDD1 <24>
MSCLK_XDRE# <24>
MSD0_XDD2 <24>
MSD1_XDD6 <24>
MSD2_XDD5 <24>
MSD3_XDD3 <24>

C692

0.1U_0402_16V4Z

C696

0.1U_0402_16V4Z

S1_A16

1

C693

0.1U_0402_16V4Z

2

1

C697

0.1U_0402_16V4Z

2

10P_0402_50V8J

1

2

1

2

S1_CD1# S1_CD2#

1

C705

2

Close chip termenal

MSD0_XDD2
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3
MSBS_XDD1

R593 43K_0402_5%@
R596 43K_0402_5%
R598 43K_0402_5%@
R600 43K_0402_5%
R602 43K_0402_5%

C694

0.1U_0402_16V4Z

C698

0.1U_0402_16V4Z

10P_0402_50V8J

Closed to Pin A4Closed to Pin L12

1 2
1 2

@

1 2
1 2

@

1 2

@

2

C695

0.1U_0402_16V4Z

1

1

C699

0.1U_0402_16V4Z

2

1

C706

2

G1

F3

VCC2

VCC1

CAD31/D10

CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0

CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6

CAD19/A25

CAD18/A7
CAD17/A24
CAD16/A17

CAD14/A9

CAD13/IORD#

CAD12/A11

CAD11/OE#

CAD10/CE2#

CAD9/A10

CAD8/D15

CAD7/D7

CAD6/D13

CAD5/D6

CAD4/D12

CAD3/D5

CAD2/D11

CAD1/D4
CAD0/D3

CCBE2#/A12

CCBE1#/A8

CIRDY#/A15

CTRDY#/A22
CSTOP#/A20

CPERR#/A14

CPAR/A13

CGNT#/WE#

CCLK/A16

SPKROUT

CCD2#/CD2#
CCD1#/CD1#

CVS2/VS2#

CVS1/VS1

CRSV3/D2
CRSV2/A18
CRSV1/D14

MSINS#

SMBSY#

SMCD#

SMWP#

SMCE#

+S1_VCC
+3VS

B2
C3
B3
A3
C4
A6
D7
C7
A8
D8
A9
C9
A10
B10
D10
E12
F10
E13
F13
F11
G10
G11
G12
H12
H10
J11
J12
K13
J10
K10
K12
L13

B7
A11
E11
H13

B9
B11
A12
A13
B13
C12
C13
A5
D13
B8
C11
B12

C5
D5

D11
D6
M9

B5
A4

L12
D9
C6
A2
E10
J13

H7
J8
H8
E9
G9
H9
G8
F9

H6
J7
J6
J5

S1_A[0..25]
S1_D[0..15]

S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3

S1_REG#
S1_A12
S1_A8
S1_CE1#

S1_RST
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A14
S1_WAIT#
S1_A13
S1_INPACK#
S1_WE#

S1_BVD1
S1_WP

S1_A19
S1_RDY#
PCM_SPK#

S1_BVD2
S1_CD2#

S1_CD1#
S1_VS2
S1_VS1
S1_D2
S1_A18
S1_D14

XD_MS_PWREN#
MSBS_XDD1

MSD0_XDD2
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3

S1_A[0..25] <24>
S1_D[0..15] <24>

S1_IOWR# <24>
S1_IORD# <24>
S1_OE# <24>

S1_CE2# <24>

S1_REG# <24>

S1_CE1# <24>
S1_RST <24>

1 2

R584 33_0402_5%

S1_BVD1 <24>
S1_WP <24>

S1_RDY# <24>
PCM_SPK# <29>

S1_BVD2 <24>
S1_CD2# <24>

S1_CD1# <24>
S1_VS2 <24>
S1_VS1 <24>

1 2

R590 33_0402_5%

R603

2.2K_0402_5%

1 2

XDBSY# <24>
XDCD# <24>
XDWP# <24>
XDCE# <24>

VPPD0<24>
VPPD1<24>

VCCD0#<24>

CLK_PCI_PCM

12

@

R589

@

0_0805_5%

1 2

1 2

R591 0_0603_5%

1 2

R592 43K_0402_5%

1 2

R594 43K_0402_5%

1 2

R597 43K_0402_5%

1 2

R599 43K_0402_5%

1 2

R601 43K_0402_5%

+3VS

1 2

R604 43K_0402_5%

1 2

R605 43K_0402_5%@

1 2

R606 43K_0402_5%@

R583
10_0402_5%@

1

C704
18P_0402_50V8K

2

Close chip termenal

@

SD_PULLHIGH
SDCM_XDALE
SDDA0_XDD7
SDDA1_XDD0
SDDA2_XDCL
SDDA3_XDD4

SDCD#
SDWP
MSINS#

SM_CD#<24>

CARD_LED#<33>

R587

43K_0402_5%

+3VS +3VS

R588

1 2

1 2

10K_0402_5%

+3VS

PCI_AD[0..31]<17,25,26,28>

PCI_C/BE#3<17,25,26,28>
PCI_C/BE#2<17,25,26,28>
PCI_C/BE#1<17,25,26,28>
PCI_C/BE#0<17,25,26,28>

PCI_RST#<17,25,26,28,32,33>

PCI_FRAME#<17,25,26,28>

PCI_IRDY#<17,25,26,28>
PCI_TRDY#<17,25,26,28>

PCI_DEVSEL#<17,25,26,28>

PCI_STOP#<17,25,26,28>
PCI_PERR#<17,25,26,28>

PCI_SERR#<17,25,26,28>

PCI_PAR<17,25,26,28>
PCI_REQ#2<17>
PCI_GNT#2<17>

CLK_PCI_PCM<14>

PCI_PIRQA#<17>
PCI_PIRQB#<17>

SERIRQ<19,32,33>

SDOC#<24>

1 2

R585 10K_0402_5%

1 2

R586 100_0402_5%

D D

+VCC_5IN1

C C

B B

+VCC_5IN1

SDCD#<24>
SDWP<24>

R595 22_0402_5%

SDCK<24>
XDWE1#<24>

A A

R200

22_0402_5%

1 2
1 2

CLK_SD_48M<14>

SDPWREN#<24>

SDCM_XDALE<24>
SDDA0_XDD7<24>
SDDA1_XDD0<24>
SDDA2_XDCL<24>
SDDA3_XDD4<24>

VCCD1#<24>

PCI_AD[0..3 1]

PCI_AD31

C2

PCI_AD30

C1

PCI_AD29

D4

PCI_AD28

D2

PCI_AD27

D1

PCI_AD26

E4

PCI_AD25

E3

PCI_AD24

E2

PCI_AD23

F2

PCI_AD22

F1

PCI_AD21

G2

PCI_AD20

G3

PCI_AD19

H3

PCI_AD18

H4

PCI_AD17

J1

PCI_AD16

J2

PCI_AD15

N2

PCI_AD14

M3

PCI_AD13

N3

PCI_AD12

K4

PCI_AD11

M4

PCI_AD10

K5

PCI_AD9

L5

PCI_AD8

M5

PCI_AD7

K6

PCI_AD6

M6

PCI_AD5

N6

PCI_AD4

M7

PCI_AD3

N7

PCI_AD2

L7

PCI_AD1

K7

PCI_AD0

N8

E1

J3
N1
N5

PCI_RST#

G4

J4
K1
K3

L1

L2

L3
M1
M2

A1

PCI_RST#

N10
N11

M11

M10

B1
H1

L8

L11

F4
K8

N9
K9

L10

J9

E7
E8

F8
G7

H5
F6

E5
E6
F7
F5
G6

G5

CLK_PCI_PCM A16_CLK

3V_PCM_SUSP

PCM_IDPCI_AD20

PCI_PIRQA#
SD_PULLHIGH
PCI_PIRQB#

SDOC#

SDCD#
SDWP
SDPWREN#

SDCM_XDALE
SDDA0_XDD7
SDDA1_XDD0
SDDA2_XDCL
SDDA3_XDD4

N13

M13

U52

VCCD0#

VCCD1#

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

CBE3#
CBE2#
CBE1#
CBE0#

PCIRST#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
PAR
PCIREQ#
PCIGNT#
PCICLK

RIOUT#_PME#
SUSPEND#

IDSEL
MFUNC0

MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6
MFUNC7

GRST#

VCC_SD
SDCD#

SDWP/SMWPD#
SDPWREN33#

SDCLKI
SDCLK/SMWE#

SDCMD/SMALE
SDDAT0/SMDATA7
SDDAT1/SMDATA0
SDDAT2/SMCLE
SDDAT3/SMDATA4

GND_SD

IDSEL:
PCI_AD20

M12

VPPD1

N12

VPPD0

PCI Interface

B4

G13

A7

VCC10

VCCA1

VCCA2

SD/MMC/MS/SM

GND1D3GND2H2GND3L4GND4M8GND5

K11

K2

N4

L6

C8

L9

H11

D12

VCC3

VCC4

VCC5

VCC9

VCC6

VCC7

VCC8

CAD15/IOWR#

CCBE3#/REG#

CCBE0#/CE1#

CARDBUS

CRST#/RESET

CFRAME#/A23

CDEVSEL#/A21

CSERR#/WAIT#

CREQ#/INPACK#

CSTSCHG/BVD1_STSCHG#

CCLKRUN#/WP_IOIS16#

CBLOCK#/A19

CINT#/READY_IREQ#

CAUDIO/BVD2_SPKR#

MSPWREN#/SMPWREN#

MSBS/SMDATA1

MSCLK/SMRE#
MSDATA0/SMDATA2
MSDATA1/SMDATA6
MSDATA2/SMDATA5
MSDATA3/SMDATA3

GND6

GND7

GND8

CB714_LFBGA169

B6

F12

C10

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet

Compal Electron i cs, Inc.

PCMCIA Controller ENE CB714

Custom

EDL00 LA-2601

1

0.1

of

23 51Monday, November 15, 2004

PCMCIA Power Controller

10K_0402_5%

CardBus Socket

JP33

1

GND

2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

GND

D3

CD1#

D4

D11

D5

D12

D6

D13

D7

D14

CE1#

D15

A10

CE2#

OE#

VS1#

A11

IORD#

A9

IOWR#

A8

A17

A13

A18

A14

A19

WE#

A20

IREQ#

A21

VCC

VCC

VPP1

VPP2

A16

A22

A15

A23

A12

A24

A7

A25

A6

VS2#

A5

RESET

A4

WAIT#

A3

INPACK#

A2

REG#

A1

SPKR#

A0

STSCHG#

D0

D8

D1

D9

D2

D10

IOIS16#

CD2#

GND

GND

SUPER_AC4-3000-250-3_RT

35

S1_CD1#

36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68

S1_D11
S1_D12
S1_D13
S1_D14
S1_D15

S1_CE2#

S1_VS1
S1_IORD#
S1_IOWR#

S1_A17

S1_A18

S1_A19

S1_A20

S1_A21

S1_A22

S1_A23

S1_A24

S1_A25

S1_VS2

S1_RST

S1_WAIT#

S1_INPACK#

S1_REG#

S1_BVD2
S1_BVD1

S1_D8

S1_D9

S1_D10

S1_CD2#

S1_CD1# <23>

S1_CE2# <23>
S1_VS1 <23>
S1_IORD# <23>
S1_IOWR# <23>

+S1_VCC
+S1_VPP

S1_VS2 <23>
S1_RST <23>
S1_WAIT# <23>
S1_INPACK# <23>
S1_REG# <23>
S1_BVD2 <23>
S1_BVD1 <23>

S1_CD2# <23>

C715

C719

S1_A[0..25]
S1_D[0..15]

1

0.1U_0402_16V4Z

2

1

0.01U_0402_16V7K

2

+S1_VCC

C716

+S1_VPP

C720

S1_D3
S1_D4
S1_D5
S1_D6
S1_D7

+S1_VPP

S1_CE1#
S1_A10
S1_OE#
S1_A11
S1_A9
S1_A8
S1_A13
S1_A14
S1_WE#
S1_RDY#

S1_A16
S1_A15
S1_A12
S1_A7
S1_A6
S1_A5
S1_A4
S1_A3
S1_A2
S1_A1
S1_A0
S1_D0
S1_D1
S1_D2
S1_WP

S1_CE1#<23>
S1_OE#<23>

1

2

1

2

S1_WE#<23>

S1_RDY#<23>

+S1_VCC

S1_WP<23>

S1_A[0..25]<23>

S1_D[0..15]<23>

Close to
CardBus Conn.

10U_0805_10V4Z

4.7U_0805_10V4Z

+5VS

U53

9

+5VS

+3VS

12V

5

5V

6

5V

3

3.3V

4

3.3V
GND

7

1 2

C7090.1U_0402_16V4Z

C7130.1U_0402_16V4Z
C7144.7U_0805_10V4Z

C7170.1U_0402_16V4Z
C7184.7U_0805_10V4Z

R607

VCC
VCC
VCC

VPP

VCCD0
VCCD1

VPPD0
VPPD1

OC

SHDN

CP-2211_SSOP16

16

13
12
11

10

1
2
15
14

8

40mil

20mil

+S1_VCC

+S1_VPP

1 2

C707 0.1U_0402_16V4Z
C708 0.1U_0402_16V4Z

1 2

C710 10U_0805_10V4Z

1 2

C711 0.01U_0402_16V7K

1 2

C712 1U_0603_10V4Z

VCCD0# <23>
VCCD1# <23>
VPPD0 <23>
VPPD1 <23>

+3VS

1 2

R608 43K_0402_5%

XDCD#

@

XDCD# <23>

XDWP#<23>

XDWE1#<23>

SM_CD#<23>

+VCC_5IN1

1

C723
10U_0805_10V4Z

2

SDDA1_XDD0
MSBS_XDD1
MSD0_XDD2
MSD3_XDD3
SDDA3_XDD4
MSD2_XDD5
MSD1_XDD6
SDDA0_XDD7

XDWP#
SDWP
XDWE1#
SDCM_XDALE

SM_CD#

XDBSY#
MSCLK_XDRE#
XDCE#
XDCD#

SDDA2_XDCL

JP34

34

SM-D0

33

SM-D1 / XD-D1

32

SM-D2 / XD-D2

31

SM-D3 / XD-D3

21

SM-D4 / XD-D4

22

SM-D5 / XD-D5

23

SM-D6 / XD-D6

24

SM-D7 / XD-D7

35

SM_WP-IN / XD_WP-IN

43

SM-WP-SW

36

#SM_-WE / XD_-WE

37

#SM-ALE / XD-ALE

25

SM-LVD

3

SM-CD-SW

29

SM_-VCC / XD_-VCC

26

#SM_R/-B / XD_R/-B

27

#SM_-RE / XD_-RE

28

#SM_-CE / XD_-CE

30

#SM_-CD

2

SM-CD-COM

38

SM-CLE / XD-CLE

TAITN_R007-N3P-15-S

C724

0.1U_0402_16V4Z

5 IN 1 CONN

C725

0.1U_0402_16V4Z

SD-DAT3
SD-DAT2
SD-DAT1
SD-DAT0

SD-WP-SW

SD-CMD

SD_CLK
SD-VCC

SD-CD-SW

SD-CD-COM

MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3

MS-SCLK

MS-INS

MS-BS

MS-VCC
XD-VCC

XD-CD

GND
GND

C726

0.1U_0402_16V4Z

SD CLK

SDDA3_XDD4

11

SDDA2_XDCL

12

SDDA1_XDD0

6

SDDA0_XDD7

7

SDWP

5

SDCM_XDALE

10

SDCK

8
9
4

NC

42
41

15
14
16
18
19
17
13
20

40
39
1
44

SDCD#

MSD0_XDD2
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3
MSCLK_XDRE#
MSINS#
MSBS_XDD1

XDCD#

+VCC_5IN1

C727

0.1U_0402_16V4Z

SDDA3_XDD4 <23>

SDDA2_XDCL <23>

SDDA1_XDD0 <23>

SDDA0_XDD7 <23>

SDWP <23>

SDCM_XDALE <23>

+VCC_5IN1

SDCD# <23>

MSD0_XDD2 <23>
MSD1_XDD6 <23>
MSD2_XDD5 <23>
MSD3_XDD3 <23>
MSCLK_XDRE# <23>

MSINS# <23>
MSBS_XDD1 <23>

+VCC_5IN1
+VCC_5IN1

MS CLK

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MSCLK_XDRE#<23>

XD_MS_PWREN#<23>

SDCK<23>

10P_0402_50V8K@

@

10P_0402_50V8K

SDPWREN#<23>

@

0_0402_5%

@

0_0402_5%

10K_0402_5%

SDCK

12

R610

1

C721

2

MSCLK_XDRE#

12

R615

1

C722

2

SD PWR Control

+3VS +3VS

+3VS

R621

1 2

+VCC_5IN1

xD PU and PD. Close to Socket

1 2

R609 43K_0402_5%

1 2

R611 2.2K_0402_5%

1 2

R612 43K_0402_5%

1 2

R613 43K_0402_5%

Reserve for Debug.

S1_WP
S1_OE#
S1_RST
S1_CE1#
S1_CE2#

U54

1

GND

2

IN

3

IN

4

EN#

TPS2041ADR_SO8

Title

Size Document Number Rev

Custom

Date: Sheet

MSCLK_XDRE#
XDWE1#

XDCE# <23>

XDBSY#

+S1_VCC

12

R61443K_0402_5%

12

R61747K_0402_5%

12

R61847K_0402_5%

12

R61947K_0402_5%

12

R62047K_0402_5%

XDBSY# <23>

+VCC_5IN1

R622

OUT
OUT
OUT
OC#

8
7
6
5

10K_0402_5%

1 2

Compal Electron i cs, Inc.

PCMCIA Socket

EDL00 LA-2601

24 51Monday, November 15, 2004

SDOC# <23>

of

0.1

5

4

3

2

1

+3VS

1 2

4.7K_0402_5%

R623

1 2

10K_0402_5%

+3VS

D D

PCI_AD[0..31]<17,23,26,28>

C C

IDSEL:PCI_AD16

PCI_AD16

1 2

R630

B B

1394_IDSEL

100_0402_5%

PCI_C/BE#3<17,23,26,28>
PCI_C/BE#2<17,23,26,28>
PCI_C/BE#1<17,23,26,28>
PCI_C/BE#0<17,23,26,28>

CLK_PCI_1394<14>

PCI_GNT#0<17>
PCI_REQ#0<17>

PCI_FRAME#<17,23,26,28>

PCI_IRDY#<17,23,26,28>

PCI_TRDY#<17,23,26,28>

PCI_DEVSEL#<17,23,26,28>

PCI_STOP#<17,23,26,28>

PCI_PERR#<17,23,26,28>

PCI_PIRQE#<17>

1394_PME#<26,28,32,33>

PCI_SERR#<17,23,26,28>

PM_CLKRUN#<19,26,28,32,33>

PCI_RST#<17,23,26,28,32,33>

RP119

45
36
27
18

220_1206_8P4R_5%

1394_GPIO3
1394_GPIO2
1394_SCL
1394_SDA

PCI_AD[0..31]

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8

PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0

CLK_PCI_1394

PCI_GNT#0
PCI_REQ#0
1394_IDSEL

PCI_FRAME#

PCI_IRDY#
PCI_TRDY#

PCI_DEVSEL#

PCI_STOP#
PCI_PERR#
PCI_PIRQE#
1394_PME#
PCI_SERR#

PCI_PAR<17,23,26,28>

PCI_PAR
PCI_RST#

1394_GPIO3

1394_GPIO2

U55

TSB43AB21_PQFP128

84

PCI_AD0

82

PCI_AD1

81

PCI_AD2

80

PCI_AD3

79

PCI_AD4

77

PCI_AD5

76

PCI_AD6

74

PCI_AD7

71

PCI_AD8

70

PCI_AD9

69

PCI_AD10

67

PCI_AD11

66

PCI_AD12

65

PCI_AD13

63

PCI_AD14

61

PCI_AD15

46

PCI_AD16

45

PCI_AD17

43

PCI_AD18

42

PCI_AD19

41

PCI_AD20

40

PCI_AD21

38

PCI_AD22

37

PCI_AD23

32

PCI_AD24

31

PCI_AD25

29

PCI_AD26

28

PCI_AD27

26

PCI_AD28

25

PCI_AD29

24

PCI_AD30

22

PCI_AD31

34

PCI_C/BE3

47

PCI_C/BE2

60

PCI_C/BE1

73

PCI_C/BE0

16

PCI_CLK

18

PCI_GNT

19

PCI_REQ

36

PCI_IDSEL

49

PCI_FRAME

50

PCI_IRDY

52

PCI_TRDY

53

PCI_DEVSEL

54

PCI_STOP

56

PCI_PERR

13

PCI_INTA/CINT

21

PCI_PME/CSTSCHG

57

PCI_SERR

58

PCI_PAR

12

PCI_CLKRUN

85

PCI_RST

14

G_RST

89

GPIO3

90

GPIO2

VDDP20VDDP35VDDP48VDDP62VDDP

TSB43AB21
/(TSB43AB22)

PCI BUS INTERFACE

PLLGND18REG_EN9AGND

AGND

AGND

AGND

AGND

AGND

109

110

111

117

126

127

128

87

78

CYCLEIN

BIAS CURRENT

OSCILLATOR

FILTER

EEPROM 2 WIRE BUS

POWER CLASS

PHY PORT 1

AGND

DGND17DGND23REG1830DGND33DGND44DGND55DGND64DGND68DGND75DGND83REG1893DGND

R624

1 2

R625

1 2

R626
R627 4.7K_0402_5%

86

11

96

DVDD

CNA

DVDD

TEST1710TEST16

DVDD
DVDD
DVDD
DVDD
DVDD
DVDD

CYCLEOUT/CARDBUS

PLLVDD

AVDD
AVDD
AVDD
AVDD
AVDD

CPS

NC/(TPBIAS1)

NC/(TPA1+)
NC/(TPA1-)
NC/(TPB1+)
NC/(TPB1-)

FILTER0
FILTER1

SDA

TPBIAS0

TPA0+

TPA0­TPB0 +
TPB0 -

TEST9
TEST8

TEST3
TEST2
TEST1
TEST0

103

SCL
PC0

PC1
PC2

R0

R1
X0

X1

4.7K_0402_5%

4.7K_0402_5%

12

15
27
39
51
59
72
88
100
7
1
2
107
108
120

1 2

106

R628

125
124
123
122
121

1 2

118

R629

6.34K_0402_1%

119
6

5

C740

3

0.1U_0402_16V4Z

4

1394_SDA

92

1394_SCL

91
99

98
97

116
115
114
113
112

94
95

101
102
104
105

+1394_PLLVDD

1 2

+3VS

+3VS

1K_0402_5%

TPBIAS0
TPA0+
TPA0­TPB0+
TPB0-

0.01U_0402_16V7K

1

1

C736

C737

1 2

1 2

4.7U_0805_10V4Z

2

12

R631

56.2_0402_1%

12

R633

56.2_0402_1%

1

C742
220P_0402_50V7K

2

2

C738 22P_0402_50V8J

X5

24.576MHz_16P_3XG-24576-43E1

1 2

C739 22P_0402_50V8J

+3VS

1

2

+3VS

1

2

L39
BLM21A601SPT_0805

1 2

12

12

12

C728

0.1U_0402_16V4Z

C732
1000P_0402_50V7K

+3VS

R632

56.2_0402_1%

R634

56.2_0402_1%

R635

5.11K_0402_1%

1

C729

0.1U_0402_16V4Z

2

1

C733
1000P_0402_50V7K

2

1

C741

0.33U_0603_16V4Z

2

1

C730

0.1U_0402_16V4Z

2

1

C734
1000P_0402_50V7K

2

JP35

4 5
3

6
2
1

SUYIN8004A-04G5T

(CL56)

1

C731

0.1U_0402_16V4Z

2

1

C735
1000P_0402_50V7K

2

1

C743

A A

5

CLK_PCI_1394

12

@

1

2

R636
10_0402_5%

C745
10P_0402_50V8K@

4

0.1U_0402_16V4Z

2

1

C744

2

0.1U_0402_16V4Z

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Electronics, Inc.

Title

TI TSB43A B 2 1 A 1394A C ON TROLLER

Size Document Number Rev

Custom

2

Date: Sheet

25 51Monday, November 15, 2004

1

0.1

of

5

2

SI2301DS_SOT23

PCI_AD[0..31]

LAN_AUXPWR

27P_0402_50V8J

5

+3VALW

S

G

D

Q62

1 3

+3V_LAN

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0

CLK_PCI_LAN

1

C680

2

12

@

+3V_LAN

+3VS

J12

B8

A8
C7
C6

B6

B5

A5

B4

B2

B1
C1
D3
D2
D1

E3

K1

L2

L1
M3
M2
M1
N2
N3

P3
N4

P4
M5
N5

P5

P6
M7
N7

C4

F3

L3
M4

A4

F2

F1
G3
H3
H1

J2

A2

J1

A3

H2
C2

J3

C3

F4

A6

R551
0_1206_5%

1 2

L33 0_0603_5%

1 2

L34 0_0603_5%

U49A

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

CBE3
CBE2
CBE1
CBE0

IDSEL
FRAME
IRDY
TRDY
DEVSEL
STOP
PERR
SERR
PAR
PCI_CLK

INTA
PCI_RST
GNT
REQ

VAUXPRSNT
M66EN/(NC_F4)
PME

BCM5788M_FBGA196

10U_0805_10V4Z

2@

1@

BCM5788M

/(BCM4401)

EN_WOL# = Low,
System can wake on LAN
( keep Low when Power On)

EN_WOL#<33>

VGS(th) = -0.45V

D D

C C

B B

A A

IDmax = 2.3A

+3VS for BCM5788
+3V_LAN for BCM4401

PCI_AD[0..31]<17,23,25,28>

CLK_PCI_LAN

12

R552

@

10_0402_5%

1

C671
18P_0402_50V8K@

2

PCI_C/BE#3<17,23,25,28>
PCI_C/BE#2<17,23,25,28>
PCI_C/BE#1<17,23,25,28>
PCI_C/BE#0<17,23,25,28>

100_0402_5%

PCI_AD17 LAN_IDSEL

R555

1 2

PCI_FRAME#<17,23,25,28>

PCI_IRDY#<17,23,25,28>

PCI_TRDY#<17,23,25,28>

PCI_DEVSEL#<17,23,25,28>

PCI_STOP#<17,23,25,28>
PCI_PERR#<17,23,25,28>
PCI_SERR#<17,23,25,28>

PCI_PAR<17,23,25,28>

CLK_PCI_LAN<14>

PCI_PIRQF#<17>

PCI_RST#<17,23,25,28,32,33>

PCI_GNT#3<17>

PCI_REQ#3<17>

+3V_LAN

LAN_X1 LAN_X2

1

C679
27P_0402_50V8J

2

1 2

R559 1K_0402_5%

ONBD_LAN_PME#<25,28,32,33>

Y4

25MHZ_20P

4

+3V_LAN

1

C642

2

10U_0805_10V4Z

+3V_LOM_PCI

0.1U_0402_16V4Z

1

C656

2

10U_0805_10V4Z

REGSUP12/(NC_B9)

REGCTL12/(NC_B10)

REGSEN12/(REG18OUT)
REGSUP25/(REGSUP18)

REGCTL25/(NC_C11)

REGSEN25/(REGSUP18)

EEDATA/(SPROM_CS)

EECLK/(SPROM_CLK)

LINKLED/(LINKLED10)

SPD100LED/(LINKLED100)

SPD1000LED/(COL_LED)

TRAFFICLED/(ACT_LED)

PLLVDD2/(PLLVDD)

NC_E10/(EEDATA_PXE)

NC_E11/(EECLK_PXE)

4

80mils

0.1U_0402_16V4Z

1

C643

2

20mils

1

C657

2

0.1U_0402_16V4Z

TRD3+/(NC_E13)

TRD3-/(NC_E14)

TRD2+/(NC_D13)

TRD2-/(NC_D14)

TRD1+/(RDP)

TRD1-/(RDN)

TRD0+/(TDP)

TRD0-/(TDN)

VESD1
VESD2
VESD3

GPIO0/(NC_H12)
GPIO1/(NC_K13)

GPIO2/(NC_J13)

NC_P7

TCK

TDO
TMS

TRST

XTALVDD

XTALO

XTALI

NC_G11

NC_H11

BIASVDD

RDAC

NC_A10

NC_C9

1

1

C644

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C658

2

2

E13
E14
D13
D14
C13
C14
B13
B14

B9
B10
A9

B11
C11
C10

P1
G2
A1

P10
M10

H12
K13
J13

G13
H13
G12
G14

20mils

H14
P7

C12
D12

TDI

B12
A12
D11

J14
N10
N11

G11
E10
E11
H11

10mils

A14
D10

10mils

A10
C9

0.1U_0402_16V4Z

1

C645

2

1

C659

2

0.1U_0402_16V4Z

LAN_MDI3+
LAN_MDI3­LAN_MDI2+
LAN_MDI2­LAN_MDI1+
LAN_MDI1­LAN_MDI0+
LAN_MDI0-

LAN_CTRL_1.2V

LAN_CTRL_2.5V

LAN_EEDA
LAN_EECLK

LAN_EEWP

0.1U_0402_16V4Z

1

1

C646

C647

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C660

1 2

R553 10K_0402_5%

1

1

C661

2

2

0.1U_0402_16V4Z

LAN_MIDI3+ <27>
LAN_MIDI3- <27>
LAN_MIDI2+ <27>
LAN_MIDI2- <27>
LAN_MIDI1+ <27>
LAN_MIDI1- <27>
LAN_MIDI0+ <27>
LAN_MIDI0- <27>

(Output 3.3V for BCM4401)

+2.5V_LAN
+1.2V_LAN

(Output 1.8V for BCM4401)

+3V_LAN
+2.5V_LAN
+3V_LAN

C648

C662

+3V_LAN

unpop R554 when use BCM4401

R554 0_0402_5%

1 2

LAN_ACTIVITY#

+1.2V_LAN_PLLVDD

0.1U_0402_16V4Z
C672

LAN_TRST#

1 2

R556 4.7K_0402_5%

+2.5V_LAN

LAN_X1
LAN_X2_R

1 2

R558 200_0402_1%

1.24K for BCM5788

1.27K for BCM4401

+LAN_BIASVDD
LAN_RDAC

1 2

R560 1.24K_0402_1%

1 2

R563 10K_0402_5%

1 2

R564 10K_0402_5%@

LAN_ACTIVITY# <27>

+1.2V_LAN_PLLVDD

1 2

1

2

C676 1000P_0402_50V7K

L35

1

0_0603_5%

C673

4.7U_0805_10V4Z

2

LAN_X2

1 2

1 2

L38
0_0603_5%

@

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

LAN_CTRL_2.5V LAN_CTRL_1.2V

+3V_LAN

3

+1.2V_LAN

+3V_LOM_PCI

LAN_LINK# <27>

+1.2V_LAN

+2.5V_LAN

+3V_LAN

PM_CLKRUN#<19,25,28,32,33>

+2.5V_LAN

+3V_LAN

3

unpop when use BCM4401

1

Q60

1@

BCP69_SOT223

10U_0805_10V4Z

2
4

10U_0805_10V4Z

+1.2V_LAN

0.1U_0402_16V4Z

PM_CLKRUN#

1

C649

2

1

C663

2

0.1U_0402_16V4Z

1

C650

2

0.1U_0402_16V4Z

60mils

0.1U_0402_16V4Z

1

C664

2

U49B

E12

VDDC_E12

H5

VDDC_H5

H6

VDDC_H6

H7

VDDC_H7

H8

VDDC_H8

J5

VDDC_J5

J6

VDDC_J6

J7

VDDC_J7

J8

VDDC_J8

J9

VDDC_J9

J10

VDDC_J10

K5

VDDC_K5

K6

VDDC_K6

K7

VDDC_K7

K8

VDDC_K8

K9

VDDC_K9

K10

VDDC_K10

L5

VDDC_L5

L10

VDDC_L10

M14

VDDC_M14

N14

VDDC_N14

P8

VDDC_P8

P12

VDDC_P12

P13

VDDC_P13

P14

VDDC_P14

A7

VDDIO-PCI_A7

B3

VDDIO-PCI_B3

C5

VDDIO-PCI_C5

E1

VDDIO-PCI_E1

E4

VDDIO-PCI_E4

G1

VDDIO-PCI_G1

K3

VDDIO-PCI_K3

L4

VDDIO-PCI_L4

N6

VDDIO-PCI_N6

P2

VDDIO-PCI_P2

K14

VDDP_K14/(NC_K14)

L13

VDDP_L13/(NC_L13)

P11

VDDP_P11/(NC_P11)

A11

VDDIO_A11

F11

VDDIO_F11

K12

VDDIO_K12

L12

VDDIO_L12

C8

NC_C8

H4

CLKRUN

H10

NC_H10

J4

NC_J4

K4

NC_K4

J11

NC_J11/(GPIO_1)

K11

NC_K11/(GPIO_0)

L7

NC_L7

L8

NC_L8

BCM5788M_FBGA196

AT93C46 for BCM4401

LAN_EEDA
LAN_EECLK
LAN_EEDI
LAN_EEDO

U50

1

CS

2

SK

3

DI

4

DO

AT93C46-10SI-2.7_SO8

2@

2

60mils

0.1U_0402_16V4Z

1

1

C651

2

2

1

1

C665

2

2

0.1U_0402_16V4Z

BCM5788M

/(BCM4401)

AVDDL_F12/(AVDD_F12)
AVDDL_F13/(AVDD_F13)

LOW_POWER/(TESTMODE)

8

VCC

7

NC

6

NC

5

GND

0.1U_0402_16V4Z2@

2

Q61

1

+2.5V_LAN +1.2V_LAN

1

C653

C652

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C667

C666

2

0.1U_0402_16V4Z

VSS_B7
VSS_D4
VSS_D5
VSS_D6
VSS_D7
VSS_D8

VSS_D9/(NC_D9)

VSS_E2
VSS_E5
VSS_E6
VSS_E7
VSS_E8
VSS_E9
VSS_F5
VSS_F6
VSS_F7
VSS_F8
VSS_F9

VSS_F10

VSS_G4
VSS_G5
VSS_G6
VSS_G7
VSS_G8
VSS_G9

VSS_G10

VSS_H9
VSS_K2

VSS_L6
VSS_L9

VSS_M6

VSS_M12

VSS_M13/(NC_M13)

VSS_N1
VSS_N12
VSS_N13

AVDD_F14/(NC_F14)

AVDD_A13/(NC_A13)

NC_L11/(VSS_L11)
NC_L14/(VSS_L14)

NC_M8

NC_M9/(VREF)

NC_N8/(EXT_POR)

NC_N9/(DOUT)

NC_P9/(DIN)

+3V_LAN

1

C678

2

BCP69_SOT2231@

2

3

4

0.1U_0402_16V4Z

1

1

C668

2

2

B7
D4
D5
D6
D7
D8
D9
E2
E5
E6
E7
E8
E9
F5
F6
F7
F8
F9
F10
G4
G5
G6
G7
G8
G9
G10
H9
K2
L6
L9
M6
M12
M13
N1
N12
N13

+1.2V_LAN_AVDD

F12
F13

+2.5V_LAN_AVDD

F14
A13

C674

0.1U_0402_16V4Z

L11
L14
M8
M9
M11
N8

LAN_EEDI

N9

LAN_EEDO

P9

4.7K_0402_5%1@

LAN_EEWP
LAN_EECLK
LAN_EEDA

24C256 for BCM5788

Title

Size Document Number Rev

B

Date: Sheet

1

0.1U_0402_16V4Z

1

1

C654

C655

2

2

10U_0805_10V4Z

1

C670

C669

2

0.1U_0402_16V4Z

5788 4401
L33
L34
Q61
Q60
R560

Pop

Pop

Pop

1.24K 1.27K

U50

C678

U51

R561
C677

Pop

Pop

Pop

R562 Pop

1

2

R561

1

2

1 2

1 2

L36
0_0603_5%

1 2

L37
0_0603_5%

C675

0.1U_0402_16V4Z

1 2

R557 10K_0402_5%

+3V_LAN

R562

4.7K_0402_5%1@

1 2

8
7
6
5

C677

1 2

0.1U_0402_16V4Z1@

U51

VCC
WP
SCL
SDA

AT24C256_SO8~D1@

+1.2V_LAN
+2.5V_LAN

Unpop when use BCM4401

Compal Electronic s, Inc.

LAN BCM5788M

EDL00 LA-2601

1

GND

Pop

Pop
Pop

20mils
20mils

1

A0

2

A1

3

NC

4

0.1

26 51Monday, November 15, 2004

of

5

D D

LAN BCM5788M/BCM4401KFB

C C

49.9_0402_1%

L_LAN_MDI0+
L_LAN_MDI0-

L_LAN_MDI1+
L_LAN_MDI1-

L_LAN_MDI2+
L_LAN_MDI2-

L_LAN_MDI3+

B B

L_LAN_MDI3-

1@

49.9_0402_1%

1

C681

0.1U_0402_16V4Z

2

12

12

R566

12

12

R571

1@

C687

1

0.1U_0402_16V4Z1@

2

R567

49.9_0402_1%

49.9_0402_1%

R572

49.9_0402_1%1@

49.9_0402_1%

unpop when use BCM4401(10/100)

A A

1

C682

0.1U_0402_16V4Z

2

12

12

R568

0.1U_0402_16V4Z1@

R573

C688

12

1

2

R569

49.9_0402_1%

12

R574

49.9_0402_1%1@

4

LAN_MIDI3­LAN_MIDI3+

LAN_MIDI2­LAN_MIDI2+

LAN_MIDI1­LAN_MIDI1+

LAN_MIDI0­LAN_MIDI0+

LAN_LINK#
LAN_ACTIVITY#

+2.5V_LAN

24ST0023-3(SP050004200) for BCM4401(10/100)
24HST1041A-3(SP050002110) for BCM5788M(GbE)

T1

1

TCT1

MCT1

2

TD1+

MX1+

3

TD1-

MX1-

4

TCT2

MCT2

5

TD2+

MX2+

TD2-6MX2-

7

TCT3

MCT3

8

TD3+

MX3+

9

TD3­TCT4

TD4+
TD4-

24HST1041A-3

1 2
1 2

1 2
1 2

MX3-

MCT4

MX4+

MX4-

2@

2@
2@

2@

0.01U_0402_16V7K

1

1

C683

C684

2

2

0.01U_0402_16V7K

0.01U_0402_16V7K

RJ45_MDI3+
RJ45_MDI3-

RJ45_MDI2+
RJ45_MDI2-

10
11
12

1

1

C686

C685

0.01U_0402_16V7K

2

2

R577
R578

R579 0_0402_5%
R580

reseved for BCM4401(10/100)

RP125

1 4
2 3

0_0404_4P2R_5%2@

RP126

1 4
2 3

2@

0_0404_4P2R_5%

RP127

1 4
2 3

0_0404_4P2R_5% 2@

RP128

1 4
2 3

0_0404_4P2R_5%2@

RP129

1 4
2 3

2@

0_0404_4P2R_5%

24
23
22

21
20
19

18
17
16

15
14
13

R575

75_0402_1%

0_0402_5%
0_0402_5%

0_0402_5%

12

R581

75_0402_1%

L_LAN_MDI3­L_LAN_MDI3+

L_LAN_MDI2­L_LAN_MDI2+

L_LAN_MDI1­L_LAN_MDI1+

L_LAN_MDI0­L_LAN_MDI0+

L_LAN_LINK#
L_LAN_ACTIVITY#

12

R576
75_0402_1%

12

12

R582
75_0402_1%

3

RJ45_MDI0+
RJ45_MDI0-

RJ45_MDI1+
RJ45_MDI1-

RJ45_MDI2+
RJ45_MDI2-

RJ45_MDI3+
RJ45_MDI3-

RJ45_GND

+3V_LAN

+3V_LAN

LAN_MIDI0+<26>
LAN_MIDI0-<26>

LAN_MIDI1+<26>
LAN_MIDI1-<26>

LAN_MIDI2+<26>
LAN_MIDI2-<26>

LAN_MIDI3+<26>
LAN_MIDI3-<26>

DOCKIN#<15,22,33,38>

LAN_ACTIVITY#<26>

LAN_LINK#<26>

L_LAN_ACTIVITY#

R565 301_0402_1%

L_LAN_LINK#

R570 301_0402_1%

RJ45_GND

LAN_MIDI0+
LAN_MIDI0-

LAN_MIDI1+
LAN_MIDI1-

LAN_MIDI2+
LAN_MIDI2-

LAN_MIDI3+
LAN_MIDI3-

DOCKIN#

LAN_ACTIVITY#
LAN_LINK#

12

RJ45_MDI3­RJ45_MDI3+
RJ45_MDI1­RJ45_MDI2­RJ45_MDI2+
RJ45_MDI1+
RJ45_MDI0­RJ45_MDI0+

12

2

56

U62

2

A0

3

A1

7

A2

8

A3

11

A4

12

A5

14

A6

15

A7

17

SEL

19

LED0

20

LED1

54

LED2

5

NC

GND01GND16GND29GND313GND416GND521GND624GND728GND833GND939GND1044GND1149GND1253GND13

JP32

12

Amber LED-

11

Amber LED+

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

10

Green LED-

9

Green LED+

TYCO_1566597-1

(AL50)

1 2

C689
1000P_1206_2KV7K

+3V_LAN

VDD04VDD110VDD218VDD327VDD438VDD550VDD6

0LED1
1LED1
2LED1

0LED2
1LED2
2LED2

SHLD4
SHLD3

SHLD2
SHLD1

LANGND

1

2

0.1U_0402_16V4Z

1

C690

2

48

0B1

47

1B1

43

2B1

42

3B1

37

4B1

36

5B1

32

6B1

31

7B1

22
23
52

46

0B2

45

1B2

41

2B2

40

3B2

35

4B2

34

5B2

30

6B2

29

7B2

25
26
51

PI3L500E_TQFN56~D

55

16
15

14
13

C691

4.7U_0805_10V4Z

D_LAN_MDI0+
D_LAN_MDI0-

D_LAN_MDI1+
D_LAN_MDI1-

D_LAN_MDI2+
D_LAN_MDI2-

D_LAN_MDI3+
D_LAN_MDI3-

D_LAN_ACTIVITY#
D_LAN_LINK#

L_LAN_MDI0+
L_LAN_MDI0-

L_LAN_MDI1+
L_LAN_MDI1-

L_LAN_MDI2+
L_LAN_MDI2-

L_LAN_MDI3+
L_LAN_MDI3-

L_LAN_ACTIVITY#
L_LAN_LINK#

1

D_LAN_MDI0+ <38>
D_LAN_MDI0- <38>

D_LAN_MDI1+ <38>
D_LAN_MDI1- <38>

D_LAN_MDI2+ <38>
D_LAN_MDI2- <38>

D_LAN_MDI3+ <38>
D_LAN_MDI3- <38>

D_LAN_ACTIVITY# <38>
D_LAN_LINK# <38>

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

B

Date: Sheet

Compal Electronic s, Inc.

LAN Magneti c & RJ45/RJ11

EDL00 LA-2601

27 51Monday, November 15, 2004

1

0.1

of

A

1 1

B

PCI_AD[0..31]

C

PCI_AD[0..31] <17,23,25,26>

D

E

MINI_PCI SOCKET

TIP

LAN RESERVED

D6

RB751V_SOD323

+3VS_MINIPCI

+3VS

2 2

CLK_PCI_MINI

12

R156

33_0402_5%@

L13

1 2

0_0603_5%

W= 40mils

CLK_PCI_MINI<14>

WLAN_BT_DATA<34>

1

C174

10P_0402_50V8J@

2

PM_CLKRUN#<19,25,26,32,33>

PCI_SERR#<17,23,25,26>

3 3

+5VS

WL_ON<33>

PCI_PIRQH#<17>

CLK_PCI_MINI

PCI_REQ#1<17>

PCI_C/BE#3<17,23,25,26>

PCI_C/BE#2<17,23,25,26>

PCI_IRDY#<17,23,25,26>

PCI_PERR#<17,23,25,26>
PCI_C/BE#1<17,23,25,26>

+5VS_MINIPCI

1 2

L12 0_0603_5%

+5VS_MINIPCI

PCI_AD31
PCI_AD29

PCI_AD27
PCI_AD25

PCI_AD23
PCI_AD21

PCI_AD19
PCI_AD17

PCI_AD14
PCI_AD12

PCI_AD10
PCI_AD8

PCI_AD7
PCI_AD5
PCI_AD3
PCI_AD1

0603

21

PCI_PIRQH#

W=30mils

W=30mils W=20mils

JP28

1

1

3

3

5

5

7

7

9

9
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
535354
555556
575758
595960
616162
636364
656566
676768
696970
717172
737374
757576
777778
797980
818182
838384
858586
878788
898990
919192
939394
959596
979798
9999100

101

101

103

103

105

105

107

107

109

109

111

111

113

113

115

115

117

117

119

119

121

121

123

123

QTC_C102A-040B31-4

RING

2

2

4

4

6

6

8

8

10

102
104
106
108
110
112
114
116
118
120
122
124

LAN RESERVED

10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

W=30mils

PCI_PIRQG#

W=40mils

PCI_RST#

PCI_AD30
PCI_AD28

PCI_AD26
PCI_AD24

MINI_IDSEL

PCI_AD22
PCI_AD20

PCI_AD18
PCI_AD16

PCI_AD15
PCI_AD13
PCI_AD11

PCI_AD9

PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

2

C183

0.1U_0402_16V4Z

1

PCI_PIRQG# <17>

PCI_RST# <17,23,25,26,32,33>

WLAN_BT_CLK <34>

1 2

R162

PCI_PAR <17,23,25,26>

PCI_FRAME# <17,23,25,26>
PCI_TRDY# <17,23,25,26>
PCI_STOP# <17,23,25,26>

PCI_DEVSEL# <17,23,25,26>

PCI_C/BE#0 <17,23,25,26>

+3V

+5VS_MINIPCI

+3VS

PCI_GNT#1 <17>
WLANPME# <25,26,32,33>

PCI_AD18

100_0402_5%

IDSEL : PCI_AD18

W= 40mils

1

2

2

1

+3VS_MINIPCI

L14

1 2

0_0603_5%

C178

1000P_0402_50V7K

C182

0.1U_0402_16V4Z

+3V

2

C181

0.1U_0402_16V4Z

1

2

C176

0.1U_0402_16V4Z

1

2

1

2

C171

0.1U_0402_16V4Z

1

C173

0.1U_0402_16V4Z

2

C172

0.1U_0402_16V4Z

1

1

C175
10U_1206_16V4Z

2

2

1

+5VS_MINIPCI

C177

0.1U_0402_16V4Z

+3VS_MINIPCI

1

C184
10U_1206_16V4Z

2

4 4

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Mini PCI Slot
EDL00 LA-2601

28 51Monday, November 15, 2004

E

0.1

of

A

+3V

C296

1 2

U25A

14

SN74LVC14APWLE_TSSOP14

P

I

+3V

I

+3V

I

R315

12

2

O

G

7

14

P

4

O

G

7

14

P

6

O

G

7

R323 20K_0402_5%
R309 6.8K_0402_5%
R329 6.8K_0402_5%
R328 20K_0402_5%

20K_0402_5%

R282
0_0402_5%

BEEP#<33>

1 1

PCM_SPK#<23>

SN74LVC14APWLE_TSSOP14

SB_SPKR<19>

SN74LVC14APWLE_TSSOP14

2 2

3 3

4 4

CD_AGND<21>

1

3

U25B

5

U25C

INT_CD_L<21>

INT_CD_R<21>

A

0.1U_0402_16V4Z

C602

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

CD_GNA

12

12

R324

6.8K_0402_5%

B

C601

C600

B

12

+VDDA

12
12
12
12

R495

1 2

560_0402_5%

R494

12

1 2

560_0402_5%

R493

1 2

12

560_0402_5%

R279

10K_0402_5%

1 2

FBM-L10-160808-301-T_0603

NBA_PLUG<31>

LINE_IN_L_AC<30>
LINE_IN_R_AC<30>

CD_R_L

CD_R_R

MIC<31>

ICH_AC_RST#<18,34>
ICH_AC_SYNC<18,34>
ICH_AC_SDOUT<18,34>

0_0402_5%

C

+VDDA

12

R501
10K_0402_5%

12

R498
10K_0402_5%

1

C

Q28

2

B

2SC2411K_SC59

E

3

12

D12

RB751V_SOD323

2 1

L21

1

C348

10U_0805_10V4Z

C608 1U_0603_10V4Z
C609 1U_0603_10V4Z

1 2

C318 0.1U_0402_16V4Z@

R321

1 2

2

1 2
1 2

C332 1U_0402_6.3V4Z

1 2

C339 1U_0402_6.3V4Z

1 2

C334 1U_0603_10V4Z

1 2
1 2

C344 1U_0603_10V4Z

1 2

C349 1U_0603_10V4Z

R522 22_0402_5%

1 2

R287 22_0402_5%

1 2

R290 22_0402_5%

1 2

SPDIFO<31>

With 14.318Mhz : R321 POP
With 24.576Mhz : R321 DEPOP

C

C603
1U_0402_6.3V4Z

12

C604

1 2

1U_0402_6.3V4Z

1 2

R502

2.4K_0402_5%

0.1U_0402_16V4Z

1

C369

2

0.1U_0402_16V4Z

LINE_IN_L_AC
LINE_IN_R_AC

C_MIC

MDC_RC_SPK

EAPD<31>

D

E

F

G

H

28.7K for Module Design (VDDA = 4.702)

(output = 250 mA)

40mil

R496

1

2

150K_0603_1%

1 2
12

R497
51K_0603_1%

R307 0_0603_5%

R306 0_0603_5%

R284 0_0603_5%

GND GNDA

1 2

R291

0_0402_5%

1

C611
22P_0402_50V8J

2

@

1

2

1 2

1 2

1 2

LINE_OUTL <31>
LINE_OUTR <31>

CLK_14M_CODEC <14>

Compal Electronics, Inc.

AC97 CODEC
EDL00 LA-2601

G

+VDDA

4.85V

C313
10U_0805_10V4Z

29 51Monday, November 15, 2004

H

0.1

of

MONO_IN

10U_0805_10V4Z

C308

+5VS

L43

1 2

KC FBM-L11-201209-221LMAT_0805

L44

1 2

1

2

KC FBM-L11-201209-221LMAT_0805

22U_1206_16V4Z_V1

60mil

C312

+5VAMP

1

2

1U_0603_10V4Z

U24

4

VIN

2

DELAY
ERROR7CNOISE

8

SD

SI9182DH-AD_MSOP8

+AUD_VREF

1

C765

2

10mil

VOUT

SENSE or ADJ

GND

1

2

5
6
1
3

C599

0.1U_0402_16V4Z

C766

0.1U_0402_16V4Z

AC97 Codec

+AVDD_AC97

1

C366

2

CD_RC_L
CD_RC_R
CD_GNDACD_GNA

MONO_IN

38

AVDD125AVDD2

14

AUX_L

15

AUX_R

16

JD2

17

JD1

23

LINE_IN_L

24

LINE_IN_R

18

CD_L

20

CD_R

19

CD_GND

21

MIC1

22

MIC2

13

PHONE

12

PC_BEEP

11

RESET#

10

SYNC

5

SDATA_OUT

45

SDA

46

XTLSEL

47

SPDIFI/EAPD

48

SPDIFO

4

DVSS1

7

DVSS2

U27 ALC250-VD_LQFP48

LINE_OUT_L

LINE_OUT_R

MONO_OUT/VREFOUT3

HP_OUT_L
HP_OUT_R

VREFOUT2

DGND AGND

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

DVDD11DVDD2

BIT_CLK

SDATA_IN

XTL_IN

XTL_OUT

AFILT1
AFILT2

VREFOUT

VREF

DCVOL

VAUX

DISABLE#

SCK

AVSS1
AVSS2

0.1U_0402_16V4Z

1

C316

2

9

NC

NC

0.1U_0402_16V4Z

35
36
37
39

C764

41

6

R288 22_0402_5%

8
2

3
29
30
28
27
32

31

R523 0_0402_5%@

33
34
43
44

40
26
42

E

1

2

27P_0402_50V8J

1 2

R289

1 2
1 2

C373 1000P_0402_50V7K
C388 1000P_0402_50V7K

C389 0.01U_0402_16V7K
C612 1U_0603_10V4Z

C641 1U_0603_10V4Z

1 2

C317

12

R521

1 2
1 2

+AUD_VREF

1 2
1 2

1 2

12

R704

20K_0402_5%@

1

C314
10U_1206_16V4Z

2

1000P_0402_50V7K

22_0402_5%

1M_0402_1%@

+3VS

1

C760

2

ICH_AC_BITCLK <18,34>
ICH_AC_SDIN0 <18>

24.576MHz_16P_3XG-24576-43E1

1

2

1U_0402_6.3V4Z

F

1

C761

1000P_0402_50V7K

2

C762 4.7U_0805_10V4Z

1 2

C763 4.7U_0805_10V4Z

1 2

X4

1 2

@

C610
22P_0402_50V8J

@

1

1

C368

C367

2

0.1U_0402_16V4Z

2

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

1

R336 6.8K_0402_5%@

D D

LINE_IN_L<31>

LINE_IN_R<31>

LINE_IN_L

LINE_IN_R

R349 6.8K_0402_5%@
R342 6.8K_0402_5%

R345 6.8K_0402_5%

AUD_INL<31>

12
12

1

2

LINE_IN_L_AC

LINE_IN_R_AC

1

C640

1U_0402_6.3V4Z@

2

LINE_IN_L_AC <29>

LINE_IN_R_AC <29>

C354

12

12

1 2

1 2

1U_0402_6.3V4Z
C359

1U_0402_6.3V4Z

C639

1U_0402_6.3V4Z@

AUD_INR<31>

C C

B B

A A

Compal Electronics, Inc.

Audio Line Switch
EDL00 LA-2601

30 51Monday, November 15, 2004

1

0.1

of

PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

Title

Size Document Number Rev

3

2

Date: Sheet

A

+5VAMP

1 1

2 2

12

R657

10K_0402_5%

VOL_AMP

(0.65V -> 10dB )

12

R658

1.5K_0402_1%

LINE_OUTL<29>

LINE_OUTR<29>

LINE_OUTL
LINE_OUTR

HIGH
LOW

NBA_PLUG<29>

1 2

C327 0.47U_0603_16V4Z

1 2

C328 0.47U_0603_16V4Z

1 2

C338 0.47U_0603_16V4Z

1 2

C335 0.47U_0603_16V4Z

SPKL+
SPKR+

Pin 2

PIN 6,20 ACTIVE
PIN 5,23 ACTIVE

NBA_PLUG

VOL_AMP SPKR-

HP_L
HP_R

0.1U_0402_16V4Z

B

0.1U_0402_16V4Z

LEFT_2
RIGHT_2

1

C333

2

+5VAMP

1

C346

2

18
19

21
23
20
17

1

C353

0.01U_0402_16V7K

2

W=40mil

1

C347

4.7U_0805_10V4Z

2

U29

7

PVDD

SHUTDOWN#

PVDD

SE/BTL#

VDD

PC-BEEP

HP/LINE#
VOLUME
LOUT+
ROUT+
LLINEIN
RLINEIN
LHPIN
RHPIN

CLK

BYPASS

2
3
4

5
6

TPA0232PWP_TSSOP24

LOUT-

ROUT-

GND
GND
GND
GND

C

+5VAMP

12

R318
100K_0402_5%

SHUTDOWN#

13

D

Q31

2

G

2N7002_SOT23

S

22
15
14
11
9
16
10

LIN

8

RIN

1
12
13
24

1U_0402_6.3V4Z

R348 100K_0402_5%

NBA_PLUG
BYPASS

C364 0.1U_0402_16V4Z

2

C361

1

1U_0402_6.3V4Z

13

D

S

1 2

1 2

2

C351

1

Q29
2N7002_SOT23

2

G

EAPD

SPKL-

2

1

EC_MUTE <33>

EAPD <29>

+5VAMP

C356
1U_0402_6.3V4Z

Docking MIC

D

Speaker Conn.

SPKL+
SPKL­SPKR+
SPKR-

AUD_MIC2 DOCK_MIC_S
AUD_MIC1

JP8

4
3
2
1

ACES_85204-0400

MIC_S -->ON Channel

-------------------------

L -->B1

H --->B2

U66

1

B2

2

GND
B13A

SN74LVC1G3157

R699 0_0402_5%2@

6

S

5

VCC

4

1 2

Docking : MIC plug ---> HIGH
Docking : MIC Unplug ---> LOW

E

+5VAMP

MIC <29>

HeadPhone JACK

AUD_INR<30>
AUD_INL<30>

D_AUD_OR
D_AUD_OL

SPDIFO<29>

3 3

+5VAMP +5VAMP

C789

1 2

0.1U_0402_16V4Z

NBA_PLUG

TC7SH32FU_SSOP5

4 4

A

5

U38

2

P

I0

4

O

1

I1

G

3

AUD_INR
AUD_INL
AGND
AUD_MIC2
AGND
SPKR+
SPKL+
HP_S
DOCK_MIC_S
SPDIFO

R663
100K_0402_5%

1 2

1 2

1
2
3
4
5
6
7
8
9

10

ACES_87213-1000

R662
100K_0402_5%

NBA_PLUG_S

HP_S

JP5

1
2
3
4
5
6
7
8
9
10

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SPKR+

SPKL+

C

LINE_IN_R<30>
LINE_IN_L<30>

150U_D2_6.3VM

C352

1 2

C399

1 2

150U_D2_6.3VM

1

2

INTSPK_R1-2 INTSPK_R1-3

+

INTSPK_L1-2 INTSPK_L1-3

+

L45

1 2

FBM-11-160808-700T_0603
L46

1 2

FBM-11-160808-700T_0603

JP17

INT_MIC1

C395
220P_0402_50V7K

1
2

MOLEX_53398-0290

INT_MIC1

47_0402_5%

1 2

R356

1 2

R362

47_0402_5%

LINE_IN_R-1
LINE_IN_L-1

AUD_MIC1 LINE_IN_L-1

FBM-11-160808-700T_0603

FBM-11-160808-700T_0603

1 2

L23
FBM-11-160808-700T_0603

220P_0402_50V7K

D

L22

1 2
1 2

L24

330P_0402_50V7K

+AUD_VREF

R352

2.2K_0402_5%

C377

Title

Size Document Number Rev

B
Date: Sheet

NBA_PLUG_S
INTSPK_R1-4
INTSPK_L1-4

C376

12

1

2

C370
330P_0402_50V7K

12

R351

2.2K_0402_5%

LINE_IN_R-1

1

C767
220P_0402_50V7K

2

Compal Electronics, Inc.

AMP & Audio Jack

EDL00 LA-2601

JP22

5
4
3

6
2
1

FOX_JA6033L-5S3-TR

MIC JACK

JP21

5
4
3

6
2
1

FOX_JA6033L-5S3-TR

31 51Monday, November 15, 2004

E

0.1

of

A

B

C

D

E

+3V

+3VS

1

C220

4.7U_0805_10V4Z

2

1

C236

0.1U_0402_16V4Z

2

SIO_GPIO11

1

C216

0.1U_0402_16V4Z

2

+3VS

R216

10K_0402_5%@

Base I/O Address

1 2

0 = 02Eh

*

1 = 04Eh

R219
1K_0402_5%

1 2

1

C227

0.1U_0402_16V4Z

2

SUPER I/O SMsC LPC47N217

+3VS

CLK_PCI_SIOCLK_SIO_14M

R225

1 2

1

C239

2

SIO_PD#
SIO_SMI#

10_0402_5%@

15P_0402_50V8J@

PCI_RST#<17,23,25,26,28,33>
PLT_RST#<6,17,19,21,33>

R224 10K_0402_5%

1 2

R211 10K_0402_5%

1 1

2 2

10K_0402_5%@

15P_0402_50V8J@

1 2

SIO_IRQ

R208 10K_0402_5%

IRRX

R204 10K_0402_5%

1 2

R202

1 2
1

C225

2

12

LPC_AD[0..3]<18,33>

LPC_FRAME#<18,33>

LPC_DRQ#1<18>

R545 0_0402_5% @

1 2

R546 0_0402_5%

1 2

PM_CLKRUN#<19,25,26,28,33>

CLK_PCI_SIO<14>

SERIRQ<19,23,33>

SIO_PME#<25,26,28,33>

CLK_14M_SIO<14>

LPC_AD[0..3]

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_FRAME#

LPC_DRQ#1

SIO_PD#

PM_CLKRUN#
CLK_PCI_SIO
SERIRQ

SIO_PME#
CLK_SIO_14M

SIO_GPIO11
SIO_SMI#
SIO_IRQ

U18

10

LAD0

12

LAD1

13

LAD2

14

LAD3

15

LFRAME#

16

LDRQ#

17

PCI_RESET#

18

LPCPD#

19

CLKRUN#

20

PCI_CLK

21

SER_IRQ

6

IO_PME#

9

CLK14

CLOCK

23

GPIO40

24

GPIO41

25

GPIO42

27

GPIO43

28

GPIO44

29

GPIO45

30

GPIO46

31

GPIO47

32

GPIO10

33

GPIO11/SYSOPT

34

GPIO12/IO_SMI#

35

GPIO13/IRQIN1

36

GPIO14/IRQIN2

40

GPIO23

8

VSS

22

VSS

43

VSS

52

VSS

LPC47N217_STQFP64

LPC I/F

GPIO

POWER

RXD1

TXD1

DSR1#

RTS1#
CTS1#

DTR1#

RI1#

SERIAL I/F

DCD1#

IRRX2

FIR

IRTX2

IRMODE/IRRX3

INIT#

SLCTIN#

PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7

SLCT

BUSY

PARALLEL I/F

ACK#

ERROR#

ALF#

STROBE#

VTR
VCC
VCC
VCC
VCC

RXD1

62

TXD1

63

DSR#1

64

RTS#1

1

CTS#1

2

DTR#1

3

RI#1

4

DCD#1

5

IRRX

37

IRTXOUT

38

IRMODE

39

INIT#

41

SLCTIN#

42

LPD0

44

LPD1

46

LPD2

47

LPD3

48

LPD4

49

LPD5

50

LPD6

51

LPD7

53

LPTSLCT

55

LPTPE

56

PE

LPTBUSY

57

LPTACK#

58

LPTERR#

59

LPTAFD#

60

LPTSTB#

61

7
11
26
45
54

+3VS

RXD1 <36>
TXD1 <36>
DSR#1 <36>
RTS#1 <36>
CTS#1 <36>
DTR#1 <36>
RI#1 <36>
DCD#1 <36>

IRRX <36>

IRTXOUT <36>

IRMODE <36>

LPTSLCT <38>
LPTPE <38>
LPTBUSY <38>
LPTACK# <38>
LPTERR# <38>

1

C222

0.1U_0402_16V4Z

2

+5V_PRN

Close to Docking

2 1

3 3

+5V_PRN

RP5

109876

12345

2.7K_10P8R_1206_5%

1@

+5V_PRN

AFD#/3M#

4 4

LPTERR#
LPTINIT#
LPTSLCTIN#

+5VS

D5
RB420D_SOT23

1@

+5V_PRN

LPTSLCT
LPTPE
LPTBUSY
LPTACK#

109876

12345

A

FD4
FD5
FD6
FD7

RP6

2.7K_10P8R_1206_5%

1@

+5V_PRN

FD3
FD2
FD1
FD0

B

LPTSTB#
LPTAFD#
INIT#
SLCTIN#

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1@

R43 33_0402_5%

1 2

R36 33_0402_5%1@

1 2

R22 33_0402_5%
R35 33_0402_5%

1@

1 2

1@

1 2

RP3

LPD0

1 8

LPD1

2 7

LPD2 FD2

3 6

LPD3 FD3

4 5

1@

68_1206_8P4R_5%

RP2

LPD7

4 5

LPD6

3 6

LPD5

2 7

LPD4 FD4

1 8

68_1206_8P4R_5%

1@

C

FD0
FD1

FD7

FD6
FD5

R_LPTSTB#
AFD#/3M#
LPTINIT#
LPTSLCTIN#

R_LPTSTB# <38>

AFD#/3M# <38>

LPTINIT# <38>

LPTSLCTIN# <38>

FD0 <38>
FD1 <38>
FD2 <38>
FD3 <38>

FD7 <38>
FD6 <38>
FD5 <38>
FD4 <38>

Title

Size Document Number Rev

D

Date: Sheet of

Compal Electronics, Ltd.

LPC-Super I/O 217

EDL00 LA-2601

32 51Monday, November 15, 2004

E

0.1

5

KBA[0..19]

ADB[0..7]

L16

1 2

Rc

Rd

+5VS

+3VALW

+5VALW

+5VS

+3VALW

+3VALW

R183
100K_0402_5%

1 2

R184
0_0402_5%

1 2

RP81

1 8
2 7
3 6
4 5

4.7K_0804_8P4R_5%

RP84

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

RP86

1 8
2 7
3 6
4 5

4.7K_0804_8P4R_5%

FBM-L11-160808-800LMT_0603

GMCH_ENBKL<8,16>

SKU ID definition,
Please see page 3.

D D

C C

B B

A A

ECAGND

22P_0402_50V8J@

1394_PME#<25,26,28,32>

ONBD_LAN_PME#<25,26,28,32>

WLANPME#<25,26,28,32>

LAN_PME#<25,26,28,32>
SIO_PME#<25,26,28,32>

PCI_RST#<17,23,25,26,28,32>
PLT_RST#<6,17,19,21,32>

SKU_ID

1

C207

0.1U_0402_16V4Z

2

KB_CLK
KB_DATA
PS_CLK
PS_DATA

EC_SMI#
FRD#
SELIO#
FSEL#

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

12

R1724.7K_0402_5%

TP_DATA

12

R1714.7K_0402_5%

12

R1751K_0402_5%

12

R1741K_0402_5%

12

R1731K_0402_5%

LID_SW#

12

R47320K_0402_5%

12

R68310K_0402_5%

5

KBA[0..19] <35>
ADB[0..7] <35>

C577

TP_CLK

KBA1
KBA4
KBA5

DOCKIN#

R482 33_0402_5%@

12

R478 0_0402_5%

1 2

R547 0_0402_5%@

1 2

R548 0_0402_5%

1 2

+3VALW

12

CLK_PCI_LPC<14>

+3VALW

R205
10K_0402_5%

1 2

EC_PME#

0.1U_0402_16V4Z

12

C578

1 2

R481 120K_0402_5%@

1 2

R229 1K_0402_5%

1 2

R228 1K_0402_5%

ENBKL

LRST#

+3VALW

R48047K_0402_5%

12

0.1U_0402_16V4Z

4

0.1U_0402_16V4Z
C215

1

2

LPC_AD0<18,32>
LPC_AD1<18,32>
LPC_AD2<18,32>
LPC_AD3<18,32>

SERIRQ<19,23,32>

KB_CLK<38>

KB_DATA<38>

PS_CLK<38>

PS_DATA<38>
TP_DATA<34>

EC_SMB_CK1<35,44>
EC_SMB_DA1<35,44>
EC_SMB_CK2<4,44>
EC_SMB_DA2<4,44>

EC_SCI#<19>

EC_SMI#<19>

IDE_LED#<21>

EN_WL#<34>

EC_SWI#<19>

EN_WOL#<26>
PE_REQ1#<14>

LID_SW#<36>

VR_ON<46,48>

CARD_LED#<23>

PE_REQ2#<14>

PBTN_OUT#<19>

CAPSLED#<34>
NUMLED#<34>

PHDD_LED#<18>

EC_GA20<18>

EC_KBRST#<18>

4

0.1U_0402_16V4Z

FRD#<35>

FWR#<35>

FSEL#<35>

CD_DK#<21>

12

TP_CLK<34>

BKOFF#<16>

FSTCHG<43,44>

BT_ON#<34>

SYSON<40,46>
SUSP#<16,35,40,47>

1

2

1

C238

2

LPC_FRAME#<18,32>

PM_CLKRUN#<19,25,26,28,32>

R467 100K_0402_5%

EZ_SMBUS_ON#<38>

EZ_PE_REQ1#<38>
EZ_PE_REQ2#<19,38>

ENBKL
DPLL_TP
TEST_TP

3

+3VALW

*

*

SMBus

GPIO

*

*

*

*

MISC

L29

1 2

95

123

136

157

166

VCC16VCC34VCC45VCC

VCC

VCC

VCC

X-BUS Interface

Pulse Width

ENE-KB910-B4

Analog To Digital

Digital To Analog

Expanded I/O

GND17GND35GND46GND

3

1

C557

2

0.1U_0402_16V4Z

ECAGND

96

161

159

VCCA

AGND

VCCBAT

BATGND

Internal Keyboard

FAN2PWM/GPOW2/PWM2

FAN1PWM/GPOW7/PWM7

Wake Up Pin

GPIO2E/TOUT1/FANFB1

DPLL_TP/GPIO06/FANFB3

FAN

TEST_TP/GPIO05/FAN3PWM

Timer Pin

E51RXD/GPIO21/ISPCLK
E51TXD/GPIO22/ISPDAT

GND

GND

122

137

167

GPOK0/KSO0
GPOK1/KSO1
GPOK2/KSO2
GPOK3/KSO3
GPOK4/KSO4
GPOK5/KSO5
GPOK6/KSO6
GPOK7/KSO7
GPOK8/KSO8

GPOK9/KSO9
GPOK10/KSO10
GPOK11/KSO11
GPOK12/KSO12
GPOK13/KSO13
GPOK14/KSO14
GPOK15/KSO15
GPOK16/KSO16
GPOK17/KSO17

GPOW0/PWM0
GPOW1/PWM1

GPOW3/PWM3
GPOW4/PWM4
GPOW5/PWM5
GPOW6/PWM6

TIN1/GPWU6

TIN2/FANFB2/GPWU7

GPIAD0/AD0
GPIAD1/AD1
GPIAD2/AD2
GPIAD3/AD3
GPIAD4/AD4
GPIAD5/AD5
GPIAD6/AD6
GPIAD7/AD7

GPODA0/DA0

GPODA1/DA1

GPODA2/DA2

GPODA3/DA3

GPODA4/DA4

GPODA5/DA5

GPODA6/DA6

GPODA7/DA7

GPIO18/XIO8CS#

*

GPIO19/XIO9CS#

*

GPIO1A/XIOACS#

*

*

GPIO1B/XIOBCS#
GPIO1C/XIOCCS#

*

GPIO1D/XIODCS#

*

GPIO1E/XIOECS#

*

GPIO1F/XIOFCS#

*

TOUT2/GPIO2F
E51IT0/GPIO00

E51IT1/GPIO01

KB910Q B4_LQFP176

0.1U_0402_16V4Z

1

C219

2

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LRST#

FRD#
FWR#
FSEL#
SELIO#
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19
CD_DK#

KB_CLK
KB_DATA
PS_CLK
PS_DATA
TP_CLK
TP_DATA

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

EC_SCI#

ENBKL
BKOFF#

FSTCHG

EC_SMI#

PE_REQ1#
LID_SW#
BT_ON#
SYSON
SUSP#
VR_ON

PE_REQ2#

PBTN_OUT#

CAPSLED#
NUMLED#

2

C241

1000P_0402_50V7K

1

15
14
13
10

9

165

18

7
25
24

150
151
173
152
138
139
140
141
144
145
146
147
124
125
126
127
128
131
132
133
143
142
135
134
130
129
121
120
113
112
104
103
108
105

110
111
114
115
116
117

163
164
169
170

8
20
21
22
27
28
48
62
63
69
70
75

109
118
119
148
149
155
156
162
168

55
54
23
41
19

5

6
31

TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C206

PROPRIETARY NOTE THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND

FBM-L11-160808-800LMT_0603

2

C231
1000P_0402_50V7K

1

U15

LAD0
LAD1
LAD2
LAD3

LPC Interface

LFRAME#
LRST#/GPIO2C
LCLK
SERIRQ
CLKRUN#/GPIO0C
LPCPD#/GPIO0B

RD#
WR#
MEMCS#
IOCS#
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1/XIOP_TP
A2
A3
A4/DMRP_TP
A5/EMWB_TP
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20/GPIO23
E51CS#/GPIO20/ISPEN

PSCLK1
PSDAT1
PSCLK2

PS2 Interface

PSDAT2
PSCLK3
PSDAT3

SCL1
SDA1
SCL2
SDA2

GPIO04
GPIO07
GPIO08
GPIO09
GPIO0D
GPIO0E
GPIO10
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO2A
GPIO2B
GPIO2D

FnLock#/GPIO12
CapLock#/GPIO011
NumLock#/GPIO0A
ScrollLock#/GPIO0F
ECRST#
GA20/GPIO02
KBRST#/GPIO03
ECSCI#

0.1U_0402_16V4Z

GPIK0/KSI0
GPIK1/KSI1
GPIK2/KSI2
GPIK3/KSI3
GPIK4/KSI4
GPIK5/KSI5
GPIK6/KSI6
GPIK7/KSI7

GPWU0
GPWU1
GPWU2
GPWU3
GPWU4
GPWU5

XCLKI

XCLKO

0_0402_5%@

+RTCVCC

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
153
154

71
72
73
74
77
78
79
80

32
33
36
37
38
39
40
43

2
26
29
30
44
76
172
176

81
82
83
84
87
88
89
90

99
100
101
102
1
42
47
174

85
86
91
92
93
94
97
98

171
12
11

175
3

4
106
107

158
160

R469

C218

PWR_LED#
PWR_SUSP_LED#
BATT_FULL_LED#
BATT_CHGI_LED#
WL_ON_LED#
BT_ON_LED#
E_MAIL_LED#
MEDIA_LED#

+3VALW

R199
0_0402_5%

1 2

1 2

1

1

C217
1U_0603_10V4Z

2

2

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

INVT_PWM
BEEP#
TRICKLE
ACOFF
A/B#USE
EC_ON
EC_LID_OUT#
EC_MUTE

ON/OFF

PM_SLP_S3#
PM_SLP_S5#
EN_BT#
EC_PME#

BATT_TEMP
SKU_ID
BATT_OVP
BATT_TEMPB

DOCKIN#

AD_BID0

DAC_BRIG
IREF

EN_DFAN1#
WL_ON

FAN_SPEED1

DPLL_TP
TEST_TP

EC_THERM#

EC_TCK
EC_TDO

CRY2

R474 0_0402_5%@

CRY1

2

1 2

2

KSI[0..7]
KSO[0..15]

KSO16 <34>

INVT_PWM <16>
BEEP# <29>
TRICKLE <44>
ACOFF <43>
A/B#USE <44>
EC_ON <39>
EC_LID_OUT# <19>
EC_MUTE <31>

ON/OFF <39>

PM_SLP_S3# <19>
PM_SLP_S5# <19>
EN_BT# <34>

C209 0.01U_0402_16V7K

BATT_OVP <43>

DOCKIN# <15,22,27,38>

DAC_BRIG <16>
EZ_SUSON <38>
IRE F <43>
EN_DFAN1 <36>
WL_ON <28>

EZ_MAINON <38>
EZ_PERST# <38>

PWR_LED# <34>

PWR_SUSP_LED# <34>
BATT_FULL_LED# <34>
BATT_CHGI_LED# <34>
WL_ON_LED# <34>

BT_ON_LED# <34>
E_MAIL_LED# <34>
MEDIA_LED# <34>

FAN_SPEED1 <36>

EC_THERM# <19>

EC_RSMRST# <19>

C844 0.01U_0402_16V7K

RTC_CLK

Title

Size Document Number Rev

Date: Sheet

For EC Tools

+5VALW

EC_TCK
EC_TDO

KSI[0..7] <34>
KSO[0..15] <34>

Analog Board ID definition,
Please see page 3.

+3VALW

Ra

1 2

Rb

1 2

+3VALW

R479
10K_0402_5%

1 2

D33

2 1

CH751H-40_SC76

ECAGND

12

ECAGND

12

RTC_CLK <19>

ACIN <19,42,45>

BATT_TEMPA <44>

BATT_TEMPB <44>

1

C576

2

10P_0402_50V8J

32.768KHZ_12.5P_1TJS125DJ2A073

Compal Electronics, Inc.

ENE-KB910

EDL00 LA-2601

1

R170
100K_0402_5%

R168
0_0402_5%

R476

1 2

20M_0603_5%@

4

1

IN

OUT

NC3NC

2

1

JP27

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

@96212-1011S

AD_BID0

1

C186

0.1U_0402_16V4Z

2

CRY2CRY1

R475
0_0402_5%

1 2

1

C575

X1

2

of

33 51Monday, November 15, 2004

10P_0402_50V8J

0.1

JP3

1 2
3 4
5 6
7 8

+5VALW

MDC CONN.

JP30

1

GND1

ICH_AC_SDOUT<18,29>
ICH_AC_SYNC<18,29>

ICH_AC_SDIN1<18>
ICH_AC_RST#<18,29>

1 2

R486 22_0402_5%

ICH_AC_SYNC
ICHAC_SDIN1_MDC

3

IAC_SDATA_OUT

5

GND2

7

IAC_SYNC

9

IAC_SDATA_IN

11

IAC_RESET#

IAC_BITCLK

131314141515161617171818191920

(EMW80)

2

RES0

4

RES1

6

3.3V

8

GND3

10

GND4

FOX_QT8A0121-4011~D

20

12

ICHAC_BITCLK_MDC

Connector for MDC Rev1.5

+3V

+3V

1

C253

1U_0805_25V4Z

2

1 2

R485 22_0402_5%

ICH_AC_BITCLK <18,29>

+5VALW

+5VS

TP_CLK<33>
TP_DATA<33>

EN_WL#<33>

EN_BT#<33>
WL_ON_LED#<33>
BT_ON_LED#<33>

PWR_SUSP_LED#<33>
PWR_LED#<33>
BATT_FULL_LED#<33>
BATT_CHGI_LED#<33>

TP_CLK
TP_DATA

EN_WL#

EN_BT#
WL_ON_LED#
BT_ON_LED#

9 10
11 12
13 14
15 16
17 18
19 20

SUYIN_80065AR-020G2T

TO M/B

JP9

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

ACES_85201-2005

CAPSLED#
NUMLED#
MEDIA_LED#
E_MAIL_LED#
KSO16
KSI0
KSI1
KSI2
KSI3

(CL56)

ON/OFFBTN# <39>

CAPSLED# <33>
NUMLED# <33>
MEDIA_LED# <33>
E_MAIL_LED# <33>

KSO16 <33>

KSI[0..7]
KSO[0..15]

KSI[0..7] <33>
KSO[0..15] <33>

INT_KBD CONN.

(Right)

KSO7

C625 100P_0402_25V8K

KSO6

C626 100P_0402_25V8K

KSO5

C627 100P_0402_25V8K

KSO4

C628 100P_0402_25V8K

KSO3

C629 100P_0402_25V8K

KSI4

C630 100P_0402_25V8K

KSO2

C631 100P_0402_25V8K

KSO1 USB5+

C632 100P_0402_25V8K

KSO0

C633 100P_0402_25V8K

KSI5

C634 100P_0402_25V8K

KSI6

C635 100P_0402_25V8K

KSI7

C636 100P_0402_25V8K

KSO15

C613 100P_0402_25V8K

KSO14

C614 100P_0402_25V8K

KSO13

C615 100P_0402_25V8K

KSO12

C616 100P_0402_25V8K

KSI0

C617 100P_0402_25V8K

KSO11

C618 100P_0402_25V8K

KSO10

C619 100P_0402_25V8K

KSI1

C620 100P_0402_25V8K

KSI2

C621 100P_0402_25V8K

KSO9

C622 100P_0402_25V8K

KSI3

C623 100P_0402_25V8K

KSO8

C624 100P_0402_25V8K

(Left) (CL56)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

KSO15
KSO14
KSO13
KSO12
KSI0
KSO11
KSO10
KSI1
KSI2
KSO9
KSI3
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSI4
KSO2
KSO1
KSO0
KSI5
KSI6
KSI7

JP14

1

1

3

3

5

5

7

7

9

9

10

11

11

12

13

13

14

15

15

16

17

17

18

19

19

20

21

21

22

23

23

24

25

25

26

27

27

28

29

29

30

31

31

32

33

33

34

35

35

36

37

37

38

39

39

40

41

41

42

43

43

44

45

45

46

47

47

48

ACES_85203-2402

KSO15

2

2

KSO14

4

4

KSO13

6

6

KSO12

8

8

KSI0

10

KSO11

12

KSO10

14

KSI1

16

KSI2

18

KSO9

20

KSI3

22

KSO8

24

KSO7

26

KSO6

28

KSO5

30

KSO4

32

KSO3

34

KSI4

36

KSO2

38

KSO1

40

KSO0

42

KSI5

44

KSI6

46

KSI7

48

USB20_P5<19>
USB20_N5<19>

WLAN_BT_DATA<28>
WLAN_BT_CLK<28>

BlueTooth Interface

G

BT_ON#<33>

USB20_P5

BT_VCC

10U_0805_10V4Z

2

Q12
SI2301DS_SOT23

R95 0_0402_5%
R94 0_0402_5%

R116 0_0402_5%

1 2

R226 0_0402_5%

1 2

1

C140

1

2

2

Title

Size Document Number Rev

Date: Sheet of

+3VALW

S

D

1 3

BT_VCC

C151

0.1U_0402_16V4Z

USB5-USB20_N5

Compal Electronics, Inc.

JP13

1
2
3
4
5
6
7
8

ACES_87212-0800

Bluetooth Connector

MDC / BT / KBD / TP

EDL00 LA-2601

0.1

34 51Monday, November 15, 2004

SB_INT_FLASH_SEL# <19>

KBA[0..19]<33>

ADB[0..7]<33>

KBA[0..19]
ADB[0..7]

+3VALW

INT_FLASH_SEL

SN74LVC125APWLE_TSSOP14

13

U10D

11

OE#

I12O

SUS_STAT# <19>

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
KBA0
ADB0
ADB1
ADB2

U16

1

NC

2

A16

3

A15

4

A12

5

A7

6

A6

7

A5

8

A4

9

A3

10

A2

11

A1

12

A0

13

DQ0

14

DQ1

15

DQ2

16

VSS

29F040/SST39VF040_PLCC

1MB Flash ROM

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

INT_FSEL#
FRD#
FWE#

U28

21

A0

20

A1

19

A2

18

A3

17

A4

16

A5

15

A6

14

A7

8

A8

7

A9

36

A10

6

A11

5

A12

4

A13

3

A14

2

A15

1

A16

40

A17

13

A18

37

A19

22

CE#

24

OE#

9

WE#

SST39VF080-70_TSOP40

@

(CL55)

VCC0
VCC1

RP#

READY/BUSY#

NC0
NC1

GND0
GND1

2

C638

0.1U_0402_16V4Z

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

1 2

R505
100K_0402_5%@

1

FRD# <33>
FSEL# <33>

+3VALW

1

C155

@

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

+3VALW

32

VCC

FWE#

31

WE*

KBA17

30

A17

KBA14

29

A14

KBA13

28

A13

KBA8

27

A8

KBA9

26

A9

KBA11

25

A11

FRD#

24

OE*

KBA10

23

A10

FSEL#

22

CE*

ADB7

21

DQ7

ADB6

20

DQ6

ADB5

19

DQ5

ADB4

18

DQ4

ADB3

17

DQ3

31
30

25

D0

26

D1

27

D2

28

D3

32

D4

33

D5

34

D6

35

D7

RESET#

10
11

NC

12
29
38

23
39

1 2

FWE#

C214

+3VALW

4

O

+3VALW

12

R192
100K_0402_5%

5

U14

2

P

I0

1

I1

G

TC7SH32FU_SSOP5

3

1 3

1MB ROM Socket

KBA16 KBA17
KBA15
KBA14

KBA12
KBA11
KBA9
KBA8
FWE#
RESET#
INT_FLASH_EN#
INT_FLASH_SEL
KBA18
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1

JP15

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40

SUYIN_80065AR-040G2T@

2

G

D

S

Q23
2N7002_SOT23

FWR# <33>

KBA19KBA13
KBA10
ADB7
ADB6
ADB5
ADB4

ADB3
ADB2
ADB1
ADB0
FRD#

FSEL#
KBA0

SUSP# <16,33,40,47>

EC_FLASH# <19>

+3VALW

INT_FSEL# FSEL#

1 2

R504 22_0402_5%

EC_SMB_CK1<33,44>
EC_SMB_DA1<33,44>

+3VALW

R533
10K_0402_5%

SN74LVC125APWLE_TSSOP14

+5VALW

0.1U_0402_16V4Z

INT_FLASH_EN#

1 2

10

U10C

8

C187 0.1U_0402_16V4Z

9

OE#

I

O

1 2

U11

8

VCC

7

WP

6

SCL

5

SDA

GND

AT24C16N10SC-2.7_SO8

A0
A1
A2

C153

R503
100K_0402_5%

+5VALW

1
2
3
4

1 2

1 2

12

R164
100K_0402_5%

12

R167
100K_0402_5%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

BIOS & EXT. I/O PORT & SATA HDD

EDL00 LA-2601

35 51Monday, November 15, 2004

0.1

FAN Conn

+12VALW

1 2

C522

0.1U_0402_16V4Z

8

P

3

+IN

2

-IN

1 2

R440 8.2K_0402_5%

OUT

G

4

EN_FAN1

1

U37A
LM358A_SO8

1 2

R441
100_0402_5%

+3VS

2

C523

0.1U_0402_16V4Z@

1

R88 10K_0402_5%

FAN_SPEED1<33>

R435

10K_0402_5%

EN_DFAN1

12

EN_DFAN1<33>

SATA HDD CONN

JP50

1

SATA_ITX_C_DRX_P0<18>
SATA_ITX_C_DRX_N0<18>

SATA_DTX_C_IRX_N0<18>
SATA_DTX_C_IRX_P0<18>

SATA_ITX_C_DRX_P0
SATA_ITX_C_DRX_N0

SATA_DTX_C_IRX_N0 TIP
SATA_DTX_C_IRX_P0

+3VS

+5VS

+3VALW

12

R689
43K_0402_5%

SATA_DET#<19>

R690

RA

1 2

GND

2

HTX+

3

HTX-

4

GND

5

HRX-

6

HRX+

7

GND

8

VCC3.3

9

VCC3.3

10

VCC3.3

11

GND

12

GND

13

GND

14

VCC5

15

VCC5

16

VCC5

17

GND

18

RESERVED

19

GND

20

VCC12

21

VCC12

22

VCC12

@OCTEK_SAT-22RDX0000A_22P

0_0402_5% @

+5VS

1

C

2

B

E

3

12

1 2

C856

150U_D2_6.3VM@

Close to SATA HDD

Q46
FMMT619_SOT23

FAN1

D26
1N4148_SOT23

1000P_0402_50V7K@

+5VS

1

+

2

12

D3
1SS355_SOD323

C107

Close to Docking

1

3

DTR#
RTS#
TXD
CTS#
RI#
RXD
DCD#
DSR#

2

D30 PSOT03C@

3

DTR# <38>
RTS# <38>

TXD <38>
CTS# <38>
RI# <38>
RXD <38>
DCD# <38>
DSR# <38>

LID_SW# <33>

R664 0_0402_5%1@

DTR#1<32>
RTS#1<32>
TXD1<32>

12

C108
10U_1206_16V4Z

JP12

3
2
1

ACES_85205-0300

2

2

1

C106
1000P_0402_50V7K@

1

CTS#1<32>
RI#1<32>
RXD1<32>
DCD#1<32>
DSR#1<32>

FOXCONN_JM34613-L002-TR

3

L47

0_0603_5%

@220PF_3KV_1808

JP48

3
446

112

12

12

C786

2

5

12

MRING

5
6

L48
0_0603_5%

12

C787

@220PF_3KV_1808

JP47

1
2

MOLEX_53398-0290

R665 0_0402_5%1@
R666 0_0402_5%1@
R667 0_0402_5%1@
R668 0_0402_5%1@
R669 0_0402_5%1@
R670 0_0402_5%1@
R671 0_0402_5%1@

(ELW80)

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

SW1

2

4

ESE11MV9_4P

(ELW80)

FIR Module

R366

C401

10U_1206_16V4Z

+3VS

1

+3VS

R368
47_1206_5%

1

2

1 2
1

2

IRRX<32>

C402

0.1U_0402_16V4Z

C385

22U_1206_16V4Z_V1

IRRX IRMODE
IR_3VS

2

2
4
6
8

SD/MODE: SHUTDOWN MODE, HIGH ACTIVE
MODE: HIGH/LOW SPEED SELECT

4.7_1206_5%

1 2
1 2

R365

4.7_1206_5%

IR1

IRED_C
RXD
VCC
GND

IR_VISHAY_TFDU6101E-TR4_8P

IRED_A

SD/MODE

TXD

MODE

+IR_ANODE

1
3
5
7

IRTXOUT

R316

C396

1 2

+

150U_D2_6.3VM@

1 2

0_0402_5%@

IRTXOUT <32>
IRMODE <32>

SATA Device Status

Presence
Removed

RA

POP

NO POP

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

FAN / FIR / RJ11/Lid_Switch

EDL00 LA-2601

36 51Monday, November 15, 2004

0.1

5

D D

4.7U_0805_10V4Z

C776

+5VALW

1

U59

1

GND

2

IN

3

IN

4

EN#

G528_SO8

OUT
OUT
OUT

FLG

8
7
6
5

2

SYSON#

+USB_AS

4

1 2

R659

0_0402_5%

USB_OC#0 <19>

USB_OC#6 <19>

3

470P_0402_50V7K

1

1

@

2

+

2

1

C773

@

10P_0402_50V8J

2

C768
150U_D2_6.3VM

USB20_N0<19>
USB20_P0<19>

C772

10P_0402_50V8J

C770

1

2

SUYIN_020122MR008S540ZU

2

+USB_AS+USB_AS

470P_0402_50V7K

1

C771

2

JP43

1
2
3
4

12

VCC

VCC
D0­D0+

D1+

VSS

VSS
G210G1

5
6

D1-

7
8

9

G311G4

1

+

C769
150U_D2_6.3VM

2

C774

10P_0402_50V8J

1

@

2

1

C775

@

10P_0402_50V8J

2

1

USB20_N6 <19>

USB20_P6 <19>

(CL55)

+USB_BS

C C

150U_D2_6.3VM

C779

10P_0402_50V8J

1

2

C781

4.7U_0805_10V4Z

SYSON#<40>

+5VALW

1

2

SYSON#

U60

1

GND

2

IN

3

IN

4

EN#

G528_SO8

OUT
OUT
OUT

FLG

+USB_BS

8
7
6
5

1 2

R660

0_0402_5%

USB_OC#2 <19>

USB20_N2<19>
USB20_P2<19>

C777

1

@

2

470P_0402_50V7K

1

+

C778

2

C780

@

10P_0402_50V8J

1

2

JP44

suyin_020167mr004s511zu_4p

1
2
3
4

(Left)( ELW80)

B B

+

C782

150U_D2_6.3VM

C784

10P_0402_50V8J

1

@

2

1

C785

@

10P_0402_50V8J

2

C859

4.7U_0805_10V4Z

+5VALW

1

U65

1

GND

2

IN

3

IN

4

EN#

G528_SO8

OUT
OUT
OUT

2

SYSON#<40>

A A

SYSON#

5

FLG

+USB_CS

8
7
6
5

1 2

R700

0_0402_5%

4

USB_OC#4 <19>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

USB20_N4<19>
USB20_P4<19>

3

+USB_CS

470P_0402_50V7K

1

1

C783

2

2

JP45

1
2
3
4

SUYIN_2569A-04G3T

(EAX00)

2

(Top)

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

USB Conn
EDL00 LA-2601

37 51Monday, November 15, 2004

1

of

0.1

A

B

C

D

E

+3VALW

1@

10K_0402_5%

R13

R17

1 1

2 2

3 3

4 4

1 2

10K_0402_5%1@

D_USB_SMI#1<17>

D_USB_SMI#2<17>

KB_DATA<33>
PS_DATA<33>

D_CK_SDATA<11,12,14>

A

12

MZIN_EM#

KB_CLK<33>
PS_CLK<33>

100K_0402_5% @

+3VALW

5

1

P

B

2

A

G

1@

3

D8

2 1

1@

RB751V_SOD323

D40

2 1

1@

RB751V_SOD323

KB_DATA
KB_CLK
PS_DATA
PS_CLK

+3VS

R15

1 2

2

G

1 3

D

S

1 2

R99 0_0603_5%

1@

C11
U2

Y

TC7SH08FU_SSOP5

1 3

D

D_CK_SCLK<11,12,14>

Q4

2N7002_SOT23@

1@

12

DOCKIN#

4

D_LAN_MDI0+<27>
D_LAN_MDI0-<27>
D_LAN_MDI1+<27>

D_LAN_MDI1-<27>

D_LAN_LINK#<27>

CLK_EZ_CLK1<14>
CLK_EZ_CLK1#<14>

D_LAN_ACTIVITY#<27>

D_LAN_MDI2+<27>
D_LAN_MDI2-<27>

D_LAN_MDI3+<27>
D_LAN_MDI3-<27>

R672 0_0603_5%1@

1 2

R673 0_0603_5%

1 2

R674 0_0603_5%1@

1 2

R675 0_0603_5%

1 2

EZ_PCIE_TXP1<19>
EZ_PCIE_TXN1<19>

D_DVI_TXD2-<22>
D_DVI_TXD2+<22>

2

G

Q3

2N7002_SOT23@

S

0.1U_0402_16V4Z

R_LPTSTB#<32>
AFD#/3M#<32>

FD0<32>
LPTERR#<32>
FD1<32>

LPTINIT#<32>

FD2<32>

LPTSLCTIN#<32>

FD3<32>
FD4<32>
FD5<32>
FD6<32>
FD7<32>
LPTACK#<32>
LPTBUSY<32>
LPTPE<32>
LPTSLCT<32>

RI#<36>

DTR#<36>

CTS#<36>
TXD<36>
RTS#<36>

RXD<36>

DSR#<36>

DCD#<36>

1@

1@

EZ_SUSON<33>
EZ_MAINON<33>
EZ_PERST#<33>

EZ_SMBUS_ON# <33>

1 3

D

1 2

R98 0_0603_5%

1@

B

DOCKIN# <15,22,27,33>

D_LAN_MDI0+
D_LAN_MDI0­D_LAN_MDI1+

D_LAN_MDI1-

D_LAN_LINK#
R_LPTSTB#
AFD#/3M#
FD0
LPTERR#
FD1
LPTINIT#
FD2
LPTSLCTIN#
FD3
FD4
FD5
FD6
FD7
LPTACK#
LPTBUSY
LPTPE
LPTSLCT

CLK_EZ_CLK1
CLK_EZ_CLK1#

D_LAN_ACTIVITY#

D_LAN_MDI2+
D_LAN_MDI2-

D_LAN_MDI3+
D_LAN_MDI3-

D_HP_S
D_SPDIFO

RI#
DTR#
CTS#
TXD
RTS#
RXD
DSR#
DCD#

EZ_PCIE_TXP1
EZ_PCIE_TXN1
D_DVI_TXD2­D_DVI_TXD2+

2

G

Q5

2N7002_SOT23@

S

1 2

R16 4.7K_0402_5% @

EZ_SMB_CLK

1 2

R14 4.7K_0402_5% @

EZ_SMB_DAT

D_DVI_DET<22>

Docking Conn.

JP23

1

LAN0+

2

LAN0-

3

GND

4

LAN1+

5

LAN1-

6

GND

7

GND
LAN_LINK#8AUD_INR

9

PP_STB#

10

PP_AFD#

11

PP_D0

12

PP_ERR#

13

PP_D1

14

PP_INIT#

15

PP_D2

16

PP_SLIN#

17

PP_D3

18

PP_D4

19

PP_D5

20

PP_D6

21

PP_D7
PP_ACK#22EZIN_ME#
PP_BUSY23PE_REQ2#

24

PP_PE
PP_SLCT25PE_REQ1#

26

PE_WAKE#

27

GND

28

GND

29

PCIECLK1+

30

PCIECLK1-

31

LAN_ACT#

32

RESERVE

33

GND

34

LAN2+

35

LAN2-

36

GND

37

LAN3+

38

LAN3-

39

GND

40

HP_S

41

SPDIF

42

COM_RI#

43

COM_DTR#

44

COM_CTS#
COM_SOUT45VGA_G

46

COM_RTS#

47

COM_SIN

48

COM_DSR#
COM_DCD#49PCIERX2+

50

GND

51

PS2_KBDT

52

PS2_KBCK
PS2_MSDT53PCIETX2+
PS2_MSCK54PCIETX2-

55

SUSON

56

MAINON
PE_RST#57PCIECLK2+

58

GND

59

PCIETX1+

60

PCIETX1-

61

DVI2-

62

DVI2+

FOX_QL10303-C44441-4F_120P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PCIECLK2-

+3VS

+3VS

GND

DVI_DET
DVI_DAT

GND

DVI_CLK

EZIN_EM#

MIC_S

AUD_INL

AGND

AUD_MIC

AUD_OR

AUD_OL

AGND

GND

VGA_HS

VGA_VS

VGA_DAT

VGA_CLK

SERIRQ
PE_CLK

PE_DAT

GND

PCIERX1+

PCIERX1-

DVI1-

DVI1+

GND

DVI0-

DVI0+

GND

DVICLK+

DVICLK-

GND
GND

TV_COMP

TV_Y
TV_C

GND
GND

VGA_R
VGA_B

GND
GND

PCIERX2-

GND
GND

GND
GND

VCC
VCC
GND
GND

C

63
64

65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124

D_DVI_DET

R535 0_0603_5%1@
R536 0_0603_5%
R537 0_0603_5%

R525

1 2

100K_0402_5%1@

D_DVI_DET
DE_DVI_SDATA

DE_DVI_SCLK
MZIN_EM#
D_MIC_S
D_AUD_INR
D_AUD_INL
D_AGND
D_AUD_MIC2
D_AUD_OR
D_AUD_OL
D_AGND

D_CRT_HSYNC
D_CRT_VSYNC
D_DDC_DATA
D_DDC_CLK

EZ_SMB_CLK
MZIN_ME#

EZ_SMB_DAT

EZ_PCIE_RXP1
EZ_PCIE_RXN1

D_DVI_TXD1­D_DVI_TXD1+

D_DVI_TXD0­D_DVI_TXD0+

D_DVI_TXC+
D_DVI_TXC-

D_TV_COMPS
D_TV_LUMA
D_TV_CRMA

1 2

1@

1 2

1@

1 2

EZ_PCIE_RXP2
EZ_PCIE_RXN2

EZ_PCIE_TXP2
EZ_PCIE_TXN2

CLK_EZ_CLK2
CLK_EZ_CLK2#

1@

1@

PJP23
JUMP_43X118

112

PJP24
JUMP_43X118

112

2

2

+5VS

D14

2 1

1@

RB411D_SOT23

1@

4.7K_0402_5%

DE_DVI_SDATA

DE_DVI_SCLK

D_CRT_HSYNC <15>
D_CRT_VSYNC <15>
D_DDC_DATA <15>
D_DDC_CLK <15>

R661 1K_0402_5%

1@

1 2

EZ_PE_REQ2# <19,33>
EZ_PE_REQ1# <33>
EZ_PCIE_RXP1 <19>

EZ_PCIE_RXN1 <19>
D_DVI_TXD1- <22>
D_DVI_TXD1+ <22>

D_DVI_TXD0- <22>
D_DVI_TXD0+ <22>

D_DVI_TXC+ <22>
D_DVI_TXC- <22>

D_TV_COMPS <22>
D_TV_LUMA <22>
D_TV_CRMA <22>

D_CRT_R
D_CRT_G
D_CRT_B

EZ_PCIE_RXP2 <19>
EZ_PCIE_RXN2 <19>

EZ_PCIE_TXP2 <19>
EZ_PCIE_TXN2 <19>

CLK_EZ_CLK2 <14>
CLK_EZ_CLK2# <14>

+5VS

DKN_B+

VIN

D

12

R526

30mil

D_CRT_R <15>
D_CRT_G <15>
D_CRT_B <15>

+3VS

R528

1@

12

R527

4.7K_0402_5%1@

1@

VIN

0.1U_0402_25V4K

1

C381

2

Title

Size Document Number Rev

Date: Sheet

0_0402_5%

1 2

2

G

1 3

D

Q20
BSS138_SOT23

S

1 3

Q21

1@

BSS138_SOT23

1

C382

2

0.1U_0402_25V4K

R529

1@

6.8K_0402_5%

12

+3VS

D_DVI_SDATA

2

G

D

S

R530

0.1U_0402_25V4K

1

C383

2

0.1U_0402_25V4K

D_DVI_SCLK

6.8K_0402_5%

1@

D_AUD_INR
D_AUD_INL
D_AGND
D_AUD_MIC2
D_AGND
D_AUD_OR
D_AUD_OL
D_HP_S
D_MIC_S
D_SPDIFO

0.1U_0402_25V4K

1

C384

2

12

+3VS

10

ACES_87213-1000

1

C386

2

D_DVI_SDATA <22>

D_DVI_SCLK <22>

JP2

1
2
3
4
5
6
7
8
9

Compal Electronics, Inc.

Docking

EDL00 LA-2601

38 51Monday, November 15, 2004

E

1
2
3
4
5
6
7
8
9
10

of

0.1

A

B

C

D

E

TOP Side

12

J2 JOPEN

12

J3 JOPEN

1 1

ON/OFFBTN#<34>

EC_ON<33>

2 2

Button Side

EC_ON

Q50

2N7002_SOT23

ON/OFFBTN#

+3VALW

R466

4.7K_0402_5%

1 2

13

D

S

DAN202U_SC70

1 2

R463
33K_0402_5%

DTC124EK_SC59

2

G

1

Q49

+3VALW

Power Button

R468
100K_0402_5%

1 2

D29

2
3

2

51ON#

13

ON/OFF <33>
51ON# <42>

2

C556
1000P_0402_50V7K

1

12

D27
RLZ20A_LL34

-+

RTC Battery

BATT1

RTCBATT

+RTCVCC

1

2

+RTCBATT

+RTCBATT

12

3

C558

0.1U_0402_16V4Z

1

D28
BAS40-04_SOT23

2

+CHGRTC

Power ON Circuit

+3VS

+3V +3V

12

R269

180K_0402_5%

2

C289

3 3

1U_0805_25V4Z

1

U25D
SN74LVC14APWLE_TSSOP14

14

P

9

8

O

I

G

+3V POWER +3V POWER

7

U25E
SN74LVC14APWLE_TSSOP14

14

P

11

O

I

G

7

10

R271
100K_0402_5%

SYS_PWROK <19>

4 4

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Power OK/Reset/RTC battery

EDL00 LA-2601

39 51Monday, November 15, 2004

E

0.1

A

B

C

D

E

+3VALW TO +3V

1

C196
10U_1206_16V4Z

1
2
3
4

2

SYSON_ALW

2

C180

0.1U_0402_16V4Z

1

+3VALW

1 1

U12

8

D

7

D

6

D

5

D

SI4800DY_SO8

1

C189
10U_1206_16V4Z

2

S
S
S
G

+3V

1

2

12

R159

1M_0402_1%@

C190
1U_0805_25V4Z

R157

100K_0402_5%

1 2

13

D

G

Q19

S

2N7002_SOT23

2

SYSON#

+12VALW

+5VALW

1

2

8
7
6
5

+5VALW TO +5VS

+5VS

U32

1

S

D

2

S

D

3

S

D

4

G

D

SI4800DY_SO8

C380

4.7U_0805_10V4Z

1

C404

4.7U_0805_10V4Z

2

5VS_GATE

1

C403
1U_0805_25V4Z

2

+3VALW TO +3VS

+3VS

2 2

+3VALW

U40

8

S

D

7

S

D

6

S

D

5

G

D

SI4800DY_SO8

1

C598
10U_1206_16V4Z

2

1
2
3
4

2

1

1

C596
10U_1206_16V4Z

2

5VS_GATE

C594

0.1U_0402_16V4Z

1

2

12

R484

1M_0402_1%@

C592
1U_0805_25V4Z

R490

100K_0402_5%

1 2

13

D

G

Q53

S

2N7002_SOT23

+1.5VALW TO +1.5VS

+1.5VALW

8

+12VALW

SUSP

2

7
6
5

1

C191

4.7U_0805_10V4Z

2

U13

S

D

S

D

S

D

G

D

SI4800DY_SO8

+1.5VS

1
2
3
4

1

C211

4.7U_0805_10V4Z

2

5VS_GATE

1

C208
1U_0805_25V4Z

2

+3V

1 2
13

D

S

1 2
13

D

S

+1.5VS

1 2
13

D

S

R161

470_0402_5%@

SYSON#

2

G

Q18

2N7002_SOT23@

R340
470_0402_5%

@

2

G

Q37

2N7002_SOT23@

R489
470_0402_5%

@

SUSP

2

G

Q54

2N7002_SOT23@

+1.8VS

1 2
13

D

S

+5VS+3VS

1 2
13

D

S

R431
470_0402_5%

@

SUSP

2

G

Q45

2N7002_SOT23@

R341

470_0402_5%@

SUSPSUSP

2

G

Q38

2N7002_SOT23@

3 3

+5VALW

+DDRVCC

U6

8
7
6
5

1

1@

2

4 4

1

S

D

2

S

D

3

S

D

4

G

D

SI4800DY_SO8 1@

C90

4.7U_0805_10V4Z

A

1

C61

4.7U_0805_10V4Z

1@

2

5VS_GATE

1

C72
1U_0805_25V4Z

1@

2

+1.8VS

+1.8V TO +1.8VS (DDR2)

PROPRIETARY NOTE

B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SUSP<46> SYSON#<37>

C

SUSP

DTC115EKA_SOT23
Q35

2

100K

100K

R338
10K_0402_5%

1 2
13

D

SYSON<33,46>SUSP#<16,33,35,47>

Title

Size Document Number Rev

B

Date: Sheet

SYSON

DTC115EKA_SOT23
Q34

Compal Electronics, Inc.

POWER CONTROL CKT

EDL00 LA-2601

SYSON#

100K

2

100K

E

+5VALW

1 2
13

R339
10K_0402_5%

40 51Monday, November 15, 2004

of

0.1

5

4

3

2

1

CF9

CF4

SMD40M80

SMD40M80

1

1

CF7

CF11

SMD40M80

D D

C C

SMD40M80

1

FD6

FD3

FIDUCAL

FIDUCAL

1

H1

SCREW 8.5X2.8

1

H6

SCREW 8.5X2.8

1

1

SCREW 8.5X2.8

SCREW 8.5X2.8

1

H11

SCREW 8.5X2.8

SCREW 8.5X2.8

CF10
SMD40M80

1

CF2
SMD40M80

1

FD5
FIDUCAL

1

H2

1

H7

1

H12

CF5
SMD40M80

1

CF1
SMD40M80

1

FD4
FIDUCAL

1

SCREW 8.5X2.8

SCREW 8.5X2.8

SCREW 8.5X2.8

SMD40M80

1

CF15
SMD40M80

1

FD1
FIDUCAL

1

H3

1

H8

1

H13

CF14
SMD40M80

1

CF16
SMD40M80

1

FD2
FIDUCAL

1

H4

SCREW 8.5X2.8

H9

SCREW 8.5X2.8

H14

SCREW 8.5X2.8

+3VALW

1 2

C170 0.1U_0402_16V4Z

H5

SCREW 8.5X2.8

1

1

1

H10

SCREW 8.5X2.8

1

H15

SCREW 8.5X2.8

1

14

U10A

P

3

OE#

I2O
G

7

SN74LVC125APWLE_TSSOP14

4

U10B

6

OE#

I5O

SN74LVC125APWLE_TSSOP14

CF6

+3V

14

U25F

P

13

O

I

G

SN74LVC14APWLE_TSSOP14

7

+12VALW

U37B

5

+IN

OUT

6

-IN

LM358A_SO8

12

7

1

H16

SCREW 8.5X2.8

B B

1

H21

SCREW 8.5X2.8

1

H26

SCREW 8.5X2.8

1

A A

M1

SCREW 8.5X2.8

1

1

H17

SCREW 8.5X2.8

1

H22

SCREW 8.5X2.8

1

H27

SCREW 8.5X2.8

1

H31

SCREW 8.5X2.8

1

5

1

H18

SCREW 8.5X2.8

1

H23

SCREW 8.5X2.8

1

H28

SCREW 8.5X2.8

1

1

H19

SCREW 8.5X2.8

1

H24

SCREW 8.5X2.8

1

H29

SCREW 8.5X2.8

1

1

H20

SCREW 8.5X2.8

1

H25

SCREW 8.5X2.8

1

H30

SCREW 8.5X2.8

1

4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Screws

EDL00 LA-2601

41 51Monday, November 15, 2004

1

0.1

of

5

4

3

2

1

Detector

PC3

VIN

Vin Detector

18.234 17.841 17.449

17.597 17.210 16.813

12

12

PC4

100P_0402_50V8J

1000P_0402_50V7K

PR9

1 2

1.5K_1206_5%

PR11

1 2

1.5K_1206_5%

PR13

1 2

1.5K_1206_5%

VIN

12

PR2

82.5K_0603_0.1%

PR5
22K_0603_1%

N9

1 2

12

12

PC6

1000P_0402_50V7K

B+

VL

MAINPWON<18,45,49>

ACON<43,44>

GA<44>
GB<43,44>

BATT_IN<43>

PR6

19.6K_0603_0.1%

PD6
RB715F_SOT323

2
3

2
3

PD7
RB715F_SOT323

PD30
RB751V_SOD323@

12

PR14
10K_0603_5%

1 2

1

1

12

PC7

1000P_0402_50V7K

ACIN

Precharge detector

16.220 15.617 15.028

14.771 14.217 13.621

12

N8
N7

N4

PC13

PR1
1M_0603_0.5%

1 2

3
2

PR8

10K_0603_5%

LM393M_SO8

VL

0.1U_0603_25V7K

VS

8

P

+

-

G

PU1A

4

LM393M_SO8

12

PR15
1M_0603_0.5%

PU1B

7

O

12

PC5

1

O

12

VS

8

P

+

-

G

4

PR24
10K_0603_5%

0.01U_0402_25V7Z

RLZ4.3B_LL34

RTCVREF

3.3V

5
6

12

12

PZD1

N3

PC14

1000P_0402_50V7K

N1

2N7002_SOT23

VIN

12

12

PQ2

PR3
10K_0805_5%

12

PR21

N5

13

D

S

12

169K_0603_1%

N2

2

G

PR4
1K_0603_5%

1 2

PACIN

PR7
10K_0603_5%

B+

12

12

PR23

1 2

47K_0603_5%

13

PR17
280K_0603_1%

PR22

1.5M_0603_1%

2

PQ3
DTC115EUA_SC70

ACIN <19,33,45>

PACIN <43,44>

12

PC11

1000P_0402_50V7K

PACIN

+5VALWP

BATT

Precharge detector

7.558 7.333 7.112

6.108 5.933 5.704

Compal Electronics, Inc.

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Detector / Precharge

Size Docum ent Number Rev

Date: Sheet

1

of

42 51Monday, November 15, 2004

0.1

ADPIN

PCN1

1

2

D D

C C

B B

+CHGRTC

A A

G
G

SINGA_2DC-S756B200

+5VALWP

+3VALWP

+1.5VALWP

+12VALWP

3

PR19

1 2

200_0603_5%

51ON#<39>

VMBA

VMBB

5

PJP1
JUMP_43X118@

112

PJP3
JUMP_43X118@

112

PJP5
JUMP_43X118@

112

PJP7
JUMP_43X118@

112

PJP9

112

JUMP_43X39@

PD2

RB751V_SOD323

PD4

RB751V_SOD323

CHGRTCP

100K_0402_5%

PR16

1 2

22K_0402_5%

PR20

N12

1 2

200_0603_5%

2

2

2

2

2

12

12

PR12

+5VALW

+3VALW

+1.5VALW

+12VALW

FBM-L18-453215-900LMA90T_1812

12

12

PC2

PC1

100P_0402_50V8J

12

12

PC8

0.22U_1206_25V7K

RTCVREF

3.3V

12

PC12

10U_0805_10V4Z

+GMCH_COREP

1000P_0402_50V7K

PL1

1 2

PQ1

TP0610K_SOT23

N6

PU2 G920AT24U_SOT89

3

+0.9VSP

+2.5VSP

OUT

+1.8VP

IN

GND

1

PD1

SBM1040-13_POWERMITE3

PD3

PC9

0.1U_0603_25V7K

PR18
200_0603_5%

PC10
1U_0805_50V4Z

2

2

2

2

2

2
3

VS

PD5

1N4148_SOD80

+DDRVCC

+0.9V_DDR_VTT

+1.05VS

+2.5VS

1

VSB+

12

ADIN

VIN

1N4148_SOD80

1 2

N11

12

PR10
47_1206_5%

13

2

12

12

N10

2

12

PJP2

JUMP_43X118@

112

PJP4

JUMP_43X118@

112

PJP6

JUMP_43X118@

112

PJP8

JUMP_43X118@

112

PJP16

JUMP_43X118@

112

4

5

4

3

2

1

PJP20
JUMP_43X118@

2

D D

C C

ACON<42,44>

VIN

PR27

47K_0402_5%

2

G

12

12

DTA144EUA_SC70

N24

2

13

D

S

PQ10

2N7002_SOT23

ACOFF#

PACIN<42,44>

PR26
15K_0603_5%

PQ7

2

N23

13

8
7

5

47K

47K

PQ8
DTC115EUA_SC70

ACOFF#

PACIN

AO4407_SO8

4

1 3

PD8

1SS355_SOD323

1 2

1 2

PR37

3K_0603_5%

PQ4

1
2
36

12

PR33

150K_0603_1%

PQ5

P2

AO4407_SO8

1
2
3 6

12

PR28

200K_0402_5%

PC19

0.1U_0603_25V7K

N21

12

N22

13

2

G

12

D

PC22

S

0.1U_0402_16V7K

PQ12

2N7002_SOT23

4

1.202V

12

PR35

10K_0402_1%

8
7

5

12

PR34

31.6K_0603_1%

12

PC25

0.1U_0402_16V7K

IREF=1.048*Icharge
IREF=0.419~3.132V

PR43

1 2

IREF<33>

162K_0603_1%

12

0.01U_0402_25V7Z

PR44

100K_0402_1%

BATT+

12

PR47
340K_0603_1%

N26

12

PR49
499K_0603_1%

12

PR53

105K_0603_0.5%

12

PR54

40.2K_0603_1%

N19

D

S

Battery OVP voltage :
4S2P : 17.4V--> BATT_OVP= 1.93V

B B

(BAT_OVP=0.1111 *VMB)

3S2P : 13.05V--> BATT_OVP= 1.93V

(BAT_OVP=0.14753 *BATT+)

PU4A

LM358A_SO8

BATT_OVP<33>

12

PR52

22K_0603_5%

A A

5

1

7

PU4B

LM358A_SO8

VS

12

PC33

8

P

0

G

4

0

N17

3

+

2

-

5

+

6

-

12

PC34

0.01U_0402_25V7Z

13

2

G

PQ17

2N7002_SOT23

4

12

PC32

0.1U_0402_16V7K

Iadp=0~3.0A

P3 B+

PR25

12

0.02_2512_1%

PU3

1

-INC2

+INE2

-INE2

10K_0402_1%

OUTC1

12

2N7002_SOT23

PC35

0.1U_0402_16V7K

10

11

12

S

2

OUTC2

3

+INE2

4

-INE2

5

FB2

6

VREF

7

FB1

8

-INE1

9

+INE1

OUTC1

OUTD

-INC1

MB3887_SSOP24

PQ13

G

2

13

PR32

100K_0402_1%

PC23

1 2

4700P_0603_50V7K

MB3887VREF

PC26

1 2

1500P_0603_50V7K

PR41

10K_0402_1%

12

PR36

1 2

PR38

1 2

1K_0402_1%

-INE1

+INE1

OUTD

12

VCC(o)

D

13

N18

+INC2

GND

OUT

VCC

-INE3

+INC1

DTC115EUA_SC70

2

112

PJP18
JUMP_43X118@

2

112

12

PC15

4.7U_1206_25V6K

+INC1

12

12

VL

PR31
0_0402_5%

1 2

PC20 2200P_0402_50V7K

1 2

1 2

PC21

0.1U_0603_25V7K

PC27 0.1U_0603_25V7K

1 2

PC28

N27

1 2

1500P_0603_50V7K

4.2V

FSTCHG<33,44>

24

23

CS

22

CS

N14

21

20

PC24

N15

19

0.1U_0603_25V7K

18

17

1 2

68K_0402_5%

16

15

1 2

47K_0402_1%

14

13

PR45

150K_0603_0.1%

PR48

300K_0603_0.1%

PR50

100K_0402_5%

1 2

PQ15

1 2

PR39

-INE3

PR42

FSTCHG

VH

RT

FB3

CTL

N16

GB <42,44>

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

12

12

PC17

PC16

0.1U_0603_25V7K

4.7U_1206_25V6K

N13

SKS30-04AT_TSMA

FSTCHG

2

B++

12

PC18

2200P_0402_50V7K

36

241

578

15U_PLFC1045P-150A_3.7A_20%

1 2

PD9

2 1

PR46

12

300K_0603_0.1%

+3VALWP

12

PR51
47K_0603_5%

N20

13

PQ16
DTC115EUA_SC70

VIN

1 2

ACOFF#

PQ11
AO4407_SO8

LXCHRG

PL3

2

G

2

PR29

47K_0402_5%

1 2

0.02_2512_1%

CS

13

D

PQ14
2N7002_SOT23

S

N25

PR40

1
2
3 6

12

PR30
10K_0402_5%

13

PQ9
DTC115EUA_SC70

PQ6

AO4407_SO8

4

ACOFF

2

ACOFF <33>

BATT++

12

12

PC30

PC29

4.7U_1206_25V6K

4.7U_1206_25V6K

Compal Electronics, Inc.

Title

Charger

Size Docum ent Number Rev

Custom

Date: Sheet

Charger

8
7

5

PR208

1 2

1.5K_1206_5%@

PR209

1 2

1.5K_1206_5%@

PR210

1 2

1.5K_1206_5%@

PJP21
JUMP_43X118@

112

PJP22
JUMP_43X118@

112

PQ53

AO4407_SO8

@

8

12

PC31

4.7U_1206_25V6K

CC=0.4~3.0A
CV=16.8V(8 CELLS LI-ION)
CV=12.6V(6 CELLS LI-ION)

7
5

4

13

D

S

PQ54

2N7002_SOT23@

1

12

PD31

1N4148_SOD80@

2

2

1
2
36

VL

12

2

G

43 51Monday, November 15, 2004

PR211
10K_0402_5%

@

of

BATT+

BATT_IN <42>

0.1

5

VMBA

SMD1
SMC1

AB/I
TSA

12

PC36

FBM-L18-453215-900LMA90T_1812

1000P_0402_50V7K

PR66
100_0603_5%

1 2

1 2

PL4

1 2

PR55
1K_0603_5%

1 2

PR61

6.49K_0603_1%

PR63
1K_0402_5%

1 2

EC_SMB_DA1 <33,35>
EC_SMB_CK1 <33,35>

VMBAA

12

12

GA<42> GB<42,43>

PCN2

SUYIN_200275MR007G113ZL

1

BATT+

2

ID

3

B/I

4

TS

5

D D

C C

SMD

G

6

SMC
GND7G

PR65

100_0603_5%

9
8

AO4407_SO8

8
7

5

PC38

0.01U_0402_25V7Z

+3VALWP

BATT_TEMPA <33>

GA

12

PR71
10K_0402_5%

PQ18

4

2

PJP14 JUMP_43X118@

PJP15 JUMP_43X118@

1
2
36

BATTA_ON

1 2

PR59

22K_0603_5%

N28

2

B

PQ22

HMBT2222A_SOT23

PR67

13

10K_0603_5%

PQ24
DTC115EUA_SC70

74HC253_Y2

4

112

112

C

E

2

2

P5

1

3

N29

12

AO4407_SO8

1
2
3 6

12

PR57

39K_0603_5%

PD10
1N4148_SOD80

1 2

PQ19

BATT+

PQ20

8
7

5

4

AO4407_SO8

8
7

5

4

12

PR72
10K_0402_5%

2

GB

3

1
2
36

BATTB_ON

1 2

PR60

22K_0603_5%

N30

2

B

PQ23

HMBT2222A_SOT23

13

10K_0603_5%

PQ25
DTC115EUA_SC70

PR68

P4

12

1

C

E

3

1N4148_SOD80

1 2

N31

12

PQ21

AO4407_SO8

1
2
3 6

4

PR58

39K_0603_5%

+3VALWP

PD11

BATT_TEMPB<33>

EC_SMB_CK2<4,33>

EC_SMB_DA2<4,33>

FBM-L18-453215-900LMA90T_1812

8

VMBBB

7
5

12

PC39

0.01U_0402_25V7Z

1 2

PR62

6.49K_0603_1%

1K_0402_5%

PL5

PR64

2

VMBB

12

1 2

PR70

100_0603_5%

EC_SMB_CK2

EC_SMB_DA2

1

12

PC37

PCN3

SUYIN_200275MR007G113ZL

1000P_0402_50V7K

BATT+7G

6

TSB
SMC2
SMD2

PR69
100_0603_5%

1 2

1 2

BATT+

5

TS

4

SMC

3

SMD

2

GND

1

GND

Battery Select

8
9

G

74HC253_Y1

VL

PR75
270K_0402_5%

PR212

0_0402_5%@

1 2

1 2

PR213

0_0402_5%

1 2

1 2

PD12

1SS355_SOD323

PC43

2

1 2

4700P_0603_50V7K

13

ACON

42,43>

B B

FSTCHG

,43>

ACON

,43>

PU5

74HC253

12

PC41

0.1U_0402_16V7K

1 2

PR80
100K_0402_5%

1 2

PR81
100K_0402_5%

PQ26
DTC115EUA_SC70

16

A/B#USE<33>

A A

9

1Y72Y

VCC

1C061C151C241C332C0102C1112C2122C313S014S121EN12EN

N41

2

8

15

13

PQ27
DTC115EUA_SC70

GND

A/B#USE

VL VMBBVS

12

PR73

100K_0402_5%

N32

VL VMBA

PR83

100K_0402_5%

N33

1 2

PR77

4.7K_0402_5%

1 2

PR86

4.7K_0402_5%

PU6A
LM393M_SO8

N43

1

12

PR79

5.6M_0603_5%

PU6B

LM393M_SO8

N45

7

12

PR88

5.6M_0603_5%

O

VS

O

PC40

8

4

12

8

4

12

0.01U_0402_25V7Z

N34

3

P

+

2

-

G

N35

5

P

+

N36

6

-

G

DTC115EUA_SC70

PR76

200K_0603_1%

RTCVREF

PR82

10K_0402_5%

1 2

12

PC45
1000P_0402_50V7K

12

PR85
100K_0603_1%

12

13

PQ28

PR74
649K_0603_1%

1 2

N38

PR78
475K_0603_1%

1 2

PR84
1M_0603_0.5%

1 2

N37

PR87
499K_0603_1%

1 2

N39

2

12

PC42

12

PC44

PR89

47K_0603_5%

1 2

PD13

1N4148_SOD80

Second Battery Detector

High:8.47V
Low :7.47V

100P_0402_50V8J

Main Battery Detector

High:10.68V
Low :9.52V

100P_0402_50V8J

PACIN <42,43>

12

TRICKLE <33>

High: Main Battery (A)
Low : Second Battery (B)

5

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Title

Battery Select

Size Docum ent Number Rev

<Doc> 0.1

Custom

Date: Sheet

1

of

44 51Monday, November 15, 2004

A

B

C

D

+3VALWP/+5VALWP/+12VALWP

B+

1

1 1

2 2

3 3

PJP10

1

JUMP_43X118@

2

2

B+++

12

PC50

PC49

2200P_0402_50V7K

10U_SPC-1204P-100_4.5A_20%

+3VALWP

PC63

PC46

4.7U_1206_25V6K

12

PC48

0.1U_0603_25V7K

12

12

12

PC51

4.7U_1206_25V6K

4.7U_1206_25V6K

12

12

PL6

1

+

PD17

2

2 1

150U_D2_6.3VM

SKUL30-02AT_SMA

PR100

1M_0402_1%

47P_0402_50V8J

PC59

N46

1 2

PR98

1.27K_0603_1%

1.27K_0603_1%

1 2

1 2

PR102
0_0402_5%

12

PR106

1 2

PC64

3.32K_0603_1%

PR111
10K_0402_1%

1 2

AO4912_SO8

1

D2

2

D2

3

G1

4

S1/A

PR101

100P_0402_50V8J

PQ29

D1/S2/K
D1/S2/K
D1/S2/K

1 2

CSL3A

FB3

ACIN<19,33,42>

G2

PC61

0.047U_0603_25V7M

BST3A BST5A

CHP202U_SC70

VS

DH31

8
7
6
5

12

0.47U_0603_16V7K

PR105

10K_0402_5%

300K_0402_5%@

PC69

1 2

620_0402_5%

1 2

VS

12

PR112

47K_0402_5%

12

PR91

0_0402_5%

1 2

PR103

PR107

N49

DH3
LX3

DL3

CSH3
CSL3

12

12

BST3

N51

PR92
0_0402_5%

MAX1902_V+

12

25
27
26

24

1
2

3
10
23

7
28

N50

12

PC66
680P_0402_50V7K

1 2

PC57

0.1U_0603_25V7K

22

PU7

BST3
DH3
LX3

DL3

MAX1902EAI_SSOP28

CSH3
CSL3
FB3
SKIP#
SHDN#

TIME/ON5
RUN/ON3

VL

12

PD15

VL

1SS355_SOD323

PD16

V+

GND

8

PR114
47K_0402_5%

2

1

12

PC53

21

12OUT

VL

VDD

BST5

DH5

LX5

DL5

PGND

CSH5

CSL5

FB5

SEQ

REF
SYNC
RST#

VL

PR109
0_0402_5%@

12

PC70

0.047U_0603_16V7K

3

4.7U_1206_25V6K

ACIN

2

G

PQ32

2N7002_SOT23

4
5
18
16
17
19
20
14
13
12
15
9
6
11

1 2

MAINPWON <18,42,49>

+12VALWP

12

PR93

N54

13

D

S

MAX1902_SYNC

1 2

PR110
0_0402_5%

2.7K_1206_5%

12

PC58

MAX1902_VDD

12

1 2

4.7U_1206_25V6K

BST5
DH5
LX5
DL5

CSH5
CSL5
FB5

2.5VREF

PC65

4.7U_1206_25V6K

PC52

0.1U_0603_25V7K

12

PR94
0_0402_5%

1 2

PR97

0_0402_5%

PQ30
AO4912_SO8

DH51

8

G2

7

D1/S2/K

6

D1/S2/K

5

D1/S2/K

12

PC62

0.47U_0603_16V7K

10.2K_0603_1%

PR108

470P_0805_100V7K

1

D2

2

D2

3

G1

4

S1/A

PR104
698_0402_1%

1 2

12

12

12

PR113
10K_0402_1%

PC67
100P_0402_50V8J

PC47

1 2

N53

PR90

22_1206_5%

EC11FS2_SOD106

12

B+++

12

12

12

PC54

PC55

PC56

4.7U_1206_25V6K

4.7U_1206_25V6K
2200P_0402_50V7K

PD14

N52

PC60

47P_0402_50V8J

PR99

2M_0402_1%

12

PT1
9U_SDT-1204P-9R0-120_4.5A_20%

1 4

3 2

12

12

N47

12

PR95

1.54K_0603_1%

12

PR96

0_0402_5%

+5VALWP

1

+

PD18

2 1

PC68

2

SKUL30-02AT_SMA

150U_D2_6.3VM

4 4

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Size Document Number Rev

Date: Sheet of

5V/3.3V/12V

D

45 51Monday, November 15, 2004

0.1

5

4

3

2

1

+GMCH_COREP/+1.8VP/0.9VSP

D D

8.06K_0402_1%

10K_0402_1%

B+

+1.8VP

12

PC86

4.7U_0805_6.3V6K

1

+

2

2 1

PD21

PC147

SKS10-04AT_TSMA@

220U_D2_4VM_R25

0.1

of

1

46 51Monday, November 15, 2004

PJP11
JUMP_43X118@

2

112

12

PC75

2200P_0402_50V7K

PL14

4.7UH_PLFC1045P-4R7A_5.5A_30%

1 2

12

12

PC77

PC76

4.7U_1206_25V6K

4.7U_1206_25V6K

12

PR123

12

Title

12

PC87

PR126

100P_0402_50V8K@

Compal Electronics, Inc.

+GMCH_COREP/+1.8V/0.9V

Size Docum ent Number Rev

Date: Sheet

12

PC78

4.7U_0805_6.3V6K

PR119
0_0402_5%

1 2

PR122
0_0402_5%

1 2

PR124
0_0402_5%

MAX8743A_ILIM1

100K_0603_1%

MAX8743_B+

PC82

0.1U_0603_25V7K

DH1.8A

12

MAX8743A_ILIM2

12

PR132

5

D8D7D6D

PQ35

S1S2S3G

SI4800BDY-T1_SO8

12

4

5

D8D7D6D

4

PQ55
SI4810BDY_SO8

S1S2S3G

SYSON <33,40>

12

PR133

100K_0603_1%

2

12

12

PC71

2200P_0402_50V7K

PQ34

C C

+GMCH_COREP

PD20

2 1

SKS10-04AT_TSMA@

1

+

2

4.7UH_PLFC1045P-4R7A_5.5A_30%

12

PC84

220U_D2_4VM

PC83

4.7U_0805_6.3V6K

12

12

B B

+DDRVCC

2

2

1

1

12

PC100

10U_1206_6.3V7K

PR120

5.1K_0402_1%

PR127

100K_0402_1%

PJP13

JUMP_43X118@

PR141

1K_0402_1%

PL8

12

12

PC88

100P_0402_50V8K@

+1.8VP

VIN0.9

12

1

D2

2

D2

3

G1

4

S1/A

AO4912_SO8

D1/S2/K
D1/S2/K
D1/S2/K

VREF0.9

A A

SUSP<40>

0.1U_0402_16V7K@

PR142
0_0402_5%

1 2

PC103

PR143
1K_0402_1%

12

PC102

0.1U_0402_16V7K

12

13

D

N55

12

5

PQ39

2

2N7002_SOT23

G

S

12

PC72

4.7U_1206_25V6K

8

G2

7
6
5

PU10

VIN1VCNTL

2

GND

3

VREF

4

VOUT

APL5331KAC-TR_SO8

PC104

10U_1206_6.3V7K

4

12

PC73

NC
NC
NC
TP

4.7U_1206_25V6K

CHP202U_SC70

PC81

0.1U_0603_25V7K

DH1.05A

VR_ON<33,48>

MAX8743_VCCA

6
5
7
8
9

+0.9VSP

PD19

12

PR121
0_0402_5%

1 2

1

3

BST1.05A

1 2

PR118

0_0402_5%

1 2

PR125
0_0402_5%

1 2

PR131
0_0402_5%@

1 2

PC101

1U_0603_16V6K

4.7U_1206_25V6K

2

DH1.05
LX1.05

DL1.05

FB1.05

+3VALW

PC74

BST1.8A

N57

MAX8743A_SKIP

PC79

25
26
27

24
28

1
2

11

PR115

0_0603_5%

12

12

PU8

0.1U_0603_25V7K

BST1
DH1
LX1

DL1
CS1

OUT1
FB1

ON1

+5VALWP

1 2

PR116
0_0603_5%

12

UVP

REF

VDD

BST2

DH2

OUT2

ON2

TON

ILIM2
ILIM1

LX2
DL2
CS2

FB2

PC89

1 2

VDDA

21
19

18
17
20
16

15
14
12

7
5

13

2V

3

1.936V

PR129

0_0603_5%

PR130

3.3K_0603_1%

0.22U_0603_16V7K

BST1.8BST1.05

DH1.8
LX1.8
DL1.8

FB1.8
N56

12
12

MAX8743A_V+

MAX8743_VCCA

12

4

1U_0603_16V6K

V+

PR117

20_0603_1%

PC80

22

9

VCC

MAX8743EEI_QSOP28

PGOOD

SKIP

GND

OVP

8

6

23

10

MAX8743A_REF

12

PR134
0_0402_5%

12

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

5

4

3

2

1

+2.5VSP/+1.5VALWP

D D

15K_0402_1%

10K_0402_1%

B+

+2.5VSP

12

PC148

4.7U_0805_6.3V6K

1

+

2

2 1

PD29

220U_D2_4VM

PC85

SKS10-04AT_TSMA@

PJP17

12

PC133

2200P_0402_50V7K

PQ51

AO4912_SO8

1

D2

2

D2

D1/S2/K

3

G1

C C

+1.5VALWP

PD28

SKS10-04AT_TSMA@

1

+

2

2 1

4.7UH_PLFC1045P-4R7A_5.5A_30%

12

PC146

220U_D2_4VM

PC145

4.7U_0805_6.3V6K

12

12

PR193

PR200

0_0402_5%@

0_0402_5%@

PL13

1 2

12

PC150

D1/S2/K

4

D1/S2/K

S1/A

100P_0402_50V8K@

B B

12

G2

PC134

4.7U_1206_25V6K

8
7
6
5

12

PR201

MAX8743_VCCB

12

PC135

4.7U_1206_25V6K

CHP202U_SC70

0_0402_5%

PD27

BST1.5A

12

PC143

0.1U_0603_25V7K

DH1.5A

1 2

+3VALWP

1

3

0_0402_5%

1 2

PR194
0_0402_5%

1 2

PR204
0_0402_5%@

2

PR191

1 2

PR198
0_0402_5%

PC136

4.7U_1206_25V6K

BST2.5A

BST1.5
DH1.5

DL1.5

FB1.5

N58

PR188

0_0603_5%

12

12

PC141

PU13

0.1U_0603_25V7K

25

BST1

26

DH1

27

LX1

24

DL1

MAX8743EEI_QSOP28

28

CS1

1

OUT1

2

FB1

11

ON1

OVP

8

MAX8743B_SKIP

PR207
0_0402_5%

1 2

MAX8743B_V+

MAX8743_VCCB

12

4

1U_0603_16V6K

V+

GND

23

20_0603_1%

SKIP

6

12

MAX8743_B++

+5VALWP

PR189
0_0603_5%

12

1 2

21
19

18
17
20
16

15
14
12

7
5

13
3

PR202

PR203

VDDB

12
12

BST2.5

DH2.5
LX2.5LX1.5
DL2.5

FB2.5
N59

0.844V

1.936V

12

PC140

4.7U_0805_6.3V6K

PR192
0_0402_5%

1 2

PR195
0_0402_5%

1 2

PR197
0_0402_5%

MAX8743B_ILIM2

MAX8743B_ILIM1

100K_0603_1%

PC144

0.1U_0603_25V7K

DH2.5A

12

12

PR205

PQ52
AO4912_SO8

8

G2

7

D1/S2/K

6

D1/S2/K

5

D1/S2/K

12

S1/A

1

D2

2

D2

3

G1

4

SUSP# <16,33,35,40>

12

PR206

100K_0603_1%

PR190

PC142

22

9

VDD

UVP

VCC

BST2

DH2

LX2
DL2

CS2

OUT2

FB2

ON2

PGOOD

TON

ILIM2
ILIM1

REF

10

137K_0603_1%

3.3K_0603_1%

MAX8743B_REF

12

JUMP_43X118@

2

112

12

12

PC137

2200P_0402_50V7K

PL7

5UH_SPC-06704-5R0_2.9A_30%

12

4.7U_1206_25V6K

PC138

1 2

12

PC149

100P_0402_50V8K@

4.7U_1206_25V6K

PC139

12

PR196

12

PR199

PC151

0.22U_0603_16V7K

A A

Compal Electronics, Inc.

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

1.5V/2.5V

Size Docum ent Number Rev

Date: Sheet

1

of

47 51Monday, November 15, 2004

0.1

5

9

4

3

2

1

+5VS

12

D D

1U_0603_16V6K

PR145 0_0402_5%

PR161
100K_0402_5%@

1 2

PR146 0_0402_5%

1 2

PR148 0_0402_5%

1 2

PR150 0_0402_5%

1 2

PR152 0_0402_5%

1 2

PR153 0_0402_5%

1 2

PR154 0_0402_5%

1 2

0.22U_0603_16V7K

CPU_VID0<5>
CPU_VID1<5>
CPU_VID2<5>
CPU_VID3<5>
CPU_VID4<5>
CPU_VID5<5>

VGATE<6,14,19>

C C

VR_ON<33,46>

PR159
0_0402_5%

1 2

PR166

78.7K_0402_1%

1 2

1 2

PR164 200K_0402_1%

1 2

1 2

PR167 100K_0402_1%

PR170

0_0402_5%

1 2

PM_STP_CPU#

>

PM_DPRSLPVR<19>

B B

A A

PSI#<5>

N63

2

G

0_0402_5%

1 2

13

D

S

PQ43

1 2

PR172

PR179
0_0402_5%

RHU002N06_SOT323

PR169

10.7K_0402_1%

+5VS

100K_0402_1%

1 2

N64

PR177

12

2

B

PC121

100P_0402_50V8J

1 2

1

C

E

3

2

G

N62

PR144 10_0402_5%

1532VCC

PC112

1 2

D0
D1
D2
D3
D4
D5

1532VROK

1532VCC

PQ44

1532SHDN
1532TIME

12

1532CCV

PC122

RHU002N06_SOT323

PR162 30.1K_0402_1%

PC117

1 2

270P_0402_50V7K
PC119

1 2

13

D

S

1 2

PR175

20K_0402_1%

PQ49

HMBT2222A_SOT23

PR176

10K_0402_1%

1 2

N65

13

D

2

G

S

1532REF
1532ILIM
1532OFSFB
1532SUS
1532SKIP

1 2

27P_0402_50V8J

PQ48

RHU002N06_SOT323

PC111

PC114

PC127

BSTMA

12

0.22U_0603_16V7K

1 2

PR171

0_0402_5%

1 2

12

0.22U_0603_16V7K

PR149
0_0402_5%

BSTMA

BSTSA

PR173
0_0402_5%

1 2

DHMA

PQ41

SI4362DY_SO8

1 2

PD25

CHP202U_SC70

3

2

DHSA

PQ46

SI4362DY_SO8

1 2

5

4

PR163 909_0402_1%

PR180 909_0402_1%

2.2U_0603_6.3V4Z

10

VCC

24

D0

23

D1

22

D2

21

D3
D4
D5
VROK
S0
S1
SHDN#
TIME
CCV
TON
REF
ILIM
OFS
SUS
SKIP
GND

PU11

MAX1532

20
19
25

4
5
6
1

12

2
8
9
7

3
18
11

VDD

BSTM

DHM

LXM
DLM

PGND

CMP
CMN

OAIN+

OAIN-

BSTS

DHS
LXS
DLS
CSP
CSN

GNDS

1 2

30
36

V+

26
28
27
29

BSTM
DHM
LXM
DLM

12

PC113

0.01U_0402_25V7Z

1 2

PR147 0_0402_5%

31

CMP

37

CMN

38

OAIN+

17

OAIN-

16

FB

15

FB

CCI

14

CCI

35
33
34
32
40
39

1 2

PC118 470P_0402_50V8J

BSTS
DHS
LXS
DLS
CSP
CSN

13

CPU_B+ B+

3 5

241

PQ40
SI7392DP_SO8

12

12

PC106

PC105

4.7U_1206_25V6K

4.7U_1206_25V6K

12

1 2

PC107

0.1U_0603_25V7K

1

+

PC108

2200P_0402_50V7K

0.56UH_MPC1040LR56_23A_20%

PC109

100U_25V_M

2

PL11

1 2

5

PQ42

D8D7D6D

S1S3G

S

4

2

SI4362DY_SO8@

PD24

2 1

SKS30-04AT_TSMA

12

D8D7D6D

S1S3G

S

2

PR156

909_0402_1%

PC115

1 2

0.47U_0603_16V7K

N60

1 2

3K_0603_1%

1 2

PC120

PL12

0.56UH_MPC1040LR56_23A_20%

1 2

1 2

PC128

0.47U_0603_16V7K

5

4

1

3 5

241

S

2

+5VS

PC123

2200P_0402_50V7K

PQ45
SI7392DP_SO8

D8D7D6D

PQ47

S1S3G

@

CPU_B+

12

12

12

1 2

PC124

4.7U_1206_25V6K

PC126

PC125

4.7U_1206_25V6K

5

0.022U_0603_16V7K

0.1U_0603_25V7K

12

D8D7D6D

S1S3G

S

4

2

SI4362DY_SO8

PD26

2 1

SKS30-04AT_TSMA

PR178 909_0402_1%

JUMP_43X118@

PR165

PJP19

2

1 2

0.001_2512_5%

12

PR157 499_0603_1%

N61

112

PR151

1 2

PR168

0_0603_5%

CPU CORE

+CPU_CORE

12

PR158 499_0603_1%

PR160 3K_0603_1%

CPU VCC SENSE

1 2

PC116

1 2

1000P_0402_50V7K@

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Compal Electronics, Inc.

Title

+CPU_CORE

Size Document Number Rev

Custom

Date: Sheet

48 51Monday, November 15, 2004

1

of

0.1

A

B

C

D

OTP

1 1

PH1 under CPU botten side :

CPU thermal protection at 90 +-3 degree C
Recovery at 50 +-3 degree C

VSVL

12

CPU

10KB_0603_1%_TH11-3H103FT

2 2

PC132

0.22U_0603_16V7K

PH1

N67

12

PR183

0_0402_5%

N66 OTPFB

12

16.9K_0402_1%

1 2

12

VL

PR186

2.74K_0603_1%

PR184

1 2

PR185
100K_0402_1%

PR187

100K_0402_1%

47K_0402_1%

OTPREF

12

PR181

1 2

3

+

2

-

12

PC131
1000P_0402_50V7K

1 2

8

PU12A

P

O

G

LM393M_SO8

4

PC130

0.1U_0603_25V7K

VL

1 2

1

PR182
47K_0402_1%

OTP

MAINPWON<18,42,45>

13

D

2N7002_SOT23

2

PQ50

G

S

3 3

4 4

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

OTP

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

D

49 51Monday, November 15, 2004

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 2

Reason for change PG # Modify List B.Ver#Item

1

D D

C C

Change DC JAck and second battery connect. 42,44 2004.10.28Change DC JAck from DC231105200 to DC231000500.

Power section

Date

Change second battery connect from

B B

A A

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPER TY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

PWR PIR

50 51Monday, November 15, 2004

1

of

5

4

3

2

1

EAT10 PIR List

Rev:0.2 PIR List 2004/08/10 Writer by Jason********** **********

P05 : Add @ in R63

Del @ in R56

P06 Del @： in R54

D D

Del JP9
P18: New add R512
P21 : New add R513

New add X3

New add C607
P21 : New add R534, R535

C C

B B

A A

Title

Size Document Number Rev

5

4

3

2

Date: Sheet

Compal Electronics, Inc.

PIR

EDL00 LA-2601

51 51Monday, November 15, 2004

1

0.1

of