COMPAL LA-2591 Schematics

A

1 1

B

C

D

E

2 2

Compal confidential

Schematics Document

Mobile Dothan uFCPGA with Intel
Alviso_GM+ICH6-M core logic

3 3

2004-10-08

LA-2591

REV:01

4 4

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, Inc.

Cover Sheet

LA-2591

E

0.1

of

143Monday, October 11, 2004

A

B

C

D

E

Compal confidential

File Name : LA-2591

VRAM
128MByte

1 1

LVDS CONN

page 16

2 2

M/B-S/B CONN
LS-2594

TV-OUT / CRT

page 28

page 17

Gigabit LAN

RTL8110SBL/
8100CL

RJ45/11 CONN

page 24

page 24

conn

Mini PCI
socket

3 3

RTC CKT.

page 19

Power On/Off CKT.

page 34

4 4

DC/DC Int erface CKT.

page 35

Power Circuit DC/DC

36,37,38,39,40,41,42

A

(32MByte*4)

DDR300/300

M/B-NV44M VGA/B
CONN

LS-2591

page 16

PCI BUS

IEEE1394
TSB43AB21

page 27

M/B-S/B CONN
LS-2595

1394 conn

page 32

Fan Control

page 15

PCI-E

CardBus Controller

CB-714

page 25

Slot 0

page 26

B

4in1 Slot

page 25

M/B-S/B CONN
LS-2593

Touch Pad CONN.

Mobile Dothan/Yonah
uFCPGA-478 CPU

H_A#(3..31)

FSB

400/533MHz

Intel Alviso GMCH

PCBGA 1257

page 7,8,9,10,11

PCI-E(DMI)

Intel ICH6-M

mBGA-609

page 19,20,21,22

LPC BUS

EC KB910L

page 32

Clock Generator

ICS 954226

page 18

DDR BANK0 32M*16*4
DDR-SO-DIMM1

page 12,13,14

page 4,5,6

H_D#(0..63)

Thermal Sensor
ADM1031AR

page 15

DDR1 -333

One Channel

M/B-S/B CONN
LS-2594
Camera/BlueTooth

USB2.0

conn

page 17

M/B-S/B CONN
LS-2595

USB2.0

AC-LINK

IDEBUS

page 33

Int.KBD

page 33

Flash ROM

SST39VF080-70

page 34

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

USB conn x2

USB conn x2

Audio CKT
ALC250-VC

IDE HDD
Connector

page 23

LS-2592 SWDJ/B List:
SWDJ switch Button * 5
WL/BT on/foff Button *1
WL/BT LED *1

LS-2594 CRT/TV-OUT List:
CRT conn * 1
TV-OUT conn * 1
USB conn * 2
BlueTooth conn * 1
Num LED * 1
CAP LED * 1
Scroll LED * 1
Lid Switch * 1

LS-2595 USB&1394/B List:
USB conn* 2
1395 conn * 1

D

page 32

page 32

page 29

IDE ODD
Connector

page 23

MODEM
AGERE CPS1038

page 30

AMP & Audio Jack
APA2121

SubBoard CONN List:
LS-2591 VGA/B conn
LS-2592 SWDJ/B conn
LS-2593 TP/B conn
LS-2594 CRT/TV-OUT conn
LS-2595 USB&1394/B conn

Intel CPU debug conn
EC debug conn
SW debug conn

Switch Button list:
Power Botton(Sub/B)
Lid Switch

LED Function list:
AC Power LED
Charge LED
HDD LED

Title

Size Document Number Rev
Custom

Date: Sheet

page 31

Compal Electronics, Inc.

Block Diagram

LA-2591

E

Page 32
Page 32
Page 32
Page 17
Page 32
Page 4
Page 33
Page 33

Page 34
Page 34

Page 32
Page 32
Page 32

243Monday, October 11, 2004

of

0.1

5

I2C / SMBUS ADDRESSING

External PCI Devices

4

3

2

1

D D

LAN
CARD BUS
Cardreader
1394
Wireless LAN(MINI PCI)

Power Managment table

Signal

C C

State

S0

S1

S3

S5 S4/AC

S5 S4/AC don't exist

AD17
AD20

0
1

AD16 2
AD18

+12VALW +3V
+3VALW
+5VALW

ON

3

+2.5V

ON ON

ON ON ON

ON ON

ON OFF

OFF OFF OFF

F
A
B
E
G,H

+CPU_CORE
+VCCP(1.05V)
+5VS
+3VS
+2.5VS
+1.5VS
+1.25VS
+1.1VS(VGA/B)
+1.2VS(VGA/B)
+1.8VS(VGA/B)

OFF

OFF

IDSEL # PIRQREQ/GNT #DEVICE

B B

SMBUS Control Table

SOURCE

SMB_EC_CK1
SMB_EC_DA1

SMB_EC_CK2
SMB_EC_DA2

ICH_SMBCLK
ICH_SMBDATA
LCD_DDCCLK

LCD_DDCDATA
I2CC_SCL

I2CC_SDA

A A

KB910L

KB910L

ICH6-M

Alviso
GM-GP

NV44M

INVERTER BATT

5

SERIAL SENSOR
EEPROM

THERMAL
(CPU)

ADM1032

SODIMM CLK CHIP

4

MINI PCI

LCD

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Title

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, Inc.

Design Note

LA-2591

1

of

343Monday, October 11, 2004

0.1

ZZZ1

5

4

3

2

1

LA-2591 REV 0.1

D D

C C

+VCCP

B B

H_DPRSLP will change to
H_DPRSTP in future
collateral version.

1 2

56_0402_5%

H_A#[3..31]<7>

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30

H_REQ#[0..4]<7>

H_ADSTB#0<7>
H_ADSTB#1<7>

CLK_ITP<18>
CLK_ITP#<18>

CLK_CPU_BCLK<18>
CLK_CPU_BCLK#<18>

H_ADS#<7>
H_BNR#<7>
H_BPRI#<7>
H_BR0#<7>
H_DEFER#<7>
H_DRDY#<7>

R37

H_RS#[0..2]<7>

H_HIT#<7>
H_HITM#<7>

H_LOCK#<7>
H_RESET#<7>

H_TRDY#<7>

H_DBSY#<7>
H_DPSLP#<20>

H_DPRSLP#<20>

H_DPWR#<7>

H_PWRGOOD<20>

H_CPUSLP#<7,20>

H_THERMDA<15>
H_THERMDC<15>

H_THERMTRIP#<7,20>

H_A#31
H_REQ#0

H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_ADSTB#0
H_ADSTB#1

CLK_ITP
CLK_ITP#

CLK_CPU_BCLK
CLK_CPU_BCLK#

H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRDY#
H_HIT#
H_HITM#
H_IERR#
H_LOCK#
H_RESET#

1" ~ 6.5"

H_RS#0
H_RS#1
H_RS#2
H_TRDY#

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3

ITP_DBRESET#

H_DBSY#
H_DPSLP#
H_DPRSLP#

ITP_BPM#4
ITP_BPM#5

H_PROCHOT#

H_CPUSLP#
ITP_TCK
ITP_TDI
ITP_TDO
TEST1
TEST2
ITP_TMS
ITP_TRST#

H_THERMDA
H_THERMDC

U15A

P4

A3#

U4

A4#

V3

A5#

R3

A6#

V2

A7#

W1

A8#

T4

A9#

W2

A10#

Y4

A11#

Y1

A12#

U1

A13#

AA3

A14#

Y3

A15#

AA2

A16#

AF4

A17#

AC4

A18#

AC7

A19#

AC3

A20#

AD3

A21#

AE4

A22#

AD2

A23#

AB4

A24#

AC6

ADDR GROUP

A25#

AD5

A26#

AE2

A27#

AD6

A28#

AF3

A29#

AE1

A30#

AF1

A31#

R2

REQ0#

P3

REQ1#

T2

REQ2#

P1

REQ3#

T1

REQ4#

U3

ADSTB0#

AE5

ADSTB1#

A16

ITP_CLK0

A15

ITP_CLK1

B15

BCLK0

B14

BCLK1

N2

ADS#

L1

BNR#

J3

BPRI#

N4

BR0#

L4

DEFER#

H2

DRDY#

K3

HIT#

K4

HITM#

A4

IERR#

J2

LOCK#

B11

RESET#

H1

RS0#

K1

RS1#

L2

RS2#

M3

TRDY#

C8

BPM0#

B8

BPM1#

A9

BPM2#

C9

BPM3#

A7

DBR#

M2

DBSY#

B7

DPSLP#

G1

DPRSTP#

C19

DPWR#

A10

PRDY#

B10

PREQ#

B17

PROCHOT#

E4

PWRGOOD

A6

SLP#

A13

TCK

C12

TDI

A12

TDO

C5

TEST1

F23

TEST2

C11

TMS

B13

TRST#

B18

THERMDA

A18

THERMDC

C17

THERMTRIP#

TYCO_1612365-1_Dothan

Dothan

DATA GROUP

HOST CLK

CONTROL GROUP

MISC

THERMAL
DIODE

LEGACY CPU

D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DINV0#
DINV1#
DINV2#
DINV3#

DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#

A20M#
FERR#

IGNNE#

INIT#
LINT0
LINT1

STPCLK#

SMI#

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#

A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26

D25
J26
T24
AD20

C23
K24
W25
AE24
C22
L24
W24
AE25

C2
D3
A3
B5
D1
D4

C6
B4

H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_A20M#
H_FERR#
H_IGNNE#
H_INIT#
H_INTR
H_NMI

H_STPCLK#
H_SMI#

H_DINV#0 <7>
H_DINV#1 <7>
H_DINV#2 <7>
H_DINV#3 <7>

H_A20M# <20>
H_FERR# <20>
H_IGNNE# <20>
H_INIT# <20>
H_INTR <20>
H_NMI <20>

H_STPCLK# <20>
H_SMI# <20>

H_D#0

A19

H_D#[0..63] <7>

ITP_DBRESET#<21>

ITP_BPM#[0:3] < 6" Spacing 1:2

Spacing 8 mil

Place near JITP 0.5"

H_DSTBN#[0..3] <7>

H_DSTBP#[0..3] <7>

+VCCP

Check ITP signal for Dothan

Place near JITP 0.5"

ITP_DBRESET#

R46

22.6_0402_1%@

H_RESET# RESETITP#

1 2

R47

22.6_0402_1%@

ITP_TDO ITP_TDO_R

1 2

R32
200_0402_5%

H_PWRGOOD

1 2

R38

200_0402_5%@

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5

CLK_ITP
CLK_ITP#

ITP_TCK
ITP_TRST#
ITP_TMS
ITP_TDI

Add pullups for PWRGOOD and THERMTRIP per INTEL

12

R253
56_0402_5%

+VCCP

T1PAD
T6PAD
T5PAD
T8PAD
T2PAD
T9PAD
T3PAD

T15PAD

T18PAD
T19PAD
T16PAD

T17PAD
T14PAD
T4PAD
T13PAD

12

H_PROCHOT#

12

R266
56_0402_5%

2

B

+3VS

12

R258
1K_0402_5%

1

C

Q29
2SC2411K_SC59

E

3

+VCCP

1 2

R49 54.9_0402_1%

1 2

R48 54.9_0402_1%

1 2

R33 56_0402_5%

+VCCP

R42 39.2_0603_1%

1 2

R179150_0402_5%

1 2

R177680_0402_5%

1 2

R50 27.4_0402_1%

1 2

PROCHOT# <33>

Place near JITP 1"

ITP_TDO

Place near JITP 0.5"

H_RESET#
ITP_BPM#5

39.2

ITP_TMS

Within 2" of the CPU

ITP_TDI

Within 2" of the CPU

ITP_TRST#

Within 2" of the CPU

ITP_TCK

Within 2" of the CPU

A A

5

TEST2

TEST1

R251

1 2

1K_0402_5%@

R35

1 2

1K_0402_5%@

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, Inc.

Dothan Processor(1/ 2)

LA-2591

1

0.1

of

443Monday, October 11, 2004

5

4

3

2

1

R181

+1.5VS

D D

1

1

C340

0.01U_0603_16V7K

C C

+VCCP

12

+V_CPU_GTLREF

B B

12

R248
1K_0402_1%

R247
2K_0402_1%

Layout close CPU

Layout Note:
500 mil max length

Spacing 25mil

20 mils

12

R249

27.4_0402_1%

5 mils (55 Ohm)

12

R250

54.9_0402_1%

20 mils(27.4Ohm)

12

R41

27.4_0402_1%

5 mils(55 Ohm)

12

R40

54.9_0402_1%

2

2

PSI#<42>

Spacing 1:2

Resistor placed within

0.5" of CPU pin.Trace
should be at least 25
miles away from any
other toggling signal.

54.9_0402_1%@

54.9_0402_1%@

C341
10U_1206_6.3V6M

+CPU_CORE

+V_CPU_GTLREF

CPU_BSEL0<18>
CPU_BSEL1<18>

1 2
1 2

R178

+VCCP

VID0<42>
VID1<42>
VID2<42>
VID3<42>
VID4<42>
VID5<42>

Spacing 25mil

CPU_BSEL0
CPU_BSEL1

T10 PAD
T7 PAD
T20 PAD
T12 PAD
T11 PAD

VCCSENSE
VSSSENSE

PSI#
VID0

VID1
VID2
VID3
VID4
VID5

COMP0
COMP1
COMP2
COMP3

U15B

AE7

VCCSENSE

AF6

VSSSENSE

F26

VCCA0

B1

VCCA1

N1

VCCA2

AC26

VCCA3

P23

VCCQ0

W4

VCCQ1

D10

VCCP

D12

VCCP

D14

VCCP

D16

VCCP

E11

VCCP

E13

VCCP

E15

VCCP

F10

VCCP

F12

VCCP

F14

VCCP

F16

VCCP

K6

VCCP

L5

VCCP

L21

VCCP

M6

VCCP

M22

VCCP

N5

VCCP

N21

VCCP

P6

VCCP

P22

VCCP

R5

VCCP

R21

VCCP

T6

VCCP

T22

VCCP

U21

VCCP

D6

VCC

D8

VCC

D18

VCC

D20

VCC

D22

VCC

E5

VCC

E7

VCC

E9

VCC

E17

VCC

E19

VCC

E21

VCC

F6

VCC

F8

VCC

F18

VCC

E1

PSI#

E2

VID0

F2

VID1

F3

VID2

G3

VID3

G4

VID4

H4

VID5

AD26

GTLREF

C16

BSEL0

C14

BSEL1

P25

COMP0

P26

COMP1

AB2

COMP2

AB1

COMP3

B2

RSVD

C3

RSVD

E26

RSVD

AF7

RSVD

AC1

RSVD

TYCO_1612365-1_Dothan

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

Dothan

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

POWER, GROUNG, RESERVED SIGNALS AND NC

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

A2
A5
A8
A11
A14
A17
A20
A23
A26
B3
B6
B9
B12
B16
B19
B22
B25
C1
C4
C7
C10
C13
C15
C18
C21
C24
D2
D5
D7
D9
D11
D13
D15
D17
D19
D21
D23
D26
E3
E6
E8
E10
E12
E14
E16
E18
E20
E22
E25
F1
F4
F5
F7
F9
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
G23
G26
H3
H5
H21
H25
J1
J4
J6
J22
J24
K2
K5
K21
K23
K26
L3
L6
L22
L25
M1

+CPU_CORE

U15C

F20

VCC

F22

VCC

G5

VCC

G21

VCC

H6

VCC

H22

VCC

J5

VCC

J21

VCC

K22

VCC

U5

VCC

V6

VCC

V22

VCC

W5

VCC

W21

VCC

Y6

VCC

Y22

VCC

AA5

VCC

AA7

VCC

AA9

VCC

AA11

VCC

AA13

VCC

AA15

VCC

AA17

VCC

AA19

VCC

AA21

VCC

AB6

VCC

AB8

VCC

AB10

VCC

AB12

VCC

AB14

VCC

AB16

VCC

AB18

VCC

AB20

VCC

AB22

VCC

AC9

VCC

AC11

VCC

AC13

VCC

AC15

VCC

AC17

VCC

AC19

VCC

AD8

VCC

AD10

VCC

AD12

VCC

AD14

VCC

AD16

VCC

AD18

VCC

AE9

VCC

AE11

VCC

AE13

VCC

AE15

VCC

AE17

VCC

AE19

VCC

AF8

VCC

AF10

VCC

AF12

VCC

AF14

VCC

AF16

VCC

AF18

VCC

M4

VSS

M5

VSS

M21

VSS

M24

VSS

N3

VSS

N6

VSS

N22

VSS

N23

VSS

N26

VSS

P2

VSS

P5

VSS

P21

VSS

P24

VSS

R1

VSS

R4

VSS

R6

VSS

R22

VSS

R25

VSS

T3

VSS

T5

VSS

T21

VSS

T23

VSS

TYCO_1612365-1_Dothan

Dothan

POWER, GROUND

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

T26
U2
U6
U22
U24
V1
V4
V5
V21
V25
W3
W6
W22
W23
W26
Y2
Y5
Y21
Y24
AA1
AA4
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC21
AC24
AD1
AD4
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE3
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF2
AF5
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF24

A A

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, Inc.

Dothan Processor(2/ 2)

LA-2591

1

0.1

of

543Monday, October 11, 2004

5

4

3

2

1

+CPU_CORE

1

C84
10U_1206_6.3V6M

2

+CPU_CORE

1

2

+CPU_CORE

1

2

+CPU_CORE

1

2

C259
10U_1206_6.3V6M

C274
10U_1206_6.3V6M

C303
10U_1206_6.3V6M

D D

C C

1

C87
10U_1206_6.3V6M

2

1

C265
10U_1206_6.3V6M

2

1

C280
10U_1206_6.3V6M

2

1

C302
10U_1206_6.3V6M

2

1

C90
10U_1206_6.3V6M

2

1

C81
10U_1206_6.3V6M

2

1

C293
10U_1206_6.3V6M

2

1

C282
10U_1206_6.3V6M

2

1

C93
10U_1206_6.3V6M

2

1

C82
10U_1206_6.3V6M

2

1

C301
10U_1206_6.3V6M

2

1

C283
10U_1206_6.3V6M

2

1

C97
10U_1206_6.3V6M

2

1

C100
10U_1206_6.3V6M

2

1

C273
10U_1206_6.3V6M

2

1

C272
10U_1206_6.3V6M

2

+CPU_CORE

1

2

+CPU_CORE

1

2

+CPU_CORE

1

2

C99
10U_1206_6.3V6M

C101
10U_1206_6.3V6M

C279
10U_1206_6.3V6M

1

C83
10U_1206_6.3V6M

2

1

C102
10U_1206_6.3V6M

2

1

C292
10U_1206_6.3V6M

2

1

C86
10U_1206_6.3V6M

2

1

C98
10U_1206_6.3V6M

2

1

C300
10U_1206_6.3V6M

2

1

C89
10U_1206_6.3V6M

2

1

C260
10U_1206_6.3V6M

2

1

C257
10U_1206_6.3V6M

2

1

C92
10U_1206_6.3V6M

2

1

C267
10U_1206_6.3V6M

2

1

C256
10U_1206_6.3V6M

2

Near VCORE regulator.

+CPU_CORE

1

+

C94

B B

+VCCP

1

C70

+

150U_D_6.3VM

2

A A

1

C85

0.1U_0402_16V4Z

2

5

1

C88

0.1U_0402_16V4Z

2

1

C91

0.1U_0402_16V4Z

2

1

2

4

C96

0.1U_0402_16V4Z

1

C103

0.1U_0402_16V4Z

2

1

C104

0.1U_0402_16V4Z

2

330U_D2E_2.5VM

1

2

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

330U_D2E_2.5VM

C78

0.1U_0402_16V4Z

3

C286

1

+

330U_D2E_2.5VM

2

1

2

1

+

C95

2

C80

0.1U_0402_16V4Z

C285

1

+

2

330U_D2E_2.5VM@

1

2

ESR <= 3m ohm
Capacitor > 880 uF

C105

0.1U_0402_16V4Z

1

C79

0.1U_0402_16V4Z

2

2

Title

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, Inc.

Dothan Bypass

LA-2591

1

of

643Monday, October 11, 2004

0.1

5

4

3

2

1

H_A#[3..31]<4>

D D

T29 PAD

H_REQ#[0..4]<4>

H_ADSTB#0<4>
H_ADSTB#1<4>

C C

B B

A A

CLK_MCH_BCLK#<18>
CLK_MCH_BCLK<18>

H_DSTBN#[0..3]<4>

H_DSTBP#[0..3]<4>

H_DINV#0<4>
H_DINV#1<4>
H_DINV#2<4>
H_DINV#3<4>

H_RESET#<4>
H_ADS#<4>

H_TRDY#<4>
H_DPWR#<4>
H_DRDY#<4>
H_DEFER#<4>

T30 PAD

H_HITM#<4>
H_HIT#<4>
H_LOCK#<4>

H_BR0#<4>
H_BNR#<4>
H_BPRI#<4>
H_DBSY#<4>

H_CPUSLP#<4,20>

H_RS#[0..2]<4>

5

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

TP_H_PCREQ#

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_ADSTB#0
H_ADSTB#1

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_RESET#
H_ADS#

H_TRDY#
H_DRDY#

H_DEFER#
TP_H_EDRDY#
H_HITM#
H_HIT#
H_LOCK#
H_BR0#
H_BNR#
H_BPRI#
H_DBSY#

H_CPUSLP#

H_RS#0
H_RS#1
H_RS#2

U5A

G9

HA3#

C9

HA4#

E9

HA5#

B7

HA6#

A10

HA7#

F9

HA8#

D8

HA9#

B10

HA10#

E10

HA11#

G10

HA12#

D9

HA13#

E11

HA14#

F10

HA15#

G11

HA16#

G13

HA17#

C10

HA18#

C11

HA19#

D11

HA20#

C12

HA21#

B13

HA22#

A12

HA23#

F12

HA24#

G12

HA25#

E12

HA26#

C13

HA27#

B11

HA28#

D13

HA29#

A13

HA30#

F13

HA31#

A11

HPCREQ#

A7

HREQ#0

D7

HREQ#1

B8

HREQ#2

C7

HREQ#3

A8

HREQ#4

B9

HADSTB#0

E13

HADSTB#1

AB1

HCLKN

AB2

HCLKP

G4

HDSTBN#0

K1

HDSTBN#1

R3

HDSTBN#2

V3

HDSTBN#3

G5

HDSTBP#0

K2

HDSTBP#1

R2

HDSTBP#2

W4

HDSTBP#3

H8

HDINV#0

K3

HDINV#1

T7

HDINV#2

U5

HDINV#3

H10

HCPURST#

F8

HADS#

B5

HTRDY#

G6

HDPWR#

F7

HDRDY#

E6

HDEFER#

F6

HEDRDY#

D6

HHITM#

D4

HHIT#

B3

HLOCK#

E7

HBREQ0#

A5

HBNR#

D5

HBPRI#

C6

HDBSY#

G8

HCPUSLP#

A4

HRS0#

C5

HRS1#

B4

HRS2#

ALVISO_BGA1257

Alviso

HOST

H_SWNG0

C253

HXRCOMP
HXSCOMP
HYRCOMP
HYSCOMP

HXSWING
HYSWING

0.1U_0402_16V4Z

HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

HVREF

1

2

HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#

E4
E1
F4
H7
E2
F1
E3
D3
K7
F2
J7
J8
H6
F3
K8
H5
H1
H2
K5
K6
J4
G3
H3
J1
L5
K4
J5
P7
L7
J3
P5
L3
U7
V6
R6
R5
P3
T8
R7
R8
U8
R4
T4
T5
R1
T3
V8
U6
W6
U3
V5
W8
W7
U2
U1
Y5
Y2
V4
Y7
W1
W3
Y3
Y6
W2

J11
C1
C2
T1
L1
D1
P1

12

R173

221_0603_1%

12

R169

100_0402_1%

4

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_VREF
H_XRCOMP
H_XSCOMP
H_YRCOMP
H_YSCOMP
H_SWNG0
H_SWNG1

H_SWNG1

C247

0.1U_0402_16V4Z

1

2

100mil

12

R165

R170

24.9_0402_1%

10/20 mils

+VCCP+VCCP

12

R168

221_0603_1%

12

R167

100_0402_1%

H_D#[0..63] <4>

+VCCP

12

R163

R164

54.9_0402_1%

12

24.9_0402_1%

12

54.9_0402_1%

1

C237

2

0.1U_0402_16V4Z

Layout Note:
Rote as short
as possible

12

R136

40.2_0402_1%

+VCCP

12

R156

100_0402_1%

12

R160

200_0402_1%

R147

40.2_0402_1%

12

DMI_TXN0<21>
DMI_TXN1<21>
DMI_TXN2<21>
DMI_TXN3<21>

DMI_TXP0<21>
DMI_TXP1<21>
DMI_TXP2<21>
DMI_TXP3<21>

DMI_RXN0<21>
DMI_RXN1<21>
DMI_RXN2<21>
DMI_RXN3<21>

DMI_RXP0<21>
DMI_RXP1<21>
DMI_RXP2<21>
DMI_RXP3<21>

DDR_CLK0<12>
DDR_CLK1<12>

DDR_CLK3<13>
DDR_CLK4<13>

DDR_CLK0#<12>
DDR_CLK1#<12>

DDR_CLK3#<13>
DDR_CLK4#<13>

DDR_CKE0<12>
DDR_CKE2<13>

DDR_CKE3<13>

DDR_SCS#0<12>
DDR_SCS#2<13>

DDR_SCS#3<13>

+2.5V

12

R174

SDREF

R172

12

+2.5V

12

R159 80.6_0402_1%

1 2

R157

80.6_0402_1%

10K_0402_1%

SDREF<12,13>

10K_0402_1%

CFG[2:0]

CFG5

CFG6

CFG7

CFG9

CFG[13:12]

M_OCDOCMP0
M_OCDOCMP1

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

CFG16
(FSB Dynamic
ODT)

CFG18
(VCC Select)

CFG19
(VTT Select)

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

DDR_CLK0
DDR_CLK1

DDR_CLK3
DDR_CLK4

DDR_CLK0#
DDR_CLK1#

DDR_CLK3#
DDR_CLK4#

DDR_CKE0
DDR_CKE2

DDR_CKE3
DDR_SCS#0
DDR_SCS#2

DDR_SCS#3

M_OCDOCMP0
M_OCDOCMP1

SMRCOMPN
SMRCOMPP

SDREF

1

C22

2

0.1U_0402_16V4Z

Refer to sheet 19 for FSB
frequency select

Low = DMI x 2
High = DMI x 4
Low = DDR-II
High = DDR-I
Low = DT/Transportable CPU
High = Mobile CPU
Low = Reverse Lane
High = Normal Operation

00 = Reserved
01 = XOR Mode Enabled
10 = All Z Mode Enabled
11 = Normal Operation (Default)

Low = Disabled
High = Enabled
Low = 1.05V (Default)
High = 1.5V
Low = 1.05V (Default)
High = 1.2V

AA31

DMIRXN0

AB35

DMIRXN1

AC31

DMIRXN2

AD35

DMIRXN3

Y31

DMIRXP0

AA35

DMIRXP1

AB31

DMIRXP2

AC35

DMIRXP3

AA33

DMITXN0

AB37

DMITXN1

AC33

DMITXN2

AD37

DMITXN3
DMITXP0

DMITXP1
DMITXP2
DMITXP3

SM_CK0
SM_CK1
SM_CK2
SM_CK3
SM_CK4
SM_CK5

SM_CK0#
SM_CK1#
SM_CK2#
SM_CK3#
SM_CK4#
SM_CK5#

SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3

SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#

SM_OCDCOMP0
SM_OCDCOMP1
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3

SMRCOMPN
SMRCOMPP
SMVREF0
SMVREF1
SMXSLEWIN
SMXSLEWOUT
SMYSLEWIN
SMYSLEWOUT

ALVISO_BGA1257

DMIDDR MUXING

Y33
AA37
AB33
AC37

AM33

AL1
AE11

AJ34

AF6
AC10

AN33

AK1
AE10

AJ33

AF5
AD10

AP21
AM21
AH21
AK21

AN16
AM14
AH15
AG16

AF22
AF16
AP14

AL15
AM11
AN10

AK10
AK11
AF37

AD1
AE27
AE28

AF9

1

AF10

C252

2

0.1U_0402_16V4Z

*

*

*

*

*

*

*

*

2

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8

CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

RSVD21
RSVD22

CFG/RSVD

RSVD23
RSVD24
RSVD25
RSVD26
RSVD27

BM_BUSY#

EXT_TS0#
EXT_TS1#

THRMTRIP#

PWROK

RSTIN#

PM

DREF_CLKN
DREF_CLKP

DREF_SSCLKP

CLK

DREF_SSCLKN

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9

NC10

NC

NC11

U5B

G16
H13
G14
F16
F15
G15
E16
D17
J16
D15
E15
D14
E14
H12
C14
H15
J15
H14
G22
G23
D23
G25
G24
J17
A31
A30
D26
D25

J23
J21
H22
F5
AD30
AE29

A24
A23
D37
C37

AP37
AN37
AP36
AP2
AP1
AN1
B1
A2
B37
A36
A37

CFG0
MCH_CLKSEL1
MCH_CLKSEL0

T27PAD
T28PAD

CFG5

CFG6

CFG7

CFG9

CFG12

CFG13

CFG16

CFG18

CFG19

PM_EXTTS#0
PM_EXTTS#1

CFG0

R149 10K_0402_5%

CFG[17:3] hav e i n t e r n a l p u l l-up

CFG6

R151 2.2K_0402_5%@

CFG5

R154 2.2K_0402_5%@

CFG7

R146 2.2K_0402_5%@

CFG9

R153 2.2K_0402_5%@

CFG12

R152 2.2K_0402_5%@

CFG13

R158 2.2K_0402_5%@

CFG16

R148 2.2K_0402_5%@

CFG18

R138 2.2K_0402_5%@

CFG19

R134 2.2K_0402_5%@

MCH_CLKSEL1 <18>
MCH_CLKSEL0 <18>

PM_BMBUSY# <21>

H_THERMTRIP# <4,20>
+VCCP_PWRGD <33>
PLTRST_MCH# <19,21,25,27>

DREFCLK# <18>
DREFCLK <18>
SSC_DREFCLK <18>
SSC_DREFCLK# <18>

R141

1 2
1 2
1 2
1 2

1 2
1 2
1 2

1 2
1 2

10K_0402_5%

10K_0402_5%

12

R137

PM_EXTTS#0

PM_EXTTS#1

2.2K/3.5K reserve for choose

2.2K/3.5K reserve for choose

CFG[19:18] have internal pull-down

Title

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, Inc.

Alviso(1 of 5)

LA-2591

1

743Monday, October 11, 2004

+2.5VS

12

12

+VCCP

+2.5VS

0.1

of

5

D D

4

3

2

1

DDR_A_BS#0<12>
DDR_A_BS#1<12>

T23 PAD~D T24 PAD~D

DDR_A_DM[0..7]<12>

DDR_A_DQS[0..7]<12>

C C

DDR_A_MA[0..13]<12>

DDR_A_CAS#<12>
DDR_A_RAS#<12>

T21 PAD~D T25 PAD~D
T22 PAD~D T26 PAD~D

B B

DDR_A_WE#<12>

DDR_A_BS#0
DDR_A_BS#1
DDR_A_BS#2

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13

DDR_A_CAS#
DDR_A_RAS#

TP_MA_RCVENIN#

TP_MA_RCVENOUT#

DDR_A_WE#

AK15
AK16

AL21
AJ37

AP35

AL29

AP24

AK36
AP33
AN29
AP23

AK35
AP34
AN30
AN23

AL17
AP17
AP18

AM17

AN18

AM18

AL19
AP20

AM19

AL20

AM16

AN20

AM20
AM15

AN15
AP16
AF29
AF28
AP15

AP9
AP4

AD3

AM8
AM4

AE5

AN8
AM5
AH1
AE4

AJ2

AJ1

U5C

SA_BS0#
SA_BS1#
SA_BS2#

SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7

SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13

SA_CAS#
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#

SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8

SADQ9
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43

DDR MEMORY SYSTEM A

SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63

ALVISO_BGA1257

AH35
AL35
AL37
AH36
AJ35
AK37
AL34
AM36
AN35
AP32
AM31
AM34
AM35
AL32
AM32
AN31
AP31
AN28
AP28
AL30
AM30
AM28
AL28
AP27
AM27
AM23
AM22
AL23
AM24
AN22
AP22
AM9
AL9
AL6
AP7
AP11
AP10
AL7
AM7
AN5
AN6
AN3
AP3
AP6
AM6
AL4
AM3
AK2
AK3
AG2
AG1
AL3
AM2
AH3
AG3
AF3
AE3
AD6
AC4
AF2
AF1
AD4
AD5

DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

DDR_A_D0

AG35

DDR_A_D[0..63] <12>

This Symbol as same
as Intel CRB
schematic, So Layout
Guide will show these
signals routed
differentially.

DDR_B_BS#0<13>
DDR_B_BS#1<13>

DDR_B_MA[0..13]<13>

DDR_B_CAS#<13>
DDR_B_RAS#<13>

DDR_B_WE#<13>

DDR_B_BS#0
DDR_B_BS#1
DDR_B_BS#2

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13

DDR_B_CAS#
DDR_B_RAS#

TP_MB_RCVENIN#

TP_MB_RCVENOUT#

DDR_B_WE#

AJ15
AG17
AG21

AF32
AK34
AK27
AK24

AJ10

AK5
AE7
AB7

AF34
AK32

AJ28
AK23
AM10

AH6
AF8
AB4

AF35
AK33
AK28

AJ23

AL10

AH7
AF7
AB5

AH17
AK17
AH18

AJ18
AK18

AJ19
AK19
AH19

AJ20
AH20

AJ16
AG18
AG20
AG15

AH14
AK14
AF15
AF14
AH16

U5D

SB_BS0#
SB_BS1#
SB_BS2#

SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7

SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7

SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13

SB_CAS#
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#

AE31

SBDQ0

AE32

SBDQ1

AG32

SBDQ2

AG36

SBDQ3

AE34

SBDQ4

AE33

SBDQ5

AF31

SBDQ6

AF30

SBDQ7

AH33

SBDQ8

AH32

SBDQ9

AK31

SBDQ10

AG30

SBDQ11

AG34

SBDQ12

AG33

SBDQ13

AH31

SBDQ14

AJ31

SBDQ15

AK30

SBDQ16

AJ30

SBDQ17

AH29

SBDQ18

AH28

SBDQ19

AK29

SBDQ20

AH30

SBDQ21

AH27

SBDQ22

AG28

SBDQ23

AF24

SBDQ24

AG23

SBDQ25

AJ22

SBDQ26

AK22

SBDQ27

AH24

SBDQ28

AH23

SBDQ29

AG22

SBDQ30

AJ21

SBDQ31

AG10

SBDQ32

AG9

SBDQ33

AG8

SBDQ34

AH8

SBDQ35

AH11

SBDQ36

AH10

SBDQ37

AJ9

SBDQ38

AK9

SBDQ39

AJ7

SBDQ40

AK6

SBDQ41

AJ4

SBDQ42
SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63

AH5
AK8
AJ8
AJ5
AK4
AG5
AG4
AD8
AD9
AH4
AG6
AE8
AD7
AC5
AB8
AB6
AA8
AC8
AC7
AA4
AA5

DDR SYSTEM MEMORY B

ALVISO_BGA1257

A A

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Title

Size Document Number Rev
Custom

2

Date: Sheet

Compal Electronics, Inc.

Alviso(2 of 5)

LA-2591

1

0.1

of

843Monday, October 11, 2004

5

D D

+2.5VS

R132

CLK_MCH_3GPLL#<18>
CLK_MCH_3GPLL<18>

Y/G<17>

COMP/B<17>

C/R<17>

C C

CRT_BLU<17>
CRT_GRN<17>
CRT_RED<17>

+2.5VS

R133 2.2K_0402_5%
R140 2.2K_0402_5%

LCD_CLK
LCD_DAT

R128 1.5K_0402_1%

1 2
1 2

B B

A A

R131

R142

4.99K_0603_1%

CLK_DDC2<17>
DAT_DDC2<17>

VSYNC<17>
HSYNC<17>

BIA<16>
BK_EN<16>

LCD_CLK<16>
LCD_DAT<16>
EN_LCDVDD<16>

12

LVDS_AC-<16>
LVDS_AC+<16>

LVDS_A0-<16>
LVDS_A1-<16>
LVDS_A2-<16>

LVDS_A0+<16>
LVDS_A1+<16>
LVDS_A2+<16>

4

Striping: SDVOCTRL_DATA
0=No SDVO Device Present (default)
1=SDVO Device Present
SDVOCTRL_DATA/SDVOCTRL_CLK have internal pull down resistor

3.6K_0402_5% @

1 2
1 2

3.6K_0402_5%@

12

CLK_DDC2
DAT_DDC2

1 2

R143

NONVGA@

255_0402_1%

BIA
BK_EN

LCD_CLK
LCD_DAT
EN_LCDVDD

LVDS_AC­LVDS_AC+

LVDS_A0­LVDS_A1­LVDS_A2-

LVDS_A0+
LVDS_A1+
LVDS_A2+

AB29
AC29

H24
H25

A15
C16
A17

J18
B15
B16
B17

E24
E23
E21
D21
C20
B20
A19
B19
H21
G21

J20

E25
F25
C23
C22
F23
F22
F26
C33
C31
F28
F27

B30
B29
C25
C24

B34
B33
B32

A34
A33
B31

C29
D28
C27

C28
D27
C26

SDVOCTRL_DATA
SDVOCTRL_CLK
GCLKN
GCLKP

TVDAC_A
TVDAC_B
TVDAC_C
TV_REFSET
TV_IRTNA
TV_IRTNB
TV_IRTNC

DDCCLK
DDCDATA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
VSYNC
HSYNC
REFSET

LBKLT_CTL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL

LACLKN
LACLKP
LBCLKN
LBCLKP

LADATAN0
LADATAN1
LADATAN2

LADATAP0
LADATAP1
LADATAP2

LBDATAN0
LBDATAN1
LBDATAN2

LBDATAP0
LBDATAP1
LBDATAP2

EXP_RXN0/SDVO_TVCLKIN#

EXP_RXN1/SDVO_INT#

MISCTVVGALVDS

EXP_RXN2/SDVO_FLDSTALL#

EXP_RXP0/SDVO_TVCLKIN

EXP_RXP1/SDVO_INT

EXP_RXP2/SDVO_FLDSTALL

EXP_TXN0/SDVOB_RED#

EXP_TXN1/SDVOB_GREEN#

EXP_TXN2/SDVOB_BLUE#

EXP_TXN3/SDVOB_CLKN
EXP_TXN4/SDVOC_RED#

EXP_TXN5/SDVOC_GREEN#

EXP_TXN6/SDVOC_BLUE#

EXP_TXN7/SDVOC_CLKN

PCI - EXPRESS GRAPHICS

EXP_TXP0/SDVOB_RED

EXP_TXP1/SDVOB_GREEN

EXP_TXP2/SDVOB_BLUE
EXP_TXP3/SDVOB_CLKP

EXP_TXP4/SDVOC_RED

EXP_TXP5/SDVOC_GREEN

EXP_TXP6/SDVOC_BLUE
EXP_TXP7/SDVOC_CLKP

EXP_COMPI

EXP_ICOMPO

EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8

EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15

EXP_RXP3

EXP_RXP4

EXP_RXP5

EXP_RXP6

EXP_RXP7

EXP_RXP8

EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15

EXP_TXN8

EXP_TXN9
EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15

EXP_TXP8

EXP_TXP9

EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15

ALVISO_BGA1257

U5G

D36
D34

E30
F34
G30
H34
J30
K34
L30
M34
N30
P34
R30
T34
U30
V34
W30
Y34

D30
E34
F30
G34
H30
J34
K30
L34
M30
N34
P30
R34
T30
U34
V30
W34

E32
F36
G32
H36
J32
K36
L32
M36
N32
P36
R32
T36
U32
V36
W32
Y36

D32
E36
F32
G36
H32
J36
K32
L36
M32
N36
P32
R36
T32
U36
V32
W36

3

+1.5VS_PCIE

PEG_RXN[0..15] <16>

PEG_RXP[0..15] <16>

This Symbol as same
as Intel CRB
schematic, So Layout
Guide will show these
signals routed
differentially.

PEG_TXN[0..15] <16>

PEG_TXP[0..15] <16>

PEGCOMP

PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15

PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15

PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15

PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15

R125

24.9_0402_1%

1 2

PEG_RXN[0..15]

PEG_RXP[0..15]

PEG_TXN[0..15]

PEG_TXP[0..15]

2

1

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, Inc.

Alviso(3 of 5)

LA-2591

1

0.1

of

943Monday, October 11, 2004

5

K13

VTT0

J13

VTT1

K12

VTT2

W11

VTT3

V11

VTT4

U11

VTT5

T11

VTT6

R11

VTT7

P11

POWER

VTT8

N11

VTT9

M11

D D

+VCCP

1

C217

C232

2

4.7U_0805_10V4Z

2.2U_0603_6.3V4Z

1

C65

C C

0.47U_0603_16V7K

2

1

1

C245

2

2

0.47U_0603_16V7K

CHB1608U301_0603

+1.5VS

B B

L11
K11

W10

V10
U10
T10
R10
P10
N10

M10

K10

J10

1

Y9

W9

U9

2

R9

P9
N9
M9

L9

J9
N8
M8
N7
M7
N6
M6

A6
N5
M5
N4
M4
N3
M3
N2
M2

B2

V1
N1
M1
G1

1

C254

C244

2

0.22U_0603_16V4Z

L6

1 2

0.22U_0603_16V4Z

VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51

+1.5VS_DPLLA

1

C205

+

2

0.1U_0402_16V4Z

330U_D2E_2.5VM

C209

1

2

U5F

VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8

VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37
VCCSM38
VCCSM39
VCCSM40
VCCSM41
VCCSM42
VCCSM43
VCCSM44
VCCSM45
VCCSM46
VCCSM47
VCCSM48
VCCSM49
VCCSM50
VCCSM51
VCCSM52
VCCSM53
VCCSM54
VCCSM55
VCCSM56
VCCSM57
VCCSM58
VCCSM59
VCCSM60
VCCSM61
VCCSM62
VCCSM63
VCCSM64

ALVISO_BGA1257

AM37
AH37
AP29
AD28
AD27
AC27
AP26
AN26
AM26
AL26
AK26
AJ26
AH26
AG26
AF26
AE26
AP25
AN25
AM25
AL25
AK25
AJ25
AH25
AG25
AF25
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AE17
AE16
AE15
AE14
AP13
AN13
AM13
AL13
AK13
AJ13
AH13
AG13
AF13
AE13
AP12
AN12
AM12
AL12
AK12
AJ12
AH12
AG12
AF12
AE12
AD11
AC11
AB11
AB10
AB9
AP8
AM1
AE1

V2.5_DDR_CAP1
V2.5_DDR_CAP2
V2.5_DDR_CAP5

V2.5_DDR_CAP6
V2.5_DDR_CAP4
V2.5_DDR_CAP3

C230

V2.5_DDR_CAP1
V2.5_DDR_CAP2
V2.5_DDR_CAP5

Note : All VCCSM pin
shorted internally.

V2.5_DDR_CAP6
V2.5_DDR_CAP4
V2.5_DDR_CAP3

Note: Place near chip.

10U_0805_6.3V6M

C201

C236

1

1

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C211

2

2

C248

10U_0805_6.3V6M

C235

+2.5V

C35

4

+VCCP

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C24

+2.5V

C198

0.1U_0402_16V4Z

1

2

1

C212

2

10U_0805_6.3V6M

+1.5VS

+1.5VS_DPLLA
+1.5VS_DPLLB

+1.5VS_HPLL
+1.5VS_MPLL

0.1U_0402_16V4Z

C202

2

0.1U_0402_16V4Z

1

1

2

0.1U_0402_16V4Z

1

2

1

+

2

0.1U_0402_16V4Z

1

2

1

C23

C192

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C246

C239

1

1

2

2

@

330U_D2E_2.5VM

0.1U_0402_16V4Z

1

1

C199

C234

2

2

W=20 mils

T29

VCC0

R29

VCC1

N29

VCC2

M29

VCC3

K29

VCC4

J29

VCC5

V28

VCC6

U28

VCC7

T28

VCC8

R28

VCC9

P28

VCC10

N28

VCC11

M28

VCC12

L28

VCC13

K28

VCC14

J28

VCC15

H28

VCC16

G28

VCC17

V27

VCC18

U27

VCC19

T27

VCC20

R27

VCC21

P27

VCC22

N27

VCC23

M27

VCC24

L27

VCC25

K27

VCC26

J27

VCC27

H27

VCC28

K26

VCC29

H26

VCC30

K25

VCC31

J25

VCC32

K24

VCC33

K23

VCC34

K22

VCC35

K21

VCC36

W20

VCC37

U20

VCC38

T20

VCC39

K20

VCC40

V19

VCC41

U19

VCC42

K19

VCC43

W18

VCC44

V18

VCC45

T18

VCC46

K18

VCC47

K17

VCC48

AC1

VCCD_HMPLL1

AC2

VCCD_HMPLL2

B23

VCCA_DPLLA

C35

VCCA_DPLLB

AA1

VCCA_HPLL

AA2

VCCA_MPLL

3

POWER

VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1

VCCA_TVBG
VSSA_TVBG

VCCD_TVDAC

VCCDQ_TVDAC

VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2

VCCA_LVDS

VCCHV0
VCCHV1
VCCHV2

VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2

VCCA_SM0
VCCA_SM1
VCCA_SM2
VCCA_SM3

VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6

VCCA_3GPLL0
VCCA_3GPLL1
VCCA_3GPLL2

VCCA_3GBG
VSSA_3GBG

VCC_SYNC

VCCA_CRTDAC0
VCCA_CRTDAC1

VSSA_CRTDAC

ALVISO_BGA1257

U5E

F17
E17
D18
C18
F18
E18

H18
G18

D19
H17

B26
B25
A25

A35
B22

B21
A21

B28
A28
A27

AF20
AP19
AF19
AF18

AE37
W37
U37
R37
N37
L37
J37

Y29
Y28
Y27

F37
G37

H20
F19

E19
G19

1

C225

2

0.1U_0402_16V4Z

+1.5VS

+2.5VS
+2.5VS

+2.5VS

4.7U_0805_10V4Z

1

C222

C44

2

0.1U_0402_16V4Z

+2.5VS_CRT_DAC

C221

0.1U_0402_16V4Z

+3VS

1

2

C227

0.022U_0402_16V7K

1

1

C224

2

2

C226

C218

0.022U_0402_16V7K

0.1U_0402_16V4Z

C196

1

+

2

100U_D2_6.3VM

1 2

0_0603_5%

1

1

2

2

C220

0.022U_0402_16V7K

0.1U_0402_16V4Z

1

1

2

2

+1.5VS_PCIE

1

+

C16

2

C28

220U_D2_4VM

R19

Route VSSA3GBG gnd from GMCH to
decoupling cap ground lead and
then connect to the gnd plane.

CRTDAC: Route caps within
250mil of Alviso. Route FB
within 3" of Alviso.

Route VSSACRTDAC gnd from GMCH to
decouplin g cap ground lead and then
connect to the gnd plane.

2

Route VSSATVBG gnd from GMCH to
decoupling cap ground lead and
then connect to the gnd plane.

1

1

2

2

C228 0.022U_0402_16V7K

C195

0.1U_0402_16V4Z

1

C17

2

10U_0805_6.3V6M

10U_0805_6.3V6M

+2.5VS

1

+1.5VS

1

1

2

2

C200

+1.5VS

0.1U_0402_16V4Z
C203 0.022U_0402_16V7K

1

1

C216

2

2

C249

0.1U_0402_16V4Z
C204 0.022U_0402_16V7K

1

2

1

C193

2

0.1U_0402_16V4Z

1

2

C194

10U_0805_6.3V6M

0.1U_0402_16V4Z

1

C214

2

R13

0.5_0805_1%

1 2

1

2

0.1U_0402_16V4Z

C215

3GRLL_R

1

2

+2.5VS+2.5VS

10U_0805_6.3V6M

1

1

C182

2

2

0.01U_0402_16V7K

L7

BLM18PG600SN1_0603

L1

BLM18PG600SN1_0603

L3

BLM18PG600SN1_0603

L2

CHB1608U301_0603

C20

0.1U_0402_16V4Z

C185

12

0.1U_0402_16V4Z

12

12

12

1

2

+1.5VS+1.5VS_3GPLL

C21

1

2

0.1U_0402_16V4Z

+2.5VS+2.5VS_3GBG

+2.5VS

1

C38

2

10U_0805_6.3V6M

+1.5VS

C18

0.1U_0402_16V4Z

1

C19

0.1U_0402_16V4Z

2

1

C40

2

0.1U_0402_16V4Z

+1.5VS+1.5VS_DDRDLL

1

C243

2

1

2

0.1U_0402_16V4Z

CHB1608U301_0603

+1.5VS

A A

1 2

C188

0.1U_0402_16V4Z

330U_D2E_2.5VM

1

C186

1

+

2

2

5

+1.5VS

CHB1608U301_0603

1 2

+1.5VS_DPLLB

L5

+1.5VS_HPLL

L9

C73

0.1U_0402_16V4Z

330U_D2E_2.5VM

1

C250

1

+

2

2

+1.5VS

4

CHB1608U301_0603

1 2

+1.5VS_MPLL

L8

1

1

+

C242

C255

2

2

0.1U_0402_16V4Z

330U_D2E_2.5VM

Compal Electronics, Inc.

Alviso(4 of 5)

LA-2591

1

0.1

of

10 43Monday, October 11, 2004

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Title

Size Document Number Rev
Custom

Date: Sheet

5

4

3

2

1

D D

C C

B B

A A

+VCCP

W12

W13

AA12
AA13

W14

AA14
AB14

W15

AA15
AB15

W16

AA16
AB16

AA17
AB17
AA18
AB18
AA19
AB19
AA20
AB20

AA21
AB21

AA22
AB22

AA23
AB23

AA24
AB24

AA25
AB25

AA26
AB26

W25

W26

L12
M12
N12

P12
R12

T12
U12

V12

L13
M13
N13

P13
R13

T13
U13

V13

Y12

Y13

L14
M14
N14

P14
R14

T14
U14

V14

Y14

L15
M15
N15

P15
R15

T15
U15

V15

Y15

L16
M16
N16

P16
R16

T16
U16

V16

Y16

R17

Y17

R21

Y21

Y22

Y23

Y24

Y25

Y26

V25

L26
M26
N26

P26
R26

T26
U26

V26

VTT_NCTF17
VTT_NCTF16
VTT_NCTF15
VTT_NCTF14
VTT_NCTF13
VTT_NCTF12
VTT_NCTF11
VTT_NCTF10
VTT_NCTF9
VTT_NCTF8
VTT_NCTF7
VTT_NCTF6
VTT_NCTF5
VTT_NCTF4
VTT_NCTF3
VTT_NCTF2
VTT_NCTF1
VTT_NCTF0

VSS_NCTF68
VSS_NCTF67
VSS_NCTF66
VSS_NCTF65
VSS_NCTF64
VSS_NCTF63
VSS_NCTF62
VSS_NCTF61
VSS_NCTF60
VSS_NCTF59
VSS_NCTF58
VSS_NCTF57
VSS_NCTF56
VSS_NCTF55
VSS_NCTF54
VSS_NCTF53
VSS_NCTF52
VSS_NCTF51
VSS_NCTF50
VSS_NCTF49
VSS_NCTF48
VSS_NCTF47
VSS_NCTF46
VSS_NCTF45
VSS_NCTF44
VSS_NCTF43
VSS_NCTF42
VSS_NCTF41
VSS_NCTF40
VSS_NCTF39
VSS_NCTF38
VSS_NCTF37
VSS_NCTF36
VSS_NCTF35
VSS_NCTF34
VSS_NCTF33
VSS_NCTF32
VSS_NCTF31
VSS_NCTF30
VSS_NCTF29
VSS_NCTF28
VSS_NCTF27
VSS_NCTF26
VSS_NCTF25
VSS_NCTF24
VSS_NCTF23
VSS_NCTF22
VSS_NCTF21
VSS_NCTF20
VSS_NCTF19
VSS_NCTF18
VSS_NCTF17
VSS_NCTF16
VSS_NCTF15
VSS_NCTF14
VSS_NCTF13
VSS_NCTF12
VSS_NCTF11
VSS_NCTF10
VSS_NCTF9
VSS_NCTF8
VSS_NCTF7
VSS_NCTF6
VSS_NCTF5
VSS_NCTF4
VSS_NCTF3
VSS_NCTF2
VSS_NCTF1
VSS_NCTF0

VCC_NCTF10
VCC_NCTF9
VCC_NCTF8
VCC_NCTF7
VCC_NCTF6
VCC_NCTF5
VCC_NCTF4
VCC_NCTF3
VCC_NCTF2
VCC_NCTF1
VCC_NCTF0

5

VCCSM_NCTF31
VCCSM_NCTF30
VCCSM_NCTF29
VCCSM_NCTF28
VCCSM_NCTF27
VCCSM_NCTF26
VCCSM_NCTF25
VCCSM_NCTF24
VCCSM_NCTF23
VCCSM_NCTF22
VCCSM_NCTF21
VCCSM_NCTF20
VCCSM_NCTF19
VCCSM_NCTF18
VCCSM_NCTF17
VCCSM_NCTF16
VCCSM_NCTF15
VCCSM_NCTF14
VCCSM_NCTF13
VCCSM_NCTF12
VCCSM_NCTF11
VCCSM_NCTF10

VCCSM_NCTF9
VCCSM_NCTF8
VCCSM_NCTF7
VCCSM_NCTF6
VCCSM_NCTF5
VCCSM_NCTF4
VCCSM_NCTF3
VCCSM_NCTF2
VCCSM_NCTF1
VCCSM_NCTF0

VCC_NCTF78
VCC_NCTF77
VCC_NCTF76
VCC_NCTF75
VCC_NCTF74
VCC_NCTF73
VCC_NCTF72
VCC_NCTF71
VCC_NCTF70

NCTF

VCC_NCTF69
VCC_NCTF68
VCC_NCTF67
VCC_NCTF66
VCC_NCTF65
VCC_NCTF64
VCC_NCTF63
VCC_NCTF62
VCC_NCTF61
VCC_NCTF60
VCC_NCTF59
VCC_NCTF58
VCC_NCTF57
VCC_NCTF56
VCC_NCTF55
VCC_NCTF54
VCC_NCTF53
VCC_NCTF52
VCC_NCTF51
VCC_NCTF50
VCC_NCTF49
VCC_NCTF48
VCC_NCTF47
VCC_NCTF46
VCC_NCTF45
VCC_NCTF44
VCC_NCTF43
VCC_NCTF42
VCC_NCTF41
VCC_NCTF40
VCC_NCTF39
VCC_NCTF38
VCC_NCTF37
VCC_NCTF36
VCC_NCTF35
VCC_NCTF34
VCC_NCTF33
VCC_NCTF32
VCC_NCTF31
VCC_NCTF30
VCC_NCTF29
VCC_NCTF28
VCC_NCTF27
VCC_NCTF26
VCC_NCTF25
VCC_NCTF24
VCC_NCTF23
VCC_NCTF22
VCC_NCTF21
VCC_NCTF20
VCC_NCTF19
VCC_NCTF18
VCC_NCTF17
VCC_NCTF16
VCC_NCTF15
VCC_NCTF14
VCC_NCTF13
VCC_NCTF12
VCC_NCTF11

ALVISO_BGA1257

U5H

+2.5V

AB12
AC12
AD12
AB13
AC13
AD13
AC14
AD14
AC15
AD15
AC16
AD16
AC17
AD17
AC18
AD18
AC19
AD19
AC20
AD20
AC21
AD21
AC22
AD22
AC23
AD23
AC24
AD24
AC25
AD25
AC26
AD26

L17

+VCCP
M17
N17

P17
T17
U17
V17
W17
L18
M18
N18
P18
R18
Y18
L19
M19
N19
P19
R19
Y19
L20
M20
N20
P20
R20
Y20
L21
M21
N21
P21
T21
U21
V21
W21
L22
M22
N22
P22
R22
T22
U22
V22
W22
L23
M23
N23
P23
R23
T23
U23
V23
W23
L24
M24
N24
P24
R24
T24
U24
V24
W24
L25
M25
N25
P25
R25
T25
U25

4

AA10

AD2
AE2
AH2
AL2
AN2

AA3
AB3
AC3

AF4
AN4

AL5
AP5

AA6
AC6
AE6

AA7
AG7
AK7
AN7

AL8

AA9
AC9
AE9
AH9
AN9
D10

Y10

H11
Y11

Y1
D2
G2

J2

L2
P2
T2
V2

A3
C3

AJ3

C4
H4

L4
P4
U4
Y4

E5

W5

B6

J6

L6
P6
T6

AJ6

G7
V7

C8
E8

L8
P8
Y8

A9
H9
K9
T9
V9

L10

F11

VSS271
VSS270
VSS269
VSS268
VSS260
VSS259
VSS258
VSS257
VSS256
VSS255
VSS254
VSS253
VSS252
VSS251
VSS250
VSS249
VSS248
VSS247
VSS246
VSS245
VSS244
VSS243
VSS242
VSS241
VSS240
VSS239
VSS238
VSS237
VSS236
VSS235
VSS234
VSS233
VSS232
VSS231
VSS230
VSS229
VSS228
VSS227
VSS226
VSS225
VSS224
VSS223
VSS222
VSS221
VSS220
VSS219
VSS218
VSS217
VSS216
VSS215
VSS214
VSS213
VSS212
VSS211
VSS210
VSS209
VSS208
VSS207
VSS206
VSS205
VSS204
VSS203
VSS202
VSS201
VSS200
VSS199
VSS198
VSS197
VSS196

ALVISO_BGA1257

VSS

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

VSSALVDS

VSS195
VSS194
VSS193
VSS192
VSS191
VSS190
VSS189
VSS188
VSS187
VSS186
VSS185
VSS184
VSS183
VSS182
VSS181
VSS180
VSS179
VSS178
VSS177
VSS176
VSS175
VSS174
VSS173
VSS172
VSS171
VSS170
VSS169
VSS168
VSS167
VSS166
VSS165
VSS164
VSS163
VSS162
VSS161
VSS160
VSS159
VSS158
VSS157
VSS156
VSS155
VSS154
VSS153
VSS152
VSS151
VSS150
VSS149
VSS148
VSS147
VSS146
VSS145
VSS144
VSS143
VSS142
VSS141
VSS140
VSS139
VSS138
VSS137
VSS136
VSS135
VSS134
VSS133
VSS132
VSS131
VSS130

U5I

B36
AA11

AF11
AG11
AJ11
AL11
AN11
B12
D12
J12
A14
B14
F14
J14
K14
AG14
AJ14
AL14
AN14
C15
K15
A16
D16
H16
K16
AL16
C17
G17
AF17
AJ17
AN17
A18
B18
U18
AL18
C19
H19
J19
T19
W19
AG19
AN19
A20
D20
E20
F20
G20
V20
AK20
C21
F21
AF21
AN21
A22
D22
E22
J22
AH22
AL22
H23
AF23
B24
D24
F24
J24
AG24
AJ24

AL24

VSS267

AN24

VSS266

A26

VSS265

E26

VSS264

G26

VSS263

J26

VSS262

B27

VSS261

E27

VSS129

G27

VSS128

W27

VSS127

AA27

VSS126

AB27

VSS125
VSS124
VSS123
VSS122
VSS121
VSS120
VSS119
VSS118
VSS117
VSS116
VSS115
VSS114
VSS113
VSS112
VSS111
VSS110
VSS109
VSS108
VSS107
VSS106
VSS105
VSS104
VSS103
VSS102
VSS101
VSS100
VSS99
VSS98
VSS97
VSS96
VSS95
VSS94
VSS93
VSS92
VSS91
VSS90
VSS89
VSS88
VSS87
VSS86
VSS85
VSS84
VSS83
VSS82
VSS81
VSS80
VSS79
VSS78
VSS77
VSS76
VSS75
VSS74
VSS73
VSS72
VSS71
VSS70
VSS69
VSS68

VSS

Title

Size Document Number Rev
Custom

Date: Sheet

AF27
AG27

AJ27
AL27

AN27

E28

W28
AA28
AB28
AC28

A29
D29
E29
F29
G29
H29

L29
P29
U29
V29

W29
AA29
AD29
AG29

AJ29

AM29

C30

Y30
AA30
AB30
AC30
AE30
AP30

D31

E31

F31

G31

H31

J31

K31

L31

M31

N31

P31

R31

T31

U31

V31

W31
AD31
AG31

AL31

A32
C32

Y32
AA32
AB32

2

U5J

AC32

VSS67

AD32

VSS66

AJ32

VSS65

AN32

VSS64

D33

VSS63

E33

VSS62

F33

VSS61

G33

VSS60

H33

VSS59

J33

VSS58

K33

VSS57

L33

VSS56

M33

VSS55

N33

VSS54

P33

VSS53

R33

VSS52

T33

VSS51

U33

VSS50

V33

VSS49

W33

VSS48

AD33

VSS47

AF33

VSS46

AL33

VSS45

C34

VSS44

AA34

VSS43

AB34

VSS42

AC34

VSS41

AD34

VSS40

AH34

VSS39

AN34

VSS38

B35

VSS37

D35

VSS36

E35

VSS35

F35

VSS34

G35

VSS33

H35

VSS32

J35

VSS31

K35

VSS30

L35

VSS29

M35

VSS28

N35

VSS27

P35

VSS26

R35

VSS25

T35

VSS24

U35

VSS23

V35

VSS22

W35

VSS21

Y35

VSS20

AE35

VSS19

C36

VSS18

AA36

VSS17

AB36

VSS16

AC36

VSS15

AD36

VSS14

AE36

VSS13

AF36

VSS12

AJ36

VSS11

AL36

VSS10

AN36

VSS9

E37

VSS8

H37

VSS7

K37

VSS6

M37

VSS5

P37

VSS4

T37

VSS3

V37

VSS2

Y37

VSS1

AG37

VSS0

ALVISO_BGA1257

Compal Electronics, Inc.

Alviso(5 of 5)

LA-2591

1

0.1

of

11 43Monday, October 11, 2004

A

DDR_A_D[0..63]<8>

DDR_A_DQS[0..7]<8>

1 1

2 2

3 3

4 4

DDR_A_D[0..63]
DDR_A_DM[0..7] DDR_A_MA[0..13]
DDR_A_DQS[0..7]

DDR_A_D0
DDR_A_D1
DDR_A_D4
DDR_A_D5

DDR_A_DM0
DDR_A_DQS0

DDR_A_D6
DDR_A_D2
DDR_A_D3
DDR_A_D7

DDR_A_D8
DDR_A_D13
DDR_A_D9
DDR_A_D12

DDR_A_DM1 DDR_DM1
DDR_A_DQS1 DDR_DQS1

DDR_A_D14
DDR_A_D15
DDR_A_D10
DDR_A_D11

DDR_A_D17
DDR_A_D16
DDR_A_D21
DDR_A_D20

DDR_A_DM2 DDR_DM2
DDR_A_DQS2 DDR_DQS2

DDR_A_D19
DDR_A_D18
DDR_A_D22
DDR_A_D23

DDR_A_D24
DDR_A_D25
DDR_A_D29
DDR_A_D26

DDR_A_DQS3 DDR_DQS3
DDR_A_DM3 DDR_DM3

DDR_A_D28
DDR_A_D30
DDR_A_D31
DDR_A_D27

DDR_A_D36
DDR_A_D37
DDR_A_D33
DDR_A_D32

DDR_A_DQS4 DDR_DQS4
DDR_A_DM4 DDR_DM4

DDR_A_D38
DDR_A_D39
DDR_A_D35
DDR_A_D34

DDR_A_D45
DDR_A_D44
DDR_A_D41
DDR_A_D40

DDR_A_DQS5 DDR_DQS5
DDR_A_DM5 DDR_DM5

DDR_A_D46
DDR_A_D47
DDR_A_D43
DDR_A_D42

DDR_A_D49
DDR_A_D52
DDR_A_D53
DDR_A_D48

DDR_A_DM6 DDR_DM6
DDR_A_DQS6

DDR_A_D54
DDR_A_D55
DDR_A_D50
DDR_A_D51

DDR_A_D61
DDR_A_D60
DDR_A_D56
DDR_A_D57

DDR_A_DM7 DDR_DM7
DDR_A_DQS7 DDR_DQS7

DDR_A_D62
DDR_A_D59
DDR_A_D63
DDR_A_D58

A

RP22

4 5
3 6
2 7
1 8

1 2

R118 10_0402_5%

1 2

RP23

R111 10_0402_5%

4 5
3 6
2 7
1 8

RP24

4 5
3 6
2 7
1 8

1 2

R121 10_0402_5%

1 2

R123 10_0402_5%

RP25

4 5
3 6
2 7
1 8

RP28

4 5
3 6
2 7
1 8

1 2

R127 10_0402_5%

1 2

R126 10_0402_5%

RP29

4 5
3 6
2 7
1 8

RP30

4 5
3 6
2 7
1 8

1 2

R129 10_0402_5%

1 2

RP33

R130 10_0402_5%

4 5
3 6
2 7
1 8

RP34

4 5
3 6
2 7
1 8

1 2

R144 10_0402_5%

1 2

R145 10_0402_5%

RP35

4 5
3 6
2 7
1 8

RP36

4 5
3 6
2 7
1 8

1 2

R155 10_0402_5%

1 2

R150 10_0402_5%

RP37

4 5
3 6
2 7
1 8

RP38

4 5
3 6
2 7
1 8

1 2

R161 10_0402_5%

1 2

R162 10_0402_5%

RP39

4 5
3 6
2 7
1 8

RP40

4 5
3 6
2 7
1 8

1 2

R171 10_0402_5%

1 2

R166 10_0402_5%

RP41

4 5
3 6
2 7
1 8

B

DDR_D[0..63]

DDR_DM[0..7]

DDR_DQS[0..7]

10_1206_8P4R_5%

10_1206_8P4R_5%

10_1206_8P4R_5%

10_1206_8P4R_5%

10_1206_8P4R_5%

10_1206_8P4R_5%

10_1206_8P4R_5%

10_1206_8P4R_5%

10_1206_8P4R_5%

10_1206_8P4R_5%

10_1206_8P4R_5%

10_1206_8P4R_5%

10_1206_8P4R_5%

10_1206_8P4R_5%

10_1206_8P4R_5%

10_1206_8P4R_5%

B

DDR_D0
DDR_D1
DDR_D4
DDR_D5

DDR_DM0
DDR_DQS0

DDR_D6
DDR_D2
DDR_D3
DDR_D7

DDR_D8
DDR_D13
DDR_D9
DDR_D12

DDR_D14
DDR_D15
DDR_D10
DDR_D11

DDR_D17
DDR_D16
DDR_D21
DDR_D20

DDR_D19
DDR_D18
DDR_D22
DDR_D23

DDR_D24
DDR_D25
DDR_D29
DDR_D26

DDR_D28
DDR_D30
DDR_D31
DDR_D27

DDR_D36
DDR_D37
DDR_D33
DDR_D32

DDR_D38
DDR_D39
DDR_D35
DDR_D34

DDR_D45
DDR_D44
DDR_D41
DDR_D40

DDR_D46
DDR_D47
DDR_D43
DDR_D42

DDR_D49
DDR_D52
DDR_D53
DDR_D48

DDR_DQS6
DDR_D54

DDR_D55
DDR_D50
DDR_D51

DDR_D61
DDR_D60
DDR_D56
DDR_D57

DDR_D62
DDR_D59
DDR_D63
DDR_D58

DDR_D[0..63] <13>

DDR_DM[0..7] <13>

DDR_DQS[0..7] <13>

DDR_CLK1<7>
DDR_CLK1#<7>

DDR_CLK0<7>
DDR_CLK0#<7>

DDR_CKE0<7>

DDR_A_BS#0<8>
DDR_A_BS#1<8>

DDR_SCS#0<7>

DDR_A_RAS#<8>
DDR_A_CAS#<8>
DDR_A_WE#<8>

+1.25VS

RP26

4 5
3 6
2 7
1 8

RP27

4 5
3 6
2 7
1 8

RP32

4 5
3 6
2 7
1 8

RP31

4 5
3 6
2 7
1 8

1 2

R124 56_0402_5%

1 2

R122 56_0402_5%

1 2

R139 56_0402_5%

1 2

R119 56_0402_5%

1 2

R135 56_0402_5%

C

DDR_A_MA[0..13]<8>DDR_A_DM[0..7]<8>

56_1206_8P4R_5%

56_1206_8P4R_5%

56_1206_8P4R_5%

56_1206_8P4R_5%

C

DDR_CLK1
DDR_CLK1#

DDR_CLK0
DDR_CLK0#

DDR_CKE0

DDR_A_BS#0
DDR_A_BS#1

DDR_SCS#0

DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#

DDR_A_BS#0

DDR_A_MA12

DDR_A_BS#1

DDR_A_MA10

DDR_A_MA1
DDR_A_MA2
DDR_A_MA5
DDR_A_MA3

DDR_A_MA4
DDR_A_MA6
DDR_A_MA0
DDR_A_MA7

DDR_A_MA8

DDR_A_MA9
DDR_A_MA11
DDR_A_MA13

DDR_CKE0

DDR_SCS#0

DDR_A_WE#
DDR_A_RAS#
DDR_A_CAS#

D

SDREF<7,13>

C25

0.1U_0402_16V4Z

Close
pin49

0.1U_0402_16V4Z

Close
pin49

D

E

F

+2.5V

U2

16

LDQS

20

LDM

2

DQ0

4

DQ1

5

DQ2

7

DQ3

8

DQ4

10

DQ5

11

DQ6

13

DQ7

51

UDQS

47

UDM

54

DQ8

56

DQ9

57

DQ10

59

DQ11

60

DQ12

62

DQ13

63

DQ14

65

DQ15

49

VREF

29

A0

30

A1

31

A2

32

A3

35

A4

36

A5

37

A6

38

A7

39

A8

40

A9

28

AP/A10

41

A11

42

A12

HY5DU121622A(L)T-J_TSOPII66

VDD0
VDD1

VDD2
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4

RAS#

CAS#

VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4

VSS0
VSS1
VSS2

CKE

WE#

NC0
NC1
NC2
NC3
NC4
NC5
NC6

CK#

BA0
BA1

CS#

1

1 2

C4 0.1U_0402_16V4Z

18
33

1 2

C137 0.1U_0402_16V4Z

3
9

1 2

C27 0.1U_0402_16V4Z

15
55

1 2

C26 0.1U_0402_16V4Z

61
14

DDR_A_MA13

17
19
25
43
50
53

DDR_CLK0

45

CK

DDR_CLK0#

46

DDR_CKE0

44

DDR_A_BS#0

26

DDR_A_BS#1

27
24

23
22
21

6
12
52
58
64
34
48
66

DDR_SCS#0DDR_A_MA0
DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#

C56

0.1U_0402_16V4Z

Close
pin49

SDREF

1

2

DDR_DQS0
DDR_DM0
DDR_D0
DDR_D1
DDR_D4
DDR_D5
DDR_D6
DDR_D2
DDR_D3
DDR_D7

DDR_DQS1
DDR_DM1
DDR_D8
DDR_D13
DDR_D9
DDR_D12
DDR_D14
DDR_D15
DDR_D10
DDR_D11

DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12

+2.5V

DDR_DQS4
DDR_DM4
DDR_D36
DDR_D37
DDR_D33
DDR_D32
DDR_D38
DDR_D39
DDR_D35
DDR_D34

DDR_DQS5
DDR_DM5
DDR_D45
DDR_D44
DDR_D41
DDR_D40
DDR_D46
DDR_D47
DDR_D43
DDR_D42

SDREF

DDR_A_MA0

1

DDR_A_MA1
DDR_A_MA2

C41

DDR_A_MA3

2

DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

U4

16

LDQS

20

LDM

2

DQ0

4

DQ1

5

DQ2

7

DQ3

8

DQ4

10

DQ5

11

DQ6

13

DQ7

51

UDQS

47

UDM

54

DQ8

56

DQ9

57

DQ10

59

DQ11

60

DQ12

62

DQ13

63

DQ14

65

DQ15

49

VREF

29

A0

30

A1

31

A2

32

A3

35

A4

36

A5

37

A6

38

A7

39

A8

40

A9

28

AP/A10

41

A11

42

A12

HY5DU121622A(L)T-J_TSOPII66

VDD0

VDD1

VDD2
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4

RAS#

CAS#

VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4

VSS0
VSS1
VSS2

E

NC0
NC1
NC2
NC3
NC4
NC5
NC6

CK#
CKE

BA0
BA1

CS#

WE#

1

1 2

C30 0.1U_0402_16V4Z

18
33

1 2

C29 0.1U_0402_16V4Z

3
9

1 2

C43 0.1U_0402_16V4Z

15
55

1 2

C42 0.1U_0402_16V4Z

61
14

DDR_A_MA13

17
19
25
43
50
53

DDR_CLK1

45

CK

DDR_CLK1#

46

DDR_CKE0

44

DDR_A_BS#0

26

DDR_A_BS#1

27
24

23
22
21

6
12
52
58
64
34
48
66

DDR_SCS#0
DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#

C74

0.1U_0402_16V4Z

Close
pin49

F

1

2

SDREF

1

2

SDREF

DDR_DQS2
DDR_DM2
DDR_D17
DDR_D16
DDR_D21
DDR_D20
DDR_D19
DDR_D18
DDR_D22
DDR_D23

DDR_DQS3
DDR_DM3
DDR_D24
DDR_D25
DDR_D29
DDR_D26
DDR_D28
DDR_D30
DDR_D31
DDR_D27

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12

DDR_DQS6
DDR_DM6
DDR_D49
DDR_D52
DDR_D53
DDR_D48
DDR_D54
DDR_D55
DDR_D50
DDR_D51

DDR_DQS7
DDR_DM7
DDR_D61
DDR_D60
DDR_D56
DDR_D57
DDR_D62
DDR_D59
DDR_D63
DDR_D58

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12

G

H

+2.5V

U3

16

LDQS

20

LDM

2

DQ0

4

DQ1

5

DQ2

7

DQ3

8

DQ4

10

DQ5

11

DQ6

13

DQ7

51

UDQS

47

UDM

54

DQ8

56

DQ9

57

DQ10

59

DQ11

60

DQ12

62

DQ13

63

DQ14

65

DQ15

49

VREF

29

A0

30

A1

31

A2

32

A3

35

A4

36

A5

37

A6

38

A7

39

A8

40

A9

28

AP/A10

41

A11

42

A12

HY5DU121622A(L)T-J_TSOPII66

VDD0
VDD1

VDD2
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4

NC0
NC1
NC2
NC3
NC4
NC5
NC6

CK#
CKE

BA0
BA1

CS#
RAS#
CAS#

WE#

VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4

VSS0
VSS1
VSS2

1

1 2

C46 0.1U_0402_16V4Z

18
33

1 2

C47 0.1U_0402_16V4Z

3
9

1 2

C58 0.1U_0402_16V4Z

15
55

1 2

C57 0.1U_0402_16V4Z

61
14

DDR_A_MA13

17
19
25
43
50
53

DDR_CLK0

45

CK

DDR_CLK0#

46

DDR_CKE0

44

DDR_A_BS#0

26

DDR_A_BS#1

27

DDR_SCS#0

24

DDR_A_RAS#

23

DDR_A_CAS#

22

DDR_A_WE#

21
6

12
52
58
64
34
48
66

+2.5V

U7

16

LDQS

20

LDM

2

DQ0

4

DQ1

5

DQ2

7

DQ3

8

DQ4

10

DQ5

11

DQ6

13

DQ7

51

UDQS

47

UDM

54

DQ8

56

DQ9

57

DQ10

59

DQ11

60

DQ12

62

DQ13

63

DQ14

65

DQ15

49

VREF

29

A0

30

A1

31

A2

32

A3

35

A4

36

A5

37

A6

38

A7

39

A8

40

A9

28

AP/A10

41

A11

42

A12

HY5DU121622A(L)T-J_TSOPII66

Title

Size Document Number Rev

LA-2591

Date: Sheet

G

1
18
33
3
9
15
55
61

14
17
19
25
43
50
53

45
46
44

26
27

24
23
22
21

6
12
52
58
64
34
48
66

DDR_A_MA13

DDR_CLK1

DDR_CLK1#

DDR_CKE0
DDR_A_BS#0

DDR_A_BS#1

DDR_SCS#0
DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#

1 2

C62 0.1U_0402_16V4Z

1 2

C61 0.1U_0402_16V4Z

1 2

C76 0.1U_0402_16V4Z

1 2

C75 0.1U_0402_16V4Z

VDD0
VDD1

VDD2
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4

NC0
NC1
NC2
NC3
NC4
NC5
NC6

CK#
CKE

BA0
BA1

CS#
RAS#
CAS#

WE#

VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4

VSS0
VSS1
VSS2

CK

Compal Electronics, Inc.

DDR-SODIMM SLOT0

of

12 43Monday, October 11, 2004

H

0.1

A

B

C

D

E

+2.5V

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

D

DDR_D2
DDR_D6

DDR_DM0
DDR_D7

DDR_D3
DDR_D13

DDR_D8
DDR_DM1

DDR_D12
DDR_D9

DDR_D18
DDR_D19

DDR_DM2
DDR_D23

DDR_D22
DDR_D25

DDR_D24
DDR_DM3

DDR_D26
DDR_D29

DDR_B_MA11
DDR_B_MA8

DDR_B_MA6
DDR_B_MA4
DDR_B_MA2DDR_B_MA3
DDR_B_MA0

DDR_B_BS#1
DDR_B_RAS#
DDR_B_CAS#DDR_B_WE#
DDR_SCS#3

DDR_D39
DDR_D38

DDR_DM4
DDR_D34

DDR_D35
DDR_D44

DDR_D45
DDR_DM5

DDR_D40
DDR_D41

DDR_D55
DDR_D54

DDR_DM6
DDR_D51

DDR_D50
DDR_D60

DDR_D61
DDR_DM7

DDR_D57
DDR_D56

+3VS

SDREF

1

C135

0.1U_0402_16V4Z

2

SDREF <7,12>

DDR_CKE2 <7>

DDR_B_BS#1 <8>
DDR_B_RAS# <8>
DDR_B_CAS# <8>

DDR_SCS#3 <7>

DDR_CLK4# <7>

DDR_CLK4 <7>

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DDR-SODIMM SLOT1

LA-2591

E

13 43Monday, October 11, 2004

0.1

of

DDR_D1
DDR_D0

DDR_DQS0
DDR_D5

DDR_D4
DDR_D15

DDR_D14
DDR_DQS1

DDR_D11
DDR_D10

DDR_D16
DDR_D17

DDR_DQS2
DDR_D20

DDR_D21
DDR_D30

DDR_D28
DDR_DQS3

DDR_D27
DDR_D31

DDR_D37
DDR_D36

DDR_DQS4
DDR_D32

DDR_D33
DDR_D47

DDR_D46
DDR_DQS5

DDR_D42
DDR_D43

DDR_D52
DDR_D49

DDR_DQS6
DDR_D48

DDR_D53
DDR_D59

DDR_D62
DDR_DQS7

DDR_D58
DDR_D63

CK_SDATA

CK_SCLK

+3VS

C

+2.5V

JP18

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0#

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2#

93

VDD

95

CKE1

97

DU/A13

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE#

121

S0#

123

DU

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD_SPD

199

VDD_ID

VSS

AMP_1565917-1

201

VREF

DQ4
DQ5
VDD
DM0
DQ6

DQ7

DQ12

VDD

DQ13

DM1

DQ14
DQ15

VDD
VDD

DQ20
DQ21

VDD
DM2

DQ22
DQ23

DQ28

VDD

DQ29

DM3

DQ30
DQ31

VDD

DM8
VDD

DU/RESET#

VDD
VDD

CKE0

DU/BA2

VDD

RAS#
CAS#

DQ36
DQ37

VDD
DM4

DQ38
DQ39

DQ44

VDD

DQ45

DM5

DQ46
DQ47

VDD

CK1#

DQ52
DQ53

VDD
DM6

DQ54
DQ55

DQ60

VDD

DQ61

DM7

DQ62
DQ63

VDD

VSS

202

VSS

VSS

VSS

VSS
VSS

VSS

VSS

CB4
CB5
VSS

CB6
CB7
VSS

VSS

A11
VSS

BA1

S1#
VSS

VSS

VSS

CK1
VSS

VSS

VSS

SA0
SA1
SA2

A8
A6

A4
A2
A0

DU

DU

+1.25VS

DDR_D1
DDR_D0
DDR_D5
DDR_D4

DDR_DM0
DDR_DQS0

DDR_D2

1 1

DDR_D6
DDR_D7
DDR_D3

DDR_D13

DDR_D8

DDR_D12

DDR_D9

DDR_DM1

DDR_D15
DDR_D14
DDR_D11
DDR_D10

DDR_D16
DDR_D17
DDR_D20
DDR_D21

DDR_D18
DDR_D19
DDR_D23

2 2

DDR_D22

DDR_D25
DDR_D24
DDR_D26
DDR_D29

DDR_D30
DDR_D28
DDR_D27
DDR_D31

DDR_D37
DDR_D36
DDR_D32
DDR_D33

DDR_D39
DDR_D38
DDR_D34
DDR_D35

3 3

DDR_D44
DDR_D45
DDR_D40
DDR_D41

DDR_D47
DDR_D46
DDR_D42
DDR_D43

DDR_D52
DDR_D49
DDR_D48
DDR_D53

DDR_D55
DDR_D54
DDR_D51
DDR_D50

4 4

DDR_D60
DDR_D61
DDR_D57
DDR_D56

DDR_D59
DDR_D62
DDR_D58
DDR_D63

DDR_DQS1

DDR_DM2
DDR_DQS2

DDR_DM3
DDR_DQS3

DDR_DM4
DDR_DQS4

DDR_DM5
DDR_DQS5

DDR_DM6
DDR_DQS6

DDR_DM7
DDR_DQS7

RP1

1 8
2 7
3 6
4 5

10_1206_8P4R_5%

1 2

R5 10_0402_5%

1 2

RP2

R6 10_0402_5%

4 5
3 6
2 7
1 8

10_1206_8P4R_5%

RP4

4 5
3 6
2 7
1 8

10_1206_8P4R_5%

1 2

R7 10_0402_5%

1 2

RP3

R8 10_0402_5%

1 8
2 7
3 6
4 5

10_1206_8P4R_5%

RP5

1 8
2 7
3 6
4 5

10_1206_8P4R_5%

1 2

R16 10_0402_5%

1 2

RP6

R15 10_0402_5%

4 5
3 6
2 7
1 8

10_1206_8P4R_5%

RP8

4 5
3 6
2 7
1 8

10_1206_8P4R_5%

1 2

R17 10_0402_5%

1 2

RP7

R18 10_0402_5%

1 8
2 7
3 6
4 5

10_1206_8P4R_5%

RP14

1 8
2 7
3 6
4 5

10_1206_8P4R_5%

1 2

R23 10_0402_5%

1 2

R26 10_0402_5%

RP15

4 5
3 6
2 7
1 8

10_1206_8P4R_5%

RP17

4 5
3 6
2 7
1 8

10_1206_8P4R_5%

1 2

R28 10_0402_5%

1 2

R29 10_0402_5%

RP16

1 8
2 7
3 6
4 5

10_1206_8P4R_5%

RP18

1 8
2 7
3 6
4 5

10_1206_8P4R_5%

1 2

R30 10_0402_5%

1 2

R31 10_0402_5%

RP19

4 5
3 6
2 7
1 8

10_1206_8P4R_5%

RP21

4 5
3 6
2 7
1 8

10_1206_8P4R_5%

1 2

R36 10_0402_5%

1 2

RP20

R39 10_0402_5%

1 8
2 7
3 6
4 5

10_1206_8P4R_5%

A

DDR_D[0..63]

DDR_DM[0..7]

DDR_DQS[0..7]

DDR_B_MA[0..13]<8>

+1.25VS

RP9

56_1206_8P4R_5%

RP10

56_1206_8P4R_5%

RP11

56_1206_8P4R_5%

RP12

56_1206_8P4R_5%

RP13

56_1206_8P4R_5%

1 2

R21 56_0402_5%

1 2

R20 56_0402_5%

1 2

R22 56_0402_5%

18
27
36
45

45
36
27
18

18
27
36
45

45
36
27
18

18
27
36
45

B

DDR_D[0..63] <12>
DDR_DM[0..7] <12>
DDR_DQS[0..7] <12>

DDR_B_MA[0..13]

DDR_CKE2
DDR_CKE3
DDR_B_MA13
DDR_B_MA12

DDR_B_MA11
DDR_B_MA9
DDR_B_MA7
DDR_B_MA8

DDR_B_MA6
DDR_B_MA5
DDR_B_MA3
DDR_B_MA4

DDR_B_MA2
DDR_B_MA1
DDR_B_MA10
DDR_B_MA0

DDR_B_BS#1
DDR_B_BS#0
DDR_SCS#2
DDR_SCS#3

DDR_B_WE#
DDR_B_RAS#
DDR_B_CAS#

DDR_CLK3<7>
DDR_CLK3#<7>

DDR_CKE3<7>

DDR_CKE3 DDR_CKE2
DDR_B_MA13
DDR_B_MA12
DDR_B_MA9

DDR_B_MA7
DDR_B_MA5

DDR_B_MA1
DDR_B_MA10

DDR_B_BS#0<8>
DDR_B_WE#<8>
DDR_SCS#2<7>

CK_SDATA<18>

CK_SCLK<18>

DDR_B_BS#0
DDR_SCS#2

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

D

E

Layout note :

Distribute as close as possible
to DDR-SODIMM.

+2.5V

1 1

1

C139

0.1U_0402_16V4Z

2

1

C138

0.1U_0402_16V4Z

2

1

C142

0.1U_0402_16V4Z

2

1

C181

0.1U_0402_16V4Z

2

1

C140

0.1U_0402_16V4Z

2

1

C144

0.1U_0402_16V4Z

2

1

C189

0.1U_0402_16V4Z

2

1

C187

0.1U_0402_16V4Z

2

1

C197

0.1U_0402_16V4Z

2

1

C219

0.1U_0402_16V4Z

2

1

C238

0.1U_0402_16V4Z

2

+2.5V +2.5V

1

C233

0.1U_0402_16V4Z

2

1

C241

0.1U_0402_16V4Z

2

1

C208

0.1U_0402_16V4Z

2

1

C240

0.1U_0402_16V4Z

2

1

C251

0.1U_0402_16V4Z

2

1

C231

0.1U_0402_16V4Z

2

1

+

C3
150U_D_6.3VM

2

1

+

C77
150U_D_6.3VM@

2

Layout note :

Place one cap close to every 2 pull up resistors termination to
+1.25V

2 2

1

C32

0.1U_0402_16V4Z

2

1

C9

0.1U_0402_16V4Z

2

1

C14

0.1U_0402_16V4Z

2

1

C49

0.1U_0402_16V4Z

2

1

C184

0.1U_0402_16V4Z

2

1

C207

0.1U_0402_16V4Z

2

1

C191

0.1U_0402_16V4Z

2

1

C206

0.1U_0402_16V4Z

2

1

C143

0.1U_0402_16V4Z

2

1

C161

0.1U_0402_16V4Z

2

+1.25VS

+1.25VS

1

C183

0.1U_0402_16V4Z

2

1

C190

0.1U_0402_16V4Z

2

1

C6

0.1U_0402_16V4Z

2

1

C162

0.1U_0402_16V4Z

2

1

C71

0.1U_0402_16V4Z

2

1

C67

0.1U_0402_16V4Z

2

1

C72

0.1U_0402_16V4Z

2

1

C66

0.1U_0402_16V4Z

2

1

C55

0.1U_0402_16V4Z

2

1

C52

0.1U_0402_16V4Z

2

+1.25VS

1

C50

0.1U_0402_16V4Z

2

3 3

+1.25VS

1

C48

0.1U_0402_16V4Z

2

1

C51

0.1U_0402_16V4Z

2

1

C64

0.1U_0402_16V4Z

2

1

C39

0.1U_0402_16V4Z

2

1

C179

0.1U_0402_16V4Z

2

1

C37

0.1U_0402_16V4Z

2

1

C10

0.1U_0402_16V4Z

2

1

C213

0.1U_0402_16V4Z

2

1

C180

0.1U_0402_16V4Z

2

1

C33

0.1U_0402_16V4Z

2

1

C5

0.1U_0402_16V4Z

2

1

C34

0.1U_0402_16V4Z

2

1

C53

0.1U_0402_16V4Z

2

1

C36

0.1U_0402_16V4Z

2

1

C7

0.1U_0402_16V4Z

2

1

C31

0.1U_0402_16V4Z

2

1

C63

0.1U_0402_16V4Z

2

1

C210

0.1U_0402_16V4Z

2

1

C45

0.1U_0402_16V4Z

2

4 4

Compal Electronics, Inc.

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

DDR SODIMM Decoupling

Size Document Number Rev

Custom

LA-2591

Date: Sheet

E

of

14 43Monday, October 11, 2004

0.1

5

4

3

2

1

C

B

E3

1

2

2222 SYMBOL(SOT23-NEW)

D D

+3VS

1

C69

12

R34

10K_0402_5%@

C C

H_THERMDA<4>

H_THERMDC<4>

H_THERMDA SMB_EC_CK2

H_THERMDC

1

C68
2200P_0402_50V7K

2

0.1U_0402_16V4Z

2

U8

1

VDD

2

D+

3

D­THERM#4GND

ADM1032AR_SOP8

SCLK

SDATA

ALERT#

8
7
6
5

SMB_EC_DA2

SMB_EC_CK2 <29,33>
SMB_EC_DA2 <29,33>

+12VALW

C223

12

0.1U_0402_16V4Z

B B

A A

5

EN_FAN1<33>

FAN1_VFB

R25

1 2

150K_0402_5%

4

3
2

R24

100K_0402_5%

1N4148_SOT23

+IN

-IN

8

P

OUT
G

4

12

U6A

1

LM358A_SO8

D2

FAN1_ON

3

+5VS

1

G

3

1

2

C229

1 2

10U_0805_10V4Z

6

2

D

Q20

S

SI3456DV-T1_TSOP6

4 5

1

1

C59

C60

10U_0805_10V4Z

2

2

0.1U_0402_16V4Z

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

FAN1 Control and Tachometer

+3VS

12

1

2

FAN1_VOUT

JP19

1
2
3

ACES_85205-0300

FAN1

R27

10K_0402_5%@

FAN1SPD <33>

C54

1000P_0402_50V7K@

2

Title

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, Inc.

Thermal sensor and Fan

LA-2591

1

of

15 43Monday, October 11, 2004

0.1

5

VGA@

C178 0.1U_0402_16V4Z

PEG_TXN0
PEG_TXP1 PCIE_MTX_C_GRX_P1

D D

PEG_TXN4

PEG_TXP6

PEG_TXP8

PEG_TXP10

C C

PEG_TXP[0..15]
PEG_TXN[0..15]

PEG_RXP[0:15]
PEG_RXN[0:15]

B B

A A

C177

1 2

VGA@

0.1U_0402_16V4Z
C159

1 2

VGA@

0.1U_0402_16V4Z
C175

1 2

VGA@

0.1U_0402_16V4Z
C157

1 2

VGA@

0.1U_0402_16V4Z
C173

1 2

VGA@

0.1U_0402_16V4Z
C155

1 2

VGA@

0.1U_0402_16V4Z
C171

1 2

VGA@

0.1U_0402_16V4Z
C153

1 2

VGA@

0.1U_0402_16V4Z
C169

1 2

VGA@

0.1U_0402_16V4Z
C151

1 2

VGA@

0.1U_0402_16V4Z
C167

1 2

VGA@

0.1U_0402_16V4Z
C149

1 2

VGA@

0.1U_0402_16V4Z
C165

1 2

VGA@

0.1U_0402_16V4Z

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

VSYNC_VGA<17>
HSYNC_VGA<17>

COMP/B_VGA<17>

VGA@

VGA@

VGA@

VGA@

VGA@

VGA@

VGA@

VGA@

VGA@

VGA@

VGA@

VGA@

Y/G_VGA<17>
C/R_VGA<17>

C160 0.1U_0402_16V4Z

C176 0.1U_0402_16V4Z

C158 0.1U_0402_16V4Z

C174 0.1U_0402_16V4Z

C156 0.1U_0402_16V4Z

C172 0.1U_0402_16V4Z

C154 0.1U_0402_16V4Z

C170 0.1U_0402_16V4Z

C152 0.1U_0402_16V4Z

C168 0.1U_0402_16V4Z

C150 0.1U_0402_16V4Z

C166 0.1U_0402_16V4Z

CLK_PCIE_VGA<18>

CLK_PCIE_VGA#<18>

PEG_TXP[0..15] <9>
PEG_TXN[0..15] <9>

PEG_RXP[0:15] <9>
PEG_RXN[0:15] <9>

PCIE_MTX_C_GRX_P0PEG_TXP0
PCIE_MTX_C_GRX_N0

PCIE_MTX_C_GRX_N1PEG_TXN1
PCIE_MTX_C_GRX_P2PEG_TXP2

PCIE_MTX_C_GRX_N2PEG_TXN2
PCIE_MTX_C_GRX_P3PEG_TXP3

PCIE_MTX_C_GRX_N3PEG_TXN3
PCIE_MTX_C_GRX_P4PEG_TXP4

PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P5PEG_TXP5

PCIE_MTX_C_GRX_N5PEG_TXN5
PCIE_MTX_C_GRX_P6

PCIE_MTX_C_GRX_N6PEG_TXN6
PCIE_MTX_C_GRX_P7PEG_TXP7

PCIE_MTX_C_GRX_N7PEG_TXN7
PCIE_MTX_C_GRX_P8

PCIE_MTX_C_GRX_N8PEG_TXN8
PCIE_MTX_C_GRX_P9PEG_TXP9

PCIE_MTX_C_GRX_N9PEG_TXN9
PCIE_MTX_C_GRX_P10

PCIE_MTX_C_GRX_N10PEG_TXN10
PCIE_MTX_C_GRX_P11PEG_TXP11

PCIE_MTX_C_GRX_N11PEG_TXN11
PCIE_MTX_C_GRX_P12PEG_TXP12

PCIE_MTX_C_GRX_N12PEG_TXN12

LVDSA0+
LVDSA0-

LVDSA1+
LVDSA1-

LVDSA2­LVDSA2+

LVDSAC­LVDSAC+

PEG_RXP10

PEG_RXN10

PEG_RXP11
PEG_RXN11

PEG_RXP12

PEG_RXN12

PEG_RXP13

PEG_RXN13

PEG_RXP14

PEG_RXN14

PEG_RXP15

PEG_RXN15

VSYNC_VGA
HSYNC_VGA

COMP/B_VGA
Y/G_VGA
C/R_VGA

+5VALW +3VS

2

2

1

VGA@

2

C133

1

0.1U_0402_16V4Z

VGA@

C131

C132

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

VGA@

VGA@

2

C134

1

0.1U_0402_16V4Z

4

JP17

40 41
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

ACES_88365-8042CONNVGA@

JP16

40 41
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

ACES_88365-8042CONNVGA@

3

+LCDVDD

PEG_RXP0

42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80

42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80

PEG_RXN0

PEG_RXP1

PEG_RXN1

PEG_RXP2

PEG_RXN2

PEG_RXP3

PEG_RXN3

PEG_RXP4

PEG_RXN4

PEG_RXP5
PEG_RXN5

PEG_RXP6

PEG_RXN6

PEG_RXP7
PEG_RXN7

PEG_RXP8

PEG_RXN8

PEG_RXP9
PEG_RXN9

1

2

0.047U_0402_16V4Z

VGA@

VGA@

VGA@

2VREF <41>
SUSP# <33,34,35,40,41>

SUSP <35,40>

PLTRST_VGA# <19,21>

SMBCLK_VGA <17>
SMBDAT_VGA <17>

VGA_RED <17>
VGA_GRN <17>
VGA_BLU <17>

C1480.1U_0402_16V4Z

12

C1640.1U_0402_16V4Z

12

C1460.1U_0402_16V4Z

12

C147

12

VGA@

0.1U_0402_16V4Z
C163

12

VGA@

0.1U_0402_16V4Z
C145

12

VGA@

0.1U_0402_16V4Z

PEG_TXP15PCIE_MTX_C_GRX_P15

PCIE_MTX_C_GRX_P13 PEG_TXP13
PCIE_MTX_C_GRX_N13 PEG_TXN13

PCIE_MTX_C_GRX_P14 PEG_TXP14

PCIE_MTX_C_GRX_N14 PEG_TXN14

PCIE_MTX_C_GRX_N15 PEG_TXN15

B+

+5VALW

+3VALW

+3VS

SUSP#
SUSP
VGA_BIA
GMCH_ENBKL

ENVDD
PLTRST_VGA#
I2CC_SCL
I2CC_SDA

SMBCLK_VGA
SMBDAT_VGA

VGA_RED
VGA_GRN
VGA_BLU

1

1

C128

C129

C130

2

2

0.047U_0402_16V4Z

0.047U_0402_16V4Z

VGA@

VGA@

VGA@

0.1U_0402_16V4Z

C12

LCD_CLK<9>

LCD EEPROM

LCD_DAT<9>

1

2

EN_LCDVDD<9>

+2.5VS

1

C13

0.1U_0402_16V4Z

2

INVPWR_B+

2.2K_0402_5%NONVGA@

2N7002_SOT23NONVGA@

+3VS

ENVDD

S

S

Q6

+LCDVDD

2N7002_SOT23

1 2

R14

Q5

G

2

G

2

2

JAE_FI-SE30P-HFCONNVGA@

13

JP2

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

R88
100K_0402_5%

Q2
DTC124EK_SC59

BK_EN<9>

BKOFF#<33>

INVT_PWM<33>

LVDS_A0+<9>
LVDS_A0-<9>

LVDS_A1+<9>
LVDS_A1-<9>

LVDS_A2-<9>
LVDS_A2+<9>

LVDS_AC-<9>
LVDS_AC+<9>

DAC_BRIG<33>

Inverter

INVPWR_B+B+

R12

0_0805_5%

+12VALW +3VS+LCDVDD

R87
100K_0402_5%

13

D

Q18

2

2N7002_SOT23

G

S

GMCH_ENBKL

BIA<9>

VGA_BIA

LVDSBIA<33>

INT_MIC
LVDSA0+

LVDSA0­LVDSA1+

LVDSA1­LVDSA2-

LVDSA2+
LVDSAC-

LVDSAC+
DAC_BRIG

INVTPWM
DISPLAYOFF#

I2CC_SCL
I2CC_SDA

AT LEAST 60 MIL

Aviso LCD/PANEL BD. CONN.

+LCDVDD

R102
470_0402_5%

13

D

Q3

2

G

S

R96

0_0402_5%NONVGA@

+3VS

12

D

13

13

D

2N7002_SOT23NONVGA@

12

R10

NONVGA@

2.2K_0402_5%

LCDP_CLK

LCDP_DAT

2

INT_MIC<31>

+LCDVDD

+3VS

12

R11

1 2

0_0402_5%NONVGA@

R9

100K_0402_5%

R2

1 2

0_0402_5%NONVGA@

R3

1 2

0_0402_5%VGA@

INT_MIC

LVDS_A0+
LVDS_A0-

LVDS_A1+
LVDS_A1-

LVDS_A2­LVDS_A2+

LVDS_AC­LVDS_AC+

DAC_BRIG

INVTPWM

DISPLAYOFF#

LCDP_CLK
LCDP_DAT

AT LEAST 60 MIL

C2

0.1U_0402_16V4Z

12

LVDSBIA

1

JAE_FI-SE30P-HFCONNVGA@

Q1

SI2302DS_SOT23

S

G

2

21

D1 RB751V_SOD323

21

D13 RB751V_SOD323

R1 0_0402_5%

1 2

+3VS

5

P

2

A

G

3

12

R52

VGA@

100K_0402_5%

JP3

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

D

13

0.1U_0402_16V4Z

R4
150K_0402_5%

+3VS

1 2

DISPLAYOFF#

U1

4

Y

NC7SZ14M5X_SOT23-5@

C1

R120

4.7K_0402_5%

INVTPWM

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, Inc.

VGA/B connector

LA-2591

1

0.1

of

16 43Monday, October 11, 2004

5

4

3

2

1

TV-Out Connector VGA I/O PORT Connector

JP15

1
2
3
4
5
6
7
8
9

10
11
12
13
14
15

ACES_87216-3002

2.2K_0402_5%NONVGA@

1 2

1 2

1 2

1 2

2.2K_0402_5% VGA@

+5VS +3VS+3VS+2.5VS

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

R116

16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

+2.5VS

12

CLK_DDC2

DAT_DDC2

SMBDAT_VGA

SMBCLK_VGA

12

16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

R117

+3VS

NUMLOCK#
CAPLOCK#
SCROLLLOCK#
WL/BT_ON
BT_LED

LUMA
CRMA
COMPS

USBP6+
USBP6-

2.2K_0402_5%NONVGA@

CLK_DDC2 <9>

DAT_DDC2 <9>

SMBDAT_VGA <16>

SMBCLK_VGA <16>

NUMLOCK# <33>
CAPLOCK# <33>
SCROLLLOCK# <33>
WL/BT_ON <28,33>
BT_LED <28>

USBP6+ <21>
USBP6- <21>

NONVGA@

R98 0_0402_5%

D D

C C

Y/G<9>

Y/G_VGA<16>

C/R<9>

C/R_VGA<16>

COMP/B<9>

COMP/B_VGA<16>

1 2

R90 0_0402_5%VGA@

1 2

R103 0_0402_5%NONVGA@

1 2

R93 0_0402_5%VGA@

1 2

R97 0_0402_5%NONVGA@

1 2

R89 0_0402_5%VGA@

1 2

LUMA

CRMA

COMPS

+5VS +5VS

+3VS

+2.5VS

ON/OFFBTN#<34>

MSEN#<33>
ON/OFFBTN_LED#<33>
LID_SW#<33>

ON/OFFBTN#
MSEN#
ON/OFFBTN_LED#
LID_SW#
CRT_SMBDAT
CRT_SMBCLK
CRT_HSYNC
CRT_VSYNC

CRT_R
CRT_G
CRT_B

CRT CONNECTOR

R95 0_0402_5%VGA@

VGA_RED<16>

VGA_GRN<16>

VGA_BLU<16>

CRT_RED<9>

CRT_GRN<9>

CRT_BLU<9>

B B

HSYNC_VGA<16>

HSYNC<9>

VSYNC_VGA<16>

VSYNC<9>

1 2

R91 0_0402_5%VGA@

1 2

R94 0_0402_5%VGA@

1 2

R101 0_0402_5%NONVGA@

1 2

R100 0_0402_5%NONVGA@

1 2

R104 0_0402_5%NONVGA@

1 2

R109 0_0402_5%VGA@

1 2

R114 0_0402_5%NONVGA@

1 2

R110 0_0402_5%VGA@

1 2

R115 0_0402_5%NONVGA@

1 2

CRT_R

CRT_G

CRT_B

CRT_HSYNC

CRT_VSYNC

CRT_SMBDAT

CRT_SMBCLK

2.2K_0402_5% VGA@

R108

12

R113 0_0402_5%NONVGA@

R112 0_0402_5%NONVGA@

R107 0_0402_5%VGA@

R106 0_0402_5%VGA@

R105

1 2

+3VS

A A

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, Inc.

TV_OUT and DVI connector

LA-2591

1

0.1

of

17 43Monday, October 11, 2004

5

+3VS

R330

D

S

ICH_SMBDATA<21>

D D

+3VS

ICH_SMBCLK<21>

0 0 1 for Dothan-A 533Mhz

ICH_SMBCLK

G

2

2N7002

1 3

Q36
2N7002_SOT23

G

2

2

G

Q38
2N7002_SOT23

1 3

D

S

D
1

3

S

CK_VDD_A

1 0 1 for Dothan-A 400Mhz

12

10K_0402_5%

C444

R349

10K_0402_5%

1

2

4.7U_0805_10V4Z

12

CK_SDATAICH_SMBDATA

CK_SCLK

0 0 1 for Dothan-B 533Mhz
0 1 1 for Dothan-B 400Mhz

FSC FSB FSA CPU

CLKSEL0 CLKSEL1 CLKSEL2

C C

*

0
0
0
1
1
1

00
0

1
0

1
11
0

0

0

1
0

1

0

11
Table : ICS 954226

+VCCP

B B

1 2

CLKSEL1

R451

4.7K_0402_5%

1 2

R339
0_0402_5%

1 2

R394

0_0402_5%

5

CLKSEL0

CPU_BSEL0<5>

A A

CPU_BSEL1<5>

+VCCP

R329

10K_0402_5%

1 2

R340

10K_0402_5%@

1 2

R401

10K_0402_5%

1 2

R395

10K_0402_5%@

1 2

MHz

266
133
200
166
333
100
400

SRC
MHz

100 33.30
100
100
100
100
100
100

RESERVED

R331

12

1K_0402_5%

R400

12

1K_0402_5%

PCI
MHz

33.3

33.3

33.3

33.3

33.3

33.3

CLK_33M_MPCI<28>

CLK_33M_LPCEC<33>

MCH_CLKSEL0 <7>

MCH_CLKSEL1 <7>

4

CK_SDATA <13>

CK_SCLK <13>

CK_VDD_48

1

2

C434

0.047U_0402_16V4Z

CLK_48M_CB<25>
CLK_48M_ICH<21>

CLK_33M_CBS<25>
CLK_33M_1394<27>

CLK_33M_LAN<24>
CLK_33M_ICH<19>

+3VS

R389
10K_0402_5%

1 2

R416

1 2

1

1

2

2

C460

33P_0402_50V8J

33P_0402_50V8J

CLKSEL2

10K_0402_5%@

4

C475

4.7U_0805_10V4Z

C428

12

X1 14.318MHZ_20P_1BX14318CC1A

C431

12

CLK_48M_CB
CLKSEL0

PS: When CB714 @, R182 12 Ohm change to 33 Ohm

CLKSEL1

CLK_33M_CBS
CLK_33M_1394 PCICLK4
CLK_33M_MPCI
CLK_33M_LAN

CLK_33M_LPCEC

+3VS

C474

0.1U_0402_16V4Z

CK_VDD_REF

0.047U_0402_16V4Z

Place crystal within
500 mils of CKGEN

12

+3VS

1 2

L15

CHB1608U301_0603

1

2

CHB1608U301_0603

1 2

L14

1

2

C433

0.047U_0402_16V4Z

CK_XTAL_IN

CK_XTAL_OUT

R399 12_0402_5%

1 2

R415 12_0402_5%

1 2

12

R375 33_0402_5%

12

R378 33_0402_5%

12

R377 33_0402_5%

12

R354 33_0402_5%

12

R379 33_0402_5%

12

R376 33_0402_5%

1 2

R385 10K_0402_5%

+CK_VDD_MAIN2

714@

1 2

R323 475_0402_1%

3

+CK_VDD_MAIN

2

C483
10U_0805_10V4Z

1

1

C432

0.047U_0402_16V4Z

2

1

C473

0.047U_0402_16V4Z

2

2

1

C435

0.047U_0402_16V4Z

2

Place near each pin
W>40 mil

2

C469
10U_0805_10V4Z

1

U28

21

VDDPCIEX_0

28

VDDPCIEX_1

34

VDDPCIEX_2

1

VDDPCI_0

7

VDDPCI_1

42

CK_VDD_REF

1 2

R338
1_0603_5%

CK_VDD_48

1 2

R368

2.2_0603_5%

CLKSEL2CLK_48M_ICH

PCICLK5

PCICLK3
PCICLK2
PCICLKF1CLK_33M_ICH

PCICLKF0

CK_SCLK

CK_SDATA

CLKIREF

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

VDDCPU

48

VDDREF

11

VDD48

50

X1

49

X2

12

FS_A/USB_48MHz

53

REF1/FSLC/TEST_SEL

16

FSLB/TEST_MODE

5

PCICLK5

4

PCICLK4

3

PCICLK3

56

PCICLK2/REQ_SEL

9

SELPCIEX_LCDCLK#/PCICLK_F1

8

ITP_EN/PCICLK_F0

46

SCLK

47

SDATA

39

IREF

13

GND_0

29

GND_1

2

GND_2

45

GND_3

51

GND_4

6

GND_5

ICS954226AGT_TSSOP56

1

C429

0.047U_0402_16V4Z

2

Table : ICS 954226

1

C477

0.047U_0402_16V4Z

2

R367

2.2_0603_5%

1 2

VDDA

GNDA

PCI/SRC_STOP#

CPU_STOP#

CPUCLKT1
CPUCLKC1

CPUCLKT0
CPUCLKC0

CPUCLKT2_ITP/PCIEXT6

CPUCLKC2_ITP/PCIEXC6

PEREQ1#/PCIEXT5
PEREQ2#/PCIEXC5

PCIEXT4

PCIEXC4

SATACLKT
SATACLKC

PCIEXT3
PCIEXC3

PCIEXT2
PCIEXC2

PCIEXT1
PCIEXC1

LCDCLK_SS/PCIEX0T
LCDCLK_SS/PCIEX0C

DOTT_96MHz
DOTC_96MHz

VTT_PWRGD#/PD

REF0

Place near ICS954226

CK_VDD_A

37
38

H_STP_PCI#

55

H_STP_CPU#

54

CK_CPU1

41
40

44
43

36
35

33
32

31
30

26
27

24
25

22
23

19
20

17
18

14
15

10
52

1 2

R356 33_0402_5%

CK_CPU1#

1 2

R357 33_0402_5%

CK_CPU0

1 2

R341 33_0402_5%

CK_CPU0#

1 2

R342 33_0402_5%

CK_CPU2

1 2

R343 33_0402_5%@

CK_CPU2#

1 2

R344 33_0402_5%@

SRC5

1 2

R352 33_0402_5%

SRC5#

1 2

R353 33_0402_5%

SRC4

1 2

R380 33_0402_5%

SRC4#

1 2

R381 33_0402_5%

SRC1

1 2

R410 33_0402_5%

SRC1# CLK_PCIE_ICH#

1 2

R411 33_0402_5%

SRC0

1 2

R382 33_0402_5%NONVGA@

SRC0# SSC_DREFCLK#

1 2

R383 33_0402_5%NONVGA@

DOTCLK

R408 33_0402_5%NONVGA@

1 2

DOTCLK#

1 2

R409 33_0402_5%NONVGA@

CLKREF

1 2

R355 33_0402_5%

2

1

C478

0.047U_0402_16V4Z

2

CLK_MCH_BCLK
CLK_MCH_BCLK#

CLK_MCH_3GPLL
CLK_MCH_3GPLL#

CLK_PCIE_VGA
CLK_PCIE_VGA#

CLK_PCIE_ICH

SSC_DREFCLK

1

CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_ITP
CLK_ITP#
CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_PCIE_ICH
CLK_PCIE_ICH#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#

SSC_DREFCLK
SSC_DREFCLK#

H_STP_PCI# <21>
H_STP_CPU# <21,42>

CLK_CPU_BCLK
CLK_CPU_BCLK#

CLK_ITP
CLK_ITP#

DREFCLK
DREFCLK#

CLK_14M_ICH

Title

Size Document Number Rev
Custom

Date: Sheet

DREFCLK
DREFCLK#

CLK_MCH_BCLK <7>
CLK_MCH_BCLK# <7>

CLK_CPU_BCLK <4>
CLK_CPU_BCLK# <4>

CLK_ITP <4>
CLK_ITP# <4>

CLK_MCH_3GPLL <9>
CLK_MCH_3GPLL# <9>

CLK_PCIE_VGA <16>
CLK_PCIE_VGA# <16>

CLK_PCIE_ICH <21>
CLK_PCIE_ICH# <21>

SSC_DREFCLK <7>
SSC_DREFCLK# <7>

DREFCLK <7>
DREFCLK# <7>

R398

10K_0402_5%

CLK_14M_ICH <21>

Q42

2N7002_SOT23

Compal Electronics, Inc.

Clock Generator

LA-2591

12

R332 49.9_0402_1%

12

R333 49.9_0402_1%

12

R321 49.9_0402_1%

12

R322 49.9_0402_1%

12

R319 49.9_0402_1%

12

R320 49.9_0402_1%

1 2

R392 49.9_0402_1%

1 2

R393 49.9_0402_1%

1 2

R420 49.9_0402_1%

1 2

R421 49.9_0402_1%

1 2

R345 49.9_0402_1%

1 2

R346 49.9_0402_1%

R390 49.9_0402_1%NONVGA@

1 2

R391 49.9_0402_1%NONVGA@

1 2

R418 49.9_0402_1%NONVGA@

1 2
1 2

R419 49.9_0402_1%NONVGA@

+3VS

12

VGATE<21,42>

13

D

2

G

S

1

18 43Monday, October 11, 2004

0.1

of

5

4

3

2

1

+3VS

D D

+3VS

+3VS

C C

+3VS

+3VS

+3VALW

RP45

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

RP43

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%
RP44

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

PME# signal has an integrated pull-up of 18 k to 42 k

B B

PCI_SERR#
PCI_FRAME#
PCI_TRDY#
PCI_STOP#

PCI_PERR#
PCI_DEVSEL#
PCI_PLOCK#
PCI_IRDY#

PCI_PIRQC#
PCI_PIRQH#
PCI_PIRQD#
PCI_PIRQB#

1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2

1 2
1 2
1 2

1 2

R254 10K_0402_1%@

R2418.2K_0402_5%
R2748.2K_0402_5%
R2658.2K_0402_5%
R2798.2K_0402_5%

R2698.2K_0402_5%
R2688.2K_0402_5%
R2458.2K_0402_5%
R2628.2K_0402_5%

R2558.2K_0402_5%
R2448.2K_0402_5%
R2618.2K_0402_5%

ICH_PME#

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQA#

PCI_REQ0#
PCI_REQ1#
PCI_REQ3#
PCI_REQ4#

PCI_REQ2#
PCI_REQ5#
PCI_REQ6#

PCI_AD[0..31]<24,25,27,28>

PCI_FRAME#<24,25,27,28>

PCI_PIRQA#<25>
PCI_PIRQB#<25>

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_FRAME#

PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

U9B

E2

AD[0]

E5

AD[1]

C2

AD[2]

F5

AD[3]

F3

AD[4]

E9

AD[5]

F2

AD[6]

D6

AD[7]

E6

AD[8]

D3

AD[9]

A2

AD[10]

D2

AD[11]

D5

AD[12]

H3

AD[13]

B4

AD[14]

J5

AD[15]

K2

AD[16]

K5

AD[17]

D4

AD[18]

L6

AD[19]

G3

AD[20]

H4

AD[21]

H2

AD[22]

H5

AD[23]

B3

AD[24]

M6

AD[25]

B2

AD[26]

K6

AD[27]

K3

AD[28]

A5

AD[29]

L1

AD[30]

K4

AD[31]

J3

FRAME#

Interrupt I/F

N2

PIRQ[A]#

L2

PIRQ[B]#

M1

PIRQ[C]#

L3

PIRQ[D]#

AC5

SATA[1]RXN/RSVD[1]

AD5

SATA[1]RXP/RSVD[2]

AF4

SATA[1]TXN/RSVD[3]

AG4

SATA[1]TXP/RSVD[4]

AC9

SATA[3]RXN/RSVD[5]

AD9

SATA[3]RXP/RSVD[6]

AF8

SATA[3]TXN/RSVD[7]

AG8

SATA[3]TXP/RSVD[8]

U3

TP[3]/RSVD[9]

ICH6_BGA609

PCI

REQ[4]#/GPI[40]

GNT[4]#/GPO[48]

REQ[5]#/GPI[1]

GNT[5]#/GPO[17]

REQ[6]#/GPI[0]

GNT[6]#/GPO[16]

PIRQ[E]#/GPI[2]
PIRQ[F]#/GPI[3]
PIRQ[G]#GPI[4]

PIRQ[H]#/GPI[5]

RESERVED

REQ[0]#
GNT[0]#
REQ[1]#
GNT[1]#
REQ[2]#
GNT[2]#
REQ[3]#
GNT[3]#

C/BE[0]#
C/BE[1]#
C/BE[2]#
C/BE[3]#

IRDY#

PAR

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR#
STOP#
TRDY#

PLTRST#

PCICLK

PME#

L5
C1
B5
B6
M5
F1
B8
C8
F7
E7
E8
F6
B7
D8

J6
H6
G4
G2

A3
E1
R2
C3
E3
C5
G5
J1
J2

R5
G6
P6

D9
C7
C6
M3

PCI_REQ0#
PCI_GNT0#
PCI_REQ1#
PCI_GNT1#
PCI_REQ2#
PCI_GNT2#
PCI_REQ3#
PCI_GNT3#
PCI_REQ4#

PCI_REQ5#
PCI_REQ6#

PCI_C_BE0#
PCI_C_BE1#
PCI_C_BE2#
PCI_C_BE3#

PCI_IRDY#
PCI_PAR
PCI_PCIRST#
PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#

PLTRST#
CLK_33M_ICH
ICH_PME#

PCI_PIRQE#PCI_PIRQA#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

PCI_REQ0# <24>
PCI_GNT0# <24>
PCI_REQ1# <25>
PCI_GNT1# <25>
PCI_REQ2# <27>
PCI_GNT2# <27>
PCI_REQ3# <28>
PCI_GNT3# <28>

PCI_C_BE0# <24,25,27,28>
PCI_C_BE1# <24,25,27,28>
PCI_C_BE2# <24,25,27,28>
PCI_C_BE3# <24,25,27,28>

PCI_IRDY# <24,25,27,28>
PCI_PAR <24,25,27,28>

PCI_DEVSEL# <24,25,27,28>
PCI_PERR# <24,25,27,28>

PCI_SERR# <24,25,27,28>
PCI_STOP# <24,25,27,28>
PCI_TRDY# <24,25,27,28>

CLK_33M_ICH <18>

ICH_PME# <24,28,33>

PCI_PIRQE# <27>

PCI_PIRQF# <24>

PCI_PIRQG# <28>

PCI_PIRQH# <28>

PLTRST#

PCI_PCIRST#

1

A

2

B

4

A

5

B

9

10

CLK_33M_ICH

+3VALW

C117

0.1U_0402_16V4Z

14

U13A

P

3

O

G

SN74LVC08APW_TSSOP14

7

+3VALW

14

U13B

P

PCIRSTB2#

6

O

G

SN74LVC08APW_TSSOP14

7

+3VALW

14

U13C

P

A

PCIRSTB3#

8

O

B

G

SN74LVC08APW_TSSOP14

7

R264
10_0402_5%@

1 2
1

C348

8.2P_0402_50V@

2

12

R71 33_0402_5%

1 2

R63 33_0402_5%

1 2

R61

33_0402_5%

1 2

PCIRST# <24,25,27,28,33>

PLTRST_VGA# <16,21>

PLTRST_SWDJ# <23>

PLTRST_MCH# <7,21,25,27>

A A

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, Inc.

ICH6(1/4)

LA-2591

1

0.1

of

19 43Monday, October 11, 2004

5

BATT1.1

+RTCVCC

CHGRTC

BATT1

ML1220T13RE

IAC_BITCLK<29,30>

R70

1 2

100_0603_1%

2

C116

0.1U_0402_16V4Z

1

D D

+RTCVCC

12

R69
1M_0402_5%

INTRUDER#

C C

+3VS +3VS

12

R187

4.7K_0402_5%@

B B

IDE_HIORDY IDE_HIRQ

12

R190

8.2K_0402_5%@

W=20mils

D7

21

RB751V_SOD323

-+

12

32.768KHZ_12.5P_1TJS125DJ2A073

R239
10_0402_5%

@

1 2

2

C326

10P_0402_50V8J@

1

+RTCVCC

4

C115

18P_0402_50V8J

Y2

2

NC

3

NC

C113

18P_0402_50V8J

1 2

R67
20K_0402_5%

JOPEN1

SHORT PADS

1U_0603_10V4Z

IAC_SYNC<29,30>
IAC_RST#<29,30>

IAC_SDATAI0<29>
IAC_SDATAI1<30>

IAC_SDATO<29,30>

SATABIAS# close as ICH6 0.5"

IDE_HIORDY<23>

IDE_HIRQ<23>
IDE_HDACK#<23>
IDE_HDIOW#<23>
IDE_HDIOR#<23>

12

IN

OUT

12

1 2

C114

1 2

ICH_RTCX1

1
4

12

R65

10M_0402_5%

ICH_RTCX2

ICH_RTCRST#
INTRUDER#

IAC_RST#
IAC_SDATAI0

IAC_SDATAI1

IAC_SDATO

1 2

R234

24.9_0402_1%

IDE_HIORDY
IDE_HIRQ
IDE_HDACK#
IDE_HDIOW# IDE_HDREQ
IDE_HDIOR#

AC19

AG11
AF11

AF16
AB16
AB15
AC14
AE16

AA2
AA3

AA5

D12
B12
D11

B11
E12

E11
C13

C12
C11
E13

C10

A10

B10

AE3
AD3
AG2
AF2

AD7
AC7
AF6
AG6

AC2
AC1

Y1
Y2

F13
F12

B9

F11
F10

C9

U9A

RTCX1
RTCX2

RTCRST#
INTRUDER#

INTVRMEN

EE_CS
EE_SHCLK
EE_DOUT
EE_DIN

LAN_CLK
LAN_RSTSYNC
LANRXD[0]

LANRXD[1]
LANRXD[2]

LANTXD[0]
LANTXD[1]
LANTXD[2]

ACZ_BIT_CLK
ACZ_SYNC

ACZ_RST#
ACZ_SDIN[0]

ACZ_SDIN[1]
ACZ_SDIN[2]

ACZ_SDO

SATALED#

SATA[0]RXN
SATA[0]RXP
SATA[0]TXN
SATA[0]TXP

SATA[2]RXN
SATA[2]RXP
SATA[2]TXN
SATA[2]TXP

SATA_CLKN
SATA_CLKP

SATARBIAS#
SATARBIAS

IORDY
IDEIRQ
DDACK#
DIOW#
DIOR#

ICH6_BGA609

3

RTC

LAD[0]/FWH[0]
LAD[1]/FWH[1]
LAD[2]/FWH[2]
LAD[3]/FWH[3]

LPC

LDRQ[1]#/GPI[41]

LFRAME#/FWH[4]

LAN

CPU

DPRSLP#/TP[4]

DPSLP#/TP[2]

CPUPWRGD/GPO[49]

THRMTRIP#

SATAAC-97/AZALIA

LDRQ[0]#

A20GATE

A20M#

CPUSLP#

FERR#

IGNNE#

INIT3_3V#

INIT#

INTR

RCIN#

SMI#

STPCLK#

DA[0]
DA[1]
DA[2]

DCS1#
DCS3#

DD[0]
DD[1]
DD[2]
DD[3]

PIDE

DD[4]
DD[5]
DD[6]
DD[7]
DD[8]

DD[9]
DD[10]
DD[11]
DD[12]
DD[13]
DD[14]
DD[15]

DDREQ

2

CPU Type

Dothan-A

Dothan-B

LPC_LDRQ0# <33>

LPC_LFRAME# <33>

Ra

12

Rb

12

Rc

12

H_PWRGOOD <4>
H_IGNNE# <4>
H_INIT# <4>

H_INTR <4>

KBRST# <33>

H_NMI <4>
H_SMI# <4>

H_STPCLK# <4>

R201
56_0402_5%

IDE_HDA0 <23>
IDE_HDA1 <23>
IDE_HDA2 <23>

IDE_HDCS1# <23>
IDE_HDCS3# <23>

IDE_HDD[0..15] <23>

IDE_HDREQ <23>

LPC_LAD[0..3] <33>

H_CPUSLP#
H_DPRSLP#DPRSLP#

H_DPSLP#

H_THERMTRIP#

GATEA20 <33>
H_A20M# <4>

H_CPUSLP# <4,7>
H_DPRSLP# <4>

H_DPSLP# <4>
H_FERR# <4>

+VCCP

H_THERMTRIP#<4,7>

H_FERR# close as ICH6 0.5"

H_FERR#

H_DPRSLP#

Note:
"Do not install R for Dothan-A,
Install Resistor Local for Dothan-B"

R193
330_0402_5%@

1 2

1 2

C264
1U_0603_10V4Z@

1 2

+VCCP

R194
75_0402_5%

LPC_LAD0

P2

LPC_LAD1

N3

LPC_LAD2

N5

LPC_LAD3

N4

LPC_LDRQ0#

N6
P4

LPC_LFRAME#

P3

GATEA20

AF22

H_A20M#

AF23

CPUSLP#

AE27
AE24

AD27
AF24
AG25
AG26

AE22
AF27
AG24

AD23
AF25

NMI

AG27
AE26
AE23

AC16
AB17
AC17

AD16
AE17

AD14
AF15
AF14
AD12
AE14
AC11
AD11
AB11
AE13
AF13
AB12
AB13
AC13
AE15
AG15
AD13

AB14

R45 0_0402_5%@
R192 0_0402_5%

FERR# H_FERR#

R195 0_0402_5%

H_PWRGOOD
H_IGNNE#
H_INIT#

H_INTR

KBRST#
H_NMI

H_SMI#
H_STPCLK#
THRMTRIP_ICH#

IDE_HDA0
IDE_HDA1
IDE_HDA2

IDE_HDCS1#
IDE_HDCS3#

IDE_HDD0
IDE_HDD1
IDE_HDD2
IDE_HDD3
IDE_HDD4
IDE_HDD5
IDE_HDD6
IDE_HDD7
IDE_HDD8
IDE_HDD9
IDE_HDD10
IDE_HDD11
IDE_HDD12
IDE_HDD13
IDE_HDD14
IDE_HDD15

1 2

Ra

0 Ohm

OPEN

2

B

1

C

E

3

1

Rb

OPEN

0 Ohm

R203

56_0402_5%

R202

56_0402_5%

Q21
2SC2411K_SC59@

H_THERMTRIP#

Rc

56 Ohm

0 Ohm

+VCCP

12

12

MAINPWRON <36,38,39>

A A

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

ICH6(2/4)

LA-2591

1

20 43Monday, October 11, 2004

0.1

of

5

2.2K_0402_5%

R289

1 2

1 2

CLKRUN#

CLK_48M_ICH

1 2
2

1

12

12

LINKALERT#

ITP_DBRESET#

ACIN_R

ICH_BATLOW#

ICH_PCIE_W AKE#

EC_THRM#

MCH_SYNC#

SIRQ

+3VALW

10K_0402_5%

R292

1 2

+3VS

12

R186

10_0402_5%@

1 2

2

C269

4.7P_0402_50V8C@

1

RE

R283
10K_0402_5%

RF

R277

10K_0402_5%@

10K_0402_5%

R290

1 2

R209
10K_0402_5%

GPI7
GPIO27
GPIO34

ICH_SMBDATA
ICH_SMBCLK
ICH_SMLINK0
ICH_SMLINK1

DDR RAM 32Mb*16*4 Vendor ID

GPI7/GPIO27/GPIO34

EC_THRM# <33>

00
0
0

1

1

0

0

1

0

1
1

1

1

1

+3VALW

2.2K_0402_5%

R291

10_0402_5%@

4.7P_0402_50V8C@

12

RC

R220
10K_0402_5%

12

RD

R221

R271
10K_0402_5%

1 2

R66
240_0402_5%

1 2

R235
10K_0402_5%

1 2

R64
10K_0402_5%

1 2

R267
680_0402_5%

1 2

R207

8.2K_0402_5%

1 2

R205
10K_0402_5%

1 2

R211
10K_0402_5%

1 2

CLK_14M_ICH

R238

C327

10K_0402_5%@

5

D D

C C

B B

A A

ICH_SMBDATA<18>

ICH_SMBCLK<18>

Requires a PU Resistor to Vcc3_3(CRB uses 8.2K to Vcc3_3)
CLK RUN no work to pull down

CLK_14M_ICH<18>

CLK_48M_ICH<18>

+3VS

12

RA

R217
10K_0402_5%

12

RB

R218

10K_0402_5%@

+3VALW

+3VALW

+3VALW

+3VALW

+3VALW

+3VS

+3VS

+3VS

8.2 k pull-up to Vcc3_3(CRB uses 10 k)

4

ICH6 VER1.5 GPI12 +3VS plan

ACIN<33,36,39>

PLTRST_VGA#<16,19>

Vendor

0

Reserved

10

Reserved

0

Reserved

1

Reserved

0

Reserved

1

Infineon

0

Samsung
Hynix

1

PM_DPRSLPVR

12

R208

@

100K_0402_5%

Signal has integrated pull-down in ICH

May need pulldown for DPRSLPVR in case
the ICH6m does not set this value in time
for boot.

4

SPKR<29>

SUS_STAT#<34>
ITP_DBRESET#<4>
PM_BMBUSY#<7>

EC_SMI#<33>

R237 0_0402_5%

LID_SWOUT#<33>

EC_SCI#<33>

H_STP_PCI#<18>

SB_INT_FLASH_SEL#<34>

H_STP_CPU#<18,42>

R210 10K_0402_5%@

+3VS

IDE_HRESET#<23>

IDE_DRESET#<23>

EC_FLASH#<34>

CLKRUN#<24,27,28,33>

SIRQ<25,33>

VGATE<18,42>

+3VS power plan

SLP_S3#<33>
SLP_S4#<33>
SLP_S5#<33>

ICH_PWRGD<33>
PM_DPRSLPVR<42>

PWRBTN_OUT#<33>
PLTRST_MCH#<7,19,25,27>

RSMRST#<33>

3

+3VALW

+3VS

12

12

R272

R219

10K_0402_5%

10K_0402_5%

R213 33_0402_5%@

1 2

1 2
1 2

R204 0_0402_5%@

1 2

ICH_SMBCLK
ICH_SMBDATA
LINKALERT#
ICH_SMLINK0
ICH_SMLINK1
MCH_SYNC#
SPKR

SUS_STAT#
ITP_DBRESET#
PM_BMBUSY#
GPI7

EC_SMI#

EC_SCI#
H_STP_PCI#
SB_INT_FLASH_SEL#
H_STP_CPU#

GPIO27
CLKRUN#
GPIO34
ICH_PCIE_W AKE#
SIRQ
EC_THRM#
VGATE
CLK_14M_ICH

CLK_48M_ICH

T35
PAD

ICH_SUSCLK

SLP_S3#

SLP_S4#

SLP_S5#

ICH_PWRGD

PM_DPRSLPVR

ICH_BATLOW#

PWRBTN_OUT#

PLTRST_MCH#

RSMRST#

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

ACIN_R

12

ICH_RI#

10K_0402_5%

R284

12

T2

AF17
AE18
AF18
AG18

Y4

W5

Y5

W4

U6

AG21

F8

W3

U2
AD19
AE19

R1

W6

M2

R6
AC21
AB21
AD22

AD20
AD21

V3
P5

R3

T3
AF19
AF20
AC18

U5
AB20
AC20
AF21

E10
A27

V6
T4

T5
T6

AA1

AE20

V2

U1

V5
Y3

10K_0402_5%

R278

U9C

RI#
SATA[0]GP/GPI[26]

SATA[1]GP/GPI[29]
SATA[2]GP/GPI[30]
SATA[3]GP/GPI[31]

SMBCLK
SMBDATA
LINKALERT#
SMLINK[0]
SMLINK[1]
MCH_SYNC#
SPKR

SUS_STAT#/LPCPD#
SYS_RESET#
BM_BUSY#/GPI[6]
GPI[7]

GPI[8]
SMBALERT#/GPI[11]
GPI[12]

GPI[13]
STP_PCI#/GPO[18]
GPO[19]
STP_CPU#/GPO[20]

GPO[21]
GPO[23]

GPIO[24]
GPIO[25]

GPIO[27]
GPIO[28]
CLKRUN#/GPIO[32]
GPIO[33]
GPIO[34]

WAKE#
SERIRQ
THRM#
VRMPWRGD
CLK14
CLK48
SUSCLK
SLP_S3#

SLP_S4#
SLP_S5#

PWROK
DPRSLPVR/TP[1]
BATLOW#/TP[0]
PWRBTN#
LAN_RST#
RSMRST#

ICH6_BGA609

GPIO

CLOCK

POWER MGT

PCI-EXPRESSDIRECT MEDIA INTERFACE

DMI[0]RXN
DMI[0]RXP
DMI[0]TXN
DMI[0]TXP

DMI[1]RXN
DMI[1]RXP
DMI[1]TXN
DMI[1]TXP

DMI[2]RXN
DMI[2]RXP
DMI[2]TXN
DMI[2]TXP

DMI[3]RXN
DMI[3]RXP
DMI[3]TXN
DMI[3]TXP

DMI_CLKN
DMI_CLKP

DMI_ZCOMP
DMI_IRCOMP
OC[4]#/GPI[9]

OC[5]#/GPI[10]
OC[6]#/GPI[14]
OC[7]#/GPI[15]

USB

USBRBIAS#

USBRBIAS

2

PERn[1]
PERp[1]

PETn[1]
PETp[1]

PERn[2]
PERp[2]

PETn[2]
PETp[2]

PERn[3]
PERp[3]

PETn[3]
PETp[3]

PERn[4]
PERp[4]

PETn[4]
PETp[4]

OC[0]#
OC[1]#
OC[2]#
OC[3]#

USBP[0]N
USBP[0]P
USBP[1]N
USBP[1]P
USBP[2]N
USBP[2]P
USBP[3]N
USBP[3]P
USBP[4]N
USBP[4]P
USBP[5]N
USBP[5]P
USBP[6]N
USBP[6]P
USBP[7]N
USBP[7]P

2

H25
H24
G27
G26

K25
K24
J27
J26

M25
M24
L27
L26

P24
P23
N27
N26

T25
T24
R27
R26

V25
V24
U27
U26

Y25
Y24
W27
W26

AB24
AB23
AA27
AA26

AD25
AC25

F24
F23
C23

D23
C25
C24

C27
B27
B26
C26

C21
D21
A20
B20
D19
C19
A18
B18
E17
D17
B16
A16
C15
D15
A14
B14

A22
B22

T31PAD
T33PAD
T32PAD
T34PAD

DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0

DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1

DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2

DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3

CLK_PCIE_ICH#
CLK_PCIE_ICH

DMI_IRCOMP

OVCUR#4
OVCUR#5
OVCUR#6
OVCUR#7

OVCUR#0
OVCUR#1
OVCUR#2
OVCUR#3

USBP0­USBP0+
USBP1­USBP1+

USBP3­USBP3+
USBP4­USBP4+

USBP6­USBP6+
USBP7- OVCUR#0OVCUR#1
USBP7+

USBRBIAS

closed to 500 mils

1 2

R51

22.6_0402_1%

DMI_RXN0 <7>
DMI_RXP0 <7>
DMI_TXN0 <7>
DMI_TXP0 <7>

DMI_RXN1 <7>
DMI_RXP1 <7>
DMI_TXN1 <7>
DMI_TXP1 <7>

DMI_RXN2 <7>
DMI_RXP2 <7>
DMI_TXN2 <7>
DMI_TXP2 <7>

DMI_RXN3 <7>
DMI_RXP3 <7>
DMI_TXN3 <7>
DMI_TXP3 <7>

CLK_PCIE_ICH# <18>
CLK_PCIE_ICH <18>

+1.5VS

R199 24.9_0402_1%

1 2

OVCUR#0 <32>

OVCUR#3 <32>

USBP0- <32>
USBP0+ <32>
USBP1- <32>
USBP1+ <32>

USBP3- <32>
USBP3+ <32>
USBP4- <32>
USBP4+ <32>

USBP6- <17>
USBP6+ <17>
USBP7- <32>
USBP7+ <32>

OVCUR#4 OVCUR#3

USBPN/USBPP impedance 45 Ohm

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

ICH6(3/4)

LA-2591

OVCUR#5
OVCUR#7
OVCUR#6
OVCUR#2

1

R185

1 2

0_0402_5%

R200

1 2

0_0402_5%

1

RP42

4 5
3 6
2 7
1 8

10K_0804_8P4R_5%

21 43Monday, October 11, 2004

+3VALW

0.1

of

5

Near PIN F27(C968),

L10 0_0603_5%

+1.5VRUN_L

ICH_V5REF_RUN

2

C309

0.1U_0402_16V4Z

1

ICH_V5REF_SUS

2

C297

0.1U_0402_16V4Z

1

1 2

220U_D2_4VM

2

C312

0.1U_0402_16V4Z

@

1

+1.5VS

D D

+3VS

+5VS

D15

RB751V_SOD323

1 2

+3VALW+5VALW

D14

RB751V_SOD323

1 2

21

2

C310
1U_0603_10V4Z

1

21

2

C299
1U_0603_10V4Z

1

R215

10_0402_5%

R212

10_0402_5%

C C

P27(C949), AB27(C950)

1

+

C270

C261

2

0.1U_0402_16V4Z

+1.5VS

Near PIN AG5

+3VALW +1.5VALW

1

2

B B

+1.5VS

A A

U18 APL5301-15DC_3P

Vin2Vout

C314

0.1U_0402_16V4Z

R184

1 2

1_0402_5%

GND

1

CHB1608U301_0603

5

3

L11

1 2

1

C298

0.1U_0402_16V4Z

2

2

C263

1

0.1U_0402_16V4Z

ICH6_VCCPLL

1

C271

2

0.01U_0402_16V7K

Near PIN
AC27

+3VS

Near PIN
E26, E27

+1.5VS

Near PIN AG9

2

C278

1

0.1U_0402_16V4Z

+3VALW

Near PIN A17

4

2

2

C268

1

1

0.1U_0402_16V4Z

C333

C347

+1.5VS

2

C359

1

0.1U_0402_16V4Z

Near PIN AE1

2

C313

1

0.1U_0402_16V4Z

4

2

C277

1

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

ICH6_VCCPLL

+3VS

+3VS

+3VALW

2

C316

1

0.1U_0402_16V4Z

U9E

AA22

VCC1_5[1]

AA23

VCC1_5[2]

AA24

VCC1_5[3]

AA25

VCC1_5[4]

AB25

VCC1_5[5]

AB26

VCC1_5[6]

AB27

VCC1_5[7]

F25

VCC1_5[8]

F26

VCC1_5[9]

F27

VCC1_5[10]

G22

VCC1_5[11]

G23

VCC1_5[12]

G24

VCC1_5[13]

G25

VCC1_5[14]

H21

VCC1_5[15]

H22

VCC1_5[16]

J21

VCC1_5[17]

J22

VCC1_5[18]

K21

VCC1_5[19]

K22

VCC1_5[20]

L21

VCC1_5[21]

L22

VCC1_5[22]

M21

VCC1_5[23]

M22

VCC1_5[24]

N21

VCC1_5[25]

N22

VCC1_5[26]

N23

VCC1_5[27]

N24

VCC1_5[28]

N25

VCC1_5[29]

P21

VCC1_5[30]

P25

VCC1_5[31]

P26

VCC1_5[32]

P27

VCC1_5[33]

R21

VCC1_5[34]

R22

VCC1_5[35]

T21

VCC1_5[36]

T22

VCC1_5[37]

U21

VCC1_5[38]

U22

VCC1_5[39]

V21

VCC1_5[40]

V22

VCC1_5[41]

W21

VCC1_5[42]

W22

VCC1_5[43]

Y21

VCC1_5[44]

Y22

VCC1_5[45]

AA6

VCC1_5[46]

AB4

VCC1_5[47]

AB5

VCC1_5[48]

AB6

VCC1_5[49]

AC4

VCC1_5[50]

AD4

VCC1_5[51]

AE4

VCC1_5[52]

AE5

VCC1_5[53]

AF5

VCC1_5[54]

AG5

VCC1_5[55]

AA7

VCC1_5[56]

AA8

VCC1_5[57]

AA9

VCC1_5[58]

AB8

VCC1_5[59]

AC8

VCC1_5[60]

AD8

VCC1_5[61]

AE8

VCC1_5[62]

AE9

VCC1_5[63]

AF9

VCC1_5[64]

AG9

VCC1_5[65]

AC27

VCCDMIPLL

E26

VCC3_3[1]

AE1

VCCSATAPLL

AG10

VCC3_3[22]

A13

VCCLAN3_3/VCCSUS3_3[1]

F14

VCCLAN3_3/VCCSUS3_3[2]

G13

VCCLAN3_3/VCCSUS3_3[3]

G14

VCCLAN3_3/VCCSUS3_3[4]

A11

VCCSUS3_3[1]

U4

VCCSUS3_3[2]

V1

VCCSUS3_3[3]

V7

VCCSUS3_3[4]

W2

VCCSUS3_3[5]

Y7

VCCSUS3_3[6]

A17

VCCSUS3_3[7]

B17

VCCSUS3_3[8]

C17

VCCSUS3_3[9]

F18

VCCSUS3_3[10]

G17

VCCSUS3_3[11]

G18

VCCSUS3_3[12]

ICH6_BGA609

COREIDE

PCIE

PCIUSB

VCCSUS1_5[3]
VCCSUS1_5[2]

VCCSUS1_5[1]

SATA

USB CORE

PCI/IDE RBP

V5REF_SUS

VCCUSBPLL

VCCSUS3_3[20]

VCCLAN1_5/VCCSUS1_5[2]
VCCLAN1_5/VCCSUS1_5[1]

V_CPU_IO[3]
V_CPU_IO[2]
V_CPU_IO[1]

VCCSUS3_3[19]
VCCSUS3_3[18]
VCCSUS3_3[17]
VCCSUS3_3[16]
VCCSUS3_3[15]
VCCSUS3_3[14]
VCCSUS3_3[13]

VCC1_5[98]
VCC1_5[97]
VCC1_5[96]
VCC1_5[95]
VCC1_5[94]
VCC1_5[93]
VCC1_5[92]
VCC1_5[91]
VCC1_5[90]
VCC1_5[89]
VCC1_5[88]
VCC1_5[87]
VCC1_5[86]
VCC1_5[85]
VCC1_5[84]
VCC1_5[83]
VCC1_5[82]
VCC1_5[81]
VCC1_5[80]
VCC1_5[79]

VCC3_3[21]
VCC3_3[20]
VCC3_3[19]
VCC3_3[18]
VCC3_3[17]
VCC3_3[16]
VCC3_3[15]
VCC3_3[14]
VCC3_3[13]
VCC3_3[12]

VCC3_3[11]
VCC3_3[10]

VCC3_3[9]
VCC3_3[8]
VCC3_3[7]
VCC3_3[6]
VCC3_3[5]
VCC3_3[4]
VCC3_3[3]
VCC3_3[2]

VCC1_5[78]
VCC1_5[77]
VCC1_5[76]
VCC1_5[75]
VCC1_5[74]
VCC1_5[73]
VCC1_5[72]
VCC1_5[71]
VCC1_5[70]
VCC1_5[69]
VCC1_5[68]

VCC1_5[67]

VCC2_5[4]
VCC2_5[2]

V5REF[2]
V5REF[1]

VCCRTC

3

F9
U17
U16
U14
U12
U11
T17
T11
P17
P11
M17
M11
L17
L16
L14
L12
L11
AA21
AA20
AA19

AA10
AG19
AG16
AG13
AD17
AC15
AA17
AA15
AA14
AA12

P1
M7
L7
L4
J7
H7
H1
E4
B1
A6

U7
R7

G19
G20

F20
E24
E23
E22
E21
E20
D27
D26
D25
D24

G8
AB18

P7
AA18

A8
F21
A25

A24
AB3
G11

G10
AG23

AD26
AB22

G16
G15
F16
F15
E16
D16
C16

+1.5VS

2

C317

1

2

C343

1

+1.5VALW

1

2

C308

0.1U_0402_16V4Z

+1.5VS

ICH_V5REF_RUN

ICH_V5REF_SUS

+1.5VS
+3VALW

+RTCVCC

+1.5VS

+VCCP

1

2

C294

0.1U_0402_16V4Z

2

C323

1

0.1U_0402_16V4Z

2

C360

1

0.1U_0402_16V4Z

Near PIN U7

Near PIN AG23

+3VS

Near PIN
AG13, AG16

0.1U_0402_16V4Z

+3VS

2

C354

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Near PIN
A2-A6, D1-H1

2

1

1

2

C338

0.1U_0402_16V4Z

+2.5VS

1

2

Near PIN AB18

+3VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C342

0.1U_0402_16V4Z

C311

C332

1 2

C331

1 2

+1.5VS

+1.5VALW

0.1U_0402_16V4Z

2

C322

0.1U_0402_16V4Z@

1 2

C325

0.1U_0402_16V4Z@

1 2

C319

0.1U_0402_16V4Z@

1 2

C330

0.1U_0402_16V4Z

1 2

C334

0.1U_0402_16V4Z

1 2

C335

0.1U_0402_16V4Z

1 2

C339

0.1U_0402_16V4Z

1 2

C346

0.1U_0402_16V4Z

1 2

C296

0.1U_0402_16V4Z

1 2

C305

0.1U_0402_16V4Z

1 2

C281

0.01U_0402_16V7K

1 2

Near PIN A25

C307

0.01U_0402_16V7K

1 2

Near PIN AA19

+3VALW

C320

0.1U_0402_16V4Z@

1 2

C321

0.1U_0402_16V4Z@

1 2

C337

0.1U_0402_16V4Z@

1 2

C287

0.1U_0402_16V4Z

1 2

Near PIN A24

Near PIN AG10

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

1

U9D

E27

VSS[172]

Y6

VSS[171]

Y27

VSS[170]

Y26

VSS[169]

Y23

VSS[168]

W7

VSS[167]

W25

VSS[166]

W24

VSS[165]

W23

VSS[164]

W1

VSS[163]

V4

VSS[162]

V27

VSS[161]

V26

VSS[160]

V23

VSS[159]

U25

VSS[158]

U24

VSS[157]

U23

VSS[156]

U15

VSS[155]

U13

VSS[154]

T7

VSS[153]

T27

VSS[152]

T26

VSS[151]

T23

VSS[150]

T16

VSS[149]

T15

VSS[148]

T14

VSS[147]

T13

VSS[146]

T12

VSS[145]

T1

VSS[144]

R4

VSS[143]

R25

VSS[142]

R24

VSS[141]

R23

VSS[140]

R17

VSS[139]

R16

VSS[138]

R15

VSS[137]

R14

VSS[136]

R13

VSS[135]

R12

VSS[134]

R11

VSS[133]

P22

VSS[132]

P16

VSS[131]

P15

VSS[130]

P14

VSS[129]

P13

VSS[128]

P12

VSS[127]

N7

VSS[126]

N17

VSS[125]

N16

VSS[124]

N15

VSS[123]

N14

VSS[122]

N13

VSS[121]

N12

VSS[120]

N11

VSS[119]

N1

VSS[118]

M4

VSS[117]

M27

VSS[116]

M26

VSS[115]

M23

VSS[114]

M16

VSS[113]

M15

VSS[112]

M14

VSS[111]

M13

VSS[110]

M12

VSS[109]

L25

VSS[108]

L24

VSS[107]

L23

VSS[106]

L15

VSS[105]

L13

VSS[104]

K7

VSS[103]

K27

VSS[102]

K26

VSS[101]

K23

VSS[100]

K1

VSS[99]

J4

VSS[98]

J25

VSS[97]

J24

VSS[96]

J23

VSS[95]

H27

VSS[94]

H26

VSS[93]

H23

VSS[92]

G9

VSS[91]

G7

VSS[90]

G21

VSS[89]

G12

VSS[88]

G1

VSS[87]

ICH6_BGA609

Title

Size Document Number Rev

Date: Sheet

GROUND

+RTCVCC

1

2

C356

0.1U_0402_16V4Z

Compal Electronics, Inc.

LA-2591

VSS[86]
VSS[85]
VSS[84]
VSS[83]
VSS[82]
VSS[81]
VSS[80]
VSS[79]
VSS[78]
VSS[77]
VSS[76]
VSS[75]
VSS[74]
VSS[73]
VSS[72]
VSS[71]
VSS[70]
VSS[69]
VSS[68]
VSS[67]
VSS[66]
VSS[65]
VSS[64]
VSS[63]
VSS[62]
VSS[61]
VSS[60]
VSS[59]
VSS[58]
VSS[57]
VSS[56]
VSS[55]
VSS[54]
VSS[53]
VSS[52]
VSS[51]
VSS[50]
VSS[49]
VSS[48]
VSS[47]
VSS[46]
VSS[45]
VSS[44]
VSS[43]
VSS[42]
VSS[41]
VSS[40]
VSS[39]
VSS[38]
VSS[37]
VSS[36]
VSS[35]
VSS[34]
VSS[33]
VSS[32]
VSS[31]
VSS[30]
VSS[29]
VSS[28]
VSS[27]
VSS[26]
VSS[25]
VSS[24]
VSS[23]
VSS[22]
VSS[21]
VSS[20]
VSS[19]
VSS[18]
VSS[17]
VSS[16]
VSS[15]
VSS[14]
VSS[13]
VSS[12]
VSS[11]
VSS[10]

VSS[9]
VSS[8]
VSS[7]
VSS[6]
VSS[5]
VSS[4]
VSS[3]
VSS[2]
VSS[1]

1

2

C353

0.1U_0402_16V4Z

ICH6(4/4)

F4
F22
F19
F17
E25
E19
E18
E15
E14
D7
D22
D20
D18
D14
D13
D10
D1
C4
C22
C20
C18
C14
B25
B24
B23
B21
B19
B15
B13
AG7
AG3
AG22
AG20
AG17
AG14
AG12
AG1
AF7
AF3
AF26
AF12
AF10
AF1
AE7
AE6
AE25
AE21
AE2
AE12
AE11
AE10
AD6
AD24
AD2
AD18
AD15
AD10
AD1
AC6
AC3
AC26
AC24
AC23
AC22
AC12
AC10
AB9
AB7
AB2
AB19
AB10
AB1
AA4
AA16
AA13
AA11
A9
A7
A4
A26
A23
A21
A19
A15
A12
A1

1

22 43Monday, October 11, 2004

0.1

of

A

B

C

D

E

F

G

H

HDD Connector

JP12

46

PIDE_RST#
IDE_HDD7

1 1

IDE_HDREQ<20>
IDE_HDIOW#<20>
IDE_HDIOR#<20>
IDE_HIORDY<20>
IDE_HDACK#<20>

IDE_HIRQ<20>
IDE_HDA1<20>
IDE_HDA0<20>

HDD_ACT#<32>

+5VS

IDE_HDD6
IDE_HDD5

IDE_HDD3
IDE_HDD2
IDE_HDD1
IDE_HDD0

IDE_HDREQ

IDE_HDIOW#

IDE_HDIOR#

IDE_HIORDY

IDE_HDACK#

IDE_HIRQ

IDE_HDA1
IDE_HDA0
IDE_HDCS1#
HDD_ACT#

OCTEK_AFH-22SI1_ REVERS

GND45GND

44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10

8
6
4
2

43

43

44

41

42

39

40

37

38

35

36

33

34

31

32

29

30

27

28

25

26

23

24

21

22

19

20

17

18

15

16

13

14

11

12

9

10

7

8

5

6

3

4

1

2

IDE_HDD8

41

IDE_HDD9

39

IDE_HDD10

37

IDE_HDD11IDE_HDD4

35

IDE_HDD12

33

IDE_HDD13

31

IDE_HDD14

29

IDE_HDD15

27
25
23
21
19

R77 470_0402_5%

17
15

R78 10K_0402_5%@

13
11

IDE_HDA2

9

IDE_HDCS3#

7
5
3
1

1 2
1 2

+5VS

PDIAG#

IDE_HDA2 <20>

R79

10K_0402_5%@

IDE_HDD[0..15] <20>

1 2

CD-ROM Connector

INT_CD_L<29>

CD_GND<29>

1 2

C262 47P_0402_50V8J

R216

4.7K_0402_5%

+5VMOD

R197

1 2

SEC_CSEL

SIDE_RST#

10K_0402_5%

1 2

+5VMOD

C258

1 2

47P_0402_50V8J

IDE_HDD7
IDE_HDD6
IDE_HDD5
IDE_HDD4
IDE_HDD3
IDE_HDD2
IDE_HDD1

IDE_HDIOW#
IDE_HIORDY

IDE_HIRQ
IDE_HDA1
IDE_HDA0
SW_IDE_SDCS1#
HDD_ACT#

JP21

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50

GND53GND

OCTEK_CDR-50TA1

54

C266

1 2

47P_0402_50V8J

IDE_HDD8
IDE_HDD9
IDE_HDD10
IDE_HDD11
IDE_HDD12
IDE_HDD13
IDE_HDD14
IDE_HDD15
IDE_HDREQIDE_HDD0
IDE_HDIOR#

IDE_HDACK#
PDIAG#

IDE_HDA2
SW_IDE_SDCS3#

INT_CD_R <29>

+5VMOD

Layout Note: W=80 mils

Check ME

2 2

+5VS

Placea caps. near HDD CONN.

+5VMOD Source

0.1U_0402_16V4Z

1U_0603_10V4Z

C123

1

C121

2

PLTRST_SWDJ#

3 3

4 4

IDE_DRESET#<21>

EC_IDERST<29,33>

PLTRST_SWDJ#<19>

IDE_HRESET#<21>

IDE_DRESET#

PLTRST_SWDJ#

IDE_HRESET#

1

C124

2

10U_0805_10V4Z

1

2

+3VALW

14

U16A

1

P

A

O

2

B

G

C288

7

10K_0402_5%

+3VALW

9

10

14

P

A
B

G

7

1 2

SN74LVC08APW_TSSOP14

0.1U_0402_16V4Z

+3VALW

C2840.1U_0402_16V4Z

3

SN74LVC125APWLE_TSSOP14

R191

1 2

U16C

8

O

SN74LVC08APW_TSSOP14

R175

33_0402_5%@

14

P
I2O
G

7

4
5

1

U17A

OE#

+3VALW

A
B

3

14

P

O

G

7

SWDJ_RST_HOLD <33>

SIDE_RST#

R189
10K_0402_5%

1 2

+5VMOD

U16B

R176

1 2

0_0402_5%

PIDE_RST#

6

SN74LVC08APW_TSSOP14

Q25

D

S

4 5

G

SI3443DV_TSOP6

3

+5VMOD

12

R183
10K_0402_5%

+5VMOD

12

6
2

1

SW_IDE_SDCS1#

R182
10K_0402_5%

SW_IDE_SDCS3#

80mil

+5VALW

SN74LVC125APWLE_TSSOP14

SN74LVC125APWLE_TSSOP14

1 2

R223 330K_0402_5%

C276

1 2

1U_0603_10V4Z

4

U17B

6

OE#

I5O

10

U17C

8

OE#

I9O

+5VALW

R180

0_0402_5%@

1 2

IDE_HDCS1#<20>

IDE_HDCS3#<20>

G_PCI_RST#

IDE_HDCS1#

G_PCI_RST#

IDE_HDCS3#

Check ME

+5VMOD

Layout No t e : P lace close to CD-ROM CONN.

0.1U_0402_16V4Z

C306

1

C289

2

Q23

2

R222 10K_0402_5%

12

13

DTC124EK_SC59

Q24

2

CD_PLAY

1U_0603_10V4Z

1

2

S

G

D

1 3

PLTRST_SWDJ#

10U_0805_10V4Z

1

C318

2

AOS3401_SOT23

+5VAMP

CD_PLAY <29,33>

2

G

+3VALW

+5VALW

2

C275
10U_0805_10V4Z

1

12

R198
10K_0402_5%

G_PCI_RST#

13

D

Q22
2N7002_SOT23

S

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

C

D

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

F

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

HDD & CD-ROM CONN.

LA-2591

G

0.1

of

23 43Monday, October 11, 2004

H

5

C413
1U_0603_10V4Z

CTRL25

D D

PCI_AD[0..31]<19,25,27,28>

C C

PCI_C_BE0#<19,25,27,28>
PCI_C_BE1#<19,25,27,28>
PCI_C_BE2#<19,25,27,28>
PCI_C_BE3#<19,25,27,28>

PCI_AD17 LAN_IDSEL

PCI_PAR<19,25,27,28>

PCI_FRAME#<19,25,27,28>

PCI_IRDY#<19,25,27,28>

PCI_TRDY#<19,25,27,28>

PCI_DEVSEL#<19,25,27,28>

PCI_STOP#<19,25,27,28>

PCI_PERR#<19,25,27,28>
PCI_SERR#<19,25,27,28>

PCI_REQ0#<19>

PCI_GNT0#<19>

B B

A A

PCI_PIRQF#<19>

CLK_33M_LAN<18>

CLK_33M_LAN

12

10_0402_5%

@

1

C440
10P_0402_50V8J

@

2

ICH_PME#<19,28,33>

PCIRST#<19,25,27,28,33>

CLKRUN#<21,27,28,33>

R359

PCI_AD[0..31]

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

1 2

R364 100_0402_5%

CLK_33M_LAN

5

+3VALW

12

1

Q35

U25

104

AD0

103

AD1

102

AD2

98

AD3

97

AD4

96

AD5

95

AD6

93

AD7

90

AD8

89

AD9

87

AD10

86

AD11

85

AD12

83

AD13

82

AD14

79

AD15

59

AD16

58

AD17

57

AD18

55

AD19

53

AD20

50

AD21

49

AD22

47

AD23

43

AD24

42

AD25

40

AD26

39

AD27

37

AD28

36

AD29

34

AD30

33

AD31

92

C/BE#0

77

C/BE#1

60

C/BE#2

44

C/BE#3

46

IDSEL

76

PAR

61

FRAME#

63

IRDY#

67

TRDY#

68

DEVSEL#

69

STOP#

70

PERR#

75

SERR#

30

REQ#

29

GNT#

25

INTA#

31

PME#

27

RST#

28

CLK

65

CLKRUN#

4

GND/VSS

17

GND/VSS

128

GND/VSS

21

GND/VSSPST

38

GND/VSSPST

51

GND/VSSPST

66

GND/VSSPST

81

GND/VSSPST

91

GND/VSSPST

101

GND/VSSPST

119

GND/VSSPST

35

GND

52

GND

80

GND

100

GND

RTL8100CL_LQFP128

2SB1188_SC62

+2.5V_LAN

2 3

C411

4.7U_0805_10V4Z

EEDO

AUX/EEDI

EESK
EECS

NC/LED3

TXD+/MDI0+

TXD-/MDI0-

RXIN+/MDI1+

RXIN-/MDI1-

NC/MDI2+

NC/MDI2-

NC/MDI3+

NC/MDI3-

LWAKE

ISOLATE#

RTSET

NC/SMBCLK

NC/SMBDATA

NC/M66EN

NC/AVDDH

NC/HV

PCI I/F

NC/HSDAC+

NC/HG
NC/LG2
NC/LV2

NC/VSS
NC/VSS

NC/GND
NC/GND
NC/GND
NC/GND
NC/GND

LAN I/F

NC/GND

CTRL25

RTT3/CRTL18

VDD33

VDD33

VDD33

VDD33

VDD33

VDD33

VDD33

AVDD33/AVDDL
AVDD33/AVDDL
AVDD33/AVDDL

NC/AVDDL

VDD25/VDD18
VDD25/VDD18
VDD25/VDD18
VDD25/VDD18

NC/VDD18
NC/VDD18
NC/VDD18
NC/VDD18
NC/VDD18

Power

AVDD25/HSDAC-

LED0
LED1
LED2

1

2

X1
X2

4

R384 3.6K_0402_5%

LAN_EEDO

108

LAN_EEDI

109

LAN_EECLK

111

LAN_EECS

106

ACTIVITY#

117

LINK_100#

115
114

LINK_1000#

113

TXD+/MDI0+

1

TXD-/MDI0-

2

RXIN+/MDI1+

5

RXIN-/MDI1-

6

NC/MDI2+

14

NC/MDI2-

15

NC/MDI3+

18

NC/MDI3-

19

LAN_X1

121

LAN_X2

122

R337 1K_0402_5%

105
23
127
72
74

88
10

120
11

123
124
126

9
13

22
48
62
73
112
118

8
125
26

41
56
71
84
94
107

3
7
20
16

32
54
78
99

24
45
64
110
116

12

1 2

R336 15K_0402_5%

1 2

R350 5.6K_0603_1%

1 2

5.6K for 8100CL

2.49K for 8110S(B)

AVDDH

0_0402_5%

12

R326

8110S@

DVDD_A

CTRL25
CTRL18

1

C423

0.1U_0402_16V4Z

2

1

C426

0.1U_0402_16V4Z

2

1

C422

0.1U_0402_16V4Z

2

2

1

0.1U_0402_16V4Z8110S@

V_12P

1

C425

R307

0.1U_0402_16V4Z

2

<BOM Structure>

4

CTRL18

1

2

C456

R315

2SB1188_SC628110S@

1 2

0.1U_0402_16V4Z8110S@

1 2

R351

C430

0.1U_0402_16V4Z8110S@

1 2
1 2

+3VALW

1

Q37

2 3

C462

4.7U_0805_10V4Z8110S@

U27

4

DO

GND

3

DI

NC

2

SK

NC

1

CS

VCC

AT93C46-10SI-2.7_SO8

1

C447
27P_0402_50V8J

2

+3VS

1

1

C459

C461

0.1U_0402_16V4Z8110S@

2

2

+1.8V_LAN

0_0402_5%8110S@

1

C488

0.1U_0402_16V4Z

2

1

C424

0.1U_0402_16V4Z

2

1

C489

0.1U_0402_16V4Z

2

2

C466

0.1U_0402_16V4Z8110S@

1

+2.5V_LAN

0_0402_5%8100C@
0_0402_5%8110S@

+1.8V_LAN

1

1

C458

2

2

+3VALW

5

1
6
7
8

25MHZ_16P_XSL025000FK1H

R363 0_0805_5%8110S@

1 2

0.1U_0402_16V4Z8110S@

AVDDH

Y3

12

1

C476

0.1U_0402_16V4Z

2

1

C427

0.1U_0402_16V4Z

2

1

C464

0.1U_0402_16V4Z

2

2

C479

1

C457 0.1U_0402_16V4Z

2

LAN_X2LAN_X1

0.1U_0402_16V4Z8110S@

3

0.1U_0402_16V4Z8110S@

LINK_100#
LINK_1000#

+3VALW

+2.5V_LAN

C396 0.01U_0402_16V7K8110S@

1

C449
27P_0402_50V8J

2

+3VALW

1

C486

0.1U_0402_16V4Z

2

AVDDL

DVDD

1

C487

0.1U_0402_16V4Z

2

2

C451

1

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1

2

2

C419

0.1U_0402_16V4Z8110S@

1

+3VALW

C442

0.1U_0402_16V4Z

R335

1 2

R328

1 2

R413

1 2

R334

1 2

+1.8V_LAN

0_0805_5%8100C@
0_0805_5%8110S@

0_0805_5%8110S@

0_0805_5%8100C@

12

C395 0.01U_0402_16V7K8110S@

12

C394 0.01U_0402_16V7K8110S@

12

C393 0.01U_0402_16V7K8110S@

12

C381 0.1U_0402_16V4Z8100C@

1 2

+3VALW

+2.5V_LAN
+1.8V_LAN

+2.5V_LAN

2

+3VALW

R224 300_0402_5%8100C@

1 2

R225 300_0402_5%8110S@

1 2

+3VALW

TXD+/MDI0+
TXD-/MDI0-

RXIN+/MDI1+

RXIN-/MDI1-

NC/MDI2+
NC/MDI2- MDO2-

NC/MDI3+
NC/MDI3-

RXIN+/MDI1+

2

ACTIVITY#

R188 300_0402_5%

1 2

U22

12

TD4-

MX4-

11

TD4+

MX4+

10

TCT4

MCT4

9

TD3-

MX3-

8

TD3+

MX3+

7

TCT3

MCT3

TD2-6MX2-

5

TD2+

MX2+

4

TCT2

MCT2

3

TD1-

MX1-

2

TD1+

MX1+

1

TCT1

MCT1

0.5u_24HST1041A-28110S@

U21

8

TX-

TD­TD+7TX+

6

CT

CT

5

NC

NC

4

NC

NC

3

CT

CT

2

RD-

RX-

1

RD+

RX+

LF-H80P_16P8100C@

SHLD2
SHLD1

75_0402_5%

75_0402_5%

75_0402_5%8110S@

75_0402_5%8110S@

1

14
13

C344

RJ45_GND

R256

12

R260

12

R259

12

R257

12

12

1000P_0402_50V7K

ACT_LAN#

MDO3­MDO3+
MDO1­MDO2­MDO2+
MDO1+
MDO0­MDO0+

LINK_LAN#

13
14
15

16
17
18

19
20
21

22
23
24

MDO0+
MDO0­MCT0

MDO1+
MDO1­MCT1

MDO2+

MDO3+
MDO3-

12
11

8
7
6
5
4
3
2
1

10

9

JP20

GREEN LED­GREEN LED+
PR4­PR4+
PR2­PR3­PR3+
PR2+
PR1­PR1+
AMBER LED­AMBER LED+

FOX_JM36113-P1161-TR

use 24ST1041A-4

MDO0+TXD+/MDI0+

9

MDO0-TXD-/MDI0-

10

MCT0

11
12
13

MCT1

14

MDO1+

15

MDO1-RXIN-/MDI1-

16

R317

49.9_0402_1%8110S@

NC/MDI3+
NC/MDI3-

R316

49.9_0402_1%8110S@
R310

49.9_0402_1%8110S@

NC/MDI2+
NC/MDI2-

R309

49.9_0402_1%8110S@
R314

49.9_0402_1%

TXD+/MDI0+

TXD-/MDI0-

RXIN+/MDI1+

RXIN-/MDI1-

49.9_0402_1%

49.9_0402_1%

49.9_0402_1%

R313

R312

R311

near LAN controller

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

LAN CONTROLLER

LA-2591

12
12

12
12

12
12

12
12

C409

12

0.01U_0402_16V7K8110S@

C408

12

0.01U_0402_16V7K8110S@

C407

12

0.01U_0402_16V7K

C406

12

0.01U_0402_16V7K

1

of

24 43Monday, October 11, 2004

0.1

+3VS

0.1U_0402_16V4Z714@

1

1

C379

C397

2

2

714@

0.1U_0402_16V4Z

1 1

+S1_VCC

1

2
714@

0.1U_0402_16V4Z

+3VS

1

2
714@

0.1U_0402_16V4Z

2 2

3 3

C401

C399

0.1U_0402_16V4Z714@

0.1U_0402_16V4Z714@

+3VS

0.1U_0402_16V4Z714@

1

C415

2

0.1U_0402_16V4Z714@

1

C410

2

0.1U_0402_16V4Z714@

CLK_33M_CBS

12

R301

10_0402_5%@

2

C384

4.7P_0402_50V8C@

1

1 2

R298 43K_0402_5%714@

+SD_PULLHIGH by BIOS setting

+SD_PULLHIGH

1 2

R347 43K_0402_5%714@

1 2

R325 43K_0402_5%714@

1 2

R348 43K_0402_5%714@

1 2

R318 43K_0402_5%714@

4 4

1 2

R327 43K_0402_5%714@

A

1

C378

2

714@

0.1U_0402_16V4Z

1

C437

2

714@

0.1U_0402_16V4Z

1

C436

2

714@

0.1U_0402_16V4Z

SMCD#

1

C383

2

1

C414

2

1

C438

2

SDD0_XDD7
SDD1_XDD0
SDD3_XDD4
SDD2_XDCLE
SDCMD_XDALE

+3VS

Chip has
internal
pull high

1 2

R296 10K_0402_5%714@

PCI_AD20 CBS_IDSEL

cardbus

SDCLK_XDWE#<26>

B

PCI_AD[0..31]<19,24,27,28>

PCI_C_BE3#<19,24,27,28>
PCI_C_BE2#<19,24,27,28>
PCI_C_BE1#<19,24,27,28>
PCI_C_BE0#<19,24,27,28>

PCIRST#<19,24,27,28,33>

PCI_FRAME#<19,24,27,28>

PCI_IRDY#<19,24,27,28>
PCI_TRDY#<19,24,27,28>

PCI_DEVSEL#<19,24,27,28>

PCI_STOP#<19,24,27,28>
PCI_PERR#<19,24,27,28>
PCI_SERR#<19,24,27,28>

PCI_PAR<19,24,27,28>
PCI_REQ1#<19>
PCI_GNT1#<19>

CLK_33M_CBS<18>

1 2

R303 100_0402_5%714@

PCI_PIRQA#<19>

+SD_PULLHIGH
SIRQ<21,33>
PCI_PIRQB#<19>

PLTRST_MCH#<7,19,21,27>

C439 0.1U_0402_16V4Z

+VCC_5IN1

SDCD#<26>
SDWP<26>

MS_XD_SD_PWREN#<26>

CLK_48M_CB<18>

SDCMD_XDALE<26>

SDD0_XDD7<26>
SDD1_XDD0<26>

SDD2_XDCLE<26>

SDD3_XDD4<26>

PCI_C_BE3#
PCI_C_BE2#
PCI_C_BE1#
PCI_C_BE0#

PCIRST#
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_DEVSEL#
PCI_STOP#
PCI_PERR#
PCI_SERR#
PCI_PAR
PCI_REQ1#
PCI_GNT1#

SMCD#

PLTRST_MCH#

714@

12

R306

1 2

VPPD0<26>
VPPD1<26>

VCCD0#<26>
VCCD1#<26>

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

33_0402_5%714@

U23

C2

AD31

C1

AD30

D4

AD29

D2

AD28

D1

AD27

E4

AD26

E3

AD25

E2

AD24

F2

AD23

F1

AD22

G2

AD21

G3

AD20

H3

AD19

H4

AD18

J1

AD17

J2

AD16

N2

AD15

M3

AD14

N3

AD13

K4

AD12

M4

AD11

K5

AD10

L5

AD9

M5

AD8

K6

AD7

M6

AD6

N6

AD5

M7

AD4

N7

AD3

L7

AD2

K7

AD1

N8

AD0

E1

CBE3#

J3

CBE2#

N1

CBE1#

N5

CBE0#

G4

PCIRST#

J4

FRAME#

K1

IRDY#

K3

TRDY#

L1

DEVSEL#

L2

STOP#

L3

PERR#

M1

SERR#

M2

PAR

A1

PCIREQ#

B1

PCIGNT#

H1

PCICLK

L8

RIOUT#_PME#

L11

SUSPEND#

F4

IDSEL

K8

MFUNC0

N9

MFUNC1

K9

MFUNC2

N10

MFUNC3

L10

MFUNC4

N11

MFUNC5

M11

MFUNC6

J9

MFUNC7

M10

GRST#

E7

VCC_SD

E8

SDCD#

F8

SDWP/SMWPD#

G7

SDPWREN33#

H5

SDCLKI

F6

SDCLK/SMWE#

E5

SDCMD/SMALE

E6

SDDAT0/SMDATA7

F7

SDDAT1/SMDATA0

F5

SDDAT2/SMCLE

G6

SDDAT3/SMDATA4

G5

GND_SD

C

+S1_VCC
+3VS

N12

N13

M13

VCCD1#

M12

VCCD0#

VPPD0

VPPD1

A7

VCCA2

G13

VCCA1

B4

VCC10

C8

PCI Interface

SD/MMC/MS/SM

CB714_LFBGA169714@

GND1D3GND2H2GND3L4GND4M8GND5

F12

K11

G1

K2

N4

F3

L6

L9

H11

D12

VCC2

VCC3

VCC4

VCC1

VCC5

VCC9

VCC6

VCC7

VCC8

CAD31/D10

CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6

CAD19/A25

CAD18/A7
CAD17/A24
CAD16/A17

CAD15/IOWR#

CAD14/A9

CAD13/IORD#

CAD12/A11

CAD11/OE#

CAD10/CE2#

CAD9/A10

CAD8/D15

CAD7/D7

CAD6/D13

CAD5/D6

CAD4/D12

CAD3/D5

CAD2/D11

CAD1/D4
CAD0/D3

CCBE3#/REG#

CCBE2#/A12

CCBE1#/A8

CCBE0#/CE1#

CARDBUS

CRST#/RESET
CFRAME#/A23

CIRDY#/A15

CTRDY#/A22

CDEVSEL#/A21

CSTOP#/A20
CPERR#/A14

CSERR#/WAIT#

CPAR/A13

CREQ#/INPACK#

CGNT#/WE#

CSTSCHG/BVD1_STSCHG#

GND6

GND7

C10

CCLK/A16

CCLKRUN#/WP_IOIS16#

CBLOCK#/A19

CINT#/READY_IREQ#

SPKROUT

CAUDIO/BVD2_SPKR#

CCD2#/CD2#
CCD1#/CD1#

CVS2/VS2#

CVS1/VS1

CRSV3/D2
CRSV2/A18
CRSV1/D14

MSPWREN#/SMPWREN#

GND8

B6

MSINS#

MSBS/SMDATA1

MSCLK/SMRE#
MSDATA0/SMDATA2
MSDATA1/SMDATA6
MSDATA2/SMDATA5
MSDATA3/SMDATA3

SMBSY#

SMCD#
SMWP#

SMCE#

CBS_CAD31

B2

CBS_CAD30

C3

CBS_CAD29

B3

CBS_CAD28

A3

CBS_CAD27

C4

CBS_CAD26

A6

CBS_CAD25

D7

CBS_CAD24

C7

CBS_CAD23

A8

CBS_CAD22

D8

CBS_CAD21

A9

CBS_CAD20

C9

CBS_CAD19

A10

CBS_CAD18

B10

CBS_CAD17

D10

CBS_CAD16

E12

CBS_CAD15

F10

CBS_CAD14

E13

CBS_CAD13

F13

CBS_CAD12

F11

CBS_CAD11

G10

CBS_CAD10

G11

CBS_CAD9

G12

CBS_CAD8

H12

CBS_CAD7

H10

CBS_CAD6

J11

CBS_CAD5

J12

CBS_CAD4

K13

CBS_CAD3

J10

CBS_CAD2

K10

CBS_CAD1

K12

CBS_CAD0

L13

CBS_CC/BE3#

B7

CBS_CC/BE2#

A11

CBS_CC/BE1#

E11

CBS_CC/BE0#

H13

CBS_CRST#

B9

CBS_CFRAME#

B11

CBS_CIRDY#

A12

CBS_CTRDY#

A13

CBS_CDEVSEL#

B13

CBS_CSTOP#

C12

CBS_CPERR#

C13

CBS_CSERR#

A5

CBS_CPAR

D13

CBS_CREQ#

B8

CBS_CGNT#

C11

CBSCCLK

B12

CBS_CSTSCHNG

C5

CBS_CCLKRUN#

D5

CBS_CBLOCK#

D11

CBS_CINT#

D6
M9

B5
A4

L12

CBS_CVS2

D9

CBS_CVS1

C6

CBS_RSVD/D14

A2

CBS_RSVD/A18

E10

CBS_RSVD/D2

J13

H7

MS_XD_SD_PWREN#

J8
H8
E9

1 2

R308 33_0402_5%714@

G9
H9
G8
F9

H6
J7
J6
J5

CBS_SPK#

CBS_CAUDIO

XDWP#

1 2

R358 33_0402_5%714@

714@

100K_0402_5%

MSBS_XDD1 <26>
MSD0_XDD2 <26>

MSD1_XDD6 <26>
MSD2_XDD5 <26>
MSD3_XDD3 <26>

XDBSY# <26>
XDCD# <26>
XDWP# <26>
XDCE# <26>

MS_INS# <26>

+S1_VCC

+S1_VPP

CBS_CCLK

R297

12

CBS_SPK# <29>

MSCLK_XDRE# <26>

D

CBS_CAD0
CBS_CAD1
CBS_CAD3
CBS_CAD5
CBS_CAD7
CBS_CC/BE0#
CBS_CAD9
CBS_CAD11
CBS_CAD12
CBS_CAD14
CBS_CC/BE1#
CBS_CPAR
CBS_CPERR#
CBS_CGNT#
CBS_CINT#

CBS_CCLK
CBS_CIRDY#
CBS_CC/BE2#
CBS_CAD18
CBS_CAD20
CBS_CAD21
CBS_CAD22
CBS_CAD23
CBS_CAD24
CBS_CAD25
CBS_CAD26
CBS_CAD27
CBS_CAD29
CBS_RSVD/D2
CBS_CCLKRUN#

+3VS

@

C441

CBS_CCD2#
CBS_CCD1#

@

270P_0402_50V7K

C376

270P_0402_50V7K

2

2

1

1

Closed to Pin L12 Closed to Pin A4

XDWP#

R299 2.2K_0402_5%714@

1 2

JP10

1

GND

2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

69
70
71
72
73
74
75
76
77
78

GND

D3

CD1#

D4

D11

D5

D12

D6

D13

D7

D14

CE1#

D15

A10

CE2#

OE#

VS1#

A11

IORD#

A9

IOWR#

A8

A17

A13

A18

A14

A19

WE#

A20

IREQ#

A21

VCC

VCC

VPP1

VPP2

A16

A22

A15

A23

A12

A24

A7

A25

A6

VS2#

A5

RESET

A4

WAIT#

A3

INPACK#

A2

REG#

A1

SPKR#

A0

STSCHG#

D0

D8

D1

D9

D2

D10

IOIS16#

CD2#

GND

GND

GND

GND

FOXCONN_1CA4A501-TC-A2_LT

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

E

35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68

79
80
81
82
83
84
85
86
87
88

CBS_CCD1#
CBS_CAD2
CBS_CAD4
CBS_CAD6
CBS_RSVD/D14
CBS_CAD8
CBS_CAD10
CBS_CVS1
CBS_CAD13
CBS_CAD15
CBS_CAD16
CBS_RSVD/A18
CBS_CBLOCK#
CBS_CSTOP#
CBS_CDEVSEL#

CBS_CTRDY#
CBS_CFRAME#
CBS_CAD17
CBS_CAD19
CBS_CVS2
CBS_CRST#
CBS_CSERR#
CBS_CREQ#
CBS_CC/BE3#
CBS_CAUDIO
CBS_CSTSCHNG
CBS_CAD28
CBS_CAD30
CBS_CAD31
CBS_CCD2#

+S1_VCC
+S1_VPP

Close to 5 in 1 socket

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

CardBus CTRL CB714

LA-2591

E

25 43Monday, October 11, 2004

0.1

of

714@

0.1U_0402_16V4Z

714@

4.7U_0805_10V4Z

714@

0.1U_0402_16V4Z

714@

4.7U_0805_10V4Z

C418

1 2
1 2

C421

C417

1 2
1 2

C420

R295

714@

10K_0402_5%

+5VS

+3VS

U24

9

12V

5

5V

6

5V

3

3.3V

4

3.3V

12

VCCD0
VCCD1
VPPD0
VPPD1

GND

SHDN

7

16

13

VCC

12

VCC

11

VCC

10

VPP

1
2
15
14

8

OC

CP2211D3_SSOP16

+S1_VCC

+S1_VPP

C372

714@

0.1U_0402_16V4Z

12

714@

12

4.7U_0805_10V4Z

C369
C373

714@

0.1U_0402_16V4Z

12

714@

12

4.7U_0805_10V4Z

C370

VCCD0# <25>
VCCD1# <25>
VPPD0 <25>
VPPD1 <25>

Q34

SI2301BDS_SOT23714@

S

D

1

C387

1U_0603_10V4Z714@

MS_XD_SD_PWREN#<25>

R300
10K_0402_5%714@

2

1 2

13

G

2

714@

+VCC_5IN1+3VS

1

C374

2

0.01U_0402_16V7K

1

C375

0.1U_0402_16V4Z714@

2

+VCC_5IN1

+VCC_5IN1

C398

1 2

C400

1 2

714@

0.1U_0402_16V4Z

714@

0.1U_0402_16V4Z

MS_INS#<25>

SDWP<25>

SDCD#<25>

SDD3_XDD4

SDCMD_XDALE

MSCLK_XDRE#
MSD3_XDD3

MSD2_XDD5
MSD0_XDD2
MSD1_XDD6
MSBS_XDD1

SDCLK_XDWE#

SDD0_XDD7

SDD1_XDD0

SD9
SD1
SD2
SD3

MS10

MS9
MS8
MS7
MS6
MS5
MS4
MS3
MS2
MS1

SD4
SD5
SD6
SD7
SD8

3
1
4

JP11

D2
CD/D3
CMD
VSS

VSS
VCC
SCLK
D3
INS
D2
D0
D1
BS
VSS

VDD
CLK
VSS
D0
D1

COMMDN
WP_SW
CD_SW

Close to 5 in 1 Connector

XD1

GND

XD0

CD

XD2

R/-B

XD3

-RE

XD4

-CE

XD5

CLE

XD6

ALE

XD7

-WE

XD8

-WP

XD9

GND

XD10

D0

XD11

D1

XD12

D2

XD13

D3

XD14

D4

XD15

D5

XD16

D6

XD17

D7

XD18

VCC

2

GND

ALPS_SCDE1C0100714CONN@

XDCD# <25>
XDBSY# <25>
MSCLK_XDRE# <25>
XDCE# <25>
SDD2_XDCLE <25>
SDCMD_XDALE <25>
SDCLK_XDWE# <25>
XDWP# <25>

SDD1_XDD0 <25>
MSBS_XDD1 <25>
MSD0_XDD2 <25>
MSD3_XDD3 <25>

SDD3_XDD4 <25>

MSD2_XDD5 <25>
MSD1_XDD6 <25>

SDD0_XDD7 <25>

+VCC_5IN1

SDCLK_XDWE# MSCLK_XDRE#SDD2_XDCLE

12

R324

0_0402_5%@

1

C416

10P_0402_50V8J@

10P_0402_50V8J@

2

Close to 5 in 1 Connector

+VCC_5IN1

1 2

R302 10K_0402_5%714@

1 2

R305 10K_0402_5%714@

1 2

R450 2.2K_0402_5%714@

1 2

R449 10K_0402_5%714@

MSCLK_XDRE#
SDCLK_XDWE#

XDCE#
XDBSY#

12

R304

0_0402_5%@

1

C385

2

THIS SHEET OF EN GINEE RING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

CARD BUS SOCKET

LA-2591

of

26 43Monday, October 11, 2004

0.1

5

D D

PCI_AD[0..31]<19,24,25,28>

C C

PCI_C_BE3#<19,24,25,28>
PCI_C_BE2#<19,24,25,28>
PCI_C_BE1#<19,24,25,28>
PCI_C_BE0#<19,24,25,28>
CLK_33M_1394<18>
PCI_GNT2#<19>
PCI_REQ2#<19>

ID: AD16

PCI_FRAME#<19,24,25,28>
PCI_IRDY#<19,24,25,28>
PCI_TRDY#<19,24,25,28>
PCI_DEVSEL#<19,24,25,28>
PCI_STOP#<19,24,25,28>
PCI_PERR#<19,24,25,28>
PCI_PIRQE#<19>

PCI_SERR#<19,24,25,28>
PCI_PAR<19,24,25,28>

CLKRUN#<21,24,28,33>

PCIRST#<19,24,25,28,33>

B B

PLTRST_MCH#<7,19,21,25>

CLK_33M_1394

12

R430
10_0402_5%@

1

C500
10P_0402_50V8J@

2

** GPIO2 and GPIO3 defaults as an input
and if it is not implemented, it is
recommended that it be pulled low to
ground with a 220 ohm resistor.

Power on

PCI_AD[0..31]

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

CLK_33M_1394

PCI_AD16

1 2

R414 100_0402_5%

R360

1 8
2 7

SCL_1394

3 6

SDA_1394

4 5

220_1206_8P4R_5%

Entry S3 S3 Wake-up

84
82
81
80
79
77
76
74
71
70
69
67
66
65
63
61
46
45
43
42
41
40
38
37
32
31
29
28
26
25
24
22
34
47
60
73
16
18
19
36
49
50
52
53
54
56
13
21
57
58
12
85

14
89

90

VCC(+3VS)

4

U30

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_C/BE3
PCI_C/BE2
PCI_C/BE1
PCI_C/BE0
PCI_CLK
PCI_GNT
PCI_REQ
PCI_IDSEL
PCI_FRAME
PCI_IRDY
PCI_TRDY
PCI_DEVSEL
PCI_STOP
PCI_PERR
PCI_INTA/CINT
PCI_PME/CSTSCHG
PCI_SERR
PCI_PAR
PCI_CLKRUN
PCI_RST

G_RST
GPIO3

GPIO2

+3VS

VDDP20VDDP35VDDP48VDDP62VDDP

TSB43AB21A
/(TSB43AB22)

PCI BUS INTERFACE

PLLGND18REG_EN9AGND

AGND

AGND

AGND

AGND

AGND

109

110

111

117

126

127

128

0.1U_0402_16V4Z

78

87

86

CYCLEIN

BIAS CURRENT

OSCILLATOR

FILTER

EEPROM 2 WIRE BUS

POWER CLASS

PHY PORT 1

AGND

DGND17DGND23REG1830DGND33DGND44DGND55DGND64DGND68DGND75DGND83REG1893DGND

1

C506

2

1

2

CLOSE CHIP

R362 10K_0402_5%

R435

1 8
2 7
3 6
4 5

4.7K_1206_8P4R_5%

11

96

CNA

DVDD
DVDD

TEST1710TEST16

DVDD
DVDD
DVDD
DVDD
DVDD
DVDD

CYCLEOUT/CARDBUS

PLLVDD

AVDD
AVDD
AVDD
AVDD
AVDD

CPS

NC/(TPBIAS1)

NC/(TPA1+)

NC/(TPA1-)

NC/(TPB1+)

NC/(TPB1-)

R0

R1

FILTER0
FILTER1

SDA
SCL
PC0

PC1
PC2

TPBIAS0

TPA0+

TPA0­TPB0 +
TPB0 -

TEST9
TEST8

TEST3
TEST2
TEST1
TEST0

TSB43AB21A_PQFP128

103

C455

0.1U_0402_16V4Z

3

+3VS

+3VS

12

+3VS

15
27
39
51
59
72
88
100
7
1
2
107
108
120

4.7U_0805_10V4Z

106

125
124
123
122
121

118

119
6

X0

5

X1

3
4
92
91
99

98
97

116
115
114
113
112

94
95

101
102
104
105

1 2

R369 1K_0402_5%

1 2

R404

6.34K_0402_1%

12

1 2

C502

0.1U_0402_16V4Z

SDA_1394
SCL_1394

XTPBIAS0
XTPA0+
XTPA0­XTPB0+
XTPB0-

1

C505

0.1U_0402_16V4Z

2

L18

C513

BLM21A601SPT_0805

1 2

1

C503

0.01U_0402_16V7K

2

+PLLVDD

1

2

Near 1394 IC

1 2

C515 22P_0402_50V8J

X2

24.576MHz_16P_3XG-24576-43E1

30ppm

1 2

C507 22P_0402_50V8J

EEPROM cancel,
need System
Support

1

C499

0.1U_0402_16V4Z

2

+3VS

1

C504

0.1U_0402_16V4Z

2

C465

220P_0402_25V8K

+3VS

1

C454
1000P_0402_50V7K

2

12

R387

56.2_0402_1%

12

R372

56.2_0402_1%

1

2

2

1

C491

0.1U_0402_16V4Z

2

12

12

12

1

2

1

C452
1000P_0402_50V7K

2

R388

56.2_0402_1%

R373

56.2_0402_1%

R370

5.11K_0402_1%

C498

0.1U_0402_16V4Z

1

C482

0.1U_0402_16V4Z

2

1

C463
1000P_0402_50V7K

2

1

C484
1U_0603_10V4Z

2

XTPA0+ <32>
XTPA0- <32>
XTPB0+ <32>
XTPB0- <32>

The connector depend on
defferent project

1

C467

0.1U_0402_16V4Z

2

1

C470
1000P_0402_50V7K

2

1

1

C453

0.1U_0402_16V4Z

2

1

C485
1000P_0402_50V7K

2

Close Chip

T1: >2ms

PLTRST_MCH#

A A

T1

T1

Note: GLOAB_RESET#
Can Connect to
PCI_PCIRST#

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

IEEE 1394 CONTROLLER

LA-2591

1

0.1

of

27 43Monday, October 11, 2004

5

4

3

+3VS

+3VS

2

1

D3

BT_LED

BT_LED<17>

D D

WLAN_ACT1

2

3

1N4148_SOT23
1N4148_SOT23

3

2

D8

1

C

2

B

Q7
MMBT3904_SOT23

E

3 1

R43

1 2

1K_0402_5%

12

R44

1

10K_0402_5%

WL_BT_LED <32>

CLK_33M_MPCI

R73
10_0402_5%@

1 2

2

C118

4.7P_0402_50V8C

@

1

C C

PCI_AD[0..31] <19,24,25,27>

WL/BT_ON<17,33>
PCI_PIRQH#<19>

CLK_33M_MPCI<18>

PCI_REQ3#<19>

PCI_C_BE3#<19,24,25,27>

PCI_C_BE2#<19,24,25,27>
PCI_IRDY#<19,24,25,27>

CLKRUN#<21,24,27,33>

PCI_SERR#<19,24,25,27>
PCI_PERR#<19,24,25,27>

PCI_C_BE1#<19,24,25,27>

WLAN_ACT1

WL/BT_ON WL_ON

21

D9 RB751V_SOD323

PCI_PIRQH#

CLK_33M_MPCI
PCI_REQ3#
PCI_AD31

PCI_AD29
PCI_AD27

PCI_AD25
PCI_C_BE3#

PCI_AD23
PCI_AD21

PCI_AD19
PCI_AD17

PCI_C_BE2#
PCI_IRDY#

CLKRUN#

PCI_SERR#

PCI_PERR#
PCI_C_BE1#
PCI_AD14

PCI_AD12
PCI_AD10

PCI_AD8

PCI_AD7

PCI_AD5

+5VS

+5VS

B B

PCI_AD3

PCI_AD1

2

C119

0.1U_0402_16V4Z

1

JP23

KEY KEY

101
103
105
107
109
111
113
115
117
119
121
123

125

AMP_1318916-1

112
334

556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
535354
555556
575758
595960
616162
636364
656566
676768
696970
717172
737374
757576
777778
797980
818182
838384
858586
878788
898990
919192
939394
959596
979798
9999100
101
103
105
107
109
111
113
115
117
119
121
123

125

GND

127

2
4

6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102

102

104

104

106

106

108

108

110

110

112

112

114

114

116

116

118

118

120

120

122

122

124

124

126

126

GND

128

PCI_PIRQG#

PCIRST#
PCI_GNT3#
ICH_PME#
PCI_AD30
PCI_AD28

PCI_AD26
PCI_AD24

PCI_AD22
PCI_AD20
PCI_PAR
PCI_AD18
PCI_AD16

PCI_FRAME#
PCI_TRDY#
PCI_STOP#

PCI_DEVSEL#
PCI_AD15

PCI_AD13
PCI_AD11

PCI_AD9
PCI_C_BE0#

PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

2

C364

0.1U_0402_16V4Z

1

+3VALW

PCI_PIRQG# <19>

PCIRST# <19,24,25,27,33>
PCI_GNT3# <19>

ICH_PME# <19,24,33>

1 2

100_0402_5%

PCI_PAR <19,24,25,27>

PCI_FRAME# <19,24,25,27>
PCI_TRDY# <19,24,25,27>
PCI_STOP# <19,24,25,27>

PCI_AD18MINIDSEL

R293

PCI_DEVSEL# <19,24,25,27>

PCI_C_BE0# <19,24,25,27>

2

C365

0.1U_0402_16V4Z

1

+3VALW

2

C110

0.1U_0402_16V4Z

1

+5VS

+3VS

2

C371

0.047U_0402_16V4Z

1

A A

5

2

C367

0.047U_0402_16V4Z

1

4

2

C111

0.047U_0402_16V4Z

1

2

C402

0.047U_0402_16V4Z

1

2

C112

0.047U_0402_16V4Z

1

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

C404

0.047U_0402_16V4Z

1

2

C368

0.047U_0402_16V4Z

1

2

C403

0.047U_0402_16V4Z

1

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

MINIPCI

LA-2591

of

1

28 43Monday, October 11, 2004

0.1

A

+AVDD_AC97

12

R276
10K_0402_1%

1 1

R230

BEEP#<33>

CBS_SPK#<25>

SPKR<21>

1 2

560_0402_5%

R232

1 2

560_0402_5%

R282

1 2

560_0402_5%

2

B

2

C

Q28

MMBT3904_SOT23

E

3 1

B

2

C

Q26

MMBT3904_SOT23

E

3 1

B

E

C

Q27

MMBT3904_SOT23

3 1

MONO_IN

B

R242

1 2

2.4K_0402_5%
C329

1 2

1U_0603_10V4Z

CD_PLAY<23,33>

MONO_INR

C471

0.1U_0402_16V4Z

4.7U_0805_10V4Z

1 2

R371 10K_0402_5%

C472

Adjustable Output

U29

4

VIN

2

SENSE or ADJ

DELAY
ERROR7CNOISE

8

SD

SI9182DH-AD_MSOP8

C

+VDDA+5VALW

R397

69.8K_0603_1%

1 2

12

R396
24K_0402_1%

+VDDA

C490 4.7U_0805_10V4Z

VOUT

GND

5
6
1
3

C468 0.1U_0402_16V4Z

D

E

X3

1 2

EC_IDERST <23,33>

+3VS

1

C501
22P_0402_50V8J

2

SMB_EC_CK2<15,33>

SMB_EC_DA2<15,33>

+AVDD_AC97

@

1 2

1

2

R433 0_0402_5%

R406

1K_0402_5%@

Q41 2N7002_SOT23@
R374 1.74K_0402_1%

R405

1K_0402_5%@

Q40 2N7002_SOT23@
R386 0_0402_5%

1

2

C492 0.01U_0402_16V7K

1 2
2

G

1 3

D

1 2

1 2
2

G

1 3

D

1 2

1M_0402_5%@

C517 1U_0603_10V4Z

12

R407

S

12

R403

4.7K_0402_5%@

S

+AVDD_AC97

12

R81

**

1

2

C523 0.1U_0402_16V4Z

4.7K_0402_5%@

C524 1U_0603_10V4Z

SMB_CLK

R402

3.3K_0402_5%

1 2

SMB_DATA

Audio Signal Bias Circuit

INTCD_L CD_L

INT_CD_L<23>
INT_CD_R<23>

12

R444 20K_0402_1%
R443 20K_0402_1%

6.8K_0402_5%

INTCD_R

12

R442

12

CD_GND To CD_GNDA Bypass

R447 20K_0402_1%

R445
0_0402_5%

1 2
1 2

12

12

+AUD_VREF

C521

CD_GND<23>

12

Analog Reference V

C520 0.1U_0402_16V4Z

GND To GNDA Bypass

JOPEN3 SHORT PADS
JOPEN4 SHORT PADS

1 2

C538 1U_0603_10V4Z

1 2

C528 1U_0603_10V4Z

12

R441

6.8K_0402_5%

CD_GNDA

R448

6.8K_0402_5%

4.7U_0805_10V4Z

@

CD_R

+AVDD_AC97

AC97 Codec

2 2

3 3

4 4

+AUD_VREF

MIC<31>

WITH 14.318MHz : Rxxx POP
WITH 24.576MHz : Rxxx DEPOP

L16 CHB2012U170_0805

+VDDA

1 2

1 2

R438 2.2K_0402_5%

IAC_RST#<20,30>

IAC_SYNC<20,30>

IAC_SDATO<20,30>

R428

1 2

0.1U_0402_16V4Z

1 2

C534 1U_0603_10V4Z

1 2

C535 1U_0603_10V4Z

1 2

C532 0.1U_0402_16V4Z

1 2

C529 0.1U_0402_16V4Z

1 2

C531 1U_0603_10V4Z

1 2

C533 1U_0603_10V4Z@

1 2

C522 0.1U_0402_16V4Z

MONO_INR

1 2

R431 22_0402_5%

1 2

R427 22_0402_5%

1 2

R423 22_0402_5%

SMB_DATA

0_0402_5%@

10U_0805_10V4Z

CD_AGNDCD_GNDA

AC_RST#
AC_SYNC
AC_SDATO

C493

1

2

U31

14
15
16
17
23
24
18
20
19
21
22
13
12

11
10

5

45
46

47
48

4
7

38

AVDD125AVDD2
AUX_L
AUX_R
JD2

MONO_OUT/VREFOUT3
JD1
LINE_IN_L
LINE_IN_R
CD_L
CD_R
CD_GND
MIC1
MIC2
PHONE
PC_BEEP

RESET#
SYNC
SDATA_OUT
SDA

XTLSEL
SPDIFI/EAPD
SPDIFO
DVSS1

DVSS2

ALC250-VD_LQFP48

DVDD11DVDD2
LINE_OUT_L
LINE_OUT_R

HP_OUT_L

HP_OUT_R

BIT_CLK

SDATA_IN

XTL_IN

XTL_OUT

AFILT1
AFILT2

VREFOUT

VREF

DCVOL

VREFOUT2

VAUX

DISABLE#

SCK

AVSS1
AVSS2

9

35
36
37
39
41

6
8
2

3
29
30
28
27
32

31

NC

33
34
43
44

40

NC

26
42

C494

CD_L
CD_R

1 2

C539 1U_0603_10V4Z

C_MIC

GND GNDA

C526

0.1U_0402_16V4Z

LINEL
LINER

AC_BITCLK

AC_SDATAI0

1M_0402_5%@

AFILT1
AFILT2

1

C525
10U_0805_10V4Z

2

C497 1000P_0402_50V7K@
C509 1000P_0402_50V7K@

LINE_OUTL

1 2

C508 1U_0603_10V4Z

LINE_OUTR

1 2

C495 1U_0603_10V4Z

1 2

C516 27P_0402_50V8J

1 2

R436 22_0402_5%

1 2

R437 22_0402_5%

R432

1 2

C518 1000P_0402_50V7K
C514 1000P_0402_50V7K

+AUD_VREF

VREF1
DCVOL
REF2
VAUX

SMB_CLK

R424 0_0402_5%

LINE_OUTL <31>
LINE_OUTR <31>

IAC_BITCLK <20,30>

IAC_SDATAI0 <20>

24.576MHz_16P_3XG-24576-43E1

1 2

1

C512
22P_0402_50V8J

2

1 2

R434 0_0603_5%@

GND GNDA

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Codec ALC250

LA-2591

E

29 43Monday, October 11, 2004

0.1

of

5

4

3

2

1

16
15
14
13
12
11
10
9

A_R3

A_U1

1

MCLK/XIN

2

XOUT

3

BIT_CLK

4

VDD

5

SDATA_IN0

6

SDATA_OUT

7

SYNC

8

RESET

SV92A2_SOIC16

12

A_R2

1 2

150_0402_5%

A_C6

GPIO_A/EE_SC/ID0N

GPIO_B/EE_SD/PNPID

A_R10

1 2

536_1206_1%

73.2_1210_1%

2

2

1

0.1U_0402_16V4Z

A_R24 1K_0402_5%@

16
15

A_R22 4.7K_0402_5%

14

SDATA_IN1

13

VDDA

GND

AOUT/ID1N

C1A
C2A

A_C140.1U_0402_16V4Z

12

A_R25 1K_0402_5%@

11
10
9

No Ground Plane In DAA Section

12

A_R11

A_Q5

3 1

MMBTA06LT1_SOT23

2

0_0402_5%

A_Q4
MMBTA06LT1_SOT23

3 1

A_R4

12

2.49K_1210_1%

A_C7

A_R14

12

C1A
C2A

3 1

A_Q1
MMBTA42LT1_SOT23

2

12

A_R5

2

1

2700P_0603_50V7K

100K_0402_5%

A_D3

MMBTA92LT1_SOT23

2

0.01U_0402_16V8K

2

3 1

21

TLZ43_SOD80

31

A_Q2
A_C10

12

A_R6

1 2

100K_0402_5%
A_Q3

MMBTA42LT1_SOT23

NOTE: Ample copper pad
should be dedicated to
Q1, Q3, Q4, Q5, R1, R4,
and R11. Please refer to
the design advisory and
layout guidelines for
further details.

+3VALW

BITCLK

D D

C C

IAC_BITCLK<20,29>

IAC_SDATAI1<20>

IAC_SDATO<20,29>

IAC_SYNC<20,29>

IAC_RST#<20,29>

IAC_SYNC
IAC_RST#

1 2

R412 0_0402_5%

1 2

R417 22_0402_5%

1 2

R422 22_0402_5%

1 2

R426 22_0402_5%

1 2

R429 22_0402_5%

BITCLKIAC_BITCLK

SDATA_IN0IAC_SDATAI1
SDATA_OUTIAC_SDATO
SYNC
RESET#

A_C1

C1A

1 2

33P_1808_3KVK8

A_C2

C2A

1 2

33P_1808_3KVK8

10U_0805_6.3V6M

0.47U_1206_16V7K

A_L3

1 2

BLM18HD102SN1_0603

A_L4

1 2

BLM18HD102SN1_0603

A_C19

A_C4

A_R9

1

2

2

A_R1

1.07K_1210_1%

1

1 2

12

2

A_C5

1

1M_0402_1%

A_R23 10K_0402_5%

A_R26 100_0402_5%

SDATA_IN0
SDATA_OUT

2

SYNC

A_C17

RESET#

0.1U_0402_16V4Z

1

A_C18 33P_1808_3KVK8

1 2

A_U2

1

QE

2

DCT

3

RX

4

IB

5

C1B

6

C2B

7

VREG
RNG18RNG2

CPS1038_SOIC16

0.1U_0402_16V4Z

3.65K_1210_1%

DCT2

IGND

DCT3

QB

QE2

SC

VREG2

12

A_R8

B B

A A

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

20M_0805_1%

A_R7

20M_0805_1%

12

GSD2004S_SOT23

IGND

GSD2004S_SOT23

12

A_C3 0.01U_0805_250VM7

1

A_D2

2

3

2

3

A_D1

1

2

A_L2BLM11A601S_0603

1 2

A_D4

P3100SB_DO214AA

A_L1

1 2

BLM11A601S_0603

2

A_C9

12

Title

Size Document Number Rev

Date: Sheet

680P_1808_3KVK8

1

2

A_C8
680P_1808_3KVK8

1

Compal Electronics, Inc.

MODEM-Ager eMOM CPS1038

LA-2591

A_JP1

124

3

JAE_FI-S2P-HF

1

of

30 43Monday, October 11, 2004

0.1

A

B

C

D

E

+5VAMP

1 1

R446

1 2

100K_0402_5%

C536

12

VOLUME_CTRL<33>

2 2

0.01U_0402_16V7K

LINE_OUTL<29>

LINE_OUTR<29>

L17

1 2

CHB2012U170_0805

10U_0805_10V4Z

SPKL+
SPKR+

1

2

0.1U_0402_16V4Z

+5V_AMP

1

C496

2

U32

7

PVDD

18

PVDD

19

VDD

2

HP/LINE#

3

VOLUME

4

LOUT+

21

ROUT+

5

LLINEIN

23

RLINEIN

6

LHPIN

20

RHPIN

17

CLK

APA2121PI-TR_TSSOP24

C510

0.047U_0402_16V4Z

1

C511

2

SHUTDOWN#

SE/BTL#

PC-BEEP

BYPASS

LOUT-

ROUT­LBYPASS
RBYPASS

GND
GND
GND
GND

1

C537

2

0.1U_0402_16V4Z

22

JACK_PLUG

15

BEEP_AMP

14

BYPASS_AMP

11
9
16
10
8

1
12
13
24

+5VAMP

12

R425
100K_0402_5%

SPKL­SPKR-

C127

1U_0603_10V4Z

2

1

EC_MUTE# <33>

2

C122

0.47U_0603_16V7K

1

SPKL+
SPKL­SPKR+
SPKR-

JP24

1
2
3

1

C388

47P_0402_50V8J@

1

C389

47P_0402_50V8J@

2

2

47P_0402_50V8J@

1

1

C391

C390

47P_0402_50V8J@

2

2

4

ACES_85204-0400

JP13

5
4

INT_MIC

INT_MIC<16>

MIC<29>

L19

1 2

FBM-11-160808-601-T_0603

47P_0402_50V8J

C530

INTMIC

1

2

3
6
2
1

FOX_JA6033L-1S1

MIC IN

7
8

C125

100U_D2_6.3VM

3 3

CF1

CF2

CF3

CF4

CF5

CF7

CF6

CF8

CF13

H3
HOLEA

1

H16
HOLEA

1

1

CF10

H2

HOLEA

1

H12
HOLEA

1

1

1

1

1

1

1

1

1

1

CF12

FM3

H9
HOLEA

1

H8
HOLEA

1

1

1

CF14

FM4

H10
HOLEA

1

H6
HOLEA

1

H13
HOLEA

1

H15
HOLEA

1

H14
HOLEA

1

H18
HOLEA

1

H1
HOLEA

1

H19
HOLEA

1

H21
HOLEA

1

H20
HOLEA

1

CF9

CF11

1

1

FM2

H11
HOLEA

1

H7
HOLEA

1

1

1

1

FM1

1

H4
HOLEA

1

H5
HOLEA

1

4 4

H17
HOLEA

SPKR+
JACK_PLUG

SPKL+

+

1 2

C519

100U_D2_6.3VM

+

1 2

Tune headphone volume

1

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

SPKR+_C

SPKL+_C

R439

1 2

0_0402_5%

R80

1 2

0_0402_5%

1K_0402_5%

INTSPK_CR+

1 2

L20 FBM-11-160808-601-T_0603

INTSPK_CL+ PL

1 2

L4 FBM-11-160808-601-T_0603

12

R82

12

R440

1K_0402_5%

D

C527

47P_0402_50V8J

PR

JP14

5
4
3

6
2
1

1

1

C126

47P_0402_50V8J

2

2

Title

Size Document Number Rev
Custom

Date: Sheet

FOX_JA6033L-1S1

Compal Electronics, Inc.

AMP & Audio Jack

LA-2591

7
8

E

31 43Monday, October 11, 2004

0.1

of

A

B

C

D

E

1

2

C412
10P_0402_50V8J

@

1

1

2

2

1

C361
10P_0402_50V8J

@

2

+USB_VCCA

1

C386
1000P_0402_50V7K

2

1
2
3
4

5
6
7
8

+USB_VCCA

C355
1000P_0402_50V7K

JP22

1
2
3
4

5
6
7
8

SUYIN_020173MR004G533ZR

JP26

VCC
D­D+
GND

GND1
GND2
GND3
GND4

SUYIN_020173MR004G533ZR

VCC
D­D+
GND

GND1
GND2
GND3
GND4

Camera USB KEY

+5VS
USBP7+<21>
USBP7-<21>

USBP7+
USBP7-

JP1

1
2
3
4
5

ACES_88266-0500

USB Port

1

+

C392

C377

100U_6.3V_M

1 1

2 2

C446

12

0.1U_0402_16V4Z

R366

4.7K_0402_1%

+5VALW

5

3

1 2

U26

IN

SET

AATI4610AIGV-T1_SOT23-5

SYSON#<35>

OUT
ON#

GND

1
4
2

SYSON#

R361

20K_0402_5%

+USB_VCCA

12

R365
10K_0402_5%

12

OVCUR#3

1

C445
1000P_0402_50V7K

2

1

C443

0.47U_0603_16V7K

2

OVCUR#3 <21>

USBP4-<21>
USBP4+<21>

10P_0402_50V8J

@

100U_6.3V_M

USBP3-<21>
USBP3+<21>

10P_0402_50V8J

@

C405

C357

C358

2

0.1U_0402_16V4Z

1

1

2

2

1

+

C349

2

0.1U_0402_16V4Z

1

2

LED Function

R86

D10

R84 130_0402_5%

CHARGE_LED0#<33>

CHARGE_LED1#<33>

3 3

1 2

R83 130_0402_5%

1 2

CHARGE0

4 3

CHARGE1

19-22SURSYGC/S530-A2/TR8_G/R

2 1

330_0402_5%

PWR_LED#<33>

2

1 3

Q17
PDTA114EK_SC59

D12

PWR_DPWR_R

12

17-21SYGC/S530-E1/TR8_GRN

21

HDD_ACT#PWR_LED#

HDD_ACT#<23>

2

R85

HDACT_R HDACT_D

1 3

330_0402_5%

Q16
PDTA114EK_SC59

12

17-21SYGC/S530-E1/TR8_GRN

+5VMOD+5VALW

D11

21

T/P Board

SWDJ Board

+5VALW +5VS

JP5

1
2
3
4
5
6
7
8
9

10

4 4

ACES_85201-1005

A

SWDJ_ON/OFF#
PLAY/PAUSE_BTN#
FORWARD_BTN#
REVERSE_BTN#

STOP_BTN#
WL_BT_LED
WL/BT_BTN#

SWDJ_ON/OFF# <34>
PLAY/PAUSE_BTN# <33>
FORWARD_BTN# <33>
REVERSE_BTN# <33>

STOP_BTN# <33>
WL_BT_LED <28>
WL/BT_BTN# <33>

JP6

1
2
3
4
5

ACES_85201-0605

B

6

+5VALW

PSDAT3 <33>
PSCLK3 <33>

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

1394/USB Board

JP25

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

ACES_87213-1400

14

D

+5VALW

XTPA0­XTPA0+
XTPB0­XTPB0+
SYSON#

OVCUR#0
USBP0+

USBP0­USBP1+

USBP1-

XTPA0- <27>
XTPA0+ <27>
XTPB0- <27>
XTPB0+ <27>

OVCUR#0 <21>
USBP0+ <21>

USBP0- <21>
USBP1+ <21>

USBP1- <21>

Compal Electronics, Inc.

Title

USB Port

Size Document Number Rev

Custom

LA-2591

Date: Sheet

E

0.1

of

32 43Monday, October 11, 2004

A

+3VALW

0.1U_0402_16V4Z

1

1

C291

2

+3VS

LPC_LFRAME#<20>

LPC_LAD[0..3]

PCIRST#<19,24,25,27,28>
EC_SCI#<21>

CLKRUN#<21,24,27,28>

PROCHOT#<4>

SMB_EC_DA2<15,29>
SMB_EC_CK2<15,29>
SMB_EC_DA1<34,38>
SMB_EC_CK1<34,38>

CD_PLAY<23,29>

NUMLOCK#<17>

CHARGE_LED0#<32>

SCROLLLOCK#<17>
CAPLOCK#<17>

WL/BT_BTN#<32>

RSMRST#<21>
BKOFF#<16>
SLP_S3#<21>

LID_SWOUT#<21>

SLP_S5#<21>
EC_SMI#<21>

LID_SW#<17>

PWRBTN_OUT#<21>

ICH_PME#<19,24,28>

4
1

IN

C106

1000P_0402_50V7K

R252

1 2

SIRQ<21,25>

MSEN#<17>

SYSON<35,41>

ADP_I<37>

SUSP#<16,34,35,40,41>

+3VALW

12

R196

1 1

2 2

4.7K_0402_5%

47K_0402_5%

CLK_33M_LPCEC<18>

C328
15P_0402_50V8J@

12

4.7K_0402_5%

SMB_EC_DA1
SMB_EC_CK1
SMB_EC_DA2
SMB_EC_CK2

R263
10K_0402_5%

1 2

12

JOPEN2

SHORT PADS

1 2

R229

+3VS

1 2

GATEA20

ECRST#

1 2

R240

33_0402_5%@

KBRST#

LPC_LAD[0..3]<20>

1

C290

0.1U_0402_16V4Z

2

+5VALW

12

12

12

R227

R233

4.7K_0402_5%

GATEA20<20>

4.7K_0402_5%

R236

R273

10K_0402_5%

KBRST#<20> SLP_S4#<21>

2

0.1U_0402_16V4Z

EC DEBUG port

3 3

JP7

1

1

2

2

SLP_S4#

3

3

UTX

4

4

5

5

6

6

7

7

8

8

9

9

10

10

E&T_96212-1011S@

FOR LPC SIO DEBUG PORT

+5VS

JP9

1

1

2

2

3

3

4

4

5

5

6

6

LPC_LAD0

7

7

LPC_LAD1

8

8

4 4

9
10
11
12
13
14
15
16
17
18
19
20

ACES_85201-2005@

LPC_LAD2

9

LPC_LAD3

10

LPC_LFRAME#

11

LPC_LDRQ0#

12

PCIRST#

13

R275 10K_0402_5%@

14

R270 22_0402_5% @

15

1 2

SIRQ

16
17
18
19
20

+5VALW

+3VS

LPC_LDRQ0# <20>

12

A

CLK_33M_LPCEC

1 2

10P_0402_50V8J

C362

3

OUT

NC

2

NC

32.768KHZ_12.5P_1TJS125DJ2A073

Y1

1 2

10P_0402_50V8J

C363

Close to RTC pad

1

2

10K_0402_5%@

12

B

0.1U_0402_16V4Z

C336

GATEA20
KBRST#
SIRQ
LPC_LFRAME#
LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0

PCIRST#
ECRST#
EC_SCI#
CLKRUN#

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

MSEN#

SMB_EC_DA2
SMB_EC_CK2
SMB_EC_DA1
SMB_EC_CK1

UTX

SLP_S4#

SCROLLLOCK#
WL/BT_BTN#

SLP_S3#
LID_SWOUT#
SLP_S5#
EC_SMI#

ICH_PME#

CRY2

20M_0402_5%@

R286

CRY1

B

1000P_0402_50V7K

1

1

C345

2

2

U20

1

GA20/ GPIO00/GA20

2

KBRST#/GPIO01/KBRST#

3

SERIRQ

5

LPC_FRAME# / LFRAME#

6

LPC AD3/LAD3

9

LPC AD2/LAD2

10

LPC AD1/LAD1

12

LPC AD0/LAD0

14

CLK_PCI_EC/PCICLK

15

PCIRST#

42

EC RST#/ ECRST#

24

EC SCI#/SCI#/GPIO0E

44

PM_CLKRUN#/ CLKRUN#

63

KSI0/GPIO30

64

KSI1/GPIO31

65

KSI2/GPI032

66

KSI3/GPIO33

67

KSI4/GPIO34

68

KSI5/GPI035

69

KSI6/GPIO36

70

KSI7/GPIO37

47

KSO0/GPIO20

48

KSO1/GPIO21

49

KSO2/GPIO22

50

KSO3/GPIO23

51

KSO4/GPIO24

52

KSO5/GPIO25

53

KSO6/GPIO26

54

KSO7/GPIO27

55

KSO8/GPIO28

56

KSO9/GPIO29

57

KSO10/GPIO2A

58

KSO11/GPIO2B

59

KSO12/GPIO2C

60

KSO13/GPIO2D

61

KSO14/GPIO2E

62

KSO15/GPIO2F

89

EC URXD/KSO16/GPIO48

90

EC UTXD/KSO17/GPIO49

88

EC SMD2/ GPIO47/SDA2

87

EC SMC2/GPIO46/SCL2

86

EC SMD1/GPIO44/SDA1

85

EC SMC1/GPIO44/SCL1

34

PCM_SPK#/EMAIL_LED#/ GPIO16

35

SB_SPKR/PWR_SUSP_LED#/ GPIO17

38

PWRLED#/ GPIO19

40

NUMLED#/ GPIO1A

99

BATT CHGI LED#/ E51CS#

101

BATT LOW LED#/ E51MR0

100

CAPS LED#/ E51TMR1

102

ARROW LED#/ E51 INT0

104

SYSON/GPIO56/ E51 INT1

4

EC_RSMRST#/ GPIO02

7

BKOFF#/GPIO03

8

PM SLP S3#/GPIO04

16

EC LID OUT#/GPIO06

17

PM SLP S05#/ GPIO07

18

EC SMI#/GPIO08

19

EC SWI#/GPIO09

20

LID SW#/ GPIO0A

21

SUSP#/GPIO0B

22

PBTN_OUT#/GPIO0C

23

EC PME#/GPIO0D

140

XCLKO

138

XCLKI

KB910L_LQFP144

+EC_AVCC

C366

Host

INTERFACE

key Matrix

scan

+3VALW

12

11

139

L12
0_0603_5%

1 2

C315

+EC_AVCC+3VALW

75

26

105

127

141

VCC

VCC

VCC/ EC VCC

VCC / EC VCC

VCC / EC VCC37VCC / EC VCC

DAC_BRIG/DA0/GPIO3D

PWR

EN DFAN2/DA3/ GPIO3F

FAN/PWM

INVT_PWM/GPIO0F/PWM1

OUT BEEP/GPIO12/PWM3

FAN SPEED1/GPIO14/FANFB1
FAN SPEED2/GPIO15/FANFB2

PS2 interface

Data
BUS

Address

BUS

SM BUS

GND13GND28GND

GND

GND

GND

39

103

129

0.1U_0402_16V4Z

BATTEMP/AD0/GPIO38

BATT OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD BID0/AD3/GPIO3B

AD INtput or GPI

EC_AVCC / AVCC

EN DFAN1/DA1/GPIO3D

IREF2/DA2

DA output or GPO

BEEP#/GPIO10/PWM2

ACOFF/GPIO18/PWM4

PSCLK1
PSDAT1
PSCLK2
PSDAT2
PSCLK3
PSDAT3

ADB0/D0
ADB1/D1
ADB2/D2

ADB3/ D3

ADB4/D4
ADB5/D5
ADB6/D6
ADB7/D7
KBA0/A0
KBA1/A1
KBA2/A2
KBA3/A3
KBA4/A4
KBA5/A5
KBA6/A6
KBA7/A7
KBA8/A8

KBA9/A9
KBA10/A10
KBA11/A11
KBA12/A12
KBA13/A13
KBA14/A14
KBA15/A15
KBA16/A16
KBA17/A17
KBA18/A18
KBA19/A19

SELIO2#/ GPIO43

SELIO#/ GPIO50

FRD#/RD#

FWR#/WR#

FSEL#/SELMEM#

EC ON/ GPIO1B

AC IN/ GPIO1C

ECTHERM#/GPIO11

ONOFF/GPIO18

PCMRST#/GPIO1E

WL OFF#/GPIO1F

ALI/MH#/GPIO40

FSTCHG/GPIO41

VR ON/ GPIO42
GPIO57/GPIO57
GPIO58/GPIO58
GPIO59/GPIO59

AGND

77

ECAGND

L13

1 2

C

D

BORAD ID

M/B Ver.

Voltage

BATT_TEMP EC AGND

BATT_TEMP

71

BATT_OVP

72
73

M/B_ID

74

76
78
79
80

25
27
30
31
32
33

PLAY/PAUSE_BTN#

91

STOP_BTN#

92

ON/OFFBTN_LED#

93
94

PSCLK3

95

PSDAT3

96

ADB0

125

ADB1

126

ADB2

128

ADB3

130

ADB4

131

ADB5

132

ADB6

133

ADB7

134

KBA0

111

KBA1

112

KBA2

113

KBA3

114

KBA4

115

KBA5

116

KBA6

117

KBA7

118

KBA8

119

KBA9

120

KBA10

121

KBA11

122

KBA12

123

KBA13

124

KBA14

110

KBA15

109

KBA16

108

KBA17

107

KBA18

106

KBA19

98
84

97
135
136
144

41
43
29
36
45

ICH_PWRGD

46

FORWARD_BTN#

81
82
83
137
142

REVERSE_BTN#

143

0_0603_5%

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

C295

1 2

0.01U_0402_16V7K

BATT_TEMP <38>
BATT_OVP <37>
EC_IDERST <23,29>

DAC_BRIG <16>
EN_FAN1 <15>
IREF <37>
VOLUME_CTRL <31>

INVT_PWM <16>
BEEP# <29>

PWR_LED# <32>
ACOFF <37>
FAN1SPD <15>
LVDSBIA <16>

PLAY/PAUSE_BTN# <32>
STOP_BTN# <32>
ON/OFFBTN_LED# <17>
CHARGE_LED1# <32>
PSCLK3 <32>
PSDAT3 <32>

ADB[0..7]
KBA[0..19]

+VCCP_PWRGD <7>

EC_MUTE# <31>
FRD# <34>
FWR# <34>
FSEL# <34>

EC_ON <34>
ACIN <21,36,39>
EC_THRM# <21>
ON/OFF <34>
WL/BT_ON <17,28>
ICH_PWRGD <21>

FORWARD_BTN# <32>
FSTCHG <37>
VR_ON <42>
SWDJ_ON/OFF <34>

SWDJ_RST_HOLD <23>

REVERSE_BTN# <32>

ADB[0..7] <34>
KBA[0..19] <34>

D

0.1

0.0 0.4 0.8 1.2

INT_KBD CONN.

KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6

KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15

E

+3VALW

12

R206
100K_0402_5%

1.6

JP4

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

ACES_85201-2405

PSCLK3
PSDAT3

FSEL#
FRD#
EC_SMI#

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

KBD EC CTRL-KB910L

LA-2591

M/B_ID

12

R214
0_0402_5%

CP3

KSO2
KSO4

2

KSO7

3

KSO8

4 5

100P_1206_8P4C_50V8@

CP4

KSI3
KSO5

2

KSO1

3

KSI0

4 5

100P_1206_8P4C_50V8@

CP6

KSI1
KSI7

2

KSI6

3

KSO9

4 5

100P_1206_8P4C_50V8@

CP5

KSI4
KSI5

2

KSO0

3

KSI2

4 5

100P_1206_8P4C_50V8@

CP2

KSO6
KSO3

2

KSO12

3

KSO13

4 5

100P_1206_8P4C_50V8@

CP1

KSO14
KSO11

2

KSO10

3

KSO15

4 5

100P_1206_8P4C_50V8@

12

R24310K_0402_5%

12

R24610K_0402_5%

R288 10K_0402_5%

1 2

R287 10K_0402_5%

1 2

R231 10K_0402_5%

1 2

E

1

C304

2

0.1U_0402_16V4Z

81
7
6

81
7
6

81
7
6

81
7
6

81
7
6

81
7
6

+5VS

+3VALW

33 43Monday, October 11, 2004

of

0.1

A

B

C

D

E

+3VALW

C109

2

12

0.1U_0402_16V4Z

R60

10K_0402_5%

+3VALW

1 1

Power BTN

SWDJ_ON/OFF#<32>

ON/OFFBTN#<17>

2 2

KBA[0..19] <33> ADB[0..7] <33>

SWDJ_ON/OFF#

ON/OFFBTN#

EC_ON<33>

ADB[0..7]KBA[0..19]

1

EC_ON

D6

1N4148_SOT23

+3VALW

12

R53

4.7K_0402_5%

100K_0402_5%

2

3

D5

1

DAN202U_SC70

12

12

R55

2

3
2

13

R56
100K_0402_5%

ON/OFF

Q9
DTC124EK_SC59

1

2

C107

1000P_0402_50V7K

SWDJ_ON/OFF <33>

ON/OFF <33>
51ON# <36>

12

D4

RLZ20A_LL34

INT_FSEL# FSEL#

512K FLASH ROM

U14

KBA18

1

A18

KBA16

2

A16

KBA15

3

A15

KBA12

4

A12

KBA7

5

A7

KBA6

6

A6

KBA5

7

A5

KBA4

8

A4

KBA3

9

A3

KBA2

10

A2

KBA1

11

A1

KBA0

12

A0

ADB0

13

DQ0

ADB1

14

DQ1

ADB2

15

DQ2

16

3 3

C324

0.1U_0402_16V4Z

SMB_EC_CK1<33,38>
SMB_EC_DA1<33,38>

VSS

SST39VF040-70-4C-NH_PLCC32

1

2

U19

8

VCC

7

WP

6

SCL

5

SDA

AT24C16AN-10SI-2.7_SO8

VDD
WE#

DQ7
DQ6
DQ5
DQ4
DQ3

GND

A17
A14
A13

A11
OE#
A10
CE#

32

FWE#

31

KBA17

30

KBA14

29

KBA13

28

KBA8

27

A8

KBA9

26

A9

KBA11

25

FRD#

24

KBA10

23

INT_FSEL#

22

ADB7

21

ADB6

20

ADB5

19

ADB4

18

ADB3

17

+3VALW+3VALW

12

R226
100K_0402_5%

1

A0

2

A1

3

A2

4

12

R228
100K_0402_5%

2

C120

0.1U_0402_16V4Z

1

+3VALW

FRD#<33>

1MB FLASH ROM

Alternative SA290080100

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

INT_FSEL#
FRD#
FWE#

U12

21

A0

20

A1

19

A2

18

A3

17

A4

16

A5

15

A6

14

A7

8

A8

7

A9

36

A10

6

A11

5

A12

4

A13

3

A14

2

A15

1

A16

40

A17

13

A18

37

A19

22

CE#

24

OE#

9

WE#

SST39VF080-70_TSOP40@

VCC0
VCC1

READY/BUSY#

NC0
NC1

GND0
GND1

+3VALW

31
30

ADB0

25

D0
D1
D2
D3
D4
D5
D6
D7

RP#

NC

ADB1

26

ADB2

27

ADB3

28

ADB4

32

ADB5

33

ADB6

34

ADB7

35

RESET#1

10
11
12
29
38

23
39

1 2

R294
100K_0402_5% @

+3VALW

R59

1 2

22_0402_5%

FWE#

4

TC7SH32FU_SSOP5

U10

SN74AHCT1G125GW_SOT353-5
R58

1 2

0_0402_5%@

U17D

11

SN74LVC125APWLE_TSSOP14

+3VALW

5

P

I0

O

I1

G

3

KBA16
KBA15
KBA14
KBA13
KBA12
KBA11
KBA9
KBA8
FWE#

RESET#1
INT_FLASH_EN#
INT_FLASH_SEL

KBA18

KBA7

KBA6

KBA5

KBA4

KBA3

KBA2

KBA1

INT_FLASH_EN#

1

1

5

U11

P

4

OE#

A2Y

G

3

SB_INT_FLASH_SEL#

13

SUS_STAT#INT_FLASH_SEL

OE#

I12O

+3VALW

12

R54
100K_0402_5%

2
1

1 3

D

1MB ROM SOCKET

JP8

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40

SUYIN_80065AR-040G2T

2

100K_0402_5%

R57

1 2

C108 0.1U_0402_16V4Z

12

FSEL# <33>

SB_INT_FLASH_SEL# <21>

SUS_STAT# <21>

G

Q8

S

2N7002_SOT23

FWR# <33>

KBA17

KBA19
KBA10
ADB7
ADB6
ADB5
ADB4

ADB3
ADB2
ADB1
ADB0
FRD#

FSEL#
KBA0

+3VALW

SUSP# <16,33,35,40,41>

EC_FLASH# <21>

4 4

A

Compal Electronics, Inc.

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

BIOS & EXT. I/O PORT & PW BT

Size Document Number Rev

Custom

LA-2591

Date: Sheet

E

of

34 43Monday, October 11, 2004

0.1

5

4

3

2

1

+3VALW +3VS

Q33

8

S

D

7

S

D D

C C

B B

C352
22U_1206_10V4Z

SUSP

+12VALW

2

G

C351
22U_1206_10V4Z

12

R92
100K_0402_5%

R99
1M_0402_5%

13

D

Q19
2N7002_SOT23

S

Q4

8

D

7

D

6

D

5

D

AO4422_SO8
C8
10U_0805_10V4Z

C481

10U_0805_10V4Z

S
S
S
G

D

6

D

5

D

AO4422_SO8
C350
10U_0805_10V4Z

+5VALW

C480

10U_0805_10V4Z

C136

0.01U_0402_16V7K

+2.5VS+2.5V

+2.5V to +2.5VS Transfer

1
2
3
4

C141
22U_1206_10V4Z

RUNON

C11

0.1U_0402_16V4Z

@

S
G

+5VALW to +5VS Transfer

+3VALW to +3VS Transfer

1
2
3
4

Q39

8

D

7

D

6

D

5

D

AO4422_SO8

RUNON

C380

22U_1206_10V4Z

RUNON

1

S

2

S

0.1U_0402_16V4Z

3

S

4

G

C15

0.1U_0402_16V4Z

+5VS

C450

C382

0.1U_0402_16V4Z

1

C448
22U_1206_10V4Z

2

+5VS +2.5VS+3VS

D

S

SYSON#<32>

SYSON<33,41>

R75
470_0402_5%

Q14

13

2

G

2N7002_SOT23

R76

470_0402_5%

13

D

Q15

SUSP SUSP

2

G

2N7002_SOT23

S

SUSP

D

S

SYSON#

+2.5V

R281
470_0402_5%

13

D

Q30

G

2N7002_SOT23

S

R74
470_0402_5%

Q13

13

2

G

2N7002_SOT23

+5VALW

2

G

+5VALW

SYSON#

2

+1.5VS +1.25VS +V CCP

R72
470_0402_5%

12

R280
47K_0402_5%

13

D

Q31
2N7002_SOT23

S

12

R285
10K_0402_1%

13

D

S

Q12

2

G

2N7002_SOT23

D

SUSP SUSP SUSP

S

R68
470_0402_5%

Q11

13

2

G

2N7002_SOT23

D

S

R62
470_0402_5%

Q10

13

2

G

2N7002_SOT23

SUSP#

SUSP

13

D

Q32

2

2N7002_SOT23

G

S

Title

Size Document Number Rev
Custom

2

Date: Sheet

Compal Electronics, Inc.

LA-2591

POWER CONTROL

1

0.1

of

35 43Monday, October 11, 2004

SUSP<16,40>

SUSP#<16,33,34,40,41>

U6B

5

+IN

7

OUT

6

A A

-IN

LM358A_SO8

5

+3VALW +3VALW

14

U16D

12

P

A

11

O

13

B

G

SN74LVC08APW_TSSOP14

7

14

12

A

13

B

7

U13D

P

11

O

G

SN74LVC08APW_TSSOP14

4

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

A

B

C

D

E

Detector

PR5
22K_0603_1%

12

PC7

1000P_0603_16V7K

VL

Vin Detector

18.234 17.841 17.449

17.597 17.210 16.813

PR1
1M_0603_0.5%

1 2

VS

12

PC5

0.01U_0603_50V7K

8

3

P

+

1

O

2

-

G

PU1A

4

LM393M_SO8

PR8

10K_0603_5%

PR13
100K_0402_1%

1 2

PD4

12

PD5

12

RB751V_SOD323

RLZ4.3B_LL34

12

RTCVREF

3.3V

12

PC12

0.1U_0603_16V7K

VL

VIN

12

12

PZD1

PR14

2.2M_0402_5%

PU1B

LM393M_SO8

7

O

PR3
10K_0805_5%

12

8

5

P

+

6

-

G

4

12

PR22
34K_0402_1%

12

66.5K_0402_1%

1 2

12

VS

12

PC13

1000P_0603_16V7K

2N7002_SOT23

PR165

PR4
1K_0603_5%

PACIN

PR7
10K_0603_5%

PC8

0.01U_0603_50V7K

D

S

DTC115EUA_SC70

PQ2

12

12

PR18

13

PQ3

ACIN <21,33,39>

PACIN <37>

191K_0402_1%

2

G

13

B+

12

PR15
499K_0402_1%

12

PR19

PR21

1 2

47K_0402_5%

499K_0402_1%

PACIN

2

12

PC11

1000P_0402_50V7K

+5VALWP

1 1

12

PR16

PR17

PR24

1 2

200_0603_5%

ADPIN

12

RTCVREF

12

12

12

PC9

0.22U_1206_25V7K

3.3V

PC15

10U_0805_10V4Z

12

PC1

PC2

100P_0603_50V8J

PU2 G920AT24U_SOT89

3

OUT

GND

PCN1

1

2

G
G

3

SINGA_2DC-S756B200

2 2

51ON#<34>

PR23

1 2

200_0603_5%

PD2

RB751V_SOD323

100K_0603_1%

1 2

22K_0603_5%

3 3

4 4

BATT+

CHGRTC

PL1

FBM-L18-453215-900LMA90T_1812

ADPIN

1 2

1000P_0402_50V7K

VIN

12

PR11
47_1206_5%

PD3

1N4148_SOD80

PQ1

1 2

TP0610K_SOT23

13

12

PC10

0.1U_0805_25V7K

2

IN

1

12

PR20
200_0603_5%

2

12

PC14
1U_0805_50V4Z

PC3

VIN

12

12

PC4

100P_0603_50V8J

1000P_0402_50V7K

PC6

0.047U_0603_16V7K

PR9

1 2

1.5K_1206_5%

PR10

1 2

1.5K_1206_5%

PR12

1 2

1.5K_1206_5%

VS

1N4148_SOD80

PD1

B+

12

VIN

12

PR2

82.5K_0603_1%

1 2

12

12

PR6

19.6K_0603_1%

ACON<37>

MAINPWRON<20,38,39>

ACIN

Precharge detector

Min Typ Max

H->L 14.589 14.84 15.243
L->H 15.562 15.97 16.388

BATT

Detector
H-->L 7.02 7.3 7.68
L---H 5.85 6.21 6.46

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Detector

E

0.1

of

36 43Monday, October 11, 2004

A

VIN

13

PACIN

1 2

8
7

5

PQ7

47K

2

47K

PQ8
DTC115EUA_SC70

1 2

3K_0603_5%

PD7

1 2

1SS355_SOD323

PR44

174K_0603_1%

12

PR25
15K_0603_5%

2

G

DTA144EUA_SC70

2

13

D

PQ10
2N7002_SOT23

S

PACIN<36>

IREF<33>

ACOFF#

PD6
1SS355_SOD323

PR28

12

1 2

PR30

47K_0402_5%

1 2

1 1

1K_0603_5%

12

PC21

0.1U_0603_25V7K

2 2

ACON <36> BATT+

IREF=1.096*Icharge

PQ4

AO4407_SO8

4

1 3

150K_0603_1%

PR36

100K_0603_1%

1
2
36

PC20

0.1U_0603_25V7K

PR34

2

G

PR45

PQ5

P2

AO4407_SO8

1
2
3 6

4

12

12

PR27

200K_0603_5%

12

Throttling - 1 l e vel : ADP_I =1.4V
Throttling + 1 l eve l : ADP_I=1.14V

13

D

S

PQ12

ADP_I<33>

12

12

PC24

2N7002_SOT23

PR37

0.1U_0603_16V7K

10K_0603_1%

12

8
7

5

12

PR35

VREF

12

PC27

12

PC34

0.1U_0603_16V7K

IREF=0.44~3.3V

3 3

OVP voltage : LI

3S2P : 13.5V--> BATT_OVP= 1.50V

(BAT_OVP=0.1111 *VMB)

VL

12

8

PU4A

3

P

+

1

BATT_OVP<33>

4 4

A

0

2

-

G

LM358A_SO8

4

105K_0603_0.5%

VMB

PC35

0.1U_0603_50V4Z

PR52

12

PR50
340K_0603_1%

12

PR51
499K_0603_1%

12

P3

1 2

31.6K_0603_1%
4700P_0603_50V7K

1 2

1500P_0603_50V7K

0.1U_0603_16V7K

12

B

Iadp=0~3A

PR26

0.02_2512_1%

12

PR33

47K_0603_1%

PR38

PC25

1 2

1K_0603_1%

PR39

PC28

1 2

1K_0603_1%

PR42

12

10K_0603_1%

PC36

0.01U_0603_50V7K

B

12

150K_0603_0.1%

150K_0603_0.1%

7

1

2

3

4

5

6

7

8

9

10

11

12

PR46

PR48

0

PU4B
LM358A_SO8

B+

FBM-L18-453215-900LMA90T_1812

PU3

-INC2

+INC2

OUTC2

GND

+INE2

CS

-INE2

VCC(o)

FB2

OUT

VREF

VH

FB1

VCC

-INE1

RT

+INE1

-INE3

OUTC1

FB3

OUTD

CTL

-INC1

+INC1

MB3887_SSOP24

12

12

FSTCHG<33>

VL

5

+

6

-

PL2

1 2

24

23

22

21

20

19

0.1U_0603_50V4Z

18

17

16

15

47K_0603_1%

FSTCHG

14

13

FSTCHG

CHGSS

PC26

1 2

PR40

1 2

68K_0603_5%

PR43

1 2

+3VALWP

47K_0603_5%@

2

12

PC16

4.7U_1206_25V6K

12

PR31
0_0603_5%

1 2

PC23

1 2

0.1U_0805_25V7K

1 2

0.1U_0805_25V7K

PC30

1 2

1500P_0603_50V7K

4.2V

12

PR49

13

PQ14
DTC115EUA_SC70@

C

12

12

PC17

4.7U_1206_25V6K

PC22 2200P_0402_50V7K

PC29

CHGSS

13

D

PQ13

2

G

S

C

12

PC18

0.1U_0805_25V7K

SKS30-04AT_TSMA

PR47

150K_0603_0.1%

2N7002_SOT23 @

PC19

2200P_0402_50V7K

N18

8.2U_IHLP-2525CZ-01_4A_+-20%2525CZ

PD8

12

B++

36

241

578

1 2

2 1

D

PQ6 AO4407_SO8

1
2
3 6

8
7

5

4

VIN

PR29

1 2

PQ9
AO4407_SO8

LXCHRG

PL3

DTC115EUA_SC70

ACOFF#

PQ11

PR41

1 2

0.02_2512_1%

12

PR32
10K_0603_5%

13

47K_0603_5%

2

12

PC31

10U_1206_25VAK

PC32

10U_1206_25VAK

12

ACOFF <33>

12

PC33

10U_1206_25VAK

CC=0.4~3A
CV=12.6V(6 CELLS LI-ION)

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

CHARGER

D

37 43Monday, October 11, 2004

0.1

A

PCN2

1

BATT+

2

ID

B/I

TS

SMD

9

SMC

G

8

GND

SUYIN_200275MR007G113ZL

1 1

2 2

G

BAS40-04_SOT23

3
4
5
6
7

+5VALWP

PR53 1K_0603_5%

100_0603_5%

PD12

12

PR58

1 2

25.5K_0603_1%

3

PD10
BAS40-04_SOT23

2

1 2

PR54 47K_0603_5%

@

1

3

PD9

2

@

12

12

PR56

@

PR57
100_0603_5%

1

3

2

2

@

12

1

PR55
1K_0603_5%

1 2

PR62
1K_0603_5%

1

@

3

BAS40-04_SOT23
PD13

B

VMB

PL4

1 2

C8B BPH 853025_2P

+3VALWP

12

PC37
1000P_0603_50V7K

BAS40-04_SOT23@

+3VALWP

BATT_TEMP <33>

SMB_EC_DA1 <33,34>
SMB_EC_CK1 <33,34>

12

10KB_0603_1%_TH11-3H103FT@

0.22U_0805_16V7K@

PC38

0.01U_0603_50V7K

CPU

0_0402_5%@

PC42

12

PR61

PH1 under CPU botten side :

CPU thermal protection at 90 +-3 degree C

BATT+

Recovery at 50 +-3 degree C

VL

12

PH1

12

PR63

16.9K_0402_1%@

1 2

12

VL

PR65

2.74K_0603_1%@

PH2 near main Battery CONN :

BAT. thermal protection at 84 +-3 degree C
Recovery at 45 +-3 degree C

VL

12

PC39

0.1U_0402_10V6K

@

1 2

PR64
100K_0402_1%@

PR66

100K_0402_1%@

C

VS

PC40

12

0.1U_0603_50V4Z@

VL

PR59

47K_0402_1%@

REV

12

1 2

3
2

12

PC41
1000P_0603_50V7K @

+

-

VS

8

PU5A

P

O

G

LM393M_SO8

4

1

PR60
47K_0402_1%

@

1 2

PD11

1SS355_SOD323@

D

12

MAINPWRON

PQ15

DTC115EUA_SC70@

13

2

<20,36,39>

PH2

L_11

1 2

PR71

3.32K_0603_1%

@

12

PR70

16.9K_0402_1%@

PC43

0.1U_0402_10V6K

@

C

REV

PR67

47K_0402_1%@

1 2

5

+

6

-

8

P

O

G

4

PU5B
LM393M_SO8

VL

PR69
47K_0402_1%@

1 2

7

12

PD14

1SS355_SOD323@

Title

BATTERY CONN

Size Document Number Rev

B 0.1

DFL32 M/B LA-2242

Date: Sheet of

D

38 43Monday, October 11, 2004

3 3

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

BATTERY

10KB_0603_1%_TH11-3H103FT @

0.22U_0805_16V7K@

0_0402_5%@

PC45

12

12

PR68

12

12

A

B+

HMBT2222A_SOT23

PQ38

123

CBE

PD26

2 1

RLZ16B_LL34

3K_0603_5%

1 1

PR167

1 2

+12VALWP

B

C

D

+3.3V/+5V

PL5
FBM-L18-453215-900LMA90T_1812

1 2

2 2

B+++

12

PC49

PC48

2200P_0402_50V7K

12

10U_1206_25VAK

1
2
3
4

PL6

8.2U_IHLP-2525CZ-01_4A_+-20%2525CZ

PQ16

G2

D2
D2

D1/S2/K

G1

D1/S2/K
D1/S2/K

S1/A

AO4912_SO8

<BOM Structu re>

1 2

+5VALWP

VS

PC57

1

PD24

SKUL30-02AT_SMA@

0.3V/3A

3 3

4 4

2 1

+5VALWP

+3VALWP

330U_D_6.3VM

+

10.2K_0402_1%

1 2

@

2

1 2

PJP1

1 2

@

PAD-OPEN 4x4m

PJP2

1 2

@

PAD-OPEN 4x4m

PR82

PR85

0_0402_5%

+5VALW

+3VALW

12

PR83

47K_0402_5%

12

PC46

0.1U_0603_50V4Z

1 2

0_0402_5%

5HG

1 2

8
7
6
5

DL5

PC58

0.1U_0603_25V7K

PC62

0.1U_0603_16V7K

PR73

3

2

1

4.7_1206_5%

VL

PC55

4.7U_0805_10V4Z

BST5
DH5
LX5

DL5
OUT5

9

FB5

1

N.C.

6

SHDN#

4

ON5

3

ON3
SKIP#

8

REF

PC60

0.22U_0603_10V7K

PC53

12

PD15
CHP202U_SC70

VS

12

PR75

12

4.7U_1206_25V6K

12

0.1U_0603_50V4Z

PC56

18

20

13

V+

TON

LD05

PU6

MAX1999EEI_QSOP28

GND

LDO3

23

25
12

PC61

4.7U_0805_10V4Z

VL

1 2

17

ILIM3

VCC

ILIM5
BST3

OUT3

PGOOD

PRO#

10

1 2

PR74

47_0402_5%

12

DH3

DL3
LX3

FB3

PR87
0_0402_5%

12

2VREF_1999

PC54

1U_0805_16V7K

5

11
28

26
24
27
22

7
2

PC50

0.1U_0603_16V7K

PR77

1 2

220K_0402_1%

PR80

1 2

499K_0402_1%

PR78

1 2

220K_0402_1%

PR81

1 2

499K_0402_1%

DH5

LX5

PR72
0_0402_5%

1 2

14
16
15

19
21

PR84

10K_0402_5%

ACIN<21,33,36>

1 2

2VREF_1999

12

12

12

VL

12

PR89
806K_0603_1%

12

PC63

0.47U_0603_16V7K

MAINPWRON <20,36,38>

0.1U_0603_50V4Z

1 2

PR76
0_0402_5%

1 2

PC47

B+++

12

PC51

2200P_0402_50V7K

PR79

0_0402_5%

12

PC52

1 2

10U_1206_25VAK

PQ17

1

D2

2

D2

3

G1

4

S1/A

AO4912_SO8

<BOM Structu re>

8

G2

7

D1/S2/K

6

D1/S2/K

5

D1/S2/K

PL7

8.2U_IHLP-2525CZ-01_4A_+-20%2525CZ

1 2

+3VALWP

PC59

1

+

2

330U_D_6.3VM

PD25

SKUL30-02AT_SMA@

2 1

0.3V/3A

1 2

1 2

@

PR86

3.57K_0402_1%

PR88

0_0402_5%

+12VALWP

A

PJP9

2 1

PAD-OPEN 2x2m@

+12VALW

THIS SHEET OF EN GINE ERI NG DR AWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION I T CONTA INS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

B

INC.

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

5V/3.3V

of

D

39 43Monday, October 11, 2004

0.1

5

3

PR91

3.74K_0402_1%

D D

PR92
100K_0402_5%

PR93
0_0402_5%

PC72

12

13

2

12

G

1 2

+1.5VSP

+1.25VSP

+3VALWP

SUSP#

4,35,41>

0.1U_0402_16V7K@

C C

B B

D

PQ21
2N7002_SOT23

S

1 2

2

G

PJP5

1 2

@

PAD-OPEN 3x3m

PJP6

1 2

@

PAD-OPEN 3x3m

13

D

PQ20
2N7002_SOT23

S

PC68
470P_0402_50V8J

1 2

PU7

7

OCSET

6

FB

3

GND

APW7057KC-TR_SOP8

PR95

10.5K_0402_1%

1 2

+1.5VS

+1.25VS

5

VCC

BOOT

UGATE

PHASE

LGATE

PR94

9.31K_0402_1%

1 2

1 2

PC73

0.1U_0402_16V7K

4

PR90
10_0402_5%

12

PC64

1 2

1U_0603_10V6K

1

2

8

4

PD17

1 2

1N4148_SOD80

12

PC69

0.1U_0402_16V7K

1

D2

2

D2

3

G1

4

S1/A

AO4912_SO8

<BOM Structure>

D1/S2/K
D1/S2/K
D1/S2/K

PQ19

G2

8
7
6
5

3

12

12

PC65

PC66

22U_1206_6.3V6M

22U_1206_6.3V6M

4.7uH_IHLP-2525CZ-01_5.5A_20%

1 2

PL8

0_0402_5%

1 2

SUSP<16,35>

0.1U_0402_16V7K@

12

PC67

22U_1206_6.3V6M

1

+

PC70

2

150U_D2_6.3VM

10U_1206_6.3V7K

PR97

PC77

1 2

@

12

12

PJP3

PAD-OPEN 3x3m

+1.5VSP

PC71

10U_1206_6.3V7K

2.5VSP

PJP4
PAD-OPEN 3x3m

1 2

@

12

PC74

13

D

2

G

S

+5VALW

OCP 4.02A ~ 7.12A

12

PR96

1K_0402_1%

PQ22
2N7002_SOT23

12

PR98

1K_0402_1%

2

12

PC76

0.1U_0402_16V7K

PU8

VIN1VCNTL

2

GND

3

VREF

4

VOUT

APL5331KAC-TR_SO8

12

PC78

10U_1206_6.3V7K

1

+1.5VSP/+1.25VSP

6
5

NC

7

NC

8

NC

9

TP

+1.25VSP

+5VALWP

1 2

PC75

1U_0603_10V6K

A A

COMPAL ELEC TRONICS, INC

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

+12VP/+2.5VSP

Size Document Number Rev

B

Date: Sheet

ZR2 LA2521

1

of

40 43Monday, October 11, 2004

0.1

5

D D

OCP 6.11A ~ 9.42A

+1.05VSP

C C

PD19

SKS10-04AT_TSMA

@

2 1

220U_D2_4VM

1

12

PC90

PC91

+

2

4.7U_0805_6.3V6K

1 2

PR111

1 2

25.5K_0402_1%

B B

4.7uH_IHLP-2525CZ-01_5.5A_20%

1 2

PL10

PR107

1.27K_0402_1%

12

PC95

100P_0402_50V8J

PQ25

SI4810DY_SO8

241

D8D7D6D

S1S2S3G

4

PC79

2200P_0402_50V7K

12

578

PQ23
SI4800DY-T1_SO8~D

3 6
5

4

SUSP#<16,33,34,35,40>

12

PC80
10U_1206_25VAK

PD18

DAP202U_SOT323

PC85

0.1U_0805_50V7M

1 2

SUSP#

3

1 2

12

PR104
0_0603_5%

0.1U_0603_25V7K

VCC_MAX1845

1

2

PR102

0_0603_5%

PR109

12

0_0603_5%

<BOM Structure>

PC97

PR116

1 2

0_0402_5% @

0_0603_5%

1U_0805_50V4Z

PC81

PC86

0.1U_0805_50V7M

PU9

25
26
27

24
28

1
2

11

12

<BOM Structure>

PR99

12

12

BST1
DH1
LX1

DL1
CS1

OUT1
FB1

ON1

8

PR117

0_0402_5%

OVP

1 2

12

4

1U_0805_16V7K

V+

GND

23

12

3

VCC_MAX1845

PC87

9

22

UVP

VCC

PGOOD

SKIP

REF

6

10

12

PC99

2VREF <16>

+5VALWP

PR100

0_0603_5%

12

PR101

20_0603_1%

21

VDD

19

BST2

18

DH2

17

LX2

20

DL2

16

CS2

15

OUT2

14

FB2

12

ON2

7
5

TON

13

ILIM2

3

ILIM1

MAX8743EEI_QSOP28

3.3K_0603_1%

12
12

PR113

3.3K_0603_1%

9.1K_0603_1%

0.22U_0603_16V7K

1 2

1 2

PR112

PR114

12

PR103

0_0603_5%

12

PC84

4.7U_0805_10V4Z

0_0603_5%

1 2

12

<BOM Structure>

12

PR115

215K_0603_1%

PC88

0.1U_0805_50V7M

12

PR105

1 2

PR108

15K_0603_5%

0.1U_0603_25V7K

PC96

2

578

5

4

SYSON <33,35>

3 6

241

D8D7D6D

S1S2S3G

12

PQ24

SI4800DY-T1_SO8~D

PQ26
SI4810DY_SO8

12

PC98

100P_0402_50V8J

12

PC82

2200P_0402_50V7K

PC83

10U_1206_25VAK

2.2UH_IHLP-2525CZ-01_8A_+-20%_2525CZ

1 2

PL11

PR106

PR110

1 2

15K_0402_1%

1 2

10K_0402_1%

1

OCP 8.2A ~ 12.7A

12

PC94

SKS10-04AT_TSMA

2 1

4.7U_0805_6.3V6K

@

B+

2.5VSP

1

PC93

PD20

+

2

220U_D2_4VM_R15

2.5VSP

PJP7

1 2

@

PAD-OPEN 4x4m

+1.05VSP

A A

5

PJP8

1 2

@

PAD-OPEN 3x3m

+2.5V

+VCCP

COMPAL ELEC TRONICS, INC

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

+2.5VP / +1.05VP

Size Document Number Rev

B

Date: Sheet

ZR2 LA2521

1

of

41 43Monday, October 11, 2004

0.1

5

4

3

2

1

+5VS

D D

PC106

1U_0603_10V6K

+3VS

12

100K_0402_5%

PR166

PR144

13

2

G

RHU002N06_SOT323

+3VS

PR158

100K_0402_1%

12

VID0<5>
VID1<5>
VID2<5>
VID3<5>
VID4<5>
VID5<5>

1 2

D

S

PQ30

2

B

PR122

0_0402_5%@

1532VCC

1 2

1532REF LXM

C C

B B

PR125

1 2

0_0402_5%@

1 2

PR130

0_0402_5%

<BOM Structure>

H_STP_CPU#<18,21>

VR_ON<33>

+3VS

100K_0402_5%@

PM_DPRSLPVR<21>

VGATE< 18,21>

PR138
0_0402_5%

1 2

71.5K_0402_1%

1 2

FB

1 2

PR145 100K_0402_1%

PR148

0_0402_5%

1 2

PR151

1 2

PR161

0_0402_5%

PSI#<5>

<BOM Structure>

PR119 0_0402_5%
PR120 0_0402_5%
PR123 0_0402_5%
PR126 0_0402_5%
PR128 0_0402_5%
PR131 0_0402_5%
PR132 0_0402_5%

1 2

PR139

1 2

10.7K_0402_1%

PR152

0_0402_5%

1 2

10K_0402_1%

1 2

1

PQ37

3

HMBT2222A_SOT23

12

PR157

2

G

PC115

100K_0402_5%@

1 2

PR142 200K_0402_1%

PR147

PR155 10K_0402_1%

<BOM Structure>

C

E

<BOM Structure>

12
12
12
12
12
12

PR140 30.1K_0402_1%

PC111
270P_0402_50V7K

PC113 0.22U_0603_16V7K

2

100P_0402_50V8J

G

12

12

13

D

PQ34

S

RHU002N06_SOT323

1 2

1532VCC

1 2

1 2

13

D

S

PQ31

RHU002N06_SOT323

12

PR118 10_0402_5%

1532VCC

PR136

1 2

0_0402_5%

TIME

12

1532REF

1 2

PC116

PC105

2.2U_0603_6.3V4Z

10

VCC

24

D0

23

D1

22

D2

21

D3
D4
D5
VROK

4

S0

5

S1

6

SHDN#

1

TIME
CCV

2

TON

8

REF

9

ILIM

7

OFS

3

SUS
SKIP
GND

<BOM Structure>

PU10

MAX1532

20
19
25

12

18
11

27P_0402_50V8J

VDD

BSTM

DHM
LXM
DLM

PGND

CMP
CMN

OAIN+

OAIN-

BSTS

DHS

CSN

GNDS

LXS
DLS
CSP

1 2

30
36

V+

26
28
27
29
31
37
38
17
16
15

FB

14

CCI

35
33
34
32
40
39
13

12

PC107

PR121

1 2

0_0402_5%

FB

1 2

PC112 470P_0402_50V8J

DHS
LXS
DLS

12

PR150 10_0402_5%

BSTM

12

PC108

0.01U_0402_25V7Z

DHM

DLM

PR149

1 2

12

PC121

0.22U_0603_16V7K

1 2

0_0402_5%

0.22U_0603_16V7K

PQ27

SI7392DP_SO8

PR124
0_0402_5%

SI7886DP_SO8

CHP202U_SC70

BSTM

SI7392DP_SO8

PR156
0_0402_5%

1 2

SI7886DP_SO8

PQ28

PD22

2

3

PQ32

PQ35

CPU_B+

12

PC123

10U_1206_25VAK

3 5

241

5

3

241

PR141 820_0402_5%

1 2

+5VS

1

3 5

241

5

3

241

PR164

1 2

820_0402_5%

12

12

PC100

4.7U_1206_25V6K

PC124

10U_1206_25VAK

PD21

2 1

SKS30-04AT_TSMA

12

12

PC117

PC118

2200P_0402_50V7K

PD23

2 1

SKS30-04AT_TSMA

CPU CORE

12

12

PC101

4.7U_1206_25V6K

.56UH_MPC1040LR56_ 23A_20%

12

CPU_B+

12

12

PC119

10U_1206_25VAK

10U_1206_25VAK

12

PC103

PC102

0.01U_0402_25V7Z

2200P_0402_50V7K

PL13

1 2

PC110

PR133 820_0402_5%

1 2

0.47U_0603_16V7K

1 2

PR143
3K_0402_1%

1 2

PC114

0.022U_0402_16V7K

PC120

0.01U_0402_25V7Z
PL14

.56UH_MPC1040LR56_ 23A_20%

1 2

PR160
820_0402_5%

1 2

1 2

PC122

0.47U_0603_16V7K

1

+

PC104

220U_25V_M

2

@

1 2

0.001_2512_1%

12

PR134 499_0402_1%

<BOM Structure>

1 2

PR146

0_0402_5%@

PL12

FBM-L18-453215-900LMA90T_1812

1 2

PR127

12

PR135 499_0402_1%

1 2

PR137 3K_0402_1%

B+

1 2

PC109

@

+CPU_CORE

1000P_0402_50V7K

A A

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Electronics, Inc.

Title

CPU_CORE

Size Document Number Rev

Custom

ZR2 LA2521

2

Date: Sheet

1

42 43Monday, October 11, 2004

0.1

of

5

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Version change list (P.I.R. List) Page 1 of 1

Reason for change Rev. PG # Modify List B.Ver# PhaseFixed IssueItem

1

D D

1

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6

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8

C C

9

10

11

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13

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B B

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A A

Compal Electronics, Inc.

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

PIR

Size Document Number Rev

LA-2591

Date: Sheet

1

of

43 43Monday, October 11, 2004

0.1