Compal LA-2522 Schematic

Page 1
5
4
COMPAL CONFIDENTIAL
3
2
1
D D
MODEL NAME :
EGQ00
COMPAL P/N : PCB NO : Revision :
C C
2.0
EGQ00 Schematics Document
uFCBGA/uFCPGA Mobile Dothan ATI RS300MD + SB200
2 Channel DDR1
2005-01-11
REV : 2.0
B B
Function/B LS-2522
M/B LA-2522
WLAN SW/B LS-2524
A A
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Date: Sheet
TP/B LS-2523
Compal Electronics, Inc. SCHEMATIC, M /B LA-2522 401318
星期五 二月
CD-ROM/B LA-2521
1
152, 18, 2005
of
Page 2
5
4
3
2
1
Compal confidential
Block Diagram
D D
CRT CONN.
& TV-OUT
+5VS +3VS
C C
IDSEL:AD21 (PIRQB#,GNT#0,REQ#0)
TV Module
+3VS
PCI-IF
+2.5VS +1.5VS
B B
page 24
page 34
3.3V 33MHz
IDSEL:AD20 (PIRQA/B/C/D#,GNT#2,REQ#2)
FAN
+5VS
page 39
INVPWR_B+ +3VS
(PIRQB#)
+VGA_CORE +3VS +2.5VS +1.8VS
IDSEL:AD18 (PIRQC/D#,GNT#3,REQ#3)
MINI PCI
+5VS +3VS
CardBus Controller
R5C842
+3V
1394 conn.
page 31
Card bus
2 Slot
page 32
CPU Thermal
ADM1032AR
+3VS
page 6
LCD Panel
17" WXGA
page 23
2 Back Light Type
AGP VGA
ATI M11P
page 17,18,19,20
VRAM
64MB/128MB
+2.5VS
page 21,22
page 33
PC Card Type II x1
AGP 8X
PCI BUS
IDSEL:AD19 (PIRQD#,GNT#1,REQ#1)
10/100 LAN Ctrl.
RTL8100CL
page 31,32 page 30
SDIO
page 32
SD/MS/xD Combo Slot
+3V
Transformer
& RJ45
page 30
3.3V 33MHz
uFCPGA CPU
+VCCP (1.05V) +VCC_CORE +3V +3VS
HA#(3..31)
(PIRQA#)
+3VS +2.5V +2.5VS +1.8VS +1.5VS
System Bus
ATi RS300MD
A-Link
3.3V 66MHz
+5VALW +3VALW +3V +3VS +2.5V +2.5VS
LPC BUS
3.3V 33MHz
Dothan
478pin
400 / 533MHz
868 u-BGA
page 9,10,11,12
ATi IXP150
457 BGA
page 25,26,27,28
page 6,7,8
HD#(0..63)
48MHz / 480Mb
2.5V 333MHz
Channel A
Channel B
AC-LINK
3.3V 24.576MHz
Secondary ATA100
Primary ATA100
+5VS +5VS
CPU ITP Pad
+VCCP
page 6
Memory BUS(DDR1) Dual Channel
+2.5V +1.25VS
HDD
page 29 page 29
LS-2521
USBPORT 0
X BUS
A A
ROM BIOS
SST39VF080 SST39VF040
+3VALW
page 38
Touch Pad
+5VS
5
4
page 39
+3VALW +5VALW
ENE KB910
page 37
USB2.0
2 port right side 3 port rear side
Int.KBD
page 39
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+5VS
3
USBPORT 1 USBPORT 2 USBPORT 3 USBPORT 4 USBPORT 5
Clock Generator
ICS951402AGT ICS9P750
+3VS +2.5VS
DDR-DIMM 1
BANK 0, 1
DDR-DIMM 2
BANK 2, 3
page 13,14,15
CDROM
CIR
+5VALW
JUSBP1 JUSBP2 JUSBP3 JUSBP4 JUSBP5 CIR
LS-2521
page 42
page 42
page 42
page 42
page 42
page 29
2
page 16
MDC
+5VS +3V
page 33
AC97 CODEC
AD1981B
+5VS +3V
AMP &
Phone/MIC Jack
+12VS
3 direction UP/DOWN/MUTE
Title
Size Document Number Rev
Date: Sheet
page 35
page 36
星期五 二月
WLAN SW
+3V +5VS
LS-2524
Fan Control X1
+5VS
FUNCTION/B
Touch-Motion SW/LED
LS-2522
T/P BD
LS-2523
DC IN
CHARGER
+5VALWP/+3VALWP
1.8VP/1.05VP(+VCCP)
+1.5V +1.15VS(VDD_CORE)
+12VP/+2.5VSP +1.25VSP
CPU_CORE
BATT IN
Compal Electronics, Inc.
SCHEMATIC, M /B LA-2522
401318
252, 18, 2005
1
page 39
page 39
page 39
page 39
page 45
page 46
page 47
page 48
page 49
page 50
page 51
page 52
of
Page 3
5
4
3
2
1
I2C / SMBUS ADDRESSING
D D
External PCI Devices
NB RS300MD A VGA M11P A
A-LINK AGP-PCI
TV Module CARD BUS
R5C842
Card Socket A Card Socket B 1394 Cardreader
LAN RT8100CL
IDSEL # PIRQREQ/GNT #DEVICE
AD21 AD20
AD19
0 2
1
B A B C D D
Power Managment table
Signal
State
S0
S1
S3
+12VALW +3VALW +5VALW
ON
+12V +5V +3V +2.5V
ON ON
ON ON ON
ON ON
+CPU_CORE +VCCP +5VS
+3VS +2.5VS +1.8VS +1.25VS +1.5VS
OFF
Bringup-Build
SST-Build
EVT-Build
DVT-Build
PVT-Build
PCB Rev
0.1
Data
Wireless LAN(MINI PCI) AD18 3 C,D
S5 S4/AC
S5 S4/AC don't exist
C C
Symbol note:
:means digital ground.
:means analog ground.
:means reserved.@
Ceramic Capacitor Spec Guide:
Temperature Characteristics:
Symbol
0
CODE
Z5U
8
NP0 SH
H
UK
UJ
9
C0G
I
1
Z5V
A
J
SL
ON OFF
OFF OFF OFF
2
Z5P
B
BJ
3
Y5U
C
CH
4
5
Y5V Y5P
E
D
CK
CJ
X5R
OFF
SCHEMATICS VERSION LIST
VERSION ISSUE DATE REMARK
0.0A
7
6
X7R
F
G
SJ
First Release
Tolerance:
F
+-2%
CODE
A
+-0.05PF
B B
Symbol
B
+-0.1PF
C
+-0.25PF
D
+-0.5PF +-1PF
H
G
+-3%
J
+-5%
M
+-20%
N
+-30%
+100,-0%
+30,-10%
V
+20,-10%
+40,-20%
KQ
+-10%
X
Z
+80,-20%
P
SMBUS Control Table
SOURCE
SMB_EC_CK1 SMB_EC_DA1
SMB_EC_CK2 SMB_EC_DA2
ICH_SMBCLK
A A
ICH_SMBDATA
LCD_DDCCLK LCD_DDCDATA
ENE KB910
ENE KB910
ICH6-M
ATi M22
5
INVERTER BATT
SERIAL SENSOR EEPROM
THERMAL (CPU)
4
SODIMM CLK CHIP
MINI PCI
LCD
THIS SHEET OF EN GINEE RING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M /B LA-2522
401318
星期五 二月
05
352, 18, 20
1
of
Page 4
5
4
3
2
1
D D
ADAPTER
B+
+5VALWP
PJP4 PJP7
PJP1
+3VALWP
MAX1999EEI
page 44
+5VALW
page 42
+3VALW
page 42
SYSON
RUNON
SYSON
RUNON
BATTERY
+12VP
C C
SI4835DY
page 47
PJP2
+12V
page 42
VR_ON
+CPU_CORE
MAX1532
+5VS
B B
+3V
page 48
SUSP#
+2.5VS
+1.5VSP
ISL6227BCA
PJP8
page 41
+5VS
page 41
+3V
page 41
+3VS
page 41
+12VS
page 41
+2.5VP
PJP21
CBS_AVCC CBS_BVCC
R5334V-E2-FB
RUNON
+1.8VSP
APL1085UC-TR
SYSON
page 45
PJP11+12VS
SUSP
page 32
PJP3
page 46
+5VS
VGA_COREP
FAN5234QSCX
+VGA_CORE
+1.8VS
page 46
PJP12
page 42
page 42
+5V
L34
+5VS (HDD)
page 29 page 29
A A
+5VS (CD)
5
+VDDA
S19182DH-AD
page 37
+LAN_IO
page 30
4
SD_EN
+SD_VCC
RT9701-CB
page 32
+1.5VS
page 42 page 42
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
+2.5V
+2.5VS
page 41
2
+1.25VSP
APL5331KAC
page 47
+VCCPP
APL5331KAC
page 47
PJP8 PJP5
PJP10
Title
Size Document Number Rev
星期五 二月
Date: Sheet
+1.25VS
page 42
+VCCP
page 42
Compal Electronics, Inc.
SCHEMATIC, M /B LA-2522
401318
452, 18, 2005
1
of
Page 5
5
4
3
2
1
SMCLK
SB200
D D
page 26
SMDATA
+3VS
CLK GEN.
page 16
DIMM0
page 13
DIMM1
page 14
C C
SMB_EC_CK1
SIO
SMB_EC_DA1 +5VALW
BATTERY
page 49
KB910 B4
SMB_EC_CK2
+5VALWSMB_EC_DA2
B B
page 40
CPU THERMAL
page 6
DDC3CLK
VGA
ATi M11
page 17
A A
5
DDC3DATA
4
+3VS
THERMAL
page 20
THIS SHEET OF EN GINEE RING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M /B LA-2522
401318
星期五 二月
552, 18, 2005
1
of
Page 6
5
H_A#[3..31]9
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10
D D
H_REQ#[0..4]9
H_ADSTB#09 H_ADSTB#19
C C
CLK_CPU_BCLK16 CLK_CPU_BCLK#16
H_ADS#9 H_BNR#9
H_RS#[0..2]9
+VCCP
H_DBSY#9
H_DPWR#9
H_PWRGOOD25
H_CPUSLP#25
TEST2
TEST1
H_BPRI#9
H_DEFER#9 H_DRDY#9 H_HIT#9 H_HITM#9
H_LOCK#9 H_RESET#9
H_TRDY#9
T25 PAD
T24 PAD T1 PAD @
R54
R133
R136 330_0402_5%
1 2
@
@
1 2
1K_0402_5%@
1 2
1K_0402_5%@
+VCCP
+VCCP
B B
A A
1 2
R132 200_0402_5%
1 2
R135 56_0402_5%
H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_ADSTB#0 H_ADSTB#1
CPU_CK_ITP CPU_CK_ITP#
CLK_CPU_BCLK CLK_CPU_BCLK#
H_ADS# H_BNR# H_BPRI# H_BR0# H_DEFER# H_DRDY# H_HIT# H_HITM# H_IERR# H_LOCK# H_RESET#
H_RS#0 H_RS#1 H_RS#2 H_TRDY#
ITP_BPM#0 ITP_BPM#1 ITP_BPM#2 ITP_BPM#3
ITP_DBRESET# H_DBSY# H_DPSLP# H_DPRSLP#
ITP_BPM#4 ITP_BPM#5 H_PROCHOT#
H_PWRGOOD
H_CPUSLP# ITP_TCK ITP_TDI ITP_TDO TEST1 TEST2 ITP_TMS ITP_TRST#
H_THERMDA H_THERMDC H_THERMTRIP#
H_PWRGOOD
JCPU1A
P4
A3#
U4
A4#
V3
A5#
R3
A6#
V2
A7#
W1
A8#
T4
A9#
W2
A10#
Y4
A11#
Y1
A12#
U1
A13#
AA3
A14#
Y3
A15#
AA2
A16#
AF4
A17#
AC4
A18#
AC7
A19#
AC3
A20#
AD3
A21#
AE4
A22#
AD2
A23#
AB4
A24#
AC6
A25#
AD5
A26#
AE2
A27#
AD6
A28#
AF3
A29#
AE1
A30#
AF1
A31#
R2
REQ0#
P3
REQ1#
T2
REQ2#
P1
REQ3#
T1
REQ4#
U3
ADSTB0#
AE5
ADSTB1#
A16
ITP_CLK0
A15
ITP_CLK1
B15
BCLK0
B14
BCLK1
N2
ADS#
L1
BNR#
J3
BPRI#
N4
BR0#
L4
DEFER#
H2
DRDY#
K3
HIT#
K4
HITM#
A4
IERR#
J2
LOCK#
B11
RESET#
H1
RS0#
K1
RS1#
L2
RS2#
M3
TRDY#
C8
BPM0#
B8
BPM1#
A9
BPM2#
C9
BPM3#
A7
DBR#
M2
DBSY#
B7
DPSLP#
G1
DPRSTP#
C19
DPWR#
A10
PRDY#
B10
PREQ#
B17
PROCHOT#
E4
PWRGOOD
A6
SLP#
A13
TCK
C12
TDI
A12
TDO
C5
TEST1
F23
TEST2
C11
TMS
B13
TRST#
B18
THERMDA
A18
THERMDC
C17
THERMTRIP#
FOX_PZ47813-2749-42
Add pullups for PWRGOOD and THERMTRIP per INTEL
5
4
Dothan
ADDR GROUP
HOST CLK
CONTROL GROUP
MISC
THERMAL DIODE
4
DATA GROUP
LEGACY CPU
D10# D11# D12# D13# D14# D15# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63#
DINV0# DINV1# DINV2# DINV3#
DSTBN0# DSTBN1# DSTBN2# DSTBN3# DSTBP0# DSTBP1# DSTBP2# DSTBP3#
A20M# FERR#
IGNNE#
INIT# LINT0 LINT1
STPCLK#
SMI#
3
Check ITP connector.
H_D#[0..63] 9
H_D#0
A19
D0# D1# D2# D3# D4# D5# D6# D7# D8# D9#
A25 A22 B21 A24 B26 A21 B20 C20 B24 D24 E24 C26 B23 E23 C25 H23 G25 L23 M26 H24 F25 G24 J23 M23 J25 L26 N24 M25 H26 N25 K25 Y26 AA24 T25 U23 V23 R24 R26 R23 AA23 U26 V24 U25 V26 Y23 AA26 Y25 AB25 AC23 AB24 AC20 AC22 AC25 AD23 AE22 AF23 AD24 AF20 AE21 AD21 AF25 AF22 AF26
D25 J26 T24 AD20
C23 K24 W25 AE24 C22 L24 W24 AE25
C2 D3 A3 B5 D1 D4
C6 B4
H_D#1 H_D#2 H_D#3 H_D#4
H_D#5 H_D#6 H_D#7
H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_DINV#0 9 H_DINV#1 9 H_DINV#2 9 H_DINV#3 9
H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3
PM_STPCPU#9,16,25,48
H_A20M# H_FERR# H_IGNNE# H_INIT# H_INTR H_NMI
H_STPCLK# H_SMI#
H_A20M# 25 H_FERR# 25 H_IGNNE# 25 H_INIT# 25 H_INTR 25 H_NMI 25
H_STPCLK# 25 H_SMI# 25
R355 470_0402_5%
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
H_DSTBN#[0..3] 9
H_DSTBP#[0..3] 9
2
12
MMBT3904_SOT23
3
1 2
Q23
3 1
R337
470_0402_5%
2
+VCCP
12
R338 200_0402_5%
Q24 MMBT3904_SOT23
3 1
Test pad as closed as posible
H_DPSLP#
ITP_DBRESET# ITP_BPM#0 ITP_BPM#1 ITP_BPM#2 ITP_BPM#3 ITP_BPM#4 ITP_BPM#5
H_RESET# ITP_TCK
CPU_CK_ITP CPU_CK_ITP#
ITP_TDO
ITP_TRST#
ITP_TMS ITP_TDI
CPU HOT
CPU Therml Sensor
+VCCP
R254
56_0402_5%
SMB_EC_CK237 SMB_EC_DA237
2
12
12
H_PROCHOT#
+VCCP
R51
@
47K_0402_5%
1 2
C49
0.1U_0603_25V7K@
+VCCP
H_THERMTRIP#
2
R253 56_0402_5%
+CPU_CORE
12
1 2
R64 56_0402_5%
T20PAD@ T19PAD@ T17PAD@ T13PAD@ T15PAD@ T11PAD@ T12PAD@
T9PAD@ T5PAD@
T3PAD@ T4PAD@ T8PAD@
T6PAD@ T10PAD@ T7PAD@
+3VS
12
1
C
2
B
E
3
H_THERMDA
H_THERMDC SMB_EC_CK2 SMB_EC_DA2
8.2K_0402_5%
+3VS
12
R606 47K_0402_5%
2
B
1
+3V
R131
R234 1K_0402_5%
PROCHOT# 37
Q18 2SC2411K_SC59
+VCCP
+VCCP
150_0402_5%
1 2
R323
54.9_0603_1%
1 2
R324
54.9_0402_1%
R129 56_0402_5%
R322
37.4_0402_1%
1 2
R321 150_0402_5%
1 2
R125 680_0402_5%
1 2
R123
27.4_0402_1%
1 2
1 2 1 2
ITP_DBRESET#
ITP_TDO
H_RESET# ITP_BPM#5
or 39.4Ohm
ITP_TMS
ITP_TDI
Place near CPU
ITP_TRST#
ITP_TCK
+3VS
1
C494
0.1U_0603_25V7M
1
C489 2200P_0402_50V7K
2
12
12
R249
R247
8.2K_0402_5%
1
C
Q7
E
2SC2411K_SC59
3
Title
Size Document Number Rev
Date: Sheet
U19
2
D+
3
ALERT#
D-
8
THERM#
SCLK
7
SDATA
ADM1032AR_SO8
MAINPWON 42,44,49
Compal Electronics, Inc. SCHEMATIC, M /B LA-2522 401318
星期五 二月
VDD1
GND
2
1 6 4 5
1
12
R237 10K_0402_5%
652, 18, 2005
of
Page 7
5
4
3
2
1
+CPU_CORE
JCPU1B
AE7
VCCSENSE
AF6
VSSSENSE
F26
VCCA0
B1
VCCA1
N1
VCCA2
AC26
VCCA3
P23
VCCQ0
W4
VCCQ1
D10
VCCP
D12
VCCP
D14
VCCP
D16
VCCP
E11
VCCP
E13
VCCP
E15
VCCP
F10
VCCP
F12
VCCP
F14
VCCP
F16
VCCP
K6
VCCP
L5
VCCP
L21
VCCP
M6
VCCP
M22
VCCP
N5
VCCP
N21
VCCP
P6
VCCP
P22
VCCP
R5
VCCP
R21
VCCP
T6
VCCP
T22
VCCP
U21
VCCP
D6
VCC
D8
VCC
D18
VCC
D20
VCC
D22
VCC
E5
VCC
E7
VCC
E9
VCC
E17
VCC
E19
VCC
E21
VCC
F6
VCC
F8
VCC
F18
VCC
E1
PSI#
E2
VID0
F2
VID1
F3
VID2
G3
VID3
G4
VID4
H4
VID5
AD26
GTLREF
C16
BSEL0
C14
BSEL1
P25
COMP0
P26
COMP1
AB2
COMP2
AB1
COMP3
B2
RSVD
C3
RSVD
E26
RSVD
AF7
RSVD
AC1
RSVD
FOX_PZ47813-2749-42
Dothan
POWER, GROUNG, RESERVED SIGNALS AND NC
+VCCP
12
R233
56_0402_5%
CPU_BSEL0_RCPU_BSEL1
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
2
B
A2 A5 A8 A11 A14 A17 A20 A23 A26 B3 B6 B9 B12 B16 B19 B22 B25 C1 C4 C7 C10 C13 C15 C18 C21 C24 D2 D5 D7 D9 D11 D13 D15 D17 D19 D21 D23 D26 E3 E6 E8 E10 E12 E14 E16 E18 E20 E22 E25 F1 F4 F5 F7 F9 F11 F13 F15 F17 F19 F21 F24 G2 G6 G22 G23 G26 H3 H5 H21 H25 J1 J4 J6 J22 J24 K2 K5 K21 K23 K26 L3 L6 L22 L25 M1
+3VS
12
R236 1K_0402_5%
1
C
Q15 2SC2411K_SC59
E
3
CPU_BSEL0 11,16
2
H_PSI#48
+VCCP
12
R231
56_0402_5%
R111
54.9_0402_1%@
1 2 1 2
R121
54.9_0402_1%@
+VCCP
+CPU_CORE
V_CPU_GTLREF
T22 PAD T21 PAD T2 PAD T18 PAD T23 PAD
3
VCCSENSE VSSSENSE
H_PSI# H_VID0
H_VID1 H_VID2 H_VID3 H_VID4 H_VID5
CPU_BSEL0_R CPU_BSEL1
COMP0 COMP1 COMP2 COMP3
@ @ @ @ @
CPU_BSEL1 11,16
Dothan A = J1 (+1.8VS) Dothan B = J2 (+1.5VS)
2 1
12
@
R153 10K_0402_5%
+VCCP
4
+1.8VS
+1.5VS
R_A
12
R52 1K_0402_1%
R_B
12
R58 2K_0402_1%
R59
PAD-OPEN 2x2m@
PAD-OPEN 2x2m@
Layout close CPU
Layout Note: 500 mil max length
20 mils
12
R60
27.4_0402_1%
54.9_0402_1%
00: 133 MHZ 10: 100 MHZ
2 1
5 mils
12
D D
For test only ,CMOS output
CPU Voltage ID
CPU_VID048 CPU_VID148 CPU_VID248
C C
CPU_VID348 CPU_VID448 CPU_VID548
R152 0_0402_5% R154 0_0402_5% R156 0_0402_5% R158 0_0402_5% R161 0_0402_5% R164 0_0402_5%
MOBILE BANIAS VID TABLE
VoltageVID[5..0]
0 0 0 0 0 0 1.708V 0 0 0 0 0 1 1.692V 0 0 0 0 1 0 1.676V 0 0 0 0 1 1 1.660V 0 0 0 1 0 0 1.644V 0 0 0 1 0 1 1.628V 0 0 0 1 1 0 1.612V 0 0 0 1 1 1 1.596V 0 0 1 0 0 0 1.580V 0 0 1 0 0 1 1.564V 0 0 1 0 1 0 1.548V
B B
A A
0 0 1 0 1 1 1.532V 0 0 1 1 0 0 1.516V 0 0 1 1 0 1 1.500V 0 0 1 1 1 0 1.484V 0 0 1 1 1 1 1.468V 0 1 0 0 0 0 1.452V 0 1 0 0 0 1 1.436V 0 1 0 0 1 0 1.420V 0 1 0 0 1 1 1.404V 0 1 0 1 0 0 1.388V 0 1 0 1 0 1 1.372V 0 1 0 1 1 0 1.356V 0 1 0 1 1 1 1.340V 0 1 1 0 0 0 1.324V 0 1 1 0 0 1 1.308V 0 1 1 0 1 0 1.292V 0 1 1 0 1 1 1.276V 0 1 1 1 0 0 1.260V 0 1 1 1 0 1 1.244V 0 1 1 1 1 0 1.228V 0 1 1 1 1 1 1.212V
5
+VCCP
R165 10K_0402_5%
12
@
12 12 12 12 12 12
VID[5..0]
1 0 0 0 0 0 1.196V 1 0 0 0 0 1 1.180V 1 0 0 0 1 0 1.164V 1 0 0 0 1 1 1.148V 1 0 0 1 0 0 1.132V 1 0 0 1 0 1 1.116V 1 0 0 1 1 0 1.100V 1 0 0 1 1 1 1.084V 1 0 1 0 0 0 1.068V 1 0 1 0 0 1 1.052V 1 0 1 0 1 0 1.036V 1 0 1 0 1 1 1.020V 1 0 1 1 0 0 1.004V 1 0 1 1 0 1 0.988V 1 0 1 1 1 0 0.972V 1 0 1 1 1 1 0.956V 1 1 0 0 0 0 0.940V 1 1 0 0 0 1 0.924V 1 1 0 0 1 0 0.908V 1 1 0 0 1 1 0.892V 1 1 0 1 0 0 0.876V 1 1 0 1 0 1 0.860V 1 1 0 1 1 0 0.844V 1 1 0 1 1 1 0.828V 1 1 1 0 0 0 0.812V 1 1 1 0 0 1 0.796V 1 1 1 0 1 0 0.780V 1 1 1 0 1 1 0.764V 1 1 1 1 0 0 0.748V 1 1 1 1 0 1 0.732V 1 1 1 1 1 0 0.716V 1 1 1 1 1 1 0.700V
R162 10K_0402_5%
12
@
Voltage
12
@
R159 10K_0402_5%
R155 10K_0402_5%
R157 10K_0402_5%
12
12
@
@
V_CPU_GTLREF
Resistor placed within 0.5" of CPU pin. Trace should be at least 25 miles away from any other toggling signal.
CPU CLK SPEED
CPU_BSEL0:CPU_BSEL1
OPEN
J1
J2
SHORT
H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5
27.4_0402_1%
R128
+VCCA_PROC
C62
20 mils
12
R130
1
1
C57
2
2
10U_1206_6.3V6M
0.01U_0402_16V7K
5 mils
12
54.9_0402_1%
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
JCPU1C
F20
VCC
F22
VCC
G5
VCC
G21
VCC
H6
VCC
H22
VCC
J5
VCC
J21
VCC
K22
VCC
U5
VCC
V6
VCC
V22
VCC
W5
VCC
W21
VCC
Y6
VCC
Dothan
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
POWER, GROUND
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
FOX_PZ47813-2749-42
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc. SCHEMATIC, M /B LA-2522 401318
星期五 二月
AA11 AA13 AA15 AA17 AA19 AA21
AB10 AB12 AB14 AB16 AB18 AB20 AB22
AC11 AC13 AC15 AC17 AC19
AD10 AD12 AD14 AD16 AD18
AE11 AE13 AE15 AE17 AE19
AF10 AF12 AF14 AF16 AF18
M21 M24
Y22 AA5 AA7 AA9
AB6 AB8
AC9
AD8
AE9
AF8
M4 M5
N3
N6 N22 N23 N26
P2
P5 P21 P24
R1 R4
R6 R22 R25
T3
T5 T21 T23
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
T26 U2 U6 U22 U24 V1 V4 V5 V21 V25 W3 W6 W22 W23 W26 Y2 Y5 Y21 Y24 AA1 AA4 AA6 AA8 AA10 AA12 AA14 AA16 AA18 AA20 AA22 AA25 AB3 AB5 AB7 AB9 AB11 AB13 AB15 AB17 AB19 AB21 AB23 AB26 AC2 AC5 AC8 AC10 AC12 AC14 AC16 AC18 AC21 AC24 AD1 AD4 AD7 AD9 AD11 AD13 AD15 AD17 AD19 AD22 AD25 AE3 AE6 AE8 AE10 AE12 AE14 AE16 AE18 AE20 AE23 AE26 AF2 AF5 AF9 AF11 AF13 AF15 AF17 AF19 AF21 AF24
752, 18, 2005
1
of
Page 8
5
4
3
2
1
+CPU_CORE
D D
C C
1
C589 10U_0805_6.3V6M
2
+CPU_CORE
1
C127 10U_0805_6.3V6M
2
+CPU_CORE
1
C585 10U_0805_6.3V6M
2
+CPU_CORE
1
C556 10U_0805_6.3V6M
2
Vcc-core Decoupling SPCAP,Polymer
MLCC 0805 X5R
B B
1
C117 10U_0805_6.3V6M
2
1
C118 10U_0805_6.3V6M
2
1
C591 10U_0805_6.3V6M
2
1
C557 10U_0805_6.3V6M
2
C,uF ESL,nH
1
2
1
2
1
2
1
2
ESR, mohm
C124 10U_0805_6.3V6M
C187 10U_0805_6.3V6M
C592 10U_0805_6.3V6M
C170 10U_0805_6.3V6M
3X330uF 9m ohm/3 3.5nH/4 35X10uF
5m ohm/35 0.6nH/35
1
C137 10U_0805_6.3V6M
2
1
C111 10U_0805_6.3V6M
2
1
C590 10U_0805_6.3V6M
2
1
C587 10U_0805_6.3V6M
2
1
C156 10U_0805_6.3V6M
2
1
C112 10U_0805_6.3V6M
2
1
C586 10U_0805_6.3V6M
2
1
C172 10U_0805_6.3V6M
2
+CPU_CORE
1
C190 10U_0805_6.3V6M
2
+CPU_CORE
1
C113 10U_0805_6.3V6M
2
+CPU_CORE
1
C576 10U_0805_6.3V6M
2
10uF 1206 X5R -> 85 degree
Near VCORE regulator.
+CPU_CORE
@
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
C498
1
C499
+
2
1
1
C625
+
+
2
2
330U_D2E_2.5VM_R9
1
C189 10U_0805_6.3V6M
2
1
C559 10U_0805_6.3V6M
2
1
C580 10U_0805_6.3V6M
2
330U_D2E_2.5VM_R9
1
C634
+
2
1
C188 10U_0805_6.3V6M
2
1
C567 10U_0805_6.3V6M
2
1
C568 10U_0805_6.3V6M
2
1
C157 10U_0805_6.3V6M
2
1
C573 10U_0805_6.3V6M
2
1
C562 10U_0805_6.3V6M
2
X7R
High Frequence Decoupling
ESR <= 3m ohm Capacitor > 880 uF
1
C147 10U_0805_6.3V6M
2
1
C579 10U_0805_6.3V6M
2
1
C558 10U_0805_6.3V6M
2
+VCCP
1
+
C497 150U_D2_6.3VM
2
A A
5
1
C610
0.1U_0402_10V6K
2
1
C607
0.1U_0402_10V6K
2
1
C604
0.1U_0402_10V6K
2
4
1
C510
0.1U_0402_10V6K
2
1
C511
0.1U_0402_10V6K
2
1
C506
0.1U_0402_10V6K
2
THIS SHEET OF EN GINEE RING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1
C601
0.1U_0402_10V6K
2
1
C508
0.1U_0402_10V6K
2
1
C509
0.1U_0402_10V6K
2
1
C507
0.1U_0402_10V6K
2
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc. SCHEMATIC, M /B LA-2522 401318
星期五 二月
05
852, 18, 20
1
of
Page 9
5
4
3
2
1
H_A#[3..31] H_REQ#[0..4]
H_D#[0..63]
H_A#3 H_A#4
NB_SUS_STAT#
1 2
C86 1U_0603_10V4Z
NB_GTLREF
C574
220P_0402_50V7K
H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_ADSTB#0
H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25
H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_ADSTB#1
H_ADS# H_BNR# H_BPRI# H_DEFER# H_DRDY# H_DBSY#
H_LOCK# H_RESET#
H_RS#2 H_RS#1 H_RS#0
H_TRDY# H_HIT# H_HITM#
COMP_N COMP_P CPVDD CPVSS
D D
H_ADSTB#06
C C
C61
0.1U_0402_10V6K
12
R57 330_0402_5%
1 2
+VCCP
+1.8VS
B B
L
L19 FBM-11-160808-121-T_0603
Note: PLACE CLOSE TO RC300M, USE 10/10 WIDTH/SPACE
+VCCP
R295
49.9_0402_1%
1 2 12
R299
100_0402_1%
A A
H_ADSTB#16 H_ADS#6
H_BNR#6 H_BPRI#6 H_DEFER#6 H_DRDY#6 H_DBSY#6 H_DPWR#6 H_LOCK#6
H_RESET#6 H_RS#26
H_RS#16
H_RS#06
H_TRDY#6 H_HIT#6 H_HITM#6
NB_SUS_STAT#26 NB_RST#17,26 NB_PWRGD28
1 2
R294 24.9_0402_1%
1 2
R296 49.9_0402_1%
1 2
PLACE CLOSE TO U27 Ball W28, USE 20/20 WIDTH/SPACE
1
C570 1U_0603_10V4Z
2
1
2
C73 CLOSE TO Ball W28
U20A
M31
CPU_A3#
P29
CPU_A4#
M29
CPU_A5#
N34
CPU_A6#
N33
CPU_A7#
M30
CPU_A8#
N32
CPU_A9#
P32
CPU_A10#
P30
CPU_A11#
R34
CPU_A12#
P33
CPU_A13#
R33
CPU_A14#
N30
CPU_A15#
N31
CPU_A16#
M34
CPU_REQ0#
N29
CPU_REQ1#
R30
CPU_REQ2#
M33
CPU_REQ3#
L32
CPU_REQ4#
R31
CPU_ADSTB0#
U33
CPU_A17#
T33
CPU_A18#
R32
CPU_A19#
R29
CPU_A20#
U29
CPU_A21#
T31
CPU_A22#
V32
CPU_A23#
T30
CPU_A24#
U32
CPU_A25#
U30
CPU_A26#
V30
CPU_A27#
T29
CPU_A28#
V29
CPU_A29#
U31
CPU_A30#
V33
CPU_A31#
T34
CPU_ADSTB1#
L31
CPU_ADS#
K29
CPU_BNR#
H30
CPU_BPRI#
J31
CPU_DEFER#
L30
CPU_DRDY#
G31
CPU_DBSY#
F29
CPU_BR0#
K30
CPU_LOCK#
A21
CPU_CPURSET#
G29
CPU_RS2#
G30
CPU_RS1#
J29
CPU_RS0#
F30
CPU_TRDY#
J30
CPU_HIT#
H29
CPU_HITM#
D10
CPU_RSET
AE5
SUS_STAT#
AE6
SYSRESET#
E12
POWERGOOD
W33
CPU_COMP_N
W32
CPU_COMP_P
H26
CPVDD
J27
CPVSS
Y33
CPU_VREF
Y32
THERMALDIODE_N
AA33
THERMALDIODE_P
B21
TESTMODE
12
R269
CHS-216RS300MDA12_BGA868
Ra
0_0402_5%
PART 1 OF 7
Ra
ADDR. GROUP 1 ADDR. GROUP 0CONTROLMISC.
RS300M MODERESISTOR
NORMAL MODE
H_A#[3..31] 6 H_REQ#[0..4] 6 H_D#[0..63] 6
CPU_D0# CPU_D1# CPU_D2# CPU_D3# CPU_D4# CPU_D5# CPU_D6# CPU_D7# CPU_D8#
CPU_D9# CPU_D10# CPU_D11#
DATA GROUP 0DATA GROUP 1DATA GROUP 2DATA GROUP 3
CPU_D12# CPU_D13# CPU_D14# CPU_D15#
CPU_DBI0# CPU_DSTBN0# CPU_DSTBP0#
CPU_D16# CPU_D17# CPU_D18# CPU_D19# CPU_D20# CPU_D21# CPU_D22# CPU_D23# CPU_D24# CPU_D25# CPU_D26# CPU_D27# CPU_D28# CPU_D29# CPU_D30# CPU_D31#
CPU_DBI1# CPU_DSTBN1# CPU_DSTBP1#
CPU_D32# CPU_D33# CPU_D34# CPU_D35# CPU_D36# CPU_D37# CPU_D38# CPU_D39# CPU_D40# CPU_D41# CPU_D42# CPU_D43# CPU_D44# CPU_D45# CPU_D46# CPU_D47#
CPU_DBI2# CPU_DSTBN2# CPU_DSTBP2#
CPU_D48# CPU_D49# CPU_D50# CPU_D51# CPU_D52# CPU_D53# CPU_D54# CPU_D55# CPU_D56# CPU_D57# CPU_D58# CPU_D59# CPU_D60# CPU_D61# CPU_D62# CPU_D63#
CPU_DBI3# CPU_DSTBN3# CPU_DSTBP3#
L33 K34 J34 J33 K32 K33 H31 J32 F32 H33 E33 D32 G32 E32 D33 F34 F33 G33 G34
B30 C32 A31 C33 B33 C34 B32 D34 D30 B31 C30 E29 E30 A30 B29 C29 A32 D31 E31
F28 D28 E27 E28 F27 C28 B28 A28 F25 A27 B27 C26 B26 C25 E25 D26 D27 E26 F26
B25 F24 A25 C24 E24 D24 A24 D23 C22 B24 E22 B23 D22 B22 C21 A22 F23 E23 F22
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_DINV#0 H_DSTBN#0 H_DSTBP#0
H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_DINV#1 H_DSTBN#1 H_DSTBP#1
H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_DINV#2 H_DSTBN#2 H_DSTBP#2
H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 H_DINV#3 H_DSTBN#3 H_DSTBP#3
H_DINV#0 6 H_DSTBN#0 6 H_DSTBP#0 6
H_DINV#1 6 H_DSTBN#1 6 H_DSTBP#1 6
H_DINV#2 6 H_DSTBN#2 6 H_DSTBP#2 6
H_DINV#3 6 H_DSTBN#3 6 H_DSTBP#3 6
KC FBM-L11-201209-221LMAT_0805
220mA
+1.8VS
+1.8VS
L20
KC FBM-L11-201209-221LMAT_0805
+1.8VS
REFCLK1_NB16
CLK_AGP_66M16 CLK_MEM_66M16
L14 CHB1608U301_0603
L15 CHB1608U301_0603
1 2
0.1U_0402_10V6K
1 2
C83
10U_0805_10V4Z
80mA
+2.5VS
12
L13
+2.5VS_AVDD
1
C55
0.1U_0402_10V6K
1 2
C56
0.1U_0402_10V6K
1
1
C53
2
2
1
1
2
2
0.1U_0402_10V6K
1 2
R251 0_0402_5%
+3VS
CLK_AGP_66M
12
1
@
2
Note: PLACE CLOSE TO U2 (NB CHIP)
L
1
2
C54
0.1U_0402_10V6K
C82
REFCLK1_NB1
R265 56_0402_5%
1 2 1 2
12
R63 10K_0402_5%
10K_0402_5%@
R375 18_0402_5%@
C660 10P_0402_50V8J
2
+1.8VS_AVDDDI
+1.8VS_AVDDQ
PLLVDD_18H_A#26
12
R55
10K_0402_5%@
R56
10K_0402_5%@
CLK_AGP_66M CLK_MEM_66M
R261
+3VS_VDDR3
1 2
1 2
CLK_MEM_66M
12
R353 18_0402_5%
1
C643 10P_0402_50V8J
2
1 2
L18 CHB1608U301_0603
U20D
G9
VDDR3
H9
VDDR3
A18
AVDD_25
B18
AVSSN
B17
AVDDDI_18
C17
AVSSDI
A19
AVDDQ
B19
AVSSQ
H14
PLLVDD_18
H15
PLLVSS
D18
RED
E18
GREEN
F18
BLUE
D13
DACHSYNC
E13
DACVSYNC
E11
DACSDA
F12
DACSCL
C18
RSET
A9
XTALIN
B9
XTALOUT
F9
ALINK_CLK
C8
AGPCLKOUT
D9
AGPCLKIN
C9
EXT_MEM_CLK
F10
USBCLK
D11
REF27
E10
OSC
CHS-216RS300MDA12_BGA868
R266
10K_0402_5%@
150mA
+3VS
1
C91
0.1U_0402_10V6K
2
PART 4 OF 7
CRT
SVID LVDS
SYS_FBCLKOUT#
CLK. GEN.
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXCLK_UN TXCLK_UP
TXOUT_L0N TXOUT_L0P TXOUT_L1N TXOUT_L1P TXOUT_L2N TXOUT_L2P
TXCLK_LN
TXCLK_LP
LPVDD
LPVSS
LVDDR LVDDR
LVSSR LVSSR
Y_G
COMP
CPUSTOP#
SYSCLK
SYSCLK#
SYS_FBCLKOUT
HCLKIN#
HCLKIN
D15 E15 F15 D16 F16 E16 F17 E17
F14 E14 C13 B13
KC FBM-L11-201209-221LMAT_0805
C12 A13 C14 B14
+1.8VS_LPVDD
A16 A15
+1.8VS_LVDDR
B16 C16
B15 C15
F19
0.1U_0402_10V6K
D19 E19
2N7002_SOT23
E9 A12
R262 10K_0402_5%@
B12
R268 10K_0402_5%@
C11 B11
CLK_NB_BCLK#
B10
CLK_NB_BCLK
A10
C66
@
1 2
R250 0_0402_5% @
12 12
0.1U_0402_10V6K
1
1
C58
C51
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
2
Q20
2
KC FBM-L11-201209-221LMAT_0805
1
1
C65
2
2
1 2
R62 1K_0402_5%
13
D
2
G
S
CLK_NB_BCLK# 16 CLK_NB_BCLK 16
+1.8VS
L12
1 2
1
C50
2
10U_0805_10V4Z
1 2
L17 C69 10U_0805_10V4Z
NB_RST# 17,26
PM_STPCPU# 6,16,25,48
R267
@
10K_0402_5%
+3VS
1 2
+1.8VS
1 2
@
R252
10K_0402_5%
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2522
401318
星期五 二月
1
952, 18, 2005
of
Page 10
5
4
3
2
1
DDR_A_SMA0 DDR_A_SMA1 DDR_A_SMA2 DDR_A_SMA3 DDR_A_SMA4 DDR_A_SMA5 DDR_A_SMA6 DDR_A_SMA7 DDR_A_SMA8 DDR_A_SMA9 DDR_A_SMA10 DDR_A_SMA11 DDR_A_SMA12 DDR_A_SMA13 DDR_A_SMA14 DDR_A_SMA15
DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7
DDR_A_SRAS# DDR_A_SCAS#
DDR_A_SWE# DDR_A_DQS0
DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7
MEMA_CLK0 MEMA_CLK0#
DDR_A_SCKE0 DDR_A_SCKE1
DDR_A_SCS0# DDR_A_SCS1#
1 2
C167 1U_0603_10V4Z
DDR_A_DM[0..7]
DDR_A_D[0..63] DDR_A_DQS[0..7] DDR_A_SMA[0..15]
MEN_COMP
MPVDD
U20B
AN21 AM21 AN20 AM18 AN17 AN14 AM15 AN12 AM13 AM11 AM22 AP10
AM9 AM27 AN22 AK33
AP4 AP11 AP17 AN25 AM34 AG32 AC32
AN29 AP31
AM30
AK1
AN4 AN10 AM17 AM25 AM33 AG33 AC33
AP22 AM23
AM7
AN7
AN32 AN33 AN31 AP32
AP25 AA34
AG3
AG19
AH19
AJ3
PART 2 OF 7
MEMA_A0 MEMA_A1 MEMA_A2 MEMA_A3 MEMA_A4 MEMA_A5 MEMA_A6 MEMA_A7 MEMA_A8 MEMA_A9 MEMA_A10 MEMA_A11 MEMA_A12 MEMA_A13 MEMA_A14 MEMA_A15
MEMA_DM0 MEMA_DM1 MEMA_DM2 MEMA_DM3 MEMA_DM4 MEMA_DM5 MEMA_DM6 MEMA_DM7
MEMA_RAS# MEMA_CAS#
MEMA_WE# MEMA_DQS0
MEMA_DQS1 MEMA_DQS2 MEMA_DQS3 MEMA_DQS4 MEMA_DQS5 MEMA_DQS6 MEMA_DQS7
MEMA_CK MEMA_CK#
MEMA_CKE0 MEMA_CKE1
MEMA_CS#0 MEMA_CS#1 MEMA_CS#2 MEMA_CS#3
MEM_COMP MEM_CAP2 MEM_CAP1
MPVDD
MPVSS
CHS-216RS300MDA12_BGA868
MEMA_DQ0 MEMA_DQ1 MEMA_DQ2 MEMA_DQ3 MEMA_DQ4 MEMA_DQ5 MEMA_DQ6 MEMA_DQ7 MEMA_DQ8
MEMA_DQ9 MEMA_DQ10 MEMA_DQ11 MEMA_DQ12 MEMA_DQ13 MEMA_DQ14 MEMA_DQ15 MEMA_DQ16 MEMA_DQ17 MEMA_DQ18 MEMA_DQ19 MEMA_DQ20 MEMA_DQ21 MEMA_DQ22 MEMA_DQ23 MEMA_DQ24 MEMA_DQ25 MEMA_DQ26 MEMA_DQ27 MEMA_DQ28 MEMA_DQ29 MEMA_DQ30 MEMA_DQ31 MEMA_DQ32 MEMA_DQ33 MEMA_DQ34 MEMA_DQ35 MEMA_DQ36 MEMA_DQ37 MEMA_DQ38 MEMA_DQ39 MEMA_DQ40 MEMA_DQ41
MEM I/F
MEMA_DQ42 MEMA_DQ43 MEMA_DQ44 MEMA_DQ45 MEMA_DQ46 MEMA_DQ47 MEMA_DQ48 MEMA_DQ49 MEMA_DQ50 MEMA_DQ51 MEMA_DQ52 MEMA_DQ53 MEMA_DQ54 MEMA_DQ55 MEMA_DQ56 MEMA_DQ57 MEMA_DQ58 MEMA_DQ59 MEMA_DQ60 MEMA_DQ61 MEMA_DQ62 MEMA_DQ63
MEM_DDRVREF
0.1U_0402_10V6K
0.1U_0402_10V6K
C205
C206
AH2 AJ1 AL1 AM1 AH3 AJ2 AK2 AL2 AM2 AN3 AM6 AN6 AN2 AP3 AN5 AP5 AN8 AN9 AN11 AN13 AM8 AM10 AM12 AM14 AN15 AN16 AN18 AN19 AM16 AP16 AM19 AM20 AP23 AM24 AM26 AM28 AN23 AN24 AN26 AN27 AM29 AM31 AL33 AK32 AN28 AN30 AL34 AK34 AJ32 AH32 AF33 AE33 AJ33 AH33 AF32 AE32 AD34 AD33 AB33 AA32 AE34 AD32 AB32 AB34
AP26
2
1
DDR_VREF
2
1
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
+2.5V+2.5V
12
R126 1K_0603_1%
12
R127 1K_0603_1%
DDR_B_DM[0..7]14 DDR_B_D[0..63]14 DDR_B_DQS[0..7]14 DDR_B_SMA[0..15]14
DDR_B_SRAS#14 DDR_B_SCAS#14
DDR_B_SWE#14
T16 PAD T14 PAD
DDR_B_SCKE014 DDR_B_SCKE114
DDR_B_SCS0#14 DDR_B_SCS1#14
DDR_A_DM[0..7]13 DDR_A_D[0..63]13
D D
C C
B B
+1.8VS
DDR_A_DQS[0..7]13 DDR_A_SMA[0..15]13
DDR_A_SRAS#13 DDR_A_SCAS#13
DDR_A_SWE#13
MEMA_CLK016 MEMA_CLK0#16
DDR_A_SCKE013 DDR_A_SCKE113
DDR_A_SCS0#13 DDR_A_SCS1#13
R124 49.9_0402_1%
C577 0.47U_0603_10V7K C198 0.47U_0603_10V7K
L23 CHB2012U121_0805
12 12 12
1 2
DDR_B_DM[0..7]
DDR_B_D[0..63] DDR_B_DQS[0..7] DDR_B_SMA[0..15]
@ @
DDR_B_SMA0 DDR_B_SMA1 DDR_B_SMA2 DDR_B_SMA3 DDR_B_SMA4 DDR_B_SMA5 DDR_B_SMA6 DDR_B_SMA7 DDR_B_SMA8 DDR_B_SMA9 DDR_B_SMA10 DDR_B_SMA11 DDR_B_SMA12 DDR_B_SMA13 DDR_B_SMA14 DDR_B_SMA15
DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7
DDR_B_SRAS# DDR_B_SCAS#
DDR_B_SWE# DDR_B_DQS0
DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7
DDR_B_CLK0 DDR_B_CLK0#
DDR_B_SCKE0 DDR_B_SCKE1
DDR_B_SCS0# DDR_B_SCS1#
U20G
AK21
AJ21 AL20 AJ19 AJ18
AK15
AL15 AL13 AJ14
AK12
AJ22 AJ12
AK10
AL26 AK22 AG28
AL12 AK18 AK25
AJ31 AE30 AA30
AK28 AK31
AJ29
AK11
AL17
AJ25 AH30 AE31 AA31
AL22
AJ23
AL30
AL31
AJ30
AL32
AH5 AL6
AJ6
AK6
AL8
AJ9
PART 7 OF 7
MEMB_A0 MEMB_A1 MEMB_A2 MEMB_A3 MEMB_A4 MEMB_A5 MEMB_A6 MEMB_A7 MEMB_A8 MEMB_A9 MEMB_A10 MEMB_A11 MEMB_A12 MEMB_A13 MEMB_A14 MEMB_A15
MEMB_DM0 MEMB_DM1 MEMB_DM2 MEMB_DM3 MEMB_DM4 MEMB_DM5 MEMB_DM6 MEMB_DM7
MEMB_RAS# MEMB_CAS#
MEMB_WE# MEMB_DQS0
MEMB_DQS1 MEMB_DQS2 MEMB_DQS3 MEMB_DQS4 MEMB_DQS5 MEMB_DQS6 MEMB_DQS7
MEMB_CK MEMB_CK#
MEMB_CKE0 MEMB_CKE1
MEMB_CS#0 MEMB_CS#1 MEMB_CS#2 MEMB_CS#3
CHS-216RS300MDA12_BGA868
MEMB_DQ0 MEMB_DQ1 MEMB_DQ2 MEMB_DQ3 MEMB_DQ4 MEMB_DQ5 MEMB_DQ6 MEMB_DQ7 MEMB_DQ8
MEMB_DQ9 MEMB_DQ10 MEMB_DQ11 MEMB_DQ12 MEMB_DQ13 MEMB_DQ14 MEMB_DQ15 MEMB_DQ16 MEMB_DQ17 MEMB_DQ18 MEMB_DQ19 MEMB_DQ20 MEMB_DQ21 MEMB_DQ22 MEMB_DQ23 MEMB_DQ24 MEMB_DQ25 MEMB_DQ26 MEMB_DQ27 MEMB_DQ28 MEMB_DQ29 MEMB_DQ30 MEMB_DQ31 MEMB_DQ32 MEMB_DQ33 MEMB_DQ34 MEMB_DQ35 MEMB_DQ36 MEMB_DQ37 MEMB_DQ38 MEMB_DQ39 MEMB_DQ40 MEMB_DQ41
MEM I/F
MEMB_DQ42 MEMB_DQ43 MEMB_DQ44 MEMB_DQ45 MEMB_DQ46 MEMB_DQ47 MEMB_DQ48 MEMB_DQ49 MEMB_DQ50 MEMB_DQ51 MEMB_DQ52 MEMB_DQ53 MEMB_DQ54 MEMB_DQ55 MEMB_DQ56 MEMB_DQ57 MEMB_DQ58 MEMB_DQ59 MEMB_DQ60 MEMB_DQ61 MEMB_DQ62 MEMB_DQ63
AG6 AH6 AJ4 AL3 AG5 AG4 AJ5 AK3 AK4 AM4 AJ8 AK8 AL4 AL5 AJ7 AK7 AJ10 AL10 AJ13 AK14 AK9 AJ11 AK13 AJ15 AJ16 AJ17 AK19 AJ20 AK16 AK17 AL19 AK20 AK23 AK24 AJ26 AK27 AJ24 AL24 AK26 AJ27 AJ28 AL29 AH28 AG29 AL27 AK29 AH29 AG30 AG31 AF29 AD30 AC30 AF30 AF31 AD29 AC29 AB31 AA29 Y30 W30 AB29 AB30 Y29 W29
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
DDR_VREF trace width of
L
20mils and space
A A
5
20mils(min)
4
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2522
401318
星期五 二月
of
1
10 52, 18, 2005
Page 11
5
4
3
2
1
A_AD0
R76 0_0402_5%
1 2
R75
1 2
8.2K_0402_5%
AGP_GNT# AGP_REQ#
AGP8X_DET#
+AGPVREF
1 2
A_AD1 A_AD2 A_AD3 A_AD4 A_AD5 A_AD6 A_AD7 A_AD8 A_AD9 A_AD10 A_AD11 A_AD12 A_AD13 A_AD14 A_AD15 A_AD16 A_AD17 A_AD18 A_AD19 A_AD20 A_AD21 A_AD22 A_AD23 A_AD24 A_AD25 A_AD26 A_AD27 A_AD28 A_AD29 A_AD30 A_AD31
A_CBE#0 A_CBE#1 A_CBE#2 A_CBE#3
A_PAR A_STROBE# A_ACAT# A_END#
A_DEVSEL# A_OFF#
A_SBREQ# A_SBGNT#
AGP_COMP AGP_ST2
AGP_ST1 AGP_ST0
A_PAR25 A_STROBE#25 A_ACAT#25 A_END#25 PCI_PIRQA#17,25,31 A_DEVSEL#25 A_OFF#25
A_SBREQ#25 A_SBGNT#25
A_AD[0..31] A_CBE#[0..3]
A_AD[0..31]25 A_CBE#[0..3]25
D D
C C
+3VS
AGP_GNT#17 AGP_REQ#17
AGP8X_DET#17
?
?
+AGPVREF17 +1.5VS
R66 169_0402_1%
Ra
AGP_COMP
B B
AGP_4X/8X#
Ra
8X=0
169R
4X=1
54.9R
AGP8X_DET#
RS300MD internal ppull-up
A A
U20C
AE4 AE2 AE3 AD2 AD1 AD3 AD5 AD6 AC1 AC2 AC4 AC5 AC6 AB2 AB4 AB5 AA4 AA2 AA3
W3 W4 W5 W6
V2 V1 V5
V6 U1 U2 U3 U4 U5
AC3 AB6
W2
V4
AA5
Y3
Y2
Y6 U6
Y5
AA6
T5
T6 R5
R6
G6 G5
J6
F6
F5
J5 H5 H6
CHS-216RS300MDA12_BGA868
+AGPVREF
AGP 8X
324_0402_1%
Rb
100_0402_1%
Rc
324_0402_1%
+AGPVREF
100_0402_1%
ALINK_AD0 ALINK_AD1 ALINK_AD2 ALINK_AD3 ALINK_AD4 ALINK_AD5 ALINK_AD6 ALINK_AD7 ALINK_AD8 ALINK_AD9 ALINK_AD10 ALINK_AD11 ALINK_AD12 ALINK_AD13 ALINK_AD14 ALINK_AD15 ALINK_AD16 ALINK_AD17 ALINK_AD18 ALINK_AD19 ALINK_AD20 ALINK_AD21 ALINK_AD22 ALINK_AD23 ALINK_AD24 ALINK_AD25 ALINK_AD26 ALINK_AD27 ALINK_AD28 ALINK_AD29 ALINK_AD30 ALINK_AD31
ALINK_CBE#0 ALINK_CBE#1 ALINK_CBE#2 ALINK_CBE#3
ALINK_PAR ALINK_FRAME# ALINK_IRDY# ALINK_TRDY# INTA# ALINK_DEVSEL# ALINK_STOP#
ALINK_SBREQ# ALINK_SBGNT#
ALINK_REQ0# ALINK_GNT0#
AGP_GNT AGP_REQ
AGP8X_DET# AGP_VREF/TMDS_VREF AGP_COMP AGP_ST2
AGP_ST1 AGP_ST0
PART 3 OF 7
AGP 4X
1K_0402_1% 1K_0402_1%
+1.5VS
Rb
12
R65
12
Rc
R67
2
C71
0.1U_0402_10V6K
1
0.233*VDDP for AGP 3.0
0.5*VDDP for AGP 2.0
AGP_AD0/TMD2_HSYNC AGP_AD1/TMD2_VSYNC
AGP_AD2/TMD2_D1 AGP_AD3/TMD2_D0 AGP_AD4/TMD2_D3 AGP_AD5/TMD2_D2 AGP_AD6/TMD2_D5 AGP_AD7/TMD2_D4 AGP_AD8/TMD2_D6 AGP_AD9/TMD2_D9
AGP_AD10/TMD2_D8 AGP_AD11/TMD2_D11 AGP_AD12/TMD2_D10
AGP_AD13 AGP_AD14
AGP_AD15 AGP_AD16/TMD1_VSYNC AGP_AD17/TMD1_HSYNC
AGP_AD18/TMD1_DE AGP_AD19/TMD1_D0 AGP_AD20/TMD1_D1 AGP_AD21/TMD1_D2 AGP_AD22/TMD1_D3 AGP_AD23/TMD1_D4 AGP_AD24/TMD1_D7 AGP_AD25/TMD1_D6 AGP_AD26/TMD1_D9
AGP_AD27/TMD1_D8 AGP_AD28/TMD1_D11 AGP_AD29/TMD1_D10
AGP_AD30/TMDS_HPD
AGP_AD31
AGP_SBSTBF AGP_SBSTBS
PCI Bus 0 / A-Link I/F
AGP_ADSTBF0 AGP_ADSTBS0 AGP_ADSTBF1 AGP_ADSTBS1
AGP_C#BE0 AGP_C#BE1 AGP_C#BE2 AGP_C#BE3
AGP_IRDY AGP_TRDY AGP_STOP
AGP_PAR
AGP_FRAME
AGP_DEVSEL
AGP_DBI_HI
AGP_DBI_LO
PCI BUS 1 / AGP Bus (GPIO , TMDS , ZVPort)
AGP_RBF
AGP_WBF
AGP_SBA0# AGP_SBA1# AGP_SBA2# AGP_SBA3# AGP_SBA4# AGP_SBA5# AGP_SBA6# AGP_SBA7#
T2 T3 R2 R3 P2 P3 N3 N2 M3 L2 L3 K2 K3 J2 J1 J3 H3 G2 G3 F2 F1 F3 E1 E2 C1 C2 C3 B2 D4 B3 A3 C4
A6 C6 M1 M2 D3 D2
L1 H1 H2 E3
L5 M6 N6 N5 L6 M5 B4 A4 K6 K5
B8 C7 B7 A7 B6 C5 B5 D5
AGP_AD0 AGP_AD1 AGP_AD2 AGP_AD3 AGP_AD4 AGP_AD5 AGP_AD6 AGP_AD7 AGP_AD8 AGP_AD9 AGP_AD10 AGP_AD11 AGP_AD12 AGP_AD13 AGP_AD14 AGP_AD15 AGP_AD16 AGP_AD17 AGP_AD18 AGP_AD19 AGP_AD20 AGP_AD21 AGP_AD22 AGP_AD23 AGP_AD24 AGP_AD25 AGP_AD26 AGP_AD27 AGP_AD28 AGP_AD29 AGP_AD30 AGP_AD31
AGP_SBSTB AGP_SBSTB# AGP_ADSTB0 AGP_ADSTB0# AGP_ADSTB1 AGP_ADSTB1#
AGP_C/BE#0 AGP_C/BE#1 AGP_C/BE#2 AGP_C/BE#3
AGP_IRDY# AGP_TRDY# AGP_STOP# AGP_PAR AGP_FRAME# AGP_DEVSEL# AGP_DBI_HI AGP_DBI_LO AGP_RBF# AGP_WBF#
AGP_SBA0 AGP_SBA1 AGP_SBA2 AGP_SBA3 AGP_SBA4 AGP_SBA5 AGP_SBA6 AGP_SBA7
AGP_AD[0..31] AGP_SBA[0..7] AGP_C/BE#[0..3] AGP_ST[0..2]
AGP_SBSTB 17 AGP_SBSTB# 17 AGP_ADSTB0 17 AGP_ADSTB0# 17 AGP_ADSTB1 17 AGP_ADSTB1# 17
AGP_IRDY# 17 AGP_TRDY# 17 AGP_STOP# 17 AGP_PAR 17 AGP_FRAME# 17 AGP_DEVSEL# 17 AGP_DBI_HI 17 AGP_DBI_LO 17 AGP_RBF# 17 AGP_WBF# 17
AGP_AD[0..31] 17 AGP_SBA[0..7] 17 AGP_C/BE#[0..3] 17 AGP_ST[0..2] 17
A_AD31
A_AD30
A_AD29
A_AD28
A_AD27
A_AD26
A_AD25
A_AD24
A_AD23
A_AD22
A_AD21
A_AD20
A_AD18A_AD18
A_AD17A_AD17
A_PAR25
A_PAR
+3VS
R93
10K_0402_5%
1 2
1 2
R92
4.7K_0402_5%
1 2
R86
4.7K_0402_5%
1 2
R77 10K_0402_5%
1 2
R78 4.7K_0402_5%@
1 2
R79 10K_0402_5%@
1 2
R425 4.7K_0402_5%
1 2
R80 10K_0402_5%
1 2
R410 4.7K_0402_5%@
1 2
R94 10K_0402_5%
1 2
R95 4.7K_0402_5%@
1 2
R83 10K_0402_5%@
1 2
R84 4.7K_0402_5%
1 2
R90 10K_0402_5%@
1 2
R91 4.7K_0402_5%
1 2
R85 10K_0402_5%
1 2
R433 4.7K_0402_5%@
1 2
R107 10K_0402_5%
1 2
R106 4.7K_0402_5%@
1 2
R103 10K_0402_5%
1 2
R104 4.7K_0402_5%@
1 2
R101 4.7K_0402_5%@
1 2
R102 4.7K_0402_5%
1 2
R96 4.7K_0402_5%@
1 2
R97 4.7K_0402_5%
1 2
R99 4.7K_0402_5%@
1 2
R100 4.7K_0402_5%
1 2
R109 4.7K_0402_5%
1 2
R110 4.7K_0402_5%@
R87 10K_0402_5%
1 2
D9
2 1
CH751H-40_SC76 D8
2 1
CH751H-40_SC76
A_AD[31..30 ] : FSB CLK SPEED
DEFAULT: 01
00: 100 MHZ 01: 133 MHZ 10: 200MHZ 11:166 MHZ
CPU_BSEL1 7,16
CPU_BSEL0 7,16
A_AD29: STRAP CONFIGURATION
+3VS
DEFAULT : 1
A_AD28: SPREAD SPECTRUM ENABLE
+3VS
DEFAULT: 0
A_AD27: FrcS hortReset#
+3VS
DEFAULT : 1
A_AD26 : ENABLE IOQ
+3VS
DEFAULT : 1
A_AD25/A_AD17 : CPU VOLTAGE[1..0]
+3VS
DEFAULT: 10
00: 1.05V 01: 1.35V 11: 1.75V 10: 1.45V
A_AD24 : MOBILE CPU SELECT
+3VS
DEFAULT : 1
A_AD23 : CLOCK BYPASS DISABLE
+3VS
DEFAULT : 1
A_AD22 : OSC CLOCK SELECT
+3VS
DEFAULT : 1
A_AD21 : AUTO_CAL ENABLE
+3VS
DEFAULT : 1
A_AD20 : INTERNAL CLK GEN ENABLE
+3VS
DEFAULT: 0
A_AD18 : ENABLE PHASE CALIBRATION
+3VS
DEFAULT: 0
A_AD25/A_AD17 : CPU VOLTAGE[1..0]
+3VS
DEFAULT: 0
PAR: EXTENDED DEBUG MODE
+3VS
DEFAULT : 1
0: REDUCEDE SET 1: FULL SET
0: DISABLE 1: ENABLE
0: TEST MODE 1: NORMAL MODE
0: IOQ=1 1: IOQ=12
AD25=1 DESTOP CPU AD25=0 MOBILE CPU AD17--DON'T CARE
0: BANIAS CPU 1: OTHER CPU
0: TEST MODE 1: NORMAL
0: OSC DRIVES PCICLK 1: OSC DRIVES REFCLK
0: DISABLE 1: ENABLE
0: DISABLE 1: ENABLE
0: DISABLE 1: ENABLE
00: 1.05V 01: 1.35V 11: 1.75V 10: 1.45V
0: DEBUG MODE 1: NORMAL
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2522
401318
星期五 二月
1
of
11 52, 18, 2005
Page 12
5
U20E
G10
1330mA
D D
C C
+VCCP
500mA
B B
VDD_CORE
G12
VDD_CORE
G16
VDD_CORE
H10
VDD_CORE
H12
VDD_CORE
H16
VDD_CORE
N13
VDD_CORE
N14
VDD_CORE
N15
VDD_CORE
N16
VDD_CORE
N19
VDD_CORE
N20
VDD_CORE
N21
VDD_CORE
N22
VDD_CORE
P13
VDD_CORE
P14
VDD_CORE
P15
VDD_CORE
P16
VDD_CORE
P19
VDD_CORE
P20
VDD_CORE
P21
VDD_CORE
P22
VDD_CORE
R13
VDD_CORE
R14
VDD_CORE
R15
VDD_CORE
R16
VDD_CORE
R19
VDD_CORE
R20
VDD_CORE
R21
VDD_CORE
R22
VDD_CORE
Y13
VDD_CORE
Y14
VDD_CORE
Y15
VDD_CORE
Y16
VDD_CORE
Y19
VDD_CORE
Y20
VDD_CORE
Y21
VDD_CORE
Y22
VDD_CORE
AA13
VDD_CORE
AA14
VDD_CORE
AA15
VDD_CORE
AB22
VDD_CORE
AB21
VDD_CORE
AB20
VDD_CORE
AB19
VDD_CORE
AB16
VDD_CORE
AB15
VDD_CORE
AB14
VDD_CORE
AB13
VDD_CORE
AA22
VDD_CORE
AA21
VDD_CORE
AA20
VDD_CORE
AA19
VDD_CORE
AA16
VDD_CORE
W34
VDDR2_CPU
U27
VDDR2_CPU
T28
VDDR2_CPU
T27
VDDR2_CPU
N28
VDDR2_CPU
N27
VDDR2_CPU
M28
VDDR2_CPU
M27
VDDR2_CPU
K28
VDDR2_CPU
K27
VDDR2_CPU
H27
VDDR2_CPU
H25
VDDR2_CPU
H23
VDDR2_CPU
H21
VDDR2_CPU
H20
VDDR2_CPU
G28
VDDR2_CPU
G27
VDDR2_CPU
G25
VDDR2_CPU
G21
VDDR2_CPU
F21
VDDR2_CPU
F20
VDDR2_CPU
E21
VDDR2_CPU
E20
VDDR2_CPU
D21
VDDR2_CPU
D20
VDDR2_CPU
C20
VDDR2_CPU
CHS-216RS300MDA12_BGA868
PART 5 OF 7
CORE PWR
CPU I/F PWR
VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM
MEM I/F PWR
VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM
VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP
AGP PWR
VDDP_AGP VDDP_AGP VDDP_AGP
VDDP_AGP/VDDP33 VDDP_AGP/VDDP33 VDDP_AGP/VDDP33
VDDL_ALINK VDDL_ALINK VDDL_ALINK VDDL_ALINK VDDL_ALINK VDDL_ALINK VDDL_ALINK VDDL_ALINK VDDL_ALINK VDDL_ALINK VDDL_ALINK
ALINK PWR
VDD_18 VDD_18 VDD_18 VDD_18
W31 Y27 AB27 AB28 AC31 AD27 AD28 AF27 AG1 AG7 AG8 AG10 AG12 AG14 AG16 AG18 AG22 AG24 AG26 AG27 AG34 AH10 AH14 AH16 AH22 AH26 AL9 AL16 AL23 AP2 AP7 AP13 AP19 AP28 AP33
R8 R7 R4 P6 P5 P1 N8 N4 L8 L7 L4 K8 J4 G4 E4 A2
H8 E7 D7
U7 U8 W8 Y1 AA7 AA8 AD7 AD8 AF4 AF5 AF6
AF26 AF9 J26 J9
+2.5V+1.5VS_CORE
VDDP_AGP
+1.8VS
180mA
+3VS
500mA
4
400mA
+1.5VS_VDDP
230mA
POP For 150G DEPOP For 150A
R68 0_0603_5%
1 2 1 2
R69 0_0603_5%@
+1.5VS
+3VS
U20F
PART 6 OF 7
A33
VSS
B1
VSS
B20
VSS
B34
VSS
C10
VSS
C19
VSS
C23
VSS
C27
VSS
C31
VSS
D6
VSS
D8
VSS
D12
VSS
D14
VSS
D17
VSS
D25
VSS
D29
VSS
E5
VSS
E6
VSS
E8
VSS
F4
VSS
F7
VSS
F8
VSS
F11
VSS
F13
VSS
F31
VSS
G8
VSS
G13
VSS
G15
VSS
G18
VSS
GND
G19
VSS
G22
VSS
G24
VSS
H4
VSS
H7
VSS
H11
VSS
H13
VSS
H17
VSS
H18
VSS
H19
VSS
H22
VSS
H24
VSS
H32
VSS
J7
VSS
J8
VSS
J28
VSS
K4
VSS
K31
VSS
L27
VSS
L29
VSS
M4
VSS
M7
VSS
M8
VSS
M32
VSS
N17
VSS
N18
VSS
P4
VSS
P7
VSS
P8
VSS
P17
VSS
P18
VSS
P27
VSS
P31
VSS
R1
VSS
AF1
VSS
AF2
VSS
AF3
VSS
AF7
VSS
AF8
VSS
AG2
VSS
AG9
VSS
AG11
VSS
AG13
VSS
AG15
VSS
AG17
VSS
AG20
VSS
AG21
VSS
AG23
VSS
AG25
VSS
AH4
VSS
AH8
VSS
AH11
VSS
AH13
VSS
AH17
VSS
AH20
VSS
AH23
VSS
AH25
VSS
AH31
VSS
AH34
VSS
AN1
VSS
AN34
VSS
AP8
VSS
AP14
VSS
AP20
VSS
CHS-216RS300MDA12_BGA868
3
V13
VSS
V14
VSS
V15
VSS
V16
VSS
V17
VSS
V18
VSS
V19
VSS
V20
VSS
V21
VSS
V22
VSS
V27
VSS
V28
VSS
V31
VSS
V34
VSS
W13
VSS
W14
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
W15 W16 W17 W18 W19 W20 W21 W22 W27 W28 Y4 Y7 Y8 Y17 Y18 Y31 AA1 V8 V7 V3 U22 U21 U20 U19 U18 U17 U16 U15 U14 U13 T32 T22 T21 T20 T19 T18 T17 T16 T15 T14 T13 T8 T4 R28 R27 R18 R17 AA17 AA18 AA27 AA28 AB3 AB8 AB17 AB18 AC7 AC8 AC27 AD4 AD31 AE8 AE27 AE28 AE29 AK5 AK30 AL7 AL11 AL14 AL18 AL21 AL25 AL28 AM3 AM5 AM32 AP29
10U_0805_10V4Z
10U_0805_10V4Z
C98
22U_1206_10V4Z
C495
47U_B_6.3VM
+1.8VS
1
C162
C80
2
0.1U_0402_10V6K
+3VS
1
C158
2
0.1U_0402_10V6K
+1.5VS
+1.5VS_VDDP
1
C79
2
0.1U_0402_10V6K
+VCCP
1
+
C76
2
0.1U_0402_10V6K
C164
2
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
0.1U_0402_10V6K
1
C85
2
0.1U_0402_10V6K
1
C120
2
L16 FBM-L11-321611-260-LMT_1206
1 2
L22 KC FBM-L18-453215-900LMA90T_1812
0.1U_0402_10V6K
1
C90
2
0.1U_0402_10V6K
1
C75
2
1
C175
2
0.1U_0402_10V6K
1
C136
2
0.1U_0402_10V6K
12
1
C106
2
0.1U_0402_10V6K
1
C93
2
0.1U_0402_10V6K
1
2
0.1U_0402_10V6K
1
C176
2
0.1U_0402_10V6K
1
C95
2
0.1U_0402_10V6K
1
C100
2
1
C173
0.1U_0402_10V6K
2
1
C174
2
0.1U_0402_10V6K
+1.5VS_VDDP
+1.5VS_CORE
1
C105
2
0.1U_0402_10V6K
1
C114
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C141
2
0.1U_0402_10V6K
1
C88
2
0.1U_0402_10V6K
1
C119
2
1
C128
2
0.1U_0402_10V6K
1
C59
2
0.1U_0402_10V6K
1
C129
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
2
1
2
0.1U_0402_10V6K
1
C78
2
1
C159
2
1
C96
0.1U_0402_10V6K
2
1
2
0.1U_0402_10V6K
1
1
C52
2
+1.5VS_CORE
1
C77
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C74
2
1
C70
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C116
2
1
C104
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C107
2
1
C101
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C132
2
1
C103
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C115
2
4.7U_0805_10V4Z
1
1
+
C140
47U_B_6.3VM
A A
2
C97
2
4.7U_0805_10V4Z
C110
1
C135
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C144
2
1
C139
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C143
2
1
C133
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C145
2
1
C131
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C134
2
1
C146
2
0.1U_0402_10V6K
1
C108
2
0.1U_0402_10V6K
1
C102
2
0.1U_0402_10V6K
0.01U_0402_25V4Z
1
C109
2
1
2
1
C81
0.01U_0402_25V4Z
2
+2.5V
C204
150U_D2_6.3VM
1
+
C196
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C130
2
5
1
C152
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C161
2
1
C200
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C202
2
1
C179
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C180
2
1
1
C183
2
2
0.1U_0402_10V6K
4
0.1U_0402_10V6K
C171
1
C181
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C195
2
1
C185
2
0.1U_0402_10V6K
1
C155
2
0.1U_0402_10V6K
1
C182
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C142
2
3
1
C160
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C186
2
1
1
C201
0.1U_0402_10V6K
2
2
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2522
401318
星期五 二月
1
12 52, 18, 2005
of
Page 13
5
4
3
2
1
DDR_A_SMA[0..15]10 DDR_A_DM[0..7]10 DDR_A_D[0..63]10 DDR_A_DQS[0..7]10
D D
DDR_A_SCKE110
DDR_A_SCS1#10 DDR_A_SCS0#10 DDR_A_SWE#10 DDR_A_SCAS#10
C C
DDR_A_D12 DDR_A_D2 DDR_AD_D2
DDR_A_D0 DDR_A_D1 DDR_AD_D1 DDR_A_D5 DDR_AD_D5
DDR_A_D6 DDR_AD_D6 DDR_A_DQS0 DDR_AD_DQS0 DDR_A_DM0 DDR_AD_DM0
DDR_A_D15 DDR_A_D14 DDR_A_D11
DDR_A_DQS1
B B
System Memory Layout Topology
DATA/DQS/DM
NB
A A
ADD/CONTROL
NB
DDR_A_SMA[0..15]
DDR_A_DM[0..7]
DDR_A_D[0..63]
DDR_A_DQS[0..7]
DDR_A_SMA10 DDR_AD_MA10 DDR_A_SMA1 DDR_AD_MA1 DDR_A_SMA3 DDR_AD_MA3
DDR_A_SMA4 DDR_A_SMA5 DDR_A_SMA7 DDR_AD_MA7
RP20 10_0804_8P4R_5%
RP22 10_0804_8P4R_5%
RP21 10_0804_8P4R_5%
RP18 10_0804_8P4R_5%
RP19 10_0804_8P4R_5%
RP23 10_0804_8P4R_5%
18 27 36
DDR_AD_MA2DDR_A_SMA2
45
RP24 10_0804_8P4R_5%
DDR_A_SMA11 DDR_AD_MA11 DDR_A_SMA15 DDR_AD_MA15 DDR_A_SCKE1 DDR_AD_CKE1
DDR_A_SCS1# DDR_A_SCS0#
DDR_A_SCAS#
DDR_AD_D13DDR_A_D13
18
DDR_AD_D12
27 36
DDR_AD_D3DDR_A_D3
45
DDR_AD_D0
18 27 36
DDR_AD_D4DDR_A_D4
45
DDR_AD_D7DDR_A_D7
18 27 36 45
DDR_AD_D15
18
DDR_AD_D14
27
DDR_AD_D11
36
DDR_AD_D10
45
DDR_AD_DM1DDR_A_DM1
18
DDR_AD_DQS1
27
DDR_AD_D9DDR_A_D9
36
DDR_AD_D8DDR_A_D8
45
Rs
10R
DDR_AD_MA4
18
DDR_AD_MA5
27 36
DDR_AD_MA6DDR_A_SMA6
45
RP26 10_0804_8P4R_5%
RP11 10_0804_8P4R_5%
DDR_A_D25 DDR_A_D22
DDR_A_D23
DDR_A_DM2
DDR_A_DM3 DDR_A_DQS3
DDR_A_D30 DDR_AD_D30 DDR_A_D27
Rt
56R
DIMM0
Rt
Rs
33R
10R
DIMM0
5
18 27 36 45
DDR_AD_CS1#
18
DDR_AD_CS0#
27
DDR_AD_WE#DDR_A_SWE#
36
DDR_AD_CAS#
45
RP17 10_0804_8P4R_5%
RP15 10_0804_8P4R_5%
RP16 10_0804_8P4R_5%
RP14 10_0804_8P4R_5%
RP13 10_0804_8P4R_5%
+VTT
+VTT
DDR_A_SCKE010
DDR_A_SRAS#10
DDR_AD_D20DDR_A_D20
18
DDR_AD_D21DDR_A_D21
27
DDR_AD_D17DDR_A_D17
36
DDR_AD_D16DDR_A_D16
45
DDR_AD_D25
18
DDR_AD_D24DDR_A_D24
27
DDR_AD_D22
36
DDR_AD_D23
45
DDR_AD_D19DDR_A_D19
18
DDR_AD_D18DDR_A_D18
27
DDR_AD_DM2
36
DDR_AD_DQS2DDR_A_DQS2
45
DDR_AD_DM3
18
DDR_AD_DQS3
27
DDR_AD_D28DDR_A_D28
36
DDR_AD_D29DDR_A_D29
45
18
DDR_AD_D31DDR_A_D31
27
DDR_AD_D27
36
DDR_AD_D26DDR_A_D26
45
DDR_A_SMA8 DDR_A_SMA9 DDR_AD_MA9
DDR_A_SMA13 DDR_AD_MA13
RP25 10_0804_8P4R_5%
RP12 10_0804_8P4R_5%
RP9 10_0804_8P4R_5%
DDR_A_D35 DDR_AD_D35
RP10 10_0804_8P4R_5%
DDR_A_D33
RP8 10_0804_8P4R_5%
DDR_A_D38
RP7 10_0804_8P4R_5%
DDR_A_DM5 DDR_A_DQS5 DDR_AD_DQS5
RP6 10_0804_8P4R_5%
DDR_A_D47 DDR_AD_D47 DDR_A_D46 DDR_AD_D46
RP5 10_0804_8P4R_5%
DDR_A_D52 DDR_AD_D52 DDR_A_D49 DDR_AD_D49
RP4 10_0804_8P4R_5%
DDR_A_D50 DDR_A_DM6
DDR_A_DQS6
RP1 10_0804_8P4R_5%
DDR_A_D62
RP3 10_0804_8P4R_5%
DDR_A_D56
RP2 10_0804_8P4R_5%
DDR_A_D60
DDR_AD_MA8
18
DDR_AD_MA12DDR_A_SMA12
27 36
DDR_AD_CKE0DDR_A_SCKE0
45
DDR_AD_RAS#DDR_A_SRAS#
18
DDR_AD_MA14DDR_A_SMA14
27
DDR_AD_MA0DDR_A_SMA0
36 45
18
DDR_AD_D34DDR_A_D34
27
DDR_AD_DM4DDR_A_DM4
36
DDR_AD_DQS4DDR_A_DQS4
45
DDR_AD_D33
18
DDR_AD_D32DDR_A_D32
27
DDR_AD_D37DDR_A_D37
36
DDR_AD_D36DDR_A_D36
45
DDR_AD_D40DDR_A_D40
18
DDR_AD_D41DDR_A_D41
27
DDR_AD_D39DDR_A_D39
36
DDR_AD_D38
45
DDR_AD_DM5
18 27
DDR_AD_D45DDR_A_D45
36
DDR_AD_D44DDR_A_D44DDR_A_D10
45
18 27
DDR_AD_D42DDR_A_D42
36
DDR_AD_D43DDR_A_D43
45
DDR_AD_D53DDR_A_D53
18 27
DDR_AD_D48DDR_A_D48
36 45
DDR_AD_D50
18
DDR_AD_D51DDR_A_D51
27
DDR_AD_DM6
36
DDR_AD_DQS6
45
DDR_AD_D63DDR_A_D63
18
DDR_AD_D62
27
DDR_AD_D58DDR_A_D58
36
DDR_AD_D59DDR_A_D59
45
DDR_AD_D56
18
DDR_AD_D57DDR_A_D57
27
DDR_AD_D55DDR_A_D55
36
DDR_AD_D54DDR_A_D54 DDR_A_SMA0
45
DDR_AD_DM7DDR_A_DM7
18
DDR_AD_DQS7DDR_A_DQS7
27
DDR_AD_D61DDR_A_D61
36
DDR_AD_D60
45
Layout note
Place these resistor closely DIMM0, all trace length Max=0.75"
4
DDR_CLK016 DDR_CLK0#16
SMDATA14,16,26 SMCLK14,16,26
+2.5V +2.5V +2.5V +2.5V
DDR_AD_D0 DDR_AD_D1
DDR_AD_DQS0 DDR_AD_D2
DDR_AD_D3 DDR_AD_D8
DDR_AD_D9 DDR_AD_DQS1
DDR_AD_D10 DDR_AD_D11
DDR_AD_D16 DDR_AD_D17
DDR_AD_DQS2 DDR_AD_D18
DDR_AD_D19 DDR_AD_D24
DDR_AD_D25 DDR_AD_DQS3
DDR_AD_D26 DDR_AD_D27
DDR_AD_CKE1 DDR_AD_MA12
DDR_AD_MA9 DDR_AD_MA7
DDR_AD_MA5 DDR_AD_MA3 DDR_AD_MA1
DDR_AD_MA10 DDR_AD_MA13 DDR_AD_WE# DDR_AD_CS0# DDR_AD_MA15
DDR_AD_D32 DDR_AD_D33
DDR_AD_DQS4 DDR_AD_D34
DDR_AD_D35 DDR_AD_D40
DDR_AD_D41 DDR_AD_DQS5
DDR_AD_D42 DDR_AD_D43
DDR_AD_D48 DDR_AD_D49
DDR_AD_DQS6 DDR_AD_D50
DDR_AD_D51 DDR_AD_D56
DDR_AD_D57 DDR_AD_DQS7
DDR_AD_D58 DDR_AD_D59
+3VS
JDIM1
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
JAE_MM50-200B1-F1
Place Add/Command resisotrs
L
Close to Pin, max L = 300 mils
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
VREF
VSS DQ4 DQ5 VDD DM0 DQ6 VSS DQ7
DQ12
VDD
DQ13
DM1
VSS DQ14 DQ15
VDD
VDD
VSS
VSS
DQ20 DQ21
VDD
DM2 DQ22
VSS DQ23 DQ28
VDD DQ29
DM3
VSS DQ30 DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD
CKE0
DU/BA2
VSS
VDD
BA1
RAS# CAS#
VSS DQ36 DQ37
VDD
DM4 DQ38
VSS DQ39 DQ44
VDD DQ45
DM5
VSS DQ46 DQ47
VDD
CK1#
CK1
VSS DQ52 DQ53
VDD
DM6 DQ54
VSS DQ55 DQ60
VDD DQ61
DM7
VSS DQ62 DQ63
VDD
SA0
SA1
SA2
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100
A11
102
A8
104 106
A6
108
A4
110
A2
112
A0
114 116 118 120 122
S1#
124
DU
126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DU
DDRA_VREF
DDR_AD_D4 DDR_AD_D5
DDR_AD_DM0 DDR_AD_D6
DDR_AD_D7 DDR_AD_D12
DDR_AD_D13 DDR_AD_DM1
DDR_AD_D14 DDR_AD_D15
DDRA_VREF trace width of
L
20mils and space 20mils(min)
DDR_AD_D20 DDR_AD_D21
DDR_AD_DM2 DDR_AD_D22
DDR_AD_D23 DDR_AD_D28
DDR_AD_D29 DDR_AD_DM3
DDR_AD_D30 DDR_AD_D31
DDR_AD_CKE0 DDR_AD_MA11
DDR_AD_MA8 DDR_AD_MA6
DDR_AD_MA4 DDR_AD_MA2 DDR_AD_MA0
DDR_AD_MA14 DDR_AD_RAS# DDR_AD_CAS# DDR_AD_CS1#
DDR_AD_D36 DDR_AD_D37
DDR_AD_DM4 DDR_AD_D38
DDR_AD_D39 DDR_AD_D44
DDR_AD_D45 DDR_AD_DM5
DDR_AD_D46 DDR_AD_D47
DDR_AD_D52 DDR_AD_D53
DDR_AD_DM6 DDR_AD_D54
DDR_AD_D55 DDR_AD_D60
DDR_AD_D61 DDR_AD_DM7
DDR_AD_D62 DDR_AD_D63
2
2
1
2
1
DDR_CLK1# 16 DDR_CLK1 16
C267
C269
+1.25VS
+1.25VS
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
+1.25VS
1 8 2 7 3 6 4 5
56_0804_8P4R_5%
1 8 2 7 3 6 4 5
56_0804_8P4R_5%
1 8 2 7 3 6 4 5
56_0804_8P4R_5%
1 8 2 7 3 6 4 5
56_0804_8P4R_5%
1 8 2 7 3 6 4 5
56_0804_8P4R_5%
1 8 2 7 3 6 4 5
56_0804_8P4R_5%
1 8 2 7 3 6 4 5
56_0804_8P4R_5%
1 8 2 7 3 6 4 5
56_0804_8P4R_5%
1 8 2 7 3 6 4 5
56_0804_8P4R_5%
1 8 2 7 3 6 4 5
56_0804_8P4R_5%
+1.25VS
1 8 2 7 3 6 4 5
33_0804_8P4R_5%
1 8 2 7 3 6 4 5
33_0804_8P4R_5%
1 8 2 7 3 6 4 5
33_0804_8P4R_5%
1
RP30
RP28
RP34
RP46
RP43
RP36
RP33
RP52
RP50
RP49
RP37
RP40
RP38
DDR_AD_D50 DDR_AD_D51 DDR_AD_DM6 DDR_AD_DQS6
DDR_AD_DM7 DDR_AD_DQS7 DDR_AD_D61 DDR_AD_D60
DDR_AD_D40 DDR_AD_D41 DDR_AD_D39 DDR_AD_D38
DDR_AD_D19 DDR_AD_D18 DDR_AD_DM2 DDR_AD_DQS2
DDR_AD_D30 DDR_AD_D31 DDR_AD_D27 DDR_AD_D26
DDR_AD_D33 DDR_AD_D32 DDR_AD_D37 DDR_AD_D36
DDR_AD_DM5 DDR_AD_DQS5 DDR_AD_D45 DDR_AD_D44
DDR_AD_D0 DDR_AD_D1 DDR_AD_D5 DDR_AD_D4
DDR_AD_D13 DDR_AD_D12 DDR_AD_D2 DDR_AD_D3
DDR_AD_DM1 DDR_AD_DQS1 DDR_AD_D9 DDR_AD_D8
DDR_A_SWE# DDR_A_SCS0# DDR_A_SCS1# DDR_A_SCAS#
DDR_A_SMA3 DDR_A_SMA2 DDR_A_SMA7 DDR_A_SMA5
DDR_A_SRAS# DDR_A_SMA14
of
13 52, 18, 2005
12
0.1U_0402_10V6K
12
0.1U_0402_10V6K
DDR_AD_D53 DDR_AD_D52
R149
DDR_AD_D48 DDR_AD_D49
1K_0603_1%
DDR_AD_D63
R147
DDR_AD_D62 DDR_AD_D58
1K_0603_1%
DDR_AD_D59
DDR_AD_D56 DDR_AD_D57 DDR_AD_D55 DDR_AD_D54
DDR_AD_D20 DDR_AD_D21 DDR_AD_D17 DDR_AD_D16
DDR_AD_DM3 DDR_AD_DQS3 DDR_AD_D28 DDR_AD_D29
DDR_AD_D35 DDR_AD_D34 DDR_AD_DM4 DDR_AD_DQS4
DDR_AD_D47 DDR_AD_D46 DDR_AD_D42 DDR_AD_D43
DDR_AD_D7 DDR_AD_D6 DDR_AD_DQS0 DDR_AD_DM0
DDR_AD_D25 DDR_AD_D24 DDR_AD_D22 DDR_AD_D23
DDR_AD_D15 DDR_AD_D14 DDR_AD_D11 DDR_AD_D10
DDR_A_SMA9 DDR_A_SCKE0 DDR_A_SMA11 DDR_A_SCKE1
DDR_A_SMA10 DDR_A_SMA13 DDR_A_SMA15 DDR_A_SMA1
DDR_A_SMA4 DDR_A_SMA12 DDR_A_SMA8 DDR_A_SMA6
Title
Size Document Number Rev
Date: Sheet
星期五 二月
RP31
56_0804_8P4R_5%
RP27
56_0804_8P4R_5%
RP29
56_0804_8P4R_5%
RP47
56_0804_8P4R_5%
RP44
56_0804_8P4R_5%
RP35
56_0804_8P4R_5%
RP32
56_0804_8P4R_5%
RP51
56_0804_8P4R_5%
RP45
56_0804_8P4R_5%
RP48
56_0804_8P4R_5%
RP42
33_0804_8P4R_5%
RP39
33_0804_8P4R_5%
RP41
33_0804_8P4R_5%
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2522
401318
Page 14
5
4
3
2
1
DDR_B_SMA[0..15]10 DDR_B_DM[0..7]10 DDR_B_D[0..63]10 DDR_B_DQS[0..7]10
D D
DDR_B_SRAS#10
DDR_B_SCKE010
DDR_B_SCS0#10 DDR_B_SWE#10 DDR_B_SCAS#10 DDR_B_SCS1#10
C C
DDR_B_D3 DDR_B_DM0 DDR_BD_DM0
DDR_B_DQS0 DDR_BD_DQS0
DDR_B_D4 DDR_B_D5 DDR_B_D1 DDR_BD_D1 DDR_B_DQS4 DDR_BD_DQS4 DDR_B_D0
DDR_B_D11 DDR_B_D10 DDR_B_D14 DDR_BD_D14
DDR_B_DQS1 DDR_BD_DQS1
B B
A A
DDR_B_DM1 DDR_B_D12
DDR_B_D20 DDR_BD_D20 DDR_B_D21 DDR_BD_D21 DDR_B_D17 DDR_BD_D17 DDR_B_D16
DDR_B_D22 DDR_B_D23 DDR_B_DQS2 DDR_BD_DQS2 DDR_B_DM2
DDR_B_D25 DDR_BD_D25 DDR_B_D24 DDR_B_D19 DDR_BD_D19 DDR_B_D18 DDR_BD_D18 DDR_BD_D50DDR_B_D50
DDR_B_DM3 DDR_B_DQS3 DDR_BD_DQS3 DDR_B_D29
DDR_B_D31 DDR_BD_D31 DDR_B_D30 DDR_BD_D30 DDR_B_D27 DDR_B_D26
DDR_B_SMA[0..15] DDR_B_DM[0..7] DDR_B_D[0..63] DDR_B_DQS[0..7]
DDR_B_SMA14 DDR_B_SRAS# DDR_B_SMA13 DDR_B_SMA10
DDR_B_SMA8 DDR_BD_MA8 DDR_B_SCKE0 DDR_BD_CKE0
RP64 10_0804_8P4R_5%
RP67 10_0804_8P4R_5%
DDR_B_SMA0 DDR_BD_MA0 DDR_B_SMA1 DDR_B_SMA3
DDR_B_SCS0# DDR_BD_CS0# DDR_B_SWE# DDR_BD_WE# DDR_B_SCAS#
RP77 10_0804_8P4R_5%
18 27 36 45
RP78 10_0804_8P4R_5%
18 27 36 45
RP76 10_0804_8P4R_5%
18 27 36 45
RP74 10_0804_8P4R_5%
18 27 36 45
RP75 10_0804_8P4R_5%
18 27 36 45
RP73 10_0804_8P4R_5%
18 27 36 45
RP72 10_0804_8P4R_5%
18 27 36 45
RP71 10_0804_8P4R_5%
18 27 36 45
RP70 10_0804_8P4R_5%
18 27 36 45
RP69 10_0804_8P4R_5%
18 27 36 45
5
18 27 36 45
18 27 36 45
DDR_BD_D3 DDR_BD_D2DDR_B_D2
DDR_BD_D4 DDR_BD_D5
DDR_BD_D0
DDR_BD_D9DDR_B_D9 DDR_BD_D8DDR_B_D8 DDR_BD_D7DDR_B_D7 DDR_BD_D6DDR_B_D6
DDR_BD_D11 DDR_BD_D10
DDR_BD_D15DDR_B_D15
DDR_BD_DM1 DDR_BD_D13DDR_B_D13 DDR_BD_D12
DDR_BD_D16
DDR_BD_D22 DDR_BD_D23
DDR_BD_DM2
DDR_BD_D24
DDR_BD_DM3 DDR_BD_D29
DDR_BD_D28DDR_B_D28
DDR_BD_D27 DDR_BD_D26
DDR_BD_MA14 DDR_BD_RAS# DDR_BD_MA13 DDR_BD_MA10
DDR_BD_MA6DDR_B_SMA6 DDR_BD_MA11DDR_B_SMA11
RP65 10_0804_8P4R_5%
RP63 10_0804_8P4R_5%
18 27 36 45
18 27 36 45
DDR_B_SMA5 DDR_B_SMA7 DDR_BD_MA7 DDR_B_SMA15 DDR_BD_MA15
DDR_B_SMA9 DDR_B_SMA12 DDR_BD_MA12
DDR_B_SCKE110
DDR_BD_MA2DDR_B_SMA2 DDR_BD_MA1
DDR_BD_MA3
DDR_BD_CAS# DDR_BD_CS1#DDR_B_SCS1#
RP62 10_0804_8P4R_5%
DDR_B_D32 DDR_BD_D32 DDR_B_D33 DDR_B_D37 DDR_BD_D37 DDR_B_D36
RP61 10_0804_8P4R_5%
DDR_B_D39 DDR_BD_D39 DDR_B_D38
DDR_B_DM4 DDR_BD_DM4
RP60 10_0804_8P4R_5%
DDR_B_D41 DDR_B_D40 DDR_BD_D40 DDR_B_D35 DDR_BD_D35
RP58 10_0804_8P4R_5%
DDR_B_D43 DDR_B_D42 DDR_BD_D42 DDR_B_D46 DDR_BD_D46 DDR_B_D47
RP59 10_0804_8P4R_5%
DDR_B_DQS5 DDR_B_DM5 DDR_BD_DM5 DDR_B_D44 DDR_B_D45
RP57 10_0804_8P4R_5%
DDR_B_D49 DDR_BD_D49 DDR_B_D48 DDR_BD_D48 DDR_B_D52 DDR_B_D53
RP56 10_0804_8P4R_5%
DDR_B_D54 DDR_BD_D54 DDR_B_D55 DDR_B_DQS6 DDR_BD_DQS6 DDR_B_DM6 DDR_BD_DM6
RP55 10_0804_8P4R_5%
DDR_B_D51
RP53 10_0804_8P4R_5%
DDR_B_D59 DDR_BD_D59 DDR_B_D58 DDR_B_D62 DDR_BD_D62 DDR_B_D63 DDR_BD_D63
RP54 10_0804_8P4R_5%
DDR_B_DQS7 DDR_BD_DQS7 DDR_B_DM7 DDR_BD_DM7 DDR_B_D57 DDR_B_D56 DDR_BD_D56
DDR_B_SCKE1 DDR_BD_CKE1
18
DDR_BD_D33
27 36
DDR_BD_D36
45
18
DDR_BD_D38
27 36 45
DDR_BD_D41
18 27 36
DDR_BD_D34DDR_B_D34
45
DDR_BD_D43
18 27 36
DDR_BD_D47
45
DDR_BD_DQS5
18 27
DDR_BD_D44
36
DDR_BD_D45
45
18 27
DDR_BD_D52
36
DDR_BD_D53
45
18
DDR_BD_D55
27 36 45
DDR_BD_D60DDR_B_D60
18
DDR_BD_D61DDR_B_D61
27
DDR_BD_D51
36 45
18
DDR_BD_D58
27 36 45
18 27
DDR_BD_D57
36 45
RP66 10_0804_8P4R_5%
RP68 10_0804_8P4R_5%
4
DDR_BD_MA4DDR_B_SMA4
18
DDR_BD_MA5
27 36 45
DDR_BD_MA9
18 27 36 45
+1.25VS
+2.5V +2.5V +2.5V +2.5V
JDIM2
1
VREF
3
DDR_BD_D0 DDR_BD_D1
DDR_BD_DQS0 DDR_BD_D2
DDR_BD_D3 DDR_BD_D8
DDR_BD_D9 DDR_BD_DQS1
DDR_BD_D10 DDR_BD_D11
DDR_CLK316 DDR_CLK3#16
DDR_BD_D16 DDR_BD_D17
DDR_BD_DQS2 DDR_BD_D18
DDR_BD_D19 DDR_BD_D24
DDR_BD_D25 DDR_BD_DQS3
DDR_BD_D26 DDR_BD_D27
DDR_BD_CKE1 DDR_BD_MA12
DDR_BD_MA9 DDR_BD_MA7
DDR_BD_MA5 DDR_BD_MA3 DDR_BD_MA1
DDR_BD_MA10 DDR_BD_MA13 DDR_BD_WE# DDR_BD_CS0# DDR_BD_MA15
DDR_BD_D32 DDR_BD_D33
DDR_BD_DQS4 DDR_BD_D34
DDR_BD_D35 DDR_BD_D40
DDR_BD_D41 DDR_BD_DQS5
DDR_BD_D42 DDR_BD_D43
DDR_BD_D48 DDR_BD_D49
DDR_BD_DQS6 DDR_BD_D50
DDR_BD_D51 DDR_BD_D56
DDR_BD_D57 DDR_BD_DQS7
DDR_BD_D58 DDR_BD_D59
SMDATA13,16,26 SMCLK13,16,26
+3VS
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
JAE_MM50-200B1-F1R
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
VREF
VSS DQ4 DQ5 VDD DM0 DQ6
VSS DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14 DQ15
VDD VDD
VSS
VSS
DQ20 DQ21
VDD DM2
DQ22
VSS
DQ23 DQ28
VDD
DQ29
DM3
VSS
DQ30 DQ31
VDD
CB4
CB5
VSS DM8
CB6 VDD
CB7
DU/RESET#
VSS
VSS VDD VDD
CKE0
DU/BA2
VSS
VDD
BA1
RAS# CAS#
VSS
DQ36 DQ37
VDD DM4
DQ38
VSS
DQ39 DQ44
VDD
DQ45
DM5
VSS
DQ46 DQ47
VDD
CK1#
CK1
VSS
DQ52 DQ53
VDD DM6
DQ54
VSS
DQ55 DQ60
VDD
DQ61
DM7
VSS
DQ62 DQ63
VDD
SA0
SA1
SA2
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100
A11
102
A8
104 106
A6
108
A4
110
A2
112
A0
114 116 118 120 122
S1#
124
DU
126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DU
DDRB_VREF
DDR_BD_D4 DDR_BD_D5
DDR_BD_DM0 DDR_BD_D6
DDR_BD_D7 DDR_BD_D12
DDR_BD_D13 DDR_BD_DM1
DDR_BD_D14 DDR_BD_D15
DDRA_VREF trace width of
L
20mils and space 20mils(min)
DDR_BD_D20 DDR_BD_D21
DDR_BD_DM2 DDR_BD_D22
DDR_BD_D23 DDR_BD_D28
DDR_BD_D29 DDR_BD_DM3
DDR_BD_D30 DDR_BD_D31
DDR_BD_CKE0 DDR_BD_MA11
DDR_BD_MA8 DDR_BD_MA6
DDR_BD_MA4 DDR_BD_MA2 DDR_BD_MA0
DDR_BD_MA14 DDR_BD_RAS# DDR_BD_CAS# DDR_BD_CS1#
DDR_BD_D36 DDR_BD_D37
DDR_BD_DM4 DDR_BD_D38
DDR_BD_D39 DDR_BD_D44
DDR_BD_D45 DDR_BD_DM5
DDR_BD_D46 DDR_BD_D47
DDR_CLK4# 16
DDR_BD_D52 DDR_BD_D53
DDR_BD_DM6 DDR_BD_D54
DDR_BD_D55 DDR_BD_D60
DDR_BD_D61 DDR_BD_DM7
DDR_BD_D62 DDR_BD_D63
DDR_CLK4 16
+3VS
2
12
2
1
2
1
R428 1K_0603_1%
C697
0.1U_0402_10V6K
12
R434 1K_0603_1%
C694
0.1U_0402_10V6K
DDR_BD_D54 DDR_BD_D55 DDR_BD_DQS6 DDR_BD_DM6
56_0804_8P4R_5%
DDR_BD_DQS7 DDR_BD_DM7 DDR_BD_D57 DDR_BD_D56
56_0804_8P4R_5%
DDR_BD_D60 DDR_BD_D61 DDR_BD_D51 DDR_BD_D50
56_0804_8P4R_5%
DDR_BD_D20 DDR_BD_D21 DDR_BD_D17 DDR_BD_D16
56_0804_8P4R_5%
DDR_BD_D31 DDR_BD_D30 DDR_BD_D27 DDR_BD_D26
56_0804_8P4R_5%
DDR_BD_D39 DDR_BD_D38 DDR_BD_DQS4 DDR_BD_DM4
56_0804_8P4R_5%
DDR_BD_D43 DDR_BD_D42 DDR_BD_D46 DDR_BD_D47
56_0804_8P4R_5%
DDR_BD_D3 DDR_BD_D2 DDR_BD_DM0 DDR_BD_DQS0
56_0804_8P4R_5%
DDR_BD_D25 DDR_BD_D24 DDR_BD_D19 DDR_BD_D18
56_0804_8P4R_5%
DDR_BD_D11 DDR_BD_D10 DDR_BD_D14 DDR_BD_D15
56_0804_8P4R_5%
DDR_B_SMA14 DDR_B_SMA1 DDR_B_SMA0 DDR_B_SMA3
33_0804_8P4R_5%
DDR_B_SMA13 DDR_B_SRAS# DDR_B_SMA10 DDR_B_SMA2
33_0804_8P4R_5%
DDR_B_SMA6 DDR_B_SMA11 DDR_B_SCKE0 DDR_B_SMA9
33_0804_8P4R_5%
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2522
401318
星期五 二月
RP118
RP120
RP119
RP107
RP111
RP113
RP116
RP103
RP109
RP106
RP81
RP80
RP83
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
+1.25VS
1 8 2 7 3 6 4 5
56_0804_8P4R_5%
1 8 2 7 3 6 4 5
56_0804_8P4R_5%
1 8 2 7 3 6 4 5
56_0804_8P4R_5%
1 8 2 7 3 6 4 5
56_0804_8P4R_5%
1 8 2 7 3 6 4 5
56_0804_8P4R_5%
1 8 2 7 3 6 4 5
56_0804_8P4R_5%
1 8 2 7 3 6 4 5
56_0804_8P4R_5%
1 8 2 7 3 6 4 5
56_0804_8P4R_5%
1 8 2 7 3 6 4 5
56_0804_8P4R_5%
1 8 2 7 3 6 4 5
56_0804_8P4R_5%
+1.25VS+1.25VS
1 8 2 7 3 6 4 5
33_0804_8P4R_5%
1 8 2 7 3 6 4 5
33_0804_8P4R_5%
1 8 2 7 3 6 4 5
33_0804_8P4R_5%
1
RP117
RP121
RP112
RP108
RP110
RP114
RP115
RP102
RP105
RP104
RP79
RP82
RP84
DDR_BD_D49 DDR_BD_D48 DDR_BD_D52 DDR_BD_D53
DDR_BD_D59 DDR_BD_D58 DDR_BD_D62 DDR_BD_D63
DDR_BD_D32 DDR_BD_D33 DDR_BD_D37 DDR_BD_D36
DDR_BD_D22 DDR_BD_D23 DDR_BD_DQS2 DDR_BD_DM2
DDR_BD_DM3 DDR_BD_DQS3 DDR_BD_D29 DDR_BD_D28
DDR_BD_D41 DDR_BD_D40 DDR_BD_D35 DDR_BD_D34
DDR_BD_DQS5 DDR_BD_DM5 DDR_BD_D44 DDR_BD_D45
DDR_BD_D4 DDR_BD_D5 DDR_BD_D1 DDR_BD_D0
DDR_BD_DQS1 DDR_BD_DM1 DDR_BD_D13 DDR_BD_D12
DDR_BD_D9 DDR_BD_D8 DDR_BD_D7 DDR_BD_D6
DDR_B_SCS0# DDR_B_SWE# DDR_B_SCAS# DDR_B_SCS1#
DDR_B_SMA4 DDR_B_SMA5 DDR_B_SMA7 DDR_B_SMA8
DDR_B_SMA12 DDR_B_SMA15 DDR_B_SCKE1
of
14 52, 18, 2005
Page 15
5
4
3
2
1
Layout note :
Distribute as close as possible to DDR-SODIMM0.
Layout note :
Distribute as close as possible to DDR-SODIMM1.
+2.5V +2.5V
D D
C C
1
+
C268 220U_D2_4VM
2
1
C260
0.1U_0402_10V6K
2
+1.25VS
1
C277
0.1U_0402_10V6K
2
1
C258
0.1U_0402_10V6K
2
1
C253
0.1U_0402_10V6K
2
1
C256
0.1U_0402_10V6K
2
1
C254
0.1U_0402_10V6K
2
Layout note :
Place one cap close to every 2 pull up resistors termination to +1.25VS
1
C297
0.1U_0402_10V6K
2
1
C283
0.1U_0402_10V6K
2
1
C266
0.1U_0402_10V6K
2
1
C255
0.1U_0402_10V6K
2
1
C298
0.1U_0402_10V6K
2
1
C264
0.1U_0402_10V6K
2
1
C251
0.1U_0402_10V6K
2
1
C282
0.1U_0402_10V6K
2
1
C250
0.1U_0402_10V6K
2
1
C263
0.1U_0402_10V6K
2
1
C275
0.1U_0402_10V6K
2
1
C257
0.1U_0402_10V6K
2
1
C265
0.1U_0402_10V6K
2
1
C294
0.1U_0402_10V6K
2
1
C252
0.1U_0402_10V6K
2
1
C261
0.1U_0402_10V6K
2
1
C288
0.1U_0402_10V6K
2
1
C262
0.1U_0402_10V6K
2
1
C259
0.1U_0402_10V6K
2
1
C280
0.1U_0402_10V6K
2
1
2
1
2
1
C291
0.1U_0402_10V6K
2
+
C244 220U_D2_4VM
C315
0.1U_0402_10V6K
1
C316
0.1U_0402_10V6K
2
1
C312
0.1U_0402_10V6K
2
1
C318
0.1U_0402_10V6K
2
1
C311
0.1U_0402_10V6K
2
1
C308
0.1U_0402_10V6K
2
1
C324
0.1U_0402_10V6K
2
1
C314
0.1U_0402_10V6K
2
1
C310
0.1U_0402_10V6K
2
1
C307
0.1U_0402_10V6K
2
1
C309
0.1U_0402_10V6K
2
1
C319
0.1U_0402_10V6K
2
1
C323
0.1U_0402_10V6K
2
1
C313
0.1U_0402_10V6K
2
1
C332
0.1U_0402_10V6K
2
0.1U_0402_10V6K
1
C325
2
0.1U_0402_10V6K
1
C317
2
+1.25VS
1
C279
0.1U_0402_10V6K
2
1
C286
0.1U_0402_10V6K
2
1
C281
0.1U_0402_10V6K
2
1
C299
0.1U_0402_10V6K
2
1
C329
0.1U_0402_10V6K
2
1
C734
0.1U_0402_10V6K
2
1
C719
0.1U_0402_10V6K
2
1
C722
0.1U_0402_10V6K
2
1
C723
0.1U_0402_10V6K
2
+1.25VS
B B
1
C721
0.1U_0402_10V6K
2
1
C328
0.1U_0402_10V6K
2
1
C293
0.1U_0402_10V6K
2
1
C326
0.1U_0402_10V6K
2
+1.25VS
1
C292
0.1U_0402_10V6K
2
1
C718
0.1U_0402_10V6K
2
1
C290
0.1U_0402_10V6K
2
1
C289
0.1U_0402_10V6K
2
1
C729
0.1U_0402_10V6K
2
1
C285
0.1U_0402_10V6K
2
1
C726
0.1U_0402_10V6K
2
+1.25VS
1
C731
0.1U_0402_10V6K
2
A A
+1.25VS
1
C284
0.1U_0402_10V6K
2
1
C732
0.1U_0402_10V6K
2
1
C296
0.1U_0402_10V6K
2
5
1
C735
0.1U_0402_10V6K
2
1
C300
0.1U_0402_10V6K
2
1
C287
0.1U_0402_10V6K
2
1
C295
0.1U_0402_10V6K
2
1
C736
0.1U_0402_10V6K
2
1
C278
0.1U_0402_10V6K
2
4
1
C331
0.1U_0402_10V6K
2
1
C276
0.1U_0402_10V6K
2
1
C330
0.1U_0402_10V6K
2
1
C327
0.1U_0402_10V6K
2
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2522
401318
星期五 二月
of
1
15 52, 18, 2005
Page 16
5
4
3
2
1
+3VS_CLK
29
13
19
30
48
VDDSD
VDDAGP
GNDREF
GNDPCI
5
18
VDD48M
GNDPCI
24
25
9
1
VDDPCI
VDDPCI
VDDREF
FS3/PCICLK_F0 FS4/PCICLK_F1
GNDSD
GND48M
GNDAGP
46
41
33
VDDXTAL
SDRAMOUT
GNDCPU
ICS951402AGT_TSSOP48
XIN
XOUT
SCLK SDATA
VTTPWRGD/PD# CPU_STP# PCI_STOP# 24/48#SEL PCI33/66#SEL
48MHz_1 48MHz_0
FS2/REF2 FS1/REF1 FS0/REF0
IREF
FS1 FS0 FS2 FS3 FS4 PCI33/66#
42
VDDCPU
GNDXTAL
8
D D
14.31818MHZ_20P_6X1430004201
SMCLK13,14,26 SMDATA13,14,26
VTT_PWRGD26,28 PM_STPCPU#6,9,25,48 PCI_STP#25
C C
B B
REFCLK1_NB9 CLK_14M_CODEC35 CLK_SB_14M26
CLK_14M_SIO38
C644
2.2P_0402_50V8C
1 2
12
Y3
1 2
C645
2.2P_0402_50V8C
R363 0_0402_5%
1 2
R369 0_0402_5%
1 2
R385 10K_0402_5%
1 2
1 2
T30 PAD
R364 20_0402_5%
1 2
R12 33_0402_5%
1 2
R358 33_0402_5%
1 2
1 2
R603 33_0402_5%@
+3VS
R600
10K_0402_5%
VTT_PWRGD
2
G
2N7002_SOT23
@
12
13
D
S
XTALIN_CLK
12
R354
@
10K_0402_5%
XTALOUT_CLK
R386
Q35
VTT_PWRGD
PCI33/66#
10K_0402_5%@
CLK_48M
CLK_IREF
R372 475_0402_1%
1 2
CLKEN# 48
U29
6
7
35 34
10 45 12 26 11
27 28
FS2
4
FS1
3
FS0
2
38
+3VS_CLK
12
12
12
R345
CPU_BSEL17,11 CPU_BSEL07,11
A A
FS4 With Spread Enabled…
0 0 0 1 0 0 0 0 0 1
**
0 0 0 0 0
CLOCK FREQUENCY SELECT TABLE
FS1 MEMFS2
FS3 FS0
5
CPU
200 133 100
21
D16 CH751H-40_SC76
21
D15 CH751H-40_SC76
200
*
133
Spreaf OFF OR Center spread +/-0.3%
100
10K_0402_5%
R343
10K_0402_5%
12
R346
4.7K_0402_5%
A-LINK FREQ
**
4
+3VS_VDDA
36
VDDA
37
VSSA
40
CPUT0
39
CPUC0
44
CPUT1
43
CPUC1
47 32
AGPCLK0
31
AGPCLK1
14 15
16
PCICLK0
17
PCICLK1
20
PCICLK2
21
PCICLK3
22
PCICLK4
23
PCICLK5
12
R350
@
12
R344
R342
4.7K_0402_5%
PCI33/66# = HIGH
Note:
0 = PULL LOW 1 = PULL HIGH
VSSA
CLK_CPU_CLK
CLK_CPU_CLK# CLK_NB
CLK_NB# MEM_66M AGP_66M
AGP_EXT_66M FS3
FS4
12
@
10K_0402_5%
12
10K_0402_5%
66MHZ
33MHZPCI33/66# = LOW
1 2
R367 33_0402_5%
1 2
R370 33_0402_5%
1 2
R356 33_0402_5%
1 2
R360 33_0402_5%
1 2
R352 33_0402_5% R374 33_0402_5%
1 2
R377 33_0402_5%
1 2
R373 33_0402_5%
1 2
POP For 150G DEPOP For 150A
+3VS_CLK
12
12
R348
R347
@
10K_0402_5%
10K_0402_5%
12
12
R339
R340
10K_0402_5%
@
10K_0402_5%
+3VS +3VS_CLK
1
C649
2
10U_0805_10V4Z
C303
VSSA
100P_0402_25V8K
0.1U_0402_10V6K
C661
0.1U_0402_10V6K
1
2
R368
1 2
49.9_0402_1%
1 2
R371 49.9_0402_1%
R357
1 2
49.9_0402_1%
1 2
R361 49.9_0402_1%
CLK_CPU_BCLK 6
CLK_CPU_BCLK# 6 CLK_NB_BCLK 9
CLK_NB_BCLK# 9 CLK_MEM_66M 9 CLK_AGP_66M 9
CLK_AGP_EXT_66M 17 CLK_ALINK_SB 25
1 2
L37 CHB2012U121_0805
+3VS +3VS_VDDA
1 2
L41 CHB2012U121_0805
CLK.BUFFER
1
C243
AVDD
VDD2.5
2
C223
2
0.1U_0402_10V6K
110_0402_5%
0.1U_0402_10V6K
+2.5VS
12
L26 CHB2012U121_0805
AVDD
R349
10K_0402_5%
R341
10K_0402_5%
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1
C220
0.1U_0402_10V6K
2
MEMA_CLK010
MEMA_CLK0#10
SMCLK13,14,26 SMDATA13,14,26
R134
1 2
R141 1.5K_0402_5%
1 2
R142 2.2K_0402_5%
1 2
Width=40 mils
1
1
C662
2
2
0.1U_0402_10V6K
1
C675
C673
2
10U_0805_10V4Z
0.1U_0402_10V6K
1
C242
2
16
4 12 15 21 28 33 37 45
35 36
13 14
32 34
1
9 18 24 25 31 40 48
17
0.1U_0402_10V6K
1
C657
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C668
2
0.1U_0402_10V6K
1
C646
2
1
C272
2
0.1U_0402_10V6K
C648
0.1U_0402_10V6K
1
C301
2
1
C663
2
100P_0402_25V8K
1
2
100P_0402_25V8K
2200P_0402_25V7K
1
1
C651
2
2
2200P_0402_25V7K
1
C271
2
C664
100P_0402_25V8K
C270
VDD2.5
0.1U_0402_10V6K
1
1
C219
C221
2
2
0.1U_0402_10V6K
U10
ICS9P750_TSSOP48
AVDD VDD
VDD VDD VDD VDD VDD VDD VDD
SCLK SDATA
CLK_INT CLK_INC
RSTEP RSPO
GND GND GND GND GND GND GND GND
AGND
ICS9P750-T_TSSOP48
POWER
GROUND
Title
Size Document Number Rev
Date: Sheet
星期五 二月
1
1
C222
2
2
0.1U_0402_10V6K
DDRT0 DDRC0
DDRT1 DDRC1
DDRT2 DDRC2
DDRT3 DDRC3
DDRT4 DDRC4
DDRT5 DDRC5
DDRT6 DDRC6
DDRT7
Differential pair output
DDRC7 DDRT8
DDRC8 DDRT9
DDRC9
DDRT10
DDRC10
DDRT11
DDRC11
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2522 401318
3 2
5 6
11 10
20 19
22 23
8 7
44 43
38 39
29 30
27 26
47 46
42 41
1 2
L25 CHB2012U121_0805
1
C224 22U_1206_10V4Z
2
1
2200P_0402_25V7K
1
C647
2
1
2
+2.5VS
DDR_CLK0 13 DDR_CLK0# 13
DDR_CLK1 13 DDR_CLK1# 13
DDR_CLK3 14 DDR_CLK3# 14
DDR_CLK4 14 DDR_CLK4# 14
of
16 52, 18, 2005
1
2
Page 17
5
AGP_AD[0..31]11
AGP_SBA[0..7]11
AGP_C/BE#[0..3]11
AGP_ST[0..2]11
D D
C504 10P_0402_50V8J@
+3VS
1 2
R270 10K_0402_5%@
C C
(Closed to pin M26)
B B
+AGPVREF11
+1.5VS
AGP_SUS_STAT#26
A A
+1.5VS
AGP_AD[0..31]
AGP_SBA[0..7]
AGP_C/BE#[0..3]
AGP_ST[0..2]
CLK_AGP_EXT_66M
1 2
12
R276 18_0402_5%@
AGP_STOP#
CLK_AGP_EXT_66M16
NB_RST#9,26 AGP_REQ#11 AGP_GNT#11 AGP_PAR11 AGP_STOP#11 AGP_DEVSEL#11 AGP_TRDY#11 AGP_IRDY#11 AGP_FRAME#11 PCI_PIRQA#11,25,31
AGP_WBF#11 AGP_STP#26
AGP_BUSY#26 AGP_RBF#11 AGP_ADSTB011 AGP_ADSTB111 AGP_ADSTB0#11 AGP_ADSTB1#11
C553
0.1U_0402_16V4Z
If M10+P POP 47_0603_1%
VGA_DMINUS20 VGA_DPLUS20
C/R_VGA24 Y/G_VGA24 COMP/B_VGA24
DDC3CLK20 DDC3DATA20
R285 R283
AGP_DBI_HI AGP_DBI_LO
AGP_SBSTB11 AGP_SBSTB#11
1 2
1 2
R293 47_0603_1%
OSC_OUT XTALIN
1 2
1K_0402_5%@
1 2
1K_0402_5% @
5
AGP_AD0 AGP_AD1 AGP_AD2 AGP_AD3 AGP_AD4 AGP_AD5 AGP_AD6 AGP_AD7 AGP_AD8 AGP_AD9 AGP_AD10 AGP_AD11 AGP_AD12 AGP_AD13 AGP_AD14 AGP_AD15 AGP_AD16 AGP_AD17 AGP_AD18 AGP_AD19 AGP_AD20 AGP_AD21 AGP_AD22 AGP_AD23 AGP_AD24 AGP_AD25 AGP_AD26 AGP_AD27 AGP_AD28 AGP_AD29 AGP_AD30 AGP_AD31
AGP_C/BE#0 AGP_C/BE#1 AGP_C/BE#2 AGP_C/BE#3
CLK_AGP_EXT_66M
NB_RST# AGP_REQ# AGP_GNT# AGP_PAR AGP_STOP# AGP_DEVSEL# AGP_TRDY# AGP_IRDY# AGP_FRAME#
AGP_STP# AGP_BUSY# AGP_RBF# AGP_ADSTB0 AGP_ADSTB1 AGP_ADSTB0# AGP_ADSTB1#
AGP_SBA0 AGP_SBA1 AGP_SBA2 AGP_SBA3 AGP_SBA4 AGP_SBA5 AGP_SBA6 AGP_SBA7
AGP_ST0 AGP_ST1 AGP_ST2
AGP_SBSTB AGP_SBSTB#
(25mil) (15mil)
AGP_DBI_HI AGP_DBI_LO
AGP8X_DET#
(15mil)
DAC2_RSET
12
C/R_VGA Y/G_VGA COMP/B_VGA
SSIN
12
SSOUT
12 12
12
AGP_DBI_HI 11 AGP_DBI_LO 11
+1.5VS_AGP
R42 715_0603_1%
R33 10K_0402_5% R258 10K_0402_5%
R260 0_0402_5%
R259 1K_0402_5%
CONNECT DBI_LO/DBI_HI TO AGP CONN FOR AGP 3.0 OR TO VDDP FOR AGP 2.0
W26 W25
AA26 AA25 AA27
AG30 AG28 AF28 AD26
M25
W29 W28
AE26 AC26 AH30
AH29 AE29
M28 M29
AD28 AD29 AC28 AC29 AA28 AA29
AF29 AD27 AE28
AB29 AB28
M26 M27
AB25 AB26
AC25 AE11
AF11 AK21
AJ23 AJ22
AK22
AJ24
AK24 AG23
AG24 AK25
AJ25
AH28
AJ29
AH27 AG26
H29 H28
J29
J28 K29 K28
L29
L28 N28 P29 P28 R29 R28 T29 T28 U29 N25 R26 P25 R27 R25 T25 T26 U25 V27
Y26 Y25
N29 U28 P26 U26
N26 V29 V28
V25 V26
Y28 Y29
U7A
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE#0 C/BE#1 C/BE#2 C/BE#3
PCICLK RST# REQ# GNT# PAR STOP# DEVSEL# TRDY# IRDY# FRAME# INTA#
WBF# STP_AGP#
AGP_BUSY# RBF# AD_STBF_0 AD_STBF_1 AD_STBS_0 AD_STBS_1
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
ST0 ST1 ST2
SB_STBF SB_STBS
AGPREF AGPTEST
DBI_HI DBI_LO
AGP8X_DET# DMINUS
DPLUS R2SET
C_R Y_G COMP_B H2SYNC V2SYNC
DDC3CLK DDC3DATA
SSIN SSOUT
XTALIN XTALOUT
TESTEN SUS_STAT#
M11-P_BGA708
+3VS
M11-P (1/6)
PCI/AGPAGP8X
THRM
DAC2
SSC CLK
R282 10K_0402_5%@
1 2
1 2
R281 0_0402_5%
4
STRAP_G
AJ5
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8
GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16
VREFG/(NC)
ROMCS#
ZV_LCDDATA0 ZV_LCDDATA1 ZV_LCDDATA2 ZV_LCDDATA3 ZV_LCDDATA4 ZV_LCDDATA5 ZV_LCDDATA6 ZV_LCDDATA7 ZV_LCDDATA8
ZV_LCDDATA9 ZV_LCDDATA10 ZV_LCDDATA11 ZV_LCDDATA12 ZV_LCDDATA13 ZV_LCDDATA14 ZV_LCDDATA15 ZV_LCDDATA16 ZV_LCDDATA17 ZV_LCDDATA18 ZV_LCDDATA19
ZV PORT / EXT TMDS / GPIO / ROMLVDSTMDSDAC1
ZV_LCDDATA20 ZV_LCDDATA21 ZV_LCDDATA22 ZV_LCDDATA23
ZV_LCDCNTL0 ZV_LCDCNTL1 ZV_LCDCNTL2 ZV_LCDCNTL3
DVOMODE
TXOUT_L0N TXOUT_L0P TXOUT_L1N TXOUT_L1P TXOUT_L2N TXOUT_L2P TXOUT_L3N TXOUT_L3P
TXCLK_LN
TXCLK_LP
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P
TXCLK_UN TXCLK_UP
DIGON
BLON/(BLON#)
TX0M
TX0P
TX1M
TX1P
TX2M
TX2P TXCM TXCP
DDC2CLK
DDC2DATA
HPD1
HSYNC
VSYNC
RSET
DDC1DATA
DDC1CLK
AUXWIN
TEST_MCLK/(NC)
TEST_YCLK/(NC)
PLLTEST/(NC)
RSTB_MSK/(NC)
AGP8X_DET# 0: AGP 3.0 8X. Signal input must be 0V. 1: AGP 2.0 4X. Signal input must be 3.3V.
AGP8X_DET#
4
STRAP_H
AH5
STRAP_J
AJ4
STRAP_K
AK4
STRAP_D
AH4
STRAP_E
AF4
STRAP_F
AJ3
STRAP_B
AK3
STRAP_A
AH3
STRAP_O
AJ2
GPIO10
AH2
STRAP_L
AH1
STRAP_M
AG3
STRAP_N
AG1
M_SEN#
AG2
POW_SW
AF3
OSC_SPREAD
AF2
VREFG
DVPDATA_0 DVPDATA_1 DVPDATA_2
LCDP_DAT LCDP_CLK
DVOMODE
ENVDD BACKLITE_ON
R275
R280 100K_0402_5%
1 2
VGA_RED VGA_GRN VGA_BLU HSYNC_VGA VSYNC_VGA AGP_RSET VGA_DAT VGA_CLK AUXWIN
1 2
R273 1K_0402_5%
(25 mil)
4.7K_0402_5%
1 2
R278 0_0402_5%
1 2
10K_0402_5%@
R43 499_0603_1%
AGP8X_DET# 11
AG4 AF5 AH6
AJ6 AK6 AH7 AK7 AJ7 AH8 AJ8 AH9 AJ9 AK9 AH10 AE6 AG6 AF6 AE7 AF7 AE8 AG8 AF8 AE9 AF9 AG10 AF10
AJ10 AK10 AJ11 AH11
AE10 AK16
AH16 AH17 AJ16 AH18 AJ17 AK19 AH19 AK18 AJ18 AG16 AF16 AG17 AF17 AF18 AE18 AH20 AG20 AF19 AG19 AE12 AG12
AJ13 AH14 AJ14 AH15 AJ15 AK15 AH13 AK13
AE13 AE14
AF12 AK27
AJ27
G
AJ26
B
AG25 AH25 AH26 AF25 AF24 AF26
B6 E8 AE25 AG29
3
R50
10K_0402_5%@
1 2
MSEN# 24,37
1 2
R264 1K_0603_1%
1 2
R271 1K_0603_1%
Support Multi-Memory size
+3VS
+3VS
+3VS
12
12
R279
1 2
R272
4.7K_0402_5%
LVDSA0- 23 LVDSA0+ 23 LVDSA1- 23 LVDSA1+ 23 LVDSA2- 23 LVDSA2+ 23
LVDSAC- 23 LVDSAC+ 23 LVDSB0- 23 LVDSB0+ 23 LVDSB1- 23 LVDSB1+ 23 LVDSB2- 23 LVDSB2+ 23
LVDSBC- 23 LVDSBC+ 23 ENVDD 23 BACKLITE_ON 23,37
(15mil)
LCDP_DAT 23 LCDP_CLK 23
3
Memory Config. GPIO10=Hinh, 128MB GPIO10=Low, 64MB
+3VS
R49
10K_0402_5%
POW_SW
10K_0402_5%
VGA_RED 24 VGA_GRN 24 VGA_BLU 24 HSYNC_VGA 24 VSYNC_VGA 24
VGA_DDCDAT 24 VGA_DDCCLK 24 AUXWIN 20
1 2 12
R44
SST Ratio Selection Table For CY25819
Input Freq. Range
16~20MHz 20~24MHz 24~28MHz 28~32MHz
2
THIS SHEET OF ENG INEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
GPIO8
GPIO7
GPIO4
GPIO5
GPIO6
GPIO0
GPIO1
GPIO2
GPIO3
GPIO9
GPIO11
GPIO12
GPIO13
+3VS
0.1U_0402_10V6K
1
C42
5
P
A2Y
G
U5 NC7SZ04P5X_SC70-5
3
2
4
POWER_SEL 46
DVPDATA_0
0
0
Divider Circuit for 1.2Vdc XTALIN from 3.3Vdc OSC out
3.3V OSC out for CY25819SCT
C484 27P_0402_50V8J
1 2
+3VS
R230 10K_0402_5%
OSC_SPREAD
1 2
4 1
U17
1 2 3
CY25819SCT_SO8
Y1
27MHz_16PF_6P27000126
XIN/CLKIN VSS S0 SSCLK4REFCLK
GND IN
OUT GND
XOUT
VDD PD#
3 2
CLK Level
1.2V 365 221
Note: PLACE CLOSE TO U5 (VGA M11-P)
S0=1
-3.0%
-2.7%
S0=0
-2.2%
-1.9%
-1.8%-2.5%
-2.3%
-1.7%
2
1
ID_Disable
STRAP_A
VGA_Disable
STRAP_B
STRAP_D
STRAP_E
STRAP_F
STRAP_G
STRAP_H
STRAP_J
STRAP_K
STRAP_O
STRAP_L
STRAP_M
STRAP_N
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_1
00 2.5V Samsung 4MX32 x4Pcs (64MB) 1 2.5V Hynix 4MX32x4 Pcs (64MB) 01 2.5V Samsung 8Mx32x4 Pcs (128MB) 11 2.5V Hynix 8Mx32x4 Pcs (128MB) 00 1.8V Samsung 4MX32 x4Pcs (64MB) 1 1.8V Hynix 4MX32x4 Pcs (64MB) 01 1.8V Samsung 8Mx32x4 Pcs (128MB) 11 1.8V Hynix 8Mx32x4 Pcs (128MB)
8 7 6 5
S0=M
DownDown Down
R239 10K_0402_5%@
R45 10K_0402_5%@
R240 10K_0402_5%@
R277 10K_0402_5%@
R46 10K_0402_5%@
R36 10K_0402_5% R37 10K_0402_5%@
R242 10K_0402_5% R241 10K_0402_5%@
R41 10K_0402_5%@ R40 10K_0402_5%@
R38 10K_0402_5%@ R39 10K_0402_5%@
R47 10K_0402_5%@
R53 10K_0402_5%@
R274 10K_0402_5%@
R61 10K_0402_5% R243 10K_0402_5%@
R244 10K_0402_5%@ R35 10K_0402_5%
R34 10K_0402_5%@ R256 10K_0402_5%@
R255 10K_0402_5%@
DVPDATA_2
0 0 0 0 1 1 1 1
C485 27P_0402_50V8J
1 2
R246 261_0603_1%
1 2
Ra Rb
12
12
12
12
12
12 12
12 12
12 12
12 12
12
12
12
12
12 12
12 12
12 12
DESCRIPTION
1
C488
2
10U_0805_10V4Z
@
+3VS
1
C487
2
0.1U_0402_10V6K
1.2V OSC out for M24-P
OSC_OUT
12
R245 150_0603_1%
-0.7%
-0.6%
-0.6%
-0.5%
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2522
401318
星期五 二月
1
+3VS
of
17 52, 18, 2005
Page 18
5
4
3
2
1
MDA[63:0] 21 DQSA[7:0] 21
D D
C C
B B
M_CSA1#
Pop for Hynix
M_DIMA_0
R113 0_0402_5%
M_DIMA_1
R116 0_0402_5%
Pop for ELPIDA QS1 and QS5 cannot be swapped with other groups
A A
MAA[13:0] 21 DQMA#[7:0] 21
1 2
R115 0_0402_5%
1 2
1 2
MEMORY INTERFACE A
U7B
L25 L26 K25 K26
J26 H25 H26 G26 G30 D29 D28
E28
E29 G29 G28
F28 G25
F26
E26
F25
E24
F23
E23 D22
B29 C29 C25 C27
B28
B25 C26
B26
F17
E17 D16
F16
E15
F14
E14
F13 C17
B18
B17
B15 C13
B14 C14 C16
A13
A12 C12
B12 C10
C9
B9 B10 E13 E12 E10 F12 F11
E9
F9
F8
M11-P
DQA0
(2/6)
DQA1 DQA2 DQA3 DQA4 DQA5 DQA6 DQA7 DQA8 DQA9 DQA10 DQA11 DQA12 DQA13 DQA14 DQA15 DQA16 DQA17 DQA18 DQA19 DQA20 DQA21 DQA22 DQA23 DQA24 DQA25 DQA26 DQA27 DQA28 DQA29 DQA30 DQA31 DQA32 DQA33 DQA34 DQA35 DQA36 DQA37 DQA38 DQA39 DQA40 DQA41 DQA42 DQA43 DQA44 DQA45 DQA46 DQA47 DQA48 DQA49 DQA50 DQA51 DQA52 DQA53 DQA54 DQA55 DQA56 DQA57 DQA58 DQA59 DQA60 DQA61 DQA62 DQA63
M11-P_BGA708
AA0 AA1 AA2 AA3 AA4 AA5 AA6 AA7 AA8
AA9 AA10 AA11
AA12/(AA13) AA13/(AA12)
AA14/(NC)
DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7
QSA0 QSA1 QSA2 QSA3 QSA4 QSA5 QSA6 QSA7
RASA# CASA#
WEA#
CSA0#
MEMORY INTERFACE
A
CSA1#
CKEA
CLKA0
CLKA0#
CLKA1
CLKA1#
DIMA0 DIMA1
MVREFD
MVREFS/(NC)
1
C584
2
0.1U_0402_16V4Z
E22 B22 B23 B24 C23 C22 F22 F21 C21 A24 C24 A25 E21 B20 C19
J25 F29 E25 A27 F15 C15 C11 E11
J27 F30 F24 B27 E16 B16 B11 F10
A19 E18 E19 E20 F20 B19
B21 C20
C18 A18
D30 B13
B7 B8
12
R307 1K_0402_1%
12
R308 1K_0402_1%
MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63
CSA1# 21
DIMA_0 21
DIMA_1 21
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13
DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7
DQSA0 DQSA1 DQSA2 DQSA3 DQSA4 DQSA5 DQSA6 DQSA7
RASA# CASA# WEA# CSA0# M_CSA1# CKEA
CLKA0 CLKA0#
CLKA1 CLKA1#
M_DIMA_0 M_DIMA_1
MVREFD MVREFS
RASA# 21 CASA# 21 WEA# 21 CSA0# 21
CKEA 21
CLKA0 21 CLKA0# 21
CLKA1 21 CLKA1# 21
12
R114 10K_0402_5%
+2.5VS+2.5VS
12
R118
MVREFSMVREFD
C194
(25 mil)(25 mil)
1
2
0.1U_0402_16V4Z
1K_0603_1%
12
R119
1K_0603_1%
MDB[63:0] 22 DQSB[7:0] 22 MAB[13:0] 22 DQMB#[7:0] 22
MDB0 MDB1 MDB2 MDB3 MDB4 MDB5 MDB6 MDB7 MDB8 MDB9 MDB10 MDB11 MDB12 MDB13 MDB14 MDB15 MDB16 MDB17 MDB18 MDB19 MDB20 MDB21 MDB22 MDB23 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30 MDB31 MDB32 MDB33 MDB34 MDB35 MDB36 MDB37 MDB38 MDB39 MDB40 MDB41 MDB42 MDB43 MDB44 MDB45 MDB46 MDB47 MDB48 MDB49 MDB50 MDB51 MDB52 MDB53 MDB54 MDB55 MDB56 MDB57 MDB58 MDB59 MDB60 MDB61 MDB62 MDB63
M_CSB1#
Pop for Hynix
M_DIMB_0
M_DIMB_1
Pop for ELPIDA QS1 and QS5 can no t b e s wapped with other groups
MEMORY INTERFACE B
U7C
M11-P
D7
DQB0
F7
(3/6)
DQB1
E7
DQB2
G6
DQB3
G5
DQB4
F5
DQB5
E5
DQB6
C4
DQB7
B5
DQB8
C5
DQB9
A4
DQB10
B4
DQB11
C2
DQB12
D3
DQB13
D1
DQB14
D2
DQB15
G4
DQB16
H6
DQB17
H5
DQB18
J6
DQB19
K5
DQB20
K4
DQB21
L6
DQB22
L5
DQB23
G2
DQB24
F3
DQB25
H2
DQB26
E2
DQB27
F2
DQB28
J3
DQB29
F1
DQB30
H3
DQB31
U6
DQB32
U5
DQB33
U3
DQB34
V6
DQB35
W5
DQB36
W4
DQB37
Y6
DQB38
Y5
DQB39
U2
DQB40
V2
DQB41
V1
DQB42
V3
DQB43
W3
DQB44
Y2
DQB45
Y3
DQB46
AA2
DQB47
AA6
DQB48
AA5
DQB49
AB6
DQB50
AB5
DQB51
AD6
DQB52
AD5
DQB53
AE5
DQB54
AE4
DQB55
AB2
DQB56
AB3
DQB57
AC2
DQB58
AC3
DQB59
AD3
DQB60
AE1
DQB61
AE2
DQB62
AE3
DQB63
M11-P_BGA708
1 2
R286 0_0402_5%
1 2
R301 0_0402_5%
1 2
R284 0_0402_5%
AB0 AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8
AB9 AB10 AB11
AB12/(AB13) AB13/(AB12)
AB14/(NC)
DQMB#0 DQMB#1 DQMB#2 DQMB#3 DQMB#4 DQMB#5 DQMB#6 DQMB#7
QSB0 QSB1 QSB2 QSB3 QSB4 QSB5 QSB6
QSB7 RASB# CASB#
MEMORY INTERFACE B
WEB# CSB0# CSB1#
CKEB
CLKB0
CLKB0#
CLKB1
CLKB1#
MEMVMODE0 MEMVMODE1
DIMB0
DIMB1
MEMTEST
CSB1# 22
DIMB_0 22
DIMB_1 22
N5 M1 M3 L3 L2 M2 M5 P6 N3 K2 K3 J2 P5 P3 P2
E6 B2 J5 G3 W6 W2 AC6 AD2
F6 B3 K6 G1 V5 W1 AC5 AD1
R2 T5 T6 R5 R6 R3 N1
N2 T2
T3
C6 C7
E3 AA3
(15mil)
C8
R120
47_0603_1%
MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13
DQMB#0 DQMB#1 DQMB#2 DQMB#3 DQMB#4 DQMB#5 DQMB#6 DQMB#7
DQSB0 DQSB1 DQSB2 DQSB3 DQSB4 DQSB5 DQSB6 DQSB7
RASB# CASB# WEB# CSB0#
M_CSB1#
CKEB CLKB0
CLKB0# CLKB1
CLKB1#
M_DIMB_0 M_DIMB_1
RASB# 22 CASB# 22 WEB# 22 CSB0# 22
CLKB0 22 CLKB0# 22
CLKB1 22 CLKB1# 22
12
R303
4.7K_0402_5%
1 2
MEM IO Voltage Selection
MEMVMODE0 MEMVMODE1
12
R304 4.7K_0402_5%
1 2 1 2
R309 4.7K_0402_5%@
12
R302
@
4.7K_0402_5%
2.5V VDDR1
HI
LOW
R291 10K_0402_5%
1.8V VDDR1(ELPIDA)
CKEB 22
C596
LOW HI
+1.8VS
1
1
C588
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2522
401318
星期五 二月
1
18 52, 18, 2005
of
Page 19
5
4
3
2
1
POWER INTERFACE
U7D
VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1
435mA
VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1/(CLKAFB) VDDR1/(CLKBFB)
VDDC15/(VDDC18) VDDC15/(VDDC18) VDDC15/(VDDC18) VDDC15/(VDDC18) VDDC15/(VDDC18) VDDC15/(VDDC18) VDDC15/(VDDC18) VDDC15/(VDDC18)
TPVDD TPVSS
AVDD A2VDD
117mA
A2VDD A2VDDQ
A2VSSN A2VSSN A2VSSQ
AVSSN AVSSQ
M11-P_BGA708
1
C543
2
M11-P (4/6)
40mA
LVDDR_25/(LVDDR_18_25) LVDDR_25/(LVDDR_18_25)
+VDDC15
I/O POWER
81mA
20mA
6mA
10mA
20mA
6mA
20mA
3mA
1mA
30mA
4
VDDRH0 VDDRH1
VSSRH0 VSSRH1
MPVDD MPVSS
PVDD PVSS
VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3
VDDR4 VDDR4 VDDR4 VDDR4 VDDR4
VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP
LVDDR_18 LVDDR_18
LPVDD
LVSSR LVSSR LVSSR LVSSR
LPVSS
VDD1DI VDD2DI
VSS1DI VSS2DI
TXVDDR TXVDDR
TXVSSR TXVSSR TXVSSR
D D
C C
+2.5VS
+VDDC15
B B
+VDD_PNLPLL1.8
+VDD_DAC1.8 +VDD_DAC2.5
+VDD_DAC1.8
A A
+1.5VS
1 2
L46
FBM-11-160808-121-T_0603
5
B1 B30 A15 A21 A28
A3
A9 AA1 AA4 AA7 AA8 AD4
D5
D8 D11 D13 D14 D17 D20 D23 D26 E27
F4
G7 G10 G13 G15 G19 G22 G27 H10 H13 H15 H17 H19 H22
J1 J23 J24
J4
J7
J8 L27
L8
M4 N4 N7 N8 R1
T4
T7
T8
V4
V7
V8 D19
R4
AC11 AC20
H11 H20 L23
P8 Y23
Y8
AK12
AJ12
AH24 AG21 AH21 AF22
AH22
AJ21
AF23
AH23 AD24
0.1U_0402_16V4Z
1
C566
2
0.1U_0402_16V4Z
F18 N6
F19 M6
A7 A6
AK28 AJ28
AC19 AC21 AC22 AC8 AD19 AD21 AD22 AD7
AC10 AC9 AD10 AD9 AG7
AA23 AA24 AB30 AC23 AC27 AE30 AF27 J30 M23 M24 N30 P23 P27 T23 T24 T30 U27 V23 V24 W30 Y27
AE20 AE17 AF21 AE15 AJ20
AF20 AF15 AE19 AE16 AJ19
AE24 AE22
AE23 AE21
AF13 AF14
AG13 AG14 AH12
+2.5VDDRH
+1.5VS
+VDD_MEMPLL1.8
+VDD_PLL1.8
+3VS
+VDD_PNLIO2.5
+VDD_PNLIO1.8 +VDD_PNLPLL1.8
+VDD_DAC1.8
+VDD_PNLIO1.8
2.2U_0603_6.3V4Z
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
+3VS
0.1U_0402_16V4Z
1
C524
2
22U_1206_10V4Z
+1.5VS
1
C547
2
22U_1206_10V4Z
+VDD_DAC2.5
(20 mil)
1
C492
2
+VDD_PNLPLL1.8
(20 mil)
1
C500
C39
2
0.1U_0402_16V4Z
+VDD_DAC1.8
(20 mil)
1
C493
2
1
2
22U_1206_10V4Z
1
2
1
C501
0.1U_0402_16V4Z
2
1
2
CHB1608U301_0603
1
C512
0.1U_0402_16V4Z
2
1
C517
C554
CHB1608U301_0603
1 2
C521
2
0.1U_0402_16V4Z
Note: PLACE CLOSE TO U6 (VGA ATI M10P/M9+X)
L
1 2
1
C514
2
0.1U_0402_16V4Z
L31
L10
1 2
CHB1608U301_0603
1
C496
0.1U_0402_16V4Z
2
L30
0.1U_0402_16V4Z
C537
+2.5VS
+1.8VS
+VDD_PNLIO1.8
C490
(20 mil)
1
2
C503
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
1
C513
2
As close as possible to related pin
+VDD_PNLIO2.5
20mil
1 2
C528
L32 CHB1608U301_0603@
1
2
0.1U_0402_16V4Z
1
C526
2
U22
5
VOUT
2
GND
MIC5205-2.8BM5_SOT23-5
SA052050010(MIC5205-2.8BM5), max:150mA
0.01U_0402_16V7K
1
C519
2
1
C563
2
0.01U_0402_16V7K
+1.8VS
1
C502
2
0.1U_0402_16V4Z
+2.5VS
1
VIN
4
PG
3
EN
2
1
C516
0.01U_0402_16V7K
2
0.01U_0402_16V7K
1
C527
2
+2.5VDDRH
C99
1U_0603_10V4Z
+VDD_PLL1.8
C41
10U_0805_10V4Z
+VDD_MEMPLL1.8
C193
0.1U_0402_16V4Z
L29
1 2
CHB1608U301_0603
+3VS
1
C523
470P_0402_50V7K
2
1
2
0.01U_0402_16V7K
(20 mil)
1
2
(20 mil)
1
2
(20 mil)
1
2
+1.8VS
1
C536
2
L21
1 2
CHB1608U301_0603
1
C550
0.1U_0402_16V4Z
2
L11
1 2
CHB1608U301_0603
1
C40
0.1U_0402_16V4Z
2
1 2
CHB1608U301_0603
1
C197
2.2U_0603_6.3V4Z
2
Title
Size Document Number Rev
Date: Sheet
星期五 二月
+2.5VS
+1.8VS
L24
+1.8VS
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2522
401318
1
19 52, 18, 2005
of
Page 20
5
4
3
2
1
POWER
U7E
AB1
AB4 AB7 AB8
AC4
AJ1 AK2
C28 C30
D10 D12 D15 D18 D21 D24 D25 D27
F27
A10 A16
A22 A29
C1 C3
D4 D6 D9
C545
C581
C530
A2
E4
M11-P (5/6)
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
M11-P_BGA708
CORE POWER
1
C535
2
0.1U_0402_16V4Z
1
C582
2
0.1U_0402_16V4Z
1
C534
2
0.1U_0402_16V4Z
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
0.1U_0402_16V4Z
1
C533
2
0.1U_0402_16V4Z
1
C572
2
0.1U_0402_16V4Z
1
C555
2
H4 H8 H9 H12 H14 H18 H21 H23 H27 K1 K23 K24 K27 K30 K7 K8 L4 M30 M7 M8 N23 N24 N27 P4 R23 R24 R30 R7 R8 T1 T27 U23 U4 U8 V30 W23 W24 W27 W7 W8 Y4 G9 G12 G16 G18 G21 G24
1
C532
2
0.1U_0402_16V4Z
1
C571
2
0.01U_0402_16V7K
1
C565
2
0.01U_0402_16V7K
0.01U_0402_16V7K
1
C546
2
1
C578
0.01U_0402_16V7K
2
1
C583
0.01U_0402_16V7K
2
1
2
0.01U_0402_16V7K
INTERFACE
D D
C C
+VGA_CORE
1
B B
A A
+
2
+2.5VS
1
2
+2.5VS
1
2
150U_D2_6.3VM
C560
22U_1206_10V4Z
C561
22U_1206_10V4Z
22U_1206_10V4Z
1
C38
C531
2
0.1U_0402_16V4Z
1
C564
2
0.1U_0402_16V4Z
1
C518
2
1
C551
2
22U_1206_10V4Z
1
C569
2
0.1U_0402_16V4Z
1
C525
2
0.1U_0402_16V4Z
AA30 AB23
AB24 AB27
AC12 AC14 AC16 AC18
AD12 AD16 AD18 AD25 AD30 AE27 AG11 AG15 AG18 AG22 AG27
AG5 AG9
AJ30
AK29
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
1
2
C544
M11
VGA_CORE
+VGA_CORE
0.01U_0402_16V7K
1
C520
2
1.2V
U7F
M12
VDDC
M13
VDDC
M14
VDDC
M17
VDDC
M18
VDDC
M19
VDDC
N12
VDDC
N13
VDDC
N14
VDDC
N17
VDDC
N18
VDDC
N19
VDDC
P12
VDDC
P13
VDDC
P14
VDDC
P17
VDDC
P18
VDDC
P19
VDDC
U12
VDDC
U13
VDDC
U14
VDDC
U17
VDDC
U18
VDDC
U19
VDDC
V12
VDDC
V13
VDDC
V14
VDDC
V17
VDDC
V18
VDDC
V19
VDDC
W12
VDDC
W13
VDDC
W14
VDDC
W17
VDDC
W18
VDDC
W19
VDDC
M11-P_BGA708
1
C515
0.01U_0402_16V7K
2
1.05V
M11-P (6/6)
+VGA_CORE
AD15
VDDC
AD13
VDDC
AC17
VDDC
AC15
VDDC
AC13
VDDC
T12
VDDCI
M15
VDDCI
W16
VDDCI
R19
VDDCI
R12
VSS
R13
VSS
T13
VSS
R14
VSS
T14
VSS
N15
VSS
P15
VSS
R15
VSS
CORE POWER
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
T15 U15 V15 W15 H16 M16 N16 P16 R16 T16 U16 V16 R17 T17 R18 T18 T19
+VGA_CORE_CI
VGA Therml Sensor
VGA_DPLUS17
VGA_DMINUS17 DDC3CLK17
SMB_EC_CK137,49
DDC3DATA17 SMB_EC_DA137,49
VGA_DPLUS
VGA_DMINUS DDC3CLK
1 2
R617 0_0402_5%@
DDC3DATA
1 2
R618 0_0402_5%@
1
C84
2
8.2K_0402_5%@
+3VS
+VGA_CORE_CI
(20 mil)
1
C538
2
10U_0805_10V4Z
0.1U_0402_16V4Z
1
C529
2
L33
1 2
CHB1608U301_0603
1
C552
0.1U_0402_16V4Z
2
+VGA_CORE
As close as ppossible to related pin
+3VS
1
C94
0.1U_0603_25V7M@
U8
2
2200P_0402_50V7K@
12
R89
D+
3
D-
8
SCLK
7
SDATA
ADM1032AR_SO8@
12
R88
8.2K_0402_5%@
R605
@
10K_0402_5%
ALERT#
+3VS
VDD1
ALERT#
THERM#
GND
1 2
1
ALERT#
6 4 5
+3VS
R257
10K_0402_5%
1 2 13
D
2
G
Q36
@
2N7002_SOT23
S
12
2
R74
AUXWIN 17
10K_0402_5%@
As close as ppossible to related pin
POWER_SEL Hi Low
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2522
星期五 二月
401318
1
20 52, 18, 2005
of
Page 21
5
4
3
2
1
MDA[63..0] DQSA[7..0] MAA[13..0] DQMA#[7..0]
D D
+2.5VS
12
R140 1K_0402_5%
12
R137
1K_0402_5%
C C
B B
+2.5VS
1U_0603_10V6K
1
C231
2
0.1U_0402_10V6K
+2.5VS
1U_0603_10V6K
1
C214
2
A A
0.1U_0402_10V6K
Place close to U26
5
MDA[63:0] 18 DQSA[7:0] 18 MAA[13:0] 18 DQMA#[7:0] 18
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13
DQMA#3 DQMA#0 DQMA#2 DQMA#1
DQSA3
VRAM_REFA1
DQSA0 DQSA2 DQSA1
RASA# CASA# WEA# CSA0#
CKEA CLKA0
CLKA0#
DIMA_0
CSA1#
1
C240
2
0.1U_0402_10V6K
RASA#18 RASA#18 CASA#18 WEA#18 CSA0#18
CKEA18 CKEA18 CLKA018
CLKA0#18
CSA1#18
B11
U26
VSSQB4VSSQ
VSSQD4VSSQD5VSSQD6VSSQD9VSSQ
N5
A0
N6
A1
M6
A2
N7
A3
N8
A4
M9
A5
N9
A6
N10
A7
N11
A8/AP
M8
A9
L6
A10
M7
A11
N4
BA0
M5
BA1
B3
DM0
H12
DM1
H3
DM2
B12
DM3
B2
DQS0
H13
DQS1
H2
DQS2
B13
DQS3
N13
VREF
M13
MCL
L9
NC2
M10
NC3
M2
RAS#
L2
CAS#
L3
WE#
N2
CS0#
N12
CKE
M11
CK
M12
CK#
C4
NC
C11
NC
H4
NC
H11
NC
L12
NC
L13
NC
M3
NC
M4
CS1#
N3
NC
E7
VSS
E8
VSS
E10
VSS
K6
VSS
K7
VSS
K8
VSS
K9
VSS
L5
VSS
L10
VSS
E5
VSS
VSS THF6VSS THF7VSS THF8VSS THF9VSS THG6VSS THG7VSS THG8VSS THG9VSS THH6VSS THH7VSS THH8VSS THH9VSS THJ6VSS THJ7VSS THJ8VSS TH
D10
D11
VSSQ
VSSQE6VSSQE9VSSQF5VSSQ
F10
G10
H10
J10
VSSQG5VSSQ
VSSQH5VSSQ
VSSQJ5VSSQ
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
HY5DU283222BF-33_FBGA144
J9
K10
VSSQK5VSSQ
MDA24
B7
MDA25
C6
MDA28
B6
MDA27
B5
MDA31
C2
MDA30
D3
MDA29
D2
MDA26
E2
MDA1
K13
MDA3
K12
MDA4
J13
MDA6
J12
MDA5
G13
MDA2
G12
MDA0
F13
MDA7
F12
MDA16
F3
MDA17
F2
MDA18
G3
MDA19
G2
MDA20
J3
MDA22
J2
MDA23
K2
MDA21
K3
MDA14
E13
MDA13
D13
MDA8
D12
MDA15
C13
MDA11
B10
MDA9
B9
MDA12
C9
MDA10
B8
C3 C5 C7 C8 C10 C12 E3 E12 F4 F11 G4 G11 J4 J11 K4 K11
D7 D8 E4 E11 L4 L7 L8 L11
+2.5VS
+2.5VS
+2.5VS
R335
Hynix 8M32-33/600 FBGA 2.5V Hynix 8M32-33/600 FBGA 2.5V
0.1U_0402_10V6K
1
C217
2
1
C227
2
1
C235
2
0.1U_0402_10V6K
1
C212
2
0.1U_0402_10V6K
1
C208
2
0.1U_0402_10V6K
1
C225
2
1
C230 22U_1206_10V4Z
2
1
C241 22U_1206_10V4Z
2
Place close to U25
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
12
R336 1K_0402_5%
12
1K_0402_5%
+2.5VS
1
2
0.1U_0402_10V6K
+2.5VS
1
2
0.1U_0402_10V6K
3
1
C630
2
0.1U_0402_10V6K
1U_0603_10V6K
C226
C210
VRAM_REFA2
CASA#18 WEA#18 CSA0#18
CLKA118 CLKA1#18
DIMA_118DIMA_018
CSA1#18
1
C635
2
1U_0603_10V6K
1
C618
2
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13
DQMA#6 DQMA#4 DQMA#7 DQMA#5
DQSA6 DQSA4 DQSA7 DQSA5
RASA# CASA# WEA# CSA0#
CKEA CLKA1
CLKA1#
DIMA_1
CSA1#
1
C236
2
0.1U_0402_10V6K
1
C232
2
0.1U_0402_10V6K
U25
N5
A0
N6
A1
M6
A2
N7
A3
N8
A4
M9
A5
N9
A6
N10
A7
N11
A8/AP
M8
A9
L6
A10
M7
A11
N4
BA0
M5
BA1
B3
DM0
H12
DM1
H3
DM2
B12
DM3
B2
DQS0
H13
DQS1
H2
DQS2
B13
DQS3
N13
VREF
M13
MCL
L9
NC2
M10
NC3
M2
RAS#
L2
CAS#
L3
WE#
N2
CS0#
N12
CKE
M11
CK
M12
CK#
C4
NC
C11
NC
H4
NC
H11
NC
L12
NC
L13
NC
M3
NC
M4
CS1#
N3
NC
E7
VSS
E8
VSS
E10
VSS
K6
VSS
K7
VSS
K8
VSS
K9
VSS
L5
VSS
L10
VSS
E5
VSS
0.1U_0402_10V6K
1
C209
2
0.1U_0402_10V6K
1
C215
2
B11
D10
D11
F10
VSSQB4VSSQ
VSSQD4VSSQD5VSSQD6VSSQD9VSSQ
VSSQ
VSSQE6VSSQE9VSSQF5VSSQ
VSS THF6VSS THF7VSS THF8VSS THF9VSS THG6VSS THG7VSS THG8VSS THG9VSS THH6VSS THH7VSS THH8VSS THH9VSS THJ6VSS THJ7VSS THJ8VSS TH
1
C612 22U_1206_10V4Z
2
1
C636 22U_1206_10V4Z
2
2
G10
H10
J10
VSSQG5VSSQ
VSSQH5VSSQ
VSSQJ5VSSQ
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
HY5DU283222BF-33_FBGA144
J9
K10
VSSQK5VSSQ
MDA48
B7
MDA49
C6
MDA50
B6
MDA51
B5
MDA52
C2
MDA55
D3
MDA53
D2
MDA54
E2
MDA32
K13
MDA37
K12
MDA33
J13
MDA35
J12
MDA34
G13
MDA36
G12
MDA38
F13
MDA39
F12
MDA56
F3
MDA57
F2
MDA61
G3
MDA58
G2
MDA62
J3
MDA63
J2
MDA59
K2
MDA60
K3
MDA42
E13
MDA41
D13
MDA40
D12
MDA47
C13
MDA43
B10
MDA45
B9
MDA46
C9
MDA44
B8
C3 C5 C7 C8 C10 C12 E3 E12 F4 F11 G4 G11 J4 J11 K4 K11
D7 D8 E4 E11 L4 L7 L8 L11
+2.5VS
+2.5VS
CLKA0 CLKA0#
12
R138 56_0402_5%
1
2
12
R334 56_0402_5%
1
2
Place as close to U8 as possible
CLKA1 CLKA1#
Place as close to U9 as possible
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc. SCHEMATIC, M /B LA-2522 401318
星期五 二月
1
12
R139 56_0402_5%
C239
0.1U_0402_16V4Z
12
R333 56_0402_5%
C631
0.1U_0402_16V4Z
21 52, 18, 2005
of
Page 22
5
4
3
2
1
MDA[63..0] DQSA[7..0] MAA[13..0]
D D
DQMA#[7..0]
+2.5VS
12
1K_0402_5% R122
12
R117
1K_0402_5%
C C
B B
+2.5VS
1
C163
2
0.1U_0402_10V6K
+2.5VS
1
C138
A A
2
0.1U_0402_10V6K
1
C191
2
0.1U_0402_10V6K
RASB#18 CASB#18 WEB#18 CSB0#18
CKEB18 CLKB018
CLKB0#18
DIMB_018
CSB1#18
0.1U_0402_10V6K
1
C149
2
1U_0603_10V6K
1
C154
2
MDB[63:0] 18 DQSB[7:0] 18 MAB[13:0] 18 DQMB#[7:0] 18
VRAM_REFB1
DIMB_0
1
C148
2
0.1U_0402_10V6K
1
C165
2
0.1U_0402_10V6K
MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13
DQMB#2 DQMB#1 DQMB#3 DQMB#0
DQSB2 DQSB1 DQSB3 DQSB0
RASB# CASB# WEB# CSB0#
CKEB CLKB0
CLKB0#
CSB1#
B11
D10
D11
F10
VSSQ
VSSQE6VSSQE9VSSQF5VSSQ
G10
VSSQG5VSSQ
VSSQH5VSSQ
U23
VSSQB4VSSQ
VSSQD4VSSQD5VSSQD6VSSQD9VSSQ
N5
A0
N6
A1
M6
A2
N7
A3
N8
A4
M9
A5
N9
A6
N10
A7
N11
A8/AP
M8
A9
L6
A10
M7
A11
N4
BA0
M5
BA1
B3
DM0
H12
DM1
H3
DM2
B12
DM3
B2
DQS0
H13
DQS1
H2
DQS2
B13
DQS3
N13
VREF
M13
MCL
L9
NC2
M10
NC3
M2
RAS#
L2
CAS#
L3
WE#
N2
CS0#
N12
CKE
M11
CK
M12
CK#
C4
NC
C11
NC
H4
NC
H11
NC
L12
NC
L13
NC
M3
NC
M4
CS1#
N3
NC
E7
VSS
E8
VSS
E10
VSS
K6
VSS
K7
VSS
K8
VSS
K9
VSS
L5
VSS
L10
VSS
E5
VSS
VSS THF6VSS THF7VSS THF8VSS THF9VSS THG6VSS THG7VSS THG8VSS THG9VSS THH6VSS THH7VSS THH8VSS THH9VSS THJ6VSS THJ7VSS THJ8VSS TH
Hynix 8M32-33/600 FBGA 2.5V
1
2
1
2
C177
0.1U_0402_10V6K
C178
0.1U_0402_10V6K
1
C603 22U_1206_10V4Z
2
1
C121 22U_1206_10V4Z
2
H10
J10
K10
VSSQJ5VSSQ
VSSQK5VSSQ
B7
DQ0
C6
DQ1
B6
DQ2
B5
DQ3
C2
DQ4
D3
DQ5
D2
DQ6
E2
DQ7
K13
DQ8
K12
DQ9
J13
DQ10
J12
DQ11
G13
DQ12
G12
DQ13
F13
DQ14
F12
DQ15
F3
DQ16
F2
DQ17
G3
DQ18
G2
DQ19
J3
DQ20
J2
DQ21
K2
DQ22
K3
DQ23
E13
DQ24
D13
DQ25
D12
DQ26
C13
DQ27
B10
DQ28
B9
DQ29
C9
DQ30
B8
DQ31
C3
VDDQ
C5
VDDQ
C7
VDDQ
C8
VDDQ
C10
VDDQ
C12
VDDQ
E3
VDDQ
E12
VDDQ
F4
VDDQ
F11
VDDQ
G4
VDDQ
G11
VDDQ
J4
VDDQ
J11
VDDQ
K4
VDDQ
K11
VDDQ
D7
VDD
D8
VDD
E4
VDD
E11
VDD
L4
VDD
L7
VDD
L8
VDD
L11
VDD
HY5DU283222BF-33_FBGA144
J9
B11
D10
D11
F10
G10
H10
J10
VSSQG5VSSQ
VSSQH5VSSQ
VSSQJ5VSSQ
VSSQK5VSSQ
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
HY5DU283222BF-33_FBGA144
J9
K10
B7 C6 B6 B5 C2 D3 D2 E2 K13 K12 J13 J12 G13 G12 F13 F12 F3 F2 G3 G2 J3 J2 K2 K3 E13 D13 D12 C13 B10 B9 C9 B8
C3 C5 C7 C8 C10 C12 E3 E12 F4 F11 G4 G11 J4 J11 K4 K11
D7 D8 E4 E11 L4 L7 L8 L11
U21
VSSQB4VSSQ
VSSQD4VSSQD5VSSQD6VSSQD9VSSQ
VSSQ
MDB17 MDB18 MDB19 MDB16 MDB21 MDB20 MDB23 MDB22 MDB8 MDB10 MDB9 MDB11 MDB12 MDB14 MDB15 MDB13 MDB27 MDB30 MDB28 MDB25 MDB24 MDB31 MDB29 MDB26 MDB1 MDB2 MDB0 MDB3 MDB7
MDB6 MDB5
+2.5VS
+2.5VS
R72
1K_0402_5%
12
R73 1K_0402_5%
12
1
C87
2
0.1U_0402_10V6K
RASB#18 CASB#18 WEB#18 CSB0#18
CKEB18 CLKB118
CLKB1#18
DIMB_118
CSB1#18
+2.5VS +2.5VS
VRAM_REFB2
MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13
DQMB#6 DQMB#4 DQMB#7 DQMB#5
DQSB6 DQSB4 DQSB7 DQSB5
RASB# WEB#
CSB0# CKEB CLKB1
CLKB1#
DIMB_1
CSB1#
N5
A0
N6
A1
M6
A2
N7
A3
N8
A4
M9
A5
N9
A6
N10
A7
N11
A8/AP
M8
A9
L6
A10
M7
A11
N4
BA0
M5
BA1
B3
DM0
H12
DM1
H3
DM2
B12
DM3
B2
DQS0
H13
DQS1
H2
DQS2
B13
DQS3
N13
VREF
M13
MCL
L9
NC2
M10
NC3
M2
RAS#
L2
CAS#
L3
WE#
N2
CS0#
N12
CKE
M11
CK
M12
CK#
C4
NC
C11
NC
H4
NC
H11
NC
L12
NC
L13
NC
M3
NC
M4
CS1#
N3
NC
E7
VSS
E8
VSS
E10
VSS
K6
VSS
K7
VSS
K8
VSS
K9
VSS
L5
VSS
L10
VSS
E5
VSS
VSSQE6VSSQE9VSSQF5VSSQ
VSS THF6VSS THF7VSS THF8VSS THF9VSS THG6VSS THG7VSS THG8VSS THG9VSS THH6VSS THH7VSS THH8VSS THH9VSS THJ6VSS THJ7VSS THJ8VSS TH
Hynix 8M32-33 /600 FBGA 2.5V
+2.5VS
1
C68
2
0.1U_0402_10V6K
+2.5VS
1
C60
2
0.1U_0402_10V6K
1U_0603_10V6K
1
C67
2
1U_0603_10V6K
1
C522
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C73
2
1
C64
2
0.1U_0402_10V6K
1
C72
2
0.1U_0402_10V6K
1
C63
2
1
C505 22U_1206_10V4Z
2
1
C89 22U_1206_10V4Z
2
MDB48 MDB50 MDB49 MDB51 MDB55 MDB53 MDB52 MDB54 MDB35 MDB32 MDB33 MDB34 MDB37 MDB36 MDB39 MDB38 MDB57 MDB56 MDB59 MDB58 MDB61 MDB60 MDB63 MDB62 MDB40 MDB43 MDB42 MDB41 MDB45 MDB46MDB4 MDB44 MDB47CASB#
+2.5VS
CLKB0 CLKB0#
1
C168
0.1U_0402_16V4Z
2
1
C92
0.1U_0402_16V4Z
2
12
12
12
R108 56_0402_5%
Place as close to U10 as possible
CLKB1 CLKB1#
12
R70 56_0402_5%
Place as close to U11 as possible
R105 56_0402_5%
R71 56_0402_5%
Place close to U21
Place close to U23
5
Title
THIS SHEET OF EN GINEE RING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc. SCHEMATIC, M /B LA-2522 401318
星期五 二月
1
22 52, 18, 2005
of
Page 23
5
D D
BKOFF#37 BACKLITE_ON17,37
C C
+LCDVDD +12V
B B
ENVDD17
* ENAVDD enables the panel 3.3V
12
R263 470_0402_5%
13
D
Q19
S
2N7002_SOT23
G
12
R248 100K_0402_5%
2
13
2
Q16 DTC124EK_SC59
U6
1
A
2
B
2
G
4
+5VS
1 2
5
P
4
O
G
3
NC7ST08P5X_SC70-5
+12V
12
R238
100K_0402_5%
13
D
Q17
S
2N7002_SOT23
C48
0.1U_0402_16V4Z
DISPOFF#
10 A, 30 V. RDS(on) = 0.0135 W @ VGS = 10 V RDS(on) = 0.020 W @ VGS = 4.5 V
+LCDVDD
1
C43
2
10U_0805_10V4Z
1
C37
0.01U_0402_16V7K
2
Q6
SI4410DY_SO8
1 2 3 6
4
12
R235 150K_0402_5%
+3VS
8 7
5
1
C36
0.1U_0402_10V6K
2
Inverter (For Lamp)
3
(DDC Power)
DAC_BRIG37 INVT_PWM37
+LCDVDD
+3VS
LCDP_DAT17 LCDP_CLK17
B+
0.1U_0402_10V6K
DISPOFF#
R48 0_0603_5%
1 2
0.1U_0402_10V6K
1 2
C46 0.1U_0402_10V6K
1
C45
0.1U_0603_50V4Z
2
PWR_LED1# BATT_LED1# CHARGE_LED1#
+5VALW
100K_0402_5%
PWR_LED#37,39
100K_0402_5%
BATT_LED#37,39
100K_0402_5%
CHARGE_LED#37,39
C44
C491
1 2
C47
0.1U_0402_10V6K
PWR_LED1#
12
R624
2
BATT_LED1#
12
R625
2
CHARGE_LED1#
12
R626
2
1
2
1
2
LCDVDD
G
G
G
S
Q41 AOS3401_SOT23
D
1 3
S
Q42 AOS3401_SOT23
D
1 3
S
Q43 AOS3401_SOT23
D
1 3
2
1 3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
JLCD1
2
1
2
4
3
4
6
5
6
8
7
8
10
9
10
12
11
12
14
13
14
16
15
16
18
17
18
20
19
20
22
21
22
24
23
24
26
25
26
28
27
28
30
29
30
32
31
32
34
33
34
36
35
36
38
37
38
40
39
40
42
414142
44
434344
46
454546
48
474748
50
494950
ACES_87216-5004
LVDSBC+ 17 LVDSBC- 17
LVDSB1+ 17 LVDSB1- 17
LVDSB2+ 17 LVDSB2- 17
LVDSB0+ 17 LVDSB0- 17
LVDSAC+ 17 LVDSAC- 17
LVDSA2+ 17 LVDSA2- 17
LVDSA1- 17 LVDSA1+ 17
LVDSA0- 17 LVDSA0+ 17
INVERTOR LED
1
LVDS
+5VALW
AMB RED
BLUE
A A
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc. SCHEMATIC, M /B LA-2522 401318
星期五 二月
PWR_LED#
1
BATT_LED#
23 52, 18, 2005
CHARGE_LED#
of
Page 24
5
4
3
2
1
SMBDAT_VGA
13
D
Q4 2N7002_SOT23
SMBCLK_VGA
13
D
Q5 2N7002_SOT23
C/R_VGA
Y/G_VGA
COMP/B_VGA
R25
75_0402_1%
R23
75_0402_1%
R24
75_0402_1%
12
12
12
D D
C C
VGA_DDCDAT17 VGA_DDCCLK17
C/R_VGA17
Y/G_VGA17
COMP/B_VGA17
4.7K_0402_5%
VGA_DDCDAT VGA_DDCCLK
12
R17
12
R18
4.7K_0402_5%
+3VS
G
2
S
+3VS
G
2
S
DVI Interface
VGA_RED17
B B
HSYNC_VGA17
VSYNC_VGA17
A A
VGA_GRN17
VGA_BLU17
0.1U_0402_16V4Z
C26
HSYNC_VGA
VSYNC_VGA
+5VS
+5VS
1
2
5
P A2Y
5
P A2Y
R28 1K_0402_5%
1 2
1
4
OE#
G
U3
3
SN74AHCT1G125GW_SOT353-5
1
4
OE#
G
U4
3
SN74AHCT1G125GW_SOT353-5
1
2
1
2
1
2
1 2
L9 CHB1608U301_0603
C35 82P_0402_50V8J
1 2
L7 CHB1608U301_0603
C33 82P_0402_50V8J
1 2
L8 CHB1608U301_0603
C34 82P_0402_50V8J
DDC_MONID0
MSEN#17,37
C32
10P_0402_50V8J
10P_0402_50V8J
1
C31
2
12
R22
75_0402_1%
MSEN#
1
2
12
R26
75_0402_1%
12
C25 82P_0402_50V8J
12
C23 82P_0402_50V8J
12
C24 82P_0402_50V8J
1
2
12
R27
75_0402_1%
C30 10P_0402_50V8J
1 2
L2 FCM2012C-800_0805
1 2
L3 FCM2012C-800_0805
1 2
L4 FCM2012C-800_0805
SVIDEO_C
SVIDEO_Y SVIDEO_COMP/B
D1
DAN217_SC59@
2
CRTR
CRTG
CRTB
12
C8
3.3P_0402_50V8J
1 2
L5 CHB1608U301_0603
1 2
L6 CHB1608U301_0603
JTV1
7 6 5
TV-OUT Connector
4 3 2 1
1
D5
2
3
DAN217_SC59@
1
3
1
C11
2
27P_0402_50V8J
D4
DAN217_SC59@
D2
DAN217_SC59@
1
2
3
12
C10
3.3P_0402_50V8J
1
C13
2
27P_0402_50V8J
1
2
3
D6
D3
DAN217_SC59@
1
2
3
12
C12
3.3P_0402_50V8J
C7
2
DAN217_SC59@
+3VS
100P_0402_50V8J
1
3
+3VS
1
1
C14
2
2
100P_0402_50V8J
SUYIN_030107FR007T115ZR
21
CRT Connector
16 17
+CRT_VCCF+CRT_VCC
21
D7 RB751V_SOD323
+5VS +5VS
W=40mils
12
12
R16
R15
C9
2K_0402_5%
1
2
100P_0402_50V8J
2K_0402_5%
1
C15
2
100P_0402_50V8J
F1
1.1A_6VDC_FUSE
1
C5
0.1U_0402_16V4Z
2
SMBDAT_VGA SMBCLK_VGA
JCRT1
6
11
1 7
12
2 8
13
3 9
14
4 10 15
5
FOX_DZ11A91-NL201-7F
1
C6
0.1U_0402_16V4Z
2
DA204U
K1 A2
A1 K2
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc. SCHEMATIC, M/B LA-2522 401318
星期五 二月
1
24 52, 18, 2005
of
Page 25
5
12
R448 470_0402_5%
2
12
R477
A_AD[0..31] A_CBE#[0..3]
A_SERR#
+3VS
12
1K_0402_5%
12
R445 330_0402_5%
+3VS
12
H_CPUFERR#
R495
4.7K_0402_5%
R505 8.2K_0402_5%
PULL DOWN FOR S3
12
1
2
A_AD[0..31]11
A_CBE#[0..3]11
+VCCP
R435
D D
C C
56_0402_1%
H_FERR#6
+VCCP +3VS
1 2
3 1
Q26 MMBT3904_SOT23
+3VS
R479
8.2K_0402_5%
PM_STPCPU# PCI_STP#
+VCCP
H_INIT# H_A20M# H_CPUSLP# H_INTR H_NMI H_SMI# H_STPCLK# H_IGNNE#
R564
1 2
20M_0603_5%
RTCX2
B B
1
2
RTCX1
4
1
IN
OUT
C811
12P_0402_50V8J
NC3NC
2
Y7
32.768KHZ_1TJS125BJ2A251
R411 200_0402_5%
1 2
R416 200_0402_5%
1 2
R326 200_0402_5%
1 2
R396 200_0402_5%
1 2
R394 200_0402_5%
1 2
R407 200_0402_5%
1 2
R404 200_0402_5%
1 2
R406 200_0402_5%
1 2
12
20M_0603_5%
C815
@
1
R570
12P_0402_50V8J
2
PM_DPRSLPVR48
R427
100K_0402_5%
R426 0_0402_5% R408 10K_0402_5%
12
R418 10K_0402_5% R388 1K_0402_1%
RTC Battery
+RTCBATT
+RTCBATT
2
-
JRTC1 MAXELL_1220G
5
R562 22_0402_5%
1 2
JOPEN1
2 1
ACES_86841-0200
JOPEN1 close to DDR-SODIMM
A A
+SB_VBAT
C813
@
22U_1206_10V4Z
1
2
R561 22_0402_5%
1 2
W=20mils
1
+
+RTCVCC
1
C809 22U_1206_10V4Z
2
1
3
D18 BAS40-04_SOT23
2
CLK_ALINK_SB16 NBRST#26
1 2
CLK_ALINK_SB
R400 18_0402_5%
C677 10P_0402_50V8J
4.7K_0402_5%
H_PWRGOOD6 H_INTR6 H_NMI6 H_INIT#6 H_SMI#6 H_CPUSLP#6 H_IGNNE#6 H_A20M#6
H_STPCLK#6
1 2 1 2 1 2 1 2
CHGRTC
4
CLK_ALINK_SB
NBRST#
A_AD0 A_AD1 A_AD2 A_AD3 A_AD4 A_AD5 A_AD6 A_AD7 A_AD8 A_AD9 A_AD10 A_AD11 A_AD12 A_AD13 A_AD14 A_AD15 A_AD16 A_AD17 A_AD18 A_AD19 A_AD20 A_AD21 A_AD22 A_AD23 A_AD24 A_AD25 A_AD26 A_AD27 A_AD28 A_AD29 A_AD30 A_AD31 A_CBE#0 A_CBE#1 A_CBE#2 A_CBE#3
+3VS
A_STROBE# A_DEVSEL# A_ACAT# A_END# A_PAR A_OFF# A_SERR# A_SBREQ# A_SBGNT#
PM_STPCPU# PCI_STP#
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
RTCX1
12
RTCX2
CPURSTIN# H_PWRGOOD H_INTR H_NMI H_INIT# H_SMI# H_CPUSLP# H_IGNNE# H_A20M# H_CPUFERR# H_STPCLK# GPIO0
SB_APIC_D0 SB_APIC_D1
A_STROBE#11 A_DEVSEL#11 A_ACAT#11 A_END#11 A_PAR11 A_OFF#11
A_SBREQ#11 A_SBGNT#11
PM_STPCPU#6,9,16,48 PCI_STP#16
PCI_PIRQA#11,17,31 PCI_PIRQB#31,34 PCI_PIRQC#31,33 PCI_PIRQD#30,31,33
R389
U39A
B22
R22 H22
P23 L23 N23 N22 M23 M22 K22 M21 M20 L21 K21 L20 N21 K23 K20 F23 G21 F20 H21 F22 F21 G20 E21 E20 D23 D22 E22 D20 C23 D21 C22 L22
J23 G22 E23 H20
J21 G23 H23
J20
J22 P22 B21 B20
N20 R23
C20 P20 B23 P21
AC12
AC11
B18
E4 B17 B16 C17 C16 F19 D17 D18 E19 E16 E17 E18 C19 C18 B19
South bridge SB200
PCICLKF A_RST#
A_AD0 A_AD1 A_AD2 A_AD3 A_AD4 A_AD5 A_AD6 A_AD7 A_AD8 A_AD9 A_AD10 A_AD11 A_AD12 A_AD13 A_AD14 A_AD15 A_AD16 A_AD17 A_AD18 A_AD19 A_AD20 A_AD21 A_AD22 A_AD23 A_AD24 A_AD25 A_AD26 A_AD27 A_AD28 A_AD29 A_AD30 A_AD31 A_CBE#0 A_CBE#1 A_CBE#2 A_CBE#3 A_STROBE# A_DEVSEL# A_ACAT# A_END# A_PAR A_OFF# A_SERR# A_SBREQ# A_SBGNT#
CPU_STP#/DPSLP# PCI_STP#
A_INTA# INTB# INTC# INTD#
X1
X2
CPURSTIN# CPU_PWRGD INTR/LINT0 NMI/LINT1 INIT SMI# SLP# IGNNE# A20M# FERR# STPCLK# SSMUXSEL/GPIO0 DPRSLPVR APIC_D0 APIC_D1 APIC_CLK
SB200 SB
A-LINK INTERFACE
XTAL
+3V
14
U47A
SB_PCI_RST#
10K_0402_5% R566
1 2
4
P
1
O2I
G
7
SN74LVC14APWLE_TSSOP14
3
Layout note:
Trace length of PCI_CLK_R + PCI_CLK_FB should be less than 200 mils.
PCICLK6
B15
PCICLK0
D16
Part 1 of 3
PCI INTERFACE
REQ#4/PLLBP33/PDMAREQ1#
GNT#4/PLLBP50/PDMAGNT1#
LPC
CPU
RTC_ALE/USBOC4#/GPIO3
RTC_WR#/RTC_CLKOUT
RTC_CS#/USBOC3#/GPIO2
RTC
14
P
3
O4I
G
U47B SN74LVC14APWLE_TSSOP14
7
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5 PCICLK6 PCICLK7
PCICLK_FB
PCI CLKS
PCIRST# AD0/ROMA18 AD1/ROMA17 AD2/ROMA16 AD3/ROMA15 AD4/ROMA14 AD5/ROMA13 AD6/ROMA12 AD7/ROMA11
AD8/ROMA9
AD9/ROMA8 AD10/ROMA7 AD11/ROMA6 AD12/ROMA5 AD13/ROMA4 AD14/ROMA3 AD15/ROMA2 AD16/ROMD0 AD17/ROMD1 AD18/ROMD2 AD19/ROMD3 AD20/ROMD4 AD21/ROMD5 AD22/ROMD6 AD23/ROMD7
AD24/RTC_AD7 AD25/RTC_AD6 AD26/RTC_AD5 AD27/RTC_AD4 AD28/RTC_AD3 AD29/RTC_AD2 AD30/RTC_AD1 AD31/RTC_AD0 CBE#0/ROMA10
CBE#1/ROMA1 CBE#2/ROMWE# CBE#3/RTC_RD#
FRAME#
DEVSEL#/ROMA0
IRDY#
TRDY#/ROMOE#
STOP# PERR# SERR# REQ#0 REQ#1 REQ#2
REQ#3/PDMAREQ0#
GNT#0 GNT#1 GNT#2
GNT#3/PDMAGNT0#
CLKRUN#
GPIO1/ROMCS#
LAD0 LAD1 LAD2 LAD3
LFRAME#
LDRQ#0 LDRQ#1
SERIRQ
USBOC5#/GPM1
VBAT
RTC_GND
C816
0.1U_0402_16V4Z
PCIRST#
A14 A15 A16 A17 D15 A18 A19
C15 B1 C1 A1 D2 B2 C2 A2 D3 C3 A3 D4 B4 C4 A4 D5 B5 C8 D8 B8 A8 C9 D9 B9 A9 C10 B10 D11 A10 C11 B11 D12 A11 B3 C5 A7 D10 B7 A6 C7 D7 A5
PAR
B6 C6 D6 B12 C12 D13 A12 C13 A13 B13 C14 D14 B14 A20
AB5
Y14 AA14 AB14 AA13 AB13 AC14 Y13
AC13
AA2 AB7 AB8 AC8 AC10 AB11
PCIRST# 29,30,31,33,34,37,38
R398 39_0402_5%
PCICLK5 PCICLK4 PCICLK3 PCICLK2 PCICLK1
PCI_CLK_R PCI_CLK_FB
SB_PCI_RST# PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 PCI_C_BE0# PCI_C_BE1# PCI_C_BE2# PCI_C_BE3# PCI_FRAME# PCI_DEVSEL# PCI_IRDY# PCI_TRDY# PCI_PAR PCI_STOP# PCI_PERR# PCI_SERR# PCI_REQ#0 PCI_REQ#1 PCI_REQ#2 PCI_REQ#3 PCI_REQ#4 PCI_GNT#0 PCI_GNT#1 PCI_GNT#2 PCI_GNT#3 PCI_GNT#4 PCI_CLKRUN#
GPIO1
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# LPC_DRQ0# LPC_DRQ1#
SIRQ
USB_OC5# USB_OC4#
USB_OC3#
1 2
R395 39_0402_5%
1 2
R391 39_0402_5%
1 2
R397 39_0402_5%
1 2
R384 39_0402_5%
1 2
R604 39_0402_5%@
1 2
R163 33_0402_5%
1 2
R565 10K_0402_5%
PCI_AD[0..31]
PCI_C_BE0# 30,31,33,34 PCI_C_BE1# 30,31,33,34 PCI_C_BE2# 30,31,33,34 PCI_C_BE3# 30,31,33,34 PCI_FRAME# 30,31,33,34 PCI_DEVSEL# 30,31,33,34 PCI_ I RDY# 30,31,33,34 PCI_TRDY# 30,31,33,34 PCI_PAR 30,31,33,34 PCI_STOP# 30,31,33,34 PCI_PERR# 30,31,33,34 PCI_SERR# 30,31,33,34 PCI_REQ#0 34 PCI_REQ#1 30 PCI_REQ#2 31 PCI_REQ#3 33
PCI_GNT#0 34 PCI_GNT#1 30 PCI_GNT#2 31 PCI_GNT#3 33
PCI_CLKRUN# 30,31,33,37,38
12
LPC_AD0 37,38 LPC_AD1 37,38 LPC_AD2 37,38 LPC_AD3 37,38 LPC_FRAME# 37,38
LPC_DRQ1# 38 SIRQ 31,37,38
USB_OC4# 40 USB_OC3# 40
2
CLK_PCI_MINI 33 CLK_PCI_CBS 31 CLK_PCI_LPCEC 37 CLK_PCI_TVMD 34 CLK_PCI_LAN 30 CLK_PCI_SIO 38
1 2
C321 22P_0402_50V8J
PCI_AD[0.. 3 1] 28,30,31,33,34
+3V
+SB_VBAT
2
1
PCI_DEVSEL# PCI_SERR# PCI_PERR# PCI_PAR
PCI_IRDY# PCI_FRAME# PCI_TRDY# PCI_STOP#
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
PCI_GNT#3 PCI_GNT#2 PCI_GNT#0 PCI_GNT#1
PCI_REQ#2 PCI_REQ#3 PCI_REQ#1 PCI_REQ#0
PCI_REQ#4
PCI_GNT#4
LPC_AD0 LPC_AD2 LPC_AD1 LPC_AD3
LPC_DRQ1# LPC_DRQ0# LPC_FRAME# SIRQ
PCI_CLKRUN#
GPIO0
RP98
4 5 3 6 2 7 1 8
8.2K _8P4R_0804_5% RP99
4 5 3 6 2 7 1 8
8.2K _8P4R_0804_5%
1 2
R417 8.2K_0402_5%
1 2
R490 8.2K_0402_5%
1 2
R412 8.2K_0402_5%
1 2
R482 8.2K_0402_5%
RP101
8.2K _8P4R_0804_5%
4 5 3 6 2 7 1 8
RP100
8.2K _8P4R_0804_5%
4 5 3 6 2 7 1 8
1 2
R393 8.2K_0402_5%
1 2
R392 8.2K_0402_5%
RP129 15K_0804_8P4R_5%
RP128 10K_0804_8P4R_5%
R387 4.7K_0402_5%
R405 10K_0402_5%
+3VS
45 36 27 18
18 27 36 45
12
12
+3V
USB_OC5# USB_OC4# USB_OC3#
H_PWRGOOD H_CPUSLP# H_SMI# H_STPCLK# H_IGNNE# H_A20M# H_INIT# H_INTR H_NMI
**
1 2
R547 10K_0402_5%
1 2
R11 10K_0402_5%
1 2
R10 10K_0402_5%
12
C237 220P_0402_50V7K
12
C218 220P_0402_50V7K
12
C228 220P_0402_50V7K
12
C211 220P_0402_50V7K
12
C229 220P_0402_50V7K
12
C233 220P_0402_50V7K
12
C213 220P_0402_50V7K
12
C238 220P_0402_50V7K
12
C234 220P_0402_50V7K
Place Caps Close to CPU Socket
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2522
401318
星期五 二月
1
of
25 52, 18, 2005
Page 26
5
+3V
1
C764
12
D D
C C
B B
0.1U_0402_10V6K
2
R507
X2
10K_0402_5%
4
VDD
1
OE
48MHZ_4P_FN4800002
RP124
15K_0804_8P4R_5%
1 8 2 7 3 6 4 5
RP123
15K_0804_8P4R_5%
1 8 2 7 3 6 4 5
RP122
15K_0804_8P4R_5%
1 8 2 7 3 6 4 5
1 2
R594 100K_0402_5%
CLK_SB_14M
12
R401
10_0402_5%@
1
C678
15P_0402_50V8J@
2
OUT GND
3 2
USB20P4+ USB20P4­USB20P5+ USB20P5-
USB20P2+ USB20P2­USB20P3+ USB20P3-
USB20P0+ USB20P0­USB20P1+ USB20P1-
RSMRST#
AGP_STP#17
VTT_PWRGD16,28
1 2
R488 0_0402_5%
OSCLIN
SB_EEDO28 SB_EECLK28
RSMRST#37 CLK_SB_14M16
EC_FLASH#38 USB_OC2#40 SUSCLK28 USB_OC1#40 SB_SPKR35
AGP_STP#
D21
CH751H-40_SC76
R555 33_0402_5%
PIDERST#29 SIDERST#29
1 2
R504 12.4K_0603_1%
USB_OC0#40 USBP5+29 USBP5-29
USBP4+40 USBP4-40
USBP3+40 USBP3-40
USBP2+40 USBP2-40
USBP1+40 USBP1-40
USBP0+40 USBP0-40
MII_TXD328 MII_TXD228 MII_TXD128 MII_TXD028
MII_TXEN28
+3V
RSMRST# CLK_SB_14M
+3V
FLASH# USB_OC2# SUSCLK USB_OC1# SB_SPKR
2 1
12
4
OSCLIN USB_RCOMP
USB_OC0# USB20P5+ USB20P5-
USB20P4+ USB20P4-
USB20P3+ USB20P3-
USB20P2+ USB20P2-
USB20P1+ USB20P1-
USB20P0+ USB20P0-
12
R558 10K_0402_5%
R492 10K_0402_5%
12
12
R549 10K_0402_5%
12
R548 10K_0402_5%
AGP_STP#_R AGP_BUSY#_R GHI#
U39B
P3
USBCLK/CLK48
R1
USB_RCOMP
P1
USB_VREFOUT
N4
USB_ATEST1
N3
USB_ATEST0
P4
USBOC0#/GPM7
M2
USB_HSDP5+
M1
USB_FLDP5+
N2
USB_HSDM5-
N1
USB_FLDM5-
L4
USB_HSDP4+
L3
USB_FLDP4+
M4
USB_HSDM4-
M3
USB_FLDM4-
K2
USB_HSDP3+
K1
USB_FLDP3+
L2
USB_HSDM3-
L1
USB_FLDM3-
H2
USB_HSDP2+
H1
USB_FLDP2+
J2
USB_HSDM2-
J1
USB_FLDM2-
G3
USB_HSDP1+
J3
USB_FLDP1+
H3
USB_HSDM1-
K3
USB_FLDM1-
F1
USB_HSDP0+
F2
USB_FLDP0+
G1
USB_HSDM0-
G2
USB_FLDM0-
R5
MCOL
W1
MCRS
V4
MDCK
V2
MDIO
T1
RX_CLK
T3
RXD3
U2
RXD2
T5
RXD1
W4
RXD0
T2
RX_DV
U1
RX_ERR
T4
TX_CLK
U4
TXD3
V1
TXD2
U3
TXD1
V3
TXD0
W2
TX_EN
W3
PHY_PD
U5
PHY_RST#
Y7
CLK_25M
P2
EE_CS
R3
EE_DI
R2
EE_DO
R4
EE_CK
AB9
RSMRST#
A23
OSC_IN
W6
SIO_CLK
AB2
BLINK/GPM0
AA3
FANOUT1/USBOC2#/GPM2
W11
32KHZ_IN/GPM3
AB1
USBOC1#/GPM4
Y4
SPEAKER/GPM5
AA1
FANOUT0/GPM6
AC1
GPIO_X0/AGP_STP#
AC6
GPIO_X1/AGP_BUSY#
AC2
GPIO_X2/GHI#
AC3
GPIO_X3/VGATE
AC4
GPIO_X4
AC5
GPIO_X5
South bridge SB200
SB200 SB
Part 2 of 3
ACPI / WAKE UP EVENTS
USB INTERFACE
PRIMARY ATA 66/100
ETHERNET MIIEEPROMCLK / RST
SECONDARY ATA 66/100
GPIOGPIO_XTRA
TALERT#/ETH_TALERT#
PME#/EXT_EVNT0#
RI#/EXT_EVNT1#
SLP_S3# SLP_S5#
PWR_BTN#
PWR_GOOD
PCI_REQACT#
SUS_STAT#
TEST1 TEST0
GA20_IN/GEVNT0#
KB_RST#/GEVNT1#
SMB_ALERT#/GEVNT2#
LPC_PME#/GEVNT3#
LPC_SMI#/GEVNT4# GEVENT5#/ETH_VALERT# GEVENT6#/ETH_FALERT# GEVENT7#/ETH_CALERT#
GPOC0#/SCL0 GPOC1#/SDA0 GPOC2#/SCL1 GPOC3#/SDA1
RTC_IRQ#/PWR_STRP
PIDE_IORDY
PIDE_IRQ
PIDE_A0 PIDE_A1 PIDE_A2
PIDE_DACK#
PIDE_DRQ PIDE_IOR#
PIDE_IOW#
PIDE_CS1# PIDE_CS3#
PIDE_D0 PIDE_D1 PIDE_D2 PIDE_D3 PIDE_D4 PIDE_D5 PIDE_D6 PIDE_D7 PIDE_D8
PIDE_D9 PIDE_D10 PIDE_D11 PIDE_D12 PIDE_D13 PIDE_D14 PIDE_D15
SIDE_IORDY
SIDE_IRQ
SIDE_A0
SIDE_A1
SIDE_A2
SIDE_DACK#
SIDE_DRQ SIDE_IOR#
SIDE_IOW#
SIDE_CS1# SIDE_CS3#
SIDE_D0
SIDE_D1
SIDE_D2
SIDE_D3
SIDE_D4
SIDE_D5
SIDE_D6
SIDE_D7
SIDE_D8
SIDE_D9 SIDE_D10 SIDE_D11 SIDE_D12 SIDE_D13 SIDE_D14 SIDE_D15
AC_BITCLK AC_SDOUT
AC_SDIN0 AC_SDIN1
AC97
AC_SDIN2
AC_SYNC AC_RST#
SPDIF_OUT
3
SB_EC_THERM# SB_EC_THERM#
AB4
SB_PM_BATLOW#
AC9
RI#
AC7
PM_SLP_S3#
AA11
PM_SLP_S5#
AB10
PBTN_OUT#
AA10
SB_PWRGD
Y11
PCI_ACT_REQ#
C21
SUS_STAT#
Y10
SB_TEST1
AA5
SB_TEST0
AA6
SB_GA20
Y5
SB_KBRST#
AA4
SB_AC_IN
AB3
SB_EC_SWI#
Y6
LPC_SMI#
W5
SB_EC_SMI#
Y8
SB_SCI#
AA7
SB_LID_OUT#
AB6
SMCLK
AA12
SMDATA
W12
SMB_CK_CLK2_SB
Y12
SMB_CK_DAT2_SB
AB12
PWR_STRP
AA8
IDE_PDIORDY
AB17
IDE_IRQA
AC16
IDE_PDA0
AB15
IDE_PDA1
AB16
IDE_PDA2
AC15
IDE_PDDACK#
Y16
IDE_PDDREQ
AA17
IDE_PDIOR#
AA16
IDE_PDIOW#
AC17
IDE_PDCS1#
Y15
IDE_PDCS3#
AA15
IDE_PDD0
AC18
IDE_PDD1
AA18
IDE_PDD2
AC19
IDE_PDD3
AA19
IDE_PDD4
AC20
IDE_PDD5
AA20
IDE_PDD6
AC21
IDE_PDD7
AB21
IDE_PDD8
AA21
IDE_PDD9
Y20
IDE_PDD10
AB20
IDE_PDD11
Y19
IDE_PDD12
AB19
IDE_PDD13
Y18
IDE_PDD14
AB18
IDE_PDD15
Y17
IDE_SDIORDY
AA23
IDE_IRQB
AA22
IDE_SDA0
AC23
IDE_SDA1
Y21
IDE_SDA2
AB23
IDE_SDDACK#
Y22
IDE_SDDREQ
W21
IDE_SDIOR#
Y23
IDE_SDIOW#
W20
IDE_SDCS1#
AC22
IDE_SDCS3#
AB22
IDE_SDD0
W23
IDE_SDD1
V21
IDE_SDD2
V23
IDE_SDD3
U21
IDE_SDD4
U23
IDE_SDD5
T21
IDE_SDD6
T23
IDE_SDD7
R21
IDE_SDD8
R20
IDE_SDD9
T22
IDE_SDD10
T20
IDE_SDD11
U22
IDE_SDD12
U20
IDE_SDD13
V22
IDE_SDD14
V20
IDE_SDD15
W22
IAC_BITCLK
E1 E2 Y1 Y2 Y3
R443 33_0402_5%
E3 V5 E5
R432 0_0402_5%
1 2
1 2
PM_SLP_S3# 37 PM_SLP_S5# 37 PBTN_OUT# 37 SB_PWRGD 28
SMCLK 13,14,16 SMDATA 13,14,16
PWR_STRP 28 IDE_PDIORDY 29
IDE_IRQA 29 IDE_PDA0 29 IDE_PDA1 29 IDE_PDA2 29 IDE_PDDACK# 29 IDE_PDDREQ 29 IDE_PDIOR# 29 IDE_PDIOW# 29 IDE_PDCS1# 29 IDE_PDCS3# 29
IDE_PDD[0..15]
IDE_SDIORDY 29 IDE_IRQB 29 IDE_SDA0 29 IDE_SDA1 29 IDE_SDA2 29 IDE_SDDACK# 29 IDE_SDDREQ 29 IDE_SDIOR# 29 IDE_SDIOW# 29 IDE_SDCS1# 29 IDE_SDCS3# 29
IDE_SDD[0..15]
IDE_PDD[0..15] 29
IDE_SDD[0..15] 29
ICH_AC_BITCLK ICH_AC_SDOUT ICH_AC_SDIN0 ICH_AC_SDIN1 ICH_AC_SDIN2 ICH_AC_SYNC IAC_RST# SPDIF_OUT
2
D28 CH751H-40_SC76
SB_EC_SWI# SB_GA20 GATEA20 SB_KBRST#
SB_EC_SMI# SB_SCI# EC_SCI# SB_LID_OUT# SB_PM_BATLOW# SB_BATLOW#
ICH_AC_BITCLK 33,35 ICH_AC_SDOUT 28,33,35 ICH_AC_SDIN0 35 ICH_AC_SDIN1 33
ICH_A C_SYNC 28,33,35 IAC_RST# 33,35
SPDIF_OUT 28
2 1
D29 CH751H-40_SC76
2 1
D25 CH751H-40_SC76
2 1
D27 CH751H-40_SC76
2 1
D26 CH751H-40_SC76
2 1
D32 CH751H-40_SC76
2 1
D31 CH751H-40_SC76
2 1
D30 CH751H-40_SC76
2 1
D22 CH751H-40_SC76
2 1
PM_SLP_S5# PBTN_OUT# PM_SLP_S3#
SB_SCI# SB_EC_SMI# AGP_BUSY#_R SB_PM_BATLOW#
SB_KBRST# SB_EC_THERM# SB_EC_SWI# SB_LID_OUT#
RI# SB_AC_IN PCI_ACT_REQ#
SB_GA20 GHI# AGP_STP#_R LPC_SMI#
SMB_CK_DAT2_SB SMB_CK_CLK2_SB SMCLK SMDATA
AGP_STP# AGP_BUSY#
SB_TEST1 SB_TEST0 ICH_AC_BITCLK ICH_AC_SDIN2 ICH_AC_SDIN1 ICH_AC_SDIN0
USB_OC0# USB_OC1# USB_OC2#
IAC_RST#
EC_THRM# EC_SWI#
KBRST# ACINSB_AC_IN EC_SMI#
EC_LID_OUT#
RP126 10K_0804_8P4R_5%
RP132 10K_0804_8P4R_5%
1 8 2 7 3 6 4 5
RP131 10K_0804_8P4R_5%
1 8 2 7 3 6 4 5
1 2
R559 10K_0402_5%
1 2
R569 10K_0402_5%
1 2
R399 10K_0402_5%
RP130 10K_0804_8P4R_5%
RP127 2.2K_0804_8P4R_5%
R552 8.2K_0402_5%
1 2
R586 10K_0402_5%
1 2
R556 8.2K_0402_5%
1 2
R557 8.2K_0402_5%
1 2
R424 8.2K_0402_5%
1 2
R545 8.2K_0402_5%
1 2
R543 8.2K_0402_5%
1 2
R544 8.2K_0402_5%
1 2
R8 10K_0402_5%
1 2
R9 10K_0402_5%
1 2
R184 10K_0402_5%
1 2
R514 8.2K_0402_5%
1 2
18 27 36 45
45 36 27 18
18 27 36 45
1
EC_THRM# 37 EC_SWI# 37 GATEA20 37 KBRST# 37 ACIN 37,42,44 EC_SMI# 37 EC_SCI# 37 LID_SWOUT# 37 SB_BATLOW# 37
+3VALW_SB
+3V
+3VS
+3VS
+3V
+3V
+2.5V +1.8VS
4
+2.5V +3VS
4.7K_0402_5% R587
@
1 2 2
Q30
@
MMBT3904_SOT23
3 1
POP For 150A DEPOP For 150G
12
10K_0402_5% R596
SUS_STAT#
AGP_SUS_STAT# 17
NBRST#25 NB_RST# 9,17
3
+3VS
*
A A
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
R595 1K_0402_5%
1 2
AGP_BUSY#_R
2
G
1 3
D
S
Q29
2N7002_SOT23
5
AGP_BUSY#
AGP_BUSY# 17
SUS_STAT#
R589 27K_0402_5%
D23
1 2
CH751H-40_SC76
D24
CH751H-40_SC76
1 2
R573 270K_0402_5%
R590 27K_0402_5%
1 2
21
21
1 2
NB_RST#
R593 330K_0402_5%
NB_SUS_STAT# 9
IAC_BITCLK
12
R431
10_0402_5%@
1
C706
15P_0402_50V8J@
2
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2522
星期五 二月
401318
1
of
26 52, 18, 2005
Page 27
5
+3VS
1
C339
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C340
2
1
C346
2
0.1U_0402_10V6K
22U_1206_10V4Z
1
C748
D D
22U_1206_10V4Z
C754
2
1
1
C349
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
C347
+2.5VS
C366
22U_1206_10V4Z
1
C371
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C373
2
1
C362
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C358
2
1
2
1
C361
2
0.1U_0402_10V6K
0.1U_0402_10V6K
C357
+2.5V
0.1U_0402_10V6K
1
C728
22U_1206_10V4Z
C C
1
C432
2
2
1
C416
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C415
2
0.1U_0402_10V6K
1
C351
2
+3V
0.1U_0402_10V6K
1
1
C412
C819
22U_1206_10V4Z
2
2
+3V
R185
1 2
FBM-10-201209-260-T_0805
B B
1U_0603_10V4Z
+3V
R456
1 2
FBM-10-201209-260-T_0805
22U_1206_10V4Z
0.1U_0402_10V6K
1
C420
C417
2
0.1U_0402_10V6K
+3V_AVDDC
1
C413
2
+3V_AVDDUSB
1
C747
2
1
2
0.01U_0402_25V4Z
1
C381
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C354
C363
2
0.1U_0402_10V6K
1
C418
0.1U_0402_10V6K
2
1
C376
2
0.1U_0402_10V6K
1
C341
2
1000P_0402_50V7K
1
2
0.1U_0402_10V6K
+2.5VS +2.5V_AVDDCK
R378
1 2
FBM-10-201209-260-T_0805
1U_0603_10V4Z
A A
5
C672
1
2
0.01U_0402_25V4Z
1
C684
2
0.1U_0402_10V6K
1
C687
2
1000P_0402_50V7K
0.1U_0402_10V6K
1
C345
2
1
C356
2
0.1U_0402_10V6K
C715
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C382
2
0.1U_0402_10V6K
1
C359
C342
2
1
C681
2
4
0.1U_0402_10V6K
1
C338
2
1
C355
0.1U_0402_10V6K
2
1
C409
2
0.1U_0402_10V6K
1
2
1
C408
2
0.1U_0402_10V6K
1
2
ATI request CLOSE TO L6,H6,J6
+2.5V
1
2
1
C375
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C380
2
ATI request
+3V
0.1U_0402_10V6K
1
C433
1
2
C419
2
ATI request
+3V_AVDDC
ATI request
+3V_AVDDUSB
1
1
C353
2
2
0.1U_0402_10V6K
ATI request
+2.5V_AVDDCK
1
2
4
0.1U_0402_10V6K
1
C344
2
1
C430 10U_0805_10V4Z
2
1
+
C743 47U_B_6.3VM
2
C667 22U_1206_10V4Z
0.1U_0402_10V6K
1
C348
C370
2
0.1U_0402_10V6K
0.01U_0402_25V4Z
0.01U_0402_25V4Z
3
2
+3VS
0.1U_0402_10V6K
1
2
1
C367
0.1U_0402_10V6K
2
1
C414
2
0.1U_0402_10V6K
1
C429
2
ATI request
+3VS
C431
0.01U_0402_25V4Z
1
1
C350
2
2
0.01U_0402_25V4Z
C352
1
C428
2
0.01U_0402_25V4Z
1
2
1
C368
0.01U_0402_25V4Z
2
+2.5VS
ATI request
+2.5VS
0.01U_0402_25V4Z
1
C372
1
C378
C374
2
2
0.01U_0402_25V4Z
+3VALW_SB
1U_0603_10V4Z
2
1
C863
+3VALW
1
C337
2
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
4.7U_0805_10V4Z
1
2
1 3
+3VALW
1
C379
0.01U_0402_25V4Z
2
+3VS
2 1
D17 CH751H-40_SC76
U31
VOUT
VIN SHDN GND2BYP
G914E_SOT23-5
LID_S5
+2.5VALW
5 4
R630 0_0603_5%
1 2
S
G
2
+5VS
12
R414 1K_0402_5%
1
2
1
C449
0.01U_0402_25V4Z
2
+3VALW_SB
13
D
Q49
@
AOS3401_SOT23
+3V_AVDDC
+3V_AVDDUSB
+5VS_VREF
+2.5V_AVDDCK
C695
+3VALW_SB
1U_0603_10V4Z
+2.5V
+3V
+2.5VS
+2.5VALW
0.1U_0402_10V6K
LID_SW37 PM_SLP_S537
C435
1
2
2
E11 E12 E15
F11 F12 F15 F16 F17
G18 G19 H18
H19 M18 M19
N18
N19
T18
T19
U18
U19
V17
V18 W17 W18
J10 J11 J13 J14
K15
L15 N15 P15 R10
R11 R13 R14
V13
W13
V12
V10 V11
W9
W10
D19
A21
AA9
1
C439
0.1U_0402_10V6K
2
+5VALW
1
B
2
A
U39C
VDDQ VDDQ VDDQ
E7
VDDQ
E8
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
F7
VDDQ
F8
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE
K9
VDD_CORE VDD_CORE
L9
VDD_CORE VDD_CORE
N9
VDD_CORE VDD_CORE
P9
VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE
P6
STB_2.5V
R6
STB_2.5V STB_2.5V STB_2.5V STB_2.5V
L6
VDD_USB
H6
VDD_USB
J6
VDD_USB
P5
AVDDC
T6
STB_3.3V
U6
STB_3.3V
V9
STB_3.3V STB_3.3V STB_3.3V STB_3.3V STB_3.3V
F4
AVDDTX0
J4
AVDDTX1
K5
AVDDTX2
F3
AVDDRX0
K4
AVDDRX1
L5
AVDDRX2 VREF_CPU
D1
5V_VREF AVDD_CK
Y9
S5_2.5V S5_3.3V
South bridge SB200
5
P
Y
G
U59
3
TC7SH08FU_SSOP5
1
SB200 SB
Part 3 of 3
400mA
175mA
48mA
128mA
6mA
125mA
1mA
2.6mA 7mA 1mA
POWER
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS_USB VSS_USB
AVSSC
AVSSRX2 AVSSRX1 AVSSRX0 AVSSTX2 AVSSTX1 AVSSTX0
AVSSCK
E10 E13 E14 E6 E9 F10 F13 F14 F18 F6 F9 G6 J12 J15 J18 J19 J9 K10 K11 K12 K13 K14 K18 K19 L10 L11 L12 L13 L14 L18 L19 M10 M11 M12 M13 M14 M15 M6 M9 N10 N11 N12 N13 N14 N6 P10 P11 P12 P13 P14 P18 P19 R12 R15 R18 R19 R9 V14 V15 V16 V19 V6 V7 V8 W14 W15 W16 W19 W7 W8 H5 G5
N5 M5
J5 G4 K6 H4 F5
A22
normal
SUSP
LIDSW#
S5#
LIDSW
4
LID_S5
LID_S5 29
S5
LID_S5
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2522
401318
星期五 二月
1
of
27 52, 18, 2005
Page 28
5
4
3
2
1
R525
O6I
+3VS
12
@
10K_0402_5%
R441 10K_0402_5%
1 2
ICH_AC_SYNC
INIT ACTIVE HIGH
INIT ACTIVE LOW (PIII)
DEFAULT
+3VALW +3V +3V
D D
PCI_AD2625,30,31,33,34
Ra
Rb
+3VS
12
12
R451 10K_0402_5%
R452
10K_0402_5%@
PWR_STRP26 SB_EEDO26 SB_EECLK26 ICH_AC_SYNC26,33,35 ICH_AC_SDOUT26,33,35 SPDIF_OUT26
MII_TXEN26 MII_TXD326 MII_TXD226 MII_TXD126 MII_TXD026 SUSCLK26
12
R579 10K_0402_5%
12
@
10K_0402_5%
R584
Ra for KB910 Rb for TI 87951
C C
12
R567
B B
10K_0402_5%
VGATE37,48
1M_0402_5%
12
R572
@
R560
1K_0402_5%
12
REQUIRED SYSTEM STRAPS
MANUAL PWR ON
DEFAULT
PWR
ON
+3V+3VS
1
B
2
A
1 2
R568
0_0402_5%@
STRAP HIGH
STRAP LOW
C806
0.1U_0402_16V4Z
5
U46
P
4
Y
G
TC7SH08FU_SSOP5
3
12
R509
@
10K_0402_5%
12
R508 10K_0402_5%
IGN DEBUG SPEEDSTEP FREQLTCH
SB_EEDO
DEBUG STRAPS
IGNORE DEBUG STRAPS
DEFAULT
1 2
R553 150K_0402_1%
C807
0.1U_0402_10V6K
VTT_PWRGD 16,26
12
@
10K_0402_5%
12
R518 10K_0402_5%
SB_EECLK
ROM ON PCI BUS
ROM ON LPC BUS
DEFAULT
14
U47C
P
5
G
1
7
2
SN74LVC14APWLE_TSSOP14
+3VS +3VS
9
2
G
33MHz NB BUS
HI SPEED A-LINK
DEFAULT
14
U47D
P
G
7
+3VS
12
R576 1K_0402_5%
13
D
S
12
R438
@
10K_0402_5%
12
R437 10K_0402_5%
O8I
150K_0402_1%
*
Q32 2N7002_SOT23
1 2
R440
SN74LVC14APWLE_TSSOP14
12
12
SIO 24MHzUSE
SIO 48MHzAUTO
DEFAULT
R591
0.47U_0603_10V7K
12
R581 47K_0402_5%
R436
@
10K_0402_5%
R430 10K_0402_5%
C823
NB_PWRGD 9
CPU_STP#
ENABLE SPEED STEP
DISABLE SPEED STEP
DEFAULT
14
11
1
2
7
SN74LVC14APWLE_TSSOP14
+3V +3V +3V +3V +3V
12
12
MII_TXEN
DISABLE CPU FREQ SETTING
DEFAULT
ENABLE CPU FREQSETTING
U47E
P
O10I
G
R539 10K_0402_5%
R538
@
10K_0402_5%
+3V+3V +3V +3V
13
12
R531 10K_0402_5%
12
@
10K_0402_5%
R537
ETHERNET MI I _TXD[3:0]ICH_AC_SDOUT SPDIF_OUTPWR_STRP
PROCESSOR FREQ MULTIPLIER
14
U47F
P
R592
O12I
G
SN74LVC14APWLE_TSSOP14
7
1 2
47_0603_5%
12
R526 10K_0402_5%
12
R527
@
10K_0402_5%
12
12
R520 10K_0402_5%
R519
@
10K_0402_5%
12
R582
@
10K_0402_5%
12
R533 10K_0402_5%
12
R532
@
10K_0402_5%
SB_PWRGD 26
+3VALW
12
R580 10K_0402_5%
12
@
10K_0402_5%
SUSCLK
32KHZ OUTPUT FROM SB200 (INT RTC)
DEFAULT
32KHZ INPUT TO SB200 (EXT RTC)
R585
A A
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2522
401318
星期五 二月
1
of
28 52, 18, 2005
Page 29
5
+5VS
14
U51B
4
SIDERST#26 PCIRST#25,30,31,33,34,37,38
D D
PIDERST#26
I0
5
I1
9
I0
10
I1
P
6
O
G
74HCT08PW_TSSOP14
7
+5VS
14
U51C
P
8
O
G
74HCT08PW_TSSOP14
7
SD_IDERST#
HD_IDERST#
4
HDD_LED# CD_LED#
1
I0
2
I1
12
I0
13
I1
+5VS
14
U51A
P
3
O
G
74HCT08PW_TSSOP14
7
+5VS
14
U51D
P
11
O
G
74HCT08PW_TSSOP14
7
HDD_ACT#
HDD_ACT# 39
3
+5VS
1000P_0402_50V7K
1
1
C472
C474
2
2
Place close to HDD CONN.
2
1
+5VS
1000P_0402_50V7K
10U_0805_10V4Z
1U_0603_10V4Z
0.1U_0402_16V4Z
1
1
C469
C463
2
2
C451
0.1U_0402_16V4Z
1
1
C476
C450
2
2
10U_0805_10V4Z
1U_0603_10V4Z
1
1
C475
2
2
Place close to CD-ROM CONN.
R199
R222
+3VS
R227
5.6K_0402_5%
+3VS
R224
4.7K_0402_5%
1 2
12
5.6K_0402_5%
1 2
R215
8.2K_0402_5%
PD_IORDY PD_DREQ PD_IRQA PD_D7
12
R221 10K_0402_5%
HDD Connector
HD_IDERST# PD_D7 PD_D8 PD_D6 PD_D5
PD_D2 PD_D1
PD_DREQ PD_IOW# PD_IOR# PD_IORDY PD_DACK# PD_IRQA PD_A1 PD_A0 PD_CS#1 HDD_LED#
12
0.1U_0402_16V4Z
C470
+5VS +5VS
R220 510_0402_5%
2
1
CD-ROM Connector
SD_IDERST# SD_D7 SD_D6 SD_D5 SD_D4
+5VALW_CIR
1
C862
0.1U_0402_10V6K
2
SD_D3 SD_D2 SD_D1 SD_D0
SD_IOW# SD_IORDY SD_IRQB SD_A1 SD_A0 SD_CS#1 CD_LED#
SD_CSEL
1 2
12
SD_IORDY SD_DREQ SD_IRQB SD_D7
12
R201
R198
10K_0402_5%
1 2
8.2K_0402_5%
+5VS
+5VS
+5VALW
LID_S527
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
R191 10K_0402_5%@
1 2
R196 470_0402_5%@
BUZZER_OUT35 PC_TV#37
Q40 AOS3401_SOT23
S
G
2
12
13
D
JHDD1 SUYIN_200138FR044G219ZL
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44
JCDR1
1 3 5 7 9
11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40 414142 434344 454546 474748 494950
ACES_87216-5004
2
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50
PD_D9 PD_D10 PD_D11PD_D4 PD_D12PD_D3 PD_D13 PD_D14 PD_D15PD_D0
PRI_CSEL
PDIAG# PD_A2 PD_CS#3
SD_D8 SD_D9 SD_D10 SD_D11 SD_D12 SD_D13 SD_D14 SD_D15 SD_DREQ SD_IOR# SD_DACK# SDIAG# SD_A2 SD_CS#3
PIN 28: CSEL Grounted--As a Master Not Grounter--As a Slave
R223 470_0402_5%
1 2
R225 10K_0402_5%
1 2
T26 PAD@
+5VS
4.7U_0805_10V4Z
C473
1
2
R229
100K_0402_5%@
Layout Note: W=80 mils
12
Layout Note: W=80 mils
+5VS
+5VS +5VALW_CIR
USBP5+ 26 USBP5- 26
CIR_ONOFF# 37
Title
Size Document Number Rev
Date: Sheet
CIR Remote Control
Compal Electronics, Inc. SCHEMATIC, M /B LA-2522 401318
星期五 二月
1
29 52, 18, 2005
of
IDE_PDD[0..15]26
C C
B B
A A
IDE_SDD[0..15]26
5
IDE_PDD[0..15]
IDE_PDA026 IDE_PDA226 IDE_PDCS3#26 IDE_PDCS1#26
IDE_PDIOW#26 IDE_PDIOR#26 IDE_PDDACK#26 IDE_PDA126
IDE_PDDREQ26 IDE_IRQA26 IDE_PDIORDY26
IDE_SDD[0..15]
IDE_SDIOR#26 IDE_SDDACK#26 IDE_SDA226 IDE_SDCS3#26
IDE_SDCS1#26 IDE_SDA026 IDE_SDA126 IDE_SDIOW#26
IDE_SDDREQ26 IDE_IRQB26 IDE_SDIORDY26
RP91 33_0804_8P4R_5%
IDE_PDD1
RP89 33_0804_8P4R_5%
IDE_PDD10 IDE_PDD4
RP88 33_0804_8P4R_5%
IDE_PDD7 IDE_PDD8 IDE_PDD6 IDE_PDD9
RP90 33_0804_8P4R_5%
IDE_PDD3 IDE_PDD12 IDE_PDD2 IDE_PDD13
RP93 33_0804_8P4R_5%
IDE_PDA0 PD_A0 IDE_PDA2 PD_A2 IDE_PDCS3# PD_CS#3
RP92 33_0804_8P4R_5%
IDE_PDA1 PD_A1
R217 33_0603_1%
R219 33_0603_1%
R218 33_0603_1%
RP86 33_0804_8P4R_5%
IDE_SDD0
RP96 33_0804_8P4R_5%
IDE_SDD8 SD_D8
RP87 33_0804_8P4R_5%
IDE_SDD4 SD_D4
IDE_SDD7 SD_D7
RP95 33_0804_8P4R_5%
IDE_SDD12 SD_D12
RP94 33_0804_8P4R_5%
IDE_SDA2 SD_A2 IDE_SDCS3# SD_CS#3
RP85 33_0804_8P4R_5%
IDE_SDA1 SD_A1
R228 33_0603_1%
R193 33_0603_1%
R194 33_0603_1%
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
PD_D1 PD_D14IDE_PDD14 PD_D0IDE_PDD0 PD_D15IDE_PDD15
PD_D5IDE_PDD5 PD_D10 PD_D4 PD_D11IDE_PDD11
PD_D7 PD_D8 PD_D6 PD_D9
PD_D3 PD_D12 PD_D2 PD_D13
PD_CS#1
PD_IOW# PD_IOR# PD_DACK#
PD_DREQ PD_IRQA PD_IORDY
SD_D0 SD_D1IDE_SDD1 SD_D2IDE_SDD2 SD_D3IDE_SDD3
SD_D9IDE_SDD9 SD_D10IDE_SDD10 SD_D11IDE_SDD11
SD_D5IDE_SDD5 SD_D6IDE_SDD6
SD_D13IDE_SDD13 SD_D14IDE_SDD14 SD_D15IDE_SDD15
SD_IOR# SD_DACK#
SD_CS#1 SD_A0IDE_SDA0
SD_IOW#
SD_DREQ SD_IRQB SD_IORDY
4
4.7K_0402_5%
Page 30
5
4
3
2
1
+3V
L35
1 2
KC FBM_L11-201209-601LMT 0805
1
C639
1U_0603_10V6K
D D
C C
B B
A A
2
+LAN_IO
1
C598
0.1U_0402_10V6K
2
PCI_C_BE0#25,31,33,34 PCI_C_BE1#25,31,33,34 PCI_C_BE2#25,31,33,34 PCI_C_BE3#25,31,33,34
PCI_AD19
PCI_PAR25,31,33, 34 PCI_FRAME#25,31,33,34 PCI_IRDY#25,31,33,34 PCI_TRDY#25,31,33,34 PCI_DEVSEL#25,31,33,34 PCI_STOP#25,31,33,34
PCI_PERR#25,31,33,34 PCI_SERR#25,31,33,34
PCI_REQ#125 PCI_GNT#125
PCI_PIRQD#25,31,33 ICH_PME#31,33,37 PCIRST#25,29,31,33,34,37,38
CLK_PCI_LAN25 PCI_CLKRUN#25,31,33,37,38
1
2
PCI_AD[0..31]25,28,31,33,34
5
+LAN_IO
1
C617 1U_0603_10V6K
2
closed to chip about 200 mils
1
2
PCI_AD[0..31]
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
1 2
R320 0_0402_5%
PCIRST# CLK_PCI_LAN
R328 0_0402_5%@
C616
0.1U_0402_10V6K
C597
0.1U_0402_10V6K
104 103 102
98 97 96 95 93 90 89 87 86 85 83 82 79 59 58 57 55 53 50 49 47 43 42 40 39 37 36 34 33
92 77 60 44
46 76
61 63 67 68 69
70 75
30 29
25 31 27 28
65
12
17
128
21 38 51 66 81
91 101 119
35
52
80 100
1
C623
0.1U_0402_10V6K
2
U24
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE#0 C/BE#1 C/BE#2 C/BE#3
IDSEL PAR
FRAME# IRDY# TRDY# DEVSEL# STOP#
PERR# SERR#
REQ# GNT#
INTA# PME# RST# CLK
CLKRUN#
4
GND/VSS GND/VSS GND/VSS
GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST
GND GND GND GND
RTL8100CL_LQFP128
1
C624
0.1U_0402_10V6K
2
EEDO
AUX/EEDI
EESK EECS
LED0 LED1 LED2
NC/LED3
TXD+/MDI0+
TXD-/MDI0-
RXIN+/MDI1+
RXIN-/MDI1-
NC/MDI2+
NC/MDI2-
NC/MDI3+
NC/MDI3-
LWAKE
ISOLATE#
RTSET
NC/SMBCLK
NC/SMBDATA
NC/M66EN
NC/AVDDH
NC/HV
PCI I/F
NC/HSDAC+
NC/HG
NC/LG2
NC/LV2
NC/VSS NC/VSS
NC/GND NC/GND NC/GND NC/GND NC/GND
LAN I/F
NC/GND
CTRL25
RTT3/CRTL18
VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33
AVDD33/AVDDL AVDD33/AVDDL AVDD33/AVDDL
NC/AVDDL
VDD25/VDD18 VDD25/VDD18 VDD25/VDD18 VDD25/VDD18
NC/VDD18 NC/VDD18 NC/VDD18 NC/VDD18 NC/VDD18
Power
AVDD25/HSDAC-
2
C628
0.1U_0402_10V6K
1
+LAN_IO
108 109 111 106
117 115 114 113
LAN_TX0+
1
LAN_TX0-
2
LAN_RX1+
5
LAN_RX1-
6 14
15 18 19
XTALFB
121
X1
CLKOUT
122
X2
105 23
R313 5.6K_0603_1%
127
1 2 72 74
closed to chip
R329 1K_0402_1%@
88
1 2 10
120
R311 0_0402_5%
11
R319 0_0402_5%
123
R317 0_0402_5%
124 126
9 13
22 48 62 73 112 118
CTL25
8 125 26
41 56 71 84 94 107
3 7 20 16
32 54 78 99
24 45 64 110 116
+2.5V_LAN3
12
C866
0.1U_0402_10V6K
4
12
R325
3.6K_0402_5%
5.6k for 8100C
1 2 1 2 1 2
0.1U_0402_10V6K
2
C602
1
0.1U_0402_10V6K
2
C593
1
2
C867
1
0.1U_0402_10V6K
2
1
U28
4
DO
3
DI
2
SK
1
CS
AT93C46-10SI-2.7_SO8
+LAN_IO
2
C622
0.1U_0402_10V6K
1
+LAN_IO
2
C595
0.1U_0402_10V6K
1
2
C868
C614
1
0.1U_0402_10V6K
0.1U_0402_10V6K
1 2
L34 0_0603_5%
Layout Note 24ST0023P pls close to conn.
T29
1
TCT1
2
3 4 5
6
V_DAC
1 2
C540
0.1U_0402_16V4Z
+LAN_IO
5
GND
6
NC
7
NC
8
VCC
2
2
1
1
2
C626
0.1U_0402_10V6K
1
+3VS
12
R305
1K_0402_1%@
SUSP# 37,38,41,45,46
R306
15K_0402_1% @
1 2
+3V
3
1
3
Q25 2SB1188_SOT89
2
0.1U_0402_10V6K
1
2
+2.5V_LAN1
2
1
C632
CLKOUT XTALFB
25MHZ_20P_1BX25000CK1A C611 27P_0402_50V8J
1
Y2
1 2
C638 10U_1206_6.3V6M
2
@: DePop
L36 0_0805_5%
CTL25
+2.5V_LAN
C627
0.1U_0402_10V6K
+2.5V_LAN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMAT ION IT CON TAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
7
LAN_RX1+ RJ45_RX1+
8
9
10
LAN_TX0+ RJ45_TX0+
11
LAN_TX0- RJ45_TX0-
12
LAN_TX0+
LAN_TX0-
LAN_RX1+
LAN_RX1-
+2.5V_LAN
1 2
2
C613 27P_0402_50V8J
1
1:1
TD1+
TD1­TCT2
1:1
TD21+
TD2­TCT3
1:1
TD3+
TD3­TCT4
1:1
TD4+
TD4-
BOTH_24ST0023-3_24P
R287 49.9_0402_1%
1 2
R288 49.9_0402_1%
1 2
R289 49.9_0402_1%
1 2
R290 49.9_0402_1%
1 2
2
C629
0.1U_0402_10V6K
1
1 2
1 2
CLK_PCI_LAN
2
C548
0.01U_0402_16V7K
C549
0.01U_0402_16V7K
MCT1 MX1+
MX1­MCT2 MX2+
MX2­MCT3 MX3+
MX3­MCT4 MX4+
MX4-
12
R310 30_0402_5%
1
C594 22P_0402_50V8J
2
24 23
22 21 20
19 18 17
RJ45_RX1-LAN_RX1-
16 15 14
13
R6 75_0402_5%
1 2
R7 75_0402_5%
1 2
RJ45_TX0­RJ45_TX0+ RJ45_RX1+
R653 75_0402_5%
1 2
RJ45_RX1-
R654 75_0402_5%
1 2
2
C869 1000P_1206_2KV7K
1
Title
Size Document Number Rev
, 18, 2005
期五 二月
Date: Sheet
2
C486 1000P_1206_2KV7K
1
12
PR1­PR1+ PR2+ PR3+ PR3­PR2­PR4+ PR4-
1 2
1 2
1 2
1 2
11
LDE_YELLOW-
LDE_YELLOW+
SHLD113SHLD2
JLAN1
2 1 3 4 5 6 7 8
FOX_JM36113-L0H7-7F
C477 0.1U_0402_16V4Z
C478 0.1U_0402_16V4Z
C481 0.1U_0402_16V4Z
C480 0.1U_0402_16V4Z
Compal Electronics, Inc. SCHEMATIC, M/B LA-2522 401318
1
30 52
9
10
LED_GREEN
LED_ORANGE
14
C
of
Page 31
5
+3VS
U36B
W7
+2.5V_CORE
1
1
1
D D
C710
C704
2
2
0.01U_0402_16V7K
0.01U_0402_16V7K
PCI_AD[0..31]25,28,30,33,34
C C
PCIRST#25,29,30,33,34,37,38
B B
CLK_PCI_CBS25
C703
0.47U_0603_10V7K
CBS_RST#37
ICH_PME#30,33,37 PCI_CLKRUN#25,30,33,37,38
2
1
C699
2
0.47U_0603_10V7K
PCI_AD20
PCI_C_BE3#25,30,33,34 PCI_C_BE2#25,30,33,34 PCI_C_BE1#25,30,33,34 PCI_C_BE0#25,30,33,34
PCI_PAR25,30,33,34 PCI_FRAME#25,30,33,34
PCI_IRDY#25,30,33,34 PCI_TRDY#25,30,33,34 PCI_DEVSEL#25,30,33,34 PCI_STOP#25,30,33,34 PCI_PERR#25,30,33,34 PCI_SERR#25,30,33,34
PCI_REQ#225 PCI_GNT#225 PCI_PIRQD#25,30,33 PCI_PIRQC#25,33 PCI_PIRQB#25,34 PCI_PIRQA#11,17,25
R429 100K_0402_5%
PCI_AD[0..31]
1 2
R489 100_0402_5%
1 2
R458 0_0402_5%@
R480 0_0402_5% R481 10K_0402_5%
+3VS
0.01U_0402_16V7K
10U_0805_10V4Z
10U_0805_10V4Z
C769
C768
1
1
2
2
+3V
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAI NS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
0.01U_0402_16V7K
C771
C705
1
2
1 2
C767
1
1
2
2
L39 KC FBM-L11-201209-221LMAT_0805
1
C671
2
22U_1206_10V4Z
5
PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0
PCI_C_BE3# PCI_C_BE2# PCI_C_BE1# PCI_C_BE0#
PCI_PAR PCI_FRAME#
PCI_IRDY# PCI_TRDY# PCI_DEVSEL# PCI_STOP# PCI_PERR# PCI_SERR#
PCI_REQ#1 PCI_GNT#1
CBS_GRST# PCI_RST#
1 2
1 2
0.01U_0402_16V7K
C766
1
2
1
C683
2
0.1U_0402_16V4Z
+3V
12
CBS_IDSEL
0.01U_0402_16V7K
1
C688
2
0.1U_0402_16V4Z
VCC_PCI1
P10
VCC_PCI2
P11
VCC_PCI3
M6
VCC_RIN1
F19
VCC_RIN2
H1
VCC_ROUT1
G14
VCC_ROUT2
E19
REG_EN#
V3
AD31
W3
AD30
U4
AD29
V4
AD28
W4
AD27
U5
AD26
V5
AD25
W5
AD24
V6
AD23
W6
AD22
P7
AD21
R7
AD20
U7
AD19
V7
AD18
P8
AD17
R8
AD16
R11
AD15
U11
AD14
V11
AD13
W11
AD12
P12
AD11
R12
AD10
U12
AD9
V12
AD8
P13
AD7
R13
AD6
U13
AD5
V13
AD4
W13
AD3
U14
AD2
V14
AD1
W14
AD0
U6
IDSEL
R6
C/BE3#
U8
C/BE2#
W10
C/BE1#
W12
C/BE0#
V10
PAR
V8
FRAME#
W8
IRDY#
P9
TRDY#
R9
DEVSEL#
U9
STOP#
R10
PERR#
U10
SERR#
W2
REQ#
V2
GNT#
U3
INTD#
T1
INTC#
T2
INTB#
T3
INTA#
P3
GBRST#
U1
PCIRST#
V1
PCICLK
P5
RI_OUT#/PME#
U2
CLKRUN#
R5C842_CSP265P
INTA# : Card Socket A INTB# : Card Socket B INTC# : IEEE1394 INTD# : Memory Card
+3V_PHY
1
1
C691
C685
2
1000P_0402_50V7K
2
1000P_0402_50V7K
AS CLOSE AS POSSIBLE TO R5C842
4
F7
VCC_3V4
J19
VCC_3V3
K19
VCC_3V2
F8
VCC_3V1
A8
VCC_MD
TPBIAS0/NC
TPBN0/NC TPBP0/NC TPAN0/NC TPAP0/NC
TPBIAS1/NC
TPBN1/NC TPBP1/NC TPAN1/NC TPAP1/NC
CPS/NC VREF/NC REXT/NC
FIL0/NC
SPKROUT
HWSPND#
UDIO1 UDIO2 UDIO3 UDIO4 UDIO5
XI/NC
XO/NC
TEST AGND1/GND AGND2/GND AGND3/GND AGND4/GND AGND5/GND AGND6/GND
GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9
E11 E13 A18 B18
C13 A14 B14 A13 B13
C11 A12 B12 A11 B11
C12 C14 B15 A15
P6 N1 R1 R2 R3 R5 P1 P2
A17 B17 N2
A10 B10 C10 A16 B16 C15
F1 V9 W9 M19 K9 K10 K11 J10 L10
AVCC_PHY1/NC AVCC_PHY2/NC AVCC_PHY3/NC AVCC_PHY4/NC
PCI / MISC / 1394_OHCI PORTION
UDIO0/SRIRQ#
12
IEEE1394_TPBN0 IEEE1394_TPBP0 IEEE1394_TPAN0 IEEE1394_TPAP0
56.2_0402_1%
IEEE1394_TPBIAS0
0.01U_0402_16V7K
4
R316
C606
12
1
2
10U_0805_10V4Z
C712
C679
1
2
+3V_PHY
IEEE1394_TPBIAS0 IEEE1394_TPBN0 IEEE1394_TPBP0 IEEE1394_TPAN0 IEEE1394_TPAP0
+3V_PHY
12
C676 0.01U_0402_16V7K
12
R382 10K_0603_1%
1 2
C682
0.01U_0402_16V7K
12
R475 100K_0402_5%
CBS_SPK
12
R454 10K_0402_5%
1 2
R476 10K_0402_5%
1 2
R457 10K_0402_5%
R5C841XI R5C841XO
1 2
+3V
12
R471 100K_0402_5%
CBS_GRST#
1
C751 1U_0603_10V4Z
2
Z3008
12
R314
R312
56.2_0402_1%
C599
56.2_0402_1%
12
R318
56.2_0402_1%
1
C600
0.33U_0603_10V7K
2
270P_0402_50V7K
+3V
0.01U_0402_16V7K
C713
1
2
0.01U_0402_16V7K
0.01U_0402_16V7K
C690
C680
1
1
1
2
2
2
Layout Note: Shield GND as below: ====================== GND IEEE1394_TPBN0 IEEE1394_TPBP0 ====================== GND IEEE1394_TPAN0 IEEE1394_TPAP0 ====================== GND
Layout Note: Shield GND for VREF (PIN C12 of U12) REXT (PIN C14 of U12) FIL0 (PIN A15 of U12)
C585,R634 Close R5C842
C586 Close R5C842
+3V
CBS_SPK 35
CBS_SPND# 37
+3V
SIRQ 25,37,38
+3V +3V
C692
12
22P_0402_50V8J
Y4
24.576MHZ_16P_1BG24576CK1A C693
22P_0402_50V8J
12
Layout Note: Shield GND for R5C841XI R5C841XO
Layout Note: Y4,C692, C693 Should close to U36
12
1
R315
2
5.1K_0402_1%
Layout Note: Shield GND for IEEE1394_TPA and TPB
3
0.01U_0402_16V7K
CBS_BCCLK32
+3V
R503
1 2
100K_0402_5%
Layout Note: Shield GND for CBS_BCCLK CBS_ACCLK
J139A1 FOX_UV31413-WR50D-7F
1 2 3
6
4 5
3
CBS_BCCBE3#32 CBS_BCCBE2#32 CBS_BCCBE1#32 CBS_BCCBE0#32
CBS_BCPAR32 CBS_BCFRAME#32
CBS_BCTRDY#32 CBS_BCIRDY#32 CBS_BCSTOP#32 CBS_BCDEVSEL#32 CBS_BCBLOCK#32 CBS_BCPERR#32 CBS_BCSERR#32 CBS_BCREQ#32 CBS_BCGNT#32 CBS_BCSTSCHNG32 CBS_BCCLKRUN#32
CBS_BCINT#32 CBS_BCRST#32 CBS_BCAUDIO32
CBS_BCRSV3/D232 CBS_BCRSV2/A1832 CBS_BCRSVD/D1432
CBS_BCAD[0..31]
R415 22_0402_5%
CBS_BCVS132 CBS_BCVS232
BVPPEN0
BVPPEN132 BVPPEN032 BVCC5EN#32 BVCC3EN#32
SDDET#_XDDET0#32 MSDET#_XDDET1#32 XDCE#32 SDWP#_XDRB#32 SD_EN32 XDWP32 SDLED#_MSLED#_XDLED#39
SDCMD_MSBS_XDWE#32 SDCLK_MSCLK_XDRE#32
CBS_ACCD1#_INTERNAL CBS_ACCD2#_INTERNAL
CBS_BCCD1#_INTERNAL CBS_BCCD2#_INTERNAL
CBS_BCAD[0..31] 32
CBS_BCAD31 CBS_BCAD30 CBS_BCAD29 CBS_BCAD28 CBS_BCAD27 CBS_BCAD26 CBS_BCAD25 CBS_BCAD24 CBS_BCAD23 CBS_BCAD22 CBS_BCAD21 CBS_BCAD20 CBS_BCAD19 CBS_BCAD18 CBS_BCAD17 CBS_BCAD16 CBS_BCAD15 CBS_BCAD14 CBS_BCAD13 CBS_BCAD12 CBS_BCAD11 CBS_BCAD10 CBS_BCAD9 CBS_BCAD8 CBS_BCAD7 CBS_BCAD6 CBS_BCAD5 CBS_BCAD4 CBS_BCAD3 CBS_BCAD2 CBS_BCAD1 CBS_BCAD0
CBS_BCCBE3# CBS_BCCBE2# CBS_BCCBE1# CBS_BCCBE0#
CBS_BCPAR CBS_BCFRAME#
CBS_BCTRDY# CBS_BCIRDY# CBS_BCSTOP# CBS_BCDEVSEL# CBS_BCBLOCK# CBS_BCPERR# CBS_BCSERR# CBS_BCREQ# CBS_BCGNT# CBS_BCSTSCHNG CBS_BCCLKRUN# CBS_BCCLK_INTERNAL
12
CBS_BCINT# CBS_BCRST# CBS_BCAUDIO
CBS_BCRSV3/D2 CBS_BCRSV2/A18 CBS_BCRSV/D14
CBS_BCCD1#_INTERNAL CBS_BCCD2#_INTERNAL CBS_BCVS1 CBS_BCVS2
BVPPEN1 BVPPEN0 BVCC5EN# BVCC3EN#
SD_EN
0_0402_5%
R421
1 2
270P_0402_50V7K
C700
2
1
0_0402_5%
R444
1 2
270P_0402_50V7K
C716
2
1
C770
C686
U36A
N6 M2 M3 M5 L1 L3 L6 K2 K5
J1 J3
J6 H3 H2 H5 D2 C1 B1 C2 A2 A3 B3 C3 B4 B5 C5 A5 E5 C6 E6 F6 E7
K1 H6 D3 A4
D1 G3
G6 G5 F3 G1 E1 E2 K6 K3 F5 L2 N5 G2
F2
J2 L5 M1
E3 C4
C7 N3 B2
J5 B6
A6
P14 R14 R15 P15
A7 B7 B8 C8 E8 B9 A9
C9 E9 F9
R5C842_CSP265P
CBS_ACD2# CBS_ACD1#
R486
0_0402_5%
1 2
270P_0402_50V7K
2
1
CBS_BCD2# CBS_BCD1#
R403
0_0402_5%
1 2
270P_0402_50V7K
2
1
2
BCAD31/D10 BCAD30/D9 BCAD29/D1 BCAD28/D8 BCAD27/D0 BCAD26/A0 BCAD25/A1 BCAD24/A2 BCAD23/A3 BCAD22/A4 BCAD21/A5 BCAD20/A6 BCAD19/A25 BCAD18/A7 BCAD17/A24 BCAD16/A17 BCAD15/IOWR# BCAD14/A9 BCAD13/IORD# BCAD12/A11 BCAD11/OE# BCAD10/CE2# BCAD9/A10 BCAD8/D15 BCAD7/D7 BCAD6/D13 BCAD5/D6 BCAD4/D12 BCAD3/D5 BCAD2/D11 BCAD1/D4 BCAD0/D3
BCCBE3#/REG# BCCBE2#/A12 BCCBE1#/A8 BCCBE0/CE1#
BCPAR/A13 BCFRAME#/A23
BCTRDY#/A22 BCIRDY#/A15 BCSTOP/A20 BCDEVSEL#/A21 BCBLOCK#/A19 BCPERR#/A14 BCSERR#/WAIT# BCREQ#/INPACK# BCGNT#/WE# BCSTSCHG/BVD1_STSCHG# BCCLKRUN#/WP BCCLK/A16
BCINT#/RDY_IREQ BCRST#/RESET BCAUDIO/BVD2_SPKR# BCRSV3/D2
BCRSV2/A18 BCRSV1/D14
BCCD1/CD1# BCCD2#/CD2# BCVS1/VS1# BCVS2/VS2#
BUSBDP BUSBDM
BVPPEN1 BVPPEN0 BVCC5EN# BVCC3EN#
MDIO00 MDIO01 MDIO02 MDIO03 MDIO04 MDIO05 MDIO06
MDIO07 MDIO08 MDIO09
CBS_ACD2# 32 CBS_ACD1# 32
CBS_BCD2# 32 CBS_BCD1# 32
2
ACAD31/D10
ACAD30/D9 ACAD29/D1 ACAD28/D8 ACAD27/D0 ACAD26/A0 ACAD25/A1 ACAD24/A2 ACAD23/A3 ACAD22/A4 ACAD21/A5 ACAD20/A6
ACAD19/A25
ACAD18/A7 ACAD17/A24 ACAD16/A17
ACAD15/IOWD#
ACAD14/A9
ACAD13/IORD#
ACAD12/A11
ACAD11/OE#
ACAD10/CE2#
ACAD9/A10
ACAD8/D15
ACAD7/D7
ACAD6/D13
ACAD5/D6
ACAD4/D12
ACAD3/D5
ACAD2/D11
ACAD1/D4 ACAD0/D3
ACCBE3#/REG#
ACCBE2#/A12
ACCBE1#/A8
ACCBE0#/CE1#
ACPAR/A13
ACFRAME#/A23
ACTRDY#/A22
ACIRDY#/A15
ACSTOP#/A20
ACDEVSEL#/A21
ACBLOCK#/A19
CARDBUS / MEDIA CARD PORTION
ACPERR#/A14
ACSERR#/WAIT#
ACREQ#/INPACK#
ACGNT#/WE#
ACSTSCHG/BVD1_STSCHG#
ACCLKRUN#/WP
ACCLK/A16
ACINT#/RDY_IREQ
ACRST#/RESET
ACAUDIO/BVD2_SPKR#
ACRSV3/D2 ACRSV2/A18 ACRSV1/D14
ACCD1/CD1# ACCD2/CD2#
ACVS1/VS1# ACVS2/VS2#
AUSBDP AUSBDM
AVPPEN1
AVPPEN0 AVCC3EN# AVCC5EN#
MDIO14/NC MDIO15/NC MDIO16/NC MDIO17/NC MDIO18/NC MDIO19/NC
CLK_PCI_CBS
1
CBS_ACAD[0..31]
CBS_ACAD31
C18
CBS_ACAD30
D19
CBS_ACAD29
D18
CBS_ACAD28
D17
CBS_ACAD27
E18
CBS_ACAD26
F18
CBS_ACAD25
F15
CBS_ACAD24
G18
CBS_ACAD23
G15
CBS_ACAD22
H18
CBS_ACAD21
H15
CBS_ACAD20
J18
CBS_ACAD19
J17
CBS_ACAD18
J15
CBS_ACAD17
J14
CBS_ACAD16
N15
CBS_ACAD15
N19
CBS_ACAD14
P19
CBS_ACAD13
N18
CBS_ACAD12
P18
CBS_ACAD11
P17
CBS_ACAD10
R19
CBS_ACAD9
R18
CBS_ACAD8
R17
CBS_ACAD7
T17
CBS_ACAD6
U19
CBS_ACAD5
U18
CBS_ACAD4
V19
CBS_ACAD3
W18
CBS_ACAD2
V18
CBS_ACAD1
W17
CBS_ACAD0
U17
CBS_ACCBE3#
G19
CBS_ACCBE2#
K18
CBS_ACCBE1#
N14
CBS_ACCBE0#
T19
CBS_ACPAR
M14
CBS_ACFRAME#
K17
CBS_ACTRDY#
K14
CBS_ACIRDY#
K15
CBS_ACSTOP#
L15
CBS_ACDEVSEL#
L18
CBS_ACBLOCK#
M18
CBS_ACPERR#
M17
CBS_ACSERR#
H19
CBS_ACREQ#
G17
CBS_ACGNT#
L14
CBS_ACSTSCHNG
E17
CBS_ACCLKRUN#
C19
CBS_ACCLK_INTERNAL
L19
CBS_ACINT#
L17
CBS_ACRST#
H17
CBS_ACAUDIO
F17
CBS_ACRSV3/D2
C17
CBS_ACRSV2/A18
M15
CBS_ACRSV/D14
T18
CBS_ACCD1#_INTERNAL
V17
CBS_ACCD2#_INTERNAL
B19
CBS_ACVS1
N17
CBS_ACVS2
H14 V16
W16
AVPPEN1
U16
AVPPEN0
W15
AVCC3EN#
V15
AVCC5EN#
U15 E10
MDIO10
F10
MDIO11
F11
MDIO12
E12
MDIO13
F12 F13 E14 F14 E15 C16
Layout Note: Shield GND for CLK_PCI_CBS
12
R484 30_0402_5%
CLK_PCI_CBS_TERM
1
C765 22P_0402_50V8J
2
Title
Size Docu m e n t N umber Re v
401318
星期五
Date: Sheet
SDCLK_MSCLK_XDRE#
CBS_BCCLK CBS_ACCLK
Compal Electro nics, Inc. SCHEMATIC, M/B LA-2522
, 18, 2005
二月
CBS_ACAD[0..31] 32
CBS_ACCBE3# 32 CBS_ACCBE2# 32 CBS_ACCBE1# 32 CBS_ACCBE0# 32
CBS_ACPAR 32 CBS_ACFRAME# 32
CBS_ACTRDY# 32 CBS_ACIRDY# 32 CBS_ACSTOP# 32 CBS_ACDEVSEL# 32 CBS_ACBLOCK# 32 CBS_ACPERR# 32 CBS_ACSERR# 32
CBS_ACREQ# 32 CBS_ACGNT# 32 CBS_ACSTSCHNG 32 CBS_ACCLKRUN# 32
R455 22_0402_5%
12
1
2
12
CBS_ACINT# 32 CBS_ACRST# 32 CBS_ACAUDIO 32 CBS_ACRSV3/D2 32
CBS_ACRSV2/A18 32 CBS_ACRSVD/D14 32
CBS_ACVS1 32 CBS_ACVS2 32
R485
AVPPEN0
AVPPEN1 32 AVPPEN0 32 AVCC3EN# 32 AVCC5EN# 32
SDDATA0_MSDATA0_XDDATA0 32 SDDATA1_MSDATA1_XDDATA1 32 SDDATA2_MSDATA2_XDDATA2 32 SDDATA3_MSDATA3_XDDATA3 32
XDDATA4 32 XDDATA5 32 XDDATA6 32 XDDATA7 32 XDCLE 32 XDALE 32
R644
@
30_0402_5%
C864
@
22P_0402_50V8J
1
100K_0402_5%
31 52
CBS_ACCLK 32
1 2
12
@
30_0402_5%
1
@
22P_0402_50V8J
2
of
+3V
R645
C865
C
Page 32
5
+3V
12 12
12 12
C619
10
6 2
1 4
3
11 15
19 20
18 17
1
2
0.01U_0402_16V7K
U41
AVCC3IN AVCC5IN
AVCC3_EN AVCC5_EN
AEN0 AEN1
BVCC3IN BVCC5IN
BVCC3_EN BVCC5_EN
BEN0 BEN1
R5534V-E2-FB_SSOP20
0.1U_0402_16V4Z
1U_0603_10V6K
C799
0.1U_0402_16V4Z
C798
+SD_VCC
SD_EN31
C803
1
2
+3V
C802
1
2
1
@
1U_0805_25V4Z
2
XDDET0#
SDWP#_XDRB#31
1
2
0.1U_0402_16V4Z
C779
1U_0603_10V6K
1
2
0.1U_0402_16V4Z
C782
C859
MSDET#_XDDET1#
SDDET#_XDDET0#
+5V
C772
1
2
+5V
C776
1
2
R646 0_0805_5%
1 2
S
G
2
SD_EN
33K_0402_5%
1U_0603_16V4Z
1
2
1U_0603_16V4Z
1
2
13
D
Q39
@
AOS3401_SOT23
10K_0402_5%
12
R332
+3VS
12
R616
R642 0_0402_5%
5
AVCC3EN#31 AVCC5EN#31
AVPPEN031 AVPPEN131
BVCC3EN#31 BVCC5EN#31
BVPPEN031 BVPPEN131
+XD_VCC
1
C860
2.2U_0603_6.3V4Z
2
+3VS
U27
3 4
2
RT9701-CB_SOT23-5
D14 RB751V_SOD323
2 1
2 1
D13 RB751V_SOD323
4
2
G
1 3
D
S
Q52
@
2N7002_SOT23
1 2
VIN VIN/CE
GND
O
AVCC3EN# AVCC5EN#
AVPPEN0 AVPPEN1
BVCC3EN# BVCC5EN#
BVPPEN0 BVPPEN1
+3VS
12
+3VS
D
S
VOUT VOUT
R331 33K_0402_5%
3
G
I1 I0
P
5
13
@
2N7002_SOT23
R498 0_0402_5%
R499 0_0402_5%
R501 0_0402_5%
R500 0_0402_5%
SDDATA1_MSDATA1_XDDATA131
SDDATA2_MSDATA2_XDDATA231
1 5
XDDET0#
MSDET#_XDDET1#
1
SDDET#_XDDET0#
2
U60
@
TC7SH32FU_SSOP5
WP_SW
2
G
Q47
D D
C C
B B
A A
SDDET#_XDDET0#
SDDET#_XDDET0#
+SD_VCC
1
C621
2
1U_0603_10V4Z
4
Slot A Power Supply
Slot B Power Supply
SDDATA3_MSDATA3_XDDATA331 SDCMD_MSBS_XDWE#31
SDCLK_MSCLK_XDRE#31 SDDATA3_MSDATA3_XDDATA331 MSDET#_XDDET1#31
SDDATA2_MSDATA2_XDDATA231
SDDATA0_MSDATA0_XDDATA031 SDDATA1_MSDATA1_XDDATA131 SDCMD_MSBS_XDWE#31
SDCLK_MSCLK_XDRE#31 SDDATA0_MSDATA0_XDDATA031
+3VS
+3VS
4
AVCCOUT AVCCOUT
AVPPOUT
TST
BVCCOUT BVCCOUT
BVPPOUT
GND
U54
2
B
4
OE
SN74CBT1G384_SOT23-5
U55
2
B
4
OE
SN74CBT1G384_SOT23-5
SDDET#_XDDET0#31
1 2
R330 100K_0402_5%@
1 2
R327 100K_0402_5%@
3
CBS_ACAD[0..31]
CBS_AVCC
10U_0805_10V4Z
0.01U_0402_16V7K
C791
1
C795
C792
1
2
1
2
1
2
0.01U_0402_16V7K
CBS_BVCC
0.01U_0402_16V7K
C789
2
0.01U_0402_16V7K
1
1
2
2
JSD1
SD9
D2
SD1
CD/D3
SD2
CMD
SD3
VSS
MS10
VSS
MS9
VCC
MS8
SCLK
MS7
D3
MS6
INS
MS5
D2
MS4
D0
MS3
D1
MS2
BS
MS1
VSS
SD4
VDD
SD5
CLK
SD6
VSS
SD7
D0
SD8
D1
4
CD_SW
3
COMMDN
1
WP_SW
ALPS_SCDE1C0102
C790
10U_0805_10V4Z
C785
7 8
CBS_AVPP
9
5
13 14
12
16
+5V
VCC
A
GND
VCC
A
GND
0.1U_0402_16V4Z
C794
1
2
CBS_BVPP
0.1U_0402_16V4Z
C793
1
2
+5VS
5
SD_MS_XDDATA1
1 3
+5VS 5 1 3
SD_MS_XDDATA2
SD_MS_XDDATA2
+SD_VCC
MSDET#_XDDET1#
+SD_VCC
SD_MS_XDDATA1 SDDET#_XDDET0#
WP_SW
CBS_AVPP
3
CBS_ACD1#31
CBS_ACRSVD/D1431
CBS_ACCBE0#31
CBS_ACVS131
CBS_ACCBE1#31 CBS_ACRSV2/A1831 CBS_ACPAR31 CBS_ACBLOCK#31 CBS_ACPERR#31 CBS_ACSTOP#31
CBS_ACGNT#31 CBS_ACDEVSEL#31 CBS_ACINT#31
CBS_ACCLK31 CBS_ACTRDY#31 CBS_ACIRDY#31
CBS_ACFRAME#31 CBS_ACCBE2#31
CBS_ACVS231
CBS_ACRST#31 CBS_ACSERR#31 CBS_ACREQ#31
CBS_ACCBE3#31 CBS_ACAUDIO31 CBS_ACSTSCHNG31
CBS_ACRSV3/D231 CBS_ACCLKRUN#31
CBS_ACD2#31
GND
CD
R/-B
-RE
-CE
CLE
ALE
-WE
-WP GND
D0 D1 D2 D3 D4 D5 D6 D7
VCC
GND
XD1 XD0 XD2 XD3 XD4 XD5 XD6 XD7 XD8 XD9 XD10 XD11 XD12 XD13 XD14 XD15 XD16 XD17 XD18
2
CBS_ACAD[0..31] 31
CBS_ACD1# CBS_ACAD0 CBS_ACAD2 CBS_ACAD1 CBS_ACAD4 CBS_ACAD3
CBS_ACAD6 CBS_ACAD5 CBS_ACRSV/D14 CBS_ACAD7 CBS_ACAD8 CBS_ACCBE0# CBS_ACAD10
CBS_ACAD9 CBS_ACVS1 CBS_ACAD11 CBS_ACAD13 CBS_ACAD12 CBS_ACAD15 CBS_ACAD14
CBS_ACAD16 CBS_ACCBE1# CBS_ACRSV2/A18 CBS_ACPAR CBS_ACBLOCK# CBS_ACPERR# CBS_ACSTOP#
CBS_ACGNT# CBS_ACDEVSEL#
CBS_ACTRDY# CBS_ACIRDY#
CBS_ACFRAME# CBS_ACCBE2# CBS_ACAD17 CBS_ACAD18 CBS_ACAD19 CBS_ACAD20 CBS_ACVS2
CBS_ACAD21 CBS_ACAD22
CBS_ACSERR# CBS_ACAD23 CBS_ACREQ# CBS_ACAD24
CBS_ACCBE3# CBS_ACAD25
CBS_ACAD26 CBS_ACSTSCHNG CBS_ACAD27 CBS_ACAD28
CBS_ACAD29 CBS_ACAD30 CBS_ACRSV3/D2 CBS_ACAD31 CBS_ACCLKRUN# CBS_ACD2#
XDDET0#
150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100
99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
153 155 157 159
SDWP#_XDRB# 31 SDCLK_MSCLK_XDRE# 31 XDCE# 31 XDCLE 31 XDALE 31 SDCMD_MSBS_XDWE# 31 XDWP 31
SDDATA0_MSDATA0_XDDATA0 31 SDDATA1_MSDATA1_XDDATA1 31 SDDATA2_MSDATA2_XDDATA2 31 SDDATA3_MSDATA3_XDDATA3 31 XDDATA4 31 XDDATA5 31 XDDATA6 31 XDDATA7 31
+XD_VCC
JSD1 Pin1
2
THIS SHEET OF ENG INEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
JCBS1
GND GND ACCD1#/CD1# ACAD0/D3 ACAD2/D11 ACAD1/D4 ACAD4/D12 ACAD3/D5 GND ACAD6/D13 ACAD5/D6 ARFU/D14 ACAD7/D7 ACAD8/D15 ACCBE0#/CE1# ACAD10/CE2# GND ACAD9/A10 ACVS1/VS1# ACAD11/OE# ACAD13/IORD# ACAD12/A11 ACAD15/IOWR# ACAD14/A9 GND ACAD16/A17 ACCBE1#/A8 ARFU/A18 ACPAR/A13 ACBLOCK#/A19 ACPERR#/A14 ACSTOP#A20 GND ACGNT#/WE# ACDEVSEL#/A21 ACINT#/READY VCC NC VPP ACCLK/A16 ACTRDY#/A22 ACIRDY#/A15 GND ACFRAME#/A23 ACCBE2#/A12 ACAD17/A24 ACAD18/A7 ACAD19/A25 ACAD20/A6 ACVS2/VS2# GND ACAD21/A5 ACRST#/RESET ACAD22/A4 ACSERR#/WAIT# ACAD23/A3 ACREQ#/INPACK# ACAD24/A2 GND ACCBE3#/REG# ACAD25/A1 ACAUDIO/SPKR# ACAD26/A0 ACSTSCHG/STSCHG# ACAD27/D0 ACAD28/D8 GND ACAD29/D1 ACAD30/D9 ARFU/D2 ACAD31/D10 ACCLKRUN/WP ACCD2#/CD2# GND GND
GND GND GND GND
TYCO_6376045-1
GND GND
BCCD1#/CD1#
BCAD0/D3
BCAD2/D11
BCAD1/D4
BACD4/D12
BACD3/D5
GND
BCAD6/D13
BCAD5/D6 BRFU/D14 BCAD7/D7
BCAD8/D15
BCCBE0#CE1#
BCAD10/CE2#
GND
BCAD9/A10 BCVS1/VS1# BCAD11/OE#
BCAD13/IORD#
BCAD12/A11
BCAD15/OWR#
BCAD14/A9
GND BCAD16/A17 BCCBE1#/A8
BRFU/A18
BCPAR/A13
BCBLOCK#/A19
BCPERR#/A14 BCSTOP#/A20
GND
BCGNT#/WE#
BCDEVSEL#/A21
BCINT#/READY
VCC
BCCLK/A16
BCTRDY#/A22
BCIRDY#/A15
GND
BCFRAME#/A23
BCCBE2#/A12
BCAD17/A24
BCAD18/A7
BCAD19/A25
BCAD20/A6
BCVS2/VS2#
GND
BCAD21/A5
BCRST#/RESET
BCAD22/A4
BCSERR#/WAIT#
BCAD23/A3
BCREQ#/INPACK#
BCAD24/A2
GND
BCCBE3#/REG#
BCAD25/A1
BCAUDIO/SPKR#
BCAD26/A0
BCSTSCHG/STSCHG#
BCAD27/D0 BCAD28/D8
GND
BCAD29/D1 BCAD30/D9
BRFU/D2
BCAD31/D10
BCCLKRUN/WP
BCCD2#CD2#
GND
GND
GND
GND
GND
GND
VPP
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38
NC
37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
154 156 158 160
CBS_BCAD[0..31]
CBS_BCD1# CBS_BCAD0 CBS_BCAD2 CBS_BCAD1 CBS_BCAD4 CBS_BCAD3
CBS_BCAD6 CBS_BCAD5 CBS_BCRSV/D14 CBS_BCAD7 CBS_BCAD8 CBS_BCCBE0# CBS_BCAD10
CBS_BCAD9 CBS_BCVS1 CBS_BCAD11 CBS_BCAD13 CBS_BCAD12 CBS_BCAD15 CBS_BCAD14
CBS_BCAD16 CBS_BCCBE1#
CBS_BCRSV2/A18
CBS_BCPAR CBS_BCBLOCK# CBS_BCPERR# CBS_BCSTOP#
CBS_BCGNT#
CBS_BCDEVSEL#
CBS_BCTRDY# CBS_BCIRDY#
CBS_BCFRAME# CBS_BCCBE2# CBS_BCAD17 CBS_BCAD18 CBS_BCAD19 CBS_BCAD20 CBS_BCVS2
CBS_BCAD21 CBS_BCAD22
CBS_BCSERR# CBS_BCAD23 CBS_BCREQ# CBS_BCAD24
CBS_BCCBE3# CBS_BCAD25
CBS_BCAD26
CBS_BCSTSCHNG
CBS_BCAD27 CBS_BCAD28
CBS_BCAD29 CBS_BCAD30 CBS_BCRSV3/D2 CBS_BCAD31
CBS_BCCLKRUN#
CBS_BCD2#
CBS_ACRST#
CBS_BCRST#
+XD_VCC
12
R2
2.2K_0402_5%
XDCE#
+3VS
12
R620 33K_0402_5%
JSD1 Pin3
Short (L)
SDCMD_MSBS_XDWE#
SD UnWP SD WPO pen (H)
2
SDCLK_MSCLK_XDRE#
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc. SCHEMATIC, M /B LA-2522 401318
星期五 二月
1
CBS_BCD1# 31
CBS_BCRSVD/D14 31
CBS_BCCBE0# 31
CBS_BCVS1 31
CBS_BCCBE1# 31 CBS_BCRSV2/A18 31 CBS_BCPAR 31 CBS_BCBLOCK# 31 CBS_BCPERR# 31 CBS_BCSTOP# 31
CBS_BCGNT# 31 CBS_BCDEVSEL# 31 CBS_BCINT# 31
CBS_BCCLK 31 CBS_BCTRDY# 31 CBS_BCIRDY# 31
CBS_BCFRAME# 31 CBS_BCCBE2# 31
CBS_BCVS2 31
CBS_BCRST# 31 CBS_BCSERR# 31 CBS_BCREQ# 31
CBS_BCCBE3# 31 CBS_BCAUDIO 31 CBS_BCSTSCHNG 31
CBS_BCRSV3/D2 31 CBS_BCCLKRUN# 31
CBS_BCD2# 31
1
C709
0.01U_0402_16V7K
2
2
C707
0.01U_0402_16V7K
1
+3VS
12
R621 33K_0402_5%
1
CBS_BCAD[0..31] 31
CBS_BVCCCBS_AVCC CBS_BVPP
32 52, 18, 2005
of
Page 33
5
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5
D D
C C
B B
A A
PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
+3VS
2
C466
0.047U_0402_16V4Z
1
CLK_PCI_MINI
R209 30_0402_5%
1 2
CLK_PCI_MINI_TERM
2
C460 22P_0402_50V8J
1
5
PCI_AD[0.. 31 ] 25,28,30,31,34
0.047U_0402_16V4Z
2
C465
1
2
C464
1
0.047U_0402_16V4Z
WLAN_OFF#37,39 PCI_PIRQD#25,30,31
CLK_PCI_MINI25
PCI_REQ#325
@
T27 PAD
PCI_C_BE3#25,30,31,34
PCI_C_BE2#25,30,31,34 PCI_IRDY#25,30,31,34
PCI_CLKRUN#25,30,31,37,38 PCI_SERR#25,30,31,34
PCI_PERR#25,30,31,34 PCI_C_BE1#25,30,31,34
0.047U_0402_16V4Z
2
C459
1
+5VS
+5VS
0.047U_0402_16V4Z
4
WLAN_ACT1 WLAN_OFF#
PCI_PIRQD#
CLK_33M_MPCI PCI_REQ3# PCI_AD31
PCI_AD29 PCI_AD27
PCI_AD25 COEX2_WLAN_ACTIVE PCI_C_BE3# PCI_AD23
PCI_AD21 PCI_AD19
PCI_AD17 PCI_C_BE2# PCI_IRDY#
PCI_CLKRUN# PCI_SERR#
PCI_PERR# PCI_C_BE1# PCI_AD14
PCI_AD12 PCI_AD10
PCI_AD8 PCI_AD7
PCI_AD5 PCI_AD3 PCI_AD1
2
C458
0.1U_0402_16V4Z
1
0.047U_0402_16V4Z
2
C444
1
4
2
C445
1
+3VS
2
C443
1
0.047U_0402_16V4Z
JMPCI1
112
KEY KEY
334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152 535354 555556 575758 595960 616162 636364 656566 676768 696970 717172 737374 757576 777778 797980 818182 838384 858586 878788 898990 919192 939394 959596 979798 9999100
101
101
103
103
105
105
107
107
109
109
111
111
113
113
115
115
117
117
119
119
121
121
123
123
TYCO_1734064-3
2 4
6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102
102
104
104
106
106
108
108
110
110
112
112
114
114
116
116
118
118
120
120
122
122
124
124
2
C446
0.047U_0402_16V4Z
1
+3VS
WLAN_ACT2
PCI_PIRQC#
PCIRST# PCI_GNT3# ICH_PME#
COEX1_BT_ACTIVE PCI_AD30
PCI_AD28 PCI_AD26 PCI_AD24 MINIDSEL
PCI_AD22 PCI_AD20 PCI_PAR PCI_AD18 PCI_AD16
PCI_FRAME# PCI_TRDY# PCI_STOP#
PCI_DEVSEL# PCI_AD15
PCI_AD13 PCI_AD11
PCI_AD9 PCI_C_BE0#
PCI_AD6 PCI_AD4 PCI_AD2 PCI_AD0
+3V
2
C442
0.1U_0402_16V4Z
1
ICH_AC_SDOUT26,28,35
IAC_RST#26,35
3
+3VS
5
WLAN_ACT1 WLAN_ACT2
PCI_PIRQC# 25,31
PCIRST# 25,29,30,31,34,37,38 PCI_GNT#3 25 ICH_PME# 30,31,37
1 2
R187 100_0402_5%
PCI_PAR 25,30,31,34
PCI_FRAME# 25,30,31,34 PCI_TRDY# 25,30,31,34 PCI_STOP# 25,30,31,34
PCI_DEVSEL# 25,30,31,34
PCI_C_BE0# 25,30,31,34
R439 33_0402_5%
R182 22_0402_5%
ICH_AC_SDOUT_MDC
12
ICH_AC_RST#_MDC
12
R188 10K_0402_5%
PCI_AD18
+3V
2
I0
1
I1
12
U16
P
O
G
TC7SH32FU_SSOP5
3
1 3 5 7
9 11 13 15 17 19 21 23 25 27 29
2
4
+3V
2
C447
0.1U_0402_16V4Z
1
JMDC1 ACES_88018-3010L
MONO_OUT/PC_BEEP GND AUXA_RIGHT AUXA_LEFT CD_GND CD_RIGHT CD_LEFT GND
3.3Vaux GND
3.3Vmain AC97_SDATA_OUT AC97_RESET# GND AC97_MSTRCLK
GND131GND232GND333GND434GND535GND636GND737GND8
2
1
AUDIO_PWDN
MONO_PHONE
Bluetooth Enable
USB Data+
USB Data-
PRIMARY DN
AC97_SYNC AC97_SDATA_IN1 AC97_SDATA_IN0
AC97_BITCLK
MDC CONN.
THIS SHEET OF EN GINEE RING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
WLAN_LED 39
+5VS
C461
0.1U_0402_16V4Z
2 4 6 8
GND
10
+5V
12 14 16 18
5Vd
20
GND
22 24 26 28
GND
30
38
1
+5VS
12
R172
0_0402_5%@
1 2
C365
0.1U_0402_16V4Z@
+5VS_MDC
Definition
1 2
R173 10K_0402_5%
R176 22_0402_5% R177 22_0402_5% R178 22_0402_5%@
Title
Size Document Number Rev
星期五 二月
Date: Sheet
1 2 1 2 1 2
1 2
R180 33_0402_5%
Compal Electronics, Inc. SCHEMATIC, M /B LA-2522 401318
+3V
1
ICH_A C_SYNC 26,28,35 ICH_AC_SDIN1 26
ICH_AC_BITCLK 26,35
33 52, 18, 2005
of
Page 34
5
4
3
2
1
12
D D
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8
PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24
C C
PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_AD[0.. 3 1] 25,28,30,31,33
+1.5VS
CLK_PCI_TVMD
R98 30_0402_5%
+5VS
12
C199
0.1U_0402_16V4Z
+2.5VS
TV_VOICER35 TV_VOICEL 35
12
C126 0.1U_0402_16V4Z
PCI_PIRQB#25,31
CLK_PCI_TVMD25
PCI_REQ#025
PCI_C_BE3#25,30,31,33
PCI_C_BE2#25,30,31,33 PCI_IRDY#25,30,31,33
PCI_SERR#25,30,31,33 PCI_PERR#25,30,31,33
PCI_C_BE1#25,30,31,33
12
C216
0.1U_0402_16V4Z
TV_VOICER
PCI_PIRQB#
CLK_33M_MPCI PCI_REQ#0 PCI_AD31
PCI_AD29 PCI_AD27 PCI_AD25 PCI_C_BE3# PCI_AD23
PCI_AD21 PCI_AD19
PCI_AD17 PCI_C_BE2# PCI_IRDY#
PCI_SERR# PCI_PERR#
PCI_C_BE1# PCI_AD14
PCI_AD12 PCI_AD10
PCI_AD8 PCI_AD7
PCI_AD5 PCI_AD3
PCI_AD1
1 2
+3VS
R82
0_0402_5%
JTVMD1
102
TV_G1 TV_G2
100
98 96 94 92 90 88 86 84 82 80 78 76 74 72 70 68 66 64 62 60 58 56 54 52 50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10
8 6 4 2
GND A_GND
TV_R A_GND NC VCC5 NC NC NC INT# VCC3 GND PCICLK GND REQ# VCC3 AD31 AD29 AD27 AD25 C/BE3# AD23 GND AD21 AD19 GND AD17 C/BE2# IRDY# VCC1R5 SERR# GND PERR# C/BE1# AD14 GND AD12 AD10 GND AD08 AD07 VCC2R5 AD5 AD3 VCC2R5 AD1 NC NC NC NC NC
GND
A_GND
TV_L
A_GND
VCC5
GND
VCC3
PCIRST#
VCC3 GNT#
GND
AD30
VCC3
AD28 AD26 AD24
IDSEL
GND AD22 AD20
AD18 AD16
GND
FRAME#
TRDY# STOP#
VCC1R5
DEVSEL#
GND AD15 AD13 AD11
GND
C/BE0#
VCC2R5
GND
PAR
AD9
AD6 AD4 AD2 AD0
MOLEX_SD-47142-001
NC NC
NC NC
NC NC NC NC NC
12
+3VS
R81
0_0402_5%
101 99
97 95 93 91 89 87 85 83 81 79 77 75 73 71 69 67 65 63 61 59 57 55 53 51 49 47 45 43 41 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1
TV_VOICEL
PCIRST# PCI_GNT#0 PCI_AD30 PCI_AD28
PCI_AD26 PCI_AD24 TVDSEL PCI_AD21
PCI_AD22 PCI_AD20 PCI_PAR PCI_AD18 PCI_AD16
PCI_FRAME# PCI_TRDY# PCI_STOP#
PCI_DEVSEL# PCI_AD15
PCI_AD13 PCI_AD11
PCI_AD9 PCI_C_BE0#
PCI_AD6 PCI_AD4 PCI_AD2 PCI_AD0
PCIRST# 25,29,30,31,33,37,38 PCI_GNT#0 25
1 2
R112 100_0402_5%
PCI_PAR 25,30,31,33
PCI_FRAME# 25,30,31,33 PCI_TRDY# 25,30,31,33 PCI_STOP# 25,30,31,33
PCI_DEVSEL# 25,30,31,33
PCI_C_BE0# 25,30,31,33
12
C125
0.1U_0402_16V4Z
12
C203
0.1U_0402_16V4Z
12
C207
0.1U_0402_16V4Z
+5VS
+1.5VS
+2.5VS
B B
CLK_PCI_TVMD_TERM
2
C153 22P_0402_50V8J
1
+3VS
2
C150
0.047U_0402_16V4Z
A A
1
5
0.047U_0402_16V4Z
2
C151
1
0.047U_0402_16V4Z
2
C711
1
0.047U_0402_16V4Z
2
C169
1
4
2
C166
1
0.047U_0402_16V4Z
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc. SCHEMATIC, M /B LA-2522 401318
星期五 二月
34 52, 18, 2005
1
of
Page 35
5
+3V
14
U14A SN74LVC14APWLE_TSSOP14
P
BEEP#37
D D
CBS_SPK31
SB_SPKR26
C C
B B
A A
1
O2I
G
7
+3V
14
U14B SN74LVC14APWLE_TSSOP14
P
3
O4I
G
7
+3V
14
U14C SN74LVC14APWLE_TSSOP14
P
5
O6I
G
7
1 2
1 2
1 2
TV_VOICEL34 TV_VOICER34
1 2
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
C652
0.1U_0402_10V6K
R195 560_0402_5%
R202 560_0402_5%
R206 560_0402_5%
R207
@
10K_0402_5%
R536
0_1206_5%
C665
12
C452
12
C369
12
GNDA
12
BEEP_OFF#37
12
2 1
R183
4.7K_0402_5%
R181
4.7K_0402_5%
MIC136 MIC236
D12 RB751V_SOD323
GNDA 34,36
GND GNDA
5
@
12 12
4
+3V
5
1
P
B
2
A
G
3
TC7SH08FU_SSOP5
TV_VOICEL_L TV_VOICEL_R
4
+12V
12
R204
U52
Y
10K_0402_5%
1
C
Q14
4
2
B
2SC2411K_SC59
E
3
1 2
C434 2.2U_0603_6.3V4Z
1 2
C427 2.2U_0603_6.3V4Z
C441 1U_0603_10V6K
1 2
C436 1U_0603_10V6K
1 2
IAC_RST#26,33 ICH_AC_SYNC26,28,33 ICH_AC_SDOUT26,28,33
EAPD36,37,41 SPDIFO36
1
C455 10U_0805_10V4Z
2
BUZZER_OUT
R203
@
2.4K_0402_5%
1 2
R197 10K_0402_5%
1 2
R190 0_0402_5%
1 2
TV_VOICEL_LC TV_VOICEL_RC
R513 22_0402_5%
R189 4.7K_0402_5% R192 4.7K_0402_5%
ICH_AC_RST#
1 2
1 2
R214 22_0402_5%
1 2
R211 33_0402_5%
1 2 1 2
L27 0_0603_5% L28 0_0603_5%
R205
4.7K_0402_5%
1 2
12 12
3
BUZZER
BUZZER_OUT 29
U15
AVDD125AVDD2
14
AUX_L
15
AUX_R
16
JS1
17
JS0
23
LINE_IN_L
24
LINE_IN_R
18
CD_L
20
CD_R
19
CD_GND
21
MIC1
22
MIC2
13
PHONE
11
RESET#
10
SYNC
5
SDATA_OUT
45
ID0
46
ID1
47
EAPD
48
SPDIFO
4
DVSS1
7
DVSS2
AD1981BJST_LQFP48
1
2
2
1
38
AVDD434AVDD3
4.7U_0805_10V4Z
+AVDD_AC97
C440
0.1U_0402_10V6K
C421
0.1U_0402_10V6K
43
DVDD11DVDD2
LINE_OUT_L
LINE_OUT_R
MONO_OUT HP_LOUT_L
HP_LOUT_R
BIT_CLK
SDATA_IN
XTL_IN
XTL_OUT
VREFOUT
VREF
AFILT1 AFILT2 AFILT3 AFILT4
AVSS1 AVSS2 AVSS3 AVSS4
+5VS
W=40Mil
C826
1
C438
0.1U_0402_10V6K
2
1
C462
0.1U_0402_10V6K
2
9
35 36 37 39 41
R212 33_0402_5%
6
R213 22_0402_5%
8 2
3
28 27
29 30 31 32
12
NC
42
NC
26 40 44 33
1
1
C825
2
2
0.1U_0402_10V6K
+AVDD_AC97
1
C426
0.1U_0402_10V6K
2
+3VS_AC97
LINE_OUTL LINE_OUTR
HP_OUTL HP_OUTR
AUD_REF
AFILT1 AFILT2 AFILT3 AFILT4
12
R571
10K_0402_5%
1
C454
0.1U_0402_10V6K
2
12 12
XTL_IN
1M_0402_5%@
XTL_OUT
+AUD_VREF
1 2
C423
1 2
C411
1 2
C422 270P_0402_50V7K
1 2
C410 270P_0402_50V7K
2
U50
4
VIN
2
DELAY ERROR7CNOISE
8
SD
SI9182DH-AD_MSOP8
R186 0_0805_5%
1 2
1
C437 10U_1206_6.3V6M
2
1
C457 10U_0805_10V4Z
2
12
R210
Rb
270P_0402_50V7K 270P_0402_50V7K
VOUT
SENSE or ADJ
GND
+VDDA
R208 0_0805_5%
1 2
LINE_OUTL 36 LINE_OUTR 36
HP_OUTL 36 HP_OUTR 36
ICH_AC_BITCLK 26,33 ICH_AC_SDIN0 26
X1
24.576MHz_16P_3XG-24576-43E1@
1 2
C468
Xb
22P_0402_50V8J@
Cb
1
2
Close to AD1981B
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
+VDDA
5 6 1 3
W=40Mil
1 2
R563
12
30.1K_0402_1%
1
R554
C824
10K_0603_1%
2
0.01U_0402_16V7K
+3VS
1
C804
4.7U_0805_10V4Z
2
C424
0.1U_0402_16V4Z
1
2
14.318MHz External Ra s t u ff, Rb, Cb, an d X b empty.
24.576MHz Crystal or Externa l Colck
1
2
1
C377 1U_0603_10V6K
2
1 2
R216 0_0402_5%
C467
Rb, Cb, and Xb s tuff, Ra empty.
CLK_14M_CODEC
Ra
22P_0402_50V8J@
Cb
1
C425
0.1U_0402_10V6K
2
12
R226
1
C471
2
R699 R700 FREQ. SEL
X X
Stuff
Title
Size Document Number Rev Custom
Date: Sheet
24.576MHZ
14.318MHZStuff
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2522
401318
星期五 二月
10_0402_5%@
15P_0402_50V8J@
1
1
C800
0.1U_0402_10V6K
2
+AUD_VREF
1
C383
4.7U_0805_10V4Z
2
1
CLK_14M_CODEC 16
Crystal
External
35 52, 18, 2005
of
Page 36
5
4
3
2
1
R611 0_0402_5%
AMP_MUTE#
U58 TTI_TRR2A05S00_8P
1 2
1 2
R462 0_0402_5%
1 2
R610 0_0402_5%
13
141413
1122667
(+) (-)
EAPD35,37,41
L47 FBM-L11-321611-260-LMT_1206
12
+
1 2
C696 330U_D4_10VM
+
1 2
C689 330U_D4_10VM
+12VS_A1
L48 FBM-L11-321611-260-LMT_1206
1
C306 1U_0603_16V4Z
2
INTSPK_L2
1 2
R446 1K_0603_1%
INTSPK_R2
1 2
R447 1K_0603_1%
GND GND
+12VS_A2
12
6
Vdd
12
INTSPK_L1
3
INTSPK_R1
7
5 4
D D
C322 220P_0603_50V8J
1 2
12
R413 36K_0603_5%
U33
1
VinA
2
Shutdown#
8
Bypass
9
VinB
LM4950TS_TO263
R402 36K_0603_5% C305 220P_0603_50V8J
1 2
VoutA
VoutB
R423
LINE_OUTL
LINE_OUTL35
LINE_OUTR35
C708
0.47U_0603_16V7K
LINE_OUTR
C674
0.47U_0603_16V7K
1 2
1 2
INTSPK_LA
0.47U_1206_25V4Z
INTSPK_RA
R383 10K_0603_5%
10K_0603_5%
C666
INTSPK_LB
12
EAPD
INTSPK_RB
12
+12VS
12
1
+
C320 100U_25V_M
2
HP_PLUG#
EC_MUTE#37,41
INTSPK_R2
INTSPK_L2
+5VS
C C
+3VS
12
Reserve the 0 ohm resistor.
R449
0_0603_5%
R478 0_0402_5%
EAPD35,37,41
EC_MUTE#37,41
HP_OUTR35
B B
HP_OUTL35
1 2
R464
0_0402_5%@
1 2
HP_OUTR HP_OUTL
C763
2.2U_0603_6.3V4Z
1 2 1 2
C762
2.2U_0603_6.3V4Z
HP_MUTE#
R460
6.8K_0603_5%
1 2 1 2
R459
6.8K_0603_5%
C702 1U_0603_10V4Z
14 18
15
1
2
13
1 3
1U_0603_10V4Z
for voltage filtering
+3VS_HP
10
19
U35
SHDNR#
SVDD
PVDD
SHDNL#
INR INL
C1P C1N
C701
PGND
PVss
SVss
2
5
7
1
2
12
C742 1U_0603_10V4Z
11
OUTR
9
OUTL
4
NC-4
6
NC-6
8
NC-8
12
NC-12
16
NC-16
20
NC-20
SGND
MAX4411ETP-T_TQFN20
17
HP_OUTR1-1 HP_OUTL1-1
HP_OUTR1-1
R419 47_0402_5%
1 2 1 2
R453 47_0402_5%
HP_OUTR1-2 HP_OUTL1-2HP_OUTL1-1 HP_OUTL1-3
RE_MUTE#
SPDIFO35
L42 FBM-11-160808-700T_0603
1 2 1 2
L43 FBM-11-160808-700T_0603
HP_OUTR1-3
2
G
1 2
1 2
8
998
7
13
D
Q53
S
2N7002_SOT23
HP_PLUG#
+3VS
5
P
B A
G
3
+5VS
5
P
B A
G
3
INTSPK_R3 INTSPK_L3
Y
Y
AMP_MUTE#
4
U38 TC7SH08FU_SSOP5
RE_MUTE#
4
U53 TC7SH08FU_SSOP5
+3VS +5VS
R160
10K_0402_5%
1 2
1
2
C755
C741
0.1U_0402_10V6K
330P_0402_50V7K
AMPGND AMPGND
1
C335
2
33P_0402_25V8K
AMPGND
1
1
2
2
C698
330P_0402_50V7K
1 2 3 4
1
C334
2
33P_0402_25V8K
JHP1
9
10
8 7 5
4 3
6 2 1
FOX_2F11381-SJ5-7F
JHP1 Pin1
HP_PLUG#
R380 0_0805_5%
1 2
JSPK1
1 2 3 4
MOLEX_ 53398-0471
HP Plug-In
Connect AMPGND to GND via one single point to HOLE close to U33
PW On (EAPD)
+12VS
EAPD
EC_MUTE#
RE_MUTE#
HP OUT JACK
JHP1 Pin5
Short
HP Plug-In SPDIF Plug-InOpen
HP Plug-Out
En XP
SPDIF
Plug-Out
Ex XP
SPDIF Plug-Out
R376 0_0402_5%
12
12
12
R381
R379
2.2K_0402_5%
C670 1U_0603_10V4Z
MIC2_1
MIC235
A A
5
4
MIC135
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMAT ION IT CON TAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1 2 1 2
C659 1U_0603_10V4Z
MIC1_1
2.2K_0402_5%
FBM-11-160808-700T_0603
FBM-11-160808-700T_0603
+AUD_VREF
L40
1 2 1 2
L38
C669
220P_0402_50V7K
2
MIC2_2 MIC1_2
1
2
1
C658 220P_0402_50V7K
2
JMIC1
7 8 5 4 3
6 2 1
FOX_JA6333L-B1ST-7F
Title
Size Document Number Rev
Date: Sheet
EXT. MICPHONE JACK
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2522
401318
, 18, 2005
期五 二月
1
of
36 52
C
Page 37
5
ECAGND
+3VALW
L44
1 2
LPC_AD[0..3]25,38
CLK_PCI_LPCEC25
R619 0_0805_5%
1 2
0_0603_5%
1 2
C796 22P_0402_50V8J
+3VALW_EC
1
C757
2
0.1U_0402_16V4Z
SIRQ25,31,38 LPC_FRAME#25,38
LPC_AD[0..3]
1 2
R528 30_0402_5%
KSI[0..7]39 KSO[0..15]39
0.1U_0402_16V4Z
1
C756
2
+3VS
1000P_0402_50V7K
R506 10K_0402_5%@
+3VALW
12
L45 0_0603_5%
+EC_AVCC
D D
1 2
C814
+3VALW_EC
12
R540 47K_0402_5%
ECRST#
1
C797
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
Reserved for 87591L
JP2
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
GATEA2026 KBRST#26
10
E&T_96212-1011S@
10K_0402_5%
C C
B B
SMB_EC_CK120,49 SMB_EC_DA120,49
A A
EC_TINIT# EC_TCK EC_TDO EC_TDI EC_TMS
KSO16 KSO17 EN_WOL#
PSCLK139 PSDAT139
RP125
18 27 36 45
10K_0804_8P4R_5%
1 2
R522 10K_0402_5%
1 2
R517 10K_0402_5%
+3VS
R493
1 2
1 2
+5VALW
C749
0.1U_0402_16V4Z
1 2
U34
8
VCC
7
WP
6
SCL
5
SDA
AT24C16N-10SI-2.7_SO8
R502 10K_0402_5%
PSDAT2 PSCLK2 PSDAT1T PSCLK1T
PSCLK3 PSDAT3
GATEA20 KBRST#
+3VALW
1
A0
2
A1
3
A2
4
GND
R422
100K_0402_5%
R530 0_0402_5%@
1 2
R529 0_0402_5%@
1 2
R521 0_0402_5%
1 2
R516 0_0402_5%
1 2
RSMRST#26 +VCCP_PWRGD47 MEP_DATA39
EC_SCI#26 EAPD35,36,41 MEP_ACK39
LED_JOG#39 TV_LED#39
PCI_CLKRUN#25,30,31,33,38 DVD_BTN#39
BKOFF#23
SCROLLOCK#39
FSTCHG43
CAPLOCK#39
NUMLOCK#39
EC_SMI#26 MSEN#17,24 VGATE28,48 EC_SWI#26 PROCHOT#6
+5VALW
12
R420 100K_0402_5%
12
32.768KHZ_12.5PF_6HT3
1
10P_0402_50V8J
2
Close to RTC pad
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
1
C827
2
1 2
LPC_FRAME# LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
ECRST#
GATEA20 KBRST#
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7
KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14
KSO15 KSO16 KSO17
PSCLK1T PSDAT1T PSCLK2 PSDAT2 PSCLK3 PSDAT3
CRY1 CRY2
EC_SCI#
TV_LED# PCI_CLKRUN# DVD_BTN#
SCROLLOCK#
EC_SMI# VGATE
EC_SWI#
Y6
C752
4
0.1U_0402_16V4Z
1
C786
2
7
9 15 14 13 10 18 19 31
5
6 71
72 73 74 77 78 79 80
49 50 51 52 53 56 57 58 59 60 61 64 65 66 67 68
153 154
110 111 114 115 116 117
158 160
3
4
8 20 21 22 23 24 25 27 28 41
48 54 55 62 63 69 70 75
CRY1
CRY2
12
1
C753 10P_0402_50V8J
2
4
1000P_0402_50V7K
1
C808
2
U44
SERIRQ LFRAME# LAD0/FWH0 LAD1/FWH1 LAD2/FWH2 LAD3/FWH3 LCLK ECRST# ECSCI#
GPIO02/GA20 GPIO03/KBRST#
KSI0/GPIK0 KSI1/GPIK1 KSI2/GPIK2 KSI3/GPIK3 KSI4/GPIK4 KSI5/GPIK5 KSI6/GPIK6 KSI7/GPIK7
KSO0/GPOK0 KSO1/GPOK1 KSO2/GPOK2 KSO3/GPOK3 KSO4/GPOK4 KSO5/GPOK5 KSO6/GPOK6 KSO7/GPOK7 KSO8/GPOK8 KSO9/GPOK9 KSO10/GPOK10 KSO11/GPOK11 KSO12/GPOK12 KSO13/GPOK13 KSO14/GPOK14 KSO15/GPOK15 KSO16/GPOK16 KSO17/GPOK17
PSCLK1 PSDAT1 PSCLK2 PSDAT2 PSCLK3 PSDAT3
XCLKI XCLKO
GPIO00/E51IT0 GPIO01/E51IT1 GPIO04 GPIO07 GPIO08 GPIO09 NUMLOCK#/GPIO0A GPIO0B CLKRUN#/GPIO0C GPIO0D GPIO0E SCROLLLOCK#/GPIO0F
GPIO10 CAPLOCK#/GPIO11 FNLOCK#/GPIO12 GPIO13
GPIO1
GPIO14 GPIO15 GPIO16 GPIO17
124
KBA0
A0
KBA1
VCC016VCC134VCC245VCC3
Host interface
Key matrix scan
PS2 interface
A1/XIOP_TP
A4/DMRP_TP
A5/EMWB_TP
125A2126A3127
128
131A6132A7133
KBA3
KBA6
KBA2
KBA5
KBA4
KBA[0..19] ADB[0..7]
123
GPIO0
KBA7
136
VCC4
A8
143A9142
KBA9
KBA8
157
166
VCC5
135
KBA10
VCC6
PWR/GND
A12
A11
A10
129
130
134
KBA13
KBA12
KBA11
KBA[0..19] 38 ADB[0..7] 38
BIOS I/F
A13
A14
121
KBA14
KBA15
122
GND117GND235GND346GND4
A15
A16
A17
120
113
112
104
KBA17
KBA16
KBA18
+EC_AVCC
167
137
GND6
GND7
FAN/PWM
GPIO2
GPWU or GPI
D0
A18
A19
138D1139D2140D3141D4144D5145D6146D7147
103
KBA19
ADB0
ADB1
3
ECAGND
159
95
96
161
VCCA
AGND
VCCBAT
BATGND
AD Input or GPI
DA output or GPO
PWM or GPOW
PWM2/GPOW2/FAN1PWM PWM7/GPOW7/FAN2PWM
GPIO05/FAN3PWM/TEST_TP
FANFB1/TOUT1/GPIO2E
GPWU7/TIN2/FANFB2
GPIO06/FANFB3/DPLL_TP
SM BUS
GPIO20/E51CS#/ISPEN_TP
GPIO21/E51RXD/ISPCLK GPIO22/E51TXD/ISPDAT
GPIO18/XIO8CS#
GPIO19/XIO9CS# GPIO1A/XIOACS# GPIO1B/XIOBCS#
GPIO1C/XIOCCS# GPIO1D/XIODCS#
GPIO1E/XIOECS# GPIO1F/XIOFCS#
RD#
150
ADB4
ADB7
ADB3
ADB6
ADB2
ADB5
JOPEN2 close to DDR-SODIMM
3
1
C773 1U_0805_25V4Z
2
AD0/GPIAD0 AD1/GPIAD1 AD2/GPIAD2 AD3/GPIAD3 AD4/GPIAD4 AD5/GPIAD5 AD6/GPIAD6 AD7/GPIAD7
DA0/GPODA0 DA1/GPODA1 DA2/GPODA2 DA3/GPODA3 DA4/GPODA4 DA5/GPODA5 DA6/GPODA6 DA7/GPODA7
PWM0/GPOW0 PWM1/GPOW1 PWM3/GPOW3 PWM4/GPOW4 PWM5/GPOW5 PWM6/GPOW6
SCL1
SDA1
SCL2
SDA2
A20/GPIO23
GPIO24 GPIO25 GPIO26 GPIO27 GPIO28
GPIO29 GPIO2A GPIO2B
LRST#/GPIO2C
GPIO2D
TOUT2/GPIO2F
GPWU0 GPWU1 GPWU2 GPWU3 GPWU4 GPWU5
GPWU6/TIN1
WR#
IOCS#
MEMCS#
151
152
173
+3VS
1 2
1 2
1 2
+3VALW_EC
BATT_TEMP
81
M/B_ID
82
BATT_OVP
83
KB_ID
84 87 88 89 90
99 100 101 102
CBS_SPND#
1 42 47 174
32 33 37
SB_BATLOW#
38 39 40
36 43
TEST_TP
11 171 176
DPLL_TP
12
SMB_EC_CK1
163
SMB_EC_DA1
164
SMB_EC_CK2
169
SMB_EC_DA2
170
EC_TINIT#
105
EC_TCK
106
EC_TDO
107
EC_TDI
108
CIR_ONOFF#
109 118 119 148 149 155
G_RST#
156 162
PCIRST#
165 168 175
2 26
MEP_CLK
29 30 44
TV_BTN#
76
ICH_PME#
172 85
86 91 92 93 94 97 98
KB910_LQFP176
FSEL# 38 FWR# 38 FRD# 38
R523 10K_0402_5%
JOPEN2
KB_ID
R524 10K_0402_5%
+3VALW
12
R601 100K_0603_5%
M/B_ID
12
R602
43.2K_0603_1%
2
BATT_TEMP
BATT_TEMP 49 BATT_OVP 43 MEP_IO6 39
BACKLITE_ON 17,23 ADP_I 43 WLAN_BTN# 39
DAC_BRIG 23 EN_FAN1 39
IREF 43 CBS_SPND# 31 BEEP_OFF# 35 PC_TV# 29
INVT_PWM 23 BEEP# 35 ACOFF 43 SB_BATLOW# 26 EC_ON 39 LID_SWOUT# 26
WLAN_OFF# 33,39
FANSPEED1 39 BIA
SMB_EC_CK1 20,49 SMB_EC_DA1 20,49 SMB_EC_CK2 6 SMB_EC_DA2 6
CIR_ONOFF# 29 LID_SW# 39 EC_MUTE# 36,41 SYSON 41,44,45,47 SUSP# 30,38,41,45,46 VR_ON 48
DVD_LED 39 PCIRST# 25,29,30,31,33,34,38 PBTN_OUT# 26 EC_THRM# 26
ON/OFF 39 ACIN 26,42,44 MEP_CLK 39 PM_SLP_S3# 26 PM_SLP_S5# 26 TV_BTN# 39 ICH_PME# 30,31,33
PWR_LED# 23,39 CHARGE_LED# 23,39 LED_BACK# 39 LED_FORWARD# 39 BATT_LED# 23,39 LED_PLAY# 39 LED_STOP# 39 LED_REC# 39
TV_BTN# DVD_BTN# ICH_PME# CIR_ONOFF# LID_SW#
1
2
0.1U_0402_16V4Z
2
1
ECAGNDM/B_ID
1 2
C830 0.01U_0402_16V7K C828 0.01U_0402_16V7K C829 0.01U_0402_16V7K
1 2 1 2
ECAGND ECAGNDBATT_OVP
M/B Ver.
Voltage
0.30.2 1.0
0.1
0.0 0.4 0.8 1.0
BORAD ID
12
12
R470
R469
SMB_EC_DA1 SMB_EC_CK1 SMB_EC_DA2 SMB_EC_CK2
4.7K_0402_5%
@
4.7K_0402_5%
R467
4.7K_0402_5%
For NS 87591L
KBA1
1 2
R497 10K_0402_5%@
KBA2
1 2
R496 10K_0402_5%@
KBA3
1 2
R491 10K_0402_5%@
KBA5
1 2
R483 10K_0402_5%
100K_0402_5%
LID_SW#
2
R622
G
+5VALW
12
13
D
S
100K_0402_5%
G_RST#
PCIRST#25,29,30,31,33,34,38
Q50 2N7002_SOT23
FSEL# FRD# EC_SMI#
1 2
R473 10K_0402_5%
1 2
R472 10K_0402_5%
1 2
R597 10K_0402_5%
+3VALW
12
R466
+3VALW
5
2 1
100K_0402_5%
PM_SLP_S5#
U37
NC7ST32P5X_SC70
R623
2
G
For KB910
PCIRST#
R598 10K_0402_5%
1 2
R546 10K_0402_5%
1 2
R474 10K_0402_5%
1 2
R613 10K_0402_5%
1 2
R511 100K_0402_5%
Pin8, 22, 54, 82, 84, 89 and 172 is diffrence define with 87591 R181, R191, R192 and R193 are reserved for KB910. R187 & R176 are reserced for 87591L BTDIS# signal is reservedfor BT modula, BTON# signal is reserved for MDC\BT module
C831
+3VALW
EC_TINIT#
12
TEST_TP DPLL_TP
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
SCHEMATIC, M/B LA-2522 401318
星期五 二月
1 2
R465 100K_0402_5%
1 2
R550 100K_0402_5%
1 2
R510 100K_0402_5%
1 2
R515 100K_0402_5%
1
+5VALW+5V
12
@
4
12
13
D
S
1.6
+5VALW
12
R468
4.7K_0402_5%
+3VALW
+3VALW
Q51 2N7002_SOT23
37 52, 18, 2005
CBS_RST# 31
PM_SLP_S5 27LID_SW 27
+3VALW
of
Page 38
5
4
3
2
1
C
B
KBA[0..19]37
D D
C C
B B
A A
ADB[0..7]37
+3VBIOS
5
KBA[0..19] ADB[0..7]
KBA11 KBA9 KBA8 KBA13 KBA14 KBA17 FWE#
KBA18 KBA16
KBA12 KBA7 KBA6 KBA5
U43
1
A11
2
A9
3
A8
4
A13
5
A14
6
A17
7
WE#
8
VCC
9
A18
10
A16
11
A15
12
A12
13
A7
14
A6
15
A5
16
A4
SST39VF040-90-4C-WH-_TSOP32
BIOS DEBUG CONN
+3VALW
JDBUG1
BIOS_RST# KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7 KBA8 KBA9 KBA10 KBA11
KBA13 KBA14 KBA15 KBA16 KBA17 KBA18 KBA19 ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7 FWR# FRD# FSEL#
34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
ELCO_00-6278-034-001-800@
DQ7 DQ6 DQ5 DQ4 DQ3
DQ2 DQ1 DQ0
OE# A10 CE#
VSS
+3VALW
1 2
R463 0_0603_5%
FRD#
32
KBA10
31
FSEL#
30
ADB7
29
ADB6
28
ADB5
27
ADB4
26
ADB3
25 24
ADB2
23
ADB1
22
ADB0
21
KBA0
20
A0
KBA1
19
A1
KBA2
18
A2
KBA3KBA4
17
A3
+3VBIOS
1
2
0.1U_0402_16V4Z
FRD# 37 FSEL# 37
LPC DEBUG CONN
JDBUG2
4
C760
ACES_85201-2005@
1
C759 10U_1206_10V4Z
2
+3VALW
5
P
FWE#KBA15
TC7SH32FU_SSOP5
+5VS +3VS
1
1
2
2
3
3
4
4
5
5
CLK_14M_SIO
6
6
LPC_AD0
7
7
LPC_AD1
8
8
LPC_AD2
9
9
LPC_AD3
10
10
LPC_FRAME#
11
11
LPC_DRQ#1
12
12
PCIRST#
13
13
PCI_CLKRUN#KBA12
14
14
CLK_PCI_SIO
15
15
SIRQ
16
16
17
17
18
18
19
19
20
20
I0
4
O
I1
G
U49
3
CLK_14M_SIO 16 LPC_AD0 25,37 LPC_AD1 25,37 LPC_AD2 25,37 LPC_AD3 25,37 LPC_FRAME# 25,37 LPC_DRQ1# 25 PCIRST# 25,29,30,31,33,34,37 PCI_CLKRUN# 25,30,31,33,37 CLK_PCI_SIO 25 SIRQ 25,31,37
+3VALW
12
R583 100K_0402_5%
2
G
2 1
1 3
D
Q34 2N7002_SOT23
S
FWR# 37
SUSP# 30,37,41,45,46
EC_FLASH# 26
TV MODULE
MDC
PCB
PCB
LA-2522
1
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Fiducial Mark
1
1
1
1
1
1
FD9
1
FIDUCIAL MARK
FD6
1
FIDUCIAL MARK
FD24
1
FIDUCIAL MARK
FD15
1
FIDUCIAL MARK
FD23
1
FIDUCIAL MARK
H28 HOLEA@
1
H14 HOLEA@
1
H6
HOLEA
1
H22
HOLEA
1
H16 HOLEA@
1
FD11
1
FIDUCIAL MARK
FD13
1
FIDUCIAL MARK
FD12
1
FIDUCIAL MARK
FD17
1
FIDUCIAL MARK
FD25
1
FIDUCIAL MARK
A HOLER354X354D126I166P2
H10 HOLEA@
B H_C354D236
H9 HOLEA@
D HOLEC354D197BR354I237P2
H7
HOLEA
F HOLEC276D126I166P2
H24
HOLEA
I HOLER315X315D126I166P2
H11 HOLEA@
L HOLER354X354D126I166P2
H12 HOLEA@
2
FD3
1
FIDUCIAL MARK
1
FIDUCIAL MARK
1
FIDUCIAL MARK
1
FIDUCIAL MARK
H26 HOLEA@
1
H15 HOLEA@
1
H18
HOLEA
1
G HOLEC354D201BR315X315I241P2
VGA
H27 HOLEA@
1
Title
Size Document Number Rev Custom
Date: Sheet
FIDUCIAL MARK
FIDUCIAL MARK
FD7
FIDUCIAL MARK
FD19
FIDUCIAL MARK
FD22
FIDUCIAL MARK
H19
H5
HOLEA@
HOLEA@
1
1
H8 HOLEA@
1
H17
HOLEA
1
H4 HOLEA@
1
J HOLEC354D177BR354X354I217P2KH_C354D126
H13
HOLEA
1
N HOLEO189X126D189X126N
H1 HOLEA@
1
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2522 401318
星期五 二月
E3
2222 SYMBOL(SOT23-NEW)
H30 HOLEA@
1
1
1
FD14
1
FIDUCIAL MARK
FD26
1
FIDUCIAL MARK
FD18
1
FIDUCIAL MARK
FD4
1
FIDUCIAL MARK
FD29
1
FIDUCIAL MARK
H23 HOLEA@
1
H20 HOLEA@
1
1
FD20
1
FD27
1
FD5
1
FD8
1
FD28
1
C HOLEC315D126I166P2
H3 HOLEA@
E HOLEC315D126BR354X354I166P2
H21 HOLEA@
1
2
FD16
1
FIDUCIAL MARK
FD21
1
FIDUCIAL MARK
FD2
1
FIDUCIAL MARK
H29 HOLEA@
1
H H_O236X315D236X315N
H31 HOLEA@
1
H25 HOLEA@
1
M HOLEC126D126N
H2 HOLEA@
1
of
38 52, 18, 2005
Page 39
5
KeyBoard
KSI[0..7]37 KSO[0..15]37
JP3
KSO0
1
1
KSO1 KSO1
2
2
KSO2
3
3
KSO3
4
D D
KSO4 KSO5 KSO6 KSO7 KSO8
KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
ACES_85203-2402L
KSO0
25
25
26
26
KSO2
27
27
KSO3
28
28
KSO4
29
29
KSO5
30
30
KSO6
31
31
KSO7
32
32
KSO8
33
33
KSO9
34
34
KSO10
35
35
KSO11
36
36
KSO12
37
37
KSO13
38
38
KSO14
39
39
KSO15
40
40
KSI0
41
41
KSI1
42
42
KSI2
43
43
KSI3
44
44
KSI4
45
45
KSI5
46
46
KSI6
47
47
KSI7
48
48
100P_0402_25V8K
1 2
C406 100P_0402_25V8K
C407
1 2
C405 100P_0402_25V8K
100P_0402_25V8K
1 2
C402 100P_0402_25V8K
C403
1 2
C401 100P_0402_25V8K
100P_0402_25V8K
1 2
C399
C398 100P_0402_25V8K
1 2
C397 100P_0402_25V8K
100P_0402_25V8K
1 2
C394 100P_0402_25V8K
C395
1 2
C393 100P_0402_25V8K
100P_0402_25V8K
1 2
C391
C390 100P_0402_25V8K
1 2
C389 100P_0402_25V8K
100P_0402_25V8K
1 2
C386 100P_0402_25V8K
C387
1 2
C385 100P_0402_25V8K
1 2
C404 100P_0402_25V8K
1 2
C400 100P_0402_25V8K
1 2
C396 100P_0402_25V8K
1 2
C392 100P_0402_25V8K
1 2
C388 100P_0402_25V8K
1 2
C384 100P_0402_25V8K
Touch Pad Board
+5VS +5VS
C C
PSDAT137 PSCLK137
JTP1 ACES_85203-0602L
6
12
5
11
4
10 3 9 2 8 1 7
PSDAT1 PSCLK1
1
2
C448
0.01U_0402_16V7K C835 100P_0402_25V8K
1 2
1 2
C837 100P_0402_25V8K
WLAN Board
+5VS
JKS1
1 WLAN_BTN#37 WLAN_OFF#33,37
B B
WLAN_LED33
WLAN_BTN# WLAN_OFF#
WLAN_LED
1
2
2
3
3
4
4
ACES_85205-0400L
T28 PAD@
FAN1 Control and Tachometer
+12V
R143 100K_0402_5%
+IN
-IN
7
OUT
U11B LM358A_SO8
1 2
5
EN_FAN137
A A
5 6
C245
FAN1VREF FAN1_VFB
1
2
1U_0603_10V4Z
R145
1 2
150K_0402_5%
8
P
3
+IN
OUT
2
-IN
U11A
G
LM358A_SO8
4
C248 2200P_0402_50V7K
1 2
R144 100K_0402_5%
FAN1_ON
1
12
RB751V_SOD323
4
1 2
1 2
1 2
1 2
1 2
1 2
Function Board SW/LED
1 2
1 2
1 2
1 2
1 2
1 2
1 2
+5VS
6
2
1
D
Q8
G
2 1
S
4 5
1
2
4
SI3456DV-T1_TSOP6
1
C249
2
22U_1206_10V4Z
3
D10
1 2
C834100P_0402_25V8K
1 2
C839100P_0402_25V8K
1 2
C842100P_0402_25V8K
1 2
C846100P_0402_25V8K
1 2
C849100P_0402_25V8K
1 2
C852100P_0402_25V8K
1 2
C855100P_0402_25V8K
FAN1_VOUT
C247
1000P_0402_50V7K
C833100P_0402_25V8K
C838100P_0402_25V8K
C841100P_0402_25V8K
1 2
C845100P_0402_25V8K
1 2
C848100P_0402_25V8K
C851100P_0402_25V8K
C854100P_0402_25V8K
+3VS
12
R146 10K_0402_5%
1
C246
0.01U_0402_16V7K
2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
Power BTN
ON/OFFBTN#
EC_ON37
EC_ON
+5VALW
PWR_LED2#
C832100P_0402_25V8K
NUMLOCK2# SCROLLOCK2# CAPLOCK2#
C836100P_0402_25V8K
TV_LED2# LID_SW# ON/OFFBTN#
C840100P_0402_25V8K
TV_BTN# DVD_BTN# DVD_LED
C843100P_0402_25V8K
+5VS +3VS +3VS
HDD_ACT#
C844100P_0402_25V8K
SDLED#_MSLED#_XDLED2#
CHARGE_LED2#
C857100P_0402_25V8K
MEP_DATA
C847100P_0402_25V8K
MEP_CLK MEP_ACK MEP_IO6
C850100P_0402_25V8K
LED_BACK2# LED_FORWARD2# LED_REC2#
C853100P_0402_25V8K
LED_PLAY2# LED_STOP2# LED_JOG2#
C856100P_0402_25V8K
FANSPEED1 37
JP1
1 2 3
MOLEX_53398-0371
FAN1
THIS SHEET OF EN GINEE RING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+3VALW
12
R575 22K_0402_5%
3
1
R578 22K_0402_5%
1 2
JSWP1
30
30
29
29
28
28
27
27
26
26
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
ACES_85203-3002L
3
+3VALW
D19
3 2
DAN202U_SC70
2
60
60
59
59
58
58
57
57
56
56
55
55
54
54
53
53
52
52
51
51
50
50
49
49
48
48
47
47
46
46
45
45
44
44
43
43
42
42
41
41
40
40
39
39
38
38
37
37
36
36
35
35
34
34
33
33
32
32
31
31
12
R551 100K_0402_5%
ON/OFF
1
13
2
C812 1000P_0402_50V7K
Q28 DTC124EK_SC59
+5VALW
PWR_LED2# NUMLOCK2# SCROLLOCK2# CAPLOCK2# TV_LED2# LID_SW# ON/OFFBTN# TV_BTN# DVD_BTN# DVD_LED
+5VS
HDD_ACT#
SDLED#_MSLED#_XDLED2#
CHARGE_LED2# BATT_LED2#BATT_LED2# MEP_DATA MEP_CLK MEP_ACK MEP_IO6 LED_BACK2# LED_FORWARD2# LED_REC2# LED_PLAY2# LED_STOP2# LED_JOG2#
ON/OFF 37 51ON# 42
12
D20
RLZ20A_LL34
LID_SW# 37 TV_BTN# 37
DVD_BTN# 37 DVD_LED 37
HDD_ACT# 29
MEP_DATA 37 MEP_CLK 37 MEP_ACK 37 MEP_IO6 37
2
PWR_LED#23,37 BATT_LED#23,37
TV_LED#37
SDLED#_MSLED#_XDLED#31
CHARGE_LED#23,37
LED_FORWARD#37
LED_REC#37
LED_STOP#37
2
PWR_LED2#
R627
100K_0402_5%
Q44 AOS3401_SOT23
TV_LED2#
R631
100K_0402_5%
Q54 AOS3401_SOT23
SDLED#_MSLED#_XDLED2#
R633
100K_0402_5%
Q56 AOS3401_SOT23
CHARGE_LED2#
R629
100K_0402_5%
Q46 AOS3401_SOT23
LED_FORWARD2# LED_BACK2#
R636
100K_0402_5%
Q59 AOS3401_SOT23
LED_REC2#
R638
100K_0402_5%
Q61 AOS3401_SOT23
LED_STOP2#
R640
100K_0402_5%
Q63 AOS3401_SOT23
1
100K_0402_5%
100K_0402_5%
100K_0402_5%
CAPLOCK#37
LED_BACK#37
LED_JOG#37
LED_PLAY#37
1
BATT_LED2#
R628
Q45 AOS3401_SOT23
NUMLOCK2#
R632
Q55 AOS3401_SOT23
SCROLLOCK2#
R634
Q57 AOS3401_SOT23
CAPLOCK2#
R635
100K_0402_5%
Q58 AOS3401_SOT23
R637
100K_0402_5%
Q60 AOS3401_SOT23
LED_JOG2#
R639
100K_0402_5%
Q62 AOS3401_SOT23
LED_PLAY2#
R641
100K_0402_5%
Q64 AOS3401_SOT23
39 52, 18, 2005
12
S
2
G
D
1 3
12
S
2
G
D
1 3
12
S
2
G
D
1 3
12
S
2
G
D
1 3
12
S
2
G
D
1 3
12
S
2
G
D
1 3
12
S
2
G
D
1 3
of
12
S
2
G
D
1 3
12
S
2
G
D
1 3
NUMLOCK#37
12
S
2
G
D
1 3
12
S
2
G
D
1 3
12
S
2
G
D
1 3
12
S
2
G
D
1 3
12
S
2
G
D
1 3
Title
Size Document Number Rev
星期五 二月
Date: Sheet
SCROLLOCK#37
Compal Electronics, Inc. SCHEMATIC, M /B LA-2522 401318
Page 40
5
4
3
2
1
OUT OUT OUT OC#
+USB_AS
8 7 6 5
1
C655
2
R362 0_0402_5%
R365 0_0402_5%
1
1
+
C650
2
150U_D_6.3VM
470P_0402_50V7K
12 12
12
+
2
C640
150U_D_6.3VM
R647 22K_0402_5%
13
D
S
USB_OC0# 26 USB_OC1# 26
SUSP
2
G
Q65 2N7002_SOT23
USBP0-26 USBP0+26
4.7P_0603_50V8J
C637
1
2
1
C633
2
4.7P_0603_50V8J
+USB_AS +USB_AS
JUSBP5
1
VCC
2
D-
3
D+
4
GND
5
GND1
6
GND2
FOX_UB11123-4H9-7F
USBP1-26 USBP1+26
4.7P_0603_50V8J
C609
1
2
1
C605
2
4.7P_0603_50V8J
JUSBP4
1
VCC
2
D-
3
D+
4
GND
5
GND1
6
GND2
FOX_UB11123-4H9-7F
D D
+5VS
U32
1
GND
2
IN
0.1U_0402_16V4Z
C654
1
SUSP41,47
2
1 2
R648 0_0402_5%
12
R366
100K_0402_5%@
3
IN
4
EN#
TPS2061IDGN_MSOP8
+USB_BS
C C
+5VS
U2
1
GND
OUT
IN
OUT OUT
IN
OC#
EN#
TPS2061IDGN_MSOP8
0.1U_0402_16V4Z
2
1
C29
SUSP41,47
2
1 2
R650 0_0402_5%
3 4
12
R30
100K_0402_5%@
1
C479
2
470P_0402_50V7K
8 7 6 5
R32 0_0402_5%
R31 0_0402_5%
1
1
+
C482
2
150U_D_6.3VM
12 12
12
+
R649
C483
22K_0402_5%
2
150U_D_6.3VM
D
S
13
2
G
Q66 2N7002_SOT23
USB_OC2# 26 USB_OC3# 25
SUSP
USBP2-26 USBP2+26
4.7P_0402_50V8J
1
C17
1
2
2
C16
4.7P_0402_50V8J
+USB_BS
JUSBP3
1
VCC
2
D-
3
D+
4
GND
5
GND1
6
GND2
FOX_UB11123-4H9-7F
USBP3-26 USBP3+26
4.7P_0402_50V8J
+USB_BS
JUSBP2
1
VCC
2
D-
3
D+
1
2
1
C18
4.7P_0402_50V8J
2
C19
4
GND
5
GND1
6
GND2
FOX_UB11123-4H9-7F
OUT OUT OUT OC#
+USB_CS
8 7 6 5
1
1
C27
2
470P_0402_50V7K
4
12
+
C22
R651
2
22K_0402_5%
150U_D_6.3VM
13
D
SUSP
2
G
Q67
S
2N7002_SOT23
USB_OC4# 25
USBP4-26 USBP4+26
4.7P_0402_50V8J
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1
C21
1
2
2
C20
4.7P_0402_50V8J
+USB_CS
JUSBP1
1
VCC
2
D-
3
D+
4
GND
5
GND1
6
GND2
FOX_UB11123-4H9-7F
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-2522
Size Document Number Rev Custom
401318
Date: Sheet
2
星期五 二月
1
40 52, 18, 2005
of
B B
+5VS
U1
1
GND
2
IN
1
C28
0.1U_0402_16V4Z
A A
SUSP41,47
2
5
1 2
R652 0_0402_5%
3 4
12
R29
100K_0402_5%@
IN EN#
TPS2061IDGN_MSOP8
Page 41
5
4
3
2
1
+3VALW to +3VS Transfer
+3VS+3VALW +3V+3VALW
U45
S
S
S
G
AO4422_SO8
1 2 3 4
1 2
R5 0_0402_5%
1
C1
@
0.1U_0402_16V4Z
2
1
2
C801
22U_1206_10V4Z
RUNON
1
12
R577 470_0402_5%
2
C818
0.1U_0402_16V4Z
13
D
SUSP
2
G
Q31
S
2N7002_SOT23
8 7 6
1
D D
1
C822
C821
2
2
22U_1206_10V4Z
22U_1206_10V4Z
5
C820
10U_1206_10V4Z
+5ALW to +5VS Transfer
+5VALW
U9
8
7
RUNON
6
5
AO4422_SO8
1 2
R1 0_0402_5%
+12V
12
R298
C C
RUNON46
SUSP
100K_0402_5%
2
G
Q22 2N7002_SOT23
13
D
S
C184
C192
10U_1206_10V4Z
10U_1206_10V4Z
R300
1M_0402_5%
+5VS
1
S
2
S
3
S
4
1
C575
1
C123
2
2
0.1U_0402_16V4Z
0.01U_0402_16V7K
G
1
2
C122
12
R297 470_0402_5%
22U_1206_10V4Z
13
D
SUSP
2
G
Q21
S
2N7002_SOT23
+2.5V to +2.5VS Transfer
+2.5V
8 7 6
C274
5
C273
22U_1206_10V4Z
10U_1206_10V4Z
1
2
B B
U12
S
S
S
G
AO4422_SO8
+2.5VS
1 2 3 4
C304
1 2
R150 150K_0402_5%
1 2
R151 0_0402_5% @
1
C2
0.1U_0402_16V4Z
2
22U_1206_10V4Z
1
2
RUNON
C302
+12VS
1
12
R148 470_0402_5%
2
13
D
0.1U_0402_16V4Z
S
SUSP
2
G
Q9 2N7002_SOT23
+3VALW to +3V Transfer
C817
C810
C805
10U_1206_10V4Z
10U_1206_10V4Z
10U_1206_10V4Z
+5VALW to +5V Transfer
C641
C642
10U_1206_10V4Z
10U_1206_10V4Z
U42
8
7
6
5
AO4422_SO8
U30
8
7
6
5
AO4422_SO8
S S S
G
S S S
G
1 2 3 4
1
2
+5V+5VALW
1 2 3 4
1
2
1
2
1 2
R4 0_0402_5%
C4
@
0.1U_0402_16V4Z
1
2
1 2
R3 0_0402_5%
C3
@
0.1U_0402_16V4Z
1
C780
2
22U_1206_10V4Z
C653
22U_1206_10V4Z
C781
1
2
C656
SUSON SYSON#
SI2301DS: P CHANNEL VGS: -4.5V, RDS: 130 mOHM VGS: -2.5V, RDS: 190mOHM Id(MAX): 2.3A VGS(MAX): +-8V
12
R588 470_0402_5%
13
D
0.1U_0402_16V4Z
0.1U_0402_16V4Z
S
12
13
D
S
SYSON#SUSON
2
G
Q33 2N7002_SOT23
R168 470_0402_5%
2
G
Q10 2N7002_SOT23
+5VALW
2
G
3
@
SM05_SOT23
12
R169 47K_0402_5%
SYSON#
13
D
S
2N7002_SOT23
D11
SUSP
SUSP#
Q11
SUSP40,47
SUSP#30,37,38,45,46
SYSON37,44,45,47
SYSON
2
1
SI2302DS: N CHANNEL VGS: 4.5V, RDS: 85 mOHM VGS: 2.5V, RDS: 115mOHM Id(MAX): 2.8A VGS(MAX): +-8V
+5VALW
12
R179 10K_0402_1%
13
D
Q13
2
2N7002_SOT23
G
S
+12V
12
R170 47K_0402_5%
SUSON
13
D
2
G
Q12
S
2N7002_SOT23
12
1
C360
R171
1M_0402_5%
2
0.01U_0402_16V7K
+12V to +12VS Transfer
+12V
U13 AO4407_SO8
1 2 3 6
1
C364
22U_1206_10V4Z
A A
2
4
100K_0402_5%
SUSP12
2N7002_SOT23
5
+12VS
8 7
5
R13
Q3
+12V
D
S
1
2
1
C333
2
1 2
13
2
G
1
12
R14
C336
C343
22U_1206_10V4Z
R615 0_0402_5%@
1 2
R608 0_0402_5%@
0.1U_0402_16V4Z
1 2
R609 0_0402_5%
1 2
470_0402_5%
2
13
D
0.1U_0402_16V4Z
S
SUSP
2
G
Q2 2N7002_SOT23
EAPD 35,36,37
EC_MUTE# 36,37
SUSP#
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
SUSP#
SUSP
RUNON
Title
Size Document Number Rev
Date: Sheet
3.3V SUSP#
5V
SUSP12 12V
12V
Compal Electronics, Inc. SCHEMATIC, M /B LA-2522 401318
星期五 二月
1
3.3V
41 52, 18, 2005
of
Page 42
5
4
3
2
1
Detector
PR5 22K_0603_1%
12
PC6
1000P_0402_50V7K
VL
Vin Detector
18.234 17.841 17.449
17.597 17.210 16.813
PR1 1M_0603_0.5%
1 2
PU1_VIN
12
PC9
8
N40
3
+
N38
2
-
PR9
10K_0603_5%
PR15 10K_0603_5%
1 2
PD4
12
RB751V_SOD323 PD6
12
RB751V_SOD323
P
O
G
PU1A
4
LM393M_SO8
12
1
RTCVREF
3.3V
VS
12
0.01U_0603_50V7K
RLZ4.3B_LL34
PJP22 JUMP_43X39@
112
PD22
1SS355_SOD323@
LM393M_SO8
N5
PC13
0.1U_0603_25V7K
VL
2
PZD1
PU1B
7
VIN
12
PR3 10K_0805_5%
12
PR16 1M_0402_1%
PU1_VIN
2
12
8
P
O
G
4
PR24 10K_0603_5%
+
-
PR4 1K_0603_5%
1 2
PACIN
12
PR7 10K_0603_5%
12
PD23
1SS355_SOD323@
1 2
N6
5 6
12
PC14
1000P_0603_50V7K
N7
PQ2
12
2N7002_SOT23
Title
Size Document Number Rev
Date: Sheet
ACIN 26,37,44
PACIN 43
B+
B+
12
PR18 432K_0603_1%
12
N36
13
D
S
12
PR21
499K_0603_1%
PR23
N37 PACIN
2
1 2
47K_0603_5%
G
13
PR22
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2522
401318
星期五 二月
499K_0603_1%
2
PQ3 DTC115EUA_SC70
1
12
+5VALWP
PC12
1000P_0402_50V7K
of
42 52, 18, 2005
D D
21
12
TP0610T_SOT23@
PC7
0.22U_1206_25V7K@
N2
3
+12VP
+1.5VSP
+VCCPP
+1.8VSP
+1.25VSP
ADPIN
12
PC2
PC1
100P_0402_50V8J
1000P_0402_50V7K
PR207
47_1206_5%
1 2
PQ1
13
2
PU2 G920AT24U_SOT89
IN
OUT
GND
1
PJP2 JUMP_43X118@
PJP8 JUMP_43X118@
PJP10 JUMP_43X118@
PJP3 JUMP_43X118@
PJP6 JUMP_43X118@
PCN1
1
2
3
4
P-TWO_AW6044-B0D1Z
C C
RB751V_SOD323
CHGRTCP
100K_0603_1%@
N4
PJP1 JUMP_43X118@
112
PJP4 JUMP_43X118@
112
PJP7 JUMP_43X118@
112
PJP21 JUMP_43X118@
112
PJP11 JUMP_43X118@
112
5
PD3
PR14
1 2
22K_0603_5%@
1 2
2
2
2
2
2
BATT+
51ON#39
B B
PR19
CHGRTC
+3VALWP
A A
+5VALWP
+2.5VP
1 2
200_0603_5%
12A_65VDC_451012
ADIN
12
12
PR13
RTCVREF
PR20
200_0603_5%
PF1
3.3V
12
10U_0805_10V4Z
+3VALW
+5VALW
+2.5V
12
PC11
PL1
FBM-L18-453215-900LMA90T_1812
ADPIN
1 2
VIN
PD2
1N4148_SOD80
1 2
N39
12
PR12 47_1206_5%
12
PC8
0.1U_0603_25V7K
12
PR17 200_0603_5%
N3
2
12
PC10 1U_0805_50V4Z
112
112
112
112
112
+12V
2
2
+1.5VS
2
+VCCP
2
+1.8VS
2
+1.25VS
4
12
PC3
100P_0402_50V8J
PD1
1N4148_SOD80
VS
VGA_COREP
VIN
12
PC4
1000P_0402_50V7K
PR8
1 2
1.5K_1206_5%
N1
12
PR10
1 2
1.5K_1206_5%
PR11
1 2
1.5K_1206_5%
PC5
B+
1000P_0603_50V7K
VIN
12
PR2
82.5K_0603_0.1%
N41
1 2
12
12
PR6
19.6K_0603_0.1%
ACON43
MAINPWON6,44,49
PJP12 JUMP_43X118@
112
2
+VGA_CORE
ACIN
Precharge detector
15.8 16.339 15.274
13.692 14.145 13.166
BATT
detector
11.489 11.852 11.133
9.380 9.658 9.025
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Page 43
5
4
3
2
1
PQ4
VIN
D D
12
N10 N8
13
D
2
G
S
C C
ACON 42
PR29 47K_0402_5%
2
PQ10 2N7002_SOT23
IREF37
12
PR25 15K_0603_5%
13
PACIN42
DTA144EUA_SC70
N9
PQ8 DTC115EUA_SC70
ACOFF#
8 7
5
PQ7
47K
2
PD8
1 2
1SS355_SOD323
PACIN
1 2
3K_0603_5%
PR44
1 2
174K_0603_1%
AO4407_SO8
47K
PR39
4
1 3
150K_0603_1%
100K_0603_1%
1 2 36
PC19
PR34
2
G
PR45
IREF=1.096*Icharge IREF=0.438~3.069V
B B
OVP voltage : LI
4S2P : 17.4V--> BATT_OVP= 1.94V
(BAT_OVP=0.1111 *VMB)
BATT_OVP37
PU4B LM358A_SO8
5
+
7
0
6
A A
-
1
P2
12
0.1U_0603_25V7K
12
N43
13
D
S
12
VS
8
P
0
G
4
PQ5 AO4407_SO8
1 2 3 6
4
12
PR27
200K_0603_5%
ADP_I37
12
PC23
0.1U_0402_16V7K
PQ12
2N7002_SOT23
N12
12
PC34
0.01U_0402_25V7Z
PU4A LM358A_SO8
3
+
2
-
105K_0603_0.5%
12
PR36
8 7
5
0.695V
12
10K_0603_1%
12
12
BATT++
12
12
12
PR52
P3
PR35
61.9K_0603_1%
VREF
4700P_0603_50V7K
PC26
0.1U_0402_16V7K
PC33
0.1U_0402_16V7K
PR50 340K_0603_1%
PR51 499K_0603_1%
N13
Iadp=0~3.47A
PR26
0.01_2512_1%(1W)
PR33
100K_0603_1%
PC24
PR37
1 2
1 2
PC27
1 2
1 2
1500P_0603_50V7K
PR42
10K_0603_1%
12
PC35
0.01U_0402_25V7Z
12
12
N20
N21
10K_0603_1%
PR38 1K_0603_1%
N22
12
OUTD
PU3
1
-INC2
2
OUTC2
3
+INE2
4
-INE2
5
FB2
6
VREF
7
FB1
8
-INE1
9
+INE1
10
OUTC1
11
OUTD
12
-INC1
MB3887_SSOP24
PR46
12
95.3K_0603_0.1% PR48
12
95.3K_0603_0.1%
B+
+INC2
VCC(o)
-INE3
+INC1
FSTCHG37
PL2
FBM-L18-453215-900LMA90T_1812
1 2
24
23
GND
22
CS
21
20
OUT
19
VH
0.1U_0603_25V7K
18
VCC
17
RT
16
15
FB3
47K_0603_1%
14
CTL
13
CS
N17
N18
PC25
1 2
PR40
1 2
68K_0603_5%
-INE3
PR43
1 2
ACON
+3VALWP
2
12
PC15
4.7U_1206_25V6K
PR31 0_0402_5%
1 2
1 2
1 2
PC22 0.1U_0603_25V7K
PC28 0.1U_0603_25V7K
1 2
PC29
1 2
1500P_0603_50V7K
+INC1
4.2V
12
PR49 47K_0603_5%
N16
13
PQ14 DTC115EUA_SC70
12
12
PC16
4.7U_1206_25V6K
PC21 2200P_0402_50V7K
CS
13
D
PQ13
2
G
2N7002_SOT23
S
PC17
0.1U_0603_25V7K
SKS30-04AT_TSMA
PR47
12
143K_0603_0.1%
B++
12
PC18
2200P_0402_50V7K
36
241
PQ9 AO4407_SO8
578
LXCHRG
2 1
PL3
1 2
15U_PLFC1045P-150A_3.7A_20%
PD9
Charger
1 2 3 6
PQ6
4
AO4407_SO8
DIS
PR30
1 2
47K_0603_5%
12
PR32
10K_0603_5%
ACOFF#
13
PQ11 DTC115EUA_SC70
2
PR41
1 2
0.02_2512_1%
12
PC30
4.7U_1206_25V6K
CC=0.4~2.8A CV=16.8V(8 CELLS LI-ION)
8 7
5
VIN
ACOFF 37
BATT+
12
12
PC32
PC31
4.7U_1206_25V6K
4.7U_1206_25V6K
Compal Electronics, Inc.
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
SCHEMATIC, M/B LA-2522
Size Document Number Rev Custom
401318
Date: Sheet
星期五 二月
1
of
43 52, 18, 2005
Page 44
5
4
3
2
1
B+
D D
C C
B B
1
PJP16
1
JUMP_43X118
@
2
2
B+++
12
PC38
4.7U_1206_25V6K
12
12
PC40
PC39
2200P_0402_50V7K
4.7U_1206_25V6K
10U_SPC-1204P-100_4.5A_20%
PL5
PQ15
1
G2
D2
2
D2
D1/S2/K
3
G1
D1/S2/K
4
D1/S2/K
S1/A
AO4912_SO8
12
+5VALWP
VS
1
PR63
+
10.2K_0402_1%@
1 2
PC49
2
1 2
PR66
0_0402_5%
150U_D2E_6.3VM_R18
PR64
47K_0402_5%
SYSON37,41,45,47
MAINPWON6,42,49
0.1U_0603_25V7K
8 7 6 5
DL5
12
N24
12
PC50 1U_1206_25V7K
@
PR70
0_0402_5%@
PR72
0_0402_5%
5HG
PC36
12
PR53
0_0402_5%
1 2
LX5
12
12
PC37
1 2
1 2
BST3A
PR59
200K_0402_1%
PR62
499K_0402_1%
0.1U_0603_25V7K
PR57 0_0402_5%
1 2
DH3
12
B+++
12
12
12
PC44
PC43
PC42
4.7U_1206_25V6K
4.7U_1206_25V6K
PR60
0_0402_5%
2200P_0402_50V7K
1 2
DL3
DH5
BST5B BST3B
PD10
CHP202U_SC70
PR54 0_0402_5%
1 2
VL
PC47
BST5A
PR65
ACIN26,37,42
10K_0402_5%
1 2
2VREF_1999
4.7U_0805_6.3V6K
FB5
PC52
VL
12
PR71
806K_0603_1%
N23
12
PC54
0.047U_0603_16V7K
12
14 16 15
19 21
12
12
2
1
4.7_1206_5%
BST5 DH5 LX5
DL5 OUT5
9
FB5
1
N.C.
6
SHDN#
4
ON5
3
ON3 SKIP#
8
REF
0.22U_0603_16V7K
PC45
3
VS
12
PR56
12
PC48
0.1U_0603_25V7K
4.7U_1206_25V6K
12
13
20
18
V+
TON
LD05
PU5
MAX1999EEI_QSOP28
GND
LDO3
23
25
12
PC53
4.7U_0805_6.3V6K
VL
1 2
N25
17
VCC
ILIM3
ILIM5 BST3
OUT3
PGOOD
PRO#
10
12
PR55
47_0402_5%
1 2
DH3 DL3 LX3
FB3
PR69 0_0402_5%
12
2VREF_1999
PC46
1U_0603_10V6K
ILIM3
5
ILIM5
11 28
26 24 27 22
7 2
PC41
0.1U_0402_16V7K
PR58
1 2
PR61
1 2
FB3
118K_0402_1%
499K_0402_1%
+3.3VALWP/+5VALWP
PQ16
1
D2
2
D2
3
G1
4
S1/A
AO4912_SO8
3HG
LX3
1 2
1 2
D1/S2/K D1/S2/K D1/S2/K
PR67
3.57K_0402_1%@
PR68
0_0402_5%
8
G2
7 6 5
12
PL6
10U_SPC-1204P-100_4.5A_20%
1
+
PC51
2
150U_D2E_6.3VM_R18
+3VALWP
A A
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
B
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2522
401318
星期五 二月
of
1
44 52, 18, 2005
Page 45
5
4
3
2
1
D D
+5V
1 2
28
13
IS6227_B+
PR74
2.2_0603_5% PC63
2.2U_0805_10V6K
N32
1 2
17
SOFT2
VCC
23
BOOT2
24
UGATE2
25
PHASE2
22
ISEN2
27
LGATE2
26
PGND2
20
VOUT2
19
VSEN2
21
EN2
16
PG2/REFA
18
OCSET2
DDR
ISL6227BCA-T_SSOP28
86.6K_0603_1%
PC65
0.01U_0402_25V7Z
SOFT2.5
PR76 0_0402_5%
N34
1 2
PR78 0_0402_5%
1 2
PHASE2.5
1.87K_0603_1%
ISEN2.5
1 2
LG2.5
VOUT2.5 EN2.5
12
PR88
12
PR82
VSEN2.5
PQ54
2N7002_SOT23
PC67
0.1U_0603_25V7K
UG2.5A
12
13
D
2
G
S
D
PQ55
S
2N7002_SOT23
13
5
4
5
4
100K_0402_5%
100K_0402_5%
2
G
12
PQ18
D8D7D6D
SI4800BDY_SO8
S1S2S3G
PQ20
D8D7D6D
SI4810BDY_SO8
S1S2S3G
12
PR208
12
PR209
1 2
PR85
330K_0402_5%
PC74
0.1U_0402_16V7K
PC55
4.7U_1206_25V6K
4.7UH_PLFC1045P-4R7A_5.5A_30%
1 2
+3VALW
+3VALW
12
PC59
4.7U_1206_25V6K
PC61
0.1U_0603_25V7K
PC60
4.7U_0805_6.3V6K
12
2200P_0402_50V7K
12
PC66
PD11
2
CHP202U_SC70
BOOT1.5
12
PR77 0_0402_5%
1 2
PR81
1.87K_0603_1%
1 2
1
3
BOOT2.5
PC64
0.01U_0402_25V7Z
SOFT1.5
12
12
PR75 0_0402_5%
N33
1 2
6
UG1.5 UG2.5
5
PHASE1.5
ISEN1.5 LG1.5
4
7 2
12
PC58
4.7U_1206_25V6K
C C
+1.5VSP
4.7UH_PLFC1045P-4R7A_5.5A_30%
PL8
1 2
PQ49
1
1 2
PR199
0_0402_5%
D2
2
D2
3
G1
4
S1/A
AO4912_SO8
D1/S2/K D1/S2/K D1/S2/K
1
12
PC71
PC70
4.7U_0805_6.3V6K 220U_C6_6.3V_M_R15
12
PR80
6.81K_0402_1%
12
PC72
0.01U_0402_25V7Z
+
2
UG1.5A
8
G2
7 6 5
3
VOUT1.5
12
B B
PR84
12
10K_0402_1%
+2.5VS
SUSP#30,37,38,41,46
PR200
0_0402_5%@
PR86
0_0402_5%
1 2
1 2
PR202
0_0402_5%@
VSEN1.5
EN1.5
12
PC75
0.1U_0402_16V7K@
9
10
8
15
OC1.5 OC2.5
11
12
PR87 107K_0603_1%
PR73
51_1206_5%
12
PC62
0.1U_0603_25V7K
PU6
SOFT1
BOOT1
UGATE1 PHASE1
ISEN1 LGATE1
PGND1
VOUT1 VSEN1 EN1 PG1A
OCSET1
12
N35
14
VIN
GND
1
+2.5VP/+1.5VSP
12
12
PL9
SYSON 37,41,44,47
12
PC56
PC57
2200P_0402_50V7K
4.7U_1206_25V6K
12
PR198
0_0402_5%
12
PR201
0_0402_5%@
PJP17
JUMP_43X118@
2
112
B+
+2.5VP
1
12
+
PC69
PC68
12
12
PC73
PR79
0.01U_0402_25V7Z
18.2K_0402_1%
2
4.7U_0805_6.3V6K
220U_C6_6.3V_M_R15
12
PR83
10K_0402_1%
A A
Compal Electronics, Inc.
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
SCHEMATIC, M/B LA-2522
Size Document Number Rev
B
Date: Sheet
星期五 二月
401318
of
1
45 52, 18, 2005
Page 46
5
4
3
2
1
PR180 51_1206_5%
VIN
GND
PJP18
2
112
JUMP_43X118
@
+5V
12
PR181
2.2_0603_5% PC154
2.2U_0805_10V6K
N30
1 2
28
SOFT2
VCC
BOOT2
UGATE2 PHASE2
ISEN2
LGATE2
PGND2
VOUT2 VSEN2
EN2
PG2/REF
OCSET2
DDR
ISL6227BCA-T_SSOP28
13
B+
17
23
24 25
22 27
26
20 19 21 16
18
VDD_CORE/+1.8VSP
ISL6227_B++
12
12
12
D8D7D6D
S1S2S3G
D8D7D6D
S1S2S3G
+5VS
SUSP#30,37,38,41,45
12
PC151
PC150
PC148
2200P_0402_50V7K
5
4
5
4
4.7U_1206_25V6K
4.7U_1206_25V6K
PC158
4.7U_0805_6.3V6K
0.1U_0603_25V7K
1 2
VOUT1.2
PR184
0_0402_5%
1 2
1 2
PR205
0_0402_5%@
PC155
1 2
VSEN1.2
1 2
PR183
0_0402_5%
PR187
2.43K_0603_1%
EN1.2
0.1U_0402_16V7K@
PD21 1SS355_SOD323
PC160
0.01U_0402_25V7Z
PR186 0_0402_5%
1 2
12
12
12
PC171
12
SOFT1.2
UG1.2U G 1.2A PHASE1.2
ISEN1.2 LG1.2
12
BOOT1.2BOOT1.2A
OC1.2
PR182
73.2K_0603_1%
N31
12
PC153
0.1U_0603_25V7K
14
PU12
12
SOFT1
6
BOOT1
5
UGATE1
4
PHASE1
7
ISEN1
2
LGATE1
3
PGND1
9
VOUT1
10
VSEN1
8
EN1
15
PG1
11
OCSET1
1
D D
PQ56
SI4800BDY_SO8
1 2
1 2
18.2K_0402_1%
PL19
1 2
PR203
0_0402_5%@
0_0402_5%
PR204
PQ57
SI4810BDY_SO8
VGA_COREP
1
+
PC159
PC156
C C
POWER_SEL17
PR190
100K_0402_1%
1 2
PC161
0.01U_0402_25V7Z
2
220U_D2_4VM_R25
4.7U_0805_6.3V6K
PR188
30.1K_0402_1%
N28
12
1 2
PR185
3.48K_0402_1%
2
G
1.8UH_D104C-919AS-1R8N_9.5A_20%
12
12
PC149
0.01U_0402_25V7Z
12
12
N29
13
D
S
PR189
PQ51
2N7002_SOT23
B B
3
PC164
PU13
APL1085UC-TR_TO252
2
VOUT
VIN
ADJUST
1
N27
1 2
Title
Size Document Number Rev
Date: Sheet
+1.8VSP
12
PR191 100_0402_1%
12
PR192
44.2_0402_1%
12
PC162 10U_1206_6.3V7K
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2522
401318
星期五 二月
1
46 52, 18, 2005
of
0.1U_0603_25V7K
PJP19 JUMP_43X118@
2
112
PQ53
SI3456DV-T1_TSOP6
D
6
S
45 2 1
G
3
N26
12
PC172
VIN1.8
PC163
4.7U_0805_6.3V6K
2
1 2
100P_0402_50V8J
POWER_SEL
H
VGA_CORE
1.2V
+3VS
VGA_CORE for ATI-M11
L
A A
5
1.05V
PR206
47K_0603_5%
RUNON41
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1 2
Page 47
5
4
3
2
1
+2.5V 2VREF_1999
+2.5V
N45
PJP20
12
PC165
2
G
2
1
12
13
D
S
VIN12
2
1 2
1.5K_0603_5%
2
1
PR193
PQ52 2N7002_SOT23
13
PQ30
PR210
12
PR194
909_0603_1%@
1.37K_0603_1%
1 2 3 6
12
PR116
10K_0402_5%
HMBT2222A_SOT23
N48
N491
1
12
VREF1.05
12
PR196
1K_0402_1%
PQ29
AO4407_SO8
4
O
VIN1.05
12
PC167
0.1U_0402_16V7K
8 7
5
PU10_VIN
8
PU10A
3
P
+
2
-
G
LM393M_SO8
4
PC118
1000P_0402_50V7K
2 3 4
12
N53
PD15
2 1
FB12 REF12
12
PU14
VIN1VCNTL
NC
GND VREF
NC
VOUT
NC TP
APL5331KAC-TR_SO8
PC169
10U_1206_6.3V7K
PL14
5UH_SPC-06704-5R0_2.9A_30%
143K_0603_1%
SKS30-04AT_TSMA
D
PQ32
2N7002_SOT23
S
2N7002_SOT23
4
6 5 7 8 9
PR115
1 2
100K_0402_5%
13
G
PQ33
12
PR119
2
+VCCPP
12
N50
13
D
S
1 2
PC166
1U_0603_10V6K
PC112 470P_0402_50V8J
1 2
12
PR118 30K_0603_1%
PR120 100K_0402_5%
12
N51
2
G
+3V
PR121 0_0402_5%
+3VS
12
PR197 47K_0603_5%
1 2
0.1U_0402_16V7K@
0_0402_5%
+VCCP_PWRGD 37
JUMP_43X118@
10U_1206_6.3V7K
PR113
PC110
N46
PJP14
12
PC107
2
G
+2.5V
2
2
1
1
12
13
D
PQ28 2N7002_SOT23
S
PR112
1K_0402_1%
2
SUSP40,41
+VCCPP
1
2
PU15
XC61CN0902MR
1
12
PC170
1000P_0402_50V7K
1
+
+
PC113
PC114
2
100U_25V_M
100U_25V_M
PWDOUT
VDDIN
VSS
3
+12VP
12
PC115
10U_1206_25VAK
2VREF_1999
VL
12
SYSON 37,41,44,45
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
D D
SUSP40,41
C C
B+
2
2
@
1
1
B B
PC116
10U_1206_25VAK
A A
12
PC117
PR195
0_0402_5%
1 2
0.1U_0402_16V7K@
PJP15 JUMP_43X118
PD14 RB751V_SOD323
1 2
N52
12
31
1000P_0402_50V7K
E
2
B
C
2SA1036K_SOT23
5
JUMP_43X118@
10U_1206_6.3V7K
PC168
PR117
10K_0805_5%
1 2
N49
PQ31
+12VSP/+2.5VSP/+VCCP
+2.5V
PU9
VIN1VCNTL
2
GND
3
VREF
4
VOUT
APL5331KAC-TR_SO8
12
PC111
10U_1206_6.3V7K
6 5
NC
7
NC
8
NC
9
TP
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2522 401318
1
VIN1.25
12
VREF1.25
12
12
PC109 PR114 1K_0402_1%
0.1U_0402_16V7K
Title
Size Document Number Rev
B
Date: Sheet
星期五 二月
+1.25VSP
+3V
1 2
PC108
1U_0603_10V6K
of
47 52, 18, 2005
Page 48
5
4
3
2
1
CPU CORE
12
12
PC121
PC120
4.7U_1206_25V6K
.56UH_MPC1040LR56_ 23A_20%
12
PD16
2 1
SKS30-04AT_TSMA
N58
CPU_B+
12
12
PC138
4.7U_1206_25V6K
4.7U_1206_25V6K
PD18
2 1
SKS30-04AT_TSMA
12
PC122
0.01U_0402_25V7Z
2200P_0402_50V7K
PL16
1 2
PC129
PR136 820_0402_5%
1 2
0.47U_0603_16V7K
1 2
PR146 3K_0402_1%
N64
1 2
PC133
0.022U_0402_16V7K
PC139
0.01U_0402_25V7Z PL17
.56UH_MPC1040LR56_ 23A_20%
1 2
PR162 820_0402_5%
1 2
1 2
PC141
0.47U_0603_16V7K
1
+
PC123
100U_25V_M
2
1 2
0.001_2512_5%
12
PR137 499_0402_1%
1 2
0_0402_5%
PL15
FBM-L18-453215-900LMA90T_1812
1 2
PR131
12
PR138 499_0402_1%
PR149
PR140
3 5
241
5
D8D7D6D
S1S3G
S
4
2
PR144 820_0402_5%
1 2
+5VS
1
3 5
241
5
D8D7D6D
S1S3G
S
SI4362DY_SO8
4
2
PR166
1 2
820_0402_5%
CPU_B+
PQ36
SI4362DY_SO8@
PQ43
12
PC119
4.7U_1206_25V6K
5
D8D7D6D
S1S3G
S
4
2
12
12
PC136
PC137
2200P_0402_50V7K
5
D8D7D6D
S1S3G
S
SI4362DY_SO8@
4
2
+5VS
1 2
PR139
1 2
0_0402_5%
1 2
1 2
13
D
S
PQ38
RHU002N06_SOT323
+3VS
CLKEN#16
+3VS
CLKEN#16
12
PR122 10_0402_5%
12
1532VCC D0 D1 D2 D3 D4 D5
1532SHDN#
MAX1532AETL_TQFN40
1532VROK
1532S0 1532S1
TIME CCV
1532REF 1532ILIM
1532SUS 1532SKIP
1 2
PC135
27P_0402_50V8J
PR161 100K_0402_1%@
PR164
0_0402_5%@
12
PR165
0_0402_5%@
PR167 100K_0402_1%@
PU11
10
VCC
24
D0
23
D1
22
D2
21
D3
20
D4
19
D5
25
VROK
4
S0
5
S1
6
SHDN#
1
TIME
12
CCV
2
TON
8
REF
9
ILIM
7
OFS
3
SUS
18
SKIP
11
GND
N55
12
13
D
N57
2
G
S
12
12
2.2U_0603_6.3V4Z
VDD
BSTM
DHM
LXM DLM
PGND
CMP
CMN
OAIN+
OAIN-
CCI
BSTS
DHS LXS DLS CSP
CSN
GNDS
PR155
15K_0402_1%@
1 2
N65
13
D
2
G
S
PQ45
RHU002N06_SOT323@
N54
13
D
2
G
S
PQ47
RHU002N06_SOT323@
PC124
V+
FB
TIME
N56
1 2
30 36 26 28 27 29 31 37 38 17 16 15 14 35 33 34 32 40 39 13
PQ40
RHU002N06_SOT323@
2
G
12
PC126
BSTM.A
PR125
1 2
0_0402_5%
FB
N59
1 2
PC131 470P_0402_50V8J
1 2
13
D
S
BSTS.A DHS LXS
DLS CSP CSN
PR156
36K_0402_5%@
PQ46
RHU002N06_SOT323@
BSTM
12
PC127
0.01U_0402_25V7Z
1 2
LXM DLM
CMP CMN OAIN+ OAIN-
PR152
1 2
12
PC140
PR128 0_0402_5%
0.22U_0603_16V7K
0_0402_5%
0_0402_5%
1 2
0.22U_0603_16V7K
PQ34
SI7392DP_SO8
DHM.ADHM
CHP202U_SC70
BSTM
BSTS
SI7392DP_SO8
PR158
DHS.A
PQ35
SI4362DY_SO8
PD17
2
3
PQ39
PQ42
D D
PC125
1U_0603_10V6K
PR123 0_0402_5%
12
PR124 0_0402_5%
12
PR127 0_0402_5%
12
PR130 0_0402_5%
12
PR132 0_0402_5%
12
PR134 0_0402_5%
12
PR135 0_0402_5%
1 2
1532VCC
PR143 30.1K_0402_1%
PC130 270P_0402_50V7K
PC132 0.22U_0603_16V7K
12
PC134
2
100P_0402_50V8J
G
12
12
PR159
N63
PQ41
13
D
2
G
RHU002N06_SOT323
S
PM_DPRSLPVR25
PR147
71.5K_0402_1%
1 2
1 2
PR163
0_0402_5%
CPU_VID07 CPU_VID17 CPU_VID27 CPU_VID37 CPU_VID47 CPU_VID57
VGATE28,37
1 2
13
D
2
G
S
PQ37
RHU002N06_SOT323
+3VS
PR160
100K_0402_1%
N61
2
12
PR142
100K_0402_5%@
1 2
PR145 200K_0402_1%
PR150
1 2
10.7K_0402_1%
PR154
0_0402_5%
1 2
PR157 10K_0402_1%
10K_0402_1%
1 2
N60
1
C
B
PQ44
E
3
HMBT2222A_SOT23
PR126
0_0402_5%@
1532VCC
1 2
1532REF
C C
PM_STPCPU#6,9,16,25
+3VS
B B
PR129
1 2
0_0402_5%@
1 2
PR133
0_0402_5%
PR141 0_0402_5%
VR_ON37
1 2
FB 1532OFS
PR148 100K_0402_1%
PR151
0_0402_5%
N62
1 2
PR153
1 2
100K_0402_5%@
PM_DPRSLPVR25
H_PSI#7
A A
CPU VCC SENSE
1 2
3K_0402_1%
B+
+CPU_CORE
1 2
PC128
1000P_0402_50V7K@
Compal Electronics, Inc.
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
SCHEMATIC, M/B LA-2522
Size Document Number Rev Custom
401318
Date: Sheet
星期五 二月
1
of
48 52, 18, 2005
Page 49
5
4
3
2
1
PR168
1K_0402_5%
PR170
6.49K_0402_1%
BATT+
BATT+
12
BATT_TEMP
PC142
0.01U_0402_25V7Z
BATT_TEMP 37
+3VALWP
SMB_EC_DA1 20,37
SMB_EC_CK1 20,37
100K_0603_1%_TH11-4H104FT
PH1
CPU
PR175
0_0402_5%
N69 N68
12
PC147
0.22U_0603_16V7K
PH1 under CPU botten side :
CPU thermal protection at 90 +-3 degree C Recovery at 50 +-3 degree C
VL
PD19
1SS355_SOD323@
12
L_10
12
215K_0603_1%
1 2
12
VL
PR178 20K_0603_1%
PR176
1 2
PR177
470K_0402_1%
PR179
470K_0402_1%
PJP23 JUMP_43X39@
470K_0402_1%
OTPREF
12
12
112
PR173
1 2
5 6
12
PC146
1000P_0402_50V7K
2
PCN2
1 2 3 4 5 6 7
BATT++
12A_65VDC_451012
B/I
TS
SMD SMC
PF2
FBM-L18-453215-900LMA90T_1812
N66
21
12
PC143 1000P_0402_50V7K
PR169
1K_0402_5%
12
PL18
1 2
PR171
100_0402_5%
1 2
PR172
100_0402_5%
12
1 2
1 2
D D
C C
SUYIN_200107MB007S112ZL
PJPB1 battery connector
SMART Battery:
1.BAT+
2.ID
3.B/I
4.TS
5.SMD
6.SMC
7.GND
B B
Battery Connect/OTP
PU10_VINVS
PD20 1SS355_SOD323@
1 2
12
PC145
0.1U_0603_25V7K
+
-
8
PU10B
P
O
G
LM393M_SO8
4
7
B+
VL
6,42,44
MAINPWON
12
PR174 470K_0402_1%
13
N67
D
PQ48
2
G
2N7002_SOT23
S
A A
Compal Electronics, Inc.
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
SCHEMATIC, M/B LA-2522
Size Document Number Rev
401318
Date: Sheet
星期五 二月
1
of
49 52, 18, 2005
Page 50
5
Version change list (P.I.R. List)
4
3
Modify List PG# Rev.Reason for changeItem Phase
2
1
D D
Increase Q7 Vb voltage1 Change R51 from S RES 1/16W 330 +-5% 0402 to S RES 1/16W 47K +-5% 0402 06 0.2 PP
2
ATi RS300MD pin REF27 required 3.3V level
3
DDR1 MA15 connection change for 1G Memory Change DDR_AD_MA15 connection from JDIMM1 pin 97 to pin 123
Change R63 tie voltage from GND to +3VS 09
13
0.2 PP
0.2 PP
Change DDR_BD_MA15 connection from JDIMM2 pin 97 to pin 123 14
Clock generator VDDA should not be tied together
4
with VDD48M/VDDXTAL
5
Correct CPU frequence Auto-Select function
Change VDD48M/VDDXTAL tie voltage from +3VS_VDDA to +3VS_CLK
Change R345 connection sequence from R345->R346 to R346->R345
16
16
0.2 PP
0.2 PP
Change R343 connection sequence from R343->R344 to R344->R343
Separate AGP_STOP# and AGP_STP# trace
6
Change R270 connection from AGP_STP# to AGP_STOP#
17
0.2 PP
Modify RS300MD pin AH30 net name AGP_STP# and connect to SB200 pin AC1
Connect H_CPUSLP# to Pull-up +VCCP
7
8
Add USB Over Current Pull-up voltage
C C
9
Unuse for External VGA Chip
10
Change EC strap Select to ENE KB910
Change R326 connection from H_SLP#to H_CPUSLP# 25
Add R547,R11,R10 S RES 1/16W 10K +-5% 0402 and connect to +3V 25 Add R8,R9,R184 S RES 1/16W 10K +-5% 0402 and connect to +3V 26
Unpop R587 S RES 1/16W 4.7K +-5% 0402 and Q30 S TR MMBT3904 (S0T-23) 26
Unpop R452 S RES 1/16W 10K +-5% 0402
28
0.2 PP
0.2 PP
0.2 PP
0.2 PP
Pop R451 S RES 1/16W 10K +-5% 0402
11
JCDR1 change for ME requirement Change JCDR1 from S H-CONN QTC 03A-0500F050-A510 H5.0 to S W-CONN ACES 87216-5002 50P P1
12
Correct CIR on/off Function Change JCDR1 pin 50 net name "CIR_ONOFF" and connect to U44 pin 109 29
13
Remove RTL8100CL NA pin power Add L1 S SUPPRE_ CHENG-HANN CHB1608U301 (0603) and Unpop 30
14
J1394A1 change for ME requirement Change J1394A1 from CONN SUYIN 020204FR004S506ZL 4P 1394 toCONN SUYIN 020115FR004S509ZL 4P P.8 1394 31
15
Correct XDDET0# pull-up Resistor Change R331 from S RES 1/16W 0 +-5% 0402 to S RES 1/16W 33K +-5% 0402
16
Modify WLAN Function Change JMPCI1 pin 13 net name to "WLAN_OFF#" and connect to U44 pin 36 and JKS1 pin 3 33
29
32
0.2 PP
0.2 PP
0.2 PP
0.2 PP
0.2 PP
0.2 PP Change JKS1 pin 2 net name to "WLAN_BTN#" and connect to U44 pin 90 39 Change JKS1 to S W-CONN ACES 85205-0400 4P P1.25 39
17
B B
Correct Buzzer Sound Small Function UnPOP R203 S RES 1/16W 2.4K +-5% 0402
Change C661 S CER CAP 1U 10V Z Y5V 0603 to R2 S RES 1/16W 0 +5% 0603
35
0.2 PP
Remove R200 S RES 1/16W 10K +-5% 0402
18
Correct Codec ADI1981B function Connect U15 pin5 to "ICH_AC_SDOUT" and link to SB200
35
0.2 PP Connect U15 pin8 to "ICH_AC_SDIN0" and link to SB200 Connect U15 pin2 to "CLK_14M_CODEC" and link to CLOCK Generator U29
19
Correct Play music then plug in head phone AMP still occur sound
20
Correct LED function Change U44 pin24 net name to "TV_LED#" and connect to JSWP1 pin38
Change R160 from pull-down to pull-up and connect to +3VS 36 Delete R409 and Connect JHP1 pin4 to GND 36
37
0.2 PP
0.2 PP Change U44 pin162 net name to "DVD_LED#" and connect to JSWP1 pin43 Change JSWP1 pin34 net name to "PWR_LED#" and connect to U44 pin85
21
Add BIOS Debug Solution
Add R603 S RES 1/16W 33 +-5% 0402 and connect to U29 pin3 Add net name to "CLK_14M_SIO" and connect from R603 to JDBUG2 pin6
A A
Add R604 S RES 1/16W 33 +-5% 0402 and connect to U39 pin A17 Add net name to "CLK_PCI_SIO" and connect from R604 to JDBUG2 pin6
16 16 25 25
0.2 PP
Change JDBUG2 to S H-CONN ACES 85201-2005 20P P1.0 38
Compal Electronics, Inc.
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
SCHEMATIC, M/B LA-2522
Size Document Number Rev
401318
Date: Sheet
星期五 二月
1
of
50 52, 18, 2005
Page 51
5
4
3
2
1
Version chan ge list (P.I.R. List)
Modify List PG# Rev.Reason for changeItem Phase
Add Buzzer Disable Function
22 Add U52 S IC TC7SH08FU SSOP-5 AND 35 0.2 PP
23 Correct CUP Clock Auto Select Function Delete R232 S RES 1/16W 1K +-5% 0402 and U18 S IC NC7SZ04P5X SC70-5 INVERTER 7
D D
C C
B B
Correct LAN function Error Delete C539,C541,C542 S CER CAP .1U 16V Z Y5V 0402
24
Correct CIR auto power on problem Add R613 S RES 1/16W 10K +-5% 0402 for CIR_ONOFF# pull-up to +3VLAW 37
25
Correct Buzzer sound too small issue Delete C449, C453, C456 S CER CAP 1U 10V Z Y5V 0603 35
26
Modify Speaker POP noise Delete R612 S RES 1/16W 0 +-5% 0402
27
Delete Audio MX3000 function
28
Increase LED brightness Change JLCD1 pin41 net from +3VALW to +5VALW
29
CIR Power Saving when LID SW On Add Q40 S TR 2N7002 1N SOT-23
30
Modify SD WP function Issue Add Q47 S TR 2N7002 1N SOT-23
31
Modify XD Power Off Sequence Issue UnPop C860 S CER CAP .1U 25V K X7R 0603 32
32
33
S5 South Bridge Power Saving Delete Q48 S TR AO3401 1P SOT-23 1.0
34
Modify SD Write Protect Issue UnPop Q47,Q52 S TR 2N7002 1N SOT-23 and U60 S IC TC7SH32FU SSOP-5 OR
35
Reduce Reed Relay Noise Add Q53 S TR 2N7002 1N SOT-23 36
Reduce LAN EMI Add C866 SE095104K00 S CER CAP .1U 10V +-10% X5R 0402 30
36
Change XD Power to +SD_VCC Add R646 SD0020000T8 S RES 1/10W 0 +5% 0805 32
37
Remove HP POP noise Del R464 SD028000010 S RES A34 1/16W 0 +-5% 0402
38
39
Add LAN +2.5V Stable Add C867,C868 SE095104K00 S CER CAP .1U 10V +-10% X5R 0402
40
Modify USB Current Limit Voltage Back issue Add R648 SD028000010 S RES A34 1/16W 0 +-5% 0402, link to SUSP for U32 Modify USB Current Limit Voltage Remain issue R647 SD028000010 S RES A34 1/16W 0 +-5% 0402, link to SUSP for +USB_AS
A A
5
Modify +3V Voltage Remain issue Change SYSON# link from +12V to +5VALW 41
41
4
Add Net "BEEP_OFF#" link to U44 pin 42
Change Net "CPU_BSEL0_R" connection
R2 S RES 1/16W 0 +5% 0603
C858 S CER CAP .1U 16V Z Y5V 0402
Add U58 S RELAY 5V TTI TRR2A05S00
Delete U40 S IC MX3000AS SO-16 BASS EXTENSION
R450,R487,R494,C714,R461,C739,Y5,C740,C750,C738,C777,C778,C744,C758,761 C787,R534,R541,C783,C744,R175,C745,R166,R446 C788,R535,R542,C784,C775,R174,C746,R167,R447
Add Q41,Q42,Q43 S TR AO3401 1P SOT-23
Change JSWP1 pin29,30,59,60 net from +3VALW to +5VALW Add Q44,Q45,Q46 S TR AO3401 1P SOT-23
C862 S CER CAP .1U 10V +-10% X5R 0402
R616 S RES 1/16W 100K +-5% 0402
Add U31 S IC G914E SOT23-5 2.5V LDO REG.
Add R478 SD028000010 S RES A34 1/16W 0 +-5% 0402
Q66 SB570020000 S TR 2N7002 1N SOT-23, link to SUSP for +USB_AS
Add R650 SD028000010 S RES A34 1/16W 0 +-5% 0402, link to SUSP for U2
R649 SD028000010 S RES A34 1/16W 0 +-5% 0402, link to SUSP for +USB_BS Q67 SB570020000 S TR 2N7002 1N SOT-23, link to SUSP for +USB_BS
Add R652 SD028000010 S RES A34 1/16W 0 +-5% 0402, link to SUSP for U2
R651 SD028000010 S RES A34 1/16W 0 +-5% 0402, link to SUSP for +USB_CS Q68 SB570020000 S TR 2N7002 1N SOT-23, link to SUSP for +USB_CS
Del NET (LAN_TX2+, LAN_TX2-) and (LAN_TX3+, LAN_TX3-) Del NET (RJ45_TX2+, RJ45_TX2-) and (RJ45_TX3+, RJ45_TX3-) Add R653 link to JLAN1 pin4,pin5 & Add R654 link to JLAN1 pin7,pin8
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
PP0.2
30
0.3 MP1
MP10.3
MP10.3
36
36
23
MP10.3
MP10.3
MP10.3
39Change JSWP1 pin17,47 net from +3VS to +5VS
29
32
0.3
27
32
1.0 IRT1
MP10.3
MP10.3
MP1
IRT1
1.0 IRT1
MP_1A1A
MP_1A1A
36
30
40
1A
MP_1A1A
MP_1A1A
MP_1A
1A MP_1A
30 2.0 MP42 LAN Immunity Issue
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-2522
Size Document Number Rev
401318
Date: Sheet
2
星期五 二月
1
51 52, 18, 2005
of
Page 52
5
4
3
2
1
Version change list (P.I.R. List) Page 1 of 1
Reason for change PG# Modify List B.Ver#Item
D D
1
Change adapter from 90W to 60W. So, we need to modify CP mode setting.
43 Change PR35 from 49.9K to 76.8K 2004.08.20
Power section
Date
2 To adjust 1.8VS riseing time. 46 Add PQ53 (SI3456DV), PR206 (47K) and PC172 (0.1uF) 2004.09.10
3 PC123 interfere with logic up. 48 Change PC123 from 220uF_25V to 100uF_25V 2004.09.10
4 No +3VALWP when battery only. 42 Add PD22 and PD23 2004.09.14
5
Change adapter from 60W to 75W. So, we need to modify CP mode setting.
6 Change VS sequence.
7 Change DCIN connector. 42 Change PCN1 from SP020022200 to SP020024800.
8 Change VGA CORE OCP setting. 46 Change PR187 from 1.87K to 2.43K;
9 To adjust the time sequence of +2.5V power plane by
C C
10 To reduce temperature of the VGA_COREP power
H/W's request.
plane MOSFET.
43 Change PR35 from 76.8K to 61.9K
2004.10.18
42 Add PR207 (47 ohm) 2004.10.18
2004.11.02
PR182 from 86.6K to 73.2K.
45 Add PR208 and PR209 (100K_0402_5%);
46 Delete PQ50(AO4912), add PQ56 (SI4800) and
Add PR85 (330K_0402_5%); Add PQ54 and PQ55 (2N7002); Add PC74 (0.1U_0402_16V).
PQ57 (SI4810).
2004.11.09
2004.11.18
2004.11.22
B B
A A
Compal Electronics, Inc.
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
SCHEMATIC, M/B LA-2522
Size Document Number Rev
401318
Date: Sheet
星期五 二月
1
of
52 52, 18, 2005
Page 53
Loading...