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MODEL NAME : EDX20
PCB NO : LA-2481
1 1
PVT
COMPAL CONFIDENTIAL
2 2
EDX20 Schematics Document
2005-02-22
REV: 0.5
3 3
4 4
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
A
B
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
COVER SHEET
Size Document Number Rev
EDX20 LA-2481
Date: Sheet
E
of
148Tuesday, F e b ru a r y 22, 2005
0.5
Page 2
5
4
3
2
1
Compal confidential
D D
Hydias/Toshiba
LCD 12.1" XGA
page 17
LCD 12.1" SXGA
page 17 page 17
LVDS Transmitter
CH7308
LVDS
SDVO
DVI Controller
C C
HDMI CONN.
page 16
SiL1362/CH7307
page 16
Docking/CRT
MINI PCI
CRT CONN.
page 26
IDSEL:AD20
(PIRQA/B#,GNT#2,REQ#2)
CardBus Controller
B B
CardReader
SIO
ENE CB712
page 24
Slot 0
page 25 page 25 page 28
page 35 page 35
TPM CONN.
page 18
3.3V 33MHz
IDSEL:AD17
(PIRQF#,GNT#3,REQ#3)
Gigabit Lan
RTL8110SBL
page 27
Transformer
& RJ4 5
3.3V 33MHz
PCI BUS
Docking
RJ45
LPC BUS
Keyboard Controller
ENE KB910
LPC47N217D
A A
Digitizer
FIR
5
TPM
SLD9630TT
4
Dothan-LV
uFCBGA CPU
page 5,6
HA#(3..31)
System Bus
400MHz
HD#(0..63)
Intel 915 GMS (Alviso)
GMCH-M
FC-BGA840
DMI
page 8,9,10,11
1.5V
100MHz
AC-LINK
ICH6-M
609 BGA
page 19,20,21,22
page 32,33
XBUS
BIOS CONN.
1MB ROM BIOS
SST39VF080
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
ATA100
USB 2.0
48MHz / 480Mb
3
Memory BUS
(DDR2)
Channel A
1.8V 400MHz
page 34
SO-DIMM X 1
On Board 512 MB (8-Cell)
3.3V 24.576MHz
HDD 1.8"
page 23
Pecos USB port0
Pecos USB port1
LLANO USB port2
LLANO USB port3
LLANO USB port4
Travel Dock USB port5
Bluetooth USB port6
Finger Printer USB port7
page 31
page 31
page 36
page 36
page 36
page 36
page 36
page 36
BANK 0
page 14
page 12,13
AC97 CODEC
Docking
Phone/Mic
BT Module
FPR brd
2
Block Diagram
Clock Generator
IDT CV140
Fan Control X1
SW LED BD
BATT IN/+2.5V
Mic 1/2/3
STAC9758
page 29
AMP & Phone
MIC
Title
Size Document Number Rev
Date: Sheet
page 30
Compal Electronics, Inc.
1.05V(+VCCP)
5V/3.3V/15V
1.8V / 0.9V
VCORE
CHARGER
Block Diagram
EDX20 LA-2481
1
page 15
page 5
page 42
page 44
page 41
page 42,43
page 45
page 39
248Tuesday, Fe b r u a r y 22, 2005
of
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Power Management table
+12VALW
External PCI Devices
D D
DEVICE
Mini-PCI
LAN AD17 3 F
IDSEL #
AD18
AD20
REQ/GNT #
1
2A BCARD BUS
PIRQ
G,H
State
Signal +1.8VS
+5VALW
+3VALW
+1.8V
+5VS
+3VS
+2.5VS
+1.5VS
+0.9VS
+VCCP
+CPU_CORE
ON
S1
ICH6M SM Bus Address
DEVICE
C C
Clock Generator
DDR2 On Board
DDR2 DIMM1
TPM
Address
1101 001Xb
1010 000Xb
1010 001Xb
EC SM Bus1 Address
AddressDEVICE
Smart Battery 1
AT24C16AN-10SI-2.7(U24) 1011 XXX R/W#b
B B
0001 011Xb
EC SM Bus2 Address
DEVICE
Smart Battery 2
ALS TSL2550T
ADM1032
TC74A1-5.0VCT(U34) 1001 001Xb
TC74A2-5.0VCT(U43) 1001 010Xb
Address
0001 011Xb
1001 100Xb
S3
S5 S4/AC
S5 S4/AC don't exist
Voltage Rails
Power Plane
VIN
B+
+CPU_CORE
+VCCP
+0.9VS
+1.5VS
+1.8V
+2.5VS
+3VALW
+3VS 3.3V switched power rail
+5VALW
+5VS
+12VALW
RTCVCC
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Description
Adapter power supply (19V)
AC or battery power rail for power circuit
Core voltage for CPU
1.05V power rail for Processor I/O and MCH core power
0.9V switched power rail for DDRII Vtt
1.5V switched power rail for PCI-E interface
1.8V power rail for DDRII
1.8V switched power rail+1.8VS ON
2.5V switched power rail for MCH video PLL
3.3V always on power rail
5V always on power rail
5V switched power rail
12V always on power rail
ON ON
ON ON
ON
OFF
ON
OFF
ONONS0
OFF
OFFOFF
OFF
S0-S1
N/A
N/A
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ONRTC power
S3
N/A
N/A
OFF
OFF
OFF
ON
OFF OFF
OFF
ON ON*
OFF
ON
OFF
ON ON*
ON
USB PORT TABLE
PORT FUNCTION
PORT 0
PORT 1
PORT 2
PORT 3
PORT 4
PORT 5
PORT 6
PORT 7
S5
N/A
N/A
OFF
OFFOFF
OFF
OFF
OFF
OFF
OFF
ON*
OFF
ON
PECOS PORT 0
PECOS PORT 1
LLANO PORT 2
LLANO PORT 0
LLANO PORT 1
TRAVEL DOCKING
BLUETOOTH
FINGER PRINTER
A A
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
5
4
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
NOTE&Revision
Size Document Number Rev
EDX20 LA-2481
Date: Sheet
1
of
348Tuesday, February 22, 2005
0.5
Page 4
5
Input Current Sense
D D
C C
PACIN
VIN
VIN
Vin
Detector
+VS
EC_ON#
VIN
VSB
BATT_A
BATT_B
B B
RTC
Charger
OVER
VL
TEMP.
P2
SWITCH
ACOFF#
RTCVREF
MAINPWRON
P3
PACIN
PACIN
ACIN
VS
PROTECT
+12VALW
Bridge
SPOK
SUSP#
A A
battery
5
VSB
MAINPWRON
SPOK
4
IREF
B+
CHG_B+
B+
+3VALW
+5VALW
+1.8VPGD
+VCCP_PWRGD
VS
DC-DC
MAX1902
4
3
http://hobi-elektronika.net
FSTCHG
MAX1908
Charger
Output Current Sense
VMB Feedback
Batt selector
BATSELB_A#
FSTCHG
MAX1538
+1.5VALWP
DC-DC
FAN5234
LM358
SYSON SYSON#
+1.2VP
+1.8VP
DC-DC
ISL6227
SUSP
+VCCPP
SUSP#
SUSP#
B+++
LDO
G965
+3VALWP
+5VALWP
+12VPALWP
VL
2.5VREF
3
BATT+
LDO
+2.5VSP
VR_ON
PM_DPRSLPVR
H_DPSLP#
SYSPOK
VGATE
CLKEN#
2
A or B
VIN
ACOFF
+0.9VSPAPL5331
2
1
BATT_A+ PIN1
ID PIN2
A Battery
B Battery
OVP
B/I PIN3
TS PIN4
SMD PIN5
SMC PIN6
BATT_A+ PIN1
ID PIN2
B/I PIN3
TS PIN4
SMD PIN5
SMC PIN6
BATT-OVP
Protector
SWITCH
CPU_B+
+CPU_CORE
DC-DC
MAX1907
Title
POWER Tree
Size Do cu ment Number Rev
EDX20 LA-2481
Date: Sheet
REF
+5VALWP
448Tuesday, February 22, 2005
1
0.5
of
Page 5
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4
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H_A#[3..31]<8>
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
R399 0_0402_5%@
1 2
1 2
R398 0_0402_5%@
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_ADSTB#0
H_ADSTB#1
CPU_CK_ITP
CPU_CK_ITP#CK_ITP#
H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRDY#
H_HIT#
H_HITM#
H_IERR#
H_LOCK#
H_RESET#
H_RS#0
H_RS#1
H_RS#2
H_TRDY#
ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_DBRESET#
H_DBSY#
H_DPSLP#
H_DPRSTP#
H_DPWR#
ITP_BPM#4
ITP_BPM#5
H_PROCHOT#
H_PWRGOOD
H_CPUSLP#
ITP_TCK
ITP_TDI
ITP_TDO
TEST1
TEST2
ITP_TMS
ITP_TRST#
H_THERMDA
H_THERMDC
H_THERMTRIP#
D D
H_REQ#[0..4]<8>
H_ADSTB#0<8>
H_ADSTB#1<8>
H_RS#[0..2]<8>
12
12
1 2
5
CK_ITP
CLK_CPU_BCLK
CLK_CPU_BCLK#
H_ADS#<8>
H_BNR#<8>
H_BPRI#<8>
H_BR0#<8>
H_DEFER#<8>
H_DRDY#<8>
H_HIT#<8>
H_HITM#<8>
H_LOCK#<8>
H_RESET#<8>
H_TRDY#<8>
ITP_DBRESET#<21>
H_DBSY#<8>
H_DPSLP#<20,45>
H_DPRSTP#<20>
H_DPWR#<8>
H_PWRGOOD<20>
H_CPUSLP#<8,20>
TEST1
R1571K_0402_5%@
TEST2
R1871K_0402_5%@
H_THERMTRIP#<8,20>
H_PWRGOOD
CK_ITP<15>
C C
CK_ITP#<15>
CLK_CPU_BCLK<15>
CLK_CPU_BCLK#<15>
R153
1 2
+VCCP
56_0402_5%
B B
A A
+VCCP
R154 200_0402_1%
U1A
P4
A3#
U4
A4#
V3
A5#
R3
A6#
V2
A7#
W1
A8#
T4
A9#
W2
A10#
Y4
A11#
Y1
A12#
U1
A13#
AA3
A14#
Y3
A15#
AA2
A16#
AF4
A17#
AC4
A18#
AC7
A19#
AC3
A20#
AD3
A21#
AE4
A22#
AD2
A23#
AB4
A24#
AC6
A25#
AD5
A26#
AE2
A27#
AD6
A28#
AF3
A29#
AE1
A30#
AF1
A31#
R2
REQ0#
P3
REQ1#
T2
REQ2#
P1
REQ3#
T1
REQ4#
U3
ADSTB0#
AE5
ADSTB1#
A16
ITP_CLK0
A15
ITP_CLK1
B15
BCLK0
B14
BCLK1
N2
ADS#
L1
BNR#
J3
BPRI#
N4
BR0#
L4
DEFER#
H2
DRDY#
K3
HIT#
K4
HITM#
A4
IERR#
J2
LOCK#
B11
RESET#
H1
RS0#
K1
RS1#
L2
RS2#
M3
TRDY#
C8
BPM0#
B8
BPM1#
A9
BPM2#
C9
BPM3#
A7
DBR#
M2
DBSY#
B7
DPSLP#
G1
DPRSTP#
C19
DPWR#
A10
PRDY#
B10
PREQ#
B17
PROCHOT#
E4
PWRGOOD
A6
SLP#
A13
TCK
C12
TDI
A12
TDO
C5
TEST1
F23
TEST2
C11
TMS
B13
TRST#
B18
THERMDA
A18
THERMDC
C17
THERMTRIP#
FOX_PZ47803-2749-01
56_0402_5%
Dothan
ADDR GROUP
HOST CLK
CONTROL GROUP
MISC
THERMAL
DIODE
+VCCP
12
R400
H_PROCHOT#
DATA GROUP
LEGACY CPU
12
R397
56_0402_5%
4
2
B
DINV0#
DINV1#
DINV2#
DINV3#
DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#
IGNNE#
STPCLK#
+3VS
C
E
http://hobi-elektronika.net
H_D#0
A19
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
A20M#
FERR#
INIT#
LINT0
LINT1
SMI#
12
R396
1K_0402_5%
1
Q37
2SC2411K_SC59
3
A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26
D25
J26
T24
AD20
C23
K24
W25
AE24
C22
L24
W24
AE25
C2
D3
A3
B5
D1
D4
C6
B4
PROCHOT#
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_A20M#
H_FERR#
H_IGNNE#
H_INIT#
H_INTR
H_NMI
H_STPCLK#
H_SMI#
PROCHOT# <32>
H_D#[0..63] <8>
Thermal Sensor
1
SMB_EC_CK2<32,34,36,38>
SMB_EC_DA2<32,34,36,38>
+5VS
R93 10K_0402_5%@
C86 1000P_0402_50V7K
+3VS
R73 8.2K_0402_5%
EC_PWM4<32>
2
C452
2
1 2
1 2
1 2
2200P_0402_50V7K
H_DINV#0 <8>
H_DINV#1 <8>
H_DINV#2 <8>
H_DINV#3 <8>
H_A20M# <20>
H_FERR# <20>
H_IGNNE# <20>
H_INIT# <20>
H_INTR <20>
H_NMI <20>
H_STPCLK# <20>
H_SMI# <20>
H_DSTBN#[0..3] <8>
H_DSTBP#[0..3] <8>
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DIS CLOSE D T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
PWM Fan Control circuit
FAN_SPEED1<32>
+VCCP +VCCP
R26
54.9_0402_1%
1 2
H_RESET# ITP_TDO
+VCCP
1 2
R21 39.2_0603_1%
1 2
R22 150_0402_5%
+3VS
1
H_THERMDA
H_THERMDC
SMB_EC_CK2
SMB_EC_DA2
U36
2
3
8
7
G781_SOP8
1 2
R106
100_0402_1%
Title
Size Document Number Rev
Custom
Date: Sheet
C451
0.1U_0402_16V4Z
2
VDD1
D+
ALERT#
D-
THERM#
SCLK
GND
SDATA
D2
CH355_SC76
2 1
Dothan Processor in mFCPGA479
EDX20 LA-2481
R27
54.9_0402_1%
1 2
ITP_TMS
ITP_TDI
+5VS
1
6
THERM#
4
5
1
C83
2
2
G
1 2
R24 680_0402_5%
1 2
R23 27.4_0402_1%
12
R394
10K_0402_5%@
1
C92
0.1U_0402_16V4Z
2
10U_0805_10V4Z
JP5
1
1
2
2
3
3
MOLEX_53780-0310
13
D
Q9
FDN359AN_SOT23
S
Compal Electronics, Inc.
1
548Tuesday, F e br u a r y 22, 2005
ITP_TRST#
ITP_TCK
0.5
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R278
54.9_0402_1%@
D D
R193 0_0805_5%@
+1.8VS
R188 0_0805_5%
+1.5VS
1 2
1 2
+1.8VS FOR NON-LV/ULV PROCESSOR
+1.5VS FOR LV/ULV PROCESSOR
C C
+VCCP
12
R247
B B
A A
1K_0402_1%
12
R249
2K_0402_1%
Resistor placed within
0.5" of CPU pin.Trace
should be at least 25
miles away from any
other toggling signal.
1
C242
1U_0603_10V4Z
@
2
1
C248
220P_0402_50V7K
@
2
27.4_0402_1%
R220
+CPU_VCCA
C153
0.01U_0402_16V7K
12
12
54.9_0402_1%
27.4_0402_1%
R224
R274
Resistor placed within
0.5" of CPU pin.Trace
should be at least 25
miles away from any
other toggling signal.
54.9_0402_1%@
1
1
C151
2
2
10U_1206_6.3V6M
+VCC_CORE
CPU_VID0<45>
CPU_VID1<45>
CPU_VID2<45>
CPU_VID3<45>
CPU_VID4<45>
CPU_VID5<45>
CPU_BSEL0<15>
CPU_BSEL1<15>
12
12
54.9_0402_1%
R267
1 2
1 2
R279
+VCCP
+CPU_GTLREF
VCCSENSE
VSSSENSE
CPU_BSEL0
CPU_BSEL1
COMP0
COMP1
COMP2
COMP3
U1B
AE7
VCCSENSE
AF6
VSSSENSE
F26
VCCA0
B1
VCCA1
N1
VCCA2
AC26
VCCA3
P23
VCCQ0
W4
VCCQ1
D10
VCCP
D12
VCCP
D14
VCCP
D16
VCCP
E11
VCCP
E13
VCCP
E15
VCCP
F10
VCCP
F12
VCCP
F14
VCCP
F16
VCCP
K6
VCCP
L5
VCCP
L21
VCCP
M6
VCCP
M22
VCCP
N5
VCCP
N21
VCCP
P6
VCCP
P22
VCCP
R5
VCCP
R21
VCCP
T6
VCCP
T22
VCCP
U21
VCCP
D6
VCC
D8
VCC
D18
VCC
D20
VCC
D22
VCC
E5
VCC
E7
VCC
E9
VCC
E17
VCC
E19
VCC
E21
VCC
F6
VCC
F8
VCC
F18
VCC
E1
PSI#
E2
VID0
F2
VID1
F3
VID2
G3
VID3
G4
VID4
H4
VID5
AD26
GTLREF
C16
BSEL0
C14
BSEL1
P25
COMP0
P26
COMP1
AB2
COMP2
AB1
COMP3
C3
RSVD
E26
RSVD
AF7
RSVD
AC1
RSVD
FOX_PZ47803-2749-01
Dothan
POWER, GROUNG, RESERVED SIGNALS AND NC
T17 PAD
T18 PAD
T8 PAD
T5 PAD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A2
A5
A8
A11
A14
A17
A20
A23
A26
B3
B6
B9
B12
B16
B19
B22
B25
C1
C4
C7
C10
C13
C15
C18
C21
C24
D2
D5
D7
D9
D11
D13
D15
D17
D19
D21
D23
D26
E3
E6
E8
E10
E12
E14
E16
E18
E20
E22
E25
F1
F4
F5
F7
F9
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
G23
G26
H3
H5
H21
H25
J1
J4
J6
J22
J24
K2
K5
K21
K23
K26
L3
L6
L22
L25
M1
+VCC_CORE
U1C
F20
VCC
F22
VCC
G5
VCC
G21
VCC
H6
VCC
H22
VCC
J5
VCC
J21
VCC
K22
VCC
U5
VCC
V6
VCC
V22
VCC
W5
VCC
W21
VCC
Y6
VCC
Y22
VCC
AA5
VCC
AA7
VCC
AA9
VCC
AA11
VCC
AA13
VCC
AA15
VCC
AA17
VCC
AA19
VCC
AA21
VCC
AB6
VCC
AB8
VCC
AB10
VCC
AB12
VCC
AB14
VCC
AB16
VCC
AB18
VCC
AB20
VCC
AB22
VCC
AC9
VCC
AC11
VCC
AC13
VCC
AC15
VCC
AC17
VCC
AC19
VCC
AD8
VCC
AD10
VCC
AD12
VCC
AD14
VCC
AD16
VCC
AD18
VCC
AE9
VCC
AE11
VCC
AE13
VCC
AE15
VCC
AE17
VCC
AE19
VCC
AF8
VCC
AF10
VCC
AF12
VCC
AF14
VCC
AF16
VCC
AF18
VCC
M4
VSS
M5
VSS
M21
VSS
M24
VSS
N3
VSS
N6
VSS
N22
VSS
N23
VSS
N26
VSS
P2
VSS
P5
VSS
P21
VSS
P24
VSS
R1
VSS
R4
VSS
R6
VSS
R22
VSS
R25
VSS
T3
VSS
T5
VSS
T21
VSS
T23
VSS
FOX_PZ47803-2749-01
Dothan
POWER, GROUND
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
T26
U2
U6
U22
U24
V1
V4
V5
V21
V25
W3
W6
W22
W23
W26
Y2
Y5
Y21
Y24
AA1
AA4
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC21
AC24
AD1
AD4
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE3
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF2
AF5
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF24
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DIS CLOSE D T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Custom
Date: Sheet
Compal Electronics, Inc.
Dothan Processor in mFCPGA479
EDX20 LA-2481
1
of
648Tuesday, F e br u a r y 22, 2005
0.5
Page 7
5
4
3
2
1
http://hobi-elektronika.net
+VCC_CORE
D D
C C
1
2
+VCC_CORE
1
2
+VCC_CORE
1
2
+VCC_CORE
1
2
C155
10U_1206_6.3V6M
C246
10U_1206_6.3V6M
C161
10U_1206_6.3V6M
C277
10U_1206_6.3V6M
@
1
C169
10U_1206_6.3V6M
2
1
C247
10U_1206_6.3V6M
2
1
C160
10U_1206_6.3V6M
2
1
C278
10U_1206_6.3V6M
2
@
1
C178
10U_1206_6.3V6M
2
1
C237
10U_1206_6.3V6M
2
1
C183
10U_1206_6.3V6M
2
1
C279
10U_1206_6.3V6M
2
@
1
C195
10U_1206_6.3V6M
2
1
C232
10U_1206_6.3V6M
2
1
C184
10U_1206_6.3V6M
2
1
C280
10U_1206_6.3V6M
2
@
1
C211
10U_1206_6.3V6M
2
1
C212
10U_1206_6.3V6M
2
1
C210
10U_1206_6.3V6M
2
1
C281
10U_1206_6.3V6M
2
@
Near VCORE regulator.
+VCC_CORE
1
+
2
1
+
C238
2
330U_D2E_2.5VM_R9
9mOhm
7343
PS CAP
1
C215
0.1U_0402_16V4Z
2
1
C202
0.1U_0402_16V4Z
2
1
C148
0.1U_0402_16V4Z
2
1
B B
9mOhm
7343
PS CAP
+VCCP
1
+
C187
150U_D2_4VM
2
A A
+
C260
2
330U_D2E_2.5VM_R9
9mOhm
7343
PS CAP
1
C234
0.1U_0402_16V4Z
2
@
C252
330U_D2E_2.5VM_R9
9mOhm
7343
PS CAP
+VCC_CORE
1
2
+VCC_CORE
1
2
+VCC_CORE
1
2
1
C149
0.1U_0402_16V4Z
2
C231
10U_1206_6.3V6M
C196
10U_1206_6.3V6M
C227
10U_1206_6.3V6M
1
1
H2
HOLEA
1
H7
HOLEB
1
H25
HOLEC
1
H3
HOLED
1
1
C236
10U_1206_6.3V6M
2
1
C179
10U_1206_6.3V6M
2
1
C273
10U_1206_6.3V6M
2
@
CF12
1
FD1
1
H4
HOLEA
1
H11
HOLEB
1
H22
HOLED
1
1
C150
0.1U_0402_16V4Z
2
CF10
FD2
H5
HOLEA
1
H15
HOLEB
1
H10
HOLED
1
CF4
1
1
CF5
FD5
H27
HOLEA
1
H24
HOLEB
1
H1
HOLEE
1
1
C244
10U_1206_6.3V6M
2
1
C156
10U_1206_6.3V6M
2
1
C275
10U_1206_6.3V6M
2
@
CF2
1
FD4
1
H26
HOLEA
1
H29
HOLEE
1
1
C188
0.1U_0402_16V4Z
2
1
C245
10U_1206_6.3V6M
2
1
C162
10U_1206_6.3V6M
2
1
C276
10U_1206_6.3V6M
2
@
CF1
CF11
1
1
H20
H21
HOLEA
HOLEA
1
CL3
HOLED
C225
0.1U_0402_16V4Z
CF3
1
1
1
H28
HOLEA
CL2
HOLED
1
2
H16
HOLEA
1
1
1
C139
0.1U_0402_16V4Z
H12
HOLEA
1
H14
HOLEA
1
H8
HOLEA
1
H6
HOLEA
1
CF7
CF6
1
1
H17
HOLEA
1
H50
HOLEE
1
1
2
1
C243
10U_1206_6.3V6M
2
1
C170
10U_1206_6.3V6M
2
1
C274
10U_1206_6.3V6M
2
@
CF8
CF9
1
H9
HOLEA
H13
HOLEB
H19
HOLED
1
FD3
1
1
1
1
1
C175
0.1U_0402_16V4Z
2
1
H18
HOLEA
H23
HOLEB
FD6
1
1
1
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DIS CLOSE D T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Custom
Date: Sheet
Compal Electronics, Inc.
CPU Bypass
EDX20 LA-2481
1
0.5
of
748Tuesday, F e br u a r y 22, 2005
Page 8
5
4
3
2
1
http://hobi-elektronika.net
AE31
AJ29
AF31
AJ28
AC23
AC25
AH21
AJ21
AD11
AG13
AL14
AH12
AB27
AF12
AG12
AK13
AJ12
AA25
AC10
AD10
W29
U24
W31
U26
AF5
AH5
AE5
AE9
AD7
AE7
AE1
V24
V29
V26
V31
AJ5
Y30
Y24
U31B
DMI_RXN0
DMI_RXN1
DMI_RXP0
DMI_RXP1
DMI_TXN0
DMI_TXN1
DMI_TXP0
DMI_TXP1
SM_CK0
SM_CK1
SM_CK3
SM_CK4
SM_CK0#
SM_CK1#
SM_CK3#
SM_CK4#
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
SMOCDCOMP0
SMOCDCOMP1
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3
SMRCOMPN
SMRCOMPP
SMVREF0
SMVREF1
SMXSLEWIN
SMXSLEWOUT
SMYSLEWIN
SMYSLEWOUT
ALVISO_BGA840
CFG0
CFG1
CFG2
CFG5
CFG6
DMIDDR MUXING
RSVD23
RSVD24
RSVD25
RSVD1
CFG/RSVD
BM_BUSY#
EXT_TS0#
THRMTRIP#
PWROK
PM
RSTIN#
DREF_CLKN
CLK
DREF_CLKP
DREF_SSCLKP
DREF_SSCLKN
C56
0.1U_0402_16V4Z
DMI_TXN0
DMI_TXN1
DMI_TXP0
DMI_TXP1
DMI_RXN0
DMI_RXN1
DMI_RXP0
DMI_RXP1
DDR_CLK0
DDR_CLK1
DDR_CLK3
DDR_CLK4
DDR_CLK0#
DDR_CLK1#
DDR_CLK3#
DDR_CLK4#
DDR_CKE0
DDR_CKE1
DDR_CKE2
DDR_CKE3
DDR_CS0#
DDR_CS1#
DDR_CS2#
DDR_CS3#
M_OCDOCMP0
M_OCDOCMP1
DDR_ODT0
DDR_ODT1
DDR_ODT2
DDR_ODT3
SMRCOMPN
SMRCOMPP
DDR_VREF
1
C52
2
1
2
0.1U_0402_16V4Z
G11
E12
C11
B11
A11
D12
F13
E11
A13
C12
G12
G14
G13
H14
B13
A14
C13
H12
E13
C14
F14
E14
D13
B14
F11
H15
AA3
AA4
AA5
J14
J15
J12
G5
G4
W5
G9
G1
C6
B8
C9
A8
B7
A9
A7
Y3
K8
U1
L9
U2
J6
L7
R7
F7
E9
A4
E5
C3
B2
C4
F9
E8
B3
F8
C5
A5
B5
C7
U31A
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HADSTB0#
HADSTB1#
HCLKN
HCLKP
HDSTBN0#
HDSTBN1#
HDSTBN2#
HDSTBN3#
HDSTBP0#
HDSTBP1#
HDSTBP2#
HDSTBP3#
HDINV0#
HDINV1#
HDINV2#
HDINV3#
HCPURST#
HADS#
HTRDY#
HDPWR#
HDRDY#
HDEFER#
HHITM#
HHIT#
HLOCK#
HBREQ0#
HBNR#
HBPRI#
HDBSY#
HCPUSLP#
HRS0#
HRS1#
HRS2#
Alviso
HOST
ALVISO_BGA840
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
HVREF
HXRCOMP
HXSCOMP
HYRCOMP
HYSCOMP
HXSWING
HYSWING
F5
F2
E2
J5
F3
G3
F4
E3
J9
F6
J7
J8
J1
F1
K9
G7
K3
K4
P1
R2
K5
J3
J2
L5
U8
K7
U9
V9
R1
K6
U3
R9
V3
V4
R6
P5
P3
R8
P7
P9
W3
R4
R3
R5
U6
U5
V5
V6
W7
W8
W1
V2
W4
Y2
Y5
AA9
AA8
AA1
V7
AA6
Y6
Y8
W9
Y7
J11
K1
E6
L1
K2
J13
L3
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_VREF
H_XRCOMP
H_XSCOMP
H_YRCOMP
H_YSCOMP
H_SWNG0
H_SWNG1
12
R74
24.9_0402_1%
H_SWNG1
H_SWNG0
C59
+VCCP
R45
54.9_0402_1%
12
R58
24.9_0402_1%
C71
0.1U_0402_16V4Z
0.1U_0402_16V4Z
12
R78
1
R75
2
R35
1
R39
2
12
R57
54.9_0402_1%
+VCCP
12
221_0603_1%
12
100_0402_1%
+VCCP
12
221_0603_1%
12
100_0402_1%
1
C62
2
220P_0402_50V7K
+VCCP
12
R50
100_0402_1%
12
R48
200_0402_1%
Layout Note:
Route as short
as possible
12
R44
40.2_0402_1%
@
12
+1.8VS
R94
R96 80.6_0402_1%
R92 80.6_0402_1%
40.2_0402_1%
@
DMI_TXN0<21>
DMI_TXN1<21>
DMI_TXP0<21>
DMI_TXP1<21>
DMI_RXN0<21>
DMI_RXN1<21>
DMI_RXP0<21>
DMI_RXP1<21>
DDR_CLK0<12,13>
DDR_CLK1<12,13>
DDR_CLK3<14>
DDR_CLK4<14>
DDR_CLK0#<12,13>
DDR_CLK1#<12,13>
DDR_CLK3#<14>
DDR_CLK4#<14>
DDR_CKE0<13>
DDR_CKE1<13>
DDR_CKE2<14>
DDR_CKE3<14>
DDR_CS0#<13>
DDR_CS1#<13>
DDR_CS2#<14>
DDR_CS3#<14>
DDR_ODT0<13>
DDR_ODT1<13>
DDR_ODT2<14>
DDR_ODT3<14>
1 2
1 2
H_A#[3..31]<5> H_D#[0..63] <5>
D D
H_REQ#[0..4]<5>
H_ADSTB#0<5>
C C
B B
H_ADSTB#1<5>
CLK_MCH_BCLK#<15>
CLK_MCH_BCLK<15>
H_DSTBN#[0..3]<5>
H_DSTBP#[0..3]<5>
H_DINV#0<5>
H_DINV#1<5>
H_DINV#2<5>
H_DINV#3<5>
H_RESET#<5>
H_ADS#<5>
H_TRDY#<5>
H_DPWR#<5>
H_DRDY#<5>
H_DEFER#<5>
H_HITM#<5>
H_HIT#<5>
H_LOCK#<5>
H_BR0#<5>
H_BNR#<5>
H_BPRI#<5>
H_DBSY#<5>
H_RS#[0..2]<5>
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_ADSTB#0
H_ADSTB#1
CLK_MCH_BCLK#
CLK_MCH_BCLK
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_RESET#
H_ADS#
H_TRDY#
H_DPWR#
H_DRDY#
H_DEFER#
H_HITM#
H_HIT#
H_LOCK#
H_BR0#
H_BNR#
H_BPRI#
H_DBSY#
H_R_CPUSLP#
H_RS#0
H_RS#1
H_RS#2
D15
E17
F15
G17
H17
H19
F29
E27
W2
J26
J27
J18
W27
W25
A22
A21
J31
H31
+1.8V
CFG[2:0]
CFG5
CFG6
CFG0
MCH_CLKSEL1
MCH_CLKSEL0
CFG5
CFG6
PM_BMBUSY#
EC_EXTTS#0
H_THERMTRIP#
VGATE
PLT_RST#
DREFCLK#
DREFCLK
DREF_SSCLK
DREF_SSCLK#
Refer to page15 for FS B
frequency select
Low = DMI x 2
High = DMI x 4
Low = DDR-II
High = DDR-I
MCH_CLKSEL1 <15>
MCH_CLKSEL0 <15>
CFG0
CFG5
CFG6
EC_EXTTS#0
PM_BMBUSY# <21>
EC_EXTTS#0 <32>
H_THERMTRIP# <5,20>
VGATE <15,21,32,45>
PLT_RST# <16,17,19,21,23,35>
DREFCLK# <15>
DREFCLK <15>
DREF_SSCLK <15>
DREF_SSCLK# <15>
12
R31 10K_0402_5%
1 2
R38 2.2K_0402_5%
1 2
R41 2.2K_0402_5%
R12 10K_0402_5%
*
*
+VCCP
+2.5VS
12
12
R34
DDR_VREF<12,13,14>
R47
H_CPUSLP#<5,20>
H_CPUSLP# H_R_CPUSLP#
0_0402_5%
1 2
DDR_VREF
1K_0402_1%
12
R37
1K_0402_1%
DDR_VREF
MCH-R
Note:
Not install MCH-R for Dothan-A,
A A
5
Install MCH-R for Dothan-B"
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED BY OR DIS CLOSE D T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Custom
Date: Sheet
Compal Electronics, Inc.
Alviso(1 of 4)
EDX20 LA-2481
1
0.5
of
848Tuesday, F e br u a r y 22, 2005
Page 9
5
4
3
2
1
http://hobi-elektronika.net
Sonoma_Platform_MOW_04WW25
+2.5VS
M13
NC
M14
NC
AB18
M15
M16
M17
M18
M19
M20
M21
M22
N10
N11
N12
N13
N14
N15
N16
N17
N18
N19
N20
N21
N22
R10
R11
R12
R13
R14
R18
R19
R20
R21
R22
U10
U11
U12
U13
U14
U18
U19
U20
U21
U22
W10
W11
W12
W13
W14
W15
W16
W17
W18
W19
W20
W21
W22
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
P21
P22
T11
T12
T13
T14
T18
T19
T20
T21
V10
V11
V12
V13
V14
V15
V16
V17
V18
V19
V20
V21
V22
Y10
Y11
Y12
Y13
Y14
Y15
Y16
Y17
Y18
Y19
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
ALVISO_BGA840
12
D D
DDR2_
ADDR_A
DDR2_DATA
DDR2_ADDR_B DDR2_ADDR_A DDR2_DQS
ALVISO_BGA840
U31C
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
Y27
Y28
AC29
AE29
AA28
AA29
AB31
AC30
AG29
AG28
AJ26
AL26
AG30
AG31
AL27
AK27
AF29
AE28
AE25
AE24
AE27
AF27
AE23
AC26
AL25
AJ25
AG27
AG26
AK25
AL24
AG23
AG24
AK11
AL11
AJ7
AL9
AL12
AJ11
AH9
AJ9
AG10
AF10
AH7
AF6
AH11
AG11
AG6
AE6
AL7
AK7
AK2
AJ2
AK6
AJ6
AK3
AH2
AH1
AG1
AC6
AC7
AF3
AE3
AD3
AC2
DDR_DQ0
DDR_DQ1
DDR_DQ2
DDR_DQ3
DDR_DQ4
DDR_DQ5
DDR_DQ6
DDR_DQ7
DDR_DQ8
DDR_DQ9
DDR_DQ10
DDR_DQ11
DDR_DQ12
DDR_DQ13
DDR_DQ14
DDR_DQ15
DDR_DQ16
DDR_DQ17
DDR_DQ18
DDR_DQ19
DDR_DQ20
DDR_DQ21
DDR_DQ22
DDR_DQ23
DDR_DQ24
DDR_DQ25
DDR_DQ26
DDR_DQ27
DDR_DQ28
DDR_DQ29
DDR_DQ30
DDR_DQ31
DDR_DQ32
DDR_DQ33
DDR_DQ34
DDR_DQ35
DDR_DQ36
DDR_DQ37
DDR_DQ38
DDR_DQ39
DDR_DQ40
DDR_DQ41
DDR_DQ42
DDR_DQ43
DDR_DQ44
DDR_DQ45
DDR_DQ46
DDR_DQ47
DDR_DQ48
DDR_DQ49
DDR_DQ50
DDR_DQ51
DDR_DQ52
DDR_DQ53
DDR_DQ54
DDR_DQ55
DDR_DQ56
DDR_DQ57
DDR_DQ58
DDR_DQ59
DDR_DQ60
DDR_DQ61
DDR_DQ62
DDR_DQ63
DDR_ABA0<13>
DDR_ABA1<13>
T2 PAD
DDR_DM[0..7]<12,14>
DDR_DQS[0..7]<12,14>
C C
B B
A A
T4 PAD
T3 PAD
T1 PAD
DDR_DQS#[0..7]<12,14>
DDR_AA[0..12]<13>
DDR_ACAS#<13>
DDR_ARAS#<13>
DDR_AWE#<13>
DDR_BBA0<14>
DDR_BBA1<14>
DDR_BBA2<14>
DDR_BA[0..13]<14>
DDR_BCAS#<14>
DDR_BRAS#<14>
DDR_BWE#<14>
DDR_ABA0
DDR_ABA1
DDR_ABA2
DDR_DM0
DDR_DM1
DDR_DM2
DDR_DM3
DDR_DM4
DDR_DM5
DDR_DM6
DDR_DM7
DDR_DQS0
DDR_DQS1
DDR_DQS2
DDR_DQS3
DDR_DQS4
DDR_DQS5
DDR_DQS6
DDR_DQS7
DDR_DQS#0
DDR_DQS#1
DDR_DQS#2
DDR_DQS#3
DDR_DQS#4
DDR_DQS#5
DDR_DQS#6
DDR_DQS#7
DDR_AA0
DDR_AA1
DDR_AA2
DDR_AA3
DDR_AA4
DDR_AA5
DDR_AA6
DDR_AA7
DDR_AA8
DDR_AA9
DDR_AA10
DDR_AA11
DDR_AA12
DDR_AA13
DDR_ACAS#
DDR_ARAS#
TP_MA_RCVENIN#
TP_MA_RCVENOUT#
DDR_AWE#
DDR_BBA0
DDR_BBA1
DDR_BBA2
DDR_BA0
DDR_BA1
DDR_BA2
DDR_BA3
DDR_BA4
DDR_BA5
DDR_BA6
DDR_BA7
DDR_BA8
DDR_BA9
DDR_BA10
DDR_BA11
DDR_BA12
DDR_BA13
DDR_BCAS#
DDR_BRAS#
DDR_BWE#
AE15
AD13
AB25
AA31
AJ30
AF24
AK24
AJ10
AG7
AD6
AB29
AL28
AF25
AJ23
AK10
AG9
AH3
AE2
AA30
AK28
AF26
AJ24
AL10
AF9
AG5
AF2
AC21
AC20
AC19
AD20
AE19
AE20
AF20
AF21
AE21
AA24
AC11
AB23
AB24
AF13
AE12
AG15
AC27
AB26
AJ15
AJ14
AG14
AL21
AC12
AE14
AC15
AD14
AG19
AJ19
AJ20
AK20
AL19
AH20
AF14
AL20
AG20
AL13
AJ13
AH14
AK14
AL5
SA_BS0
SA_BS1
SA_BS2
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_CAS#
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#
SB_BS0
SB_BS1
SB_BS2
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_CAS#
SB_RAS#
SB_WE#
DDR_DQ[0..63] <12,14>
R16
10K_0402_5%
U31F
A10
NC
A2
NC
A29
NC
A3
NC
A30
NC
A31
NC
AA10
NC
AA11
NC
AA12
NC
AA13
NC
AA14
NC
AA15
NC
AA16
NC
AA17
NC
AA18
NC
AA19
NC
AA20
NC
AA21
NC
AA22
NC
AB1
NC
AB10
NC
AB11
NC
AB12
NC
AB13
NC
AB14
NC
AB15
NC
AB17
NC
AB19
NC
AB2
NC
AB20
NC
AB21
NC
AB22
NC
AB3
NC
AB5
NC
AB6
NC
AB7
NC
AB9
NC
AC22
NC
AE22
NC
AF22
NC
AG22
NC
AJ1
NC
AJ22
NC
AJ31
NC
AK1
NC
AK22
NC
AK31
NC
AL1
NC
AL2
NC
AL22
NC
AL29
NC
AL3
NC
AL30
NC
AL31
NC
B1
NC
B10
NC
B31
NC
C1
NC
C10
NC
C31
NC
E10
NC
F10
NC
G10
NC
J10
NC
K10
NC
K11
NC
K12
NC
K13
NC
K14
NC
K15
NC
K17
NC
K18
NC
K19
NC
K20
NC
K21
NC
K22
NC
K23
NC
K25
NC
K26
NC
K27
NC
K29
NC
K30
NC
K31
NC
L10
NC
L11
NC
L12
NC
L13
NC
L14
NC
L15
NC
L16
NC
L17
NC
L18
NC
L19
NC
L20
NC
L21
NC
L22
NC
M10
NC
M11
NC
M12
NC
Y20
NC
Y21
NC
Y22
NC
AA23
AA26
AA27
AB28
AB30
AC24
AC28
AD12
AD15
AD19
AD21
AE10
AE11
AE13
AE26
AE30
AF11
AF15
AF19
AF23
AF28
AF30
AG21
AG25
AH10
AH13
AH15
AH19
AJ27
AK12
AK15
AK19
AK21
AK23
AK26
AK29
A15
A18
A20
A25
A27
AA2
AA7
AC9
AD2
AD5
AD9
AF7
AG2
AG3
AH6
AJ3
AK5
AK9
B12
B15
B22
B27
C15
C17
C19
C25
C30
D11
D14
U23
U25
U27
V28
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B4
VSS
B6
VSS
B9
VSS
VSS
VSS
VSS
C2
VSS
VSS
VSS
C8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U29
VSS
VSS
VSS
VSS
VSS
VSS
U4
W24
W26
W28
W30
U31G
VSSW6VSS
Y23
B30
VSSALVDS
D18
VSS
D19
VSS
D25
VSS
E15
VSS
E21
VSS
E23
VSS
E26
VSS
E29
VSS
E30
VSS
E4
VSS
E7
VSS
F12
VSS
F17
VSS
F23
VSS
F27
VSS
G15
VSS
G2
VSS
G21
VSS
G22
VSS
G25
VSS
G29
VSS
G31
VSS
G6
VSS
G8
VSS
H11
VSS
H13
VSS
H18
VSS
H20
VSS
H23
VSS
H26
VSS
H30
VSS
J17
VSS
J20
VSS
J22
VSS
J4
VSS
L2
VSS
L25
VSS
L27
VSS
L29
VSS
L4
VSS
L6
VSS
L8
VSS
M23
VSS
M25
VSS
M27
VSS
M29
VSS
N25
VSS
N27
VSS
N29
VSS
N31
VSS
P2
VSS
P23
VSS
P25
VSS
P27
VSS
P29
VSS
P4
VSS
P6
VSS
P8
VSS
R16
VSS
R24
VSS
R25
VSS
R26
VSS
R27
VSS
R29
VSS
U15
VSS
U17
VSS
U7
VSS
V1
VSS
V25
VSS
V30
VSS
V8
VSS
VSS
VSS
VSS
VSS
VSS
VSSY4VSSY9VSS
Y25
Y26
ALVISO_BGA840
Y29
Y31
V27
U31
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DIS CLOSE D T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Custom
Date: Sheet
Compal Electronics, Inc.
Alviso(2 of 4)
EDX20 LA-2481
1
0.5
of
948Tuesday, F e br u a r y 22, 2005
Page 10
5
4
3
2
1
http://hobi-elektronika.net
+1.5VS_PCIE
U31E
MISCTVVGALVDS
PCI - EXPRESS GRAPHICS
EXP_COMPI
EXP_ICOMPO
SDVO_TVCLKIN#
SDVO_INT#
SDVO_FLDSTALL#
SDVO_TVCLKIN
SDVO_INT
SDVO_FLDSTALL
SDVOB_RED#
SDVOB_GREEN#
SDVOB_BLUE#
SDVOB_BLKN
SDVOB_RED
SDVOB_GREEN
SDVOB_BLUE
SDVOB_BLKP
P26
L26
M28
P28
U28
L28
N28
R28
M30
N26
P30
U30
L30
M26
N30
R30
12
220_0402_1%
12
W23
H27
G27
V23
A17
C18
A19
J19
B17
B18
B19
J23
J25
D23
C23
E22
D22
F21
F22
G23
H22
J21
G26
F26
D26
C26
E25
F25
H25
F30
G30
J29
H29
D27
C27
F31
D31
D29
E31
D30
C29
SDVOCTRL_DATA
SDVOCTRL_CLK
GCLKN
GCLKP
TVDAC_A
TVDAC_B
TVDAC_C
TV_REFSET
TV_IRTNA
TV_IRTNB
TV_IRTNC
DDCCLK
DDCDATA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
VSYNC
HSYNC
REFSET
LBKLT_CRTL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL
LACLKN
LACLKP
LADATAN0
LADATAN1
LADATAN2
LADATAP0
LADATAP1
LADATAP2
SDVO_SDAT<16>
SDVO_SCLK<16>
CLK_MCH_3GPLL#<15>
D D
CRT_VSYNC<18>
CRT_HSYNC<18>
C C
ENVDD<17>
CLK_MCH_3GPLL<15>
12
R388
CRT_DDCCL
CRT_B<18>
CRT_G<18>
CRT_R<18>
CRT_DDCDA
150_0402_5%
150_0402_5%
150_0402_5%
39_0402_5%
39_0402_5%
GM_PWM_L<17>
ENVDD
1 2
R8 1.5K_0402_1%
TXACLK-<17>
TXACLK+<17>
TXA0-<17>
TXA1-<17>
TXA2-<17>
TXA0+<17>
TXA1+<17>
TXA2+<17>
4.99K_0603_1%
R25
12
R28
12
R33
12
R1152
12
R1153
12
R36
GM_PWM_L
ENABLT_R
LDDC_CLK
LDDC_DATA
LIBG
R30 0_0402_5%
TXACLKTXACLK+
TXA0TXA1TXA2-
TXA0+
TXA1+
TXA2+
R32
24.9_0402_1%
1 2
SDVO_INT-
SDVO_INT+
SDVO_RSDVO_GSDVO_BSDVO_CLK-
SDVO_RSDVO_GSDVO_BSDVO_CLK-
SDVO_R+
SDVO_G+
SDVO_B+
SDVO_CLK+
SDVO_R+
SDVO_G+
SDVO_B+
SDVO_CLK+
C43
0.1U_0402_16V4Z
C40
0.1U_0402_16V4Z
C402 0.1U_0402_16V4Z@2CH
C400 0.1U_0402_16V4Z@2CH
C31 0.1U_0402_16V4Z
C16 0.1U_0402_16V4Z
C401 0.1U_0402_16V4Z@2CH
C399 0.1U_0402_16V4Z@2CH
C21 0.1U_0402_16V4Z
C12 0.1U_0402_16V4Z
SDVOB_INT- <16>
SDVOB_INT+ <16>
C406 0.1U_0402_16V4Z@2CH
C405 0.1U_0402_16V4Z
C37 0.1U_0402_16V4Z
C49 0.1U_0402_16V4Z
C404 0.1U_0402_16V4Z
C403 0.1U_0402_16V4Z
@2CH
C34 0.1U_0402_16V4Z
C46 0.1U_0402_16V4Z
@2CH
@2CH
2CH_SDVOB_R- <17>
2CH_SDVOB_G- <17>
2CH_SDVOB_B- <17>
2CH_SDVOB_CLK- <17>
SDVOB_R- <16>
SDVOB_G- <16>
SDVOB_B- <16>
SDVOB_CLK- <16>
2CH_SDVOB_R+ <17>
2CH_SDVOB_G+ <17>
2CH_SDVOB_B+ <17>
2CH_SDVOB_CLK+ <17>
SDVOB_R+ <16>
SDVOB_G+ <16>
SDVOB_B+ <16>
SDVOB_CLK+ <16>
ENABLT_R
R5
100K_0402_5%
+2.5VS +5VS
S
BSS138_SOT23
1 2
12
G
2
R4
Q1
2.2K_0402_5%
13
D
ENABKL <17,32>
B B
ALVISO_BGA840
+2.5VS
12
12
2.2K_0402_5%
<BOM Structure>
+2.5VS
2N7002_SOT23
R1
2.2K_0402_5%
Q2
2N7002_SOT23
Q3
R2
LDDC_CLK
A A
LDDC_DATA LCD_DDCDATA
5
+3VS +2.5VS
12
12
2.2K_0402_5%
<BOM Structure>
R19
2.2K_0402_5%
4
LCD_DDCCLK
LCD_DDCCLK <17>
LCD_DDCDATA <17>
R20
D
S
13
G
2
G
2
13
D
S
12
12
R1154
CRT_DDCCL
CRT_DDCDA 3VDDCDA
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DIS CLOSE D T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2.2K_0402_5%
<BOM Structure>
+2.5VS
2N7002_SOT23
R1155
2.2K_0402_5%
Q54
2N7002_SOT23
Q55
D
S
13
G
2
G
2
13
D
S
3VDDCCL
3VDDCCL <18,36>
3VDDCDA <18,36>
2
Title
Size Document Number Rev
Custom
Date: Sheet
Compal Electronics, Inc.
Alviso(3 of 4)
EDX20 LA-2481
1
of
10 48Tuesday, Fe b r u a r y 22, 2005
0.5
Page 11
5
4
3
2
1
http://hobi-elektronika.net
D D
+VCCP
1
1
C57
C87
2
2
0.47U_0603_10V7K
C C
+1.8V
1
1
C79
2
2
0.47U_0402_6.3V4Z
B B
1
1
C76
C73
2
2
0.47U_0402_6.3V4Z
0.47U_0402_6.3V4Z
Note : All VCCSM pin
shorted internally.
1
C69
2
0.47U_0402_6.3V4Z
1
1
C75
2
0.47U_0402_6.3V4Z
1
+
C78
2
@
0.1U_0402_16V4Z
1
C423
220U_D2_4VM
C432
2
C433
2
10U_1206_6.3V6M
10U_1206_6.3V6M
+VCCP
L23
VCC
L24
VCC
M24
VCC
N23
VCC
N24
VCC
P24
1
1
1
C85
C80
C81
2
10U_1206_6.3V6M
1
1
C64
C51
2
2
0.47U_0603_10V7K
0.22U_0603_10V7K
0.22U_0603_10V7K
2
10U_1206_6.3V6M
1
C47
2
4.7U_0805_10V4Z
+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
+1.5VS_MPLL
@
C68
2
10U_1206_6.3V6M
1
2
2.2U_0805_16V4Z
+1.5VS
AD18
AE17
AE18
AF17
AF18
AH17
AH18
AJ17
AJ18
AK17
AK18
AK30
AL17
AL18
AL23
AG17
AG18
AC17
AC18
AC31
AD17
AC3
AC5
AD1
AC1
R15
R17
T15
T16
T17
U16
A6
A12
E1
M1
M2
M3
M4
M5
M6
M7
M8
M9
N1
N2
N3
N4
N5
N6
N7
N8
N9
Y1
AF1
AL6
B21
J30
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCD_HMPLL1
VCCD_HMPLL2
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
ALVISO_BGA840
U31D
POWER
VCCA_TVDACA
VCCA_TVDACA
VCCA_TVDACB
VCCA_TVDACB
VCCA_TVDACC
VCCA_TVDACC
VCCA_TVBG
VSSA_TVBG
VCCD_TVDAC
VCCDQ_TVDAC
VCCD_LVDS
VCCD_LVDS
VCCD_LVDS
VCCA_LVDS
VCCHV
VCCHV
VCCHV
VCCTX_LVDS
VCCTX_LVDS
VCCA_SM
VCCA_SM
VCCA_SM
VCC3G
VCC3G
VCCA_3GPLL
VCCA_3GBG
VSSA_3GBG
VCC_SYNC
VCCA_CRTDAC
VCCA_CRTDAC
VSSA_CRTDAC
F18
G18
F19
G19
F20
G20
E19
E20
E18
D17
A23
B23
B25
B29
B20
C21
C22
A26
B26
AC13
AC14
AL15
P31
R31
R23
M31
L31
H21
C20
D21
D20
+1.5VS
+2.5VS
+2.5VS_CRTDAC
+2.5VS
+1.5VS_DDRDLL
1
C77
2
0.1U_0402_16V4Z
22U_1206_16V4Z_V1
+2.5VS_CRT
C41
0.022U_0402_16V7K
1
C88
2
L2 BLM18PG600SN1_0603
1 2
1
1
C42
2
2
0.1U_0402_16V4Z
Route VSSATVBG gnd from GMCH to
decoupling cap ground lead and
then connect to the gnd plane.
C18
C407
+2.5VS
1
2
0.022U_0402_16V7K
1
2
47U_1210_10V3M
+1.5VS_PCIE
1
1
C20
C10
2
2
0.1U_0402_16V4Z
0.022U_0402_16V7K
1
1
C44
C45
2
2
0.22U_0603_10V7K
10U_1206_6.3V6M
+2.5VS_CRTDAC
1
C15
2
0.1U_0402_16V4Z
CRTDAC: Route caps within
250mil of Alviso. Route FB
within 3" of Alviso.
Route VSSACRTDAC gnd from GMCH to
decoupling cap ground lead and then
connect to the gnd plane.
+1.5VS
1
C50
2
0.1U_0402_16V4Z
+1.5VS_3GPLL
1
C58
2
0.1U_0402_16V4Z
C27
L6
BLM18PG600SN1_0603
BLM18PG600SN1_0603
BLM18PG600SN1_0603
3GRLL_R
1 2
R51 0.5_0805_1%
1
C72
@
2
10U_1206_6.3V6M
1
2
Route VSSA3GBG gnd from GMCH to
decoupling cap ground lead and
then connect to the gnd plane.
L33
BLM18PG600SN1_0603
C38
0.1U_0402_16V4Z
12
L34
12
L4
12
C65
+2.5VS+2.5VS_3GBG
12
1
2
+1.5VS
1
1
C26
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.5VS
+1.5VS
C82
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
C8
0.1U_0402_16V4Z
1
C33
2
0.1U_0402_16V4Z
+1.5VS
1
C104
2
1
0.1U_0402_16V4Z
2
+1.5VS_DPLLA
L3
BLM18PG600SN1_0603
1 2
+1.5VS
1
1
C35
C36
2
2
0.1U_0402_16V4Z
A A
22U_1206_16V4Z_V1
5
BLM18PG600SN1_0603
1 2
+1.5VS +1.5VS
+1.5VS_DPLLB
L1
1
1
2
22U_1206_16V4Z_V1
C32
C19
2
0.1U_0402_16V4Z
4
BLM18PG600SN1_0603
1 2
+1.5VS_HPLL
L7
1
1
C95
C101
2
2
0.1U_0402_16V4Z
22U_1206_16V4Z_V1
+1.5VS
BLM18PG600SN1_0603
1 2
+1.5VS_MPLL
L5
D14
+VCCP_CRTDAC_D
1
1
C93
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DIS CLOSE D T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
C90
2
2
0.1U_0402_16V4Z
22U_1206_16V4Z_V1
+VCCP
+2.5VS
2 1
RB751V_SOD323
R384
1K_0805_1%
1 2
R383
0_0805_5%
1 2
2
+2.5VS_CRTDAC
+2.5VS
1
1
C2
C6
10U_1206_6.3V6M
Title
Size Document Number Rev
Custom
EDX20 LA-2481
Date: Sheet
C3
2
2
0.01U_0402_16V7K
0.1U_0402_16V4Z
Compal Electronics, Inc.
Alviso(4 of 4)
+2.5VS_CRTDAC
1
1
2
1
1
C13
C48
2
2
0.1U_0402_16V4Z
10U_1206_6.3V6M
of
11 48Tuesday, Fe b r u a r y 22, 2005
0.5
Page 12
5
DDR_DM[0..7]<9,14>
DDR_DQS[0..7]<9,14>
DDR_DQS#[0..7]<9,14>
DDR_DQ[0..63]<9,14>
DDR_DQ0
DDR_DQ6
D D
DDR_DQ2
DDR_DQ3
DDR_DQ15
DDR_DQ11
DDR_DQ21
DDR_DM2
DDR_DQ18
C C
B B
A A
DDR_DQ28
DDR_DQS3
DDR_DQS#3
DDR_DQ31
DDR_DQ29 DDR_DQ30
DDR_DQ36 DDR_DQ37
DDR_DQ35
DDR_DQ34
DDR_DQ45
DDR_DQ44
DDR_DQS5 DDR_DM5
DDR_DQS#5
DDR_DQ54
DDR_DQ55
DDR_DQ61
DDR_DQ57
DDR_DQS7 DDR_DM7
DDR_DQS#7
DDR_DQ62
DDR_DQ59
+1.8V
2.2U_0805_16V4Z
2.2U_0805_16V4Z
1
2
C287
RP28
1 4
2 3
22_0404_4P2R_5%
1 2
R257 10_0402_5%
RP30
4 5
3 6
2 7
1 8
22_0804_8P4R_5%
1 2
R261 10_0402_5%
RP31
2 3
1 4
22_0404_4P2R_5%
RP29
2 3
1 4
22_0404_4P2R_5%
1 2
R268 10_0402_5%
RP32
4 5
3 6
2 7
1 8
22_0804_8P4R_5%
1 2
R263 10_0402_5%
1 2
R262 10_0402_5%
RP33
1 4
2 3
22_0404_4P2R_5%
RP34
1 4
2 3
22_0404_4P2R_5%
1 2
R264 10_0402_5%
RP35
4 5
3 6
2 7
1 8
22_0804_8P4R_5%
1 2
R266 10_0402_5%
1 2
R265 10_0402_5%
RP36
4 5
3 6
2 7
1 8
22_0804_8P4R_5%
1 2
R258 10_0402_5%
RP37
4 5
3 6
2 7
1 8
22_0804_8P4R_5%
1 2
R260 10_0402_5%
1 2
R259 10_0402_5%
RP27
1 4
2 3
22_0404_4P2R_5%
0.1U_0402_16V4Z
1
1
2
2
C294
C290
5
DDR_SDQ0
DDR_SDQ6
DDR_SDM0 DDR_SDQS0
DDR_SDQ2
DDR_SDQ3
DDR_SDM1
DDR_SDQ15
DDR_SDQ21
DDR_SDQ20DDR_DQ20
DDR_SDM2
DDR_SDQ18
DDR_SDQ22DDR_DQ22
DDR_SDQ28
DDR_SDQS3
DDR_SDQS#3
DDR_SDQ31
DDR_SDQ29 DDR_SDQ30
DDR_SDQ36 DDR_SDQ37
DDR_SDM4
DDR_SDQ35
DDR_SDQ34
DDR_SDQ45
DDR_SDQ44
DDR_SDQS5
DDR_SDQS#5
DDR_SDQ49 DDR_DQ48DDR_DQ49
DDR_SDM6
DDR_SDQ54
DDR_SDQ55
DDR_SDQ61
DDR_SDQ57
DDR_SDQS7
DDR_SDQS#7
DDR_SDQ62
DDR_SDQ59
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
C296
C283
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
C288
C291
DDR_DQ1 DDR_SDQ1
DDR_DQ5
DDR_DQS0DDR_DM0
DDR_DQS#0
DDR_DQ4
DDR_DQ12DDR_DQ13
DDR_DQ8DDR_DQ9
DDR_DQS1DDR_DM1
DDR_DQS#1
DDR_DQ10
DDR_DQ14
DDR_DQ16
DDR_DQ17
DDR_DQS2
DDR_DQS#2
DDR_DQ23
DDR_DQ19
DDR_DQ26DDR_DQ27
DDR_DQ25
DDR_DM3
DDR_DQ24
DDR_DQ32DDR_DQ33
DDR_DQS4DDR_DM4
DDR_DQS#4
DDR_DQ39
DDR_DQ38
DDR_DQ41
DDR_DQ40
DDR_DQ42DDR_DQ43
DDR_DQ46DDR_DQ47
DDR_DQ52DDR_DQ53
DDR_DQS6DDR_DM6
DDR_DQS#6
DDR_DQ50
DDR_DQ51
DDR_DQ60 DDR_SDQ60
DDR_DQ56
DDR_DQ63
DDR_DQ58
0.1U_0402_16V4Z
1
1
2
2
C295
C284
1 4
2 3
R236 10_0402_5%
R235 10_0402_5%
4 5
3 6
2 7
1 8
R238 10_0402_5%
R237 10_0402_5%
2 3
1 4
2 3
1 4
1 2
R226 10_0402_5%
1 2
R225 10_0402_5%
4 5
3 6
2 7
1 8
1 2
R227 10_0402_5%
1 4
2 3
1 4
2 3
1 2
R229 10_0402_5%
1 2
R228 10_0402_5%
4 5
3 6
2 7
1 8
1 2
R230 10_0402_5%
4 5
3 6
2 7
1 8
R232 10_0402_5%
R231 10_0402_5%
4 5
3 6
2 7
1 8
R233 10_0402_5%
1 4
2 3
0.1U_0402_16V4Z
1
2
C289
4
RP6
DDR_SDQ5
22_0404_4P2R_5%
1 2
DDR_SDQS#0
1 2
RP7
DDR_SDQ4
DDR_SDQ7DDR_DQ7
DDR_SDQ12DDR_SDQ13
DDR_SDQ8DDR_SDQ9
22_0804_8P4R_5%
DDR_SDQS1
1 2
DDR_SDQS#1
1 2
RP16
DDR_SDQ10DDR_SDQ11
DDR_SDQ14
22_0404_4P2R_5%
RP8
DDR_SDQ16
DDR_SDQ17
22_0404_4P2R_5%
DDR_SDQS2
DDR_SDQS#2
RP9
DDR_SDQ23
DDR_SDQ19
DDR_SDQ26DDR_SDQ27
DDR_SDQ25
22_0804_8P4R_5%
DDR_SDM3
RP10
DDR_SDQ24
22_0404_4P2R_5%
RP13
DDR_SDQ32DDR_SDQ33
22_0404_4P2R_5%
DDR_SDQS4
DDR_SDQS#4
RP15
DDR_SDQ39
DDR_SDQ38
DDR_SDQ41
DDR_SDQ40
22_0804_8P4R_5%
DDR_SDM5
RP11
DDR_SDQ42DDR_SDQ43
DDR_SDQ46DDR_SDQ47
DDR_SDQ48
DDR_SDQ52DDR_SDQ53
22_0804_8P4R_5%
DDR_SDQS6
1 2
DDR_SDQS#6
1 2
RP12
DDR_SDQ50
DDR_SDQ51
DDR_SDQ56
22_0804_8P4R_5%
DDR_SDM7
1 2
RP14
DDR_SDQ63
DDR_SDQ58
22_0404_4P2R_5%
3.3P_0402_50V8C
1
C524
@
2
4
DDR_CLK0
12
R283
100_0402_5%
DDR_CLK0#
3
DDR_SDM[0..7] <13>
http://hobi-elektronika.net
DDR_SDQS[0..7] <13>
2.2U_0805_16V4Z
1
2
C302
DDR_SDQS#[0..7] <13>
DDR_SDQ[0..63] <13>
DDR_SAA[0..13] <13>
DDR_VREF<8,13,14>
DDR_VREF
0.1U_0402_16V4Z
2.2U_0805_16V4Z
1
1
2
2
C532
C535
DDR_SDQS0
DDR_SDQS#0
DDR_SDM0
DDR_SDQ0
DDR_SDQ1
DDR_SDQ2
DDR_SDQ3
DDR_SDQ4
DDR_SDQ5
DDR_SDQ6
DDR_SDQ7
DDR_SDQS1
DDR_SDQS#1
DDR_SDM1
DDR_SDQ8
DDR_SDQ9
DDR_SDQ10
DDR_SDQ11
DDR_SDQ12
DDR_SDQ13
DDR_SDQ14
DDR_SDQ15
DDR_VREF
DDR_SAA0
DDR_SAA1
DDR_SAA2
DDR_SAA3
DDR_SAA4
DDR_SAA5
DDR_SAA6
DDR_SAA7
DDR_SAA8
DDR_SAA9
DDR_SAA10
DDR_SAA11
DDR_SAA12
DDR_SDQS4
DDR_SDQS#4
DDR_SDM4
DDR_SDQ32
DDR_SDQ33
DDR_SDQ34
DDR_SDQ35
DDR_SDQ36
DDR_SDQ37
DDR_SDQ38
DDR_SDQ39
DDR_SDQS5
DDR_SDQS#5
DDR_SDM5
DDR_SDQ40
DDR_SDQ41
DDR_SDQ42
DDR_SDQ43
DDR_SDQ44
DDR_SDQ45
DDR_SDQ46
DDR_SDQ47
DDR_VREF DDR_VREF
DDR_SAA0
DDR_SAA1
DDR_SAA2
DDR_SAA3
DDR_SAA4
DDR_SAA5
DDR_SAA6
DDR_SAA7
DDR_SAA8
DDR_SAA9
DDR_SAA10
DDR_SAA11
DDR_SAA12
0.1U_0402_16V4Z
1
2
C531
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DIS CLOSE D T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
U14
F7
LDQS
E8
LDQS#
F3
LDM
G8
LDQ0
G2
LDQ1
H7
LDQ2
H3
LDQ3
H1
LDQ4
H9
LDQ5
F1
LDQ6
F9
LDQ7
B7
UDQS
A8
UDQS#
B3
UDM
C8
UDQ0
C2
UDQ1
D7
UDQ2
D3
UDQ3
D1
UDQ4
D9
UDQ5
B1
UDQ6
B9
UDQ7
J2
VREF
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10
P7
A11
R2
A12
R8
NC
R3
NC
R7
NC
A2
NC
E2
NC
L1
NC
K4T51163QB-GCCC_FBGA84
U16
F7
LDQS
E8
LDQS#
F3
LDM
G8
LDQ0
G2
LDQ1
H7
LDQ2
H3
LDQ3
H1
LDQ4
H9
LDQ5
F1
LDQ6
F9
LDQ7
B7
UDQS
A8
UDQS#
B3
UDM
C8
UDQ0
C2
UDQ1
D7
UDQ2
D3
UDQ3
D1
UDQ4
D9
UDQ5
B1
UDQ6
B9
UDQ7
J2
VREF
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10
P7
A11
R2
A12
R8
NC
R3
NC
R7
NC
A2
NC
E2
NC
L1
NC
K4T51163QB-GCCC_FBGA84
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDDL
ODT
CKE
RAS#
CAS#
WE#
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSDL
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDDL
ODT
CKE
RAS#
CAS#
WE#
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSDL
CK#
BA0
BA1
CS#
VSS
VSS
VSS
VSS
VSS
CK#
BA0
BA1
CS#
VSS
VSS
VSS
VSS
VSS
C1
C3
C7
C9
E9
G1
G3
G7
G9
A9
A1
E1
J9
M9
R1
J1
DDR_SODT0
K9
DDR_CLK0
J8
CK
DDR_CLK0#
K8
DDR_SCKE0
K2
DDR_SBA0
L2
DDR_SBA1
L3
DDR_SCS0#
L8
DDR_SRAS#
K7
DDR_SCAS#
L7
DDR_SWE#
K3
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
J7
C1
C3
C7
C9
E9
G1
G3
G7
G9
A9
A1
E1
J9
M9
R1
J1
DDR_SODT0
K9
DDR_CLK1
J8
CK
DDR_CLK1#
K8
DDR_SCKE0
K2
DDR_SBA0
L2
DDR_SBA1
L3
DDR_SCS0#
L8
DDR_SRAS#
K7
DDR_SCAS#
L7
DDR_SWE#
K3
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
J7
2
+1.8V +1.8V
U15
F7
LDQS
E8
LDQS#
F3
LDM
G8
LDQ0
G2
LDQ1
H7
LDQ2
H3
LDQ3
H1
LDQ4
H9
LDQ5
F1
LDQ6
F9
LDQ7
B7
UDQS
A8
UDQS#
B3
UDM
C8
UDQ0
C2
UDQ1
D7
UDQ2
D3
UDQ3
D1
UDQ4
D9
UDQ5
B1
UDQ6
B9
UDQ7
J2
VREF
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10
P7
A11
R2
A12
R8
NC
R3
NC
R7
NC
A2
NC
E2
NC
L1
NC
K4T51163QB-GCCC_FBGA84
U17
F7
LDQS
E8
LDQS#
F3
LDM
G8
LDQ0
G2
LDQ1
H7
LDQ2
H3
LDQ3
H1
LDQ4
H9
LDQ5
F1
LDQ6
F9
LDQ7
B7
UDQS
A8
UDQS#
B3
UDM
C8
UDQ0
C2
UDQ1
D7
UDQ2
D3
UDQ3
D1
UDQ4
D9
UDQ5
B1
UDQ6
B9
UDQ7
J2
VREF
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10
P7
A11
R2
A12
R8
NC
R3
NC
R7
NC
A2
NC
E2
NC
L1
NC
K4T51163QB-GCCC_FBGA84
Title
DDRII-SODIMM SLOT1
Size Document Number Rev
Custom
EDX20 LA-2481
Date: Sheet
C1
VDDQ
C3
VDDQ
C7
VDDQ
C9
VDDQ
E9
VDDQ
G1
VDDQ
G3
VDDQ
G7
VDDQ
G9
VDDQ
A9
VDDQ
A1
VDD
E1
VDD
J9
VDD
M9
VDD
R1
VDD
J1
VDDL
RAS#
CAS#
WE#
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSDL
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
RAS#
CAS#
WE#
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSDL
ODT
CK#
CKE
CS#
VSS
VSS
VSS
VSS
VSS
VDD
VDD
VDD
VDD
VDD
ODT
CK#
CKE
CS#
VSS
VSS
VSS
BA0
BA1
BA0
BA1
VSS
VSS
DDR_SODT0
K9
DDR_CLK0
J8
CK
DDR_CLK0#
K8
DDR_SCKE0
K2
DDR_SBA0
L2
DDR_SBA1
L3
DDR_SCS0#
L8
DDR_SRAS#
K7
DDR_SCAS#
L7
DDR_SWE#
K3
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
J7
+1.8V+1.8V
C1
C3
C7
C9
E9
G1
G3
G7
G9
A9
A1
E1
J9
M9
R1
J1
DDR_SODT0
K9
DDR_CLK1
J8
CK
DDR_CLK1#
K8
DDR_SCKE0
K2
DDR_SBA0
L2
DDR_SBA1
L3
DDR_SCS0#
L8
DDR_SRAS#
K7
DDR_SCAS#
L7
DDR_SWE#
K3
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
J7
Compal Electronics, Inc.
DDR_SODT0 <13>
DDR_CLK0 <8,13>
DDR_CLK0# <8,13>
DDR_SCKE0 <13>
DDR_SBA0 <13>
DDR_SBA1 <13>
DDR_SCS0# <13>
DDR_SRAS# <13>
DDR_SCAS# <13>
DDR_SWE# <13>
DDR_SODT0 <13>
DDR_CLK1 <8,13>
DDR_CLK1# <8,13>
DDR_SCKE0 <13>
DDR_SBA0 <13>
DDR_SBA1 <13>
DDR_SCS0# <13>
DDR_SRAS# <13>
DDR_SCAS# <13>
DDR_SWE# <13>
2
DDR_SDQS2
DDR_SDQS#2
DDR_SDM2
DDR_SDQ16
DDR_SDQ17
DDR_SDQ18
DDR_SDQ19
DDR_SDQ20
DDR_SDQ21
DDR_SDQ22
DDR_SDQ23
DDR_SDQS3
DDR_SDQS#3
DDR_SDM3
DDR_SDQ24
DDR_SDQ25
DDR_SDQ26
DDR_SDQ27
DDR_SDQ28
DDR_SDQ29
DDR_SDQ30
DDR_SDQ31
DDR_VREF
DDR_SAA0
DDR_SAA1
DDR_SAA2
DDR_SAA3
DDR_SAA4
DDR_SAA5
DDR_SAA6
DDR_SAA7
DDR_SAA8
DDR_SAA9
DDR_SAA10
DDR_SAA11
DDR_SAA12
DDR_SDQS6
DDR_SDQS#6
DDR_SDM6
DDR_SDQ50
DDR_SDQ49
DDR_SDQ52
DDR_SDQ48
DDR_SDQ51
DDR_SDQ53
DDR_SDQ54
DDR_SDQ55
DDR_SDQS7
DDR_SDQS#7
DDR_SDM7
DDR_SDQ56
DDR_SDQ57
DDR_SDQ58
DDR_SDQ59
DDR_SDQ60
DDR_SDQ61
DDR_SDQ62
DDR_SDQ63
DDR_SAA0
DDR_SAA1
DDR_SAA2
DDR_SAA3
DDR_SAA4
DDR_SAA5
DDR_SAA6
DDR_SAA7
DDR_SAA8
DDR_SAA9
DDR_SAA10
DDR_SAA11
DDR_SAA12
1
1
DDR_SODT0 <13>
DDR_CLK0 <8,13>
DDR_CLK0# <8,13>
DDR_SCKE0 <13>
DDR_SBA0 <13>
DDR_SBA1 <13>
DDR_SCS0# <13>
DDR_SRAS# <13>
DDR_SCAS# <13>
DDR_SWE# <13>
DDR_SODT0 <13>
DDR_CLK1 <8,13>
DDR_CLK1# <8,13>
DDR_SCKE0 <13>
DDR_SBA0 <13>
DDR_SBA1 <13>
DDR_SCS0# <13>
DDR_SRAS# <13>
DDR_SCAS# <13>
DDR_SWE# <13>
of
12 48Tuesday, February 22, 2005
0.5
Page 13
5
DDR_SDM[0..7] <12>
DDR_SDQS[0..7] <12>
DDR_SDQS#[0..7] <12>
DDR_AA[0..13]<9>
D D
DDR_CKE1<8>
DDR_CKE0<8>
DDR_ABA0<9>
DDR_AWE#<9>
DDR_ARAS#<9>
C C
DDR_CS1#<8>
DDR_ABA1<9>
DDR_ODT0<8>
DDR_ODT1<8>
DDR_ACAS#<9>
DDR_CS0#<8>
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V_DDR_VTT
B B
0.1U_0402_16V4Z
+1.8V
2.2U_0805_16V4Z
2.2U_0805_16V4Z
A A
1
2
C512
DDR_CKE1 DDR_SCKE1
DDR_AA12
DDR_AA7
DDR_AA8
DDR_AA6
DDR_AA5
DDR_AA4
DDR_AA3
DDR_CKE0
DDR_AA0
DDR_AA1
DDR_AA2
DDR_AA11
DDR_ABA0
DDR_ARAS#
DDR_AA9
DDR_CS1#
DDR_ABA1
DDR_ODT0
DDR_ACAS#
DDR_CS0#
DDR_AA10
+0.9VS
0.1U_0402_16V4Z
1
1
2
2
C272
C253
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
C519
C513
DDR_AWE#
0.1U_0402_16V4Z
1
2
C271
1
2
C520
RP60
1 8
2 7
3 6
4 5
10_0804_8P4R_5%
RP59
1 8
2 7
3 6
4 5
10_0804_8P4R_5%
RP58
1 8
2 7
3 6
4 5
10_0804_8P4R_5%
RP57
1 8
2 7
3 6
4 5
10_0804_8P4R_5%
RP56
1 8
2 7
3 6
4 5
10_0804_8P4R_5%
RP55
1 8
2 7
3 6
4 5
10_0804_8P4R_5%
0.1U_0402_16V4Z
1
2
C270
0.1U_0402_16V4Z
1
2
C509
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
DDR_SAA12
DDR_SAA7
DDR_SAA8
DDR_SAA6
DDR_SAA5
DDR_SAA4
DDR_SAA3
DDR_SCKE0
DDR_SAA0
DDR_SAA1
DDR_SAA2
DDR_SAA11
DDR_SBA0
DDR_SWE#
DDR_SRAS#
DDR_SAA9
DDR_SCS1#
DDR_SBA1
DDR_SODT0
DDR_SODT1DDR_ODT1
DDR_SCAS#
DDR_SCS0#
DDR_SAA10
1
2
C269
0.1U_0402_16V4Z
C515
DDR_SCKE0 <12>
DDR_SBA0 <12>
DDR_SWE# <12>
DDR_SRAS# <12>
DDR_SBA1 <12>
DDR_SODT0 <12>
DDR_SCAS# <12>
DDR_SCS0# <12>
0.1U_0402_16V4Z
1
2
C514
1
2
C268
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C267
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
C521
C510
DDR_SDQ[0..63] <12>
DDR_SAA[0..13] <12>
DDR_CKE1<8>
DDR_CKE0<8> DDR_ODT1 <8>
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
C264
C265
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C292
1
2
C266
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C516
4
Layout Note:
Place these resistor
closely JP33,all
trace length<750 mil
DDR_CKE1
DDR_AA12
DDR_AA7
DDR_AA8
DDR_AA6
DDR_AA5
DDR_AA4
DDR_AA3
DDR_CKE0
DDR_AA0
DDR_AA1
DDR_AA2
+3VS
ICH_SMBDATA<14,15,17,21,35>
ICH_SMBCLK<14,15,17,21,35>
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C263
1
2
C298
1
1
2
2
C261
C262
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
C293
C297
RP38
4 5
3 6
2 7
1 8
56_0804_8P4R_5%
RP39
4 5
3 6
2 7
1 8
56_0804_8P4R_5%
RP40
4 5
3 6
2 7
1 8
56_0804_8P4R_5%
R185 10K_0402_5%@
1 2
ICH_SMBDATA
ICH_SMBCLK
R178
1 2
1 2
R186 10K_0402_5%@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C518
+0.9VS
1
2
C523
3
http://hobi-elektronika.net
U47
F7
LDQS
E8
LDQS#
F3
LDM
G8
LDQ0
G2
LDQ1
H7
LDQ2
H3
LDQ3
H1
LDQ4
H9
LDQ5
F1
LDQ6
F9
LDQ7
B7
UDQS
A8
UDQS#
B3
UDM
C8
UDQ0
C2
UDQ1
D7
UDQ2
D3
UDQ3
D1
UDQ4
D9
UDQ5
B1
UDQ6
B9
UDQ7
J2
VREF
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10
P7
A11
R2
A12
R8
NC
R3
NC
R7
NC
A2
NC
E2
NC
L1
NC
K4T51163QB-GCCC_FBGA84
U45
F7
LDQS
E8
LDQS#
F3
LDM
G8
LDQ0
G2
LDQ1
H7
LDQ2
H3
LDQ3
H1
LDQ4
H9
LDQ5
F1
LDQ6
F9
LDQ7
B7
UDQS
A8
UDQS#
B3
UDM
C8
UDQ0
C2
UDQ1
D7
UDQ2
D3
UDQ3
D1
UDQ4
D9
UDQ5
B1
UDQ6
B9
UDQ7
J2
VREF
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10
P7
A11
R2
A12
R8
NC
R3
NC
R7
NC
A2
NC
E2
NC
L1
NC
K4T51163QB-GCCC_FBGA84
RP41
56_0804_8P4R_5%
RP42
56_0804_8P4R_5%
RP43
56_0804_8P4R_5%
10K_0402_5%@
DDR_VREF<8,12,14>
0.1U_0402_16V4Z
1
2
C517
45
36
DDR_AWE#
27
DDR_ARAS#
18
45
DDR_CS1#
36
27
DDR_ODT0
18
DDR_ODT1
45
DDR_ACAS#
36
DDR_CS0#
27
18
U10
7
WP
6
SCL
5
SDA
1
SA0
2
SA1
SA23GND
24LC256T-I/ST_TSSOP8@
0.1U_0402_16V4Z
1
2
C522
DDR_AA11
DDR_ABA0
DDR_AA9
DDR_ABA1
DDR_AA10
EEPROM
150U_D2_4VM
1
+
2
C181
VDD
2.2U_0805_16V4Z
1
2
C303
8
4
1
C526
2
3.3P_0402_50V8C@
DDR_ABA0 <9>
DDR_AWE# <9>
DDR_ARAS# <9>
DDR_CS1# <8>
DDR_ABA1 <9>
DDR_ODT0 <8>
DDR_ACAS# <9>
DDR_CS0# <8>
+3VS
@
0.1U_0402_16V4Z
1
2
2.2U_0805_16V4Z
0.1U_0402_16V4Z
1
2
C300
DDR_CLK1
12
DDR_CLK1#
C141
1
2
C534
R284
100_0402_5%
0.1U_0402_16V4Z
DDR_SDQS0
DDR_SDQS#0
DDR_SDM0
DDR_SDQ1
DDR_SDQ0
DDR_SDQ3
DDR_SDQ2
DDR_SDQ5
DDR_SDQ4
DDR_SDQ7
DDR_SDQ6
DDR_SDQS1
DDR_SDQS#1
DDR_SDM1
DDR_SDQ9
DDR_SDQ8
DDR_SDQ11
DDR_SDQ10
DDR_SDQ13
DDR_SDQ12
DDR_SDQ15
DDR_SDQ14
DDR_VREF
DDR_SAA0
DDR_SAA1
DDR_SAA2
DDR_SAA3
DDR_SAA4
DDR_SAA5
DDR_SAA6
DDR_SAA7
DDR_SAA8
DDR_SAA9
DDR_SAA10
DDR_SAA11
DDR_SAA12
DDR_SDQS4
DDR_SDQS#4
DDR_SDM4
DDR_SDQ33
DDR_SDQ32
DDR_SDQ35
DDR_SDQ34
DDR_SDQ37
DDR_SDQ36
DDR_SDQ39
DDR_SDQ38
DDR_SDQS5
DDR_SDQS#5
DDR_SDM5
DDR_SDQ41
DDR_SDQ40
DDR_SDQ43
DDR_SDQ42
DDR_SDQ45
DDR_SDQ44
DDR_SDQ47
DDR_SDQ46
DDR_SAA0
DDR_SAA1
1
DDR_SAA2
DDR_SAA3
DDR_SAA4
2
DDR_SAA5
C299
DDR_SAA6
DDR_SAA7
DDR_SAA8
DDR_SAA9
DDR_SAA10
DDR_SAA11
DDR_SAA12
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDDL
ODT
CK#
CKE
CS#
RAS#
CAS#
WE#
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSSDL
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDDL
ODT
CK#
CKE
CS#
RAS#
CAS#
WE#
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSSDL
BA0
BA1
VSS
VSS
BA0
BA1
2
+1.8V
C1
C3
C7
C9
E9
G1
G3
G7
G9
A9
A1
E1
J9
M9
R1
J1
DDR_SODT1
K9
DDR_CLK0
J8
CK
DDR_CLK0#
K8
DDR_SCKE1
K2
DDR_SBA0
L2
DDR_SBA1
L3
DDR_SCS1#
L8
DDR_SRAS#
K7
DDR_SCAS#
L7
DDR_SWE#
K3
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
J7
C1
C3
C7
C9
E9
G1
G3
G7
G9
A9
A1
E1
J9
M9
R1
J1
DDR_SODT1
K9
DDR_CLK1
J8
CK
DDR_CLK1#
K8
DDR_SCKE1
K2
DDR_SBA0
L2
DDR_SBA1
L3
DDR_SCS1#
L8
DDR_SRAS#
K7
DDR_SCAS#
L7
DDR_SWE#
K3
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
J7
DDR_CLK0 <8,12>
DDR_CLK0# <8,12>
DDR_SBA0 <12>
DDR_SBA1 <12>
DDR_SRAS# <12>
DDR_SCAS# <12>
DDR_SWE# <12>
DDR_CLK1 <8,12>
DDR_CLK1# <8,12>
DDR_SBA0 <12>
DDR_SBA1 <12>
DDR_SRAS# <12>
DDR_SCAS# <12>
DDR_SWE# <12>
DDR_SDQS2
DDR_SDQS#2
DDR_SDM2
DDR_SDQ17
DDR_SDQ16
DDR_SDQ19
DDR_SDQ18
DDR_SDQ21
DDR_SDQ20
DDR_SDQ23
DDR_SDQ22
DDR_SDQS3
DDR_SDQS#3
DDR_SDM3
DDR_SDQ25
DDR_SDQ24
DDR_SDQ27
DDR_SDQ26
DDR_SDQ29
DDR_SDQ28
DDR_SDQ31
DDR_SDQ30
DDR_VREF
DDR_SAA0
DDR_SAA1
DDR_SAA2
DDR_SAA3
DDR_SAA4
DDR_SAA5
DDR_SAA6
DDR_SAA7
DDR_SAA8
DDR_SAA9
DDR_SAA10
DDR_SAA11
DDR_SAA12
DDR_SDQS6
DDR_SDQS#6
DDR_SDM6
DDR_SDQ49
DDR_SDQ50
DDR_SDQ48
DDR_SDQ52
DDR_SDQ53
DDR_SDQ51
DDR_SDQ55
DDR_SDQ54
DDR_SDQS7
DDR_SDQS#7
DDR_SDM7
DDR_SDQ57
DDR_SDQ56
DDR_SDQ59
DDR_SDQ58
DDR_SDQ61
DDR_SDQ60
DDR_SDQ63
DDR_SDQ62
DDR_VREFDDR_VREF
DDR_SAA0
DDR_SAA1
DDR_SAA2
DDR_SAA3
DDR_SAA4
DDR_SAA5
DDR_SAA6
DDR_SAA7
DDR_SAA8
DDR_SAA9
DDR_SAA10
DDR_SAA11
DDR_SAA12
U46
F7
LDQS
E8
LDQS#
F3
LDM
G8
LDQ0
G2
LDQ1
H7
LDQ2
H3
LDQ3
H1
LDQ4
H9
LDQ5
F1
LDQ6
F9
LDQ7
B7
UDQS
A8
UDQS#
B3
UDM
C8
UDQ0
C2
UDQ1
D7
UDQ2
D3
UDQ3
D1
UDQ4
D9
UDQ5
B1
UDQ6
B9
UDQ7
J2
VREF
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10
P7
A11
R2
A12
R8
NC
R3
NC
R7
NC
A2
NC
E2
NC
L1
NC
K4T51163QB-GCCC_FBGA84
U44
F7
LDQS
E8
LDQS#
F3
LDM
G8
LDQ0
G2
LDQ1
H7
LDQ2
H3
LDQ3
H1
LDQ4
H9
LDQ5
F1
LDQ6
F9
LDQ7
B7
UDQS
A8
UDQS#
B3
UDM
C8
UDQ0
C2
UDQ1
D7
UDQ2
D3
UDQ3
D1
UDQ4
D9
UDQ5
B1
UDQ6
B9
UDQ7
J2
VREF
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10
P7
A11
R2
A12
R8
NC
R3
NC
R7
NC
A2
NC
E2
NC
L1
NC
K4T51163QB-GCCC_FBGA84
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
RAS#
CAS#
WE#
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSDL
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
RAS#
CAS#
WE#
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSDL
VDD
VDD
VDD
VDD
VDD
ODT
CK#
CKE
CS#
VSS
VSS
VSS
VSS
VSS
VDD
VDD
VDD
VDD
VDD
ODT
CK#
CKE
CS#
VSS
VSS
VSS
BA0
BA1
BA0
BA1
VSS
VSS
1
+1.8V
C1
C3
C7
C9
E9
G1
G3
G7
G9
A9
A1
E1
J9
M9
R1
J1
DDR_SODT1
K9
DDR_CLK0
J8
CK
DDR_CLK0#
K8
DDR_SCKE1
K2
DDR_SBA0
L2
DDR_SBA1
L3
DDR_SCS1#
L8
DDR_SRAS#
K7
DDR_SCAS#
L7
DDR_SWE#
K3
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
J7
+1.8V+1.8V
C1
C3
C7
C9
E9
G1
G3
G7
G9
A9
A1
E1
J9
M9
R1
J1
DDR_SODT1
K9
DDR_CLK1
J8
CK
DDR_CLK1#
K8
DDR_SCKE1
K2
DDR_SBA0
L2
DDR_SBA1
L3
DDR_SCS1#
L8
DDR_SRAS#
K7
DDR_SCAS#
L7
DDR_SWE#
K3
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
J7
DDR_CLK0 <8,12>
DDR_CLK0# <8,12>
DDR_SBA0 <12>
DDR_SBA1 <12>
DDR_SRAS# <12>
DDR_SCAS# <12>
DDR_SWE# <12>
DDR_CLK1 <8,12>
DDR_CLK1# <8,12>
DDR_SBA0 <12>
DDR_SBA1 <12>
DDR_SRAS# <12>
DDR_SCAS# <12>
DDR_SWE# <12>
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DIS CLOSE D T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Custom
Date: Sheet
Compal Electronics, Inc.
DDRII-SODIMM SLOT1
EDX20 LA-2481
1
0.5
of
13 48Tuesday, February 22, 2005
Page 14
5
DDR_DQS#[0..7]<9,12>
DDR_DQ[0..63]<9,12>
DDR_DM[0..7]<9,12>
DDR_DQS[0..7]<9,12>
DDR_BA[0..13]<9>
D D
C C
B B
A A
+1.8V
2.2U_0805_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
150U_D2_4VM
1
+
C180
2
+0.9VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
C217
C216
DDR_BA11
DDR_BA7
DDR_BA6
56_0804_8P4R_5%
DDR_BA4 DDR_BA8
DDR_BA2
DDR_BA0
DDR_BBA1
56_0804_8P4R_5%
DDR_BRAS#
DDR_CS2#
DDR_ODT2
DDR_BA13
56_0804_8P4R_5%
C200
1
2
0.1U_0402_16V4Z
1
2
C219
C199
1
2
0.1U_0402_16V4Z
C498
1
2
0.1U_0402_16V4Z
1
2
C220
RP20
56_0804_8P4R_5%
RP21
56_0804_8P4R_5%
RP22
56_0804_8P4R_5%
RP23
56_0804_8P4R_5%
C201
1
2
0.1U_0402_16V4Z
C495
1
2
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V_DDR_VTT
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C218
+0.9VS
RP24
18
27
36
45
RP25
18
27
36
45
RP26
18
27
36
45
5
2.2U_0805_16V4Z
C198
1
2
0.1U_0402_16V4Z
C497
C496
1
1
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
C222
C221
DDR_CKE2DDR_CKE3
18
DDR_BBA2
27
DDR_BA12
36
DDR_BA9
45
18
DDR_BA5
27
DDR_BA3
36
DDR_BA1
45
DDR_BA10
18
DDR_BBA0
27
DDR_BWE#
36
DDR_BCAS#
45
DDR_CS3#
18
DDR_ODT3
27
36
45
C197
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
C223
C258
4
Layout Note:
Place near JP33
DDR_CLK3
10P_0402_50V8J
1
C250
2
DDR_CLK3#
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
1
2
2
2
C257
Layout Note:
Place these resistor
closely JP33,all
trace length<750 mil
C255
C256
4
3
+3VS
C230
+1.8V
1
2
JP19
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
FOX_ASOA426-M2R-TR
SO-DIMM B
REVERSE
http://hobi-elektronika.net
DDR_DQ1
DDR_DQ5
DDR_DQS#0
DDR_DQS0
DDR_DQ4
DDR_DQ7
DDR_DQ12
DDR_DQ8
DDR_CLK4
10P_0402_50V8J
1
C251
2
DDR_CLK4#
DDR_CKE2<8>
DDR_BBA2<9>
DDR_BBA0<9>
DDR_BWE#<9>
0.1U_0402_16V4Z
1
2
C254
DDR_BCAS#<9>
DDR_CS3#<8>
DDR_ODT3<8>
ICH_SMBDATA<13,15,17,21,35>
ICH_SMBCLK<13,15,17,21,35>
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DIS CLOSE D T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
DDR_DQS#1
DDR_DQS1
DDR_DQ10
DDR_DQ14
DDR_DQ16
DDR_DQ17
DDR_DQS#2
DDR_DQS2
DDR_DQ23
DDR_DQ19
DDR_DQ26
DDR_DQ25
DDR_DM3
DDR_DQ24
DDR_DQ30
DDR_CKE2
DDR_BBA2
DDR_BA12
DDR_BA9
DDR_BA8
DDR_BA5
DDR_BA3
DDR_BA1
DDR_BA10
DDR_BBA0
DDR_BWE#
DDR_BCAS#
DDR_ODT3
DDR_DQ37
DDR_DQ32
DDR_DQS#4
DDR_DQS4
DDR_DQ39
DDR_DQ38
DDR_DQ41
DDR_DQ40
DDR_DM5
DDR_DQ42
DDR_DQ46
DDR_DQ48
DDR_DQ52
DDR_DQS#6
DDR_DQS6
DDR_DQ50
DDR_DQ51
DDR_DQ60
DDR_DQ56
DDR_DM7
DDR_DQ63
DDR_DQ58
ICH_SMBDATA
ICH_SMBCLK
0.1U_0402_16V4Z
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
VDD
VDD
BA1
RAS#
VDD
ODT0
NC/A13
VDD
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
2
+1.8V
DDR_VREF
2
DDR_DQ0
4
DDR_DQ6
6
8
DDR_DM0
10
12
DDR_DQ2
14
DDR_DQ3
16
18
DDR_DQ13
20
DDR_DQ9
22
24
DDR_DM1
26
28
DDR_CLK3
30
DDR_CLK3#
32
34
DDR_DQ15
36
DDR_DQ11
38
40
42
DDR_DQ21
44
DDR_DQ20
46
48
50
NC
A11
A7
A6
A4
A2
A0
S0#
NC
2
DDR_DM2
52
54
DDR_DQ18
56
DDR_DQ22
58
60
DDR_DQ27
62
DDR_DQ28
64
66
DDR_DQS#3
68
DDR_DQS3
70
72
DDR_DQ31
74
DDR_DQ29
76
78
DDR_CKE3
80
82
84
86
88
DDR_BA11
90
DDR_BA7
92
DDR_BA6
94
96
DDR_BA4
98
DDR_BA2
100
DDR_BA0
102
104
DDR_BBA1
106
DDR_BRAS#
108
DDR_CS2#
110
112
DDR_ODT2
114
DDR_BA13DDR_CS3#
116
118
120
122
DDR_DQ36
124
DDR_DQ33
126
128
DDR_DM4
130
132
DDR_DQ35
134
DDR_DQ34
136
138
DDR_DQ45
140
DDR_DQ44
142
144
DDR_DQS#5
146
DDR_DQS5
148
150
DDR_DQ43
152
DDR_DQ47
154
156
DDR_DQ49
158
DDR_DQ53
160
162
DDR_CLK4
164
DDR_CLK4#
166
168
DDR_DM6
170
172
DDR_DQ54
174
DDR_DQ55
176
178
DDR_DQ61
180
DDR_DQ57
182
184
DDR_DQS#7
186
DDR_DQS7
188
190
DDR_DQ62
192
DDR_DQ59
194
196
198
200
R273
1 2
10K_0402_5%
10K_0402_5%
12
R272
Title
Size Document Number Rev
Custom
Date: Sheet
0.1U_0402_16V4Z
2.2U_0805_16V4Z
1
1
C228
2
2
DDR_CLK3 <8>
DDR_CLK3# <8>
DDR_CKE3 <8>
DDR_BBA1 <9>
DDR_BRAS# <9>
DDR_CS2# <8>
DDR_ODT2 <8>
DDR_CLK4 <8>
DDR_CLK4# <8>
+3VS
Compal Electronics, Inc.
DDRII-SODIMM SLOT2
EDX20 LA-2481
C229
1
DDR_VREF <8,12,13>
1
0.5
of
14 48Tuesday, February 22, 2005
Page 15
5
Dothan A step
FSC
CLKSEL1
CLKSEL0
D D
CLKSEL2
MHz
01133
0
0
100
1
SRC
MHz
1001
100
PCI
MHz
33.3
33.3
CPU
FSA
FSB
Dothan B step
FSC FSB FSA CPU
CLKSEL0 CLKSEL2
CLKSEL1
00
011
CLK-RaCPU Type
Dothan-A PSB400
C C
Dothan-A PSB533
Dothan-B
CPU_BSEL0<6>
B B
CPU_BSEL1<6>
A A
OPEN OPEN
0 Ohm OPEN OPEN
+VCCP
CLKSEL0
1 2
R138
0_0402_5%
CLK-Ra
CLKSEL1
1 2
R84
0_0402_5%
5
+VCCP
MHz
1331
CLK-Rb
R113
1K_0402_5%@
CLK-Rb
1 2
1 2
R132
1K_0402_5%
R126
0_0402_5%@
CLK-Rc
1 2
R83
1K_0402_5%@
1 2
1 2
R65
1K_0402_5%
R59
0_0402_5%@
1 2
SRC
MHz
100
100100
OPEN
1K Ohm
PCI
MHz
33.3
33.3
CLK-Rc
0 OhmOPEN
MCH_CLKSEL0 <8>
MCH_CLKSEL1 <8>
V
V
4
+3VS
1
C435
2
0.1U_0402_16V4Z
Place crystal within
C111
33P_0402_50V8J
C110
33P_0402_50V8J
SD_CLKIN<24>
CLK_48M_ICH<21>
CLK_14M_LVDS<17>
CLK_PCI_TPM<35> CK_ITP# <5>
CLK_PCI_PCM<24>
CLK_PCI_LOM<27>
CLK_PCI_MINI<26>
CLK_PCI_SIO<35>
CLK_PCI_ICH<19>
CLK_PCI_EC<32>
+3VS
R89
10K_0402_5%
@
1 2
96*_100MSEL
R60
1K_0402_5%
1 2
500 mils of CK410M
12
12
Y2
14.31818MHZ_20P_6X1430004201
12
+VCCP
SD_CLKIN
CLK_48M_ICH
CLK_14M_LVDS CLKSEL0
CLKSEL1
CLK_PCI_TPM CK_CPU2#
CLK_PCI_PCM
CLK_PCI_LOM
CLK_PCI_MINI
CLK_PCI_SIO PCICLK2
CLK_PCI_ICH
CLK_PCI_EC
+3VS
SS frequency selection
96*_100MSEL 96_100MSST/C
LOW
HIGH
4
http://hobi-elektronika.net
1 2
L37
CHB2012U121_0805
1 2
L36
CHB2012U121_0805
CK_XTAL_IN
CK_XTAL_OUT
R69 10K_0402_5%
R68 12_0402_5%
R87 12_0402_5%
R7 12_0402_5%@
R71 12_0402_5%
R90 12_0402_5%
R72 33_0402_5%
R91 33_0402_5%
R109 33_0402_5%
R52 33_0402_5%
R70 33_0402_5%
1 2
R76 10K_0402_5%
ICH_SMBCLK<13,14,17,21,35>
ICH_SMBDATA<13,14,17,21,35>
1 2
CK_VDD_MAIN
CK_VDD_MAIN2
12
12
12
12
12
12
12
12
12
12
12
R130 475_0402_1%
96 MHZ
100 MHZ
PCICLK5
PCICLK4
PCICLK3
96*_100MSEL
PCICLKF0
ICH_SMBCLK
ICH_SMBDATA
CLKIREF
3
2
Width=40mils
2
C437
10U_1206_6.3V6M
1
1
C431
1U_0603_10V4Z
2
1
C445
0.047U_0402_16V4Z
2
1
C447
0.047U_0402_16V4Z
2
1
C446
0.047U_0402_16V4Z
2
1
C427
0.047U_0402_16V4Z
2
1
C444
0.047U_0402_16V4Z
2
1
C428
0.047U_0402_16V4Z
2
1
C443
0.047U_0402_16V4Z
2
Width=40mils
2
C434
10U_1206_6.3V6M
1
U8
21
28
34
1
7
42
48
11
50
49
12
53
16
5
4
3
56
9
8
46
47
39
13
29
2
45
51
6
IDTCV140PAG_TSSOP56
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DIS CLOSE D T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1
C425
0.047U_0402_16V4Z
2
VDDSRC_0
VDDSRC_1
VDDSRC_2
VDDPCI_0
VDDPCI_1
VDDCPU
VDDREF
VDD48
XIN
XOUT
FS_A/USB_48MHz
FS_C/TEST_SEL/REF1
FS_B/TEST_MODE
PCICLK5
PCICLK4
PCICLK3
PCICLK2/SEL_CLKREQ
PCICLK_F1/96*_100MSEL
PCICLK_F0/ITP_EN
SCLK
SDATA
IREF
GND_0
GND_1
GND_2
GND_3
GND_4
GND_5
1
C442
0.047U_0402_16V4Z
2
VDDA
GNDA
PCI/SRC_STOP#
CPU_STOP#
CPUCLKT1
CPUCLKC1
CPUCLKT0
CPUCLKC0
CPUCLKT2_ITP/SRCCLKT_7
CPUCLKC2_ITP/SRCCLKC_7
SRCCLKT6/CLKREQA#
SRCCLKC6/CLKREQB#
SRCCLKT5
SRCCLKC5
SRCCLKT4_SATA
SRCCLKC4_SATA
SRCCLKT3
SRCCLKC3
SRCCLKT2
SRCCLKC2
SRCCLKT1
SRCCLKC1
96_100MSST/SRCCLKT0
96_100MSSC/SRCCLKC0
DOTT_96MHz
DOTC_96MHz
VTT_PWRGD#/PD
REF0/FS_D
1
C426
0.047U_0402_16V4Z
2
37
38
PM_STP_PCI#
55
PM_STP_CPU#
54
CK_CPU1
41
40
44
43
36
35
33
32
31
30
26
27
24
25
22
23
19
20
17
18
14
15
10
52
1 2
R122 33_0402_5%
CK_CPU1#
1 2
R121 33_0402_5%
CK_CPU0
1 2
R124 33_0402_5%
CK_CPU0#
1 2
R123 33_0402_5%
CK_CPU2
1 2
R120 33_0402_5%
1 2
R119 33_0402_5%
SRC5
1 2
R118 33_0402_5%
1 2
R117 33_0402_5%
SCR1 CLK_MCH_3GPLL
1 2
R80 33_0402_5%
SRC1# CLK_MCH_3GPLL#
1 2
R79 33_0402_5%
SSCLK
1 2
R82 33_0402_5%
SSCLK#
1 2
R81 33_0402_5%
DOT96 DREFCLK
1 2
R86 33_0402_5%
1 2
R85 33_0402_5%
CLK_EN#
2N7002_SOT23
REFOUT
Q4
1 2
R131 12_0402_5%
1 2
R125 12_0402_5%
1 2
R137 12_0402_5%
2
R88 10K_0402_5%
13
D
2
G
S
CLK_14M_ICH
PM_STP_PCI# <21>
PM_STP_CPU# <21>
CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_CPU_BCLK
CLK_CPU_BCLK#
CK_ITP
CK_ITP#
CLK_PCIE_ICH
CLK_PCIE_ICH#SRC5#
DREF_SSCLK
DREF_SSCLK#
DREFCLK#DOT96# DREFCLK
1 2
CLK_14M_SIO
CLK_14M_CODEC
CLK_MCH_BCLK <8>
CLK_MCH_BCLK# <8>
CLK_CPU_BCLK <5>
CLK_CPU_BCLK# <5>
CK_ITP <5>
CLK_PCIE_ICH <21>
CLK_PCIE_ICH# <21>
CLK_MCH_3GPLL <10>
CLK_MCH_3GPLL# <10>
DREF_SSCLK <8>
DREF_SSCLK# <8>
DREFCLK <8>
DREFCLK# <8>
+3VS
VGATE <8,21,32,45>
CLK_14M_SIO <35>
CLK_14M_CODEC <29>
CLK_14M_ICH <21>
Title
Size Document Number Rev
Custom
Date: Sheet
Compal Electronics, Inc.
EDX20 LA-2481
1
CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_CPU_BCLK
CLK_CPU_BCLK#
CK_ITP
CK_ITP#
CLK_PCIE_ICH
CLK_PCIE_ICH#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
DREF_SSCLK
DREF_SSCLK#
DREFCLK#
Clock Generator
1
R142
49.9_0402_1%
R141
49.9_0402_1%
R144
49.9_0402_1%
R143
49.9_0402_1%
R140
49.9_0402_1%
R139
49.9_0402_1%
R135
1 2
49.9_0402_1%
R134
1 2
49.9_0402_1%
R62
1 2
49.9_0402_1%
R61
1 2
49.9_0402_1%
R64
1 2
49.9_0402_1%
R63
1 2
49.9_0402_1%
R67
1 2
49.9_0402_1%
R66
1 2
49.9_0402_1%
of
15 48Tuesday, Fe b r u a r y 22, 2005
12
12
12
12
12
12
0.5
Page 16
5
4
3
2
1
http://hobi-elektronika.net
D D
1
C525
10U_0805_10V4Z
DVI_1362@
2
1
C530
10U_0805_10V4Z
DVI_7307@
2
1
C541
10U_0805_10V4Z
2
DVI_1362@
DVI_DDC_CLK1362 _SCL_DDC
DVI_1362@
DVI_DETECT
L38
1 2
0_0603_5%DVI_1362@
L39
1 2
0_0603_5%DVI_7307@
L40
1 2
0_0603_5%
DVI_1362@
+2.5VS
+1.8VS
+2.5VS
+3VS
12
R294
16K_0402_5%
DVI CONTROLLER
0.1U_0402_16V4Z
DVI_1362@
0.1U_0402_16V4Z
DVI_7307@
0.1U_0402_16V4Z
+5VS +5VS
12
R295
16K_0402_5%
JP8
1
21
2
22
3
23
4
24
5
25
6
26
7
27
8
28
9
29
10
30
11
31
12
32
13
33
14
34
15
35
16
36
17
37
18
38
19
39
20
40
JAE_DD2R040HP2
SDVO_SDAT
SDVO_SCLK
DVI_CLK+
DVI_CLK-
DVI_TX1+
DVI_TX1-
R299
300_0402_1%@
1 2
C309
0.1U_0402_16V4Z@
R298
300_0402_1%@
1 2
C311
0.1U_0402_16V4Z@
SDVO_SDAT <10>
SDVO_SCLK <10>
R428 0_0402_5%
DVI_AVDD_3V
U48
SDI+
SDI-
SDR+
SDR-
SDG+
SDG-
SDB+
SDB-
SDC+
SDC-
SPGND
RESET#
EXT_SWING
PGND2
PVCC2
12
R426
1K_0402_5%@
R425
1K_0402_5%
DVI_1362@
DVI_V2
12
AGND
GND7TEST30GND31SGND39SGND45AGND18AGND24A1
R436
10K_0402_5%
DVI_7307@
I2C_ADD
W=20 mils
1
28
VCC
R418 0_0402_5%DVI_7307@
1 2
R419 0_0402_5%DVI_1362@
1 2
DVI_V9 DVI_DVDD_2.5V
R417 0_0402_5%DVI_7307@
1 2
R416 0_0402_5%DVI_1362@
1 2
42
48
DVI_CLK-
AVCC15AVCC21SVCC36SVCC
OVCC
12
6
R424
0_0402_5%
DVI_7307@
13
TXC#
SPVCC
TXC
TX0#
TX0
TX1#
TX1
TX2#
TX2
HTPLG
PVCC1
VCC
SDADDC
SCLDDC
SDSCL
SDSDA
EXT_RES
VCC
SII1362CLU48_LQFP48
35
34
DVI_V4
DVI_V3 DVI_DVDD_1.8V
DVI_CLK+
14
DVI_TX0-
16
DVI_TX0+
17
DVI_TX1-
19
DVI_TX1+
20
DVI_TX2-
22
DVI_TX2+
23
DVI_DETECT
29
DVI_V6
11
10
9
8
5
4
R420
1 2
1K_0402_5%DVI_1362@
1 2
R421 0_0402_5%DVI_1362@
Note:
Install DVI-Ra 1K_0402_5% for SiI1362
Install DVI-Ra 0_0402_5% for CH7307
R432 0_0402_5%DVI_7307@
R437 0_0402_5%DVI_1362@
DVI_V1
R429 0_0402_5%DVI_7307@
R430 0_0402_5%DVI_1362@
1362_SDA_DDC
1362_SCL_DDC
R292 0_0402_5%DVI_7307@
R289 0_0402_5%DVI_7307@
R291 0_0402_5%DVI_1362@
R287 0_0402_5%DVI_1362@
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
DVI_DVDD_2.5VDVI_V10
DVI_DVDD_1.8V
DVI_AVDD_3V
DVI_DDC_CLK
DVI_AVDD_3V
DVI_DDC_DAT
DVI_DVDD_1.8V
DVI_DVDD_2.5V
DVI_DVDD_1.8V
DVI_DVDD_2.5V DVI_V5
C C
B B
DVI-Rb
+2.5VS
12
12
SDVOB_INT+<10>
SDVOB_INT-<10>
DVI_AVDD_3V
R422
10K_0402_5%
@
AS
R423
0_0402_5%
DVI_1362@
R438
1 2
300_0402_5%DVI_1362@
1.2K_0402_5%
DVI_7307@
12
R435
R445 0_0402_5%DVI_7307@
1 2
R446 0_0402_5%DVI_1362@
1 2
R443 0_0402_5%DVI_7307@
1 2
R434 0_0402_5%DVI_1362@
1 2
C306 0.1U_0402_16V4Z
C305 0.1U_0402_16V4Z
SDVOB_R+<10>
SDVOB_R-<10>
SDVOB_G+<10>
SDVOB_G-<10>
SDVOB_B+<10>
SDVOB_B-<10>
SDVOB_CLK+<10>
SDVOB_CLK-<10>
PLT_RST#<8,17,19,21,23,35>
0_0402_5%
DVI_1362@
12
R444
R441
10K_0402_5%
DVI_7307@
DVI_AVDD_3V
PLT_RST#
1 2
AS
DVI_V8
DVI_V7
1 2
32
33
37
38
40
41
43
44
46
47
25
27
26
DVI_1362@
R439
0_0402_5%
+3VS
3
2
12
12
DVI-Ra
Note: Address = 0x70
Install DV I-Rb 0_0402_ 5% for SiI1362
Note: Address = 0x72
Install DVI-Rb 10K_0402_5% for CH7307
A A
150P_0402_50V8J
1 2
DVI_TX0+
DVI_TX0-
DVI_TX2+
DVI_TX2-
DVI_DDC_DAT1362_SDA_DDC
DVI_1362@
DVI_TX0-
DVI_TX0+
DVI_TX1-
DVI_TX1+
DVI_TX2-
12
1 2
C308
R297
R296
C312
C310
300_0402_1%@
0.1U_0402_16V4Z@
300_0402_1%@
0.1U_0402_16V4Z@
1
2
DVI_DVDD_1.8V
C528
0.1U_0402_16V4Z
DVI_1362@
DVI_DVDD_2.5V
C533
C529
0.1U_0402_16V4Z
DVI_7307@
DVI_AVDD_3V
C304
DVI_1362@
SDVO_SDAT
SDVO_SCLK
0.1U_0402_16V4Z
DVI_1362@
R288 2.7K_0402_5%
R290 2.7K_0402_5%
DVI_TX2+
DVI_CLK+
DVI_CLK-
DVI_DDC_DAT
DVI_DDC_CLK
12
R282 10K_0402_5%
C527
C542
1 2
1 2
1 2
R427 0_0402_5%
+5VS
+5VS
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DIS CLOSE D T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Custom
Date: Sheet
Compal Electronics, Inc.
DVI CH7307/SiL1362
EDX20 LA-2481
1
0.5
of
16 48Tuesday, Fe b r u a r y 22, 2005
Page 17
1
2
3
4
5
6
7
8
1
2
J1 J OPEN
J2 J OPEN
CLK1+
CLK1-
LVDSA6+
LVDSA6-
LVDSA5+
LVDSA5-
LVDSA4+
LVDSA4-
CLK0+
CLK0-
LVDSA2+
LVDSA2-
LVDSA1+
LVDSA1-
LVDSA0+
LVDSA0-
DISPOFF#
DAC_BRIG<32>
+LCDVDD
C488
0.1U_0402_16V4Z
12
12
B+
1
2
0.01U_0603_50V4Z
B+
LCD CONN.
JP20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
IPEX_20143-040E
C564
1
0.1U_0603_25V7K
2
JP28
1
2
3
4
5
6
7
MOLEX_53780-0790
C562
http://hobi-elektronika.net
+2.5VS
12
A A
B B
+2.5VS
12
R6
10K_0402_5%
@2CH
AS_7308
12
R11
CLK_14M_LVDS<15>
XI
XO
100_0402_5%
@
C C
D D
7308_SMBDATA
7308_SMBCLK
+2.5VS
Y1
14.31818MHz_20P_1BX14318BE1A@
R523
1 2
R524
2.2K_0402_5%
@
1
C9
C11
2
@2CH
2CH_SDVOB_B-<10>
2CH_SDVOB_B+<10>
2CH_SDVOB_G-<10>
2CH_SDVOB_G+<10>
2CH_SDVOB_R-<10>
2CH_SDVOB_R+<10>
2CH_SDVOB_CLK-<10>
2CH_SDVOB_CLK+<10>
ENABKL<10,32>
CLK_14M_LVDS
1 2
C1 22P_0402_50V8J@
1 2
C22 22P_0402_50V8J@
@
@2CH
12
2.2K_0402_5%
1
C23
2
@2CH
PLT_RST#<8,16,19,21,23,35>
+3VS
Q60
S
2N7002_SOT23@
1
1
C39
2
2
@2CH
+3VS
+2.5VS
ENABKL
ENVDD
7308_SMBCLK
7308_SMBDATA
LCD_DDCCLK
LCD_DDCDATA
R3
@2CH
0_0402_5%
G
2
13
D
S
Q61
1
C5
@2CH
2
10U_0805_10V6M
PLT_RST#
AS_7308
XI
12
XO
G
2
D
2N7002_SOT23@
@2CH
13
U6
3
56
62
49
16
58
57
55
54
52
51
61
60
48
47
1
2
50
64
63
4
5
6
7
9
10
11
12
14
15
AVDD_PLL
AVDD
AVDD
DVDD
DVDD
SDVOB_B#
SDVOB_B
SDVOB_G#
SDVOB_G
SDVOB_R#
SDVOB_R
SDVOB_CLK#
SDVOB_CLK
SDVOB_STALL#
SDVOB_STALL
ENABKL
ENAVDD
TST3
TST1
TST2
RESET#
AS
SPC
SPD
SD_PROM
SC_PROM
SD_DDC
SC_DDC
XI
XO
ICH_SMBDATA <13,14,15,21,35>
ICH_SMBCLK <13,14,15,21,35>
LVDD
LVDD
LVDD
Chrontel
CH7308
64 pin-LQFP
CH7308_LQFP64
@2CH
LVDD
LDCN0
LDCP0
LDCN1
LDCP1
LDCN2
LDCP2
LDCN3
LDCP3
LDCN4
LDCP4
LDCN5
LDCP5
LDCN6
LDCP6
LDCN7
LDCP7
LL1NC
LL1PC
LL2NC
LL2PC
VSWING
DGND
DGND
LGND
LGND
LGND
LGND
AGND
AGND
AGND_PLL
470_0402_5%
ENVDD<10>
44
38
19
25
46
45
43
42
40
39
34
33
30
29
27
26
24
23
21
20
37
36
18
17
32
31
13
22
28
35
41
59
53
8
ENVDD
+3VS
+3VS
LVDSA0LVDSA0+
LVDSA1LVDSA1+
LVDSA2LVDSA2+
LVDSA4LVDSA4+
LVDSA5LVDSA5+
LVDSA6LVDSA6+
CLK0CLK0+
CLK1CLK1+
R29 2.4K_0402_5%
1 2
R269
RP51
RP52
RP53
RP54
@2CH
12
13
D
G
S
2
1
C24
@2CH
2
1 4
2 3
1 4
2 3
1 4
2 3
1 4
2 3
+12VALW+LCDVDD
12
R271
100K_0402_5%
Q17
2
2N7002_SOT23
13
22K
22K
1
1
C53
C14
@2CH
@2CH
2
2
0_0404_4P2R_5%
0_0404_4P2R_5%
0_0404_4P2R_5%
0_0404_4P2R_5%
2
G
Q19
DTC124EK_SOT23
1
C54
@2CH
2
10U_0805_10V6M
TXA0TXA0+
TXA1TXA1+
TXA2TXA2+
TXACLKTXACLK+
12
R270
100K_0402_5%
13
D
Q18
S
2N7002_SOT23
0.01U_0402_16V7K
1
C55
@2CH
2
TXA0- <10>
TXA0+ <10>
TXA1- <10>
TXA1+ <10>
TXA2- <10>
TXA2+ <10>
TXACLK- <10>
TXACLK+ <10>
+LCDVDD+12VALW
Q40
AO3402_SOT23
S
G
2
12
1
C233
2
D
13
R242
150K_0402_5%
GM_PWM_L<10>
+3VS
1
C479
0.1U_0402_16V4Z
2
1 2
DIGI_RST#<32>
DIGISUSP<32>
RXDB#<35>
TXDB<35>
CTSB#<35>
DTRB#<35>
LCD_DDCCLK<10>
LCD_DDCDATA<10>
PID1<21>
PDCT<32>
PID1
+3VS
G
S
2
2N7002_SOT23
R253
1 2
10K_0402_5%
1 2
R466 0_0402_5%
1 2
R327 0_0402_5%@
+3VS
12
13
D
Q58
R511
10K_0402_5%
+3VS
R251
100K_0402_5%@
BKOFF#<32>
INVT_PWM<32>
+2.5VS
12
R510
10K_0402_5%
1
C486
2
10U_0805_10V4Z
2
Q41
1
600mA
+3VS
LCD_DDCCLK
LCD_DDCDATA
PID1
PDCT
3
PACDN042_SOT23
@
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
1
2
3
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
5
6
LCD Conn&Inverter
Size Document Number Rev
EDX20 LA-2481
Date: Sheet
7
of
17 48Tuesday, Fe b r u a r y 22, 2005
8
0.5
Page 18
1
2
3
4
5
6
7
8
http://hobi-elektronika.net
D17
SFI0603-120E100MP_0603@
D18
SFI0603-120E100MP_0603@
21
A A
FBM-11-201209-170T
FBM-11-201209-170T
FBM-11-201209-170T
CRT_R_MB
CRT_G_MB
1
R346
150_0402_5%
150_0402_5%
150_0402_5%
B B
CRT_HSYNC<10>
C C
CRT_VSYNC<10>
CRT_HSYNC
CRT_VSYNC
R1156 39_0402_5%
+5VS
1
5
P
OE#
A2Y
U4
G
SN74AHCT1G125GW_SOT353-5
3
R1157 39_0402_5%
12
+5VS
1
5
P
OE#
A2Y
U2
G
SN74AHCT1G125GW_SOT353-5
3
12
4
4
CRT_HSYNC_MB
R508
1K_0402_5%
CRT_HSYNC_DOCK
CRT_VSYNC_MB
R509
1K_0402_5%
CRT_VSYNC_DOCK
R342
C366
2
1 2
6P_0402_25V8K
6P_0402_25V8K
6P_0402_25V8K
+5VS
A2Y
CRT_HSYNC_DOCK <36>
+5VS
A2Y
CRT_VSYNC_DOCK <36>
R338
1
C361
2
1 2
1
5
U51
P
4
1 2
OE#
G
FBM-11-160808-121T_0603
SN74AHCT1G125GW_SOT353-5
3
1
5
U52
P
4
1 2
OE#
G
FBM-11-160808-121T_0603
SN74AHCT1G125GW_SOT353-5
3
1 2
L43
1 2
L42
1 2
L41
1
C355
2
1 2
L30
L29
1
C364
2
6P_0402_25V8K
HSYNC
1
C567
22P_0402_25V8K
2
VSYNC
1
C568
22P_0402_25V8K
2
1
C360
2
6P_0402_25V8K
21
SFI0603-120E100MP_0603@
1
C356
2
6P_0402_25V8K
D16
21
CRTR
CRTG
CRTBCRT_B_MB
0.1U_0402_16V4Z
CRT_R<10>
CRT_G<10>
CRT_B<10>
D15
2 1
+5VS
RB491D_SOT23
0.1U_0402_16V4Z
M_SEN#<21,36>
3VDDCDA<10,36>
3VDDCCL<10,36>
+5VS
1
2
DOCKEN_VGA
CRT_R
CRT_G
CRT_B
16
4
7
9
12
8
C25
CRTVCC
1
C563
2
M_SEN#
CRTR
3VDDCDA
CRTG
HSYNC
CRTB
VSYNC
3VDDCCL
1: TO DOCK
0: TO MB
U5
EN
VCC
S1A
S2A
DA
S1B
DB
S2B
DC
S1C
DD
S2C
S1D
S2D
GND
PI5V330Q_QSOP16
+3VS
12
12
R328
10K_0402_5%
4.7K_0402_5%
1 2
4.7K_0402_5%
+3VS
12
R531
10K_0402_5%
DOCKEN_VGA
CRT_R_MB
CRT_R_DOCK
CRT_G_MB
CRT_G_DOCK
CRT_B_MB
CRT_B_DOCK
R371
1
2
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
C343
100P_0402_50V8J
JP10
SUYIN_070112FR015S222XU
DOCKEN_VGA <32,33>
CRT_R_DOCK <36>
CRT_G_DOCK <36>
CRT_B_DOCK <36>
R331
15
1
IN
2
3
5
6
11
10
14
13
D D
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
PROPRIETARY NOTE
1
2
3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
5
6
LCD Connecter & CRT
Size Document Number Rev
EDX20 LA-2481
Date: Sheet
7
of
18 48Tuesday, February 22, 2005
8
0.5
Page 19
5
4
3
2
1
http://hobi-elektronika.net
D D
C C
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
RP19
1 8
2 7
3 6
4 5
8.2K_1206_8P4R_5%
RP18
1 8
2 7
3 6
4 5
8.2K_1206_8P4R_5%
RP17
1 8
2 7
3 6
4 5
8.2K_1206_8P4R_5%
RP4
1 8
2 7
3 6
4 5
8.2K_1206_8P4R_5%
RP5
1 8
2 7
3 6
4 5
8.2K_1206_8P4R_5%
RP3
1 8
2 7
3 6
4 5
8.2K_1206_8P4R_5%
PCI_DEVSEL#
PCI_PLOCK#
PCI_PERR#
PCI_IRDY#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#
PCI_PIRQA#
PCI_PIRQC#
PCI_PIRQB#
PCI_PIRQD#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
PCI_REQ#5
PCI_REQ#6
PCI_SERR#
PCI_AD[0..31]<24,26,27>
PCI_FRAME#<24,26,27>
PCI_PIRQA#<24>
PCI_PIRQB#<24> PCI_PIRQF# <27>
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_FRAME#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
T12PAD
T11PAD
T16PAD
T14PAD
T6PAD
T7PAD
T10PAD
T9PAD
T15PAD
U38B
E2
AD[0]
E5
AD[1]
C2
AD[2]
F5
AD[3]
F3
AD[4]
E9
AD[5]
F2
AD[6]
D6
AD[7]
E6
AD[8]
D3
AD[9]
A2
AD[10]
D2
AD[11]
D5
AD[12]
H3
AD[13]
B4
AD[14]
J5
AD[15]
K2
AD[16]
K5
AD[17]
D4
AD[18]
L6
AD[19]
G3
AD[20]
H4
AD[21]
H2
AD[22]
H5
AD[23]
B3
AD[24]
M6
AD[25]
B2
AD[26]
K6
AD[27]
K3
AD[28]
A5
AD[29]
L1
AD[30]
K4
AD[31]
J3
FRAME#
Interrupt I/F
N2
PIRQ[A]#
L2
PIRQ[B]#
M1
PIRQ[C]#
L3
PIRQ[D]#
AC5
SATA[1]RXN/RSVD[1]
AD5
SATA[1]RXP/RSVD[2]
AF4
SATA[1]TXN/RSVD[3]
AG4
SATA[1]TXP/RSVD[4]
AC9
SATA[3]RXN/RSVD[5]
AD9
SATA[3]RXP/RSVD[6]
AF8
SATA[3]TXN/RSVD[7]
AG8
SATA[3]TXP/RSVD[8]
U3
TP[3]/RSVD[9]
ICH6_BGA609
PCI
REQ[4]#/GPI[40]
GNT[4]#/GPO[48]
REQ[5]#/GPI[1]
GNT[5]#/GPO[17]
REQ[6]#/GPI[0]
GNT[6]#/GPO[16]
PIRQ[E]#/GPI[2]
PIRQ[F]#/GPI[3]
PIRQ[G]#GPI[4]
PIRQ[H]#/GPI[5]
RESERVED
REQ[0]#
GNT[0]#
REQ[1]#
GNT[1]#
REQ[2]#
GNT[2]#
REQ[3]#
GNT[3]#
C/BE[0]#
C/BE[1]#
C/BE[2]#
C/BE[3]#
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
PLTRST#
PCICLK
PME#
L5
C1
B5
B6
M5
F1
B8
C8
F7
E7
E8
F6
B7
D8
J6
H6
G4
G2
A3
E1
R2
C3
E3
C5
G5
J1
J2
R5
G6
P6
D9
C7
C6
M3
PCI_REQ#0
PCI_REQ#1
PCI_GNT#1
PCI_REQ#2
PCI_GNT#2
PCI_REQ#3
PCI_GNT#3
PCI_REQ#4
PCI_REQ#5
PCI_REQ#6
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
PCI_IRDY#
PCI_PAR
ICH_PCIRST#
PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PLTRST#
CLK_PCI_ICH
PCI_PME#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
PCI_REQ#1 <26>
PCI_GNT#1 <26>
PCI_REQ#2 <24>
PCI_GNT#2 <24>
PCI_REQ#3 <27>
PCI_GNT#3 <27>
PCI_C/BE#0 <24,26,27>
PCI_C/BE#1 <24,26,27>
PCI_C/BE#2 <24,26,27>
PCI_C/BE#3 <24,26,27>
PCI_IRDY# <24,26,27>
PCI_PAR <24,26,27>
PCI_DEVSEL# <24,26,27>
PCI_PERR# <24,26,27>
PCI_SERR# <24,26,27>
PCI_STOP# <24,26,27>
PCI_T RDY# <24,26,27>
CLK_PCI_ICH <15>
PCI_PME# <34>
PCI_PIRQG# <26>
PCI_PIRQH# <26>
CLK_PCI_ICH
R194
10_0402_5%@
1 2
1
C174
10P_0402_50V8J@
2
B B
ICH_PCIRST#
A A
5
+3VS
14
1
A
2
B
7
R246 0_0402_5%@
4
1
C164
0.1U_0402_16V4Z
2
U12A
P
G
PCIRST#
3
O
74VHC08MTC_TSSOP14
12
PCIRST# <24,25,26,27,32>
+3VS
1
C235
0.1U_0402_16V4Z
2
14
PLTRST#
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DIS CLOSE D T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
4
5
A
B
7
R234 0_0402_5%@
U12B
P
PLT_RST#
6
O
G
74VHC08MTC_TSSOP14
12
PLT_RST# <8,16,17,21,23,35>
2
Title
Size Document Number Rev
Custom
Date: Sheet
Compal Electronics, Inc.
ICH6(1/4)
EDX20 LA-2481
1
of
19 48Tuesday, February 22, 2005
0.5
Page 20
5
4
3
2
1
http://hobi-elektronika.net
C484
12P_0402_50V8J
Y5
2
2
1
C192
NC
3
NC
C483
12P_0402_50V8J
R195
0_0402_5%@
OUT
32.768KHZ_12.5P_1TJS125DJ2A073
D D
+RTCVCC
1 2
R201 20K_0402_5%
1 2
R198 1M_0402_1%
CMOS_CLR1
SHORT PADS
1 2
1U_0402_6.3V4Z
INTVRMEN
ENABLE INTEGRATED VCCSUS1.5 VRMHIGH
LOW
DISABLE INTEGRATED VCCSUS1.5 VRM
10P_0402_50V8J@
AC97_BITCLK<29>
C C
B B
AC97_SYNC<29>
AC97_RST#<29>
+3VS
AC97_SDIN0<29>
AC97_SDOUT<29>
1 2
1 2
R166 1K_0402_5%
1 2
1 2
R162 33_0402_5%
PDIORDY<23>
PDDACK#<23>
ICH_RTCX1
12
1
IN
4
ICH_RTCX2
12
12
R191
0_0402_5%
1 2
R177
C131
10_0402_5%@
1 2
R16533_0402_5%
R17233_0402_5%
12
R17533_0402_5%
R213 0_0402_5%
1 2
R189 0_0402_5%
1 2
R214 0_0402_5%
1 2
R174
1 2
24.9_0402_1%
IDEIRQ<23>
PDIOR#<23>
12
R407
10M_0402_5%
ICH_RTCRST#
INTRUDER#
INTVRMEN
12
AC97_BITCLK
AC97_SYNC_R
AC97_RST_R#
AC97_SDOUT_R
SATARBIAS
PDIORDY
IDEIRQ
PDDACK#
PDIOW#
PDIOR#
AC19
AD3
AG2
AD7
AC7
AG6
AC2
AC1
AG11
AF11
AF16
AB16
AB15
AC14
AE16
Y1
Y2
AA2
AA3
AA5
D12
B12
D11
F13
F12
B11
E12
E11
C13
C12
C11
E13
C10
B9
A10
F11
F10
B10
C9
AE3
AF2
AF6
U38A
RTCX1
RTCX2
RTCRST#
INTRUDER#
INTVRMEN
EE_CS
EE_SHCLK
EE_DOUT
EE_DIN
LAN_CLK
LAN_RSTSYNC
LANRXD[0]
LANRXD[1]
LANRXD[2]
LANTXD[0]
LANTXD[1]
LANTXD[2]
ACZ_BIT_CLK
ACZ_SYNC
ACZ_RST#
ACZ_SDIN[0]
ACZ_SDIN[1]
ACZ_SDIN[2]
ACZ_SDO
SATALED#
SATA[0]RXN
SATA[0]RXP
SATA[0]TXN
SATA[0]TXP
SATA[2]RXN
SATA[2]RXP
SATA[2]TXN
SATA[2]TXP
SATA_CLKN
SATA_CLKP
SATARBIAS#
SATARBIAS
IORDY
IDEIRQ
DDACK#
DIOW#
DIOR#
ICH6_BGA609
RTC
LAD[0]/FWH[0]
LAD[1]/FWH[1]
LAD[2]/FWH[2]
LAD[3]/FWH[3]
LPC
LDRQ[0]#
LDRQ[1]#/GPI[41]
LFRAME#/FWH[4]
A20GATE
A20M#
LAN
CPUSLP#
CPU
DPRSLP#/TP[4]
DPSLP#/TP[2]
FERR#
CPUPWRGD/GPO[49]
IGNNE#
INIT3_3V#
INIT#
RCIN#
STPCLK#
THRMTRIP#
DA[0]
DA[1]
DA[2]
DCS1#
DCS3#
SATAAC-97/AZALIA
DD[0]
DD[1]
DD[2]
DD[3]
PIDE
DD[4]
DD[5]
DD[6]
DD[7]
DD[8]
DD[9]
DD[10]
DD[11]
DD[12]
DD[13]
DD[14]
DD[15]
DDREQ
PDD[0..15]<23>
INTR
SMI#
LPC_LAD0
P2
LPC_LAD1
N3
LPC_LAD2
N5
LPC_LAD3
N4
LPC_DRQ#0
N6
LPC_DRQ#1
P4
LPC_FRAME#
P3
GATEA20
AF22
H_A20M#
AF23
CPUSLP#
AE27
AE24
H_DPSLP#
AD27
FERR# H_FERR#
AF24
H_PWRGOOD
AG25
H_IGNNE#
AG26
AE22
H_INIT#
AF27
H_INTR
AG24
KBRST#
AD23
H_NMI
AF25
NMI
AG27
AE26
AE23
AC16
AB17
AC17
AD16
AE17
AD14
AF15
AF14
AD12
AE14
AC11
AD11
AB11
AE13
AF13
AB12
AB13
AC13
AE15
AG15
AD13
AB14
H_SMI#
H_STPCLK#
THRMTRIP#
PDA0
PDA1
PDA2
PD_CS#1
PD_CS#3
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDDREQ
PDD[0..15]
LPC_AD0 <32,35>
LPC_AD1 <32,35>
LPC_AD2 <32,35>
LPC_AD3 <32,35>
LPC_DRQ#0 <35>
LPC_DRQ#1 <35>
LPC_FRAME# <32,35>
GATEA20 <32>
H_A20M# <5>
Ra
R46 0_0402_5%@
R105 0_0402_5%
R108 56_0402_5%
12
Rb
12
Rc
12
H_PWRGOOD <5>
H_IGNNE# <5>
H_INIT# <5>
H_INTR <5>
KBRST# <32>
H_NMI <5>
H_SMI# <5>
H_STPCLK# <5>
PDA0 <23>
PDA1 <23>
PDA2 <23>
PDCS1# <23>
PDCS3# <23>
PDDREQ <23>PDIOW#<23>
V
H_CPUSLP#
H_DPRSTP#DPRSTP#
CPU Type
Dothan-A
Dothan-B
RbRa
0 OhmRcOPEN 56 Ohm
OPEN 0 Ohm
H_CPUSLP# <5,8>
H_DPRSTP# <5>
H_DPSLP# <5,45>
H_FERR# <5>
+VCCP
+VCCP
56 Ohm
R115
330_0402_5%@
1 2
1 2
C429
1U_0603_10V6K@
H_FERR#
H_DPRSTP#
1 2
R110
75_0402_1%
2
B
+VCCP
1
C
Q36
E
3
H_THERMTRIP#
12
R107
56_0402_5%
2SC2411K_SC59@
R111
56_0402_5%
+VCCP
12
R104
56_0402_5%
MAINPWRON <41,43>
THRMTRIP#
12
H_THERMTRIP# <5,8>
CHGRTC
+RTCVCC
R43
A A
5
4
1 2
100_0603_1%
2
C60
0.1U_0402_16V4Z
1
2
3
BAS40-04_SOT23
D1
BATT1.2
1
BATT1.1
R42
1 2
W=20mils
511_0603_1%
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DIS CLOSE D T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
BATT1
+-
1 2
RTCBATT
2
Title
Size Document Number Rev
Custom
Date: Sheet
Compal Electronics, Inc.
ICH6(2/4)
EDX20 LA-2481
1
of
20 48Tuesday, February 22, 2005
0.5
Page 21
5
+3VALW
4
3
2
1
http://hobi-elektronika.net
+3VALW
12
12
ICH_SPKR<29>
SUS_STAT#<35>
EC_SMI#<32>
EC_SCI#<32>
ACIN<32,39,41>
EC_SWI#<32>
PID1<17>
SIRQ<24,32,35>
D5 RB751V_SOD323
VGATE<8,15,32,45>
T13PAD
PLT_RST#<8,16,17,19,23,35>
R222
10K_0402_5%
ICH_RI#
SMBCLK
SMBDATA
LINKALERT#
ICH_SMLINK0
ICH_SMLINK1
MCH_SYNC#
ICH_SPKR
SUS_STAT#
ITP_DBRESET#
PM_BMBUSY#
M_SEN#
EC_SMI#
EC_SCI#
R171
1 2
EC_SWI#
PM_STP_PCI#
PM_STP_CPU#
WL_EN#
IDERST_HD#
EC_FLASH#
PM_CLKRUN#
ICH_GPIO33
PID1
ICH_PCIE_W AKE#
SIRQ
21
VGATE
CLK_14M_ICH
CLK_48M_ICH
ICH_SUSCLK
EC_SLP_S3#
EC_SLP_S4#
EC_SLP_S5#
ICH_PWRGD
PM_DPRSLPVR
PM_BATLOW#
EC_PBTNOUT#
PLT_RST#
EC_RSMRST#
SIRQ
0_0402_5%@
1 2
R133
U38C
T2
RI#
AF17
SATA[0]GP/GPI[26]
AE18
SATA[1]GP/GPI[29]
AF18
SATA[2]GP/GPI[30]
AG18
SATA[3]GP/GPI[31]
Y4
SMBCLK
W5
SMBDATA
Y5
LINKALERT#
W4
SMLINK[0]
U6
SMLINK[1]
AG21
MCH_SYNC#
F8
SPKR
W3
SUS_STAT#/LPCPD#
U2
SYS_RESET#
AD19
BM_BUSY#/GPI[6]
AE19
GPI[7]
R1
GPI[8]
W6
USB2P0_SMI#
12
12
10K_0402_5%
R526
R218
39K_0402_5%@
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
SMBALERT#/GPI[11]
M2
GPI[12]
R6
GPI[13]
AC21
STP_PCI#/GPO[18]
AB21
GPO[19]
AD22
STP_CPU#/GPO[20]
AD20
GPO[21]
AD21
GPO[23]
V3
GPIO[24]
P5
GPIO[25]
R3
GPIO[27]
T3
GPIO[28]
AF19
CLKRUN#/GPIO[32]
AF20
GPIO[33]
AC18
GPIO[34]
U5
WAKE#
AB20
SERIRQ
AC20
THRM#
AF21
VRMPWRGD
E10
CLK14
A27
CLK48
V6
SUSCLK
T4
SLP_S3#
T5
SLP_S4#
T6
SLP_S5#
AA1
PWROK
AE20
DPRSLPVR/TP[1]
V2
BATLOW#/TP[0]
U1
PWRBTN#
V5
LAN_RST#
Y3
RSMRST#
ICH6_BGA609
12
10K_0402_5%
R216
100K_0402_5%
MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
GPIO
CLOCK
POWER MGT
DMI_ZCOMP
DMI_IRCOMP
OC[4]#/GPI[9]
OC[5]#/GPI[10]
OC[6]#/GPI[14]
OC[7]#/GPI[15]
USB
PERn[1]
PERp[1]
PETn[1]
PETp[1]
PERn[2]
PERp[2]
PETn[2]
PETp[2]
PERn[3]
PERp[3]
PETn[3]
PETp[3]
PERn[4]
PERp[4]
PETn[4]
PCI-EXPRESSDIRECT MEDIA INTERFACE
PETp[4]
DMI[0]RXN
DMI[0]RXP
DMI[0]TXN
DMI[0]TXP
DMI[1]RXN
DMI[1]RXP
DMI[1]TXN
DMI[1]TXP
DMI[2]RXN
DMI[2]RXP
DMI[2]TXN
DMI[2]TXP
DMI[3]RXN
DMI[3]RXP
DMI[3]TXN
DMI[3]TXP
DMI_CLKN
DMI_CLKP
OC[0]#
OC[1]#
OC[2]#
OC[3]#
USBP[0]N
USBP[0]P
USBP[1]N
USBP[1]P
USBP[2]N
USBP[2]P
USBP[3]N
USBP[3]P
USBP[4]N
USBP[4]P
USBP[5]N
USBP[5]P
USBP[6]N
USBP[6]P
USBP[7]N
USBP[7]P
USBRBIAS#
USBRBIAS
H25
H24
G27
G26
K25
K24
J27
J26
M25
M24
L27
L26
P24
P23
N27
N26
T25
T24
R27
R26
V25
V24
U27
U26
Y25
Y24
W27
W26
AB24
AB23
AA27
AA26
AD25
AC25
F24
F23
C23
D23
C25
C24
C27
B27
B26
C26
C21
D21
A20
B20
D19
C19
A18
B18
E17
D17
B16
A16
C15
D15
A14
B14
A22
B22
ICH_GPIO33
DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0
DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1
CLK_PCIE_ICH#
CLK_PCIE_ICH
DMI_IRCOMP
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USBP0USBP0+
USBP1USBP1+
USBP2USBP2+
USBP3USBP3+
USBP4USBP4+
USBP5USBP5+
USBP6USBP6+
USBP7USBP7+
USBRBIAS
DMI_RXN0 <8>
DMI_RXP0 <8>
DMI_TXN0 <8>
DMI_TXP0 <8>
DMI_RXN1 <8>
DMI_RXP1 <8>
DMI_TXN1 <8>
DMI_TXP1 <8>
CLK_PCIE_ICH# <15>
CLK_PCIE_ICH <15>
R95 24.9_0402_1%
1 2
USB_OC#4 <33>
USB_OC#5 <33>
USB_OC#0 <31>
USB_OC#1 <31>
USB_OC#2 <33>
USB_OC#3 <33>
R114
1 2
22.6_0402_1%
+3VS
R255
10K_0402_5%
1 2
2
+1.5VS
2
G
USB_OC#2
USBP0- <31>
USBP0+ <31>
USBP1- <31>
USBP1+ <31>
USBP2- <36>
USBP2+ <36>
USBP3- <36>
USBP3+ <36>
USBP4- <36>
USBP4+ <36>
USBP5- <36>
USBP5+ <36>
USBP6- <36>
USBP6+ <36>
USBP7- <36>
USBP7+ <36>
13
D
Q62
S
2N7002_SOT23
USB_OC#1
USB_OC#3
USB_OC#0
USB_OC#4
USB_OC#6
USB_OC#7
USB_OC#5
ISOLATE# <27>
Title
Size Document Number Rev
Custom
Date: Sheet
Compal Electronics, Inc.
EDX20 LA-2481
RP2
4 5
3 6
2 7
1 8
4.7K_1206_8P4R_5%
RP1
4 5
3 6
2 7
1 8
4.7K_1206_8P4R_5%
ICH6(3/4)
1
21 48Tuesday, February 22, 2005
+3VALW
0.5
of
R183
R184
1 2
1 2
10K_0402_5%
+3VS
S
10K_0402_5%
12
R158
G
2
2.2K_0402_5%
13
D
G
2
13
D
S
Q15
(PCI Express Wake Event)
ICH_SMLINK0
ICH_SMLINK1
+3VALW
12
R152
2.2K_0402_5%
SMBDATA
SMBCLK
EC_THRM#<32>
4
D D
ICH_SMBDATA<13,14,15,17,35>
ICH_SMBCLK<13,14,15,17,35>
C C
+3VALW
+3VS
B B
CLK_14M_ICH CLK_48M_ICH
12
R176
10_0402_5%
A A
@
1
C132
@
2
4.7P_0402_50V8C
5
+3VS
12
R164
2.2K_0402_5%
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
Place closely pin A27Place closely pin E10
12
1
2
12
R149
2.2K_0402_5%
ICH_SMBDATA
2N7002_SOT23
ICH_SMBCLK
R17910K_0402_5%
R22110K_0402_5%
R21510K_0402_5%
R1961K_0402_5%
PM_CLKRUN#
R15910K_0402_5%
SB_THRM#
R15510K_0402_5%
MCH_SYNC#
R13610K_0402_5%
USB2P0_SMI#
R18010K_0402_5% @
SIRQ
R14710K_0402_5%
R1451K_0402_5%
R103
10_0402_5%
@
C97
4.7P_0402_50V8C
@
Q16
2N7002_SOT23
LINKALERT#
ITP_DBRESET#
PM_BATLOW#
ICH_PCIE_W AKE#
WL_EN#
R148
33_0402_5%
ITP_DBRESET#<5>
PM_BMBUSY#<8>
M_SEN#<18,36>
PM_STP_PCI#<15>
PM_STP_CPU#<15>
WL_EN#<26>
IDERST_HD#<23>
EC_FLASH#<34>
PM_CLKRUN#<24,26,27,32,35>
EC_THRM# SB_THRM#
CLK_14M_ICH<15>
CLK_48M_ICH<15>
EC_SLP_S3#<32>
EC_SLP_S4#<32>
EC_SLP_S5#<32>
ICH_PWRGD<32,34>
PM_DPRSLPVR<45>
PM_BATLOW#<32>
EC_PBTNOUT#<32>
EC_RSMRST#<32>
Page 22
5
4
3
2
1
http://hobi-elektronika.net
Near PIN F27(C277),
P27(C278), AB27(C279)
+1.5VS
1
2
+
C84
C89
2
D D
+5VS
+3VS
1 2
+5VALW
1 2
21
D7
RB751V_SOD323
2
C142
1U_0603_10V4Z
1
+3VALW
21
D4
RB751V_SOD323
2
C114
1U_0603_10V4Z
1
ICH_V5REF_SUS
ICH_V5REF_RUN
2
C146
0.1U_0402_16V4Z
1
2
C109
0.1U_0402_16V4Z
1
2
1
R173
10_0603_5%
C C
R146
10_0603_5%
220U_D2_4VM
C118
0.1U_0402_16V4Z
+1.5VS
1
Near PIN AG5
+1.5VS
L35
BLM11A601S_0603
1 2
+1.5VS
B B
+3VALW +1.5VR
A A
1
2
U9 APL5301-15DC_3P
Vin2Vout
C106
0.1U_0402_16V4Z
C424
0.1U_0402_16V4Z
2
1
GND
1
ICH6_VCCPLL
1
C430
2
0.01U_0402_16V7K
Near PIN
AC27
3
+1.5VR
1
C112
0.1U_0402_16V4Z
2
Near PIN AG9
+3VS
C98
Near PIN
E26, E27
2
1
0.1U_0402_16V4Z
+3VALW
Near PIN A17
+1.5VS
Near PIN AE1
0.1U_0402_16V4Z
C191
C119
C91
0.1U_0402_16V4Z
2
1
2
1
C166
C152
2
1
0.1U_0402_16V4Z
2
C96
1
0.1U_0402_16V4Z
2
1
0.1U_0402_16V4Z
2
1
0.1U_0402_16V4Z
ICH6_VCCPLL
+3VS
+3VS
+3VALW
2
C120
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
U38E
AA22
VCC1_5[1]
AA23
VCC1_5[2]
AA24
VCC1_5[3]
AA25
VCC1_5[4]
AB25
VCC1_5[5]
AB26
VCC1_5[6]
AB27
VCC1_5[7]
F25
VCC1_5[8]
F26
VCC1_5[9]
F27
VCC1_5[10]
G22
VCC1_5[11]
G23
VCC1_5[12]
G24
VCC1_5[13]
G25
VCC1_5[14]
H21
VCC1_5[15]
H22
VCC1_5[16]
J21
VCC1_5[17]
J22
VCC1_5[18]
K21
VCC1_5[19]
K22
VCC1_5[20]
L21
VCC1_5[21]
L22
VCC1_5[22]
M21
VCC1_5[23]
M22
VCC1_5[24]
N21
VCC1_5[25]
N22
VCC1_5[26]
N23
VCC1_5[27]
N24
VCC1_5[28]
N25
VCC1_5[29]
P21
VCC1_5[30]
P25
VCC1_5[31]
P26
VCC1_5[32]
P27
VCC1_5[33]
R21
VCC1_5[34]
R22
VCC1_5[35]
T21
VCC1_5[36]
T22
VCC1_5[37]
U21
VCC1_5[38]
U22
VCC1_5[39]
V21
VCC1_5[40]
V22
VCC1_5[41]
W21
VCC1_5[42]
W22
VCC1_5[43]
Y21
VCC1_5[44]
Y22
VCC1_5[45]
AA6
VCC1_5[46]
AB4
VCC1_5[47]
AB5
VCC1_5[48]
AB6
VCC1_5[49]
AC4
VCC1_5[50]
AD4
VCC1_5[51]
AE4
VCC1_5[52]
AE5
VCC1_5[53]
AF5
VCC1_5[54]
AG5
VCC1_5[55]
AA7
VCC1_5[56]
AA8
VCC1_5[57]
AA9
VCC1_5[58]
AB8
VCC1_5[59]
AC8
VCC1_5[60]
AD8
VCC1_5[61]
AE8
VCC1_5[62]
AE9
VCC1_5[63]
AF9
VCC1_5[64]
AG9
VCC1_5[65]
AC27
VCCDMIPLL
E26
VCC3_3[1]
AE1
VCCSATAPLL
AG10
VCC3_3[22]
A13
VCCLAN3_3/VCC3_3[1]
F14
VCCLAN3_3/VCC3_3[2]
G13
VCCLAN3_3/VCC3_3[3]
G14
VCCLAN3_3/VCC3_3[4]
A11
VCCSUS3_3[1]
U4
VCCSUS3_3[2]
V1
VCCSUS3_3[3]
V7
VCCSUS3_3[4]
W2
VCCSUS3_3[5]
Y7
VCCSUS3_3[6]
A17
VCCSUS3_3[7]
B17
VCCSUS3_3[8]
C17
VCCSUS3_3[9]
F18
VCCSUS3_3[10]
G17
VCCSUS3_3[11]
G18
VCCSUS3_3[12]
ICH6_BGA609
PCIE
SATA
PCI/IDE RBP
VCCLAN1_5/VCC1_5[2]
VCCLAN1_5/VCC1_5[1]
VCC1_5[98]
VCC1_5[97]
VCC1_5[96]
VCC1_5[95]
VCC1_5[94]
VCC1_5[93]
VCC1_5[92]
VCC1_5[91]
VCC1_5[90]
VCC1_5[89]
VCC1_5[88]
VCC1_5[87]
VCC1_5[86]
COREIDE
VCC1_5[85]
VCC1_5[84]
VCC1_5[83]
VCC1_5[82]
VCC1_5[81]
VCC1_5[80]
VCC1_5[79]
VCC3_3[21]
VCC3_3[20]
VCC3_3[19]
VCC3_3[18]
VCC3_3[17]
VCC3_3[16]
VCC3_3[15]
VCC3_3[14]
VCC3_3[13]
VCC3_3[12]
VCC3_3[11]
VCC3_3[10]
VCC3_3[9]
VCC3_3[8]
VCC3_3[7]
VCC3_3[6]
VCC3_3[5]
VCC3_3[4]
PCIUSB
VCC3_3[3]
VCC3_3[2]
VCCSUS1_5[3]
VCCSUS1_5[2]
VCCSUS1_5[1]
VCC1_5[78]
VCC1_5[77]
VCC1_5[76]
VCC1_5[75]
VCC1_5[74]
VCC1_5[73]
VCC1_5[72]
VCC1_5[71]
VCC1_5[70]
VCC1_5[69]
USB CORE
VCC1_5[68]
VCC1_5[67]
VCC2_5[4]
VCC2_5[2]
V5REF[2]
V5REF[1]
V5REF_SUS
VCCUSBPLL
VCCSUS3_3[20]
VCCRTC
V_CPU_IO[3]
V_CPU_IO[2]
V_CPU_IO[1]
VCCSUS3_3[19]
VCCSUS3_3[18]
VCCSUS3_3[17]
VCCSUS3_3[16]
VCCSUS3_3[15]
VCCSUS3_3[14]
VCCSUS3_3[13]
F9
U17
U16
U14
U12
U11
T17
T11
P17
P11
M17
M11
L17
L16
L14
L12
L11
AA21
AA20
AA19
AA10
AG19
AG16
AG13
AD17
AC15
AA17
AA15
AA14
AA12
P1
M7
L7
L4
J7
H7
H1
E4
B1
A6
U7
R7
G19
G20
F20
E24
E23
E22
E21
E20
D27
D26
D25
D24
G8
AB18
P7
AA18
A8
F21
A25
A24
AB3
G11
G10
AG23
AD26
AB22
G16
G15
F16
F15
E16
D16
C16
+1.5VS
+1.5VR
C115
0.1U_0402_16V4Z
ICH_V5REF_RUN
ICH_V5REF_SUS
C121
C165
1
2
+1.5VS
1
2
2
1
0.1U_0402_16V4Z
2
1
0.1U_0402_16V4Z
+1.5VR
+1.5VR
+1.5VS
+3VALW
+RTCVCC
+1.5VS
+VCCP
C105
0.1U_0402_16V4Z
2
C130
1
0.1U_0402_16V4Z
2
C193
C194
1
0.1U_0402_16V4Z
2
1
C157
Near PIN U7
Near PIN AB18
Near PIN AG23
+3VS
+3VS
Near PIN
AG13, AG16
+3VS
2
1
0.1U_0402_16V4Z
Near PIN
A2-A6, D1-H1
1
2
C158
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+2.5VS
1
2
C117
0.1U_0402_16V4Z
C128
0.1U_0402_16V4Z
1 2
C140
1 2
0.1U_0402_16V4Z
Near PIN AG10
+1.5VR
+1.5VS
C124
0.1U_0402_16V4Z
1 2
C123
0.1U_0402_16V4Z
1 2
C134
0.1U_0402_16V4Z
1 2
C133
0.1U_0402_16V4Z
1 2
C107
0.1U_0402_16V4Z
1 2
C108
0.1U_0402_16V4Z
1 2
C145
0.1U_0402_16V4Z
1 2
C154
0.1U_0402_16V4Z
1 2
C100
0.1U_0402_16V4Z
1 2
C102
0.1U_0402_16V4Z
1 2
C99
0.01U_0402_16V7K
1 2
Near PIN A25
C144
0.01U_0402_16V7K
1 2
Near PIN AA19
+3VALW
C159
0.1U_0402_16V4Z
1 2
C122
0.1U_0402_16V4Z
1 2
C125
0.1U_0402_16V4Z
1 2
C103
0.1U_0402_16V4Z
1 2
Near PIN A24
W25
W24
W23
U25
U24
U23
U15
U13
R25
R24
R23
R17
R16
R15
R14
R13
R12
R11
N17
N16
N15
N14
N13
N12
N11
M27
M26
M23
M16
M15
M14
M13
M12
H27
H26
H23
G21
G12
E27
Y6
Y27
Y26
Y23
W7
W1
V4
V27
V26
V23
T7
T27
T26
T23
T16
T15
T14
T13
T12
T1
R4
P22
P16
P15
P14
P13
P12
N7
N1
M4
L25
L24
L23
L15
L13
K7
K27
K26
K23
K1
J4
J25
J24
J23
G9
G7
G1
U38D
VSS[172]
VSS[171]
VSS[170]
VSS[169]
VSS[168]
VSS[167]
VSS[166]
VSS[165]
VSS[164]
VSS[163]
VSS[162]
VSS[161]
VSS[160]
VSS[159]
VSS[158]
VSS[157]
VSS[156]
VSS[155]
VSS[154]
VSS[153]
VSS[152]
VSS[151]
VSS[150]
VSS[149]
VSS[148]
VSS[147]
VSS[146]
VSS[145]
VSS[144]
VSS[143]
VSS[142]
VSS[141]
VSS[140]
VSS[139]
VSS[138]
VSS[137]
VSS[136]
VSS[135]
VSS[134]
VSS[133]
VSS[132]
VSS[131]
VSS[130]
VSS[129]
VSS[128]
VSS[127]
VSS[126]
VSS[125]
VSS[124]
VSS[123]
VSS[122]
VSS[121]
VSS[120]
VSS[119]
VSS[118]
VSS[117]
VSS[116]
VSS[115]
VSS[114]
VSS[113]
VSS[112]
VSS[111]
VSS[110]
VSS[109]
VSS[108]
VSS[107]
VSS[106]
VSS[105]
VSS[104]
VSS[103]
VSS[102]
VSS[101]
VSS[100]
VSS[99]
VSS[98]
VSS[97]
VSS[96]
VSS[95]
VSS[94]
VSS[93]
VSS[92]
VSS[91]
VSS[90]
VSS[89]
VSS[88]
VSS[87]
ICH6_BGA609
+RTCVCC
1
2
C172
0.1U_0402_16V4Z
VSS[86]
VSS[85]
VSS[84]
VSS[83]
VSS[82]
VSS[81]
VSS[80]
VSS[79]
VSS[78]
VSS[77]
VSS[76]
VSS[75]
VSS[74]
VSS[73]
VSS[72]
VSS[71]
VSS[70]
VSS[69]
VSS[68]
VSS[67]
VSS[66]
VSS[65]
VSS[64]
VSS[63]
VSS[62]
VSS[61]
VSS[60]
VSS[59]
VSS[58]
VSS[57]
VSS[56]
VSS[55]
VSS[54]
VSS[53]
VSS[52]
VSS[51]
VSS[50]
VSS[49]
VSS[48]
VSS[47]
VSS[46]
VSS[45]
VSS[44]
VSS[43]
VSS[42]
VSS[41]
GROUND
VSS[40]
VSS[39]
VSS[38]
VSS[37]
VSS[36]
VSS[35]
VSS[34]
VSS[33]
VSS[32]
VSS[31]
VSS[30]
VSS[29]
VSS[28]
VSS[27]
VSS[26]
VSS[25]
VSS[24]
VSS[23]
VSS[22]
VSS[21]
VSS[20]
VSS[19]
VSS[18]
VSS[17]
VSS[16]
VSS[15]
VSS[14]
VSS[13]
VSS[12]
VSS[11]
VSS[10]
1
2
VSS[9]
VSS[8]
VSS[7]
VSS[6]
VSS[5]
VSS[4]
VSS[3]
VSS[2]
VSS[1]
C177
F4
F22
F19
F17
E25
E19
E18
E15
E14
D7
D22
D20
D18
D14
D13
D10
D1
C4
C22
C20
C18
C14
B25
B24
B23
B21
B19
B15
B13
AG7
AG3
AG22
AG20
AG17
AG14
AG12
AG1
AF7
AF3
AF26
AF12
AF10
AF1
AE7
AE6
AE25
AE21
AE2
AE12
AE11
AE10
AD6
AD24
AD2
AD18
AD15
AD10
AD1
AC6
AC3
AC26
AC24
AC23
AC22
AC12
AC10
AB9
AB7
AB2
AB19
AB10
AB1
AA4
AA16
AA13
AA11
A9
A7
A4
A26
A23
A21
A19
A15
A12
A1
0.1U_0402_16V4Z
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DIS CLOSE D T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Custom
Date: Sheet
Compal Electronics, Inc.
ICH6(4/4)
EDX20 LA-2481
1
0.5
of
22 48Tuesday, February 22, 2005
Page 23
A
B
C
D
http://hobi-elektronika.net
+3VS
C173
1 1
PLT_RST#<8,16,17,19,21,35>
IDERST_HD#<21>
2 2
12
10
A
9
B
R239
1 2
0.1U_0402_16V4Z
14
U12C
P
G
7
PIDERST#
8
O
74VHC08MTC_TSSOP14
0_0402_5%@
R410 4.7K_0402_5%
+3VS
R411 8.2K_0402_5%
R412
12
5.6K_0402_5%@
12
C505 33P_0402_50V8J
1 2
1 2
PDDREQ
PDIORDY
IDEIRQ
PDD[0..15]<20>
PIDERST#
R408 22_0402_5%
1 2
R409
1 2
PDIOR#<20>
PDA0<20>
PDCS3#<20> PDA2 <20>
PDA1<20>
+3VS
PDD7
10K_0402_5%@
PDD5
PDD6
PDD3
PDD15
PDD9
PDD0
PDD4
PDD2
PDD1
PDIOR# PDIORDY
PDA0
PDA1
PDD[0..15]
JP21
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
SUYIN_127212FA040G200ZX
PDD10
PDD11
PDD12
PDDREQ
PDIOW#
PDD8
PDDACK#
PDD13
PDCS1#
PDD14
IDEIRQ
PDA2PDCS3#
PCSEL
1 2
R413 470_0402_5%
HDD_LED#
HDD_LED# <36>
PDDREQ <20>
PDIOW# <20>
PDDACK# <20>
PDCS1# <20>
PDIORDY <20>
IDEIRQ <20>
Placea caps. near HDD
CONN.
+3VS
1
2
1000P_0402_50V7K
3 3
4 4
Layout Note: +VPHDD trace
width 60 mil
500mA
1
C506
C491
10U_0805_10V4Z
2
1
C507
0.1U_0402_16V4Z
2
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
A
B
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
ICH4-M PIDE&ICH Pull-up
Size Document Number Rev
EDX20 LA-2481
Date: Sheet
D
of
23 48Tuesday, Fe b r u a r y 22, 2005
0.5
Page 24
5
100P_0402_25V8K
1
C553
2
2200P_0402_25V7K
Place C877, C878
+S1_VCC
1
C551
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C537
2
Close to U9 Bottom Side
D D
C C
PCI_AD[0..31]<19,26,27>
CLK_PCI_PCM
IDSEL:PCI_AD20
+3VS
R454
10K_0402_5%
1 2
B B
A A
10P_0402_50V8J
SD_CLKIN<15>
R452 0_0402_5%
5
12
1
2
PCI_PIRQA#<19>
PCI_PIRQB#<19>
C556
1 2
PCI_AD[0..31 ]
R450
10_0402_5%
@
C550
15P_0402_50V8J
@
SIRQ<21,32,35>
PM_CLKRUN#<21,26,27,32,35>
SD_OC#<25>
+SD3_VCC
12
PCI_C/BE#3<19,26,27>
PCI_C/BE#2<19,26,27>
PCI_C/BE#1<19,26,27>
PCI_C/BE#0<19,26,27>
PCI_FRAME#<19,26,27>
PCI_IRDY#<19,26,27>
PCI_TRDY#<19,26,27>
PCI_DEVSEL#<19,26,27>
PCI_STOP#<19,26,27>
PCI_PERR#<19,26,27>
PCI_SERR#<19,26,27>
PCI_REQ#2<19>
PCI_GNT#2<19>
CLK_PCI_PCM<15>
PCM_PME#<34>
PCI_AD20
PCI_PIRQA#
PCI_PIRQB#
R462 0_0402_5%
R460 10K_0402_5%@
R459 0_0402_5%
R458 0_0402_5%
R457 10K_0402_5%@
R456 0_0402_5%
R461 0_0402_5%
12
C536 1U_0603_10V4Z
MMC_DET#<25>
SD_CMD<25>
SD_PWREN#<25>
4
1
C538
2
PCIRST#<19,25,26,27,32>
PCI_PAR<19,26,27>
SD_CLK<25>
SD_WP<25>
PCIRST#
1 2
R448 100_0402_5%
PCIRST#
4
VCCD0#<25>
VCCD1#<25>
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
CLK_PCI_PCM
PCM_ID
12
12
12
12
12
12
12
3
+S1_VCC
VPPD0<25>
VPPD1<25>
http://hobi-elektronika.net
C8
G13
A7
N12
L11
N10
L10
N11
M11
M10
C2
C1
D4
D2
D1
E4
E3
E2
F2
F1
G2
G3
H3
H4
J1
J2
N2
M3
N3
K4
M4
K5
L5
M5
K6
M6
N6
M7
N7
L7
K7
N8
E1
J3
N1
N5
G4
J4
K1
K3
L1
L2
L3
M1
M2
A1
B1
H1
L8
F4
K8
N9
K9
J9
E7
G5
E8
H7
M12
N13
M13
U21
VPPD1
VCCD0#
VCCD1#
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
CBE3#
CBE2#
CBE1#
CBE0#
PCIRST#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
PAR
PCIREQ#
PCIGNT#
PCICLK
RIOUT#_PME#
SUSPEND#
IDSEL
MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6
GRST#
MFUNC7
VCC_SD
GND_SD
SDCD#
MSINS#
MSCLKE9SDCLKF6SDCMDE5SDWPF8SDCLKIH5MSBSH8MSPWREN#J8SDPWREN33#G7MSDATA3F9MSDATA2G8MSDATA1H9MSDATA0
VPPD0
VCCA1
VCCA2
CARDBUS
SD
B4
VCC10
VCC9
+3VS
G1
K2
N4
F3
L6
L9
H11
D12
VCC2
VCC3
VCC4
VCC1
VCC5
VCC6
VCC7
VCC8
CAD31/D10
CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6
CAD19/A25
CAD18/A7
CAD17/A24
CAD16/A17
CAD15/IOWR#
CAD14/A9
CAD13/IORD#
CAD12/A11
CAD11/OE#
CAD10/CE2#
CAD9/A10
CAD8/D15
CAD7/D7
CAD6/D13
CAD5/D6
CAD4/D12
CAD3/D5
CAD2/D11
CAD1/D4
CAD0/D3
CCBE3#/REG#
CCBE2#/A12
CCBE1#/A8
CCBE0#/CE1#
CRST#/RESET
CFRAME#/A23
CIRDY#/A15
CTRDY#/A22
CDEVSEL#/A21
CSTOP#/A20
CPERR#/A14
CSERR#/WAIT#
CPAR/A13
CREQ#/INPACK#
CGNT#/WE#
CSTSCHG/BVD1_STSHG#
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
CCLK/A16
CCLKRUN#/WP_IOIS16#
CBLOCK#/A19
CINT#/READY_IREQ#
SPKROUT
CAUDIO/BVD2_SPKR#
CCD2#/CD2#
CCD1#/CD1#
CVS2/VS2#
CVS1/VS1#
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
CRSV1/D14
CRSV2/A18
CRSV3/D2
RSVD4
RSVD3
RSVD2
RSVD1
SDDAT0
SDDAT1
SDDAT2
SDDAT3
CB712_ LFBGA_169P
G9
3
100P_0402_25V8K
1
C559
2
2200P_0402_25V7K
Place C871, C872
Close to C694
S1_D10
B2
S1_D9
C3
S1_D1
B3
S1_D8
A3
S1_D0
C4
S1_A0
A6
S1_A1
D7
S1_A2
C7
S1_A3
A8
S1_A4
D8
S1_A5
A9
S1_A6
C9
S1_A25
A10
S1_A7
B10
S1_A24
D10
S1_A17
E12
S1_IOWR#
F10
S1_A9
E13
S1_IORD#
F13
S1_A11
F11
S1_OE#
G10
S1_CE2#
G11
S1_A10
G12
S1_D15
H12
S1_D7
H10
S1_D13
J11
S1_D6
J12
S1_D12
K13
S1_D5
J10
S1_D11
K10
S1_D4
K12
S1_D3
L13
S1_REG#
B7
S1_A12
A11
S1_A8
E11
S1_CE1#
H13
S1_RST
B9
B11
S1_A15
A12
S1_A22
A13
S1_A21
B13
S1_A20
C12
S1_A14
C13
S1_WAIT#
A5
S1_A13
D13
S1_INPACK#
B8
S1_WE#
C11
A16_CLK
B12
S1_BVD1
C5
S1_WP
D5
S1_A19
D11
S1_RDY#
D6
PCM_SPK#
M9
S1_BVD2
B5
S1_CD2#
A4
S1_CD1#
L12
S1_VS2
D9
S1_VS1
C6
D3
H2
L4
M8
K11
F12
C10
B6
J13
E10
A2
H6
J7
J6
J5
E6
F7
F5
G6
S1_D14
S1_A18
S1_D2
+3VS +3VS
0.1U_0402_16V4Z
1
1
C558
2
C547
2
0.1U_0402_16V4Z
S1_IOWR# <25>
S1_IORD# <25>
S1_REG# <25>
S1_WAIT# <25>
S1_INPACK# <25>
S1_WE# <25>
S1_BVD1 <25>
S1_WP <25>
S1_RDY# <25>
PCM_SPK# <29>
S1_BVD2 <25>
S1_VS2 <25>
S1_VS1 <25>
SD_DAT0 <25>
SD_DAT1 <25>
SD_DAT2 <25>
SD_DAT3 <25>
1
C543
2
S1_A[0..25]
R451
47K_0402_5%
R442
10_0402_5%
10P_0402_50V8J
2
0.1U_0402_16V4Z
S1_D[0..15]
47K_0402_5%
12
47K_0402_5%
12
2
0.1U_0402_16V4Z
1
C544
2
12
R447
12
R433
C545
1
C549
2
0.1U_0402_16V4Z
+S1_VCC
12
+S1_VCC
12
C540 10P_0402_50V8J@
1
1
2
2
S1_A[0..25] <25>
S1_D[0..15] <25>
1
0.1U_0402_16V4Z
1
C548
2
1
C552
2
EDX20 LA-2481
1
C557
2
0.1U_0402_16V4Z
Reserved layout
for debug used.
R449
47K_0402_5%
S1_OE# <25>
S1_CE2# <25>
Reserved layout
for debug used.
R440
47K_0402_5%@
S1_CE1# <25>
S1_A23
1 2
S1_RST <25>
S1_A16
S1_CD2# <25>
S1_CD1# <25>
C554
10P_0402_50V8J
Close to CB712
CD1# and CD2#
Title
PCMCIA Controller ENE CB1410 & CB712
Size Document Number Rev
Custom
Date: Sheet
0.1U_0402_16V4Z
1
C560
2
0.1U_0402_16V4Z
1
1
2
C546
0.1U_0402_16V4Z
of
24 48Tuesday, February 22, 2005
1
C539
2
0.5
Page 25
http://hobi-elektronika.net
CARDBUS SOCKET
S1_A[0..25]<24>
S1_D[0..15]<24>
S1_CE1#<24>
S1_OE#<24>
S1_WE#<24>
S1_RDY#<24>
+S1_VCC
+S1_VPP
S1_WP<24>
S1_A[0..25]
S1_D[0..15]
S1_D3
S1_D4
S1_D5
S1_D6
S1_D7
S1_CE1#
S1_A10
S1_OE#
S1_A11
S1_A9
S1_A8
S1_A13
S1_A14
S1_WE#
S1_RDY#
S1_A16
S1_A15
S1_A12
S1_A7
S1_A6
S1_A5
S1_A4
S1_A3
S1_A2
S1_A1
S1_A0
S1_D0
S1_D1
S1_D2
S1_WP S1_CD2#
JP26
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
FCI_62597-00B_RB
35
35
36
36
37
37
38
38
39
39
40
40
41
41
42
42
43
43
44
44
45
45
46
46
47
47
48
48
49
49
50
50
51
51
52
52
53
53
54
54
55
55
56
56
57
57
58
58
59
59
60
60
61
61
62
62
63
63
64
64
65
65
66
66
67
67
68
68
S1_CD1#
S1_D11
S1_D12
S1_D13
S1_D14
S1_D15
S1_CE2#
S1_VS1
S1_IORD#
S1_IOWR#
S1_A17
S1_A18
S1_A19
S1_A20
S1_A21
S1_A22
S1_A23
S1_A24
S1_A25
S1_VS2
S1_RST
S1_WAIT#
S1_INPACK#
S1_REG#
S1_BVD2
S1_BVD1
S1_D8
S1_D9
S1_D10
S1_CD1# <24>
S1_CE2# <24>
S1_VS1 <24>
S1_IORD# <24>
S1_IOWR# <24>
+S1_VCC
+S1_VPP
S1_VS2 <24>
S1_RST <24>
S1_WAIT# <24>
S1_INPACK# <24>
S1_REG# <24>
S1_BVD2 <24>
S1_BVD1 <24>
S1_CD2# <24>
Close to chip
SD_CLK<24>
1 2
R463 22_0402_5%
10P_0402_50V8J
Close to SD socket
C371
1
2
SD_CLK_R
SD_DAT2<24>
SD_DAT3<24>
SD_CMD<24>
SD_DAT0<24>
SD_DAT1<24>
MMC_DET#<24>
SD_WP<24>
+SD3_VCC
12
12
R336
R340
43K_0402_5%
12
R354
43K_0402_5%
43K_0402_5%
12
12
R333
R367
43K_0402_5%
SD SOCKET
43K_0402_5%
JP11
9
SD5
1
SD1
2
SD2
3
Vss1
4
Vdd
5
SDCLK
6
Vss2
7
SD3
8
SD4
MMC_DET#10Wr_Pt_Vss
MOLEX_67600-0001
Wr_Pt
Vss4
Vss3
14
13
12
11
PCMCIA Power Controller
+5VS
U19
9
+5VS
+3VS
12V
5
5V
6
5V
3
3.3V
4
3.3V
GND
7
1 2
C3330.1U_0402_16V4Z
C3260.1U_0402_16V4Z
C3304.7U_0805_10V4Z
C3240.1U_0402_16V4Z
C3204.7U_0805_10V4Z
R303
10K_0402_5%
PCIRST#
PCIRST#<19,24,26,27,32>
1 2
R304 0_0402_5%@
VCC
VCC
VCC
VPP
VCCD0
VCCD1
VPPD0
VPPD1
OC
SHDN
CP-2211_SSOP16
16
13
12
11
10
1
2
15
14
8
40mil
20mil
+S1_VCC
+S1_VPP
VCCD0# <24>
VCCD1# <24>
VPPD0 <24>
VPPD1 <24>
1 2
C325 0.1U_0402_16V4Z
C323 0.1U_0402_16V4Z
1 2
C322 1U_0402_6.3V4Z
1 2
C328 0.01U_0402_25V4Z
1 2
C332 1U_0603_10V4Z
<BOM Structure>
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+3VS
2
C379
R300
43K_0402_5%
1 2
SD_PWREN#<24>
0.1U_0402_16V4Z
1
1
2
3
4
U18
GND
IN
IN
EN#
TPS2041ADR_SO8
OUT
OUT
OUT
OC#
8
7
6
5
Close to SD socket
2
C363
0.1U_0402_16V4Z
1
+3VS
R302
10K_0402_5%
1 2
SD_OC# <24>
Compal Electronics, Inc.
Title
PCMCIA/SD SOCKET
Size Document Number Rev
Custom
EDX20 LA-2481
Date: Sheet
+SD3_VCC
C358
4.7U_0805_10V4Z
0.5
of
25 48Tuesday, February 22, 2005
Page 26
-+5VS limited to 100mA
-+3.3VAUX--Normal:
375mA, D3: 200mA,
-+3VS_MINIPCI: 500mA
for wireless LAN
http://hobi-elektronika.net
WL_EN#
WL_EN#<21>
1 2
R521 1K_0402_5%
Q42
31
MMBT3904_SOT23
2
1 2
R519 100_0402_5%
PCI_AD18_MINIPCI_AD18
CLK_PCI_MINI
12
R348
22_0402_5%
@
1
C374
22P_0402_50V8J
2
@
PCI_AD[0..31]
TIP
W=20mils
LAN RESERVED
PCI_PIRQG#
CLK_PCI_MINI
PCI_AD31
PCI_AD29
PCI_AD27
PCI_AD25
PCI_AD23
PCI_AD21
PCI_AD19
PCI_AD17
PCI_AD14
PCI_AD12
PCI_AD10
PCI_AD8
PCI_AD7
PCI_AD5
PCI_AD3
PCI_AD1
W=20mils
WLAN_ACT1<32>
D8
PCI_PIRQG#<19>
CLK_PCI_MINI<15>
WLAN_ACTIVE<36>
PM_CLKRUN#<21,24,27,32,35>
PCI_SERR#<19,24,27>
+5VS
PCI_REQ#1<19>
PCI_C/BE#3<19,24,27>
PCI_C/BE#2<19,24,27>
PCI_IRDY#<19,24,27>
PCI_PERR#<19,24,27>
PCI_C/BE#1<19,24,27>
21
RB751V_SOD323
+5VS
RFOFF#<32>
+3VS
W=60mils
JP29
112
KEY KEY
334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
535354
555556
575758
595960
616162
636364
656566
676768
696970
717172
737374
757576
777778
797980
818182
838384
858586
878788
898990
919192
939394
959596
979798
9999100
101
101
103
103
105
105
107
107
109
109
111
111
113
113
115
115
117
117
119
119
121
121
123
123
125
125
AMP_1318916-1
PCI_AD[0..31] <19,24,27>
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
102
104
104
106
106
108
108
110
110
112
112
114
114
116
116
118
118
120
120
122
122
124
124
126
126
PROPRIETARY NOTE
RING
LAN RESERVED
PCI_PIRQH#
W=20mils
W=20mils
WLAN_ACT2 <32>
W=20mils
PCIRST#
PCI_AD30
PCI_AD28
PCI_AD26
PCI_AD24
PCI_AD18_MINI
PCI_AD22
PCI_AD20
PCI_AD18
PCI_AD16
PCI_AD15
PCI_AD13
PCI_AD11
PCI_AD9
PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0
1
C351
0.1U_0402_16V4Z
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PCI_PIRQH# <19>
PCIRST# <19,24,25,27,32>
PCI_GNT#1 <19>
WLANPME# <34>
BT_ACTIVE <36>
PCI_PAR <19,24,27>
PCI_FRAME# <19,24,27>
PCI_TRDY# <19,24,27>
PCI_STOP# <19,24,27>
PCI_DEVSEL# <19,24,27>
PCI_C/BE#0 <19,24,27>
+5VS
W=60mils
+3V_MINI
+3V_MINI
1 2
R528 0_0603_5%
+3VS
IDSEL : AD18
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C368
2
+3V_LAN
1
C369
2
+3V_MINI
1000P_0402_50V7K@
0.1U_0402_16V4Z
1
C367
2
0.1U_0402_16V4Z
C344
1
C370
2
1
2
1
2
0.1U_0402_16V4Z
1
C373
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C349
C350
2
0.1U_0402_16V4Z
1
C372
2
0.1U_0402_16V4Z
1
C352
2
0.1U_0402_16V4Z
1
@
2
1
C348
2
+5VS
C346
10U_1206_10V4Z
+3VS
1
C347
10U_1206_6.3V7K
2
Compal Electronics, Inc.
Title
MiniPCI TYPEIII Slot
Size Document Number Rev
EDX20 LA-2481
Date: Sheet of
26 48Tuesday, February 22, 2005
0.5
Page 27
5
4
3
2
1
http://hobi-elektronika.net
LAN RTL8110SB(L)
8
7
NC
6
NC
5
+3V_LAN
C240
0.1U_0402_16V4Z
+3V_LAN
1
C500
0.1U_0402_16V4Z
2
LAN_EN#<32>
CTRL25
Icmax = 2A
22U_1206_16V4Z_V1
40mil
0.1U_0402_16V4Z
1
1
C503
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C504
2
2
+3VALW
12
12/23
R532
10K_0402_5%
+3V_LAN
60mil
1
2SB1188_SC62
Q39
60mil
2 3
1
2
1
C472
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C493
2
1
C471
0.1U_0402_16V4Z
2
1
2
0.1U_0402_16V4Z
C470
C502
1.2V for RTL8110SB(L)
C473
0.1U_0402_16V4Z
R527
10K_0402_5%
LAN_EN#
+2.5V_LAN
0.1U_0402_16V4Z
1
C489
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C485
C481
2
2
G
1
2
+3V_LAN +3VALW
+12VALW
12
13
D
Q64
S
2N7002_SOT23@
CTRL18
Icmax = 2A
22U_1206_16V4Z_V1
1
C207
C478
0.1U_0402_16V4Z
2
40mil
1
1
C186
0.1U_0402_16V4Z
2
2
R404
Q63
AO3402_SOT23@
S
G
2
1
2
0.01U_0402_16V7K
+3V_LAN
1
2 3
1
C462
2
+1.2V_LAN
12
D
13
C575
40mil
2SB1188_SC62
Q38
40mil
+1.2V_LAN
1
C465
0.1U_0402_16V4Z
2
+3VS
1
2
3
4
1
C480
27P_0402_50V8J
2
+2.5V_LAN
U42
CS
VCC
SK
DI
DO
GND
AT93C46-10SI-2.7_SO8
12
R212
10_0402_5%@
1
C208
18P_0402_50V8K@
2
PCI_AD17
CLK_PCI_LOM<15>
PM_CLKRUN#<21,24,26,32,35>
PCI_AD[0..31]
PCI_C/BE#0<19,24,26>
PCI_C/BE#1<19,24,26>
PCI_C/BE#2<19,24,26>
PCI_C/BE#3<19,24,26>
PCI_PAR<19,24,26>
PCI_FRAME#<19,24,26>
PCI_IRDY#<19,24,26>
PCI_TRDY#<19,24,26>
PCI_DEVSEL#<19,24,26>
PCI_STOP#<19,24,26>
PCI_PERR#<19,24,26>
PCI_SERR#<19,24,26>
PCI_REQ#3<19>
PCI_GNT#3<19>
PCI_PIRQF#<19>
LAN_PME#<34>
PCIRST#<19,24,25,26,32>
1 2
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
LAN_IDSEL
R244
100_0402_1%
CLK_PCI_LOM
PM_CLKRUN#
U39
104
AD0
103
AD1
102
AD2
98
AD3
97
AD4
96
AD5
95
AD6
93
AD7
90
AD8
89
AD9
87
AD10
86
AD11
85
AD12
83
AD13
82
AD14
79
AD15
59
AD16
58
AD17
57
AD18
55
AD19
53
AD20
50
AD21
49
AD22
47
AD23
43
AD24
42
AD25
40
AD26
39
AD27
37
AD28
36
AD29
34
AD30
33
AD31
92
C/BE#0
77
C/BE#1
60
C/BE#2
44
C/BE#3
46
IDSEL
76
PAR
61
FRAME#
63
IRDY#
67
TRDY#
68
DEVSEL#
69
STOP#
70
PERR#
75
SERR#
30
REQ#
29
GNT#
25
INTA#
31
PME#
27
RST#
28
CLK
65
CLKRUN#
4
GND/VSS
17
GND/VSS
128
GND/VSS
21
GND/VSSPST
38
GND/VSSPST
51
GND/VSSPST
66
GND/VSSPST
81
GND/VSSPST
91
GND/VSSPST
101
GND/VSSPST
119
GND/VSSPST
35
GND
52
GND
80
GND
100
GND
RTL8110SBL_LQFP128
EEDO
AUX/EEDI
EESK
EECS
LED0
LED1
LED2
NC/LED3
TXD+/MDI0+
TXD-/MDI0-
RXIN+/MDI1+
RXIN-/MDI1-
NC/MDI2+
NC/MDI2NC/MDI3+
NC/MDI3-
LWAKE
ISOLATE#
RTSET
NC/SMBCLK
NC/SMBDATA
NC/M66EN
NC/AVDDH
AVDDH
PCI I/F
NC/HSDAC+
NC/HG
NC/LG2
NC/VSS
NC/VSS
NC/GND
NC/GND
NC/GND
NC/GND
NC/GND
LAN I/F
NC/GND
CTRL25
CTRL12
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
AVDDL
AVDDL
AVDDL
AVDDL
VDD12
VDD12
VDD12
VDD12
VDD12
NC/VDD12
NC/VDD12
NC/VDD12
NC/VDD12
NC/VDD12
Power
0.1U_0402_16V4Z
+3V_LAN
+LAN_AVDDL
0.1U_0402_16V4Z
1
2
R254
3.6K_0402_5%
1 2
LAN_ACT# <28>
LAN_LINK100# <28>
LAN_LINK10# <28>
LAN_MIDI0+ <28>
LAN_MIDI0- <28>
LAN_MIDI1+ <28>
LAN_MIDI1- <28>
LAN_MIDI2+ <28>
LAN_MIDI2- <28>
LAN_MIDI3+ <28>
LAN_MIDI3- <28>
R211 1K_0402_5%
R210 15K_0402_5%
R219 2.49K_0402_1%
R525 2.49K_0402_1%@
+3V_LAN
1
C476
2
+1.2V_LAN
+3V_LAN
C226
0.1U_0402_16V4Z
+3V_LAN
ISOLATE# <21>
1 2
1 2
1 2
1 2
LAN_X1 LAN_X2
1
C482
27P_0402_50V8J
2
40mil
C475
0.1U_0402_16V4Z
LAN_EEDO
108
LAN_EEDI
109
LAN_EECLK
111
LAN_EECS
106
LAN_ACT#
117
LAN_LINK100#
115
LAN_LINK10#
114
113
LAN_MDI0+
1
LAN_MDI0-
2
LAN_MDI1+
5
LAN_MDI1-
6
LAN_MDI2+
14
LAN_MDI2-
15
LAN_MDI3+
18
LAN_MDI3-
19
LAN_X1
121
X1
LAN_X2
122
X2
105
10mil
23
127
72
10mil
74
88
10
120
11
123
124
9
13
22
48
62
73
112
118
CTRL25
8
CTRL18
125
26
41
56
71
84
94
107
3
7
20
16
126
32
54
78
99
24
45
64
110
116
12
20mil
NC
1
C182
2
D D
C C
PCI_AD[0..31]<19,24,26>
CLK_PCI_LOM
IDSEL: AD17
B B
A A
1
2
Y4
25MHZ_20P
C474
LAN_EECS
LAN_EECLK
LAN_EEDI
LAN_EEDO
12
1
0.1U_0402_16V4Z
2
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size D ocum ent Number Rev
Date: Sheet
Compal Electronics, Inc.
LAN CONTROLLER
EDX20 LA-2481
27 48Tuesday, February 22, 2005
1
0.5
of
Page 28
5
4
3
2
1
Close to Chip side
C2030.01U_0402_16V7K
12
C2040.01U_0402_16V7K
D D
C C
B B
12
C2050.01U_0402_16V7K
12
C2060.01U_0402_16V7K
12
R203 49.9_0402_1%
12
R204 49.9_0402_1%
12
R205 49.9_0402_1%
12
R206 49.9_0402_1%
12
R207 49.9_0402_1%
12
R208 49.9_0402_1%
12
R209 49.9_0402_1%
12
R202 49.9_0402_1%
12
LAN_MDI0+
LAN_MDI0LAN_MDI1+
LAN_MDI1LAN_MDI2+
LAN_MDI2LAN_MDI3+
LAN_MDI3-
SW_LAN_TX+
SW_LAN_TX-
SW_LAN_RX+
SW_LAN_TX2+
SW_LAN_TX2-
SW_LAN_TX3+
SW_LAN_TX3-
DOCKEN
1: TO DOCK
0: TO RJ45
C385 0.01U_0402_16V7K
C387 0.01U_0402_16V7K
C389 0.01U_0402_16V7K
C396 0.01U_0402_16V7K
1 2
1 2
1 2
1 2
+3V_LAN
LAN_MIDI0-<27>
LAN_MIDI0+<27>
LAN_MIDI1-<27>
LAN_MIDI1+<27>
LAN_MIDI2-<27>
LAN_MIDI2+<27>
LAN_MIDI3-<27>
LAN_MIDI3+<27>
DOCKEN<32>
Layout Notice : Place bead as
close PI3L500 as possible
+2.5V_LAN
12
R353
0_0603_5%
T19
1
2
3
4
5
7
8
9
10
11
12
0.5u_24HST1041A-2
L13
BLM11A601S_0603@
0.047U_0402_16V7K
LAN_MDI0LAN_MDI0+
LAN_MDI1LAN_MDI1+
LAN_MDI2LAN_MDI2+
LAN_MDI3LAN_MDI3+
DOCKEN
TCT1
MCT1
TD1+
MX1+
TD1-
MX1-
TCT2
MCT2
TD2+
MX2+
TD2-6MX2TCT3
MCT3
TD3+
MX3+
TD3-
MX3-
TCT4
MCT4
TD4+
MX4+
TD4-
MX4-
R256
1 2
0_0805_5%
1 2
24
23
22
21
20
19
18
17
16
15
14
13
C499
L14
1 2
L15
1 2
L17
1 2
L18
1 2
L20
1 2
L21
1 2
L23
1 2
L24
1 2
RJ45_MDI0+
RJ45_MDI0-
RJ45_MDI1+
RJ45_MDI1-SW_LAN_RX-
RJ45_MDI2+
RJ45_MDI2-
RJ45_MDI3+
RJ45_MDI3-
LAN_SW_VCC
1
0.1U_0603_16V7K
2
0_0603_5%
0_0603_5%
0_0603_5%
0_0603_5%
0_0603_5%
0_0603_5%
0_0603_5%
0_0603_5%
LAN_ACT#<27>
LAN_LINK10#<27>
LAN_LINK100#<27>
1 2
R368 75_0402_1%
1 2
R373 75_0402_1%
1 2
R378 75_0402_1%
1 2
R379 75_0402_1%
1
C249
2
LAN_MDI0-R
LAN_MDI0+R
LAN_MDI1-R
LAN_MDI1+R
LAN_MDI2-R
LAN_MDI2+R
LAN_MDI3-R
LAN_MDI3+R
1000P_1206_2KV7K
C384
56
U13
2
A0
3
A1
7
A2
8
A3
11
A4
12
A5
14
A6
15
A7
17
SEL
19
LED0
20
LED1
54
LED2
5
NC
GND01GND16GND29GND313GND416GND521GND624GND728GND833GND939GND1044GND1149GND1253GND13
2
1
0B1
VDD04VDD110VDD218VDD327VDD438VDD550VDD6
1B1
2B1
3B1
4B1
5B1
6B1
7B1
0LED1
1LED1
2LED1
0B2
1B2
2B2
3B2
4B2
5B2
6B2
7B2
0LED2
1LED2
2LED2
55
RJ45_MDI3RJ45_MDI3+
RJ45_MDI1RJ45_MDI2RJ45_MDI2+
RJ45_MDI1+
RJ45_MDI0RJ45_MDI0+
LAN ANALO G
SWITCH
48
47
43
42
37
36
32
31
22
23
52
46
45
41
40
35
34
30
29
25
26
51
PI3L500E_TQFN56
FROM NIC
SW_LAN_TXSW_LAN_TX+
SW_LAN_RXSW_LAN_RX+
SW_LAN_TX2SW_LAN_TX2+
SW_LAN_TX3SW_LAN_TX3+
DOCK_LAN_TXDOCK_LAN_TX+
DOCK_LAN_RXDOCK_LAN_RX+
DOCK_LAN_TX2DOCK_LAN_TX2+
DOCK_LAN_TX3DOCK_LAN_TX3+
DOCK_LAN_ACT#
DOCK_LAN_LINK100#
TO
RJ45
DOCK_LAN_TX- <36>
DOCK_LAN_TX+ <36>
DOCK_LAN_RX- <36>
DOCK_LAN_RX+ <36>
DOCK_LAN_TX2- <36>
DOCK_LAN_TX2+ <36>
DOCK_LAN_TX3- <36>
DOCK_LAN_TX3+ <36>
DOCK_LAN_ACT# <36>
DOCK_LAN_LINK100# <36>
JP15
9
SHLD1
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
10
SHLD2
ALLTOP_C10068-10804
TO
DOCK
http://hobi-elektronika.net
A A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
LAN CONTROLLER
EDX20 LA-2481
28 48Tues d a y, F e b r u a r y 22, 2005
1
0.5
of
Page 29
5
4
3
2
1
http://hobi-elektronika.net
+5VALW VDDA
w=40mil
1
1
D D
BEEP#<32>
PCM_SPK#<24>
ICH_SPKR<21>
R199 2K_0402_5%
R200 2K_0402_5%
R182
2K_0402_5%
12
12
1 2
12
C147
1U_0603_10V4Z
1 2
C167 1U_0603_10V4Z
1 2
C168 1U_0603_10V4Z
MONO_IN
VDDA
12
R169
100K_0402_5%
12
D6
1SS355_SOD323
1
C138
0.1U_0402_16V4Z
2
4.7U_0805_10V4Z
SUSP#<32,37,38>
C422
Iin= 80mA
C421
0.1U_0402_16V4Z
2
2
Iin= 35mA
VDDA VDDC +3VS
U33
1
VIN
BYPASS
3
EN
TPS793475DBV_SOT23-5
w=30mil
1
1
C464
0.1U_0402_16V4Z
C C
From Dock ing MI C J ac k
DOCK_MIC<36>
For Internal Speaker
INT_SPK_L<30>
INT_SPK_R<30>
INT_MIC3<30>
INT_MIC1<36>
MONO_IN
B B
R167
51K_0402_5%
4.7K_0402_5%
12
12
1
C463
R168
2700P_0603_50V7K
2
1 2
C129
0.022U_0402_25V4Z
AC97_RST#<20>
AC97_SYNC<20>
AC97_SDOUT<20>
VDDA
HP_PLUG#<30,36>
C450
0.1U_0402_16V4Z
2
C469 0.1U_0402_16V4Z
C440
1 2
R395 4.7K_0402_5%
VDDC
1 2
0.22U_0603_10V7K
1
C466
10U_0805_10V4Z
2
2
12
1 2
R393 4.7K_0402_5%
38
U37
AVDD125AVDD2
14
AUX_L
15
AUX_R
16
FP_MIC_L
17
FP_MIC_R
23
LINE_IN/SUR_L
24
LINE_IN/SUR_R
18
CD_L
20
CD_R
19
CD_GND
21
MIC1/CTR
22
MIC2/LFE
13
PHONE
12
PC_BEEP
11
RESET#
10
SYNC
5
SDATA_OUT
46
CID1#
47
EAPD/SPDIF_IN
48
SPDIF/ADAT
4
DVSS1
7
DVSS2
STAC9758T-CB!_TQFP48
9
DVDD11DVDD2
FRONT_L
FRONT_R
MONO
REAR_L
REAR_R
BIT_CLK
SDATA_IN
XTL_IN
XTL_OUT
AFILT1
AFILT2
VREFOUT
VREF
CAP2
GPIO0
GPIO1
GPIO2
GPIO3
CENTER
LFE
AVSS1
AVSS2
AVSS3
1
C453
0.1U_0402_16V4Z
2
35
36
37
39
41
6
8
2
XTL_OUT
3
29
30
28
27
32
31
R150 0_0402_5%
33
34
R156 0_0402_5%
45
43
44
26
42
40
0.1U_0402_16V4Z
1 2
R403 33_0402_5%
1 2
R402 0_0402_5%
1 2
C459 820P_0603_50V7K
1 2
C457 820P_0603_50V7K
1 2
C461 1U_0603_10V4Z
1 2
C454 1U_0603_10V4Z
1 2
1 2
Io= 200mA
Vo= 4.65V ~ 4.85V
w=30mil
5
VOUT
4
2
GND
1
C460
2
1 2
1 2
R401 0_0402_5%
1
C436
2
0.1U_0402_16V4Z
1 2
R151 0_0603_5%
1
C127
10U_0805_10V4Z
2
C458
27P_0402_50V8J
CLK_14M_CODECXTL_IN
1
C439
4.7U_0805_10V4Z
2
AC97_BITCLK <20>
AC97_SDIN0 <20>
CLK_14M_CODEC <15>
MIC_SEL <32>
GPIO1 <30>
DIS_INTMIC <36>
INT_MIC3 <30>
INT_MIC2 <36>
C113 1000P_0402_50V7K@
1 2
C116 1000P_0402_50V7K@
1 2
C448 1000P_0402_50V7K@
1 2
C449 1000P_0402_50V7K@
1
C438
0.1U_0402_16V4Z
2
12
LINE_OUT_L <30>
LINE_OUT_R <30>
HP_OUT_L <30,36>
HP_OUT_R <30,36>
DIS_INTMIC DO CK_MIC
(PIN 34) (PIN 47)(PIN 16)
H
L ENABLE
A A
5
INT_MIC1
INT_MIC2
INT_MIC3
DISABLE ENABLE
DISABLE
4
PROPRIETARY NOTE
EAPD
H
L
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LINE_IN_L PIN23
LINE_IN_R PIN24
ENABLE
DISABLE
3
MIC_SEL
(PIN 31) (P IN 22) (PIN 44) (PIN 21,43)
L (Landscape)
H (Portrait)
INT_MIC1 INT_MIC2 INT_MIC3
ENABLE ENABLE
DISABLE
DISABLE
ENABLE ENABLE
2
MIC2
O
MIC3MIC1
OO
Compal Electronics, Inc.
Title
AC97 STAC9758
Size Document Number Rev
EDX20 LA-2481
Date: Sheet
1
of
29 48Tuesday, February 22, 2005
0.5
Page 30
5
+5VS
Gain Setting
R245
10K_0402_5%
@
R243
10K_0402_5%
12
12
R248
10K_0402_5%
R250
10K_0402_5%@
12
D D
GAIN0
GAIN1
12
GAIN0 GAIN1
*
0
1
4
http://hobi-elektronika.net
AV(inv)
6dB0
0
10dB
1
15.6dB
0
21.6dB
11
INPUT
IMPEDANCE
90K ohm
70K ohm
45K ohm
25K ohm
3
2
1
Speaker
JP13
1
1
2
2
MOLEX_53780-0290
JP16
1
1
2
2
MOLEX_53780-0290
+5VS
INTSPK_R+
INTSPK_R-
INTSPK_L+
D9
3
DA204U_SC70@
2
1
D10
3
DA204U_SC70@
2
1
D20
3
DA204U_SC70@
2
1
3
2
INTSPK_L-
D19
DA204U_SC70@
1
D
13
Q23
AO3413_SOT23
4.99K_0603_1%
GNDA<7,29,36>
C176
VDDA
12
R275
2
C282
330P_0603_50V8J
1
1 2
R320
4.7K_0402_5%
INTMIC3
12
R318
1
C319
0.22U_0603_10V7K
2
VDDA
R217
4.7K_0402_5%
12
1 2
L10 FBM-11-160808-700T_0603
1 2
L9 FBM11-160808-700T
1 2
L8 FBM11-160808-700T
1
C189
0.1U_0402_16V4Z
2
VDDA
R280
12
4.7K_0402_5%
1 2
L22 FBM-11-160808-700T_0603
1 2
L19 FBM11-160808-700T
1 2
L16 FBM11-160808-700T
1
2
C286
0.1U_0402_16V4Z
Internal MIC3
ACES_85201-0405
1
2
3
4
JP25
DVT2 swap pin
HP OUT
JP6
6
5
4
3
HPOUTL
2
1
SUYIN_010030FR006G100ZL
JP7
6
5
4
3
LINEOUTL
2
1
SUYIN_010030FR006G100ZL
MIC
VDDA
Compal P/N: SCVL080C000
BLM21A05_0805
L12
+5VAMP
1 2
W=30mils
1
C241
C C
INT_SPK_R<29>
INT_SPK_L<29>
MUTE#<32>
HP_PLUG#<29,36>
Please keep EAPD at High level
B B
A A
0.1U_0402_16V4Z
2
1 2
1 2
1 2
1 2
U35
1
A
2
B
NC7ST08P5X_SC70-5
C494
0.47U_0603_16V4Z
C224
0.1U_0402_16V4Z
C492
0.47U_0603_16V4Z
C239
0.1U_0402_16V4Z
VDDA
5
P
O
G
3
1
2
4
C213
0.1U_0402_16V4Z
7
RIN+
17
RIN-
9
LIN+
5
LIN-
19
SHUTDOWN
15
6
16
VDD
PVDD1
PVDD2
ROUT+
BYPASS
GND41GND311GND213GND1
TPA6017A2_TSSOP20
20
1 2
R170 0_0603_5%
1 2
R281 0_0603_5%
1 2
R97 0_0603_5%
GAIN0
GAIN1
ROUT-
LOUT+
LOUT-
NC
U41
2
3
18
14
4
8
12
10
+5VALW
1
C209
10U_0805_10V4Z
2
GAIN0
GAIN1
INTSPK_R+
INTSPK_R-
INTSPK_L+
INTSPK_L-
BYPASS
1
C487
2
4.7U_0805_10V4Z
1
C214
0.1U_0402_16V4Z
2
1
C490
2
0.1U_0402_16V4Z
INT_MIC_3
INT_MIC3<29>
EC_DIS_INTMIC<32,36>
HP_OUT_R<29,36>
HP_OUT_L<29,36>
LINE_OUT_R<29>
LINE_OUT_L<29>
1 2
R190 4.99_0402_1%
1 2
R181 4.99_0402_1%
1 2
R415 4.99_0402_1%
1 2
R414 4.99_0402_1%
12
C307 0.22U_0603_10V7K
C171
47U_1210_10V3M
C143
47U_1210_10V3M
C511
0.33U_0603_16V4Z
C508
0.33U_0603_16V4Z
EC_DIS_INTMIC
1 2
1 2
20K_0402_5%
1 2
1 2
20K_0402_5%
INTMIC_3
1 2
L26
FBM11-160808-700T
HP_OUTR HPOUTR
HP_OUTL
12
12
R197
R192
20K_0402_5%
330P_0603_50V8J
12
12
R277
R276
20K_0402_5%
330P_0603_50V8J
R301
0_0402_5%@
1 2
S
G
2
HP_PLUG#<29,36>
2
2
330P_0603_50V8J
1
1
C163
GPIO1<29>
4.7K_0402_5%
LINE_OUTR LINEOUTR
LINE_OUTL
2
1
C259
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
5
4
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
AMP & Audio Jack
Size Document Number Re v
EDX20 LA-2481
Date: Sheet
1
of
30 48Tuesday, February 22, 2005
0.5
Page 31
5
4
3
2
1
http://hobi-elektronika.net
D D
+5VS
U29
1
GND
W=40mils
1
1
C409
C408
4.7U_0805_10V4Z
2
2
0.1U_0402_16V4Z
C C
2
IN
3
EN1#
4
EN2#
TPS2042ADR_SO8
USBP0+
USBP1-
OC1#
OUT1
OUT2
OC2#
500mA
USB_1SUSB_0S
8
7
6
5
U55
1
AS
2
GND
3
VDD
AD7414ART-0_SOT23-6~D@
USB Over Current
R15 47_0402_5%
R14 47_0402_5%
USBP0-
6
SDA
5
ALERT
SCL
USBP1+
4
1 2
1 2
0.1U_0402_16V4Z
USB_OC#0
USB_OC#1
1
1
2
C28
0.1U_0402_16V4Z
2
C29
+5VS
USB_OC#0 <21>
USB_OC#1 <21>
USB_0S
W=40mils
1
1
+
C413
C61
0.1U_0402_16V4Z
USBP0-<21>
USBP0+<21>
USBP1-<21>
USBP1+<21>
USB_1S
USBP0+
0.1U_0402_16V4Z
USBP1USBP1+
C4
150U_D_6.3VM
2
2
1 2
R390 0_0603_5%
1 2
R391 0_0603_5%
15P_0402_50V8D
15P_0402_50V8D
W=40mils
1
1
+
2
2
1 2
R385 0_0603_5%
1 2
R387 0_0603_5%
C67
C398
150U_D_6.3VM
15P_0402_50V8D
15P_0402_50V8D
2
1
@
C17
USB Port 0
C63
0.001U_0402_50V7M
USB20_N0_RUSBP0USB20_P0_R
1
1
C74
@
2
2
2
C7
0.001U_0402_50V7M
1
USB20_N1_R
USB20_P1_R
1
1
C30
2
2
@
@
JP4
1
VCC
2
D-
3
D+
4
GND
SUYIN_020173MR004S556ZL
USB Port 1
JP3
1
VCC
2
D-
3
D+
4
GND
SUYIN_020173MR004S556ZL
B B
A A
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
5
4
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
USB Port x2
Size Document Number Rev
EDX20 LA-2481
Date: Sheet
1
of
31 48Tuesday, February 22, 2005
0.5
Page 32
A
FBM-L11-160808-601LMT_200mA_10%
L28
1 2
+3VALW
L27
ECAGND
12
FBM-L11-160808-601LMT_200mA_10%
1 1
2
1
+3VALW
EC_AVCC
C317
0.1U_0402_16V4Z
1 2
R366 47K_0402_5%
0.1U_0402_16V4Z
Reserved for 87591L
JP9
1
1
2
3
4
5
6
7
8
9
2 2
3 3
4 4
10
E&T_96212-1011S
@
+5VS
GATEA20<20>
KBRST#<20>
EC_TINIT#
2
EC_TCK
3
EC_TDO
4
EC_TDI
5
EC_TMS
6
7
URXD
8
UTXD
9
EN_WOL#
10
+3VALW
12
R332
10K_0402_5%
RP44
1 8
2 7
3 6
4 5
10K_0804_8P4R_5%
1 2
R311 10K_0402_5%
1 2
R310 10K_0402_5%
R355
10K_0402_5%
1 2
+3VS
1 2
A
PSCLK1
PSDAT1
PSCLK2
PSDAT2
PSCLK3
PSDAT3
R356
10K_0402_5%
GATEA20
KBRST#
+3VALW
C381
+3VALW
1
2
0.1U_0402_16V4Z
LPC_FRAME#<20,35>
CLK_PCI_EC<15>
1
2
+3VALW
CLK_PCI_EC
1 2
2
1
LPC_AD0<20,35>
LPC_AD1<20,35>
LPC_AD2<20,35>
LPC_AD3<20,35>
EC_RSMRST#<21>
PM_CLKRUN#<21,24,26,27,35>
R364
33_0402_5%
@
C380
15P_0402_50V8D
@
0.1U_0402_16V4Z
C383
SIRQ<21,24,35>
LRST#
1 2
10K_0402_5%
PSCLK1
PSDAT1
PSCLK2
PSDAT2
PSCLK3
PSDAT3
CRY1
CRY2
DIGI_RST#<17>
DIGISUSP<17>
EC_SCI#<21>
DOCKEN<28>
WLAN_ACT2<26>
KSI_USER<36>
MIC_SEL<29>
ENABKL<10,17>
BKOFF#<17>
WLAN_ACT1<26>
FSTCHG<39,40>
VCCP_POK<42>
VGATE<8,15,21,45>
EC_SMI#<21>
SYSPOK<45>
WL_SW<36>
EC_SWI#<21>
PROCHOT#<5>
1 2
R330 20M_0603_5%@
1 4
1
32.768KHZ_12.5PF_6HT3
C565
10P_0402_50V8J
2
1
1
C365
2
2
1000P_0402_50V7K
1 2
+3VS
R363 10K_0402_5%@
SIRQ
LPC_FRAME#
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
CLK_PCI_EC
LRST#
GATEA20<20> EN_DFAN1
KBRST#<20>
KSI0<36>
KSI1<36>
KSI2<36>
KSI3<36>
KSI4<36>
KSI5<36>
KSI6<36>
KSI7<36>
PECOS
R513
URXD
UTXD
PSCLK1
PSDAT1
PSCLK2
PSDAT2
PSCLK3
PSDAT3
CRY1
CRY2
EC_RSMRST#
DIGI_RST#
DIGISUSP
EC_SCI#
DOCKEN RING#
WLAN_ACT2
KSI_USER
MIC_SEL
PM_CLKRUN#
ENABKL
BKOFF#
WLAN_ACT1
FSTCHG
VCCP_POK
VGATE
EC_SMI#
SYSPOK
WL_SW
EC_SWI#
PROCHOT#
Y6
R329
1
C566
10P_0402_50V8J
2
0.1U_0402_16V4Z
C331
GATEA20
KBRST#
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
CRY1
CRY2
12
0_0603_5%
B
1
C321
2
U28
7
9
15
14
13
10
18
19
31
5
6
71
72
73
74
77
78
79
80
49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
153
154
110
111
114
115
116
117
158
160
3
4
8
20
21
22
23
24
25
27
28
41
48
54
55
62
63
69
70
75
B
1000P_0402_50V7K
1
C376
2
SERIRQ
LFRAME#
LAD0/FWH0
LAD1/FWH1
LAD2/FWH2
LAD3/FWH3
LCLK
ECRST#
ECSCI#
GPIO02/GA20
GPIO03/KBRST#
KSI0/GPIK0
KSI1/GPIK1
KSI2/GPIK2
KSI3/GPIK3
KSI4/GPIK4
KSI5/GPIK5
KSI6/GPIK6
KSI7/GPIK7
KSO0/GPOK0
KSO1/GPOK1
KSO2/GPOK2
KSO3/GPOK3
KSO4/GPOK4
KSO5/GPOK5
KSO6/GPOK6
KSO7/GPOK7
KSO8/GPOK8
KSO9/GPOK9
KSO10/GPOK10
KSO11/GPOK11
KSO12/GPOK12
KSO13/GPOK13
KSO14/GPOK14
KSO15/GPOK15
KSO16/GPOK16
KSO17/GPOK17
PSCLK1
PSDAT1
PSCLK2
PSDAT2
PSCLK3
PSDAT3
XCLKI
XCLKO
GPIO00/E51IT0
GPIO01/E51IT1
GPIO04
GPIO07
GPIO08
GPIO09
NUMLOCK#/GPIO0A
GPIO0B
CLKRUN#/GPIO0C
GPIO0D
GPIO0E
SCROLLLOCK#/GPIO0F
GPIO10
CAPLOCK#/GPIO11
FNLOCK#/GPIO12
GPIO13
GPIO1
GPIO14
GPIO15
GPIO16
GPIO17
124
KBA0
A0
A1/XIOP_TP
125A2126A3127
KBA1
C
ECAGND
96
95
VCCA
GND7
AGND
AD Input or GPI
DA output or GPO
PWM
or GPOW
PWM2/GPOW2/FAN1PWM
PWM7/GPOW7/FAN2PWM
GPIO05/FAN3PWM/TEST_TP
FAN/PWM
GPIO06/FANFB3/DPLL_TP
SM BUS
GPIO20/E51CS#/ISPEN_TP
GPIO2
GPWU or GPI
D0
138D1139D2140D3141D4144D5145D6146D7147
ADB4
ADB3
ADB0
ADB2
ADB5
ADB1
C
ECAGND
C354
1U_0603_10V4Z
159
161
AD0/GPIAD0
AD1/GPIAD1
VCCBAT
BATGND
AD2/GPIAD2
AD3/GPIAD3
AD4/GPIAD4
AD5/GPIAD5
AD6/GPIAD6
AD7/GPIAD7
DA0/GPODA0
DA1/GPODA1
DA2/GPODA2
DA3/GPODA3
DA4/GPODA4
DA5/GPODA5
DA6/GPODA6
DA7/GPODA7
PWM0/GPOW0
PWM1/GPOW1
PWM3/GPOW3
PWM4/GPOW4
PWM5/GPOW5
PWM6/GPOW6
FANFB1/TOUT1/GPIO2E
GPWU7/TIN2/FANFB2
SDA1
SDA2
GPIO21/E51RXD/ISPCLK
GPIO22/E51TXD/ISPDAT
A20/GPIO23
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO2A
GPIO2B
LRST#/GPIO2C
GPIO2D
TOUT2/GPIO2F
GPWU0
GPWU1
GPWU2
GPWU3
GPWU4
GPWU5
GPWU6/TIN1
GPIO18/XIO8CS#
GPIO19/XIO9CS#
GPIO1A/XIOACS#
GPIO1B/XIOBCS#
GPIO1C/XIOCCS#
GPIO1D/XIODCS#
GPIO1E/XIOECS#
GPIO1F/XIOFCS#
RD#
WR#
IOCS#
MEMCS#
150
151
152
173
ADB7
ADB6
1 2
R334 0_0402_5%@
1 2
R335 0_0402_5%
12
81
82
83
84
87
88
89
90
99
100
101
102
1
42
47
174
32
33
37
38
39
40
36
43
11
171
176
12
163
SCL1
164
169
SCL2
170
105
106
107
108
109
118
119
148
149
155
156
162
165
168
175
2
26
29
30
44
76
172
85
86
91
92
93
94
97
98
KB910_LQFP176
FSEL#
FWR#
FRD#
http://hobi-elektronika.net
123
136
157
166
VCC016VCC134VCC245VCC3
VCC4
VCC5
VCC6
PWR/GND
Host interface
Key matrix scan
PS2 interface
GPIO0
A4/DMRP_TP
128
131A6132A7133
KBA3
KBA2
KBA5
KBA4
PROPRIETARY NOTE
A5/EMWB_TP
KBA6
KBA7
143A9142
KBA8
A12
A11
A10
A8
129
130
134
135
KBA9
KBA10
KBA13
KBA12
KBA11
EC_AVCC
122
167
137
GND117GND235GND346GND4
GND6
BIOS I/F
A13
A14
A15
A16
A17
A18
A19
121
120
113
112
104
103
KBA19
KBA14
KBA15
KBA17
KBA16
KBA18
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+RTCVCC
+3VALW
FPR_SW
1 2
R1158 10K_0402_5%
BATT_TEMP1
DS_DOCKED_ID
BATT_OVP
M/B_ID
FPR_SW
CHARGER_THERM
INV_THERM
BATT_TEMP2
DAC_BRIG
EN_DFAN1
IREF
ICH_PWRGD
BATSELB_A#
LAN_EN#
INVT_PWM
BEEP#
ACOFF
PDCT
VCCP_ON#
EC_DIS_INTMIC
TEST_TP
FAN_SPEED1
DPLL_TP
SMB_EC_CK1
SMB_EC_DA1
SMB_EC_CK2
SMB_EC_DA2
EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS
PME#
EC_EXTTS#0
SYSON
SUSP#
VR_ONROTA90#
ROTA90#
DDR_ID0
PCIRST#
EC_PBTNOUT#
EC_THRM#
ON/OFF
ACIN
EC_SLP_S3#
EC_SLP_S5#
DDR_ID1
EC_SLP_S4#
PWR_LED#
CHARGE_LED#
RFOFF#
RFON_LED#
BATT_LED#
BTDIS#-BTON#
MUTE#
FPR_PWRON
ADB[0..7]
KBA[0..19]
FSEL# <34>
FWR# <34>
FRD# <34>
DS_DOCKED_ID
BATT_TEMP1 <38>
DS_DOCKED_ID <36>
BATT_OVP <40>
M/B_ID
FPR_SW <36>
CHARGER_THERM <43>
BATT_TEMP2 <38>
DAC_BRIG <17>
IREF <39>
ICH_PWRGD <21,34>
INVT_PWM <17>
BEEP# <29>
ACOFF <39>
EC_ON <33>
PDCT <17>
VCCP_ON# <42>
EC_DIS_INTMIC <30,36>
FAN_SPEED1 <5>
SMB_EC_CK1 <34,38>
SMB_EC_DA1 <34,38>
SMB_EC_CK2 <5,34,36,38>
SMB_EC_DA2 <5,34,36,38>
PME# <34>
EC_EXTTS#0 <8>
SYSON <37,44>
SUSP# <29,37,38>
VR_ON <37,45>
ROTA90# <36>
PCIRST# <19,24,25,26,27>
EC_PBTNOUT# <21>
EC_THRM# <21>
ON/OFF <33>
ACIN <21,39,41>
EC_SLP_S3# <21>
EC_SLP_S5# <21>
EC_SLP_S4# <21>
PWR_LED# <36>
CHARGE_LED# <36>
RFOFF# <26>
RFON_LED# <36>
BATT_LED# <36>
BTDIS#-BTON# <36>
MUTE# <30>
FPR_PWRON <36>
ADB[0..7] <34>
KBA[0..19] <34>
D
R322 4.7K_0402_5%
+3VS
BATSELB_A# <40>
D
ECAGNDBATT_TEMP2
C329
1 2
0.01U_0402_16V7K
ECAGNDBATT_TEMP1
C335
1 2
0.01U_0402_16V7K
ECAGNDBATT_OVP
C316
1 2
0.01U_0402_16V7K
ECAGNDDS_DOCKED_ID
C315
1 2
0.01U_0402_16V7K
1 2
+3VALW
12
Ra
12
Rb
DOCKEN_VGA <18,33>
LAN_EN# <27>
1 2
R360 0_0402_5%@
INV_THERM
1
C1359
0.1U_0402_10V6K
2
10KB_0603_1%_TSM1A103F34D3R~D
Pin8, 22, 54, 82, 84, 89 and 172 is diffrence define with 87591
R181, R191, R192 and R193 are reserved for KB910.
R187 & R176 are reserced for 87591L
BTDIS# signal is reservedfor BT modula,
BTON# signal is reserved for MDC\BT module
PM_BATLOW# <21>
EC_PWM4 <5>
+3VS
12
R1162
2.15K_0402_1%
12
R1163
V
R319
100K_0402_5%
M/B_ID
R317
0_0402_5%
SMB_EC_DA1
SMB_EC_CK1
SMB_EC_DA2
SMB_EC_CK2
FSEL#
FRD#
EC_SMI#
KBA5
RING#
WLAN_ACT1
WLAN_ACT2
DDR_ID0
R517 1K_0402_5%
DDR_ID1
R518 1K_0402_5%
PCIRST#
EC_TINIT#
TEST_TP
DPLL_TP
E
Vcc
Ra
Board ID
0
1
2
3
4
5
6
1
C327
0.1U_0402_16V4Z
2
R343 4.7K_0402_5%
1 2
R341 4.7K_0402_5%
1 2
R350 4.7K_0402_5%
1 2
R347 4.7K_0402_5%
1 2
RP50
1 8
2 7
3 6
4 5
10K_0804_8P4R_5%
1 2
R312 10K_0402_5%
1 2
R358 100K_0402_5%
R361 100K_0402_5%
1 2
R359 100K_0402_5%
1 2
12
12
For KB910
1 2
R345 100K_0402_5%
1 2
R313 100K_0402_5%
1 2
R369 0_0402_5%
1 2
R357 0_0402_5%
3.3V +/- 5%
100K +/- 5%
Rb
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC7
+5VALW
+3VALW
+3VALW
Compal Electronics, Inc.
Title
ENE KB910
Size Document Number Rev
EDX20 LA-2481
Date: Sheet
E
of
32 48Tuesday, Fe b r u a r y 22, 2005
0.5
Page 33
A
B
C
D
E
http://hobi-elektronika.net
1 1
PVT
+3VALW
R53310K_0402_5%
1 2
14
10
13
12
1
2
4
5
9
A
B
+3VALW
A
B
+3VALW
A
B
+3VALW
A
B
P
G
7
14
P
G
7
14
P
G
7
14
P
G
7
SN74LVC32APWLE_TSSOP14
USB_OC#2
3
O
1
C576
0.1U_0402_16V4Z
2
SN74LVC32APWLE_TSSOP14
USB_OC#3
6
O
1
C577
0.1U_0402_16V4Z
2
SN74LVC32APWLE_TSSOP14
USB_OC#4
8
O
1
C578
0.1U_0402_16V4Z
2
SN74LVC32APWLE_TSSOP14
USB_OC#5
11
O
1
C579
0.1U_0402_16V4Z
2
USB_OC#2 <21>
USB_OC#3 <21>
USB_OC#4 <21>
USB_OC#5 <21>
SW1
1 2
HSS110_4P
EC_ON<32>
ON/OFFBTN#
+3VALW
EC_ON
22K_0402_5%
12
R381
22K_0402_5%
1 2
R382
D12
1
DAN202U_SC70
2
22K
22K
+3VALW
3
2
12
R380
100K_0402_5%
ON/OFF
13
Q33
DTC124EK_SOT23
Power BTN
1
C397
2
1000P_0402_50V7K
ON/OFF <32>
EC_ON# <43>
12
D13
RLZ20A_LL34
WHEN R=0,Vbe=1.35V
WHEN R=33K,Vbe=0.8V
DOCK_USB_OC#2<36>
+3VALW
2 2
DOCKEN_VGA<18,32>
3 3
DOCKEN_VGA
R537
10K_0402_5%
2
G
2N7002_SOT23
Q71
1 2
13
D
S
DOCK_USB_OC#3<36>
DOCKEN_VGA#
DOCK_USB_OC#4<36>
DOCK_USB_OC#5<36>
DOCK_USB_OC#2
DOCK_USB_OC#3
DOCK_USB_OC#4
DOCK_USB_OC#5
U54A
R53410K_0402_5%
1 2
U54B
R53510K_0402_5%
1 2
U54C
R53610K_0402_5%
1 2
U54D
4 4
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
A
B
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Power ON/OFF SW
Size Document Number Rev
EDX20 LA-2481
Date: Sheet
E
of
33 48Tuesday, Fe b r u a r y 22, 2005
0.5
Page 34
A
B
C
D
E
NM24C164 Address definition: 1 A2 A1# A0 B2 B1 B0 R/W#
http://hobi-elektronika.net
VDD
GND
VDD
GND
U34
NC
U43
NC
GND
+3VALW
12
R337
100K_0402_5%
1
A0
2
A1
3
A2
4
+5VS
C441
1 2
3
2
1
3
2
1
+5VS
0.1U_0402_16V4Z
C501
1 2
0.1U_0402_16V4Z
+3VALW
12
R305
R308
SMB_EC_CK2
SMB_EC_DA2
R309
10K_0402_5%
Q69
2N7002_SOT23
D
1 3
2
+5VS
PME# <32>
S
G
Q70
2N7002_SOT23
D
1 3
+5VS
SMB_EC_CK1<32,38>
SMB_EC_DA1<32,38>
R529
10K_0402_5%
1 2
EC_CK2
S
EC_DA2
G
2
1 1
PCM_PME#<24>
WLANPME#<26>
LAN_PME#<27>
PCI_PME#<19>
2 2
SMB_EC_CK2<5,32,36,38>
SMB_EC_DA2<5,32,36,38>
R306
100_0402_5%
1 2
1 2
100_0402_5%
1 2
100_0402_5%
R307
100_0402_5%
1 2
1 2
C345
0.1U_0402_16V4Z
+5VS
R530
10K_0402_5%
1 2
+3VALW
U24
8
VCC
7
WC
6
SCL
5
SDA
AT24C16AN-10SI-2.7_SOP
EC I2C Bus Address:
24C164: 1011xxx R/W#
24C16: 1010xxx R/W#
4
SCLK
5
SDA
TC74A1-5.0VCT_SOT23-5
SM BUS Addr. 1001 001
4
SCLK
5
SDA
TC74A2-5.0VCT_SOT23-5
SM BUS Addr. 1001 010
3 3
U49
21
A0
20
A1
19
A2
18
A3
17
A4
16
A5
15
A6
14
A7
8
A8
7
A9
36
A10
6
A11
5
A12
4
A13
3
A14
2
A15
1
A16
READY/BUSY#
40
A17
13
A18
37
A19
22
CE#
24
OE#
9
WE#
@
SST39VF080-70_TSOP40
VCC0
VCC1
RP#
NC0
NC1
GND0
GND1
31
30
ADB0
25
D0
ADB1
26
D1
ADB2
27
D2
ADB3
28
D3
ADB4
32
D4
ADB5
33
D5
ADB6
34
D6
ADB7
35
D7
10
11
NC
12
29
38
23
39
1 2
BIOS_RST#
+3VALW
2
I0
1
I1
ADB[0..7]
KBA[0..19]
5
U22
P
4
O
G
TC7SH32FU_SSOP5
3
FWE#
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19
FSEL#<32>
FRD#<32>
FSEL#
FRD#
FWE#
ADB[0..7]<32>
KBA[0..19]<32>
+3VALW
ICH_PWRGD<21,32>
EC_FLASH#<21>
4 4
FWR#<32>
G
S
Q27
2N7002_SOT23
2
FWR#
D
13
R321
100K_0402_5%
1 2
Alternative SA290080100 for U24
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
A
B
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
R453
+3VALW
1
2
0.1U_0402_16V4Z
+3VALW
10K_0402_5%
C555
1
C336
10U_0805_10V4Z
2
KBA9
KBA8
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
KBA0
JP23
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
SUYIN_127212FA034G200ZX
FSEL#
FRD#
FWE#
ADB7
ADB6
ADB5
ADB4
ADB3
ADB2
ADB1
ADB0
KBA19
KBA18
KBA17
KBA16
KBA15
+3VALW
KBA14
KBA13
KBA12
KBA11
KBA10
BIOS_RST#
Compal Electronics, Inc.
Title
Thermal Sensor & BIOS
Size Document Number Rev
EDX20 LA-2481
D
Date: Sheet
34 48Tuesday, Fe b r u a r y 22, 2005
E
0.5
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Page 35
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+3VS
0.1U_0402_16V4Z
1
1 1
2 2
1
C386
2
0.1U_0402_16V4Z
R351
33_0402_5%
C377
22P_0402_50V8J
@
@
1
C378
2
2
1000P_0402_50V7K
CLK_14M_SIO CLK_PCI_SIO
12
33_0402_5%
1
22P_0402_50V8J
2
R372
C388
C362
@
@
1
2
12
1
2
C375
4.7U_0805_10V4Z
LPC_AD0<20,32>
LPC_AD1<20,32>
LPC_AD2<20,32>
LPC_AD3<20,32>
LPC_DRQ#0<20>
PLT_RST#<8,16,17,19,21,23>
SUS_STAT#<21>
PM_CLKRUN#<21,24,26,27,32>
CLK_PCI_SIO<15>
SIRQ<21,24,32>
CLK_14M_SIO<15>
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_FRAME#
LPC_DRQ#0
1 2
R374 22_0402_5%
PM_CLKRUN#
CLK_PCI_SIO
CLK_14M_SIO
4.7K_0402_5%
Strap pin Pin # Description
BADDR 33 BASE Address Selection
4.7K_0402_5%
R362
R375
12
+3VALW
12
U27
10
LAD0
12
LAD1
13
LAD2
14
LAD3
15
LFRAME#
16
LDRQ#
17
PCI_RESET#
18
LPCPD#
19
CLKRUN#
20
PCI_CLK
21
SER_IRQ
6
IO_PME#
9
CLK14
CLOCK
23
GPIO40
24
GPIO41
25
GPIO42
27
GPIO43
28
GPIO44
29
GPIO45
30
GPIO46
31
GPIO47
32
GPIO10
33
GPIO11/SYSOPT
34
GPIO12/IO_SMI#
35
GPIO13/IRQIN1
36
GPIO14/IRQIN2
40
GPIO23
8
VSS
22
VSS
43
VSS
52
VSS
LPC47N217_STQFP64
LPC I/F
GPIO
POWER
FIR
IRMODE/IRRX3
62
RXD1
63
TXD1
64
DSR1#
1
RTS1#
2
CTS1#
3
DTR1#
4
RI1#
DCD1#
IRRX2
IRTX2
INIT#
SLCTIN#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
SLCT
BUSY
ACK#
ERROR#
ALF#
STROBE#
VTR
VCC
VCC
VCC
VCC
5
37
38
39
41
42
44
46
47
48
49
50
51
53
55
56
PE
57
58
59
60
61
7
11
26
45
54
SERIAL I/F
PARALLEL I/F
IRRX
IRTXOUT
IRMODE
+3VS
RXDB# <17>
TXDB <17>
CTSB# <17>
DTRB# <17>LPC_FRAME#<20,32>
+3VALW
FOR LPC SIO DEBUG PORT
JP12
ACES_85201-2005@
+5VS
1
1
2
2
3
3
4
4
5
5
CLK_14M_SIO
6
6
LPC_AD0
7
7
LPC_AD1
8
8
LPC_AD2
9
9
LPC_AD3
10
10
LPC_FRAME#
11
11
LPC_DRQ#0
12
12
PLT_RST#
13
13
14
14
CLK_PCI_SIO
15
15
SIRQ
16
16
17
17
18
18
19
19
20
20
+3VS
"0": 2E~2F (Default)
"1": 4E~4F
FIR
3 3
TPM
CLK_PCI_TPM
12
R49
33_0402_5%
@
1
C66
22P_0402_50V8J
4 4
2
@
A
CLK_PCI_TPM<15>
PLT_RST#<8,16,17,19,21,23>
+3VS
ICH_SMBCLK<13,14,15,17,21> ICH_SMBDATA <13,14,15,17,21>
+3VS
CLK_PCI_TPM
LPC_FRAME#
PLT_RST#
LPC_AD3
LPC_AD0
ICH_SMBCLK I CH_SM BDATA
SUS_STAT#
JP17
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
ACES_88019-2000
B
LPC_AD2
LPC_AD1
SIRQ
PM_CLKRUN#
LPC_DRQ#1
+5VS
LPC_DRQ#1 <20>
PROPRIETARY NOTE
+3VS
C570
10U_0805_10V4Z@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
1
2
R516
12
47_1206_5%
C571
10U_0805_10V4Z
1
2
+IR_3VS
(30mil)
1
C572
0.1U_0402_16V4Z
2
22U_1206_10V4Z
D
+3VS
(60mil)
1
C573
2
IRRX IRMODE
SD/MODE: SHUTDOWN MODE, HIGH ACTIVE
MODE: HIGH/LOW SPEED SELECT
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
R514 4.7_0603_5%@
1 2
1 2
4.7_0603_5%
R515
U53
2
IRED_C
4
RXD
6
VCC
8
GND
IR_VISHAY_TFDU6614-TR4_8P
PCB Footprint : TFDU6101E
IRED_A
SD/MODE
MODE
TXD
Super I/O LPC47N217/TPM/FIR
EDX20 LA-2481
1
3
5
7
+IR_ANODE
(60mil)
IRTXOUT
E
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35 48Tuesday, February 22, 2005
Page 36
5
4
3
2
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BT MODULE CONN
+3VS
C382
1 2
D D
USBP6+<21>
USBP6-<21>
BTDIS#-BTON#<32>
BTON_LED
C C
2
USBP6+
USBP6-
BTONLED
Q32
MMBT3904_SOT23
3 1
0.1U_0402_16V4Z
BT_ACTIVE<26>
WLAN_ACTIVE<26>
Bluetooth Cable
BTON_LED
mini_PCI Pin36
mini_PCI Pin43
JP14
1
2
3
4
5
6
7
8
MOLEX_53780-0890
BT_ACTIVE JP27.1
WLAN_ACTIVE JP27.4
WIRELESS SW
10K_0402_5%
1 2
+3VS
R1151
WL_SW<32>
WL_SW
JP1
1
2
MOLEX_53780-0290
DOCK_LAN_TX2-<28>
DOCK_LAN_TX2+<28>
DOCK_LAN_TX3-<28>
DOCK_LAN_TX3+<28>
DOCK_LAN_TX-<28>
DOCK_LAN_TX+<28>
1
2
DOCK_LAN_RX-<28>
DOCK_LAN_RX+<28>
CRT_B_DOCK<18>
CRT_G_DOCK<18>
CRT_R_DOCK<18>
CRT_VSYNC_DOCK<18>
CRT_HSYNC_DOCK<18>
DOCK_USB_OC#5<33>
DOCK_USB_OC#4<33>
DOCK_USB_OC#3<33>
DOCK_USB_OC#2<33>
DOCK_LAN_ACT#<28>
DOCK_LAN_LINK100#<28>
DOCK_LAN_TX2-
DOCK_LAN_TX2+
DOCK_LAN_TX3-
DOCK_LAN_TX3+
DOCK_LAN_TX-
DOCK_LAN_TX+
DOCK_LAN_RX-
DOCK_LAN_RX+
USBP2+<21>
USBP2-<21>
USBP4+<21>
USBP4-<21>
USBP3+<21>
USBP3-<21>
DOCK_USB_OC#5
DOCK_USB_OC#4
DOCK_USB_OC#3
DOCK_USB_OC#2
USBP5+<21>
USBP5-<21>
ROTA90#<32>
M_SEN#<18,21>
3VDDCDA<10,18>
3VDDCCL<10,18>
ALS/MIC board
+3VS
VDDA
R286
0_0402_5%@
2
1
1 2
USBP7+
USBP7-
1
C357
0.1U_0402_10V6K
2
S
G
2
D
13
Q20
AO3413_SOT23
JP27
5
5
4
4
3
3
2
2
1
1
E&T_96212-0511S
4
B B
INT_MIC1<29>
INT_MIC1 INTMIC1
0.22U_0603_10V7K
EC_DIS_INTMIC<30,32>
C301
1 2
1 2
FBM-11-160808-700T_0603
L25
EC_DIS_INTMIC
Finger Print board
USBP7+<21>
USBP7-<21>
D
S
+3VS
FPR_PWRON<32>
A A
13
Q57
2
AO3413_SOT23
FPR_SW<32>
4.7U_0603_6.3V6M
C569
@
G
5
INT_MIC2<29>
SMB_EC_DA2<5,32,34,38>
SMB_EC_CK2<5,32,34,38>
GNDA<7,29,30>
EC_DIS_INTMIC
PROPRIETARY NOTE
SMB_EC_DA2
SMB_EC_CK2
INTMIC1
GNDA
C1358
1 2
0.22U_0603_10V7K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
L51
1 2
FBM-11-160808-700T_0603
3
JP22
7
6
5
4
3
2
1
ACES_85201-0705
PWR_LED#<32>
CHARGE_LED#<32>
BATT_LED#<32>
HDD_LED#<23>
RFON_LED#<32>
D
S
13
G
Q56
2
KSI0<32>
KSI1<32>
KSI2<32>
KSI3<32>
KSI4<32>
KSI5<32>
KSI6<32>
KSI7<32>
KSI_USER<32>
AO3413_SOT23
10K_0402_5%
1 2
R431
PWR_LED#
CHARGE_LED#
BATT_LED#
HDD_LED#
RFON_LED#
BTONLED
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSI_USER
INTMIC2INT_MIC2
GNDA
VDDA
DOCKING BD.
JP30
1 2
3 4
5 6
7 8
9 10
12
11
14
13
16
15
18
17
20
19
222421
23
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
7675
78
77
80
79
82
81
84
83
86
85
88
87
90
89
92
91
94
93
96
95
979998
100
HANNS_802PVS-100415R-P
BTN Board
+5VALW+5VS
2
JP24
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
ACES_87151-2205
Compal Electronics, Inc.
Title
DAUGHTER Brd I/F
Size Document Number Rev
EDX20 LA-2481
Date: Sheet
HP_OUT_L <29,30>
HP_OUT_R <29,30>
HP_PLUG# <29,30>
VDDA <29,30>
+3VALW
+5VS
1 2
R1159 0_0402_5%
R1160 5.1K_0402_5%
DS_DOCKED_ID <32>
DOCK_MIC <29>
GNDA <7,29,30>
+2.5V_LAN
DOCK_IN
19vdc_2.25A
DOCK_IN
C395
C394
1
2
0.1U_0402_16V4Z
+5VS
1
2
0.1U_0402_16V4Z
12
1 2
0.1U_0805_25V7M
1 2
0.1U_0805_25V7M
+3VS
1
C391
2
C392
1
DIS_INTMIC <29>
C390
0.1U_0402_16V4Z
1
C393
0.1U_0402_16V4Z
2
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36 48Tuesday, Fe b r u a r y 22, 2005
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+5VS +3VS +2.5VS +1.8VS +1.5VS +0.9VS
2
G
12
R56
470_0402_5%
@
13
D
Q8
S
12
R316
330_0402_5%@
13
D
S
2
G
2N7002_SOT23
@
Q26
2N7002_SOT23
@
12
R285
470_0402_5%
@
13
D
Q21
G
S
2
2N7002_SOT23
@
12
1 1
+1.8V +1.8VS
U11
8
D
7
D
6
D
5
1
+
C190
100U_D2_6.3VM
2
2 2
D
1
AO4422_SO8
C185
10U_1206_6.3V7K
2
+1.8V to +1.8VS Transfer
1
1
S
2
S
3
S
4
G
C137
10U_0805_10V4Z
2
1
C136
0.1U_0402_16V4Z
2
1
C135
0.1U_0402_16V4Z
2
1 2
R99 100K_0402_1%
13
D
Q13
SUSP
2
G
2N7002_SOT23
S
+12VALW
R54
470_0402_5%
@
13
D
Q6
SUSP SUSP SUSP SUSP SUSP SUSP
2
G
2N7002_SOT23
S
@
+1.8V
12
R293
470_0402_5%
@
13
D
Q22
SYSON# VR_ON# VR_ON#
2
2N7002_SOT23
G
S
@
12
R55
470_0402_5%
@
13
D
Q7
S
SYSON#
2
G
2N7002_SOT23
@
12
R53
470_0402_5%
@
13
D
Q5
2
G
2N7002_SOT23
S
@
+VCC_CORE +VCCP
12
R315
330_0402_5%@
13
D
Q25
2
2N7002_SOT23
G
@
S
12
R112
470_0402_5%
@
13
D
Q14
S
2
G
2N7002_SOT23
@
SUSP
2
R522
100K_0402_5%
Q59
2N7002_SOT23
+5VALW
G
12
R102
10K_0402_5%
13
D
Q12
2N7002_SOT23
S
1
C574
0.1U_0402_16V4Z
2
E
SUSP#P <42,44>
of
37 48Tuesday, February 22, 2005
0.5
+5VALW
12
R101
10K_0402_5%
SUSP<42>
SUSP#<29,32,38>
+5VALW
12
13
SUSP
D
2
G
S
Compal Electronics, Inc.
Title
DC/DC Interface
Size Document Number Rev
EDX20 LA-2481
Date: Sheet
Q11
2N7002_SOT23
R314
100K_0402_5%@
VR_ON#
Q24
2N7002_SOT23
@
SYSON#
D
13
D
VR_ON
2
G
2
G
+3VALW
1 2
13
S
D
S
+3VALW +3VS
U20
8
A
D
7
D
6
D
5
D
1
AO4422_SO8
C338
10U_1206_6.3V7K
2
U30
8
D
7
D
6
D
5
D
1
AO4422_SO8
C416
10U_1206_6.3V7K
2
3 3
1
+
C334
100U_D2_6.3VM
2
1
+
4 4
C414
100U_D2_6.3VM
2
+3VALW to +3VS Transfer
1
1
S
2
S
3
S
4
G
+5VS+5VALW
1
S
2
S
3
S
4
G
1
0.1U_0402_16V4Z
2
C314
10U_0805_10V4Z
2
1
C318
0.1U_0402_16V4Z
2
+5VALW to +5VS Transfer
1
C410
0.1U_0402_16V4Z
2
C411
1
C313
0.1U_0402_16V4Z
2
R325 56K_0402_5%
13
D
Q28
2
2N7002_SOT23
G
S
1
C412
10U_0805_10V4Z
2
1 2
R389 47K_0402_5%
13
D
Q34
SUSP
2
2N7002_SOT23
G
S
1 2
SUSP
+12VALW
+12VALW
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
B
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SYSON<32,44>
VR_ON<32,45>
C
Page 38
A
SM AR T
Ba t te r y:
1. B A T+
2 . I D
3. B / I
4 .TS
5.S M D
6. SMC
7 . G ND
SM AR T
Ba t te r y:
1. B A T+
2 . I D
3. B / I
4 .TS
5.S M D
6. SMC
7 . G ND
B
C
D
http://hobi-elektronika.net
DOCK_IN
12P_0402_50V8J
PJPC1
1
2
FBM-L18-453215-900LMA90T_1812
1 2
12
PC4
PR9
442_0402_1%
1 2
31
E
PQ1
2
B
2SA1037AK_SC59
C
1
C
PQ2
2
B
2SC2412K_SC59
E
3
PD3
1SS355_SOD323
1 2
13
D
2
PACIN
G
S
PL1
12
PC5
12P_0402_50V8J
PR10
7.32K_0402_1%
1 2
PR15
100K_0402_5%
2
PQ7
RHU002N06_SOT323
12
PC6
560P_0402_50V7K
PQ4
IRLML5103_SOT23
S
G
1 2
13
PQ5
DTC115EUA_SC70
1 2
2
G
1 2
100K_0402_5%
PR21
2
PQ6
P1
12
PC3
560P_0402_50V7K
PR8
22.1K_0402_1%
1 2
PR13
57.6K_0402_1%
1 2
13
D
S
MOLEX_53780-0290
12
PR19
10K_0402_5%
12
13
1 1
2 2
3 3
4 4
PJPD1
1
2
4
G
5
G
3
SINGA_2DC-S028B200
22.1K_0402_1%
PR11
43.2K_0402_1%
12
PR12
40.2K_0402_1%
12
PH1
100K_0603_1%_TH11-4H104FT
2
3
PD2
DAN217_SC59
1
0.1U_0603_25V7K
SPOK<41>
SUSP#<29,32,37>
P1
1
2
3
+12VALW
PR7
12
RHU002N06_SOT323
PQ3
PC9
SPOK
SUSP#
DTC115EUA_SC70
12
PR1
10_1206_5%
12
PD1
RLZ24B_LL34
D
13
2
B540C_SMC
PD26
2 1
B540C_SMC
PD27
2 1
PD4
RB160L-40_SOD106
12
VIN
BATT_A
12
PC1
0.01U_0402_25V7K
PJPB1 battery connector
BATT_B
12
PC7
0.01U_0402_25V7K
B+
PJPB1 battery connector
VSB
PL2
HCB4532K-800T90_1812
1 2
1000P_0402_50V7K
HCB4532K-800T90_1812
1 2
PC2
SUYIN_250263MR007G102ZL
PL3
1000P_0402_50V7K
SUYIN_250263MR007G107ZL
PC8
12
PJP1
12
PJP2
1
2
3
4
5
6
7
1
2
3
4
5
6
7
BATT_A+
1
2
3
4
5
6
7
BATT_B+
BATT_A+
BATT_B+
PR3
1K_0402_5%
1K_0402_5%
PR16
12
12
PR18 100_0402_5%
1 2
PR2
1K_0402_5%
6.49K_0402_1%
1 2
1 2
PR5 100_0402_5%
1 2
PR6
100_0402_5%
1 2
PR14
1K_0402_5%
6.49K_0402_1%
1 2
1 2
1 2
PR20
100_0402_5%
BATT_TEMP1
PR4
BATT_TEMP2
PR17
BATT_TEMP1 <32>
+3VALW
SMB_EC_DA1 <32,34>
SMB_EC_CK1 <32,34>
BATT_TEMP2 <32>
+3VALW
SMB_EC_DA2 <5,32,34,36>
SMB_EC_CK2 <5,32,34,36>
COMPAL ELECTRONICS, INC
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
A
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
C
Bridge batt & Batt conn & DC in
Size Document Number Rev
Date: Sheet of
EDX20 LA-2481
D
38 48Tuesday, February 22, 2005
0.5
Page 39
A
Iadp=0~2.25A(42.75W)
4
PC15
0.1U_0603_25V7K
12
13
D
S
PR155
10K_0402_1%
1 2
PR42
158K_0603_1% @
1
2
36
12
0_0402_5%
0_0402_5%@
P2
1
2
3 6
12
PR24
200K_0402_1%
1U_0603_10V6K
215K_0402_1%
PR29
12
PR33
100K_0402_1%
PACIN
12
DTC115EUA_SC70
1908LDO
12
PR163
12
PR164
PQ9
AO4407_SO8
4
PC17
12
12
PC18
0.1U_0402_16V7K
PR40
10K_0402_5%
PQ17
VCTL
1908LDO
PQ8
AO4407_SO8
47K
2
47K
13
PQ12
DTC115EUA_SC70
RHU002N06_SOT323
PD29
RLZ4.3B_LL34
IREF <32>
PR37
8
7
5
1 3
ACIN<21,32,41>
PACIN
PR27
150K_0402_5%
PQ16
2
G
12
VIN
1 1
PR23
2
G
RHU002N06_SOT323
2 2
PACIN
3 3
4 4
12
47K_0402_5%
13
D
S
PQ14
ACOFF#
2
ACON<43>
DTA144EUA_SC70
PQ11
1SS355_SOD323
PD10
1 2
PR38
22K_0402_5%
1 2
12
100K_0402_1%
ICTL
12
PR184
100K_0402_1%
B
8
7
5
0.1U_0603_25V7K@
12
9.31K_0402_1%
15K_0402_1%
12
13
PACIN
PR31
2
PC13
VIN
PR32
1908LDO
P3
1SS355_SOD323
PD7
12
1 2
12
PR41
100K_0402_1%
FSTCHG<32,40>
150K_0402_1%
PR47
681K_0402_1%
1 2
12
12
0.1U_0603_25V7K
ICTL
12
0_0402_5%
1 2
PR44
100K_0402_5%
VIN
PR46
C
http://hobi-elektronika.net
PR22
1 2
0.01_2512_1%(1W)
12
PC16
PC23
0.01U_0402_16V7K
PR43
1 2
12
12
PR48
20K_0402_1%
B+
1 2
PL4
HCB4532K-800T90_1812
12
PC14
0.1U_0603_25V7K@
PU1
MAX1908ETI_QFN28
1
12
PC28
0.1U_0402_16V7K
17
12
4
3
12
15
13
11
8
10
9
28
7
PR39
1K_0402_1%
1 2
12
12
PC29
0.1U_0402_16V7K
DCIN
CELLS
REF
CLS
REFIN
VCTL
ICTL
ACOK#
SHDN#
ACIN
ICHG
IINP
CCV
0.001U_0402_50V7M
CCI
CCS
6
5
MAX1908-CCS
12
12
PC26
0_0402_5%
PR45
10K_0402_5%
PR28
VCTL
0_0402_5%
PR35
1 2
Vin Detector
Min. typ. Max.
1
2
PGND
GND
20
14
PC27
0.001U_0402_50V7M
PC10
CSSP
CSSN
DLOV
BATT
DLO
BST
LDO
CSIP
CSIN
1
1
PC11
2
2
10U_1206_25V6M
10U_1206_25V6M
27
26
25
DHI
23
LX
21
24
22
2
1908LDO
19
18
16
PC12
10U_1206_25V6M
PR186 0_0402_5%
PC24
1U_0603_10V6K
1 2
BATT+
8
7
6
5
G2
D1/S2/K
D1/S2/K
D1/S2/K
AO4912_SO8
12
33_1206_5%
S1/A
PR36
D
PQ15
12
E
Charger
PQ10
AO4407_SO8
1
2
3 6
PR26
10K_0402_5%
ACOFF#
1
D2
2
D2
3
G1
4
1 2
16UH_D104C-919AS-160M_3.7A_20%
PC19
0.1U_0603_25V7K
1 2
12
PD9
1SS355_SOD323
PC25
1U_0805_25V4Z
1 2
BATSELB_A#
H
L
Charge mode
CC-CV
Pulse charge.
8
7
5
4
PR25
47K_0402_5%
1 2
1 2
13
10K
10K
DTC114EKA_SC59
PL5
PQ13
12
RLZ22B_LL34@
PD6
1SS355_SOD323 @
1 2
1 2
2
1SS355_SOD323
PR30
0.015_2512_1%
1 2
Charge voltage
4S CC-CV MODE : 16.8V
Change current.
ICTL
1.043V
1.656V
VCTL Change voltage.
1908LDO.
2.0769V
1.5809A
2.5097A
16.8V
17.0V
VIN
PD5
PD8
ACOFF<32>
BATT+
12
12
12
PC21
PC20
4.7U_1206_25V6K
PC22
4.7U_1206_25V6K
Batt pack
1P4S:2250mAH/cell
2P4S:1800mAH/cell
Note.
PR163=0,PR164=@
PR163=160K
PR164=100K
4.7U_1206_25V6K
L-->H V 17.85V V
H-->L V 16.98V V
COMPAL ELEC TRONICS, INC
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
A
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Charger
Size Document Number Rev
Date: Sheet
EDX20 LA-2481
E
of
39 48Tuesday, Februa r y 22, 2005
0.5
Page 40
A
B
C
D
http://hobi-elektronika.net
PACIN
12
PR50
1 1
2 2
412K_0603_1%
PC121
0.1U_0402_16V7K
12
BATT+
PR51
100K_0402_1%
PR49
309K_0402_1%
1 2
RTCVREF
12
1 2
VS
PU7A
8
LM393M_SO8
3
P
+
O
2
-
G
4
PC122
0.01U_0402_16V7K
1
PR166
10K_0402_1%
1U_0805_25V4Z
PC30
VL
10K_0402_1%
1 2
1 2
VIN
PR165
PACIN
12
PD30
1SS355_SOD323
1 2
1 2
PD31
1SS355_SOD323
PU2
11
ADPIN
12
ADPPWR
13
REVBLK
16
EXTLD
14
ADPBLK
18
DISBAT
17
CHGIN
19
CHGA
20
CHGB
23
DISB
24
DISA
22
BATB
25
BATA
27
GND
10
AIRDET
MINVA
1
12
12
9
PR160
10K_0402_1%
PC120
0.01U_0402_16V7K
ACDET
CHRG
BATSEL
RELRN
OUT2
OUT1
OUT0
BATSUP
NC
NC
VDD
MINVB
MAX1538_QFN28
2
5
3
4
8
7
6
26
21
15
28
1 2
PR54
0_0402_5%
PR167
0_0402_5%
1 2
PR52
0_0402_5%@
1 2
1538VCC
12
PC31
1U_0805_25V4Z
1538VDD
1908LDO
PR55
100K_0402_5%
1 2
PR56
100K_0402_5%
1 2
PR57
100K_0402_5%
1 2
BATT_OUT2
BATT_OUT1
BATT_OUT0
1538VDD
1 2
PR53
0_0402_5%
FSTCHG <32,39>
BATSELB_A# <32>
OVP voltage :
LI-3S :17.8V----BATT-OVP=1.9758V
BATT-OVP=0.111*BATT+
2
4
3
1
S1
S2
G2
G1
PQ18
3 3
4 4
FDS4935_SO8
A
D2
D1
D2
D1
8
5
7
6
8
5
7
6
D2
D1
D2
D1
G2
S1
S2
G1
2
3
1
4
BATT_ABATT_B
RHU002N06_SOT323
PQ19
FDS4935_SO8
PQ25
1 2
13
D
S
PR91
3K_0402_5%
1 2
PR93
2K_0402_5%
2
G
PR92
3K_0402_5%
1 2
PR101
2K_0402_5%
1 2
RHU002N06_SOT323
PQ26
13
D
2
G
S
100K_0402_1%
PC33
1 2
0.047U_0603_50V7K
BATT_UVM <43>
B
PR59
1 2
1 2
PC34
0.047U_0603_50V7K
12
PR58
100K_0402_1%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
12
PC32
1U_0603_10V6K
VS
PU3B
LM358A_SO8
7
5
+
0
6
-
C
BATT_OVP<32>
BATT+
VS
12
PU3A
LM358A_SO8
8
3
P
+
1
0
2
-
G
4
COMPAL ELEC TRONICS, INC
Title
Size Document Number Rev
Date: Sheet
12
PR60
845K_0603_1%
12
PC35
PR61
300K_0603_0.1%
0.01U_0402_25V7K
12
PR62
143K_0402_1%
Batt Selector & OVP
EDX20 LA-2481
D
12
PC36
0.01U_0402_25V7Z
40 48Tuesday, Febru ary 22, 2005
0.5
of
Page 41
A
B
C
D
E
http://hobi-elektronika.net
B+
1 1
2200P_0402_50V7K @
2 2
10UH_D104C-919AS-100M_4.5A_20%
+3VALWP
PC53
1
3 3
+
2
150U_D2_6.3VM
PL6
FBM-L18-453215-900LMA90T_1812
1 2
12
PC41
PD15
PR76
SKUL30-02AT_SMA
3.57K_0402_1%
2 1
B+++
1
PC42
2
PL8
1 2
1 2
+3VALWP Choke DCR = 26.5m[.
Current limit Threshold Min.=80 mV Mx.=120mV.
OCP Min.= 80mV/1.27K*(1.27K+1.27K)/26.6=6.038A
OCP Max.=120mV/1.27K*(1.27K+1.27K)/26.5=9.056A
PC39
0.1U_0603_25V7K
1 2
10U_1206_25V6M
12
12
PR79
10K_0402_1%
PC52
PR69
100P_0402_25V8K
1M_0402_1%
12
PC49
47P_0402_50V8J
1 2
PQ20
1
D2
2
D2
3
G1
4
S1/A
AO4912_SO8
1 2
PR67
1.27K_0402_1%
PR68
1.27K_0402_1%
ACIN<21,32,39>
47K_0402_5% @
PR168
D1/S2/K
D1/S2/K
D1/S2/K
8
G2
7
6
5
LX3
12
0.47U_0603_16V7K
PC50
12
PR72
619_0402_1%
1 2
1 2
PR73
10K_0402_5%
PR75
300K_0402_5%@
VS
12
PR122
0_0402_5%
12
12
DL3
12
PC59
1U_0805_25V4Z
@
12
PR64
0_0402_5%
DH3
12
PC54
1000P_0402_50V7K
PD13
1SS355_SOD323
PR185
10_1206_5%
12
PC46
0.1U_0603_25V7K
PU4
25
BST3
27
DH3
26
LX3
24
DL3
1
CSH3
2
CSL3
3
FB3
10
SKIP#
23
SHDN#
7
TIME/ON5
28
RUN/ON3
MAX1902EAI_SSOP28
12
PC58
2.2U_0805_10V6K
VS
VL
1 2
12
22
21
VL
V+
GND
8
MAINPWRON <20,43>
2
3
PD12
DAP202U_SOT323
1
4.7U_0805_6.3V6K
PC43
12
ACIN
12OUT
VDD
BST5
DH5
LX5
DL5
PGND
CSH5
CSL5
FB5
SEQ
REF
SYNC
RST#
4
5
18
16
17
19
20
14
13
12
15
9
6
11
PR77
0_0402_5%
2
RHU002N06_SOT323@
PR193
@
2.7K_1206_5%
G
PQ40
1 2
BST51BST31
12
13
D
S
+12VALWP
12
PC48
12
PC55
4.7U_0805_6.3V6K
SPOK < 38>
PC38
470P_0805_100V7K @
1 2
FLYBACKSNB
12
PR63
22_1206_5%@
PC40
0.1U_0603_25V7K
1 2
PR71
12
12
B+++
PC44
2200P_0402_50V7K
@
1
PC45
2
10U_1206_25V6M
PD16
SKS10-04AT_TSMA
PQ21
8
G2
7
D1/S2/K
6
D1/S2/K
5
D1/S2/K
AO4912_SO8
PR66
0_0402_5%
1 2
4.7U_1206_25V6K
BST5
DH5
2.5VREF
LX5
DL5
PC51
0.47U_0603_16V7K
12
PR78
10.2K_0402_1%
D2
D2
G1
S1/A
12
PR74
698_0402_1%
12
12
PR81
10K_0402_1%
1
2
3
4
1.54K_0402_1%
12
PC57
100P_0402_25V8K
+5VALWP Choke DCR = 40mȍ.
+3.3V/+5V/+12V
PC37
2.2U_1206_25VFZ
1 2
12
PD11
EC11FS2_SOD106
1 4
12
12
PR70
2M_0402_1%
2 1
10UH_SDT-1050P-100-118_3.5A_30%
3 2
PC47
47P_0402_50V8J
1
+
2
150U_D2_6.3VM
PL7
+5VALWP
PC56
Current limit Threshold Min.=80 mV Mx.=120mV.
OCP Min.= 80mV/0.698K*(1.54K+0.698K)/40=6.412A
4 4
OCP Max.=120mV/0.698K*(0.698K+1.54K)/40=9.593A
RS2(PR64)=RS1(PR58)*RS3(PR61)/(RS1+RS3)
L/RL(DCR)=RS1*RS3(PR61)/(RS1+RS3)*Cs(PC56)
COMPAL ELEC TRONICS, INC
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
A
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
+3VALWP & +5VALWP & +12VALWP
Size Document Number Rev
Date: Sheet
EDX20 LA-2481
E
of
41 48Tuesday, Februa r y 22, 2005
0.5
Page 42
5
4
3
2
1
http://hobi-elektronika.net
+1.8V
PR83
1K_0402_1%
1 2
PR194
12
4.7U_0805_6.3V6K
+5VS
PC144
0_0402_5%@
1 2
12
PR82
1K_0402_1%
12
PL16
FBM-L11-322513-151LMAT_1210
1 2
PR114
12
PC62
0.1U_0603_25V7K
1
+
PC63
2
220U_B2_2.5VM
@
PC141
0.01U_0402_25V7Z
1 2
PU6
10
2
1
3
4
MAX8576EUB
12
PC61
PR84
0_0402_5%@
0_0402_5%@
PR112
PR107
PR111
10U_1206_6.3V7K
2
G
MAX8578_IN
12
PC143
3300P_0402_50V7K
13
D
PQ23
RHU002N06_SOT323
S
B+
3.32K_0402_1%
D D
1 2
2
B
1 2
0_0402_5%
+5VS
1 2
1 2
1 2
0_0402_5%
1
C
PQ42
2SC2411K_SC59
E
3
SUSP<37>
C C
PR199
200K_0402_5%
1 2
PR195
10K_0402_5%
RTCVREF
B B
VCCP_ON#<32>
PC65
OCSET
SS
FB
VCC
GND
12
0.1U_0603_25V7K
PU5
VIN1VCNTL
2
GND
3
VREF
4
VOUT
APL5331KAC-TR_SO8
+0.9VSP
12
PC64
4.7U_0805_6.3V6K
12
PC66
2200P_0402_50V7K
@
9
IN
8
DH
7
LX
5
DL
6
BST
PD14
12
1SS355_SOD323
6
5
NC
7
NC
8
NC
9
TP
12
PC139
1 2
4.7U_1206_25V6K
1 2
MAX8578_IN
1 2
4.7_0402_5%
PR85
1 2
PC70
0.1U_0603_25V7K
12
PC140
4.7U_1206_25V6K
PC142
1U_0805_25V4Z
866_0402_1%
+3VALW
PC60
1U_0603_10V6K
PR113
0_0402_5%
1 2
8
G2
7
D1/S2/K
6
D1/S2/K
5
D1/S2/K
PR198
+VCCPP
PQ41
1
D2
2
D2
3
G1
4
S1/A
AO4912_SO8
10UH_D104C-919AS-100M_4.5A_20%
PL17
PR34
750_0402_5%
PC68
12
12
1 2
12
PR196
7.15K_0402_1%
1 2
1 2
12
6800P_0402_25V7K
SUSP#P<37,44>
PC88
1000P_0402_50V7K
PR197
1
30_0402_5%
+
2
PC74
0.1U_0603_25V7K
+3VALW
PC118
4.7U_0805_6.3V6K
PR80
0_0402_5%
1 2
PC67
1000P_0402_50V7K@
12
+VCCPP
PC72
330U_D2E_2.5VM
12
XC61CN0902MR
1
VDDIN
12
PU14
PWDOUT
VSS
3
PU12
VIN2VO
1
EN
5
GND
6
GND
G965-18P1U_SO8
+3VS
2
ADJ
GND
GND
12
PR100
47K_0402_5%
3
4
7
8
12
11K_0402_1%
12
10K_0402_1%
VCCP_POK <32>
PR156
PR157
+2.5VSP
+2.5VSP
12
PC119
22U_1206_16V4Z
PJP3
2MM
21
+12VALWP
PJP4
+5VALWP
+3VALWP +3VALW
+1.8VP +1.8V
+2.5VSP
+VCCPP +VCCP
+0.9VSP
+1.5VSP
3MM
PJP5
3MM
PJP6
3MM
PJP7
3MM
PJP8
3MM
PJP9
3MM
PJP10
3MM
+12VALW
21
+5VALW
21
21
21
+2.5VS
21
+0.9VS
21
21
+1.5VS
A A
COMPAL ELEC TRONICS, INC
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
5
4
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
+VCCPP & +0.9VSP & +2.5VSP
Size Document Number Rev
Date: Sheet
EDX20 LA-2481
1
of
42 48Tuesday, Febru a r y 22, 2005
0.5
Page 43
A
B
C
D
http://hobi-elektronika.net
PH2 under CPU botten side :
CPU thermal protection at 80 degree C
Recovery at 44(45) degree C
1 1
2.15K_0402_1%
12
PC76
VSB
BATT_A
BATT_B
200_0805_5%
CHGRTCP
1000P_0402_50V7K
PR104
EC_ON#<33>
2 2
3 3
4 4
PR96
PH2
10KB_0603_1%_TH11-3H103FT
RB751V_SOD323
1N4148_SOD80
1N4148_SOD80
12
12
A
VL
12
16.9K_0402_1%
1 2
12
PC77
1U_0603_10V6K
12
PD28
12
PD19
12
PD21
PR106
100K_0402_5%
1 2
PR108
22K_0402_5%
G920AT24U_SOT89
2
PC86
1U_0805_25V4Z
PR97
IN
TM_REF1
12
1 2
PU9
GND
1
1538VCC
OUT
150K_0402_1%
12
PR99
150K_0402_1%
12
PC85
0.22U_1206_25V7K
3
47K_0402_1%
1 2
5
6
12
PR98
TP0610K_SOT23
S
G
RTCVREF
12
PR94
VS
PU7B
8
LM393M_SO8
P
+
7
O
-
G
4
VL
VIN
PQ27
D
13
2
1 2
PR109
300_0402_5%
PC87
4.7U_0805_6.3V6K
12
PC75
0.1U_0603_25V7K
PD20
1N4148_SOD80
1 2
12
PR102
33_1206_5%
12
PC83
0.1U_0603_25V7K
CHARGER_THERM<32>
VS
1 2
PR110
300_0402_5%
VL
PR95
47K_0402_1%
1 2
MAINPWRON
PR187
10K_0402_1%
12
PC145
1000P_0402_50V7K
CHGRTC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
BATT_UVM<40>
VL
12
12
PH3
10KB_0603_1%_TH11-3H103FT
MAINPWRON<20,41>
ACON<39>
ACIN
Precharge detector
Min. typ. Max.
H-->L 14.556V 14.807V 15.372V
L-->H 15.276V 15.836V 16.411V
BATT ONLY
Precharge detector
Min. typ. Max.
H-->L 5.044V 5.096V 5.205V
L-->H 6.008V 6.124V 6.243V
VL
D
S
10K_0402_5%
2
3
PD33
RB715F_SOT323
12
PR65
100K_0402_5%
PQ22
RHU002N06_SOT323
13
2
G
1 2
VL
12
PR204
1
PC147
0.1U_0603_25V7K
C
PC73
0.022U_0402_16V7K
VL
PR86
470K_0402_1%
RHU002N06_SOT323
13
D
2
G
S
PD17
PU13A
LM393M_SO8
1
O
12
VL
PQ24
1N4148_SOD80
12
VIN
2M_0402_1%
VS
8
P
+
-
G
4
34K_0402_1%
VL
VS
12
PU13B
PR88
47K_0402_1%
LM393M_SO8
PC78
1 2
0.022U_0402_16V7K
PR87
470K_0402_1%
PD32
1N4148_SOD80
PR192
12
12
PC71
0.1U_0603_25V7K
3
2
12
PC69
1000P_0402_50V7K
12
PR209
PR210
66.5K_0402_1%
12
1 2
8
P
7
O
G
4
1.5K_1206_5%
1 2
1.5K_1206_5%
1 2
1.5K_1206_5%
1 2
1.5K_1206_5%
1 2
12
PR206
140K_0402_1%
RHU002N06_SOT323
13
D
PQ35
2
G
S
+
-
PR200
PR201
PR202
PR203
5
6
B+
13
VL
PR205
412K_0603_1%
12
PR207
634K_0603_1%
1 2
PR208
47K_0402_5%
2
PQ43
DTC115EUA_SC70
12
B+
12
COMPAL ELECTRONICS, INC
Title
RTC batt & +1.2VP & OTP
Size Document Number Rev
Date: Sheet of
EDX20 LA-2481
D
BATT_B
12
PR89
499K_0402_1%
12
PR90
499K_0402_1%
PC79
100P_0402_50V8J
PC146
1000P_0402_50V7K
PACIN
+5VALW
43 48Tuesday, February 22, 2005
0.5
Page 44
5
4
3
2
1
http://hobi-elektronika.net
D D
1845_B+
PJP11
3MM
21
12
12
PR212
20_0603_5%
1 2
9
VDD
UVP
BST2
DH2
LX2
DL2
CS2
OUT2
FB2
ON2
PGOOD
TON
ILIM2
ILIM1
REF
PR218
10
33K_0402_1%
PR219
15K_0402_1%
12
21
19
18
17
20
16
15
14
12
7
5
13
3
+5VALW
12
12
12
PC100
PR213
0_0402_5%
1 2
BST2.5A
DH2.5
12
PR220
100K_0402_1%
4.7U_0805_6.3V6K
BST2.5B
12
PR221
100K_0402_1%
PC156
0.1U_0603_25V7K
12
1 2
PR217
0_0402_5%
PQ45
8
7
6
5
AO4912_SO8
LX2.5
G2
D1/S2/K
D1/S2/K
D1/S2/K
SUSP#P <37,42>
S1/A
D2
D2
G1
DL2.5
12
1
2
3
4
PL19
4.7UH_D104C-919AS_4R7N_5.2A_20%
1 2
PC150
2200P_0402_50V7K
@
10K_0402_1%
12
PR215
12
PC151
4.7U_1206_25V6K
12
12
D2
D2
G1
S1/A
D1/S2/K
D1/S2/K
D1/S2/K
PC149
4.7U_1206_25V6K
8
G2
7
6
5
0.1U_0603_25V7K
1
PD34
DAP202U_SOT323
2
3
12
4
BST1
V+
DH1
LX1
DL1
MAX8743EEI_QSOP28
CS1
OUT1
FB1
ON1
GND
OVP
8
23
0.22U_0603_10V7K
1U_0805_25V4Z
PC154
12
22
VCC
PU10
SKIP
6
PC162
0.1U_0603_25V7K
1 2
12
0.01U_0402_25V8K @
PR211
0_0402_5%
PR216
0_0402_5%
PC161
PC155
SYSON<32,37>
PC153
25
26
27
24
28
1
2
11
12
12
PC148
2200P_0402_50V7K
@
C C
+1.8VP
B B
4.7UH_D104C-919AS_4R7N_5.2A_20%
1
12
+
PC157
2
PC158
150U_D2_6.3VM
4.7U_0805_6.3V6K
@
PL18
1 2
PQ44
1
2
3
4
AO4912_SO8
PC152
4.7U_1206_25V6K
PR214
@
5.1K_0402_1%
B+
+1.5VSP
1
12
+
PC159
PC160
2
4.7U_0805_6.3V6K
150U_D2_6.3VM
A A
COMPAL ELEC TRONICS, INC
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
5
4
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
+1.5VSP & +1.8VP
Size Document Number Rev
Date: Sheet
EDX20 LA-2481
1
of
44 48Tuesday, Febru a r y 22, 2005
0.5
Page 45
A
8
D E E P E R
S L E E P
I N P U T SB O O T
VOL TA GE
I N P U T S
M UX
CON TR OL
B
C
D
E
http://hobi-elektronika.net
10_0402_5%
VCC
10
9
1 2
VCC
PGND
OAIN+
OAIN-
ILIM
TON
TIME
DDO
GND
CSN
12
BST
V+
DH
LX
DL
FB
CSP
PR154
10K_0402_1%
PR128
1 2
PC105
0.22U_0402_10V4Z
PD23
30
1SS355_SOD323
VDD
31
1 2
PR133
2.2_0402_5%
34
33
CPULX
32
40
1 2
PR103
0_0402_5%
29
39
27
28
11
17
100P_0402_25V8K
16
15
18
4700P_0402_25V7K
19
1 2
PC114
PC115
PR129
100K_0402_1%
1 1
PR131
0_0402_5%
CPU_VID0<6>
CPU_VID1<6>
CPU_VID2<6>
CPU_VID3<6>
CPU_VID4<6>
CPU_VID5<6>
1 2
PR132 0_0402_5%
1 2
PR134 0_0402_5%
1 2
PR135 0_0402_5%
1 2
PR136 0_0402_5%
1 2
PR139 0_0402_5%
1 2
PR142 0_0402_5%
1 2
PR143 0_0402_5%
1 2
PR145 0_0402_5%
1 2
PR146 0_0402_5%
1 2
PR149 0_0402_5%
1 2
PR151 0_0402_5%
1 2
PR144
10K_0402_5%
1 2
PM_DPRSLPVR<21>
H_DPSLP#<5,20>
VR_ON<32,37>
SYSPOK<32>
2 2
,15,21,32>
+3VALW
VGAT E
CLKEN#
3 3
1 2
VCC
PC117
47P_0402_50V8J
26
25
24
23
22
21
4
5
6
1
2
3
35
20
7
37
36
38
1 2
13
D0
POS
D1
D2
D3
D4
D5
S0
S1
S2
MAX1907EGL_QFN40
B0
B1
B2
SUS
DPSLP
SHDN
IMVPOK
SYSPOK
CLKEN
CC
8
12
REF
90.9K_0402_1%
12
12
0.22U_0402_10V4Z
+VCC_CORE
PR130
1.05K_0603_1%
PU11
REF
PR153
1 2
PC116
14
NEG
Delta I=0.0528A REF MAX=2.01V*10K/(10K+90.2K)=0.2005V
REF Min=1.99V*10K/(10K+90.2K)=0.1986V
Iimit Max=0.2005V*10/1.485mȍ+1/2 Delta=13.528
Iimit Max=0.1986V*10/1.515mȍ+1/2 Delta=13.135
4 4
1 2
12
0.1U_0603_25V7K
PC112
1 2
VCC
PR140
100K_0402_1%
+5VALW
12
PC106
1U_0603_10V6K
12
PC113
12
1 2
12
CPU_B+
PC80
1U_0805_25V4Z
PR137
0_0402_5%
12
2200P_0402_50V7K
PR148
1K_0402_1%
12
PR150
200_0402_1%
12
PR152
200_0402_1%
5
4
5
4
1U_0805_25V4Z
D8D7D6D
IRF7821_S08
S1S3G
S
2
D8D7D6D
S1S3G
S
IRF7832_SO8
2
PC81
PQ32
PQ33
PC107
10U_1206_25V6M
12
5
S
4
2
PC108
10U_1206_25V6M
1
1
2
2
10U_1206_25V6M
12
PL15
1 2
PD24
EC31QS04
510_0603_1%
1K_0402_1%
1 2
PR141
PR147
0.56UH_MPC1040LR56 23_21A_20%
D8D7D6D
S1S3G
PQ34
IRF7832_SO8
2200P_0402_50V7K
1
2
PC109
12
PC110
12
PR138
0.0015_2512_1%
12
HCB4532K-800T90_1812
12
PC111
0.1U_0603_25V7K
PL14
1 2
D4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
+
+
PC136
68U_25V_M
2
2
@
D1
D3 D5 = 0
D2
0
0
0
0
0
0
0
0
1
0
1
0
1
0
0
0
0
1
0
1
1
11
0
0
1
0
1
0
0
1
1
0
1
1
1
0
1
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
1
0
0
1
0
1
0
0
0
0
1
0
1
1
11
0
0
1
0
1
0
0
1
1
0
1
1
1
0
1
1
0
1
1
1
1
1
1
CPU-CORE
B+
1
+
PC138
PC137
68U_25V_M
68U_25V_M
2
@
@
+VCC_CORE
PD25
RB051L-40_SOD106
D0
D5 = 1
0
1.196
1
1.180
0
1.164
1
1.148
0
1.132
1
1.116
0
1.100
1
1.084
1.068
0
1.052
1
1.036
010
1.020
1
1.004
0
1
0.988
0.972
0
0.956
1
0
0.940
1
0.924
0
0.908
1
0.892
0
0.876
1
0.860
0
0.844
1
0.828
0
0.812
0.796
1
0.780
010
0.764
1
0.748
0
1
0.732
0.716
0
0.700
1
12
1.708
1.692
1.676
1.660
1.644
1.628
1.612
1.596
1.580
1.564
1.548
1.532
1.516
1.500
1.484
1.468
1.452
1.436
1.420
1.404
1.388
1.372
1.356
1.340
1.324
1.308
1.292
1.276
1.260
1.244
1.228
1.212
COMPAL ELEC TRONICS, INC
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
A
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
+CPU_CORE
Size Document Number Rev
Date: Sheet
EDX20 LA-2481
E
of
45 48Tuesday, Februa r y 22, 2005
0.5
Page 46
A
B
C
D
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http://hobi-elektronika.net
Version change list (P.I.R. List) Page 1 of 1
Reason for change Rev. PG# Modify List B.Ver# PhaseFixed IssueItem
1 1
1
Change FAN design
2 Delete unused parts 7 Del C285
0.4 5
0.4
Change FAN circuit to PWM contrl
3
4
5
6
7
2 2
8
Save more power in S3 battery mode
9
10
Change CPU Ref Location name
Delete unused parts
Design Change
Add LAN power control MOSFET
Add MOS on Docking USB_OVC pins
0.4
0.4
0.4
0.4
0.4
0.4
0.4
0.4
0.4
12
Change CPU Ref location name from JP18 to U15
Del R252,Del PID0 net on JP20 pin 2617
Change PID0 net name to ICH_GPIO33Design Change
21
Add Q62(2N7002) to contrl ISOLATE# pin
27
Add net ISOLATE# on U39 pin23
Del D11,R37724Delete SD card LED
Add Q63(AO3402),Q64(2N7002),R527(10K_0402),C575(0.01uF_0402)27
Add Q65,Q66,Q67 on USB_OVC#3, USB_OVC#4, USB_OVC#536
Swap JP27,JP22 pin assignment36ME change cable design to FFC
3011
Swap JP25ME change cable design to FFC
30 Depop R245, Pop R243decrease Audio Gain setting 0.4
13
14
3 3
15
16
17
18
19
20
21
22
4 4
23
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SEC RET INFOR MATI ON. T HIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
PIR
Size Document Number Rev
EDX20 LA-2481
Date: Sheet of
46 48Tuesday, February 22, 2005
E
0.5
Page 47
A
B
C
D
E
http://hobi-elektronika.net
Version change list (P.I.R. List) Page 1 of 1
Reason for change Rev. PG# Modify List B.Ver# PhaseFixed IssueItem
1 1
1
2 33 Add U54,R533,534,R535,R536,R537,C576,C57 7,C578,C579
Del MOS on Docking USB_OVC pins
Add Docking USB_OVC circuit
0.5
0.5
Del Q65,Q66,Q67,Q68 on USB_OVC#3, USB_OVC#4, USB_OVC#536
3
4
5
6
7
2 2
8
Cost-Down
Design Change
Design ChangeExternal VGA display quality
Design Change
0.5
0.5
0.5
0.5 Change R1160 to 5.1K ohm(EE Change List by Motion item 2)Support new version audio driver
Material Change 0.5 32 Change Y6 to KDS_SJ132P7KB10 part.(TXC EOL)
9
Del C2527
Change USB Connector type31
Change R36 to 220 ohm(EE Change List by Motion item 1)
10
36
5 Change CPU to C0 step
Change R14,R15 to 47 ohm310.5Design Change
10
11
12
13
14
3 3
15
16
17
18
19
20
21
22
4 4
23
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SEC RET INFOR MATI ON. T HIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
PIR
Size Document Number Rev
EDX20 LA-2481
Date: Sheet of
47 48Tuesday, February 22, 2005
E
0.5
Page 48
A
B
C
D
E
http://hobi-elektronika.net
Version change list (P.I.R. List) Page 1 of 2
Reason for change Rev. PG# Modify List B.Ver# PhaseFixed IssueItem
1 1
Add the pre-charge circuit.
1
Pre-charge function fail.
1.Add the Pre-charge circuit.
Add the PD32,PR188,PR189,PR190,PR191,PR192,PR182,PD33,
PC71,PC127,PC12,PR194,PR87,PR196,PQ35,PR198,PR199,PR197,
PQ38
DVT0.30.3 43
To adjust sequence for +5VALWP and +3VALWP.
2
Chnage the power solution for +VCCP,+1.8VP
3
and +1.5VSP.
4
2 2
Delete the circuit of 1.2VP.
To adjust the input-current limit.
5
The jumping cursor when CPU_CORE heavy
6
loading.
To adjust sequence for +5VALWP and +3VALWP.
Solve Digitizer issue.
Because H/W donot need.
Change the input-cuurrent from 3A to 2.25A
0.3 0.3
0.3
0.3
0.3 39
0.4 45 0.4 DVT2
1.Delete PC59.
41
2.Change the PR122 from 100K to 0.
1.Change the control IC of +1.5VALWP from FAN5234 to
MAX8743.
2.Change the control IC of +1.8VP from ISL6227 to
42,44
MAX8743.
3.Change the control IC of +VCCPP from ISL6227 to
MAX8576.
1.Delete the PC100,PQ29,PR121,PR122,PC99,PC101,PR123
43
,PR127,PQ30,PR158,PC102,PR125,PC103.
1.Change the PR29 from 150K to 232K.
1.Change the PL15 form TOKIN .56UH to Panasoic .36UH.Improve Digitizer issue.
0.3
0.3
0.3
DVT
DVT
DVT
DVT
1.Add the 2n7002 on PQ22,PQ24,PQ25 and PQ26.
0.4 40,43
2. Add the 2K_0402_5% on PR93 and PR101.
3. Add the 3K_0402_5% on PR91 and PR92.
4.Add the 470K_0402_5% on PR86 and PR87.
The system has shut down issue when
7
swap battery.
The max1538 has some issue when sawp battery.
So add the one shot circuit to improve the issue.
5.Add the 100K_0402_5% on PR65.
6.Add the 47K_0402_1% on PR88.
DVT20.4
7.Add the 499_0402_1% on PR89 and PR90.
8.Add the 1N4148 on PD17.
3 3
Battery drain issue when battery only
8
on system off.
It did not turn off the +VCCP (1.05V) power no matter
system was ON or OFF.Add pill down resistor.
0.4 0.4 DVT2
9.Add the .022U_0402_16V on PC73 and PC78.
10.Add the 100P_0402_50V on PC79.
1.Add the resistor on the PR199 and value is 100K_0402_5%.
42
9
Disable Vin OVP function. Disable Vin OVP function.
10
Change Main battery connect. For ME request.
11.
4 4
Because the FDS4935A will phase out. Because the FDS4935A will phase out. 1.Change the main battery from SUYIN_250263MR007G102ZL to
12.
A
Improve Digitizer issue.The customer request add the cap.
0.4 0.4 DVT239
0.4
0.4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SEC RET INFOR MATI ON. T HIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
1.Add the 1U_0805_25V on PC80 and PC81.
1.Delete the PD5 RLZ22B_LL34.
2.Delete the PD6 1SS355_SOT323.
1.Change the main battery from SUYIN_250263MR007G102ZL to
39
SUYIN_250263MR007G110ZR.
40
SUYIN_250263MR007G110ZR.
D
0.4 DVT2
Compal Electronics, Inc.
Title
POWER-PIR
Size Document Number Rev
EDX20 LA-2481
Date: Sheet of
DVT20.40.4 45
DVT20.4
0.5
48 48Tuesday, February 22, 2005
E
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