Compal LA-2421, Compaq Presario R4000, Pavilion zv6000 Schematic

Page 1
A
1 1
2 2
B
C
D
E
Compal confidential
Schematics Document
AMD K8 with
3 3
4 4
A
ATI RS480M+ATI SB400
2005-01-04
REV:0.6
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
LA-2421
Cover Sheet
E
of
156Wednesday, January 05, 2005
Page 2
A
Compal confidential
File Name : LA-2421
B
C
D
E
Thermal Sensor
1 1
LVDS Panel Interface
page 17
ADM1032
Fan Control
page 6
page 4
AMD K8
939-pin
page 4, 5, 6, 7
HT 16x16 1000MHZ
ATI-RS480M
705 BGA
2 2
CRT & TV OUT
page 18
page 11, 12, 13, 14
A-Link Express 2 x PCIE
VGA DDR X2
page 15
ATI-SB400
IDSEL:AD18 (PIRQF#,GNT#3,REQ#3)
IDSEL:AD16 (PIRQE#,GNT#0,REQ#0)
TSB43AB22 IEEE 1394
3 3
page 27
Mini PCI socket
page 29
RTL 8100CL
3.3V 33 MHz
IDSEL:AD22 (PIRQG#,GNT#1,REQ#1)
LAN
page 28
CardBus Controller
TI PCI6411
RTC CKT.
page 19
RJ45 CONN
page 28
Slot 0
page 25
Power OK CKT.
page 40
PCI BUS
IDSEL:AD20 (PIRQE#/F#/G#/H#,GNT#2,REQ#2)
page 24
Card reader
page 25
Touch Pad
564 BGA
page 19, 20, 21, 22
LPC BUS
ENE KB910(L)
page 37, 38
Int.KBD
page 36
Memory BUS(DDR)
2. 5V DDR- 200
2. 5V DDR- 200
1 x PCIE
USB2.0
AC-LINK
ATA-100 Primary IDE
ATA-100 Secondary IDE
page 36
DDR-SO-DIMM-0
BANK 0, 1, 2, 3
DDR-SO-DIMM-1
BANK 0, 1, 2, 3
page 8,10
page 9,10
New Card Connector
USB conn X4
BT Conn
Audio CKT
HDD Connector
CDROM Connector
page 26
page 33
page 31
page 30
page 34
page 34
Clock Generator ICS 951412
page 16
RJ45 CONN
page 31
MODEM
page 31
AMP & Audio Jack
page 32
SPR CONN.
page 41
*RJ45 CONN *MIC IN JACK *LINE OUT JACK *1394 CONN *SPDIF CONN *DC JACK *TVOUT CONN *USB CONN x1
Power On/Off CKT.
page 36
DC/DC Int erface CKT.
4 4
page 42
Power Circuit DC/DC
page 43~49
A
B
EC I/O Bu ffer
page 39
BIOS
page 39
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
LA-2421
Block Diagram
E
of
256Wednesday, January 05, 2005
Page 3
Voltage Rails
power plane
State
+12VALW
+5VALW
+3VALW
+1.8VALW
+5V
+2.5V
+1.25V
A
+5VS
+3VS
+2.5VS
+1.8VS
+1.5VS
+2.5VDDA
+CPU_CORE
+1.2V_HT
S0
S1
S3
S5 S4/AC
S5 S4/AC don't exist
O MEANS ON
X MEANS OFF
O
O
O
O
X
OO
OO
O
X
XX
XX
PCI Devices
1 1
INTERNAL
DEVICE
SMBUS IDE LPC I/F PCI to PCI AC97 AUDIO AC97 MODEM B OHCI#1 USB OHCI#1 USB EHCI USB SATA#1 SATA#2
IDSEL # PIRQREQ/GNT #
A
B
D D D A A
EXTERNAL
1394 Wireless LAN LAN CARD BUS Mini-PCI (no use)
AD16 AD18 AD22 AD20 AD19
0 3
1 2 4
E F G E,F,G,H F
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
LA-2421
Notes List
of
356Wednesday, January 05, 2005
Page 4
A
B
C
D
E
ZZZ
Fan Control Circuit 1
LA-2421 REV 0
4 4
3 3
2 2
+1.2V_HT
0.22U_0603_10V7K
1
+
2
100U_6.3V_M
C18
+1.2V_HT
1000P_0402_50V7K
1
C9
2
0.22U_0603_10V7K
R23 44.2_0603_1%
0.22U_0603_10V7K
1
1
C10
2
2
12
1
C22
2
H_CADIP[0..15]<11>
1
C14
C11
2
0.22U_0603_10V7K
H_CLKIP1<11> H_CLKIN1<11>
H_CLKIP0<11> H_CLKIN0<11>
H_CTLIP0<11> H_CTLIN0<11>
LVREF1
R25
44.2_0603_1%
H_CADIP[0..15] H_CADIN[0..15]
250 mil/20 mil 150 mil
H_CADIP15 H_CADIN15 H_CADIP14 H_CADIN14 H_CADIP13 H_CADIN13 H_CADIP12 H_CADIN12 H_CADIP11 H_CADIN11 H_CADIP10 H_CADIN10 H_CADIP9
H_CADIP8 H_CADIN8 H_CADIP7 H_CADIN7 H_CADIP6 H_CADIN6 H_CADIP5 H_CADIN5 H_CADIP4 H_CADIN4 H_CADIP3 H_CADIN3 H_CADIP2 H_CADIN2 H_CADIP1 H_CADIN1 H_CADIP0 H_CADIN0
H_CLKIP1 H_CLKIN1
H_CLKIP0 H_CLKIN0
H_CTLIP0 H_CTLIN0
LVREF0
12
1
C23 1000P_0402_50V7K
2
U22A
E2
VLDT
E1
VLDT
F1
VLDT
F2
VLDT
R5
L0_CADIN_H15
T5
L0_CADIN_L15
P3
L0_CADIN_H14
P4
L0_CADIN_L14
N5
L0_CADIN_H13
P5
L0_CADIN_L13
M3
L0_CADIN_H12
M4
L0_CADIN_L12
K3
L0_CADIN_H11
K4
L0_CADIN_L11
J5
L0_CADIN_H10
K5
L0_CADIN_L10
H3
L0_CADIN_H9
H4
L0_CADIN_L9
G5
L0_CADIN_H8
H5
L0_CADIN_L8
R3
L0_CADIN_H7
R2
L0_CADIN_L7
N1
L0_CADIN_H6
P1
L0_CADIN_L6
N3
L0_CADIN_H5
N2
L0_CADIN_L5
L1
L0_CADIN_H4
M1
L0_CADIN_L4
J1
L0_CADIN_H3
K1
L0_CADIN_L3
J3
L0_CADIN_H2
J2
L0_CADIN_L2
G1
L0_CADIN_H1
H1
L0_CADIN_L1
G3
L0_CADIN_H0
G2
L0_CADIN_L0
L5
L0_CLKIN_H1
M5
L0_CLKIN_L1
L3
L0_CLKIN_H0
L2
L0_CLKIN_L0
R1
L0_CTLIN_H0
T1
L0_CTLIN_L0
D1
L0_REF1
C1
L0_REF0
FOX_PZ93903-3146-03
L0_CADOUT_H15 L0_CADOUT_L15 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H10 L0_CADOUT_L10
L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H3 L0_CADOUT_L3
HT Interface
L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H0 L0_CADOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0 L0_CTLOUT_H0
L0_CTLOUT_L0
VLDT VLDT VLDT VLDT
H_CADOP[0..15] H_CADON[0..15]
AG4 AG3 AG1 AG2
V4 V3 Y5 W5 Y4 Y3 AB5 AA5 AD5 AC5 AD4 AD3 AF5 AE5 AF4 AF3 V1 U1 W2 W3 Y1 W1 AA2 AA3 AC2 AC3 AD1 AC1 AE2 AE3 AF1 AE1
AB4 AB3
AB1 AA1
U2 U3
C17
1 2
4.7U_0805_6.3V6K
H_CADOP15 H_CADON15 H_CADOP14 H_CADON14 H_CADOP13 H_CADON13 H_CADOP12 H_CADON12 H_CADOP11 H_CADON11 H_CADOP10 H_CADON10 H_CADOP9 H_CADON9H_CADIN9 H_CADOP8 H_CADON8 H_CADOP7 H_CADON7 H_CADOP6 H_CADON6 H_CADOP5 H_CADON5 H_CADOP4 H_CADON4 H_CADOP3 H_CADON3 H_CADOP2 H_CADON2 H_CADOP1 H_CADON1 H_CADOP0 H_CADON0
H_CLKOP1 H_CLKON1
H_CLKOP0 H_CLKON0
H_CTLOP0 H_CTLON0
H_CADOP[0..15] <11> H_CADON[0..15] <11>H_CADIN[0..15]<11>
H_CLKOP1 <11> H_CLKON1 <11>
H_CLKOP0 <11> H_CLKON0 <11>
H_CTLOP0 <11> H_CTLON0 <11>
+12VALW
C614
12
3 2
12
R432 150K_0402_5%
FAN_SPEED1<37,38>
+IN
-IN
8
P
OUT
U37A
G
LM358A_SO8
4
R433
1
1 2
+3VS
FAN1_ON
100K_0402_5%
0.1U_0402_16V4Z
EN_FAN1<37,38>
Fan Control Circuit 2
U37B
12
R137
5
+IN
OUT
6
-IN
1 2
R139 100K_0402_5%FAN2@
150K_0402_5%FAN2@
FAN2_ON
7
LM358A_SO8
+3VS
FAN_SPEED2<37,38>
EN_FAN2<37,38>
1N4148_SOT23
1N4148_SOT23FAN2@
D29
R437
1 2
10K_0402_5%
D17
R138
1 2
10K_0402_5%
+5VS +12VS_FAN
12
R150 0_0805_5%
6
2
1
D
G
3
S
4 5
1
3
2
+12VS_FAN+5VS
12
R147 0_0805_5%FAN2@
6
2
1
D
G
3
S
4 5
1
3
2
C251
1 2
10U_1206_16V4Z
Q14
SI3456DV-T1_TSOP6
FAN1
1
1
C68
10U_0805_10V4Z
2
2
C61 1000P_0402_50V7K
R1151
1 2
0_0603_5%
1000P_0402_50V7K
C269
1 2
10U_1206_16V4ZFAN2@
Q16
FAN2@
SI3456DV-T1_TSOP6
FAN2
1
2
C268 10U_0805_10V4Z FAN2@
R1152
1 2
0_0603_5% FAN2@
1000P_0402_50V7K
C618
1
C241
1000P_0402_50V7K FAN2@
2
C240
FAN2@
JP24
1 2 3
ACES_85205-0300
1
2
JP29
1 2 3
ACES_85205-0300
1
2
1 1
Compal Electronics, Inc.
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Claw Harmmer CPU (Host Bus)
Size Document Number Rev Custom
LA-2421
Date: Sheet
E
of
456Wednesday, January 05, 2005
Page 5
A
B
C
D
E
DDR_SDQ[0..63]<8,9>
+1.25V +1.25V
1 1
4.7U_0805_6.3V6K
DDR_CLK_1L_H2<8>
DDR_CLK_1L_L2<8>
DDR_CLK_1L_H1<8>
DDR_CLK_1L_L1<8>
DDR_SMAA[0..13]<8,9>
2 2
3 3
15_0402_1%
15_0402_1%
0.22U_0603_10V7K
1
C496
2
DDR_CKEB<9>
DDR_CKEA<8>
DDRA_SCS#1<8> DDRA_SCS#0<8>
DDR_BSA1<8,9> DDR_BSA0<8,9>
DDR_RASA_L<8,9> DDR_CASA_L<8,9>
DDR_WEA_L<8,9>
R46 34.8_0603_1% R47 34.8_0603_1%
+2.5V
R286
R290
+1.25VREF_CPU
+2.5V
12
12
0.1U_0402_16V4Z
250 mil width
1
1
C505
C498
2
2
0.22U_0603_10V7K
DDR_CLK_1L_H2 DDR_CLK_1L_L2 DDR_CLK_1L_H1 DDR_CLK_1L_L1
DDR_CKEB DDR_CKEA
DDR_SMAA13 DDR_SMAA12 DDR_SMAA11 DDR_SMAA10 DDR_SMAA9 DDR_SMAA8 DDR_SMAA7 DDR_SMAA6 DDR_SMAA5 DDR_SMAA4 DDR_SMAA3 DDR_SMAA2 DDR_SMAA1 DDR_SMAA0
DDRA_SCS#1 DDRA_SCS#0
12 12
15 mil width/20 mil space
+1.25VREF_CPU
1
1
C506
2
2
MEMZP MEMZN
C502 1000P_0402_50V7K
AG14 AK14
AJ14
AH14
AL14 AL22
AL23
AH23 AG23
AF23
AL29
AJ29 AG28 AF29
W25 AC27
AD27 AF27 AE28
AE15 AF15
A22 A23 R31 R30
D23 E23 R27 R26
E25 G24
C26 E28 V27 F29 H25 G28 J26 J25 L27 L28 N26 P25 U25
F15
U22B
VTT VTT VTT VTT VTT
MEMCLK_1H_H2 MEMCLK_1H_L2 MEMCLK_1H_H1 MEMCLK_1H_L1 MEMCLK_1H_H0 MEMCLK_1H_L0 MEMCLK_1L_H2 MEMCLK_1L_L2 MEMCLK_1L_H1 MEMCLK_1L_L1 MEMCLK_1L_H0 MEMCLK_1L_L0
MEMCKEB MEMCKEA
MEMADDA13 MEMADDA12 MEMADDA11 MEMADDA10 MEMADDA9 MEMADDA8 MEMADDA7 MEMADDA6 MEMADDA5 MEMADDA4 MEMADDA3 MEMADDA2 MEMADDA1 MEMADDA0
MEMCS_1H_L1 MEMCS_1H_L0 MEMCS_1L_L1 MEMCS_1L_L0
MEMBANKA1 MEMBANKA0
MEMRASA_L MEMCASA_L MEMWEA_L
MEMZP MEMZN
MEMVREF
FOX_PZ93903-3146-03
A Channel
DDR_CLK_1L_L2
DDR_CLK_1L_L1
DDR_CLK_2L_L2
DDR_CLK_2L_L1
VTT VTT VTT VTT VTT
MEMCLK_2H_H2 MEMCLK_2H_L2 MEMCLK_2H_H1 MEMCLK_2H_L1 MEMCLK_2H_H0 MEMCLK_2H_L0 MEMCLK_2L_H2
MEMCLK_2L_L2
MEMCLK_2L_H1
MEMCLK_2L_L1
MEMCLK_2L_H0
MEMCLK_2L_L0
MEMCKED MEMCKEC
MEMADDB13 MEMADDB12 MEMADDB11 MEMADDB10
MEMADDB9 MEMADDB8 MEMADDB7 MEMADDB6 MEMADDB5 MEMADDB4 MEMADDB3
B Channel
MEMADDB2 MEMADDB1 MEMADDB0
MEMCS_2H_L1 MEMCS_2H_L0 MEMCS_2L_L1 MEMCS_2L_L0
MEMBANKB1 MEMBANKB0
MEMRASB_L MEMCASB_L
MEMWEB_L
MEMRESET_L
1 2
R68 120_0402_5%
1 2
R66 120_0402_5%
1 2
R332 120_0402_5%
1 2
R333 120_0402_5%
E14 D14 C14 B14 A14
AJ21 AH21 C21 D21 T31 U31
DDR_CLK_2L_H2
AF21
DDR_CLK_2L_L2
AE21
DDR_CLK_2L_H1
G21
DDR_CLK_2L_L1
G22 T27 U27
C25 B25
AK23 A26 A29 W30 C29 E29 D31 G29 F31 J31 K31 N28 N30 U29
AL28 AJ30 AG27 AE26
Y31 AE30
AG30 AK29 AH31
D19
DDR_CLK_1L_H2
DDR_CLK_1L_H1
DDR_CLK_2L_H2
DDR_CLK_2L_H1
0.22U_0603_10V7K
DDRB_SCS#1 DDRB_SCS#0
1
2
C495
1
C493
4.7U_0805_6.3V6K
2
DDR_CLK_2L_H2 <9>
DDR_CLK_2L_L2 <9>
DDR_CLK_2L_H1 <9>
DDR_CLK_2L_L1 <9>
DDRB_SCS#1 <9> DDRB_SCS#0 <9>
DDR_SDM_L[0..7]<8,9>
DDR_SDQS_L[0..7]<8,9>
DDR_SDQ63 DDR_SDQ62 DDR_SDQ61 DDR_SDQ60 DDR_SDQ59 DDR_SDQ58 DDR_SDQ57 DDR_SDQ56 DDR_SDQ55 DDR_SDQ54 DDR_SDQ53 DDR_SDQ52 DDR_SDQ51 DDR_SDQ50 DDR_SDQ49 DDR_SDQ48 DDR_SDQ47 DDR_SDQ46 DDR_SDQ45 DDR_SDQ44 DDR_SDQ43 DDR_SDQ42 DDR_SDQ41 DDR_SDQ40 DDR_SDQ39 DDR_SDQ38 DDR_SDQ37 DDR_SDQ36 DDR_SDQ35 DDR_SDQ34 DDR_SDQ33 DDR_SDQ32 DDR_SDQ31 DDR_SDQ30 DDR_SDQ29 DDR_SDQ28 DDR_SDQ27 DDR_SDQ26 DDR_SDQ25 DDR_SDQ24 DDR_SDQ23 DDR_SDQ22 DDR_SDQ21 DDR_SDQ20 DDR_SDQ19 DDR_SDQ18 DDR_SDQ17 DDR_SDQ16 DDR_SDQ15 DDR_SDQ14 DDR_SDQ13 DDR_SDQ12 DDR_SDQ11 DDR_SDQ10 DDR_SDQ9 DDR_SDQ8 DDR_SDQ7 DDR_SDQ6 DDR_SDQ5 DDR_SDQ4 DDR_SDQ3 DDR_SDQ2 DDR_SDQ1 DDR_SDQ0
DDR_SDM_L7 DDR_SDM_L6 DDR_SDM_L5 DDR_SDM_L4 DDR_SDM_L3 DDR_SDM_L2 DDR_SDM_L1 DDR_SDM_L0
DDR_SDQS_L7 DDR_SDQS_L6 DDR_SDQS_L5 DDR_SDQS_L4 DDR_SDQS_L3 DDR_SDQS_L2 DDR_SDQS_L1 DDR_SDQS_L0
U22C
AE16 AG17 AG18 AE18
AJ16 AG16 AE17
AJ18
AJ20 AE20 AE23 AG24 AG19 AE19
AJ24 AE24 AG25 AE25 AD25 AC25 AF25
AJ26 AE27 AD29 AB25 AB27 AA28
Y25 AC26 AB29 AA27
Y27
N25 M25
K27
K25
M29 M27
K29
J27
H27 G27 D27
F25
H29 G26
E26
G25 G23
F23
C20
F19
E24
C24 G19
E19
E18
G17
E16
E15
G18 C18 G16 C16
Y29
W27
P27
R25
W26
V25
R28
P29
V29 AF17 AG21 AH27 AA25
L26
F27
G20
E17
U26 AH17 AG20 AG26 AA26
L25 E27 E20 F17
FOX_PZ93903-3146-03
MEMDATA63 MEMDATA62 MEMDATA61 MEMDATA60 MEMDATA59 MEMDATA58 MEMDATA57 MEMDATA56 MEMDATA55 MEMDATA54 MEMDATA53 MEMDATA52 MEMDATA51 MEMDATA50 MEMDATA49 MEMDATA48 MEMDATA47 MEMDATA46 MEMDATA45 MEMDATA44 MEMDATA43 MEMDATA42 MEMDATA41 MEMDATA40 MEMDATA39 MEMDATA38 MEMDATA37 MEMDATA36 MEMDATA35 MEMDATA34 MEMDATA33 MEMDATA32 MEMDATA31 MEMDATA30 MEMDATA29 MEMDATA28 MEMDATA27 MEMDATA26 MEMDATA25 MEMDATA24 MEMDATA23 MEMDATA22 MEMDATA21 MEMDATA20 MEMDATA19 MEMDATA18 MEMDATA17 MEMDATA16 MEMDATA15 MEMDATA14 MEMDATA13 MEMDATA12 MEMDATA11 MEMDATA10 MEMDATA9 MEMDATA8 MEMDATA7 MEMDATA6 MEMDATA5 MEMDATA4 MEMDATA3 MEMDATA2 MEMDATA1 MEMDATA0
MEMCHECK7 MEMCHECK6 MEMCHECK5 MEMCHECK4 MEMCHECK3 MEMCHECK2 MEMCHECK1 MEMCHECK0
MEMDM_LO8 MEMDM_LO7 MEMDM_LO6 MEMDM_LO5 MEMDM_LO4 MEMDM_LO3 MEMDM_LO2 MEMDM_LO1 MEMDM_LO0 MEMDQS_LO8 MEMDQS_LO7 MEMDQS_LO6 MEMDQS_LO5 MEMDQS_LO4 MEMDQS_LO3 MEMDQS_LO2 MEMDQS_LO1 MEMDQS_LO0
MEMDATA127 MEMDATA126 MEMDATA125 MEMDATA124 MEMDATA123 MEMDATA122 MEMDATA121 MEMDATA120 MEMDATA119 MEMDATA118 MEMDATA117 MEMDATA116 MEMDATA115 MEMDATA114 MEMDATA113 MEMDATA112 MEMDATA111 MEMDATA110 MEMDATA109 MEMDATA108 MEMDATA107 MEMDATA106 MEMDATA105 MEMDATA104 MEMDATA103 MEMDATA102 MEMDATA101 MEMDATA100
MEMDATA99 MEMDATA98 MEMDATA97 MEMDATA96 MEMDATA95 MEMDATA94 MEMDATA93 MEMDATA92 MEMDATA91 MEMDATA90 MEMDATA89 MEMDATA88 MEMDATA87 MEMDATA86 MEMDATA85 MEMDATA84 MEMDATA83 MEMDATA82 MEMDATA81 MEMDATA80 MEMDATA79 MEMDATA78 MEMDATA77
A Channel
MEMDATA76
B Channel
MEMDATA75 MEMDATA74 MEMDATA73 MEMDATA72 MEMDATA71 MEMDATA70 MEMDATA69 MEMDATA68 MEMDATA67 MEMDATA66 MEMDATA65 MEMDATA64
MEMCHECK15 MEMCHECK14 MEMCHECK13 MEMCHECK12 MEMCHECK11 MEMCHECK10
MEMCHECK9 MEMCHECK8
MEMDM_UP8 MEMDM_UP7 MEMDM_UP6 MEMDM_UP5 MEMDM_UP4 MEMDM_UP3 MEMDM_UP2 MEMDM_UP1
MEMDM_UP0 MEMDQS_UP8 MEMDQS_UP7 MEMDQS_UP6 MEMDQS_UP5 MEMDQS_UP4 MEMDQS_UP3 MEMDQS_UP2 MEMDQS_UP1 MEMDQS_UP0
AJ15 AL16 AL18 AL19 AL15 AK15 AK17 AJ17 AH19 AL21 AJ23 AL25 AK19 AJ19 AL24 AK25 AJ25 AL26 AG29 AF31 AH25 AL27 AJ31 AG31 AE31 AD31 AB31 AA29 AE29 AC28 AC31 AA30 M31 L30 H31 G31 L31 L29 J28 G30 E30 C31 C27 D25 E31 C30 B27 A27 C23 B23 A20 B19 A25 A24 C19 A19 D17 B17 C15 A15 A18 C17 D15 B15
AA31 W29 N31 N29 W28 W31 R29 P31
V31 AL17 AK21 AK27 AC29 J30 B29 B21 A16 U30 AH15 AL20 AJ27 AC30 J29 A28 A21 A17
4 4
Compal Electronics, Inc.
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Claw Harmmer (MEMORY BUS)
Size Document Number Rev Custom
LA-2421
Date: Sheet
E
of
556Wednesday, January 05, 2005
Page 6
A
B
C
D
E
L2
+2.5VDDA
1 1
2 2
3 3
LQG21F4R7N00_0805
1 2
1
+
C28 100U_6.3V_M
2
Place 169 Ohm within 0.5" from CPU Route as DIF 5/5/5/20
CPUCLK0_H<16>
CPUCLK0_L< 16>
+2.5VS
R259 680_0402_5% R35 680_0402_5% R34 680_0402_5%
H_RST#<19>
@
100_0402_5%
4.7U_0805_6.3V6K
LDTSTOP#
12
H_RST#
12
H_PWRGD
12
R31
1 2
0_0402_5%
H_RST#
R38
J1
JOPEN
1
C483
2
C484 3900P_0402_50V7K
C482 3900P_0402_50V7K
12
1 2
3300P_0402_50V7K
1
C478
2
0.22U_0603_10V7K
Route as DIFF pair 10/5/10
12
12
R267
169_0402_1%
12
H_RST_CPU#
1
C27
0.001U_0402_50V7M
2
@
50 mil/20 mil
+VDDA
1
C477
H_PWRGD<19>
2
LDTSTOP#<13,19> EC_SMC_2<37,38>
CPU_COREFB<50> CPU_COREFB#<50>
Place within 0.5" from CPU Route as 80 Ohm DIFF impedence 8/5/20
H_RST_CPU# H_PWRGD
LDTSTOP#
CPU_COREFB CPU_COREFB#
VDDIO_SENSE
CLKIN
DBRDY
TMS TCK TRST# TDI TDO
U22D
C3 B3 A3
F8 E8 B6
E5 E6 E7
Y24 AA24 AE13
A8 B8
B11
AG6 AG7 AF8
AJ9
AG8
A4 D4 B4 C4 C7
C6 AL8 AL7
V5
U5 C13
E9
C5
A5
AE22 AG22
AH8
AH29
AJ4 AJ5 AJ6 AJ7 AJ8
AJ22 AJ28
AK3 AK4 AK6 AK8
AK10 AK12
AL3 AL4 AL5 AL6
FOX_PZ93903-3146-03
VDDA3 VDDA2 VDDA1
RESET_L PWROK LDTSTOP_L
COREFB_H COREFB_L CORESENSE
Miscellaneous
VDDIOFB_H VDDIOFB_L VDDIOSENSE
CLKIN_H
Clock
CLKIN_L
Debug
DBRDY
TMS TCK
JTAG
TRST_L TDI TDO
NC NC NC NC NC NC NC NC NC NC NC NC NC NC
NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC
THERMTRIP_L
THERMDA THERMDC
VID4 VID3 VID2 VID1 VID0
VTT_SENSE
FBCLKOUT_H FBCLKOUT_L
DBREQ_L
STRAP_HI STRAP_HI STRAP_HI STRAP_HI
STRAP_LO STRAP_LO STRAP_LO STRAP_LO STRAP_LO STRAP_LO STRAP_LO STRAP_LO STRAP_LO
NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC
H_THERMTRIP_S#
AG10 AJ2
AJ1 A13
A12 C12 A11 A10
AF13
F13 E13
A6
AJ12 AF12 T3 E11
AG9 AH6 AF10 AH10 AJ10 B13 C10 T4 F11
AL9 AL10 AL11 AL12 C22 C28 D8 D11 D12 D29 E21 E22 G15 N27 T25 T29 U28 C11 AG15 AH12
THERMDA_CPU THERMDC_CPU
VID4 VID3 VID2 VID1 VID0
VTT_SENSE
FBCLKOUT FBCLKOUT#CLKIN#
DBREQ#
STRAP_HI_AJ12 STRAP_HI_AF12 STRAP_HI_T3 STRAP_HI_E11
STRAP_LO_AG9 STRAP_LO_AH6 STRAP_LO_AF10 STRAP_LO_AH10 STRAP_LO_AJ10 STRAP_LO_B13 STRAP_LO_C10 STRAP_LO_T4 STRAP_LO_F11
VID4 <50> VID3 <50> VID2 <50> VID1 <50> VID0 <50>
1 2
R4580.6_0402_1%
R265 680_0402_5%
1 2
R263 680_0402_5%
1 2
R18 49.9_0402_1%
1 2
R42 820_0402_5%
1 2
R255 680_0402_5%
1 2
R253 680_0402_5%
1 2
R258 680_0402_5%
1 2
R264 680_0402_5%
1 2
R266 680_0402_5%
1 2
R43 680_0402_5%
1 2
R39 680_0402_5%
1 2
R19 49.9_0402_1%
1 2
R40 820_0402_5%
1 2
+2.5VS +1.2V_HT
+2.5V
EC_SMD_2<37,38>
H_THERMTRIP_S# H_THERMTRIP#
1U_0603_10V4Z
Thermal Sensor ADM1032
U19
8 7 6 5
+2.5VS
12
R254 680_0402_5%
+3VS +2.5VDDA
1
C33
2
VDDA_EN<37,38>
SCLK SDATA ALERT#
THERM#
GND
ADM1032AR_SOP8
+2.5VS
12
R257 1K_0402_5%
2
Q27
3 1
MMBT3904_SOT23
U2
1 2 3
SI9183_SOT23-5
VDD
D+
D-
VIN GND SD#
1
THERMDA_CPU
2
THERMDC_CPU
3 4
+3VALW
VOUT
BP
W=15mil
R247 10K_0402_5%@
12
R252 10K_0402_5%
5
4
1 2
1
C40
0.01U_0402_16V7K
2
H_THERMTRIP# <20>
1
C472 2200P_0402_50V7K
2
+3VS
2
C474
0.1U_0402_16V4Z
1
+2.5VS
R11
R12
R13
12
12
12
560_0402_5%@
560_0402_5%@
560_0402_5%@
DBREQ#
DBRDY TCK TMS TDI TRST# TDO
4 4
A
R8
R9
R10
12
560_0402_5%@
R7
12
12
12
560_0402_5%@
560_0402_5%@
+2.5VS
560_0402_5%@
JP1
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
2423 26
SAMTEC_ASP-68200-07
@
Compal Electronics, Inc.
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
ClawHarmmer ( MISC )
Size Document Number Rev Custom
LA-2421
Date: Sheet
E
of
656Wednesday, January 05, 2005
Page 7
A
B
C
D
E
+CPU_CORE
U22E
AA4
VDD1
AA7
VDD2
AA9
VDD3
W24
W22
W20
W18
W16
W14
W12
W10
V28
V26
V23
V21
V19
V17
V15
V13
V11
U24
U22
U20
U18
U16
U14
U12
U10
VSS233
VSS128H7VSS129H9VSS130
T28
T26
VSS225
T23
VSS232
VSS224
VSS231
VSS230
VSS229
VSS228U8VSS227U6VSS226
VSS135
VSS134
VSS133
H11
H21
H19
H17
H15
T21
VSS223
T19
VSS222
T17
VSS221
T15
VSS220
T13
VSS219
T11
VSS218
T9
VSS217
T7
VSS216
R24
VSS215
R22
VSS214
R20
VSS213
R18
VSS212
R16
VSS211
R14
VSS210
R12
VSS209
R10
VSS208
R8
VSS207
R6
VSS206
R4
VSS205
P28
VSS204
P26
VSS203
P23
VSS202
P21
VSS201
P19
VSS200
P17
VSS199
P15
VSS198
P13
VSS197
P11
VSS196
P9
VSS195
P7
VSS194
P2
VSS193
N24
VSS192
N22
VSS191
N20
VSS190
N18
VSS189
N16
VSS188
N14
VSS187
N12
VSS186
N10
VSS185
N8
VSS184
N6
VSS183
M28
VSS182
M26
VSS181
M23
VSS180
M21
VSS179
M19
VSS178
M17
VSS177
M15
VSS176
M13
VSS175
M11
VSS174
M9
VSS173
M7
VSS172
L24
VSS171
L22
VSS170
L20
VSS169
L18
VSS168
L16
VSS167
L14
VSS166
L12
VSS165
L10
VSS164
L8
VSS163
L6
VSS162
L4
VSS161
K28
VSS160
K26
VSS159
K23
VSS158
K21
VSS157
K19
VSS156
K17
VSS155
K15
VSS154
K13
VSS153
K11
VSS152
K9
VSS151
K7
VSS150
K2
VSS149
J24
VSS148
J22
VSS147
J20
VSS146
J18
VSS145
J16
VSS144
J14
VSS143
J12
VSS142
J10
VSS141
J8
VSS140
J6
VSS139
H28
VSS138
H26
VSS137
H23
VSS136
VSS132
VSS131
H13
Y28
U22F
A7
VSS1
A9
VSS2
VSS268
VSS269
1 1
2 2
3 3
4 4
AA6
AA8 AA10 AA12 AA14 AA16 AA18 AA20 AA22
AB2
AB7
AB9 AB11 AB13 AB15 AB17 AB19 AB21 AB23 AB26 AB28
AC4
AC6 AC10 AC12 AC14 AC16 AC18 AC20 AC22 AC24
AD7
AD9 AD11 AD13 AD15 AD17 AD19 AD21 AD23 AD26 AD28
AE6
AE8 AE10 AE12 AE14
AF2
AF6
AF7
AF9 AF11 AF14 AF16 AF20 AF22 AF24 AF26 AF28
AG5 AG11 AG13 AG12
AH1
AH2
AH3
AH4
AH5
AH7
AH9 AH11 AH13 AH16 AH18 AH20 AH22 AH24 AH26 AH28
AJ3
AJ13
AK13
AL13
FOX_PZ93903-3146-03
VSS270
VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85
B7
VSS86
B9
VSS87
C2
VSS88
C8
VSS89
C9
VSS90
VSS91D2VSS92D3VSS93D5VSS94D6VSS95D7VSS96D9VSS97
Y7
VSS259
VSS258
VSS257
VSS256
VSS255
VSS254
VSS253
VSS252
VSS251W8VSS250W6VSS249W4VSS248
VSS247
VSS246
VSS245
VSS244
VSS243
VSS242
VSS241
VSS240
VSS239V9VSS238V7VSS237V2VSS236
VSS235
VSS261Y9VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS260
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105E3VSS106E4VSS107
VSS108
VSS109
VSS110F5VSS111F6VSS112F7VSS113F9VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
F10
F12
F14
F16
F18
F22
E10
D13
D16
D18
D20
D22
E12
D24
D26
D28
G12
F24
VSS234
VSS121
VSS122
VSS123G4VSS124G6VSS125G8VSS126
VSS127
F26
F28
G10
G14
Y11
Y13
Y15
Y17
Y19
Y21
Y23
Y26
AA11 AA13 AA15 AA17 AA19 AA21
AB6
AB8 AB10 AB12 AB14 AB16 AB18 AB20
AC9 AC11 AC13 AC15 AC17 AC19
AD2
AD6
AD8 AD10 AD12 AD14 AD16 AD18
AE4
AE7
AE9 AE11
AJ11
AK5
AK7
AK9 AK11
B5 B10 B12 D10
G7
G9 G11 G13
H2
H6
H8 H10 H12 H14 H16 H18
J4 J7
J9 J11 J13 J15 J17 J19
K6
K8
K10 K12 K14 K16 K18 K20
L7
L9 L11 L13 L15 L17 L19 L21
M2 M6
M8 M10 M12 M14 M16 M18 M20
N4
N7
N9 N11 N13 N15 N17 N19 N21
P6
P8 P10 P12 P14 P16 P18 P20
R7 R9
FOX_PZ93903-3146-03
VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 VDD33 VDD34 VDD35 VDD36 VDD37 VDD38 VDD39 VDD40 VDD41 VDD42 VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54 VDD55 VDD56 VDD57 VDD58 VDD59 VDD60 VDD61 VDD62 VDD63 VDD64 VDD65 VDD66 VDD67 VDD68 VDD69 VDD70 VDD71 VDD72 VDD73 VDD74 VDD75 VDD76 VDD77 VDD78 VDD79 VDD80 VDD81 VDD82 VDD83 VDD84 VDD85 VDD86 VDD87 VDD88 VDD89 VDD90 VDD91 VDD92 VDD93 VDD94 VDD95 VDD96 VDD97 VDD98 VDD99 VDD100 VDD101 VDD102 VDD103 VDD104 VDD105 VDD106 VDD107 VDD108
VDD109 VDD110 VDD111 VDD112 VDD113 VDD114 VDD115 VDD116 VDD117 VDD118 VDD119 VDD120 VDD121 VDD122 VDD123 VDD124 VDD125 VDD126 VDD127 VDD128 VDD129 VDD130 VDD131 VDD132 VDD133 VDD134 VDD135 VDD136 VDD137 VDD138 VDD139 VDD140 VDD141 VDD142 VDD143 VDD144 VDD145 VDD146 VDD147 VDD148 VDD149 VDD150 VDD151 VDD152 VDD153 VDD154 VDD155 VDD156 VDD157
VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8
VDDIO9 VDDIO10 VDDIO11 VDDIO12 VDDIO13 VDDIO14 VDDIO15 VDDIO16 VDDIO17 VDDIO18 VDDIO19 VDDIO20 VDDIO21 VDDIO22 VDDIO23 VDDIO24 VDDIO25 VDDIO26 VDDIO27 VDDIO28 VDDIO29 VDDIO30 VDDIO31 VDDIO32 VDDIO33 VDDIO34 VDDIO35 VDDIO36 VDDIO37 VDDIO38 VDDIO39 VDDIO40 VDDIO41 VDDIO42 VDDIO43 VDDIO44 VDDIO45 VDDIO46 VDDIO47 VDDIO48 VDDIO49 VDDIO50 VDDIO51 VDDIO52 VDDIO53 VDDIO54 VDDIO55 VDDIO56 VDDIO57 VDDIO58
R11 R13 R15 R17 R19 R21 T2 T6 T8 T10 T12 T14 T16 T18 T20 U4 U7 U9 U11 U13 U15 U17 U19 U21 V6 V8 V10 V12 V14 V16 V18 V20 W7 W9 W11 W13 W15 W17 W19 W21 Y2 Y6 Y8 Y10 Y12 Y14 Y16 Y18 Y20
AA23 AB22 AB24 AB30 AC21 AC23 AD20 AD22 AD24 AD30 AF30 AH30 AK16 AK18 AK20 AK22 AK24 AK26 AK28 AK30 B16 B18 B20 B22 B24 B26 B28 B30 D30 F30 H20 H22 H24 H30 J21 J23 K22 K24 K30 L23 M22 M24 M30 N23 P22 P24 P30 R23 T22 T24 T30 U23 V22 V24 V30 W23 Y22 Y30
+CPU_CORE
+2.5V
+CPU_CORE
330U_D_2VM_R15@
1
1
+
+
C12
2
330U_D_2VM_R15@
+CPU_CORE
1
+
@
2
+CPU_CORE
1
C34
2
10U_0805_10V4Z
On backside under socket
+CPU_CORE
1
C37
2
0.22U_0603_10V7K
On backside under socket
+CPU_CORE
1
2
0.01U_0402_16V7K
4.7U_0805_6.3V6K
C13
2
C462 820U_E9_2_5V_M_R7
10U_0805_10V4Z
1
C35
2
10U_0805_10V4Z
0.22U_0603_10V7K
1
C38
2
0.22U_0603_10V7K
0.01U_0402_16V7K
1
C19
C5
2
0.01U_0402_16V7K
4.7U_0805_6.3V6K
1
C173
2
330U_D_2VM_R15@
1
2
1
2
1
2
1
C104
2
330U_D_2VM_R15
1
+
C15
2
1
+
C461 820U_E9_2_5V_M_R7
2
10U_0805_10V4Z
1
C36
C50
2
10U_0805_10V4Z
0.22U_0603_10V7K
1
C39
C47
2
0.22U_0603_10V7K
0.01U_0402_16V7K
1
C42
C30
2
+1.2V_HT
1
+
2
C16
330U_D_2VM_R15
10U_0805_10V4Z
1
C51
2
0.22U_0603_10V7K
1
C48
2
1
+
+
C530
C549
2
2
330U_D_2VM_R15@
1
+
C481 820U_E9_2_5V_M_R7
2
1
C52
2
1
C49
2
For EMI require
+CPU_CORE
1
C1183
2
1000P_0402_50V7K
1
+
C569
2
1
+
C480 820U_E9_2_5V_M_R7
@
2
+CPU_CORE
1
2
1000P_0402_50V7K
1
C1184
2
330U_D_2VM_R15
1
CPU Decouping Capacitor
Loop Bandwidth KHz
Bulk Cappacitance uF
2300020 900050
* 300
+2.5V+2.5V
0.22U_0603_10V7K
1
1
C142
2
2
0.22U_0603_10V7K
Near Socket
C141
1500
0.22U_0603_10V7K
1
C144
2
0.22U_0603_10V7K
1
2
330U_D_2VM_R15@
1
+
C568
2
330U_D_2VM_R15
C43 1000P_0402_50V7K
1
C1185
2
1000P_0402_50V7K
1
C55
C143
2
0.22U_0603_10V7K
1
+
C26
2
1
C41
0.1U_0402_16V4Z
2
1000P_0402_50V7K
1
C1186
2
Total ESR
2.5m ohm (AMD)
0.9m ohm
2.5m ohm
0.22U_0603_10V7K
1
C56
2
Compal Electronics, Inc.
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Claw Harmme r ( Pow er & Gr ound)
Size Document Number Rev Custom
LA-2421
Date: Sheet
E
of
756Wednesday, January 05, 2005
Page 8
A
DDR_SDQ63 DDR_SDQ62 DDR_SDQ59 DDR_SDQ58
DDR_SDM_L7
A
DDR_SDQS_L7 DDR_SDQ61 DDR_SDQ60
DDR_SDQ57 DDR_SDQ56 DDR_SDQ55 DDR_SDQ51
DDR_SDQ50 DDR_SDM_L6 DDR_SDQS_L6 DDR_SDQ54
DDR_SDQ53 DDR_SDQ52 DDR_SDQ49 DDR_SDQ48
DDR_SDQ47 DDR_SDQ43 DDR_SDQ42 DDR_SDQ46
DDR_SDM_L5 DDR_SDQS_L5 DDR_SDQ45 DDR_SDQ44
DDR_SDQ41 DDR_SDQ40 DDR_SDQ39 DDR_SDQ38
DDR_SDQ35 DDR_SDQ34 DDR_SDM_L4 DDR_SDQS_L4
DDR_SDQ37 DDR_SDQ36 DDR_SDQ33 DDR_SDQ32
DDR_SDQ31 DDR_SDQ30 DDR_SDQ27 DDR_SDQ26
DDR_SDM_L3 DDR_SDQS_L3 DDR_SDQ29 DDR_SDQ28
DDR_SDQ25 DDR_SDQ24 DDR_SDQ23 DDR_SDQ22
1 1
2 2
3 3
4 4
DDR_SDQ[0..63]<5,9> DDR_SDQS_L[0..7]<5,9>
DDR_SDM_L[0..7]<5,9> DDR_SMAA[0..13]<5,9>
RP17
1 8 2 7 3 6 4 5
68_0804_8P4R_5%
RP16
1 8 2 7 3 6 4 5
68_0804_8P4R_5%
RP15
1 8 2 7 3 6 4 5
68_0804_8P4R_5%
RP14
1 8 2 7 3 6 4 5
68_0804_8P4R_5%
RP13
1 8 2 7 3 6 4 5
68_0804_8P4R_5%
RP12
1 8 2 7 3 6 4 5
68_0804_8P4R_5%
RP11
1 8 2 7 3 6 4 5
68_0804_8P4R_5%
RP10
1 8 2 7 3 6 4 5
68_0804_8P4R_5%
RP9
1 8 2 7 3 6 4 5
68_0804_8P4R_5%
RP8
1 8 2 7 3 6 4 5
68_0804_8P4R_5%
RP7
1 8 2 7 3 6 4 5
68_0804_8P4R_5%
RP6
1 8 2 7 3 6 4 5
68_0804_8P4R_5%
RP5
1 8 2 7 3 6 4 5
68_0804_8P4R_5%
DDR_SDQ[0..63]
DDR_SDQS_L[0..7]
DDR_SDM_L[0..7]
DDR_SMAA[0..13]
+1.25V
B
B
RP25
1 8 2 7 3 6 4 5
47_0804_8P4R_5%
RP26
1 8 2 7 3 6 4 5
47_0804_8P4R_5%
RP27
1 8 2 7 3 6 4 5
47_0804_8P4R_5%
RP28
1 8 2 7 3 6 4 5
47_0804_8P4R_5%
RP30
1 8 2 7 3 6 4 5
47_0804_8P4R_5%
RP29
1 4 2 3
47_0404_4P2R_5%
RP22
1 8 2 7 3 6 4 5
68_0804_8P4R_5%
RP21
1 8 2 7 3 6 4 5
68_0804_8P4R_5%
RP20
1 8 2 7 3 6 4 5
68_0804_8P4R_5%
RP19
1 8 2 7 3 6 4 5
68_0804_8P4R_5%
RP18
1 8 2 7 3 6 4 5
68_0804_8P4R_5%
RP24
1 8 2 7 3 6 4 5
68_0804_8P4R_5%
RP23
1 8 2 7 3 6 4 5
68_0804_8P4R_5%
DDR_CKEA DDR_SMAA11 DDR_SMAA12 DDR_SMAA8
DDR_SMAA9 DDR_SMAA6 DDR_SMAA4 DDR_SMAA7
DDR_SMAA5 DDR_SMAA2 DDR_SMAA0 DDR_SMAA3
DDR_SMAA1 DDR_BSA1 DDR_RASA_L DDR_SMAA10
DDR_CASA_L DDRA_SCS#1 DDRA_SCS#0 DDR_SMAA13
DDR_BSA0 DDR_WEA_L
DDR_SDQ10 DDR_SDQ11 DDR_SDQ14 DDR_SDQ15
DDR_SDQ12 DDR_SDQ13 DDR_SDM_L1 DDR_SDQS_L1
DDR_SDQ3 DDR_SDQ7 DDR_SDQ8 DDR_SDQ9
DDR_SDQ6 DDR_SDQS_L0 DDR_SDM_L0 DDR_SDQ2
DDR_SDQ0 DDR_SDQ1 DDR_SDQ4 DDR_SDQ5
DDR_SDQS_L2 DDR_SDM_L2 DDR_SDQ18 DDR_SDQ19
DDR_SDQ16 DDR_SDQ17 DDR_SDQ20 DDR_SDQ21
C
Note: DDR_SMAA13 Recommend for AMD
C
D
DDR_SDQ0 DDR_SDQ1
DDR_SDQS_L0 DDR_SDQ2
DDR_SDQ3 DDR_SDQ8
DDR_SDQ9 DDR_SDQS_L1
DDR_SDQ10 DDR_SDQ11
DDR_CLK_1L_H1<5>
DDR_CLK_1L_L1<5>
DDR_SDQ16 DDR_SDQ17
DDR_SDQS_L2 DDR_SDQ18
DDR_SDQ19 DDR_SDQ24
DDR_SDQ25 DDR_SDQS_L3
DDR_SDQ26 DDR_SDQ27
DDR_CKEA<5>
DDR_BSA0<5,9>
DDR_WEA_L<5,9>
DDRA_SCS#0<5> DDRA_SCS#1 <5>
D
DDR_CKEA DDR_SMAA12
DDR_SMAA9 DDR_SMAA7
DDR_SMAA5 DDR_SMAA3 DDR_SMAA1
DDR_SMAA10 DDR_BSA0 DDR_WEA_L DDRA_SCS#0 DDR_SMAA13
DDR_SDQ32 DDR_SDQ33
DDR_SDQS_L4 DDR_SDQ34
DDR_SDQ35 DDR_SDQ40
DDR_SDQ41 DDR_SDQS_L5
DDR_SDQ42 DDR_SDQ43
DDR_SDQ48 DDR_SDQ49
DDR_SDQS_L6 DDR_SDQ50
DDR_SDQ51 DDR_SDQ56
DDR_SDQ57 DDR_SDQS_L7
DDR_SDQ58 DDR_SDQ59
SB_SDAT<9,16,20,26> SB_SCLK<9,16,20,26>
+3VS
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+2.5V
E
JP11
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
AMP_1565917-1
SO-DIMM0
Top Side
E
VREF
DQ12 DQ13
DQ14 DQ15
DQ20 DQ21
DQ22 DQ23
DQ28 DQ29
DQ30 DQ31
DU/RESET#
CKE0
DU/BA2
RAS# CAS#
DQ36 DQ37
DQ38 DQ39
DQ44 DQ45
DQ46 DQ47
CK1#
DQ52 DQ53
DQ54 DQ55
DQ60 DQ61
DQ62 DQ63
VSS DQ4 DQ5 VDD DM0 DQ6 VSS DQ7
VDD DM1
VSS
VDD VDD VSS VSS
VDD DM2
VSS
VDD DM3
VSS
VDD CB4 CB5 VSS DM8 CB6 VDD CB7
VSS VSS VDD VDD
VSS
VDD BA1
VSS
VDD DM4
VSS
VDD DM5
VSS
VDD CK1
VSS
VDD DM6
VSS
VDD DM7
VSS
VDD SA0 SA1 SA2
F
+2.5V
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100
A11
102
A8
104 106
A6
108
A4
110
A2
112
A0
114 116 118 120 122
S1#
124
DU
126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DU
F
20mil
DDR_SDQ4 DDR_SDQ5
DDR_SDM_L0 DDR_SDQ6
DDR_SDQ7 DDR_SDQ12
DDR_SDQ13 DDR_SDM_L1
DDR_SDQ14 DDR_SDQ15
DDR_SDQ20 DDR_SDQ21
DDR_SDM_L2 DDR_SDQ22
DDR_SDQ23 DDR_SDQ28
DDR_SDQ29 DDR_SDM_L3
DDR_SDQ30 DDR_SDQ31
DDR_CKEA DDR_SMAA11
DDR_SMAA8 DDR_SMAA6
DDR_SMAA4 DDR_SMAA2 DDR_SMAA0
DDR_BSA1 DDR_RASA_L DDR_CASA_L DDRA_SCS#1
DDR_SDQ36 DDR_SDQ37
DDR_SDM_L4 DDR_SDQ38
DDR_SDQ39 DDR_SDQ44
DDR_SDQ45 DDR_SDM_L5
DDR_SDQ46 DDR_SDQ47
DDR_SDQ52 DDR_SDQ53
DDR_SDM_L6 DDR_SDQ54
DDR_SDQ55 DDR_SDQ60
DDR_SDQ61 DDR_SDM_L7
DDR_SDQ62 DDR_SDQ63
G
1
C291
0.1U_0402_16V4Z
2
DDR_BSA1 <5,9> DDR_RASA_L <5,9> DDR_CASA_L <5,9>
DDR_CLK_1L_L2 <5>
DDR_CLK_1L_H2 <5>
Compal Electronics, Inc.
Title
DDR-SODIMM SLOT0
Size Document Number Rev Custom
LA-2421
Date: Sheet
G
+1.25VREF_MEM
H
of
856Wednesday, January 05, 2005
H
Page 9
A
1 1
+1.25V
2 2
3 3
DDR_SDQS_L[0..7]<5,8>
DDR_SDM_L[0..7]<5,8> DDR_SMAA[0..13]<5,8>
DDR_SDQ[0..63]<5,8>
4 4
RP43
1 8 2 7 3 6 4 5
47_0804_8P4R_5%
DDR_SDQS_L[0..7] DDR_SDM_L[0..7] DDR_SMAA[0..13] DDR_SDQ[0..63]
DDRB_SCS#1 DDRB_SCS#0
DDR_CKEB
B
Layout note
Note: DDR_SMAA13 Recommend for AMD.
C
+2.5V
DDR_SDQ4 DDR_SDQ5
DDR_SDQS_L0 DDR_SDQ6
DDR_SDQ7 DDR_SDQ12
DDR_SDQ13 DDR_SDQS_L1
DDR_SDQ15
DDR_CLK_2L_H1<5>
DDR_CLK_2L_L1<5>
DDR_CKEB<5>
DDR_BSA0<5,8> DDR_RASA_L <5,8>
DDR_WEA_L<5,8>
DDRB_SCS#0<5> DDRB_SCS#1 <5>
SB_SDAT<8,16,20,26> SB_SCLK<8,16,20,26>
DDR_CLK_2L_H1 DDR_CLK_2L_L1
DDR_SDQ20 DDR_SDQ21
DDR_SDQS_L2
DDR_SDQ23 DDR_SDQ28
DDR_SDQ29 DDR_SDQS_L3
DDR_SDQ30 DDR_SDQ31
DDR_CKEB DDR_CKEB DDR_SMAA12
DDR_SMAA9 DDR_SMAA7
DDR_SMAA5 DDR_SMAA3 DDR_SMAA1
DDR_SMAA10 DDR_BSA0 DDR_WEA_L
DDR_SMAA13 DDR_SDQ36
DDR_SDQ37 DDR_SDQS_L4
DDR_SDQ38 DDR_SDQ39
DDR_SDQ44 DDR_SDQ45
DDR_SDQS_L5
DDR_SDQ47
DDR_SDQ52 DDR_SDQ53
DDR_SDQS_L6 DDR_SDQ54
DDR_SDQ55 DDR_SDQ60
DDR_SDQ61 DDR_SDQS_L7
DDR_SDQ62 DDR_SDQ63
+3VS
JP30
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
TYCO_1470804-2
D
VREF
VSS DQ4 DQ5 VDD DM0 DQ6 VSS DQ7
DQ12
VDD
DQ13
DM1
VSS DQ14 DQ15
VDD
VDD
VSS
VSS
DQ20 DQ21
VDD
DM2 DQ22
VSS DQ23 DQ28
VDD DQ29
DM3
VSS DQ30 DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD
CKE0
DU/BA2
VSS
VDD
RAS# CAS#
VSS DQ36 DQ37
VDD
DM4 DQ38
VSS DQ39 DQ44
VDD DQ45
DM5
VSS DQ46 DQ47
VDD
CK1#
CK1
VSS DQ52 DQ53
VDD
DM6 DQ54
VSS DQ55 DQ60
VDD DQ61
DM7
VSS DQ62 DQ63
VDD
+2.5V
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100
A11
102
A8
104 106
A6
108
A4
110
A2
112
A0
114 116
BA1
118 120 122
S1#
124
DU
126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194
SA0
196
SA1
198
SA2
200
DU
50 mil width
DDR_SDQ0 DDR_SDQ1
DDR_SDM_L0 DDR_SDQ2
DDR_SDQ3 DDR_SDQ8
DDR_SDQ9 DDR_SDM_L1
DDR_SDQ10DDR_SDQ14 DDR_SDQ11
DDR_SDQ16 DDR_SDQ17
DDR_SDM_L2 DDR_SDQ18DDR_SDQ22
DDR_SDQ19 DDR_SDQ24
DDR_SDQ25 DDR_SDM_L3
DDR_SDQ26 DDR_SDQ27
DDR_SMAA11 DDR_SMAA8
DDR_SMAA6 DDR_SMAA4 DDR_SMAA2 DDR_SMAA0
DDR_BSA1 DDR_RASA_L DDR_CASA_L DDRB_SCS#1DDRB_SCS#0
DDR_SDQ32 DDR_SDQ33
DDR_SDM_L4 DDR_SDQ34
DDR_SDQ35 DDR_SDQ40
DDR_SDQ41 DDR_SDM_L5
DDR_SDQ42DDR_SDQ46 DDR_SDQ43
DDR_CLK_2L_L2 DDR_CLK_2L_H2
DDR_SDQ48 DDR_SDQ49
DDR_SDM_L6 DDR_SDQ50
DDR_SDQ51 DDR_SDQ56
DDR_SDQ57 DDR_SDM_L7
DDR_SDQ58 DDR_SDQ59
+3VS
+1.25VREF_MEM
1
2
DDR_BSA1 <5,8> DDR_CASA_L <5,8>
DDR_CLK_2L_L2 <5>
DDR_CLK_2L_H2 <5>
C648
0.1U_0402_16V4Z
+2.5V
R473
15_0402_1%
R486
15_0402_1%
E
12
12
1
2
0.1U_0402_16V4Z
+1.25VREF_MEM
C638
1
C640 1000P_0402_50V7K
2
DIMM1
Bottom Side
Compal Electronics, Inc.
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
DDR-SODIMM SLOT1
Size Document Number Rev Custom
LA-2421
Date: Sheet
E
of
956Wednesday, January 05, 2005
Page 10
A
B
C
D
E
+2.5V +1.25V
470U_6.3V_M
1
+
1 1
C612
2
1
+
2
470U_D_4VM
C294
220U_D2_4VM@
1
+
C296
2
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
1
C274
2
1
2
C275
Near DIMMs
Near Power Supply
470U_D_4VM@
1
+
C367
2
330U_D_2VM_R15
1
2
+
C325
1
+
2
470U_6.3V_M
330U_6.3V_M
C411
1
+
C318
2
+1.25V
4.7U_0805_10V4Z
C324
1
C323
2
1
2
4.7U_0805_10V4Z
At either end of VTT island (=250 mil)
Layout note :
Place one cap close to every 2 pull up resistors termination to +1.25VS
+1.25V
0.1U_0402_16V4Z
+1.25V
2 2
0.1U_0402_16V4Z
+1.25V
0.1U_0402_16V4Z
+1.25V
3 3
0.1U_0402_16V4Z
+1.25V
0.1U_0402_16V4Z
+1.25V
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C401
2
1
C389
2
1
C377
2
1
C363
2
1
C351
2
1
C339
2
1
C400
2
0.1U_0402_16V4Z
1
C388
2
0.1U_0402_16V4Z
1
C376
2
0.1U_0402_16V4Z
1
C362
2
0.1U_0402_16V4Z
1
C350
2
0.1U_0402_16V4Z
1
C338
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+2.5V
0.1U_0402_16V4Z
1
C399
2
1
C387
2
1
C375
2
1
C361
2
1
C349
2
1
C337
2
1
C398
2
0.1U_0402_16V4Z
1
C386
2
0.1U_0402_16V4Z
1
C360
2
0.1U_0402_16V4Z
1
C348
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C397
2
1
C385
2
1
C359
2
1
C347
2
1
C396
2
0.1U_0402_16V4Z
1
C384
2
0.1U_0402_16V4Z
1
C358
2
0.1U_0402_16V4Z
1
C346
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C395
2
1
C383
2
1
C357
2
1
C345
2
1
C394
2
0.1U_0402_16V4Z
1
C382
2
0.1U_0402_16V4Z
1
C356
2
0.1U_0402_16V4Z
1
C344
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C393
2
1
C381
2
1
C355
2
1
C343
2
1
C392
2
0.1U_0402_16V4Z
1
C380
2
0.1U_0402_16V4Z
1
C354
2
0.1U_0402_16V4Z
1
C342
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C391
2
1
C379
2
1
C353
2
1
C341
2
1
C390
2
0.1U_0402_16V4Z
1
C378
2
0.1U_0402_16V4Z
1
C352
2
+2.5V
0.1U_0402_16V4Z
1
C340
2
+2.5V
For EMI require
+2.5V
1
C1187 1000P_0402_50V7K
2
+2.5V
1
C1191 1000P_0402_50V7K
2
+1.25V
1
C1195 220P_0402_25V8K
2
+1.25V
1
C1199 220P_0402_25V8K
2
+1.25V
1
C1203 220P_0402_25V8K
2
1
C1188 1000P_0402_50V7K
2
1
C1192 1000P_0402_50V7K
2
1
C1196 220P_0402_25V8K
2
1
C1200 220P_0402_25V8K
2
1
C1204 220P_0402_25V8K
2
1
C1189 1000P_0402_50V7K
2
1
C1193 1000P_0402_50V7K
2
1
C1197 220P_0402_25V8K
2
1
C1201 220P_0402_25V8K
2
1
C1190 1000P_0402_50V7K
2
1
C1194 1000P_0402_50V7K
2
1
C1198 220P_0402_25V8K
2
1
C1202 220P_0402_25V8K
2
+2.5V
4 4
Compal Electronics, Inc.
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
DDR SODIMM Decoupling
Size Document Number Rev Custom
LA-2421
Date: Sheet
E
of
10 56Wednesday, January 05, 2005
Page 11
5
H_CADIP[0..15]<4> H_CADIN[0..15]<4>
H_CADOP[0..15]<4>
D D
H_CADOP15 H_CADON15 H_CADOP14 H_CADON14 H_CADOP13 H_CADON13 H_CADOP12 H_CADON12 H_CADOP11 H_CADON11 H_CADOP10 H_CADON10 H_CADOP9 H_CADON9 H_CADOP8 H_CADON8
H_CADOP7 H_CADON7 H_CADOP6 H_CADON6 H_CADOP5 H_CADON5 H_CADOP4
1 2 1 2
H_CADON4 H_CADOP3 H_CADON3 H_CADOP2 H_CADON2 H_CADOP1 H_CADON1 H_CADOP0 H_CADON0
H_CLKOP1
H_CLKON1
H_CLKOP0
H_CLKON0
H_CTLOP0 H_CTLON0
C C
H_CLKOP1<4>
H_CLKON1<4>
H_CLKOP0<4>
H_CLKON0<4>
H_CTLOP0<4>
H_CTLON0<4>
+1.2V_HT
B B
R49 49.9_0402_1% R48 49.9_0402_1%
H_CADON[0..15]<4>
U27A
T26
HT_RXCAD15P
R26
HT_RXCAD15N
U25
HT_RXCAD14P
U24
HT_RXCAD14N
V26
HT_RXCAD13P
U26
HT_RXCAD13N
W25
HT_RXCAD12P
W24
HT_RXCAD12N
AA25
HT_RXCAD11P
AA24
HT_RXCAD11N
AB26
HT_RXCAD10P
AA26
HT_RXCAD10N
AC25
HT_RXCAD9P
AC24
HT_RXCAD9N
AD26
HT_RXCAD8P
AC26
HT_RXCAD8N
R29
HT_RXCAD7P
R28
HT_RXCAD7N
T30
HT_RXCAD6P
R30
HT_RXCAD6N
T28
HT_RXCAD5P
T29
HT_RXCAD5N
V29
HT_RXCAD4P
U29
HT_RXCAD4N
Y30
HT_RXCAD3P
W30
HT_RXCAD3N
Y28
HT_RXCAD2P
Y29
HT_RXCAD2N
AB29
HT_RXCAD1P
AA29
HT_RXCAD1N
AC29
HT_RXCAD0P
AC28
HT_RXCAD0N
Y26
HT_RXCLK1P
W26
HT_RXCLK1N
W29
HT_RXCLK0P
W28
HT_RXCLK0N
P29
HT_RXCTLP
N29
HT_RXCTLN
D27
HT_RXCALN
E27
HT_RXCALP
216RS480M_BGA706
H_CADIP[0..15] H_CADIN[0..15]
H_CADOP[0..15]
H_CADON[0..15]
4
H_CADIP15
HT_TXCTLP HT_TXCTLN
HT_TXCALP HT_TXCALN
R24
H_CADIN15
R25
H_CADIP14
N26
H_CADIN14
P26
H_CADIP13
N24
H_CADIN13
N25
H_CADIP12
L26
H_CADIN12
M26
H_CADIP11
J26
H_CADIN11
K26
H_CADIP10
J24
H_CADIN10
J25
H_CADIP9
G26
H_CADIN9
H26
H_CADIP8
G24
H_CADIN8
G25
H_CADIP7
L30
H_CADIN7
M30
H_CADIP6
L28
H_CADIN6
L29
H_CADIP5
J29
H_CADIN5
K29
H_CADIP4
H30
H_CADIN4
H29
H_CADIP3
E29
H_CADIN3
E28
H_CADIP2
D30
H_CADIN2
E30
H_CADIP1
D28
H_CADIN1
D29
H_CADIP0
B29
H_CADIN0
C29
H_CLKIP1
L24
H_CLKIN1
L25
H_CLKIP0
F29
H_CLKIN0
G29
H_CTLIP0
M29
H_CTLIN0
M28
R53 91_0402_5%
B28
1 2
A28
H_CLKIP1 <4> H_CLKIN1 <4>
H_CLKIP0 <4> H_CLKIN0 <4>
H_CTLIP0 <4>
H_CTLIN0 <4>
0.1U_0402_16V4Z
0.1U_0402_16V4Z
HT_TXCAD15P HT_TXCAD15N HT_TXCAD14P HT_TXCAD14N HT_TXCAD13P HT_TXCAD13N HT_TXCAD12P HT_TXCAD12N HT_TXCAD11P HT_TXCAD11N HT_TXCAD10P HT_TXCAD10N
HT_TXCAD9P HT_TXCAD9N HT_TXCAD8P HT_TXCAD8N
HT_TXCAD7P HT_TXCAD7N HT_TXCAD6P HT_TXCAD6N HT_TXCAD5P HT_TXCAD5N HT_TXCAD4P HT_TXCAD4N HT_TXCAD3P HT_TXCAD3N HT_TXCAD2P HT_TXCAD2N HT_TXCAD1P HT_TXCAD1N HT_TXCAD0P HT_TXCAD0N
HT_TXCLK1P
HYPER TRANSPORT CPU
I/F
HT_TXCLK1N HT_TXCLK0P
HT_TXCLK0N
C124
C110
+2.5VS
1
2
1
2
3
NMRASA#<15> NMCASA#<15> NMWEA#<15> NMCSA0#<15> NMCKEA<15>
NMCLKA0<15>
NMCLKA0#<15>
C69 0.47U_0603_16V7K
1 2
C183 0.47U_0603_16V7K
12
R62 1K_0402_1%
12
R59 1K_0402_1%
MEM_VREF
1 2
R55 1K_0402_5%
1 2
+1.8VS
1U_0603_10V4Z
NMAA0 NMAA1 NMAA2 NMAA3 NMAA4 NMAA5 NMAA6 NMAA7 NMAA8 NMAA9 NMAA10 NMAA11 NMAA12 NMAA13 NMAA14
NDQMA0 NDQMA1 NDQMA2 NDQMA3 NDQMA4 NDQMA5 NDQMA6 NDQMA7
NDQSA0 NDQSA1 NDQSA2 NDQSA3 NDQSA4 NDQSA5 NDQSA6 NDQSA7
NMRASA# NMCASA# NMWEA# NMCSA0# NMCKEA
NMCLKA0 NMCLKA0#
C140
1 2
2
NMAA[0..14]<15>
NMDA[0..63]<15>
NDQMA[0..7]<15>
NDQSA[0..7]<15>
AF17 AK17 AH16 AF16
AJ22
AJ21 AH20 AH21 AK19 AH19
AJ17 AG16 AG17 AH17
AJ18 AG26
AJ29 AE21 AH24 AH12 AG13
AH8 AE8
AF25 AH30 AG20
AJ25 AH13 AF14
AJ7 AG8
AG25 AH29 AF21 AK25
AJ12 AF13
AK7 AF9
AE17 AH18 AE18
AJ19 AF18
AK16
AJ16
AE28
AJ4
AJ20
AK20
AJ15
AJ14
U27B
MEM_A0 MEM_A1 MEM_A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11 MEM_A12 MEM_A13 MEM_A14
MEM_DM0 MEM_DM1 MEM_DM2 MEM_DM3 MEM_DM4 MEM_DM5 MEM_DM6 MEM_DM7
MEM_DQS0P MEM_DQS1P MEM_DQS2P MEM_DQS3P MEM_DQS4P MEM_DQS5P MEM_DQS6P MEM_DQS7P
MEM_DQS0N MEM_DQS1N MEM_DQS2N MEM_DQS3N MEM_DQS4N MEM_DQS5N MEM_DQS6N MEM_DQS7N
MEM_RAS# MEM_CAS# MEM_WE# MEM_CS# MEM_CKE
MEM_CKP MEM_CKN
MEM_CAP1 MEM_CAP2
MEM_VMODE
MEM_VREF MPVDD
MPVSS
216RS480M_BGA706
NMAA[0..14]
NMDA[0..63]
NDQMA[0..7]
NDQSA[0..7]
MEM_A I/F
MEM_COMPP MEM_COMPN
MEM_DQ0 MEM_DQ1 MEM_DQ2 MEM_DQ3 MEM_DQ4 MEM_DQ5 MEM_DQ6 MEM_DQ7 MEM_DQ8
MEM_DQ9 MEM_DQ10 MEM_DQ11 MEM_DQ12 MEM_DQ13 MEM_DQ14 MEM_DQ15 MEM_DQ16 MEM_DQ17 MEM_DQ18 MEM_DQ19 MEM_DQ20 MEM_DQ21 MEM_DQ22 MEM_DQ23 MEM_DQ24 MEM_DQ25 MEM_DQ26 MEM_DQ27 MEM_DQ28 MEM_DQ29 MEM_DQ30 MEM_DQ31 MEM_DQ32 MEM_DQ33 MEM_DQ34 MEM_DQ35 MEM_DQ36 MEM_DQ37 MEM_DQ38 MEM_DQ39 MEM_DQ40 MEM_DQ41 MEM_DQ42 MEM_DQ43 MEM_DQ44 MEM_DQ45 MEM_DQ46 MEM_DQ47 MEM_DQ48 MEM_DQ49 MEM_DQ50 MEM_DQ51 MEM_DQ52 MEM_DQ53 MEM_DQ54 MEM_DQ55 MEM_DQ56 MEM_DQ57 MEM_DQ58 MEM_DQ59 MEM_DQ60 MEM_DQ61 MEM_DQ62 MEM_DQ63
AF28 AF27 AG28 AF26 AE25 AE24 AF24 AG23 AE29 AF29 AG30 AG29 AH28 AJ28 AH27 AJ27 AE23 AG22 AF23 AF22 AE20 AG19 AF20 AF19 AH26 AJ26 AK26 AH25 AJ24 AH23 AJ23 AH22 AK14 AH14 AK13 AJ13 AJ11 AH11 AJ10 AH10 AE15 AF15 AG14 AE14 AE12 AF12 AG11 AE11 AJ9 AH9 AJ8 AK8 AH7 AJ6 AH6 AJ5 AG10 AF11 AF10 AE9 AG7 AF8 AF7 AE7
AH5 AD30
NMDA0 NMDA1 NMDA2 NMDA3 NMDA4 NMDA5 NMDA6 NMDA7 NMDA8 NMDA9 NMDA10 NMDA11 NMDA12 NMDA13 NMDA14 NMDA15 NMDA16 NMDA17 NMDA18 NMDA19 NMDA20 NMDA21 NMDA22 NMDA23 NMDA24 NMDA25 NMDA26 NMDA27 NMDA28 NMDA29 NMDA30 NMDA31 NMDA32 NMDA33 NMDA34 NMDA35 NMDA36 NMDA37 NMDA38 NMDA39 NMDA40 NMDA41 NMDA42 NMDA43 NMDA44 NMDA45 NMDA46 NMDA47 NMDA48 NMDA49 NMDA50 NMDA51 NMDA52 NMDA53 NMDA54 NMDA55 NMDA56 NMDA57 NMDA58 NMDA59 NMDA60 NMDA61 NMDA62 NMDA63
R77 61.9_0402_1%
1 2
R51 61.9_0402_1%
1 2
1
+2.5VS
A A
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
RS480M HT/MEM
LA-2421
of
11 56Wednesday, January 05, 2005
1
Page 12
5
D D
C C
GPP_RX0P<26> GPP_RX0N<26>
SB_RX0P<19> SB_RX0N<19>
SB_RX1P<19> SB_RX1N<19>
B B
R88 10K_0402_5%
1 2
R87 8.06K_0402_1%
1 2
4
U27C
D8
GFX_RX0P
D7
GFX_RX0N
D5
GFX_RX1P
D4
GFX_RX1N
E4
GFX_RX2P
F4
GFX_RX2N
G5
GFX_RX3P
G4
GFX_RX3N
H4
GFX_RX4P
J4
GFX_RX4N
H5
GFX_RX5P
H6
GFX_RX5N
G1
GFX_RX6P
G2
GFX_RX6N
K5
GFX_RX7P
K4
GFX_RX7N
L4
GFX_RX8P
M4
GFX_RX8N
N5
GFX_RX9P
N4
GFX_RX9N
P4
GFX_RX10P
R4
GFX_RX10N
P5
GFX_RX11P
P6
GFX_RX11N
P2
GFX_RX12P
R2
GFX_RX12N
T5
GPP_RX0P GPP_RX0N
SB_RX0P SB_RX0N
SB_RX1P SB_RX1N
GFX_RX13P
T4
GFX_RX13N
U4
GFX_RX14P
V4
GFX_RX14N
W1
GFX_RX15P
W2
GFX_RX15N
AE1
GPP_RX0P
AE2
GPP_RX0N
AB2
GPP_RX1P
AC2
GPP_RX1N
AB5
GPP_RX2P
AB4
GPP_RX2N
Y4
GPP_RX3P
AA4
GPP_RX3N
AG1
SB_RX0P
AH1
SB_RX0N
AC5
SB_RX1P
AC6
SB_RX1N
AH3
PCE_ISET
AJ3
PCE_TXISET
216RS480M_BGA706
PCIE I/F TO VIDEO
PCIE I/F TO SLOT
PCIE I/F TO SB
GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
GPP_TX0P GPP_TX0N
GPP_TX1P GPP_TX1N
GPP_TX2P GPP_TX2N
GPP_TX3P GPP_TX3N
SB_TX0P SB_TX0N
SB_TX1P SB_TX1N
PCE_PCAL PCE_NCAL
3
A7 B7 B6 B5 A5 A4 B3 B2 C1 D1 D2 E2 F2 F1 H2 J2 J1 K1 K2 L2 M2 M1 N1 N2 R1 T1 T2 U2 V2 V1 Y2 AA2
GPP_TX0P
AD2
GPP_TX0N
AD1 AA1
AB1 Y5
Y6 W5
W4
SB_TX0P_C
AF2
SB_TX0N_C
AG2
SB_TX1P_C
AC4
SB_TX1N_C
AD4
R344 150_0402_1%
AH2
R345 100_0402_1%
AJ2
C558 0.1U_0402_16V4Z C559 0.1U_0402_16V4Z
C560 0.1U_0402_16V4Z C561 0.1U_0402_16V4Z
C556 0.1U_0402_16V4Z C557 0.1U_0402_16V4Z
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
PCIE_TX0P PCIE_TX0N
SB_TX0P SB_TX0N
SB_TX1P SB_TX1N
+1.2V_HT
2
PCIE_TX0P <26> PCIE_TX0N <26>
SB_TX0P <19> SB_TX0N <19>
SB_TX1P <19> SB_TX1N <19>
1
A A
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
PCIE
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
LA-2421
of
12 56Wednesday, January 05, 2005
1
Page 13
+1.8VS
FBML10160808121LMT_0603
+1.8VS
1 2
FBML10160808121LMT_0603
+1.8VS
1 2
FBML10160808121LMT_0603
+2.5VS
4.7K_0402_5%
L4
1 2
10U_0805_10V4Z
CRT_VSYNC<18> CRT_HSYNC<18>
3VDDCCL<18>
L9
10U_0805_10V4Z L6
10U_0805_10V4Z
+3VS
3VDDCDA<18>
1
2
1
2
1 2
FBML10160808121LMT_0603
NB_REFCLK<16>
SB_OSC_INT<16,20>
+3VS
R324
1 2
1
C74
2
TV_CRMA<18,41> TV_LUMA<18,41>
TV_COMPS<18,41>
CRT_R<18>
CRT_G<18>
CRT_B<18>
1
C134
C131
1U_0603_10V4Z
2
1
C83
C94
1U_0603_10V4Z
2
R85
2.2K_0402_5% L10
R325
4.7K_0402_5%
1 2
EDID_CLK_LCD
EDID_DAT_LCD
+3VS
FBML10160808121LMT_0603
0.1U_0402_16V4Z
1
C77
1U_0603_10V4Z
2
SUS_STAT#
12
R321 22_0402_5%@
BMREQ#<19>
EDID_CLK_LCD<17>
L3
1 2
0.1U_0402_16V4Z
+1.8VS
C81
R50 715_0402_1%
1 2
+NB_PLLVDD
+NB_HTPVDD
NB_PWRGD<40>
LDTSTOP#<6,19>
ALLOW_LDTSTOP<19>
1 2
R1141 5.6K_0402_5%
+NB_VDDR3
C150
1 2
R75 10K_0402_5%
SPMEM_EN#<23> LOAD_ROM#<23>
C70
1
2
NB_RST#<19,26,34>
1U_0603_10V4Z
12
EDID_CLK_LCD
AVDDQ
12
AVDD
1
2
U27D
B27
AVDD1
C27
AVDD2
D26
AVSSN1
D25
AVSSN2
C24
AVDDDI
B24
AVSSDI
E24
AVDDQ
D24
AVSSQ
B25
C
A25
Y
A24
COMP
C25
RED
A26
GREEN
B26
BLUE
A11
DAC_VSYNC
B11
DAC_HSYNC
C26
RSET
E11
DAC_SCL
F11
DAC_SDA
A14
PLLVDD
B14
PLLVSS
M23
HTPVDD
L23
HTPVSS
D14
SYSRESET#
B15
POWERGOOD
B12
LDTSTOP#
C12
ALLOW_LDTSTOP
AH4
SUS_STAT#
H13
VDDR3_1
H12
VDDR3_2
A13
OSCIN
B13
OSCOUT
B9
TVCLKIN
F12
DFT_GPIO0/RSV
E13
DFT_GPIO1/RSV
D13
DFT_GPIO2/RSV
F10
BMREQb
C10
I2C_CLK
C11
I2C_DATA
AF4
THERMALDIODE_P
AE4
THERMALDIODE_N
216RS480M_BGA706
CRT/TVOUT
PLL PWR
PM
CLOCKs
MIS.
TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N
TXOUT_L0P TXOUT_L0N TXOUT_L1P TXOUT_L1N TXOUT_L2P TXOUT_L2N TXOUT_L3P TXOUT_L3N
TXCLK_UP TXCLK_UN TXCLK_LP TXCLK_LN
LVDS
LPVDD LPVSS
LVDDR18D LVDDR18A_1 LVDDR18A_2
LVSSR1 LVSSR2 LVSSR3 LVSSR4 LVSSR5 LVSSR6 LVSSR7 LVSSR8
LVDS_DIGON
LVDS_BLON LVDS_BLEN
GFX_CLKP
GFX_CLKN
HTTSTCLK
HTREFCLK
SB_CLKP SB_CLKN
DFT_GPIO3/RSV DFT_GPIO4/RSV DFT_GPIO5/RSV
TMDS_HPD
STRP_DATA
DDC_DATA TESTMODE
LVDSB0+
D18
LVDSB0-
C18
LVDSB1+
B19
LVDSB1-
A19
LVDSB2+
D19
LVDSB2-
C19 D20 C20
LVDSA0+
B16
LVDSA0-
A16
LVDSA1+
D16
LVDSA1-
C16
LVDSA2+
B17
LVDSA2-
A17 E17 D17
LVDSBC+
B20
LVDSBC-
A20
LVDSAC+
B18
LVDSAC-
C17 E18
F17 E19 G20
LVDDR18A
H20 G19
E20 F20 H18 G18 F19 H19 F18
E14 F14 F13
B8 A8
P23 N23
E8 E7
C13 C14 C15
A10 E10
EDID_DAT_LCD
B10 E12
C103
0.1U_0402_16V4Z
R56 10K_0402_5%
1 2
STRP_DATA
R74 4.7K_0402_5%
1 2
LVDSB0+ <17> LVDSB0- <17> LVDSB1+ <17> LVDSB1- <17> LVDSB2+ <17> LVDSB2- <17>
LVDSA0+ <17> LVDSA0- <17> LVDSA1+ <17> LVDSA1- <17> LVDSA2+ <17> LVDSA2- <17>
LVDSBC+ <17> LVDSBC- <17> LVDSAC+ <17> LVDSAC- <17>
LVDDR18D
FBML10160808121LMT_0603
1
1
C72 1U_0603_10V4Z
2
2
NBSRCCLK <16> NBSRCCLK# <16>
HTREFCLK <16> SBLINKCLK <16>
SBLINKCLK# <16>
1 2
R1074 2.2K_0402_5%ROM@
1 2
R1075 2.2K_0402_5%@
EDID_DAT_LCD <17>
L5
1 2
+3VS
0.1U_0402_16V4Z
+1.8VS
C102
12
R1132 1K_0402_5%
LPVDD
C116
0.1U_0402_16V4Z
FBML10160808121LMT_0603
1
1
C117 1U_0603_10V4Z
2
2
ENVDD <17> ENABLT <17,37,38>
R1076
1K_0402_5%ROM@
EDID_CLK_LCD STRP_DATA
FBML10160808121LMT_0603
1
1
C118 1U_0603_10V4Z
2
2
L7
1 2
+3VS
12
L8
1 2
C1074
12
0.1U_0402_16V4ZROM@
U43
8
VCC
7
WP
6
SCL
5
SDA
AT24C04N-10SI-2.7_SO8~DROM@
+1.8VS
+1.8VS
VSS
1
NC
2
A1
3
A2
4
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Power/GND
LA-2421
of
13 56Wednesday, January 05, 2005
0.6
Page 14
5
U27F
G10
VSS1
G12
VSS2
AD29
VSS3
AD27
VSS4
AC27
VSS5
G15
VSS6
G14
VSS7
Y24
VSS8
G13
VSS9
E9
VSS10
D15
VSS11
D9
VSS12
AD9
VSS13
G11
5
VSS14
F16
VSS15
G30
VSS16
AB28
VSS17
AB25
VSS18
D12
VSS19
AD24
VSS20
AA28
VSS21
G17
VSS22
Y23
VSS23
AC9
VSS24
R19
VSS25
Y27
VSS26
C28
VSS27
G16
VSS28
F25
VSS29
B30
VSS30
T24
VSS31
F26
VSS32
W27
VSS33
D11
VSS34
H11
VSS35
AD25
VSS36
H17
VSS37
H10
VSS38
H16
VSS39
H14
VSS40
E16
VSS41
D10
VSS42
E15
VSS43
F15
VSS44
U15
VSS45
V14
VSS46
R15
VSS47
T14
VSS48
N15
VSS49
V12
VSS50
N13
VSS51
P14
VSS52
U17
VSS53
T16
VSS54
R17
VSS55
P12
VSS56
T12
VSS57
R13
VSS58
W13
VSS59
W17
VSS60
P18
VSS61
V18
VSS62
M18
VSS63
U13
VSS64
N17
VSS65
W15
VSS66
V16
VSS67
T18
VSS68
M14
VSS69
M12
VSS70
M16
VSS71
P16
VSS72
U19
VSS73
AC16
VSS74
AG18
VSS75
AC23
VSS76
AD8
VSS77
AD11
VSS78
AD13
VSS79
AD16
VSS80
AD19
VSS81
AD23
VSS82
AG5
VSS83
AG6
VSS84
AG21
VSS85
AD17
VSS86
AG15
VSS87
AG12
VSS88
AF30
VSS89
AG24
VSS90
AG9
VSS91
AC19
VSS92
AG27
VSS93
AC11
VSS94
AD7
VSS95
AJ30
VSS96
AC21
VSS97
AK5
VSS98
AK10
VSS99
AC13
VSS100
AD21
VSS101
AK22
VSS102
AK29
VSS103
W19
VSS104
AE26
VSS105
AE27
VSS106
T27
VSS107
R27
VSS108
AD28
VSS109
F24
VSS110
F27
VSS111
G28
VSS112
216RS480M_BGA706
GROUND
D D
VSS30
C C
B B
VSS89
A A
VSSA1 VSSA2 VSSA3 VSSA4 VSSA5 VSSA6 VSSA7 VSSA8
VSSA9 VSSA10 VSSA11 VSSA12 VSSA13 VSSA14 VSSA15 VSSA16 VSSA17 VSSA18 VSSA19 VSSA20 VSSA21 VSSA22 VSSA23 VSSA24 VSSA25 VSSA26 VSSA27 VSSA28 VSSA29 VSSA30 VSSA31 VSSA32 VSSA33 VSSA34 VSSA35 VSSA36 VSSA37 VSSA38 VSSA39 VSSA40 VSSA41 VSSA42 VSSA43 VSSA44 VSSA45 VSSA46 VSSA47 VSSA48 VSSA49 VSSA50 VSSA51 VSSA52 VSSA53 VSSA54 VSSA55 VSSA56 VSSA57 VSSA58 VSSA59 VSSA60 VSSA61 VSSA62 VSSA63 VSSA64 VSSA65 VSSA66 VSSA67 VSSA68
VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120
VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132
R5 AE5 V5 N3 F7 F5 R3 AA6 T3 M6 C5 F8 M8 Y8 V3 C3 W3 K8 D3 C6 AA3 A2 AB3 P8 J6 C8 AD3 V8 F3 AE3 AF3 M5 AB7 G3 B4 P7 AA5 C9 C7 J5 R6 J3 AD5 D6 C4 K3 AB8 T7 Y7 AD6 K7 H7 M3 V6 H8 C2 AG3 L6 AJ1 M7 V7 F6 E6 U5 U6 E5 L5 T8
F28 H28 M24 J28 N19 K28 T23 L27
M27 H24 N28 P25 P28 E26 K25 U28 V25 V28 R23
VSSA22
VSSA59
4
VDDA12_13
1
C178
4.7U_0805_6.3V6K
2
VSSA22
VDDA18_13
1
C180
4.7U_0805_6.3V6K
2
VSSA59
VDDHT30
1
C59
4.7U_0805_6.3V6K
2
VSS30
VDDHT31
1
C58
4.7U_0805_6.3V6K
2
VSS89
4
3
+1.8VS
FBML10160808121LMT_0603
BAV99DW-7_SOT363
+3VS
12 12
12 12 12 12 12 12 12 12 12 12 12 12
12 12
12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12
L11
1 2
D33A
+1.2V_HT
C5322U_1206_10V4Z C860.1U_0402_16V4Z
C870.1U_0402_16V4Z C880.1U_0402_16V4Z C890.1U_0402_16V4Z C900.1U_0402_16V4Z C960.1U_0402_16V4Z C910.1U_0402_16V4Z C670.1U_0402_16V4Z C620.1U_0402_16V4Z C630.1U_0402_16V4Z C650.1U_0402_16V4Z C640.1U_0402_16V4Z C820.1U_0402_16V4Z
+2.5VS
C17522U_1206_10V4Z C660.1U_0402_16V4Z
C850.1U_0402_16V4Z C1510.1U_0402_16V4Z C1770.1U_0402_16V4Z C1280.1U_0402_16V4Z C600.1U_0402_16V4Z C950.1U_0402_16V4Z C1000.1U_0402_16V4Z C1060.1U_0402_16V4Z C1150.1U_0402_16V4Z C1330.1U_0402_16V4Z C1480.1U_0402_16V4Z C1520.1U_0402_16V4Z C1590.1U_0402_16V4Z C1050.1U_0402_16V4Z C1250.1U_0402_16V4Z C1320.1U_0402_16V4Z C1580.1U_0402_16V4Z
VDD18
1
C1791U_0603_10V4Z
12
C1190.1U_0402_16V4Z
12
C1260.1U_0402_16V4Z
12
C1300.1U_0402_16V4Z
12
C1290.1U_0402_16V4Z
12
6
2
VDDHT30 VDDHT31
4
5
D33B
3
BAV99DW-7_SOT363
AB24
AA27
AB27 AB23
W23
AA23
AC30 AK23
AK28 AK11
AE30 AC14 AD12 AC18 AC20 AD10 AD14 AD15 AD20 AC10 AD18 AC12 AD22 AC22 AH15
AC17 AC15
N27 U27
V27 G27 V24 H27 K24
P27
J27 K27
P24
V23 G23 E23
K23
J23 H23 U23
D23 F23 C23 B23 A23 A29
AK4
H15
B21 C21 A22 B22 C22 F21 F22 E21 G21
2
U27E
VDD_HT1 VDD_HT2 VDD_HT3 VDD_HT4 VDD_HT5 VDD_HT6 VDD_HT7 VDD_HT8 VDD_HT9 VDD_HT10 VDD_HT11 VDD_HT12 VDD_HT13 VDD_HT14 VDD_HT15 VDD_HT16 VDD_HT17 VDD_HT18 VDD_HT19 VDD_HT20 VDD_HT21 VDD_HT22 VDD_HT23 VDD_HT24 VDD_HT25 VDD_HT26 VDD_HT27 VDD_HT28 VDD_HT29 VDD_HT30 VDD_HT31
VDD_MEM1 VDD_MEM2 VDD_MEM3 VDD_MEM4 VDD_MEM5 VDD_MEM6 VDD_MEM7 VDD_MEM8 VDD_MEM9 VDD_MEM10 VDD_MEM11 VDD_MEM12 VDD_MEM13 VDD_MEM14 VDD_MEM15 VDD_MEM16 VDD_MEM17 VDD_MEM18 VDD_MEMCK
VDD18_1 VDD18_2 VDD18_3
VDD_CORE47 VDD_CORE46 VDD_CORE45 VDD_CORE44 VDD_CORE43 VDD_CORE42 VDD_CORE41 VDD_CORE40 VDD_CORE39
216RS480M_BGA706
POWER
VDDA12_14
VDDA12_1 VDDA12_2 VDDA12_3 VDDA12_4 VDDA12_5 VDDA12_6 VDDA12_7 VDDA12_8
VDDA12_9 VDDA12_10 VDDA12_11 VDDA12_12 VDDA12_13
VDDA18_1
VDDA18_2
VDDA18_3
VDDA18_4
VDDA18_5
VDDA18_6
VDDA18_7
VDDA18_8
VDDA18_9 VDDA18_10 VDDA18_11 VDDA18_12 VDDA18_13
VDD_CORE1 VDD_CORE2 VDD_CORE3 VDD_CORE4 VDD_CORE5 VDD_CORE6 VDD_CORE7 VDD_CORE8
VDD_CORE9 VDD_CORE10 VDD_CORE11 VDD_CORE12 VDD_CORE13 VDD_CORE14 VDD_CORE15 VDD_CORE16 VDD_CORE17 VDD_CORE18 VDD_CORE19 VDD_CORE20 VDD_CORE21 VDD_CORE22 VDD_CORE23 VDD_CORE24 VDD_CORE25 VDD_CORE26 VDD_CORE27 VDD_CORE28 VDD_CORE29 VDD_CORE30 VDD_CORE31 VDD_CORE32 VDD_CORE33 VDD_CORE34 VDD_CORE35 VDD_CORE36 VDD_CORE37 VDD_CORE38
H9 AA7 G9 U8 N7 N8 U7 F9 AA8 G8 G7 J8 J7 B1 AG4 R8 AC8 AC7 AF6 AE6 L8 W8 W7 L7 R7 AF5 AK2 N16 M13 M15 W16 N18 P19 N12 P15 N14 M17 T19 G22 R12 P13 R14 V19 R18 U16 U12 T13 U14 T17 U18 E22 R16 V13 T15 P17 W18 D22 W12 V15 W14 V17 M19 H22 H21 D21
For EMI require
+1.2V_HT
1
C1209 1000P_0402_50V7K
2
+1.2V_HT
1
C1212 220P_0402_25V8K
2
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1
C1210 1000P_0402_50V7K
2
1
C1213 220P_0402_25V8K
2
2
1
+1.2V_HT
C54 22U_1206_10V4Z
1 2
C92 1U_0603_10V4Z
1 2
C161 1U_0402_6.3V4Z
1 2
C162 1U_0402_6.3V4Z
1 2
C163 1U_0402_6.3V4Z
1 2
C164 1U_0402_6.3V4Z
1 2
VDDA12_13
+1.8VS
C187 1U_0603_10V4Z
1 2
C167 0.1U_0402_16V4Z
1 2
C168 0.1U_0402_16V4Z
1 2
C169 0.1U_0402_16V4Z
1 2
C170 0.1U_0402_16V4Z
1 2
VDDA18_13
+1.2V_HT
+
C1182 100U_D2_6.3M_R45@
1 2
C108 22U_1206_10V4Z
1 2
C97 22U_1206_10V4Z
1 2
C111 0.1U_0402_16V4Z
1 2
C112 0.1U_0402_16V4Z
1 2
C113 0.1U_0402_16V4Z
1 2
C114 0.1U_0402_16V4Z
1 2
C107 0.1U_0402_16V4Z
1 2
C120 0.1U_0402_16V4Z
1 2
C121 0.1U_0402_16V4Z
1 2
C139 0.1U_0402_16V4Z
1 2
C122 0.1U_0402_16V4Z
1 2
C123 0.1U_0402_16V4Z
1 2
C127 0.1U_0402_16V4Z
1 2
C135 0.1U_0402_16V4Z
1 2
C136 1U_0402_6.3V4Z
1 2
C137 1U_0402_6.3V4Z
1 2
C138 1U_0402_6.3V4Z
1 2
C155 0.1U_0402_16V4Z
1 2
C153 1U_0402_6.3V4Z
1 2
C154 1U_0402_6.3V4Z
1 2
C156 1U_0402_6.3V4Z
1 2
C157 1U_0402_6.3V4Z
1 2
1
C1211 1000P_0402_50V7K
2
1
C1214 220P_0402_25V8K
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
LA-2421
RS480M Power/GND
1
of
14 56Wednesday, January 05, 2005
Page 15
5
4
3
2
1
+2.5VS +2.5VS
C522
1
2
(25mil)
C46
0.1U_0402_16V4ZVRAM@
1
C508
2
0.1U_0402_16V4ZVRAM@
1
2
0.1U_0402_16V4ZVRAM@
1
C44
2
1
C78
2
0.1U_0402_16V4ZVRAM@
0.1U_0402_16V4ZVRAM@
1
C45
2
C523
1
C524
2
10U_0805_10V4ZVRAM@
C181
1
2
0.1U_0402_16V4ZVRAM@
0.1U_0402_16V4ZVRAM@
1
2
0.1U_0402_16V4ZVRAM@
C146
1
C546
C563
2
10U_0805_10V4ZVRAM@
0.1U_0402_16V4ZVRAM@
1
2
1
C182
2
0.1U_0402_16V4ZVRAM@
0.1U_0402_16V4ZVRAM@
C186
1
C145
2
1
2
0.1U_0402_16V4ZVRAM@
0.1U_0402_16V4ZVRAM@
C537
1
2
1
2
C536
1
C565
2
0.1U_0402_16V4ZVRAM@
As close as ppossible to related pin
NMCLKA0
NMCLKA0#
NMCKEA
NMAA13 NMAA14
NMCSA0# NMRASA# NMCASA#
NMWEA#
NMCLKA0 NMCLKA0#
NMCKEA
NMAA13 NMAA14
NMCSA0# NMRASA# NMCASA#
NMWEA#
+2.5VS
+2.5VS
NMCKEA <11>
NMCSA0# <11> NMRASA# <11> NMCASA# <11>
NMWEA# <11>
12
12
NMCLKA0
R317
C533
1 2
0.01U_0402_16V7KVRAM@
R315
NMCLKA0#
NDQSA5 NDQMA5 NMDA40 NMDA41 NMDA42 NMDA43 NMDA44 NMDA45 NMDA46 NMDA47
(25mil)
NDQSA4 NDQMA4 NMDA32 NMDA33 NMDA34 NMDA35 NMDA36 NMDA37 NMDA38 NMDA39
VREF_2 NMAA0
1
NMAA1 NMAA2 NMAA3
2
NMAA4 NMAA5 NMAA6 NMAA7 NMAA8 NMAA9 NMAA10 NMAA11 NMAA12
NDQSA6 NDQMA6 NMDA48 NMDA49 NMDA50 NMDA51 NMDA52 NMDA53 NMDA54 NMDA55
NDQSA7 NDQMA7 NMDA56 NMDA57 NMDA58 NMDA59 NMDA60 NMDA61 NMDA62 NMDA63
VREF_2 NMAA0
1
NMAA1 NMAA2 NMAA3
2
NMAA4 NMAA5 NMAA6 NMAA7 NMAA8 NMAA9 NMAA10 NMAA11 NMAA12
+2.5VS+2.5VS
12
R91 1K_0402_1%VRAM@
12
R89 1K_0402_1%VRAM@
C566
VRAM@
0.1U_0402_16V4Z
NMCLKA0 <11>
C147
56_0402_5%VRAM@
0.1U_0402_16V4ZVRAM@
56_0402_5%VRAM@
U28
16
LDQS0
20
LDM1
2
DQ0
4
DQ1
5
DQ2
7
DQ3
8
DQ4
10
DQ5
11
DQ6
13
DQ7
51
UDQS0
47
UDM1
54
DQ8
56
DQ9
57
DQ10
59
DQ11
60
DQ12
62
DQ13
63
DQ14
65
DQ15
49
VREF
29
A0
30
A1
31
A2
32
A3
35
A4
36
A5
37
A6
38
A7
39
A8
40
A9
28
AP/A10
41
A11
42
A12
HY5DU561622CT-4_TSOPII66VRAM@
U7
16
LDQS0
20
LDM1
2
DQ0
4
DQ1
5
DQ2
7
DQ3
8
DQ4
10
DQ5
11
DQ6
13
DQ7
51
UDQS0
47
UDM1
54
DQ8
56
DQ9
57
DQ10
59
DQ11
60
DQ12
62
DQ13
63
DQ14
65
DQ15
49
VREF
29
A0
30
A1
31
A2
32
A3
35
A4
36
A5
37
A6
38
A7
39
A8
40
A9
28
AP/A10
41
A11
42
A12
HY5DU561622CT-4_TSOPII66VRAM@
VDD0 VDD1
VDD2 VDDQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4
RAS# CAS#
WE#
VSSQ0 VSSQ1 VSSQ2 VSSQ3 VSSQ4
VSS0 VSS1 VSS2
VDD0
VDD1
VDD2 VDDQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4
RAS# CAS#
WE#
VSSQ0 VSSQ1 VSSQ2 VSSQ3 VSSQ4
VSS0 VSS1 VSS2
NC0 NC1 NC2 NC3 NC4 NC5 NC6
CK# CKE
BA0 BA1
CS#
NC0 NC1 NC2 NC3 NC4 NC5 NC6
CK# CKE
BA0 BA1
CS#
1 18 33 3 9 15 55 61
14 17 19 25 43 50 53
45
CK
46 44
26 27
24 23 22 21
6 12 52 58 64 34 48 66
1 18 33 3 9 15 55 61
14 17 19 25 43 50 53
45
CK
46 44
26 27
24 23 22 21
6 12 52 58 64 34 48 66
NMCLKA0# <11>
NDQSA3 NDQMA3 NMDA24 NMDA25 NMDA26 NMDA27 NMDA28 NMDA29 NMDA30 NMDA31
NDQSA2 NDQMA2 NMDA16 NMDA17 NMDA18 NMDA19 NMDA20 NMDA21 NMDA22 NMDA23
VREF_1 NMAA0
1
NMAA1 NMAA2 NMAA3
2
NMAA4 NMAA5 NMAA6 NMAA7 NMAA8 NMAA9 NMAA10 NMAA11 NMAA12
NDQSA1 NDQMA1 NMDA8 NMDA9 NMDA10 NMDA11 NMDA12 NMDA13 NMDA14 NMDA15
NDQSA0 NDQMA0 NMDA0 NMDA1 NMDA2 NMDA3 NMDA4 NMDA5 NMDA6 NMDA7
VREF_1 NMAA0
1
NMAA1 NMAA2 NMAA3
2
NMAA4 NMAA5 NMAA6 NMAA7 NMAA8 NMAA9 NMAA10 NMAA11 NMAA12
U23
16
LDQS0
20
LDM1
2
DQ0
4
DQ1
5
DQ2
7
DQ3
8
DQ4
10
DQ5
11
DQ6
13
DQ7
51
UDQS0
47
UDM1
54
DQ8
56
DQ9
57
DQ10
59
DQ11
60
DQ12
62
DQ13
63
DQ14
65
DQ15
49
VREF
29
A0
30
A1
31
A2
32
A3
35
A4
36
A5
37
A6
38
A7
39
A8
40
A9
28
AP/A10
41
A11
42
A12
HY5DU561622CT-4_TSOPII66VRAM@
U4
16
LDQS0
20
LDM1
2
DQ0
4
DQ1
5
DQ2
7
DQ3
8
DQ4
10
DQ5
11
DQ6
13
DQ7
51
UDQS0
47
UDM1
54
DQ8
56
DQ9
57
DQ10
59
DQ11
60
DQ12
62
DQ13
63
DQ14
65
DQ15
49
VREF
29
A0
30
A1
31
A2
32
A3
35
A4
36
A5
37
A6
38
A7
39
A8
40
A9
28
AP/A10
41
A11
42
A12
HY5DU561622CT-4_TSOPII66VRAM@
VDD0 VDD1
VDD2 VDDQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4
NC0 NC1 NC2 NC3 NC4 NC5 NC6
CK# CKE
BA0 BA1
CS# RAS# CAS#
WE#
VSSQ0 VSSQ1 VSSQ2 VSSQ3 VSSQ4
VSS0 VSS1 VSS2
VDD0 VDD1 VDD2
VDDQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4
NC0
NC1
NC2
NC3
NC4
NC5
NC6
CK#
CKE
BA0
BA1
CS# RAS# CAS#
WE#
VSSQ0 VSSQ1 VSSQ2 VSSQ3 VSSQ4
VSS0 VSS1 VSS2
1 18 33 3 9 15 55 61
14 17 19 25 43 50 53
45
CK
46 44
26 27
24 23 22 21
6 12 52 58 64 34 48 66
1 18 33 3 9 15 55 61
14 17 19 25 43 50 53
45
CK
46 44
26 27
24 23 22 21
6 12 52 58 64 34 48 66
NMCLKA0
NMCLKA0#
NMCKEA
NMAA13 NMAA14
NMCSA0# NMRASA# NMCASA#
NMWEA#
NMCLKA0
NMCLKA0#
NMCKEA
NMAA13 NMAA14
NMCSA0# NMRASA# NMCASA#
NMWEA#
+2.5VS
For EMI require
+2.5VS
+2.5VS
1
C1221 1000P_0402_50V7K
2
+2.5VS
1
C1224 220P_0402_25V8K
2
1
C1222 1000P_0402_50V7K
2
1
C1225 220P_0402_25V8K
2
1
C1223 1000P_0402_50V7K
2
1
C1226 220P_0402_25V8K
2
0.1U_0402_16V4ZVRAM@
1
C80
VRAM@
D D
10U_0805_10V4Z
2
1
2
0.1U_0402_16V4ZVRAM@
C500
1
C510
C93
2
10U_0805_10V4ZVRAM@
As close as ppossible to related pin
NMAA[0..14]<11>
NMDA[0..63]<11>
NDQMA[0..7]<11>
NDQSA[0..7]<11>
C C
B B
A A
NMAA[0..14]
NMDA[0..63]
NDQMA[0..7]
NDQSA[0..7]
12
R284 1K_0402_1%VRAM@
12
R287 1K_0402_1%VRAM@
0.1U_0402_16V4ZVRAM@
0.1U_0402_16V4ZVRAM@
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
VGA DDR
LA-2421
of
15 56Wednesday, January 05, 2005
1
Page 16
A
B
C
D
E
F
G
H
For EMI require
+3V_CLK
1
C1215 1000P_0402_50V7K
2
PCIECLK0 PCIECLK0#
SBSRCCLK SBSRCCLK#
NBSRCCLK NBSRCCLK#
SBLINKCLK SBLINKCLK#
1
C1216 1000P_0402_50V7K
2
PCIECLK0 <26> PCIECLK0# <26>
SBSRCCLK <19> SBSRCCLK# <19>
NBSRCCLK <13> NBSRCCLK# <13>
SBLINKCLK <13> SBLINKCLK# <13>
+3VS +3V_CLK
L13
NB_REFCLK<13>
Width=40 mils
C592
2.2U_0805_10V4Z
1 2
R412 10K_0402_5%@
+3VS
12
L14
XTALIN_CLK XTALOUT_CLK
1 2
NC_CLKSEL0#<26>
1 1
C601
22P_0402_50V8J
1 2
1 2
2 2
C605
22P_0402_50V8J
1 2
CHB2012U121_0805
CHB2012U121_0805
12
Y3
14.31818MHz_20P_1BX14318BE1A
0.1U_0402_16V4Z
1
C573
C583
2
10U_0805_10V4Z
CLK_STOP
SB_SCLK<8,9,20,26> SB_SDAT<8,9,20,26>
R358 33_0402_5%
1 2
R359 475_0402_1%
1 2
NC_CLKSEL1# NC_CLKSEL0#
1
C571
2
0.1U_0402_16V4Z
SB_SCLK SB_SDAT
0.1U_0402_16V4Z
1
1
C570
2
2
U35
43
VDDCPU
14
VDDSRC
21
VDDSRC
35
VDDSRC
32
VDDATI
51
VDD_PCI
48
VDDHTT
56
VDDREF
3
VDD48
1
X1
2
X2
6
NC
7
SCLK
8
SDATA
52
REF2
37
IREF
11
CLKREQB#
10
CLKREQA#
5
GND
55
GND
36
GNDSRC
26
GNDSRC
20
GNDSRC
15
GNDSRC
31
GNDATI
49
GNDPCI
46
GNDHTT
42
GNDCPU
ICS951412AGLFT_TSSOP56
C192
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C602
2
0.1U_0402_16V4Z
VDDA
GNDA
CPUCLK8T0 CPUCLK8C0 CPUCLK8T1 CPUCLK8C1
SRCCLKT7
SRCCLKC7
SRCCLKT6
SRCCLKC6
SRCCLKT5
SRCCLKC5
SRCCLKT4
SRCCLKC4
SRCCLKT3 SRCCLKC3 ATIGCLKT1
ATIGCLKC1
ATIGCLKT0
ATIGCLKC0
SRCCLKT0 SRCCLKC0
PCICLK0
FS0/REF0 FS1/REF1
USB_48MHz
HTTCLK0
1
2
39 38
45 44 41 40
12 13 16 17 18 19 22 23 24 25 27 28 30 29 34 33
50
54 53 9
FS2
4 47
C603
2
+3V_VDD
C572
0.1U_0402_16V4Z
CPUCLK0H CPUCLK0L
PCIECLK0_R PCIECLK0#_R
SBSRCCLK_R SBSRCCLK#_R
NBSRCCLK_R NBSRCCLK#_R SBLINKCLK_R SBLINKCLK#_R
R407 33_0402_5% R408 33_0402_5%
R409 33_0402_5% R410 33_0402_5%
R541 33_0402_5%@ R543 33_0402_5%@ R368 33_0402_5% R369 33_0402_5%
FS0
R375 33_0402_5%
1 2
FS1 FS2
R411 33_0402_5%
1 2
R406 33_0402_5%@
1 2
R365 33_0402_5%
1 2
CHB2012U121_0805
1
1
C195
2
2
10U_0805_10V4Z
R366 15_0402_1%
1 2
R367 15_0402_1%
1 2
1 2 1 2
1 2 1 2
1 2 1 2 1 2 1 2
12
L12
12
PCIECLK0 PCIECLK0#
SBSRCCLK SBSRCCLK#
NBSRCCLK NBSRCCLK# SBLINKCLK SBLINKCLK#
R352
51.1_0402_1%
+3VS+3V_VDD
R416 49.9_0402_1% R417 49.9_0402_1%
R418 49.9_0402_1% R419 49.9_0402_1%
R542 49.9_0402_1%@ R544 49.9_0402_1% @ R354 49.9_0402_1% R355 49.9_0402_1%
CPUCLK0_H <6> CPUCLK0_L <6>
1 2 1 2
1 2 1 2
1 2 1 2 1 2 1 2
SB_OSC_INT <13,20>
CLK_48M <24> USBCLK_EXT <20>
HTREFCLK <13>
3 3
VR_ON<37,38,50>
4 4
A
+3VS
12
R1136 10K_0402_5%@
CLK_STOP
13
D
2
G
Q43
S
2N7002_SOT23@
FS0 FS1 FS2
B
C
12
R362
10K_0402_5%
12
R363
8.2K_0402_5%@
D
12
R99
10K_0402_5%
12
R364
8.2K_0402_5%@
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+3V_CLK
12
12
E
R130
10K_0402_5%
R131
8.2K_0402_5%@
EXT CLK FRE QU EN CY SELECT TABLE(MHZ)
FS2
0 0 0 0 0 1
0 1 0 0 1 1 1 0 0 1 0 1 1 1 1
*
F
SRCCLK
CPUFS1
Hi-Z X
180.00
220.00
100.00
133.33
200.00
HTTFS0 PCI
[2:1]
Hi-Z Hi-Z
100.00
100.00
100.00
100.00
100.00
100.00
100.00
Title
Size Document Number Rev
Date: Sheet
X/6X/3
30.0060.00
36.56 73.12
66.66 33.33
66.66 33.33
66.66 33.33 Nor ma l H A MMER o pe r a ti o n
Compal Electronics, Inc.
Clock Generator
LA-2421
G
USB
48.00
48.00
48.00
48.00
48.00
48.00
48.00
COMMENT
Reserved Reserved Reserved Reserved Reserved Reserved
of
16 56Wednesday, January 05, 2005
H
Page 17
A
B
C
D
E
F
G
H
1 1
LVDSA2+<13> LVDSA2-<13>
LVDSA1+<13> LVDSA1-<13>
LVDSB2+<13> LVDSB2-<13>
LVDSA0+<13> LVDSA0-<13>
LVDSAC+<13> LVDSAC-<13>
LVDSB1+<13> LVDSB1-<13>
2 2
3 3
LCD Panel Connector
JP3
1
LVDSA2+ LVDSA2-
LVDSA1+
LVDSB2+ LVDSB2-
LVDSA0+ LVDSA0-
LVDSAC+ LVDSAC-
LVDSB1+ LVDSB1-
+3VS
21
2
22
3
23
4
24
5
25
6
26
7
27
8
28
9
29
10
30
11
31
12
32
13
33
14
34
15
35
16
36
17
37
18
38
19
39
20
40
ACES_88107-4000G
2N7002_SOT23
ENVDD<13>
LVDSB0+ LVDSB0-LVDSA1-
LVDSBC+ LVDSBC-
DISPOFF#
EDID_CLK_LCD EDID_DAT_LCD
+LCDVDD
Q4
ENVDD
The cap.'s colsely to LCD CONN.
LVDSB0+ <13>
LVDSB0- <13>
LVDSBC+ <13> LVDSBC- <13>
INVT_PWM <37,38> DAC_BRIG <37,38>
B+
12
13
D
S
R240 1K_0402_5%
1
C1227 10P_0402_50V8K@
2
+12VALW
R6 100K_0402_5%
1 2
2
G
1
O
Q5 DTC124EK_SC59
G
I
3
2
10U_0805_10V4Z@
1
2
2
G
1
C463
2
C1228 10P_0402_50V8K@
+12VALW
R5 100K_0402_5%
1 2
150K_0402_5%
13
D
S
1
C467
0.01U_0402_16V7K
2
EDID_CLK_LCD <13> EDID_DAT_LCD <13>
R3
1 2
Q3 2N7002_SOT23
+LCDVDD
1
C451
2
0.047U_0402_16V4Z
+3VS
1
2
1
D
Q26 SI2302DS_SOT23
S
G
3
2
SI2302DS: N CHANNEL VGS: 4.5V, RDS: 85 mOHM VGS: 2.5V, RDS: 115mOHM Id(MAX): 2.8A VGS(MAX): +-8V
C452
0.1U_0402_16V4Z
C444
4.7U_0805_10V4Z
1
2
+LCDVDD
1
C458
4.7U_0805_10V4Z
2
BKOFF#<37,38>
ENABLT<13,37,38>
EMI require
0.001U_0402_50V7M
D9 RB751V_SOD323
D10 RB751V_SOD323
B+
1
C20
2
21
21
1
0.001U_0402_50V7M
2
+3VS
R29
4.7K_0402_5%
1 2
DISPOFF#
C21
4 4
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
E
F
Size Document Number Rev
LA-2421
Date: Sheet of
Compal Electronics, Inc.
LVDS Connector
G
0.6
17 56Wednesday, January 05, 2005
H
Page 18
A
B
C
D
E
+5VS
+R_CRT_VCC
D6
2 1
CRT CONNECTOR
3VDDCDA<13>
1
C470
2
1 2
10P_0402_50V8K
3VDDCCL<13>
R249
75_0402_5%
1 1
M_SEN#<37,38>
CRT_R<13>
CRT_G<13>
CRT_B<13>
+5VS
C475
1 2
0.1U_0402_16V4Z
CRT_HSYNC<13>
2 2
CRT_VSYNC<13>
CRT_HSYNC
CRT_VSYNC
1
5
U18
P
OE#
A2Y
G
74AHCT1G125GW_SOT353-5
3
1
5
U20
P
OE#
A2Y
G
74AHCT1G125GW_SOT353-5
3
M_SEN# CRT_R
CRT_G
CRT_B
R250
75_0402_5%
4
4
R245 20_0402_5%
1 2
1 2
R244 20_0402_5%
3VDDCDA
3VDDCCL
10P_0402_50V8K
1
C469
2
1 2
L18
1 2
FBM-L11-160808-800LMT_0603
L17
1 2
FBM-L11-160808-800LMT_0603
R248
75_0402_5%
1
2
1 2
L22 FCM2012C-800_0805
1 2
L21 FCM2012C-800_0805
1 2
L20 FCM2012C-800_0805
1 2
C468 10P_0402_50V8K
1
C457 22P_0402_25V8K
2
1
C456
2
22P_0402_25V8K
CRTL_R
CRTL_G
CRTL_B
1
C455
2
22P_0402_25V8K
RB411D_SOT23
CRT_HSYNCRFL
CRT_VSYNCRFL
10P_0402_50V8K
C454
1
2
10P_0402_50V8K
F1
1.1A_6VDC_FUSE C8
0.1U_0402_16V4Z
R14
4.7K_0402_5%
4.7K_0402_5%
220P_0402_25V8K
1
C450
2
1
C453
C7
2
220P_0402_25V8K
21
1
2
R4
1
2
220P_0402_25V8K
+CRTVDD
W=40mils
JP19
6
11
1 7
12
2 8
13
3
+CRTVDD
9
14
4 10 15
5
SUYIN_7849S-15G2T-HC
Q6
D
S
1 3
2N7002_SOT23
G
2
C6
1
2
D
1 3
2
Q7 2N7002_SOT23
G
4.7K_0402_5%
3VDDCDA
S
R21
3VDDCCL
R20
4.7K_0402_5%
+3VS
3 3
TV-Out Connector
C476
330P_0402_50V7K
S-Video
JP21
1 2 3 4 5 6 7
SUYIN_33007SR-07T1-C
D
Title
CRT & TVout Connector
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
LA-2421
Wednesday, January 05, 2005
18 56
E
of
1
2
LUMA_CL
CRMA_CL
COMPS_CL
C471
330P_0402_50V7K
1
2
C466
1
2
330P_0402_50V7K
L24
TV_LUMA<13,41>
TV_CRMA<13,41>
TV_COMPS<13,41>
4 4
A
12
R251
75_0402_1%
B
12
R246
75_0402_1%
12
R261
75_0402_1%
C473
1
1
C465
2
270P_0402_50V7K
C479
2
270P_0402_50V7K
270P_0402_50V7K
1 2
FLM1608081R8K_0603
L19
1 2
FLM1608081R8K_0603
L23
1 2
FLM1608081R8K_0603
1
2
R37
1 2
0_0805_5%
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
TVGND
Page 19
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH#
2 1
U47
3
IN
2
GND SHDN1SET
R479
1
C646 18P_0402_50V8J
2
5
SB_TX2P SB_TX2N SB_TX3P SB_TX3N
PJP13
2MM
4
OUT
5
G913C_SOT23-5@
Y6
14 23
32.768KHZ_12.5P
1 2
20M_0603_5%
5
SB_RX0P<12> SB_RX0N<12> SB_RX1P<12> SB_RX1N<12>
+1.9VS
SB_32KH0SB_32KHI
L29
FBM-L11-321611-260-LMT_1206
C246 1U_0603_10V4Z
1 2
C613 10U_0805_10V4Z
1 2
C257 0.1U_0402_16V4Z
1 2
R1139
10K_0402_1%
@
R1140
19.1K_0402_1%
@
1
C655 18P_0402_50V8J
2
SBSRCCLK<16>
SB_RX0P SB_RX0N SB_RX1P SB_RX1N
12
C627 22U_1206_10V4Z C250 0.1U_0402_16V4Z
C255 0.1U_0402_16V4Z C259 0.1U_0402_16V4Z C260 0.1U_0402_16V4Z C272 0.1U_0402_16V4Z C263 0.1U_0402_16V4Z C248 0.1U_0402_16V4Z C264 0.1U_0402_16V4Z
SBSRCCLK#<16>
C621 0.1U_0402_16V4Z
1 2
C619 0.1U_0402_16V4Z
1 2
C628 0.1U_0402_16V4Z
1 2
C625 0.1U_0402_16V4Z
1 2
SB_TX0P<12> SB_TX0N<12> SB_TX1P<12> SB_TX1N<12>
PCIE_VDDR
PCIE_PVDD
+1.9VS
ALLOW_LDTSTOP<13>
L28
FBM-L11-321611-260-LMT_1206
1 2 1 2
1 2 1 2 1 2 1 2 1 2 1 2 1 2
PCI_PIRQE#<24,27> PCI_PIRQF#<24,29> PCI_PIRQG#<24,28> PCI_PIRQH#<24>
LDTSTOP#<6,13>
H_PWRGD<6>
BMREQ#<13>
H_RST#<6>
+3VS
RP60
1 8 2 7 3 6 4 5
8.2K_0804_8P4R_5%
RP59
1 8 2 7 3 6
D D
4 5
8.2K_0804_8P4R_5%
RP2
PCI_REQ#0
1 8
PCI_REQ#1
2 7
PCI_REQ#2
3 6
PCI_REQ#3
4 5
8.2K_0804_8P4R_5%
RP61
PCI_GNT#0
1 8
PCI_GNT#1
2 7
PCI_GNT#2
3 6
PCI_GNT#3
4 5
8.2K_0804_8P4R_5%
RP4
PCI_FRAME#
1 8
PCI_IRDY#
2 7
PCI_TRDY#
3 6
PCI_STOP#
4 5
8.2K_0804_8P4R_5%
RP3
PCI_SERR#
1 8
PCI_PAR
2 7
PCI_DEVSEL#
3 6
C C
R453 49.9_0402_1% R450 49.9_0402_1% R454 49.9_0402_1% R451 49.9_0402_1%
B B
+3VS +1.9VS
A A
4 5
8.2K_0804_8P4R_5%
RP1
1 8 2 7 3 6 4 5
8.2K_0804_8P4R_5%
R110
1 2
8.2K_0402_5%
R111
1 2
8.2K_0402_5%
1 2 1 2 1 2 1 2
+1.8VS
R478 20M_0603_5%
1 2
LOCK#
PCI_REQ#4 PCI_GNT#4 PCI_REQ#5 PCI_GNT#5
PCI_REQ#6 PCI_GNT#6
4
R115 8.2K_0402_5%
1 2
A_RST#
SB_RX0P_C SB_RX0N_C SB_RX1P_C SB_RX1N_C
SB_TX0P SB_TX0N SB_TX1P SB_TX1N
SB_TX2P SB_TX2N SB_TX3P SB_TX3N
150_0402_1% R171 R164
150_0402_1%
R176 4.12K_0402_1%
12
PCIE_VDDR
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH#
SB_32KHI
SB_32KH0
ALLOW_LDTSTOP
H_RST#
4
AH8
L27
M27 M30
N30 K30
L30
H30
J30 F30 G30
M29 N29 M28 N28
J29 K29
J28 K28
G27
12
H27
12
G28
12
R30 F26
R29 G26 P26 K26
L26 P28 N26 P27
H28 F29 H29 H26 F27 G29
L29
J26
L28
J27 N27 M26 K27 P29 P30
AJ8 AK7 AG5 AH5
AJ5 AH6
AJ6 AK6 AG7 AH7
B2
B1
C29 A28 C28 B29 D29
E4 B30 F28 E28 E29 D25 E27 D27 D28
U38A
A_RST# PCIE_RCLKP
PCIE_RCLKN PCIE_TX0P
PCIE_TX0N PCIE_TX1P PCIE_TX1N PCIE_TX2P PCIE_TX2N PCIE_TX3P PCIE_TX3N
PCIE_RX0P PCIE_RX0N PCIE_RX1P PCIE_RX1N PCIE_RX2P PCIE_RX2N PCIE_RX3P PCIE_RX3N
PCIE_CALRP PCIE_CALRN
PCIE_CALI PCIE_PVDD PCIE_VDDR_1
PCIE_VDDR_2 PCIE_VDDR_3 PCIE_VDDR_4 PCIE_VDDR_5 PCIE_VDDR_6 PCIE_VDDR_7 PCIE_VDDR_8 PCIE_VDDR_9
PCIE_VSS_1 PCIE_VSS_2 PCIE_VSS_3 PCIE_VSS_4 PCIE_VSS_5 PCIE_VSS_6 PCIE_VSS_7 PCIE_VSS_8 PCIE_VSS_9 PCIE_VSS_10 PCIE_VSS_11 PCIE_VSS_12 PCIE_VSS_13 PCIE_VSS_14 PCIE_VSS_15
CPU_STP#/DPSLP# PCI_STP# INTA# INTB# INTC# INTD# INTE#/GPIO33 INTF#/GPIO34 INTG#/GPIO35 INTH#/GPIO36
X1
X2
CPU_PG/LDT_PG INTR/LINT0 NMI/LINT1 INIT# SMI# SLP#/LDT_STP# IGNNE# A20M# FERR# STPCLK#/ALLOW_LDTSTP LDT_PG/SSMUXSEL/GPIO0 DPRSLPVR BMREQ# LDT_RST#
CHS-215SB400-02_BGA564
PCI EXPRESS INTERFACE
PCI_AD[0..31]<23,24,27,28,29>
SB400
PCI CLKS
PCI INTERFACE
REQ4#/PLL_BP33/PDMA_REQ1#
GNT3#/PLL_BP66/PDMA_GNT0# GNT4#/PLL_BP50/PDMA_GNT1#
XTAL
LPC
CPU
RTC_IRQ#/ACPWR_STRAP
RTC
3
PCI_AD[0..31]
PCICLK0_R
L4
PCICLK0
L3
PCICLK1
L2
PCICLK2
L1
PCICLK3
M4
PCICLK4
M3
PCICLK5
M2
PCICLK6
M1
PCICLK7
N4
PCICLK8
N3
PCICLK9
N2
PCICLK_FB
AJ7
PCIRST#
AD8/ROMA9 AD9/ROMA8
AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
CBE3#
FRAME#
IRDY#
STOP# PERR# SERR# REQ0# REQ1# REQ2#
GNT0# GNT1# GNT2#
CLKRUN#
LOCK#
LAD0 LAD1 LAD2 LAD3
LFRAME#
LDRQ0# LDRQ1#
SERIRQ
RTCCLK
VBAT
RTC_GND
3
W3 Y2 W4 Y3 V1 Y4 V2 W2 AA4 V4 AA3 U1 AA2 U2 AA1 U3 T4 AC1 R2 AD4 R3 AD3 R4 AD2 P2 AE3 P3 AE2 P4 AF2 N1 AF1 V3 AB4 AC2 AE4 T3 AC4 AC3 T2 U4 T1 AB2 AB3 AF4 AF3 AG2 AG3 AH1 AH2 AH3 AJ2 AK2 AJ3 AK3 AG4 AH4 AJ4 AG1 AB1
AG25 AH25 AJ25 AH24 AG24 AH26 AG26
AK27
C2 F3
A2 A1
0.1U_0402_16V4Z
AD0/ROMA18 AD1/ROMA17 AD2/ROMA16 AD3/ROMA15 AD4/ROMA14 AD5/ROMA13 AD6/ROMA12 AD7/ROMA11
AD10/ROMA7 AD11/ROMA6 AD12/ROMA5 AD13/ROMA4 AD14/ROMA3
AD15/ROMA2 AD16/ROMD0 AD17/ROMD1 AD18/ROMD2 AD19/ROMD3 AD20/ROMD4 AD21/ROMD5 AD22/ROMD6 AD23/ROMD7
CBE0#/ROMA10
CBE1#/ROMA1
CBE2#/ROMWE#
DEVSEL#/ROMA0
TRDY#/ROMOE#
PAR/ROMA19
REQ3#/PDMA_REQ0#
REQ5#/GPIO13 REQ6#/GPIO31
GNT5#/GPIO14 GNT6#/GPIO32
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
R448 33_0402_5%
PCICLK1_R
R155 33_0402_5%
PCICLK2_R
R162 33_0402_5%
PCICLK3_R
R444 33_0402_5%
PCICLK4_R
R441 33_0402_5%
PCICLK9_R
R145 22_0402_5%
PCICLKFB
PCIRST# PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_PERR#
PCI_REQ#5 PCI_REQ#6
PCI_GNT#5 PCI_GNT#6 PCI_CLKRUN# LOCK#
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# LDRQ0# LDRQ1#
SIRQ
RTC_CLK
C265
1 2 1 2 1 2 1 2 1 2
1 2
A_RST#
+RTCVCC
2
C309 1U_0603_10V4Z
1
+3VALW
12
R100
8.2K_0402_5%
4
U33B
OE#
I5O
SN74LVC125APWLE_TSSOP14
PCI_CBE#0 <24,27,28,29> PCI_CBE#1 <24,27,28,29> PCI_CBE#2 <24,27,28,29> PCI_CBE#3 <24,27,28,29> PCI_FRAME# <24,27,28,29> PCI_DEVSEL# <24,27,28,29> PCI_IRDY# <24,27,28,29> PCI_TRDY# <24,27,28,29> PCI_PAR <24,27,28,29> PCI_STOP# <24,27,28,29> PCI_PERR# <24,27,28,29> PCI_SERR# <24,27,28,29> PCI_REQ#0 <27> PCI_REQ#1 <28> PCI_REQ#2 <24> PCI_REQ#3 <29> PCI_REQ#4 <29>
PCI_GNT#0 <27> PCI_GNT#1 <28> PCI_GNT#2 <24> PCI_GNT#3 <29> PCI_GNT#4 <29>
LPC_AD0 <36,37,38> LPC_AD1 <36,37,38> LPC_AD2 <36,37,38> LPC_AD3 <36,37,38> LPC_FRAME# <36,37,38> LDRQ0# <36>
SIRQ <24,36,37,38>
RTC_CLK <23>
AUTO_ON# <23>
close any door
14
7
2
C245 0.1U_0402_16V4Z@
1 2
C184 0.1U_0402_16V4Z
1 2
1
U33A
P I2O
G
6
R96 33_0402_5%
3
OE#
SN74LVC125APWLE_TSSOP14
R95
1 2
33_0402_5%
W=20mils
J3
JOPEN
1 2
2
CLK_PCI_PCM <24> CLK_PCI_1394 <27> CLK_PCI_LAN <23,28> CLK_PCI_MINI <23,29> CLK_PCI_EC <23,37,38> CLK_PCI_SIO_R <23,36> CLK_PCI6 <23> CLK_PCI7 <23> CLK_PCI8 <23>
1 2
+RTCVCC
R170 1K_0402_5%
1 2
NB_RST# <13,26,34>
1K_0402_5%@
1
+3VS
R389
PCI_GNT#5 PCI_REQ#5
PCI_RST#
12
PCI_RST# <24,25,27,28,29,36,37,38>
SIRQ PCI_PERR#
PCI_CLKRUN#
LDRQ0# LDRQ1#
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
C584
12
0.1U_0402_16V4Z@
U32
8
VCC
7
WP
6
SCL
5
SDA
AT24C04N-10SI-2.7_SO8~D@
R124 10K_0402_5%
1 2
R134 8.2K_0402_5%
1 2
R128 10K_0402_5%
1 2
R123 10K_0402_5%
1 2
R108 10K_0402_5%
1 2
R107 100K_0402_5%
1 2
R121 100K_0402_5%
1 2
R122 100K_0402_5%
1 2
R120 100K_0402_5%
1 2
1
NC
2
A1
3
A2
4
VSS
BATT1
CR2025 RTC BATTERY
JP37
BATT1.1
+-
1
+
W=20mils
SUYIN_060003FA002TX00NL~D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
MuTIOL/CPU/PM/RTC
LA-2421
1
+3VS
2
-
of
19 56Wednesday, January 05, 2005
Page 20
5
4
3
2
1
+3VALW
R189 10K_0402_5%
1 2
R484 4.7K_0402_5%
1 2
R188 4.7K_0402_5%
D D
+3VS
C C
+3VALW
B B
14.31818MHz_20P_1BX14318BE1A@
1 2
R195 4.7K_0402_5%
1 2
R194 4.7K_0402_5%
1 2
R191 10K_0402_5%
1 2
R196 10K_0402_5%
1 2
R1128 10K_0402_5%
1 2
R1133 10K_0402_5%
1 2
R482 2.2K_0402_5%
1 2
R489 2.2K_0402_5%
1 2
R483 10K_0402_5%
1 2
R198 10K_0402_5%
1 2
R197 10K_0402_5%
1 2
R181 10K_0402_5%
1 2
R458 10K_0402_5%
1 2
R180 10K_0402_5%
1 2
R185 10K_0402_5%
1 2
R184 8.2K_0402_5%
1 2
R203 10K_0402_5%
1 2
C657 20P_0402_50V8J@
1 2
C651 20P_0402_50V8J@
1 2
Y5
HYNIX 128MB
SAMSUMG 128MB
A A
No VRAM
Reserved
5
NC_CP# SLP_S3# SLP_S5# PCIE_PME# EC_FLASH# SYS_RESET# BT_ON#
S3_STATE
SB_SCLK SB_SDAT LPC_SMI# AGP_STP#
AGP_BUSY#
AC97_RST#
AC97_BITCLK AC97_SDIN0 AC97_SDIN1 AC97_SDIN2
GPIO7
SB_OSC_INT
12
R494
@
1M_0402_5%
1 2
14M_X2
GPIO11GPIO12
0
1
1
1
00
10
USBCLK_EXT
U38B
48M_X2
AVDDTX_0 AVDDTX_1 AVDDTX_2 AVDDTX_3
AVDDC
AVSSC
2
A15
USBCLK_X2
B15
R182 11.8K_0603_1%
C15 D16 C16 D15 B8 C8 C7 B7 B6 A6 B5 A5
A11 B11
A10 B10
A14 B14
A13 B13
A18 B18
A17 B17
A21 B21
A20 B20
C21 C18 D13 D10 D20 D17 C14 C11
A16 B16 A9
A12 A19 A22 B9 B12 B19 B22 C9 C10 C12 C13 C17 C19 C20 C22 D9 D11 D12 D14 D18 D19 D21 D22
1 2
USB_VREFOUT
OVCUR#0
BT_DET#BT_DET#
OVCUR#2
OVCUR#4 EC_SCI# BT_ON# EC_SMI#
AVDDTX
AVDDRX
AVDDC
CLK / RST
SB400
ACPI/WAKE UP EVENTS
USB_OC6#/FAN_ALERT#/GEVENT6#
USB_OC7#/CASE_ALERT#/GEVENT7#
GPIOAC97 (NOT USED)
EC_THERM#<37,38>
EC_FLASH#<39> EC_SWI#<37,38> NC_CP#<26>
SLP_S3#<37,38> SLP_S5#<37,38>
PWRBTN_OUT#<37,38>
SB_PWRGD<40>
EC_GA20<37,38> KB_RST#<37,38>
H_THERMTRIP#<6>
WL_ON<29>
PCIE_PME#<26> EC_RSMRST#<37,38> SB_OSC_INT<13,16>
SB_SPKR<30> SB_SCLK<8,9,16,26> SB_SDAT<8,9,16,26>
AC97_BITCLK<30>
AC97_SDOUT<23,30>
AC97_SDIN0<30>
AC97_SYNC<30> AC97_RST#<30>
SB_SPDIFO<23,41>
4
+3VS
NC_CP# SLP_S3# SLP_S5# PWRBTN_OUT#
SB_SUSSTAT#
R463 10K_0402_5%
1 2
R467 10K_0402_5%
1 2
WL_ON
2 1
LPC_SMI# S3_STATE SYS_RESET# PCIE_PME#
D35 RB751V_SOD323
14M_X2
R492 10K_0402_5%
1 2
R202 10K_0402_5%
1 2
GPIO7 AGP_STP# AGP_BUSY#
R481 10K_0402_5%
1 2
SB_SCLK SB_SDAT
R491 10K_0402_5%
1 2
R200 10K_0402_5%
1 2
R204 10K_0402_5%@
1 2
R199 10K_0402_5%
1 2
R1071 10K_0402_5%
1 2
R1072 10K_0402_5% @
1 2
R459 33_0402_5%
1 2
AC97_SDIN0 AC97_SDIN1 AC97_SDIN2
R177 33_0402_5%
1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C6
TALERT#/TEMP_ALERT#/GPIO10
D5
BLINK/GPM6#
C4
PCI_PME#/GEVENT4#
D3
RI#/EXTEVNT0#
B4
SLP_S3#
E3
SLP_S5#
B3
PWR_BTN#
C3
PWR_GOOD
D4
SUS_STAT#
F2
TEST1
E2
TEST0
AJ26
GA20IN
AJ27
KBRST#
D6
SMBALERT#/THRMTRIP#/GEVENT2#
C5
LPC_PME#/GEVENT3#
A25
LPC_SMI#/EXTEVNT1#
D8
VOLT_ALERT#/S3_STATE/GEVENT5#
D7
SYS_RESET#/GPM7#
D2
WAKE#/GEVENT8#
D1
RSMRST#
A23
14M_X1/OSC
B23
14M_X2
AK24
SIO_CLK
B25
ROM_CS#/GPIO1
C25
GHI#/GPIO6
C23
VGATE/GPIO7
D24
AGP_STP#/GPIO4
D23
AGP_BUSY#/GPIO5
A27
FANOUT0/GPIO3
C24
SPKR/GPIO2
A26
SCL0/GPOC0#
B26
SDA0/GPOC1#
B27
DDC1_SCL/GPIO9
C26
DDC1_SDA/GPIO8
C27
DDC2_SCL/GPIO11
D26
DDC2_SDA/GPIO12
J2
NC1
K3
NC4
J3
NC3
K2
NC2
G1
AC_BITCLK
G2
AC_SDOUT
H4
AC_SDIN0
G3
AC_SDIN1
G4
AC_SDIN2
H1
AC_SYNC
H3
AC_RST#
H2
SPDIF_OUT
CHS-215SB400-02_BGA564
3
48M_X1/USBCLK
USB_RCOMP
USB_VREFOUT
USB_ATEST1
USB_ATEST0 USB_OC0#/GPM0# USB_OC1#/GPM1#
USB_OC2#/FANOUT1/GPM2#
USB_OC3#/GPM3# USB_OC4#/GPM4# USB_OC5#/GPM5#
USB_HSDP7+ USB_HSDM7-
USB_HSDP6+ USB_HSDM6-
USB_HSDP5+ USB_HSDM5-
AVSS_USB_10 AVSS_USB_11
USB PWR
AVSS_USB_12 AVSS_USB_13 AVSS_USB_14 AVSS_USB_15 AVSS_USB_16 AVSS_USB_17 AVSS_USB_18 AVSS_USB_19 AVSS_USB_20 AVSS_USB_21 AVSS_USB_22 AVSS_USB_23 AVSS_USB_24
USB_HSDP4+ USB_HSDM4-
USB_HSDP3+ USB_HSDM3-
USB_HSDP2+ USB_HSDM2-
USB_HSDP1+ USB_HSDM1-
USB_HSDP0+ USB_HSDM0-
AVDDRX_0 AVDDRX_1 AVDDRX_2 AVDDRX_3
AVSS_USB_1 AVSS_USB_2 AVSS_USB_3 AVSS_USB_4 AVSS_USB_5 AVSS_USB_6 AVSS_USB_7 AVSS_USB_8 AVSS_USB_9
USB INTERFACE
R477
@
1M_0402_5%
1 2
OVCUR#0 <33> BT_DET# <33> OVCUR#2 <33>
LID_OUT# <37,38>
OVCUR#4 <33> EC_SCI# <37,38>
BT_ON# <33>
EC_SMI# <37,38>
USBP7+ <33>
USBP7- <33>
USBP6+ <33>
USBP6- <33>
USBP5+ <26>
USBP5- <26>
USBP4+ <33>
USBP4- <33>
USBP3+ <33>
USBP3- <33> USBP2+ <33>
USBP2- <33>
USBP1+ <41> USBP1- <41>
USBP0+ <33>
USBP0- <33>
AVDDTX
AVDDRX
AVDDC
Title
Size Document Number Rev
LA-2421
Date: Sheet of
C654
Y4
48MHZ_12PF_7A48000047@
1 2
C310
L32 FBM-L11-321611-260-LMT_1206
C644 10U_0805_10V4Z
1 2
C312 1U_0603_10V4Z
1 2
C299 0.1U_0402_16V4Z
1 2
C301 0.1U_0402_16V4Z
1 2
C304 0.1U_0402_16V4Z
1 2
L33 FBM-L11-321611-260-LMT_1206
C647 10U_0805_10V4Z
1 2
C314 1U_0603_10V4Z
1 2
C300 0.1U_0402_16V4Z
1 2
C302 0.1U_0402_16V4Z
1 2
C303 0.1U_0402_16V4Z
1 2
L30 FBM-L11-321611-260-LMT_1206
C649 10U_0805_10V4Z
1 2
C317 1U_0603_10V4Z
1 2
C308 0.1U_0402_16V4Z
1 2
Compal Electronics, Inc.
USB/LPC/ AC97/MAC
USBCLK_EXT <16>
1 2
20P_0402_50V8J
@
1 2
20P_0402_50V8J
@
If Y4 is not populated, C654 and C310 change to 10K_0402_5%.
12
12
12
1
+3VALW
+3VALW
+3VALW
20 56Wednesday, January 05, 2005
0.6
Page 21
5
4
3
2
1
PD_D[0..15]<34> SD_D[0..15]<34>
D D
C C
B B
U38C
AK22
SATA_TX0+
AJ22
SATA_TX0-
AK21
SATA_RX0-
AJ21
SATA_RX0+
AK19
SATA_TX1+
AJ19
SATA_TX1-
AK18
SATA_RX1-
AJ18
SATA_RX1+
AK14
SATA_TX2+
AJ14
SATA_TX2-
AK13
SATA_RX2-
AJ13
SATA_RX2+
AK11
SATA_TX3+
AJ11
SATA_TX3-
AK10
SATA_RX3-
AJ10
SATA_RX3+
AJ15
SATA_CAL
AJ16
SATA_X1
AK16
SATA_X2
AK8
SATA_ACT#
AH15
PLLVDD_SATA
AH16
XTLVDD_SATA
AG10
AVDD_SATA_1
AG14
AVDD_SATA_2
AH12
AVDD_SATA_3
AG12
AVDD_SATA_4
AG18
AVDD_SATA_5
AG21
AVDD_SATA_6
AH18
AVDD_SATA_7
AG20
AVDD_SATA_8
AG9
AVSS_SATA_1
AF10
AVSS_SATA_2
AF11
AVSS_SATA_3
AF12
AVSS_SATA_4
AF13
AVSS_SATA_5
AF14
AVSS_SATA_6
AF15
AVSS_SATA_7
AF16
AVSS_SATA_8
AF17
AVSS_SATA_9
AF18
AVSS_SATA_10
AF19
AVSS_SATA_11
AF20
AVSS_SATA_12
AF21
AVSS_SATA_13
AF22
AVSS_SATA_14
AH9
AVSS_SATA_15
AG11
AVSS_SATA_16
AG15
AVSS_SATA_17
AG17
AVSS_SATA_18
AG19
AVSS_SATA_19
AG22
AVSS_SATA_20
AG23
AVSS_SATA_21
AF9
AVSS_SATA_22
AH17
AVSS_SATA_23
AH23
AVSS_SATA_24
AH13
AVSS_SATA_25
AH20
AVSS_SATA_26
AK9
AVSS_SATA_27
AJ12
AVSS_SATA_28
AK17
AVSS_SATA_29
AK23
AVSS_SATA_30
AH10
AVSS_SATA_31
AJ23
AVSS_SATA_32
CHS-215SB400-02_BGA564
SB400
SERIAL ATA
SERIAL ATA POWER
PIDE_IORDY
PIDE_DACK#
PRIMARY ATA 66/100
SIDE_IORDY
SIDE_DACK#
SIDE_D0/GPIO15 SIDE_D1/GPIO16 SIDE_D2/GPIO17 SIDE_D3/GPIO18 SIDE_D4/GPIO19 SIDE_D5/GPIO20 SIDE_D6/GPIO21 SIDE_D7/GPIO22 SIDE_D8/GPIO23
SIDE_D9/GPIO24 SIDE_D10/GPIO25 SIDE_D11/GPIO26 SIDE_D12/GPIO27
SECONDARY ATA 66/100
SIDE_D13/GPIO28 SIDE_D14/GPIO29 SIDE_D15/GPIO30
AVSS_SATA_33 AVSS_SATA_34 AVSS_SATA_35 AVSS_SATA_36 AVSS_SATA_37 AVSS_SATA_38 AVSS_SATA_39 AVSS_SATA_40 AVSS_SATA_41 AVSS_SATA_42 AVSS_SATA_43 AVSS_SATA_44 AVSS_SATA_45
PIDE_IRQ
PIDE_A0 PIDE_A1 PIDE_A2
PIDE_DRQ
PIDE_IOR# PIDE_IOW# PIDE_CS1# PIDE_CS3#
PIDE_D0 PIDE_D1 PIDE_D2 PIDE_D3 PIDE_D4 PIDE_D5 PIDE_D6 PIDE_D7 PIDE_D8
PIDE_D9 PIDE_D10 PIDE_D11 PIDE_D12 PIDE_D13 PIDE_D14 PIDE_D15
SIDE_IRQ
SIDE_A0
SIDE_A1
SIDE_A2
SIDE_DRQ
SIDE_IOR# SIDE_IOW# SIDE_CS1# SIDE_CS3#
AD30 AE28 AD27 AC27 AD28 AD29 AE27 AE30 AE29 AC28 AC29
AF29 AF27 AG29 AH30 AH28 AK29 AK28 AH27 AG27 AJ28 AJ29 AH29 AG28 AG30 AF30 AF28
V29 T27 T28 U29 T29 V30 U28 W29 W30 R27 R28
V28 W28 Y30 AA30 Y28 AA28 AB28 AB27 AB29 AA27 Y27 AA29 W27 Y29 V27 U27
AG13 AH22 AK12 AH11 AJ17 AH14 AH19 AJ20 AH21 AJ9 AG16 AK15 AK20
PD_IORDY PD_IRQA PD_A0 PD_A1 PD_A2 PD_DACK# PD_DREQ# PD_IOR# PD_IOW# PD_CS#1 PD_CS#3
PD_D0 PD_D1 PD_D2 PD_D3 PD_D4 PD_D5 PD_D6 PD_D7 PD_D8 PD_D9 PD_D10 PD_D11 PD_D12 PD_D13 PD_D14 PD_D15
SD_IORDY SD_IRQA SD_SBA0 SD_SBA1 SD_SBA2 SD_DACK# SD_DREQ# SD_SIOR# SD_SIOW# SD_SCS1# SD_SCS3#
SD_D0 SD_D1 SD_D2 SD_D3 SD_D4 SD_D5 SD_D6 SD_D7 SD_D8 SD_D9 SD_D10 SD_D11 SD_D12 SD_D13 SD_D14 SD_D15
PD_D[0..15] SD_D[0..15]
PD_IORDY <34>
PD_IRQA <34>
PD_A0 <34> PD_A1 <34> PD_A2 <34> PD_DACK# <23,34>
PD_DREQ# <34>
PD_IOR# <34> PD_IOW # <34> PD_CS#1 <34> PD_CS#3 <34>
SD_IORDY <34>
SD_IRQA <34>
SD_SBA0 <34> SD_SBA1 <34> SD_SBA2 <34> SD_DACK# <34>
SD_DREQ# <34>
SD_SIOR# <34> SD_SIOW# <34> SD_SCS1# <34> SD_SCS3# <34>
A A
Compal Electronics, Inc.
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
IDE/SATA
Size Document Number Rev
Custom
LA-2421
Date: Sheet
1
of
21 56Wednesday, January 05, 2005
Page 22
For EMI require
+3VS
1000P_0402_50V7K
1
1
2
1000P_0402_50V7K
C1217
C1218
2
1000P_0402_50V7K
+5VS
+3VS
1000P_0402_50V7K
1
1
2
C1220
C1219
2
R105 1K_0402_5%
1 2
D14
2 1
RB751V_SOD323
C198
1U_0603_10V4Z
C590 22U_1206_10V4Z
1 2
C217 0.1U_0402_16V4Z
1 2
C221 0.1U_0402_16V4Z
1 2
C223 0.1U_0402_16V4Z
1 2
C226 0.1U_0402_16V4Z
1 2
C230 0.1U_0402_16V4Z
1 2
C233 0.1U_0402_16V4Z
1 2
C290 0.1U_0402_16V4Z
1 2
C271 0.1U_0402_16V4Z
1 2
C276 0.1U_0402_16V4Z
1 2
C210 0.1U_0402_16V4Z
1 2
C220 0.1U_0402_16V4Z
1 2
C222 0.1U_0402_16V4Z
1 2
C225 0.1U_0402_16V4Z
1 2
C227 0.1U_0402_16V4Z
1 2
C231 0.1U_0402_16V4Z
1 2
C238 0.1U_0402_16V4Z
1 2
C289 0.1U_0402_16V4Z
1 2
C591 22U_1206_10V4Z
1 2
C620 22U_1206_10V4Z
1 2
C212 0.1U_0402_16V4Z
1 2
C204 0.1U_0402_16V4Z
1 2
C213 0.1U_0402_16V4Z
1 2
C205 0.1U_0402_16V4Z
1 2
C214 0.1U_0402_16V4Z
1 2
C206 0.1U_0402_16V4Z
1 2
C216 0.1U_0402_16V4Z
1 2
C215 0.1U_0402_16V4Z
1 2
C228 0.1U_0402_16V4Z
1 2
C261 0.1U_0402_16V4Z
1 2
C229 0.1U_0402_16V4Z
1 2
C262 0.1U_0402_16V4Z
1 2
C652 22U_1206_10V4Z
1 2
C287 0.1U_0402_16V4Z
1 2
C288 0.1U_0402_16V4Z
1 2
C286 0.1U_0402_16V4Z
1 2
C305 0.1U_0402_16V4Z
1 2
C306 0.1U_0402_16V4Z
1 2
C636 10U_0805_10V4Z
1 2
C278 0.1U_0402_16V4Z
1 2
C279 0.1U_0402_16V4Z
1 2
C280 0.1U_0402_16V4Z
1 2
C281 0.1U_0402_16V4Z
1 2
C282 0.1U_0402_16V4Z
1 2
C283 0.1U_0402_16V4Z
1 2
C284 0.1U_0402_16V4Z
1 2
2
1
2
C209
0.1U_0402_16V4Z
1
V5_VREF
C656 10U_0805_10V4Z C320 1U_0603_10V4Z C650 0.1U_0402_16V4Z
+1.8VS
+3VALW
+1.8VALW
+1.2V_HT
FBM-L11-321611-260-LMT_1206
1 2 1 2 1 2
+3VS
C632 0.1U_0402_16V4Z
12
AVDD_CK
+1.8VS
12
L31
U38D
A30
VDDQ_1
D30
VDDQ_2
E24
VDDQ_3
E25
VDDQ_4
J5
VDDQ_5
K1
VDDQ_6
K5
VDDQ_7
N5
VDDQ_8
P5
VDDQ_9
R1
VDDQ_10
U5
VDDQ_11
U26
VDDQ_12
U30
VDDQ_13
V5
VDDQ_14
V26
VDDQ_15
Y1
VDDQ_16
Y26
VDDQ_17
AA5
VDDQ_18
AA26
VDDQ_19
AB5
VDDQ_20
AC30
VDDQ_21
AD5
VDDQ_22
AD26
VDDQ_23
AE1
VDDQ_24
AE5
VDDQ_25
AE26
VDDQ_26
AF6
VDDQ_27
AF7
VDDQ_28
AF24
VDDQ_29
AF25
VDDQ_30
AK1
VDDQ_31
AK4
VDDQ_32
AK26
VDDQ_33
AK30
VDDQ_34
M12
VDD_1
M13
VDD_2
M18
VDD_3
M19
VDD_4
N12
VDD_5
N13
VDD_6
N18
VDD_7
N19
VDD_8
V12
VDD_9
V13
VDD_10
V18
VDD_11
V19
VDD_12
W12
VDD_13
W13
VDD_14
W18
VDD_15
W19
VDD_16
A3
S5_3.3V_1
A7
S5_3.3V_2
E6
S5_3.3V_3
E7
S5_3.3V_4
E1
S5_3.3V_5
F5
S5_3.3V_6
E9
S5_1.8V_1
E10
S5_1.8V_2
E20
S5_1.8V_3
E21
S5_1.8V_4
E13
USB_PHY_1.8V_1
E14
USB_PHY_1.8V_2
E16
USB_PHY_1.8V_3
E17
USB_PHY_1.8V_4
C30
CPU_PWR
AG6
V5_VREF
A24
AVDDCK
B24
AVSSCK
A4
VSS_1
A8
VSS_2
A29
VSS_3
B28
VSS_4
C1
VSS_5
E5
VSS_6
E8
VSS_7
E11
VSS_8
E12
VSS_9
E15
VSS_10
E18
VSS_11
CHS-215SB400-02_BGA564
SB400
POWER
VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98
E19 E22 E23 E26 E30 F1 F4 G5 H5 J1 J4 K4 L5 M5 P1 R5 R26 T5 T26 T30 W1 W5 W26 Y5 AB26 AB30 AC5 AC26 AD1 AF5 AF8 AF23 AF26 AG8 AJ1 AJ24 AJ30 AK5 AK25 M14 M15 M16 M17 N14 N15 N16 N17 P12 P13 P14 P15 P16 P17 P18 P19 R12 R13 R14 R15 R16 R17 R18 R19 T12 T13 T14 T15 T16 T17 T18 T19 U12 U13 U14 U15 U16 U17 U18 U19 V14 V15 V16 V17 W14 W15 W16 W17
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Power/GND
LA-2421
of
22 56Wednesday, January 05, 2005
0.6
Page 23
5
+3VALW +3VS +3VALW +3VS +3VS +3VS +3VS +3VS +3VS +3VS
12
R187 10K_0402_5%
AUTO_ON#<19>
AC97_SDOUT<20,30>
RTC_CLK<19>
D D
SB_SPDIFO<20,41>
CLK_PCI_MINI<19,29>
CLK_PCI_EC<19,37,38>
CLK_PCI_SIO_R<19,36>
CLK_PCI6<19> CLK_PCI7<19> CLK_PCI8<19>
CLK_PCI_LAN<19,28>
12
R468 0_0402_5%@
REQUIRED STRAPS
4
12
12
R460 10K_0402_5%@
R464 10K_0402_5%
12
R474 10K_0402_5%
12
12
R456 10K_0402_5%@
R455 10K_0402_5%
12
R449 10K_0402_5%
12
R445 10K_0402_5%@
12
R153 10K_0402_5%
12
R160 10K_0402_5%@
3
12
R154 10K_0402_5%
12
R161 10K_0402_5%@
12
R438 10K_0402_5%
12
R435 10K_0402_5%@
12
R427 10K_0402_5%@
12
R430 10K_0402_5%
12
R428 10K_0402_5%
12
R431 10K_0402_5%@
+3VS
2
12
R1077 10K_0402_5%@
12
R1078 10K_0402_5%@
NB STRAPS
LOAD_ROM#<13>
SPMEM_EN#<13>
1
12
R72
3K_0402_5%ROM@
12
R76 3K_0402_5%
ACPWRON
AUTO_ON#
PULL
C C
HIGH
PULL LOW
MANUAL PWR ON
DEFAULT
AUTO PWR ON
AC97_SDOUT SB_SPDIFO
USE DEBUG STRAPS
IGNORE DEBUG STRAPS
DEFAULT
RTC_CLK
INTERNAL RTC
DEFAULT
EXTERNAL RTC (NOT SUPPORTED W/ IT8712 )
SIO 24MHz
SIO 48MHz
DEFAULT
CLK_PCI_LAN
48MHz XTAL MODE
48MHz OSC MODE
DEFAULT
CLK_PCI_MINI
USB PHY PWRDOWN DISABLE
DEFAULT DEFAULT
USB PHY PWRDOWN
ENABLE
CLK_PCI_EC
INTERNAL 48MHz
DEFAULT
EXTERNAL 48MHz
CLK_PCI_SIO
14MHz OSC MODE
DEFAULT
14MHz XTAL MODE
CLK_PCI6
CPU I/F = K8
CPU I/F = P4
CLK_PCI7
PCI_CLK8
ROM TYPE H,H = PCI ROM
H,L = PMC LPC ROM
L,H = NORMAL LPC ROM
L,L = FWH ROM
DEFAULT
LOAD_ROM# :LO AD R OM S TRA P E NABLE strap
High, LOAD ROM STRAP DISABLE Low, LOAD RO M STRAP ENABLE
SPMEM_EN#:SIDE PORT MEMORY ENABLE strap
High, SIDE PORT MEMORY DISABLE Low, SIDE PORT MEMORY ENABLE
+3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS
12
PD_DACK#<21,34> PCI_AD31<19,24,27,28,29> PCI_AD30<19,24,27,28,29> PCI_AD29<19,24,27,28,29> PCI_AD28<19,24,27,28,29> PCI_AD27<19,24,27,28,29> PCI_AD26<19,24,27,28,29>
B B
PCI_AD25<19,24,27,28,29> PCI_AD24<19,24,27,28,29> PCI_AD23<19,24,27,28,29>
12
R132 10K_0402_5%
R133 1K_0402_5%@
12
R399 10K_0402_5%
12
R398 10K_0402_5%@
12
R426 10K_0402_5%
12
R429 10K_0402_5%@
12
12
R395 10K_0402_5%
R396 10K_0402_5%@
12
R149 10K_0402_5%
12
R146 10K_0402_5%@
12
R401 10K_0402_5%@
12
R405 10K_0402_5%
12
12
R142 10K_0402_5%@
R143 10K_0402_5%
12
12
R413 10K_0402_5%@
R415 10K_0402_5%
12
12
R425 10K_0402_5%@
R424 10K_0402_5%
12
R421 10K_0402_5%
12
R420 10K_0402_5%@
DEBUG STRAPS
PD_DACK#
PULL HIGH
PULL
A A
LOW
USE LONG RESET
DEFAULT
USE SHORT RESET
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27 PCI_AD26
BYPASS PCI PLL
USE PCI PLL
DEFAULT
BYPASS ACPI BCLK
USE ACPI BCLK
DEFAULT
PCI_AD25 PCI_AD24
BYPASS IDE PLL
USE IDE PLL
DEFAULT
USE EEPROM PCIE STRAPS
USE DEFAULT PCIE STRAPS
DEFAULT
PCI_AD23
RESERVEDRESERVED RESERVED RESERVED RESERVED
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Hardware Trap
LA-2421
of
23 56Wednesday, January 05, 2005
1
Page 24
A
B
C
D
E
12
R1119
100K_0402_5%
6411@
IO 1_SM(P6) IO 2_SM(P7) IO 3_SM(P8)
IO 4_SM(P9) IO 5_SM(P13) IO 6_SM(P14) IO 7_SM(P15) IO 8_SM(P16)
CLE_SM(P2)
ALE_SM(P3)
CE_SM(P21)
RE_SM(P20)
WE_SM(P4) WP_SM(P5)
R/B_SM(P19) LVD_SM(P17)
VCC_SM(P12) VCC_SM(P22)
VSS_SM(P1)
VSS_SM(P10)
GND_SM(P18)
WP1_SM WP2_SM
CD1_SM CD2_SM
DAT0_SD(P7) DAT1_SD(P8) DAT2_SD(P9)
CLK_SD(P5)
CMD_SD(P2)
VDD_SD(P4) VSS1_SD(P6) VSS2_SD(P3)
WP_SD
GND_SD
CD_SD
C1089
0.1U_0402_16V4Z
6411@
R1099 22K_0402_5% 6411@ R1100 43K_0402_5%6411@
+VCC_5IN1+3VS
1
C1077 10U_0805_10V4Z
2
6411@
SD_CD#
SM_CD#
MS_D0/SD_D0/SM_D0
60
MS_D1/SD_D1/SM_D1
64
MS_D2/SD_D2/SM_D2
54
MS_D3/SD_D3/SM_D3
49
SD_D0/SM_D4
45
SD_D1/SM_D5
50
SD_D2/SM_D6
52
SD_D3/SM_D7
56
SM_CLE
53
SD_CMD/SM_ALE
59
SD_WP/SM_CE#
51
SD_CLK/SM_RE#
61
MS_BS/SD_CMD/SM_WE#
63
SM_EL_WP#
66
SM_R/B#
65 47
1 2
R1083 0_0402_5%@
62 46
55 57 48 58
41
SM_EL_WP#
42 43 44
MS_D0/SD_D0/SM_D0
23
MS_D1/SD_D1/SM_D1
22
MS_D2/SD_D2/SM_D2
30
MS_D3/SD_D3/SM_D3
29
MS_CLK/SD_CLK/SM_EL_WP#
25
MS_BS/SD_CMD/SM_WE#
28
26 27 24
SD_WP/SM_CE#
19 20
SD_CD#
21
+VCC_5IN1
+VCC_5IN1
1 2
R1082 3.3K_0402_5% 6411@
SM_CD#
C1090
0.1U_0402_16V4Z
6411@
MS_CLK/SD_CLK/SM_EL_WP#
+VCC_5IN1
+VCC_5IN1
Q41 AO3413_SOT236411@
D
S
13
Q44 2N7002_SOT23
6411@
2 1
D38 RB751V_SOD323 6411@
2 1
D39 RB751V_SOD3236411@
SM INTERFACESD INTERFACE
C1088
0.1U_0402_16V4Z
6411@
SM_R/B# SD_WP/SM_CE#
G
2
CD/VSS_SM(P11)
CD/DAT3_SD(P1)
1
C1075
1U_0603_10V4Z6411@
+3VS
1
2
10U_1206_16V4Z
MC_PWR_CTRL#
F1 F2
SD_CD#
E3
MS_CD#
F5
SM_CD#
F6
R1120 33_0402_5%6411@
G5
1 2
R1153 22_0402_5%
F3
1 2
R1154 22_0402_5%
H5
1 2
R1155 22_0402_5%
G3
1 2
R1156 22_0402_5%
G2
1 2
R1157 22_0402_5%
G1
1 2
SD_CLK/SM_RE#
J5
SD_CMD/SM_ALE
J3
SD_D0/SM_D4
H3
SD_D1/SM_D5
J6
SD_D2/SM_D6
J1
SD_D3/SM_D7
J2
SD_WP/SM_CE#
H7
SM_CLE
J7
SM_R/B#
K1
SM_PHYS_WP#
K2
L2 K5
R1121 0_0402_5%6411@
K3 K7
1 2 L1 L3
VCCD#1
L5 P12
W17 T19
CLK_48M
M1
R17
U18 U19 U15 V15 W15 V14 W14 U17 V18 W18 V16 W16 M11 P15 R19 R18 R12 U13 V13
R1086 4.7K_0402_5%6411@
12
12
2
1
MS_CLK/SD_CLK/SM_EL_WP#
+3VS
VCCD#1 <25>
CLK_48M <16>
CLK_48M
R1089 10_0402_5%
C1086 10P_0402_50V8J
MS_BS/SD_CMD/SM_WE# MS_D3/SD_D3/SM_D3 MS_D2/SD_D2/SM_D2 MS_D1/SD_D1/SM_D1 MS_D0/SD_D0/SM_D0
+3VS
SD_CD#
SM_CD#
+VCC_5IN1
+VCC_5IN1
D36
2 1
RB751V_SOD323@ D37
2 1
RB751V_SOD323@
1 2
R1127 0_0402_5%
MS_D1/SD_D1/SM_D1
MS_D2/SD_D2/SM_D2 MS_D3/SD_D3/SM_D3
MS_D0/SD_D0/SM_D0 MS_CLK/SD_CLK/SM_EL_WP# MS_CD# MS_BS/SD_CMD/SM_WE#
MS_D0/SD_D0/SM_D0 MS_D1/SD_D1/SM_D1 MS_D2/SD_D2/SM_D2 MS_D3/SD_D3/SM_D3 SD_D0/SM_D4 SD_D1/SM_D5 SD_D2/SM_D6 SD_D3/SM_D7
SM_R/B# SD_CLK/SM_RE# SD_WP/SM_CE# MS_BS/SD_CMD/SM_WE# SM_EL_WP# SM_CLE SD_CMD/SM_ALE
XD_CD#
XD_CD#
6411@
+3VS
31 40 33 39
35 37
34 38 36 32
10 11 12 13 14 15 16 17
18 70
69
67 68
JP13
2 3 4 7 8 5 6
1 9
MC_PWR_CTRL#
CARD_LED
R1137
1 2
100K_0402_5%6411@
VSS_MS(P1) VSS_MS (P10) VCC_MS(P3) VCC_MS(P9)
RSVD_MS(P5) RSVD_MS(P7)
SDIO_MS(P4) SCLK_MS(P8) INS_MS(P6) BS_MS(P2)
D0_XD(P10) D1_XD(P11) D2_XD(P12) D3_XD(P13) D4_XD(P14) D5_XD(P15) D6_XD(P16) D7_XD(P17)
R/B#_XD(P2) RE#_XD(P3) CE#_XD(P4) WE#_XD(P7) WP#_XD(P8) CLE_XD(P5) ALE_XD(P6)
VCC_XD(P18) VCC_XD
CD/GND_XD(P1) GND_XD VSS_XD(P9)
GND0 GND1
PRO_FIT068-20-31006411@
PCI_AD[0..31] PCI_CBE#[0..3]
PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0
PCI_CBE#3 PCI_CBE#2 PCI_CBE#1 PCI_CBE#0
R1085
100_0402_1%
CLK_PCI_PCM
R1088
43K_0402_5%
CARD_LED
CLK_PCI_PCM
12
R1098
10_0402_5%@
1
C1091
15P_0402_50V8J@
2
+3VS
W12
W13
W11
U2
V1 V2
U3
W2
V3
U4
V4
V5 U5 R6
P6
W6
V6 U6 R7
V9 U9 R9 N9
V10 U10 R10 N10 V11 U11 R11
V12 U12 N11
W4 W7 W9
P9
V7 R8 U7
W8
N8
W5
V8 U8 U1
T2
P5 R3
T1
T3 R2
L7 N3
M5
P1
P2
P3 N5 R1
M3 M2
H2
1
2
C1079
0.1U_0402_16V4Z
U44B
AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
C/BE3# C/BE2# C/BE1# C/BE0#
PAR FRAME# TRDY# IRDY# STOP# DEVSEL# IDSEL PERR# SERR# REQ# GNT#
PCICLK PCIRST# GRST# RI_OUT#/PME#
SUSPEND# SPKROUT MFUNC0
MFUNC1 MFUNC2 MFUNC3 MFUNC4 MFUNC5 MFUNC6
SCL SDA
VR_EN#
1
1
2
C1080
0.1U_0402_16V4Z
W3
W10
VCCP
VCCP
1
2
C1078
1U_0603_10V4Z
2
C1081
1
2
C1085
1U_0603_10V4Z
M19
H1
T18
V19
VR_PORT
VR_PORT
VDPLL_15
VDPLL_33
MS_CLK/SD_CLK/SM_EL_WP#
MS_SDIO(DATA0)/SD_DAT0/SM_D0
PCI6611/6411
VSSPLL
VSSPLL
AGND
AGND
T17
P14
U14
U16
1
0.1U_0402_16V4Z
MS_DATA3/SD_DAT3/SM_D3 MS_DATA2/SD_DAT2/SM_D2 MS_DATA1/SD_DAT1/SM_D1
SD_CMD/SM_ALE/SC_GPIO2
N12
2
C1082
C1083
1U_0603_10V4Z
0.01U_0402_16V7K
R13
R14
V17
AVDD
AVDD
AVDD
MC_PWR_CTRL_0 MC_PWR_CTRL_1
SD_CD# MS_CD# SM_CD#
MS_BS/SD_CMD/SM_WE#
SD_CLK/SM_RE#/SC_GPIO1 SD_DAT0/SM_D4/SC_GPIO6
SD_DAT1/SM_D5/SC_GPIO5 SD_DAT2/SM_D6/SC_GPIO4 SD_DAT3/SM_D7/SC_GPIO3
SD_WP/SM_CE#
SM_CLE/SC_GPIO0
SM_R#/SC_RFU
SM_PHYS_WP#/SC_FCB
SC_CD#
SC_CLK
SC_RST
SC_VCC_5V
SC_DATA
SC_OC#
SC_PWR_CTRL
TEST0
CLK_48
PHY_TEST_MA
AGND
PCI6411ZHK_PBGA288
RSVD
RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
1
C1084
2
NC
1 1
PCI_AD[0..31]<19,23,27,28,29>
PCI_CBE#[0..3]<19,27,28,29>
2 2
PCI_PAR<19,27,28,29>
PCI_FRAME#<19,27,28,29>
PCI_TRDY#<19,27,28,29>
PCI_IRDY#<19,27,28,29>
PCI_STOP#<19,27,28,29>
PCI_AD20
3 3
4 4
PCI_DEVSEL#<19,27,28,29>
PCI_PERR#<19,27,28,29> PCI_SERR#<19,27,28,29> PCI_REQ#2<19> PCI_GNT#2<19>
CLK_PCI_PCM<19>
PCI_RST#<19,25,27,28,29,36,37,38>
+3VS
PCM_SPK<30>
PCI_PIRQE#<19,27> PCI_PIRQF#<19,29> PCI_PIRQG#<19,28>
SIRQ<19,36,37,38>
PCI_PIRQH#<19>
CARD_LED<35>
R1122 10K_0402_5%
+3VS
1 2
R1095 220_0402_5%
1 2
R1096 220_0402_5%
1 2
R1097 220_0402_5%
1 2
1 2
2
1 2
13
D
2
G
S
MS INTERFACE XD INTERFACE
C1087
0.1U_0402_16V4Z
6411@
R1081 10K_0402_5%
6411@
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Size Document Number Rev Custom
Date: Sheet
Compal Electronics, Inc.
TI PCI6411 PCI/SD
LA-2421
E
of
24 56Wednesday, January 05, 2005
Page 25
A
B
C
D
E
U48
9
12V
+5VS
+3VS
S1_D3 S1_D4 S1_D5 S1_D6 S1_D7 S1_CE1# S1_A10 S1_OE# S1_A11 S1_A9 S1_A8 S1_A13 S1_A14 S1_WE# S1_RDY#
S1_A16 S1_A15 S1_A12 S1_A7 S1_A6 S1_A5 S1_A4 S1_A3 S1_A2 S1_A1 S1_A0 S1_D0 S1_D1 S1_D2 S1_WP
1 1
2 2
3 3
4 4
+3VS
1
2
2
2
C1094
C1093
C1092
10U_1206_16V4Z
0.1U_0402_16V4Z
C1095
0.1U_0402_16V4Z
CB_DAT CB_CLK CB_LATCH
1
2
2
C1096
0.1U_0402_16V4Z
1
1
2
C1097
0.1U_0402_16V4Z
U44A
N1
DATA
L6
CLOCK
N2
LATCH
B15
RSVD
A16
RSVD
B16
RSVD
A17
RSVD
C16
RSVD
D17
RSVD
C19
RSVD
D18
RSVD
E17
RSVD
E19
RSVD
G15
RSVD
F18
RSVD
H14
RSVD
H15
RSVD
G17
RSVD
K17
RSVD
L13
RSVD
K18
RSVD
L15
RSVD
L17
RSVD
L18
RSVD
L19
RSVD
M17
RSVD
M14
RSVD
M15
RSVD
N19
RSVD
N18
RSVD
N15
RSVD
M13
RSVD
P18
RSVD
P17
RSVD
P19
RSVD
F15
RSVD
G18
RSVD
K14
RSVD
M18
RSVD
K13
RSVD
G19
RSVD
H17
RSVD
J13
RSVD
J17
RSVD
H19
RSVD
J19
RSVD
J18
RSVD
B18
RSVD
E18
RSVD
J15
RSVD
F14
RSVD
A18
RSVD
H18
RSVD
B19
RSVD
F17
RSVD
C17
RSVD
N13
RSVD
B17
RSVD
C18
RSVD
F19
RSVD
N17
RSVD
A15
RSVD
K15
RSVD
1
2
2
C1098
C1099
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
H10
H11
H12
J12
M10
M12
K12
N7
D19
K19
VCC
VCC
VCCJ8VCCM7VCC
VCCM9VCC
VCC
VCCK8VCC
VCC
VCCB
VCCB
PCI 6611/6411
A_CSTSCHG/A_BVD1(STSCHG/RI)
GND
GNDK9GND
GND
GNDL8GNDL9GND
GND
GND
GND
M8
L10
L11
L12
J10
J11
K10
K11
1
2
C1100
A11
VCCH8VCCH9VCC
A_CAD31/A_D10
VCCAA5VCCA
A_CAD30/A_D9 A_CAD29/A_D1 A_CAD28/A_D8 A_CAD27/A_D0 A_CAD26/A_A0 A_CAD25/A_A1 A_CAD24/A_A2 A_CAD23/A_A3 A_CAD22/A_A4 A_CAD21/A_A5 A_CAD20/A_A6
A_CAD19/A_A25
A_CAD18/A_A7 A_CAD17/A_A24 A_CAD16/A_A17
A_CAD15/A_IOWR#
A_CAD14/A_A9
A_CAD13/A_IORD#
A_CAD12/A_A11
A_CAD11/A_OE#
A_CAD10/A_CE2#
A_CAD9/A_A10
A_CAD8/A_D15
A_CAD6/A_D13
A_CAD4/A_D12
A_CAD2/A_D11
A_CC/BE3#/A_REG#
A_CC/BE2#/A_A12
A_CC/BE1#/A_A8
A_CC/BE0#/A_CE1#
A_CPAR/A_A13
A_CFRAME#/A_A23
A_CTRDY#/A_A22
A_CIRDY#/A_A15
A_CSTOP#/A_A20
A_CDEVSEL#/A_A21
A_CBLOCK#/A_A19
A_CPERR#/A_A14
A_CSERR#/A_WAIT#
A_CREQ#/A_INPACK#
A_CGNT#/A_WE#
A_CCLKRUN#/A_WP(IOIS16)
A_CCLK/A_A16
A_CINT#/A_READY(IREQ)
A_CRST#/A_RESET
A_CAUDIO/A_BVD2(SPKR#)
A_CCD1#/A_CD1# A_CCD2#/A_CD2#
A_CVS1/A_VS1# A_CVS2/A_VS2#
A_CRSVD/A_D14
A_CRSVD/A_D2
A_CRSVD/A_A18
GNDG7GNDG8GND
GND
GNDJ9GND
H13
G13
PCI6411ZHK_PBGA288
1
1
1
1
2
C1101
0.1U_0402_16V4Z
0.1U_0402_16V4Z
A_CAD7/A_D7 A_CAD5/A_D6 A_CAD3/A_D5 A_CAD1/A_D4
A_CAD0/A_D3
A_USB_EN# B_USB_EN#
S1_VCC
D1 C1 D3 C2 B1 B4 A4 E6 B5 C6 B6 G9 C7 B7 A7 A10 E11 G11 C11 B11 C12 B12 A12 E12 C13 F12 A13 C14 E13 A14 B14 E14
C5 F9 B10 G12
G10 C8 A8 B8 A9 C9 E10 F10 B3 E7 B9 B2 C3 E9 C4
A6 A2 C15
E5 A3 E8
B13 D2 C10
E2 E1
S1_D10 S1_D9 S1_D1 S1_D8 S1_D0 S1_A0 S1_A1 S1_A2 S1_A3 S1_A4 S1_A5 S1_A6 S1_A25 S1_A7 S1_A24 S1_A17 S1_IOWR# S1_A9 S1_IORD# S1_A11 S1_OE# S1_CE2# S1_A10 S1_D15 S1_D7 S1_D13 S1_D6 S1_D12 S1_D5 S1_D11 S1_D4 S1_D3
S1_REG# S1_A12 S1_A8 S1_CE1#
S1_A13 S1_A23 S1_A22 S1_A15 S1_A20 S1_A21 S1_A19 S1_A14 S1_WAIT# S1_INPACK# S1_WE# S1_BVD1 S1_WP S1_A16 S1_RDY#
S1_RST S1_BVD2 S1_CD1#
S1_CD2# S1_VS1 S1_VS2
S1_D14 S1_D2 S1_A18
S1_VCC S1_VPP
5
5V
6
5V
3
3.3V
4
3.3V GND
7
PCI_RST#<19,24,27,28,29,36,37,38>
JP26
1
1
35
2
2
36
3
3
37
4
4
38
5
5
39
6
6
40
7
7
41
8
8
42
9
9
43
10
10
44
11
11
45
12
12
46
13
13
47
14
14
48
15
15
49
16
16
50
17
17
51
18
18
52
19
19
53
20
20
54
21
21
55
22
22
56
23
23
57
24
24
58
25
25
59
26
26
60
27
27
61
28
28
62
29
29
63
30
30
64
31
31
65
32
32
66
33
33
67
34
34
68
69
GND
GND
71
GND
GND
73
GND
GND
75
GND
GND
77
GND
GND
79
GND
GND
81
GND
GND
83
GND
GND
FOX_WZ21131-G2-HR_LB
13 12 11
10
1 2 15 14
8
S1_CD1# S1_D11 S1_D12 S1_D13 S1_D14 S1_D15 S1_CE2# S1_VS1 S1_IORD# S1_IOWR# S1_A17 S1_A18 S1_A19 S1_A20 S1_A21
S1_A22 S1_A23 S1_A24 S1_A25 S1_VS2 S1_RST S1_WAIT# S1_INPACK# S1_REG# S1_BVD2 S1_BVD1 S1_D8 S1_D9 S1_D10 S1_CD2#
S1_VCC
CB_CLK VCCD#1 CB_LATCH CB_DAT
S1_VPP
3 4
5 12 15 21
8 19
9 10
17 18
VCCD#1 <24>
U45
DATA CLOCK LATCH RESET# OC# SHDN#
AVPP NC0
AVCC AVCC
NC1 NC2
TPS2220ADBR_SSOP246411@
S1_VCC S1_VPP
20
12V
7
12V
14
NC3
13
3.3V
24
NC4
2
5V
1
5V
11
GND
23
NC5
22
NC6
16
NC7
6
NC8
Near to PCMCIA slot.
S1_VCC
1
C1104 10U_1206_16V4Z
2
S1_VPP
1
C1106 10U_1206_16V4Z
2
S1_CD1#
100P_0402_50V8J
S1_CD2#
100P_0402_50V8J
+3VS
+5VS
C1102
1
2
C1103
0.1U_0402_16V4Z
1
C1105
0.1U_0402_16V4Z
2
1
C1107
0.1U_0402_16V4Z
2
C1108
1 2
C1109
1 2
1
2
0.1U_0402_16V4Z
VCC VCC VCC
VPP
VCCD0 VCCD1 VPPD0 VPPD1
OC
SHDN
TPS2211AIDBR_SSOP161510@
16
CB_DAT CB_CLK CB_LATCH PCI_RST#
S1_VPP
S1_VCC
35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 70 72 74 76 78 80 82 84
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Title
Size Document Number Rev Custom
Date: Sheet
Compal Electronics, Inc.
TI PCI6411 CB socket
LA-2421
E
of
25 56Wednesday, January 05, 2005
Page 26
A
B
C
D
E
+3VALW
+1.5VS
USBP5­USBP5+ NC_CP#
PERST#
NC_CP# PCIECLK0# PCIECLK0
+3VS
5 6
21
18 19
14 15
4 3 2
U21
3.3Vin1
3.3Vin2
3.3Vaux_in
1.5Vin1
1.5Vin2
CPUSB# CPPE# STBY# SHDN# SYSRST#
GND
11
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
27 28
NC11NC210NC312NC413NC5
JP5
1
GND
2
USB_D-
3
USB_D+
4
CPUSB#
5
RSV
6
RSV
7
SMB_CLK
8
SMB_DATA
9
+1.5V +1.5V WAKE# +3.3VAUX PERST# +3.3V +3.3V CLKREQ# CPPE# REFCLK­REFCLK+ GND PERn0 PERp0 GND PETn0 PETp0 GND
GND GND
FOX_1CH4110C
3.3Vout1
3.3Vout2
Aux_out
1.5Vout1
1.5Vout2
OC#
RCLKEN PERST#
24
7 8
20
16 17
23
R1073 0_0402_5%@
PCIEC_CLKREQ
22
PERST#
9
TPS2231PWPR_PWP24NCARD@
+3VS_PEC
1 2
+3V_PEC
+1.5VS_PEC
Near to Express Card slot.
+3VS_PEC
1
C511
0.1U_0402_16V4Z
2
NCARD@
+1.5VS_PEC
1
C507
0.1U_0402_16V4Z
2
NCARD@
1
C503 10U_0805_10V4Z
2
NCARD@
2
C494 10U_0805_10V4Z
1
NCARD@
+3V_PEC
1
C57
0.1U_0402_16V4Z
2
NCARD@
NCARD@
PCIEC_CLKREQ
+3VALW
+3VALW
1 1
100K_0402_5%
NC_CP#<20>
2 2
3 3
NC_CP#
R288
@
12
R289
@
100K_0402_5%
12
12
C485 4.7U_0805_10V4Z
C492 4.7U_0805_10V4Z
C487 4.7U_0805_10V4Z
SYSON
R1135 10K_0402_5%
12
NCARD@
1 2
NCARD@
12
NCARD@
SUSP#<37,38,39,42> SYSON<37,38,42,46> NB_RST#<13,19,34>
USBP5-<20>
USBP5+<20>
SB_SCLK<8,9,16,20>
SB_SDAT<8,9,16,20> +1.5VS_PEC +1.5VS_PEC
PCIE_PME#<20>
+3V_PEC +3VS_PEC
PCIECLK0#<16>
PCIECLK0<16> GPP_RX0N<12>
GPP_RX0P<12>
PCIE_TX0N<12> PCIE_TX0P<12>
10K_0402_5%
1
C486 10U_0805_10V4Z
2
NCARD@
+3VS
R300
1 2
13
D
2
Q40
G
S
NC_CLKSEL0# <16>
2N7002_SOT23NCARD@
4 4
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Title
Size Document Number Rev Custom
Date: Sheet
Compal Electronics, Inc.
Express Card socket
LA-2421
E
of
26 56Wednesday, January 05, 2005
Page 27
5
D D
PCI_AD[0..31]<19,23,24,28,29>
C C
PCI_CBE#3<19,24,28,29> PCI_CBE#2<19,24,28,29> PCI_CBE#1<19,24,28,29> PCI_CBE#0<19,24,28,29> CLK_PCI_1394<19> PCI_GNT#0<19> PCI_REQ#0<19>
ID: AD16
PCI_FRAME#<19,24,28,29> PCI_IRDY#<19,24,28,29> PCI_TRDY#<19,24,28,29> PCI_DEVSEL#<19,24,28,29> PCI_STOP#<19,24,28,29> PCI_PERR#<19,24,28,29> PCI_PIRQE#<19,24>
PCI_SERR#<19,24,28,29> PCI_PAR<19,24,28,29>
B B
PCI_RST#9,24,25,28,29,36,37,38>
PCI_AD[0..31]
PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0
CLK_PCI_1394
PCI_AD16
1 2
R1110 100_0402_5%
1394@
1 2
R1113 10K_0402_5%
1394@
U12
22
PCI_AD31
24
PCI_AD30
25
PCI_AD29
26
PCI_AD28
28
PCI_AD27
29
PCI_AD26
31
PCI_AD25
32
PCI_AD24
37
PCI_AD23
38
PCI_AD22
40
PCI_AD21
41
PCI_AD20
42
PCI_AD19
43
PCI_AD18
45
PCI_AD17
46
PCI_AD16
61
PCI_AD15
63
PCI_AD14
65
PCI_AD13
66
PCI_AD12
67
PCI_AD11
69
PCI_AD10
70
PCI_AD9
71
PCI_AD8
74
PCI_AD7
76
PCI_AD6
77
PCI_AD5
79
PCI_AD4
80
PCI_AD3
81
PCI_AD2
82
PCI_AD1
84
PCI_AD0
34
PCI_C/BE3#
47
PCI_C/BE2#
60
PCI_C/BE1#
73
PCI_C/BE0#
16
PCI_CLK
18
PCI_GNT#
19
PCI_REQ#
36
PCI_IDSEL
49
PCI_FRAME#
50
PCI_IRDY#
52
PCI_TRDY#
53
PCI_DEVSEL#
54
PCI_STOP#
56
PCI_PERR#
13
PCI_INTA#/CINT#
21
PCI_PME#
57
PCI_SERR#
58
PCI_PAR
12
PCI_CLKRUN#
85
PCI_RST#
G_RST# connect to PCIRST#
14
CLK_PCI_1394
12
R1117
10_0402_5%
1
C1132
10P_0402_25V8K
2
** GPIO2 and GPIO3 defaults as an input and if it is not implemented, it is recommended that it be pulled low to ground with a 220 ohm resistor.
Power on
VCC(+3VS)
A A
R1116
1 8 2 7 3 6 4 5
SCL_1394
SDA_1394
220_1206_8P4R_5%
1394@
Entry S3 S3 Wake-up
G_RST#
89
GPIO3
90
GPIO2
GLOBA_RESET#
T1
T1
PCI_PCIRST#
T2
5
T2
4
+3VS
VDDP20VDDP35VDDP48VDDP62VDDP
TSB43AB22
PCI BUS INTERFACE
AGND
AGND
AGND
AGND
AGND
PLLGND18REG_EN#
9
T1: >2ms T2: >=0
Note: GLOAB_RESET# Can Connect to PCI_PCIRST#
AGND
AGND
DGND17DGND23REG1830DGND
109
110
111
117
126
127
128
0.1U_0402_16V4Z 1394@
4
87
78
CYCLEIN
PHY PORT 2
BIAS CURRENT
OSCILLATOR
FILTER
EEPROM 2 WIRE BUS
POWER CLASS
PHY PORT 1
DGND44DGND55DGND64DGND
68
33
1
C1133
2
CLOSE CHIP
86
96
CNA
TEST1710TEST16
CYCLEOUT
DGND75DGND83REG1893DGND
TSB43AB22_PQFP128
103
1
C1134
0.1U_0402_16V4Z
2
1394@
R1101 10K_0402_5%
R1102
1 8 2 7 3 6 4 5
4.7K_1206_8P4R_5%
1394@
11
15
DVDD
27
DVDD
39
DVDD
51
DVDD
59
DVDD
72
DVDD
88
DVDD
100
DVDD
7
PLLVDD
1
AVDD
2
AVDD
107
AVDD
108
AVDD
120
AVDD
106
CPS
125
TPBIAS1
124
TPA1+
123
TPA1-
122
TPB1+
121
TPB1-
118
R0
119
R1
6
X0
5
X1
3
FILTER0
4
FILTER1
92
SDA
91
SCL
99
PC0
98
PC1
97
PC2
116
TPBIAS0
115
TPA0+
114
TPA0-
113
TPB0 +
112
TPB0 -
94
TEST9
95
TEST8
101
TEST3
102
TEST2
104
TEST1
105
TEST0
1394@
1394@
12
+3VS
4.7U_0805_10V4Z
1 2
R1105 1K_0402_5%
XTPA1+ XTPA1­XTPB1+ XTPB1-
1 2
R1108
6.34K_0402_1%
1394@
12
1 2
C1129
0.1U_0402_16V4Z
SDA_1394 SCL_1394
XTPBIAS0 XTPA0+ XTPA0­XTPB0+ XTPB0-
3
+3VS
+3VS
1
C1110
0.1U_0402_16V4Z
2
1394@
L35
1394@
+PLLVDD
1
C1123
1394@
2
BLM21A601SPT_0805
1 2
1
C1124
0.01U_0402_16V7K
2
1394@
1394@
Near 1394 IC
1 2
C1126 22P_0402_50V8J
X3
1394@
24.576MHz_16P_3XG-24576-43E1
30ppm
1394@
1394@
1 2
C1128 22P_0402_50V8J
1394@
EEPROM cancel, need System Support
1
C1111
0.1U_0402_16V4Z
2
1394@
+3VS
1
C1112
0.1U_0402_16V4Z
2
1394@
C1131
220P_0402_50V7K
1394@
2
1
2
+3VS
1
C1118 1000P_0402_50V7K
2
1394@
12
R1111
56.2_0402_1%
1394@
12
R1114
56.2_0402_1%
1394@
1
2
C1113
0.1U_0402_16V4Z
1394@
Close Chip
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
1
1
C1114
0.1U_0402_16V4Z
2
1394@
1
C1119 1000P_0402_50V7K
2
1394@
XTPBIAS1 XTPA1+ XTPA1-XTPBIAS1 XTPB1+ XTPB1-
C1127
220P_0402_50V7K
1394@
12
R1112
56.2_0402_1%
1394@
12
R1115
56.2_0402_1%
1394@
12
R1118
5.11K_0402_1%
1394@
1
2
Title
Size Document Number Rev
Date: Sheet of
1
C1115
0.1U_0402_16V4Z
2
1394@
1
C1120 1000P_0402_50V7K
2
1394@
12
R1103
56.2_0402_1%
1394@
12
R1106
56.2_0402_1%
1394@
1
2
C1130 1U_0805_25V4Z
1394@
SUYIN_020204FR004S508ZA
1394@
The connector depend on defferent project
JP12
4 5 3 2 1
12
12
12
6 7 8
Compal Electronics, Inc.
IEEE 1394 CONTROLLER
LA-2421
1
2
1
C1121 1000P_0402_50V7K
2
1394@
R1104
56.2_0402_1%
1394@
R1107
56.2_0402_1%
1394@
R1109
5.11K_0402_1%
1394@
Connect To Shielding GND
C1116
0.1U_0402_16V4Z
1394@
1
2
1
1
C1117
0.1U_0402_16V4Z
2
1394@
1
C1122 1000P_0402_50V7K
2
1394@
C1125 1U_0805_25V4Z
1394@
27 56Wednesday, January 05, 2005
XTPA1+ <41>
XTPA1- <41>
XTPB1+ <41>
XTPB1- <41>
0.6
Page 28
5
CTRL25
U8
104 103 102
98 97 96 95 93 90 89 87 86 85 83 82 79 59 58 57 55 53 50 49 47 43 42 40 39 37 36 34 33
92 77 60 44
46 76
61 63 67 68 69
70 75
30 29
25 31 27 28
65
4
17
128
21 38 51 66 81
91 101 119
35
52
80 100
RTL8100CL_LQFP128
+3VALW
12
1
Q13
4.7U_0805_10V4Z
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE#0 C/BE#1 C/BE#2 C/BE#3
IDSEL PAR
FRAME# IRDY# TRDY# DEVSEL# STOP#
PERR# SERR#
REQ# GNT#
INTA# PME# RST# CLK
CLKRUN#
GND/VSS GND/VSS GND/VSS
GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST
GND GND GND GND
2 3
2SB1188_SC62
C224
AUX/EEDI
TXD+/MDI0+
TXD-/MDI0-
RXIN+/MDI1+
RXIN-/MDI1-
NC/MDI2+ NC/MDI3+
ISOLATE#
NC/SMBCLK
NC/SMBDATA
NC/M66EN
NC/AVDDH
PCI I/F
NC/HSDAC+
LAN I/F
RTT3/CRTL18
AVDD33/AVDDL AVDD33/AVDDL AVDD33/AVDDL
NC/AVDDL
VDD25/VDD18 VDD25/VDD18 VDD25/VDD18 VDD25/VDD18
NC/VDD18 NC/VDD18 NC/VDD18 NC/VDD18 NC/VDD18
Power
AVDD25/HSDAC-
C211 1U_0603_10V4Z
D D
PCI_AD[0..31]<19,23,24,27,29>
C C
PCI_CBE#0<19,24,27,29> PCI_CBE#1<19,24,27,29> PCI_CBE#2<19,24,27,29> PCI_CBE#3<19,24,27,29>
PCI_AD22
PCI_PAR<19,24,27,29>
PCI_FRAME#<19,24,27,29>
PCI_IRDY#<19,24,27,29>
PCI_TRDY#<19,24,27,29>
PCI_DEVSEL#<19,24,27,29>
PCI_STOP#<19,24,27,29>
PCI_PERR#<19,24,27,29> PCI_SERR#<19,24,27,29>
PCI_REQ#1<19>
PCI_GNT#1<19>
B B
A A
PCI_PIRQG#<19,24>
CLK_PCI_LAN<19,23>
CLK_PCI_LAN
12
10_0402_5%
1
C606 10P_0402_50V8K
2
PME_EC#<29,37,38> PCI_RST#<19,24,25,27,29,36,37,38>
R414
5
PCI_AD[0..31]
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
LAN_IDSEL
1 2
R141 100_0402_5%
CLK_PCI_LAN
1 2
R136 10K_0402_5%
V2.5_LAN
EEDO
EESK
EECS
LED0 LED1 LED2
NC/LED3
NC/MDI2­NC/MDI3-
LWAKE
RTSET
NC/HV
NC/HG NC/LG2 NC/LV2
NC/VSS NC/VSS
NC/GND NC/GND NC/GND NC/GND NC/GND NC/GND
CTRL25
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
4
1
2
LAN_EEDO
108
LAN_EEDI
109
LAN_EECLK
111
LAN_EECS
106
ACTIVITY#
117
LINK_100#
115 114
LINK_1000#
113
TXD+/MDI0+
1
TXD-/MDI0-
2
RXIN+/MDI1+
5
RXIN-/MDI1-
6
NC/MDI2+
14
NC/MDI2-
15
NC/MDI3+
18
NC/MDI3-
19 121
X1
122
X2
R403 1K_0402_5%
105
R402 15K_0402_5%
23
R353 5.6K_0603_1%
127 72 74
88 10
120 11
R109
123 124
DVDD_A
126
9 13
22 48 62 73 112 118
CTRL25
8
CTRL18
125 26
41 56 71 84 94 107
3 7 20 16
32 54 78 99
24 45 64 110 116
0.1U_0402_16V4Z8110S@
V_12P
12
1
C199
0.1U_0402_16V4Z
2
4
2SB1188_SC628110S@
CTRL18
1
Q34
R92 3.6K_0402_5%
1 2
U9
4 3 2 1
AT93C46-10SI-2.7_SO8
LAN_X1 LAN_X2
1 2 1 2 1 2
R353 5.6K for 8100CL
2.49K for 8110S(B)
0_0402_5%
1 2
1
2
C190
0.1U_0402_16V4Z8110S@
C207
0.1U_0402_16V4Z
C196
0.1U_0402_16V4Z
C604
0.1U_0402_16V4Z
2
C243
1
R126
1 2
R393
1 2
0.1U_0402_16V4Z8110S@
1
2
R94
0_0402_5%8110S@
1
2
1
2
1
2
0.1U_0402_16V4Z8110S@
0_0402_5%8100C@ 0_0402_5%8110S@
AVDDH
8110S@
1
2
1
2
1
2
12
+3VALW
2 3
C610
4.7U_0805_10V4Z8110S@
DO
GND DI SK CS
VCC
1
C191
C588
0.1U_0402_16V4Z8110S@
2
V1.8_LAN
C234
0.1U_0402_16V4Z
C197
0.1U_0402_16V4Z
C218
0.1U_0402_16V4Z
2
C208
1
V2.5_LAN
V1.8_LAN
1
1
2
2
+3VALW
5 6
NC
7
NC
8
+3VS
R119 0_0805_5%8110S@
1 2
25MHZ_16P_XSL025000FK1H
LAN_X1
1
C172 27P_0402_50V8J
2
1
C237
0.1U_0402_16V4Z
2
1
C200
0.1U_0402_16V4Z
2
1
C235
0.1U_0402_16V4Z
2
2
C194
1
0.1U_0402_16V4Z8110S@
AVDDH
3
LINK_100# LINK_1000#
C609
0.1U_0402_16V4Z8110S@
1
C202 0.1U_0402_16V4Z
2
Y1
+3VALW
V2.5_LAN
C519 0.01U_0402_16V7K8110S@
12
C529 0.01U_0402_16V7K8110S@
12
C531 0.01U_0402_16V7K8110S@
12
+3VALW
LAN_X2
12
1
C171 27P_0402_50V8J
2
1
C219
0.1U_0402_16V4Z
2
AVDDL
DVDD
1
C236
0.1U_0402_16V4Z
2
2
C189
1
0.1U_0402_16V4Z8110S@
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1
2
2
C188
0.1U_0402_16V4Z8110S@
1
C527 0.01U_0402_16V7K8110S@
12
C532 0.1U_0402_16V4Z8100C@
1 2
+3VALW
C201
0.1U_0402_16V4Z
R106
1 2
R127
1 2
R422
1 2
R135
1 2
0_0805_5%8100C@ 0_0805_5%8110S@
0_0805_5%8110S@
0_0805_5%8100C@
2
R41 300_0603_5%8100C@
1 2
R44 300_0603_5%8110S@
1 2
+3VALW
ACTIVITY#
R52 300_0603_5%
+3VALW
TXD+/MDI0+ TXD-/MDI0-
RXIN+/MDI1+
RXIN-/MDI1-
NC/MDI2+ NC/MDI2-
NC/MDI3+ NC/MDI3- MDO3-
TXD+/MDI0+ TXD-/MDI0-
RXIN+/MDI1+
RXIN-/MDI1-
+3VALW
V2.5_LAN V1.8_LAN
V2.5_LAN
1 2
U3
12
TD4-
11
TD4+
10
TCT4
9
TD3-
8
TD3+
7
TCT3 TD2-6MX2-
5
TD2+
4
TCT2
3
TD1-
2
TD1+
1
TCT1
PULSE_H12858110S@ U6
TD-8TX-
7
TD+
6
CT
3
CT
2
RD-
1
RD+
NS0013_16P8100C@
2
1
JP23
12
Amber LED-
11
MX4­MX4+ MCT4
MX3­MX3+ MCT3
MX2+ MCT2
MX1­MX1+ MCT1
MDO3­MDO3+ MDO1­MDO2­MDO2+ MDO1+ MDO0­MDO0+
MDO0+
13
MDO0-
14 15
MDO1+
16
MDO1-
17
MCT1
18
MDO2+
19
MDO2-
20 21
MDO3+
22 23 24
Amber LED+
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
10
Green LED-
9
Green LED+
TYCO_1566597-1
MDO0+ <41> MDO0- <41>
MDO1+ <41> MDO1- <41>
MDO2+ <41> MDO2- <41>
MDO3+ <41> MDO3- <41>
75_0402_5%
75_0402_5%
75_0402_5%8110S@
75_0402_5%8110S@
SHLD4 SHLD3
SHLD2 SHLD1
R63
12
R60
12
R58
12
R54
12
use 24ST1041A-4
MDO0+
9
MDO0-
10
RX+
TX+
CT
CT
RX-
MCT0
11
MCT1
14
MDO1+
15
MDO1-
16
R397
49.9_0402_1%8110S@
NC/MDI3+
NC/MDI3-
49.9_0402_1%8110S@
49.9_0402_1%8110S@
NC/MDI2+
NC/MDI2-
49.9_0402_1%8110S@
49.9_0402_1%
TXD+/MDI0+
TXD-/MDI0-
49.9_0402_1%
49.9_0402_1%
RXIN+/MDI1+
RXIN-/MDI1-
49.9_0402_1%
R400
R392
R394
R376
R379
R388
R390
12 12
0.01U_0402_16V7K8110S@
12 12
0.01U_0402_16V7K8110S@
12 12
12 12
near U20
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
LAN RealTech8100CL/8110SBL
LA-2421
1
16 15
14 13
RJ45_GNDMCT0
1000P_1206_2KV7K
C599
12
C595
12
C580
12
0.01U_0402_16V7K
C582
12
0.01U_0402_16V7K
28 56Wednesday, January 05, 2005
C528
12
of
Page 29
A
B
C
D
E
D28
3
1 1
WIRELESS_LED<33,35>
1
1N4148_SOT23
WL_ON<20>
+3VS
0.1U_0402_16V4Z@
1
C611
2
4.7U_0805_10V4Z
1
C589
2
CLK_PCI_MINI
12
1
2
R387 10_0402_5%
C579 10P_0402_50V8K
2 2
0.1U_0402_16V4Z
1
C585
2
1000P_0402_50V7K
1
C622
2
PCI_PIRQF#<19,24>
CLK_PCI_MINI<19,23>
PCI_REQ#3<19>
PCI_AD31<19,23,24,27,28> PCI_AD29<19,23,24,27,28>
PCI_AD27<19,23,24,27,28> PCI_AD25<19,23,24,27,28> CH_DATA<33>
PCI_CBE#3<19,24,27,28>
PCI_AD23<19,23,24,27,28> PCI_AD21<19,24,27,28>
PCI_AD19<19,24,27,28> PCI_AD17<19,24,27,28>
PCI_CBE#2<19,24,27,28>
PCI_IRDY#<19,24,27,28>
PCI_SERR#<19,24,27,28> PCI_PERR#<19,24,27,28>
PCI_CBE#1<19,24,27,28>
PCI_AD14<19,24,27,28> PCI_AD12<19,24,27,28>
PCI_AD10<19,24,27,28>
PCI_AD8<19,24,27,28> PCI_AD7<19,24,27,28>
WL_ON
CLK_PCI_MINI
CH_DATA
PCI_AD5<19,24,27,28> PCI_AD3<19,24,27,28>
+5VS
PCI_AD1<19,24,27,28>
3 3
+5VS
W=30mils
LAN RESERVED LAN RESERVED
2
TIP
MINI_LED
W=40mils
1 2
R423 10K_0402_5%
W=30mils
JP8
112
KEY KEY
334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152 535354 555556 575758 595960 616162 636364 656566 676768 696970 717172 737374 757576 777778 797980 818182 838384 858586 878788 898990 919192 939394 959596 979798 9999100
101
101
103
103
105
105
107
107
109
109
111
111
113
113
115
115
117
117
119
119
121
121
123
123
QTC_C102A-052B11
102 104 106 108 110 112 114 116 118 120 122 124
RING
2 4
6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124
W=30mils
W=40mils
W=40mils
R465
1 2
10K_0402_5%@
W=40mils
PCI_PIRQF#
PME_EC# CH_CLK
1 2
R404 100_0402_5%
PCI_AD18
PCI_AD22
PCI_AD18
1 2
R1129 10K_0402_5%
+5VS PCI_GNT#4 <19>PCI_REQ#4<19>
+3VALW PCI_RST# <19,24,25,27,28,36,37,38>
PCI_GNT#3 <19> PME_EC# <28,37,38>
CH_CLK <33> PCI_AD30 <19,23,24,27,28>
PCI_AD28 <19,23,24,27,28> PCI_AD26 <19,23,24,27,28> PCI_AD24 <19,23,24,27,28>
IDSEL : AD18
PCI_AD22 <19,24,27,28> PCI_AD20 <19,24,27,28> PCI_PAR <19,24,27,28> PCI_AD18 <19,24,27,28> PCI_AD16 <19,24,27,28>
PCI_FRAME# <19,24,27,28> PCI_TRDY# <19,24,27,28> PCI_STOP# <19,24,27,28>
PCI_DEVSEL# <19,24,27,28> PCI_AD15 <19,24,27,28>
PCI_AD13 <19,24,27,28> PCI_AD11 <19,24,27,28>
PCI_AD9 <19,24,27,28> PCI_CBE#0 <19,24,27,28>
PCI_AD6 <19,24,27,28> PCI_AD4 <19,24,27,28> PCI_AD2 <19,24,27,28> PCI_AD0 <19,24,27,28>
+3VS +3VALW
0.1U_0402_16V4Z
1
C578
2
1000P_0402_50V7K
1
C623
2
0.1U_0402_16V4Z@
1
C598
2
C639
4.7U_0805_10V4Z
C637
4.7U_0805_10V4Z@
1
2
+5VS
1
2
0.1U_0402_16V4Z
+3VALW
1
2
0.1U_0402_16V4Z
+3VS
C608
4.7U_0805_10V4Z
1000P_0402_50V7K
1
C630
C577
2
1000P_0402_50V7K@
1
C641
C581
2
1
2
1
2
4 4
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Mini PCI Slot
LA-2421
of
29 56Wednesday, January 05, 2005
E
Page 30
A
B
C
D
E
2
3 1
0.1U_0402_16V4Z
1
C364
2
MONO_INR
+3VAMP_CODEC
12
R536 10K_0402_1%
Q21 MMBT3904_SOT23 MMBT3904_SOT23
1
1
C365
2
2
0.1U_0402_16V4Z
1 2
R520 0_0402_5%
1 2
R518 0_0402_5%
1 2
R516 0_0402_5%
1 2
R513 0_0402_5%
1 2
R503 22_0402_5%
1 2
R502 22_0402_5%
1 2
R209 10K_0402_5%@
1 2
R505 10K_0402_5%@
MONO_IN MONO_INR
Q37
1 2
2
3 1
R528
1 2
2.4K_0402_5%
R535
560_0402_5%
C674
1 2
1U_0603_10V4Z
SB_SPKR <20>PCM_SPK<24>
For Layout:
Place decoupling caps near the power pins of SmartAMC device.
12
R522 249K_0402_1%
5
10
RCOSC1 DIB_DATAN DIB_DATAP PWRCLKP PWRCLKN SDATA_OUT
SYNC AC_RESET#
AC_ONLY SDATA_IN0 BIT_CLK ID0# ID1# EAPD PC_BEEP DSPKOUT
VDD5
2
GNDC2
GND8
6
18
VDDC10
VDDC18
GNDC9
GNDC19
9
19
AVSS_CLK
26
U41
1 3 4 7 8
15 16 17
20 21 22 11 12 14 45 13
23
VDD_CLK
AGND35
35
33
AVDD33
MIC_IN
CD_IN_R
CD_IN_GND
CD_IN_L
LINE_IN_L LINE_IN_R
LINE_OUT_L LINE_OUT_R
HP_OUT_L HP_OUT_R
REF_FLT
VC_SCA
VREF_SCA
MBIAS/AVDD
S_PDIF GPIO_4 GPIO_5
XTLO
XTLI
AGND41
CX20468-31_TQFP48
41
0.1U_0402_16V4Z
1
1
C412
2
2
44
0.1U_0402_16V4Z
AVDD44
29
CDROM_RC_R
32
CDGNDA CD_GNA
31
CDROM_RC_L
30 27
28 39
40 42 43
38 37 36
34
+CODEC_REF
46
R529 10K_0402_5%
47
1 2
48
R507
24
1 2
25
33_0402_5%
+5VS
C424
10U_0805_10V4Z
+3VAMP_CODEC
1
C414
C409
1U_0603_10V4Z
2
C413 10U_0805_10V4Z
1 2
C668 2.2U_0603_6.3V4Z
12
C666 2.2U_0603_6.3V4Z
12
C663 2.2U_0603_6.3V4Z
12
R533
12
4.7K_0402_5%@
C661
1 2
33P_0402_50V8J
X2 24.576MHZ_16P_XSL024576FG1H
1 2
C662
1 2
33P_0402_50V8J
W=40Mil
10K_0402_5%
1
1
C423
2
2
0.1U_0402_16V4Z
LINE_OUTL <32> LINE_OUTR <32>
SPDIFO <41>
12
R219
0.1U_0402_16V4Z
12
R526
2.2K_0402_5%
U16
4
VIN
2
DELAY ERROR7CNOISE
8
SD
SI9182DH-AD_MSOP8
+CODEC_REF
12
R524 3K_0402_5%
CDROM_R_R CDROM_R_L
1
C669
2
R217
1 2
1K_0402_5%
250mA
5
VOUT
GND
1U_0603_10V4Z
1
C673
2
D34 RB751V_SOD323
6 1 3
12
R214
4.7K_0402_5%
1
C675
2
21
SENSE or ADJ
1 2
C1229 0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2
12
47K_0603_1%
1
R222
C420
27K_0603_1%
2
0.01U_0402_16V7K
C441 0.1U_0402_16V4Z C442 0_0402_5% C443 0.1U_0402_16V4Z R532 0_0603_5%
R1134 0_0603_5%@
MIC <32>
12
R514
2.7K_0402_5%
1
C670
0.1U_0402_16V4Z
2
HP_PLUG <32>
+3VAMP_CODEC
R223
1
C418 1U_0603_10V4Z
2
1 2
1 2
1 2
1 2
1 2
GNDAGND
R215 4.7K_0402_5%
1 2
R517 2.7K_0402_5%
1 2
R212 4.7K_0402_5%
1 2
12
R213
4.7K_0402_5%
(3.33V)
1
C671
2
0.1U_0402_16V4Z@
GNDA <32,41>
CDROM_R <34>
CD_AGND <34> CDROM_L <34>
1 1
R221
1 2
560_0402_5%
2 2
+3VALW
2
C667
150P_0402_50V8J
3 3
4 4
PWRCLKP<31> PWRCLKN<31>
150P_0402_50V8J
C665
1
2
1
0.1U_0402_16V4Z
1
C410
2
10U_0805_10V4Z
DIB_DATAN<31> DIB_DATAP<31>
AC97_SDOUT<20,23> AC97_SYNC<20> AC97_RST#<20>
AC97_SDIN0<20> AC97_BITCLK<20>
MUTE_LED<36,41>
1
C408
2
0.1U_0402_16V4Z
C402
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Codec CX20468-31
LA-2421
of
30 56Wednesday, January 05, 2005
E
Page 31
RJ11 CONN.
JP18
3 4
R1142
MTP28
MTP52
1
MTP26
1
MTP22
1
PWRCLKN<30>
PWRCLKP<30>
DIB_DATAP<30>
DIB_DATAN<30>
MJ1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
HEADER8@
MJ1B
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
HEADER8@
MTP23
1
MTP24
1
MT902
2 3
30U_82154R_1%_1:1.67
MTP25
1
GND
SECPRI
BR908_AC1
41
1
MC962 47P_0603_50V8J
2
PCLK
Check 0.047u or 10p cap
MTP27
1
MC922 10P_1808_3KV
MC924 10P_1808_3KV
MT922
2 3
30U_82154R_1%_1:1.67@
1 2
1 2
BR908_CC
MBR908A
6
BAV99DW-7_SOT363
1
2
4
5
MBR908B
3
BAV99DW-7_SOT363
41
SECPRI
0.001U_0402_50V7M@
1
MC974
MR932 15K_0402_5%
MTP72
1
MC944
2
AGND_LSD
MTP29
CLK2
1 2
1 2
MMZ1608D301BT_0603
1
MC970
0.1U_0402_10V6K
2
AGND_LSD
0.1U_0402_10V6K
MR922 0_0402_5%
DIB_P1
1 2
1 2
0_0402_5%
MTP73
MR924
1
MTP61
MC940 1U_0603_6.3V6M
1
2
0.001U_0402_50V7M
C666 is X5R ceramic.
2.2U_0805_10V6K
1
1
2
1
MC930
MC926 10P_0402_50V8J
CLK
1 2
MFB906
PWR+
MTP60
1
DIB_P2
DIB_N2
1
Vc_LSD Vref_LSD
1
MC976
2
MTP30
MTP62
MTP63
1
1
2
AGND_LSD
26
1
27
28
1
22 25
29
7
3 4
8
MU902
VDD
1
2
CLK
PWR+
DIB_P
DIB_N
Vc VRef
NC1 NC2 NC3
PADDLE
AGND_LSD
0.1U_0402_10V6K MC928
MTP58
2
AVdd
AGnd
DC_GND
6
15
DGND_LSD AGND_LSD
MTP59
1
VDD
MC978
0.1U_0402_10V6K
1 2
1
RAC1
TAC1
RAC2
TAC2
TRDC
EIC RXI
GPIO1
RBias
VZ
EIO
EIF
TXO
TXF
DGnd
23
DGND_LSD
RAC1
21
TAC1
20
MTP34
19 18
12 11
RXIDIB_N1 RXI-1
9 1
RBias
5
10
17 16 14 13
CX20493-58_QFN28
24
DVdd
1
MTP36
1
MTP35
MR902 1M_0805_5%
1 2
1M_0805_5% MR904
1
TRDC
MTP33
1
MC958
EIC
1 2
0.015U_0603_25V7K MR910 237K_0805_1%
1 2
EIO EIF
1
MTP70
AGND_LSD
MR954
1 2
59K_0402_1%
MTP69
1
MR908
1 2
348K_0805_1%
MTP68
1
Use 59K_0402_1% for MR954
TXO
TXF
1
MTP37
1
MTP38
MC902
RAC1/RING TAC1/TIP
12
MR906 6.8M_0805_5%
1
2
AGND_LSD
1
1
MTP65
MC904
MTP40
1 2
MC918
0.1U_0603_16V7K
1
MTP71
MC910
1 2
0.047U_1206_100V7K
MTP67
1 2 1 2
2
B
E
AGND_LSD
1
MTP39
0.033U_1206_100V7K
0.033U_1206_100V7K
1
1
MTP32
2
B
C
MQ906 PMBTA42_SOT23
3 1
1
MTP64
12
MR938 110_0603_5%
TIP_2
1 2
BRIDGE_CCVZ
C
MQ902
PMBTA42_SOT23
E
3 1
MTP31
1
1
0_0402_5%
MFB902
1 2
MMZ1608D301BT_0603
1
MBR904 MMBD3004S_SOT23
TIP_2
2
3
2
3
AGND_LSD
MBR906 MMBD3004S_SOT23
1
MFB904
1 2
MMZ1608D301BT_0603
MC966
0.01U_0805_100V7M
2
4
MQ904
FZT458TA_SOT223
3
1
12
MR928 27_0805_5%
AGND_LSD
C906 and C908 must be Y3 type Capacitors for Nordic Countries only
MTP66
1
GND GND
MTP49
GND GND
112
12
MOD_RINGRING_2
1
2
1
2
5 6
FOX_JM34613-L001
2
12
R1143 0_0402_5%
TIP MRING
MC906 470P_1808_3KV
1
1 2
GND
2
MC908 470P_1808_3KV
MOD_TIP
AGND_LSD
JP20
1 2
MOLEX_53398-0290
1
TB3100M-13-01_SMB
MRV902
1
MTP41
MJ2
2 1
E&T_3800-02
MTP42
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
AMOM_modem
LA-2421
of
31 56Wednesday, January 05, 2005
0.6
Page 32
A
1 1
C676 0.47U_0603_16V7K
LINE_OUTR<30>
LINE_OUTL<30>
2 2
1 2
C677 0.47U_0603_16V7K
1 2
C439 0.47U_0603_16V7K
C438 0.47U_0603_16V7K
C678 0.47U_0603_16V7K
1 2
C679 0.47U_0603_16V7K
1 2
C427 0.47U_0603_16V7K
1 2
1 2
1 2
EC_MUTE#<37,38>
LINE_C_OUTR HP_C_OUTR
HP_C_OUTL LINE_C_OUTL
U42
23 20
8
10
6 5
14 22
RLINEIN RHPIN RIN
LIN LHPIN LLINEIN
PC-BEEP SHUTDOWN#
1
B
C440
10U_0805_10V4Z
19
18
VDD
LOUT-
PVDD17PVDD2
LOUT+ ROUT-
ROUT+
SE/BTL#
HP/LINE#
GAIN1 GAIN0
BYPASS
GND424GND3
GND212GND1
TPA0312PWP_TSSOP24~D
13
SPKR+ SPKL+
0.1U_0402_16V4Z
1
1
2
C425
2
0.1U_0402_16V4Z
SPKL-
9
SPKL+
4
SPKR-
16
SPKR+
21
HP_PLUG
15 17
3 2
11
2
C436
0.47U_0603_10V7K
1
+
C434 100U_6.3V_M
1 2
+
C433 100U_6.3V_M
1 2
+5VS
1
C426
2
R1149 75_0805_5% R1150 75_0805_5%
1 2 1 2
C
INTSPK_CR+ INTSPK_CL+
100K_0402_5%
100K_0402_5%@
12
R232
R237
R234
SPKL+ SPKL­SPKR+ SPKR-
12
R235
10 dB
12
100K_0402_5%@
12
100K_0402_5%
47P_0402_50V8J
12
R236
12
R233
+5VS
C429
D
1
47P_0402_50V8J
2
1
C430
2
47P_0402_50V8J
1
1
C432
C431
47P_0402_50V8J
2
2
Gain Settings
GAIN0
GAIN1
0
0
1 0
1
0
1
1
SE/BTL#
0
0
0
0
1XX
HEADPHONE OUT/LINE OUT
E
JP36
1
1
2
2
3
3
4
4
ACES_85205-0400
Av(inv)
* 10 dB
6 dB
15.6 dB
21.6 dB
4.1 dB
+5VS
1
C1136
0.1U_0402_16V4Z
2
5
1
2
2
I0
1
I1
U46
P
HP_PLUG
4
O
G
TC7SH32FU_SSOP5
3
HP_PLUG <30>
B
L34
MIC<30>
DOCK_LOUT_R<41> DOCK_LOUT_L<41>
DOCK_LOUT_R DOCK_LOUT_L
1 2
FBM-11-160808-601-T_0603
C660
47P_0402_50V8J
INTSPK_CL+ PL
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
JACK_DET<41>
3 3
4 4
JACK_DET DOCK_LOUT_R
R1124
100K_0402_5%
A
+5VS
12
100K_0402_5%
R1123
1 2
C1135
1U_0603_10V4Z
1K_0402_5%
DOCK_MIC<41>
1
2
1K_0402_5%
R511
1 2
2K_0402_5%
R508
1 2
18K_0402_5%
JP15
5 4 3
6 2 1
FOX_JA6033L-5S1-TR
7
8
MIC IN
L16 FBM-11-160808-601-T_0603
L15 FBM-11-160808-601-T_0603
D
1 2
1 2
47P_0402_50V8J
7
PRINTSPK_CR+
1
1
C437
C435
47P_0402_50V8J
2
2
Title
Size Document Number Rev
LA-2421
Custom Date: Sheet
JP16
5 4 3
6 2 1
FOX_JA6033L-5S1-TR
Compal Electronics, Inc.
AMP & Audio Jack
8
of
32 56Wednesday, January 05, 2005
E
Page 33
C464
0.1U_0402_16V4Z
R242
4.7K_0402_1%
+5V
12
1 2
U17
5
IN
3
SET
AATI4610AIGV-T1_SOT23-5
4.7K_0402_1%
4.7K_0402_1%
1
OUT
4
ON#
2
GND
C247
12
0.1U_0402_16V4Z
R163
C254
12
0.1U_0402_16V4Z
R148
+5V
U10
5
IN
3
SET
AATI4610AIGV-T1_SOT23-5
1 2
+5V
U11
5
IN
3
SET
AATI4610AIGV-T1_SOT23-5
1 2
OUT
ON#
GND
OUT
ON#
GND
Note: PLACE CLOSE TO EACH USB PORT
USB CONNECTOR 1(Rear side)
+USB_VCCA
OVCUR#4
1
C459 1000P_0402_50V7K
2
1
C624 1000P_0402_50V7K
2
OVCUR#0
1
C258 1000P_0402_50V7K
2
1
C460
0.47U_0603_16V7K
2
1
C244
0.47U_0603_16V7K
2
1
C249
0.47U_0603_16V7K
2
OVCUR#4 <20>
OVCUR#2 <20>
OVCUR#0 <20>
100U_6.3V_M
USBP4-<20> USBP4+<20>
USBP4­USBP4+
C445
0.1U_0402_16V4Z@
USB CONNECTOR 2(Left side)
100U_6.3V_M
USBP2-<20>
USBP2+<20>
USBP2-
USBP2+
C597
0.1U_0402_16V4Z@
USB CONNECTOR 3(Left side)
100U_D2_6.3VM@
USBP3-<20> USBP3+<20>
USBP3­USBP3+
C626
0.1U_0402_16V4Z@
12
R239 10K_0402_5%
12
R241
20K_0402_5%
+USB_VCCB
1 4 2
20K_0402_5%
1 4 2
20K_0402_5%
12
12
R157
+USB_VCCC
12
12
R151
R442 10K_0402_5%
R156 10K_0402_5%
C594
C617
C449
1
C446
2
0.1U_0402_16V4Z@
+
1
C600
2
0.1U_0402_16V4Z@
+
1
C629
2
0.1U_0402_16V4Z@
W=40mils
1
+
C447
2
0.1U_0402_16V4Z
1
2
W=40mils
1
C587
2
0.1U_0402_16V4Z
1
2
W=40mils
1
C616
2
0.1U_0402_16V4Z
1
2
+USB_VCCA
1
1
C448 1000P_0402_50V7K
2
2
SUYIN_020173MR004G533ZR
+USB_VCCB
1
1
C586 1000P_0402_50V7K
2
2
SUYIN_020167MR004S511ZU
+USB_VCCB
1
1
C615 1000P_0402_50V7K
2
2
SUYIN_020167MR004S511ZU
JP17
1
VCC
2
D-
3
D+
4
GND
5
GND1
6
GND2
7
GND3
8
GND4
JP7
1 2 3 4
JP10
1 2 3 4
USB KEY
USBP7-<20> USBP7+<20>
Note: Place close to JP46
L
C428 10U_0805_10V4Z@
1 2
+5V
WIRELESS_LED<29,35>
ACES_85201-0405
JP32
USB CONNECTOR 4(Right side)
BT CONNECTOR
BT_ON#<20>
+3VALW
C31
D26
1N4148_SOT23
3
USBP6+<20>
2
USBP6-<20> CH_DATA<29>
CH_CLK<29>
BT_DET#<20>
1
4 3 2 1
1U_0603_10V4Z
BLUETOOTH_LED
R1130 100_0402_5%
1 2
R1131 100_0402_5%
1 2
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
G
2
+3V_BT
13
1 2
D
S
1
AO3413_SOT23 Q10
2
C32 1U_0603_10V4Z
JP4
1 2 3 4 5 6 7 8
ACES_87212-0800
USBP0-<20> USBP0+<20>
100U_6.3V_M
USBP0­USBP0+
C239
0.1U_0402_16V4Z@
Title
Size Document Number Rev
LA-2421
Date: Sheet
W=40mils
1
+
C270
C252
2
0.1U_0402_16V4Z
1
1
C232
2
2
0.1U_0402_16V4Z@
Compal Electronics, Inc.
Bluetooth & USB CONN.
+USB_VCCC
1
1
C253 1000P_0402_50V7K
2
2
SUYIN_020167MR004S511ZU
JP9
1 2 3 4
0.6
of
33 56Wednesday, January 05, 2005
Page 34
5
4
3
2
1
Placea caps. near HDD CONN.
+5VS
D D
D13
1N4148_SOT23
HDD_LED#
CD_LED#
C C
B B
1
D31
1N4148_SOT23
1
3
2
3
2
R515
100K_0402_5%
+5VS
12
ACT_LED#
PD_D[0..15]<21>
ACT_LED# <36>
SD_D[0..15]<21>
PD_D[0..15]
1 2
+5VS
R61 100K_0402_5%@
SD_D[0..15]
1 2
+5VS +5VS
R512 100K_0402_5%@
R218 470_0402_5%
1
2
1000P_0402_50V7K
NB_RST#<13,19,26>
PD_DREQ#<21>
PD_IOW#<21> PD_IOR#<21>
PD_IORDY<21>
PD_DACK#<21,23> PD_IRQA<21>
PD_A1<21> PD_A0<21>
PD_CS#1<21>
+5VS
1
2
1000P_0402_50V7K
CDROM_L<30> CDROM_R <30> CD_AGND<30>
SD_SIOW#<21>
SD_IORDY<21>
SD_IRQA<21> SD_SBA1<21> SD_SBA0<21>
SD_SCS1#<21>
SEC_CSEL
12
C76
C405
0.1U_0402_16V4Z
1
2
NB_RST# PD_D7 PD_D6 PD_D5 PD_D4 PD_D3 PD_D2
PD_D0 PD_DREQ#
PD_IOW# PD_IOR# PD_IORDY PD_DACK# PD_IRQA PD_A1 PD_A0 PD_CS#1 HDD_LED#
+5VS
0.1U_0402_16V4Z@
1
2
CDROM_L
CD_AGND NB_RST# SD_D7 SD_D6 SD_D5 SD_D4 SD_D3 SD_D2 SD_D1 SD_D0
SD_SIOW# SD_IORDY SD_IRQA SD_SBA1 SD_SBA0 SD_SCS1# CD_LED#
+5VS +5VS
C75
SUYIN_200043FR044S504ZL
1
C406
C407
2
1U_0603_10V4Z@
1
C84
2
1U_0603_10V4Z
JP28
112 334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 GND45GND
JP31
112 334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950
SUYIN_800180MB050S111ZL
HDD/CD-ROM Module
10U_0805_10V4Z@
1
C99
2
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46
10U_0805_10V4Z@
1
C403
2
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50
1
C109 10U_0805_10V4Z
2
PD_D8 PD_D9 PD_D10 PD_D11 PD_D12 PD_D13 PD_D14PD_D1 PD_D15
PCSEL
R73 470_0402_5%
1 2
PD_A2 PD_CS#3
1
2
CDROM_R SD_D8
SD_D9 SD_D10 SD_D11 SD_D12 SD_D13 SD_D14 SD_D15 SD_DREQ# SD_SIOR#
SD_DACK#
PDIAG# SD_SBA2
SD_SCS3#
W=80mils
C404 0.1U_0402_16V4Z
+5VS
C664 10U_0805_10V4Z
Pin4 of CD_ROM connector is NC if use Pioneer ODD(DVD Dual DVR-K12TBC/DVR-K13TBC)
R510 100K_0402_5%@
1 2
12
PD_A2 <21> PD_CS#3 <21>
SD_DREQ# <21>
SD_SIOR# <21> SD_DACK# <21>
SD_SBA2 <21>
SD_SCS3# <21>
+5VS +5VS
+5VS
Place caps. n ea r CDROM CONN.
A A
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
HDD & CDROM Connector
LA-2421
of
34 56Wednesday, January 05, 2005
1
Page 35
5
KSO16<37,38>
D D
C C
FOR CARDREADER INDICATOR
B B
KSO16
( PAV /PRES )
CARD_LED<24>
A A
CARD_LED
5
2 4
SW3 TC010-PS11CET_5P
2 4
SW4 TC010-PS11CET_5P
2 4
SW5 TC010-PS11CET_5P
2 4
SW9 TC010-PS11CET_5P
2 4
SW2 TC010-PS11CET_5P
2 4
SW7 TC010-PS11CET_5P
R538
1 2
WIRELESS_LED<29,33>
5
PAV@
5
PAV@
5
PAV@
5
5
PAV@
5
PRES@
R539
300_0402_5%
6411@
2
1K_0402_5%6411@
1 3
1 3
1 3
1 3
1 3
1 3
3 1
Q39 MMBT3904_SOT23
6411@
+3VS
C1
0.1U_0402_16V4Z@
D23
17-21UYOC/S530-A2/TR8_ORG6411@
D24
HSMB-C172 BLUE_08056411@
WIRELESS_LED
R17
10K_0402_5%
12
R28 10K_0402_5%
2
C421
1
0.1U_0402_16V4Z@
PRES_LEDVCC
21
21
1 2
12
1K_0402_5%
4
2
2
C4
0.1U_0402_16V4Z@
1
1
PAV_LEDVCC
R15
4
C3
2
2
C2
1
0.1U_0402_16V4Z@
HSMB-C172 BLUE_0805PAV@
Q2 MMBT3904_SOT23
3 1
3
KSI0
KSI1
KSI2
KSI0 <36,37,38>
KSI1 <36,37,38>
3 FOR PROGRAMING
KSI2 <36,37,38>
PWR_ACTIVE_PAV#<37,38>
PWR_ACTIVE_PRES#<37,38>
FOR TP ON OFF
KSI3
FOR WIRELESS ON OFF
WIRELESS_BTN#
2
0.1U_0402_16V4Z@
1
PAV_LEDVCC
12
21
R16 680_0402_5% PAV@
D2
CAPSLED#<37,38>
KSI3 <36,37,38>
WIRELESS_BTN# <37,38>
R129 130_0402_5%PRES@
R125 680_0402_5%PAV@
+5VS
12
R26
680_0402_5% PRES@
21
D7
HSMB-C172 BLUE_0805PRES@
1 2
1 2
12
R1 470_0402_5%
PAV@
D16
17-21UYOC/S530-A2/TR8_ORGPRES@
D15
HSMB-C172 BLUE_0805PAV@
NUMLED#<37,38>
21
21
FOR WIRLESS LED
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
D3
21
HSMB-C172 BLUE_0805PAV@
D4
21
HSMB-C172 BLUE_0805PAV@
D5
21
HSMB-C172 BLUE_0805PAV@
PRES_LEDVCC
PAV_LEDVCC
TP_OFF_LED#<37,38>
2
1
FOR POWER BUTTON BACKLIGHT ( PAV )
R238 680_0402_5%PAV@
1 2
R27 300_0402_5%PRES@
1 2
HSMB-C172 BLUE_0805PAV@ D1
21
D8
21
17-21UYOC/S530-A2/TR8_ORGPRES@
FOR POWER BUTTON BACKLIGHT ( PRES )
PAV_LEDVCC
PAV_LEDVCC
PAV_LEDVCC
R273 130_0402_5%PRES@
R279 680_0402_5%PAV@
PRES_LEDVCC <36,38>
PAV_LEDVCC <36>
1K_0402_5%
Title
Size Docu ment Number Rev
B
Date: Sheet
FOR 3 PROGRAMING BUTTON BACKLIGHT (PAV)
1 2
1 2
R227
1 2
B
2
Compal Electronics, Inc.
LA-2421
D20 17-21UYOC/S530-A2/TR8_ORGPRES@
D21
HSMB-C172 B LUE_0805PAV@
D22
HSMB-C172 BLUE_0805PAV@
E
3
Q23 MMBT3906_SOT23~D
C
1
R225
1 2
220_0402_5%
LED INDICATOR
D11
17-21UYOC/S530-A2/TR8_ORGPRES@
21
21
21
1
D12
HSMB-C172 BLUE_0805PAV@
35 56Wednesday, January 05, 2005
PRES_LEDVCC
21
PAV_LEDVCC
21
PRES_LEDVCC
PAV_LEDVCC
of
+5V
0.6
Page 36
5
KSO2
C1156 100P_0402_50V8J
INT_KBD CONN. Power BTN
KSI[0..7] KSO[0..15]
KSI1
D D
C C
KSI7 KSI6 KSO9 KSI4 KSI5 KSO0 KSI2 KSI3 KSO5 KSO1 KSI0 KSO2 KSO4 KSO7 KSO8 KSO6 KSO3 KSO12 KSO13 KSO14 KSO11 KSO10 KSO15
ACES_85201-2405
JP14
24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
KSI[0..7] <35,37,38> KSO[0..15] <37,38>
KSO4 KSO7 KSO8 KSI3 KSO5 KSO1 KSI0
KSI1 KSI7 KSI6 KSO9 KSI4 KSI5 KSO0 KSI2
KSO6 KSO3 KSO12 KSO13 KSO14 KSO11 KSO10 KSO15
1 2
C1157 100P_0402_50V8J
1 2
C1158 100P_0402_50V8J
1 2
C1159 100P_0402_50V8J
1 2
C1160 100P_0402_50V8J
1 2
C1161 100P_0402_50V8J
1 2
C1162 100P_0402_50V8J
1 2
C1163 100P_0402_50V8J
1 2
C1164 100P_0402_50V8J
1 2
C1165 100P_0402_50V8J
1 2
C1166 100P_0402_50V8J
1 2
C1167 100P_0402_50V8J
1 2
C1168 100P_0402_50V8J
1 2
C1169 100P_0402_50V8J
1 2
C1170 100P_0402_50V8J
1 2
C1171 100P_0402_50V8J
1 2
C1172 100P_0402_50V8J
1 2
C1173 100P_0402_50V8J
1 2
C1174 100P_0402_50V8J
1 2
C1175 100P_0402_50V8J
1 2
C1176 100P_0402_50V8J
1 2
C1177 100P_0402_50V8J
1 2
C1178 100P_0402_50V8J
1 2
C1179 100P_0402_50V8J
1 2
4
ON/OFFBTN#
+3VALW
EC_ON<37,38>
EC_ON
D
Q29
2N7002_SOT23@
S
2
4
Q30 DTC124EK_SC59
12
R256
4.7K_0402_5%
13
2
G
SW1
ESE11MV9_4P
1
D27 DAN202U_SC70
1
3
3
3
2
I
2
R262 100K_0402_5%
1 2
ON/OFF#
1
O
G
3
LID_SW# <37,38>
1
2
1000P_0402_50V7K
+3VALW
ON/OFF# <37,38>
EC_PWR_ON# <43>
12
D25
C488
RLZ20A_LL34
WHEN R=0,Vbe=1.35V WHEN R=33K,Vbe=0.8V
2
ON/OFFBTN#
VOLBTN+#<37,38> VOLBTN-#<37,38>
MUTE_LED<30,41>
+5VALW
PAV_LEDVCC<35>
PMLED_1#<37,38> BATLED_0#<37,38>
CIR_IN<37,38,41>
+5VS
SW8 TC010-PS11CET_5PPRES@
2 4
SW6 TC010-PS11CET_5PPAV@
2 4
5
+5VALW
1 2
PMLED_1# BATLED_0# ACT_LED_PAV
1
1 3
5
1 3
Front Board CONNECTOR
Pavilion only
R540
10K_0402_5%@
JP33
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
ACES_85201-1405
ACT_LED#<34>
FOR LPC SIO DEBUG PORT
+5VS
JP25
1
B B
A A
1
2
2
3
3
4
4
5
5
6
6
LPC_AD0
7
7
LPC_AD1
8
8
LPC_AD2
9
9
LPC_AD3
10
10
LPC_FRAME#
11
11
LDRQ0#
12
12
PCI_RST#
13
13
14
14
CLK_PCI_SIO
15
15
16
16
17
17
18
18
19
19
20
20
ACES_85201-2005@
5
+3VS
LPC_AD[0..3] <19,37,38>
LPC_FRAME# <19,37,38>
LDRQ0# <19>
PCI_RST# <19,24,25,27,28,29,37,38>
R440 22_0402_5% @
1 2
SIRQ <19,24,37,38>
R285 10K_0402_5%@
CLK_PCI_SIO_R <19,23>
12
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+5VS
3
2
E
B
Q25 PDTA114EK_SC59
C
1
R231
ACT_LEDACT_LED_PAV
12
300_0402_5%
3
2
PRESARIO only
+3VS +3VS
VOLBTN+# VOLBTN-# MUTE_LED
JP2
1 7 2 8 3 9 4
10
5
11
6
12
ACES_85203-0602
PRESARIO only
+3VALW +3VALW
PRES_LEDVCC<35,38>
+3VS
R229 130_0402_5% PRES@
1 2
PMLED_1# BATLED_0#
ACT_LED
R230 130_0402_5% PRES@
1 2
TP CONNECTOR
TP_DATA<37,38>
TP_CLK<37,38>
Title
Size Document Number Rev
Date: Sheet
+5V
JP35
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
ACES_87213-0800
JP34
8 7 6 5 4 3 2 1
ACES_87152-0807
Compal Electronics, Inc.
KBD,ON/OFF,T/P,LED/B
LA-2421
VOLBTN+# VOLBTN-#
MUTE_LED
1
of
36 56Wednesday, January 05, 2005
Page 37
A
B
C
D
E
+3VALW
123
VCC134VCC245VCC3
PORTJ-2
GND5
122
159
ECAGND
+EC_AVCC
95
136
157
VCC4
166
VCC5
VCC6
AD Input
AVCC
161
IOPE0AD4 IOPE1/AD5 IOPE2/AD6 IOPE3/AD7
DA output
IOPA0/PWM0 IOPA1/PWM1 IOPA2/PWM2 IOPA3/PWM3 IOPA4/PWM4 IOPA5/PWM5 IOPA6/PWM6 IOPA7/PWM7
IOPB0/URXD IOPB1/UTXD
IOPB2/USCLK
IOPB3/SCL1 IOPB4/SDA1
IOPB7/RING/PFAIL/RESET2
IOPC1/SCL2 IOPC2/SDA2
IOPC3/TA1
IOPC4/TB1/EXWINT22
IOPC5/TA2
IOPC6/TB2/EXWINT23
IOPC7/CLKOUT
IOPD0/RI1/EXWINT20 IOPD1/RI2/EXWINT21
IOPD2/EXWINT24/RESET2
IOPE4/SWIN
IOPE5/EXWINT40
IOPE6/LPCPD/EXWIN45
IOPE7/CLKRUN/EXWINT46
IOPH0/A0/ENV0
IOPH1/A1/ENV1 IOPH2/A2/BADDR0 IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
PORTB
PORTD-1
PORTE
PWM or PORTA
PORTC
PORTH
PORTI
PORTJ-1
IOPJ1/WR0
PORTD-2
PORTK
PORTL
AGND
GND6
GND7
96
167
137
GPIO5
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
IOPK2/A10 IOPK3/A11
IOPK4/A12 IOPK5/A13_BE0 IOPK6/A14_BE1
IOPK7/A15_CBRD
IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19
IOPL4/WR1#
NC212NC320NC421NC585NC686NC791NC892NC997NC10
NC1
11
PMLED_1#
GPIO6
C
+3VALW
1
ENE@
0.1U_0402_16V4Z
2
CLK_PCI_EC
EC_RST#
EC_GA20 KB_RST#
EC_TINIT# URXD UTXD
KBD_CLK KBD_DATA PS2_CLK PS2_DATA TP_CLK TP_DATA LID_SW#
CRY1 CRY2
EC_SMI#
VOLBTN+# VOLBTN-#
FSEL#
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7
KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15
KB910_LQFP176ENE@
1
C520
2
7 8
9 15 14 13 10 18 19 22 23
31
5
6
71 72 73 74 77 78 79 80
49 50 51 52 53 56 57 58 59 60 61 64 65 66 67 68
105 106 107 108 109
110 111 114 115 116 117 118 119
158 160
62 63 69 70 75 76
148 149 155 156
3
4 27 28
173 174
47
U26
SERIRQ LDRQ# LFRAME# LAD0 LAD1 LAD2 LAD3 LCLK RESET1# SMI# PWUREQ#
IOPD3/ECSCI#
GA20/IOPB5 KBRST/IOPB6
KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7
KBSOUT0 KBSOUT1 KBSOUT2 KBSOUT3 KBSOUT4 KBSOUT5 KBSOUT6 KBSOUT7 KBSOUT8 KBSOUT9 KBSOUT10 KBSOUT11 KBSOUT12 KBSOUT13 KBSOUT14 KBSOUT15
TINT# TCK TDO TDI TMS
PSCLK1/IOPF0 PSDAT1/IOPF1 PSCLK2/IOPF2 PSDAT2/IOPF3 PSCLK3/IOPF4 PSDAT3/IOPF5 PSCLK4/IOPF6 PSDAT4/IOPF7
32KX1/32KCLKIN 32KX2
IOPJ2/BST0 IOPJ3/BST1 IOPJ4/BST2 IOPJ5/PFS IOPJ6/PLI IOPJ7/BRKL_RSTO
IOPM0/D8 IOPM1/D9 IOPM2/D10 IOPM3/D11 IOPM4/D12 IOPM5/D13 IOPM6/D14 IOPM7/D15
SEL0# SEL1# CLK
16
VDD
Host interface
Key matrix scan
JTAG debug port
PS2 interface
PORTM
GND117GND235GND346GND4
ECAGND<38>
C521
4.7U_0805_6.3V6K@
1 1
EC_RST#<38>
R303
1 2
+3VALW
47K_0402_5%
R301 10K_0402_5%ENE@
KBD_DATA KBD_CLK
R298
R306 10K_0402_5%ENE@
PS2_DATA PS2_CLK
1 2 1 2
10K_0402_5%ENE@
1 2 1 2
+5VS
+5VS
R304 10K_0402_5%ENE@
2 2
3 3
10P_0402_50V8K
32.768KHZ_12.5P_1TJS125DJ2A073
CRY1<38> CRY2<38>
CRY1 CRY2
C543
12
J2 JOPEN
1
2
Y2
1
C513
2
CLK_PCI_EC
12
R305 10_0402_5%
1
C515 10P_0402_50V8K
2
4
OUT
NC3NC
0.1U_0402_16V4Z
EC_GA20<20,38>
KB_RST#<20,38>
KSO[0..15]<36,38>
1
1
2
IN
2
LPC_FRAME#<19,36,38>
LPC_AD0<19,36,38> LPC_AD1<19,36,38> LPC_AD2<19,36,38> LPC_AD3<19,36,38>
CLK_PCI_EC<19,23,38>
KSI[0..7]<35,36,38>
TP_CLK<36,38> TP_DATA<36,38> LID_SW#<36,38>
C544 10P_0402_50V8K
EC_SMI#<20,38>
EC_MUTE#<32,38> EC_SWI#<20,38>
VOLBTN+#<36,38>
VOLBTN-#<36,38>
SYSON<26,38,42,46> SUSP#<26,38,39,42> VR_ON<16,38,50>
SIRQ<19,24,36,38>
KSI[0..7] KSO[0..15]
EC_RSMRST#<20,38>
ENABLT<13,17,38> BKOFF#<17,38>
EC DEBUG port
JP22
1
1
2
2
URXD
3
4 4
3
UTXD
4
4
5
5
6
6
7
7
8
8
9
9
10
10
+5VALW
R270 0_0402_5%@
1 2
R271 0_0402_5%@
1 2
DOCK_VOLBTN-# EC_GPIO16
FSEL#<38,39>
EC_GPIO16 <38>
96212-1011S@
A
B
VBAT
81
AD0
82
AD1
83
AD2
84
AD3
87 88 89 90 93
DP/AD8
94
DN/AD9
99
DA0
100
DA1
101
DA2
102
DA3
32 33 36 37 38 39 40 43
153 154 162 163 164 165
168
IOPC0
169 170 171 172 175 176 1
26 29 30
2 44 24 25
124 125 126 127 128 131 132
IOPH6/A6
133
IOPH7/A7
138
IOPI0/D0
139
IOPI1/D1
140
IOPI2/D2
141
IOPI3/D3
144
IOPI4/D4
145
IOPI5/D5
146
IOPI6/D6
147
IOPI7/D7
150
IOPJ0/RD
151 152
SELIO#
41
IOPD4
42
IOPD5
54
IOPD6
55
IOPD7
143
IOPK0/A8
142
IOPK1/A9
135 134 130 129 121 120
113 112 104 103 48
98
PWR_ACTIVE_PAV#
EC_SCI#
2
C542
1
TP_OFF_LED#
KSO16
EC_SMC_1 EC_SMD_1 PCI_RST#
EC_SMC_2 EC_SMD_2 FAN_SPEED1
ACIN
M_SEN#
KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
FRD# FWR#
SELIO#
KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15
KBA16 KBA17 KBA18 KBA19
1U_0603_10V6KENE@
EC_AC_ID ADP_IR BID
+3VALW
BATT_TEMP <38,52>
EC_AC_ID <38,44> BATT_OVP <38,44>
PRES_DETECT <38> BID <38> WIRELESS_BTN# <35,38> DOCK_VOLBTN-# <38,41>
DAC_BRIG <17,38> EN_FAN1 <4,38> IREF <38,44> EN_FAN2 <4,38>
INVT_PWM <17,38>
VDDA_EN <6,38>
VLDT_EN <38,40>
ACOFF <38,44> EC_ON <36,38>
LID_OUT# <20,38> TP_OFF_LED# <35,38>
1 2
C504 0.01U_0402_16V7K
ECAGND
KSO16 <35,38>
EC_SMC_1 <38,39,52> EC_SMD_1 <38,39,52> PCI_RST# <19,24,25,27,28,29,36,38>
PWRBTN_OUT# <20,38> EC_SMC_2 <6,38> EC_SMD_2 <6,38> FAN_SPEED1 <4,38> PME_EC# <28,29,38> EC_THERM# <20,38> FAN_SPEED2 <4,38>
ACIN <38,43,45> CIR_IN <36,38,41> SLP_S3# <20,38>
ON/OFF# <36,38> SLP_S5# <20,38> M_SEN# <18,38>
CONA# <38,41>
ADB[0..7] KBA[0..19]
FRD# <38,39> FWR# <38,39>
ADB[0..7] <38,39> KBA[0..19] <38,39>
SELIO# <38>
DOCK_VOLBTN+# <38,41>
CAPSLED# <35,38> NUMLED# <35,38>
FSTCHG <38,44>
PWR_ACTIVE_PRES# <35,38>
BATLED_0# <36,38>
PWR_ACTIVE_PAV# <35,38> PMLED_1# <36,38> EC_SCI# <20,38>
D
R278
1 2
1
C489
2
ADP_IR <38>
10K_0402_5%
ADP_I <44>
0.22U_0603_10V7K
+3VALW
KBA1
KBA3
KBA5
1 2
R310 10K_0402_5%@
1 2
R311 10K_0402_5%@
1 2
R314 10K_0402_5%ENE@
12
R269 1K_0402_5%
fu@
BID
12
R274 1K_0402_5%
de@
+3VALW
12
R292
10K_0402_5%ENE@
EC_TINIT# GPIO5 GPIO6
12
12
R313
10K_0402_5%ENE@
Title
Size Document Number Rev
Date: Sheet
R312
10K_0402_5%ENE@
Compal Electronics, Inc.
KBD EC CTRL -NS P C87591L
LA-2421
of
37 56Wednesday, January 05, 2005
E
Page 38
A
B
C
D
E
+3VALW
+3VALW
1 1
12
R302
PCI_RST#
1
C490
4.7U_0805_6.3V6K
2
1 2
FBML10160808121LMT_0603
0.1U_0402_16V4Z
L26
1 2
FBML10160808121LMT_0603
1
C491
2
0.1U_0402_16V4Z
L25
2
C497
1
ECAGND
10K_0402_5%
CLK_PCI_EC
12
R307 10_0402_5%@
2 2
1
2
12
C517 15P_0402_50V8J@
SUSP#
R319 10K_0402_5%
LID_SW#
+3VS
+5VALW
1 2
R297 20K_0402_5%
1 2
R295 4.7K_0402_5%
1 2
R277 10K_0402_5%
1 2
R276 10K_0402_5%
1 2
R282 10K_0402_5%
1 2
R283 10K_0402_5%
RP58
PME_EC#
VOLBTN+#
VOLBTN-#
DOCK_VOLBTN+#
DOCK_VOLBTN-#
EC_SMD_2
18
EC_SMC_2
27
EC_SMD_1
36
EC_SMC_1
45
+3VALW
+3VALW
3 3
10K_0804_8P4R_5%
+3VALW
RP57
18 27 36 45
FSEL#
SELIO#
FRD#
EC_SMI#
1
C499 1000P_0402_50V7K
@ 2
EC_RST#<37>
1
C535
0.1U_0402_16V4Z
2
+EC_AVCC
KSO[0..15]<36,37>
SIRQ<19,24,36,37>
KSI[0..7]
1
C509
0.1U_0402_16V4Z
2
EC_GA20 KB_RST#
CLK_PCI_EC EC_RST#
EC_SCI#
VOLBTN+#
VOLBTN-#
EC_SMD_2 EC_SMC_2 EC_SMD_1 EC_SMC_1
PMLED_1#
TP_OFF_LED#
EC_SMI# LID_SW#
SUSP#
CRY1 CRY2
U25
1
GA20/ GPIO00/GA20
2
KBRST#/GPIO01/KBRST#
3
SERIRQ
5
LPC_FRAME# / LFRAME#
6
LPC AD3/LAD3
9
LPC AD2/LAD2
10
LPC AD1/LAD1
12
LPC AD0/LAD0
14
CLK_PCI_EC/PCICLK
15
PCIRST#
42
EC RST#/ ECRST#
24
EC SCI#/SCI#/GPIO0E
44
PM_CLKRUN#/ CLKRUN#
KSI0
63
KSI0/GPIO30
KSI1
64
KSI1/GPIO31
KSI2
65
KSI2/GPI032
KSI3
66
KSI3/GPIO33
KSI4
67
KSI4/GPIO34
KSI5
68
KSI5/GPI035
KSI6
69
KSI6/GPIO36
KSI7
70
KSI7/GPIO37
KSO0
47
KSO0/GPIO20
KSO1
48
KSO1/GPIO21
KSO2
49
KSO2/GPIO22
KSO3
50
KSO3/GPIO23
KSO4
51
KSO4/GPIO24
KSO5
52
KSO5/GPIO25
KSO6
53
KSO6/GPIO26
KSO7
54
KSO7/GPIO27
KSO8
55
KSO8/GPIO28
KSO9
56
KSO9/GPIO29
KSO10
57
KSO10/GPIO2A
KSO11
58
KSO11/GPIO2B
KSO12
59
KSO12/GPIO2C
KSO13
60
KSO13/GPIO2D
KSO14
61
KSO14/GPIO2E
KSO15
62
KSO15/GPIO2F
KSO16
89
EC URXD/KSO16/GPIO48
90
EC UTXD/KSO17/GPIO49
88
EC SMD2/ GPIO47/SDA2
87
EC SMC2/GPIO46/SCL2
86
EC SMD1/GPIO44/SDA1
85
EC SMC1/GPIO44/SCL1
34
PCM_SPK#/EMAIL_LED#/ GPIO16
35
SB_SPKR/PWR_SUSP_LED#/ GPIO17
38
PWRLED#/ GPIO19
40
NUMLED#/ GPIO1A
99
BATT CHGI LED#/ E51CS#
101
BATT LOW LED#/ E51MR0
100
CAPS LED#/ E51TMR1
102
ARROW LED#/ E51 INT0
104
SYSON/GPIO56/ E51 INT1
4
EC_RSMRST#/ GPIO02
7
BKOFF#/GPIO03
8
PM SLP S3#/GPIO04
16
EC LID OUT#/GPIO06
17
PM SLP S05#/ GPIO07
18
EC SMI#/GPIO08
19
EC SWI#/GPIO09
20
LID SW#/ GPIO0A
21
SUSP#/GPIO0B
22
PBTN_OUT#/GPIO0C
23
EC PME#/GPIO0D
140
XCLKO
138
XCLKI
KB910L_LQFP144910L@
Host
INTERFACE
key Matrix
scan
+3VALW
+EC_AVCC
11
26
105
127
141
VCC
VCC
VCC/ EC VCC
VCC / EC VCC
VCC / EC VCC37VCC / EC VCC
PWR
FAN/PWM
INVT_PWM/GPIO0F/PWM1
OUT BEEP/GPIO12/PWM3
FAN SPEED1/GPIO14/FANFB1 FAN SPEED2/GPIO15/FANFB2
PS2 interface
Address
SM BUS
GND13GND28GND
GND
GND
GND
39
103
129
139
75
BATTEMP/AD0/GPIO38 BATT OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
AD BID0/AD3/GPIO3B
AD INtput or GPI
EC_AVCC / AVCC DAC_BRIG/DA0/GPIO3D
EN DFAN1/DA1/GPIO3D
IREF2/DA2
EN DFAN2/DA3/ GPIO3F
DA output or GPO
BEEP#/GPIO10/PWM2
ACOFF/GPIO18/PWM4
PSCLK1 PSDAT1 PSCLK2 PSDAT2 PSCLK3 PSDAT3
ADB0/D0 ADB1/D1
Data BUS
BUS
ADB2/D2
ADB3/ D3
ADB4/D4 ADB5/D5 ADB6/D6 ADB7/D7 KBA0/A0 KBA1/A1 KBA2/A2 KBA3/A3 KBA4/A4 KBA5/A5 KBA6/A6 KBA7/A7 KBA8/A8
KBA9/A9 KBA10/A10 KBA11/A11 KBA12/A12 KBA13/A13 KBA14/A14 KBA15/A15 KBA16/A16 KBA17/A17 KBA18/A18 KBA19/A19
SELIO2#/ GPIO43
SELIO#/ GPIO50
FRD#/RD#
FWR#/WR#
FSEL#/SELMEM#
EC ON/ GPIO1B
AC IN/ GPIO1C
ECTHERM#/GPIO11
ONOFF/GPIO18
PCMRST#/GPIO1E
WL OFF#/GPIO1F
ALI/MH#/GPIO40
FSTCHG/GPIO41
VR ON/ GPIO42 GPIO57/GPIO57 GPIO58/GPIO58 GPIO59/GPIO59
AGND
77
ECAGND
71 72 73 74
76 78 79 80
25 27
VLDT_EN
30 31 32 33
WIRELESS_BTN#
91
PRES_DETECT
92
PWR_ACTIVE_PAV#
93 94 95 96
ADB0
125
ADB1
126
ADB2
128
ADB3
130
ADB4
131
ADB5
132
ADB6
133
ADB7
134
KBA0
111
KBA1
112
KBA2
113
KBA3
114
KBA4
115
KBA5
116
KBA6
117
KBA7
118
KBA8
119
KBA9
120
KBA10
121
KBA11
122
KBA12
123
KBA13
124
KBA14
110
KBA15
109
KBA16
108
KBA17
107
KBA18
106
KBA19
98 84
SELIO#
97
FRD#
135
FWR#
136
FSEL#
144 41
43 29 36
VDDA_EN
45 46
81 82 83
M_SEN#
137 142 143
ECAGND <37>
ADP_IR EC_AC_ID
CONA#
TP_CLK TP_DATA
BID
BATT_TEMP <37,52> BATT_OVP <37,44> ADP_IR <37> EC_AC_ID <37,44>
DAC_BRIG <17,37> EN_FAN1 <4,37> IREF <37,44> EN_FAN2 <4,37>
INVT_PWM <17,37> CONA# <37,41> VLDT_EN <37,40>
ACOFF <37,44>
FAN_SPEED1 <4,37>
FAN_SPEED2 <4,37>
WIRELESS_BTN# <35,37>
PWR_ACTIVE_PAV# <35,37> DOCK_VOLBTN+# <37,41>
TP_CLK <36,37>
TP_DATA <36,37>
ADB[0..7] KBA[0..19]
BID <37> SELIO# <37> FRD# <37,39> FWR# <37,39>
FSEL# <37,39>
EC_ON <36,37> ACIN <37,43,45> EC_THERM# <20,37> ON/OFF# <36,37>
VDDA_EN <6,37>
ENABLT <13,17,37>
FSTCHG <37,44>
M_SEN# <18,37> CIR_IN <36,37,41>
EC_MUTE# <32,37>
12
ADB[0..7] <37,39> KBA[0..19] <37,39>
R320
10K_0402_5%
PRES_DETECT <37>
VR_ON <16,37,50>
TP_DATA TP_CLK
R309 10K_0402_5%
1 2 1 2
R308 10K_0402_5%
+5V
Check ENE
R272
1 2
6.2K_0402_5%
12
R275
10K_0402_5%
PRES_LEDVCC <35,36>
1
C534
2
0.01U_0402_16V7K
EC_GA20<20,37>
KB_RST#<20,37>
LPC_FRAME#<19,36,37>
LPC_AD3<19,36,37> LPC_AD2<19,36,37> LPC_AD1<19,36,37> LPC_AD0<19,36,37>
CLK_PCI_EC<19,23,37>
PCI_RST#<19,24,25,27,28,29,36,37>
EC_SCI#<20,37>
VOLBTN+#<36,37>
KSI[0..7]<35,36,37>
KSO16<35,37>
PWR_ACTIVE_PRES#<35,37>
KSO[0..15]
VOLBTN-#<36,37>
EC_SMD_2<6,37> EC_SMC_2<6,37> EC_SMD_1<37,39,52> EC_SMC_1<37,39,52>
EC_GPIO16<37>
DOCK_VOLBTN-#<37,41>
PMLED_1#<36,37>
NUMLED#<35,37>
BATLED_0#<36,37>
CAPSLED#<35,37>
TP_OFF_LED#<35,37>
SYSON<26,37,42,46>
EC_RSMRST#<20,37>
BKOFF#<17,37>
SLP_S3#<20,37>
LID_OUT#<20,37>
SLP_S5#<20,37> EC_SMI#<20,37>
EC_SWI#<20,37>
LID_SW#<36,37>
SUSP#<26,37,39,42>
PWRBTN_OUT#<20,37>
PME_EC#<28,29,37>
CRY1<37> CRY2<37>
10K_0804_8P4R_5%
4 4
+3VS
R299
1 2
10K_0402_5%@
M_SEN#
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
KBD EC CTRL-KB910L
LA-2421
of
38 56Wednesday, January 05, 2005
E
Page 39
ADB[0..7]<37,38>
KBA[0..19]<37,38>
ADB[0..7] KBA[0..19]
C516
6
KBA16 KBA15 KBA14 KBA13 KBA12 KBA11 KBA9 KBA8 FWE# RESET#
KBA18 KBA7 KBA6 KBA5
KBA3 KBA1
+3VALW
1
2
O
U36
KBA18
1
A18
KBA16
2
A16
KBA15
3
A15
KBA12
4
A12
KBA7
5
A7
KBA6
6
A6
KBA5
7
A5
KBA4
8
A4
KBA3
9
A3
KBA2
10
A2
KBA1
11
A1
KBA0
12
A0
ADB0
13
DQ0
ADB1
14
DQ1
ADB2
15
DQ2
16
VSS
SST39VF040-70-4C-NH_PLCC32
KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7 KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15 KBA16 KBA17 KBA18 KBA19
FSEL#<37,38>
FRD#<37,38>
FSEL# FRD# FWE#
U39
21
A0
20
A1
19
A2
18
A3
17
A4
16
A5
15
A6
14
A7
8
A8
7
A9
36
A10
6
A11
5
A12
4
A13
3
A14
2
A15
1
A16
READY/BUSY#
40
A17
13
A18
37
A19
22
CE#
24
OE#
9
WE#
SST39VF080-70_TSOP40@
VCC0 VCC1
GND0 GND1
RP#
NC0 NC1
32
VDD
FWE#
31
WE#
D0 D1 D2 D3 D4 D5 D6 D7
NC
OE# CE#
DQ7 DQ6 DQ5 DQ4 DQ3
KBA17
30
A17
KBA14
29
A14
KBA13
28
A13
KBA8
27
A8
KBA9
26
A9
KBA11
25
A11
FRD#
24
KBA10
23
A10
FSEL#
22
ADB7
21
ADB6
20
ADB5
19
ADB4
18
ADB3
17
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
RESET#
+3VALW
31 30
25 26 27 28 32 33 34 35
10 11 12 29 38
23 39
2
1
1 2
R169 100K_0402_5% @
+3VALW
C203
0.1U_0402_16V4Z
0.1U_0402_16V4Z
FWE#
+3VALW
+3VALW
12
R316 10K_0402_5%
14
U24B
4
P
A
5
B
G
SN74LVC32APWLE_TSSOP14
7
JP27
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
SUYIN-80065A-040G2T@
SUSP# <26,37,38,42>
2
G
1 3
D
S
Q31 2N7002_SOT23
KBA17
KBA19 KBA10 ADB7 ADB6 ADB5 ADB4
ADB3 ADB2 ADB1 ADB0 FRD#KBA4
FSEL#KBA2 KBA0
+3VALW
EC_FLASH# <20>
FWR# <37,38>
C538
0.1U_0402_16V4Z
EC_SMC_1<37,38,52> EC_SMD_1<37,38,52>
+3VALW+3VALW
1
2
U29
8
VCC
7
WP
6
SCL
5
SDA
GND
AT24C16AN-10SI-2.7_SO8
12
R326 100K_0402_5%
1
A0
2
A1
3
A2
4
12
R329 100K_0402_5%
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
BIOS & EC I/O Port
LA-2421
of
39 56Wednesday, January 05, 2005
0.6
Page 40
5
D D
VLDT_EN<37,38> SB_PWRGD <20>
C C
VLDT_EN
+3VALW
VLDT_EN VLDT_EN#
11
4
R30
1 2
470K_0402_5%
12
R32 10K_0402_5%
14
P
O10I
G
U1E
SN74LVC14APWLE_TSSOP14
7
1
2
+3VALW
14
1
7
C25
0.1U_0402_16V4Z
VLDT_EN# <48>
2
C24
0.1U_0402_16V4Z
1
P
O2I
G
U1A
SN74LVC14APWLE_TSSOP14
3
+3VALW +3VALW +3VALW
14
P
3
O4I
G
U1B
SN74LVC14APWLE_TSSOP14
7
R33
1 2
200K_0402_5%
1
2
NB_PWRGD <13>
note:T1 minimum 15ms,T2 minimum 33ms/maximum 500ms, SUSP# goes to low after SB_PWRGD goes to low for power down.
T1
14
5
7
C29
0.47U_0603_16V7K
P
O6I
G
U1C
SN74LVC14APWLE_TSSOP14
VLDT_EN
NB_PWRGD
SB_PWRGD
T2
14
P
9
O8I
G
U1D
SN74LVC14APWLE_TSSOP14
7
2
R36
1 2
10_0402_5%
1
SUSP#
+1.8VS
B B
+3VALW +3VALW
14
10
U33C
8
OE#
I9O
SN74LVC125APWLE_TSSOP14
13
U33D
11
OE#
I12O
SN74LVC125APWLE_TSSOP14
A A
5
U24C
9
P
A
O
10
B
G
SN74LVC32APWLE_TSSOP14
7
+3VALW
14
U24D
12
P
A
O
13
B
G
SN74LVC32APWLE_TSSOP14
7
8
11
4
14
U24A
1
P
A
O
2
B
G
SN74LVC32APWLE_TSSOP14
7
+3VALW
14
P
13
O12I
G
SN74LVC14APWLE_TSSOP14
7
3
U1F
Compal Electronics, Inc.
Title
THIS SHEET OF E NGI NEER ING DR AWI NG I S T HE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONIC S, INC. AND C ONTAINS CONFID ENTIAL
AND TRADE S ECR ET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Power OK/Reset Conn.& MUTE Switch
Size Document Number Re v
LA-2421
Custom Date: Sheet
1
of
40 56Wednesday, January 05, 2005
0.6
Page 41
A
1 1
MDO3+<28> MDO3-<28> MDO1+<28>
R90 22_0402_5%
SPDIFO<30>
SB_SPDIFO<20,23>
2 2
1 2
R93 22_0402_5%@
1 2
MDO1-<28>
MUTE_LED<30,36>
XTPA1+<27> XTPA1-<27> XTPB1+<27> XTPB1-<27>
SPDIFO_L
+5VS
DOCKVIN
JACK_DET#
R1063
1 2
100_0402_5%
DOCK_PRESENT
B
JP6
1
2
1
3
4
3
5
6
5
7
8
7
9
10
9
11
12
11
13
14
13
15
16
15
17
18
17
19
20
19
21
22
21
23
24
23
25
26
25
27
28
27
29
30
29
31
32
31
33
34
33
35
36
35
37
38
37
39
40
39
41
42
41
43
44
43
45
46
45
47
48
47
49
50
49
51
52
51
53
54
53
55
56
55
57
58
57
59
GND
GND
FOX_QL11293-H212C1-TR
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60
DOCK_PRES_GND
DOCK_LOUT_R DOCK_LOUT_L
USBP1­USBP1+ AC_ID
MDO2+ <28> MDO2- <28> MDO0+ <28> MDO0- <28>
DOCK_MIC <32>
DOCK_LOUT_R <32> DOCK_LOUT_L <32>
USBP1- <20>
USBP1+ <20>
AC_ID <43,44>
TV_COMPS <13,18> TV_LUMA <13,18> TV_CRMA <13,18>
CIR_IN <36,37,38>
+5V+5V
V_Bat <44>
DOCKVIN
1 2
R71
1K_0402_5%
C
C176
1000P_0402_50V7K
1
1000P_0402_50V7K
2
1
2
R83 200_0402_5%
1 2
C185
R78200_0402_5%
12
D
DOCK_VOLBTN+# <37,38>
DOCK_VOLBTN-# <37,38>
CONA#<37,38>
DOCK_PRESENT
DOCK_PRES_GND
+3VALW
2
12
R79 10K_0402_5%
Q11 MMBT3904_SOT23
3 1
E
+5VS
JACK_DET#
+5VS
12
100K_0402_5%
R1126
2
G
12
R1125 100K_0402_5%
13
D
S
D
JACK_DET
Q42
2N7002_SOT23
JACK_DET <32>
Title
Size Document Number Rev Custom
Date: Sheet
Compal Electronics, Inc.
SPR Connector
LA-2421
41 56Wednesday, January 05, 2005
E
of
3 3
Note: PLACE CLOSE TO SPR PORT (JP33)
L
L27
1 2
KC FBM-L18-453215-900LMA90T_1812
1
C73 1000P_0402_50V7K
2
4 4
A
DOCKVINDC_ IN
1
C149 1000P_0402_50V7K
2
+5V
10U_0805_10V4Z
1
1
C166
0.1U_0402_16V4Z
B
C174
2
1
C165
2
1000P_0402_50V7K@
2
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Page 42
A
B
C
D
E
F
G
H
I
J
+12VALW
12
R206
1 1
SYSON#
2N7002_SOT23
100K_0402_5%
0.01U_0402_16V7K
12
13
D
2
G
Q18
R207
S
1M_0402_5%
2 2
+5VALW to +5V Transfer
+5VALW
1
C322
2
+5VALW +5VALW
1
C328
4.7U_0805_10V4Z
2
U13
8
D
7
D
6
D
5
D
SI4800DY_SO8
SUSON
+5V
1
C329 22U_1206_10V4Z
2
0.1U_0402_16V4Z
1
C366
2
12
R211 470_0402_5%
13
D
Q19
S
2N7002_SOT23
G
2
SYSON#
1
S
2
S
3
S
4
G
1
+
C315
33U_D2_8M_R35@
2
+2.5V +2.5VS
U34
8
S
D
7
S
D
6
S
D
5
G
D
SI4800DY_SO8
1
C607 10U_0805_10V4Z@
2
+2.5V to +2.5VS Transfer
1 2 3
1
4
C596 22U_1206_10V4Z
2
RUNON
0.1U_0402_16V4Z
1
C593
2
12
13
D
S
R391 470_0402_5%
SUSP
2
G
Q33 2N7002_SOT23
SUSP<45,48,49> SYSON#<47>
2N7002_SOT23
SUSP
Q17
2
G
+12VALW
12
13
D
S
+1.25V
12
13
D
S
R24 10K_0402_5%
Q9 2N7002_SOT23
R201 470_0402_5%
SYSON#
2
G
SYSON<26,37,38,46>SUSP#<26,37,38,39>
2N7002_SOT23
SYSON#
2
G
Q36
+12VALW
12
13
D
S
+2.5V
12
13
D
S
R22 47K_0402_5%
Q8 2N7002_SOT23
R487 470_0402_5%
SYSON#
2
G
3 3
+5V
1
1000P_0402_50V7K
2
+12VALW
2
G
Q22
+3VS
1
1000P_0402_50V7K
2
C1180
12
R224 100K_0402_5%
13
D
S
1M_0402_5%
1
+
C160 100U_D2_10VM
2
C1138
1
1000P_0402_50V7K
2
0.01U_0402_16V7K
12
R534
+3VALW +3VS
1
C1139
1000P_0402_50V7K
2
+1.8VS
C1181
1
C422
2
4.7U_0805_10V4Z
U30
8
D
7
D
6
D
5
D
SI4800DY_SO8
1
C545 10U_0805_10V4Z
2
+1.8VALW
1
C1143
1000P_0402_50V7K
2
+3VALW
4 4
5 5
SUSP
2N7002_SOT23
6 6
7 7
8 8
A
+1.8VALW
1
C1140
1000P_0402_50V7K
2
1
1000P_0402_50V7K
2
+5VALW to +5VS Transfer
S S S G
+5VALW
1
2
+5VS
1 2 3 4
1
2
+
C419 100U_D_16VM@
+5VALW
C416
U15
8
D
7
D
6
D
5
D
SI4800DY_SO8
RUNON
+5VALW
1
2
+3VALW to +3VS Transfer
1
C567 22U_1206_10V4Z
2
0.1U_0402_16V4Z
1
S
2
S
3
S
4
G
RUNON
B
C1141
22U_1206_10V4Z
C415
0.1U_0402_16V4Z
12
1
C554
2
13
D
S
C
1
C1142
1000P_0402_50V7K
2
1
C417
2
R338 82_0402_5%
SUSP
2
G
Q32 2N7002_SOT23
12
R220 470_0402_5%
13
D
S
1
C1144
1000P_0402_50V7K
2
+1.8VS
SUSP
2
G
Q38 2N7002_SOT23
D
+1.8VALW
1
C1145
1000P_0402_50V7K
2
1000P_0402_25V8K@
+1.8VALW
U40
8
D
7
D
6
D
5
D
SI4800DY_SO8
1
C643 10U_0805_10V4Z
2
0.01U_0402_16V7K
1
C1146
1000P_0402_50V7K
2
+3VALW
1
C1067
2
1000P_0402_50V7K
+3VALW +3VS
1
C1070
2
+1.8VS
1
S
2
S
3
S
4
G
2
C645
1
1
C1147
1000P_0402_50V7K
2
+5VALW
1000P_0402_50V7K
1
C1068
2
+3VS
1
C1071 1000P_0402_25V8K@
2
1000P_0402_25V8K@
+1.8VALW to +1.8VS Transfer
0.1U_0402_16V4Z
1
C631 22U_1206_10V4Z
2
R485
RUNON
12
22K_0402_5%
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
E
+5VALW
1
C1148
1000P_0402_50V7K
2
For EMI request
1
1
C1073
C1072
1000P_0402_25V8K@
2
2
12
1
C642
R144 470_0402_5%
2
13
D
S
F
+3VALW
SUSP
2
G
Q15 2N7002_SOT23
1
C1149
1000P_0402_50V7K
2
+3VS
1
C1151
1000P_0402_50V7K
2
CF5
CF2
G
1
H1 HOLEA
H11 HOLEA
H21 HOLEA
FM1
CF9
1
CF3
1
1
1
1
1
C1152
1000P_0402_50V7K
2
FM2
1
1
CF7
CF11
1
1
1
CF4
CF10
1
1
1
H3
H2
HOLEA
HOLEA
1
H12
H13
HOLEA
HOLEA
1
H22
H23
HOLEA
HOLEA
1
1
C1154
1000P_0402_50V7K
2
+3VALW
FM3
1
CF13
CF14
1
CF12
1
H4 HOLEA
1
H14 HOLEA
1
H24 HOLEA
1
H
+3VS
1
C1153
1000P_0402_50V7K
2
B+
FM6
FM4
1
CF1
CF6
CF8
1
1
1
H5 HOLEA
1
1
H15 HOLEA
1
1
H25 HOLEA
1
1
Compal Electronics, Inc.
Title
DC/DC Circuit
Size Document Number Rev
LA-2421
Custom Date: Sheet
1
1
H6 HOLEA
1
FM5
H17 HOLEA
1
1000P_0402_50V7K
2
H7 HOLEA
1
H18 HOLEA
1
H27 HOLEA
1
I
C1155
1
H8 HOLEA
1
H19 HOLEA
H28 HOLEA
H9
H10
HOLEA
HOLEA
1
1
H20 HOLEA
1
1
H30
H29
HOLEA
HOLEA
1
1
1
of
42 56Wednesday, January 05, 2005
J
0.6
Page 43
A
B
C
D
E
PJP12
3
GND1
5
1 1
2 2
3 3
4 4
GND2
FOX_JPD105L-W12-TR
ADPGND
3.3V
CHGRTC
SINGAL
PWR1
PWR2
EC_PWR_ON#<36>
PR20
1 2
200_0603_5%
+5VALWP
+12VALWP
+1.8VALWP
1
2
4
VMB
CHGRTCP
1 2
200_0603_5%
A
AC_ID <41,44>
ADPIN
100P_0402_50V8K
DC_IN
PD3
RB751V_SOD323
1 2
PR14
22K_0402_5%
PR21
PC1
RTCVREF
12
PJP1 3MM
PJP4 3MM
PJP6
2MM
PJP8 3MM
12
PD2
12
1N4148_SOD80
12
12
PR12
100K_0402_5%
G920AT24U_SOT89
PC14 10U_0805_6.3V6M
21
21
21
21
PC8
PU2
3
+12VALW
PR8
47_1206_5%
1 2
12
0.22U_1206_25V7K
OUT
+3VALW
+5VALW
+1.8VALW
PL1
FBM-L18-453215-900LMA90T_1812
1 2
12
PC2 1000P_0402_50V7K
2
2
IN
GND
1
+2.5VP
+1.2V_HTP
+1.25VP
100P_0402_50V8K
PQ1
TP0610K_SOT23
13
CHGRTCP
12
PR18 200_0805_5%
12
PC13 1U_0805_25V4Z
B
PC3
VS
12
PC9
0.1U_0603_50V4Z
PJP2 3MM
PJP5 3MM
PJP14
3MM
PJP7 3MM
Vin Detector
18.202 17.841 17.481
17.568 17.210 16.858
12
PC6
0.047U_0603_16V7K
DC_IN
VL
5V
PD23
2 3
RB715F_SOT323
21
+1.5VS
+12VS_FAN
21
C
DC_IN
12
PR2
82.5K_0603_0.1%
12
PR6
19.6K_0603_0.1%
PD4
1N4148_SOD80
PR16
10K_0402_5%
1 2
1
PR5
22K_0402_1%
1 2
12
12
PC7
PR1
1M_0402_1%
1 2
VS
12
PC5
8
P
+
O
-
G
PU1A
4
LM393M_SO8
12
1 2
1 2
1 2
PR17
1M_0402_1%
PU1B LM393M_SO8
8
5
P
+
6
-
G
4
PR23
10K_0402_5%
D
0.01U_0402_50V4Z
1
RTCVREF
PR10
1.5K_1206_5%
PR11
1.5K_1206_5%
PR13
1.5K_1206_5%
12
12
12
RLZ4.3B_LL34
PC11
3 2
1000P_0402_50V7K
PC12
VS1
0.1U_0402_16V7K
10K_0402_5%
7
12
VL
PR9
O
5V
PD1
0.01U_0402_16V7K
DTC115EUA_SC70
DC_IN
12
PR3
3.2V
12
12
PR22 499K_0402_1%
13
D
G
PQ2
S
2N7002_SOT23
Title
Size Document Number Rev
Date: Sheet
10K_0805_1%
2
PQ3
Detector
PR4
10K_0402_5%
1 2
PACIN
12
PR7 10K_0402_5%
12
12
PR24
47K_0402_5%
1
O
G3I
2
Compal Electronics, Inc.
12
PC4 1000P_0402_50V7K
DC_IN
12
MAINPWON<45,52>
ACON<44>
ACIN
Precharge detector
16.421 15.817 15.229
14.108 13.657 13.002
PJP3
21
+2.5V+3VALWP
21
+1.2V_HT
21
21
+1.25V
+1.5VSP
+12VSP_FAN
3MM
PJP9
2MM
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Detector
ACIN < 3 7 , 38,45>
PACIN <44>
PR15 432K_0402_1%
PR19 499K_0402_1%
PACIN
12
E
B+
12
+5VALWP
PC10
1000P_0402_50V7K
of
43 55Thursday, January 06, 2005
Page 44
A
B
C
D
E
PR25
0_0402_5%
V_Bat<41>
Iadp=0~6.0A
12
174K_0603_1%
8 7
5
ADP_I<37>
PR37
10K_0402_1%
1 2
PR43
P3
12
PR26
0.01_2512_1%(1W)
1.2V
12
PR35
31.6K_0603_1%
12
PC25
0.1U_0402_10V6K
12
PR46
100K_0402_1%
12
VREF
5.0V
12
P2
1 2 36
2
G
12
PR29
200K_0402_5%
12
PR36 150K_0402_5%
13
D
PQ12 2N7002_SOT23
S
PQ5 AO4407_SO8
1 2 3 6
4
12
PC18
0.22U_0805_16V7K_V2
PC22
0.1U_0402_16V4Z
IREF<37,38>
8 7
5
DTA144YKA_SOT23
15K_0402_5%
I
2
PQ11 2N7002_SOT23
ACOFF#
PACIN<43>
PQ4 AO4407_SO8
PQ7
2
1
O
G
3
1 2
1 2
4
47K
10K
1 3
PQ9 DTC115EUA_SC70
PD7
1SS355_SOD323 PR40
3K_0402_5%
1 1
DC_IN
12
PD6
1 2 12
PR30
1K_0402_5%
PR33 47K_0402_1%
1 2
12
PC20
2 2
0.1U_0603_25V7K
1SS355_SOD323
2
PR27
13
D
G
S
ACON < 43>
IREF=1.113*Icharge IREF=0.373~3.3V
1 2
PR34
47K_0402_1%
1 2
PC23
4700P_0402_25V7K_A34
1 2
PC26
1500P_0402_50V7K
PR44
10K_0402_1%
PC32
0.1U_0402_10V6K
12
PR38
1 2
1K_0402_1%
1 2
PR39 1K_0402_1%
12
PU3
1
-INC2
2
OUTC2
3
+INE2
4
-INE2
5
FB2
6
VREF
7
FB1
8
-INE1
9
+INE1
10
OUTC1
11
OUTD
12
-INC1
MB3887_SSOP24
B+
+INC2
GND
VCC(o)
OUT
VCC
-INE3
FB3
CTL
+INC1
C8B BPH 853025_2P
1 2
24
23
22
CS
21
20
0.1U_0603_50V4Z
19
VH
18
17
RT
16
15
14
13
PL2
CS
PC24
1 2
1 2
PR41 68K_0402_1%
PR45 47K_0402_1%
1 2
1
2
12
PR31 0_0402_5%
1 2
1 2
1 2
PC28 1500P_0402_50V7K
1 2
ACON
12
PC15
PC16
10U_1206_25V6M
4.7U_1206_25V6K
PC19
2200P_0402_25V7K
PC21
0.1U_0603_50V4Z
PC27
0.1U_0603_50V4Z
B++
PQ6 AO4407_SO8
1 2 1
O
G3I
1 2 3 6
4
1 2
PR28
47K_0402_5%
PR32 10K_0402_5%
2
CC=0(0.5A) ~ 3A CV=16.8V (12 CELLS)
BATT+
PC29
4.7U_1206_25V6K
12
PC17
36
241
@2200P_0402_50V7K
578
PD8 SKS30-04AT_TSMA
2 1
PQ8 SI4835BDY_SO8
LXCHRG
1 2
PL3
15U_PLC1045-150_3.2A_20%
ACOFF#
PQ10
DTC115EUA_SC70
0.02_2512_1%
1 2
PR42
8 7
5
ACOFF <37,38>
12
12
PC30
4.7U_1206_25V6K
Charger
DC_IN
BATT+
12
PC31
4.7U_1206_25V6K
3 3
OVP voltage : LI-MH 12 CELL(4S3P)
BATT+
BATT+ : 18.0V--> BATT_OVP : 2.0V (BATT_OVP voltage = 0.1109*BATT+)
12
PR50 340K_0402_1%
12
PR53 499K_0402_1%
PU4B
4 4
BATT_OVP<37,38>
12
PC38
@0.1U_0402_16V7K
12
PR56
2.2K_0402_5%
A
7
0
5
+
6
-
LM358A_SO8
12
PR57 105K_0603_0.5%
B
12
EC_AC_ID< 37,38>
PC37
0.01U_0402_50V4Z
12
PC35
@0.1U_0402_16V7K
PR54
@2.2K_0402_5%
12
PR211
1 2
@0_0402_5%
12
PR47
49.9K_0603_0.1%
PR194
1 2
0_0402_5%
VL
12
8
PU4A
3
P
+
1
0
2
-
G
LM358A_SO8
4
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
PC34
0.1U_0603_50V4Z
1 2
PR52
@0_0402_5%
4.2V
AC_ID<41,43>
PR49
8.25K_0603_1%
PR55
2K_0603_1%
12
12
PR48
150K_0603_0.1%
1 2
PC33
22P_0402_50V8J
12
PC36
0.01U_0402_50V4Z
12
FSTCHG <37,38>
D
+3VALWP
12
1
I
2
PR51 47K_0402_5%
O
PQ14 DTC115EUA_SC70
G
3
Title
Size Document Number Rev
Date: Sheet
CS
13
D
PQ13
2
2N7002_SOT23
G
S
Compal Electronics, Inc.
Charger
E
of
44 55Wednesday, January 05, 2005
Page 45
A
B
C
D
E
+3.3V/+5V/+12V
B+
PC39
4.7U_1206_25VFZ
1 2
1 1
2 2
12
@
PR64
0_1206_5%
3 3
PQ18
SI3455DV_TSOP6
4 5
12
@
@
PR86
47K_0402_5%
D
4 4
2N7002_SOT23
PQ19
S
@
PL4
FBM-L18-453215-900LMA90T_1812
1 2
B+++
12
12
PC43
2200P_0402_50V7K
10U_SPC-1204P-100_4.5A_20%
+3VALWP
1
+
PC54
2
150U_D_6.3VM
D
S
6 2
1
G
3
12
PC64
13
2
G
1 2
PC67 1000P_0402_50V7K
@
A
0.1U_0603_50V4Z
1
1 2
1 2
PR62
0_0402_5%
DH5
PC42
0.1U_0603_50V4Z
PR63
0_0402_5%
1 2
LX5
DL5
0.47U_0603_16V7K PR77
1 2
0_0402_5%
PC53
PQ16
8
G2
7
D1/S2/K
6
D1/S2/K
5
D1/S2/K
AO4912_SO8
12
D2 D2 G1
S1/A
12
PR73 698_0402_1%
PR78
D
1 2 3 4
12
10.7K_0402_1%
PC41
0.1U_0603_50V4Z
1 2
PC44
4.7U_1206_25V6K
12
PL6
PD12
2 1
SKS10-04AT_TSMA
PR67
1M_0402_1%
PQ15
1 2 3 4
AO4912_SO8
12
PC51 47P_0402_50V8J
1 2
PR75
3.57K_0402_1%
PR81
10K_0402_1%
D2 D2
D1/S2/K
G1
D1/S2/K D1/S2/K
S1/A
1 2
PR65
1.27K_0402_1%
1 2
PR69 0_0402_5%
12
1 2
1 2
G2
PC55 100P_0402_50V8K
+8VSP
12
1 2
PR85
@
0_0402_5%
PC65
@
47P_0402_50V8J
PC66
1
PC62
2
@ 12
330P_0402_25V8K
PR87
5.1K_0402_1%
3 2
LM358A_SO8 PU6A
12
PR90
5.1K_0402_1%
@
12
@
VL
@
8
P
+
0
-
G
4
0_0402_5%
8
1 2 7 6 5
PR68
1.27K_0402_1% PC52
1 2
0.47U_0603_16V7K
12
619_0402_1%
PR71
1 2
ACIN<37,38,43>
@
1
PC63
2
22U_1206_10V6M
@22U_1206_10V6M
@
12
D
PR89
S
@
200K_0402_1%
PR59
DL3
LX3
1 2
PR74
10K_0402_5%
@300K_0402_5%
VS
12
12
PR88
100K_0402_1%
@
13
2
G
PQ20 2N7002_SOT23
B
DH3
PR76
PR82 47K_0402_1%
PC60
@0.047U_0402_16V4Z
12
12
PR60 0_0402_5%
12
12
PC57 680P_0402_50V7K
12
VL
SUSP <42,48,49>
12
PC48
0.1U_0603_50V4Z
PU5
25
BST3
27
DH3
26
LX3
24
DL3
1
CSH3
2
CSL3
3
FB3
10
SKIP#
23
SHDN#
7
TIME/ON5
28
RUN/ON3
PR83 499K_0603_1%
1 2
PC61 1U_0805_16V7K
VL
VS
1 2
22
V+
2
3
PD10
DAP202U_SOT323
1
12
PD11
1SS355_SOD323
ACIN
21
12OUT
VL
VDD
BST5
DH5
LX5 DL5
PGND
CSH5
CSL5
FB5 SEQ REF
SYNC
RST#
GND
MAX1902_SSOP28
8
1 2
VL
MAINPWON <43,52>
VL
PC47
4.7U_0805_10V6K
4 5 18 16 17 19 20 14 13 12 15 9 6 11
PR79 @0_0402_5%
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
BST51BST31
+12VALWP
12
PR61
2.7K_1206_5%
13
D
2
G
PQ17
S
1 2
PR80
0_0402_5%
C
2N7002_SOT23
12
PC50
4.7U_1206_25V6K
BST5
2.5VREF
12
PC56
4.7U_0805_6.3V6K
1 2
SNB
PR70
1.54K_0402_1%
12
1 2
PR72
0_0402_5%
12
PC59
12
PR84 10K_0402_1%
PC40 470P_0805_100V7K
EC11FS2_SOD106
PR58 22_1206_5%
B+++
12
12
PC45
2200P_0402_50V7K
PD13
100P_0402_50V8K
SKS10-04AT_TSMA
2 1
Title
Size Document Number Rev
Date: Sheet
PD9
FLYBACK
12
PC46
10U_1206_25VAK
3.3V / 5V / 12V
12
PL5
1 4
3 2
9U_SDT-1204P-9R0-120_4.5A_20%
12
PC49 47P_0402_50V8J
12
PR66 2M_0402_5%
1
+
PC58
2
150U_D_6.3VM
Compal Electronics, Inc.
E
+5VALWP
1.0
of
45 55Thursday, January 06, 2005
Page 46
5
D D
5
D8D7D6D
PQ21
AO4404_SO8
S1S2S3G
D8D7D6D
S1S2S3G
4
5
4
SYSON< 2 6 , 3 7,38,42>
C C
+2.5VP
12
PC79
4.7U_0805_6.3V6K
B B
4.7UH_PLC1045-4R7_5.5A_30%
1
+
PC78
2
470U_6.3V_M
PR101
17.8K_0402_1%
PR103
10K_0402_1%
12
12
PL7
12
PC83
0.01U_0402_16V7K
12
PC84 @1000P_0402_50V7K
12
PQ23
AO4702_SO8
12
4
PC68
@2200P_0402_50V7K
PR102
0_0402_5%
1
PC69 10U_1206_25V6M
2
12
PC76
0.1U_0603_25V7K
1 2
PR96
0_0402_5%
1
PD14
DAP202U_SOT323
2
3
0.01U_0402_16V7K
12
1 2
PR98
2.74K_0402_1%
PC74
12
PR94
0_0402_5%
12
12
PR105 91K_0402_1%
3
PR92 51_1206_5%
+5VALWP
1 2
12
PC70
0.1U_0603_25V7K
14
PU7
12
SOFT1
BOOT1
UGATE1 PHASE1
ISL6227
ISEN1 LGATE1
PGND1
VOUT1 VSEN1 EN1 PG1
OCSET1
VIN
GND
1
6
5 4
7 2
3
9
10
8
15 11
PR93
2.2_0402_5%
1 2
28
SOFT2
VCC
BOOT2
UGATE2
PHASE2
ISEN2
LGATE2
PGND2
VOUT2 VSEN2
EN2
PG2/REF
OCSET2
DDR
13
ISL6227CA_SSOP28
0.01U_0402_16V7K
17
23
1 2
PR95
0_0402_5%
24 25
22 27
26
20 19 21 16
18
PC71
12
2.2U_0805_10V6K
PC75
12
1 2
PR99
2.74K_0402_1%
12
12
PR106 91K_0402_1%
PC77
0.1U_0603_25V7K
12
PR97
0_0402_5%
2
PQ22
8
G2
7
D1/S2/K
6
D1/S2/K
5
D1/S2/K
AO4912_SO8
S1/A
1
PR91
0_1206_5%
12
PC72
@2200P_0402_50V7K
1
D2
2
D2
3
G1
4
PL8
3.3UH_PLC0745P-3R3A_4.8A_30%
1 2
+5VALWP
B+++
12
12
PC73
4.7U_1206_25V6K
+1.8VALWP
1
+
PC80
12
12
PC82
@1000P_0402_50V7K
PR100
10K_0402_1%
0.01U_0402_16V7K
12
PC85
12
PR104 10K_0402_1%
PC81
1 2
2
220U_D2_4VM
4.7U_0805_6.3V6K
Iimit=10.3/RILIM*(140+Rsense)/Rds(on) Rsense=1K,RILM=51K,Rds(on) tpy.=19.7mΩ,Max=24mΩ. Iimit Min=9.6/51K*(100+1K)/(24mΩ*1.3)=6.636A Iimit Max=9.6/51K*(100+1K)/19.7mΩ=10.897A +VCCP O.C.P. = 6.636A ~ 10.897A
A A
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Iimit=9.6/RILIM*(100+Rsense)/Rds(on) Rsense=2K,RILM=107K,Rds(on) tpy.=19.7mΩ,Max=24mΩ. Iimit Min=9.6/107K*(100+2K)/(24mΩ*1.3)=6.0388A Iimit Max=9.6/107K*(100+2K)/19.7mΩ=9.564A +VCCP O.C.P. = 6.038A ~ 9.564A
Title
Size Document Number Rev
B
2
Date: Sheet
COMPAL ELEC TRONICS, INC
DDR POWER 2.5VP & +1.8VALWP
1
of
46 55Wednesday, January 05, 2005
0.1
Page 47
5
D D
4
3
2
1
10U_0805_6.3V4Z
+1.25VP
PJP10
2MM
21
PC86
22U_1206_6.3V6M
12
12
PR107 10_0603_1%
12
PC90
0.1U_0603_25V7K
PC87
PU8
10U_0805_6.3V4Z
1
VIN
2
VFB
3
VTT
4
VTT
9
8
PGND
7
AGND
6
VCCA
5
REFEN
AGND
CM8562IS_PSOP8
PR109
100K_0402_1%
12
12
D
S
+3VALWP
12
+2.5VP
PR108
100K_0402_1%
1 2
PC91 @4700P_0603_50V7K
13
2
G
2N7002_SOT23 PQ24
PC88
10U_0805_10V4Z
SYSON# <42>
12
1
PC89
2
+2.5VP
C C
B B
A A
COMPAL ELECTRONICS, INC
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
3
2
Size Docu ment Number Rev
Date: Sheet
+1.25VP
of
47 55Wednesday, January 05, 2005
1
Page 48
5
4
3
2
1
PR199
12
PC159
1U_0603_6.3V6M
BOOT
UGATE
PHASE
LGATE
1 2
10_0603_5%
1
2
8
4
PR200
5.11K_0402_1%
1 2
1 2
1 2
12
PC158
0.1U_0402_16V7K
+1.8VALW
PD36 1N4148_SOD80
PC160
0.1U_0402_16V7K
5
PQ52
D8D7D6D
AO4404_SO8
S1S2S3G
4
5
PQ53
D8D7D6D
AO4702_SO8
S1S2S3G
4
PJP11
2MM
21
PC100
4.7U_0805_6.3V6K
PL21
3.3UH_IHLP-2525_30%
1 2
PQ29 2SC4672_SOT89
213
CBE
12
PR119
200_0603_5%
12
12
PC163 22U_1206_6.3V6M
PC98 @220U_B2_2.5VM
1
+
22U_1210_6.3V6M
2
5.1K_0402_5%
1 2
PR120
12
PC161 22U_1206_6.3V6M
1
+
PC164
2
470U_V_2.5VM
12
PC99
68P_0402_50V8J
1 2
PC101
7
0
D D
PC156
PQ51 2N7002_SOT23
PR198
1 2
12
470P_0402_50V8J
7
6
3
5
PU16
VCC
OCSET
FB
GND
APW7057KC-TR_SOP8
PC157
1 2
@0.1U_0402_16V7K
PR197
8.06K_0402_1%
1 2
13
PR196
VLDT_EN#<40>
C C
B B
A A
1 2
0_0402_5%
PC155
@0.1U_0402_16V7K
1 2
2
G
D
S
10K_0402_1%
1 2
1
+
PC162
2
470U_V_2.5VM
+1.5VSP
5.1K_0402_5%
12
PR117
PU6B
6
-
5
+
LM358A_SO8
0.01U_0402_16V7K PC103
1 2
PR201
0_1206_5%
12
12
+5V
Ipeak = 8.27A Io = 7.58A
PR118 100_0402_1%
PC102 560P_0402_50V7K
1 2
12
10K_0402_1%
PR122
13
D
S
PQ30 2N7002_SOT23
+1.2V_HTP
PR121
6.34K_0402_1%
2
G
2.5VREF
SUSP <42,45,49>
<>
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
3
2
Size Document Number Rev
Date: Sheet of
COMPAL ELECTRONICS, INC
1.2V_HTP / +1.5VSP
48 55Wednesday, January 05, 2005
1
Page 49
5
D D
4
3
2
1
B+++
12
PR123 @0_1206_5%
C C
1
PC107
2
@10U_1206_25V6M
B B
PD18
@RB751V_SOD323
@10K_0402_1%
1 2
1 2
PC108 @2200P_0603_50V7K
1 2
31
E
2
B
C
PQ33
@2SA1036K_SOT23
PR126
13
2
PQ32
12
@HMBT2222A_SOT23
PQ31
@SI3455DV_TSOP6
D
S
6
4 5
2 1
G
3
PR125
VS
@10K_0402_5%
8
PU10A
P
+
1
O
-
G
@LM393M_SO8
4
@1000P_0603_50V7K
12
3 2
PC110
PD19
@SKS30-04AT_TSMA
2 1
PC109 @0.1U_0603_50V4Z
12
@2N7002_SOT23
PL10
@5U_TPRH6D38-5R0M-N_2.9A_20%
12
12
PR124
@107K_0402_1%
PR128
1 2
@200K_0402_1%
PQ34
13
D
S
PR129 @0_0402_5%
2
G
12
PC104
@470P_0402_50V7K
12
PR127 @30K_0402_1%
12
1
+
PC105 @100U_25V_M
2
2.5VREF
SUSP <42,45,48>
1
2
+12VSP_FAN
PC106 @10U_1206_25V6M
A A
COMPAL ELEC TRONICS, INC
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
3
2
Size Document Number Rev
Date: Sheet of
FAN 12V
49 55Wednesday, January 05, 2005
1
Page 50
5
D D
4
3
2
1
+5VS
12
CPU_B+
12
PR131 @90.9K_0402_1%
+3VS
@10K_0402_5%
PC116
1 2
PC114
1 2
12
PR134 10K_0402_5%
VID4<6> VID3<6> VID2<6> VID1<6> VID0<6>
1 2
PC113 47P_0402_25V8K
1 2
PR145
3.57K_0603_1% PR146
1.21K_0603_1%
1 2
1 2
PR149
2K_0402_1%
1 2 1 2 1 2 1 2 1 2
1 2
PR135 1K_0402_5% PR136 1K_0402_5% PR137 1K_0402_5% PR138 1K_0402_5% PR140 1K_0402_5%
PR141 0_0402_5%
PR143 0_0402_5%
PR147 2.49K_0402_1%
12
C C
12
PR185 10K_0402_5%
VGATE
VR_ON<16,37,38>
3900P_0603_50V7K
3300P_0402_50V7K
B B
PR132
1 2
PR148 107K_0402_1%
12
CPU_COREFB<6> CPU_COREFB#<6>
12
30 32
25 27
10 26
28 13 14 19
12
PC112 @1U_0402_6.3V4Z
29
PU11
VID4 VID3
1
VID2
2
VID1
3
VID0 PGOOD EN
6
COMP
7
FB
9
IOUT VDIFF
5
OFS FS
GND GND GND GND
OVP
NC4NC8NC
VCC
PWM1
ISEN1
PWM2
ISEN2
PWM3
ISEN3
VSEN
RGND PWM4
ISEN4
ISL6559CR-T_QFN32
31
PR150 0_0402_5%
1 2 1 2
PR151 0_0402_5%
15 21
22 20
18
16 17
11
12 24
23
PR130 10_0402_5%
12
PC111 1U_0805_25V4Z
PR133
PWM3
1 2
@0_0402_5%
PR193
PWM4
1 2
0_0402_5%
1 2
PR139 1.2K_0603_0.5%
1 2
1.2K_0603_0.5%
PR142
1 2
PR144 1.2K_0603_0.5%
12
PC115 @1U_0805_25V4Z
1 2
PR192
12
12
100_0402_5%
PR153
PR152100_0402_5%
PWM4
@1.2K_0603_0.5%
PWM1 <51> ISEN1 <51>
PWM2 <51> ISEN2 <51>
PWM3 <51> ISEN3 <51>
PWM4 <51> ISEN4 <51>
+CPU_CORE
A A
THIS SHEET OF EN GINEE RING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Title
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
B
Date: Sheet
COMPAL ELEC TRONICS, INC
+CPU_CORE
1
50 55Wednesday, January 05, 2005
of
Page 51
5
PR156
1 2
+8VSP
@0_0402_5%
+5VS
12
PR154
0_0402_5%
+12VSP_FAN
12
PR155
@0_0402_5%
PWM30>
D D
PR161
499K _0402_1%
12
@0_0402_5%
PR160
@0_0402_5%
PR162
PR157
PR202
4.7_0402_5%
1 2
12
57.6K_0402_1%
+12VALWP
12
PC124
@0.1U_0603_16V7K
12
1 2
1 2
PC125
1 2
1U_0805_25V4Z
PR158 2_0402_5%
PU12
6
VCC
3
PWM
7
DELAY
4
GND
ISL6209CB-T_SO8
2 1
PC117
12
0.33U_0805_16V7K
BOOT UGATE PHASE LGATE
PD33 SKS10-04AT_TSMA
2
0_0402_5%
1 8 5
PR159
12
3 5
241
5
3
241
4
PQ35 SI7840DP_SO8
PQ36
SI7886DP_SO8
3 5
241
PQ44 SI7840DP_SO8
5
3
241
CPU_B+
PQ37 SI7886DP_SO8
3
Local Transistor
12
12
PC118
PC119
10U_1206_25VAK
10U_1206_25VAK
680P_0603_50V8J
PD20
2 1
SKS30-04AT_TSMA
12
Snubber
PC123
12
PC121
PC120
2200P_0402_50V7K
10U_1206_25VAK
0.5U_MPC1250LR50_35A_20%
12
PR163
4.7_1206_5%
1 2
Swtich Decoupling
PL12
1 2
2
PL11
FBM-L18-453215-900LMA90T_1812
1 2
1
+
PC122 @47U_25V_M
2
1
+
PC146 @68U_25V_M
2
1
CPU_B+B+
ISEN3<50>
PC126
1 2
0.33U_0805_16V7K PR164 2_0402_5%
1 2
PR203
4.7_0402_5%
1 2
PWM10>
C C
PR167
499K _0402_1%
1 2
PWM20>
B B
A A
499K _0402_1%
PWM40>
499K _0402_1%@
PR173
1 2
PR189
1 2
PR166 @0_0402_5%
12
12
PR168
57.6K_0402_1%
ISEN1<50>
4.7_0402_5%
1 2
PR172 @0_0402_5%
12
PR174
57.6K_0402_1%
ISEN2<50>
@4.7_0402_5%
1 2
PR188 @0_0402_5%
12
PR190
57.6K_0402_1%@
ISEN4<50>
5
PC132
PR204
12
PC140
PR205
12
PC153
1 2
@0.1U_0603_16V7K
1 2
@0.1U_0603_16V7K
1 2
@0.1U_0603_16V7K
1 2
PC133
1U_0805_25V4Z
1 2
PC141
1 2
1U_0805_25V4Z
1 2
PC154
1 2
1U_0805_25V4Z
@
PU13
6
VCC
3
PWM
7
DELAY
4
GND
ISL6209CB-T_SO8
2 1
PD31 SKS10-04AT_TSMA
PR170 2_0402_5%
PU14
6
VCC
3
PWM
7
DELAY
4
GND
ISL6209CB-T_SO8
2 1
PD32 SKS10-04AT_TSMA
PR186 @2_0402_5%
PU15
6
VCC
3
PWM
7
DELAY
4
GND
ISL6209CB-T_SO8
@
2 1
PD34 @SKS10-04AT_TSMA
BOOT UGATE PHASE LGATE
PC134
1 2
0.33U_0805_16V7K
BOOT UGATE PHASE LGATE
PC147
1 2
0.33U_0805_16V7K@
BOOT UGATE PHASE LGATE
2
0_0402_5%
1 8 5
2
0_0402_5%
1 8 5
2
0_0402_5%
@
1 8 5
PR165
12
PR171
12
PR187
12
3 5
241
PQ38 SI7840DP_SO8
5
3
241
3 5
241
PQ41 SI7840DP_SO8
5
3
241
3 5
241
PQ47 @SI7840DP_SO8
5
3
241
PQ39
SI7886DP_SO8
PQ42
SI7886DP_SO8
@
PQ49
SI7886DP_SO8
@
CPU_B+
12
12
2 1
12
PD22
2 1
12
PD24
2 1
12
PC128
10U_1206_25VAK
680P_0603_50V8J
PD21
SKS30-04AT_TSMA
12
PC136
10U_1206_25VAK
680P_0603_50V8J
Snubber
4.7_1206_5%
SKS30-04AT_TSMA
12
PC149
10U_1206_25VAK
@
@680P_0603_50V8J
Snubber
@4.7_1206_5%
SKS30-04AT_TSMA
@
PC129
10U_1206_25VAK
PC131
Snubber
PC137
10U_1206_25VAK
PC139
PR175
PC150
10U_1206_25VAK
@
PC152
PR191
PC130
2200P_0402_50V7K
0.5U_MPC1250LR50_35A_20%
12
PR169
1 2
4.7_1206_5%
12
PC138
2200P_0402_50V7K
0.5U_MPC1250LR50_35A_20%
12
1 2
12
PC151
2200P_0402_50V7K
@
@0.5U_MPC1250LR50_35A_20%
12
1 2
PL13
1 2
Local Transistor Swtich Decoupling
PL14
1 2
Local Transistor Swtich Decoupling
PL16
1 2
3
+CPU_CORE
Compal Electronics, Inc.
Title
CPU_CORE_Power-Stage
Size Document N u mb er Re v
Custom
LA-2431
2
Date: Sheet
1
51 55Wednesday, January 05, 2005
0.1
of
12
PC127
10U_1206_25VAK
3 5
241
PQ45 SI7840DP_SO8
5
PQ40 SI7886DP_SO8
3
241
CPU_B+
12
PC135
10U_1206_25VAK
3 5
241
PQ46 SI7840DP_SO8
5
PQ43 SI7886DP_SO8
3
241
CPU_B+
12
PC148
10U_1206_25VAK
PQ50 SI7886DP_SO8@
@
3 5
241
PQ48 @SI7840DP_SO8
5
3
241
4
Page 52
A
B
C
D
VMB
PCN2
1 1
BATT+ BATT+
SMD SMC GND GND
1 2
TS_A
3
TS
EC_SMDA
4
EC_SMCA
5 6 7
12
SUYIN_200275MR009G130ZL
PL15
C8B BPH 853025_2P
1 2
PC142 1000P_0402_50V7K
12
PC143
0.01U_0402_50V4Z
BATT+
PH2 near main Battery CONN :
BAT. thermal protection at 84 degree C Recovery at 45 degree C
12
12
PR177
PR176
100_0402_5%
2 2
100_0402_5%
PR181 1K_0402_5%
1 2
1 2
PR178
25.5K_0402_1%
+3VALWP
BATT_TEMP <37,38>
EC_SMD_1
EC_SMC_1
EC_SMD_1 <37,38,39>
EC_SMC_1 <37, 38,39>
PR179
2.15K_0402_1%
12
PC145
1000P_0402_50V7K
VL
12
12
16.9K_0402_1%
1 2
PH1
10K_TH11-3H103FT_0603_1%
PR182
12
PC144
1U_0402_6.3V5K
5 6
PR183
12
150K_0402_1%
PR184 150K_0402_1%
VL
8
+
-
4
PR180
47K_0402_1%
1 2
PU9B
P
7
O
G
LM393M_SO8
VL
12
MAINPWON <43,45>
3 3
4 4
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
BATTERY CONN / OTP
Size Document Number Rev
Date: Sheet of
COMPAL ELECTRONICS, INC
D
52 55Wednesday, January 05, 2005
Page 53
5
4
3
2
1
POWER PIR LIST
D D
C C
B B
A A
COMPAL ELE CTRO NICS, INC
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
PIR
Size Docu ment Number Rev
of
Date: Sheet
53 55Wednesday, January 05, 2005
1
Page 54
5
4
3
2
1
PIR LIST
Pre-DB
2004/6/05
1.page16 add R541/R542/R543/R544 and net NBSRCCLK_R/ NBSRCCLK/ NBSRCCLK#_R/ NBSRCCLK#.
2.page13 add net NBSRCCLK/NBSRCCLK#.
3.page13 change R85 pin2 from +2.5VS to +2.5V.
D D
4.page14 add D33.
5.page19 del D18 and remove C265 to U38 pinA2. 2004/6/08
1.page13 del R82 change net name from SUS_STAT# to NB_SUSSTAT#. 2004/6/19
1.page19 Change U32,C584,R389 to @.
2.page23 Change R460 to @ and Add R464. 2004/6/25
1.page40 Change R30 from 10K_0402 to 340K_0402_1%.
2.Page4/6 change C18, C28 to SF10001M100 ELE CAP 100U 6.3V M B (6.3X6.0) CV-AX.
3.Page19 Add JP37, del BATT1 2004/6/28
1.Page26 Change U2 from R5535 to TPS2231.
2.Page26 Change C485/C487 to 4.8U_0805,change C486 to 10U_0805.
C C
3.Page26 Change C503/C494 to 10U_0805,C492 to 4.7U_0805.
4.Page26 Del R268,Add Q40 2N7002.
Update for DB2
1.page34 change IDE Resistor from 0402 to 8P4R.
4.page27 change DOCK@ to 1394@.
5.ME update connector check and sub-board connector change to hot bar.
6.change 470U placement for +1.25V.
7.page40 change R33 from 0603 to 0402 type and R30 to 470k_0402_5%.
8. change C18, C28 to SF10001M100 ELE CAP 100U 6.3V M B (6.3X6.0) CV-AX.
9. change C318 to bottom side SF33001M100 ELE CAP 330U 6.3V M B (6.3X7.7) CV-AX
10. change C411 to bottom side SF47001M000 ELE CAP 470U 6.3V M B (10X10.5) CV-EX
11. change C325 to SGA19471D20.
13. change BATT1 to SP07S00080L( socket) + GC20323MX00( battery) (Page 19)
14. change new card power switch from RICOH to TI.
B B
15. Remove PME_EC# from SB and pin C4 wire to EC_SWI#
16. Disconnect UTXD from U26.154
17. Page 23 update hardware strap for SB400 A21 (PA_IXP400AD1 & 105-A27800-00C R1.1)
18. Page 13 add EEPROM for NB to solve boot up intermittently
19. Page 23 strap select 14 MHz OSC mode, it is generated from NB to SB and delete 14 MHz crystal at SB
20. 1394 controller change to TI
21. Update PIRQ routing
22. X2 change size.
23. Cardbus controller change to TI
24. Fan circuit change to MOS
25. Change AMP to TPA0312 and add TC7SH32FU to solve HP_PLUG issue
26. Implement HP wireless/bluetooth control requirement. Change host to SB. (Page 20)
27. Change CRT connector JP19 (Page18)
28. Modify KB910L debug pin RXD=pin#35 & TXD=pin#34
29. No need PWR_BACK# from EC controller
30. DFX review: Change blue LED footprint to be same as amber LED footprint.
A A
31. AC97 primary codec SDATA_IN0 should connect to SB's AC97_SDIN0 (Page 30)
32. R182 change to 11.8 k (Page 20)
33. Reserve D36, D37, and R1127 for XD detect issue. (Page24)
34. PCIE_PME# change to pin #D2 of SB. (Page 20)
THIS SHEET OF EN GINEE RING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
35. WL_ON connect to pin #C5 of SB/ BT_ON# connect to pin #B5/ BT_DET# connect to pin #C8. (Page 20)
36. Add R1132 to ensure ENABLT is low during power up.(Page 13)
37. AGP_BUSY# and AGP_STP# pull up to solve shut down issue. (Page 20)
38. Delete R159 (OVCUR#3) and LID_OUT# change to GPM3# and add R1133 pull up S3_STATE to +3VALW (Page20)
39. Change all blue LED's footprint to LED_17-21UYOC-S530-A2-TR8_2P
40. Change R532 to 0603 size and add R1134 (Page 30)
41. Add AC-caps for PCI and LPC bus turn path. (Page 42)
42. Delete R541, R542, R543 and R544. (Page 16)
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
LAN RealT ech8100BL
LA-2421
of
54 56Wednesday, January 05, 2005
1
Page 55
5
4
3
2
1
Update for SI
1. Applying CLK_STOP of ICS951418. (Page 16)
2. R176 change to 4.12k 1% (page 19)
3. Add pull down resistor for SYSON (R1135) and SUSP# (R319), due to TPS2231 internal pull-up when +3VALW present, EC can not control at the first 10 ms.
4. Reverse JP33 and JP34
5. TI CardReader workaround: add Q44, R1137, D38, and D39 to prevent signal output earlier than power up (page 24)
D D
7. MU902's pin29 connect to AGND_LSD (page 31)
9. Change C621, C619, C628, and C625 to 0.01U from 0.1U (page 19)
10. DDR change to single channel from dual channel.
11. Swap pin40 and 44 of docking connector (JP6) for TV-out signal. (page 41)
12. Update from ATi AP note of SB, unsed SATA pins connect to GND. (page21).
13. Reserve R1138 for XD_WP# pin at socket side. (page 24)
14. Reserve U47 to generate independent +1.9VS to PCIE_PVDD and PCIE_VDDR. (page 19)
15. For KB910L, pin #94 is for DOCK_VOLBTN+# and pin #34 is for EC_GPIO16. (page 38)
16. Add R1141 on SUS_STAT# per ATI recommend. (page 13)
17. PR110 connect to +5V due to +3VS too dirty that will cause TV display garbage. (page 48)
18. Update PCIE connector (JP5) pin defined of #7, #8, and #9 and reserve backward compatible due to there are two different version of NewCard spec. (page 26)
19. GPP_RX0N/P connect to JP5.21/22 and PCIE_TX0N/P connect to JP5.24/25 (page 26)
20. Reserve D40 and D41 for NewCard hot-plug detected. (page 26)
21. Adjust AMP output to 10 dB: Add R237/R233, delete R236/R234. (page 32)
22. Change CP1 ~ CP6 to C1156 ~ C1179 due to cost saving. (page 36)
23. Add C1180 and C1181 for EMI requirement. (page 42)
C C
24. Add C160 due to +3VS unstable. (page 42)
25. R1121 change to 0_0402_5% per TI recommend (page 24)
Update for SI-R (Rev 0.4)
1. DDR_SDM_L2 length mismatch (page 9)
2. Add U48 (TPS2211A) for PCI1510RGVF (page 25)
3. NC_CP# connects to U38.D3 for New Card hot-plug (page 20)
4. R51 and R77 change from 49.9_0402_1% to 61.9_0402_1% (page 11)
5. Change C621, C619, C628, and C625 to 0.1U from 0.01U --- ATI final decision for SB A22 RPO3 and future (page 19)
6. Q25 change from MMBT3906 to PDTA114EK and R228 change to 0_0402_5% due to Hitach HDD LED will not be turn off light. (page 36)
Update for SI-2 (Rev 0.4B)
1. Remove C27 due to Sempron CPU intermittent boot-up issue. (page 6)
B B
2. Change Q39 to MMBT3904 due to CARD_LED is high active signal. (page 35)
3. D40 and D41 replace by R1146 and R1148 due to TPS2231 truth table treat both CPUUSB# andCPPE# as the same. (page 26)
4. R87 change to 8.06k_1% due to New Card eye-diagram issue. (page 12)
Update for PV (Rev 0.5)
1. Add R1149 and R1150 for headphone gain degrading. (page 32)
2. Modify AVDDTX and AVDDRX layout to improve USB signal quality.
3. Change wireless LED power from +5V to +5VS (page 35)
4. Follow TI layout guideline.
5. Change R1099 and R1100 to 2.2k per TI recommend for XD certification. (page 24)
6. Change LAN LED indicator color, Green is for link and Amber is for activity. (page 28)
7. Change R34, R35 and R259 from 1k to 680 base on AMD design guide. (page 6)
8. Change R286, R290, R473, and R486 from 100 to 15 base on AMD recommendation. (page 5/ 9)
9. Reserve C1182 at NB VDD_CORE and change C161 ~ C164, C136 ~C138, C153, C154, C156, C157 from 0.1uF to 1uF due to +1.2V_HT is not stable and clean. (page 14)
10. Delete R1083 due to SM card detect issue (quick or slow). (page 24)
A A
11. Add C1183 ~ C1220, 1000pF or 220pF, on +2.5V, +1.25V, +CPU_CORE, +3V_CLK, +3VS, and +1.2V_HT for EMI require. (page 7/ 10/ 14/ 16/ 22)
12. Change R155, R162, R441, R444, and R448 from 22 ohm to 33 ohm due to EMI require. (page 19)
13. Wire MUTE_LED to JP6.15 due to HP docking spec V0.8 update (page 41)
14. Add C1151 and C1152 to isolate GND and change C61 and C241 from 0.1uF to 1000pF for EMI. (page 4)
15. Add C1221 ~ C1226 on +2.5VS for EMI (page 15)
16. Reserve C1227 and C1228 on EDID_CLK/DAT for EMI. (page 17)
17. Remove R64, R65, R69, and R70 due to EMI. (page 5)
18. RTC battery change to CR2025 (165mAh) due to power consumption less than 5uA. (page 19)
5
4
3
2
Title
<Title>
Size Document Number Rev
LA-2421 0.6
Custom
Date: Sheet
1
of
55 56Thursday, January 06, 2005
Page 56
5
4
3
2
1
Update for PV-2 (Rev 0.6)
1. Delect R1138, wire WP# pins of XD and SM together (SM_EL_WP#) and series 3.3k ohm (R1082) to CLK per HP recommendation. (page 24)
2. Tie un-used inputs of U24 and U33 to GND. (page 40)
3. Delect all reserve 0 ohm resistors. (page 34)
4. Add C1229 for power (+CODEC_REF) stable on MIC_IN. (page 30)
5. R53 change to 91_0402_5% due to HT output from RS480 need to improve rising and falling time. (page 11)
D D
6. Reserve R1153 ~ R1157 for SanDisk 256MB SD card overshoot and undershoot issue. (page 24)
7. De-feature mother board populate R274, and full-feature mother board populate R269 for 90W adapter protection. (page 37)
C C
Title
<Title>
Size Document Number Rev
<Doc> 0.6
Custom
Date: Sheet
B B
A A
of
56 56Wednesday, January 05, 2005
5
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3
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Page 57
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