Compal LA-2392, Compaq nx9105, Compaq Presario R3000, Pavilion zv5000, Pavilion zv5200 Schematic

A

1 1

2 2

B

C

D

E

Compal confidential

Schematics Document

ClawHammer AMD K8 with

3 3

4 4

A

nVIDIA Chrush K8

2004-04-16

REV: 0.1

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Title

Size Document Number Rev

D

Date: Sheet

Compal Electronics, Inc.

LA-2392

Cover Sheet

E

0.1

of

153Friday, April 16, 2004

A

B

C

D

E

Compal confidential

File Name : LA-1811

1 1

CRT Connector

TFT/HPA Panel
Interface

page 17

TV OUT
Connector

2 2

IDSEL:AD18
(PIRQC#,GNT#3,REQ#3)

IDSEL:AD16
(PIRQA#,GNT#0,REQ#0)

IEEE 1394
TSB43AB21A

page 21 page 22

page 18

Mini PCI
socket

page 28

3.3V 33 MHz

IDSEL:AD17
(PIRQB#,GNT#1,REQ#1)

LAN

RTL 8101L

page 20

Fan Control

page 18

page 4

nVIDIA

MAP17

page 14, 15, 16

PCI BUS

IDSEL:AD20
(PIRQA#/B#,GNT#2,REQ#2)

CardBus Controller

TI PCI1620

AMD K8

Claw Ham mer Processor

page 4, 5, 6, 7

HT 16x16 800 MHZ

nVIDIA
Crush K8

708 BGA

page 11, 12, 13

Thermal Sensor
ADM1032

page 4

Memory BUS(DDR)

2.5V DDR- 200/266

USB2.0

AC-LINK

ATA-100
Primary IDE

Secondary IDE

ATA-100

DDR-SO-DIMM X2

BANK 0, 1, 2, 3

page 8, 9,10

USB conn

MDC & BT Conn

Audio CKT

AD1981B

HDD
Connector

page 27

page 27

page 25

page 19

AMP & Audio Jack

page 26

CDROM

RJ45/11 CONN

3 3

page 20

RTC CKT.

Power OK CKT.

page 36

Power On/Off CKT.

page 33

EC I/O Bu ffer

DC/DC Int erface CKT.

4 4

page 37

Slot 0/1

Touch Pad

page 33

page 31

page 23

EC NS
97551

page 30

Int.KBD

BIOS

page 33

page 31

LPC BUS

VIA 1211

Super I/O

page 29

PARALLEL FIR

FDD

page 32

page 33page 32

Connector

page 19

SPR CONN.

page 34

*RJ45 CONN
*PS2 x2 CONN
*CRT CONN
*LINE IN JACK
*LINE OUT JACK
*1394 CONN
*SPDIF CONN
*DVI CONN
*DC JACK
*TVOUT CONN
*PRINTER PORT
*COM PORT
*USB CONN x2

Power Circuit DC/DC

page 38, 39, 40, 41, 42, 43, 44

A

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

LA-2392

Block Diagram

E

0.1

of

253Friday, April 16, 2004

Voltage Rails

A

power
plane

State

S0

S1

S3

S5 S4/AC

S5 S4/AC don't exist

O MEANS ON

X MEANS OFF

+1.2VALW
+3VALW
+5VALW
12VALW

O

O
O
O

X

+1.25V
+2.5V
+3V
+5V

OO

OO
O

XX

+1.2V_HT
+1.2VS
+1.5VS
+2.5VS
+3VS
+5VS

X
XX

PCI Devices

1 1

PCI Device ID

INTERNAL

USB 2.0
AC97 MODEM AD17 N/A
AC97
ATA 100
ETHERNET
LPC I/F AD12 N / A
SMBUS N/A

2
6
6
8
5 K
1
1

EXTERNAL

VGA AD16 E0N/A
1394
LAN
CARD BUS
Wireless LAN
Mini-PCI (no use)

0
1
4
2
3

IDSEL # PIRQREQ/GNT #DEVICE

AD13

AD17
AD20
AD16

AD12

AD16
AD17
AD20
AD18
AD19

N/A

N/A
N/A
N/A

0
1
2
3
4

G
M
L

F

A
B
A, B
C
D

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

LA-2392

Notes List

of

353Friday, April 16, 2004

0.1

A

B

C

D

E

H_CADIP15
H_CADIN15
H_CADIP14
H_CADIN14
H_CADIP13
H_CADIN13
H_CADIP12
H_CADIN12
H_CADIP11
H_CADIN11
H_CADIP10
H_CADIN10
H_CADIP9
H_CADIN9
H_CADIP8
H_CADIN8
H_CADIP7
H_CADIN7
H_CADIP6
H_CADIN6
H_CADIP5
H_CADIN5
H_CADIP4
H_CADIN4
H_CADIP3
H_CADIN3
H_CADIP2
H_CADIN2
H_CADIP1
H_CADIN1
H_CADIP0
H_CADIN0

H_CLKIP1
H_CLKIN1
H_CLKIP0
H_CLKIN0

H_CTLIP1
H_CTLIN1
H_CTLIP0
H_CTLIN0

LVREF0

1

C6
1000P_0402_50V7K

2

2

C610

0.1U_0402_16V4Z

1

U3

1
6
4
5

ADM1032AR_SOP8

H_CADIP[0..15]
H_CADIN[0..15]

T25
R25
U27
U26
V25

U25
W27
W26

AA27
AA26
AB25
AA25
AC27
AC26
AD25
AC25

T27

T28

V29

U29

V27

V28

Y29
W29

AB29
AA29
AB27
AB28
AD29
AC29
AD27
AD28

Y25
W25

Y27

Y28

R27

R26

T29

R29

AF27
AE26

VDD1
ALERT#
THERM#
GND

SDATA

U1A

Claw Hammer-DTR

L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0

L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKIN_H0
L0_CLKIN_L0

L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLIN_H0
L0_CTLIN_L0

L0_REF1
L0_REF0

FOX_PZ75403-2941-42

Thermal Sensor
ADM1032

THERMDA_CPU
THERMDC_CPU

THERMDA_CPU

2

D+

THERMDC_CPU

3

D-

8

SCLK

7

B

L0_CADOUT_H15

L0_CADOUT_L15

L0_CADOUT_H14

L0_CADOUT_L14

L0_CADOUT_H13

L0_CADOUT_L13

L0_CADOUT_H12

L0_CADOUT_L12

L0_CADOUT_H11

L0_CADOUT_L11

L0_CADOUT_H10

L0_CADOUT_L10

L0_CADOUT_H9

L0_CADOUT_L9

L0_CADOUT_H8

L0_CADOUT_L8

L0_CADOUT_H7

L0_CADOUT_L7

L0_CADOUT_H6

L0_CADOUT_L6

L0_CADOUT_H5

L0_CADOUT_L5

L0_CADOUT_H4

L0_CADOUT_L4

L0_CADOUT_H3

L0_CADOUT_L3

L0_CADOUT_H2

L0_CADOUT_L2

L0_CADOUT_H1

L0_CADOUT_L1

L0_CADOUT_H0

L0_CADOUT_L0

HTT Interface

L0_CLKOUT_H1

L0_CLKOUT_L1

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CTLOUT_H1

L0_CTLOUT_L1

L0_CTLOUT_H0

L0_CTLOUT_L0

LDTSTOP_L

THERMDA_CPU <6>
THERMDC_CPU <6>

1

C611
2200P_0402_25V7K

2

EC_SMC_2 <30>
EC_SMD_2 <30>

H_CADIP[0..15]<11>

LA-1851

4 4

3 3

2 2

1 1

BDW0 0

LA-1452 REV 0

12

1

C5

2

W=15mil

12

R454
@10K_0402_5%

A

H_CLKIP1<11>
H_CLKIN1<11>
H_CLKIP0<11>
H_CLKIN0<11>

H_CTLIP0<11>
H_CTLIN0<11>

LVREF1

R10

44.2_0603_1%

12

+3VS

+1.2V_HT

R5 49.9_0402_1%

1 2

R6 49.9_0402_1%

1 2

+1.2V_HT +2.5VS

R8 44.2_0603_1%

1000P_0402_50V7K

H_CADOP[0..15]
H_CADON[0..15]

H_CADOP[0..15] <11>
H_CADON[0..15] <11>H_CADIN[0..15]<11>

Fan Control Circuit 1

H_CADOP15

N26

H_CADON15

N27

H_CADOP14

L25

H_CADON14

M25

H_CADOP13

L26

H_CADON13

L27

H_CADOP12

J25

H_CADON12

K25

H_CADOP11

G25

H_CADON11

H25

H_CADOP10

G26

H_CADON10

G27

H_CADOP9

E25

H_CADON9

F25

H_CADOP8

E26

H_CADON8

E27

H_CADOP7

N29

H_CADON7

P29

H_CADOP6

M28

H_CADON6

M27

H_CADOP5

L29

H_CADON5

M29

H_CADOP4

K28

H_CADON4

K27

H_CADOP3

H28

H_CADON3

H27

H_CADOP2

G29

H_CADON2

H29

H_CADOP1

F28

H_CADON1

F27

H_CADOP0

E29

H_CADON0

F29

H_CLKOP1

J26

H_CLKON1

J27

H_CLKOP0

J29

H_CLKON0

K29
N25

P25

H_CTLOP0

P28

H_CTLON0

P27

LDTSTOP#

AJ27

1 2

R7 1K_0402_5%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

H_CLKOP1 <11>
H_CLKON1 <11>
H_CLKOP0 <11>
H_CLKON0 <11>

H_CTLOP0 <11>
H_CTLON0 <11>

LDTSTOP# <11>

C

EN_FAN1<30>

+12VALW

Fan Control Circuit 2

EN_FAN2<30>

EN_FAN1

12

R2

10K_0402_5%

C775

0.1U_0402_25V4K

R11

10K_0402_5%

EN_FAN2

12

+12VALW

3

+IN

2

-IN

1 2

R3

5
6

1 2

R12

8

P

OUT

U2A

G

LM358A_SO8

4

8.2K_0402_5%

+IN

-IN

FAN1_ON

1

U2B

7

OUT

LM358A_SO8

8.2K_0402_5%

D

FAN_SPEED1<30>

FAN2_ON

FAN_SPEED2<30>

Q1

FMMT619_SOT23

R1

1 2

100_0402_5%

1N4148_SOT23

+3VS

FMMT619_SOT23

R9

1 2

100_0402_5%

+3VS

+5VS

1

B

2

2

C2

0.1U_0402_16V4Z

1

D2

R4

1 2

10K_0402_5%

+5VS

Q2

B

2

2

C7

0.1U_0402_16V4Z

1

D4

1N4148_SOT23

R13

1 2

10K_0402_5%

C

E

3

12

0.1U_0402_16V4Z

1

C

E

3

12

@1SS355_SOD323

FAN1

1

C3

2

@1SS355_SOD323

1

C8

2

10U_0805_10V4Z

FAN2

12

D1

1

C612
100P_0402_50V8K

2

12

D3

1

C614

0.1U_0402_16V4Z

2

1

C1
10U_0805_10V4Z

2

ACES_85205-0300

1

C613
1000P_0402_50V7K

2

1

C4
10U_0805_10V4Z

2

ACES_85205-0300

1

C615
1000P_0402_50V7K

2

JP1

JP2

1
2
3

1
2
3

Compal Electronics, Inc.

Title

Claw Harmmer CPU (Host Bus)

Size Document Number Rev
Custom

LA-2392

Date: Sheet of

453Friday, April 16 , 2004

E

0.1

A

B

C

D

E

+2.5V

DDR_SDQ[0..63]<8>

1 1

2 2

3 3

DDR_SDM[0..7]<8>

DDR_SDQS[0..7]<8>

+1.25VREF_CPU

50 mil width

R1634.8_0603_1%

12

R1734.8_0603_1%

12

DDR_SDQ63
DDR_SDQ62
DDR_SDQ61
DDR_SDQ60
DDR_SDQ59
DDR_SDQ58
DDR_SDQ57
DDR_SDQ56
DDR_SDQ55
DDR_SDQ54
DDR_SDQ53
DDR_SDQ52
DDR_SDQ51
DDR_SDQ50
DDR_SDQ49
DDR_SDQ48
DDR_SDQ47
DDR_SDQ46
DDR_SDQ45
DDR_SDQ44
DDR_SDQ43
DDR_SDQ42
DDR_SDQ41
DDR_SDQ40
DDR_SDQ39
DDR_SDQ38
DDR_SDQ37
DDR_SDQ36
DDR_SDQ35
DDR_SDQ34
DDR_SDQ33
DDR_SDQ32
DDR_SDQ31
DDR_SDQ30
DDR_SDQ29
DDR_SDQ28
DDR_SDQ27
DDR_SDQ26
DDR_SDQ25
DDR_SDQ24
DDR_SDQ23
DDR_SDQ22
DDR_SDQ21
DDR_SDQ20
DDR_SDQ19
DDR_SDQ18
DDR_SDQ17
DDR_SDQ16
DDR_SDQ15
DDR_SDQ14
DDR_SDQ13
DDR_SDQ12
DDR_SDQ11
DDR_SDQ10
DDR_SDQ9
DDR_SDQ8
DDR_SDQ7
DDR_SDQ6
DDR_SDQ5
DDR_SDQ4
DDR_SDQ3
DDR_SDQ2
DDR_SDQ1
DDR_SDQ0

DDR_SDM7
DDR_SDM6
DDR_SDM5
DDR_SDM4
DDR_SDM3
DDR_SDM2
DDR_SDM1
DDR_SDM0

DDR_SDQS7
DDR_SDQS6
DDR_SDQS5
DDR_SDQS4
DDR_SDQS3
DDR_SDQS2
DDR_SDQS1
DDR_SDQS0

MEMZN
MEMZP

AG12

D14
C14

A16
B15
A12
B11
A17
A15

C13

A11
A10

C11

AC1
AC3

AC2
AD1
AE1
AE3
AG3

AJ4
AE2
AF1
AH3

AJ3

AJ5

AJ6

AJ7
AH9
AG5
AH5

AJ9

AJ10

AH11

AJ11

AH15

AJ15

AG11

AJ12
AJ14
AJ16

A13

AA1
AG1
AH7

AH13

A14

AB1

AJ2

AJ8

AJ13

B9
C7
A6

A9
A5
B5
C5
A4
E2
E1
A3
B3
E3
F1
G2
G1
L3
L1
G3
J2

L2
M1
W1
W3

W2

Y1

R1

A7

C2

H1

T1

A8

D1

J1

U1B

MEMVREF1
MEMZN

MEMZP
MEMDATA63

MEMDATA62
MEMDATA61
MEMDATA60
MEMDATA59
MEMDATA58
MEMDATA57
MEMDATA56
MEMDATA55
MEMDATA54
MEMDATA53
MEMDATA52
MEMDATA51
MEMDATA50
MEMDATA49
MEMDATA48
MEMDATA47
MEMDATA46
MEMDATA45
MEMDATA44
MEMDATA43
MEMDATA42
MEMDATA41
MEMDATA40
MEMDATA39
MEMDATA38
MEMDATA37
MEMDATA36
MEMDATA35
MEMDATA34
MEMDATA33
MEMDATA32
MEMDATA31
MEMDATA30
MEMDATA29
MEMDATA28
MEMDATA27
MEMDATA26
MEMDATA25
MEMDATA24
MEMDATA23
MEMDATA22
MEMDATA21
MEMDATA20
MEMDATA19
MEMDATA18
MEMDATA17
MEMDATA16
MEMDATA15
MEMDATA14
MEMDATA13
MEMDATA12
MEMDATA11
MEMDATA10
MEMDATA9
MEMDATA8
MEMDATA7
MEMDATA6
MEMDATA5
MEMDATA4
MEMDATA3
MEMDATA2
MEMDATA1
MEMDATA0

MEMDQS17
MEMDQS16
MEMDQS15
MEMDQS14
MEMDQS13
MEMDQS12
MEMDQS11
MEMDQS10
MEMDQS9
MEMDQS8
MEMDQS7
MEMDQS6
MEMDQS5
MEMDQS4
MEMDQS3
MEMDQS2
MEMDQS1
MEMDQS0

Claw Hammer-DTR

DDR Memory

A CHANGEL ADDRESSB CHANGEL ADDRESS

MEMCKEA
MEMCKEB

MEMCLK_H7

MEMCLK_L7

MEMCLK_H6

MEMCLK_L6

MEMCLK_H5

MEMCLK_L5

MEMCLK_H4

MEMCLK_L4

MEMCLK_H3

MEMCLK_L3

MEMCLK_H2

MEMCLK_L2

MEMCLK_H1

MEMCLK_L1

MEMCLK_H0

MEMCLK_L0

MEMCS_L7
MEMCS_L6
MEMCS_L5
MEMCS_L4
MEMCS_L3
MEMCS_L2
MEMCS_L1
MEMCS_L0

MEMRASA_L
MEMCASA_L

MEMWEA_L

MEMBANKA1
MEMBANKA0

MEMADDA13
MEMADDA12
MEMADDA11
MEMADDA10

MEMADDA9
MEMADDA8
MEMADDA7
MEMADDA6
MEMADDA5
MEMADDA4
MEMADDA3
MEMADDA2
MEMADDA1
MEMADDA0

MEMRASB_L
MEMCASB_L

MEMWEB_L

MEMBANKB1
MEMBANKB0

MEMADDB_B13
MEMADDB_B12
MEMADDB_B11
MEMADDB_B10

MEMADDB_B9
MEMADDB_B8
MEMADDB_B7
MEMADDB_B6
MEMADDB_B5
MEMADDB_B4
MEMADDB_B3
MEMADDB_B2
MEMADDB_B1
MEMADDB_B0

MEMCHECK7
MEMCHECK6
MEMCHECK5
MEMCHECK4
MEMCHECK3
MEMCHECK2
MEMCHECK1
MEMCHECK0

AE8
AE7

D10
C10
E12
E11
AF8
AG8
AF10
AE10
V3
V4
K5
K4
R5
P5
P3
P4

D8
C8
E8
E7
D6
E6
C4
E5

H5
D4
G5

K3
H3

E10
AE6
AF3
M5
AE5
AB5
AD3
Y5
AB4
Y3
V5
T5
T3
N5

H4
F5
F4

L5
J5

E9
AF6
AF4
M4
AD5
AC5
AD4
AA5
AB3
Y4
W5
U5
T4
M3

N3
N1
U3
V1
N2
P1
U1
U2

DDR_CKE0
DDR_CKE1

DDR_CLK7
DDR_CLK7#
DDR_CLK6
DDR_CLK6#
DDR_CLK5
DDR_CLK5#
DDR_CLK4
DDR_CLK4#

DDR_CLK1
DDR_CLK1#
DDR_CLK0
DDR_CLK0#

DDR_SCS#3
DDR_SCS#2
DDR_SCS#1
DDR_SCS#0

DDR_SMAA13
DDR_SMAA12
DDR_SMAA11
DDR_SMAA10
DDR_SMAA9
DDR_SMAA8
DDR_SMAA7
DDR_SMAA6
DDR_SMAA5
DDR_SMAA4
DDR_SMAA3
DDR_SMAA2
DDR_SMAA1
DDR_SMAA0

DDR_CKE0 <8>
DDR_CKE1 <8>

DDR_CLK7 <8>
DDR_CLK7# <8>
DDR_CLK6 <9>
DDR_CLK6# <9>
DDR_CLK5 <8>
DDR_CLK5# <8>
DDR_CLK4 <9>
DDR_CLK4# <9>

R22 10K_0402_5%

1 2

R23 10K_0402_5%
R24 10K_0402_5%
R25 10K_0402_5%

1 2
1 2
1 2

DDR_SCS#3 <9>
DDR_SCS#2 <9>
DDR_SCS#1 <8,9>
DDR_SCS#0 <8,9>

DDR_SRASA# <8,9>
DDR_SCASA# <8,9>
DDR_SWEA# <8,9>

DDR_SBSA1 <8,9>
DDR_SBSA0 <8,9>

DDR_SMAA[0..13] <8,9>

+2.5V

DDR_CLK5/5# & DDR_CLK7/7#
route to nearest DIMM
DDR_CLK4/4# & DDR_CLK6/6#
route to farthest DIMM

R18 120_0402_5%

DDR_CLK6
DDR_CLK5
DDR_CLK4

1 2

R19 120_0402_5%

1 2

R20 120_0402_5%

1 2

R21 120_0402_5%

1 2

within 1.00"

+2.5V

12

R26

100_0402_1%

12

R27

100_0402_1%

0.1U_0402_10V6K

1

C11

2

DDR_CLK7#DDR_CLK7
DDR_CLK6#
DDR_CLK5#
DDR_CLK4#

+1.25VREF_CPU

1

C12
1000P_0402_50V7K

2

4 4

A

FOX_PZ75403-2941-42

B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Compal Electronics, Inc.

Title

Claw Harmmer (MEMORY BUS)

Size Document Number Rev
Custom

LA-2392

Date: Sheet of

553Friday, April 16 , 2004

E

0.1

A

B

C

D

E

+1.25V

U1C

TP_M_RESET#

1 1

CPU_CLK<11>

CPU_CLK#<11>

Place 169 Ohm within 0.5" from CPU
Route as DIF 5/5/5/20

+2.5VDDA

2 2

+2.5VS

3 3

4 4

C20
3900P_0402_50V7K

169_0402_1%

C30 3900P_0402_50V7K

L1
LQG21F4R7N00_0805

1 2

1

+

C40
100U_D2_10VM

2

4.7U_0805_6.3V6K

H_THERMTRIP#

12

R37 1K_0402_5%
R38 330_0402_5%
R39 330_0402_5%

@100_0402_5%

H_RST#

R563

JOPEN

DBREQ#
DBRDY
TCK
TMS
TDI
TRST#
TDO

H_RST#

12

H_PWRGD

12

J3

R40

@560_0402_5%

A

H_THERMTRIP#<11>

H_RST#<11>

12

12

Route as DIFF p air 10/5/10

1

C41

2

H_PWRGD<11>

12

R28

VDDIO_SENSE

3300P_0402_50V7K

1

C42

2

0.22U_0603_10V7K

0.22U_0603_10V7K

R29 80.6_0402_1%

Place within 0.5" from CPU
Route as 80 Ohm DIFF impedence 8/5/20

COREFB<44>
COREFB#<44>

+VDDA

1

C43

2

THERMDA_CPU<4>
THERMDC_CPU<4>

1

C63

2

1 2

+2.5VS

@560_0402_5%

R41

12

12

@

@

12

12

R43

@560_0402_5%

@

R42
@560_0402_5%

0.22U_0603_10V7K

@560_0402_5%

R44

@

H_THERMTRIP#
H_RST#
H_PWRGD

CLKIN
CLKIN#
FBCLKOUT

12

FBCLKOUT#

COREFB
COREFB#

VDDIO_SENSE

50 mils width

VID4<44>
VID3<44>
VID2<44>
VID1<44>
VID0<44>

DBRDY
DBREQ#

TDO
TMS
TCK
TRST# SCANCLK2
TDI

4.7U_0805_6.3V6K

1

2

12

@

R45
@560_0402_5%

1

C64

2

+1.25V +1.25V

TP_K8_A28
TP_K8_AJ28

R46

12

12

@560_0402_5%

@

C68

@

VID4
VID3
VID2
VID1
VID0

+2.5VS

A20

AF20

AE18

AJ21
AH21
AH19

AJ19

A23
A24
B23

AE12

AF12
AE11

AH25

AJ25
AG13

AF14
AG14

AF15
AE15

AH17
AE19

A26
A27

A22
E20
E17
B21
A21

D29
D27
D25
C28
C26
B29
B27

D17
A18
B17
C17
C16

A28

AJ28

@SAMTEC_ASP-68200-07

Claw Hammer-DTR

THERMTRIP_L
RESET_L
PWROK
CLKIN_H

CLKIN_L
FBCLKOUT_H
FBCLKOUT_L

COREFB_H
COREFB_L
CORE_SENSE

VDDIOFB_H
VDDIOFB_L
VDDIO_SENSE

VDDA1
VDDA2

VID4
VID3
VID2
VID1
VID0

DBRDY
DBREQ_L

THERMDA
THERMDC

TDO
TMS
TCK
TRST_L
TDI

VLDT0_A
VLDT0_A
VLDT0_A
VLDT0_A
VLDT0_A
VLDT0_A
VLDT0_A

VTT_A
VTT_A
VTT_A
VTT_A
VTT_A

KEY1
KEY0

FOX_PZ75403-2941-42

JP3

@

B

Clock

Debug

JTAG

2

1

4

3

6

5

8

7

10

9

12

11

14

13

16

15

18

17

20

19

22

21

2423
26

Miscellaneous

VTT_SENSE

AG10

NC

E14

NC

D12

NC

E13

NC

C12

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

VLDT0_B
VLDT0_B
VLDT0_B
VLDT0_B
VLDT0_B
VLDT0_B
VLDT0_B

VTT_B
VTT_B
VTT_B
VTT_B
VTT_B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D22
C22
B13
B7
C3
K1
R2
AA3
F3
C23
AG7
AE22
C24
A25
C9
AE23
AF23
AF22
AF21
C1
J3
R3
AA2
D3
AG2
B18
AH1
AE21
C20
AG4
C6
AG6
AE9
AG9
AF18
AJ23
AH23
AE24
AF24
C15
AG18
AH18
AG17
AJ18
C18
A19
D20
C21
D18
C19
B19

AH29
AH27
AG28
AG26
AF29
AE28
AF25

AG15
AF16
AG16
AH16
AJ17
AE13

TP_K8_D22
TP_K8_C22

CLAW_ANALOG3
CLAW_ANALOG2
CLAW_ANALOG1
CLAW_ANALOG0

BPSCLK
BPSCLK#
TP_K8_AE24
TP_K8_AF24
TP_K8_C15
TP_CPU_BP3
TP_CPU_BP2
BP1
BP0
SINCHN
BRN#
SCANCLK1

SCANEN
SCANSHENB
SCANSHENA

+1.2V_HT

VTT_SENSE

C

H_PWRGD

1

C793

470P_0402_50V7K

R30 820_0402_5%

1 2

R31 820_0402_5%

1 2

R32 680_0402_5%

1 2

R33 680_0402_5%

1 2

R34 680_0402_5%

1 2

R35 680_0402_5%

1 2

R36 680_0402_5%

1 2

VTT_SENSE

2

+2.5V

+2.5VS

470U_D2_2.5VM

4.7U_0805_6.3V6K

0.22U_0603_10V7K

470U_D2_2.5VM

1

2

+1.25V

1

2

+1.25V

1

2

1U_0603_10V6K

1

+

+

C14

C13

2

@330U_D_2VM_R15

4.7U_0805_6.3V6K

C21

0.22U_0603_10V7K

C31

+3VS +2.5VDDA

1

C22

2

4.7U_0805_6.3V6K

1

C32

2

0.22U_0603_10V7K

1

C734

1

2

1

2

2

VR_ON<11,44>

SCANCLK2
SCANCLK1
SCANEN
SCANSHENB

+1.2V_HT

0.22U_0603_10V7K

250 mil

1

+

C59

2

100U_D2_10VM

D

@220U_D2_2.5VM

1

2

4.7U_0805_6.3V6K

C23

C33

1

+

C15

2

1

C24

2

4.7U_0805_6.3V6K

0.22U_0603_10V7K

1

C34

2

0.22U_0603_10V7K

1
2
3

RP1

4 5
3 6
2 7
1 8

680_1206_8P4R_5%

1

1

C60

C61

2

2

0.22U_0603_10V7K

Compal Electronics, Inc.

Title

ClawHarmmer ( MISC )

Size Document Number Rev
Custom

LA-2392

Date: Sheet of

1

+

+

C16

2

330U_6.3V_M

4.7U_0805_6.3V6K

1

C25

2

0.22U_0603_10V7K

1

C35

2

U39

VIN

VOUT
GND
SD#

SI9183_SOT23-5

0.22U_0603_10V7K

1

C62

2

0.22U_0603_10V7K

C810

1

C26

2

1

C36

2

BP

1

2

+1.25V

100U_D2_10VM

4.7U_0805_6.3V6K

1

C27

2

4.7U_0805_6.3V6K

1

C37

2

0.22U_0603_10V7K

5

4

1

C736

0.01U_0402_16V7K

2

0.22U_0603_10V7K

1

C66

C65

2

Near SocketNear Power Supply

100U_D2_10VM

1

2

0.22U_0603_10V7K

E

1

+

C17

2

1

C28

2

4.7U_0805_6.3V6K

1

C38

2

0.22U_0603_10V7K

1

C735
1U_0603_10V6K

2

1

C67

2

0.22U_0603_10V7K

653Friday, April 16 , 2004

+

C18

1

C29

2

1

C39

2

0.1

A

AH20
AB21

+CPU_CORE +2.5V

U1D

L7

VDD

AC15

VDD

H18

VDD

B20

VDD

E21

VDD

1 1

2 2

3 3

4 4

H22

VDD

J23

VDD

H24

VDD

F26

VDD

N7

VDD

L9

VDD

V10

VDD

G13

VDD

K14

VDD

Y14

VDD

AB14

VDD

G15

VDD

J15

VDD

AA15

VDD

H16

VDD

K16

VDD

Y16

VDD

AB16

VDD

G17

VDD

J17

VDD

AA17

VDD

AC17

VDD

AE17

VDD

F18

VDD

K18

VDD

Y18

VDD

AB18

VDD

AD18

VDD

AG19

VDD

E19

VDD

G19

VDD

AC19

VDD

AA19

VDD

J19

VDD

F20

VDD

H20

VDD

K20

VDD

M20

VDD

P20

VDD

T20

VDD

V20

VDD

Y20

VDD

AB20

VDD

AD20

VDD

G21

VDD

J21

VDD

L21

VDD

N21

VDD

R21

VDD

U21

VDD

W21

VDD

AA21

VDD

AC21

VDD

F22

VDD

K22

VDD

M22

VDD

P22

VDD

T22

VDD

V22

VDD

Y22

VDD

AB22

VDD

AD22

VDD

E23

VDD

G23

VDD

L23

VDD

N23

VDD

R23

VDD

U23

VDD

W23

VDD

AA23

VDD

AC23

VDD

B24

VDD

D24

VDD

F24

VDD

K24

VDD

M24

VDD

P24

VDD

T24

VDD

V24

VDD

Y24

VDD

AB24

VDD

AD24

VDD

AH24

VDD

AE25

VDD

K26

VDD

P26

VDD

V26

VDD

FOX_PZ75403-2941-42

POWER

A

VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

E4
G4
J4
L4
N4
U4
W4
AA4
AC4
AE4
D5
AF5
F6
H6
K6
M6
P6
T6
V6
Y6
AB6
AD6
D7
G7
J7
AA7
AC7
AF7
F8
H8
AB8
AD8
D9
G9
AC9
AF9
F10
AD10
D11
AF11
F12
AD12
D13
AF13
F14
AD14
F16
AD16
D15
R4

N28
U28
AA28
AE27
R7
U7
W7
K8
M8
P8
T8
V8
Y8
J9
N9
R9
U9
W9
AA9
H10
K10
M10
P10
T10
Y10
AB10
G11
J11
AA11
AC11
H12
K12
Y12
AB12
J13
AA13
AC13
H14
AB26
E28
J28

+CPU_CORE

W22

M23

L24
AG25
AG27

AF2

AA8

AB9
AA10

B14

Y15
AE16

G20

R20

U20

W20
AA20
AC20
AE20
AG20

AJ20

D21
F21
H21
K21
M21
P21
T21
V21

Y21
AD21
AG21

B22

E22

G22

L22

N22

R22

U22
AG29
AA22
AC22
AG22
AH22

AJ22

D23

F23

H23

K23

P23

T23

V23

Y23
AB23
AD23
AG23

E24

G24

N24

R24

U24

W24
AA24
AC24
AG24

AJ24

B25
C25
B26
D26
H26
M26
T26
Y26

AD26

AF26

AH26

C27
B28
D28
G28
F15

H15
AB17
AD17

B16

G18
AA18
AC18

D19

F19

H19

K19

Y19
AB19
AD19

AF19

L20

N20

J12

J18

J22

J24

J20

B

U1E

B2

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

D2

VSS
VSS

W6

VSS

Y7

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

FOX_PZ75403-2941-42

B

L28

VSS

R28

VSS

W28

VSS

AC28

VSS

AF28

VSS

AH28

VSS

C29

VSS

F2

VSS

H2

VSS

K2

VSS

M2

VSS

P2

VSS

T2

VSS

V2

VSS

Y2

VSS

AB2

VSS

AD2

VSS

AH2

VSS

B4

VSS

AH4

VSS

B6

VSS

G6

VSS

J6

VSS

L6

VSS

N6

VSS

R6

VSS

U6

VSS

AA6

VSS

AC6

VSS

AH6

VSS

F7

VSS

H7

VSS

K7

VSS

M7

VSS

P7

VSS

T7

VSS

V7

VSS

AB7

VSS

AD7

VSS

B8

VSS

G8

VSS

J8

VSS

L8

VSS

N8

VSS

R8

VSS

U8

VSS

W8

VSS

AC8

VSS

AH8

VSS

F9

VSS

H9

VSS

K9

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

M9
P9
T9
V9
Y9
AD9
B10
G10
J10
L10
N10
R10
U10
W10
AC10
AH10
F11
H11
K11
Y11
AB11
AD11
B12
G12
AA12
AC12
AH12
F13
H13
K13
Y13
AB13
AD13
AF17
G14
J14
AA14
AC14
AE14
D16
E15
K15
AB15
AD15
AH14
E16
G16
J16
AA16
AC16
AE29
AJ26
E18
F17
H17
K17
Y17

POWER

C

+CPU_CORE

330U_D_2VM_R15

+CPU_CORE

@330U_D_2VM_R15

+CPU_CORE

10U_1206_6.3V7K

+CPU_CORE

4.7U_0805_6.3V6K

330U_D_2VM_R15

+

C69

@330U_D_2VM_R15

+

C79

10U_1206_6.3V7K

C89

4.7U_0805_6.3V6K

C97

1

+

C70

2

1

+

C80

2

1

C90

2

10U_1206_6.3V7K

1

C98

2

4.7U_0805_6.3V6K

330U_D_2VM_R15

330U_D_2VM_R15

1

2

1

2

1

2

4 in Socket Cavity,
2 on backside under Socket

1

2

1

+

2

1

+

2

10U_1206_6.3V7K

1

C91

2

4.7U_0805_6.3V6K

1

C99

2

330U_D_2VM_R15

1

+

C71

2

@330U_D_2VM_R15

1

+

C81

2

1

C92

2

10U_1206_6.3V7K

1

C100

2

4.7U_0805_6.3V6K

C72

C82

1

2

1

2

D

330U_D_2VM_R15

1

+

C73

2

330U_D_2VM_R15

@330U_D_2VM_R15

1

+

C83

2

@330U_D_2VM_R15

10U_1206_6.3V7K

1

C94

C93

2

4.7U_0805_6.3V6K

1

C101

C102

2

4.7U_0805_6.3V6K

1

+

C74

2

@330U_D_2VM_R15

1

+

C84

2

@330U_D_2VM_R15

1

C103

2

CPU Decouping Capacitor

+2.5V+2.5V

4.7U_0805_6.3V6K

1

1

2

4.7U_0805_6.3V6K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

C111

C112

2

D

1

C113

2

0.22U_0603_10V7K

Near Socket

E

330U_D_2VM_R15

1

2

1

2

+CPU_CORE

+CPU_CORE

0.22U_0603_10V7K

0.22U_0603_10V7K

1

+

C76

2

@330U_D_2VM_R15

1

+

C85

2

1

C95
1000P_0402_50V7K

2

0.22U_0603_10V7K

1

C104

2

In Socket CavityClose to Socket

Loop Bandwidth
KHz

20
50

* 300 3300

1

1

C114

2

2

0.22U_0603_10V7K

Compal Electronics, Inc.

Title

Claw Harmme r (P ower & Ground)

Size Document Number Rev
Custom

LA-2392

Date: Sheet of

+

C77

@330U_D_2VM_R15

+

C86

@330U_D_2VM_R15

1

C105

2

0.22U_0603_10V7K

0.22U_0603_10V7K

1

C115

2

1

+

C78

2

1

+

C87

2

1

C110

0.1U_0402_10V6K

2

0.22U_0603_10V7K

1

1

2

C107

C106

2

0.22U_0603_10V7K

Bulk Cappacitance
uF

23000
9000

0.22U_0603_10V7K

1

1

C117

C116

2

0.22U_0603_10V7K

2

0.22U_0603_10V7K

1

C108

2

C118

E

1

C109

2

Total
ESR

2.5m ohm
(AMD)

0.9m ohm

1.5m ohm

753Friday, April 16 , 2004

0.1

A

RP2

DDR_SDQ1
DDR_SDQ5
DDR_SDQ4
DDR_SDQ0

DDR_SDQS0

1 1

2 2

3 3

4 4

DDR_SDM0 DDR_DM0

DDR_SDQ6
DDR_SDQ3
DDR_SDQ7 DDR_DQ7
DDR_SDQ2

DDR_SDQ13
DDR_SDQ9
DDR_SDQ8
DDR_SDQ12

DDR_SDQS1
DDR_SDM1

DDR_SDQ15
DDR_SDQ14 DDR_DQ14
DDR_SDQ11
DDR_SDQ10

DDR_SDQ19
DDR_SDQ20
DDR_SDQ21
DDR_SDQ17

DDR_SDQS2
DDR_SDM2

DDR_SDQ22
DDR_SDQ18 DDR_DQ18
DDR_SDQ16
DDR_SDQ23

DDR_SDQ28
DDR_SDQ24
DDR_SDQ25
DDR_SDQ29

DDR_SDQS3
DDR_SDM3

DDR_SDQ30
DDR_SDQ26 DDR_DQ26
DDR_SDQ31
DDR_SDQ27

DDR_SDQS[0..7]<5>
DDR_SDQ[0..63]<5>

DDR_SDM[0..7]<5>
DDR_SMAA[0..13]<5,9>

A

1 8
2 7
3 6
4 5

10_0804_8P4R_5%

RP4

1 4
2 3

10_0404_4P2R_5%
RP6

1 8
2 7
3 6
4 5

10_0804_8P4R_5%
RP8

1 8
2 7
3 6
4 5

10_0804_8P4R_5%

RP10

1 4
2 3

10_0404_4P2R_5%
RP12

1 8
2 7
3 6
4 5

10_0804_8P4R_5%
RP14

1 8
2 7
3 6
4 5

10_0804_8P4R_5%

RP16

1 4
2 3

10_0404_4P2R_5%
RP18

1 8
2 7
3 6
4 5

10_0804_8P4R_5%
RP20

1 8
2 7
3 6
4 5

10_0804_8P4R_5%

RP22

1 4
2 3

10_0404_4P2R_5%
RP24

1 8
2 7
3 6
4 5

10_0804_8P4R_5%

DDR_DQ1
DDR_DQ5
DDR_DQ4
DDR_DQ0

DDR_DQS0

DDR_DQ6
DDR_DQ3

DDR_DQ2

DDR_DQ13
DDR_DQ9
DDR_DQ8
DDR_DQ12

DDR_DQS1
DDR_DM1

DDR_DQ15
DDR_DQ11

DDR_DQ10

DDR_DQ19
DDR_DQ20
DDR_DQ21
DDR_DQ17

DDR_DQS2
DDR_DM2

DDR_DQ22
DDR_DQ16

DDR_DQ23

DDR_DQ28
DDR_DQ24
DDR_DQ25
DDR_DQ29

DDR_DQS3
DDR_DM3

DDR_DQ30
DDR_DQ31

DDR_DQ27

DDR_SDQS[0..7]

DDR_SDQ[0..63]
DDR_SDM[0..7]

DDR_SMAA[0..13]

B

RP3

DDR_SDQ37
DDR_SDQ32
DDR_SDQ36
DDR_SDQ33

DDR_SDQS4
DDR_SDM4

DDR_SDQ38
DDR_SDQ34 DDR_DQ34
DDR_SDQ35
DDR_SDQ39

DDR_SDQ44
DDR_SDQ40
DDR_SDQ41
DDR_SDQ45

DDR_SDQS5
DDR_SDM5

DDR_SDQ46
DDR_SDQ42 DDR_DQ42
DDR_SDQ47
DDR_SDQ43

DDR_SDQ49
DDR_SDQ48
DDR_SDQ53
DDR_SDQ52

DDR_SDQS6
DDR_SDM6

DDR_SDQ55
DDR_SDQ54 DDR_DQ54
DDR_SDQ50
DDR_SDQ51

DDR_SDQ56
DDR_SDQ60
DDR_SDQ57
DDR_SDQ61

DDR_SDQS7
DDR_SDM7

DDR_SDQ58
DDR_SDQ63 DDR_DQ63
DDR_SDQ59
DDR_SDQ62

DDR_CKE0<5>

DDR_CKE1<5> DDR_CKE1_SR <9>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

1 8
2 7
3 6
4 5

10_0804_8P4R_5%

RP5

1 4
2 3

10_0404_4P2R_5%
RP7

1 8
2 7
3 6
4 5

10_0804_8P4R_5%
RP9

1 8
2 7
3 6
4 5

10_0804_8P4R_5%

RP11

1 4
2 3

10_0404_4P2R_5%
RP13

1 8
2 7
3 6
4 5

10_0804_8P4R_5%
RP15

1 8
2 7
3 6
4 5

10_0804_8P4R_5%

RP17

1 4
2 3

10_0404_4P2R_5%
RP19

1 8
2 7
3 6
4 5

10_0804_8P4R_5%
RP21

1 8
2 7
3 6
4 5

10_0804_8P4R_5%

RP23

1 4
2 3

10_0404_4P2R_5%
RP25

1 8
2 7
3 6
4 5

10_0804_8P4R_5%

R47 10_0402_5%

R48 10_0402_5%

DDR_DQ37
DDR_DQ32
DDR_DQ36
DDR_DQ33

DDR_DQS4
DDR_DM4

DDR_DQ38
DDR_DQ35

DDR_DQ39

DDR_DQ44
DDR_DQ40
DDR_DQ41
DDR_DQ45

DDR_DQS5
DDR_DM5

DDR_DQ46
DDR_DQ47

DDR_DQ43

DDR_DQ49
DDR_DQ48
DDR_DQ53
DDR_DQ52

DDR_DQS6
DDR_DM6

DDR_DQ55
DDR_DQ50

DDR_DQ51

DDR_DQ56
DDR_DQ60
DDR_DQ57
DDR_DQ61

DDR_DQS7
DDR_DM7

DDR_DQ58
DDR_DQ59

DDR_DQ62

1 2

1 2

C

C

Layout note
Place these resistors

close to DIMM0,
all trace length<500 mil

DDR_CKE0_SR

DDR_CKE1_SR

D

Note:
DDR_SMAA13 Recommend for AMD

DDR_CKE0_SR <9>

D

E

+2.5V

JP4

1

VREF

3

DDR_DQ5
DDR_DQ1

DDR_DQS0
DDR_DQ2

DDR_DQ6
DDR_DQ8

DDR_DQ9
DDR_DQS1

DDR_DQ14
DDR_DQ15

DDR_CLK5<5>
DDR_CLK5#<5>

DDR_DQ20
DDR_DQ16

DDR_DQS2
DDR_DQ18

DDR_DQ22
DDR_DQ24

DDR_DQ28
DDR_DQS3

DDR_DQ26
DDR_DQ30

DDR_CKE0_SR
DDR_SMAA12

DDR_SMAA9
DDR_SMAA7

DDR_SMAA5
DDR_SMAA3
DDR_SMAA1

DDR_SMAA10

DDR_SBSA0<5,9>
DDR_SWEA#<5,9>
DDR_SCS#0<5,9>

DIMM_SMDATA<9,12>

DDR_SBSA0
DDR_SWEA#
DDR_SCS#0
DDR_SMAA13

DDR_DQ33
DDR_DQ36

DDR_DQS4
DDR_DQ34

DDR_DQ38
DDR_DQ40

DDR_DQ44
DDR_DQS5

DDR_DQ42
DDR_DQ46

DDR_DQ48
DDR_DQ49

DDR_DQS6
DDR_DQ54

DDR_DQ55
DDR_DQ60

DDR_DQ56
DDR_DQS7

DDR_DQ63
DDR_DQ58

DIMM_SMCLK<9,12>

+3VS

E

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0#

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2#

93

VDD

95

CKE1

97

DU/A13

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE#

121

S0#

123

DU

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD_SPD

199

VDD_ID

AMP_1565918-1

F

DU/RESET#

SO-DIMM0

REVERSE

F

VREF

VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7

DQ12

VDD

DQ13

DM1

VSS
DQ14
DQ15

VDD

VDD

VSS

VSS

DQ20
DQ21

VDD

DM2
DQ22

VSS
DQ23
DQ28

VDD
DQ29

DM3

VSS
DQ30
DQ31

VDD

CB4

CB5

VSS

DM8

CB6

VDD

CB7

VSS

VSS

VDD

VDD

CKE0

DU/BA2

VSS

VDD

BA1

RAS#
CAS#

VSS
DQ36
DQ37

VDD

DM4
DQ38

VSS
DQ39
DQ44

VDD
DQ45

DM5

VSS
DQ46
DQ47

VDD
CK1#

CK1

VSS
DQ52
DQ53

VDD

DM6
DQ54

VSS
DQ55
DQ60

VDD
DQ61

DM7

VSS
DQ62
DQ63

VDD

SA0

SA1

SA2

A11

S1#

G

+2.5V

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102

A8

104
106

A6

108

A4

110

A2

112

A0

114
116
118
120
122
124

DU

126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DU

20mil

DDR_DQ0
DDR_DQ4

DDR_DM0
DDR_DQ7

DDR_DQ3
DDR_DQ12

DDR_DQ13
DDR_DM1

DDR_DQ10
DDR_DQ11

DDR_DQ17
DDR_DQ21

DDR_DM2
DDR_DQ19

DDR_DQ23
DDR_DQ29

DDR_DQ25
DDR_DM3

DDR_DQ27
DDR_DQ31

DDR_CKE0_SR
DDR_SMAA11

DDR_SMAA8
DDR_SMAA6

DDR_SMAA4
DDR_SMAA2
DDR_SMAA0

DDR_SBSA1
DDR_SRASA#
DDR_SCASA#
DDR_SCS#1

DDR_DQ32
DDR_DQ37

DDR_DM4
DDR_DQ39

DDR_DQ35
DDR_DQ45

DDR_DQ41
DDR_DM5

DDR_DQ43
DDR_DQ47

DDR_DQ52
DDR_DQ53

DDR_DM6
DDR_DQ51

DDR_DQ50
DDR_DQ61

DDR_DQ57
DDR_DM7

DDR_DQ62
DDR_DQ59

Compal Electronics, Inc.

Title

DDR-SODIMM SLOT0

Size Document Number Rev
Custom

LA-2392

Date: Sheet of

G

1

2

DDR_SBSA1 <5,9>
DDR_SRASA# <5,9>
DDR_SCASA# <5,9>
DDR_SCS#1 <5,9>

DDR_CLK7# <5>
DDR_CLK7 <5>

+1.25VREF_MEM

C119

0.1U_0402_10V6K

DDR_DQ[0..63]
DDR_DQS[0..7]
DDR_DM[0..7]

H

DDR_DQ[0..63] <9>
DDR_DQS[0..7] <9>
DDR_DM[0..7] <9>

853Friday, April 16 , 2004

H

0.1

A

+1.25V +1.25V

RP27

DDR_DQ0
DDR_DQ5
DDR_DQ4
DDR_DQ1

1 1

2 2

3 3

4 4

DDR_DM0
DDR_DQS0

68_0402_4P2R_5%

DDR_DQ7
DDR_DQ2
DDR_DQ3
DDR_DQ6

DDR_DQ12
DDR_DQ13
DDR_DQ8
DDR_DQ9

DDR_DM1
DDR_DQS1

68_0402_4P2R_5%

DDR_DQ10
DDR_DQ11
DDR_DQ14
DDR_DQ15

DDR_DQ17
DDR_DQ20 DDR_DQ40
DDR_DQ21
DDR_DQ16

DDR_DQS2
DDR_DM2

68_0402_4P2R_5%

DDR_DQ19
DDR_DQ18
DDR_DQ22
DDR_DQ23

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

18
27
36
45

68_0804_8P4R_5%

RP31

14
23

RP35

18
27
36
45

68_0804_8P4R_5%
RP39

18
27
36
45

68_0804_8P4R_5%

RP43

14
23

RP47

18
27
36
45

68_0804_8P4R_5%
RP51

18
27
36
45

68_0804_8P4R_5%

RP54

14
23

RP57

18
27
36
45

68_0804_8P4R_5%

DDR_DQS[0..7]<8>
DDR_DQ[0..63]<8>
DDR_DM[0..7]<8>
DDR_SMAA[0..13]<5,8>

A

RP28

1 8
2 7
3 6
4 5

68_0804_8P4R_5%
RP32

1 4
2 3

68_0402_4P2R_5%

RP36

1 8
2 7
3 6
4 5

68_0804_8P4R_5%
RP40

1 8
2 7
3 6
4 5

68_0804_8P4R_5%
RP44

1 4
2 3

68_0402_4P2R_5%

RP48

1 8
2 7
3 6
4 5

68_0804_8P4R_5%
RP52

1 8
2 7
3 6
4 5

68_0804_8P4R_5%
RP55

1 4
2 3

68_0402_4P2R_5%

RP58

1 8
2 7
3 6
4 5

68_0804_8P4R_5%

DDR_DQS[0..7]
DDR_DQ[0..63]
DDR_DM[0..7]

DDR_SMAA[0..13]

DDR_DQ29
DDR_DQ24
DDR_DQ25
DDR_DQ28

DDR_DM3
DDR_DQS3

DDR_DQ27
DDR_DQ31
DDR_DQ26
DDR_DQ30

DDR_DQ32
DDR_DQ33
DDR_DQ36
DDR_DQ37

DDR_DQS4
DDR_DM4

DDR_DQ34
DDR_DQ38

DDR_DQ35

DDR_DQ45
DDR_DQ41

DDR_DQ44

DDR_DQS5
DDR_DM5

DDR_DQ43
DDR_DQ47
DDR_DQ42
DDR_DQ46

RP29

1 8
2 7
3 6
4 5

68_0804_8P4R_5%
RP33

1 4
2 3

68_0402_4P2R_5%

RP37

1 8
2 7
3 6
4 5

68_0804_8P4R_5%
RP41

1 8
2 7
3 6
4 5

68_0804_8P4R_5%
RP45

1 4
2 3

68_0402_4P2R_5%

RP49

1 8
2 7
3 6
4 5

68_0804_8P4R_5%

Layout note
Place these resistor

closely DIMM1,
all trace
length<=800mil

100_0402_1%

100_0402_1%

DDR_DQ52
DDR_DQ48
DDR_DQ53
DDR_DQ49

DDR_DM6
DDR_DQS6

DDR_DQ51
DDR_DQ54
DDR_DQ50
DDR_DQ55

DDR_DQ61
DDR_DQ57
DDR_DQ60
DDR_DQ56

DDR_DQS7
DDR_DM7

DDR_DQ63
DDR_DQ58DDR_DQ39
DDR_DQ62
DDR_DQ59

+2.5V

R49

R50

B

12

12

1

2

0.1U_0402_10V6K

B

+1.25VREF_MEM

C121

DDR_CLK4<5>
DDR_CLK4#<5>

DDR_CKE1_SR<8>

Note:
DDR_SMAA13 Recommend
for AMD.

DDR_SBSA0<5,8>
DDR_SWEA#<5,8>

DDR_SCS#2<5>

1

C122
1000P_0402_50V7K

2

DIMM_SMDATA<8,12>

DIMM_SMCLK<8,12>

C

+2.5V

JP5

1

VREF

3

101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99

5
7
9

VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0#
VSS

DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2#
VDD
CKE1
DU/A13
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE#
S0#
DU
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD_SPD
VDD_ID

AMP_1565917-1

DIMM1

DDR_DQ0
DDR_DQ4

DDR_DQS0
DDR_DQ7

DDR_DQ3
DDR_DQ12

DDR_DQ13
DDR_DQS1

DDR_DQ11

DDR_DQ17
DDR_DQ21

DDR_DQS2

DDR_DQ23
DDR_DQ29

DDR_DQ25
DDR_DQS3

DDR_DQ27
DDR_DQ31

DDR_CKE1_SR DDR_CKE1_SR
DDR_SMAA12

DDR_SMAA9
DDR_SMAA7

DDR_SMAA5
DDR_SMAA3
DDR_SMAA1

DDR_SMAA10
DDR_SBSA0
DDR_SWEA#
DDR_SCS#2 DDR_SCS#3
DDR_SMAA13

DDR_DQ32
DDR_DQ37

DDR_DQS4
DDR_DQ39

DDR_DQ35
DDR_DQ45

DDR_DQ41
DDR_DQS5

DDR_DQ47

DDR_DQ52
DDR_DQ53

DDR_DQS6
DDR_DQ51

DDR_DQ50
DDR_DQ61

DDR_DQ57
DDR_DQS7

DDR_DQ62
DDR_DQ59

+3VS

VREF

DQ12
DQ13

DQ14
DQ15

DQ20
DQ21

DQ22
DQ23

DQ28
DQ29

DQ30
DQ31

DU/RESET#

CKE0

DU/BA2

RAS#
CAS#

DQ36
DQ37

DQ38
DQ39

DQ44
DQ45

DQ46
DQ47

DQ52
DQ53

DQ54
DQ55

DQ60
DQ61

DQ62
DQ63

VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7

VDD
DM1

VSS

VDD
VDD
VSS
VSS

VDD
DM2

VSS

VDD
DM3

VSS

VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7

VSS
VSS
VDD
VDD

A11
VSS

VDD

BA1

S1#
VSS

VDD
DM4

VSS

VDD
DM5

VSS

VDD

CK1#

CK1
VSS

VDD
DM6

VSS

VDD
DM7

VSS

VDD

SA0

SA1

SA2

D

+2.5V

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102

A8

104
106

A6

108

A4

110

A2

112

A0

114
116
118
120
122
124

DU

126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DU

50 mil width

DDR_DQ5
DDR_DQ1

DDR_DM0
DDR_DQ2

DDR_DQ6
DDR_DQ8

DDR_DQ9
DDR_DM1

DDR_DQ14DDR_DQ10
DDR_DQ15

DDR_DQ20
DDR_DQ16

DDR_DM2
DDR_DQ18DDR_DQ19

DDR_DQ22
DDR_DQ24

DDR_DQ28
DDR_DM3

DDR_DQ26
DDR_DQ30

DDR_SMAA11
DDR_SMAA8

DDR_SMAA6
DDR_SMAA4
DDR_SMAA2
DDR_SMAA0

DDR_SBSA1
DDR_SRASA#
DDR_SCASA#

DDR_DQ33
DDR_DQ36

DDR_DM4
DDR_DQ34

DDR_DQ38
DDR_DQ40

DDR_DQ44
DDR_DM5

DDR_DQ42DDR_DQ43
DDR_DQ46

DDR_DQ48
DDR_DQ49

DDR_DM6
DDR_DQ54

DDR_DQ55
DDR_DQ60

DDR_DQ56
DDR_DM7

DDR_DQ63
DDR_DQ58

STANDARD

C

D

E

+1.25VREF_MEM

1

C120

0.1U_0402_10V6K

2

DDR_SCS#1<5,8>

DDR_SCS#0<5,8>

DDR_CKE0_SR<8>

DDR_SBSA1 <5,8>
DDR_SRASA# <5,8>
DDR_SCASA# <5,8>
DDR_SCS#3 <5>

DDR_CLK6# <5>
DDR_CLK6 <5>

DDR_SMAA7
DDR_SMAA9
DDR_SMAA12
DDR_SMAA11

DDR_SMAA4
DDR_SMAA6
DDR_SMAA5
DDR_SMAA8

DDR_SMAA0
DDR_SMAA2
DDR_SMAA1
DDR_SMAA3

DDR_SMAA13
DDR_SMAA10

DDR_SCS#1
DDR_SCS#3
DDR_SCASA#
DDR_SCS#0

DDR_SCS#2
DDR_SWEA#
DDR_SBSA0
DDR_SRASA#

DDR_SBSA1

DDR_CKE0_SR

DDR_CKE1_SR

RP26

47_0804_8P4R_5%

RP30

47_0804_8P4R_5%

RP34

47_0804_8P4R_5%

1 2

R479 47_0402_5%

1 2

R480 47_0402_5%

RP42

47_0804_8P4R_5%

RP46

47_0804_8P4R_5%

1 2

R481 47_0402_5%

1 2

R482 68_0402_5%

1 2

R483 68_0402_5%

Layout note
Place these resistor

close by DIMM1,
all trace length
Max=0.8"

+3VS

Compal Electronics, Inc.

Title

DDR-SODIMM SLOT1

Size Document Number Rev
Custom

LA-2392

Date: Sheet of

953Friday, April 16 , 2004

E

+1.25V

18
27
36
45

18
27
36
45

18
27
36
45

18
27
36
45

18
27
36
45

0.1

A

+2.5V

470U_D_4VM

1 1

1

2

470U_D_4VM

1

+

C123

+

2

C124

470U_D_4VM

1

+

C125

2

@220U_D2_4VM

1

+

C126

2

1

C127

2

4.7U_0805_6.3V6K

B

4.7U_0805_6.3V6K

1

C128

2

Near DIMMs

C

D

E

Layout note :

Place one cap close to every 2 pull up resistors termination to

+1.25V

2 2

3 3

4 4

0.1U_0402_10V6K

+1.25V

0.1U_0402_10V6K

+1.25V

0.1U_0402_10V6K

+1.25V

0.1U_0402_10V6K

+1.25V

0.1U_0402_10V6K

+1.25V

0.1U_0402_10V6K

+1.25VS

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

A

1

C132

2

1

C144

2

1

C156

2

1

C168

2

1

C180

2

1

C192

2

1

C131

2

1

C143

2

1

C155

2

1

C167

2

1

C179

2

1

C191

2

1

2

0.1U_0402_10V6K

1

2

0.1U_0402_10V6K

1

2

0.1U_0402_10V6K

1

2

0.1U_0402_10V6K

1

2

0.1U_0402_10V6K

1

2

0.1U_0402_10V6K

C133

C145

C157

C169

C181

C193

0.1U_0402_10V6K

1

C134

2

0.1U_0402_10V6K

1

C146

2

0.1U_0402_10V6K

1

C158

2

0.1U_0402_10V6K

1

C170

2

0.1U_0402_10V6K

1

C182

2

0.1U_0402_10V6K

1

C194

2

1

C135

2

0.1U_0402_10V6K

1

C147

2

0.1U_0402_10V6K

1

C159

2

0.1U_0402_10V6K

1

C171

2

0.1U_0402_10V6K

1

C183

2

0.1U_0402_10V6K

1

C195

2

0.1U_0402_10V6K

B

0.1U_0402_10V6K

1

C136

2

0.1U_0402_10V6K

1

C148

2

0.1U_0402_10V6K

1

C160

2

0.1U_0402_10V6K

1

C172

2

0.1U_0402_10V6K

1

C184

2

0.1U_0402_10V6K

1

C196

2

1

C137

2

0.1U_0402_10V6K

1

C149

2

0.1U_0402_10V6K

1

C161

2

0.1U_0402_10V6K

1

C173

2

0.1U_0402_10V6K

1

C185

2

0.1U_0402_10V6K

1

C197

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C138

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C150

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C162

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C174

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C186

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C198

2

0.1U_0402_10V6K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

1

2

1

2

1

2

1

2

1

2

1

2

C139

C151

C163

C175

C187

C199

0.1U_0402_10V6K

1

C140

2

0.1U_0402_10V6K

1

C152

2

0.1U_0402_10V6K

1

C164

2

0.1U_0402_10V6K

1

C176

2

0.1U_0402_10V6K

1

C188

2

0.1U_0402_10V6K

1

C200

2

+2.5V

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

1

2

1

2

1

2

1

2

C141

C153

C177

C189

0.1U_0402_10V6K

1

C142

2

0.1U_0402_10V6K

1

C154

2

0.1U_0402_10V6K

1

C178

2

+2.5V

0.1U_0402_10V6K

1

C190

2

+2.5V

D

+1.25V

10U_1206_6.3V7K

1

C165

2

10U_1206_6.3V7K

Title

Size Document Number Rev
Custom

Date: Sheet

1

C166

2

Compal Electronics, Inc.

DDR SODIMM Decoupling
LA-2392

10 53Friday, April 16 , 2004

E

of

0.1

5

4

3

2

1

+3VS

12

R68
10K_0402_5%

H_CADOP[0..15]

H_CADON[0..15]
H_CADIP[0..15]
H_CADIN[0..15]

H_CADIP0
H_CADIP1
H_CADIP2
H_CADIP3
H_CADIP4
H_CADIP5
H_CADIP6
H_CADIP7
H_CADIP8
H_CADIP9
H_CADIP10
H_CADIP11
H_CADIP12
H_CADIP13
H_CADIP14
H_CADIP15

H_CADIN0
H_CADIN1
H_CADIN2
H_CADIN3
H_CADIN4
H_CADIN5
H_CADIN6
H_CADIN7
H_CADIN8
H_CADIN9
H_CADIN10
H_CADIN11
H_CADIN12
H_CADIN13
H_CADIN14
H_CADIN15

H_CLKIP0
H_CLKIN0

H_CLKIP1
H_CLKIN1

H_CTLIP0
H_CTLIN0

LDTSTOP#

GATEA20
H_THERMTRIP#
H_RST#
H_PWRGD
CPU_COMP

12

R71
549_0402_1%

U4A

AP18

HT1_TXD0

AP17

HT1_TXD1

AN16

HT1_TXD2

AP15

HT1_TXD3

AN13

HT1_TXD4

AP12

HT1_TXD5

AP11

HT1_TXD6

AN10

HT1_TXD7

AL18

HT1_TXD8

AJ16

HT1_TXD9

AJ15

HT1_TXD10

AL15

HT1_TXD11

AJ13

HT1_TXD12

AL12

HT1_TXD13

AJ12

HT1_TXD14

AJ10

HT1_TXD15

AN18

HT1_TXD0#

AN17

HT1_TXD1#

AM16

HT1_TXD2#

AN15

HT1_TXD3#

AM13

HT1_TXD4#

AN12

HT1_TXD5#

AN11

HT1_TXD6#

AM10

HT1_TXD7#

AM18

HT1_TXD8#

AK16

HT1_TXD9#

AK15

HT1_TXD10#

AM15

HT1_TXD11#

AK13

HT1_TXD12#

AM12

HT1_TXD13#

AK12

HT1_TXD14#

AJ11

HT1_TXD15#

AP14

HT1_TXCLK0

AN14

HT1_TXCLK0#

AJ14

HT1_TXCLK1

AK14

HT1_TXCLK1#

AP9

HT1_TXCTL

AN9

HT1_TXCTL#

AK17

HT1_STOP#

AN29

HT2_TXD0/NC

AM28

HT2_TXD1/NC

AN27

HT2_TXD2/NC

AN26

HT2_TXD3/NC

AP29

HT2_TXD0#/NC

AN28

HT2_TXD1#/NC

AP27

HT2_TXD2#/NC

AP26

HT2_TXD3#/NC

AM25

HT2_TXCLK0/NC

AN25

HT2_TXCLK0#/NC

AP30

HT2_TXCTL/NC

AN30

HT2_TXCTL#/NC

AM29

HT2_RSET/NC

F9

A20GATE/GPIO50

AJ19

THERMTRIP#/GPIO59

AL20

CPU_RST#

AK19

CPU_PWROK

AP20

CPU_COMP

CRUSHK8G A01_PBGA708

CrushK8M/G/GM

HyperTransport
Interface

ONLY FOR CrushK8GM
,CrushK8M/G is "NC"
pin

HT2_RXCLK0#/NC

HT1_RXD0
HT1_RXD1
HT1_RXD2
HT1_RXD3
HT1_RXD4
HT1_RXD5
HT1_RXD6
HT1_RXD7
HT1_RXD8

HT1_RXD9
HT1_RXD10
HT1_RXD11
HT1_RXD12
HT1_RXD13
HT1_RXD14
HT1_RXD15

HT1_RXD0#
HT1_RXD1#
HT1_RXD2#
HT1_RXD3#
HT1_RXD4#
HT1_RXD5#
HT1_RXD6#
HT1_RXD7#
HT1_RXD8#
HT1_RXD9#

HT1_RXD10#
HT1_RXD11#
HT1_RXD12#
HT1_RXD13#
HT1_RXD14#
HT1_RXD15#

HT1_RXCLK0

HT1_RXCLK0#

HT1_RXCLK1

HT1_RXCLK1#

HT1_RXCTL

HT1_RXCTL#

HT1_RSET

HT2_RXD0/NC
HT2_RXD1/NC
HT2_RXD2/NC
HT2_RXD3/NC

HT2_RXD0#/NC
HT2_RXD1#/NC
HT2_RXD2#/NC
HT2_RXD3#/NC

HT2_RXCLK0/NC

HT2_RXCTL/NC

HT2_RXCTL#/NC

HT2_STOP#/NC

HT2_REQ#/NC

CPUVDD_EN

HT1VDD_EN

HT1_VLD#

MEM_VLD#
CPU_VLD#

CPU_CLK

CPU_CLK#

AL1
AM1
AN1
AN2
AN4
AN5
AN6
AM7
AM4
AL5
AJ5
AL6
AJ7
AJ8
AK10
AM9

AL2
AM2
AP1
AP2
AP4
AP5
AP6
AN7
AM3
AL4
AK5
AK6
AK7
AK8
AK9
AL9

AN3
AP3

AM6
AM5

AN8
AP8

AL3

AK28
AK27
AL30
AK26

AJ28
AJ27
AL29
AJ26

AL26
AL27

AK29
AJ29

AK25
AJ25

A2
C2
B1
B4
B2

AN19
AM19

H_CADOP0
H_CADOP1
H_CADOP2
H_CADOP3
H_CADOP4
H_CADOP5
H_CADOP6
H_CADOP7
H_CADOP8
H_CADOP9
H_CADOP10
H_CADOP11
H_CADOP12
H_CADOP13
H_CADOP14
H_CADOP15

H_CADON0
H_CADON1
H_CADON2
H_CADON3
H_CADON4
H_CADON5
H_CADON6
H_CADON7
H_CADON8
H_CADON9
H_CADON10
H_CADON11
H_CADON12
H_CADON13
H_CADON14
H_CADON15

H_CLKOP0
H_CLKON0

H_CLKOP1
H_CLKON1

H_CTLOP0
H_CTLON0

H_RSET

VR_ON
HT1VDD_EN
HT1_VLD#
MEM_VLD#
CPU_VLD#

CPU_CLK_R
CPU_CLK_R#

H_CLKOP0 <4>H_CLKIP0<4>
H_CLKON0 <4>

H_CLKOP1 <4>
H_CLKON1 <4>

H_CTLOP0 <4>
H_CTLON0 <4>

12

R63

51.1_0402_1%

VR_ON <6,44>
HT1V DD_EN <13>
HT1_VLD# <36>
MEM_VLD# <36>
CPU_VLD# <36>

1 2

R69 0_0402_5%

1 2

R70 0_0402_5%

+1.5VS

CPU_CLK <6>
CPU_CLK# <6>

AGP_RBF#<14>
AGP_WBF#<14>

AGP_FRAME#<14>
AGP_IRDY#<14>
AGP_TRDY#<14>

AGP_REQ#<14>

AGP_GNT#<14>
AGP_STOP#<14>
AGP_DEVSEL#<14>
AGP_PAR<14>

AGP_PIPE#<14>

+3VS

1 2

R60 10K_0402_5%

R62 51.1_0402_1%

1 2
1 2

R64 51.1_0402_1%

+3VS +3VS

AGP_ADSTBF0
AGP_ADSTBS0
AGP_ADSTBF1
AGP_ADSTBS1

AGP_C/BE#0
AGP_C/BE#1
AGP_C/BE#2
AGP_C/BE#3

AGP_ST0
AGP_ST1
AGP_ST2
AGP_RBF#
AGP_WBF#
AGP_FRAME#
AGP_IRDY#
AGP_TRDY#
AGP_REQ#
AGP_GNT#
AGP_STOP#
AGP_DEVESL#
AGP_PAR

VDD_PLL

RTC_XTALIN
RTC_XTALOUT

U4B

CrushK8M/G/GM

M33

AGP_SBA0#

P32

AGP_SBA1#

P33

AGP_SBA2#

N33

AGP_SBA3#

T33

AGP_SBA4#

T32

AGP_SBA5#

U32

AGP_SBA6#

U33

AGP_SBA7#

R33

AGP_SBSTBF

R34

AGP_SBSTBS

AD32

AGP_ADSTBF0

AC33

AGP_ADSTBS0

AB30

AGP_ADSTBF1

AC30

AGP_ADSTBS1

V33

AGP_CBE0

AG33

AGP_CBE1

AG29

AGP_CBE2

AC29

AGP_CBE3

AGP Interface 4x/8x

L33

AGP_ST0

M32

AGP_ST1

L34

AGP_ST2

N32

AGP_RBF

M34

AGP_WBF

AH29

AGP_FRAME

AG31

AGP_IRDY

AK34

AGP_TRDY

R29

AGP_REQ

T30

AGP_GNT

AJ33

AGP_STOP

AJ32

AGP_DEVSEL

AH33

AGP_PAR

U30

AGP_DBI1

U29

AGP_DBI0

R30

AGP_8XDE#

P34

AGP_CAL_VDDQ

R32

AGP_CAL_GND

AJ20

DACA_VSYNC

AK20

DACA_HSYNC

AM23

DDC_DATA0

AL21

DDC_CLK0

AJ21

DACA_RED

AK22

DACA_BLUE

AJ22

DACA_GREEN

AM22

DACA_RSET

AM21

DACA_VREF

AN23

DACA_GND

AP23

DACA_VDD

E1

+3.3V_PLL

A11

XTALIN_RTC

B11

XTALOUT_RTC

CRUSHK8G A01_PBGA708

AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8

AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31

AGP_PME#/GPIO32

AGP_CLK

APG_VREF

DACB_VSYNC
DACB_HSYNC

DDC_DATA1

DDC_CLK1
DACB_RED

DACB_BLUE

DACB_GREEN

DACB_RSET
DACB_VREF

DACB_GND

DACB_VDD

+3.3V_PLL_DUAL

AGP_AD0

AA33

AGP_AD1

AA32

AGP_AD2

AB32

AGP_AD3

Y33

AGP_AD4

AB33

AGP_AD5

Y32

AGP_AD6

AC32

AGP_AD7

W33

AGP_AD8

V32

AGP_AD9

AE32

AGP_AD10

AD33

AGP_AD11

AF33

AGP_AD12

AE33

AGP_AD13

AG32

AGP_AD14

AF32

AGP_AD15

AH32

AGP_AD16

AJ30

AGP_AD17

AF31

AGP_AD18

AF29

AGP_AD19

AE30

AGP_AD20

AF30

AGP_AD21

AD30

AGP_AD22

AD29

AGP_AD23

AC31

AGP_AD24

AA29

AGP_AD25

AA30

AGP_AD26

Y29

AGP_AD27

Y31

AGP_AD28

Y30

AGP_AD29

W30

AGP_AD30

V30

AGP_AD31

U31

E26

1 2

R59 10K_0402_5%

W32

1 2

R561 22_0402_5%

+AGP_VREF

V29

AK24
AJ24
AJ23
AK23
AM24
AN24
AP24
AP21
AN21
AL23

AN22

VDD_PLL

C1

+3VALW

AGP_CLK

AGP_CLK <14>

AGP_AD STBF[ 0..1] <14>
AGP_AD STBS[0..1] <14>
AGP_ AD[0..31] <14>
AGP_ C/BE#[0..3] <14>
AGP_ST [0..2] <14>

+1.5VS

12

R61
1K_0402_1%

12

R65
1K_0402_1%

1

C201

0.1U_0402_10V6K

2

H_CADOP[0..15]<4>

H_CADON[0..15]<4>

H_CADIP[0..15]<4>

D D

C C

B B

H_CADIN[0..15]<4>

H_CLKIN0<4>
H_CLKIP1<4>

H_CLKIN1<4>
H_CTLIP0<4>

H_CTLIN0<4>

LDTSTOP#<4>

GATEA20<30>

H_THERMTRIP#<6>
H_RST#<6>
H_PWRGD<6>

RTC_XTALIN

1

C211

18P_0402_50V8J

A A

5

4

3

2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONF IDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVIS ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITT EN CO NSE NT OF COMPAL ELECTRONICS, INC.

Y1

14
23

32.768KHZ_12.5P

RTC_XTALOUT

1

C212
18P_0402_50V8J

2

+3VS

2

L3

1 2

BLM21P300S_0805

1

C207

0.1U_0402_10V6K

2

VDD_PLL

1

C208
10U_1206_6.3V7K

2

Title

Size Document N u mb er Re v

C

Date: Sheet

1

C209

0.1U_0402_10V6K

2

Compal Electronics, Inc.

nVIDIA CrushK8 (Host & AGP Bus)

LA-2392

1

1

C210

0.01U_0402_16V7K

2

11 53Friday, April 16, 2004

of

0.1

5

+RTCVCC

0.1U_0402_10V6K

4

C784

1

2

U45

2

1

S-817A14ANB-CUD-T2_SC82AB

3

VIN

VOUT

4

VSS

NC

+1.4VBAT

1

C783

0.1U_0402_10V6K

2

3

BOOT MODE SEL

SPKR

1 2

R72 @10K_0402_5%

1 2

1 = SAFE MODE BOOT INIT TABLE
0 = USER MODE BOOT INIT TABLE

R75 10K_0402_5%

2

BUF_SIO_CLK SEL

SPDIF

1 2

R73 @10K_0402_5%

1 2

R76 10K_0402_5%

1 = 24 MHZ
0 = 14.318 MHZ

*

XTAL SEL

AC97_RST#

1 = 27 MHZ
0 = 14.318 MHZ

1

1 2

R74 @10K_0402_5%

1 2

R77 10K_0402_5%

+3VALW+3VS+3VS

SDD[0..15]

SDA0 <19>PDA0<19>
SDA1 <19>
SDA2 <19>
SDCS 1# <19>
SDCS 3# <19>
SDDA CK# <19>
SDI OW# <19>
IRQ15 <19>IRQ14<19>
SDDREQ <19>
SDIOR# <19>
SDIORDY <19>

USBP0+ <27>
USBP0- <27>
USBP1+ <27>
USBP1- <27>
USBP2+ <27>
USBP2- <27>
USBP3+ <27>
USBP3- <27>
USBP4+ <34>
USBP4- <34>
USBP5+ <27>
USBP5- <27>

OVCUR#0 <27>
OVCUR#1 <27>
OVCUR#2 <27>

D

S

1 3

Q68

G

2

SLP_S5#

2N7002_SOT23

1 2

Y2

12

14.31818MHZ_20P_6X1430004201

1

C216
22P_0402_50V8J

2

1

2

AC97_BITCLK

1

1

C261

0.1U_0402_10V6K

2

AC97_RST# <25,27>
CLK_CODEC_14M <25>
AC97_SDOUT <25,27>
AC97_SDIN0 <25>
AC97_SDIN1 <27>
AC97_SYNC <25,27>
AC97_BITCLK <25,27>

C217
22P_0402_50V8J

R564
@10_0402_5%

1 2
1

C776
@22P_0402_25V8K

2

12 53Friday, April 16, 2004

+3VALW

0.1

of

PDDACK#<19>

PDIORDY<19>

1 2

R98 60.4_0402_1%

+1.4VBAT

+3VALW

12

12

R107

100K_0402_5%

1

C785

@1P_0402_50V8C

2
1

C786

@1P_0402_50V8C

2

1

C789

@1P_0402_50V8C

2
1

C790

@1P_0402_50V8C

2

PDD[0..15]

PDA1<19>

PDA2<19>
PDCS1#<19>
PDCS3#<19>

PDIOW#<19>

PDDREQ<19>

PDIOR#<19>

SPKR<25>

LID_OUT#<30>
EC_SCI#<30>

EC_FLASH#<31>

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

PDA0
PDA1
PDA2 SDA2
PDCS1#
PDCS3#
PDDACK#
PDIOW#
IRQ14
PDDREQ
PDIOR#
PDIORDY

+3VS

12

R95

60.4_0402_1%

SPKR

TEST

BATTLOW#
ICH_ACIN

RP64

18
27
36
45

15K_1206_8P4R_5%

RP67

18
27
36
45

15K_1206_8P4R_5%

D D

LAD0
LAD1
LAD2
LAD3

LDRQ#0

R84

1 2

10_0402_5%

CLK_PCI_LP C

+3VS

1 2

R110 10K_0402_5%

1 2

R111 10K_0402_5%

1 2

R112 8.2K_0402_5%

1 2

R113 8.2K_0402_5%

RP62

1
2
3
4
5

8.2K_1206_10P8R_5%

RP66

1
2
3
4
5

8.2K_1206_10P8R_5%

5

PCI_AD[0..31]

LAD0<29,30>
LAD1<29,30>
LAD2<29,30>
LAD3<29,30>

LDRQ#0<29>

SIRQ<22,29,30>
1 2

R88 22_0402_5%

DIMM_SMDATA
DIMM_SMCLK
PCI_DEVSEL#
PCI_FRAME#

10
9
8
7
6

10
9
8
7
6

SMB_DATA0
SMB_CLK0
SMB_ALERT#

R580

1K_0402_5%

PIRQA#
PIRQB#
PIRQD#
PIRQC#

PCI_REQ#4
PCI_REQ#5
PCI_IRDY#
PCI_TRDY#

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

12

PCI_AD[0..31]<20,21,22,28>

+3VS

RP59

1 8
2 7
3 6
4 5

8.2K_1206_8P4R_5%

1 2

C C

+3VALW

B B

A A

@

R83 @8.2K_0402_5%

LFRAME#<29,30>

R463 2.7K_0402_5%

1 2

R464 2.7K_0402_5%

1 2

R96 1.2K _0402_5%

1 2

PIRQE#
PCI_PERR#
PCI_STOP#
PCI_SERR#

+3VS

PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3

+3VS

LAD0
LAD1
LAD2
LAD3

LDRQ#0
SIRQ

+3VS

+3VS

U4C

C33

PCI_AD0

D30

PCI_AD1

E33

PCI_AD2

C31

PCI_AD3

D34

PCI_AD4

F28

PCI_AD5

B33

PCI_AD6

E32

PCI_AD7

B31

PCI_AD8

D33

PCI_AD9

A32

PCI_AD10

C34

PCI_AD11

E31

PCI_AD12

B34

PCI_AD13

D32

PCI_AD14

E34

PCI_AD15

G32

PCI_AD16

F33

PCI_AD17

G33

PCI_AD18

H32

PCI_AD19

H34

PCI_AD20

H33

PCI_AD21

H30

PCI_AD22

J30

PCI_AD23

J34

PCI_AD24

K33

PCI_AD25

J29

PCI_AD26

J33

PCI_AD27

K30

PCI_AD28

K29

PCI_AD29

K32

PCI_AD30

L32

PCI_AD31

H1

LPC_AD0

H2

LPC_AD1

H3

LPC_AD2

G2

LPC_AD3

F2

LPC_FRAME#

J3

LPC_DRQ0#

F1

LPC_DRQ1#

G3

SERIRQ

E2

PCI_CLK7

B15

PCI_CLK8/GPIO_8

B14

PCI_CLK9/GPIO_9

D2

PCI_CLK10/GPIO_17

B9

SMB_DATA1/GPIO44

B10

SMB_CLK1/GPIO43

G5

SMB_DATA0/GPIO42

H5

SMB_CLK0/GPIO41

C10

SMB_ALERT#/GPIO40

AP31

BUF_125_25MHZ

AP32

RGMII_TXD0/MII_TXD0

AL32

RGMII_TXD1/MII_TXD1

AL31

RGMII_TXD2/MII_TXD2

AM31

RGMII_TXD3/MII_TXD3

AP33

RGMII_TXCLK/MII_TXCLK

AN32

RGMII_TXCTL/MII_TXEN

AN34

RGMII_RXD0/MII_RXD0

AM33

RGMII_RXD1/MII_RXD1

AM34

RGMII_RXD2/MII_RXD2

AL33

RGMII_RXD3/MII_RXD3

AP34

RGMII_RXCLK/MII_RXCLK

AM32

RGMII_RXCTL/MII_RXDV

AN33

MII_RXER/GPIO21

AK31

MII_COL

AK33

RGMII_MDIO/MII_MDIO

AN31

MII_CRS

AL34

RGMII_MDC/MII_MDC

AK32

MII_PWRDWN

CRUSHK8G A01_PBGA708

+3VS

RP61

1 8
2 7
3 6
4 5

10K_1206_8P4R_5%

+3VALW

RP63

1 8
2 7
3 6
4 5

10K_1206_8P4R_5%

DIMM_SMCLK<8,9>

PCI_PERR#/GPIO47

PCI_PME#/GPIO37

PCI_RST3#/GPIO38
PCI_RST4#/GPIO39

PCI Interface

PCI_REQ3#/GPIO61
PCI_REQ4#/GPIO45
PCI_REQ5#/GPIO63

PCI_GNT3#/GPIO62
PCI_GNT4#/GPIO46
PCI_GNT5#/GPIO64

PCI_INTE#/GPIO48

EXT_SMI#/GPIO29

KBRDRSTIN#/GPIO60

FANRPM/GPIO52
FANCTL0/GPIO53
FANCTL1/GPIO54

CPU_SLP#/GPIO56

THERM#/GPIO58

SIO_PME#/GPIO28

SLP_S1#/GPIO57

EE_SEL/GPIO33
EE_CLK/GPIO34

EE_DATAO/GPIO35

EE_DATAI/GPIO36

KBRST#
SLP_S1#
RSMRST#

SIRQ

PCI_PME#
PBTN_OUT#
SIO_PME#

DIMM_SMCLK

PCI_CBE0#
PCI_CBE1#
PCI_CBE2#
PCI_CBE3#

PCI_FRAME#

PCI_IRDY#
PCI_TRDY#
PCI_STOP#

PCI_DEVSEL#

PCI_PAR

PCI_SERR#

PCI_RST0#
PCI_RST1#
PCI_RST2#

PCI_REQ0#
PCI_REQ1#
PCI_REQ2#

PCI_GNT0#
PCI_GNT1#
PCI_GNT2#

PCI_INTW#

PCI_INTX#

PCI_INTY#

PCI_INTZ#

PCI_CLK0
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLK5
PCI_CLK6

PCI_CLKFB

INTRUDER#

PWRBTN#

RSTBTN#

PWRGD_SB

PWRGD

RI#/GPIO30

SLP_S5#
SLP_S3#

4

G29
B32
F34
J32
J31
G30
F29
F31
F30
F32
A33
C32
F26
P29
L30
C25
K5
H6

C29
E29
D27
D26
A30
A31

E27
D29
E28
C26
B29
B30

M30
N29
M29
N30
P30

A29
C28
B28
B27
A27
B26
A26
B25

D11
A5
C6
A3
A8
D6
B3
E6
D5
C5
C3
F7
B5
C11
D9
C7
C8

B12
A12
B13
C13

+3VS

G

2

S

Q7
2N7002_SOT23

PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_STOP#
PCI_DEVSEL#
PCI_PAR
PCI_SERR#
PCI_PERR#
PCI_PME#

R78 33_0402_5%

1 2

R79 33_0402_5%

1 2

R81 33_0402_5%

1 2

R82 33_0402_5%

1 2

PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
PCI_REQ#5

PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4
PCI_GNT#5

PIRQA#
PIRQB#
PIRQC#
PIRQD#
PIRQE#

R85 22_0402_5%

1 2

R86 22_0402_5%

1 2

R87 22_0402_5%

1 2

R89 22_0402_5%

1 2

R93 22_0402_5%

1 2

R92 22_0402_5%

1 2

INTRUDER#
EC_SMI#
PBTN_OUT#
KBRST#
RSMRST#
PWRGD_SB
PM_PWROK

EC_THRM#
EC_SWI#
SIO_PME#
SLP_S5#
SLP_S3#
SLP_S1#

SMB_CLK0

13

D

SMB_DATA0

PCI_CBE#0 < 20,21, 22,28>
PCI_CBE#1 < 20,21, 22,28>
PCI_CBE#2 < 20,21, 22,28>
PCI_CBE#3 < 20,21, 22,28>
PCI_FRAME# < 20,21, 22,28>
PCI_I RDY# <20,21,22,28>
PCI_TR D Y # <20,21,22,28>
PCI_STOP# <20,21,22,28>
PCI_DEVSEL# <20,21,22,28>
PCI_PAR <20,21,22,28>
PCI_SER R# <20,21,22,28>
PCI_PER R# <20,21,22,28>

PCI_ REQ#0 <21>
PCI_ REQ#1 <20>
PCI_ REQ#2 <22>
PCI_ REQ#3 <28>
PCI_ REQ#4 <28>
PCI_REQ#5

PCI_GN T#0 <21>
PCI_GN T#1 <20>
PCI_GN T#2 <22>
PCI_GN T#3 <28>
PCI_GN T#4 <28>
PCI_GNT#5

PIRQA # <21,22>
PIRQB # <20,22>
PIRQC# <28>
PIRQD#
PIRQE# <14>

EC_SMI# <30>
PBTN_OUT# <30>
KBRST# <30>

PM_PWROK <36>

EC_THRM# <30>
EC_S WI# <30>

SLP_S5# <30>
SLP_S3# <27,30>
SLP_S1# <30>

2

G

DIMM_SMDATA

1 3

D

S

Q8
2N7002_SOT23

PCIRST_AGP#
PCIRST#

PCIRST_IDE#
PCIRST_LPC#

CLK_PCI_MINI
CLK_PCI_PCM
CLK_PCI_LA N
CLK_PCI_1394
CLK_PCI_SIO

CLK_PCI_FB

1 2

R94 1M_0402_5%

DIMM_SMDATA <8,9>

PCIRST_AGP# <14>
PCIRST# <20, 21, 22,28>

PCIRST_IDE # <19>
PCIRST_LPC# <29,30>

CLK_PCI_MINI <28>
CLK_PCI_PCM <22>
CLK_ PCI_LA N <20>
CLK_PCI_1394 <21>CLK_PCI_LPC<30>
CLK_PCI_SI O <29>

+1.4VBAT

EC_RSMRST# <30,36>
PWRGD _SB <30,36>

PM_BATLOW#<30>

ACIN<30,38,40>

3

match to within 6000
mil of each other

PDD[0..15]<19> SDD[0.. 15] <19>

1 2

R100 1K_0402_5%

+3VALW

R106
@100K_0402_5%
D5 RB751V_SOD323

21

USBP3+

USBP3­USBP2+

USBP2-

USBP0+

USBP0­USBP1+

USBP1-

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONF IDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVIS ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITT EN CO NSE NT OF COMPAL ELECTRONICS, INC.

U4D

V1

IDE_DATA_P0

V5

IDE_DATA_P1

U6

IDE_DATA_P2

U1

IDE_DATA_P3

U3

IDE_DATA_P4

T3

IDE_DATA_P5

T5

IDE_DATA_P6

R6

IDE_DATA_P7

R5

IDE_DATA_P8

T6

IDE_DATA_P9

T2

IDE_DATA_P10

U2

IDE_DATA_P11

V3

IDE_DATA_P12

U5

IDE_DATA_P13

V6

IDE_DATA_P14

V2

IDE_DATA_P15

Y1

IDE_ADDR_P0

Y5

IDE_ADDR_P1

AA3

IDE_ADDR_P2

AA1

IDE_CS1_P#

AA2

IDE_CS3_P#

W6

IDE_DACK_P#

W2

IDE_IOW_P#

W5

IDE_INTR_P

W3

IDE_DREQ_P

Y3

IDE_IOR_P#

Y2

IDE_RDY_P

J5

SATA_CLK/TBC/TCK

N3

IDE_RDY_M/TxD4/TD4

P6

IDE_IOR_M#/TxD3/TD3

N5

IDE_DREQ_M/TxD1/TD1

P3

IDE_INTR_M/TxD6/TD6

P5

IDE_IOW_M#/TxD2/TD2

N2

IDE_DACK_M#/TxD5/TD5

R2

IDE_CS3_M#/CTL_T

R1

IDE_CS1_M#/CTL_R

R3

IDE_ADDR_M2/TxD9/TD9

P2

IDE_ADDR_M1/TxD7/TD7

P1

IDE_ADDR_M0/TxD8/TD8

N6

IDE_DATA_M15/TxD0/TD0

M1

IDE_DATA_M14/Rx_DATA_VALID/RD9

M6

IDE_DATA_M13/RxD8/RD7

L5

IDE_DATA_M12/RxD6/RD5

L1

IDE_DATA_M11/RxD4/RD3

L3

IDE_DATA_M10/RxD2/RD1

K3

IDE_DATA_M9/SATACLK

J1

IDE_DATA_M8/RBC0/COMINIT

K6

IDE_DATA_M7/ASIC_CLK/RCK

J2

IDE_DATA_M6/RBC1/PHYRDY

K2

IDE_DATA_M5/RxD1/RD0

L2

IDE_DATA_M4/RxD3/RD2

L6

IDE_DATA_M3/RxD5/RD4

M5

IDE_DATA_M2/RxD7/RD6

M3

IDE_DATA_M1/RxD9/RD8

M2

IDE_DATA_M0/RxD0/COMWAKE

AG1

IDE_COMP

D1

SUSCLK/GPIO31

E10

SPKR

B8

TEST

F11

+1.2V_VBAT

A4

BUF_SIO_CLK

B6

BUF_27_14MHZ/GPIO55

E4

GPIO_20/ASF1

E3

GPIO_19/ASF0

C4

GPIO_18

D3

GPIO_16

F8

GPIO_15

B7

GPIO_14

F13

GPIO_13

E13

GPIO_12

E11

GPIO_11/STOP_AGPCLK#

B17

GPIO_10/HT1_REQ#

E8

GPIO_7

F12

GPIO_6

D14

GPIO_5

E14

GPIO_4

E9

GPIO_3

AE2

GPIO_2

Y6

GPIO_1

CRUSHK8G A01_PBGA708

USBP4+

1

C787

USBP4-

@1P_0402_50V8C

2

USBP5+

1

C788

USBP5-

@1P_0402_50V8C

2

2

IDE_DATA_S0
IDE_DATA_S1
IDE_DATA_S2
IDE_DATA_S3
IDE_DATA_S4
IDE_DATA_S5
IDE_DATA_S6
IDE_DATA_S7
IDE_DATA_S8

IDE_DATA_S9
IDE_DATA_S10
IDE_DATA_S11
IDE_DATA_S12
IDE_DATA_S13
IDE_DATA_S14
IDE_DATA_S15

IDE_ADDR_S0

IDE_ADDR_S1

IDE_ADDR_S2

IDE_CS1_S#
IDE_CS3_S#

IDE_DACK_S#

IDE_IOW_S#
IDE_INTR_S

IDE_DREQ_S

IDE_IOR_S#

IDE_RDY_S

USB_0/6
USB_0#/6#
USB_1/NC

USB_1#/NC

USB_2NC

USB_2#/NC

I/O POWER

USB_3/USB_OC6

USB_3#/USB_OC7#

USB_4/7
USB_4#/7#
USB_5/NC

USB_5#/NC

USB2_0

USB2_0#

USB2_1

USB2_1#

USB2_2

USB2_2#

USB2_3

USB2_3#

USB2_4

USB2_4#

USB2_5

USB2_5#

USB_OC0#
USB_OC1#/GPIO22
USB_OC2#/GPIO23
USB_OC3#/GPIO24
USB_OC4#/GPIO25
USB_OC5#/GPIO26

+3.3V_USB2_DUAL1
+3.3V_USB2_DUAL2

USB_RBIAS

SPDIF/GPIO51

AC_RESET#

AC97_CLK

AC_SDATA_OUT

AC_SDATA_IN0

AC_SDATA_IN1/GPIO27

AC_SYNC

AC_BITCLK

XTALIN

XTALOUT

RP68

15K_1206_8P4R_5%

SDD0

AD1

SDD1

AC1

SDD2

AC3

SDD3

AD5

SDD4

AC6

SDD5

AB5

SDD6

AA6

SDD7

AB3

SDD8

AB2

SDD9

AA5

SDD10

AB6

SDD11

AC5

SDD12

AD6

SDD13

AC2

SDD14

AD3

SDD15

AD2

SDA0

AF3

SDA1

AE3
AF2

SDCS1#

AF1

SDCS3#

AG3

SDDACK#

AG5

SDIOW#

AE5

IRQ15

AG6

SDDREQ

AE6

SDIOR#

AF5

SDIORDY

AF6

A20
B20
E21
F21
A21
B21
B22
C22
A23
B23
B24
C24

USBP0+

D20

USBP0-

C20

USBP1+

E22

USBP1-

F22

USBP2+

D21

USBP2-

C21

USBP3+

E23

USBP3-

F23

USBP4+

E24

USBP4-

F24

USBP5+

E25

USBP5-

F25

OVCUR#0

D18

OVCUR#1

E18

OVCUR#2

B18
C17
A18
D17

D24

R103

E19
A17

1 2

909_0402_1%

SPDIF

B16

AC97_RST#

E16

R104 33_0402_5%

C15
F17
F16
E15
E17

AC97_BITCLK

C16
B19

C19

18
27
36
45

Compal Electronics, Inc.

Title

nVIDIA CrushK8 (PCI & IDE & USB & MISC)

Size Document N u mb er Re v

C

LA-2392

Date: Sheet

5

4

3

2

1

U4E

+5VS

D D

C C

B B

A A

+3VS

+3VALW

+5VALW

+1.6VALW

+1.5VS

+1.6VS

+1.2V_HT

E30

+5V1

AA4

+5V2

A14

+3.3V1

D12

+3.3V2

E20

+3.3V3

D15

+3.3V4

C30

+3.3V5

H29

+3.3V6

H4

+3.3V7

L4

+3.3V8

V4

+3.3V9

R4

+3.3V10

AD4

+3.3V11

AF4

+3.3V12

E5

+3.3V13

M31

+3.3V14

V31

+3.3V15

AD31

+3.3V16

D8

+3.3V_DUAL1

C23

+3.3V_DUAL2

F27

+3.3V_DUAL3

G6

+3.3V_DUAL4

AK30

+3.3V_DUAL5

F15

+5V_DUAL1

F19

+5V_DUAL2

F4

+1.2V_DUAL1

F5

+1.2V_DUAL2

F6

+1.2V_DUAL3

R31

+1.5V1

U34

+1.5V2

Y34

+1.5V3

AA31

+1.5V4

AC34

+1.5V5

AF34

+1.5V6

AG30

+1.5V7

AJ34

+1.5V8

AG2

+1.2V1

AH2

+1.2V2

AH3

+1.2V3

AH5

+1.2V4

AH6

+1.2V5

AJ1

+1.2V6

AJ2

+1.2V7

AJ3

+1.2V8

AJ4

+1.2V9

AK1

+1.2V10

AK2

+1.2V11

AK3

+1.2V12

AK4

+1.2V13

AL8

+1.2V_HT1

AL11

+1.2V_HT2

AL14

+1.2V_HT3

AL17

+1.2V_HT4

AK18

+1.2V_HT5

AM27

+1.2V_HT6

N18

GND1

N17

GND2

N16

GND3

N15

GND4

N14

GND5

N13

GND6

P18

GND7

P17

GND8

P16

GND9

P15

GND10

P14

GND11

P13

GND12

R18

GND13

R17

GND14

R16

GND15

R15

GND16

R14

GND17

R13

GND18

T18

GND19

T17

GND20

T16

GND21

T15

GND22

T14

GND23

T13

GND24

U18

GND25

U17

GND26

U16

GND27

U15

GND28

U14

GND29

U13

GND30

V18

GND31

V17

GND32

V16

GND33

V15

GND34

V14

GND35

V13

GND36

V22

GND37

V21

GND38

V20

GND39

V19

GND40

U22

GND41

U21

GND42

U20

GND43

U19

GND44

T22

GND45

CRUSHK8G A01_PBGA708

POWER and GROUND

GND81
GND82
GND83
GND84
GND85
GND86
GND87
GND88
GND89
GND90
GND91
GND92
GND93
GND94
GND95
GND96
GND97
GND98

GND99
GND100
GND101
GND102
GND103
GND104
GND105
GND106
GND108
GND109
GND110
GND111
GND112
GND113
GND114
GND115
GND116
GND117
GND118
GND119
GND120
GND121
GND122
GND123
GND124
GND125
GND126
GND127
GND128
GND129
GND130
GND131
GND132
GND133
GND134
GND135
GND136
GND137
GND138
GND139
GND140
GND141
GND142
GND143
GND144
GND145
GND146
GND147
GND148
GND149
GND150
GND151
GND152
GND153
GND154
GND155
GND156
GND157
GND158
GND159

GND80

GND79

GND78

GND77

GND76

GND75

GND74

GND73

GND72

GND71

GND70

GND69

GND68

GND67

GND66

GND65

GND64

GND63

GND62

GND61

GND60

GND59

GND58

GND57

GND56

GND55

GND54

GND53

GND52

GND51

GND50

GND49

GND48

GND47

GND46

AA22
AA21
AA20
AA19
AA18
AA17
AA16
AA15
AA14
AA13
AB22
AB21
AB20
AB19
AB18
AB17
AB16
AB15
AB14
AB13
A34
A24
A15
A9
A6
A1
C18
C27
D23
C9
D31
C12
D4
E12
E7
F18
F20
F14
F10
F3
H31
J4
J6
L31
M4
P31
P4
T29
U4
V34
W29
Y4
AA34
AE29
AC4
AD34
AJ31
AG34
AG4
AH30
AL24
AK21
AJ18
AJ17
AK11
AJ9
AJ6
AM30
AM26
AN20
AM20
AM17
AM14
AM11
AM8
C14
AB29
L29
Y13
Y14
Y15
Y16
Y17
Y18
Y19
Y20
Y21
Y22
W13
W14
W15
W16
W17
W18
W19
W20
W21
W22
N19
N20
N21
N22
P19
P20
P21
P22
R19
R20
R21
R22
T19
T20
T21

+3VS

1

C270

4.7U_0805_6.3V6K

2

R118
100K_0402_5%

2N7002_SOT23

O

G3I

1

C220

0.1U_0402_10V6K

2

1

C228

0.1U_0402_10V6K

2

1

C237

0.1U_0402_10V6K

2

+1.2V_HT

1

C246

4.7U_0805_6.3V6K

2

1

C255

0.1U_0402_10V6K

2

1

C263

0.1U_0402_10V6K

2

+12VALW

1 2

13

2

G

Q11

Q12
DTC124EK_SC59

1

C271

0.1U_0402_10V6K

2

R116
100K_0402_5%

D

S

1

C221

0.1U_0402_10V6K

2

1

C229

0.1U_0402_10V6K

2

1

C238

0.1U_0402_10V6K

2

1

C247

0.1U_0402_10V6K

2

1

C256

0.1U_0402_10V6K

2

1

C264

0.1U_0402_10V6K

2

R119

100K_0402_5%

1 2

1

C273

0.047U_0402_16V4Z

2

1

C791

4.7U_0805_6.3V6K

2

+3VS

1

C792

0.1U_0402_10V6K

2

+1.6VS

1

C234

4.7U_0805_6.3V6K

2

+1.6VS

1

C243

4.7U_0805_6.3V6K

2

+1.5VS

1

C252

4.7U_0805_6.3V6K

2

+3VALW +1.6VALW

1

C260

4.7U_0805_6.3V6K

2

+5VALW +5VS

1

C268

4.7U_0805_6.3V6K

2

HT1VDD_EN<11>

2N7002_SOT23

1

C218

4.7U_0805_6.3V6K

2

1

C226

0.1U_0402_10V6K

2

1

C235

0.1U_0402_10V6K

2

1

C244

0.1U_0402_10V6K

2

1

C253

0.1U_0402_10V6K

2

2

C213

0.1U_0402_10V6K

1

1

C269

0.1U_0402_10V6K

2

+1.2V_HT

D

Q10

S

HT1VDD_EN

R117
1K_0402_5%

1 2
13

G

2

1

C219

0.1U_0402_10V6K

2

1

C227

0.1U_0402_10V6K

2

1

C236

0.1U_0402_10V6K

2

1

C245

0.1U_0402_10V6K

2

1

C254

0.1U_0402_10V6K

2

1

C262

0.1U_0402_10V6K

2

+12VALW

1 2

1

2

1

C222

0.1U_0402_10V6K

2

1

C230

0.1U_0402_10V6K

2

1

C239

0.1U_0402_10V6K

2

1

C248

0.1U_0402_10V6K

2

1

C257

0.1U_0402_10V6K

2

1

C265

4.7U_0805_6.3V6K

2

+1.2VS

1

2

1

D

Q9
SI2302DS_SOT23

S3G

2

0.1U_0402_10V6K

SI2302DS: N CHANNEL
VGS: 4.5V, RDS: 85 mOHM
VGS: 2.5V, RDS: 115mOHM
Id(MAX): 2.8A
VGS(MAX): +-8V

1

C223

0.1U_0402_10V6K

2

1

C231

0.1U_0402_10V6K

2

1

C240

0.1U_0402_10V6K

2

1

C249

0.1U_0402_10V6K

2

1

C258

0.1U_0402_10V6K

2

1

C266

0.1U_0402_10V6K

2

C272

4.7U_0805_6.3V6K

1

C274

2

+3VS

1

C796
1000P_0402_50V7K

2

+1.2V_HT

1

C275

2

4.7U_0805_6.3V6K

1

C224

0.1U_0402_10V6K

2

1

C232

0.1U_0402_10V6K

2

1

C241

0.1U_0402_10V6K

2

1

C250

0.1U_0402_10V6K

2

1

C259

0.1U_0402_10V6K

2

1

C267

0.1U_0402_10V6K

2

1

C225

0.1U_0402_10V6K

2

1

C233

0.1U_0402_10V6K

2

1

C242

0.1U_0402_10V6K

2

1

C251

0.1U_0402_10V6K

2

+3VS

1

C794
1000P_0402_50V7K

2

1

C797
1000P_0402_50V7K

2

1

C795
1000P_0402_50V7K

2

+3V

1

C798
1000P_0402_50V7K

2

1

C804
1000P_0402_50V7K

2

+3VALW

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONF IDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVIS ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONT AINS

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITT EN CO NSE NT OF COMPAL ELECTRONICS, INC.

2

nVIDIA CrushK8 (Power & Ground)

Size Document N u mb er Re v

C

LA-2392

Date: Sheet

1

13 53Friday, April 16, 2004

of

0.1

5

AGP_AD[0..31] <11>
AGP_ADSTBF[0..1] <11>
AGP_ADSTBS[0..1] <11>
AGP_ST[0..2] <11>

AGP_C/BE#[0..3] <11>

D D

C C

B B

A A

+3VS +3VS

12

R493
10K_0402_5%

STOP_AGP

AGP_ADSTBS0 AGP_ADSTBS1

12

R508
@220K_0402_5%

DACRSET DACVREF

12

R512
113_0402_1%

DAC2REST DAC2VREF

12

R536

63.4_0402_1%

+1.5VS

12

R522
1K_0402_1%

+AGPVREF

12

R527
1K_0402_1%

1

2

C637

0.1U_0402_10V6K

12

R494
@10K_0402_5%

AGP_BUSY#

12

R509
@220K_0402_5%

1

C635

0.01U_0402_16V7K

2

1

C638

0.01U_0402_16V7K

2

+3VS

1

C772

4.7U_0805_6.3V6K

2

Place close to U43.6

+3VS

6

U43

VDD

1

X1/CLK

CLKOUT

7
8

X2

FS1
FS2

SS%

GND

P2180A_SO8

3

+3VS

27MOUT XTALSSIN

R557 1K_0402_5%

12
12

R558 1K_0402_5%

SST Ratio selection table for W180

Modulation setting

SS%

0 1.25%
1

5

0.1U_0402_10V6K

5

2

R559

4

1K_0402_5%

SST Ratio

3.75%

AGP_CLK

12

R556
@10_0402_5%

1

C746
@10P_0402_25V8K

2

1

C773

2

R590

1 2

22_0402_5%

12

PCIRST_AGP#<12>
AGP_GNT#<11>

AGP_REQ#<11>
AGP_FRAME#<11>
AGP_IRDY#<11>
AGP_TRDY#<11>
AGP_DEVSEL#<11>
AGP_STOP#<11>
AGP_PAR<11>
PIRQE#<12>

AGP_CLK<11>

AGP_RBF#<11>
AGP_WBF#<11>
AGP_PIPE#<11>

XTALSSIN

CRT_R<18>
CRT_G<18>

CRT_B<18>
CRT_HSYNC<18>
CRT_VSYNC<18>

TV_CRMA<18,34>
TV_LUMA<18,34>
TV_COMPS<18,34>

XTALSSIN

12

R562
@10_0402_5%

1

C774
@10P_0402_25V8K

2

4

AD30
AE30
AD29
AE29
AD28
AG30
AF28
AG29
AH30
AC28
AH29
AE28

AJ30
AG28
AK30
AG27
AH23

AJ24
AH22
AK24
AH21

AJ22
AH20
AK22
AG21

AJ19
AG18
AK19
AG19

AJ18
AF19
AK18

AH28

AJ27
AK25
AF21

AH11
AG12
AK12
AH24

AJ25
AH25
AK27
AH26
AH27
AK11

AJ12

AJ13
AG15
AF18
AF10
AG10
AC30

AH16
AH17

AJ15
AF15
AK15
AG16
AK16
AF16

AJ16
AH18

AK21

AJ21
AK28

AJ28
AF12

AF13
AG13

AJ9

AJ10

AH8

AH10

AH9

AJ8

AK9

AA2

W3

AA3

W2

AJ7
AK7

AH7
AH6

B30
B29
A30
A29

AJ3

R537
10K_0402_5%

1 2

Y2

Y3
Y1

A9

U38A

PCIAD0
PCIAD1
PCIAD2
PCIAD3
PCIAD4
PCIAD5
PCIAD6
PCIAD7
PCIAD8
PCIAD9
PCIAD10
PCIAD11
PCIAD12
PCIAD13
PCIAD14
PCIAD15
PCIAD16
PCIAD17
PCIAD18
PCIAD19
PCIAD20
PCIAD21
PCIAD22
PCIAD23
PCIAD24
PCIAD25
PCIAD26
PCIAD27
PCIAD28
PCIAD29
PCIAD30
PCIAD31

PCICBE#0
PCICBE#1
PCICBE#2
PCICBE#3

PCIRST#
PCIGNT#
PCIREQ#
PCIFRAME#
PCIIRDY#
PCITRDY#
PCIDEVSEL#
PCISTOP#
PCIPAR
PCIINTA#

PCICLK
AGPRBF#

AGPWBF#
AGPPIPE#
AGPBUSY#
AGPSTOP#
AGPVREF

AGPSBSTB
AGPSBSTB#

AGPSBA0
AGPSBA1
AGPSBA2
AGPSBA3
AGPSBA4
AGPSBA5
AGPSBA6
AGPSBA7

AGPADSTB1
AGPADSTB1#
AGPADSTB0
AGPADSTB0#

AGPST0
AGPST1
AGPST2

DACRED
DACGREEN
DACBLUE
CRTHSYNC
CRTVSYNC
DACRSET
DACVREF

DAC2RED
DAC2GREEN
DAC2BLUE
DAC2HSYNC
DAC2VSYNC
DAC2REST
DAC2VREF

XTALIN
XTALOUT

XTALSSIN
XTALSOUTBUFF

MSTRAPSEL0
MSTRAPSEL1
MSTRAPSEL2
MSTRAPSEL3

BUFRST#
TESTMODE

SA000040300(0304231100)

PCI/AGP BUS InterfaceDAC

CLOCK

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6

GPIO7
ROMCS_
ROMA14

ROMA15

VIPD0
VIPD1
VIPD2
VIPD3
VIPD4
VIPD5
VIPD6
VIPD7

VIPHAD0
VIPHAD1
VIPPCLK
VIPHCLK
VIPHCTL

GPIO/VIP InterfaceI2C

DVOD0
DVOD1
DVOD2
DVOD3
DVOD4
DVOD5
DVOD6
DVOD7
DVOD8

DVOD9
DVOD10
DVOD11

DVOVSYNC
DVOHSYNC

DVODE

DVOCLKOUT

DVOCLKOUT#

DVOCLKIN

DVO Interface

DVOVREF

I2C0SCL

I2C0SDA

I2C1SCL

I2C1SDA

I2C2SCL

I2C2SDA

IFP0VREF
IFP0RSET
IFP1VREF
IFP1RSET

TXD0

TXD0#

TXD1

TXD1#

TXD2

TXD2#

TXD3

TXD3#

TXC0

TXC0#

TXD4

TXD4#

TXD5

TXD5#

TXD6

TXD6#

TXD7

TXD7#

TXC1

TXC1#

LVDS/TMDS

TXD8

TXD8#

TXD9
TXD9#
TXD10

TXD10#

TXC2
TXC2#

FBACKE
FBVREF

FBACLK1#/NC(440)

FBACLK1/NC(440)
FBACLK0/NC(440)

FBACLK0#/NC(440)

SDRAM

AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6 MAP17_SUSP#
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31

AGP_C/BE#0
AGP_C/BE#1
AGP_C/BE#2
AGP_C/BE#3

AGP_BUSY#
STOP_AGP
+AGPVREF

AGP_ADSTBF1
AGP_ADSTBS1
AGP_ADSTBF0
AGP_ADSTBS0

AGP_ST0
AGP_ST1
AGP_ST2

CRT_R
CRT_G
CRT_B
CRT_HSYNC
CRT_VSYNC
DACRSET
DACVREF

TV_CRMA
TV_LUMA
TV_COMPS

DAC2REST
DAC2VREF

XTALIN
XTALOUT

27MOUT

STRAP0
STRAP1
STRAP2
STRAP3

4

3

C6
A6
A7
A8
C9
B9
C5
F3

AH2
J1

F2
K4

J3

VIPD2

H3

VIPD3

K5

VIPD4

G2

VIPD5

G1

VIPD6

F1

VIPD7

G3
C8

C7
B7
A5
B6

DVOD0

AK2

DVOD1

AK3

DVOD2

AH3

DVOD3

AJ1

DVOD4

AG1

DVOD5

AG2

DVOD6

AD3

DVOD7

AE1

DVOD8

AE3

DVOD9

AE2

DVOD10

AG3

DVOD11

AH1

AC3

DVOHSYNC

AB3
AK1
AD2
AD1

DVOCLKIN

AB2

DVOVREF

AB1

AK4
AJ4

I2C1SCL

AH5

I2C1SDA

AH4

I2C2SCL

AK6

I2C2SDA

AJ6

IFP0VREF

R2

IFP0RSET

R1

IFP1VREF

L2

IFP1RSET

L1

LVDSA0+

P5

LVDSA0-

P4

LVDSA1+

R5

LVDSA1-

R4

LVDSA2+

R3

LVDSA2-

P3
P1
P2

LVDSAC+

K2

LVDSAC-

K1

LVDSB0+

U5

LVDSB0-

U4

LVDSB1+

U3

LVDSB1-

T3

LVDSB2+

V5

LVDSB2-

V4
W5
W4

LVDSBC+

T5

LVDSBC-

T4

N3
M3
M5
M4
N5
N4
L3
K3

FBACKE

N28

FBVREF

A18

FBACLK0#

A4

FBACLK0

B4

FBACLK1

C21

FBACLK1#

C20

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

12

R583
1K_0402_5%

RP94

DDC_CLK_CRT

1 8

DDC_DAT_CRT

2 7

DDC_CLK_LCD

3 6

DDC_DAT_LCD

4 5

33_0804_8P4R_5%

LVDSA0+ <17>
LVDSA0- <17>
LVDSA1+ <17>
LVDSA1- <17>
LVDSA2+ <17>
LVDSA2- <17>

LVDSAC+ <17>
LVDSAC- <17>

LVDSB0+ <17>
LVDSB0- <17>
LVDSB1+ <17>
LVDSB1- <17>
LVDSB2+ <17>
LVDSB2- <17>

LVDSBC+ <17>
LVDSBC- <17>

12

R571
1K_0402_5%

DDC_CLK_CRT
DDC_DAT_CRT
DDC_CLK_LCD
DDC_DAT_LCD

XTALIN

1

C642
22P_0402_50V8J

2

ENABLT <17,30>
ENVDD <17>

DVOD3
DVOD4
DVOD5
DVOD2

2.2K_0804_8P4R_5%

RP91

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

DDC_CLK_CRT <18>
DDC_DAT_CRT <18>
DDC_CLK_LCD <17>
DDC_DAT_LCD <17>

RP95

1 8
2 7
3 6
4 5

Y6

4
1

27MHz_16PF_6P27000126

+5VS
+3VS

IFP0RSET

12

R532

1K_0402_1%

IFP1RSET IFP1VREF

12

R535

1K_0402_1%

3

GND

OUT

2

IN

GND

2

MAP17_SUSP#

1 8

VIPD6

2 7

DVOD0

3 6

DVOD11

4 5

10K_0804_8P4R_5%

VIPD2

1 8

DVOCLKIN

2 7

VIPD7

3 6
4 5

10K_1206_8P4R_5%

DVOD1

1 8

DVOD6

2 7

DVOD10

3 6

DVOD9

4 5

10K_0804_8P4R_5%

STRAP0
STRAP1
STRAP2
STRAP3

10K_0804_8P4R_5%

FBACKE

R534

10K_0402_5%

IFP0VREF

C639

0.047U_0402_10V4M

C641

0.047U_0402_10V4M

XTALOUT

1

C643
22P_0402_50V8J

2

2

RP93

RP89

RP90

RP92

1 8
2 7
3 6
4 5

1 2

1

2

1

2

+3VS

+3VS

11 1

11

0
1

00

DVOHSYNC

VIPD3

VIPD5

VIPD4

CRYSTAL

DVOD8 D VOD7

0

1

DVOD8

R501 @10K_0402_5%
R502 @10K_0402_5%

DVOD7

R503 @10K_0402_5%
R504 @10K_0402_5%

+2.5VS +2.5VS

VIPD3 VIPD4VIPD5DVOHSYNC

R523

@120_0402_5%

R528

@120_0402_5%

FBVREF

1

C640

0.1U_0402_10V6K

2

FBACLK1 FBACLK0

12

12

R525

32@100_0402_5%

FBACLK1#

12

+2.5VS

12

R530
1K_0402_1%

12

R533
1K_0402_1%

Compal Electronics, Inc.

Title

MAP17 AGP Inte rfac e(1/3)

Size Document Number Rev

Custom

LA-2392

Date: Sheet

1

DEVICE

0

R498 64@10K_0402_5%
R499 32@10K_0402_5%

R490 32@10K_0402_5%
R491 64@10K_0402_5%

R496 32@10K_0402_5%
R497 64@10K_0402_5%

R492 64@10K_0402_5%
R495 32@10K_0402_5%

MAP17-116(16MB)

* MAP17-232(32MB)

0

MAP17-464(64MB)

1

12
12

12
12

12
12

12
12

TVMODE

00

1

0

11

SECAM

* NTSC

PAL
VGA

12
12

12
12

R524

@120_0402_5%

R529

@120_0402_5%

DVOVREF

1

C636

0.1U_0402_10V6K

2

1

12

12

12

+3VS

14 53Friday, April 16, 2004

R526

32@100_0402_5%

12

12

+3VS

+3VS

FBACLK0#

R511
1K_0402_1%

R515
1K_0402_1%

0.1

of

5

MAP17-116/232 MAP17-464

+VGA_CORE * +1.2VS +1.35VS

+2.5VS

D D

C C

B B

1.5A

1

C646

2

4.7U_0805_6.3V6K

1

C665

2

0.1U_0402_10V6K

1

C747

2

0.1U_0402_10V6K

+VGA_CORE

0.1U_0402_10V6K

1

C647

2

0.1U_0402_10V6K

1

C666

2

0.1U_0402_10V6K

1

C748

2

3.3A

1

2

4.7U_0805_6.3V6K

1

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C648

2

1000P_0402_50V7K

0.1U_0402_10V6K

1

C667

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C749

2

0.1U_0402_10V6K

4.7U_0805_6.3V6K

1

C682

C683

2

1000P_0402_50V7K

1

C696

C695

2

1

C649

2

0.1U_0402_10V6K

1

C668

2

0.1U_0402_10V6K

1

C750

2

0.1U_0402_10V6K

1

C684

2

0.1U_0402_10V6K

1

C697

2

10P_0402_50V8K

10P_0402_50V8K

1

C650

2

0.1U_0402_10V6K

1

C669

2

0.1U_0402_10V6K

1

C751

2

1000P_0402_50V7K

1

C685

2

0.1U_0402_10V6K

1

C698

2

1

C651

2

0.1U_0402_10V6K

1

C670

2

0.1U_0402_10V6K

1

C752

2

0.1U_0402_10V6K

1

C686

2

10P_0402_50V8K

1

C699

2

1000P_0402_50V7K

0.1U_0402_10V6K

1

C652

2

1000P_0402_50V7K

1

C671

2

0.1U_0402_10V6K

1

C753

2

0.1U_0402_10V6K

1

C687

2

10P_0402_50V8K

1

C700

2

4

1

C644

2

1

C672

2

1

C754

2

1

C645

2

0.1U_0402_10V6K

1

C673

2

10P_0402_50V8K

1

C755

2

0.1U_0402_10V6K

+VGA_CORE

+2.5VS

+1.2VS

2 1

4.7U_0805_6.3V6K

U38B

E4

VDDFBIO

G4

VDDFBIO

J4

VDDFBIO

AD4

VDDFBIO

AF4

VDDFBIO

D5

VDDFBIO

F5

VDDFBIO

D7

VDDFBIO

E6

VDDFBIO

AB27

VDDFBIO

AD27

VDDFBIO

AF27

VDDFBIO

AE26

VDDFBIO

D9

VDDFBIO

D22

VDDFBIO

D24

VDDFBIO

AG24

VDDFBIO

E25

VDDFBIO

AF25

VDDFBIO

D26

VDDFBIO

F26

VDDFBIO

AG26

VDDFBIO

E27

VDDFBIO

G27

VDDFBIO

J27

VDDFBIO

AG5

NC/VDDFBIO(440)

AF6

NC/VDDFBIO(440)

AG7

NC/VDDFBIO(440)

AE5

NC/VDDFBIO(440)

L6

VDD

P6

VDD

U6

VDD

Y6

VDD

D11

VDD

F11

VDD

AE11

VDD

D14

VDD

F14

VDD

AE14

VDD

D17

VDD

F17

VDD

AE17

VDD

D20

VDD

F20

VDD

AE20

VDD

L25

VDD

P25

VDD

U25

VDD

Y25

VDD

L27

VDD

P27

VDD

U27

VDD

Y27

VDD

SA000040300(0304231100)

JOPEN1

C663

+1.35VS

2 1
1

2

3

1

C743
22U_1206_10V4Z

2

JOPEN2

near JOPEN1,2

1

C664

0.1U_0402_10V6K

2

VDDAGP
VDDAGP
VDDAGP
VDDAGP
VDDAGP
VDDAGP
VDDAGP
VDDAGP
VDDAGP
VDDAGP

VDDFBC
VDDFBC
VDDFBC
VDDFBC
VDDFBC
VDDFBC
VDDFBC

VDDFBC
NC/VDDFBC(440)
NC/VDDFBC(440)
NC/VDDFBC(440)
NC/VDDFBC(440)
NC/VDDFBC(440)
NC/VDDFBC(440)
NC/VDDFBC(440)
NC/VDDFBC(440)

VDD33
VDD33
VDD33
VDD33
VDD33
VDD33

VD50CLAMP
VD50CLAMP

DACVDD

DAC2VDD

PLLVDD

VDDDVO

VDDDVO
IFPAIOAVDD
IFPAIOBVDD

IFPBIOVDD
IFPAPLLVDD
IFPBPLLVDD

+VGA_CORE

AG14
AK14
AG17
AK17
AG20
AK20
AK23
AK26
AK29
AF30

J25
G6
J6
F22
F24
F7
G25
F9
AB6
AD6
AE7
AE9
AE22
AE24
AB25
AD25

E1
H1
AC1
AF1
L4
Y4

D4
AG11

AK10
AA1
AK5
AF3
AG4
T1
U1
M1
V1
N1

+1.5VS

+2.5VS

+3VS

+5VS

+IFPBIOVDD
+IFPBPLLVDD

0.1U_0402_10V6K

1

C653

2

+3VS
+3VS
+3VS

1

+3VS

+2.8VS

2

1

C654

2

10P_0402_50V8K

0.1U_0402_10V6K

1

C674

2

0.1U_0402_10V6K

1

C756

2

+3VS

C707

0.1U_0402_16V4Z

2

0.1U_0402_10V6K

1

C655

2

1

C675

2

0.1U_0402_10V6K

1

C689

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

2

1

C758

2

0.1U_0402_10V6K

1

2

1000P_0402_50V7K

0.1U_0402_10V6K

1

2

0.1U_0402_10V6K

1

C694

2

C757

0.1U_0402_10V6K

+5VS

0.1U_0402_10V6K

1

C656

2

1

C676

2

0.1U_0402_10V6K

1

2

0.1U_0402_10V6K

1

C714

2

1

C759

0.1U_0402_10V6K

2

+3VS

1

C799
1000P_0402_50V7K

2

1

C657

C658

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C681

2

0.1U_0402_10V6K

1

C690

2

0.1U_0402_10V6K

1

C715

2

0.1U_0402_10V6K

1

C659

2

C678

0.1U_0402_10V6K

C691

0.1U_0402_10V6K

1

C716

2

0.1U_0402_10V6K

1

C800
1000P_0402_50V7K

2

1

C660

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C679

2

0.1U_0402_10V6K

1

C688

2

0.1U_0402_10V6K

1

C717

2

1

C805
1000P_0402_50V7K

2

1

0.1U_0402_10V6K

1

C661

2

1

C680

2

1

C692

2

+3VS

1

C718

4.7U_0805_6.3V6K

2

+1.5VS

1

C662

2

4.7U_0805_6.3V6K

+2.5VS

2.1A

1

C677

2

4.7U_0805_6.3V6K

1

C693

2

0.1U_0402_10V6K

1

C806
1000P_0402_50V7K

2

+VGA_CORE

1

C762

2

0.1U_0402_10V6K

1

C768

2

0.1U_0402_10V6K

1000P_0402_50V7K

1

C763

2

10P_0402_50V8K

0.1U_0402_10V6K

1

C769

2

0.1U_0402_10V6K

1

1

2

0.1U_0402_10V6K

1

A A

2

0.1U_0402_10V6K

5

C760

0.1U_0402_10V6K

C766

C761

2

1

C767

2

1

C764

2

1

C770

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C765

2

0.1U_0402_10V6K

1

C771

2

4

1

C733
10P_0402_50V8K

2

1

C731
4700P_0402_25V7K

2

1

C732
1U_0603_10V6K

2

+3VS

1

C710
10P_0402_50V8K

2

Close to pin#AK10 Close to pin#V1

+IFPBIOVDD +IFPBPLLVDD

12

R581
10K_0402_5%

12

R582
10K_0402_5%

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1

C706
10P_0402_50V8K

2

Close to pin#T1

1

C708
4700P_0402_25V7K

2

1

C704
4700P_0402_25V7K

2

1

C709
1U_0603_10V6K

2

1

C705
1U_0603_10V6K

2

2

+2.8VS

+3VS

1

C730
10P_0402_50V8K

2

1

C728
4700P_0402_25V7K

2

1

C729
1U_0603_10V6K

2

+3VS

Close to pin#AA1

1

C724
10P_0402_50V8K

2

+PLL_VDD

1

C722
4700P_0402_25V7K

2

1

C723
1U_0603_10V6K

2

+3VS

Close to pin#AK5

Compal Electronics, Inc.

Title

MAP17 Power (2/3)

Size Document Number Rev

Custom

LA-2392

Date: Sheet

1

of

15 53Friday, April 16, 2004

0.1

5

4

3

2

1

U38D

K10

GND/NO PIN(440)

L10

GND/NO PIN(440)

M10

GND/NO PIN(440)

N10

GND/NO PIN(440)

P10

GND/NO PIN(440)

R10

GND/NO PIN(440)

T10

GND/NO PIN(440)

U10

GND/NO PIN(440)

V10

D D

C C

B B

A A

W10

AA10

W11

AA11

W12

AA12

W13

AA13

W14

AA14

W15

AA15

W16

AA16

AD11
AF11

AJ11

AH12

AD14
AF14

AJ14

Y10
K11

L11
M11
N11

P11
R11

T11
U11

V11

Y11

K12

L12
M12
N12

P12
R12

T12
U12

V12

Y12

K13

L13
M13
N13

P13
R13

T13
U13

V13

Y13

K14

L14
M14
N14

P14
R14

T14
U14

V14

Y14

K15

L15
M15
N15

P15
R15

T15
U15

V15

Y15

K16

L16
M16
N16

P16
R16

T16
U16

V16

Y16

K17
AB7
AD7
AF7

B8
E9

G9
AD9
AF9

B11
E11

G11

B14
E14

G14

Y7

E17

G17

B17

GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)
GND/NO PIN(440)

SA000040300(0304231100)

5

L17
M17
N17
P17
R17
T17
U17
V17
W17
Y17
AA17
K18
L18
M18
N18
P18
R18
T18
U18
V18
W18
Y18
AA18
K19
L19
M19
N19
P19
R19
T19
U19
V19
W19
Y19
AA19
K20
L20
M20
N20
P20
R20
T20
U20
V20
W20
Y20
AA20
K21
L21
M21
N21
P21
R21
T21
U21
V21
W21
Y21
AA21
AF17

GND

AJ17

GND

B20

GND

E20

GND

G20

GND

AD20

GND

AF20

GND

AJ20

GND

E22

GND

G22

GND

AD22

GND

AF22

GND

B23

GND

AJ23

GND

E24

GND

G24

GND

J24

GND

L24

GND

P24

GND

U24

GND

Y24

GND

AB24

GND

AD24

GND

AF24

GND

D25

GND

F25

GND

AE25

GND

AG25

GND

B26

GND

E26

GND

G26

GND

J26

GND

L26

GND

P26

GND

U26

GND

Y26

GND

AB26

GND

AD26

GND

AF26

GND

AJ26

GND

F27

GND

AE27

GND

E29

GND

H29

GND

L29

GND

P29

GND

U29

GND

Y29

GND

AC29

GND

AF29

GND

AJ29

GND

4

U38C

AG9

AH15

M26

AD17
AG22
AH19

AK13

AC2

AD5

AG6

A1

NC

B1

NC

C1

NC

D1

NC

A2

NC

C2

NC

D2

NC

J2

NC

A3

NC

B3

NC

C3

NC

V3

NC

C4

NC

AA4

NC

AB4

NC

AA5

NC
NC

A10

NC

C10

NC

D10

NC

E10

NC

A11

NC
NC

A13

NC

C13

NC

E13

NC

A14

NC

C14

NC

A15

NC

B15

NC

C15

NC

D15

NC

E15

NC

A16

NC

B16

NC

C16

NC

D16

NC

E16

NC

A17

NC

C17

NC

B18

NC

C18

NC

D18

NC

E18

NC

B19

NC

C19

NC

D19

NC

E19

NC

A20

NC

A21

NC

B21

NC

D21

NC

E21

NC

A22

NC

B22

NC

C22

NC

A23

NC

C23

NC

B24

NC

C24

NC

A25

NC

B25

NC

C25

NC

T26

NC

C26

NC

K26

NC
NC

N26

NC

R26

NC

A26

NC

A12

NC
NC
NC
NC
NC

B2

GND

E2

GND

H2

GND
GND

AF2

GND

AJ2

GND

F4

GND

AE4

GND

B5

GND

E5

GND

G5

GND

J5

GND

L5

GND

Y5

GND

AB5

GND
GND

AF5

GND

AJ5

GND

D6

GND

F6

GND

AE6

GND
GND

P7

GND

NC(440)//FBACAS#

NC/NO PIN(440)

IFP1PLLGND
IFP0PLLGND

GND
GND

DAC2GND

DACGND

IFP1IOGND

IFPIOAGND
IFPIOBGND

GND
GND
GND

C30

NC

V26

NC

W26

NC

A27

NC

B27

NC

C27

NC

D27

NC

K27

NC

M27

NC

N27

NC

R27

NC

T27

NC

V27

NC

Y17

NC

W27

NC

A28

NC

B28

NC

C28

NC

E28

NC

G28

NC

H28

NC

L28

NC

M28

NC

P28

NC

R28

NC

T28

NC

U28

NC

V28

NC

W28

NC

Y28

NC

AA28

NC

AB28

NC

C29

NC

D29

NC

F29

NC

G29

NC

J29

NC

K29

NC

M29

NC

N29

NC

T29

NC

V29

NC

F28

NC

K28

NC

AA26

NC

E12

NC

R29

NC

W29

NC

AA29

NC

AB29

NC

B13

NC

D30

NC

E30

NC

F30

NC

H30

NC

L30

NC

N30

NC

P30

NC

R30

NC

T30

NC

U30

NC

V30

NC

Y30

NC

AA30

NC

AB30

NC

D13

NC

J28

NC

AA27

NC

D28

NC

C11

NC

B10

NC

A24

NC

E3

NC

D3

NC

B12

NC

C12

NC

G30

NC

J30

NC

K30

NC

AH13

NC

A19

NC

M30

NC

W30

NC

AH14

NC

D12
AC4

L7
U7
W1
AK8
N2
M2
V2
T2
U2
E7
G7
J7

+3VS

1U_0603_10V6K

+3VS

R578 10K_0402_5%

C780

1

2

12

SA000040300(0304231100)

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

U44

4

VIN

2

SENSE or ADJ

DELAY
ERROR7CNOISE

8

SD

SI9182DH-AD_MSOP8

+2.8VS

5

VOUT

GND

6
1
3

R576

1 2

61.9K_0603_1%

12

1

R577

C782

47K_0603_1%

2

1

C781
1U_0603_10V6K

2

0.01U_0402_16V7K

Compal Electronics, Inc.

Title

MAP17 NC/GND(3/3)

Size Document Number Rev

Custom

LA-2392

Date: Sheet

1

of

16 53Friday, April 16, 2004

0.1

A

B

C

D

E

F

G

H

1 1

LVDSA2+<14>

LVDSA2-<14>

LVDSA1+<14>
LVDSA1-<14>

LVDSB2+<14>
LVDSB2-<14>

LVDSA0+<14>
LVDSA0-<14>

LVDSAC+<14>
LVDSAC-<14>

LVDSB1+<14>
LVDSB1-<14>

2 2

LCD Panel Connector

JP6

LVDSA2+
LVDSA2-

LVDSA1+

LVDSB2+
LVDSB2-

LVDSA0+
LVDSA0-

LVDSAC+
LVDSAC-

LVDSB1+
LVDSB1-

+3VS

1
3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

ACES_88107-4001_40P

2

1

2

4

3

4

6

5

6

8

7

8

LVDSB0+

10

9

10

LVDSB0-LVDSA1-

12

11

12

14

13

14

LVDSBC+

16

15

16

LVDSBC-

18

17

18

20

19

20

DISPOFF#

22

21

22

24

23

24

26

25

26

28

27

28

DDC_CLK_LCD

30

29

30

DDC_DAT_LCD

32

31

32

34

33

34

36

35

36

38

37

38

40

39

40

LVDSB0+ <14>

LVDSB0- <14>

LVDSBC+ <14>

LVDSBC- <14>

INVT_PWM <30>
DAC_BRIG <30>

INVPWR_B+

The cap.'s colsely to LCD CONN.

+LCDVDD_A

DDC_CLK_LCD <14>
DDC_DAT_LCD <14>

1

C302

2

10U_0805_10V4Z

1000P_0402_50V7K

1

C303

2

+12VALW

L4

1 2

KC FBM-L11-201209-221LMAT_0805

1

C304

0.01U_0402_16V7K

2

EMI require

INVPWR_B+

1

C622

0.01U_0402_25V4Z

2

+LCDVDD

1

C623

0.01U_0402_25V4Z

2

+3VS

1

1

C305

4.7U_0805_10V4Z

2

+3VS

R141

4.7K_0402_5%

1 2

BKOFF#<30>

ENABLT<14,30>

KC FBM-L11-201209-221LMAT_0805

21

D7 RB751V_SOD323

21

D8 RB751V_SOD323

L5

1 2

DISPOFF#

INVPWR_B+B+

D

R146

+LCDVDD

+12VALW

Q14

12

R147
1K_0402_5%

13

D

S

R149
100K_0402_5%

1 2

2

G

3 3

2N7002_SOT23

1

O

Q16
DTC124EK_SC59

G

I

3

ENVDD<14>

ENVDD

2

2

G

100K_0402_5%

1 2

R148

150K_0402_5%

13

D

Q15

S

2N7002_SOT23

G

2

1

C306

2

1 2

0.047U_0402_16V4Z

0.1U_0402_16V4Z

SI2302DS: N CHANNEL
VGS: 4.5V, RDS: 85 mOHM
VGS: 2.5V, RDS: 115mOHM
Id(MAX): 2.8A
VGS(MAX): +-8V

S

3

C307

Q13
SI2302DS_SOT23

1

2

+LCDVDD

1

C308

4.7U_0805_10V4Z

2

4 4

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

E

F

Size Document Number Rev

LA-2392

Date: Sheet of

Compal Electronics, Inc.

LVDS Connector

G

0.1

17 53Friday, April 16 , 2004

H