Compal LA-2301 Schematics

5

D D

4

3

2

1

C C

Compal Confidential

Fortworth20 EDW10 Schematic Document

Intel Protability Processor with ATi RC300ML + IXP150

2004-05-26

B B

REV: 1.0

A A

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET N OR THE INFORMATION I T CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Re v

B

Date: Sheet

Compal Electronics, Inc.

Cover Sheet

LA-2301

148Tuesday, May 18, 2004

1

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Compal confidential

4

3

2

1

Block Diagram

Model Name : Fortworth 20

D D

File Name : LA-2301 Rev: 0.1

Fan Control

page 37

CRT Connector

page 18

LVDS Connector

TV Connector

C C

Mini-PCI

page 28

B B

IEEE 1394

TI TSB43AB21A

page 27

Realtek RTL8100CL

LAN

RJ45

page 26

page 18

page 10

PCI BUS

page 26

3.3V 33MHz

CardBus / SD / SM /
MMC / MS Pro / XD

ENE CB714

Slot 0

page 25

page 24

5 in 1
Conn.

page 25

Super I/O

SMsC

Power On/Off
Reset & RTC

page 35

LPC47N217

page 32

NorthWood-MT -- 533

Presscot-MT--533

uFCPGA 478 Pin

FSB

400/533 MHz

ATi RC300ML

BGA-718 Pin

page 7,8,9,10,11,12

A-Link

66MHz 4X 266MB/s

ATi SB200C
IXP 150

BGA-457Pin

page 19,20,21,22

LPC BUS

3.3V 33MHz

K/B Controller

ENE KB910

page 4,5,6

HD#(0..63)HA#(3..31)

3.3V 48MHz USB2.0

page 33

Thermal Sensor

ADM1032

Memory BUS(DDR)

2.5V 200MHz DDR266/333

3.3V 24.576MHz

3.3V ATA100

HDD

page 23

page 5

USB port 0, 1, 2, 3

USB conn

AC-Link

CDROM

page 23

Clock Generator

ICS951402

page 17

200pin DDR-SODIMM X1

BANK 0, 1, 2, 3

page 15,16

page 13,14

On Board RAM
x 8 cells

USBx3

page 29

AC97 Codec

ALC250

page 30

AMP& Phone
Jack

page 31

MDC

page 30

RJ11

page 30

DC/DC Interface
Suspend

A A

page 37

Parallel Port

FIR Module

page 32

TFDU6102-TR3

page 32

Int.KBD

page 33

EC I/O Buffer

page 34

Touch Pad

T/P Switch Board

Power Circuit
DC/DC

page 38,39,40,41
42,43,44,45,46

5

4

Flash ROM

SST39VF040-90-4C-NH

page 34

Title

Size Document Number Re v

B

3

2

Date: Sheet

Compal Electronics, Inc.

Block Diagram

LA-2301

248Tuesday, May 18, 2004

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1

Voltage Rails

Power Plane Description

D D

C C

VIN

B+

+CPU_CORE

+CPU_VID ON OFF OFF1.2V rail for Processor VID

+1.25VS 1.25V switched power rail

+1.8VS

+2.5VALW ON*ON*

+2.5V

+2.5VS 2.5V switched power rail

+3VALW

+3V

+3VS

+5VALW

+5V 5V power rail OFFONON

+5VS

+12VALW

RTCVCC

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

1.8V switched power rail

2.5V always on power rail

2.5V power rail

3.3V always on power rail

3.3V power rail

3.3V switched power rail

5V always on power rail

5V switched power rail

12V always on power rail

RTC power

S0-S1 S3 S5

N/A N/A N/A

ON OFF

ON OFF

OFF OFF

ON

ON

ON

ON

OFF

ON

ON ON *

ON

ON

ON

OFF

ON

ON

ON

OFF

ON

ON

ON

ON

ON

N/AN/AN/A

OFF

OFF

OFF

OFF

OFF

OFF

ON*

OFF

ON*

ON

Board ID Table for AD channel

Vcc 3.3V +/- 5%

0
1

100K +/- 5%Ra

Rb V min

0

8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%

AD_BI D

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

0.1

Board ID

0
1
2
3
4
5
6
7 NC

Board ID PCB Revision

Vtyp

AD_BI D

V

AD_BI D

0 V 0 V

0.503 V

0.819 V

0.538 V

0.875 V

1.185 V 1.264 V

2.200 V

3.300 V

2.341 V

3.300 V

max

2
3

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

External PCI Devices

4
5
6
7

IDSEL # PIRQREQ/GNT #DEVICE

NB Internal VGA

LAN

CARD BUS

B B

5 in 1 AD20 2 B

Mini-PCI AD18 3

N/A

AD19

AD20 2

N/A

1

A

A1394 0AD16

D

A

C/D

EC SM Bus1 address

Device Address Address

Smart Battery

EEPROM(24C16)

1010 000X b

EC SM Bus2 address

Device

ADM1032

ALC250

1001 100X b0001 011X b

0000 000X b

I2C / SMBUS ADDRESSING

A A

DEVICE HEX ADDRESS

DDR SO-DIMM 0

CLOCK GENERATOR (EXT.)

5

A0

D2

1 0 1 0 0 0 1 X

1 1 0 1 0 0 1 X

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET N OR THE INFORMATION I T CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Re v

B

Date: Sheet

Compal Electronics, Inc.

Notes

LA-2301

348Tuesday, May 18, 2004

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HA#[3..31]7

H_REQ#[0..4]7

D D

C C

H_BR0# PU R :
Intel 220 Ohm
ATi RC300 51 Ohm
ATi RS250 56 Ohm

B B

+CPU_CORE

+CPU_CORE

HA#[3..31]

H_REQ#[0..4]

H_ADS#7

R1 56_0402_5%

1 2

R2 51_0402_5%

1 2

H_BREQ0#7
H_BPRI#7
H_BNR#7
H_LOCK#7

CLK_EXT_CPU17
CLK_EXT_CPU#17

H_HIT#7
H_HITM#7
H_DEFER#7

CLK_EXT_CPU
CLK_EXT_CPU#

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_ADS#

H_IERR#

H_BREQ0#

AB1

AC1

AA3
AC3

AF22
AF23

K2
K4
L6
K1
L3

M6

L2
M3
M4
N1
M1
N2
N4
N5

T1
R2

P3

P4
R3

T2
U1

P6
U3

T4

V2
R6

W1

T5
U4

V3

W2

Y1

J1

K5

J4

J3
H3
G1

V5

H6
D2
G2
G4

F3
E3
E2

A10

A12

JP1A

VCC_0
A#3
A#4
A#5
A#6
A#7
A#8
A#9
A#10
A#11
A#12
A#13
A#14
A#15
A#16
A#17
A#18
A#19
A#20

HOST

A#21
A#22

ADDR

A#23
A#24
A#25
A#26
A#27
A#28
A#29
A#30
A#31
A#32
A#33
A#34
A#35

REQ#0
REQ#1
REQ#2
REQ#3
REQ#4
ADS#

AP#0

CONTROL

AP#1
BINIT#
IERR#

BR0#
BPRI#
BNR#
LOCK#

CLK

BCLK0
BCLK1

CON

HIT#

TROL

HITM#
DEFER#

AMP_1473129-1

A14

VCC_1

A16

VCC_2

VSS_0H1VSS_1H4VSS_2

A18

VCC_3

H23

A20

VCC_4

H26

VCC_5

VSS_3

A11

AA10

AA12

VCC_6A8VCC_7

VSS_4

VSS_5

A13

A15

AA14

VCC_8

VSS_6

A17

AA16

VCC_9

VSS_7

A19

AA18

VCC_10

VCC_11

VSS_8

VSS_9

A21

AA8

VCC_12

VSS_10

A24

AB11

VCC_13

VSS_11

A26

AB13

VCC_14

VSS_12A3VSS_13A9VSS_14

AB15

VCC_15

AB17

VCC_16

AA1

AB19

VCC_17

VSS_15

AA11

AB7

VCC_18

VSS_16

AA13

AB9

VCC_19

VSS_17

AA15

AC10

VCC_20

VSS_18

AA17

AC12

VCC_21

VSS_19

AA19

AC14

VCC_22

VSS_20

AA23

AC16

AC18

AC8

AD11

AD13

AD15

AD17

AD19

AD7

AD9

AE10

AE12

AE14

AE16

AE18

AE20

AE6

VCC_23

VCC_24

VCC_25

VCC_26

VCC_27

VCC_28

VCC_29

VCC_30

VCC_31

VCC_32

VCC_33

VCC_34

VCC_35

VCC_36

VCC_37

VCC_38

VCC_39

POWER

Northwood-MT
Prescott-MT

GND

VSS_21

VSS_22

VSS_23

VSS_24

VSS_25

VSS_26

VSS_27

VSS_28

VSS_29

VSS_30

VSS_31

VSS_32

VSS_33

VSS_34

VSS_35

VSS_36

VSS_37

AA4

AA7

AA9

AA26

AB10

AB12

AB14

AB3

AB6

AB16

AB18

AB8

AB20

AB21

AB24

AC11

AC13

AE8

VCC_40

VSS_38

AC15

AF11

VCC_41

VSS_39

AC17

AF13

VCC_42

VSS_40

AC19

AF15

VCC_43

VSS_41

AC2

AF17

VCC_44

VSS_42

AC22

AF19

VCC_45

VSS_43

AC25

AF2

VCC_46

VSS_44

AC5

AF21

VCC_47

VSS_45

AC7

AF5

VCC_48

VSS_46

AC9

AF7

VCC_49

VSS_47

AD10

AF9

VCC_50

VSS_48

AD12

B11

VCC_51

VSS_49

AD14

B13

VCC_52

VSS_50

AD16

B15

VCC_53

VSS_51

AD18

B17

VCC_54

VSS_52

AD21

B19

VCC_55

VCC_56B7VCC_57B9VCC_58

VSS_53

VSS_54

AD4

AD23

C10

C12

C14

C16

C18

C20

D11

D13

D15

D17

D19

VCC_59

VCC_61

VCC_62

VCC_63

VCC_64

VCC_65C8VCC_66

VCC_67

VCC_68

VCC_69

VCC_70

HOST
ADDR

POWER

VCC_77

VCC_78

VCC_82

F15

VCC_83

F17

VCC_84

F19

VCC_85

F9

VCC_79E8VCC_80

F11

E16

E18

E20

BOOTSELECT

VSS_55

VCC_81

F13

AD1

AD8

D9

E10

VCC_71D7VCC_72

VCC_73

VCC_74

VCC_75

VCC_76

E12

E14

+CPU_CORE

D#0
D#1
D#2
D#3
D#4
D#5
D#6
D#7
D#8

D#9
D#10
D#11
D#12
D#13
D#14
D#15
D#16
D#17
D#18
D#19
D#20
D#21
D#22
D#23
D#24
D#25
D#26
D#27
D#28
D#29
D#30
D#31
D#32
D#33
D#34
D#35
D#36
D#37
D#38
D#39
D#40
D#41
D#42
D#43
D#44
D#45
D#46
D#47
D#48
D#49
D#50
D#51
D#52
D#53
D#54
D#55
D#56
D#57
D#58
D#59
D#60
D#61
D#62
D#63

+CPU_CORE

B21
B22
A23
A25
C21
D22
B24
C23
C24
B25
G22
H21
C26
D23
J21
D25
H22
E24
G23
F23
F24
E25
F26
D26
L21
G26
H24
M21
L22
J24
K23
H25
M23
N22
P21
M24
N23
M26
N26
N25
R21
P24
R25
R24
T26
T25
T22
T23
U26
U24
U23
V25
U21
V22
V24
W26
Y26
W25
Y23
Y24
Y21
AA25
AA22
AA24

HD#[0..63]

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

HD#[0..63] 7

H_BOOTSELECT 44

1 2

R5

R_C

@0_0402_5%

@

Pop: Northwood

2

Depop: Prescott

Title

Size Document Number Re v

B

Date: Sheet

Compal Electronics, Inc.

CPU(1/2)

LA-2301

448Tuesday, May 18, 2004

1

of

1.0

A A

5

4

3

5

+CPU_CORE

1 2

R11 56_0402_1%

1 2

R13 300_0402_1%

1 2

R14 56_0402_1%

1 2

R15 51_0402_5%

D D

12

C1

@10P_0402_50V8J

12

C4 180P_0402_50V8J

12

C5 180P_0402_50V8J

12

C6 180P_0402_50V8J

12

C7 180P_0402_50V8J

12

C8 180P_0402_50V8J

12

C9 180P_0402_50V8J

12

C10 180P_0402_50V8J

12

C11 180P_0402_50V8J

Place within 1.5" from CPU

C C

+CPU_CORE

LQG21F4R7N00_0805

L1

1 2

L2

1 2

LQG21F4R7N00_0805

33U_D2_8M_R35

B B

H_FERR#

H_PWRGD

H_THERMTRIP#

H_RESET#

1 2

R17

@22_0402_5%

H_INTR

H_NMI

H_CPUSLP#

H_SMI#

H_STPCLK#

H_IGNNE#

H_A20M#

H_INIT#

+CPU_CORE

C12

H_RS#07
H_RS#17
H_RS#27

H_TRDY#7

H_A20M#19

H_FERR#19
H_IGNNE#19
H_SMI#19
H_PWRGD19

H_STPCLK#19

H_INTR19
H_NMI19
H_INIT#19
H_RESET#7

H_DBSY#7

H_DRDY#7

BSEL012,17
BSEL112,17

H_THERMTRIP#6

R28 51_0402_5%

1 2

R29 51_0402_5%

1 2

R30 51_0402_5%

1 2

R31 51_0402_5%

1 2

R32 51_0402_5%

1 2

R33 51_0402_5%

1 2

RP1

1 8
2 7
3 6
4 5

1K_1206_8P4R_5%

1

+

2

R25 ->
Pop: Prescott
Depop: Northwood

VCCSENSE44
VSSSENSE44

+CPU_VID

R36 61.9_0603_1%

1 2

R37 61.9_0603_1%

1 2

H_A20M#
H_FERR#
H_IGNNE#
H_SMI#
H_PWRGD
H_STPCLK#

H_INTR
H_NMI
H_INIT#
H_RESET#

H_THERMDA
H_THERMDC

H_THERMTRIP#

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5

+VCCIOPLL
+VCCA

VCCSENSE
VSSSENSE

1 2

R35 0_0603_5%

+VCCVIDLB

ITP_TCK
ITP_TDI

ITP_TMS
ITP_TRST#

VSSA

25mil

COMP0
COMP1

AB2

AB23

AB25

AD6
AD5

AC6
AB5
AC4

AA5
AB4

AD20
AE23

AF3

AD22

AC26
AD26

JP1B

F1

G5

F4

J6

C6
B6
B2
B5

Y4

D1
E5

W5

H5
H2

B3
C4

A2

Y6

D4
C1
D5
F7
E6

A5
A4

L24

P1

GND

RS#0
RS#1
RS#2
RSP#
TRDY#

CON
TROL

A20M#
FERR#
IGNNE#
SMI#
PWRGOOD
STPCLK#

LINT0

LEGACY

LINT1
INIT#
RESET#

DBSY#
DRDY#
BSEL0
BSEL1

THERMDA
THERMDC

THERMTRIP#

BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5

TCK
TDI
TDO
TMS
TRST#

VCCIOPLL
VCCA

VCCSENSE
VSSSENSE
VCCVIDLB

VSSA

ITP_CLK0
ITP_CLK1

COMP0
COMP1

4

AE11

AE13

AE15

VSS_57

VSS_58

MISC

THER
MAL

MISC

MISC

ITP
CLK

AE17

AE19

VSS_59

VSS_60

ITP

3

D14

D16

D18

D20

D21

D24

E11

E13

E15

E17

E19

E23

VSS_111

VSS_112

VSS_113

VSS_114

VSS_115

E26

VSS_116

VSS_117E4VSS_118E7VSS_119E9VSS_120

AE22

AE24

AE7

AE9

AF1

AF10

AF12

AF14

AF16

AF18

AF20

AF6

AF8

B10

B12

B14

B16

B18

B20

B23

B26

C11

C13

C15

C17

C19

C22

C25

D10

D12

VSS_61

VSS_62

VSS_63

VSS_65

VSS_66

VSS_67

VSS_68

VSS_69

VSS_70

VSS_71

VSS_72

VSS_73

VSS_75

VSS_76

VSS_77

VSS_78

VSS_79

VSS_80

VSS_81

VSS_82

VSS_83

VSS_84

VSS_85B4VSS_86B8VSS_87

VSS_88

VSS_89

VSS_90

VSS_91

VSS_92C2VSS_93

VSS_94

VSS_95C5VSS_96C7VSS_97C9VSS_98

VSS_99

VSS_100

VSS_101

VSS_102

VSS_103

VSS_104

VSS_105

VSS_106D3VSS_107D6VSS_108D8VSS_109E1VSS_110

GROUND

Northwood-MT
Prescott-MT

GROUND MISC

2

H_SKTOCC#

R10

0_0402_5%

F10

F12

F14

F16

F18

VSS_121

VSS_122

VSS_123

F22

F25

F5

VSS_124

VSS_125F2VSS_126

VSS_127

VSS_128

REF

OPTIMIZED/COMPAT#

ITP

DATA

ADDR

DATA

MISC

AF26

SKTOCC#

DP#0
DP#1
DP#2
DP#3

GTLREF0
GTLREF1
GTLREF2
GTLREF3

TESTHI0
TESTHI1
TESTHI2
TESTHI3
TESTHI4
TESTHI5
TESTHI6
TESTHI7
TESTHI8

TESTHI9
TESTHI10
TESTHI11
TESTHI12

DSTBN#0
DSTBN#1
DSTBN#2
DSTBN#3

DSTBP#0
DSTBP#1
DSTBP#2
DSTBP#3

ADSTB#0
ADSTB#1

DBI#0
DBI#1
DBI#2
DBI#3

DBR#

PROCHOT#

MCERR#

SLP#

NC1
NC2
NC3
NC4
NC5

GTL Reference Voltage

12

1. < 1.5" from the CPU Ball.

2. 220P cap. has to be closed
to the ball as possible.

3. Intel: 0.63VCC.
ATi: 0.66VCC.

+GTLVREF1

J26
K25
K26
L25

AA21
AA6
F20
F6

AE26

AD24
AA2
AC21
AC20
AC24
AC23
AA20
AB22
U6
W4
Y3
A6
AD25

E22
K22
R22
W22

F21
J23
P23
W23

L5
R5

E21
G25
P26
V21

AE25

C3
V6
AB26

A22
A7
AF25
AF24
AE21

220P_0402_50V7K

+GTLVREF1

R_G

1 2

R18 @0_0402_5%

R21 56_0402_5%
R22 56_0402_5%
R23 56_0402_5%
R24 56_0402_5%
R25 56_0402_5%

CPU_GHI#

R26 300_0402_5%

H_DPSLPR#

R27 56_0402_5%

NC: W/O ITP

H_PROCHOT#

H_CPUSLP#

R19 56_0402_5%

R20 56_0402_5%

1 2

1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2

1

51.1_0603_1%

1

C2

1U_0603_10V6K

2

CPU_GHI# 20

H_DSTBN#0 7
H_DSTBN#1 7
H_DSTBN#2 7
H_DSTBN#3 7

H_DSTBP#0 7
H_DSTBP#1 7
H_DSTBP#2 7
H_DSTBP#3 7

H_ADSTB#0 7
H_ADSTB#1 7

H_DBI#0 7
H_DBI#1 7
H_DBI#2 7
H_DBI#3 7

H_PROCHOT# 43

H_CPUSLP# 19

Intel 852GME RDDP 56Ohm.
ATi RC300 51Ohm
ATi RS250 56 Ohm

1

C3

86.6_0603_1%

2

Pop: Northwood Imp: 50 Ohm
Depop: Prescott Imp:60 Ohm

+CPU_CORE

for mobile CPU

1 2

R34 51_0402_5%

+CPU_CORE

12

R12

15mil

12

R16

+CPU_CORE

width= 10mil

51.1 Ohm for Northwood,

61.9 Ohm for Prescott

AMP_1473129-1

CPU Temperature Sensor

+3VS

R39

1 2

200_0402_5%

A A

1

C15
@2200P_0603_50V7K

2

EC_SMC230,33

EC_SMD230,33

H_THERMDA

H_THERMDC

10mil

10mil

5

U1

2

D+

3

D-

8

SCLK

7

SDATA

ADM1032ARM_RM8

+3VS_THMSEN

1

C14

0.1U_0402_10V6K

2

VDD1

ALERT#

THERM#

GND

12

R42
10K_0402_5%

1

6

4

5

VSS_129F8VSS_130

G21

4

VSS_131

VSS_132G3VSS_133G6VSS_134J2VSS_135

G24

VSS_136

VSS_137J5VSS_138

VSS_139

VSS_140K3VSS_141K6VSS_142L1VSS_143

VSS_144

VSS_145L4VSS_146M2VSS_147

VSS_148

VSS_149M5VSS_150

VSS_151

VSS_152N3VSS_153N6VSS_154P2VSS_155

VSS_156

VSS_157P5VSS_158R1VSS_159

VSS_160

VSS_161R4VSS_162

VSS_163

VSS_164T3VSS_165T6VSS_166U2VSS_167

VSS_168

VSS_169U5VSS_170V1VSS_171

VSS_172

VSS_173V4VSS_174

VSS_175

VSS_176W3VSS_177W6VSS_178Y2VSS_179

J22

J25

PM_STPCPU#17,19,44

L23

K21

L26

K24

M22

M25

4.7K_0402_5%

R93

1 2

4.7K_0402_5%

MMBT3904_SOT23

N21

R86

2

N24

P22

P25

+3VS

12

2

3 1

Q3

T21

T24

R23

R26

H_DPSLPR#

Q4
MMBT3904_SOT23

3 1

3

V23

V26

U22

U25

+3VS

W21

W24

RP2

1 8
2 7
3 6
4 5

10K_1206_8P4R_5%

R40 10K_0402_5%

1 2

R41 10K_0402_5%

1 2

CPU_VID044
CPU_VID144
CPU_VID244
CPU_VID344
CPU_VID444
CPU_VID544

Y22

Y25

VSS_180

Y5

VSS_181

VID0

VID1

VID2

VID3

VID4

VID5

AE5

AE4

AE3

AE2

AE1

AD3

CPU_VID3

CPU_VID4

CPU_VID1

CPU_VID0

CPU_VID2

CPU_VID5

VCCVID

VIDPWRGD

+CPU_VID

AF4

AD2

25mil

1

C13

0.1U_0402_10V6K

2

Pop: Prescott
Depop: Northwood

R38
680_0402_5%

12

+CPU_VID

H_VID_PWRGD 35

Title

Size Document Number Re v

B

2

Date: Sheet

Compal Electronics, Inc.

CPU(2/2)

LA-2301

548Tuesday, May 18, 2004

1

1.0

of

5

4

3

2

1

+CPU_CORE

1

+

D D

C C

C16
220U_6SVPC220MV_6.3VM_R15

2

+CPU_CORE

1

+

C28
220U_6SVPC220MV_6.3VM_R15

2

+CPU_CORE

1

+

C649
220U_6SVPC220MV_6.3VM_R15

2

+CPU_CORE

1

+

C651
@220U_6SVPC220MV_6.3VM_R15

2

1

+

C18
220U_6SVPC220MV_6.3VM_R15

2

1

+

C30
220U_6SVPC220MV_6.3VM_R15

2

1

+

C17
220U_6SVPC220MV_6.3VM_R15

2

1

+

C19
220U_6SVPC220MV_6.3VM_R15

2

1

+

C31
220U_6SVPC220MV_6.3VM_R15

2

1

+

C29
@220U_6SVPC220MV_6.3VM_R15

2

1

+

C20
220U_6SVPC220MV_6.3VM_R15

2

1

+

C32
220U_6SVPC220MV_6.3VM_R15

2

1

+

C650
220U_6SVPC220MV_6.3VM_R15

2

Layout note :

Place close to CPU power and
ground pin as possible
(<1inch)

Sanyo : SGA27221300 (220uF, 13m Ohm)

+CPU_CORE

1

2

+CPU_CORE

1

2

+CPU_CORE

1

2

+CPU_CORE

1

2

+CPU_CORE

1

2

C21
22U_1206_10V4Z

C33
22U_1206_10V4Z

C40
@22U_1206_10V4Z

C47
@22U_1206_10V4Z

C55
@22U_1206_10V4Z

1

C22
@22U_1206_10V4Z

2

1

C34
@22U_1206_10V4Z

2

1

C41
@22U_1206_10V4Z

2

1

C48
@22U_1206_10V4Z

2

1

C56
@22U_1206_10V4Z

2

1

C23
22U_1206_10V4Z

2

1

C35
22U_1206_10V4Z

2

1

C42
@22U_1206_10V4Z

2

1

C49
@22U_1206_10V4Z

2

1

C57
@22U_1206_10V4Z

2

1

C24
22U_1206_10V4Z

2

1

C36
22U_1206_10V4Z

2

1

C43
@22U_1206_10V4Z

2

1

C50
@22U_1206_10V4Z

2

1

C54
@22U_1206_10V4Z

2

1

C25
22U_1206_10V4Z

2

1

C37
22U_1206_10V4Z

2

1

2

1

2

1

C26
22U_1206_10V4Z

2

1

C38
22U_1206_10V4Z

2

C44
@22U_1206_10V4Z

C51
@22U_1206_10V4Z

1

2

1

2

1

C45
@22U_1206_10V4Z

2

1

C52
22U_1206_10V4Z

2

C27
22U_1206_10V4Z

C39
22U_1206_10V4Z

1

2

1

2

C46
@22U_1206_10V4Z

C53

22U_1206_10V4Z

B B

+CPU_CORE

H_THERMTRIP#5 MAINPWON 38,39,41

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET N OR THE INFORMATION I T CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

12

R43 300_0402_5%

H_THERMTRIP#

3

2SC2411K_SC59

12

C58 @1U_ 0603_10V6K

2

Q1

CBE

1

2

Title

Size Document Number Re v

B

Date: Sheet

Compal Electronics, Inc.

CPU Decoupling

LA-2301

648Tuesday, May 18, 2004

1

of

1.0

5

4

3

2

1

D D

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15

HA#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

10U_0805_10V4Z

1 2

C656

H_ADSTB#0

HA#17

HA#18

HA#19

HA#20

HA#21

HA#22

HA#23

HA#24

HA#25

HA#26

HA#27

HA#28

HA#29

HA#30

HA#31
H_ADSTB#1

H_ADS#
H_BNR#
H_BPRI#
H_DEFER#
H_DRDY#
H_DBSY#
H_BREQ0#
H_LOCK#

H_RESET#
H_RS#2
H_RS#1
H_RS#0

H_TRDY#
H_HIT#
H_HITM#

SUS_STAT#_R

NB_RST#_R

COMP_N

COMP_P

CPVDD

CPVSS

+NB_GTLREF

H_ADSTB#05

H_ADSTB#15

H_ADS#4

H_BNR#4

H_BPRI#4

H_DEFER#4

H_DRDY#5

H_DBSY#5

H_BREQ0#4

H_LOCK#4

H_RESET#5

H_RS#25
H_RS#15
H_RS#05

H_TRDY#5

H_HIT#4

H_HITM#4

NB_PWRGD22

R710 24.9_0603_1%

1 2

R711 49.9_0402_1%

1 2

L40

1 2

R801

1 2

270K_0402_5%

1

C658

220P_0402_50V8K

2

+1.8VS+2.5V

12

R800
27K_0402_5%

SUS_STAT#_R

12

R803
330K_0402_5%

NB_RST#_R

+CPU_CORE

0.1U_0402_10V6K

1 2

330_0402_5%

+1.8VS

C655

12

R709

HB-1M2012-121JT03_0805

C C

SUS_STAT#20

NB_RST#19,23,32,33

B B

L

R716

51.1_0603_1%

R712

86.6_0603_1%

A A

12

R802
27K_0402_5%

D70

21

RB751V_SOD323

D71

21

RB751V_SOD323

Note: PLACE CLOSE TO RC300M,
USE 10/10 WIDTH/SPACE

+CPU_CORE

PLACE CLOSE TO U27 Ball
W28, USE 20/20
WIDTH/SPACE

1 2

12

1

C657

1U_0603_10V6K

2

12

R713

4.7K_0402_5%

M28

P25

M25

N29
N30

M26

N28
P29
P26
R29
P30
P28
N26
N27

M29

N25
R26

R27

U30
T30
R28
R25
U25
T28
V29
T26
U29
U26
V26
T25
V25
U27
U28
T29

H26

G27
F25
K26

A17
G25
G26

F26

H25

AH5
AG5

V28

W29

H23

W28

Y29
Y28

B17

L28
L29

L27
K25

J27
L26

J25

J26

J23

A9

C7

HA#[3..31]

H_REQ#[0..4]

HD#[0..63]

U51A

CPU_A3#
CPU_A4#
CPU_A5#
CPU_A6#
CPU_A7#
CPU_A8#
CPU_A9#
CPU_A10#
CPU_A11#
CPU_A12#
CPU_A13#
CPU_A14#
CPU_A15#
CPU_A16#
CPU_REQ0#
CPU_REQ1#
CPU_REQ2#
CPU_REQ3#
CPU_REQ4#
CPU_ADSTB0#

CPU_A17#
CPU_A18#
CPU_A19#
CPU_A20#
CPU_A21#
CPU_A22#
CPU_A23#
CPU_A24#
CPU_A25#
CPU_A26#
CPU_A27#
CPU_A28#
CPU_A29#
CPU_A30#
CPU_A31#
CPU_ADSTB1#

CPU_ADS#
CPU_BNR#
CPU_BPRI#
CPU_DEFER#
CPU_DRDY#
CPU_DBSY#
CPU_BR0#
CPU_LOCK#

CPU_CPURSET#
CPU_RS2#
CPU_RS1#
CPU_RS0#

CPU_TRDY#
CPU_HIT#
CPU_HITM#

CPU_RSET
SUS_STAT#
SYSRESET#
POWERGOOD

CPU_COMP_N

CPU_COMP_P

CPVDD

CPVSS

CPU_VREF

THERMALDIODE_N
THERMALDIODE_P

TESTMODE

CHS-216IGP9050A21_BGA718

ADDR. GROUP 1 ADDR. GROUP 0CONTROL

PART 1 OF 6

AGTL+ I/F

PENTIUM

MISC.

HA#[3..31] 4

H_REQ#[0..4] 4

HD#[0..63] 4

CPU_D0#
CPU_D1#
CPU_D2#
CPU_D3#
CPU_D4#
CPU_D5#
CPU_D6#
CPU_D7#
CPU_D8#

CPU_D9#
CPU_D10#
CPU_D11#

DATA GROUP 0DATA GROUP 1DATA GROUP 2DATA GROUP 3

CPU_D12#
CPU_D13#
CPU_D14#
CPU_D15#

CPU_DBI0#
CPU_DSTBN0#
CPU_DSTBP0#

CPU_D16#
CPU_D17#
CPU_D18#
CPU_D19#
CPU_D20#
CPU_D21#
CPU_D22#
CPU_D23#
CPU_D24#
CPU_D25#
CPU_D26#
CPU_D27#
CPU_D28#
CPU_D29#
CPU_D30#
CPU_D31#

CPU_DBI1#
CPU_DSTBN1#
CPU_DSTBP1#

CPU_D32#
CPU_D33#
CPU_D34#
CPU_D35#
CPU_D36#
CPU_D37#
CPU_D38#
CPU_D39#
CPU_D40#
CPU_D41#

IV

CPU_D42#
CPU_D43#
CPU_D44#
CPU_D45#
CPU_D46#
CPU_D47#

CPU_DBI2#
CPU_DSTBN2#
CPU_DSTBP2#

CPU_D48#
CPU_D49#
CPU_D50#
CPU_D51#
CPU_D52#
CPU_D53#
CPU_D54#
CPU_D55#
CPU_D56#
CPU_D57#
CPU_D58#
CPU_D59#
CPU_D60#
CPU_D61#
CPU_D62#
CPU_D63#

CPU_DBI3#
CPU_DSTBN3#
CPU_DSTBP3#

L30
K29
J29
H28
K28
K30
H29
J28
F28
H30
E30
D29
G28
E29
D30
F29
E28
G30
G29

B26
C30
A27
B29
C28
C29
B28
D28
D26
B27
C26
E25
E26
A26
B25
C25
A28
D27
E27

F24
D24
E23
E24
F23
C24
B24
A24
F21
A23
B23
C22
B22
C21
E21
D22
D23
E22
F22

B21
F20
A21
C20
E20
D20
A20
D19
C18
B20
E18
B19
D18
B18
C17
A18
F19
E19
F18

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14

HD#15
H_DBI#0
H_DSTBN#0
H_DSTBP#0

HD#16

HD#17

HD#18

HD#19

HD#20

HD#21

HD#22

HD#23

HD#24

HD#25

HD#26

HD#27

HD#28

HD#29

HD#30

HD#31
H_DBI#1
H_DSTBN#1
H_DSTBP#1

HD#32

HD#33

HD#34

HD#35

HD#36

HD#37

HD#38

HD#39

HD#40

HD#41

HD#42

HD#43

HD#44

HD#45

HD#46

HD#47
H_DBI#2
H_DSTBN#2
H_DSTBP#2

HD#48

HD#49

HD#50

HD#51

HD#52

HD#53

HD#54

HD#55

HD#56

HD#57

HD#58

HD#59

HD#60

HD#61

HD#62

HD#63
H_DBI#3
H_DSTBN#3
H_DSTBP#3

H_DBI#0 5
H_DSTBN#0 5
H_DSTBP#0 5

H_DBI#1 5
H_DSTBN#1 5
H_DSTBP#1 5

H_DBI#2 5
H_DSTBN#2 5
H_DSTBP#2 5

H_DBI#3 5
H_DSTBN#3 5
H_DSTBP#3 5

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET N OR THE INFORMATION I T CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Re v

B

Date: Sheet

Compal Electronics, Inc.

ATi RC300ML-HOST(1/5)

LA-2301

1

1.0

748Friday, May 28, 2004

of

5

4

3

2

1

12

R661
1K_0603_1%

AGPREF_4X

12

R662
1K_0603_1%

A_AD[0..31]

A_CBE#[0..3]

A_STROBE#19

PCI_PIRQA#19,24,27

A_DEVSEL#19

+1.5VS+ 1.5VS

A_PAR12,19

A_ACAT#19

A_END#19

A_OFF#19

A_SBREQ#19
A_SBGNT#19

+3VS

AGPREF_4X

R660

1 2

@52.3_0603_1%

Ra

AGP8X_DET#

A_AD0
A_AD1
A_AD2
A_AD3
A_AD4
A_AD5
A_AD6
A_AD7
A_AD8
A_AD9
A_AD10
A_AD11
A_AD12
A_AD13
A_AD14
A_AD15
A_AD16
A_AD17
A_AD18
A_AD19
A_AD20
A_AD21
A_AD22
A_AD23
A_AD24
A_AD25
A_AD26
A_AD27
A_AD28
A_AD29
A_AD30
A_AD31

A_CBE#0
A_CBE#1
A_CBE#2
A_CBE#3

A_PAR
A_STROBE#
A_ACAT#
A_END#

A_DEVSEL#
A_OFF#

A_SBREQ#
A_SBGNT#

1 2

8.2K_0402_5%

AGP8X_DET#

C663

1 2

0.1U_0402_10V6K

AGP_COMP

+3VS

R663

@47K_0402

1 2

U51C

AK5

ALINK_AD0

AJ5

ALINK_AD1

AJ4

ALINK_AD2

AH4

ALINK_AD3

AJ3

ALINK_AD4

AJ2

ALINK_AD5

AH2

ALINK_AD6

AH1

ALINK_AD7

AG2

ALINK_AD8

AG1

ALINK_AD9

AG3

ALINK_AD10

AF3

ALINK_AD11

AF1

ALINK_AD12

AF2

ALINK_AD13

AF4

ALINK_AD14

AE3

ALINK_AD15

AE4

ALINK_AD16

AE5

ALINK_AD17

AE6

ALINK_AD18

AC2

ALINK_AD19

AC4

ALINK_AD20

AB3

ALINK_AD21

AB2

ALINK_AD22

AB5

ALINK_AD23

AB6

ALINK_AD24

AA2

ALINK_AD25

AA4

ALINK_AD26

AA5

ALINK_AD27

AA6

ALINK_AD28

Y3

ALINK_AD29

Y5

ALINK_AD30

Y6

ALINK_AD31

AG4

ALINK_CBE#0

AE2

ALINK_CBE#1

AC3

ALINK_CBE#2

AA3

ALINK_CBE#3

AD5

PCI_PAR/ALINK_NC

AC6

PCI_FRAME#/ALINK_STROBE#

AC5

PCI_IRDY#/ALINK_ACAT#

AD2

PCI_TRDY#/ALINK_END#

W4

INTA#

AD3

ALINK_DEVSEL#

AD6

PCI_STOP#/ALINK_OFF#

W5

ALINK_SBREQ#

W6

ALINK_SBGNT#

R659

V5

PCI_REQ#0/ALINK_NC

V6

PCI_GNT#0/ALINK_NC

K5

AGP2_GNT#/AGP3_GNT

K6

AGP2_REQ#/AGP3_REQ

M5

AGP8X_DET#

J6

AGP_VREF/TMDS_VREF

J5

AGP_COMP

CHS-216IGP9050A21_BGA718

PART 3 OF 6

AGP2_SBSTB/AGP3_SBSTBF/NC/LVDS_BLON

AGP2_SBSTB#/AGP3_SBSTBS/NC/ENA_BL
AGP2_ADSTB0/AGP3_ADSTBF0/TMD2_CLK#
AGP2_ADSTB0#/AGP3_ADSTBS0/TMD2_CLK
AGP2_ADSTB1/AGP3_ADSTBF1/TMD1_CLK#
AGP2_ADSTB1#/AGP3_ADSTBS1/TMD1_CLK

PCI Bus 0 / A-Link I/F

AGP2_IRDY#/AGP3_IRDY/GPIO8/I2C_CLK

AGP2_TRDY#/AGP3_TRDY/TMDS_DVI_CLK

AGP2_STOP#/AGP3_STOP/GPIO10/DDC_DATA

AGP2_FRAME#/AGP3_FRAME/TMDS_DVI_DATA

AGP2_DEVSEL#/AGP3_DEVSEL/GPIO9/I2C_DATA

PCI BUS 1 / AGP Bus (GPIO , TMDS , ZVPort)

AGP2_SBA0/AGP3_SBA#0/GPIO0/VDDC_CNTL0
AGP2_SBA1/AGP3_SBA#1/GPIO1/VDDC_CNTL1

AGP2_SBA2/AGP3_SBA#2/GPIO2/LVDS_BLON#
AGP2_SBA3/AGP3_SBA#3/GPIO3/LVDS_DIGON

AGP2_SBA4/AGP3_SBA#4/GPIO4/STP_AGP#

AGP2_SBA5/AGP3_SBA#5/GPIO5/AGP_BUSY#

AGP2_SBA6/AGP3_SBA#6/GPIO6/LVDS_SSOUT

AGP2_SBA7/AGP3_SBA#7/GPIO7/LVDS_SSIN

AGP_AD0/TMD2_HSYNC
AGP_AD1/TMD2_VSYNC

AGP_AD2/TMD2_D1
AGP_AD3/TMD2_D0
AGP_AD4/TMD2_D3
AGP_AD5/TMD2_D2
AGP_AD6/TMD2_D5
AGP_AD7/TMD2_D4
AGP_AD8/TMD2_D6
AGP_AD9/TMD2_D9

AGP_AD10/TMD2_D8
AGP_AD11/TMD2_D11
AGP_AD12/TMD2_D10

AGP_AD13
AGP_AD14

AGP_AD16/TMD1_VSYNC
AGP_AD17/TMD1_HSYNC

AGP2_CBE#0/AGP3_CBE0/TMD2_D7
AGP2_CBE#1/AGP3_CBE1/TMD2_DE

AGP2_CBE#2/AGP3_CBE2

AGP2_CBE#3/AGP3_CBE3/TMD1_D5

AGP2_PIPE#/AGP3_DBI_HI

AGP2_NC/AGP3_DBI_LO

AGP2_WBF#/AGP3_WBF

AGP_AD15

AGP_AD18/TMD1_DE

AGP_AD19/TMD1_D0

AGP_AD20/TMD1_D1

AGP_AD21/TMD1_D2

AGP_AD22/TMD1_D3

AGP_AD23/TMD1_D4

AGP_AD24/TMD1_D7

AGP_AD25/TMD1_D6

AGP_AD26/TMD1_D9

AGP_AD27/TMD1_D8
AGP_AD28/TMD1_D11
AGP_AD29/TMD1_D10

AGP_AD30/TMDS_HPD

AGP_AD31

AGP_PAR

AGP2_RBF#/AGP3_RBF

AGP_ST0
AGP_ST1
AGP_ST2

Y2
W3
W2
V3
V2
V1
U1
U3
T2
R2
P3
P2
N3
N2
M3
M2
L1
L2
K3
K2
J3
J2
J1
H3
F3
G2
F2
F1
E2
E1
D2
D1

E5
E6
T3
U2
G3
H2

R3
M1
L3
H1

P5
R6
T6
T5
P6
R5
C1
D3
N6
N5

C3
C2
D4
E4
F6
F5
G6
G5

L6
M6
L5

C659

@10U_0805_6.3V6M

AGP_SBA6
AGP_SBA7

@0.1U_0402_10V6K

1

1

C660

12

2

@0_0402_5%

@0_0402_5%

12

2

R652

R655

Note: PLACE CLOSE TO U2 (NB RC300M)

L

R653

@0_0402_5%

12

12

@SM561BS_SO8
R656
@0_0402_5%

EDID_CLK 18
EDID_DAT 18
ENBK# 33

ENVDD 18
AGP_STP# 20
AGP_BUSY# 20

U52

1

Xin/CLK

S0

7

S0

6

S1

S1

LVDS SPREAD SPECTRUM

+3VS_SSVDD

@0_0402_5%

R715

2

VDD

SSCLK

Xout

SSCC

VSS

3

R657

@0_0402_5%

12

4

8

5

12

L41

1 2

@BLM21P300S_0805

12

R651

@0_0402_5%

1

C662

@10P_0402_25V8K

12

2

R658

@0_0402_5%

LVDS_SSOUT

1

C661

@10P_0402_25V8K

2

LVDS_SSIN

+3VS

@0_0402_5%

@0_0402_5%

R714

R654

AGP_SBA6

12

AGP_SBA7

12

D D

C C

B B

A A

A_AD[0..31]12,19

A_CBE#[0..3]19

Close to Pin J6

5

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET N OR THE INFORMATION I T CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Re v

Custom

Date: Sheet

Compal Electronics, Inc.

ATi RC300ML-A-LINK/AGP(2/5)

LA-2301

848Tuesday, May 18, 2004

1

1.0

of

5

D D

C C

B B

+1.8VS

A A

4

DDR_SBA013,14,15,16
DDR_SBA113,14,15,16

DDR_SRAS#13,14,15,16
DDR_SCAS#13,14,15,16

DDR_SWE#13,14,15,16

DDR_CLK014,15

DDR_CLK0#14,15

DDR_CLK114,15

DDR_CLK1#14,15

DDR_CLK313

DDR_CLK3#13

DDR_CLK413

DDR_CLK4#13

DDR_SCKE014,16
DDR_SCKE115,16
DDR_SCKE213,16
DDR_SCKE313,16

DDR_SCS#014,16
DDR_SCS#115,16
DDR_SCS#213,16
DDR_SCS#313,16

L42

1 2

HB-1M2012-121JT03_0805

DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12

DDR_SMA13

DDR_DM0
DDR_DM1
DDR_DM2
DDR_DM3
DDR_DM4
DDR_DM5
DDR_DM6
DDR_DM7

DDR_SRAS#
DDR_SCAS#

DDR_SWE#

DDR_DQS0
DDR_DQS1
DDR_DQS2
DDR_DQS3
DDR_DQS4
DDR_DQS5
DDR_DQS6
DDR_DQS7

DDR_CLK0
DDR_CLK0#

DDR_CLK1
DDR_CLK1#

DDR_CLK3
DDR_CLK3#

DDR_CLK4
DDR_CLK4#

DDR_SCKE0
DDR_SCKE1
DDR_SCKE2
DDR_SCKE3

DDR_SCS#0
DDR_SCS#1
DDR_SCS#2
DDR_SCS#3

MPVDD

C666

MPVSS

1 2

10U_0805_10V4Z

U51B

AH19

AJ17
AK17
AH16
AK16

AF17
AE18

AF16
AE17
AE16

AJ20
AG15

AF15
AE23
AH20
AE25

AH7
AF10
AJ14
AF21

AH23
AK28
AD29
AB26

AF24
AF25

AE24

AF9
AH13
AE21

AJ23

AJ27
AC28
AA25

AK10
AH10

AH18

AJ19

AG30
AG29

AK11

AJ11

AH17

AJ18

AF28
AG28

AF13
AE13
AG14

AF14

AH26
AH27

AF26
AG27

AC18

AD18

AJ8

PART 2 OF 6

MEM_A0
MEM_A1
MEM_A2
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
MEM_A13
MEM_A14
MEM_A15

MEM_DM0
MEM_DM1
MEM_DM2
MEM_DM3
MEM_DM4
MEM_DM5
MEM_DM6
MEM_DM7

MEM_RAS#
MEM_CAS#

MEM_WE#

MEM_DQS0
MEM_DQS1
MEM_DQS2
MEM_DQS3
MEM_DQS4
MEM_DQS5
MEM_DQS6
MEM_DQS7

MEM_CK0
MEM_CK0#

MEM_CK1
MEM_CK1#

MEM_CK2
MEM_CK2#

MEM_CK3
MEM_CK3#

MEM_CK4
MEM_CK4#

MEM_CK5
MEM_CK5#

MEM_CKE0
MEM_CKE1
MEM_CKE2
MEM_CKE3

MEM_CS#0
MEM_CS#1
MEM_CS#2
MEM_CS#3

MPVDD

MPVSS

CHS-216IGP9050A21_BGA718

3

MEM_DQ0
MEM_DQ1
MEM_DQ2
MEM_DQ3
MEM_DQ4
MEM_DQ5
MEM_DQ6
MEM_DQ7
MEM_DQ8

MEM_DQ9
MEM_DQ10
MEM_DQ11
MEM_DQ12
MEM_DQ13
MEM_DQ14
MEM_DQ15
MEM_DQ16
MEM_DQ17
MEM_DQ18
MEM_DQ19
MEM_DQ20
MEM_DQ21
MEM_DQ22
MEM_DQ23
MEM_DQ24
MEM_DQ25
MEM_DQ26
MEM_DQ27
MEM_DQ28
MEM_DQ29
MEM_DQ30
MEM_DQ31
MEM_DQ32
MEM_DQ33
MEM_DQ34
MEM_DQ35
MEM_DQ36
MEM_DQ37
MEM_DQ38
MEM_DQ39

MEM I/F

MEM_DQ40
MEM_DQ41
MEM_DQ42
MEM_DQ43
MEM_DQ44
MEM_DQ45
MEM_DQ46
MEM_DQ47
MEM_DQ48
MEM_DQ49
MEM_DQ50
MEM_DQ51
MEM_DQ52
MEM_DQ53
MEM_DQ54
MEM_DQ55
MEM_DQ56
MEM_DQ57
MEM_DQ58
MEM_DQ59
MEM_DQ60
MEM_DQ61
MEM_DQ62
MEM_DQ63

MEM_CAP1

MEM_CAP2

MEM_COMP

MEM_DDRVREF

DDR_DQ0

AG6

DDR_DQ1

AJ7

DDR_DQ2

AJ9

DDR_DQ3

AJ10

DDR_DQ4

AJ6

DDR_DQ5

AH6

DDR_DQ6

AH8

DDR_DQ7

AH9

DDR_DQ8

AE7

DDR_DQ9

AE8

DDR_DQ10

AE12

DDR_DQ11

AF12

DDR_DQ12

AF7

DDR_DQ13

AF8

DDR_DQ14

AE11

DDR_DQ15

AF11

DDR_DQ16

AJ12

DDR_DQ17

AH12

DDR_DQ18

AH14

DDR_DQ19

AH15

DDR_DQ20

AH11

DDR_DQ21

AJ13

DDR_DQ22

AJ15

DDR_DQ23

AJ16

DDR_DQ24

AF18

DDR_DQ25

AG20

DDR_DQ26

AG21

DDR_DQ27

AF22

DDR_DQ28

AF19

DDR_DQ29

AF20

DDR_DQ30

AE22

DDR_DQ31

AF23

DDR_DQ32

AJ21

DDR_DQ33

AJ22

DDR_DQ34

AJ24

DDR_DQ35

AK25

DDR_DQ36

AH21

DDR_DQ37

AH22

DDR_DQ38

AH24

DDR_DQ39

AJ25

DDR_DQ40

AK26

DDR_DQ41

AK27

DDR_DQ42

AJ28

DDR_DQ43

AH29

DDR_DQ44

AH25

DDR_DQ45

AJ26

DDR_DQ46

AJ29

DDR_DQ47

AH30

DDR_DQ48

AF29

DDR_DQ49

AE29

DDR_DQ50

AB28

DDR_DQ51

AA28

DDR_DQ52

AE28

DDR_DQ53

AD28

DDR_DQ54

AC29

DDR_DQ55

AB29

DDR_DQ56

AC26

DDR_DQ57

AB25

DDR_DQ58

Y26

DDR_DQ59

W26

DDR_DQ60

AE26

DDR_DQ61

AD26

DDR_DQ62

AA26

DDR_DQ63

Y27

C664 0.47U_0603_16V7K

AF6

AA29

AK19

1 2

C665 0.47U_0603_16V7K

1 2

MEN_COMP

R664 49.9_0402_1%

AK20

1 2

+DDR_VREF

+2.5V

1

2

1

2

2

DDR_DM[0..7]

DDR_DQ[0..63]

DDR_DQS[0..7]

DDR_SMA[0..13]

C668

0.1U_0402_10V6K

C669

0.1U_0402_10V6K

DDR_DM[ 0..7] 13,14,16

DDR_DQ[0..63] 13,14,16

DDR_DQS[0..7] 13,14,16

DDR_SMA[0..13] 13,14,15,16

R665
1K_0603_1%

R666
1K_0603_1%

1

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET N OR THE INFORMATION I T CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Re v

B

Date: Sheet

Compal Electronics, Inc.

ATi RC300ML-DDR(3/5)

LA-2301

1

1.0

948Friday, May 28, 2004

of

5

KC FBM-L11-201209-221LMAT_0805

D D

KC FBM-L11-201209-221LMAT_0805

L45

+1.8VS

+1.8VS

CLK_EXT_AGP66

12

R667

C C

B B

@10_0402_5%

1

C681

@15P_0402_50V8J

2

CLK_EXT_MEM66

12

R671

@10_0402_5%

1

C685

@15P_0402_50V8J

2

1 2

0.1U_0402_10V6K

1 2

+1.8VS

L47

1 2

KC FBM-L11-201209-221LMAT_0805

10U_0805_10V4Z

REFCLK1_NB17

1

C672

2

L46 10_0603_5%

0.1U_0402_10V6K

C675

56_0402_5%

C673

1

2

R669

4

+2.5VS

L44

+1.8VS_AVDDDI

+1.8VS_AVDDQ

1

1

C674

0.1U_0402_10V6K

2

2

1

C676

0.1U_0402_10V6K

R668 715 _0402_1%

12

CRT_R18
CRT_G18

CRT_B18
CRT_HSYNC18
CRT_VSYNC18

1 2

CLK_EXT_NB17

CLK_EXT_NB#17

CLK_EXT_AGP6617

CLK_EXT_MEM6617

+3VS

2

12

+2.5VS_AVDD

1

C671

0.1U_0402_10V6K

2

1

C677

0.1U_0402_10V6K

2

R673

1 2

10K_0402_5%

+PLLVDD_18

NB_RSET

CLK_EXT_NB
CLK_EXT_NB#

CLK_EXT_AGP66

CLK_EXT_MEM66

+3VS_VDDR

1 2

1

C670

0.1U_0402_10V6K

2

U51D

G9

VDDR3

H9

VDDR3

A14

AVDD_25

B13

AVSSN

B14

AVDDDI_18

C13

AVSSDI

A15

AVDDQ

B15

AVSSQ

H11

PLLVDD_18

G11

PLLVSS

F14

RED

F15

GREEN

E14

BLUE

C8

DACHSYNC

D9

DACVSYNC

C14

RSET

A4

XTALIN

B4

XTALOUT

A5

HCLKIN

B5

HCLKIN#

B6

SYS_FBCLKOUT

A6

SYS_FBCLKOUT#

D8

ALINK_CLK

B2

AGPCLKOUT

B3

AGPCLKIN

A3

EXT_MEM_CLK

D7

USBCLK

B7

REF27

C5

OSC

CHS-216IGP9050A21_BGA718

3

+3VS

L43

FBM-11-160808-121-T_0603

PART 4 OF 6

CRT

CLK. GEN.

TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P

TXCLK_UN
TXCLK_UP

TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P

TXCLK_LN
TXCLK_LP

LPVDD_18

LVDS

LVDDR_18
LVDDR_18

COMP_B

SVID

DACSCL

DACSDA

CPUSTOP#

SYSCLK

SYSCLK#

LPVSS

LVSSR
LVSSR

C_R

Y_G

D12
E12
F11
F12
D13
D14
E13
F13

E10
D10
B9
C9
D11
E11
B10
C10

A12

A11

B12
C12

B11
C11

E15

C15

D15

D6

C6

D5

A8

B8

+1.8VS_LPVDD

LPVSS

+1.8VS_LVDDR

LVSSR

TV_CRMA

TV_LUMA

TV_COMPS

1 2

R670 @75_0402_1%

1 2

R672 1K_0402_5%

2

TZOUT0- 18
TZOUT0+ 18
TZOUT1- 18
TZOUT1+ 18
TZOUT2- 18
TZOUT2+ 18
TZCLK- 18
TZCLK+ 18

TXOUT0- 18
TXOUT0+ 18
TXOUT1- 18
TXOUT1+ 18
TXOUT2- 18
TXOUT2+ 18
TXCLK- 18
TXCLK+ 18

0.1U_0402_10V6K

NB_DDC_CLK 18

NB_DDC_DATA 18

0.1U_0402_10V6K

1

C679

C678

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C683

C682

2

KC FBM-L11-201209-221LMAT_0805

1

2

1

2

+3VS

1 2

1

C680

2

10U_0805_10V4Z

KC FBM-L11-201209-221LMAT_0805

1 2

1

C684

2

10U_0805_10V4Z

1

+1.8VS

L48

+1.8VS

L49

V-PORT-0603-220 M-V05_0603

TV-OUT CONN.

TV_LUMA

TV_CRMA

A A

5

4

12

R101
75_0402_1%

12

R102
75_0402_1%

1

C109

100P_0402_25V8K

2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET N OR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

C103 @33P_0402_50V8J

1 2

L4 CHB2012U121_0805

1 2

L5 CHB2012U121_0805

1 2

1 2

C104 @33P_0402_50V8J

1

C110

100P_0402_25V8K

2

D1

2 1

1

C111

100P_0402_25V8K

2

LUMA_1

CRMA_1

1

C112

100P_0402_25V8K

2

2

D2

V-PORT-0603-220 M-V05_0603

2 1

JP2

1

1

2

2

3

3

4

4

SUYIN_030008FR004T100ZL

Title

Size Document Number Re v

B

Date: Sheet

Compal Electronics, Inc.

ATi RC300ML-VEDIO(4/5)

LA-2301

1

1.0

10 48Tuesday, May 18, 2004

of

5

4

3

2

1

22U_1206_10V4Z

+2.5V

1

+

C695

2

0.1U_0402_10V6K

+2.5V

1

C709

2

+1.5VS

1

+

C715

2

0.1U_0402_10V6K

+1.5VS

1

C730

C729

2

+1.5VS

@0.01U_0402_16V7Z

1

C744

2

+CPU_CORE

1

C686

2

0.1U_0402_10V6K

1

C696

C697

2

0.1U_0402_10V6K

1

C710

0.1U_0402_10V6K

C725

0.1U_0402_10V6K

C711

2

0.1U_0402_10V6K

1

C726

2

0.1U_0402_10V6K

1

C731

2

ATI request

1

C746

C745

2

@0.01U_0402_16V7Z

0.1U_0402_10V6K

1

C687

2

0.1U_0402_10V6K

1

1

C698

2

2

0.1U_0402_10V6K

1

C712

2

0.1U_0402_10V6K

1

1

C727

2

2

0.1U_0402_10V6K

1

1

C732

2

2

0.1U_0402_10V6K

@0.01U_0402_16V7Z

1

1

C747

2

2

1

C688

C689

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C700

C699

2

0.1U_0402_10V6K

1

2

0.1U_0402_10V6K

1

C728

47U_B_6.3VM

2

0.1U_0402_10V6K

1

C734

C733

2

0.1U_0402_10V6K

@0.01U_0402_16V7Z

1

C749

C748

2

@0.01U_0402_16V7Z

0.1U_0402_10V6K

1

1

C690

2

2

0.1U_0402_10V6K

1

C701

2

1

C713

0.1U_0402_10V6K

2

+1.5VS

1

+

C714

C716

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C735

2

1

C750

2

@0.01U_0402_16V7Z

0.1U_0402_10V6K

1

C692

C691

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

1

C702

2

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C717

2

1

1

C736

2

2

0.1U_0402_10V6K

@0.01U_0402_16V7Z

1

1

C751

2

2

@0.01U_0402_16V7Z

1

C693

2

0.1U_0402_10V6K

1

C703

C704

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

1

C718

2

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C737

C738

2

0.1U_0402_10V6K

@0.01U_0402_16V7Z

1

C752

2

1

2

0.1U_0402_10V6K

1

C705

2

1

C719

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C739

2

1

C753

2

1

C694

0.1U_0402_10V6K

2

1

C706

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C720

C721

2

1

C740

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

1

C707

2

2

1

C722

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

1

C741

2

2

1

C708

0.1U_0402_10V6K

2

0.1U_0402_10V6K

1

1

C723

2

2

0.1U_0402_10V6K

1

C742

C743

2

0.1U_0402_10V6K

1

C724

2

0.1U_0402_10V6K

1

2

+1.5VS +2.5V

U51E

F10

VDD_CORE

F9

VDD_CORE

G12

VDD_CORE

H12

VDD_CORE

H13

VDD_CORE

M12

VDD_CORE

M13

VDD_CORE

D D

C C

+CPU_CORE

B B

+3VS

M14

VDD_CORE

M17

VDD_CORE

M18

VDD_CORE

M19

VDD_CORE

N12

VDD_CORE

N13

VDD_CORE

N14

VDD_CORE

N17

VDD_CORE

N18

VDD_CORE

N19

VDD_CORE

P12

VDD_CORE

P13

VDD_CORE

P14

VDD_CORE

P17

VDD_CORE

P18

VDD_CORE

P19

VDD_CORE

U12

VDD_CORE

U13

VDD_CORE

U14

VDD_CORE

U17

VDD_CORE

U18

VDD_CORE

U19

VDD_CORE

V12

VDD_CORE

V13

VDD_CORE

V14

VDD_CORE

V17

VDD_CORE

V18

VDD_CORE

V19

VDD_CORE

W12

VDD_CORE

W13

VDD_CORE

W14

VDD_CORE

W17

VDD_CORE

W18

VDD_CORE

W19

VDD_CORE

C16

VDDR2_CPU

D16

VDDR2_CPU

D17

VDDR2_CPU

E16

VDDR2_CPU

E17

VDDR2_CPU

F16

VDDR2_CPU

F17

VDDR2_CPU

G17

VDDR2_CPU

G21

VDDR2_CPU

G23

VDDR2_CPU

G24

VDDR2_CPU

H16

VDDR2_CPU

H17

VDDR2_CPU

H19

VDDR2_CPU

H21

VDDR2_CPU

H24

VDDR2_CPU

K23

VDDR2_CPU

K24

VDDR2_CPU

M23

VDDR2_CPU

P23

VDDR2_CPU

P24

VDDR2_CPU

T23

VDDR2_CPU

T24

VDDR2_CPU

U23

VDDR2_CPU

U24

VDDR2_CPU

W30

VDDR2_CPU

AA1

VDDL_ALINK

AA7

VDDL_ALINK

AA8

VDDL_ALINK

AC7

VDDL_ALINK

AC8

VDDL_ALINK

AD1

VDDL_ALINK

AD7

VDDL_ALINK

AD8

VDDL_ALINK

AK3

VDDL_ALINK

W8

VDDL_ALINK

CHS-216IGP9050A21_BGA718

CORE PWR

CPU I/F PWRALINK PWR

VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM

PART 5 OF 6

VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM

MEM I/F PWR

VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM

POWER

VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM

VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP

AGP PWR

VDDP_AGP

VDDP_AGP
VDDP_AGP/VDDP33
VDDP_AGP/VDDP33
VDDP_AGP/VDDP33

VDD_18
VDD_18
VDD_18
VDD_18

AA23
AA27
AB30
AC10
AC12
AC13
AC15
AC17
AC19
AC21
AC23
AC24
AC25
AC27
AD10
AD12
AD13
AD15
AD17
AD19
AD21
AD23
AD24
AD25
AD27
AE10
AE14
AE15
AE19
AE20
AE30
AE9
AF27
AG11
AG12
AG17
AG18
AG23
AG24
AG26
AG8
AG9
AJ30
AK14
AK23
AK8
V23
W23
W24
W25
Y25

A2
G4
H5
H6
H7
J4
K8
L4
M7
M8
N4
P1
P7
P8
R4
T8
U4
U5
U6
E7
F7
G8

AC22
AC9
H10
H22

100U_D2_10VM

0.1U_0402_10V6K

47U_B_6.3VM

+1.5VS

0.1U_0402_10V6K

@0.01U_0402_16V7Z

+3VS

+1.8VS

U51F

PART 6 OF 6

A29

VSS

AB23

VSS

AB24

VSS

AB27

VSS

AB4

VSS

AB8

VSS

AC1

VSS

AC11

VSS

AC14

VSS

AC16

VSS

AC20

VSS

AC30

VSS

AD11

VSS

AD14

VSS

AD16

VSS

AD20

VSS

AD4

VSS

AE27

VSS

AF30

VSS

AF5

VSS

AG10

VSS

AG13

VSS

AG16

VSS

AG19

VSS

AG22

VSS

AG25

VSS

AG7

VSS

AH28

VSS

AH3

VSS

GND

AJ1

VSS

AK13

VSS

AK2

VSS

AK22

VSS

AK29

VSS

AK4

VSS

AK7

VSS

B1

VSS

B16

VSS

B30

VSS

C19

VSS

C23

VSS

C27

VSS

C4

VSS

D21

VSS

D25

VSS

E3

VSS

E8

VSS

E9

VSS

F27

VSS

F4

VSS

F8

VSS

G14

VSS

G15

VSS

G18

VSS

G20

VSS

H14

VSS

H15

VSS

H18

VSS

H20

VSS

H27

VSS

H4

VSS

H8

VSS

J7

VSS

CHS-216IGP9050A21_BGA718

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

R23
R7
R8
T12
T13
T14
T15
T16
T17
T18
T19
T27
T4
U15
U16
U7
U8
V15
V16
V27
V4
V7
V8
W15
W16
W27
Y1
Y23
Y24
Y30
Y4
Y7
Y8
R19
R18
R17
R16
R15
R14
R13
R12
R1
P4
P27
P16
P15
N8
N24
N23
N16
N15
M4
M27
M16
M15
L8
L7
L25
L24
L23
K4
K27
J8

4

+3VS

10U_0805_10V4Z

1

C759

2

0.1U_0402_10V6K

1

C761

C760

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

1

C762

2

0.1U_0402_10V6K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET N OR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

C763

2

2

0.1U_0402_10V6K

1

C764

C765

2

0.1U_0402_10V6K

3

1

2

0.1U_0402_10V6K

1

C766

2

0.1U_0402_10V6K

1

C767

2

2

Title

Size Document Number Re v

B

Date: Sheet

Compal Electronics, Inc.

ATi RC300ML-Power(5/5)

LA-2301

1

11 48Tuesday, May 18, 2004

of

1.0

+1.8VS

0.1U_0402_10V6K

1

1

C755

C754

A A

10U_0805_10V4Z

2

0.1U_0402_10V6K

5

1

C756

C757

2

2

0.1U_0402_10V6K

1

1

2

C758

0.1U_0402_10V6K

2

5

4

3

2

1

A_CBE#[0..3]

A_AD[0..31]8,19

D D

R674 10K_0402_5%

A_AD31

A_AD30

A_AD29

R676 4.7K_0402_5%

1 2

R679 4.7K_0402_5%

1 2

R681 10K_0402_5%

1 2

R683 @4.7K_0402_5%

1 2

1 2

R678 10K_0402_5%

1 2

2 1

D51
RB751V_SOD323

2 1

D52
RB751V_SOD323

+3VS

+3VS

BSEL1 5, 17

+3VS

BSEL0 5, 17

A_AD29: STRAP CONFIGURATION

DEFAULT:1

0: REDUCEDE SET

A_AD[31.. 30] : FSB CL K SPEED

DEFAULT: 01

00: 100 MHZ
01: 133 MHZ
10: 200MHZ
11:166 MHZ

1: FULL SET(internal Pull high)

R684 @10K_0402_5%

A_AD28

C C

A_AD27

A_AD26

A_AD24

1 2

R686 4.7K_0402_5%

1 2

R688 10K_0402_5%

1 2

R689 @4.7K_0402_5%

1 2

R692 10K_0402_5%

1 2

R693 @4.7K_0402_5%

1 2

R694 10K_0402_5%

1 2

+3VS

+3VS

+3VS

+3VS

A_AD28: SP READ SPECTRUM ENABLE

DEFAULT:0

0: DISABLE
1: ENABLE

A_AD27: FrcShortReset#

DEFAULT: 1

0: TEST MODE
1: NORMAL
MOD E

A_AD26 : ENABLE IOQ

DEFAULT: 1

0: IOQ=1
1:
IOQ=12

A_AD24 : MOBILE CPU SELECT

DEFAULT: 1

0: BANIAS CPU
1: OTHER CPU

A_AD[0..31]

R675 @4.7K_0402_5%

A_AD18

A_AD17

A_AD25

A_PAR8,19

A_PAR

1 2

R677 4.7K_0402_5%

1 2

R680 @4.7K_0402_5%

1 2

R682 4.7K_0402_5%

1 2

R685 10K_0402_5%

1 2

R687 @4.7K_0402_5%

1 2

R690 @4.7K_0402_5%

1 2

R691 4.7K_0402_5%

1 2

+3VS

+3VS

+3VS

+3VS

A_AD18 : ENABLE PHASE CALIBRATION

DEFAULT: 0

0: DISABLE
1:ENABLE

A_AD25/A_AD17 : CPU VOLTAGE[1..0]

DEFAULT: 0

00: 1.05V
01: 1.35V
11: 1.75V
10: 1.45V

A_AD25/A_AD17 : CPU VOLTAGE[1..0]

DEFAULT: 10

00: 1.05V
01: 1.35V
11: 1.75V
10: 1.45V

AD25=1 DESTOP CPU
AD25=0 MOBILE CPU
AD17--DON'T CARE

PAR: EXTENDED DEBUG MODE

DEFAULT : 1

0: DEBUG MODE
1: NORMAL

A_CBE#[0..3] 8,19

R695 10K_0402_5%

B B

A A

A_AD23

A_AD22

A_AD21

A_AD20

1 2

R696 @4.7K_0402_5%

1 2

R697 @4.7K_0402_5%

1 2

R698 10K_0402_5%

1 2

R699 @4.7K_0402_5%

1 2

R700 @4.7K_0402_5%

1 2

R701 4.7K_0402_5%

1 2

5

+3VS

+3VS

+3VS

A_AD23 : CL OCK BYPASS DISABLE

DEFAULT: 1

0: TEST MODE
1: NORMAL(internal Pull high)

A_AD22 : OSC PAD OUTPUT PCICLK

DEFAULT : 1

0:PCICLK OUT
1: OSC CLK OUT

A_AD21 : AUTO_CAL ENABLE

DEFAULT : 1

0: DISABLE
1: ENABLE

A_AD20 : INTERNAL CLK GEN ENABLE

DEFAULT : 0

0: DISABLE
1: ENABLE

4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET N OR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Title

Size Document Number Re v

B

Date: Sheet of

Compal Electronics, Inc.

ATi RC300ML-SYS. CONFIG.

LA-2301

1

12 48Tuesday, May 18, 2004

1.0

5

D D

DDR_CLK39
DDR_CLK3#9

DDR_DQ[0..63]

DDR_DQS[0..7]

C C

DDR_DM[0..7]

DDR_SMA[0..13]

DDR_SCKE39,16

DDR_SBA09,14,15,16

B B

A A

DDR_SCS#29,16 DDR_SCS#3 9,16

DDR_DQ[0..63] 9,14,16

DDR_DQS[0..7] 9,14,16

DDR_DM[0..7] 9,14,16

DDR_SMA[0..13] 9,14,15,16

RP112

10_0804_8P4R_5%

DDR_SMA12
DDR_SMA9
DDR_SMA7

DDR_SMA5
DDR_SMA3
DDR_SMA1
DDR_SMA10

RP113

10_0804_8P4R_5%

DDR_SMA13

RP115

10_0804_8P4R_5%

Layout note
Place these resistors

close to DIMM0,
all trace length<500 mil

5

DDR_CKE3

45

DDR_SMAA12

36

DDR_SMAA9

27

DDR_SMAA7

18

DDR_SMAA5

45
36

DDR_SMAA1

27

DDR_SMAA10

18

45
36
27
18

SM_DATA_SB17,20

SM_CLK_SB17,20

DDR_DQ1

DDR_DQS0
DDR_DQ6

DDR_DQ2
DDR_DQ8

DDR_DQ12
DDR_DQS1

DDR_DQ14
DDR_DQ15

DDR_DQ20
DDR_DQ16

DDR_DQS2
DDR_DQ18

DDR_DQ22
DDR_DQ24

DDR_DQ29
DDR_DQS3

DDR_DQ26
DDR_DQ30

DDR_BA0
DDR_WE#
DDR_CS#2
DDR_SMAA13

DDR_DQ33
DDR_DQ36

DDR_DQS4
DDR_DQ38

DDR_DQ39
DDR_DQ45

DDR_DQ40
DDR_DQS5

DDR_DQ46
DDR_DQ43

DDR_DQ52
DDR_DQ49

DDR_DQS6
DDR_DQ50

DDR_DQ51
DDR_DQ60

DDR_DQ61

DDR_DQS7

DDR_DQ62
DDR_DQ58

+3VS

4

+2.5V

JP3

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0#

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2#

93

VDD

95

CKE1

97

DU/A13

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE#

121

S0#

123

A13

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD_SPD

199

VDD_ID

TYCO_1-1612781-1

4

VREF

VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7

DQ12

VDD

DQ13

DM1

VSS
DQ14
DQ15

VDD

VDD

VSS

VSS

DQ20
DQ21

VDD

DM2
DQ22

VSS
DQ23
DQ28

VDD
DQ29

DM3

VSS
DQ30
DQ31

VDD

CB4

CB5

VSS

DM8

CB6

VDD

CB7

DU/RESET#

VSS

VSS

VDD

VDD

CKE0

DU/BA2

A11

VSS

VDD

BA1
RAS#
CAS#

S1#

VSS
DQ36
DQ37

VDD

DM4
DQ38

VSS
DQ39
DQ44

VDD
DQ45

DM5

VSS
DQ46
DQ47

VDD
CK1#

CK1

VSS
DQ52
DQ53

VDD

DM6
DQ54

VSS
DQ55
DQ60

VDD
DQ61

DM7

VSS
DQ62
DQ63

VDD

SA0
SA1
SA2

NC.TEST

A8

A6
A4
A2
A0

DU

3

+2.5V

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

3

DDR_DQ4
DDR_DQ0DDR_DQ5

DDR_DM0

DDR_DQ3

DDR_DQ7

DDR_DQ9

DDR_DQ13
DDR_DM1

DDR_DQ10
DDR_DQ11

DDR_DQ17
DDR_DQ21

DDR_DM2
DDR_DQ23

DDR_DQ19
DDR_DQ28

DDR_DQ25
DDR_DM3

DDR_DQ27
DDR_DQ31

DDR_CKE2

DDR_SMAA11
DDR_SMAA8

DDR_SMAA6
DDR_SMAA4
DDR_SMAA2DDR_SMAA3
DDR_SMAA0

DDR_BA1
DDR_RAS#
DDR_CAS#
DDR_CS#3

DDR_DQ32
DDR_DQ37

DDR_DM4
DDR_DQ35

DDR_DQ34
DDR_DQ44

DDR_DQ41
DDR_DM5

DDR_DQ47
DDR_DQ42

DDR_DQ48
DDR_DQ53

DDR_DM6

DDR_DQ55

DDR_DQ54
DDR_DQ57

DDR_DQ56

DDR_DM7

DDR_DQ63

DDR_DQ59

+3VS

+DDR_VREF0

DDR_CLK4# 9
DDR_CLK4 9

+2.5V

1

2

1

2

RP117

10_0804_8P4R_5%

RP116

10_0804_8P4R_5%

RP114

10_0804_8P4R_5%

C768

0.1U_0402_10V6K

C769

0.1U_0402_10V6K

45
36

DDR_SMA11

27

DDR_SMA8

18

DDR_SMA6

45

DDR_SMA4

36

DDR_SMA2

27

DDR_SMA0

18

45
36
27
18

Layout note

Place these resistor
close by DIMM0,
all trace length
Max=1.4"

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET N OR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

R702
1K_0603_1%

R703
1K_0603_1%

DDR_SCKE2 9,16

DDR_SBA1 9,14,15,16
DDR_SRAS# 9,14,15,16
DDR_SCAS# 9,14,15,16DDR_SWE#9,14,15,16

2

1

Title

Size Document Number Re v

LA-2301

Date: Sheet

Compal Electronics, Inc.

DDR-SODIMM SLOT0

of

13 48Tuesday, May 18, 2004

1

1.0

5

1 2

C150 0.1U_0402_10V6K

1 2

R164

1K_0603_1%

D D

DDR_DQ1
DDR_DQ5 DQ5
DDR_DQ4
DDR_DQ0

10_0804_8P4R_5%

DDR_DQS0

DDR_DQ6
DDR_DQ2
DDR_DQ8
DDR_DQ12

10_0804_8P4R_5%

DDR_DQS1

DDR_DQ14
DDR_DQ15
DDR_DQ10
DDR_DQ11

C C

B B

A A

10_0804_8P4R_5%

DDR_DQ20
DDR_DQ16
DDR_DQ17
DDR_DQ21

10_0804_8P4R_5%

DDR_DQS2

DDR_DQ18
DDR_DQ22
DDR_DQ24
DDR_DQ28

DDR_DQS3

DDR_DQ26
DDR_DQ30
DDR_DQ27
DDR_DQ31

DDR_DQ33
DDR_DQ36
DDR_DQ32
DDR_DQ37

DDR_DQS4

DDR_DQ38
DDR_DQ39
DDR_DQ45
DDR_DQ40

DDR_DQS5

DDR_DQS6

DDR_DQ50
DDR_DQ51
DDR_DQ60
DDR_DQ61

DDR_DQS7

DDR_DQ62
DDR_DQ58
DDR_DQ63
DDR_DQ59

10_0804_8P4R_5%

10_0804_8P4R_5%

10_0804_8P4R_5%

10_0804_8P4R_5%

10_0804_8P4R_5%

R175 10_0402_5%

10_0804_8P4R_5%

R181 10_0402_5%

12

R165

1K_0603_1%

RP3

DQ1

18
27

DQ4

36

DQ0

45

RP5

RP7

RP14

RP12

RP17

RP4

RP6

DQS0

DQ6

18

DQ2

27

DQ8

36

DQ12

45

DQS1

DQ14

18

DQ15

27

DQ10

36

DQ11

45

DQ20

18

DQ16

27

DQ17

36

DQ21

45

DQS2

DQ18

18

DQ22

27

DQ24

36

DQ28

45

DQS3

DQ26

18

DQ30

27

DQ27

36

DQ31

45

DQ33

18

DQ36

27

DQ32

36

DQ37

45

DQS4

DQ38

18

DQ39

27

DQ45

36

DQ40

45

DQS5

1 2

R166 10_0402_5%

1 2

R170 10_0402_5%

1 2

R176 10_0402_5%

1 2

R178 10_0402_5%

1 2

R167 10_0402_5%

1 2

R173 10_0402_5%

1 2

RP18

18
27
36
45

1 2

RP16

18
27
36
45

5

DQS6

DQ50
DQ51
DQ60
DQ61

DQS7

DQ62
DQ58
DQ63
DQ59

1

2

C151
@0.01U_0402_16V7Z

DDR_DM0

DDR_DQ3
DDR_DQ7
DDR_DQ9
DDR_DQ13

DDR_DM1

DDR_DM2

DDR_DQ23
DDR_DQ19
DDR_DQ29
DDR_DQ25

DDR_DM3

DDR_DM4

DDR_DQ35
DDR_DQ34
DDR_DQ44
DDR_DQ41

DDR_DM5

DDR_DQ46
DDR_DQ43
DDR_DQ47
DDR_DQ42

DDR_DQ52
DDR_DQ49
DDR_DQ48
DDR_DQ53

DDR_DM6

DDR_DQ55
DDR_DQ54
DDR_DQ57
DDR_DQ56

DDR_DM7

1

2

10_0804_8P4R_5%

+DDR_VREF1+2.5V

C152

0.1U_0402_10V6K

1 2

R168 10_0402_5%

RP9

1 2

R172 10_0402_5%

1 2

R174 10_0402_5%

10_0804_8P4R_5%

1 2

R180 10_0402_5%

1 2

R169 10_0402_5%

10_0804_8P4R_5%

1 2

R171 10_0402_5%

10_0804_8P4R_5%

10_0804_8P4R_5%

1 2

R177 10_0402_5%

10_0804_8P4R_5%

1 2

R179 10_0402_5%

RP10

RP8

RP13

RP11

RP15

DQ3

45

DQ7

36
27
18

45
36
27
18

45
36
27
18

45
36
27
18

45
36
27
18

45
36
27
18

DQ9
DQ13

DQ23
DQ19
DQ29
DQ25

DQ35
DQ34
DQ44
DQ41

DQ46
DQ43
DQ47
DQ42

DM2

DM3

DM4

DM5

DM0

DM1

DQ52
DQ49
DQ48
DQ53

DM6

DQ55
DQ54
DQ57
DQ56

DM7

4

DDR_SMA[0..13]9,13,15,16

DDR_DQ[0..63]9,13,16

DDR_DQS[0..7]9,13,16

DDR_DM[0..7]9,13,16

DDR_SRAS#9,13,15,16
DDR_SCAS#9,13,15,16

DDR_SWE#9,13,15,16

4

DDR_SMA[0..13]

DDR_DQ[0..63]

DDR_DQS[0..7]

DDR_DM[0..7]

DDR_SRAS#
DDR_SCAS#

DDR_SWE#

+DDR_VREF1 +DDR_VREF1

C157

0.1U_0402_10V6K

Close
pin49

+DDR_VREF1 +DDR_VREF1

C163

0.1U_0402_10V6K

Close
pin49

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET N OR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

1

2

3

DQ[0..63]

DQS[0..7]

DM[0..7]

DQS0
DM0
DQ4
DQ0
DQ3
DQ7
DQ1
DQ5
DQ6
DQ2

DQS1
DM1
DQ9

DQ13
DQ14
DQ15
DQ8
DQ12
DQ10

DQ11

DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12

DQS4
DM4

DQ33
DQ36
DQ35
DQ34
DQ32

DQ37
DQ38
DQ39

DQS5

DM5
DQ44
DQ41
DQ46
DQ43
DQ45
DQ40
DQ47
DQ42

DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12

3

DQ[0..63] 15

DQS[0..7] 15

DM[0..7] 15

U3

16

LDQS0

20

LDM1

2

DQ0

4

DQ1

5

DQ2

7

DQ3

8

DQ4

10

DQ5

11

DQ6

13

DQ7

51

UDQS0

47

UDM1

54

DQ8

56

DQ9

57

DQ10

59

DQ11

60

DQ12

62

DQ13

63

DQ14

65

DQ15

49

VREF

29

A0

30

A1

31

A2

32

A3

35

A4

36

A5

37

A6

38

A7

39

A8

40

A9

28

AP/A10

41

A11

42

A12

K4H561638F-TC/LB3_TSOPII66

U5

16

LDQS0

20

LDM1

2

DQ0

4

DQ1

5

DQ2

7

DQ3

8

DQ4

10

DQ5

11

DQ6

13

DQ7

51

UDQS0

47

UDM1

54

DQ8

56

DQ9

57

DQ10

59

DQ11

60

DQ12

62

DQ13

63

DQ14

65

DQ15

49

VREF

29

A0

30

A1

31

A2

32

A3

35

A4

36

A5

37

A6

38

A7

39

A8

40

A9

28

AP/A10

41

A11

42

A12

K4H561638F-TC/LB3_TSOPII66

VDD0
VDD1

VDD2
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4

VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4

VDD0

VDD1

VDD2
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4

VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4

NC0
NC1
NC2
NC3
NC4
NC5
NC6

CK#
CKE

BA0
BA1

CS#
RAS#
CAS#

WE#

VSS0
VSS1
VSS2

NC0

NC1

NC2

NC3

NC4

NC5

NC6

CK#

CKE

BA0

BA1

CS#
RAS#
CAS#

WE#

VSS0
VSS1
VSS2

2

DDR_SBA09,13,15,16
DDR_SBA19,13,15,16

DDR_SCS#09,16

DDR_SCKE09,16

DDR_CLK19,15

1st Bank

1
18
33
3
9
15
55
61

14
17
19
25
43
50
53

45

CK

46
44

26
27

24
23
22
21

6
12
52
58
64
34
48
66

1
18
33
3
9
15
55
61

14
17
19
25
43
50
53

45

CK

46
44

26
27

24
23
22
21

6
12
52
58
64
34
48
66

DDR_CLK1#9,15

+2.5V

1 2

C153 0.1U_0402_10V6K

1 2

C155 0.1U_0402_10V6K

1 2

C775 0.1U_0402_10V6K

1 2

C777 0.1U_0402_10V6K

DDR_SMA13

DDR_CLK0
DDR_CLK0#
DDR_CKE0

DDR_SBA0
DDR_SBA1

DDR_CS#0
DDR_SRAS#
DDR_SCAS#
DDR_SWE#

+2.5V +2.5V

DDR_SMA13

DDR_CLK1

DDR_CLK1#

DDR_CKE0

DDR_SBA0
DDR_SBA1

DDR_CS#0
DDR_SRAS#
DDR_SCAS#
DDR_SWE#

0.1U_0402_10V6K

1 2

C159 0.1U_0402_10V6K

1 2

C161 0.1U_0402_10V6K

1 2

C779 0.1U_0402_10V6K

1 2

C781 0.1U_0402_10V6K

0.1U_0402_10V6K

DDR_SBA0
DDR_SBA1

1 2

R805 10_0402_5%

1 2

R806 10_0402_5%

DDR_CLK1
DDR_CLK1#

1

C158

2

Close
pin49

1

C164

2

Close
pin49

2

DDR_CS#0

DDR_CKE0

DQS2
DM2
DQ17
DQ21
DQ23
DQ19
DQ20
DQ16
DQ18
DQ22

DQS3
DM3
DQ29
DQ25
DQ27
DQ31

DQ24
DQ28
DQ26
DQ30

DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12

DQS6
DM6
DQ52
DQ49
DQ55
DQ54
DQ48

DQ53
DQ50
DQ51

DQS7
DM7
DQ57
DQ56
DQ62
DQ58
DQ60
DQ61
DQ63
DQ59

DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12

U4

16

LDQS0

20

LDM1

2

DQ0

4

DQ1

5

DQ2

7

DQ3

8

DQ4

10

DQ5

11

DQ6

13

DQ7

51

UDQS0

47

UDM1

54

DQ8

56

DQ9

57

DQ10

59

DQ11

60

DQ12

62

DQ13

63

DQ14

65

DQ15

49

VREF

29

A0

30

A1

31

A2

32

A3

35

A4

36

A5

37

A6

38

A7

39

A8

40

A9

28

AP/A10

41

A11

42

A12

K4H561638F-TC/LB3_TSOPII66

U6

16

LDQS0

20

LDM1

2

DQ0

4

DQ1

5

DQ2

7

DQ3

8

DQ4

10

DQ5

11

DQ6

13

DQ7

51

UDQS0

47

UDM1

54

DQ8

56

DQ9

57

DQ10

59

DQ11

60

DQ12

62

DQ13

63

DQ14

65

DQ15

49

VREF

29

A0

30

A1

31

A2

32

A3

35

A4

36

A5

37

A6

38

A7

39

A8

40

A9

28

AP/A10

41

A11

42

A12

K4H561638F-TC/LB3_TSOPII66

Title

Size Document Number Re v

B

Date: Sheet

Compal Electronics, Inc.

DDR(256Mb)X4-TOP

DDR_CLK09,15

DDR_CLK0#9,15

VDD0
VDD1

VDD2
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4

NC0
NC1
NC2
NC3
NC4
NC5
NC6

CK

CK#

CKE

BA0
BA1

CS#
RAS#
CAS#

WE#

VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4

VSS0
VSS1
VSS2

VDD0
VDD1
VDD2

VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4

NC0

NC1

NC2

NC3

NC4

NC5

NC6

CK

CK#

CKE

BA0

BA1

CS#
RAS#
CAS#

WE#

VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4

VSS0
VSS1
VSS2

LA-2331

1
18
33
3
9
15
55
61

14
17
19
25
43
50
53

45
46
44

26
27

24
23
22
21

6
12
52
58
64
34
48
66

1
18
33
3
9
15
55
61

14
17
19
25
43
50
53

45
46
44

26
27

24
23
22
21

6
12
52
58
64
34
48
66

1

+2.5V

DDR_SMA13

DDR_CLK0

DDR_CLK0#

DDR_CKE0

DDR_SBA0
DDR_SBA1

DDR_CS#0
DDR_SRAS#
DDR_SCAS#
DDR_SWE#

DDR_SMA13

DDR_CLK1

DDR_CLK1#

DDR_CKE0

DDR_SBA0
DDR_SBA1

DDR_CS#0
DDR_SRAS#
DDR_SCAS#
DDR_SWE#

1

DDR_CLK0

R163
120_0402_5%

1 2

DDR_CLK0#

1 2

C154 0.1U_0402_10V6K

1 2

C156 0.1U_0402_10V6K

1 2

C776 0.1U_0402_10V6K

1 2

C778 0.1U_0402_10V6K

1 2

C160 0.1U_0402_10V6K

1 2

C162 0.1U_0402_10V6K

1 2

C780 0.1U_0402_10V6K

1 2

C782 0.1U_0402_10V6K

14 48Tuesday, May 18, 2004

of

1.0

5

DDR_SMA[0..13]9,13,14,16

DQ[0..63]14

DQS[0..7]14

DM[0..7]14

D D

+2.5V

2

C171

0.1U_0402_10V6K

C C

B B

+DDR_VREF1

+2.5V

1

2

C180

0.1U_0402_10V6K

+DDR_VREF1

A A

1

DDR_SRAS#9,13,14,16
DDR_SCAS#9,13,14,16

DDR_SWE#9,13,14,16

DQS3
DM3
DQ30
DQ26
DQ28

DQ24
DQ31
DQ27
DQ25
DQ29

DQS2
DM2
DQ22
DQ18
DQ16
DQ20

DQ23
DQ21
DQ17

DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12

DQS7
DM7
DQ59
DQ63
DQ61
DQ60
DQ58
DQ62
DQ56
DQ57

DQS6
DM6
DQ51
DQ50

DQ53
DQ48
DQ54
DQ55
DQ49
DQ52

DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12

U8

16

LDQS0

20

LDM1

2

DQ0

4

DQ1

5

DQ2

7

DQ3

8

DQ4

10

DQ5

11

DQ6

13

DQ7

51

UDQS0

47

UDM1

54

DQ8

56

DQ9

57

DQ10

59

DQ11

60

DQ12

62

DQ13

63

DQ14

65

DQ15

49

VREF

29

A0

30

A1

31

A2

32

A3

35

A4

36

A5

37

A6

38

A7

39

A8

40

A9

28

AP/A10

41

A11

42

A12

K4H561638F-TC/LB3_TSOPII66

U10

16

LDQS0

20

LDM1

2

DQ0

4

DQ1

5

DQ2

7

DQ3

8

DQ4

10

DQ5

11

DQ6

13

DQ7

51

UDQS0

47

UDM1

54

DQ8

56

DQ9

57

DQ10

59

DQ11

60

DQ12

62

DQ13

63

DQ14

65

DQ15

49

VREF

29

A0

30

A1

31

A2

32

A3

35

A4

36

A5

37

A6

38

A7

39

A8

40

A9

28

AP/A10

41

A11

42

A12

K4H561638F-TC/LB3_TSOPII66

4

DDR_SMA[0..13]

DQ[0..63]

DQS[0..7]

DM[0..7]

DDR_SRAS#
DDR_SCAS#

DDR_SWE#

VDD0
VDD1

VDD2
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4

NC0
NC1
NC2
NC3
NC4
NC5
NC6

CK

CK#

CKE

BA0
BA1

CS#
RAS#
CAS#

WE#

VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4

VSS0
VSS1
VSS2

VDD0
VDD1
VDD2

VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4

NC0

NC1

NC2

NC3

NC4

NC5

NC6

CK

CK#

CKE

BA0

BA1

CS#
RAS#
CAS#

WE#

VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4

VSS0
VSS1
VSS2

3

DDR_SBA09,13,14,16
DDR_SBA19,13,14,16

DDR_SCS#19,16

DDR_SCKE19,16

DDR_CLK09,14

DDR_CLK0#9,14

+2.5V

1
18
33
3
9
15
55
61

14
17
19
25
43
50
53

45
46
44

26
27

24
23
22
21

6
12
52
58
64
34
48
66

1
18
33
3
9
15
55
61

14
17
19
25
43
50
53

45
46
44

26
27

24
23
22
21

6
12
52
58
64
34
48
66

1 2

C166 0.1U_0402_10V6K

1 2

C168 0.1U_0402_10V6K

1 2

C784 0.1U_0402_10V6K

1 2

C786 0.1U_0402_10V6K

DDR_SMA13

DDR_CLK0
DDR_CLK0#
DDR_CKE1

DDR_SBA0
DDR_SBA1

DDR_CS#1
DDR_SRAS#
DDR_SCAS#
DDR_SWE#

+2.5V

1 2

C174 0.1U_0402_10V6K

1 2

C176 0.1U_0402_10V6K

1 2

C788 0.1U_0402_10V6K

1 2

C790 0.1U_0402_10V6K

DDR_SMA13

DDR_CLK1

DDR_CLK1#

DDR_CKE1

DDR_SBA0
DDR_SBA1 DDR_CS#1

DDR_CS#1
DDR_SRAS#
DDR_SCAS#
DDR_SWE#

2nd Bank

DDR_CLK0

2

1

DDR_CLK0#

Close to U8 pin5 and 6.

DDR_CLK1

2

1

DDR_CLK1#

Close to U10 pin5 and 6.

C172
@1.5P_0402_50V8C

C179
@1.5P_0402_50V8C

DDR_SBA0
DDR_SBA1

1 2

R807 10_0402_5%

1 2

R808 10_0402_5%

DDR_CLK0
DDR_CLK0#

+2.5V

0.1U_0402_10V6K

+DDR_VREF1

+2.5V

0.1U_0402_10V6K

+DDR_VREF1

DDR_CS#1

DDR_CKE1

C170

Close
pin49

C178

Close
pin49

2

1

2

1

DQS1
DM1

DQ11
DQ10
DQ12
DQ8
DQ15
DQ14

DQ13
DQ9

DQS0
DM0
DQ2
DQ6
DQ5
DQ1
DQ7
DQ3DQ19
DQ0
DQ4

DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12

DQS5
DM5

DQ42
DQ47
DQ40
DQ45
DQ43
DQ46
DQ41
DQ44

DQS4
DM4

DQ39
DQ38

DQ37
DQ32
DQ34
DQ35
DQ36
DQ33

DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12

2

U7

16

LDQS0

20

LDM1

2

DQ0

4

DQ1

5

DQ2

7

DQ3

8

DQ4

10

DQ5

11

DQ6

13

DQ7

51

UDQS0

47

UDM1

54

DQ8

56

DQ9

57

DQ10

59

DQ11

60

DQ12

62

DQ13

63

DQ14

65

DQ15

49

VREF

29

A0

30

A1

31

A2

32

A3

35

A4

36

A5

37

A6

38

A7

39

A8

40

A9

28

AP/A10

41

A11

42

A12

K4H561638F-TC/LB3_TSOPII66

U9

16

LDQS0

20

LDM1

2

DQ0

4

DQ1

5

DQ2

7

DQ3

8

DQ4

10

DQ5

11

DQ6

13

DQ7

51

UDQS0

47

UDM1

54

DQ8

56

DQ9

57

DQ10

59

DQ11

60

DQ12

62

DQ13

63

DQ14

65

DQ15

49

VREF

29

A0

30

A1

31

A2

32

A3

35

A4

36

A5

37

A6

38

A7

39

A8

40

A9

28

AP/A10

41

A11

42

A12

K4H561638F-TC/LB3_TSOPII66

VDD0
VDD1

VDD2
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4

RAS#
CAS#

VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4

VSS0
VSS1
VSS2

VDD0

VDD1

VDD2
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4

RAS#
CAS#

VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4

VSS0
VSS1
VSS2

NC0
NC1
NC2
NC3
NC4
NC5
NC6

CK#
CKE

BA0
BA1

CS#

WE#

NC0
NC1
NC2
NC3
NC4
NC5
NC6

CK#
CKE

BA0
BA1

CS#

WE#

CK

CK

1
18
33
3
9
15
55
61

14
17
19
25
43
50
53

45
46
44

26
27

24
23
22
21

6
12
52
58
64
34
48
66

1
18
33
3
9
15
55
61

14
17
19
25
43
50
53

45
46
44

26
27

24
23
22
21

6
12
52
58
64
34
48
66

DDR_CLK1#9,14

+2.5V

DDR_SMA13

DDR_CLK0

DDR_CLK0#

DDR_CKE1

DDR_SBA0
DDR_SBA1

DDR_CS#1
DDR_SRAS#
DDR_SCAS#
DDR_SWE#

+2.5V

DDR_SMA13

DDR_CLK1

DDR_CLK1#

DDR_CKE1

DDR_SBA0
DDR_SBA1

DDR_SRAS#
DDR_SCAS#
DDR_SWE#

DDR_CLK19,14

1 2

C165 0.1U_0402_10V6K

1 2

C167 0.1U_0402_10V6K

1 2

C783 0.1U_0402_10V6K

1 2

C785 0.1U_0402_10V6K

DDR_CLK0

DDR_CLK0#

Close to U7 pin5 and 6.

1 2

C173 0.1U_0402_10V6K

1 2

C175 0.1U_0402_10V6K

1 2

C787 0.1U_0402_10V6K

1 2

C789 0.1U_0402_10V6K

DDR_CLK1

DDR_CLK1#

Close to U9 pin5 and 6.

1

DDR_CLK1

R182
120_0402_5%

1 2

DDR_CLK1#

2

C169
@1.5P_0402_50V8C

1

2

C177
@1.5P_0402_50V8C

1

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET N OR THE INFORMATION I T CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Re v

B

Date: Sheet

Compal Electronics, Inc.

DDR(256Mb)X4-BTN

LA-2331

1.0

15 48Tuesday, May 18, 2004

1

of

5

DDR_SCAS#9,13,14,15
DDR_SCS#19,15
DDR_SCS#09,14
DDR_SCS#39,13

+2.5V

DDR_SMA[0..13]

DDR_SCKE[0..3]

DDR_SCKE1

DDR_SCKE0

DDR_SCKE2

DDR_SMA8
DDR_SMA11
DDR_SMA6
DDR_SMA4

DDR_SMA2
DDR_SMA0
DDR_SBA1
DDR_SRAS#

DDR_SCAS#
DDR_SCS#1
DDR_SCS#0
DDR_SCS#3

DDR_SCKE3
DDR_SMA12
DDR_SMA9
DDR_SMA7

DDR_SMA5
DDR_SMA3
DDR_SMA1
DDR_SMA10

DDR_SBA0
DDR_SWE#
DDR_SCS#2
DDR_SMA13

R20333_0402_5%

R20233_0402_5%

R20133_0402_5%

RP46

33_0804_8P4R_5%

RP62

33_0804_8P4R_5%

RP43

33_0804_8P4R_5%

RP59

33_0804_8P4R_5%

RP54

33_0804_8P4R_5%

RP51

33_0804_8P4R_5%

+1.25VS

12

C185 0.1U_0402_10V6K

12

12

C188 0.1U_0402_10V6K

45

C193 0.1U_0402_10V6K

36
27

C194 0.1U_0402_10V6K

18

45

C199 0.1U_0402_10V6K

36
27

C200 0.1U_0402_10V6K

18

45

C205 0.1U_0402_10V6K

36
27

C206 0.1U_0402_10V6K

18

18

C211 0.1U_0402_10V6K

27
36

C214 0.1U_0402_10V6K

45

18

C219 0.1U_0402_10V6K

27
36

C222 0.1U_0402_10V6K

45

18

C225 0.1U_0402_10V6K

27
36
45

12

12

12

12

12

12

12

12

12

12

12

DDR_SMA[0..13]9,13,14,15

DDR_SCKE[0..3]9,13,14,15

D D

DDR_SBA19,13,14,15

DDR_SRAS#9,13,14,15

C C

DDR_SBA09,13,14,15

DDR_SWE#9,13,14,15

DDR_SCS#29,13

B B

4

12

12

3

DDR_DQ1
DDR_DQ5
DDR_DQ4
DDR_DQ0

DDR_DM0
DDR_DQS0
DDR_DQ6
DDR_DQ2

DDR_DQ3
DDR_DQ7
DDR_DQ8
DDR_DQ12

DDR_DQ9
DDR_DQ13
DDR_DM1
DDR_DQS1

DDR_DQ14
DDR_DQ15
DDR_DQ10
DDR_DQ11

DDR_DQ20
DDR_DQ16
DDR_DQ17
DDR_DQ21

DDR_DQS2
DDR_DM2
DDR_DQ18
DDR_DQ22

DDR_DQ23

DDR_DQ24
DDR_DQ28

DDR_DQ29
DDR_DQ25
DDR_DQS3
DDR_DM3

DDR_DQ26
DDR_DQ30
DDR_DQ27
DDR_DQ31

RP41

45
36
27
18

56_0804_8P4R_5%

RP44

45
36
27
18

56_0804_8P4R_5%

RP47

45
36
27
18

56_0804_8P4R_5%

RP49

45
36
27
18

56_0804_8P4R_5%

RP52

45
36
27
18

56_0804_8P4R_5%

RP55

45
36
27
18

56_0804_8P4R_5%

RP57

45
36
27
18

56_0804_8P4R_5%

RP60

45
36
27
18

56_0804_8P4R_5%

RP63

45
36
27
18

56_0804_8P4R_5%

RP65

45
36
27
18

56_0804_8P4R_5%

DDR_DQ[0..63]9,13,14

DDR_DQS[0..7]9,13,14

+1.25VS

C183 0.1U_0402_10V6K

C186 0.1U_0402_10V6K

C189 0.1U_0402_10V6K

C191 0.1U_0402_10V6K

C195 0.1U_0402_10V6K

C197 0.1U_0402_10V6K

C201 0.1U_0402_10V6K

C203 0.1U_0402_10V6K

C207 0.1U_0402_10V6K

C209 0.1U_0402_10V6K

C212 0.1U_0402_10V6K

C215 0.1U_0402_10V6K

C217 0.1U_0402_10V6K

C220 0.1U_0402_10V6K

C223 0.1U_0402_10V6K

C226 0.1U_0402_10V6K

C228 0.1U_0402_10V6K

C230 0.1U_0402_10V6K

C232 0.1U_0402_10V6K

C234 0.1U_0402_10V6K

2

DDR_DQ[0..63] DDR_DM[0..7]

DDR_DQS[0..7]

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

DDR_DQ33
DDR_DQ36
DDR_DQ32
DDR_DQ37

DDR_DQS4
DDR_DM4
DDR_DQ38
DDR_DQ39

DDR_DQ35
DDR_DQ34
DDR_DQ45
DDR_DQ40

DDR_DQ44
DDR_DQ41
DDR_DQS5
DDR_DM5

DDR_DQ46
DDR_DQ43
DDR_DQ47
DDR_DQ42

DDR_DQ52
DDR_DQ49
DDR_DQ48
DDR_DQ53

DDR_DM6
DDR_DQS6
DDR_DQ50
DDR_DQ51

DDR_DQ55DDR_DQ19
DDR_DQ54
DDR_DQ60
DDR_DQ61

DDR_DQ57
DDR_DQ56
DDR_DM7
DDR_DQS7

DDR_DQ62
DDR_DQ58
DDR_DQ63
DDR_DQ59

56_0804_8P4R_5%

56_0804_8P4R_5%

56_0804_8P4R_5%

56_0804_8P4R_5%

56_0804_8P4R_5%

56_0804_8P4R_5%

56_0804_8P4R_5%

56_0804_8P4R_5%

DDR_DM[0..7]9,13,14

RP50

45
36
27
18

RP53

45
36
27
18

RP42

45
36
27
18

RP45

45
36
27
18

RP48

45
36
27
18

56_0804_8P4R_5%

RP56

45
36
27
18

RP58

45
36
27
18

RP61

45
36
27
18

RP64

45
36
27
18

56_0804_8P4R_5%

RP66

45
36
27
18

+1.25VS

1

12

C184 0.1U_0402_10V6K

12

C187 0.1U_0402_10V6K

12

C190 0.1U_0402_10V6K

12

C192 0.1U_0402_10V6K

12

C196 0.1U_0402_10V6K

12

C198 0.1U_0402_10V6K

12

C202 0.1U_0402_10V6K

12

C204 0.1U_0402_10V6K

12

C208 0.1U_0402_10V6K

12

C210 0.1U_0402_10V6K

12

C213 0.1U_0402_10V6K

12

C216 0.1U_0402_10V6K

12

C218 0.1U_0402_10V6K

12

C221 0.1U_0402_10V6K

12

C224 0.1U_0402_10V6K

12

C227 0.1U_0402_10V6K

12

C229 0.1U_0402_10V6K

12

C231 0.1U_0402_10V6K

12

C233 0.1U_0402_10V6K

12

C235 0.1U_0402_10V6K

1

+

C771
100U_D2_10VM

2

1

+

A A

C772
100U_D2_10VM

2

+2.5V

1

+

2

1

+

2

C236
100U_D2_10VM

C247
100U_D2_10VM

5

1

C237

0.1U_0402_10V6K

2

1

C248

0.1U_0402_10V6K

2

1

C238

0.1U_0402_10V6K

2

1

C249

0.1U_0402_10V6K

2

1

C239

0.1U_0402_10V6K

2

1

C250

0.1U_0402_10V6K

2

4

1

C240

0.1U_0402_10V6K

2

1

C251

0.1U_0402_10V6K

2

1

C241

0.1U_0402_10V6K

2

1

C252

0.1U_0402_10V6K

2

1

C242

0.1U_0402_10V6K

2

1

C253

0.1U_0402_10V6K

2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET N OR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

C243

0.1U_0402_10V6K

2

1

C254

0.1U_0402_10V6K

2

3

1

C244

0.1U_0402_10V6K

2

1

C255

0.1U_0402_10V6K

2

1

C245

0.1U_0402_10V6K

2

1

C256

0.1U_0402_10V6K

2

1

C246

0.1U_0402_10V6K

2

1

C257

0.1U_0402_10V6K

2

2

Title

Size Document Number Re v

B

Date: Sheet of

Compal Electronics, Inc.

DDR-SODIMM Decoupling

LA-2301

1

16 48Tuesday, May 18, 2004

1.0

A

B

C

D

E

F

G

H

+3VS +3VS_CLK

L6

1 2

CHB2012U121_0805

10U_0805_10V4Z

C259 close U11 pin 42 as posible

1 1

XTALIN XTALO UT XT ALIN

14.31818MHz_20P_1BX14318BE1A

2

C269
10P_0402_50V8K

1

2 2

C260 close U11 pin 48 as posible
C261 close U11 pin 30 as posible
C262 close U11 pin 19 as posible
C263 close U11 pin 13 as posible

Y5

1 2

10P_0402_50V8K

PM_STPCPU#5,19,44
PM_STPPCI#19

C270

R732 @0_0402_5%
R733 @0_0402_5%

C258

2

1

1 2
1 2

1

0.1U_0402_10V6K

2

10K_0402_5%

REFCLK1_NB10

CLK_SIO_14M32
CLK_SB_14M20

CLK_AUDIO_14M30

R208

C259

CLK_EXT_48M20
CLK_EXT_SD4824

+3VS

12

1 2

1

0.1U_0402_10V6K

2

R209

10K_0402_5%

CLK_SIO_14M

1

C260

0.1U_0402_10V6K

2

CLK_EXT_48M EXT_48M

R221 68_0402_5%
R222 33_0402_5%
R226 33_0402_5%

R219 @33_0402_5%

C261

SM_CLK_SB13,20
SM_DATA_SB13,20

VTT_PWRGD20,22

1 2
1 2
1 2

1 2

1

0.1U_0402_10V6K

2

R216

1 2
1 2

R217 33_0402_5%

C262

XTALOUT

33_0402_5%

Width=40 mils

1

0.1U_0402_10V6K

2

12

R204

@1M_0402_5%

VTT_PWRGD

PCI33/66#

EXT_SD 48CLK_EXT_SD48

FS1

FS0

CLK_IREF

R225

475_0402_1%

1 2

C263

U11

6

XIN

7

XOUT

35

SCLK

34

SDATA

10

VTTPWRGD/PD#

45

CPU_STP#

12

PCI_STOP#

26

24/48#SEL

11

PCI33/66#SEL

27

48MHz_1

28

48MHz_0

4

FS2/REF2

3

FS1/REF1

2

FS0/REF0

38

IREF

1

+3VS_CLK +3VS_VDDA

2

42

8

30

48

VDDSD

VDDCPU

VDDAGP

GNDREF

GNDXTAL

GNDPCI

5

18

29

19

VDD48M

GNDPCI

24

25

13

1

VDDPCI

VDDPCI

VDDREF

FS3/PCICLK_F0
FS4/PCICLK_F1

GNDSD

GND48M

GNDAGP

46

33

9

36

VDDA

VDDXTAL

37

VSSA

40

CPUT0

39

CPUC0

44

CPUT1

43

CPUC1

47

SDRAMOUT

32

AGPCLK0

31

AGPCLK1

14
15

16

PCICLK0

17

PCICLK1

20

PCICLK2

21

PCICLK3

22

PCICLK4

23

PCICLK5

GNDCPU

ICS951402AGT_TSSOP48

41

+3VS_VDDA

1

C268

0.1U_0402_10V6K

2

VSSA

EXT_CPU

EXT_CPU#

EXT_NB

EXT_NB#

EXT_MEM66M

EXT_AGP66M

FS3
FS4FS2

1

C265

0.1U_0402_10V6K

2

+3VS_VDDA

VSSA

1 2

R205 33_0402_5%

1 2

R210 33_0402_5%

1 2

R211 33_0402_5%

1 2

R214 33_0402_5%

1 2

R215 33_0402_5%

1 2

R218 33_0402_5%

1 2

R220 33_0402_5%

1

C266

0.1U_0402_10V6K

2

CLK_EXT_CPU

CLK_EXT_CPU#

CLK_EXT_NB

CLK_EXT_NB#

1

C267

0.1U_0402_10V6K

2

Termination R close
U11 as possible.

CLK_EXT_CPU 4

CLK_EXT_CPU

CLK_EXT_CPU#

CLK_EXT_CPU# 4

CLK_EXT_NB 10

CLK_EXT_NB

CLK_EXT_NB#

CLK_EXT_NB# 10

CLK_EXT_MEM66 10

CLK_EXT_AGP66 10

CLK_EXT_ALINK 19

1

C264

10U_0805_10V4Z

2

L7

1 2

CHB2012U121_0805

C265 close U11 pin 1 as posible
C266 close U11 pin 9 as posible
C267 close U11 pin 29 as posible
C268 close U11 pin 36 as posible

1 2

R206 49.9_0402_1%

1 2

R207 49.9_0402_1%

1 2

R212 49.9_0402_1%

1 2

R213 49.9_0402_1%

+3VS

3 3

** **

BSEL15,12

4 4

A

B

C

BSEL05,12

CLOCK FREQUENCY SELECT TABLE

FS2 MEMFS1

FS3

0 0 0 1 0

0 0 0 0 1

0 0 0 0 0

10K_0402_5%

D

FS0

CPUFS4 With Spread Enabled…

200

133

100 100

+3VS +3VS

12

12

R232

R233
10K_0402_5%

D3 RB751V_SOD323

D4 RB751V_SOD323

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

21

21

200

133

10K_0402_5%

*

R234

E

Spread OFF OR
Center spread +/-0.3%

FS0
FS1

12

R235

10K_0402_5%

FS2
FS3
FS4
PCI33/66#

+3VS_CLK

12

R236

4.7K_0402_5%

Note: 0 = PULL LOW

1 = PULL HIGH

A-LINK FREQ

PCI33/66# = HIGH

PCI33/66# = LOW 33MHZ

12

12

R237

4.7K_0402_5%

F

66MHZ

+3VS_CLK

12

R228
@10K_0402_5%

12

R238
10K_0402_5%

Title

Size Document Number Rev

Date: Sheet

12

R229
@10K_0402_5%

12

R239
10K_0402_5%

Compal Electronics, Inc.

G

12

R230
@10K_0402_5%

12

R240
10K_0402_5%

Clock Generator

LA-2301

12

R231
10K_0402_5%

12

R241
@10K_0402_5%

17 48Wednesday, May 26, 2004

H

of

1.0

5

SI2302DS: N CHANNEL
VGS: 4.5V, RDS: 85 mOHM
VGS: 2.5V, RDS: 115mOHM

+12VALW

R242
100K_0402_5%

1 2

13

D

Q7

S

2N7002_SOT23

R248

10K_0402_5%

DISPOFF#

Id(MAX): 2.8A
VGS(MAX): +-8V

0.047U_0402_16V4Z

12

R246
200K_0402_5%

1

C281
1000P_0402_50V7K

2

+LCDVDD

R243

100_0402_1%

D D

Q6

2N7002_SOT23

ENVDD8

R247

1.2K_0402_5%

1 2

C C

BKOFF#33

+12VALW

12

13

D

S

2

2

G

12

R244
100K_0402_5%

2

G

13

Q8
DTC124EK_SC59

+3VS

D5

21

RB751V_SOD323

12

CRT Connector

CRT_R10

B B

A A

CRT_G10

CRT_B10

Close to CRT
connector

R254

75_0402_1%

5

75_0402_1%

1 2

R255

CRT_HSYNC10

CRT_VSYNC10

75_0402_1%

1 2

R256

3.3P_0402_50V8C

1 2

74AHCT1G125GW_SOT353-5

74AHCT1G125GW_SOT353-5

+CRT_VCC

4

1

C272

2

C274

0.1U_0402_10V6K

1

C284

3.3P_0402_50V8C

2

12

C2910.1U_0402_10V6K

4

+3VS

80mil

13

D

2

G

S

80mil

1

2

0.1U_0603_50V4Z

C285

5

P

A2Y

G

3

1

5

P

OE#

A2Y

G

3

1

C271

4.7U_0805_10V4Z

2

Q5
SI2302DS_SOT23

1

C275

4.7U_0805_10V4Z

2

B+

1

1

C279
@10U_1210_35V4Z

2

2

@V-PORT-0603-220 M-V05_0603

1 2

L10 FCM2012C-800_0805

1 2

L11 FCM2012C-800_0805

1 2

L12 FCM2012C-800_0805

1

C286

3.3P_0402_50V8C

2

CRTHSYNC

4

CRTVSYNC

4

12

R259
1K_0402_5%

1

U13

C278

1

2

U12

OE#

+LCDVDD

1

C276

4.7U_0805_10V4Z

2

L8

1 2

FBM-L11-201209-121LMT_0805

1

C287

5P_0402_50V8C

2

1 2

L13
FCM2012C-800_0805

L14

1 2

FCM2012C-800_0805

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET N OR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1

C277

0.1U_0402_16V4Z

2

IB+

@V-PORT-0603-220 M-V05_0603

2 1

1

C288

5P_0402_50V8C

2

1

C290
100P_0402_25V8K

2

1

C294

100P_0402_25V8K

2

3

D7

D6

2 1

0.1U_0402_16V4Z

@V-PORT-0603-220 M-V05_0603

2 1

CRTR

CRTG

CRTB

1

C289

5P_0402_50V8C

2

HSYNC

2 1

VSYNC

2 1

+3VS

1

C273

2

+5VS_BEAD

D9

2 1

D8

D76

@V-PORT-0603-220 M-V05_0603

D77

RB491D_SOT23

C292

100P_0402_25V8K

@V-PORT-0603-220 M-V05_0603

2

Width: 40mils

IB+

DAC_BRIG33

INVT_PWM33

EDID_CLK8

TZCLK-10
TZCLK+10

TZOUT1-10
TZOUT1+10
TZOUT2+10
TZOUT2-10
TZOUT0+10
TZOUT0-10

F1

21

1A_6VDC_MINISMDC110

CRT_DDC_DATA

CRT_DDC_CLK

1

1

C293
100P_0402_25V8K

2

2

2

+CRT_VCC+R_CRT_VCC

40mil40mil40mil

1 2

C283 0.1U_0402_10V6K

JP5

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

TYCO_1470801-1

2N7002_SOT23

1

JP4

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

ACES_88107-3000

Q9

2

G

1 3

D

S

2

G

1 3

D

Title

Size Document Number Re v

B

Date: Sheet

1

1

2

2

3

3

4

4

EDID_DATEDID_CLK

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

EDID_CLK

EDID_DAT

NB_DDC_DATA

NB_DDC_CLK

CRT_DDC_DATA

CRT_DDC_CLK

R258

12

2.2K_0402_5%

NB_DDC_DATA

NB_DDC_CLK

S

Q10
2N7002_SOT23

+3VS

Compal Electronics, Inc.

LVDS, CRT& TV CONN

LA-2301

IB+

DISPOFF#

R249 2.2K _0402_5%

R250 2.2K _0402_5%

NB_DDC_DATA 10

NB_DDC_CLK 10

+LCDVDD

EDID_DAT 8

TXCLK+ 10
TXCLK- 10

TXOUT2+ 10

TXOUT2- 10
TXOUT1- 10

TXOUT1+ 10

TXOUT0- 10

TXOUT0+ 10

1 2

1 2

C280 47P_0402_50V8J

1 2

C282 47P_0 402_50V8J

1 2

1

R2514.7K_0402_5%

R2524.7K_0402_5%

18 48Wednesday, May 26, 2004

+3VS

12

12

+CRT_VCC

12

R2532.2K_0402_5%

12

R2572.2K_0402_5%

of

+3VS

1.0

5

+3VALW

C2960.1U_0402_16V4Z

12

5

H_CPUSLP#

H_A20M#

H_IGNNE#

H_STPCLK#

1

C301

2

R293

470_0402_5%

U15

4

Y

A_SERR#

PM_STPCPU#

PM_STPPCI#

H_SMI#

H_INTR

H_NMI

H_INIT#

12

R305
20M_0603_5%

+3VS

12

P

B

A

G

3

R271@0_0402_5%

12

R297100K_0402_5%

R294
330_0402_5%

D D

NB_RST#7,23,32,33

+3VS

R273 8.2K_0402_5%

R274 1K_0402_5%

R275 4.7K_0402_5%

C C

+CPU_CORE

10K_0402_5%

B B

A A

PM_DPRSLPVR44

C300

12P_0402_50V8K

H_FERR#5

NB_RST#

TC7SH08FU_ SSOP5

12

1 2

1 2

Close SB

1 2

R281 200_0402_5%

1 2

R282 200_0402_5%

1 2

R284 200_0402_5%

1 2

R285 200_0402_5%

1 2

R286 200_0402_5%

1 2

R287 200_0402_5%

1 2

R288 200_0402_5%

1 2

R289 200_0402_5%

GPIO0

12

R646

2

Y2

NC3NC

32.768KHZ_12.5P_1TJS125DJ2A073

OUT4IN

1

RTCX2

1

2

RTCX1

R304

1 2

20M_0603_5%

12P_0402_50V8K

+CPU_CORE

12

2

Q12 MMBT3904_SOT23

3 1

5

1

2

12

1 2

1 2

0_0402_5%

H_CPUFERR#

12

R272

8.2K_0402_5%

R296

CLK_EXT_ALINK17

R269

1K_0402_5%

NBRST#

PULL DOWN FOR S3

+3VS

12

R279

4.7K_0402_5%

R299 10K_0402_5%
R302 10K_0402_5%
R298 1K_0402_5%
R290 10K_0402_5%

+3V

R312 10K_0402_5%

PCI_RST#23

10K_0402_5%

1 2
1 2
1 2
1 2

12

+SB_VBAT

4

CLK_EXT_ALINK

12

R261

@10_0402_5%

1

C295

@15P_0402_50V8J

2

A_STROBE#8

A_DEVSEL#8

A_ACAT#8

A_END#8

A_PAR8,12

A_OFF#8

A_SBREQ#8
A_SBGNT#8

PM_STPCPU#5,17,44
PM_STPPCI#17

PCI_PIRQA#8 ,24,27
PCI_PIRQB#24
PCI_PIRQC#28
PCI_PIRQD#26,28

H_PWRGD5

H_INTR5

H_NMI5
H_INIT#5
H_SMI#5

H_CPUSLP#5

H_IGNNE#5

H_A20M#5

H_STPCLK#5

+SB_VBAT

1 2

R300 200_0805_5%

1

C299
1U_0603_10V6K

2

C2980.1U_0402_16V4Z

1 2

PCI_RST#

12

SN74LVC125APWLE_TSSOP14

R295

4

W=20mils

+3VALW

14

P

I2O
G

7

A_AD[0..31]8,12

A_CBE#[0..3]8

NBRST#
A_AD0
A_AD1
A_AD2
A_AD3
A_AD4
A_AD5
A_AD6
A_AD7
A_AD8
A_AD9
A_AD10
A_AD11
A_AD12
A_AD13
A_AD14
A_AD15
A_AD16
A_AD17
A_AD18
A_AD19
A_AD20
A_AD21
A_AD22
A_AD23
A_AD24
A_AD25
A_AD26
A_AD27
A_AD28
A_AD29
A_AD30
A_AD31
A_CBE#0
A_CBE#1
A_CBE#2
A_CBE#3
A_STROBE#
A_DEVSEL#
A_ACAT#
A_END#
A_PAR
A_OFF#
A_SERR#
A_SBREQ#
A_SBGNT#

PM_STPCPU#
PM_STPPCI#

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
RTCX1

RTCX2
CPURSTIN#

H_INTR
H_NMI
H_INIT#
H_SMI#

H_CPUSLP#

H_IGNNE#

H_A20M#
H_CPUFERR#
H_STPCLK#
GPIO0
DPRSLPVR
SB_APIC_D0
SB_APIC_D1
CLK_14M_APIC

1 2

R301 200_0805_5%

J1

No short

1 2

1

U33A

PCIRST#

3

OE#

A_AD[0..31]

A_CBE#[0..3]

U14A

B22

PCICLKF

R22

A_RST#

H22

A_AD0

P23

A_AD1

L23

A_AD2

N23

A_AD3

N22

A_AD4

M23

A_AD5

M22

A_AD6

K22

A_AD7

M21

A_AD8

M20

A_AD9

L21

A_AD10

K21

A_AD11

L20

A_AD12

N21

A_AD13

K23

A_AD14

K20

A_AD15

F23

A_AD16

G21

A_AD17

F20

A_AD18

H21

A_AD19

F22

A_AD20

F21

A_AD21

G20

A_AD22

E21

A_AD23

E20

A_AD24

D23

A_AD25

D22

A_AD26

E22

A_AD27

D20

A_AD28

C23

A_AD29

D21

A_AD30

C22

A_AD31

L22

A_CBE#0

J23

A_CBE#1

G22

A_CBE#2

E23

A_CBE#3

H20

A_STROBE#

J21

A_DEVSEL#

G23

A_ACAT#

H23

A_END#

J20

A_PAR

J22

A_OFF#

P22

A_SERR#

B21

A_SBREQ#

B20

A_SBGNT#

N20

CPU_STP#/DPSLP#

R23

PCI_STP#

C20

A_INTA#

P20

INTB#

B23

INTC#

P21

INTD#

AC12

X1

AC11

X2

B18

CPURSTIN#

E4

CPU_PWRGD

B17

INTR/LINT0

B16

NMI/LINT1

C17

INIT

C16

SMI#

F19

SLP#

D17

IGNNE#

D18

A20M#

E19

FERR#

E16

STPCLK#

E17

SSMUXSEL/GPIO0

E18

DPRSLPVR

C19

APIC_D0

C18

APIC_D1

B19

APIC_CLK

AB7

RTC_ALE/USBOC4#/GPIO3

AB8

RTC_WR#/RTC_CLKOUT

AC8

RTC_CS#/USBOC3#/GPIO2

AC10

VBAT

AB11

RTC_GND

CHS-215IXP150-11_BGA457

+RTCVCC

PCIRST# 20,24,26,27,28

SB150 SB

Part 1 of 3

A-LINK INTERFACE

CPU XTAL

LPC

3

PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
PCICLK7

PCI CLKS

PCICLK_FB

PCIRST#
AD0/ROMA18
AD1/ROMA17
AD2/ROMA16
AD3/ROMA15
AD4/ROMA14
AD5/ROMA13
AD6/ROMA12
AD7/ROMA11

AD8/ROMA9

AD9/ROMA8
AD10/ROMA7
AD11/ROMA6
AD12/ROMA5
AD13/ROMA4
AD14/ROMA3
AD15/ROMA2
AD16/ROMD0
AD17/ROMD1
AD18/ROMD2
AD19/ROMD3
AD20/ROMD4
AD21/ROMD5
AD22/ROMD6
AD23/ROMD7

AD24/RTC_AD7
AD25/RTC_AD6
AD26/RTC_AD5
AD27/RTC_AD4
AD28/RTC_AD3
AD29/RTC_AD2
AD30/RTC_AD1
AD31/RTC_AD0

CBE#0/ROMA10

CBE#1/ROMA1

CBE#2/ROMWE#

CBE#3/RTC_RD#

FRAME#

DEVSEL#/ROMA0

PCI INTERFACE

REQ#4/PLLBP33/PDMAREQ1#

GNT#4/PLLBP50/PDMAGNT1#

IRDY#

TRDY#/ROMOE#

PAR
STOP#
PERR#
SERR#
REQ#0
REQ#1
REQ#2

REQ#3/PDMAREQ0#

GNT#0
GNT#1
GNT#2

GNT#3/PDMAGNT0#

CLKRUN#

GPIO1/ROMCS#

LAD0
LAD1
LAD2
LAD3

LFRAME#

LDRQ#0
LDRQ#1

SERIRQ

USBOC5#/GPM1

Layout note:

Trace length of PCI_CLK_R + PCI_CLK_FB should
be less than 200 mils.

PCI_1394

B15
D16
A14
A15
A16
A17
D15
A18
A19
C15
B1
C1
A1
D2
B2
C2
A2
D3
C3
A3
D4
B4
C4
A4
D5
B5
C8
D8
B8
A8
C9
D9
B9
A9
C10
B10
D11
A10
C11
B11
D12
A11
B3
C5
A7
D10
B7
A6
C7
D7
A5
B6
C6
D6
B12
C12
D13
A12
C13
A13
B13
C14
D14
B14
A20
AB5
Y14
AA14
AB14
AA13
AB13
AC14
Y13
AC13
AA2

R263 39_0402_5%

PCI_LAN

R264 39_0402_5%

PCI_PCM

R265 39_0402_5%

PCI_MINI

R266 39_0402_5%

PCI_EC

R267 39_0402_5%

PCI_SIO

R268 39_0402_5%

PCI_CLK_R

R270 39_0402_5%

PCI_CLK_FB
PCI_RST#
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
PCI_FRAME#
PCI_DEVSEL#
PCI_IRDY#
PCI_TRDY#
PCI_PAR
PCI_STOP#
PCI_PERR#
PCI_SERR#
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4
PM_CLKRUN#
RAM_SEL0
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ#0
LPC_DRQ#1
SERIRQ
OVCUR#5OVCUR#4

1 2

1 2
1 2
1 2
1 2
1 2
1 2

1 2

PCI_AD[0..31]

PCI_C/BE#[0..3]

PCI_FRAME# 24,26,27,28
PCI_DEVSEL# 24,26,27,28
PCI_ IRDY# 24,26,27,28
PCI_TRDY# 24,26,27,28
PCI_PAR 24,26,27,28
PCI_STOP# 24,26,27, 28
PCI_PERR# 24,26,27,28
PCI_SERR# 24,26,27,28

PCI_REQ#0 27
PCI_REQ#1 26
PCI_REQ#2 24
PCI_REQ#3 28

PCI_GNT#0 27
PCI_GNT#1 26
PCI_GNT#2 24
PCI_GNT#3 28

PM_CLKRUN# 26,27,28,32,33

LPC_AD0 32,33
LPC_AD1 32,33
LPC_AD2 32,33
LPC_AD3 32,33
LPC_FRAME# 32,33
LPC_DRQ#0 33
LPC_DRQ#1 32
SERIRQ 24,32,33

R29110K_0402_5%

2

C297 22P_0402_50V8J

1 2

PCI_AD[0.. 31] 22,24,26,27,28

PCI_C/BE#[ 0..3] 24,26,27,28

+3V+3V

RTC

Add for EMI

+CPU_CORE

1

1

C8031000P_0402_50V7K

2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

C804

2

0.1U_0402_10V6K

2

CLK_PCI_1394 27
CLK_PCI_LAN 26
CLK_PCI_PCM 24
CLK_PCI_MINI 28
CLK_LPC_EC 33
CLK_PCI_SIO 32

RAM_SEL120

RAM_SEL220

GPOC3#

GPOC2#

RAM_SEL2 RAM_SEL1 RAM_SEL0

000

001 8

0 1 0 256M(16X16) Elpida 8

011

1

1

1

1

Title

Size Document Number Rev

Date: Sheet

1

12

@10K_0402_5%

@10K_0402_5%

@10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

+3VS

+3V

RAM_SEL0

RAM_SEL1

RAM_SEL2

PCI_STOP#
PCI_PERR#
PCI_PAR
PCI_SERR#

PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_DEVSEL#

PCI_REQ#2
PCI_REQ#3
PCI_REQ#0
PCI_REQ#1

PCI_GNT#2
PCI_GNT#3
PCI_GNT#0
PCI_GNT#1

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

PCI_REQ#4

PCI_GNT#4

SERIRQ
LPC_FRAME#
LPC_AD3
LPC_DRQ#0

LPC_AD2
LPC_DRQ#1
LPC_AD1
LPC_AD0

PM_CLKRUN#

RP68

4 5
3 6
2 7
1 8

8.2K_1206_8P4R_5%

RP67

4 5
3 6
2 7
1 8

8.2K_1206_8P4R_5%
RP70

4 5
3 6
2 7
1 8

8.2K_1206_8P4R_5%

RP71

4 5
3 6
2 7
1 8

8.2K_1206_8P4R_5%

RP69

4 5
3 6
2 7
1 8

8.2K_1206_8P4R_5%

1 2

R276 8.2K_0402_5%

1 2

R277 8.2K_0402_5%

RP73

4 5
3 6
2 7
1 8

10K_1206_8P4R_5%

RP72

4 5
3 6
2 7
1 8

100K_1206_8P4R_5%

R280 10K_0402_5%

12

R283

1 2

R644

1 2

R645

12

R647

12

R648

12

R292

GPIO1

Size Vendor Cells

256M(16X16) SAM

8

HYN256M(16X16)

8256M(16X16)

Infienon

00 8

01 8

1 0 Elpida 8

11

512M(32X16) HYN

512M(32X16)

512M(32X16) Infie non 8

SAM512M(32X16)

Compal Electronics, Inc.

IXP150(1/4)- PCI/CPU/LPC

LA-2301

19 48Tuesday, May 1 8, 2004

1

1.0

of

5

+3V

12

R851
0_0402_5%

12

R310

D D

C C

B B

A A

10K_0402_5%

1

C304

0.1U_0402_16V4Z

2

Note: Place close

L

to ATI SB
For ATI USB2.0 only .

RP76 15 K_1206_8P4R_5%

1 8
2 7
3 6
4 5

RP79 15 K_1206_8P4R_5%

1 8
2 7
3 6
4 5

RP81 15 K_1206_8P4R_5%

4 5
3 6
2 7
1 8

1 2

R313 100K_0402_5%

R314 10K_0402_5%

R315 10K_0402_5%

AGP_STP#8

CPU_GHI#5

VTT_PWRGD17,22

IAC_RST#30

+3VS

AGP_BUSY#8

IAC_SDATAO22,30

IAC_SYNC22,30

X3

4

OUT

VDD

1

GND

OE

48MHZ_4P_FN4800002

EC_RSMRST#

12

12

R316 33_0402_5%

1 2

R318 1K_0402_5%

AGP_BUSY#

IAC_SDATAO

IAC_SYNC

CLK_SB_14M

12

R321

@10_0402_5%

1

C305

@15P_0402_50V8J

2

5

3

2

USB20P5­USB20P5+
USB20P4­USB20P4+

USB20P0­USB20P0+
USB20P3­USB20P3+

USB20P1+
USB20P1­USB20P2+
USB20P2-

EE_DI

FANOUT0

2 1

D19 RB751V_SOD323

2 1

D20 RB751V_SOD323

CLK_EXT_48M17

AGP_STP#_R

G

2

D

SB_VGATE

IAC_RST_R#

AGP_BUSY#_R

13

IAC_SDATAO_NB

12

IAC_SYNC_NB

12

IAC_BITCLK

12

R322

@10_0402_5%

1

C306

@15P_0402_50V8J

2

12

1 2

R809 0_0402_5%

1 2

R810 @0_0402_5%

S

Q13 2N7002_SOT23

R319 33_0402_5%

R320 33_0402_5%

GHI

1 2

R308 @0_0402_5%

1 2

R309
33_0402_5%

OVCUR#029

EC_RSMRST#33

CLK_SB_14M17

FLASH#34

OVCUR#229

32KHZ_S5_OUT22

OVCUR#129

SB_SPK30

IAC_BITCLK30

IAC_SDATAI030
IAC_SDATAI130

SPDIF_OUT22

PCIRST# 19,24,26,27,28

R311 12K_0603_1%

USB20P2+29

USB20P2-29

USB20P1+29

USB20P1-29

USB20P0+29

USB20P0-29

MII_TXD322
MII_TXD222
MII_TXD122
MII_TXD022
MII_TXEN22

SB_EEDO22
SB_EECLK22

PIDERST#23
SIDERST#23

1 2

IAC_RST_R#

4

CLK_USB_48M_R

USB_RCOMP

OVCUR#0
USB20P5+

USB20P5-

USB20P4+

USB20P4-

USB20P3+

USB20P3-

USB20P2+

USB20P2-

USB20P1+

USB20P1-

USB20P0+

USB20P0-

CLK25M

EE_DI

EC_RSMRST#
CLK_SB_14M

FLASH#
OVCUR#2
32KHZ_S5_OUT
OVCUR#1
SB_SPK
FANOUT0
AGP_STP#_R
AGP_BUSY#_R
GHI
SB_VGATE

IAC_BITCLK
IAC_SDATAO_NB
IAC_SDATAI0
IAC_SDATAI1
IAC_SDATAI2
IAC_SYNC_NB

SPDIF_OUT

4

1 2

R307 @10_0402_5%

U14B

P3

USBCLK/CLK48

R1

USB_RCOMP

P1

USB_VREFOUT

N4

USB_ATEST1

N3

USB_ATEST0

P4

USBOC0#/GPM7

M2

USB_HSDP5+

M1

USB_FLDP5+

N2

USB_HSDM5-

N1

USB_FLDM5-

L4

USB_HSDP4+

L3

USB_FLDP4+

M4

USB_HSDM4-

M3

USB_FLDM4-

K2

USB_HSDP3+

K1

USB_FLDP3+

L2

USB_HSDM3-

L1

USB_FLDM3-

H2

USB_HSDP2+

H1

USB_FLDP2+

J2

USB_HSDM2-

J1

USB_FLDM2-

G3

USB_HSDP1+

J3

USB_FLDP1+

H3

USB_HSDM1-

K3

USB_FLDM1-

F1

USB_HSDP0+

F2

USB_FLDP0+

G1

USB_HSDM0-

G2

USB_FLDM0-

R5

MCOL

W1

MCRS

V4

MDCK

V2

MDIO

T1

RX_CLK

T3

RXD3

U2

RXD2

T5

RXD1

W4

RXD0

T2

RX_DV

U1

RX_ERR

T4

TX_CLK

U4

TXD3

V1

TXD2

U3

TXD1

V3

TXD0

W2

TX_EN

W3

PHY_PD

U5

PHY_RST#

Y7

CLK_25M

P2

EE_CS

R3

EE_DI

R2

EE_DO

R4

EE_CK

AB9

RSMRST#

A23

OSC_IN

W6

SIO_CLK

AB2

BLINK/GPM0

AA3

FANOUT1/USBOC2#/GPM2

W11

32KHZ_IN/GPM3

AB1

USBOC1#/GPM4

Y4

SPEAKER/GPM5

AA1

FANOUT0/GPM6

AC1

GPIO_X0/AGP_STP#

AC6

GPIO_X1/AGP_BUSY#

AC2

GPIO_X2/GHI#

AC3

GPIO_X3/VGATE

AC4

GPIO_X4

AC5

GPIO_X5

E1

AC_BITCLK

E2

AC_SDOUT

Y1

AC_SDIN0

Y2

AC_SDIN1

Y3

AC_SDIN2

E3

AC_SYNC

V5

AC_RST#

E5

SPDIF_OUT

CHS-215IXP150-11_BGA457

1 2

C303 @15P_0402_50V8J

TALERT#/ETH_TALERT#

PME#/EXT_EVNT0#

RI#/EXT_EVNT1#

PCI_REQACT#

GA20_IN/GEVNT0#

KB_RST#/GEVNT1#

SMB_ALERT#/GEVNT2#

Part 2 of 3

SB150 SB

LPC_PME#/GEVNT3#

LPC_SMI#/GEVNT4#
GEVENT5#/ETH_VALERT#
GEVENT6#/ETH_FALERT#
GEVENT7#/ETH_CALERT#

ACPI / WAKE UP EVENTS

RTC_IRQ#/PWR_STRP

USB INTERFACE

PRIMARY ATA 66/100

ETHERNET MIIEEPROM

CLK / RSTGPIO

GPIO_XTRA

SECONDARY ATA 66/100

AC97

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

SLP_S3#
SLP_S5#

PWR_BTN#

PWR_GOOD

SUS_STAT#

TEST1
TEST0

GPOC0#/SCL0
GPOC1#/SDA0
GPOC2#/SCL1
GPOC3#/SDA1

PIDE_IORDY

PIDE_IRQ

PIDE_A0
PIDE_A1
PIDE_A2

PIDE_DACK#

PIDE_DRQ

PIDE_IOR#

PIDE_IOW#

PIDE_CS1#
PIDE_CS3#

PIDE_D0
PIDE_D1
PIDE_D2
PIDE_D3
PIDE_D4
PIDE_D5
PIDE_D6
PIDE_D7
PIDE_D8

PIDE_D9
PIDE_D10
PIDE_D11
PIDE_D12
PIDE_D13
PIDE_D14
PIDE_D15

SIDE_IORDY

SIDE_IRQ

SIDE_A0

SIDE_A1

SIDE_A2

SIDE_DACK#

SIDE_DRQ

SIDE_IOR#

SIDE_IOW#

SIDE_CS1#
SIDE_CS3#

SIDE_D0

SIDE_D1

SIDE_D2

SIDE_D3

SIDE_D4

SIDE_D5

SIDE_D6

SIDE_D7

SIDE_D8

SIDE_D9
SIDE_D10
SIDE_D11
SIDE_D12
SIDE_D13
SIDE_D14
SIDE_D15

3

AB4
AC9
AC7
AA11
AB10
AA10
Y11
C21
Y10
AA5
AA6
Y5
AA4
AB3
Y6
W5
Y8
AA7
AB6
AA12
W12
Y12
AB12
AA8
AB17
AC16
AB15
AB16
AC15
Y16
AA17
AA16
AC17
Y15
AA15
AC18
AA18
AC19
AA19
AC20
AA20
AC21
AB21
AA21
Y20
AB20
Y19
AB19
Y18
AB18
Y17
AA23
AA22
AC23
Y21
AB23
Y22
W21
Y23
W20
AC22
AB22
W23
V21
V23
U21
U23
T21
T23
R21
R20
T22
T20
U22
U20
V22
V20
W22

SB_EC_THERM#
SB_PM_BATLOW#

PM_SLP_S3#
PM_SLP_S5#
PBTN_OUT#
SB_PWRGD
PCI_ACT_REQ#
SUS_STAT#
SB_TEST1
SB_TEST0
SB_GA20
SB_KBRST#
SB_AC_IN
SB_EC_SWI#
LPC_SMI#
SB_EC_SMI#
SB_SCI#
SB_LID_OUT#
SM_CLK_SB
SM_DATA_SB

PWR_STRP
IDE_PDIORDY
INT_IRQ14
IDE_PDA0
IDE_PDA1
IDE_PDA2
IDE_PDDACK#
IDE_PDDREQ
IDE_PDIOR#
IDE_PDIOW#
IDE_PDCS1#
IDE_PDCS3#

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14

PDD15
IDE_SDIORDY
INT_IRQ15
IDE_SDA0
IDE_SDA1
IDE_SDA2
IDE_SDDACK#
IDE_SDDREQ
IDE_SDIOR#
IDE_SDIOW#
IDE_SDCS1#
IDE_SDCS3#
IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15

+3V

12

R396
10K_0402_5%

PM_SLP_S3# 33
PM_SLP_S5# 33
PBTN_OUT# 33
SB_PWRGD 22

SUS_STAT# 7

SM_CLK_SB 13,17
SM_DATA_SB 13,17
RAM_SEL1 19
RAM_SEL2 19
PWR_STRP 22

PDD0

PDD14

PDD1

PDD13

PDD2

PDD12

PDD3

PDD11

PDD4

PDD10

PDD5
PDD9

PDD6
PDD7
PDD8

RP76~RP79,RP82,RP103,RP104 near SB.

IDE_SDCS1#
IDE_SDCS3#
IDE_SDA0
IDE_SDA2

INT_IRQ15
IDE_SDA1
IDE_SDIORDY
IDE_SDDACK#

IDE_SDIOR#
IDE_SDDREQ

IDE_SDD15
IDE_SDD0

IDE_SDIOW#

IDE_SDD14
IDE_SDD1
IDE_SDD3

LPC_SMI#

SB_EC_SWI#

SB_GA20

SB_EC_SMI#
SB_SCI#

SB_KBRST#

SB_PM_BATLOW#
AGP_BUSY#_R

SB_LID_OUT#

SB_EC_THERM#

SB_AC_IN
GHI

AGP_STP#_R

CLK25M

IAC_BITCLK

2

SB_EC_THERM#

SB_PM_BATLOW#

SB_EC_SWI#

SB_GA20 GATEA20

SB_KBRST#

SB_EC_SMI#

SB_SCI# EC_SCI#

33_0804_8P4R_5%

33_0804_8P4R_5%

33_0804_8P4R_5%

33_0804_8P4R_5%

RP85

1 8
2 7
3 6
4 5

33_0804_8P4R_5%

RP87

1 8
2 7
3 6
4 5

33_0804_8P4R_5%

RP89

1 8
2 7
3 6
4 5

33_0804_8P4R_5%

RP84

1 8
2 7
3 6
4 5

33_0804_8P4R_5%

1 8
2 7
3 6
4 5

10K_1206_8P4R_5%

1 8
2 7
3 6
4 5

10K_1206_8P4R_5%

1 8
2 7
3 6
4 5

10K_1206_8P4R_5%

1 8
2 7
3 6
4 5

10K_1206_8P4R_5%

1 2

R323 8.2K_0402_5%

2

D10 RB751V_SOD323

D11 RB751V_SOD323

D12 RB751V_SOD323

D13 RB751V_SOD323

D14 RB751V_SOD323

D15 RB751V_SOD323

D16 RB751V_SOD323

D17 RB751V_SOD323

D18 RB751V_SOD323

RP83

IDE_PDD0

4 5

IDE_PDD14

3 6

IDE_PDD1

2 7

IDE_PDD13

1 8

RP74

IDE_PDD2

4 5

IDE_PDD12

3 6

IDE_PDD3

2 7

IDE_PDD11

1 8

RP80

IDE_PDD4

4 5

IDE_PDD10

3 6

IDE_PDD5

2 7

IDE_PDD9

1 8

RP77

IDE_PDD6

4 5

IDE_PDD7

3 6

IDE_PDD8

2 7
1 8

ODD_CSB#0
ODD_CSB#1

ODD_SA0
ODD_SA2

ODD_IIRQB

ODD_SA1

ODD_IORDYB

ODD_ACKB#

ODD_IORB#

ODD_REQB
ODD_SDD15
ODD_SDD0

ODD_IOWB#
ODD_SDD14
ODD_SDD1
ODD_SDD3

RP91

RP93

RP95

RP97

2 1

2 1

2 1

2 1

2 1

2 1

2 1

2 1

2 1

RP72~RP75,RP81,RP101,RP102 near SB.

IDE_PDA2
IDE_PDA0
IDE_PDCS3#
IDE_PDCS1#

INT_IRQ14
IDE_PDA1
IDE_PDIOR#
IDE_PDDACK#

IDE_PDIOW#
IDE_PDIORDY
IDE_PDDREQ

PDD15

ODD_CSB#0 23
ODD_CSB#1 23
ODD_SA0 23
ODD_SA2 23

ODD_IIRQB 23
ODD_SA1 23
ODD_IORDYB 23

ODD_ACKB# 23

ODD_IORB# 23

ODD_REQB 23

ODD_IOWB# 23

+3V

Title

Size Document Number Rev

Date: Sheet

EC_THERM#

PM_BATLOW#

EC_SWI#

KBRST#

ACINSB_AC_IN

EC_SMI#

EC_LID_OUT#SB_LID_OUT#

IDE_PDD[0..15]

RP75

4 5
3 6
2 7
1 8

33_0804_8P4R_5%

RP82

4 5
3 6
2 7
1 8

33_0804_8P4R_5%

RP78

4 5
3 6
2 7
1 8

33_0804_8P4R_5%

PM_SLP_S5#
PBTN_OUT#
PM_SLP_S3#

PCI_ACT_REQ#

SM_CLK_SB

SM_DATA_SB

AGP_STP#
AGP_BUSY#
SB_TEST1
SB_TEST0

IAC_SDATAI2
IAC_SDATAI1
IAC_SDATAI0

IAC_RST_R#

Compal Electronics, Inc.

IXP150(2/4) - IDE/USB/MII

LA-2301

1

IDE_PDD[0..15] 23

IDE_PDD15

IDE_SDD13
IDE_SDD11
IDE_SDD2
IDE_SDD4

IDE_SDD12
IDE_SDD10
IDE_SDD5
IDE_SDD8

IDE_SDD6
IDE_SDD9
IDE_SDD7

RP90

1 8
2 7
3 6
4 5

33_0804_8P4R_5%

RP86

1 8
2 7
3 6
4 5

33_0804_8P4R_5%

RP88

1 8
2 7
3 6
4 5

33_0804_8P4R_5%

RP92

1 8
2 7
3 6
4 5

10K_1206_8P4R_5%

12

R804 10K_0402_5%

1 2

R649 2.2K_0402_5%

1 2

R650 2.2K_0402_5%

RP96

1 8
2 7
3 6
4 5

8.2K_1206_8P4R_5%

RP98

1 8
2 7
3 6
4 5

8.2K_1206_8P4R_5%

1

EC_THERM# 33

PM_BATLOW# 33

EC_SWI# 33

GATEA20 33

KBRST# 33

ACIN 33,34,38

EC_SMI# 33

EC_SCI# 33

EC_LID_OUT# 33

IDE_SA2 23
IDE_SA0 23
IDE_CSA#1 23
IDE_CSA#0 23

IDE_IIRQA 23
IDE_SA1 23
IDE_IORA# 23
IDE_ACKA# 23

IDE_IOWA# 23
IDE_IORDYA 23
IDE_REQA 23

ODD_SDD[0..15] 23

ODD_SDD13
ODD_SDD11
ODD_SDD2
ODD_SDD4

ODD_SDD12
ODD_SDD10
ODD_SDD5
ODD_SDD8

ODD_SDD6
ODD_SDD9
ODD_SDD7

of

20 48Tuesday, Ma y 18, 2004

+3VALW

+3VS

+3V

1.0

5

4

3

2

1

+3VS

1

C308

C307

10U_0805_10V4Z

D D

2

C329

10U_0805_10V4Z

10U_0805_10V4Z

+2.5VS

1

2

0.1U_0402_10V6K

1

C330

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C309

C310

2

0.1U_0402_10V6K

1

C331

2

1

2

Add for EMI

+3VS

1000P_0402_50V7K

1

C806

2

1

C358

1U_0603_10V6K

2

0.1U_0402_10V6K

1

1

C364

C363

2

2

0.1U_0402_10V6K

1

C807

2

0.1U_0402_10V6K

10U_0805_10V4Z

1

C359

0.1U_0402_10V6K

2

0.1U_0402_10V6K

1

1

C365

2

2

0.1U_0402_10V6K

C366

C347

1

2

1

C808

2

+3V

0.1U_0402_10V6K

1

1

C348

2

2

1

C797

470P_0402_50V7K

2

0.1U_0402_10V6K

1

C367

2

0.1U_0402_10V6K

L15

1 2

L16

10U_0805_10V4Z

1000P_0402_50V7K

1

C8051000P_0402_50V7K

2

+3V_AVDDC

+3V_AVDDUSB

C362

C C

B B

+3V

MVB2012301YZT_0805

+3V

1 2

MVB2012301YZT_0805

1

1

C311

2

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C332

C333

2

0.1U_0402_10V6K

C338

10U_0805_10V4Z

1

C809

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C349

C350

2

0.1U_0402_10V6K

470P_0402_50V7K

1

C368

2

0.1U_0402_10V6K

1

C312

2

0.1U_0402_10V6K

1

1

C334

2

2

0.1U_0402_10V6K

+2.5V

0.1U_0402_10V6K

1

1

C339

2

2

0.1U_0402_10V6K

1

1

2

2

1

C798

680P_0402_50V7K

2

1

C799

2

0.1U_0402_10V6K

1

C313

2

0.1U_0402_10V6K

1

C335

2

1

C340

2

@0.1U_0402_16V7K

C351

0.1U_0402_10V6K

@0.1U_0402_16V7K

1

C800

680P_0402_50V7K

2

0.1U_0402_10V6K

1

1

C315

C314

2

2

0.1U_0402_10V6K

1

1

C336

2

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

1

C341

2

2

ATI request

+3V

1

C352

2

+2.5V

1

C354

2

ATI request

@10U_0805_10V6K

ATI request

@47U_B_6.3VM

C316

C337

0.1U_0402_10V6K

C342

0.1U_0402_10V6K

@0.1U_0402_16V7K

ATI request

5

+2.5V_AVDDCK

1

C372

1U_0603_10V6K

2

1

C373

2

0.1U_0402_10V6K

470P_0402_50V7K

1

1

C801

2

2

@10U_0805_10V4Z

C802

680P_0402_50V7K

4

A A

+2.5VS

L17

1 2

MVB2012301YZT_0805

0.1U_0402_10V6K

1

1

C317

2

2

0.1U_0402_10V6K

@0.01U_0402_16V7Z

1

C353

@0.1U_0402_16V7K

2

C318

@0.01U_0402_16V7Z

0.1U_0402_10V6K

1

1

C319

2

2

0.1U_0402_10V6K

+3VS

C324

C343

1

C320

2

0.1U_0402_10V6K

1

C325

2

@0.01U_0402_16V7Z

+2.5VS

@0.01U_0402_16V7Z

1

C344

2

ATI request CLOSE TO
L6,H6,J6

1

C355

+3V_AVDDC

C360

+3V_AVDDUSB

C361

+2.5V_AVDDCK

C369

1

C356

1

2

1

2

1

2

+

0.1U_0402_16V7K

2

LM431SC_SOT23

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

0.1U_0402_10V6K

1

1

C322

C321

2

2

ATI request

@0.01U_0402_16V7Z

1

1

C327

C326

2

2

@0.01U_0402_16V7Z

ATI request

1

1

C345

2

2

@0.01U_0402_16V7Z

+3VS

D21

2 1

RB751V_SOD323

1U_0603_10V6K

R642
10K_0402_5%

1 2

2N7002_SOT23

2

K

D72

A

1

1

C323

0.1U_0402_10V6K

2

1

1

2

2

1

C346

@0.01U_0402_16V7Z

2

+5VS

C357

+3VALW+12VALW

2

G

Q60

3

R

C328

@0.01U_0402_16V7Z

+3V_AVDDC

+3V_AVDDUSB

12

R324

1K_0402_5%

+5VS_VREF

1

+2.5V_AVDDCK

+3VALW

2

0.1U_0402_10V6K

13

D

S

1

C770
1U_0603_10V6K

2

+2.5VS

+2.5V

+2.5V

+3V

+2.5VS

1

C371

2

+SB_2.5VALW

1

C370

0.1U_0402_10V6K

2

+3VS

+SB_2.5VALW

U14C

E11

VDDQ

E12
E15

E7

E8
F11
F12
F15
F16
F17

F7

F8
G18
G19
H18
H19
M18
M19
N18
N19
T18
T19
U18
U19
V17
V18

W17
W18

J10
J11
J13
J14

K15

K9
L15

L9

N15

N9
P15

P9
R10
R11
R13
R14

P6

R6
V13

W13

V12

L6

H6

J6
P5
T6
U6
V9

V10
V11

W9

W10

F4

J4
K5
F3
K4

L5

D19

D1

A21

Y9

AA9

N5
M5

J5
G4
K6
H4
F5

A22

2

SB150 SB

VDDQ
VDDQ

Part 3 of 3

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
STB_2.5V
STB_2.5V
STB_2.5V
STB_2.5V
STB_2.5V
VDD_USB
VDD_USB
VDD_USB
AVDDC
STB_3.3V
STB_3.3V
STB_3.3V
STB_3.3V
STB_3.3V
STB_3.3V
STB_3.3V
AVDDTX0
AVDDTX1
AVDDTX2
AVDDRX0
AVDDRX1
AVDDRX2
VREF_CPU
5V_VREF
AVDD_CK
S5_2.5V
S5_3.3V
AVSSC
AVSSRX2
AVSSRX1
AVSSRX0
AVSSTX2
AVSSTX1
AVSSTX0
AVSSCK

CHS-215IXP150-11_BGA457

POWER

Title

Size Document Number Rev

Date: Sheet

LA-2301

E10

VSS

E13

VSS

E14

VSS

E6

VSS

E9

VSS

F10

VSS

F13

VSS

F14

VSS

F18

VSS

F6

VSS

F9

VSS

G6

VSS

J12

VSS

J15

VSS

J18

VSS

J19

VSS

J9

VSS

K10

VSS

K11

VSS

K12

VSS

K13

VSS

K14

VSS

K18

VSS

K19

VSS

L10

VSS

L11

VSS

L12

VSS

L13

VSS

L14

VSS

L18

VSS

L19

VSS

M10

VSS

M11

VSS

M12

VSS

M13

VSS

M14

VSS

M15

VSS

M6

VSS

M9

VSS

N10

VSS

N11

VSS

N12

VSS

N13

VSS

N14

VSS

N6

VSS

P10

VSS

P11

VSS

P12

VSS

P13

VSS

P14

VSS

P18

VSS

P19

VSS

R12

VSS

R15

VSS

R18

VSS

R19

VSS

R9

VSS

V14

VSS

V15

VSS

V16

VSS

V19

VSS

V6

VSS

V7

VSS

V8

VSS

W14

VSS

W15

VSS

W16

VSS

W19

VSS

W7

VSS

W8

VSS

H5

VSS_USB

G5

VSS_USB

Compal Electronics, Inc.

IXP150(3/4) - PWR

1

1.0

of

21 48Wednesday, May 26, 2004

5

+3VS

12

R325

10K_0402_5%

R326

VGATE44

D D

1 2

0_0402_5%

R330

@1M_0402_5%

12

12

R332

1K_0402_5%

+3VALW

14

U17A

1

P

A

O

2

B

G

SN74LVC32APWLE_TSSOP14

7

3

R327

1 2

150K_0402_5%

4

VTT_PWRGD 17,20

C374

0.1U_0402_16V7K

3

+3VALW +3VALW +3VALW

14

P

1

O2I

G

1

2

U18A

7

SN74LVC14APWLE_TSSOP14

14

P

3

7

SN74LVC14APWLE_TSSOP14

+2.5VS

12

13

2

G

O4I

G

U18B

R333

1K_0402_5%

D

Q14
2N7002_SOT23

S

1 2

150K_0402_5%

R328

12

R334

47K_0402_5%

0.47U_0603_16V7K

C375

NB_PWRGD 7

1

2

14

P

5

O6I

G

U18C

7

SN74LVC14APWLE_TSSOP14

2

+3VALW

14

P

9

O8I

G

U18D

7

SN74LVC14APWLE_TSSOP14

R329 47_0402_5%

1 2

12

R331

@10K_0402_5%

1

SB_PWRGD 20

+3VALW +3V +3V

12

R336

@10K_0402_5%

12

R348

10K_0402_5%

IGN DEBUG SPEEDSTEP F REQLTCH

EEDO

DEBUG
STRAPS

IGNORE
DEBUG
STRAPS

DEFAULT

+3VS

12

12

R335

10K_0402_5%

12

R347

@10K_0402_5%

MANUAL
PWR ON

DEFAULT

PWR
ON

R359

10K_0402_5%

C C

PWR_STRP20
SB_EEDO20
SB_EECLK20
IAC_SYNC20,30

IAC_SDATAO20,30

SPDIF_OUT20

MII_TXEN20
MII_TXD320
MII_TXD220
MII_TXD120
MII_TXD020

32KHZ_S5_OUT20

B B

REQUIRED SYSTEM STRAPS

STRAP
HIGH

STRAP
LOW

EECK

ROM ON
PCI BUS

ROM ON
LPC
BUS

DEFAULT

12

R337

@10K_0402_5%

12

R349

10K_0402_5%

+3VS

12

1 2

AC_SYNC

INIT ACTIVE
HIGH

INIT ACTIVE
LOW (PIII)

DEFAULT

R338

@10K_0402_5%

R350

10K_0402_5%

+3VS +3VS

12

R339

@10K_0402_5%

12

R351

10K_0402_5%

33MHz NB
BUS

HI SPEED
A-LINK

DEFAULT

SIO 24MHzUSE

SIO 48MHzAUTO

DEFAULT

12

R340

@10K_0402_5%

12

R352

10K_0402_5%

CPU_STP#

ENABLE
SPEED
STEP

DISABLE
SPEED
STEP

DEFAULT

+3V +3V +3V +3V +3V

12

R341

10K_0402_5%

12

R353

@10K_0402_5%

TX_EN

DISABLE
CPU FREQ
SETTING

DEFAULT

ENABLE CPU
FREQSETTING

12

R342

10K_0402_5%

12

R354

@10K_0402_5%

12

R343

10K_0402_5%

12

R355

@10K_0402_5%

ETHERNET TXD[3:0]AC_SD OUT SPDIF_OUTPWR_STRP

PROCESSOR FREQ MULTIPLIER

12

R344

10K_0402_5%

12

R356

@10K_0402_5%

12

R345

10K_0402_5%

12

R357

@10K_0402_5%

+3VALW

12

R346

10K_0402_5%

12

R358

@10K_0402_5%

32KHZ_S5

32KHZ
OUTPUT
FROM SB200
(INT RTC)

DEFAULT

32KHZ INPUT
TO SB200
(EXT RTC)

A A

5

PCI_AD2619,24,26,27,28

12

R360

@10K_0402_5%

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

IXP150(4/4) - STRAPS

LA-2301

1.0

of

22 48Tuesday, May 1 8, 2004

1

5

HDD Connector

EC_IDERST30,31,33

4

A

5

B

PHDD_LED#

IDE_IORDYA

IDE_REQA

IDE_IIRQA

IDE_PDD7

I5O

ODD_IORDYB

ODD_REQB

ODD_IIRQB

ODD_SDD7

+3V

14

U19B

P

6

O

G

SN74LVC08APW_TSSOP14

7

+5VCD

12

6

R367
10K_0402_5%

+5VCD

4

U16B

OE#

SIDE_RST#

R372 100K_0402_5%

NB_RST#7,1 9,32,33

D D

PCI_RST#19

PIDERST#20

C C

1 2

R730 0_0402_5%

1 2

R731 @0_0402_5%

+5VS

+3VS

R361 100K_0402_5%

R362 4.7K_0402_5%

1 2

1 2

1 2

R3635.6K_0402_5%

1 2

R3648.2K_0402_5%

1 2

IDE_RST#

R36610K_0402_5%

CD-ROM Connector

+3V

PCMRST#33

14

IDE_RST#

SIDERST#20

SN74LVC08APW_TSSOP14

B B

+3VS

A A

PCI_RST#

U19C

9

P

A

8

O

10

B

G

7

R371

10K_0402_5%

1 2

R377 4.7K _0402_5%

1 2

R378 5.6K _0402_5%

1 2

R379 8.2K _0402_5%

12

R380 5.6K _0402_5%

+3V

12

13

D

2

G

S

5

SN74LVC125APWLE_TSSOP14

1 2

R374
10K_0402_5%

G_PCI_RST#

2N7002_SOT23
Q17

1

A

2

B

ODD_SDD[0..15]20

ODD_IORDYB20

4

+3V

0.1U_0402_16V4Z

14

P

G

7

GND:Master
NC: Slave

INT_CD_L30,31

CD_AGND30

ODD_IOWB#20

ODD_IIRQB20

ODD_SA120
ODD_SA020

SHDD_LED#33

12

4

IDE_PDD[0..15]20

C376

1 2

U19A

PIDE_RST#

3

O

SN74LVC08APW_TSSOP14

12

R365475_0402_1%

INT_CD_L
CD_AGND
SIDE_RST#
ODD_SDD7
ODD_SDD6
ODD_SDD5
ODD_SDD4
ODD_SDD3
ODD_SDD2
ODD_SDD1
ODD_SDD0

ODD_IOWB#
ODD_IORDYB
ODD_IIRQB
ODD_SA1
ODD_SA0

SW_ODD_CSB#0

SHDD_LED#

+5VCD

SEC_CSEL

12

R373 475_0402_1%

IDE_IOWA#20

IDE_IORDYA20

IDE_ACKA#20

PHDD_LED#33

+5VCD

1

2

IDE_PDD[0..15]

PIDE_RST#

IDE_PDD7
IDE_PDD8
IDE_PDD6
IDE_PDD9
IDE_PDD5
IDE_PDD10
IDE_PDD4
IDE_PDD11
IDE_PDD3
IDE_PDD12
IDE_PDD2
IDE_PDD13
IDE_PDD1
IDE_PDD14
IDE_PDD0
IDE_PDD15

+5VS

IDE_REQA

IDE_IOWA#

IDE_IORA#

IDE_IORDYA
PCSEL
IDE_ACKA#

IDE_IIRQA

IDE_SA1

IDE_SA0
IDE_SA2
IDE_CSA#0
IDE_CSA#1
PHDD_LED#

IDE_REQA20

IDE_IORA#20

IDE_IIRQA20

IDE_SA120

IDE_SA020

IDE_SA220
IDE_CSA#020
IDE_CSA#120

60mil

Place caps. near CDROM CONN.

C381
10U_0805_10V4Z

1

C382
1U_0603_10V4Z

2

JP7

1

INT_CD_L

3

CD_AGND
SIDE_RST#5ODD_SDD8
ODD_SDD77ODD_SDD9
ODD_SDD69ODD_SDD10
ODD_SDD511ODD_SDD11
ODD_SDD413ODD_SDD12
ODD_SDD315ODD_SDD13
ODD_SDD217ODD_SDD14
ODD_SDD119ODD_SDD15
ODD_SDD021ODD_REQB

23

GND

25

ODD_IOWB#
ODD_IORDYB27ODD_ACKB#

29

ODD_IIRQB

31

ODD_SA1

33

ODD_SA0
ODD_CSB#035ODD_CSB#1

37

SHDD_LED#

39

+5VS

41

+5VS

43

GND

45

GND

47

SEC_CSEL

49

N/A

FOX_QT8H0506-L201R-F

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET N OR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

INT_CD_R

GND

ODD_IORB#

GND

CBLIDB

ODD_SA2

+5VS
+5VS
+5VS

GND
GND
GND

3

JP6

1

RESET#

2

GND

3

DD7

4

DD8

5

DD6

6

DD9

7

DD5

8

DD10

9

DD4

10

DD11

11

DD3

12

DD12

13

DD2

14

DD13

15

DD1

16

DD14

17

DD0

18

DD15

19

GND

21

DMARQ

22

GND

23

DIOW# / STOP

24

GND

25

DIOR# / HDMARDY# / HSTROBE

26

GND

27

IORDY / DDMARDY# / DSTROBE

28

CSEL

29

DMACK#

30

GND

31

INTRQ

32

Reserved

33

DA1

34

PDIAG#

35

DA0

36

DA2

37

CS0#

38

CS1#

39

DASP#

40

GND

41

+5VCC

42

+5VCC

43

GND

44

NC

ALLTOP_C17864-14401_REVERSE

1

C383

0.1U_0402_16V4Z

2

INT_CD_R

2
4

ODD_SDD8

6

ODD_SDD9

8

ODD_SDD10

10

ODD_SDD11

12

ODD_SDD12

14

ODD_SDD13

16

ODD_SDD14

18

ODD_SDD15

20

ODD_REQB

22

ODD_IORB#

24
26

ODD_ACKB#

28
30

N/A

N/A

3

32
34
36
38
40
42
44
46
48
50

CBLIDB
ODD_SA2

SW_ODD_CSB#1

1

C384
@1000P_0402_25V8K

2

INT_CD_ R 30,31

1 2

R829 @0_0402_5%

ODD_REQB 20

ODD_IORB# 20

R369 100K_0402_5%

1

C388

0.1U_0402_16V4Z

2

ODD_ACKB# 20

ODD_SA2 20

+5VCD

+5VCD

2

+5VS

1

2

C377
10U_0805_10V4Z

Place caps. near HDD CONN.

1

C378
1U_0603_10V4Z

2

1

C379

0.1U_0402_16V4Z

2

1

1

C380
@1000P_0402_25V8K

2

Net width should be 60mil wide

Q15
AOS 3401_SOT23

+5VALW

R368

+5VCD

ODD_CSB#120

ODD_CSB#020

2

1 2

240K_0402_5%

C387

1 2

1U_0603_10V4Z

+5VALW

12

13

2

1

C385
10U_0805_10V4Z

2

R370 10K_0402_5%

12

13

+3V

G_PCI_RST#

C3890.1U_0402_16V4Z

1 2

ODD_CSB#1 SW_ODD_CSB#1

Title

Size Document Number Re v

B

Date: Sheet

1

14

U16A

P

3

OE#

I2O
G

SN74LVC125APWLE_TSSOP14

7

G_PCI_RST#

10

U16C

8

OE#

I9O

SN74LVC125APWLE_TSSOP14

Compal Electronics, Inc.

IDE/CDROM CONN.

LA-2301

1

C386

0.1U_0402_16V4Z

2

CD_PLAY

2

Q16
DTC124EK_SC59

+5VCD

+5VCD

+5VCD

12

R376
10K_0402_5%

12

R375
10K_0402_5%

SW_ODD_CSB#0ODD_CSB#0

1

CD_PL AY 31,33

23 48Tuesday, May 18, 2004

of

1.0

5

D D

CLK_PCI_PCM

C C

12

R381
10_0402_5%

1

C402
15P_0402_50V8J

2

+VCC_5IN1

+3VS

+3VS

IDSEL:
PCI_AD20

SDCD#25

B B

+VCC_5IN1

R832
@0_0805_5%

2

Q65

@AOS 3401_SOT23

1 3

43K_0402_5%

SM_CD#25

R852

1 2

SDOC#25

1 2

R833 0_0805_5%

1 2

R383 43K_0402_5%

1 2

R385 43K_0402_5%

1 2

R387 43K_0402_5%

1 2

R388 43K_0402_5%

1 2

R389 43K_0402_5%

+3VS

A A

1 2

R391 @43K_0402_5%

1 2

R392 @43K_0402_5%

1 2

R836 @43K_0402_5%

SDCM_XDALE

SDDA0_XDD7

SDDA1_XDD0

SDDA2_XDCL

SDDA3_XDD4

SDCD#

SDWP

MSINS#

CLK_EXT_SD4817

SDCK_XDWE#25

SDCM_XDALE25
SDDA0_XDD725
SDDA1_XDD025
SDDA2_XDCL25
SDDA3_XDD425

SD_PULLHIGH

12

Close chip termenal

5

4

VPPD025

VPPD125
VCCD0#25
VCCD1#25

N13

M13

U21

1 2

1 2

R398

PCI_AD[0..31]

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

PCIRST#

CLK_PCI_PCM

+3V_PCM_SUSP

PCM_ID

PCI_PIRQA#
SD_PULLHIGH
PCI_PIRQB#

SDOC#

PCIRST#

SDCD#
SDWP
SDPWREN#

0_0402_5%

SDCM_XDALE
SDDA0_XDD7
SDDA1_XDD0
SDDA2_XDCL
SDDA3_XDD4

M11

M10

N10

N11

C2
C1
D4
D2
D1
E4
E3
E2
F2

F1
G2
G3

H3

H4

J1
J2

N2
M3

N3

K4
M4

K5

L5

M5

K6
M6

N6
M7

N7

L7
K7
N8

E1

J3
N1
N5

G4

J4
K1
K3

L1

L2

L3

M1
M2

A1
B1
H1

L8

L11

F4

K8
N9
K9

L10

J9

E7

E8
F8

G7

H5

F6
E5
E6
F7
F5

G6

PCI_AD[0..31]19,22,26,27,28

PCI_C/BE#319,26,27,28 S1_REG# 25
PCI_C/BE#219,26,27,28
PCI_C/BE#119,26,27,28
PCI_C/BE#019,26,27,28

PCIRST#19,20,26,27,28

PCI_FRAME#19,26,27,28

PCI_IRDY#19,26,27,28

PCI_TRDY#19,26,27,28

PCI_DEVSEL#19,26,27,28

PCI_STOP#19,26,27,28
PCI_PERR#19,26,27,28

PCI_SERR#19,26,27,28

PCI_PAR19,26,27,28
PCI_REQ#219
PCI_GNT#219

CLK_PCI_PCM19

PCM_PME#26,27,28,33

R384 10K_0402_5%

PCI_AD20

R386 100_0402_1%

PCI_PIRQA#8,19,27

PCI_PIRQB#19

SERIRQ19,32,33

5IN1_LED#35

+VCC_5IN1

SDCD#25
SDWP25

SDPWREN#25

1 2

G5

4

VCCD1#

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

CBE3#
CBE2#
CBE1#
CBE0#

PCIRST#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
PAR
PCIREQ#
PCIGNT#
PCICLK

RIOUT#_PME#
SUSPEND#

IDSEL

MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6
MFUNC7

GRST#

VCC_SD

SDCD#
SDWP/SMWPD#
SDPWREN33#

SDCLKI

SDCLK/SMWE#
SDCMD/SMALE
SDDAT0/SMDATA7
SDDAT1/SMDATA0
SDDAT2/SMCLE
SDDAT3/SMDATA4

GND_SD

G13

A7

N12

M12

VPPD0

VPPD1

VCCA2

VCCD0#

PCI Interface

SD/MMC/MS/SM

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET N OR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B4

C8

VCC10

VCCA1

GND1D3GND2H2GND3L4GND4M8GND5

F12

K11

3

G1

K2

N4

F3

L6

L9

H11

D12

VCC2

VCC3

VCC4

VCC1

VCC5

VCC9

VCC6

VCC7

VCC8

CAD31/D10

CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6

CAD19/A25

CAD18/A7

CAD17/A24

CAD16/A17

CAD15/IOWR#

CAD14/A9

CAD13/IORD#

CAD12/A11

CAD11/OE#

CAD10/CE2#

CAD9/A10
CAD8/D15

CAD7/D7

CAD6/D13

CAD5/D6

CAD4/D12

CAD3/D5

CAD2/D11

CAD1/D4
CAD0/D3

CCBE3#/REG#

CCBE2#/A12

CCBE1#/A8

CCBE0#/CE1#

CARDBUS

CRST#/RESET
CFRAME#/A23

CIRDY#/A15

CTRDY#/A22

CDEVSEL#/A21

CSTOP#/A20
CPERR#/A14

CSERR#/WAIT#

CPAR/A13

CREQ#/INPACK#

CGNT#/WE#

CCLK/A16

CSTSCHG/BVD1_STSCHG#

CCLKRUN#/WP_IOIS16#

CBLOCK#/A19

CINT#/READY_IREQ#

SPKROUT

CAUDIO/BVD2_SPKR#

CCD2#/CD2#
CCD1#/CD1#

CVS2/VS2#

CVS1/VS1

CRSV3/D2
CRSV2/A18
CRSV1/D14

MSPWREN#/SMPWREN#

GND6

GND7

GND8

B6

C10

3

MSINS#

MSBS/SMDATA1

MSCLK/SMRE#
MSDATA0/SMDATA2
MSDATA1/SMDATA6
MSDATA2/SMDATA5
MSDATA3/SMDATA3

SMBSY#

SMCD#
SMWP#

SMCE#

CB714_LFBGA169

+S1_VCC
+3VS

B2
C3
B3
A3
C4
A6
D7
C7
A8
D8
A9
C9
A10
B10
D10
E12
F10
E13
F13
F11
G10
G11
G12
H12
H10
J11
J12
K13
J10
K10
K12
L13

B7
A11
E11
H13

B9
B11
A12
A13
B13
C12
C13
A5
D13
B8
C11
B12

C5
D5

D11

D6

M9
B5

A4
L12
D9
C6
A2
E10
J13

H7
J8
H8
E9
G9
H9
G8
F9

H6
J7
J6
J5

S1_A[0..25]

S1_D[0..15]

S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3

S1_REG#
S1_A12
S1_A8
S1_CE1#

S1_RST
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A14
S1_WAIT#
S1_A13
S1_INPACK#
S1_WE#
A16_CLK

S1_BVD1
S1_WP

S1_A19

S1_RDY#

PCM_SPK#
S1_BVD2

S1_CD2#
S1_CD1#
S1_VS2
S1_VS1
S1_D2
S1_A18
S1_D14

XD_MS_PWREN#
MSBS_XDD1

MSD0_XDD2
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3

1 2

S1_A[0..25] 25

S1_D[0..15] 25

1 2

R382 33_0402_5%

1 2

R394 33_0402_5%

R831

2.2K_0402_5%

2

S1_IOWR# 25

S1_IORD# 25

S1_OE# 25
S1_CE2# 25

S1_CE1# 25

S1_RST 25

S1_WAIT# 25

S1_INPACK# 25
S1_WE# 25

S1_BVD1 25
S1_WP 25

S1_RDY# 25

PCM_SPK# 30
S1_BVD2 25

S1_CD2# 25
S1_CD1# 25
S1_VS2 25
S1_VS1 25

MSINS# 25
XD_MS_PWREN# 25
MSBS_XDD1 25

MSD0_XDD2 25
MSD1_XDD6 25
MSD2_XDD5 25
MSD3_XDD3 25

XDBSY# 25
XDCD# 25
XDWP# 25
XDCE# 25

2

+S1_VCC

S1_A16

+3VS

1

C390

0.1U_0402_16V4Z

2

+3VS

1

C394

0.1U_0402_16V4Z

2

1

C398

0.1U_0402_16V4Z

2

1

1

C391

0.1U_0402_16V4Z

2

1

C395

0.1U_0402_16V4Z

2

1

C399

0.1U_0402_16V4Z

2

10P_0402_50V8K

S1_CD1#

1

2

1

2

C403

C392

0.1U_0402_16V4Z

C396

0.1U_0402_16V4Z

1

C400

0.1U_0402_16V4Z

2

1

10P_0402_50V8K

2

S1_CD2#

2

C393

0.1U_0402_16V4Z

1

1

C397

0.1U_0402_16V4Z

2

1

C401

0.1U_0402_16V4Z

2

C404

Closed to Pin A4Closed to Pin L12

Close chip termenal

MSD0_XDD2

MSD1_XDD6

MSD2_XDD5

MSD3_XDD3

MSBS_XDD1

MSCLK_XDRE# 25

Title

Size Document Number Re v

B

Date: Sheet

Compal Electronics, Inc.

PCMCIA Controller ENE CB714

1 2

R397 @43K_0402_5%

1 2

R399 @43K_0402_5%

1 2

R400 @43K_0402_5%

1 2

R401 @43K_0402_5%

1 2

R403 @43K_0402_5%

LA-2301

24 48Tuesday, May 18, 2004

1

1

2

1.0

of

5

PCMCIA Power Controller

4

3

2

1

CardBus Socket

1

C414

2

1

0.01U_0402_25V7Z

2

R417

C421

43K_0402_5%

3

S1_A[0..25]

S1_D[0..15]

C415

0.1U_0402_16V4Z

C419

SDCK_XDWE#

1

C420

2

MSCLK_XDRE#

12

1

2

+3VS

R418

1 2

+S1_VCC

1

2

+S1_VPP

1

2

SD PWR Control

+3VS

+VCC_5IN1

U23

1

GND

2

IN

3

IN

4

EN#

TPS2041ADR_SO8

S1_CE1#24

S1_OE#24

S1_WE#24
S1_RDY#24

+S1_VCC

+S1_VPP

S1_WP24

SDDA1_XDD0
MSBS_XDD1
MSD0_XDD2
MSD3_XDD3
SDDA3_XDD4
MSD2_XDD5
MSD1_XDD6
SDDA0_XDD7

XDWP#
SDWP
SDCK_XDWE#
SDCM_XDALE

SM_CD#

XDBSY#
MSCLK_XDRE#
XDCE#
XDCD#

SDDA2_XDCL

OUT
OUT
OUT
OC#

S1_D3
S1_D4
S1_D5
S1_D6
S1_D7
S1_CE1#
S1_A10
S1_OE#
S1_A11
S1_A9
S1_A8
S1_A13
S1_A14
S1_WE#
S1_RDY#

S1_A16
S1_A15
S1_A12
S1_A7
S1_A6
S1_A5
S1_A4
S1_A3
S1_A2
S1_A1
S1_A0
S1_D0
S1_D1
S1_D2
S1_WP S1_CD2#

JP27

34

SM-D0

33

SM-D1 / XD-D1

32

SM-D2 / XD-D2

31

SM_D3 / XD_D3

21

SM-D4 / XD-D4

22

SM-D5 / XD-D5

23

SM-D6 / XD-D6

24

SM-D7 / XD-D7

35

SM_WP-IN / XD_WP-IN

43

SM-WP-SW

36

#SM_-WE / XD_-WE

37

#SM-ALE / XD-ALE

25

SM-LVD

3

SM-VCC-SW

29

SM_-VCC / XD_-VCC

26

#SM_R/-B / XD_R/-B

27

#SM_-RE / XD_-RE

28

#SM_-CE / XD_-CE

30

#SM_-CD

2

SM-COM-SW

38

SM-CLE / XD-CLE

TAITWUN_R007-L30-15-S

+VCC_5IN1

8
7
6
5

1 2

2

R834

0_0402_5%

S1_A[0..25]24

S1_D[0..15]24

Close to
CardBus Conn.

10U_0805_10V4Z

C418

4.7U_0805_10V4Z

SDCK_XDWE#24

10P_0402_50V8K

MSCLK_XDRE#24

@0_0402_5%

@10P_0402_50V8K

SDPWREN#24

XD_MS_PWREN#24

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET N OR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MS_D0
MS_D1
MS_D2
MS_D3

MS_BS

GND
GND
GND
GND
GND

40mil

20mil

11
6
5
37
34
8
32

29
17
16
19
25
27
13
22

1
42
41
40
39

3
4

4

+S1_VCC

+S1_VPP

+S1_VCC

12

R40843K_0402_5%

12

R41047K_0402_5%

12

R41247K_0402_5%

12

R41447K_0402_5%

12

R41647K_0402_5%

SDDA0_XDD7
SDDA1_XDD0
SDDA2_XDCL
SDDA3_XDD4
SDCK_XDWE#
SDCM_XDALE

SDWP

1 2

C406 0.1U_0402_16V4Z

C407 0.1U_0402_16V4Z

1 2

C409 10U_0805_10V4Z

1 2

C410 0.01U_0402_25V4Z

1 2

C411 1U_0603_10V4Z

VCCD0# 24
VCCD1# 24
VPPD0 24
VPPD1 24

MSD0_XDD2
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3

MSCLK_XDRE#

MSBS_XDD1

MSINS#

SDCD#

SD CLK

MS CLK

+VCC_5IN1

SDDA0_XDD7 24
SDDA1_XDD0 24
SDDA2_XDCL 24

SDDA3_XDD4 24

SDCM_XDALE 24

+VCC_5IN1

MSD0_XDD2 24
MSD1_XDD6 24
MSD2_XDD5 24
MSD3_XDD3 24

MSBS_XDD1 24
MSINS# 24

SDCD# 24

SDWP 24

D D

Don't support 12V card

C4120.1U_0402_16V4Z

C4134.7U_0805_10V4Z

C4160.1U_0402_16V4Z

C4174.7U_0805_10V4Z

R405

10K_0402_5%

C C

+3VS

xD PU and PD. Close to Socket

R413 @43K_0402_5%

+VCC_5IN1

R415 10K_0402_5%

1 2

R411 2.2K _0402_5%

R407 10K_0402_5%

R409 10K_0402_5%

B B

+VCC_5IN1

XDWP#24

A A

SM_CD#24

SDDA1_XDD0
MSBS_XDD1
MSD0_XDD2
MSD3_XDD3
SDDA3_XDD4
MSD2_XDD5
MSD1_XDD6
SDDA0_XDD7

MSCLK_XDRE#

XDCE#
SDCK_XDWE#

XDBSY#
SDCM_XDALE
XDCD#
SDDA2_XDCL

XDWP#

SM_CD#
SDWP

XDCD#

12

XDBSY#

12

MSCLK_XDRE#

12

SDCK_XDWE#

12

5

35
21
18
15
12

7
10
14
23

30
24
33
28

26
31

9
36
20

2
38

U22

9

12V

+5VS

5

5V

6

5V

+3VS

3

3.3V

4

3.3V

1 2

XDCD# 24

XDBSY# 24

XDCE# 24

JP9

SM_VCC / XD_VCC
SM_D0 / XD_D0
SM_D1 / XD_D1
SM_D2 / XD_D2
SM_D3 / XD_D3
SM_D4 / XD_D4
SM_D5 / XD_D5
SM_D6 / XD_D6
SM_D7 / XD_D7

SM_-RE / XD_-RE
SM_-WP / XD_-WP
SM_-CE / XD_-CE
SM_-WE / XD_-WE

SM_R/-B / XD_R/-B
SM_ALE / XD_ALE
SM_CD / XD_CD
SM_CLE / XD_CLE
SM_LVD

SM-CD2 / SW-CD2
SM-WP2 / SW-WP2

TAISOL_152-4001004-00-1

5 IN 1 CONN

GND

7

SD-SW-WP1 / SW-WP1

13

VCC

12

VCC

11

VCC

10

VPP

1

VCCD0

2

VCCD1

15

VPPD0

14

VPPD1

8

OC

SHDN

CP-2211_SSOP16

16

Reserve for Debug.

S1_WP

S1_OE#

S1_RST

S1_CE1#

S1_CE2#

SD_VCC
SD_DAT0
SD_DAT1
SD_DAT2
SD_DAT3

SD_CLK

SD_CMD

MS_VCC

MS_SCLK

MS_INS

SD-SW-CD1 / SW-CD1

JP8

1

GND

2

S1_D3

3

S1_D4

4

S1_D5

5

S1_D6

6

S1_D7

7

S1_CE1#

8

S1_A10

9

S1_OE#

10

S1_A11

11

S1_A9

12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
69
71
73
75
77
79
81
83

5 IN 1 CONN

+3VS

S1_IOWR#
S1_A8
S1_A13
S1_A14
S1_WE#
S1_RDY#
S1_VCC
S1_VPP
S1_A16
S1_A15
S1_A12
S1_A7
S1_A6
S1_A5
S1_A4
S1_A3

S1_INPACK#
S1_A2
S1_A1
S1_A0
S1_D0
S1_D1
S1_D2
S1_WP
GND
GND
GND
GND
GND
GND
GND
GND
GND

FOX_1CA41502-TC-AW_84P_LT

SD-WP-SW

SD-CD-SW

SD-VCC-SW

SD-COM-SW

MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3

R815
10K_0402_5%

1 2

@150U_D2_6.3VM

Title

Size Document Number Re v

B

Date: Sheet

35

GND

S1_CD1#

S1_D11
S1_D12
S1_D13
S1_D14
S1_D15

S1_CE2#

S1_VS1

S1_IORD#

S1_A17
S1_A18
S1_A19
S1_A20

S1_A21
S1_VCC
S1_VPP

S1_A22

S1_A23

S1_A24

S1_A25

S1_VS2
S1_RST

S1_WAIT#

S1_REG#
S1_BVD2
S1_BVD1

S1_D8
S1_D9

S1_D10

S1_CD2#

GND
GND
GND
GND
GND
GND
GND
GND
GND

SD-DAT3
SD-DAT2
SD-DAT1
SD-DAT0

SD-CMD

SD_CLK
SD-VCC

MS-SCLK

MS-INS

MS-BS

MS-VCC

XD-VCC

XD-CD

GND
GND

SDOC# 24

C845

36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
70
72
74
76
78
80
82
84

11
12
6
7
5
10
8
9
4
42
41

15
14
16
18
19
17
13
20

40
39
1
44

S1_CD1#

S1_CE2#

S1_IORD#

S1_IOWR#

S1_WAIT#

S1_INPACK#

S1_REG#
S1_BVD2
S1_BVD1

SDDA3_XDD4
SDDA2_XDCL
SDDA1_XDD0
SDDA0_XDD7
SDWP
SDCM_XDALE
SDCK_XDWE#

SDCD#

MSD0_XDD2
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3
MSCLK_XDRE#
MSINS#
MSBS_XDD1

XDCD#

+VCC_5IN1

22U_1206_10V4Z

1

1

+

C823

2

2

0.1U_0402_16V4Z

S1_D11
S1_D12
S1_D13
S1_D14
S1_D15

S1_VS1

S1_A17
S1_A18
S1_A19
S1_A20
S1_A21

S1_A22
S1_A23
S1_A24
S1_A25
S1_VS2
S1_RST

S1_D8
S1_D9
S1_D10

0.1U_0402_16V4Z

1

2

Compal Electronics, Inc.

PCMCIA Socket

LA-2301

C824

1

S1_CD1# 24

S1_CE2# 24
S1_VS1 24
S1_IORD# 24
S1_IOWR# 24

+S1_VCC
+S1_VPP

S1_VS2 24
S1_RST 24
S1_WAIT# 24
S1_INPACK# 24
S1_REG# 24
S1_BVD2 24
S1_BVD1 24

S1_CD2# 24

+VCC_5IN1

+VCC_5IN1

+VCC_5IN1

1

C825

2

0.1U_0402_16V4Z

25 48Tuesday, May 18, 2004

1

2

0.1U_0402_16V4Z

1

C826

C827

2

1.0

of

5

PCI_AD[0..31]19,22,24,27,28

R421

C423

CLK_PCI_LAN

12

1

2

Y3

D D

10_0402_5%

15P_0402_50V8J

C C

B B

LAN_X1 LAN_X2

25MHZ_20P_1BX25000CK1A

1

C432
27P_0402_50V8J

2

PCI_AD[0..31]

PCI_C/BE#019,24,27,28
PCI_C/BE#119,24,27,28
PCI_C/BE#219,24,27,28
PCI_C/BE#319,24,27,28

PCI_AD19 LAN_IDSEL

1 2

R431 100_0402_1%

PCI_PAR19,24,27,28

PCI_FRAME#19,24,27,28

PCI_IRDY#19,24,27,28

PCI_TRDY#19,24,27,28

PCI_DEVSEL#19,24,27,28

PCI_STOP#19,24,27,28

PCI_PERR#19,24,27,28
PCI_SERR#19,24,27,28

PCI_REQ#119
PCI_GNT#119

PCI_PIRQD#19,28

LAN_PME#24,27,28,33

PCIRST#19,20,24,27,28

CLK_PCI_LAN19
PM_CLKRUN#19,27,28,32,33

1

C433
27P_0402_50V8J

2

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

CLK_PCI_LAN
PM_CLKRUN#

U24

104

AD0

103

AD1

102

AD2

98

AD3

97

AD4

96

AD5

95

AD6

93

AD7

90

AD8

89

AD9

87

AD10

86

AD11

85

AD12

83

AD13

82

AD14

79

AD15

59

AD16

58

AD17

57

AD18

55

AD19

53

AD20

50

AD21

49

AD22

47

AD23

43

AD24

42

AD25

40

AD26

39

AD27

37

AD28

36

AD29

34

AD30

33

AD31

92

C/BE#0

77

C/BE#1

60

C/BE#2

44

C/BE#3

46

IDSEL

76

PAR

61

FRAME#

63

IRDY#

67

TRDY#

68

DEVSEL#

69

STOP#

70

PERR#

75

SERR#

30

REQ#

29

GNT#

25

INTA#

31

PME#

27

RST#

28

CLK

65

CLKRUN#

4

GND/VSS

17

GND/VSS

128

GND/VSS

21

GND/VSSPST

38

GND/VSSPST

51

GND/VSSPST

66

GND/VSSPST

81

GND/VSSPST

91

GND/VSSPST

101

GND/VSSPST

119

GND/VSSPST

35

GND

52

GND

80

GND

100

GND

RTL8100C_QFP128

4

EEDO

AUX/EEDI

EESK
EECS

LED0
LED1
LED2

NC/LED3

TXD+/MDI0+

TXD-/MDI0-

RXIN+/MDI1+

RXIN-/MDI1-

NC/MDI2+

NC/MDI2-

NC/MDI3+

NC/MDI3-

X1
X2

LWAKE

ISOLATE#

RTSET

NC/SMBCLK

NC/SMBDATA

NC/M66EN

NC/AVDDH

PCI I/F

NC/HV

NC/HSDAC+

NC/HG
NC/LG2
NC/LV2

NC/VSS
NC/VSS

NC/GND
NC/GND
NC/GND
NC/GND

LAN I/F

NC/GND
NC/GND

CTRL25

RTT3/CRTL18

VDD33

VDD33

VDD33

VDD33

VDD33

VDD33

VDD33

AVDD33/AVDDL
AVDD33/AVDDL
AVDD33/AVDDL

NC/AVDDL

VDD25/VDD18
VDD25/VDD18
VDD25/VDD18
VDD25/VDD18

NC/VDD18
NC/VDD18
NC/VDD18
NC/VDD18
NC/VDD18

Power

AVDD25/HSDAC-

LAN_EEDO

108

LAN_EEDI

109

LAN_EECLK

111

LAN_EECS

106

ACTIVITY#

117

LINK10_100#

115
114
113

LAN_TD+

1

LAN_TD-

2

LAN_RD+

5

LAN_RD-

6

14
15
18
19

LAN_X1

121

LAN_X2

122

105
23
127

10mil

72

10mil

74

88

10
120

11
123
124

+LAN_DVDD

126

9
13

22
48
62
73
112
118

CTRL25

8

125

26
41
56
71
84
94
107

+LAN_AVDDL

3
7
20
16

32
54
78

+LAN_DVDD

99

24
45
64
110
116

+2.5V_LAN_VDD

12

20mil

C440

0.1U_0402_16V4Z

1 2

R420

5.6K_0402_5%

R424 1K_0402_5%

1 2

R427 15K_0402_5%

1 2

R428 5.36K_0603_1%

1 2

CTRL25

C427

1

1

C430

0.1U_0402_16V4Z

2

2

1

1

C436

0.1U_0402_16V4Z

2

2

1 2

R437 0_0805_5%

+3V

40mil

1

C429

0.1U_0402_16V4Z

2

40mil

1

0.1U_0402_16V4Z

C435

2

0.1U_0402_16V4Z

1

2

10U_0805_10V4Z

0.1U_0402_16V4Z

1

C441
10U_0805_10V4Z

2

+3V

+3VS

+3V

31

E

2

B

C

1

2

1 2

L18 0_0805_5%

C431

1 2

R436 0_0805_5%

C437

3

LAN_EECS
LAN_EECLK
LAN_EEDI
LAN_EEDO

Q18

2SB1197K_SOT23

40mil

1

C428

0.1U_0402_16V4Z

2

+3V

+2.5V_LAN

49.9_0402_1%

0.01U_0402_25V7Z

+2.5V_LAN

+3V

+2.5V_LAN

C442

0.1U_0402_16V4Z

1

2

1

2

0.1U_0402_16V4Z

U25

1

CS

VCC

2

SK

3

DI

4

DO

GND

AT93C46-10 SI-2.7_SO8

12

R422

C424

1

C443

2

0.1U_0402_16V4Z

8
7

NC

6

NC

5

12

R423

49.9_0402_1%

49.9_0402_1%

1

2

C444

+3V

1

C422

0.1U_0402_16V4Z

2

12

R425

0.01U_0402_25V7Z

3 1

+3V

ACTIVITY#

3 1

+3V

LINK10_100#

0.1U_0402_16V4Z

1

C445

2

2

LAN_RD+
LAN_RD-

LAN_TD+
LAN_TD-

12

R426

49.9_0402_1%

1

C425

2

E

C

47K

B

10K

2

E

C

47K

B

10K

Q20
DTA114YKA_SOT23

2

1

C446

2

0.1U_0402_16V4Z

1

C426

0.1U_0402_16V7K

2

Q19
DTA114YKA_SOT23

1 2

R432
300_0402_5%

RJ45_RX-

RJ45_RX+

RJ45_TX-

RJ45_TX+

1 2

R433
300_0402_5%

RJ45_GND

20mil

1

C447

0.1U_0402_16V4Z

2

U26

1

RD+

2

RD-

3

CT

6

CT

7

TD+
TD-8TX-

NS0013_16P

10mil

10mil

12

R434

75_0402_1%

1

LAN RTL8100C(L)

12

12

Amber LED+

Amber LED-

PR4-

PR4+

PR2-

PR3-

PR3+

PR2+

PR1-

PR1+

Green LED-

Green LED+

RJ45_RX+
RJ45_RX-

RJ45_TX+
RJ45_TX-

R430
75_0402_1%

RJ45_GND

SHLD4

SHLD3

SHLD2

SHLD1

1

2

0.1U_0402_16V4Z

1

C438

2

16

15

14

13

TYCO_1566735-1

LANGND

C439

4.7U_0805_10V4Z

16

RX+

15

RX-

14

CT

11

CT

10

TX+

9

R429

75_0402_1%

JP10

12

11

8

7

6

5

4

3

2

1

10

9

12

R435
75_0402_1%

1 2

C434
1000P_1206_2KV7K

Termination plane should be closed
to chassis ground and also depends
on safety concern

A A

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET N OR THE INFORMATION I T CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

LAN REALTEK RTL8100CL

Size Document Number Re v

LA-2301

Date: Sheet

1

of

26 48Wednesday, May 26, 2004

1.0

A

B

C

D

E

+3VS

+1394_PLLVDD

+3VS

1K_0402_5%

TPBIAS0
TPA0+
TPA0­TPB0+
TPB0-

+3VS

1

C448

0.1U_0402_16V4Z

2

0.01U_0402_25V4Z

C463 18P_0402_50V8J

X5

24.576MHz_16P_3XG-24576-43E1

1 2

C464 18P_0402_50V8J

1

C461

2

1 2

1 2

1

2

1

2

12

12

1

2

C449

0.1U_0402_16V4Z

L19

1 2

C462

4.7U_0805_10V4Z

R446

56.2_0603_1%

R448

56.2_0603_1%

C467

220P_0402_50V7K

0_0805_5%

1

C450

0.1U_0402_16V4Z

2

+3VS

1

C456

@1000P_0402_50V7K

2

+3VS

12

R447

56.2_0603_1%

12

R449

56.2_0603_1%

12

R451

5.11K_0603_1%

1

C451

0.1U_0402_16V4Z

2

1

C457

@1000P_0402_50V7K

2

1

C466

0.33U_0603_16V4Z

2

1

C452

0.1U_0402_16V4Z

2

1

C458

@1000P_0402_50V7K

2

JP11

4
3
2
1

AMP_440168-2

1

C453

0.1U_0402_16V4Z

2

1

C459

@1000P_0402_50V7K

2

1

C454

0.1U_0402_16V4Z

2

1

C460

@1000P_0402_50V7K

2

1

C455

0.1U_0402_16V4Z

2

+3VS

1 2

4.7K_0402_5%

R438

1 2

10K_0402_5%

+3VS

1 1

PCI_PAR19,24,26,28

RP118

PCI_AD[0..31]

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8

PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0

CLK_PCI_1394

PCI_GNT#0
PCI_REQ#0
1394_IDSEL

PCI_FRAME#

PCI_IRDY#
PCI_TRDY#

PCI_DEVSEL#

PCI_STOP#
PCI_PERR#
PCI_PIRQA#
1394_PME#
PCI_SERR#
PCI_PAR

PCIRST#

SCL_1394
SDA_1394

U27

84

PCI_AD0

82

PCI_AD1

81

PCI_AD2

80

PCI_AD3

79

PCI_AD4

77

PCI_AD5

76

PCI_AD6

74

PCI_AD7

71

PCI_AD8

70

PCI_AD9

69

PCI_AD10

67

PCI_AD11

66

PCI_AD12

65

PCI_AD13

63

PCI_AD14

61

PCI_AD15

46

PCI_AD16

45

PCI_AD17

43

PCI_AD18

42

PCI_AD19

41

PCI_AD20

40

PCI_AD21

38

PCI_AD22

37

PCI_AD23

32

PCI_AD24

31

PCI_AD25

29

PCI_AD26

28

PCI_AD27

26

PCI_AD28

25

PCI_AD29

24

PCI_AD30

22

PCI_AD31

34

PCI_C/BE3

47

PCI_C/BE2

60

PCI_C/BE1

73

PCI_C/BE0

16

PCI_CLK

18

PCI_GNT

19

PCI_REQ

36

PCI_IDSEL

49

PCI_FRAME

50

PCI_IRDY

52

PCI_TRDY

53

PCI_DEVSEL

54

PCI_STOP

56

PCI_PERR

13

PCI_INTA/CINT

21

PCI_PME/CSTSCHG

57

PCI_SERR

58

PCI_PAR

12

PCI_CLKRUN

85

PCI_RST

14

G_RST

89

GPIO3

90

GPIO2

VDDP20VDDP35VDDP48VDDP62VDDP

TSB43AB21A
/(TSB43AB22)

PCI BUS INTERFACE

PLLGND18REG_EN9AGND

AGND

AGND

AGND

AGND

AGND

109

110

111

117

126

127

128

AGND

PCI_AD[0..31]19,22,24,26,28

2 2

IDSEL:PCI_AD16

PCI_AD16

1 2

R445

3 3

1394_IDSEL

100_0402_5%

PCI_C/BE#319,24,26,28
PCI_C/BE#219,24,26,28
PCI_C/BE#119,24,26,28
PCI_C/BE#019,24,26,28

CLK_PCI_139419

PCI_GNT#019
PCI_REQ#019

PCI_FRAME#19,24,26,28

PCI_IRDY#19,24,26,28

PCI_TRDY#19,24,26,28

PCI_DEVSEL#19,24,26,28

PCI_STOP#19,24,26,28

PCI_PERR#19,24,26,28

PCI_PIRQA#8,19,24

1394_PME#24,26,28,33

PCI_SERR#19,24,26,28

PM_CLKRUN#19,26,28,32,33

PCIRST#19,20,24,26,28

1 8
2 7
3 6
4 5

220_1206_8P4R_5%

87

78

CYCLEIN

BIAS CURRENT

OSCILLATOR

FILTER

EEPROM 2 WIRE BUS

POWER CLASS

PHY PORT 1

DGND17DGND23REG1830DGND33DGND44DGND55DGND64DGND68DGND75DGND83REG1893DGND

R439

1 2

R440

1 2

R441

R442 4.7K _0402_5%

86

11

96

DVDD

CNA

DVDD

TEST1710TEST16

DVDD
DVDD
DVDD
DVDD
DVDD
DVDD

CYCLEOUT/CARDBUS

PLLVDD

AVDD
AVDD
AVDD
AVDD
AVDD

NC/(TPBIAS1)

NC/(TPA1+)

NC/(TPA1-)

NC/(TPB1+)

NC/(TPB1-)

FILTER0

FILTER1

TPBIAS0

TPA0+

TPA0-

TPB0 +

TPB0 -

TEST9
TEST8

TEST3
TEST2
TEST1
TEST0

TSB43AB21A_PQFP128

103

CPS

SDA

SCL

PC0
PC1
PC2

R0

R1

X0

X1

4.7K_0402_5%

4.7K_0402_5%

12

15
27
39
51
59
72
88
100
7
1
2
107
108
120

1 2

106

R443

125
124
123
122
121

1 2

118

R444

6.34K_0603_1%

119

6

5

C465

3

0.1U_0402_16V4Z

4

92

91

99
98
97

116
115
114
113
112

94
95

101
102
104
105

1 2

SDA_1394

SCL_1394

1

C468

CLK_PCI_1394

4 4

A

12

R452
10_0402_5%

1

C470

15P_0402_50V8J

2

B

0.1U_0402_16V4Z

2

1

C469

2

0.1U_0402_16V4Z

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET N OR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Compal Electronics, Inc.

Title

TI 1394 Controller TSB43AB21A

Size Document Number Re v

Custom

LA-2301

D

Date: Sheet

27 48Tuesday, May 18, 2004

E

1.0

of

+3V_MINIPCI

+3V

0.1U_0402_16V4Z

1 2

12

1

2

WL_OFF#33

KILL_SW#33,35

SN74LVC08APW_TSSOP14

L20

0_0603_5%

2

C472

1

CLK_PCI_MINI

R454
10_0402_5%

C478
15P_0402_50V8J

+3V

14

12

P

A

13

B

G

7

W=40mils

CLK_PCI_MINI19

2

C473

0.1U_0402_16V4Z

1

PM_CLKRUN#19,26,27,32,33

+5VS_MINIPCI

+5VS_MINIPCI

U19D

O

INTB#

PCI_REQ#319

PCI_C/BE#319,24,26,27

PCI_C/BE#219,24,26,27

PCI_IRDY#19,24,26,27

PCI_SERR#19,24,26,27

PCI_C/BE#119,24,26,27

11

PCI_PIRQD#19,26

LAN RESERVED

RB751V_SOD323

PCI_PIRQD#

CLK_PCI_MINI

PCI_AD31
PCI_AD29

PCI_AD27
PCI_AD25

PCI_AD21
PCI_AD19

PCI_AD17

PCI_AD12
PCI_AD10

PCI_AD8
PCI_AD7

PCI_AD5

PCI_AD3

PCI_AD1

1 2

L22 0_0603_5%

MINI_PCI SOCKET

TIP RING

D22

21

W=30mils

W=30mils W=20mils

JP12

112

KEY KEY

334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
535354
555556
575758
595960
616162
636364
656566
676768
696970
717172
737374
757576
777778
797980
818182
838384
858586
878788
898990
919192
939394
959596
979798
9999100

101

101

102

103

103

104

105

105

106

107

107

108

109

109

110

111

111

112

113

113

114

115

115

116

117

117

118

119

119

120

121

121

122

123

123

124

QTC_C102A-056B11-01

2

4
6
8

LAN RESERVED

10
12
14
16
18
20
22

W=40mils

24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

W=30mils

PCI_PIRQC#

PCI_AD30

PCI_AD28
PCI_AD26
PCI_AD24

MINI_IDSELPCI_AD23

PCI_AD22
PCI_AD20

PCI_AD18
PCI_AD16

PCI_AD15PCI_AD14
PCI_AD13
PCI_AD11

PCI_AD9

PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

2

C479

0.1U_0402_16V4Z

1

+3V+5VS

+3V

1 2

R453

PCI_AD[0..31]

+5VS_MINIPCI
PCI_PIRQC# 19

PCIRST# 19,20,24,26,27

PCI_GNT#3 19

WLANPME# 24,26,27, 33

PCI_AD18

100_0402_5%

PCI_PAR 19,24,26,27

PCI_FRAME# 19,24,26,27
PCI_TRDY# 19,24,26,27
PCI_STOP# 19,24,26, 27

PCI_DEVSEL# 19,24,26,27PCI_PERR#19,24,26,27

PCI_C/BE#0 19,24,26,27

IDSEL:PCI_AD18

PCI_AD[0.. 31] 19,22,24,26,27

INTA#

W=40mils

0.1U_0402_16V4Z

C474

2

1

+3V_MINIPCI

2

C475

0.1U_0402_16V4Z

1

L21

1 2

0_0603_5%

+3V_MINIPCI

+3V

1

C476

0.1U_0402_16V4Z

2

1

C477
10U_0805_10V4Z

2

+5VS_MINIPCI

1

C480
1000P_0402_50V7K

2

1

C481

0.1U_0402_16V4Z

2

1

C482

0.1U_0402_16V4Z

2

1

C483
10U_0805_10V4Z

2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Ltd.

Title

Mini PCI Slot

Size Document Number Rev

Custom

LA-2301

Date: Sheet

of

28 48Tuesday, May 1 8, 2004

1.0

5

U55

1

GND

+5V

D D

C490

@150U_D2_6.3VM

C C

@150U_D2_6.3VM

C494

+5V

1

1

+

2

1

+

2

C491

0.1U_0402_16V4Z

2

+5V

1

C495

0.1U_0402_16V4Z

2

2

IN

3

IN

4

EN#

G528_SO8

U29

1

GND

2

IN

3

EN1#

4

EN2#

@TPS2042ADR_SO8

U30

1

GND

2

IN

3

IN

4

EN#

G528_SO8

OC1#
OUT1
OUT2

OC2#

OUT
OUT
OUT
OUT

OUT
OUT
OUT
OUT

8
7
6
5

8
7
6
5

8
7
6
5

+USB_VCCA

4

+USB_VCCB

+USB_VCCB

1 2

R727 @0_0402_5%

1 2

R728 @0_0402_5%

1 2

R729 @0_0402_5%

3

+3V +USB_VCCA

12

R455
100K_0402_5%

+3V

12

R459
100K_0402_5%

12

100K_0402_5%
R456

1 2

R457 47K_0402_5%

1 2

R458 47K_0402_5%

0.1U_0402_16V4Z

1 2

R460 47K_0402_5%

C496

0.1U_0402_16V4Z

1

2

1

C493

0.1U_0402_16V4Z

2

OVCUR#1 20

C492

1

2

1

+

C484
100U_D2_10VM

2

OVCUR#0 20

OVCUR#2 20

USB20P0-20

USB20P0+20

EMI Request

close connector

2.2P_0402_50V8C

1

C487
@470P_0402_50V7K

2

+USB_VCCB

1

C828

2

2

+USB_VCCB

+

1

C829

2.2P_0402_50V8C

2

40mil40mil 40mil

1

C485
100U_D2_10VM

2

1
2
3
4

10

1

C488
@470P_0402_50V7K

2

JP13

5

VCC

VCC

6

D0-

D1-

7

D0+

D1+

8

VSS

VSS

12

G19G4

13

G5

G2

14

G311G6

FOX_UB91123-ST2-FR

2.2P_0402_50V8C

+USB_VCCB

+USB_VCCB

C830

1

+

C486
100U_D2_10VM

2

1

2

1

1

C831

2.2P_0402_50V8C

2

1

C489
@470P_0402_50V7K

2

USB20P2- 20
USB20P2+ 20

+USB_VCCA

C832

1

2

USB1­USB1+

1

C833

@2.2P_0402_16VCJ

2

2

USB20P1-20

USB20P1+20

@2.2P_0402_16VCJ

B B

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET N OR THE INFORMATION I T CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

USB
CONNECTOR

JP14

1

VCC

2

D0-

3

D0+

4

VSS

5

G1

6

G2

SANTA_360111-4

Title

Size Document Number Re v

B

Date: Sheet

Compal Electronics, Inc.

USB/PCI-Debug

LA-2301

29 48Tuesday, May 18, 2004

1

1.0

of

5

AC97 Codec

D D

+5VAMP

+VDDA

bypass EQ when NBA_PLUG = High

NBA_PLUG31

12

12

R467

CD_GNA

12

R475

6.8K_0402_5%

12

R483
@10K_0402_5%

CD_L

CD_R

12

12

R468

6.8K_0402_5%

IAC_RST#20

IAC_SYNC20,22

IAC_SDATAO20,22

EC_SMD25,33

12

R485
@0_0402_5%

Ra

1 2

0_0402_5%

1

2

INT_CD_L

R465 20K_0402_5%

INT_CD_R

R466 20K_0402_5%

20K_0402_5%
R474
0_0402_5%

1 2

R480

C529

6.8K_0402_5%

12

R473

1

2

@0.01U_0402_25V4Z

INT_CD_L23,31

INT_CD_R23,31

CD_AGND23

C C

MD_SPK C_MD_SPK

C528

0.1U_0402_16V4Z

4

L23

1 2

CHB2012U170_0805

L26

1 2

@CHB2012U121_0805

0.1U_0402_16V4Z

1 2

C509 1U_0402_6.3V4Z

CD_L

CD_R

MIC

MIC31

C_MD_SPK

MONO_IN

1

C500

2

NBA_PLUG

1 2

C510 0.1U_0402_16V4Z

1 2

C511 0.1U_0402_16V4Z

CD_LIN

12

C512 1U_0402_6.3V4Z

CD_RIN

12

C513 1U_0402_6.3V4Z

CD_GNA1CD_GNA

12

C514 1U_0402_6.3V4Z

C_MIC

12

C515 1U_0402_6.3V4Z

12

C516 1U_0402_6.3V4Z

1 2

R477 22_0402_5%

12

R478 22_0402_5%

12

R479 22_0402_5%

12

R481 @0_0402_5%

EAPD31,33

DGND

1

C501
10U_0805_10V4Z

2

+AVDD_AC97

U32

14

AUX_L

15

AUX_R

16

JD2

17

JD1

23

LINE_IN_L

24

LINE_IN_R

18

CD_L

20

CD_R

19

CD_GND

21

MIC1

22

MIC2

13

PHONE

12

PC_BEEP

11

RESET#

10

SYNC

5

SDATA_OUT

45

SDA

46

XTLSEL

47

SPDIFI/EAPD

48

SPDIFO

4

DVSS1

7

DVSS2

ALC250-C_LQFP48

38

AVDD125AVDD2

LINE_OUT_L

LINE_OUT_R

MONO_OUT/VREFOUT3

1 2

L27 @0_0805_5%

1 2

L28 @0_0805_5%

1 2

L29 0_0805_5%

1 2

L30 @0_0805_5%

DVDD11DVDD2

HP_OUT_L

HP_OUT_R

BIT_CLK

SDATA_IN

XTL_IN

XTL_OUT

AFILT1

AFILT2

VREFOUT

VREF

DCVOL

VREFOUT2

VAUX

DISABLE#

SCK

AVSS1
AVSS2

3

1 2

L24 @CHB2012U121_0805

1 2

L25 CHB2012U170_0805

+AC97_DVDD

1

C502

0.1U_0402_16V4Z

2

9

LINEL

35

36

37

39

41

6

8

2

3

29

30

28

27

32

31

NC

33
34
43
44

40

NC

26
42

C507 1U_0402_6.3V4Z

LINER

C508 1U_0402_6.3V4Z

1

2

XTL_IN

XTL_OUT

C517 1000P_0402_50V7K

C520 1000P_0402_50V7K

1 2

R476 0_0603_5%

1 2

R482 0_0603_5%

AGND

AGND

+3V

+3VS

@4.7U_0805_10V4Z

1

C503
10U_0805_10V4Z

2

1 2

C505 @1000P_0402_25V8K

1 2

C506 @1000P_0402_25V8K

1 2

1 2

C774
27P_0402_50V8J

1 2

R469 22_0402_5%

1 2

R470 22_0402_5%

R472
@1M_0402_5%

1 2

1 2

1 2

+AUD_VREF

+AVDD_AC97

R853

1 2

10K_0402_5%

1 2

R486 @0_0402_5%

1 2

R487 @0_0402_5%

C497

SUSP#31,33,34,37

L_OUT_L

L_OUT_R

+5VALW

@0.1U_0402_16V4Z

1

1

C498

2

2

SUSP#

1 2

R463 @0_0402_5%

1 2

R464 @0_0402_5%

L_OUT_L 31

L_OUT_R 31

IAC_BITCLK 20

IAC_SDATAI0 20

C527

+3VS

EC_IDERST 23,31,33

EC_SMC2 5,33

1

2

12

R484
@0_0402_5%

2

4

2

8

1

C521

2

1U_0402_6.3V4Z

Adjustable Output

U31

VIN

DELAY

ERROR7CNOISE

SD

@SI9182DH-AD_MSOP8

AMP_LEFT 31

AMP_RIGHT 31

0.01U_0402_25V4Z

SENSE or ADJ

+3VS

R734
@10K_0402_5%

1 2

1 2

R471 @0_0402_5%

R735
@10K_0402_5%

1 2

1

C522

2

1U_0402_6.3V4Z

VOUT

22P_0402_50V8J

C523

GND

5

6

1

3

1

2

C518

C524

0.1U_0402_16V4Z

1

C504
@0.1U_0402_16V4Z

2

XTL_IN

1

24.576MHz_16P_3XG-24576-43E1

2

1

2

0.1U_0402_16V4Z

1U_0402_6.3V4Z

1

+VDDA

12

R461
@69.8K_0603_1%

12

R462
@24K_0402_1%

X6

XTL_OUT

12

CLK_AUDIO_14M 17

+AUD_VREF

1

C525

2

+VDDA

1

C499
@4.7U_0805_10V4Z

2

1

C519
22P_0402_50V8J

2

1

C526

4.7U_0805_10V4Z

2

System Sound

B B

BEEP#33

I5O

SN74LVC125APWLE_TSSOP14

PCM_SPK#24

A A

SB_SPK20

4

5

U33B

OE#

+3V

12

R490
100K_0402_5%

R491

6

1 2

8.2K_0402_5%

0.22U_0402_10V4Z

13

+3VALW

14

U18E

P

11

O10I

G

1

SN74LVC14APWLE_TSSOP14

7

C536

+3VALW

14

P

G

7

+3V POWER

2

+3V POWER

U18F

O12I

SN74LVC14APWLE_TSSOP14

C530

1 2

0.1U_0402_16V4Z

C538

1 2

1U_0402_6.3V4Z

C539

1 2

1U_0402_6.3V4Z

C533

1 2

1U_0402_6.3V4Z

560_0402_5%

560_0402_5%

R492

1 2

560_0402_5%

R499

1 2

R501

1 2

10K_0402_5%

4

MONO_IN_I

12

R502

+AVDD_AC97

C

2

B

E

D23
RB751V_SOD323

2 1

12

R489
10K_0402_5%

12

R493
10K_0402_5%

MONO_IN_O

1

Q21
2SC2411K_SC59

3

C535

C531

12

R4880_0805_5%

2

+3V_MDC

1

2

1

+3VS_MDC

+3V

1

C534
10U_0805_10V4Z

2

1U_0402_6.3V4Z

R498

2.4K_0402_5%

1 2

+3VS

C537

MONO_IN

12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

10U_0805_10V4Z

1 2

L32

CHB1608B121_0603

10U_0805_10V4Z

IAC_SDATAO
IAC_RST#

MDC Connector

JP15

1

MONO_OUT/PC_BEEP

3

GND

5

AUXA_RIGHT

7

AUXA_LEFT

9

CD_GND

11

CD_RIGHT

13

CD_LEFT

15

GND

17

+3.3Vaux/BT_VCC

19

GND

21

+3.3Vmain

23

AC97_SDATA_OUT

25

AC97_RESET#

27

GND

29

AC97_MSTRCLK

ACES_88018-3010

AUDIO_PWRDN/DETECH

RESERVED/PRIMARY_DN

RESERVED/+5VD/WAKEUP

2

MONO_PHONE

RESERVED/BT_ON#

GND

+5Vmain

RESERVED/USB+

RESERVED/USB-

RESERVED/GND

AC97_SYNC
AC97_SDATA_IN1
AC97_SDATA_IN0

GND

AC97_BITCLK

MD_SPK

+5VS_MDC

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

Title

Size Document Number Rev

Date: Sheet

2

1

+3VS_MDC_R

IAC_SYNC

R495 0_0402_5%

1 2

R497

22_0402_5%

Compal Electronics, Ltd.

AC97 Codec ALC250

Custom

LA-2301

L31

1 2

CHB1608B121_0603

C532 1U_06 03_10V4Z

R494

1 2

10K_0402_5%

12

IAC_BITCLK

R496

1 2

22_0402_5%

12

R500
10K_0402_5%

1

+5VS

+3VS

IAC_SDATAI1 20

of

30 48Wednesday, May 26, 2004

1.0

A

Direct CD
CTL

L_OUT_L30

4 4

3 3

PATH_SEL_1

Q23

2N7002_SOT23

+5VALW

D

S

R510
10K_0402_5%

1 2

13

G

2

PATH_SEL

+5VAMP

L_OUT_R30

@0_0402_5%

0_0402_5%

+5VAMP

INT_CD_L23,30

+5VAMP

INT_CD_R23,30

+5VAMP

R717

R718

R503

1M_0402_5%

R507

1M_0402_5%

12

12

R512

1M_0402_5%

C552

1 2

1U_0603_10V4Z

R514

1M_0402_5%

C555

1 2

1U_0603_10V4Z

12

12

R504
1M_0402_5%

12

12

R509
1M_0402_5%

PATH_SEL

EC_IDERST 23,30,33

SUSP# 30,33,34,37

12

12

R513
1M_0402_5%

12

12

R515
1M_0402_5%

PATH_SEL_1

Regulator for AMP

+5VALW TO +5VLDO

+5VALW

R521 10K_0402_5%

1 2

2 2

+12VALW+5VALW

12

R524

10K_0402_5%

CD_PLAY

CD_PLAY23,33

1 1

2

G

Q28

2N7002_SOT23

A

12

R525

1K_0402_5%

13

D

Q27

2

G

2N7002_SOT23

S

13

D

S

1

C557
1U_0603_10V4Z

2

1

2

@1U_0805_25V4Z

D24

SI4800DY_SO8

C563

LM431SC_SOT23

1

A

2

U36

2

K

3

R

+5VALW

Q26

AOS 3401_SOT23

1 3

5

4

B

POWER ON PATH

14

U34A

P

AMP_LEFT

2

A1B

G7C

SN74HCT4066PW_TSSOP14

13

14

U34B

P

AMP_RIGHT

10

A11B

G7C

SN74HCT4066PW_TSSOP14

12

DIRECT PLAY PATH

14

U34C

P

AMP_LEFT

3

A4B

G7C

SN74HCT4066PW_TSSOP14

5

14

U34D

P

AMP_RIGHT

9

A8B

G7C

SN74HCT4066PW_TSSOP14

6

D8D7D6D

S1S2S3G

(4.5V)

+5VLDO

12

R526

3.9K_0603_1%

12

R527

4.99K_0603_1%

B

Audio AMP

AMP_LEFT30

AMP_RIGHT30

+5VALW DECOUPLING

+5VALW

1

C558

2

@22U_1206_10V4Z

22U_1206_10V4Z

+5VAMP DECOUPLING

+5VLDO

1

1

C564

22U_1206_10V4Z

2

2

4.7U_0805_10V4Z

1

1

2

C559

C560

2

1U_0603_10V4Z

(4.5V)

1

C565

C566

2

@4.7U_0805_10V4Z

+5VALW TO +5VLDO

+5VLDO +5VAMP

INTSPK_L1
INTSPK_L2

ACES_85204-0200

INTSPK_R1
INTSPK_R2

ACES_85204-0200

1

C561

2

1U_0603_10V4Z

1

C567

2

@1U_0603_10V4Z

1U_0603_10V4Z

L36

1 2

CHB2012U121_0805

L37

1 2

CHB2012U121_0805

C

W/O EQ R385=R386= 1.3K Ohm
C537=C539= 0.47U

AMP_L

12

R5061.5K_0402_5%

AMP_R

12

R5081.5K_0402_5%

VOL_AMP

C542

12

0.1U_0402_16V4Z

INTSPK_L1
INTSPK_R1
AMP_LEFT

AMP_RIGHT

JP25

1
2

JP26

1
2

1

1

C569

C568

2

2

0.1U_0402_10V6K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHO RIZED BY COMP AL ELECTRONIC S, INC. NEITH ER THIS SHEET NO R THE INFORM ATION IT CONT AINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

R = R385, R386
C = C537, C539

fo=1/(2*3.14*R*C)=260Hz
R=1.5K / C=0.47U

Pin 22

NBA_PLUG30

1 2

C544 0.47U_0603_16V4Z

1 2

C546 0.47U_0603_16V4Z

+5VAMP

1

C570

2

@0.1U_0402_10V6K

INTSPK_R1

@

HIGH

PIN 10,4 ACTIVE

LOW PIN 9,5 ACTIVE

AMP_L

C545 0.47U_0603_16V4Z

AMP_R

C547 0.47U_0603_16V4Z

1 2

C551 0.47U_0603_16V4Z

1 2

C553 0.47U_0603_16V4Z

Reserve for noise.

R518

100K_0402_5%

NBA_PLUG

2

G

Q25

2N7002_SOT23

+AUD_VREF

MIC30

+

1 2

C571

1 2

C572

+

INTSPK_L1

NBA_PLUG
VOL_AMP

1 2

1 2

@0.1U_0402_16V4Z

VOL_AMP

1 2

13

D

2

G

S

13

D

S

MIC MIC-1

1 2

L33 FBM-11-160808-700T_0603

100U_D2_10VM

100U_D2_10VM

D

0.1U_0402_16V4Z

AMP_LIN
AMP_RIN

HP_L

HP_R

1

2

2

C556

1

2

R519

12

7.15K_0603_1%

Q24
2N7002_SOT23

1 2

R522 2.2K_0402_5%

1 2

R523 @2.2K_0402_5%

220P_0402_50V8K

0.1U_0402_16V4Z

C820

12

NBA_PLUG

L34

1 2

FBM-11-160808-700T_0603

L35

1 2

FBM-11-160808-700T_0603

330P_0402_50V7K

D

+5VAMP

W=40Mil

1

C540

2

U35

7

PVDD

SHUTDOWN#

18

PVDD

19

VDD

2

HP/LINE#

3

VOLUME

4

LOUT+

21

ROUT+

5

LLINEIN

23

RLINEIN

6

LHPIN

20

RHPIN

17

CLK

TPA0232PWP_TSSOP24

C554

0.047U_0402_16V4Z

1 2

R516 3.9K_0603_1%

3

6

VR1

5

1/20W_10KA_XV0107GPV2N-9508

1

4

R520

3.09K_0603_1%

1 2

+AUD_VREF_J

1

C562

2

+5VAMP

R830

47K_0402_5%

12

1

C573

2

E

1

C541

4.7U_0805_10V4Z

2

SE/BTL#

PC-BEEP

BYPASS

LOUT­ROUT-

LIN

RIN

GND
GND
GND
GND

SHUTDOWN#

13

D

Q22

2N7002_SOT23

S

22

NBA_PLUG

15
14
11
9
16
10
8

1
12
13
24

(0.47U~1U)

1 2

C543 0.1U_0402_16V4Z

INTSPK_L2
INTSPK_R2

2

C548

1

0.47U_0603_16V4Z

+5VAMP

1

C549

2

12

R505 100K_0402_5%

2

G

1

C550

2

0.47U_0603_16V4Z

VR - A-Type

R516

R519

R520

3.9K

7.15K

3.09K

Bias

(Gain)

SPK

10 dB

HP

-6dB

MICROPHONE

IN JACK

JP16

5

4

3
6
2
1

FOX_JA6033L-5S1-TR

HEADPHONE

R511
100K_0402_5%

1 2

1

C574
330P_0402_50V7K

2

Title

Size Document Number Rev

Custom

Date: Sheet

OUT JACK

JP17

5

4

3
6
2
1

FOX_JA6033L-5S1-TR

Compal Electronics, Ltd.

Audio AMP & JACK

LA-2301

E

EAPD 30,33

0.47U_0603_16V4Z

31 48Tuesday, May 1 8, 2004

+5VAMP

1.0

of

A

SUPER I/O SMsC LPC47N217

1 1

+3VS

R537

@10K_0402_5%

1 2
1

2 2

C579

@15P_0402_50V8J

2

1 2

R530 10K_0402_5%

1 2

R531 10K_0402_5%

1 2

R533 10K_0402_5%

LPC_AD[0..3]19,33

CLK_PCI_SIOCLK_SIO_14M

R538

10_0402_5%

1 2
1

C580

15P_0402_50V8J

2

Add for EMI

L50

+5VS

1

2

0.1U_0402_10V6K

C812

1 2

KC FBM-L11-201209-221LMAT_0805

1

C813

2

1000P_0402_50V7K

SIO_PD#
SIO_SMI#
SIO_PME#

LPC_AD[0..3]

+5VS_BEAD

B

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

+3VS

+3VS

LPC_FRAME#19,33

LPC_DRQ#119

NB_RST#7,19,23,33

PM_CLKRUN#19,26,27,28,33

CLK_PCI_SIO19

SERIRQ19,24,33

CLK_SIO_14M17

R535 @100K_0402_5%

R816 @100K_0402_5%

+3VS

12

FIR_DET#

LPT_DET#

12

1

C575

4.7U_0805_10V4Z

2

LPC_FRAME#
LPC_DRQ#1

SIO_PD#

PM_CLKRUN#
CLK_PCI_SIO
SERIRQ
SIO_PME#

CLK_SIO_14M

SIO_GPIO11
SIO_SMI#
SIO_IRQ

1

C576

0.1U_0402_16V4Z

2

U37

10

LAD0

12

LAD1

13

LAD2

14

LAD3

15

LFRAME#

16

LDRQ#

17

PCI_RESET#

18

LPCPD#

19

CLKRUN#

20

PCI_CLK

21

SER_IRQ

6

IO_PME#

9

CLK14

CLOCK

23

GPIO40

24

GPIO41

25

GPIO42

27

GPIO43

28

GPIO44

29

GPIO45

30

GPIO46

31

GPIO47

32

GPIO10

33

GPIO11/SYSOPT

34

GPIO12/IO_SMI#

35

GPIO13/IRQIN1

36

GPIO14/IRQIN2

40

GPIO23

8

VSS

22

VSS

43

VSS

52

VSS

LPC47N217_STQFP64

1

C577

0.1U_0402_16V4Z

2

C

GPIO

POWER

SERIAL I/F

FIR

LPC I/F

IRMODE/IRRX3

PARALLEL I/F

RXD1

TXD1
DSR1#
RTS1#
CTS1#
DTR1#

RI1#

DCD1#

IRRX2

IRTX2

INIT#

SLCTIN#

PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7

SLCT

PE
BUSY
ACK#

ERROR#

ALF#

STROBE#

VTR
VCC
VCC
VCC
VCC

1

C578

0.1U_0402_16V4Z

2

D

+3VS

DCD#1

SIO_IRQ

RXD1

IRRX

RI#1
CTS#1
DSR#1

RXD1

62

TXD1

63

DSR#1

64

RTS#1

1

CTS#1

2

DTR#1

3

RI#1

4

DCD#1

5

IRRX

37

IRTXOUT

38

IRMODE

39

INIT#

41

SLCTIN#

42

LPD0

44

LPD1

46

LPD2

47

LPD3

48

LPD4

49

LPD5

50

LPD6

51

LPD7

53

LPTSLCT

55

LPTPE

56

LPTBUSY

57

LPTACK#

58

LPTERR#

59

LPTAFD#

60

LPTSTB#

61

RP99

1 8
2 7
3 6
4 5

4.7K_1206_8P4R_5%

12

10K_0402_5%

R528

1 2

R532 1K_0402_5%

1 2

R534 10K_0402_5%

E

Serial Port

7
11
26
45
54

+3VS

SIO_GPIO11

+3VS

1 2

1 2

R536
@10K_0402_5%

R539
1K_0402_5%

Base I/O Address

0 = 02Eh

*

1 = 04Eh

for Debug

+5VS

RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1

JP18

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

@E&T_96212-1011S

Parallel Port

FD0
FD1
FD2
FD3

FD4
FD5
FD6
FD7

+5V_PRN

A

3 3

LPT_DET#

1 2

R817 0_0402_5%

CP1

2
3
4 5

220P_1206_8P4C_50V8K

2
3
4 5

220P_1206_8P4C_50V8K

CP3

8 1
7

4 4

6

220P_1206_8P4C_50V8K

CP4

4 5
3
2

220P_1206_8P4C_50V8K

CP2

81
7
6

81
7
6

2
3
45

6
7
81

LPTSLCTIN#
LPTINIT#
LPTERR#

AFD#/3M#

LPTACK#

LPTBUSY
LPTPE
LPTSLCT

RP108

LPTSLCT

1 8

LPTPE

2 7

LPTBUSY

3 6

LPTACK#

4 5

2.7K_1206_8P4R_5%
RP109

AFD#/3M#

1 8

LPTERR#

2 7

LPTINIT#

3 6

LPTSLCTIN#

4 5

2.7K_1206_8P4R_5%

RP110

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

LPD0
LPD1
LPD2 FD2
LPD3 FD3

LPD7
LPD6
LPD5
LPD4 FD4

FD0
FD1
FD2
FD3

2.7K_1206_8P4R_5%

RP111

FD7
FD6
FD5
FD4

2.7K_1206_8P4R_5%

RP102

1 8
2 7
3 6
4 5

68_1206_8P4R_5%

RP103

4 5
3 6
2 7
1 8

68_1206_8P4R_5%

FD0
FD1

FD7
FD6
FD5

LPTSTB#

AFD#/3M#

LPTAFD#
FD0
LPTERR#
FD1
INIT#
FD2
SLCTIN#
FD3

FD4

FD5

FD6

FD7

LPTACK#

LPTBUSY

LPTPE

LPTSLCT

B

+5VS_BEAD

R544 33_0402_5%

R546

R548

1 2

47_0402_5%

1 2

1 2

1 2

D25

2 1

RB420D_SOT23

R542

LPTINIT#

33_0402_5%

LPTSLCTIN#

33_0402_5%

+5V_PRN

12

R540

2.2K_0402_5%

JP19

1

14

2

15

3

16

4

17

5

18

6

19

7

20

8

21

9
22
10
23
11
24
12
25
13

TYCO_1470802-1

FIR Module

FIR_DET#

C581

1 2

220P_0402_50V8K

@10U_0805_10V4Z

10U_0805_10V4Z

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

+3VS +IR_ANODE

1

C583

2

1

C584

2

L: R POP; FIR Enable
H: R De-POPFIR Disable

1 2

R541 0_0402_5%

22U_1206_10V4Z

R547
47_1206_5%

1 2

+IR_3VS

(30mil)

1

C585

0.1U_0402_16V4Z

2

D

+3VS

(60mil)

1

C582

2

IRRX IRMODE

SD/MODE: SHUTDOWN MODE, HIGH ACTIVE
MODE: HIGH/LOW SPEED SELECT

R543 @4.7_1206_5%

1 2

1 2

4.7_1206_5%

R545

U38

2

IRED_C

4

RXD

6

VCC

8

GND

TFDU6102-TR3_8P

PCB Footprint : T FDU6101E

IRED_A

TXD

SD/MODE

MODE

Compal Electronics, Ltd.

Title

LPC-Super I/O

Size Document Number Rev

Custom

LA-2301

Date: Sheet

(60mil)

1

IRTXOUT

3
5
7

1.0

of

32 48Tuesday, May 1 8, 2004

E

5

+3VALW

R549 for KB910
R550 for NS591L

SERIRQ19,24,32

LPC_DRQ#019

LPC_FRAME#19,32

12

R553

1

C597

2

+3VALW

For KB910

R565 100K_0402_5%

LID_SW#35

512_SEL

EC_RSMRST#20
SHDD_LED#23

R582

1 2

@20M_0603_5%

4

1

IN

OUT

Y4

NC3NC

2

1

C596

2

+5VALW

+3VALW

EC_PME#

C598

0.1U_0402_16V4Z

5

+EC_AVCC

1

C592

0.1U_0402_16V4Z

2

ECAGND

EC_RST#

NUM_LED#

1 2

R571 4.7K_0402_5%

1 2

R573 4.7K_0402_5%

R574 47K_0402_5%

R575 47K_0402_5%

RP105

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

+3VALW

Remove 20M
Ohm R for
KB910

32.768KHZ_12.5P_1TJS125DJ2A073

+EC_VCC

D D

Place D69
Close to EC Chip

+3VALW

12

C586 0.1U_0402_16V4Z

12

C587 1000P_0402_50V7K

12

C588 1000P_0402_50V7K

12

C590 0.1U_0402_16V4Z

1 2

C593 0.1U_0402_16V4Z

1 2

C594 0.1U_0402_16V4Z

D26

21

@SSM14_SMA

1 2

C773 0.1U_0402_16V4Z

12

R552 47K_0402_5%

0.1U_0402_16V4Z

For KB910

591_NUM_LED#

591_EC_SCI#

591_HDD_LED#

C C

910_NUM_LED#

910_EC_SCI#

910_HDD_LED#

1 2

R555 @0_0402_5%

1 2

R556 @0_0402_5%

1 2

R557 @0_0402_5%

1 2

R558 0_0402_5%

1 2

R559 0_0402_5%

1 2

R561 0_0402_5%

For KB910

+5VS

RP104

PSCLK1

1 8

PSDAT1

2 7

PSCLK2

3 6

PSDAT2

4 5

10K_0804_8P4R_5%

TP_CLK

1 2

R567 4.7K_0402_5%

R568 4.7K_0402_5%

+5VALW

R596 4.7K_0402_5%

B B

R595 4.7K_0402_5%

Ra

A A

Rb

Analog Board ID definition,
Please see page 3.

TP_DATA

1 2

EC_SMC1

12

EC_SMD1

12

12

R569 47K_0402_5%

12

R570 10K_0402_5%

12

R572 10K_0402_5%

1394_PME#24,26,27,28
WLANPME#24,26,27,28
PCM_PME#24,26,27,28
LAN_PME#24,26,27,28

+3VALW

R584
100K_0402_5%

1 2

R589
0_0402_5%

1 2

VR_ON

SYSON

SUSP#

AD_BID0

1

2

+EC_VCC

L38

1 2

CHB1608B121_0603

BATT_TEMP

12

C595 0.1U_0402_16V7K

CLK_LPC_EC19

10_0402_5%

15P_0402_50V8J

EC_SCI# 20

HDD_LED# 35

pin110 reserve for KSO16
pin111 reserve for KSO17

EC_SMC2

EC_SMD2

GATEA20

12

EC_PME#

12

MUL_KEY#

FRD#
SELIO#
FSEL#

C599

10P_0402_50V8K

LPC_AD[0..3]19,32

12

R818@10K_0402_5%

12

R81910K_0402_5%

CRY1 CRY2

1

2

+3VS

LPC_AD[0..3]

GATEA2020
KBRST#20

EC_PLAYBTN#34
EC_STOPBTN#34
EC_REVBTN#34
EC_FRDBTN#34

12

TP_CLK34

TP_DATA34

EC_SMI#20

EC_IDERST23,30,31

WL_OFF#28
EC_SWI#20

SYSON36,37,42
SUSP#30,31,34,37

VR_ON44

PCMRST#23

ENBK#8
BKOFF#18

FSEL#34

4

1 2

R549 0_0402_5%

1 2

R550 @0_0402_5%

0.1U_0402_16V4Z

1 2

R551 @0_0402_5%

910_NUM_LED#

TP_CLK
TP_DATA

591_HDD_LED#

SKU_ID2

SYSON
SUSP#
VR_ON

BKOFF#

FSEL#

R585
0_0402_5%

1 2

1

C600
12P_0402_50V8K

2

EAPD30,31

4

+3VALW

C591

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

EC_RST#

591_EC_SCI#

GATEA20

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11

KSO12

KSO13
KSO14
KSO15

EC_TINT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

PSCLK1
PSDAT1
PSCLK2
PSDAT2

CRY1

CRY2

EC_SMI#

PC87591L-VPCN01 A2_LQFP176

1

2

7
8

9
15
14
13
10
18
19
22
23

31

5

6

71
72
73
74
77
78
79
80

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68

105
106
107
108
109

110
111
114
115
116
117
118
119

158

160

62
63
69
70
75
76

148
149
155
156

3

4
27
28

173
174

47

1 2

R736 0_0805_5%

+EC_VDD

U39

SERIRQ
LDRQ#
LFRAME#
LAD0
LAD1
LAD2
LAD3
LCLK
RESET1#
SMI#
PWUREQ#

IOPD3/ECSCI#

GA20/IOPB5
KBRST/IOPB6

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15

TINT#
TCK
TDO
TDI
TMS

PSCLK1/IOPF0
PSDAT1/IOPF1
PSCLK2/IOPF2
PSDAT2/IOPF3
PSCLK3/IOPF4
PSDAT3/IOPF5
PSCLK4/IOPF6
PSDAT4/IOPF7

32KX1/32KCLKIN

32KX2

IOPJ2/BST0
IOPJ3/BST1
IOPJ4/BST2
IOPJ5/PFS
IOPJ6/PLI
IOPJ7/BRKL_RSTO

IOPM0/D8
IOPM1/D9
IOPM2/D10
IOPM3/D11
IOPM4/D12
IOPM5/D13
IOPM6/D14
IOPM7/D15

SEL0#
SEL1#
CLK

For KB910

R835 @0_0402_5%

+EC_VCC

16

123

136

157

VDD

VCC134VCC245VCC3

VCC4

VCC5

Host interface

Key matrix scan

PORTB

PORTD-1

JTAG debug port

PS2 interface

PORTJ-2

PORTM

GND117GND235GND346GND4

GND5

GND6

GND7

122

159

167

137

ECAGND

L39 CHB160 8B121_0603

12

R5620_0402_5%

12

R5630_0402_5%

12

910_EC_SCI#

12

3

+EC_AVCC

166

VCC6

AD Input

DA output

PWM
or PORTA

PORTC

PORTE

PORTH

96

910_GND0
910_GND1

+RTCVCC

1

C589

81

AD0

82

AD1

83

AD2

84

AD3

87
88
89
90
93
94

99

DA0

100

DA1

101

DA2

102

DA3

32
33
36
37
38
39
40
43

153
154
162
163
164
165

168

IOPC0

169
170
171
172
175
176
1

26
29
30

2
44
24
25

124
125
126
127
128
131
132
133

138
139
140
141
144
145
146
147

150
151

152

41

IOPD4

42

IOPD5

54

IOPD6

55

IOPD7

143
142
135
134
130
129
121
120

113
112
104
103
48

98

910_HDD_LED#

0.1U_0402_16V4Z

2

BATT_TEMPB

BATT_TEMP

VBATTA

ADP_I1

VBATTB

AD_BID0

MUL_KEY#

SKU_ID0
SKU_ID1

INVT_PWM

EC_URXD
EC_UTXD/KSO17

EC_USCLK
EC_SMC1
EC_SMD1
NB_RST#

EC_SMC2
EC_SMD2

EC_PME#
EC_THERM#

ACIN

LPCPD

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7

ADB0
ADB1
ADB2

ADB[0..7]

ADB3
ADB4
ADB5
ADB6
ADB7

FRD#

SELIO#

591_NUM_LED#
CAPS_LED#
PADS_LED#

KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15

KBA16
KBA17
KBA18
KBA19

BATT_LOW_LED# 34
910_WL_LED# 34
910_PWR_LED# 34

910_CHGI_LED# 34
910_ODD_LED# 34

1 2

C601 @1U_0402_6.3V4Z

BATT_TEM P 3 9

BATT_OVP 4 0

ALI/MH# 39

S4_DATA 36

MUL_KEY# 34

DAC_BRIG 18
EN_DFAN2 35
IREF 40
EN_DFAN1 35

INVT_PWM 18
BEEP# 30
PWR_SUSP_LED 34,35
ACOFF 40
PM_BATLOW# 20
EC_ON 35
EC_LID_OUT# 20

S4_LATCH 36

EC_UTXD/KSO17 34

EC_SMC1 34,39
EC_SMD1 34,39
NB_RST# 7, 19,23,32

PBTN_OUT# 20
EC_SMC2 5,30
EC_SMD2 5,30
FAN_SPEED1 35

EC_THERM# 20
FAN_SPEED2 35

CD_PLAY 23,31

ACIN 20, 34,38
KILL_SW# 28,35
PM_SLP_S3# 20

ON/OFF 35
PM_SLP_S5# 20

PM_CLKRUN# 19,26,27,28,32

LPCPD

1 2

R566 1K_0402_5%

ADB[0..7] 34

FRD# 34
FWR# 34

SELIO# 34

PHDD_LED# 23

KBA[0..19]

FSTCHG 40

95

AVCC

IOPB7/RING/PFAIL/RESET2

IOPD2/EXWINT24/RESET2

IOPE7/CLKRUN/EXWINT46

PORTI

PORTJ-1

PORTD-2

PORTK

PORTL

AGND

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

161

VBAT

IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7

DP/AD8

DN/AD9

IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7

IOPB0/URXD
IOPB1/UTXD

IOPB2/USCLK

IOPB3/SCL1
IOPB4/SDA1

IOPC1/SCL2

IOPC2/SDA2

IOPC3/TA1

IOPC4/TB1/EXWINT22

IOPC5/TA2

IOPC6/TB2/EXWINT23

IOPC7/CLKOUT

IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21

IOPE4/SWIN

IOPE5/EXWINT40

IOPE6/LPCPD/EXWIN45

IOPH0/A0/ENV0

IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1

IOPH4/A4/TRIS

IOPH5/A5/SHBM

IOPH6/A6
IOPH7/A7

IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7

IOPJ0/RD

IOPJ1/WR0

SELIO#

IOPK0/A8

IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12

IOPK5/A13_BE0
IOPK6/A14_BE1

IOPK7/A15_CBRD

IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19

IOPL4/WR1#

NC212NC320NC421NC585NC686NC791NC892NC997NC10

NC1

11

551_GND

For 551.

3

2

ADP_I1

R726

1 2

47K_0402_5%

KBA[0..19] 34

2

Add for Battery

1 2

100K_0402_1%

1

C844

0.22U_0603_10V7K

2

KEYBOARD CONN.

JP21

ELCO_00-6278-034-001-800

BADDR1(KBA3) BADDR0(KBA2)

*

1

For EC Tools

JP20

1

1

2

2

3

3

4

R850

ADP_I 40,43

NUM_LED#

34

PADS_LED#

33

CAPS_LED#

R554

R560

+3VS

+3VS

+3VS

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

KSO15
KSO14
KSO10
KSO11
KSO8
KSO9
KSO13
KSI7
KSO3
KSO7
KSO12
KSI4
KSI6
KSI5
KSO6
KSO5
KSI3
KSI0
KSO0
KSO1
KSI1
KSI2
KSO2
KSO4

1 2

300_0402_5%

1 2

300_0402_5%

R564

1 2

300_0402_5%

4

5

5

6

6

7

7

8

8

9

9

10

10

@E&T_96212-1011S

KSO15
KSO14

6

KSO10

7

KSO11

8 1

100P_1206_8P4C_50V8

KSO8
KSO9

6

KSO13

7

KSI7

8 1

100P_1206_8P4C_50V8

KSO3
KSO7

6

KSO12

7

KSI4

8 1

100P_1206_8P4C_50V8

KSI6
KSI5

6

KSO6

7

KSO5

8 1

100P_1206_8P4C_50V8

KSI3
KSI0

6

KSO0

7

KSO1

8 1

100P_1206_8P4C_50V8

KSI1
KSI2

6

KSO2

7

KSO4

8 1

100P_1206_8P4C_50V8

I/O Address

Index

0

0

11

0

1

01

2E 2F

4E

(HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1

Reserved

ENV0 (KBA0) TRIS (KBA4)

IRE

*

OBD 0
DEV 0

PROG
SHBM(KBA5)=1: Enable shared memory with host BIOS
TRIS(KBA4)=1: While in IRE and OBD, float all the
signals for clip-on ISE use

KBA1

KBA2

KBA3

KBA5

SKU_ID0

SKU_ID1

SKU_ID2

Title

Size Document Number Rev

Custom

Date: Sheet

ENV1 (KBA1)

0

1
1

1 2

R576 1K_0402_5%

1 2

R577 @1K_0402_5%

1 2

R578 1K_0402_5%

1 2

R579 1K_0402_5%

1 2

R580 @10K_0402_5%

1 2

R581 @10K_0402_5%

1 2

R583 @10K_0402_5%

0
1

1

+3VALW

1 2

R586 10K_0402_5%

1 2

R587 10K_0402_5%

1 2

R588 10K_0402_5%

Compal Electronics, Ltd.

K/B-CTRL/ENE KB910

LA-2301

1

EC_TINT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

EC_URXD
EC_UTXD/KSO17
EC_USCLK

CP5

CP6

CP7

CP8

CP9

CP10

Data

0
0
0
0

+3VALW

45
3
2

45
3
2

45
3
2

45
3
2

45
3
2

45
3
2

4F

1.0

of

33 48Friday, May 28, 2004

Extension IO

C603

1 2

@0.1U_0402_16V4Z

KBA2

9

SELIO#33

SN74LVC32APWLE_TSSOP14

10

System BIOS

14

U17D

12

P

FWE#

SN74LVC32APWLE_TSSOP14

A

11

O

13

B

G

7

SMBus EEPROM

EC_SMC133,39
EC_SMD133,39

+3VALW

@100K_0402_5%

14

U17C

P

A

O

B

G

7

+5VALW

+3VALW+3VALW

R593
100K_0402_5%

1 2

+5VALW

+3VALW

R590

1 2

8

C604

1 2

@1U_0603_10V4Z

2

G

1 3

D

Q29
2N7002_SOT23

C607

1 2

0.1U_0402_16V4Z
U43

8

VCC

7

WP

6

SCL

5

SDA

AT24C16AN-10SI-2.7_SO8

ADB0

ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

AA
LARST#SELIO#

S

A0

A1

A2

GND

3

11

1

R591

1 2

@1.2M_0402_5%

SUSP# 30,31,33,37

FWR# 33

+5VALW

R594
100K_0402_5%

1 2
1
2
3
4

R597
100K_0402_5%

1 2

+5VALW

C602

1 2

@0.1U_0402_16V4Z

20

U40

2

1Q

1D

5

VCC

2D42Q

6

3D73Q

9

4D84Q

12

5D135Q

15

6D146Q

16

7D177Q

19

8D188Q

CLK
OE

GND

@SN74HCT374PW_TSSOP20

10

+3V

12

R592
10K_0402_5%

BATT_LOW_LED#

PWR_LED#
WL_LED#

BATT_CHGI_LED#

ODD_LED#

PWR_LED#

BATT_CHGI_LED#

ODD_LED#
WL_LED#

For KB910

FLASH# 20

BATT_LOW_LED# 33
PWR_LED# 35
WL_LED# 35

ODD_LED# 35

RP107

1 8
2 7
3 6
4 5

0_1206_8P4R_5%

KBA[0..19]33

ADB[0..7]33

512KB Flash ROM

KBA[0..19]

ADB[0..7]

U41

KBA18

1

A18

KBA16

2

A16

KBA15

3

A15

KBA12

4

A12

KBA7

5

A7

KBA6

6

A6

KBA5 KBA9

7

A5

KBA4

8

A4

KBA3

9

A3

KBA2

10

A2

KBA1

11

A1

KBA0

12

A0

ADB0

13

DQ0

ADB1

14

DQ1

ADB2

15

DQ2

16

VSS

512K8-90_PLCC32

1MB Flash ROM

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

FSEL#
FRD#
FWE#

U42

21

A0

20

A1

19

A2

18

A3

17

A4

16

A5

15

A6

14

A7

8

A8

7

A9

36

A10

6

A11

5

A12

4

A13

3

A14

2

A15

1

A16

READY/BUSY#

40

A17

13

A18

37

A19

22

CE#

24

OE#

9

WE#

@SST39VF080-70_TSOP40

TP_CLK33

TP_DATA33

+5VS
+5V

+5VALW

ACIN20,33,38

PWR_SUSP_LED33,35

910_PWR_LED# 33

910_CHGI_LED# 33
910_ODD_LED# 33

910_WL_LED# 33

32

VDD

31

WE#

30

A17

29

A14

28

A13

27

A8

26

A9

25

A11

24

OE#

23

A10

22

CE#

21

DQ7

20

DQ6

19

DQ5

18

DQ4

17

DQ3

31

VCC0

30

VCC1

25

D0

26

D1

27

D2

28

D3

32

D4

33

D5

34

D6

35

D7

10

RP#

11

NC

12
29

NC0

38

NC1

23

GND0

39

GND1

PWR_LED#

PWR_SUSP_LED
BATT_CHGI_LED#
BATT_LOW_LED#

@470P_0402_50V8J

C605

1 2

0.1U_0402_16V4Z

+3VALW

FWE#
KBA17
KBA14
KBA13
KBA8

KBA11
FRD#

FRD# 33

KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

1 2

R598
@100K_0402_5%

@470P_0402_50V8J

1

C834

1

C835

2

2

@470P_0402_50V8J

EMI Request

close connector

FSEL# 33

+3VALW

1

C608

@0.1U_0402_16V4Z

2

+3VALW

@470P_0402_50V8J

1

C836

1

C837

2

2

@470P_0402_50V8J

@470P_0402_50V8J

1

C838

1

C839

2

2

@470P_0402_50V8J

Touch Pad Connector

JP22

@470P_0402_50V8J

1

C840

C842

1

C841

2

2

@470P_0402_50V8J

1

2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1

C843
@470P_0402_50V8J

2

R8380_0402_5%
R8390_0402_5%
R8400_0402_5%
R8410_0402_5%
R8420_0402_5%
R8430_0402_5%
R8440_0402_5%
R8450_0402_5%
R8460_0402_5%
R8470_0402_5%

For MP3 / BUTTON LOCK / CD-PLAY

2

4

1

3

5

SW1
TC010-PS11CET_5P

REV BTN

MUL_KEY_ESD#

D28

1

DAN202U_SC70

2

4

FRD BTN

2

4

PLAY BTN

2

4

STOP BTN

2

4

3

MUL_KEY#

2

1

3

5

SW2
TC010-PS11CET_5P

1

3

5

SW3
TC010-PS11CET_5P

1

3

5

SW4
TC010-PS11CET_5P

1

3

SW5

5

TC010-PS11CET_5P

MUL_KEY_ESD# 35

ACES_85201-1205

1
2
3
4
5
6
7
8
9
10
11
12

EC_REVBTN#

2

3

EC_FRDBTN#

EC_PLAYBTN#

EC_STOPBTN#

51ON# 35,38

MUL_KEY# 33

D49

1

@PSOT24C_SOT23

D50

2

1

3

@PSOT24C_SOT23

EC_REVBTN# 33EC_UTXD/KSO1733

EC_FRDBTN# 33

EC_PLAYBTN# 33

EC_STOPBTN# 33

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Ltd.

Title

BIOS & Ext.I/O

Size Document Number Rev

Custom

LA-2301

Date: Sheet

of

34 48Tuesday, May 1 8, 2004

1.0

5

4

3

2

1

R599

100K_0402_5%

+3VALW

12

3

2

LID_SW#

D73

1

DAN202U_SC70

V-PORT-0603-220 M-V05_0603

VID_PWRGD

VID_PWRGD44

ENLL44

H_VID_PWRGD5

Kill SWITCH

SW8

1

1

2

2

3

3

DS-1208_3P

RTC BATT

BATT1

-

ML1220T13RE

BAS40-04_SOT23

+RTCVCC

C622

0.1U_0402_16V4Z

Compal Electronics, Ltd.

Title

PWRGD/Fan/PWRBTN/TP/LID.

Size Document Number Rev

Custom

LA-2301

Date: Sheet

SW6

1

D31

R607 0_0402_5%

1

2

3

2 1

R605

10K_0402_5%

12

SN74LVC125APWLE_TSSOP14

+RTCBATT

+

+RTCBATT

12

D45

3

2

4

ESE11MV9_4P

+3V

12

+3V POWER

10

U33C

8

OE#

I9O

+3V

R610
100K_0402_5%

1 2

KILL_SW# 28,33

D39

V-PORT-0603-220 M-V05_0603

2 1

C618

0.1U_0402_16V4Z

1 2

1

2

+CHGRTC

35 48Tuesday, May 1 8, 2004

1

1.0

of

Power Button

MUL_KEY_ESD#34

2

3

D30

@PSOT24C_SOT23

SW7

5

TC010-PS11CET_5P

EC_ON33

1

2

R612

10K_0402_5%

R619

10K_0402_5%

1

2

4

R603

4.7K_0402_5%

EC_ON

2N7002_SOT23

1

C611

0.1U_0402_16V4Z

2

12

12

5

12

Q34

+12VALWP

3

+

2

-

R614

5

6

13

D

S

8

U44A

LM358A_SO8

P

0

G

4

1 2

FAN_SPEED233

+12VALWP

+

-

1 2

R620

FAN_SPEED133

1

DAN202U_SC70

R604

1 2

33K_0402_5%

DTC124EK_SC59

2

G

1

8.2K_0402_5%

U44B

LM358A_SO8

7

0

8.2K_0402_5%

D D

1

3

+3VALW

C C

FAN CONN 2

C610

0.1U_0402_16V4Z

EN_DFAN233

B B

FAN CONN 1

EN_DFAN133

A A

D33

3

2

2

Q32

R611

1 2

100_0402_1%

C613

0.1U_0402_16V4Z

R618

1 2

100_0402_1%

0.1U_0402_16V4Z

+3VALW

R601
100K_0402_5%

1 2

13

+3VS

1 2

C620

+3VS

1 2

51ON#

1000P_0402_25V8K

FMMT619_SOT23

2

1

R617
10K_0402_5%

FMMT619_SOT23

2

1

R621
10K_0402_5%

C609

+5VALW

Q37

1

C

2

B

E

3

1

2

@1000P_0402_25V8K

+5VALW

Q41

C

2

B

E

@1000P_0402_25V8K

2

@1000P_0402_25V8K

4

ON/OFFBTN# 36

ON/OFF 33

51ON# 34,38

12

2

D35
RLZ20A_LL34

1

D38

1SS355_SOD323

@1000P_0402_25V8K

C614

D41

1N4148_SOT23

3

C615

1

D44

1SS355_SOD323

3

1

C621

D46

1N4148_SOT23

3

C623

12

+FAN_VCC1

1

2

1

2

12

+FAN_VCC2

1

2

1

2

1

C612

10U_0805_10V4Z

2

JP23

1
2
3

ACES_85205-0300

1

C619

10U_0805_10V4Z

2

JP24

ACES_85205-0300

LID_SW#33

S4_LID_SW#36

SYS. FUNT. LED--Flate

+5V

+5V

+5V

+5V

1 2

R640
300_0402_5%

1 2

R725
300_0402_5%

1 2

R613
300_0402_5%

1 2

R615
300_0402_5%

PWR ON LED

D48

2 1

HT-191NB_BLUE_0603

SUSP LED

D57

2 1

HT-191UD_AMBER_0603

ODD_LED

D40

2 1

HT-191UYG-DT_GRN_0603

HDD LED

D42

2 1

HT-191UYG-DT_GRN_0603

2N7002_SOT23

Q59

D

1 3

2

PWR_LED# 34

S

G

PWR_SUSP_LED 33,34

ODD_LED# 34

HDD_LED# 33

SYS. FUNT. LED--Right Angle

+5V

1 2

R616

300_0402_5%

+3VS

1 2

R639

120_0402_5%

1
2
3

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

WL LED

D43

12

HT-110UD_1204

5IN1 LED

D47

2 1

HT-110UYG-CT_YEL/GRN

WL_LED# 34

5IN1_LED# 24

2

A

B

C

D

E

H1

13

U16D

11

OE#

I12O

SN74LVC125APWLE_TSSOP14

1 1

2 2

13

11

OE#

I12O

U33D
SN74LVC125APWLE_TSSOP14

H20
H_S315D110

H24
H_S315D110

H28
H_S394D110

H34
H_C315D169

H23
H_S315D110

1

1

1

1

1

H27
H_S315D110

1

H29
H_S394D110

1

H21
H_S315D110

1

H25
H_S315D110

1

H33
H_C146D63

1

H36
H_S394D110

1

H22
H_S315D110

1

H26
H_S315D110

1

H_C394D177

H5
H_C315D91

H9
H_C315D181

H4

H_C394D177

1

H8

H_C315D91

1

H10
H_C315D181

1

H19
H_O224X146D146X67

1

1

1

1

H2
H_C394D177

H6
H_C315D91

H32
H_S354D181

1

1

1

H3
H_C394D177

H7
H_C315D91

H11
H_C315D169

1

H18
H_C276D169

1

1

1

M1
H_O201X148D201X148N

FD1
FIDUCAL

FD4
FIDUCAL

CF1
SMD40M80

CF7
SMD40M80

CF13
SMD40M80

1

FD2

FD3
FIDUCAL

FIDUCAL

1

FD5
FIDUCAL

1

CF2
SMD40M80

1

CF8
SMD40M80

1

CF14
SMD40M80

1

1

FD6
FIDUCAL

1

CF3
SMD40M80

CF9
SMD40M80

M2
H_C79D79N

1

1

1

CF5

CF4

SMD40M80

SMD40M80

1

1

CF11

CF10
SMD40M80

SMD40M80

1

1

M3
H_O118X79D118X79N

1

CF6
SMD40M80

1

CF12
SMD40M80

1

M4
H_C148D148N

1

M5
H_C138D138N

1

1

1

1

1

Battery mode Hibernation

RTCVREF

RTCVREF

680K_0402_5%

12

RTCVREF

+3VALW

12

13

D

2

G

S

R826

10K_0402_5%

@1U_0805_16V7K

1 2

R827
10K_0402_5%

R821

100K_0402_5%

1 2

R820

100K_0402_5%

3 3

4 4

S4_LID_SW#35

SYSON33,37,42

S4_LATCH33

S4_DATA33

12

R822

1 2

C792 1U_0603_10V6K

Q62
2N7002_SOT23

RTCVREF

R824

C795

2 1

10K_0402_5%

1

2

D75

CH751H-40_SC76

R825

1 2

10K_0402_5%

2

1 2

1N4148_SOT23
D74

1

3

2

C793 1U_0603_10V4Z

RTCVREF

C791 0.1U_0 402_10V6K

1 2

5

U53

P

4

A

Y

G

NC7SZ14M5X_SOT23-5

3

1 2

U54

1

CD1#

VCC

2

D1

CD2#

3

CP1

D2

4

SD1#

CP2

5

Q1

SD2#

6

Q1#

Q2

7

GND

Q2#

74LCX74MTC_TSSOP14

D_SET_S4

1 2

R823
10K_0402_5%

2

Q63

2N7002_SOT23

RTCVREF

14
13
12
11
10
09
08

13

D

G

S

0.1U_0402_10V6K

1 2

C794

2N7002_SOT23

ON/OFFBTN# 35

13

D

Q61

2

G

2N7002_SOT23

S

Q64

2

G

13

D

S

1

C796

@220P_0402_50V7K

2

1

Compal Electronics, Ltd.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

ScrewHole

Size Document Number Rev

Custom

LA-2301

Date: Sheet

E

of

36 48Tuesday, May 1 8, 2004

1.0

5

4

3

2

1

+2.5V & +2.5VS Discharge+2.5V To +2.5VS Transfer

2

G

+2.5V +2.5VS+2.5V +2.5VS

12

R622
@470_0402_5%

13

D

Q42
@2N7002_SOT23

S

2

G

12

R623
@470_0402_5%

13

D

Q43
@2N7002_SOT23

S

U46

S

D

S

D

S

D

G

D

SI4800DY_SO8

R625

1 2

100K_0603_1%

0.1U_0402_16V7K

1
2
3
4

C627

10U_0805_10V4Z

1

C631

2

1

2

13

D

S

2N7002_SOT23

1

C626

@0.1U_0402_16V4Z

2

SUSP

2

G

Q45

SYSON# SUSP

+3VALW AND +2.5VALW MUST RISING SAME TIME

8

C629

1

2

7
6
5

+12VALW

Add for EMI

+2.5V

D D

2

1

0.1U_0402_10V6K

+3VS

C814

0.1U_0402_10V6K

2

1

C815

2

1

0.1U_0402_10V6K

C816

+3V

2

C817

1

0.1U_0402_10V6K

+3VS

0.1U_0402_10V6K

2

1

C818

2

1

0.1U_0402_10V6K

C819

10U_0805_10V4Z

+1.5V MUST DELAY AFTER +2.5V

+3VALW To +3V Transfer +3VALW To +3VS Transfer

+3V & +3VS Discharge

+3V +3VS

12

R626
@470_0402_5%

13

2

G

D

Q48
@2N7002_SOT23

S

SYSON#

12

R627
470_0402_5%

13

D

2

G

Q49

2N7002_SOT23

S

C637

+3VALW+3VALW +3V

1

2

U47

S

D

S

D

S

D

G

D

SI4800DY_SO8

95.3K_0603_1%

0.1U_0402_16V7K

1
2
3
4

R629

1 2

1

C635
10U_0805_10V4Z

2

13

1

C639

2

D

S

1

C634

@0.1U_0402_16V4Z

2

SYSON# SUSP

2

G

Q47

2N7002_SOT23

10U_0805_10V4Z

8
7
6
5

1

C636

10U_0805_10V4Z

C C

2

+12VALW

U48

8

D

7

D

6

D

5

D

SI4800DY_SO8

+12VALW

0.1U_0402_16V7K

1

S

2

S

3

S

4

G

R628

1 2

95.3K_0603_1%

1

C633

10U_0805_10V4Z

2

1

C638

2

13

D

S

2N7002_SOT23

Q46

+3VS

2

G

1

C632

@0.1U_0402_16V4Z

2

SUSP

+5VALW To +5V Transfer

13

2

G

Q50
2N7002_SOT23

+5V+5VALW

1

C640

@0.1U_0402_16V4Z

2

SYSON#

10U_0805_10V4Z

U49

S

D

S

D

S

D

G

D

SI4800DY_SO8

R632

1 2

47K_0603_1%

0.1U_0402_16V7K

1
2
3
4

1

C641

10U_0805_10V4Z

2

1

C647

2

D

S

8
7
6
5

1

C645

10U_0805_10V4Z

B B

2

+12VALW

C646

+5VALW

1

2

+12VALW

8
7
6
5

SI4800DY_SO8

1 2

27K_0603_1%

0.1U_0402_16V7K

+5VALW To +5VS Transfer

U50

1

S

D

2

S

D

3

S

D

4

G

D

R633

1

C648

2

+5VS

1

C643

10U_0805_10V4Z

2

13

D

S

1

2

2

G

Q51
2N7002_SOT23

C642

@0.1U_0402_16V4Z

SUSP

+5VALW

12

R634
10K_0402_5%

SYSON#

13

D

SYSON33,36,42

2

G

Q54
2N7002_SOT23

S

SYSON#

+5V & +5VS Discharge

+5V

12

R630
470_0805_5%

13

D

2

G

Q52
2N7002_SOT23

S

SUSP

+5VS

12

R631
470_0402_5%

13

D

2

G

Q53
2N7002_SOT23

S

+1.5VS Discharge

+5VALW

SUSP

1

2

G

+1.5VS

12

R708
@470_0603_5%

13

D

Q58
@2N7002_SOT23

S

37 48Friday, May 28, 2004

of

1.0

12

R635

4.7K_0402_5%

SUSP

13

SUSP#30,31,33,34

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET N OR THE INFORMATION I T CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

SUSP#

D

2

G

Q55
2N7002_SOT23

S

2

SUSP 42,43

Title

Size Document Number Re v

B

Date: Sheet

Compal Electronics, Inc.

DC-DC Circuit Interface

LA-2301

A

PL1

DC_IN_S1 DC_IN_S2

PJP1

1

1

1 1

3

G

4

G

SINGA_2DC-G213-B04

2

2

PF1

21

12A_65VDC_451012

12

PD1

EC10QS04_SOD106

12

PC1
1000P_0402_50V7K

C8B BPH 853025_2P

1 2

12

PC2

100P_0402_50V8J

VIN

B

12

PC3
1000P_0402_50V7K

VIN

12

PC4
100P_0402_50V8J

PC5

1000P_0402_50V7K

C

VS

VIN

12

PR3

88.7K_0402_1%

1 2

PR5 15.4K_0402_1%

12

12

PR6

20K_0402_1%

12

PC6

0.1U_0402_16V7K

1 2

PR1 1M_0402_1%

VS

8

PU1A

3

P

+

O

2

-

G

LM393M_SO8

4

PR8

12

10K_0402_5%

1

RTCVREF

3.3V

PD2

RLZ4.3B_LL34

12

PR2

5.6K_0402_5%

12

PR4
1K_0402_5%

12

PR7
10K_0402_5%

1 2

PACIN

Vin Detector

High 18.384 17.901 17.430

D

ACIN <20,3 3,34>

PAC IN <40,41>

Low 17.728 17.257 16.976

PD3

1N4148_SOD80

PD4

BATT+

2 2

51ON#<34,35>

PR20

+CHGRTC

3 3

1 2

200_0603_5%

+3VALWP +3VALW

(5A,200mils ,Via NO.= 10)

+5VALWP +5VALW

(5A,200mils ,Via NO.= 10)

+12VALWP +12VALW

(120mA,40mils ,Via NO.= 2)

+2.5VP +2.5V

4 4

(8A,320mils ,Via NO.= 16)

CHGRTCP

PR21

1 2

200_0603_5%

PJ1

2

JUMP_43X118

PJ3

2

JUMP_43X118

PJ5

2

JUMP_43X39

PJ6

2

JUMP_43X118

PJ8

2

JUMP_43X118

RB751V_SOD323

RTCVREF

112

112

112

112

112

12

1 2

PR11
200_0603_5%

100K_0402_5%

1 2

PR14 22K_0402_5%

12

PR13

S-812C33AUA-C2N-T2_SOT89

3.3V

3

12

PC10
10U_0805_10V4Z

12

OUT

GND

N1

PC7

0.22U_1206_25V7M

12

PU2

2

IN

1

12

1U_0805_25V4Z

+1.8VSP +1.8VS

+CPU_VIDP +CPU_VID

+1.5VSP +1.5VS

1 2

12

PR9

33_1206_5%

13

PQ1
TP0610T_SOT23

2

12

PR16

200_0603_5%

N2

PC9

2 1

2

(1A,40mils ,Via NO.= 2)

2

(120mA,20mils ,Via NO.= 1)

2

(3A,120mils ,Via NO.= 6)

VS

PC8

0.1U_0603_25V7K

PD6
RLZ16B_LL34

PJ7

112

JUMP_43X79

PJ4

112

JUMP_43X39

PJ2

112

JUMP_43X118

1 2

PR10
1K_1206_5%

VIN

VL

PD7

MAINPWON<6,39,41>

ACON<40>

2

3

RB715F_SOT323

1

PD5

1N4148_SOD80

1 2

PR17

Precharge detector

15.97V/14.84V FOR
ADAPTOR

N3

12

100K_0402_5%

1000P_0402_50V7K

PR12
1K_1206_5%

PR15
1K_1206_5%

PC12

1 2

1 2

LM393M_SO8

12

PR18

8

PU1B

P

+

7

O

-

G

4

PC13

1000P_0402_50V7K

2.2M_0402_5%

5

6

12

12

12

PR24

66.5K_0402_1%

PR22

12

34K_0402_1%

VL

D

S

12

PR25
191K_0402_1%

13

PQ2

2

G

SN7002N_SOT23

B+

12

PR19
499K_0402_1%

12

PR23

499K_0402_1%

PR26 47K_0402_5%

13

PQ3
DTC115EUA_SC70

2

12

12

PC11
1000P_0402_50V7K

PACIN

+5VALWP

THIS SHEET OF EN GINEERING DRAW ING IS THE PROPRIETARY PROPERTY

PJ9

2

112

JUMP_43X118

A

(2A,80mils ,Via NO.= 4)

+1.25VS+1.2 5VSP

B

OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION I T CONTAINS MAY BE US ED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.

C

Title

Size Document Number Re v

Date: Sheet

Compal Electronics, Inc.

DCIN & DETECTOR

LA-2331

D

38 48Tuesday, May 18, 2004

1.0

of

A

B

C

D

PH1 under CPU botten side :

CPU thermal protection at 84 degree C
Recovery at 45 degree C

1 1

PR28

12

PF2

21

15A_65VDC_451015

PR29

1 2

47K_0402_5%

PD8

3

1

2

BAS40-04_SOT23@

PR36

+3VALWP

PJP2

10

GND

11

GND

SUYIN_200275MR009G116ZL_RV

BATT+
BATT+

SMD

SMC
GND­GND-

1
2
3

ID

4

B/I

5

TS

6
7
8
9

ALI/NIMH#
AB/I
TS_A
EC_SMDA
EC_SMCA

PR33

100_0402_5%

1 2

BATT_S1

1K_0402_5%

1K_0402_5%

PR34

100_0402_5%

1 2

1 2

PR31

12

12

PR38

2 2

1K_0402_5%

PD10

25.5K_0402_1%

+3VALWP

VMB

1 2

C8B BPH 853025_2P

12

PC15
1000P_0402_50V7K

ALI/MH# <33>

PL2

BATT+

12

PC16

0.01U_0402_25V7Z

10KB_0603_1%_TH11-3H103FT

0.22U_0805_16V7K_V2

3

1

VL VS

12

PH1

PR32

1 2

16.9K_0402_1%

12

12

PC17

PR35

3.32K_0402_1%

1000P_0402_50V7K

TM_REF1

12

PC18

12

PC14

0.1U_0603_25V7K

8

3

+

2

-

4

PR37

100K_0402_1%

12

PR39

100K_0402_1%

PR30

1 2

47K_0402_1%

PU3A

P

1

O

G

LM393M_SO8

12

VL

PR27

47K_0402_1%

1 2

VL

PD9

12

1SS355_SOD323

2

13

PQ4
DTC115EUA_SC70

MAINPW ON <6 ,38,41>

2

BAS40-04_SOT23@

BATT_TEMP <33>

EC_SMD1 <33,34>

EC_SMC1 <33,34>

PD11

BAS40-04_SOT23@

3 3

+5VALWP

1

2

3

1

PD12

BAS40-04_SOT23@

2

3

PH2 near main Battery CONN :

BAT. thermal protection at 79 degree C
Recovery at 45 degree C

12

PH2

PC19

0.22U_0805_16V7K_V2

10KB_0603_1%_TH11-3H103FT

1 2

PR42 14.7K_0402_1%

12

12

PR43

3.48K_0402_1%

TM_REF2

12

PC20
1000P_0402_50V7K

12

1 2

47K_0402_1%

5

+

6

-

PR45
100K_0402_1%

PR41

8

4

PU3B

P

7

O

G

LM393M_SO8

PR44

100K_0402_1%

VLVL

1 2

12

PR40
47K_0402_1%

PD13

1SS355_SOD323

VL

12

4 4

THIS SHEET OF EN GINEERING DRAW ING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION I T CONTAINS MAY BE US ED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

A

B

INC.

C

Title

Size Document Number Re v

Date: Sheet of

Compal Electronics, Inc.

BATTERY CONN / OTP

LA-2331

D

39 48Tuesday, May 18, 2004

1.0

A

P2

PQ6
AO4407_SO8

8
7

5

47K

2

47K

13

PQ11

DTC115EUA_SC70

ACOFF#

PACIN

1 3

1 2

1SS355_SOD323

1 2

PR60
3K_0402_1%

ACON

VIN

1 1

12

PR48
47K_0402_5%

2

13

D

2

G

PQ13

S

SN7002N_SOT23

2 2

PACIN<38,41>

ACON<38>

1
2
36

4

PQ9

DTA144EUA_SC70

PC24

0.1U_0603_25V7K

PR56

150K_0402_1%

PD17

12

2

G

1
2
3 6

12

PR47

200K_0402_1%

12

13

D

IREF<33>

PQ14

SN7002N_SOT23

S

PQ7
AO4407_SO8

4

0.1U_0402_16V7K

12

PC27

8
7

5

ADP_I<33,43>

12

PR54
10K_0402_1%

205K_0402_1%

1 2

PR59

100K_0402_1%

12

PR64

P3 B+

12

PR53

33.2K_0402_1%

PC30

0.1U_0402_16V7K

12

12

PC34

0.1U_0402_16V7K

IREF=1.31*Icharge
IREF=0.73~3.3V

B

Iadp=0~5.8A

PR46

0.01_2512_1%(1W)

PR52 100K_0402_5%

PC28

PR55

1 2

1 2

4700P_0402_25V7K

1000P_0402_50V7K

10K_0402_5%

PR57

PC31

1 2

1 2

1K_0402_5%

PR62 10K_0402_5%

C

B++

PL3

+INC2

GND

CS

OUT

VH

VCC

RT

-INE3

FB3

CTL

+INC1

1 2

C8B BPH 853025_2P

24

23

CS

22

21

20

1 2

19

PC29

0.1U_0603_25V7K

18

1 2

17

PR58
68K_0402_5%

16

PR63

1 2

15

47K_0402_5%

ACON

14

13

PC32

0.1U_0603_25V7K

1500P_0402_50V7K

12

PC21

4.7U_1206_25V6K

12

PR50

0_0402_5%

PC25

0.022U_0402_16V7K

1 2

PC26

1 2

0.1U_0603_25V7K

1 2

PC33

1 2

12

PC22

4.7U_1206_25V6K

12

PC23

4.7U_1206_25V6K

36

N18

578

22UH_SPC-1204P-220_2.9A_20%

12

PD18

RB051L-40_SOD106

241

PQ10
AO4407_SO8

LXCHRG

PL4

1 2

1 2

47K_0402_5%

PR51

10K_0402_5%

ACOFF#

1 2

13

2

PQ12

DTC115EUA_SC70

CC=0.5~2.7A
CV=16.8V(12 CELLS LI-ION)

PR61

1 2

0.02_2512_1%

12

PU4

1

-INC2

12

12

2

OUTC2

3

+INE2

4

-INE2

VCC(o)

5

FB2

6

VREF

7

FB1

8

-INE1

9

+INE1

10

OUTC1

11

OUTD

12

-INC1

MB3887_SSOP24

D

PQ5
AO4407_SO8

1
2
3 6

4

1
2
3 6

PQ8 AO4407_SO8

4

PR49

12

1 2

PD16

4.7U_1206_25V6K

12

PC36

PC35

4.7U_1206_25V6K

8
7

5

8
7

5

PD14

RLZ22B_LL34

PD15
1SS355_SOD323

1 2

1SS355_SOD323

12

12

4.7U_1206_25V6K

VIN

ACO FF <33>

BATT+

PC37

+3VALWP

12

PR67
47K_0402_5%

3 3

FSTCHG<33>

2

13

PQ16
DTC115EUA_SC70

2

CS

13

PQ15
DTC115EUA_SC70

VMB

PR65

12

95.3K_0603_0.1%

PR68

12

95.3K_0603_0.1%

4.2V

PR66

12

143K_0603_0.1%

12

PR69
340K_0402_1%

OVP voltage : LI

4S2P : 17.4V--> BATT_OVP= 1.935V

+12VALWP

(BAT_OVP=0.1111 *VMB)

8

PU5A

LM358A_SO8

PR71

2.2K_0402_5%

1

BATT_OVP<33>

4 4

PC38

12

0.1U_0402_16V7K@

A

12

3

P

+

0

2

-

G

4

105K_0402_1%

PR72

12

PR70
499K_0402_1%

12

12

PC39

0.01U_0402_25V7Z

B

75W Iadp=0~3.5A

90W Iadp=0~4.2A

120W Iadp=0~5.8A

PR46=0.02_2512_1% PR53=25.5K_0402_1%

PR46=0.015_2512_1% PR53=29.4K_0402_1%

PR46=0.01_2512_1% PR53=33.2K_0402_1%

THIS SHEET OF EN GINEERING DRAW ING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION I T CONTAINS MAY BE US ED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.

C

Unpop PQ8

Unpop PQ8

Pop PQ5 and PQ8

Title

Size Document Number Re v

Date: Sheet of

Compal Electronics, Inc.

CHARGER

LA-2331

D

40 48Tuesday, May 18, 2004

1.0

5

4

3

2

1

N4

B+++

D D

B+

PL5

1 2

HCB4532K-800T90_1812

PC43

4.7U_1206_25V6K

12

4.7U_1206_25V6K

12

PC44

5

D8D7D6D

S1S2S3G

4

5

D8D7D6D

S1S2S3G

12

PC51

12

47P_0402_50V8J

10UH_SPC-1205P-100_4.5A_20%

C C

+3VALWP

PC55

1

2

470U_6.3V_M

B B

PL6

1M_0402_1%

PR79

1 2

PD22

+

SSM14_SMA

2 1

3.32K_0402_1%

PR85

4

PR76

1.27K_0402_1%

1.27K_0402_1%

PR80

0_0402_5%

12

PC56
100P_0402_50V8J

1 2

PR88

10K_0402_1%

1 2

PQ17
SI4800DY-T1_SO8

PQ19
SI4810DY_SO8

12

PR77

1 2

12

PACIN<38,40>

VS

1 2

PDL3

12

PC53

0.47U_0603_16V7K

1 2

47K_0402_5%

0.047U_0402_16V4Z@

PC42

0.1U_0603_25V7K

PLX3

PR82

620_0402_5%

1 2

PR83

10K_0402_5%

PR86

PC62

12

BST31

PDH3

CSH3
CSL3

12

12

PC49

0.1U_0603_25V7K

PU6

25

BST3

27

DH3

26

LX3

24

DL3

1

CSH3

2

CSL3

3

FB3

10

SKIP#

23

SHDN#

7

TIME/ON5

28

RUN/ON3

12

PC58
1000P_0402_50V7K

PR90
220K_0402_5%

12

PC63

0.47U_0603_16V7K

PD21

VS

VL

1SS355_SOD323

1 2

22

V+

GND

8

12

VL

MAINPW ON <6 ,38,39>

2

3

PD20

DAP202U_SOT323

1

12

PC48

4.7U_0805_6.3V6K

21

4

12OUT

VL

5

VDD

18

BST5

16

DH5

17

LX5

19

DL5

20

PGND

14

CSH5

13

CSL5

12

FB5

15

SEQ

9

REF

6

SYNC

11

RST#

MAX1902EAI_SSOP28

BST51

+12VALWP

12

PC50

4.7U_1206_25V6K

CSL5

12

PC57

4.7U_0805_6.3V6K

PR81

0_0402_5%

2.5VREF

PC45

1 2

0.1U_0603_25V7K

PDH5

PLX5

12

PC54

0.47U_0603_16V7K

10.2K_0402_1%

12

PC46

4.7U_1206_25V6K

12

12

12

PR87

12

PR89

10K_0402_1%

B+++

12

4.7U_1206_25V6K

PDL5

PR84
698_0402_1%

12

PC47

SI4810DY_SO8

PC59
100P_0402_50V8J

PC41
470P_0805_100V7K

1 2

PR73 22_1206_5%

5

PQ18

SI4800DY-T1_SO8

4

5

PQ20

4

12

D8D7D6D

S1S2S3G

1.54K_0402_1%

D8D7D6D

S1S2S3G

CSH5

470U_6.3V_M

FLYBACKSNB

PR74

12

12

PR78

2M_0402_1%

PC60

12

PC52
47P_0402_50V8J

PC40

1 2

12

PD19

4.7U_1206_25V6K

EC11FS2_SOD106

PT1

10uH_SDT-1205P-100-118_5A_20%

1 4

3 2

12

PR75

0_0402_5%

1

470U_6.3V_M

+

2

1

PD23

+

PC61

SSM14_SMA

2

2 1

+5VALWP

A A

THIS SHEET OF EN GINEERING DRAW ING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION I T CONTAINS MAY BE US ED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

5

4

3

INC.

2

Title

Size Document Number Re v

Date: Sheet

Compal Electronics, Inc.

5V/3.3V/12V

LA-2331

41 48Tuesday, May 18, 2004

1

1.0

of

A

1 2

12

PC64

1U_0603_6.3V6M

13

12

PC66

470P_0603_50V7K

PR95

2.4K_0402_1%

PU7

7

OCSET

6

FB

3

GND

APW7057KC-TR_SOP8

1 2

1 2

PC69

0.1U_0402_16V7K

PR92

7.15K_0402_1%

1 1

DTC115EUA_SC70

PR93

100K_0402_5%

VL

12

PR158

68K_0402_5%

>

SYSON

1 2

PC123

0.1U_0402_16V7K

2 2

2

1 2

1 2

PQ22

2

13

PQ24

DTC115EUA_SC70

5

VCC

BOOT

UGATE

PHASE

LGATE

PR94

5.1K_0402_1%

1 2

1

2

8

4

PR91

10_0603_5%

B

1N4148_SOD80

1 2

12

PD24

5

PC67

0.1U_0402_16V7K

4

5

4

PQ21

D8D7D6D

SI4800DY-T1_SO8

S1S2S3G

PL7

4.7U_SPC-1205P-4R7A_+40-20%

D8D7D6D

PQ23

SI4810DY_SO8

S1S2S3G

12

12

PJ10

2

JUMP_43X118

PC65

4.7U_0805_6.3V6K

1

+

2

112

+2.5VP

PC68
470U_6.3V_M

C

D

+5VALWP

PR96

1 2

10_0603_5%

12

PC70

1U_0603_6.3V6M

5

VCC

UGATE

PHASE

LGATE

1 2

BOOT

1

2

8

4

C

12

PR97

3.32K_0402_1%

PR159

33K_0402_5%

3 3

4 4

A

SUSP<37,43>

1 2

0.1U_0402_16V7K

B

PC124

1 2

1 2

13

D

2

G

S

PC72

470P_0603_50V7K

PQ26
SN7002N_SOT23

PR99

3.4K_0402_1%

PU8

7

OCSET

6

FB

3

GND

APW7057KC-TR_SOP8

PR98
3K_0402_1%

1 2

PC75

0.1U_0402_16V7K

1 2

THIS SHEET OF EN GINEERING DRAW ING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION I T CONTAINS MAY BE US ED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.

PD25

1N4148_SOD80

1 2

PC73

0.1U_0402_16V7K

12

5

PQ25

D8D7D6D

4

5

4

SI4800DY-T1_SO8

S1S2S3G

PL8

3UH_SPC-07040-3R0_5A_30%

D8D7D6D

PQ27

SI4810DY_SO8

S1S2S3G

Title

12

Compal Electronics, Inc.

Size Document Number Re v

Date: Sheet of

2

12

PC71

4.7U_0805_6.3V6K

2.5V/1.5V

LA-2331

PJ11

112

JUMP_43X118

1

+

PC74
470U_6.3V_M

2

D

+5VALWP

+1.5VSP

1.0

42 48Tuesday, May 18, 2004

5

4

3

2

1

PU9

+3VS

D D

PJ12

2

JUMP_43X118

112

1 2

100P_0402_50V8J

C C

APL1085UC-TR_TO252

3

VIN

PC77

4.7U_0805_6.3V6K

PC78

VOUT

ADJUST

1

1 2

2

12

PR100
100_0402_1%

12

PR103

44.2_0402_1%

+2.5V

1

PJ13

1

JUMP_43X118

2

2

PC83

10U_1206_6.3V7K

PR160

0_0402_5%

B B

SUSP<37,42>

1 2

0.1U_0402_16V7K@

PC125

12

12

2

G

PQ29

SN7002N_SOT23

1K_0402_1%

13

D

S

PC76

4.7U_0805_6.3V6K

1 2

PR108

PR109

1K_0402_1%

+1.8VSP

12

12

12

PC85

0.1U_0402_16V7K

12

PU11

VIN1VCNTL

2

GND

3

VREF

4

VOUT

APL5331KAC-TR_SO8

+1.25VSP

PC86
10U_1206_6.3V7K

85W THROTTLING

70W REVOVERY

1 2

PR101

2M_0402_1%@

VS

PR104

10.2K_0402_1%@

196K_0402_1%@

12

PR106

12

PC80

1 2

100K_0402_1%@

124K_0402_1%@

1 2

PR107

PR105

12

3

2

12

PC81

1000P_0402_50V7K@

ADP_I<33,40>

0.01U_0402_25V7Z@

VL

12

@

8

P

+

1

O

-

G

PU10A
LM393M_SO8@

4

PU10B

LM393M_SO8@

8

5

P

+

O

6

-

G

4

6

5

NC

7

NC

8

NC

9

TP

+3VALWP

12

PC84
1U_0603_6.3V6M

VL

PC79

0.1U_0603_25V7K

7

12

12

PR102

100K_0402_1% @

PC82

10P_0402_50V8J@

H_PROCHOT# <5>

13

D

2

G

PQ28

SN7002N_SOT23@

S

A A

THIS SHEET OF EN GINEERING DRAW ING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION I T CONTAINS MAY BE US ED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

5

4

3

INC.

2

Title

Size Document Number Re v

Date: Sheet

Compal Electronics, Inc.

1.8V/1.25V/PROCHOT

LA-2331

43 48Tuesday, May 18, 2004

1

1.0

of

+5VS

B+

PR117

PR119

Others

PM_DPRSLPVR<19>

PM_STPCPU#<5,17,19>

4 Phase 3 Phase

360_0402_1%

20K_0402_1%

Unpop PR115

& PR116

+3VALWP

VID_PWRGD<35>

300_0402_1%

17.4K_0402_1%

Unpop PR115
Pop PR116

PR139

0_0603_5%

VR_ON<33>

12

100P_0402_50V8J

1.2VDD

12

PC95

4.7U_0805_6.3V6K

PR140

0_0402_5%

PR113

1 2

0_0402_5%

PR114

1 2

0_0402_5%

PC90

12

1 2

12

PU13

1

IN

4

PG

3

EN

MIC5258_SOT23-5

PR141
100K_0402_5%

CPU_VID4<5>
CPU_VID3<5>
CPU_VID2<5>
CPU_VID1<5>
CPU_VID0<5>
CPU_VID5<5>

12

PR117
360_0402_1%

12

PR119
20K_0402_1%

ENLL<35>

12

PR118

69.8K_0402_1%

PR129

45.3K_0402_1%

5

OUT

2

GND

7

0

LM358A_SO8

PR123
10K_0402_1%

1 2

1 2

Frequency Select

PU5B

5

+

6

-

12

PR126

32.4K_0402_1%

+CPU_VIDP

12

PC96

4.7U_0805_6.3V6K

1U_0603_6.3V6M

PR121

12

118K_0402_1%

PC87

+5VCPUVCC

12

PC88

0.047U_0603_16V7K

D

S

10_0603_5%

12

13

G

PR110

1 2

PQ32

2

SN7002N_SOT23

H_BOOTSELECT<4>

PU12

32

VCC

1

VID4

2

VID3

3

VID2

4

VID1

5

VID0

6

VID5

34

ENLL

33

DRSEN

35

DSEN#

10

OCSET

11

SOFT

9

DSV

36

FS

37

DRSV

38

NC

40

NC

12

GND

19

GND

ISL6248ACR-T_QFN40

TP0610T_SOT23

Battery Feed

12

1 2

2

B

Forward

PR112

10K_0402_5%

1 2

@

PR122

0_0402_5%@

+5VCPUVCC

PR132
27K_0402_5%

1 2

2

G

C

E

PQ34

3 1

MMBT3904_SOT23

12

PR115

12

0_0402_5%

PR116
0_0402_5%@

12

+5VCPUVCC

12

1000P_0402_50V7K@

Place close to IC

PC93

0.1U_0402_16V7K

1 2

12

1U_0603_6.3V6M

PR131

5.1K_0402_1%

1 2

13

D

PQ33
SN7002N_SOT23

S

+5VCPUVCC

PC89

2200P_0402_50V7K

PC92

PC94

PR135

0_0402_5%

PR136
0_0402_5%@

PR111

80.6K_0402_1%

7

RAMPADJ

39

PGOOD

25

PWM1

24

ISEN1+

23

ISEN1-

26

PWM2

27

ISEN2+

28

ISEN2-

20

PWM3

21

ISEN3+

22

ISEN3-

31

PWM4

30

ISEN4+

29

ISEN4-

15

COMP

13

FB

14

NC

16

VDIFF

17

VSEN

18

VRTN

8

OFS

PR127

1M_0402_1%

13

D

PR130

PQ31

2

G

12

681K_0402_1%

S

PR137

22K_0402_5%

12

PR138
100K_0402_5%

THIS SHEET OF EN GINEERING DRAW ING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION I T CONTAINS MAY BE US ED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.

12

12

1 2

12

22P_0402_50V8J

12

12

VGATE <22>

PWM1 <45>

ISEN1+ <45>
ISEN1- <45>

PWM2 <45>

ISEN2+ <45>
ISEN2- <45>

PWM3 <46>

ISEN3+ <46>
ISEN3- <46>

PWM4 <46>

ISEN4+ <46>

PR120

20K_0402_1%

PC91

PR124
0_0402_5%@

2.26K_0402_1%

1 2

PR133

0_0402_5%

PR134

0_0402_5%@

ISEN4- <46>

12

PR125

PR128

D

S

G

2

12

Place near +VCC_CORE
output capacitor

VSSSENSE <5>

Title

Size Document Number Re v

Date: Sheet of

16.2K_0402_1%

13

PQ30
SN7002N_SOT23

+CPU_CORE

12

Remote
Sensing

12

VCCSENSE <5>

Compal Electronics, Inc.

CPU_CORE (1)

LA-2331

1.0

44 48Tuesday, May 18, 2004

PWM1 <44>

PR143

499K_0402_1%

PWM2 <44>

+5VS

1 2

PR147
499K_0402_1%

1 2

ISEN1-<44>
ISEN1+<44>

1U_0805_16V7K

12

PR144

57.6K_0402_1%

PC109

1 2

ISEN2-<44>
ISEN2+<44>

PC103

1U_0805_16V7K

12

PR148

57.6K_0402_1%

PR142

2.2_0603_1%

1 2

6

3

7

4

1 2

PR146

2.2_0603_1%

1 2

6

3

7

4

PC97

0.22U_0805_16V7K_V2

12

PU14

BOOT

VCC

PWM

UGATE

DELAY

PHASE

LGATE

GND

ISL6209CB-T_SO8

PC105

0.22U_0805_16V7K_V2

1 2

PU15

BOOT

VCC

PWM

UGATE

DELAY

PHASE

LGATE

GND

ISL6209CB-T_SO8

CPU_B+

PC100

12

PC99

PC107

4.7U_1206_25V6K

PQ42

4.7U_1206_25V6K

CPU_B+

PQ35
SI7840DP_SO8

2

N5

1

PHASE1

8

5

2

1

8

5

PQ37

IRF7831TR_SO8@

N6

N7

PHASE2

PQ40

IRF7831TR_SO8@

N8

578

3 6

578

3 6

3 5

241

578

PQ38

@

IRF7831TR_SO8

12

3 6

3 5

241

241

4.7U_1206_25V6K
PQ39
SI7840DP_SO8

578

PQ41

@

IRF7831TR_SO8

3 6

241

12

241

241

PC98

1 2

4.7U_1206_25V6K

PQ36

IRL7833S_D2PAK

23

1

PC126
4700P_0402_25V7K

PC106

12

IRL7833S_D2PAK

23

1

PC127
4700P_0402_25V7K

12

4.7U_1206_25V6K

PD27

SSM14_SMA

2 1

PC108

4.7U_1206_25V6K

12

Local Transistor
Swtich Decoupling

PD28

SSM14_SMA

2 1

100U_25V_M@

1

PC101

2

0.56UH_ETQP4LR56WFC_21A_20%

1 2

PR145

39.2K_0402_1%

12

12

PC132

1000P_0402_50V7K

0.56UH_ETQP4LR56WFC_21A_20%

1 2

PR149

39.2K_0402_1%

Local Transistor
Swtich Decoupling

1

+

2

PL10

12

12

1000P_0402_50V7K

PC133

Panasonic ETQ-P4LR56WFC

PL11

12

+

Panasonic ETQ-P4LR56WFC

PL9

1 2

HCB4532K-800T90_1812

PC102

100U_25V_M@

PC104

0.01U_0402_25V7Z

PH3

820_0402_5%

12

820P_0603_50V7K

PC134

PC110

0.01U_0402_25V7Z

PH4

820_0402_5%

220U_25V_M

12

12

12

PC135

820P_0603_50V7K

12

12

PC130

B+

12

1

2

PD26

EC31QS04

+

PC131

+CPU_CORE

220U_25V_M

1

+

2

THIS SHEET OF EN GINEERING DRAW ING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION I T CONTAINS MAY BE US ED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.

Title

Size Document Number Re v

Date: Sheet

Compal Electronics, Inc.

CPU_CORE (2)

45 48Tuesday, May 18, 2004

of

1.0

5

PC111

0.22U_0805_16V7K_V2

1 2

+5VS

D D

PWM3 <44>

PC115

PR151

499K_0402_1%

C C

PWM4 <44>

499K_0402_1%

1 2

PR155

1 2

1U_0805_16V7K

PC121

1U_0805_16V7K

1 2

1 2

1 2

PR152

57.6K_0402_1%

1 2

ISEN3-<44>
ISEN3+<44>

1 2

PR156

57.6K_0402_1%

1 2

PR150

2.2_0603_1%

PU16

6

VCC

3

PWM

7

DELAY

4

GND

ISL6209CB-T_SO8

0.22U_0805_16V7K_V2

PR154

2.2_0603_1%

PU17

6

VCC

3

PWM

7

DELAY

4

GND

ISL6209CB-T_SO8

BOOT

UGATE

PHASE

LGATE

PC117

1 2

BOOT

UGATE

PHASE

LGATE

4

3 5

241

PQ43
SI7840DP_SO8

578

@

PQ46
IRF7831TR_SO8

2

N9

1

PHASE3

8

5

IRF7831TR_SO8@

PQ45

578

12

3 6

241

PQ47

SI7840DP_SO8

578

3 6

241

241

PQ49

@

IRF7831TR_SO8

1

12

3 6

241

N10

2

N11

1

PHASE4

8

5

PQ48

IRF7831TR_SO8@

578

3 6

3 5

241

3

PC112

12

4.7U_1206_25V6K

PQ44

23

IRL7833S_D2PAK

1

PC128
4700P_0402_25V7K

12

PC118

4.7U_1206_25V6K

PQ50

IRL7833S_D2PAK

23

PC129
4700P_0402_25V7K

2

CPU_B+

PC113

4.7U_1206_25V6K

12

PD29

2 1

PC119

12

4.7U_1206_25V6K

Local Transistor
Swtich Decoupling

PD30

SSM14_SMA

SSM14_SMA

CPU_B+

2 1

PC114

4.7U_1206_25V6K

12

Panasonic ETQ-P4LR56WFC

PL12

0.56UH_ETQP4LR56WFC_21A_20%

1 2

PR153

39.2K_0402_1%

12

12

PC120

4.7U_1206_25V6K

Panasonic ETQ-P4LR56WFC

PL13

0.56UH_ETQP4LR56WFC_21A_20%

1 2

PR157

39.2K_0402_1%

12

PC116

0.01U_0402_25V7Z

12

PH5

820_0402_5%

PC122

0.01U_0402_25V7Z

12

12

+CPU_CORE

1

B B

A A

5

ISEN4-<44>
ISEN4+<44>

N12

THIS SHEET OF EN GINEERING DRAW ING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION I T CONTAINS MAY BE US ED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

4

3

INC.

820_0402_5%

2

PH6

12

Title

Size Document Number Re v

Date: Sheet

Compal Electronics, Inc.

CPU_CORE (2)

1

1.0

of

46 48Tuesday, May 18, 2004

REV 0.2

DescriptionDate Page

Add 16 Cap in on board DDR chip VDD pin03/10 P.14,15

03/10

03/15

03/15

03/15

03/15

03/15

03/16

03/16

P.19

P.21

P.25

P.32

P.27

P.33

P.36

plan from +5VALW to +3V

REV 0.3

04/5 P.23

04/6 P.23 Del pull high resistor in SIO for with FIR & LPT

04/6 P.24 Add SMWP# Pull Low

04/6 P.24 Add SDDA0~SDDA3 pull low

04/12 P.30;31 Change SWDJ design

04/12 P.30;31 Change SWDJ design

Change ODD Conn. layout

REV 0.4

Swap FAN1 & FAN204/22 P.35

04/22

04/22

04/22

P.25 Change XDBSY# power plan from +3VS to +5in_VCC

P.25

P.20 For EMI request04/29 Change USB 48MHZ R309 from 0 to 33

P.29 For EMI request04/29 Add C828,C829,C830,C831,C832,C833

P.34 For EMI request04/29 Add R838,R839,R840,R841,R842

P.25 Change 5 in 1 design05/03

change SMBUS2 pull high from +3V to +5VALWP.33

Location

ADD C775 ~ C790

DEL L9 Change L8 to BeadDel L9 & change L8 to bead for EMIP.18

DEL R643, R646Redefine On board DDR strap pin

DEL R641 ADD Q60,D72Change SB +2.5valw power design

Change JP9Change 5 In 1 connector

ADD R817Add Parallel Port detect strap pin

NONEChange 1394 connector footprint

NONEChange EC SMbus2 pull high plwer

ADD U54,Q61 ~ Q64,U53,D75,D74,R822,R823 ~ R827,C791, C794,C792, C793,R820,R821Add Battery Hibernation circuit

Unmount R535,R816

Add R831

Add R833

DEL R481,R486,R487,R463,R464,L24

Add Q23,U34,C552,C555,R510,R503,R504,R507,R509,R512,R513,R514,R515,L25,R718

Change R398 from 33ohm to 0ohmChange SD_CLK damping value

Add R843,R844,R845,R846,R847 with Bead
C834,C835,C836,C837,C838,C839,C840,C841,C842,C843

Add R850,C84404/29 For POWER requestP.29

Del R391,R392,R397,R399,R400,R401,R403,R413
Change R415,R407 FROM 43K TO 10K
Change R411,R831 FROM 43K TO 2.2K
Change R409 FROM 2.2K TO 10K
Change R418 FROM 10K TO 43K

05/03

05/03

REV 1.0

Add R853ADD CODEC DISABLE PULL HIGHP.29

Change R246 from 150k to 200k & add C272LCD power up soft startP.29

Change U55,U30 to G528Change USB power switchP.2905/03

Add R852Change SM_CD# deaignP.2405/03

Del C408Del PCMCIA 12V CapP.2505/03

Change R311 from 12.4K to 12KChange USB 12.4K to 12K to improve USB signal qualityP.2005/06

Reserve Q65 and C845 and change C823 to 1206 sizeP.2505/06

Change Audio CLK from CLK GEN to CrystalP.2505/16 Add X6,C518,C519 Del R471,R485,R219

Change R324 from 100 ohm to 1k ohm solve ODD noice issueP.2105/26

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Ltd.

Title

PIR

Size Document Number Rev

Custom

LA-2301

Date: Sheet

of

47 48Wednesday, May 26, 2004

1.0

PWR PIR LIST

EVT2

page

45 Change material for ME limit Change PC101 from 220U_25V(10X10.5) to 100U_25V(6.3X7.7)

Reason for change Modify list

45,46 For CPU transient and loadline Change PR145,PR149,PR153,PR157 from 34.8K to 39.2K

45,46 Change material's tolerance Change PC103,PC109,PC115,PC121 from Y5V to X7R

45,46 Intersil suggest Add PD27,Pd28,PD29,PD30(SSM14)

Change PR130 from 340K to 681K

Add PC126,PC127,PC128,PC129(3300P)

Create 90W BOM

38,42,43

38 Modify ACIN detect signal Change PR3 from 88.7K to 84.5K

41 Adjust 3.3V and 5V OCP Change PR76 from 1.27K to 1.87K

42 Add 2.5V delay for HW require Change PR158 from 0 to 68K

42 Modify 1.5V OCP point Change PR97 from 3.32K to 2.8K

42 Add 1.5V delay for HW require Change PR159 from 0 to 33K

45 Add CAP at CPU_CORE input for EMI Add 1000P at PC132,PC133

Add bead for EMI require Add PL14,PL15,PL16,PL17,PL18

Change PR5 from 15.4K to 22K
Change PR48 from 150K_5% to 47K_5%

Change PR77 from 1.27K to 3.74K
Change PR82 from 620 to 1.24K
Change PR74 from 1.54K to 1.27K
Change PR84 from 698 to 1.82K

Add 0.1u at PC123

Change PL8 from 5u to 3u

Add 0.1u at PC124

Add 820P at PC134,PC135

42,43 Delete bead for EMI Delete PL14~PL18 and change to jumper

DVT

45 Change CPU_CORE input CAP Delete PC101

45,46 Add 2.2 ohm at CPU_CORE

38,39 Change to common parts Change PC7 to 0.1U_0805_25V

driver's boost for EMI

Add 220U_25V(10X10.5) at PC130,131

Change PR142,PR146,PR150,PR154 to 2.2_0603_1%

change PC17,PC19 to 0.22U_0805_16V

PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

Size Document Number Re v

B

Date: Sheet of

Compal Electronics, Inc.

EDW10 PIR LIST

FortWorth 20

1.0

48 48Tue sday, May 18, 2004