Compal LA-2051 DFL10 Sapporo XA, Satellite A30 Schematic

A
B
COMPAL CONFIDENTIAL
C
D
E
1 1
MODEL NAME : COMPAL P/N : PCB NO : Revision :
2 2
LA-2051
0.1A
Sapporo XA
DFL10
Sapporo XA Schematics Document uFCBGA/uFCPGA NorthWood MT
2003 8 27 v0.1A
3 3
4 4
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Size Do cum e nt Number R e v
LA-2051
Dat e : Sheet
Com pal Electronics, Inc.
Cover Sheet
期四 八月
of
151¬P , 28, 2003
E
A
B
C
D
E
Compal confidential
Block Diagram
Model : DFL10 LA-2051
1 1
Fan Control 1
+12VALW +5VALW
Fan Control 2
+12VALW +5VALW
page 37
page 37
CPU B ypass
page 6
+1.2VP +CPU_CORE
TV OUT Connector
+3VS
CRT Connector
+5VS +3VS
2 2
LVDS Conn e ctor
B+
page 17
page 18
page 18
CRT Signal
LVDS Signal
+1.5VS +2.5V +3VS +CPU_CORE
USB2.0 CTRL.
NEC uPD720101
page 24
+3VS 33MHz
IDSEL:AD18 PIRQC#
Minipci CONN
WIRELESS & Dubug
+3V +3VS +5VS
3 3
page 25
+3V +2.5VLAN
IDSEL:AD19 PIRQD#
LAN RTL 8101L
page 22
RJ45
page 23
IDSEL:AD20 PIRQB#
CardBus
CB1410
+3V +3VS
PWR Controller & Slot
+12VALW +5VALW +3VALW
page 20
page 21
+3V +3VS
1394 Conn.
PCI BUS
IDSEL:AD16 PIRQA#
IEEE 1394
TSB43AB21
page 19
page 19
Super I/O
LPC47N217
On/Off BTN & User Keys
+3VALW
page 37
Power Circuit DC/DC
4 4
page 40
A
SW Bo ard Conn
+5VALW
RTC Batt.
page 37
page 37
DC/DC Interface Suspend
page 36
B
+3VS
Parallel
+5VS
page 34
Debug COM Port
+5V
page 34
FIR
+3VS
page 34
Nort hWood-MT -- 533
Prescot t -MT -- 533 Celeron-MT -- 400
uFCPGA CPU
System Bus
400/533 MHz
ATI RC300ML
718 pin u-BGA
A LINK
+1.5VS 66MHz
+3VS +3VALW +1.5VS +1.5VALW +CPU_CORE VCC5REF VCC5REFSUS
ATI IXP150 457 BGA
LPC BUS
page 34
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS
478pin
page 4,5,6
HD#(0..63)HA#( 3..31)
page 7,8,9,10,11,12
page 26,27,28,29
+3VS 33MHz
Embedded Controller
NS PC87591L
+3VS +3VALW
EC DEBUG & Int. KB
+5VALW
C
+3VALW
+3VALW +5VALW
LID SW & Kill SW
+3VALW
+5VS
page 31
page 31
BIOS & Ext. IO
page 32
page 31
Touch Pad
page 31
LID Hibernation
+RTC_VREF
page 39
Therm al Sensor
ADM1032AR
+5VS +3VS
page 6
Memory BUS(DDR)
48MHz
24.576MHz
IDE HDD
+5VS
+2.5V 333MHz
USB 2.0/1.1
AC-LINK
ATA100
IDE ODD
+5VCD
page 30
PIDE IRQ15SIDE IRQ14
D
Clock Generator
ICS951 402AGT
page 30
AMP TPA0232
+5VALW
INT. Speaker
page 33
Title
Size Docu ment Number Re v
Date: Sheet
page 16
DDR-DIMM X2
BANK 0, 1, 2, 3
+2.5V +1.25VS
page 13,14,15
+5V
AC97 Codec
ALC202A
+5VALW -> +VDDA +3VS
page 33
HeadPhone
+AUD_VREF
page 33
LA-2051
星期三 八月
page32
Compa l Electronics, Inc.
Block Di agram
27, 2003
USB Ports X3 ( X1 reserve )
page 27
MDC
+5VS +3VS +3V
page 23
RJ11
Cable
MIC Phone
+5VDDA
LINE IN
+5VDDA
E
Cable
page 33
251,
0.1A
of
5
4
3
2
1
Power Managment table
Voltage Rails
Power Plane
VIN
D D
C C
B+
+CPU _CORE Core voltage for CPU +1.2V +1.25VS +1.5VS +1.8VS +2.5VALW +2.5V +2.5VS +3VALW +3V 3.3V system power rail for SB,LAN,CardReader and HUB. +3VS OFF
+5V 5V system power rail . +5VS +12VALW RTCVCC ON
Description
Adapte r power supply (19V) AC or battery power rail for power circuit.
The vo l tage f or Processor VID select
1.25V switched powe r r a il for DDR Vtt
1.5V I/O power rail for ATI-RS300M/RC300M NB AGP.
1.8V swit c he d p o we r ra il for ATI-RS300M/RC300M NB.
2.5V always on power rail
2.5V system power rail for DDR
2.5V switched power rail
3.3V always on power rail
3.3V switched power rail
5V switched power rail OFF 12V always on power rail RTC power
S0-S1
S3
S5
N/A
N/AONN/A
N/A
N/A
N/A ON
OFF
OFF
ON
ON ON
ON
ON ON ON ON ON ON ON ON OFF ON
ON
OFF
OFF OFF OFF OFF
OFF
OFF
OFF
OFF
ONON
ON*
ON
OFF
OFF
OFF ON*
ON
OFF
ON
OFF
ON
ON*+5VALW 5V always on power rail
OFF ONON
ON*
ON
Signal
State
S0
S1
S3
S5 S4/AC
S5 S4/AC don't exist
+3VALW +5VALW +12VALW
ON
ON ON ON
ON ON
ON OFF
OFF OFF OFF
+5V +3V +2.5V
ON ON
+2.5VS +1.8VS +5VS +3VS +1.5VS +CPU_CORE +1.25VS
OFF
OFF
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Board I D Ta ble f or AD c hanne l
Vcc 3.3V +/- 5%
External PCI Devices
Board ID
IDSEL # PIRQREQ/GNT #DEVICE
NB Internal VGA AGP BUS SOUTHBRIDGE USB
B B
AC97 ATA 100 ETHERNET 1394
LAN CARD BUS Wireless LAN(MINI PCI)
N/A AGP_DE VSEL AD31 ( INT .) AD30 ( INT .) AD31 ( INT .) AD31 ( INT .) AD24(INT.) AD16 AD19 AD20 AD18
N/A N/A N/A N/A N/A N/A N/A 0 1 2 3
A A
N/A
D B A C A D A C
0 1 2 3 4 5 6 7 NC
100K +/- 5%Ra
Rb V min
0
8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%
Board ID
0
AD_BID
0 V
Vtyp
AD_BID
0 V 0 V
V
AD_BID
max
0.216 V 0.250 V 0.289 V
0.436 V
0.712 V
1.036 V
0.503 V
0.819 V
0.538 V
0.875 V
1.185 V 1 .264 V
1.453 V 1.650 V 1.759 V
1.935 V
2.500 V
2.200 V
3.300 V
2.341 V
3.300 V
PCB Revision
0.1
1
EXT USB AD23(EXT.) 4 A,C,D
2 3
EC SM Bus1 address
Device Address Address
Smart Battery EEPROM(24C16)
A A
I2C / S MB U S ADDRESSING
1010 000X b
EC SM Bus2 address
Device
ADM1032
1001 100X b0001 011X b
DEVICE HEX ADDRESS
DDR SO-DIMM 0 DDR SO-DIMM 1 CLOCK GENERATOR (EXT.)
5
A2 D2
1 0 1 0 0 0 0 XA0 1 0 1 0 0 0 1 X 1 1 0 1 0 0 1 X
4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
4 5 6 7
Title
Size Do cum e nt Number R e v
2
Dat e : Sheet
Compal Electronics, Inc.
Note & Revision LA-2051
期三 八月
1
of
351¬P , 27, 2003
5
D D
A10
A12
A14
A16
A18
JCPU1A
HA#[3..31]7 HD#[0..63] 7
C C
H_REQ#[0..4]7
+CPU_CORE
+CPU_CORE
B B
H_REQ#[0..4]
H_ADS#7
R4 56_0402_5%
1 2
R36 51_0402_5%
1 2
H_BREQ0#7
H_BPRI#7 H_BNR#7 H_LOCK#7
CLK_CPU_BCLK16 CLK_CPU_BCLK#16
H_HIT#7 H_HITM#7
H_DEFER#7
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_ADS#
CLK_CPU_BCLK CLK_CPU_BCLK#
FOX_PZ47803-274A-42_Prescott
AB1
AC1 AA3
AC3
AF22 AF23
K2 K4 L6 K1 L3
M6
L2 M3 M4 N1 M1 N2 N4 N5
T1 R2
P3
P4 R3
T2 U1
P6 U3
T4
V2 R6
W1
T5 U4
V3
W2
Y1
J1
K5
J4
J3 H3 G1
V5
H6 D2 G2 G4
F3 E3 E2
A#3 A#4 A#5 A#6 A#7 A#8 A#9 A#10 A#11 A#12 A#13 A#14 A#15 A#16 A#17 A#18 A#19 A#20 A#21 A#22 A#23 A#24 A#25 A#26 A#27 A#28 A#29 A#30 A#31 A#32 A#33 A#34 A#35
REQ#0 REQ#1 REQ#2 REQ#3 REQ#4 ADS#
AP#0 AP#1 BINIT# IERR#
BR0# BPRI# BNR# LOCK#
BCLK0 BCLK1
CON
HIT#
TROL
HITM# DEFER#
A20
VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
HOST ADDR
CONTROL
CLK
VSS_0H1VSS_1H4VSS_2
H23
H26
4
AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
VCC_5
VCC_6A8VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
POWER
Northwood-MT Prescott-MT
GND
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12A3VSS_13A9VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
A11
A13
A15
A17
A19
A21
A24
A26
AA1
AA11
AA13
AA4
AA7
AA15
AA17
AA9
AA19
AA23
AA26
AB10
AB12
AB3
AB6
AB14
AB16
AB18
AB8
AB20
AB21
AB24
3
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19
C10
C12
C14
C16
C18
C20
D11
D13
D15
D17
D19
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56B7VCC_57B9VCC_58
VCC_59
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65C8VCC_66
VCC_67
VCC_68
VCC_69
HOST ADDR
POWER
VCC_78
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
AC2
AC5
AC7
AC11
AC13
AC15
AC17
AC19
AC9
AC22
AC25
AD10
AD12
AD14
AD16
AD18
BOOTSELECT
VSS_52
VSS_53
VSS_54
VSS_55
VCC_81
F13
AD1
AD4
AD8
AD21
AD23
VCC_79E8VCC_80
VCC_82
VCC_83
VCC_84
VCC_85
F9
F11
F15
F17
F19
E18
E20
VCC_70
VCC_77
E16
D9
VCC_71D7VCC_72
VCC_76
E14
E10
VCC_75
E12
2
+CPU_CORE
VCC_73
D#10 D#11 D#12 D#13 D#14 D#15 D#16 D#17 D#18 D#19 D#20 D#21 D#22 D#23 D#24 D#25 D#26 D#27 D#28 D#29 D#30 D#31 D#32 D#33 D#34 D#35 D#36 D#37 D#38 D#39 D#40 D#41 D#42 D#43 D#44 D#45 D#46 D#47 D#48 D#49 D#50 D#51 D#52 D#53 D#54 D#55 D#56 D#57 D#58 D#59 D#60 D#61 D#62 D#63
VCC_74
+CPU_CORE
D#0 D#1 D#2 D#3 D#4 D#5 D#6 D#7 D#8 D#9
B21 B22 A23 A25 C21 D22 B24 C23 C24 B25 G22 H21 C26 D23 J21 D25 H22 E24 G23 F23 F24 E25 F26 D26 L21 G26 H24 M21 L22 J24 K23 H25 M23 N22 P21 M24 N23 M26 N26 N25 R21 P24 R25 R24 T26 T25 T22 T23 U26 U24 U23 V25 U21 V22 V24 W26 Y26 W25 Y23 Y24 Y21 AA25 AA22 AA24
HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63
1
HD#[0..63]HA#[3..31]
BOOTSELECT
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
3
0_0402_5%
12
R8
Compal Electronics, Inc.
Title
Prescott / P4 uFCPGA (1/2)
Size Do cum e nt Number R e v
LA-2051
Custom
2
Dat e : Sheet
期三 八月
451¬P , 27, 2003
1
of
5
JCPU1B
+CPU_CORE
1 2
R56 51_0402_5%
D D
1 2
R59 51_0402_5%
1 2
R47 51_0402_5%
1 2
R46 51_0402_5%
1 2
R55 51_0402_5%
1 2
R57 51_0402_5%
+CPU_CORE
R2 150_0402_5%
R51 39.2_0603_1%
C C
B B
1 2
R586 75_0402_5%
R43 680_0402_5%
R52 27.4_0603_1%
+CPU_CORE
L27
1 2
LQG21F4R7N00_0805
1 2
LQG21F4R7N00_0805
L26
@33U_D2_8M_R35
ITP_BPM#0 ITP_BPM#1 ITP_BPM#2 ITP_BPM#3 ITP_BPM#4 ITP_BPM#5
ITP_TDI
12
ITP_TMS
12
ITP_TDO
ITP_TRST#
12
ITP_TCK
12
C423
H_RS#[0..2]7
1
1
+
2
2
CLK_CPU_ITP16 CLK_CPU_ITP#16
Comp0/1 need keep 25 mils trace width
+CPU_CORE
Place near SB200
R560 56_0402_5%
1 2
R1 56_0402_5%
1 2
R66 56_0402_5%
1 2
A A
1 2
R64 300_0402_5%
H_FERR#
Place near CPU
H_THERMTRIP#
H_RESET#
H_PW RGD
PM_STPCPU#10,16,26,47
5
H_TRDY#7
H_A20M#26
H_FERR#26 H_IGNNE#26 H_SMI#26 H_PWRGD26 H_STPCLK#26
H_INTR26 H_NMI26 H_INIT#26 H_RESET#7,26
H_DBSY#7
H_DRDY#7
BSEL012,16
BSEL112,16
H_THERMDA6 H_THERMDC6
H_THERMTRIP#6
+
C422 33U_D2_8M_R35
H_RS#[0..2]
H_THERMTRIP#
VCCIOPLL
VCCA
VCCSENSE47 VSSSENSE47
1 2
+1.2V
R587 0_0402_5%
VSSA
1 2
R96 51.1_0603_1%
1 2
R11 51.1_0603_1%
If CPU is P4 , Change the resistor R539,R540 value to
51.1_0603_1%,or prescott
61.9 _0603_1%
R7
1 2
4.7K_0402_5%
2
H_RS#0 H_RS#1 H_RS#2
H_TRDY#
H_A20M# H_FERR# H_IGNNE# H_SMI# H_PW RGD H_STPCLK#
H_INTR H_NMI H_INIT# H_RESET#
H_DBSY# H_DRDY# BSEL0 BSEL1
H_THERMDA H_THERMDC
ITP_BPM#0 ITP_BPM#1 ITP_BPM#2 ITP_BPM#3 ITP_BPM#4 ITP_BPM#5
ITP_TCK ITP_TDI ITP_TDO ITP_TMS ITP_TRST#
VCCSENSE VSSSENSE
COMP0
COMP1
+3VS
12
Q2 MMBT3904_SOT23
3 1
F1
G5
F4
AB2
J6
C6 B6 B2 B5
AB23
Y4 D1
E5
W5
AB25
H5
H2 AD6 AD5
B3
C4
A2
AC6 AB5 AC4
Y6 AA5 AB4
D4
C1
D5
F7
E6
AD20 AE23
A5
A4 AF3
AD22
AC26 AD26
L24
P1
R9
4.7K_0402_5%
2
3 1
4
GND
AE11
AE13
VSS_57
RS#0 RS#1 RS#2 RSP# TRDY#
A20M# FERR# IGNNE# SMI# PWRGOOD STPCLK#
LINT0 LINT1 INIT# RESET#
DBSY# DRDY# BSEL0 BSEL1
THERMDA THERMDC
THERMTRIP#
BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5
TCK TDI TDO TMS TRST#
VCCIOPLL VCCA
VCCSENSE VSSSENSE VCCVIDLB
VSSA
ITP_CLK0 ITP_CLK1
COMP0 COMP1
VSS_58
CON TROL
LEGACY
ITP CLK
VSS_129F8VSS_130
G21
H_DPSLPR#
Q1 MMBT3904_SOT23
4
AE15
AE17
AE19
AE22
AE24
AE7
AE9
AF1
AF10
AF12
AF14
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
MISC
THER MAL
MISC
ITP
MISC
VSS_131
VSS_132G3VSS_133G6VSS_134J2VSS_135
VSS_136
VSS_137J5VSS_138
VSS_139
VSS_140K3VSS_141K6VSS_142L1VSS_143
J22
J25
K21
G24
FOX_PZ47803-274A-42_Prescott
K24
3
AF16
AF18
AF20
AF6
AF8
B10
B12
B14
B16
B18
B20
B23
B26
C11
C13
C15
C17
C19
C22
C25
D10
D12
D14
D16
D18
D20
D21
D24
E11
E13
E15
E17
E19
E23
E26
VSS_70
VSS_71
VSS_72
VSS_73
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85B4VSS_86B8VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92C2VSS_93
VSS_94
VSS_95C5VSS_96C7VSS_97C9VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106D3VSS_107D6VSS_108D8VSS_109E1VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117E4VSS_118E7VSS_119E9VSS_120
GROUND
Northwood-MT Prescott-MT
GROUND MISC
VID0
VID1
VID2
AE5
AE4
AE3
AE2
CPU_VID2
CPU_VID0
CPU_VID1
CPU_VID3
L23
VSS_144
L26
VSS_145L4VSS_146M2VSS_147
M22
VSS_148
VSS_149M5VSS_150
VSS_151
VSS_152N3VSS_153N6VSS_154P2VSS_155
VSS_156
VSS_157P5VSS_158R1VSS_159
VSS_160
VSS_161R4VSS_162
VSS_163
VSS_164T3VSS_165T6VSS_166U2VSS_167
VSS_168
VSS_169U5VSS_170V1VSS_171
VSS_172
VSS_173V4VSS_174
VSS_175
VSS_176W3VSS_177W6VSS_178Y2VSS_179
VSS_180
VSS_181
T21
P22
N21
M25
P25
N24
Reserve for EMI. Near CPU.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
T24
R23
R26
3
V23
V26
U22
U25
+3VS
W21
W24
10K_1206_8P4R_5% RP1
1 8 2 7 3 6 4 5
R6 10K_0402_5%
1 2
R5 10K_0402_5%
1 2
CPU_VID[0..5]47
Y5
Y22
Y25
VID3
CPU_VID4
AE1
VID4
F10
AD3
CPU_VID5
F12
VID5
VSS_121
2
F14
F16
F18
VSS_122
VSS_123
VSS_124
VIDPWRGD
AD2
2
R403 @33_0402_5%
AF26
F22
F25
F5
VSS_125F2VSS_126
VSS_127
VSS_128
SKTOCC#
GTLREF0 GTLREF1 GTLREF2
REF
ITP
DATA
ADDR
GTLREF3
OPTIMIZED/COMPAT#
TESTHI0 TESTHI1 TESTHI2 TESTHI3 TESTHI4 TESTHI5 TESTHI6 TESTHI7 TESTHI8
TESTHI9 TESTHI10 TESTHI11 TESTHI12
DSTBN#0 DSTBN#1 DSTBN#2 DSTBN#3
DSTBP#0 DSTBP#1 DSTBP#2 DSTBP#3
ADSTB#0 ADSTB#1
DATA
MISC
Pop: Prescott Depop: Northwood
PROCHOT#
VCCVID
AF4
R12 @2.43K_0603_1%
MCERR#
1
H_SKTOCC#
DP#0 DP#1 DP#2 DP#3
DBI#0 DBI#1 DBI#2 DBI#3
DBR#
SLP#
NC1 NC2 NC3 NC4 NC5
J26 K25 K26 L25
AA21 AA6 F20 F6
AE26
AD24 AA2 AC21 AC20 AC24 AC23 AA20 AB22 U6 W4 Y3 A6 AD25
E22 K22 R22 W22
F21 J23 P23 W23
L5 R5
E21 G25 P26 V21
AE25
C3 V6 AB26
A22 A7 AF25 AF24 AE21
12
H_GHI# H_DPSLPR#
H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3
H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3
H_ADSTB#0 H_ADSTB#1
H_DBI#0 H_DBI#1 H_DBI#2 H_DBI#3
H_GHI#
1 2
0_0402_5%
+H_GTLREF
C47
1 2
220P_0603_50V8J
R_G
R404 0_0402_5%
1 2
1 2
R408 56_0402_5%
1 2
R409 56_0402_5%
1 2 1 2 1 2 1 2 1 2 1 2 1 2
H_DSTBN#[0..3]
H_DSTBP#[0..3]
H_DBI#[0..3]
12
R410 150_0402_5%
1 2
R10 100K_0402_1%
H_PROCHOT# H_SLP#
GTL Ref e r e n c e V o l tage
R42
R58 56_0402_5% R60 56_0402_5% R38 56_0402_5% R45 56_0402_5% R39 56_0402_5% R35 300_0402_5% R405 56_0402_5%
H_DSTBN#[0..3] 7
H_DSTBP#[0..3] 7
H_ADSTB#0 7 H_ADSTB#1 7
H_DBI#[0..3] 7
+3VALW
+CPU_CORE
H_PROCHOT# 26,46
H_SLP# 26
CPU_GHI# 27
+CPU_CORE
Layout note :
1. Place R_A and R_B near CPU (With in 1. 5").
+1.2V
1
C1
0.1U_0402_10V6K
2
12
+1.2V
H_VID_PWRGD 38
Compal Electronics, Inc.
Title
Prescott / P4 uFCPGA & Thermal sensor (2/2)
Size Do cum e nt Number R e v
LA-2051
Custom Dat e : Sheet
期三 八月
+CPU_CORE
12
R74
49.9_0603_1%
12
R67 100_0603_1%
+H_GTLREF
1
C50 1U_0603_6.3V6M
2
of
551¬P , 27, 2003
1
A
Layout n ote :
1 1
+CPU_CORE
2 2
+CPU_CORE
Place close to CPU, Use 2~3 vias per PAD. Place 22uF caps x31 pcs, populated 14pcs.
1
C396 22U_1206_6.3V6M
2
1
C384 22U_1206_6.3V6M
2
B
1
C388 22U_1206_6.3V6M
2
1
C380 22U_1206_6.3V6M
2
C
Place on CPU inside
1
C383 22U_1206_6.3V6M
2
1
C398 22U_1206_6.3V6M
2
1
C379 22U_1206_6.3V6M
2
1
C390 22U_1206_6.3V6M
2
1
C397 22U_1206_6.3V6M
2
1
C385 22U_1206_6.3V6M
2
D
1
C389 22U_1206_6.3V6M
2
1
C381 22U_1206_6.3V6M
2
E
Layout n ote :
Place close to CPU power and ground pin as possible (<1inch)
For Desktop's CPU:
470uFx15/12mOhm H=1.8 each Total 0.923m ohm
F
+CPU_CORE
+CPU_CORE
+CPU_CORE
1
+
2
1
+
2
1
+
2
G
C377 470U_D4_2.5VM
C407 470U_D4_2.5VM
C40 470U_D4_2.5VM
1
+
2
1
+
2
1
+
2
C382 470U_D2_2.5VM
C419 470U_D4_2.5VM
C48 470U_D4_2.5VM
H
1
+
2
1
+
2
1
+
2
C392 @470U_D4_2.5VM
C30 470U_D4_2.5VM
C58 470U_D4_2.5VM
+
+
1
+
2
I
1
C401 470U_D4_2.5VM
2
1
C33 470U_D4_2.5VM
2
C65 470U_D4_2.5VM
1
+
2
1
+
2
C404 470U_D4_2.5VM
C36 470U_D4_2.5VM
J
3 3
+CPU_CORE
1
C409 22U_1206_6.3V6M
2
4 4
+CPU_CORE
1
2
C412 22U_1206_6.3V6M
5 5
+CPU_CORE
1
C21 22U_1206_6.3V6M
2
+CPU_CORE
6 6
1
C74 22U_1206_6.3V6M
2
Please place these cap on the socket north side
1
C413 22U_1206_6.3V6M
2
1
C408 22U_1206_6.3V6M
2
1
C414 22U_1206_6.3V6M
2
1
C418 22U_1206_6.3V6M
2
1
C415 22U_1206_6.3V6M
2
1
C410 22U_1206_6.3V6M
2
Please place these cap on the socket sourth side
1
C22 22U_1206_6.3V6M
2
1
C75 22U_1206_6.3V6M
2
1
C23 22U_1206_6.3V6M
2
1
C20 22U_1206_6.3V6M
2
1
C19 22U_1206_6.3V6M
2
1
C416 22U_1206_6.3V6M
2
1
C72 22U_1206_6.3V6M
2
1
C411 22U_1206_6.3V6M
2
1
C417 22U_1206_6.3V6M
2
1
C73 22U_1206_6.3V6M
2
+CPU_CORE
1
C82
@0.22U_0603_10V7K
2
1
C81
@0.22U_0603_10V7K
2
+CPU_CORE
H_THERMTRIP#5 MAINPWON 41,42,44
R3 300_0402_5%
1
C80
@0.22U_0603_10V7K
2
12
H_THERMTRIP#
1
C18
@0.22U_0603_10V7K
2
C2 @1U_0603_10V6K
2SC2411K_SC59
2
Q3
CBE
1
3
12
1
C17
@0.22U_0603_10V7K
2
1
C16
@0.22U_0603_10V7K
2
CPU Temperature Sensor
7 7
H_THERMDA5
8 8
H_THERMDC5
A
H_THERMDA
C39
2200P_0402_50V7K
H_THERMDC
EC_SMC235
EC_SMD235
B
1
2
+3VS
C
R63
1 2
200_0402_5%
U4
2
D+
3
D-
8
SCLK
7
SDATA
ADM1032ARM_RM8
+3VS_VDD
1
C42
0.1U_0402_10V6K
2
VDD1
ALERT#
THERM#
GND
12
R54 10K_0402_5%
1 6 4 5
D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THI S SHEET NOR THE INFORMATION IT CONTAINS
E
F
G
H
Compal Electronics, Inc.
Title
CPU Decoupling CAP.
Size Docu ment Number Re v
LA-2051
Custom Date: Sheet
星期三 八月
27, 2003
I
of
651,
J
0.1A
5
4
3
2
1
HA#[3..31] H_REQ# [0 ..4 ]
HD#[0..63]
U24A
M28
CPU_A3#
P25
CPU_A4#
M25
CPU_A5#
N29
CPU_A6#
N30
CPU_A7#
M26
CPU_A8#
N28
CPU_A9#
P29
CPU_A10#
P26
CPU_A11#
R29
CPU_A12#
P30
CPU_A13#
P28
CPU_A14#
N26
CPU_A15#
N27
CPU_A16#
M29
CPU_REQ0#
N25
CPU_REQ1#
R26
CPU_REQ2#
L28
CPU_REQ3#
L29
CPU_REQ4#
R27
CPU_ADSTB0#
U30
CPU_A17#
T30
CPU_A18#
R28
CPU_A19#
R25
CPU_A20#
U25
CPU_A21#
T28
CPU_A22#
V29
CPU_A23#
T26
CPU_A24#
U29
CPU_A25#
U26
CPU_A26#
V26
CPU_A27#
T25
CPU_A28#
V25
CPU_A29#
U27
CPU_A30#
U28
CPU_A31#
T29
CPU_ADSTB1#
L27
CPU_ADS#
K25
CPU_BNR#
H26
CPU_BPRI#
J27
CPU_DEFER#
L26
CPU_DRDY#
G27
CPU_DBSY#
F25
CPU_BR0#
K26
CPU_LOCK#
A17
CPU_CPURSET#
G25
CPU_RS2#
G26
CPU_RS1#
J25
CPU_RS0#
F26
CPU_TRDY#
J26
CPU_HIT#
H25
CPU_HITM#
A9
CPU_RSET
AH5
SUS_STAT#
AG5
SYSRESET#
C7
POWERGOOD
V28
CPU_COMP_N
W29
CPU_COMP_P
H23
CPVDD
J23
CPVSS
W28
CPU_VREF
Y29
THERMALDIODE_N
Y28
THERMALDIODE_P
B17
TESTMODE
CHS-216IGP9050A21_BGA718
1U_0603_10V6K
1 2
C492
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15
HA#16 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_ADSTB#0
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31 H_ADSTB#1
H_ADS# H_BNR# H_BPRI# H_DEFER# H_DRDY# H_DBSY# H_BREQ0# H_LOCK#
H_RESET# H_RS#2 H_RS#1 H_RS#0
H_TRDY# H_HIT# H_HITM#
COMP_N COMP_P CPVDD CPVSS NB_GTLREF
12
R469
4.7K_0402_5%
D D
H_ADSTB#05
C C
H_ADSTB#15
H_ADS#4
H_BNR#4
H_BPRI#4
H_DEFER#4
H_DRDY#5
H_DBSY#5
H_BREQ0#4
H_LOCK#4
H_RESET#5,26
H_RS#25
SUS_STAT#27
NB_RST#26
NB_PWRGD17
1 2 1 2
L31
1 2
H_RS#15 H_RS#05
H_TRDY#5
H_HIT#4
H_HITM#4
0.1U_0402_10V6K C590
--> 412_0402_1%
Note: PLACE CLOSE TO RC300M,
L
USE 10/10 WIDTH/SPACE
+CPU_CORE
PLACE CLOSE TO U27 Ball W28, USE 20/20
1 2 12
WIDTH/SPACE
1
C433 1U_0603_10V6K
2
1
C441 220P_0402_25V8K
2
C363 CLOSE TO Ball W28
B B
R428
49.9_0603_1%
R429
100_0603_1%
+CPU_CORE
12
R485
1 2
330_0402_5%
R437 24.9_0402_1% R436 49.9_0402_1%
+1.8VS
HB-1M2012-121JT03_0805
HA#[3..31] 4 H_REQ#[0..4 ] 4 HD#[0 ..6 3 ] 4
HD#0
L30
CPU_D0# CPU_D1# CPU_D2# CPU_D3# CPU_D4# CPU_D5# CPU_D6# CPU_D7# CPU_D8#
PART 1 OF 6
CPU_D9# CPU_D10# CPU_D11#
DATA GROUP 0DATA GROUP 1DATA GROUP 2DATA GROUP 3
CPU_D12# CPU_D13# CPU_D14# CPU_D15#
CPU_DBI0#
CPU_DSTBN0#
CPU_DSTBP0#
CPU_D16# CPU_D17# CPU_D18# CPU_D19# CPU_D20# CPU_D21# CPU_D22# CPU_D23# CPU_D24# CPU_D25# CPU_D26# CPU_D27# CPU_D28# CPU_D29# CPU_D30# CPU_D31#
MISC.
CPU_DSTBN1#
CPU_DSTBP1#
AGTL+ I/F
PENTIUM
IV
CPU_DSTBN2#
CPU_DSTBP2#
CPU_DSTBN3#
CPU_DSTBP3#
CPU_DBI1#
CPU_D32# CPU_D33# CPU_D34# CPU_D35# CPU_D36# CPU_D37# CPU_D38# CPU_D39# CPU_D40# CPU_D41# CPU_D42# CPU_D43# CPU_D44# CPU_D45# CPU_D46# CPU_D47#
CPU_DBI2#
CPU_D48# CPU_D49# CPU_D50# CPU_D51# CPU_D52# CPU_D53# CPU_D54# CPU_D55# CPU_D56# CPU_D57# CPU_D58# CPU_D59# CPU_D60# CPU_D61# CPU_D62# CPU_D63#
CPU_DBI3#
ADDR. GROUP 1 ADDR. GROUP 0CONTROL
HD#1
K29
HD#2
J29
HD#3
H28
HD#4
K28
HD#5
K30
HD#6
H29
HD#7
J28
HD#8
F28
HD#9
H30
HD#10
E30
HD#11
D29
HD#12
G28
HD#13
E29
HD#14
D30
HD#15
F29
H_DBI#0
E28
H_DSTBN#0
G30
H_DSTBP#0
G29
HD#16
B26
HD#17
C30
HD#18
A27
HD#19
B29
HD#20
C28
HD#21
C29
HD#22
B28
HD#23
D28
HD#24
D26
HD#25
B27
HD#26
C26
HD#27
E25
HD#28
E26
HD#29
A26
HD#30
B25
HD#31
C25
H_DBI#1
A28
H_DSTBN#1
D27
H_DSTBP#1
E27
HD#32
F24
HD#33
D24
HD#34
E23
HD#35
E24
HD#36
F23
HD#37
C24
HD#38
B24
HD#39
A24
HD#40
F21
HD#41
A23
HD#42
B23
HD#43
C22
HD#44
B22
HD#45
C21
HD#46
E21
HD#47
D22
H_DBI#2
D23
H_DSTBN#2
E22
H_DSTBP#2
F22
HD#48
B21
HD#49
F20
HD#50
A21
HD#51
C20
HD#52
E20
HD#53
D20
HD#54
A20
HD#55
D19
HD#56
C18
HD#57
B20
HD#58
E18
HD#59
B19
HD#60
D18
HD#61
B18
HD#62
C17
HD#63
A18
H_DBI#3
F19
H_DSTBN#3
E19
H_DSTBP#3
F18
H_DBI#0 5 H_DSTBN#0 5 H_DSTBP#0 5
H_DBI#1 5 H_DSTBN#1 5 H_DSTBP#1 5
H_DBI#2 5 H_DSTBN#2 5 H_DSTBP#2 5
H_DBI#3 5 H_DSTBN#3 5 H_DSTBP#3 5
+CPU_CORE
22U_1206_16V4Z_V1
A A
5
4
C486
0.1U_0402_10V6K
1
1
C541
C525
2
2
0.1U_0402_10V6K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1
C490
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C466
2
1
C465
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
1
C464
2
2
1
C463
2
0.1U_0402_10V6K
1
C507
0.1U_0402_10V6K
2
2
Title
Size Docu ment Number Re v
Date: Sheet
Compa l Electronics, Inc.
ATI RC300M-AGT L+
27, 2003
LA-2051
星期三 八月
of
751,
1
0.1A
5
U24B
DDR_SMA0 DDR_SMA1 DDR_SMA2 DDR_SDQ2 DDR_SMA3 DDR_SMA4
D D
DDR_SBS013 DDR_SBS113 DDR_SMA1513
DDR_SRAS#13 DDR_SCAS#13
DDR_SWE#13
C C
DDR_CLK013
DDR_CLK0#13
DDR_CLK113
DDR_CLK1#13
DDR_CLK314
DDR_CLK3#14
DDR_CLK414
DDR_CLK4#14
DDR_CKE013,14 DDR_CKE113,14 DDR_CKE214 DDR_CKE314
DDR_SCS#013,14 DDR_SCS#113,14 DDR_SCS#214 DDR_SCS#314
L34
B B
+1.8VS
1 2
HB-1M2012-121JT03_0805
DDR_SMA5 DDR_SMA6 DDR_SMA7 DDR_SMA8 DDR_SMA9 DDR_SMA10 DDR_SMA11 DDR_SMA12
DDR_SDM0 DDR_SDM1 DDR_SDM2 DDR_SDM3 DDR_SDM4 DDR_SDM5
DDR_SDM7
DDR_SRAS# DDR_SCAS#
DDR_SWE# DDR_SDQS0
DDR_SDQS1 DDR_SDQS2 DDR_SDQS3 DDR_SDQS4 DDR_SDQS5 DDR_SDQS6 DDR_SDQS7
DDR_CLK0 DDR_CLK0#
DDR_CLK1 DDR_CLK1#
DDR_CLK3 DDR_CLK3#
DDR_CLK4 DDR_CLK4#
DDR_CKE0 DDR_CKE1 DDR_CKE2 DDR_CKE3
DDR_SCS#0 DDR_SCS#1 DDR_SCS#2 DDR_SCS#3
MPVDD
C516
MPVSS
1 2
1U_0603_10V6K
AH19
AJ17 AK17 AH16 AK16
AF17 AE18
AF16 AE17 AE16
AJ20 AG15
AF15 AE23 AH20 AE25
AH7 AF10 AJ14 AF21
AH23 AK28 AD29 AB26
AF24 AF25
AE24
AH13 AE21
AJ23 AJ27
AC28 AA25
AK10 AH10
AH18
AJ19
AG30 AG29
AK11
AJ11
AH17
AJ18 AF28
AG28
AF13
AE13 AG14
AF14
AH26 AH27
AF26
AG27 AC18
AD18
AJ8 AF9
PART 2 OF 6
MEM_A0 MEM_A1 MEM_A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11 MEM_A12 MEM_A13 MEM_A14 MEM_A15
MEM_DM0 MEM_DM1 MEM_DM2 MEM_DM3 MEM_DM4 MEM_DM5 MEM_DM6 MEM_DM7
MEM_RAS# MEM_CAS#
MEM_WE# MEM_DQS0
MEM_DQS1 MEM_DQS2 MEM_DQS3 MEM_DQS4 MEM_DQS5 MEM_DQS6 MEM_DQS7
MEM_CK0 MEM_CK0#
MEM_CK1 MEM_CK1#
MEM_CK2 MEM_CK2#
MEM_CK3 MEM_CK3#
MEM_CK4 MEM_CK4#
MEM_CK5 MEM_CK5#
MEM_CKE0 MEM_CKE1 MEM_CKE2 MEM_CKE3
MEM_CS#0 MEM_CS#1 MEM_CS#2 MEM_CS#3
MPVDD
MPVSS
CHS-216IGP9050A21_BGA718
4
MEM_DQ0 MEM_DQ1 MEM_DQ2 MEM_DQ3 MEM_DQ4 MEM_DQ5 MEM_DQ6 MEM_DQ7 MEM_DQ8
MEM_DQ9 MEM_DQ10 MEM_DQ11 MEM_DQ12 MEM_DQ13 MEM_DQ14 MEM_DQ15 MEM_DQ16 MEM_DQ17 MEM_DQ18 MEM_DQ19 MEM_DQ20 MEM_DQ21 MEM_DQ22 MEM_DQ23 MEM_DQ24 MEM_DQ25 MEM_DQ26 MEM_DQ27 MEM_DQ28 MEM_DQ29 MEM_DQ30 MEM_DQ31 MEM_DQ32 MEM_DQ33 MEM_DQ34 MEM_DQ35 MEM_DQ36 MEM_DQ37 MEM_DQ38 MEM_DQ39
MEM I/F
MEM_DQ40 MEM_DQ41 MEM_DQ42 MEM_DQ43 MEM_DQ44 MEM_DQ45 MEM_DQ46 MEM_DQ47 MEM_DQ48 MEM_DQ49 MEM_DQ50 MEM_DQ51 MEM_DQ52 MEM_DQ53 MEM_DQ54 MEM_DQ55 MEM_DQ56 MEM_DQ57 MEM_DQ58 MEM_DQ59 MEM_DQ60 MEM_DQ61 MEM_DQ62 MEM_DQ63
MEM_CAP1 MEM_CAP2
MEM_COMP
MEM_DDRVREF
0.1U_0402_10V6K
DDR_SDQ0
AG6
DDR_SDQ1
AJ7 AJ9
DDR_SDQ3
AJ10
DDR_SDQ4
AJ6
DDR_SDQ5
AH6
DDR_SDQ6
AH8
DDR_SDQ7
AH9
DDR_SDQ8
AE7
DDR_SDQ9
AE8
DDR_SDQ10
AE12
DDR_SDQ11
AF12
DDR_SDQ12
AF7
DDR_SDQ13
AF8
DDR_SDQ14
AE11
DDR_SDQ15
AF11
DDR_SDQ16
AJ12
DDR_SDQ17
AH12
DDR_SDQ18
AH14
DDR_SDQ19
AH15
DDR_SDQ20
AH11
DDR_SDQ21
AJ13
DDR_SDQ22
AJ15
DDR_SDQ23DDR_SDM6
AJ16
DDR_SDQ24
AF18
DDR_SDQ25
AG20
DDR_SDQ26
AG21
DDR_SDQ27
AF22
DDR_SDQ28
AF19
DDR_SDQ29
AF20
DDR_SDQ30
AE22
DDR_SDQ31
AF23
DDR_SDQ32
AJ21
DDR_SDQ33
AJ22
DDR_SDQ34
AJ24
DDR_SDQ35
AK25
DDR_SDQ36
AH21
DDR_SDQ37
AH22
DDR_SDQ38
AH24
DDR_SDQ39
AJ25
DDR_SDQ40
AK26
DDR_SDQ41
AK27
DDR_SDQ42
AJ28
DDR_SDQ43
AH29
DDR_SDQ44
AH25
DDR_SDQ45
AJ26
DDR_SDQ46
AJ29
DDR_SDQ47
AH30
DDR_SDQ48
AF29
DDR_SDQ49
AE29
DDR_SDQ50
AB28
DDR_SDQ51
AA28
DDR_SDQ52
AE28
DDR_SDQ53
AD28
DDR_SDQ54
AC29
DDR_SDQ55
AB29
DDR_SDQ56
AC26
DDR_SDQ57
AB25
DDR_SDQ58
Y26
DDR_SDQ59
W26
DDR_SDQ60
AE26
DDR_SDQ61
AD26
DDR_SDQ62
AA26
DDR_SDQ63
Y27
C645 0.47U_0603_16V7K
1 2
AF6
C432 0.47U_0603_16V7K
AA29
1 2
MEN_COMP
AK19
AK20
C489
R468 49.9_0402_1%
+SDREF
2
1
1 2
3
DDR_SDM[0..7]
DDR_SDQ[0..63]
DDR _ S DQS[0..7]
DDR_SMA[0..12]
DDR_SDM[0..7] 13
DDR_SDQ[0..63] 13
DDR_SD QS [0 ..7 ] 13
DDR_SMA[0..12] 13
2
1
+2.5V
A A
0.1U_0402_10V6K
C547
1
2
@0.1U_0402_10V6K
1
C475
2
@0.1U_0402_10V6K
5
C572
1
C450
2
@0.1U_0402_10V6K
1
1
2
C600 @0.1U_0402_10V6K
2
Title
Size Docu ment Number Re v
4
3
2
Date: Sheet
Compa l Electronics, Inc.
ATI RC300M-DDR I/F
27, 2003
LA-2051
星期三 八月
0.1A
of
851,
1
5
A_PAR12,26
A_STROBE#26
A_ACAT#26
A_END#26
PCI_PIRQA#19,20,24,26
+1.5VS
12
AGPREF_8X
12
1
+
C506
2
0.1U_0402_10V6K
1
+
C523
2
0.1U_0402_10V6K
A_AD[0..31] A_CBE#[0..3]
R517 0_0402_5%
A_DEVSEL#26
A_OFF#26
A_SBREQ#26 A_SBGNT#26
+3VS
+1.5VS
R523
1 2
0.1U_0402_10V6K
1
C540
2
0.1U_0402_10V6K
1
1
C508
2
2
5
@52.3_0603_1%
Ra
AGP8X_DET#
1
2
0.1U_0402_10V6K
0.1U_0402_10V6K
R529 1K_0402_1%
R533 1K_0402_1%
1 2
1 2
AGPREF_8X
C530
1
C565
2
A_AD0 A_AD1 A_AD2 A_AD3 A_AD4 A_AD5 A_AD6 A_AD7 A_AD8 A_AD9 A_AD10 A_AD11 A_AD12 A_AD13 A_AD14 A_AD15 A_AD16 A_AD17 A_AD18 A_AD19 A_AD20 A_AD21 A_AD22 A_AD23 A_AD24 A_AD25 A_AD26 A_AD27 A_AD28 A_AD29 A_AD30 A_AD31
A_CBE#0 A_CBE#1 A_CBE#2 A_CBE#3
A_PAR A_STROBE# A_ACAT# A_END#
A_DEVSEL# A_OFF#
A_SBREQ# A_SBGNT#
8.2K_0402_5%
AGP8X_DET#
C615
1 2
0.1U_0402_10V6K
AGP_COMP
+3VS
R504 @47K_0402
1 2
0.1U_0402_10V6K
1
C524
2
0.1U_0402_10V6K
1
C548
2
AK5 AJ5 AJ4
AH4
AJ3
AJ2 AH2 AH1 AG2 AG1 AG3
AF3
AF1
AF2
AF4
AE3
AE4
AE5
AE6 AC2 AC4
AB3
AB2
AB5
AB6
AA2
AA4
AA5
AA6
Y3 Y5 Y6
AG4
AE2 AC3
AA3 AD5
AC6 AC5 AD2
W4 AD3 AD6
W5
W6
R500
V5 V6
K5 K6
M5
J6
J5
1
C513
2
0.1U_0402_10V6K
1
2
U24C
ALINK_AD0 ALINK_AD1 ALINK_AD2 ALINK_AD3 ALINK_AD4 ALINK_AD5 ALINK_AD6 ALINK_AD7 ALINK_AD8 ALINK_AD9 ALINK_AD10 ALINK_AD11 ALINK_AD12 ALINK_AD13 ALINK_AD14 ALINK_AD15 ALINK_AD16 ALINK_AD17 ALINK_AD18 ALINK_AD19 ALINK_AD20 ALINK_AD21 ALINK_AD22 ALINK_AD23 ALINK_AD24 ALINK_AD25 ALINK_AD26 ALINK_AD27 ALINK_AD28 ALINK_AD29 ALINK_AD30 ALINK_AD31
ALINK_CBE#0 ALINK_CBE#1 ALINK_CBE#2 ALINK_CBE#3
PCI_PAR/ALINK_NC PCI_FRAME#/ALINK_STROBE# PCI_IRDY#/ALINK_ACAT# PCI_TRDY#/ALINK_END# INTA# ALINK_DEVSEL# PCI_STOP#/ALINK_OFF#
ALINK_SBREQ# ALINK_SBGNT#
PCI_REQ#0/ALINK_NC PCI_GNT#0/ALINK_NC
AGP2_GNT#/AGP3_GNT AGP2_REQ#/AGP3_REQ
AGP8X_DET# AGP_VREF/TMDS_VREF
AGP_COMP
CHS-216IGP9050A21_BGA718
8X(M9+M10@)
169_0402_1%
Ra
324_0402_1%
Rb
100_0402_1%
Rc
0.1U_0402_10V6K
1
C549
C555
2
0.1U_0402_10V6K
+1.5VS
C564
0.1U_0402_10V6K
A_AD[0..31]12,26
A_CBE#[0..3]12,26
D D
C C
?
B B
Rb
Rc
+1.5VS +3VS
C557
47U_B_6.3VM
+1.5VS
A A
C487
47U_B_6.3VM
4
PART 3 OF 6
PCI Bus 0 / A-Link I/F
0.1U_0402_10V6K
1
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C554
2
4
1
2
1
C529
2
PIR LAYOUT 92.06.23
1
C539
2
0.1U_0402_10V6K
AGP2_SBSTB/AGP3_SBSTBF/NC/LVDS_BLON
AGP2_SBSTB#/AGP3_SBSTBS/NC/ENA_BL AGP2_ADSTB0/AGP3_ADSTBF0/TMD2_CLK# AGP2_ADSTB0#/AGP3_ADSTBS0/TMD2_CLK AGP2_ADSTB1/AGP3_ADSTBF1/TMD1_CLK# AGP2_ADSTB1#/AGP3_ADSTBS1/TMD1_CLK
AGP2_CBE#0/AGP3_CBE0/TMD2_D7 AGP2_CBE#1/AGP3_CBE1/TMD2_DE
AGP2_CBE#3/AGP3_CBE3/TMD1_D5
AGP2_IRDY#/AGP3_IRDY/GPIO8/I2C_CLK
AGP2_TRDY#/AGP3_TRDY/TMDS_DVI_CLK
AGP2_STOP#/AGP3_STOP/GPIO10/DDC_DATA
AGP2_FRAME#/AGP3_FRAME/TMDS_DVI_DATA
AGP2_DEVSEL#/AGP3_DEVSEL/GPIO9/I2C_DATA
PCI BUS 1 / AGP Bus (GPIO , TMDS , ZVPort)
AGP2_SBA0/AGP3_SBA#0/GPIO0/VDDC_CNTL0 AGP2_SBA1/AGP3_SBA#1/GPIO1/VDDC_CNTL1
AGP2_SBA2/AGP3_SBA#2/GPIO2/LVDS_BLON# AGP2_SBA3/AGP3_SBA#3/GPIO3/LVDS_DIGON
AGP2_SBA4/AGP3_SBA#4/GPIO4/STP_AGP#
AGP2_SBA5/AGP3_SBA#5/GPIO5/AGP_BUSY#
AGP2_SBA6/AGP3_SBA#6/GPIO6/LVDS_SSOUT
AGP2_SBA7/AGP3_SBA#7/GPIO7/LVDS_SSIN
4X(NAGP@)
52.1_0402_1% 1K_0402_1% 1K_0402_1%
10U_0805_10V4Z
1
C580
2
0.1U_0402_10V6K
1
C641
2
L
C633
0.1U_0402_10V6K
C628
0.1U_0402_10V6K
Note: P L A CE CLOSE TO U27 (NB RC30 0M)
C515
1
C640
2
0.1U_0402_10V6K
1
2
AGP_AD0/TMD2_HSYNC
AGP_AD1/TMD2_VSYNC
AGP_AD2/TMD2_D1 AGP_AD3/TMD2_D0 AGP_AD4/TMD2_D3 AGP_AD5/TMD2_D2 AGP_AD6/TMD2_D5 AGP_AD7/TMD2_D4 AGP_AD8/TMD2_D6 AGP_AD9/TMD2_D9
AGP_AD10/TMD2_D8 AGP_AD11/TMD2_D11 AGP_AD12/TMD2_D10
AGP_AD13 AGP_AD14 AGP_AD15
AGP_AD16/TMD1_VSYNC
AGP_AD17/TMD1_HSYNC
AGP_AD18/TMD1_DE AGP_AD19/TMD1_D0 AGP_AD20/TMD1_D1 AGP_AD21/TMD1_D2 AGP_AD22/TMD1_D3 AGP_AD23/TMD1_D4 AGP_AD24/TMD1_D7 AGP_AD25/TMD1_D6 AGP_AD26/TMD1_D9
AGP_AD27/TMD1_D8 AGP_AD28/TMD1_D11 AGP_AD29/TMD1_D10
AGP_AD30/TMDS_HPD
AGP_AD31
AGP2_CBE#2/AGP3_CBE2
AGP_PAR
AGP2_PIPE#/AGP3_DBI_HI
AGP2_NC/AGP3_DBI_LO
AGP2_RBF#/AGP3_RBF
AGP2_WBF#/AGP3_WBF
AGP_ST0 AGP_ST1 AGP_ST2
0.1U_0402_10V6K
1
1
C638
C639
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
1
C627
C629
2
2
0.1U_0402_10V6K
3
Y2 W3 W2 V3 V2 V1 U1 U3 T2 R2 P3 P2 N3 N2 M3 M2 L1 L2 K3 K2 J3 J2 J1 H3 F3 G2 F2 F1 E2 E1 D2 D1
E5 E6 T3 U2 G3 H2
R3 M1 L3 H1
P5 R6 T6 T5 P6 R5 C1 D3 N6 N5
DDC_CLK
C3
DDC_DAT
C2
AGP_SBA2
D4
AGP_SBA3
E4
AGP_SBA4
F6
AGP_SBA5
F5
AGP_SBA6
G6
AGP_SBA7
G5 L6
M6 L5
0.1U_0402_10V6K
1
C617
2
0.1U_0402_10V6K
1
C630
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1
C618
2
0.1U_0402_10V6K
1
C631
2
0.1U_0402_10V6K
3
0.1U_0402_10V6K
1
C602
2
0.1U_0402_10V6K
1
C556
2
1
C601
2
0.1U_0402_10V6K
1
C571
2
0.1U_0402_10V6K
@10U_0805_6.3V6M
C653
2.2K_0402_5%
ENBKL# 35 ENVDD 18 AGP_STP# 27 AGP_BUSY# 27
0.1U_0402_10V6K
1
2
0.1U_0402_10V6K
1
C589
2
@0.1U_0402_10V6K
1
1
C656
2
2
R296
@0_0402_5%
R277
@0_0402_5%
Note: P L AC E CLOSE TO U2 (NB RC30 0M)
L
+3VS
R518
1 2
1 2
1
C605
2
0.1U_0402_10V6K
1
1
C608
C620
2
2
0.1U_0402_10V6K
2
12
12
R295
@0_0402_5%
S0
S1
12
12
@SM561BS_SO8 R276 @0_0402_5%
R519
2.2K_0402_5%
+1.5VS
@0.01U_0402_16V7Z
1
C568
C498
2
@0.01U_0402_16V7Z
1
2
2
+3VS_SSVDD
@0_0402_5%
R294
2
U44
VDD
1
Xin/CLK
SSCLK
7 6
LVDS SPREAD SPECTRUM
S0 S1
Xout
SSCC
VSS
3
R293
@0_0402_5%
ATI request
@0.01U_0402_16V7Z
1
1
C610
C569
2
2
@0.01U_0402_16V7Z
1
L42
1 2
@BLM21P300S_0805
12
12
R275 @0_0402_5%
4
8
1
C657
5
@10P_0402_25V8K
12
12
2
R274 @0_0402_5%
@0.01U_0402_16V7Z
1
1
1
2
C619
C585
2
2
@0.01U_0402_16V7Z
Title
Size Docu ment Number Re v
Date: Sheet
星期三 八月
+3VS
LVDS_SSOUT AGP_SBA6
1
C651
@10P_0402_25V8K
2
LVDS_SSIN
@0.01U_0402_16V7Z
1
C514
C609
2
@0.01U_0402_16V7Z
R534
@0_0402_5%
R535
@0_0402_5%
@0.01U_0402_16V7Z
1
1
C595
2
2
@0.01U_0402_16V7Z
12
12
Compal Electronics, Inc.
ATI RC300M-AGP, ALIN K BUS
LA-2051
27, 2003
1
AGP_SBA7
1
2
951,
C558
0.1A
of
5
D D
KC FBM -L11-201209-221LMAT_0805
L37
+1.8VS
C C
CLK_ AGP_66M
12
R272 @10_0402_5%
1
C282 @15P_ 0 402_50V8J
2
CLK_MEM_66M
12
B B
R271 @10_0402_5%
1
C271 @15P_ 0 402_50V8J
2
1 2
0.1U_ 0 402_10V6K L33
+1.8VS
REFCLK1_NB16
+3VS
1
2
1 2
KC FBM-L11-201209-221LMAT _0805
L38
+1.8VS
KC FBM-L11-201209-221LMAT _0805
wait 1% new part
X4
4
VCC
1
ST
C592
@27MH Z_20P_6N
@0.1U _0402_16V7K
4
KC FBM -L11-201209-221LMAT_0805
1
2
1
C537
2
C577
0.1U_ 0 402_10V6K
R474 715 _0402_1%
12
12
R506
1
2
27M_TV
3 2
EXCLK_27M_TV38
+1.8VS_AV DDDI
R520
@10_0402_5% C634 @15P_ 0 402_50V8J
R497 @22_0402_5%
C550
0.1U_ 0 402_10V6K
1 2
10U_0805_10V4Z
68_0402_5%
OUT GND
L35
+1.8VS_AVDDQ
1
C536
0.1U_ 0 402_10V6K
2
1
1
C578
2
2
INTCRT_R18 INTCRT_G18 INTCRT_B18
INTCRT_HSYNC18
INTCRT_VSYNC18
1 2
CLK_NB_BCLK16
CLK_NB_BCLK#16
CLK_AGP_66M16
CLK_MEM_66M16
27M_TV_R
12
R505
@10_0402_5%
+2.5VS
12
1
C551
0.1U_ 0 402_10V6K
2
1
C586
0.1U_ 0 402_10V6K
2
12
+2.5VS_AVDD
+PLLVDD_18
NB_RSET
RC300M_X1 RC300M_X2
CLK_NB_BCLK CLK_NB_BCLK#
CLK_AGP_66M CLK_MEM_66M
12
4.7K_ 0402_5%
R588
+3VS_VDDR
+3VS
+3VS
L39
1 2
1
2
U24D
G9
VDDR3
H9
VDDR3
A14
AVDD_25
B13
AVSSN
B14
AVDDDI_18
C13
AVSSDI
A15
AVDDQ
B15
AVSSQ
H11
PLLVDD_18
G11
PLLVSS
F14
RED
F15
GREEN
E14
BLUE
C8
DACHSYNC
D9
DACVSYNC
C14
RSET
A4
XTALIN
B4
XTALOUT
A5
HCLKIN
B5
HCLKIN#
B6
SYS_FBCLKOUT
A6
SYS_FBCLKOUT#
D8
ALINK_CLK
B2
AGPCLKOUT
B3
AGPCLKIN
A3
EXT_MEM_CLK
D7
USBCLK
B7
REF27
C5
OSC
CHS-216IGP9050A21_BGA718
L
FBM-11-160808-121-T_0603
C622
0.1U_ 0 402_10V6K
PART 4 OF 6
CRT
CLK. GEN.
Note: PLACE CLOSE TO U27 (NB CHIP)
RC300M_X1
R531
@1M_0402_1%
RC300M_X2
3
D12
TXOUT_U0N
E12
TXOUT_U0P
F11
TXOUT_U1N
F12
TXOUT_U1P
D13
TXOUT_U2N
D14
TXOUT_U2P
E13
TXCLK_UN
F13
TXCLK_UP
E10
TXOUT_L0N
D10
TXOUT_L0P
B9
TXOUT_L1N
C9
TXOUT_L1P
D11
TXOUT_L2N
E11
TXOUT_L2P
B10
TXCLK_LN
C10
TXCLK_LP
A12
LPVDD_18
LVDS
12
A11
LPVSS
B12
LVDDR_18
C12
LVDDR_18
B11
LVSSR
C11
LVSSR
E15
C_R
C15
Y_G
D15
COMP_B
SVID
D6
DACSCL
C6
DACSDA
D5
CPUSTOP#
A8
SYSCLK
B8
SYSCLK#
C650
1 2
12
@18P_0402_50V8K Y5 @14.3 1818MHZ_20P_6X1430004201
C649
1 2
@18P_0402_50V8K
LCD_B0- 18
LCD_B0+ 18
LCD_B1- 18
LCD_B1+ 18
LCD_B2- 18
LCD_B2+ 18
LCD_BCLK- 18
LCD_BCLK+ 18
LCD_A0- 18
LCD_A0+ 18
LCD_A1- 18
LCD_A1+ 18
LCD_A2- 18
LCD_A2+ 18
LCD_ACLK- 18
LCD_ACLK+ 18
+1.8VS_LPVDD LPVSS
+1.8VS_LVDDR
LVSSR
TV_CRMA 17 TV_LUMA 17 TV_COMPS 17
@2N7002_SOT 23
0.1U_ 0 402_10V6K
INTDDCCK 18 INTDDCDA 18
S
G
1 2
R457 @0_0402_5%
1 2
R461 1K_0402_5%
C591
0.1U_0402_10V6K
C566
Q45
D
13
2
0.1U_ 0 402_10V6K
1
1
C576
2
2
0.1U_ 0 402_10V6K
1
1
C567
2
2
PM_STPCPU#
2
KC FBM -L11-201209-221LMAT_0805
1 2
L32
1
C518
2
10U_0805_10V4Z
KC FBM-L11-201209-221LMAT _0805
1 2
L36
1
C587
2
10U_0805_10V4Z
PM_STPCPU# 5,16,26,47
PCIR ST# 19,20 , 21,22, 24,25, 26, 30,34, 35
+3VS
1
+1.8VS
+1.8VS
A A
THIS SHEET OF ENGI N EERING DRAW I N G IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL AND TRADE SECRET INF ORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZ ED BY COM PAL ELECT RONICS , INC. N EITHER THIS SH EET NOR T HE INFO RMATIO N IT CON TAINS
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WI THOUT P RIOR WR ITTEN C ONSENT OF COMPA L ELECTR ONICS, INC.
2
Title
Size Document Number R ev
Date: Sheet
Compal Electronics, Inc.
ATI RC300M-VIDEO I/F
LA-2051
八月
1
0.1A
of
10 51星期T, 27, 2003
5
4
3
2
1
+1.5VS +2.5V
U24E
F10
VDD_CORE
F9
VDD_CORE
G12
VDD_CORE
H12
VDD_CORE
H13
VDD_CORE
M12
VDD_CORE
M13
VDD_CORE
M14
D D
C C
B B
+CPU_CORE
+3VS
VDD_CORE
M17
VDD_CORE
M18
VDD_CORE
M19
VDD_CORE
N12
VDD_CORE
N13
VDD_CORE
N14
VDD_CORE
N17
VDD_CORE
N18
VDD_CORE
N19
VDD_CORE
P12
VDD_CORE
P13
VDD_CORE
P14
VDD_CORE
P17
VDD_CORE
P18
VDD_CORE
P19
VDD_CORE
U12
VDD_CORE
U13
VDD_CORE
U14
VDD_CORE
U17
VDD_CORE
U18
VDD_CORE
U19
VDD_CORE
V12
VDD_CORE
V13
VDD_CORE
V14
VDD_CORE
V17
VDD_CORE
V18
VDD_CORE
V19
VDD_CORE
W12
VDD_CORE
W13
VDD_CORE
W14
VDD_CORE
W17
VDD_CORE
W18
VDD_CORE
W19
VDD_CORE
C16
VDDR2_CPU
D16
VDDR2_CPU
D17
VDDR2_CPU
E16
VDDR2_CPU
E17
VDDR2_CPU
F16
VDDR2_CPU
F17
VDDR2_CPU
G17
VDDR2_CPU
G21
VDDR2_CPU
G23
VDDR2_CPU
G24
VDDR2_CPU
H16
VDDR2_CPU
H17
VDDR2_CPU
H19
VDDR2_CPU
H21
VDDR2_CPU
H24
VDDR2_CPU
K23
VDDR2_CPU
K24
VDDR2_CPU
M23
VDDR2_CPU
P23
VDDR2_CPU
P24
VDDR2_CPU
T23
VDDR2_CPU
T24
VDDR2_CPU
U23
VDDR2_CPU
U24
VDDR2_CPU
W30
VDDR2_CPU
AA1
VDDL_ALINK
AA7
VDDL_ALINK
AA8
VDDL_ALINK
AC7
VDDL_ALINK
AC8
VDDL_ALINK
AD1
VDDL_ALINK
AD7
VDDL_ALINK
AD8
VDDL_ALINK
AK3
VDDL_ALINK
W8
VDDL_ALINK
CHS-216IGP9050A21_BGA718
CORE PWR
CPU I/F PWRALINK PWR
PART 5 OF 6
MEM I/F PWR
POWER
AGP PWR
VDDP_AGP/VDDP33 VDDP_AGP/VDDP33 VDDP_AGP/VDDP33
VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM
VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP VDDP_AGP
VDD_18 VDD_18 VDD_18 VDD_18
AA23 AA27 AB30 AC10 AC12 AC13 AC15 AC17 AC19 AC21 AC23 AC24 AC25 AC27 AD10 AD12 AD13 AD15 AD17 AD19 AD21 AD23 AD24 AD25 AD27 AE10 AE14 AE15 AE19 AE20 AE30 AE9 AF27 AG11 AG12 AG17 AG18 AG23 AG24 AG26 AG8 AG9 AJ30 AK14 AK23 AK8 V23 W23 W24 W25 Y25
A2 G4 H5 H6 H7 J4 K8 L4 M7 M8 N4 P1 P7 P8 R4 T8 U4 U5 U6 E7 F7 G8
AC22 AC9 H10 H22
+1.5VS
+3VS
+1.8VS
U24F
PART 6 OF 6
A29
VSS
AB23
VSS
AB24
VSS
AB27
VSS
AB4
VSS
AB8
VSS
AC1
VSS
AC11
VSS
AC14
VSS
AC16
VSS
AC20
VSS
AC30
VSS
AD11
VSS
AD14
VSS
AD16
VSS
AD20
VSS
AD4
VSS
AE27
VSS
AF30
VSS
AF5
VSS
AG10
VSS
AG13
VSS
AG16
VSS
AG19
VSS
AG22
VSS
AG25
VSS
AG7
VSS
AH28
VSS
AH3
VSS
GND
AJ1
VSS
AK13
VSS
AK2
VSS
AK22
VSS
AK29
VSS
AK4
VSS
AK7
VSS
B1
VSS
B16
VSS
B30
VSS
C19
VSS
C23
VSS
C27
VSS
C4
VSS
D21
VSS
D25
VSS
E3
VSS
E8
VSS
E9
VSS
F27
VSS
F4
VSS
F8
VSS
G14
VSS
G15
VSS
G18
VSS
G20
VSS
H14
VSS
H15
VSS
H18
VSS
H20
VSS
H27
VSS
H4
VSS
H8
VSS
J7
VSS
CHS-216IGP9050A21_BGA718
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
R23 R7 R8 T12 T13 T14 T15 T16 T17 T18 T19 T27 T4 U15 U16 U7 U8 V15 V16 V27 V4 V7 V8 W15 W16 W27 Y1 Y23 Y24 Y30 Y4 Y7 Y8 R19 R18 R17 R16 R15 R14 R13 R12 R1 P4 P27 P16 P15 N8 N24 N23 N16 N15 M4 M27 M16 M15 L8 L7 L25 L24 L23 K4 K27 J8
+2.5V
+1.8VS
0.1U_0402_10V6K
C581
10U_0805_10V4Z
A A
5
2
4
2
0.1U_0402_10V6K
C482
1
1
C575
1
C481
2
0.1U_0402_10V6K
1
1
C588
0.1U_0402_10V6K
2
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
C429
100U_D2_10VM
1
+
C505
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C445
2
1
C570
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C462
2
1
1
C436
2
2
0.1U_0402_10V6K
2
0.1U_0402_10V6K
1
C553
2
0.1U_0402_10V6K
C538
0.1U_0402_10V6K
1
C522
2
0.1U_0402_10V6K
1
1
C461
C446
2
2
0.1U_0402_10V6K
Title
Size Docu ment Number Re v
Date: Sheet
星期三 八月
0.1U_0402_10V6K
1
1
C457
2
0.1U_0402_10V6K
1
C437
2
2
Compa l Electronics, Inc.
ATI RC300M-POWER
LA-2051
27, 2003
1
1
C438
0.1U_0402_10V6K
2
of
11 51,
0.1A
5
4
3
2
1
A_AD[0..31]9,26
A_CBE#[0..3]9,26
R418 10K_0402_5%
A_AD31
D D
C C
B B
A A
A_AD30
A_AD29
A_AD28
A_AD27
A_AD26
A_AD25
A_AD24
A_AD23
A_AD22
A_AD21
A_AD20
A_CBE#3
A_CBE#0
5
R420 4.7K_0402_5%
1 2
R419 4.7K_0402_5%
1 2
R549 10K_0402_5%
1 2
R278 @4.7K_0402_5%
1 2
R544 @10K_0402_5%
1 2
R283 4.7K_0402_5%
1 2
R548 10K_0402_5%
1 2
R279 @4.7K_0402_5%
1 2
R547 10K_0402_5%
1 2
R280 @4.7K_0402_5%
1 2
R545 10K_0402_5%
1 2
R282 @4.7K_0402_5%
1 2
R543 10K_0402_5%
1 2
R541 10K_0402_5%
1 2
R286 @4.7K_0402_5%
1 2
R284 @4.7K_0402_5%
1 2
R542 10K_0402_5%
1 2
R285 @4.7K_0402_5%
1 2
R540 @4.7K_0402_5%
1 2
R287 4.7K_0402_5%
1 2
R546 @4.7K_0402_5%
1 2
R281 @4.7K_0402_5%
1 2
R536 @4.7K_0402_5%
1 2
R291 @4.7K_0402_5%
1 2
1 2
R417 10K_0402_5%
1 2
2 1
D45 RB751V_SOD323
2 1
D44 RB751V_SOD323
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
BSEL1 5,16
+3VS
BSEL0 5,16
A_AD2 9: STRAP CONFIGURATION
DEFAULT:1
0: REDUCEDE SET 1: FULL SET
A_AD28: SPREAD SPECTRUM ENABLE
DEFAULT:0
0: DISABLE 1: ENABLE
A_AD27 : Fr cShortReset#
DEFAULT: 1
0: TEST MODE 1: NORMAL MODE
A_AD26 : ENABLE IOQ
DEFAULT: 1
0: IOQ=1 1: IOQ=12
A_AD25/A_AD17 : CPU VOLTAGE[1..0]
DEFAULT: 10
00: 1.05V 01: 1.35V 11: 1.75V 10: 1.45V
A_AD2 4 : M OBILE CPU SELECT
DEFAULT: 1
0: BANIAS CPU 1: OTH ER CPU
A_AD2 3 : C L OCK BYPASS DISABLE
DEFAULT: 1
0: TEST MODE 1: NORMAL
A_AD22 : OSC PAD OUTPUT PCICLK
DEFAULT : 1
0:PCICLK OUT 1: OSC CLK OUT
A_AD2 1 : A UTO_CAL ENABLE
DEFAULT : 1
0: DISABLE 1: ENABLE
A_AD20 : INTERNAL CLK GEN ENABLE
DEFAULT : 0
0: DISABLE 1: ENABLE
A_CBE# 3: NOT USED
A_CBE# 0 :NO USED
4
A_AD[31..30] : FSB CLK SPEED
DEFAULT: 01
00: 100 MHZ 01: 133 MHZ 10: 200MHZ 11:166 MHZ
AD25=1 DESTOP CPU AD25=0 MOBILE CPU AD17--DON'T CARE
A_AD[0..31] A_CBE#[0..3]
R537 @4.7K_0402_5%
A_AD18
A_AD17
A_PAR9,26
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1 2
R290 4.7K_0402_5%
1 2
R538 @4.7K_0402_5%
1 2
R289 4.7K_0402_5%
1 2
A_PAR
R288 @4.7K_0402_5%
1 2
R539 4.7K_0402_5%
1 2
+3VS
+3VS
+3VS
2
A_AD1 8 : ENABLE PHASE CAL IBRATION
DEFAULT: 0
0: DISABLE 1:ENABLE
A_AD25/A_AD17 : CPU VOLTAGE[1..0]
DEFAULT: 0
00: 1.05V 01: 1.35V 11: 1.75V 10: 1.45V
PAR: EXTENDED DEBUG MODE
DEFAULT : 1
0: DEBUG MODE 1: NORMAL
Title
Size Docu ment Number Re v
Date: Sheet
Compa l Electronics, Inc.
ATI RC300M-SYSTEM STRAP
27, 2003
LA-2051
星期三 八月
of
12 51,
1
0.1A
A
0_1206_8P4R_5%
DDR_SDQ62 DDR_DQ62 DDR_SDQS7 DDR_DQS7 DDR_SDM7 DDR_DM7 DDR_SDQ63 DDR_DQ63
1 1
DDR_SDQ55 DDR_DQ55 DDR_SDQ54 DDR_DQ54
DDR_SDQ49 DDR_DQ49 DDR_SDQ53 DDR_DQ53 DDR_SDQ48 DDR_DQ48 DDR_SDQ43 DDR_SDQ47
DDR_SDQS5 DDR_SDM5 DDR_SDQ44 DDR_SDQ41 DDR_SDQ37
DDR_SDQ39 DDR_DQ39 DDR_SDQ34 DDR_DQ34
DDR_SDQ32 DDR_DQ32
2 2
DDR_SDQ27 DDR_DQ27
DDR_SDQ18 DDR_DQ18 DDR_SDQ23 DDR_DQ23
DDR_SDQ21 DDR_DQ21 DDR_SDQ20 DDR_DQ20 DDR_SDQ10 DDR_SDQ11
3 3
DDR_SDQS1 DDR_DQS1 DDR_SDM1 DDR_DM1 DDR_SDQ9 DDR_DQ9 DDR_SDQ8 DDR_DQ8 DDR_SDQ3 DDR_DQ3
DDR_SDQ1 DDR_DQ1 DDR_SDQS0 DDR_DQS0 DDR_SDM0 DDR_DM0 DDR_SDQ5 DDR_DQ5 DDR_SDQ7
4 4
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
A
RP40 0_1206_8P4R_5%
RP43
0_1206_8P4R_5%
RP44 0_1206_8P4R_5%
RP54 0_1206_8P4R_5%
RP59
0_1206_8P4R_5%
RP64 0_1206_8P4R_5%
RP67
0_1206_8P4R_5%
RP70
0_1206_8P4R_5%
RP74 0_1206_8P4R_5%
RP82
DDR_DQ57DDR_SDQ57
DDR_DQ61DDR_SDQ61
DDR_DQS6DDR_SDQS6 DDR_SDM6 DDR_DM6
DDR_DQ43 DDR_DQ47 DDR_SDQ46
DDR_DQ44 DDR_DQ41 DDR_DQ37
DDR_DQS4DDR_SDQS4 DDR_SDM4 DDR_DM4
DDR_DQ31DDR_SDQ31 DDR_DQS3DDR_SDQS3 DDR_SDM3 DDR_DM3
DDR_DQ26DDR_SDQ26
DDR_DQ28DDR_SDQ28
DDR_DQS2DDR_SDQS2 DDR_SDM2 DDR_DM2
DDR_DQ10 DDR_DQ11
DDR_DQ7
B
DDR_SDQ58 DDR_DQ58 DDR_SDQ59 DDR_DQ59
DDR_SDQ60 DDR_DQ60 DDR_SDQ51 DDR_DQ51 DDR_SDQ50 DDR_DQ50
DDR_SDQ52 DDR_DQ52 DDR_SDQ42 DDR_DQ42
DDR_SDQ45
DDR_SDQ40 DDR_SDQ38 DDR_DQ38
DDR_SDQ35 DDR_DQ35
DDR_SDQ33 DDR_DQ33 DDR_SDQ36 DDR_DQ36
DDR_SDQ29 DDR_DQ29 DDR_SDQ25 DDR_DQ25
DDR_SDQ19 DDR_DQ19 DDR_SDQ22 DDR_DQ22
DDR_SDQ17 DDR_DQ17 DDR_SDQ16 DDR_SDQ14 DDR_DQ14
DDR_SDQ12 DDR_DQ12
DDR_SDQ4 DDR_SDQ0
DDR_SDQ6
DDR_SDQ[0..63]
DDR _ S DQS[0..7]
DDR_SDM[0..7]
DDR_SMA[0..12]
B
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
DDR_SDQ[0..63] 8
DDR_SDQS[0..7] 8
DDR_SDM[0..7] 8
DDR_SMA[0..12] 8
RP5
0_1206_8P4R_5% RP8
0_1206_8P4R_5%
RP10
0_1206_8P4R_5% RP12
0_1206_8P4R_5% RP16
0_1206_8P4R_5%
RP26
0_1206_8P4R_5% RP29
0_1206_8P4R_5%
RP31
0_1206_8P4R_5%
RP34
0_1206_8P4R_5% RP36
0_1206_8P4R_5%
C
DDR_DQ56DDR_SDQ56
DDR_DQ46
DDR_DM5DDR_DQS5 DDR_DQ45 DDR_DQ40
DDR_DQ30DDR_SDQ30
DDR_DQ24DDR_SDQ24
DDR_DQ16 DDR_DQ15DDR_SDQ15
DDR_DQ13DDR_SDQ13 DDR_DQ2DDR_SDQ2
DDR_DQ4 DDR_DQ0
DDR_DQ6
C
D
DDR_DQ5 DDR_DQS0
DDR_DQ1 DDR_DQ3
DDR_DQ8 DDR_DQ9
DDR_DQS1
DDR_DQ11 DDR_DQ10
DDR_CLK08 DDR_CLK0#8
DDR_DQ20 DDR_DQ21
DDR_DQS2
DDR_DQ18 DDR_DQ28
DDR_DQS3 DDR_DQ27 DDR_DQ29
DDR_CKE18,14
DDR_SCS#08,14 DDR_SMA158
Layout note Place these resistors
close to DIMM0, all trace length<500 mil
DDR_CKE1 DDR_SMA12
DDR_SMA9 DDR_SMA7
DDR_SMA5 DDR_SMA3 DDR_SMA1
DDR_SMA10 DDR_SBS0 DDR_SWE# DDR_SCS#0 DDR_SMA15
DDR_DQ32 DDR_DQ34
DDR_DQS4 DDR_DM4 DDR_DQ39
DDR_DQ37
DDR_DQ44 DDR_DQS5
DDR_DQ47 DDR_DQ43
DDR_DQ48 DDR_DQ49
DDR_DQ54 DDR_DQ55
DDR_DQ63 DDR_DQS7
DDR_DQ62 DDR_DQ57 DDR_DQ58
SMDATA14,16,27
SMCLK14,16,27
+3VS
+2.5V
JP17
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
KLINK_5746-2-111
E
DU/RESET#
DU/BA2
VREF
VDD DM0
DQ12
VDD
DQ13
DM1
DQ14 DQ15
VDD VDD
DQ20 DQ21
VDD DM2
DQ22 DQ23
DQ28
VDD
DQ29
DM3
DQ30 DQ31
VDD
DM8 VDD
VDD VDD
CKE0
VDD
RAS# CAS#
DQ36 DQ37
VDD DM4
DQ38 DQ39
DQ44
VDD
DQ45
DM5
DQ46 DQ47
VDD
CK1#
DQ52 DQ53
VDD DM6
DQ54 DQ55
DQ60
VDD
DQ61
DM7
DQ62 DQ63
VDD
VSS DQ4 DQ5
DQ6 VSS DQ7
VSS
VSS VSS
VSS
VSS
CB4 CB5 VSS
CB6 CB7 VSS
VSS
VSS
BA1
VSS
VSS
VSS
CK1 VSS
VSS
VSS
SA0 SA1 SA2
F
+2.5V
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100
A11
102
A8
104 106
A6
108
A4
110
A2
112
A0
114 116 118 120 122
S1#
124
DU
126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DU
DDR_DQ6DDR_DQ7 DDR_DQ0
DDR_DM0 DDR_DQ4
DDR_DQ2 DDR_DQ12
DDR_DQ13
DDR_DM1
DDR_DQ15 DDR_DQ14
DDR_DQ16 DDR_DQ17
DDR_DM2 DDR_DQ22DDR_DQ23
DDR_DQ19 DDR_DQ24
DDR_DQ25DDR_DQ26 DDR_DM3
DDR_DQ30DDR_DQ31
DDR_CKE0 DDR_SMA11
DDR_SMA8 DDR_SMA6
DDR_SMA4 DDR_SMA2 DDR_SMA0
DDR_SBS1 DDR_SRAS# DDR_SCAS# DDR_SCS#1
DDR_DQ33 DDR_DQ36
DDR_DQ35
DDR_DQ38 DDR_DQ40DDR_DQ41
DDR_DQ45 DDR_DM5
DDR_DQ42 DDR_DQ46
DDR_DQ53 DDR_DQ52
DDR_DM6DDR_DQS6 DDR_DQ50
DDR_DQ51 DDR_DQ60DDR_DQ61
DDR_DQ56 DDR_DM7
DDR_DQ59
1
C679
2
0.1U_0402_10V6K
DDR_CKE0 8,14
DDR_SCS#1 8,14
DDR_CLK1# 8 DDR_CLK1 8
DDR TOPOLOGY 1 FOR SMAA[0, 3, 6:12], SBA[1, 0], SRAS#, SCAS#, SWE#
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
E
F
G
DDR_DQ[0..63]
+SDREF
DDR_SMA15 DDR_SMAA15
DDR_SWE#8 DDR_SBS08
DDR_SCAS#8 DDR_SRAS#8 DDR_SBS18
DDR_SWE# DDR_SBS0 DDR_SMA10
DDR_SMA1 DDR_SMA3 DDR_SMA5 DDR_SMA7
DDR_SMA9
DDR_SMA12
DDR_SCAS# DDR_SRAS# DDR_SBS1
DDR_SMA0
DDR_SMA2 DDR_SMA4 DDR_SMA6 DDR_SMA8
DDR_DQS[0..7] DDR_DM[0..7]
DDR_SMAA[0..12]
DDR_SMAA15
10_1206_8P4R_5%
RP19
10_1206_8P4R_5%
RP27
R234 10_0402_5%
R239 10_0402_5%
10_1206_8P4R_5%
RP18
10_1206_8P4R_5%
DDR_SMA11
RP28
R238 10_0402_5%
45 36 27 18
45 36 27 18
12
12
DDR_SMAA10
DDR_SMAA1 DDR_SMAA3 DDR_SMAA5 DDR_SMAA7
DDR_SMAA12
45 36 27 18
45 36 27 18
12
DDR_SMAA9
DDR_SMAA0
DDR_SMAA2 DDR_SMAA4 DDR_SMAA6 DDR_SMAA8
DDR_SMAA11
DDR_DQ[0..63] 14 DDR_DQS[0..7] 14 DDR_DM[0..7] 14
DDR_SMAA[0..12] 14
DDR_SMAA15 14
DDR_WE# 14 DDR_BS0 14
H
DDR_CAS# 14 DDR_RAS# 14 DDR_BS1 14
Layout note
Place these resistor close by DIMM0, all trace length Max=1.4"
Title
Size Docu ment Number Re v
Date: Sheet
G
Compa l Electronics, Inc.
DDR-SODIMM SLOT0
LA-2051
星期三 八月
27, 2003
0.1A
of
13 51,
H
A
+1.25VS
DDR_DQ7 DDR_DQ5 DDR_DQS0 DDR_DQ1
1 1
2 2
3 3
4 4
DDR_DQ3 DDR_DQ8 DDR_DQ9 DDR_DQS1
DDR_DQ11 DDR_DQ10
DDR_DQ20 DDR_DQ21
DDR_DQS2 DDR_DQ23 DDR_DQ18 DDR_DQ28
DDR_DQ26
DDR_DQS3 DDR_DQ27 DDR_DQ31
DDR_DQ32 DDR_DQ34 DDR_DQS4 DDR_DQ39
DDR_DQ37 DDR_DQ41 DDR_DQ44 DDR_DQS5
DDR_DQ47 DDR_DQ43 DDR_DQ48 DDR_DQ49
DDR_DQS6 DDR_DQ54 DDR_DQ55 DDR_DQ61
DDR_DQ63 DDR_DQS7 DDR_DQ62 DDR_DQ57
RP37
56_0804_8P4R_5%
RP35
56_0804_8P4R_5%
RP33
56_0804_8P4R_5%
RP32
56_0804_8P4R_5%
RP30
56_0804_8P4R_5%
RP15
56_0804_8P4R_5%
RP13
56_0804_8P4R_5%
RP11
56_0804_8P4R_5%
RP7
56_0804_8P4R_5%
RP6
56_0804_8P4R_5%
A
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
RP91
56_0804_8P4R_5%
RP84
56_0804_8P4R_5%
RP73
56_0804_8P4R_5%
RP71
56_0804_8P4R_5%
RP68
56_0804_8P4R_5%
RP58
56_0804_8P4R_5%
RP55
56_0804_8P4R_5%
RP52
56_0804_8P4R_5%
RP42
56_0804_8P4R_5%
RP41
56_0804_8P4R_5%
DDR_DQ6
18
DDR_DQ0
27
DDR_DM0
36
DDR_DQ4
45
DDR_DQ2
18
DDR_DQ12
27
DDR_DQ13
36
DDR_DM1
45
DDR_DQ15
18
DDR_DQ14
27
DDR_DQ16
36
DDR_DQ17
45
DDR_DM2
18
DDR_DQ22
27
DDR_DQ19
36
DDR_DQ24
45
DDR_DQ25
18
DDR_DM3
27
DDR_DQ29
36
DDR_DQ30
45
DDR_DQ33
18
DDR_DQ36
27
DDR_DM4
36
DDR_DQ35
45
DDR_DQ38
18
DDR_DQ40
27
DDR_DQ45
36
DDR_DM5
45
DDR_DQ42
18
DDR_DQ46
27
DDR_DQ53
36
DDR_DQ52
45
DDR_DM6
18
DDR_DQ50
27
DDR_DQ51
36
DDR_DQ60
45
DDR_DQ56
18
DDR_DM7
27
DDR_DQ59
36
DDR_DQ58
45
B
DDR_CLK38 DDR_CLK3#8
DDR_BS013 DDR_WE#13
DDR_SMAA1513
Layout note Place these resistor
closely DIMM1, all trace length<=800mil
SMDATA13,16,27
SMCLK13,16,27
+2.5V
DDR_DQ7 DDR_DQ5
DDR_DQS0 DDR_DQ1
DDR_DQ3 DDR_DQ8
DDR_DQ9 DDR_DQS1
DDR_DQ11 DDR_DQ10
DDR_DQ20 DDR_DQ21
DDR_DQS2
DDR_DQ18 DDR_DQ28
DDR_DQ26
DDR_DQS3 DDR_DQ27
DDR_DQ31
DDR_CKE3 DDR_CKE2 DDR_SMAA12
DDR_SMAA9 DDR_SMAA7
DDR_SMAA5 DDR_SMAA3 DDR_SMAA1
DDR_SMAA10 DDR_BS0 DDR_RAS#
DDR_SCS#2 DDR_SCS#3 DDR_SMAA15
DDR_DQ32 DDR_DQ34
DDR_DQS4 DDR_DQ39
DDR_DQ37 DDR_DQ41
DDR_DQ44 DDR_DQS5
DDR_DQ47 DDR_DQ43
DDR_DQ48 DDR_DQ49
DDR_DQS6 DDR_DQ54
DDR_DQ55 DDR_DQ61
DDR_DQ63 DDR_DQS7
DDR_DQ62 DDR_DQ57 DDR_DQ58
+3VS
C
JP20
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
VREF
VSS DQ4 DQ5 VDD DM0 DQ6 VSS DQ7
DQ12
VDD
DQ13
DM1
VSS DQ14 DQ15
VDD
VDD
VSS
VSS
DQ20 DQ21
VDD
DM2 DQ22
VSS DQ23 DQ28
VDD DQ29
DM3
VSS DQ30 DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD CKE0
DU/BA2
VSS
VDD
BA1 RAS# CAS#
S1#
VSS DQ36 DQ37
VDD
DM4 DQ38
VSS DQ39 DQ44
VDD DQ45
DM5
VSS DQ46 DQ47
VDD
CK1#
CK1
VSS DQ52 DQ53
VDD
DM6 DQ54
VSS DQ55 DQ60
VDD DQ61
DM7
VSS DQ62 DQ63
VDD
SA0 SA1 SA2
DDR-SODIMM_200_STD_H4.0
+2.5V
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100
A11
102
A8
104 106
A6
108
A4
110
A2
112
A0
114 116 118 120 122 124
DU
126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DU
DDR_DQ6 DDR_DQ0
DDR_DM0 DDR_DQ4
DDR_DQ2 DDR_DQ12
DDR_DQ13
DDR_DM1
DDR_DQ15 DDR_DQ14
DDR_DQ16 DDR_DQ17
DDR_DM2 DDR_DQ22DDR_DQ23
DDR_DQ19 DDR_DQ24
DDR_DQ25 DDR_DM3
DDR_DQ29
DDR_DQ30
DDR_SMAA11 DDR_SMAA8
DDR_SMAA6 DDR_SMAA4 DDR_SMAA2 DDR_SMAA0
DDR_BS1 DDR_CAS#DDR_WE#
DDR_DQ33 DDR_DQ36
DDR_DM4 DDR_DQ35
DDR_DQ38 DDR_DQ40
DDR_DQ45 DDR_DM5
DDR_DQ42 DDR_DQ46
DDR_DQ53 DDR_DQ52
DDR_DM6 DDR_DQ50
DDR_DQ51 DDR_DQ60
DDR_DQ56 DDR_DM7
DDR_DQ59
+3VS
DDR TOPOLOGY 1 FOR SMAA[0, 3, 6:12], SBA[1, 0], SRAS#, SCAS#, SWE#
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
1
C672
0.1U_0402_10V6K
2
DDR_CKE2 8DDR_CKE38
DDR_BS1 13 DDR_RAS# 13 DDR_CAS# 13 DDR_SCS#3 8DDR_SCS#28
DDR_CKE08,13 DDR_CKE18,13 DDR_SCS#18,13 DDR_SCS#08,13
DDR_CLK4# 8 DDR_CLK4 8
D
+SDREF
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
+1.25VS
33_0804_8P4R_5%
33_0804_8P4R_5%
33_0804_8P4R_5%
DDR_DQS[0..7] 13 DDR_DQ[0..63] 13 DDR_DM[0..7] 13
DDR_SMAA[0..12] 13
DDR_CKE3 DDR_CKE2 DDR_SMAA12 DDR_SMAA9 DDR_SMAA7
DDR_SMAA5 DDR_SMAA3 DDR_SMAA1 DDR_SMAA10
DDR_BS0 DDR_WE# DDR_SCS#2 DDR_SMAA15
DDR_CKE0 DDR_CKE1 DDR_SCS#1 DDR_SCS#0
RP24
33_0804_8P4R_5%
RP23
33_0804_8P4R_5%
RP20
33_0804_8P4R_5%
RP25
33_0804_8P4R_5%
DDR_DQS[0..7] DDR_DQ[0..63] DDR_DM[0..7]
DDR_SMAA[0..12]
Layout note Place these resistor
close by DIMM1, all trace length Max=0.8"
Title
Size Docu ment Number Re v
Date: Sheet
Compa l Electronics, Inc.
DDR-SODIMM SLOT1
LA-2051
星期三 八月
27, 2003
E
RP62
18
DDR_SMAA11
27
DDR_SMAA8
36
DDR_SMAA6
45
RP61
RP60
E
18 27 36 45
18 27 36 45
DDR_SMAA4 DDR_SMAA2 DDR_SMAA0 DDR_BS1
DDR_RAS# DDR_CAS# DDR_SCS#3
14 51,
0.1A
of
A
Layout n ote :
Distribute as close as possible to DDR-SODIMM0.
+2.5V
B
C
D
E
Layout n ote :
Distribute as close as possible to DDR-SODIMM1.
+2.5V
1 1
1
+
C686 150U_D2_6.3VM
2
1
C227
0.1U_0402_10V6K
2
1
C322
+
150U_D2_6.3VM
2
1
C289
0.1U_0402_10V6K
2
1
C184
0.1U_0402_10V6K
2
1
+
C93 150U_D2_6.3VM
2
1
C146
0.1U_0402_10V6K
2
1
C136
0.1U_0402_10V6K
2
1
C291
0.1U_0402_10V6K
2
1
C248
0.1U_0402_10V6K
2
1
C122
0.1U_0402_10V6K
2
1
C174
0.1U_0402_10V6K
2
1
C246
0.1U_0402_10V6K
2
1
C266
0.1U_0402_10V6K
2
1
C170
0.1U_0402_10V6K
2
1
C106
0.1U_0402_10V6K
2
1
C191
0.1U_0402_10V6K
2
1
C258
0.1U_0402_10V6K
2
1
C150
0.1U_0402_10V6K
2
1
C265
0.1U_0402_10V6K
2
1
+
C92 150U_D2_6.3VM
2
1
C113
0.1U_0402_10V6K
2
1
C139
0.1U_0402_10V6K
2
1
C277
0.1U_0402_10V6K
2
1
C151
0.1U_0402_10V6K
2
1
C247
0.1U_0402_10V6K
2
1
C274
0.1U_0402_10V6K
2
1
C137
0.1U_0402_10V6K
2
1
C111
0.1U_0402_10V6K
2
1
C226
0.1U_0402_10V6K
2
1
C165
0.1U_0402_10V6K
2
1
C185
0.1U_0402_10V6K
2
1
C245
0.1U_0402_10V6K
2
1
C261
0.1U_0402_10V6K
2
1
C171
0.1U_0402_10V6K
2
1
C290
0.1U_0402_10V6K
2
1
C292
0.1U_0402_10V6K
2
1
C176
0.1U_0402_10V6K
2
Layout n ote :
Place one cap close to every 2 pull up resistors termination to
2 2
+1.25VS
1
C283
0.1U_0402_10V6K
2
+1.25VS
1
C425
0.1U_0402_10V6K
2
+1.25VS
1
C197
0.1U_0402_10V6K
3 3
2
+1.25VS
1
C426
0.1U_0402_10V6K
2
1
C671
0.1U_0402_10V6K
2
1
C662
0.1U_0402_10V6K
2
1
C228
0.1U_0402_10V6K
2
1
C606
0.1U_0402_10V6K
2
1
C276
0.1U_0402_10V6K
2
1
C255
0.1U_0402_10V6K
2
1
C456
0.1U_0402_10V6K
2
1
C149
0.1U_0402_10V6K
2
1
C263
0.1U_0402_10V6K
2
1
C287
0.1U_0402_10V6K
2
1
C209
0.1U_0402_10V6K
2
1
C132
0.1U_0402_10V6K
2
1
C474
0.1U_0402_10V6K
2
1
C424
0.1U_0402_10V6K
2
1
C156
0.1U_0402_10V6K
2
1
C483
0.1U_0402_10V6K
2
1
C625
0.1U_0402_10V6K
2
1
C635
0.1U_0402_10V6K
2
1
C281
0.1U_0402_10V6K
2
1
C449
0.1U_0402_10V6K
2
1
C434
0.1U_0402_10V6K
2
1
C510
0.1U_0402_10V6K
2
+1.25VS
1
C208
0.1U_0402_10V6K
2
+1.25VS
1
C294
0.1U_0402_10V6K
2
+1.25VS
4 4
1
C428
0.1U_0402_10V6K
2
1
C169
0.1U_0402_10V6K
2
1
C244
0.1U_0402_10V6K
2
1
C225
0.1U_0402_10V6K
2
A
1
C177
0.1U_0402_10V6K
2
1
C183
0.1U_0402_10V6K
2
1
C535
0.1U_0402_10V6K
2
1
C220
0.1U_0402_10V6K
2
1
C187
0.1U_0402_10V6K
2
1
C194
0.1U_0402_10V6K
2
1
C249
0.1U_0402_10V6K
2
1
C126
0.1U_0402_10V6K
2
1
C497
0.1U_0402_10V6K
2
1
C440
0.1U_0402_10V6K
2
1
C427
0.1U_0402_10V6K
2
1
C528
0.1U_0402_10V6K
2
B
1
C616
0.1U_0402_10V6K
2
1
C120
0.1U_0402_10V6K
2
1
C219
0.1U_0402_10V6K
2
1
C270
0.1U_0402_10V6K
2
1
C664
0.1U_0402_10V6K
2
1
C115
0.1U_0402_10V6K
2
1
C642
0.1U_0402_10V6K
2
1
C439
0.1U_0402_10V6K
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Title
Size Docu ment Number Re v
Date: Sheet
Compa l Electronics, Inc.
DDR SODIMM Decoupling
LA-2051
星期三 八月
27, 2003
of
15 51,
E
0.1A
A
1 1
B
C
+3VS
HB-1M2012-121JT03_0805
L7
1 2
D
+3V_CLK
Width=40 mils
C145
10U_0805_10V4Z
0.1U_0402_10V6K
1
C141
2
+3VS_VDDA
1
C118
2
0.1U_0402_10V6K
E
0.1U_0402_10V6K
1
C95
2
1
2
0.1U_0402_10V6K
C105
1
2
F
CLK_BCLK CLK_BCLK#
1
C89
2
0.1U_0402_10V6K
R158 @0_0402_5%
1 2
R152 @0_0402_5%
1 2
G
CLK_CPU_ITP 5 CLK_CPU_ITP# 5
H
R146 @10_0402_5%
EXCLK_CLKGEN38
+3VS
12
R577
@10K_0402_5%
R579 0_0402_5%
PM_STPCPU#5,10,26,47
2 2
3 3
PCI_STP#26
1 2 1 2
R580 0_0402_5%
CLK_SB_48M27
CLK_AUDIO_14M32
REFCLK1_NB10
CLK_SIO_14M34 CLK_SB_14M27
CLK_14M_APIC26
12
R578 @10K_0402_5%
R109 33_0402_5%
R159 @33_0402_5% R161 56_0402_5% R165 33_0402_5% R174 33_0402_5%
R173 @33_0402_5%
1 2
C116 10P_0402_50V8K
C112
SMCLK13,14,27 SMDATA13,14,27
VTT_PWRGD17,27
1 2
1 2 1 2 1 2 1 2
1 2
XTALIN_CLK
1 2
12
Y2
XTALOUT_CLK
1 2
14.31818MHZ_20P_6X1430004201 10P_0402_50V8K
12
VTT_PWRGD
PCI33/66#
CLK_48M
FS2 FS1 FS0
CLK_IREF
R144 475_0402_1%
1 2
R150 @1M_0402_5%
35 34
10 45 12 26 11
27 28
38
U16
6
7
4 3 2
XIN
XOUT
SCLK SDATA
VTTPWRGD/PD# CPU_STP# PCI_STOP# 24/48#SEL PCI33/66#SEL
48MHz_1 48MHz_0
FS2/REF2 FS1/REF1 FS0/REF0
IREF
42
VDDCPU
8
48
30
VDDSD
GNDREF5GNDXTAL
18
29
VDD48M
VDDAGP
GNDPCI
GNDPCI
24
13
19
VDDPCI
GND48M
25
33
1
VDDPCI
GNDAGP
46
9
VDDA
VDDREF
VDDXTAL
VSSA
CPUT0
CPUC0 CPUT1
CPUC1
SDRAMOUT
AGPCLK0 AGPCLK1
FS3/PCICLK_F0 FS4/PCICLK_F1
PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5
GNDSD
GNDCPU
ICS951402AGT_TSSOP48
41
36
1
C104
0.1U_0402_10V6K
2
VSSA
37
CLK_BCLK
40
CLK_BCLK#
39
CLK_NB
44
CLK_NB#
43
MEM_66M
47
AGP_66M
32 31
FS3
14
FS4
15
16 17 20 21 22 23
+3VS_VDDA
1
C90
0.1U_0402_10V6K
2
1 2
1 2 1 2
1 2 1 2 1 2
1 2
1
2
C99
10U_0805_10V4Z
R148 33_0402_5%
R142 33_0402_5% R164 33_0402_5%
R156 33_0402_5% R168 33_0402_5% R125 33_0402_5%
R115 33_0402_5%
0.1U_0402_10V6K
C138
R147 49.9_0402_1%
R139 49.9_0402_1%
R163 49.9_0402_1%
R155 49.9_0402_1%
1
2
1 2
1 2
1 2
1 2
1 2
CHB2012U121_0805
1
C110
0.1U_0402_10V6K
2
L4
+3VS
CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4
CLK_NB_BCLK 10
CLK_NB_BCLK# 10 CLK_MEM_66M 10 CLK_AGP_66M 10
CLK_ALINK_SB 26
CLOCK FREQUENCY SELECT TABLE
FS2 MEMFS1
FS3
0 0 0 1 0 0 0 0 0 1
**
0 0 0 0 0
Note: 0 = PULL LOW
4 4
1 = PULL HIGH
FS0
CPUFS4 With Spread Enabled…
200
200
*
133
133 100 100
BSEL15,12 BSEL05,12
Spreaf OFF O R Center spread +/-0.3%
+3VS +3VS
R172
10K_0402_5%
12
12
R167 10K_0402_5%
D20 RB751V_SOD323 D21 RB751V_SOD323
21 21
+3V_CLK
R169
10K_0402_5%
12
12
R171 10K_0402_5%
FS1 FS0 FS2 FS3 FS4 PCI33/66#
12
R166
4.7K_0402_5%
12
R170
4.7K_0402_5%
12
R160
@10K_0402_5%
12
R153 10K_0402_5%
12
R124
@10K_0402_5%
12
R121 10K_0402_5%
12
R120
@10K_0402_5%
12
R123 10K_0402_5%
+3V_CLK
12
12
R127
10K_0402_5%
R133 @10K_0402_5%
A-LINK FREQ
PCI33/66# = HIGH
**
PCI33/66# = LOW 33MHZ
A
66MHZ
B
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS
C
D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
E
F
Size Docu ment Number Re v
Date: Sheet
Compal Electronics, Inc.
Clock Generator
27, 2003
LA-2051
G
星期三 八月
0.1A
of
16 51,
H
A
1 1
VGATE47
2 2
10K_0402_5% R581
1 2
0_0402_5%
1M_0402_5%
R413
R415
+3VS
SN74LVC32APWLE_TSSOP14
12
12
12
R416 1K_0402_5%
B
1 2
+3VALW
A B
C
+3VALW +3VALW +3VALW
14
U10A
P
G
7
O
3
R128
1 2
330K_0402_5%
VTT_PWRGD 16,27
C103
0.1U_0402_16V7K
14
P
1
O2I
G
1
2
U12A
7
SN74LVC14APWLE_TSSOP14
D
14
P
3
O4I
330K_0402_5%
G
U12B
7
SN74LVC14APWLE_TSSOP14
+2.5VS
12
R149 1K_0402_5%
13
D
Q19
2
G
2N7002_SOT23
S
R122
1 2
12
R143 47K_0402_5%
E
0.47U_0603_16V7K
NB_PWRGD 7
F
+3VALW
14
P
5
O6I
G
1
C87
2
U12C
7
SN74LVC14APWLE_TSSOP14
14
P
9
O8I
G
U12D
7
SN74LVC14APWLE_TSSOP14
R97 47_0603_5%
1 2
G
12
R106 10K_0402_5%
H
SB_PWRGD 27
TV-OUT CONN.
3 3
V-PORT-0603-220 M-V05_0603
C360 @33P_0402_50V8J
1 2
TV_LUMA10
TV_CRMA10 TV_COMPS10
4 4
A
B
C
LUMA
CRMA COMPS
12
R377 75_0402_1%
12
R375 75_0402_1%
D
12
R376 75_0402_1%
1
C370 100P_0402_50V8K
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
L23 CHB2012U170_0805
1 2
C359 @33P_0402_50V8J
1 2
L22 CHB2012U170_0805
1 2
1
C371 100P_0402_50V8K
2
E
D31
2 1
LUMA_1
CRMA_1
1
C361 270P_0402_25V8K
2
1
C358 270P_0402_25V8K
2
F
D32
V-PORT-0603-220 M-V05_0603
2 1
JP14
1
1
2
2
3
3
4
4
SUYIN_030008FR004T100ZL
Compal Electronics, Ltd.
Title
CH-7011& TV-CONN.
Size Docu ment Number Re v
Custom
LA-2051
Date: Sheet
星期三 八月
27, 2003
G
17 51,
of
H
0.1A
A
1 1
3.3P_0402_50V8C
INTCRT_R10
INTCRT_G10
INTCRT_B10
+CRT_VCC
1
5
P
4
INTCRT_HSYNC10
2 2
INTCRT_VSYNC10
OE#
A2Y
G
U1
3
SN74AHCT1G125GW_SOT353-5
R22 1K_0402_5%
1 2
1
5
P
4
OE#
A2Y
G
U2
3
SN74AHCT1G125GW_SOT353-5
C365
R367
75_0402_1%
B
@V-PORT-0603-220 M-V05_0603
1
1
C367
2
12
1
3.3P_0402_50V8C
2
L21 FCM2012C-800_0805
1 2
L20 FCM2012C-800_0805
1 2
L19 FCM2012C-800_0805
1 2
12
R369 75_0402_1%
C366
3.3P_0402_50V8C
2
12
R368
75_0402_1%
HSYNC CRT_HSYNC
VSYNC
@V-PORT-0603-220 M-V05_0603
D30
2 1
CRT_R
CRT_G
CRT_B
1
C7 8P_0402_50V8K
2
CHB1608B121_0603
CHB1608B121_0603
C
+5VS
D29
1
C9 8P_0402_50V8K
2
1 2
L18
1 2
L17
27P_0402_50V8J
2 1
D1
2 1
CH491D_SC59
@V-PORT-0603-220 M-V05_0603
1
C10
2
+R_CRT_VCC
1A_6VDC_MINISMDC110
0.1U_0402_16V4Z
D28
2 1
1
C11 8P_0402_50V8K
2
CRT_VSYNC
1
C13 27P_0402_50V8J
2
100P_0402_50V8K
F1
R357
2.2K_0402_5%
21
1
C12
2
1
C14
2
100P_0402_50V8K
+CRT_VCC
12
1
C8
2
12
R359
2.2K_0402_5%
+CRT_VCC
2N7002_SOT23
1
C15 100P_0402_50V8K
2
D
+3VS
12
R21
2.2K_0402_5%
Q34
2
G
1 3
D
S
2
G
Q5
1 3
D
JP12
6
11
1 7
12
2 8
13
14 10
15
CRT Connector
3 9
4
5
SUYIN_070549MR015S200ZU
+3VS
R370 10K_0402_5%
1 2
S
2N7002_SOT23
R23 10K_0402_5%
1 2
E
INTDDCDA 10
INTDDCCK 10
+3VS
12
R384
2
G
4.7K_0402_5%
DISPOFF#
+12VALW
R379 100K_0402_5%
1 2
13
D
S
12
Q54
2N7002_SOT23
2
C386 1000P_0402_50V7K
1
R386 150K_0402_5%
1
C391 1000P_0402_50V7K
2
+3V
1
D
Q37 SI2302DS_SOT23
S
G
3
2
1
C394
0.1U_0402_16V4Z
2
SI2302DS: N CHANNEL VGS: 4. 5 V , RDS : 85 mOHM VGS: 2. 5 V , RDS : 1 15mOHM Id(MAX): 2.8A VGS(MAX): +-8V
B
1
C378
4.7U_1206_16V6K
2
+LCDVDD
1
C387
4.7U_1206_16V6K
2
2
2
G
A
D38
RB751V_SOD323
+12VALW
R391 100K_0402_5%
1 2 13
Q39 DTC124EK_SC59
21
3 3
4 4
100_0402_5%
2N7002_SOT23
ENVDD9
BKOFF#35
+LCDVDD
12
R389
13
D
Q38
S
ENVDD
C373
0.1U_0603_50V4Z
+3VS
B+
1
1
C376 10U_1210_35V4Z
2
2
R378
@0_0402_5%
RP39
PID0 PID1
18 27
PID2 PID3
36
PID3
45
10K_1206_8P4R_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
B+
L25 CHB2012U170_0805
L24
12
+LCDVDD
LCD_B0+10
LCD_B0-10
LCD_B1+10
LCD_B1-10
LCD_B2+10
LCD_B2-10
LCD_BCLK+10
LCD_BCLK-10
PID034 PID134 PID234 PID334
LCD_A0+10
LCD_A0-10
LCD_A1+10
LCD_A1-10
LCD_A2+10
LCD_A2-10
LCD_ACLK+10
LCD_ACLK-10
1 2 1 2
CHB2012U170_0805
BRIG PWM DISP_OFF#
PID0 PID2PID1
IB+
IPEX_20327-030E-01
JP1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
D
Protect for EC
DAC_BRIG35
INVT_PWM35
Title
Size Docu ment Number Re v
Custom
Date: Sheet
+3VALW
D36
R380
1 2
1K_0402_5%
R381
1 2
1K_0402_5%
R382
1 2
1K_0402_5%
BRIG
PWM
DISP_OFF#DISPOFF#
@RB751V
2 1
D37 @RB751V
2 1
Compal Electronics, Ltd.
CRT& LVDS CONN.
LA-2051
星期三 八月
27, 2003
18 51,
E
of
D39 @RB751V
2 1
0.1A
A
B
C
D
E
+3VS
+1394_PLLVDD
+3VS
1K_0402_5%
TPBIAS0 TPA0+ TPA0­TPB0+ TPB0-
+3VS
1
C312
2
1 2
1 2
1
2
1
2
R311
1
C678
0.1U_0402_16V4Z
2
0.01U_0402_16V7K
C313 22P_0402_50V8J
X2
24.576MHz_16P_3XG-24576-43E1
1 2
C314 22P_0402_50V8J
1 2
@10_0402_5%
12
12
1
2
C311
0.1U_0402_16V4Z
L16 BLM21A601SPT_0805
1 2
C306
4.7U_0805_10V4Z
R322
56.2_0402_1%
R325
56.2_0402_1%
C326 220P_0402_50V7K
1
C310
0.1U_0402_16V4Z
2
+3VS
1
C347 1000P_0402_50V7K
2
+3VS
EXCLK_1394 38
12
R563
56.2_0402_1%
12
R328
56.2_0402_1%
12
R330
5.11K_0402_1%
1
C316
0.1U_0402_16V4Z
2
1
C348 1000P_0402_50V7K
2
1
C690
0.33U_0603_16V4Z
2
1
C324
0.1U_0402_16V4Z
2
1
C346 1000P_0402_50V7K
2
SANTA_360302
4
4
3
3
2
2
1
1
JP23
1
C325
0.1U_0402_16V4Z
2
1
C319 1000P_0402_50V7K
2
1
C332
0.1U_0402_16V4Z
2
1
2
1
C334
0.1U_0402_16V4Z
2
C335 1000P_0402_50V7K
+3VS
1 2
4.7K_0402_5%
R568
1 2
10K_0402_5%
+3VS
1 1
PCI_PAR20,22,24,25,26
RP92
PCI_AD[0..31]
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8
PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_C/BE#3 PCI_C/BE#2 PCI_C/BE#1 PCI_C/BE#0
CLK_PCI_1394
PCI_GNT#0 PCI_REQ#0 1394_IDSEL
PCI_FRAME#
PCI_IRDY# PCI_TRDY#
PCI_DEVSEL#
PCI_STOP# PCI_PERR# PCI_PIRQA# 1394_PME# PCI_SERR# PCI_PAR
PCIRST#
SCL_1394 SDA_1394
U29
84
PCI_AD0
82
PCI_AD1
81
PCI_AD2
80
PCI_AD3
79
PCI_AD4
77
PCI_AD5
76
PCI_AD6
74
PCI_AD7
71
PCI_AD8
70
PCI_AD9
69
PCI_AD10
67
PCI_AD11
66
PCI_AD12
65
PCI_AD13
63
PCI_AD14
61
PCI_AD15
46
PCI_AD16
45
PCI_AD17
43
PCI_AD18
42
PCI_AD19
41
PCI_AD20
40
PCI_AD21
38
PCI_AD22
37
PCI_AD23
32
PCI_AD24
31
PCI_AD25
29
PCI_AD26
28
PCI_AD27
26
PCI_AD28
25
PCI_AD29
24
PCI_AD30
22
PCI_AD31
34
PCI_C/BE3
47
PCI_C/BE2
60
PCI_C/BE1
73
PCI_C/BE0
16
PCI_CLK
18
PCI_GNT
19
PCI_REQ
36
PCI_IDSEL
49
PCI_FRAME
50
PCI_IRDY
52
PCI_TRDY
53
PCI_DEVSEL
54
PCI_STOP
56
PCI_PERR
13
PCI_INTA/CINT
21
PCI_PME/CSTSCHG
57
PCI_SERR
58
PCI_PAR
12
PCI_CLKRUN
85
PCI_RST
14
G_RST
89
GPIO3
90
GPIO2
VDDP20VDDP35VDDP48VDDP62VDDP
TSB43AB21A /(TSB43AB22)
PCI BUS INTERFACE
PLLGND18REG_EN9AGND
AGND
AGND
AGND
AGND
AGND
109
110
111
117
126
127
128
AGND
PCI_AD[0..31]20,22,24,25,26,29
2 2
IDSEL:PCI_AD16
PCI_AD16
1 2
R324
3 3
1394_IDSEL
100_0402_5%
PCI_C/BE#320,22,24,25,26 PCI_C/BE#220,22,24,25,26 PCI_C/BE#120,22,24,25,26 PCI_C/BE#020,22,24,25,26
CLK_PCI_139426
PCI_GNT#026 PCI_REQ#026
PCI_FRAME#20,22,24,25,26
PCI_IRDY#20,22,24,25,26 PCI_TRDY#20,22,24,25,26
PCI_DEVSEL#20,22,24,25,26
PCI_STOP#20,22,24,25,26 PCI_PERR#20,22,24,25,26
PCI_PIRQA#9,20,24,26
1394_PME#20,22,24,25,35 PCI_SERR#20,22,24,25,26
PM_CLKRUN#20,22,24,25,26,34,35
PCIRST#10,20,21,22,24,25,26,30,34,35
1 8 2 7 3 6 4 5
220_1206_8P4R_5%
87
78
CYCLEIN
BIAS CU RRENT
OSCILLATOR
FILTER
EEPROM 2 WIRE BUS
POWER CL ASS
PHY PORT 1
DGND17DGND23REG1830DGND33DGND44DGND55DGND64DGND68DGND75DGND83REG1893DGND
R571
1 2
R572
1 2
R556 R557 4.7K_0402_5%
86
96
11
DVDD
CNA
DVDD
TEST1710TEST16
DVDD DVDD DVDD DVDD DVDD DVDD
CYCLEOUT/CARDBUS
PLLVDD
AVDD AVDD AVDD AVDD AVDD
NC/(TPBIAS1)
NC/(TPA1+)
NC/(TPA1-)
NC/(TPB1+)
NC/(TPB1-)
FILTER0 FILTER1
TPBIAS0
TPA0+
TPA0-
TPB0 +
TPB0 -
TEST9 TEST8
TEST3 TEST2 TEST1 TEST0
TSB43AB21A_PQFP128
103
CPS
SDA SCL PC0
PC1 PC2
R0
R1 X0
X1
4.7K_0402_5%
4.7K_0402_5%
12
15 27 39 51 59 72 88 100 7 1 2 107 108 120
1 2
106
R334
125 124 123 122 121
118
1 2
R317
6.34K_0402_1%
119 6
5
C682
3
0.1U_0402_16V4Z
4
SDA_1394
92
SCL_1394
91 99
98 97
116 115 114 113 112
94 95
101 102 104 105
1 2
1
C315
CLK_PCI_1394
4 4
A
12
R309 @10_0402_5%
1
C305 @10P_0402_50V8K
2
B
0.1U_0402_16V4Z
2
1
C698
2
0.1U_0402_16V4Z
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Compal Electronics, Inc.
Title
TI 1394 Controller TSB43AB21A
Size Do cum e nt Number R e v
Custom
LA-2051
D
Dat e : Sheet
期三 八月
19 51¬P , 27, 2003
E
of
5
4
3
2
1
CARD BUS AD20 REQ#2/GNT#2 PCI_PIRQA#
D D
+S1_VCC
+3V
1
C284
4.7U_0805_10V4Z
VPPD021
VPPD121 VCCD0#21 VCCD1#21
+3V
12
10K_0402_5% R306
21
R256 @33_0402_5%
C222 @10P_0402_50V8K
PCI_A D[0..31]
PCI_C/BE#319,22,24,25,26 PCI_C/BE#219,22,24,25,26 PCI_C/BE#119,22,24,25,26 PCI_C/BE#019,22,24,25,26
PCIRST#10,19,21,22,24,25,26,30,34,35
PCI_FRAME#19,22,24,25,26
PCI_IRDY#19,22,24,25,26
PCI_TRDY#19,22,24,25,26
PCI_DEVSEL#19,22,24,25,26
PCI_STOP#19,22,24,25,26
PCI_PERR#19,22,24,25,26
PCI_SERR#19,22,24,25,26
PCI_PAR19,22,24,25,26 PCI_REQ#226 PCI_GNT#226
CLK_PCI_CB26
PCM_PME#19,22,24,25,35
PCI_AD20
1 2
R257 100_0603_1%
PCI_PIRQA#9,19,24,26
SERIRQ26,34,35
PM_CLKRUN#19,22,24,25,26,34,35
CBRST#21,24
PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0
CLK_PCI_PCM
PCM_ID
PM_CLKRUN#
10 11 15 16 17 19 23 24 25 26 38 39 40 41 43 45 46 47 49 51 52 53 54 55 56 57
12 27 37 48
20 28 29 31 32 33 34 35 36
21 59
70 13 60
61 64 65 67 68 69
66
PCI_AD [0 ..3 1 ]19,22,24,25,26,29
C C
B B
SUSP#32,35,36,40
D24 RB751V_SOD323
CLK_PCI_PCM
A A
12
1
2
2
U25
3
AD31
4
AD30
5
AD29
7
AD28
8
AD27
9
AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
C/BE3# C/BE2# C/BE1# C/BE0#
RST# FRAME# IRDY# TRDY# DEVSEL# STOP# PERR# SERR# PAR
1
REQ#
2
GNT# PCLK
RI_OUT#/PME# SUSPEND#
IDSEL MFUNC0
MFUNC1 MFUNC2 MFUNC3 MFUNC4 MFUNC5 MFUNC6
VCC/GRST#
1
C285
0.1U_0402_16V4Z
2
18
44
72
74
VPPD071VPPD1
VCCP1
VCCP0
VCCD0#73VCCD1#
PQFP 144
22.2 X 22.2 X 1.60
GND1
GND2
GND3
GND4
GND5
6
22
42
58
78
94
126
GND6
114
1
C280
0.1U_0402_16V4Z
2
90
102
122
138
VCC2
VCC1
VCCSK1
VCCSK0
RSVD/D14
GND7
GND8
84
100
130
1
C278
0.1U_0402_16V4Z
2
+3V
+3V
14
30
50
86
VCC6
VCC5
VCC4
VCC3
CAD15/IOWR#
CAD13/IORD#
CAD10/CE2#
CC/BE3#/REG#
CC/BE2#/A12 CC/BE0#/CE1# CRST#/RESET
CFRAME#/A23
CTRDY#/A22
CDEVSEL#/A21
CSTOP#/A20 CPERR#/A14
CSERR#/WAIT#
CREQ#/INPACK#
CSTSCHG/BVD1
CCLKRUN#/WP
CBLOCK#/A19 CINT#/READY
CAUDIO/BVD2
CCD2#/CD2# CCD1#/CD1#
RSVD/A18
RSVD/D2
PCI1410_LQFP144
143
1 2
C232
0.1U_0402_16V4Z
63
VCCI
VCC7
CAD31/D10
CAD30/D9 CAD29/D1 CAD28/D8 CAD27/D0
CAD26/A0 CAD25/A1 CAD24/A2 CAD23/A3 CAD22/A4 CAD21/A5 CAD20/A6
CAD19/A25
CAD18/A7 CAD17/A24 CAD16/A17
CAD14/A9 CAD12/A11
CAD11/OE#
CAD9/A10
CAD8/D15
CAD7/D7
CAD6/D13
CAD5/D6
CAD4/D12
CAD3/D5
CAD2/D11
CAD1/D4 CAD0/D3
CC/BE1#/A8
CIRDY#/A15
CPAR/A13
CGNT#/WE#
CCLK/A16
SPKOUT
CVS2/VS2# CVS1/VS1#
+3V
C288
0.1U_0402_16V4Z
1
C308
2
S1_A[0..25] 21 S1_D[0..15] 21
1
C254
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1
1
C307
2
2
0.1U_0402_16V4Z
S1_D10
144
S1_D9
142
S1_D1
141
S1_D8
140
S1_D0
139
S1_A0
129
S1_A1
128
S1_A2
127
S1_A3
124
S1_A4
121
S1_A5
120
S1_A6
118
S1_A25
116
S1_A7
115
S1_A24
113
S1_A17
98
S1_IOWR#
96
S1_A9
97
S1_IORD#
93
S1_A11
95
S1_OE#
92
S1_CE2#
91
S1_A10
89
S1_D15
87
S1_D7
85
S1_D13
82
S1_D6
83
S1_D12
80
S1_D5
81
S1_D11
77
S1_D4
79
S1_D3
76
S1_REG#
125
S1_A12
112
S1_A8
99
S1_CE1#
88
S1_RST
119
S1_A23
111
S1_A15
110
S1_A22
109
S1_A21
107
S1_A20
105
S1_A14
104
S1_WAIT#
133
S1_A13
101
S1_INPACK#
123
S1_WE#
106
A16_CLK
108
S1_BVD1
135
S1_WP
136
S1_A19
103
S1_RDY#
132
PCM_SPK#
62
S1_BVD2
134 137
75
S1_VS2
117
S1_VS1
131
S1_D2 S1_A18 S1_D14
S1_IOWR# 21 S1_IORD# 21 S1_OE# 21
S1_CE2# 21
S1_REG# 21
S1_CE1# 21 S1_RST 21
S1_WAIT# 21 S1_INPACK# 21
S1_WE# 21
1 2
R310 33_0402_5%
S1_BVD1 21 S1_WP 21
S1_RDY# 21 PCM_SPK# 33
S1_BVD2 21
S1_VS2 21 S1_VS1 21
C231
1
2
0.1U_0402_16V4Z
S1_A16
0.1U_0402_16V4Z
1
C257
2
S1_A[0..25]
S1_D[0..15]
1 2
C260 0.1U_0402_16V4Z
1 2
C309 0.1U_0402_16V4Z
C272
1
2
0.1U_0402_16V4Z
S1_CD2# 21 S1_CD1# 21
Compal Electronics, Ltd.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
CardBus Controller<TI PCI1410>
Size Docu ment Number Re v
Custom
LA-2051
Date: Sheet
星期三 八月
27, 2003
20 51,
1
of
0.1A
PCMCIA Power Controller
C119 1U_0805_25V4Z
C131
0.1U_0402_16V4Z
C135
0.1U_0402_16V4Z
+12VALW
1
2
1
2
1
2
U17
9
12V
+5VALW
5
5V_1
6
5V_2
+3VALW
3
3.3V_1
4
3.3V_2
+3VALW
1
C140 10U_0805_10V4Z
2
PCIRST#10,19,20,22,24,25,26,30,34,35 CBRST# 20,24
AVCC1 AVCC2 AVCC3
AVPP
VCCD0# VCCD1#
VPPD0 VPPD1
GND
SHDN#
7
TPS2211IDBR_SSOP16
16
CBRST#
OC#
+5VALW
+S1_VCC
13 12 11
10
1 2 15 14
8
1
C129 10U_0805_10V4Z
2
+3V
1P14
3
OE#
I2O
G
U18A
7
SN74LVC125APWLE_TSSOP14
+3V POWER
1
C134
0.1U_0402_16V4Z
2
+S1_VPP
PCMRST# 35
CBRST#
1
C128 1U_0805_25V4Z
2
VCCD0# 20 VCCD1# 20 VPPD0 20 VPPD1 20
+3V
12
R189 10K_0402_5%
C199
0.01U_0402_25V4Z
C204
0.1U_0402_16V4Z
+S1_VPP
1
2
+S1_VCC
1
2
S1_A23
S1_WP
S1_OE#
1
2
1
2
1 2
R217 22K_0402_5%
1 2
R151 22K_0402_5%
1 2
R262 43K_0402_5%
C198
4.7U_1206_16V4Z
C205 10U_0805_10V4Z
S1_A[0..25]20
S1_D[0..15]20
S1_A[0..25]
S1_D[0..15]
CardBus Socket
JP18
S1_D3 S1_D4 S1_D5 S1_D6 S1_D7
S1_CE1#20 S1_OE#20
S1_WE#20 S1_RDY#20
+S1_VPP +S1_VPP
S1_WP20
+S1_VCC
+S1_VCC
+S1_VCC
S1_CE1# S1_A10 S1_OE# S1_A11 S1_A9 S1_A8 S1_A13 S1_A14 S1_WE# S1_RDY#
S1_A16 S1_A15 S1_A12 S1_A7 S1_A6 S1_A5 S1_A4 S1_A3 S1_A2 S1_A1 S1_A0 S1_D0 S1_D1 S1_D2 S1_WP
1 3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83
FOXCONN_1CA415M1-TA_68P
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 GND GND GND GND GND GND GND GND
(APL11)
GND GND GND GND GND GND GND GND
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
54
56
56
58
58
60
60
62
62
64
64
66
66
68
68
70 72 74 76 78 80 82 84
S1_CD1# S1_D11 S1_D12 S1_D13 S1_D14 S1_D15 S1_CE2# S1_VS1 S1_IORD# S1_IOWR# S1_A17 S1_A18 S1_A19 S1_A20 S1_A21
S1_A22 S1_A23 S1_A24 S1_A25 S1_VS2 S1_RST S1_WAIT# S1_INPACK# S1_REG# S1_BVD2 S1_BVD1 S1_D8 S1_D9 S1_D10 S1_CD2#
S1_CD1# 20
S1_CE2# 20 S1_VS1 20 S1_IORD# 20 S1_IOWR# 20
+S1_VCC+S1_VCC
S1_VS2 20 S1_RST 20 S1_WAIT# 20 S1_INPACK# 20 S1_REG# 20 S1_BVD2 20 S1_BVD1 20
S1_CD2# 20
S1_CE1#
1 2
R265
S1_CE2#
S1_RST
43K_0402_5%
1 2
R263 43K_0402_5%
1 2
R195 43K_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THI S SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+S1_VCC
+S1_VCC
+S1_VCC
Compal Electronics, Ltd.
Title
PCMCIA SOCKET
Size Docu ment Number Re v
Custom
LA-2051
Date: Sheet
星期三 八月
27, 2003
of
21 51,
0.1A
5
4
3
2
1
LAN AD19 REQ#1/GNT#1 PCI_PIRQD#
+2.5V_LAN_1
2
D D
PCI_AD0 PCI_AD1
PCI_AD[0..31]19,20,24,25,26,29
C C
B B
CLK_PCI_LAN
12
R98
@10_0402_5%
1
C84 @10P_0402_50V8K
2
PCI_AD[0..31]
PCI_C/BE#019,20,24,25,26 PCI_C/BE#119,20,24,25,26 PCI_C/BE#219,20,24,25,26 PCI_C/BE#319,20,24,25,26
PCI_AD19 LAN_IDSEL
PCI_PAR19,20,24,25,26
PCI_FRAME#19,20,24,25,26
PCI_IRDY#19,20,24,25,26
PCI_TRDY#19,20,24,25,26
PCI_DEVSEL#19,20,24,25,26
PCI_STOP#19,20,24,25,26
PCI_PERR#19,20,24,25,26 PCI_SERR#19,20,24,25,26
PCI_REQ#126
PCI_GNT#126
PCI_PIRQD#24,25,26
LAN_PME#19,20,24,25,35
PCIRST#10,19,20,21,24,25,26,30,34,35
CLK_PCI_LAN26
PM_CLKRUN#19,20,24,25,26,34,35
PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_C/BE#0 PCI_C/BE#1 PCI_C/BE#2 PCI_C/BE#3
1 2
R108 100_0402_5%
CLK_PCI_LAN
+3V
U11
47
AD0
46
AD1
45
AD2
43
AD3
42
AD4
41
AD5
40
AD6
39
AD7
36
AD8
35
AD9
34
AD10
33
AD11
32
AD12
30
AD13
29
AD14
28
AD15
15
AD16
14
AD17
13
AD18
12
AD19
11
AD20
10
AD21
9
AD22
8
AD23
96
AD24
93
AD25
92
AD26
91
AD27
89
AD28
87
AD29
86
AD30
85
AD31
38
C/BE#0
27
C/BE#1
17
C/BE#2
84
C/BE#3
98
IDSEL
24
PAR
18
FRAME#
19
IRDY#
20
TRDY#
21
DEVSEL#
23
STOP#
25
PERR#
26
SERR#
83
REQ#
82
GNT#
80
INTA#
79
INTB#
57
PME#
81
RST#
97
PCICLK
50
CLKRUN#
6
VDD
22
VDD
37
VDD
Power
49
VDD
90
VDD
95
VDD
RTL8101L_LQFP100
48
VDD25
94
VDD25
58
AVDD25
59
AVDD
70
AVDD
75
AVDD
Power
52
EEDO
53
EEDI
54
EESK
55
EECS
78
LED0
77
LED1
76
LED2
72
TXD+
71
TXD-
68
RXIN+
67
RXIN-
61
X1
60
X2
64
LWAKE
LAN I/F
PCI I/F
AC-Link
ROMCS/OE#
ISOLATE#
RTSET
RTT3
VCTRL
AC_RST#
AC_SYNC
AC_DOUT
AC_DIN
AC_BCK
GPIO0 GPIO1
DGND1 DGND2 DGND3 DGND4 DGND5 AGND1 AGND2 AGND3
74 65 63 56 1
3 4 5 7
100 99
51 69
NC
2 16 31 44 88 62 66 73
C71
0.1U_0402_16V4Z
1
+2.5V_LAN +3V_LAN_VDD1 +3V_LAN_VDD2 +3V_LAN_VDD3
LAN_EEDO LAN_EEDI LAN_EECLK LAN_EECS
ACTIVITY# LINK10_100#
LAN_TD+ LAN_TD­LAN_RD+ LAN_RD-
LAN_X1
LAN_X2
1 2
R80 1K_0402_5%
1 2
R79 15K_0402_5%
1 2
R78
5.6K_0603_1%
TRACE=20mil
TRACE=20mil
TRACE=20mil
TRACE=20mil
R394 5.6K_0402_5%
1 2
LAN_X1 LAN_X2
25MHZ_20P_1BX25000CK1A
1
C53 27P_0402_50V8J
2
TRACE=20mil
2
C61
0.1U_0402_16V4Z
1
U42
4
DO
GND
3
DI
2
SK
1
CS
VCC
AT93C46-10SI-2.7_SO8
ACTIVITY# 23 LINK10_100# 23
LAN_RD+ 23 LAN_RD- 23
+3VS
Y1
12
R88
12
0_0805_5%
+3V
5 6
NC
7
NC
8
1
C38
0.1U_0402_16V4Z
2
49.9_0603_1%
1
C54 27P_0402_50V8J
2
+2.5V_LAN
+3V
12
R76
1
2
Place as close to U4(LAN Chip)
1 2
C56 22U_1206_16V4Z_V1
1 2
0.1U_0402_16V4Z
C52
1 2
0.1U_0402_16V4Z
C55
1 2
0.1U_0402_16V4Z
C57
1 2
0.1U_0402_16V4Z
C51
LAN_TD+ 23 LAN_TD- 23
12
R77
49.9_0603_1%
C49
0.1U_0402_16V4Z
1 2
L2LQG21N4R7K10_0805
Place closed to RTL8101L pin58
RTL8101L has internal +2.5V generator at pin58
+2.5V_LAN +3V
TRACE=30mil
+3V
1
C69
0.1U_0402_16V4Z
2
+3V
1
C60
0.1U_0402_16V4Z
2
1
C77
0.1U_0402_16V4Z
2
1
C67
0.1U_0402_16V4Z
2
1
C97
0.1U_0402_16V4Z
2
1
C98
0.1U_0402_16V4Z
2
A A
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
LAN REALTEK RTL8101L
Size Do cum e nt Number R e v
LA-2051
Dat e : Sheet
期三 八月
1
of
22 51¬P , 27, 2003
5
4
3
2
1
Keep O u t 40mil
Layout Note H0013 pls close to
LAN_TD+22 LAN_TD-22
R388
49.9_0603_1%
2
conn.
47K
10K
+3V
1 3
LAN_RD+ LAN_RD-
LAN_TD+
LAN_TD-
1
2
Q10 DTA114YKA_SC59
R49
1 2
300_0402_5%
U38
1
RD+
2
RD-
3
CT
4
NC
5
NC
6
CT TD+7TX+
8
TD-
H0013
C393
0.1U_0402_16V4Z
+Amber_LED
RX+
RX-
CT NC NC CT
TX-
16 15 14 13 12 11 10 9
R26
75_0402_5%
RJ45_RX+ RJ45_RX-
RJ45_TX+ RJ45_TX-
12
12
R27 75_0402_5%
RJ45_GND
+Green_LED
LAYOUT NOTICE: This area do not connect to power plan include Vcc and GND in any layer
RJ45_GND
+Amber_LED
RJ45_RX-
RJ45_RX+ RJ45_TX­RJ45_TX+
R33
75_0402_5%
T=10mil
T=10mil
1 2
1 2
1000P_1206_2KV7K
JP15
12
Amber LED+
11
Amber LED-
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
10
Green LED-
9
Green LED+
R32 75_0402_5%
C24
1 2
Termination plane should be copled to chassis ground and also depends on safety concern
1
C5
@0.1U_0402_16V4Z
2
SHLD4 SHLD3
SHLD2 SHLD1
SANTA_130401-1
16 15
14 13
LANGND
1
C6 @4.7U_0805_10V4Z
2
D D
LAN_RD+22 LAN_RD-22
12
R387
49.9_0603_1%
C C
B B
Place as close to Magnetic ( U3)
ACTIVITY#22
12
1
C395
0.1U_0402_16V4Z
2
ACTIVITY#
+3V
47K
Q12 DTA114YKA_SC59
LINK10_100#22
A A
5
LINK10_100#
10K
2
1 3
R61
1 2
300_0402_5%
+Green_LED
Compal Electronics, Ltd.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
RJ11/RJ45 Connector
Size Docu ment Number Re v
Custom
LA-2051
Date: Sheet
星期三 八月
27, 2003
23 51,
1
of
0.1A
1
R516 0_0402_5%
+3VS
+3V
1 1
2 2
3 3
4 4
PCI_AD[0..3 1 ]19,20,22,25,26,29
CLK_PCI_USB20
12
R243 @10_0402_5%
1
C221 @15P_0402_50V8J
2
PCI_C/B E # [0 ..3 ]19,20,22,25,26
PCI_AD23
PM_CLKRUN#19,20,22,25,26,34,35
PCI_REQ#325,26 PCI_REQ#425,26
PCI_GNT#325,26 PCI_GNT#425,26
PCI_A D[0..31]
PCI_C/BE#[0..3]
PCI_FRAME#19,20,22,25,26
PCI_IRDY#19,20,22,25,26
PCI_TRDY#19,20,22,25,26
PCI_STOP#19,20,22,25,26
R241 100_0402_5%
PCI_DEVSEL#19,20,22,25,26
PCI_PERR#19,20,22,25,26
PCI_SERR#19,20,22,25,26 PCI_PIRQA#9,19,20,26 PCI_PIRQC#25,26 PCI_PIRQD#22,25,26
CLK_PCI_USB2026
USB20_PME#19,20,22,25,35
+3V
R510 1.5K_0402_5% R303 1.5K_0402_5% R511 1.5K_0402_5%
PM_CLKRUN#
R302 0_0402_5% R301 @0_0402_5%
PCI_REQ#3 PCI_REQ#4 PCI_GNT#3 PCI_GNT#4
1 2
R532 @0_0402_5%
1 2
PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 USB20_NEC_P0-_R PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0
PCI_C/BE#3 PCI_C/BE#2 PCI_C/BE#1 PCI_C/BE#0
PCI_PAR19,20,22,25,26
CBRST#20,21
USB_SMI#27
PCIRST#10,19,20,21,22,25,26,30,34,35
PCI_PAR PCI_FRAME# PCI_IRDY# PCI_TRDY# PCI_STOP#
1 2
PCI_DEVSEL# PCI_REQ# PCI_GNT# PCI_PERR# PCI_SERR# PCI_PIRQA# PCI_PIRQC# PCI_PIRQD# CLK_PCI_USB20
1 2 1 2 1 2
1 2 1 2
R493 @0_0402_5%
1 2
R494 0_0402_5%
1 2
R495 @0_0402_5%
1 2
R496 0_0402_5%
1 2
A6 B6
C5
A5
C4
B5 A4
B4 C1 C2 D2 D1 D3
E1
E3
F2
J1
J2
K3
K1
L3
K2
L1
L2 M1 N3 M3 N4
P4 N5
P5 M5
C3
F1
J3 M2
J4
F3
F4 G1 G3
B3 G2 C6 D6 H2 H1 C7
B7
A7
A8
B8 D9
L6
L7
P6 M6
C9
N6
2
+3VS_USBPCI
U27
AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
CBE3# CBE2# CBE1# CBE0#
PAR FRAME# IRDY# TRDY# STOP# IDSEL DEVSEL# REQ0# GNT0# PERR# SERR# INTA# INTB# INTC# PCLK VBBRST# PME#
SMI# LEGC
N.C. N.C
VCCRST#
CRUN#
PCI_REQ# PCI_GNT#
+3V +3V_USB20
P2
P3
P12
H3
A13
M4
VDD_PCI
VDD_PCI
A12
C8
A3
VDD
VDD
VDD
VDD
VDD
VDD_PCI
VDD
USB 2.0 CONTROLLER uPD720101F1-EA8 FBGA144
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B1
A2
B2
N1
P10
N14
B14
H14
0.1U_0402_10V6K
N2
B13
N13
M11
3
R266 @10_0402_5%
1 2
30Mhz 1 6pf 30ppm
N10
N12
J13
H13
F13
D13
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
D8
G4
J11
F11
1
C593
2
0.1U_0402_10V6K
D7
G12
H4
VDD
VDD
VDD
0.1U_0402_10V6K
1
C623
2
AVDD
P13
AVSS
M12
AVDD
AVSS
1
2
L9
XT1/SCLK
P8
XT2
M14
RSDM1
M13
DM1
L14
DP1
K13
RSDP1
K14
RSDM2
K12
DM2
J14
DP2
J12
RSDP2
H11
RSDM3
G11
DM3
G13
DP3
G14
RSDP3
F12
RSDM4
F14
DM4
E12
DP4
E14
RSDP4
E13
RSDM5
D14
DM5
C13
DP5
C14
RSDP5
P11
RREF
N11
AVSS(R)
B12
OCI1
B11
OCI2
B10
OCI3
A10
OCI4
B9
OCI5
C12
PPON1
A11
PPON2
C11
PPON3
C10
PPON4
A9
PPON5
M8
NTEST1
M7
SMC
P7
AMC
N7
TEB
L8
TEST
M10
NANDTEST
M9
SRCLK
N9
SRDTA
P9
SRMOD
UPD720101F1-EA8_FBGA144
0.1U_0402_10V6K
1
C644
C648
2
0.1U_0402_10V6K
16P_0603_50V8J
USB20_NEC_P0­USB20_NEC_P0+ USB20_NEC_P0+_R
USB20_NEC_P1-_R USB20_NEC_P1­USB20_NEC_P1+ USB20_NEC_P1+_R
USB20_NEC_P2-_R USB20_NEC_P2­USB20_NEC_P2+ USB20_NEC_P2+_R
USB20_NEC_P3­USB20_NEC_P3+
USB20_NEC_P4­USB20_NEC_P4+
9.1K_0402_1%
R304
OVCUR_USB20#0 OVCUR_USB20#1
OVCUR_USB20#3 OVCUR_USB20#4
1 2
R315 1.5K_0402_5%
1 2
R299 @1.5K_0402_5%
R300
1.5K_0402_5%
1 2
1
C223
2
10U_0805_10V4Z
E2
N8
L13
VDD
VDD
VSS
VSS
L12
D12
H12
+3V +3V_USB20
C594
Y3
1 2
1
C242
+3V_USB20
12
10U_0805_10V4Z
1
2
R273
100_0402_5%
2
R530 36_0603_1%
1 2
R524 36_0603_1%
1 2
R525 36_0603_1%
1 2
R508 36_0603_1%
1 2
R509 36_0603_1%
1 2
R507 36_0603_1%
1 2
1
C293 @0.1U_0402_10V6K
2
1
C296 @0.1U_0402_10V6K
2
OVCUR_USB20#0 31 OVCUR_USB20#1 31 OVCUR_USB20#2 31
R245 10K_0402_5%
1 2
R244 10K_0402_5%
1 2
+3V
1 2
R305 0_0603_5%
1
C295
2
R551 0_0603_5%
1 2
EXCLK_USB20 38
12
1
C286 16P_0603_50V8J
2
R292 @0_0402_5%
U28
8
VCC
7
WC
6
SCL
5
SDA
AT24C02N-10SC-2.7_SO8
+3V
1
C646
2
0.1U_0402_10V6K
L
1 2
0.1U_0402_10V6K
C647
4
Note: PL AC E C LO SE T O USB2.0 CONTROLLER For NEC USB2.0 only .
USB20_NEC_P0- 31 USB20_NEC_P0+ 31
USB20_NEC_P1- 31 USB20_NEC_P1+ 31
USB20_NEC_P2- 31 USB20_NEC_P2+ 31
+3V
1
C317
2
1
A0
2
A1
3
A2
4
GND
1
1
C655
2
2
10U_0805_10V4Z
USB20_NEC_P0­USB20_NEC_P0+
USB20_NEC_P1­USB20_NEC_P1+ USB20_NEC_P2­USB20_NEC_P2+
USB20_NEC_P3­USB20_NEC_P3+ USB20_NEC_P4­USB20_NEC_P4+
@0.1U_0402_10V6K
1
C654 10U_0805_10V4Z
2
5
L
Note: PL AC E C LO SE T O USB2.0 CONTROLLER For NEC USB2.0 only .
R297 15K_0402_5%
1 2
R298 15K_0402_5%
1 2
RP83
1 8 2 7 3 6 4 5
15K_1206_8P4R_5%
RP66
1 8 2 7 3 6 4 5
15K_1206_8P4R_5%
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS
1
2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
4
Size Docu ment Number Re v
Date: Sheet
Compal Electronics, Inc.
NEC uPD720101 - USB2.0 Controller
27, 2003
LA-2051
5
星期三 八月
0.1A
of
24 51,
1
C253
2
1000P_0402_50V7K
1
C143
0.1U_0402_16V4Z
2
1
C96
0.1U_0402_16V4Z
2
+3VS_MINIPCI
+5VS_MINIPCI
1
2
WL_OFF#35 KILL_SW#35,37
1 2
+3V
CHB1608B121_0603
0.1U_0402_16V4Z
C262 10U_0805_10V4Z
12
1
2
L11
C259
CLK_PCI_MINI
R270 @33_0402_5%
C252 @10P_0402_50V8K
2
1
+3V
5
1
P
B
2
A
G
3
W=40mils
CLK_PCI_MINI26
2
C235
0.1U_0402_16V4Z
1
PM_CLKRUN#19,20,22,24,26,34,35
+5VS_MINIPCI
+5VS_MINIPCI
C202
1 2
0.1U_0402_16V4Z
U20
4
Y
TC7SH08FU_SSOP5
INTB#
PCI_PIRQD#22,24,26
PCI_REQ#324,26
PCI_C/BE#319,20,22,24,26
PCI_C/BE#219,20,22,24,26
PCI_IRDY#19,20,22,24,26
PCI_SERR#19,20,22,24,26
PCI_C/BE#119,20,22,24,26
1 2
LAN RES ERVED
RB751V_SOD323
D23
PCI_PIRQD#
PCI_AD31 PCI_AD29
PCI_AD27 PCI_AD25
PCI_AD21 PCI_AD19
PCI_AD17
PCI_AD12 PCI_AD10
PCI_AD8 PCI_AD7
PCI_AD5 PCI_AD3
W=30mils
PCI_AD1
L5 0_0603_5%
0603
AD18 REQ#3/GNT#3 PCI_ PIRQC#
MINI_PCI SOCKET
TIP RING
21
W=30mils W=20mils
JP19
112
KEY KEY
334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152 535354 555556 575758 595960 616162 636364 656566 676768 696970 717172 737374 757576 777778 797980 818182 838384 858586 878788 898990 919192 939394 959596 979798 9999100
101
101
102
103
103
104
105
105
106
107
107
108
109
109
110
111
111
112
113
113
114
115
115
116
117
117
118
119
119
120
121
121
122
123
123
124
KEYLINK_5305-4-211
2 4
6 8
LAN RESERVED
10 12 14 16 18
PCI_PIRQC#
20 22
W=40mils
24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124
MINI_RST#
PCI_AD30 PCI_AD28
PCI_AD26 PCI_AD24
MINI_IDSELPCI_AD23
PCI_AD22 PCI_AD20
PCI_AD18 PCI_AD16
2
1
W=30mils
+3V
1 2
R232
PCI_AD15PCI_AD14 PCI_AD13 PCI_AD11
PCI_AD9
PCI_AD6 PCI_AD4 PCI_AD2 PCI_AD0
+3V+5VS
C100
0.1U_0402_16V4Z
PCI_A D[0..31]
+5VS_MINIPCI PCI_PIRQC# 24,26
PCI_GNT#4 24,26PCI_REQ#424,26
PCIRST# 10,19,20,21,22,24,26,30,34,35 PCI_GNT#3 24,26 WLANPME# 19,20,22,24,35
PCI_AD18
100_0402_5%
PCI_PAR 19,20,22,24,26
PCI_FRAME# 19,20,22,24,26 PCI_TRDY# 19,20,22,24,26 PCI_STOP# 19,20,22,24,26
PCI_DEVSEL# 19,20,22,24,26PCI_PERR#19,20,22,24,26
PCI_C/BE#0 19,20,22,24,26
PCI_AD[0..31] 19,20,22,24,26,29
W=40mils
C238
0.1U_0402_16V4Z
2
1
+3VS_MINIPCI
L14
1 2
CHB1608B121_0603
2
C234
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
C186
+3V
+3VS_MINIPCI
1
2
1
C152 10U_0805_10V4Z
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THI S SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Compal Electronics, Ltd.
Title
Min i PCI Slot
Size Docu ment Number Re v
Custom
LA-2051
星期三 八月
Date: Sheet
27, 2003
of
25 51,
0.1A
5
A_AD[0..31]9,12
A_CBE#[0..3]9,12
+CPU_CORE
D D
Q50 MMBT3904_SOT23
H_FERR#5
H_RESET#5,7
+3VS
C C
PM_STPCPU#
H_INIT# H_A20M# H_SLP# H_INTR H_NMI H_SMI# H_STPCLK# H_IGNNE#
Y4
32.768KHZ_12.5P_CM155
R228
1
C521
2
12P_0402_50V8K
1 2
20M_0603_5%
12P_0402_50V8K
H_SLP# H_SMI# H_STPCLK# H_IGNNE# H_A20M# H_INIT# H_INTR H_NMI
B B
A A
3 1
+CPU_CORE
Q49 @MMBT3904_SOT23
3 1
R513 8.2K_0402_5%
RTCX1RTCX2
1
C534
2
C707 180P_0603_50V8J C708 180P_0603_50V8J C709 180P_0603_50V8J C710 180P_0603_50V8J C406 180P_0603_50V8J C402 180P_0603_50V8J C403 180P_0603_50V8J C405 180P_0603_50V8J
A_AD[0..31] A_CBE#[0..3]
12
R502 10K_0402_5%
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
PM_DPRSLPVR47
CLK_14M_APIC16
12 12 12 12 12 12 12 12
+3VS
12
R499 330_0402_5%
H_CPUFERR#
+3VS
12
A_SERR#
+3VS
12
R522
4.7K_0402_5%
100K_0402_5%
330_0402_5%
CPURSTIN#
12
R559 470_0402_5%
2
12
R558 470_0402_5%
2
+3VS
12
PCI_STP#
R486 200_0402_5% R402 200_0402_5% R395 200_0402_5% R396 200_0402_5% R400 200_0402_5% R397 200_0402_5% R398 200_0402_5% R399 200_0402_5%
12
R233 20M_0603_5%
R503 8.2K_0402_5%
PULL DOWN FOR S3
12
R512 @10_0402_5%
1
R501
+CPU_CORE
R487
1 2
R492 0_0402_5%
1 2
C624 @15P_0402_50V8J
2
CLK_14M_APIC
12
R481 @10_0402_5%
1
C573 @15P_0402_50V8J
2
R498 10K_0402_5% R491 10K_0402_5% R489 @300_0402_1% R490 1K_0402_1%
0.1U_0402_10V6K
PLACE CLOSE TO CPU SOCKET
5
4
CLK_ALINK_SB16
1 2
CLK_ALINK_SB
A_STROBE#9
A_DEVSEL#9
A_ACAT#9
A_END#9
A_PAR9,12
A_OFF#9
A_SBREQ#9 A_SBGNT#9
PM_STPCPU#5,10,16,47
PCI_STP#16 PCI_PIRQA#9,19,20,24 PCI_PIRQC#24,25
PCI_PIRQD#22,24,25
H_PWRGD5
H_INTR5
H_NMI5 H_INIT#5 H_SMI#5
H_SLP#5
H_IGNNE#5
H_A20M#5
H_STPCLK#5
1 2 1 2 1 2 1 2
1
C101
2
R119
10K_0402_5%
NBRST# NB_RST#
SN74LVC14APWLE_TSSOP14
4
CLK_ALINK_SB
NBRST# A_AD0
A_AD1 A_AD2 A_AD3 A_AD4 A_AD5 A_AD6 A_AD7 A_AD8 A_AD9 A_AD10 A_AD11 A_AD12 A_AD13 A_AD14 A_AD15 A_AD16 A_AD17 A_AD18 A_AD19 A_AD20 A_AD21 A_AD22 A_AD23 A_AD24 A_AD25 A_AD26 A_AD27 A_AD28 A_AD29 A_AD30 A_AD31 A_CBE#0 A_CBE#1 A_CBE#2 A_CBE#3 A_STROBE# A_DEVSEL# A_ACAT# A_END# A_PAR A_OFF# A_SERR# A_SBREQ# A_SBGNT#
PM_STPCPU# PCI_STP#
PCI_PIRQA# PCI_PIRQB#
PCI_PIRQC# PCI_PIRQD#
RTCX1
RTCX2
CPURSTIN#
H_A20M# H_CPUFERR#
GPIO0 SB_APIC_D0
SB_APIC_D1
+3VALW
PCI_RST#
11
12
SN74LVC14APWLE_TSSOP14
+3VALW +3VALW
14
U19A
P
1
O2I
G
7
B22
R22 H22
P23
L23 N23 N22 M23 M22
K22 M21 M20
L21
K21
L20 N21
K23
K20
F23 G21
F20 H21
F22
F21 G20
E21
E20 D23 D22
E22 D20 C23 D21 C22
L22
J23 G22
E23 H20
J21 G23 H23
J20
J22
P22
B21
B20 N20
R23 C20
P20
B23
P21
AC12
AC11
B18
E4 B17 B16
C17 C16
F19
D17 D18
E19 E16 E17 E18
C19 C18
B19
14
U12E
P
O10I
G
7
3
U23A
PCICLKF A_RST#
A_AD0 A_AD1 A_AD2 A_AD3 A_AD4 A_AD5 A_AD6 A_AD7 A_AD8 A_AD9 A_AD10 A_AD11 A_AD12 A_AD13 A_AD14 A_AD15 A_AD16 A_AD17 A_AD18 A_AD19 A_AD20 A_AD21 A_AD22 A_AD23 A_AD24 A_AD25 A_AD26 A_AD27 A_AD28 A_AD29 A_AD30 A_AD31 A_CBE#0 A_CBE#1 A_CBE#2 A_CBE#3 A_STROBE# A_DEVSEL# A_ACAT# A_END# A_PAR A_OFF# A_SERR# A_SBREQ# A_SBGNT#
CPU_STP#/DPSLP# PCI_STP#
A_INTA# INTB# INTC# INTD#
X1
X2
CPURSTIN# CPU_PWRGD INTR/LINT0 NMI/LINT1 INIT SMI# SLP# IGNNE# A20M# FERR# STPCLK# SSMUXSEL/GPIO0 DPRSLPVR APIC_D0 APIC_D1 APIC_CLK
South bridge SB200
14
U12F
P
13
O12I
G
SN74LVC14APWLE_TSSOP14
7
14
U19B
P
O4I
G
SN74LVC14APWLE_TSSOP14
7
3
Layout note:
Trace length of PCI_CLK_R + PCI_CLK_FB should be less than 200 mils.
PCI_1394
R240 22_0402_5%
SB200 SB
Part 1 of 3
PCI CLKS
AD0/ROMA18 AD1/ROMA17 AD2/ROMA16 AD3/ROMA15 AD4/ROMA14 AD5/ROMA13 AD6/ROMA12 AD7/ROMA11
AD10/ROMA7 AD11/ROMA6 AD12/ROMA5 AD13/ROMA4 AD14/ROMA3 AD15/ROMA2 AD16/ROMD0 AD17/ROMD1 AD18/ROMD2 AD19/ROMD3 AD20/ROMD4 AD21/ROMD5 AD22/ROMD6
AD23/ROMD7 AD24/RTC_AD7 AD25/RTC_AD6 AD26/RTC_AD5 AD27/RTC_AD4 AD28/RTC_AD3 AD29/RTC_AD2 AD30/RTC_AD1 AD31/RTC_AD0
CBE#0/ROMA10
CBE#1/ROMA1
A-LINK INTERFACE
XTAL
CPU
RTC
PCIRST#
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
CBE#2/ROMWE#
PCI INTERFACE
CBE#3/RTC_RD#
DEVSEL#/ROMA0
TRDY#/ROMOE#
REQ#3/PDMAREQ0#
REQ#4/PLLBP33/PDMAREQ1#
GNT#3/PDMAGNT0#
GNT#4/PLLBP50/PDMAGNT1#
GPIO1/ROMCS#
LPC
USBOC5#/GPM1
RTC_ALE/USBOC4#/GPIO3
RTC_WR#/RTC_CLKOUT
RTC_CS#/USBOC3#/GPIO2
PCIRST# 10,19,20,21,22,24,25,30,34,35
NB_RST# 7
3
PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5 PCICLK6 PCICLK7
PCICLK_FB
PCIRST#
AD8/ROMA9 AD9/ROMA8
FRAME#
IRDY#
PAR STOP# PERR# SERR# REQ#0 REQ#1 REQ#2
GNT#0 GNT#1 GNT#2
CLKRUN#
LAD0 LAD1 LAD2 LAD3
LFRAME#
LDRQ#0 LDRQ#1
SERIRQ
VBAT
RTC_GND
B15 D16 A14 A15 A16 A17 D15 A18 A19
C15 B1 C1 A1 D2 B2 C2 A2 D3 C3 A3 D4 B4 C4 A4 D5 B5 C8 D8 B8 A8 C9 D9 B9 A9 C10 B10 D11 A10 C11 B11 D12 A11 B3 C5 A7 D10 B7 A6 C7 D7 A5 B6 C6 D6 B12 C12 D13 A12 C13 A13 B13 C14 D14 B14 A20
AB5
Y14 AA14 AB14 AA13 AB13 AC14 Y13
AC13
AA2 AB7 AB8 AC8 AC10 AB11
PCI_LAN PCI_PCM PCI_MINI PCI_EC PCI_SIO PCI_USB20 PCI_CLK_R PCI_CLK_FB
PCI_RST# PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 PCI_C/BE#0 PCI_C/BE#1 PCI_C/BE#2 PCI_C/BE#3 PCI_FRAME# PCI_DEVSEL# PCI_IRDY# PCI_TRDY# PCI_PAR PCI_STOP# PCI_PERR# PCI_SERR# PCI_REQ#0 PCI_REQ#1 PCI_REQ#2 PCI_REQ#3 PCI_REQ#4 PCI_GNT#0 PCI_GNT#1 PCI_GNT#2 PCI_GNT#3 PCI_GNT#4 PM_CLKRUN#
GPIO1
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# LPC_DRQ#0 LPC_DRQ#1
SIRQ
OVCUR#5 OVCUR#4
GPIO2
1 2
R480 22_0402_5%
1 2
R235 22_0402_5%
1 2
R242 22_0402_5%
1 2
R246 22_0402_5%
1 2
R260 22_0402_5%
1 2
R478 22_0402_5%
1 2
R267 22_0402_5%
1 2
PCI_A D[0..31]
PCI_C/BE#[0..3]
PCI_FRAME# 19,20,22,24,25 PCI_DEVSEL# 19,20,22,24,25 PCI_IRDY# 19,20,22,24,25 PCI_TRDY# 19,20,22,24,25 PCI_PAR 19,20,22,24,25 PCI_STOP# 19,20,22,24,25 PCI_PERR# 19,20,22,24,25 PCI_SERR# 19,20,22,24,25 PCI_REQ#0 19 PCI_REQ#1 22 PCI_REQ#2 20 PCI_REQ#3 24,25 PCI_REQ#4 24,25 PCI_GNT#0 19 PCI_GNT#1 22 PCI_GNT#2 20 PCI_GNT#3 24,25 PCI_GNT#4 24,25 PM_CLKRUN# 19,20,22,24,25,34,35
LPC_AD0 34,35 LPC_AD1 34,35 LPC_AD2 34,35 LPC_AD3 34,35 LPC_FRAME# 34,35 LPC_DRQ#0 35 LPC_DRQ#1 34
SERIRQ 20,34,35
+SB_VBAT
2
C239 @22P_0402_50V8J
1 2
PCI_AD[0..31] 19,20,22,24,25,29
PCI_C/BE#[0..3] 19,20,22,24,25
R450 10K_0402_5%
1 2
1U_0603_10V6K
2
CLK_PCI_1394 19 CLK_PCI_LAN 22 CLK_PCI_CB 20 CLK_PCI_MINI 25 CLK_PCI_EC 35 CLK_PCI_SIO 34 CLK_PCI_USB20 24
13
D
2
G
S
+SB_VBAT
W=20mils
1
C711
2
1
PCI_DEVSEL# PCI_TRDY# PCI_IRDY# PCI_FRAME#
PCI_STOP# PCI_PERR# PCI_SERR# PCI_PAR
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
PCI_REQ#1 PCI_REQ#2 PCI_REQ#0 PCI_REQ#3
PCI_GNT#1 PCI_GNT#3 PCI_GNT#0 PCI_GNT#2
PCI_REQ#4
PCI_GNT#4
LPC_AD0 LPC_AD1 LPC_AD3 LPC_AD2
SIRQ LPC_DRQ#0 LPC_FRAME#
R453
@4.7K_0402_5%
Q43 @2N7002_SOT23
R589
JOPEN1
1 2
No short
Title
Size Docu ment Number Re v
Date: Sheet
LPC_DRQ#1
PM_CLKRUN#
12
H_PROCHOT# 5,46
1 2
1K_0402_5%
R454 4.7K_0402_5%
GPIO0
OVCUR#4
OVCUR#5
R443 10K_0402_5%
GPIO2
+RTCVCC
Compal Electronics, Inc.
SB200M(1/4)- PCI/CPU/LPC
27, 2003
LA-2051
星期三 八月
RP17
4 5 3 6 2 7 1 8
8.2K _8P4R_0804_5% RP14
4 5 3 6 2 7 1 8
8.2K _8P4R_0804_5% RP75
4 5 3 6 2 7 1 8
8.2K _8P4R_0804_5% RP21
4 5 3 6 2 7 1 8
8.2K _8P4R_0804_5% RP22
4 5 3 6 2 7 1 8
8.2K _8P4R_0804_5% R476
1 2
8.2K_0402_5% R477
1 2
8.2K_0402_5% RP72
4 5 3 6 2 7 1 8
100K_1206_8P4R_5%
RP69
10K_1206_8P4R_5%
1 8 2 7 3 6 4 5
12
R482 10K_0402_5%
12
R456 10K_0402_5%
12
1 2
R462 10K_0402_5%
12
1
+3VS
+3V
0.1A
of
26 51,
5
Note: P lace close
L
to U3 (ATI SB) For A TI U S B 2 .0 on ly .
CLK_SB_48M
12
R441
D D
C C
B B
A A
@10_0402_5%
1
C453 @15P_0402_50V8J
2
IAC_BITCLK
12
R177 @10_0402_5%
1
C133 @15P_0402_50V8J
2
CLK_SB_14M
12
R521 @10_0402_5%
1
C636 @15P_0402_50V8J
2
RP47
1 8 2 7 3 6 4 5
RP46
1 8 2 7 3 6 4 5
RP45
4 5 3 6 2 7 1 8
CPU_GHI#5
15K_1206_8P4R_5%
15K_1206_8P4R_5%
15K_1206_8P4R_5%
AGP_STP#9
USB20P5­USB20P5+ USB20P4­USB20P4+
USB20P3­USB20P3+ USB20P2­USB20P2+
USB20P1+ USB20P1­USB20P0+ USB20P0-
R464 100K_0402_5%
R433 10K_0402_5%
D49
2 1
RB751V_SOD323
USB20P2+31
USB20P2-31
USB20P1+31
USB20P1-31
USB20P0+31
USB20P0-31
1 2
CLK_SB_48M16
OVCUR#031
12
D50 RB751V_SOD323
@10K_0402_5%
R449
R430
1 2
12.4K_0603_1%
R438 28_0402_1%
1 2
R439 28_0402_1%
1 2
R446 28_0402_1%
1 2
R448 28_0402_1%
1 2
R434 28_0402_1%
1 2
R435 28_0402_1%
1 2
+3V
R455 10K_0402_5%
R447 10K_0402_5%
EC_RSMRST#35
CLK_SB_14M16
R442 10K_0402_5%
+3V
FLASH#36
OVCUR#231
32KHZ_S5_OUT29
OVCUR#131
SB_SPKR33
2 1
12
PIDERST#30 SIDERST#30
R444 33_0402_5%
1 2
4
U23B
CLK_SB_48M USB_RCOMP
MII_TXD329 MII_TXD229 MII_TXD129 MII_TXD029
MII_TXEN29
12
12
SB_EEDO29 SB_EECLK29
EC_RSMRST# CLK_SB_14M
12
FLASH# OVCUR#2 32KHZ_S5_OUT OVCUR#1 SB_SPKR
AGP_STP#_RAGP_STP#
AGP_BUSY#_R GHI
P3
R1
P1 N4 N3
P4
USB20P5+
M2 M1
USB20P5-
N2 N1
USB20P4+
L4
L3
USB20P4-
M4 M3
USB20P3+
K2
K1
USB20P3-
L2
L1
USB20P2+
H2
USBP2_R
H1
USB20P2-
J2
USBN2_R
J1
USB20P1+
G3
USBP1_R
J3
USB20P1-
H3
USBN1_R
K3
USB20P0+
F1
USBP0_R
F2
USB20P0-
G1
USBN0_R
G2 R5
W1
V4
V2
T1
T3 U2
T5 W4
T2 U1
T4 U4
V1 U3
V3 W2
W3 U5
Y7
P2 R3 R2 R4
AB9
A23
W6
AB2 AA3 W11 AB1
Y4
AA1
AC1 AC6 AC2 AC3 AC4 AC5
VTT_PWRGD 16,17
USBCLK/CLK48 USB_RCOMP USB_VREFOUT USB_ATEST1 USB_ATEST0 USBOC0#/GPM7
USB_HSDP5+ USB_FLDP5+ USB_HSDM5­USB_FLDM5-
USB_HSDP4+ USB_FLDP4+ USB_HSDM4­USB_FLDM4-
USB_HSDP3+ USB_FLDP3+ USB_HSDM3­USB_FLDM3-
USB_HSDP2+ USB_FLDP2+ USB_HSDM2­USB_FLDM2-
USB_HSDP1+ USB_FLDP1+ USB_HSDM1­USB_FLDM1-
USB_HSDP0+ USB_FLDP0+ USB_HSDM0­USB_FLDM0-
MCOL MCRS MDCK MDIO
RX_CLK RXD3
RXD2 RXD1 RXD0
RX_DV RX_ERR
TX_CLK TXD3
TXD2 TXD1 TXD0
TX_EN PHY_PD PHY_RST# CLK_25M
EE_CS EE_DI EE_DO EE_CK
RSMRST# OSC_IN SIO_CLK
BLINK/GPM0 FANOUT1/USBOC2#/GPM2 32KHZ_IN/GPM3 USBOC1#/GPM4 SPEAKER/GPM5 FANOUT0/GPM6
GPIO_X0/AGP_STP# GPIO_X1/AGP_BUSY# GPIO_X2/GHI# GPIO_X3/VGATE GPIO_X4 GPIO_X5
South bridge SB200
SB200 SB
Part 2 of 3
ACPI / WAKE UP EVENTS
USB INTERFACEETHERNET MIIEEPROMCLK / RST
PRIMARY ATA 66/100
SECONDARY ATA 66/100
GPIOGPIO_XTRA
GEVENT5#/ETH_VALERT# GEVENT6#/ETH_FALERT#
GEVENT7#/ETH_CALERT#
AC97
3
TALERT#/ETH_TALERT#
PME#/EXT_EVNT0#
RI#/EXT_EVNT1#
SLP_S3# SLP_S5#
PWR_BTN#
PWR_GOOD
PCI_REQACT#
SUS_STAT#
TEST1 TEST0
GA20_IN/GEVNT0#
KB_RST#/GEVNT1#
SMB_ALERT#/GEVNT2#
LPC_PME#/GEVNT3#
LPC_SMI#/GEVNT4#
GPOC0#/SCL0 GPOC1#/SDA0 GPOC2#/SCL1 GPOC3#/SDA1
RTC_IRQ#/PWR_STRP
PIDE_IORDY
PIDE_IRQ
PIDE_A0 PIDE_A1 PIDE_A2
PIDE_DACK#
PIDE_DRQ PIDE_IOR#
PIDE_IOW#
PIDE_CS1# PIDE_CS3#
PIDE_D0 PIDE_D1 PIDE_D2 PIDE_D3 PIDE_D4 PIDE_D5 PIDE_D6 PIDE_D7 PIDE_D8
PIDE_D9 PIDE_D10 PIDE_D11 PIDE_D12 PIDE_D13 PIDE_D14 PIDE_D15
SIDE_IORDY
SIDE_IRQ
SIDE_A0
SIDE_A1
SIDE_A2
SIDE_DACK#
SIDE_DRQ SIDE_IOR#
SIDE_IOW#
SIDE_CS1# SIDE_CS3#
SIDE_D0
SIDE_D1
SIDE_D2
SIDE_D3
SIDE_D4
SIDE_D5
SIDE_D6
SIDE_D7
SIDE_D8
SIDE_D9 SIDE_D10 SIDE_D11 SIDE_D12 SIDE_D13 SIDE_D14 SIDE_D15
AC_BITCLK AC_SDOUT
AC_SDIN0 AC_SDIN1 AC_SDIN2
AC_SYNC
AC_RST#
SPDIF_OUT
AB4 AC9
AC7 AA11 AB10 AA10 Y11 C21 Y10 AA5 AA6
Y5 AA4 AB3 Y6 W5 Y8 AA7 AB6
AA12 W12 Y12 AB12 AA8
AB17 AC16 AB15 AB16 AC15 Y16 AA17 AA16 AC17 Y15 AA15
AC18 AA18 AC19 AA19 AC20 AA20 AC21 AB21 AA21 Y20 AB20 Y19 AB19 Y18 AB18 Y17
AA23 AA22 AC23 Y21 AB23 Y22 W21 Y23 W20 AC22 AB22
W23 V21 V23 U21 U23 T21 T23 R21 R20 T22 T20 U22 U20 V22 V20 W22
E1 E2 Y1 Y2 Y3 E3 V5 E5
SB_EC_THERM# SB_PM_BATLOW#
SB_EC_SWI# PM_SLP_S3# PM_SLP_S5# PBTN_OUT# SB_PWRGD PCI_ACT_REQ# SUS_STAT# SB_TEST1 SB_TEST0
SB_GA20 SB_KBRST# SB_AC_IN LPC_PME#
SB_EC_SMI# SB_SCI# SB_LID_OUT#
SMB_CK_CLK2 SMB_CK_DAT2 SMB_CK_CLK2_SB SMB_CK_DAT2_SB PWR_STRP
IDE_PDIORDY INT_IRQ14 IDE_PDA0 IDE_PDA1 IDE_PDA2 IDE_PDDACK# IDE_PDDREQ IDE_PDIOR# IDE_PDIOW# IDE_PDCS1# IDE_PDCS3#
IDE_PDD0 IDE_PDD1 IDE_PDD2 IDE_PDD3 IDE_PDD4 IDE_PDD5 IDE_PDD6 IDE_PDD7 IDE_PDD8 IDE_PDD9 IDE_PDD10 IDE_PDD11 IDE_PDD12 IDE_PDD13 IDE_PDD14 IDE_PDD15
IDE_SDIORDY INT_IRQ15 IDE_SDA0 IDE_SDA1 IDE_SDA2 IDE_SDDACK# IDE_SDDREQ IDE_SDIOR# IDE_SDIOW# IDE_SDCS1# IDE_SDCS3#
IDE_SDD0 IDE_SDD1 IDE_SDD2 IDE_SDD3 IDE_SDD4 IDE_SDD5 IDE_SDD6 IDE_SDD7 IDE_SDD8 IDE_SDD9 IDE_SDD10 IDE_SDD11 IDE_SDD12 IDE_SDD13 IDE_SDD14 IDE_SDD15
PM_SLP_S3# 35 PM_SLP_S5# 35 PBTN_OUT# 35 SB_PWRGD 17
SUS_STAT# 7
LPC_PME# 35
SMCLK 13,14,16 SMDATA 13,14,16
PWR_STRP 29 IDE_PDIORDY 30
INT_IRQ14 30 IDE_PDA0 30 IDE_PDA1 30 IDE_PDA2 30 IDE_PDDACK# 30 IDE_PDDREQ 30 IDE_PDIOR# 30 IDE_PDIOW# 30 IDE_PDCS1# 30 IDE_PDCS3# 30
IDE_PDD[0..15] 30
IDE_SDIORDY 30 INT_IRQ15 30 IDE_SDA0 30 IDE_SDA1 30 IDE_SDA2 30 IDE_SDDACK# 30 IDE_SDDREQ 30 IDE_SDIOR# 30 IDE_SDIOW# 30 IDE_SDCS1# 30 IDE_SDCS3# 30
IDE_SDD[0..15] 30
R440 33_0402_5%
1 2
R445 33_0402_5%
1 2
IAC_BITCLK IAC_SDATAO IAC_SDATAI0 IAC_SDATAI1 IAC_SDATAI2 IAC_SYNC IAC_RST# SPDIF_OUT
2
SB_EC_THERM# SB_PM_BATLOW# SB_EC_SWI# SB_GA20 GATEA20 SB_KBRST#
SB_EC_SMI# SB_SCI# EC_SCI#
LPC_SMI# USB_SMI#LPC_SMI#
D16 RB751V_SOD323
2 1
D41 RB751V_SOD323
2 1
D48 RB751V_SOD323
2 1
D42 RB751V_SOD323
2 1
D18 RB751V_SOD323
2 1
D17 RB751V_SOD323
2 1
D46 RB751V_SOD323
2 1
D47 RB751V_SOD323
2 1
D43 RB751V_SOD323
2 1
R479 0_0603_5%
1 2
R472 10K_0402_5%
1 2
IAC_BITCLK 32 IAC_SDATAO 29,32 IAC_SDATAI0 32 IAC_SDATAI1 32
IAC_SYNC 29,32 IAC_RST# 32 SPDIF_OUT 29
SUS_STAT#
LPC_PME# SB_GA20 PCI_ACT_REQ#
SB_EC_SMI# SB_SCI# SB_EC_SWI# SB_KBRST#
SB_EC_THERM# SB_LID_OUT# AGP_BUSY#_R SB_PM_BATLOW#
SB_AC_IN GHI AGP_STP#_R
PM_SLP_S5# PBTN_OUT# PM_SLP_S3#
SMB_CK_DAT2_SB SMB_CK_CLK2 SMB_CK_CLK2_SB SMB_CK_DAT2
IAC_RST#
AGP_STP# AGP_BUSY# SB_TEST1 SB_TEST0
IAC_BITCLK IAC_SDATAI2 IAC_SDATAI1 IAC_SDATAI0
1
EC_THERM# PM_BATLOW# EC_SWI#
KBRST# ACINSB_AC_IN EC_SMI#
LID_OUT#SB_LID_OUT#
R471 4.7K_0402_5%
1 2
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
2.2K_1206_8P4R_5%
R451 8.2K_0402_5%
1 2
1 8 2 7 3 6 4 5
RP57 8.2K_1206_8P4R_5%
1 8 2 7 3 6 4 5
RP49 8.2K_1206_8P4R_5%
EC_THERM# 35 PM_BATLOW# 35 EC_SWI# 35 GATEA20 35 KBRST# 35 ACIN 35,37,41 EC_SMI# 35 EC_SCI# 35 EC_LID_OUT# 35 USB_SMI# 24
+2.5V
+3V
RP50
10K_1206_8P4R_5% RP48
10K_1206_8P4R_5% RP53
10K_1206_8P4R_5% RP51
10K_1206_8P4R_5%
+3VALW
RP63
10K_1206_8P4R_5%
+3VS
RP65
+3V
+3VS
+5VS
R178 1K_0402_5%
1 2
5
Q44 2N7002_SOT23
D
S
1 3
G
2
AGP_BUSY#AGP_BUSY#_R
AGP_BUSY# 9
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Docu ment Number Re v
Date: Sheet
Compal Electronics, Inc.
SB200M(2/4) - IDE/USB /MII
27, 2003
LA-2051
1
星期三 八月
0.1A
of
27 51,
5
4
3
2
1
+3VS +3VS
1
C584
D D
C C
22U_1206_16V4Z_V1
22U_1206_16V4Z_V1
C579
22U_1206_16V4Z_V1
C574
C546
22U_1206_16V4Z_V1
2
+2.5VS
1
2
+2.5V
0.1U_0402_10V6K
1
C472
2
1
C613
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C560
C561
2
0.1U_0402_10V6K
1
1
C544
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
1
C614
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
1
C542
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C545
2
0.1U_0402_10V6K
1
C583
2
1
C526
C501
2
0.1U_0402_10V6K
1
C532
0.1U_0402_10V6K
2
1
C582
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C502
2
0.1U_0402_10V6K
1
C604
2
1
C504
2
0.1U_0402_10V6K
1
C603
2
0.1U_0402_10V6K
1
2
0.1U_0402_10V6K
1
C599
C598
2
1
C503
0.1U_0402_10V6K
2
1
1
C597
2
2
0.1U_0402_10V6K
@0.01U_0402_16V7Z
0.1U_0402_10V6K
C596
@0.01U_0402_16V7Z
ATI request
+3V
0.1U_0402_10V6K
1
C473
22U_1206_16V4Z_V1
1 2
+3V
R460 0_0805_5%
B B
1 2
+3V
R475 0_0805_5%
22U_1206_16V4Z_V1
C480
2
+3V_AVDDC
1
C488 1U_0603_10V6K
2
+3V_AVDDUSB
0.1U_0402_10V6K
1
C444
C484
2
0.1U_0402_10V6K
1
1
C499
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
1
C458
2
2
0.1U_0402_10V6K
1
C479
2
1
C460
0.1U_0402_10V6K
2
1
C459
C452
2
0.1U_0402_10V6K
1
C468
0.1U_0402_10V6K
2
0.1U_0402_10V6K
1
1
C451
2
2
@0.1U_0402_16V7K
1
C443
0.1U_0402_10V6K
2
+3V
1
C512
2
ATI request
+3V_AVDDC
C485
@10U_0805_10V6K
ATI request
+3V_AVDDUSB
C125
@47U_B_6.3VM
1
C511 @0.1U_0402_16V7K
2
1
2
1
+
2
ATI request
+2.5V_AVDDCK
1 2
+2.5VS
R528 0_0805_5%
A A
1
C643 1U_0603_10V6K
2
1
C626
0.1U_0402_10V6K
2
@22U_1206_16V4Z_V1
+2.5V_AVDDCK
1
C268
2
0.1U_0402_10V6K
1
1
C533
C559
2
2
0.1U_0402_10V6K
+3VS
1
C611
2
@0.01U_0402_16V7Z
+2.5VS
1
C543
2
C471
@0.1U_0402_16V7K
0.1U_0402_10V6K
1
1
C494
C520
2
2
0.1U_0402_10V6K
ATI request
@0.01U_0402_16V7Z
1
1
C519
C612
2
2
ATI request
@0.01U_0402_16V7Z
1
C563
C527
2
@0.01U_0402_16V7Z
ATI request CLOSE TO
+2.5V
L6,H6,J6
1
1
C470
2
2
@0.1U_0402_16V7K
+3VS
RB751V_SOD323
1
1
C478
0.1U_0402_10V6K
2
2
1
C493
2
@0.01U_0402_16V7Z
1
1
C562 @0.01U_0402_16V7Z
2
2
1
C469
0.1U_0402_16V7K
2
D19
2 1
C142
1U_0603_10V6K
1
C477 @0.01U_0402_16V7Z
2
+3V_AVDDUSB
+5VS
12
R432 1K_0402_5%
+5VS_VREF
1
+2.5V_AVDDCK
2
+2.5VS
+2.5V
+3V_AVDDC
+3V
+2.5VS
+2.5VALW
+3VALW
0.1U_0402_10V6K
C500
1
1
2
2
E11 E12 E15
E7
E8 F11 F12 F15 F16 F17
F7
F8 G18 G19
H18
H19 M18 M19
N18
N19
T18
T19
U18
U19
V17
V18 W17 W18
J10 J11 J13 J14
K15
K9
L15
L9
N15
N9
P15
P9 R10 R11 R13 R14
P6
R6 V13
W13
V12
L6
H6
J6
P5
T6 U6 V9
V10 V11
W9
W10
F4
J4 K5
F3 K4
L5
D19
D1
A21
Y9
AA9
C491
0.1U_0402_10V6K
U23C
SB200 SB
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE
STB_2.5V STB_2.5V STB_2.5V STB_2.5V STB_2.5V
VDD_USB VDD_USB VDD_USB
AVDDC STB_3.3V
STB_3.3V STB_3.3V STB_3.3V STB_3.3V STB_3.3V STB_3.3V
AVDDTX0 AVDDTX1 AVDDTX2 AVDDRX0 AVDDRX1 AVDDRX2
VREF_CPU 5V_VREF AVDD_CK S5_2.5V S5_3.3V
South bridge SB200
Part 3 of 3
POWER
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS_USB VSS_USB
AVSSC
AVSSRX2 AVSSRX1 AVSSRX0 AVSSTX2 AVSSTX1 AVSSTX0
AVSSCK
E10 E13 E14 E6 E9 F10 F13 F14 F18 F6 F9 G6 J12 J15 J18 J19 J9 K10 K11 K12 K13 K14 K18 K19 L10 L11 L12 L13 L14 L18 L19 M10 M11 M12 M13 M14 M15 M6 M9 N10 N11 N12 N13 N14 N6 P10 P11 P12 P13 P14 P18 P19 R12 R15 R18 R19 R9 V14 V15 V16 V19 V6 V7 V8 W14 W15 W16 W19 W7 W8 H5 G5
N5 M5
J5 G4 K6 H4 F5
A22
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Docu ment Number Re v
Date: Sheet
Compal Electronics, Inc.
SB200M(3/4) - PWR
LA-2051
星期三 八月
27, 2003
0.1A
of
28 51,
1
5
D D
4
3
2
1
+3VALW +3V +3V
12
R105 @10K_0402_5%
12
R95 10K_0402_5%
IGN DEBUG SPEEDSTEP FREQLTCH
EEDO
DEBUG STRAPS
IGNORE DEBUG STRAPS
DEFAULT
4
EECK
ROM ON PCI BUS
ROM ON
LPC
BUS
DEFAULT
12
R104 @10K_0402_5%
12
R94 10K_0402_5%
MANUAL PWR ON
DEFAULT
PWR ON
+3VS
12
R226 @10K_0402_5%
12
R227 10K_0402_5%
12
R198 10K_0402_5%
12
R199 @10K_0402_5%
C C
PWR_STRP27 SB_EEDO27 SB_EECLK27 IAC_SYNC27,32
IAC_SDATAO27,32
SPDIF_OUT27 MII_TXEN27
MII_TXD327 MII_TXD227 MII_TXD127 MII_TXD027
32KHZ_S5_OUT27
B B
A A
REQUIRED SYSTEM STRAPS
PCI_AD2619,20,22,24,25,26
5
STRAP HIGH
STRAP LOW
+3VS
12
1 2
AC_SYNC
INIT ACTIVE HIGH
INIT ACTIVE LOW (PIII)
DEFAULT
R208 @10K_0402_5%
R209 10K_0402_5%
+3VS +3VS
12
R218 @10K_0402_5%
12
R219 10K_0402_5%
33MHz NB BUS
HI SPEED A-LINK
DEFAULT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SIO 24MHzUSE
SIO 48MHzAUTO
DEFAULT
3
12
R224 @10K_0402_5%
12
R225 10K_0402_5%
CPU_STP#
ENABLE SPEED STEP
DISABLE SPEED STEP
DEFAULT
+3V +3V +3V +3V +3V
12
R99 10K_0402_5%
12
R89 @10K_0402_5%
TX_EN
DISABLE CPU FREQ SETTING
DEFAULT
ENABLE CPU FREQSETTING
12
R102 10K_0402_5%
12
R92 @10K_0402_5%
12
12
ETHERN ET TXD[3:0]AC_SDOUT SPDIF_OUTPWR_STRP
PROCESSOR FREQ MULTIPLIER
2
R101 10K_0402_5%
R91 @10K_0402_5%
12
R103 10K_0402_5%
12
R93 @10K_0402_5%
+3VALW
12
R100 10K_0402_5%
12
R90 @10K_0402_5%
12
R201 10K_0402_5%
12
R202 @10K_0402_5%
32KHZ_S5
32KHZ OUTPUT FROM SB200 (INT RTC)
DEFAULT
32KHZ INPUT TO SB200 (EXT RTC)
Title
Size Docu ment Number Re v
Date: Sheet
Compal Electronics, Inc.
SB200M(4/4) - STRAP S
LA-2051
星期三 八月
27, 2003
of
29 51,
1
0.1A
+3VS
IDE_PDD[0..15]27
IDE_PDDACK#27
IDE_PDIOR#27
IDE_PDA127
IDE_PDIOW#27
IDE_PDDREQ27
IDE_PDCS1#27
IDE_PDCS3#27
IDE_PDA027
IDE_PDA227
INT_IRQ1427
IDE_SDD[0..15]27
IDE_SDA027
IDE_SDCS1#27
IDE_SDA227
IDE_SDCS3#27
IDE_SDIOW#27
IDE_SDDREQ27
IDE_SDIOR#27
IDE_SDDACK#27
IDE_SDA127
INT_IRQ1527
IDE_SDA0 IDE_SDCS1# IDE_SDA2 IDE_SDCS3#
IDE_SDD6 IDE_SDD11 IDE_SDD1 IDE_SDIOW#
IDE_SDD9 IDE_SDD3 IDE_SDD14 IDE_SDD12
IDE_SDD5 IDE_SDD7 IDE_SDD10 IDE_SDD8
IDE_SDD2 IDE_SDD15 IDE_SDD4 IDE_SDD13
IDE_SDDREQ
IDE_SDIOR# IDE_SDDACK# IDE_SDD0 IDE_SDA1
IDE_PDD[0..15]
IDE_PDD0 IDE_PDD14 IDE_PDD1 IDE_PDD15
IDE_PDDACK# IDE_PDIOR# IDE_PDA1 IDE_PDIOW#
IDE_PDD6 IDE_PDD7 IDE_PDD8 IDE_PDD9
IDE_PDD4 IDE_PDD10 IDE_PDD5 IDE_PDD11
IDE_PDD2 IDE_PDD12 IDE_PDD3 IDE_PDD13
IDE_PDDREQ
IDE_PDCS1# IDE_PDCS3# IDE_PDA0 IDE_PDA2
1 8 2 7 3 6 4 5
RP87 33_1206_8P4R_5%
1 8 2 7 3 6 4 5
RP77 33_1206_8P4R_5%
1 8 2 7 3 6 4 5
RP85 33_1206_8P4R_5%
1 8 2 7 3 6 4 5
RP76 33_1206_8P4R_5%
1 8 2 7 3 6 4 5
RP86 33_1206_8P4R_5%
1 2
R514
33_0402_5%
1 8 2 7 3 6 4 5
RP78 33_1206_8P4R_5%
1 2
R515 33_0402_5%
1 8 2 7 3 6 4 5
RP80 33_1206_8P4R_5%
RP90 33_1206_8P4R_5%
4 5 3 6 2 7 1 8
1 8 2 7 3 6 4 5
RP88 33_1206_8P4R_5%
1 8 2 7 3 6 4 5
RP79 33_1206_8P4R_5%
1 8 2 7 3 6 4 5
RP89 33_1206_8P4R_5%
1 2
R488
33_0402_5%
RP81 33_1206_8P4R_5%
4 5 3 6 2 7 1 8
1 2
R484 33_0402_5%
IDE_SDD[0..15]
SD_SDA0 SD_SDCS1# SD_SDA2 SD_SDCS3#
SD_D6 SD_D11 SD_D1 SD_SDIOW#
SD_D9 SD_D3 SD_D14 SD_D12
SD_D5 SD_D7 SD_D10 SD_D8
SD_D2 SD_D15 SD_D4 SD_D13
SD_SDDREQ
SD_SDIOR# SD_SDDACK# SD_D0 SD_SDA1
SD_IRQ15INT_IRQ15
1 2
R526 8.2K_0402_5%
PD_D0 PD_D14 PD_D1 PD_D15
PD_PDDACK# PD_PDIOR# PD_PDA1 PD_PDIOW#
PD_D6 PD_D7 PD_D8 PD_D9
PD_D4 PD_D10 PD_D5 PD_D11
PD_D2 PD_D12 PD_D3 PD_D13
PD_PDDREQ
PD_PDCS1# PD_PDCS3# PD_PDA0 PD_PDA2
PD_IRQ14INT_IRQ14
1 2
R483 8.2K_0402_5%
INT_CD_L32
IDE Module CONN.
PHDD_LED#35
+5VS
1 2
R349 100K_0402_5%
CD-ROM Module CONN.
1
CD_AGND32
C343 @12P_0402_50V8J
2
SHDD_LED#35
1 2
+5VS
R341 100K_0402_5%
PIDE_RST#
PD_D7 PD_D6 PD_D5
PD_D2 PD_D1 PD_D0
PD_PDDREQ PD_PDIOW# PD_PDIOR# PD_PDIORDY PD_PDDACK# PD_IRQ14 PD_PDA1
PD_PDCS1#
SHDD_LED#
+5VS
SIDE_RST#
SD_SDIOW# SD_SDIORDY SD_IRQ15 SD_SDA1 SD_SDA0 SD_SDCS1#
+5VS
470_0402_5%
R336
JP10
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44
SUYIN_200138FR044G242ZL
JP25
1 2 3 4
SD_D7 SD_D6 SD_D5 SD_D4 SD_D3 SD_D2 SD_D1 SD_D0
12
5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
SUYIN_800189MB050S105ZL
IDE_PDIORDY27
PD_D8 PD_D9 PD_D10 PD_D11PD_D4 PD_D12PD_D3 PD_D13 PD_D14 PD_D15
PCSEL
1 2
R354 470_0402_5%
R353 0_0402_5%
1 2
+5VS
R331 100K_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THI S SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1 2
R350 33_0402_5%
PD_PDA2PD_PDA0
PD_PDCS3#
IDE_SDIORDY27
C328
1 2
@12P_0402_50V8J
SD_D8 SD_D9 SD_D10 SD_D11 SD_D12 SD_D13 SD_D14 SD_D15 SD_SDDREQ SD_SDIOR#
SD_SDDACK#
1 2
SD_SDA2 SD_SDCS3#
2
C344
0.1U_0402_16V4Z
1
1 2
R352 10K_0402_1%
1 2
R351 5.6K_0402_5%
+5VS
+5VS
R355
4.7K_0402_5%
1 2
PD_PDIORDY
PD_D7
PD_PDDREQ
1 2
R340 33_0402_5%
1 2
R339 10K_0402_1%
1 2
R333 5.6K_0402_5%
INT_CD_R 32
@0.1U_0402_16V4Z
PCIRST#
+3VS
1
C355 1U_0603_10V4Z
2
+5VS
1
2
PIDERST#27
C356 1000P_0402_50V7K
1
C354 10U_0805_10V4Z
2
PCIRST#10,19,20,21,22,24,25,26,34,35
Place component's closely IDE CONN.
+3VS
R338
4.7K_0402_5%
1 2
SD_SDIORDY
C333
C329 10U_0805_10V4Z
@0.1U_0402_16V4Z
PCIRST#
+3VS
1
2
SD_D7
SD_SDDREQ
+5VS
1
C330 1000P_0402_50V7K
2
SIDERST#27
W=80mils
1
2
Place component's closely CD-ROM CONN.
Compal Electronics, Ltd.
Title
IDE & CD-ROM Connector
Size Docu ment Number Re v
Custom
LA-2051
Date: Sheet
星期三 八月
27, 2003
+5V
C353
12
5
U35
1
P
B
2
A
G
@TC7SH08FU_SSOP5
3
D27
21
RB751V_SOD323
R356
10K_0402_5%
1
2
+5V
12
5
U34
1
P
B
4
Y
2
A
G
@TC7SH08FU_SSOP5
3
D26
21
RB751V_SOD323
1 2
R337 10K_0402_5%
C327 1U_0603_10V4Z
1
2
4
Y
12
C357
0.1U_0402_16V4Z
SIDE_RST#
C331
0.1U_0402_16V4Z
30 51,
PIDE_RST#
0.1A
of
+USB_VCCB
+3V
0.1U_0402_16V4Z
1
C31 10U_0805_10V4Z
2
0.1U_0402_16V4Z
1
C699 10U_0805_10V4Z
2
@10P_0402_50V8K
+5V
U37
1
GND
2
IN
3
EN1#
1
C25
2
+5V
1
C702
2
USB2- USB2+ USB1+USB1-
1
C349
2
@10P_0402_50V8K
4
C345
EN2#
TPS2042ADR_SO8
U46
1
GND
2
IN
3
EN1#
4
EN2#
TPS2042ADR_SO8
1
@10P_0402_50V8K
2
OC1# OUT1 OUT2 OC2#
OC1# OUT1 OUT2 OC2#
8 7 6 5
C27
+USB_VCCA
8 7 6 5
1
2
12
C26
@10P_0402_50V8K
R31 100K_0402_5%
12
R348 100K_0402_5%
1
2
12
100K_0402_5% R41
1 2
R25 47_0402_5%
1 2
R50 47_0402_5%
+3V+USB_VCCC
12
R342 100K_0402_5%
R346 47_0402_5%
C29
@10P_0402_50V8K
C32
0.1U_0402_16V4Z
1 2
C352
0.1U_0402_16V4Z
USB0- USB0+
1
2
C28
@10P_0402_50V8K
1
2
1
2
1
C37
0.1U_0402_16V4Z
2
1
2
1 2
R34 0_0402_5%
1 2
R30 @0_0402_5%
1 2
R48 @0_0402_5%
1 2
R40 0_0402_5%
1 2
R345 0_0402_5%
1 2
R344 @0_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THI S SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
OVCUR_USB20#0 24
OVCUR#0 27
OVCUR#1 27
OVCUR_USB20#1 24
USB20_NEC_P0-24
USB20_NEC_P0+24
USB20P0-27
USB20P0+27
USB20_NEC_P1-24
USB20_NEC_P1+24
USB20P1-27
USB20P1+27
Keep 20 mils minimum spacing
OVCUR_USB20#2 24
OVCUR#2 27
USB20P2-27
USB20P2+27
USB20_NEC_P2-24
USB20_NEC_P2+24
+USB_VCCA
+
C369
150U_D2_6.3VM
1 2
R373 0_0402_5%
1 2
R374 0_0402_5%
1 2
R363 @0_0402_5%
1 2
R364 @0_0402_5%
1 2
R371 0_0402_5%
1 2
R372 0_0402_5%
1 2
R365 @0_0402_5%
1 2
R366 @0_0402_5%
+USB_VCCB
+
C375
150U_D2_6.3VM
C700
150U_D2_6.3VM
1 2
R576 @0_0402_5%
1 2
R574 @0_0402_5%
1 2
R575 0_0402_5%
1 2
R573 0_0402_5%
1
2
1
2
1
C368 470P_0603_50V8J
2
USB_CGND
USB CONNECTOR
JP13
USB0­USB0+
USB1-
USB1+
1
C364 470P_0603_50V8J
USB_BGND
+USB_VCCC
1
+
2
USB_AGND
Title
Size Docu ment Number Re v
Custom
Date: Sheet
2
1
C701 470P_0603_50V8J
2
USB2­USB2+
USB CONNECTOR
JP26
1
1
2
2
3
3
4
4
TYCO_1470712-1
Compal Electronics, Ltd.
USB & Bluetooth
LA-2051
星期三 八月
27, 2003
1 2 3 4 5 6 7 8
TYCO_1470713-1
31 51,
0.1A
of
5
AC97 Codec
12
R180 @68K_0402_5%
12 12
R184
20K_0402_5%
1
2
12
12
LINEIN_L LINEIN_R
12
R179 @68K_0402_5%
12
C_MD_SPK
12
R185
2.4K_0402_5%
CD_GNA
R426 20K_0402_5%
CD_L CD_R
12
R181 20K_0402_5%
+VDDA
MONO_IN33
IAC_RST#27
IAC_SYNC27,29
IAC_SDATAO27,29
MD_SPK
C155
1 2
R176 0_0402_5%
1 2
R175 0_0402_5%
INT_CD_L
R183 20K_0402_5%
INT_CD_R
R182 20K_0402_5%
R190
1 2
10K_0402_5%
1
C148
2
@0.01U_0402_25V4Z
12
20K_0402_5%
R425 0_0402_5%
R427
LINE_IN_L33 LINE_IN_R33
D D
INT_CD_R30
C C
0.01U_0402_25V4Z
CD_AGND30
B B
4
L30
1 2
CHB2012U170_0805
C442
0.1U_0402_16V4Z
LINEIN_L
C158 1U_0402_6.3V4Z
LINEIN_R
C157 1U_0402_6.3V4Z
CD_L
C163 1U_0402_6.3V4Z
CD_R
C161 1U_0402_6.3V4Z
CD_GNA
MIC33
XTLSEL=0 external clock 14.318M
EAPD33
C162 1U_0402_6.3V4Z C160 1U_0402_6.3V4Z C159 0.1U_0402_16V4Z
C_MD_SPK
C164 1U_0402_6.3V4Z
IAC_RST#
1 2
R196 100_0402_5%
IAC_SYNC IAC_SDATAO
R231 @0_0402_5%
DGND
+AVDD_AC97
1
1
C211 10U_0805_10V4Z
2
2
38
U21
AVDD125AVDD2
14
AUX_L
15
AUX_R
16
VIDEO_L
17 12 12 12 12 12
C_MICMIC
12 12 12
12
VIDEO_R
23
LINE_IN_L
24
LINE_IN_R
18
CD_L
20
CD_R
19
CD_GND
21
MIC1
22
MIC2
13
PHONE
12
PC_BEEP
11
RESET#
10
SYNC
5
SDATA_OUT
45
NC
46
XTLSEL
47
EAPD
48
SPDIFO
4
DVSS1
7
DVSS2
ALC202A F_LQFP48
LINE_OUT_L
LINE_OUT_R
TRUE_LOUT_L
TRUE_LOUT_R
1 2
L15 0_0805_5%
1 2
L8 @0_0805_5%
1 2
L6 @0_0805_5%
1 2
L43 @0_0805_5%
DGND AGND
+3VS
0.1U_0402_16V4Z
9
DVDD11DVDD2
MONO_OUT
BIT_CLK
SDATA_IN
XTL_IN
XTL_OUT
AFILT1 AFILT2
VREFOUT
VREF VRDA
VRAD
DCVOL
VAUX GPIO0 GPIO1
NC AVSS1 AVSS2
C207
3
LINEL
35
LINER
36 37 39 41
6 8 2
3 29 30 28 27 32
31 33 34 43 44
40 26
AGND
42
1
1
C182 10U_0805_10V4Z
2
2
1 2
C195 4.7U_0805_10V4Z
1 2
C203 4.7U_0805_10V4Z
1 2
C216 1U_0402_6.3V4Z
C212 @4.7U_0805_10V4Z C213 @4.7U_0805_10V4Z
R221 22_0402_5%
1 2 1 2
R213 22_0402_5%
XTL_IN
XTL_OUT
1 2
C172 1000P_0402_50V7K
1 2
C178 1000P_0402_50V7K
+AVDD_AC97
1 2
R206@0_0402_5%
AGND
4.7U_0805_10V4Z
1 2 1 2
C200 @0.01U_0402_25V4Z
1 2
R452 @1M_0402_5%
1 2
12
R200
@1K_0402_5%
+3V
+5VALW
0.1U_0402_16V4Z
1
1
C517
2
2
SUSP#
LINE_OUT_L 33 LINE_OUT_R 33INT_CD_L30
IAC_BITCLK 27 IAC_SDATAI0 27
CLK_AUDIO_14M 16
1 2
R229 @10K_0402_5% R230
@10K_0402_5%
+AUD_VREF
1
1
C467
C476 1U_0402_6.3V4Z
2
2
LINE_OUT_L LINE_OUT_R
1
2
@0.01U_0402_25V4Z
1
C454 1U_0402_6.3V4Z
2
C531
SUSP#20,35,36,40
LINE_OUT_L LINE_OUT_R MD_MIC
IAC_BITCLK IAC_SDATAI0
C201@1U_0402_6.3V4Z
1 2
MDC Connector
1 2
R82 0_0402_5%
1 2
+3VS
L3
CHB1608B121_0603
IAC_SDATAO IAC_RST#
1
C7030.1U_0402_16V4Z
2
+3VS_MDC
2
Adjustable Output
U43
4
VIN
2
DELAY ERROR7CNOISE
8
SD
SI9182DH-AD_MSOP8
+3VS
C495
22P_0402_50V8J
0.1U_0402_16V4Z
1
2
+3V_MDC
AMP 3-1565120-0 30P H:9MM
VOUT
SENSE or ADJ
GND
LINEL
C189 1000P_0402_50V7K
LINER
C215 1000P_0402_50V7K
IAC_BITCLK IAC_SDATAI0
XTL_IN
1
24.576MHz_16P_3XG-24576-43E1
2
1
C448
C447
4.7U_0805_10V4Z
2
0.1U_0402_16V4Z
JP16
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
5 6 1 3
1
C509
0.1U_0402_16V4Z
2
1 2 1 2
1 2
C192 @22P_0402_50V8J
1 2
@10K_0402_5%
R214
X3
XTL_OUT
12
XTL_IN
1 2
+AUD_VREF
1
C167
+5VS_MDC
+3VS_MDC_R
1
2
2
1 2
CHB1608B121_0603
1 2
10K_0402_5%
1 2
R84 0_0402_5%
1 2
R86 22_0402_5%
1 2
R87 22_0402_5%
12
R473
69.8K_0603_1%
12
R465 24K_0402_1%
1
C455 22P_0402_50V8J
2
R459
@10_0402_5%
C154
4.7U_0805_10V4Z
L1
R81
1
+VDDA
MD_SPK
+5VS
IAC_SYNC
IAC_BITCLK
12
R83 10K_0402_5%
+VDDA
1
C552
4.7U_0805_10V4Z
2
EXCLK_AUDIO 38
+3VS
IAC_SDATAI1 27
A A
Compal Electronics, Ltd.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
AC97 Codec ALC202
Size Docu ment Number Re v
Custom
LA-2051
Date: Sheet
星期三 八月
27, 2003
32 51,
1
of
0.1A
A
Audio AMP
W/O EQ R385=R386= 1.3K Ohm
OUT_L
12
R2611.3K_0402_5%
OUT_R
12
R2691.3K_0402_5%
VOL_AMP
C237
12
4 4
LINE_OUT_L32
LINE_OUT_R32
3 3
0.1U_0402_16V4Z
LINE_OUT_L
LINE_OUT_R
C537=C539= 0.47U R = R385, R386
C = C537, C539 fo=1/(2*3.14*R*C)=260Hz
R=1.3K / C=0.47U
HIGH
Pin 22
LOW PIN 9,5 ACTIVE
INTSPK_L1 INTSPK_R1 OUT_L
1 2
C236 0.47U_0603_16V4Z C241 0.47U_0603_16V4Z
1 2
HP won't implement EQ.
OUT_R
C250 0.47U_0603_16V4Z C251 0.47U_0603_16V4Z
PIN 10,4 ACTIVE
NBA_PLUG VOL_AMP
1 2
C243 0.47U_0603_16V4Z
1 2
C240 0.47U_0603_16V4Z
1 2 1 2
0.1U_0402_16V4Z
HP_L HP_R
B
W=40Mil
C256
U26
7
PVDD
18
PVDD
19
VDD
2
HP/LINE#
3
VOLUME
4
LOUT+
21
ROUT+
5
LLINEIN
23
RLINEIN
6
LHPIN
20
RHPIN
17
CLK
TPA0232PWP_TSSOP24
1
C269
0.047U_0402_16V4Z
2
+5VS
1
2
1
2
SHUTDOWN#
SE/BTL#
PC-BEEP
BYPASS
LOUT-
ROUT-
GND GND GND GND
C264
4.7U_0805_10V4Z
22 15 14 11 9 16 10
LIN
8
RIN
1 12 13 24
INTSPK_L1
INTSPK_L2 INTSPK_R1 INTSPK_R2
D52 @SM05_SOT23
SHUTDOWN#
C275 0.1U_0402_16V4Z
2
1
C279
1
2
0.47U_0603_16V4Z
0.47U_0603_16V4Z
(0.47U~1U)
2
3
1
C
+5VS
12
R268 100K_0402_5%
Q46
13
D
2N7002_SOT23
2
G
+5VS
S
R264
100K_0402_5%
1
C273
2
0.47U_0603_16V4Z
1 2
NBA_PLUG
1 2
INTSPK_L2 INTSPK_R2
C267
Speaker Connector
JP5
1 2 3 4
3
1
ACES_85204-0400
D51 @SM05_SOT23
2
EAPD 32
R513
R307
R308
Bias (Gain)
W/O EQ
3K
3.6K
3.6K
SPK
0.608 V 12 dB
HP
1.216V 0dB
D
+5VS
R313
100K_0402_5%
NBA_PLUG
2
G
MIC
MIC32
L10
1 2
FBM-11-160808-700T_0603
1 2
2
G
13
D
Q28 2N7002_SOT23
S
@2.2K_0402_5%
MIC-1
220P_0402_50V8K
VOL_AMP
2
R307 3.6K_0402_5%
13
D
Q26 2N7002_SOT23
S
+AUD_VREF
R236
12
12
R237
C224
2.2K_0402_5%
1
2
1
3
12
E
1 2
R312 3K_0402_5%
4
5
VR1
3
10K
1 2
MICROPHONE IN JACK
JP4
5 4 3
6 2 1
FOX_JA6033L-5S1-TR
VR - C-Type
R308
3.6K_0402_5%
+5VS
LINE IN JACK
JP2
L28
1 2 1 2
FBM-11-160808-700T_0603
INTSPK_R1_1 INTSPK_L1_1
FBM-11-160808-700T_0603
FBM-11-160808-700T_0603
L29
FBM-11-160808-700T_0603
330P_0402_50V7K
1 2 1 2
INTSPK_R1 INTSPK_L1
LINE_IN_R32
LINE_IN_L32
1 2
C621
1 2
C637
+
150U_D2_6.3VM
+
150U_D2_6.3VM
D
2 2
System Sound
4
OE#
I5O
U18B
+3VALW
12
R193 100K_0402_5%
R197
1 2
6
8.2K_0402_5%
0.22U_0603_16V4Z
U19D
9
BEEP#35
SN74LVC125APWLE_TSSOP14
PCM_SPK#20
1 1
SB_SPKR27
SN74LVC14APWLE_TSSOP14
A
C173
+3VALW
14
P
G
7
+3VALW
5
1
2
+3V POWER
O8I
C166
1 2
0.1U_0402_16V4Z
14
U19C
P
O6I
G
SN74LVC14APWLE_TSSOP14
7
+3V POWER
1U_0402_6.3V4Z
C190
1 2
1U_0402_6.3V4Z
C181
1 2
1U_0402_6.3V4Z
C179
1 2
R204
1 2
560_0402_5%
R223
1 2
560_0402_5%
R207
1 2
560_0402_5%
10K_0402_5%
B
R216
MONO_IN_I
12
2 1
2
B
D22 RB751V_SOD323
+VDDA
12
R210 10K_0402_5%
12
R211 10K_0402_5%
1
C
Q25 2SC2411K_SC59
E
3
1
C193 10U_0805_10V4Z
2
MONO_IN_O
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1U_0402_6.3V4Z
R220
2.4K_0402_5%
1 2
C
C196
12
MONO_IN 32
LINE_IN_R-1 LINE_IN_L-1
1
C435
2
L40
INTSPK_R1_2
L41
INTSPK_L1_2
C632
330P_0402_50V7K
Title
Size Docu ment Number Re v
Custom
Date: Sheet
1
C431
330P_0402_50V7K
2
NBA_PLUG
1
1
C607 330P_0402_50V7K
2
2
Compal Electronics, Ltd.
Audio AMP & JACK
LA-2051
星期三 八月
27, 2003
5 4 3
6 2 1
FOX_JA6033L-5S1-TR
HEADPHONE OUT JACK
JP6
5 4 3
6 2 1
FOX_JA6033L-5S1-TR
E
33 51,
0.1A
of
A
SUPER I/O SMsC LPC47N217
1 1
2 2
+3VS
R187
@10K_0402_5%
C153
@15P_0402_50V8J
1 2
R162 10K_0402_5%
1 2
R113 10K_0402_5%
1 2
R186 10K_0402_5%
PID[ 0 ..3 ]18
LPC_AD[0..3]26,35
R154
@33_0402_5%
1 2 1
2
C124
@22P_0402_50V8J
PID[ 0 ..3] LPC_AD[0..3]
CLK_PCI_SIOCLK_SIO_14M
1 2 1
2
SIO_PD# SIO_SMI# SIO_PME#
B
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
FIR_DET#
12
LPC_FRAME# LPC_DRQ#1
PCIRST# SIO_PD#
PM_CLKRUN# CLK_PCI_SIO SERIRQ SIO_PME#
CLK_SIO_14M PID0
PID1 PID2 PID3
SIO_GPIO11 SIO_SMI# SIO_IRQ
SIO_GPIO23
C147
4.7U_0805_10V4Z
+3VS
LPC_FRAME#26,35
LPC_DRQ#126
PCIRST#10,19,20,21,22,24,25,26,30,35
PM_CLKRUN#19,20,22,24,25,26,35
CLK_PCI_SIO26
SERIRQ20,26,35
CLK_SIO_14M16
R145 100K_0402_5%
U14
10
LAD0
12
LAD1
13
LAD2
14
LAD3
15
LFRAME#
16
LDRQ#
17
PCI_RESET#
18
LPCPD#
19
CLKRUN#
20
PCI_CLK
21
SER_IRQ
6
IO_PME#
9
CLK14
CLOCK
23
GPIO40
24
GPIO41
25
GPIO42
27
GPIO43
28
GPIO44
29
GPIO45
30
GPIO46
31
GPIO47
32
GPIO10
33
GPIO11/SYSOPT
34
GPIO12/IO_SMI#
35
GPIO13/IRQIN1
36
GPIO14/IRQIN2
40
GPIO23
8
VSS
22
VSS
43
VSS
52
VSS
LPC47N217_STQFP64
+3VS
1
2
C
LPC I/F
GPIO
POWER
1
2
RXD1
TXD1 DSR1# RTS1# CTS1# DTR1#
RI1#
SERIAL I/F
DCD1#
IRRX2
FIR
IRTX2
IRMODE/IRRX3
INIT#
SLCTIN#
PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7
SLCT
PE
BUSY
PARALLEL I/F
ACK#
ERROR#
ALF#
STROBE#
VTR VCC VCC VCC VCC
C117
0.1U_0402_16V4Z
1
C114
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
D
+3VS
DCD#1
RXD1
62
TXD1
63
DSR#1
64
RTS#1
1
CTS#1
2
DTR#1
3
RI#1
4
DCD#1
5
IRRX
37
IRTXOUT
38
IRMODE
39
INIT#
41
SLCTIN#
42
LPD0
44
LPD1
46
LPD2
47
LPD3
48
LPD4
49
LPD5
50
LPD6
51
LPD7
53
LPTSLCT
55
LPTPE
56
LPTBUSY
57
LPTACK#
58
LPTERR#
59
LPTAFD#
60
LPTSTB#
61
RI#1 CTS#1 DSR#1
SIO_IRQ SIO_GPIO23 RXD1 IRRX
RP9
1 8 2 7 3 6 4 5
4.7K_1206_8P4R_5%
12
10K_0402_5%
R112
12
@10K_0402_5%
R111
1 2
R157 1K_0402_5%
1 2
R116 1K_0402_5%
E
Serial Port
7 11 26 45 54
1
C91
2
+3VS
SIO_GPIO11
+3VS
1 2
1 2
R118 @10K_0402_5%
R114 1K_0402_5%
Base I/O Address 0 = 02Eh
*
1 = 04Eh
for Debug
+5VS
RXD1 TXD1 DSR#1 RTS#1 CTS#1 DTR#1 RI#1 DCD#1
JP22
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
@E&T_96212-1011S
Parallel Port
3 3
CP2
2 3 4 5
220P_1206_8P4C_50V8K
2 3 4 5
220P_1206_8P4C_50V8K
CP10
8 1 7 6
220P_1206_8P4C_50V8K
CP9
4 5 3 2
4 4
220P_1206_8P4C_50V8K
LPTSLCTIN#
81
LPTINIT#
7
LPTERR#
6
AFD#/3M#
CP1
LPTACK#
81
LPTBUSY
7
LPTPE
6
LPTSLCT
FD0 FD1
2
FD2
3
FD3
45
FD4 FD5
6
FD6
7
FD7
81
A
+5V_PRN
+5V_PRN
LPTACK#
6 7
LPTPE
8
LPTSLCT
9
10
FD0
6
FD1
7
FD2
8
FD3
9
10
RP4
LPD0
1 8
LPD1
2 7
LPD2 FD2
3 6
LPD3 FD3
4 5
68_1206_8P4R_5%
RP3
LPD7
4 5
LPD6
3 6
LPD5
2 7
LPD4 FD4
1 8
68_1206_8P4R_5%
RP38
5
AFD#/3M#LPTBUSY
4
LPTERR#
3
LPTINIT#
2
LPTSLCTIN#
1
2.7K_1206_10P8R_5%
RP2
5
FD7
4
FD6
3
FD5
2
FD4
1
2.7K_1206_10P8R_5%
FD0 FD1
FD7 FD6 FD5
+5V_PRN
+5V_PRN
B
LPTSTB#
AFD#/3M# LPTAFD#
FD0 LPTERR# FD1 INIT# FD2 SLCTIN# FD3
FD4 FD5 FD6 FD7 LPTACK# LPTBUSY LPTPE LPTSLCT
D6
2 1
+5VS
RB420D_SOT23
R15
1 2
47_0402_5%
1 2
R16 33_0402_5%
1 2
33_0402_5%
R17
1 2
33_0402_5%
R13
+5V_PRN
LPTINIT# LPTSLCTIN#
12
R14
2.2K_0402_5%
1 2
JP11
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9 22 10 23 11 24 12 25 13
SUYIN_070536FR025S204ZU
FIR Module
C3
220P_0402_50V8K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
FIR_DET#
1
C400
2
10U_0805_10V4Z
1 2
R134 0_0402_5%
+3VS
R392 47_1206_5%
1 2
+IR_3VS
(30mil)
1
C399
0.1U_0402_16V4Z
2
+3VS
22U_1206_10V4Z
IRRX IRMODE
D
(60mil)
1
C704
2
SD/MODE: S HUTDOWN MODE, HIGH A CTIVE MODE: H I GH/LOW SPEED SELECT
R383 @4.7_1206_5%
1 2 1 2
R385
U39
2
IRED_C
4 6 8
Title
Size Docu ment Number Re v
Date: Sheet
SD/MODE
RXD VCC GND
TFDU6102-TR3_8P
PCB Foot pr int : TFDU6 101E
Compal Electronics, Ltd.
LPC-Super I/O
Custom
LA-2051
星期四 八月
4.7_1206_5%
IRED_A
TXD
MODE
28, 2003
1 3 5 7
+IR_ANODE
(60mil)
IRTXOUT
1
+
2
1 2
R393 @0_0402_5%
Reserved
E
C705 @150U_D2_6.3VM
34 51,
0.1A
of
5
0.1U_0402_16V4Z
1
C230
2
0.1U_0402_16V4Z
D D
ECAGND
C206 0.01U_0402_25V4Z
+3VALW
R136 10K_0402_5%
1
C130
2
0.1U_0402_16V4Z
+EC_AVCC
1
C233
0.1U_0402_16V4Z
2
12
12
0.1U_0402_16V4Z
1
C108
2
L12
1 2
CHB1608U800_0603
ECAGND
BATT_TEMP
EC_RST#
1
2
1
C430
2
1000P_0402_50V7K
+3VALW
CLK_PCI_EC26
C712 @0.01U_0402_25V4Z
+3VALW
C180
2
C217 1000P_0402_50V7K
1
2
1
+3VS
LPC_AD[0..3]26,34
12
R137 @33_0402_5%
1
C102 @22P_0402_25V8K
2
KB910 (Reserved)
1 2 1 2
R131 0_0402_5%
NS591L
SERIRQ20,26,34
LPC_DRQ#026
LPC_FRAME#26,34
EC_SCI#27
POP FOR KB910 (Reserved)
+3VALW
R423
C C
1394_PME#19,20,22,24,25
WLANPME#19,20,22,24,25
MODE# FRD# SELIO# FSEL#
EC_SMC2
4.7K_0402_5%
EC_SMD2
4.7K_0402_5%
12
12
12
5
1 2
R421 @0_0402_5%
+5VS
VR_ON
SYSON
SUSP#
AD_BID0
1
C229
0.1U_0402_16V4Z
2
4.7K_0402_5%
4.7K_0402_5%
LPC_PME#27
PCM_PME#19,20,22,24,25
LAN_PME#19,20,22,24,25
USB20_PME#19,20,22,24,25
+3VALW
RP56
1 8 2 7 3 6 4 5
10K_1206_8P4R_5%
B B
+5VALW
1 2
R424
1 2
R422
R205
47K_0402_5%
R212
10K_0402_5%
R215
10K_0402_5%
+3VALW
R247 100K_0402_5%
Ra
A A
1 2
R259 0_0402_5%
Rb
1 2
Analog Board ID definition, Please see page 3.
10K_0402_5%
1 2
EC_PME#
TP_CLK
12
R249
TP_DATA
12
R250
CRY1
32.768KHZ_12.5P_CM155
1
C175 10P_0402_50V8K
2
+3VALW
1 2
R258 @100K_0402_5%
EC_LID_SW#37
Ra
R194
1 2
20M_0603_5%
X1
LPC_AD[0..3]
GATEA2027
KBRST#27
EC_PLAYBTN#37 EC_STOPBTN#37 EC_REVBTN#37 EC_FRDBTN#37 TV_OUT_EN#37
KB910 (Must)
TP_DATA37
EC_SMI#27
S4_DATA39
WL_OFF#25 EC_SWI#27 S4_LATCH39
SYSON39,40,45 SUSP#20,32,36,40
VR_ON47
PCMRST#21
EC_RSMRST#27 SHDD_LED#30
ENBKL#9 BKOFF#18
FSEL#36
CRY2
4
R130 @0_0402_5%
1
C109
0.1U_0402_16V4Z
2
1 2
R132 @0_0402_5%
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
EC_RST#
910_NUMLED#
EC_SCI#
1 2
R590 0_0402_5%
KSO10 KSO11 KSO12 KSO13 KSO14 KSO15
EC_TINT# EC_TCK EC_TDO EC_TDI EC_TMS
pin110 reserve for KSO16
TP_CLK37
PSCLK1 PSDAT1 PSCLK2 PSDAT2 TP_CLK TP_DATA
591_HDD_LED#
CRY1 CRY2
EC_SMI#
SYSON SUSP# VR_ON
BKOFF# FSEL#
PC87591L-VPCN01 A2_LQFP176
R191 120K_0402_5%
Rb
PROPRIETARY NOTE
1 2
1
C168 12P_0402_50V8J
2
4
+EC_VDD
7 8
9 15 14 13 10 18 19 22 23
31
5
6
KSI0
71
KSI1
72
KSI2
73
KSI3
74
KSI4
77
KSI5
78
KSI6
79
KSI7
80
KSO0
49
KSO1
50
KSO2
51
KSO3
52
KSO4
53
KSO5
56
KSO6
57
KSO7
58
KSO8
59
KSO9
60 61 64 65 66 67 68
105 106 107 108 109
110 111 114 115 116 117 118 119
158 160
62 63 69 70 75 76
148 149 155 156
3
4 27 28
173 174
47
RaRb20M_0603_5%
16
U15
VDD
SERIRQ LDRQ# LFRAME# LAD0 LAD1 LAD2 LAD3 LCLK RESET1# SMI# PWUREQ#
IOPD3/ECSCI#
GA20/IOPB5 KBRST/IOPB6
KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7
KBSOUT0 KBSOUT1 KBSOUT2 KBSOUT3 KBSOUT4 KBSOUT5 KBSOUT6 KBSOUT7 KBSOUT8 KBSOUT9 KBSOUT10 KBSOUT11 KBSOUT12 KBSOUT13 KBSOUT14 KBSOUT15
TINT# TCK TDO TDI TMS
PSCLK1/IOPF0 PSDAT1/IOPF1 PSCLK2/IOPF2 PSDAT2/IOPF3 PSCLK3/IOPF4 PSDAT3/IOPF5 PSCLK4/IOPF6 PSDAT4/IOPF7
32KX1/32KCLKIN 32KX2
IOPJ2/BST0 IOPJ3/BST1 IOPJ4/BST2 IOPJ5/PFS IOPJ6/PLI IOPJ7/BRKL_RSTO
IOPM0/D8 IOPM1/D9 IOPM2/D10 IOPM3/D11 IOPM4/D12 IOPM5/D13 IOPM6/D14 IOPM7/D15
SEL0# SEL1# CLK
Host interface
Key matrix scan
JTAG debug port
PS2 interface
PORTM
1 2
CHB1608U800_0603
NS87591L KB910
120K_0402_5%
VCC134VCC245VCC3
PORTJ-2
GND117GND235GND346GND4
122
L13
No Stuff 0_0402_5%
123
136
VCC4
GND5
GND6
159
167
ECAGND
157
166
VCC5
PORTB
PORTD-1
PORTE
GND7
137
3
+EC_AVCC+3VALW
95
VCC6
AVCC
AD Input
DA output
PWM or PORTA
IOPB7/RING/PFAIL/RESET2
PORTC
IOPC4/TB1/EXWINT22 IOPC6/TB2/EXWINT23
IOPD0/RI1/EXWINT20 IOPD1/RI2/EXWINT21
IOPD2/EXWINT24/RESET2
IOPE6/LPCPD/EXWIN45
IOPE7/CLKRUN/EXWINT46
PORTH
PORTI
PORTJ-1
PORTD-2
PORTK
PORTL
AGND
NC212NC320NC421NC585NC686NC791NC892NC997NC10
NC1
96
11
1 2
R140 @0_0402_5%
1 2
R141 @0_0402_5%
R431
1 2
0_0402_5%
161
VBAT
AD0 AD1 AD2 AD3
IOPE0AD4 IOPE1/AD5 IOPE2/AD6 IOPE3/AD7
DP/AD8 DN/AD9
DA0 DA1 DA2 DA3
IOPA0/PWM0 IOPA1/PWM1 IOPA2/PWM2 IOPA3/PWM3 IOPA4/PWM4 IOPA5/PWM5 IOPA6/PWM6 IOPA7/PWM7
IOPB0/URXD IOPB1/UTXD
IOPB2/USCLK
IOPB3/SCL1
IOPB4/SDA1
IOPC0 IOPC1/SCL2 IOPC2/SDA2
IOPC3/TA1 IOPC5/TA2
IOPC7/CLKOUT
IOPE4/SWIN
IOPE5/EXWINT40
IOPH0/A0/ENV0
IOPH1/A1/ENV1 IOPH2/A2/BADDR0 IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
IOPH6/A6 IOPH7/A7
IOPI0/D0 IOPI1/D1 IOPI2/D2 IOPI3/D3 IOPI4/D4 IOPI5/D5 IOPI6/D6 IOPI7/D7
IOPJ0/RD
IOPJ1/WR0
SELIO#
IOPD4 IOPD5 IOPD6 IOPD7
IOPK0/A8
IOPK1/A9 IOPK2/A10 IOPK3/A11 IOPK4/A12
IOPK5/A13_BE0 IOPK6/A14_BE1
IOPK7/A15_CBRD
IOPL0/A16 IOPL1/A17 IOPL2/A18 IOPL3/A19
IOPL4/WR1#
910_HDD_LED#
1 2
R129 @0_0402_5%
1 2
0.1U_0402_16V4Z
81 82 83 84 87 88 89 90 93 94
99 100 101 102
32 33 36 37 38 39 40 43
153 154 162 163 164 165
168 169 170 171 172 175 176 1
26 29 30
2 44 24 25
124 125 126 127 128 131 132 133
138 139 140 141 144 145 146 147
150 151
152 41
42 54 55
143 142 135 134 130 129 121 120
113 112 104 103 48
98
C144
EC_SCI#
UNPOP FOR 551
+RTCVCC+3VALW
BATT_TEMPB
BATT_TEMP
VBATTA VBATTB
910_AD_BID0
591_AD_BID0
INVT_PWM
EC_URX D
EC_UTXD/KSO17
EC_USCLK EC_SMC1 EC_SMD1 PCIRST#
EC_SMC2 EC_SMD2
EC_PME# EC_THERM#
ACIN
KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
FRD#
SELIO#
591_NUM_LED#
CAPS_LED# PADS_LED#
KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15
KBA16 KBA17 KBA18 KBA19
BATT_TEMPA 42 ADP_I 43,46 BATT_OVP 43
ALI/MH# 42 EMAIL# 37 MODE# 37 INTERNET# 37
DAC_BRIG 18 EN_DFAN2 37 IREF 43 EN_DFAN1 37
INVT_PWM 18 BEEP# 33 PWR_SUSP_LED 37 ACOFF 43 PM_BATLOW# 27
EC_ON 37 EC_LID_OUT# 27
EC_UTXD/KSO17 37 EC_SMC1 36,38,42
EC_SMD1 36,38,42
PCIRST# 10,19,20, 21,22,24,25,26,30,34 PBTN_OUT# 27
EC_SMC2 6 EC_SMD2 6 FAN_SPEED1 37
EC_THERM# 27
FAN_SPEED2 37
ACI N 27,37,41 KILL_SW# 2 5,37 PM_SLP_S3# 27
ON/OFF 37 PM_SLP_S5# 27
PM_CLKRUN# 19, 20,22,24,25,26,34
FRD# 36
FWR# 36 SELIO# 36
PHDD_LED# 30
FSTCHG 43
POP FOR 551 & 87591V
@1U_0402_6.3V4Z
KBA[0..19]36
ADB[0..7]36
C107
1 2
2
POP FOR KB910 (Reserved)
THIS SH EE T OF E NG INE E RIN G DRA WI NG IS T H E PR OPR IE TARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRA DE S EC RE T IN FO RM AT IO N. T H IS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELEC TRONICS , INC. NEITHER THI S SHEET NO R THE INFO RMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WI THOUT PR IOR WRI TTEN CON SENT OF COMPAL E LECTRONICS, INC .
3
2
KBA[0..19] ADB[0..7]
910_AD_BID0
1 2
R582 @0_0402_5%
591_AD_BID0
1 2
R583 0_0402_5%
KEYBOARD CONN.
JP9
NUM_LED#
34
PADS_LED#
33
CAPS_LED#
32 31
KSO15
30
KSO14
29
KSO10
28
KSO11
27
KSO8
26
KSO9
25
KSO13
24
KSI7
23
KSO3
22
KSO7
21
KSO12
20
KSI4
19
KSI6
18
KSI5
17
KSO6
16
KSO5
15
KSI3
14
KSI0
13
KSO0
12
KSO1
11
KSI1
10
KSI2
9
KSO2
8
KSO4
7 6 5 4 3 2 1
ACES_88170-3400
PSCLK1
4 5
PSDAT1
3 6
PSCLK2
2 7
PSDAT2
1 8
RP93
BADDR1(KBA3) BADDR0(KBA2)
0 0
*
11
0 1 01
ENV0 (KBA0) TRIS (KBA4)
IRE
*
OBD 0 DEV 0 PROG
SHBM(KBA5)=1: Enable shared memory with host BIOS TRIS(KBA4)=1: While in IRE and OBD, float all the signals for clip-on ISE use
KBA1
1 2
R252 1K_0402_5%
KBA2
1 2
R253 @1K_0402_5%
KBA3
1 2
R254 1K_0402_5%
KBA5
1 2
R255 1K_0402_5%
591_HDD_LED# 910_HDD_LED#
910_NUMLED# 591_NUM_LED#
Title
Size Docum ent Number Re v Custom
Dat e: Sheet
1
For EC Tools
JP3
1
AD_BID0
R321
1 2
300_0402_5%
R319
1 2
300_0402_5%
R318
1 2
300_0402_5%
+5VS
@10K_1206_8P4R_5%
1 2 3 4 5 6 7 8 9
10
@E&T_96212-1011S
+3VS
+3VS
+3VS
KB910 (Reserved)
2 3 4 5 6 7 8 9 10
KSO15 KSO14 KSO10 KSO11
KSO8 KSO9 KSO13
KSI7
@100P_1206_8P4C_50V8
KSO3 KSO7 KSO12
KSI4
@100P_1206_8P4C_50V8
KSI6
KSI5 KSO6 KSO5
@100P_1206_8P4C_50V8
KSI3
KSI0
KSO0 KSO1
@100P_1206_8P4C_50V8
KSI1
KSI2 KSO2 KSO4
@100P_1206_8P4C_50V8
EC_TINT#
EC_TCK EC_TDO EC_TDI EC_TMS
EC_URXD
EC_UTXD/KSO17
EC_USCLK
CP8
6 7 8 1
@100P_1206_8P4C_50V8
CP7
6 7 8 1
CP6
6 7 8 1
CP5
6 7 8 1
CP4
6 7 8 1
CP3
6 7 8 1
I/O Address
Index
Data 2E 2F 4E
4F
(HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1
Reserved
ENV1 (KBA1) 0 1
1
0 1
1
+3VALW
PCIRST#
1 2
R251 0_0402_5%
1 2
R248 @0_0402_5%
1 2
R135 @0_0402_5%
1 2
R138 0_0402_5%
0 0 0 0
R591
@100K_0402_5%
1 2
NUM_LED#
HDD_LED# 37
Comp al E l e c t r on i c s , Ltd.
LPC- PC8 7 591
LA-2051
星期四 八月
8, 2003
35 51, 2
1
+3VALW
45 3 2
45 3 2
45 3 2
45 3 2
45 3 2
45 3 2
0.1A
of
SELIO#35
System BIOS
C421
1 2
0.1U_0402_16V4Z
14
U10C
P
FWE#
SN74LVC32APWLE_TSSOP14
A
8
O
B
G
7
+3VALW+3VALW
9 10
EC_SMC135,38,42 EC_SMD135,38,42
R414 100K_0402_5%
1 2
4.7K_0402_5%
C420
1 2
0.1U_0402_16V4Z
KBA2
2
1 3
D
Q21 2N7002_SOT23
+5VALW +5VALW
R72
1 2
+3VALW
14
U10B
4
P
A
O
5
B
G
SN74LVC32APWLE_TSSOP14
7
G
S
FWR# 35
+5VALW
R75
4.7K_0402_5%
1 2
100K_0402_5%
6
+5VALW
SUSP# 20,32,35,40
FLASH# 27
C43
1 2
0.1U_0402_16V4Z U6
8
VCC
7
WP
6
SCL
5
SDA
AT24C16AN-10SI-2.7_SO8
+3VALW
R316
1 2
1 2
R347
20K_0402_5%
A0 A1 A2
GND
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
AA LARST#SELIO#
C350
1 2
1U_0805_25V4Z
+5VALW
1 2 3 4
R65 100K_0402_5%
1 2
3
11
1
ADB[0..7]35
D0 D14Q1 D27Q2 D38Q3 D413Q4 D514Q5 D617Q6 D718Q7
CP MR
KBA[0..19]35
+5VALW
C351
1 2
0.1U_0402_16V4Z
20
Q0
VCC
GND
10
U31
2 5 6 9 12 15 16 19
SN74HCT273PW_TSSOP20
CDON_LED# 37 MP3_LED# 37 E-MAIL_LED# 37 PWR_LED# 37 WL_BT_LED# 37 BATT_LOW_LED# 37 BATT_CHGI_LED# 37 CD_FDD_LED# 37
SMBus EEPROM
KBA[0..19]
ADB[0 ..7 ]
U40
KBA18
1
A18
KBA16
2
A16
KBA15 KBA17
3
A15
KBA12 KBA14
4
A12
KBA7 KBA13
5
A7
KBA6 KBA8
6
A6
KBA5 KBA9
7
A5
KBA4 KBA11
8
A4
KBA3 FRD#
9
A3
KBA2 KBA10
10
A2
KBA1 FSEL#
11
A1
KBA0
12
A0
ADB0 ADB6
13
DQ0
ADB1
14
DQ1
ADB2 ADB4
15
DQ2
16
VSS
512K8-90_PLCC32
VDD
WE#
OE# CE#
DQ7 DQ6 DQ5 DQ4 DQ3
A17 A14 A13
A8 A9
A11 A10
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
C59
1 2
0.1U_0402_16V4Z
+3VALW
FWE#
ADB7 ADB5 ADB3
FRD# 35 FSEL# 35
KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7 KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15 KBA16 KBA17 KBA18 KBA19
FSEL# FRD# FWE#
U41
21
A0
20
A1
19
A2
18
A3
17
A4
16
A5
15
A6
14
A7
8
A8
7
A9
36
A10
6
A11
5
A12
4
A13
3
A14
2
A15
1
A16
READY/BUSY#
40
A17
13
A18
37
A19
22
CE#
24
OE#
9
WE#
@SST39VF080-70_TSOP40
VCC0 VCC1
GND0 GND1
RP#
NC0 NC1
+3VALW
31 30
ADB0
25
D0 D1 D2 D3 D4 D5 D6 D7
NC
ADB1
26
ADB2
27
ADB3
28
ADB4
32
ADB5
33
ADB6
34
ADB7
35
RESET#
10 11 12 29 38
23 39
1 2
R71 @100K_0402_5%
1
C44 @0.1U_0402_16V4Z
2
+3VALW
R69 100K_0402_5%
1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THI S SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Compal Electronics, Ltd.
Title
BIOS & Ext.I/O
Size Docu ment Number Re v
Custom
LA-2051
Date: Sheet
星期三 八月
27, 2003
of
36 51,
0.1A
5
SW BOARD Connector
(Top contact)
D D
1000P_0402_50V7K
C C
PWR_SUSP_LED35
+5VALW
1
2
1K_0402_5%
1
C303 1U_0603_10V6K
2
+3VS
R550
1 2 2
3 1
Q48
MMBT3904_SOT23
+5VALW
C304
HDD_LED#35
FAN CONN. 1
1
C318
@0.1U_0402_16V4Z
EN_DFAN135
B B
1
0.1U_0402_16V4Z
2
2
R566
10K_0402_5%
C320
EN_DFAN1
12
R552 10K_0402_5%
1 2
3 2
+5VALW
2
G
+12VALW
8
P
+IN
-IN G
4
1 2
R564
FAN_SPEED135
12
R553 10K_0402_5%
13
D
Q47 2N7002_SOT23
S
EC_UTXD/KSO1735
EC_REVBTN#35
EC_FRDBTN#35 EC_PLAYBTN#35 EC_STOPBTN#35
BATT_LOW_LED#36 BATT_CHGI_LED#36
CD_FDD_LED#36
U30A
1
OUT
LM358A_SO8
8.2K_0402_5%
SUSP_LED#
MODE#35
51ON#41
PWR_LED#36
CDON_LED#36
MP3_LED#36
E-MAIL_LED#36
+5VALW +5VALW
ACIN27,35,41
R562
1 2
100_0402_5%
0.1U_0402_16V4Z
MODE# 51ON#
EC_UTXD/KSO17 EC_REVBTN# EC_FRDBTN# EC_PLAYBTN# EC_STOPBTN#
ACIN PWR_LED# SUSP_LED# BATT_LOW_LED# BATT_CHGI_LED# HDD_LED_OUT# CD_FDD_LED#
CDON_LED# MP3_LED# E-MAIL_LED#
2
C684
1
1N4148_SOT23
+3VS
R561 10K_0402_5%
1 2
FAN CONN. 2
EN_DFAN235
A A
EN_DFAN2
R329
10K_0402_5%
5
12
5
+IN
6
-IN
1 2
R326
U30B
OUT
LM358A_SO8
8.2K_0402_5%
FAN_SPEED235
7
1 2
100_0402_5%
0.1U_0402_16V4Z
10K_0402_5%
R323
R565
C689
+3VS
1 2
FMMT619_SOT23
2
1
1N4148_SOT23
4
Touch Pad Connector
+5VS
TP_CLK TP_DATA
1
C663 1U_0603_10V6K
2
TP_CLK35
TP_DATA35
PLACE CLOSE TO JP8
51ON#
1 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
FMMT619_SOT23
2
B
D54
2
B
D25
JP8
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
E&T_6901-26
For EMI
+5VALW
1
C
Q53
E
3
1
@1000P_0402_50V7K
3
2
@1000P_0402_50V7K
+5VALW
1
C
Q51
E
3
1
@1000P_0402_50V7K
3
2
@1000P_0402_50V7K
4
MODE#
EC_UTXD/KSO17
EC_REVBTN#
EC_FRDBTN#
EC_PLAYBTN#
EC_STOPBTN#
ACIN
PWR_LED#
SUSP_LED#
BATT_LOW_LED#
BATT_CHGI_LED#
HDD_LED#
CD_FDD_LED#
CDON_LED#
MP3_LED#
E-MAIL_LED#
C298 @100P_0402_50V8K C297 @100P_0402_50V8K C299 @100P_0402_50V8K C300 @100P_0402_50V8K C301 @100P_0402_50V8K C302 @100P_0402_50V8K C661 @100P_0402_50V8K C660 @1000P_0402_50V7K C659 @100P_0402_50V8K C658 @1000P_0402_50V7K C670 @100P_0402_50V8K C669 @100P_0402_50V8K C652 @100P_0402_50V8K C668 @100P_0402_50V8K C667 @220P_0402_50V8K C666 @100P_0402_50V8K C665 @220P_0402_50V8K
12
D56
1SS355_SOD323
+5V_FAN1
1
C680
2
1
C683
2
12
D53
1SS355_SOD323
+5V_FAN2
1
C687
2
1
C691
2
1
C697 10U_0805_10V4Z
2
1
C685 10U_0805_10V4Z
2
12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12
JP21
1
1
2
2
3
3
4
4
ACES_85205-0400
JP24
1
1
2
2
3
3
4
4
ACES_85205-0400
JP7
1 2 3 4 5 6
ACES_85201-0602
3
LID_SW#
100K_0402_5%
EC_LID_SW#35
LID_SW#39
@V-PORT-0603-220 M-V05_0603
+3VALW
R24
LID_SW#
12
D10
RB751V_SOD323
D11
2 1
2 1
SW1
2 5
ESE24MV1T_6P
2
1 6
3 4
Kill SWITCH
SW6
1
1
2
2
3
3
DS-1208_3P
@V-PORT-0603-220 M-V05_0603
D40
+3VALW
R401 100K_0402_5%
1 2
2 1
1
KILL_SW# 25,35
WIRELESS ACTIVE AMB LED
TV-OUT BUTTON
EC_UTXD/KSO17
Internet Button User Button & E-MAIL SW
SMT1-05_4P
SW3
1 2
SMT1-05_4P
SW5
1 2
5
6
@V-PORT-0603-220 M-V05_0603
2
3
3 4
5
6
3 4
D7
51ON#
D34 1N4148_SOT23
1
3
2 1
2
D35 @PSOT24C_SOT23
1
TV_OUT_EN# 35
+3VALW
INTERNET#
3
2
1
+3VALW
120_0402_5%
R19 100K_0402_5% R362 100K_0402_5%
D33 1N4148_SOT23
12 12
INTERNET# 35
SMT1-05_4P
R107
1 2
SW4
1 2
6
5
17-21UYOC/S530-A2/TR8_ORG
D15
2 1
47K
10K
1 3
EMAIL# INTERNET#
3 4
1N4148_SOT23 D4
2
3
1
Q15 DTA114YKA_SC59
WL_BT_LED#
2
3
2
3
D3 @PSOT24C_SOT23
1
1
EMAIL#
2
D8 1N4148_SOT23
Power Button
2
3
D9 @PSOT24C_SOT23
1
SW2
5
6
EC_ON35
2N7002_SOT23
3 4
EC_ON
Q33
1 2
SMT1-05_4P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
+3VALW
D
S
D5
1
DAN202U_SC70
R360
4.7K_0402_5% R358
1 2
1 2
33K_0402_5%
13
2
G
+3VALW
R18 100K_0402_5%
1 2
2 3
2
Q4
13
51ON#
C4
DTC124EK_SC59
ON/OFF# 39
ON/OFF 35
1000P_0402_50V7K
2
1
2
12
D2 RLZ20A_LL34
RTC BATT
BATT1
-
ML1220T13RE
+RTCVCC
1
C681
0.1U_0402_16V4Z
Compal Electronics, Ltd.
Title
System Connectors
Size Docu ment Number Re v
Custom
LA-2051
Date: Sheet
星期三 八月
2
27, 2003
+
12
+RTCBATT
+RTCBATT
1
3
1
C688
0.1U_0402_16V4Z
1 2
D55 BAS40-04_SOT23
2
+CHGRTC
37 51,
WL_BT_LED# 36
EMAIL# 35
0.1A
of
A
VID_PWRGD
U18C
1 1
H_VID_PWRGD5
8
SN74LVC125APWLE_TSSOP14
+3V POWER
10
OE#
I9O
+3V
12
R188 10K_0402_5%
1 2
R192 0_0402_5%
14
U19F
P
13
O12I
G
SN74LVC14APWLE_TSSOP14
7
B
VID_PWRGD 47 ENLL 47
12 13
+3VALW+3VALW
14
U10D
P
A
11
O
B
G
SN74LVC32APWLE_TSSOP14
7
C
13
U18D
11
OE#
I12O
SN74LVC125APWLE_TSSOP14
FD3 FIDUCAL
1
FD5 FIDUCAL
1
CF15 SMD40M80
1
CF6 SMD40M80
1
CF5 SMD40M80
1
FD1 FIDUCAL
1
FD6 FIDUCAL
1
CF16 SMD40M80
1
CF13 SMD40M80
1
CF10 SMD40M80
1
FD2 FIDUCAL
1
FD4 FIDUCAL
1
CF3 SMD40M80
CF11 SMD40M80
D
CF1
CF2
CF7 SMD40M80
1
CF14 SMD40M80
1
CF12 SMD40M80
1
CF4 SMD40M80
1
SMD40M80
SMD40M80
1
1
CF9 SMD40M80
1
1
CF8 SMD40M80
1
1
E
+3V+3VS
12
2 2
+3V_EXCLK
SS ENABLE
12
HIGH:? LOW: ?
3 3
12
EC_SMC135,36,42
EC_SMD135,36,42
@0_0603_5%
R569 @10K_0402_5%
R570 @10K_0402_5%
R555
1 2
6 7 4
27
26
+3V_EXCLK
R554 @0_0603_5%
8
19
9
U45
VDD
VDD
INPUT_SEL/REF0 REF1 CLKIN
ICS 960011
SCLK
SDATA
GND5GND
GND12GND
11
17
Width=40 mils
20
VDD
VDD25VDD
GND
GND
1
23
22
C696
@10U_0805_10V4Z
28
15
VDD14VDD
AVDD
CLK0 CLK1 CLK2 CLK3
CLK4
24.576MHz
X12X2
GND
3
@ICS_960011_TSSOP28
2
C692 @10P_0402_50V8K
1
@0.1U_0402_10V6K
1
2
13 16 18 21
24
10
1 2
@1M_0402_5%
C695
R567
Y6
1 2
1
1
C694
2
2
@0.1U_0402_10V6K
EXCLK_USB20 24
EXCLK_27M_TV 10EXCLK_CLKGEN16
EXCLK_1394 19
EXCLK_AUDIO 32
1
2
@0.1U_0402_10V6K
1
C676
2
@0.1U_0402_10V6K
C677
@14.31818MHZ_20P_6X1430004201
2
C693 @10P_0402_50V8K
1
@0.1U_0402_10V6K
1
C675
2
@0.1U_0402_10V6K
C674
1
1
C673
2
2
@0.1U_0402_10V6K
H1
H_S315D110
1
H26
H_S315D110
1
H30
H_S315D181
1
H6
H_C126D110
1
H10
H_C335D91
1
H2
H_S315D110
1
H25
H_S315D110
1
H33
H_C315D142
1
H36
H_S315D181
1
H17
H_C126D110
1
H_C335D91
H20
1
H3
H_S315D110
1
H24
H_S315D110
1
H28
H_C315D142
1
H7
H_S315D110
1
H23
H_S315D110
1
H_C276D142
H_S315D118
H_C335D142
H31
1
H9
1
H35
1
H5
H_S315D110
1
H27
H_S315D110
1
H_C276D142
H32
1
H_C315D142
H_C118D118N
H_C197D91
H_C276D91
H15
H_C181D161
1
H29
1
2 1
H4
1
H8
1
H12
1
J1 PAD-OPEN 2x2m
H_C197D91
H_C315D142
H16
1
H18
H_C276D91
1
H34
1
J2 PAD-OPEN 2x2m
2 1
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
H11
H_O85X118D85X118N
1
H13
H_C63D63N
1
H14
H_O63X102D63X102N
1
D
H_C85D85N
H19
1
H21
H_O201X162D201X162N
1
Compal Electronics, Ltd.
Title
PowerGood
Size Docu ment Number Re v
Custom
LA-2051
Date: Sheet
星期三 八月
H22
H_O315X236D315X236N
1
27, 2003
38 51,
E
0.1A
of
A
1 1
B
C
D
E
RTCVREF
RTCVREF RTCVREF RTCVREF
R44
2
G
12
680K_0402_5%
1 2
C35 1U_0805_25V4Z
13
D
Q13 2N7002_SOT23
S
12
R53
100K_0402_5%
2 2
D14
LID_SW#37
100K_0402_5%
21
RB751V_SOD323
RTCVREF
1 2
R73 10K_0402_5%
S4_LATCH35
10K_0402_5%
R70
RTCVREF
12
+3VALW
R62 10K_0402_5%
S4_DATA35
3 3
10K_0402_5%
1 2
1 2
R68
@1U_0805_16V7K
C41
2 1
RB751V_SOD323
D12 1N4148_SOT23
12
R28
1
1
2
3
2
2
C45
1 2
1U_0805_16V7K
C34 0.1U_0402_16V4Z
1 2
5
U3
P
4
A
Y
G
NC7SZ14M5X_SOT23-5
3
SYSON35,40,45
U5
1
CD1#
VCC
2
D1
CD2#
3
CP1
D2
4
SD1#
CP2
5
Q1
SD2#
6
Q1#
Q2
7
GND
Q2#
74LCX74MTC_TSSOP14
1 2
R37 10K_0402_5%
RTCVREF
14 13 12 11 10 09 08
1
2
13
D
2
G
S
0.1U_0402_10V6K C46
Q7 2N7002_SOT23
13
D
Q8
2
G
2N7002_SOT23
S
13
D
Q11
2
G
2N7002_SOT23
S
ON/OFF# 37
D13
D_SET_S4
4 4
Compal Electronics, Ltd.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
BATT-Mode-Hibernation
Size Docu ment Number Re v
Custom
LA-2051
Date: Sheet
星期三 八月
27, 2003
39 51,
E
of
0.1A
A
+2.5VALW To +2.5V Transfer
+2.5VALW +2.5V
U9
8 7 6 5
1
C70
10U_0805_10V4Z
1 1
2
+12VALW
1
S
D
2
S
D
3
S
D
4
G
D
SI4800DY_SO8
R110
1 2
100K_0603_1%
0.1U_0402_16V7K
1
2
C88
C85
0.1U_0402_16V4Z
13
D
S
2N7002_SOT23
1
1
2
2
G
Q18
SYSON#
C86 10U_0805_10V4Z
2
B
10U_0805_10V4Z
C
+2.5VALW +2.5VS
C66
U8
8
S
D
7
S
D
6
S
D
5
G
D
SI4800DY_SO8
1
2
+12VALW
0.1U_0402_16V7K
R407
1 2
100K_0603_1%
+2.5VALW To +2.5VS Transfer
1 2 3 4
1
2
0.1U_0402_16V4Z
C79
D
S
C83
13
2
G
Q41
2N7002_SOT23
1
2
SUSP
1
C76 10U_0805_10V4Z
2
D
E
+2.5V & +2.5VS Discharge
+2.5V +2.5VS
2
G
12
R406 @470_0402_5%
13
D
Q40 @2N7002_SOT23
S
12
R126 @470_0402_5%
13
2
G
D
Q17 @2N7002_SOT23
S
SYSON# SUSP
+3VALW To +3V Transfer
U13
S
D
S
D
S
D
G
D
SI4800DY_SO8
0.1U_0402_16V7K
1 2 3 4
R117
1 2
95.3K_0603_1%
0.1U_0402_16V4Z
1
C94
2
C121
1
2
13
D
Q16
S
2N7002_SOT23
1
C127 10U_0805_10V4Z
2
SYSON#
2
G
10U_0805_10V4Z
8 7 6 5
1
C123
10U_0805_10V4Z
2 2
2
+12VALW
+3VALW+3VALW +3V
C214
U22
8
S
D
7
S
D
6
S
D
5
G
D
SI4800DY_SO8
1
2
+12VALW
0.1U_0402_16V7K
R203
1 2
95.3K_0603_1%
+5VALW To +5V Transfer
C321
+5VALW
1
2
+12VALW
U32
8
D
7
D
6
D
5
D
SI4800DY_SO8
R343
1 2
27K_0603_1%
0.1U_0402_16V7K
13
D
S
+5V+5VALW
1
2
2
G
Q29 2N7002_SOT23
C342 10U_0805_10V4Z
10U_0805_10V4Z
U33
S
D
S
D
S
D
G
D
SI4800DY_SO8
1 2
47K_0603_1%
0.1U_0402_16V7K
R320
1 2 3 4
1
2
C323
1
C336
0.1U_0402_16V4Z
2
8 7 6 5
1
C341
10U_0805_10V4Z
3 3
2
+12VALW
+3VALW To +3VS Transfer +3V & +3VS Discharge
+3V +3VS
SUSP
+3VS
1
C218 10U_0805_10V4Z
2
SYSON#
2
G
1 2 3 4
1
2
0.1U_0402_16V4Z
C188
13
D
S
2N7002_SOT23
C210
G
Q23
1
2
2
+5VALW To +5VS Transfer
1
C337
2
+5VS
1
C340
0.1U_0402_16V4Z
2
13
D
S
1
2
2
G
Q32 2N7002_SOT23
C338 10U_0805_10V4Z
SUSPSYSON#
1
C339 10U_0805_10V4Z
2
+5VALW
12
R335
4.7K_0402_5%
SUSP
13
SUSP#20,32,35,36
SUSP#
D
2
G
Q31 2N7002_SOT23
S
SYSON# SUSP
2
1
S
2
S
3
S
4
G
12
R412 @470_0402_5%
13
D
S
SUSP
Q42 @2N7002_SOT23
2
G
+5V & +5VS Discharge
12
R327 @470_0402_5%
13
D
G
Q30 @2N7002_SOT23
S
12
R222 @470_0402_5%
13
D
Q24
@2N7002_SOT23
S
+5VS+5V
12
13
D
2
G
S
R332 @470_0402_5%
Q52 @2N7002_SOT23
+1.8VSP ENABLE
+3VALW
12
R390 150K_0402_5%
13
4 4
2N7002_SOT23
D
2
G
Q14
1
A
C706 @0.1U_0402_16V4Z
2
S
+3VALW
14
U19E
P
11
O10I
G
SN74LVC14APWLE_TSSOP14
7
1.8VS_EN# 46
B
SYSON35,39,45
+5VALW
12
R314 10K_0402_5%
SYSON#
13
D
2
G
Q27 2N7002_SOT23
S
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
+1.5V To +1.5VS Transfer
+1.5VS+1.5V
U36
S
D
S
D
S
D
G
D
SI4800DY_SO8
+12VALW
1 2 3 4
R20
1 2
56K_0603_1%
0.1U_0402_16V7K
8 7 6 5
1
C362 10U_0805_10V4Z
2
10U_0805_10V4Z
1
C372
0.1U_0402_16V4Z
2
13
1
C363
2
D
D
S
2N7002_SOT23
1
C374
2
SUSPSUSP
2
G
Q6
Title
Size Docu ment Number Re v
Custom
Date: Sheet
+1.5V & +1.5VS Discharge
+1.5V +1.5VS
2
G
12
R29 @470_0402_5%
13
D
S
12
R361 @470_0402_5%
13
2
G
D
Q35 @2N7002_SOT23
S
SYSON# SUSP
Compal Electronics, Ltd.
DC/DC Interface
LA-2051
星期三 八月
27, 2003
40 51,
E
Q9 @2N7002_SOT23
of
0.1A
A
PCN1
1
6
G
5
G
4
G
2
3
G
1 1
SINGA_2DC-S113L200
SINGA_2DC-S133L200
SINGA_2DC-S726B201
BATT+
2 2
CHGRTCP N3N1
1 2
51ON#37
PF2 12A_65VDC_451012
1
2
PZD2
12
RB751V_SOD323
PR151
200_0402_1%
1 2
PR141 22K_0402_5%
21
12
EC10QS04_SOD106
120W
90W
12
PR139 100K_0402_1%
PD28
12
PC118
0.22U_1206_25V7K
12
PC112
1000P_0402_50V7K
S
1 2
C8B BPH 853025_2P
12
PC113 100P_0402_50V8J
PQ46 TP0610T_SOT23
D
13
G
2
PL14
VIN
12
PC114 1000P_0402_50V7K
PD29 1N4148_SOD80
1 2 12
PR137 33_1206_5%
12
PC119
0.1U_0603_50V4Z
B
VIN
VIN
VIN
VL
12
PR130
84.5K_0402_1%
12
PR133
20K_0402_1%
PD31
1N4148_SOD80
1 2
PR132 22K_0402_5%
12
1 2
PR14210K_0402_1%
VS
12
PC115
100P_0402_50V8J
12
PC116
1000P_0402_50V7K
12
PC117
0.1U_0402_16V4Z
C
1 2
PR13510K_0402_1%
1 2
PR1361K_1206_5%
1 2
PR1381K_1206_5%
1 2
PR140 1K_1206_5%
6.0V
PR1281M_0402_1%
VS
8
PU14A
3
P
+
1
O
2
-
G
LM393M_SO8
4
12
RTCVREF
3.3V
PR1431M_0402_1%
12
VS
12
PR129
5.6K_0402_5%
12
PD1
RLZ4.3B_LL34
1 2
PR1311K_0402_5%
PACIN
12
PR134 10K_0402_1%
D
ACIN 27,35,37
PACIN 43,44
Vin Detector
High 18.764 17.901 17.063 Low 17.745 16.903 16.038
B+
12
PR144 499K_0402_1%
12
RTCVREF
3 3
+CHGRTC
+2.5VALWP +2.5VALW
+1.5VP
4 4
+12VALWP
+5VALWP
+3VALWP
PR152
1 2
200_0402_1%
1 2
2 1
2 1
1 2
1 2
PR149
1 2
200_0402_1%
PJP2
PAD-OPEN 3x3m
PJP6
PAD-OPEN 3x3m
PJP7
PAD-OPEN 2x2m PJP9
PAD-OPEN 3x3m PJP10
PAD-OPEN 3x3m
+1.5V
+12VALW
+5VALW
+3VALW
A
PU15 S-81233SGUP-T1_SOT89
3.3V
12
PC124 10U_1206_16V4Z
3
3
2
1
1
1U_0805_25V4Z
(12A,480mils ,Via NO.= 24)
(6A,240mils ,Via NO.= 12)
(300mA,20mils ,Via NO.= 1)
(6A,240mils ,Via NO.= 12)
(6A,240mils ,Via NO.= 12)
2
PC123
PR145 200_0402_1%
12
PD4 RLZ16B_LL34
2 1
PJP3
+1.25VSP
1 2
PAD-OPEN 2x2m
(2A,80mils ,Via NO.= 4)
PJP4
+1.8VSP
1 2
PAD-OPEN 2x2m
(3A,120mils ,Via NO.= 6)
+1.2VP
2 1
PAD-OPEN 2x2m
(30mA,40mils ,Via NO.= 2)
B
PJP5
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAINPWON6,42,44
ACON43
+1.25VS
+1.8VS
+1.2V
PD32
2 3
1
RB715F_SOT323
12
PC121 1000P_0402_50V7K
Precharge detector
15.34 15.90 16.48
13.13 13.71 14.20
C
8
PU14B
5
P
+
7
O
6
-
G
LM393M_SO8
4
12
PC122
0.1U_0402_16V4Z
12
PR147 10K_0402_1%
1 2
RTCVREF
3.3V
2N7002_SOT23
Title
Size Do cum e nt Number R e v
B
Dat e : Sheet
13
D
PQ47
S
PQ48
DTC115EKA_SC59
Compal Electronics, Ltd.
DCIN/DECTOR
期三 八月
PR148 215K_0402_1%
2
G
13
12
PR146 499K_0402_1%
12
PR150 47K_0402_1%
2
D
12
PC120 1000P_0402_50V7K
PACIN
+5VALWP
41 51¬P , 27, 2003
of
A
B
C
D
PH1 under CPU botten side :
CPU thermal protection at 84 degree C Recovery at 44(45) degree C
1 1
PCN2
BATT+ BATT+
ID B/I TS
SMD
10 11
SMC
GND
GND­GND-
GND
SUYIN_200275MR009G116ZL
1 2
BLI/NIMH#
3
BB/I
4
TS
5
EC_SMDA
6
EC_SMCA
7 8 9
100_0402_5%
PR113
12
PR114
100_0402_5%
12
PR1101K_0402_5%
12
PR116 1K_0402_5%
12
1 2
PR11147K_0402_1%
1
PF1
21
12A_65VDC_451012
3
PD22
BAS40-04_SOT23@
2
1 2
PR11925.5K_0402_1%
2 2
12
PR121 1K_0402_5%
1
3
PD24
2
BAS40-04_SOT23@
+3VALWP
+3VALWP
VMB
C8B BPH 853025_2P
12
PC106 1000P_0402_50V7K
PL13
1 2
ALI/MH# 35
12
PC107
0.01U_0603_50V7K
BATT+
PC108
0.22U_0805_16V7K
VL VS
10K_TSM1A-103(F4D3R)_0603_1%
12
12
12
3.32K_0402_1%
12
PH1
1 2
PR11516.9K_0402_1%
PR117
PC109
1000P_0402_50V7K
PC105
0.1U_0603_50V4Z
TM_REF1
12
12
1 2
8
3
+
2
-
4
PR118100K_0402_1%
PR120 100K_0402_1%
PR112 47K_0402_1% PU13A
P
1
O
G
LM393M_SO8
12
VL
VL
PR109 47K_0402_1%
1 2
1SS355_SOD323
PD23
13
2
MAINPWON 6,41,44
PQ45 DTC115EKA_SC59
12
BATT_TEMPA 35 EC_SMD1 35,36,38 EC_SMC1 35,36,38
PD25
BAS40-04_SOT23@
3 3
+5VALWP
4 4
A
1
3
2
1
PD26 BAS40-04_SOT23@
3
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PH2 near main Battery CONN :
BAT. thermal protection at 78 degree C Recovery at 39(40) degree C
VL
12
PH2
PC110
0.22U_0805_16V7K
3.92K_0402_0.5%
12
10K_TSM1A-103(F4D3R)_0603_1%
1 2
PR124
12
PR126
1000P_0402_50V7K
C
16.9K_0402_1%
TM_REF2
12
PC111
1 2
PR12347K_0402_1%
5 6
12
PR127 100K_0402_1%
8
PU13B
P
+
7
O
-
G
LM393M_SO8
4
12
PR125100K_0402_1%
VL
PR122 47K_0402_1%
1 2
PD27
12
1SS355_SOD323
VL
Compal Electronics, Ltd.
Title
BATTERY CONN / OTP
Size Do cum e nt Number R e v
B
Dat e : Sheet
期三 八月
D
of
42 51¬P , 27, 2003
A
B
C
D
PQ39
PC87
1 2
1 2
120W
P2
PQ37
S
D
S
D
S
D
G
D
SI4825DY_SO8
PD19
PR87
1 2 3 4
2
G
12
PR81 200K_0402_1%
12
PR84 150K_0402_1%
13
D
S
12
PR80 10K_0402_1%
8 7 6 5
ACOFF#
1 2
1SS355_SOD323
PACIN
1 2
3K_0402_5%
ACON
VIN
1 1
PACIN41,44
ACON41
2 2
1 2 3 4
PQ42 2N7002_SOT23
0.1U_0402_16V4Z
SI4825DY_SO8
S
D
S
D
S
D
G
D
PQ38
PC89
12
8 7 6 5
ADP_I35,46
12
PR89 10K_0402_1%
12
IREF=1.31*Icharge
2
1 2
PR93 226K_0402_1%
CS
13
PQ43 DTC115EKA_SC59
PR97
100K_0402_1%
+3VALWP
12
PR99 47K_0402_1%
IREF35
P3 B+
12
PR88
29.4K_0402_1%
PC92
0.1U_0402_16V4Z
12
12
PC96
0.1U_0402_16V4Z
Iadp=0~4.2A
PR79
0.015_2512_1%
12
PR86 10K_0402_1%
PC90
1 2
4700P_0402_25V7K_A34
PC93
1 2
1000P_0402_50V7K
PR90
1 2
PR91 1K_0402_5%
1 2
PR95
10K_0402_1%
12
12
1
2
3
4
5
4.7K_0402_1%
6
7
8
9
10
11
12
PU11
-INC2
+INC2
OUTC2
GND
+INE2
CS
-INE2
VCC(o)
FB2
OUT
VREF
VH
FB1
VCC
-INE1
RT
+INE1
-INE3
OUTC1
FB3
OUTD
CTL
-INC1
+INC1
MB3887_SSOP24
PL11
1 2
C8B BPH 853025_2P
24
23
CS
22
21
20
PC91
1 2
19
0.1U_0603_50V4Z
18
PR92
1 2
17
68K_0402_5%
16
PR96
15
1 2
47K_0402_1%
ACON
14
13
12
PC84
4.7U_1206_25V6K
12
PR85 0_0402_5%
0.022U_0603_25V7K
PC88 0.1U_0603_50V4Z
PC94
1 2
0.1U_0603_50V4Z
PC95
1 2
1500P_0402_50V7K
90W
12
PC85
4.7U_1206_25V6K
SI7447DP_SO8 SI4825DY_SO8
12
PC86
4.7U_1206_25V6K
N18
PD21
RB051L-40_SOD106~D
B++
ACOFF#
36
241
PQ40 SI4835DY_SO8
578
LXCHRG
PL12
1 2
22UH_SPC-1205P-220A_2.8A_20%
2 1
1 2
SI7447DP_SO8 PQ39
1 2 3
4
PR82
1 2
10K_0402_1%
13
PQ41 DTC115EKA_SC59
CC=0.5~2.52A CV=16.84V(12 CELLS LI-ION)IREF=0.73~3.3V
PR94
0.02_2512_1%
5
PR83
1 2
47K_0402_1%
2
12
PC97
VIN
ACOFF 35
12
12
PC99
PC98
4.7U_1206_25V6K
BATT+
13
PQ44
0.1U_0402_16V4Z @
A
DTC115EKA_SC59
12
PC103
12
PR107
2.2K_0402_5%
VMB
VS
12
PC100
0.1U_0603_50V4Z
8
PU12A
3
P
+
1
0
2
-
G
4
LM358A_SO8
12
PR102 340K_0402_1%
12
PR103 499K_0402_1%
12
PR153 105K_0402_1%
B
FSTCHG35
3 3
2
OVP voltage : LI
4S3P : 18V--> BATT_OVP= 2.0V 3S4P/3S3P : 13.5V--> BATT_OVP= 1.5V
(BAT_OVP=0.1111 *VMB)
BATT_OVP35
4 4
PR100
1 2
95.3K_0603_1% PR2
1 2
95.3K_0603_1%
12
PC104
0.01U_0603_50V7K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4.2V
12
PR101143K_0603_1%
120W 90W
PR79 0.01_2512_1% 0.015_2512_1%
PR86
PR88
PR90
100K_0402_1% 10K_0402_1%
33.2K_0402_1% 29.4K_0402_1%
10K_0402_5% 4.7K_040 2_5%
C
Compal Electronics, Ltd.
Title
CHARGER
Size Do cum e nt Number R e v
B
LA-2051
Dat e : Sheet
期三 八月
4.7U_1206_25V6K
D
4.7U_1206_25V6K
of
43 51¬P , 27, 2003
A
B
C
D
1 1
PC63
8 7 6 5
1 2
0.1U_0603_50V4Z
PDH31
PDL3
B+++
PL9
1 2
B+
HCB4532K-800T90_1812
4.7U_1206_25V6K
2 2
PC64
12
4.7U_1206_25V6K
12
PC65
PQ35
1
G1
D1
2
D1
S1/D2
3
G2
S1/D2
4
S1/D2
S2
SI4814DY_SO8
12
12
PC72
PL10
47P_0402_50V8J
PR65
1 2
0_0402_5%
PLX3
BST31
PDH3
PD16
1SS355_SOD323
12
PC70
0.1U_0603_50V4Z
2
VS
VL
3
PD15 DAP202U_SOT323
1
1 2
12
PC69
4.7U_1206_16V6K
10UH_SPC-1205P-100_4.5A_20%
21
22
PU10
25
BST3 DH3 LX3
DL3
CSH3 CSL3 FB3 SKIP# SHDN#
TIME/ON5 RUN/ON3
PR78
V+
12
GND
8
VL
MAINPWON 6,41,42
27 26
24
1 2
3 10 23
7 28
12
PC125 680P_0402_50V7K
47K_0402_1%
12
PC83
0.047U_0603_50V7K
+3VALWP
PR68
0.012_2512_1%
12
PR67 1M_0402_1%
1 2
CSH3
1
+
PC74
150U_D2_6.3VM
3 3
1
+
PC75
2
2
PD17 EP10QY03
2 1
PR72
3.57K_0402_1%
1 2
150U_D2_6.3VM@
PR74 10K_0402_1%
PACIN41,43
12
PC76
100P_0603_50V8J
1 2
+3.3V Ipeak = 6.66A ~ 10A
1 2
PR71 10K_0402_1%
VS
12
PR75 47K_0402_1%
12
PC82
0.047U_0603_50V7K
4
12OUT
VL
5
VDD
18
BST5
16
DH5
17
LX5
19
DL5
20
PGND
14
CSH5
13
CSL5
12
FB5
15
SEQ
9
REF
6
SYNC
11
RST#
MAX1632_SSOP28
BST51
+12VALWP
12
POK 45
PC71
4.7U_1206_16V6K
12
PC66
1 2
0.1U_0603_50V4Z
2.5VREF
PC77
4.7U_1206_16V6K
PDH5
PLX5
PC67
4.7U_1206_25V6K
PR73
10.5K_0402_1%
12
N4
B+++
12
1 2
PR66 0_0402_5%
PDL5
12
12
12
PR77
10K_0402_1%
PC68
4.7U_1206_25V6K
PDH51
PC81 100P_0603_50V8J
PC62 470P_0805_100V7K
1 2
PR64
FLYBACKSNB
12
22_1206_5%
PQ36
G1
D1 D1
S1/D2
G2
S1/D2 S1/D2
S2
SI4814DY_SO8
PC79
8 7 6 5
1
+
12
PC73 47P_0402_50V8J
12
PR69 2M_0402_5%
1 2 3 4
2
150U_D2_6.3VM@
+5V Ipeak = 6.66A ~ 10A
PC61
1 2
12
4.7U_1210_25V6K
PD14 EC11FS2_SOD106
PT1
1 4
3 2
10uH_SDT-1205P-100-118_5A_20%
CSH5
12
PR70
0.012_2512_1%
1
+
PC80
150U_D2_6.3VM
2
2 1
PD18 EP10QY03
+5VALWP
4 4
Compal Electronics, Ltd.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
5V/3V/12V
Size Do cum e nt Number R e v
B
LA-2051
Dat e : Sheet
期三 八月
D
of
44 51¬P , 27, 2003
A
B
C
D
1 1
12
PC126
4.7U_1206_25V6K
1
PD33 DAP202U_SOT323
2
3
PQ50
G1
D1 D1
S1/D2
G2
S1/D2 S1/D2
S2
SI4814DY_SO8
SYSON35,39,40
8 7 6 5
12
0_0402_5%
PR157
1 2
0_0402_5%
PC134
0.1U_0603_25V7K
1 2
PR161
1 2
2 2
+1.5V
+1.5VP
PD36
EP10QY03
2 1
2200P_0402_50V7K
3 3
4700P_0402_25V7K_A34
1
+
PC140
220U_D_2.5VM
2
PC142
12
12
PC139
1 2
12
PL17
5UH_SPC-06704-5R0_2.9A_30%
PR158
5.1K_0402_1%
PR160 10K_0402_1%
12
3 4
PC131
1U_0805_25V4Z
1U_0603_10V4Z
PU17
25 26 27
24 28
1 2
11
MAX1845EEI_QSOP28
1 2
12
PC132
4
BST1
V+
DH1 LX1
DL1 CS1
OUT1 FB1
ON1
GND
OVP
8
23
0.22U_0805_16V7K
PR154 0_0402_5%
12
22
SKIP
6
PC144
VCC
PR155
20_0402_5%
9
VDD
UVP
BST2
DH2
LX2 DL2
CS2
OUT2
FB2
ON2
PGOOD
TON
ILIM2 ILIM1
REF
10
12
+5VALWP
12
21 19
18 17 20 16
15 14 12
7 5
13 3
PR164
12
5.62K_0402_1%
PR165
12
14K_0402_1%
12
4.7U_1206_16V6K
PR156
1 2
0_0402_5%
12
PR166
100K_0402_1%
PC127
0.1U_0603_50V4Z
PC133
12
12
PR167 100K_0402_1%
PR162 0_0402_5%
12
5
4
5
4
POK
D8D7D6D
S1S2S3G
SI4800DY-T1_SO8
D8D7D6D
S1S2S3G
PQ51 SI4810DY_SO8
+2.5VALWP/+1.5VP
1 2
HCB4532K-800T90_1812
12
PC128
PQ49
4.7U_1206_25V6K
PL16
2.2UH_SPC-1205P-2R2B_13A_30%
1 2
12
PD34
EC31QS04
@
POK 44
PR163
10K_0402_1%
12
PC129
4.7U_1206_25V6K
PC135
1
220U_D2_4VM
+
2
PR159 15K_0402_1%
1 2
12
2.5V OCP > 13A
PL15
12
PC130
4.7U_1206_25V6K
1
+
2
PC136 220U_D2_4VM
220U_D2_4VM@
12
PC141 4700P_0402_25V7K_A34
12
PC143 2200P_0402_50V7K
B+
+2.5VALWP
+2.5VALWP
1
2
+
PC137
1
2
@
220U_D2_4VM
+
PC138
2 1
PD35 EP10QY03
4 4
Compal Electronics, Ltd.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
+2.5VALWP/1.5VP
Size Do cum e nt Number R e v
Custom
LA-2051
Dat e : Sheet
期三 八月
D
of
45 51¬P , 27, 2003
5
4
3
2
1
+3VALWP
PR169 0_1206_5%
1 2
PQ52
1
D1
2
D1
S1/D2
3
G2
S1/D2
4
S1/D2
S2
SI4814DY_SO8
12
PC145
4.7U_1206_25V6K
8
G1
7 6 5
D D
5
PU8
IN
1
HSD
2
12
COMP
4
GND
MAX1954EUB_10UMAX
PC190
12
33P_0603_50V8J
12
PC149
13
D
1.8VS_EN#40
C C
2
G
S
PQ53 2N7002_SOT23
470P_0402_50V7K
PR171 332K_0402_1%
BST
DH
LX
DL
PGND
FB
10
8
9
6
7
3
21
PD9
EP10QY03
0.1U_0603_25V7K
12
PC189
120W 90W
64.9K_0402_1% 84.5K_0402_1%
PR227
249K_0402_1%
PR229
PR4 11.5K_0402_1%@
ADP_I35,43
B B
1 2
200K_0402_1%
PR227 64.9K_0402_1%@
12
VL
PC101
0.01U_0603_50V7K
@
1 2
12
PC146
4.7U_1206_25V6K
PL18
2.2UH_PLFC1235P-2R2A_6A_30%
1 2
11.5K_0402_1%
9.09K_0402_1%
PR229
1 2
@
249K_0402_1%
PR228
PR170
PR172
12
12
12
12
3 2
PC3
1000P_0402_50V7K@
1
PC148
+
2
220U_D2_4VM
1 2
VS
8
PU6A
P
+
-
G
4
PR226
1M_0402_1%@
O
LM393M_SO8@
1
+1.8VSP
1
+
2
12
PC2
0.1U_0603_50V4Z@
PC147
220U_D2_4VM@
VL
12
PR223 47K_0402_1%@
13
D
2
G
12
PC1 10P_0402_50V8K@
S
H_PROCHOT# 5,26
PQ1
2N7002_SOT23@
+2.5V
+2.5VS
PC10
4.7U_1206_16V6K@
(1.25V)
A A
+SDREF
12
4.7U_1206_16V6K
PR3
1 2
0_0402_5%
5
PC9
12
12
PC8
0.1U_0402_16V4Z
STANDBY#
4
VD RefOut8VttSense
1
VSS
NE57814_HSO8
PU7
7
5
VDD
6
ExtRefIn
2 3
VTT
PC7
150U_D2_6.3VM
4
12
PC191
0.1U_0402_16V7K
+1.25VSP
1
+
2
12
PC5
0.1U_0402_16V7K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+2.5V
12
PC4
1U_0603_10V4Z
3
100K_0402_1% @
8
PU6B
5
P
+
7
O
6
-
G
4
LM393M_SO8@
Compal Electronics, Ltd.
Title
+1.25VSP/+1.8VSP
Size Do cum e nt Number R e v
Custom
LA-2051
2
Dat e : Sheet
期三 八月
46 51¬P , 27, 2003
1
of
A
Different Pin Definition for ISL6561 in PU9
B
C
D
#7 GND
#9 TCOMP
PM_DPRSLPVR26
PM_STPCPU#5,10,16,26
PR207
0_0402_5%
#10 DAC
VID_PWRGD38
12
12
VR_ON35
1 1
2 2
3 3
+3VALWP
4 4
#11
#14
#18 RGND
1 2
PR183 0_0402_5%
PR184 0_0402_5%
100P_0603_50V8J
PC159
4.7U_1206_16V6K
PR2110_0402_5%
PC154
12
REF
IDROOP
12
1 2
#33
#35 GND
#37 GND
12
PU5
1
IN
4
PG
3
EN
MIC5258_SOT23-5
PR212 100K_0402_1%
EN #38 OVP
#40 GND
ENLL38
12
PR186 475_0402_1%
12
PR190
27.4K_0402_1%
5
OUT
2
GND
CPU_VID45 CPU_VID35 CPU_VID25 CPU_VID15 CPU_VID05
CPU_VID55
7
0
LM358A_SO8
PR194 10K_0402_1%
1 2
PR198
45.3K_0402_1%
1 2
12
PC150 1U_0603_10V4Z
PC151
0.047U_0603_25V7M
PU12B
5
+
6
-
PR193
100K_0402_1%
Frequency Select
12
+1.2VP
12
PC160
4.7U_1206_16V6K
1. When mode control signal is high/ low, the VR will operate to Northwood/ Prescott load line.
2. VID5(12.5) should be pulled high, when the VR operates to Nothwood load line.
+5VALWP
12
PR177 0_0402_5%
PU2
32
VCC
1
VID4
2
VID3
3
VID2
4
VID1
5
VID0
6
VID12.5
34
ENLL
33
DRSEN
35
DSEN#
10
OCSET
12
11
SOFT
9
DSV
36
FS
37
DRSV
38
VR-TT#
40
NTC
12
GND
19
GND
ISL6247_MLFP40
RAMPS
PGOOD
PWM1
ISEN1+
ISEN1-
PWM2
ISEN2+
ISEN2-
PWM3
ISEN3+
ISEN3-
PWM4
ISEN4+
ISEN4-
COMP
VDIFF
VSEN VRTN
OFS
7 39
25 24
23
26 27
28
20 21
22
31 30
29
15
13
FB
14
NC
16 17 18
8
Battery Feed
B+
Forward
PR178
80.6K_0402_1%
1 2
12
10K_0402_1%
PR180
0_0402_5%@
PR5
1 2
PR202
12
340K_0402_1%
12
PC157 0.1U_0402_16V4Z
+5VALWP
PC1521000P_0402_50V7K
12
PC153
12
22P_0402_25V8K
Place close to IC
+5VALWP
12
PC158
1U_0603_10V4Z
PR189
1 2
20K_0402_1%
PC155 1000P_0402_50V7K@
PR204
0_0402_5%
PR205 0_0402_5%@ PR206
12
0_0402_5%
PR208
0_0402_5%@
VGATE 17
PWM1 48 ISEN1+ 48 ISEN1- 48 PWM2 48 ISEN2+ 48 ISEN2- 48 PWM3 49 ISEN3+ 49 ISEN3- 49
PWM4 49 ISEN4+ 49
ISEN4- 49
PR192 0_0402_5%@
12
PR1952.26K_0402_1%
1 2
12
12
Place near +VCC_CORE output capacitor
12
12
+CPU_CORE
VCCSENSE 5
VSSSENSE 5
Remote Sensing
BOOTSELECT=1
BOOTSELECT=0
A
PRESCOTT
NORTHWOOD
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Compal Electronics, Ltd.
Title
CPU_CORE_Controller
Size Do cum e nt Number R e v
B
LA-2051
Dat e : Sheet
期三 八月
D
of
47 51¬P , 27, 2003
A
B
C
D
CPU_B+
1 2
PL1 C8B BPH 853025_2P
220U_25V_M@
BOOT UGATE PHASE
LGATE
PC161
2 1 8 5
12
EP10QY03 @
PD11
0.22U_0805_16V7K
21
PR213
1 2
1_0402_5%
PQ61
SI4362DY_SO8
5
3
241
PQ59
SI4392DP_SO8
5
D8D7D6D
S1S3G
S
4
2
PQ62 SI4362DY_SO8
PC162
4.7U_1206_25V6K
1 2
12
PC165
4.7U_1206_25V6K
5
D8D7D6D
S1S3G
S
4
2
12
PC163
4.7U_1206_25V6K
1 2
0.56UH_ETQP4LR56WFC_21A_20%
PR21732.4K_0402_1%
1
+
PC164
220U_25V_M
2
1
PC6
+
2
PL2
12
PC168
12
0.01U_0603_50V7K
+5VALWP
PR237
1 2
2.2_0402_5%
1 1
PWM147
12
PR2140_0402_5%
PR215 499K_0402_1%
1 2
PC166
0.1U_0603_25V7K
1 2
6 3 7 4
PC167 1U_0805_16V7K
1 2
PU1
VCC PWM EN GND
ISL6207CB-T_SO8
B+
CPU_DRIVE_EN
ISEN1-47 ISEN1+47
BOOT UGATE PHASE
LGATE
PC170
1 2
2 1 8 5
0.22U_0805_16V7K
EP10QY03@
PD12
PR218
1 2
SI4362DY_SO8
21
1_0402_5%
PQ65
5
PQ63
3
241
SI4392DP_SO8
5
S
4
2
5
PQ66
D8D7D6D
4
S1S3G
S
2
SI4362DY_SO8
D8D7D6D
S1S3G
PR238
1 2
2.2_0402_5%
2 2
PU3
6
VCC
1 2
3
PWM
7
EN
4
GND
ISL6207CB-T_SO8
PWM247
PR220 499K_0402_1%
PC174
1U_0805_16V7K
1 2
CPU_B+
12
PC171
4.7U_1206_25V6K
12
PC172
4.7U_1206_25V6K
12
PC173
4.7U_1206_25V6K
PL3
1 2
0.56UH_ETQP4LR56WFC_21A_20%
12
PR221 32.4K_0402_1%
Local Transistor Swtich Decoupling
12
PH4 820_0402_5%
PC175
12
0.01U_0603_50V7K
12
PD6 EC31QS04
+CPU_CORE
ISEN2-47
3 3
4 4
ISEN2+47
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
12
PH5 820_0402_5%
Compal Electronics, Ltd.
Title
CPU_CORE_Power stage
Size Do cum e nt Number R e v
Custom
LA-2051
Dat e : Sheet
期三 八月
D
48 51¬P , 27, 2003
0.1
of
5
4
3
2
1
PR236
1 2
1 2
2.2_0402_5%
PU4
6
VCC
3
PWM
UGATE
7
EN
PHASE
4
LGATE
GND
ISL6207CB-T_SO8
BOOT
+5VALWP
D D
PWM347
PR224 499K_0402_1%
1 2
ISEN3-47 ISEN3+47
C C
CPU_DRIVE_EN
PC182
1U_0805_16V7K
1 2
PU9
6
BOOT
VCC
12
PC187 1U_0805_16V7K
3
PWM
UGATE
7
EN
PHASE
4
LGATE
GND
ISL6207CB-T_SO8
PWM447
12
PR234 499K_0402_1%
PC177
1 2
0.22U_0805_16V7K
PD13
2 1 8 5
PR230
PC183 0.22U_0805_16V7K
1 2
2.2_0402_5%
2 1 8 5
EP10QY03@
PR222
1 2
EP10QY03@ PD20
PR231
1 2
1_0402_5%
21
1_0402_5%
SI4362DY_SO8
21
PQ69
5
4
5
4
D8D7D6D
S1S3G
S
2
D8D7D6D
PQ73
SI4362DY_SO8
S1S3G
S
2
SI4392DP_SO8
5
3
241
5
3
PQ67
5
4
SI4392DP_SO8
241
5
4
S
2
PQ71
S
2
PQ70
D8D7D6D
SI4362DY_SO8
S1S3G
D8D7D6D
PQ74 SI4362DY_SO8
S1S3G
12
PC178
4.7U_1206_25V6K
12
PC184
4.7U_1206_25V6K
CPU_B+
12
PC179
4.7U_1206_25V6K
CPU_B+
12
PC185
4.7U_1206_25V6K
12
PC180
4.7U_1206_25V6K
PL4
0.56UH_ETQP4LR56WFC_21A_20%
PR225 32.4K_0402_1%
Local Transistor Swtich Decoupling
12
12
12
PC186
4.7U_1206_25V6K
PL5
1 2
0.56UH_ETQP4LR56WFC_21A_20%
1 2
PR235 32.4K_0402_1%
PC181
12
0.01U_0603_50V7K
12
PH6 820_0402_5%
1 2
PC188 0.01U_0603_50V7K
+CPU_CORE
B B
A A
ISEN4-47 ISEN4+47
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
5
4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
3
2
1 2
PH7 820_0402_5%
Compal Electronics, Ltd.
Title
CPU_CORE_Power stage
Size Do cum e nt Number R e v
Custom
LA-2051
Dat e : Sheet
期三 八月
1
of
49 51¬P , 27, 2003
0.1
REV 0.1
DescriptionDate Page
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THI S SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Compal Electronics, Ltd.
Title
HW PIR
Size Docu ment Number Re v
Custom
LA-2051
星期三 八月
Date: Sheet
27, 2003
of
50 51,
0.1A
5
D D
C C
4
3
2
1
B B
A A
Title
POW E R PIR
Size Do cum e nt Number R e v
LA-2051 0.1A
Custom
of
5
4
3
2
Dat e : Sheet
期三 八月
51 51¬P , 27, 2003
1
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