COMPAL LA-1911-REV Schematics

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1 1

B

C

D

E

SAPPORO 150 (DAL00)

2 2

LA-1911 REV1.0 Schematic

3 3

4 4

A

Desktop Prescott/Northwood uFCPGA-478 CPU

Springdale(865PE)+ICH5+nVIDIA NV34M(64MB VRAM)

2003-08-06

Compal Electronics, Inc.

Title

Cover Page

Size Document Number Rev

B

B

C

D

Date: Sheet of

0.2

1 57Friday, August 08, 2003

E

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[e-mail]

B

C

D

E

DAL00 LA-1911 BLOCK DIAGRAM

4 4

Desktop Northwood
Desktop Prescott

(uFCBGA/uFCPGA-478)

PAGE 4,5,6

Thermal Sensor

ADM1032

PAGE 5,16

Clock Generator

ICS952623

PAGE15

CPU VID

PAGE 5

FANController
RTC Battery

PAGE 40

FSB

CRT&LVDS

Connector

TV-OU T

3 3

4 Pin-Connector

PAGE 22

NVIDIA-NV34M

PAGE 22

AGP

PAGE 16,17,18,19

AGP 8X

AGP Bus

Intel Springdale

MCH 865PE

FCBGA-932

VRAM

2 Channel and 4 sets

PAGE 20,21

800MHz

PAGE 7,8,9,10,11

HUB

Interface

266/333/400MHz
(2.55V)

Memory Bus

SO-DIMM x 2(DDR)

BANK 0,1,2,3

Bluetooth

PAGE 36

PAGE 12,13,14

DC/DC Interface

PAGE 43

BATTERY

Charger

PAGE 47

Power Interface &
TEMP. sensing circuit

266MHz

Mini PCI

PAGE 29

RJ-45

PAGE 26

LAN

RTL8101L

PAGE 26

PCI BUS

33MHz (3.3V)

IEEE1394(BTO )

2 2

TSB43AB21A

PAGE 30

(1.8V)

ICH5

mBGA-460

480MHz

PAGE 23,24,25

Primary

Secondary

USB 2.0 Port *3

IDE HDD

CD-ROM/DVD

PAGE 35

PAGE 33

PAGE 33

LID/Kill Switch
Power Buttom

PAGE 46-54

PAGE 39

1 1

Slot 0

PAGE 28

SD Conn

PAGE 28

A

CARDBAY

T7L65XB

PAGE 27,28

FIR(BTO)

PAGE 35

Super I/O

LPC47N227

REV B

PAGE 34

Parallel

PAGE 36

B

LPC BUS 33MHz (3.3V)

Scan KB

Embedded
Controller

NS PC 87591L

PAGE 37

PAGE 37

BIOS(1M)

& I/O PORT

PAGE 38

C

A C-LINK

AC97 CODEC

ALC 202

MDC

Connector

CIR

Controller

PAGE 31

PAGE 36

PAGE 41

Audio Amplifier

TPA6011A4

RJ-11

PAGE 26

CIR

D

PAGE 32

DIRECT BOARD

PAGE 38

VR/CIR BOARD

PAGE 38

SW BOARD

PAGE 38

Compal Electronics, Inc.

Title

Block Digram

Size Document Number Rev
Custom

Date: Sheet of

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2 57Friday, August 08, 2003

0.2

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Voltage Rails

STATE

Power Plane Description

1 1

2 2

VIN
B+
+CPU_CORE
+CPU_VID
+VTT_GMCH +1.225V (Prescott) / +1.45V (Northwood)
+VGA_CORE ON OFF OFF1.2V/1.5V switched power rail for VGA chip
+1.25VS 1.25V switched power rail
+1.5VS
+2.5V
+2.5VS 2.5V switched power rail
+3VALW
+3V
+3VS
+5VALW ON
+5V
+5VS
+12VALW
+RT CVCC

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU

1.2V switched power rail for CPU AGTL Bus

AGP 4X/8X

2.5V power rail

3.3V always on power rail

3.3V power rail

3.3V switched power rail
5V always on power rail
5V power rail
5V switched power rail
12V always on power rail
RTC power

S1 S3 S5

N/A N/A N/A

N/AN/AN/A
ON OFF
ON OFF
ON OFF OFF

ON OFF OFF
ON OFF OFF

ON
ON
ON
ON

ON
ON
ON
ON

OFF

OFF

OFFON

ON

OFF

OFF
ON ON*

OFF

ON
OFF

OFF

ON

ON*

OFF

ON
OFF

OFF

ON

ON*

ON

ON

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

Board ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0
1
2
3
4
5
6
7 NC

SIGNAL

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

HIGH HIGH HIGH HIGH

LOW

LOW

LOW LOW LOW LOW

100K +/- 5%Ra

Rb V min

0

8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%

LOW

AD_BID

0 V

HIGH

LOWLOWLOW

HIGHHIGHHIGH

HIGH

HIGH

AD_BID

V typ

ON

ON

ON

ON

ON

0 V 0 V

ON

ON

ON

OFF

OFF

AD_BID

V

ON ON

ON

OFF

OFF

OFF

max

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

0.503 V

0.819 V

0.538 V

0.875 V

1.185 V 1.264 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

2.200 V

3.300 V

2.341 V

3.300 V

LOW

OFF

OFF

OFF

External PCI Devices

Device IDSEL# REQ#/GNT# Interrupts

VGA

CardBus

LAN

Mini-PCI

1394

3 3

SD

EC SM Bus1 address

Device

Smart Battery
EEPROM(24C16/02)

(24C04)

AD16
AD20

AD17

AD18
AD16 0
AD22

2

3 PIRQF

1/4

PIRQA
PIRQA/PIRQB/PIRQC/PIRQD

PIRQG/PIRQH
PIRQE
PIRQA/PIRQB/PIRQC/PIRQD

EC SM Bus2 address

Address Address

1010 000X b
1011 000Xb

Device

ADM1032

1001 110X b0001 011X b

Board ID

0
1
2
3
4
5
6
7

PCB Revision

0.1

ICH5 SM Bus address

Device

4 4

Clock Generator
( ICS 952623)

DDR DIMM0

DDR DIMM2

A

Address

1101 001Xb

1010 000Xb
1010 010Xb

Compal Electronics, Inc.

Title

Size Document Number Rev

B

B

C

D

Date: Sheet of

LA-1911

Notes

3 57Friday, August 08, 2003

E

0.2

5

[e-mail]

4

+CPU_CORE

3

2

1

D D

H_A#[3..31]7

C C

H_REQ#[0..4]7

H_ADS#7

R25 62_0402_5%

+CPU_CORE
+CPU_CORE

B B

1 2
1 2

R35 200_0402_5%

H_BR0#7
H_BPRI#7
H_BNR#7
H_LOCK#7

CLK_BCLK15

CLK_BCLK#15

H_HIT#7
H_HITM#7

H_DEFER#7

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_IERR#

CLK_BCLK
CLK_BCLK#

AMP_3-1565030-1_Prescott

AC1

AC3

AF22
AF23

A10

A12

A14

A16

A18

A20A8AA10

AA12

AA14

AA16

AA18

AA8

AB11

AB13

AB15

AB17

AB19

AB7

AB9

AC10

AC12

AC14

AC16

AC18

AC8

AD11

AD13

AD15

AD17

AD19

AD7

AD9

AE10

AE12

AE14

AE16

AE18

AE20

AE6

AE8

AF11

AF13

AF15

AF17

AF19

AF2

AF21

AF5

AF7

AF9

B11

B13

B15

B17

B19B7B9

C10

C12

C14

C16

C18

C20C8D11

D13

D15

D17

D19D7D9

VCC_66

VCC_85

F9

VCC_67

VCC_68

VCC_79

VCC_80

E20E8F11

VCC_69

VCC_70

VCC_77

VCC_78

E16

E18

E10

VCC_71

VCC_72

VCC_75

VCC_76

E12

E14

VCC_73

VCC_74

D#0
D#1
D#2
D#3
D#4
D#5
D#6
D#7
D#8

D#9
D#10
D#11
D#12
D#13
D#14
D#15
D#16
D#17
D#18
D#19
D#20
D#21
D#22
D#23
D#24
D#25
D#26
D#27
D#28
D#29
D#30
D#31
D#32
D#33
D#34
D#35
D#36
D#37
D#38
D#39
D#40
D#41
D#42
D#43
D#44
D#45
D#46
D#47
D#48
D#49
D#50
D#51
D#52
D#53
D#54
D#55
D#56
D#57
D#58
D#59
D#60
D#61
D#62
D#63

B21
B22
A23
A25
C21
D22
B24
C23
C24
B25
G22
H21
C26
D23
J21
D25
H22
E24
G23
F23
F24
E25
F26
D26
L21
G26
H24
M21
L22
J24
K23
H25
M23
N22
P21
M24
N23
M26
N26
N25
R21
P24
R25
R24
T26
T25
T22
T23
U26
U24
U23
V25
U21
V22
V24
W26
Y26
W25
Y23
Y24
Y21
AA25
AA22
AA24

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_D#[0..63] 7

JCPU1A

VCC_0

VCC_1

VCC_2

VCC_3

VCC_4

VCC_5

VCC_6

VCC_7

VCC_8

VCC_9

VCC_10

VCC_11

VCC_12

VCC_13

VCC_14

VCC_15

VCC_16

VCC_17

VCC_18

VCC_19

VCC_20

VCC_21

VCC_22

VCC_23

VCC_24

VCC_25

VCC_26

VCC_27

VCC_28

VCC_29

VCC_30

VCC_31

VCC_32

VCC_33

VCC_34

VCC_35

VCC_36

VCC_37

VCC_38

VCC_39

VCC_40

VCC_41

VCC_42

VCC_43

VCC_44

VCC_45

VCC_46

VCC_47

VCC_48

VCC_49

VCC_50

VCC_51

VCC_52

VCC_53

VCC_54

VCC_55

VCC_56

VCC_57

VCC_58

VCC_59

VCC_61

VCC_62

VCC_63

VCC_64

VCC_81

BOOTSELECT

AD1

F13

F15

VCC_82

VCC_83

F17

F19

VCC_65

VCC_84

K2

A#3

K4

A#4

L6

A#5

K1

A#6

L3

A#7

M6

A#8

L2

A#9

M3

A#10

M4

A#11

N1

A#12

M1

A#13

N2

A#14

N4

A#15

N5

A#16

T1

A#17

R2

A#18

P3

A#19

P4

A#20

R3

A#21

T2

A#22

U1

A#23

P6

A#24

U3

A#25

T4

A#26

V2

A#27

R6

A#28

W1

A#29

T5

A#30

U4

A#31

V3

A#32

W2

A#33

Y1

A#34

AB1

A#35

J1

REQ#0

K5

REQ#1

J4

REQ#2

J3

REQ#3

H3

REQ#4

G1

ADS#

AP#0

V5

AP#1

AA3

BINIT#
IERR#

H6

BR0#

D2

BPRI#

G2

BNR#

G4

LOCK#

BCLK0
BCLK1

F3

HIT#

E3

HITM#

E2

DEFER#

VSS_0

VSS_1

VSS_2

VSS_3

VSS_4

VSS_5

VSS_6

VSS_7

VSS_8

VSS_9

VSS_10

VSS_11

VSS_12

VSS_13

VSS_14

VSS_15

VSS_16

VSS_17

VSS_18

VSS_19

VSS_20

VSS_21

VSS_22

H1H4H23

H26

A11

A13

A15

A17

A19

A21

A24

A26A3A9

AA1

AA11

AA13

AA15

AA17

AA19

AA23

AA26

AA4

AA7

Prescott

VSS_23

VSS_24

VSS_25

VSS_26

VSS_27

VSS_28

VSS_29

VSS_30

AA9

AB10

AB12

AB14

AB16

AB18

AB20

AB21

VSS_31

VSS_32

AB24

AB3

VSS_33

VSS_34

AB6

AB8

VSS_35

VSS_36

AC11

AC13

VSS_37

VSS_38

AC15

AC17

VSS_39

VSS_40

AC19

AC2

VSS_41

VSS_42

AC22

AC25

VSS_43

VSS_44

AC5

AC7

VSS_45

VSS_46

AC9

AD10

VSS_47

VSS_48

AD12

AD14

VSS_49

VSS_50

AD16

AD18

VSS_51

VSS_52

AD21

AD23

VSS_53

VSS_54

AD4

AD8

VSS_55

Reference Intel document
Desktop P4 Spec.: 10988 P4 0.13u 512KB L2 EMTS Rev.2.0

Desktop Prescott Spec.: 11910 Prescott EMTS Rev.0.5

Pin number Northwood

Pin name

B6 FERR# FERR#/PBE# Pull-up 62ohm

AA20 ITPCLKOUT0 Pull-up56ohm

AB22 ITPCLKOUT1 Pull-up 56ohm

AD2 NC VIDPWRGD Pull-up 8.2Kohm

AD3 NC float VID5 Pull-up1Kohm to

A A

AF3 NC float VCCVIDLB Connect to +VCCVID
AD20 VCCA VCCIOPLLConnect to CPU

AF23 Connect to CPU

VCCIOPLL VCCA

AD1 VSS BOOTSELECTConnect to GND CPU determine
AE26 VSS Connect to GND OPTIMIZED/

Commend Commend

Pull-up 62ohm
to +VCC_CORE

to +VCC_CORE

to +VCC_CORE
float

Filter

Filter

5

Prescott
Pin name

to +VCC_CORE

TESTHI6 Pull-up 62ohm

TESTHI7 Pull-up 62ohm

to +VCC_CORE

to +VCC_CORE

to +VCCVID

+3VRUN & connect
to PWRIC

Connect to CPU
Filter
Connect to CPU
Filter

COMPAT#

float

Northwood Prescott

Pop Pop

Pop Pop

Pop Pop

PopDepop

Depop

Depop

Pop

Pop

Pop Depop

Pop Depop

4

+CPU_CORE

H_BOOTSELECT52

3

1 2

R12
0_0402_5%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

BOOTSEL

R_C

1 2

R15
0_0402_5%

Pop: Northwood
Depop: Prescott

Compal Electronics, Inc.

Title

Prescott Processor in uFCPGA478 (1/2)

Size Document Number Rev

C

LA-1911

2

Date: Sheet of

1

4 57Friday, August 08, 2003

0.2

5

[e-mail]

4

3

2

1

Asynch GTL+ PULL HIGH

+CPU_CORE

H_FERR#

1 2

R518 62_0402_5%

H_PROCHOT#

1 2

R27 130_0402_5%

H_PWRGOOD

D D

1 2

R74 300_0402_5%

H_RESET#

1 2

R75 62_0402_5%

JTAG PULL DOWN

RP4

1 8
2 7
3 6
4 5

1K_8P4R_1206_5%

C C

B B

ITP_TMS
ITP_TRST#
ITP_TCK
ITP_TDI

Close to the CPU

Note: Please change to 10uH, DC current
of 100mA parts and close to cap

+CPU_CORE

Place near ICH

Place near CPU

+CPU_CORE

L5 LQG21F4R7N00_0805

1 2

**

L6 LQG21F4R7N00_0805

1 2

**

PLL Layout note :

1.Place cap within 600 mils of
the VCCA and VSSA pins.

2.H_VCCIOPLL,HVCCA,HVSSA trace wide
12 mils(min)

H_RS#[0..2]7

H_TRDY#7

H_A20M#23

H_FERR#23
H_IGNNE#23
H_SMI#23
H_PWRGOOD23
H_STPCLK#23

H_INTR23
H_NMI23
H_INIT#23
H_RESET#7

H_DBSY#7

H_DRDY#7
CPU_CLKSEL015
CPU_CLKSEL115

H_THERMTRIP#24

R37 62_0402_5%1 2
R33 62_0402_5%1 2

1 2

R30 62_0402_5%
R36 62_0402_5%1 2
R32 62_0402_5%1 2
R29 62_0402_5%1 2

VCCSENSE52
VSSSENSE52

C80

+

Trace >= 25mils

1 2

33U_D2_8M_R35

Pop: Prescott
Depop: Northwood

+CPUVID

H_VCCA

H_VSSA

1 2

R26

CLK_ITP15
CLK_ITP#15

R65

61.9_0603_1%

H_RS#0
H_RS#1
H_RS#2

H_FERR#

H_PWRGOOD

H_RESET#

H_THERMDA
H_THERMDC

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5

ITP_TCK
ITP_TDI

ITP_TMS
ITP_TRST#

VCCVIDLB

@0_0402_5%

CLK_ITP
CLK_ITP#

COMP0
COMP1

12

12

R14

61.9_0603_1%

AMP_3-1565030-1_Prescott

AB23

AB25

AD6
AD5

AC6
AC4

AD20

AE23

AD22

AC26
AD26

F1

G5

F4

AB2

J6

C6

B6
B2
B5

Y4

D1

E5

W5

H5
H2

B3

C4

A2

AB5

Y6
AA5
AB4

D4
C1
D5

F7

E6

A5

A4
AF3

L24

P1

JCPU1B

RS#0
RS#1
RS#2
RSP#
TRDY#

A20M#
FERR#
IGNNE#
SMI#
PWRGOOD
STPCLK#

LINT0
LINT1
INIT#
RESET#

DBSY#
DRDY#
BSEL0
BSEL1

THERMDA
THERMDC

THERMTRIP#

BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5

TCK
TDI
TDO
TMS
TRST#

VCCIOPLL
VCCA

VCCSENSE
VSSSENSE
VCCVIDLB

VSSA

ITP_CLK0
ITP_CLK1

COMP0
COMP1

AE11

AE13

VSS_57

VSS_129

F8

G21

AE15

AE17

AE19

AE22

VSS_58

VSS_59

VSS_60

VSS_61

VSS_130

VSS_131

VSS_132

VSS_133

G24G3G6J2J22

AE24

AE7

VSS_62

VSS_63

VSS_65

VSS_134

VSS_135

VSS_136

J25J5K21

AE9

AF1

AF10

VSS_66

VSS_67

VSS_137

VSS_138

K24K3K6L1L23

AF12

AF14

VSS_68

VSS_69

VSS_70

VSS_139

VSS_140

VSS_141

AF16

AF18

VSS_71

VSS_142

AF20

AF6

VSS_72

VSS_73

VSS_75

VSS_143

VSS_144

VSS_145

L26L4M2

AF8

B10

VSS_76

VSS_146

M22

B12

B14

VSS_77

VSS_78

VSS_79

VSS_147

VSS_148

VSS_149

M25M5N21

B16

B18

B20

VSS_80

VSS_81

VSS_82

VSS_150

VSS_151

VSS_152

N24N3N6P2P22

B23

B26B4B8

C11

C13

C15

C17

VSS_83

VSS_84

VSS_85

VSS_86

VSS_87

VSS_88

VSS_89

Prescott

VSS_153

VSS_154

VSS_155

VSS_156

VSS_157

VSS_158

VSS_159

P25P5R1

R23

R26R4T21

C19C2C22

VSS_90

VSS_91

VSS_92

VSS_160

VSS_161

VSS_162

C25C5C7C9D10

VSS_93

VSS_94

VSS_95

VSS_96

VSS_163

VSS_164

VSS_165

VSS_166

T24T3T6U2U22

D12

VSS_97

VSS_98

VSS_99

VSS_167

VSS_168

VSS_169

U25U5V1

D14

D16

VSS_100

VSS_170

V23

D18

D20

VSS_101

VSS_102

VSS_103

VSS_171

VSS_172

VSS_173

V26V4W21

H_VID052
H_VID152
H_VID252
H_VID352
H_VID452
H_VID552

D21

D24D3D6D8E1

VSS_104

VSS_105

VSS_106

VSS_174

VSS_175

VSS_176

W24W3W6Y2Y22

VSS_107

VSS_108

VSS_109

VSS_177

VSS_178

VSS_179

E11

E13

VSS_110

VSS_180

Y25

Y5

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5

E15

E17

VSS_111

VSS_112

VSS_113

VSS_181

E19

E23

VSS_114

AE5

VSS_115

VID0

E26E4E7E9F10

VSS_116

VSS_117

VSS_118

VSS_119

VID1

VID2

VID3

VID4

AE4

AE3

AE2

AE1

F12

VSS_120

VID5

AD3

F14

F16

VSS_121

VSS_122

VSS_123

VIDPWRGD

AD2

F18F2F22

VSS_124

VSS_125

VSS_126

AF26

F25

F5

VSS_127

VSS_128

OPTIMIZED/COMPAT#

VCCVID

AF4

Trace >= 25mils

1

C39

0.1U_0402_10V6K

2

H_VID_PWRGD

SKTOCC#

PROCHOT#

1 2

DP#0
DP#1
DP#2
DP#3

GTLREF0
GTLREF1
GTLREF2
GTLREF3

TESTHI0
TESTHI1
TESTHI2
TESTHI3
TESTHI4
TESTHI5
TESTHI6
TESTHI7
TESTHI8

TESTHI9
TESTHI10
TESTHI11
TESTHI12

DSTBN#0
DSTBN#1
DSTBN#2
DSTBN#3

DSTBP#0
DSTBP#1
DSTBP#2
DSTBP#3

ADSTB#0
ADSTB#1

DBI#0
DBI#1
DBI#2
DBI#3

DBR#

MCERR#

SLP#

NC1
NC2
NC3
NC4
NC5

+CPUVID

R84

0_0402_5%

J26
K25
K26
L25

AA21
AA6
F20
F6

AE26

AD24
AA2
AC21
AC20
AC24
AC23
AA20
AB22
U6
W4
Y3
A6
AD25

E22
K22
R22
W22

F21
J23
P23
W23

L5
R5

E21
G25
P26
V21

AE25

C3
V6
AB26

A22
A7
AF25
AF24
AE21

@2.43K_0603_1%

H_PROCHOT#

R_E

R31

1 2

R83 0_0402_5%

1 2

H_TESTHI0
H_TESTHI1

H_TESTHI2_7

H_TESTHI8
H_TESTHI9
H_TESTHI10
H_TESTHI11
H_TESTHI12

H_DSTBN#0 7
H_DSTBN#1 7
H_DSTBN#2 7
H_DSTBN#3 7

H_DSTBP#0 7
H_DSTBP#1 7
H_DSTBP#2 7
H_DSTBP#3 7

H_ADSTB#0 7
H_ADSTB#1 7

H_DINV#0 7
H_DINV#1 7
H_DINV#2 7
H_DINV#3 7

1 2

R82
62_0402_5%

RE
Pop: Prescott
Depop: Northwood

+CPUVID

+CPU_GTLREF

R_G

R78 62_0402_5%1 2
R20 62_0402_5%1 2

R64 62_0402_5%1 2

R34 62_0402_5%1 2
R28 62_0402_5%1 2
R19 62_0402_5%1 2
R38 62_0402_5%1 2

1 2

R79 62_0402_5%

H_PROCHOT# 7,51
H_CPUSLP# 23

+CPU_CORE

Pop: Northwood
Depop: Prescott

+CPU_CORE

VID PULL HIGH VID PWRGD Circuit Thermal SensorGTL Reference Voltage

H_VID5

R18 1K_0402_5%

H_VID4

R17 1K_0402_5%

H_VID3
H_VID2

A A

H_VID1
H_VID0

1 2
1 2

RP3

45
36
27
18

1K_8P4R_1206_5%

Layout note :

1. +CPU_GTLREF Trace wide

+3VS

+CPU_GMCH_GTLREF

5

+CPU_CORE

R_A

R_B

12

R59
200_0603_1%

12

R60
169_0603_1%

4

2

C68

0.1U_0402_10V6K

1

12mils(min),Space 15mils

2. Place R_A and R_B near CPU.

3. Place decoupling cap 220PF near CPU.

+CPU_GTLREF

12

R63

0_0603_5%

1

C78
220P_0402_50V8K

2

0.1U_0402_16V4Z

H_VID_PWRGD

SN74LVC125APWLE_TSSOP14

3

1

C780

2

U4A

+3V POWER

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

147

OE#

IO

+3V

12

R70
10K_0402_5%

1 2

R66 0_0402_5%

PG

23

VID_PWRGD 52

VCORE_ENLL 49,52

2

2200P_0402_50V7K

C47

EC_SMB_CK237
EC_SMB_DA237

+3VS

1

H_THERMDA

1

2

H_THERMDC

Title

Size Document Number Rev

C

Date: Sheet of

2
3
8
7

Compal Electronics, Inc.

Prescott Processor in uFCPGA478 (2/2)

LA-1911

C48

0.1U_0402_16V4Z

2

U3

VDD1

D+

ALERT#

D-

THERM#

SCLK

GND

SDATA

ADM1032ARM_RM8

1

1
6
4
5

5 57Friday, August 08, 2003

12

R41
@10K_0402_5%

0.2

5

4

3

2

1

+CPU_CORE

1

C468
22U_1206_6.3V6M

2

D D

+CPU_CORE

1

C514
22U_1206_6.3V6M

2

+CPU_CORE

1

C59
22U_1206_6.3V6M

2

C C

+CPU_CORE

1

C491
22U_1206_6.3V6M

2

1

C536
22U_1206_6.3V6M

2

1

C70
22U_1206_6.3V6M

2

1

C508
22U_1206_6.3V6M

2

1

C558
22U_1206_6.3V6M

2

Place 11 North of Socket(Stuff 8)

1

C523
22U_1206_6.3V6M

2

1

C545
22U_1206_6.3V6M

2

1

2

Place 12 Inside Socket(Stuff all)

1

C571
22U_1206_6.3V6M

2

1

C518
22U_1206_6.3V6M

2

1

2

Place 9 South of Socket(Unstuff all)

C560
22U_1206_6.3V6M

C535
22U_1206_6.3V6M

1

C16
22U_1206_6.3V6M

2

1

C557
22U_1206_6.3V6M

2

1

C408
22U_1206_6.3V6M

2

1

C570
22U_1206_6.3V6M

2

1

C421
22U_1206_6.3V6M

2

22uF depop reference
Springdale Customer Schematic R1.2 page82

1

C60
22U_1206_6.3V6M

2

1

C440
22U_1206_6.3V6M

2

1

C52
22U_1206_6.3V6M

2

1

C455
22U_1206_6.3V6M

2

**

1

C15
22U_1206_6.3V6M

2

1

C14
22U_1206_6.3V6M

2

1

C13
22U_1206_6.3V6M

2

1

C12
22U_1206_6.3V6M

2

1

C19
22U_1206_6.3V6M

2

1

C18
22U_1206_6.3V6M

2

1

C17
22U_1206_6.3V6M

2

B B

+CPU_CORE

1

+

2

+CPU_CORE

C119
470U_D4_2.5VM

1

+

C95
470U_D4_2.5VM

2

470uF _ERS10m ohm* 15, ESR=0.5m ohm

1

+

C85
470U_D4_2.5VM

2

1

+

C75
@470U_D4_2.5VM

2

1

+

C67
470U_D4_2.5VM

2

1

+

C61
470U_D4_2.5VM

2

**

1

+

C51
470U_D4_2.5VM

2

+CPU_CORE

A A

1

+

C63
470U_D4_2.5VM

2

1

+

C8
470U_D4_2.5VM

2

1

+

C33
470U_D4_2.5VM

2

5

1

+

C29
470U_D4_2.5VM

2

1

+

C28
@470U_D4_2.5VM

2

1

+

C44
470U_D4_2.5VM

2

1

+

C53
470U_D4_2.5VM

2

Decoupling Reference Document:
Springdale Chipset Platform Design guide Rev1.11
(12474)page239

Decoupling Reference Requirement:
560uF Polymer, ESR:5m ohm(each) * 10
22uF X5R * 32

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

CPU Decoupling

Size Document Number Rev

C

LA-1911

Date: Sheet of

1

6 57Friday, August 08, 2003

0.2

5

4

3

2

1

+VTT_GMCH

12

D D

C C

+CPU_GMCH_GTLREF

12

12

GTL Reference Voltage

B B

A A

Layout note :

1. +GMCH_GTLREF Trace wide
12mils(min),Space 15mils.

2. Place decoupling cap 220PF near GMCH.

Trace width 10mils,Space
7mils

R531
301_0603_1%

HD_SWING

12

R511
200_0603_1%

1

C301

0.01U_0402_16V7K

2

1 2

R522 0_0603_5%

R535
102_0603_1%

HDRCOMP

R525

24.9_0603_1%

+VTT_GMCH

+GMCH_GTLREF

1

C286
220P_0402_50V8K

2

H_RS#[0..2]5

+GMCH_GTLREF

H_A#[3..31]4

H_REQ#[0..4]4

H_ADSTB#05
H_ADSTB#15

CLK_HCLK15
CLK_HCLK#15

H_DSTBP#05
H_DSTBN#05
H_DINV#05
H_DSTBP#15
H_DSTBN#15
H_DINV#15
H_DSTBP#25
H_DSTBN#25
H_DINV#25
H_DSTBP#35
H_DSTBN#35
H_DINV#35

H_ADS#4

H_TRDY#5

H_DRDY#5

H_DEFER#4
H_HITM#4
H_HIT#4
H_LOCK#4
H_BR0#4
H_BNR#4

H_BPRI#4

H_DBSY#5

H_RESET#5 MCH_CLKSEL0 15

SYS_PWROK24,27,40

H_RS#0
H_RS#1
H_RS#2

HDRCOMP
HD_SWING

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

U43A

D26

HA3#

D30

HA4#

L23

HA5#

E29

HA6#

B32

HA7#

K23

HA8#

C30

HA9#

C31

HA10#

J25

HA11#

B31

HA12#

E30

HA13#

B33

HA14#

J24

HA15#

F25

HA16#

D34

HA17#

C32

HA18#

F28

HA19#

C34

HA20#

J27

HA21#

G27

HA22#

F29

HA23#

E28

HA24#

H27

HA25#

K24

HA26#

E32

HA27#

F31

HA28#

G30

HA29#

J26

HA30#

G26

HA31#

B29

HREQ0#

J23

HREQ1#

L22

HREQ2#

C29

HREQ3#

J21

HREQ4#

B30

HADSTB0#

D28

HADSTB1#

B7

HCLKP

C7

HCLKN

B19

HDSTBP0#

C19

HDSTBN0#

C17

DINV0#

L19

HDSTBP1#

K19

HDSTBN1#

L17

DINV1#

G9

HDSTBP2#

F9

HDSTBN2#

L14

DINV2#

D12

HDSTBP3#

E12

HDSTBN3#

C15

DINV3#

F27

ADS#

D24

HTRDY#

G24

DRDY#

L21

DEFER#

E23

HITM#

K21

HIT#

E25

HLOCK#

B24

BREQ0#

B28

BNR#

B26

BPRI#

E27

DBSY#

G22

RS0#

C27

RS1#

B27

RS2#

E8

CPURST#

AE14

PWROK#

E24

HDRCOMP

C25

HDSWING

F23

HDVREF

SPRINGDALE_UFCBGA932

HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#

HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#

FSB

HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

PROCHOT#

BSEL0
BSEL1

B23
E22
B21
D20
B22
D22
B20
C21
E18
E20
B16
D16
B18
B17
E16
D18
G20
F17
E19
F19
J17
L18
G16
G18
F21
F15
E15
E21
J19
G14
E17
K17
J15
L16
J13
F13
F11
E13
K15
G12
G10
L15
E11
K13
J11
H10
G8
E9
B13
E14
B14
B12
B15
D14
C13
B11
D10
C11
E10
B10
C9
B9
D8
B8

H_PROCHOT#

L20

L13
L12

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8

H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_D#[0..63] 4

H_PROCHOT# 5,51

MCH_CLKSEL1 15

U43F

AR32

VSS

AR29

VSS

AR27

VSS

AR25

VSS

AR23

VSS

AR20

VSS

AR16

VSS

AR13

VSS

AR11

VSS

AR9

VSS

AN32

VSS

AN30

VSS

AN28

VSS

AN26

VSS

AN24

VSS

AN22

VSS

AN20

VSS

AN18

VSS

AN16

VSS

AN14

VSS

AN12

VSS

AN10

VSS

AM35

VSS

AM29

VSS

AM27

VSS

AM25

VSS

AM23

VSS

AM21

VSS

AM19

VSS

AM17

VSS

AM15

VSS

AM13

VSS

AM11

VSS

AM9

VSS

AL32

VSS

AL1

VSS

AK28

VSS

AK26

VSS

AK24

VSS

AK22

VSS

AK20

VSS

AK18

VSS

AK16

VSS

AK14

VSS

AK12

VSS

AK10

VSS

AK8

VSS

AK3

VSS

AJ35

VSS

AJ32

VSS

AJ9

VSS

AJ4

VSS

AJ1

VSS

AH33

VSS

AH30

VSS

AH24

VSS

AH22

VSS

AH20

VSS

AH18

VSS

AH16

VSS

AH14

VSS

AH12

VSS

AH10

VSS

AH6

VSS

AH3

VSS

AG35

VSS

AG32

VSS

AG28

VSS

AG26

VSS

AG24

VSS

AG22

VSS

AG20

VSS

AG18

VSS

AG16

VSS

AG14

VSS

AG8

VSS

AG4

VSS

AF33

VSS

AF30

VSS

AF25

VSS

AF24

VSS

AF22

VSS

AF20

VSS

AF18

VSS

AF16

VSS

AF14

VSS

AF11

VSS

AF9

VSS

AF6

VSS

AF3

VSS

AE35

VSS

AE32

VSS

AE26

VSS

AE25

VSS

AE13

VSS

AE12

VSS

SPRINGDALE_UFCBGA932

AE11

VSS

AE10

VSS

AE4

VSS

AE1

VSS

AD33

VSS

AD30

VSS

AD28

VSS

AD10

VSS

AD9

VSS

AD8

VSS

AD6

VSS

AD3

VSS

AC35

VSS

AC32

VSS

AC4

VSS

AC1

VSS

AB33

VSS

AB30

VSS

AB28

VSS

AB27

VSS

AB26

VSS

AB10

VSS

AB9

VSS

AB8

VSS

AB6

VSS

AB3

VSS

AA32

VSS

AA4

VSS

AA1

VSS

Y35

VSS

Y33

VSS

Y30

VSS

Y28

VSS

Y27

VSS

Y26

VSS

Y10

VSS

Y9

VSS

Y8

VSS

Y6

VSS

Y3

VSS

W32

VSS

W18

VSS

W17

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

W4
V33
V30
V28
V27
V26
V19
V17
V10
V9
V8
V6
V3
U32
U19
U18
U4
T35
T33
T30
T28
T27
T26
T10
T9
T8
T6
T3
T1
R32
R4
R1
P33
P30
P28
P27
P26
P9
P8
P6
P3
N35
N32
N4
N1
M33
M30
M28
M27
M26
M6
M3
L35

GND

U43G

L31

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

GND

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

L26
L25

L24
K33
K29
K27
K25
K22
K20
K18
K16
K14
K12
K11

J35

J32

J28

J22

J20

J18

J16

J14

J12

J10
H33
H30
H26
H24
H22
H20
H18
H16
H14
H12

H9
H8
H5

H2
G35
G31
G28

F26
F24
F22
F20
F18

SPRINGDALE_UFCBGA932

F16
F14
F12
F10
F8
F5
F3
F1
E3
E1
D35
D33
D31
D29
D27
D25
D23
D21
D19
D17
D15
D13
D11
D9
D1
C28
C26
C24
C22
C20
C18
C16
C14
C12
C10
C8
C4
A32
A29
A27
A25
A23
A20
A16
A13
A11
A9
A7

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

2

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Springdale-Host/GND (1/4)

B

LA-1911

0.2

7 57Friday, August 08, 2003

1

5

DDRA_SMA[0..12]12,14

D D

C C

+SM_VREF_A

+SM_VREF_A trace width of 12mils and space
12mils(min)

2

C730

2.2U_0805_16V4Z

1

2

1

C731

0.1U_0402_16V4Z

DDRA_SMA[0..12]

DDRA_SWE#12,14
DDRA_SCAS#12,14
DDRA_SRAS#12,14

DDRA_SBS012,14
DDRA_SBS112,14

DDRA_SCS#012,14
DDRA_SCS#112,14

DDRA_CKE012,14
DDRA_CKE112,14

DDRA_CLK112
DDRA_CLK1#12
DDRA_CLK212
DDRA_CLK2#12

DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12

DDRA_SCS#0
DDRA_SCS#1 DDRA_SDQ18

DDRA_CKE0
DDRA_CKE1

SMXRCOMP
SMXRCOMPVOH
SMXRCOMPVOL

Close to GMCH(E34)

B B

A A

4

U43B

AJ34

SMAA_A0

AL33

SMAA_A1

AK29

SMAA_A2

AN31

SMAA_A3

AL30

SMAA_A4

AL26

SMAA_A5

AL28

SMAA_A6

AN25

SMAA_A7

AP26

SMAA_A8

AP24

SMAA_A9

AJ33

SMAA_A10

AN23

SMAA_A11

AN21

SMAA_A12

AL34

SMAB_A1

AM34

SMAB_A2

AP32

SMAB_A3

AP31

SMAB_A4

AM26

SMAB_A5

AB34

SWE_A#

Y34

SCAS_A#

AC33

SRAS_A#

AE33

SBA_A0

AH34

SBA_A1

AA34

SCS_A0#

Y31

SCS_A1#

Y32

SCS_A2#

W34

SCS_A3#

AL20

SCKE_A0

AN19

SCKE_A1

AM20

SCKE_A2

AP20

SCKE_A3

AK32

SCMDCLK_A0

AK31

SCMDCLK_A0#

AP17

SCMDCLK_A1

AN17

SCMDCLK_A1#

N33

SCMDCLK_A2

N34

SCMDCLK_A2#

AK33

SCMDCLK_A3

AK34

SCMDCLK_A3#

AM16

SCMDCLK_A4

AL16

SCMDCLK_A4#

P31

SCMDCLK_A5

P32

SCMDCLK_A5#

E34

SMVREF_A

AK9

SMXRCOMP

AN9

SMXRCOMPVOH

AL9

SMXRCOMPVOL

SPRINGDALE_UFCBGA932

SDQS_A0

SDM_A0
SDQ_A0
SDQ_A1
SDQ_A2
SDQ_A3
SDQ_A4
SDQ_A5
SDQ_A6
SDQ_A7

SDQS_A1

SDM_A1
SDQ_A8

SDQ_A9
SDQ_A10
SDQ_A11
SDQ_A12
SDQ_A13
SDQ_A14
SDQ_A15

SDQS_A2

SDM_A2
SDQ_A16

SDQ_A17
SDQ_A18
SDQ_A19
SDQ_A20
SDQ_A21

DDR Channel A

SDQ_A22
SDQ_A23

SDQS_A3

SDM_A3
SDQ_A24

SDQ_A25
SDQ_A26
SDQ_A27
SDQ_A28
SDQ_A29
SDQ_A30
SDQ_A31

SDQS_A4

SDM_A4
SDQ_A32

SDQ_A33
SDQ_A34
SDQ_A35
SDQ_A36
SDQ_A37
SDQ_A38
SDQ_A39

SDQS_A5

SDM_A5
SDQ_A40

SDQ_A41
SDQ_A42
SDQ_A43
SDQ_A44
SDQ_A45
SDQ_A46
SDQ_A47

SDQS_A6

SDM_A6
SDQ_A48

SDQ_A49
SDQ_A50
SDQ_A51
SDQ_A52
SDQ_A53
SDQ_A54
SDQ_A55

SDQS_A7

SDM_A7
SDQ_A56

SDQ_A57
SDQ_A58
SDQ_A59
SDQ_A60
SDQ_A61
SDQ_A62
SDQ_A63

AN11
AP12
AP10
AP11
AM12
AN13
AM10
AL10
AL12
AP13

AP15
AP16

AP14
AM14
AL18
AP19
AL14
AN15
AP18
AM18

AP23
AM24

AP22
AM22
AL24
AN27
AP21
AL22
AP25
AP27

AM30
AP30

AP28
AP29
AP33
AM33
AM28
AN29
AM31
AN34

AF34
AF31

AH32
AG34
AF32
AD32
AH31
AG33
AE34
AD34

V34
W33

AC34
AB31
V32
V31
AD31
AB32
U34
U33

M32
M34

T34
T32
K34
K32
T31
P34
L34
L33

H31
H32

J33
H34
E33
F33
K31
J34
G34
F34

DDRA_SDQ[0..63]

DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7

DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15

DDRA_SDQ16
DDRA_SDQ17

DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23

DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31

DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39

DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47

DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55

DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63

3

DDRA_SDQS0 12,14
DDRA_SDM0 12,14

DDRA_SDQS1 12,14
DDRA_SDM1 12,14

DDRA_SDQS2 12,14
DDRA_SDM2 12,14

DDRA_SDQS3 12,14
DDRA_SDM3 12,14

DDRA_SDQS4 12,14
DDRA_SDM4 12,14

DDRA_SDQS5 12,14
DDRA_SDM5 12,14

DDRA_SDQS6 12,14
DDRA_SDM6 12,14

DDRA_SDQS7 12,14
DDRA_SDM7 12,14

DDRA_SDQ[0..63] 12,14

2

DDR Resistive Compensation

+2.5V

12

R94

42.2_0603_1%

2

C92

2.2U_0805_16V4Z

1

12

R98

42.2_0603_1%

DDR RCOMP VOH Circuitry

+2.5V

2

C590

2.2U_0805_16V4Z

1

1

C595
1U_0603_10V6K

2

12

R434
10K_0603_1%

SMXRCOMPVOH

12

R436

30.9K_0603_1%

*

Follow Intel design guide
R1.11(12474) page124,125

DDR RCOMP VOL Circuitry

+2.5V

2

C110

2.2U_0805_16V4Z

1

1

C146
1U_0603_10V6K

2

12

R106

30.9K_0603_1%

*

12

R110
10K_0603_1%

1

Trace width of 12mils and space
10mils(min)

SMXRCOMP

Place resistors within

1.0 inch of GMCH (AK9)

*

R391 Change to 31.12K is real

Trace width of 12mils and space
10mils(min)

1

C777

0.01U_0402_16V7K

2

1

C152

0.01U_0402_16V7K

2

Close to Pin AN9

Close to GMCH <1"

*

R153 Change to 31.12K is real

Trace width of 12mils and space
10mils(min)

SMXRCOMPVOL

1

C167

0.01U_0402_16V7K

2

Close to Pin AL9

Close to GMCH <1"

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Springdale-DDR Interface-A(2/5)

Size Document Number Rev

B

LA-1911

Date: Sheet of

8 57Friday, August 08, 2003

1

0.2

5

DDRB_SMA[0..12]13,14

D D

C C

SM_VREF_B and SM_VREF_A
are connected inside GMCH.

+2.5V

2

12

R442
150_0603_1%

12

B B

R444
150_0603_1%

1

2

1

C598

2.2U_0805_16V4Z

C612

2.2U_0805_16V4Z

+SM_VREF_B

DDRB_SMA[0..12]

DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12

DDRB_SWE#13,14
DDRB_SCAS#13,14
DDRB_SRAS#13,14

DDRB_SBS013,14
DDRB_SBS113,14

DDRB_SCS#013,14
DDRB_SCS#113,14

DDRB_CKE013,14
DDRB_CKE113,14

DDRB_CLK113
DDRB_CLK1#13
DDRB_CLK213
DDRB_CLK2#13

+SM_VREF_B trace width of
12mils and space
12mils(min)

2

C138

0.1U_0402_16V4Z

1

DDRB_SCS#0
DDRB_SCS#1

DDRB_CKE0
DDRB_CKE1

SMYRCOMP
SMYRCOMPVOH
SMYRCOMPVOL

Close to GMCH(AP9)

A A

4

U43C

AG31

SMAA_B0

AJ31

SMAA_B1

AD27

SMAA_B2

AE24

SMAA_B3

AK27

SMAA_B4

AG25

SMAA_B5

AL25

SMAA_B6

AF21

SMAA_B7

AL23

SMAA_B8

AJ22

SMAA_B9

AF29

SMAA_B10

AL21

SMAA_B11

AJ20

SMAA_B12

AE27

SMAB_B1

AD26

SMAB_B2

AL29

SMAB_B3

AL27

SMAB_B4

AE23

SMAB_B5

W27

SWE_B#

W31

SCAS_B#

W26

SRAS_B#

Y25

SBA_B0

AA25

SBA_B1

U26

SCS_B0#

T29

SCS_B1#

V25

SCS_B2#

W25

SCS_B3#

AK19

SCKE_B0

AF19

SCKE_B1

AG19

SCKE_B2

AE18

SCKE_B3

AG29

SCMDCLK_B0

AG30

SCMDCLK_B0#

AF17

SCMDCLK_B1

AG17

SCMDCLK_B1#

N27

SCMDCLK_B2

N26

SCMDCLK_B2#

AJ30

SCMDCLK_B3

AH29

SCMDCLK_B3#

AK15

SCMDCLK_B4

AL15

SCMDCLK_B4#

N31

SCMDCLK_B5

N30

SCMDCLK_B5#

AP9

SMVREF_B

AA33

SMYRCOMP

R34

SMYRCOMPVOH

R33

SMYRCOMPVOL

SPRINGDALE_UFCBGA932

SDQS_B0

SDM_B0

SDQ_B0

SDQ_B1

SDQ_B2

SDQ_B3

SDQ_B4

SDQ_B5

SDQ_B6

SDQ_B7

SDQS_B1

SDM_B1

SDQ_B8

SDQ_B9
SDQ_B10
SDQ_B11
SDQ_B12
SDQ_B13
SDQ_B14
SDQ_B15

SDQS_B2

SDM_B2
SDQ_B16

SDQ_B17
SDQ_B18
SDQ_B19
SDQ_B20

DDR Channel B

SDQ_B21
SDQ_B22
SDQ_B23

SDQS_B3

SDM_B3
SDQ_B24

SDQ_B25
SDQ_B26
SDQ_B27
SDQ_B28
SDQ_B29
SDQ_B30
SDQ_B31

SDQS_B4

SDM_B4
SDQ_B32

SDQ_B33
SDQ_B34
SDQ_B35
SDQ_B36
SDQ_B37
SDQ_B38
SDQ_B39

SDQS_B5

SDM_B5
SDQ_B40

SDQ_B41
SDQ_B42
SDQ_B43
SDQ_B44
SDQ_B45
SDQ_B46
SDQ_B47

SDQS_B6

SDM_B6
SDQ_B48

SDQ_B49
SDQ_B50
SDQ_B51
SDQ_B52
SDQ_B53
SDQ_B54
SDQ_B55

SDQS_B7

SDM_B7
SDQ_B56

SDQ_B57
SDQ_B58
SDQ_B59
SDQ_B60
SDQ_B61
SDQ_B62
SDQ_B63

AF15
AG11
AJ10
AE15
AL11
AE16
AL8
AF12
AK11
AG12

AG13
AG15

AE17
AL13
AK17
AL17
AK13
AJ14
AJ16
AJ18

AG21
AE21

AE19
AE20
AG23
AK23
AL19
AK21
AJ24
AE22

AH27
AJ28

AK25
AH26
AG27
AF27
AJ26
AJ27
AD25
AF28

AD29
AC31

AE30
AC27
AC30
Y29
AE31
AB29
AA26
AA27

U30
U31

AA30
W30
U27
T25
AA31
V29
U25
R27

L27
M29

P29
R30
K28
L30
R31
R26
P25
L32

J30
J31

K30
H29
F32
G33
N25
M25
J29
G32

DDRB_SDQ[0..63]

DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7

DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15

DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23

DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31

DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ39

DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47

DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ54
DDRB_SDQ55

DDRB_SDQ56
DDRB_SDQ57
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQ62
DDRB_SDQ63

3

DDRB_SDQS0 13,14
DDRB_SDM0 13,14

DDRB_SDQS1 13,14
DDRB_SDM1 13,14

DDRB_SDQS2 13,14
DDRB_SDM2 13,14

DDRB_SDQS3 13,14
DDRB_SDM3 13,14

DDRB_SDQS4 13,14
DDRB_SDM4 13,14

DDRB_SDQS5 13,14
DDRB_SDM5 13,14

DDRB_SDQS6 13,14
DDRB_SDM6 13,14

DDRB_SDQS7 13,14
DDRB_SDM7 13,14

DDRB_SDQ[0..63] 13,14

2

DDR Resistive Compensation

DDR RCOMP VOH Circuitry

2

C709

2.2U_0805_16V4Z

1

1

C691
1U_0603_10V6K

2

DDR RCOMP VOL Circuitry

2

C316

2.2U_0805_16V4Z

1

1

C300
1U_0603_10V6K

2

1

+2.5V

2

12

R494

42.2_0603_1%

SMYRCOMP

12

R496

42.2_0603_1%

R398 Change to 31.12K is real

*

C685

2.2U_0805_16V4Z

1

Trace width of 12mils
and space 10mils(min)

Place resistors within

1.0 inch of GMCH (AA33)

Trace width of 12mils and space
10mils(min)

+2.5V

12

R510
10K_0603_1%

SMYRCOMPVOH

12

R506

30.9K_0603_1%

R163 Change to 31.12K is real

*

+2.5V

1

C778

0.01U_0402_16V7K

2

1

C296

0.01U_0402_16V7K

2

Close to Pin R14

Close to GMCH <1"

Trace width of 12mils and space
10mils(min)

12

R224

30.9K_0603_1%

SMYRCOMPVOL

12

R223
10K_0603_1%

1

C292

0.01U_0402_16V7K

2

Close to Pin R33

Close to GMCH <1"

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Springdale-DDR Interface-B(3/5)

Size Document Number Rev

B

LA-1911

Date: Sheet of

9 57Friday, August 08, 2003

1

0.2

5

+1.5VS

12

R112

43.2_0402_1%

D D

+1.5VS

C C

B B

GRCOMP

12

R163
226_0603_1%

HI_SWING_MCH

12

R439
147_0603_1%

HI_VREF_MCH

12

R437
113_0603_1%

1

C151

0.1U_0402_16V4Z

2

1

C149

0.1U_0402_16V4Z

2

1

C164

2

0.1U_0402_16V4Z

1

C605

0.1U_0402_16V4Z

2

+1.5VS

12

R100
226_0603_1%

CI_SWING_GMCH

12

R99
147_0603_1%

CI_VREF_GMCH

12

R108
113_0603_1%

+1.5VS

12

R103

52.3_0603_1%

HI_RCOMP_MCH

GMCH-HUB Reference Circuit

Close to GMCH(AE3)

1

C170

0.01U_0402_16V7K

2

Close to GMCH ball <250mils

Close to GMCH(AE2)

1

C603

0.01U_0402_16V7K

2

Close to GMCH ball <250mils

GMCH-CSA Reference Circuit

Close to GMCH(AF2)

1

C137

0.01U_0402_16V7K

2

Close to GMCH ball <250mils

0.35V

Close to GMCH(AF4)

1

C158

0.01U_0402_16V7K

2

CLK_MCH_66M

Note:
HI_SWING_MCH, HI_VREF_MCH
trace width of 10mils and
space 7mils

Note:
CI_SWING_MCH, CI_VREF_MCH
trace width of 10mils and
space 20mils

Close to GMCH ball <250mils

+1.5VS

12

R150

60.4_0603_1%

AGP_SWING

12

R143

39.2_0603_1%

+AGP_VREF = 0.3535

1 2

A A

R144

44.2_0603_1%

12

R151

100_0603_1%

GMCH-AGP Reference Circuit

Close GMCH ball (AC3) less than 250mils

1

C175

0.1U_0402_16V4Z

2

+AGP_VREF

1

C160

0.01U_0402_16V7K

2

1

C171

0.01U_0402_16V7K

2

Follow Springdale Chipset Platform Design guide Rev1.11(12474)

Note:
Springdale Customer Schematic R1.2 page18
AGP_SWING only had 0.1u cap ; But Springdale
Chipset Platform Design guide Rev1.11(12474)
page138 had a 0.01uf cap. need confirm with
Intel.

Close GMCH ball (AD2)
less than 250mils

5

12

R453
@10_0402_5%

1

C624
@10P_0402_50V8K

2

4

R590

+3VS

R596

4

@1K_0402_5%1 2
@0_0402_5%

12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

AGP_C/BE#[0..3]16

AGP_FRAME#16
CLK_MCH_66M15
AGP_DEVSEL#16

AGP_IRDY#16

AGP_TRDY#16

AGP_STOP#16

AGP_PAR16

AGP_REQ#16
AGP_GNT#16

+AGP_VREF

AGP_RBF#16
AGP_WBF#16

AGP_DBIHI16
AGP_DBILO16

AGP_ST[0..2]16

HUB_HL[0..10]23

HUB_HLSTRF23

HUB_HLSTRS23

R435 52.3_0603_1%

+1.5VS

PCIRST#16,22,23,26,27,29,30,33,34,37

3

1 2

R166 0_0402_5%

R128 0_0402_5%

AGP_C/BE#0
AGP_C/BE#1
AGP_C/BE#2
AGP_C/BE#3

CLK_MCH_66M AGP_AD3

AGP_PAR

GRCOMP
AGP_SWING
+AGP_VREF

AGP_ST0
AGP_ST1
AGP_ST2

HUB_HL0
HUB_HL1
HUB_HL2
HUB_HL3
HUB_HL4
HUB_HL5
HUB_HL6
HUB_HL7
HUB_HL8
HUB_HL9
HUB_HL10

HI_RCOMP_MCH
HI_SWING_MCH
HI_VREF_MCH

CI_SWING_GMCH
CI_VREF_GMCH

12

12

2

U43D

Y7

GCBE0

W5

GCBE1

AA3

GCBE2

U2

GCBE3

U6

GFRAME

H4

GCLKIN

AB4

GDEVSEL

V11

GIRDY

AB5

GTRDY

W11

GSTOP

AB2

GPAR/ADD_DETECT

N6

GREQ

M7

GGNT

AC2

GRCOMP/DVOBCGCOMP

AC3

GVSWING

AD2

GVREF

R10

GRBF

R9

GWBF

M4

DBI_HI

M5

DBI_LO

N3

GST0

N5

GST1

N2

GST2

AF5

HI0

AG3

HI1

AK2

HI2

AG5
AK5

AL3
AL2
AL4
AJ2

AH2

AJ3
AH5
AH4

AD4
AE3
AE2

AK7
AH7

AD11

AF7
AD7

AC10

AF8
AG7
AE9
AH9
AG6

AJ6

AJ5
AG2

AF2

AF4

AP8

AJ8
AK4

AG10

AG9

AN35
AP34

AR1

G4

HUB

HI3
HI4
HI5
HI6
HI7
HI8
HI9
HI10
HISTRF
HISTRS

HI_RCOMP
HI_SWING
HI_VREF

CI0
CI1
CI2
CI3
CI4

CSA

CI5
CI6
CI7
CI8
CI9
CI10
CISTRF
CISTRS

CI_RCOMP
CI_SWING
CI_VREF

DREFCLK
EXTTS#
ICH_SYNC#
RSTIN#

RESERVED_1
RESERVED_2
RESERVED_3
RESERVED_4
RESERVED_5

SPRINGDALE_UFCBGA932

2

AGP

1

AGP_AD[0..31] 16

GADSTBF0

GADSTBS0#

GADSTBF1

GADSTBS1#

GSBSTBF

GSBSTBS#

DDCA_DATA

DDCA_CLK

VGA

AC6
AC5

AGP_AD0

AE6

GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8

GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15

GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31

GSBA0#
GSBA1#
GSBA2#
GSBA3#
GSBA4#
GSBA5#
GSBA6#
GSBA7#

RED

RED#

GREEN

GREEN#

BLUE
BLUE#

HSYNC
VSYNC

REFSET

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8

NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20

Title

Size Document Number Rev

B

Date: Sheet of

AGP_AD1

AC11

AGP_AD2

AD5
AE5

AGP_AD4

AA10

AGP_AD5

AC9

AGP_AD6

AB11

AGP_AD7

AB7

AGP_AD8

AA9

AGP_AD9

AA6

AGP_AD10

AA5

AGP_AD11

W10

AGP_AD12

AA11

AGP_AD13

W6

AGP_AD14

W9

AGP_AD15

V7
V4

V5

AGP_AD16

AA2

AGP_AD17

Y4

AGP_AD18

Y2

AGP_AD19

W2

AGP_AD20

Y5

AGP_AD21

V2

AGP_AD22

W3

AGP_AD23

U3

AGP_AD24

T2

AGP_AD25

T4

AGP_AD26

T5

AGP_AD27

R2

AGP_AD28

P2

AGP_AD29

P5

AGP_AD30

P4

AGP_AD31

M2
U11

T11

AGP_SBA0

R6

AGP_SBA1

P7

AGP_SBA2

R3

AGP_SBA3

R5

AGP_SBA4

U9

AGP_SBA5

U10

AGP_SBA6

U5

AGP_SBA7

T7

R149 0_0402_5%

H3

R165 0_0402_5%12

F2

R170 0_0402_5%12

F4
E4

R169 0_0402_5%12

H6
G5

R172 0_0402_5%12

H7
G6

G3
E2

R460 0_0402_5%12

D2
A3

A33
A35

Analog RGB/CRT guidelines

AF13

for Springdale-P

AF23
AJ12
AN1
AP2
AR3
AR33
AR35
B2
B25
B34
C1
C23
C35
E26
M31
R25

Springdale-AGP/HUB/VGA/CSA (4/5)

LA-1911

AGP_AD_STBF0 16
AGP_AD_STBS0 16

AGP_AD_STBF1 16
AGP_AD_STBS1 16

12

1

AGP_SB_STBF 16
AGP_SB_STBS 16
AGP_SBA[0..7] 16

10 57Friday, August 08, 2003

0.2

5

4

+2.5V

3

2

1

1

Note:
Placed less than 100 mils from ball

Route to GMCH ball without via

D D

1

C681

0.47U_0603_16V7K

2

2

C713

0.1U_0402_10V6K

1

C C

C618

0.1U_0402_10V6K

12

C620 0.22U_0603_10V7K

C736

0.47U_0603_16V7K

12

C719 0.22U_0603_10V7K

C128

Trace 14mils

R467

B B

Note:
Placed less than 100 mils from ball

Route to GMCH ball without via

A A

0.1U_0402_10V6K

12

12

C329 0.1U_0402_10V6K

R462 0_0402_5%

0_0402_5%12

12

1 2

C248 0.1U_0402_10V6K

VTT_DCAP1
VTT_DCAP2

1

C699

0.47U_0603_16V7K

2

+VTT_GMCH

+2.5V

VCC_DDR_DCAP5

12

VCC_DDR_DCAP4

VCC_DDR_DCAP1

12

VCC_AGP_DCAP2

+1.5VS

VTT_DCAP3
VCCA_FSB
VCCA_DPLL
VCCA_DAC

VCC_DDR_DCAP2 VCCA_FSB1 VCCA_FSB

VCCA1P5_DDR_SM

(1A)

*

+3VS

U43E

A15

VTT

A21

VTT

A4

VTT

A5

VTT

A6

VTT

B5

VTT

B6

VTT

C5

VTT

C6

VTT

D5

VTT

D6

VTT

D7

VTT

E6

VTT

E7

VTT

F7

VTT

AA35

VCC_DDR

AL6

VCC_DDR

AL7

VCC_DDR

AM1

VCC_DDR

AM2

VCC_DDR

AM3

VCC_DDR

AM5

VCC_DDR

AM6

VCC_DDR

AM7

VCC_DDR

AM8

VCC_DDR

AN2

VCC_DDR

AN4

VCC_DDR

AN5

VCC_DDR

AN6

VCC_DDR

AN7

VCC_DDR

AN8

VCC_DDR

AP3

VCC_DDR

AP4

VCC_DDR

AP5

VCC_DDR

AP6

VCC_DDR

AP7

VCC_DDR

AR15

VCC_DDR

AR21

VCC_DDR

AR31

VCC_DDR

AR4

VCC_DDR

AR5

VCC_DDR

AR7

VCC_DDR

E35

VCC_DDR

R35

VCC_DDR

G1

VCC_DAC

G2

VCC_DAC

AG1

VCCA_AGP

Y11

VCCA_AGP

A31

VCCA_FSB

B4

VCCA_FSB

B3

VCCA_DPLL

C2

VCCA_DAC

AL35

VCCA_DDR

AB25

VCCA_DDR

AC25

VCCA_DDR

AC26

VCCA_DDR

SPRINGDALE_UFCBGA932

Decoupling Reference Document:
Springdale Chipset Platform Design guide Rev1.11
(12474)page246,248

Decoupling Reference Document:
Springdale Customer Schematic R1.2 page84

POWER

VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP

VSSA_DAC

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

J6
J7
J8
J9
K6
K7
K8
K9
L6
L7
L9
L10
L11
M8
M9
M10
M11
N9
N10
N11
P10
P11
R11
T16
T17
T18
T19
T20
U16
U17
U20
V16
V18
V20
W16
W19
W20
Y16
Y17
Y18
Y19
Y20

J1
J2
J3
J4
J5
K2
K3
K4
K5
L1
L2
L3
L4
L5
Y1

D3

+1.5VS

VCC_AGP_DCAP1

C90
22U_1206_10V4Z

2

+2.5V

1

C150

0.1U_0402_10V6K

2

+1.5VS

1

C231

0.1U_0402_10V6K

2

+1.5VS

1

+

C198
470U_D4_2.5VM

2

Place at the output of the 1.5V VR

+VTT_GMCH +2.5V

1 2

C166

0.1U_0402_10V6K

2

C91

4.7U_0805_6.3V6K

1

1

C98

0.1U_0402_10V6K

2

1

C229

0.1U_0402_10V6K

2

2

C224

4.7U_0805_6.3V6K

1

1

C242

0.1U_0402_10V6K

2

Place near GMCH

+1.5VS

1

C105

0.1U_0402_10V6K

2

1

C283

0.1U_0402_10V6K

2

1

C217

0.1U_0402_10V6K

2

C243
10U_1206_10V4Z

+1.5VS

1

C233

0.1U_0402_10V6K

2

Place near ball
Y11,routing trace
from cap to ball

1

C208

0.1U_0402_10V6K

2

+1.5VS

1

C246

0.1U_0402_10V6K

2

1

C213

0.1U_0402_10V6K

2

+VTT_GMCH

1

+

C266
470U_D4_2.5VM

2

Note: Please change to 0.82uH, DC current
of 30mA parts and close to cap

+1.5VS

R141
0_0603_5%

12

1 2

LQG21F4R7N00_0805

Note: Please change to 1uH(0.54uH-D-IN), DC current
of 1000mA parts and close to cap
Trace 50mils
Trace 35mils (under GMCH ball field)

R183
0_0603_5%

VCCA_DDR VCCA1P5_DDR_SM

12

1 2

0_0805_5%

1

2

1

2

Place near GMCH

L15

**

**

L18

1

C103

0.1U_0402_10V6K

2

1

C201

0.1U_0402_10V6K

2

C207

0.1U_0402_10V6K

2

C240

0.1U_0402_16V4Z

1

C148

0.1U_0402_10V6K

Trace 14milsTrace 14mils

12

C214

+

150U_D2_6.3VM

1

C222
22U_1206_6.3V6M

2

1

C114

0.1U_0402_10V6K

2

1

C220

0.1U_0402_10V6K

2

2

C253

4.7U_0805_6.3V6K

1

Trace 35mils

(1A)(1A)

1

C117

0.1U_0402_10V6K

2

1

C197

0.1U_0402_10V6K

2

2

1

2

C235

0.1U_0402_16V4Z

1

Close to GMCH

2

C241

0.1U_0402_16V4Z

1

Close to GMCH

1

C109

0.1U_0402_10V6K

2

1

C216

0.1U_0402_10V6K

2

C258

4.7U_0805_6.3V6K

1

C249
1U_0603_10V6K

2

1

C123

0.1U_0402_10V6K

2

1

C234

0.1U_0402_10V6K

2

1

2

C244

0.47U_0603_16V7K

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Springdale-Decoupling (5/5)

B

LA-1911

0.2

11 57Friday, August 08, 2003

1

5

+2.5V

JP22

1

VREF

3

DDRA_SDQ0
DDRA_SDQ1

DDRA_SDQS0
DDRA_SDQ6 DDRA_SDQ7

DDRA_SDQ2

D D

DDRA_CLK18
DDRA_CLK1#8

C C

DDRA_CKE18,14

DDRA_SBS08,14
DDRA_SWE#8,14
DDRA_SCS#08,14

B B

A A

ICH_SMB_DATA13,15,23
ICH_SMB_CLK13,15,23

5

DDRA_SDQ12
DDRA_SDQ8

DDRA_SDQS1
DDRA_SDQ10

DDRA_SDQ15

DDRA_SDQ20
DDRA_SDQ16

DDRA_SDQS2
DDRA_SDQ18

DDRA_SDQ19
DDRA_SDQ28

DDRA_SDQ29
DDRA_SDQS3

DDRA_SDQ30
DDRA_SDQ27

DDRA_CKE1
DDRA_SMA12

DDRA_SMA9
DDRA_SMA7

DDRA_SMA5
DDRA_SMA3
DDRA_SMA1

DDRA_SMA10
DDRA_SBS0
DDRA_SWE#
DDRA_SCS#0

DDRA_SDQ36
DDRA_SDQ37

DDRA_SDQS4
DDRA_SDQ34

DDRA_SDQ35
DDRA_SDQ44

DDRA_SDQ41 DDRA_SDQ45
DDRA_SDQS5

DDRA_SDQ43
DDRA_SDQ46

DDRA_SDQ48
DDRA_SDQ53

DDRA_SDQS6
DDRA_SDQ54

DDRA_SDQ55
DDRA_SDQ60

DDRA_SDQ61
DDRA_SDQS7

DDRA_SDQ62
DDRA_SDQ59

+3VS

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0#

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2#

93

VDD

95

CKE1

97

DU/A13

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE#

121

S0#

123

DU

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD_SPD

199

VDD_ID

KEYLINK_5762-3-111

4

DU/RESET#

4

2

VREF

4

VSS

6

DQ4

8

DQ5

10

VDD

12

DM0

14

DQ6

16

VSS

18

DQ7

20

DQ12

22

VDD

24

DQ13

26

DM1

28

VSS

30

DQ14

32

DQ15

34

VDD

36

VDD

38

VSS

40

VSS

42

DQ20

44

DQ21

46

VDD

48

DM2

50

DQ22

52

VSS

54

DQ23

56

DQ28

58

VDD

60

DQ29

62

DM3

64

VSS

66

DQ30

68

DQ31

70

VDD

72

CB4

74

CB5

76

VSS

78

DM8

80

CB6

82

VDD

84

CB7

86
88

VSS

90

VSS

92

VDD

94

VDD

96

CKE0

98

DU/BA2

100

A11

102

A8

104

VSS

106

A6

108

A4

110

A2

112

A0

114

VDD

116

BA1

118

RAS#

120

CAS#

122

S1#

124

DU

126

VSS

128

DQ36

130

DQ37

132

VDD

134

DM4

136

DQ38

138

VSS

140

DQ39

142

DQ44

144

VDD

146

DQ45

148

DM5

150

VSS

152

DQ46

154

DQ47

156

VDD

158

CK1#

160

CK1

162

VSS

164

DQ52

166

DQ53

168

VDD

170

DM6

172

DQ54

174

VSS

176

DQ55

178

DQ60

180

VDD

182

DQ61

184

DM7

186

VSS

188

DQ62

190

DQ63

192

VDD

194

SA0

196

SA1

198

SA2

200

DU

H = 5.2mm

+2.5V

DDRA_SDQ5
DDRA_SDQ4

DDRA_SDM0

DDRA_SDQ3
DDRA_SDQ9

DDRA_SDQ13
DDRA_SDM1

DDRA_SDQ14
DDRA_SDQ11

DDRA_SDQ21
DDRA_SDQ17

DDRA_SDM2
DDRA_SDQ22

DDRA_SDQ23
DDRA_SDQ24

DDRA_SDQ25
DDRA_SDM3

DDRA_SDQ26
DDRA_SDQ31

DDRA_CKE0
DDRA_SMA11

DDRA_SMA8
DDRA_SMA6

DDRA_SMA4
DDRA_SMA2
DDRA_SMA0

DDRA_SBS1
DDRA_SRAS#
DDRA_SCAS#
DDRA_SCS#1

DDRA_SDQ32
DDRA_SDQ33

DDRA_SDM4
DDRA_SDQ38

DDRA_SDQ39
DDRA_SDQ40

DDRA_SDM5
DDRA_SDQ42

DDRA_SDQ47

DDRA_SDQ49
DDRA_SDQ52

DDRA_SDM6
DDRA_SDQ51

DDRA_SDQ50
DDRA_SDQ56

DDRA_SDQ57
DDRA_SDM7

DDRA_SDQ63
DDRA_SDQ58

SO-DIMM 0
REVERSE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

3

DDRA_VREF trace width of
12mils and space 12mils(min)

DDRA_VREF

1

C100

0.1U_0402_16V4Z

2

Close to SO-DIMM

+2.5V

1

C255

0.1U_0402_10V6K

2

DDRA_CKE0 8,14

DDRA_SBS1 8,14
DDRA_SRAS# 8,14
DDRA_SCAS# 8,14
DDRA_SCS#1 8,14

DDRA_CLK2# 8
DDRA_CLK2 8

3

+2.5V

1

C116
22U_1206_10V4Z

2

1

C276

0.1U_0402_10V6K

2

2

+2.5V

12

R87
75_0603_1%

12

R92
75_0603_1%

DDRA_SDQ[0..63]8,14
DDRA_SDQS[0..7]8,14
DDRA_SMA[0..12]8,14
DDRA_SDM[0..7]8,14

DDRA_SDQ[0..63]
DDRA_SDQS[0..7]
DDRA_SMA[0..12]
DDRA_SDM[0..7]

System Memory Decoupling caps

1

C134

0.1U_0402_10V6K

2

1

C302

0.1U_0402_10V6K

2

Decoupling Reference Document:
Springdale Customer Schematic R1.2 page22
each Channel(two DIMMs) requirement 22uF*1 ; 0.1uF*14

Decoupling Reference Document:
Springdale Chipset Platform Design guide Rev1.11
(12474)pag 271 each DIMM(two) requirement 0.1uF*42

1

C161

0.1U_0402_10V6K

2

1

C319

0.1U_0402_10V6K

2

2

1

C192

0.1U_0402_10V6K

2

1

C330

0.1U_0402_10V6K

2

Title

Size Document Number Rev

Date: Sheet of

1

C204

0.1U_0402_10V6K

2

1

C341

0.1U_0402_10V6K

2

Compal Electronics, Inc.

DDR-SODIMM SLOT1

LA-1911

1

1

C227

0.1U_0402_10V6K

2

1

C347

0.1U_0402_10V6K

2

1

1

C247

0.1U_0402_10V6K

2

1

C354

0.1U_0402_10V6K

2

12 57Friday, August 08, 2003

0.2

5

4

3

2

1

+2.5V

JP23

1

VREF

3

DDRB_SDQ4
DDRB_SDQ0

DDRB_SDQS0
DDRB_SDQ7

D D

DDRB_CLK19
DDRB_CLK1#9

C C

DDRB_CKE19,14

DDRB_SBS09,14
DDRB_SWE#9,14
DDRB_SCS#09,14

B B

A A

ICH_SMB_DATA12,15,23
ICH_SMB_CLK12,15,23

DDRB_SDQ5
DDRB_SDQ9

DDRB_SDQ12
DDRB_SDQS1

DDRB_SDQ10
DDRB_SDQ14

DDRB_SDQ20
DDRB_SDQ21

DDRB_SDQS2
DDRB_SDQ22

DDRB_SDQ17
DDRB_SDQ24

DDRB_SDQ25
DDRB_SDQS3

DDRB_SDQ26
DDRB_SDQ30

DDRB_CKE1
DDRB_SMA12

DDRB_SMA9
DDRB_SMA7

DDRB_SMA5
DDRB_SMA3
DDRB_SMA1

DDRB_SMA10
DDRB_SBS0
DDRB_SWE#
DDRB_SCS#0

DDRB_SDQ33
DDRB_SDQ34

DDRB_SDQS4
DDRB_SDQ37

DDRB_SDQ38
DDRB_SDQ40

DDRB_SDQ44
DDRB_SDQS5

DDRB_SDQ43 DDRB_SDQ41
DDRB_SDQ42

DDRB_SDQ52
DDRB_SDQ49

DDRB_SDQS6
DDRB_SDQ55

DDRB_SDQ60
DDRB_SDQ56

DDRB_SDQS7
DDRB_SDQ58

DDRB_SDQ57

+3VS

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0#

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2#

93

VDD

95

CKE1

97

DU/A13

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE#

121

S0#

123

DU

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD_SPD

199

VDD_ID

KLINK_5746-3-111

DU/RESET#

VREF

VSS

DQ4
DQ5

VDD

DM0
DQ6

VSS

DQ7

DQ12

VDD

DQ13

DM1

VSS
DQ14
DQ15

VDD

VDD

VSS

VSS

DQ20
DQ21

VDD

DM2

DQ22

VSS
DQ23
DQ28

VDD
DQ29

DM3

VSS
DQ30
DQ31

VDD

CB4
CB5

VSS

DM8
CB6

VDD

CB7

VSS

VSS

VDD

VDD

CKE0

DU/BA2

A11

VSS

VDD

BA1
RAS#
CAS#

S1#

DU

VSS
DQ36
DQ37

VDD

DM4

DQ38

VSS
DQ39
DQ44

VDD
DQ45

DM5

VSS
DQ46
DQ47

VDD
CK1#

CK1

VSS
DQ52
DQ53

VDD

DM6

DQ54

VSS
DQ55
DQ60

VDD
DQ61

DM7

VSS
DQ62
DQ63

VDD

SA0
SA1
SA2

DU

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102

A8

104
106

A6

108

A4

110

A2

112

A0

114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

H= 9.2mm

5

4

DDRB_VREF trace width of
12mils and space 12mils(min)

DDRB_SDQ2
DDRB_SDQ6

DDRB_SDM0
DDRB_SDQ1

DDRB_SDQ3
DDRB_SDQ13

DDRB_SDQ11
DDRB_SDM1

DDRB_SDQ15
DDRB_SDQ8

DDRB_SDQ19
DDRB_SDQ16

DDRB_SDM2
DDRB_SDQ18

DDRB_SDQ23
DDRB_SDQ28

DDRB_SDQ29
DDRB_SDM3

DDRB_SDQ27
DDRB_SDQ31

DDRB_CKE0
DDRB_SMA11

DDRB_SMA8
DDRB_SMA6

DDRB_SMA4
DDRB_SMA2
DDRB_SMA0

DDRB_SBS1
DDRB_SRAS#
DDRB_SCAS#
DDRB_SCS#1

DDRB_SDQ32
DDRB_SDQ36

DDRB_SDM4
DDRB_SDQ39

DDRB_SDQ35
DDRB_SDQ46

DDRB_SDQ45
DDRB_SDM5

DDRB_SDQ47

DDRB_SDQ48
DDRB_SDQ53

DDRB_SDM6
DDRB_SDQ51

DDRB_SDQ54DDRB_SDQ50
DDRB_SDQ62

DDRB_SDQ61
DDRB_SDM7

DDRB_SDQ59
DDRB_SDQ63

+3VS

DDRB_VREF

2

C101

0.1U_0402_16V4Z

1

DDRB_CKE0 9,14

DDRB_SBS1 9,14
DDRB_SRAS# 9,14
DDRB_SCAS# 9,14
DDRB_SCS#1 9,14

DDRB_CLK2# 9
DDRB_CLK2 9

+2.5V

REVERSESO-DIMM 2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+2.5V+2.5V

+2.5V

1

C118

0.1U_0402_10V6K

2

+2.5V

1

C281

0.1U_0402_10V6K

2

1

C189

0.1U_0402_10V6K

2

DDRB_SDQ[0..63]9,14

12

R86
75_0603_1%

12

R90
75_0603_1%

DDRB_SDQS[0..7]9,14
DDRB_SMA[0..12]9,14
DDRB_SDM[0..7]9,14

System Memory Decoupling caps

1

C139

0.1U_0402_10V6K

2

1

C318

0.1U_0402_10V6K

2

1

C165

0.1U_0402_10V6K

2

1

C162

0.1U_0402_10V6K

2

1

C312

0.1U_0402_10V6K

2

Decoupling Reference Document:
Springdale Customer Schematic R1.2 page26
each Channel(two DIMMs) requirement 0.1uF*24

1

C254

0.1U_0402_10V6K

2

1

2

1

2

1

C289

0.1U_0402_10V6K

2

2

C168

0.1U_0402_10V6K

C333

0.1U_0402_10V6K

1

C190

0.1U_0402_10V6K

2

1

C331

0.1U_0402_10V6K

2

1

C113

0.1U_0402_10V6K

2

Title

Size Document Number Rev

Date: Sheet of

DDRB_SDQ[0..63]
DDRB_SDQS[0..7]
DDRB_SMA[0..12]
DDRB_SDM[0..7]

1

C223

0.1U_0402_10V6K

2

1

C346

0.1U_0402_10V6K

2

1

C309

0.1U_0402_10V6K

2

1

C225

0.1U_0402_10V6K

2

1

C353

0.1U_0402_10V6K

2

1

C305

0.1U_0402_10V6K

2

Compal Electronics, Inc.
DDR-SODIMM SLOT2

LA-1911

1

1

C256

0.1U_0402_10V6K

2

1

C355

0.1U_0402_10V6K

2

1

C193

0.1U_0402_10V6K

2

13 57Friday, August 08, 2003

0.2

5

Channel A(DIMM0) Termination resistors & Decoupling caps

+1.25VS +1.25VS

DDRA_SDQ1
DDRA_SDQ0

DDRA_SDQ6
DDRA_SDQS0

D D

DDRA_SDQ12
DDRA_SDQ2

DDRA_SDQS1
DDRA_SDQ8

DDRA_SDQ15
DDRA_SDQ10

DDRA_SDQ16
DDRA_SDQ20

DDRA_SDQ18
DDRA_SDQS2

C C

DDRA_SDQ28
DDRA_SDQ19

DDRA_SDQS3
DDRA_SDQ29

DDRA_SDQ27
DDRA_SDQ30

DDRA_SDQ37
DDRA_SDQ36

DDRA_SDQ34
DDRA_SDQS4

DDRA_SDQ44
DDRA_SDQ35

B B

DDRA_SDQS5
DDRA_SDQ41

DDRA_SDQ46
DDRA_SDQ43

DDRA_SDQ53
DDRA_SDQ48

DDRA_SDQ54
DDRA_SDQS6

DDRA_SDQ60
DDRA_SDQ55

DDRA_SDQS7
DDRA_SDQ61

A A

DDRA_SDQ59
DDRA_SDQ62

RP72

1 4
2 3

56_0404_4P2R_5%

RP74

1 4
2 3

56_0404_4P2R_5%

RP76

1 4
2 3

56_0404_4P2R_5%

RP77

1 4
2 3

56_0404_4P2R_5%

RP79

1 4
2 3

56_0404_4P2R_5%

RP85

1 4
2 3

56_0404_4P2R_5%

RP87

1 4
2 3

56_0404_4P2R_5%

RP89

1 4
2 3

56_0404_4P2R_5%

RP91

1 4
2 3

56_0404_4P2R_5%

RP97

1 4
2 3

56_0404_4P2R_5%

RP109

1 4
2 3

56_0404_4P2R_5%

RP112

1 4
2 3

56_0404_4P2R_5%

RP114

1 4
2 3

56_0404_4P2R_5%

RP116

1 4
2 3

56_0404_4P2R_5%

RP118

1 4
2 3

56_0404_4P2R_5%

RP120

1 4
2 3

56_0404_4P2R_5%

RP121

1 4
2 3

56_0404_4P2R_5%

RP123

1 4
2 3

56_0404_4P2R_5%

RP127

1 4
2 3

56_0404_4P2R_5%

RP129

1 4
2 3

56_0404_4P2R_5%

RP6

DDRA_SDQ5

14

DDRA_SDQ4

23

56_0404_4P2R_5%

RP8

DDRA_SDM0

14

DDRA_SDQ7

23

56_0404_4P2R_5%

RP10

DDRA_SDQ3

14

DDRA_SDQ9

23

56_0404_4P2R_5%

RP12

DDRA_SDQ13

14

DDRA_SDM1

23

56_0404_4P2R_5%

RP15

DDRA_SDQ14

14

DDRA_SDQ11

23

56_0404_4P2R_5%

RP17

DDRA_SDQ21

14

DDRA_SDQ17

23

56_0404_4P2R_5%

RP19

DDRA_SDM2

14

DDRA_SDQ22

23

56_0404_4P2R_5%

RP21

DDRA_SDQ23

14

DDRA_SDQ24

23

56_0404_4P2R_5%

RP23

DDRA_SDQ25

14

DDRA_SDM3

23

56_0404_4P2R_5%

RP26

DDRA_SDQ26

14

DDRA_SDQ31

23

56_0404_4P2R_5%

RP43

DDRA_SDQ32

14

DDRA_SDQ33

23

56_0404_4P2R_5%

RP45

DDRA_SDM4

14

DDRA_SDQ38

23

56_0404_4P2R_5%

RP49

DDRA_SDQ39

14

DDRA_SDQ40

23

56_0404_4P2R_5%

RP51

DDRA_SDQ45

14

DDRA_SDM5

23

56_0404_4P2R_5%

RP53

DDRA_SDQ42

14

DDRA_SDQ47

23

56_0404_4P2R_5%

RP55

DDRA_SDQ49

14

DDRA_SDQ52

23

56_0404_4P2R_5%

RP57

DDRA_SDM6

14

DDRA_SDQ51

23

56_0404_4P2R_5%

RP59

DDRA_SDQ50

14

DDRA_SDQ56

23

56_0404_4P2R_5%

RP61

DDRA_SDQ57

14

DDRA_SDM7

23

56_0404_4P2R_5%

RP63

DDRA_SDQ63

14

DDRA_SDQ58

23

56_0404_4P2R_5%

Decoupling Reference Document:
Springdale Customer Schematic R1.2 page22
each Channel(two DIMMs) requirement 4.7u*2 ; 0.1uF*28

5

RP29

56_0404_4P2R_5%

RP98

56_0404_4P2R_5%

RP100

56_0404_4P2R_5%

RP102

56_0404_4P2R_5%

RP104

56_0404_4P2R_5%

RP106

56_0404_4P2R_5%

RP31

56_0404_4P2R_5%

RP34

56_0404_4P2R_5%

RP39

56_0404_4P2R_5%

RP41

56_0404_4P2R_5%

RP36

56_0404_4P2R_5%

+1.25VS

1

C593

2

0.1U_0402_10V6K

+1.25VS

1

C669

2

0.1U_0402_10V6K

+1.25VS

1

C734

2

0.1U_0402_10V6K

+1.25VS

1

C107

2

0.1U_0402_10V6K

+1.25VS

1

C218

2

0.1U_0402_10V6K

DDRA_CKE1

14

DDRA_CKE0

23

DDRA_SMA9

14

DDRA_SMA12

23

DDRA_SMA5

14

DDRA_SMA7

23

DDRA_SMA1

14

DDRA_SMA3

23

DDRA_SBS0

14

DDRA_SMA10

23

DDRA_SCS#0

14

DDRA_SWE#

23

DDRA_SMA11

14

DDRA_SMA8

23

DDRA_SMA6

14

DDRA_SMA4

23

DDRA_SBS1

14

DDRA_SRAS#

23

DDRA_SCAS#

14

DDRA_SCS#1

23

DDRA_SMA2

14

DDRA_SMA0

23

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C606

2

1

C673

2

1

C742

2

1

C129

2

1

C260

2

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

4

DDRA_CKE1 8,12
DDRA_CKE0 8,12

DDRA_SBS0 8,12

DDRA_SCS#0 8,12

DDRA_SWE# 8,12

DDRA_SBS1 8,12
DDRA_SRAS# 8,12

DDRA_SCAS# 8,12

DDRA_SCS#1 8,12

0.1U_0402_10V6K

1

C627

2

0.1U_0402_10V6K

1

C324

2

0.1U_0402_10V6K

1

C614

2

0.1U_0402_10V6K

1

C185

2

0.1U_0402_10V6K

1

C298

2

4

1

2

1

2

1

2

1

2

1

C338

2

C749

C271

C349

C200

3

Channel B(DIMM2) Termination resistors & Decoupling caps

DDRB_SDQ0
DDRB_SDQ4

DDRB_SDQ7
DDRB_SDQS0

0.1U_0402_10V6K

1

C638

2

0.1U_0402_10V6K

1

C706

2

0.1U_0402_10V6K

1

C720

2

4.7U_1206_16V6K

1

C172

2

0.1U_0402_10V6K

1

C344

2

DDRA_SDQ[0..63]
DDRA_SDQS[0..7]

DDRA_SMA[0..12]

DDRA_SDM[0..7]

DDRB_SDQ9
DDRB_SDQ5

DDRB_SDQS1
DDRB_SDQ12

DDRB_SDQ14
DDRB_SDQ10

DDRB_SDQ21
DDRB_SDQ20

DDRB_SDQ22
DDRB_SDQS2

DDRB_SDQ24
DDRB_SDQ17

DDRB_SDQS3
DDRB_SDQ25

DDRB_SDQ30
DDRB_SDQ26

DDRB_SDQ34
DDRB_SDQ33

DDRB_SDQ37
DDRB_SDQS4

DDRB_SDQ40
DDRB_SDQ38

DDRB_SDQS5
DDRB_SDQ44

DDRB_SDQ42
DDRB_SDQ43

DDRB_SDQ49
DDRB_SDQ52

DDRB_SDQ55
DDRB_SDQS6

DDRB_SDQ60
DDRB_SDQ50

DDRB_SDQS7
DDRB_SDQ56

DDRB_SDQ57
DDRB_SDQ58

3

DDRA_SDQ[0..63]8,12
DDRA_SDQS[0..7]8,12
DDRA_SMA[0..12]8,12
DDRA_SDM[0..7]8,12

1

C631

2

0.1U_0402_10V6K

1

C690

2

0.1U_0402_10V6K

1

C156

2

0.1U_0402_10V6K

12

C649

4.7U_0805_10V4Z

1

C315

2

0.1U_0402_10V6K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

RP7

1 4
2 3

56_0404_4P2R_5%

RP9

1 4
2 3

56_0404_4P2R_5%

RP11

1 4
2 3

56_0404_4P2R_5%

RP13

1 4
2 3

56_0404_4P2R_5%

RP16

1 4
2 3

56_0404_4P2R_5%

RP18

1 4
2 3

56_0404_4P2R_5%

RP20

1 4
2 3

56_0404_4P2R_5%

RP22

1 4
2 3

56_0404_4P2R_5%

RP24

1 4
2 3

56_0404_4P2R_5%

RP27

1 4
2 3

56_0404_4P2R_5%

RP44

1 4
2 3

56_0404_4P2R_5%

RP47

1 4
2 3

56_0404_4P2R_5%

RP50

1 4
2 3

56_0404_4P2R_5%

RP52

1 4
2 3

56_0404_4P2R_5%

RP54

1 4
2 3

56_0404_4P2R_5%

RP56

1 4
2 3

56_0404_4P2R_5%

RP58

1 4
2 3

56_0404_4P2R_5%

RP60

1 4
2 3

56_0404_4P2R_5%

RP62

1 4
2 3

56_0404_4P2R_5%

RP64

1 4
2 3

56_0404_4P2R_5%

RP71

14
23

56_0404_4P2R_5%

RP73

14
23

56_0404_4P2R_5%

RP75

14
23

56_0404_4P2R_5%

RP78

14
23

56_0404_4P2R_5%

RP80

14
23

56_0404_4P2R_5%

RP84

14
23

56_0404_4P2R_5%

RP86

14
23

56_0404_4P2R_5%

RP88

14
23

56_0404_4P2R_5%

RP90

14
23

56_0404_4P2R_5%

RP96

14
23

56_0404_4P2R_5%

RP108

14
23

56_0404_4P2R_5%

RP111

14
23

56_0404_4P2R_5%

RP113

14
23

56_0404_4P2R_5%

RP115

14
23

56_0404_4P2R_5%

RP117

14
23

56_0404_4P2R_5%

RP119

14
23

56_0404_4P2R_5%

RP122

14
23

56_0404_4P2R_5%

RP124

DDRB_SDQ54

14
23

56_0404_4P2R_5%

RP128

14

DDRB_SDM7

23

56_0404_4P2R_5%

RP130

14
23

56_0404_4P2R_5%

DDRB_SDQ2
DDRB_SDQ6

DDRB_SDM0
DDRB_SDQ1

DDRB_SDQ3
DDRB_SDQ13

DDRB_SDQ11
DDRB_SDM1

DDRB_SDQ15
DDRB_SDQ8

DDRB_SDQ19
DDRB_SDQ16

DDRB_SDM2
DDRB_SDQ18

DDRB_SDQ23
DDRB_SDQ28

DDRB_SDQ29
DDRB_SDM3

DDRB_SDQ27
DDRB_SDQ31

DDRB_SDQ32
DDRB_SDQ36

DDRB_SDM4
DDRB_SDQ39

DDRB_SDQ35
DDRB_SDQ46

DDRB_SDQ45
DDRB_SDM5

DDRB_SDQ41
DDRB_SDQ47

DDRB_SDQ48
DDRB_SDQ53

DDRB_SDM6
DDRB_SDQ51

DDRB_SDQ62

DDRB_SDQ61

DDRB_SDQ59
DDRB_SDQ63

2

+1.25VS+1.25VS

RP32

DDRB_CKE1

14

DDRB_CKE0

23

56_0404_4P2R_5%

RP33

DDRB_SMA9

14

DDRB_SMA12

23

56_0404_4P2R_5%

RP35

DDRB_SMA5

14

DDRB_SMA7

23

56_0404_4P2R_5%

RP38

DDRB_SMA1

14

DDRB_SMA3

23

56_0404_4P2R_5%

RP40

DDRB_SBS0

14

DDRB_SMA10

23

56_0404_4P2R_5%

RP42

DDRB_SCS#0

14

DDRB_SWE#

23

56_0404_4P2R_5%

RP99

DDRB_SMA11

14

DDRB_SMA8

23

56_0404_4P2R_5%

RP101

DDRB_SMA6

14

DDRB_SMA4

23

56_0404_4P2R_5%

RP105

DDRB_SBS1

14

DDRB_SRAS#

23

56_0404_4P2R_5%

RP107

DDRB_SCAS#

14

DDRB_SCS#1

23

56_0404_4P2R_5%

RP103

DDRB_SMA2

14

DDRB_SMA0

56_0404_4P2R_5%

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

2

23

+1.25VS

0.1U_0402_10V6K

C594

C263

C616

4.7U_1206_16V6K

C704

1

C163

2

0.1U_0402_10V6K

1

C279

2

0.1U_0402_10V6K

1

C746

2

0.1U_0402_10V6K

1

C622

2

0.1U_0402_10V6K

0.1U_0402_10V6K

4.7U_1206_16V6K

1

2

+1.25VS

1

2

+1.25VS

1

2

+1.25VS

1

2

Decoupling Reference Document:
Springdale Customer Schematic R1.2 page26
each Channel(two DIMMs) requirement 4.7u*2 ; 0.1uF*26

DDRB_CKE1 9,13
DDRB_CKE0 9,13

DDRB_SBS0 9,13

DDRB_SCS#0 9,13

DDRB_SWE# 9,13

DDRB_SBS1 9,13

DDRB_SRAS# 9,13

DDRB_SCAS# 9,13

DDRB_SCS#1 9,13

1

C111

2

0.1U_0402_10V6K

1

C294

2

0.1U_0402_10V6K

1

C628

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C655

2

Title

Size Document Number Rev

Custom

Date: Sheet of

1

DDRB_SDQ[0..63]9,13
DDRB_SDQS[0..7]9,13
DDRB_SMA[0..12]9,13
DDRB_SDM[0..7]9,13

1

C187

2

1

C313

2

1

C632

2

1

C716

2

0.1U_0402_10V6K

1

C202

2

0.1U_0402_10V6K

1

C322

2

0.1U_0402_10V6K

1

C671

2

1

C740

2

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C221

2

0.1U_0402_10V6K

1

C343

2

0.1U_0402_10V6K

1

C677

2

1

C348

2

1

C639

2

1

C608

2

1

C682

2

DDR Termination Resistors

LA-1911

1

DDRB_SDQ[0..63]
DDRB_SDQS[0..7]
DDRB_SMA[0..12]
DDRB_SDM[0..7]

0.2

14 57Friday, August 08, 2003

5

4

3

2

1

SEL0 SEL1 CPU 3V66[0..3] REF0 REF1 SRC USB/Dot

0 0 100 66 14.3 14.3 100/200

0 MID REF REF REF REF REF

D D

0 1 200

66 14.3 100/200 48

1 0 133 66 14.3

1 1 166

66 14.3

14.3

14.3

14.3

100/200

100/2004848

1 MID Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z

CLK_ICH_14M24
CLK_14M_SIO34

C C

+3VS

12

R153
1K_0603_1%

B B

12

R145
2K_0603_1%

12

R152

2.49K_0603_1%

A A

12

R181
1K_0603_1%

CLKSEL0
CLKSEL1

12

R180
2K_0603_1%

12

R179

2.49K_0603_1%

R137 @0_0402_5%
R138 0_0402_5%12
R182 0_0402_5%12
R175 @0_0402_5%

12

12

MCH_CLKSEL0 7
MCH_CLKSEL1 7

Check SPEC (250mA,300 ohm)

CPU_CLKSEL0 5
CPU_CLKSEL1 5

+3VS

48

REF

R196 33_0402_5%
R197 33_0402_5%

+3VS

CLK_ICH_48M24

L16
BLM11A601S_0603

1 2

12

C277

@10P_0402_50V8K

C278

@10P_0402_50V8K

12

Place crystal within
500 mils of CK409

R214 1K_0402_5%
R139 1K_0402_5%1 2
R148 1K_0402_5%

12
12

12

X2

14.31818MHz_20P_1BX14318CC1A~L

1 2
1 2

CK409_PWRGD#40

ICH_SMB_CLK12,13,23
ICH_SMB_DATA12,13,23

R161 33_0402_5%

CLK_VDD_PLL

1

C230
10U_1206_6.3V7K

2

L19

1 2

BLM21A601SPT_0805

L17

1 2

BLM21A601SPT_0805

CLKREF1
CLKREF0

CLK_XTAL_IN

CLK_XTAL_OUT

SLP_S1#
STPPCI#
STPCPU#

CLK_VTT_PG#

CK_SCLK
CK_SDATA

CLK48M_OUT0

12

1 2

R164 475_0603_1%

1

C239

0.1U_0402_16V4Z

2

1

2

CLKSEL0
CLKSEL1

C232
10U_1206_6.3V7K

CLK_VDD_PLL

1
2

4

5

51
56

49
50

35

28
30

37

38

31

32

52

55

54

+3VS_CLK+3VS

U11

3

REF_0
REF_1

XTAL_IN

XTAL_OUT

SEL0
SEL1

PWRDWN#
PCI_STP#
CPU_STP#

VTT_PWRGD#

SCLK
SDATA

SRCLKN_100MHZ

SRCLKP_100MHZ

USB_48MHZ

DOT_48MHZ

IREF

VDD_PLL

VSS_PLL

101624

VDD_PCI

VDD_PCI

VDD_REF

VDD_3V66

CK409

VSS_REF

VSS_PCI

VSS_PCI

6

11

172125

34

36

VDD_48

VDD_SRC

48/66MHZ_OUT/3V66_4

66MHZ_OUT3/3V66_3
66MHZ_OUT2/3V66_2
66MHZ_OUT1/3V66_1
66MHZ_OUT0/3V66_0

VSS_3V66

VSS_48

VSS_SRC

33

39

Place near each pin
W>40 mil

1

C272

0.1U_0402_10V6K

2

424548

VSS_CPU

VDD_CPU

VDD_CPU

CPUCLKT2

CPU_CLKC2

CPUCLKT1

CPUCLKC1
CPUCLKT0

CPUCLKC0

PCICLK_F2
PCICLK_F1
PCICLK_F0

PCICLK6
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK0

VSS_IREF

ICS952623BG_TSSOP56

53

1

C273

0.1U_0402_10V6K

2

1

C210

0.1U_0402_10V6K

2

CLK_CPU2

47

CLK_CPU2#

46

CLK_CPU1

44

CLK_CPU1#

43

CLK_CPU0

41

CLK_CPU0#

40
29

CLK66M_OUT3

27
26

CLK66M_OUT1

23

CLK66M_OUT0

22

PCICLK_F2

9
8
7

PCICLK6

20

PCICLK5

19

PCICLK4

18

PCICLK3

15

PCICLK2

14

PCICLK1

13
12

1

C274

0.1U_0402_10V6K

2

1

C261

0.1U_0402_16V4Z

2

1 2

R155 33_0402_5%

1 2

R156 33_0402_5%

1 2

R157 33_0402_5%

1 2

R158 33_0402_5%

1 2

R159 33_0402_5%

1 2

R160 33_0402_5%

1 2

R191 33_0402_5%

1 2

R208 33_0402_5%

1 2

R202 33_0402_5%

1 2

R198 33_0402_5%

1 2

R207 33_0402_5%

1 2

R201 33_0402_5%

1 2

R206 33_0402_5%

1 2

R200 33_0402_5%

1 2

R205 33_0402_5%

1 2

R199 33_0402_5%

1 2

1 2

1 2

1 2

1 2

Trace wide=40 mils

1

C275

0.1U_0402_10V6K

2

R13049.9_0402_1%

R13149.9_0402_1%

R13249.9_0402_1%

R13349.9_0402_1%

R13449.9_0402_1%

1 2

R13549.9_0402_1%

1

C212

0.1U_0402_10V6K

2

1

C211

0.1U_0402_10V6K

2

The host clocks to
the Processor must be
165 mil longer than the
host clocks to the GMCH

CLK_HCLK

CLK_HCLK#
CLK_IT P

CLK_ITP#
CLK_BCLK

CLK_HCLK 7

CLK_HCLK# 7
CLK_IT P 5

CLK_ITP# 5
CLK_BCLK 4

Place near CK409

CLK_BCLK#

CLK_AGP_66M 16

CLK_MCH_66M 10
CLK_ICH_66M 23
CLK_PCI_ICH 23

CLK_PCI_MINI 29
CLK_PCI_CB 27
CLK_PCI_LPC 37
CLK_PCI_1394 30
CLK_PCI_LAN 26
CLK_PCI_SIO 34

CLK_BCLK# 4

1

C215

0.1U_0402_10V6K

2

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Clock Generator

LA-1911

0.2

15 57Friday, August 08, 2003

1

5

+3VS+3VS

Place close
to pin
D+ & D-

@2200P_0402_50V7K

1

C419

+3VS

D D

R591 @10K_0402_5%
R592 @10K_0402_5%

AGP_AD[0..31]10

AGP_SBA[0..7]10

AGP_C/BE#[0..3]10

AGP_ST[0..2]10

+3VS

C C

B B

R354
10K_0402_5%

1 2
1 2

R361 10K_0402_5%

0.1U_0402_10V6K

12

C434

Selection Table For W180

Modulation
Setting

NV_THERMDA

2

NV_THERMDC

I2CC_SCL

12

I2CC_SDA

12

12

C451

4.7U_0805_10V4Z

R405 220K_0402_5%
R387 220K_0402_5%

SST
Ratio

AGP_AD[0..31]

AGP_SBA[0..7]

AGP_C/BE#[0..3]

AGP_ST[0..2]

STP_AGP#
AGP_BUSY#

4.7U_0805_10V4Z

1 2
1 2

SS%

1

8

1.25%

3.75%

+SVDD

U27

X1/CLK

FS2

5

0
1

XTALOUTBUFF

+3VS

R319
1K_0402_5%

1 2
1 2

A A

R315
1K_0402_5%

U28

2

D+

3

D-

8

SCLK

7

SDATA

@ADM1032ARM_RM8

PCIRST#10,22,23,26,27,29,30,33,34,37

+SVDD

12

C461

PLACE COLSE TO VGA

6

Pin AJ5, AJ7,

VDD

5

CLKOUT

GND

3

R11

27

X2FS1

SPREAD_RATE

4

SS%

W180-01GT_SO8

VDD1

ALERT#

THERM#

GND

L30

1 2

FCM2012C-800_0805

12

C441

0.1U_0402_10V6K

AGP_AD_STBS0
AGP_AD_STBS1

Close VGA ball (AK29)
less than 250mils-->350mV

+AGP_VREF

1 2

22_0402_5%

R346
10K_0402_5%

1 2

1

NV_THERCT L#

6
4
5

PCIRST#

R601 10_0402_5%

+3VS

XTALSSIN

1 2

R350
@1K_0402_5%

@2.2K_0402_5%

@10P_0402_50V8K

1 2

1

2

12

R362

@0.1U_0402_16V4Z

C479

1 2

CLK_AGP_66M15

C569

0.1U_0402_10V6K

+3VS

+SVDD

4

12

R310
@2.2K_0402_5%

+3VS

1

C462

2

R369

1 2

@10_0402_5%

AGP_REQ#10
AGP_GNT#10

AGP_PAR10

AGP_STOP#10

AGP_DEVSEL#10

AGP_TRDY#10

AGP_IRDY#10

AGP_FRAME#10

PCI_PIRQA#23,27

AGP_WBF#10

AGP_RBF#10
AGP_DBIHI10
AGP_DBILO10

AGP_SB_STBF10

AGP_SB_STBS10
AGP_AD_STBF010
AGP_AD_STBS010
AGP_AD_STBF110
AGP_AD_STBS110

R377 10K_0402_5%

CRMA22

LUMA22

COMPS22

1 2

R299 63.4_0603_1%

R318 10K_0402_5%

12

4

AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31

AGP_C/BE#0
AGP_C/BE#1
AGP_C/BE#2
AGP_C/BE#3

CLK_AGP_66M
AGP_REQ#

AGP_GNT#
AGP_PAR
AGP_STOP#
AGP_DEVSEL#
AGP_TRDY#
AGP_IRDY#
AGP_FRAME#
PCI_PIRQA#

AGP_WBF#
AGP_RBF#

AGP_SB_STBF
AGP_SB_STBS
AGP_AD_STBF0
AGP_AD_STBS0
AGP_AD_STBF1
AGP_AD_STBS1

AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7
AGP_ST0
AGP_ST1
AGP_ST2

+AGP_REF

12

AGP_BUSY#
STP_AGP#

CRMA
LUMA

COMPS
DACB_HSYNC
DACB_VSYNC
DACB_RSET

XTALIN
XTALOUT

XTALSSIN
XTALOUTBUFF
NV_THERMDA
NV_THERMDC

PROPRIETARY NOTE

DAC2

SSC

CLK

3

3

FPBCLKOUT#

FPBCLKOUT

DVOHSYNC
DVOVSYNC

DVOCLKOUT

DVOCLKOUT#

ZV PORT / EXT TMDS / GPIO / ROMLVDSTMDS

IFPATXDO#

IFPATXD1#
IFPATXD2#
IFPATXD3#

IFPBTXD4#
IFPBTXD5#
IFPBTXD6#
IFPBTXD7#

DACA_RED

DACA_GREEN

DACA_BLUE
DACA_HSYNC
DACA_VSYNC

DACA_RSET

DAC1

SWAPRDY_A
DACA_IDUMP

IFPCTXD0#
IFPCTXD1#
IFPCTXD2#

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9

ROMA14
ROMA15

ROMCS#

VIPPCLK
VIPHCTL
VIPHCLK

VIPHAD0
VIPHAD1

VIPD0
VIPD1
VIPD2
VIPD3
VIPD4
VIPD5
VIPD6
VIPD7

DVOD0
DVOD1
DVOD2
DVOD3
DVOD4
DVOD5
DVOD6
DVOD7
DVOD8

DVOD9
DVOD10
DVOD11

DVODE

I2CC_SCL

I2CC_SDA

BUFRST#

DVOCLKIN

STRAP0
STRAP1
STRAP2
STRAP3

IFPATXDO

IFPATXD1
IFPATXD2
IFPATXD3

IFPATXC#

IFPATXC
IFPBTXD4
IFPBTXD5
IFPBTXD6
IFPBTXD7

IFPBTXC#

IFPBTXC

I2CA_SCL

I2CA_SDA

IFPCTXD0
IFPCTXD1
IFPCTXD2

IFPCTXC#

IFPCTXC

VGA_GPIO0 SPREAD_RATE

G5
F4
G4
H5
H4
J4
J5
J6
K4
K6

M2
M3

R2
R1
AF2

L4
M4
M5

P3
P2

J3
J2
K2
K1
L3
L2
N2
N1

AG2
AH1
AG3
AJ1
AH2
AK1
AJ3
AK3
AH4
AK4
AJ4
AH5

AD5
AD6
AE4
AJ2
AK2
AG6
AG7
B1
AG1

G1
G2
F2
F3

T4
U4
AA1
Y2
W3
V3
V4
U5
V1
W2
V5
W4
AB2
AB3
W6
Y6
AC2
AC3
Y3
AA2

AK10
AJ10
AJ9

DACA_HSYNC

AH9

DACA_VSYNC

AJ8
AG8
AG5

AF7
AF9
AG10

T2
R3
T3
U2
V2
U3
P4
P5

ENBKL
ENVDD

VAG_GPIO6
POWER_SEL
NV_THERCT L#

TXOUT 0­TXOUT0+
TXOUT 1­TXOUT1+
TXOUT 2­TXOUT2+

TXCLK­TXCLK+
TZOUT0­TZOUT0+
TZOUT1­TZOUT1+
TZOUT2­TZOUT2+

TZCLK­TZCLK+

DACA_RSET

DDC_CLK
DDC_DATA

ROMA14
ROMA15

VIPHCT L

VIPD2
VIPD3
VIPD4
VIPD5
VIPD6
VIPD7

DVOD2
DVOD3

DVOD8
DVOD9

DVO_HSYNC

I2CC_SCL
I2CC_SDA

STRAP0
STRAP1
STRAP2
STRAP3

TXOUT 3­TXOUT3+

TZOUT3­TZOUT3+

R
G
B

R351 10K_0402_5%

SWAPRDY_A
NV31,NV34 use.
NV18 not use.

12

R363 0_0402_5%

ENVDD 22

R326 10K_0402_5%

TXOUT 0- 22
TXOUT0+ 22
TXOUT 1- 22
TXOUT1+ 22
TXOUT 2- 22
TXOUT2+ 22
TXOUT 3- 22
TXOUT3+ 22
TXCLK- 22
TXCLK+ 22
TZOUT0- 22
TZOUT0+ 22
TZOUT1- 22
TZOUT1+ 22
TZOUT2- 22
TZOUT2+ 22
TZOUT3- 22
TZOUT3+ 22
TZCLK- 22
TZCLK+ 22

R 22
G 22
B 22
DACA_HSYNC 22
DACA_VSYNC 22

1 2

R370 130_0603_1%

DDC_CLK 22
DDC_DATA 22

12

U1A

AJ28

AD0

AK28

AD1

AH27

AD2

AK27

AD3

AJ27

AD4

AH26

AD5

AJ26

AD6

AH25

AD7

AH23

AD8

AJ23

AD9

AH22

AD10

AJ22

AD11

AJ21

AD12

AK21

AD13

AH20

AD14

AJ20

AD15

AG26

AD16

AE24

AD17

AG25

AD18

AG24

AD19

AF24

AD20

AG23

AD21

AE22

AD22

AF22

AD23

AE21

AD24

AG20

AD25

AG19

AD26

AF19

AD27

AE19

AD28

AF18

AD29

AG18

AD30

AE18

AD31

AJ24

C/BE#0

AH19

C/BE#1

AF25

C/BE#2

AG22

C/BE#3

AG12

PCICLK

AF15

PCIRST#

AF13

PCIREQ#

AE15

PCIGNT#

AK18

PCIPAR

AH17

PCISTOP#

AJ16

PCIDEVSEL#

AJ17

PCITRDY#

AG16

PCIIRDY#

AK16

PCIFRAME#

AG15

PCIINTA#

AE10

NC

AG17

AGPWBF#

AG14

AGPRBF#

AJ18

AGPPIPE/ DBI_HI

AJ19

NC/ DBI_LO

AK13

AGPSB_STB/ ADSTBF

AJ13

AGPSB_STB#/ ADSTBS

AK24

AGPADSTB0/ ADSTBF0

AJ25

AGPADSTB0#/ADSTBS0

AG21

AGPADSTB1/ ADSTBF1

AF21

AGPADSTB1#/ADSTBS1

AJ11

AGPSBA0

AH11

AGPSBA1

AJ12

AGPSBA2

AH12

AGPSBA3

AJ14

AGPSBA4

AH14

AGPSBA5

AJ15

AGPSBA6

AH15

AGPSBA7

AG13

AGPST0

AE16

AGPST1

AE13

AGPST2

AK29

AGPVREF

AF16

NC/AGPMBDET#

AF12

AGP_BUSY#

AG11

STP_AGP#

AE2

DACB_RED/CHROMA

AD2

DACB_GREEN/LUMA

AD1

DACB_BLUE/COMPOSITE

AF3

DACB_HSYNC

AE3

DACB_VSYNC

AD3

DACB_RSET

AE7

I2CB_SCL

AF6

I2CB_SDA

AD4

SWAPRDY_B

Y5

STEREO

AC4

DACB_IDUMP

AJ6

XTALIN

AH6

XTALOUT

AJ7

XTALSSIN

AJ5

XTALOUTBUFF

H2

THERMDA

H3

THERMDC

C2

JTAG[0]

C1

JTAG[1]

D1

JTAG[2]

E2

JTAG[3]

D2

JTAG[4]

NV34M_EPBGA701

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

nVIDIA
NV31/34

PCI/AGP

AGP4X/8X

2

12

R339 10K_0402_5%

1 2

R331 10K_0402_5%

12

R308

10K_0402_5%

+3VS

(SUS_STAT#)

12

PCI_AD_SWAP: 0-RVSERSED 1-NORMAL

1

SUB_VENDOR: 0-SYSTEM BIOS 1-ADAPTER BIOS

2

R311 10K_0402_5%12

RAM_CFG[3:0]

3

Low

High

Low

High

Low

High

Low

High

Low

High

2

(1101 = 4Mx32 DDR, DQS per byte)

R301 @10K_0402_5%12

NV18M

0

R300 @10K_0402_5%12

NV31M:NV34M

4

R323 @10K_0402_5%12

NV18M

1

R306 10K_0402_5%12

NV31M:NV34M

5

R353 @10K_0402_5%

2

R371 @10K_0402_5%

3

CRYSTAL: (10)-27MHz

6

R302 10K_0402_5%

0
1

TVMODE: (01)-NTSC

7

0

R305 10K_0402_5%

1

AGP8X/4X: (0)-8X / (1)-4X

8

R317 10K_0402_5%

AGP_SIDEBAND: (0)-ENABLE

9

R314 10K_0402_5%

AGP_FASTWRITE: (0)-ENABLE

10

R321 10K_0402_5%

PCI_DEVID[3:0]

11

R313 10K_0402_5%

0

R312 10K_0402_5%

1

R303 @10K_0402_5%

2

R333 10K_0402_5%

3

BUS_TYPE: (1)-AGP

12

ROM TYPE: (00)-PARALLEL

R309 10K_0402_5%

0

R304 10K_0402_5%

1

1

ENBKL 37

POWER_SEL 50

12
12

12

12

12

12

12

+3VS

12
12

12

12

12

12

12

1 2

R356 10K_0402_5%

+3VS

STRAP0

STRAP1

STRAP2
DVOD2

STRAP3
DVOD3

DACA_VSYNC
DACA_HSYNC

VIPD2
VIPD6

DACB_VSYNC
DACB_HSYNC

DVOD9

VIPD7

DVOD8

1010-NV31M

R292 10K_0402_5%12

R291 @10K_0402_5%12
R285 10K_0402_5%12

R290 @10K_0402_5%12
R286 @10K_0402_5%12

R360 10K_0402_5%
R367 10K_0402_5%

R297 10K_0402_5%

R284 10K_0402_5%

R322 @10K_0402_5%

R296 @10K_0402_5%

R330 @10K_0402_5%

0100-NV34M

1101-NV33M 0101-NV34M-U

12
12
12
12

12
12

XTALIN

1

C27
22P_0402_50V8J

2

Title

Size Document Number Rev

VIPD4
VIPD5
VIPD3

DVO_HSYNC

VIPHCT L

ROMA14
ROMA15

Y1

**

4

GNDINOUT

1

27MHz_16PF_6P27000019

1 2

R8 @2M_0402_5%

Compal Electronics, Inc.
nVIDIA NV34M (AGP BUS)

R295 @10K_0402_5%
R294 @10K_0402_5%
R293 10K_0402_5%
R341 @10K_0402_5%

R352 10K_0402_5%12

R283 @10K_0402_5%
R282 @10K_0402_5%

XTALOUT

3
2

GND

C9

22P_0402_50V8J

12
12
12
12

12
12

1

2

LA-1911

Date: Sheet of

16 57Friday, August 08, 2003

1

+3VS

0.2

5

4

3

2

1

NDQMA[0..7]20

NDQSA[0..7]20

D D

C C

B B

NMAA[0..11]20
NMDA[0..63]20

NDQMA[0..7]
NDQSA[0..7]
NMAA[0..11]
NMDA[0..63]

NMDA0
NMDA1
NMDA2
NMDA3
NMDA4
NMDA5
NMDA6
NMDA7
NMDA8
NMDA9
NMDA10
NMDA11
NMDA12
NMDA13
NMDA14
NMDA15
NMDA16
NMDA17
NMDA18
NMDA19
NMDA20
NMDA21
NMDA22
NMDA23
NMDA24
NMDA25
NMDA26
NMDA27
NMDA28
NMDA29
NMDA30
NMDA31
NMDA32
NMDA33
NMDA34
NMDA35
NMDA36
NMDA37
NMDA38
NMDA39
NMDA40
NMDA41
NMDA42
NMDA43
NMDA44
NMDA45
NMDA46
NMDA47
NMDA48
NMDA49
NMDA50
NMDA51
NMDA52
NMDA53
NMDA54
NMDA55
NMDA56
NMDA57
NMDA58
NMDA59
NMDA60
NMDA61
NMDA62
NMDA63

U1B

N25

FBAD0

N27

FBAD1

N26

FBAD2

M25

FBAD3

K26

FBAD4

K27

FBAD5

J27

FBAD6

H27

FBAD7

N29

FBAD8

M29

FBAD9

M28

FBAD10

L29

FBAD11

J29

FBAD12

J28

FBAD13

H29

FBAD14

G30

FBAD15

K25

FBAD16

J26

FBAD17

J25

FBAD18

G26

FBAD19

F28

FBAD20

F26

FBAD21

E27

FBAD22

D27

FBAD23

H28

FBAD24

G29

FBAD25

F29

FBAD26

E29

FBAD27

C30

FBAD28

C29

FBAD29

B30

FBAD30

A30

FBAD31

AJ29

FBAD32

AJ30

FBAD33

AH29

FBAD34

AH30

FBAD35

AF29

FBAD36

AE29

FBAD37

AD29

FBAD38

AC28

FBAD39

AG28

FBAD40

AF27

FBAD41

AE26

FBAD42

AE28

FBAD43

AD25

FBAD44

AB25

FBAD45

AB26

FBAD46

AA25

FBAD47

AD30

FBAD48

AC29

FBAD49

AB28

FBAD50

AB29

FBAD51

Y29

FBAD52

W28

FBAD53

W29

FBAD54

V29

FBAD55

AC27

FBAD56

AB27

FBAD57

AA27

FBAD58

AA26

FBAD59

W25

FBAD60

V26

FBAD61

V27

FBAD62

V25

FBAD63

NV34M_EPBGA701

FBAA0
FBAA1
FBAA2
FBAA3
FBAA4
FBAA5
FBAA6
FBAA7
FBAA8

FBAA9
FBAA10
FBAA11
FBAA12

FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7

FBADQS0
FBADQS1
FBADQS2
FBADQS3
FBADQS4
FBADQS5
FBADQS6
FBADQS7

FBARAS#

MEMORY

INTERFACE A

FBACAS#

FBAWE#
FBACS0#
FBACS1#

FBACKE

FBACLK0

FBACLK0#

FBACLK1

FBACLK1#

FBABA0
FBABA1

FB_VREF

NDQMB[0..7]21

NDQSB[0..7]21

NMAB[0..11]21

NMDB[0..63]21

NMAA0

V30

NMAA1

U28

NMAA2

U29

NMAA3

T28

NMAA4

T29

NMAA5

T27

NMAA6

T30

NMAA7

T26

NMAA8

T25

NMAA9

R27

NMAA10

R25

NMAA11

R30
U24

L27
K29
G25
E28
AF28
AD27
AA30
Y27

M27
K30
G27
D30
AG30
AD26
AA29
W27

P28
P29
R28
U27
P27
N30
U21

V21
N21

P21

R26
R29

C28

NDQMA0
NDQMA1
NDQMA2
NDQMA3
NDQMA4
NDQMA5
NDQMA6
NDQMA7

NDQSA1
NDQSA2
NDQSA3
NDQSA4
NDQSA5
NDQSA6
NDQSA7

NMRASA#
NMCASA#
NMWEA#
NMCSA0#

NMCKEA
NMCLKA0

NMCLKA0#
NMCLKA1 NMCLKB1#

NMCLKA1#

NMA_BA0
NMA_BA1

A_REF

(10 mil)

NMRASA# 20
NMCASA# 20
NMWEA# 20
NMCSA0# 20

NMCKEA 20

NMA_BA0 20
NMA_BA1 20

1

C563

0.1U_0402_10V6K

2

+2.5VS

12

12

12

R390
@120_0402_5%

12

R389
@120_0402_5%

R396
1K_0402_1%

R388
1K_0402_1%

NDQMB[0..7]
NDQSB[0..7]
NMAB[0..11]
NMDB[0..63]

NMCLKA0 20

NMCLKA0# 20
NMCLKA1 20

NMCLKA1# 20

NMDB0
NMDB1
NMDB2
NMDB3
NMDB4
NMDB5
NMDB6
NMDB7
NMDB8
NMDB9
NMDB10
NMDB11
NMDB12
NMDB13
NMDB14
NMDB15
NMDB16
NMDB17
NMDB18
NMDB19
NMDB20
NMDB21
NMDB22
NMDB23
NMDB24
NMDB25
NMDB26
NMDB27
NMDB28NDQSA0
NMDB29
NMDB30
NMDB31
NMDB32
NMDB33
NMDB34
NMDB35
NMDB36
NMDB37
NMDB38
NMDB39
NMDB40
NMDB41
NMDB42
NMDB43
NMDB44
NMDB45
NMDB46
NMDB47
NMDB48
NMDB49
NMDB50
NMDB51
NMDB52
NMDB53
NMDB54
NMDB55
NMDB56
NMDB57
NMDB58
NMDB59
NMDB60
NMDB61
NMDB62
NMDB63

U1C

F13

FBCD0

D13

FBCD1

E13

FBCD2

F12

FBCD3

E10

FBCD4

D10

FBCD5

D9

FBCD6

D8

FBCD7

B13

FBCD8

B12

FBCD9

C12

FBCD10

B11

FBCD11

B9

FBCD12

C9

FBCD13

B8

FBCD14

A7

FBCD15

F10

FBCD16

E9

FBCD17

F9

FBCD18

F7

FBCD19

C6

FBCD20

E6

FBCD21

D5

FBCD22

C4

FBCD23

C8

FBCD24

B7

FBCD25

B6

FBCD26

B5

FBCD27

A3

FBCD28

B3

FBCD29

A2

FBCD30

B2

FBCD31

B29

FBCD32

A29

FBCD33

B28

FBCD34

A28

FBCD35

B26

FBCD36

B25

FBCD37

B24

FBCD38

C23

FBCD39

E26

FBCD40

D26

FBCD41

E25

FBCD42

C25

FBCD43

E24

FBCD44

F22

FBCD45

E22

FBCD46

F21

FBCD47

A24

FBCD48

B23

FBCD49

C22

FBCD50

B22

FBCD51

B20

FBCD52

C19

FBCD53

B19

FBCD54

B18

FBCD55

D23

FBCD56

D22

FBCD57

D21

FBCD58

E21

FBCD59

F19

FBCD60

E18

FBCD61

D18

FBCD62

F18

FBCD63

NV34M_EPBGA701

FBCA0
FBCA1
FBCA2
FBCA3
FBCA4
FBCA5
FBCA6
FBCA7
FBCA8

FBCA9
FBCA10
FBCA11
FBCA12

FBCDQM0
FBCDQM1
FBCDQM2
FBCDQM3
FBCDQM4
FBCDQM5
FBCDQM6
FBCDQM7

FBCDQS0
FBCDQS1
FBCDQS2
FBCDQS3
FBCDQS4
FBCDQS5
FBCDQS6
FBCDQS7

FBCRAS#
FBCCAS#

MEMORY INTERFACE

B

FBCWE#
FBCCS0#
FBCCS1#

FBCCKE

FBCCLK0

FBCCLK0#

FBCCLK1

FBCCLK1#

FBCBA0
FBCBA1

C17
B17
C16
B16
D16
A16
E16
F16
D15
F15
A15
G17

D11
B10
D7
C5
C26
F24
B21
D20

D12
A10
E7
A4
A27
D24
A21
D19

C14
B14
C15
D17
D14
A13
K18

K17

K13
K14

E15
B15

NMAB1
NMAB2
NMAB3
NMAB4
NMAB5
NMAB6
NMAB7
NMAB8
NMAB9
NMAB10
NMAB11

NDQMB0
NDQMB1
NDQMB2
NDQMB3
NDQMB4
NDQMB5
NDQMB6
NDQMB7

NDQSB0
NDQSB1
NDQSB2
NDQSB3
NDQSB4
NDQSB5
NDQSB6
NDQSB7

NMRASB#
NMCASB#
NMWEB#
NMCSB0#

NMCKEB
NMCLKB0

NMCLKB0#

NMCLKB1

NMB_BA0
NMB_BA1

NMAB0

A18

NMRASB# 21
NMCASB# 21
NMWEB# 21
NMCSB0# 21

NMCKEB 21

NMB_BA0 21
NMB_BA1 21

12

R381
@120_0402_5%

12

R372
@120_0402_5%

NMCLKB0 21

NMCLKB0# 21

NMCLKB1 21

NMCLKB1# 21

1 2

R417 10K_0402_5%

1 2

A A

R368 10K_0402_5%

NMCKEA

NMCKEB

32M VRAM-->Channel A only-->2 sets
64M VRAM-->Channel A and B-->4 sets

5

4

Title

Size Document Number Rev

3

2

Date: Sheet of

Compal Electronics, Inc.

nVIDIA NV34M (DDR)

LA-1911

17 57Friday, August 08, 2003

1

0.2

5

4

3

2

1

U1D

AA4
V6

U10
V10

T5
T6

Y4
W5

AA3
R4

P10
N10

R5
R6

L6
L7
M7

P6
P7

AD8
AD9
AE8

AB6
AB7
AF4

AE5
G24

AB4
AB5

AG9
AH8

F5
E4
D3
E3

C27
AK7

B4
B27
C11
C20
D6
D25
D29
E12
E19
F27
L28
M26
N5
W7
W26
Y7

IFPABVPROB E
IFPABRSET

+IFPABPLLVDD

+IFPABIOVDD

IFPCVPROBE

+IFPCPLLVDD

+IFPCIOVDD

VIPCAL_1
VIPCAL_2

DVOCAL_1
DVOCAL_2

+FB_DLLVDD
+PLLVDD

NV31 use only.
NV18,NV33,NV34 not use.

R335 10K_0402_5%1 2
R404 10K_0402_5%1 2

+DACA/BVDD
DACAVREF

DACBVREF

12

12

AD11

AGPVDDQ

AD14

AGPVDDQ

AD17

AGPVDDQ

AD20

AGPVDDQ

AD23

AGPVDDQ

AE11

AGPVDDQ

AE14

AGPVDDQ

AE17

AGPVDDQ

AE20

AGPVDDQ

AE23

AGPVDDQ

L11

VDD

L13

VDD

L14

VDD

L17

VDD

L18

VDD

L20

VDD

N6

VDD

N11

VDD

N20

VDD

P11

VDD

P20

VDD

U11

VDD

U20

VDD

V11

VDD

V20

VDD

Y11

VDD

Y13

VDD

Y14

VDD

Y17

VDD

Y18

VDD

Y20

VDD

AA17

VDD

AA18

VDD

G14

VDD33

H6

VDD33

H7

VDD33

M6

VDD33

P24

VDD33

U6

VDD33

U7

VDD33

AC6

VDD33

AC7

VDD33

AD12

VDD33

AD15

VDD33

AD19

VDD33

AD22

VDD33

AD16

VDD33

N4

VD50CLAMP0

AE9

VD50CLAMP1

AA13

AGPCALPD_VDDQ

AA14

AGPCALPU_GND

AE12

AGP_PLLVDD

F8

FBVDDQ

F11

FBVDDQ

F14

FBVDDQ

F17

FBVDDQ

F20

FBVDDQ

F23

FBVDDQ

G8

FBVDDQ

G11

FBVDDQ

G20

FBVDDQ

G23

FBVDDQ

H24

FBVDDQ

H25

FBVDDQ

L24

FBVDDQ

L25

FBVDDQ

P25

FBVDDQ

U25

FBVDDQ

Y24

FBVDDQ

Y25

FBVDDQ

AC24

FBVDDQ

AC25

FBVDDQ

AA6

NC

AC5

NC

AF10

NC

AG29

NC

AE27

NC

G9

NC

Y28

NC

NV34M_EPBGA701

IFPABVPROBE

IFPABRSET

IFPABPLLVDD
IFPABPLLGND

IFPAIOVDD
IFPAIOGND

IFPBIOVDD
IFPBIOGND

IFPCVPROBE

IFPCRSET

IFPCPLLVDD
IFPCPLLGND

IFPCIOVDD
IFPCIOGND

VIPVDDQ
VIPVDDQ
VIPVDDQ

VIPCAL_PD_VDDQ

VIPCAL_PU_GND

DVOVDDQ
DVOVDDQ
DVOVDDQ

DVOCAL_PD_VDDQ

DVOCAL_PU_GND

DVO_VREF

TESTMODE

TESTMECLK

I/O

POWER

DACB_VDD

DACB_VREF

DACA_VDD

DACA_VREF

FBCAL_PD_VDDQ

FBCAL_PU_GND

FBCAL_TERM_GND

FBCAL_CLK_GND

FB_DLLVDD

PLLVDD

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

+1.5VS

D D

+VGA_CORE

R614

0_0402_5%

C C

+3VS

R615

0_0402_5%

+1.5VS

R373 49.9_0402_1%

R378 49.9_0402_1%

B B

FBCAL_PD_VDDQ
NV31,NV33,NV34 use.
NV18 not use.

FBCAL_PUK_GND
NV31,NV33,NV34 use.
NV18 not use.

FBCAL_TERM_GND
NV31 use (tie to GND).
NV18,NV33,NV34 not use.

FBCAL_CLK_GND
NV31 use.
NV18,NV33,NV34 not use.

A A

12
12

+5VS

AGPCALPD_VDDQ
AGPCALPU_GND
+AGP_PLLVDD

+2.5VS

C424 0.1U_0402_10V6K

1 2

1 2

R324 1K_0402_5%

C423 0.1U_0402_10V6K

1 2

1 2

R320 1K_0402_5%

1 2

R364 10K_0402_5%

1 2

R332 10K_0402_5%

+VIP/DVOVDDQ

NV31 use only.

R347 @49.9_0402_1%12
R334 @49.9_0402_1%

1 2

R349 @49.9_0402_1%1 2
R348 @49.9_0402_1%

1 2

TESTMECLK
NV31,NV33,NV34 use.
NV18 not use.

1 2

C443 0.01U_0402_16V7K

1 2

C36 0.01U_0402_16V7K

FBCAL_TERM_GND & FBCAL_CLK_GND
NV31 use.
NV18,NV33,NV34 not use.

NV18,NV33,NV34 not use.

+DVO_VREF

+2.5VS

R28949.9_0402_1% 12
R28849.9_0402_1%

12

R287@0_0402_5% 12
R325@549_0402_1%

12

1

C556
4700P_0402_25V7K

2

+1.5VS

1

C476

4.7U_0805_10V4Z

2

1

C429

0.1U_0402_10V6K

2

1

C427
470P_0402_50V7K

2

L40

1 2

KC FBM-L11-201209-221LMAT_0805

1

C555
470P_0402_50V7K

2

+FB_DLLVDD
NV31,NV33,NV34 use.
NV18 not use.

1

C482

0.1U_0402_16V4Z

2

+VIP/DVOVDDQ

12

12

1

C422
4700P_0402_25V7K

2

+3VS

1

C460

0.022U_0402_16V7K

2

R340
1K_0402_1%

R316
1K_0402_1%

L31

KC FBM-L11-201209-221LMAT_0805

1

C449

4.7U_0805_10V4Z

2

12

1

C541

0.022U_0402_16V7K

2

+3VS

+AGP_PLLVDD+FB_DLLVDD

C41

4.7U_0805_10V4Z

+DACA/BVDD

1

C32

4.7U_0805_10V4Z

2

+PLLVDD

C7

1

4.7U_0805_10V4Z

2

+IFPABPLLVDD

1

C465
470P_0402_50V7K

2

+VIP/DVOVDDQ+IFPABIOVDD

1

C454
470P_0402_50V7K

2

1

C485
4700P_0402_25V7K

2

1

C507

0.022U_0402_16V7K

2

1

C428
4700P_0402_25V7K

2

1

C450

4700P_0402_25V7K

2

1

C464
4700P_0402_25V7K

2

1

C430
4700P_0402_25V7K

2

+5VS

1

C452

0.1U_0402_10V6K

2

KC FBM-L11-201209-221LMAT_0805

1

C457
470P_0402_50V7K

2

1

C448

470P_0402_50V7K

2

1

C490

4.7U_0805_10V4Z

2

1

2

L34

1 2

KC FBM-L11-201209-221LMAT_0805

1

C467
470P_0402_50V7K

2

+AGP_PLLVDD
NV31,NV33,NV34 use.
NV18 not use.

1

2

L4

1 2

L24KC FBM-L11-201209-221LMAT_0805

1 2

L37

KC FBM-L11-201209-221LMAT_0805

L25

1 2

KC FBM-L11-201209-221LMAT_0805

C493

4.7U_0805_10V4Z

+3VS

C436

0.1U_0402_10V6K

+3VS

+3VS

C414

1

4.7U_0805_10V4Z

2

+3VS

12

+3VS

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

nVIDIA NV34M POWER)

LA-1911

18 57Friday, August 08, 2003

1

0.2

5

4

3

2

1

U1E

A9

GND

A12

GND

A19

GND

A22

GND

A25

GND

C3

GND

C7

GND

C10

D D

C C

B B

C13
C18
C21
C24

D28

E11
E14
E17
E20
E23

F25
F30

G28
H11
H20
H26

J30

K28

L23

L26
M30
N28

P26
U26

V28

W1

W30

Y23
Y26

AA5

AA28

AB1
AB30
AC11
AC20
AC26
AD28

AE1

AE6
AE25
AE30

AF5

AF8
AF11
AF14
AF17
AF20
AF23
AF26

AG4

AG27

AH3
AH7

AH10

R24

T24

W24

AB24
AK30

GND
GND
GND
GND
GND

D4

GND
GND

E5

GND

E8

GND
GND
GND
GND
GND
GND

F1

GND

F6

GND
GND
GND

G3

GND
GND
GND
GND
GND

J1

GND

J7

GND
GND

K3

GND

K5

GND
GND

L5

GND

L8

GND
GND
GND

M1

GND
GND

N3

GND
GND
GND

T1

GND
GND
GND
GND
GND

Y8

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

A6

GND
NC

NC
NC
NC

A1

NC1
NC2

G6

NC3

R7

NC4

T7

NC5

GROUND

T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

NC
NC
NC
NC
NC
NC
NC

M12
M13
M14
M15
M16
M17
M18
M19
N12
N13
N14
N15
N16
N17
N18
N19
P12
P13
P14
P15
P16
P17
P18
P19
R12
R13
R14
R15
R16
R17
R18
R19
T12
T13
T14
T15
T16
T17
T18
T19
U12
U13
U14
U15
U16
U17
U18
U19
V12
V13
V14
V15
V16
V17
V18
V19
W12
W13
W14
W15
W16
W17
W18
W19

AH13
AH16
AH18
AH21
AH24
AH28
AK6
AK9
AK12
AK15
AK19
AK22
AK25

G12
G15
G16
G19
G22
J24
M24

+VGA_CORE

1

C504

4.7U_0805_10V4Z

2

+VGA_CORE

1

C473
470P_0402_50V7K

2

+2.5VS

1

C537
1U_0603_10V6K

2

+2.5VS

1

C547
4700P_0402_25V7K

2

+3VS

1

C477
1U_0603_10V6K

2

+3VS

1

C487

0.022U_0402_16V7K

2

+VGA_CORE

R391
@470_0402_5%

1

C524

4.7U_0805_10V4Z

2

1

C471
470P_0402_50V7K

2

1

C453
1U_0603_10V6K

2

1

C548
4700P_0402_25V7K

2

1

C513
1U_0603_10V6K

2

1

C501
4700P_0402_25V7K

2

1

C530

4.7U_0805_10V4Z

2

1

C472
470P_0402_50V7K

2

1

C531
1U_0603_10V6K

2

1

C549
4700P_0402_25V7K

2

1

C437

0.1U_0402_10V6K

2

1

C510
4700P_0402_25V7K

2

1

C512
1U_0603_10V6K

2

1

C484
470P_0402_50V7K

2

1

C540

0.1U_0402_10V6K

2

1

2

1

C539

0.1U_0402_10V6K

2

1

2

1

C463
1U_0603_10V6K

2

1

C478
4700P_0402_25V7K

2

1

C474

0.1U_0402_10V6K

2

C550

0.022U_0402_16V7K

1

C533

0.1U_0402_10V6K

2

C522
4700P_0402_25V7K

1

C475
1U_0603_10V6K

2

1

2

1

C456

0.1U_0402_10V6K

2

1

C551

0.022U_0402_16V7K

2

1

C480

0.1U_0402_10V6K

2

C500
4700P_0402_25V7K

1

2

1

C552

0.022U_0402_16V7K

2

1

C446

0.022U_0402_16V7K

2

1

C511
1U_0603_10V6K

2

1

C517
4700P_0402_25V7K

2

C466

0.1U_0402_10V6K

1

C494

0.1U_0402_10V6K

2

1

C481

0.1U_0402_10V6K

2

1

C447

0.022U_0402_16V7K

2

1

C483

0.1U_0402_10V6K

2

1

C499

0.1U_0402_10V6K

2

1

C506

0.1U_0402_10V6K

2

1

C515

0.1U_0402_10V6K

2

1

C516

0.1U_0402_10V6K

2

1

C532

0.1U_0402_10V6K

2

NV34M_EPBGA701

A A

5

1 2

Q28

13

D

@2N7002

SUSP

2

G

S

4

SUSP 31,43,50

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

nVIDIA NV34M (DECOUP LING CAP)

LA-1911

19 57Friday, August 08, 2003

1

0.2

5

4

3

2

1

+2.5VS +2.5VS

NDQMA[0..7]17

NDQSA[0..7]17
NMAA[0..11]17

+2.5VS

1 2

1 2

NMDA[0..63]17

R432

1K_0402_1%

R430
1K_0402_1%

1

2

D D

C C

B B

NDQMA[0..7]
NDQSA[0..7]
NMAA[0..11]
NMDA[0..63]

22U_1206_10V4Z

NMA_BA017
NMA_BA117

(25mil) (25mil)

C591

0.1U_0402_10V6K

NMCLKA0#17 NMCLKA1#17

NMCLKA0

NMCLKA0#

NMRASA#17
NMCASA#17
NMWEA#17
NMCSA0#17

NMCKEA17

R104
@120_0402_5%

12

C155

22U_1206_10V4Z

NMAA0
NMAA1
NMAA2
NMAA3
NMAA4
NMAA5
NMAA6
NMAA7
NMAA8
NMAA9
NMAA10
NMAA11
NMA_BA0
NMA_BA1

NDQMA3
NDQMA0
NDQMA1
NDQMA2

NDQSA3
NDQSA0
NDQSA1
NDQSA2

VR_VREF_1

NMRASA#
NMCASA#
NMWEA#
NMCSA0#

NMCKEA

12

C136

U37

N5
N6
M6
N7
N8
M9

N9
N10
N11

M8

L6
M7
N4
M5

B3

H12

H3

B12

B2

H13

H2

B13
N13

M13

L9

M10

M2

L2

L3
N2

N12
M11

M12

C4

C11

H4

H11

L12
L13

M3
M4
N3

E7
E8

E10

K6
K7
K8
K9

L5

L10

E5

0.1U_0402_10V6K

B4

B11D4D5D6D9

VSSQ

VSSQ

A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1

DM0
DM1
DM2
DM3

DQS0
DQS1
DQS2
DQS3

VREF
MCL
RFU1
RFU2

RAS#
CAS#
WE#
CS#

CKE
CK

CK#
NC

NC
NC
NC
NC
NC
NC
NC
NC

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

0.1U_0402_10V6K

1

C126

2

D10

D11E6E9F5F10G5G10H5H10J5J10K5K10

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

As close as ppossible to related pin

0.1U_0402_10V6K

1

2

VSSQ

VSSQ

C130

0.1U_0402_10V6K

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

1

C147

2

VSSQ

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VSSQ

VSSQ

B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

D7
D8
E4
E11
L4
L7
L8
L11

1

C135

2

NMDA24
NMDA25
NMDA26
NMDA27
NMDA28
NMDA29
NMDA30
NMDA31
NMDA7
NMDA6
NMDA5
NMDA4
NMDA0
NMDA3
NMDA2
NMDA1
NMDA8
NMDA10
NMDA9
NMDA11
NMDA13
NMDA12
NMDA15
NMDA14
NMDA21
NMDA22
NMDA20
NMDA23
NMDA19
NMDA18
NMDA17
NMDA16

1

C127

2

0.01U_0402_16V7K

+2.5VS +2.5VS

0.01U_0402_16V7K

1

C142

2

0.01U_0402_16V7K

+2.5VS

R454

1K_0402_1%

1 2

R458
1K_0402_1%

1 2

1

C154

2

22U_1206_10V4Z

1

C626

0.1U_0402_10V6K

2

NMCLKA117NMCLKA017

12

C141

22U_1206_10V4Z

12

C157

NMCLKA1

NMCLKA1#

1

C131

2

0.1U_0402_10V6K

NMRASA#
NMCASA#
NMWEA#
NMCSA0#

NMCKEA

R114
@120_0402_5%

0.1U_0402_10V6K

NMAA0
NMAA1
NMAA2
NMAA3
NMAA4
NMAA5
NMAA6
NMAA7
NMAA8
NMAA9
NMAA10
NMAA11
NMA_BA0
NMA_BA1

NDQMA5
NDQMA6
NDQMA7
NDQMA4

NDQSA5
NDQSA6
NDQSA7
NDQSA4

VR_VREF_2

1

C125

2

U38

N5
N6
M6
N7
N8
M9

N9
N10
N11

M8

L6
M7
N4
M5

B3

H12

H3

B12

B2

H13

H2

B13
N13

M13

L9

M10

M2

L2

L3
N2

N12
M11

M12

C4

C11

H4

H11

L12
L13

M3
M4
N3

E7
E8

E10

K6
K7
K8
K9

L5

L10

E5

1

C124

2

0.1U_0402_10V6K

B4

B11D4D5D6D9

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1

DM0
DM1
DM2
DM3

DQS0
DQS1
DQS2
DQS3

VREF
MCL
RFU1
RFU2

RAS#
CAS#
WE#
CS#

CKE
CK

CK#
NC

NC
NC
NC
NC
NC
NC
NC
NC

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

0.1U_0402_10V6K

1

C144

2

0.01U_0402_16V7K

D10

D11E6E9F5F10G5G10H5H10J5J10K5K10

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

0.01U_0402_16V7K

1

C159

2

VSSQ

VSSQ

VSSQ

B7

DQ0

C6

DQ1

B6

DQ2

B5

DQ3

C2

DQ4

D3

DQ5

D2

DQ6

E2

DQ7

K13

DQ8

K12

DQ9

J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

D7

VDD

D8

VDD

E4

VDD

E11

VDD

L4

VDD

L7

VDD

L8

VDD

L11

VDD

1

C145

2

NMDA47
NMDA46
NMDA45
NMDA44
NMDA40
NMDA43
NMDA41
NMDA42
NMDA49
NMDA48
NMDA50
NMDA51
NMDA54
NMDA52
NMDA55
NMDA53
NMDA62
NMDA61
NMDA60
NMDA63
NMDA58
NMDA57
NMDA59
NMDA56
NMDA32
NMDA33
NMDA35
NMDA34
NMDA36
NMDA37
NMDA39
NMDA38

1

C132

2

0.01U_0402_16V7K

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

F6F7F8F9G6G7G8G9H6H7H8H9J6J7J8

A A

5

4

K4D263238A-GC_FBGA144

J9

3

2

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

F6F7F8F9G6G7G8G9H6H7H8H9J6J7J8

Title

Size Document Number Rev

Compal Electronics, Inc.
VGA DDR FOR CHANNEL A

K4D263238A-GC_FBGA144

J9

LA-1911

Date: Sheet of

20 57Friday, August 08, 2003

1

0.2

5

4

3

2

1

+2.5VS +2.5VS

NDQMB[0..7]17

NDQSB[0..7]17

D D

C C

+2.5VS

B B

NMDB[0..63]17

R376

1K_0402_1%

1 2

R382
1K_0402_1%

1 2

NMAB[0..11]17

1

2

NMCLKB017 NMCLKB117

NMCLKB0#17

NDQMB[0..7]
NDQSB[0..7]
NMAB[0..11]
NMDB[0..63]

(25mil)

C502

0.1U_0402_10V6K

NMCLKB0

NMCLKB0#

NMB_BA017
NMB_BA117

NMRASB#17
NMCASB#17
NMWEB#17
NMCSB0#17

NMCKEB17

R40
@120_0402_5%

22U_1206_10V4Z

NMAB0
NMAB1
NMAB2
NMAB3
NMAB4
NMAB5
NMAB6
NMAB7
NMAB8
NMAB9
NMAB10
NMAB11
NMB_BA0
NMB_BA1

NDQMB3
NDQMB0
NDQMB1
NDQMB2

NDQSB3
NDQSB0
NDQSB1
NDQSB2

VR_VREF_3

NMRASB#
NMCASB#
NMWEB#
NMCSB0#

NMCKEB

12

C30

22U_1206_10V4Z

1

C46

2

B4

B11D4D5D6D9

U30

VSSQ

VSSQ

N5

A0

N6

A1

M6

A2

N7

A3

N8

A4

M9

A5

N9

A6

N10

A7

N11

A8/AP

M8

A9

L6

A10

M7

A11

N4

BA0

M5

BA1

B3

DM0

H12

DM1

H3

DM2

B12

DM3

B2

DQS0

H13

DQS1

H2

DQS2

B13

DQS3

N13

VREF

M13

MCL

L9

RFU1

M10

RFU2

M2

RAS#

L2

CAS#

L3

WE#

N2

CS#

N12

CKE

M11

CK

M12

CK#

C4

NC

C11

NC

H4

NC

H11

NC

L12

NC

L13

NC

M3

NC

M4

NC

N3

NC

E7

VSS

E8

VSS

E10

VSS

K6

VSS

K7

VSS

K8

VSS

K9

VSS

L5

VSS

L10

VSS

E5

VSS

0.1U_0402_10V6K

VSSQ

VSSQ

VSSQ

As close as ppossible to related pin

0.1U_0402_10V6K

VSSQ

VSSQ

VSSQ

VSSQ

1

2

VSSQ

VSSQ

C42

VSSQ

1

C43

2

D10

D11E6E9F5F10G5G10H5H10J5J10K5K10

VSSQ

VSSQ

VSSQ

VSSQ

0.1U_0402_10V6K

VSSQ

VSSQ

VSSQ

VSSQ

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

D7
D8
E4
E11
L4
L7
L8
L11

1

C40

2

0.1U_0402_10V6K

1

C37

2

NMDB25
NMDB24
NMDB27
NMDB26
NMDB29
NMDB28
NMDB31
NMDB30
NMDB7
NMDB5
NMDB6
NMDB4
NMDB0
NMDB3
NMDB2
NMDB1
NMDB9
NMDB8
NMDB11
NMDB10
NMDB13
NMDB12
NMDB14
NMDB15
NMDB21
NMDB22
NMDB20
NMDB23
NMDB19
NMDB17
NMDB18
NMDB16

0.01U_0402_16V7K

1

C38

2

0.01U_0402_16V7K

+2.5VS

1

C35

2

0.01U_0402_16V7K

+2.5VS

R402

1K_0402_1%

1 2

R410
1K_0402_1%

1 2

1

2

NMCLKB1#17

C34

22U_1206_10V4Z

12

C64

(25mil)

1

C553

0.1U_0402_10V6K

2

NMCLKB1

NMCLKB1#

22U_1206_10V4Z

12

C76

R55
@120_0402_5%

0.1U_0402_10V6K

N10
N11

H12
B12

H13
B13
N13

M13
M10

N12
M11

M12

C11
H11

L12
L13

E10

L10

U34

N5
N6
M6
N7
N8
M9
N9

M8

L6
M7
N4
M5

B3
H3

B2
H2

L9

M2

L2

L3
N2

C4
H4

M3
M4
N3

E7
E8

K6
K7
K8
K9

L5
E5

1

C74

2

B4

B11D4D5D6D9

VSSQ

A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1

DM0
DM1
DM2
DM3

DQS0
DQS1
DQS2
DQS3

VREF
MCL
RFU1
RFU2

RAS#
CAS#
WE#
CS#

CKE
CK

CK#
NC

NC
NC
NC
NC
NC
NC
NC
NC

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ

0.1U_0402_10V6K

VSSQ

VSSQ

VSSQ

1

C73

2

0.1U_0402_10V6K

NMAB0
NMAB1
NMAB2
NMAB3
NMAB4
NMAB5
NMAB6
NMAB7
NMAB8
NMAB9
NMAB10
NMAB11
NMB_BA0 NMDB51
NMB_BA1

NDQMB5
NDQMB6
NDQMB7
NDQMB4

NDQSB5
NDQSB6
NDQSB7
NDQSB4

VR_VREF_4

NMRASB#
NMCASB#
NMWEB#
NMCSB0#

NMCKEB

0.1U_0402_10V6K

1

C72

2

D10

D11E6E9F5F10G5G10H5H10J5J10K5K10

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

1

2

VSSQ

VSSQ

C69

VSSQ

VSSQ

1

C66

2

0.01U_0402_16V7K

VSSQ

VSSQ

VSSQ

VSSQ

B7

DQ0

C6

DQ1

B6

DQ2

B5

DQ3

C2

DQ4

D3

DQ5

D2

DQ6

E2

DQ7

K13

DQ8

K12

DQ9

J13

DQ10

J12

DQ11

G13

DQ12

G12

DQ13

F13

DQ14

F12

DQ15

F3

DQ16

F2

DQ17

G3

DQ18

G2

DQ19

J3

DQ20

J2

DQ21

K2

DQ22

K3

DQ23

E13

DQ24

D13

DQ25

D12

DQ26

C13

DQ27

B10

DQ28

B9

DQ29

C9

DQ30

B8

DQ31

C3

VDDQ

C5

VDDQ

C7

VDDQ

C8

VDDQ

C10

VDDQ

C12

VDDQ

E3

VDDQ

E12

VDDQ

F4

VDDQ

F11

VDDQ

G4

VDDQ

G11

VDDQ

J4

VDDQ

J11

VDDQ

K4

VDDQ

K11

VDDQ

D7

VDD

D8

VDD

E4

VDD

E11

VDD

L4

VDD

L7

VDD

L8

VDD

L11

VDD

0.01U_0402_16V7K

1

C65

2

NMDB47
NMDB46
NMDB45
NMDB44
NMDB40
NMDB43
NMDB41
NMDB42
NMDB53
NMDB55
NMDB52
NMDB54

NMDB50
NMDB48
NMDB49
NMDB62
NMDB61
NMDB60
NMDB63
NMDB58
NMDB57
NMDB59
NMDB56
NMDB38
NMDB39
NMDB36
NMDB37
NMDB34
NMDB35
NMDB33
NMDB32

1

C71

2

0.01U_0402_16V7K

+2.5VS

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

VSS TH

F6F7F8F9G6G7G8G9H6H7H8H9J6J7J8

A A

K4D263238A-GC_FBGA144

J9

F6F7F8F9G6G7G8G9H6H7H8H9J6J7J8

Title

Size Document Number Rev

Compal Electronics, Inc.
VGA DDR FOR CHANNEL B

LA-1911

5

4

3

2

Date: Sheet of

VSS TH

K4D263238A-GC_FBGA144

J9

1

0.2

21 57Friday, August 08, 2003

A

TV-OUT Conn.

C418 22P_0402_50V8J1 2

LUMA16

1 1

2 2

3 3

4 4

CRMA16

COMPS16

R7

75_0603_1%

ENVDD16

R16

G16

B16

R329

75_0603_1%

1 2

C22

0.1U_0402_16V4Z

DACA_HSYNC16

SN74AHCT1G125GW_SOT353-5

DACA_VSYNC16

12

12

12

R10

R9

75_0603_1%

75_0603_1%

ENVDD

R627

R628

10K_0402_5%

1 2

12

C806 0.1U_0402_16V4Z

ENVDD

PCIRST#10,16,23,26,27,29,30,33,34,37

12

12

R328

75_0603_1%

U2

A

75_0603_1%

+CRT_VCC

1

2 4

A Y

OE#

G P

3 5

12

C11

270P_0402_50V7K

+LCDVDD

D

S

1 2

@0_0402_5%

+3VS

U58

5

1
2

TC7SH08FU_SSOP5

3

***

18P_0402_50V8K

12

R327

12

C431

18P_0402_50V8K

+CRT_VCC

1 2

C426

0.1U_0402_16V4Z

12

13

4

2 4

1 2

L2 CHB1608B121_0603

1 2

L1 CHB1608B121_0603

1 2

C415

12

C10

22P_0402_50V8J

270P_0402_50V7K

+5V

R39
100_0402_5%

1 2

13

22K

2

22K

1 2

FCM2012C-800_0805

L28

1 2

FCM2012C-800_0805

L27

1 2

FCM2012C-800_0805

12

C433
18P_0402_50V8K

R298
1K_0402_5%

1 2

DACA_VSYNC_1

U26
SN74AHCT1G125GW_SOT353-5

12

A Y

2

G

Q2
2N7002

C432

1

OE#

G P

3 5

R392
10K_0402_5%

R398
47K_0402_5%

DTC124EK_SOT23

L29

B

12

C416
330P_0402_50V7K

1 2

Q29

2

DTC124EK_SOT23

D3

DAN217_SOT 23

1

2

12

C411

15P_0402_50V8J

L3 CHB1608B121_0603

1 2

L26 CHB1608B121_0603

1 2

B

2

D42
@DAN217_SOT 23

LUMA_1
CRMA_1

+12VALW

22K

22K

Q31

DAN217_SOT 23

3

CRT_R

CRT_G

CRT_B

12

C410
15P_0402_50V8J

12

1

3

12

C417
330P_0402_50V7K

R49
100K_0402_5%

1 2
13

C5
@68P_0402_50V8K

200K_0402_5%

D4

1

2

3

12

1000P_0402_50V7K

1

D43
@DAN217_SOT 23

2

3

2

G

12

R50

C54

D5

DAN217_SOT 23

1

2

3

12

C409

15P_0402_50V8J

DACA_HSYNC_2

DACA_VSYNC_2

12

C413
@68P_0402_50V8K

C

D

CRT, TV-OUT & LVDS CONNECTOR

B+

+3VS

C572

C564

1 2
1 2

R307

4.7K_0402_5%

1 2

C600
10U_1210_35V4Z

0.1U_0603_50V4Z

JP14

1. Y ground

1

2. C ground

2

3. Y (luminance+sync)

3

4. C (crominance)

4

SUYIN_030008FR004T100XU

+3VS

+3VS

12

C31

D2

2 1

0.1U_0402_16V4Z

12

100P_0402_50V8K

4.7U_0805_10V4Z

+LCDVDD

C3

13

D

Q3
SI2302DS-T1_SOT23

S

12

C492

0.1U_0402_16V4Z

+5VS +CRT_VCC+R_CRT_VCC

CH491D_SOT23

+3VS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

10K_8P4R_1206_5%

12

C458

4.7U_0805_10V4Z

F1

21

FUSE_1A

C2

12

C412

220P_0402_50V8K

C

RP5

12

CRT_VCC

12

C6
220P_0402_50V8K

C607

C575

@220P_0402_25V8K

PID0

18

PID1

27

PID2

36

PID3

45

C559

@220P_0402_25V8K

L9 CHB2012U170_0805

B+

L8 CHB2012U170_0805

CRT Conn.

JP13

SUYIN_7849S-15G2T-HC

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

+CRT_VCC

DDC_DATA_1DACA_HSYNC_1

DDC_CLK_1

Use for B+ discharge

R441

100K_0402_5%

1 2

@220P_0402_25V8K

@220P_0402_25V8K

R6

4.7K_0402_5%

1 2

D

INVT_PWM37

Q27

2N7002

IB+

BKOFF#37

+5VS+CRT_VCC +5VS +5VS

1 3

D

E

LVDS Conn.

JP1

TZOUT3-16

TZOUT3+16

TXOUT 3-16

TXOUT3+16

TXOUT 0-16

TXOUT0+16
TXOUT2+16

TXOUT 2-16

TXOUT1+16

TXOUT 1-16
TXCLK+16

R593

S

Q1

1 3

D

PID0
PID1
PID2
PID3

1 2

1 2

2

G

S

DAC_BRIG37

4.7K_0402_5%

PID034
PID134
PID234
PID334

R336

100K_0402_5%

1 2
2

G

2N7002

Compal Electronics, Inc.

Title

CRT,TV-OUT & LVDS Connector

Size Document Number Rev

B

Date: Sheet of

0_0402_5%

D17
RB751V_SOD323

1 2

R594

R337

LA-1911

TXCLK-16

TZCLK-16

TZCLK+16

TZOUT0-16

TZOUT0+16

TZOUT2-16

TZOUT2+16

TZOUT1-16

TZOUT1+16

+LCDVDD

1 2

DISPOFF#

+3VS

R72
10K_0402_5%

1 2

21

@0_0402_5%

R13

4.7K_0402_5%

DDC_DATA 16

DDC_CLK 16

DISPOFF#

E

IPEX_20143-030E_30P

JP2

1
2
3
4
5
6
7

ACES_85204-0700

12

C578
220P_0402_50V8K

22 57Friday, August 08, 2003

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

1
2
3
4
5
6
7

0.2

5

4

3

2

1

+3VS

RP30

4 5
3 6
2 7
1 8

D D

+3VS

4 5
3 6
2 7
1 8

+3VS

4 5
3 6
2 7
1 8

+3VS

4 5
3 6
2 7
1 8

C C

B B

+3VS

4 5
3 6
2 7
1 8

+3VS

4 5
3 6
2 7
1 8

+3VS

1 2

R486 8.2K_0402_5%

+1.5VSS

12

R497
226_0603_1%

PCI_PERR#
PCI_TRDY#
PCI_PIRQG#
PCI_PIRQB#

8.2K_8P4R_1206_5%

RP93

PCI_REQ#B
PCI_PIRQE#
PCI_REQ#3
PCI_PIRQF#

8.2K_8P4R_1206_5%

RP37

PCI_IRDY#
PCI_PLOCK#
PCI_DEVSEL#
PCI_SERR#

8.2K_8P4R_1206_5%

RP95

PCI_STOP#
PCI_PIRQD#
PCI_FRAME#
PCI_REQ#1

8.2K_8P4R_1206_5%

RP28

PCI_PIRQH#
PCI_PIRQA#
PCI_PIRQC#

8.2K_8P4R_1206_5%

RP94

PCI_REQ#4
PCI_REQ#A
PCI_REQ#2
PCI_REQ#0

8.2K_8P4R_1206_5%

DISABLE "TOP BLOCK SWAP"

(GNTA#)

PIDERST#

Note:
HI_SWING_MCH, HI_VREF_MCH

PCI_AD[0..31]26,27,29,30

HUB_HL[0..10]10

PCI_AD[0..31]

HUB_HL[0..10]

PCI_C/BE#026,27,29,30
PCI_C/BE#126,27,29,30
PCI_C/BE#226,27,29,30
PCI_C/BE#326,27,29,30

PCI_REQ#030
PCI_REQ#129
PCI_REQ#227
PCI_REQ#326

PCI_GNT#030
PCI_GNT#129
PCI_GNT#227
PCI_GNT#326

CLK_PCI_ICH15

PCI_FRAME#26,27,29,30

PCI_DEVSEL#26,27,29,30

PCI_IRDY#26,27,29,30
PCI_PAR26,27,29,30

PCI_PERR#26,27,29,30

PCIRST#10,16,22,26,27,29,30,33,34,37
PCI_SERR#26,27,29,30

PCI_STOP #26,27,29,30

PCI_TRDY#26,27,29,30

PIDERST#33

PCI_AD0 INTRUDER#
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4

PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3

CLK_PCI_ICH

PCI_FRAME#
PCI_DEVSEL#
PCI_IRDY#
PCI_PAR
PCI_PERR#
PCI_PLOCK#

PCIRST#
PCI_SERR#
PCI_STOP #
PCI_TRDY#

PCI_REQ#A
PCI_REQ#B

PIDERST#

U14A

J4

AD0

J5
G3
K4
H5
H2

J3

J2
K5

F2
M4
H4

L5
G2
K1
G5
G4

L1
B2
P5
H3
N5
C4
N4
E6
P3
D3
N2

F5
P4

F4
P2

E3

J1
N3
M2

D5
C1
C5
B6
C6

D4
A3
B7
C7
A4

N1
D2

L3
M3

F1
K2

L2
V2
V4

L4
E5
E4

A5
E7

E8
B4

ICH5/(ICH5-M)

AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE0#
C/BE1#
C/BE2#
C/BE3#

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#/GPI40

GNT0#
GNT1#
GNT2#
GNT3#
GNT4#/GPO48

PCICLK
FRAME#

DEVSEL#
IRDY#
PAR
PERR#
PLOCK#
PME#
PCIRST#
SERR#
STOP#
TRDY#

REQA#/GPI0
REQB#REQ5#/GPI1

GNTA#/GPO16
GNTB#/GNT5#/GPO17

ICH5

PCI I/F

INTRUDER#

SMLINK0
SMLINK1

LINKALERT#

SMB I/F

SMBCLK

SMBDATA

SMBALERT#/GPI11

A20GATE

CPU I/F

CPUPWRGD/GPO49

CPUSLP#
STPCLK#

NC/(DPSLP#)

HUB I/F

HI_STBF

HI_STBS

HIRCOMP

HI_VSWING

Interrupt I/F

PIRQE#/GPI2

PIRQF#/GPI3
PIRQG#/GPI4
PIRQH#/GPI5

SERIRQ

EEPROM I/F

EE_DOUT

EE_SHCLK

LAN_RXD0
LAN_RXD1
LAN_RXD2

LAN I/F

LAN_TXD0
LAN_TXD1
LAN_TXD2

LAN_CLK

LAN_RSTSYNC

LAN_RST#

A20M#

NC

FERR#

IGNNE#

INIT#

INTR

NMI

RCIN#

SMI#

HI0
HI1
HI2
HI3
HI4
HI5
HI6
HI7
HI8

HI9
HI10
HI11

CLK66

HIREF

PIRQA#
PIRQB#
PIRQC#
PIRQD#

IRQ14
IRQ15

EE_CS

EE_DIN

Y12

ICH_SMLINK0

AD3

ICH_SMLINK1

AA2

LINK_ALERT#

V5

ICH_SMB_CLK

AD2

ICH_SMB_DATA

AD1

GPI_11

AC3
T22

V23
A11
U24
R21
R23
U23
R22
P24
P23
P22

SMI#

V24
T24

R524
R507 0_0402_5%

R24

HUB_HL0

H20

HUB_HL1

H21

HUB_HL2

J20

HUB_HL3

H23

HUB_HL4

M23

HUB_HL5

M21

HUB_HL6

N21

HUB_HL7

M20

HUB_HL8

L22

HUB_HL9

J22

HUB_HL10

K21

HUB_HL11

G22

CLK_ICH_66M

N22
K23

J24

HI_RCOMP_ICH

N24

HI_VREF_ICH

L24

HI_SWING_ICH

L20

PCI_PIRQA#

B3

PCI_PIRQB#

E1

PCI_PIRQC#

A2

PCI_PIRQD#

C2

PCI_PIRQE#

D7

PCI_PIRQF#

A6

PCI_PIRQG#

E2

PCI_PIRQH#

B1

IDE_IRQ14

Y17

IDE_IRQ15

Y24

IRQ_SERIRQ

F23
B10

B11

NC_EE_DOUT

B9
A12

C10
C9
C11
D9
E9
B12
E10
D10

LAN_RST#

AA1

ICH_SMB_CLK 12,13,15
ICH_SMB_DATA 12,13,15

GATEA20 37
H_A20M# 5

H_FERR# 5
H_IGNNE# 5
H_INIT# 5
H_INTR 5
H_NMI 5
H_PWRGOOD 5
KBRST# 37
H_CPUSLP# 5

12

0_0402_5%

CLK_ICH_66M 15
HUB_HLSTRF 10

HUB_HLSTRS 10

R503 52.3_0603_1%

PCI_PIRQA# 16,27
PCI_PIRQB# 27
PCI_PIRQC# 27
PCI_PIRQD# 27
PCI_PIRQE# 30
PCI_PIRQF# 26
PCI_PIRQG# 29
PCI_PIRQH# 29
IDE_IRQ14 33
IDE_IRQ15 33,42

SERIRQ 27,34,37

R473
@1K_0402_5%

R538
10K_0402_5%

12

12

H_SMI# 5

12

H_STPCLK# 5

R490 62_0402_5%

12

12

+1.5VSS

INTRUDER#

ICH_SMLINK0

ICH_SMLINK1

LINK_ALERT#

GPI_11

ICH_SMB_CLK

ICH_SMB_DATA

CLK_ICH_66M

IDE_IRQ15

IDE_IRQ14

IRQ_SERIRQ

1 2

R544 1M_0603_5%

1 2

R546 10K_0402_5%

1 2

R229 10K_0402_5%

1 2

R523 10K_0402_5%

1 2

R547 10K_0402_5%

1 2

R548 2.7K_0402_5%

1 2

R549 2.7K_0402_5%

1 2

R532

1 2

R533

1 2

R488 10K_0402_5%

+RTCVCC

+3VALW

R499
@10_0402_5%

1 2

2

C684
@10P_0402_50V8K

1

8.2K_0402_5%

8.2K_0402_5%

+3VS

+3VS

trace width of 10mils and

2

C683

0.1U_0402_16V4Z

1

2

C674

0.1U_0402_16V4Z

1

5

space 7mils

Close to ICH(L20)

1

C679

0.01U_0402_16V7K

2

Close to ICH ball <250mils

Close to ICH(L24)

1

C678

0.01U_0402_16V7K

2

Close to ICH ball <250mils

CLK_PCI_ICH

4

12

R211
@10_0402_5%

1

C287
@10P_0402_50V8K

2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Title

Size Document Number Rev

2

Date: Sheet of

Compal Electronics, Inc.
ICH5-PCI/HUB/LAN
LA-1911

1

0.2

23 57Friday, August 08, 2003

HI_SWING_ICH

12

R493
147_0603_1%

HI_VREF_ICH

A A

12

R495
113_0603_1%

5

+3VALW

TP0_PU

R232 10K_0402_5%
R222 8.2K_0402_5%

+3VS

R502 10K_0402_5%

D D

C C

B B

R216 4.7K_0402_5%
R234 10K_0402_5%

+CPU_CORE

R519 @10K_0402_5%

R534 @10K_0402_5%
R543 10K_0402_5%

+3VS

R468 @8.2K_0402_5%

R482 @10K_0402_5%
R484 @10K_0402_5%
R481 @10K_0402_5%

+3VALW

+3VALW

R480 10K_0402_5%

+RTCVCC

R550 330K_0402_5%

+3VS

Disable timer timeout

CLK_ICH_14M

12

SYS_RESET#

12

12
12
12

H_CPUPERF#

12

SUSCLK

12

EC_RSMRST#

12

ICH_AC_SDOUT

12

ICH_AC_BITCLK

12

ICH_AC_SDIN0

12

ICH_AC_SDIN1

12

RP92

4 5
3 6
2 7
1 8

10K_8P4R_1206_5%

1 2

USB_OC1#
USB_OC3#
USB_OC5#
USB_OC7#

USB_OC6#

12

R485 @1K_0402_5%

12

R489
@10_0402_5%

1 2

C662
@4.7P_0402_50V8C

1 2

ICH_VGATE
EC_THRM#
PM_CLKRUN#

ICH_INTVRMEN

Note:
USBRBIAS keep less than 500mils

SPKR

CLK_ICH_48M

12

R487
@10_0402_5%

2

C663
@10P_0402_50V8K

1

VCORE_PWRGD40,49,52

ICH_AC_BITCLK31,36

ICH_AC_SDIN031
ICH_AC_SDIN136

LPC_AD[0..3]34,37

R598

H_THERMTRIP#5

+3VS

PBTN_OUT#37
EC_SWI#37

EC_RSMRST#37,41

PM_SLP_S3#37

SUSCLK27

EC_THRM#37

R504 0_0402_5%

LPC_AD[0..3]

@0_0402_5%

12

LPC_DRQ1#34

LPC_FRAME#34,37

USB_OC0#35
USB_OC2#35
USB_OC4#35

SIDERST#33,42

SPKR32

H_THERMTRIP#

CLK_ICH_14M15

CLK_ICH_48M15

4

R505
10K_0402_5%

1 2

1 2

USBP0+35

USBP0-35

USBP2+35

USBP2-35

USBP4+35

USBP4-35

USBP6+36

USBP6-36

1 2

R471

22.6_0603_1%

SYS_RESET#
TP0_PU

ICH_PWROK
EC_RSMRST#
PM_SLP_S3#

PM_SLPS4#
PM_SLPS5#

SUSCLK
EC_THRM#

H_CPUPERF#
ICH_VGATE

ICH_AC_BITCLK
ICH_AC_RST_R#
ICH_AC_SDIN0
ICH_AC_SDIN1

ICH_AC_SDOUT_R
ICH_AC_SYNC_R

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_DRQ1#
LPC_FRAME#

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#

USBRBIAS

SIDERST#
ICH_INTVRMEN

SPKR

1 2

R508 0_0402_5%

CLK_ICH_14M

CLK_ICH_48M

AB2
AC1

P20

AC12

AB3

AB13

T20

AA3

U22
U21

AB1

U20
R20

C12
E12
D12
A13

C23
D23
A22
B22
C21
D21
A20
B20
C19
D19
A18
B18
C17
D17
A16
B16

C15
D15
D14
C14
B14
A14
D13
C13

A24
B24

G23

AD10

E24

T21

U14B

R5

GPI6/(AGPBUSY#)

U1

SYS_RESET#
TP0/(BATLOW#)

R1

GPO21/(C3_SAT#)
GPIO24/(CLKRUN#)
NC/(DPRSLPVR)

Y4

PWRBTN#
PWROK
RI#
RSMRST#
GPO19/(SLP_S1#)

W1

SLP_S3#

U2

SLP_S4#
SLP_S5#
GPO20/(STP_CPU#)
GPO18/(STP_PCI#)

Y1

SUSCLK
SUS_STAT#/LPCPD#

T2

THRM#

F22

GPO23/(SSMUXSEL)
GPO22/(CPUPERF#)
VRMPWRGD/(VGATE)

D8

AC_BIT_CLK
AC_RST#
AC_SDIN0
AC_SDIN1
AC_SDIN2

A9

AC_SDOUT

B8

AC_SYNC

T5

LAD0

R4

LAD1

R3

LAD2

U4

LAD3

U5

LDRQ0#

R2

LDRQ1#/GPI41

T4

LFRAME#
USBP0P

USBP0N
USBP1P
USBP1N
USBP2P
USBP2N
USBP3P
USBP3N
USBP4P
USBP4N
USBP5P
USBP5N
USBP6P
USBP6N
USBP7P
USBP7N

OC0#
OC1#
OC2#
OC3#
OC4#/GPI9
OC5#/GPI10
OC6#/GPI14
OC7#/GPI15

USBRBIAS
USBRBIAS#

T1

GPIO32
GPIO33

F21

GPIO34
INTVRMEN

SPKR

THRMTRIP#

F20

CLK14

F24

CLK48

ICH5

ICH5/(ICH5-M)

GPI

PM

IST

AC97 I/F

IDE I/F

LPC I/F

USB I/F

SATA I/F

GPIO

MISC

CLOCK

3

GPI7

GPI8
GPI12
GPI13

GPIO25
GPIO27
GPIO28

PDA0
PDA1

PDA2
PDCS1#
PDCS3#

PDDREQ

PDDACK#

PDIOR#

PDIOW#

PIORDY

PDD0

PDD1

PDD2

PDD3

PDD4

PDD5

PDD6

PDD7

PDD8

PDD9

PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

SDA0

SDA1

SDA2
SDCS1#
SDCS3#

SDDREQ

SDDACK#

SDIOR#

SDIOW#

SIORDY

SDD0

SDD1

SDD2

SDD3

SDD4

SDD5

SDD6

SDD7

SDD8

SDD9

SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

SATA0TXP
SATA0TXN
SATA0RXN
SATA0RXP

SATA1TXP
SATA1TXN
SATA1RXN
SATA1RXP

SATARBIAS

SATARBIAS#

CLK100P
CLK100N

RTCRST#

RTCX1
RTCX2

R220
100K_0402_5%

ICH_ACIN

U3
Y2
W4
W5
W3
V3
W2

AA19
AD19
AC19
AB19
Y18

AC17
AC18
AD18
AA17
AA18

AB16
Y13
Y14
AC14
AA14
AC15
AD14
AB14
AD15
Y15
AD16
AA15
AC16
Y16
AA16
AB17

W22
W23
W21
V22
V20

Y20
W20
Y23
Y22
Y21

AA22
AB23
AD23
AD24
AB21
AC21
AB20
AC20
Y19
AD22
AC22
AA20
AB22
AC24
AB24
AA23

AA8
AB8
AD7
AC7

AA10
AB10
AD9
AC9

Y11
Y9

AC5
AD5

AA12
AC11
AB12

1 2

EC_SMI#
EC_SCI#
EC_LID_OUT#

IDE_PDA0
IDE_PDA1
IDE_PDA2
IDE_PDCS1#
IDE_PDCS3#

IDE_PDDREQ
IDE_PDDACK#
IDE_PDIOR#
IDE_PDIOW#
IDE_PDIORDY

IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

IDE_SDA0
IDE_SDA1
IDE_SDA2
IDE_SDCS1#
IDE_SDCS3#

IDE_SDDREQ
IDE_SDDACK#
IDE_SDIOR#
IDE_SDIOW#
IDE_SDIORDY

IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15

Note:
SATABIAS keep less than 500mils

SATABIAS

R527 24.9_0603_1%

ICH_RTCRST#
ICH_RTCX1
ICH_RTCX2

12

ICH_AC_BITCLK

2

+3VS

EC_SMI# 37
EC_SCI# 37
EC_LID_OUT# 37
EC_FLASH# 38

IDE_PDA0 33
IDE_PDA1 33
IDE_PDA2 33
IDE_PDCS1# 33
IDE_PDCS3# 33

IDE_PDDREQ 33
IDE_PDDACK# 33
IDE_PDIOR# 33
IDE_PDIOW# 33
IDE_PDIORDY 33

ICH_SYNC# SYS_PWROK ICH_PWROK

0
0

0
1
0 01

1 1 1

IDE_SDA0 33,42
IDE_SDA1 33,42
IDE_SDA2 33,42
IDE_SDCS1# 33,42
IDE_SDCS3# 33,42

IDE_SDDREQ 33,42
IDE_SDDACK# 33,42
IDE_SDIOR# 33,42
IDE_SDIOW# 33,42
IDE_SDIORDY 33,42

IDE_PDD[0..15]
IDE_SDD[0..15]

IDE_PDD[0..15] 33
IDE_SDD[0..15] 33,42

ICH_RTCX1
ICH_RTCX2

R540

4.7K_0402_5%

ICH_RTCRST#

R245 10M_0603_5%

32.768KHZ_12.5PF_CM155
C357

12P_0402_50V8J

2 1

PM_SLPS5#
PM_SLPS4#

TC7SH08FU_SSOP5

R595 @0_0402_5%

0
0

R261

@220_0402_5%

@MMBT3904_SOT23

R597 @0_0402_5%

SYS_PWROK7,27,40

12

ICH_VBIAS

R562
@10M_0603_5%

X4

12

12

ACINICH_ACIN

D36RB751V_SOD323

+3VALW

U15

5

1
2

3

1 2

IDE_PDIORDY

IDE_SDIORDY

+3VS

12

2

Q21

12

12

J1
JOPEN

R559 @22M_0603_5%
R566
@2.4M_0603_1%

1 2

C356
12P_0402_50V8J

1

ACIN 37,38,45

12

C320 0.1U_0402_16V4Z

4

R529 4.7K_0402_5%

R528 4.7K_0402_5%

12

R254
@1K_0402_5%

3 1

3 1

R572 0_0402_5%

C350

C741
@0.047U_0402_16V4Z

1 2

12

2

Q55
@MMBT3904_SOT23

1 2

R545

1

200K_0402_5%

2

0.1U_0402_16V4Z

R554 @1K_0402_5%

PM_SLP_S5# 37

12

12

R574
@220_0402_5%

ICH_PWROK

+RTCVCC

12

12

+3VS

A A

+CPU_CORE

PM_CLKRUN#26,27,29,30,34,37

5

1 2

R509 62_0402_5%

H_THERMTRIP#

Near ICH

PM_CLKRUN#

ICH_AC_RST#31,36

ICH_AC_SYNC31,36

ICH_AC_SDOUT31,36

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

ICH_AC_RST_R#

R475 33_0402_5%
R472 33_0402_5%
R470 33_0402_5%

12

ICH_AC_SYNC_R

12

ICH_AC_SDOUT_R

12

3

R479
@10_0402_5%

1 2

2

C648
@10P_0402_50V8K

1

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

ICH5-IDE/LPC/PM/GPIO/USB

LA-1911

1

24 57Friday, August 08, 2003

0.2

5

4

3

2

1

+CPU_CORE

1

C708

0.1U_0402_16V4Z

2

Place near
ball T22

+1.5VSS

1

C650

0.1U_0402_16V4Z

2

1

2

Place near ball D24

+1.5VSS

1

C732

0.1U_0402_16V4Z

2

1

2

Place near ball AD6

+3VS +5VS

21

RB751V_SOD323

1

C712

0.1U_0402_16V4Z

2

1

2

D39

RB751V_SOD323

C660

0.1U_0402_16V4Z

D37

1

C710
1U_0603_10V6K

2

+3VALW +5VALW

21

1

C670
1U_0603_10V6K

2

Compal Electronics, Inc.

ICH5 Power & Decoupling
LA-1911

C651

0.01U_0402_16V7K

C733

0.01U_0402_16V7K

R521

1K_0402_5%

1 2

R491
1K_0402_5%

1 2

25 57Friday, August 08, 2003

1

0.2

U14C

A1

VSS

A7
A10
A15
A17
A19

D D

C C

B B

A A

A21
A23

AA5
AA7

AA9
AA11
AA13
AA21
AA24

AB5

AB7

AB9
AB11
AB15
AB18

AC2

AC4

AC6

AC8
AC10
AC13
AC23

AD4

AD6

AD8
AD17
AD21
AD12

B13
B17
B19
B21
B23

C16
C18
C20
C22

D11
D16
D18
D20
D22
D24
E17
E19
E20
E21
E23

G20
G24

H19
H22

J21
J23

K11
K14
K20
K22
K24

L10
L11
L12
L13
L14
L15
L21
L23

M11
M12
M13
M14
M22
M24
N11
N12
N13
N14
N20

P10
P11
P12
P13

C3
C8

D1
D6

F3
F9

G6

H1

J6

K3

M1
M5

P1

ICH5/(ICH5-M)

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

ICH5

5

Power

GND

VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5

VCCSUS1_5_A
VCCSUS1_5_B
VCCSUS1_5_B
VCCSUS1_5_B
VCCSUS1_5_C
VCCSUS1_5_C

V5REF
V5REF

V5REF_SUS

V_CPU_IO
V_CPU_IO
V_CPU_IO

VCCSATAPLL
VCCSATAPLL

VCCUSBPLL

VCCRTC

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

B5
F6
G1
H6
K6
L6
M10
N10
P6
R13
V19
W15
W17
W24
AD13
AD20
G19
G21

E18
B15
E11
F10
F11
E13
E14
U6
V6
F16
F17
F18
K15

K10
K12
K13
L19
P19
R10
R6
H24
J19
K19
M15
N15
N23
E15
F15
F14
W19
R12
W9
W10
W11
W6
W7
W8
E22

F19
Y5
AA4
AB4
F7
F8

A8
W14

E16
R15

R19
T19

AA6
AB6

C24
AD11

P14
P15
P21
R11
R14
T23
T3
T6
U19
V1
V21
W16
W18
Y3
Y6
Y7
Y8
Y10

+3VS

+3VALW

+1.5VSS

VCCSUS15_A
VCCSUS15_B

VCCSUS15_C

ICH_V5REF

ICH_V5REF_SUS

+CPU_CORE

+1.5VSS

4

+3VS

1

C666

0.1U_0402_16V4Z

2

+1.5VSS

1

C737

0.1U_0402_16V4Z

2

+3VALW

1

C644

0.01U_0402_16V7K

2

Decoupling Reference Document:
Springdale Chipset Platform Design guide Rev1.2
(12837)page282

1

C665

0.01U_0402_16V7K

2

Place
near
F7,
Direction
to ball
(VSS)A7

1

C739

0.1U_0402_10V6K

2

+RTCVCC

1

C668

0.1U_0402_16V4Z

2

1

C698

0.1U_0402_16V4Z

2

1

C675

0.1U_0402_16V4Z

2

1

C728

0.01U_0402_16V7K

2

Place
near
AB4,
Direction
to ball
(VSS)AD4

1

C645

0.1U_0402_16V4Z

2

Place near +3VS, DIRECTION TO ball
D1,A7,H1,P1,W24 and A21

1

C718

0.1U_0402_16V4Z

2

Place0.1u near +1.5VS, Direction to ball
G24,H24,K24,M24,AD4 and AD18;

0.01u near +1.5VS, Direction to ball AD8.

1

C717

0.1U_0402_16V4Z

2

Place0.1u near +3VALW, Direction to ball
A17,A23,V1.
Addition cap near A15,A19

1

C664

0.01U_0402_16V7K

2

Place
near
F19,
Direction
to ball
(VSS)A19

1

C667

0.1U_0402_16V4Z

2

1

C738

0.1U_0402_16V4Z

2

1

C676

0.1U_0402_16V4Z

2

Place near ball AD11

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1

C680

0.1U_0402_16V4Z

2

1

C672

0.1U_0402_16V4Z

2

1

C686
1U_0603_10V6K

2

1

C420

0.1U_0402_16V4Z

2

1

C727

0.1U_0402_16V4Z

2

2

C722

0.01U_0402_16V7K

1

ICH_V5REF

1

C642

0.1U_0402_16V4Z

2

Place near ball A8

ICH_V5REF_SUS

1

C661

0.1U_0402_16V4Z

2

Place near ball(VSS) E16

Title

Size Document Number Rev

2

Date: Sheet of

5

4

3

2

1

TRACE=20mil

+2.5V_LAN

R375 0_0805_5%

PCI_AD0
PCI_AD1

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

1 2

CLK_PCI_LAN

+3V

PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

C567

0.1U_0402_16V4Z

D D

C C

PCI_AD[0..31]23,27,29,30

IDSEL:PCI_AD17

B B

CLK_PCI_LAN

A A

+3V

C566

0.1U_0402_16V4Z

PCI_AD[0..31]

PCI_C/BE#023,27,29,30
PCI_C/BE#123,27,29,30
PCI_C/BE#223,27,29,30
PCI_C/BE#323,27,29,30

PCI_FRAME#23,27,29,30

PCI_TRDY#23,27,29,30

PCI_DEVSEL#23,27,29,30

PCI_PERR#23,27,29,30
PCI_SERR#23,27,29,30

PCI_REQ#323

PCI_PIRQF#23

CLK_PCI_LAN15

PM_CLKRUN#24,27,29,30,34,37

12

R421
@10_0402_5%

12

C577
@10P_0402_50V8K

C580

0.1U_0402_16V4Z

5

PCI_AD17 LAN_IDSEL

R423 100_0402_5%

PCI_PAR23,27,29,30

PCI_IRDY#23,27,29,30

PCI_STOP#23,27,29,30

PCI_GNT#323

LAN_PME#27,29,30,37

PCIRST#10,16,22,23,27,29,30,33,34,37

C581

0.1U_0402_16V4Z

U35

47

AD0

46

AD1

45

AD2

43

AD3

42

AD4

41

AD5

40

AD6

39

AD7

36

AD8

35

AD9

34

AD10

33

AD11

32

AD12

30

AD13

29

AD14

28

AD15

15

AD16

14

AD17

13

AD18

12

AD19

11

AD20

10

AD21

9

AD22

8

AD23

96

AD24

93

AD25

92

AD26

91

AD27

89

AD28

87

AD29

86

AD30

85

AD31

38

C/BE#0

27

C/BE#1

17

C/BE#2

84

C/BE#3

98

IDSEL

24

PAR

18

FRAME#

19

IRDY#

20

TRDY#

21

DEVSEL#

23

STOP#

25

PERR#

26

SERR#

83

REQ#

82

GNT#

80

INTA#

79

INTB#

57

PME#

81

RST#

97

PCICLK

50

CLKRUN#

6

VDD

22

VDD

37

VDD

49

VDD

90

VDD

95

VDD

RTL8101L_LQFP100

C526

0.1U_0402_16V4Z

Power

PCI I/F

ISOLATE#

AC_RST#

AC_SYNC

AC_DOUT

AC-Link

ROMCS/OEB

Power

LAN I/F

+2.5V_DLAN

VDD25
VDD25

AVDD25

AVDD
AVDD
AVDD

EEDO

EEDI
EESK
EECS

LED0

LED1

LED2
TXD+

TXD-

RXIN+

RXIN-

X1

X2

LWAKE

RTSET

RTT3

VCTRL

AC_DIN

AC_BCK

GPIO0
GPIO1

NC

DGND1
DGND2
DGND3
DGND4
DGND5
AGND1
AGND2
AGND3

C576

0.1U_0402_16V4Z

0.1U_0402_16V4Z

48
94

+2.5V_LAN

58

+3V_LAN_VDD1

59

+3V_LAN_VDD2

70

+3V_LAN_VDD3

75

LAN_EEDO

52

LAN_EEDI

53

LAN_EECLK

54

LAN_EECS

55

ACTIVITY#

78

LINK10_100#

77
76

LAN_TD+

72

LAN_TD-

71

LAN_RD+

68

LAN_RD-

67

LAN_X1

61

LAN_X2

60
64
74
65
63
56
1

3
4
5
7

100
99

51
69

2
16
31
44
88
62
66
73

4

12

12

C538

C573

0.1U_0402_16V4Z

T RACE=20mil

1 2

R48 1K_0402_5%

1 2

R46 15K_0402_5%

1 2

R47 5.6K_0603_1%

LAN_X1 LAN_X2

12

22U_1206_10V4Z

U32

4
3
2
1

AT93C46-10SI-2.7_SO8

1 2

R383

5.6K_0402_5%

B

2

10K

Y2

25MHZ_20PF_6X25000017

C497
27P_0402_50V8J

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Place closed to
RTL8101L pin58

1

2

DO
DI
SK
CS

C486

0.1U_0402_16V4Z

T RACE=20mil

T RACE=20mil

T RACE=20mil

GND

NC
NC

VCC

+3V

+3VS

+3V

31

E

47K

C

C505

1 2

5
6
7
8

Q32
@2SB1197K_SOT23

reserve transistor for ver.C

12

C45
@22U_1206_10V4Z

12

C503
27P_0402_50V8J

0.1U_0402_16V4Z

12

C459

0.1U_0402_16V4Z

+2.5V_LAN

12

C496

+3V

Termination plane should be coupled to chassis ground

0.1U_0402_16V4Z

3

12

C495

+3V

LINK10_100#

0.1U_0402_16V4Z

12

C498

12

R394

49.9_0402_1%

12

** **

RTL8101L has internal
+2.5V generator at pin58

+2.5V_LAN

1 2

L36
LQG21N4R7K10_0805

TRACE=30mil

LAN_TD+
LAN_TD-

12

R395

49.9_0402_1%

C528

0.1U_0402_16V4Z

49.9_0402_1%

Closed to RTL8101L Closed to Bothhand TS6121

Q34
DTA114YKA_SOT23

3 1

+3V

ACTIVITY#

E

3 1

47K

B

E

47K

10K

2

B

10K

2

Q33
DTA114YKA_SOT23

C

R412 300_0402_5%

C

1 2

R401 300_0402_5%

1 2

RJ45_RX-

RJ45_RX+
RJ45_TX­RJ45_TX+

75_0402_5%

RJ45_PR

LAN Realtek RT8101L

+3V

Layout Note
TS6121 pls close to
conn.

LAN_RD+

R379

R24

12

12

12

R380

49.9_0402_1%

12

C488

0.1U_0402_16V4Z

12

2

LAN_RD-

12
11

8
7
6
5
4
3
2
1

10

9

R23
75_0402_5%

C787

1 2

1000P_1206_2KV7K

JP16

Amber LED+
Amber LED­PR4­PR4+
PR2­PR3­PR3+
PR2+
PR1­PR1+
Green LED­Green LED+

AMP RJ45/RJ11 with LED

**

@0.1U_0402_16V4Z

1

C438

2

U31

1

TD+

3

TD-

2

CT

7

CT

6

RD+

8 9

RD- RX-

TS6121C_16P

**

12

C49

0.1U_0402_16V4Z

16

SHLD4

15

SHLD3

14

SHLD2

13

SHLD1

LANGND

C788

4.7U_0805_10V4Z

Compal Electronics, Inc.

Title

LAN REALTEK RTL8101L

Size Document Number Rev

LA-1911

Date: Sheet of

16

TX+

14

TX-

15

CT

10

CT

11

RX+

12

R21

75_0402_5%

1

RJ45_TX+
RJ45_TX-

RJ45_RX+
RJ45_RX-

12

R22
75_0402_5%

26 57Friday, August 08, 2003

RJ45_PR

0.2

5

CardBus Controller
T7L65XB (BGA)

+3VC

PCI/SD INTERFACE

D D

C C

***

B B

CLK_PCI_CB15

+3VC

PCI_AD20
PCI_AD21

PCI_AD22

C611 @10P_0402_50V8K

PCI_AD[0..31]23,26,29,30

PCI_REQ#223

SERIRQ23,34,37

PM_CLKRUN#24,26,29,30,34,37

PCI_FRAME#23,26,29,30

PCI_IRDY#23,26,29,30

PCI_DEVSEL#23,26,29,30

PCI_TRDY#23,26,29,30

PCI_STOP#23,26,29,30

PCI_PAR23,26,29,30

PCI_C/BE#023,26,29,30
PCI_C/BE#123,26,29,30
PCI_C/BE#223,26,29,30
PCI_C/BE#323,26,29,30

PCI_PIRQA#16,23

PCI_PIRQB#23
PCI_PIRQC#23
PCI_PIRQD#23

PCI_SERR#23,26,29,30
PCI_PERR#23,26,29,30

R69

1 2

100_0402_5%

R635 100_0402_5%1 2

1 2

R71 @100_0402_5%

PCI_GNT#223

PCIRST#10,16,22,23,26,29,30,33,34,37

**

R105

1 2

+3VS

@10K_0402_5%

**

SYS_PWROK7,24,40

R610

1 2

0_0402_5%

PCM_PME#26,29,30,37
PCM_SPK#32

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

1 2

R443 @10_0402_5%

SUSCLK24

R77

12

0_0402_5%

SUSPEND#

EXSMI#

GPSTSO#

PCI_AD[0..31]

**

PCIRST#

PCLR#PCIRST#

J16

AD0

J15

AD1

J14

AD2

J13

AD3

K16

AD4

K15

AD5

K14

AD6

K13

AD7

L16

AD8

L15

AD9

L14

AD10

L13

AD11

M15

AD12

M14

AD13

M13

AD14

N16

AD15

N15

AD16

N14

AD17

P16

AD18

P15

AD19

P14

AD20

R14

AD21

P13

AD22

R13

AD23

T13

AD24

N12

AD25

P12

AD26

R12

AD27

T12

AD28

N11

AD29

P11

AD30

R11

AD31

L12

REQ#

T8

IRQDT#

T11

CLKRUN#

N9

FRAME#

P9

IRDY#

R9

DEVSEL#

T9

TRDY#

N8

STOP#

P8

PAR

N10

C/BE#0

P10

C/BE#1

R10

C/BE#2

T10

C/BE#3

M8

INTA#

M9

INTB#

M10

INTC#

M11

INTD#

R8

SERR#

M12

PERR#

R15

IDSELFL

T14

IDSELVI

T15

IDSELSD

K12

GNT#

H13

PCIRST#

K1

PCICLK

B2

CK48M

B1

CK14M

R2

CK32K

T3

ECSMI

R1

KBSMI

R3

ECBEEP#

P3

ECNMI

T2

PCLR#

L1

SUSPEND#

L2

SYSGSPK

K2

PSBEEP#

M1

PNL0

M2

PNL1

N1

PNL2

N2

PNL3

P2

VGAMOD

P1

FCMOD

L4

EXSMI#

L3

PME#

M3

AUDIO

K4

ALARM

M4

ATBEEP

N3

GPSTSO#

T7L65XB_BGA256

U5A

TOSHIBA T7L65XB 1/2

DOCKING

I/F

EXT

I/F

GENERAL

PORT

TOPICREG

PCI BUS INTERFACE

TEST

DEBUG

PORT

SMARTCARD

I/F

CLOCK

INPUT

SD CARD

I/F

EC/KBC

I/F

PC CARD

PS I/F

SYSTEM I/F

DEEPER

SLEEP

DPSMI#

PCM2SPK#

MBSTS2
MBSTS1
MBSTS0

IFAMON#

IFMO#

FDVCE#

HDSTP
HDSTS

GPO1

PDNVGA

RSTVGA#

QSWON

DCPCLR#
IDERSTA#
IDERSTB#

LCDENA#

LCDENB#

CRTEN#

BIOSWP#

TSTI3
TSTI2
TSTI1
TSTI0

SDLED
ZVAEN
TSTO3
TSTO2
TSTO1
TSTO0

DBGRX
DBGTX

SCDAT

SCCD#

SCRST#

SCCLK

SCVPEN

SCV3EN
SCV5EN

SDCD3

SDCD2

SDCD1

SDCD0

SDCMD

SDWP

SDCD#

SDCKSL

SDCLK

SDPWR

VPEN0A
VPEN1A
VC3ENA
VC5ENA

CPUSTP#

VRCHG#

GCPSTP#

DPSLP

DPRSVR

CNT I/F

4

J2

1 2

PAD-OPEN 4x4m
PJP12

1 2

PAD-OPEN 4x4m

J2
J1

T5
R5
T4
R4

P5
N5
P4
N4

K3
E1
E2
J4
J3
H3
H4
D2
D3
E3
G1

N6
R7

P7
T7
N7

C3
D1
T6
P6
R6
M7

C1
C2
F2
F4
G4
G5
H5

F3
F1

A3
B3
C5
A4

C4
A5

B5
D4

SD_CLK1

B4
A2

H16
G12
H14
H15

H1
H2

G2
E4
G3

**

+3VC

FDVCE#
HDSTP
HDSTS

QSWON

BIOSWP#

TOPICREG

R616

1 2

0_0402_5%

SCDAT

SCV3EN
SCV5EN

R448 22_0402_5%

1 2

+3VS

+3V

SD_DAT3 28
SD_DAT2 28
SD_DAT1 28
SD_DAT0 28

SD_CMD 28
SD_WP 28

MMC_DET#28

SD_PWREN 28

VPEN0A 28
VPEN1A 28
VC3ENA 28
VC5ENA 28

SDLED 39

SD_CLK 28

3

CardBus Controller
T7L65XB (BGA)
CARDBUS INTERACE

S1_A[0..25]

S1_D[0..15]

U5B

H6

VCC

J6

VCC

K6

VCC

L6

VCC

L7

VCC

L8

VCC

L9

VCC

L10

VCC

L11

VCC

N13

VCC

M16

VCC

K11

VCC

J11

VCC

H11

VCC

G11

VCC

R16

VIO

+3VC

+S1_VCC

+3VC

+S1_VCC

+3VC

UNUSED PIN
PULL UP/DOWN

TOPICREG

GPSTSO#
BIOSWP#

FDVCE#

HDSTP
HDSTS

QSWON

SCDAT
SCV5EN
SCV3EN

B16
E10

F11
F10

K10
T16

H10
H12

G10

A16
E11

@100K_0402_5%

J12

VIO
VIO

E7

VIO
VIO

G6

VCCS
VCCA

VCCA

F9

VCCA

F8

VCCA

F7

VCCA

F6

VCCA

F5

GND

H7

GND

J7

GND

J8

GND

K7

GND

L5

GND

T1

GND

M6

GND

K8

GND

K9

GND

J9

GND
GND
GND

J10

GND
GND
GND

H9

GND
GND
GND
GND

G9

GND

G8

GND

H8

GND

G7

GND

E5

GND

A1

GND

J5

NC

K5

NC

M5

NC

12

12

R73

R115
100K_0402_5%

TOSHIBA T7L65XB 2/2

VOLTAGE/GROUND NC

PC CARD I/F SLOTA

+3VC

12

R101

100K_0402_5%

12

R120
100K_0402_5%

SLTA30/D0/CAD27
SLTA31/D1/CAD29

SLTA32/D2/RESERVED

SLTA2/D3/CAD0
SLTA3/D4/CAD1
SLTA4/D5/CAD3
SLTA5/D6/CAD5

SLTA6/D7/CAD7
SLTA64/D8/CAD28
SLTA65/D9/CAD30

SLTA66/D10/CAD31

SLTA37/D11/CAD2
SLTA38/D12/CAD4
SLTA39/D13/CAD6

SLTA40/D14/RESERVED

SLTA41/D15/CAD8
SLTA29/A0/CAD26

SLTA28/A1/CAD25
SLTA27/A2/CAD24
SLTA26/A3/CAD23
SLTA25/A4/CAD22
SLTA24/A5/CAD21
SLTA23/A6/CAD20
SLTA22/A7/CAD18

SLTA12/A8/CCBE#1

SLTA11/A9/CAD14

SLTA8/A10/CAD9

SLTA10/A11/CAD12

SLTA21/A12/CCBE#2

SLTA13/A13/CPAR

SLTA14/A14/CPERR#

SLTA20/A15/CIRDY#

SLTA19/A16/CCLK

SLTA46/A17/CAD16

SLTA47/A18/RESERVED

SLTA48/A19/CBLOCK#

SLTA49/A20/CSTOP#

SLTA50/A21/CDEVSEL#

SLTA53/A22/CTRDY#

SLTA54/A23/CFRAME#

SLTA55/A24/CAD17
SLTA56/A25/CAD19

SLTA63/BVD1/CSTSCHG

SLTA62/BVD2/CAUDIO

SLTA36/CD#1/CCD#1
SLTA67/CD#2/CCD#2
SLTA16/BSY#/CINT#

SLTA59/WAIT#/CSERR#

SLTA33/WP#/CCLKRUN#

SLTA60/INPACK#/CREQ#

SLTA7/CE#1/CCBE#0

SLTA42/CE#2/CAD10

SLTA15/WE#/CGNT#

SLTA44/IORD#/CAD13

SLTA45/IOWR#/CAD15

SLTA9/OE#/CAD11

SLTA43/VS1/CVS1
SLTA57/VS2/CVS2

SLTA61/REG#/CCBE#3

SLTA58/RESET/CRST#

T7L65XB_BGA256

12

R113

100K_0402_5%

12

R119
100K_0402_5%

12

R93

100K_0402_5%

12

R111
100K_0402_5%

2

D7
B6
D6
F12
F16
F14
E16
E14
A6
C6
E6
F15
F13
E15
E13
D15

B7
D8
B8
E8
A9
C9
D9
B10
B14
C14
D14
C16
D10
C13
A13
B11
B15
A14
B13
D12
B12
D11
C11
A11
C10
A10

C7
A7
G14
G16
A12
E9
D5
A8

D16
E12
C12
C15
A15
D13
G13
G15
C8
B9

S1_A[0..25] 28
S1_D[0..15] 28

S1_D0

S1_D1
S1_D2
S1_D3
S1_D4
S1_D5
S1_D6
S1_D7
S1_D8

S1_D9
S1_D10
S1_D11
S1_D12
S1_D13
S1_D14
S1_D15

S1_A0

S1_A1

S1_A2

S1_A3

S1_A4

S1_A5

S1_A6

S1_A7

S1_A8

S1_A9
S1_A10
S1_A11
S1_A12
S1_A13
S1_A14
S1_A15
S1_A16
S1_A17
S1_A18
S1_A19
S1_A20
S1_A21
S1_A22
S1_A23
S1_A24
S1_A25

S1_BVD1
S1_BVD2
S1_CD1#
S1_CD2#
S1_RDY#
S1_WAIT#
S1_WP
S1_INPACK#

S1_VS1
S1_VS2

S1_RST

12

R96
100K_0402_5%

S1_BVD1 28
S1_BVD2 28
S1_CD1# 28
S1_CD2# 28
S1_RDY# 28
S1_WAIT#28

S1_WP 28

S1_INPACK# 28
S1_CE1# 28

S1_CE2# 28

S1_WE# 28

S1_IORD# 28
S1_IOWR# 28

S1_OE# 28
S1_VS1 28
S1_VS2 28

S1_REG# 28
S1_RST 28

12

R88
100K_0402_5%

1

FUZZY SIGNAL
RESERVED
PULL UP/DOWN

EXSMI#

TOPICREG

R102

@10K_0402_5%

R76

1 2

0_0402_5%

12

+3VC

PC CARD PULL-UP
REQUIREMENT
BASE ON
16-BIT PC-CARD
STANDARD R7
ELECTRICAL SPECIFICATION

**

A A

R608

+3VC

12

@1K_0402_5%

12

C785 @0.1U_0402_10V6K

+3VALW +3VALW

147

U55E

PG

1011

OI

SN74LVC14APWLE_TSSOP14

5

147

U55F

PG

1213

OI

SN74LVC14APWLE_TSSOP1 4

1 2

4

R609

@0_0402_5%

PCLR#

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Compal Electronics, Inc.

Title

CardBus Controller<T7 L65XB>

Size Document Number Rev

Custom

LA-1911

Date: Sheet of

27 57Friday, August 08, 2003

1

0.2

CARDBUS SOCKET

S1_A[0..25]27
S1_D[0..15]27

S1_D3
S1_D4
S1_D5
S1_D6
S1_D7

S1_CE1#27

S1_OE#27

S1_WE#27

S1_RDY#27

+S1_VCC
+S1_VPP

S1_WP27

S1_CE1#
S1_A10
S1_OE#
S1_A11
S1_A9
S1_A8
S1_A13
S1_A14
S1_WE#
S1_RDY#

S1_A16
S1_A15
S1_A12
S1_A7
S1_A6
S1_A5
S1_A4
S1_A3
S1_A2
S1_A1
S1_A0
S1_D0
S1_D1
S1_D2
S1_WP S1_CD2#

S1_A[0..25]
S1_D[0..15]

1
3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83

FOXCONN_1CA415M1-TA_68P

JP26

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND

PCMCIA POWER CTRL.

+5V

+3V

C206

0.1U_0402_16V4Z
C228

0.1U_0402_16V4Z
C188

0.1U_0402_16V4Z
C236

0.1U_0402_16V4Z
C226

0.1U_0402_16V4Z
C245

0.1U_0402_16V4Z

SD_PWREN27

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

54

56

56

58

58

60

60

62

62

64

64

66

66

68

68

70
72
74
76
78
80
82
84

S1_CD1#
S1_D11
S1_D12
S1_D13
S1_D14
S1_D15
S1_CE2#
S1_VS1
S1_IORD#
S1_IOWR#
S1_A17
S1_A18
S1_A19
S1_A20
S1_A21

S1_A22
S1_A23
S1_A24
S1_A25
S1_VS2
S1_RST
S1_WAIT#
S1_INPACK#
S1_REG#
S1_BVD2
S1_BVD1
S1_D8
S1_D9
S1_D10

S1_CD1# 27

S1_CE2# 27
S1_VS1 27
S1_IORD# 27
S1_IOWR# 27

+S1_VCC
+S1_VPP

S1_VS2 27
S1_RST 27
S1_WAIT# 27
S1_INPACK# 27
S1_REG# 27
S1_BVD2 27
S1_BVD1 27

S1_CD2# 27

SD SOCKET POWER SWITCH

**

C797 0.1U_0402_16V4Z

1 2

C798 0.1U_0402_16V4Z

1 2

C799 1U_0603_10V4Z

SD_WP27

SD_DAT127
SD_DAT027

SD_CLK27

SD_CMD27
SD_DAT327

SD_DAT227

MMC_DET#27

1 2

10K_0804_8P4R_5%

RP110

VC3ENA27
VC5ENA27

VPEN0A27
VPEN1A27

+3V

+5V

+3V

+SD3_VCC +3VC

1 8

2 7

3 6

4 5

R517

1 2

@15_0402_5%

SD_PWREN

12

R500
10K_0402_5%

VC3ENA
VC5ENA
VPEN0A
VPEN1A

C707

1 2

@15P_0402_50V8J

U10

27

AVCC3IN

1
3

23

6
5
7
8

15 16
17

9

20
19
21
22

Slot A

AVCC5IN

Power

AVCC5IN

Supply

AVPPIN
AVCC3_EN

AVCC5_EN
AEN0
AEN1

Slot B

BVCC5IN BVCCOUT

Power

BVCC5IN

Supply

BVPPIN
BVCC3_EN

BVCC5_EN
BEN0
BEN1

MIC2563A-0BSM_SSOP28

**

MMC_DET#

VSS

12

12

13

12

R461
@10K_0402_5%

JP3

11 10

Wr_Pt Wr_Pt_Vss

8

DAT1

7

DAT0

6

Vss2

5

SDCLK

4

Vdd

3

Vss1

2

CMD

1

DAT3

9

DAT2

SD_SOCKET

R217
10K_0402_5%

2

AVCCOUT

26

AVCCOUT

28

AVCCOUT

24

AVPPOUT

11

NC0

25

NC1

1213

BVCCOUTBVCC3IN

14

BVCCOUT

10

BVPPOUT

4

GND

18

GND

PIN PULL DOWN

VC3ENA
VC5ENA
VPEN0A
VPEN1A

SD_PWREN

W=40mils

W=40mils

C181

4.7U_0805_10V4Z

RP25

1 8
2 7
3 6
4 5

47K_0804_8P4R_5%

R147

1 2

47K_0402_5%

+S1_VCC

+S1_VPP

+SD3_VCC

SLOT 1 VCC DECOUPLING SLOT 1 VPP DECOUPLING

+S1_VCC

C293

4.7U_0805_10V4Z

0.1U_0402_16V4Z

+S1_VCC

C265

10U_1206_10V4Z

C199

C259

0.1U_0402_16V4Z

C297

0.1U_0402_16V4Z C613

C308

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C195

C203

1000P_0402_50V7K

+S1_VPP

W =30mils

C307

0.01U_0402_25V4Z

C180
1U_0805_25V4Z

+3V DECOUPLING

1

C601

2

**

1

C609

2

0.1U_0402_16V4Z

0.01U_0402_16V7K

1

C592

2

+3VC

1

C596

2

0.1U_0402_16V4Z

0.01U_0402_16V7K

1

C610

2

0.01U_0402_16V7K

1

C602

2

0.01U_0402_16V7K

1

2

+3VC

0.1U_0402_16V4Z

C104

4.7U_0805_10V4Z

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0.01U_0402_16V7K

1

C597

2

0.01U_0402_16V7K

Title

Size Document Number Rev

Custom

Date: Sheet of

1

C599

2

Compal Electronics, Inc.

PCMCIA/SD SOCKE T

LA-1911

0.01U_0402_16V7K

1

C615

2

28 57Friday, August 08, 2003

0.2

WL_OFF#37
KILL_SW#37,39

+3VS_MINIPCI

+3V

0_0603_5%

CLK_PCI_MINI

12

R520
@33_0402_5%

12

C711
@10P_0402_50V8K

L20

1 2

CLK_PCI_MINI15

+3V

C779 0.1U_0402_16V4Z

U54

5

1
2

W=40mils

PM_CLKRUN#24,26,27,30,34,37

4

TC7SH08FU_SSOP5

3

PCI_PIRQH#23

PCI_REQ#123

PCI_C/BE#323,26,27,30

PCI_C/BE#223,26,27,30

PCI_IRDY#23,26,27,30

PCI_SERR#23,26,27,30

PCI_PERR#23,26,27,30
PCI_C/BE#123,26,27,30

+5VS_MINIPCI

CLK_PCI_MINI

+5VS

L14 0_0603_5%

+5VS_MINIPCI

LAN RESERVED

RB751V_SOD323

PCI_PIRQH#

PCI_AD31
PCI_AD29

PCI_AD27
PCI_AD25

PCI_AD23
PCI_AD21

PCI_AD19
PCI_AD17

PCI_AD14
PCI_AD12

PCI_AD10
PCI_AD8

PCI_AD7
PCI_AD5
PCI_AD3
PCI_AD1

1 2

0603

PCI_AD[0..31]

PCI_AD[0..31] 23,26,27,30

MINI_PCI SOCKET

TIP RING

D38

21

W=30mils

W=30mils W=20mils

JP24

1 2

1 2

KEY KEY

3 4

3 4

5 6

5 6

7 8

7 8

9 10

9 10

11 12

11 12

13 14

13 14

15 16

15 16

17 18

17 18

19 20

19 20

21 22

21 22

23 24

23 24

25 26

25 26

27 28

27 28

29 30

29 30

31 32

31 32

33 34

33 34

35 36

35 36

37 38

37 38

39 40

39 40

41 42

41 42

43 44

43 44

45 46

45 46

47 48

47 48

49 50

49 50

51 52

51 52

53 54

53 54

55 56

55 56

57 58

57 58

59 60

59 60

61 62

61 62

63 64

63 64

65 66

65 66

67 68

67 68

69 70

69 70

71 72

71 72

73 74

73 74

75 76

75 76

77 78

77 78

79 80

79 80

81 82

81 82

83 84

83 84

85 86

85 86

87 88

87 88

89 90

89 90

91 92

91 92

93 94

93 94

95 96

95 96

97 98

97 98

99 100

99 100

101 102

101 102

103 104

103 104

105 106

105 106

107 108

107 108

109 110

109 110

111 112

111 112

113 114

113 114

115 116

115 116

117 118

117 118

119 120

119 120

121 122

121 122

123 124

123 124

KEYLINK_5305-4-211

LAN RESERVED

PCI_PIRQG#

W=40mils

W=30mils

PCIRST#

PCI_AD30
PCI_AD28

PCI_AD26
PCI_AD24

MINI_IDSEL

PCI_AD22
PCI_AD20

PCI_AD18
PCI_AD16

PCI_AD15
PCI_AD13
PCI_AD11

PCI_AD9

PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

+3V

C153

0.1U_0402_16V4Z

1 2

PCI_PIRQG# 23

+3V

PCIRST# 10,16,22,23,26,27,30,33,34,37
PCI_GNT#1 23
WLANPME# 26,27,30,37

1 2

100_0402_5%

R192

PCI_PAR 23,26,27,30

PCI_FRAME# 23,26,27,30
PCI_TRDY# 23,26,27,30
PCI_STOP# 23,26,27,30

PCI_DEVSEL# 23,26,27,30

PCI_C/BE#0 23,26,27,30

+5VS_MINIPCI

+3VS_MINIPCI

W=40mils

PCI_AD18

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

IDSEL : PCI_AD18

L21

1 2

0_0603_5%

12

C143
1000P_0402_50V7K

C209

0.1U_0402_16V4Z

1 2

+3V

C184

0.1U_0402_16V4Z

1 2

C250

0.1U_0402_16V4Z

1 2

C321

0.1U_0402_16V4Z

1 2

C299

0.1U_0402_16V4Z

1 2

C251

0.1U_0402_16V4Z

1 2

+5VS_MINIPCI

1

C328
10U_1206_10V4Z

2

+3VS_MINIPCI

C280

0.1U_0402_16V4Z

1 2

1

C288
10U_1206_10V4Z

2

Compal Electronics, Inc.

Title

MINI_PCI

Size Document Number Rev

B

LA-1911

Date: Sheet of

29 57Friday, August 08, 2003

0.2

A

B

C

D

E

+3VS

1 2

4.7K_0402_5%

R385

1 2

10K_0402_5%

+3VS

1 1

PCI_PAR23,26,27,29
PCIRST#10,16,22,23,26,27,29,33,34,37

220_0402_5%

PCI_AD[0..31]

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8

PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0

CLK_PCI_1394

PCI_GNT#0
PCI_REQ#0
1394_IDSEL

PCI_FRAME#

PCI_IRDY#
PCI_TRDY#

PCI_DEVSEL#

PCI_STOP #
PCI_PERR#
PCI_PIRQE#
1394_PME#
PCI_SERR#
PCI_PAR

PCIRST# TPA0+

R42

1 2

PCI_AD[0..31]23,26,27,29

2 2

IDSEL:PCI_A D16

PCI_AD16

3 3

4 4

1 2

R416

CLK_PCI_1394

1394_IDSEL

100_0402_5%

PCI_C/BE#323,26,27,29
PCI_C/BE#223,26,27,29
PCI_C/BE#123,26,27,29
PCI_C/BE#023,26,27,29

CLK_PCI_139415

PCI_GNT#023
PCI_REQ#023

PCI_FRAME#23,26,27,29

PCI_IRDY#23,26,27,29

PCI_TRDY#23,26,27,29

PCI_DEVSEL#23,26,27,29

PCI_STOP #23,26,27,29

PCI_PERR#23,26,27,29

PCI_PIRQE#23

1394_PME#26,27,29,37

PCI_SERR#23,26,27,29

PM_CLKRUN#24,26,27,29,34,37

12

R428
@10_0402_5%

C583
@10P_0402_50V8K

84
82
81
80
79
77
76
74
71
70
69
67
66
65
63
61
46
45
43
42
41
40
38
37
32
31
29
28
26
25
24
22
34
47
60
73
16
18
19
36
49
50
52
53
54
56
13
21
57
58
12
85

14
89

90

R43
220_0402_5%

1 2

U36

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_C/BE3
PCI_C/BE2
PCI_C/BE1
PCI_C/BE0
PCI_CLK
PCI_GNT
PCI_REQ
PCI_IDSEL
PCI_FRAME
PCI_IRDY
PCI_TRDY
PCI_DEVSEL
PCI_STOP
PCI_PERR
PCI_INTA/CINT
PCI_PME/CSTSCHG
PCI_SERR
PCI_PAR
PCI_CLKRUN
PCI_RST

G_RST
GPIO3

GPIO2

PLLGND1

89109

2035486278

VDDP

VDDP

VDDP

TSB43AB21
/(TSB43AB22)

PCI BUS INTERFACE

REG_EN

AGND

AGND

AGND

AGND

AGND

AGND

AGND

DGND

110

111

117

126

127

1281723303344556468758393103

87

VDDP

VDDP

CYCLEIN

BIAS CURRENT

OSCILLATOR

FILTER

EEPROM 2 WIRE BUS

POWER CLASS

PHY PORT 1

DGND

REG18

DGND

DGND

DGND

DGND

DGND

C586

0.1U_0402_16V4Z

DGND

R386

1 2

R384

1 2

R427
R429 4.7K_0402_5%

869610

11

DVDD

CNA

DVDD

TEST17

TEST16

DVDD
DVDD
DVDD
DVDD
DVDD
DVDD

PLLVDD

CYCLEOUT/CARDBUS

AVDD
AVDD
AVDD
AVDD
AVDD

CPS

NC/(TPBIAS1)

NC/(TPA1+)

NC/(TPA1-)

NC/(TPB1+)

NC/(TPB1-)

R0

R1
X0

X1

FILTER0
FILTER1

SDA

SCL
PC0

PC1
PC2

TPBIAS0

TPA0+

TPA0-

TPB0 +

TPB0 -

TEST9
TEST8

TEST3
TEST2
TEST1
TEST0

DGND

REG18

DGND

TSB43AB21_PQFP128

C509

0.1U_0402_16V4Z

4.7K_0402_5%

4.7K_0402_5%

12

15
27
39
51
59
72
88
100
7
1
2
107
108
120

1 2

106

R403

125
124
123
122
121

R68 6.34K_0603_1%

118

119
6

5

C81

3

0.1U_0402_16V4Z

4

1 2

92

R45

1 2

91

R44

99
98
97

TPBIAS0

116
115

TPA0-

114

TPB0+

113

TPB0-

112

94
95

101
102
104
105

1394_PLLVDD

+3VS

1K_0402_5%

1 2

220_0402_5%
220_0402_5%

+3VS

C519

0.1U_0402_16V4Z

0.01U_0402_25V4Z

C588 22P_0402_50V8J

X5

24.576MHz_16P_3XG-24576-43E1

C587 22P_0402_50V8J

C520

0.1U_0402_16V4Z

C582

L7
BLM21A601SPT_0805

1 2

C108

4.7U_0805_10V4Z

R422

56.2_0603_1%

R415

56.2_0603_1%

C543
220P_0402_50V8K

C544

0.1U_0402_16V4Z

+3VS

C584
1000P_0402_50V7K

+3VS

R420

56.2_0603_1%

R411

56.2_0603_1%

R407

5.11K_0603_1%

C554

0.1U_0402_16V4Z

C62
1000P_0402_50V7K

1

C579

0.33U_0603_16V4Z

2

C565

0.1U_0402_16V4Z

JP20

4

4

3

3

2

2

1

1

FOX_UV31413-T1_4P

C77

0.1U_0402_16V4Z

C84
1000P_0402_50V7K

C79

0.1U_0402_16V4Z

C82
1000P_0402_50V7K

C585

0.1U_0402_16V4Z

C58
1000P_0402_50V7K

Compal Electronics, Inc.

Title

PROPRIETARY NOTE

A

B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

1394 Interface

Size Document Number Rev

B

LA-1911

Date: Sheet of

30 57Friday, August 08, 2003

E

0.2

5

U57A
74HCT4066

13

U57C
74HCT4066

5

POWER ON PATH

AMP_RIGHT

+5VALWP

+5VAMP

D D

+5VAMP

R617

1M_0402_5%

R621

1M_0402_5%

SUSP#33,37,38,43,49,51 SUSP19,43,50

AC97_L AMP_LEFT

12

12

R619
1M_0402_5%

AC97_R

12

12

R623
1M_0402_5%

SUSP#

147

1 2

+5VALWP

147

4 3

***

4

INT_CD_L

+5VAMP

INT_CD_R

+5VAMP

R634 0_0402_5%

1 2

C802

1U_0603_10V6K

R618

1M_0402_5%

C803

1U_0603_10V6K

R622
1M_0402_5%

12

12

12

12

R620
1M_0402_5%

R624
1M_0402_5%

+5VALWP

147

11 10

U57B
74HCT4066

12

+5VALWP

147

8 9

U57D
74HCT4066

6

3

DIRECT PLAY PATH

***

AMP_LEFT

AMP_RIGHT

AMP_LEFT 32

AMP_RIGHT 32

2

+5VALWP TO +5VLDO

10K_0402_5%

CD_PLAY33,37

CD_PLAY

+5VALWP

12

1

G

2

B+

12

R136

1

D

G

2

2N7002_SOT23

D

Q41

S

3

R459
10K_0402_5%

2N7002_SOT23

Q14

S

3

SI4800DY_SO8

1

C807

2

LM431SC_SOT23

1U_0805_25V4Z

1

A

D51

***

1

+5VALWP

876

5

DDD

D

SSS

G

U59

123

4

+5VLDO

(4.5V)

12

R456

3.9K_0603_1%

2

K

3

R

12

R455

4.99K_0603_1%

L62

@CHB2012U170_0805

CHB2012U170_0805

C282
10U_1206_10V4Z

CD_GNA

C262 1U_0603_10V6K
C284 1U_0603_10V6K

R474

C658 1U_0603_10V6K

1 2

**

L12

1 2

LINEIN_L
LINEIN_R
CD_L
CD_R

C_MIC

C_MD_SPK

12

R476 100_0402_5%

EAPD32

+AVDD_AC97

25

AVDD1

14

AUX_L

15

AUX_R

16

VIDEO_L

17

VIDEO_R

23

LINE_IN_L

24

LINE_IN_R

18

CD_L

20

CD_R

19

CD_GND

21

MIC1

22

MIC2

13

PHONE

12

PC_BEEP

11

RESET#

10

SYNC

5

SDATA_OUT

45

NC

46

XTLSEL

47

EAPD

48

SPDIFO

4

DVSS1

7

DVSS2

ALC202_E_LQFP48

38

AVDD2

U44

LINE_OUT_L

LINE_OUT_R

MONO_OUT

TRUE_LOUT_L

TRUE_LOUT_R

BIT_CLK

SDATA_IN

XTL_OUT

VREFOUT

1

DVDD1

XTL_IN

AFILT1
AFILT2

VREF

VRDA

VRAD

DCVOL

VAUX
GPIO0
GPIO1

AVSS1
AVSS2

+3VS

C654

0.1U_0402_16V4Z

9

DVDD2

LINEL

35

LINER

36
37
39
41

6

1 2

R177 22_0402_5%

8

1 2

R178 22_0402_5%

2

3
29
30
28

1 2

R210 0_0402_5%

27
32

31
33

1 2

34

R209 @0_0402_5%

43
44

40

NC

AGND

26
42

AGNDDGND

C252
10U_1206_10V4Z

C696 @1000P_0402_50V7K

C695 @1000P_0402_50V7K
C702 1U_0603_10V6K
C703 1U_0603_10V6K

****

1 2

C238 15P_0402_50V8J

1 2

R173 @10K_0402_5%

R195

1 2

@0_0603_5%

R162

1 2

+AUD_VREF

+AVDD_AC97

@1M_0402_5%

C306 1000P_0402_50V7K

C694 1000P_0402_50V7K

AC97_L
AC97_R

ICH_AC_BITCLK 24,36
ICH_AC_SDIN0 24

24.576MHz_16P_3XG-24576-43E1

X6

1 2

1

C652
22P_0402_25V8K

2

C314

C689

1U_0603_10V6K

C705

0.01U_0402_25V4Z

1

C653
22P_0402_25V8K

2

C688

1U_0603_10V6K

0.1U_0402_16V4Z

****

C700

+5VAMP

AC97 Codec

+VDDA

C687

C C

B B

0.1U_0402_16V4Z

+5VALWP TO +5VLDO

+5VLDO +5VAMP

MIC32

MD_SPK36

1

C781

0.1U_0402_10V6K

2

CHB2012U170_0805

CHB2012U170_0805

1 2

R212 0_0402_5%

@0.01U_0402_25V4Z
C646

10K_0402_5%

ICH_AC_RST#24,36

ICH_AC_SYNC24,36

ICH_AC_SDOUT24,36

L11

1 2

L10

1 2

R477

***

MONO_IN32

R188
@0_0402_5%

1 2

12

1 2

0_0402_5%

+5VLDO DECOUPLING

+5VLDO

1U_0603_10V4Z

LINE_IN_L32

LINE_IN_R32

INT_CD_L33

INT_CD_R33

CD_AGND To CD_GNA Bypass Analog Reference V

1U_0603_10V6K

1

C173

2

(4.5V)

1

C179

2

1U_0603_10V4Z

R225 6.8K_0402_5%
R228 6.8K_0402_5%
R226 6.8K_0402_5%
R227 6.8K_0402_5%
R513 20K_0402_1%
R514 20K_0402_1%
R515 6.8K_0402_5%
R512 6.8K_0402_5%

CD_AGND33

12

+

C589

150U_D2_6.3VM

1

C99

2

0.1U_0402_10V6K

12
12
12
12
12
12
12
12

R186

20K_0402_1%

12

R187
0_0402_5%

1

C97

22U_1206_10V4Z

2

1

C106

2

0.1U_0402_10V6K

C303 1U_0603_10V6K
C304 1U_0603_10V6K
C692 1U_0603_10V6K
C693 1U_0603_10V6K

12

12

+5VLDO

(4.5V)

1

C102

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z

LINEIN_L
LINEIN_R

CD_L
CD_R

CD_GNA

R184

6.8K_0402_5%

+5VALWP DECOUPLING

1

C115

2

+5VALWP

1

C634

2

22U_1206_10V4Z

22U_1206_10V4 Z

1

2

C636

1

C635

2

1U_0603_10V4Z

1

C633

2

1U_0603_10V4Z

DGND To AGND BypassAudio Signal Bias Circuit

Remove Bypass R
**

DGND

AGND

+AUD_VREF

****

C291

C317

0.1U_0402_16V4Z

1U_0603_10V6K

PROPRIETARY NOTE

+5VALWP

C809

4.7U_0805_10V4Z

A A

5

4

C810

0.1U_0402_16V4Z

SUSP#

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Adjustable Output

U61

4

VIN

2
7 1
8

VOUT

SENSE

DELAY
ERROR CNOISE
ON/OFF#

GND

SI9182DH-AD_MSOP8

3

R637

69.8K_0603_1%

1 2

R638
24K _0402_1%

1 2

+VDDA

+VDDA

C811

4.7U_0805_10V4Z

2

Compal Electronics, Inc.

Title

AC97 Codec

Size Document Number Rev

Custom

LA-1911

Date: Sheet of

31 57Friday, August 08, 2003

1

0.2

5
6

3

C812

0.1U_0402_16V4Z

A

B

C

D

E

+5VAMP

Audio Amplifier

+5VAMP

W=40Mil

12

12

C714

C721

12

C337

4.7U_0805_10V4Z

U48

7

PVDD

SHUTDOWN#

18

PVDD

19

VDD

2

PC-ENABLE

3

VOLUME

4

LOUT+

21

ROUT+

5

LLINEIN

23

RLINEIN

6

LHPIN

20

RHPIN

17

CLK

TPA0232

C805

0.047U_0402_16V4Z

SE/BTL#

PC-BEEP

BYPASS

LOUT-

ROUT-

LIN

RIN

GND
GND
GND
GND

4 4

0.1U_0402_16V4Z

NBA_PLUG

1 2
1 2

12

R238

1.5K_0603_5%

VOL_AMP

C744
1U_0603_10V6K
C332
1U_0603_10V6K

HP_L
HP_R

0.1U_0402_16V4Z

VOL_AMP38

AMP_LEFT31

AMP_RIGHT31

3 3

0.47U_0603_16V4Z

AMP_LEFT
AMP_RIGHT

0.47U_0603_16V4Z

0.47U_0603_16V4Z

AMP_LEFT
AMP_RIGHT

0.47U_0603_16V4Z

C326

C325

C327
C323

** **

R241

1.5K_0603_5%

INTSPK_L1
INTSPK_R1

1 2
1 2

1 2
1 2

12

fo=1/(2*3.14*R*C)=225Hz
R=1.5K / C=0.47U

SHUTDOWN#

R230

100K_0402_5%

22

NBA_PLUG

15

C804 0.1U_0402_16V4Z

14
11
9
16
10
8

1
12
13
24

C339

0.47U_0603_16V4Z

+5VAMP

1 2

INTSPK_L2
INTSPK_R2

C335

1 2

0.47U_0603_16V4Z

12

R553
100K_0402_5%

Q52
2N7002_SOT 23

13

D

G

S

C340

1 2

R629 0_0402_5%

2

1 2

12

***

R633
10K_0402_5%

0.47U_0603_16V4Z

EAPD 31

Left Speaker Connector

@V-PORT-0603-220 M-V05_0603

Right Speaker Connector

@V-PORT-0603-220 M-V05_0603

LINE IN JACK

LINE_IN_R31

LINE_IN_L31

D62

INTSPK_L1
INTSPK_L2

INTSPK_R1
INTSPK_R2

L48

1 2

FBM-11-160808-700T_0603

1 2

L47

FBM-11-160808-700T_0603

2 1

D58

2 1

330P_0402_50V7K

D61

@V-PORT-0603-220 M-V05_0603

L58 FBM-11-160808-121-T_0603

2 1

D57

2 1

LINE_IN_R-1
LINE_IN_L-1

C761

1 2
1 2

L59 FBM-11-160808-121-T_0603

L60 FBM-11-160808-121-T_0603

1 2
1 2

L61 FBM-11-160808-121-T_0603

@V-PORT-0603-220 M-V05_0603

12

12

C764
330P_0402_50V7K

JP11

1
2

MOLEX_53398-0290

JP10

1
2

MOLEX_53398-0290

JP28

5
4
3

6
2
1

FOXCONN JA6033L-5S1-TR

HEADPHONE OUT JACK

EC Beep

BEEP#37

9 8

2 2

I O

SN74LVC125APWLE_T SSOP14

10

U4C

OE#

+3V POWER

+3V

12

1 2

R81
100K_0402_5%

R446

8.2K_0402_5%

1

2

+3V

147

U39A
SN74LVC14APWLE_T SSOP14

PG

OI

+3V POWER

C121

0.22U_0603_10V7K

1 2

C96

0.1U_0402_16V4Z

21

1 2

C120
1U_0603_10V6K

1 2

R97
560_0402_5%

CardBus Beep

PCM_SPK#27

PCI Beep

1 1

SPKR24

+3V

147

PG

43

OI

+3V POWER

U39B
SN74LVC14APWLE_T SSOP14

A

1 2

1 2

1 2

C93
1U_0603_10V6K

1 2

C604
1U_0603_10V6K

R438
10K_0402_5%

R95
560_0402_5%

R440
560_0402_5%

12

D50

RB751V_SOD323

2 1

B

System Beep To AC97' Codec

+AVDD_AC97

12

R117
10K_0402_5%

12

R107
10K_0402_5%

1

C

2

BEQ37

3

PROPRIETARY NOTE

1

C140
10U_1206_10V4Z

2

1 2

C174
1U_0603_10V6K

R118

2SC2411K_SOT23

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2.4K_0402_5%

1 2

MONO_IN

C

MONO_IN 31

C392

150U_D2_6.3VM

INTSPK_R1-2INTSPK_R1

+

1 2

INTSPK_L1 INTSPK_L1-4

INTSPK_L1-2

+

1 2

C391

150U_D2_6.3VM

MICROPHONE IN JACK

R578
@18K_0603_1%

+5VAMP

MIC31

1 2
1 2

R576

@18K_0603_1%

@100K_0402_5%

MIC

1 2

FBM-11-160808-700T_0603

L49

R583

D

R587
47_0402_5%

1 2
1 2

R586
47_0402_5%

12

INTSPK_R1-3
INTSPK_L1-3

C768
@1U_0603_10V4Z

R580

@2.2K_0402_5%

MIC-1

220P_0402_50V8K

Title

Size Document Number Rev

Date: Sheet of

NBA_PLUG38

L51

1 2

FBM-11-160808-700T_0603

1 2

L50

FBM-11-160808-700T_0603

INTSPK_R1-4

C769

330P_0402_50V7K

***

+5VAMP

Q57

2

@2SC2411K-CQ_SOT23

C766

3 1

12

12

R582 0_0402_5%

R581

12

2.2K_0402_5%

1 2

Compal Electronics, Inc.

AMP & Audio Jack

Custom

LA-1911

NBA_PLUG

12

12

C773

330P_0402_50V7K

JP29

5
4
3

6
2
1

FOXCONN JA6033L-5S1-TR

JP30

5
4
3

6
2
1

FOXCONN JA6033L-5S1-TR

+AUD_VREF

32 57Friday, August 08, 2003

E

0.2

IDE_PDIOW#24
IDE_PDIOR#24

R279

15_0402_5%

C381

15P_0402_50V8J

12

12

12

12

IDE_PDD[0..15]24

R280
15_0402_5%

C382

15P_0402_50V8J

IDE_PDDREQ24

IDE_PDIORDY24
IDE_PDDACK#24

IDE_IRQ1423
IDE_PDA124
IDE_PDA024
IDE_PDCS1#24
PHDD_LED#37

+5VS

IDE_PDD[0..15]

1 2

R277

HDD CONNECT OR

PIDE_RST#
IDE_PDD7
IDE_PDD6 IDE_PDD9
IDE_PDD5
IDE_PDD4
IDE_PDD3
IDE_PDD2
IDE_PDD1
IDE_PDD0

IDE_PDDREQ
IDE_PDIOW#
IDE_PDIOR#

IDE_IRQ14
IDE_PDA1

IDE_PDCS1# IDE_PDCS3#

100K_0402_5%

+5VS

**

JP9

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44

ALLTOP_C17826-14401

PCSEL

IDE_PDA2IDE_PDA0

IDE_PDD8
IDE_PDD10

IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

1 2

R281

+5VS

470_0402_5%

IDE_PDA2 24
IDE_PDCS3# 24

+5VS

C385

0.1U_0402_16V4Z

EC_IDERST37

3

R80
10K_0402_5%

***

74HCT08PW_TSSOP14

PCMRST# 37

U60A

PCIRST#10,16,22,23,26,27,29,30,34,37

SIDERST#24,42

PCIRST#

PCIRST1#

74HCT08PW_TSSOP14

1 2

R602 10_0402_5%

U60C

9

I0

10

O

I1

PIDERST#23

+3V POWER

8

12 11

I O

SN74LVC125APWLE_T SSOP14

147

1

PG

I0

O

2

I1

74HCT08PW_TSSOP14

13

U4D

OE#

SIDE_RST#

U60B

4

I0

5

I1

R636 @0_0402_5%

PIDE_RST#PCIRST1#

6

O

+5VCD

IDE_SDIOW#24,42

IDE_SDIORDY24,42

IDE_IRQ1523,42
IDE_SDA124,42
IDE_SDA024,42

IDE_SDCS1#24,42
SHDD_LED#37

1 2

R268 100K_0402_5%

SHDD_LED#

IDE_SDD[0..15]24,42

+5VCD

R269

470_0402_5%

INT_CD_L INT_CD_R
CD_AGND
SIDE_RST#
IDE_SDD7
IDE_SDD6
IDE_SDD5
IDE_SDD4
IDE_SDD3
IDE_SDD2
IDE_SDD1
IDE_SDD0

1 2

INT_CD_L31 INT_CD_R 31
CD_AGND31

IDE_SDIOW#

IDE_IRQ15
IDE_SDA1
IDE_SDA0
IDE_SDCS1#

SHDD_LED#

IDE_SDD[0..15]

JP27

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50

ALLTOP_C12424-25001

IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15
IDE_SDDREQ
IDE_SDIOR#

IDE_SDDACK#

1 2

R270 100K_0402_5%

IDE_SDCS3#

1 2

C367 0.1U_0402_10V6K

IDE_SDDREQ 24,42

IDE_SDIOR# 24,42

IDE_SDDACK# 24,42

+5VCD

IDE_SDA2 24,42

IDE_SDCS3# 24,42

+5VCD
+5VCD

+5VALWP

+5VCD

+5VALWP

1 2

240K_0402_5%

R276

C390

1U_0805_25V4Z

Placea caps. near HDD
CONN.

+5VS

C383
1000P_0402_50V7K

C758
1000P_0402_50V7K

Place component's closely MODULE CONNECTOR.

1

2

1
2
3
4 5

R278 10K_0402_5%

SUSP# CD_PLAY

2

Q26

@DTC124EK_SOT23

C388
10U_1206_10V4Z

W=80mils

C759

4.7U_0805_10V4Z

U24

SI4425DY-T1_SO8

22K

S

D

S

D

S

D

G D

13

22K

C389
10U_1206_10V4Z

C365
1U_0805_25V4Z

8
7
6

+5VCD

C370
10U_1206_10V4Z

13

22K

2

22K

Q25

DTC124EK_SOT23

C387
1U_0805_25V4Z

C363

0.1U_0402_16V4Z

+5VCD

C369

0.1U_0402_16V4Z

C384

0.1U_0402_16V4Z

2

1

CD_PLAY 31,37SUSP#31,37,38,43,49,51

C372
10U_1206_10V4Z

+5VALWP

C376
1U_0805_25V4Z

1 2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Inc.

Title

IDE/ FDD MODULE CONN.

Size Document Number Rev

B

LA-1911

Date: Sheet of

33 57Friday, August 08, 2003

0.2

A

SUPER I/O SMsC FDC47N227

B

+3VS

C

D

E

1 1

LPC_AD[0..3]24,37

LPC_FRAME#24,37

PCIRST#10,16,22,23,26,27,29,30,33,37

2 2

12

10K_0402_5%

R247
R248

+3VS

3 3

12

10K_0402_5%

12

C364

4.7U_0805_10V4Z

1 2

R603 10_0402_5%

LPC_DRQ1#24

SERIRQ23,27,37
PM_CLKRUN#24,26,27,29,30,37

CLK_PCI_SIO15

CLK_14M_SIO15

PID[0..3]22

12

C352

0.1U_0402_16V4Z

+3VS

BT_DET#36

+3VS

FIR_EN#35

+3VS

LPC_AD[0..3]
LPC_AD0

LPC_AD1
LPC_AD2
LPC_AD3

R251 10K_0402_5%
R275 10K_0402_5%12

CLK_PCI_SIO
CLK_14M_SIO

PID[0..3]

1 2

R244 10K_0402_5%

1 2

R243 10K_0402_5%

12

C351

0.1U_0402_16V4Z

12

12

12

PID0
PID1
PID2
PID3

C371

0.1U_0402_16V4Z

R267
10K_0402_5%

U21

20

LAD0

21

LAD1

22

LAD2

23

LAD3

24

LFRAME#

25

LDRQ#

26

PCIRST#

27

LPCPD#

50

GPIO12/IO_SMI#

17

IO_PME#

30

SIRQ

28

CLKRUN#

29

PCICLK

19

CLK14

48

GPIO10

54

GPIO15

55

GPIO16

56

GPIO17

57

GPIO20

58

GPIO21

59

GPIO22

6

GPIO24

32

GPIO30

33

GPIO31

34

GPIO32

35

GPIO33

36

GPIO34

37

GPIO35

38

GPIO36

39

GPIO37

40

GPIO40

41

GPIO41

42

GPIO42

43

GPIO43

44

GPIO44

45

GPIO45

46

GPIO46

47

GPIO47

51

GPIO13/IRQIN1

52

GPIO14/IRQIN2

64

GPIO23/FDC_PP

18

VTR

53

VCC

65

VCC

93

VCC

7

VSS

31

VSS

60

VSS

76

VSS

LPC47N227 TQFP100 SUPER I/O

AUTOFD#/DRVDEN0#

PD0/INDEX#

PD1/TRK0

PD2/WRTPRT#

PD3/RDATA#

PD4/DSKCHG#

PD5

PD6/MTR0#

PD7

BUSY/MTR1#

PE/WDATA#

SLCT/WGATE#

ERROR#/HDSEL#

ACK#/DS1#

INIT#/DIR#

STROBE#/DS0#

SLCTIN#/STEP#

DTR2#
CTS2#
RTS2#
DSR2#

TXD2
RXD2

DCD2#

RI2#

DTR1#
CTS1#
RTS1#
DSR1#

TXD1
RXD1

DCD1#

RI1#

IRMODE/IRRX3

IRRX2
IRTX2

RDATA#
WDATA#
WGATE#

HDSEL#

DIR#

STEP#

DS0#

INDEX#

DSKCHG#

WRTPRT#

TRK0#
MTR0#

DRVDEN0
DRVDEN1

GPIO11/SYSOPT

68
69
70
71
72
73
74
75

79
78
77
81
80
66
82
83
67

100
99
98
97
96
95
94
92

89
88
87
86
85
84
91
90

63
61
62

16
10
11
12
8
9
5
13
4
15
14
3
1

2
49

LPD[0..7]

LPD0
LPD1
LPD2
LPD3
LPD4
LPD5
LPD6
LPD7

LPTBUSY
LPTPE
LPTSLCT
LPTERR#
LPTACK#

CTS#2
DSR#2

DCD#2
RI#2

DTR#1
CTS#1
RTS#1
DSR#1
TXD1
RXD1
DCD#1
RI#1

RDATA#
WDATA#
WGATE#

HDSEL#

FDDIR#

STEP#

DRV0#

INDEX#

DSKCHG#

WP#

TRACK0#

MTR0#

IRRX

LPD[0..7] 36

LPTBUSY 36
LPTPE 36
LPTSLCT 36
LPTERR# 36
LPTACK# 36
INIT# 36
LPTAFD# 36
LPTSTB# 36
SLCTIN# 36

1 2

R271 1K_0402_5%

1 2

R255 1K_0402_5%

IRMODE 35
IRRX 35
IRTXOUT 35

1 2

R252 @1K_0402_5%

1 2

R253 1K_0402_5%

+3VS

CLK_PCI_SIO CLK_14M_SIO

R262
@33_0402_5%

C366

1 2

1

@22P_0402_25V8K

2

1 2

R249
10K_0402_5%

1 8
2 7
3 6
4 5

RP65

18
27
36
45

+5VS

RP68

1K_8P4R_1206_5%

RP67

6
7
8
9

10

10P8R_1K

DSR#1
CTS#1
RI#1
DCD#1

4.7K_8P4R_1206_5%

IRRX

RDATA#
WP#
TRACK0#
INDEX#

MTR0#
DRV0# DSKCHG#

+5VS

STEP#
WGATE#

+5V

CTS#2
DSR#2
DCD#2
RI#2

RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1

5
4
3
2
1

R274
@10_0402_5%

1 2

12

C375
@15P_0402_50V8J

RP66

1 8
2 7
3 6
4 5

4.7K_8P4R_1206_5%

JP25

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

@96212-1011S

+5VS

FDDIR#
WDATA#
HDSEL#

+3VS+3VS

Base I/O Address

0 = 02Eh

*

1 = 04Eh

4 4

Compal Electronics, Inc.

Title

PROPRIETARY NOTE

A

B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

SUPER I/O

Size Document Number Rev

B

LA-1911

Date: Sheet of

34 57Friday, August 08, 2003

E

0.2

+USB_AS

C439
@150U_D2_6.3VM

C393
@150U_D2_6.3VM

1

+

C377

4.7U_0805_6.3VM

2

12

C767
100P_0402_50V8K

+USB_BS

+3VALW

+USB_AS

+5V

1

12

+

+

2

1

2

C444

0.1U_0402_16V4Z

+5V

12

C772

0.1U_0402_16V4Z

**

U29

1

GND

2

IN

3

EN1#

4

EN2#

TPS2042ADR_SO8

U53

1

GND

2

IN

3

IN

4 5

EN# OC#

TPS2041ADR_SO8

OC1#
OUT1
OUT2

OC2#

OUT
OUT
OUT

8
7
6
5

8
7
6

+USB_CS

FIR Module

+3VS

R579
47_1206_5%

1 2

+IR_VCC

12

C765

0.1U_0402_16V4Z

+IR_GND

IRRX34

IRRX

12

R358
100K_0402_5%

+3VALW

12

R584
100K_0402_5%

2
4
6
8

12

R359
100K_0402_5%

1 2

R357
47_0402_5%

1 2

R366
47_0402_5%

U52

IRED_C
RXD
VCC
GND

IR_VISHAY_TFDU6101E-TR4_8P

SD/MODE

1 2

R585
47_0402_5%

+3VS

IRED_A

TXD

MODE

12

C469

0.1U_0402_16V4Z

12

C770

0.1U_0402_16V4Z

1

C373
22U_1206_10V4Z

2

+IR_ANODE

1

IRTXOUT

3

IRMODE

5
7

USB_OC0#

USB_OC2#

USB_OC4#

1 2

R575
@3.3_1206_5%

1 2

R273

3.3_1206_5%

USB_OC0# 24

USB_OC2# 24

12

C470

0.1U_0402_16V4Z

USB_OC4# 24

IRTXOUT 34
IRMODE 34

USBP2-24

USBP2+24

Keep 20 mils minimum spacing

USBP4-24

USBP4+24

USBP0-24

USBP0+24

+IR_ANODE

USB4-

C24

@0.1U_0402_16V4Z

C23

@0.1U_0402_16V4Z

12

C442

+

150U_D2_6.3VM

USBP2­USBP2+

USBP4-

USBP4+

USBP0­USBP0+

C26

@0.1U_0402_16V4Z

C25

@0.1U_0402_16V4Z

C435

0.1U_0402_16V4Z

@V-PORT-0603-220 M-V05_0603

L32

2 3
1 4

L33

2 3
1 4

@JTS0402-03_4P

@V-PORT-0603-220 M-V05_0603

L52

2 3
1 4

@JTS0402-03_4P

@V-PORT-0603-220 M-V05_0603

USB2-

@0.1U_0402_16V4Z

USB2+USB4+

@0.1U_0402_16V4Z

@JTS0402-03_4P

+USB_BS

12

C445

+

150U_D2_6.3VM

USB0-

C774

USB0+

C771

D9

USB2­USB2+

USB4­USB4+

D6

+USB_CS

12

C776

+

150U_D2_6.3VM

USB0­USB0+

USBP0+
USBP2­USBP2+
USBP4­USBP4+

D8

@V-PORT-0603-220 M-V05_0603

2 1

2 1

D7

@V-PORT-0603-220 M-V05_0603

2 1

2 1

C425

0.1U_0402_16V4Z

C775

0.1U_0402_16V4Z

D59

D60

@V-PORT-0603-220 M-V05_0603

2 1

2 1

1 2

R589 0_0402_5%

1 2

R588 0_0402_5%

1 2

R342 0_0402_5%

1 2

R343 0_0402_5%

1 2

R344 0_0402_5%

1 2

R345 0_0402_5%

USB
CONNECTOR

JP15

1
2
3
4
5
6
7

SUYIN_2553A-08G1T-D_8P

8

USB
CONNECTOR

JP31

1
2
3
4

SUYIN_2569A-04G3T -A

USB0-USBP0-

USB0+

USB2-

USB2+

USB4-

USB4+

The component's most place

FIR_EN#34

1 2

R250 0_0402_5%

FIR_EN#

LOW FIR Poped
HIGH FIR Un-Poped

cloely IRDA MODULE.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Inc.

Title

USB Conn.

Size Document Number Rev

B

LA-1911

Date: Sheet of

35 57Friday, August 08, 2003

0.2

**

BlueTooth Interface

MDC CONN.

C527

USB6+
USB6-USBP6-

2

+3VS+5VS

C57
@0.1U_0402_16V4Z

Q4
@SI2301DS-T1_SOT23

L38 @CHB2012U170_0805

1 2

1 3

C489
@10U_1206_10V4Z

JP17

20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

@ACES_87153-2008

Bluetooth Connector

+BT_VCC

(Top Contact)

JP19

1 2
3 4
5 6
7 8
9 10
11 12
13 14

+3V

ICH_AC_SDOUT24,31

+3VS

ICH_AC_RST#24,31

R409 0_0402_5%

1 2

+3V_MDC
+3VS_MDC

L41 CHB1608B121_0603

+3V_MDC

1

C542
1U_0805_25V4Z

2

15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30

AMP 3-1565120-0 30P H:9MM

+3VS_MDC

1

2

+5VS_MDC

C562
1U_0805_25V4Z

1 2

L39 CHB1608B121_0603

R406

1 2

R413 0_0402_5%

+5VS_MDC

1

C521
1U_0805_25V4Z

2

MD_SPK 31

12

10K_0402_5%

ICH_AC_SYNC 24,31

1 2

R414 22_0402_5%

1 2

22_0402_5%

R419

+3VS

220P_0402_25V8K

C529

+5VS

ICH_AC_SDIN1 24

ICH_AC_BITCLK 24,31

BT_PWR37

Module ID

Indication for polarity of reset
Reset input High Active --> Low ,
Reset input Low Active --> Open

USBP6+24

USBP6-24

2

R393
@100K_0402_5%

1 2

13

22K

Q30

22K

@DTC124EK_SOT23

BT_DET#34

BT_RST#37

BT_WAKE_UP37

BT_DETACH37

USBP6+

R408 @0_0603_5%
R400 @0_0603_5%

+BT_VCC

C55
@0.1U_0402_16V4Z

Module ID

Module_Detect

BT_RESET#
BT_WAKE_UP

(MAX=200mA)

@0.1U_0402_16V4Z

PARALLEL POR T

INIT#34

SLCTIN#34

LPD[0..7]34

1 2

R4

1 2

R5

LPD[0..7]

LPTINIT#

33_0402_5%

LPTSLCTIN#

33_0402_5%

+5V_PRN

LPD0 FD0 LPD7 FD7

D1

LPTSTB#
AFD#/3M#

FD0
LPTERR#
FD1
LPTINIT#
FD2
LPTSLCTIN#
FD3

FD4
FD5
FD6
FD7
LPTACK#
LPTBUSY
LPTPE
LPTSLCT

2 1

RB420D_SOT 23

R1
33_0402_5%

1 2

1 2

R3 33_0402_5%

12

R2

2.2K_0402_5%
C1

1 2

220P_0402_50V8K

1

14

2

15

3

16

4

17

5

18

6

19

7

20

8

21

9
22
10
23
11
24
12
25
13

JP12
SUYIN_7843S-25G2T-01

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+5VS

LPTSTB#34

LPTAFD#34

LPTERR#34

LPTACK#34
LPTBUSY34

LPTPE34

LPTSLCT34

LPD1 FD1
LPD2 FD2
LPD3

+5V_PRN

109876

12345

RP70

1 8
2 7
3 6
4 5

68_8P4R_1206_5%

RP1

2.7K_10P8R_1206_5%

FD3
FD2 LPTSLCTIN#
FD1
FD0

FD4
FD5
FD6
FD7

+5V_PRN

FD3

+5V_PRN

1 8

LPD6 FD6

2 7

LPD5 FD5

3 6

LPD4 FD4

4 5

RP69
68_8P4R_1206_5%

109876

12345

RP2

2.7K_10P8R_1206_5%

LPTINIT#
LPTERR#
AFD#/3M#

LPTACK#
LPTBUSY
LPTPE
LPTSLCT

+5V_PRN

FD3
LPTSLCT IN#
FD2
LPTINIT#

LPTSLCT
LPTPE
LPTBUSY
LPTACK#

FD1
LPTERR#
FD0
AFD#/3M#

FD4
FD5
FD6
FD7

CP2

2
3
4 5

2
3
4 5

2
3
4 5

2
3
4 5

81
7
6

220P_1206_8P4C_50V8K
CP1

81
7
6

220P_1206_8P4C_50V8K
CP3

81
7
6

220P_1206_8P4C_50V8K
CP4

81
7
6

220P_1206_8P4C_50V8K

Compal Electronics, Inc.

Title

PARALLEL/MD C PORT

Size Document Number Rev

LA-1911

Date: Sheet of

36 57Friday, August 08, 2003

0.2

5

0.1U_0402_16V4Z

12

12

0.1U_0402_16V4Z

+RTCVCC +51AVCC

12

D D

C C

B B

A A

C745

C659

C264

0.1U_0402_16V4Z

+3VALW

+5VALW

Analog Board ID definition,
Please see page 3.

Ra

Rb

0.1U_0402_16V4Z

12

12

C723

0.1U_0402_16V4Z

1 2

12

C334

0.1U_0402_16V4Z

ECAGND

WLANPME#26,27,29,30
PCM_PME#26,27,29,30
1394_PME#26,27,29,30

LAN_PME#26,27,29,30

12

C336 0.01U_0402_25V4Z

RP48

1 8
2 7
3 6
4 5

10K_1206_8P4R_5%

RP46

10K_1206_8P4R_5%

+3VALW

1 2

1 2

18
27
36
45

R541
100K_0402_5%

R552
0_0402_5%

MODE#
FRD#
SELIO#
FSEL#

EC_SMB_DA2
EC_SMB_CK2
EC_SMB_DA1
EC_SMB_CK1

12

5

C267

1 2

1000P_0402_50V7K

+3VALW

L23
FBM-L11-160808-800LMT_0603

+3VALW

BATT_TEMPECAGND

AD_BID0

C735

0.1U_0402_16V4Z

C285

1 2

CLK_PCI_LPC15

R185
10K_0402_5%

EC_PME#

+3VALW

C257
1000P_0402_50V7K

1 2

@33_0402_5%

@22P_0402_25V8K

R501

C701

***

12

1

2

12

+3VS

R218 0_0402_5%

SERIRQ23,27,34

LPC_FRAME#24,34

LPC_AD024,34
LPC_AD124,34
LPC_AD224,34
LPC_AD324,34

+3VALW

TV_OUT_EN#39

KSO1738,39

EC_IDERST33

TP_CLK38
TP_DATA38

LID_SW#39

HDD_LED#39

EC_SMI#24
S4_SATA40
WL_OFF#29

EC_SWI#24

BT_RST#36
S4_LATCH40

VR_ON52

PCMRST#33

EC_RSMRST#24,41

SHDD_LED#33

CRY1

1 2

20M_0603_5%

X7

32.768KHz_12.5P_CM155
C656

10P_0402_50V8K

4

R221 4.7K_0402_5%

EC_SCI#24

GATEA2023

KBRST#23

KSI038
KSI138
KSI238
KSI338

SYSON40,43,49
SUSP#31,33,38,43,49,51

ENBKL16
BKOFF#22

FSEL#38

R478

12

4

R204 @0_0402_5%

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

EC_RST#

12

EC_SCI#

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

TP_CLK
TP_DATA
LID_SW#
HDD_LED#

EC_SMI#

SYSON
SUSP#
VR_ON

BKOFF#
FSEL#

CRY2

1 2

12

+51VDD

12

C295

0.1U_0402_16V4Z

7
8

9
15
14
13
10
18
19
22
23

31

5

6

71
72
73
74
77
78
79
80

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68

105
106
107
108
109

110
111
114
115
116
117
118
119

CRY1

158

CRY2

160

62
63
69
70
75
76 143

148
149
155
156

3

4
27
28

173
174

47

R469
120K_0402_5%

C647
12P_0402_50V8J

16

U45

SERIRQ
LDRQ#
LFRAME#
LAD0
LAD1
LAD2
LAD3
LCLK
RESET1#
SMI#
PWUREQ#

IOPD3/ECSCI#

GA20/IOPB5
KBRST/IOPB6

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15

TINT#
TCK
TDO
TDI
TMS

PSCLK1/IOPF0
PSDAT1/IOPF1
PSCLK2/IOPF2
PSDAT2/IOPF3
PSCLK3/IOPF4
PSDAT3/IOPF5
PSCLK4/IOPF6
PSDAT4/IOPF7

32KX1/32KCLKIN
32KX2

IOPJ2/BST0
IOPJ3/BST1
IOPJ4/BST2
IOPJ5/PFS
IOPJ6/PLI
IOPJ7/BRKL_RSTO IOPK0/A8

IOPM0/D8
IOPM1/D9
IOPM2/D10
IOPM3/D11
IOPM4/D12
IOPM5/D13
IOPM6/D14
IOPM7/D15

SEL0#
SEL1#
CLK

3445123

VDD

VCC1

VCC2

Host interface

Key matrix scan

JTAG debug port

PS2 interface

PORTJ-2

PORTM

GND1

GND2

GND3

GND4

173546

122

159

PROPRIETARY NOTE

+51AVCC+3VALW

136

VCC3

GND5

167

95

157

166

VCC4

VCC5

VCC6

AVCC

AD Input

DA output

PWM
or PORTA

PORTB

IOPB7/RING/PFAIL/RESET2

PORTC

P ORTD-1

IOPD2/EXWINT24/RESET2

PORTE

IOPE7/CLKRUN/EXWINT46

PORTH

PORTI

P ORTJ-1

P ORTD-2

PORTK

PORTL

AGND

GND6

GND7

137

NC1

96

11

ECAGND

THIS SHEET OF ENGINEERING DRAWING IS THE PROPR IETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY N OT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+RTCVCC

161

VBAT

IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7

DP/AD8
DN/AD9

IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7

IOPB0/URXD
IOPB1/UTXD

IOPB2/USCLK

IOPB3/SCL1

IOPB4/SDA1

IOPC0

IOPC1/SCL2

IOPC2/SDA2

IOPC3/TA1

IOPC4/TB1/EXWINT22

IOPC5/TA2

IOPC6/TB2/EXWINT23

IOPC7/CLKOUT

IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21

IOPE4/SWIN

IOPE5/EXWINT40

IOPE6/LPCPD/EXWIN45

IOPH0/A0/ENV0

IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1

IOPH4/A4/TRIS

IOPH5/A5/SHBM

IOPH6/A6
IOPH7/A7

IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7

IOPJ0/RD

IOPJ1/WR0

SELIO#

IOPD4
IOPD5
IOPD6
IOPD7

IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12

IOPK5/A13_BE0
IOPK6/A14_BE1

IOPK7/A15_CBRD

IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19

IOPL4/WR1#

NC2

NC3

NC4

NC5

NC6

NC7

NC8

122021858691929798

C796 @1U_0603_10V4Z

1 2

3

AD1
AD2
AD3

DA0
DA1
DA2
DA3

NC9

1 2

BATT_OVP

83
84

ALI/MH#

87

EMAIL#

88

MODE#

89

INTERNET#

90

AD_BID0

93
94

DAC_BRIG

99

EN_DFAN2#

100

IREF

101

EN_DFAN1#

102

INVT_PWM

32

BEEP#

33

PWR_SUSP_LED

36

ACOFF

37

KILL_SW#

38

EC_ON

39

EC_LID_OUT#

40

BT_DETACH

43

EC_URXD

153

EC_UTXD

154

EC_USCLK

162

EC_SMB_CK1

163

EC_SMB_DA1

164
165

PBTN_OUT#

168

EC_SMB_CK2

169

EC_SMB_DA2

170

FAN_SPEED1

171

EC_PME#

172

EC_THRM#

175

FAN_SPEED2

176
1

ACIN

26

CD_PLAY

29

PM_SLP_S3#

30
2

PM_SLP_S5#

44

BT_WAKE_UP

24
25

KBA0

124

KBA1

125

KBA2

126

KBA3

127

KBA4

128

KBA5

131

KBA6

132

KBA7

133

ADB0

138

ADB1

139

ADB2

140

ADB3

141

ADB4

144

ADB5

145

ADB6

146

ADB7

147

FRD#

150

FWR#

151

SELIO#

152
41

NUM_LED#

42

CAPS_LED#

54

PADS_LED#

55

KBA8
KBA9

142

KBA10

135

KBA11

134

KBA12

130

KBA13

129

KBA14

121

KBA15

120

KBA16

113

KBA17

112

KBA18

104

KBA19

103

FSTCHG

48

NC10

PC87591L-VPCN01 A2_LQFP176

L22

FBM-L11-160808-800LMT_0603

BATT_TEMP

81

AD0

82

1

C268
1U_0603_10V4Z

2

KBA[0..19]38

BATT_TEMPA 46
BATT_OVP 47
ALI/MH# 46

EMAIL# 39
MODE# 38
INTERNET# 39

DAC_BRIG 22
EN_DFAN2 40
IREF 47
EN_DFAN1 40

INVT_PWM 22
BEEP# 32
PWR_SUSP_LED 38,39

ACOFF 47

KILL_SW# 29,39
EC_ON 39,41
EC_LID_OUT# 24

BT_DETACH 36

EC_URXD 41
EC_UTXD 41
EC_USCLK 41
EC_SMB_CK1 38,46
EC_SMB_DA1 38,46

PCIRST# 10,16,22,23,26,27,29,30,33,34

PBTN_OUT# 24
EC_SMB_CK2 5
EC_SMB_DA2 5
FAN_SPEED1 40

EC_THRM# 24
FAN_SPEED2 40
BT_PWR 36

ACIN 24,38,45
CD_PLAY 31,33
PM_SLP_S3# 24

ON/OFF 39
PM_SLP_S5# 24
BT_WAKE_UP 36
PM_CLKRUN# 24,26,27,29,30,34

FRD# 38
FWR# 38

SELIO# 38
PHDD_LED# 33

FSTCHG 47

R561

C750 0.22U_0603_16V4Z

2

KBA[0..19]

ADB[0..7]38

1 2

1 2

ADB[0..7]

100K_0402_5%

(ACES_85201-2405_24P)

JP8

34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

6278-34P-KBCON

ADP_I 47,51

KEYBOARD CONN.

NUM_LED#
PADS_LED#
CAPS_LED#

1 2

R265

300_0402_5%

300_0402_5%

KSO15
KSO14
KSO10
KSO11
KSO8
KSO9
KSO13
KSI7
KSO3
KSO7
KSO12
KSI4
KSI6
KSI5
KSO6
KSO5
KSI3
KSI0

KSO0
KSO1
KSI1
KSI2
KSO2
KSO4

1 2

R264 300_0402_5%

1 2

R263

(Need to check layout library with KB spec)

BADDR1(KBA3) BADDR0(KBA2)

0
0

*

1 1

IRE
OBD 0

*

DEV 0
PROG

SHBM(KBA5)=1: Enable shared memory with host BIOS
TRIS(KBA4)=1: While in IRE and OBD, float all the

signals for clip-on ISE use

TP_CLK KBA2
TP_DATA

2

0
1
01

ENV0 (KBA0) TRIS (KBA4)

ENV1 (KBA1)
0
1

1

+5VS

1 2

4.7K_0402_5%

R219

1 2

R215 4.7K_0402_5%

1

For EC Tools

JP7

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

@96212-1011S

+3VS

+3VS

+3VS

EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

EC_URXD
EC_UTXD
EC_USCLK

NUM_LED#
PADS_LED#
CAPS_LED#

KSO15
KSO14
KSO10
KSO11

KSO8
KSO9
KSO13
KSI7

KSO3
KSO7
KSO12
KSI4

KSI6
KSI5
KSO6
KSO5

KSI3
KSI0

KSO0

KSO1

KSI1
KSI2
KSO2
KSO4

+3VALW

CP9 100P_1206_8P4C_50V8

CP10 100P_1206_8P4C_50V8

CP11 100P_1206_8P4C_50V8

CP5 100P_1206_8P4C_50V8

CP6 100P_1206_8P4C_50V8

CP7 100P_1206_8P4C_50V8

CP8 100P_1206_8P4C_50V8

2
3
4 5

2
3
4 5

2
3
4 5

2
3
4 5

2
3
4 5

2
3
4 5

2
3
4 5

81
7
6

81
7
6

81
7
6

81
7
6

81
7
6

81
7
6

81
7
6

I/O Address

Index

Data
2E 2F
4E

4F

(HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1

Reserved

0
1

1

0
0
0
0

KBA1

R203 1K_0402_5%
R193 @1K_0402_5%

KBA3

R190 1K_0402_5%

KBA5

R189 1K_0402_5%

+3VALW

1 2
1 2
1 2
1 2

Compal Electronics, Inc.

Title

EC PC87591

Size Document Number Rev

Custom

Date: Sheet of

LA-1911

1

37 57Friday, August 08, 2003

0.2

FWE#

SN74LVC32APWLE_TSSOP14

U17B

EC_SMB_CK137,46
EC_SMB_DA137,46

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

FSEL#
FRD#
FWE#

SELIO#37

+3VALW

147

4

PG

A

6

O

5

B

+5VALW

1 2

U16

8

VCC

7

WP

6

SCL

5

SDA

AT24C16N10SC-2.7_SO8

C290

0.1U_0402_16V4Z

1MB Flash ROM

KBA[0..19]37

ADB[0..7]37

U56

21

A0

20

A1

19

A2

18

A3

17

A4

16

A5

15

A6

14

A7

8

A8

7

A9

36

A10

6

A11

5

A12

4

A13

3

A14

2

A15

1

A16

40

A17

13

A18

37

A19

22

CE#

24

OE#

9

WE#

SST39VF080-70_TSOP40

KBA2
SELIO#

R231
100K_0402_5%

A0
A1
A2

GND

VCC0
VCC1

D0
D1
D2
D3
D4
D5
D6
D7

RP#

NC

NC0
NC1

GND0
GND1

U17A

1 3

D

Q18
2N7002_SOT23

1
2
3
4

31
30

25
26
27
28
32
33
34
35

10
11
12
29
38

23
39

SN74LVC32APWLE_TSSOP14

+3VALW

12

KBA[0..19]
ADB[0..7]

READY/BUSY#

2

+5VALW

1
2

G

S

FWR# 37

12

R236
100K_0402_5%

12

R235

**

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

R611
@100K_0402_5%

+3VALW

147

PG

A

O

B

+5VALW

100K_0402_5%

1 2

+3VALW

R560

100K_0402_5%

1 2

3

C729

1 2

1U_0603_10V6K

SUSP# 31,33,37,43,49,51

EC_FLASH# 24

KSO1737,39

KSI337
KSI137

V-PORT-0603-220 M-V05_0603

+3VALW

1

2

+3VALW

+5VALWP

1 2

C753

0.1U_0402_16V4Z

20

ADB0

ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

AA

1 2

R542
820K_0402_5%

SW/B and TP/B FFC Connector
Pin 1 Definition Same As SW/B and TP/B

VR/B FFC Connector
Pin 1 Definition Swap with VR/B

U50

3

Q0

D0

4 5

D1 Q1

VCC

7 6

D2 Q2

8 9

D3 Q3

13 12

D4 Q4

14 15

D5 Q5

17 16

D6 Q6

18 19

D7 Q7

11

CP

1

MR

GND

SN74HCT374PW_TSSOP20

10

2

CDON_LED#
MP3_LED#
EMAIL_LED#
PWR_LED#

BATT_LOW_LED#
BATT_CHGI_LED#

Direct CD button board

MODE#37

C786

0.1U_0402_16V4Z

KSO17
EC_FRDBTN#
EC_STOPBTN#

V-PORT-0603-220 M-V05_0603

MODE#

D63

2 1

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5

KBA3
KBA2
KBA1
KBA0
ADB0
ADB1
ADB2

D64

2 1

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16

JP5

1 2
3 4
5 6
7 8
9 10

ACES_85201-1005

D66

V-PORT-0603-220 M-V05_0603

2 1

U13

NC
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS

@29F040/SST39VF040_PLCC

VCC
WE*

A17
A14
A13

A8
A9

A11

OE*

A10

CE*
DQ7
DQ6
DQ5
DQ4
DQ3

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

100P_0402_50V8K

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

PWR_LED# 39

WL_BT_LED# 39

ODD_LED# 39

EC_REVBTN#
EC_PLAYBTN#

1 2

FWE#
KBA17
KBA14
KBA13
KBA8
KBA9
KBA11
FRD#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3

51ON#

12

C793

**

C697
@0.1U_0402_16V4Z

+3VALW

FRD# 37
FSEL# 37

0.1U_0402_16V4Z

KBA4
SELIO#

+5VALWP

PWR_SUSP_LED37,39

D67

D65

V-PORT-0603-220 M-V05_0603

V-PORT-0603-220 M-V05_0603

2 1

2 1

@0.1U_0402_16V4Z

ADB0

8

C790

220P_0402_50V8K

220P_0402_50V8K

ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

CC

@1U_0603_10V6K

12

C813

C783

1 2

12

220P_0402_50V8K

C345

1 2

10

9

ACIN24,37,45

51ON# 39,45

KSI2 37
KSI0 37

NBA_PLUG32

+3VALW

147

U17C

PG

A

O

B

SN74LVC32APWLE_TSSOP14

1 2

R607
@20K_0603_1%

+5V_CIR

512KB Flash ROM

KBA11

1

KBA9

2

KBA8

3

KBA13

4

KBA14

5

KBA17

6

FWE#

7

+3VALW

C657

KBA18
KBA16KBA4
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4

8

9
10
11
12
13
14
15
16

3
4 5
7 6

8 9
13 12
14 15
17 16
18 19

11

1

12

C814

C815

220P_0402_50V8K

12

C819

U46

A11
A9
A8
A13
A14
A17
WE#
VCC
A18
A16
A15
A12
A7
A6
A5
A4

@SST39VF040_TSOP

+5VALW

1 2

C726 @0.1U_0402_16V4Z

U47

20

2

Q0

D0
D1 Q1

VCC

D2 Q2
D3 Q3
D4 Q4
D5 Q5
D6 Q6
D7 Q7

CP
MR

GND

10

EC_RCVEN
EC_RCRST#

@SN74HCT273PW_TSSOP20

EC_RCVEN 41
EC_RCRST# 41

CIR_GATING# 41

SW Board Connector

TP_CLK37

TP_DATA37

12

12

C791

C818

220P_0402_50V8K

12

+3VALW

FCM2012C-800_0805

220P_0402_50V8K

220P_0402_50V8K

C816

220P_0402_50V8K

12

220P_0402_50V8K

C817

12

220P_0402_50V8K

VR/CIR Board Connector

JP6

1 2

OE#

DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0

A10

CE#

A0
A1
A2
A3

3 4
5 6
7 8
9 10

ACES_85201-1005

FRD#

32

KBA10

31

FSEL#

30

ADB7

29

ADB6

28

ADB5

27

ADB4

26

ADB3

25
24

ADB2

23

ADB1

22

ADB0

21

KBA0

20

KBA1

19

KBA2

18

KBA3

17

RCIRRX
VOL_AMP

1

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

to 3V

**

+5VS

TP_CLK
TP_DATA

PWR_LED#
PWR_SUSP_LED
ACIN
BATT_LOW_LED#
BATT_CHGI_LED#
EMAIL_LED#

+5VALWP

CDON_LED#
MP3_LED#

1 2

L54

12

C792

RCIRRX 41

VOL_AMP 32

+5VAMP

C789

1U_0603_10V4Z

**

BIOS & EXT. I/O PORT

LA-1911

JP4

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

ACES_85201-2005

C311

0.1U_0402_16V4Z

C310

0.1U_0402_16V4Z

38 57Friday, August 08, 2003

+5VS

2

1

+5VALWP

2

1

0.2

5

R54

100K_0402_5%

+3VALW

12

D11

2
3

1

DAN202U_SC70

@V-PORT-0603-220 M-V05_0603

D10

2 1

LID Switch

LID_SW#37

CIR_LID_SW#41

D D

S4_LID_SW#40

LID_SW#

Power Button

3

2

4

12

SW1
FR2283_2P

ON/OFFBTN# 40,41

HDD LED

0.01U_0402_16V7K

HDD_LED#37

C800

1

2

HDD_LED#

+5VALWP

12

R213

300_0402_5%

21

D25
HT-191NB_BLUE_0603

**

3

ODD_LED#38

ODD LED

DTA114YKA_SOT23

ODD_LED#

HT-191NB_BLUE_0603

2

+5VALWP

Q16

B

10K

D31

31

47K

C

21

2

E

R142
300_0402_5%

D30

@V-PORT-0603-220 M-V05_0603

2 1

1

+3VALW

SW3

D47

3
4

D49

1

DAN202U_SC70

PSOT24C_SOT23

C C

1
2

HCH SMT1-05

***

+3VALW

R424

4.7K_0402_5%

EC_ON37,41

B B

EC_ON

POWER LED

A A

PWR_SUSP_LED37,38

PWR_SUSP_LED

5

R418

1 2

1 2

33K_0603_1%

13

D

S

@V-PORT-0603-220 M-V05_0603

2

Q36

DTC124EK_SOT23

2

G

Q35
2N7002

+5VALWP

12

R62
300_0402_5%

21

D68

HT-191UD_AMBER_0603

13

D

Q6

2

G

2N7002

S

22K

3

1 2

2

13

C

B

22K

2 1

R425
100K_0402_5%

51ON#

1000P_0402_50V7K

E

+5VALWP

31

E

47K

C

12

R61
300_0402_5%

21

D69

D13

HT-191NB_BLUE_0603

ON/OFF 37
51ON# 38,45

C574

B

10K

2 1

D46

12

RLZ20A

2 1

Q5
DTA114YKA_SOT23

PWR_LED#

2

D15

@V-PORT-0603-220 M-V05_0603

4

Wireless LED

WL_BT_LED#38

WL_BT_LED#

DTA114YKA_SOT23

HT-191NB_BLUE_0603

+5VALWP

Q45

47K

B

2

10K

R498

300_0402_5%

D34

31

E

C

12

21

* Change +3V to +5VALW

0.01U_0402_16V7K

D54

2 1

@V-PORT-0603-220 M-V05_0603

SDLED27

* Add R16 1M Pull Low

1

C801

2

SDLED

R16

1M_0402_5%

SD LED Kill SWITCH

+5VALWP

R492
300_0402_5%

21

D33
HT-191NB_BLUE_0603

13

D

Q44

2

12

G

2N7002

S

D53

@V-PORT-0603-220 M-V05_0603

2 1

@V-PORT-0603-220 M-V05_0603

3

SW7
DS-1200-02

Internet Button Console/E-MAIL Button TV OUT Button

+3VALW

R122 100K_0402_5%12
R67 100K_0402_5%12

SW4

1
2

HCH SMT1-05

3
4

EMAIL#
INTERNET#

21

D24
1N4148_SOT 23

D26

1N4148_SOT 23

3

2

D22
PSOT24C_SOT23

2

KSO17 KSI4

21

EMAIL# 37INTERNET# 37

Compal Electronics, Inc.

Title

Switchs & Connectors

Size Document Number Rev

B

LA-1911

Date: Sheet of

NDS352P_SOT23

PWR_LED# 38

S

Q8

D

1 3

SW2

1
2

HCH SMT1-05

51ON#

12

R56
0_0603_5%

G

2

21

D12
1N4148_SOT 23

3
4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D18

1N4148_SOT 23

3

2

D16
PSOT24C_SOT23

21

3

3

2

2

D48

1

1

SW5

1
2

HCH SMT1-05

+3VALW

2 1

R426
100K_0402_5%

1 2

3
4

D29

@V-PORT-0603-220 M-V05_0603

2 1

1

KILL_SW# 29,37

TV_OUT_EN# 37KSO1737,38

0.2

39 57Friday, August 08, 2003

A

FAN CONN. 1

+12VALW

C568

0.1U_0402_16V4Z

1 2

B

C

D

E

Battery mode Hibernation

+5VALW

1 1

EN_DFAN137

EN_DFAN1

R53

10K_0402_5%

12

84

3

+

2

-

1 2

R52

1

U33A
LM358AMX

8.2K_0402_5%

EN_FAN1

FAN_SPEED137

1 2

R51
100_0402_5%

+3VS

2

2

C56

0.1U_0402_16V4Z

1

1 2

R397 10K_0402_5%

R631
0_0603_5%

BEQ7

D44

1N4148_SOT 23

12

1

C

FMMT619_SOT23

3

FAN1

12

12

12

12

D45

1SS355_SOD323

C534

1000P_0402_50V7K

C525

1000P_0402_50V7K

1

C546
10U_1206_10V4Z

2

JP18

1
2
3

ACES_85205-0300

S4_LID_SW#39

FAN CONN. 2

+12VALW

C561

0.1U_0402_16V4Z

2 2

EN_DFAN237

EN_DFAN2

R58

10K_0402_5%

12

84

5

+

6

-

1 2

R57

7

U33B
LM358AMX

8.2K_0402_5%

EN_FAN2

FAN_SPEED237

1 2

R89
100_0402_5%

1 2

+3VS

R85 10K_0402_5%

2

C94

0.1U_0402_16V4Z

1

R632
0_0603_5%

+5VALW

2

BEQ9

D19

1N4148_SOT 23

12

1

C

FMMT619_SOT23

3

FAN2

12

12

12

12

D20

1SS355_SOD323

C86

1000P_0402_50V7K

C87

1000P_0402_50V7K

1

C89
10U_1206_10V4Z

2

JP21

1
2
3

ACES_85205-0300

RTCVREF RTCVREF RTCVREF

12

R126

100K_0402_5%

D27

RB751V_SOD323

S4_LATCH37

RTCVREF

+3VALW

S4_SATA37

21

2

G

10K_0402_5%

12

R127
100K_0402_5%

C183 1U_0805_16V7K

13

D

S

***

R625

1 2

10K_0402_5%

1 2

R171

@1U_0805_16V7K

1 2

R483
10K_0402_5%

1 2

Q12
2N7002_SOT 23

RTCVREF

1

C643

2

D52

2 1

RB751V_SOD323

12

R167
620K_0402_5%

1N4148_SOT 23

1 2

R168
10K_0402_5%

CK409 Power Good Circuit

12

C194 0.1U_0402_10V6K

D32

C641 1U_0805_16V7K

2

1 2

1
2
3
4
5
6
7

5

3

U42

CD1#
D1
CP1
SD1#
Q1
Q1#
GND

1 2

U8
NC7SZ14M5X

SYSON37,43,49

74LCX74

4

2N7002_SOT 23

VCC

CD2#

D2

CP2

SD2#

Q2

Q2#

D_SET_S4

1 2

R154
10K_0402_5%

2

G

Q42

RTCVREF

14
13
12
11
10
09
08

VS

13

D

S

0.1U_0402_10V6K

1 2

C637

Q17

2N7002_SOT 23

+3VS

ON/OFFBTN# 39,41

13

D

S

13

D

S

Q43
2N7002_SOT 23

12

C808
@220P_0402_50V8K

2

G

2

G

3 3

RTC Battery

Power ON Circuit

+3VS

12

2

1

+3V +3V

U39C

SN74LVC14APWLE_T SSOP14

147

PG

65

OI

+3V POWER +3V POWER

147

U39D
SN74LVC14APWLE_T SSOP14

PG

89

OI

R91

100K_0402_5%

SYS_PWROK 7,24,27

+RTCBATT

12

+RTCBATT

1

3

D41
BAS40-04_SOT23

2

CHGRTC

***

R445

820K_0402_5%

C112

1U_0805_25V4Z

BATT1

- +

RTCBATT

+RTCVCC

12

C374

0.1U_0402_16V4Z

4 4

***

1 2

+3VS

R464 33K_0402_5%

1 2

+3VS

R466 100K_0603_1%

1U_0603_10V6K

0.1U_0603_50V4Z

C629

VCORE_PWRGD24,49,52

1

2

Title

C191

12

84

U9A

3

PG

+

2

-

12

R465
68K_0402_5%

LM393M_SO8

@2N7002_SOT23

Compal Electronics, Inc.

O

Q59

12

10K_0402_5%
R463

1

2

G

CK409_PWRGD# 15

13

D

S

Power OK/Reset/RTC battery/Lid Switch/Int. KB

Size Document Number Rev

LA-1911

A

B

C

D

Date: Sheet of

40 57Friday, August 08, 2003

E

0.2

5

4

3

2

1

@SI2301DS 1P_SOT23

+5V_CIR +5VALWP

D D

1

C762
@1U_0603_10V6K

2

1 2

C360 @1U_0603_10V6K

1 2

R257 @100K_0603_5%

U20

1

OUT

2

1 2

B+

R260 @100K_0603_5%

CIR_LID_SW#39

1 2

B+

R573

@100K_0402_5%

EC_RSMRST#24,37

1 2

C756 @10P_0402_50V8K

C C

@0.1U_0402_16V4Z

1 2

C755 @10P_0402_50V8K

1

C362

2

RCIRRX38

R568

CIR_RCVEN
CIR_RCRST#
CIR_URXD

B B

CIR_USCLK

1 8
2 7
3 6
4 5

@10K_1206_8P4R_5%

13

D

2

Q56

G

@2N7002_SOT23

S

12

X8
@4MHz

1 2

R571 @0_0402_5%

12

CIR_RCRST#

RCIRRX

+5V_CIR

1

C361
@0.1U_0402_16V4Z

2

+5V_CIR

+3VALW

13

D

2

G

Q22
@2N7002_SOT23

S

U19

3

R259

XIN

@1M_0603_5%

4

XOUT

6

RESET#

7

P21/AIN1

8

P20/AIN0

9

D3/K

10

D2/C

1 2

VDD VSS

@M34501M4-XXXFP

1 2

R536 @10K_0402_5%

P12/CNTR

EC_UT XD37

+3VALW

1 2

R555 @10K_0402_5%

SNS

3

SHDN

4 5

GND ERR#

20

P00

19

P01

18

P02

17

P03

16

P10

15

P11

14
13

P13/INT

12

D0

11

D1

5

CNVSS

3 1

Q48

@MMBT3904_SOT23

@MIC2951

+3VALW

Q53

13

13

2

2

1 2

R256 @10K_0402_5%

8

IN

7

FB

6

TAP

CIR_RCVEN
CIR_UTXD

CIR_UTXD
CIR_URXD

CIR_USCLK

1 2

R258 @0_0402_5%

+5V_CIR

12

R537

@10K_0402_5%

2

CIR_UTXD

1

C760
@1U_0603_10V6K

2

L53

C358
@1U_0805_25V4Z

1 2

1 2

R564 @0_0402_5%

RC_ON/OFFBTN

+5V_CIR

12

R240

@10K_0402_5%

1 2

2

100K

1 3

1 2

100K

B+

@0_0805_5%

+5V_CIR

C754
@1U_0805_25V4Z

100K

2

100K

R563
@47K_0402_5%

CIR_GATING#38

EC_RCVEN38

EC_ON 37,39

Q20
@DTC115EKA_SOT23

R569
@10K_0402_5%

13

D

2

G

Q51
@2N7002_SOT23

S

13

@DTC115EKA_SOT23
Q50

CIR_GATING#

3 1

Q49 @MMBT3904_SOT23

CIR_GATING#

12R567 @10K_0402_5%

12

R558

@10K_0402_5%

2

CIR_RCVEN

+5V_CIR

ON/OFFBTN# 39,40

Need to check

12

EC_URXD37

+3VALW

A A

1 2

R551 @10K_0402_5%

EC_USCLK37

2 1

D56
@RB751V_SOD323

2 1

D55

CIR_URXD

CIR_USCLK

EC_RCRST#38

R570

@10K_0402_5%

2

CIR_RCRST#

3 1

Q54 @MMBT3904_SOT23

@RB751V_SOD323

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

CIR & Screws

Size Document Number Rev

LA-1911 0.2

B

Date: Sheet of

41 57Friday, August 08, 2003

1

OZ168 DIRECT CD CONTROLLER +5VOZ TO +5VCD

+5VOZ

+5VOZ

12

C763
@0.1U_0402_16V4Z

12

C751
@0.1U_0402_16V4Z

12

C757
@0.1U_0402_16V4Z

L46
@CHB1608G301_0603

1 2
1 2

L45

12

C752

@CHB1608G301_0603

@0.1U_0402_16V4Z

+5VCD

CDD0
CDD1
CDD2
CDD3
CDD4
CDD5
CDD6
CDD7
CDD8

CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15

CDA0

CDA1

CDA2

CCS0

CCS1

CDIOR#

CDIOW#

CIORDY

SSYNC

MODE0
MODE1

CSN

INCN

UDN

U51
@OZ168T-A1_TQFP100

77
79
82
84
87
91
96
98
1
3
7
10
14
17
19
21

69
71
67

64
62

100
5
73
94

75
13
89

23
60

47
52
54
49
45

51

80

GPIO_1

39

GPIO_0

40

56
57

38
41

42
43

OZ168 8MHz CRYSTAL OZ168 UNUSED PIN PULL UP

RP126

18
27
36
45

@10K_8P4R_1206_5%

RP125

18
27
36

45

@10K_8P4R_1206_5%
R556 @10K_0402_5%12

R557 @10K_0402_5%

12

X3

@8MHZ_16PF_7D08000014

OSC1 OSC2

R565

@1M_0402_5%

12

C748
@10P_0402_50V8K

12

C747
@10P_0402_50V8K

REVBTN#
FRDBTN#
PLAYBTN#
STOPBTN#

GPIO_0
GPIO_1

PROGRAMMING CLOCK GENERATO R

+5VCD

94458

IDE_SDD[0..15]24,33

IDE_SDA024,33
IDE_SDA124,33
IDE_SDA224,33

IDE_SDCS1#24,33
IDE_SDCS3#24,33

IDE_SDIOR#24,33

IDE_SDIOW#24,33

IDE_SDIORDY24,33

IDE_IRQ1523,33

IDE_SDDREQ24,33

IDE_SDDACK#24,33

SIDERST#24,33

IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15

IDE_SDA0
IDE_SDA1
IDE_SDA2

IDE_SDCS1#
IDE_SDCS3#

IDE_SDIOR#
IDE_SDIOW#

IDE_IRQ15
IDE_SDDREQ
IDE_SDDACK#

DM_ON
PLAYBTN#
FRDBTN#
REVBTN#
STOPBTN#

OSC1
OSC2

76

HDD0

78

HDD1

81

HDD2

83

HDD3

86

HDD4

90

HDD5

95

HDD6

97

HDD7

2

HDD8

4

HDD9

8

HDD10

11

HDD11

15

HDD12

18

HDD13

20

HDD14

22

HDD15

68

HDA0

70

HDA1

66

HDA2

63

HCS0

61

HCS1

99

HDIOR#

6

HDIOW#

72

HIOCS16#

93

HIORDY

74

HINTRQ

12

HDMARQ

88

HDMACK#

24

HRESET#

59

HDASPN

48

HSYNC

53

HBIT_CLK

55

HDATA_OUT

50

HDATA_IN

46

HACRSTN

28

PAV_EN

36

PLAY/PAUSE

35

FFORWARD

34

REWIND

37

STOP/EJECT

29

PCSYSTEM_OFF

25

INTN

30

RESET#

26

SDATA

27

SCLK

31

OSCI

32

OSCO

VDD

VDD

GND

GND

GND

GND

1633658592

VDD

CIOCS16#

CHINTRQ

CDMARQ

CHDMACK#

CRESET#

CDASPN

SBIT_CLK

SDATA_OUT

SDATA_IN

SACRSTN

PWR_CTL

ISCDROM

GPIO[1]/VOL_UP
GPIO[0]/VOL_DN

PAVMODE

GND

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Inc.

Title

OZ-168 CD_PLAY & Programming Clock

Size Document Number Rev

B

LA-1911

Date: Sheet of

42 57Friday, August 08, 2003

0.2

A

B

C

D

E

+3VALW TO +3V

1

C133
10U_1206_10V4Z

+3VALW

1 1

U6

8

D

7

D

6

D

5

D

SI4800DY_SO8

1

C177
10U_1206_10V4Z

2

1

S

2

S

3

S

4

G

2

SYSON_ALW

2

C176

0.1U_0402_16V4Z

1

+3V

1

C122
1U_0805_25V4Z

2

12

R121
@1M_0402_5%

R125

100K_0402_5%

1 2

13

D

G

Q13

S

2N7002_SOT 23

2

SYSON#

+12VALW

+5VALWP

1

2

+3VALW TO +3VS

+3VS

+3VALW

U7

2 2

8
7
6
5

SI4800DY_SO8

1

C205
10U_1206_10V4Z

2

1

S

D

2

S

D

3

S

D

4

G

D

1

C186
10U_1206_10V4Z

2

5VS_GATE

2

C178

0.1U_0402_16V4Z

1

1

C196
1U_0805_25V4Z

2

12

R124
@1M_0402_5%

R123

100K_0402_5%

1 2

13

D

G

Q10

S

2N7002_SOT 23

+5VALWP

+12VALW

1

SUSP

2

2

+5VALW TO +5V

U49

8

S

D

7

S

D

6

S

D

5

G

D

SI4800DY_SO8

C725

4.7U_1206_16V4Z

+5VALW TO +5VS

U22

8

S

D

7

S

D

6

S

D

5

G

D

SI4800DY_SO8

C368

4.7U_1206_16V4Z

+5V

1
2
3
4

+5VS

1
2
3
4

1

2

SYSON_ALW

2

C743

0.1U_0402_16V4Z

1

1

C386

4.7U_1206_16V4Z

2

5VS_GATE

2

C380

0.1U_0402_16V4Z

1

C715

4.7U_1206_16V4Z

1

C724
1U_0805_25V4Z

2

1

C379
1U_0805_25V4Z

2

SYSON37,40,49 SUSP#31,33,37,38,49,51

+3V +5V

R450
470_0805_5%

1 2
13

D

SYSON# SYSON#

2

G

Q39

S

2N7002_SOT 23

R452
470_0805_5%

1 2
13

D

2

G

Q38

S

2N7002_SOT 23

+5VALWP

R526
10K_0402_5%

SYSON#

SYSON

R613

10K_0402_5%

1 2

1 2
13

D

S

Q47
2N7002_SOT 23

2

G

** **

1 2
13

D

S

+5VS+3VS

1 2
13

D

S

R516
470_0805_5%

2

G

Q46
2N7002_SOT 23

R272
470_0805_5%

SUSPSUSP

2

G

Q23
2N7002_SOT 23

SUSP19,31,50

+2.5VS

SUSP

R612

10K_0402_5%

1 2
13

D

S

1 2

R457
470_0805_5%

SUSP

2

G

Q40
2N7002_SOT 23

+5VALWP

1 2
13

2

G

R266
10K_0402_5%

D

Q24
2N7002_SOT 23

S

+2.5V

3 3

4 4

+2.5V TO +2.5VS

U41

8
7
6
5

SI4800DY_SO8

12

C640

4.7U_0805_10V4Z

1

S

D

2

S

D

3

S

D

4

G

D

A

+2.5VS

5VS_GATE

2

C630

0.1U_0402_16V4Z

1

12

C623

4.7U_0805_10V4Z

1

C625
1U_0805_25V4Z

2

H20
H_S315D142

1

H2

H_C276D181

1

H15

H_C197D98

1

PROPRIETARY NOTE

B

H11

H_C276D181

1

H16

H_C197D98

1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

H17
H_S315D142

1

H19

H_S276D110

1

H18

H_C228D165

1

C

H9
H_S315D142

1

H14

TC197S276D110

1

H23

H_O268X228D205X165

1

H24
H_S315D142

1

H6

H_C276D142

1

H4
H_S315D142

1

PJP15

2 1

PAD-OPEN 2x2m

***

H21
H_S315D142

1

H10

H_C276D142

1

H25

H_C276D181

1

H12
H_S315D142

1

H7

H_SMDC138

1

H26

H_C276D181

1

D

H5
H_S315D142

1

H8

H_C142D142N

1

H27

H_C55D55N

1

H22
H_S315D142

1

H3

H_C236D236N

1

H28

H_C55D55N

1

H1

H_C276D181

1

PJP13

2 1

PAD-OPEN 2x2m

H29

H_SMDC157

1

H_C276D181

H30

H_SMDC157

Compal Electronics, Inc.

Title

POWER CONTROL CKT

Size Document Number Rev

B

LA-1911

Date: Sheet of

43 57Friday, August 08, 2003

E

H13

1

***

PJP14

2 1

PAD-OPEN 2x2m

1

0.2

FD5
FIDUCAL

FD6
FIDUCAL

FD4
FIDUCAL

FD1
FIDUCAL

FD3
FIDUCAL

FD2
FIDUCAL

+3VALW +1.5VS

+1.5VSS

1

CF21
SMD40M80

1

CF9
SMD40M80

1

CF28
SMD40M80

1

CF1
SMD40M80

1

CF16
SMD40M80

1

CF31
SMD40M80

1

1

CF2
SMD40M80

1

CF8
SMD40M80

1

CF26
SMD40M80

1

CF23
SMD40M80

1

CF13
SMD40M80

1

CF32
SMD40M80

1

1

CF15
SMD40M80

1

CF10
SMD40M80

1

CF27
SMD40M80

1

CF25
SMD40M80

1

CF12
SMD40M80

1

1

CF3
SMD40M80

1

CF11
SMD40M80

1

CF30
SMD40M80

1

CF24
SMD40M80

1

CF17
SMD40M80

1

1

CF4
SMD40M80

1

CF6
SMD40M80

1

CF20
SMD40M80

1

CF22
SMD40M80

1

CF14
SMD40M80

1

1

CF5
SMD40M80

1

CF7
SMD40M80

1

CF29
SMD40M80

1

CF18
SMD40M80

1

CF19
SMD40M80

1

+3VALWP

R604

0_0402_5%

C794

12

C407

4.7U_0805_10V4Z

+5VCD

12

C402

4.7U_0805_10V4Z

12

C397

4.7U_0805_10V4Z

+3V

12

12

12

C404

4.7U_0805_10V4Z

**
Remove +5VCD

+3VALW

2

147

PG

1

U55A

21

OI

SN74LVC14APWLE_T SSOP14

12

C396

4.7U_0805_10V4Z

C782

0.1U_0402_16V4Z

12

+3VALW

147

U55B

PG

43

OI

+3VALW POWER+3VALW POWER

SN74LVC14APWLE_T SSOP14

12

C406

4.7U_0805_10V4Z

+3V

12

C784

4.7U_0805_10V4Z

C395

4.7U_0805_10V4Z

V_ON 49

12

C403

4.7U_0805_10V4Z

12

C394

4.7U_0805_10V4Z

12

C405

4.7U_0805_10V4Z

PROPRIETARY NOTE

@0.1U_0402_16V4Z

+3VS

12

R606

0_0402_5%

***

1

C795

2

@1U_0603_10V6K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VALW POWER

147

U55C

PG

65

OI

+3VALW POWER

SN74LVC14APWLE_T SSOP14

+3VALW+3VALW

147

U55D

PG

89

OI

+3VALW POWER

SN74LVC14APWLE_T SSOP14

+3VALW

R605
10K_0402_5%

1 2
13

D

2

G

S

VS_ON# 50VS_ON 49,51

Q58
2N7002_SOT 23

Compal Electronics, Inc.

Title

Point and Capacitance

Size Document Number Rev

B

LA-1911

Date: Sheet of

44 57Friday, August 08, 2003

0.2

A

PF1

PCN1

1

6

G

5

G

4

G

1 1

2

3

G

SINGA_2DC-S113L200

12A_65VDC_451012

1

2

21

12

PD1

EC10QS04_SOD106

12

PC1

1000P_0603_50V7K

PL1

1 2

C8B BPH 853025_2P

12

PC2
100P_0603_50V8J

B

12

PC3
1000P_0603_50V7K

VIN

12

PC4
100P_0603_50V8J

12

PC5

1000P_0603_50V7K

VIN

12

PR3

84.5K_0603_1%

1 2

PR5 22K_0603_5%

12

PR6
20K_0603_1%

12

PC6

0.1U_0603_25V7K

C

1 2

PR1 1M_0603_1%

VS

84

PU1A

3

PG

+

O

2

-

LM393M_SO8

PR8

12

RTCVREF

3.3V

10K_0603_5%

1

PD2

RLZ4.3B_LL34

VS

12

PR2

5.6K_0603_5%

12

PR4
1K_0603_5%

12

PR7
10K_0603_5%

1 2

PACIN

ACIN 24,37,38

PACIN 47,48

Vin Detector
High 18.764 17.901 17.063

D

Low 17.745 16.903 16.038

VIN

PD3

1N4148_SOD80

PD4

2 2

CHGRTC

3 3

+2.5VP

+VCCVIDP

4 4

+1.5VSP +1.5VS

+12VALWP

+1.5VS +1.5VSS

BATT+

RLZ3.6B_LL34

51ON#38,39

PR19

1 2

200_0603_5%

PJP1

PAD-OPEN 4x4m

1 2

PJP3

PAD-OPEN 4x4m

1 2

PJP4

1 2

PAD-OPEN 3x3m

PJP6

2 1

PAD-OPEN 2x2m
PJP8

1 2

PAD-OPEN 4x4m

PJP9

2 1

PAD-OPEN 2x2m
PJP11

1 2

PAD-OPEN 4x4m

RB751V_SOD323

100K_0603_5%

RTCVREF

12

PD6

12

PR13

PR14

1 2

22K_0603_5%

3.3V

12

PC13

10U_1206_10V4Z

+2.5V

+1.25VS+1.25VSP

+CPUVID

+12VALW

A

N1CHGRTCP

12

12

PC7

0.22U_1206_25V7K

12

PU2
S-81233SGUP-T1_SOT89

3

3

1

2

2

1

12

(12A,480mils ,Via NO.=24)

(2A,80mils ,Via NO.= 4)

(150mA,40mils ,Via NO.= 2)

(6A,240mils ,Via NO.= 12)

(120mA,20mils ,Via NO.= 1)

13

PQ1
TP0610T_SOT23

2

PR18
200_0603_5%

N2

PC12
1U_0805_25V4Z

1 2
12

PR10
33_1206_5%

12

PC8

0.1U_0603_25V7K

VS

MAINPWON46,48

ACON47

PD8
RLZ16B_LL34

2 1

PJP2

+VTT_GMCHP +VTT_GMCH

1 2

PAD-OPEN 4x4m

(2A,80mils ,Via NO.= 4)

+5VALWP

PJP5

1 2

PAD-OPEN 4x4m

(6A,240mils ,Via NO.= 12)

PJP7

+3VALWP

(6A,240mils ,Via NO.= 12)

+VGA_COREP

1 2

PAD-OPEN 4x4m

PJP10

1 2

PAD-OPEN 4x4m

(6A,240mils ,Via NO.= 12)

B

+5VALW

+3VALW

+VGA_CORE

VIN

PD7

2
3

RB715F_SOT323

PD5

12

1N4148_SOD80

VL

1

1 2

PR15

2 1

10K_0603_5%

PD9

RLZ6.2C_LL34@

Precharge detector

15.34 15.90 16.48

13.13 13.71 14.20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.

N3

1 2

PR9
1K_1206_5%

1 2

PR11
1K_1206_5%

1 2

PR12
1K_1206_5%

6.0V

12

PC10
1000P_0603_50V7K

C

7

PU1B

O

12

1M_0603_1%

PR16

LM393M_SO8

84

5

PG

+

6

-

12

PC11

0.1U_0603_16V7K

10K_0603_5%

PR21

1 2

RTCVREF

3.3V

PQ2

2N7002_SOT 23

B+

12

PR17
499K_0603_1%

12

12

PR22
215K_0603_1%

13

D

G

S

Title

2

PR20
499K_0603_1%

PR23 47K_0603_5%

13

PQ3
DTC115EKA_SOT23

100K

2

100K

Compal Electronics, Inc.

DCIN & DETECTOR

Size Document Number Rev

Date: Sheet of

12

LA-1911

12

PC9

1000P_0603_50V7K

PACIN

+5VALWP

45 57Friday, August 08, 2003

D

0.2

A

B

C

D

PH1 under CPU botten side :

CPU thermal protection at 84 degree C
Recovery at 44 degree C

1 1

PCN2

BATT+
BATT+

ID

B/I

TS

SMD

GND
GND

SMC
GND­GND-

10
11

SUYIN_20175A-09G1_M9P

1
2

ALI/NIMH#

3

AB/I

4

TS_A

5

EC_SMDA

6

EC_SMCA

7
8
9

PR28

100_0603_5%

12

12

PR29
100_0603_5%

PR24

12

1K_0603_5%

12

PR31

1K_0603_5%

1 2

1

PF2 15A_65VDC_451012

PR26
47K_0603_5%

21

+3VALWP

3

2

VMB

C8B BPH 853025_2P

12

PC15
1000P_0603_50V7K

PL2

1 2

12

PC16

0.01U_0603_50V7K

BATT+

PD10
BAS40-04_SOT23@

PC17

12

ALI/MH# 37

PR34

1 2

25.5K_0603_1%

2 2

12

PR36
1K_0603_5%

1

3

BAS40-04_SOT23@

PD12

2

+3VALWP

BATT_TEMPA 37

EC_SMB_DA1 37,38
EC_SMB_CK1 37,38

1

1

0.22U_0805_16V7K_V2

PH2 near main Battery CONN :

BAT. thermal protection at 78 degree C
Recovery at 44 degree C

VL VS

10KB_0603_1%_TH11-3H103FT

PH1

12

PR30

1 2

16.9K_0603_1%

TM_REF1

12

PR32

3.32K_0603_1%

12

PC18

1000P_0603_50V7K

12

PC14

0.1U_0603_25V7K

12

100K_0603_1%

3

+

2

-

PR33

100K_0603_1%

PR35

1 2

84

PU3A

PG

O

LM393M_SO8

12

VL

PR27
47K_0603_1%

1

VL

PR25
47K_0603_1%

1 2

PD11

1SS355_SOD323

MAINPWON 45,48

13

PQ4

100K

12

2

DTC115EKA_SOT23

100K

PD13

BAS40-04_SOT23@

3

2

3 3

2

+5VALWP

PD14

PU3B

PG

7

O

LM393M_SO8

VLVL

1 2

PR37
47K_0603_1%

PD15

1SS355_SOD323

12

BAS40-04_SOT23@

3

12

PH2
10KB_0603_1%_TH11-3H103FT

PR39

1 2

14.7K_0603_1%

TM_REF2

1 2

47K_0603_1%

5

+

6

-

PR38

84

PC19

0.22U_0805_16V7K_V2

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

A

B

INC.

12

3.48K_0603_1%

PR41

C

12

12

PC20

1000P_0603_50V7K

12

PR42
100K_0603_1%

PR40

12

VL

100K_0603_1%

Title

Compal Electronics, Inc.

BATTERY CONN / OTP

Size Document Number Rev

LA-1911

Date: Sheet of

D

46 57Friday, August 08, 2003

0.2

A

B

C

D

P2

PC26

1 2

CS

13

PQ7

1
2
3
4

SI4825DY_SO8

205K_0603_1%

PQ11
DTC115EKA_SOT23

S
S
S
G

12

D
D
D
D

12

PR53
10K_0603_1%

8
7
6
5

ADP_I37,51

12

PC29

0.1U_0603_16V7K

PR61

100K_0603_1%

PQ6

VIN

1 1

2 2

12

PR44
10K_0603_5%

PACIN45,48

ACON45

8
7
6
5

SI4825DY_SO8

ACOFF#

1SS355_SOD323

PACIN

1 2

PR51
3K_0603_5%

ACON

IREF=1.31*Icharge

S

D

S

D

S

D

G

D

PD16

1 2

1
2
3
4

12

PR45
200K_0603_1%

12

PR48

150K_0603_1%

13

D

PQ10

2

G

2N7002_SOT 23

S

0.1U_0603_16V7K

IREF=0.73~3.3V

IREF37

PR57

+3VALWP

12

PR62
47K_0603_5%

13

100K

FSTCHG37

3 3

2

100K

100K

2

100K

PQ12
DTC115EKA_SOT23

P3 B+

12

PR52

33.2K_0603_1%

12

12

PC33

0.1U_0603_16V7K

VMB

Iadp=0~5.8A

PR50 100K_0603_5%

PC27

1 2

4700P_0603_50V7K

PC30

1 2

1000P_0603_50V7K

PR59 10K_0603_5%

PR43

12

0.01_2512_1%

12

PR54

1 2

PR55

1 2

12

10K_0603_5%

1K_0603_5%

PR63

95.3K_0603_0.1%

PR184

95.3K_0603_0.1%

PU4

1

-INC2

2

OUTC2

3

+INE2

4

-INE2

5

FB2

6

VREF

7

FB1

8

-INE1

9

+INE1

10

OUTC1

11

OUTD

12

-INC1

MB3887_SSOP24

12

12

+INC2

GND

CS

VCC(o)

OUT

VH

VCC

RT

-INE3

FB3

CTL

+INC1

PL3

1 2

C8B BPH 853025_2P

24

23

CS

22

21

20

1 2

19

PC28

0.1U_0603_25V7K

18

17

1 2

PR56
68K_0603_5%

16

PR60

15

1 2

47K_0603_5%

ACON

14

13

12

PC21

4.7U_1210_25V6K

12

PR49
0_0603_5%

PC24

0.022U_0603_25V7K

1 2

PC25

1 2

0.1U_0603_25V7K

1 2

PC31

0.1U_0603_25V7K

PC32

1 2

1500P_0603_50V7K

4.2V

12

PC22

4.7U_1210_25V6K

12

PC23

4.7U_1210_25V6K

N18

36

241

578

B++

PQ8
SI4835DY_SO8

LXCHRG

ACOFF#

1 2

13

100K

100K

PQ5

SI7447DP_SO8

1
2
3

4

PR46

10K_0603_5%

PQ9
DTC115EKA_SOT23

2

5

PR47

1 2

47K_0603_5%

ACOFF 37

VIN

CC=0.5~2.7A
CV=16.8V(12 CELLS LI-ION)

PL4

1 2

PR64

143K_0603_0.1%

22UH_SPC-1205P-220A_2.8A_20%

12

PD17

RB051L-40_SOD106

12

PR58

1 2

0.02_2512_1%

4.7U_1210_25V6K

12

PC34

PC35

4.7U_1210_25V6K

12

12

PC36

4.7U_1210_25V6K

BATT+

12

OVP voltage : LI

4S3P : 17.4V--> BATT_OVP= 1.935V

(BAT_OVP=0.1111 *VMB)

+5VALWP

84

PU5A

3

PG

+

1

BATT_OVP37

4 4

PC37

@0.1U_0603_16V7K

A

12

12

PR67

2.2K_0603_5%

0

2

-

LM358A_SO8

105K_0603_0.5%

PR68

PR65
340K_0603_1%

12

PR66
499K_0603_1%

12

12

PC38

0.01U_0603_50V7K

B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.

C

Title

Compal Electronics, Inc.

CHARGER

Size Document Number Rev

LA-1911

Date: Sheet of

D

47 57Friday, August 08, 2003

0.2

5

D D

B+

C C

150U_D_6.3VM

B B

PL5

1 2

HCB4532K-800T90_1812

4.7U_1210_25V6K@

+3VALWP

PC52

B+++

12

PC42

4.7U_1210_25V6K

10UH_SPC-1205P-100_4.5A_20%

0.012_2512_1%

1

1

+

+

PC53

150U_D_6.3VM@

2

2

12

PR72

PC43

PL6

12

2 1

12

PD21

EP10QY03

1
2
3
4

12

PC50

47P_0603_50V8J

PR73
1M_0603_1%

1 2

3.57K_0603_1%

PR77

1 2

1 2

PQ13

SI4814DY_SO8~D

PR79
10K_0603_1%

8

G1

D1

7

D1

S1/D2

6

G2

S1/D2

5

S1/D2

S2

12

PC54

100P_0603_50V8J

PDH31

+3.3V Ipeak = 6.66A ~ 10A

4

PC41

1 2

0.1U_0603_25V7K

1 2

PR70
0_0603_5%

PLX3

PDL3

CSH3

PACIN45,47

VS

12

12

BST31

PDH3

1 2

PR76
10K_0603_5%

PR80
47K_0603_5%

PC60

0.047U_0603_50V4Z

PD20

1SS355_SOD323

12

PC48

0.1U_0603_25V7K

25

BST3

27

DH3

26

LX3

24

DL3

1

CSH3

2

CSL3

3

FB3

10

SKIP#

23

SHDN#

7

TIME/ON5

28

RUN/ON3

12

PC56
680P_0603_50V8J

PR82
47K_0603_1%

12

PC61

0.047U_0603_50V4Z

VS

12

1 2

22

V+

MAX1902

3

VL

21

12OUT

VL

PU6

GND

8

VL

MAINPWON 45,46

2

PD19
DAP202U_SOT 323

1

PC47

4.7U_1206_16V4Z

12

4
5

VDD

18

BST5

16

DH5

17

LX5

19

DL5

20

PGND

14

CSH5

13

CSL5

12

FB5

15

SEQ

9

REF

6

SYNC

11

RST#

3

BST51

+12VALWP

12

PC49

4.7U_1206_16V4Z

2.5VREF

12

PC55

4.7U_1206_16V4Z

PC44

1 2

0.1U_0603_25V7K

PDH5

PLX5

10.5K_0603_1%

2

12

PC45

4.7U_1210_25V6K
PR71

1 2

0_0603_5%

12

PR78

12

PR81

10K_0603_1%

N4

B+++

12

PC46

4.7U_1210_25V6K@

PDH51

PDL5

12

PC59
100P_0603_50V8J

1

PC39

4.7U_1210_25V6K

1 2

12

PC40
470P_0805_100V7K

1 2

PR69 22_1206_5%

PQ14

1

D1

2

D1

3

G2

4

S2

SI4814DY_SO8~D

G1
S1/D2
S1/D2
S1/D2

150U_D_6.3VM

12

8
7
6
5

PC57

FLYBACKSNB

PD18

EC11FS2_SOD106

1 4

10uH_SDT-1205P-100-118_5A_20%

12

PC51
47P_0603_50V8J

12

PR74
2M_0603_5%

1

+

2

150U_D_6.3VM@

1

2

+

3 2

PC58

PT1

CSH5

12

2 1

PR75

0.012_2512_1%

+5VALWP

PD22

EP10QY03

+5V Ipeak = 6.66A ~ 10A

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

5

4

3

INC.

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

5V/3.3V/12V

LA-1911

1

0.2

48 57Friday, August 08, 2003

A

B

C

D

PL7

1 1

12

PC62

4.7U_1210_25V6K

PD23

DAP202U_SOT 323

PQ16

1
2

+1.45V/+1.225V

2 2

3 3

+VTT_GMCHP

EP10QY03

GMCH_SEL52

PD26

2N7002_SOT 23

2 1

1

PC73

+

150U_D2_6.3V

2

2

G

PQ18

12

13

D

S

PR87

4.53K_0603_1%

12

PR91

10K_0603_1%

12

PR94
10K_0603_1%

PL9

5UH_SPC-06704-5R0_2.9A_30%

1 2

3
4

SI4814DY_SO8

VCORE_PWRGD24,40,52

8

G1

D1

7

D1

S1/D2

6

G2

S1/D2

5

S1/D2

S2

PC70

0.1U_0603_25V7K

1 2

PR89 @0_0603_5%

VCORE_ENLL5,52

SUSP#31,33,37,38,43,51

VS_ON44,51

1 2

PR177 0_0603_5%

1 2

PR178 0_0603_5%@

1 2

PR180 0_0603_5%

***

1

2

PR86
0_0603_5%

12

1 2

@

PC67

1U_0805_25V4Z

3

25
26
27

24
28

1
2 12

11

MAX1845EEI_QSOP28

PU7

BST1
DH1
LX1

DL1
CS1

OUT1
FB1 ON2

ON1

PR83
0_0603_5%

1 2

12

12

PC68
1U_0603_10V6K

423

V+GND

SKIP

OVP

6

8

PC74

0.22U_0805_16V7K

22

VCC

PR84

20_0603_5%

9

VDD

UVP

BST2

DH2

LX2
DL2

CS2

OUT2

FB2

PGOOD

TON

ILIM2
ILIM1

REF

10

42.2K_0603_1%

220K_0603_1%

12

+5VALWP

12

21
19

18
17
20
16

15
14

7
5

13
3

PR93

12

PR95

12

100K_0603_1%

12

PC63

4.7U_1206_16V4Z

PR85
0_0603_5%

1 2

0.1U_0603_25V7K

12

PR96

PC69

12

PR97
100K_0603_1%

12

PQ15

IRF7821_S08

PR90 @0_0603_5%

PR179 0_0603_5%

PC64

4.7U_1210_25V6K

876

5

DDD

D

S

S

G

S

1

3

4

2

578

PQ17
FDS6672A_SO8

3 6

241

12

12

**

12

12

1 2

12

EC31QS04

PC65

4.7U_1210_25V6K

PL8

2.2UH_SPC-1205P-2R2B_13A_30%

PD25

SYSON 37,40,43

V_ON 44

1 2

12

PC66

4.7U_1210_25V6K

220U_D2_4V

PR88
15K_0603_1%

1 2

12

PR92
10K_0603_1%

HCB4532K-800T90_1812

+2.5V

1

1

PC71

+

+

220U_D2_4V

2

2

PC72

B+

2 1

+2.5VP

PD24

EP10QY03

GMCH_SEL=0

GMCH_SEL=1

4 4

PRESCOTT

NORTHWOOD

A

VTT_GMCH=1.225V

VTT_GMCH=1.45V

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

B

INC.

C

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

DDR_2.5V/VTT_GMCH

LA-1911

D

49 57Friday, August 08, 2003

0.2

A

B

C

D

+5VALW

PR98
0_1206_5%

1 1

13

SUSP19,31,43

VS_ON#44

2 2

SUSP

VS_ON#

PR182 @0_0603_5%

PR181 0_0603_5%

**

SUSP1

12

12

2

G

D

PQ20
2N7002_SOT 23

S

PR100
220K_0603_1%

PC81

390P_0603_50V7K

+3VALW

1 2

5

PU8

1

12

12

12

2

PC80

10P_0603_50V8J

4

MAX1954EUB_10UMAX

HSD

COMP

GND

IN

BST

DH

LX

DL

PGND

FB

10

8

9

6

7

3

21

PD27

EP10QY03

PC77

12

0.1U_0603_16V7K

PQ19

1

D1

2

D1

3

G2

4

S2

SI4814DY_SO8

12

PC75

22U_1210_6.3V6M

8

G1

7

S1/D2

6

S1/D2

5

S1/D2

12

PC76

PL10

PR101

22U_1210_6.3V6M

PR99

12

12

220U_D2_4VM @

2.2UH_PLFC1235P-2R2A_6A_30%

1 2

8.06K_0603_1%

9.09K_0603_1%

PC78

1

+

2

+1.5V

+1.5VSP

1

+

PC79

220U_D2_4VM

2

PR102
0_1206_5%

1 2

5

PU9

1

3 3

PC88

12

12

12

PC87

15P_0603_50V8J

13

SUSP1

4 4

2

G

D

PQ22
2N7002_SOT 23

S

PR104
180K_0603_1%

390P_0603_50V7K

2

4

MAX1954EUB_10UMAX

POWER_SEL16

HSD

COMP

GND

IN

BST

DH

LX

DL

PGND

FB

10

8

9

6

7

3

12

PR107

100K_0603_5%

21

PD28

EP10QY03

PC84

12

0.1U_0603_16V7K

PQ21

1
2
3
4

SI4814DY_SO8

2

G

22U_1210_6.3V6M

G1

D1
D1

S1/D2

G2

S1/D2
S1/D2

S2

13

D

PQ23
2N7002_SOT 23

S

12

PC82

8
7
6
5

12

PC83

22U_1210_6.3V6M

PL11

2.2UH_SPC-1205P-2R2B_13A_30%

1 2

PR103

PR106

12

12

PR105

9.09K_0603_1%

12

3.92K_0603_1%

0K_0603_5%

**

+1.15V/1.0V

+VGA_COREP

1

1

+

PC85

220U_D2_4VM @

+

PC86

2

220U_D2_4VM

2

NV31M

NV33M

NV34M

POWER_SEL=1

POWER_SEL=0

PR103 PR106

4.53K 9.09K

3.92K 0K

3.92K 0K

NV31M

VOUT=1.2V

VOUT=1.0V

NV33M/NV34M

VOUT=1.15V

VOUT=1.15V

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

A

B

INC.

C

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

1.5V/VGA_CORE
LA-1911

D

50 57Friday, August 08, 2003

0.2

5

4

3

2

1

1 2

PR108 1M_0603_1%

VS

VL

12

D D

ADP_I37,47

1 2

VL

PR111

249K_0603_1%

PR112

100K_0603_1%

1 2

64.9K_0603_1%

PR110

12

12

PC90
1000P_0603_50V7K

3
2

5
6

C C

84

+

-

84

+

-

12

PG

1

O

PU10A
LM393M_SO8

PU10B

PG

7

O

LM393M_SO8

PC89

0.1U_0603_25V7K

PR109
365K_0603_1%

12

PC91
10P_0603_50V7K

H_PROCHOT# 5,7

13

D

S

PQ24
2N7002_SOT 23

2

G

+3VALWP

+3VALWP

PR113
0_1206_5%

PR114

1 2

12

PR115

22K_0603_5%

B B

+2.5VP

A A

PR116
105K_0603_0.5%

12

12

PR118

105K_0603_0.5%

PC97

12

1U_0603_10V6K

VS_ON44,49

SUSP#31,33,37,38,43,49

PQ25

2N7002_SOT 23

PR183

1 2

0_0603_5%

PR120

1 2

@0_0603_5%

2N7002_SOT 23

2

G

PQ26

13

D

2

G

S

13

D

S

0.1U_0603_16V7K

PR121
100K_0603_5%

1 2

12

PC94

5.1_0603_5%

PU11

1 8

VIN PVIN

2

GND

4 5

VREF VFB

CM3718

REMOTE SENSE

LX

PGNDSD

1 2

PC92

1U_0603_10V6K

2.2UH_SPC-06703-2R2_20%

7
63

FB_VDD+

PR119

1 2

1K_0603_5%

12

PL12

1 2

PR117

1 2

12

PC93

4.7U_1206_16V4Z

100K_0603_5%

0.1U_0603_16V7K

1 2

PC98

470P_0603_50V8J

PC96

12

+1.25VSP

1

+

PC95
220U_D2_4VM

2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

5

4

3

INC.

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

DDR_1.25V/THROTTLING

LA-1911

1

0.2

51 57Friday, August 08, 2003

A

1 1

12

H_VID45
H_VID35
H_VID25

VCORE_ENLL5,49

PR124
0_0603_5%

PR156
100K_0603_5%

1 2

H_VID15
H_VID05
H_VID55

12

PR129

475_0603_1%

12

PR131

21.5K_0603_1%

PU13

1

IN

4

PG

3

EN

MIC5258_SOT23-5

PR130

12

69.8K_0603_1%

7

PR136

10K_0603_1%

1 2

PR144

45.3K_0603_1%

1 2

OUT

GND

Frequency Select

PU5B

5

+

0

-

LM358A_SO8

5

2

1. When mode control signal is
high/ low, the VR will operate to
Northwood/ Prescott load line

PR133

12

6

100K_0603_1%

12

PR141

32.4K_0603_1%

+VCCVIDP

12

12

PR140
10K_0603_5%@

+3VALWP

PC109

4.7U_1206_16V4Z

+5VALWP

12

2 2

12

PC102

100P_0603_50V8J

3 3

+3VALWP

0_0603_5%

VID_PWRGD5

PR146

12

VR_ON37

1.2VDD

12

PC108

4.7U_1206_16V4Z

PR154

0_0603_5%

12

B

+5VALWP

PR126
0_0603_5%

1 2

PC99
1U_0603_10V6K

1 2

PR125 0_0603_5%

PC100

12

0.047U_0603_25V7M

PR134 0_0603_5%@

1 2

PC105

12

@220P_0603_50V8J

PR138

@330K_0402_5%

1 2

PU12

32

2
3
4
5

6
34
33

35

10

11

9

36

37

38 14
40
12
19

ISL6247_MLFP40

Panasonic ERTJ0EV334J (0402)
Locate this NTC resistor on
PCB between phase 2 and 3
for thermal compensation.

PQ29

13

D

2N7002_SOT 23

2

G

S

H_BOOTSELECT4

PR122

80.6K_0603_1%

VCC

VID3
VID2
VID1
VID0
VID12.5

ENLL
DRSEN

DSEN#

OCSET

SOFT

DSV

FS

DRSV

VR-TT# NC
NTC
GND
GND

1M_0603_1%

PQ28

2

TP0610T_SOT23

GMCH_SEL49

12

PR155

100K_0603_5%

RAMPS
PGOODVID4

PWM1

ISEN1+

ISEN1-

PWM2

ISEN2+

ISEN2-

PWM3

ISEN3+

ISEN3-

PWM4

ISEN4+

ISEN4-

COMP

VDIFF
VSEN
VRTN

OFS

PR142

13

PR153
22K_0603_5%

7
391

25
24

23

26
27

28

20
21

22

31
30

29

15

13

FB

16
17
18

8

PR145

340K_0603_1%

12

B+

1 2

PR123

0_0603_5%@

+5VALWP

12

1 2

2

Battery Feed
Forward

12

10K_0603_5%

PR127

0_0603_5%@

PR135

12

0.1U_0603_16V7K
PC106

PR148

PR147

5.1K_0603_1%

1 2

27K_0603_5%

1 2

13

D

2

G

S

PQ31

MMBT3904_SOT23

3 1

C

12

+5VALWP

PC101

1000P_0603_50V7K

PC104

1000P_0603_50V7K@

12

12

Place close to IC

12

1 2

PC107

1U_0603_10V6K

PR151

PQ30
2N7002_SOT 23

0_0603_5%

PR152

@0_0603_5%

PR132

20K_0603_1%

1 2

PC103

12

22P_0603_50V7K

PR137
0_0603_5%@

PQ27

2N7002_SOT 23

PR149
0_0603_5%

@0_0603_5%

12

12

VCORE_PWRGD 24,40,49

PWM1 53
ISEN1+ 53

ISEN1- 53

PWM2 53
ISEN2+ 53

ISEN2- 53

PWM3 54
ISEN3+ 54

ISEN3- 54

PWM4 54
ISEN4+ 54

ISEN4- 54

12

PR139

2.26K_0603_1%

1 2

PR143

D

S

13

PR150

Place near +VCC_CORE
output capacitor

VSSSENSE 5

G

2

12

12

16.2K_0603_1%

12

+CPU_CORE

VCCSENSE 5

Remote
Sensing

D

(Northwood="0",Prescott="1")

4 4

2. VID5(12.5) should be pulled
high, when the VR operates to
Nothwood load line.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

A

B

INC.

C

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

CPU_CORE_Controller

LA-1911

D

52 57Friday, August 08, 2003

0.2

A

B

C

D

+5VALWP

PR157
3_0603_5%

1 1

1 2

6

PWM1 52

PR159

499K_0603_1%

1 2

PR158

0_0603_5%

0.1U_0603_16V7K

PC116

12

PC117

1 2

1U_0805_25V4Z

3
7

1 2

CPU_DRIVE_EN

PC110

0.22U_0805_16V7K

PU14

BOOT

VCC
PWM

UGATE

EN

PHASE

LGATEGND

ISL6207CB-T_SO8

12

PQ32

IRF7811W_S08

2
1
8
54

PR160

1_0603_5%

N5

PHASE1

PQ34

SI4362_SO8

876

5

DDD

D

S

S

G

S

1

3

4

2

12

876

5

DDD

D

S

S

G

S

1

3

4

2

5

D

G

3

4

5

D

G

3

4

876

DDD

PQ33
IRF7811W_S08

S

S

S

1

2

876

DDD

SI4362_SO8

S

S

S

1

2

PQ35

PC111

4.7U_1210_25V6K

1 2

PC112

12

4.7U_1210_25V6K

12

PC113

4.7U_1210_25V6K

1

PC141
470P_0402_50V7K

2

12

PC142

0.1U_0603_25V7K

**

Panasonic ETQ-P4LR56WFC

PL14

1 2

0.56UH_ETQP4LR56WFC_21A_20%

PR161

12

32.4K_0603_1%

CPU_B+

PL13

1 2

C8B BPH 853025_2P

PC119

12

0.01U_0603_50V7K

1

+

PC149
220U_25V_M

2

B+

N6

ISEN1-52
ISEN1+52

2 2

PR163
3_0603_5%

1 2

PWM2 52

6
3

7

PR164
499K_0603_1%

1 2

3 3

ISEN2-52
ISEN2+52

PC125

1U_0805_25V4Z

1 2

PC120

1 2

0.22U_0805_16V7K

PU15

BOOT

VCC
PWM

UGATE

EN

PHASE

LGATEGND

ISL6207CB-T_SO8

2
1
8
54

N7

PQ36

IRF7811W_S08

PR165

1_0603_5%

12

PHASE2

PQ38

SI4362_SO8

N8

876

5

D

G

3

4

5

D

G

3

4

DDD

IRF7811W_S08

S

S

S

1

2

876

DDD

SI4362_SO8

S

S

S

1

2

PQ37

PQ39

12

4.7U_1210_25V6K

876

5

DDD

D

S

S

G

S

1

3

4

2

876

5

DDD

D

S

S

G

S

1

3

4

2

PC121

CPU_B+

PC123

4.7U_1210_25V6K

12

PC122

12

4.7U_1210_25V6K

Local Transistor
Swtich Decoupling

0.56UH_ETQP4LR56WFC_21A_20%

PR166

32.4K_0603_1%

1

2

PL15

1 2

12

PC143
470P_0402_50V7K

Panasonic ETQ-P4LR56WFC

820_0603_5%

**

PH3

12

12

PC144

0.1U_0603_25V7K

PC126

12

0.01U_0603_50V7K

PH4

12

820_0603_5%

12

PD30

EC31QS04

+CPU_CORE

Local Transistor
Swtich Decoupling

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

A

B

INC.

C

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

CPU_CORE_Power stage 1

LA-1911

D

53 57Friday, August 08, 2003

0.2

A

PC127

1 2

+5VALWP

PR168
3_0603_5%

0.22U_0805_16V7K
IRF7811W_S08

1 2

1 2

PU16

6

BOOT

VCC

3

PWM

UGATE

7

EN

PHASE

LGATEGND

ISL6207CB-T_SO8

2
1
8
54

PR170

1_0603_5%

N9

PHASE3

SI4362_SO8

1 1

PWM3 52

PR169

499K_0603_1%

1 2

PC131

1U_0805_25V4Z

PQ40

PQ42

B

C

D

CPU_B+

876

5

D

G

5

D

G

DDD

IRF7811W_S08

S

S

S

134

2

876

DDD

SI4362_SO8

S

S

S

134

2

PQ41

PQ43

PC128

12

4.7U_1210_25V6K

PC129

12

4.7U_1210_25V6K

PC130

12

4.7U_1210_25V6K

Panasonic ETQ-P4LR56WFC

PL16

1 2

0.56UH_ETQP4LR56WFC_21A_20%

PR171

12

32.4K_0603_1%

1

PC145
470P_0402_50V7K

2

**

PC133

12

0.01U_0603_50V7K

12

PC146

0.1U_0603_25V7K

876

5

DDD

D

S

S

G

S

134

2

12

876

5

DDD

D

S

S

G

S

134

2

N10

**

PH5

12

820_0603_5%

12

PC148

0.1U_0603_25V7K

PC140

12

0.01U_0603_50V7K

+CPU_CORE

ISEN3-52

CPU_DRIVE_EN

2 2

PWM4 52

PR174

499K_0603_1%

1 2

ISEN3+52

PC138

1U_0805_25V4Z

PR173
3_0603_5%

1 2

1 2

1 2

PU17

6

BOOT

VCC

3

PWM

UGATE

7

EN

PHASE

LGATEGND

ISL6207CB-T_SO8

PC134

0.22U_0805_16V7K

2

N11

1
8
54

SI4362_SO8

PQ44

IRF7811W_S08

PR175

1_0603_5%

12

PHASE4

PQ46

CPU_B+

876

5

DDD

D

S

S

G

S

134

2

876

5

DDD

D

S

S

G

S

134

2

5

D

G

5

D

G

876

DDD

PQ45
IRF7811W_S08

S

S

S

134

2

876

DDD

SI4362_SO8

S

S

S

134

2

PQ47

12

PC135

4.7U_1210_25V6K

12

PC136

4.7U_1210_25V6K

PC137

12

4.7U_1210_25V6K

Local Transistor
Swtich Decoupling

1 2

0.56UH_ETQP4LR56WFC_21A_20%

PR176

32.4K_0603_1%

PL17

12

1

PC147
470P_0402_50V7K

2

Panasonic ETQ-P4LR56WFC

N12

3 3

ISEN4-52
ISEN4+52

PH6

820_0603_5%

12

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

A

B

INC.

C

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

CPU_CORE_Power stage 2

LA-1911

D

54 57Friday, August 08, 2003

0.2

DAL00 PIR LIST

************* Rev0.1 PIR List **************

04/01/03 Written by Po

P52:Add Oz168 for reservation

04/09/13 Written by Jei
P36:Swap RP142 Pin 10 <-> 6; Pin 7 <-> 8
P36:Swap CP4 Pin 4 <-> 1; Pin 2 <-> 3

EVT2

POWER PIR LIST

page Reason for change Modify list

49,50,51 Modify power sequence for H/W request Delete PR 89,PR90,PR120 and add PR179,PR180,PR181,PR183

Design change VTT_GMCH OCP point Change PR95 from 75K to 220K49
47
51
50

53,54

53,54 Change PQ34,PQ35,PQ38,PQ39,PQ42,PQ43,PQ46,PQ47 from IRF7832 to SI4362

52
47
48

53,54

Design change charger voltage Change PR63 from 47.5K to 95.3K and add PR184

Increase throttling speed

Change VGA_CORE voltage for H/W request

Solve CPU_CORE noise for EMI request

Update BOM

To prevent shortage Change PC142,PC144,PC146,PC148 from SE072104K00 to SE042104K01

Change PC91 from 1000P to 10P
Change PR106 from 13.3K to 6.49K;PR103 from 5.62K to 3.92K
Add 470P at location PC141,PC143,PC145,PC147
Add 0.1U at location PC142,PC144,PC146,PC148

Change PC100 from 0.033U to 0.056U; delete PR138
Delete PC37; change PR43 from SD021100D00 to SD036100D00
Change PC60,PC61 from SE026473K06 to SE023473NT1

PVT

PVT(memo)

PVT(memo)

53,54 Change PQ32,PQ33,PQ36,PQ37,PQ40,PQ41,PQ44,PQ45 from IRF7821

49
50
46

53

50 Change VGA_CORE voltage for H/W request Change PR103 from 3.4K to 4.53K, PR106 from 4.53K to 9.09K (for X6326251002_NV31M)
52 Change CPU_CORE OCP point for QAD request Change PR131 from 27.4K to 21.5K

50 Modify CPU_CORE load line Change PR139 from 1.87K to 2.26K
52 Solved CPU_CORE shutdown issue Add PC103

Change high side MOSFET and add gate/boot

resistor for EMI request

Solve power sequency problem for H/W request

Change VGA_CORE voltage for H/W request

Change CPU/Battery's OTP point for Thermal

team request

Solve LAN transmission has high frequency

noise issue

Update BOM47,52

to IRF7811W, change PR157,PR163,PR168,PR173 from 0ohm to 3ohm,
change PR160,PR165,PR170,PR175 from 0ohm to 1ohm

Delete PR180 and add PR177(0ohm)
Change PR106 from 6.49K to 0ohm (for X6326251001_NV33M/34M)
Change PR39 from 16.9K to 14.7K, PR32 from 2.8K to 3.32K
PR41 from 3.24K to 3.48K
Add PC149

Change PD17 from SC1B051L000 to SC11QS04000, delete PR150,PR152 and
add PR149,PR151(0ohm),delete PC105,change PC100 from 0.056U to 0.047U

PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Inc.

Title

DAL00 PIR LIST

Size Document Number Rev

B

LA-1911

Date: Sheet of

55 57Friday, August 08, 2003

0.2

5

Rev 0.2

4

3

2

1

Page Page

5

D D

6

6
11
26
26
26
26

C C

27
27
28
31
31
31

31

B B

31

Location From To Location From To

Modify L5,L6

DEL C20,C21 22U X
DEL 470U X470U

Modify L15

MODIFY C49,C488

C528

DEL C50 0.01U X
ADD C787 1000PX
ADD C788
ADD D21
ADD C83

ADD C797,C798

C799

DEL L42,L43

L44

ADD L10,L11

L12

ADD U57 X

ADD R617,R618

R619,R620

R621,R622

R623,R624

MODIFY C781 0.01U 0.1U

10U 4.7U

0.82U 4.7U

0.1U0.01U

X
X

X

CHB2012U170

X

X

4.7U

RB751V

0.1UX

0.1U
X

CHB2012U170

74HCT4066

1M

38
38
38
38
39
40
40
40
40
40

43

43

43
43
44

ADD L54
ADD C789 X 1U
ADD U56
DEL U13

MODIFY Q6 2N7002DTA114YKA

ADD R625 X 10K
MODIFY R464 20K 33K
MODIFY C629
MODIFY R465

ADD L55,L56 X
ADD Q23,Q38

Q39,Q40
Q46

ADD R450,R516

R457,R452
R272

ADD R612,R613 10K

ADD L55,L56

L57

ADD C794,C795 1U

X

X

29F040 X

0.33U 1U
100K 68K

X 2N7002

X 470 Ohm

X
X
X

FCM2012C-800

SST39VF080-70

CHB1608U301

BLM11A601S

32
38
38

38
38

A A

38

MODIFY R238,R241

CHANGE U50

CHANGE C729 R542

CHANGE R542 C729

ADD C793 X 100P

ADD C790,C791

C792

5

1.3K 1.5K

SN74HCT273PW

X 220P

4

SN74HCT374PW

Compal Electronics, In c.

Title

Custom

PIR

LA-1911 0.2

2

56 57Friday, August 08, 2003

1

Size Document Number Rev

3

Date: Sheet of

5

Rev 1.0

4

3

2

1

Page Page

31

D D

31
31
31
31

C C

Location From To Location From To

ADD U61
ADD C809,C811 4.7U
ADD C810,C812 0.1U

ADD R637
ADD R638

X
X
X
X
X 24K

SI9182DH

69.8K

B B

A A

Compal Electronics, In c.

Title

PIR

Size Document Number Rev

Custom

5

4

3

Date: Sheet of

2

LA-1911 1.0

57 57Friday, August 08, 2003

1

5

Rev 0.3

4

3

2

1

Page Page

22

D D

22
22
22
31
31
31
31

C C

32
32
40
40
40

Location From To Location From To

ADD R627

ADD U58 TC7SH08FU

X
X

ADD C806 X 0.1U

X 10KADD R628
ADD C807 X 1U
DEL Q15 SI2302DS X
ADD U59 SI4800DYX

ADD R634,R635 X 0 Ohm
ADD R629,R630 X 0 Ohm

ADD R633 X 10K

Modify R445 180K 820K

ADD R631
ADD R632

X

X 0 Ohm

0 Ohm

0 Ohm

40
44

B B

A A

44

ADD R625 X 10K
DEL C795 1U X

MODIFY R606 68K 0 Ohm

Compal Electronics, In c.

Title

PIR

Size Document Number Rev

Custom

5

4

3

Date: Sheet of

2

LA-1911 0.3

57 57Friday, August 08, 2003

1