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LA-1841
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Compal LA-1841, Satellite P25 Schematic

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BTQ00 Rev0.1 Schematics Document
Intel Prescott uFCPGA-478 / P4 Northwood
with Springdale / ICH5 / nVIDIA NV18/34/31M chipset
2003/02/20
3 3
4 4
Compal Electronics, Inc.
Title
LA-1841
Cove r Sheet
1 57Thursday, February 20, 2003
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Size Document Number Rev
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Date: Sheet of
Page 2
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B
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Compal Confidential
File Name : BTQ00
1 1
CRT Connector
LVDS Interface
TV OUT Connector (4Pin Reverse)
2 2
page 22
page 22
page 22
NV18/31/34M
PIRQA#
Fan Control
VGA
page 16,17, 18,19
VRAM DDR 32MB/64MB (FBGA)
page 20,21
page 45
AGP BUS(8X)
Desktop Northwood uFCPGA-478 CPU
page 4,5,6
PSB
400/533/667/800MHz
H_D#(0..63)H_A#(3..31)
Intel Springdale MCH
FCBGA-932
page 7,8,9,10,11
Hub-Link
Thermal Sensor ADM1032AR
Memory BUS(DDR)
2.5V DDR- 200/266
USB2.0
page 5
DDR-SO-DIMM X2
BANK 0, 1, 2, 3
Desktop Prescott uFCPGA-478 CPU
Clock Generator
ICS 952623
page 15
page 12,13,14
USB Conn *4
page 37
MDC & BT Conn
page 38
3.3V 33 MHz
IDSEL: AD18 IDSEL: AD16 PIRQA#, GNT0#, REQ0#
IEEE 1394 TSB43AB21
page 30
RTC CKT.
3 3
Power OK CKT.
Power On/Off CKT.
DC/DC Interface CKT.
4 4
PIRQC#, PIRQD#
GNT1#, REQ1#
page 41
Mini PCI socket
page 29
IDSEL: AD17 PIRQB#, GNT3#, REQ3#
LAN
RTL 8101L
page 26
RJ45/11 CONN
page 26
Touch Pad
page 44
EC I/O Buffer
page 40
IDSEL: AD20 PIRQB#, SIRQ, GNT2#, REQ2#
EC
PCI BUS
CardBus Controller Toshiba TC6385XB
Slot 0,1
page 28
page 27,28
SD Conn.
page 27
NS87591L
page 39
Int.KBD
BIOS (1MB)
page 39
page 40
Intel ICH5
mBGA-460
page 23,24,25
LPC BUS
PARALLEL
AC-LINK
ATA-100
Primary IDE
Secondary IDE
ATA-100
SMsC LPC47N227
Super I/O
page 36
page 38
FIR
page 37
master
Floppy
AC97 Codec
ALC202
page 31
HDD Connector
page 35
master/slave
Audio DJ
OZ-168
Module Conn.
(Main Module)
page 34
page 35
HW EQ CKT
page 32
Audio AMP
page 32
Module Conn.
(2nd Module)
page 35
Power Circuit DC/DC
Title
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Date: Sheet of
Compal Electronics, Inc.
Block Diag ram
LA-1841
2 57Thursday, February 20, 2003
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0.1
Page 3
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Voltage Ra ils
Power Plane Description
1 1
2 2
VIN B+ +CPU_CORE +CPU_VID +VTT_GMCH +1.225V (Prescott) / +1.45V (Northwood) +VGA_CORE ON OFF OFF1.2V switched power rail for VGA chip +1.25VS 1.25V switched power rail +1.5VS +2.5V +2.5VS 2.5V switched power rail +3VALW +3V +3VS +5VALW +5V +5VS
+RTCVCC
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Adapter power supply (19V) AC or battery power rail for power circuit. Core voltage for CPU
1.2V switched power rail for CPU AGTL Bus
AGP 4X/8X
2.5V power rail
3.3V always on power rail
3.3V power rail
3.3V switched power rail 5V always on power rail 5V power rail 5V switched power rail 12V always on power rail RTC power
S1 S3 S5
N/A N/A N/A
ON OFF ON OFF ON OFF OFF
ON OFF OFF ON OFF OFF ON ON ON ON ON ON ON ON ON ON+12VALW ON
N/AN/AN/A OFF OFF
OFF
ON
OFF
OFF ON ON*
OFF
ON OFF
OFF
ON
ON* OFF
OFF
OFF
ON
ON* ON
ON
STATE
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
Board ID Table for AD channel
Vcc 3.3V +/- 5%
Board ID
0 1 2 3 4 5 6 7 NC
SIGNAL
SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
HIGH HIGH HIGH HIGH
LOW
LOW
LOW LOW LOW LOW
100K +/- 5%Ra
Rb V min
0
8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%
ON
ON
ON ON
ON
ON
LOW
AD_BID
0 V
HIGH
LOWLOWLOW
HIGHHIGHHIGH
HIGH
HIGH
V typ
AD_BID
ON
ON
ON
0 V 0 V
ON
OFF
OFF
V
AD_BID
ON
OFF
OFF
OFF
max
0.216 V 0.250 V 0.289 V
0.436 V
0.712 V
1.036 V
0.503 V
0.819 V
0.538 V
0.875 V
1.185 V 1.264 V
1.453 V 1.650 V 1.759 V
1.935 V
2.500 V
2.200 V
3.300 V
2.341 V
3.300 V
LOW
OFF
OFF
OFF
External PCI Device s
Device IDSEL# REQ#/GNT# Interrupts
VGA
CardBus
LAN
Mini-PCI
1394 AD16 0 PIRQA
3 3
SD AD22
EC SM Bus1 address
Device
Smart Battery EEPROM(24C16/02)
(24C04)
AD20 AD17 AD18
2 3 PIRQB 1/4
EC SM Bus2 address
Address Address
1010 000X b 1011 000Xb
Device
ADM1032 OZ168
PIRQA PIRQA/PIRQB
PIRQC/PIRQD
1001 110X b0001 011X b 0011 0100 b
Board ID
0 1 2 3 4 5 6 7
PCB Revision
0.1
ICH4 SM Bus address
4 4
Device
Clock Generator ( ICS 952623)
DDR DIMM0 DDR DIMM1
A
Address
1101 001Xb
1001 000Xb 1001 001Xb
Compal Electronics, Inc.
Title
Size Document Number Rev
B
B
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Date: Sheet of
LA-1841
Notes
3 57Thursday, February 20, 2003
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Page 4
5
4
3
2
1
D D
C C
1 2 1 2
B B
A20A8AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF21
B19B7B9
C20C8D11
D19D7D9
VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VSS_0
H1H4H23
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VCC_9
VSS_7
VCC_10
VCC_11
VSS_8
VSS_9
VCC_12
VCC_13
VSS_10
VSS_11
A26A3A9
VCC_14
VCC_15
VSS_12
VSS_13
AA1
VCC_16
VCC_17
VSS_14
VSS_15
AA11
AA13
VCC_18
VCC_19
VSS_16
VSS_17
AA15
AA17
VCC_20
VCC_21
VSS_18
VSS_19
AA19
AA23
VCC_22
VCC_23
VSS_20
VSS_21
AA26
AA4
VCC_24
VCC_25
VSS_22
VSS_23
AA7
AA9
VCC_26
VCC_27
VSS_24
VSS_25
AB10
AB12
VCC_28
VSS_26
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
Prescott
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
AB14
AB16
VSS_36
AB18
AB20
AB21
AB24
AB3
AB6
AB8
AC11
AC13
VCC_39
VCC_40
VSS_37
VSS_38
AC15
AC17
VCC_41
VCC_42
VSS_39
VSS_40
AC19
AC2
VCC_43
VCC_44
VSS_41
VSS_42
AC22
AC25
VCC_45
VCC_46
VSS_43
VSS_44
AC5
AC7
VCC_47
VCC_48
VSS_45
VSS_46
AC9
AD10
VCC_49
VCC_50
VSS_47
VSS_48
AD12
AD14
VCC_51
VCC_52
VSS_49
VSS_50
AD16
AD18
VCC_53
VCC_54
VSS_51
VSS_52
AD21
AD23
VCC_55
VCC_56
VSS_53
VSS_54
AD4
AD8
VCC_57
VSS_55
VCC_58
VCC_59
VCC_61
BOOTSELECT
AD1
VCC_62
VCC_63
VCC_81
VCC_82
VCC_64
VCC_65
VCC_83
VCC_84
F9
VCC_66
VCC_67
VCC_80
VCC_85
VCC_68
VCC_69
VCC_78
VCC_79
E20E8F11
VCC_70
VCC_71
VCC_76
VCC_77
VCC_72
VCC_73
VCC_74
VCC_75
B21
D#0
B22
D#1
A23
D#2
A25
D#3
C21
D#4
D22
D#5
B24
D#6
C23
D#7
C24
D#8
B25
D#9
G22
D#10
H21
D#11
C26
D#12
D23
D#13
J21
D#14
D25
D#15
H22
D#16
E24
D#17
G23
D#18
F23
D#19
F24
D#20
E25
D#21
F26
D#22
D26
D#23
L21
D#24
G26
D#25
H24
D#26
M21
D#27
L22
D#28
J24
D#29
K23
D#30
H25
D#31
M23
D#32
N22
D#33
P21
D#34
M24
D#35
N23
D#36
M26
D#37
N26
D#38
N25
D#39
R21
D#40
P24
D#41
R25
D#42
R24
D#43
T26
D#44
T25
D#45
T22
D#46
T23
D#47
U26
D#48
U24
D#49
U23
D#50
V25
D#51
U21
D#52
V22
D#53
V24
D#54
W26
D#55
Y26
D#56
W25
D#57
Y23
D#58
Y24
D#59
Y21
D#60
AA25
D#61
AA22
D#62
AA24
D#63
K2
A#3
K4
A#4
L6
A#5
K1
A#6
L3
A#7
M6
A#8
L2
A#9
M3
A#10
M4
A#11
N1
A#12
M1
A#13
N2
A#14
N4
A#15
N5
A#16
T1
A#17
R2
A#18
P3
A#19
P4
A#20
R3
A#21
T2
A#22
U1
A#23
P6
A#24
U3
A#25
T4
A#26
V2
A#27
R6
A#28
W1
A#29
T5
A#30
U4
A#31
V3
A#32
W2
A#33
Y1
A#34
AB1
A#35
J1
REQ#0
K5
REQ#1
J4
REQ#2
J3
REQ#3
H3
REQ#4
G1
ADS#
AC1
AP#0
V5
AP#1
AA3
BINIT#
AC3
IERR#
H6
BR0#
D2
BPRI#
G2
BNR#
G4
LOCK#
AF22
BCLK0
AF23
BCLK1
F3
HIT#
E3
HITM#
E2
DEFER#
1 2
1 2
R_C
Reference Intel document Desktop P4 Spec.: 10988 P4 0.13u 512KB L2 EMTS Rev.2.0 Desktop Prescott Spec.: 11910 Prescott EMTS Rev.0.5
Pin number Northwood
P in name
B6 FERR# F ERR#/PBE# Pull-up 62ohm
AA20 I TPCLKOUT0 Pull-up56ohm
AB22 I TPCLKOUT1 Pull-up 56ohm
AD2 NC V IDPWRGD Pull-up 8.2Kohm
AD3 NC float VID5 Pull-up1Kohm to
A A
AF3 NC float V CCVIDLB Connect to +VCCVID AD20 VCCA V CCIOPLLConnect to CPU
AF23 Connect to CPU
V CCIOPLL VCCA
AD1 VSS B OOTSELECTConnect to GND CPU determine AE26 VSS Connect to GND OPTIMIZED/
C ommend Commend
Pull-up 62ohm to +VCC_CORE
to +VCC_CORE
to +VCC_CORE float
Filter
Filter
5
P rescott P in name
to +VCC_CORE
T ESTHI6 Pull-up 62ohm
to +VCC_CORE
T ESTHI7 Pull-up 62ohm
to +VCC_CORE
to +VCCVID
+3VRUN & connect t o PWRIC
Connect to CPU Filter
Connect to CPU Filter
float
COMPAT#
N orthwood P rescott
Pop Pop
Pop Pop
Pop Pop
PopDepop
Depop
Depop
Pop
Pop
Pop Depop
Pop Depop
4
3
Pop: Northwood Depop: Prescott
Compal Electronics, Inc.
Prescott Processor in uFCPGA478 (1/2)
2
LA-1841
1
Page 5
5
4
3
2
1
1 2
1 2
1 2
D D
1 2
C C
B B
Note: Please change to 10uH, DC current of 100mA parts and close to cap
1 2
1 2
PLL Layout note :
1.Place cap within 600 mils of the VCCA and VSSA pins.
2.H_VCCIOPLL,HVCCA,HVSSA trace wide 12 mils(min)
Place near ICH
Place near CPU
+
1 2
Pop: Prescott Depop: Northwood
1 2 1 2 1 2 1 2 1 2 1 2
1 2
1 2
AE11
AE13
AE15
AE17
AE19
AE22
AE24
AE7
AE9
AF10
AF12
AF14
AF16
AF18
AF20
B26B4B8
C19C2C22
C25C5C7C9D10
D24D3D6D8E1
E26E4E7E9F10
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_161
VSS_162
T24T3T6U2U22
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
U25U5V1
VSS_99
VSS_100
VSS_169
VSS_170
VSS_101
VSS_102
VSS_171
VSS_172
V26V4W21
VSS_103
VSS_104
VSS_173
VSS_174
W24W3W6Y2Y22
VSS_105
VSS_106
VSS_175
VSS_176
VSS_107
VSS_108
VSS_177
VSS_178
VSS_109
VSS_110
VSS_179
VSS_180
Y5
VSS_111
VSS_112
VSS_181
VSS_113
VSS_114
AE5
VSS_115
VSS_116
VID0
VID1
AE4
AE3
VSS_117
VSS_118
VID2
VID3
AE2
AE1
VSS_119
VSS_120
VID4
VID5
AD3
VSS_121
F1
RS#0
G5
RS#1
F4
RS#2
AB2
RSP#
J6
TRDY#
C6
A20M#
B6
FERR#
B2
IGNNE#
B5
SMI#
AB23
PWRGOOD
Y4
STPCLK#
D1
LINT0
E5
LINT1
W5
INIT#
AB25
RESET#
H5
DBSY#
H2
DRDY#
AD6
BSEL0
AD5
BSEL1
B3
THERMDA
C4
THERMDC
A2
THERMTRIP#
AC6
BPM#0
AB5
BPM#1
AC4
BPM#2
Y6
BPM#3
AA5
BPM#4
AB4
BPM#5
D4
TCK
C1
TDI
D5
TDO
F7
TMS
E6
TRST#
AD20
VCCIOPLL
AE23
VCCA
A5
VCCSENSE
A4
VSSSENSE
AF3
VCCVIDLB
AD22
VSSA
AC26
ITP_CLK0
AD26
ITP_CLK1
L24
COMP0
P1
12
12
COMP1
VSS_129
F8
G21
VSS_130
VSS_131
VSS_132
VSS_133
G24G3G6J2J22
VSS_134
VSS_135
J25J5K21
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
K24K3K6L1L23
VSS_142
VSS_143
L26L4M2
VSS_144
VSS_145
VSS_146
VSS_147
M22
M25M5N21
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
N24N3N6P2P22
Prescott
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
P25P5R1
R26R4T21
VSS_122
F18F2F22
VSS_123
VSS_124
VIDPWRGD
AD2
VSS_125
VSS_126
VSS_127
AF26
F5
VSS_128
SKTOCC#
OPTIMIZED/COMPAT#
VCCVID
1
2
GTLREF0 GTLREF1 GTLREF2 GTLREF3
TESTHI0 TESTHI1 TESTHI2 TESTHI3 TESTHI4 TESTHI5 TESTHI6 TESTHI7 TESTHI8
TESTHI9 TESTHI10 TESTHI11 TESTHI12
DSTBN#0 DSTBN#1 DSTBN#2 DSTBN#3
DSTBP#0 DSTBP#1 DSTBP#2 DSTBP#3
ADSTB#0 ADSTB#1
PROCHOT#
MCERR#
J26
DP#0
K25
DP#1
K26
DP#2
L25
DP#3
AA21 AA6 F20 F6
AE26
AD24 AA2 AC21 AC20 AC24 AC23 AA20 AB22 U6 W4 Y3 A6 AD25
E22 K22 R22 W22
F21 J23 P23 W23
L5 R5
E21
DBI#0
G25
DBI#1
P26
DBI#2
V21
DBI#3
AE25
DBR#
C3 V6 AB26
SLP#
A22
NC1
A7
NC2
AF25
NC3
AF24
NC4
AE21
NC5
R_E
1 2
R_G
1 2
1 2
RE Pop: Prescott Depop: Northwood
1 2 1 2
1 2
1 2 1 2 1 2 1 2 1 2
1 2 1 2
Pop: Northwood Depop: Prescott
1 2
Pop: P4 Protability Depop: Prescott/Northwood
1 2 1 2
45 36 27 18
122
12
GTL Reference Voltage
Layout note :
1. +CPU_GTLREF Trace wide 12mils(min),Space 15mils
2. Place R_A and R_B near CPU.
3. Place decoupling cap 220PF near CPU.
12
2
1 8 2 7
A A
3 6 4 5
+CPU_GMCH_GTLREF trace wide 12mils(min),Space 15mils
R_A
R_B
1212
2 1
1
Close to the CPU
31
1 2
1
2
Compal Electronics, Inc.
1
2
2
VDD1
D+
3
ALERT#
D-
8
THERM#
SCLK
7
GND
SDATA
12
1 6
4
5
Prescott Processor in uFCPGA478 (2/2)
5
4
3
2
LA-1841
1
Page 6
5
4
3
2
1
Place 11 North of Socket(Stuff 8)
1
2
D D
1
2
1
2
1
2
1
2
1
2
1
2
1
2
Place 12 Inside Socket(Stuff all)
1
2
1
2
C C
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
22uF depop reference Springdale Customer Schematic R1.2 page82
1
2
1
2
1
2
1
2
Place 9 South of Socket(Unstuff all)
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
B B
470uF _ERS10m ohm* 15, ESR=0.5m ohm
1
2
1
2
A A
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
Decoupling Reference Document: Springdale Chipset Platform Design guide Rev1.11 (12474)page239
Decoupling Reference Requirement: 560uF Polymer, ESR:5m ohm(each) * 10 22uF X5R * 32
Compal Electronics, Inc.
CPU Decoupling
LA-1841
5
4
3
2
1
Page 7
5
4
3
2
1
+VTT_GMCH
D D
C C
+CPU_GMCH_GTLREF
GTL Reference Voltage
B B
A A
Layout note :
1. +GMCH_GTLREF Trace wide 12mils(min),Space 15mils.
2. Place decoupling cap 220PF near GMCH.
Trace width 10mils,Space 7mils
12
R365 301_0603_1%
HD_SWING
12
R369 102_0603_1%
HDRCOMP
12
R362
24.9_0603_1%
+VTT_GMCH
12
R359 200_0603_1%
1 2
R647 0_0603_5%
1
C159
0.01U_0402_16V7K
2
+GMCH_GTLREF
1
C160 220P_0402_50V8K
2
H_RS#[0..2]5
H_A#[3..31]4
H_REQ#[0..4]4
H_TRDY#5
+GMCH_GTLREF
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3
H_RS#0 H_RS#1 H_RS#2
HDRCOMP HD_SWING
H_REQ#4
H_ADSTB#05 H_ADSTB#15
CLK_HCLK15 CLK_HCLK#15
H_DSTBP#05 H_DSTBN#05 H_DINV#05 H_DSTBP#15 H_DSTBN#15 H_DINV#15 H_DSTBP#25 H_DSTBN#25 H_DINV#25 H_DSTBP#35 H_DSTBN#35 H_DINV#35
H_ADS#4 H_DRDY#5
H_DEFER#4 H_HITM#4 H_HIT#4 H_LOCK#4 H_BR0#4 H_BNR#4
H_BPRI#4 H_DBSY#5
H_RESET#5 MCH_CLKSEL0 15
SYS_PWROK24,42
U36A
D26
HA3#
D30
HA4#
L23
HA5#
E29
HA6#
B32
HA7#
K23
HA8#
C30
HA9#
C31
HA10#
J25
HA11#
B31
HA12#
E30
HA13#
B33
HA14#
J24
HA15#
F25
HA16#
D34
HA17#
C32
HA18#
F28
HA19#
C34
HA20#
J27
HA21#
G27
HA22#
F29
HA23#
E28
HA24#
H27
HA25#
K24
HA26#
E32
HA27#
F31
HA28#
G30
HA29#
J26
HA30#
G26
HA31#
B29
HREQ0#
J23
HREQ1#
L22
HREQ2#
C29
HREQ3#
J21
HREQ4#
B30
HADSTB0#
D28
HADSTB1#
B7
HCLKP
C7
HCLKN
B19
HDSTBP0#
C19
HDSTBN0#
C17
DINV0#
L19
HDSTBP1#
K19
HDSTBN1#
L17
DINV1#
G9
HDSTBP2#
HDSTBN2#
L14
DINV2#
D12
HDSTBP3#
E12
HDSTBN3#
C15
DINV3#
F27
ADS#
D24
HTRDY#
G24
DRDY#
L21
DEFER#
E23
HITM#
K21
HIT#
E25
HLOCK#
B24
BREQ0#
B28
BNR#
B26
BPRI#
E27
DBSY#
G22
RS0#
C27
RS1#
B27
RS2#
E8
CPURST#
AE14
PWROK#
E24
HDRCOMP
C25
HDSWING
F23
HDVREF
SPRINGDALE_UFCBGA932
HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38#
FSB
HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63#
PROCHOT#
BSEL0 BSEL1
HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8# HD9#
B23 E22 B21 D20 B22 D22 B20 C21 E18 E20 B16 D16 B18 B17 E16 D18 G20 F17 E19 F19 J17 L18 G16 G18 F21 F15 E15 E21 J19 G14 E17 K17 J15 L16 J13 F13 F11 E13 K15 G12 G10 L15 E11 K13 J11 H10 G8 E9 B13 E14 B14 B12 B15 D14 C13 B11 D10 C11 E10 B10 C9 B9 D8 B8
L20
L13 L12
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8
H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_PROCHOT#
H_D#[0..63] 4
H_PROCHOT# 5,52
MCH_CLKSEL1 15
U36F
AR32
VSS
AR29
VSS
AR27
VSS
AR25
VSS
AR23
VSS
AR20
VSS
AR16
VSS
AR13
VSS
AR11
VSS
AR9
VSS
AN32
VSS
AN30
VSS
AN28
VSS
AN26
VSS
AN24
VSS
AN22
VSS
AN20
VSS
AN18
VSS
AN16
VSS
AN14
VSS
AN12
VSS
AN10
VSS
AM35
VSS
AM29
VSS
AM27
VSS
AM25
VSS
AM23
VSS
AM21
VSS
AM19
VSS
AM17
VSS
AM15
VSS
AM13
VSS
AM11
VSS
AM9
VSS
AL32
VSS
AL1
VSS
AK28
VSS
AK26
VSS
AK24
VSS
AK22
VSS
AK20
VSS
AK18
VSS
AK16
VSS
AK14
VSS
AK12
VSS
AK10
VSS
AK8
VSS
AK3
VSS
AJ35
VSS
AJ32
VSS
AJ9
VSS
AJ4
VSS
AJ1
VSS
AH33
VSS
AH30
VSS
AH24
VSS
AH22
VSS
AH20
VSS
AH18
VSS
AH16
VSS
AH14
VSS
AH12
VSS
AH10
VSS
AH6
VSS
AH3
VSS
AG35
VSS
AG32
VSS
AG28
VSS
AG26
VSS
AG24
VSS
AG22
VSS
AG20
VSS
AG18
VSS
AG16
VSS
AG14
VSS
AG8
VSS
AG4
VSS
AF33
VSS
AF30
VSS
AF25
VSS
AF24
VSS
AF22
VSS
AF20
VSS
AF18
VSS
AF16
VSS
AF14
VSS
AF11
VSS
AF9
VSS
AF6
VSS
AF3
VSS
AE35
VSS
AE32
VSS
AE26
VSS
AE25
VSS
AE13
VSS
AE12
VSS
SPRINGDALE_UFCBGA932
GND
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AE11 AE10 AE4 AE1 AD33 AD30 AD28 AD10 AD9 AD8 AD6 AD3 AC35 AC32 AC4 AC1 AB33 AB30 AB28 AB27 AB26 AB10 AB9 AB8 AB6 AB3 AA32 AA4 AA1 Y35 Y33 Y30 Y28 Y27 Y26 Y10 Y9 Y8 Y6 Y3 W32 W18 W17 W4 V33 V30 V28 V27 V26 V19 V17 V10 V9 V8 V6 V3 U32 U19 U18 U4 T35 T33 T30 T28 T27 T26 T10 T9 T8 T6 T3 T1 R32 R4 R1 P33 P30 P28 P27 P26 P9 P8 P6 P3 N35 N32 N4 N1 M33 M30 M28 M27 M26 M6 M3 L35
U36G
L31
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
GND
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
L26 L25 L24 K33 K29 K27 K25 K22 K20 K18 K16 K14 K12 K11
J35 J32 J28 J22 J20 J18 J16 J14 J12
J10 H33 H30 H26 H24 H22 H20 H18 H16 H14 H12
H9 H8 H5
H2 G35 G31 G28
F26 F24 F22 F20 F18
SPRINGDALE_UFCBGA932
F16 F14 F12 F10 F8 F5 F3 F1 E3 E1 D35 D33 D31 D29 D27 D25 D23 D21 D19 D17 D15 D13 D11 D9 D1 C28 C26 C24 C22 C20 C18 C16 C14 C12 C10 C8 C4 A32 A29 A27 A25 A23 A20 A16 A13 A11 A9 A7
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
3
2
Springdale-Host/GND (1/4)
Size Document Number Rev
B
LA-1841
Date: Sheet of
7 57Thursday, February 20, 2003
1
Page 8
5
4
3
2
1
DDRA_SMA[0..12]12,14
D D
C C
+SM_VREF_A
+SM_VREF_A trace width of 12mils and space 12mils(min)
2
1
C528
2.2U_0805_16V4Z
2
1
C522
0.1U_0402_16V4Z
DDRA_SMA[0..12]
DDRA_SWE#12,14 DDRA_SCAS#12,14 DDRA_SRAS#12,14
DDRA_SBS012,14 DDRA_SBS112,14
DDRA_SCS#012,14 DDRA_SCS#112,14
DDRA_CKE012,14 DDRA_CKE112,14
DDRA_CLK112 DDRA_CLK1#12 DDRA_CLK212 DDRA_CLK2#12
DDRA_SMA0 DDRA_SMA1 DDRA_SMA2 DDRA_SMA3 DDRA_SMA4 DDRA_SMA5 DDRA_SMA6 DDRA_SMA7 DDRA_SMA8 DDRA_SMA9 DDRA_SMA10 DDRA_SMA11 DDRA_SMA12
DDRA_SCS#0 DDRA_SCS#1 DDRA_SDQ18
DDRA_CKE0 DDRA_CKE1
SMXRCOMP SMXRCOMPVOH SMXRCOMPVOL
Close to GMCH(E34)
B B
+2.5V
Trace width of 12mils and space 10mils(min)
12
R151
40.2_0603_1%
2
C201
2.2U_0805_16V4Z
1
A A
5
SMXRCOMP
12
R152
40.2_0603_1%
Change to 42.2_1%
Place resistors within
1.0 inch of GMCH (AK9)
Change to 42.2_1%
U36B
AJ34
SMAA_A0
AL33
SMAA_A1
AK29
SMAA_A2
AN31
SMAA_A3
AL30
SMAA_A4
AL26
SMAA_A5
AL28
SMAA_A6
AN25
SMAA_A7
AP26
SMAA_A8
AP24
SMAA_A9
AJ33
SMAA_A10
AN23
SMAA_A11
AN21
SMAA_A12
AL34
SMAB_A1
AM34
SMAB_A2
AP32
SMAB_A3
AP31
SMAB_A4
AM26
SMAB_A5
AB34
SWE_A#
Y34
SCAS_A#
AC33
SRAS_A#
AE33
SBA_A0
AH34
SBA_A1
AA34
SCS_A0#
Y31
SCS_A1#
Y32
SCS_A2#
W34
SCS_A3#
AL20
SCKE_A0
AN19
SCKE_A1
AM20
SCKE_A2
AP20
SCKE_A3
AK32
SCMDCLK_A0
AK31
SCMDCLK_A0#
AP17
SCMDCLK_A1
AN17
SCMDCLK_A1#
N33
SCMDCLK_A2
N34
SCMDCLK_A2#
AK33
SCMDCLK_A3
AK34
SCMDCLK_A3#
AM16
SCMDCLK_A4
AL16
SCMDCLK_A4#
P31
SCMDCLK_A5
P32
SCMDCLK_A5#
E34
SMVREF_A
AK9
SMXRCOMP
AN9
SMXRCOMPVOH
AL9
SMXRCOMPVOL
SPRINGDALE_UFCBGA932
4
AN11
SDQS_A0
AP12
SDM_A0
AP10
SDQ_A0
AP11
SDQ_A1
AM12
SDQ_A2
AN13
SDQ_A3
AM10
SDQ_A4
AL10
SDQ_A5
AL12
SDQ_A6
AP13
SDQ_A7
AP15
SDQS_A1
AP16
SDM_A1
AP14
SDQ_A8
AM14
SDQ_A9
AL18
SDQ_A10
AP19
SDQ_A11
AL14
SDQ_A12
AN15
SDQ_A13
AP18
SDQ_A14
AM18
SDQ_A15
AP23
SDQS_A2
AM24
SDM_A2
AP22
SDQ_A16
AM22
SDQ_A17
AL24
SDQ_A18
AN27
SDQ_A19
AP21
SDQ_A20 SDQ_A21 SDQ_A22 SDQ_A23
SDQS_A3
SDM_A3
SDQ_A24 SDQ_A25 SDQ_A26 SDQ_A27 SDQ_A28 SDQ_A29 SDQ_A30 SDQ_A31
SDQS_A4
SDM_A4
SDQ_A32 SDQ_A33 SDQ_A34 SDQ_A35 SDQ_A36 SDQ_A37 SDQ_A38 SDQ_A39
SDQS_A5
SDM_A5
SDQ_A40 SDQ_A41 SDQ_A42 SDQ_A43 SDQ_A44 SDQ_A45 SDQ_A46 SDQ_A47
SDQS_A6
SDM_A6
SDQ_A48 SDQ_A49 SDQ_A50 SDQ_A51 SDQ_A52 SDQ_A53 SDQ_A54 SDQ_A55
SDQS_A7
SDM_A7
SDQ_A56 SDQ_A57 SDQ_A58 SDQ_A59 SDQ_A60 SDQ_A61 SDQ_A62 SDQ_A63
AL22 AP25 AP27
AM30 AP30
AP28 AP29 AP33 AM33 AM28 AN29 AM31 AN34
AF34 AF31
AH32 AG34 AF32 AD32 AH31 AG33 AE34 AD34
V34 W33
AC34 AB31 V32 V31 AD31 AB32 U34 U33
M32 M34
T34 T32 K34 K32 T31 P34 L34 L33
H31 H32
J33 H34 E33 F33 K31 J34 G34 F34
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DDR Channel A
DDRA_SDQS0 12,14
DDRA_SDQ0 DDRA_SDQ1 DDRA_SDQ2 DDRA_SDQ3 DDRA_SDQ4 DDRA_SDQ5 DDRA_SDQ6 DDRA_SDQ7
DDRA_SDQ8 DDRA_SDQ9 DDRA_SDQ10 DDRA_SDQ11 DDRA_SDQ12 DDRA_SDQ13 DDRA_SDQ14 DDRA_SDQ15
DDRA_SDQ16 DDRA_SDQ17
DDRA_SDQ19 DDRA_SDQ20 DDRA_SDQ21 DDRA_SDQ22 DDRA_SDQ23
DDRA_SDQ24 DDRA_SDQ25 DDRA_SDQ26 DDRA_SDQ27 DDRA_SDQ28 DDRA_SDQ29 DDRA_SDQ30 DDRA_SDQ31
DDRA_SDQ32 DDRA_SDQ33 DDRA_SDQ34 DDRA_SDQ35 DDRA_SDQ36 DDRA_SDQ37 DDRA_SDQ38 DDRA_SDQ39
DDRA_SDQ40 DDRA_SDQ41 DDRA_SDQ42 DDRA_SDQ43 DDRA_SDQ44 DDRA_SDQ45 DDRA_SDQ46 DDRA_SDQ47
DDRA_SDQ48 DDRA_SDQ49 DDRA_SDQ50 DDRA_SDQ51 DDRA_SDQ52 DDRA_SDQ53 DDRA_SDQ54 DDRA_SDQ55
DDRA_SDQ56 DDRA_SDQ57 DDRA_SDQ58 DDRA_SDQ59 DDRA_SDQ60 DDRA_SDQ61 DDRA_SDQ62 DDRA_SDQ63
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DDRA_SDM0 12,14
DDRA_SDQS1 12,14 DDRA_SDM1 12,14
DDRA_SDQS2 12,14 DDRA_SDM2 12,14
DDRA_SDQS3 12,14 DDRA_SDM3 12,14
DDRA_SDQS4 12,14 DDRA_SDM4 12,14
DDRA_SDQS5 12,14 DDRA_SDM5 12,14
DDRA_SDQS6 12,14 DDRA_SDM6 12,14
DDRA_SDQS7 12,14 DDRA_SDM7 12,14
3
DDRA_SDQ[0..63]
DDRA_SDQ[0..63] 12,14
2
C523
2.2U_0805_16V4Z
1
1
C533 1U_0603_10V6K
2
2
C217
2.2U_0805_16V4Z
1
1
C220 1U_0603_10V6K
2
+2.5V
Trace width of 12mils and space 10mils(min)
12
R390 10K_0603_1%
SMXRCOMPVOH
12
R391
30.9K_0603_1%
*
*
Change to 31.12K
Follow Intel design guide R1.11(12474) page124,125
+2.5V
Trace width of 12mils and space 10mils(min)
12
R153
30.9K_0603_1%
*
SMXRCOMPVOL
12
R154 10K_0603_1%
Title
Size Document Number Rev
B
2
Date: Sheet of
1
C196
0.01U_0402_16V7K
2
Close to Pin AN9
Close to GMCH <1"
1
C190
0.01U_0402_16V7K
2
Close to Pin AL9
Close to GMCH <1"
Compal Electronics, Inc.
Springdale-DDR Interface-A(2/5)
LA-1841
1
8 57Thursday, February 20, 2003
Page 9
5
4
3
2
1
DDRB_SMA[0..12]13,14
D D
C C
SM_VREF_B and SM_VREF_A are connected inside GMCH.
+2.5V
2
12
R392 150_0603_1%
12
B B
R396 150_0603_1%
1
2
1
C539
2.2U_0805_16V4Z
C547
2.2U_0805_16V4Z
DDRB_SMA[0..12]
DDRB_SWE#13,14 DDRB_SCAS#13,14 DDRB_SRAS#13,14
DDRB_SBS013,14 DDRB_SBS113,14
DDRB_SCS#013,14 DDRB_SCS#113,14
DDRB_CKE013,14 DDRB_CKE113,14
DDRB_CLK113 DDRB_CLK1#13 DDRB_CLK213 DDRB_CLK2#13
+SM_VREF_B
+SM_VREF_B trace width of 12mils and space 12mils(min)
2
C200
0.1U_0402_16V4Z
1
DDRB_SMA0 DDRB_SMA1 DDRB_SMA2 DDRB_SMA3 DDRB_SMA4 DDRB_SMA5 DDRB_SMA6 DDRB_SMA7 DDRB_SMA8 DDRB_SMA9 DDRB_SMA10 DDRB_SMA11 DDRB_SMA12
DDRB_SCS#0 DDRB_SCS#1
DDRB_CKE0 DDRB_CKE1
SMYRCOMP SMYRCOMPVOH SMYRCOMPVOL
Close to GMCH(AP9)
+2.5V
2
12
R399
Change to 42.2_1%
Change to 42.2_1%
A A
40.2_0603_1%
SMYRCOMP
12
R400
40.2_0603_1%
C553
2.2U_0805_16V4Z
1
Trace width of 12mils and space 10mils(min)
Place resistors within
1.0 inch of GMCH (AA33)
U36C
AG31
SMAA_B0
AJ31
SMAA_B1
AD27
SMAA_B2
AE24
SMAA_B3
AK27
SMAA_B4
AG25
SMAA_B5
AL25
SMAA_B6
AF21
SMAA_B7
AL23
SMAA_B8
AJ22
SMAA_B9
AF29
SMAA_B10
AL21
SMAA_B11
AJ20
SMAA_B12
AE27
SMAB_B1
AD26
SMAB_B2
AL29
SMAB_B3
AL27
SMAB_B4
AE23
SMAB_B5
W27
SWE_B#
W31
SCAS_B#
W26
SRAS_B#
Y25
SBA_B0
AA25
SBA_B1
U26
SCS_B0#
T29
SCS_B1#
V25
SCS_B2#
W25
SCS_B3#
AK19
SCKE_B0
AF19
SCKE_B1
AG19
SCKE_B2
AE18
SCKE_B3
AG29
SCMDCLK_B0
AG30
SCMDCLK_B0#
AF17
SCMDCLK_B1
AG17
SCMDCLK_B1#
N27
SCMDCLK_B2
N26
SCMDCLK_B2#
AJ30
SCMDCLK_B3
AH29
SCMDCLK_B3#
AK15
SCMDCLK_B4
AL15
SCMDCLK_B4#
N31
SCMDCLK_B5
N30
SCMDCLK_B5#
AP9
SMVREF_B
AA33
SMYRCOMP
R34
SMYRCOMPVOH
R33
SMYRCOMPVOL
SPRINGDALE_UFCBGA932
AF15
SDQS_B0
AG11
SDM_B0
AJ10
SDQ_B0
AE15
SDQ_B1
AL11
SDQ_B2
AE16
SDQ_B3
AL8
SDQ_B4
AF12
SDQ_B5
AK11
SDQ_B6
AG12
SDQ_B7
AG13
SDQS_B1
AG15
SDM_B1
AE17
SDQ_B8
AL13
SDQ_B9
AK17
SDQ_B10
AL17
SDQ_B11
AK13
SDQ_B12
AJ14
SDQ_B13
AJ16
SDQ_B14
AJ18
SDQ_B15
AG21
SDQS_B2
AE21
SDM_B2
AE19
SDQ_B16
AE20
SDQ_B17
AG23
SDQ_B18
AK23
SDQ_B19 SDQ_B20 SDQ_B21 SDQ_B22 SDQ_B23
SDQS_B3
SDM_B3
SDQ_B24 SDQ_B25 SDQ_B26 SDQ_B27 SDQ_B28 SDQ_B29 SDQ_B30 SDQ_B31
SDQS_B4
SDM_B4
SDQ_B32 SDQ_B33 SDQ_B34 SDQ_B35 SDQ_B36 SDQ_B37 SDQ_B38 SDQ_B39
SDQS_B5
SDM_B5
SDQ_B40 SDQ_B41 SDQ_B42 SDQ_B43 SDQ_B44 SDQ_B45 SDQ_B46 SDQ_B47
SDQS_B6
SDM_B6
SDQ_B48 SDQ_B49 SDQ_B50 SDQ_B51 SDQ_B52 SDQ_B53 SDQ_B54 SDQ_B55
SDQS_B7
SDM_B7
SDQ_B56 SDQ_B57 SDQ_B58 SDQ_B59 SDQ_B60 SDQ_B61 SDQ_B62 SDQ_B63
AL19 AK21 AJ24 AE22
AH27 AJ28
AK25 AH26 AG27 AF27 AJ26 AJ27 AD25 AF28
AD29 AC31
AE30 AC27 AC30 Y29 AE31 AB29 AA26 AA27
U30 U31
AA30 W30 U27 T25 AA31 V29 U25 R27
L27 M29
P29 R30 K28 L30 R31 R26 P25 L32
J30 J31
K30 H29 F32 G33 N25 M25 J29 G32
DDR Channel B
DDRB_SDQ0 DDRB_SDQ1 DDRB_SDQ2 DDRB_SDQ3 DDRB_SDQ4 DDRB_SDQ5 DDRB_SDQ6 DDRB_SDQ7
DDRB_SDQ8 DDRB_SDQ9 DDRB_SDQ10 DDRB_SDQ11 DDRB_SDQ12 DDRB_SDQ13 DDRB_SDQ14 DDRB_SDQ15
DDRB_SDQ16 DDRB_SDQ17 DDRB_SDQ18 DDRB_SDQ19 DDRB_SDQ20 DDRB_SDQ21 DDRB_SDQ22 DDRB_SDQ23
DDRB_SDQ24 DDRB_SDQ25 DDRB_SDQ26 DDRB_SDQ27 DDRB_SDQ28 DDRB_SDQ29 DDRB_SDQ30 DDRB_SDQ31
DDRB_SDQ32 DDRB_SDQ33 DDRB_SDQ34 DDRB_SDQ35 DDRB_SDQ36 DDRB_SDQ37 DDRB_SDQ38 DDRB_SDQ39
DDRB_SDQ40 DDRB_SDQ41 DDRB_SDQ42 DDRB_SDQ43 DDRB_SDQ44 DDRB_SDQ45 DDRB_SDQ46 DDRB_SDQ47
DDRB_SDQ48 DDRB_SDQ49 DDRB_SDQ50 DDRB_SDQ51 DDRB_SDQ52 DDRB_SDQ53 DDRB_SDQ54 DDRB_SDQ55
DDRB_SDQ56 DDRB_SDQ57 DDRB_SDQ58 DDRB_SDQ59 DDRB_SDQ60 DDRB_SDQ61 DDRB_SDQ62 DDRB_SDQ63
DDRB_SDQS0 13,14 DDRB_SDM0 13,14
DDRB_SDQS1 13,14 DDRB_SDM1 13,14
DDRB_SDQS2 13,14 DDRB_SDM2 13,14
DDRB_SDQS3 13,14 DDRB_SDM3 13,14
DDRB_SDQS4 13,14 DDRB_SDM4 13,14
DDRB_SDQS5 13,14 DDRB_SDM5 13,14
DDRB_SDQS6 13,14 DDRB_SDM6 13,14
DDRB_SDQS7 13,14 DDRB_SDM7 13,14
DDRB_SDQ[0..63]
2
C541
2.2U_0805_16V4Z
1
1
C546 1U_0603_10V6K
2
2
C219
2.2U_0805_16V4Z
1
1
C223 1U_0603_10V6K
2
DDRB_SDQ[0..63] 13,14
+2.5V
Trace width of 12mils and space 10mils(min)
12
R394 10K_0603_1%
SMYRCOMPVOH
12
R398
30.9K_0603_1%
1
C213
0.01U_0402_50V7K
2
Close to Pin R14
Close to GMCH <1"
+2.5V
Trace width of 12mils and space 10mils(min)
12
R163
30.9K_0603_1%
SMYRCOMPVOL
12
R164 10K_0603_1%
1
C211
0.01U_0402_50V7K
2
Close to Pin R33
Close to GMCH <1"
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Springdale-DDR Interface-B(3/5)
Size Document Number Rev
B
LA-1841
Date: Sheet of
9 57Thursday, February 20, 2003
1
Page 10
5
4
3
2
1
+1.5VS
Change to 43.2_1%
12
R123
43_0402_5%
D D
C C
B B
A A
GRCOMP
+1.5VS
12
R353 226_0603_1%
HI_SWING_MCH
12
R368 147_0603_1%
HI_VREF_MCH
12
R372 113_0603_1%
1
C147
0.1U_0402_16V4Z
2
1
C166
0.1U_0402_16V4Z
2
1 2
R56
33.2_0603_1%
1
2
1
2
+1.5VS
12
CI_SWING_GMCH
12
12
+1.5VS
12
12
12
+1.5VS
Change to 52.3_1%
12
R116
51.1_0603_1%
HI_RCOMP_MCH
Note: HI_SWING_MCH, HI_VREF_MCH trace width of 10mils and space 7mils
Close to GMCH(AE3)
C499
0.1U_0402_16V4Z
C500
0.1U_0402_16V4Z
R122 226_0603_1%
R127 147_0603_1%
CI_VREF_GMCH
R130 113_0603_1%
1
C498
0.01U_0402_16V7K
2
Close to GMCH ball <250mils
Close to GMCH(AE2)
1
C503
0.01U_0402_16V7K
2
Close to GMCH ball <250mils
Note: CI_SWING_MCH, CI_VREF_MCH trace width of 10mils and space 20mils
0.8V
Close to GMCH(AF2)
1
C155
0.01U_0402_16V7K
2
Close to GMCH ball <250mils
0.35V
Close to GMCH(AF4)
1
C165
0.01U_0402_16V7K
2
Close to GMCH ball <250mils
R31
60.4_0603_1%
AGP_SWING
R32
39.2_0603_1%
R55
100_0603_1%
Close GMCH ball (AD2) less than 250mils
5
Close GMCH ball (AC3) less than 250mils
1
C9
0.1U_0402_16V4Z
2
+AGP_VREF
1
C127
0.01U_0402_16V7K
2
+1.5VS
?
R121 @10K_0402_5%
1 2
AGP_PAR
1: External AGP 0: Internal Graphics
CLK_MCH_66M
12
R337 @10_0402_5%
1
C486 @10P_0402_50V8K
2
AGP_C/BE#[0..3]16
AGP_FRAME#16 CLK_MCH_66M15 AGP_DEVSEL#16
AGP_IRDY#16 AGP_TRDY#16 AGP_STOP#16
AGP_PAR16
AGP_REQ#16 AGP_GNT#16
+AGP_VREF
AGP_RBF#16 AGP_WBF#16
AGP_DBIHI16 AGP_DBILO16
AGP_ST[0..2]16
HUB_HL[0..10]23
HUB_HLSTRF23
HUB_HLSTRS23
change to 52.3_1%
R375 54.9_0603_1%
+1.5VS
R92 0_0402_5%
ICH_SYNC#24
PCIRST#23,26,27,29,30,36,39
1
C113
0.01U_0402_16V7K
2
Follow Springdale Chipset Platform Design guide Rev1.11(12474)
Note: Springdale Customer Schematic R1.2 page18 AGP_SWING only had 0.1u cap ; But Springdale Chipset Platform Design guide Rev1.11(12474) page138 had a 0.01uf cap. need confirm with Intel.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1 2
R134 0_0402_5%
3
AGP_C/BE#0 AGP_C/BE#1 AGP_C/BE#2 AGP_C/BE#3
CLK_MCH_66M AGP_AD3
AGP_PAR
GRCOMP AGP_SWING +AGP_VREF
AGP_ST0 AGP_ST1 AGP_ST2
HUB_HL0 HUB_HL1 HUB_HL2 HUB_HL3 HUB_HL4 HUB_HL5 HUB_HL6 HUB_HL7 HUB_HL8 HUB_HL9 HUB_HL10
HI_RCOMP_MCH HI_SWING_MCH HI_VREF_MCH
CI_SWING_GMCH CI_VREF_GMCH
12
12
U36D
Y7
GCBE0
W5
GCBE1
AA3
GCBE2
U2
GCBE3
U6
GFRAME
H4
GCLKIN
AB4
GDEVSEL
V11
GIRDY
AB5
GTRDY
W11
GSTOP
AB2
GPAR/ADD_DETECT
N6
GREQ
M7
GGNT
AC2
GRCOMP/DVOBCGCOMP
AC3
GVSWING
AD2
GVREF
R10
GRBF
R9
GWBF
M4
DBI_HI
M5
DBI_LO
N3
GST0
N5
GST1
N2
GST2
AF5
AG3
AK2
AG5
AD11
AC10
AG7
AG6
AG2
AG10
AG9 AN35 AP34
HUB
AK5
AL3
AL2
AL4
AJ2
AH2
AJ3
HI10
AH5
HISTRF
AH4
HISTRS
AD4
HI_RCOMP
AE3
HI_SWING
AE2
HI_VREF
AK7
AH7
AF7
AD7
CSA
AF8
AE9
AH9
AJ6
CISTRF
AJ5
CISTRS CI_RCOMP
AF2
CI_SWING
AF4
CI_VREF
G4
DREFCLK
AP8
EXTTS#
AJ8
ICH_SYNC#
AK4
RSTIN# RESERVED_1
RESERVED_2 RESERVED_3 RESERVED_4
AR1
RESERVED_5
SPRINGDALE_UFCBGA932
AGP
GADSTBF0
GADSTBS0#
GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8
GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15
GADSTBF1
GADSTBS1#
GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31
GSBSTBF
GSBSTBS#
GSBA0# GSBA1# GSBA2# GSBA3# GSBA4# GSBA5# GSBA6# GSBA7#
DDCA_DATA
DDCA_CLK
RED#
GREEN
GREEN#
VGA
BLUE
BLUE# HSYNC
VSYNC
REFSET
NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 NC_8
NC_9 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16 NC_17 NC_18 NC_19 NC_20
2
RED
AC6 AC5
AGP_AD0
AE6
AGP_AD1
AC11
AGP_AD2
AD5 AE5
AGP_AD4
AA10
AGP_AD5
AC9
AGP_AD6
AB11
AGP_AD7
AB7
AGP_AD8
AA9
AGP_AD9
AA6
AGP_AD10
AA5
AGP_AD11
W10
AGP_AD12
AA11
AGP_AD13
W6
AGP_AD14
W9
AGP_AD15
V7 V4
V5
AGP_AD16
AA2
AGP_AD17
Y4
AGP_AD18
Y2
AGP_AD19
W2
AGP_AD20
Y5
AGP_AD21
V2
AGP_AD22
W3
AGP_AD23
U3
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
R2
AGP_AD28
P2
AGP_AD29
P5
AGP_AD30
P4
AGP_AD31
M2 U11
T11
AGP_SBA0
R6
AGP_SBA1
P7
AGP_SBA2
R3
AGP_SBA3
R5
AGP_SBA4
U9
AGP_SBA5
U10
AGP_SBA6
U5
AGP_SBA7
R88 0_0402_5%12
H3
R84 0_0402_5%12
R91 0_0402_5%12
R101 0_0402_5%12
H6 G5
R104 0_0402_5%
H7 G6
G3 E2
R322 0_0402_5%12
D2 A3
A33 A35
Analog RGB/CRT guidelines for Springdale-P
AF13 AF23 AJ12 AN1 AP2 AR3 AR33 AR35 B2 B25 B34 C1 C23 C35 E26 M31 R25
AGP_AD_STBF0 16 AGP_AD_STBS0 16
AGP_AD[0..31] 16
AGP_AD_STBF1 16 AGP_AD_STBS1 16
AGP_SB_STBF 16 AGP_SB_STBS 16 AGP_SBA[0..7] 16
12
Title
Springdale-AGP/HUB/VGA/CSA (4/5)
Size Document Number Rev
B
LA-1841
Date: Sheet of
10 57Thursday, February 20, 2003
1
Page 11
5
Note: Placed less than 100 mils from ball
Route to GMCH ball without via
D D
1
C490
0.47U_0603_16V7K
2
2
C535
0.1U_0402_10V6K
1
C C
C548
0.1U_0402_10V6K
12
C552 0.22U_0603_10V7K
C520
0.47U_0603_16V7K
12
C532 0.22U_0603_10V7K
C163
Trace 14mils
B B
Note: Placed less than 100 mils from ball
Route to GMCH ball without via
A A
0.1U_0402_10V6K
12
12
C168 0.1U_0402_10V6K
R321 0_0402_5%12
12
R316 0_0402_5%
1 2
C242 0.1U_0402_10V6K
VTT_DCAP1 VTT_DCAP2
1
C496
0.47U_0603_16V7K
2
+VTT_GMCH
+2.5V
VCC_DDR_DCAP5
12
VCC_DDR_DCAP4
VCC_DDR_DCAP1
12
VCC_AGP_DCAP2
+3VS
+1.5VS
VTT_DCAP3 VCCA_FSB VCCA_DPLL VCCA_DAC
VCC_DDR_DCAP2 VCCA_FSB1 VCCA_FSB
VCCA1P5_DDR_SM
(1A)
A15 A21
AA35
AL6
AL7 AM1 AM2 AM3 AM5 AM6 AM7 AM8
AN2
AN4
AN5
AN6
AN7
AN8
AP3
AP4
AP5
AP6
AP7
AR15 AR21 AR31
*
AR4
AR5
AR7
E35
R35
G1 G2
AG1
Y11
A31
AL35 AB25 AC25 AC26
Decoupling Reference Document: Springdale Chipset Platform Design guide Rev1.11 (12474)page246,248
Decoupling Reference Document: Springdale Customer Schematic R1.2 page84
4
U36E
VTT VTT
A4
VTT
A5
VTT
A6
VTT
B5
VTT
B6
VTT
C5
VTT
C6
VTT
D5
VTT
D6
VTT
D7
VTT
E6
VTT
E7
VTT
VTT VCC_DDR
VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR
VCC_DAC VCC_DAC
VCCA_AGP VCCA_AGP
VCCA_FSB
B4
VCCA_FSB
B3
VCCA_DPLL
C2
VCCA_DAC VCCA_DDR
VCCA_DDR VCCA_DDR VCCA_DDR
SPRINGDALE_UFCBGA932
POWER
VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP
VSSA_DAC
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
J6 J7 J8 J9 K6 K7 K8 K9 L6 L7 L9 L10 L11 M8 M9 M10 M11 N9 N10 N11 P10 P11 R11 T16 T17 T18 T19 T20 U16 U17 U20 V16 V18 V20 W16 W19 W20 Y16 Y17 Y18 Y19 Y20
J1 J2 J3 J4 J5 K2 K3 K4 K5 L1 L2 L3 L4 L5
VCC_AGP_DCAP1
Y1 D3
+1.5VS
3
+2.5V
1
C174 22U_1206_10V4Z
2
+2.5V
1
C189
0.1U_0402_10V6K
2
+1.5VS
1
C171
0.1U_0402_10V6K
2
+1.5VS
1
+
C72 470U_D4_2.5VM
2
2
C186
4.7U_0805_6.3V6K
1
1
C185
0.1U_0402_10V6K
2
1
C112
0.1U_0402_10V6K
2
2
C157
4.7U_0805_6.3V6K
1
1
C169
0.1U_0402_10V6K
2
1
C222
0.1U_0402_10V6K
2
1
C135
0.1U_0402_10V6K
2
C156 10U_1206_16V4Z
Place at the output of the 1.5V VR
+VTT_GMCH +2.5V
1
C92
0.1U_0402_10V6K
2
Place near GMCH
1 2
C117
0.1U_0402_10V6K
+1.5VS
1
C126
0.1U_0402_10V6K
2
Place near ball Y11,routing trace from cap to ball
Note: Please change to 0.82uH, DC current of 30mA parts and close to cap
+1.5VS
12
R315 0_0603_5%
Note: Please change to 1uH(0.54uH-D-IN), DC current of 1000mA parts and close to cap Trace 50mils Trace 35mils (under GMCH ball field)
+1.5VS
VCCA_DDR VCCA1P5_DDR_SM
12
R144 0_0603_5%
1
C238
0.1U_0402_10V6K
2
+1.5VS
1
C175
0.1U_0402_10V6K
2
1
C125
0.1U_0402_10V6K
2
+VTT_GMCH
1
+
C28 470U_D4_2.5VM
2
L21
1 2
LQG21F4R7N00_0805
L16
1 2
LQG21F4R7N00_0805
2
1
C191
0.1U_0402_10V6K
2
1
C99
0.1U_0402_10V6K
2
1
C106
0.1U_0402_10V6K
2
2
C70
0.1U_0402_16V4Z
1
1
C183
0.1U_0402_10V6K
2
Place near GMCH
Trace 14milsTrace 14mils
12
C32
+
150U_D2_6.3VM
Trace 35mils
(1A)(1A)
1
C197 22U_1210_6.3V6M
2
1
C198
0.1U_0402_10V6K
2
1
C181
0.1U_0402_10V6K
2
2
C47
4.7U_0805_6.3V6K
1
1
C172
0.1U_0402_10V6K
2
1
C167
0.1U_0402_10V6K
2
2
1
2
C475
0.1U_0402_16V4Z
1
Close to GMCH
2
C212
0.1U_0402_16V4Z
1
Close to GMCH
1
C195
0.1U_0402_10V6K
2
1
C143
0.1U_0402_10V6K
2
C60
4.7U_0805_6.3V6K
1
1
C199
0.1U_0402_10V6K
2
1
C184
0.1U_0402_10V6K
2
1
C42 1U_0603_6.3V6M
2
1
C26
0.47U_0603_16V7K
2
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
B
Date: Sheet of
Springdale-Decoupling (5/5)
LA-1841
1
11 57Thursday, February 20, 2003
Page 12
5
D D
DDRA_CLK18 DDRA_CLK1#8
C C
DDRA_CKE18,14
DDRA_SBS08,14 DDRA_SWE#8,14 DDRA_SCS#08,14
B B
A A
ICH_SMB_DATA13,15,23 ICH_SMB_CLK13,15,23
5
+2.5V
JP26
1
VREF
3
DDRA_SDQ0 DDRA_SDQ1
DDRA_SDQS0 DDRA_SDQ6 DDRA_SDQ7
DDRA_SDQ2 DDRA_SDQ12
DDRA_SDQ8 DDRA_SDQS1
DDRA_SDQ10 DDRA_SDQ15
DDRA_SDQ20 DDRA_SDQ16
DDRA_SDQS2 DDRA_SDQ18
DDRA_SDQ19 DDRA_SDQ28
DDRA_SDQ29 DDRA_SDQS3
DDRA_SDQ30 DDRA_SDQ27
DDRA_CKE1 DDRA_SMA12
DDRA_SMA9 DDRA_SMA7
DDRA_SMA5 DDRA_SMA3 DDRA_SMA1
DDRA_SMA10 DDRA_SBS0 DDRA_SWE# DDRA_SCS#0
DDRA_SDQ36 DDRA_SDQ37
DDRA_SDQS4 DDRA_SDQ34
DDRA_SDQ35 DDRA_SDQ44
DDRA_SDQ41 DDRA_SDQ45 DDRA_SDQS5
DDRA_SDQ43 DDRA_SDQ46
DDRA_SDQ48 DDRA_SDQ53
DDRA_SDQS6 DDRA_SDQ54
DDRA_SDQ55 DDRA_SDQ60
DDRA_SDQ61 DDRA_SDQS7
DDRA_SDQ62 DDRA_SDQ59
+3VS
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
KEYLINK_5762-3-111
4
4
VREF
VSS DQ4 DQ5
VDD DM0 DQ6
VSS DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14 DQ15
VDD
VDD
VSS
VSS
DQ20 DQ21
VDD DM2
DQ22
VSS
DQ23 DQ28
VDD
DQ29
DM3
VSS
DQ30 DQ31
VDD
CB4
CB5
VSS DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD
CKE0
DU/BA2
A11
A8
VSS
A6 A4 A2
A0 VDD BA1
RAS# CAS#
S1#
DU VSS
DQ36 DQ37
VDD
DM4
DQ38
VSS
DQ39 DQ44
VDD
DQ45
DM5
VSS
DQ46 DQ47
VDD
CK1#
CK1 VSS
DQ52 DQ53
VDD
DM6
DQ54
VSS
DQ55 DQ60
VDD
DQ61
DM7
VSS
DQ62 DQ63
VDD SA0 SA1 SA2
DU
H = 5.2mm
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
+2.5V
DDRA_SDQ5 DDRA_SDQ4
DDRA_SDM0
DDRA_SDQ3 DDRA_SDQ9
DDRA_SDQ13 DDRA_SDM1
DDRA_SDQ14 DDRA_SDQ11
DDRA_SDQ21 DDRA_SDQ17
DDRA_SDM2 DDRA_SDQ22
DDRA_SDQ23 DDRA_SDQ24
DDRA_SDQ25 DDRA_SDM3
DDRA_SDQ26 DDRA_SDQ31
DDRA_CKE0 DDRA_SMA11
DDRA_SMA8 DDRA_SMA6
DDRA_SMA4 DDRA_SMA2 DDRA_SMA0
DDRA_SBS1 DDRA_SRAS# DDRA_SCAS# DDRA_SCS#1
DDRA_SDQ32 DDRA_SDQ33
DDRA_SDM4 DDRA_SDQ38
DDRA_SDQ39 DDRA_SDQ40
DDRA_SDM5 DDRA_SDQ42
DDRA_SDQ47
DDRA_SDQ49 DDRA_SDQ52
DDRA_SDM6 DDRA_SDQ51
DDRA_SDQ50 DDRA_SDQ56
DDRA_SDQ57 DDRA_SDM7
DDRA_SDQ63 DDRA_SDQ58
3
DDRA_VREF trace width of 12mils and space 12mils(min)
DDRA_VREF
1
C305
0.1U_0402_16V4Z
2
Close to SO-DIMM
+2.5V
1
C310
0.1U_0402_10V6K
2
DDRA_CKE0 8,14
DDRA_SBS1 8,14 DDRA_SRAS# 8,14 DDRA_SCAS# 8,14 DDRA_SCS#1 8,14
DDRA_CLK2# 8 DDRA_CLK2 8
+2.5V
+2.5V
1
C331 22U_1206_10V4Z
2
1
C335
0.1U_0402_10V6K
2
12
R204 75_0603_1%
12
R203 75_0603_1%
System Memory Decoupling caps
1
2
1
2
Decoupling Reference Document: Springdale Customer Schematic R1.2 page22 each Channel(two DIMMs) requirement 22uF*1 ; 0.1uF*14
Decoupling Reference Document: Springdale Chipset Platform Design guide Rev1.11 (12474)pag 271 each DIMM(two) requirement 0.1uF*42
2
C314
0.1U_0402_10V6K
C334
0.1U_0402_10V6K
1
2
1
2
SO-DIMM 0 REVERSE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
3
2
C339
0.1U_0402_10V6K
C308
0.1U_0402_10V6K
1
DDRA_SDQ[0..63]8,14 D DRA_SDQS[0..7]8,14 DDRA_SMA[0..12]8,14 DDRA_SDM[0..7]8,14
1
C312
0.1U_0402_10V6K
2
1
C333
0.1U_0402_10V6K
2
Title
Size Document Number Rev
Date: Sheet of
DDRA_SDQ[0..63] DDRA_SDQS[0..7] DDRA_SMA[0..12] DDRA_SDM[0..7]
1
C337
0.1U_0402_10V6K
2
1
C307
0.1U_0402_10V6K
2
1
C311
0.1U_0402_10V6K
2
1
C332
0.1U_0402_10V6K
2
Compal Electronics, Inc.
DDR-SODIMM SLOT1
LA-1841
1
1
C336
0.1U_0402_10V6K
2
1
C306
0.1U_0402_10V6K
2
12 57Thursday, February 20, 2003
Page 13
5
4
3
2
1
JP24
1
VREF
3
DDRB_SDQ4 DDRB_SDQ0
DDRB_SDQS0 DDRB_SDQ7
D D
DDRB_CLK19 DDRB_CLK1#9
C C
DDRB_CKE19,14
DDRB_SBS09,14 DDRB_SWE#9,14 DDRB_SCS#09,14
B B
A A
ICH_SMB_DATA12,15,23 ICH_SMB_CLK12,15,23
DDRB_SDQ5 DDRB_SDQ9
DDRB_SDQ12 DDRB_SDQS1
DDRB_SDQ10 DDRB_SDQ14
DDRB_SDQ20 DDRB_SDQ21
DDRB_SDQS2 DDRB_SDQ22
DDRB_SDQ17 DDRB_SDQ24
DDRB_SDQ25 DDRB_SDQS3
DDRB_SDQ26 DDRB_SDQ30
DDRB_CKE1 DDRB_SMA12
DDRB_SMA9 DDRB_SMA7
DDRB_SMA5 DDRB_SMA3 DDRB_SMA1
DDRB_SMA10 DDRB_SBS0 DDRB_SWE# DDRB_SCS#0
DDRB_SDQ33 DDRB_SDQ34
DDRB_SDQS4 DDRB_SDQ37
DDRB_SDQ38 DDRB_SDQ40
DDRB_SDQ44 DDRB_SDQS5
DDRB_SDQ43 DDRB_SDQ41 DDRB_SDQ42
DDRB_SDQ52 DDRB_SDQ49
DDRB_SDQS6 DDRB_SDQ55
DDRB_SDQ60 DDRB_SDQ56
DDRB_SDQS7 DDRB_SDQ58
DDRB_SDQ57
+3VS
5
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
KLINK_5746-3-111
4
VREF
VSS DQ4 DQ5
VDD DM0 DQ6
VSS DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14 DQ15
VDD
VDD
VSS
VSS
DQ20 DQ21
VDD DM2
DQ22
VSS
DQ23 DQ28
VDD
DQ29
DM3
VSS
DQ30 DQ31
VDD
CB4
CB5
VSS DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD
CKE0
DU/BA2
A11
A8
VSS
A6 A4 A2
A0 VDD BA1
RAS# CAS#
S1#
DU VSS
DQ36 DQ37
VDD
DM4
DQ38
VSS
DQ39 DQ44
VDD
DQ45
DM5
VSS
DQ46 DQ47
VDD
CK1#
CK1 VSS
DQ52 DQ53
VDD
DM6
DQ54
VSS
DQ55 DQ60
VDD
DQ61
DM7
VSS
DQ62 DQ63
VDD SA0 SA1 SA2
DU
H= 9.2mm
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
+2.5V
DDRB_VREF trace width of 12mils and space 12mils(min)
DDRB_SDQ2 DDRB_SDQ6
DDRB_SDM0 DDRB_SDQ1
DDRB_SDQ3 DDRB_SDQ13
DDRB_SDQ11 DDRB_SDM1
DDRB_SDQ15 DDRB_SDQ8
DDRB_SDQ19 DDRB_SDQ16
DDRB_SDM2 DDRB_SDQ18
DDRB_SDQ23 DDRB_SDQ28
DDRB_SDQ29 DDRB_SDM3
DDRB_SDQ27 DDRB_SDQ31
DDRB_CKE0 DDRB_SMA11
DDRB_SMA8 DDRB_SMA6
DDRB_SMA4 DDRB_SMA2 DDRB_SMA0
DDRB_SBS1 DDRB_SRAS# DDRB_SCAS# DDRB_SCS#1
DDRB_SDQ32 DDRB_SDQ36
DDRB_SDM4 DDRB_SDQ39
DDRB_SDQ35 DDRB_SDQ46
DDRB_SDQ45 DDRB_SDM5
DDRB_SDQ47
DDRB_SDQ48 DDRB_SDQ53
DDRB_SDM6 DDRB_SDQ51
DDRB_SDQ54DDRB_SDQ50 DDRB_SDQ62
DDRB_SDQ61 DDRB_SDM7
DDRB_SDQ59 DDRB_SDQ63
+3VS
DDRB_VREF
2
C300
0.1U_0402_16V4Z
1
DDRB_CKE0 9,14
DDRB_SBS1 9,14 DDRB_SRAS# 9,14 DDRB_SCAS# 9,14 DDRB_SCS#1 9,14
DDRB_CLK2# 9 DDRB_CLK2 9
REVERSESO-DIMM 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
+2.5V
1
C299
0.1U_0402_10V6K
2
+2.5V
1
C294
0.1U_0402_10V6K
2
+2.5V
1
C338
0.1U_0402_10V6K
2
+2.5V+2.5V
12
R197 75_0603_1%
12
R196 75_0603_1%
DDRB_SDQ[0..63]9,14 D DRB_SDQS[0..7]9,14 DDRB_SMA[0..12]9,14 DDRB_SDM[0..7]9,14
System Memory Decoupling caps
1
C270
0.1U_0402_10V6K
2
1
C292
0.1U_0402_10V6K
2
1
C313
0.1U_0402_10V6K
2
1
C298
0.1U_0402_10V6K
2
1
C264
0.1U_0402_10V6K
2
Decoupling Reference Document: Springdale Customer Schematic R1.2 page26 each Channel(two DIMMs) requirement 0.1uF*24
1
C295
0.1U_0402_10V6K
2
1
C269
0.1U_0402_10V6K
2
1
C263
0.1U_0402_10V6K
2
1
C265
0.1U_0402_10V6K
2
2
1
2
1
2
1
C271
0.1U_0402_10V6K
2
Title
Size Document Number Rev
Date: Sheet of
DDRB_SDQ[0..63] DDRB_SDQS[0..7] DDRB_SMA[0..12] DDRB_SDM[0..7]
C297
0.1U_0402_10V6K
C291
0.1U_0402_10V6K
1
2
LA-1841
1
C267
0.1U_0402_10V6K
2
1
C262
0.1U_0402_10V6K
2
C309
0.1U_0402_10V6K
1
C296
0.1U_0402_10V6K
2
1
C290
0.1U_0402_10V6K
2
1
C293
0.1U_0402_10V6K
2
Compal Electronics, Inc. DDR-SODIMM SLOT2
13 57Thursday, February 20, 2003
1
1
C266
0.1U_0402_10V6K
2
1
C261
0.1U_0402_10V6K
2
1
C268
0.1U_0402_10V6K
2
Page 14
5
4
3
2
1
Channel A(DIMM0) Termination resistors & Decoupling caps Channel B(DIMM1) Termination resistors & Decoupling caps
+1.25VS +1.25VS
DDRA_SDQ5 DDRA_SDQ4
DDRA_SDQ1 DDRA_SDQ0
D D
DDRA_SDQ6 DDRA_SDQS0
DDRA_SDM0 DDRA_SDQ7
DDRA_SDQ13 DDRA_SDM1
DDRA_SDQ3 DDRA_SDQ9
DDRA_SDQ14 DDRA_SDQ11
C C
DDRA_SDQ12 DDRA_SDQ2
DDRA_SDQS1 DDRA_SDQ8
DDRA_SDQ15 DDRA_SDQ10
DDRA_SDQ16 DDRA_SDQ20
DDRA_SDQ21 DDRA_SDQ17
DDRA_SDQ18 DDRA_SDQS2
B B
DDRA_SDM2 DDRA_SDQ22
DDRA_SDQ23 DDRA_SDQ24
DDRA_SDQ25 DDRA_SDM3
DDRA_SDQS5 DDRA_SDQ41
DDRA_SDM6 DDRA_SDQ51
DDRA_SDQ46 DDRA_SDQ43
A A
DDRA_SDQ50 DDRA_SDQ56
RP77
1 4 2 3
56_0404_4P2R_5%
RP114
1 4 2 3
56_0404_4P2R_5%
RP115
1 4 2 3
56_0404_4P2R_5%
RP76
1 4 2 3
56_0404_4P2R_5%
RP74
1 4 2 3
56_0404_4P2R_5%
RP75
1 4 2 3
56_0404_4P2R_5%
RP73
1 4 2 3
56_0404_4P2R_5%
RP116
1 4 2 3
56_0404_4P2R_5%
RP117
1 4 2 3
56_0404_4P2R_5%
RP118
1 4 2 3
56_0404_4P2R_5%
RP119
1 4 2 3
56_0404_4P2R_5%
RP72
1 4 2 3
56_0404_4P2R_5%
RP120
1 4 2 3
56_0404_4P2R_5%
RP71
1 4 2 3
56_0404_4P2R_5%
RP70
1 4 2 3
56_0404_4P2R_5%
RP69
1 4 2 3
56_0404_4P2R_5%
RP130
1 4 2 3
56_0404_4P2R_5%
RP56
1 4 2 3
56_0404_4P2R_5%
RP131
1 4 2 3
56_0404_4P2R_5%
RP55
1 4 2 3
56_0404_4P2R_5%
5
RP121
DDRA_SDQ28
14
DDRA_SDQ19
23
56_0404_4P2R_5%
RP68
DDRA_SDQ26
14
DDRA_SDQ31
23
56_0404_4P2R_5%
RP132
DDRA_SDQ53
14
DDRA_SDQ48
23
56_0404_4P2R_5%
RP79
DDRA_SDQ57
14
DDRA_SDM7
23
56_0404_4P2R_5%
RP78
DDRA_SDQ63
14
DDRA_SDQ58
23
56_0404_4P2R_5%
RP135
DDRA_SDQS7
14
DDRA_SDQ61
23
56_0404_4P2R_5%
RP133
DDRA_SDQ54
14
DDRA_SDQS6
23
56_0404_4P2R_5%
RP62
DDRA_SDQ32
14
DDRA_SDQ33
23
56_0404_4P2R_5%
RP61
DDRA_SDM4
14
DDRA_SDQ38
23
56_0404_4P2R_5%
RP127
DDRA_SDQ37
14
DDRA_SDQ36
23
56_0404_4P2R_5%
RP128
DDRA_SDQ34
14
DDRA_SDQS4
23
56_0404_4P2R_5%
RP59
DDRA_SDQ45
14
DDRA_SDM5
23
56_0404_4P2R_5%
RP60
DDRA_SDQ39
14
DDRA_SDQ40
23
56_0404_4P2R_5%
RP58
DDRA_SDQ42
14
DDRA_SDQ47
23
56_0404_4P2R_5%
RP129
DDRA_SDQ44
14
DDRA_SDQ35
23
56_0404_4P2R_5%
RP57
DDRA_SDQ49
14
DDRA_SDQ52
23
56_0404_4P2R_5%
RP122
DDRA_SDQS3
14
DDRA_SDQ29
23
56_0404_4P2R_5%
RP123
DDRA_SDQ27
14
DDRA_SDQ30
23
56_0404_4P2R_5%
RP136
DDRA_SDQ59
14
DDRA_SDQ62
23
56_0404_4P2R_5%
RP134
DDRA_SDQ60
14
DDRA_SDQ55
23
56_0404_4P2R_5%
Decoupling Reference Document: Springdale Customer Schematic R1.2 page22 each Channel(two DIMMs) requirement 4.7u*2 ; 0.1uF*28
RP80
DDRA_SCS#0
1 4
DDRA_SCS#1
2 3
56_0404_4P2R_5%
RP66
DDRA_SMA8
14
DDRA_SMA6
23
56_0404_4P2R_5%
RP67
DDRA_SMA12
14
DDRA_SMA11
23
56_0404_4P2R_5%
RP125
DDRA_SMA3
14
DDRA_SMA5
23
56_0404_4P2R_5%
RP126
DDRA_SMA10
14
DDRA_SMA1
23
56_0404_4P2R_5%
RP65
DDRA_SMA4
14
DDRA_SMA2
23
56_0404_4P2R_5%
RP124
DDRA_SMA7
14
DDRA_SMA9
23
56_0404_4P2R_5%
RP64
DDRA_SMA0
14
DDRA_SBS1
23
56_0404_4P2R_5%
RP63
DDRA_SRAS#
14
DDRA_SCAS#
23
56_0404_4P2R_5%
RP81
DDRA_CKE0
1 4
DDRA_CKE1
2 3
56_0404_4P2R_5%
RP137
DDRA_SBS0
1 4
DDRA_SWE#
2 3
56_0404_4P2R_5%
+1.25VS
0.1U_0402_10V6K
1
C621
2
0.1U_0402_10V6K
+1.25VS
0.1U_0402_10V6K
1
C634
2
0.1U_0402_10V6K
+1.25VS
0.1U_0402_10V6K
1
C626
2
0.1U_0402_10V6K
+1.25VS
0.1U_0402_10V6K
1
C326
2
0.1U_0402_10V6K
+1.25VS
0.1U_0402_10V6K
1
C323
2
0.1U_0402_10V6K
1
C630
2
1
C622
2
1
C627
2
1
C329
2
1
C322
2
4
DDRA_SCS#0 8,12 DDRA_SCS#1 8,12
DDRA_SDQ[0..63]8,12 DDRA_SDQS[0..7]8,12 DDRA_SMA[0..12]8,12 DDRA_SDM[0..7]8,12
DDRA_SBS1 8,12
DDRA_SRAS# 8,12 DDRA_SCAS# 8,12
DDRA_CKE0 8,12 DDRA_CKE1 8,12
DDRA_SBS0 8,12 DDRA_SWE# 8,12
0.1U_0402_10V6K
1
C631
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C327
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C628
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C325
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C320
2
0.1U_0402_10V6K
1
C629
2
0.1U_0402_10V6K
1
C564
2
0.1U_0402_10V6K
1
C316
2
0.1U_0402_10V6K
1
C324
2
4.7U_1206_16V6K
1
C318
2
0.1U_0402_10V6K
DDRA_SDQ[0..63]
DDRB_SDQ2 DDRB_SDQ6
DDRB_SDQ0 DDRB_SDQ4
1 4 2 3
1 4 2 3
D DRA_SDQS[0..7]
DDRA_SMA[0..12]
DDRA_SDM[0..7]
0.1U_0402_10V6K
1
1
C632
C633
2
2
0.1U_0402_10V6K
1
1
C624
C625
2
2
0.1U_0402_10V6K
1
1
C321
C328
2
2
4.7U_1206_16V6K
1
1
C619
C618
2
2
0.1U_0402_10V6K
1
1
C319
C317
2
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DDRB_SDQ7 DDRB_SDQS0
DDRB_SDM0 DDRB_SDQ1
DDRB_SDQ3 DDRB_SDQ13
DDRB_SDQ15 DDRB_SDQ8
DDRB_SDQ9 DDRB_SDQ14 DDRB_SDQ5
DDRB_SDQ11 DDRB_SDM1
DDRB_SDQS1 DDRB_SDQ12
DDRB_SDQ19 DDRB_SDQ16
DDRB_SDQ21 DDRB_SDQ20
DDRB_SDQ29 DDRB_SDM3
DDRB_SDQ22 DDRB_SDQS2
DDRB_SDQ24 DDRB_SDQ17
DDRB_SDQ23 DDRB_SDQ28
DDRB_SDM2 DDRB_SDQ18
DDRB_SDM6 DDRB_SDQ51
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
56_0404_4P2R_5%
DDRB_SDQ42 DDRB_SDQ43
1 4 2 3
56_0404_4P2R_5%
DDRB_SDM7
DDRB_SDQ54
1 4 2 3
56_0404_4P2R_5%
DDRB_SDQ49 DDRB_SDQ52
1 4 2 3
56_0404_4P2R_5%
3
+1.25VS +1.25VS
RP92
56_0404_4P2R_5%
RP52
56_0404_4P2R_5%
RP51
56_0404_4P2R_5%
RP93
56_0404_4P2R_5%
RP94
56_0404_4P2R_5%
RP96
56_0404_4P2R_5%
RP50
56_0404_4P2R_5%
RP95
56_0404_4P2R_5%
RP49
56_0404_4P2R_5%
RP97
56_0404_4P2R_5%
RP48
56_0404_4P2R_5%
RP100
56_0404_4P2R_5%
RP47
56_0404_4P2R_5%
RP46
56_0404_4P2R_5%
RP99
56_0404_4P2R_5%
RP98
56_0404_4P2R_5%
RP109
RP32
RP26
RP31
RP45
56_0404_4P2R_5%
RP44
56_0404_4P2R_5%
RP24
56_0404_4P2R_5%
RP30
56_0404_4P2R_5%
RP25
56_0404_4P2R_5%
RP29
56_0404_4P2R_5%
RP43
56_0404_4P2R_5%
RP35
56_0404_4P2R_5%
RP104
56_0404_4P2R_5%
RP36
56_0404_4P2R_5%
RP105
56_0404_4P2R_5%
RP106
56_0404_4P2R_5%
RP108
56_0404_4P2R_5%
RP34
56_0404_4P2R_5%
RP107
56_0404_4P2R_5%
RP33
56_0404_4P2R_5%
RP103
56_0404_4P2R_5%
RP101
56_0404_4P2R_5%
RP28
56_0404_4P2R_5%
RP27
56_0404_4P2R_5%
DDRB_SDQS3
14
DDRB_SDQ25
23
DDRB_SDQ30
14
DDRB_SDQ26
23
DDRB_SDQ62
14
DDRB_SDQ59
23
DDRB_SDQ55
14
DDRB_SDQS6
23
DDRB_SDQ63
14
DDRB_SDQ61
23
DDRB_SDQ60
14
DDRB_SDQ50
23
14
DDRB_SDQ10
23
DDRB_SDQ37
14
DDRB_SDQS4
23
DDRB_SDM4
14
DDRB_SDQ39
23
DDRB_SDQ34
14
DDRB_SDQ33
23
DDRB_SDQ35
14
DDRB_SDQ46
23
DDRB_SDQ45
14
DDRB_SDM5
23
DDRB_SDQ48
14
DDRB_SDQ53
23
DDRB_SDQ40
14
DDRB_SDQ38
23
DDRB_SDQ41
14
DDRB_SDQ47
23
DDRB_SDQS5
14
DDRB_SDQ44
23
DDRB_SDQ32
14
DDRB_SDQ36
23
DDRB_SDQ27
14
DDRB_SDQ31
23
DDRB_SDQS7
14
DDRB_SDQ56
23
DDRB_SDQ57
14
DDRB_SDQ58
23
2
RP37
DDRB_SCS#0
14
DDRB_SWE#
23
56_0404_4P2R_5%
RP38
DDRB_SMA10
14
DDRB_SBS0
23
56_0404_4P2R_5%
RP41
DDRB_SMA12
14
DDRB_SMA9
23
56_0404_4P2R_5%
RP89
DDRB_SMA8
1 4
DDRB_SMA11
2 3
56_0404_4P2R_5%
RP39
DDRB_SMA1
14
DDRB_SMA3
23
56_0404_4P2R_5%
RP91
DDRB_SMA6
14
DDRB_SMA4
23
56_0404_4P2R_5%
RP40
DDRB_SMA5
14
DDRB_SMA7
23
56_0404_4P2R_5%
RP102
DDRB_SMA2
14
DDRB_SMA0
23
56_0404_4P2R_5%
RP42
DDRB_CKE1
14
DDRB_CKE0
23
56_0404_4P2R_5%
RP110
DDRB_SCAS#
14
DDRB_SCS#1
23
56_0404_4P2R_5%
RP90
DDRB_SRAS#
1 4
DDRB_SBS1
2 3
56_0404_4P2R_5%
DDRB_SCS#0 9,13
DDRB_SWE# 9,13
DDRB_SBS0 9,13
DDRB_SDQ[0..63]9,13 D DRB_SDQS[0..7]9,13 DDRB_SMA[0..12]9,13 DDRB_SDM[0..7]9,13
DDRB_CKE1 9,13 DDRB_CKE0 9,13
DDRB_SCAS# 9,13
DDRB_SCS#1 9,13
DDRB_SRAS# 9,13
DDRB_SBS1 9,13
+1.25VS
1
2
0.1U_0402_10V6K
+1.25VS
1
2
0.1U_0402_10V6K
+1.25VS
1
2
0.1U_0402_10V6K
+1.25VS
1
2
0.1U_0402_10V6K
Decoupling Reference Document: Springdale Customer Schematic R1.2 page26 each Channel(two DIMMs) requirement 4.7u*2 ; 0.1uF*26
C284
2
0.1U_0402_10V6K
1
C277
2
0.1U_0402_10V6K
1
C563
2
0.1U_0402_10V6K
4.7U_1206_16V6K
1
C570
2
C283
0.1U_0402_10V6K
C276
0.1U_0402_10V6K
C623
C572
4.7U_1206_16V6K
0.1U_0402_10V6K
1
1
C282
2
0.1U_0402_10V6K
1
C275
2
0.1U_0402_10V6K
1
C565
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C573
2
1
2
1
2
1
2
1
2
C281
C274
C566
C571
Title
DDR Termination Resistors
Size Document Number Rev
B
Date: Sheet of
LA-1841
0.1U_0402_10V6K
1
C280
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C273
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C567
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C259
2
0.1U_0402_10V6K
14 57Thursday, February 20, 2003
1
DDRB_SDQ[0..63] D DRB_SDQS[0..7] DDRB_SMA[0..12] DDRB_SDM[0..7]
0.1U_0402_10V6K
1
C279
2
0.1U_0402_10V6K
1
C272
2
0.1U_0402_10V6K
1
C568
2
1
C258
2
1
2
1
2
1
2
C278
C562
C569
Page 15
5
4
3
2
1
SEL0 SEL1 CPU 3V66[0..3] REF0 REF1 SRC USB/Dot
0 0 100 66 14.3 14.3 100/200
0 MID REF REF REF REF REF
D D
0 1 200
66 14.3 100/200 48
1 0 133 66 14.3
1 1 166
66 14.3
14.3
14.3
14.3
100/200
100/2004848
REF
48
L29
1 2
BLM21A601SPT_0805
L28
1 2
BLM21A601SPT_0805
1
2
+3VS_CLK+3VS
C591 10U_1206_6.3V7K
1 MID Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z
CLK_ICH_14M24
CLK_14M_SIO36
C C
PM_SLP_S1#24 STP_PCI#24 STP_CPU#24,53
+3VS
12
R421 1K_0603_1%
B B
12
R420 2K_0603_1%
12
R185
2.49K_0603_1%
A A
12
R444 1K_0603_1%
CLKSEL0 CLKSEL1
12
R443 2K_0603_1%
12
R190
2.49K_0603_1%
R462 @0_0402_5% R425 @0_0402_5% R424 @0_0402_5%
R187 @0_0402_5% R186 0_0402_5%12 R188 0_0402_5%12 R189 @0_0402_5%
5
12 12 12
+CPU_CORE
12
12
MCH_CLKSEL0 7 MCH_CLKSEL1 7
SLP_S1# STPPCI# STPCPU#
1 2
+3VS
R422 10K_0402_5%
1 2
R439 62_0402_5%
220_0402_5%
CPU_CLKSEL0 5 CPU_CLKSEL1 5
Check SPEC (250mA,300 ohm)
+3VS
R450 33_0402_5%
R451 33_0402_5%
+3VS
CLK_ICH_48M24
L27 BLM11A601S_0603
1 2
12
12
C602
@10P_0402_50V8K
12
12
C603
@10P_0402_50V8K
12
Place crystal within 500 mils of CK409
R463 1K_0402_5%1 2 R412 1K_0402_5%
1 2
R411 1K_0402_5%1 2
Q40
1
MMBT3904_SOT232
3
ICH_SMB_CLK12,13,23 ICH_SMB_DATA12,13,23
R438 33_0402_5%
CLK_VDD_PLL
1
C578 10U_1206_6.3V7K
2
4
CLKREF1 CLKREF0
CLK_XTAL_IN
X3
14.31818MHz_20P_1BX14318CC1A~L
CLK_XTAL_OUT
SLP_S1# STPPCI# STPCPU#
CLK_VTT_PG#
CK_SCLK CK_SDATA
CLK48M_OUT0
12
1 2
R437 475_0603_1%
1
C579
0.1U_0402_16V4Z
2
101624
34
3
VDD_PCI
VDD_PCI
VDD_REF
CK409
VSS_REF
VSS_PCI
6
11
172125
36
VDD_48
VDD_SRC
VDD_3V66
VSS_PCI
VSS_3V66
VSS_48
33
U42
1
REF_0
2
REF_1
4
XTAL_IN
5
XTAL_OUT
CLKSEL0
51
SEL0
CLKSEL1
56
SEL1
PWRDWN#
49
PCI_STP#
50
CPU_STP#
35
VTT_PWRGD#
28
SCLK
30
SDATA
37
SRCLKN_100MHZ
38
SRCLKP_100MHZ
31
USB_48MHZ
32
DOT_48MHZ
52
IREF
55
VDD_PLL
54
VSS_PLL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Place near each pin W>40 mil
1
C583
0.1U_0402_10V6K
2
424548
VDD_CPU
VDD_CPU
CPU_CLKC2
48/66MHZ_OUT/3V66_4
66MHZ_OUT3/3V66_3 66MHZ_OUT2/3V66_2 66MHZ_OUT1/3V66_1 66MHZ_OUT0/3V66_0
PCICLK_F2 PCICLK_F1 PCICLK_F0
VSS_SRC
VSS_IREF
ICS952623BG_TSSOP56
39
53
VSS_CPU
CPUCLKT2
CPUCLKT1
CPUCLKC1 CPUCLKT0
CPUCLKC0
PCICLK6 PCICLK5 PCICLK4 PCICLK3 PCICLK2 PCICLK1 PCICLK0
1
C582
0.1U_0402_10V6K
2
1
C581
0.1U_0402_10V6K
2
47
46 44
43 41
40 29 27 26 23 22 9 8 7
20 19 18 15 14 13 12
CLK_CPU2
CLK_CPU2# CLK_CPU1
CLK_CPU1# CLK_CPU0
CLK_CPU0#
CLK66M_OUT3
CLK66M_OUT1 CLK66M_OUT0 PCICLK_F2
PCICLK6 PCICLK5 PCICLK4 PCICLK3 PCICLK2 PCICLK1
1
C597
0.1U_0402_10V6K
2
1
C592
4.7U_0805_6.3V6K
2
1 2
R428 33_0402_5%
1 2
R429 33_0402_5%
1 2
R430 33_0402_5%
1 2
R431 33_0402_5%
1 2
R432 33_0402_5%
1 2
R433 33_0402_5%
1 2
R457 33_0402_5%
1 2
R456 33_0402_5%
1 2
R455 33_0402_5%
1 2
R452 33_0402_5%
1 2
R461 33_0402_5%
1 2
R460 33_0402_5%
1 2
R454 33_0402_5%
1 2
R459 33_0402_5%
1 2
R458 33_0402_5%
1 2
R453 33_0402_5%
1 2
1 2
1 2
1 2
1 2
1 2
2
Trace wide=40 mils
1
C596
0.1U_0402_10V6K
2
1
C595
0.1U_0402_10V6K
2
CLK_HCLK
R41349.9_0402_1%
R41449.9_0402_1%
CLK_HCLK# CLK_ITP
R41549.9_0402_1%
R41649.9_0402_1%
CLK_ITP# CLK_BCLK
R41749.9_0402_1%
R41849.9_0402_1%
CLK_BCLK#
CLK_AGP_66M 16
CLK_MCH_66M 10 CLK_ICH_66M 23 CLK_PCI_ICH 23
CLK_PCI_MINI 29 CLK_PCI_PCM 27 CLK_PCI_LPC 39 CLK_PCI_1394 30 CLK_PCI_LAN 26 CLK_PCI_SIO 36
Title
Size Document Number Rev
LA-1841
Date: Sheet of
1
C594
0.1U_0402_10V6K
2
CLK_HCLK 7
CLK_HCLK# 7 CLK_ITP 5
CLK_ITP# 5 CLK_BCLK 4
Place near CK409
CLK_BCLK# 4
Compal Electronics, Inc.
Clock Generator
1
2
1
C580
0.1U_0402_10V6K
15 57Thursday, February 20, 2003
Page 16
5
Place close to pin H2 & H3
@2200P_0402_50V7K
1
C145
NV_THERMDA
2
D D
AGP_AD[0..31]10
AGP_SBA[0..7]10
AGP_C/BE#[0..3]10
AGP_ST[0..2]10
C C
0.1U_0402_10V6K
12
Selection Table For W180
B B
Modulation Setting
XTALOUTBUFF
+3VS
R318 1K_0402_5%
1 2 1 2
A A
R317 1K_0402_5%
NV_THERMDC I2CC_SCL I2CC_SDA
+3VS
R35 10K_0402_5%
1 2 1 2
R36 10K_0402_5%
4.7U_0805_10V4Z
12
C479
C30
4.7U_0805_10V4Z
1 2
R67 220K_0402_5%
1 2
R69 220K_0402_5%
SST
SS%
Ratio
1
8
1.25%
3.75%
U31
X1/CLK
FS2
0 1
U33
2
D+
3
D-
8
SCLK
7
SDATA
@ADM1032ARM_RM8
AGP_AD[0..31]
AGP_SBA[0..7]
AGP_C/BE#[0..3]
AGP_ST[0..2]
STP_AGP# AGP_BUSY#
12
C31
+SVDD
PLACE COLSE TO VGA
6
Pin AJ5, AJ7,
VDD
5
CLKOUT
27
X2FS1
SPREAD_RATE
4
SS%
GND
W180-01GT_SO8
3
5
VDD1
ALERT#
THERM#
+SVDD
L10
1 2
FCM2012C-800_0805
12
C478
0.1U_0402_10V6K
AGP_AD_STBS0 AGP_AD_STBS1
Close VGA ball (AK29) less than 250mils
+AGP_VREF
1 2
R323 22_0402_5%
1 2
1
NV_THERCTL#
6 4 5
GND
+3VS
XTALSSIN
1 2
R341 @1K_0402_5%
R345 10K_0402_5%
@2.2K_0402_5%
1
2
12
R128
@0.1U_0402_16V4Z
C16
1 2
@10P_0402_50V8K
CLK_AGP_66M15
C13
0.1U_0402_10V6K
+3VS
SWAPRDY_B NV31,NV34 use. NV18 not use.
+SVDD
4
+3VS+3VS
12
R124 @2.2K_0402_5%
+3VS
1
C148
2
R68
1 2
@10_0402_5%
B_PCIRST#23,35
AGP_REQ#10 AGP_GNT#10
AGP_PAR10
AGP_STOP#10
AGP_DEVSEL#10
AGP_TRDY#10
AGP_IRDY#10
AGP_FRAME#10
PCI_PIRQA#23,27,30
AGP_WBF#10 AGP_RBF#10 AGP_DBIHI10 AGP_DBILO10
AGP_SB_STBF10
AGP_SB_STBS10 AGP_AD_STBF010 AGP_AD_STBS010 AGP_AD_STBF110 AGP_AD_STBS110
R42 10K_0402_5%12
CRMA22
LUMA22
COMPS22
1 2
R70 63.4_0603_1%
R343 10K_0402_5%
12
4
AGP_AD0 AGP_AD1 AGP_AD2 AGP_AD3 AGP_AD4 AGP_AD5 AGP_AD6 AGP_AD7 AGP_AD8 AGP_AD9 AGP_AD10 AGP_AD11 AGP_AD12 AGP_AD13 AGP_AD14 AGP_AD15 AGP_AD16 AGP_AD17 AGP_AD18 AGP_AD19 AGP_AD20 AGP_AD21 AGP_AD22 AGP_AD23 AGP_AD24 AGP_AD25 AGP_AD26 AGP_AD27 AGP_AD28 AGP_AD29 AGP_AD30 AGP_AD31
AGP_C/BE#0 AGP_C/BE#1 AGP_C/BE#2 AGP_C/BE#3
CLK_AGP_66M B_PCIRST# AGP_REQ# AGP_GNT# AGP_PAR AGP_STOP# AGP_DEVSEL# AGP_TRDY# AGP_IRDY# AGP_FRAME# PCI_PIRQA#
AGP_WBF# AGP_RBF#
AGP_SB_STBF AGP_SB_STBS AGP_AD_STBF0 AGP_AD_STBS0 AGP_AD_STBF1 AGP_AD_STBS1
AGP_SBA0 AGP_SBA1 AGP_SBA2 AGP_SBA3 AGP_SBA4 AGP_SBA5 AGP_SBA6 AGP_SBA7 AGP_ST0 AGP_ST1 AGP_ST2
+AGP_REF
AGP_BUSY# STP_AGP#
CRMA LUMA
COMPS DACB_HSYNC DACB_VSYNC DACB_RSET
XTALIN XTALOUT
XTALSSIN XTALOUTBUFF NV_THERMDA NV_THERMDC
PROPRIETARY NOTE
DAC2
SSC
3
CLK
3
ZV PORT / EXT TMDS / GPIO / ROMLVDSTMDS
DAC1
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9
FPBCLKOUT#
FPBCLKOUT
ROMA14 ROMA15 ROMCS#
VIPPCLK VIPHCTL VIPHCLK
VIPHAD0 VIPHAD1
VIPD0 VIPD1 VIPD2 VIPD3 VIPD4 VIPD5 VIPD6 VIPD7
DVOD0 DVOD1 DVOD2 DVOD3 DVOD4 DVOD5 DVOD6 DVOD7 DVOD8
DVOD9 DVOD10 DVOD11
DVOHSYNC DVOVSYNC
DVODE
DVOCLKOUT
DVOCLKOUT#
I2CC_SCL I2CC_SDA
BUFRST#
DVOCLKIN
STRAP0 STRAP1 STRAP2 STRAP3
IFPATXDO#
IFPATXDO
IFPATXD1#
IFPATXD1
IFPATXD2#
IFPATXD2
IFPATXD3#
IFPATXD3 IFPATXC#
IFPATXC
IFPBTXD4#
IFPBTXD4
IFPBTXD5#
IFPBTXD5
IFPBTXD6#
IFPBTXD6
IFPBTXD7#
IFPBTXD7 IFPBTXC#
IFPBTXC
DACA_RED
DACA_GREEN
DACA_BLUE DACA_HSYNC DACA_VSYNC
DACA_RSET
I2CA_SCL I2CA_SDA
SWAPRDY_A
DACA_IDUMP
IFPCTXD0#
IFPCTXD0
IFPCTXD1#
IFPCTXD1
IFPCTXD2#
IFPCTXD2 IFPCTXC#
IFPCTXC
VGA_GPIO0
G5 F4
ENBKL
G4
ENVDD
H5 H4
VGA_GPIO5
J4
VAG_GPIO6
J5
POWER_SEL
J6
NV_THERCTL#
K4 K6
M2 M3
ROMA14
R2
ROMA15
R1 AF2
L4
VIPHCTL
M4 M5
P3 P2
J3 J2
VIPD2
K2
VIPD3
K1
VIPD4
L3
VIPD5
L2
VIPD6
N2
VIPD7
N1 AG2
AH1
DVOD2
AG3
DVOD3
AJ1 AH2 AK1 AJ3 AK3
DVOD8
AH4
DVOD9
AK4 AJ4 AH5
DVO_HSYNC
AD5 AD6 AE4 AJ2 AK2 AG6 AG7 B1 AG1
G1 G2 F2 F3
AK10 AJ10 AJ9 AH9 AJ8
AG8 AG5
AF7 AF9 AG10
I2CC_SCL I2CC_SDA
STRAP0 STRAP1 STRAP2 STRAP3
TXOUT0­TXOUT0+ TXOUT1­TXOUT1+ TXOUT2­TXOUT2+ TXOUT3­TXOUT3+ TXCLK­TXCLK+ TZOUT0­TZOUT0+ TZOUT1­TZOUT1+ TZOUT2­TZOUT2+ TZOUT3­TZOUT3+ TZCLK­TZCLK+
R G
B DACA_HSYNC DACA_VSYNC
DACA_RSET
R39 63.4_0603_1%
DDC_CLK DDC_DATA
R41 @10K_0402_5%
SWAPRDY_A NV31,NV34 use. NV18 not use.
R132 0_0402_5%
R374 @0_0402_5% R129 10K_0402_5%12
TXOUT0- 22 TXOUT0+ 22 TXOUT1- 22 TXOUT1+ 22 TXOUT2- 22 TXOUT2+ 22 TXOUT3- 22 TXOUT3+ 22 TXCLK- 22 TXCLK+ 22 TZOUT0- 22 TZOUT0+ 22 TZOUT1- 22 TZOUT1+ 22 TZOUT2- 22 TZOUT2+ 22 TZOUT3- 22 TZOUT3+ 22 TZCLK- 22 TZCLK+ 22
R 22 G 22 B 22 DACA_HSYNC 22 DACA_VSYNC 22
1 2
12
U35A
AJ28
AD0
AK28
AD1
AH27
AD2
AK27
AD3
AJ27
AD4
AH26
AD5
AJ26
AD6
AH25
AD7
AH23
AD8
AJ23
AD9
AH22
AD10
AJ22
AD11
AJ21
AD12
AK21
AD13
AH20
AD14
AJ20
AD15
AG26
AD16
AE24
AD17
AG25
AD18
AG24
AD19
AF24
AD20
AG23
AD21
AE22
AD22
AF22
AD23
AE21
AD24
AG20
AD25
AG19
AD26
AF19
AD27
AE19
AD28
AF18
AD29
AG18
AD30
AE18
AD31
AJ24
C/BE#0
AH19
C/BE#1
AF25
C/BE#2
AG22
C/BE#3
AG12
PCICLK
AF15
PCIRST#
AF13
PCIREQ#
AE15
PCIGNT#
AK18
PCIPAR
AH17
PCISTOP#
AJ16
PCIDEVSEL#
AJ17
PCITRDY#
AG16
PCIIRDY#
AK16
PCIFRAME#
AG15
PCIINTA#
AE10
NC
AG17
AGPWBF#
AG14
AGPRBF#
AJ18
AGPPIPE/ DBI_HI
AJ19
NC/ DBI_LO
AK13
AGPSB_STB/ ADSTBF
AJ13
AGPSB_STB#/ ADSTBS
AK24
AGPADSTB0/ ADSTBF0
AJ25
AGPADSTB0#/ADSTBS0
AG21
AGPADSTB1/ ADSTBF1
AF21
AGPADSTB1#/ADSTBS1
AJ11
AGPSBA0
AH11
AGPSBA1
AJ12
AGPSBA2
AH12
AGPSBA3
AJ14
AGPSBA4
AH14
AGPSBA5
AJ15
AGPSBA6
AH15
AGPSBA7
AG13
AGPST0
AE16
AGPST1
AE13
AGPST2
AK29
AGPVREF
AF16
NC/AGPMBDET#
AF12
AGP_BUSY#
AG11
STP_AGP#
AE2
DACB_RED/CHROMA
AD2
DACB_GREEN/LUMA
AD1
DACB_BLUE/COMPOSITE
AF3
DACB_HSYNC
AE3
DACB_VSYNC
AD3
DACB_RSET
AE7
I2CB_SCL
AF6
I2CB_SDA
AD4
SWAPRDY_B
Y5
STEREO
AC4
DACB_IDUMP
AJ6
XTALIN
AH6
XTALOUT
AJ7
XTALSSIN
AJ5
XTALOUTBUFF
H2
THERMDA
H3
THERMDC
C2
JTAG[0]
C1
JTAG[1]
D1
JTAG[2]
E2
JTAG[3]
D2
JTAG[4]
NV34M_EPBGA701
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
nVIDIA NV31/34
PCI/AGP
AGP4X/8X
12
ENBKL 22,39 ENVDD 22
12
R133 10K_0402_5%12
DDC_CLK 22 DDC_DATA 22
+3VS
2
SPREAD_RATE
(SUS_STAT#)
+3VS
+3VS
PCI_AD_SWAP: 0-RVSERSED 1-NORMAL
1
SUB_VENDOR: 0-SYSTEM BIOS 1-ADAPTER BIOS
2
R376 10K_0402_5%12
RAM_CFG[3:0]
3
(1001 = 4Mx32 DDR, DQS per byte)
Low
R378 @10K_0402_5%
NV18M
0
R334 @10K_0402_5%12
NV31M:NV34M
4
R380 @10K_0402_5%12
1
NV18M
R329 10K_0402_5%12
NV31M:NV34M
5
R49 10K_0402_5%12
2
R50 @10K_0402_5%12
3
High
CRYSTAL: (10)-27MHz
6
Low
R373 10K_0402_5%12
0
High
1
TVMODE: (01)-NTSC
7
Low
0
R339 10K_0402_5%
1
High
AGP8X/4X: (0)-8X / (1)-4X
8
R48 10K_0402_5%12
AGP_SIDEBAND: (0)-ENABLE
9
R360 @10K_0402_5%12
AGP_FASTWRITE: (0)-ENABLE
10
PCI_DEVID[3:0]
11
Low
R366 10K_0402_5%12
0
R363 @10K_0402_5%12
1
R370 @10K_0402_5%
2
High
R346 10K_0402_5%12
3
BUS_TYPE: (1)-AGP
12
ROM TYPE: (00)-PARALLEL
Low
R354 10K_0402_5%
0
High
R351 10K_0402_5%12
1
Title
Size Document Number Rev
2
Date: Sheet of
POWER_SEL 51
12
12
12
12
1
2
1
STRAP0
R377 10K_0402_5%
STRAP1
STRAP2
R379 @10K_0402_5%
DVOD2
R335 10K_0402_5%12
STRAP3
R381 @10K_0402_5%12
DVOD3
R330 @10K_0402_5%12
DACA_VSYNC DACA_HSYNC
DACB_VSYNC DACB_HSYNC
0110 NV18M
DVO_HSYNC
R311 @2M_0402_5% C468 22P_0402_50V8J
R29 @10K_0402_5%12 R30 10K_0402_5%12
VIPD2 VIPD6
R357 10K_0402_5%12
R340 10K_0402_5%12
DVOD9
VIPD7
R361 @10K_0402_5%12
DVOD8
R320 @10K_0402_5%12R319 @10K_0402_5%12
VIPD4
R367 @10K_0402_5%12
VIPD5
R364 10K_0402_5%12
VIPD3
R371 10K_0402_5% R347 @10K_0402_5%12
VIPHCTL
R126 10K_0402_5%
ROMA14
R355 @10K_0402_5%
ROMA15
R352 @10K_0402_5%12
Y2
XTALOUTXTALIN
1 2
27MHZ_16PF
1 2
1
C469 22P_0402_50V8J
2
Compal Electronics, Inc. nVIDIA NV31M (AGP BUS)
LA-1841
16 57Thursday, February 20, 2003
1
+3VS
12
12
12
12
12
Page 17
5
4
3
2
1
R_NDQMA[0..7]20
R_NDQSA[0..7]20
D D
C C
B B
A A
NMAA[0..11]20 R_NMDA[0..63]20
R_NDQMA[0..7] R_NDQSA[0..7] NMAA[0..11] R_NMDA[0..63]
R_NMDA0 R_NMDA1 R_NMDA2 R_NMDA3 R_NMDA4 R_NMDA5 R_NMDA6 R_NMDA7 R_NMDA8 R_NMDA9 R_NMDA10 R_NMDA11 R_NMDA12 R_NMDA13 R_NMDA14 R_NMDA15 R_NMDA16 R_NMDA17 R_NMDA18 R_NMDA19 R_NMDA20 R_NMDA21 R_NMDA22 R_NMDA23 R_NMDA24 R_NMDA25 R_NMDA26 R_NMDA27 R_NMDA28 R_NMDA29 R_NMDA30 R_NMDA31 R_NMDA32 R_NMDA33 R_NMDA34 R_NMDA35 R_NMDA36 R_NMDA37 R_NMDA38 R_NMDA39 R_NMDA40 R_NMDA41 R_NMDA42 R_NMDA43 R_NMDA44 R_NMDA45 R_NMDA46 R_NMDA47 R_NMDA48 R_NMDA49 R_NMDA50 R_NMDA51 R_NMDA52 R_NMDA53 R_NMDA54 R_NMDA55 R_NMDA56 R_NMDA57 R_NMDA58 R_NMDA59 R_NMDA60 R_NMDA61 R_NMDA62 R_NMDA63
U35B
N25
FBAD0
N27
FBAD1
N26
FBAD2
M25
FBAD3
K26
FBAD4
K27
FBAD5
J27
FBAD6
H27
FBAD7
N29
FBAD8
M29
FBAD9
M28
FBAD10
L29
FBAD11
J29
FBAD12
J28
FBAD13
H29
FBAD14
G30
FBAD15
K25
FBAD16
J26
FBAD17
J25
FBAD18
G26
FBAD19
F28
FBAD20
F26
FBAD21
E27
FBAD22
D27
FBAD23
H28
FBAD24
G29
FBAD25
F29
FBAD26
E29
FBAD27
C30
FBAD28
C29
FBAD29
B30
FBAD30
A30
FBAD31
AJ29
FBAD32
AJ30
FBAD33
AH29
FBAD34
AH30
FBAD35
AF29
FBAD36
AE29
FBAD37
AD29
FBAD38
AC28
FBAD39
AG28
FBAD40
AF27
FBAD41
AE26
FBAD42
AE28
FBAD43
AD25
FBAD44
AB25
FBAD45
AB26
FBAD46
AA25
FBAD47
AD30
FBAD48
AC29
FBAD49
AB28
FBAD50
AB29
FBAD51
Y29
FBAD52
W28
FBAD53
W29
FBAD54
V29
FBAD55
AC27
FBAD56
AB27
FBAD57
AA27
FBAD58
AA26
FBAD59
W25
FBAD60
V26
FBAD61
V27
FBAD62
V25
FBAD63
NV34M_EPBGA701
FBAA0 FBAA1 FBAA2 FBAA3 FBAA4 FBAA5 FBAA6 FBAA7 FBAA8
FBAA9 FBAA10 FBAA11 FBAA12
FBADQM0 FBADQM1 FBADQM2 FBADQM3 FBADQM4 FBADQM5 FBADQM6 FBADQM7
FBADQS0 FBADQS1 FBADQS2 FBADQS3 FBADQS4 FBADQS5 FBADQS6 FBADQS7
FBARAS#
MEMORY
INTERFACE A
FBACAS#
FBAWE# FBACS0# FBACS1#
FBACKE
FBACLK0
FBACLK0#
FBACLK1
FBACLK1#
FBABA0 FBABA1
FB_VREF
NMAA1
U28
NMAA2
U29
NMAA3
T28
NMAA4
T29
NMAA5
T27
NMAA6
T30
NMAA7
T26
NMAA8
T25
NMAA9
R27
NMAA10
R25
NMAA11
R30 U24
R_NDQMA0
L27
R_NDQMA1
K29
R_NDQMA2
G25
R_NDQMA3
E28
R_NDQMA4
AF28
R_NDQMA5
AD27
R_NDQMA6
AA30
R_NDQMA7
Y27
M27
R_NDQSA1
K30
R_NDQSA2
G27
R_NDQSA3
D30
R_NDQSA4
AG30
R_NDQSA5
AD26
R_NDQSA6
AA29
R_NDQSA7
W27
NMRASA#
P28
NMCASA#
P29
NMWEA#
R28
NMCSA0#
U27 P27
NMCKEA
N30
NMCLKA0
U21
NMCLKA0#
V21
NMCLKA1 NMCLKB1#
N21
NMCLKA1#
P21
NMA_BA0
R26 R29
C28
NMA_BA1
A_REF
(10 mil)
NMA_BA0 20 NMA_BA1 20
1
C173
0.1U_0402_10V6K
2
NMAA0
V30
NMRASA# 20 NMCASA# 20 NMWEA# 20 NMCSA0# 20
NMCKEA 20
R_NDQMB[0..7]21
R_NDQSB[0..7]21
NMAB[0..11]21
R_NMDB[0..63]21
+2.5VS
12
12
12
12
R138 1K_0402_1%
R135 1K_0402_1%
R_NDQMB[0..7] R_NDQSB[0..7] NMAB[0..11] R_NMDB[0..63]
NMCLKA0 20
R89 @120_0402_5%
NMCLKA0# 20 NMCLKA1 20
R105 @120_0402_5%
NMCLKA1# 20
R_NMDB0 R_NMDB1 R_NMDB2 R_NMDB3 R_NMDB4 R_NMDB5 R_NMDB6 R_NMDB7 R_NMDB8 R_NMDB9 R_NMDB10 R_NMDB11 R_NMDB12 R_NMDB13 R_NMDB14 R_NMDB15 R_NMDB16 R_NMDB17 R_NMDB18 R_NMDB19 R_NMDB20 R_NMDB21 R_NMDB22 R_NMDB23 R_NMDB24 R_NMDB25 R_NMDB26 R_NMDB27 R_NMDB28R_NDQSA0 R_NMDB29 R_NMDB30 R_NMDB31 R_NMDB32 R_NMDB33 R_NMDB34 R_NMDB35 R_NMDB36 R_NMDB37 R_NMDB38 R_NMDB39 R_NMDB40 R_NMDB41 R_NMDB42 R_NMDB43 R_NMDB44 R_NMDB45 R_NMDB46 R_NMDB47 R_NMDB48 R_NMDB49 R_NMDB50 R_NMDB51 R_NMDB52 R_NMDB53 R_NMDB54 R_NMDB55 R_NMDB56 R_NMDB57 R_NMDB58 R_NMDB59 R_NMDB60 R_NMDB61 R_NMDB62 R_NMDB63
1 2
R358 1K_0402_5%~D
1 2
R389 1K_0402_5%~D
F13 D13 E13 F12 E10 D10
B13 B12 C12 B11
F10
B29 A29 B28 A28 B26 B25 B24 C23 E26 D26 E25 C25 E24 F22 E22 F21 A24 B23 C22 B22 B20 C19 B19 B18 D23 D22 D21 E21 F19 E18 D18 F18
NMCKEA
NMCKEB
D9 D8
B9 C9 B8 A7
E9 F9 F7 C6 E6 D5 C4 C8 B7 B6 B5 A3 B3 A2 B2
U35C
FBCD0 FBCD1 FBCD2 FBCD3 FBCD4 FBCD5 FBCD6 FBCD7 FBCD8 FBCD9 FBCD10 FBCD11 FBCD12 FBCD13 FBCD14 FBCD15 FBCD16 FBCD17 FBCD18 FBCD19 FBCD20 FBCD21 FBCD22 FBCD23 FBCD24 FBCD25 FBCD26 FBCD27 FBCD28 FBCD29 FBCD30 FBCD31 FBCD32 FBCD33 FBCD34 FBCD35 FBCD36 FBCD37 FBCD38 FBCD39 FBCD40 FBCD41 FBCD42 FBCD43 FBCD44 FBCD45 FBCD46 FBCD47 FBCD48 FBCD49 FBCD50 FBCD51 FBCD52 FBCD53 FBCD54 FBCD55 FBCD56 FBCD57 FBCD58 FBCD59 FBCD60 FBCD61 FBCD62 FBCD63
NV34M_EPBGA701
MEMORY INTERFACE
B
FBCA0 FBCA1 FBCA2 FBCA3 FBCA4 FBCA5 FBCA6 FBCA7 FBCA8
FBCA9 FBCA10 FBCA11 FBCA12
FBCDQM0 FBCDQM1 FBCDQM2 FBCDQM3 FBCDQM4 FBCDQM5 FBCDQM6 FBCDQM7
FBCDQS0 FBCDQS1 FBCDQS2 FBCDQS3 FBCDQS4 FBCDQS5 FBCDQS6 FBCDQS7
FBCRAS# FBCCAS#
FBCWE# FBCCS0# FBCCS1#
FBCCKE
FBCCLK0
FBCCLK0#
FBCCLK1
FBCCLK1#
FBCBA0 FBCBA1
A18 C17 B17 C16 B16 D16 A16 E16 F16 D15 F15 A15 G17
D11 B10 D7 C5 C26 F24 B21 D20
D12 A10 E7 A4 A27 D24 A21 D19
C14 B14 C15 D17 D14 A13 K18
K17
K13 K14
E15 B15
NMAB0 NMAB1 NMAB2 NMAB3 NMAB4 NMAB5 NMAB6 NMAB7 NMAB8 NMAB9 NMAB10 NMAB11
R_NDQMB0 R_NDQMB1 R_NDQMB2 R_NDQMB3 R_NDQMB4 R_NDQMB5 R_NDQMB6 R_NDQMB7
R_NDQSB0 R_NDQSB1 R_NDQSB2 R_NDQSB3 R_NDQSB4 R_NDQSB5 R_NDQSB6 R_NDQSB7
NMRASB# NMCASB# NMWEB# NMCSB0#
NMCKEB NMCLKB0
NMCLKB0#
NMCLKB1
NMB_BA0 NMB_BA1
NMRASB# 21 NMCASB# 21 NMWEB# 21 NMCSB0# 21
NMCKEB 21
NMB_BA0 21 NMB_BA1 21
12
R111 @120_0402_5%
12
R110 @120_0402_5%
NMCLKB0 21
NMCLKB0# 21
NMCLKB1 21
NMCLKB1# 21
Title
Size Document Number Rev
5
4
3
2
Date: Sheet of
Compal Electronics, Inc.
nVIDIA NV31M (DDR)
LA-1841
17 57Thursday, February 20, 2003
1
Page 18
5
4
3
2
1
U35D
AGP_VDD1
AGP_VDD2
AD11
AGPVDDQ
AD14
AGPVDDQ
AD17
AGPVDDQ
AD20
AGPVDDQ
AD23
AGPVDDQ
AE11
AGPVDDQ
AE14
AGPVDDQ
AE17
AGPVDDQ
AE20
AGPVDDQ
AE23
AGPVDDQ
L11
VDD
L13
VDD
L14
VDD
L17
VDD
L18
VDD
L20
VDD
N6
VDD
N11
VDD
N20
VDD
P11
VDD
P20
VDD
U11
VDD
U20
VDD
V11
VDD
V20
VDD
Y11
VDD
Y13
VDD
Y14
VDD
Y17
VDD
Y18
VDD
Y20
VDD
AA17
VDD
AA18
VDD
G14
VDD33
H6
VDD33
H7
VDD33
M6
VDD33
P24
VDD33
U6
VDD33
U7
VDD33
AC6
VDD33
AC7
VDD33
AD12
VDD33
AD15
VDD33
AD19
VDD33
AD22
VDD33
AD16
VDD33
N4
VD50CLAMP0
AE9
VD50CLAMP1
AA13
AGPCALPD_VDDQ
AA14
AGPCALPU_GND
AE12
AGP_PLLVDD
FBVDDQ
F11
FBVDDQ
F14
FBVDDQ
F17
FBVDDQ
F20
FBVDDQ
F23
FBVDDQ
G8
FBVDDQ
G11
FBVDDQ
G20
FBVDDQ
G23
FBVDDQ
H24
FBVDDQ
H25
FBVDDQ
L24
FBVDDQ
L25
FBVDDQ
P25
FBVDDQ
U25
FBVDDQ
Y24
FBVDDQ
Y25
FBVDDQ
AC24
FBVDDQ
AC25
FBVDDQ
AA6
NC
AC5
NC
AF10
NC
AG29
NC
AE27
NC
G9
NC
Y28
NC
NV34M_EPBGA701
VIPCAL_PD_VDDQ
VIPCAL_PU_GND
DVOCAL_PD_VDDQ
DVOCAL_PU_GND
I/O
POWER
FBCAL_PD_VDDQ
FBCAL_PU_GND
FBCAL_TERM_GND
FBCAL_CLK_GND
IFPABVPROBE
IFPABRSET
IFPABPLLVDD
IFPABPLLGND
IFPAIOVDD
IFPAIOGND
IFPBIOVDD
IFPBIOGND
IFPCVPROBE
IFPCRSET
IFPCPLLVDD
IFPCPLLGND
IFPCIOVDD
IFPCIOGND
VIPVDDQ VIPVDDQ VIPVDDQ
DVOVDDQ DVOVDDQ DVOVDDQ
DVO_VREF
TESTMODE
TESTMECLK
DACB_VDD
DACB_VREF
DACA_VDD
DACA_VREF
FB_DLLVDD
PLLVDD
NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC
+1.5VS
D D
+VGA_CORE
R108
1 2
0_0402_5%
C C
+3VS
R113
1 2
0_0402_5%
+1.5VS
R40 49.9_0603_1%
1 2 1 2
R82 49.9_0603_1%
B B
FBCAL_PD_VDDQ NV31,NV34 use. NV18 not use.
FBCAL_PUK_GND NV31,NV34 use. NV18 not use.
FBCAL_TERM_GND NV31 use (tie to GND). NV18,NV34 not use.
FBCAL_CLK_GND NV31 use. NV18,NV34 not use.
A A
+5VS
AGPCALPD_VDDQ AGPCALPU_GND +AGP_PLLVDD
+2.5VS
IFABVPROBE
AA4
IFPABREST
V6
+IFPABPLLVDD
U10 V10
+IFPABIOVDD
Y4 W5
IFPCVPROBE
AA3 R4
+IFPCPLLVDD
P10 N10
+IFPCIOVDD
R5 R6
L6 L7 M7
VIPCAL_1
P6
VIPCAL_2
P7
AD8 AD9 AE8
DVOCAL_1
AB6
DVOCAL_2
AB7 AF4
R342 10K_0402_5%1 2
AE5 G24
R117 @10K_0402_5%
+DACA/BVDD
AB4
DACAVREF
AB5
DACBVREF
AG9 AH8
C27 AK7
B4 B27 C11 C20 D6 D25 D29 E12 E19 F27 L28 M26 N5 W7 W26 Y7
+FB_DLLVDD +PLLVDD
1
2
C44 0.1U_0402_10V6K
1 2
1 2
R109 1K_0402_5%
C55 0.1U_0402_10V6K
1 2
1 2
R112 1K_0402_5%
1 2
R107 10K_0402_5%
1 2
R114 10K_0402_5%
R120 @49.9_0402_1% R125 @49.9_0402_1%1 2
NV31 use only. NV18,NV34 not use.
R349 @49.9_0402_1%1 2 R348 @49.9_0402_1%1 2
1 2
C10
0.01U_0603_50V7K
12
TESTMECLK NV31,NV34 use. NV18 not use.
1
C67
0.01U_0402_50V7K
2
+VIP/DVOVDDQ
NV31 use only. NV18,NV34 not use.
+DVO_VREF
+2.5VS
R13649.9_0402_1% 12 R13949.9_0402_1%
12
R385@0_0402_5% 12 R137@549_0402_1% 12
1
C176 @4700P_0402_25V7K
2
+1.5VS
1
C61
4.7U_0805_10V4Z
2
1
C23
0.1U_0402_10V6K
2
1
C100 470P_0402_50V8J
2
@KC FBM-L11-201209-221LMAT_0805
1
C182 @470P_0402_50V8J
2
1
2
1
C62 4700P_0402_25V7K
2
L15
1 2
+FB_DLLVDD NV31 use. NV18,NV34 not use.
C36
0.1U_0402_16V4Z
+VIP/DVOVDDQ
12
R76 1K_0603_1%
12
R71 1K_0603_1%
KC FBM-L11-201209-221LMAT_0805
1
C131
4.7U_0805_10V4Z
2
+3VS
1
C40
0.022U_0402_16V7K
2
+3VS
L14
12
1
C39
0.022U_0402_16V7K
2
+DACA/BVDD
1
C53
4.7U_0805_10V4Z
2
+PLLVDD
C472
1
4.7U_0805_10V4Z
2
+IFPABPLLVDD
1
C87 470P_0402_50V8J
2
1
2
+AGP_PLLVDD+FB_DLLVDD
C471
4.7U_0805_10V4Z
1
C49
0.022U_0402_16V7K
2
1
C65 4700P_0402_25V7K
2
1
C474
2
1
2
+VIP/DVOVDDQ+IFPABIOVDD
C50 470P_0402_50V8J
1
C37 4700P_0402_25V7K
2
+5VS
1
C41
0.1U_0402_10V6K
2
KC FBM-L11-201209-221LMAT_0805
1
C24 470P_0402_50V8J
2
1
4700P_0402_25V7K
C88 4700P_0402_25V7K
1
C114 4700P_0402_25V7K
2
C15
470P_0402_50V8J
2
KC FBM-L11-201209-221LMAT_0805
L19
1 2
KC FBM-L11-201209-221LMAT_0805
1
C43 470P_0402_50V8J
2
+AGP_PLLVDD NV31,NV34 use. NV18 not use.
1
C110
0.1U_0402_10V6K
2
+3VS
L11
1 2
+3VS
L20
1 2
KC FBM-L11-201209-221LMAT_0805
+3VS
L13
12
+3VS
L12
1 2
KC FBM-L11-201209-221LMAT_0805
+3VS
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Date: Sheet of
Compal Electronics, Inc.
nVIDIA NV31M POWER)
LA-1841
18 57Thursday, February 20, 2003
1
Page 19
5
4
3
2
1
U35E
A9
GND
A12
GND
A19
GND
A22
GND
A25
GND
C3
GND
C7
GND
C10
GND
D D
C C
B B
C13 C18 C21 C24
D28
E11 E14 E17 E20 E23
F25 F30
G3
G28
H11 H20 H26
J30
K28
L23 L26
M1
M30
N28 P26
U26 V28
W1
W30
Y23 Y26 AA5
AA28
AB1 AB30 AC11 AC20 AC26 AD28
AE1
AE6 AE25 AE30
AF5
AF8 AF11 AF14 AF17 AF20 AF23 AF26
AG4
AG27
AH3
AH7 AH10
R24
T24
W24
AB24 AK30
G6
GND GND GND GND
D4
GND GND
E5
GND
E8
GND GND GND GND GND GND
GND
GND GND GND GND GND GND GND GND
J1
GND
J7
GND GND
K3
GND
K5
GND GND
L5
GND
L8
GND GND GND GND GND
N3
GND GND GND
GND GND GND GND GND
Y8
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
A6
GND NC
NC NC NC
A1
NC1 NC2 NC3
R7
NC4
NC5
GROUND
T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND T_GND
GND GND GND GND GND GND GND GND GND GND GND GND GND
NC NC NC NC NC NC NC
M12 M13 M14 M15 M16 M17 M18 M19 N12 N13 N14 N15 N16 N17 N18 N19 P12 P13 P14 P15 P16 P17 P18 P19 R12 R13 R14 R15 R16 R17 R18 R19 T12 T13 T14 T15 T16 T17 T18 T19 U12 U13 U14 U15 U16 U17 U18 U19 V12 V13 V14 V15 V16 V17 V18 V19 W12 W13 W14 W15 W16 W17 W18 W19
AH13 AH16 AH18 AH21 AH24 AH28 AK6 AK9 AK12 AK15 AK19 AK22 AK25
G12 G15 G16 G19 G22 J24 M24
NV34M_EPBGA701
A A
+VGA_CORE
1
C129
4.7U_0805_10V4Z
2
+VGA_CORE
1
C119 470P_0402_50V8J
2
+2.5VS
1
C58 1U_0603_10V6K
2
+2.5VS
1
C136 4700P_0402_25V7K
2
+3VS
1
C54 1U_0603_10V6K
2
+3VS
1
C140
0.022U_0402_16V7K
2
+VGA_CORE
R118 @470_0402_5%
1 2
Q8
13
D
@2N7002
2
G
S
SUSP
1
C75
4.7U_0805_10V4Z
2
1
C109 470P_0402_50V8J
2
1
C97 1U_0603_10V6K
2
1
C152 4700P_0402_25V7K
2
1
C59 1U_0603_10V6K
2
1
C104 4700P_0402_25V7K
2
SUSP 41
1
C71
4.7U_0805_10V4Z
2
1
C89 470P_0402_50V8J
2
1
C79 1U_0603_10V6K
2
1
C151 4700P_0402_25V7K
2
1
C85
0.1U_0402_10V6K
2
1
C101 4700P_0402_25V7K
2
1
C74 1U_0603_10V6K
2
1
C90 470P_0402_50V8J
2
1
C91
0.1U_0402_10V6K
2
1
C150
0.022U_0402_16V7K
2
1
C48
0.1U_0402_10V6K
2
1
C128 4700P_0402_25V7K
2
1
C130 1U_0603_10V6K
2
1
C118 4700P_0402_25V7K
2
1
C105
0.1U_0402_10V6K
2
1
2
1
C52
0.1U_0402_10V6K
2
1
C102 1U_0603_10V6K
2
1
C78 4700P_0402_25V7K
2
1
C137
0.1U_0402_10V6K
2
C146
0.022U_0402_16V7K
1
C38
0.1U_0402_10V6K
2
1
C96 1U_0603_10V6K
2
1
C77 4700P_0402_25V7K
2
1
C66
0.1U_0402_10V6K
2
1
C149
0.022U_0402_16V7K
2
1
C51
0.022U_0402_16V7K
2
1
C115
0.1U_0402_10V6K
2
1
C120
0.1U_0402_10V6K
2
1
C142
0.022U_0402_16V7K
2
1
C111
0.1U_0402_10V6K
2
1
C121
0.1U_0402_10V6K
2
1
C84
0.1U_0402_10V6K
2
1
C138
0.1U_0402_10V6K
2
1
C123
0.1U_0402_10V6K
2
1
C153
0.1U_0402_10V6K
2
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Date: Sheet of
Compal Electronics, Inc.
nVIDIA NV31M (DECOUPLING CAP)
LA-1841
19 57Thursday, February 20, 2003
1
Page 20
5
4
3
2
1
VSSQ
VSSQ
VSS TH
VSS TH
As close as ppossible to related pin
0.1U_0402_10V6K
1
C132
2
VSSQ
VSSQ
VSS TH
VSS TH
VSSQ
VSSQ
VSS TH
VSS TH
1
2
0.1U_0402_10V6K
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
J9
1
C144
C162
2
0.01U_0402_16V7K
VSSQ
VSSQ
NMDA7
B7
DQ0
NMDA6
C6
DQ1
NMDA5
B6
DQ2
NMDA4
B5
DQ3
NMDA0
C2
DQ4
NMDA3
D3
DQ5
NMDA2
D2
DQ6
NMDA1
E2
DQ7
NMDA24
K13
DQ8
NMDA25
K12
DQ9
NMDA26
J13
NMDA27
J12
NMDA28
G13
NMDA29
G12
NMDA30
F13
NMDA31
F12
NMDA8
NMDA10
NMDA9
G3
NMDA11
G2
NMDA13
J3
NMDA12
J2
NMDA15
K2
NMDA14
K3
NMDA21
E13
NMDA22
D13
NMDA20
D12
NMDA23
C13
NMDA19
B10
NMDA18
B9
NMDA17
C9
NMDA16
B8
C3 C5 C7 C8 C10 C12 E3 E12 F4 F11 G4 G11 J4 J11 K4 K11
D7
VDD
D8
VDD
E4
VDD
E11
VDD
L4
VDD
L7
VDD
L8
VDD
L11
VDD
K4D263238A-GC_FBGA144
1
2
+2.5VS +2.5VS
0.01U_0402_16V7K
1
C161
2
+2.5VS
R96
C154
0.01U_0402_16V7K
NMDA45 NMDA47 NMDA42 NMDA40 NMDA41 NMDA44 NMDA43 NMDA46
22_16P8R_1206_5%
NMDA48 NMDA49 NMDA50 NMDA51 NMDA52 NMDA54 NMDA53 NMDA55
22_16P8R_1206_5%
1K_0402_1%
1 2
R98 1K_0402_1%
1 2
NMDA39 NMDA38 NMDA37 NMDA36 NMDA35 NMDA34 NMDA33 NMDA32
NMDA56 NMDA60
NMDA58 NMDA57 NMDA61 NMDA62 NMDA63
22_16P8R_1206_5%
22U_1206_10V4Z
1
C139
12
C14
12
2
22U_1206_10V4Z
RP7
16 15 14 13 12 11 10
RP9
16 15 14 13 12 11 10
R_NDQMA5
R_NDQMA6
R_NDQMA4
R_NDQMA7 NDQMA7
R_NDQSA5
R_NDQSA6
R_NDQSA4
R_NDQSA7
NMCLKA117NMCLKA017
R_NMDA45
1
R_NMDA47
2
R_NMDA42
3
R_NMDA40
4
R_NMDA41
5
R_NMDA44
6
R_NMDA43
7
R_NMDA46
89
R_NMDA48
1
R_NMDA49
2
R_NMDA50
3
R_NMDA51
4
R_NMDA52
5
R_NMDA54
6
R_NMDA53
7
R_NMDA55
89
R75 15_0402_5%1 2 R86 15_0402_5%1 2 R53 15_0402_5%
1 2
R90 15_0402_5%1 2 R73 15_0402_5%1 2
R93 15_0402_5%1 2 R54 15_0402_5%
1 2
R95 15_0402_5%1 2
1
C68
0.1U_0402_10V6K
2
NMCLKA1
C473
0.1U_0402_10V6K
R81 @120_0402_5%
1
2
NMCLKA1#
RP4
16 15 14 13 12 11 10
1 2 3 4 5 6 7 89
R_NMDA39 R_NMDA38 R_NMDA37 R_NMDA36 R_NMDA35 R_NMDA34 R_NMDA33 R_NMDA32
22_16P8R_1206_5%
RP8
16 15 14 13 12 11 10
1 2 3 4 5 6 7 89
R_NMDA56 R_NMDA59NMDA59 R_NMDA60 R_NMDA58 R_NMDA57 R_NMDA61 R_NMDA62 R_NMDA63
0.1U_0402_10V6K
C20
NMAA0 NMAA1 NMAA2 NMAA3 NMAA4 NMAA5 NMAA6 NMAA7 NMAA8 NMAA9 NMAA10 NMAA11 NMA_BA0 NMA_BA1
NDQMA5 NDQMA6 NDQMA4
NDQSA5 NDQSA6 NDQSA4 NDQSA7
VR_VREF_2
NMRASA# NMCASA# NMWEA# NMCSA0#
NMCKEA
1
2
C29
1
2
0.1U_0402_10V6K
B4
B11D4D5D6D9
U29
VSSQ
VSSQ
VSSQ
VSSQ
N5
A0
N6
A1
M6
A2
N7
A3
N8
A4
M9
A5
N9
A6
N10
A7
N11
A8/AP
M8
A9
L6
A10
M7
A11
N4
BA0
M5
BA1
B3
DM0
H12
DM1
H3
DM2
B12
DM3
B2
DQS0
H13
DQS1
H2
DQS2
B13
DQS3
N13
VREF
M13
MCL
L9
RFU1
M10
RFU2
M2
RAS#
L2
CAS#
L3
WE#
N2
CS#
N12
CKE
M11
CK
M12
CK#
C4
NC
C11
NC
H4
NC
H11
NC
L12
NC
L13
NC
M3
NC
M4
NC
N3
NC
E7
VSS
E8
VSS
E10
VSS
K6
VSS
K7
VSS
K8
VSS
K9
VSS
L5
VSS
L10
VSS
E5
VSS
VSS TH
VSS TH
F6F7F8F9G6G7G8G9H6H7H8H9J6J7J8
0.1U_0402_10V6K
1
C19
C57
2
D10
D11E6E9F5F10G5G10H5H10J5J10K5K10
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
0.01U_0402_16V7K
1
C56
2
0.01U_0402_16V7K
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B7
DQ0
C6
DQ1
B6
DQ2
B5
DQ3
C2
DQ4
D3
DQ5
D2
DQ6
E2
DQ7
K13
DQ8
K12
DQ9
J13
DQ10
J12
DQ11
G13
DQ12
G12
DQ13
F13
DQ14
F12
DQ15
DQ16
DQ17
G3
DQ18
G2
DQ19
J3
DQ20
J2
DQ21
K2
DQ22
K3
DQ23
E13
DQ24
D13
DQ25
D12
DQ26
C13
DQ27
B10
DQ28
B9
DQ29
C9
DQ30
B8
DQ31
C3
VDDQ
C5
VDDQ
C7
VDDQ
C8
VDDQ
C10
VDDQ
C12
VDDQ
E3
VDDQ
E12
VDDQ
VDDQ
F11
VDDQ
G4
VDDQ
G11
VDDQ
J4
VDDQ
J11
VDDQ
K4
VDDQ
K11
VDDQ
D7
VDD
D8
VDD
E4
VDD
E11
VDD
L4
VDD
L7
VDD
L8
VDD
L11
VDD
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
K4D263238A-GC_FBGA144
J9
1
C46
2
0.01U_0402_16V7K
NMDA47 NMDA46 NMDA45 NMDA44 NMDA40 NMDA43 NMDA41 NMDA42 NMDA49 NMDA48 NMDA50 NMDA51 NMDA54 NMDA52 NMDA55 NMDA53 NMDA32 NMDA33 NMDA35 NMDA34 NMDA36 NMDA37 NMDA39 NMDA38 NMDA62 NMDA61 NMDA60 NMDA63 NMDA58 NMDA57 NMDA59 NMDA56
1
C21
2
+2.5VS +2.5VS
RP11
1 2 3 4 5 6 7 8 9
R_NDQMA[0..7] R_NDQSA[0..7] NMAA[0..11] R_NMDA[0..63]
R_NMDA5
16
R_NMDA1
15
R_NMDA0
14
R_NMDA2
13
R_NMDA4
12
R_NMDA3
11
R_NMDA7
10
R_NMDA6
22U_1206_10V4Z
R_NDQMA[0..7]17
R_NDQSA[0..7]17 NMAA[0..11]17
D D
R_NMDA[0..63]17
NMDA5 NMDA1 NMDA0 NMDA2 NMDA4 NMDA3 NMDA7 NMDA6
12
C122
22U_1206_10V4Z
12
C178
0.1U_0402_10V6K
B4
U32
22_16P8R_1206_5%
NMAA0
N5
N10 N11
H12 B12
H13 B13 N13
M13 M10
N12
M11 M12
C11 H11
L12 L13
E10
L10
A0
N6
A1
M6
A2
N7
A3
N8
A4
M9
A5
N9
A6 A7 A8/AP
M8
A9
L6
A10
M7
A11
N4
BA0
M5
BA1
B3
DM0 DM1
H3
DM2 DM3
B2
DQS0 DQS1
H2
DQS2 DQS3
VREF MCL
L9
RFU1 RFU2
M2
RAS#
L2
CAS#
L3
WE#
N2
CS# CKE CK
CK#
C4
NC NC
H4
NC NC NC NC
M3
NC
M4
NC
N3
NC
E7
VSS
E8
VSS VSS
K6
VSS
K7
VSS
K8
VSS
K9
VSS
L5
VSS VSS
E5
VSS
RP13
NMDA31
8 9
NMDA30
7
NMDA29
6
NMDA28
5
NMDA27
4
NMDA26
3
NMDA25
2
NMDA24
1
C C
22_16P8R_1206_5%
+2.5VS
R382
1K_0402_1%
1 2
1
R386 1K_0402_1%
NMDA9 NMDA11 NMDA10 NMDA8 NMDA13 NMDA12 NMDA14 NMDA15
2
RP10
10 11 12 13 14 15 16
1 2
B B
R_NMDA31 R_NMDA30
10
R_NMDA29
11
R_NMDA28
12
R_NMDA27
13
R_NMDA26
14
R_NMDA25
15
R_NMDA24
16
NMA_BA017 NMA_BA117
R115 15_0402_5%1 2
R_NDQMA3
R143 15_0402_5%1 2
R_NDQMA1 NDQMA1
R97 15_0402_5%
R_NDQMA2 R_NDQSA0
R_NDQSA3 R_NDQSA1 R_NDQSA2 NDQSA2
1 2
R141 15_0402_5%1 2 R119 15_0402_5%1 2
R142 15_0402_5%1 2 R102 15_0402_5%
1 2
R140 15_0402_5%1 2
(25mil) (25mil)
C510
0.1U_0402_10V6K
NMCLKA0#17 NMCLKA1#17
89 7 6 5 4 3 2 1
NMCLKA0
NMCLKA0#
R_NMDA9 R_NMDA11 R_NMDA10 R_NMDA8 R_NMDA13 R_NMDA12 R_NMDA14 R_NMDA15
NMRASA#17 NMCASA#17 NMWEA#17 NMCSA0#17
NMCKEA17
NMAA1 NMAA2 NMAA3 NMAA4 NMAA5 NMAA6 NMAA7 NMAA8 NMAA9 NMAA10 NMAA11 NMA_BA0 NMA_BA1
NDQMA0R_NDQMA0 NDQMA3
NDQMA2 NDQSA0
NDQSA3 NDQSA1
VR_VREF_1
NMRASA# NMCASA# NMWEA# NMCSA0#
NMCKEA
R131 @120_0402_5%
22_16P8R_1206_5% RP12
NMDA22
1
NMDA23
2
NMDA21
3
NMDA20
4
NMDA17
5
NMDA19
6
NMDA16
7
NMDA18
A A
8 9
16 15 14 13 12 11 10
R_NMDA22 R_NMDA23 R_NMDA21 R_NMDA20 R_NMDA17 R_NMDA19 R_NMDA16 R_NMDA18
0.1U_0402_10V6K
1
C133
2
B11D4D5D6D9
D10
D11E6E9F5F10G5G10H5H10J5J10K5K10
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
F6F7F8F9G6G7G8G9H6H7H8H9J6J7J8
22_16P8R_1206_5%
Title
Size Document Number Rev
5
4
3
2
Date: Sheet of
Compal Electronics, Inc. VGA DDR FOR CHANNEL A
LA-1841
1
20 57Thursday, February 20, 2003
Page 21
5
4
3
2
1
+2.5VS +2.5VS
R_NDQMB[0..7]17
R_NDQSB[0..7]17
D D
NMAB[0..11]17
R_NMDB[0..63]17
NMDB0 NMDB1
NMDB3 NMDB4
NMDB6 NMDB7
R_NDQMB[0..7] R_NDQSB[0..7] NMAB[0..11] R_NMDB[0..63]
22U_1206_10V4Z
RP16
16 15 14 13 12 11 10
R_NMDB0
1
R_NMDB2NMDB2
2
R_NMDB1
3
R_NMDB3
4
R_NMDB4
5
R_NMDB5NMDB5
6
R_NMDB6
7
R_NMDB7
89
22_16P8R_1206_5%
NMDB31 NMDB30 NMDB29 NMDB28 NMDB27 NMDB26 NMDB25 NMDB24
RP20
16 15 14 13 12 11 10
1 2 3 4 5 6 7 89
R_NMDB31 R_NMDB30 R_NMDB29 R_NMDB28 R_NMDB27 R_NMDB26 R_NMDB25 R_NMDB24
22_16P8R_1206_5%
C C
R_NDQMB0
+2.5VS
R180
1K_0402_1%
1 2
R178 1K_0402_1%
1 2
R_NDQMB3 R_NDQMB1 R_NDQMB2
R_NDQSB0 R_NDQSB3 R_NDQSB1 R_NDQSB2
(25mil)
1
C244
0.1U_0402_10V6K
2
NMCLKB017 NMCLKB117
B B
NMCLKB0#17
NMDB15 NMDB14 NMDB13 NMDB12 NMDB11 NMDB8 NMDB9 NMDB10
NMDB16 NMDB17 NMDB18 NMDB19 NMDB20 NMDB21 NMDB22
A A
NMDB23
RP21
8 9 7
10
6
11
5
12
4
13
3
14
2
15
1
16
22_16P8R_1206_5%
RP15
1
16
2
15
3
14
4
13
5
12
6
11
7
10
89
22_16P8R_1206_5%
NMB_BA017 NMB_BA117
R157 15_0402_5%12 R165 15_0402_5% R166 15_0402_5%12 R156 15_0402_5%12
R158 15_0402_5%12 R169 15_0402_5% R170 15_0402_5%12 R155 15_0402_5%12
NMCLKB0
12
12
NMRASB#17 NMCASB#17 NMWEB#17 NMCSB0#17
NMCKEB17
R409 @120_0402_5%
NMCLKB0#
R_NMDB15 R_NMDB14 R_NMDB13 R_NMDB12 NMDB35 R_NMDB11 R_NMDB8 R_NMDB9 R_NMDB10
R_NMDB16 R_NMDB17 R_NMDB18 R_NMDB19 R_NMDB20 R_NMDB21 R_NMDB22 R_NMDB23
12
C246
NMAB0 NMAB1 NMAB2 NMAB3 NMAB4 NMAB5 NMAB6 NMAB7 NMAB8 NMAB9 NMAB10 NMAB11 NMB_BA0 NMB_BA1
NDQMB0 NDQMB3 NDQMB1 NDQMB2
NDQSB0 NDQSB3 NDQSB1 NDQSB2
VR_VREF_3
NMRASB# NMCASB# NMWEB# NMCSB0#
NMCKEB
22U_1206_10V4Z
1
C559
2
B4
B11D4D5D6D9
U40
VSSQ
VSSQ
VSSQ
VSSQ
N5
A0
N6
A1
M6
A2
N7
A3
N8
A4
M9
A5
N9
A6
N10
A7
N11
A8/AP
M8
A9
L6
A10
M7
A11
N4
BA0
M5
BA1
B3
DM0
H12
DM1
H3
DM2
B12
DM3
B2
DQS0
H13
DQS1
H2
DQS2
B13
DQS3
N13
VREF
M13
MCL
L9
RFU1
M10
RFU2
M2
RAS#
L2
CAS#
L3
WE#
N2
CS#
N12
CKE
M11
CK
M12
CK#
C4
NC
C11
NC
H4
NC
H11
NC
L12
NC
L13
NC
M3
NC
M4
NC
N3
NC
E7
VSS
E8
VSS
E10
VSS
K6
VSS
K7
VSS
K8
VSS
K9
VSS
L5
VSS
L10
VSS
E5
VSS
VSS TH
VSS TH
F6F7F8F9G6G7G8G9H6H7H8H9J6J7J8
As close as ppossible to related pin
0.1U_0402_10V6K
1
2
0.1U_0402_10V6K
D10
D11E6E9F5F10G5G10H5H10J5J10K5K10
VSSQ
VSSQ
VSSQ
VSSQ
VSS TH
VSS TH
VSS TH
VSS TH
C226
VSSQ
VSS TH
VSSQ
VSSQ
VSS TH
VSS TH
VSSQ
VSSQ
VSS TH
VSS TH
1
C240
2
0.1U_0402_10V6K
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VDD VDD VDD VDD VDD VDD VDD VDD
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
K4D263238A-GC_FBGA144
J9
B7 C6 B6 B5 C2 D3 D2 E2 K13 K12 J13 J12 G13 G12 F13 F12 F3 F2 G3 G2 J3 J2 K2 K3 E13 D13 D12 C13 B10 B9 C9 B8
C3 C5 C7 C8 C10 C12 E3 E12 F4 F11 G4 G11 J4 J11 K4 K11
D7 D8 E4 E11 L4 L7 L8 L11
1
2
C237
NMDB7 NMDB5 NMDB6 NMDB4 NMDB0 NMDB3 NMDB2 NMDB1 NMDB25 NMDB24 NMDB27 NMDB26 NMDB29 NMDB28 NMDB31 NMDB30 NMDB9 NMDB8 NMDB11 NMDB10 NMDB13 NMDB12 NMDB14 NMDB15 NMDB21 NMDB22 NMDB20 NMDB23 NMDB19 NMDB17 NMDB18 NMDB16
0.1U_0402_10V6K
1
C236
2
0.01U_0402_16V7K
+2.5VS
0.01U_0402_16V7K
1
C232
2
1
C227
2
0.01U_0402_16V7K
NMDB40 NMDB41 NMDB42 NMDB43 NMDB44 NMDB45 NMDB46 NMDB47
NMDB55 NMDB53 NMDB54 NMDB52 NMDB50 NMDB51 NMDB49 NMDB48
+2.5VS
R181
1K_0402_1%
1 2
R179 1K_0402_1%
1 2
NMDB32 NMDB33 NMDB34
NMDB36 NMDB37 NMDB38 NMDB39
NMDB56 NMDB57 NMDB59 NMDB58 NMDB60 NMDB63 NMDB61 NMDB62
1
C225
2
22U_1206_10V4Z
RP18
1
16
2
15
3
14
4
13
5
12
6
11
7
10
89
22_16P8R_1206_5%
RP22
89 7
10
6
11
5
12
4
13
3
14
2
15
1
16
22_16P8R_1206_5%
R_NDQMB5
R161 15_0402_5%12
R_NDQMB6
R167 15_0402_5%
R_NDQMB4
R168 15_0402_5%12
R_NDQMB7
R160 15_0402_5%12
R_NDQSB5
R162 15_0402_5%12
R_NDQSB6
R171 15_0402_5%
R_NDQSB4
R172 15_0402_5%12
R_NDQSB7
R159 15_0402_5%12
1
2
NMCLKB1#17
RP23
1
16
2
15
3
14
4
13
5
12
6
11
7
10
89
22_16P8R_1206_5%
RP17
1
16
2
15
3
14
4
13
5
12
6
11
7
10
89
22_16P8R_1206_5%
22U_1206_10V4Z
12
C221
R_NMDB40 R_NMDB41 R_NMDB42 R_NMDB43 R_NMDB44 R_NMDB45 R_NMDB46 R_NMDB47
R_NMDB55 R_NMDB53 R_NMDB54 R_NMDB52 R_NMDB50 R_NMDB51 R_NMDB49 R_NMDB48
12
12
(25mil)
C245
0.1U_0402_10V6K
NMCLKB1
NMCLKB1#
R_NMDB32 R_NMDB33 R_NMDB34 R_NMDB35 R_NMDB36 R_NMDB37 R_NMDB38 R_NMDB39
R_NMDB56 R_NMDB57 R_NMDB59 R_NMDB58 R_NMDB60 R_NMDB63 R_NMDB61 R_NMDB62
12
C560
0.1U_0402_10V6K
NMAB0 NMAB1 NMAB2 NMAB3 NMAB4 NMAB5 NMAB6 NMAB7 NMAB8 NMAB9 NMAB10 NMAB11 NMB_BA0 NMB_BA1
NDQMB5 NDQMB6 NDQMB4 NDQMB7
NDQSB5 NDQSB6 NDQSB4 NDQSB7
VR_VREF_4
NMRASB# NMCASB# NMWEB# NMCSB0#
NMCKEB
R183 @120_0402_5%
0.1U_0402_10V6K
1
C229
2
1
C235
2
0.1U_0402_10V6K
B4
B11D4D5D6D9
U39
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
N5
A0
N6
A1
M6
A2
N7
A3
N8
A4
M9
A5
N9
A6
N10
A7
N11
A8/AP
M8
A9
L6
A10
M7
A11
N4
BA0
M5
BA1
B3
DM0
H12
DM1
H3
DM2
B12
DM3
B2
DQS0
H13
DQS1
H2
DQS2
B13
DQS3
N13
VREF
M13
MCL
L9
RFU1
M10
RFU2
M2
RAS#
L2
CAS#
L3
WE#
N2
CS#
N12
CKE
M11
CK
M12
CK#
C4
NC
C11
NC
H4
NC
H11
NC
L12
NC
L13
NC
M3
NC
M4
NC
N3
NC
E7
VSS
E8
VSS
E10
VSS
K6
VSS
K7
VSS
K8
VSS
K9
VSS
L5
VSS
L10
VSS
E5
VSS
VSS TH
VSS TH
VSS TH
F6F7F8F9G6G7G8G9H6H7H8H9J6J7J8
0.1U_0402_10V6K
1
2
D10
VSSQ
VSSQ
VSS TH
VSS TH
1
C228
C234
2
D11E6E9F5F10G5G10H5H10J5J10K5K10
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
0.01U_0402_16V7K
1
C241
2
0.01U_0402_16V7K
VSSQ
VSSQ
VSSQ
VSSQ
NMDB47
B7
DQ0
NMDB46
C6
DQ1
NMDB45
B6
DQ2
NMDB44
B5
DQ3
NMDB40
C2
DQ4
NMDB43
D3
DQ5
NMDB41
D2
DQ6
NMDB42
E2
DQ7
NMDB53
K13
DQ8
NMDB55
K12
DQ9
NMDB52
J13
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSS TH
J9
NMDB54
J12
NMDB51
G13
NMDB50
G12
NMDB48
F13
NMDB49
F12
NMDB38
NMDB39
NMDB36
G3
NMDB37
G2
NMDB34
J3
NMDB35
J2
NMDB33
K2
NMDB32
K3
NMDB62
E13
NMDB61
D13
NMDB60
D12
NMDB63
C13
NMDB58
B10
NMDB57
B9
NMDB59
C9
NMDB56
B8
C3 C5 C7 C8 C10 C12 E3 E12 F4 F11 G4 G11 J4 J11 K4 K11
D7
VDD
D8
VDD
E4
VDD
E11
VDD
L4
VDD
L7
VDD
L8
VDD
L11
VDD
VSS TH
K4D263238A-GC_FBGA144
1
C224
2
0.01U_0402_16V7K
+2.5VS
1
2
C239
Title
Size Document Number Rev
5
4
3
2
Date: Sheet of
Compal Electronics, Inc. VGA DDR FOR CHANNEL B
LA-1841
21 57Thursday, February 20, 2003
1
Page 22
A
B
C
D
E
CRT, TV-OUT & LVDS CONNECTOR
TV-OUT Conn.
C501 22P_0402_50V8J
1 2
L24
1 1
2 2
LUMA16
CRMA16
COMPS16
ENVDD16
R74
75_0603_1%
+LCDVDD
ENVDD
12
12
12
R387
75_0603_1%
12
R16 100_0402_5%
13
D
2
G
Q1
S
2N7002
22K
2
22K
Q2
DTC124EK_SOT23
R356
75_0603_1%
270P_0402_50V7K
+5V
R6 10K_0402_5%
1 2
1 2
R5 47K_0402_5%
13
12
C515
DTC124EK_SOT23
1 2
FBM-11-160808-121T_0603
L26
1 2
FBM-11-160808-121T_0603
1 2
C512
12
C497
22P_0402_50V8J
270P_0402_50V7K
+12VALW
R26 100K_0402_5%
1 2 13
22K
2
22K
Q4
12
C511 330P_0402_50V7K
12
R25
200K_0402_5%
1
2
3
D26 DAN217_SOT23
LUMA_1 CRMA_1
12
12
C5
1000P_0402_50V7K
1
2
3
C502 330P_0402_50V7K
+3VS
13
D
Q3
2
G
SI2302DS-T1_SOT23
S
12
C107
0.1U_0402_16V4Z
D25 DAN217_SOT23
+3VS
JP20
1
1. Y ground
1
2
2. C ground
2
3
3. Y (luminance+sync)
3
4
4. C (crominance)
4
SUYIN_030008FR004T101ZL
12
C6
4.7U_0805_10V4Z
+LCDVDD
12
C108
4.7U_0805_10V4Z
+3VALW
147
U13D
13
INVT_PWM39
12
PID3 PID2 PID1 PID0
1 8 2 7 3 6 4 5
PG
A
12
B
SN74LVC32APWLE_TSSOP14
+3VALW POWER
C12
0.1U_0603_50V4Z
+3VS
RP6
10K_8P4R_1206_5%
B_INVT_PWM
11
O
C17 10U_1210_35V4Z
CHB2012U170_0805
DAC_BRIG39
+LCDVDD
TXOUT0+16 TXOUT0-16 TXOUT1+16 TXOUT1-16
TXOUT2+16
TXOUT2-16
TXOUT3+16
TXOUT3-16
TXCLK+16
TXCLK-16
TZOUT0+16 TZOUT0-16 TZOUT1+16 TZOUT1-16
TZOUT2+16
TZOUT2-16
TZOUT3+16
TZOUT3-16
TZCLK+16
TZCLK-16 PID036
PID136 PID236 PID336
L7
1 2 1 2
L6CHB2012U170_0805
TXOUT0+ TXOUT0­TXOUT1+ TXOUT1-
TXOUT2+ TXOUT2­TXOUT3+ TXOUT3-
TXCLK+ TXCLK-
TZOUT0+ TZOUT0­TZOUT1+ TZOUT1-
TZOUT2+ TZOUT2­TZOUT3+ TZOUT3-
TZCLK+ TZCLK-
PID0 PID1 PID2 PID3
LVDS Conn.
INVPWR_B+
DAC_BRIG B_INVT_PWM DISPOFF#
+3VS
JP1
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
I-PEX_20324-040E-01
D24
DAN217_SOT23
3 3
R16
G16
B16
4 4
DACA_HSYNC16
SN74AHCT1G125GW_SOT353-5
DACA_VSYNC16
12
R7
75_0603_1%
1 2
C1
0.1U_0402_16V4Z
A
12
R8
75_0603_1%
+CRT_VCC
1
2 4
A Y
G P
U27
3 5
75_0603_1%
OE#
CRT Conn.
18P_0402_50V8K
12
R9
12
C462
18P_0402_50V8K
+CRT_VCC
1 2
C2
0.1U_0402_16V4Z
2 4
L3
1 2
FCM2012C-800_0805
L4
1 2
FCM2012C-800_0805
L5
1 2
FCM2012C-800_0805
12
12
C463
C464 18P_0402_50V8K
R4 1K_0402_5%
1 2
1
DACA_VSYNC_1
OE#
A Y
U26
G P
SN74AHCT1G125GW_SOT353-5
3 5
2
12
C461
15P_0402_50V8J
L1
1 2
0_0603_5%
L2
1 2
0_0603_5%
B
DAN217_SOT23
1
3
CRT_R
CRT_G
CRT_B
12
C460
15P_0402_50V8J
12
C457 @68P_0402_50V8K
D23
1
2
3
12
15P_0402_50V8J
DACA_HSYNC_2
D22
DAN217_SOT23
1
+3VS
2
3
C458
DACA_VSYNC_2
12
C456 @68P_0402_50V8K
+5VS +CRT_VCC+R_CRT_VCC
D20
2 1
CH491D_SOT23
100P_0402_50V8K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
FUSE_1A
C455
0.1U_0402_16V4Z
12
C454
12
C459
220P_0402_50V8K
C
21
12
CRT_VCC
12
C453 220P_0402_50V8K
6
11
1 7
12
2 8
13
3 9
14
4 10 15
5
JP15 CRT-15P
DDC_DATA_1DACA_HSYNC_1
DDC_CLK_1
+CRT_VCC
4.7K_0402_5%
1 2
R12
R13
4.7K_0402_5%
1 2
D
BKOFF#39
+5VS+CRT_VCC +5VS +5VS
R11
100K_0402_5%
1 2 2
G
Q34
2N7002
1 3
D
S
2
Q35
2N7002
1 3
D
Title
Size Document Number Rev
B
Date: Sheet of
D32 RB751V_SOD323
21
ENBKL16,39
1 2
G
S
R1
4.7K_0402_5%
2
G
R10
4.7K_0402_5%
1 2
Compal Electronics, Inc.
CRT,TV-OUT & LVDS Connector
LA-1841
R551 10K_0402_5%
DISPOFF#
1 2
13
D
@2N7002 Q57
S
DDC_DATA 16
DDC_CLK 16
E
12
C680 220P_0402_50V8K
22 57Thursday, February 20, 2003
Page 23
5
4
3
2
1
+3VS
RP144
4 5
PCI_TRDY#
3 6
ICH_GPIO4_PIRQG#
2 7
PCI_PIRQB#
1 8
D D
C C
B B
A A
8.2K_8P4R_1206_5%
+3VS
RP140
PCI_REQ#2
4 5
ICH_GPIO3_PIRQF#
3 6
PCI_REQ#B
2 7
ICH_GPIO2_PIRQE#
1 8
8.2K_8P4R_1206_5%
+3VS
RP146
PCI_IRDY#
4 5
PCI_SERR#
3 6
PCI_DEVSEL#
2 7
PCI_PERR#
1 8
8.2K_8P4R_1206_5%
+3VS
RP143
PCI_STOP#
4 5
PCI_FRAME#
3 6
PCI_REQ#0
2 7
PCI_PIRQD#
1 8
8.2K_8P4R_1206_5%
+3VS
RP142
ICH_GPIO5_PIRQH#
4 5
PCI_PIRQA#
3 6
PCI_PIRQC#
2 7 1 8
8.2K_8P4R_1206_5%
+3VS
DISABLE "TOP BLOCK SWAP"
1 2
R232 8.2K_0402_5%
1 2
R512 8.2K_0402_5%
R483 10K_0402_5%
1 2
R222 10K_0402_5%
1 2
R503 10K_0402_5%
1 2
R479 10K_0402_5%
+1.5VS
12
R515 226_0603_1%
HI_SWING_ICH
12
R513 147_0603_1%
HI_VREF_ICH
12
R241 113_0603_1%
PIDERST#
PCI_PLOCK#
PCI_REQ#A
12
PCI_REQ#4
PCI_REQ#1
PCI_REQ#3
2
1
2
1
5
(GNTA#)
Note: HI_SWING_MCH, HI_VREF_MCH trace width of 10mils and space 7mils
C371
0.1U_0402_16V4Z
C379
0.1U_0402_16V4Z
1
2
1
2
PCI_AD[0..31]26,27,29,30
HUB_HL[0..10]10
Close to ICH(L20)
C377
0.01U_0402_16V7K
Close to ICH ball <250mils
Close to ICH(L24)
C374
0.01U_0402_16V7K
Close to ICH ball <250mils
PCI_AD[0..31]
HUB_HL[0..10]
PCI_C/BE#026,27,29,30 PCI_C/BE#126,27,29,30 PCI_C/BE#226,27,29,30 PCI_C/BE#326,27,29,30
PCI_REQ#030 PCI_REQ#129 PCI_REQ#227 PCI_REQ#326
PCI_GNT#030 PCI_GNT#129 PCI_GNT#227 PCI_GNT#326
CLK_PCI_ICH15
PCI_FRAME#26,27,29,30
PCI_DEVSEL#26,27,29,30
PCI_IRDY#26,27,29,30 PCI_PAR26,27,29,30
PCI_PERR#26,27,29,30
PCIRST#10,26,27,29,30,36,39 PCI_SERR#26,27,29,30
PCI_STOP#26,27,29,30
PCI_TRDY#26,27,29,30
PIDERST#35
4
PCI_AD0 INTRUDER# PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_REQ#0 PCI_REQ#1 PCI_REQ#2 PCI_REQ#3 PCI_REQ#4
PCI_GNT#0 PCI_GNT#1 PCI_GNT#2 PCI_GNT#3
CLK_PCI_ICH
PCI_FRAME# PCI_DEVSEL# PCI_IRDY# PCI_PAR PCI_PERR# PCI_PLOCK#
PCIRST# PCI_SERR# PCI_STOP# PCI_TRDY#
PCI_REQ#A PCI_REQ#B
PIDERST#
CLK_PCI_ICH
U49A
J4
AD0
ICH5/(ICH5-M)
J5
AD1
G3
AD2
K4
AD3
H5
AD4
H2
AD5
J3
AD6
J2
AD7
K5
AD8
AD9
M4
AD10
H4
AD11
L5
AD12
G2
AD13
K1
AD14
G5
AD15
G4
AD16
L1
AD17
B2
AD18
P5
AD19
H3
AD20
N5
AD21
C4
AD22
N4
AD23
E6
AD24
P3
AD25
D3
AD26
N2
AD27
AD28
P4
AD29
AD30
P2
AD31
E3 N3
M2
D5 C1 C5 B6 C6
D4 A3 B7 C7 A4
N1 D2
L3
M3
A5 E7
E8 B4
PCI I/F
C/BE0#
J1
C/BE1# C/BE2# C/BE3#
REQ0# REQ1# REQ2# REQ3# REQ4#/GPI40
GNT0# GNT1# GNT2# GNT3# GNT4#/GPO48
PCICLK FRAME#
DEVSEL# IRDY# PAR PERR# PLOCK# PME# PCIRST# SERR# STOP# TRDY#
REQA#/GPI0 REQB#REQ5#/GPI1
GNTA#/GPO16 GNTB#/GNT5#/GPO17
ICH5
12
R520 @10_0402_5%
1
C667 @10P_0402_50V8K
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SMB I/F
SMBALERT#/GPI11
CPU I/F
CPUPWRGD/GPO49
HUB I/F
Interrupt I/F
EEPROM I/F
LAN I/F
LAN_RSTSYNC
3
INTRUDER#
SMLINK0 SMLINK1
LINKALERT#
SMBCLK
SMBDATA
A20GATE
A20M#
NC
FERR#
IGNNE#
INIT#
INTR
NMI
RCIN#
CPUSLP#
SMI#
STPCLK#
NC/(DPSLP#)
CLK66
HI_STBF HI_STBS
HIRCOMP
HIREF
HI_VSWING
PIRQA# PIRQB# PIRQC#
PIRQD# PIRQE#/GPI2 PIRQF#/GPI3
PIRQG#/GPI4
PIRQH#/GPI5
IRQ14 IRQ15
SERIRQ
EE_CS
EE_DIN
EE_DOUT
EE_SHCLK LAN_RXD0
LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2
LAN_CLK
LAN_RST#
PCIRST#
Y12
ICH_SMLINK0
AD3
ICH_SMLINK1
AA2
LINK_ALERT#
V5
ICH_SMB_CLK
AD2
ICH_SMB_DATA
AD1
GPI_11
AC3 T22
V23 A11 U24 R21 R23 U23 R22 P24 P23 P22
SMI#
V24
R537
T24
R531 0_0402_5%
R24
HUB_HL0
H20
HUB_HL1
H21
HUB_HL2
J20
HUB_HL3
H23
HUB_HL4
M23
HUB_HL5
M21
HUB_HL6
N21
HUB_HL7
M20
HUB_HL8
L22
HUB_HL9
J22
HUB_HL10
K21
HUB_HL11
G22
CLK_ICH_66M
N22 K23
J24
HI_RCOMP_ICH
N24
HI_VREF_ICH
L24
HI_SWING_ICH
L20
PCI_PIRQA#
B3
PCI_PIRQB#
E1
PCI_PIRQC#
A2
PCI_PIRQD#
C2
ICH_GPIO2_PIRQE#
D7
ICH_GPIO3_PIRQF#
A6
ICH_GPIO4_PIRQG#
E2
ICH_GPIO5_PIRQH#
B1
IDE_IRQ14
Y17
IDE_IRQ15
Y24
IRQ_SERIRQ
F23 B10
B11
NC_EE_DOUT
B9 A12
C10 C9 C11 D9 E9 B12 E10 D10
LAN_RST#
AA1
+3V
C679 0.1U_0402_16V4Z
1
14
P
U51A
2 3
OE#
I O
+3V POWER
7
G
SN74LVC125APWLE_TSSOP14
12
R220 @1K_0402_5%
R544 10K_0402_5%
ICH_SMB_CLK 12,13,15 ICH_SMB_DATA 12,13,15
GATEA20 39 H_A20M# 5
H_FERR# 5 H_IGNNE# 5 H_INIT# 5 H_INTR 5 H_NMI 5 H_PWRGOOD 5 KBRST# 39 H_CPUSLP# 5
12
0_0402_5%
R522 54.9_0603_1%
H_SMI# 5
12
H_STPCLK# 5 H_DPSLP# 5
R234 62_0402_5%
CLK_ICH_66M 15 HUB_HLSTRF 10
HUB_HLSTRS 10
12
change to 52.3_1%
PCI_PIRQA# 16,27,30 PCI_PIRQB# 26,27 PCI_PIRQC# 27,29 PCI_PIRQD# 27,29
IDE_IRQ14 35 IDE_IRQ15 34,35
SERIRQ 27,36,39
12
12
B_PCIRST# 16,35
2
12
+1.5VS
INTRUDER#
ICH_SMLINK0
ICH_SMLINK1
LINK_ALERT#
GPI_11
ICH_SMB_CLK
ICH_SMB_DATA
IDE_IRQ15
IDE_IRQ14
IRQ_SERIRQ
Title
Size Document Number Rev
Date: Sheet of
1 2
R264 10K_0402_5%
1 2
R566 10K_0402_5%
1 2
R547 10K_0402_5%
1 2
R261 10K_0402_5%
1 2
R652 10K_0402_5%
1 2
R565 2.7K_0402_5%
1 2
R559 2.7K_0402_5%
CLK_ICH_66M
1 2
R543
1 2
R262
1 2
R511 10K_0402_5%
Compal Electronics, Inc. ICH5-PCI/HUB/LAN LA-1841
+RTCVCC
+3VALW
+3VS
R249 @10_0402_5%
1 2
2
C383 @10P_0402_50V8K
1
+3VS
8.2K_0402_5%
8.2K_0402_5%
1
23 57Thursday, February 20, 2003
Page 24
+3VALW
R550 10K_0402_5% R540 8.2K_0402_5%
+3VS
R253 10K_0402_5%
D D
C C
B B
R530 4.7K_0402_5% R653 10K_0402_5%
+CPU_CORE
R257 10K_0402_5%
R542 @10K_0402_5% R265 10K_0402_5%
+3VS
R477 @8.2K_0402_5%
R225 @10K_0402_5% R230 @10K_0402_5% R229 @10K_0402_5%
+3VALW
+RTCVCC
R576 @10K_0402_5%
+3VS
Disable timer timeout
CLK_ICH_14M
A A
5
TP0_PU
12
SYS_RESET#
12
ICH_VGATE
12
EC_THRM#
12
PM_CLKRUN#
12
H_CPUPERF#
12
SUSCLK
12
EC_RSMRST#
12
ICH_AC_SDOUT
12
ICH_AC_BITCLK
12
ICH_AC_SDIN0
12
ICH_AC_SDIN1
12
RP141
4 5 3 6 2 7 1 8
12R577 330K_0402_5%
USB_OC3# USB_OC5# USB_OC7# USB_OC1#
10K_8P4R_1206_5%
12
SPKR
12
R504 @1K_0402_5%
CLK_ICH_48M
R231 @10_0402_5%
1 2
C353 @4.7P_0402_50V8C
1 2
+CPU_CORE
R254 62_0402_5%
PM_CLKRUN#26,27,29,30,36,39
5
H_CPUPERF#5
LPC_AD[0..3]36,39
ICH_INTVRMEN
Note: USBRBIAS keep less than 500mils
1 2
12
R508 @10_0402_5%
2
C650 @10P_0402_50V8K
1
H_THERMTRIP#
H_THERMTRIP#5
Near ICH
PM_CLKRUN#
VGATE53
+3VS
PM_DPRSLPVR53
EC_RSMRST#39,45
ICH_AC_BITCLK31,38
ICH_AC_SDIN031 ICH_AC_SDIN138
LPC_FRAME#36,39
CLK_ICH_14M15
CLK_ICH_48M15
PBTN_OUT#39 EC_SWI#39
PM_SLP_S1#15 PM_SLP_S3#39
STP_CPU#15,53 STP_PCI#15 SUSCLK27
EC_THRM#39
LPC_AD[0..3]
LPC_DRQ#136
USB_OC0#37 USB_OC2#37 USB_OC4#37 USB_OC6#37
SIDERST#35
4
R251 10K_0402_5%
1 2
SYS_RESET# TP0_PU
PM_DPRSLPVR ICH_PWROK EC_RSMRST#
PM_SLP_S1# PM_SLP_S3# PM_SLPS4# PM_SLPS5# STP_CPU# STP_PCI# SUSCLK
EC_THRM#
H_CPUPERF#
ICH_AC_BITCLK ICH_AC_RST_R# ICH_AC_SDIN0 ICH_AC_SDIN1
ICH_AC_SDOUT_R I CH_AC_SYNC_R
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
LPC_DRQ1# LPC_FRAME#
USBP0+37
USBP0-37
USBP2+37
USBP2-37
USBP3+35
USBP3-35
USBP4+37
USBP4-37
USBP5+38
USBP5-38
USBP6+37
USBP6-37
USBP7+35
USBP7-35
USB_OC0# USB_OC1# USB_OC2# USB_OC3# USB_OC4# USB_OC5# USB_OC6# USB_OC7#
1 2
R500
22.6_0603_1%
SIDERST# ICH_INTVRMEN
SPKR
1 2
R258 0_0402_5%
CLK_ICH_14M
CLK_ICH_48M
ICH_VGATE
1 2
R528 0_0402_5%
SPKR33
H_THERMTRIP#
4
USBRBIAS
U49B
R5
GPI6/(AGPBUSY#)
U1
SYS_RESET#
AB2
TP0/(BATLOW#)
R1
GPO21/(C3_SAT#)
AC1
GPIO24/(CLKRUN#)
P20
NC/(DPRSLPVR)
Y4
PWRBTN#
AC12
PWROK
AB3
AB13
RSMRST#
T20
GPO19/(SLP_S1#)
W1
SLP_S3#
U2
SLP_S4#
AA3
SLP_S5#
U22
GPO20/(STP_CPU#)
U21
GPO18/(STP_PCI#)
Y1
SUSCLK
AB1
SUS_STAT#/LPCPD#
THRM#
F22
GPO23/(SSMUXSEL)
U20
GPO22/(CPUPERF#)
R20
VRMPWRGD/(VGATE)
D8
AC_BIT_CLK
C12
AC_RST#
E12
AC_SDIN0
D12
AC_SDIN1
A13
AC_SDIN2
A9
AC_SDOUT
B8
AC_SYNC
LAD0
R4
LAD1
R3
LAD2
U4
LAD3
U5
LDRQ0#
R2
LDRQ1#/GPI41
LFRAME#
C23
USBP0P
D23
USBP0N
A22
USBP1P
B22
USBP1N
C21
USBP2P
D21
USBP2N
A20
USBP3P
B20
USBP3N
C19
USBP4P
D19
USBP4N
A18
USBP5P
B18
USBP5N
C17
USBP6P
D17
USBP6N
A16
USBP7P
B16
USBP7N
C15
OC0#
D15
OC1#
D14
OC2#
C14
OC3#
B14
OC4#/GPI9
A14
OC5#/GPI10
D13
OC6#/GPI14
C13
OC7#/GPI15
A24
USBRBIAS
B24
USBRBIAS#
GPIO32
G23
GPIO33
F21
GPIO34
AD10
INTVRMEN
E24
SPKR
T21
THRMTRIP#
F20
CLK14
F24
CLK48
ICH5
ICH_AC_RST#31,38
ICH_AC_SYNC31,38
ICH_AC_SDOUT31,38
3
R536 10K_0402_5%
ICH_ACIN
U3
ICH5/(ICH5-M)
GPI
PM
IST
AC97 I/F
IDE I/F
LPC I/F
USB I/F
SATA I/F
GPIO
MISC
CLOCK
ICH_AC_RST_R#
12
R486 33_0402_5% R485 33_0402_5% R484 33_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
I CH_AC_SYNC_R
12
ICH_AC_SDOUT_R
12
3
GPI7
GPI8 GPI12 GPI13
GPIO25 GPIO27 GPIO28
PDA0 PDA1
PDA2 PDCS1# PDCS3#
PDDREQ
PDDACK#
PDIOR#
PDIOW#
PIORDY
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
SDA0
SDA1
SDA2 SDCS1# SDCS3#
SDDREQ
SDDACK#
SDIOR#
SDIOW#
SIORDY
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
SATA0TXP SATA0TXN SATA0RXN SATA0RXP
SATA1TXP SATA1TXN SATA1RXN SATA1RXP
SATARBIAS
SATARBIAS#
CLK100P CLK100N
RTCRST#
RTCX1 RTCX2
Y2 W4 W5 W3 V3 W2
AA19 AD19 AC19 AB19 Y18
AC17 AC18 AD18 AA17 AA18
AB16 Y13 Y14 AC14 AA14 AC15 AD14 AB14 AD15 Y15 AD16 AA15 AC16 Y16 AA16 AB17
W22 W23 W21 V22 V20
Y20 W20 Y23 Y22 Y21
AA22 AB23 AD23 AD24 AB21 AC21 AB20 AC20 Y19 AD22 AC22 AA20 AB22 AC24 AB24 AA23
AA8 AB8 AD7 AC7
AA10 AB10 AD9 AC9
Y11 Y9
AC5 AD5
AA12 AC11 AB12
1 2
EC_SMI# EC_SCI# EC_LID_OUT#
IDE_PDA0 IDE_PDA1 IDE_PDA2 IDE_PDCS1# IDE_PDCS3#
IDE_PDDREQ IDE_PDDACK# IDE_PDIOR# IDE_PDIOW# IDE_PDIORDY
IDE_PDD0 IDE_PDD1 IDE_PDD2 IDE_PDD3 IDE_PDD4 IDE_PDD5 IDE_PDD6 IDE_PDD7 IDE_PDD8 IDE_PDD9 IDE_PDD10 IDE_PDD11 IDE_PDD12 IDE_PDD13 IDE_PDD14 IDE_PDD15
IDE_SDA0 IDE_SDA1 IDE_SDA2 IDE_SDCS1# IDE_SDCS3#
IDE_SDDREQ IDE_SDDACK# IDE_SDIOR# IDE_SDIOW# IDE_SDIORDY
IDE_SDD0 IDE_SDD1 IDE_SDD2 IDE_SDD3 IDE_SDD4 IDE_SDD5 IDE_SDD6 IDE_SDD7 IDE_SDD8 IDE_SDD9 IDE_SDD10 IDE_SDD11 IDE_SDD12 IDE_SDD13 IDE_SDD14 IDE_SDD15
Note: SATABIAS keep less than 500mils
SATABIAS
ICH_RTCRST# ICH_RTCX1 ICH_RTCX2
12
R260 24.9_0603_1%
ICH_AC_BITCLK
2
+3VS
EC_SMI# 39 EC_SCI# 39 EC_LID_OUT# 39 EC_FLASH# 40
USB_EN# 37
IDE_PDA0 35 IDE_PDA1 35 IDE_PDA2 35 IDE_PDCS1# 35 IDE_PDCS3# 35
IDE_PDDREQ 35 IDE_PDDACK# 35 IDE_PDIOR# 35 IDE_PDIOW# 35 IDE_PDIORDY 35
ICH_SYNC# SYS_PWROK ICH_PWROK
0 0
0 1 0 01
1 1 1
IDE_SDA0 34,35 IDE_SDA1 34,35 IDE_SDA2 34,35 IDE_SDCS1# 34,35 IDE_SDCS3# 34,35
IDE_SDDREQ 34,35 IDE_SDDACK# 34,35 IDE_SDIOR# 34,35 IDE_SDIOW# 34,35 IDE_SDIORDY 34,35
IDE_PDD[0..15] IDE_SDD[0..15]
R223 @10_0402_5%
1 2
2
C354 @10P_0402_50V8K
1
2
IDE_PDD[0..15] 35 IDE_SDD[0..15] 34,35
ICH_RTCX1 ICH_RTCX2
32.768KHZ_12.5PF_CM155
R476
4.7K_0402_5%
ICH_RTCRST#
R567 10M_0603_5%
C697 12P_0402_50V8J
Title
Size Document Number Rev
Date: Sheet of
R569 @10M_0603_5%
X6
1
2 1
PM_SLPS4# PM_SLPS5#
ACINICH_ACIN
D36RB751V_SOD323
+3VALW
C392 0.1U_0402_16V4Z
5
U17
1
P
4
O
2
G
SN7 4AHC1G08HDCK_TSSOP5
3
0 0
R571
@220_0402_5%
@MMBT3904_SOT23
ICH_SYNC#10 SYS_PWROK7,42
12
ICH_VBIAS
12
12
IDE_PDIORDY
IDE_SDIORDY
+3VS
12
12
1
2
Q60
3
12
J1 JOPEN
1U_0805_25V4Z
1 2
R578 @22M_0603_5% R568 @2.4M_0603_1%
1 2
C698 12P_0402_50V8J
R580 @1K_0402_5%
1 3
1 2
R570 0_0402_5%
C686
C691 @0.047U_0402_16V4Z
Compal Electronics, Inc.
ICH5-IDE/LPC/PM/GPIO/USB
LA-1841
1
ACIN 39,44,46
12
PM_SLP_S5# 39
12
R572 4.7K_0402_5%
12
R546 4.7K_0402_5%
12
R582 @220_0402_5%
2
Q59 @MMBT3904_SOT23
ICH_PWROK
+RTCVCC
R573
12
200K_0402_5%
12
R575 @1K_0402_5%
24 57Thursday, February 20, 2003
+3VS
Page 25
5
4
3
2
1
+CPU_CORE
1
C388
0.1U_0402_16V4Z
2
Place near ball T22
+1.5VS
1
C382
0.1U_0402_16V4Z
2
1
C384
0.01U_0402_16V7K
2
Place near ball D24
+1.5VS
1
C378
0.1U_0402_16V4Z
2
1
C394
0.01U_0402_16V7K
2
Place near ball AD6
+3VS +5VS
21
D30
RB751V_SOD323
1
C349
0.1U_0402_16V4Z
2
D12
RB751V_SOD323
1
C355
0.1U_0402_16V4Z
2
Title
Size Document Number Rev
Date: Sheet of
Compal Electronics, Inc. ICH5 Power & Decoupling LA-1841
1 2
1
C636 1U_0603_10V6K
2
+3VALW +5VALW
21
1
C364 1U_0603_10V6K
2
1
R482
1K_0402_5%
R233 1K_0402_5%
1 2
25 57Thursday, February 20, 2003
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
B5 F6 G1 H6 K6 L6 M10 N10 P6 R13 V19 W15 W17 W24 AD13 AD20 G19 G21
E18 B15 E11 F10 F11 E13 E14 U6 V6 F16 F17 F18 K15
K10 K12 K13 L19 P19 R10 R6 H24 J19 K19 M15 N15 N23 E15 F15 F14 W19 R12 W9 W10 W11 W6 W7 W8 E22
F19 Y5 AA4 AB4 F7 F8
A8 W14
E16 R15
R19 T19
AA6 AB6
C24 AD11
P14 P15 P21 R11 R14 T23 T3 T6 U19 V1 V21 W16 W18 Y3 Y6 Y7 Y8 Y10
+3VS
+3VALW
+1.5VS
VCCSUS15_A VCCSUS15_B
VCCSUS15_C
ICH_V5REF
ICH_V5REF_SUS
+CPU_CORE
+1.5VS
4
+3VS
+RTCVCC
1
C397
0.1U_0402_16V4Z
2
1
C401
0.1U_0402_16V4Z
2
1
C361
0.1U_0402_16V4Z
2
1
C398
0.01U_0402_16V7K
2
Place near ball (VSS)AD4
1
C385
0.1U_0402_16V4Z
2
Place near ball(VSS) D1,A7,H1,P1,W24 and A21
1
C386
0.1U_0402_16V4Z
2
Place0.1u near ball(VSS) G24,H24,K24,M24,AD4 and AD18; 0.01u near to ball AD8.
1
C357
0.1U_0402_16V4Z
2
Place0.1u near ball(VSS) A17,A23,V1.Addition cap near A15,A19
Place near ball (VSS)A19
1
C359
0.01U_0402_16V7K
2
1
C363
0.1U_0402_16V4Z
2
1
C368
0.1U_0402_16V4Z
2
1
C391
0.1U_0402_16V4Z
2
1
C373
0.1U_0402_16V4Z
2
+1.5VS
1
C393
0.1U_0402_16V4Z
2
+3VALW
1
C356
0.01U_0402_16V7K
2
Decoupling Reference Document: Springdale Chipset Platform Design guide Rev1.11 (12474)page278
1
C362
0.01U_0402_16V7K
2
Place near ball (VSS)A7
1
C402
0.1U_0402_10V6K
2
Place near ball AD11
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1
C381
0.1U_0402_16V4Z
2
1
C395
0.1U_0402_16V4Z
2
1
C387 1U_0603_10V6K
2
1
C389
0.1U_0402_16V4Z
2
1
C360
0.1U_0402_16V4Z
2
1
C390
0.1U_0402_16V4Z
2
Place near ball A8
1
2
Place near ball(VSS) A17
2
2
C372
0.01U_0402_16V7K
1
ICH_V5REF
ICH_V5REF_SUS
C358
0.1U_0402_16V4Z
U49C
A1
ICH5/(ICH5-M)
VSS
A7
VSS
A10
VSS
A15
VSS
A17
VSS
A19
VSS
A21
VSS
D D
C C
B B
A A
A23 AA5 AA7
AA9 AA11 AA13 AA21 AA24
AB5
AB7
AB9 AB11 AB15 AB18
AC2
AC4
AC6
AC8 AC10 AC13 AC23
AD4
AD6
AD8 AD17 AD21 AD12
B13
B17
B19
B21
B23
C16
C18
C20
C22
D11
D16
D18
D20
D22
D24
E17
E19
E20
E21
E23
G6 G20 G24
H19 H22
J21 J23
K11 K14 K20 K22 K24 L10 L11 L12 L13 L14 L15 L21 L23
M1
M5 M11 M12 M13 M14 M22 M24
N11 N12 N13 N14 N20
P10 P11 P12 P13
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
C3
VSS
C8
VSS VSS VSS VSS VSS
D1
VSS
D6
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS
VSS VSS VSS VSS
H1
VSS VSS VSS
J6
VSS VSS VSS
K3
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
P1
VSS VSS VSS VSS VSS
ICH5
5
Power
GND
VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3
VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3
VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5
VCCSUS1_5_A VCCSUS1_5_B VCCSUS1_5_B VCCSUS1_5_B VCCSUS1_5_C VCCSUS1_5_C
V5REF V5REF
V5REF_SUS
V_CPU_IO V_CPU_IO V_CPU_IO
VCCSATAPLL VCCSATAPLL
VCCUSBPLL
VCCRTC
Page 26
5
4
3
2
1
TRACE=20mil
+2.5V_LAN
R388 0_0805_5%
PCI_AD0 PCI_AD1
D D
C C
PCI_AD[0..31]23,27,29,30
IDSEL:PCI_AD17
B B
CLK_PCI_LAN
A A
+3V
PCI_AD[0..31]
PCI_C/BE#023,27,29,30 PCI_C/BE#123,27,29,30 PCI_C/BE#223,27,29,30 PCI_C/BE#323,27,29,30
PCI_AD17 LAN_IDSEL
PCI_PAR23,27,29,30
PCI_FRAME#23,27,29,30
PCI_IRDY#23,27,29,30
PCI_TRDY#23,27,29,30
PCI_DEVSEL#23,27,29,30
PCI_STOP#23,27,29,30
PCI_PERR#23,27,29,30 PCI_SERR#23,27,29,30
PCI_REQ#323
PCI_GNT#323
PCI_PIRQB#23,27
LAN_PME#27,29,30,39
PCIRST#10,23,27,29,30,36,39
CLK_PCI_LAN15
PM_CLKRUN#24,27,29,30,36,39
12
R393 @10_0402_5%
12
C540 @10P_0402_50V8K
PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_C/BE#0 PCI_C/BE#1 PCI_C/BE#2 PCI_C/BE#3
1 2
R395 100_0402_5%
CLK_PCI_LAN
+3V
U37
47
AD0
46
AD1
45
AD2
43
AD3
42
AD4
41
AD5
40
AD6
39
AD7
36
AD8
35
AD9
34
AD10
33
AD11
32
AD12
30
AD13
29
AD14
28
AD15
15
AD16
14
AD17
13
AD18
12
AD19
11
AD20
10
AD21
9
AD22
8
AD23
96
AD24
93
AD25
92
AD26
91
AD27
89
AD28
87
AD29
86
AD30
85
AD31
38
C/BE#0
27 17 84
98 24
18 19 20 21 23
25 26
83 82
80 79 57
81 97 50
6 22 37 49 90 95
PCI I/F
C/BE#1 C/BE#2 C/BE#3
IDSEL PAR
FRAME# IRDY# TRDY# DEVSEL# STOP#
PERR# SERR#
REQ# GNT#
INTA# INTB# PME#
RST# PCICLK CLKRUN#
VDD VDD VDD
Power
VDD VDD VDD
RTL8101L_LQFP100
AC-Link
ROMCS/OEB
0.1U_0402_16V4Z
+2.5V_DLAN
48
VDD25
94
VDD25
AVDD25
Power
EEDO
RXIN+
LAN I/F
LWAKE
ISOLATE#
RTSET
VCTRL
AC_RST# AC_SYNC
AC_DOUT
AC_DIN
AC_BCK
GPIO0 GPIO1
DGND1 DGND2 DGND3 DGND4 DGND5 AGND1 AGND2 AGND3
AVDD AVDD AVDD
EEDI EESK EECS
LED0 LED1 LED2
TXD+
TXD-
RXIN-
RTT3
X1
X2
NC
58 59 70 75
52 53 54 55
78 77 76
72 71
68 67
61
60 64 74 65 63 56 1
3 4 5 7
100 99
51 69
2 16 31 44 88 62 66 73
+2.5V_LAN +3V_LAN_VDD1 +3V_LAN_VDD2 +3V_LAN_VDD3
LAN_EEDO LAN_EEDI LAN_EECLK LAN_EECS
ACTIVITY# LINK10_100#
LAN_TD+ LAN_TD-
LAN_RD+ LAN_RD-
LAN_X1
LAN_X2
12
12
C519
C534
0.1U_0402_16V4Z
TRACE=20mil
1 2
R145 1K_0402_5%
1 2
R146 15K_0402_5%
1 2
R383 5.6K_0603_1%
LAN_X1 LAN_X2
12
C180 27P_0402_50V8J
22U_1206_16V4Z
4 3 2 1
1 2
R384
5.6K_0402_5%
2
Y1
25MHZ_20PF_6X25000017
JP30
RJ11
SANTA_130403-1
Place closed to RTL8101L pin58
C508
C509
1 2
1 2
0.1U_0402_16V4Z
TRACE=20mil TRACE=20mil
TRACE=20mil
U34
DO
GND
DI
NC
SK
NC
CS
VCC
AT93C46-10SI-2.7_SO8
+3V
+3VS
+3V
31
Q9
E
@2SB1197K_SOT23
47K
B
10K
C
reserve transistor for ver.C
12
C177 @22U_1206_10V4Z
12
1
NC
2
NC
3
NC
4
NC
0.1U_0402_16V4Z
5 6 7 8
12
C504
0.1U_0402_16V4Z
49.9_0603_1%
+2.5V_LAN
C179 27P_0402_50V8J
+3V
0.1U_0402_16V4Z
12
C507
0.1U_0402_16V4Z
12
C506
Closed to PULSE H0013
12
12
R324
R325
49.9_0603_1%
12
C484
0.1U_0402_16V4Z
+3V
ACTIVITY#
3 1
+3V
LINK10_100#
Termination plane should be copled to chassis ground
12
C505
Closed to RT8101L
R326
49.9_0603_1%
E
3 1
47K
B
E
C
47K
B
10K
2
RTL8101L has internal +2.5V generator at pin58
+2.5V_LAN
1 2
L25 LQG21N4R7K10_0805
TRACE=30mil
12
12
R327
49.9_0603_1%
12
C485
0.1U_0402_16V4Z
Q38 DTA114YKA_SOT23
C
10K
2
Q36 DTA114YKA_SOT23
1 2
R314 300_0402_5%
LAN_TD+ LAN_TD-
1 2
R331 300_0402_5%
RJ45_RX-
RJ45_RX+ RJ45_TX­RJ45_TX+
RJ45_PR
LAN Realtek RT8101L
+3V
Layout Note H0013 pls close to conn.
LAN_RD+ LAN_RD-
12
R15
75_0402_5%
C476
0.1U_0402_16V4Z
12
U28
1
RD+
RX+
2
RD-
RX-
3
CT
4
NC
5
NC
6
CT
7 10
TD+ TX+
TX-TD-
Pulse H0013
(NS0013)
JP16
12
Amber LED+
11
Amber LED-
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
10
Green LED-
9
Green LED+
12
AMP 440470-4 RJ45 with LED
R14 75_0402_5%
1 2
C470 1000P_1206_2KV7K
CT NC NC CT
16 15 14 13 12 11
98
12
R313
75_0402_5%
SHLD4 SHLD3
SHLD2 SHLD1
@0.1U_0402_16V4Z
12
C449
RJ45_RX+ RJ45_RX-
RJ45_TX+ RJ45_TX-
12
R312 75_0402_5%
RJ45_PR
16 15
14 13
LANGND
C450
4.7U_0805_10V4Z
C527
0.1U_0402_16V4Z
C516
0.1U_0402_16V4Z
5
C550
0.1U_0402_16V4Z
C549
0.1U_0402_16V4Z
C536
0.1U_0402_16V4Z
4
C529
0.1U_0402_16V4Z
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Date: Sheet of
Compal Electronics, Inc.
LAN REALTEK RTL8101L
LA-1841
26 57Thursday, February 20, 2003
1
Page 27
5
PCI_AD[31..0]23,26,29,30
PCI_C/BE#[3..0]23,26,29,30
D D
C C
PCI_PAR23,26,29,30 PCI_PERR#23,26,29,30 PCI_SERR#23,26,29,30
PCI_FRAME#23,26,29,30 PCI_IRDY#23,26,29,30 PCI_TRDY#23,26,29,30 PCI_STOP#23,26,29,30 PCI_DEVSEL#23,26,29,30 PCI_REQ#223 PCI_GNT#223 PM_CLKRUN#24,26,29,30,36,39 PCIRST#10,23,26,29,30,36,39
PCI_AD21
R403 100_0402_5%
R407
@100_0402_5%
R406
10K_0402_5%
B B
R405 100_0402_5% R404 100_0402_5%
SERIRQ23,36,39 PCI_PIRQA#16,23,30 PCI_PIRQB#23,26 PCI_PIRQC#23,29 PCI_PIRQD#23,29 PCM_PME#26,29,30,39
CLK_PCI_PCM15 SUSCLK24 PCM_SUSP#39
R410 100_0402_5%
PCI_AD[31..0]
PCI_C/BE#[3..0]
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_C/BE#0 PCI_C/BE#1 PCI_C/BE#2 PCI_C/BE#3
PCI_PAR PCI_PERR# PCI_SERR#
PCI_FRAME# PCI_IRDY# PCI_TRDY# PCI_STOP# PCI_DEVSEL# PCI_REQ#2 PCI_GNT#2 PM_CLKRUN# PCIRST#
IDSELSM IDSELSDPCI_AD22 IDSELVIPCI_AD20 IDSELFL
IRQ_SERIRQ PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# PCM_PME#
CLK_PCI_PCM SUSCLK
PCIRST# PCM_FCMODE
+3V
CLK_PCI_PCM
R445 33_0402_5%
C588 10P_0402_50V8K
A A
4
U5A
K17
AD0
K18
AD1
K19
AD2
L17
AD3
L18
AD4
L19
AD5
L20
AD6
M17
AD7
M18
AD8
M19
AD9
M20
AD10
N17
AD11
N18
AD12
N19
AD13
N20
AD14
P17
AD15
P18
AD16
P19
AD17
P20
AD18
P16
AD19
R17
AD20
R18
AD21
R19
AD22
R20
AD23
T17
AD24
T18
AD25
T19
AD26
T20
AD27
U17
AD28
U18
AD29
U19
AD30
U20
AD31
V20
C/BE#0
V19
C/BE#1
V18
C/BE#2
V17
C/BE#3
Y14
PAR
V16
PERR#
U16
SERR#
W18
FRAME#
W17
IRDY#
Y18
TRDY#
Y17
STOP#
W16
DEVSEL#
Y16
REQ#
Y15
GNT#
W19
CLKRUN#
K20
PCIRST#
N16
IDSELSM
M16
IDSELSD
L16
IDSELVI
K16
IDSELFL
T14
IRQDT#
W15
INTA#
V14
INTB#
V15
INTC#
U15
INTD#
U12
PME#
PCICLK
W3
CLK32
Y11
PCLR#
Y6
SUSPEND#
U13
FCMODE
P6
VCC
P15
VCC
R5
VCC
R6
VCC
R7
VCC
R15
VCC
R16
VCC
VCC
T15
VCC
L10
GND
L11
GND
L12
GND
M9
GND
M10
GND
M11
GND
M12
GND
TC6385XB_PBGA328
SD Interface SmartMedia Interface
PCI Interface
Other Pins
System
Interface
GPIO Interface
Power Supply
SDCD0 SDCD1 SDCD2 SDCD3
SDCMD
SDCLK SDCD#
SDWP
SDLED
SDPWR
SMD0 SMD1 SMD2 SMD3 SMD4 SMD5 SMD6 SMD7
SMCLE SMALE SMCE#
SMWE#
SMRE#
SMWP#
SMRB# SMCD# SMLVD
SMWPD#
SMEJSW#
SMLED#
SMLOCK#
SMEJCT#
SMVC3EN
RSV0 RSV1 RSV2 RSV3 RSV4 RSV5 RSV6 RSV7 RSV8
RSV9 RSV10 RSV11 RSV12 RSV13 RSV14 RSV15 RSV16 RSV17 RSV18 RSV19 RSV20
RSV#0 RSV#1 RSV#2 RSV#3 RSV#4 RSV#5 RSV#6 RSV#7 RSV#8VCC
GPO0 GPO1 GPO2 GPO3 GPO4 GPO5 GPO6 GPO7 GPO8 GPO9GND
GND GND GND GND GND GND
R2 T2 R3 T3
U1 R4
R1 M1
N4 N5 P4 N1 N2 P2 N3
M3 M2 L1 L3 L2 K3
M4 L5 L4 K4 K5
M5 K2 K1
+3V
P3 V12
W12 Y12 W11 U6 Y4 U9 U10 V9 U4 U5 W4 W2 V2 U3 U2 V6 P5 V1 V5 V4
V11 Y5 V8
R441 100K_0402_5%
V7 U7 U8
R436 100K_0402_5%
U11 Y3 W7H6
V10 Y10 T10 T9 W9 Y9
R419 100K_0402_5%
R423 100K_0402_5%
W8 Y8
R434 100K_0402_5%
Y7
R435 100K_0402_5%
W6L9 T5
T16 W1 W20 Y2 Y19
SDC_D0 SDC_D1 SDC_D2 SDC_D3
SDCMD SDCLK
SDCD# SDWP# SDLED
SDPWR SMD0
SMD1 SMD2 SMD3 SMD4 SMD5 SMD6 SMD7
3
SDLED 43
+3V
+3V
C577
0.1U_0402_10V6K
C586
0.1U_0402_10V6K
+3V
SDPWR
+3V
R397 10K_0402_5%
+SD3_VCC
2
1 2
SDWP#
SDC_D1 SDC_D0
SDCLK
SDCMD SDC_D3
SDC_D2
C556
0.1U_0402_10V6K
U41
34
FLG#VIN
5
VOUT
CE GND
RT9702_SOT23-5
11 10
C584
0.1U_0402_10V6K
JP2
Wr_Pt Wr_Pt_Vss
8
SD4
7
SD3
6
Vss2
5
SDCLK
4
Vdd
3
Vss1
2
SD2
1
SD1
9
SD5
MMC_DET#
SD_SOCKET
C574
0.1U_0402_10V6K
C554
4.7U_0805_10V4Z
12
VSS
13
SMD3 SMD2 SMD1 SMD7
SMD6 SMD4 SMD5 SMD0
SDCMD SDC_D1 SDC_D0 SDC_D2
R401 22K_0603_5%
+3VS
12
R191 10K_0402_5%
SDCD#
+SD3_VCC
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1
C589
0.1U_0402_10V6K
C561
0.1U_0402_10V6K
RP111
+3V
100K_8P4R_1206_5% RP53
+3V
100K_8P4R_1206_5%
RP54
+SD3_VCC
100K_8P4R_1206_5%
Compal Electronics, Inc.
Title
PROPRIETARY NOTE
5
4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
CARDBUS & SD CONN (1/2)
Size Document Number Rev
LA-1841 0.1
B
Date: Sheet of
27 57Thursday, February 20, 2003
1
Page 28
5
S2_D0 S2_D1 S2_D2 S2_D3 S2_D4 S2_D5 S2_D6 S2_D7 S2_D8 S2_D9
1 2
S2_D10 S2_D11 S2_D12 S2_D13 S2_D14 S2_D15
S2_A0 S2_A1 S2_A2 S2_A3 S2_A4 S2_A5 S2_A6 S2_A7 S2_A8 S2_A9 S2_A10 S2_A11 S2_A12 S2_A13 S2_A14 S2_A15 R_S2_A16 S2_A17 S2_A18 S2_A19 S2_A20 S2_A21 S2_A22 S2_A23 S2_A24 S2_A25
S2_BVD1 S2_BVD2 S2_CD1# S2_CD2# S2_RDY# S2_WAIT# S2_WP S2_INPACK#
S2_CE1# S2_CE2# S2_WE# S2_IORD# S2_IOWR# S2_OE# S2_VS1 S2_VS2 S2_REG# S2_RST
BVCC3_EN BVCC5_EN
BEN0
D D
S2_A16 S1_A16
R402 33_0402_5%
C C
B B
A A
U5B
F17
SLTB30/D0/CAD27
F19
SLTB31/D1/CAD29
G16
SLTB32/D2/RESERVED
E10
SLTB2/D3/CAD0
C10
SLTB3/D4/CAD1
E11
SLTB4/D5/CAD3
C11
SLTB5/D6/CAD5
A11
SLTB6/D7/CAD7
F18
SLTB64/D8/CAD28
F20
SLTB65/D9/CAD30
G18
SLTB66/D10/CAD31
D10
SLTB37/D11/CAD2
B10
SLTB38/D12/CAD4
D11
SLTB39/D13/CAD6
B11
SLTBA40/D14/RESERVED
E12
SLTB41/D15/CAD8
E19
SLTB29/A0/CAD26
D20
SLTB28/A1/CAD25
D18
SLTB27/A2/CAD24
C20
SLTB26/A3/CAD23
C18
SLTB25/A4/CAD22
A18
SLTB24/A5/CAD21
B18
SLTB23/A6/CAD20
B17
SLTB22/A7/CAD18
E14
SLTB12/A8/CCBE#1
B13
SLTB11/A9/CAD14
B12
SLTB8/A10/CAD9
D13
SLTB10/A11/CAD12
A16
SLTB21/A12/CCBE#2
C14
SLTB13/A13/CPAR
A14
SLTB14/A14/CPERR#
C16
SLTB20/A15/CIRDY#
E17
SLTB19/A16/CCLK
A13
SLTB46/A17/CAD16
D14
SLTB47/A18/RESERVED
B14
SLTB48/A19/CBLOCK#
D15
SLTB49/A20/CSTOP#
B15
SLTB50/A21/CDEVSEL#
D16
SLTB53/A22/CTRDY#
B16
SLTB54/A23/CFRAME#
C17
SLTB55/A24/CAD17
A17
SLTB56/A25/CAD19
E20
SLTB63/BVD1/CSTSCHG
E18
SLTB62/BVD2/CAUDIO
G19
SLTB36/CD#1/CCD#1
H20
SLTB67/CD#2/CCD#2
A15
SLTB16/BSY#/CINT#
C19
SLTB59/WAIT#/CSERR#
G20
SLTB33/WP#/CCLKRUN#
D17
SLTB60/INPACK#/CREQ#
D12
SLTB7/CE#1/CCBE#0
C12
SLTB42/CE#2/CAD10
C15
SLTB15/WE#/CGNT#
E13
SLTB44/IORD#/CAD13
C13
SLTB45/IOWR#/CAD15
A12
SLTB9/OE#/CAD11
H18
SLTB43/VS1/CVS1
H19
SLTB57/VS2/CVS2
D19
SLTB61/REG#/CCBE#3
B19
SLTB58/RESET/CRST#
J18
VC3ENB
J19
VC5ENB
J16
VPEN0B
J17
VPEN1B
E15
VCCB
F14
VCCB
F15
VCCB
F16
VCCB
G15
VCCB
A19
GND
B20
GND
E16
GND
J11
GND
J12
GND
K11
GND
K12
GND
TSTI0
TSTI1
T11
TSTI2
T12
TSTI3
W14 W13
Y13
Test Pins
TSTO1 TSTO2 TSTO3
TC6385XB_PBGA328
SLTA30/D0/CAD27 SLTA31/D1/CAD29
SLTA32/D2/RESERVED
SLTA2/D3/CAD0 SLTA3/D4/CAD1 SLTA4/D5/CAD3 SLTA5/D6/CAD5
SLTA6/D7/CAD7 SLTA64/D8/CAD28 SLTA65/D9/CAD30
SLTA66/D10/CAD31
SLTA37/D11/CAD2 SLTA38/D12/CAD4 SLTA39/D13/CAD6
SLTA40/D14/RESERVED
SLTA41/D15/CAD8 SLTA29/A0/CAD26
SLTA28/A1/CAD25 SLTA27/A2/CAD24 SLTA26/A3/CAD23 SLTA25/A4/CAD22 SLTA24/A5/CAD21 SLTA23/A6/CAD20 SLTA22/A7/CAD18
SLTA12/A8/CCBE#1
SLTA11/A9/CAD14
SLTA8/A10/CAD9
SLTA10/A11/CAD12
SLTA21/A12/CCBE#2
SLTA13/A13/CPAR
SLTA14/A14/CPERR#
SLTA20/A15/CIRDY#
SLTA19/A16/CCLK
SLTA46/A17/CAD16
SLTA47/A18/RESERVED
SLTA48/A19/CBLOCK#
SLTA49/A20/CSTOP#
SLTA50/A21/CDEVSEL#
SLTA53/A22/CTRDY#
SLTA54/A23/CFRAME#
SLTA55/A24/CAD17 SLTA56/A25/CAD19
SLTA63/BVD1/CSTSCHG
SLTA62/BVD2/CAUDIO
SLTA36/CD#1/CCD#1 SLTA67/CD#2/CCD#2
SLTA16/BSY#/CINT#
SLTA59/WAIT#/CSERR#
SLTA33/WP#/CCLKRUN#
SLTA60/INPACK#/CREQ#
SLTA7/CE#1/CCBE#0 SLTA42/CE#2/CAD10
SLTA15/WE#/CGNT#
SLTA44/IORD#/CAD13
SLTA45/IOWR#/CAD15
SLTA9/OE#/CAD11
SLTA43/VS1/CVS1 SLTA57/VS2/CVS2
SLTA61/REG#/CCBE#3
SLTA58/RESET/CRST#
VC3ENA VC5ENA VPEN0A VPEN1A
ZVAENZVBEN
Slot ASlot B
System Interface
AUDIO
ALARM
EXSMI#
NC Pins
VCCA VCCA VCCA VCCA VCCA
GND GND GND GND GND GND GND
NC0 NC1 NC2 NC3
A8 D9 B9 J3 H5 H2 G5 G3 E9 C9 A9 J2 H3 H1 G4 G2
C8 E8 B7 D7 A6 C6 D6 B5 D4 E2 F3 E4 A4 D2 C4 A3 D5 E1 D3 D1 C3 C1 B2 B4 C5 A5
B8 D8 J1 H4 B3 E7 A10 C7
G1 F4 C2 F1 E3 F2 J4 J5 A7 B6
H17 G17 J20 H16
U14T13 E6
A2 B1 E5 J9 J10 K9 K10
W5 V3 W10
A1 A20 Y1 Y20
4
S1_D0 S1_D1 S1_D2 S1_D3 S1_D4 S1_D5 S1_D6 S1_D7 S1_D8 S1_D9 S1_D10 S1_D11 S1_D12 S1_D13 S1_D14 S1_D15
S1_A0 S1_A1 S1_A2 S1_A3 S1_A4 S1_A5 S1_A6 S1_A7 S1_A8 S1_A9 S1_A10 S1_A11 S1_A12 S1_A13 S1_A14 S1_A15 R_S1_A16 S1_A17 S1_A18 S1_A19 S1_A20 S1_A21 S1_A22 S1_A23 S1_A24 S1_A25
S1_BVD1 S1_BVD2 S1_CD1# S1_CD2#
S1_RDY#
S1_WAIT#
S1_WP
S1_INPACK#
S1_CE1# S1_CE2#
S1_WE#
S1_IORD#
S1_IOWR#
S1_OE# S1_VS1 S1_VS2
S1_REG#
S1_RST
AVCC3_EN AVCC5_EN
AEN0 AEN1BEN1
+3VALW +5VALW
+12VALW
+3VALW
+5VALW
+12VALW
1 2
R442 33_0402_5%
+5VALW
C545
0.1U_0402_10V6K
+S1_VCC +S2_VCC
C551 1U_0805_25V4Z
This area close to MIC2563A-0BSM
+S1_VCC+S2_VCC
PCM_SPK# 33
3
U38
AVCC3_EN AVCC5_EN
AEN0 AEN1
BVCC3_EN BVCC5_EN
BEN0 BEN1
+3VALW
C526
0.1U_0402_10V6K
C525
0.1U_0402_10V6K
27
AVCC3IN
1
AVCC5IN
3
AVCC5IN
23
AVPPIN
6
AVCC3_EN
5
AVCC5_EN
7
AEN0
8
AEN1
15 16
BVCC5IN BVCCOUT
17
BVCC5IN
9
BVPPIN
20
BVCC3_EN
19
BVCC5_EN
21
BEN0
22
BEN1
MIC2563A-0BSM_SSOP28
C544
0.1U_0402_10V6K
C543
0.1U_0402_10V6K
C521 1U_0805_25V4Z
+S1_VCC
C576
0.1U_0402_10V6K
+S2_VCC
C557
0.1U_0402_10V6K
Slot A Power Supply
Slot B Power Supply
AVCCOUT AVCCOUT AVCCOUT
AVPPOUT
BVCCOUTBVCC3IN BVCCOUT
BVPPOUT
+12VALW
C575
0.1U_0402_10V6K
C558
0.1U_0402_10V6K
This area close to TC6385XB
2 26 28
24
11
NC0
25
NC1
1213 14
10
4
GND
18
GND
C538
0.1U_0805_25V7K
C530
0.1U_0402_10V6K
C585
0.1U_0402_10V6K
C555
0.1U_0402_10V6K
2
AVCC5_EN
+S1_VCC
+S1_VPP
C542 1U_0805_25V4Z
+S2_VCC
+S2_VPP
C531 1U_0805_25V4Z
C537
0.1U_0805_25V7K
+S1_VPP
+S1_VCC +S2_VCC
AVCC3_EN AEN0 AEN1
C215 1000P_0402_50V7K
C247
0.1U_0805_25V7K
C253
0.1U_0402_10V6K
C301 1000P_0402_50V7K
RP19
1 8 2 7 3 6 4 5
47K_8P4R_1206_5%
S1_WP S1_CD2# S1_D2 S1_D10 S1_D1 S1_D9
S1_D0 S1_D8 S1_A0 S1_BVD1 S1_A1 S1_BVD2 S1_A2
S1_REG# S1_A3 S1_INPACK# S1_A4 S1_WAIT# S1_A5 S1_RST
S1_A6 S1_VS2 S1_A7 S1_A25 S1_A12 S1_A24 S1_A15
S1_A23 S1_A16 S1_A22
S1_A21 S1_RDY# S1_A20
S1_WE# S1_A19 S1_A14 S1_A18 S1_A13 S1_A17 S1_A8
S1_IOWR# S1_A9 S1_IORD# S1_A11 S1_VS1 S1_OE# S1_CE2#
S1_A10 S1_D15 S1_CE1# S1_D14 S1_D7 S1_D13 S1_D6
S1_D12 S1_D5 S1_D11
S1_D4 S1_CD1# S1_D3
CARDBUS
SOCKET
JP21
A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75
A1 A2 A3 A4 A5 A6 A7 A8 A9
a68 a34 a67 a33 a66 a32 a65 a31 GND a64 a30 a63 a29 a62 a28 a61 GND a27 a60 a26 a59 a25 a58 a24 GND a57 a23 a56 a22 a55 a21 a54 GND a20 a53 a19 a52/a18 none a51/a17 a16 a50 a15 GND a49 a14 a48 a13 a47 a12 a46 GND a11 a45 a10 a44 a9 a43 a8 GND a42 a7 a41 a6 a40 a5 a39 GND a4 a38 a3 a37 a2 a36 a1 a35
PCMC150PIN
b68 b34 b67 b33 b66 b32 b65 b31
GND
b64 b30 b63 b29 b62 b28 b61
GND
b27 b60 b26 b59 b25 b58 b24
GND
b57 b23 b56 b22 b55 b21 b54
GND
b20 b53 b19
b52/b18
none
b51/b17
b16 b50 b15
GND
b49 b14 b48 b13 b47 b12 b46
GND
b11 b45 b10 b44
b9
b43
b8
GND
b42
b7
b41
b6
b40
b5
b39
GND
b4
b38
b3
b37
b2
b36
b1
b35
B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75
BVCC5_EN BVCC3_EN BEN0 BEN1
1
RP14
1 8 2 7 3 6 4 5
47K_8P4R_1206_5%
S2_WP S2_CD2# S2_D2 S2_D10 S2_D1 S2_D9
S2_D0 S2_D8 S2_A0 S2_BVD1 S2_A1 S2_BVD2 S2_A2
S2_REG# S2_A3 S2_INPACK# S2_A4 S2_WAIT# S2_A5 S2_RST
S2_A6 S2_VS2 S2_A7 S2_A25 S2_A12 S2_A24 S2_A15
S2_A23 S2_A16 S2_A22
S2_A21 S2_RDY# S2_A20
S2_WE# S2_A19 S2_A14 S2_A18 S2_A13 S2_A17 S2_A8
S2_IOWR# S2_A9 S2_IORD# S2_A11 S2_VS1 S2_OE# S2_CE2#
S2_A10 S2_D15 S2_CE1# S2_D14 S2_D7 S2_D13 S2_D6
S2_D12 S2_D5 S2_D11 S2_D4 S2_CD1# S2_D3
C216 1000P_0402_50V7K
C248
0.1U_0805_25V7K
+S2_VPP
C254
0.1U_0402_10V6K
C302 1000P_0402_50V7K
Compal Electronics, Inc.
Title
PROPRIETARY NOTE
5
4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
CARDBUS & PCMCIA (2/2)
Size Document Number Rev
LA-1841 0.1
B
Date: Sheet of
28 57Thursday, February 20, 2003
1
Page 29
WL_OFF#39 KILL_SW#33,38,39
+3VS_MINIPCI
1 2
+3V
0_0603_5%
CLK_PCI_MINI
12
R449 @33_0402_5%
12
C593 @10P_0402_50V8K
L17
PCI_AD[0..31]
+3V
1 2
C346 0.1U_0402_16V4Z U10
5
TC7SH08FU_SSOP5
1 2
W=40mils
CLK_PCI_MINI15
PCI_REQ#123
PCI_C/BE#323,26,27,30
PCI_C/BE#223,26,27,30
PCI_IRDY#23,26,27,30
PM_CLKRUN#24,26,27,30,36,39
PCI_SERR#23,26,27,30
PCI_PERR#23,26,27,30 PCI_C/BE#123,26,27,30
3
PCI_PIRQD#23,27
+5VS_MINIPCI
+5VS
4
CLK_PCI_MINI
PCI_AD31 PCI_AD29
PCI_AD27 PCI_AD25
PCI_AD23 PCI_AD21
PCI_AD19 PCI_AD17
PCI_AD14 PCI_AD12
PCI_AD10 PCI_AD8
PCI_AD7 PCI_AD5 PCI_AD3 PCI_AD1
1 2
L31 0_0603_5%
+5VS_MINIPCI
LAN RESERVED
D9
RB751V_SOD323
PCI_PIRQD#
W=30mils
0603
MINI_PCI SOCKET
TIP RING
21
W=30mils W=20mils
JP27
1 2
1 2
KEY KEY
3 4
3 4
5 6
5 6
7 8
7 8
9 10
9 10
11 12
11 12
13 14
13 14
15 16
15 16
17 18
17 18
19 20
19 20
21 22
21 22
23 24
23 24
25 26
25 26
27 28
27 28
29 30
29 30
31 32
31 32
33 34
33 34
35 36
35 36
37 38
37 38
39 40
39 40
41 42
41 42
43 44
43 44
45 46
45 46
47 48
47 48
49 50
49 50
51 52
51 52
53 54
53 54
55 56
55 56
57 58
57 58
59 60
59 60
61 62
61 62
63 64
63 64
65 66
65 66
67 68
67 68
69 70
69 70
71 72
71 72
73 74
73 74
75 76
75 76
77 78
77 78
79 80
79 80
81 82
81 82
83 84
83 84
85 86
85 86
87 88
87 88
89 90
89 90
91 92
91 92
93 94
93 94
95 96
95 96
97 98
97 98
99 100
99 100
101 102
101 102
103 104
103 104
105 106
105 106
107 108
107 108
109 110
109 110
111 112
111 112
113 114
113 114
115 116
115 116
117 118
117 118
119 120
119 120
121 122
121 122
123 124
123 124
Mini-PCI SLOT
PCI_AD[0..31] 23,26,27,30
LAN RESERVED
W=30mils
PCI_PIRQC#
W=40mils
PCIRST#
PCI_AD30 PCI_AD28
PCI_AD26 PCI_AD24
MINI_IDSEL
R440
PCI_AD22 PCI_AD20
PCI_AD18 PCI_AD16
PCI_AD15 PCI_AD13 PCI_AD11
PCI_AD9
PCI_AD6 PCI_AD4 PCI_AD2 PCI_AD0
+3V
C289
0.1U_0402_16V4Z
1 2
+3V
1 2
+3VS_MINIPCI
L30
1 2
0_0603_5%
12
1 2
PCIRST#
+3V
C214 @1000P_0402_50V7K
C304
0.1U_0402_16V4Z
1 2
C233 @0.1U_0402_16V4Z
1 2
C252
0.1U_0402_16V4Z
C598 @0.1U_0402_16V4Z
1 2
C255
0.1U_0402_16V4Z
1 2
12
C600 @10U_1206_16V4Z
C243
0.1U_0402_16V4Z
1 2
Title
Size Document Number Rev
Date: Sheet of
PCIRST#10,23,26,27,30,36,39
+5VS_MINIPCI
PCI_PIRQC# 23,27
PCI_GNT#1 23 WLANPME# 26,27,30,39
PCI_AD18
100_0402_5%
PCI_PAR 23,26,27,30
PCI_FRAME# 23,26,27,30 PCI_TRDY# 23,26,27,30 PCI_STOP# 23,26,27,30
PCI_DEVSEL# 23,26,27,30
PCI_C/BE#0 23,26,27,30
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
W=40mils
IDSEL : PCI_AD18
+5VS_MINIPCI
C288
0.1U_0402_16V4Z
1 2
12
Compal Electronics, Inc.
MINI_PCI
B
LA-1841
+3VS_MINIPCI
C590 10U_1206_16V4Z
29 57Thursday, February 20, 2003
Page 30
A
B
C
D
E
+3VS
1 2
R526 4.7K_0402_5%
1 2
10K_0402_5%
+3VS
1 1
PCI_C/BE#323,26,27,29 PCI_C/BE#223,26,27,29 PCI_C/BE#123,26,27,29 PCI_C/BE#023,26,27,29
PCI_GNT#023 PCI_REQ#023
PCI_IRDY#23,26,27,29
PCI_TRDY#23,26,27,29
PCI_STOP#23,26,27,29
PCI_PERR#23,26,27,29
1394_PME#26,27,29,39
PCI_SERR#23,26,27,29
PCI_PAR23,26,27,29 PCIRST#10,23,26,27,29,36,39
PCI_AD[0..31]
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8
PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_C/BE#3 PCI_C/BE#2 PCI_C/BE#1 PCI_C/BE#0
CLK_PCI_1394
PCI_GNT#0 PCI_REQ#0 1394_IDSEL
PCI_FRAME#
PCI_IRDY# PCI_TRDY#
PCI_DEVSEL#
PCI_STOP# PCI_PERR# PCI_PIRQA# 1394_PME# PCI_SERR# PCI_PAR
PCIRST# TPA0+
R516
220_0402_5%
1 2
PCI_AD[0..31]23,26,27,29
2 2
IDSEL:PCI_AD16
PCI_AD16
R563 100_0402_5%
3 3
CLK_PCI_1394
4 4
1 2
1394_IDSEL
CLK_PCI_139415
PCI_FRAME#23,26,27,29
PCI_DEVSEL#23,26,27,29
PCI_PIRQA#16,23,27
PM_CLKRUN#24,26,27,29,36,39
12
R583 @10_0402_5%
C696 @10P_0402_50V8K
84 82 81 80 79 77 76 74 71 70 69 67 66 65 63 61 46 45 43 42 41 40 38 37 32 31 29 28 26 25 24 22 34 47 60 73 16 18 19 36 49 50 52 53 54 56 13 21 57 58 12 85
14 89
90
R523 220_0402_5%
1 2
U52
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 PCI_C/BE3 PCI_C/BE2 PCI_C/BE1 PCI_C/BE0 PCI_CLK PCI_GNT PCI_REQ PCI_IDSEL PCI_FRAME PCI_IRDY PCI_TRDY PCI_DEVSEL PCI_STOP PCI_PERR PCI_INTA/CINT PCI_PME/CSTSCHG PCI_SERR PCI_PAR PCI_CLKRUN PCI_RST
G_RST GPIO3
GPIO2
PLLGND1
89109
2035486278
VDDP
VDDP
VDDP
TSB43AB21 /(TSB43AB22)
PCI BUS INTERFACE
REG_EN
AGND
AGND
AGND
AGND
AGND
AGND
AGND
DGND
110
111
117
126
127
1281723303344556468758393103
87
VDDP
VDDP
CYCLEIN
BIAS CURRENT
OSCILLATOR
FILTER
EEPROM 2 WIRE BUS
POWER CLASS
PHY PORT 1
DGND
REG18
DGND
DGND
DGND
DGND
DGND
C695
0.1U_0402_16V4Z
R527 R524 4.7K_0402_5% R267 R269 4.7K_0402_5%
869610
11
CNA
TEST17
TEST16
CYCLEOUT/CARDBUS
PLLVDD
NC/(TPBIAS1)
NC/(TPA1+)
NC/(TPA1-)
NC/(TPB1+)
NC/(TPB1-)
FILTER0 FILTER1
TPBIAS0
DGND
DGND
REG18
DGND
TSB43AB21_PQFP128
C668
0.1U_0402_16V4Z
1 2 1 2
15
DVDD
27
DVDD
39
DVDD
51
DVDD
59
DVDD
72
DVDD
88
DVDD
100
DVDD
7 1
AVDD
2
AVDD
107
AVDD
108
AVDD
120
AVDD
106
CPS
125 124 123 122 121
118
R0
119
R1
6
X0
5
X1
3 4 92
SDA
91
SCL
99
PC0
98
PC1
97
PC2
116 115
TPA0+
114
TPA0-
113
TPB0 +
112
TPB0 -
94
TEST9
95
TEST8
101
TEST3
102
TEST2
104
TEST1
105
TEST0
4.7K_0402_5%
12
1 2
R545 1K_0402_5%
R564
6.34K_0603_1%
C694
0.1U_0402_16V4Z
1 2
R525
1 2
R521 220_0402_5%
TPBIAS0 TPA0-
TPB0+ TPB0-
+3VS
1394_PLLVDD
1 2
220_0402_5%
+3VS
C407
C675
0.1U_0402_16V4Z
L18 BLM21A601SPT_0805
1 2
C404
4.7U_0805_10V4Z
R562
56.2_0603_1%
R557
56.2_0603_1%
C681 220P_0402_50V8K
C676
0.1U_0402_16V4Z
0.01U_0402_25V4Z
C702 22P_0402_50V8J
X7
24.576MHz_16P_3XG-24576-43E1
C700 22P_0402_50V8J
C683
0.1U_0402_16V4Z
+3VS
C403 1000P_0402_50V7K
+3VS
R561
56.2_0603_1%
R558
56.2_0603_1%
R556
5.11K_0603_1%
C685
0.1U_0402_16V4Z
C400 1000P_0402_50V7K
C684
0.33U_0603_16V4Z
C408
0.1U_0402_16V4Z
JP35
4
4
3
3
2
2
1
1
SUYIN_020204FR004S507ZL
C409
0.1U_0402_16V4Z
C396 1000P_0402_50V7K
C671
0.1U_0402_16V4Z
C670 1000P_0402_50V7K
C410
0.1U_0402_16V4Z
C672 1000P_0402_50V7K
Compal Electronics, Inc.
Title
PROPRIETARY NOTE
A
B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
1394 Interface
Size Document Number Rev
B
LA-1841
Date: Sheet of
30 57Thursday, February 20, 2003
E
Page 31
5
AC97 Cod ec
12
R624 6.8K_0402_5%
12
R621 6.8K_0402_5%
D D
C C
MD_SPK38
B B
A A
LINE_IN_L33
LINE_IN_R33
CDROM_L CDROM_R
C751 0.01U_0402_25V4Z
R635 10K_0402_5%
R637 10K_0402_5%
1 2
R281 0_0805_5%
1 2
R272 0_0805_5%
1 2
R277 0_0805_5%
R631 6.8K_0402_5% R625 6.8K_0402_5%
R630 20K_0402_5% R626 20K_0402_5%
12
12
DGND AGND
5
12
R623 6.8K_0402_5%
12
R622 6.8K_0402_5%
C737
0.1U_0402_16V4Z
0.1U_0402_16V4Z
12 12
12 12
ICH_AC_RST#24,38
ICH_AC_SYNC24,38
ICH_AC_SDOUT24,38
R627 @0_0402_5%
1 2
CD_L_R
CD_R_R
CD_GNA
MIC33
MONO_IN33
CD_AGND35
C741 1U_0603_10V6K C738 1U_0603_10V6K
+VDDA
C742 10U_1206_16V4Z
+AUD_VREF
R634
@0_0402_5%
C748
LINEIN_L LINEIN_R
C746 1U_0603_10V6K C744 1U_0603_10V6K C745 1U_0603_10V6K C743 1U_0603_10V6K
+AUD_VREF
C_MD_SPK
C750 1U_0603_10V6K
R633 100_0402_5%
EAPD33
R628 20K_0402_5%
12
R472 0_0402_5%
4
LINEIN_L LINEIN_R
L36
1 2
CHB2012U170_0805
1 2
14 15 16 17 23 24 18 20 19
C_MICMIC
21 22 13 12
12
11 10
5
45 46
47 48
4 7
CD_GNA
12
12
R629
6.8K_0402_5%
4
+AVDD_AC97
U58
25
38
AVDD1
AVDD2
AUX_L AUX_R VIDEO_L VIDEO_R LINE_IN_L LINE_IN_R CD_L CD_R CD_GND MIC1 MIC2 PHONE PC_BEEP
RESET# SYNC SDATA_OUT NC
XTLSEL EAPD SPDIFO DVSS1
DVSS2
ALC202_E_LQFP48
+VDDC
1
9
DVDD1
DVDD2
LINE_OUT_L LINE_OUT_R
MONO_OUT TRUE_LOUT_L TRUE_LOUT_R
BIT_CLK
SDATA_IN
XTL_IN
XTL_OUT
AFILT1 AFILT2
VREFOUT
VREF VRDA
VRAD
DCVOL
VAUX GPIO0 GPIO1
NC AVSS1 AVSS2
+VDDC
C747
0.1U_0402_16V4Z
LINEL
35
LINER
36 37 39 41
1 2
6
R632 22_0402_5%
1 2
8
R636 22_0402_5%
2
3 29 30 28
1 2
R617 0_0402_5%
27 32
31
1 2
33
R616 @0_0402_5%
34 43 44
40
AGND
26 42
AGNDDGND
3
+5VALW
C432
4.7U_0805_10V4Z
+3VS
C749 10U_1206_16V4Z
C731 1000P_0402_50V7K C732 1000P_0402_50V7K C728 4.7U_0805_10V4Z C727 4.7U_0805_10V4Z
1 2
C752 15P_0402_50V8J
1 2
R638
R280 @1M_0402_5%
C734 1000P_0402_50V7K C733 1000P_0402_50V7K
1 2
+AUD_VREF
0.1U_0402_16V4Z
3
PROPRIETARY NOTE
C434
0.1U_0402_16V4Z
EQ_LEFT EQ_RIGHT
@10K_0402_5%
X1
24.576MHz_16P_3XG-24576-43E1
1
C435 22P_0402_25V8K
2
C735
0.01U_0402_25V4Z C724 1U_0603_10V6K
C717
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
1
Adjustable Output
SUSP#34,39,40,41,50,51
EQ_LEFT 32,33 EQ_RIGHT 32,33
ICH_AC_BITCLK 24,38 ICH_AC_SDIN0 24
1 2
C723 1U_0603_10V6K
+AUD_VREF
U22
4
VIN
2 7 1 8
1
C436 22P_0402_25V8K
2
C736
0.1U_0402_16V4Z
SENSE or ADJ
DELAY ERROR CNOISE SD
SI9182DH-AD_MSOP8
INT_CD_L35
INT_CD_R35
+2.5VOP_REF
+2.5VOP_REF
C729
4.7U_0805_10V4Z
5
VOUT
6
3
GND
C709
1U_0603_10V6K
C690 1U_0603_10V6K
R601 10K_0402_5%
R581 10K_0402_5%
DM_ON34
C433
0.1U_0402_16V4Z
R_INT_CD_L
R_INT_CD_R
DM_ON#
R_INT_CD_L
12
12
DM_ON
+5VCD
14
+5VCD
14
DM_ON
+VDDA
R279 100K_0603_1%
1 2
R278 33K_0603_1%
1 2
+5VCD
POWER ON PATH
C693 0.1U_0402_16V4Z
14
1 2 7
U53A
13
74HCT4066
+5VCD
14 11 10
7
U53B
12
74HCT4066
DIRECT PLAY PATH
4 3 7
U53C 74HCT4066
5
8 9 7
U53D 74HCT4066
6
+5VCD
R579 100K_0402_5%
DM_ON#
13
D
Q61
2
2N7002_SOT23
G
S
CDROM_L
CDROM_R
EQ_LEFT
EQ_RIGHTR_INT_CD_R
DM_ON
+VDDA
C431
4.7U_0805_10V4Z
DIRECT CD
DM_ONHL SYSTEM ON
C726
4.7U_0805_10V4Z
2
Compal Electronics, Inc.
Title
AC97 Codec
Size Document Number Rev
B
LA-1841
Date: Sheet of
31 57Thursday, February 20, 2003
1
Page 32
5
+5VCD+5VCD
C423
4.7U_0805_10V4Z
C725
EQ_LEFT
0.018U_0603_16V7K
0.018U_0603_16V7K
+2.5VOP_REF
1 2
R613 19.6K_0603_1% C718
D D
C422
0.1U_0402_16V4Z
EQ_L_IN1#
EQ_L_IN1
12
R614
63.4K_0603_1%
411
2
PG
-
3
+
U56A
O
LMV824MT_TSSOP14
AUDIO LEFT CHANNEL
+2.5VOP_REF
4
BTQ00 EQ Circuit
EQ_L_OUT1
1
1 2
R607
5.62K_0603_1% C720 3300P_0402_50V7K
EQ_L_IN2 EQ_L_IN3
12
R618
100K_0603_1%
1 2
R612 4.32K_0603_1%
C721 0.056U_0402
+5VCD
411
U56B
6
PG
-
5
+
EQ_L_OUT2
7
O
LMV824MT_TSSOP14
+2.5VOP_REF
1 2
R598
2.87K_0603_1% C703 2700P_0805_50V7K
3
C704 1000P_0402_50V7K
10
12
R590 162K_0603_1%
+5VCD
411
9
PG
­+
2
C425
0.1U_0402_16V4Z
EQ_L_IN4
R589 162K_0603_1%
2 3
13 12
EQ_L_IN5
C701 1800P_0402_50V7K
1 2
R594
1.05K_0603_1%
U56C
EQ_L_OUT3 EQ_L_OUT4
8
OUT
LMV824MT_TSSOP14
C705
1200P_0603_50V7K
12
+2.5VOP_REF
+5VCD
411
U57A
PG
-
1
O
+
LMV824MT_TSSOP14
+5VCD
411
U56D
PG
­OUT
+
LMV824MT_TSSOP14
C730 100P_0402_50V8K
1 2
R619
2.26K_0603_1%
AMP_LEFT
14
1
AMP_LEFT 33
OUTPUT TO AMPLIFIER LEFT CHANNEL
C C
EQ_LEFT31,33
EQ_RIGHT31,33
+5VCD
C420
+5VCD
411
2
PG
-
3
+
U54A
O
LMV824MT_TSSOP14
R602
5.62K_0603_1% C712 3300P_0402_50V7K
C421
4.7U_0805_10V4Z
C719
0.018U_0603_16V7K
EQ_RIGHT
B B
C418
4.7U_0805_10V4Z
0.1U_0402_16V4Z
1 2
R603 19.6K_0603_1% C710
0.018U_0603_16V7K
+2.5VOP_REF
EQ_R_IN1#
EQ_R_IN1
12
R606
63.4K_0603_1%
AUDIO RIGHT CHANNEL
+2.5VOP_REF
A A
EQ_LEFT EQ_RIGHT
1
1 2
12
EQ_R_IN2
R615 100K_0603_1%
BY-PASS EQ CIRCUIT
12
R609 @0_0402_5%
12
R608 @0_0402_5%
EQ_R_OUT1
1 2
R600 4.32K_0603_1%
C713 0.056U_0402
+5VCD
6
-
5
+
AMP_LEFT AMP_RIGHT
C708
0.1U_0402_16V4Z
411
U54B
PG
EQ_R_OUT2
7
O
LMV824MT_TSSOP14
R595
100K_0603_1%
R596
100K_0603_1%
+2.5VOP_REF
+5VCD
12
12
+5VCD +5VCD
9
-
10
+
C688 1000P_0402_50V7K
1 2
R586
2.87K_0603_1% C689 2700P_0805_50V7K
12
R585 162K_0603_1%
411
U57C
PG
8
OUT
LMV824MT_TSSOP14
EQ_R_IN3
+5VCD
9
-
10
+
+2.5VOP_REF
411
U54C
PG
8
OUT
LMV824MT_TSSOP14
EQ_R_IN5
EQ_R_OUT3
411
13
PG
-
12
+
C706 1800P_0402_50V7K
1 2
R597
1.05K_0603_1% C707 1200P_0603_50V7K
+2.5VOP_REF
U57D
14
OUT
LMV824MT_TSSOP14
6 5
EQ_R_IN4
12
R584 162K_0603_1%
+5VCD
411
U57B
PG
­O
+
LMV824MT_TSSOP14
+5VCD
411
13
PG
­OUT
12
+
C722 100P_0402_50V8K
1 2
R620
2.26K_0603_1%
AMP_RIGHT
7
U54D
EQ_R_OUT4
14
LMV824MT_TSSOP14
AMP_RIGHT 33
OUTPUT TO AMPLIFIER RIGHT CHANNEL
Compal Electronics, Inc.
Title
PROPRIETARY NOTE
5
4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
HAREWARE EQ
Size Document Number Rev
B
LA-1841
Date: Sheet of
32 57Thursday, February 20, 2003
1
Page 33
A
4 4
AMP_LEFT32
AMP_RIGHT32
EQ_LEFT31,32
EQ_RIGHT31,32
3 3
C430 0.47U_0603_16V4Z C419 0.47U_0603_16V4Z
EQ_LEFT
C429 0.47U_0603_16V4Z
EQ_RIGHT
C414 0.47U_0603_16V4Z
1.2K_0603_0.5%
B
NBA_PLUG
R604 @100K_0402_5%
1 2
C755 1U_0603_10V6K C756 1U_0603_10V6K
1.2K_0603_0.5%
1 2
1 2
R649
R648
HIGH
PIN 6,20 ACTIVE
LOW P IN 5,23 ACTIVE
NBA_PLUG
VOL_AMP INTSPK_L1 INTSPK_R1
C424
0.1U_0402_16V4Z
W=40Mil
C
+5VCD
C711
0.1U_0402_16V4Z
U21
7
PVDD
18
PVDD
19
VDD
2
HP/LINE#
3
VOLUME
4
LOUT+
21
ROUT+
5
LLINEIN
23
RLINEIN
6
LHPIN
20
RHPIN
17
CLK
TPA0232PWP_TSSOP24
C416
0.047U_0402_16V4Z
C415
4.7U_0805_10V4Z
SHUTDOWN#
SE/BTL#
PC-BEEP
BYPASS
LOUT­ROUT-
LIN RIN
GND GND GND GND
22 15 14 11 9 16 10 8
1 12 13 24
1U_0603_10V6K
+5VCD
12
SHUTDOWN#
*
C428
13
D
S
NBA_PLUG
C417 0.1U_0402_16V4Z
INTSPK_L2 INTSPK_R2
C426
0.47U_0603_16V4Z
R591 100K_0402_5%
2
R605 0_0402_5%
G
Q62 2N7002_SOT23
C427
0.47U_0603_16V4Z
D
1 2
R592 100K_0402_5%
INTSPK_R1 INTSPK_R2
+5VCD
EAPD 31
JP9
1 2
MOLEX_53398-0290
E
Audio AMP
AUDIO Board Conn.
10
OE#
I O
U51C
+3V POWER
+3V
12
R593 100K_0402_5%
1 2
R599
8.2K_0402_5%
PCM_SPK#28
SPKR24
A
C714
0.22U_0603_16V4Z
BEEP#39
2 2
9 8
SN74LVC125APWLE_TSSOP14
1 1
+3V
C699
0.1U_0402_16V4Z
147
U55A
PG
21
OI
+3V POWER
SN74LVC14APWLE_TSSOP14
+3V
147
PG
43
OI
U55B
SN74LVC14APWLE_TSSOP14
+3V POWER
560_0402_5%
C715
1U_0603_10V6K
C587
560_0402_5%
1U_0603_10V6K
560_0402_5%
C716
1U_0603_10V6K
R610
1 2
R447
1 2
R611
1 2
R642
10K_0402_5%
B
+VDDA
12
12
1
C
2
B
E
3
12
2 1
PROPRIETARY NOTE
+5VCD
+AVDD_AC97
R640 10K_0402_5%
R641 10K_0402_5%
Q63 2SC2411K_SOT23
D35 RB751V_SOD323
C754 10U_1206_16V4Z
C753
1U_0603_10V6K
MONO_IN
R639
2.4K_0402_5%
1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
MONO_IN 31
D
+AUD_VREF
MIC31
LINE_IN_R31
LINE_IN_L31
KILL_SW#29,38,39
Title
Size Document Number Rev
B
Date: Sheet of
16 15
NBA_PLUG VOL_AMP
MIC LINE_IN_R
LINE_IN_L INTSPK_R1
INTSPK_L2 INTSPK_L1 KILL_SW#
14 13 12 11 10
9 8 7 6 5 4 3 2 1
Compal Electronics, Inc.
AMP & Audio Jack
LA-1841
16 15 14 13 12 11 10 9 8 7 6 5 4 3 2
1
JP10 ACES_85201-1605
33 57Thursday, February 20, 2003
E
Page 34
+5VOZ
CDD[0..15]35
CDD[0..15]
+5VOZ
12
C673
0.1U_0402_16V4Z
12
C662
0.1U_0402_16V4Z
12
C641
0.1U_0402_16V4Z
L35 CHB1608G301_0603
1 2 1 2
L34
12
CHB1608G301_0603
C642
0.1U_0402_16V4Z
+5VCD
8MHZ_16PF_7D08000014
OSC1 OSC2
12
C365 10U_1206_16V4Z1 2
+5VCD
X4
R510
1M_0402_5%
C651 10P_0402_50V8K
R498 10K_0402_5% D31
1N4148_SOT23
12
12
21
EC_SMB_DA25,39
EC_SMB_CK25,39
IDE_SDD[0..15]24,35
C659 10P_0402_50V8K
2N7002
+5VCD
CDD0 CDD1 CDD2 CDD3 CDD4 CDD5 CDD6 CDD7 CDD8
CDD9 CDD10 CDD11 CDD12 CDD13 CDD14 CDD15
CDA0
CDA1
CDA2
CCS0
CCS1
CDIOR#
CDIOW#
CIOCS16#
CIORDY
CHINTRQ CDMARQ
CHDMACK#
CRESET#
CDASPN
SSYNC
SBIT_CLK
SDATA_OUT
SDATA_IN
SACRSTN
PWR_CTL
ISCDROM
MODE0 MODE1
PAVMODE
CSN
INCN
UDN
U46 OZ168T-A1_TQFP100
CDD0
77
CDD1
79
CDD2
82
CDD3
84
CDD4
87
CDD5
91
CDD6
96
CDD7
98
CDD8
1
CDD9
3
CDD10
7
CDD11
10
CDD12
14
CDD13
17
CDD14
19
CDD15
21
CD_SBA0
69
CD_SBA1
71
CD_SBA2
67
CD_SCS1#
64
CD_SCS3#
62
CD_SIOR#
100
CD_SIOW#
5
CIOCS16#
73
CD_SIORDY
94
CD_IRQ
75
CD_DREQ
13
CD_DACK#
89
CD_RSTDRV#
23
CDASPN
60 47
52 54 49
R538
45
51
80 39
40
56 57
38 41
42 43
@10K_0402_5% R539 10K_0402_5%
1 2
R514
GPIO_1 GPIO_0
R532 @1K_0402_5%1 2
MODE1
R235 10K_0402_5%
12 12
@0_0402_5%
12
SUSP#
94458
VDD
VDD
GND
GND
GND
1633658592
VDD
GPIO[1]/VOL_UP GPIO[0]/VOL_DN
GND
GND
IDE_SDD0 IDE_SDD1 IDE_SDD2 IDE_SDD3 IDE_SDD4 IDE_SDD5 IDE_SDD6 IDE_SDD7 IDE_SDD8 IDE_SDD9 IDE_SDD10 IDE_SDD11 IDE_SDD12 IDE_SDD13 IDE_SDD14 IDE_SDD15
IDE_SDA024,35 CD_SBA0 35 IDE_SDA124,35 IDE_SDA224,35
IDE_SDCS1#24,35 IDE_SDCS3#24,35
IDE_SDIOR#24,35
IDE_SDIOW#24,35
IDE_SDIORDY24,35
IDE_IRQ1523,35
IDE_SDDREQ24,35
IDE_SDDACK#24,35
SIDE_RST#35
1 3
D
1 3
D
S
Q49
G
2
IDE_SDA0 IDE_SDA1 IDE_SDA2
IDE_SDCS1# IDE_SDCS3#
IDE_SDIOR# IDE_SDIOW#
IDE_IRQ15 IDE_SDDREQ IDE_SDDACK#
SIDE_RST#
DM_ON PLAYBTN# FRDBTN# FRDBTN# REVBTN# STOPBTN#
DM_ON
Q50 2N7002
S
G
2
12
12
R496
R497
100K_0402_5%
100K_0402_5%
OSC1 OSC2
76
HDD0
78
HDD1
81
HDD2
83
HDD3
86
HDD4
90
HDD5
95
HDD6
97
HDD7
2
HDD8
4
HDD9
8
HDD10
11
HDD11
15
HDD12
18
HDD13
20
HDD14
22
HDD15
68
HDA0
70
HDA1
66
HDA2
63
HCS0
61
HCS1
99
HDIOR#
6
HDIOW#
72
HIOCS16#
93
HIORDY
74
HINTRQ
12
HDMARQ
88
HDMACK#
24
HRESET#
59
HDASPN
48
HSYNC
53
HBIT_CLK
55
HDATA_OUT
50
HDATA_IN
46
HACRSTN
28
PAV_EN
36
PLAY/PAUSE
35
FFORWARD
34
REWIND
37
STOP/EJECT
29
PCSYSTEM_OFF
25
INTN
30
RESET#
26
SDATA
27
SCLK
31
OSCI
32
OSCO
CD_SBA1 35 CD_SBA2 35
CD_SCS1# 35 CD_SCS3# 35
CD_SIOR# 35 CD_SIOW# 35
CD_SIORDY 35
CD_IRQ 35 CD_DREQ 35 CD_DACK# 35
CD_RSTDRV# 35
+5VCD
ISCDROM
2
G
1 2
R518
+5VCD
12
R228 100K_0402_5%
DM_ON
13
D
Q14 2N7002
S
C606 10U_1206_16V4Z
1 2
+5VALW
0_0402_5%
+5VALW
C609 1U_0805_25V4Z
1 2
+5VALW
1 2
240K_0402_5%
R470
12
C611 1U_0805_25V4Z
SUSP#31,39,40,41,50,51 CD_PLAY 39
MEDIA_DETECT 39
DM_ON
DIRECT CD
DM_ONHL SYSTEM ON
DM_ON 31
+5VCD
U43
1 2 3 4 5
R469 10K_0402_5%
SUSP# CD_PLAY
2
Q46
@DTC124EK_SOT23
8
S
D
7
S
D
6
S
D
G D
SI4425DY-T1_SO8
12
13
22K
22K
REVBTN# PLAYBTN#
STOPBTN#
10K_8P4R_1206_5%
MODE1 CDASPN ISCDROM
10K_8P4R_1206_5%
GPIO_0
R244 10K_0402_5%12
GPIO_1
R237 10K_0402_5%12
CD_SIORDY CD_IRQ
CIOCS16#
CDD7 CD_DREQ
C608 10U_1206_16V4Z
1 2
13
22K
2
22K
Q44
DTC124EK_SOT23
RP83
18 27 36 45
RP84
18 27 36 45
1 2
R509 1K_0402_5%
1 2
R534 4.7K_0402_5%
1 2
R533 47K_0402_5%
R506 10K_0402_5% R495 5.6K_0402_5%
12
1 2
12
C604
0.1U_0402_16V4Z
+5VCD
+5VCD
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size Document Number Rev
B
Date: Sheet of
Compal Electronics, Inc.
OZ-168 CD_PLAY
LA-1841
34 57Thursday, February 20, 2003
Page 35
IDE_PDDREQ24 IDE_PDIOW#24 IDE_PDIOR#24 IDE_PDIORDY24 IDE_PDDACK#24 IDE_IRQ1423 IDE_PDA124 IDE_PDA024 IDE_PDCS1#24 PHDD_LED#39
+5VS
IDE_PDD[0..15]24
R259
1 2
IDE_PDD[0..15]
IDE_PDDREQ IDE_PDIOW# IDE_PDIOR#
IDE_IRQ14 IDE_PDA1
100K_0402_5%
HDD CONNECTOR
PIDE_RST# IDE_PDD7 IDE_PDD6 IDE_PDD9 IDE_PDD5 IDE_PDD4 IDE_PDD3 IDE_PDD2 IDE_PDD1 IDE_PDD0
+5VS
JP34
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44
OCTEK AFH-22DC
IDE_PDD8 IDE_PDD10
IDE_PDD11 IDE_PDD12 IDE_PDD13 IDE_PDD14 IDE_PDD15
PCSEL
1 2
R236 470_0402_5%
IDE_PDA2IDE_PDA0
+5VS
+5VS
C654 1000P_0402_50V7K
IDE_PDA2 24 IDE_PDCS3# 24
Placea caps. near HDD CONN.
C656 10U_1206_16V4Z
EXTID1 EXTID0 Module
0 0 1 1
EXTID3
EXTID2 0 0 1 1
C657 10U_1206_16V4Z
0 1 0
TV Tuner/No Module
1
0 1 0 1
TV Tuner/No Module
CDROM
FDD HDD
Module CDROM
FDD HDD
C655 1U_0805_25V4Z
C653
0.1U_0402_16V4Z
IDE,CD-ROM Module CONN.
+5VS
C645
0.1U_0402_16V4Z
U47
C652
5
1 2
3
+5VS
5
1 2
3
PIDE_RST#
4
TC7SH08FU_SSOP5
U48
SIDE_RST#IDE_PDCS1# IDE_PDCS3#
4
TC7SH08FU_SSOP5
SIDE_RST# 34
B_PCIRST#16,23
PIDERST#23
SIDERST#24
B_PCIRST#
0.1U_0402_16V4Z
B_PCIRST#
CDD[0..15]34
INT_CD_L31 CD_AGND31
CD_RSTDRV#34
CD_SIOW#34
CD_SIORDY34
CD_SCS1#34
DSKCHG#36
+5VS
RP138
1 8 2 7 3 6 4 5
1K_8P4R_1206_5%
CDD[0..15]
JP28
CD_AGND CDD7
CDD6 CDD5 CDD4 CDD3 CDD2 CDD1 CDD0
CD_SIOW# CD_SIORDY
CD_IRQ34 CD_SCS3# 34 CD_SBA134 CD_SBA034
RDATA#36 TRACK0#36
WDATA#36
STEP#36
MTR0#36 DRV0#36,39
CD_IRQ CD_SBA1 CD_SBA0 CD_SCS1# SHDD_LED# EXTCSEL1
12
R471 470_0402_5%
RDATA# WP#
WP#36
TRACK0# WDATA# STEP# MTR0# DSKCHG# DRV0#
+5VCD
C612 1000P_0402_50V7K
Place component's closely MODULE CONNECTOR.
MTR0# INDEX#
DRV0#
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60
SUYIN_100311MB060S106ZU
W=80mils
C610 10U_1206_16V4Z
INT_CD_RINT_CD_L CD_AGND CDD8CD_RSTDRV# CDD9 CDD10 CDD11 CDD12 CDD13 CDD14 CDD15 CD_DREQ CD_SIOR# CD_DACK# CD_SBA2 CD_SCS3# EXTID0 EXTID1
HDSEL# WGATE#
USBP7+ USBP7-
FDDIR# 3MODE#
C616 1U_0805_25V4Z
STEP# WDATA# FDDIR#DSKCHG#
+5VS
INDEX#
C613
0.1U_0402_16V4Z
RP139
6 7 8 9
10
1K_10P8R_1206_5%
Main Module Conn. (Master)
IDE_SDD[0..15]24,34
INT_CD_R 31
CD_DREQ 34 CD_SIOR# 34 CD_DACK# 34 CD_SBA2 34
EXTID0 39 EXTID1 39
HDSEL# 36 WGATE# 36
USBP7+ 24 USBP3- 24 USBP7- 24
FDDIR# 36 3MODE# 36
INDEX# 36
+5VCD
+5VS
1 2 13
D
Q45
5 4 3 2 1
WP# RDATA# WGATE#TRACK0# HDSEL#
+5VS
S
2N7002_SOT23
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
IDE_SDD[0..15]
IDE_SDIOW#24,34
IDE_SDIORDY24,34
IDE_SDA124,34 IDE_SDA024,34
IDE_SDCS1#24,34
R467 100K_0402_5%
EXTCSEL2
1 2
R468 470_0402_5%
G
EXTID0
2
2nd Module Conn. (Slave)
JP29
1 2
SIDE_RST# IDE_SDD7 IDE_SDD6 IDE_SDD5 IDE_SDD4 IDE_SDD3 IDE_SDD2 IDE_SDD1 IDE_SDD0
IDE_SDIOW# IDE_SIORDY
IDE_SDA1 IDE_SDA0 IDE_SDCS1#
SHDD_LED#
EXTCSEL2
3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60
SUYIN_100311MB060S106ZU
+5VS
W=80mils
C615 1000P_0402_50V7K
Place component's closely MODULE CONNECTOR.
C617 10U_1206_16V4Z
IDE_SDD8 IDE_SDD9 IDE_SDD10 IDE_SDD11 IDE_SDD12 IDE_SDD13 IDE_SDD14 IDE_SDD15 IDE_SDDREQ IDE_SDIOR# IDE_SDDACK# IDE_SDA2 IDE_SDCS3#IDE_IRQ15 EXTID2 EXTID3
USBP3+ USBP3-
C620 1U_0805_25V4Z
IDE_SDDREQ 24,34
IDE_SDIOR# 24,34 IDE_SDDACK# 24,34 IDE_SDA2 24,34 IDE_SDCS3# 24,34IDE_IRQ1523,34
EXTID2 39
EXTID3 39
USBP3+ 24
+5VS
C614
0.1U_0402_16V4Z
+5VCD
R464 100K_0402_5%
SHDD_LED#
1 2
EXTID0 EXTID1 EXTID2 EXTID3
SHDD_LED# 39
RP82
18 27 36
10K_8P4R_1206_5%
45
+3VALW
Compal Electronics, Inc.
Title
IDE/ FDD MODULE CONN.
Size Document Number Rev
B
LA-1841
Date: Sheet of
35 57Thursday, February 20, 2003
Page 36
A
B
C
D
E
SUPER I/O SMsC FDC47N227
1 1
LPC_AD[0..3]24,39
LPC_FRAME#24,39
LPC_DRQ#124
PCIRST#10,23,26,27,29,30,39
CLK_14M_SIO
R214 @10_0402_5%
2 2
1 2
12
C341 @15P_0402_50V8J
CLK_PCI_SIO
R208 @33_0402_5%
C330
1 2
1
@22P_0402_25V8K
SERIRQ23,27,39 PM_CLKRUN#24,26,27,29,30,39
CLK_PCI_SIO15
CLK_14M_SIO15
PID[0..3]22
BT_DET#38
+3VS
FIR_EN#37
+3VS
2
12
R194 10K_0402_5%
12
10K_0402_5%
R192
3 3
+3VS
12
C285
4.7U_0805_10V4Z
12
C315
0.1U_0402_16V4Z
LPC_AD[0..3] LPC_AD0
LPC_AD1 LPC_AD2 LPC_AD3
R195 10K_0402_5%12
+3VS
R212 10K_0402_5%12
PID[0..3]
1 2
R643 10K_0402_5%
1 2
R644 10K_0402_5%
12
C340
0.1U_0402_16V4Z
CLK_PCI_SIO CLK_14M_SIO
+3VS
12
PID0 PID1 PID2 PID3
12
C286
0.1U_0402_16V4Z
R209 10K_0402_5%
20 21 22 23
24 25
26 27
50 17 30 28 29
19 48
54 55 56 57 58 59
6 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
51 52 64
18 53
65 93
7 31 60 76
U8
LAD0 LAD1 LAD2 LAD3
LFRAME# LDRQ#
PCIRST# LPCPD#
GPIO12/IO_SMI# IO_PME# SIRQ CLKRUN# PCICLK
CLK14 GPIO10
GPIO15 GPIO16 GPIO17 GPIO20 GPIO21 GPIO22 GPIO24 GPIO30 GPIO31 GPIO32 GPIO33 GPIO34 GPIO35 GPIO36 GPIO37 GPIO40 GPIO41 GPIO42 GPIO43 GPIO44 GPIO45 GPIO46 GPIO47
GPIO13/IRQIN1 GPIO14/IRQIN2 GPIO23/FDC_PP
PD2/WRTPRT#
PD3/RDATA#
PD4/DSKCHG#
BUSY/MTR1#
SLCT/WGATE#
ERROR#/HDSEL#
AUTOFD#/DRVDEN0#
STROBE#/DS0# SLCTIN#/STEP#
IRMODE/IRRX3
VTR VCC
VCC VCC
VSS VSS VSS VSS
GPIO11/SYSOPT
LPC47N227 TQFP100 SUPER I/O
PD0/INDEX#
PD1/TRK0
PD5
PD6/MTR0#
PD7
PE/WDATA#
ACK#/DS1#
INIT#/DIR#
DTR2# CTS2# RTS2# DSR2#
TXD2 RXD2
DCD2#
RI2#
DTR1# CTS1# RTS1# DSR1#
TXD1 RXD1
DCD1#
RI1#
IRRX2 IRTX2
RDATA#
WDATA#
WGATE#
HDSEL#
DIR#
STEP#
DS0#
INDEX# DSKCHG# WRTPRT#
TRK0#
MTR0#
DRVDEN0 DRVDEN1
LPD[0..7]
LPD0
68
LPD1
69
LPD2
70
LPD3
71
LPD4
72
LPD5
73
LPD6
74
LPD7
75
LPTBUSY
79
LPTPE
78
LPTSLCT
77
LPTERR#
81
LPTACK#
80 66 82 83 67
100
CTS#2
99 98
DSR#2
97 96 95
DCD#2
94
RI#2
92
DTR#1
89
CTS#1
88
RTS#1
87
DSR#1
86
TXD1
85
RXD1
84
DCD#1
91
RI#1
90 63
61 62
16 10 11 12 8 9 5 13 4 15 14 3 1
2 49
Base I/O Address
0 = 02Eh
*
1 = 04Eh
R206 1K_0402_5%
R199 1K_0402_5%
IRRX
RDATA# WDATA# WGATE#
HDSEL#
FDDIR#
STEP#
DRV0#
INDEX#
DSKCHG#
WP#
TRACK0#
MTR0#
R213 R198 1K_0402_5%
LPTBUSY 38 LPTPE 38 LPTSLCT 38 LPTERR# 38 LPTACK# 38 INIT# 38 LPTAFD# 38 LPTSTB# 38 SLCTIN# 38
1 2
1 2
1 2
LPD[0..7] 38
IRMODE 37 IRRX 37 IRTXOUT 37
RDATA# 35 WDATA# 35 WGATE# 35 HDSEL# 35 FDDIR# 35 STEP# 35 DRV0# 35,39 INDEX# 35 DSKCHG# 35 WP# 35 TRACK0# 35 MTR0# 35 3MODE# 35
12
10K_0402_5%
+5VS
DSR#1 CTS#1 RI#1 DCD#1
4.7K_8P4R_1206_5%
IRRX
1 2
R193 1K_0402_5%
RP112
+3VS+3VS
CTS#2
18
DSR#2
27
DCD#2
36
RI#2
45
RP113
1 8 2 7 3 6 4 5
4.7K_8P4R_1206_5%
+5V
JP32
1
1
2
RXD1 TXD1 DSR#1 RTS#1 CTS#1 DTR#1 RI#1 DCD#1
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
@96212-1011S
4 4
Compal Electronics, Inc.
Title
PROPRIETARY NOTE
A
B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
SUPER I/O
Size Document Number Rev
B
LA-1841
Date: Sheet of
36 57Thursday, February 20, 2003
E
Page 37
C251 150U_D2_6.3VM
USB_EN#24
C350 150U_D2_6.3VM
+5V
1
12
+
C250
0.1U_0402_16V4Z
2
1 2
R182 @0_0402_5%
+5V
1
12
+
C348
0.1U_0402_16V4Z
2
USBEN#
USBEN#
1 2 3 4
R177 0_0402_5%
1 2
U4
GND
OC1#
IN
OUT1 OUT2
EN1#
OC2#
EN2#
TPS2042ADR_SO8
U12
1
GND
2 3 4
OC1#
IN
OUT1 OUT2
EN1#
OC2#
EN2#
TPS2042ADR_SO8
+USB_AS
8 7 6 5
8 7 6 5
+USB_CS
+USB_BS
+USB_DS
+3VALW
12
R173 100K_0402_5%
+3VALW
12
R243 100K_0402_5%
12
R174 100K_0402_5%
1 2
R175 47_0402_5%
1 2
R176 47_0402_5%
12
R242 100K_0402_5%
1 2
R240 47_0402_5%
1 2
R239 47_0402_5%
USB_OC0#
USB_OC2#
12
C230
0.1U_0402_16V4Z
USB_OC4#
USB_OC6#
12
C376
0.1U_0402_16V4Z
USB_OC0# 24
USB_OC2# 24
12
C231
0.1U_0402_16V4Z
USB_OC4# 24
USB_OC6# 24
12
C375
0.1U_0402_16V4Z
+USB_AS +USB_BS
1
+
C467 150U_D2_6.3VM
2
R44 0_0603_5%
1 2
USBP0+24
USBP4+24
1 2
R45 0_0603_5%
+USB_CS +USB_DS
1
+
C660 150U_D2_6.3VM
2
R247 0_0603_5%
1 2
1 2
R250 0_0603_5%
1
C11 470P_0402_50V7K
2
USB0+
1
C369 470P_0402_50V7K
2
USB4­USB4+
JP17
1 2 3 4
10 9
SUYIN_020122MR008S516ZU
(New)
1 2 3 4
10 9
SUYIN_020122MR008S516ZU
VCC D0­D0+ VSS
G2 G1
JP33
VCC D0­D0+ VSS
G2 G1
(New)
VCC
D1­D1+ VSS
VCC
D1­D1+ VSS
5 6 7 8
1112
G3G4
5 6 7 8
1112
G3G4
USB2-USB0­USB2+
USB6­USB6+
1
C3 470P_0402_50V7K
2
R46 0_0603_5%
R47 0_0603_5%
1
C370 470P_0402_50V7K
2
R252 0_0603_5%
R256 0_0603_5%
1 2 1 2
1 2 1 2
1
+
C465 150U_D2_6.3VM
2
1
+
C658 150U_D2_6.3VM
2
USBP2- 24USBP0-24 USBP2+ 24
USBP6- 24USBP4-24 USBP6+ 24
1
+
C81
4.7U_0805_6.3VM
2
1
C64 100P_0402_50V8J
2
+3VS
R80
47_1206_5%
1 2
12
C63
0.1U_0402_16V4Z
FIR_EN#36
+IR_VCC
+IR_GND
1 2
R645 10K_0402_5%
FIR_EN#
LOW FIR Poped HIGH FIR Un-Poped
FIR Module
12
R85 10K_0402_5%
IRRX
IRRX36
The component's most place cloely IRDA MODULE.
+3VS
1
C82 22U_1206_10V4Z
2
U2
2
IRED_C
4
RXD
6
VCC
8
GND
IR_VISHAY_TFDU6101E-TR4_8P
1
IRED_A
3
TXD
5
SD/MODE
7
MODE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+IR_ANODE IRTXOUT IRMODE
1 2
R99 @3.3_1206_5%
1 2
R87
3.3_1206_5%
IRTXOUT 36 IRMODE 36
+IR_ANODE
Compal Electronics, Inc.
Title
USB Conn.
Size Document Number Rev
B
LA-1841
Date: Sheet of
37 57Thursday, February 20, 2003
Page 38
BlueTooth Interface
MDC CONN.
JP19
1
MONO_OUT/PC_BEEP
3
GND
5
AUXA_RIGHT
7
AUXA_LEFT
9
CD_GND
11
R100 0_0402_5%
+3V +3VS
ICH_AC_SDOUT24,31
ICH_AC_RST#24,31
+5V_PRN
109876
12345
+5V_PRN
109876
12345
1 2
L22
1 2
RP87
2.7K_10P8R_1206_5%
LPTSLCTIN# LPTINIT# LPTERR# AFD#/3M#
RP3
2.7K_10P8R_1206_5%
FD3 FD2 FD1 FD0
+3VS_MDC
CHB1608B121_0603
LPTSLCT LPTPE LPTBUSY LPTACK#
+5V_PRN
FD4 FD5 FD6 FD7 LPTSLCTIN#
+5V_PRN
CD_RIGHT
13
CD_LEFT
15
GND
17
3.3Vaux
19
GND
21
3.3Vmain
23
AC97_SDATA_OUT
25
AC97_RESET#
27
GND
29
AC97_MSTRCLK
ACES_88023-3010
1
C98 1U_0805_25V4Z
2
INIT#36
SLCTIN#36
LPD0 FD0 LPD1 FD1 LPD2 FD2 LPD3 FD3
LPD7 FD7 LPD6 FD6 LPD5 FD5 LPD4 FD4
LPD[0..7]36
MONO_PHONE
Bluetooth Enable
AC97_SDATA_IN1 AC97_SDATA_IN0
+3VS_MDC
1
C80 1U_0805_25V4Z
2
1 2
R3
1 2
R2 33_0402_5%
RP2
1 8 2 7 3 6 4 5
68_8P4R_1206_5%
1 8 2 7 3 6 4 5
RP1
68_8P4R_1206_5%
AUDIO_PWDN
GND
+5V
USB Data+
USB Data-
PRIMARY DN
5Vd
GND
AC97_SYNC
GND
AC97_BITCLK
LPTINIT#
33_0402_5%
LPTSLCTIN#
LPD[0..7]
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
+5VS_MDC+3V
1
2
+5VS_MDC
1 2
R350 10K_0402_5%
1 2
R83 0_0402_5%
1 2
R78 22_0402_5%
C495 1U_0805_25V4Z
MD_SPK 31
1 2
L23 CHB1608B121_0603
+3VS
1 2
R79 22_0402_5%
LPTSTB#36
LPTAFD#36 LPTERR#36
LPTACK#36
LPTBUSY36
LPTPE36
LPTSLCT36
+5VS
+5VS
ICH_AC_SYNC 24,31
ICH_AC_SDIN1 24
ICH_AC_BITCLK 24,31
KILL_SW#29,33,39
2 1
RB420D_SOT23
LPTSTB# AFD#/3M#
FD0
R302 33_0402_5%
LPTERR# FD1 LPTINIT# FD2
FD3 FD4 FD5 FD6 FD7 LPTACK# LPTBUSY LPTPE LPTSLCT
C489
@0.1U_0402_16V4Z
BT_RST#39
+5V_PRN
D21
R303 33_0402_5%
1 2
1 2
BT_PWR39
+3VS
U30
5
1 2
@TC7SH08FU_SSOP5
1 2
R344 0_0402_5%
4
3
PARALLEL PORT
12
R304
2.2K_0402_5% C452
1 2
220P_0402_50V8K
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
JP14
21
9
LPTCN-25
22 10
(BTS88)
23 11 24 12 25 13
Module ID
Indication for polarity of reset Reset input High Active --> Low , Reset input Low Active --> Open
BT_RESET#
2
22K
22K
USBP5+24
USBP5-24
R72 100K_0402_5%
1 2
13
Q6
DTC124EK_SOT23
C27
0.1U_0402_16V4Z
BT_DET#36
BT_WAKE_UP39
BT_DETACH39
USBP5+
R338 0_0603_5% R333 0_0603_5%
FD3 LPTSLCTIN# FD2 LPTINIT#
LPTSLCT LPTPE LPTBUSY LPTACK#
FD1 LPTERR# FD0 AFD#/3M#
FD7 FD6 FD5 FD4
+3VS+5VS
C76
Q7 SI2301DS-T1_SOT23
1 3
C25 10U_1206_16V4Z
Module ID
Module_Detect
BT_RESET# BT_WAKE_UP
C477
CP11
18 27 36 45
CP9
18 27 36 45
CP1
CP10
18 27 36 45
0.1U_0402_16V4Z
+BT_VCC
USB5+ USB5-USBP5-
2
+BT_VCC
(MAX=200mA)
0.1U_0402_16V4Z
220P_1206_8P4C_50V8_V1
220P_1206_8P4C_50V8_V1
1 8 2 7 3 6 4 5
220P_1206_8P4C_50V8_V1
220P_1206_8P4C_50V8_V1
JP18
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
ACES_87153-2008
(Top Contact)
Bluetooth Connector
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size Document Number Rev
Date: Sheet of
Compal Electronics, Inc.
PARALLEL/MDC PORT
LA-1841
38 57Thursday, February 20, 2003
Page 39
5
0.1U_0402_16V4 Z
12
C674
0.1U_0402_16V4Z
+RTCVCC +51AVCC
12
D D
C666
0.1U_0402_16V4Z
+3VALW
C C
B B
+5VALW
A A
0.1U_0402_16V4 Z
12
12
C678
0.1U_0402_16V4Z
R494 100K_0402_5%
1 2
1 2
R478 100K_0402_5%
+3VALW
Analog Board ID definition, Please see page 3.
Ra
Rb
12
C669
C661
1 2
C639
0.1U_0402_16V4Z
ECAGND
EMAIL# INTERNET#
12
MODE# FRD# SELIO# FSEL#
EC_SMB_DA2
18 27
EC_SMB_CK2 EC_SMB_DA1
36 45
EC_SMB_CK1
R481 100K_0402_5%
R487 0_0402_5%
5
L33 FBM-L11-160808-800LMT_0603
BATT_TEMPECAGND
AD_BID0
12
C638
0.1U_0402_16V4Z
12
WLANPME#26,27,29,30 PCM_PME#26,27,29,30 1394_PME#26,27,29,30
LAN_PME#26,27,29,30
C649 0.01U_0402_25V4 Z
RP145
1 8 2 7 3 6 4 5
10K_1206_8P4R_5%
RP85
10K_1206_8P4R_5%
+3VALW
1 2
1 2
1000P_0402_50V7K
C643
1 2
+3VALW
+3VALW
1 2
+3VALW
CLK_PCI_LPC15
R535 10K_0402_5%
EC_PME#
C637 1000P_0402_50V7K
1 2
R548
@33_0402_5%
C682
@22P_0402_25V8 K
+3VS
+3VALW
12
1
2
MEDIA_DETECT34
PCM_SUSP#27
EC_RSMRST#24,45
CRY1
32.768KHz_12.5P_CM155
12
C664 10P_0402_50V8 K
EC_SWI#24
4
R552 0_0402_5%
SERIRQ23,27,36
LPC_FRAME#24,36
LPC_AD024,36 LPC_AD124,36 LPC_AD224,36 LPC_AD324,36
R549 4.7K_0402_5%
EC_SCI#24
GATEA2023
KBRST#23
KSI044 KSI144 KSI244 KSI344 KSI443
EXTID035 EXTID135 EXTID235
EXTID335 TP_CLK44 TP_DATA44
LID_SW#43
EC_SMI#24 S4_SATA42 WL_OFF#29
BT_RST#38
SYSON41,42,50 SUSP#31,34,40,41,50,51
VR_ON53
DRV0#35,36 ENBKL16,22 BKOFF#22
FSEL#40
R519
1 2
CRY2
20M_0603_5%
X5
12
4
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
EC_RST#
12
EC_SCI#
EC_GA20
EC_KBRST#
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7
KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15
EC_TINIT# EC_TCK EC_TDO EC_TDI EC_TMS
TP_CLK TP_DATA LID_SW#
EC_SMI#
SYSON SUSP# VR_ON
BKOFF# FSEL#
1 2 12
+51VDD
12
C677
0.1U_0402_16V4Z
15 14 13 10 18 19 22 23
31
71 72 73 74 77 78 79 80
49 50 51 52 53 56 57 58 59 60 61 64 65 66 67 68
105 106 107 108 109
110 111 114 115 116 117 118 119
158
CRY1
160
CRY2
62 63 69 70 75 76 143
148 149 155 156
27 28
173 174
47
R517 120K_0402_5%
C665 12P_0402_50V8J
163445
U50
VDD
7
SERIRQ
8
LDRQ#
9
LFRAME# LAD0 LAD1 LAD2 LAD3 LCLK RESET1# SMI# PWUREQ#
IOPD3/ECSCI#
5
GA20/IOPB5
6
KBRST/IOPB6
KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7
KBSOUT0 KBSOUT1 KBSOUT2 KBSOUT3 KBSOUT4 KBSOUT5 KBSOUT6 KBSOUT7 KBSOUT8 KBSOUT9 KBSOUT10 KBSOUT11 KBSOUT12 KBSOUT13 KBSOUT14 KBSOUT15
TINT# TCK TDO TDI TMS
PSCLK1/IOPF0 PSDAT1/IOPF1 PSCLK2/IOPF2 PSDAT2/IOPF3 PSCLK3/IOPF4 PSDAT3/IOPF5 PSCLK4/IOPF6 PSDAT4/IOPF7
32KX1/32KCLKIN 32KX2
IOPJ2/BST0 IOPJ3/BST1 IOPJ4/BST2 IOPJ5/PFS IOPJ6/PLI IOPJ7/BRKL_RSTO IOPK0/A8
IOPM0/D8 IOPM1/D9 IOPM2/D10 IOPM3/D11
3
IOPM4/D12
4
IOPM5/D13 IOPM6/D14 IOPM7/D15
SEL0# SEL1# CLK
VCC1
Host interface
Key matrix scan
JTAG debug port
PS2 interface
PORTJ-2
PORTM
GND1
GND2
GND3
173546
PROPRIETARY NOTE
+51AVCC+3VALW
123
136
95
157
166
VCC2
VCC3
VCC4
AVCC
VCC5
VCC6
AD Input
DA output
PWM or PORTA
PORTB
IOPB7/RING/PFAIL/RESET2
PORTC
PORTD-1
IOPD2/EXWINT24/RESET2
PORTE
IOPE6/LPCPD/EXWIN45
IOPE7/CLKRUN/EXWINT46
PORTH
PORTI
PORTJ-1
PORTD-2
PORTK
PORTL
AGND
GND4
GND5
GND6
GND7
NC1
96
122
159
167
137
122021858691929798
11
ECAGND
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
+RTCVCC
161
VBAT
AD0 AD1 AD2 AD3
IOPE0AD4 IOPE1/AD5 IOPE2/AD6 IOPE3/AD7
DP/AD8
DN/AD9
DA0 DA1 DA2 DA3
IOPA0/PWM0 IOPA1/PWM1 IOPA2/PWM2 IOPA3/PWM3 IOPA4/PWM4 IOPA5/PWM5 IOPA6/PWM6 IOPA7/PWM7
IOPB0/URXD
IOPB1/UTXD
IOPB2/USCLK
IOPB3/SCL1 IOPB4/SDA1
IOPC0 IOPC1/SCL2 IOPC2/SDA2
IOPC3/TA1
IOPC4/TB1/EXWINT22
IOPC5/TA2
IOPC6/TB2/EXWINT23
IOPC7/CLKOUT
IOPD0/RI1/EXWINT20 IOPD1/RI2/EXWINT21
IOPE4/SWIN
IOPE5/EXWINT40
IOPH0/A0/ENV0
IOPH1/A1/ENV1 IOPH2/A2/BADDR0 IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
IOPH6/A6 IOPH7/A7
IOPI0/D0 IOPI1/D1 IOPI2/D2 IOPI3/D3 IOPI4/D4 IOPI5/D5 IOPI6/D6 IOPI7/D7
IOPJ0/RD
IOPJ1/WR0
SELIO#
IOPD4 IOPD5 IOPD6 IOPD7
IOPK1/A9 IOPK2/A10 IOPK3/A11 IOPK4/A12
IOPK5/A13_BE0 IOPK6/A14_BE1
IOPK7/A15_CBRD
IOPL0/A16 IOPL1/A17 IOPL2/A18 IOPL3/A19
IOPL4/WR1#
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
1 2
3
KBA[0..19]40
ADB[0..7]40
MEDIA_DETECT
BATT_TEMP
81 82
BATT_OVP
83 84
ALI/MH#
87 88
EMAIL# MODE#
89 90
INTERNET# AD_BID0
93 94
99
DAC_BRIG EN_DFAN2#
100 101
IREF EN_DFAN1#
102
INVT_PWM
32 33
BEEP#
36 37
ACOFF
KILL_SW#
38 39
EC_ON
EC_LID_OUT#
40 43
BT_DETACH
153
EC_URXD
EC_UTXD
154 162
EC_USCLK
EC_SMB_CK1
163 164
EC_SMB_DA1
165
PBTN_OUT#
168 169
EC_SMB_CK2
EC_SMB_DA2
170 171
FAN_SPEED1
EC_PME#
172 175
EC_THRM#
FAN_SPEED2
176 1
26
ACIN
CD_PLAY
29 30
PM_SLP_S3#
2
PM_SLP_S5#
44 24
BT_WAKE_UP
25
KBA0
124 125
KBA1
KBA2
126 127
KBA3
KBA4
128 131
KBA5
KBA6
132 133
KBA7
138
ADB0
ADB1
139 140
ADB2
ADB3
141 144
ADB4
ADB5
145 146
ADB6
ADB7
147
FRD#
150 151
FWR#
152
SELIO#
41
NUM_LED#
42 54
CAPS_LED#
PADS_LED#
55
KBA8
142
KBA9
KBA10
135 134
KBA11
KBA12
130 129
KBA13
KBA14
121 120
KBA15
113
KBA16
KBA17
112 104
KBA18
KBA19
103 48
FSTCHG
NC10
PC87591L-VPCN01 A2_LQFP176
L32
FBM-L11-160808-800LMT_0603
KBA[0..19] ADB[0..7]
12
R553 100K_0402_5%
BATT_TEMPA 47 BATT_OVP 48 ALI/MH# 47
EMAIL# 43 MODE# 44 INTERNET# 43
DAC_BRIG 22 EN_DFAN2 42 IREF 48 EN_DFAN1 42
INVT_PWM 22 BEEP# 33 SHDD_LED# 35 ACOFF 48
EC_ON 43,45 EC_LID_OUT# 24
BT_DETACH 38
EC_URXD 45 EC_UTXD 45 EC_USCLK 45 EC_SMB_CK1 40,47 EC_SMB_DA1 40,47 PCIRST# 10,23,26,27,29,30,36
PBTN_OUT# 24 EC_SMB_CK2 5,34 EC_SMB_DA2 5,34 FAN_SPEED1 42
EC_THRM# 24 FAN_SPEED2 42 BT_PWR 38
ACIN 24,44,46 CD_PLAY 34 PM_SLP_S3# 24
ON/OFF 43 PM_SLP_S5# 24 BT_WAKE_UP 38 PM_CLKRUN# 24,26,27,29,30,36
FRD# 40 FWR# 40
SELIO# 40 PHDD_LED# 35
FSTCHG 48
R499
C644 0.22U_0603_16V4 Z
KILL_SW# 29,33,38
2
1 2
1 2
100K_0402_5%
(ACES_85201-2405_24P)
JP5
6278-34P-KBCON
ADP_I 48,52
KEYBOARD CONN.
NUM_LED#
34
PADS_LED#
33
CAPS_LED#
32 31
KSO15
30
KSO14
29
KSO10
28
KSO11
27
KSO8
26
KSO9
25
KSO13
24
KSI7
23
KSO3
22
KSO7
21
KSO12
20
KSI4
19
KSI6
18
KSI5
17
KSO6
16
KSO5
15
KSI3
14
KSI0
13
KSO0
12
KSO1
11
KSI1
10
KSI2
9
KSO2
8
KSO4
7 6 5 4 3 2 1
1 2
300_0402_5%
R219
1 2
R218 300_0402_5%
1 2
300_0402_5%
R217
(Need to check layout library with KB spec)
BADDR1(KBA3) BADDR0(KBA2)
0 0
*
1 1
IRE OBD 0
*
DEV 0 PROG
SHBM(KBA5)=1: Enable shared memory with host BIOS TRIS(KBA4)=1: While in IRE and OBD, float all the
signals for clip-on ISE use
TP_CLK KBA2 TP_DATA
2
0 1 01
ENV0 (KBA0) TRIS (KBA4)
ENV1 (KBA1) 0 1
1
1 2
R493
1 2
R492
+5VS
4.7K_0402_5%
4.7K_0402_5%
1
For EC Tools
JP31
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
@96212-1011S
+3VS
+3VS
+3VS
EC_TINIT# EC_TCK EC_TDO EC_TDI EC_TMS
EC_URXD EC_UTXD EC_USCLK
NUM_LED# PADS_LED# CAPS_LED#
KSO15 KSO14 KSO10 KSO11
KSO8 KSO9 KSO13 KSI7
KSO3 KSO7 KSO12 KSI4
KSI6 KSI5 KSO6 KSO5
KSI3 KSI0 KSO0 KSO1
KSI1 KSI2 KSO2 KSO4
+3VALW
CP8 @100P_1206_8P4C_50V8
81
2
7
3
6
4 5
CP7 @100P_1206_8P4C_50V8
81
2
7
3
6
4 5
CP6 @100P_1206_8P4C_50V8
81
2
7
3
6
4 5
CP5 @100P_1206_8P4C_50V8
81
2
7
3
6
4 5
CP4 @100P_1206_8P4C_50V8
81
2
7
3
6
4 5
CP3 @100P_1206_8P4C_50V8
81
2
7
3
6
4 5
CP2 @100P_1206_8P4C_50V8
81
2
7
3
6
4 5
I/O Address
Index
Data 2E 2F 4E
4F
(HCFGBAH, HCFGBAL)(HCFGBAH, HCFGBAL)+1
Reserved
0 1
1
0 0 0 0
1 2
KBA1
R491 1K_0402_5%
1 2
R490 @1K_0402_5%
1 2
KBA3
R489 1K_0402_5%
1 2
KBA5
R488 1K_0402_5%
+3VALW
Compal Electronics, Inc.
Title
EC PC87591
Size Document Number Rev
Custom
Date: Sheet of
LA-1841
39 57Thursday, February 20, 2003
1
0.1
Page 40
KBA2
SELIO#39
SELIO# LARST#
SN74LVC32APWLE_TSSOP14
U13B
4 5
+3VALW
147
PG
A B
+5VALW
6
O
1 2
R224 20K_0402_5%
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
AA
C352
1 2
1U_0805_25V4Z
+5VALW
C367
0.1U_0402_16V4Z
20
U14
3
Q0
D0
4 5
VCC
D1 Q1
7 6
D2 Q2
8 9
D3 Q3
13 12
D4 Q4
14 15
D5 Q5
17 16
D6 Q6
18 19
D7 Q7
11
CP
1
MR
GND
SN74HCT273PW_TSSOP20
10
1 2
2
CD_FDD_LED#
CDON_LED# 44 MP3_LED# 44 EMAIL_LED# 44
PWR_LED# 44 PWR_SUSP_LED# 44 BATT_LOW_LED# 44 BATT_CHGI_LED# 44
CD_FDD_LED# 43
ADB0
+3VALW
C366
1 2
0.1U_0402_16V4Z
KBA4 SELIO# LARST#
147
U13A
1
PG
A
2
B
S N74LVC32APWLE_TSSOP14
ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
CC
3
O
+5VALW
1 2
C351 0.1U_0402_16V4Z
20
3
Q0
D0
4 5
VCC
D1 Q1
7 6
D2 Q2
8 9
D3 Q3
13 12
D4 Q4
14 15
D5 Q5
17 16
D6 Q6
18 19
D7 Q7
11
CP
1
MR
GND
10
U11
KSO16
2
KSO17 HDD_LED#
EC_RCVEN
EC_RCRST#
SN74HCT273PW_TSSOP20
KSO17 43,44
HDD_LED# 43 WL_BT_LED# 43
S4_LATCH 42
EC_RCVEN 45 EC_RCRST# 45
to 3V
+3VALW
FWE#
8
O
S N74LVC32APWLE_TSSOP14
U13C
+3VALW
AA
1 2
R246 100K_0402_5%
CC
1 2
+3VALW
12
R245 100K_0402_5%
2
147
10
PG
A
9
B
G
1 3
D
S
Q15 2N7002_SOT23
FWR# 39
SUSP# 31,34,39,41,50,51
EC_FLASH# 24
R238 100K_0402_5%
EC_SMB_CK139,47 EC_SMB_DA139,47
+5VALW
8 7 6 5
C399
0.1U_0402_16V4Z1 2
U18
VCC WP SCL SDA
AT24C16N10SC-2.7_SO8
GND
+5VALW
12
R266 100K_0402_5%
1
A0
2
A1
3
A2
4
12
R263 100K_0402_5%
1MB Flash ROM 512KB Flash ROM
Flash ROM Socket Conn.
KBA[0..19]39
ADB[0..7]39
KBA0
21
KBA1
20
KBA2
19
KBA3
18
KBA4
17
KBA5
16
KBA6
15
KBA7
14
KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15 KBA16 KBA17 KBA18 KBA19
FSEL#39
FRD#39
FSEL# FRD# FWE#
8 7
36
6 5 4 3 2
1 40 13 37
22 24
9
KBA[0..19] ADB[0..7]
U15
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19
CE# OE# WE#
SST39VF080-70_TSOP40
VCC0 VCC1
D0 D1 D2 D3 D4 D5 D6 D7
RP#
NC
READY/BUSY#
NC0 NC1
GND0 GND1
31 30
25 26 27 28 32 33 34 35
10 11 12 29 38
23 39
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
RESET#
+3VALW
1 2
R248 @100K_0402_5%
1
C380
0.1U_0402_16V4Z
2
+3VALW
KBA18 KBA16 KBA15 KBA17 KBA12 KBA14 KBA7 KBA13 KBA6 KBA8 KBA5 KBA9 KBA4 KBA11 KBA3 FRD# KBA2 KBA10 KBA1 FSEL# KBA0 ADB0 ADB6 ADB1 ADB2 ADB4
U16
1
NC
2
A16
3
A15
4
A12
5
A7
6
A6
7
A5
8
A4
9
A3
10
A2
11
A1
12
A0
13
DQ0
14
DQ1
15
DQ2
16
VSS
29F040/SST39VF040_PLCC
VCC WE* A17 A14 A13
A11 OE* A10
CE* DQ7 DQ6 DQ5 DQ4 DQ3
32
FWE#
31 30 29 28 27
A8
26
A9
25 24 23 22
ADB7
21 20
ADB5
19 18
ADB3
17
C663
0.1U_0402_16V4Z
1 2
+3VALW
KBA16 KBA15 KBA14 KBA13 KBA12 KBA11 KBA9 KBA8 FWE# RESET#
KBA18 KBA7 KBA6 KBA5 KBA4 KBA3 KBA2 KBA1
@SUYIN-80065A-040G2T
JP7
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
KBA17
KBA19 KBA10 ADB7 ADB6 ADB5 ADB4
ADB3 ADB2 ADB1 ADB0 FRD#
FSEL# KBA0
+3VALW
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size Document Number Rev
B
Date: Sheet of
Compal Electronics, Inc.
BIOS & EXT. I/O PORT
LA-1841
40 57Thursday, February 20, 2003
Page 41
A
B
C
D
E
+3VALW TO +3V
1
C601 10U_1206_16V4Z
+3VALW
1 1
U44
8
S
D
7
S
D
6
S
D
5
G
D
SI4800DY_SO8
1
C635 10U_1206_16V4Z
2
1 2 3 4
2
SYSON_ALW
2
C605
0.1U_0402_16V4Z
1
+3V
1
C599 1U_0805_25V4Z
2
12
R427 @1M_0402_5%
R426 100K_0402_5%
1 2
13
D
2
G
Q41
S
2N7002_SOT23
+5VALW
+12VALW
SYSON#
+3VALW TO +3VS
+3VS
1
C343 1U_0805_25V4Z
2
12
R473 @1M_0402_5%
R474
100K_0402_5%
1 2
13
D
2
G
Q47
S
2N7002_SOT23
+5VALW
+12VALW
SUSP
1 2 3 4
2
C342
0.1U_0402_16V4Z
1
1
C344 10U_1206_16V4Z
2
5VS_GATE
+3VALW
U9
8
S
2 2
D
7
S
D
6
S
D
5
G
D
SI4800DY_SO8
1
C345 10U_1206_16V4Z
2
+5VALW TO +5V
U23
8
S
D
7
S
D
6
S
D
5
G
D
SI4800DY_SO8
1
C441
4.7U_1206_16V4Z
2
U45
8
S
D
7
S
D
6
S
D
5
G
D
SI4800DY_SO8
1
C646
4.7U_1206_16V4Z
2
+5V
1 2 3 4
1
C440
4.7U_1206_16V4Z
2
SYSON_ALW
2
C437
0.1U_0402_16V4Z
1
+5VALW TO +5VS
+5VS
1 2 3 4
1
C647
4.7U_1206_16V4Z
2
2
C640
0.1U_0402_16V4Z
1
1
C438 1U_0805_25V4Z
2
1
C648 1U_0805_25V4Z
2
SYSON39,42,50 SUSP#31,34,39,40,50,51
+3V +5V
D
S
D
S
SYSON#
SYSON
2
G
R408 @470_0805_5%
1 2 13
SYSON# SYSON#
2
G
Q39 @2N7002_SOT23
R475 @470_0805_5%
1 2 13
2
G
Q48 @2N7002_SOT23
+5VALW
R502 10K_0402_5%
1 2 13
D
Q53 2N7002_SOT23
S
R505 @470_0805_5%
1 2 13
D
2
G
Q51
S
@2N7002_SOT23
+5VS+3VS
R507 @470_0805_5%
1 2 13
D
2
G
Q54
S
@2N7002_SOT23
SUSPSUSP
+2.5VS
R184 @470_0805_5%
1 2 13
D
SUSP
2
G
Q11
S
@2N7002_SOT23
+5VALW
R501 10K_0402_5%
SUSP19
SUSP5VS_GATE
2
G
1 2 13
D
S
Q52 2N7002_SOT23
3 3
4 4
+2.5V TO +2.5VS
+2.5V
U3
8
S
D
7
S
D
6
S
D
5
G
D
SI4800DY_SO8
1
C192
4.7U_1206_16V4Z
2
+2.5VS
1 2 3 4
2
C170
0.1U_0402_16V4Z
1
5VS_GATE
1
C193
4.7U_1206_16V4Z
2
1
C194 1U_0805_25V4Z
2
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
A
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
POWER CONTROL CKT
Size Document Number Rev
B
LA-1841
Date: Sheet of
41 57Thursday, February 20, 2003
E
Page 42
A
1 1
FAN CONN. 1
1 2
1
+5VALW
PAD-OPEN 4x4m
EN_FAN1
+3VS
VS
C303
0.1U_0402_16V4Z
84
U7A
EN_DFAN139
2 2
* 5V Fan: Ri = 100K_1%, Rf = 52.3K_1% *12V Fan: Ri = 100K_1%, Rf = 267K_1%
EN_DFAN1
Ri
12
R211
100K_0603_1%
PG
3
+IN
OUT
2
-IN
LM358A_SO8
Rf
1 2
R210 52.3K_0603_1%
FAN CONN. 2
5 6
R201
+IN
OUT
-IN
1 2
U7B
EN_FAN2
7
LM358A_SO8
8.2K_0402_5%
1 2
R200 100_0402_5%
2
1
+3VS
EN_DFAN239
3 3
EN_DFAN2
12
R202
10K_0402_5%
FAN CONN. 3
EN_FAN2
1 2
0_0402_5%
4 4
R207
A
R205
1 2
100_0402_5%
C260
0.1U_0402_16V4Z
1 2
B
+3VS
12
R587
180K_0402_5%
2
C692
1U_0805_25V4Z
+12V_FAN
JP3
1 2
U6
876
5
SI4800DY_SO8
DDD
D
SSS
G
123
4
12
D8 1N4148_SOT23
1 2
R529 10K_0402_5%
FAN_SPEED139 ON/OFFBTN# 43,45
+5VALW
1
C
FMMT619_SOT23
2
BEQ10
C256
0.1U_0402_16V4Z
1 2
R541 10K_0402_5%
FAN_SPEED239
2
BEQ12
+5VALW
1
C
FMMT619_SOT23
3
12
D6
1N4148_SOT23
B
3
12
D5 1N4148_SOT23
FAN2-1
FAN1
FAN2
12
D4
1SS355_SOD323
12
D7
1SS355_SOD323
12
D3
1SS355_SOD323
12
JP22
1 2 3
ACES_85205-0300
1
12
C287 10U_1206_16V4Z
JP25
1 2 3 4
ACES_85205-0400
12
C249 10U_1206_16V4Z
JP23
1 2 3
ACES_85205-0300
C257 10U_1206_16V4Z
C
Power ON Circuit
+3V +3V
U55D
SN74LVC14APWLE_TSSOP14
147
PG
89
OI
+3V POWER +3V POWER
100K_0402_5%
D15
S4_LID_SW#43
RB751V_SOD323
C
D
147
U55E SN74LVC14APWLE_TSSOP14
PG
1011
OI
R588 100K_0402_5%
RTCVREF RTCVREF RTCVREF RTCVREF
12
R275
S4_SATA39
12
R271 100K_0402_5%
1 2
C411 1U_0805_16V7K
13
D
Q18
2
21
G
2N7002_SOT23
S
S4_LATCH40
RTCVREF
R274 10K_0402_5%
1 2
+3VALW
R276 10K_0402_5%
RTCVREF
1 2
SYS_PWROK 7,24
12
R270 560K_0402_5%
1 2
R273 10K_0402_5%
1
C413 1U_0805_16V7K
2
D14
2 1
RB751V_SOD323
12
D13
1N4148_SOT23
D
5 2 3
1 2
C412 @1U_0805_16V7K
1 2 3 4 5 6 7
E
RTC Battery
BATT1
- +
RTCBATT
+RTCVCC
12
C406 0.1U_0402_10V6K
1 2
1 2
4
R268 10K_0402_5%
U19 NC7SZ14M5X
SYSON39,41,50
U20
CD1# D1 CP1 SD1# Q1 Q1# GND
74LCX74
Title
Size Document Number Rev
Date: Sheet of
Q16
2N7002_SOT23
RTCVREF
14
VCC
13
CD2#
12
D2
11
CP2
10
SD2#
09
Q2
08
Q2#
D_SET_S4
Power OK/Reset/RTC battery/Lid Switch/Int. KB
+RTCBATT
+RTCBATT
12
1
D27 BAS40-04_SOT23
2
3
2
2
G
G
CHGRTC
13
D
S
13
D
S
Q17 2N7002_SOT23
Q19 2N7002_SOT23
C607
0.1U_0402_16V4Z
13
D
2
G
S
C405 0.1U_0402_10V6K
1 2
Compal Electronics, Inc.
LA-1841
42 57Thursday, February 20, 2003
E
Page 43
5
4
3
2
1
1
2
3
R560 100K_0402_5%
1 2
51ON#
13
E
LID Switch
SW1
3
4
+3VALW
HORNG CHIH
(DIFFERENT BETWEEN MPU-101-81A)
1
2
Power Button
ON/OFF 39 51ON# 44,46
12
C687
1000P_0402_50V7K
1 2
D34
RLZ20A_LL34
INTERNET_BTN#
EMIAL_BTN#
SDLED27
D10
3
DAN202U_SC70
D11
3
DAN202U_SC70
31
E
47K
B
10K
C
R465 200_0603_5%
+5VALW
31
E
47K
B
10K
C
SDLED
INTERNET#
1
51ON#
2
EMAIL#
1
51ON#
2
Q42 DTA114YKA_SOT23
2
Q13 DTA114YKA_SOT23
2
R216 200_0603_5%
INTERNET# 39
EMAIL# 39
CD_FDD_LED# WL_BT_LED#
CD_FDDLED# WL_BTLED#
12
HDD_LED#
12
13
D
2
G
S
CD_FDD_LED# 40 WL_BT_LED# 40
HDD_LED# 40
+5VS
HDDLED#
POWER_ON_LED44
SDLED#
Q56 2N7002_SOT23
S4_LID_SW#42
LID_SW#39
ON/OFFBTN#42,45
EC_ON39,45
CIR_LID_SW#45
EC_ON
2N7002_SOT23
12
J2 JOPEN
12
J3 JOPEN
ON/OFFBTN#
+3VALW
1 2
13
D
Q55
S
D D
C C
B B
A A
LID_SW#
2 3
@DAN217_SOT23
3
DAN202U_SC70
R554
4.7K_0402_5%
1 2
R555 33K_0402_5%
DTC124EK_SOT23
2
G
D2
1
DAN202U_SC70
D1
+3VALW
D33
1 2
C
22K
2
B
22K
Q58
Button FPC Conn.
KSI439
KSO1740,44
+3VALW
+5VALW+5VALW
31
E
47K
C
TV_OUT_EN#
EMIAL_BTN# INTERNET_BTN#
Q43 DTA114YKA_SOT23
B
2
10K
12
R466 200_0603_5%
Power FPC Conn.
WL_BTLED#
R215
12
SDLED#
200_0603_5%
CD_FDDLED# HDDLED# ON/OFFBTN# POWER_ON_LED
KSO17
JP6
1 2 3 4 5 6
ACES_85201-0605
ACES_85201-1405
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
JP4
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Switchs & Connectors
Size Document Number Rev
B
LA-1841
Date: Sheet of
43 57Thursday, February 20, 2003
1
Page 44
5
+5VALW
PWR_LED#
1 2
Q29
47K
B
2
10K
R646
200_0603_5%
C
DTA114YKA_SOT23
PWR_LED#40 PWR_SUSP_LED# 40
D D
R296
200_0603_5%
PWRLED#
+5VALW
31
1 2
31
Q27
47K
B
10K
C
R293 200_0603_5%
1 2
PWR_SUSPLED#
DTA114YKA_SOT23
R_PWR_SUSP_LED#
2
E
E
4
R288
1 2
0_0402_5%
1
C439 @2.2U_0805_6.3V6F
2
3
+5VALW +5VALW +5VALW
31
DTA114YKA_SOT23
BATT_CHGI_LED# BATT_LOW_LED#
Q28
200_0603_5%
BATT_CHGILED#
47K
B
2
10K
C
R294
1 2
31
Q30
E
47K
B
10K
C
R297
200_0603_5%
1 2
BATT_LOWLED#
DTA114YKA_SOT23
2
E
BATTERY CHGI/LOW LED
2
31
47K
B
10K
C
R295
200_0603_5%
1 2
Q31 DTA114YKA_SOT23
EMAIL_LED#
2
EMAILLED#
E
1
EMAIL_LED# 40BATT_CHGI_LED#40 BATT_LOW_LED# 40
EMAIL LED
POWER_ON_LED43
POWER_ON_LED
LED FPC Conn.
POWER/SUSP LED
+5VALW
R298
TP_CLK TP_DATA
12
C347 1U_0603_10V6K
3
200_0603_5%
C C
+5VALW +5VALW
31
DTA114YKA_SOT23
CDON_LED#40 MP3_LED#40
B B
Q20
B
2
10K
R282
200_0603_5%
R_CDON_LED#
47K
E
C
1 2
DTA114YKA_SOT23
MP3_LED#CDON_LED#
200_0603_5%
Q21
B
2
10K
R283
R_MP3_LED#
47K
31
E
C
Touch Pad Connector
1 2
TP_CLK39
TP_DATA39
+5VS
CDPLAY Board Conn.
D16
51ON#43,46
MODE#39
A A
51ON#
MODE#
5
12
1N4148_SOT23 D17
12
1N4148_SOT23
D_MODE#
ACES_85201-1405
+3VALW
D_MODE# R_CDON_LED# R_MP3_LED#
KSO1740,43
KSI039 KSI139 KSI239 KSI339
KSO17 EC_PLAYBTN# EC_STOPBTN# EC_REVBTN# EC_FRDBTN#
4
14 13 12 11 10
9 8 7 6 5 4 3 2 1
JP11
14 13 12 11 10 9 8 7 6 5 4 3 2 1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
12
ACINLED# PWR_SUSPLED#
BATT_LOWLED# BATT_CHGILED# EMAILLED#
JP8
1 2 3 4 5 6
ACES 85201-0602_6P
ACES_85201-1005
10
9 8 7 6 5 4 3 2 1
JP12
5 6
SN74LVC125APWLE_TSSOP14
SN74LVC125APWLE_TSSOP14
2
ACINLED#PWRLED#
13
D
ACIN
2
G
Q32
S
2N7002_SOT23
ACIN LED
+3V
147
U55F
4
U51B
OE#
I O
13
U51D
12 11
OE#
I O
PG
1213
OI
S N74LVC14APWLE_TSSOP14
+3V POWER
+3V
147
U55C
PG
65
OI
SN74LVC14APWLE_TSSOP14
+3V POWER
Compal Electronics, Inc.
Title
Switchs & Connectors
Size Document Number Rev
B
LA-1841
Date: Sheet of
1
ACIN 24,39,46
44 57Thursday, February 20, 2003
Page 45
5
H1
SCREW 8.5x3.0
1
D D
H5
SCREW 8.5X2.8
1
H13
SCREW 8.5X2.8
H2
SCREW 8.5x3.0
1
H6
SCREW 8.5X2.8
1
H14
SCREW 8.5X2.8
H7
SCREW 8.5X2.8
1
H15
SCREW 8.5X2.8
H3
SCREW 8.5X2.8
1
H8
SCREW 8.5X2.8
1
H16
SCREW 8.5X2.8
H4
SCREW 8.5X2.8
H9
SCREW 8.5X2.8
1
H17
SCREW 8.5X2.8
1
H10
SCREW 8.5X2.8
1
H18
SCREW 8.5X2.8
4
H11
SCREW 8.5X2.8
H19
SCREW 8.5X2.8
1
H12
SCREW 8.5X2.8
1
H20
SCREW 8.5X2.8
CIR_LID_SW#43
EC_RSMRST#24,39
3
+5V_CIR
1 2
P2
R284 100K_0402_5%
P2
R300 100K_0402_5%
2
G
1
C445 1U_0603_10V6K
2
1 2
13
D
Q24 2N7002_SOT23
S
2
G
1 2
C444 1U_0603_10V6K
1 2
R299 100K_0402_5%
13
D
Q23 2N7002_SOT23
S
2
SI2301DS 1P_SOT23
2
2
U24
1
OUT SNS SHDN
TAP
GND ERR#
IN
FB
2 3 4 5
MIC2951
Q33
13
13
1 2
R289 10K_0402_5%
8 7 6
+5VALW
1
C442 1U_0603_10V6K
2
C443 1U_0805_25V4Z
1 3
Q22
P2
DTC115EKA_SOT23
2
100K
1
EC_ON 39,43
100K
1
H21
SCREW 8.5x3.0
C C
1
H25
SCREW 8.5x3.0
1
H31
SCREW 8.5X2.8
B B
1
H36
SCREW 8.5X2.8
1
CF5 SMD40M80
1
A A
CF21 SMD40M80
CF11 SMD40M80
1
CF27 SMD40M80
1
H22
SCREW 8.5x3.0
1
H26
SCREW 8.5x3.0
1
H32
SCREW 8.5X2.8
1
H37
SCREW 8.5X2.8
1
CF8 SMD40M80
1
CF23 SMD40M80
H27
SCREW 8.5x3.0
SCREW 8.5X2.8
CF20 SMD40M80
1
CF24 SMD40M80
1
1
H33
1
SCREW 8.5x3.0
CF7 SMD40M80
1
CF22 SMD40M80
H34
1
1
H23
SCREW 8.5x3.0
1
H28
SCREW 8.5x3.0
1
SCREW 8.5x3.0
CF14
CF6
SMD40M80
SMD40M80
1
CF26
CF25
SMD40M80
SMD40M80
SCREW 8.5x3.0
SCREW 8.5x3.0
H35
1
1
1
H24
1
H29
1
CF9 SMD40M80
1
CF28 SMD40M80
1
H30
SCREW 8.5x3.0
1
CF13 SMD40M80
1
CF2 SMD40M80
CF10 SMD40M80
1
CF4 SMD40M80
1
1
RP86
CIR_RCVEN CIR_RCRST# CIR_URXD CIR_USCLK
1 8 2 7 3 6 4 5
10K_1206_8P4R_5%
CIR Reciever Board Conn.
+5V_CIR
RCIRRX
CF15 SMD40M80
1
CF12 SMD40M80
CF18 SMD40M80
1
CF17 SMD40M80
CF16 SMD40M80
1
CF1 SMD40M80
CF19 SMD40M80
1
CF3 SMD40M80
1 2
C757 @10P_0402_50V8K
1 2
C758 @10P_0402_50V8K
1
C447
0.1U_0402_16V4Z
2
+5V_CIR
+5V_CIR
JP13
1 2 3 4 5 6
ACES_85201-0605
12
X2 4MHz
CIR_RCRST#
RCIRRX
3
4 6 7
8 9
10
1 2
1
C446
0.1U_0402_16V4Z
2
1 2
+3VALW
R285 @10K_0402_5%
EC_UTXD39
1 2
+3VALW
R287 10K_0402_5%
EC_URXD39
1 2
+3VALW
R292 10K_0402_5%
EC_USCLK39
U25
XIN
XOUT RESET# P21/AIN1
P20/AIN0 D3/K
D2/C VDD VSS
M34501M4-XXXFP
P00 P01 P02 P03
P10 P11
P12/CNTR
P13/INT
CNVSS
EC_UTXD
MMBT3904_SOT23
EC_URXD
EC_USCLK
20 19 18 17
16 15 14 13
12
D0
11
D1
5
+3VALW
12
2
3 1
Q26
2 1
D18 RB751V_SOD323
2 1
D19 RB751V_SOD323
CIR_RCVEN CIR_UTXD
CIR_UTXD CIR_URXD
CIR_USCLK
1 2
R301 0_0402_5%
R286
10K_0402_5%
CIR_UTXD
CIR_URXD
CIR_USCLK
1 2
R290 @10K_0402_5%
1 2
R291 0_0402_5%
RC_ON/OFFBTN
EC_RCVEN40
EC_RCRST#40
+5V_CIR
13
D
2
G
S
+5VALW
3 1
Q64 MMBT3904_SOT23
+5VALW
3 1
Q65 MMBT3904_SOT23
Q25 2N7002_SOT23
12
R650
10K_0402_5%
2
CIR_RCVEN
12
R651
10K_0402_5%
2
CIR_RCRST#
ON/OFFBTN# 42,43
1
FD2 FIDUCAL
1
1
FD3 FIDUCAL
1
1
FD1 FIDUCAL
1
FD4 FIDUCAL
5
1
1
1
1
FD5
FD6
FIDUCAL
FIDUCAL
1
1
1
1
1
1
1
4
1
1
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Compal Electronics, Inc.
Title
CIR & Screws
Size Document Number Rev
LA-1841 0.1
B
Date: Sheet of
45 57Thursday, February 20, 2003
1
Page 46
A
PF1 12A_65VDC_451012
PCN1
6
G
5
G
4
CHGRTC
+2.5VP
+1.25VSP
+CPUVIDP
+1.5VSP
+12VALWP
+12V_FANP
G
3
G
SINGA_2DC-S113L200
1 1
2 2
3 3
4 4
1
1
2
2
BATT+
CHGRTCP
51ON#43,44
PR20
1 2
200_0603_5%
PJP1
1 2
PAD-OPEN 4x4m
PJP2
1 2
PAD-OPEN 4x4m
PJP4
1 2
PAD-OPEN 4x4m
PJP6
2 1
PAD-OPEN 2x2m PJP7
1 2
PAD-OPEN 4x4m
PJP9
2 1
PAD-OPEN 2x2m
PJP11
2 1
PAD-OPEN 2x2m
PD4
RB751V_SOD323
1 2
PR11 200_0603_5%
100K_0603_5%
1 2
PR14 22K_0603_5%
RTCVREF
3.3V
12
A
21
12
12
12
PR13
PU2 S-81233SGUP-T1_SOT89
3
3
PC10 10U_1206_10V4Z
+2.5V
(12A,480mils ,Via NO.=24)
(3A,120mils ,Via NO.= 6)
+1.25VS
(150mA,40mils ,Via NO.= 2)
+CPUVID
(6A,240mils ,Via NO.= 12)
+1.5VS
(300mA,20mils ,Via NO.= 1)
+12VALW
+12V_FAN
12
PC1
PD1
EC10QS04
12
1000P_0603_50V7K
N1
PC7
0.22U_1206_25V7M
2
2
1
1
2
12
PR16 200_0603_5%
12
PC9 1U_0805_25V4Z
(0.5A,60mils ,Via NO.= 2)
PL1
CHT_C8BBPH853025_13A
1 2
12
PC2
100P_0603_50V8J
VIN
PD3
1N4148_SOD80
1 2 12
PR9 33_1206_5%
13
PQ1 TP0610T_SOT23
12
PC8
0.1U_0603_25V7K
N2
2 1
B
VIN
12
PC3 1000P_0603_50V7K
VS
PD6 RLZ16B_LL34
+5VALWP
12
MAINPWON47,49
PJP3
1 2
PAD-OPEN 4x4m
(6A,240mils ,Via NO.= 12)
PJP5
+3VALWP
(6A,240mils ,Via NO.= 12)
+VGA_COREP
+VTT_GMCHP
1 2
PAD-OPEN 4x4m
PJP8
1 2
PAD-OPEN 4x4m
(5A,200mils ,Via NO.= 10)
PJP10
1 2
PAD-OPEN 3x3m
(1.2A,60mils ,Via NO.= 3)
B
PC4 100P_0603_50V8J
1000P_0603_50V7K
ACON48
12
PC5
2 3
+5VALW
+3VALW
+VGA_CORE
+VTT_GMCH
VIN
12
PR3
84.5K_0603_1%
PR5 22K_0603_5%
12
PR6 20K_0603_1%
VIN
VS
PD7
1
RB715F_SOT323
C
VS
1 2
1 2
12
PC6
0.1U_0603_50V4Z
PD5
12
1N4148_SOD80
1 2
PR17 10K_0603_5%
PON
PD8
RLZ6.2C_LL34
2 1
PR1 1M_0603_1%
VS
84
3
+
2
-
PR8
10K_0603_5%
PR10 1K_1206_5%
N3
PR12 1K_1206_5%
PR15 1K_1206_5%
PU1A
PG
1
O
LM393M_SO8
12
RTCVREF
3.3V
1 2
1 2
1 2
6.0V
7
12
PC12 1000P_0603_50V7K
RLZ4.3B_LL34
PU1B
O
12
PR2
5.6K_0603_5%
12
PD2
12
PR18 1M_0603_1%
LM393M_SO8
84
5
PG
+
10K_0603_5%
6
-
12
PC13
1 2
0.1U_0603_16V7K
RTCVREF
3.3V
2N7002_SOT23 2
12
PR22
PQ2
Precharge detector
15.34 15.90 16.48
13.13 13.71 14.20
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NE ITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
1 2
PR4 1K_0603_5%
PACIN
PR7 10K_0603_5%
ACIN 24,39,44
PACIN 48,49
Vin Detector High 18.764 17.901 17.063
Low 17.745 16.903 16.038
B+
12
PR19 499K_0603_1%
12
12
PR23
215K_0603_1%
13
D
G
S
Title
Size Document Number Rev
Date: Sheet of
PR21 499K_0603_1%
PR24 47K_0603_5%
13
100K
100K
Compal Electronics, Inc.
DCIN & DETECTOR
LA-1841
12
1000P_0603_50V7K
12
PQ3 DTC115EKA_SOT23
2
+5VALWP
D
PC11
PACIN
46 57Thursday, February 20, 2003
Page 47
A
B
C
D
PH1 under CPU botten side :
CPU thermal protection at 84 degree C Recovery at 45 degree C
1 1
PCN2
SUYIN_200275MR009G130ZL
2 2
3 3
BATT+ BATT+
TS SMD SMC GND GND
1 2
ALI/NIMH#
3
ID
AB/I
4
B/I
TS_A
5
EC_SMDA
6
EC_SMCA
7 8 9
PR29
100_0603_5%
PD12
@BAS40-04
3
12
12
PR30 100_0603_5%
1
2
PR26 1K_0603_5%
2
12
12
PR32 1K_0603_5%
1 2
PR35 25.5K_0603_1%
12
PR37 1K_0603_5%
1
1
PD13
@BAS40-04
3
1 2
PR27 47K_0603_5%
3
PD11 @BAS40-04
2
21
PF2 15A_65VDC_451012
3
2
PD9 @BAS40-04
1
+3VALWP
VMB
CHT_C8BBPH853025_13A
12
PC15 1000P_0603_50V7K
+3VALWP
PL2
1 2
ALI/MH# 39
BATT_TEMPA 39
EC_SMB_DA1 39,40 EC_SMB_CK1 39,40
12
PC16
0.01U_0603_50V7K
BATT+
0.22U_0805_16V7K_V2
PH2 near main Battery CONN :
BAT. thermal protection at 84 degree C Recovery at 45 degree C
+5VALWP
PC19
0.22U_0805_16V7K_V2
4 4
VL VS
10KB_0603_1%_TH11-3H103FT
PH1
12
PC17
PR33
12
12
3.32K_0603_1%
1000P_0603_50V7K
12
PH2 10KB_0603_1%_TH11-3H103FT
1 2
PR40 16.9K_0603_1%
12
12
PR42
3.32K_0603_1%
1000P_0603_50V7K
12
PC14
0.1U_0603_50V4Z
PR31
1 2
16.9K_0603_1%
TM_REF1
12
PC18
TM_REF2
12
PC20
84
3
+
2
-
PR34
100K_0603_1%
12
PR36 100K_0603_1%
5 6
12
PR43 100K_0603_1%
1 2
PR28 47K_0603_1% PU3A
PG
1
O
LM393M_SO8
12
VL
PR39
1 2
47K_0603_1%
84
PU3B
PG
+
7
O
-
LM393M_SO8
PR41
100K_0603_1%
VL
PR25 47K_0603_1%
1 2
1SS355_SOD323
VLVL
PR38 47K_0603_1%
1 2
12
VL
PD10
12
2
PD14
12
1SS355_SOD323
100K
100K
13
MAINPWON 46,49
PQ4
DTC115EKA_SOT23
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NE ITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
A
B
INC.
C
Title
Size Document Number Rev
Date: Sheet of
Compal Electronics, Inc.
BATTERY CONN / OTP
LA-1841
D
47 57Thursday, February 20, 2003
Page 48
A
B
C
D
P2
PQ5
1
S
D
2
S
D
3
S
D
4
G
D
SI4825DY_SO8
12
PR46 200K_0603_1%
PR45 10K_0603_5%
8 7 6 5
VIN
1 1
12
12
PD15
ACOFF#
1 2
1SS355_SOD323
PACIN
ACON
1 2
PR52 3K_0603_5%
PACIN46,49
ACON46
2
G
150K_0603_1%
13
D
S
0.1U_0603_16V7K
2 2
IREF=1.31*Icharge
1 2 3 4
PR49
PQ10 2N7002_SOT23
PC26
PQ6
8
S
D
7
S
D
6
S
D
5
G
D
SI4825DY_SO8
12
12
PR54 10K_0603_1%
ADP_I39,52
12
IREF=0.73~3.3V
IREF39
+3VALWP
12
PR63 47K_0603_5%
13
PQ12 DTC115EKA_SOT23
100K
FSTCHG39
2
1 2
205K_0603_1%
PR58
CS
13
PQ11 DTC115EKA_SOT23
100K
2
PR62
100K_0603_1%
100K
P3 B+
12
PR53
33.2K_0603_1%
PC29
0.1U_0603_16V7K
12
12
100K
3 3
Iadp=0~5.8A
0.01_2512_1%
PR51 100K_0603_5%
PC27
1 2
4700P_0603_50V7K
PC30
1 2
1000P_0603_50V7K
PR60 10K_0603_5%
PC33
0.1U_0603_16V7K
PR44
PR55
1 2
PR56
1 2
12
12
10K_0603_5%
1K_0603_5%
12
47.5K_0603_0.1%
PU4
1
-INC2
2
OUTC2
3
+INE2
4
-INE2
5
FB2
6
VREF
7
FB1
8
-INE1
9
+INE1
10
OUTC1
11
OUTD
12
-INC1
MB3887_SSOP24
PR64
12
1 2
PL3
HCB4532K-800T90_1812
24
+INC2
23
GND
22
CS
21
VCC(o)
20
OUT
19
VH
PC28
0.1U_0603_50V4Z
18
VCC
17
RT
PR57 68K_0603_5%
16
-INE3
15
FB3
47K_0603_5%
14
CTL
13
+INC1
CS
1 2
1 2
1 2
ACON
12
PC21
4.7U_1210_25V6K
12
PR50 0_0603_5%
PC24
0.022U_0603_25V7K
1 2
PC25
1 2
0.1U_0603_25V7K
1 2
PC31
0.1U_0603_25V7K
1500P_0603_50V7K
PC32
1 2
4.2V
12
PC22
4.7U_1210_25V6K
PR65
143K_0603_0.1%
12
PC23
4.7U_1210_25V6K
N18
12
B++
36
241
PQ8 SI4835DY_SO8
578
LXCHRG
PL4
22UH_SPC-1205P-220A
1 2PR61
12
PD16
RB051L-40_SOD106
PQ7
SI7447DP_SO8
1 2 3
4
ACOFF#
1 2
13
100K
PR47
10K_0603_5%
PQ9 DTC115EKA_SOT23
2
PR48
1 2
47K_0603_5%
100K
CC=0.5~2.7A CV=16.8V(12 CELLS LI-ION)
PR59
1 2
0.02_2512_1%
4.7U_1210_25V6K
12
PC35
PC34
4.7U_1210_25V6K
5
VIN
ACOFF 39
12
12
PC36
4.7U_1210_25V6K
BATT+
VMB
12
PR69
PR66 340K_0603_1%
12
PR67 499K_0603_1%
12
12
PC38
0.01U_0603_50V7K
B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NE ITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Title
Size Document Number Rev
Date: Sheet of
Compal Electronics, Inc.
CHARGER
LA-1841
D
48 57Thursday, February 20, 2003
OVP voltage : LI
4S3P : 17.4V--> BATT_OVP= 1.935V
(BAT_OVP=0.1111 *VMB)
+5VALWP
84
PU5A
3
PG
+
1
BATT_OVP39
4 4
PC37
12
0.1U_0603_16V7K
A
12
PR68
2.2K_0603_5%
0
2
-
LM358A_SO8
105K_0603_0.5%
Page 49
5
D D
1 2
HCB4532K-800T90_1812
4.7U_1210_25V6K
C C
+3VALWP
PC52
150U_D_6.3VM
PL5
1
+
2
B+++
12
PC42
0.012_2512_1%
1
+
PC53
150U_D_6.3VM
2
12
PC43
4.7U_1210_25V6K
PL6
SPC-1205P-100
12
PR74
PD20
EP10QY03
2 1
12
PQ13
1 2 3 4
SI4814DY_SO8~D
12
PC50
47P_0603_50V8J
PR73 1M_0603_1%
1 2
3.57K_0603_1%
PR78
1 2
8
G1
D1
7
D1
S1/D2
6
G2
S1/D2
5
S1/D2
S2
12
PC54
100P_0603_50V8J
PR80
10K_0603_1%
B B
1 2
+3.3V Ipeak = 6.66A ~ 10A
4
PC41
1 2
0.1U_0603_25V7K
PDH31
1 2
PR71 0_0603_5%
PLX3
PDL3
CSH3
PACIN46,48
PON
12
12
BST31
PDH3
1 2
PR77 10K_0603_5%
12
PR81 47K_0603_5%
PC60
0.047U_0603_16V7K
12
VS
PD19
1SS355_SOD323
1 2
12
PC48
0.1U_0603_25V7K
22
25
BST3
27
DH3
26
LX3
24
DL3
1
CSH3
2
CSL3
MAX1632
3
FB3
10
SKIP#
23
SHDN#
7
TIME/ON5
28
RUN/ON3
PC56 680P_0603_50V8J
12
PR83 47K_0603_1%
PC61
0.047U_0603_16V7K
VL
V+
PU6
GND
8
VL
MAINPWON 46,47
3
2
1
PC47
4.7U_1206_16V4Z
12
21
12OUT
VL
VDD
BST5
DH5 LX5 DL5
PGND
CSH5 CSL5
FB5
SEQ
REF SYNC RST#
3
PD18 DAP202U_SOT323
+12VALWP
4 5 18 16 17 19 20 14 13 12 15 9 6 11
BST51
12
PC49
4.7U_1206_16V4Z
12
PC55
4.7U_1206_16V4Z
2.5VREF
PC44
1 2
0.1U_0603_25V7K
PDH5
4.7U_1210_25V6K
PLX5
PR79
10.5K_0603_1%
2
B+++
12
12
PC45
PR72
1 2
0_0603_5%
PDL5
12
12
PR82
10K_0603_1%
N4
PC46
4.7U_1210_25V6K
PDH51
12
PC59 100P_0603_50V8J
PC39
4.7U_1210_25V6K
1 2
12
PC40 470P_0805_100V7K
1 2
PR70 22_1206_5%
FLYBACKSNB
12
PD17
EC11FS2_SOD106
4
1
PT1
SDT-1205P-100
PQ14
1 2 3 4
8
G1
D1
7
D1
S1/D2
6
G2
S1/D2
5
S1/D2
S2
SI4814DY_SO8~D
PC57
150U_D_6.3VM
12
PC51 47P_0603_50V8J
12
PR75 2M_0603_5%
1
+
2
1
+
2
150U_D_6.3VM
+5V Ipeak = 6.66A ~ 10A
1
2
3
PC58
CSH5
12
2 1
PR76
0.012_2512_1%
+5VALWP
PD21
EP10QY03
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS C ONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
5
4
3
INC.
2
Title
Size Document Number Rev
Date: Sheet of
Compal Electronics, Inc.
5V/3.3V/12V
LA-1841
49 57Thursday, February 20, 2003
1
Page 50
A
B
C
D
PL7
1 2
12
12
1 1
PC62
4.7U_1210_25V6K
PC63
4.7U_1210_25V6K
PD22
1
0.1U_0603_25V7K
12
PC64
4.7U_1210_25V6K
PC65
DAP202U_SOT323
3
876
5
PQ15
DDD
D
+2.5V
+2.5VP
0.01U_0603_50V7K
1
1
PC72
2 2
220U_D2_4VM
+
+
2
2
220U_D2_4VM
18.2K_0603_1%
PC73
PR89
12
12
PL8
4.7U_SPC-1205P-4R7B_+40-20%~D
1 2
PC74
PR88
@100_0603_5%
12
PR90 0_0603_5%
PC75
12
12
PD23 EC31QS04
12
SSG
S
134
2
241
IRF7811A_SO8
578
3 6
PQ16 FDS6672A_SO8
2
PC67
0.01U_0603_50V7K
PR86
12
0_0603_5%
1 2
PR91
1.43K_0603_1%
1 2
PC70
0.1U_0603_25V7K
PU7
12
12
6
5 4
7 2
@1000P_0603_50V7K
3
9
12
PR96 10K_0603_1%
12
PR97
SYSON39,41,42
0_0603_5%@
12
PR94 0_0603_5%
10
8
15 16 11
12
PR98
PR84 51_1206_5%
+5VALWP
1 2
PR85
12
14
SOFT1
2.2_0603_5%
1 2
28
VIN
VCC
BOOT1
UGATE1 PHASE1
ISEN1 LGATE1
PGND1
VOUT1 VSEN1 EN1 PG1 PG2/REF
GND
OCSET1
1
DDR
ISL6225BCA-T_SSOP28
13
PC68
0.01U_0603_50V7K
17
SOFT2
23
BOOT2
24
UGATE2
25
PHASE2
22
ISEN2
27
LGATE2
26
PGND2
20
VOUT2
19
VSEN2
21
EN2
18
OCSET2
HCB4532K-800T90_1812
12
PR87 0_0603_5%
1 2
1 2
PR92 1K_0603_1%
150K_0603_1%
3 3
+5VALWP
0.01U_0603_16V7K
PC66
2.2U_0805_10V6K
12
PC71
0.1U_0603_25V7K
12
PC79
PR99 10K_0603_0.1%
12
+2.5VP
12
PC78
12
+2.5V/+1.25V
DDR Termination Voltage
PQ17
1 2 3 4
10U_1206_10V4Z@
PR100 10K_0603_0.1%
8
G1
D1
7
D1
S1/D2
6
G2
S1/D2
5
S1/D2
S2
SI4814DY_SO8~D
12
PR95 0_0603_5%
12
+2.5VP
12
12
12
PC69
4.7U_1206_16V4Z
PL9 1 .5U_TPRH6D38-1R5M_4A_20%
1 2
PR93 @100_0603_5%
PC77 @1000P_0603_50V7K
SUSP# 31,34,39,40,41,51
+1.25V
+1.25VSP
1
PC76
+
220U_D2_4VM
2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NE ITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
A
B
INC.
C
Title
Size Document Number Rev
Date: Sheet of
Compal Electronics, Inc.
DDR/2.5V/1.25V
LA-1841
D
50 57Thursday, February 20, 2003
Page 51
A
B
C
D
PL10
1 2
HCB4532K-800T90_1812
PC83
12
4.7U_1210_25V6K
PL12
4.7U_SPC-1205P-4R7B_+40-20%~D
1 2
PR109
0_0603_5%
PR117 @10K_0603_1%
12
12
PC95
0.01U_0603_50V7K
12
12
PC96
2
12
12
PC81
4.7U_1210_25V6K
1
0.1U_0603_25V7K
3
PC86
12
0.01U_0603_50V7K PR103
1 2
0_0603_5%
1 2
12
6
5 4
7
PR107
1.65K_0603_1%
2
3
9
10
8
15 16 11
12
PR118 107K_0603_1%
PR101 51_1206_5%
+5VALWP
1 2
12
PC84
14
PU8
SOFT1
BOOT1
UGATE1 PHASE1
ISEN1 LGATE1
PGND1
VOUT1 VSEN1 EN1 PG1 PG2/REF
OCSET1
1
VIN
GND
PR102
2.2_0603_5%
1 2
28
VCC
DDR
13
12
PC87
0.01U_0603_50V7K
12
17
SOFT2
1 2
23
BOOT2
PR104 0_0603_5%
24
UGATE2
25
PHASE2
ISEN2
LGATE2
PGND2
VOUT2
VSEN2
OCSET2
ISL6225BCA-T_SSOP28
EN2
22 27
26
20 19 21
18
PR108
1.96K_0603_1%
1 2
PC85
2.2U_0805_10V6K
0.1U_0603_25V7K
PR112 0_0603_5%
PC89
12
PR119 124K_0603_1%
12
12
PC82
12
4.7U_1210_25V6K
PQ19
1
G1
D1
2
D1
S1/D2
3
G2
S1/D2
4
S1/D2
S2
SI4814DY_SO8~D
8 7 6 5
12
12
PC80
4.7U_1210_25V6K
1 1
PD24
DAP202U_SOT323
+1.2V
+VGA_COREP
1
1
+
+
PC90
220U_D2_4VM
2 2
POWER_SEL16
PC91
2
2
@220U_D2_4VM
1.1K_0603_0.5%
PR114
4.87K_0603_1%
2
PQ20
2N7002_SOT23
G
4 .7U_SPC-1205P-4R7B_+40-20%~D
0.01U_0603_50V7K
12
12
PR105
12
12
PR115 10K_0603_1%
13
D
S
PC92
PL11
1 2
12
PR106 0_0603_5%
12
PR116 @10K_0603_1%
SI4814DY_SO8~D
PQ18
8 7 6 5
G1 S1/D2 S1/D2 S1/D2
1
D1
2
D1
3
G2
4
S2
SUSP# SUSP#
SUSP#31,34,39,40,41,50
PC88
0.1U_0603_25V7K
PR111 0_0603_5%
0.01U_0603_50V7K@
PR110
6.8K_0603_1%
12
220U_D2_4VM@
12
PR113 10K_0603_1%
+1.5V
+1.5VSP
1
1
+
+
PC93
2
2
PC94 220U_D2_4VM
3 3
NV18/NV34 NV31
FIX 1.2V
PR105=3.4K_0603_1% PR115=10K_0603_1%
4 4
UNPOP PR114 UNPOP PQ20
A
POWER_SEL=0 VOUT=1.0V
PR105=1.1K_0603_0.5% PR114=4.87K_0603_1% PR115=10K_0603_1% POP PQ20
POWER_SEL=1 VOUT=1.2V
POWER_SEL=1 VOUT=1.0V POWER_SEL=0 VOUT=0.95V
PR105=1.1K_0603_0.5% PR114=20.5K_0603_1% PR115=19.6K_0603_1% POP PQ20
B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NE ITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Title
Size Document Number Rev
Date: Sheet of
Compal Electronics, Inc.
VGA_CORE/1.5V
LA-1841
D
51 57Thursday, February 20, 2003
Page 52
5
4
3
2
1
1 2
PR120 1M_0603_1%
VS
12
D D
1 2
VL
PR123
C C
B B
ADP_I39,48
200K_0603_1%
100K_0603_1%
PR124
12
1 2
PR122 84.5K_0603_1%
12
PC98 1000P_0603_50V7K
3
+
2
-
5
+
6
-
84
PG
1
O
PU9A LM393M_SO8
84
PU9B
PG
7
O
LM393M_SO8
PC97
0.1U_0603_50V4Z
VL
12
PR121 47K_0603_1%
12
PC99 1000P_0603_50V7K
+5VS
PR127
100K_0603_5%
PC105
1200P_0603_50V7K
PR125 0_1206_5%
1 2
12
12
12
13
D
2
G
S
12
PC100 10U_1206_10V4Z
1
2
PC104
33P_0603_50V8J
4
PQ21 2N7002_SOT23
5
HSD
COMP
GND
MAX1954
PU10
IN
H_PROCHOT# 5,7
10
BST
8
DH
9
LX
6
DL
7
PGND
3
FB
EP10QY03
21
PD25
12
PC102 0.1U_0603_16V7K
PQ22
1
G1
D1
2
D1
S1/D2
3
G2
S1/D2
4
S1/D2
S2
SI4814DY_SO8~D
12
PC101 22U_1210_6.3V6M
8
PL13
7
5 U_SPC_06704_5R0_2.9A_30%~D
6
1 2
5
PR129
15.4K_0603_1%
12
PR126
8.2K_0603_0.5%
12
12
13
D
S
1
+
PC103 220U_D2_4VM
2
PR128
29.4K_0603_1%
2
G
PQ23
2N7002_SOT23
+VTT_GMCHP
GMCH_SEL 53
GMCH_SEL=1
GMCH_SEL=0
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS C ONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
5
4
3
INC.
2
VOUT=1.225V FOR PRESCOTT
VOUT=1.45V FOR NORTHWOOD
Title
Size Document Number Rev
Date: Sheet of
Compal Electronics, Inc.
VTT_GMCH/CLOCK THROTTLING
LA-1841
52 57Thursday, February 20, 2003
1
Page 53
A
Different Pin Definition for ISL6561 in PU9
B
C
D
#7 GND
#9 TCOMP
1 1
PM_DPRSLPVR24
2 2
3 3
+3VALWP
#10 DAC
STP_CPU#15,24
VID_PWRGD5
PR161
0_0603_5%
0_0603_5%@
PR133
1 2
0_0603_5%
PR135
1 2
0_0603_5%@
PR136
0_0603_5% @
0_0603_5%@
12
12
VR_ON39
#11
REF
IDROOP
#14
#18 RGND
PR131
1 2
12
+5VALWP
PR137
1 2
PC109
100P_0603_50V8J
1.2VDD
PC115
4.7U_1206_16V4Z
PR165 0_0603_5%
#33
#35 GND
#37 GND
12
PR134 0_0603_5%
PR140
12
0_0603_5%@
12
PR155
4.22K_0603_1%
12
PR167 100K_0603_5%
1 2
EN #38 OVP
ENLL5
12
PR141 301_0603_1%
12
PR143
17.4K_0603_1%
PR149
1K_0603_1%
12
1 2
PU12
1
VIN
4
PG
3
EN
CM2843ACIM25_SOT23-5
#40 GND
H_VID45 H_VID35 H_VID25 H_VID15 H_VID05 H_VID55
12
PR142
0_0603_5% @
7
0
LM358A_SO8
100K_0603_5%
1 2
PR154
3.24K_0603_1%
5
OUT
2
GND
12
PC106 1U_0603_10V
Frequency Select
PU5B
5
+
6
-
12
+3VALWP
PR147
10K_0603_5%@
PR151
1 2
+CPUVIDP
12
PC116
4.7U_1206_16V4Z
+5VALWP
PU11
32
VCC
2
VID3
3
VID2
4
VID1
5
VID0
6
VID12.5
34
ENLL
33
DRSEN
35
DSEN#
12
PC107
12
0.033U_0603_25V7M
PR145
0_0603_5% @
1 2
12
PC112
220P_0603_50V8J
1 2
Panasonic ERTJ0EV334J (0402) Locate this NTC resistor on PCB between phase 2 and 3 for thermal compensation.
13
D
S
PR138 1K_0603_1%
330K_0402_5% PH3
PQ26 2N7002_SOT23
2
G
10
OCSET
11
SOFT
9
DSV
36
FS
37
DRSV
38 14
VR-TT# NC
40
NTC
12
GND
19
GND
ISL6247_MLFP40
BOOTSELECT4
PR130
80.6K_0603_1%
RAMPS
PGOODVID4
PWM1
ISEN1+
ISEN1-
PWM2
ISEN2+
ISEN2-
PWM3
ISEN3+
ISEN3-
PWM4
ISEN4+
ISEN4-
COMP
FB
VDIFF
VSEN VRTN
OFS
PR152
1.2M_0603_5% PQ25
TP0610T_SOT23
1
2
3
GMCH_SEL52
PR164
12
22K_0603_5% PR166
100K_0603_5%
1 2
7 391
25 24
23
26 27
28
20 21
22
31 30
29
15
13
PR146
0_0603_5%
16 17 18
+5VALWP
8
12
27K_0603_5%
PR156
1 2
340K_0603_1%
12
2
Battery Feed Forward
PR132
12
10K_0603_5%
PR139
12
0_0603_5% @
12
Place close to IC
0.1U_0603_16V7K PC113
1 2
PR158
PR157
5.1K_0603_1%
1 2
1 2
13
D
PQ27
2
G
2N7002_SOT23
S
1
PQ28 MMBT3904_SOT23
3
+5VALWP
20K_0603_1%
1 2
12
PC108 1000P_0603_50V7K
12
PC114 1U_0603_10V6K
0_0603_5%
PC110 1000P_0603_50V7K@
12
PC111 1000P_0603_50V7K@
2N7002_SOT23
PR159 0_0603_5%
PR162
12
PR163
12
0_0603_5%@
12
VGATE 24
PWM1 54 ISEN1+ 54 ISEN1- 54 PWM2 54 ISEN2+ 54 ISEN2- 54 PWM3 55 ISEN3+ 55 ISEN3- 55 PWM4 55 ISEN4+ 55
PR144
PR148 0_0603_5%@
PQ24
PR160 0_0603_5%@
ISEN4- 55
12
1 2
PR150 1.91K_0603_1%
S
Place near +VCC_CORE output capacitor
VSSSENSE 5
G
2
12
D
13
12
PR153
16.2K_0603_1%
+CPU_CORE
12
Remote Sensing
VCCSENSE 5
1. When mode control signal is
4 4
A
high/ low, the VR will operate to Northwood/ Prescott load line.
2. VID5(12.5) should be pulled high, when the VR operates to Nothwood load line.
BOOTSELECT=1
BOOTSELECT=0
B
PRESCOTT
NORTHWOOD
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NE ITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Title
Size Document Number Rev
Date: Sheet of
Compal Electronics, Inc.
CPU_CORE_Controller
LA-1841
D
53 57Thursday, February 20, 2003
Page 54
A
B
C
D
+5VALWP
PR168 0_0603_5%
PC124
1 2
1 2
1 1
PWM153
PR171 499K_0603_1%@
1 2
PR170
0_0603_5%
0.1U_0603_16V7K
12
PC123
1 2
1U_0805_25V4Z
CPU_DRIVE_EN
PC117
0.15U_0805_16V7K
PU13
6
BOOT
VCC
3
PWM
UGATE
7
EN
PHASE
LGATEGND
ISL6207CB-T_SO8
12
2
N5
1
0_0603_5%
8 54
IRF7811A_SO8
PR169
12
PHASE1
SI4362DY_SO8
PQ29
PQ31
876
876
5
D
S
134
2
5
DDD
DDD
SSG
D
4.7U_1210_25V6K
SSG
S
PQ30
IRF7811A_SO8
134
2
N6
876
876
5
D
S
134
2
5
PQ32
DDD
DDD
SSG
D
SI4362DY_SO8
SSG
S
134
2
CPU_B+
PC120
4.7U_1210_25V6K
1 2
@220P_0603_50V8J
4.7U_1210_25V6K
12
12
PC121
PR172
@68_0805_5%
PC126
PC122
100U_25V_M
12
Snubber
12
1
1
+
+
PC118
100U_25V_M
2
2
0.6U_HK_AE26A0R6_26A_25%
PC119
PR173
32.4K_0603_1%
PL14
CHT_C8BBPH853025_13A
1 2
PL15
1 2
12
PC125
12
0.01U_0603_16V7K
N7
ISEN1-53
2 2
PWM253
3 3
ISEN1+53
PC127
1 2
PR174 0_0603_5%
0.15U_0805_16V7K
1 2
PU14
6
VCC
3
PWM
7
1 2
EN
ISL6207CB-T_SO8
PR176
499K_0603_1%@
1 2
PC131
1U_0805_25V4Z
BOOT
UGATE
PHASE
LGATEGND
2
PR175
N8
1
0_0603_5%
8 54
SI4362DY_SO8
12
PHASE2
PQ35
876
5
PQ33
DDD
D
IRF7811A_SO8
SSG
S
134
2
N9
876
5
DDD
D
SSG
S
134
2
5
D
5
D
876
PQ34
DDD
IRF7811A_SO8
SSG
S
134
2
876
PQ36
DDD
SI4362DY_SO8
SSG
S
134
2
CPU_B+
PC128
12
4.7U_1210_25V6K
4.7U_1210_25V6K
PC129
12
12
PC130
4.7U_1210_25V6K
PR177
@68_0805_5%
PC132
@220P_0603_50V8J
Local Transistor Swtich Decoupling
PL16
12
12
1 2
0.6U_HK_AE26A0R6_26A_25%
PR178
12
32.4K_0603_1%
PH4
12
820_0603_1%~D
PC133
12
0.01U_0603_16V7K
+CPU_CORE
N10
ISEN2-53 ISEN2+53
Local Transistor Swtich Decoupling
PH5
12
820_0603_1%~D
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NE ITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
A
B
INC.
C
Title
Size Document Number Rev
Date: Sheet of
Compal Electronics, Inc.
CPU_CORE_Power stage 1
LA-1841
D
54 57Thursday, February 20, 2003
Page 55
A
B
C
D
1 1
+5VALWP
PR179 0_0603_5%
1 2
PWM353
PR181
499K_0603_1%@
1 2
2 2
CPU_DRIVE_EN
1U_0805_25V4Z
ISEN3-53 ISEN3+53
PC138
1 2
PR184 0_0603_5%
1 2
PWM453
499K_0603_1%@
3 3
PR186
PC145
1 2
1U_0805_25V4Z
1 2
PC134
1 2
0.15U_0805_16V7K
PU15
6
BOOT
VCC
3
PWM
UGTE
7
EN
PHSE
LGTEGND
ISL6207CB-T_SO8~D
PC141
1 2
0.15U_0805_16V7K
PU16
6
BOOT
VCC
3
PWM
UGTE
7
EN
PHSE
LGTEGND
ISL6207CB-T_SO8~D
2
PR180
N11
1
0_0603_5%
8 54
N13
2
PR185
N14
1
0_0603_5%
8 54
SI4362DY_SO8~D
578
N12
12
PHASE3
578
PQ39
SI4362DY_SO8~D
578
N15
12
PHASE4
578
PQ43
3 6
241
3 6
241
IRF7811A_SO8~D
3 6
241
3 6
241
578
PQ37 IRF7811A_SO8~D
3 6
241
578
PQ40
3 6
241
578
PQ41
3 6
241
578
PQ44
3 6
241
4.7U_1210_25V6K
PQ38
IRF7811A_SO8~D
SI4362DY_SO8~D
PQ42
IRF7811A_SO8~D
SI4362DY_SO8~D
N16
ISEN4-53 ISEN4+53
CPU_B+
PC135
12
4.7U_1210_25V6K
CPU_B+
12
4.7U_1210_25V6K
4.7U_1210_25V6K
PC142
PC137
PC136
12
12
4.7U_1210_25V6K
12
PR182
@68_0805_5%
12
PC140
@220P_0603_50V8J
12
12
PC143
PC144
4.7U_1210_25V6K
12
PR187
@68_0805_5%
12
PC147
@220P_0603_50V8J
PR183
32.4K_0603_1%
1 2
0.6U_HK_AE26A0R6_26A_25%
PR188
32.4K_0603_1%
PL17
12
0.6U_HK_AE26A0R6_26A_25%
12
PC139
0.01U_0603_16V7K
PH6
820_0603_1%~D
Local Transistor Swtich Decoupling
PL18
12
PC146
0.01U_0603_16V7K
PH7 820_0603_1%~D
1 2
12
12
+CPU_CORE
12
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NE ITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
A
B
INC.
C
Title
Size Document Number Rev
Date: Sheet of
Compal Electronics, Inc.
CPU_CORE_Power stage 2
LA-1841
D
55 57Thursday, February 20, 2003
Page 56
5
4
3
2
1
+5VALWP
D D
PC149
4.7U_1206_10V7K
C C
B B
PR189 0_1206_5%
1 2
12
12
PR191
1.2K_0603_0.5%
12
PC152
0.1U_0603_25V7K
PC148
12
1000P_0603_50V7K
PR190
1 2
32.4K_0603_1%
PU17
1
-IN
2
SCP
3
VCC
4
BR/CTL
PJ3800_SOP8
12
PR192 390_0603_5%
1 2
PL19
0.56U_ETQP4LR56WFC_21A_20%~D
8
FB
7
OSC
6
GND
5
OUT
12
PC153 270P_0603_16V8K
12
PR193 3K_0603_0.5%
12
PC154
0.1U_0603_25V7K
2
G
PD26
2 1
EP10QY03
13
D
PQ45
S
SI2302_SOT23
12
PC150 10U_1210_25V6K
+12V_FANP
12
PC151 10U_1210_25V6K
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS C ONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
5
4
3
INC.
2
Title
Size Document Number Rev
Date: Sheet of
Compal Electronics, Inc.
12V_FAN
LA-1841
56 57Thursday, February 20, 2003
1
Page 57
BTQ00 PIR LIST
************* Rev0.1 PIR List **************
PROPRIETARY NOTE
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
BTQ00 PIR LIST
Size Document Number Rev
B
LA-1841
Date: Sheet of
57 57Thursday, February 20, 2003
Page 58
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