Compal LA-1761 Schematic

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COMPAL CONFIDENTIAL

1 1

COMPAL P/N : PCB NO : Revision :

LA-1761

2.0

DATE :

2 2

LA-1761 Schematics Document

uFCBGA/uFCPGA Northwood

2003-03-12

3 3

REV: 2.0

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

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Title

Size Do cum e nt Number R e v

401248

Dat e : Sheet

Com pal Electronics, Inc.

SCH E MATIC, M/B LA-1761

期四三月

2A

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147¬P , 27, 2003

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Compal confidential

DT Northwood

1 1

File Name : LA-1761

CPUVID

page 7

CPU Bypass & Fan Control

page 6

uFCBGA/uFCPGA CPU

page 4,5

System Bus

533/400MHz

HD#(0..63)HA#(3 ..31)

Memory

2 2

3 3

4 4

IDSEL:AD16 (PIRQA#,GNT#0,REQ#0)

5 5

6 6

CRT Connector

page 15

VGA Board

Mini PCI Conn.

IDSEL:AD18/22 (PIRQC/D#,GNT#1/4,REQ#1/4)

VT1307S

1394

page 25

DC/DC Interface Suspend

page 37

Power Circuit

AGP Conn

page 34

PCI BUS

IDSEL:AD20 (PIRQA#,GNT#2,REQ#2)

CardBus Controller

AGP4X(1.5V)

page 15

RJ45

LAN

RTL 8100BL

IDSEL:AD17 (PIRQB#,GNT#3,REQ#3)

3.3V 33MHz

OZ-6912

page 22

Slot 0

page 23

14M_5V

EC 87591L

page 24

page 29

Broo kdale-PE

760 BGA

ICH4

421 BGA

LPC BUS

3.3V 33MHz

Card Reader W83L 518D

HUB Link

1.5V 66MHz

page 16,17,18

page 26

page 8,9,10

SMsC LPC47N227

BUS(DDR)

2.5V 333MHz

USB interface

3.3V 480MHz

3.3V 24.576MHz

3.3V ATA100

page 27

DC/DC

page 38,39,40,41,42,43,44,45

7 7

SPR Conn.

B

page 33

C

8 8

A

Touch Pad

page 28

EC Ext. I/O

page 30

BIOS

page 30

Int.KBD

page 32

D

MS CARD

page 26

SD/MMC

page 26

CARD

LPT Port.

FIR

page 28

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

F

FDD

G

Therma l Sensor

page 28

page 19

Clock Generator

ADM1032 ICS950211

page 5

SO-DIMM X2

BANK 0, 1, 2, 3

page 11,12,13

page 14

Bluetooth

page 31

USB 2.0

page 31

AC-LINK

AC97

HDD Connector

page 19

Audio DJ O2 163

page 35

Codec

ALC202

AMP& Phone Jack

CD-ROM Connector

page 19

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1761

Size Do cum e nt Number R e v

401248

Custom Dat e : Sheet

H

期四三月

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page 21

MDC

page 31

247¬P , 27, 2003

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1

SCHEMATICS VERSION LIST

VERSION ISSUE DATE REMARK

D D

Power Managment table

Signal

State

+3VALW +5VALW +12VALW

+3V +5V +2.5V

+3VS +5VS +1.5VS +1.2VP +CPU_CORE

SST-Build

PT-Build

PCB Rev CHIPS Rev

0.1

+1.25VS

S0

S1

S3

S5 S4/AC

S5 S4/AC don't exist

ON

ON ON

ON ON ON

ON ON

ON OFF

OFF

OFF OFF OFF

ST-Build

QT-Build

Ceramic Capacitor Spec Guide:

C C

Temperature Characteristics:

Z5V

J

SL

1

Z5P

A

BJ

Symbol

CODE

0

Z5U

8

NP0 SH

H

UJ

9

C0G SJ

I

UK

3

2

Y5U X7R

C

B

CH

Y5V

CJ

4

5

Y5P

E

D

CK

X5R

6

7

F

G

Tolerance:

F

V

+20,-10%

K

A

+-0.05PF

M

+-20%

Symbol

B B

CODE

+-10%

B

+-0.1PF

N

+-30%

C

+-0.25PF

P

+100,-0%

D

+-0.5PF +-1PF

Q

+30,-10%

G

+-2%

X

+40,-20%

H

+-3%

Z

+80,-20%

J

+-5%

SMBUS Control Table

SOURCE

SMB_EC_CK1 SMB_EC_DA1

SMB_EC_CK2 SMB_EC_DA2

A A

SMB_CLK SMB_DATA

NS 87591

ICH4

5

INVERTER BATT

SERIAL SENSOR EEPROM

(1010)

THERMAL

(U43) (U91)

4

THERMAL SENSOR

SODIMM CLK CHIP

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MINI PCI

NOTE1: @XX : Depop component

Compal Electronics, Inc.

Title

SCHEM A T I C , M / B L A -1761

Size Do cum e nt Number R e v

401248

3

2

Dat e : Sheet

期四三月

347¬P , 27, 2003

1

2A

of

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1 1

+CPU_CORE

AA16

AA18

AA8

AB11

AB13

AB15

AB17

AB19

AB7

AB9

AC10

AC12

AC14

AC16

AC18

AC8

AD11

AD13

AD15

AD17

AD19

AD7

AD9

AE10

AE12

AE14

AE16

AE18

AE20

AE6

AE8

AF11

AF13

AF15

AF17

AF19

AF2

AF21

AF5

AF7

AF9

B11

B13

B15

B17

B19

C10

C12

C14

C16

C18

C20

D11

D13

D15

D17

D19

D9

A10

A12

A14

A16

A18

A20

AA10

AA12

AA14

VCC_3

VCC_4

VCC_5

VCC_6A8VCC_7

VCC_8

VCC_9

VCC_10

VCC_11

VCC_12

VCC_13

VCC_14

VCC_15

VCC_16

VCC_17

VCC_18

VCC_19

VCC_20

VCC_21

VCC_22

VCC_23

VCC_24

VCC_25

VCC_26

VCC_27

VCC_28

VCC_29

VCC_30

VCC_31

VCC_32

VCC_33

VCC_34

VCC_35

VCC_36

VCC_37

VCC_38

VCC_39

VCC_40

VCC_41

VCC_42

VCC_43

VCC_44

VCC_45

VCC_46

VCC_47

VCC_48

VCC_49

VCC_50

VCC_51

VCC_52

VCC_53

VCC_54

VCC_55

VCC_56B7VCC_57B9VCC_58

VCC_59

VCC_61

VCC_62

VCC_63

VCC_64

VCC_65C8VCC_66

DeskTop

NorthWood

VSS_3

VSS_4

VSS_5

VSS_6

VSS_7

VSS_8

VSS_9

VSS_10

VSS_11

VSS_12A3VSS_13A9VSS_14

VSS_15

VSS_16

VSS_17

VSS_18

VSS_19

VSS_20

VSS_21

VSS_22

VSS_23

VSS_24

VSS_25

VSS_26

VSS_27

VSS_28

VSS_29

VSS_30

VSS_31

VSS_32

VSS_33

VSS_34

VSS_35

VSS_36

VSS_37

VSS_38

VSS_39

VSS_40

VSS_41

VSS_42

VSS_43

VSS_44

VSS_45

VSS_46

VSS_47

VSS_48

VSS_49

VSS_50

VSS_51

VSS_52

VSS_53

VSS_54

VSS_55

VSS_56

VCC_81

VCC_82

VCC_83

VCC_84

VCC_85

F9

F11

F13

F15

F17

A11

A13

A15

A17

A19

A21

A24

H23

H26

A26

AA1

AA11

AA13

AA4

AA7

AA15

AA17

AA9

AA19

AA23

AA26

AB10

AB12

AB14

AB3

AB6

AB16

AB8

AB18

AB20

AB21

AB24

AC2

AC5

AC7

AC9

AC11

AC13

AC15

AC17

AC19

AD1

AC22

AC25

AD10

AD12

AD4

AD14

AD16

AD18

AD21

AD23

AD8

F19

K2 K4 L6 K1 L3

M6

L2 M3 M4

N1 M1

N2

N4

N5

T1

R2

P3

P4

R3

T2

U1

P6

U3

T4

V2

R6 W1

T5

U4

V3 W2

Y1

AB1

J1

K5

J4 J3

H3 G1

AC1

V5

AA3 AC3

H6

D2 G2 G4

AF22 AF23

F3

E3

E2

DTNorthWood

U32A

A#3 A#4 A#5 A#6 A#7 A#8 A#9 A#10 A#11 A#12 A#13 A#14 A#15 A#16 A#17 A#18 A#19 A#20 A#21 A#22 A#23 A#24 A#25 A#26 A#27 A#28 A#29 A#30 A#31 A#32 A#33 A#34 A#35

REQ#0 REQ#1 REQ#2 REQ#3 REQ#4 ADS#

AP#0 AP#1 BINIT# IERR#

BR0# BPRI# BNR# LOCK#

BCLK0 BCLK1

HIT# HITM# DEFER#

VCC_0

VCC_1

VCC_2

VSS_0H1VSS_1H4VSS_2

HA#[3..31]<8>

2 2

3 3

4 4

H_REQ#[0..4]<8>

H_ADS#<8>

5 5

6 6

+CPU_CORE

H_BREQ0#<8>

H_BPRI#<8>

H_BNR#<8>

H_LOCK#<8>

CLK_CPU_BCLK<14>

CLK_CPU_BCLK#<14>

H_HIT#<8>

H_HITM#<8>

H_DEFER#<8>

HA#[3..31]

H_REQ#[0..4]

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

12

R316 200_0402_5%

CLK_CPU_BCLK CLK_CPU_BCLK#

HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31

E10

VCC_67

VCC_68

VCC_69

VCC_70

VCC_71D7VCC_72

VCC_73

D#0 D#1 D#2 D#3 D#4 D#5 D#6 D#7 D#8

D#9 D#10 D#11 D#12 D#13 D#14 D#15 D#16 D#17 D#18 D#19 D#20 D#21 D#22 D#23 D#24 D#25 D#26 D#27 D#28 D#29 D#30 D#31 D#32 D#33 D#34 D#35 D#36 D#37 D#38 D#39 D#40 D#41 D#42 D#43 D#44 D#45 D#46 D#47 D#48 D#49 D#50 D#51 D#52 D#53 D#54 D#55 D#56 D#57 D#58 D#59 D#60 D#61 D#62 D#63

VCC_74

VCC_75

VCC_76

VCC_77

VCC_78

VCC_79E8VCC_80

E12

E14

E16

E18

E20

B21 B22 A23 A25 C21 D22 B24 C23 C24 B25 G22 H21 C26 D23 J21 D25 H22 E24 G23 F23 F24 E25 F26 D26 L21 G26 H24 M21 L22 J24 K23 H25 M23 N22 P21 M24 N23 M26 N26 N25 R21 P24 R25 R24 T26 T25 T22 T23 U26 U24 U23 V25 U21 V22 V24 W26 Y26 W25 Y23 Y24 Y21 AA25 AA22 AA24

HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63

HD#[0..63]

HD#[0..63] <8>

7 7

+CPU_CORE

FD11

1

8 8

FIDUCIAL MARK

A

FD9

1

FIDUCIAL MARK

B

FD1

1

FIDUCIAL MARK

FD12

1

FIDUCIAL MARK

C

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

E

F

G

H

SCHEMATIC, M/B LA-1761

Size Do cum e nt Number R e v

401248

Custom Dat e : Sheet

期四三月

I

of

447¬P , 27, 2003

J

2A

A

B

C

U32B

D

AE11

AE13

AE15

AE17

AE19

AE22

AE24

AE26

AE7

AE9

E

AF1

AF10

AF12

AF14

AF16

AF18

AF20

AF6

AF8

B10

B12

B14

B16

B18

B20

AF26

B23

F

B26

C11

C13

C15

C17

C19

C22

C25

D10

D12

D14

D16

G

D18

D20

D21

D24

E11

E13

E15

E17

E19

E23

E26

H

F10

F12

F14

F16

F18

F22

F25

F5

I

J

1 1

VSS_57

VSS_58

VSS_59

VSS_60

VSS_61

VSS_62

VSS_63

VSS_64

VSS_65

VSS_66

VSS_67

VSS_68

VSS_69

VSS_70

VSS_71

VSS_72

VSS_73

VSS_75

VSS_76

VSS_77

VSS_78

VSS_79

VSS_80

VSS_81

VSS_82

VSS_83

VSS_84

VSS_85B4VSS_86B8VSS_87

VSS_88

VSS_89

VSS_90

VSS_91

VSS_92C2VSS_93

VSS_94

VSS_95C5VSS_96C7VSS_97C9VSS_98

VSS_99

VSS_100

VSS_101

VSS_102

VSS_103

VSS_104

VSS_105

VSS_106D3VSS_107D6VSS_108D8VSS_109E1VSS_110

VSS_111

VSS_112

VSS_113

VSS_114

VSS_115

VSS_116

VSS_117E4VSS_118E7VSS_119E9VSS_120

VSS_121

VSS_122

VSS_123

VSS_124

VSS_125F2VSS_126

VSS_127

NC5

NC6

AF24

AE21

CPU_VID4 <7,43> CPU_VID3 <7,43> CPU_VID2 <7,43> CPU_VID1 <7,43> CPU_VID0 <7,43>

1 2

3 1

H

VSS_128

J26

DP#0

K25

DP#1

K26

DP#2 DP#3

GTLREF0 GTLREF1 GTLREF2 GTLREF3

NC1 NC2

TESTHI0 TESTHI1 TESTHI2 TESTHI3 TESTHI4

TESTHI5 ITPCLKOUT0 ITPCLKOUT1

TESTHI8

TESTHI9

TESTHI10

GHI#

DSTBN#0 DSTBN#1 DSTBN#2 DSTBN#3

DSTBP#0 DSTBP#1 DSTBP#2 DSTBP#3

ADSTB#0 ADSTB#1

DBI#0 DBI#1 DBI#2 DBI#3

DBR#

PROCHOT#

MCERR#

SLP#

VSSA

VSSSENSE

NC3 NC4

VCCVID

AF4

R117 @470_0402

2

1 2

R104 @820_0402 Q8 @3904

+H_GTLREF1

L25

AA21 AA6 F20 F6 A22 A7

TESTTHI0_1

AD24 AA2

TESTTHI2_7

AC21 AC20 AC24 AC23 AA20 AB22

TESTTHI8_10

U6 W4 Y3

H_GHI#

A6

H_DSTBN#0

E22

H_DSTBN#1

K22

H_DSTBN#2

R22

H_DSTBN#3

W22

H_DSTBP#0

F21

H_DSTBP#1

J23

H_DSTBP#2

P23

H_DSTBP#3

W23

L5 R5

H_DBI#0

E21

H_DBI#1

G25

H_DBI#2

P26

H_DBI#3

V21 AE25

H_PROCHOT#

C3 V6

H_SLP#

AB26

H_VSSA

AD22 A4

AD2 AD3

+1.2VP

C184 .1U_0402_16V4Z

R504 @820_0402

12

C711 @.47UF_0603

Compal Electronics, Inc.

Title

SCHEM AT IC , M/ B LA- 1761

Size Document N umber Re v

401248

Custom

星期四三月

Date: Sheet

R90 56_0402_5% R26 56_0402_5%

R91 56_0402_5%

R77 56_0402_5%

H_DSTBN#[0..3]

H_DSTBP#[0..3]

H_DBI#[0..3]

R20 @0_0402_5%

1

TP12

H_PROCHOT#

R323 62_0402_5%

H_THERMTRIP#

1 2

27, 2003

I

+CPU_CORE

1 2 1 2

1 2

12

1 2

H_DSTBN#[0..3] <8>

H_DSTBP#[0..3] <8>

H_ADSTB#0 <8> H_ADSTB#1 <8>

H_DBI# [0 ..3 ] <8>

SYSRST# <17>

H_PROCHOT# <41> H_SLP# <16>

+CPU_CORE

H_THERMTRIP# <17>

of

547,

J

2A

SKTOCC#

DeskTop

NorthWood

VID0

VID1

VID2

VID3

VSS_139

VSS_140K3VSS_141K6VSS_142L1VSS_143

VSS_144

VSS_145L4VSS_146M2VSS_147

VSS_148

VSS_149M5VSS_150

VSS_151

VSS_152N3VSS_153N6VSS_154P2VSS_155

VSS_156

VSS_157P5VSS_158R1VSS_159

VSS_160

VSS_161R4VSS_162

VSS_163

VSS_164T3VSS_165T6VSS_166U2VSS_167

VSS_168

VSS_169U5VSS_170V1VSS_171

VSS_172

VSS_173V4VSS_174

VSS_175

VSS_176W3VSS_177W6VSS_178Y2VSS_179

VSS_180

VSS_181

L23

L26

K24

12

M22

M25

GTL Reference Vol tage

Layout note :

1. Place R_A and R_B near CPU (Within 1.5").

2. Place decoupling cap 220PF near CPU.(Within 500mils )

R300

49.9_0603_1%

Trace width>=7mil

R302 100_0603_1%

1U_0603_10V4Z

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C485

P22

N21

N24

E

P25

R23

R26

C490 220P_0603_50V8J

T21

T24

+H_GTLREF1

F

V23

V26

U22

U25

W21

MAINPWON<37,38,40>

Y5

Y22

Y25

W24

PCIRST#<9,15,16,19,22,24,25,27,34>

1 3

Q11

@2N7002

G

VID4

AE5

AE4

AE3

AE2

AE1

+5VS

2

G

@300_5%_0402 1 2

D

S

3 1

R116

Q7 @3904

2

R92

51.1_0603_1%

1 2

AB23 AD25

AB25

AD20 AE23

AF25

AC26 AD26

F1

G5

F4

AB2

J6

C6 B6 B2 B5

Y4

D1 E5

W5

H5

H2 AD6 AD5

B3

C4

A2

AC6 AB5 AC4

Y6 AA5 AB4

D4 C1 D5

F7

E6

A5

AF3

L24

P1

RS#0 RS#1 RS#2 RSP# TRDY#

A20M# FERR# IGNNE# SMI# PWRGOOD STPCLK# DPSLP# LINT0 LINT1 INIT# RESET#

DBSY# DRDY# BSEL0 BSEL1

THERMDA THERMDC

THERMTRIP#

BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5

TCK TDI TDO TMS TRST#

VCCA VCCSENSE VCCIOPLL

NC7 NC8

ITP_CLK0 ITP_CLK1

COMP0 COMP1

DTNorthWood

VSS_129F8VSS_130

G21

VSS_131

VSS_132G3VSS_133G6VSS_134J2VSS_135

G24

VSS_136

VSS_137J5VSS_138

J22

J25

K21

H_RS#0<8> H_RS#1<8> H_RS#2<8>

H_TRDY#<8>

TP11

1

C37 1U_0603_10V4Z

R19

51.1_0603_1%

H_A20M# H_FERR# H_IGNNE# H_SMI# H_PWRGD H_STPCLK# H_GHI# H_INTR H_NMI H_INIT# H_RESET#

H_THERMDA H_THERMDC

H_THERMTRIP#

ITP_BPM0 ITP_BPM1 ITP_BPM2 ITP_BPM3 ITP_PRDY# ITP_PREQ#

ITP_TCK ITP_TDI

ITP_TMS ITP_TRST#

H_VCCA

H_VCCIOPLL

CLK_CPU_ITP CLK_CPU_ITP#

1 2

near CPU

H_A20M#<16>

+CPU_CORE

2 2

R14 300_0402_5%

R12 51.1_0603_1%

Place resistor <100mils from CPU pin

3 3

+CPU_CORE

4 4

5 5

6 6

24 mil

+CPU_CORE

Murata LQG21F4R7N00

R96 51_0402_5% R315 R95 R97 51_0402_5% R94 51_0402_5% R314 51_0402_5%

1 2

R328 1.5K_0402_5%

1 2

R311 1.5K_0402_5%

1 2

R321 680_0402_5%

1 2

R79 1.5K_0402_5%

12

L22

1 2

L21

1 2

12 12

51_0402_5%

12

51_0402_5%

12 12 12

H_PWRGD

H_RESET#

4.7UH_80mA

12

22U_1206_10V4Z

ITP_PREQ# ITP_PRDY# ITP_BPM0 ITP_BPM1 ITP_BPM2 ITP_BPM3

ITP_TDI ITP_TMS ITP_TRST# ITP_TCK

+CPU_CORE

C36

H_FERR#<16>

H_IGNNE#<16>

H_SMI#<16>

H_PWRGD<16>

H_STPCLK#<16>

H_INTR<16>

H_INIT#<16>

H_RESET#<8>

H_DBSY#<8>

H_DRDY#<8>

H_BSEL0<9,14>

near CPU

1 2

R327 62_0402_5%

12 mil 12 mil

12

C39

22U_1206_10V4Z

H_VSSA

CLK_CPU_ITP<14>

CLK_CPU_ITP#<14>

H_NMI<16>

If used ITP port must depop

+5VALW

7 7

THERMDA_591<29>

THERMDC_591<29>

EC_SMC2<29,35>

8 8

EC_SMD2<29,35>

R99 @0_0402

12

C205

2200P_0603_50V7K

12

R98 @0_0402

EC_SMC2 EC_SMD2

12

Width 10mil , Spacing 10mil

parallel and close

H_THERMDA

H_THERMDC

2 3 8 7

12

U8

VDD1

D+

ALERT

D-

THERM

SCLK

GND

SDATA

ADM1032ARM_RM8

C208

.1U_0402_16V4Z

1 6 4 5

12

R105 @10K_0402_5%

+CPU_CORE

R_A

R_B

CPU Temperature Sensor

A

B

C

D

A

B

C

D

E

F

G

H

I

J

1

7

12

+CPU_CORE

12

C464

+

@470U_D2_2.5V_15m

+CPU_CORE

12

C526

+

470U_D2_2.5V_15m

+CPU_CORE

12

C38

+

@470U_D2_2.5V_15m

+CPU_CORE

12

C512

.22U_0603_10V7K

+12VS

R399

3.48K_1%

1 2 21

D16 1N4148

31

Q54

2

2SA1036K

+12VS

R119

3.48K_1%

1 2 21

D11 1N4148

31

2

.22U_0603_10V7K

1 2

Q9 2SA1036K

12

+

470U_D2_2.5V_15m

12

+

12

+

12

C509

.22U_0603_10V7K

Q14

FMMT619

2

C579

2.2UF_16V_0805

Q13

FMMT619

2

C265

2.2UF_16V_0805

12

C471

C534 @470U_D2_2.5V_15m

C53 470U_D2_2.5V_15m

C482

+

470U_D2_2.5V_15m

12

C452

+

470U_D2_2.5V_15m

12

C156

+

470U_D2_2.5V_15m

PLACE ON CPU SIDE

.22U_0603_10V7K

12

C506

C499

.22U_0603_10V7K

D14 1SS355

3 1

2 1

C578

D15

33PF_0402

1N4148

2 1

C279 220PF_0402

D12 1SS355

3 1

2 1

D13

C562

1N4148

33PF_0402

2 1

C268 220PF_0402

.22U_0603_10V7K

12

C83

C266 1000PF_0402

+5VFAN1

C577 .1uF_0402

C250 1000PF_0402

+5VFAN2

C563 .1uF_0402

12

C505

12

C510

+

@470U_D2_2.5V_15m

12

C450

+

470U_D2_2.5V_15m

12

C157

+

470U_D2_2.5V_15m

12

C508

.22U_0603_10V7K

12

C511

+

12

C494

.22U_0603_10V7K

12

C501

470U_D2_2.5V_15m

12

C52 470U_D2_2.5V_15m

.22U_0603_10V7K

12

C498

Fan1 Control circuit

+5VS

JP26

1 2 3

53398-0310

+3VS

12

R156 10K_0402

FAN_SPEED <29>

Fan2 Control circuit

+5VS

JP25

1 2 3

53398-0310

+3VS

12

R151 10K_0402

FAN_SPEED2 <29>

Layout note :

Place close to CPU, Use 2~3 vias per PAD.

1 1

Place .22uF caps underneath balls on solder side. Place 10uF caps on the peripheral near balls. Use 2~3 vias per PAD.

Please place these cap in the socket cavity area

+CPU_CORE

12

2 2

3 3

4 4

5 5

C487

10U_1206_6.3V7K

+CPU_CORE

12

C518

10U_1206_6.3V7K

Please place these cap on the socket north side

+CPU_CORE

12

C74

10U_1206_6.3V7K

+CPU_CORE

12

C119

10U_1206_6.3V7K

+CPU_CORE

12

C145

10U_1206_6.3V7K

12

C484 10U_1206_6.3V7K

12

C517 10U_1206_6.3V7K

12

C73 10U_1206_6.3V7K

12

C131 10U_1206_6.3V7K

12

C132 10U_1206_6.3V7K

12

C93 10U_1206_6.3V7K

12

C516 10U_1206_6.3V7K

12

C40 10U_1206_6.3V7K

12

C144 10U_1206_6.3V7K

12

C120 10U_1206_6.3V7K

12

C527 10U_1206_6.3V7K

12

C94 10U_1206_6.3V7K

12

C473 10U_1206_6.3V7K

12

C148 10U_1206_6.3V7K

12

C107 10U_1206_6.3V7K

12

C519 10U_1206_6.3V7K

12

C82 10U_1206_6.3V7K

12

C106 10U_1206_6.3V7K

12

C149 10U_1206_6.3V7K

EN_FAN1<29>

Layout note :

Place close to CPU power and ground pin as possible (<1inch)

For Desktop's CPU:

ESR total=0.75m ohm C total=6350uF

For Mo b i l e 's CPU:

ESR total=1.875m ohm C total=2590uF

+12VS

C212 .1UF_0402

84

U10A

3

+

2

-

LM358

Please place these cap on the socket south side

+CPU_CORE

12

C67

10U_1206_6.3V7K

6 6

7 7

+CPU_CORE

12

10U_1206_6.3V7K

+CPU_CORE

12

10U_1206_6.3V7K

C150

C504

12

C84 10U_1206_6.3V7K

12

C159 10U_1206_6.3V7K

12

C507 10U_1206_6.3V7K

12

C96 10U_1206_6.3V7K

12

C477 10U_1206_6.3V7K

12

C513 10U_1206_6.3V7K

12

C109 10U_1206_6.3V7K

12

C486 10U_1206_6.3V7K

12

C520 10U_1206_6.3V7K

12

C136 10U_1206_6.3V7K

12

C495 10U_1206_6.3V7K

EN_FAN2<29>

12

R137 13K_1%

R112 13K_1%

R136 7.32K_1%

+12VS

84

U10B

5

+

6

-

LM358

R111 7.32K_1%

8 8

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

D

E

F

G

H

Compal Electronics, Inc.

Title

SCHEM AT IC , M/ B LA- 1761

Size Document N umber Re v

401248

Custom

星期四三月

Date: Sheet

27, 2003

I

of

647,

J

2A

10

H H

9

8

7

6

5

4

3

2

1

Desktop CPU

VID

01234

VCC

G G

1.750V

1.700V

1.650V

1.600V

1.550V

1.500V

1.450V

F F

+3VS

CPU_VID0<5,43>

CPU_VID1<5,43>

E E

CPU_VID2<5,43>

CPU_VID3<5,43>

CPU_VID4<5,43>

CPU_VID0

CPU_VID1

CPU_VID2

CPU_VID3

CPU_VID4

R352 1K_0402_5%

R357 1K_0402_5%

R359 1K_0402_5%

R362 1K_0402_5%

R366 1K_0402_5%

12

1.400V

1.350V

1.300V

1.250V

1.200V

1.150V

1.100V

1.050V

1.000V

0.975V

0.950V

0.925V

0.900V

0.875V

D D

0.850V XXXXX

0.825V

0.800V

0.775V

0.750V

0.725V

0.700V

C C

0.675V

0.650V

0.625V

0.600V VRM output off1111

00 01 00011

1

0 0 0 0 1 1 1 1 1 1 1 1

0

11

1

0

1

0

1

0 1

0

1

0

1

0 0

0

11

0

0 0

0

1

0

1

0

1

0 0

0

1

XXXXX

X

X XXX

XXXXX

X XX XXXX

X

XXXXX

1

B B

Compal Electronics, Inc.

A A

10

9

8

7

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

6

5

4

Title

SCHEM A T I C , M / B L A -1761

Size Do cum e nt Number R e v

401248

Custom Dat e : Sheet

3

期四三月

2

747¬P , 27, 2003

2A

of

1

5

4

3

2

1

DDR_SDQ[0..63]<11>

HD#[0..63] HA#[3..31]

U31A

BROOKDALE-GL/PE

T30

HD#0

R33

HD#1

R34

HD#2

N34

HD#3

R31

HD#4

L33

HD#5

L36

HD#6

P35

HD#7

J36

HD#8

K34

HD#9

K36

HD#10

M30

HD#11

M35

HD#12

L34

HD#13

K35

HD#14

H36

HD#15

G34

HD#16

G36

HD#17

J33

HD#18

D35

HD#19

F36

HD#20

F34

HD#21

E36

HD#22

H34

HD#23

F35

HD#24

D36

HD#25

H35

HD#26

E33

HD#27

E34

HD#28

B35

HD#29

G31

HD#30

C36

HD#31

D33

HD#32

D30

HD#33

D29

HD#34

E31

HD#35

D32

HD#36

C34

HD#37

B34

HD#38

D31

HD#39

G29

HD#40

C32

HD#41

B31

HD#42

B32

HD#43

B30

HD#44

B29

HD#45

E27

HD#46

C28

HD#47

B27

HD#48

D26

HD#49

D28

HD#50

B26

HD#51

G27

HD#52

H26

HD#53

B25

HD#54

C24

HD#55

B23

HD#56

B24

HD#57

E23

HD#58

C22

HD#59

G25

HD#60

B22

HD#61

D24

HD#62

G23

HD#63

L31

HDSTBP0#

J34

HDSTBP1#

E29

HDSTBP2#

E25

HDSTBP3#

N31

HDSTBN0#

G33

HDSTBN1#

C30

HDSTBN2#

D25

HDSTBN3#

D22

CPURST#

K30

HCLK

J31

HCLK#

D27

HD_VREF2

H24

HD_VREF1

H30

HD_VREF0

AD30

HA_VREF

P30

HCC_VREF

HOST,HUB

BROOKDALE-GL/PE_760P

C66

HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63

12

C95 .1U_0402_10V6K

D D

C C

B B

H_DSTBP#0<5> H_DSTBP#1<5> H_DSTBP#2<5> H_DSTBP#3<5> H_DSTBN#0<5> H_DSTBN#1<5> H_DSTBN#2<5> H_DSTBN#3<5>

H_RESET#<5>

CLK_MCH_BCLK<14>

CLK_MCH_BCLK#<14>

CLK /# 10us > RSTIN#

MCH_GTLREF<10>

A A

.1U_0402_10V6K

HD#[0..63] <4> HA#[3..31] <4>

HA#3 HA#4 HA#5 HA#6 HA#7 HA#8

HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31

HADSTB0# HADSTB1#

HIT#

HITM#

ADS# BNR#

BPRI#

BREQ0#

DBSY#

DEFER#

DRDY# HTRDY# HLOCK#

DINV3 DINV2 DINV1 DINV0

HREQ0# HREQ1# HREQ2# HREQ3# HREQ4#

HI10

HI9 HI8 HI7 HI6 HI5 HI4 HI3 HI2 HI1 HI0

HI_STBS

HI_STBF

RS2# RS1# RS0#

HX_RCOMP HY_RCOMP

HX_SWING HY_SWING

HI_VREF

HI_RCOMP

HI_SWING

W31 AA33 AB30 V34 Y36 AC33 Y35 AA36 AC34 AB34 Y34 AB36 AC36 AC31 AF35 AD36 AD35 AE34 AD34 AE36 AF36 AE33 AF34 AG34 AG36 AE31 AH35 AG33 AG31

AB35 AF30

P36 M36 T36 T34 M34 U33 U31 N36 U36 V30 T35

C26 B33 C35 N33

V36 AA31 W33 AA34 W35

AF2 AE2 AF3 AE5 AE4 AF4 AD8 AC5 AC7 AB8 AA7

AD4 AC4

P34 U34 R36

B28 V35 H28 Y30 AD3 AC2 AD2

HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31

HI10 HI9 HI8 HI7 HI6 HI5 HI4 HI3 HI2 HI1 HI0

HX_RCOMP HY_RCOMP

R59

1 2

68_0603_1%

12

C134 .1U_0402_10V6K

H_ADSTB#0 <5> H_ADSTB#1 <5>

H_HIT# <4> H_HITM# <4> H_ADS# <4> H_BNR# <4> H_BPRI# <4> H_BREQ0# <4> H_DBSY# <5> H_DEFER# <4> H_DRDY# <5> H_TRDY# <5> H_LOCK# <4>

H_DBI#3 <5> H_DBI#2 <5> H_DBI#1 <5> H_DBI#0 <5>

H_REQ#0 <4> H_REQ#1 <4> H_REQ#2 <4> H_REQ#3 <4> H_REQ#4 <4> HI[0..10] <16>

HUB_PSTRB <16> HUB_PSTRB# <16>

H_RS#2 <5> H_RS#1 <5> H_RS#0 <5>

10 mil 10 mil

H_XY_SW ING <10> HUB_VREF <10,16> HUB_VSWING <10,16>

12

1 2

R292 24.9_0603_1%

1 2

R308 24.9_0603_1%

+1.5VS

C60 .1U_0402_10V6K

DDR_SDQS[0..7]<11> DDR_SDM[0..7]<11> DDR_SMA[0..12]<11>

DDR_CLK2#<11>

DDR_CLK2<11>

DDR_CLK1#<11>

DDR_CLK1<11>

DDR_SDQ0 DDR_SDQ1 DDR_SDQ2 DDR_SDQ3 DDR_SDQ4 DDR_SDQ5 DDR_SDQ6 DDR_SDQ7 DDR_SDQ8 DDR_SDQ9 DDR_SDQ10 DDR_SDQ11 DDR_SDQ12 DDR_SDQ13 DDR_SDQ14 DDR_SDQ15 DDR_SDQ16 DDR_SDQ17 DDR_SDQ18 DDR_SDQ19 DDR_SDQ20 DDR_SDQ21 DDR_SDQ22 DDR_SDQ23 DDR_SDQ24 DDR_SDQ25 DDR_SDQ26 DDR_SDQ27 DDR_SDQ28 DDR_SDQ29 DDR_SDQ30 DDR_SDQ31 DDR_SDQ32 DDR_SDQ33 DDR_SDQ34 DDR_SDQ35 DDR_SDQ36 DDR_SDQ37 DDR_SDQ38 DDR_SDQ39 DDR_SDQ40 DDR_SDQ41 DDR_SDQ42 DDR_SDQ43 DDR_SDQ44 DDR_SDQ45 DDR_SDQ46 DDR_SDQ47 DDR_SDQ48 DDR_SDQ49 DDR_SDQ50 DDR_SDQ51 DDR_SDQ52 DDR_SDQ53 DDR_SDQ54 DDR_SDQ55 DDR_SDQ56 DDR_SDQ57 DDR_SDQ58 DDR_SDQ59 DDR_SDQ60 DDR_SDQ61 DDR_SDQ62 DDR_SDQ63

Layout note :

1. HX _R COM P , HY_RCOMP T race width 10 mil.

2. Terminator Max 500 mil .

Close to H28 Close to Y30

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

DDR_SDQ[0..63] DDR_SDQS[0..7] DDR_SDM[0..7] DDR_SMA[0..12]

U31B

AN4

SDQ_0

AP2

SDQ_1

AT3

SDQ_2

AP5

SDQ_3

AN2

SDQ_4

AP3

SDQ_5

AR4

SDQ_6

AT4

SDQ_7

AT5

SDQ_8

AR6

SDQ_9

AT9

SDQ_10

AR10

SDQ_11

AT6

SDQ_12

AP6

SDQ_13

AT8

SDQ_14

AP8

SDQ_15

AP10

SDQ_16

AT11

SDQ_17

AT13

SDQ_18

AT14

SDQ_19

AT10

SDQ_20

AR12

SDQ_21

AR14

SDQ_22

AP14

SDQ_23

AT15

SDQ_24

AP16

SDQ_25

AT18

SDQ_26

AT19

SDQ_27

AR16

SDQ_28

AT16

SDQ_29

AP18

SDQ_30

AR20

SDQ_31

AR22

SDQ_32

AP22

SDQ_33

AP24

SDQ_34

AT26

SDQ_35

AT22

SDQ_36

AT23

SDQ_37

AT25

SDQ_38

AR26

SDQ_39

AP26

SDQ_40

AT28

SDQ_41

AR30

SDQ_42

AP30

SDQ_43

AT27

SDQ_44

AR28

SDQ_45

AT30

SDQ_46

AT31

SDQ_47

AR32

SDQ_48

AT32

SDQ_49

AR36

SDQ_50

AP35

SDQ_51

AP32

SDQ_52

AT33

SDQ_53

AP34

SDQ_54

AT35

SDQ_55

AN36

SDQ_56

AM36

SDQ_57

AK36

SDQ_58

AJ36

SDQ_59

AP36

SDQ_60

AM35

SDQ_61

AK35

SDQ_62

AK34

SDQ_63

BROOKDALE-GL/PE_760P

AK22

AP11

AL33

AN21

AN9

AL21

AN11

AM34

SCMD_CLK0

SCMD_CLK1

SCMD_CLK2

SCMD_CLK0#

SCMD_CLK1#

AN34

AP21

AP9

AP33

SCMD_CLK3

SCMD_CLK4

SCMD_CLK5

SCMD_CLK2#

SCMD_CLK3#

SCMD_CLK4#

BROOKDALE-GL/PE

DDR

DDR_CLK4 <12> DDR_CLK4# <12> DDR_CLK5 <12> DDR_CLK5# <12>

DDR_SMA12

SMAB5 SMAB4 SMAB2 SMAB1

SBA1 SBA0

SDQS0 SDQS1 SDQS2 SDQS3 SDQS4 SDQS5 SDQS6 SDQS7

SDM0 SDM1 SDM2 SDM3 SDM4 SDM5 SDM6 SDM7

SM_VREF

AN15 AL15 AK26 AK16 AN17 AP17 AP19 AL17 AL19 AK20 AP23 AN25 AL25 AK18 AN19 AN23 AP25

AP27 AN27

AR2 AT7 AT12 AT17 AR24 AT29 AT34 AL36

AP4 AR8 AP12 AR18 AT24 AP28 AR34 AL34

AL13 AK14 AN13 AP13

AL29 AP31 AK30 AN31

AK28 AN29 AP29

AK24 AL23

AJ34 AM2

DDR_SMA11 DDR_SMA10 DDR_SMA9 DDR_SMA8 DDR_SMA7 DDR_SMA6 DDR_SMA5 DDR_SMA4 DDR_SMA3 DDR_SMA2 DDR_SMA1 DDR_SMA0 DDR_SMAB5 DDR_SMAB4 DDR_SMAB2 DDR_SMAB1

DDR_SBS1 DDR_SBS0

DDR_SDQS0 DDR_SDQS1 DDR_SDQS2 DDR_SDQS3 DDR_SDQS4 DDR_SDQS5 DDR_SDQS6 DDR_SDQS7

DDR_SDM0 DDR_SDM1 DDR_SDM2 DDR_SDM3 DDR_SDM4 DDR_SDM5 DDR_SDM6 DDR_SDM7

DDR_CKE3 DDR_CKE2 DDR_CKE1 DDR_CKE0

DDR_SCS#0 DDR_SCS#1 DDR_SCS#2 DDR_SCS#3

DDR_SRAS# DDR_SCAS# DDR_SWE#

RDCLKO RDCLKI

SMY_RCOMP

12 mil 12 mil

12

C194 .1U_0402_10V6K

DDR_SMAB5 <12> DDR_SMAB4 <12> DDR_SMAB2 <12> DDR_SMAB1 <12>

DDR_SBS1 <11> DDR_SBS0 <11>

DDR_CKE3 <12> DDR_CKE2 <12> DDR_CKE1 <11> DDR_CKE0 <11>

DDR_SCS#0 <11> DDR_SCS#1 <11> DDR_SCS#2 <12> DDR_SCS#3 <12>

DDR_SRAS# <11> DDR_SCAS# <11> DDR_SWE# <11>

12

R80 @0_0603_5%

R326 60.4_0603_1%

SDREF

12

R322

60.4_0603_1%

RDCLKI & RDCLKO 100mils LENGTH 5mils WIDTH

12

+2.5V

12

C537 .1U_0402_10V6K

SMAA12/BS0 SMAA11/DQS8 SMAA10/DQ31

SMAA9/SMA3 SMAA8/SMA4

SCMD_CLK5#

SMAA7/SMA6

SMAA6/SDQ29

SMAA5/SMA8

SMAA4/SMA11

SMAA3/SMA7

SMAA2/SMA9 SMAA1/SDQ19 SMAA0/SMA12

SCKE3/SCK#5

SCKE2/RSVD SCKE1/SDQ58

SCKE0/RSVD

SCS#0/SCKE2

SCS#1/RSVD

SCS#2/SCK#2 SCS#3/SCAS#

SRAS#/SCKE0

SCAS#/RSVD

SWE#/SDQ5

SRCVEN_OUT#

SRCVEN_IN#

SMY_RCOMP

near MCH/PE < 1"

Title

Size Do cum e nt Number R e v

401248

2

Dat e : Sheet

Com pal Electronics, Inc.

SCHEMATIC, M/B LA-1761

期四三月

2A

of

847¬P , 27, 2003

1

A

40.2_1%__0603

AGP_ADSTB0

12

AGP_ADSTB1

12

AGP_ADSTB0#

12

AGP_ADSTB1#

12

AGP_SBSTB#

12

+1.5VS

12

R41 1K_1%

12

R44 1K_1%

A

AGP_AD[0..31] AGP_SBA[0..7]

AGP_PIPE# AGP_SBA0 AGP_SBA1 AGP_SBA2 AGP_SBA3 AGP_SBA4 AGP_SBA5 AGP_SBA6 AGP_SBA7

AGP_ST0 AGP_ST1 AGP_ST2

AGP_C/BE#3 AGP_C/BE#2 AGP_C/BE#1 AGP_C/BE#0

R27

AGP_SBSTB

< 0.5'

12

U31C

H8 C3 C2 D3 D2

E4 E2 F3 F2

G5 G7

C4

B4 B3

V8 U7 M8

L7

F4

E5 M4

N7 N5

P2 N2 D5

P4

B5 H2 M2 N4 R4

L2 W2

B7 C6 D7 C7

B16

BROOKDALE-GL/PE_760P

12

C125 .1U_0402_10V6K

AGP_FRAME# AGP_TRDY# AGP_PAR AGP_STOP#

AGP_GNT# AGP_REQ# AGP_IRDY# AGP_DEVSEL#

AGP_WBF# AGP_PIPE# AGP_RBF# AGP_ST0

AGP_ST1

AGP_ST2

GPIPE# GSBA0/ADDIN0 GSBA1/ADDIN1 GSBA2/ADDIN2 GSBA3/ADDIN3 GSBA4/ADDIN4 GSBA5/ADDIN5 GSBA6/ADDIN6 GSBA7/ADDIN7

GWBF# GRBF#

GST0 GST1 GST2

GAD_STB0/DVOBCLK GAD_STB0#/DVOBCLK# GAD_STB1/DVOCCLK GAD_STB1#/DVOCCLK# GSBSTB GSBSTB#

G_FRAME#/MDVI DATA G_IRDY#/MI2C CLK G_TRDY#/MDVI CLK G_STOP#/MDDC DATA G_DEVSEL#/MI2C DATA G_REQ# G_PAR/ADD_DETECT G_GNT# GCBE3#/DVOCD5 GCBE2# GCBE1#/DVOBBLANK# GCBE0#/DVOBD7

AGP RCOMP/DVOBCRCOMP AGP_VREF

HSYNC VSYNC DDCA_CLK DDCA_DATA REFSET

RP2 @8P4R_8.2K

RP1 @8P4R_8.2K

RP65 @8P4R_8.2K R296 6.2K_0402

R295 6.2K_0402

AGP/DVO

BROOKDALE-GL/PE

ANALOG DISPLAY

+1.5VS

1 8 2 7 3 6 4 5

12

AGP_AD[0..31]<15> AGP_SBA[0..7]<15>

A A

AGP_WBF#<15>

AGP_RBF#<15>

AGP_ST0<15> AGP_ST1<15> AGP_ST2<15>

AGP_ADSTB0<15>

AGP_ADSTB0#<15>

AGP_ADSTB1<15>

AGP_ADSTB1#<15>

AGP_SBSTB<15>

AGP_SBSTB#<15>

AGP_FRAME#<15>

AGP_IRDY#<15>

AGP_TRDY#<15>

AGP_STOP#<15>

AGP_DEVSEL#<15>

AGP_REQ#<15>

AGP_PAR<15>

AGP_GNT#<15> AGP_C/BE#3<15> AGP_C/BE#2<15> AGP_C/BE#1<15> AGP_C/BE#0<15>

B B

C C

D D

+AGP_NBREF

+1.5VS

R39 8.2K_0402

R29 8.2K_0402

R25 8.2K_0402

R37 8.2K_0402

R28 8.2K_0402

R21 8.2K_0402

+AGP_NBREF

B

GAD0/DVOBHSYNC GAD1/DVOBVSYNC

GAD2/DVOBD1 GAD3/DVOBD0 GAD4/DVOBD3 GAD5/DVOBD2 GAD6/DVOBD5 GAD7/DVOBD4 GAD8/DVOBD6 GAD9/DVOBD9

GAD10/DVOBD8 GAD11/DVOBD11 GAD12/DVOBD10

GAD13/DVOBCCLKINT#

GAD14/DVOBFLDSTL

GAD15/MDDC CLK GAD16/DVOCVSYNC GAD17/DVOCHSYNC

GAD18/DVOCBLANK#

GAD19/DVOCD0 GAD20/DVOCD1 GAD21/DVOCD2 GAD22/DVOCD3 GAD23/DVOCD4 GAD24/DVOCD7 GAD25/DVOCD6 GAD26/DVOCD9

GAD27/DVOCD8 GAD28/DVOCD11 GAD29/DVOCD10

GAD30/DVOBCINTR# GAD31/DVOCFLDSTL

GCLKIN

RSTIN#

DREFCLK

PWROK PSBSEL

BLUE

BLUE#

GREEN

GREEN#

RED

RED#

*

+1.5VS

RSTIN#

B

AGP_AD0

V4

AGP_AD1

V2

AGP_AD2

W4

AGP_AD3

W5

AGP_AD4

U5

AGP_AD5

U4

AGP_AD6

U2

AGP_AD7

V3

AGP_AD8

T2

AGP_AD9

T3

AGP_AD10

T4

AGP_AD11

R2

AGP_AD12

R5

AGP_AD13

R7

AGP_AD14

T8

AGP_AD15

P3

AGP_AD16

P8

AGP_AD17

K4

AGP_AD18

K2

AGP_AD19

J2

AGP_AD20

M3

AGP_AD21

L5

AGP_AD22

L4

AGP_AD23

H4

AGP_AD24

G2

AGP_AD25

K3

AGP_AD26

J4

AGP_AD27

J5

AGP_AD28

J7

AGP_AD29

H3

AGP_AD30

K8

AGP_AD31

G4

GCLKIN 10us > PWROK

AE7

RSTIN#

AJ31 D14 E7 Y3

G15 H16 E15 F16 C15 D16

1 2 R47 8.2K_0402_5%

12

R46

8.2K_0402_5%

Place close to pin AE7

CLK_MCH_66M

@10_0402_5%

@10P_0402_50V8K

R67

C155

12

PSBSEL FSB FREQUENCY

12

C528

1 2

10P_0402_50V8J

400 MHZ

533 MHZ

VCCA_FSB

12

C444

22U_1206_10V4Z

PCIRST# <5,15,16,19,22,24,25,27,34>

0

1

0.82uH

L45 BLM21A601SPT

1 2

C459

.1U_0402_10V6K

R319 0_0402_5%

CLK_MCH_66M <14>

PM_PWROK <17,32> H_BSEL0 <5,14>

+1.5VS

12

C460 .1U_0402_10V6K

C

+1.5VS

+CPU_CORE

12

R309 1.5K_0402_5%

U31D

Y19

VCC1

AA19

VCC2

W20

VCC3

U21

VCC4

W21

VCC5

AA21

VCC6

A9

VCC7

B9

VCC8

C9

VCC9

D9

VCC10

E9

VCC11

B10

VCC12

C10

VCC13

D10

VCC14

F10

VCC15

H10

VCC16

A11

VCC17

B11

VCC18

C11

VCC19

D11

VCC20

E11

VCC21

G11

VCC22

J11

VCC23

B12

VCC24

C12

VCC25

D12

VCC26

F12

VCC27

H12

VCC28

G13

VCC29

J13

VCC30

H14

VCC31

J15

VCC32

AA17

VCC33

W17

VCC34

U17

VCC35

W18

VCC36

V19

VCC37

U19

VCC38

K10

VCC39

K12

VCC40

K14

VCC41

K16

VCC42

W19

VCC43

B18

VTTFSB0

C18

VTTFSB1

D18

VTTFSB2

H18

VTTFSB3

B19

VTTFSB4

C19

VTTFSB5

D19

VTTFSB6

E19

VTTFSB7

G19

VTTFSB8

J19

VTTFSB9

B20

VTTFSB10

C20

VTTFSB11

D20

VTTFSB12

F20

VTTFSB13

H20

VTTFSB14

F18

VTTFSB15

K18

VTTFSB16

K20

VTTFSB17

K22

VTTFSB18

K26

VTTFSB19

M28

VTTFSB20

T28

VTTFSB21

Y28

VTTFSB22

AD28

VTTFSB23

AB2

TESTIN#

Y2

MEM_SEL

A37

RSVD0

AB3

RSVD1

AA2

RSVD2

AA3

RSVD3

AA4

RSVD4

AA5

RSVD5

Y4

RSVD6

Y8

RSVD7

W7

RSVD8

AU37

NC

AU36

NC

AT37

NC

AU2

NC

AU1

NC

AT1

NC

AJ35

NC

AH34

NC

BROOKDALE-GL/PE_760P

+1.5VS

.1U_0402_10V6K

VCCAGP0A3VCCAGP1A7VCCAGP2C1VCCAGP3D4VCCAGP4D6VCCAGP5G1VCCAGP6K6VCCAGP7L1VCCAGP8L9VCCAGP9

BROOKDALE-GL/PE

VCCHI

12

C137

P6

POWER

VCCAGP10R1VCCAGP11R9VCCAGP12W9VCCAGP13

D

V6

P10

V10

AB10

VCCAGP14

VCCAGP15

VCCAGP16

12

C117 .1U_0402_10V6K

VCCSM0 VCCSM1 VCCSM2 VCCSM3 VCCSM4 VCCSM5 VCCSM6 VCCSM7 VCCSM8

VCCSM9 VCCSM10 VCCSM11 VCCSM12 VCCSM13 VCCSM14 VCCSM15 VCCSM16 VCCSM17 VCCSM18 VCCSM19 VCCSM20 VCCSM21 VCCSM22 VCCSM23 VCCSM24 VCCSM25 VCCSM26 VCCSM27 VCCSM28 VCCSM29 VCCSM30 VCCSM31 VCCSM32 VCCSM33 VCCSM34 VCCSM35 VCCSM36 VCCSM37 VCCSM38 VCCSM39 VCCSM40 VCCSM41 VCCSM42 VCCSM43 VCCSM44 VCCSM45 VCCSM46 VCCSM47 VCCSM48 VCCSM49 VCCSM50 VCCSM51 VCCSM52 VCCSM53 VCCSM54 VCCSM55

VCCA_SM0 VCCA_SM1

VCCQSM0 VCCQSM1 VCCQSM2

VTTDECAP0 VTTDECAP1 VTTDECAP2 VTTDECAP3 VTTDECAP4

VCCA_FSB

VCCA_HI

VCCHI0 VCCHI1 VCCHI2 VCCHI3

VCCA_DPLL

VCCGPIO VCCA_DAC0 VCCA_DAC1

SMX_RCOMP

NC NC NC NC

NEAR AA1 NEAR AE1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

E

+2.5V

AH8 AK8 AG9 AJ9 AL9 AM22 AJ23 AL37 AU9 AK10 AJ11 AL11 AU25 AM26 AU13 AM14 AJ27 AJ1 AL1 AJ15 AP15 AU29 AH2 AJ2 AK2 AL2 AM30 AH3 AJ3 AK3 AL3 AH4 AJ4 AK4 AL4 AU17 AJ5 AL5 AU5 AM18 AJ19 AK32 AU33 AH6 AK6 AP20 AG7 AJ7 AL7 AP7 AH10 AH12 AH14 AH18 AH22 AH26

AG1 AG2

AT20 AT21 AU21

A31 AC37 R37 L37 G37

A17 AD10

AD6 AC9 AC1 AE3

A13 B6 B14 A15

AF10 A2

A36 B37 B1

VCCA_FSB

SMX_RCOMP

12 mil

100U_D_6.3VM

+1.5VS

12

R50

60.4_0603_1%

12

+

12

C191

+

100U_D_6.3VM

C203 .1U_0402_10V6K

VCCA_SM

.1U_0402_10V6K

C206

C529

5 trace no vias

.1U_0402_10V6K

12

C472

.1U_0402_10V6K

12

R60 60.4_0603_1%

12

C211

+

100U_D_6.3VM

12

L27

0.68uH

BLM21A601SPT

12

C207

4.7U_0805_10V4Z

12

R101 1_0402_5%

12

.1U_0402_10V6K

12

C483

.1U_0402_10V6K

+2.5V

C154 .1U_0402_10V6K

12

+1.5VS

C497

12

near MCH/PE < 1"

Title

Size Document N umber Re v

Date: Sheet

Compal E l e c t r onics, Inc.

SCHEM AT IC , M/ B LA- 1761

401248

星期四三月

27, 2003

E

12

L53

1uH

FBM-L11-201209-221-LMAT

12

C531

+

100U_D_6.3VM

12

C514

.1U_0402_10V6K

+3VS

C41 .1U_0402_10V6K

of

947,

C461

2A

5

4

3

2

1

10 mil Trace,

12

C521 .01U_0402_25V4Z

Within 250milWithin 250mil

+CPU_CORE

12

.1U_0402_10V6K

12

.1U_0402_10V6K

12

.1U_0402_10V6K

12

.1U_0402_10V6K

7mil Space

NEAR ICH

.1U_0402_10V6K

C179

.1U_0402_10V6K

C163

.1U_0402_10V6K

C141

.1U_0402_10V6K

C47

12

C264

.01U_0402_25V4Z

12

C62

.1U_0402_10V6K

C76

.1U_0402_10V6K

R336 100_0603_1%

1 2

12

C547 .1U_0402_10V6K

PLACE NOTE: CAP PLACE AT MIDPOINT OF THE BUS.

12

C69

12

C70 .1U_0402_10V6K

12

100_0603_1%

.1U_0402_10V6K

12

C68

AL37 AU5 AU9 AU13 AU17 AU25 AU29 AU33

.1U_0402_10V6K

12

C160

C167

12

C170

.1U_0402_10V6K

12

C166

A5 E1 J1 N1 U1 VCC1-43

.1U_0402_10V6K

12

C113

C55

12

C124

.1U_0402_10V6K

12

C139

R338

12

.1U_0402_10V6K

12

.1U_0402_10V6K

12

.1U_0402_10V6K

12

.1U_0402_10V6K

12

C549 .1U_0402_10V6K

12

C85 .1U_0402_10V6K

.1U_0402_10V6K

C178

.1U_0402_10V6K

C165

.1U_0402_10V6K

C104

.1U_0402_10V6K

C146

NEAR MCH

12

C171

12

C164

12

C142

12

C44

R313 226_0603_1%

+1.5VS

U31E

AM10

VSS0

AR23

D D

C C

B B

A A

VSS1

AU23

VSS2

F24

VSS3

AM24

VSS4

A25

VSS5

C16

VSS6

N37

VSS7

U18

VSS8

V18

VSS9

Y18

VSS10

AA18

VSS11

AL31

VSS12

AR31

VSS13

AU31

VSS14

F32

VSS15

H32

VSS16

K32

VSS17

M32

VSS18

P32

VSS19

T32

VSS20

V32

VSS21

Y32

VSS22

AB32

VSS23

AD32

VSS24

AF32

VSS25

AH32

VSS26

AM4

VSS27

A5

VSS28

C5

VSS29

AG5

VSS30

AN5

VSS31

AR5

VSS32

AR19

VSS33

AM32

VSS34

A33

VSS35

C33

VSS36

AJ33

VSS37

AN33

VSS38

AR33

VSS39

F6

VSS40

H6

VSS41

M6

VSS42

T6

VSS43

Y6

VSS44

AB6

VSS45

AF6

VSS46

AM6

VSS47

U20

VSS48

V20

VSS49

Y20

VSS50

AA20

VSS51

AM20

VSS52

A21

VSS53

B21

VSS54

C21

VSS55

D21

VSS56

E21

VSS57

G21

VSS58

J21

VSS59

D34

VSS60

W34

VSS61

A35

VSS62

E35

VSS63

G35

VSS64

J35

VSS65

L35

VSS66

AN7

VSS67

AR7

VSS68

AU7

VSS69

B8

VSS70

C8

VSS71

D8

VSS72

F8

VSS73

V21

VSS74

Y21

VSS75

AJ21

VSS76

AR21

VSS77

F22

VSS78

H22

VSS79

M10

VSS80

T10

VSS81

Y10

VSS82

AH16

VSS83

AH20

VSS84

AH24

VSS85

BROOKDALE-GL/PE_760P

AR9

AR17

AJ17

Y17

AG4

AB4

AU3

VSS111

VSS112

VSS113

VSS114

VSS115

VSS116

BROOKDALE-GL/PE

VSS86

VSS87

VSS88

VSS89

VSS90

VSS91

VSS92

VSS93

VSS94

N35

R35

U35

AL35

AA35

AE35

AC35

AN35

AR35

AG35

VSS117

VSS95

AR3

VSS118

VSS

VSS96

AU35

AN3

B36

AM3

AG3

AC3

C31

AH30

V17

J17

G17

E17

VSS119

VSS120

VSS121

VSS122

VSS123

VSS124

VSS125

VSS126

VSS127

VSS128

VSSA_DAC0

VSS97

VSS98

VSS99

VSS100

VSS101G9VSS102J9VSS103N9VSS104U9VSS105

VSS106

VSS107

AF8

W36

AM8

A23

C23

AA9

AE9

VSSA_DAC1

VSS108

VSS109

VSS110

J23

D23

VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211

C17 B17 AM16 W3 U3 R3 D17 N3 L3 J3 G3 E3 AT2 F30 AR29 AJ29 AG29 AE29 AC29 AA29 W29 R29 U29 N29 L29 J29 C29 A29 AU15 AR15 D15 B2 AR1 AN1 AE1 AA1 U1 N1 J1 E1 AM28 F28 AU27 AR27 AL27 F14 AR13 AJ13 J27 C27 A27 E13 D13 C13 B13 AM12 AK12 F26 AR25 AJ25 J25 AU11 AR11 AR37 AN37 C25 AJ37 AG37 AE37 AA37 U37 AH28 AF28 AB28 V28 P28 K28 K24 J37 E37 C37 AT36 AH36

B15 C14

1 2

.01U_0402_25V4Z

+CPU_CORE

12

C455

10U_1206_6.3V7K

12

C105

.1U_0402_10V6K

+2.5V

.1U_0402_10V6K

12

C176

.1U_0402_10V6K

12

C172

.1U_0402_10V6K

+1.5VS

12

C64

.1U_0402_10V6K

12

C92

.1U_0402_10V6K

12

C515

NEAR MCH NEAR ICH

FSB DEC O UPLING

10U_1206_6.3V7K

12

C456

.1U_0402_10V6K

12

C152

.1U_0402_10V6K

12

C177

.1U_0402_10V6K

12

C169

.1U_0402_10V6K

12

C71

.1U_0402_10V6K

12

C80

.1U_0402_10V6K

12

C273 .01U_0402_25V4Z

.1U_0402_10V6K

C63

C75

12

.1U_0402_10V6K

12

SYSTEM MEMORY DECOUPLING

.1U_0402_10V6K

12

C185

C181

12

C162

.1U_0402_10V6K

12

C168

GMCH DECOUPLING

.1U_0402_10V6K

C65

C98

12

C81

.1U_0402_10V6K

12

C130

12

HUB_VSWING <8,16>

To device is 4" less

HUB_VREF <8,16>

R32 49.9_0603_1%

1 2

R33

100_0603_1%

NEAR MCH

R53 301_0603_1%

12

R54

150_0603_1%

12

C198

C190

C140

C46

C202

.1U_0402_10V6K

12

C180

.1U_0402_10V6K

12

C123

.1U_0402_10V6K

12

C99

.1U_0402_10V6K

10 mil Trace, 7mil Space

12

C61 .1U_0402_10V6K

10 mil Trace, 7mil Space

12

C151 .01U_0402_25V4Z

1 2

.1U_0402_10V6K

12

C201

.1U_0402_10V6K

12

C173

.1U_0402_10V6K

12

C112

.1U_0402_10V6K

12

C78

12

C200

.1U_0402_10V6K

12

C186

.1U_0402_10V6K

12

.1U_0402_10V6K

12

.1U_0402_10V6K

MCH_GTLREF <8>

H_XY_SWING <8>

.1U_0402_10V6K

12

C199

C133

C143

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Title

Size Document N umber Re v

Date: Sheet

Compal E l e c t r onics, Inc.

SCHEM AT IC , M/ B LA- 1761

401248

星期四三月

27, 2003

2A

of

10 47,

1

A

DDR_SDQ4 DDR_SDQ0

DDR_SDQ1 DDR_SDQ5

DDR_SDQ6

1 1

2 2

3 3

4 4

A

DDR_SDQ2

DDR_SDQ3 DDR_SDQ7

DDR_SDQ9 DDR_DQ9 DDR_SDQ8

DDR_SDQ13 DDR_DQ13 DDR_SDQ12

DDR_SDQ15 DDR_DQ15 DDR_SDQ14 DDR_DQ14

DDR_SDQ11 DDR_SDQ10

DDR_SDQ16 DDR_SDQ20

DDR_SDQ17 DDR_DQ17

DDR_SDQ22 DDR_DQ22 DDR_SDQ18

DDR_SDQ28 DDR_DQ28 DDR_SDQ24

DDR_SDQ25 DDR_DQ25 DDR_SDQ29

DDR_SDQ[0..63]<8> DDR_SDQS[0..7]<8> DDR_SMA[0..12]<8> DDR_SDM[0..7]<8>

DDR_SDQ57 DDR_SDQ61

DDR_SDQ56 DDR_DQ56 DDR_SDQ60

DDR_SDQ58 DDR_SDQ63 DDR_DQ63

DDR_SDQS0 DDR_SDQS1 DDR_SDQS2 DDR_SDQS3

B

RP77 10_0402_4P2R_5% 1 4 2 3

RP87 10_0402_4P2R_5% 1 4 2 3

RP71 10_0402_4P2R_5% 1 4 2 3

RP88 10_0402_4P2R_5% 1 4 2 3

RP72 10_0402_4P2R_5% 1 4 2 3

RP89 10_0402_4P2R_5% 1 4 2 3

RP73 10_0402_4P2R_5% 1 4 2 3

RP90 10_0402_4P2R_5% 1 4 2 3

RP74 10_0402_4P2R_5% 1 4 2 3

RP91 10_0402_4P2R_5% 1 4 2 3

RP75 10_0402_4P2R_5% 1 4 2 3

RP92 10_0402_4P2R_5% 1 4 2 3

RP76 10_0402_4P2R_5% 1 4 2 3

RP93 10_0402_4P2R_5% 1 4 2 3

DDR_SDQ[0..63] DDR _ S DQS[0..7] DDR_SMA[0..12] DDR_SDM[0..7]

RP101 10_0402_4P2R_5% 1 4 2 3

RP85 10_0402_4P2R_5% 1 4 2 3

RP102 10_0402_4P2R_5% 1 4 2 3

R378 10_0402_5% R379 10_0402_5% R380 10_0402_5% R381 10_0402_5%

DDR_DQ57 DDR_DQ61

DDR_DQ60

DDR_DQ58 DDR_SDQ59 DDR_DQ59

DDR_DQS0

12

DDR_DQS1

12

DDR_DQS2

12

DDR_DQS3

12

B

DDR_DQ4 DDR_DQ0

DDR_DQ1 DDR_DQ5

DDR_DQ6 DDR_DQ2

DDR_DQ3 DDR_DQ7

DDR_DQ8

DDR_DQ12

DDR_DQ11 DDR_DQ10

DDR_DQ16 DDR_DQ20

DDR_DQ21DDR_SDQ21

DDR_DQ18

DDR_DQ23DDR_SDQ23 DDR_DQ19DDR_SDQ19

DDR_DQ24

DDR_DQ29

C

DDR_SDQ30 DDR_DQ30 DDR_SDQ26 DDR_DQ26

DDR_SDQ31 DDR_SDQ27

DDR_SDM0 DDR_SDM1

DDR_SDM2 DDR_DM2 DDR_SDM3

DDR_SDM4 DDR_DM4 DDR_SDM5

DDR_SDM6 DDR_DM6 DDR_SDM7

DDR_SDQ37 DDR_DQ37 DDR_SDQ32

DDR_SDQ36 DDR_DQ36 DDR_SDQ33

DDR_SDQ38 DDR_SDQ34

DDR_SDQ35

DDR_SDQ39

DDR_SDQ44

DDR_SDQ40

DDR_SDQ41 DDR_SDQ45

DDR_SDQ46 DDR_SDQ42

DDR_SDQ47 DDR_SDQ43

DDR_SDQ49 DDR_SDQ48

DDR_SDQ53 DDR_SDQ52

DDR_SDQ55 DDR_SDQ54

DDR_SDQ50 DDR_DQ50

DDR_SDQ62

DDR_SDQS4 DDR_SDQS5 DDR_SDQS6 DDR_SDQS7

RP78 10_0402_4P2R_5% 1 4 2 3

RP94 10_0402_4P2R_5% 1 4 2 3

R390 10_0402_5%

R397 10_0402_5% R391 10_0402_5%

R392 10_0402_5% R393 10_0402_5%

R394 10_0402_5% R384 10_0402_5%

R385 10_0402_5%

RP95 10_0402_4P2R_5% 1 4 2 3

RP79 10_0402_4P2R_5% 1 4 2 3

RP80 10_0402_4P2R_5% 1 4 2 3

RP96 10_0402_4P2R_5% 1 4 2 3

RP81 10_0402_4P2R_5% 1 4 2 3

RP97 10_0402_4P2R_5% 1 4 2 3

RP82 10_0402_4P2R_5% 1 4 2 3

RP98 10_0402_4P2R_5% 1 4 2 3

RP83 10_0402_4P2R_5% 1 4 2 3

RP99 10_0402_4P2R_5% 1 4 2 3

RP100 10_0402_4P2R_5% 1 4 2 3

RP84 10_0402_4P2R_5% 1 4 2 3

RP86 10_0402_4P2R_5% 1 4 2 3

R382 10_0402_5% R383 10_0402_5% R395 10_0402_5% R396 10_0402_5%

C

DDR_DQ31 DDR_DQ27

DDR_DM0

12

DDR_DM1

12

DDR_DM3

12

DDR_DM5

12

DDR_DM7

12

DDR_DQ32

DDR_DQ33

DDR_DQ38 DDR_DQ34

DDR_DQ35 DDR_DQ39

DDR_DQ44 DDR_DQ40

DDR_DQ41 DDR_DQ45

DDR_DQ46 DDR_DQ42

DDR_DQ47 DDR_DQ43

DDR_DQ49 DDR_DQ48

DDR_DQ53 DDR_DQ52

DDR_DQ55 DDR_DQ54

DDR_DQ51DDR_SDQ51

DDR_DQ62

DDR_DQS4

12

DDR_DQS5

12

DDR_DQS6

12

DDR_DQS7

12

D

DDR_DQ5 DDR_DQ1

DDR_DQS0 DDR_DQ2

DDR_DQ6 DDR_DQ8

DDR_DQS1 DDR_DQ14

DDR_DQ15

DDR_CLK1<8> DDR_CLK1#<8>

DDR_DQ20 DDR_DQ17 DDR_DQ16 DDR_DQ21

DDR_DQS2 DDR_DQ18

DDR_DQ22 DDR_DQ23 DDR_DQ24

DDR_DQS3 DDR_DQ26

DDR_DQ30

DDR_CKE1<8> DDR_CKE0 <8>

DIMM_SMDATA<12,14,16>

DIMM_SMCLK<12,14,16>

Layout note Place these resistors

close to DIMM0, all trace length<500 mil

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

DDR_CKE1 DDR_CKE0

DDR_SMA12 DDR_SMA9

DDR_SMA7 DDR_SMAA5 DDR_SMA3 DDR_SMAA1

DDR_SMA10 DDR_SBS0 DDR_SWE#

DDR_SCS#0 DDR_SCS#1

DDR_DQ36 DDR_DQS4

DDR_DQ34

DDR_DQ40 DDR_DQ44

DDR_DQS5 DDR_DQ42

DDR_DQ46

DDR_DQ48 DDR_DQ49

DDR_DQS6 DDR_DQ54

DDR_DQ55 DDR_DQ60

DDR_DQ56 DDR_DQS7

DDR_DQ63 DDR_DQ58

+3VS

+2.5V

E

JP29

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0#

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2#

93

VDD

95

CKE1

97

DU/A13

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE#

121

S0#

123

DU

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD_SPD

199

VDD_ID

DDR-SODIMM_200_Normal

DIMM0

Front side / H=5.2mm

E

VREF

VDD DM0

DQ12

VDD

DQ13

DM1

DQ14 DQ15

VDD VDD

DQ20 DQ21

VDD DM2

DQ22 DQ23

DQ28

VDD

DQ29

DM3

DQ30 DQ31

VDD

DM8 VDD

DU/RESET#

VDD VDD

CKE0

DU/BA2

VDD

RAS# CAS#

DQ36 DQ37

VDD DM4

DQ38 DQ39

DQ44

VDD

DQ45

DM5

DQ46 DQ47

VDD

CK1#

DQ52 DQ53

VDD DM6

DQ54 DQ55

DQ60

VDD

DQ61

DM7

DQ62 DQ63

VDD

VSS DQ4 DQ5

DQ6 VSS DQ7

VSS

VSS VSS

VSS

CB4 CB5 VSS

CB6 CB7 VSS

VSS

BA1

VSS

CK1 VSS

VSS

SA0 SA1 SA2

F

SDREF+2.5V

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100

A11

102

A8

104 106

A6

108

A4

110

A2

112

A0

114 116 118 120 122

S1#

124

DU

126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

DU

F

12 mil

DDR_DQ0 DDR_DQ4

DDR_DM0 DDR_DQ7

DDR_DQ3 DDR_DQ12

DDR_DQ13DDR_DQ9 DDR_DM1

DDR_DQ10 DDR_DQ11

DDR_DM2 DDR_DQ19

DDR_DQ29 DDR_DQ25DDR_DQ28

DDR_DM3 DDR_DQ27

DDR_DQ31

DDR_SMA11 DDR_SMA8

DDR_SMA6 DDR_SMAA4 DDR_SMAA2 DDR_SMA0

DDR_SBS1 DDR_SRAS# DDR_SCAS#

DDR_DQ32DDR_DQ33 DDR_DQ37

DDR_DM4 DDR_DQ39

DDR_DQ35DDR_DQ38 DDR_DQ45

DDR_DQ41 DDR_DM5

DDR_DQ43 DDR_DQ47

DDR_DQ52 DDR_DQ53

DDR_DM6 DDR_DQ51

DDR_DQ50 DDR_DQ61

DDR_DQ57 DDR_DM7

DDR_DQ62 DDR_DQ59

DDR_SBS0<8> DDR_SWE#<8>

DDR_SRAS#<8> DDR_SCAS#<8>

DDR_SBS1<8>

12

C295

.1U_0402_16V4Z

G

DDR_DQ[0..63] DDR_DQS[0..7] DDR_DM[0..7] DDR_SMAA[0..12]

RP21 0_0402_4P2R_5% 1 4 2 3

RP10 0_0402_4P2R_5% 1 4 2 3

RP12 0_0402_4P2R_5% 1 4 2 3

RP22 0_0402_4P2R_5% 1 4 2 3

RP23 0_0402_4P2R_5% 1 4 2 3

RP20 0_0402_4P2R_5% 1 4 2 3

R201 0_0402_5%

H

DDR_DQ[0..63] <12> DDR_DQS[0..7] <12> DDR_DM[0..7] <12> DDR_SMAA[0..12] <12>

DDR_SMAA3DDR_SMA3 DDR_SMAA10DDR_SMA10

DDR_SMAA4DDR_SMA4 DDR_SMAA2DDR_SMA2

DDR_SMAA5DDR_SMA5 DDR_SMAA1DDR_SMA1

DDR_SMAA9DDR_SMA9 DDR_SMAA7DDR_SMA7

DDR_SMAA11DDR_SMA11 DDR_SMAA8DDR_SMA8

DDR_SMAA6DDR_SMA6 DDR_SMAA0DDR_SMA0

DDR_SMAA12DDR_SMA12

12

Note:

Place Close to DIMM0

Layout note Place these resistor

close by DIMM0, all trace length Max=1.4"

DDR_SCS#1 <8>DDR_SCS#0<8>

DDR_CLK2# <8> DDR_CLK2 <8>

DDR_CKE0 DDR_CKE1

DDR_SCS#1 DDR_SCS#0

RP39 56_0402_4P2R_5% 1 4 2 3

RP36 56_0402_4P2R_5% 1 4 2 3

+1.25VS

Place Close to DIMM0Note:

RP19 0_0402_4P2R_5% DDR_SBS0 DDR_SWE#

DDR_SRAS# DDR_SCAS#

DDR_SBS1

R196 0_0402_5%

Title

Size Document N umber Re v

401248

Date: Sheet

星期四三月

G

DDR_D0_SBS0

1 4

DDR_D0_SWE#

2 3

RP18 0_0402_4P2R_5%

DDR_D0_SRAS#

1 4

DDR_D0_SCAS#

2 3

DDR_D0_SBS1

12

Compal E l e c t r onics, Inc.

SCHEM AT IC , M/ B LA- 1761

27, 2003

DDR_D0_SBS0 <12> DDR_D0_SWE# <12>

DDR_D0_SRAS# <12> DDR_D0_SCAS# <12>

DDR_D0_SBS1 <12>

of

11 47,

H

2A

A

+1.25VS +1.25VS

RP60 56_0402_4P2R_5%

DDR_DQ0

1 4

DDR_DQ4

2 3

RP57 56_0402_4P2R_5%

DDR_DQ2

1 1

2 2

3 3

1 4

DDR_DQ6

2 3

RP59 56_0402_4P2R_5%

DDR_DQ5

1 4

DDR_DQ1

2 3

RP56 56_0402_4P2R_5%

DDR_DQ7

1 4

DDR_DQ3

2 3

RP55 56_0402_4P2R_5%

DDR_DQ8

1 4

DDR_DQ9

2 3

RP52 56_0402_4P2R_5%

DDR_DQ10

1 4

DDR_DQ11

2 3

RP54 56_0402_4P2R_5%

DDR_DQ12

1 4

DDR_DQ13

2 3

RP51 56_0402_4P2R_5%

DDR_DQ14

1 4

DDR_DQ15

2 3

RP50 56_0402_4P2R_5%

DDR_DQ20

1 4

DDR_DQ16

2 3

RP49 56_0402_4P2R_5%

DDR_DQ17

1 4

DDR_DQ21

2 3

RP47 56_0402_4P2R_5%

DDR_DQ18

1 4

DDR_DQ22

2 3

RP46 56_0402_4P2R_5%

DDR_DQ19

1 4

DDR_DQ23

2 3

RP45 56_0402_4P2R_5%

DDR_DQ24

1 4

DDR_DQ28

2 3

RP42 56_0402_4P2R_5%

DDR_DQ26

1 4

DDR_DQ30

2 3

RP44 56_0402_4P2R_5%

DDR_DQ29

1 4

DDR_DQ25

2 3

RP41 56_0402_4P2R_5%

DDR_DQ27

1 4

DDR_DQ31 DDR_DQ63

2 3

RP34 56_0402_4P2R_5%

DDR_DQ32

14

DDR_DQ37

23

RP31 56_0402_4P2R_5%

DDR_DQ34

14

DDR_DQ38

23

RP33 56_0402_4P2R_5%

DDR_DQ33

14

DDR_DQ36

23

RP30 56_0402_4P2R_5%

DDR_DQ39

14

DDR_DQ35

23

RP113 56_0402_4P2R_5%

DDR_DQ41

14

DDR_DQ45

23

RP116 56_0402_4P2R_5%

DDR_DQ46

14

DDR_DQ42

23

RP114 56_0402_4P2R_5%

DDR_DQ44

14

DDR_DQ40

23

RP117 56_0402_4P2R_5%

DDR_DQ47

14

DDR_DQ43

23

RP29 56_0402_4P2R_5%

DDR_DQ48

14

DDR_DQ49

23

RP26 56_0402_4P2R_5%

DDR_DQ50

14

DDR_DQ51

23

RP28 56_0402_4P2R_5%

DDR_DQ52

14

DDR_DQ53

23

RP25 56_0402_4P2R_5%

DDR_DQ54

14

DDR_DQ55

23

RP119 56_0402_4P2R_5%

DDR_DQ56

14

DDR_DQ60

23

RP122 56_0402_4P2R_5%

DDR_DQ59

14

DDR_DQ62

23

RP118 56_0402_4P2R_5%

DDR_DQ57

14

DDR_DQ61

23

RP121 56_0402_4P2R_5%

DDR_DQ58

14 23

Layout note Place these resistor

closely DIMM1, all trace length<=800mil

4 4

B

RP58 56_0402_4P2R_5%

14 23

RP53 56_0402_4P2R_5%

14 23

RP48 56_0402_4P2R_5%

14 23

RP43 56_0402_4P2R_5%

14 23

RP32 56_0402_4P2R_5%

14 23

RP115 56_0402_4P2R_5%

14 23

RP27 56_0402_4P2R_5%

14 23

RP120 56_0402_4P2R_5%

14 23

DDR_DQS[0..7] DDR_DQ[0..63] DDR_SMAA[0..12] DDR_DM[0..7]

DDR_SMAB4<8> DDR_SMAB2<8>

DDR_SMAB5<8> DDR_SMAB1<8>

DDR_DQS0 DDR_DM0

DDR_DQS1 DDR_DM1

DDR_DQS2 DDR_DM2

DDR_DQS3 DDR_DM3

DDR_DQS4 DDR_DM4

DDR_DM5 DDR_DQS5

DDR_DQS6 DDR_DM6

DDR_DQS7 DDR_DM7

DDR_DQS[0..7] <11> DDR_DQ[0..63] <11> DDR_SMAA[0..12] <11> DDR_DM[0..7] <11>

RP11 0_0402_4P2R_5%

DDR_SMMAB4DDR_SMAB4

1 4

DDR_SMMAB2DDR_SMAB2

2 3

RP9 0_0402_4P2R_5%

DDR_SMMAB5DDR_SMAB5

1 4

DDR_SMMAB1DDR_SMAB1

2 3

C

DDR_CLK4<8> DDR_CLK4#<8>

DDR_D0_SBS0<11> DDR_D0_SWE#<11>

DIMM_SMDATA<11,14,16>

DIMM_SMCLK<11,14,16>

+2.5V

DDR_DQ5 DDR_DQ0 DDR_DQ1

DDR_DQS0 DDR_DQ2

DDR_DQ6 DDR_DQ3 DDR_DQ8

DDR_DQS1 DDR_DQ14

DDR_DQ15

DDR_DQ20 DDR_DQ17

DDR_DQS2 DDR_DQ18

DDR_DQ22 DDR_DQ24

DDR_DQ28 DDR_DQ25 DDR_DQS3

DDR_DQ26 DDR_DQ30

DDR_CKE3 DDR_CKE2 DDR_SMAA12

DDR_SMAA9 DDR_SMAA7

DDR_SMMAB5 DDR_SMAA3 DDR_SMMAB1

DDR_SMAA10 DDR_D0_SBS0 DDR_D0_SRAS# DDR_D0_SWE# DDR_SCS#2 DDR_SCS#3

DDR_DQ33 DDR_DQ36

DDR_DQS4 DDR_DQ34

DDR_DQ38 DDR_DQ40

DDR_DQS5 DDR_DQ42

DDR_DQ46

DDR_DQ48 DDR_DQ49

DDR_DQS6 DDR_DQ54

DDR_DQ55 DDR_DQ60

DDR_DQ56 DDR_DQS7

DDR_DQ63 DDR_DQ58

+3VS

JP32

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0#

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2#

93

VDD

95

CKE1

97

DU/A13

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE#

121

S0#

123

DU

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD_SPD

199

VDD_ID

DDR-SODIMM_200_Normal

DIMM1

Back side / H=9.2mm

VREF

VSS DQ4 DQ5 VDD DM0 DQ6

VSS DQ7

DQ12

VDD

DQ13

DM1

VSS

DQ14 DQ15

VDD VDD

VSS

DQ20 DQ21

VDD DM2

DQ22

VSS

DQ23 DQ28

VDD

DQ29

DM3

VSS

DQ30 DQ31

VDD

CB4

CB5

VSS DM8

CB6 VDD

CB7

DU/RESET#

VSS

VSS VDD VDD

CKE0

DU/BA2

VSS

VDD

BA1

RAS# CAS#

VSS

DQ36 DQ37

VDD DM4

DQ38

VSS

DQ39 DQ44

VDD

DQ45

DM5

VSS

DQ46 DQ47

VDD

CK1#

CK1

VSS

DQ52 DQ53

VDD DM6

DQ54

VSS

DQ55 DQ60

VDD

DQ61

DM7

VSS

DQ62 DQ63

VDD

SA0

SA1

SA2

D

+2.5V

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100

A11

102

A8

104 106

A6

108

A4

110

A2

112

A0

114 116 118 120 122

S1#

124

DU

126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

DU

12 mil

DDR_DQ4 DDR_DM0

DDR_DQ7

DDR_DQ12 DDR_DQ13DDR_DQ9

DDR_DM1 DDR_DQ10

DDR_DQ11

DDR_DQ21DDR_DQ16 DDR_DM2

DDR_DQ19 DDR_DQ23

DDR_DQ29

DDR_DM3 DDR_DQ27

DDR_DQ31

DDR_SMAA11 DDR_SMAA8

DDR_SMAA6 DDR_SMMAB4 DDR_SMMAB2 DDR_SMAA0

DDR_D0_SBS1 DDR_D0_SCAS#

DDR_DQ32 DDR_DQ37

DDR_DM4 DDR_DQ39

DDR_DQ35 DDR_DQ45

DDR_DQ41DDR_DQ44 DDR_DM5

DDR_DQ43 DDR_DQ47

DDR_DQ52 DDR_DQ53

DDR_DM6 DDR_DQ50

DDR_DQ51 DDR_DQ61

DDR_DQ57 DDR_DM7

DDR_DQ62 DDR_DQ59

+3VS

SDREF

12

C325 .1U_0402_16V4Z

DDR_CKE2 <8>DDR_CKE3<8>

DDR_D0_SBS1 <11> DDR_D0_SRAS# <11> DDR_D0_SCAS# <11> DDR_SCS#3 <8>DDR_SCS#2<8>

DDR_CLK5# <8> DDR_CLK5 <8>

E

+1.25VS

R432 56_0402_5%

R433 56_0402_5%

DDR_CKE2 DDR_CKE3

DDR_SCS#2 DDR_SCS#3

DDR_SMAA12

1 2

RP105 56_0402_4P2R_5%

DDR_SMAA8

14

DDR_SMAA11

23

RP106 56_0402_4P2R_5%

DDR_SMAA7

14

DDR_SMAA9

23

RP108 56_0402_4P2R_5%

DDR_SMAA10

14

DDR_SMAA3

23

RP110 56_0402_4P2R_5%

DDR_SMAA0

14

DDR_SMAA6

23

RP37 33_0402_4P2R_5%

DDR_SMAA5

14

DDR_SMAA1

23

RP109 33_0402_4P2R_5%

DDR_SMMAB2

14

DDR_SMMAB4

23

RP38 33_0402_4P2R_5%

DDR_SMAA4

14

DDR_SMAA2

23

RP107 33_0402_4P2R_5%

DDR_SMMAB1

14

DDR_SMMAB5

23

RP111 56_0402_4P2R_5%

DDR_D0_SWE#

14

DDR_D0_SBS0

23

RP112 56_0402_4P2R_5%

DDR_D0_SCAS#

14

DDR_D0_SRAS#

23

DDR_D0_SBS1

1 2

RP40 56_0402_4P2R_5% 1 4 2 3

RP35 56_0402_4P2R_5% 1 4 2 3

Layout note Place these resistor

close by DIMM1, all trace length Max=0.8"

+1.25VS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Title

Size Document N umber Re v

Date: Sheet

Compal E l e c t r onics, Inc.

SCHEM AT IC , M/ B LA- 1761

401248

星期四三月

27, 2003

2A

of

12 47,

E

A

B

C

D

E

Layout note :

Distribute as close as possible to DDR-SODIMM0.

+2.5V

1 1

12

C322

+

220U_D2_6.3V

12

C590 .1U_0402_10V6K

12

C589 .1U_0402_10V6K

12

C588 .1U_0402_10V6K

12

C587 .1U_0402_10V6K

12

C586 .1U_0402_10V6K

12

C585 .1U_0402_10V6K

12

C584 .1U_0402_10V6K

12

C583 .1U_0402_10V6K

Layout note :

Distribute as close as possible to DDR-SODIMM1.

+2.5V

12

C309

+

220U_D2_6.3V

12

C334 .1U_0402_10V6K

12

C333 .1U_0402_10V6K

12

C332 .1U_0402_10V6K

12

C331 .1U_0402_10V6K

12

C330 .1U_0402_10V6K

12

C327 .1U_0402_10V6K

12

C329 .1U_0402_10V6K

12

C328 .1U_0402_10V6K

Layout note :

Place one cap close to every 2 pull up resistors termination to

2 2

+1.25VS

12

C386 .1U_0402_10V6K

+1.25VS

12

C375 .1U_0402_10V6K

+1.25VS

12

C385 .1U_0402_10V6K

12

C374 .1U_0402_10V6K

12

C384 .1U_0402_10V6K

12

C373 .1U_0402_10V6K

12

C383 .1U_0402_10V6K

12

C372 .1U_0402_10V6K

12

C382 .1U_0402_10V6K

12

C371 .1U_0402_10V6K

50 mil plane

12

C381 .1U_0402_10V6K

12

C370 .1U_0402_10V6K

12

C380 .1U_0402_10V6K

12

C369 .1U_0402_10V6K

12

C379 .1U_0402_10V6K

12

C368 .1U_0402_10V6K

12

C378 .1U_0402_10V6K

12

C609 .1U_0402_10V6K

12

C376 .1U_0402_10V6K

12

C610 .1U_0402_10V6K

+1.25VS

12

3 3

4 4

C611 .1U_0402_10V6K

+1.25VS

12

C360 .1U_0402_10V6K

+1.25VS

12

C352 .1U_0402_10V6K

+1.25VS

12

C617 .1U_0402_10V6K

12

C377 .1U_0402_10V6K

12

C359 .1U_0402_10V6K

12

C622 .1U_0402_10V6K

12

C363 .1U_0402_10V6K

A

12

C613 .1U_0402_10V6K

12

C358 .1U_0402_10V6K

12

C623 .1U_0402_10V6K

12

C364 .1U_0402_10V6K

12

C614 .1U_0402_10V6K

12

C357 .1U_0402_10V6K

12

C624 .1U_0402_10V6K

12

C367 .1U_0402_10V6K

12

C619 .1U_0402_10V6K

12

C620 .1U_0402_10V6K

12

C625 .1U_0402_10V6K

12

C362 .1U_0402_10V6K

12

C361 .1U_0402_10V6K

12

C621 .1U_0402_10V6K

12

C626 .1U_0402_10V6K

12

C618 .1U_0402_10V6K

B

12

C612 .1U_0402_10V6K

12

C356 .1U_0402_10V6K

12

C366 .1U_0402_10V6K

12

C387 .1U_0402_10V6K

12

C355 .1U_0402_10V6K

12

C615 .1U_0402_10V6K

12

C354 .1U_0402_10V6K

12

C365 .1U_0402_10V6K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

C353 .1U_0402_10V6K

12

C616 .1U_0402_10V6K

C

D

Title

Size Document N umber Re v

Date: Sheet

Compal E l e c t r onics, Inc.

SCHEM AT IC , M/ B LA- 1761

401248

星期四三月

27, 2003

of

13 47,

E

2A

A

B

C

D

E

F

G

H

+3VS

12

C122 .1U_0402_16V4Z

1 2

+3V_48Mhz

12

1 1

H_BSEL0<5,9>

2 2

CLK_ICH_48M<17>

3 3

CLK_SD48<26>

CLK_ICH_14M<17>

CLK_CODEC_14M<20>

CLK_14M_SIO<27>

+3VS

R78

1.5K_0402_5%

5W10S +-0.5"

+3VS

12

C135 @10P_0402_50V8K

R35

4.7U_0805_10V4Z

12

R89 1K_0402_5%

CK408_PWRGD#<32>

DIMM_SMDATA<11,12,16>

DIMM_SMCLK<11,12,16>

10_0603_5%

C103

+3VS

12

C128 @10P_0402_50V8K

12

C188 @10P_0402_50V8K

C189 @10P_0402_50V8K

1 2

R51 1K_0402_5%

1 2

R40 1K_0402_5%

1 2

R63 10K_0402_5%

1 2

R56 475_0402_1%

R52 27_0402

R45 27_0402

1 2

R87 33_0402_5%

1 2

R86 33_0402_5%

1 2

R88 33_0402_5%

XTALIN

12

Y2

14.318MHZ

XTALOUT

ICH_48M

CLK_SD48M

ICH_14M

300 ohm

1 2

L25 BLM21A601SPT

U5

2

3

54 55 40

25 34 53

28

43

29 30

33 35

42

39

38

56

ICS950211_BG

+3V_CLK

1

XTAL_IN

VDD_REF

XTAL_OUT

SEL0 SEL1 SEL2

PWR_DWN# PCI_STOP# CPU_STOP#

VTT_PWRGD#

MULT0

SDATA SCLK

3V66_0 3V66_1/VCH_CLK/SEL4

IREF

48MHZ_USB/SEL3

48MHZ_DOT

REF

GND_REF4GND_PCI_09GND_PCI_115GND_3V66_020GND_3V66_131GND_48MHZ36GND_IREF41GND_CPU

Width=40 mils

10U_1206_10V4Z

50

37

32

14

VDD_PCI_08VDD_PCI_1

VDD_CPU_046VDD_CPU_1

VDD_48MHZ

VDD_3V66_019VDD_3V66_1

WDEN/PCICLK0

47

12

C100

VDDA

VSSA

CPUCLKT2

CPU_CLKC2

CPUCLKT1

CPUCLKC1 CPUCLKT0

CPUCLKC0

3V66_5

3V66_4 3V66_3 3V66_2

PCICLK_F2 PCICLK_F1 PCICLK_F0

PCICLK6 PCICLK5 PCICLK4 PCICLK3 PCICLK2 PCICLK1

.1U_0402_16V4Z

12

C158

26

27

CPU_BCLK

45

CPU_BCLK#

44

MCH_BCLK

49

MCH_BCLK#

48

CPU_ITP

52

CPU_ITP#

51 24

AGP_66M

23

MCH_66M

22

ICH_66M

21

PCI_ICH

7 6 5

PCI_SD

18

PCI_1394

17

PCI_LAN

16

PCI_PCM

13

PCI_MINI

12

PCI_LPC

11

PCI_SIO

10

12

C115

.1U_0402_16V4Z

+3V_VDD

12

C108

.1U_0402_16V4Z

R74

1 2

12

C138

+3VS

1 2

R64 49.9_0402_1%

1 2

R57 49.9_0402_1%

1 2

R75 49.9_0402_1%

1 2

R71 49.9_0402_1%

1 2

R84 @49.9_0402_1%

1 2

R82 @49.9_0402_1%

@10P_0402_50V8K

12

C182

1 2

L26 BLM21A601SPT

12

C97 10U_1206_10V4Z

1 2

R65 27.4_0402_1%

1 2

R58 27.4_0402_1%

1 2

R76 27.4_0402_1%

1 2

R72 27.4_0402_1%

1 2

R85 @27.4_0402_1%

1 2

R83 @27.4_0402_1%

R38 33_0402_5%

1 2

R42 33_0402_5%

1 2

R48 33_0402_5%

1 2

R81 33_0402_5%

1 2

R55 SD@33_0402_5%

1 2

R62 33_0402_5%

1 2

R61 33_0402_5%

1 2

R66 33_0402_5%

1 2

R69 33_0402_5%

1 2

R70 33_0402_5%

1 2

R73 33_0402_5%

1 2

10K_0402_5%

.1U_0402_16V4Z

12

C153

12

C129

@10P_0402_50V8K

12

C175

.1U_0402_16V4Z

12

C126

.1U_0402_16V4Z

12

C193

12

C116

@10P_0402_50V8K

CLK_CPU_BCLK <4>

7W8S 2-12" +-10mil CPU+100 mil=MCH

CLK_CPU_BCLK# <4> CLK_MCH_BCLK <8>

CLK_MCH_BCLK# <8> CLK_CPU_ITP <5>

CLK_CPU_ITP# <5>

CLK_AGP <15> CLK_MCH_66M <9> CLK_ICH_66M <16>

CLK_PCI_ICH <16>

CLK_PCI_SD <26> CLK_PCI_1394 <25> CLK_PCI_LAN <24> CLK_PCI_PCM <22> CLK_PCI_MIN <34> CLK_PCI_LPC <29> CLK_PCI_SIO <27>

Clock G enerator

12

C90 .1U_0402_16V4Z

5W15S MCH-4"

5W20S 4-8.5" ICH+-100mil=MCH

5W15S 4-8.5" +-100mil

-2.5" +-500mil

watch dog disable

CPU Frequency Select Table

SEL[2:0] CK-408 Speed

B

100 MHZ

133 MHZ

C

001

4 4

A

011

*

ground plane inside the part pads one power plane inside the part pads

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

E

F

Title

Size Do cum e nt Number R e v

401248

Dat e : Sheet

Com pal Electronics, Inc.

SCHEMATIC, M/B LA-1761

期四三月

G

of

14 47¬P , 27, 2003

H

2A

A

1 1

2 2

3 3

4 4

+AGP_NBREF

12

C466 .1UF _ 0 402

5 5

6 6

TV_LUMA

7 7

TV_CRMA

TV_COMPS

75_0402

12

R10

8 8

A

MEDIA_LED#<26>

MAIL_LED #<29>

R9

75_0402

B

INT_MIC<21>

CRT_R<33> CRT_G<33> CRT_B<33>

PID0<27> PID1<27> PID2<27> PID3<27> PID4<27>

NUMLED#<29>

CAPSLED#<29>

+AGP_NBREF

+1.8VS

+1.5VS

12

C51 .1UF _ 0 402

+5VS

CRT_R CRT_G CRT_B CRT_HSYNC

CRT _VSYNC 3VDDCDA 3VDDCCL PID0 PID1 PID2 PID3 PID4

12

C56 22UF_ 1 0V_1206

GNDB

+1.8VS

12

C465

.1UF _ 0 402

TV_OUT CONNECTOR

D3

@DAN217

2

FBM-11-160808-121

12

R11

75_0402

B

12

270PF_0402

C29

270PF_0402

12

C28

12

C30

270PF_0402

C

JP5

1

GND

3

5

7

9

11

13

15

17

19

21

GND

23

25

27

29

31

33

35

37

39

41

GND

43

45

47

49

51

53

55

57

59

61

GND

63

65

67

69

71

73

75

77

79

81

GND

83

85

87

89

91

93

95

97

97 GND99GND

FOXCONN-100P

+2.5VS

12

C442 .1UF _ 0 402

1

3

L42

1 2

FBM-11-160808-121

L44

1 2

L43

1 2

FBM-11-160808-121

C

GND

D2

@DAN217

2

330PF_0402

10 12 14 16 18 20

24 26 28 30 32 34 36 38 40

44 46 48 50 52 54 56 58 60

64 66 68 70 72 74 76 78 80

84 86 88 90 92 94 96 98

4 6 8

+3VS

1

12

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100

C467 .1UF _ 0 402

3

C26

330PF_0402

12

C25

TV_LUMA TV_CRMA TV_COMPS

12

C468 .1UF _ 0 402

D4 @DAN217

12

C27

330PF_0402

D

E

AGP 100X2 Pin connector

INV_B+

JP20

1 2 3 4 5 6 7

S CONN.

AGP_ST[0..2]<9>

AGP_SBA[0..7]<9>

AGP_AD[0..31]<9>

AGP_C/BE#[0..3]<9>

B++

Width=60 mils

M_SEN# CRT_R

CRT_G

CRT_B

E

L29 FBM-L11-201209-221

75_0402

EC_SM C 1 <29,30,38> EC_SM D 1 <29,30,38>

SUS_STAT# < 17,27>

TV_LUMA <33> TV_CRMA <33>

KSO16 <29> KSI0 <28,29,32> KSI1 <28,29,32> KSI2 <28,29,32> KSI3 <28,29,32>

KSI4 <28,29,32> LID _ SW# <29> DR V 0 # <19, 27> ON/OFFBTN# <32>

+3VS

+1.25VS_VGA

+12VALW+1.5VS +5VS

12

C443 .1UF _ 0 402

+3VS

1

M_SEN#<29,30,33>

2

3

TV_LUMAL TV_CRMAL

TV_COMPSL

D

F

AGP_ST[0..2] AGP_SBA[0..7] AGP_AD[0..31] AGP_C/BE#[0..3]

AGP_ADSTB1#<9>

AGP_ADSTB1<9>

AGP_ADSTB0<9>

AGP_ADSTB0#<9>

CLK_AGP<14> AGP_PAR<9>

AGP_IRDY#<9>

AGP_TRDY#<9>

AGP_GNT#<9> AGP_REQ#<9>

AGP_BUSY#<17>

AGP_WBF#<9>

+12VALW

+2.5VS

Q23 1 2 3 6

12

C321 .1UF _ 0 402

R205

100K_0402

4

FDS4435

CRT CONNECTOR

R7

1 2

10PF_ 0402

12

C24

C32

R17

1 2

75_0402

10PF_0402

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

75_0402

R13

1 2

10PF_0402

F

AGP_ST0 AGP_ST2 AGP_SBA0 AGP_SBA2 AGP_SBA4 AGP_SBA6 AGP_AD30 AGP_AD28 AGP_AD26

AGP_AD24 AGP_AD22

AGP_AD20 AGP_AD18

AGP_AD16 AGP_AD14 AGP_AD12 AGP_AD10 AGP_AD8 AGP_AD6

AGP_AD4 AGP_AD2 AGP_AD0

8 7

5

FDS4435: P CHANNAL

1 2

R206 75K

1 2

FCM2012C80_0805

1 2

FCM2012C80_0805

1 2

FCM2012C80_0805

12

C35

CRT_HSYNCRFL<33> CRT_VSYNCRFL<33>

11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89

Width=60 mils

+5VS

13

D

Q20

2

G

S

2N7002

D5

@DAN217

2

L18

CRTL_R

L19

CRTL_G

L20

CRTL_B

12

C9 22PF_ 0402

CRT_HSYNC

CRT _VSYNC

G

JP3

1

GND

3

5

7

9

9 11 13 15 17 19 GND 23 25 27 29 31 33 35 37 39 GND 43 45 47 49 51 53 55 57 59 GND 63 65 67 69 71 73 75 77 79 GND 83 85 87 89 919192 939394 959596 979798 GND99GND

FOXCONN-100P

INVPWR_B+

1

3

1 2 CHB1608B121

1 2

CHB1608B121

CRT_ HSYNCRFL CRT_VSYNCRFL

G

GND

D7

12

C11 22PF_0402

L41

L40

2 4

4

6

8

10

12

14

16

18

20

22 24

24

26

28

30

32

34

36

38

40

42 44

44

46

48

50

52

54

56

58

60

62 64

64

66

68

70

72

74

76

78

80

82 84

84

86

88

90

92 94 96 98 100

1

@DAN217

2

CRT_ HSYNCRFL

CRT_VSYNCRFL

H

AGP_ST1 AGP_SBA1 AGP_SBA3 AGP_SBA5 AGP_SBA7

AGP_C/BE#3 AGP_AD31 AGP_AD29 AGP_AD27 AGP_AD25 AGP_C/BE#2 AGP_AD23 AGP_AD21 AGP_AD19

AGP_AD17 AGP_C/BE#1 AGP_AD15 AGP_AD13 AGP_AD11 AGP_AD9 AGP_C/BE#0 AGP_AD7 AGP_AD5

AGP_AD3 AGP_AD1

M_SEN#

LVDS_BLON#

1

D8

@DAN217

3

2

3

12

C12 22PF_0402

22PF_0402

+3VS

12

+5VS

C438

+2.5VS

D29

2 1

RB411D

C437

12

22PF_0402

AGP_SBSTB <9> AGP_SBSTB# <9>

PM_C3_STAT# <17> PCIR ST# <5 , 9,16,1 9,22,24,25,27,34> AGP_DEVSEL# <9> AGP_STOP# <9> AGP_FRAME# <9> PIRQA # <16,22,25> AGP_RBF# <9>

BKOFF#<29>

ENABLT<29>

LVDS_BLON#

F2

FUSE_1A

.1UF _ 0 402

C8

12

220PF_0402

H

I

INVPWR_B+

INVT_PWM<29>

DAC_BRIG<29>

+3VS

12

R283 10K_0402_5%

13

Q32

2

2N7002

CRT_VCCR_CRT_VCC

21

12

C436

R279

4.7K_0402 1 2

CRT_VCC

C13

C10

12

220PF_0402

Compal El ectroni cs, In c.

Title

SCHEMATIC , M/B LA-1761

Size Document Number Re v

401248

C

Date: Sheet

三月

I

R280

4.7K_0402 1 2

1 3

Q34

2N7002

2

Q33

2N7002

D1

RB751V D6

RB751V

6

11

1 7

12

2 8

13

3 9

14

4 10 15

5

1 3

2

INVT_PWM DISPOFF# DAC_BRIG

21

+3VS

1 2

JP19

CRT CONN.

J

JP1

1

2

3

4

5

6

7

HEADER 7

R278

4.7K_0402_5%

DISPOFF#

3VDDCDA

3VDDCCL

R29 0 4.7K_0402

12

R28 9 4.7K_0402

12

R29 1 4.7K_0402

DOCK_DDCDA <33> DOCK_DDCCL <33>

of

15 47星期|, 27, 2003

J

+3VS

2A

A

B

C

D

AD[0..31]<22,24,25,34>

1 1

+CPU_CORE

PCI_PERR# REQA# PCI_STOP# PCI_SERR#

+3VS

2 2

3 3

+3VS

PCI_IRDY# PCI_TRDY# PCI_DEVSEL#

PCI Pullups

+3VS

RP67 1 8 2 7 3 6 4 5

8.2K_8P4R_5%

1 2

R339 8.2K_0402_5%

R177 62_0402_5%

RP68 1 2 3 4 5

8.2K_1206_10P8R_5%

RP69 1 2 3 4 5

8.2K_1206_10P8R_5%

12

REQ#1 REQ#2 REQ#3 REQ#0

REQB#

H_FERR#

10 9 8 7 6

PIRQA# PIRQB# REQ#4

PIRQC# PIRQD# SIRQPCI_FRAME# PLOCK#

+3VALW

+3VS

12

R401 @10K_0402

Place closely pin P5

CLK_PCI_ICH

@22_0402_5%

@10P_0402_50V8K

R152

C267

12

AD[0..3 1 ]

C/BE#0<22,24,25,34> C/BE#1<22,24,25,34> C/BE#2<22,24,25,34> C/BE#3<22,24,25,34>

REQ#0<25> REQ#1<34> REQ#2<22> REQ#3<24> REQ#4<34>

GNT#0<25> GNT#1<34> GNT#2<22> GNT#3<24> GNT#4<34>

CLK_PCI_ICH<14>

PCI_FRAME#<22,24,25,34>

PCI_DEVSEL#<22,24,25,34>

PCI_IRDY#<22,24,25,34>

PCI_PAR<22,24,25,34>

PCI_PERR#<22,24,25,34>

PLOCK#<22>

PCI_SERR#<22,24,34>

PCI_STOP#<22,24,25,34>

PCI_TRDY#<22,24,25,34>

PIDERST#<19>

ICH_SIDERST#<19>

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

C/BE#0 C/BE#1 C/BE#2 C/BE#3

REQ#0 REQ#1 REQ#2 REQ#3 REQ#4

CLK_PCI_ICH

PLOCK# ICH_W AKE_UP# ICH_PCIRST#

REQA# REQB# PIDERST# ICH_SIDERST#

U35A

H5

AD0

J3

AD1

H3

AD2

K1

AD3

G5

AD4

J4

AD5

H4

AD6

J5

AD7

K2

AD8

G2

AD9

L1

AD10

G4

AD11

L2

AD12

H2

AD13

L3

AD14

F5

AD15

F4

AD16

N1

AD17

E5

AD18

N2

AD19

E3

AD20

N3

AD21

E4

AD22

M5

AD23

E2

AD24

P1

AD25

E1

AD26

P2

AD27

D3

AD28

R1

AD29

D2

AD30

P4

AD31

J2

C/BE#0

K4

C/BE#1

M4

C/BE#2

N4

C/BE#3

B1

REQ#0

A2

REQ#1

B3

REQ#2

C7

REQ#3

B6

REQ#4

C1

GNT#0

E6

GNT#1

A7

GNT#2

B7

GNT#3

D6

GNT#4

P5

PCICLK

F1

FRAME#

M3

DEVSEL#

L5

IRDY#

G1

PAR

L4

PERR#

M2

LOCK#

W2

PME#

U5

PCIRST#

K5

SERR#

F3

STOP#

F2

TRDY#

B5

REQA#/GPI0

A6

REQB#/GPI1/REQ5#

E8

GNTA#/GPO16

C5

GNTB#/GPO17/GNT5#

ICH4

SM I/F

CPU I/F

HUB I/F

PCI I/F

EEPROM I/F

LAN I/F

INTRUDER#

SMLINK0 SMLINK1

SMB_CLK

SMB_DATA

SMB_ALERT#/GPI11

A20GATE

A20M#

DPSLP#

FERR#

IGNNE#

INIT# INTR

CPU_PWRGOOD

RCIN#

SLP#

SMI#

STPCLK#

HI10 HI11

CLK66

HI_STB

HI_STB# HICOMP

HUB_VREF

HUB_VSWING

APICCLK

APICD0 APICD1 PIRQA# PIRQB# PIRQC# PIRQD#

PIRQE#/GPI2

PIRQF#/GPI3 PIRQG#/GPI4 PIRQH#/GPI5

IRQ14 IRQ15

SERIRQ

Interrupt I/F

EE_CS

EE_IN

EE_OUT

EE_SHCLK

LAN_RXD0 LAN_RXD1 LAN_RXD2

LAN_TXD0 LAN_TXD1 LAN_TXD2

LAN_CLK

LAN_RSTSYNC

LAN_RST#

SM_INTRUDER#

W6

SMLINK0

AC3 AB1 AC4 AB4 AA5

Y22 AB23 U23 AA21 W21 V22 AB22 V21

NMI

Y23 U22 U21 W23 V23

L19

HI0

L20

HI1

M19

HI2

M21

HI3

P19

HI4

R19

HI5

T20

HI6

R20

HI7

P23

HI8

L22

HI9

N22 K21

T21 P21

N20 R23

M23 R22

J19 H19 K20 D5 C2 B4 A3 C8 D7 C3 C4 AC13 AA19 J22

D10 D11 A8 C12

A10 A9 A11 B10 C10 A12 C11 B11 Y5

1 2

SMLINK1

R181 @0_0402_5%

1 2

SMB_CLK

R407 @0_0402_5% SMB_DATA SMB_ALERT#

GATEA20

R178 68_0402_5%

R166 68_0402_5% R179 68_0402_5%

R157 68_0402_5% R172 68_0402_5%

R154 68_0402_5% R163 68_0402_5% R159 68_0402_5%

HI0 HI1 HI2 HI3 HI4 HI5 HI6 HI7 HI8 HI9 HI10

R149 62_5%_0402

CLK_ICH_66M

HUB_RCOMP_ICH HUB_VREF HUB_VSWING

APICD0 APICD1 PIRQA# PIRQB# PIRQC# PIRQD# PIRQE# PIRQF# PIRQG# PIRQH# IRQ14 IRQ15 SIRQ

1 2

R153 68_0603_1%

1 2

R347 @1K_0402_5%

1 2

R165 10K_0402_5%

12

12 12

12 12 12

HI[0..10]

12

GATEA20 <29> H_A20M# <5>

H_FERR# <5> H_IGNNE# <5> H_INIT# <5> H_INTR <5> H_NMI <5> H_PWRGD <5> KBRST# <29> H_SLP# <5> H_SMI# <5> H_STPCLK# <5>

HI[0..10] <8>

CLK_ICH_66M <14> HUB_PSTRB <8>

HUB_PSTRB# <8>

+1.5VS

HUB_VREF <8,10> HUB_VSWING <8,10>

PIRQA# <15,22,25> PIRQB# <24> PIRQC# <34> PIRQD# <34>

IRQ14 <19> IRQ15 <35> SIRQ <22,26,27,29>

SM_INTRUDER#

SMLINK0 SMLINK1 SMB_ALERT# SMB_CLK SMB_DATA

IRQ14 IRQ15 GATEA20 KBRST# DIMM_SMCLK DIMM_SMDATA

PIRQG# PIRQH# PIRQF# PIRQE#

APICD0 APICD1

1 2

R169 100K_0402

1 2

R185 8.2K_0402_5%

1 2

R405 8.2K_0402_5%

1 2

R403 10K_0402_5%

1 2

R184 8.2K_0402_5%

1 2

R183 8.2K_0402_5%

1 2

R413 8.2K_0402_5%

1 2

R173 8.2K_0402_5%

1 2

R167 10K_0402_5%

1 2

R160 10K_0402_5%

1 2

R198 8.2K_0402_5%

1 2

R197 8.2K_0402_5%

RP66

1 8 2 7 3 6 4 5

8.2K_8P4R_5%

R148 10K_0402_5%

1 2

+RTCVCC

+3VALW

+3VS

Q18

2N7002

+3VS

G

2

SMB_CLK

13

D

S

SMB_DATA

2

G

DIMM_SMDATA

1 3

D

S

Q17 2N7002

Title

Size Doc ument Number Re v

401248

Date: Sheet

星期四三月

DIMM_SMDATA <11,12,14>

Compal E l e c t r onics, Inc.

SCHEM AT IC , M/ B LA-1761

27, 2003

D

16 47,

2A

of

Place closely pin T21

CLK_ICH_66M

4 4

@22_0402_5%

@10P_0402_50V8K

A

R155

C280

12

ICH_PCIRST#

+3VS

5

1 2

3

4

U15 74AHC1G08

B

PCIRST# <5,9,15,19,22,24,25,27,34>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DIMM_SMCLK<11,12,14>

C

DIMM_SMCLK

A

1 1

+3VS

1 2

R417 @10K_0402_5%

1 2

R371 @1K_0402_5%

1 2

R340 @8.2K_0402_5%

+3VALW

1 2

R344 10K_0402_5%

1 2

R345 10K_0402_5%

2 2

1 2

R343 10K_0402_5%

1 2

R346 10K_0402_5%

1 2

R342 10K_0402_5%

1 2

R400 8.2K_0402_5%

1 2

R398 8.2K_0402_5%

1 2

R402 8.2K_0402_5%

1 2

R506 10K_0402_5%

+3VALW

PM_CLKRUN#

ICH_SPKR

ICH_AC_SDOUT

OVCUR#4 OVCUR#5 OVCUR#3 OVCUR#2 OVCUR#1 EC_SMI# EC_SCI# ICH_SWI# OVCUR#0

BOARD ID

BD_ID2 SST PT 0

BD_ID1 0 01 0

BD_ID2

BD_ID1

BD_ID0

MDC_DET#<31>

0

1 2

R133 @100K_0402

1 2

R129 10K_0402

1 2

R143 @100K_0402

1 2

R139 10K_0402

1 2

R124 @100K_0402

1 2

R121 10K_0402

QT

3 3

4 4

0

1 1

ACIN<29,37>

MDC_DET#

A

BD_ID0

0

0ST 1

+3VS

D36 RB751V

1 2

R144 100K_0402

12

R412 10K_0402

VLBA#<29>

21

+3VS

12

R367 100K_0402

AGP_BUSY#<15>

SYSRST#<5>

PM_C3_STAT#<15>

PM_CLKRUN#<22,27,29,34>

PBTN_OUT#<29>

PM_PWROK<9,32>

ICH_SWI#<29>

RSMRST#<32>

SLP_S1#<29> SLP_S3#<29> SLP_S4#<29> SLP_S5#<29>

SUS_STAT#<15,27>

EC_THRM#<29>

ICH_VGATE<32>

IAC_BITCLK<20,31,34>

IAC_RST#<20,31,34> IAC_SDATA_IN0<20> IAC_SDATA_IN1<31,34>

LAD0<26,27,29> LAD1<26,27,29> LAD2<26,27,29> LAD3<26,27,29>

LDRQ#1<27>

LFRAME#<26,27,29>

USBP0+<31>

USBP0-<31>

USBP1+<31>

USBP1-<31>

USBP2+<31>

USBP2-<31>

USBP3+<31>

USBP3-<31>

USBP4+<33>

USBP4-<33>

USBP5+<33>

USBP5-<33>

OVCUR#0<31> OVCUR#1<31> OVCUR#2<31>

OVCUR#4<33> OVCUR#5<33>

AGP_BUSY#

PM_CLKRUN#

ICH_SWI#

IAC_BITCLK IAC_SDATA_IN0

IAC_SDATA_IN1 ICH_AC_SDOUT

ICH_AC_SYNC

LAD0 LAD1 LAD2 LAD3

LFRAME#

match < 150 mils

OVCUR#0 OVCUR#1 OVCUR#2 OVCUR#3 OVCUR#4 OVCUR#5

USB_RBIAS

5 mil < 500 mil

R118

22.6_0603_1%

1 2

MDC_DET#

BD_ID0 BD_ID1

EC_FLASH#<30>

BD_ID2 ICH_ACIN

B

+3VALW

12

R174

8.2K_0402_5%

12

R120 33_0402_5%

1 2

R497 0_0402_5%

IAC_SYNC<20,31,34>

IAC_SDATAO<20,31,34>

@22P_0402_50V8J

B

U35B

R2

AGPBUSY#/GPI6

Y3

SYSRST#

AB2

BATLOW#

T3

C3_STAT#/GPO21

AC2

CLKRUN#/GPIO24

V20

DPRSLPVR

AA1

PWRBTN#

AB6

PWROK

Y1

RI#

AA6

RSMRST#

W18

SLP_S1#/GPO19

Y4

SLP_S3#

Y2

SLP_S4#

AA2

SLP_S5#

W19

STP_CPU#/GPO20

Y21

STP_PCI#/GPO18

AA4

SUS_CLK

AB3

SUS_STAT#/LPCPD#

V1

THRM#

J21

SSMUXSEL/GPO23

Y20

CPUPERF#/GPO22

V19

VGATE/VRMPWRGD

B8

AC_BITCLK

C13

AC_RST#

D13

AC_SDATAIN0

A13

AC_SDATAIN1

B13

AC_SDATAIN2

D9

AC_SDATAOUT

C9

AC_SYNC

T2

LPC_AD0

R4

LPC_AD1

T4

LPC_AD2

U2

LPC_AD3

U3

LPC_DRQ#0

U4

LPC_DRQ#1

T5

LPC_FRAME#

C20

USBP0+

D20

USBP0-

A21

USBP1+

B21

USBP1-

C18

USBP2+

D18

USBP2-

A19

USBP3+

B19

USBP3-

C16

USBP4+

D16

USBP4-

A17

USBP5+

B17

USBP5-

B15

OC#0

C14

OC#1

A15

OC#2

B14

OC#3

A14

OC#4

D14

OC#5

A23

USB_RBIAS

B23

USB_RBIAS#

J20

GPIO32

G22

GPIO33

F20

GPIO34

G20

GPIO35

F21

GPIO36

H20

GPIO37

F23

GPIO38

H22

GPIO39

G23

GPIO40

H21

GPIO41

F22

GPIO42

E23

GPIO43

ICH4

C

ICH4

GPIO

PM

IST

AC97 I/F

IDE I/F

LPC I/F

USB I/F

CLOCK

GPIO

MISC

1 2

R341 33_0402_5%

1 2

12

C548

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R335 33_0402_5%

12

C542 @22P_0402_50V8J

GPI7 GPI8

GPI12

GPO13 GPIO25 GPIO27 GPIO28

PDA0 PDA1

PDA2 PDCS1# PDCS3#

PDDREQ

PDDACK#

PDIOR#

PDIOW#

PIORDY

PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8

PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15

SDA0 SDA1

SDA2 SDCS1# SDCS3#

SDDREQ

SDDACK#

SDIOR#

SDIOW#

SIORDY

SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8

SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15

CLK14 CLK48

RTCRST#

VBIAS RTCX1 RTCX2

SPKR

THRMTRIP#

ICH_AC_SYNC ICH_AC_SDOUT

R3 V4 V5 W3 V2 W1 W4

AA13 AB13 W13 Y13 AB14

AA11 Y12 AC12 W12 AB12

AB11 AC11 Y10 AA10 AA7 AB8 Y8 AA8 AB9 Y9 AC9 W9 AB10 W10 W11 Y11

AA20 AC20 AC21 AB21 AC22

AB18 AB19 Y18 AA18 AC19

W17 AB17 W16 AC16 W15 AB15 W14 AA14 Y14 AC15 AA15 Y15 AB16 Y16 AA17 Y17

J23 F19

W7 Y6 AC7 AC6

H23

H_THERMTRIP#

W20

EC_SMI# EC_SCI# LID_OUT#

PDA0 PDA1 PDA2 PDCS1# PDCS3#

PDDREQ PDDACK# PDIOR# PDIOW# PDIORDY

PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15

SDA0 SDA1 SDA2 SDCS1# SDCS3#

SDDREQ SDDACK# SDIOR# SDIOW# SDIORDY

SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15

RTC_RST# VBIAS RTCX1 RTCX2

EC_SMI# <29> EC_SCI# <29> LID_OUT# <29>

SIDEPWR <19>

PDA0 <19> PDA1 <19> PDA2 <19> PDCS1# <19> PDCS3# <19>

PDDREQ <19> PDDACK# <19> PDIOR# <19> PDIOW# <19> PDIORDY <19>

SDA0 <35> SDA1 <35> SDA2 <35> SDCS1# <35> SDCS3# <35>

SDDREQ <35> SDDACK# <35> SDIOR# <35> SDIOW# <35> SDIORDY <35>

CLK_ICH_14M <14> CLK_ICH_48M <14>

ICH_SPKR <20> H_THERMTRIP# <5>

C

JOPEN

R416

10M_0603_5%

X3

32.768KHZ_12.5P_

12

C598 12P_0402_50V8K

PDD[0..15]

SDD[0..15]

J1

12

R175

4.7K_0402_5%

< 1"

R190

1 2 10M_0603_5%

12

C599 12P_0402_50V8K

D

Place close to pin B8

IAC_BITCLK

12

R122 @10_0402_5%

12

C218 @10P_0402_50V8K

Place close to pin J23

CLK_ICH_14M

12

R147 @10_0402_5%

12

C253 @10P_0402_50V8K

Place close to pin F19

CLK_ICH_48M

12

R138 @10_0402_5%

12

C241 @10P_0402_50V8K

PDD[0..15] <19>

SDD[0..15] <35>

+RTCVCC

R170

12

C291

12

1 2

Title

Size Doc ument Number Re v

Date: Sheet

1U_0603_10V4Z

C312

R_VBIAS

1 2

.047U_0402_16V4Z

R191

12

@22M_0603_5% R415 @2.4M_0603_5%

401248

星期四三月

12

15K_0402_5%

R418

1 2

1K_0402_5%

Compal E l e c t r onics, Inc.

SCHEM AT IC , M/ B LA- 1761

27, 2003

D

of

17 47,

2A

A

U35C

D22

VSS0

E10

VSS1

E14

VSS2

E16

VSS3

E17

VSS4

E18

VSS5

E19

VSS6

E21

VSS7

E22

VSS8

F8

AA12 AA16 AA22

AB20

AC10 AC14 AC18 AC23

M11 M12 M13 M20 M22

W22

AA3 AA9

AB7 AC1

AC5

VSS9

G19

VSS10

G21

VSS11

G3

VSS12

G6

VSS13

H1

VSS14

J6

VSS15

K11

VSS16

K13

VSS17

K19

VSS18

K23

VSS19

K3

VSS20

L10

VSS21

L11

VSS22

L12

VSS23

L13

VSS24

L14

VSS25

L21

VSS26

M1

VSS27 VSS28 VSS29 VSS30 VSS31 VSS32

N10

VSS33

N11

VSS34

N12

VSS35

N13

VSS36

N14

VSS37

N19

VSS38

N21

VSS39

N23

VSS40

N5

VSS41

P11

VSS42

P13

VSS43

P20

VSS44

P22

VSS45

P3

VSS46

R18

VSS47

R21

VSS48

R5

VSS49

T1

VSS50

T19

VSS51

T23

VSS52

U20

VSS53

V15

VSS54

V17

VSS55

V3

VSS56 VSS57

W5

VSS58

W8

VSS59

Y19

VSS60

Y7

VSS61

A16

VSS62

A18

VSS63

A20

VSS64

A22

VSS65

A4

VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79

B12

VSS80

B16

VSS81

B18

VSS82

B20

VSS83

B22

VSS84

B9

VSS85

C15

VSS86

C17

VSS87

C19

VSS88

C21

VSS89

C23

VSS90

C6

VSS91

D1

VSS92

D12

VSS93

D15

VSS94

D17

VSS95

D19

VSS96

D21

VSS97

D23

VSS98

D4

VSS99

D8

VSS100

A1

VSS101

ICH4

1 1

2 2

3 3

4 4

B

ICH4

POWERGND

VCC3.3_0 VCC3.3_1 VCC3.3_2 VCC3.3_3 VCC3.3_4 VCC3.3_5 VCC3.3_6 VCC3.3_7 VCC3.3_8

VCC3.3_9 VCC3.3_10 VCC3.3_11 VCC3.3_12 VCC3.3_13 VCC3.3_14 VCC3.3_15

VCCSUS3.3_0 VCCSUS3.3_1 VCCSUS3.3_2 VCCSUS3.3_3 VCCSUS3.3_4 VCCSUS3.3_5 VCCSUS3.3_6 VCCSUS3.3_7 VCCSUS3.3_8 VCCSUS3.3_9

VCC1.5_0

VCC1.5_1

VCC1.5_2

VCC1.5_3

VCC1.5_4

VCC1.5_5

VCC1.5_6

VCC1.5_7

VCCSUS1.5_0 VCCSUS1.5_1 VCCSUS1.5_2 VCCSUS1.5_3 VCCSUS1.5_4 VCCSUS1.5_5 VCCSUS1.5_6 VCCSUS1.5_7

VCC5REF1 VCC5REF2

VCC5REFSUS1

VCCHI_0 VCCHI_1 VCCHI_2 VCCHI_3

VCC_CPU_IO_0 VCC_CPU_IO_1 VCC_CPU_IO_2

VCCPLL

VCCRTC

VCCLAN3.3_0 VCCLAN3.3_1

VCCLAN1.5_0 VCCLAN1.5_1

A5 AC17 AC8 B2 H18 H6 J1 J18 K6 M10 P12 P6 U1 V10 V16 V18

E11 F10 F15 F16 F17 F18 K14 V7 V8 V9

K10 K12 K18 K22 P10 T18 U19 V14

E12 E13 E20 F14 G18 R6 T6 U6

E7 V6

E15

L23 M14 P18 T22

AA23 P14 U18

C22

AB5

E9 F9

F6 F7

VCC5REF

VCC5REFSUS

+1.5VS_PLL

1 2

R363 0_0805_5%

+3VS_ICHLAN

1 2

R142 0_0805_5%

+1.5VS_ICHLAN

1 2

R146 0_0805_5%

C

+3VS

+3VALW

+1.5VS

+1.5VALW

+1.5VS

+CPU_CORE

+1.5VS

+RTCVCC

+3VS

+1.5VS

D

+3VS

12

C261

4.7U_0805_10V4Z

12

C215 .1U_0402_16V4Z

+3VALW

12

C243

4.7U_0805_10V4Z

12

C232 .1U_0402_16V4Z

+1.5VS

12

C262

4.7U_0805_10V4Z

E

12

C263

.1U_0402_16V4Z

12

C289

.1U_0402_16V4Z

12

C235

.1U_0402_16V4Z

12

C231

.1U_0402_16V4Z

12

C257

.1U_0402_16V4Z

12

C269 .1U_0402_16V4Z

12

C290 .1U_0402_16V4Z

12

C226 .1U_0402_16V4Z

12

C256 .1U_0402_16V4Z

12

C270 .1U_0402_16V4Z

12

C252

.1U_0402_16V4Z

12

C302 .1U_0402_16V4Z

12

C233 .1U_0402_16V4Z

12

C234 .1U_0402_16V4Z

12

C283 .1U_0402_16V4Z

F

12

C247 .1U_0402_16V4Z

12

C284 .1U_0402_16V4Z

12

C285 .1U_0402_16V4Z

12

C276 .1U_0402_16V4Z

12

C272

.1U_0402_16V4Z

12

C300 .1U_0402_16V4Z

12

C286 .1U_0402_16V4Z

12

C281 .1U_0402_16V4Z

G

12

C251

.1U_0402_16V4Z

12

C282

.1U_0402_16V4Z

12

C287

.1U_0402_16V4Z

12

C255

.1U_0402_16V4Z

12

C217

.1U_0402_16V4Z

12

C245

.1U_0402_16V4Z

12

C254 .1U_0402_16V4Z

H

12

C275

.1U_0402_16V4Z

VCC DECOUPLING

+1.5VS

near L23, M14, P18, T22

12

C259 .1U_0402_16V4Z

12

C258 .1U_0402_16V4Z

12

C271

4.7U_0805_10V4Z

+1.5VALW

12

C225

.1U_0402_16V4Z

12

C277

.1U_0402_16V4Z

12

C224 .1U_0402_16V4Z

12

C242

4.7U_0805_10V4Z

VCCHI DECOUPLING

+CPU_CORE

12

C298 .1U_0402_16V4Z

+RTCVCC

C301 .1U_0402_10V6K

AA23

12

C288 .1U_0402_16V4Z

+1.5VS_PLL

12

.1U_0402_16V4Z

C220

12

C274

1U_0603_10V4Z

C22

12

C555 .01U_0402_25V4Z

12

C238

.1U_0402_16V4Z

VCC5REFSUS

C209

1U_0603_10V4Z

D9

1SS355

12

C237 .1U_0402_16V4Z

21

12

C222 .1U_0402_16V4Z

12

R106 1K_0603_1%

12

C244

4.7U_0805_10V4Z

1U_0603_10V4Z

E7AB5

VCC5REF

C210

+3VS_ICHLAN+1.5VS_ICHLAN

12

C236

.1U_0402_16V4Z

+3VS +5VS+3VALW +5VALW

D10

1SS355

12

21

12

C227 .1U_0402_16V4Z

12

C228 .1U_0402_16V4Z

R107 1K_0603_1%

A4 A1 H1 T1 AC10 AC18 A22 AC5 K23 C23 A16 AC1 A16 T23 N23

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

E

F

Title

Size Doc ument Number Re v

Date: Sheet

Compal E l e c t r onics, Inc.

SCHEM AT IC , M/ B LA- 1761

401248

星期四三月

27, 2003

G

2A

of

18 47,

H

A

B

C

D

E

F

G

H

I

J

+3VS

PCIRST#

C248

12

.1UF_0402

1 2

PDIORDY<17>

U13

5

3

+3VS

+5VS

PIDE_RST#

4

7SH08FU

1 2

R248 4.7K_0402

PDIORDY

1 2

R249 100K_0402

PHDD_LED#

PDD[0..15]<17>

PDDACK#<17>

PDDREQ<17> PDIOW#<17>

PDIOR#<17>

PDCS1#<17>

PIDE_RST#

IRQ14<16>

PDA1<17> PDA0<17>

+5VS

HDD Connector

PDD[0..15]

R243 33_0402

1 2 PDD7 PDD6 PDD5 PDD4 PDD3 PDD2 PDD1 PDD0

PDDREQ PDIOW# PDIOR#

PDDACK#

JP34

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44

HDD_CONN_44P

PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15

PCSEL

1 2

R242 470_0402

PDA2 <17> PDCS3# <17>

+5VS

1 1

PCIRST#<5,9,15,16,22,24,25,27,34>

PIDERST#<16>

2 2

Place closely to JP31

PDIOW# PDIOR#

12

R245 @10_0402

12

C414 @15PF_0402

12

R246 @10_0402

C415 @15PF_0402

3 3

PDDREQ

1 2

R244 @5.6K_0402

1 2

C412 3 3PF_0402

4 4

CD-ROM Connector

R247 0_0402

CDD[0..15]

JP31

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

HEADER 2X30

1 2

C417

12

@.1UF_0402

+5VS

U26

5

1 2

@7SH08FU

3

1 2

C343 @47PF_0402

CD_AGND CDD8 CDD9 CDD10 CDD11 CDD12 CDD13 CDD14 CDD15 CD_DREQ

EXTID0 EXTID1 EXTID2

HDSEL#

WGATE#

FDDIR#

INDEX#

E

ACT_LED#

4

INT_CD _R <20>

CD_DR EQ <35> CD_SIOR# <35> CD _DACK# <35> CD_SBA2 <35> CD_SCS3# <35> EXTID0 <30> EXTID1 <30> EXTID2 <30> HDSEL# <27>

WGATE# <27>

FDDIR # <27> 3MODE# <27>

INDEX# <27>

+5VCD

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

ACT_LED# <26>

F

Placea caps. nea r CDROM CONN.

+5VCD

12

C346 1000PF_0402

+5VCD

12

C347 1000PF_0402

CD_DREQ

+3VS

C230

12

.1UF_0402

PCIRST#

5 5

6 6

ICH_SIDERST#<16>

INT_CD_L<20> CD_AGND<20>

+3VS +5VCD

CD_SIORDY<35>

+5VCD

7 7

U12

5

1 2

R426 WODJ@4 .7K_0402

1 2

CD_SIORDY

1 2

R427 100K_0402

SHDD_LED#

R428 470_0402

4

7SH08FU

3

1 2

C338 @47PF_0402

1 2

C337 @47PF_0402

R208 10K_0402

12

SIDERST#

12

CD_IDERST#<35>

CD_SIOW#<35>

CD_SCS1#<35>

DISKCHG#<27>

SIDERST# <35>

CD_IRQ<35> CD_SBA1<35> CD_SBA0<35>

RDATA#<27>

WP#<27>

TRACK0#<27>

WDATA#<27>

STEP#<27>

MTR0#<27>

DRV0#<15,27>

CDD[0..15]<35>

CD_AGND CD_IDERST# CDD7 CDD6 CDD5 CDD4 CDD3 CDD2 CDD1 CDD0

SEC_CSEL

RDATA# WP# TRACK0# WDATA# STEP# MTR0# DISKCHG# DRV0#

PHDD_LED# SHDD_LED#

8 8

A

B

C

D

+5VALW

W=100 mils

12

1 2

C341 33PF_0402

G

+5VS

Placea caps. near HDD CONN.

12

8 7 6 5

C345 .1UF_0402

C348 .1UF_0402

12

C416 1000PF_0402

C311

4.7UF_10V_0805

U20

C413

10UF_16V_1206

+5VALW +5VCD

12

+5VCD +5VALW

1

S

D

2

S

D

3

S

D

4

G

D

SI4800

R429

470

12

C344

1UF_25V_0805

12

C340

1UF_25V_0805

12 C597

.1UF

13

C306 1UF_25V_0805

+12VALW

2

Q57 2N7002

12

C326 10UF_16V_1206

12

C342 10UF_16V_1206

H

12

C407

10UF_16V_1206

12

C320

4.7UF_10V_0805

12

R421 100K

13

CDPLAY#

2

Q55

2N7002

12

C410 1UF_25V_0805

FDD

CD-ROM

LS-120

2'nd HDD

12

C411 .1UF_0402

12

C313 1UF_25V_0805

12

R414 100K

13

Q56

C

DTC124EK

22K

1 2

2

B

E

R425 1K_0402

22K

2 1

D40 RB751V

Extend Module ID list

0

00

0

1

11

NONE

Comp al E l e c t ro n i c s , Inc.

Title

SCHEMATIC, M/ B LA-1761

Size Document Number Re v

401248

Custom Date: Sheet

薔三月

I

CD_ P LA Y <20,30>

SIDEPWR <17>

CDPLA Y# <35>

EXTID0EXTID1EXTID2DEVICE

1

111

of

19 47星|, 27, 2003

J

2A

A

B

C

D

E

F

G

H

I

J

R444

560_0402

R445

560_0402

R446

560_0402

R447

@10K_0402

Y3

@24.576MHz

1 2

R484 22_0402

1 2

R482 22_0402

D

+5VS VDDA

12

R443 @100K_0402

2

12

2 1

@1M_0402R490

C694 @22PF_0402

MD_SPKRCMD_SPKR

MD_MONRC LINEL_IN_C LINER_IN_C

C680

.1UF_0402

CD_AGNDRC

12

3 1

D41 1SS355

12

R470 10K_0402

R471 10K_0402

Q65 2SC2411EK

+5VALW

12

C668 10UF_16V_1206

R480 0_0402

2

XTL-IN

3

XTL-OUT

11

RESET#

6

BIT-CLK

10

SYNC

5

SDATA-OUT

8

SDATA-IN

12

PC-BEEP

13

PHONE

14

AUX-L

15

AUX-R

16

VIDEO-L

17

VIDEO-R

18

CD-L

20

CD-R

21

MIC1

22

MIC2

23

LINE-L

24

LINE-R

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

R479

2.4K_0402

VSS4VSS7AVSS26AVSS

CD-GND

19

MONO_IN_R

12

E

MONO_IN

1 2

C686 1UF_10_0603

VDDC

12

C429 .1UF_0402

AVDD_AC97

38

9

VDD1VDD

AVDD25AVDD

42

F

12

C698 .1UF_0402

LINE-OUTL LINE-OUTR MONO-OUT

VREF

VREFOUT

AFILT1 AFILT2

VRAD VRDA CAP1

JD/SDIN1

TEST1

EAPD

SPDIFO

HP-OUT-L

HP-OUT-R

ALC202

C656

.1UF_0402

1 2

R272 0_0805

12

C430 10UF_10V_1206

U54

35 36 37

27 28

29 30

31 32 33 34

NC

43 44 45

ID0#

46

ID1#

47 48 39 40

NC

41

12

22UF_10V_1206

HB-1M2012-121JT

12

C431 10UF_10V_1206

C696

1000PF_0402

LINEL LINER MDMIC

C685

1000PF_0402

1 2

R487 0_0402

12

R489 10K_0402

L69

C687

C649

+3VS

G

+

1UF_0603

12

1 2

+AUD_VREF

1000PF_0402

VDDA

12

R488 @10K_0402

C652

VDDA

C693 1000PF_0402

12

C700 4.7U_10V_0805

1 2

C673 1UF_10V

C692

1UF_10V

U50

VIN2SD

ADJ

GND5VOUT

LP3964-ADJ

10K_1%_0402

C695 4.7U_10V_0805

12

C682 .1UF_0402

C690 1UF_10V

H

1 4 3

R453

1 2

R454 30K_1%_0402

12

C654 68PF_0402

12

C660 .1UF_0402

CD_PLAY <19,30>

VDDA

point .25-.5" split .05"

L62

1 2

0_0805

L64

1 2

0_0805

L61

GNDA

1 2

0_0805

L51

GNDB

1 2

0_0805

L46

GNDC

1 2

0_0805

AGNDDGND

1 2

C699 1UF_25V_0805

1 2

C697 1000PF_0402

C688

1UF_10V

LEFT <21> RIGH T <21>

MD_MIC <31,34>

ID1# ID0# FREQ. SEL

X

LOW

X

Compal Electronics, Inc.

Title

SCHEM AT IC , M/ B LA- 1761

Size Doc ument Number Re v

401248

Custom

星期四三月

Date: Sheet

27, 2003

I

X

LOW

24.576MHZ

14.318MHZ 48MHZ

20 47,

of

J

2A

1 1

BEEP#<29>

+3VALW

2 3

2 2

3 3

4 4

INT_CD_L<19>

INT_CD_R<19>

DLINE_IN_L<33>

DLINE_IN _R<33>

Close to pin2

CLK_CODEC_14M

5 5

6 6

7 7

+3VALW +3VALW

12

R219

1

147

74LVC125

12

R273 @10_0402_5%

12

C428 @10P_0402_50V8K

CD_AGND<19>

100K_0402

U19A

1 2

R469 6.8K_0402 R476 6.8K_0402

R467 6.8K_0402 R475 6.8K_0402

R465 SPR@6.8K_0402 R473 6.8K_0402

R464 SPR@6.8K_0402 R472 6.8K_0402

MD_SPK<31,34>

MD_MON<34>

R217

10K_0402

12

12 12

DLINEINL_R

12 12

DLINEINR_R

12 12

R477 20K_0402

R478 33K_0402

R466 10K_0402

R474 1K_0402

R462 6.8K_0402

R468 6.8K_0402

C351 .22UF_0603

CDL

CDR

CLK_CODEC_14M<14>

IAC_SDATAO<17,31,34>

IAC_SDATA_IN0<17>

12

147

1 2

PCM_SPK#<22>

ICH_SPKR<17>

IAC_RST#<17,31,34>

IAC_BITCLK<17,31,34>

IAC_SYNC<17,31,34>

MONO_IN

CDL CDR

MICIN<21>

MD_MONR

DLINEINL_R

DLINEINR_R

CD_AGNDR

C392

1 2

.1UF_0402

74LVC14 U21A

C645

1 2

1UF_0603

C646

1 2

1UF_0603

C647

1 2

1UF_0603

CLK_CODEC_14M

C701

@22PF_0402

12

C689 15PF_0402

1 2

C679 .1UF_0402

1 2

C678 1UF_10V

1 2

C677 1UF_10V

1 2

C676 1UF_10V

1 2

C675 1UF_10V

1 2

C674 1UF_10V

1 2

C670 .1UF_0402

8 8

A

B

C

A

B

C

D

E

F

G

H

I

J

Layout note:

1 1

8

18

13

VDD4

VDD3

R_UP/DOWN#

L_UP/DOWN#

GND420GND311GND210GND1

L63

1 2

BLM21A05_0805

U52

ROUT+

ROUT-

LOUT+

LOUT-

GAINSEL

SVR

TDA8552TS

VDDA

W=40mils

C662

1000PF_0402

SPK_R+ SPKF_R+

12

19

SPK_L+

2

9

6

7

14 16

C651

.1UF_0402

+

C661

C655

.1UF_0402

100UF_10V_D2

1 2

R461 1K_0402

30dB/20dB#

C650

2.2UF_16V_0805

+

C648 10UF_16V_1206

1 2

R455 100K_0402

13

D

2

G

S

Q64 2N7002

HPS

EC_MUTEO

G

2

13

D

S

Q61 2N7002

D

S

SPKF_L+

13

Q62

G

2N7002

2

+5V_AMP

2

1 3

D

1 3

Q63 2N7002

D

1 3

1 2

R448 100K_0402

2

G

S

Q59 2N7002

S

Q60 2N7002

G

2

+5VALW

135

24

U53 74AHCT1G125GW

INTSPK_R+

INTSPK_R-

INTSPK_L+

INTSPK_L-

+12VALW

DIS_ADJVOL <29>

ADJVOL_UP/DW# <30>

INTSPK_R+ INTSPK_R-

INTSPK_L+ INTSPK_L-

12

C59

C58

GNDB GNDC GNDB GNDC

@220PF_0402

S

G

+5V_AMP

2 2

RIGHT<20>

LEFT<20>

RIGHT

R451 0_0603

LEFT

R452 0_0603

1 2

@100K_0603

LEFT_R

R450

RIGHT_R

17

15

12

R449 @100K_0603

VDD13VDD2

RLINEIN

LLINEIN

3 3

HPS

EC_MUTEO

EC_MUTEO<30>

1 2

R463 100K_0402

4 4

12

R460 100K_0402

4

HPS

5

MODE

1

Trace width=15 mils.

1.SPK_R+,SPK_L+,SPKF_R+,SPKF_L+

2.INTSPK_R+/-,INTSPK_L+/-

3.LINEOUT_L,LINEOUT_R

15 mils trace

12 C34

@220PF_0402

12

C33

12 TVS4

SFI0603240E2R0MP

12

TVS3

12

TVS2

TVS1

SFI0603240E2R0MP

JP6

1

2

R-SPK CONN.

JP2

1

2

L-SPK CONN

HEADPHONE OUT

7

LINE_OUT_PLUG<33>

5 5

VDDA

DOCK_OUT_PLUG<33>

1 2

R458 100K_0402

LINE_OUT_PLUG

1 2

R456 100K_0402

+5V_AMP

2 1

C659 .1UF_0402

U51

3 5

7SH32FU

HPS

4

HPS <30>

INTSPK_R+<33> INTSPK_L+<33>

LINE_OUT_PLUG

INTSPK_R+ INTSPK_L+

C666 150UF_63V_D2

+

LINEC_OUT_R

1 2

+

LINEC_OUT_L

1 2

C667 150UF_63V_D2

1 2

L66 BLM11A121S

1 2

L65 BLM11A121S

47PF_0402

LINECL_OUT_R LINECL_OUT_L

C663

12

C672 47PF_0402

JP12

5 4 3

6 2 1

8

LINE OUT

6 6

EXT. MIC

+AUD_VREF

Q66 2N7002

D

MICOFF#

S

G

2

+

C683 @10UF_16V_1206

13

1 2

R481 470K

DOCK_MIC <33>

+12VS

DOCK_MIC

1 2

MIC_IN

MICIN<20>

1 2

C681 1UF

R486 1K_0603

L68 BLM11A121S

DOCK_MICL

1 2

EXT_MICL

1 2

L67 BLM11A121S

INT_MIC<15>

7 7

INTMICOFF#<33>

INT_MIC DOCK_MIC

1 2

R483 SPR@39K

8 8

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

D

E

F

G

H

12

R485 1K_0603

12

C684

47PF_0402

12

C691 47PF_0402

Compal Electronics, Inc.

Title

SCHEM AT IC , M/ B LA- 1761

Size Doc ument Number Re v

401248

Custom

星期四三月

Date: Sheet

27, 2003

I

JP14

5 4 3

6 2 1

EXT. MIC

7

8

2A

of

21 47,

J

A

8 8

7 7

6 6

5 5

4 4

+3V

3 3

+3V

PCM_SUSP#<29>

+3VALW

2 2

B

1 2

R320 22K_0402

1 2

R318 10K_0402

1 2

R312 10K_0402

CLK_PCI_PCM

PCM_RI#

12

D33

RB751V

R110 @10_0402

C213 @15PF_0402

C

VPPD0<23>

VPPD1<23> VCCD0#<23> VCCD1#<23>

AD[0..31]<16,24,25,34>

21

AD[0..3 1 ]

C/BE#0<16,24,25,34> C/BE#1<16,24,25,34> C/BE#2<16,24,25,34> C/BE#3<16,24,25,34>

PCIRST#<5,9,15,16,19,24,25,27,34>

PCI_FRAME#<16,24,25,34>

PCI_IRDY#<16,24,25,34>

PCI_TRDY#<16,24,25,34>

PCI_DEVSEL#<16,24,25,34>

PCI_STOP#<16,24,25,34> PCI_PERR#<16,24,25,34> PCI_SERR#<16,24,34>

PCI_PAR<16,24,25,34>

REQ#2<16> GNT#2<16>

CLK_PCI_PCM<14>

PCM_PME#<30>

AD20

PIRQA#<15,16,25>

PCM_RI#<28>

SIRQ<16,26,27,29>

PLOCK#<16>

PM_CLKRUN#<17,27,29,34>

G_RST#<23,29>

D

4.7UF_10V_0805

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

PCIRST#

CLK_PCI_PCM

1 2

R324 0_0402

1 2

R334 100_0402

PCM_RI#

C540

12

U9

57 56 55 54 53 52 51 49 47 46 45 43 41 40 39 38 26 25 24 23 19 17 16 15 11 10

9 8 7 5 4 3

48 37 27 12

20 28 29 31 32 33 34 35 36

1 2

21 59

70 13 60

61 64 65 67 68 69

66

12

C545 .1UF_0402

74

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

C/BE0# C/BE1# C/BE2# C/BE3#

PCIRST# PCIFRAME# PCIIRDY# PCITRDY# PCIDEVSEL# PCISTOP# PCIPERR# PCISERR# PCIPAR PCIREQ# PCIGNT# PCIPCLK

VI_OUT#/PME# SUSPEND#

IDSEL MF0

MF1 MF2 MF3 MF4 MF5 MF6

G_RST#

E

3V_CB

72

44

VPPD071VPPD1

VCCD0#73VCCD1#

OZ-6912

GND

6

22

42

58

18

VCCP

GND

78

VCCP

GND

94

GND

90

126

VCCCB

GND

114

130

3V_CB

VCCCB

GND

12 C523

.1UF_0402

122

138

VCC

RSVD/D14

84

102

100

F

S1_VCC

12

C524 .1UF_0402

R_OZ

1 2

R332 0_1206

1 2

R331 @0_1206

R_TI/ENE

+3V

63

30

50

14

86

VCC

VCCI

VCCP

CAD31/D10

CAD30/D9 CAD29/D1 CAD28/D8 CAD27/D0

CAD26/A0 CAD25/A1 CAD24/A2 CAD23/A3 CAD22/A4 CAD21/A5 CAD20/A6

CAD19/A25

CAD18/A7 CAD17/A24 CAD16/A17

CAD15/IOWR#

CAD14/A9

CAD13/IORD#

CAD12/A11

CAD11/OE#

CAD10/CE2#

CAD9/A10

CAD8/D15

CAD7/D7

CAD6/D13

CAD5/D6

CAD4/D12

CAD3/D5

CAD2/D11

CAD1/D4 CAD0/D3

CCBE3#/REG#

CCBE2#/A12

CCBE1#/A8

CCBE0#/CE1#

CRST#/RESET CFRAME#/A23

CIRDY#/A15

CTRDY#/A22

CDEVSEL#/A21

CSTOP#/A20 CPERR#/A14

CSERR#/WAIT#

CPAR/A13

CREQ#/INPACK#

CGNT#/WE#

CCCLK/A16

CSTSCHNG/BVD1

CCLKRUN#/WP

CBLOCK#/A19

CINT#/READY

SPKROUT

CAUDIO#/BVD2

CCD2#/CD2# CCD1#/CD1#

CVS2/VS2# CVS1/VS1#

RSVD/A18

RSVD/D2

143

C530

1 2

.1UF_0402

144 142 141 140 139 129 128 127 124 121 120 118 116 115 113 98 96 97 93 95 92 91 89 87 85 82 83 80 81 77 79 76

125 112 99 88

119 111 110 109 107 105 104 133 101 123 106 108

135 136

103 132 62

134 137

75 117 131

+3VS

+3V

S1_D10 S1_D9 S1_D1 S1_D8 S1_D0 S1_A0 S1_A1 S1_A2 S1_A3 S1_A4 S1_A5 S1_A6 S1_A25 S1_A7 S1_A24 S1_A17 S1_IOWR# S1_A9 S1_IORD# S1_A11 S1_OE# S1_CE2# S1_A10 S1_D15 S1_D7 S1_D13 S1_D6 S1_D12 S1_D5 S1_D11 S1_D4 S1_D3

S1_REG# S1_A12 S1_A8 S1_CE1#

S1_RST S1_A23 S1_A15 S1_A22 S1_A21 S1_A20 S1_A14 S1_WAIT# S1_A13 S1_INPACK# S1_WE#

1 2

R310 33_0402

S1_BVD1 S1_WP

S1_A19 S1_RDY# PCM_SPK#

S1_BVD2 S1_CD2#

S1_CD1# S1_VS2 S1_VS1

S1_D2 S1_A18 S1_D14

G

3V_CB

3V_CB C522 .1UF_0402

12

C525 .1UF_0402

H

12

C539 .1UF_0402

Stuff R_OZ for OZ6912. Stuff R_TI/ENE for TI/ENE CB1410.

S1_A[0..25]

S1_D[0..15]

S1_A23

1 2

S1_IOWR# <23> S1_IORD# <23> S1_OE# <23>

S1_CE2# <23>

S1_REG# <23>

S1_CE1# <23> S1_RST <23>

S1_WAIT# <23> S1_INPACK# <23>

S1_WE# <23>

S1_BVD1 <23> S1_WP <23>

S1_RDY# <23> PCM_SPK# <20>

S1_BVD2 <23> S1_CD2# <23>

S1_CD1# <23> S1_VS2 <23> S1_VS1 <23>

S1_A16

R317 22K_0402

S1_WP

1 2

R333 @22K_0402

S1_OE#

R43 @47K_0402

Stuff this resistor for ENE CB1410 only.

12

C533 .1UF_0402

12

I

12

C541 .1UF_0402

S1_A[0..25] <23>

S1_D[0..15] <23>

S1_VCC

12

C546 .1UF_0402

J

12

C544 .1UF_0402

1 1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

D

E

F

G

H

Compal Electronics, Inc.

Title

SCH EMATIC, M/B LA-1761

Size Doc ument Number Re v

401248

Custom

星期四三月

Date: Sheet

27, 2003

I

of

22 47,

J

2A

A

B

C

D

E

F

G

H

I

J

1 1

+12VALW

C102

2 2

.1UF_0402

C57 .1UF_0402

3 3

C87 .1UF_0402

4 4

5 5

6 6

PCMCIA Power Controller

U1

9

12V

+5VALW

5

5V

6

5V

+3VALW

3

3.3V

4

3.3V GND

7

+3VALW +5VALW S1_VPP

12

C86 10UF_10V_1206

VCCD0 VCCD1 VPPD0 VPPD1

SHDN

TPS2211A

16

VCC VCC VCC

VPP

13 12 11

10

1 2 15 14

8

OC

12

S1_VCC

G_RST#

C54 10UF_10V_1206

12

C127

4.7UF_10V_0805 S1_VPP

12

C121 .1UF_0402

VCCD0# <22> VCCD1# <22> VPPD0 <22> VPPD1 <22>

G_RST# <22,29>

S1_VCC

C535 .01UF_0402

L54

1 2

FBM-11-160808-800LMT

+

C532

4.7UF_10V_0805

S1_VCCL

12

C536

.1UF_0402

S1_CE1#<22>

S1_RDY#<22>

12

C538 10UF_10V_1206

JP24A1

CARDBUS HOUSING

CardBus Socket

S1_A[0..25]<22> S1_ D [0 ..1 5 ]<22>

S1_D3 S1_D4 S1_D5 S1_D6 S1_D7 S1_CE1# S1_A10

S1_OE#<22>

S1_WE#<22>

S1_VPP S1_VPP

S1_WP<22>

S1_OE# S1_A11 S1_A9 S1_A8 S1_A13 S1_A14 S1_WE# S1_RDY#

S1_A16 S1_A15 S1_A12 S1_A7 S1_A6 S1_A5 S1_A4 S1_A3 S1_A2 S1_A1 S1_A0 S1_D0 S1_D1 S1_D2 S1_WP

S1_A[0..25] S1_D[0..15]

JP24

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

55

57

59

61

63

65

67

69

GND

71

GND

73

GND

75

GND

77

GND

79

GND

81

GND

83

GND

FOXCONN_1CA415M1-TA_68P

GND GND GND GND GND GND GND GND

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

56

58

60

62

64

66

68

70 72 74 76 78 80 82 84

S1_CD1# S1_D11 S1_D12 S1_D13 S1_D14 S1_D15 S1_CE2# S1_VS1 S1_IORD# S1_IOWR# S1_A17 S1_A18 S1_A19 S1_A20 S1_A21 S1_VCCL

S1_A22 S1_A23 S1_A24 S1_A25 S1_VS2 S1_RST S1_WAIT# S1_INPACK# S1_REG# S1_BVD2 S1_BVD1 S1_D8 S1_D9 S1_D10 S1_CD2#

C219

1 2

1000PF_0402

12

C88 1000PF_0402

S1_CD1# <22>

S1_CE2# <22> S1_VS1 <22> S1_IORD# <22> S1_IOWR# <22>

S1_VS2 <22> S1_RST <22> S1_WAIT# <22> S1_INPACK# <22> S1_REG# <22> S1_BVD2 <22> S1_BVD1 <22>

S1_CD2# <22>

7 7

Compal Electronics, Inc.

8 8

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

D

E

F

G

Title

SCHEMATIC, M/B LA-1761

Size Do cum e nt Number R e v

401248

Custom Dat e : Sheet

H

期四三月

I

23 47¬P , 27, 2003

2A

of

J

5

4

3

2

1

+3VALW

+2.5VLAN

12

D D

C C

B B

CLK_PCI_LAN

AD[0..31]<16,22,25,34>

C/BE#0<16,22,25,34> C/BE#1<16,22,25,34> C/BE#2<16,22,25,34> C/BE#3<16,22,25,34>

AD17 L AN_IDSEL

1 2

R93 100

PCI_PAR<16,22,25,34>

PCI_FRAME#<16,22,25,34>

PCI_IRDY#<16,22,25,34>

PCI_TRDY#<16,22,25,34>

PCI_DEVSEL#<16,22,25,34>

PCI_STOP#<16,22,25,34>

PCI_PERR#<16,22,25,34> PCI_SERR#<16,22,34>

REQ#3<16>

GNT#3<16>

PIRQB#<16>

LAN_PME#<30>

PCIRST#<5,9,15,16,19,22,25,27,34>

CLK_PCI_LAN<14>

+3VLAN

12

R68 @22

12

C147 @10PF

AD[0..31]

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

C/BE#0 C/BE#1 C/BE#2 C/BE#3

CLK_PCI_LAN

45 44 42 41 38 37 36 33 30 29 28 27 26 25 24 23 10

9 8 5 4 3 1

100

95 94 93 92 91 89 87 86

32 21 11 98

99 20

12 13 14 15 17

18 19

85 84

81 57 82 83

6 22 34 39 90 97

U6

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

PCI I/F

C/BE#0 C/BE#1 C/BE#2 C/BE#3

IDSEL PAR

FRAME# IRDY# TRDY# DEVSEL# STOP#

PERR# SERR#

REQ# GNT#

INTA# PME# RST# CLK VDD

VDD VDD

Power

VDD VDD VDD

RTL8100BL

51

VDD25

96

VDD25

58

AVDD25

59

AVDD

70

AVDD

75

AVDD

Power

49

EECS

48

EESK

47

EEDI

46

EEDO

50

AUX

80

LED0

79

LED1

77

LED2

72

TXD+

71

TXD-

68

RXIN+

67

RXIN-

LAN I/F

61

X1

60

X2

64

LWAKE

74

ISOLATE#

65

RTSET

63

RTT3

55

VCTRL

7

NC

35

NC

40

NC

52

NC

53

NC

54

NC

69

NC

76

NC

78

NC

2

GND

16

GND

31

GND

43

GND

56

GND

62

GND

66

GND

73

GND

88

GND

+2.5V_LAN_VDD +3V_LAN_VDD +3V_LAN_VDD +3V_LAN_VDD

LAN_EECS LAN_EECLK LAN_EEDI LAN_EEDO

R49 5.6K ACTIVITY# LINK10_100#

LAN_TD+ LAN_TD-

LAN_RD+ LAN_RD-

LAN_X1

LAN_X2

R34 1K

R36 15K

R303 5.6K_1%_0603

VCTRL

12

1 2

1 2 1 2 1 2

Layou t R e co m m end :

1. LAN_RD+, LAN_RD- should be equal length as possible

C114 .1UF_X5R

T=20mil

C502 .1UF_X5R

+3VLAN

12

C161 .1UF_X5R

12

C187 .1UF_X5R

12

C503 .1UF_X5R

1 2 3 4

+3VLAN

+3VS

12

T=20mil

U4

CS SK DI DO

C183 .1UF_X5R

T=20mil

8 7 6 5

Y1

25 MHz

12

+3VLAN

12

C196 .1UF_X5R

12

C111 .1UF_X5R

VCC

NC NC

GND

9346

LAN_X1 LAN_X2

12

C91 27PF_NPO

12

C197 .1UF_X5R

L52 4.7UH L24 4.7UH

C110 .1UF_X5R

12

C77 .1UF_X5R

12

C89 27PF_NPO

12

C192 .1UF_X5R

12 12

49.9_1%_0402

12

C174 .1UF_X5R

EN_WOLL#<29>

+2.5VLAN +3VLAN

12

R31

49.9_1%_0402

Place as close to U24(Magnetic)

C481

1UF_0603

R30

12

ACTIVITY#<33> +3VLAN

RJ45_RX-<33>

RJ45_RX+<33>

RJ45_TX-<33> RJ45_TX+<33> LINK10_100#<33>

+3VLAN

12

C101 .1UF_X5R

EN_WOLL#

Place as close to U22(LAN Chip)

R18 300_0603

R6 300_0603

Q42 SI2301DS

S

D

13

G

2

12

R306

49.9_1%_0402

12

ACTIVITY#

1 2

RJ45_RX-

RJ45_RX+ RJ45_TXRJ45_TX+ LINK10_100#

1 2

RJ45_GND

VCTRL

10UF_10V_1206

12

C496 .1UF_X5R

+3VLAN

12

C480

C492

Q44 2SA1036K

12

C488 .1UF_X5R

1 2

1UF_0603

+2.5VLAN

2.5VLAN power generated by VCTRL.

U2

LAN_RD+ LAN_RD-

LAN_TD+ LAN_TD-

R305

49.9_1%_0402

T=10mil

R16

75

1 2

12

C79 .1UF_X5R

1

RD+

2

RD-

3

CT

4

NC

5

NC

6

CT TD+7TX+

8

TD-

Pulse H0013

12 11

8 7 6 5 4 3 2 1

10

9

R15 75

1 2

C31

1 2

1000PF_2KV_1206

RX+

RX-

TX-

JP21

Amber LEDAmber LED+ PR4PR4+ PR2PR3PR3+ PR2+ PR1PR1+ Green LEDGreen LED+

AMP RJ45 with LED

Note : Imax for VDD25 = 40mA

2.5V should be ready before +3V is ready

16 15 14

CT

13

NC

12

NC

11

CT

10 9

R23

75_1%_0402

SHLD4 SHLD3

SHLD2 SHLD1

RJ45_RX+ RJ45_RX-

RJ45_TX+ RJ45_TX-

12

R22 75_1%_0402

RJ45_GND

16 15

14 13

2. LAN_TD+, LAN_TD- should be equal length as possible

3. The Maximum trace length between LAN chip(U22) and

A A

Magnetic(U24) is 12cm(4.7")

4. The distance between RJ45(Conn.) and Magnetic(U24) should be as sh ort as po ssible

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1761

Size Do cum e nt Number R e v

B

401248

Dat e : Sheet

期四三月

1

of

24 47¬P , 27, 2003

2A

A

B

C

D

E

IEEE1394 Controller/PHY

1 1

+3VS +3VS +3VS +3VS

12

C393

.1UF_0402

R226

C390

12

C350

.1UF_0402

12

R235

54.9_1%_0603

12

C395

.1UF_0402

12

R231

54.9_1%_0603

12

R222

54.9_1%_0603

12

R220

4.99K_1%_0603

12

.1UF_0402

U25

1

A0

2

A1

3

A2 GND4SDA

24C02-27

12

C400

.1UF_0402

VCC WC#

SCL

12

C404 .33UF_10V_0603

L33 0_0603 L32 0_0603 L31 0_0603 L30 0_0603

C629

+3VS

8 7

EECK_LAN

6

EEDI_LAN

5

1 2 1 2 1 2 1 2

12

C405

.1UF_0402

12

R241 510

12

AD[0..31]<16,22,24,34>

2 2

C/BE#0<16,22,24,34> C/BE#1<16,22,24,34> C/BE#2<16,22,24,34>

C/BE#3<16,22,24,34>

PCI_FRAME#<16,22,24,34>

PCI_IRDY#<16,22,24,34>

PCI_TRDY#<16,22,24,34>

PCI_DEVSEL#<16,22,24,34>

PCI_STOP#<16,22,24,34>

PCI_PERR#<16,22,24,34>

PCI_PAR<16,22,24,34>

REQ#0<16>

3 3

4 4

GNT#0<16>

PIRQA#<15,16,22>

PCIRST#<5,9,15,16,19,22,24,27,34>

CLK_PCI_1394<14>

AD[0..3 1 ]

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

AD16

1 2

R216 100_0402

CLK_PCI_1394

12

R221 @33_0402

C388 @22PF_0402

110

122

U23

25

AD0

24

AD1

20

AD2

19

AD3

18

AD4

16

AD5

15

AD6

14

AD7

11

AD8

10

AD9

9

AD10

8

AD11

7

AD12

4

AD13

3

AD14

2

AD15

117

AD16

116

AD17

115

AD18

114

AD19

113

AD20

109

AD21

107

AD22

106

AD23

103

AD24

102

AD25

101

AD26

98

AD27

97

AD28

96

AD29

95

AD30

94

AD31

12

CBE0#

1

CBE1#

119

CBE2#

104

CBE3#

105

IDSEL

120

FRAME#

121

IRDY#

123

TRDY#

124

DEVSEL#

125

STOP#

127

PERR#

128

PAR

93

REQ#

92

GNT#

88

INTA#

89

PCIRST#

90

PCICLK

32

VDD199VDD2

VDD3

VDD45VDD517VDD6

VDDC221VDDC1

IEEE 1394

VSS5

VSS66VSS713VSS823VSS933VSSC1

VSSC2

22

126

112

46

111

30

RAMVDD

PVDD136PVDD2

38

PGND247PGND1

VT6307S

VSS191VSS2

VSS3

VSS4

RAMVSS

64

31

100

108

118

R240

4.7K_0402

+3VS

59

NC1244NC1345NC1448NC1549NC1650NC1751NC1852NC1953NC2054NC21

43

VDDATX0

NC835NC937NC1041NC1142I2CEEENA

C408

10PF_0402

56

GNDATX0

XI

57

24.576MHz_30ppm R496

@1M_0402

66

73

+3VS

VDDATX1

GNDATX1

87

VDDATX2

80

GNDATX2

62

VDDARX0

61

GNDARX0

72

VDDARX1

65

GNDARX1

86

VDDARX2

79

GNDARX2

26

EECS

27

EEDO

SDA/EEDI

SCL/EECK

PME#

NC1 NC2

XCPS

XREXT

XTPB0M XTPB0P XTPA0M XTPA0P

XTPBIAS0

XTPB1M XTPB1P XTPA1M XTPA1P

XTPBIAS1

NC3 NC4 NC5 NC6 NC7

PHYRESET

XO

58

VT6307S

X1

C409 10PF_0402

EEDI_LAN

28

EECK_LAN

29 34

39 40

60 63

XTPB0-

67

XTPB0+

68

XTPA0-

69

XTPA0+

70

XTPBIAS0

71 74

75 76 77 78

81 82 83 84 85 55

C633

.1UF_0402

R237

6.34K_1%

C406 47PF_0402

+3VS

C402

.1UF_0402

R238 1K_0402

R239 1K_0402

CLOSE TO CHIP

XTPBIAS0 XTPA0+ XTPA0XTPB0+ XTPB0-

54.9_1%_0603

270PF_0402

12

C630

.1UF_0402

XTPA0+_L XTPA0-_L XTPB0+_L XTPB0-_L

+3VS

12

C631

.1UF_0402

JP33

4 3 2 1

1394_CONN 4PIN

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Title

Size Doc ument Number Re v

Date: Sheet

Compal E l e c t r onics, Inc.

SCHEM AT IC , M/ B LA- 1761

401248

星期四三月

27, 2003

2A

of

25 47,

E

5

+3VS

12

CLK_PCI_SD

R141 @10_0402

1 2

C239 @15PF_0402

C554 SD@10UF_10V_0805

D D

C C

1 2

SD@.1UF_0402

R351 @10_0402

1 2

C551 @10PF_0402

CLK_SD48

R114 @10_0402

C214 @10PF_0402

C553

4

WR_PT SDLED SDPWCTL#

R349

SD_CLKSD_CLK

1 2

SD@10_0402

LAD[0..3]<17,27,29>

LAD[0 ..3 ]

SIRQ<16,22,27,29>

CLK_PCI_SD<14>

LFRAME#<17,27,29>

LPC_RST#<27,29>

+3VS

SD1 SD2

SD3 SD4 SD5 LAD3 LAD2 LAD1 LAD0

CLK_PCI_SD

3

R354 SD@1K_0402

1 2

37

SDCLK

38

SD1

39

SD2

40

VDD3V

41

SD3

42

SD4

43

SD5

44

LAD3

45

LAD2

46

LAD1

47

LAD0

48

SERIRQ

35

34

33

30

31

29

32

36

SCC4

SCC8

SDLED

MSLED

SDPWCTL#

25

28

VSS

MS326MS227MS1

MSCLK

MSPWCTL#

W83L518D (LPC)

SCBCLK11SCBIO10SCBRST#

VSS6SCBC88SCBC4

PME#5lESET#

LFRAME#3RESERVED

PCICLK

2

1

9

7

4

12

MSLED

MSPWCTL#

MSCLK

MS1 MS2 MS3 MS4

U11

MS4

XOUT

SCRST#

SCIO

SCCLK

SCPSNT

SCPWCTL#

SCLED

SCBLED

SCBPWCTL#

SCBPSNT

SD@W 83L518D (LPC)

MS5

VDD

2

MS5

24

CLK_SD48

23

XIN

22 21 20 19 18 17 16 15 14

MMC_DET#

13

@.1UF_0402

CLK_SD48 <14>

12

C221

+5VS

12

C216 @10UF_10V_0805

1

12

R128 SD@10K_0402

MMC_DET#10Wr_Pt_Vss

8

SD4

7

SD3

6

Vss2

5

SDCLK

4

Vdd

3

Vss1

2

SD2

1

SD1

9

SD5

R355 SD@1M

U57

MLED@7SH08FU

SD@SD_SOCKET

4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

JP7

Vss3 Vss4

Wr_Pt

MEDIA_LED# <15>

3

MMC_DET# SD4

SD3 SD_CLK

SD2 SD1

SD5

RP4

1 8

2 7

3 6

4 5

+5VS

5

1 2

3

SD@8P4R_4.7K_0804

+3VS

12

R102

SDPWCTL#

5

SD@10K_0402

2

G

13

D

Q6 SD@2N7002

S

MSLED SDLED

R109

MLED@100K_0402

B B

A A

U7

3

VIN

4

VIN/CE

2

GND

SD@RT9701-CB

12

R108

MLED@100K_0402

VOUT VOUT

12

+5VS

2 1

SD_3VCC+3VS

1 5

U34

3 5

MLED@7SH32FU

12

C195 SD@4.7UF_10V_0805

2

4

G

ACT_LED#<19>

4

+5VS

12

R337 MLED@10K_0402

13

D

Q48 MLED@2N7002

S

12

R353 SD@4.7K_0402

11

12 13 14

WR_PT

MS@10K_0402

MSPWCTL#

2

R330

G

+3VS

12

13

D

S

Q47 MS@2N7002

U33

3

VIN

4

VIN/CE

2

GND

MS@RT9701-CB

MS@4.7UF_10V_0805

2

VOUT VOUT

+3VS

12

R329

MS_3VCC+3VS

1 5

12

C543

Title

Size Doc ument Number Re v Custom

Date: Sheet

MS@4.7K_0402

MS1 MS2

MS3 MS4 MS5 MSCLK

12

R325

MS@200K_0402

C204

MS@.1UF_0402

Compal Electronics, Inc.

SCHEM AT IC , M/ B LA-1761

401248

星期四三月

27, 2003

10 11

12 13 14

MS@HRS_CB1EBB

1

JP23

1

GND

2

BS

3

VCC

4

SDIO

5

RSVD

6

INS

7

RSVD

8

SCLK

9

VCC GND

GND GND GND GND

26 47,

2A

of

A

B

C

D

E

F

G

H

I

J

1 1

SUPER I/O S MsC FDC47N227

@8P4R_4.7K

8P4R_4.7K

+5VS

5 4 3 2 1

+3VS

RDATA#

STEP# MTR0# DRV0#

+5VS

LAD[0..3]<17,26,29>

2 2

LFRAME#<17,26,29>

LDRQ#1<17>

SUS_STAT#<15,17> +3VS

SIRQ<16,22,26,29>

PM_CLKRUN#<17,22,29,34>

CLK_PCI_SIO<14>

3 3

+3VS

RP3 1 8 2 7 3 6

4 4

4 5

8P4R-100K 1 2

R368 100K_0402

PID0 PID1 PID2 PID3

PID4

+3VS

PID0<15> PID1<15> PID2<15> PID3<15> PID4<15>

R113 10K R115 10K

LAD0 LAD1 LAD2 LAD3

LPC_RST#

1 2

R123 10K

CLK_PCI_SIO CLK_14M_SIO PID0

PID1 PID2 PID3 PID4

1 2 1 2

1 2

R388 10K

5 5

C568

4.7UF_10V_0805

12 C565

.1UF_0402

12 C559

.1UF_0402

12 C558

.1UF_0402

U16

20

LAD0

21

LAD1

22

LAD2

23

LAD3

24

LFRAME#

25

LDRQ#

26

PCIRST#

27

LPCPD#

50

GPIO12/IO_SMI#

17

IO_PME#

30

SIRQ

28

CLKRUN#

29

PCICLK

19

CLK14

48

GPIO10

54

GPIO15

55

GPIO16

56

GPIO17

57

GPIO20

58

GPIO21

59

GPIO22

6

GPIO24

32

GPIO30

33

GPIO31

34

GPIO32

35

GPIO33

36

GPIO34

37

GPIO35

38

GPIO36

39

GPIO37

40

GPIO40

41

GPIO41

42

GPIO42

43

GPIO43

44

GPIO44

45

GPIO45

46

GPIO46

47

GPIO47

51

GPIO13/IRQIN1

52

GPIO14/IRQIN2

64

GPIO23/FDC_PP

18

VTR

53

VCC

65

VCC

93

VCC

7

VSS

31

VSS

60

VSS

76

VSS

SMsC LPC47N227

PD0/INDEX#

PD1/TRK0

PD2/WRTPRT#

PD3/RDATA#

PD4/DSKCHG#

PD6/MTR0#

BUSY/MTR1#

PE/WDATA#

SLCT/WGATE#

ERROR#/HDSEL#

ACK#/DS1#

INIT#/DIR#

AUTOFD#/DRVDEN0#

STROBE#/DS0# SLCTIN#/STEP#

DTR2# CTS2# RTS2#

DSR2#

TXD2

RXD2

DCD2#

DTR1# CTS1# RTS1#

DSR1#

TXD1

RXD1

DCD1#

IRMODE/IRRX3

IRRX2 IRTX2

RDATA#

WDATA#

WGATE#

HDSEL#

DIR#

STEP#

DS0#

INDEX#

DSKCHG#

WRTPRT#

TRK0#

MTR0#

DRVDEN0 DRVDEN1

GPIO11/SYSOPT

PD5 PD7

RI2#

RI1#

LPD[0 ..7 ]LAD[0 ..3 ] LPD0

68

LPD1

69

LPD2

70

LPD3

71

LPD4

72

LPD5

73

LPD6

74

LPD7

75

LPTBUSY

79

LPTPE

78

LPTSLCT

77

LPTERR#

81

LPTACK#

80

LPTINIT#

66

LPTAFD#

82

LPTSTB#

83

LPTSLCTIN#

67 100

CTS#2

99 98

DSR#2

97 96 95

DCD#2

94

RI#2

92

DTRA#

89

CTSA#

88

RTSA#

87

DSRA#

86

TXDA

85

RXDA

84

DCDA#

91

RIA#

90

IRMODE

63

IRRX

61

IRTXOUT

62

RDATA#

16

WDATA#

10

WGATE#

11

HDSEL#

12

FDDIR#

8

STEP#

9 5

INDEX#

13

DISKCHG#

4

WP#

15

TRACK0#

14

MTR0#

3

3MODE#

1 2

R389 10K

1 2

49

R127 @10K_0402

1 2

R132 10K_0402

Base I/O Address 0 = 02Eh 1 = 04Eh*

1 2

R374 1K

12

LPD[0..7] <28,33>

LPTBUSY <28,33> LPTPE <28,33> LPTSLCT <28,33> LPTERR# <28,33> LPTACK# <28,33> LPTINIT# <28,33> LPTAFD# <28,33> LPTSTB# <28,33> LPTSLCTIN# <28,33>CLK_14M_SIO<14>

DTRA# <28> CTSA# <28> RTSA# <28> DSRA# <28> TXDA <28>

DCDA# <28> RIA# <28>

IRMODE <28> IRRX <28> IRTXOUT <28>

RDATA# <19> WDATA# <19> WGATE# <19> HDSEL# <19> FDDIR# <19> STEP# <19> DRV0# <15,19> INDEX# <19> DISKCHG# <19> WP# <19> TRACK0# <19> MTR0# <19> 3MODE# <19>

+5VS +3VS

12

R370 1K_0402

RXDA <28>

+5VS

DCDA# RIA# CTSA# DSRA#

CTS#2 DSR#2 DCD#2 RI#2

WP# TRACK0# INDEX# DISKCHG#

HDSEL# WGATE# WDATA# FDDIR#

1 8 2 7 3 6 4 5

RP70 6 7 8 9

10

10P8R_1K

RP5

RP6

RP7

8P4R_1K

6 6

CLK_PCI_SIO CLK_14M_SIO

R150 @10_0402

1 2

C260

7 7

@15PF_0402

1 2

8 8

A

B

R158 @10_0402

1 2

C278 @15PF_0402

1 2

C561 .1UF_0402

1 2

PCIRST#<5,9,15,16,19,22,24,25,34>

C

D

LPCRST

+3VS

1 2

R373 10K_0402

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

12

C560 .1UF_0402

U36

1 3

NC7WZ14

VCC5Y1 A1 A2

GND

LPCRST

6

LPC_RST#

4

Y2

2

F

LPC_RST# <26,29>

G

Compal Electronics, Inc.

Title

SCHEM AT IC , M/ B LA- 1761

Size Doc ument Number Re v

401248

Custom

星期四三月

H

Date: Sheet

27, 2003

I

27 47,

2A

of

J

A

B

C

D

E

F

G

H

I

J

Touch P a d & Stat us LED Conn.

1 1

2 2

3 3

4 4

5 5

TP_DATA<29>

TP_CLK<29>

C319

22PF_0402

KSI0 for PLAYBTN KSI1 for FRDBTN KSI2 for REVBTN KSI3 for STOPBTN KSI4 for VOLUME_UP KSI5 for VOLUME_DOWN

DJ_ON BTN.

D_ON/OFF#

12

22PF_0402

D20

3

DAN202U

C318

12

1 2

KSO17<29>

KSI0<15,29,32> KSI1<15,29,32> KSI2<15,29,32> KSI3<15,29,32> KSI4<15,29,32> KSI5<29,32>

PMLED_0#<30> PMLED_1#<30>

BATLED_0#<30>

1 2

R187 100K_0402

+5VS

D_ON/OFF# DJ_ON_LED

+5VALW

+3VALW

DJ_ON/OFF# <30> EC_PWR_ON# <32,37>

10 11 12 13 14 15 16 17 18 19 20

1 2 3 4 5 6 7 8 9

JP9

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

ACES_20P

+5VS

12

+5VALW

31

E

47K

C317 .1UF_0402

B

10K

C

DJ_ON_LED

Q19 DTA114YKA

2

DJ_ON_LED# <30>

+5V_PRN

FD3

1

FD2

2

FD1

3

FD0

4 5

SLCTIN#

1

PRNINIT#

2

ERR#

3

AFD/3M#

4 5

FIR@10UF_10V_1206

RP63

10P8R_2.7K

RP64

10P8R_2.7K

C709

+5V_PRN

10 9 8 7 6

+5V_PRN

10 9 8 7 6

+3VS

12

+

C710 FIR@.1UF_0402

LPD[0..7]<27,33>

FD7 FD6 FD5 FD4

SLCT

PE

BUSY

ACK#

FIR Module

T = 40mil

LPD[0 ..7 ]

AFD/3M# ERR# PRNINIT# SLCTIN#

ACK# BUSY PE SLCT

FD0 FD1 FD2 FD3

FD4 FD5 FD6 FD7

12

C708

+

FIR@22UF_10V_1206

U56

2

LED_C

4

RXD

6

VCC

8

GND

FIR@TFDU6101E

CP9 1 8 2 7 3 6 4 5

8P4C_220PF

CP10 1 8 2 7 3 6 4 5

8P4C_220PF

CP8 1 8 2 7 3 6 4 5

8P4C_220PF

CP7 1 8 2 7 3 6 4 5

8P4C_220PF

4.7UF_10V_0805

LED_A

TXD

SD

MODE

+5V_PRN

12

LPTSTB#<27,33>

LPTAFD#<27,33>

LPTERR#<27,33>

LPTINIT#<27,33>

LPTSLCTIN#<27,33>

LPTACK#<27,33>

LPTBUSY<27,33>

LPTSLCT<27,33>

T = 40mil

T = 12mil T = 12mil T = 12mil

12

C22

+5VS

.1UF_0402

LPTSTB#

1 2

R281 33_0402

1 2

LPD0

L3 68

1 2

L4 68

1 2

LPD1

L5 68

1 2

L6 68

1 2

LPD2

L7 68

1 2

L8 68

1 2

LPD3

L9 68

1 2

L10 68

LPD4

1 2

L11 68

LPD5

1 2

L12 68

LPD6

1 2

L13 68

LPD7

1 2

L2 68

1 2

L14 68

1 2

L15 68

LPTPE<27,33>

12

R491 FIR@10_1206

IRTXOUT IRMODE IRRX

L16 68 L17 68

+

+5VS_IR

IRTXOUT <27> IRMODE <27> IRRX <27>

1 2 1 2

C704 FIR@10UF_10V_1206

C23

+5VS

12

R492 FIR@10_1206

1 3 5 7

Parallel Port

w=10mils

2 1

D28 1SS355

AFD/3M# FD0 ERR# FD1 PRNINIT# FD2 SLCTIN# FD3

FD4 FD5 FD6 FD7 ACK# BUSY PE SLCT

C707 FIR@.1UF_0402

+5V_PRN

12

R282

2.7K_0402 PWRPRN

w=10mils

14 15 16 17 18 19 20 21 22

10 23 11 24 12 25 13

1 2

C435 47PF_0402 1 2 3 4 5 6 7 8 9

JP16

LPTCN-25-SUYIN

+5V

Serial Port

TP10

26

VCC

COM@MAX3243

G

1

TOUT1 TOUT2 TOUT3

INVLD#

RIN1 RIN2 RIN3 RIN4 RIN5

GND

U28

27

1 2

V+

C475 COM@.1UF_0402

1 2

3

V-

C453 COM@.1UF_0402

9 10 11 4 5 6 7 8

21 25

DTR1# RTS1# TXD1 CTS1# RI1# RXD1 DCD1# DSR1#

TP9

1

H

DTR1# <33> RTS1# <33> TXD1 <33> CTS1# <33> RI1# <33> RXD1 <33> DCD1# <33> DSR1# <33>

Compal Electronics, Inc.

Title

SCHEM AT IC , M/ B LA- 1761

Size Doc ument Number Re v

401248

Custom

星期四三月

Date: Sheet

27, 2003

I

of

28 47,

J

2A

12

6 6

TP8

+3V

12

R298 100K_0402

7 7

PCM_RI#<22>

MD_RI#<34>

RING#<29>

8 8

A

B

21

D31 RB751V

21

D32 RB751V

Q38

2N7002

13

D

S

C

RIA0

2

G

12

R297 100K_0402

D

1

TP7

1

TP4

1

TP6

1

TP5

1

TP3

1

TP1

1

TP2

1

DTRA#<27> RTSA#<27>

TXDA<27>

CTSA#<27>

RXDA<27>

DCDA#<27>

DSRA#<27>

SUSP#<29,35,36,40,41>

DTRA# RTSA# TXDA CTSA# RIA#

RIA#<27>

RXDA DCDA# DSRA# RIA0

SUSP#

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

1 2

C476 COM@.1UF_0402

1 2

C454 COM@.1UF_0402

F

C474

COM@.1UF_0402

28

C1+

24

C1-

1

C2+

2

C2-

14

TIN1

13

TIN2

12

TIN3

19

ROUT1

18

ROUT2

17

ROUT3

16

ROUT4

15

ROUT5

20

ROUTB2

23

FORCEON

22

FORCEOFF#

A

B

C

D

E

123

136

157

VCC4

PORTB

PORTD-1

166

VCC5

PORTE

VCC6

EC_AVCC

95

AVCC

AD Input

DA output

PWM or PORTA

IOPB7/RING/PFAIL/LRESET2

PORTC

IOPC4/TB1/EXWINT22 IOPC6/TB2/EXWINT23

IOPC7/CLKOUT

IOPD0/RI1/EXWINT20 IOPD1/RI2/EXWINT21

IOPD2/EXWINT24/LRESET2

IOPE5/EXWINT40

IOPE6/LPCPD/EXWIN45

IOPE7/CLKRUN/EXWINT46

IOPH0/A0/ENV0

IOPH1/A1/ENV1 IOPH2/A2/BADDR0 IOPH3/A3/BADDR1

PORTH

IOPH5/A5/SHBM

PORTI

PORTJ-1

PORTD-2

PORTK

IOPK5/A13/BE0 IOPK6/A14/BE1

IOPK7/A15/CBRD

PORTL

161

VBAT

AD0 AD1 AD2 AD3

IOPE0AD4 IOPE1/AD5 IOPE2/AD6 IOPE3/AD7

DP/AD8 DN/AD9

DA0 DA1 DA2 DA3

IOPA0/PWM0 IOPA1/PWM1 IOPA2/PWM2 IOPA3/PWM3 IOPA4/PWM4 IOPA5/PWM5 IOPA6/PWM6 IOPA7/PWM7

IOPB0/URXD

IOPB1/UTXD

IOPB2/USCLK

IOPB3/SCL1 IOPB4/SDA1

IOPC0 IOPC1/SCL2 IOPC2/SDA2

IOPC3/TA1 IOPC5/TA2

IOPE4/SWIN

IOPH4/A4/TRIS

IOPH6/A6 IOPH7/A7

IOPI0/D0 IOPI1/D1 IOPI2/D2 IOPI3/D3 IOPI4/D4 IOPI5/D5 IOPI6/D6 IOPI7/D7

IOPJ0/RD

IOPJ1/WR0

SELIO

IOPD4

IOPD5

IOPD6

IOPD7

IOPK0/A8

IOPK1/A9 IOPK2/A10 IOPK3/A11 IOPK4/A12

IOPL0/A16 IOPL1/A17 IOPL2/A18 IOPL3/A19

IOPL4/WR1

+RTCVCC

C398 1UF_0603

1 2

U42

BATT_TEMPA

81 82 83

ADI_PR ADI_P

84 87 88 89 90 93 94

99 100 101 102

32 33 36 37 38 39 40 43

KSO16

153

KSO17

154 162

EC_SMC1

163

EC_SMD1

164

LPC_RST#

165 168

EC_SMC2

169

EC_SMD2

170 171

PME_EC#

172 175

D24 RB751V

176 1

26 29 30

2 44 24 25

KBA0

124

KBA1

125

KBA2

126

KBA3

127

KBA4

128

KBA5

131

KBA6

132

KBA7

133

ADB0

138

ADB1

139

ADB2

140

ADB3

141

ADB4

144

ADB5

145

ADB6

146

ADB7

147

FRD#

150

FWR#

151

SELIO#

152 41

42 54 55

KBA8

143

KBA9

142

KBA10

135

KBA11

134

KBA12

130

KBA13

129

KBA14

121

KBA15

120

KBA16

113

KBA17

112

KBA18

104 103 48

21

BATT_TEMPA <38>

ALI/NIMH# <38> M_SEN# <15,30,33>

BATT_OVP <39> THERMDA_591 <5> THERMDC_591 <5>

DAC_BRIG <15> EN_FAN1 <6> EN_FAN2 <6> IREF <39>

INVT_PWM <15> BEEP# <20> EC_GRST <32> ACOFF <39> VLBA# <17> EC_ON <32> LID_OUT# <17> EN_WOLL# <24>

KSO16 <15> KSO17 <28> MAIL_LED# <15> EC_SMC1 <15,30,38> EC_SMD1 <15,30,38> LPC_RST# <26,27>

PBTN_OUT# <17> EC_SMC2 <5,35> EC_SMD2 <5,35> FAN_SPEED <6> PME_EC# <30>

FAN_SPEED2 <6> WL_ON <31,34>

ACIN <17,37> RING# <28> SLP_S3# <17>

ON/OFF# <32> SLP_S5# <17> SLP_S4# <17> PM_CLKRUN# <17,22,27,34>

FRD# <30> FWR# <30>

SELIO# <30> BT_DETACH <31>

NUMLED# <15> CAPSLED# <15>

FSTCHG <39>

ADI_P

BATT_TEMPA

R207 10K_0402 C315 .22UF_0603

1 2

EEROM/BATTERY

THERMAL/DOCKING

EC_THRM#

ADB[0..7] KBA[0..18]

1 2

C324 @.01UF_0402

1 2

C335 .01UF_0402

12

EC_THRM# <17>

ADB[0..7] <30> KBA[0..18] <30>

ECAGND

ADI_P <39,41>

BADDR1-0

*

Index 0 0 0 1

(HCFGBAH, HCFGBAL)

1 0 1 1

*

SHBM=1: Enable shared memory with host BIOS TRIS=1: While in IRE and OBD, float all the signals for clip-on ISE use

KBA0

(ENV0)

KBA1

(ENV1)

KBA2

(BADDR0)

KBA3

(BADDR1)

KBA4

(TRIS)

KBA5

(SHBM)

JP30

1

2

3

4

5

6

7

8

9

10

@96212-1011S

2E 4E

IRE OBD DEV PROG

EC_SMC1 EC_SMD1 EC_SMC2 EC_SMD2

MAIL_LED#

I/O Address

Reserved

ENV0

0 0 1 1

R223 @10K_0402 R224 10K_0402 R230 @10K_0402 R232 10K_0402 R234 @10K_0402 R233 10K_0402

RP62

8P4R_10K_0804

EC_TINIT# EC_TCK EC_TDO EC_TDI EC_TMS

KSO16 KSO17

(HCFGBAH, HCFGBAL)+1

ENV1

0 1 00 10

+5VALW

18 27 36 45

+5VALW

TRIS

Data

2F 4F

0 0

+3VALW

22UF_10V_1206

1 2

+3VALW

1 1

2 2

3 3

BLM11A20

1 2

BLM11A20

+5VS

TP_CLK PS2_CLK TP_DATA

L59

L60

12

C399

+3VS

+3VALW

12

C403

.1UF_0402

C604 .1UF_0402

1 2

ECAGND

GATEA20<16>

KBRST#<16>

RP61

10

9 8 7 6

10P8R_10K

12

R236 10K_0402

RP123

18 27 36 45

8P4R_10K_0804

CLK_PCI_LPC

R431 @10_0402

C608 @15PF_0402

VR_ON<36,43>

12

C316

.1UF_0402

12

C603 1000PF_0402

GATEA20

KBRST#

1 2 3 4 5

EC_THRM#

FSEL# SELIO# FRD# EC_SMI#

10PF_0402

12

C339

1000PF_0402

EC_AVCC

EC_RST#<32>

KBD_DATA KBD_CLK PS2_DATA

C627

+5VS

+3VALW

X4

12

32.768KHZ

12

R229 10K_0402

+3VALW

+3VS

LAD[0..3]<17,26,27>

R500 100K_0402

1 2

R434 20M

12

C632 10PF_0402

1 2

R218 0_0603

22UF_10V_1206

SIRQ<16,22,26,27>

LFRAME#<17,26,27>

LAD[0 ..3 ]

CLK_PCI_LPC<14>

EC_SCI#<17>

KSI[0..7]<15,28,32>

KSO[0..15]<32>

LID_SW#

KBD_CLK<33>

KBD_DATA<33>

PS2_CLK<33>

PS2_DATA<33>

TP_CLK<28>

TP_DATA<28>

LID_SW#<15>

DIS_ADJVOL<21>

12

R437 120K_0402

EC_SMI#<17>

EN_WOL#<34>

G_RST#<22,23>

ICH_SWI#<17>

CD_PLAY_ON#<35>

SLP_S1#<17>

SYSON<36,41> SUSP#<28,35,36,40,41>

PCM_SUSP#<22>

EC_RSMRST#<32>

ENABLT<15> BKOFF#<15>

FSEL#<30>

C394

LAD0 LAD1 LAD2 LAD3 CLK_PCI_LPC

EC_SCI#

KSI[0 ..7 ] KSO[0..15]

EC_TINIT# EC_TCK EC_TDO EC_TDI EC_TMS

KBD_CLK KBD_DATA PS2_CLK PS2_DATA TP_CLK TP_DATA LID_SW#

CRY1 CRY2

EC_SMI#

FSEL#

EC_3VDD

12

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7

KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15

C389 .1UF_0402

7 8

9 15 14 13 10 18 19 22 23

31

5

6

71 72 73 74 77 78 79 80

49 50 51 52 53 56 57 58 59 60 61 64 65 66 67 68

105 106 107 108 109

110 111 114 115 116 117 118 119

158 160

62 63 69 70 75 76

148 149 155 156

3

4 27 28

173 174

47

16

VDD

SERIRQ LDRQ LFRAME LAD0 LAD1 LAD2 LAD3 LCLK LREST1 SMI PWUREQ

IOPD3/ECSCI

GA20/IOPB5 KBRST/IOPB6

KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7

KBSOUT0 KBSOUT1 KBSOUT2 KBSOUT3 KBSOUT4 KBSOUT5 KBSOUT6 KBSOUT7 KBSOUT8 KBSOUT9 KBSOUT10 KBSOUT11 KBSOUT12 KBSOUT13 KBSOUT14 KBSOUT15

TINT TCK TDO TDI TMS

PSCLK1/IOPF0 PSDAT1/IOPF1 PSCLK2/IOPF2 PSDAT2/IOPF3 PSCLK3/IOPF4 PSDAT3/IOPF5 PSCLK4/IOPF6 PSDAT4/IOPF7

32KX1/32KCLKOUT 32KX2

IOPJ2/BST0 IOPJ3/BST1 IOPJ4/BST2 IOPJ5/PFS IOPJ6/PLI IOPJ7/BRKL_RSTO

IOPM0/D8 IOPM1/D9 IOPM2/D10 IOPM3/D11 IOPM4/D12 IOPM5/D13 IOPM6/D14 IOPM7/D15

SEL0 SEL1 CLK

VCC134VCC245VCC3

Host interface

Key matrix scan

JTAG debug port

PS2 interface

PORTJ-2

PORTM

4 4

A

B

PC87591VPC

GND117GND235GND346GND4

AGND

GND5

GND6

GND7

122

159

167

137

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

96

C

NC212NC320NC421NC585NC686NC791NC892NC997NC10

NC1

11

ECAGND

98

D

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1761

Size Doc ument Number Re v

401248

Custom Date: Sheet

星期四三月

27, 2003

29 47,

E

of

2A

A

B

C

D

E

6

INPUT

1

19

VCC_FLASH

32

VCC

31

WE*

30

A17

29

A14

28

A13

27

A8

26

A9

25

A11

24

OE*

23

A10

22

CE*

21

DQ7

20

DQ6

19

DQ5

18

DQ4

17

DQ3

32

OE#

31

A10

30

CE#

29

DQ7

28

DQ6

27

DQ5

26

DQ4

25

DQ3

24

VSS

23

DQ2

22

DQ1

21

DQ0

20

A0

19

A1

18

A2

17

A3

+3VALW

20

1A121Y1 1A241Y2

VCC 1A361Y3 1A481Y4 2A1112Y1 2A2132Y2 2A3152Y3 2A4172Y4

1G 2G

GND

10

FWE#

4.7UF_10V_0805

ADB7 ADB5 ADB3

FRD#KBA11 KBA10 FSEL# ADB7 ADB6 ADB5 ADB4 ADB3

ADB2 ADB1 ADB0 KBA0 KBA1 KBA2 KBA3

C635

1 2

.1UF_0402

U45

18 16 14 12 9 7 5 3

74LVC244

12

C397

FRD# <29> FSEL# <29>

+

ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7

C401 .1UF_0402

1 2

FWE#

1 2

R225 0_0603

VCC_FLASHVCC_FLASH

+3VALW

11

U44D

74LVC32

KBA11 KBA9 KBA8 KBA13 KBA14 KBA17 FWE#

KBA18 KBA16 KBA15 KBA12 KBA7 KBA6 KBA5 KBA4

M_SEN#<15,29,33>

+3VALW

10 11 12 13 14 15 16

1 2 3 4 5 6 7 8 9

147

12 13

U43

A11 A9 A8 A13 A14 A17 WE# VCC A18 A16 A15 A12 A7 A6 A5 A4

@29F040_TSOP

BT/WL_ON/OFF#

1 8

EXTID0

2 7

EXTID1

3 6

EXTID2

4 5

8P4R_100K_0804

12

R435 100K_0402

OE# A10 CE# DQ7 DQ6 DQ5 DQ4 DQ3 VSS DQ2 DQ1 DQ0

R501 100K_0402

1 2

R502 100K_0402 1 2 1 2

R503 100K_0402

1 2

10K_0402

1 3

D

32 31 30 29 28 27 26 25 24 23 22 21 20

A0

19

A1

18

A2

17

A3

CONA#

MDM_PME# WLAN_PME#

M_SEN#

+3VALW +5VS

RP124

R419

12

R436 100K_0402

2

G

2N7002

Q29

S

FRD# KBA10 FSEL# ADB7 ADB6 ADB5 ADB4 ADB3

ADB2 ADB1 ADB0 KBA0 KBA1 KBA2 KBA3

+3VALW

+3VS

EC_FLASH# <17>

FWR# <29>

KBA2 SELIO#

+3VALW

PCM_PME#<22>

LAN_PME#<24>

MDM_PME#<34>

WLAN_PME#<34>

+3VALW

1 2

147

3

U44A

74LVC32

1 2

R439 20K_0402

MDM_PME#

WLAN_PME#

OUTPUT

ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7

11

LARST#

C637

1 2 1UF_0603

R182 10K_0402

1 2

3 1

Q22 3904

1 2

R498 0_0402

D19 RB751V

D18 RB751V

3

D0 D14Q1 D27Q2 D38Q3 D413Q4 D514Q5 D617Q6 D718Q7

CLK

1

CLR

12

2

EC_SMC1<15,29,38> EC_SMD1<15,29,38>

+5VALW

20

R180 22K_0402

21

.1UF_0402

C639

1 2

.1UF_0402

U48

2

Q0

5

VCC

6 9 12 15 16 19

GND

74HCT273

10

+3VALW+3V+3V

12

R204 100K_0402

PME_EC# <29>

+3VALW +3VALW

12

C292

U18

8

VCC

7

WC

6

SCL

5

SDA

12

NM24C16-27

R161 100K_0402

ADJVOL_UP/DW# <21> EC_MUTEO <21> DJ_ON_LED# <28> BT_ON# <31> PMLED_0# <28> PMLED_1# <28> BATLED_0# <28> CD_PLAY <19,20>

1

A0

2

A1

3

A2

4

GND

12

R171 100K_0402

12

R176 100K_0402

BT/WL_ON/OFF#<31>

ADB[0 ..7 ] KBA[0..18]

EXTID0<19> EXTID1<19> EXTID2<19>

DJ_ON/OFF#<28>

HPS<21>

CONA#<33>

BT_WAKE_UP<31>

KBA1 SELIO#

EXTID0 EXTID1 EXTID2

BT/WL_ON/OFF# CONA# BT_WAKE_UP

1 2

R440 100K_0402

+3VALW

147

4 5

U44B 74LVC32

U40

KBA18

1

NC

KBA16

2

A16

KBA15 KBA17

3

A15

KBA12 KBA14

4

A12

KBA7 KBA13

5

A7

KBA6 KBA8

6

A6

KBA5 KBA9

7

A5

KBA4 KBA11

8

A4

KBA3 FRD#

9

A3

KBA2 KBA10

10

A2

KBA1 FSEL#

11

A1

KBA0

12

A0

ADB0 ADB6

13

DQ0

ADB1

14

DQ1

ADB2 ADB4

15

DQ2

16

VSS

@29F040/SST39VF040_PLCC

U41

1

A11

KBA9

2

A9

KBA8

3

A8

KBA13

4

A13

KBA14

5

A14

KBA17

6

A17

FWE#

7

WE#

8

VCC

KBA18

9

A18

KBA16

10

A16

KBA15

11

A15

KBA12

12

A12

KBA7

13

A7

KBA6

14

A6

KBA5

15

A5

KBA4

16

A4

SST39VF040_TSOP

ADB[0..7]<29>

KBA[0..18]<29>

1 1

SELIO#<29>

2 2

3 3

4 4

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS

A

TSOP 8x14 TSOP 8x20

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

SCH EMATIC, M/B LA-1761

Size Doc ument Number Re v

401248

Custom Date: Sheet

星期四三月

27, 2003

30 47,

E

of

2A

10

MDC Note Pin 1 is NC for Pctel and connexant MDC modem Pin 2 is NC for Pctel and connexant MDC modem

H H

+3V

+3VALW

G G

F F

E E

+5V USB_VCCA

D D

SUSON<36>

C C

R442

@3M_0402

12

2

12

G

C644 @.22UF_0603

9

1 2

R459 MDC@0_0805

1 2

R457 @0_0805

MDC@4.7UF_10V_0805

12

R441 @100K_0402

SUSB#

13

D

Q58 @2N7002

S

C671

12

C641 .1UF_0402

12

U49

1

GND

2

IN

3

EN1# EN2#4OC2#

TPS2042

+3VMDC

8

MDC@1000PF_0402

C669 MDC@.1UF_0402

1 2

OVCUR#0

8

OC1#

7

OUT1

6

OUT2

OVCUR#1

5

Close to USB Port

USB CONNECTOR 3

USB_VCCC

W=50mils

C706

.1UF_0402

OVCUR#0 <17> USB_VCCB

OVCUR#1 <17>

12

100UF_10V_D2

7

12

C665

C664 MDC@.1UF_0402

MD_MIC<20,34>

+3VMDC

IAC_SDATAO<17,20,34> IAC_SDATA_IN1 <17,34>

IAC_RST#<17,20,34>

+3V

6

12

C423

@1000PF_0402

11 13 15 17 19 21 23 25 27 29

MDC/BT Conn.

12

C426 @1000PF_0402

JP13

1

MONO_OUT/PC_BEEP

3

AGND

5

AUXA_RIGHT

7

AUXA_LEFT

9

CD_GND CD_RIGHT CD_LEFT GND

3.3Vaux GND

3.3Vmain AC97_SDATA_OUT AC97_RESET# GND AC97_MSTRCLK

MDC@AMP 3-1473290-0

1 2 .1UF_0402

HCH_PTS-05

C432

SW1

21 43

AC97_SDATA_IN1 AC97_SDATA_IN0

5

12

C425 @.1UF_0402

AUDIO_PWDN

MONO_PHONE

RESERVED

GND

+5V RESERVED RESERVED RESERVED RESERVED RESERVED

AC97_SYNC

GND

AC97_BITCLK

BT/WL_ON/OFF#

+5VMDC

2 4 6 8

L70 FBM-11-160808-121

10 12 14

L71 FBM-11-160808-121

16 18 20 22 24 26 28 30

BT/WL_ON/OFF# <30>

4

1 2

R268 @0_0805

BT_ON#

12 12

R271

12

MDC@22_0402

R269 15_0402

1 2

C427 22PF_0402

+5V

+5VALW

USB CONNECTOR 2

+

C703

12

C705 1000PF_0402

USB_VCCB

W=50mils

C657

.1UF_0402

12

+

C653

100UF_10V_D2

12

C658 1000PF_0402

BT_DETACH <29> BT_ON# <30>

MDC_DET# <17> USBP3+ <17>

USBP3- <17> BT_WAKE_UP <30> IAC_SYNC <17,20,34>

IAC_BITCLK <17,20,34>

1 2

R493 220_0402

R494 330_0402

3

C424 @1000PF_0402

12

BLU_LED_1 BLU_LED_2

2 1

D42 12-215UBC

ORE_LED_1

2 1

12

D43

ORANGE

WIRELESS LAN

+3VS

USB CONNECTOR 1

USB_VCCA

W=50mils

C642

.1UF_0402

2

MD_SPK <20,34>

ORE_LED_2

12-215 UYOC

1 2

R495 10K_0402

12

+

100UF_10V_D2

3 1

1

C640

B

47K

E

47K

2

12

BT_ON#

2

10K

C

Q67 DTA114YKA

3

47K

Q68 DTC144EKA

C643 1000PF_0402

1

JP35

1

3

224

RJ11 CONN.

WL_ON <29,34>

3 4

12

R276 0_0402_5%

USBP2-

USBP2+<17>

12

C702

.1uF_0402

SUSB#

+5V

OUT OUT OUT

OC#

8 7 6 5

USB_VCCC

OVCUR#2 <17>

8

12

R499 0_0603

1 2 3 4

U55

GND IN IN EN#

TPS2041

9

B B

A A

10

L36

1 4

2 3

@KC-JTS0402-02

80-90 ohm 100Mhz 80-90 ohm 100Mhz 80-90 ohm 100Mhz

12

R275 0_0402_5%

15K_0402

R277

12

7

12

R274 15K_0402

JP15

1 2 3 4

USB3_CONN

USBP1-<17>USBP2-<17>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

6

USBP1-

USBP1+

5

12

R265 0_0402_5%

L35

1 4

2 3

@KC-JTS0402-02

12

R264 0_0402_5%

15K_0402

R266

12

R261 0_0402_5%

R260 0_0402_5%

星期四三月

L34

1 4

2 3

@KC-JTS0402-02

12

27, 2003

2

R262

15K_0402

12

JP11

1 2 3 4

USB2_CONN

12

R263 15K_0402

4

USBP0-<17>

USBP0+<17>USBP1+<17>

3

USBP0-

USBP0+USBP2+

Compal Electronics, Inc.

Title

SCHEM AT IC , M/ B LA- 1761

Size Doc ument Number Re v

401248

Custom Date: Sheet

12

R258 15K_0402

31 47,

JP10

1 2 3 4

USB1_CONN

of

1

2A

A

B

C

D

E

F

G

H

I

J

+3VALW

3 4

C349 .1UF_0402

Power ON Circuit

RSM_RST#

74LVC14 U21B

7 14

+3VALW

5 6

U21C 74LVC14

7 14

R213

1 2

0_0402

12

R211 @100K_0402

R210

1 2

@0_0402

RSMRST#

EC_RSMRST# <29>

SW2 1 2 3 4

RESET BTN

EC_GRST<29>

1 1

R214

EC_RST#<29> RSMRST# <17>

2 2

200K_0402

12

R215

330K_0402

12

Power BTN

ON/OFFBTN#<15>

+3VS

3 3

VGATE<43>

1 2

4 4

R192 100K_0402

4

5 6

U19B 74LVC125

C323 100PF_0402

1 2

2

1 2

R193 0_0402

1 2

R203 10K_0402

Q24 3904

3 1

+3VS

1 2

R199 10K_0402

ICH_VGATE <17>

CK408_PWRGD# <14>

EC_ON<29>

+3VALW

EC_ON

3

12

R361 100K_0402

1 2

R364 0_0402

INT_KBD CONN.

KSI [0..7 ] KSO[0..15]

5 5

RSM_RST#

DT : INSTALL

R423

+3VALW

9 8

7 14

.01UF_0402

12

U21D 74LVC14

12

C601

12

.1UF_0402

C602

C391

1 2

.1UF_0402 2 1

3 5

U22

7SH32FU

5 3

4

+3VS

C600

1 2

.1UF_0402

1

U38

MR# PFI

VCC

GND

2

RST#

PFO#

MAX6342

6

4

10

9 8

U19C 74LVC125

1 2

R406 0_0402

12

R404 10K_0402

PM_PWROK

PM_PWROK <9,17>

+5V +3V

12

R228

+5VS

47K_0402

12

C396 .1UF_0402

R420

1 2

240K_0402

100K_0402

6 6

R227

1 2

330K_0402

7 7

KSI1 KSI7 KSI6 KSO9 KSI4 KSI5 KSO0 KSI2 KSI3 KSO5 KSO1 KSI0 KSO2 KSO4 KSO7 KSO8 KSO6 KSO3 KSO12 KSO13 KSO14 KSO11 KSO10 KSO15

JP8

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

INT_KB_CONN.

KSI[0..7] <15,28,29> KSO[0..15] <29>

D35

DAN202U

2

Q52

DTC124EK

Reset Button

+3VALW

12

R422 10K_0402

R424

1 2

10K_0402

1 2

R360 100K_0402

1 2

13

C

22K

B

E

22K

+3VALW

9

10

ON/OFF#

12

C557 1000PF_0402

C636

.1UF_0402

147

WHEN R=0,Vbe=1.35V WHEN R=33K,Vbe=0.8V

KSI3

1 8

KSO5

2 7

KSO1

3 6

KSI0

4 5

8P4C_100PF

KSO2

1 8

KSO4

2 7

KSO7

3 6

KSO8

4 5

8P4C_100PF

KSI1

1 8

KSI7

2 7

KSI6

3 6

KSO9

4 5

8P4C_100PF

KSI4

1 8

KSI5

2 7

KSO0

3 6

KSI2

4 5

8P4C_100PF

KSO6

1 8

KSO3

2 7

KSO12

3 6

KSO13

4 5

8P4C_100PF

KSO14

1 8

KSO11

2 7

KSO10

3 6

KSO15

4 5

8P4C_100PF

12

8

U44C

74LVC32

+3VALW

ON/OFF# <29>

EC_PWR_ON# <28,37>

12

D34 RLZ20A

CP3

CP4

CP1

CP2

CP5

CP6

EC_RST#

8 8

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

D

E

F

G

H

Compal Electronics, Inc.

Title

SCHEM AT IC , M/ B LA- 1761

Size Doc ument Number Re v

401248

Custom

星期四三月

Date: Sheet

27, 2003

I

of

32 47,

J

2A

SPR 102 PIN

INTSPK_R+<21>

LINE_OUT_PLUG#

13

D

Q41

LINE_OUT_PLUG<21>

INTSPK_L+<21>

INTM IC O F F #<21>

2

G

S

Q37

SPR@2N7002

13

D

S

1 3

DGS

2

DGS

1 3

Q39 SPR@2N7002

DOCK_MIC_PLUG

2

G

DQLINE_OUT_R DLINE_OUT_R

Q40 SPR@2N7002

DQLINE_OUT_L

12

+

1 2

C470 SPR@150UF_63V_D2

12

R299 SPR@100K_0402

+

1 2

C469 SPR@150UF_63V_D2

R293 SPR@1M_0402

DLINE_OUT_L

+3VALW +3VALW

+12VALW

GNDB

SPRUSB_VCCB

1 2

R287 SPR@330_0402

1 2

R288 SPR@220_0402

+5VS

JP22

100

KBD_CLK<29>

KBD_DATA<29>

PS2_CLK<29>

PS2_DATA<29>

DSR1#<28>

RTS1#<28> CTS1#<28>

RI1#<28>

LPTSTB#<27,28>

LPD0<27,28> LPD1<27,28>

LPD2<27,28> LPD3<27,28> LPD4<27,28>

LPD5<27,28> LPTPE <27,28> LPD6<27,28> LPD7<27,28>

DOCK_OUT_PLUG<21>

DLINE_IN_L<20>

DLINE_IN_R<20>

USBP5-<17>

USBP5+<17>

CRT_VSYNCRFL<15>

DOCK_D DCCL<15> DOCK_DDCDA<15>

M_SEN#<15,29,30>

TV_LUMA<15>

LINK10_100#<24>

ACTIVITY#<24>

DKMOD_TIP DKMOD_RING

99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56

52 2

SPR@SPR

101

50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6

CONA# <30> DCD1# <28> RXD1 <28> TXD1 <28> DTR1# <28> LPTAFD# <27,28> LPTERR# <27,28> LPTINIT# <27,28> LPTSLCTIN# <27,28>

LPTACK# <27,28> LPTBUSY <27,28> LPTSLCT <27,28>

DLINE_OUT_L DLINE_OUT_R

DOCK_MIC_PLUG

DOCK_MIC <21> USBP4- <17> USBP4+ <17>

CRT_HSYNCRFL <15> CRT_B <15>

CRT_G <15> CRT_R <15> TV_CRMA <15> RJ45_RX+ <24> RJ45_RX- <24> RJ45_TX+ <24> RJ45_TX- <24>

DOCKVIN

GNDB

SPRUSB_VCCA

+5V

C493

SPR@.1UF_0402

12

SPRUSB_VCCA

SPR@.1UF_0402

SPRUSB_VCCB

SPR@.1UF_0402

12

C446

12

C449

U30

1

GND

2

IN

3

EN1# EN2#4OC2#

SPR@TPS2042

+

C462

SPR@100UF_10V_D2

+

C463

SPR@100UF_10V_D2

8

OC1#

7

OUT1

6

OUT2

5

12

C447 SPR@1000PF_0402

12

C448 SPR@1000PF_0402

OVCUR#4 <17> SPRUSB_VCCA SPRUSB_VCCB

OVCUR#5 <17>

C440

SPR@.1UF_0402

+5VS

12

C441 SPR@.1UF_0402

L1 SPR@FBM-L18-453215-900LMA 90T_1812

12

C19 SPR@1000PF_0402

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

DOCKVINVIN

12

C20 SPR@1000PF_0402

Title

Size Do cum e nt Number R e v Custom

Dat e : Sheet

Compal Electronics, Inc.

SCHEM A T I C , M / B L A -1761

401248

期四三月

33 47¬P , 27, 2003

2A

of

A

B

C

D

E

F

G

H

I

J

1 1

101 103 105 107 109 111 113 115 117 119 121 123

127

C308

1UF_0603

JP27

KEY KEY

334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152 535354 555556 575758 595960 616162 636364 656566 676768 696970 717172 737374 757576 777778 797980 818182 838384 858586 878788 898990 919192 939394 959596 979798 9999100 101

102

103

104

105

106

107

108

109

110

111

112

113

114

115

116

117

118

119

120

121

122

123

124

127

128

Mini-P CI SLOT

12

TIP

WL_ON<29,31>

2 2

+3VS

.1UF_0402

C564

R377

0_1206

12

1000PF_0402

12

C573

+3VS_MINI_L

12

C574 .1uF_0402

3 3

CLK_PCI_MIN

12

R387 @10_0402

12

C566

4 4

5 5

@15PF_0402

IAC_BITCLK

12

R386 @10_0402

12

C567 @15PF_0402

IAC_SDATA_IN1<17,31>

CLK_PCI_MIN<14>

PCI_IRDY#<16,22,24,25>

PM_CLKRUN#<17,22,27,29>

PCI_SERR#<16,22,24> PCI_PERR#<16,22,24,25>

IAC_SYNC<17,20,31>

IAC_BITCLK<17,20,31>

MD_MON<20>

MD_MIC<20,31>

PIRQD#<16>

REQ#4<16>

REQ#1<16>

AD31<16,22,24,25> AD29<16,22,24,25>

AD27<16,22,24,25> AD25<16,22,24,25>

IDSEL : AD22

C/BE#3<16,22,24,25>

AD23<16,22,24,25> AD21<16,22,24,25>

AD19<16,22,24,25> AD17<16,22,24,25>

C/BE#2<16,22,24,25>

C/BE#1<16,22,24,25>

AD14<16,22,24,25> AD12<16,22,24,25>

AD10<16,22,24,25>

AD8<16,22,24,25> AD7<16,22,24,25>

AD5<16,22,24,25> AD3<16,22,24,25>

+5VS

AD1<16,22,24,25>

MD_RI#<28>

+5VS

WL_ON

W=40mils

CLK_PCI_MIN REQ#1

AD22

W=30mils

IAC_BITCLK MD_MON

6 6

13

U19D

11 10

74LVC14 U21E

7 14

12 11

74LVC125

1 2

R505 @0_0402

1 2

R376 0_0402

1 2

R375 100_0402

C569 @1000PF_0402

1 2

7 7

RING

4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124

128

Or use SI2305DS.

Q16 SI2301DS

S

G

2

LAN RESERVEDLAN RESERVED

W=30mils

1 2

R409 0_0402

W=40mils

1 2

R411 100_0402

1 2

R408 10K_0402

W=40milsW=30mils

+3VAUX+3VALW

D

13

+3VS_MINI_R GNT#1

MDM_PME# WLAN_PME#

AD18

MD_SPK

C596 @1000PF_0402

1 2

12

C307 1UF_0603

+5VS PIRQC# <16> GNT#4 <16> +3VAUX PCIRST# <5,9,15,16,19,22,24,25,27>

GNT#1 <16> MDM_PME# <30>

WLAN_PME# <30> AD30 <16,22,24,25>

AD28 <16,22,24,25> AD26 <16,22,24,25> AD24 <16,22,24,25>

IDSEL : AD18

AD22 <16,22,24,25> AD20 <16,22,24,25> PCI_PAR <16,22,24,25> AD18 <16,22,24,25> AD16 <16,22,24,25>

PCI_FRAME# <16,22,24,25> PCI_TRDY# <16,22,24,25> PCI_STOP# <16,22,24,25>

PCI_DEVSEL# <16,22,24,25> AD15 <16,22,24,25>

AD13 <16,22,24,25> AD11 <16,22,24,25>

AD9 <16,22,24,25> C/BE#0 <16,22,24,25>

AD6 <16,22,24,25> AD4 <16,22,24,25> AD2 <16,22,24,25> AD0 <16,22,24,25>

IAC_SDATAO <17,20,31> IAC_RST# <17,20,31>

MD_SPK <20,31>

+3VAUX

12

C593 .1uF_0402

1 2

12

C592 1000PF_0402

R410

0_1206

12

C591 .1UF_0402

C570

4.7UF_10V_0805

+3VS_MINI_L

C571

4.7UF_10V_0805

C293

4.7UF_10V_0805

+3VS

+5VS

+

+3VAUX

+

12

C572 .1UF_0402

+3VS_MINI_R

12

C594 .1UF_0402

12

C595 1000PF_0402

12

+

12

C294 1000PF_0402

C299

4.7UF_10V_0805

13 12

74LVC14 U21F

7 14

8 8

A

B

C

D

EN_WOL#<29>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

F

G

Title

Size Do cum e nt Number R e v Custom

Dat e : Sheet

H

Compal Electronics, Inc.

SCHEMATIC , M/B LA-1761

401248

期四三月

I

34 47¬P , 27, 2003

2A

of

J

+5VCD

CDD[0..15]<19>

SDD[0..15]<17>

C305 DJ@1UF_10V

12

1 2

R189 DJ@100K_0402

21

D17 DJ@1N4148

+12VALW

CDPLAY#<19>

CDD[0..15]

SDD[0..15]

EC_SMD2<5,29>

EC_SMC2<5,29>

R200 DJ@100K_0402

CDPLAY#

Q26

DJ@2N7002

1 3

2

SDA0<17> SDA1<17> SDA2<17>

SDCS1#<17> SDCS3#<17>

SDIOR#<17> SDIOW#<17>

SDIORDY<17>

IRQ15<16> SDDREQ<17> SDDACK#<17>

SIDERST#<19>

Q21

2

13

1 3

2

Q25

DJ@2N7002

SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15

SDA0 SDA1 SDA2

SDCS1# SDCS3#

SDIOR# SDIOW#

SDIORDY

IRQ15 SDDREQ SDDACK#

SIDERST#

DM_ON

DM_ON INTN

OSC1 OSC2

X2

OSC1 OSC2

DJ@8MHZ

R430 DJ@1M_0402

C606 DJ@10PF_0402

CD_SBA0 <19> CD_SBA1 <19> CD_SBA2 <19>

CD_SCS1# <19> CD_SCS3# <19>

CD_SIOR# <19> CD_SIOW # <19>

CD_S IORDY <19>

CD _IRQ <19> CD_DREQ <19> CD_DACK# <19>

CD_IDERST# <19>

DJ@100K_0402

+5VOZ

C303

DJ@.1UF_0402

+5VCD

C310

DJ@.1UF_0402

C314

DJ@.1UF_0402

U37

76

HDD0

78

HDD1

81

HDD2

83

HDD3

86

HDD4

90

HDD5

95

HDD6

97

HDD7

2

HDD8

4

HDD9

8

HDD10

11

HDD11

15

HDD12

18

HDD13

20

HDD14

22

HDD15

68

HDA0

70

HDA1

66

HDA2

63

HCS0

61

HCS1

99

HDIOR#

6

HDIOW#

72

HIOCS16#

93

HIORDY

74

HINTRQ

12

HDMARQ

88

HDMACK#

24

HRESET#

59

HDASPN

48

HSYNC

53

HBIT_CLK

55

HDATA_OUT

50

HDATA_IN

46

HACRSTN

28

PAV_EN

36

PLAY/PAUSE

35

FFORWARD

34

REWIND

37

STOP/EJECT

29

PCSYSTEM_OFF

25

INTN

30

RESET#

26

SDATA

27

SCLK

31

OSCI

32

OSCO

+5VOZ

58

VDD9VDD44VDD

CDD0 CDD1 CDD2 CDD3 CDD4 CDD5 CDD6 CDD7 CDD8

CDD9 CDD10 CDD11 CDD12 CDD13 CDD14 CDD15

CDA0

CDA1

CDA2

CCS0

CCS1

CDIOR#

CDIOW#

CIOCS16#

CIORDY

CHINTRQ

CDMARQ

CHDMACK#

CRESET#

CDASPN

SSYNC

SBIT_CLK

SDATA_OUT

SDATA_IN SACRSTN

PWR_CTL

ISCDROM

GPIO[1]/VOL_UP GPIO[0]/VOL_DN

MODE0 MODE1

PAVMODE

CSN

INCN

UDN

77 79 82 84 87 91 96 98 1 3 7 10 14 17 19 21

CD_SBA0

69

CD_SBA1

71

CD_SBA2

67

CD_SCS1#

64

CD_SCS3#

62

CD_SIOR#

100

CD_SIOW#

5

CIOCS16#

73

CD_SIORDY

94

CD_IRQ

75

CD_DREQ

13

CD_DACK#

89

CD_IDERST#

23

CDASPN

60 47

52 54 49 45

51

1 2

R202

ISCDROM

80

GPIO_1

39

GPIO_0

40

MODE0

56

MODE1

57

38

1 2

R209 DJ@100K_0402

41 42 43

CDD0 CDD1 CDD2 CDD3 CDD4 CDD5 CDD6 CDD7 CDD8 CDD9 CDD10 CDD11 CDD12 CDD13 CDD14 CDD15

GND16GND33GND65GND85GND

92

DJ@OZ165

CD_PLAY_ON#<29>

C605 DJ@10PF_0402

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SUSP#<28,29,36,40,41>

1 2

R194 DJ@0_0402

1 2

R195 @0_0402

2

+5VCD

R188 DJ@100K_0402

13

Q27 DJ@2N7002

DM_ON

L28

12

C304 DJ@.1UF_0402

+5VCD

DJ@HB-1M2012-601JT

CIOCS16# CD_SIORDY

CD_DREQ

ISCDROM CD_IRQ CDASPN

CDD0 CDD1 CDD2 CDD3

CDD8 CDD9 CDD10 CDD11

CDD0 CDD1 CDD2 CDD3 CDD4 CDD5 CDD6 CDD7

SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15

SDA0 SDA1 SDA2 SDCS1# SDCS3# SDIOR# SDIOW# SDIORDY

IRQ15 SDDREQ SDDACK# SIDERST#

+5VCD

1 2

R164 @47K_0402

1 2

R162 DJ@1K_0402

1 2

R186 DJ@5.6K_0402

RP16

1 2 3 4 5

DJ@10P8R_100K

RP8

1 2 3 4 5

@10P8R_4.7K

RP17

1 2 3 4 5

@10P8R_4.7K

8 9 7 6 5 4 3 2 1

WODJ@16P8R_0

8 9 7 6 5 4 3 2 1

WODJ@16P8R_0

1 2 3 4 5 6 7 8 9

WODJ@16P8R_0

1 8 2 7 3 6 4 5

WODJ@8P4R-0

RP103

RP15

RP14

RP13

10 9 8 7 6

10 11 12 13 14 15 16

16 15 14 13 12 11 10

SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7

CDD8 CDD9 CDD10 CDD11 CDD12 CDD13 CDD14 CDD15

CD_SBA0 CD_SBA1 CD_SBA2 CD_SCS1# CD_SCS3# CD_SIOR# CD_SIOW# CD_SIORDY

CD_IRQ CD_DREQ CD_DACK#

CD_IDERST#

+5VCD

MODE0 MODE1 GPIO_0INTN GPIO_1

CDD7 CDD6 CDD5 CDD4

CDD15 CDD14 CDD13 CDD12

+5VCD

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1761

Size Do cum e nt Number R e v

B

401248

Dat e : Sheet

期四三月

2A

of

35 47¬P , 27, 2003

A

+12VALW

12

R126

Q10

2N7002

100K_0402

12

13

D

R131

2

G

1M_0402

S

1 1

SYSON#

2 2

3 3

+3VALW

U3 8 7 6 5

SI4800

12

C479

4 4

SUSP

+12VALW

R256

100K_0402

2

G

Q30

2N7002

5 5

10UF_6.3V_P

12

13

D

R257

1M_0402

S

6 6

B

+5VALW to +5V Transfer

+5VALW

12 C223

.01UF_0402

+5VALW +5VALW

12

C229

4.7UF_10V_0805

+3VALW to +3V Transfer

+3V

1

S

D

2

S

D

3

S

D

4

G

D

+5VALW to +5VS Transfer

+5VALW

12

C418

.01UF_0402

C419

4.7UF_10V_0805

8 7 6 5

12

SUSON

U27

8 7 6 5

+5VALW

12

D D D D

RUNON

U14

S

D

S

D

S

D

G

D

SI4800

SUSON

12

C246

+

@33UF_D2_16V

C500 22UF_10V_1206

SUSON <31>

1

S

2

S

3

S

4

G

SI4800

+5VALW

12

C422

+

100UF_D_10V

1 2 3 4

12

C491 .1UF_0402

+5VS

C

+5V

12 C249

10UF_10V_1206

D

S

12

C421

.1UF_0402

12

R307 470_0402

13

2

G

Q46 2N7002

12

C420 22UF_10V_1206

12

C240 .1UF_0402

SYSON#

D

S

12

R259 470_0402

Q31

13

2N7002

D

S

G

12

R135 470_0402

13

2

SUSP

D

2

G

Q12 2N7002

SYSON#

E

+3VALW

R350 @100K_0402

1 2

VR_ON#

13

VR_ON

VR_ON<29,43>

+12VALW To +12VS Transfer +2.5V To +2.5VS Transfer

+12VALW

C550

1 2

@.1UF_25V_0805

R365

HOLEC

H32

H5

+12VALW

12

+1.5VALW

12

FD14

HOLEA

1

1 2

100K_0402

C556 1UF_25V_0805

U17

8 7 6 5

C581 10UF_6.3V_P

4 6

SUSP# SUSP#

5

+1.5VS

SI4800

1

S

D

2

S

D

3

S

D

4

G

D

FD15

FD16

HOLEA

H24

1

HOLEC

H4

D

2

G

S

@2N7002

Q53 SI3861

D

S

2

G

3

C552

12

1 1UF_25V_0805

12

R358 0_0402

+1.5VALW to +1.5VS Transfer

12

C580

22UF_10V_1206

RUNON

FD17

HOLEA

H17

1

HOLEC

H8

F

+CPU_CORE

12

R348 @330

13

D

2

G

Q50

S

@2N7002

Q49

1 2

@.1UF_0402

R2

1 2

D

S

12

R168 470_0402

13

HOLEA

HOLEC

100K_0402

+2.5VS

12

+

C4

4.7UF_10V_0805

Q15 2N7002

SUSP

2

G

FD6

H15

1

H11

+12VS

12

R356 470_0402

13

D

SUSP SUSP

2

G

Q51

S

2N7002

12

C582

.1UF_0402

FD13

FD19

HOLEA

H23

1

HOLEC

H18

G

+1.25VS

12

R212 470_0402

13

D

SUSP

2

G

Q28

S

2N7002

SUSP#<28,29,35,40,41>

+2.5V

C6

Q2 SI3865

S

4 6 5

1

4.7UF_10V_0805 12

G

R4 0_0402

BATT1

+12VALW

SUSP

2

G

D

2 3

12

+

C5

13

D

S

-+

RTCBATT

RTC Battery

+RTCVCC

FD22

HOLEA

HOLEC

FD8

HOLEA

H30

1

H9

FD7

HOLEA

FD20

HOLEA

H21

1

HOLEC

H12

12

R301 10K_0402

13

D

S

+2.5VS

R1 470_0402

G

Q3 2N7002

12

HOLEC

Q43 2N7002

2

RTCPWR

H31

H13

FD10

HOLEA

RTCPWR

3

1

H

+1.8VS

12

C21

22UF_10V_1206

12

C445 .1UF_0402

1

D30 HSM126S

2

CHGRTC

FD3

HOLEA

H25

HOLEC

H27

HOLEA

1

FD5

FD2

HOLEA

H20

HOLEC

H28

I

12

C18

R5 470_0402

.1UF_0402

Q1

13

D

2N7002

SUSP

2

G

S

SYSON#

SYSON<29,41>

FD21

HOLEA

1

FD18

HOLEA

H14

HOLEH

H26

FD4

HOLEA

H10

1

HOLEH

1

2

G

FD23

HOLEA

+12VALW

HOLED

J

SUSP <41,42>

12

R304 47K_0402

13

D

Q45 2N7002

S

FD24

HOLEA

H1

1

7 7

12

+

@100UF_D_16V

8 8

A

C489

+3VALW +3VS

U29

8 7 6 5

12

C72 10UF_6.3V_P

1

S

D

2

S

D

3

S

D

4

G

D

SI4800

B

+3VALW to +3VS Transfer

12

C50 22UF_10V_1206

RUNON

12

C49

.1UF_0402

C

12

R24 82_0402

13

D

S

Q4 2N7002

2

G

SUSP

1

HOLED

H22

HOLEG

D

1

HOLED

H16

HOLEG

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

1

HOLED

H29

HOLEF

1

HOLEE

H2

HOLEG

1

HOLEE

H6

HOLED

1

F

HOLEE

HOLED

1

H7

1

G

HOLEG

HOLEE

1

H3

1

HOLEG

1

HOLEH

H

1

HOLEH

Compal Electronics, Inc.

Title

SCHEM AT IC , M/ B LA- 1761

Size Doc ument Number Re v

401248

Custom

星期四三月

Date: Sheet

27, 2003

I

HOLEI

1

of

36 47,

J

2A

A

1 2

1

PC2

100P_0603_50V8J

2

VIN

21

1

2

N2

PL1

PR10

33_1206_5%

PC8 .1U_0805_25V7K

PZD3 RLZ16B_LL34

2 1

PC1

PQ1

TP0610T

1

2

HCB4532K-800T90_9A

PD2

1N4148

13

2

PR19 200_0805_5%

PC12 1U_0805_25V4Z

PCN1

1

2

CHGRTCP

PR23

200_0603_5%

1

23

PD35 RB751V

2 1

PR12

100_0805_5%

100K_0603_5%

RTCVREF

3.3V

1

2

PR13

PR15 22K_0603_5%

3

PC13 10U_1206_10V4Z

12

PD1

EC10QS04

N1

1

PC7

.22U_1206_25V7K

2

PU2

S-81233SG (SOT-89)

1

2

1000P_0603_50V7K

2

1 1

2 2

3 3

4

3

SINGA_2DC-S726B201

VMB_A<38>

EC_PWR_ON#<28,32>

CHGRTC

B

1

PC3

1000P_0603_50V7K

2

VS

VIN

1

PC4

100P_0603_50V8J

2

MAINPWON<5,38,40>

C

5

+

6

-

VS

PR2

5.6K_0603_5%

12

PZD1 RLZ4.3B

PR17 1M_0603_1%

1

PC11

.1U_0603_16V7K

2

RTCVREF

3.3V

PR7 10K_0603_5%

10K_0603_5%

PR21

PR4

1K_0603_5%

PACIN

PR22 215K_0603_1%

VIN

PR1 1M_0603_1%

PR8

10K_0603_5%

N3

PON

PZD2

@RLZ6.2C_LL34

2 1

VS

PU1A

84

3 2

LM393M

+

1

-

RTCVREF

3.3V

PR9 1K_1206_5%

PR11 1K_1206_5%

PR14 1K_1206_5%

6.0V

PU1B LM393M

7

1

PC10

2

1000P_0603_50V7K

PR3

84.5K_0603_1%

PR5 160K_0603_5%

24K_0603_1%

1

PC5

1000P_0603_50V7K

2

PR6

VS

VL

PD5

1

3

ACON<39>

GA<41>

GB<41>

2

RB715F_SOT323

PD43

1 2

@RB715F_SOT323

3

1

.1U_0603_50V4Z

2

PD4 1N4148

PC6

12

PR16 10K_0603_5%

ACIN <17,29>

PACIN <39,40>

Vin Detector

High 17.58 Low 14.11

B+

PR18 499K_0603_1%

PR20 499K_0603_1%

D

1

PC9 1000P_0603_50V7K

2

13

D

PJP1

+2.5VP +2.5V

+1.8VSP +1.8VS

+1.5VALWP

4 4

+12VALWP

+5VALWP

+3VALWP

1 2

PAD-OPEN 3x3m PJP3

1 2

PAD-OPEN 3x3m

PJP5

2 1

PAD-OPEN 3x3m

PJP6

2 1

PAD-OPEN 2x2m PJP8

1 2

PAD-OPEN 3x3m PJP9

1 2

PAD-OPEN 3x3m

+1.5VALW

+12VALW

+5VALW

+3VALW

A

(6A,240mils ,Via NO.= 12)

+1.25VSP

(1.5A,60mils ,Via NO.= 3) (3A,120mils ,Via NO.= 6)

(3A,120mils ,Via NO.= 6)

+1.2VPP

(300mA,40mils ,Via NO.= 2)

(120mA,20mils ,Via NO.= 1)

(5A,200mils ,Via NO.= 10)

+1.25VSP_VGA

(3A,120mils ,Via NO.= 6)

(5A,200mils ,Via NO.= 10)

PJP2

1 2

PAD-OPEN 3x3m

PJP4

2 1

PAD-OPEN 2x2m

PJP7

1 2

PAD-OPEN 3x3m

B

+1.25VS

ACIN Precharge detector

15.34 15.90 16.48

13.13 13.71 14.20

+1.2VP

+1.25VS_VGA

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

PQ2 2N7002

2

G

S

13

PQ3

DTC115EK

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1761

Size Do cum e nt Number R e v

B

期四三月

Dat e : Sheet

PR24 47K_0603_5%

100K

2

100K

401248 2A

D

PACIN

+5VALWP

of

37 47¬P , 27, 2003

A

B

C

D

PH1 under CPU botten side :

CPU thermal protection at 84 degree C Recovery at 45 degree C

1 1

2 2

PCN2

BTD-09JR1

+3VALWP

HCB4532K-800T90_9A

1

PC15 1000P_0603_50V7K

2

1 2 3 4 5 6 7 8 9

ALI/NIMH#_PWR

AB/I

TS_A EC_SMDA EC_SMCA

PR29

100_0603_5%

PR30

100_0603_5%

PR26 1K_0603_5%

PR32 1K_0603_5%

PR37 1K_0603_5%

PR35

25.5K_0603_1%

1 2

PR27 47K_0603_5%

1

+3VALWP

3

PD6 @BAS40-04

2

3

2

PD8 @BAS40-04

1

PD9

@BAS40-04

3

2

3 3

+5VALWP

1

PD10

@BAS40-04

3

2

VMB_A <37>

PL2

1 2

ALI/NIMH# <29>

BATT_TEMPA <29>

EC_SMD1 <15,29,30> EC_SMC1 <15,29,30>

1

PC16 .01U_0603_50V7K

2

VL VS

BATT+

10K_TSM1A103(F4D3R)_0603_1%

PC17

1

.22U_0805_16V7K_V2

2

PH1

PR33

3.32K_0603_1%

1

PC14 .1U_0603_50V4Z

2

PR31

16.9K_0603_1%

TM_REF1

1

PC18

1000P_0603_50V7K

2

84

3

+

2

-

PR34

100K_0603_1%

PR36 100K_0603_1%

PR28 47K_0603_1%

1

PU3A LM393M

VL

PH2 near main Battery CONN :

BAT. thermal protection at 84 degree C

Recovery at 45 degree C

PH2 10K_TSM1A103(F4D3R)_0603_1%

PR39 47K_0603_1%

1

PC19

.22U_0805_16V7K_V2

2

PR42

3.32K_0603_1%

PR40

16.9K_0603_1% TM_REF2

1

PC20

1000P_0603_50V7K

2

5

+

6

-

PR43 100K_0603_1%

7

PU3B LM393M

VL

PR25 47K_0603_1%

VLVL

PR38 47K_0603_1%

PR41

VL

100K_0603_1%

PD7

1SS355

PD11

1SS355

MAINPWON <5,37,40>

13

PQ4

100K

2

12

100K

DTC115EK

12

4 4

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

SCHEMATIC, M/B LA-1761

Size Do cum e nt Number R e v

B

Dat e : Sheet

期四三月

401248 2A

D

of

38 47¬P , 27, 2003

A

B

C

D

1 2

4700P_0603_50V7K

PC30

1 2

1000P_0603_50V7K

PC33

BATT+

Iadp=0~4.2A

PR44

.015_2512_1%

PR51 100K_0603_5%

PC27

10K_0603_5%

1K_0603_5%

PR60 10K_0603_5%

PR55

PR56

PU4 MB3887

1

-INC2

2

OUTC2

3

+INE2

4

-INE2

5

FB2

6

VREF

7

FB1

8

-INE1

9

+INE1

10

OUTC1

11

OUTD

12

-INC1

PR65

47.5K_0603_1%

FBM-L11-453215-900LMAT_1812

1 2

24

+INC2

23

GND

22

CS

21

VCC(o)

20

OUT

VCC

-INE3

FB3

CTL

+INC1

VH

RT

19

18

17

16

15

47K_0603_5%

14

13

PC28

.1U_0603_50V4Z

68K_0603_5%

PL3

CS

1 2

PR57

PR61

1

PC21

4.7U_1210_25V6K

2

PR50 0_0603_5%

PC24

1 2

.1U_0805_25V7K

PC31

1 2

.1U_0805_25V7K

PC32

1 2

1500P_0603_50V7K

4.2V

1

4.7U_1210_25V6K

2

.022U_0603_25V7K

PC25

ACON

PC22

1

PC23

4.7U_1210_25V6K

2

N18

PD13

RB051L-40

PR66 95K_0603_1%

B++

36

241

PQ8 SI4835DY

578

LXCHRG

PL4

22UH_SPC-1205P-220A

1 2

12

PD14 @RB051L-40

PQ7 SI4835DY

1 2 3 6

8 7

5

4

ACOFF#

PR47 10K_0603_5%

13

100K

2

100K

PQ9 DTC115EK

CC=0.56~2.7A CV=12.6V(9 CELLS LI-ION)

PR59

.02_2512_1%

PC34

1

4.7U_1210_25V6K

2

4.7U_1210_25V6K

PR48 47K_0603_5%

ACOFF <29>

PC36

PC35

1

4.7U_1210_25V6K

2

VIN

BATT+

PQ5

SI4835DY

VIN

1 1

PACIN<37,40>

ACON<37>

2 2

8 7

5

PR45 10K_0603_5%

ACOFF#

PACIN

3K_0603_5%

ACON

IREF=1.31*Icharge

PD12

1 2

1SS355

PR52

IREF=0.73~3.3V

P2

PQ6

SI4835DY

1

2

3 6

36

4

2

G

PR46 200K_0603_1%

PR49 150K_0603_1%

13

D

PQ10 2N7002

S

4

1

PC26

.1U_0603_16V7K

2

8 7

5

ADI_P<29,41>

PR54 10K_0603_1%

1

2

IREF<29>

PR58 205K_0603_1%

P3 B+

PR53

29.4K_0603_1%

PC29 .1U_0603_16V7K

1

+3VALWP

CS

PR64 47K_0603_5%

13

100K

FSTCHG<29>

3 3

2

PQ12 DTC115EK

100K

13

PQ11

100K

2

100K

DTC115EK

PR62

100K_0603_1%

.1U_0603_16V7K

2

VS

OVP voltage : LI-ION

9 CELL : 13.5V--> BATT_OVP= 1.5V

(BAT_OVP=0.1111 *VMB)

PU5A LM358A

BATT_OVP<29>

12

PC40

4 4

@0.1UF_16V

PR72

2.2K_0603_5%

1

.1U_0603_50V4Z

84

3

+

2

-

1

PC37

2

12

PR68 499K_0603_1%

PR73

105K_0603_0.5%

PR67

340K_1%

1

PC41 .01U_0603_50V7K

2

SDREF

PR70 0_0603_5%

PC39

10U_1206_10V4Z

+2.5V

PR69

PU5B

100K_0603_0.5%

LM358A

5

+

7

1

2

6

-

PR71

100K_0603_0.5%

1

PC38

.1U_0603_16V7K

2

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

SCHEMATIC, M/B LA-1761

Size Do cum e nt Number R e v

B

Dat e : Sheet

期四三月

401248 2A

D

of

39 47¬P , 27, 2003

A

B

C

D

1 1

N4

2

PC43 470P_0805_100V7K

PDH51

1

PQ14

1

D1

2

D1

3

G2

4

S2

SI4814DY

PR74 22_1206_5%

G1 S1/D2 S1/D2 S1/D2

FLYBACKSNB

8 7 6 5

1

2

+5V Ipeak = 6.66A ~ 10A

BST31

PC44

8 7 6 5

SUSP#<28,29,35,36,41>

PACIN<37,39>

PR188

1 2

PDH31

PDL3

CSH3

1 2

RB715F_SOT323

.1U_0805_25V7K

PR75 0_0603_5%

PLX3

PD44

3

270K_0603_5%

VS

PR85 47K_0603_5%

1

PC63 .047U_0603_16V7K

2

PDH3

PR81

1SS355

1

PC51 .1U_0805_25V7K

2

25 27 26

24

1 2

3 10 23

7 28

1

PC59 680P_0603_50V8J

2

47K_0603_1%

1

PC64 .047U_0603_16V7K

2

PD17

BST3 DH3 LX3

DL3

CSH3 CSL3 FB3 SKIP# SHDN#

TIME/ON5 RUN/ON3

PR88

VS

VL

1 2

22

V+

PU6

MAX1632

8

VL

2

3

DAP202U PD16

1

PC50

4.7U_1206_16V4Z

2

21

4

12OUT

VL

5

VDD

18

BST5

16

DH5

17

LX5

19

DL5

20

PGND

14

CSH5

13

CSL5

12

FB5

15

SEQ

9

REF

6

SYNC

11

RST#

GND

MAINPWON <5,37,38>

B+++

PL5

HCB4532K-800T90_9A

1 2

B+

1

2

SPC-1205P-100

+

1

4.7U_1210_25V6K

2

PL6

PD18

EP10QY03

PC46

12

PR78 .012_2512_1%

2 1

1

PC53 47P_0603_50V8J

2

PR77 1M_0603_1%

PR82

3.57K_0603_1%

SI4814DY

1

D1

2

D1

S1/D2

3

G2

S1/D2

4

S1/D2

S2

PQ13

1

2

PR84 10K_0603_1%

G1

100P_0603_50V8J PC57

PC45

4.7U_1210_25V6K

2 2

+3VALWP

12

+

PC55

PC56

150UF_D_6.3V_KO

3 3

+3.3V Ipeak = 6.66A ~ 10A

@47K_0603_5%

BST51

+12VALWP

1

2

PR86

0_0603_5%

PC52

4.7U_1206_16V4Z

1

PC58

4.7U_1206_16V4Z

2

.1U_0805_25V7K

2.5VREF

POK <43>

PC47

1 2

PDH5

PLX5

1

PC48

4.7U_1210_25V6K

2

10.5K_0603_1% PR83

B+++

1

2

PR76 0_0603_5%

PDL5

1

2

PR87 10K_0603_1%

PC49

4.7U_1210_25V6K

PC62 100P_0603_50V8J

1 2

12

PD15 EC11FS2

1 4

PT1

SDT-1205P-100

PC54 47P_0603_50V8J

PR79 2M_0603_5%

12

+

PC60

150UF_D_6.3V_KO

PC42

4.7U_1210_25V6K

3 2

CSH5

12

+

PC61

2 1

150UF_D_6.3V_KO

PR80 .012_2512_1%

PD19 EP10QY03

+5VALWP

4 4

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

SCHEMATIC, M/B LA-1761

Size Do cum e nt Number R e v

B

Dat e : Sheet

期四三月

401248 2A

D

of

40 47¬P , 27, 2003

A

B

+2.5VP

C

D

+5VALWP

12

PR95

13

100K

B

+2.5V +-5%

PR92 100_0603_5%

2.5VREF

PR98 100K_0603_5%

PQ20

DTC115EK

SYSON

2

PR192

200K_0603_1%

PR193

100K_0603_1%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+2.5VP

VL

12

+

PC67

VL

220UF_D_4V_FP

PR191

84.5K_0603_1%

+2.5VP

SUSP#<28,29,35,36,40>

SYSON <29,36>

PC79

4.7UF_ 1 206_25V

DTC115EK

SI3442DV

D

6 2

1

ADI_P <29,39>

PR90 0_1206_5%

1

10U_1210_16V4Z

2

D

S

PQ22 @2N7002

13

D

2

G

S

2.5VIN

PC68

2200P_0603_50V7K

PQ17 2SA1036K

PQ52 @2N7002

13

2

G

GA <37>

PD20 RB751V

HMBT2222A

1 2

PR94

1K_0603_5%

1

PC69

2

31

2

GB <37>

PR104 @309K_0603_1%

PR107 @100K_0603_5%

H_PROCHOT#<5>

PQ16

13

2

PR100 @36K_0603_5%

PU8B LM393M

7

1

PC83 @1U_1206_25V7K

2

A

PR93 10K_0603_5%

+

-

1 1

2 2

3 3

4 4

S

4 5

PQ15

3

SI3445DV

+5VALWP

PU8A LM393M

1

5 6

@100K_0603_5%

1

PC84 @1000P_0603_50V7K

2

13

D

S

G

PR105

D

6 2

1

84

+

-

PQ64 2N7002

2

G

12

1

PC71 .1U_0603_50V4Z

2

3 2

BATT+VIN

PR101 @1M_0603_0.5%

2.5VREF

1

PC150 1000P_0603_50V7K

2

LX2.5

PD21 RB051L-40

1

PC74 1000P_0603_50V7K

2

PQ18

DTC115EK

PR106

@226K_0603_1%

1M_0603_1%

SPC-1205P-4R7A

13

100K

PR190

PU9B

LM358

7

1000P_0603_50V7K

PL7

1

2

5

+

6

-

200K_0603_1%

2

PC82 @1U_0805_25V4Z

PC151

1

2

PQ21

G

1

2

PR97 100K_0603_5%

100K

2

100K

PQ19

S

45

3

PU9A

LM358

1

PC86

68PF

PR89 0_1206_5%

PR91 10_0603_5%

1.25VIN

PC70

4.7U_1206_16V4Z

13

84

3

+

2

-

1

PC65 .1U_0805_25V7K

2

PC77

1000P_0603_50V7K

+5VALWP

12

PC80

0.1UF_16V

PR110

5.1K

1 2

C

PC66

1 2

1

VCC1

2

PVDD1

PU7

3

VL1

CM8500

4

PGND1

5

AGND1

6

SD

7

VIN/2

VCC2

PVDD2

PGND2

AGND2

VFB

VCCQ

VL2

16

15

14

13

12

11

10

1

8

AGSEN

2

AGND

9

.1U_0805_25V7K

LX1.25

1

PC72

4.7U_1206_16V4Z

2

+2.5VP

1

PC76 .1U_0805_25V7K

2

5UH_SPC-06704

PC75

1 2

1000P_0603_50V7K

PL8

PR96

100K_0603_5%

PR99 1K_0603_5%

+1.25VSP

12

+

PC73

220UF_D_4V_FP

Layout : "Compensation network close to FB pin"

+1.25V+-5%

12

13

DTC115EK

100K

PR108

100K_1%

PQ23

+

2

0

5.1K PR103

PR102

1 2

PC81

220PF

PR109

100K_1%

0.01UF

PC85

1 2

+1.25VSP_VGA+1.5VS

PC78 47U_6.3V_M

2.5VREF

12

2.5VREF

SUSP <36,42>

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1761

Size Do cum e nt Number R e v

B

Dat e : Sheet

期四三月

401248 2A

D

of

41 47¬P , 27, 2003

5

4

3

2

1

PQ24 SI3445DV

D

D D

C C

10U_1206_10V4Z

B B

A A

PC93

+3VALWP

PR118 0_1206_5%

1

2

PQ30

2SA1036K

PR120

1 2

1K_0603_5%

1

2

31

+3VALWP

PD25 RB751V

PC94 4700P_0603_50V7K

2

PQ29

HMBT2222A

2

PR111

0_1206_5%

PQ28 SI3445DV

S

4 5

13

3

PR119 10K_0603_5%

1

PC88

4.7U_1206_16V4Z 2

PQ26 2SA1036K

D

6 2

1

G

7

PD22 RB751V

PR113

1 2

1K_0603_5%

1

PC89 2200P_0603_50V7K

2

31

2

PL10

5UH_SPC-06704

1 2

12

PD24 RB051L-40

PU10B

LM393M

5

+

6

-

PC95

.01U_0603_50V7K

1.5VIN

HMBT2222A

1

2

PQ25

13

2

+1.5V +/-5%

PR122

160K_0603_1%

PQ31 @DTC115EK

S

4 5

3

PR112 10K_0603_5%

1

PU10A

LM393M

511K_0603_0.5%

+1.5VALWP

12

+

PC92 150UF_D_6.3V_KO

13

100K

G

+5VALWP

84

+

-

2

6 2

1

2

3 2

PR116

LX1.5

PC90 .1U_0603_50V4Z

SUSP <36,41>

5UH_SPC-06704

1 2

12

PD23 RB051L-40

1

PC91

2

1000P_0603_50V7K

PR121

100K_0603_0.5%

PL9

PQ27

DTC115EK

2.5VREF

+1.8VSP

PR114 100_0603_5%

13

100K

2

100K

12

+

PC87

150UF_D_6.3V_KO

PR117

0_0603_5%

PR115 200K_0603_1%

2.5VREF

SUSP

+1.8V+-5%

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2

SCHEM A TI C, M/B LA-1761

Size Docum ent Number R e v

B

星期四三月

Date: Sheet

401248 2A

, 2003

1

of

42 47, 27

A

B

C

D

E

F

G

H

CPU_B+

PQ34

SI2301

2

PQ37

DTC115EK

PR142 10K_0603_5%

2

PR154 0_0603_5%

A

1 3

100K

+3VALWP+3VALWP

100K

1

2

PR124

2

10K_0603_5%

PR125 1K_0603_5%

13

CPU_VID[0..4]

PR143 10K_0603_5%

13

PQ47 DTC115EK

PC132

4.7U_1206_16V4Z

VR_ON<29,36>

+5VALWP

1 1

POK<40>

2 2

3 3

4 4

+3VALWP

CPU_VID[0..4]<5,7>

CPU_ON

VGATE<32>

100K

2

CPU_ON

+5VDRIVE

+5VALWP

+3VS

13

100K

12

1000P_0603_50V7K

PR155 0_0603_5%

CPU_VID0

CPU_VID1

CPU_VID2

CPU_VID3

CPU_VID4

1

2

PQ44 DTC115EK

N17

PC131

B

PR189

@0_0603_5%

PR130 0_0603_5%

PR132 0_0603_5%

PR133 0_0603_5%

PR135 0_0603_5%

PR137 0_0603_5%

PR138 10K_0603_5% PR139 0_0603_5%

PC117 2200P_0603_50V7K

PR145 137K_0603_1%

PU16

4

VIN

2

DELAY ERROR7CNOISE

8

ON/OFF#

SI91822DH-12-T1

2

1

18

PWM4

17

ISEN4

5

VID0

4

VID1

3

VID2

2

VID3

1

VID4

19

PGOOD

8

FS/DIS

PU12

HIP6301

VOUT

SENSE

GND

1000P_0603_50V7K

+5VALWP

PC103 .22U_0805_16V7K_V2

20

VCC

PWM1

ISEN1

PWM2

ISEN2

PWM3

ISEN3

VSEN

COMP

GND

9

@0_0603_5%

5 6 1

PC133

3

1

2

C

N24

N25

15

16

14

13

11

12

10

6

33P_0603_50V8J

7

FB

PR141

PC122

1500P_0603_50V7K

PR148 10K_0603_5%

PR149 3K_0603_1%

+1.2VPP

1

PC134

4.7U_1206_16V4Z

2

PC112

N5

N6

N7

1

2

1

2

PC100

4.7U_0805_10V4Z

1K_0603_1%

4.7U_0805_10V4Z

PR152 1K_0603_1%

PR127

PC109

4.7U_0805_10V4Z

PR134

PR146

+5VDRIVE

PD26

2 1

2

1

2

1

2

PC119

4.7U_0805_10V4Z

1

2

PC128

1

D

EP10QY03

BST

VCC4DRVH

2

IN

SW

3

DLY

DRVL

PGND

ADP3414

6

PU11

PC102 @220PF

+5VDRIVE

PD28

2 1

EP10QY03

BST

VCC4DRVH

2

IN

SW

3

DLY

DRVL

PGND

ADP3414

6

PU13

PC111 @220PF

+5VDRIVE

PD30

2 1

EP10QY03

4

BST

DRVH

VCC

2

IN

SW

3

DLY

DRVL

PGND

ADP3414

6

PU14

PC121 @220PF

+5VDRIVE

PD33

2 1

EP10QY03

4

BST

DRVH

VCC

2

IN

SW

3

DLY

DRVL

PGND

ADP3414

6

PU15

PC130 @220PF

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

N22

2

PC97 .1U_0805_25V7K

1

N26

8 7 5

N23

N19

1

N8

8 7 5

N10

N20

1

N11

8 7 5

N13

N21

2

1

1 8

7

N16

5

220P_0603_50V8J

2

PC106 .1U_0805_25V7K

1

220P_0603_50V8J

2

PC118 .1U_0805_25V7K

1

68_0805_5%

220P_0603_50V8J

PC127 .1U_0805_25V7K

PR150

2.4_0603_1%

220P_0603_50V8J

E

68_0805_5%

PR123

2.4_0603_1%

PR126

68_0805_5%

PC101

PR129

2.4_0603_1%

PR131

68_0805_5%

PC110

PR140

2.4_0603_1%

PR144

PC120

N15

PR151

PC129

PQ32

IRF7811A

N27

1

2

PQ38

IRF7811A

N9

1

2

PQ42

IRF7811A

N12

1

2

PQ48

IRF7811A

1

2

D8D7D6D

S1S3G

S

2

D8D7D6D

PQ35

S1S3G

S

2

D8D7D6D

S1S3G

S

2

D8D7D6D

PQ40

S1S3G

S

2

D8D7D6D

S1S3G

S

2

D8D7D6D

PQ45

S1S3G

S

2

D8D7D6D

S1S3G

S

2

D8D7D6D

PQ50

S1S3G

S

2

5

4

5

SI4362

4

5

4

5

SI4362

4

5

4

5

SI4362

4

5

4

5

SI4362

4

5

IRF7811A

D8D7D6D

PQ33

S1S3G

2

D8D7D6D

PQ36

S1S3G

2

D8D7D6D

PQ39

S1S3G

2

D8D7D6D

PQ41

S1S3G

2

D8D7D6D

S1S3G

2

D8D7D6D

PQ46

S1S3G

2

D8D7D6D

S1S3G

2

D8D7D6D

PQ51

S1S3G

2

F

S

4

5

S

SI4362

4

5

S

4

5

S

SI4362

4

5

S

4

5

S

SI4362

4

5

S

4

5

S

SI4362

4

4.7U_1210_25V6K

2

PC98

4.7U_1210_25V6K 1

12

PD27

IRF7811A

4.7U_1210_25V6K

2

PC107

4.7U_1210_25V6K 1

12

PD29

CPU_B+

PC113

4.7U_1210_25V6K

PQ43 IRF7811A

12

PD31

4.7U_1210_25V6K PQ49 IRF7811A

12

PD34

2

PC99

1

PR128 2K_0603_1%

EC31QS04

CPU_B+

2

PC108

1

PR136 2K_0603_1%

EC31QS04

2

PC114

1

4.7U_1210_25V6K

EC31QS04

CPU_B+

2 PC123

1

4.7U_1210_25V6K

PR153 2K_0603_1%

EC31QS04

2

12

PC96 1

4.7U_1210_25V6K

12

PL12

0.6UH_HK_AE26A 0R6

CPU_B+

PC104

100UF_EC_25V

12

2

+

PC105 1

4.7U_1210_25V6K

12

PL14

0.6UH_HK_AE26A 0R6

4.7U_1210_25V6K

2

PC115

1

100UF_EC_25V

PL15

0.6UH_HK_AE26A 0R6

PR147 2K_0603_1%

2 PC124

1

0.6UH_HK_AE26A 0R6

12

CPU_B+

2 PC125

4.7U_1210_25V6K 1

PL16

12

Compal Electronics, Inc.

Title

SCHEM A T IC, M/B LA-1761

Size Doc ument Number Re v

B

Date: Sheet

星期四三月

G

PC135

0.01UF_50V

12

CPU_B+

12 PC116

+

12

27, 2003

12

PC137

0.01UF_50V

12

0.01UF_50V

+CPU_CORE

PC139

0.01UF_50V

CPU-CORE

PL11

1 2

HCB4532K-800T90_9A

PC136

0.01UF_50V

PC138

12

PD32

EC31QS04

12

PC140

0.01UF_50V

401248 2A

B+

of

43 47,

H

A

1 1

2 2

B

C

D

3 3

4 4

A

B

C

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Inc.

Title

SCHEM A T IC, M/B LA-1761

Size Document Number Re v

B

401248 2A

Date: Sheet

星期四三月

27, 2003

D

of

44 47,

10

9

8

7

6

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 1

H H

Reason for change PAGE Modify List M.B Ver.Fixed IssueItem

1

improve CPU core voltage drop

43 change PR149 from 3.9K_0603_1% to 3K_0603_1%

0.2

2

G G

F F

E E

D D

delete second battery component

38,44 delete PC142 , add PC16

0.2

C C

B B

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

10

9

8

7

6

5

4

3

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1761

Size Doc ument Number Re v

401248

Custom

星期四三月

Date: Sheet

27, 2003

2

of

45 47,

1

2A

10

9

8

7

6

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 2

H H

Reason for change PA GE Modify ListFixed IssueItem

1 Delete useless components 5 Delete Q7, Q8, Q11, R104, R116 and R117

2 4 Del ete C43 and C48

17 Delete D39

M.B. Ver.

0.2

2

G G

3

Change BIOS ROM type

Separa te CD- ROM L ED fr om Media LED 1 9 Delete U26 a nd C417, ADD R247 0.2

3 0 Del ete U40, A dd U41

0.2

Delete second battery circuit 29 Delete C336; Pin 55, 82, 88, 156 of U42 change to be NC pin 0. 34

For WNC wireless lan car d only5 3 4 Reserve R505 (un-populate) 0.3

F F

E E

D D

2.0Add R506176 Solve USB fail i ssue

C C

B B

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

10

9

8

7

6

5

4

3

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1761

Size Doc ument Number Re v

401248

Custom

星期四三月

Date: Sheet

27, 2003

2

of

46 47,

1

2A

10

9

8

7

6

5

4

3

2

1

Version change list (P.I.R. List) Page 2 of 2

H H

G G

F F

E E

D D

C C

B B

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

10

9

8

7

6

5

4

3

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1761

Size Doc ument Number Re v

401248

Custom

星期四三月

Date: Sheet

27, 2003

2

of

47 47,

1

2A

Compal LA-1761 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual