COMPAL LA-1731 Schematics

A
1 1
B
C
D
E
Manchester 200Z LA-1731 REV 1.0 Schematics Document
2 2
Intel Pentium 4 Processor it t he 478-pin Package with 845PE / ICH4 chipset
3 3
4 4
Compal Electronics, Ltd.
Title
Cover Sheet
Size Do cum e nt Number R e v
B
LA1731
A
B
C
D
Dat e : Sheet
期二 十二月
146¬P , 31, 2002
E
of
COMPAL CONFIDENTIAL
MODEL NAME : Manchester 200Z LA-1731
REV:0.1
VGA DDR
CH-A
PAGE 17
VGA DDR
CH-B
PAGE 18
INTERNAL IDE
IDE/CD /FDD
PAGE 29
USB X 3
LPT PORT
Direct CD Play
PAGE 28
PAGE 30
PAGE 32
CRT & TV-OUT & LVDS
PAGE 19
VGA Con troller
nVIDIA NV17M_Pro
PIRQA#
PAGE 1 3, 14,15,16
HUB Link
ICH4
FUNC 0: LAN, HUB-TO-PCI , PCI-TO-LPC BRIDGE FUNC 1: IDE Controller
FUNC 2: USB Controller #1 FUNC 3: POWER MANAGEMENT FUNC 4: USB Controller #2 FUNC 5: AC97 Audio Controller FUNC 5: AC97 Modem Controller
LPC
SIO
LPC 47 N227
PAGE 31
KB/PS2 Interface
Wireless Keyboard/Mouse
LED Board Conn.
PAGE 36
AGP BUS
PCI BUS
PAGE 2 0,21,22
LPC
EC/KBC
PC87591
PAGE 33
BIOS
EC BUFFER
PAGE 34
PROPRIETARY NOTE
1394 Controller
AC LINK
Audio Board
FIR/SIR Interface
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
TAB43AB22
MDC Connector
PAGE 35
LED Board Conn.
Northwood uFCBGA /u FCPGA CPU
PSB
Brookdale-PE MCH
Host-HUB Bridge
IDSEL: AD16 MASTER 0 PIRQA#
PAGE 25
PAGE 35
PAGE 35
IDSEL: AD11
CARDBUS
PCMCIA SOCKET
PAGE 4,5
PAGE 6,7,8
OZ6933
MEMORY BUS
IDSEL: AD20 MASTER 2 PIRQA#, PIRQB# SIRQ
PAGE 23
PAGE 24
DDR SODIMM X2
-BANK 0,1,2,3
IDSEL: AD17 MASTER 3 PIRQB#
LAN Controller
RTL8100BL
PAGE 26
Title
Size Do cum e nt Number R e v
Dat e : Sheet
PAGE 9, 10,11
Mini PCI Connector
DC/DC POWER
+1.2VP POWER +1.25VS POWER +1.5VS POWER +1.8VALW POWER +2.5V POWER +3VA L W POWER +5VA L W POWER +12VALW POWER CPU_CORE POWER POWER THR OTTLING
PAGE 3 9, 40 ,4 1, 42,43,44. 45
Compal Electronics, Inc.
ATR80 COVER SHEET
B
LA1731
期二 十二月
CLOCK
W320-04
PAGE 12
Reset Circuit
PAGE 38
POWER INTERFACE
PAGE 37
IDSEL: AD18 MASTER 1 PIRQC#, PIRQD#
PAGE 27
of
246¬P , 31, 2002
1.0
A
B
C
D
E
Voltage Rails
Power Plane Description
1 1
2 2
VIN B+ +CPU_VCC +1.2VP +1.25VS 1.25V switched power rail
+1.8VALW 1.8V power rail ON ON +1.8VS +2.5V +2.5VS 2.5V switched power rail +3VALW +3V +3VS +5VALW +5V +5VS
RTCVCC
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Adapte r power supply (19V) AC or battery power rail for power circuit. Core voltage for CPU
1.2V switched power rail for CPU AGTL Bus
AGP 4X ON OFF OFF+1.5VS
1.8V switched power rail
2.5V power rail
3.3V always on power rail
3.3V power rail
3.3V switched power rail 5V always on power rail 5V power rail 5V switched power rail 12V always on power rail RTC power
S1 S3 S5
N/A N/A N/A
N/AN/AN/A ON OFF ON OFF ON OFF O FF
ON ON ON ON ON ON ON ON ON ON ON+12VALW ON ON ONON
OFF
OFF
ON*
OFF
OFF
OFF
ON
OFF
OFF ON ON*
OFF
ON OFF
OFF
ON
ON*
OFF
OFF
OFF
ON
ON*
ON
ON
Board I D Ta ble f or AD c hanne l
Vcc 3.3V +/- 5%
Board ID
0 1 2 3 4 5 6 7 NC
Board ID
100K +/- 5%Ra
8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%
0 1 2 3 4
Rb V min
AD_BID
0
0.216 V 0.250 V 0.289 V
0.436 V
0.712 V
1.036 V
1.453 V 1.650 V 1.759 V
1.935 V
2.500 V
PCB Revision
0.1
1.0
0 V
Vtyp
AD_BID
V
AD_BID
0 V 0 V
0.503 V
0.819 V
0.538 V
0.875 V
1.185 V 1.264 V
2.200 V
3.300 V
2.341 V
3.300 V
max
5
External PCI Devices
Device IDSEL# REQ# / G NT # Interrupts
VGA
CardBus
LAN
Mini-PCI
1394
AD20
AD17
AD18 AD16 0
2
3PIRQB
1/4
PIRQA PIRQ A/PI RQB
PIRQC/PIRQD PIRQA
6 7
3 3
EC SM Bus1 address
Device
Smart Battery EEPROM( 24C16/ 02)
(24C04)
Address Address
0001 011X b 1010 000X b 1011 000Xb
EC SM Bus2 address
Device
MAX 1617M EE OZ163 Smart Battery Docking DOT Board
1001 110X b 0011 0100 b 0001 011X b 0011 011X b XXXX XXXXb
ICH4 SM Bus address
Device
4 4
Clock Generator ( ICS9508-10)
A
Address
1101 001X
Compal Electronics, Ltd.
Title
Notes & PIR
Size Do cum e nt Number R e v
B
LA1731
B
C
D
Dat e : Sheet
期二 十二月
346¬P , 31, 2002
E
of
A
+CPU_VCC
R362 51_0603_1%
1 2
R412 56 R383 300_0603_1% R388 200_0603_1% R356 56
4 4
RP41
1 8 2 7 3 6 4 5
8P4R-1.5K
CPURST# FERR#
CPU_PW RGD
BREQ0# IERR#
ITP_TMS ITP_TRST# ITP_TCK ITP_TDI
HA#[3..31]6
HA#[3..31]
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
W1
W2
AB1
HREQ#06 HREQ#16
3 3
+CPU_VCC
+3VS
1 2
R349 150
00 01 10 11
BPM0# BPM1# BPM2# BPM3# BPM4# BPM5#
ITP_DBRESET#
1 2
R638 0
+CPU_VCC
100MHZ 133MHZ RESERVED RESERVED
A
R317 51_0603_1% R318 51_0603_1% R345 51_0603_1% R319 51_0603_1% R346 51_0603_1% R347 51_0603_1%
2 2
POW ER_THROTTLING33,45
1 1
SELPSB[1:0] STSEM BUS FREQUENCY
HREQ#26 HREQ#36 HREQ#46
ADSTB0#6 ADSTB1#6
ADS#6
BNR#6
BREQ0#6
BPRI#6
HLOCK#6
HIT#6
HITM#6
DEFER#6
DRDY#6
CPURST#6
HTRDY#6
RS#06 RS#16 RS#26
P_THROTTLING#
R92 62_0603_1%
H_BSEL07,12 H_BSEL112
DBSY#6
ITP_DBRESET#21
CPU_PWRGD20
CPUSLP#20
IERR#
BREQ0#
CPURST#
BPM0# BPM1# BPM2# BPM3# BPM4# BPM5#
1 2
R348 33
ITP_TDI ITP_TMS ITP_TRST# ITP_TCK
P_THROTTLING# BSEL0
ITP_DBRESET# CPU_PW RGD
CPUSLP#
THERMDA THERMDC THERMTRIP#
AC1 AA3 AC3
K25 K26 L25
AB25
AB2 AC6
AB5 AC4
AA5 AB4
AF26
AD6
AD5 AE25 AB23
AB26
J26
K2 K4 L6 K1 L3
M6
L2 M3 M4 N1 M1 N2 N4 N5
T1 R2
P3
P4 R3
T2 U1
P6 U3
T4
V2 R6
T5 U4
V3
Y1
J1
K5
J4 J3
H3
L5 R5
G1
V5
G2
H6
D2
G4
F3
E3
E2 H2
V6
J6 F1 G5 F4
Y6
D5 C1 F7 E6 D4 C3
H5
B3 C4 A2
U28A
A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# A32# A33# A34# A35#
REQ0# REQ1# REQ2# REQ3# REQ4#
ADSTB0# ADSTB1#
ADS# AP0# AP1# BINIT# BNR# IERR# DP0# DP1# DP2# DP3# BREQ0# BPRI# LOCK# HIT# HITM# DEFER# DRDY# MCERR# RESET# TRDY# RS0# RS1# RS2# RSP#
BPM0# BPM1# BPM2# BPM3# BPM4# BPM5#
SKTOCC# TDO TDI TMS TRST# TCK PROCHOT#
BSEL0 BSEL1 DBSY# DBR#
PWRGOOD SLP#
THERMDA THERMDC THERMTRIP#
mPGA478
B
ADDR GROUP
CONTROL GROUP
THERMAL DIODE
B
Northwood
MISC
PROPRIETARY NOTE
DATA GROUP
HOST CLK
LEGACY CPU
D0# D1# D2# D3# D4# D5# D6# D7# D8#
D9# D10# D11# D12# D13# D14# D15# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63#
DBI0# DBI1# DBI2# DBI3#
DSTBN0# DSTBN1# DSTBN2# DSTBN3# DSTBP0# DSTBP1# DSTBP2# DSTBP3#
BCLK0 BCLK1
ITPCLK0 ITPCLK1
A20M# FERR#
IGNNE#
INTR/LINT0
NMI/LINT1
INIT#
STPCLK#
SMI#
B21 B22 A23 A25 C21 D22 B24 C23 C24 B25 G22 H21 C26 D23 J21 D25 H22 E24 G23 F23 F24 E25 F26 D26 L21 G26 H24 M21 L22 J24 K23 H25 M23 N22 P21 M24 N23 M26 N26 N25 R21 P24 R25 R24 T26 T25 T22 T23 U26 U24 U23 V25 U21 V22 V24 W26 Y26 W25 Y23 Y24 Y21 AA25 AA22 AA24
E21 G25 P26 V21
E22 K22 R22 W22 F21 J23 P23 W23
AF22 AF23
AC26 AD26
C6 B6 B2 D1 E5
W5 Y4 B5
C
HD#[0..63]
HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63
A20M# FERR# IGNNE# INTR NMI
HD#[0..63] 6
DBI0# 6 DBI1# 6 DBI2# 6 DBI3# 6
DSTBN0# 6 DSTBN1# 6 DSTBN2# 6 DSTBN3# 6 DSTBP0# 6 DSTBP1# 6 DSTBP2# 6 DSTBP3# 6
CLK_HCLK 12 CLK_HCLK# 12
CLK_ITP_BCLK 12 CLK_ITP_BCLK# 12
A20M# 20 FERR# 20 IGNNE# 20 INTR 20 NMI 20
CPUINIT# 20 STPCLK# 20 SMI# 20
+5VS
12
C240 2200PF
R123 1K
1 2
12
THERMDA THERMDC
C241 .1UF_X5R
THERMTRIP#
D
1617VCC
U7
1
NC
2
VCC
3
DXP
4 5 6 7 8
SMBCLK DXN NC
SMBDATA ADD1 GND GND
MAX1617/MAX6654/1618D
+CPU_VCC
12
R418 @56
3
Q50 @2SC2411K
1 2
R625 0
PAD3
1
EMI PAD-4.5X3.2
PAD8
1
EMI PAD-4.5X3.2
STBY
ALERT
ADD0
12
2
NC
NC
NC
R421 @470
CBE
1
16 15 14 13 12 11 10 9
EMI PAD-4.5X3.2
EMI PAD-4.5X3.2
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Title
Size Do cum e nt Number R e v
Dat e : Sheet
E
+5VS
12
R122 200
EC_SMC2 28,33
12
R121 1K
1
1
EC_SMD2 28,33
PAD4
1
EMI PAD-4.5X3.2
PAD6
1
EMI PAD-4.5X3.2
ATF#
+5VS
MAINPWON 39,41,43
ICH_THRMTRIP# 21
PAD2
PAD9
Pentium 4/Northwood Processor in mPGA478
B
LA1731
期二 十二月
E
PAD7
EMI PAD-4.5X3.2
PAD5
EMI PAD-4.5X3.2
of
446¬P , 31, 2002
1
1
A
+CPU_VCC
1 2
L28
4.7UH_0805
1 2
L27
4.7UH_0805
4 4
TESTHI0 TESTHI1 TESTHI2 TESTHI3
+CPU_VCC
TESTHI8 TESTHI9 TESTHI10 TESTHI11
+CPU_VCC
+CPU_VCC
3 3
R393
49.9_1%_0603
1 2
100_1%_0603
1 2
+CPU_VCC
1 2
2 2
100_1%_0603
1 2
1 1
CPU_GTLREF
R386
R377
49.9_1%_0603
H_GTLREF
R382
1 2 3 4 5
1 2 3 4 5
12
12
RP40
10P8R-4.7K RP38
10P8R-4.7K
C440 1UF_0603
C455 1UF_0603
C369 150U_D
12
C471 220PF
12
C472 220PF
A
C379
+
150U_D
+
10
TESTHI7
9
TESTHI6
8
TESTHI5
7
TESTHI4
6
10 9 8 7
TESTHI12
6
12
C433 220PF
12
C434 220PF
1 2
R385 51.1_1%_0603
1 2
R68 51.1_1%_0603
+1.2VP
+VCCA
VSSA
VCCIOPLL
+CPU_VCC
+CPU_VCC
CPU_GTLREF H_GTLREF
12
C395
1UF_0603
+CPU_VCC
TESTHI0 TESTHI1 TESTHI2 TESTHI3 TESTHI4 TESTHI5 TESTHI6 TESTHI7 TESTHI8 TESTHI9 TESTHI10 TESTHI11 TESTHI12
COMP0 COMP1
R354 @0
U28B
AD20
VCCA
AD22
VSSA
AE23
VCCIOPLL
A5
VCCSENSE
A4
VSSSENSE
A10
VCC
A12
VCC
A14
VCC
A16
VCC
A18
VCC
A20
VCC
A8
VCC
AA10
VCC
AA12
VCC
AA14
VCC
AA16
VCC
AA18
VCC
AA8
VCC
AB11
VCC
AB13
VCC
AB15
VCC
AB17
VCC
AB19
VCC
AB7
VCC
AB9
VCC
AC10
VCC
AC12
VCC
AC14
VCC
AC16
VCC
AC18
VCC
AC8
VCC
AD11
VCC
AD13
VCC
AD15
VCC
AD17
VCC
AD19
VCC
AD7
VCC
AD9
VCC
AE10
VCC
AE12
VCC
AE14
VCC
AE16
VCC
AE18
VCC
AE20
VCC
AE6
VCC
AE8
VCC
AF11
VCC
AF13
VCC
AF15
VCC
AF17
VCC
AF19
VCC
AF2
VCC
AF21
VCC
AF5
VCC
AF7
VCC
AD24
TESTHI0
AA2
TESTHI1
AC21
TESTHI2
AC20
TESTHI3
AC24
TESTHI4
AC23
TESTHI5
AA20
TESTHI6
AB22
TESTHI7
U6
TESTHI8
W4
TESTHI9
Y3
TESTHI10
A6
TESTHI11
AD25
TESTHI12
AA21
GTLREF
AA6
GTLREF
F20
GTLREF
F6
GTLREF
L24
COMP0
P1
COMP1
A22
RSVD
A7
RSVD
AD2
RSVD
AD3
RSVD
AE21
RSVD
AF3
12
RSVD
AF24
RSVD
AF25
RSVD
mPGA478
B
PLL ANALOG VOLTAGE
Northwood
POWER, GROUND, RESERVED SIGNALS
B
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
D10 A11 A13 A15 A17 A19 A21 A24 A26 A3 A9 AA1 AA11 AA13 AA15 AA17 AA19 AA23 AA26 AA4 AA7 AA9 AB10 AB12 AB14 AB16 AB18 AB20 AB21 AB24 AB3 AB6 AB8 AC11 AC13 AC15 AC17 AC19 AC2 AC22 AC25 AC5 AC7 AC9 AD1 AD10 AD12 AD14 AD16 AD18 AD21 AD23 AD4 AD8 AE11 AE13 AE15 AE17 AE19 AE22 AE24 AE26 AE7 AE9 AF1 AF10 AF12 AF14 AF16 AF18 AF20 AF6 AF8 B10 B12 B14 B16 B18 B20 B23 B26 B4 B8 C11 C13 C15 C17 C19 C2 C22 C25 C5 C7 C9 D12 D14 D16 D18 D20 D21 D24 D3
+CPU_VCC
12
+CPU_VCC
12
+CPU_VCC
12
+CPU_VCC
12
C103
10UF_1206
+CPU_VCC
12
C106
10UF_1206
+CPU_VCC
12
C114
10UF_1206
+CPU_VCC
12
C84 10UF_1206
+CPU_VCC
12
C436
10UF_1206
+CPU_VCC
12
C411
10UF_1206
+CPU_VCC
+
+CPU_VCC
+
C396 .1UF_X5R
C399 .1UF_X5R
C131 1UF_0603
C507 470U_E
2.5V
C373 470U_E
2.5V
12
C397 .1UF_X5R
12
C427 .1UF_X5R
12
C142 1UF_0603
12
C104
10UF_1206
12
C170
10UF_1206
12
C129
10UF_1206
12
C115
10UF_1206
12
C443
10UF_1206
12
C437
10UF_1206
+
C523
470U_E
2.5V
+
C378 470U_E
2.5V
C
12
C398 .1UF_X5R
12
C428 .1UF_X5R
12
C143 1UF_0603
12
C105
10UF_1206
12
C171
10UF_1206
12
C405
10UF_1206
12
C130
10UF_1206
12
C459
10UF_1206
12
C444
10UF_1206
+
470U_E
2.5V
+
470U_E
2.5V
C
C511
C376
12
12
12
C172
10UF_1206
12
C160
10UF_1206
12
C150
10UF_1206
12
C465
10UF_1206
12
C461
10UF_1206
PROPRIETARY NOTE
C429 .1UF_X5R
C132 1UF_0603
12
C173
10UF_1206
12
C184
10UF_1206
12
C169
10UF_1206
12
C480
10UF_1206
12
C466
10UF_1206
+
C510
470U_E
2.5V
+
C375
470U_E
2.5V
12
C430 .1UF_X5R
12
C387 1UF_0603
12
C66
10UF_1206
12
C209
10UF_1206
12
C188
10UF_1206
12
C483
10UF_1206
12
C408
10UF_1206
+
C509
330U_E
2.5V
+
C374 470U_E
2.5V
+CPU_VCC
C432 .1UF_X5R
C388 1UF_0603
+1.2VP
12
+
C533
470U_E
2.5V
C381 1UF_0603
D
CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4
+
C508
470U_E
2.5V
AF9 B11 B13 B15 B17 B19
B7
B9 C10 C12 C14 C16 C18 C20
C8 D11 D13 D15 D17 D19
D7
D9 E10 E12 E14 E16 E18 E20
E8
F11 F13 F15 F17 F19
AE5 AE4 AE3 AE2 AE1
AF4
Y5 Y25 Y22
Y2
W6
W3 W24 W21
V4 V26 V23
V1
U5 U25 U22
+
C522
470U_E
2.5V
F9
U28C
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
VID0 VID1 VID2 VID3 VID4
VCCVID
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
mPGA478
Northwood
POWER, GROUND AND NC
+
C512
330U_E
2.5V
VID[0..4]44
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
12
12
12
10UF_1206
12
10UF_1206
12
10UF_1206
12
10UF_1206
12
10UF_1206
C431 .1UF_X5R
C389 1UF_0603
C83
C67
C211
C489
C400
+
C534
470U_E
2.5V
+
C377 330U_E
2.5V
12
12
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
E
D6 D8 E1 E11 E13 E15 E17 E19 E23 E26 E4 E7 E9 F10 F12 F14 F16 F18 F2 F22 F25 F5 F8 G21 G24 G3 G6 H1 H23 H26 H4 J2 J22 J25 J5 K21 K24 K3 K6 L1 L23 L26 L4 M2 M22 M25 M5 N21 N24 N3 N6 P2 P22 P25 P5 R1 R23 R26 R4 T21 T24 T3 T6 U2
CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3
CPU_VID4
CPU_VID[0..4]
RP39
1 8 2 7 3 6 4 5
8P4R-1K
R344 1K
+3VS
12
Compal Electronics, Inc.
Title
Pentium 4/Northwood Processor in mPGA478
Size Do cum e nt Number R e v
B
LA1731
Dat e : Sheet
D
期二 十二月
546¬P , 31, 2002
E
of
5
HD#[0..63]4 HA#[3..31]4
D D
C C
B B
DSTBP0#4 DSTBP1#4 DSTBP2#4 DSTBP3#4 DSTBN0#4 DSTBN1#4 DSTBN2#4 DSTBN3#4
CPURST#4
CLK_GHT12
CLK_GHT#12
+CPU_VCC
HD#[0..63] HA#[3..31]
HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63
MCH_GTLREF
U23A
BROOKDALE-GL/PE
T30
HD#0
R33
HD#1
R34
HD#2
N34
HD#3
R31
HD#4
L33
HD#5
L36
HD#6
P35
HD#7
J36
HD#8
K34
HD#9
K36
HD#10
M30
HD#11
M35
HD#12
L34
HD#13
K35
HD#14
H36
HD#15
G34
HD#16
G36
HD#17
J33
HD#18
D35
HD#19
F36
HD#20
F34
HD#21
E36
HD#22
H34
HD#23
F35
HD#24
D36
HD#25
H35
HD#26
E33
HD#27
E34
HD#28
B35
HD#29
G31
HD#30
C36
HD#31
D33
HD#32
D30
HD#33
D29
HD#34
E31
HD#35
D32
HD#36
C34
HD#37
B34
HD#38
D31
HD#39
G29
HD#40
C32
HD#41
B31
HD#42
B32
HD#43
B30
HD#44
B29
HD#45
E27
HD#46
C28
HD#47
B27
HD#48
D26
HD#49
D28
HD#50
B26
HD#51
G27
HD#52
H26
HD#53
B25
HD#54
C24
HD#55
B23
HD#56
B24
HD#57
E23
HD#58
C22
HD#59
G25
HD#60
B22
HD#61
D24
HD#62
G23
HD#63
L31
HDSTBP0#
J34
HDSTBP1#
E29
HDSTBP2#
E25
HDSTBP3#
N31
HDSTBN0#
G33
HDSTBN1#
C30
HDSTBN2#
D25
HDSTBN3#
D22
CPURST#
K30
HCLK
J31
HCLK#
D27
HD_VREF2
H24
HD_VREF1
H30
HD_VREF0
AD30
HA_VREF
P30
HCC_VREF
BROOKDALE-GL/PE_760P
HOST,HUB
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8
HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
HADSTB0# HADSTB1#
HIT#
HITM#
ADS# BNR#
BPRI#
BREQ0#
DBSY#
DEFER#
DRDY# HTRDY# HLOCK#
DINV3 DINV2 DINV1 DINV0
HREQ0# HREQ1# HREQ2# HREQ3# HREQ4#
HI10
HI_STBS HI_STBF
RS2# RS1# RS0#
HX_RCOMP HY_RCOMP
HX_SWING HY_SWING
HI_VREF
HI_RCOMP
HI_SWING
12
R54
A A
49.9_0603_1%
R55
100_0603_1%
12
10 mil Trace, 7mil Space
MCH_GTLREF
1
C176
0.1U_X5R
2
1
C118
0.1U_X5R
2
1
C76
0.1U_X5R
2
1
C71
0.1U_X5R
2
1
C78
0.1U_X5R
2
NEAR MCH
5
HI9 HI8 HI7 HI6 HI5 HI4 HI3 HI2 HI1 HI0
4
HUB_PD[0..10]
W31 AA33 AB30 V34 Y36 AC33 Y35 AA36 AC34 AB34 Y34 AB36 AC36 AC31 AF35 AD36 AD35 AE34 AD34 AE36 AF36 AE33 AF34 AG34 AG36 AE31 AH35 AG33 AG31
AB35 AF30
P36 M36 T36 T34 M34 U33 U31 N36 U36 V30 T35
C26 B33 C35 N33
V36 AA31 W33 AA34 W35
HUB_PD10
AF2
HUB_PD9
AE2
HUB_PD8
AF3
HUB_PD7
AE5
HUB_PD6
AE4
HUB_PD5
AF4
HUB_PD4
AD8
HUB_PD3
AC5
HUB_PD2
AC7
HUB_PD1
AB8
HUB_PD0
AA7 AD4
AC4
RS2#
P34
RS1#
U34
RS0#
R36
HX_RCOMP
B28
HY_RCOMP
V35
MCH_XY_SWING
H28 Y30
MCH_HUB_VREF
AD3
HI_RCOMP
AC2
MCH_HUB_VSW ING
AD2
4
HUB_PD[0..10] 20 DDR_SDQS[0..7] 9
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
ADSTB0# 4 ADSTB1# 4
HIT# 4 HITM# 4 ADS# 4 BNR# 4 BPRI# 4 BREQ0# 4 DBSY# 4 DEFER# 4 DRDY# 4 HTRDY# 4 HLOCK# 4
DBI3# 4 DBI2# 4 DBI1# 4
HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4
Close to H28 Close to Y30
Layout note :
1. HX _R COM P , HY_RCOMP T race width 10 mil.
2. Terminator Max 500 mil .
DBI0# 4
HREQ#0 4 HREQ#1 4 HREQ#2 4 HREQ#3 4 HREQ#4 4
HUB_PSTRB 20 HUB_PSTRB# 20
RS#2 4 RS#1 4 RS#0 4
10 mil
1 2
10 mil
1 2
68.1_0603_1%
10 mil Trace, 7mil Space
MCH_XY_SWING
12
C77
0.1U_X5R
PROPRIETARY NOTE
R341
24.9_0603_1%
1 2
R384
24.9_0603_1%
R390
+1.5VS
12
C149
0.1U_X5R
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
DDR_SMA[0..12]9 DDR_SDQ[0..63]9
DDR_CLK#29
DDR_CLK29
DDR_CLK#19
DDR_CLK19
DDR_SDQ0 DDR_SDQ1 DDR_SDQ2 DDR_SDQ3 DDR_SDQ4 DDR_SDQ5 DDR_SDQ6 DDR_SDQ7 DDR_SDQ8 DDR_SDQ9 DDR_SDQ10 DDR_SDQ11 DDR_SDQ12 DDR_SDQ13 DDR_SDQ14 DDR_SDQ15 DDR_SDQ16 DDR_SDQ17 DDR_SDQ18 DDR_SDQ19 DDR_SDQ20 DDR_SDQ21 DDR_SDQ22 DDR_SDQ23 DDR_SDQ24 DDR_SDQ25 DDR_SDQ26 DDR_SDQ27 DDR_SDQ28 DDR_SDQ29 DDR_SDQ30 DDR_SDQ31 DDR_SDQ32 DDR_SDQ33 DDR_SDQ34 DDR_SDQ35 DDR_SDQ36 DDR_SDQ37 DDR_SDQ38 DDR_SDQ39 DDR_SDQ40 DDR_SDQ41 DDR_SDQ42 DDR_SDQ43 DDR_SDQ44 DDR_SDQ45 DDR_SDQ46 DDR_SDQ47 DDR_SDQ48 DDR_SDQ49 DDR_SDQ50 DDR_SDQ51 DDR_SDQ52 DDR_SDQ53 DDR_SDQ54 DDR_SDQ55 DDR_SDQ56 DDR_SDQ57 DDR_SDQ58 DDR_SDQ59 DDR_SDQ60 DDR_SDQ61 DDR_SDQ62 DDR_SDQ63
12
C151
0.01U
R61 301_0603_1%
1 2
R74 150_0603_1%
1 2
AN4 AP2 AT3 AP5 AN2 AP3 AR4 AT4 AT5 AR6 AT9
AR10
AT6 AP6 AT8 AP8
AP10
AT11 AT13 AT14
AT10 AR12 AR14 AP14
AT15 AP16
AT18
AT19 AR16
AT16 AP18 AR20 AR22 AP22 AP24
AT26
AT22
AT23
AT25 AR26 AP26
AT28 AR30 AP30
AT27 AR28
AT30
AT31 AR32
AT32 AR36 AP35 AP32
AT33 AP34
AT35 AN36 AM36 AK36
AJ36 AP36 AM35 AK35 AK34
DDR_SMA[0..12]
DDR_SDQ[0..63]
U23B
SDQ_0 SDQ_1 SDQ_2 SDQ_3 SDQ_4 SDQ_5 SDQ_6 SDQ_7 SDQ_8 SDQ_9 SDQ_10 SDQ_11 SDQ_12 SDQ_13 SDQ_14 SDQ_15 SDQ_16 SDQ_17 SDQ_18 SDQ_19 SDQ_20 SDQ_21 SDQ_22 SDQ_23 SDQ_24 SDQ_25 SDQ_26 SDQ_27 SDQ_28 SDQ_29 SDQ_30 SDQ_31 SDQ_32 SDQ_33 SDQ_34 SDQ_35 SDQ_36 SDQ_37 SDQ_38 SDQ_39 SDQ_40 SDQ_41 SDQ_42 SDQ_43 SDQ_44 SDQ_45 SDQ_46 SDQ_47 SDQ_48 SDQ_49 SDQ_50 SDQ_51 SDQ_52 SDQ_53 SDQ_54 SDQ_55 SDQ_56 SDQ_57 SDQ_58 SDQ_59 SDQ_60 SDQ_61 SDQ_62 SDQ_63
BROOKDALE-GL/PE_760P
+CPU_VCC
AL21
SCMD_CLK0
+1.5VS
AK22
AN11
SCMD_CLK0#
BROOKDALE-GL/PE
DDR_SDQS[0..7] DDR_SDM[0..7]
AP11
AL33
AN21
AN9
AM34
AP21
AP9
SCMD_CLK1
SCMD_CLK2
SCMD_CLK3
SCMD_CLK4
SCMD_CLK1#
SCMD_CLK2#
SCMD_CLK3#
SCMD_CLK4#
DDR
R80 226_0603_1%
1 2
0.01U
AP33
C182
NEAR MCH
2
DDR_SDM[0..7] 9
DDR_CLK4 10 DDR_CLK#4 10 DDR_CLK5 10 DDR_CLK#5 10
AN34
SMAA12/BS0
SMAA11/DQS8
SMAA10/DQ31
SMAA9/SMA3
SCMD_CLK5
SCMD_CLK5#
SMAA8/SMA4 SMAA7/SMA6
SMAA6/SDQ29
SMAA5/SMA8
SMAA4/SMA11
SMAA3/SMA7
SMAA2/SMA9 SMAA1/SDQ19 SMAA0/SMA12
SMAB5 SMAB4 SMAB2 SMAB1
SBA1 SBA0
SDQS0 SDQS1 SDQS2 SDQS3 SDQS4 SDQS5 SDQS6 SDQS7
SDM0 SDM1 SDM2 SDM3 SDM4 SDM5 SDM6 SDM7
SCKE3/SCK#5
SCKE2/RSVD
SCKE1/SDQ58
SCKE0/RSVD
SCS#0/SCKE2
SCS#1/RSVD
SCS#2/SCK#2
SCS#3/SCAS# SRAS#/SCKE0
SCAS#/RSVD
SWE#/SDQ5
SRCVEN_OUT#
SRCVEN_IN#
SMY_RCOMP
SM_VREF
12
C180
0.1U_X5R
12
AN15 AL15 AK26 AK16 AN17 AP17 AP19 AL17 AL19 AK20 AP23 AN25 AL25 AK18 AN19 AN23 AP25
AP27 AN27
AR2 AT7 AT12 AT17 AR24 AT29 AT34 AL36
AP4 AR8 AP12 AR18 AT24 AP28 AR34 AL34
AL13 AK14 AN13 AP13
AL29 AP31 AK30 AN31
AK28 AN29 AP29
AK24 AL23
AJ34 AM2
R79
1 2
100_0603_1%
PLACE NOTE: CAP PLACE NEAR MCH AD2 & AD3
DDR_SMA12 DDR_SMA11 DDR_SMA10 DDR_SMA9 DDR_SMA8 DDR_SMA7 DDR_SMA6 DDR_SMA5 DDR_SMA4 DDR_SMA3 DDR_SMA2 DDR_SMA1 DDR_SMA0 DDR_SMAB5 DDR_SMAB4 DDR_SMAB2 DDR_SMAB1
DDR_SBS1 DDR_SBS0
DDR_SDQS0 DDR_SDQS1 DDR_SDQS2 DDR_SDQS3 DDR_SDQS4 DDR_SDQS5 DDR_SDQS6 DDR_SDQS7
DDR_SDM0 DDR_SDM1 DDR_SDM2 DDR_SDM3 DDR_SDM4 DDR_SDM5 DDR_SDM6 DDR_SDM7
DDR_CKE3 DDR_CKE2 DDR_CKE1 DDR_CKE0
DDR_SCS#0 DDR_SCS#1 DDR_SCS#2 DDR_SCS#3
DDR_SRAS# DDR_SCAS# DDR_SWE#
RDCLKO RDCLKI
SMY_RCOMP
1 2
R93
12
0_0603_5%
C217
0.1U_X5R
12
DDR_SMAB5 10 DDR_SMAB4 10 DDR_SMAB2 10 DDR_SMAB1 10
DDR_SBS1 9 DDR_SBS0 9
DDR_CKE3 10 DDR_CKE2 10 DDR_CKE1 9,10 DDR_CKE0 9,10
DDR_SCS#0 9 DDR_SCS#1 9 DDR_SCS#2 10 DDR_SCS#3 10
DDR_SRAS# 9 DDR_SCAS# 9 DDR_SWE# 9
12
R91 @0_0603_5%
SDREF
12
R62
100_0603_1%
C141
0.1U_X5R
1
RDCLKI & RDCLKO 100mils LENGTH 5mils WIDTH
12
R400
60.4_0603_1%
12
R396
60.4_0603_1%
12
MCH_HUB_VSW ING
10 mil Trace, 7mil Space
MCH_HUB_VREF
12
0.01U
NEAR MCH
+2.5V
C479
0.1U_X5R
C174
Within 250milWithin 250mil
Compal Electronics, Inc.
Title
Brookdale-GL/PE(1/3)
Size Do cum e nt Number R e v
LA1731 1.0
B
Dat e : Sheet
3
2
期二 十二月
1
of
646¬P , 31, 2002
5
4
3
2
1
12
12
12
SBSTB AD_STB0 AD_STB1 GDEVSEL# GFRAME# GGNT# GIRDY# GPAR PIPE# GREQ# GSTOP# GTRDY# RBF# WBF# AD_STB0# AD_STB1# SBSTB#
5
SBA[0..7]
PIPE# SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
WBF# RBF#
ST0 ST1 ST2
AD_STB0 AD_STB0# AD_STB1 AD_STB1# SBSTB SBSTB#
GFRAME#
GIRDY#
GTRDY# GSTOP# GDEVSEL# GREQ#
GPAR GGNT#
GC/BE#3
GC/BE#2
GC/BE#1
GC/BE#0 AGP_RCOMP
AGPREF
R351 @0
DDCA_CLK DDCA_DATA
H8 C3 C2 D3 D2 E4 E2 F3 F2
G5 G7
C4 B4 B3
V8 U7
M8
L7 F4 E5
M4
N7 N5 P2 N2 D5 P4 B5 H2
M2
N4 R4
L2
W2
B7
12
C6 D7 C7
B16
U23C
GPIPE# GSBA0/ADDIN0 GSBA1/ADDIN1 GSBA2/ADDIN2 GSBA3/ADDIN3 GSBA4/ADDIN4 GSBA5/ADDIN5 GSBA6/ADDIN6 GSBA7/ADDIN7
GWBF# GRBF#
GST0 GST1 GST2
GAD_STB0/DVOBCLK GAD_STB0#/DVOBCLK# GAD_STB1/DVOCCLK GAD_STB1#/DVOCCLK# GSBSTB GSBSTB#
G_FRAME#/MDVI DATA G_IRDY#/MI2C CLK G_TRDY#/MDVI CLK G_STOP#/MDDC DATA G_DEVSEL#/MI2C DATA G_REQ# G_PAR/ADD_DETECT G_GNT# GCBE3#/DVOCD5 GCBE2# GCBE1#/DVOBBLANK# GCBE0#/DVOBD7
AGP RCOMP/DVOBCRCOMP AGP_VREF
HSYNC VSYNC DDCA_CLK DDCA_DATA REFSET
BROOKDALE-GL/PE_760P
AGP/DVO
BROOKDALE-GL/PE
GAD13/DVOBCCLKINT#
GAD14/DVOBFLDSTL
GAD18/DVOCBLANK#
GAD31/DVOCFLDSTL
ANALOG DISPLAY
PSBSEL FSB FREQUENCY
0 1
*
+1.5VS
1 2
R338 6.8K
1 2
R337 6.8K
1 2
R336 6.8K
Populated for 845PE
*
R30 0 R36 0 R353 0 R41 0
1 2
R52 0 R35 0
1 2
R40 0 R352 0
1 2
R340 0
400 MHZ 533 MHZ
DREFCLK
12
DDCA_CLK
12
DDCA_DATA
12
INTCRT_B
12
INTCRT_B#
INTCRT_G
12
INTCRT_G#
INTCRT_R
12
INTCRT_R#
GAD0/DVOBHSYNC
GAD1/DVOBVSYNC
GAD2/DVOBD1 GAD3/DVOBD0 GAD4/DVOBD3 GAD5/DVOBD2 GAD6/DVOBD5 GAD7/DVOBD4 GAD8/DVOBD6 GAD9/DVOBD9
GAD10/DVOBD8 GAD11/DVOBD11 GAD12/DVOBD10
GAD15/MDDC CLK GAD16/DVOCVSYNC GAD17/DVOCHSYNC
GAD19/DVOCD0 GAD20/DVOCD1 GAD21/DVOCD2 GAD22/DVOCD3 GAD23/DVOCD4 GAD24/DVOCD7 GAD25/DVOCD6 GAD26/DVOCD9
GAD27/DVOCD8 GAD28/DVOCD11 GAD29/DVOCD10
GAD30/DVOBCINTR#
GCLKIN
RSTIN#
DREFCLK
PWROK PSBSEL
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
ST0 ST1 ST2
4
GAD[0..31]
GAD0
V4
GAD1
V2
GAD2
W4
GAD3
W5
GAD4
U5
GAD5
U4
GAD6
U2
GAD7
V3
GAD8
T2
GAD9
T3
GAD10
T4
GAD11
R2
GAD12
R5
GAD13
R7
GAD14
T8
GAD15
P3
GAD16
P8
GAD17
K4
GAD18
K2
GAD19
J2
GAD20
M3
GAD21
L5
GAD22
L4
GAD23
H4
GAD24
G2
GAD25
K3
GAD26
J4
GAD27
J5
GAD28
J7
GAD29
H3
GAD30
K8
GAD31
G4
CLK_AGP_MCH
AE7
RSTIN#
AJ31
DREFCLK
D14 E7 Y3
INTCRT_B
G15
INTCRT_B#
H16
INTCRT_G
E15
INTCRT_G#
F16
INTCRT_R
C15
INTCRT_R#
D16
Place close to pin AE7
CLK_AGP_MCH
+1.5VS
12
R24 1K_0603_1%
12
R23 1K_0603_1%
PROPRIETARY NOTE
AR9
AR17
AJ17
Y17
AG4
AB4
AU3
AR3
GAD[0..31] 13
R90 0
1 2
R75 8.2K
1 2
R65 8.2K
12
R87
@10
1
@10P C189
2
AGPREF
C49
0.1U_X5R
C157
0.1U_X5R
NEAR AA1 NEAR AE1
CLK_AGP_MCH 12
12
PCIRST# 10,13,20,23,24,25,26,27,31,33 SYS_PWROK 21,38
H_BSEL0 4,12
RSTIN#
12
C204
15P
AGPREF 13
C145
0.1U_X5R
Place close to pin W2
U23E
AM10
VSS0
AR23
VSS1
AU23
VSS2
F24
VSS3
AM24
VSS4
A25
VSS5
C16
VSS6
N37
VSS7
U18
VSS8
V18
+1.5VS
12
12
C185
0.1U_X5R
VSS9
Y18
VSS10
AA18
VSS11
AL31
VSS12
AR31
VSS13
AU31
VSS14
F32
VSS15
H32
VSS16
K32
VSS17
M32
VSS18
P32
VSS19
T32
VSS20
V32
VSS21
Y32
VSS22
AB32
VSS23
AD32
VSS24
AF32
VSS25
AH32
VSS26
AM4
VSS27
A5
VSS28
C5
VSS29
AG5
VSS30
AN5
VSS31
AR5
VSS32
AR19
VSS33
AM32
VSS34
A33
VSS35
C33
VSS36
AJ33
VSS37
AN33
VSS38
AR33
VSS39
F6
VSS40
H6
VSS41
M6
VSS42
T6
VSS43
Y6
VSS44
AB6
VSS45
AF6
VSS46
AM6
VSS47
U20
VSS48
V20
VSS49
Y20
VSS50
AA20
VSS51
AM20
VSS52
A21
VSS53
B21
VSS54
C21
VSS55
D21
VSS56
E21
VSS57
G21
VSS58
J21
VSS59
D34
VSS60
W34
VSS61
A35
VSS62
E35
VSS63
G35
VSS64
J35
VSS65
L35
VSS66
AN7
VSS67
AR7
VSS68
AU7
VSS69
B8
VSS70
C8
VSS71
D8
VSS72
F8
VSS73
V21
VSS74
Y21
VSS75
AJ21
VSS76
AR21
VSS77
F22
VSS78
H22
VSS79
M10
VSS80
T10
VSS81
Y10
VSS82
AH16
VSS83
AH20
VSS84
AH24
VSS85
BROOKDALE-GL/PE_760P
VSS111
VSS112
BROOKDALE-GL/PE
VSS86
VSS87
VSS88
VSS89
VSS90
N35
R35
U35
AA35
AE35
AC35
AN3
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
B36
AL35
AN35
AR35
AU35
AG35
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
BROOKDALE-GL/PE (2/3)
Size Do cum e nt Number R e v
LA1731 1.0
B
Dat e : Sheet
AM3
AG3
AC3
VSS120
VSS121
VSS122
VSS98
VSS99
VSS100
AF8
W36
AM8
期二 十二月
C31
AH30
V17
VSS123
VSS124
VSS125
VSS101G9VSS102J9VSS103N9VSS104U9VSS105
J17
G17
E17
VSS126
VSS127
VSS128
VSSA_DAC0 VSSA_DAC1
VSS109
VSS110
J23
1
AA9
AE9
VSS106
VSS107
VSS108
A23
C23
D23
VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211
746¬P , 31, 2002
of
C17 B17 AM16 W3 U3 R3 D17 N3 L3 J3 G3 E3 AT2 F30 AR29 AJ29 AG29 AE29 AC29 AA29 W29 R29 U29 N29 L29 J29 C29 A29 AU15 AR15 D15 B2 AR1 AN1 AE1 AA1 U1 N1 J1 E1 AM28 F28 AU27 AR27 AL27 F14 AR13 AJ13 J27 C27 A27 E13 D13 C13 B13 AM12 AK12 F26 AR25 AJ25 J25 AU11 AR11 AR37 AN37 C25 AJ37 AG37 AE37 AA37 U37 AH28 AF28 AB28 V28 P28 K28 K24 J37 E37 C37 AT36 AH36
B15 C14
SBA[0..7]
PIPE#13
D D
WBF#13
RBF#13
ST013 ST113 ST213
AD_STB013
AD_STB0#13
AD_STB113
AD_STB1#13
SBSTB
SBSTB
SBSTB#
GFRAME#13
GIRDY#13
GTRDY#13
GSTOP#13
GDEVSEL#13
GREQ#13
GPAR13
GGNT#13
GC/BE#313
C C
B B
+1.5VS
A A
GC/BE#213 GC/BE#113 GC/BE#013
R372
40.2_0603_1%
R350 @0
R322 0_0603_5%
845PE REFSET = 0_0603_5%
*
845GL REFSET = 137_0603_1%
1 2
R364 6.8K
1 2
R70 6.8K
1 2
R50 6.8K
1 2
R53 6.8K
1 2
R51 6.8K
1 2
R339 6.8K
1 2
R57 6.8K
1 2
R58 6.8K
1 2
R42 6.8K
1 2
R37 6.8K
1 2
R378 6.8K
1 2
R374 6.8K
1 2
R43 6.8K
1 2
R44 6.8K
1 2
R60 6.8K
1 2
R48 6.8K
1 2
R361 6.8K
5
+1.5VS
C177
0.1U_X5R
C91
0.1U_X5R
C93
0.1U_X5R
C113 10U_1206
C175
0.1U_X5R
12
C161
0.1U_X5R
12
C178
0.1U_X5R
12
C72
0.1U_X5R
12
C112 10U_1206
12
C152
0.1U_X5R
12
D D
+1.5VS
12
+1.5VS
12
C C
+CPU_VCC
12
+CPU_VCC
12
B B
A A
12
C137
0.1U_X5R
12
C155
0.1U_X5R
12
C53
0.1U_X5R
12
C94
0.1U_X5R
12
C127
0.1U_X5R
12
C119
0.1U_X5R
12
C166
0.1U_X5R
12
C52
0.1U_X5R
12
C95
0.1U_X5R
12
C107
0.1U_X5R
12
12
12
12
C99
0.1U_X5R
C138
0.1U_X5R
C56
0.1U_X5R
C89
0.1U_X5R
12
C133
0.1U_X5R
12
C123
0.1U_X5R
12
C156
0.1U_X5R
12
C90
0.1U_X5R
12
C144
0.1U_X5R
12
C124
0.1U_X5R
12
C37
0.1U_X5R
12
C79
0.1U_X5R
12
C92
0.1U_X5R
12
C98
0.1U_X5R
12
C55
0.1U_X5R
12
C80
0.1U_X5R
4
+CPU_VCC
+1.5VS
+1.5VS
R389 1.5K
Y19
AA19
W20
U21
W21
AA21
A9 B9 C9 D9
E9 B10 C10 D10 F10 H10 A11 B11 C11 D11 E11 G11
J11 B12 C12 D12 F12 H12 G13
J13 H14
J15
AA17
W17
U17
W18
V19 U19 K10 K12 K14 K16
W19
B18 C18 D18 H18 B19 C19 D19 E19 G19
J19 B20 C20 D20 F20 H20 F18 K18 K20 K22 K26
M28
T28 Y28
AD28
AB2
12
Y2
A37
AB3 AA2 AA3 AA4 AA5
Y4 Y8
W7
AU37 AU36
AT37
AU2 AU1 AT1
AJ35
AH34
U23D
VCC1 VCC2
VCCAGP0A3VCCAGP1A7VCCAGP2C1VCCAGP3D4VCCAGP4D6VCCAGP5G1VCCAGP6K6VCCAGP7L1VCCAGP8L9VCCAGP9
VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43
VTTFSB0 VTTFSB1 VTTFSB2 VTTFSB3 VTTFSB4 VTTFSB5 VTTFSB6 VTTFSB7 VTTFSB8 VTTFSB9 VTTFSB10 VTTFSB11 VTTFSB12 VTTFSB13 VTTFSB14 VTTFSB15 VTTFSB16 VTTFSB17 VTTFSB18 VTTFSB19 VTTFSB20 VTTFSB21 VTTFSB22 VTTFSB23
TESTIN# MEM_SEL
RSVD0 RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8
NC NC NC NC NC NC NC NC
BROOKDALE-GL/PE_760P
BROOKDALE-GL/PE
P6
VCCAGP10R1VCCAGP11R9VCCAGP12W9VCCAGP13
POWER
3
+2.5V
12
C159
VCCA_SM
VCCQSM
VCCA_FSB
+1.5VS
R26 0 R22 0
R89
12
60.4_0603_1%
R86
60.4_0603_1%
+
150UF_E
+2.5V
12
C218
0.1U_X5R
+2.5V
12
C232
0.1U_X5R
+2.5V
12
C207
0.1U_X5R
1 2 1 2
V6
P10
V10
VCCAGP14
VCCAGP15
AB10
VCCSM0 VCCSM1 VCCSM2
VCCAGP16
VCCSM3 VCCSM4 VCCSM5 VCCSM6 VCCSM7 VCCSM8
VCCSM9 VCCSM10 VCCSM11 VCCSM12 VCCSM13 VCCSM14 VCCSM15 VCCSM16 VCCSM17 VCCSM18 VCCSM19 VCCSM20 VCCSM21 VCCSM22 VCCSM23 VCCSM24 VCCSM25 VCCSM26 VCCSM27 VCCSM28 VCCSM29 VCCSM30 VCCSM31 VCCSM32 VCCSM33 VCCSM34 VCCSM35 VCCSM36 VCCSM37 VCCSM38 VCCSM39 VCCSM40 VCCSM41 VCCSM42 VCCSM43 VCCSM44 VCCSM45 VCCSM46 VCCSM47 VCCSM48 VCCSM49 VCCSM50 VCCSM51 VCCSM52 VCCSM53 VCCSM54 VCCSM55
VCCA_SM0 VCCA_SM1
VCCQSM0 VCCQSM1 VCCQSM2
VTTDECAP0 VTTDECAP1 VTTDECAP2 VTTDECAP3 VTTDECAP4
VCCA_FSB
VCCA_HI
VCCHI0 VCCHI1 VCCHI2 VCCHI3
VCCA_DPLL
VCCGPIO
VCCA_DAC0 VCCA_DAC1
SMX_RCOMP
+2.5V
AH8 AK8 AG9 AJ9 AL9 AM22 AJ23 AL37 AU9 AK10 AJ11 AL11 AU25 AM26 AU13 AM14 AJ27 AJ1 AL1 AJ15 AP15 AU29 AH2 AJ2 AK2 AL2 AM30 AH3 AJ3 AK3 AL3 AH4 AJ4 AK4 AL4 AU17 AJ5 AL5 AU5 AM18 AJ19 AK32 AU33 AH6 AK6 AP20 AG7 AJ7 AL7 AP7 AH10 AH12 AH14 AH18 AH22 AH26
AG1 AG2
AT20 AT21 AU21
A31 AC37 R37 L37 G37
A17 AD10
AD6 AC9 AC1 AE3
VCCA_DPLL
A13 B6
VCCA_DAC
B14 A15
SMX_RCOMP
AF10 A2
NC
A36
NC
B37
NC
B1
NC
12
C70
0.1U_X5R
12
12
C221
0.1U_X5R
12
C231
0.1U_X5R
12
C203
0.1U_X5R
12
C186
0.1U_X5R
2
12
+
150UF_E
12
+2.5V
C212
12
C216
0.1U_X5R
12
C230
0.1U_X5R
12
C206
0.1U_X5R
C97
0.1U_X5R
12
C46
0.1U_X5R
12
C442
0.1U_X5R
+3VS
12
+
150UF_E
12
C224
0.1U_X5R
12
C233
0.1U_X5R
12
C205
0.1U_X5R
C181
12
C467
0.1U_X5R
12
C229
0.1U_X5R
12
C228
0.1U_X5R
12
C208
0.1U_X5R
12
C393
0.1U_X5R
12
C223
0.1U_X5R
12
C227
0.1U_X5R
12
C220
0.1U_X5R
VCCA_FSB
12
C392
0.1U_X5R
VCCQSM
12
C226
0.1U_X5R
VCCA_SM
12
C190
0.1U_X5R
12
C215
0.1U_X5R
12
C482
0.1U_X5R
12
C225
0.1U_X5R
12
1
12
4.7U_0805_10V4Z
12
1
12
+
C391
0.1U_X5R
12
12
12
C515
R417
BLM21A601SPT_0805 C187 150UF_E
12
C213
0.1U_X5R
12
C210
0.1U_X5R
12
C191
0.1U_X5R
L42 BLM21A601SPT_0805
12
L7
12
L29
BLM21A601SPT_0805
12
C380 22U_1206
C214
0.1U_X5R
C219
0.1U_X5R
C192
0.1U_X5R
12
+2.5V
+1.5VS
+1.5VS
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
5
4
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
BROOKDALE-GL/PE (3/3)
Size Do cum e nt Number R e v
LA1731 1.0
B
Dat e : Sheet
期二 十二月
1
of
846¬P , 31, 2002
A
DDR_SDQ0 DDR_SDQ1
DDR_SDQ2 DDR_SDQ3
DDR_SDQ4
1 1
Layout note
Place these resistor closely DIMM0, all trace length<750mil
2 2
3 3
4 4
DDR_SDQ[0..63]6 DDR_SD QS [0 ..8 ]6 DDR_SDM[0..7]6
A
DDR_SDQ5
DDR_SDQ7 DDR_SDQ6
DDR_SDQS0 DDR_SDM0
DDR_SDQ8 DDR_SDQ9
DDR_SDQ10 DDR_SDQ11
DDR_SDQ12 DDR_SDQ13
DDR_SDQ14 DDR_SDQ15
DDR_SDQS1 DDR_SDM1
DDR_SDQ16 DDR_SDQ17
DDR_SDQ18 DDR_SDQ19
DDR_SDQ20 DDR_SDQ21
DDR_SDQ22 DDR_SDQ23
DDR_SDQS2 DDR_SDM2
DDR_SDQ24 DDR_SDQ25
DDR_SDQ26 DDR_SDQ27
DDR_SDQ28 DDR_SDQ29
DDR_SDQ30 DDR_SDQ31
DDR_SDQS3
DDR_SDQ[0..63] DDR _ S DQS[0..8] DDR_SDM[0..7]
1 2
R473 10
1 2
R472 10
1 2
R475 10
1 2
R196 10
1 2
R199 10
1 2
R198 10
1 2
R195 10
1 2
R474 10
1 2
R197 10
1 2
R455 10
1 2
R476 10
1 2
R193 10
1 2
R191 10
1 2
R190 10
1 2
R477 10
1 2
R194 10
1 2
R478 10
1 2
R479 10
1 2
R192 10
1 2
R456 10
1 2
R189 10
1 2
R481 10
1 2
R186 10
1 2
R483 10
1 2
R480 10
1 2
R188 10
1 2
R482 10
1 2
R185 10
1 2
R187 10
1 2
R457 10
1 2
R484 10
1 2
R485 10
1 2
R486 10
1 2
R487 10
1 2
R184 10
1 2
R183 10
1 2
R181 10
1 2
R180 10
1 2
R182 10
1 2
R458 10
B
DDR_DQ0 DDR_DQ1
DDR_DQ2 DDR_DQ3
DDR_DQ4 DDR_DQ5
DDR_DQ7 DDR_DQ6
DDR_DQS0 DDR_DM0
DDR_DQ8 DDR_DQ9
DDR_DQ10 DDR_DQ11
DDR_DQ12 DDR_DQ13
DDR_DQ14 DDR_DQ15
DDR_DQS1 DDR_DM1
DDR_DQ16 DDR_DQ17
DDR_DQ18 DDR_DQ19
DDR_DQ20 DDR_DQ21
DDR_DQ22 DDR_DQ23
DDR_DQS2 DDR_DM2
DDR_DQ24 DDR_DQ25
DDR_DQ26 DDR_DQ27
DDR_DQ28 DDR_DQ29
DDR_DQ30 DDR_DQ31
DDR_DQS3 DDR_DM3DDR_SDM3
B
C
DDR_SDQ32 DDR_SDQ33
DDR_SDQ34 DDR_SDQ35
DDR_SDQ36 DDR_SDQ37
DDR_SDQ38 DDR_SDQ39
DDR_SDQS4
DDR_SDQ40 DDR_SDQ41
DDR_SDQ42 DDR_SDQ43
DDR_SDQ44 DDR_SDQ45
DDR_SDQ46 DDR_SDQ47
DDR_SDQS5 DDR_SDM5 DDR_DM5
DDR_SDQ48 DDR_SDQ49
DDR_SDQ50 DDR_SDQ51
DDR_SDQ52 DDR_SDQ53
DDR_SDQ54 DDR_SDQ55
DDR_SDQS6
DDR_SDQ56 DDR_SDQ57
DDR_SDQ58 DDR_SDQ59 DDR_DQ59
DDR_SDQ60 DDR_SDQ61
DDR_SDQ62 DDR_SDQ63 DDR_DQ63
DDR_SDQS7 DDR_SDM7 DDR_DM7
1 2
R167 10
1 2
R498 10
1 2
R164 10
1 2
R500 10
1 2
R166 10
1 2
R497 10
1 2
R499 10
1 2
R163 10
1 2
R165 10
1 2
R459 10
1 2
R502 10
1 2
R161 10
1 2
R159 10
1 2
R504 10
1 2
R162 10
1 2
R501 10
1 2
R503 10
1 2
R158 10
1 2
R160 10
1 2
R460 10
1 2
R157 10
1 2
R505 10
1 2
R153 10
1 2
R508 10
1 2
R506 10
1 2
R156 10
1 2
R507 10
1 2
R154 10
1 2
R155 10
1 2
R461 10
1 2
R510 10
1 2
R151 10
1 2
R152 10
1 2
R148 10
1 2
R509 10
1 2
R511 10
1 2
R149 10
1 2
R512 10
1 2
R150 10
1 2
R462 10
C
DDR_DQ32 DDR_DQ33
DDR_DQ34 DDR_DQ35
DDR_DQ36 DDR_DQ37
DDR_DQ38 DDR_DQ39
DDR_DQS4 DDR_DM4DDR_SDM4
DDR_DQ40 DDR_DQ41
DDR_DQ42 DDR_DQ43
DDR_DQ44 DDR_DQ45
DDR_DQ46 DDR_DQ47
DDR_DQS5
DDR_DQ48 DDR_DQ49
DDR_DQ50 DDR_DQ51
DDR_DQ52 DDR_DQ53
DDR_DQ54 DDR_DQ55
DDR_DQS6 DDR_DM6DDR_SDM6
DDR_DQ56 DDR_DQ57
DDR_DQ58
DDR_DQ60 DDR_DQ61
DDR_DQ62
DDR_DQS7
DDR_DQ[0..63] DDR_DM[0..7] DDR_DQS[0..8]
DDR_DQ[0..63] 10 DDR_DM[0..7] 10 DDR_DQS[0..8] 10
PROPRIETARY NOTE
D
DDR_DQ5 DDR_DQ4
DDR_DQS0 DDR_DQ3
DDR_DQ7 DDR_DQ13
DDR_DQ9 DDR_DQS1
DDR_DQ10 DDR_DQ11
DDR_CLK16 DDR_CLK#16
DDR_DQ16 DDR_DQ21
DDR_DQS2 DDR_DQ18
DDR_DQ23 DDR_DQ28
DDR_DQ29 DDR_DQS3
DDR_DQ30 DDR_DQ31
DDR_CKE1
DDR_F_SMA9 DDR_F_SMA7
DDR_F_SMA5 DDR_F_SMA3 DDR_F_SMA1
DDR_F_SMA10 DDR_F_SBS0 DDR_F_SWE# DDR_SCS#0
DDR_DQ32 DDR_DQ36
DDR_DQS4 DDR_DQ34
DDR_DQ39 DDR_DQ44
DDR_DQ41 DDR_DQS5
DDR_DQ42 DDR_DQ47
DDR_DQ48 DDR_DQ53
DDR_DQS6 DDR_DQ55
DDR_DQ50 DDR_DQ58
DDR_DQ57 DDR_DQS7
DDR_DQ62 DDR_DQ59
SMB_DATA10,12,20
SMB_CLK10,12,20
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
+3VS
E
+2.5V +2.5V
JP17
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
KLINK_5746-3-111
DU/RESET#
VREF
VSS DQ4 DQ5 VDD DM0 DQ6 VSS DQ7
DQ12
VDD
DQ13
DM1
VSS DQ14 DQ15
VDD
VDD
VSS
VSS
DQ20 DQ21
VDD
DM2 DQ22
VSS DQ23 DQ28
VDD DQ29
DM3
VSS DQ30 DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
VSS
VSS
VDD
VDD CKE0
DU/BA2
VSS
VDD
BA1 RAS# CAS#
VSS DQ36 DQ37
VDD
DM4 DQ38
VSS DQ39 DQ44
VDD DQ45
DM5
VSS DQ46 DQ47
VDD
CK1#
CK1
VSS DQ52 DQ53
VDD
DM6 DQ54
VSS DQ55 DQ60
VDD DQ61
DM7
VSS DQ62 DQ63
VDD
SA0
SA1
SA2
F
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100
A11
102
A8
104 106
A6
108
A4
110
A2
112
A0
114 116 118 120 122
S1#
124
DU
126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DU
DIMM0
Bottom side Reverse
E
F
DDR_DQ1 DDR_DQ0
DDR_DM0 DDR_DQ6
DDR_DQ2 DDR_DQ8
DDR_DQ12 DDR_DM1
DDR_DQ14 DDR_DQ15
DDR_DQ20 DDR_DQ17
DDR_DM2 DDR_DQ22
DDR_DQ19 DDR_DQ24
DDR_DQ25 DDR_DM3
DDR_DQ26 DDR_DQ27
DDR_CKE0
DDR_F_SMA11DDR_F_SMA12 DDR_F_SMA8
DDR_F_SMA6 DDR_F_SMA4 DDR_F_SMA2 DDR_F_SMA0
DDR_F_SBS1 DDR_F_SRAS# DDR_F_SCAS# DDR_SCS#1
DDR_DQ37 DDR_DQ33
DDR_DM4 DDR_DQ38
DDR_DQ35 DDR_DQ45
DDR_DQ40 DDR_DM5
DDR_DQ46 DDR_DQ43
DDR_DQ49 DDR_DQ52
DDR_DM6 DDR_DQ54
DDR_DQ51 DDR_DQ60
DDR_DQ56 DDR_DM7
DDR_DQ61 DDR_DQ63
DDR_SWE#6
DDR_SBS06 DDR_SCAS#6 DDR_SRAS#6
DDR_SBS16
SDREF_DIMM
12
C615 .1UF_X5R
G
12
SDREF
0
R555
DDR_SMA[0..12]6
DDR_SMA9 DDR_SMA12
DDR_SMA6 DDR_SMA8
DDR_SMA11 DDR_SMA7
DDR_SMA5 DDR_SMA4
DDR_SMA1 DDR_SMA3
DDR_SMA10 DDR_F_SMA10 DDR_SMA2
DDR_SMA0
DDR_F_SMA[0..12]10
1 2
R175 10
1 2
R176 10
1 2
R490 10
1 2
R489 10
1 2
R488 10
1 2
R174 10
1 2
R173 10
1 2
R491 10
1 2
R171 10
1 2
R172 10
1 2
R170 10
1 2
R492 10 R493 10
1 2
H
DDR_SMA[0..12] DDR_F_SMA9 DDR_F_SMA12
DDR_F_SMA6 DDR_F_SMA8
DDR_F_SMA11 DDR_F_SMA7
DDR_F_SMA5 DDR_F_SMA4
DDR_F_SMA1 DDR_F_SMA3
DDR_F_SMA2
DDR_F_SMA0
DDR_F_SMA[0..12]
Layout note
DDR_CKE0 6,10DDR_CKE16,10
Place these resistor closely DIMM0, all trace length<=750mil
Layout note Place these resistor
closely DIMM0,
DDR_SCS#1 6DDR_SCS#06
DDR_CLK#2 6 DDR_CLK2 6
all trace length Max=1.3"
+1.25VS
RP7 4P2R_56
DDR_SCS#0
1 4
DDR_SCS#1
2 3
Layout note Place these resistor
closely DIMM0, all trace length<=750mil
DDR_SWE# DDR_F_SWE#
1 2
R168 10
DDR_SBS0
R169 10
DDR_SCAS#
R496 10
DDR_SRAS# DDR_F_SRAS#
R495 10 R494 10
DDR_SBS1 DDR_F_SBS1
Title
Size Doc ument Number Re v
B
LA1731
Date: Sheet
星期二 十二
G
DDR_F_SBS0
1 2
DDR_F_SCAS#
1 2 1 2
1 2
Compal Elect r onics, Inc.
DDR-SODIMM SLOT1
?31, 2002
DDR_F_SWE# 10 DDR_F_SBS0 10 DDR_F_SCAS# 10 DDR_F_SRAS# 10
DDR_F_SBS1 10
of
946, 
H
1.0
A
+1.25VS +1.25VS
RP46 4P2R_56
DDR_DQ4
1 4
DDR_DQ5
2 3
RP47 4P2R_56
DDR_DQ3
1 4
DDR_DQS0
2 3
DDR_DQ1 DDR_DQ0
DDR_DQ13 DDR_DQ7
DDR_DQS1 DDR_DQ9
DDR_DQ6 DDR_DQ2
DDR_DQ11 DDR_DQ10
DDR_DQ14 DDR_DQ15
DDR_DQ8 DDR_DQ12
DDR_DQ59 DDR_DQ62
DDR_DQ21 DDR_DQ16
DDR_DQ31 DDR_DQ30
DDR_DQ61 DDR_DQ63
DDR_DQ18 DDR_DQS2
DDR_DQS3 DDR_DQ29
DDR_DQ28 DDR_DQ23
RP30 4P2R_56
1 4 2 3
RP48 4P2R_56
1 4 2 3
RP49 4P2R_56
1 4 2 3
RP29 4P2R_56
1 4 2 3
RP50 4P2R_56
1 4 2 3
RP27 4P2R_56
1 4 2 3
RP28 4P2R_56
1 4 2 3
RP71 4P2R_56
1 4 2 3
RP51 4P2R_56
1 4 2 3
RP55 4P2R_56
1 4 2 3
RP14 4P2R_56
1 4 2 3
RP52 4P2R_56
1 4 2 3
RP54 4P2R_56
1 4 2 3
RP53 4P2R_56
1 4 2 3
1 1
2 2
3 3
RP15 4P2R_56
14 23
RP70 4P2R_56
14 23
RP19 4P2R_56
14 23
RP21 4P2R_56
14 23
RP18 4P2R_56
14 23
RP62 4P2R_56
14 23
RP20 4P2R_56
14 23
RP63 4P2R_56
14 23
RP64 4P2R_56
14 23
RP65 4P2R_56
14 23
RP66 4P2R_56
14 23
RP17 4P2R_56
14 23
RP67 4P2R_56
14 23
RP68 4P2R_56
14 23
RP16 4P2R_56
14 23
RP69 4P2R_56
14 23
DDR_DQ60 DDR_DQ56
DDR_DQS7 DDR_DQ57
DDR_DQ45 DDR_DQ40
DDR_DQ37 DDR_DQ33
DDR_DQ46 DDR_DQ43
DDR_DQ36 DDR_DQ32
DDR_DQ38 DDR_DQ35
DDR_DQ34 DDR_DQS4
DDR_DQ44 DDR_DQ39
DDR_DQS5 DDR_DQ41
DDR_DQ47 DDR_DQ42
DDR_DQ49 DDR_DQ52
DDR_DQ53 DDR_DQ48
DDR_DQ55 DDR_DQS6
DDR_DQ54 DDR_DQ51
DDR_DQ58 DDR_DQ50
Layout note Place these resistor
closely DIMM1, all trace length<=800mil
4 4
RP74
56-8P4R_0402
RP75
56-8P4R_0402
RP76
56-8P4R_0402
1 2
R226 56
1 2
R225 56
1 2
R222 56
1 2
R221 56
1 2
R219 56
1 2
R220 56
For EC Tools
JP20
1 2 3 4 5 6
@ FCI S FW06R-2STE1
PCLK_80H12 PCIRST#7,13,20,23,24,25,26,27,31,33
LAD021,31,33 LAD121,31,33 LAD221,31,33 LAD321,31,33
LFRAME#21,31,33
KBA533,34
DDR_CKE3
18
DDR_CKE2
27
DDR_DQ27
36
DDR_DQ26
45
DDR_DM3
18
DDR_DQ25
27
DDR_DQ24
36
DDR_DQ19
45
DDR_DQ22
18
DDR_DM2
27
DDR_DQ20
36
DDR_DQ17
45
DDR_DM0
DDR_DM1
DDR_DM4
DDR_DM5
DDR_DM6
DDR_DM7
DDR_SMAB16 DDR_SMAB26 DDR_SMAB46 DDR_SMAB56
+5VALW
EC_URXD/KSO16 EC_UTXD/KSO17 EC_USCLK
PCLK_80 PCIRST# LAD0 LAD1 LAD2 LAD3 LFRAME# KBA5
+3VS
B
DDR_DM[0..7] DDR_DQS[0..8] DDR_DQ[0..63] DDR_F_SMA[0..12]
DDR_CKE16,9 DDR_CKE06,9
R179 10 RP79 R177 10 R178 10 R200 10
EC_URXD/KSO16 33 EC_UTXD/KSO17 33,35 EN_USCLK 33
JP25
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
@96212-1011S
DDR_F_SMAB1 DDR_F_SMAB2 DDR_F_SMAB4 DDR_F_SMAB5
PCLK_80
DDR_DM[0..7] 9 DDR_DQS[0..8] 9 DDR_DQ[0..63] 9 DDR_F_SMA[0..12] 9
DDR_CKE1 DDR_CKE0
12
R614 22
C753 10P
C
DDR_CLK46 DDR_CLK#46
DDR_F_SBS09 DDR_F_SWE#9
SMB_DATA9,12,20
SMB_CLK9,12,20
+2.5V +2.5V
JP18
1
VREF
3
DDR_DQ5 DDR_DQ4
DDR_DQS0
DDR_DQ3 DDR_DQ7
DDR_DQ13
DDR_DQ9
DDR_DQS1 DDR_DQ10
DDR_DQ11
DDR_DQ16 DDR_DQ21
DDR_DQS2 DDR_DQ18
DDR_DQ23 DDR_DQ28
DDR_DQ29 DDR_DQS3
DDR_DQ30 DDR_DQ31
DDR_CKE3 DDR_CKE2 DDR_F_SMA12
DDR_F_SMA9 DDR_F_SMA7
DDR_F_SMAB5 DDR_F_SMA3 DDR_F_SMAB1
DDR_F_SMA10 DDR_F_SBS0 DDR_F_SWE# DDR_SCS#2 DDR_SCS#3
DDR_DQ32 DDR_DQ36
DDR_DQS4 DDR_DQ34
DDR_DQ39 DDR_DQ44
DDR_DQ41 DDR_DQS5
DDR_DQ42 DDR_DQ47
DDR_DQ48 DDR_DQ53
DDR_DQS6 DDR_DQ55
DDR_DQ50 DDR_DQ58
DDR_DQ57 DDR_DQS7
DDR_DQ62 DDR_DQ59
+3VS
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
DDR-SODIMM_200_Reverse
D
DU/RESET#
DU/BA2
VREF
VSS DQ4 DQ5 VDD DM0 DQ6 VSS DQ7
DQ12
VDD
DQ13
DM1
VSS DQ14 DQ15
VDD
VDD
VSS
VSS
DQ20 DQ21
VDD
DM2 DQ22
VSS DQ23 DQ28
VDD DQ29
DM3
VSS DQ30 DQ31
VDD
VSS
DM8
VDD
VSS
VSS
VDD
VDD CKE0
VSS
VDD RAS#
CAS#
VSS DQ36 DQ37
VDD
DM4 DQ38
VSS DQ39 DQ44
VDD DQ45
DM5
VSS DQ46 DQ47
VDD
CK1#
VSS DQ52 DQ53
VDD
DM6 DQ54
VSS DQ55 DQ60
VDD DQ61
DM7
VSS DQ62 DQ63
VDD
12
C679 .1UF_X5R
+1.25VS
SDREF_DIMM
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72
CB4
74
CB5
76 78 80
CB6
82 84
CB7
86 88 90 92 94 96 98 100
A11
102
A8
104 106
A6
108
A4
110
A2
112
A0
114 116
BA1
118 120 122
S1#
124
DU
126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160
CK1
162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194
SA0
196
SA1
198
SA2
200
DU
DDR_DQ1 DDR_DQ0
DDR_DM0 DDR_DQ6
DDR_DQ2 DDR_DQ8
DDR_DQ12 DDR_DM1
DDR_DQ14 DDR_DQ15
DDR_DQ20 DDR_DQ17
DDR_DM2 DDR_DQ22
DDR_DQ19 DDR_DQ24
DDR_DQ25 DDR_DM3
DDR_DQ26 DDR_DQ27
DDR_F_SMA11 DDR_F_SMA8
DDR_F_SMA6 DDR_F_SMAB4 DDR_F_SMAB2 DDR_F_SMA0
DDR_F_SBS1 DDR_F_SRAS# DDR_F_SCAS#
DDR_DQ37 DDR_DQ33
DDR_DM4 DDR_DQ38
DDR_DQ35 DDR_DQ45
DDR_DQ40 DDR_DM5
DDR_DQ46 DDR_DQ43
DDR_DQ49 DDR_DQ52
DDR_DM6 DDR_DQ54
DDR_DQ51 DDR_DQ60
DDR_DQ56 DDR_DM7
DDR_DQ61 DDR_DQ63
+3VS
DDR_CKE2 6DDR_CKE36
DDR_F_SBS1 9 DDR_F_SRAS# 9 DDR_F_SCAS# 9 DDR_SCS#3 6DDR_SCS#26
DDR_CLK#5 6 DDR_CLK5 6
DIMM1
Top side
E
R606 56
56-8P4R_0402
33-8P4R_0402 R633 56
DDR_SCS#2 DDR_SCS#3
1 2
RP56 4P2R_56
14 23
RP57 4P2R_56
14 23
RP58 4P2R_56
14 23
RP59 4P2R_33
14 23
RP60 4P2R_56
14 23
RP77
18 27 36 45
RP78 4P2R_33
14 23
RP80 4P2R_56
14 23
18 27 36 45
1 2
RP61 4P2R_56
1 4 2 3
DDR_F_SMA10
DDR_F_SMA9 DDR_F_SMA12
DDR_F_SMA6 DDR_F_SMA7
DDR_F_SMA0 DDR_F_SMA3
DDR_F_SMAB1 DDR_F_SMAB5
DDR_F_SWE# DDR_F_SBS0
DDR_F_SMA8 DDR_CKE1 DDR_CKE0 DDR_F_SBS1
DDR_F_SMA2 DDR_F_SMA1
DDR_F_SRAS# DDR_F_SCAS#
DDR_F_SMAB4 DDR_F_SMA5 DDR_F_SMA4 DDR_F_SMAB2
DDR_F_SMA11
Layout note Place these resistor
closely DIMM0, all trace length Max=1.3"
+1.25VS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
A
B
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Title
Size Doc ument Number Re v
B
Date: Sheet
Compal Elect r onics, Inc.
DDR-SODIMM SLOT1
LA1731
星期二 十二
?31, 2002
1.0
of
10 46, 
E
A
B
C
D
E
Layout n ote :
Distribute as close as possible to DDR-SODIMM.
+2.5V
1 1
12
C260 .1UF_X5R
+2.5V +2.5V
12
C272 .1UF_X5R
12
C270 .1UF_X5R
12
C264 .1UF_X5R
12
C267 .1UF_X5R
12
C273 .1UF_X5R
12
C271 .1UF_X5R
12
C274 .1UF_X5R
12
C261 .1UF_X5R
12
C265 .1UF_X5R
12
C275 .1UF_X5R
12
C269 .1UF_X5R
12
C266 .1UF_X5R
12
C636
+
150UF_D2_6.3V
12
C262 .1UF_X5R
12
C664
+
150UF_D2_6.3V
12
C268 .1UF_X5R
12
C263 .1UF_X5R
Layout n ote :
Place one cap close to every 2 pull up resistors termination to +1.25V
2 2
+1.25VS
12
+1.25VS
12
C306 .1UF_X5R
C693 .1UF_X5R
12
C701 .1UF_X5R
12
C290 .1UF_X5R
12
C305 .1UF_X5R
12
C694 .1UF_X5R
12
C702 .1UF_X5R
12
C706 .1UF_X5R
12
C304 .1UF_X5R
12
C302 .1UF_X5R
12
C703 .1UF_X5R
12
C707 .1UF_X5R
12
C303 .1UF_X5R
12
C708 .1UF_X5R
12
C704 .1UF_X5R
12
C301 .1UF_X5R
12
12
C705 .1UF_X5R
C709 .1UF_X5R
12
C692 .1UF_X5R
12
C710 .1UF_X5R
+1.25VS
12
C300
+1.25VS
12
+1.25VS
12
+1.25VS
12
.1UF_X5R
C690 .1UF_X5R
C717 .1UF_X5R
C291 .1UF_X5R
3 3
4 4
12
C711 .1UF_X5R
12
C691 .1UF_X5R
12
C295 .1UF_X5R
12
C721 .1UF_X5R
A
12
C299 .1UF_X5R
12
C698 .1UF_X5R
12
C722 .1UF_X5R
12
C697 .1UF_X5R
12
C712 .1UF_X5R
12
C699 .1UF_X5R
12
C294 .1UF_X5R
12
C297 .1UF_X5R
12
C289 .1UF_X5R
12
C700 .1UF_X5R
12
C723 .1UF_X5R
12
C713 .1UF_X5R
12
C714 .1UF_X5R
12
C307 .1UF_X5R
B
12
C695 .1UF_X5R
12
C715 .1UF_X5R
12
C718 .1UF_X5R
12
C696 .1UF_X5R
12
C298 .1UF_X5R
12
C293 .1UF_X5R
PROPRIETARY NOTE
12
C288 .1UF_X5R
12
C716 .1UF_X5R
12
C719 .1UF_X5R
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
12
C720 .1UF_X5R
12
C296 .1UF_X5R
12
C292 .1UF_X5R
C
D
Title
Size Doc ument Number Re v
B
Date: Sheet
Compal Elect r onics, Inc.
DDR SODIMM Decoupling
LA1731
星期二 十二
?31, 2002
of
11 46, 
E
1.0
A
B
C
D
E
F
G
H
+3VS
SEL0SEL1 Function
00 01 10
1 1
11
166Mhz Host CLK 100Mhz Host CLK 200Mhz Host CLK 133Mhz Host CLK
L10 BLM21A601SPT
1 2
L9 BLM21A601SPT
1 2
Place Crystal within 500 mils of CK_Titan
+3VS+3VS
12
12
R101
R100
1K
1K
H_BSEL04,7 H_BSEL14
2 2
Host Swing Select
MULT0 Reference R,
Iref= VDD/(3*Rr)
Rr = 221 1%,
0
Iref =5.00mA Rr = 475 1%,
1
Iref =2.32mA
1 2
R99 @0
Output Current
Ioh = 4 * Iref
Ioh = 6 * Iref
12
12
R109 @1K
12
R110 1K
CK408_PWRGD#42
+3VS
SMB_DATA9,10,20
SMB_CLK9,10,20
R108 @1K
Please closely pin42
CLK_ICH4821
3 3
CLK_ICH1421
CLK_14M_SIO31
R112 22
R119 33 R120 33
12
C245 @10P
caps are i nternal to CK_TITAN
12
C251 @10P
H_BSEL2 H_BSEL0 BSEL0
1 2
+3VS
R111 1K
R98 10K
1 2
R97 @10K
1 2
SMB_DATA SMB_CLK
1 2
R436 475_1%_0603
1 2
1 2 1 2
12
CLK_ICH48M
CLK_ICH14M
Y1
14.318MHZ
2
3
40 55 54
25 34 53
28
43
29 30
33 35
42
39
38
56
U9
XTAL_IN
XTAL_OUT
SEL2 SEL1 SEL0
PWR_DWN# PCI_STOP# CPU_STOP#
VTT_PWRGD#
MULT0
SDATA SCLK
3V66_0/DRCG 3V66_1/VCH_CLK
IREF
48MHZ_USB
48MHZ_DOT
REF
ICS 95 08-10
+3V_CLK
Width=40 mils
1
14
VDD_PCI8VDD_PCI
VDD_REF
GND_REF4GND_PCI9GND_PCI15GND_3V6620GND_3V6631GND_48MHZ36GND_IREF41GND_CPU
12
+
C235
22UF_10V_1206
50
32
37
VDD_CPU46VDD_CPU
VDD_3V6619VDD_3V66
VDD_48MHZ
CPU_CLKC2
66MHZ_IN/3V66_5
66MHZ_OUT2/3V66_4 66MHZ_OUT1/3V66_3 66MHZ_OUT0/3V66_2
47
VDD_CORE
GND_CORE
CPUCLKT2
CPUCLKT1
CPUCLKC1 CPUCLKT0
CPUCLKC0
PCICLK_F2 PCICLK_F1 PCICLK_F0
PCICLK6 PCICLK5 PCICLK4 PCICLK3 PCICLK2 PCICLK1 PCICLK0
12
C236 .1UF_X5R
26
27 45
44 49
48 52
51 24
23 22 21
7 6 5
18 17 16 13 12 11 10
12
C237 .1UF_X5R
+3VS_CLKVDD
12
C246 .1UF_X5R
CLK66MCH CLK66AGP CLKICHHUB
CLKPCI_F2
CLK_80H CLKPCI_EC CLKPCI_1394 CLKPCI_MINI CLKPCI_SIO CLKPCI_CB CLKPCI_LAN
CLK_BCLK
CLK_BCLK# CLK_HT
CLK_HT# CLKITP_CLK
CLKITP_CLK#
12
12
12
C239 .1UF_X5R
L11 BLM21A601SPT
1 2
C250 10UF_10V_1206
1 2
R115 33
1 2
R118 33
1 2
R113 33
1 2
R114 33
1 2
R116 33
1 2
R117 33
R127 33
1 2
R132 33
1 2
R129 33
1 2
R133 33
1 2
R613 33
1 2
R128 33
1 2
R136 33
1 2
R135 22
1 2
R131 33
1 2
R134 33
1 2
R130 33
1 2
C243 .1UF_X5R
+3VS
12
C248 .1UF_X5R
12
C249 .1UF_X5R
+3VS_VDD48M
12
C238 .1UF_X5R
1 2
R106 49.9_1%_0603
1 2
R107 49.9_1%_0603
1 2
R104 49.9_1%_0603
1 2
R105 49.9_1%_0603
1 2
R102 49.9_1%_0603
1 2
R103 49.9_1%_0603
12
C570 10PF
12
C247 .1UF_X5R
1 2
12
C234 10UF_10V_1206
L8
10_0805
*BLM21A601SPT
+3VS
CLK_HCLK 4
Place resistor near R105,R106 ;Trace <=400mils
CLK_HCLK# 4 CLK_GHT 6
Place resistor near R103,R104 ;Trace <=400mils
CLK_GHT# 6 CLK_ITP_BCLK 4
Place resistor near R702,R705 ;Trace <=400mils
CLK_ITP_BCLK# 4
CLK_AGP_MCH 7 CLK_AGP 13 CLK_ICHHUB 20
CLK_ICHPCI 20
PCLK_80H 10 CLK_PCI_EC 33 CLK_PCI_1394 25 CLK_PCI_MINI 27 CLK_PCI_SIO 31 CLK_PCI_CB 23 CLK_PCI_LAN 26
Note: CPU_CLK[2:0] needs to be running in C3, C4.
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
A
B
C
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
E
F
Title
Size Doc ument Number Re v
B
Date: Sheet
Compal Elect r onics, Inc.
LA1731
星期二 十二
G
?31, 2002
Clock Generator
1.0
of
12 46, 
H
5
GAD[0..31]7
GC/BE#[0..3]7
ST07 ST17
D D
C C
B B
A A
AGPREF
12
C63
.1UF_X5R
+3VS
1 2
R46 10K
1 2
R45 10K
CLK_AGP
STP_AGP#
AGP_BUSY#
12
R29
10
12
C59
10PF
5
ST27
AD_STB07
AD_STB0#7
AD_STB17
AD_STB1#7
PIPE#7
RBF#7
AGPREF7
WBF#7
CLK_AGP12
GDEVSEL#7
GFRAME#7
GGNT#7 PIRQA#20,23,25
GIRDY#7
GPAR7
GREQ#7
PCIRST#7,10,20,23,24,25,26,27,31,33
GSTOP#7
GTRDY#7
4
GAD[0..31] GC/BE#[0..3]
ST0 ST1 ST2 AD_STB0 AD_STB0# AD_STB1 AD_STB1# AGP_BUSY# PIPE# RBF# STP_AGP# AGPREF WBF#
GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8 GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31
GC/BE#0 GC/BE#1 GC/BE#2 GC/BE#3
CLK_AGP GDEVSEL# GFRAME# GGNT# PIRQA GIRDY# GPAR# GREQ# PCIRST# GSTOP# GTRDY#
4
AJ13
AH14
AJ14 AJ28
AF24 AK20 AH19
AF15 AG14 AK14 AH15
AF27
AF14 AH29
AJ30 AH27
AJ29 AG25 AG26 AG24 AK30 AK28
AF22 AH26 AH25
AJ26
AF21 AK26 AH24 AH21 AK22 AG20
AF18
AJ21
AJ22 AH20 AK18
AF17
AJ20
AJ17
AJ18 AG16 AK16 AH16
AJ16
AF23
AJ25
AJ24 AG18
AH18 AG22 AH22
AF13
AF16 AK24
AF20 AK12 AH17 AH23
AF19
U15 U16 U17 U18 U19
V11 V12 V13 V14 V15 V16 V17 V18 V19 V27
V30 W12 W13 W14 W15 W16 W17 W18 W19 W20 W23
Y13
Y15
Y19
Y27
AB27
V8
U22A
AGPST0 AGPST1 AGPST2 AGPADSTB0 AGPADSTB0# AGPADSTB1 AGPADSTB1# AGPBUSY# AGPPIPE# APGRBF# AGPSTOP# AGPVREF AGPWBF#
PCIAD0 PCIAD1 PCIAD2 PCIAD3 PCIAD4 PCIAD5 PCIAD6 PCIAD7 PCIAD8 PCIAD9 PCIAD10 PCIAD11 PCIAD12 PCIAD13 PCIAD14 PCIAD15 PCIAD16 PCIAD17 PCIAD18 PCIAD19 PCIAD20 PCIAD21 PCIAD22 PCIAD23 PCIAD24 PCIAD25 PCIAD26 PCIAD27 PCIAD28 PCIAD29 PCIAD30 PCIAD31
PCIC/BE#0 PCIC/BE#1 PCIC/BE#2 PCIC/BE#3
PCICLK PCIDEVSEL# PCIFRAME# PCIGNT# PCIINTA# PCIIRDY# PCIPAR PCIREQ# PCIRST# PCISTOP# PCITRDY#
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
NV17M
3
PROPRIETARY NOTE
A1
GND
A4
GND
A6
GND
A10
GND
A14
GND
A18
GND
A22
GND
A26
GND
A30
GND
B2
GND
B29
GND
C1
GND
C3
GND
C28
GND
D4
GND
D6
GND
D8
GND
D10
GND
D12
GND
D14
GND
D16
GND
D18
GND
D20
GND
D22
GND
D24
GND
D27
GND
D30
GND
E1
GND
E5
GND
E26
GND
F27
GND
F30
GND
G4
GND
H12
GND
H18
GND
H27
GND
J1
GND
K27
GND
K30
GND
L4
GND
L12
GND
L16
GND
L18
GND
M8
GND
M11
GND
M12
GND
M13
HOST INTERFACE PCI/AGP INTERFACE
GND
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
M14 M15 M16 M17 M18 M19 M27 N1 N12 N13 N14 N15 N16 N17 N18 N19 N20 N23 P12 P13 P14 P15 P16 P17 P18 P19 P27 P30 R12 R13 R14 R15 R16 R17 R18 R19 R20 T11 T12 T13 T14 T15 T16 T17 T18 T19 T27 U12 U13 U14
3
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
1
Compal Electronics, Inc.
Title
nVIDIA NV17M (AGP BUS)
Size Do cum e nt Number R e v
LA1731 1.0
B
Dat e : Sheet
2
期二 十二月
1
of
13 46¬P , 31, 2002
5
NMAA[0..13]17,18 NMD[0..127]17,18 NDQM[0..15]17,18
NMAA[0..13] NMD[0..127] NDQM[0..15]
4
3
NMA B [4 ..7 ]17,18
NMAB[4..7]
2
1
AD28 AD26 AC27 AC26 AC29 AB26 AB28 AC30 AA27 AA26 AA29
W26
AA30
W28 W27
G27
G26
AK8
AK10
Y26
F29 H26
E30 E29 D29 E28
C30 E27 B30 C29 A29 B28 B27 A28
E22 A25 B23 C23 A23 E21 C21 B22 D17 C18 E16 B17 A17 A15 B15 E15 B10 E12
E11
U22B
FBD0 FBD1 FBD2 FBD3 FBD4 FBD5 FBD6 FBD7 FBD8 FBD9 FBD10 FBD11 FBD12 FBD13 FBD14 FBD15 FBD16 FBD17 FBD18 FBD19 FBD20 FBD21 FBD22 FBD23 FBD24 FBD25 FBD26 FBD27 FBD28 FBD29 FBD30 FBD31
FBD32 FBD33 FBD34 FBD35 FBD36 FBD37 FBD38 FBD39 FBD40 FBD41 FBD42 FBD43 FBD44 FBD45 FBD46 FBD47 FBD48 FBD49
B9
FBD50
A9
FBD51 FBD52
B7
FBD53
C9
FBD54
C8
FBD55
E3
FBD56
F4
FBD57
F3
FBD58
D1
FBD59
F2
FBD60
E2
FBD61
H4
FBD62
G3
FBD63 NC9
NC10
+2.5VS
SDRAM/SGRAM FRAMEBUFFER INTERFACE
GPIO
NC
NV17M
FBAA0 FBAA1 FBAA2 FBAA3 FBAA4 FBAA5 FBAA6 FBAA7 FBAA8
FBAA9 FBAA10 FBAA11 FBAA12 FBAA13 FBAA14
FBACAS# FBARAS#
FBAWE#
FBACLK0
FBACLK0#
FBACLK1
FBACLK1#
FBDQM0 FBDQM1 FBDQM2 FBDQM3 FBDQM4 FBDQM5 FBDQM6 FBDQM7
FBDQS0 FBDQS1 FBDQS2 FBDQS3 FBDQS4 FBDQS5 FBDQS6 FBDQS7
FBACS0# FBACS1#
FBACKE FBVREF GPIOD0
GPIOD1 GPIOD2 GPIOD3 GPIOD4 GPIOD5 GPIOD6 GPIOD7
NC0 NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8
T28 U30 T26 P29 R29 R30 R26 P28 N27 P26 N26 M28 K29 J29 N30
L30 L29 N29
R28 R27 L27 L28
AB29 AE30 C27 F26 B18 E17 E10 K4
AC28 Y28 F28 D26 C22 C17 C10 H5
N28 M26
K28 D23 B5
E8 D7 C7 B6 A5 A3 J5
C16 G28 J4 AF2 AF12 AG27 AH12 AH13 AJ12
NMD0 NMD1
D D
C C
B B
NMD2 NMD3 NMD4 NMD5 NMD6 NMD7 NMD8 NMD9 NMD10 NMD11 NMD12 NMD13 NMD14 NMD15 NMD16 NMD17 NMD18 NMD19 NMD20 NMD21 NMD22 NMD23 NMD24 NMD25 NMD26 NMD27 NMD28 NMD29 NMD30 NMD31
NMD32 NMD33 NMD34 NMD35 NMD36 NMD37 NMD38 NMD39 NMD40 NMD41 NMD42 NMD43 NMD44 NMD45 NMD46 NMD47 NMD48 NMD49 NMD50 NMD51 NMD52 NMD53 NMD54 NMD55 NMD56 NMD57 NMD58 NMD59 NMD60 NMD61 NMD62 NMD63
NMAA0 NMAA1 NMAA2 NMAA3 NMAA4 NMAA5 NMAA6 NMAA7 NMAA8 NMAA9 NMAA10 NMAA11 NMAA12 NMAA13
NMCAS# NMRAS# NMWE#
NMCLKA0 NMCLKA0# NMCLKA1 NMCLKA1#
NDQM0 NDQM1 NDQM2 NDQM3 NDQM4 NDQM5 NDQM6 NDQM7
NDQS1 NDQS2
NDQS5 NDQS6
NMCS0#
NMCKE# FBVREF
1 2
R642 @0
ENVEE ENVDD
1 2
R643 @0
NMCAS# 17,18 NMRAS# 17,18 NMWE# 17,18
NMCLKA0 18 NMCLKA0# 18 NMCLKA1 18 NMCLKA1# 18
NDQS1 18 NDQS2 18
NDQS5 17 NDQS6 17
NMCS0# 17,18
ENVEE 19,33 ENVDD 19
N_SUS_STAT#
VGA_PM 16
VGA_SS 15
R404 10K
12
+3VS
NMD64 NMD65 NMD66 NMD67 NMD68 NMD69 NMD70 NMD71 NMD72 NMD73 NMD74 NMD75 NMD76 NMD77 NMD78 NMD79 NMD80 NMD81 NMD82 NMD83 NMD84 NMD85 NMD86 NMD87 NMD88 NMD89 NMD90 NMD91 NMD92 NMD93 NMD94 NMD95
NMD96 NMD97 NMD98 NMD99 NMD100 NMD101 NMD102 NMD103 NMD104 NMD105 NMD106 NMD107 NMD108 NMD109 NMD110 NMD111 NMD112 NMD113 NMD114 NMD115 NMD116 NMD117 NMD118 NMD119 NMD120 NMD121 NMD122 NMD123 NMD124 NMD125 NMD126 NMD127
AH30 AG29 AG28
AF28 AF29 AE28 AE27
AG30
W29 W30
U27 U29 U28 U26
G30 K26
H28 G29
E24 D25 A27 C26 E23 B26 C24 B25
E20 D21 A21 B21 D19 E19 B19 A19 C15 D15 B14 E14 C13 D13 E13 C12
AK13 AK17 AK21 AK25 AK29
V28 V26
J30 L26
J28
J26
U22C
FBD64 FBD65 FBD66 FBD67 FBD68 FBD69 FBD70 FBD71 FBD72 FBD73 FBD74 FBD75 FBD76 FBD77 FBD78 FBD79 FBD80 FBD81 FBD82 FBD83 FBD84 FBD85 FBD86 FBD87 FBD88 FBD89 FBD90 FBD91 FBD92 FBD93 FBD94 FBD95
FBD96 FBD97 FBD98 FBD99 FBD100 FBD101 FBD102 FBD103 FBD104 FBD105 FBD106 FBD107 FBD108 FBD109 FBD110 FBD111
C6
FBD112
C5
FBD113
D3
FBD114
E6
FBD115
E4
FBD116
A2
FBD117
B3
FBD118
F5
FBD119
M5
FBD120
L3
FBD121
M2
FBD122
M4
FBD123
N5
FBD124
M1
FBD125
N4
FBD126
N3
FBD127 GND
GND GND GND GND
NV17M
SDRAM/SGRAM FRAMEBUFFER INTERFACE
Power Supply
FBBA4 FBBA5 FBBA6 FBBA7
FBBCLK0
FBBCLK0#
FBBCLK1
FBBCLK1#
FBDQM8
FBDQM9 FBDQM10 FBDQM11 FBDQM12 FBDQM13 FBDQM14 FBDQM15
FBDQS8
FBDQS9
FBDQS10 FBDQS11 FBDQS12 FBDQS13 FBDQS14 FBDQS15
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
B13 A13 A11 B11
C11 D11 E9 D9
AE29 AA28 D28 E25 C19 E18 E7 L5
AE26 V29 J27 C25 C20 C14 D5 M3
A8 A12 A16 A20 A24 B8 B12 B16 B20 B24 G1 G2 H29 H30 M29 M30 T29 T30 Y29 Y30 AD29 AD30
AB30 AC13 AC19 AD27 AF3 AF25 AF26 AF30 AG7 AG9 AG11 AG13 AG15 AG17 AG19 AG21 AG23 AH28 AK6
NMAB4 NMAB5 NMAB6 NMAB7
NMCLKB0 NMCLKB0# NMCLKB1 NMCLKB1#
NDQM8 NDQM9 NDQM10 NDQM11 NDQM12 NDQM13 NDQM14 NDQM15
+2.5VS
+2.5VS
+2.5VS
+2.5VS
+2.5VS
12
C199 470PF
12
C74 470PF
12
C85 4700PF
12
C64
0.047UF
NMCLKB0 17 NMCLKB0# 17 NMCLKB1 17 NMCLKB1# 17
12
C197 470PF
12
C100 470PF
12
C134 4700PF
12
C116
0.047UF
12
C195 470PF
12
C126 470PF
12
C202 4700PF
12
C158
0.047UF
12
C193 470PF
12
C147 470PF
12
C198 4700PF
12
C200
0.047UF
12
C163 470PF
12
C167 470PF
12
C194 4700PF
12
C196
0.047UF
12
12
C201 470PF
C179 4700PF
R83
1K_1%_0603
A A
5
R84 1K_1%_0603
1 2
(10mil)
12
C183 .1UF_X5R
1 2
Place clost to the NV17M
FBVREF
Plece at T-Point
NMCKE#
12
R69
10K
4
12
C148
@.1UF_X5R
PROPRIETARY NOTE
NMCKE# 17,18
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
+2.5VS
12
C168
4.7UF_0805
12
C222
4.7UF_0805
12
C122
4.7UF_0805
Compal Electronics, Inc.
Title
nVIDIA NV17M (DDR)
Size Do cum e nt Number R e v
LA1731 1.0
B
Dat e : Sheet
期二 十二月
1
of
14 46¬P , 31, 2002
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