Compal LA-1682 Abacus-MT, Inspiron 5160 Schematic

A

B

COMPAL CONFIDENTIAL

C

D

E

1 1

MODEL NAME :

Abacus-MT

COMPAL P/N :
PCB NO :
Revision :

2 2

LA-1682

0.2

Abacus-MT Schematics Document

uFCBGA/uFCPGA NorthWood MT

2003-02-25

3 3

4 4

Dell-Compal Confidential

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev

Abacus-MT LA-1682

Date: Sheet of

Compal Electronics, Inc.

Cover Sheet

E

0.2

144Tuesday, February 25, 2003

A

Compal confidential

B

C

D

E

Block Diagram

Model : Abacus-MT

NorthWood-MT

1 1

2 2

Fan Control 1

+12V

Fan Control 2

+5VS

LVDS Connector

TV OUT

CRT Connector

LVDS Connector

on M/B Board

page 7

page 7

on VGA Board

page 19

page 19

page 18

Mainstream

Value

CPU Bypass

page 7

PIRQE#

AGP Conn

page 17

AGP4X(1.5V)

CRT Signal

Internal LVDS

+1.2VP
+CPU_CORE

+1.5VS
+2.5V
+1.25VS
+CPU_CORE

Prescott-MT
uFCPGA CPU

478pin

System Bus

400/533 MHz

INTEL

Montara-GT

732 BGA

HUB LINK 1.5

+1.5VS
66MHz

page 5,6

HD#(0..63)HA#(3..31)

page 9,10,11,12

CPU ITP Port
and VID

page 8

Memory
BUS(DDR)

Thermal Sensor

ADM1032

+5VS +3VS

+2.5V 200/266/333MHz

page 6

Clock Generator

ICS950810

DDR-DIMM X2

BANK 0, 1, 2, 3

+2.5V
+1.25VS

page 13,14,15

page 16

+3VS 33MHz

IDSEL:AD18
(PIRQC,D#,GNT#1,REQ#1)

Debug

+5VS

page 35

3 3

Minipci CONN

WIRELESS

+3V
+3VS
+5VS

page 28

LAN
BCM-4401L

+3V +3V

Power On/Off
Reset & RTC

page 34

IDSEL:AD17
(PIRQB#,GNT#0,REQ#0)

page 24

RJ45

page 24

DC/DC Interface
Suspend

Card Bus

SLOT CONN

page 26

page 35

PCI BUS

IDSEL:AD20
(PIRQA#,GNT#2,REQ#2)

CardBus
& 1394

PCI4510

page 25,26,27

1394

page 25

+3VS
+3VALW
+1.5VS
+1.5VALW
+CPU_CORE
VCC5REF
VCC5REFSUS

LPC BUS

Touch Pad

LID Switch

+5VS

page 31

INTEL
ICH4-M
421 BGA

NS PC87591L

Embedded
Controller

+3VS
+3VALW

page 20,21,22

+3VS
33MHz

page 32

Ext. IO

Int.KBD

page 33

page 33

48MHz

24.576MHz

IDE HDD

+5VS

page 23

ATA100

CD-ROM

+5VS

PIDE IRQ14SIDE IRQ15

USB 2.0/1.1

AC-LINK

IDE

page 23

AMP & INT.
Speaker

+5VALW +5VDDA

AC97 Codec

STAC9750

+5VDDA

page 30

2X USB Ports

+3VALW
+5VALW

page 29

HeadPhone &
MIC Jack

page 30

page 34

MDC

+3VALW
+3V

RJ11

Cable

page 31

Cable

Power Circuit

4 4

DC/DC

page
36,37,38,39,40,41

A

LED Indicator
Connector

page 34

B

EC DEBUG

+3VALW

page 32

BIOS

+3VALW

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

page 33

D

Dell-Compal Confidential

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Abacus-MT LA-1682

Block Diagram

E

of

244Tuesday, Feb ru ar y 25, 2003

0.2

5

4

3

2

1

Power Managment table

ST2, ST1, ST0 Trip (C0 bit 2:0)

FSB MEMORY GFX-LOW GFX-HIGH Cfg#

000

D D

001
010
011
100
101
110
111

400
400
400
400
533
533
533
400

266
200
200
266
266
266
333
333

133
100
100
133
133
133
166
166

200
200
133
266
200
266
266
250

MHz

Signal
0
1
2

State

3

+1.5VALW
+3VALW
+5VALW
+12VALW
+12V_FAN

+3V
+2.5V

4
5

S0

ON

ON ON

6
7

S1

S3

S5 S4/AC

S5 S4/AC don't exist

ON ON ON

ON ON

ON OFF

OFF OFF OFF

Ceramic Capacitor Spec Guide:

C C

Temperature Characteristics:

Z5V

J

SL

1

Z5P

A

BJ

Symbol

CODE

0

Z5U

8

NP0 SH

H

UJ

9

C0G SJ

I

UK

3

2

Y5U X7R

C

B

CH

4

Y5V Y5P

D

CJ

5

E

CK

X5R

6

7

Item

1@
2@

F

G

@ DEPOP

Function Note

Value

no TV, 1394,

Mainstream

+3VS
+5VS
+1.5VS
+1.2VP
+CPU_CORE
+1.25VS

OFF

OFF

Bringup-Build

SST-Build

PT-Build

ST-Build

QT-Build

PCB Rev

0.1

Data

SCHEMATICS VERSION LIST

VERSION ISSUE DATE REMARK

0.0A

12/30/2002

First Release

Tolerance:

F

V

+20,-10%

K

A

+-0.05PF

M

+-20%

Symbol

CODE

B B

+-10%

B

+-0.1PF

N

+-30%

C

+-0.25PF

P

+100,-0%

D

+-0.5PF +-1PF

Q

+30,-10%

G

+-2%

X

+40,-20%

H

+-3%

Z

+80,-20%

J

+-5%

SMBUS Control Table

SOURCE

INVERTER BATT

SERIAL SENSOR
EEPROM

THERMAL
(CPU)

THERMAL
SENSOR
(LM75)

SODIMM CLK CHIP

MINI PCI

LCD

VGA Thermal

ADM1032

SMB_EC_CK1
SMB_EC_DA1

SMB_EC_CK2
SMB_EC_DA2

SMB_CLK
SMB_CDATA

A A

LCD_DDCCLK
LCD_DDCDATA

PC87591L

PC87591L

ICH4-M

M-GT

5

Dell-Compal Confidential

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Note & Revision
Abacus-MT LA-1682

1

0.2

344Tuesday, February 25, 2003

5

4

3

2

1

PU22

FAN5234

page 39

+1.5VALW

U66

SUSP#

+1.5VS

page 35

+5VALW

D D

+5VALW

SHDN#

PU8

MAX1632

page 38

+3VALW

C C

page 36

PU21

+12VALW

U31

SUSP#

Q6

SIDEPWR

U26

SUSP#

U70

SYSON

U20

SUSP#

+5VS

page 35

+5VSHDD

page 23

+5VDDA

page 29

+3V

page 35

VR_ON

+3VS

page 35

PU27

AC

Battery

page 36

B+

LM3485

page 38

ENLL

+12VFANP

PU23

Mobile

ISL6247

+CPU_CORE

CM2843

page 41

+1.2VP

JP8

+5VS

page 41

B B

SUSP#

PU20

ISL6225

+1.25VS

+3VS
+1.5VS
+2.5V

VGA Conn.
180 pin

SYSON

page 40

+2.5V

+3V
+5VALW
+12VALW

B+

A A

Dell-Compal Confidential

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

2

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

POWER DIAGRAM

Abacus-MT LA-1682

page 17

1

0.2

of

444Tuesday, Feb ru ar y 25, 2003

5

D D

A10

A12

A14

A16

A18

JCPU1A

HA#[3..31]<9> HD#[0..63] <9>

C C

H_REQ#[0..4]<9>

+CPU_CORE

B B

H_REQ#[0..4]

H_ADS#<9>

R284 56 _0402_1%

1 2

R301 220_0402_5%

1 2

H_BREQ0#<9>

H_BPRI#<9>
H_BNR#<9>
H_LOCK#<9>

CLK_CPU_BCLK<16>
CLK_CPU_BCLK#<16>

H_HIT#<9>
H_HITM#<9>

H_DEFER#<9>

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_ADS#

CLK_CPU_BCLK
CLK_CPU_BCLK#

K2

A#3

K4

A#4

L6

A#5

K1

A#6

L3

A#7

M6

A#8

L2

A#9

M3

A#10

M4

A#11

N1

A#12

M1

A#13

N2

A#14

N4

A#15

N5

A#16

T1

A#17

R2

A#18

P3

A#19

P4

A#20

R3

A#21

T2

A#22

U1

A#23

P6

A#24

U3

A#25

T4

A#26

V2

A#27

R6

A#28

W1

A#29

T5

A#30

U4

A#31

V3

A#32

W2

A#33

Y1

A#34

AB1

A#35

J1

REQ#0

K5

REQ#1

J4

REQ#2

J3

REQ#3

H3

REQ#4

G1

ADS#

AC1

AP#0

V5

AP#1

AA3

BINIT#

AC3

IERR#

H6

BR0#

D2

BPRI#

G2

BNR#

G4

LOCK#

AF22

BCLK0

AF23

BCLK1

CON

F3

HIT#

TROL

E3

HITM#

E2

DEFER#

FOX_PZ47803-274A-42_Prescott

A20

VCC_0

VCC_1

VCC_2

VCC_3

VCC_4

HOST
ADDR

CONTROL

CLK

VSS_0H1VSS_1H4VSS_2

H23

H26

VCC_5

VSS_3

A11

AA10

AA12

VCC_6A8VCC_7

VSS_4

VSS_5

A13

A15

AA14

VCC_8

VSS_6

A17

AA16

VCC_9

VSS_7

A19

4

AA18

VCC_10

VCC_11

VSS_8

VSS_9

A21

AA8

VCC_12

VSS_10

A24

AB11

VCC_13

VSS_11

A26

AB13

VCC_14

VSS_12A3VSS_13A9VSS_14

AB15

AB17

VCC_15

AA1

AB19

VCC_16

VCC_17

VSS_15

AA11

AB7

VCC_18

VSS_16

AA13

AB9

VCC_19

VSS_17

AA15

AC10

VCC_20

VSS_18

AA17

AC12

VCC_21

VSS_19

AA19

AC14

VCC_22

VSS_20

AA23

AC16

AC18

AC8

AD11

AD13

AD15

AD17

AD19

AD7

AD9

AE10

AE12

AE14

AE16

AE18

AE20

AE6

VCC_23

VCC_24

VCC_25

VCC_26

VCC_27

VCC_28

VCC_29

VCC_30

VCC_31

VCC_32

VCC_33

VCC_34

VCC_35

VCC_36

VCC_37

VCC_38

VCC_39

POWER

Northwood-MT
Prescott-MT

GND

VSS_21

VSS_22

VSS_23

VSS_24

VSS_25

VSS_26

VSS_27

VSS_28

VSS_29

VSS_30

VSS_31

VSS_32

VSS_33

VSS_34

VSS_35

VSS_36

VSS_37

AA4

AA7

AA9

AA26

AB10

AB12

AB3

AB6

AB14

AB16

AB18

AB8

AB20

AB21

AB24

AC11

AC13

AE8

VCC_40

VSS_38

AC15

AF11

VCC_41

VSS_39

AC17

3

AF13

AF15

VCC_42

VSS_40

AC2

AC19

AF17

VCC_43

VCC_44

VSS_41

VSS_42

AC22

AF19

VCC_45

VSS_43

AC25

AF2

VCC_46

VSS_44

AC5

AF21

VCC_47

VSS_45

AC7

AF5

VCC_48

VSS_46

AC9

AF7

VCC_49

VSS_47

AD10

AF9

VCC_50

VSS_48

AD12

B11

B13

VCC_51

VSS_49

AD14

AD16

B15

VCC_52

VCC_53

VSS_50

VSS_51

AD18

B17

VCC_54

VSS_52

AD21

B19

VCC_55

VCC_56B7VCC_57B9VCC_58

VSS_53

VSS_54

AD4

AD23

2

+CPU_CORE

C10

C12

C14

C16

C18

C20

D11

D13

D15

D17

D19

D9

E10

HD#[0..63]HA#[3..31]

VCC_59

VCC_61

VCC_62

VCC_63

VCC_64

VCC_65C8VCC_66

VCC_67

VCC_68

VCC_69

VCC_70

VCC_71D7VCC_72

VCC_73

D#0
D#1
D#2
D#3
D#4
D#5
D#6
D#7
D#8

D#9
D#10
D#11
D#12
D#13
D#14
D#15
D#16
D#17
D#18
D#19
D#20
D#21
D#22
D#23
D#24
D#25
D#26
D#27
D#28
D#29

VCC_75

VCC_76

E14

E12

VCC_74

+CPU_CORE

D#30
D#31
D#32
D#33
D#34
D#35
D#36
D#37
D#38
D#39
D#40
D#41
D#42
D#43
D#44
D#45
D#46
D#47
D#48
D#49
D#50
D#51
D#52
D#53
D#54
D#55
D#56
D#57
D#58
D#59
D#60
D#61
D#62
D#63

HOST
ADDR

POWER

VCC_77

VCC_78

VCC_81

VCC_82

F15

VCC_83

F17

VCC_84

F19

VCC_85

F9

VCC_79E8VCC_80

F11

E16

E18

E20

BOOTSELECT

VSS_55

F13

AD1

AD8

B21
B22
A23
A25
C21
D22
B24
C23
C24
B25
G22
H21
C26
D23
J21
D25
H22
E24
G23
F23
F24
E25
F26
D26
L21
G26
H24
M21
L22
J24
K23
H25
M23
N22
P21
M24
N23
M26
N26
N25
R21
P24
R25
R24
T26
T25
T22
T23
U26
U24
U23
V25
U21
V22
V24
W26
Y26
W25
Y23
Y24
Y21
AA25
AA22
AA24

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

1

A A

NWD: L PSD: H

PSD Pull-up internal

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

BOOTSELECT <41>

2

Dell-Compal Confidential

Compal Electronics, Inc.

Title

Prescott / P4 uFCPGA (1/2)

Size Document Number Rev

Abacus-MT LA-1682

Custom
Date: Sheet of

544Tuesday, February 25, 2003

1

0.2

5

AB2

AB23

AB25

AD6
AD5

AC6

AB5

AC4

AA5
AB4

AD20
AE23

AF3

AD22

AC26
AD26

JCPU1B

F1

G5

F4
J6

C6
B6
B2
B5

Y4
D1

E5

W5

H5
H2

B3
C4

A2

Y6

D4
C1
D5
F7
E6

A5
A4

L24

P1

+CPU_CORE

1 2

D D

C C

B B

R279 51_0402_5%

1 2

R262 51_0402_5%

1 2

R272 51_0402_5%

1 2

R268 51_0402_5%

1 2

R296 51_0402_5%

1 2

R278 51_0402_5%

1 2

R291 51_0402_5%

1 2

R288 300_0402_5%

+IOPLL

0_0603_5%

R207

1 2

R206 @0_0603_5%

1 2

L24

1 2

LQG21F4R7N00_0805

1 2

LQG21F4R7N00_0805

L25

@1U_0603_10V6K

CLK_CPU_ITP<16>
CLK_CPU_ITP#<16>

CLK_ITP<8>
CLK_ITP#<8>

R572 49.9_0402_1%

1 2

R573 49.9_0402_1%

1 2

+CPU_CORE

H_RS#[0..2]<9>

H_RESET#
ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5

H_PWRGD

+CPU_CORE

+CPU_CORE

+1.2VP

1

+

C644

2

C320

2

33U_D2_16VM

1

RP62

0_4P2R_0402_5%

GTL Reference Voltage

Layout note :

H_RS#[0..2]

H_TRDY#<9>

H_A20M#<20>

H_FERR#<20>
H_IGNNE#<20>
H_SMI#<20>
H_PWRGD<20>
H_STPCLK#<20>

H_INTR<20>
H_NMI<20>
H_INIT#<20>
H_RESET#<8,9>

H_DBSY#<9>

H_DRDY#<9>

H_BSEL0<16>

1 2

R315 56 _0402_1%

ITP_BPM#0<8>

ITP_BPM#1<8>

ITP_BPM#2<8>

ITP_BPM#3<8>

ITP_BPM#4<8>

ITP_BPM#5<8>

ITP_TCK<8>
ITP_TDI<8>

ITP_TDO<8>
ITP_TMS<8>
ITP_TRST#<8>

VCCIOPLL

VCCA

VCCSENSE<41>
VSSSENSE<41>

+1.2VP

VSSA

RP61

@0_4P2R_0402_5%

R302 61.9_0603_1%
R300 61.9_0603_1%

23
14

ITP_CLK0
ITP_CLK1

H_RS#0
H_RS#1
H_RS#2

H_TRDY#

H_A20M#
H_FERR#
H_IGNNE#
H_SMI#
H_PWRGD
H_STPCLK#

H_INTR
H_NMI
H_INIT#
H_RESET#

H_DBSY#
H_DRDY#
H_BSEL0

H_THERMDA
H_THERMDC

H_THERMTRIP#

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5

ITP_TCK
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#

VCCSENSE
VSSSENSE

ITP_CLK0

14

ITP_CLK1

23

1 2
1 2

Comp0/1 need keep 25
mils trace width

FOX_PZ47803-274A-42_Prescott

1. Place R_A and R_B near CPU (Within 1.5").

R265

60.4_0603_1%

+H_GTLREF

A A

12

R261
102_0603_1%

1

C319
1U_0603_6.3V6M

2

SMB_EC_CK2<8,32>

SMB_EC_DA2<8,32>

Intel change to 0.63VCC, then 60.4/102

5

H_THERMDA

2200P_0603_50V7K

H_THERMDC

CPU Temperature Sensor

4

GND H_SKTOCC#

AE11

AE13

AE15

AE17

AE19

AE22

AE24

AE7

AE9

AF1

AF10

AF12

AF14

AF16

AF18

AF20

AF6

AF8

B10

B12

B14

B16

B18

B20

B23

B26

VSS_57

VSS_58

VSS_59

VSS_60

VSS_61

VSS_62

VSS_63

VSS_65

VSS_66

VSS_67

VSS_68

VSS_69

VSS_70

VSS_71

VSS_72

VSS_73

VSS_75

VSS_76

VSS_77

VSS_78

VSS_79

VSS_80

VSS_81

VSS_82

VSS_83

VSS_84

RS#0
RS#1
RS#2
RSP#
TRDY#

CON
TROL

A20M#
FERR#
IGNNE#
SMI#
PWRGOOD
STPCLK#

LINT0

LEGACY

LINT1
INIT#
RESET#

DBSY#
DRDY#
BSEL0
BSEL1

THERMDA
THERMDC

THERMTRIP#

BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5

TCK
TDI
TDO
TMS
TRST#

VCCIOPLL
VCCA

VCCSENSE
VSSSENSE
VCCVIDLB

VSSA

ITP_CLK0
ITP_CLK1

COMP0
COMP1

C470

MISC

THER
MAL

MISC

MISC

ITP
CLK

VSS_129F8VSS_130

VSS_131

G21

G24

1

2

4

ITP

VSS_132G3VSS_133G6VSS_134J2VSS_135

J22

+5VS

8.2K_0402_5%

12

R334

J25

VSS_136

VSS_137J5VSS_138

VSS_139

VSS_140K3VSS_141K6VSS_142L1VSS_143

K21

K24

12

R333

8.2K_0402_5%

VSS_144

VSS_145L4VSS_146M2VSS_147

L23

L26

U57

2

D+

3

D-

8

SCLK

7

SDATA

ADM1032ARM_RM8

M22

M25

+5VS

ALERT#

THERM#

VSS_148

VSS_149M5VSS_150

1

2

VDD1

GND

VSS_85B4VSS_86B8VSS_87

Northwood-MT
Prescott-MT

GROUND MISC

VSS_151

VSS_152N3VSS_153N6VSS_154P2VSS_155

P22

N21

P25

N24

C174

0.1U_0402_16V4Z

1
6
4
5

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

C11

VSS_156

VSS_157P5VSS_158R1VSS_159

C13

C15

C17

C19

VSS_88

VSS_89

VSS_90

VSS_91

GROUND

VSS_160

VSS_161R4VSS_162

R23

R26

12

R337

@10K_0402_5%

3

C22

VSS_92C2VSS_93

T21

T24

3

C25

VSS_94

VSS_95C5VSS_96C7VSS_97C9VSS_98

VSS_163

VSS_164T3VSS_165T6VSS_166U2VSS_167

SHDN_1632#<36,38>

U22

D10

VSS_168

U25

D14

D16

D12

VSS_99

VSS_100

VSS_169U5VSS_170V1VSS_171

V23

PCIRST#<10,17,20,24,25,27,28,32,35>

VSS_101

D18

V26

VSS_102

VSS_172

D20

D21

VSS_103

VSS_173V4VSS_174

W21

D24

VSS_104

VSS_105

VSS_106D3VSS_107D6VSS_108D8VSS_109E1VSS_110

VSS_175

VSS_176W3VSS_177W6VSS_178Y2VSS_179

W24

E11

E13

E15

VSS_111

VSS_112

VSS_180

VSS_181

Y5

Y22

Y25

Q62
2N7002_SOT23

D

1 3

G

2

E17

S

E19

VSS_113

VSS_114

CPU_VID0

E23

AE5

E26

VSS_115

VID0

AE4

CPU_VID1

VSS_116

VSS_117E4VSS_118E7VSS_119E9VSS_120

VID1

VID2

VID3

VID4

AE3

AE2

AE1

CPU_VID2

CPU_VID4

CPU_VID3

3 1

MMBT3904_SOT23

F10

AD3

CPU_VID5

Q64

F12

VSS_121

VID5

2

2

F14

F16

F18

F22

VSS_122

VSS_123

VSS_124

VSS_125F2VSS_126

REF

ITP

DATA

ADDR

DATA

MISC

VIDPWRGD

R467

AD2

2.43K_0603_1%

+CPU_CORE

12

3 1

2

R267
@33_0402_5%

AF26

F25

F5

VSS_127

VSS_128

SKTOCC#

GTLREF0
GTLREF1
GTLREF2
GTLREF3

OPTIMIZED/COMPAT#

TESTHI0
TESTHI1
TESTHI2
TESTHI3
TESTHI4
TESTHI5
TESTHI6
TESTHI7
TESTHI8

TESTHI9
TESTHI10
TESTHI11
TESTHI12

DSTBN#0
DSTBN#1
DSTBN#2
DSTBN#3

DSTBP#0
DSTBP#1
DSTBP#2
DSTBP#3

ADSTB#0
ADSTB#1

PROCHOT#

MCERR#

VCCVID

AF4

12

+1.2VP

H_VID_PWRGD <35>

CPU_VID[0..5] <8,41>

R316
470_0402_5%

R320

1 2

470_0402_5%

2

Q59
MMBT3904_SOT23

DP#0
DP#1
DP#2
DP#3

DBI#0
DBI#1
DBI#2
DBI#3

DBR#

SLP#

NC1
NC2
NC3
NC4
NC5

1

R269 and R317 depop for desktop CPU

12

J26
K25
K26
L25

AA21
AA6
F20
F6

AE26

AD24
AA2
AC21
AC20
AC24
AC23
AA20
AB22
U6
W4
Y3

H_GHI#

A6

H_DPSLPR#

AD25

H_DSTBN#0

E22

H_DSTBN#1

K22

H_DSTBN#2

R22

H_DSTBN#3

W22

H_DSTBP#0

F21

H_DSTBP#1

J23

H_DSTBP#2

P23

H_DSTBP#3

W23

H_ADSTB#0

L5

H_ADSTB#1

R5

H_DBI#0

E21

H_DBI#1

G25

H_DBI#2

P26

H_DBI#3

V21
AE25

C3
V6
AB26

A22
A7
AF25
AF24
AE21

H_THERMTRIP#

H_DPSLPR#
H_GHI#

+H_GTLREF

H_PROCHOT#

H_SLP#

+1.2VP

1

C317

0.1U_0402_16V4Z

2

PROCHOT#<21,33>

H_THERMTRIP# <21>

1 2

56_0402_5%

1 2

56_0402_5%

1 2
1 2
1 2
1 2
1 2
1 2
1 2

H_DBR#

100K_0402_1%

H_PROCHOT#<39>

0_0402_5%

1 2
1 2

R317

0_0402_5%

1

C318
220P_0603_50V8J

2

+CPU_CORE

R285
R275

H_DSTBN#[0..3]

H_DSTBP#[0..3]

H_DBI#[0..3]

1 2

R311

1 2

H_SLP# <20>

1K_0402_5%

R269

R293 56_0402_5%
R276 56_0402_5%
R294 56_0402_5%
R464 56_0402_5%
R465 56_0402_5%
R466 300_0402_5%
R318 @56_0402_5%

@0_0402_5%

R303

H_ADSTB#0 <9>
H_ADSTB#1 <9>

R266

+3VS

1 2

3 1

H_PROCHOT#

H_DPSLP# <10,20>

PM_CPUPERF# <21>

H_DSTBN#[0..3] <9>

H_DSTBP#[0..3] <9>

H_DBI#[0..3] <9>

SYSRST# <21>

H_DBR# <8>

+CPU_CORE

+CPU_CORE

2

Q26
MMBT3904_SOT23

R307
470_0402_5%

1 2

Dell-Compal Confidential

Compal Electronics, Inc.

Title

Prescott / P4 uFCPGA & Thermal sensor (2/2)

Size Document Number Rev

Abacus-MT LA-1682

Custom
Date: Sheet of

644Tuesday, February 25, 2003

1

0.2

A

Layout note :

1 1

+CPU_CORE

2 2

+CPU_CORE

Place close to CPU, Use 2~3 vias per PAD.
Place 22uF caps x31 pcs, populated 14pcs.

1

C655
@22U_1210_6.3V6M

2

1

C666
@22U_1210_6.3V6M

2

B

1

C656
22U_1210_6.3V6M

2

1

C667
22U_1210_6.3V6M

2

C

Place on CPU inside

1

C657
22U_1210_6.3V6M

2

1

C668
22U_1210_6.3V6M

2

1

C658
@22U_1210_6.3V6M

2

1

C669
22U_1210_6.3V6M

2

1

C670
22U_1210_6.3V6M

2

D

1

C671
22U_1210_6.3V6M

2

E

Layout note :

Place close to CPU power and
ground pin as possible
(<1inch)

For Desktop's CPU:

470uFx15/10m ohm each
Total 0.67m ohm

F

+CPU_CORE

+CPU_CORE

+CPU_CORE

1

+

C645
@470U_D4_2.5VM

2

1

+

C650
@470U_D4_2.5VM

2

1

+

C661
470U_D4_2.5VM

2

G

1

+

C646
470U_D4_2.5VM

2

1

+

C651
@470U_D4_2.5VM

2

1

+

C662
@470U_D4_2.5VM

2

H

1

+

2

1

+

2

1

+

2

C647
@470U_D4_2.5VM

C652
470U_D4_2.5VM

C663
470U_D4_2.5VM

1

+

C648
@470U_D4_2.5VM

2

1

+

C653
@470U_D4_2.5VM

2

I

1

+

2

1

+

2

C649
470U_D4_2.5VM

C654
470U_D4_2.5VM

J

3 3

+CPU_CORE

1

C673
22U_1210_6.3V6M

2

4 4

+CPU_CORE

1

2

C679
@22U_1210_6.3V6M

Please place these cap on the socket north side

1

2

1

C682
@22U_1210_6.3V6M

2

1

C680
22U_1210_6.3V6M

2

1

C674
@22U_1210_6.3V6M

2

1

2

1

C681
@22U_1210_6.3V6M

2

C675
22U_1210_6.3V6M

C676
@22U_1210_6.3V6M

1

C683
22U_1210_6.3V6M

2

1

C677
22U_1210_6.3V6M

2

1

C684
@22U_1210_6.3V6M

2

Fan1 Control circuit

EN_FAN1<32>

C686

1U_0603_10V4Z

5 5

+CPU_CORE

6 6

+CPU_CORE

Please place these cap on the socket south side

1

C689
@22U_1210_6.3V6M

2

1

C694
@22U_1210_6.3V6M

2

1

C690
22U_1210_6.3V6M

2

1

C695
22U_1210_6.3V6M

2

1

C691
@22U_1210_6.3V6M

2

1

C696
@22U_1210_6.3V6M

2

1

C692
22U_1210_6.3V6M

2

1

C697
22U_1210_6.3V6M

2

1

C693
@22U_1210_6.3V6M

2

1

C698
@22U_1210_6.3V6M

2

Fan2 Control circuit

EN_FAN2<32>

7 7

Note:When use +5V Fan,
the J2 must be opened. It
prevent the +5VS short to
+12V_FAN

+12VALW

U76A

84

LM358

3

+

1

2

1

2

12

Note:R471 change to

66.5K_1%, if use +5V Fan

1

C699
1U_0603_10V4Z

2

-

1 2

C687 @2200P_0603_50V7K

R471

1 2

300K_0402_5%

R472
100K_0402_5%

C701 @2200P_0603_50V7K

FAN2_VFB

12

R477
150K_0603_5%

D47
RB751V_SOD323

U76B

LM358

5

+

6

-

1 2

R476 100K_0402_5%

1 2

D48
RB751V_SOD323

SI3457DV-T1_TSOP6

7

C678

2

0.1U_0402_16V4Z

1

FAN1_ON FAN1_TACH_ON

3

G

Q65

2 1

FAN2_ON

3

2 1

+12V_FAN

12

JOPEN

S

2451

1

+

2

2

1

G

+5VS

@FBM-11-201209-300AT_0805

J2

1 2

C672

1

0.1U_0402_16V4Z

2

1

D

6

2

C688
100U_D_16VM

6

D

Q67

S

SI3456DV-T1_TSOP6

4 5

FAN2_VOUT

1

C702
10U_1206_10V4Z

2

L53

+5VS +3VS

12

R469
10K_0402_5%

R470

1 2

C685

0.47U_1206_16V4Z

1

2

1K_0402_5%

+5VS+5VS

12

R474
10K_0402_5%

1 2

C700

0.47U_1206_16V4Z

FAN1_VOUT

FAN1_TACH_FB

1

C22
1000P_0402_50V7K

2

R475

FAN2_TACH_ON

1K_0402_5%

FAN2_TACH_FB

1

C28
1000P_0402_50V7K

2

2

C27

1

1000P_0402_50V7K

2

2

1

MOLEX_53398-0390_3P
C29
1000P_0402_50V7K

2

12

R468
10K_0402_5%

13

Q66
HMBT2222A_SOT23

Molex_53398-0410

4

4

3

3

2

2

1

1

JP28

FAN1_VOUT
FAN1_TACH_FB

+3VS

12

R473
10K_0402_5%

13

Q68
HMBT2222A_SOT23

JP29

1
2
3

FAN1_TACH <32>

JP34

1
2
3

@MOLEX_53398-0390_3P

FAN2_TACH <32>

Dell-Compal Confidential

8 8

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

C

D

E

F

G

H

Compal Electronics, Inc.

Title

CPU Decoupling CAP. & Fan control

Size Document Number Rev

Abacus-MT LA-1682

Custom
Date: Sheet

I

of

744Tuesday, F e b r u a r y 25, 2003

J

0.2

10

9

8

7

6

5

4

3

2

1

H H

G G

F F

E E

H_RESET#<6,9>

D D

CPU_VID[0..5]<6,41>

VID [0..5]

+CPU_CORE

1

2

CLK_ITP<6>
CLK_ITP#<6>

C704

@2.2P_0402_16VCJ

C703

0.1U_0402_16V4Z

H_DBR#<6>

ITP_BPM#0<6>
ITP_BPM#1<6>
ITP_BPM#2<6>
ITP_BPM#3<6>
ITP_BPM#4<6>
ITP_BPM#5<6>

1 2

R483

150_0402_5%

ITP_TRST#<6>

1

1

C705

@2.2P_0402_16VCJ

2

2

ITP_TDO<6>
ITP_TCK<6>

ITP_TMS<6>
ITP_TDI<6>

+CPU_CORE

H_DBR#

ITP_RESET#
ITP_TCK

ITP_TCK

ITP_TRST#
ITP_TMS
ITP_TDI

CPU_VID0

CPU_VID1

CPU_VID2

CPU_VID3

CPU_VID4

CPU_VID5

JP30

28

VTT1

27

VTT0

26

VTAP

25

DBR#

24

DBA#

23

BPM0#

22

GND5

21

BPM1#

20

GND4

19

BPM2#

18

GND3

17

BPM3#

16

GND2

15

BPM4#

14

GND1

13

BPM5#

12

RESET#

11

FBO

10

GND0

9

BCLKP

8

BCLKN

7

TDO

6

NC2

5

TCK

4

NC1

3

TRST#

2

TMS

1

TDI

R260 1K_0402_5%

R259 1K_0402_5%

R258 1K_0402_5%

R257 1K_0402_5%

R256 1K_0402_5%

R478 1K_0402_5%

29

GND6

GND7

@MOLEX_52435-2891

30

+3VS

12

12

12

12

12

12

VID 5 for Prescott-MT

R479

H_DBR#

1 2

150_0402_5%

R480

75_0603_1%

ITP_TDO

1 2

R481

150_0402_5%

ITP_TDI

1 2

ITP_TMS

1 2

R482

39.2_0603_1%

ITP_TRST#

R484

1 2

680_0402_5%

ITP_TCKITP_TDO

R485

1 2

27.4_0603_1%

+3VALW

+CPU_CORE

VID

43210 V

1

0
0
01
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

11

101

00

1

0

1

1

1

1111

0000

000

00

1

000

111
000
0

0

11

0

1
11110
00

10

00

1

00

1

1

0

111

1

00

1
1

0

11

1

1

1

1111

1.5750

1.5500

1.5250

1

1.5000

0

1.4750

1.4500

1.4250

1

1.4000

1.3750

1.3500

1.3250

1.3000

0

1.2750

1.2500

1.2250

1

1.2000

1.1750

1.1500

1.1250

1.1000

0

off

ITP DEBUG POINT

C C

+5VS

1

C482

0.1U_0402_16V4Z

ITP Debug Connector

SMB_EC_DA2<6,32>

SMB_EC_CK2<6,32>

SMB_EC_DA2
SMB_EC_CK2

B B

U25

1

SDA

2

SCL

3

OS#

4

GND

LM75CIMMX-5_MSOP8

VCC

8
7

A0

6

A1

5

A2

2

1 2

R351 1K_0402_5%

SMB_EC_DA2
SMB_EC_CK2

U23

1

SDA

2

SCL

3

OS#

4

GND

LM75CIMMX-5_MSOP8

VCC

A0
A1
A2

8
7

R308 10K_0402_5%

6
5

12

0.1U_0402_16V4Z
C394

1 2

1 2

R486
1K_0402_5%

+5VS

Address:1001_000X Address:1001_001X

Dell-Compal Confidential

A A

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

10

9

8

7

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

6

5

4

3

Compal Electronics, Inc.

Title

CPU VID & ITP PORT

Size Document Number Rev

Abacus-MT LA -1682

Custom
Date: Sheet

2

of

844Tuesday, F e b r u a r y 25, 2003

1

0.2

5

4

3

2

1

HA#[3..31]
H_REQ#[0..4]
HD#[0..63]

D D

C C

H_ADSTB#0<6>
H_ADSTB#1<6>

CLK_MCH_BCLK#<16>
CLK_MCH_BCLK<16>

B B

A A

H_DSTBN#[0..3]<6>

H_DSTBP#[0..3]<6>

H_DBI#[0..3]<6> H_RESET#<6,8>
HI[0..10]<20>

HUB_PSTRB<20>

HUB_PSTRB#<20>

+1.5VS

R495 27.4_0402_1%

R496 27.4_0402_1%

H_DSTBN#[0..3]

H_DSTBP#[0..3]

H_DBI#[0..3]
HI[0..10]

1 2

48.7_0603+1%

1 2
1 2

R502

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

CLK_MCH_BCLK#
CLK_MCH_BCLK

+HYSWING
+HXSWING
+HYRCOMP
+HXRCOMP

+HVREF
+HCCVREF
+HAVREF

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3

HI0
HI1
HI2
HI3
HI4
HI5
HI6
HI7
HI8
HI9
HI10

HLRCOMP
+HUB_PSWING
+HUB_VREF

AA27

AA28
AB27
AB28

AA26
AD29

AE29

HA#[3..31] <5>
H_REQ#[0..4] <5>
HD#[0..63] <5>

U77A

Montara-GT

P23

HA#3

T25

HA#4

T28

HA#5

R27

HA#6

U23

HA7#

U24

HA#8

R24

HA#9

U28

HA#10

V28

HA#11

U27

HA#12

T27

HA#13

V27

HA#14

U25

HA#15

V26

HA#16

Y24

HA#17

V25

HA#18

V23

HA#19

W25

HA#20

Y25

HA#21
HA#22

W24

HA#23

W23

HA#24

W27

HA#25

Y27

HA#26
HA#27

W28

HA#28
HA#29

Y26

HA#30
HA#31

R28

HREQ#0

P25

HREQ#1

R23

HREQ#2

R25

HREQ#3

T23

HREQ#4

T26

HADSTB#0
HADSTB#1

BCLK#
BCLK

K28

HYSWING

B18

HXSWING

H28

HYRCOMP

B20

HXRCOMP

K21

HDVREF0

J21

HDVREF1

J17

HDVREF2

Y28

HCCVREF

Y22

HAVREF

J28

HDSTBN#0

C27

HDSTBN#1

E22

HDSTBN#2

D18

HDSTBN#3

K27

HDSTBP#0

D26

HDSTBP#1

E21

HDSTBP#2

E18

HDSTBP#3

J25

DINV0#

E25

DINV1#

B25

DINV2#

G19

DINV3#

F15

CPURST#

U7

HL_0

U4

HL_1

U3

HL_2

V3

HL_3

W2

HL_4

W6

HL_5

V6

HL_6

W7

HL_7

T3

HL_8

V5

HL_9

V4

HL_10

W3

HLSTB

V2

HLSTB#

T2

HLRCOMP

U2

PSWING

W1

HLVREF

RG82G4350MA1_uFCBGA732_MONTARA-GT

HOST

HUB I/F

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8

HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

ADS#

HTRDY#

DRDY#

DEFER#

HITM#

HIT#
HLOCK#
BREQ0#

BNR#
BPRI#

DBSY#

RS#0
RS#1
RS#2

K22
H27
K25
L24
J27
G28
L27
L23
L25
J24
H25
K23
G27
K26
J23
H26
F25
F26
B27
H23
E27
G25
F28
D27
G24
C28
B26
G22
C26
E26
G23
B28
B21
G21
C24
C23
D22
C25
E24
D24
G20
E23
B22
B23
F23
F21
C20
C21
G18
E19
E20
G17
D20
F19
C19
C17
F17
B19
G16
E16
C16
E17
D16
C18

L28
M25
N24
M28
N28
N27
P27
M23
N25
P28
M26
N23
P26
M27

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

H_RS#0
H_RS#1
H_RS#2

HXSWING and HYSWING Ref. Voltage

12

R487
301_0402_1%

+HYSWING +HXSWING

1

12

R490

150_0402_1%

C706

0.1U_0402_16V4Z

2

150_0402_1%

Host data Ref. Voltage

+CPU_CORE

12

R491

49.9_0603_1%

12

R492

100_0603_1%

1

C708
1U_0402_6.3V4Z

2

1

C709

0.1U_0402_10V6K

2

Host Address Ref. Voltage

+CPU_CORE

12

R493

49.9_0603_1%

C712

+HAVREF

1

C713

2

0.1U_0402_10V6K

R497

100_0603_1%

12

1U_0402_6.3V4Z

1

2

HUBLink reference Voltage

H_ADS# <5>
H_TRDY# <6>
H_DRDY# <6>
H_DEFER# <5>
H_HITM# <5>
H_HIT# <5>
H_LOCK# <5>
H_BREQ0# <5>
H_BNR# <5>

H_BPRI# <5>

H_DBSY# <6>

H_RS#[0..2]

H_RS#[0..2] <6>

+HUB_PSWING

C716

0.01U_0402_25V7Z

+HUB_VREF

C718

0.01U_0402_25V7Z

+CPU_CORE+CPU_CORE

R489

1.Place R491 and R492 within 0.5" of U77 pin K21 J21 J17

2.Place C708 C709 C710 C711 in order from U77 to divider

3.+HVREF 10mil trace, 20mil space.

R498

100_0603_1%

1

2

1

2

1.Place R487 and R490 within 0.5" of U77 pin K28

2.Place R488 and R489 within 0.5" of U77 pin B18

3.+HYSWING, +HXSWING 10mil trace, 20mil space.

12

R488
301_0402_1%

12

1

C707

0.1U_0402_16V4Z

2

+HVREF

C714

1

C711
@0.1U_0402_10V6K

2

+HCCVREF

1

C715

2

0.1U_0402_10V6K

1

C717

0.1U_0402_10V6K

2

1

C719

0.1U_0402_10V6K

2

1

C710
@0.1U_0402_10V6K

2

+CPU_CORE

12

R494

49.9_0603_1%

12

1U_0402_6.3V4Z

+1.5VS

12

12

R500

51.1_0603_1%

12

R501

40.2_0603_1%

1

2

R499

80.6_0402_1%

Dell-Compal Confidential

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Abacus-MT LA-1682

Date: Sheet of

Compal Electronics, Inc.

Montara-GT (1/4)

1

0.2

944Tuesday, February 25, 2003

5

AGP_AD[0..31]<17>

12

D D

C C

B B

A A

12

R503

100K_0402_5%

+1.5VS_DVO

C720

0.1U_0402_10V6K

RTCCLK<21>

CLK_MCH_DISPLAY

@33_0402_5%

@10P_0402_25V8K

1@100K_0402_5%

R504

1@100K_0402_5%

R509

1 2

1@100K_0402_5%

+AGPREF

1

2

AGP_PIPE#<17>

12

R524

1

C724

2

5

1@BSS138_SOT23

AGP_AD14
AGP_AD13
AGP_AD31

12

R505

AGP_AD30

2

G

Q69

CLK_MCH_66M

@10P_0402_25V8K

AGP_AD[0..31]

+1.5VS

12

R515
1@1K_0402_5%

13

D

S

@33_0402_5%

C725

AGP_SBA[0..7]<17>

40.2_0603_1%

R525

AGP_PIPE#

R518

12

1

2

AGP_BUSY#<17,21>

12

DREFSSCLK

AGP_CBE#0<17>

AGP_ADSTB0<17>
AGP_ADSTB0#<17>

AGP_CBE#1<17>

AGP_ADSTB1<17>
AGP_ADSTB1#<17>

AGP_IRDY#<17>
AGP_DEVSEL#<17>
AGP_TRDY#<17>
AGP_FRAME#<17>
AGP_STOP#<17>

AGP_CBE#3<17>

R517 1@0_0402_5%

12

1

2

AGP_SBA[0..7]

AGP_PAR<17>

1 2

CLK_MCH_66M<16>
AGP_SBSTB<17>

AGP_SBSTB#<17>
AGP_GNT#<17>
AGP_REQ#<17>
AGP_ST2<17>
AGP_ST1<17>
AGP_ST0<17>
AGP_WBF#<17>
AGP_RBF#<17>
AGP_CBE#2<17>

R526
@33_0402_5%

C726
@10P_0402_25V8K

4

U77B

AGP_AD3
AGP_AD2
AGP_AD5
AGP_AD4
AGP_AD7
AGP_AD6
AGP_AD8

AGP_AD10

AGP_AD9

AGP_AD12
AGP_AD11

AGP_AD0
AGP_AD1

AGP_AD14
AGP_AD30

AGP_AD13

AGP_AD17
AGP_AD16
AGP_AD18
AGP_AD31

AGP_AD15

AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23

AGP_AD25
AGP_AD24
AGP_AD27
AGP_AD26
AGP_AD29
AGP_AD28

AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7

+AGPREF

CLK_MCH_66M

AGP_ST2
AGP_ST1
AGP_ST0

+1.5VS

4

Montara-GT

R3

DVOBD0/GAD3

R5

DVOBD1/GAD2

R6

DVOBD2/GAD5

R4

DVOBD3/GAD4

P6

DVOBD4/GAD7

P5

DVOBD5/GAD6

N5

DVOBD6/GAD8

P2

DVOBD7/GCBE0#

N2

DVOBD8/GAD10

N3

DVOBD9/GAD9

M1

DVOBD10/GAD12

M5

DVOBD11/GAD11

P3

DVOBCLK/GADSTB0

P4

DVOBCLK#/GADSTB0#

T6

DVOBHSYNC/GAD0

T5

DVOBVSYNC/GAD1

L2

DVOBBLANK#/GCBE1#

M2

DVOBFLDSTL/GAD14

G2

DVOBCINTR#/GAD30

M3

DVOBCCLKINT/GAD13

J3

DVOCCLK/GADSTB1

J2

DVOCCLK#/GADSTB1#

K6

DVOCHSYNC/GAD17

L5

DVOCVSYNC/GAD16

L3

DVOCBLANK#/GAD18

H5

DVOCFLDSTL/GAD31

K7

MI2CCLK/GIRDY#

N6

MI2CDATA/GDEVSEL#

N7

MDVICLK/GTRDY#

M6

MDVIDATA/GFRAME#

P7

MDDCCLK/GSTOP#

T7

MDDCDATA/GAD15

K5

DVOCD0/GAD19

K1

DVOCD1/GAD20

K3

DVOCD2/GAD21

K2

DVOCD3/GAD22

J6

DVOCD4/GAD23

J5

DVOCD5/GCBE3#

H2

DVOCD6/GAD25

H1

DVOCD7/GAD24

H3

DVOCD8/GAD27

H4

DVOCD9/GAD26

H6

DVOCD10/GAD29

G3

DVOCD11/GAD28

E5

ADDID0/GSBA0

F5

ADDID1/GSBA1

E3

ADDID2/GSBA2

E2

ADDID3/GSBA3

G5

ADDID4/GSBA4

F4

ADDID5/GSBA5

G6

ADDID6/GSBA6

F6

ADDID7/GSBA7

L7

DVODETECT/GPAR

D5

DPMS/GPIPE#

F1

GVREF

F7

AGPBUSY#

D1

DVO_GRCOMP

Y3

GCLKIN

F2

GSBSTB

F3

GSBSTB#

B2

GGNT#

B3

GREQ#

C2

GST2

C3

GST1

C4

GST0

D2

GWBF#

D3

GRBF#

L4

GCBE#2

D7

RSVD1

AA5

RSVD2

RG82G4350MA1_uFCBGA732_MONTARA-GT

R528

@1K_0402_5%

1 2

R529

1K_0402_5%

1 2

R530

1K_0402_5%

1 2

DVO

AGP_ST0

AGP_ST1

AGP_ST2

3

BLUE

BLUE#

GREEN

GREEN#

RED

RED#
HSYNC
VSYNC

DAC

REFSET

DDCACLK

DDCADATA

IYAM0
IYAM1
IYAM2
IYAM3

IYAP0

IYAP1

IYAP2

IYAP3

IYBM0
IYBM1
IYBM2
IYBM3

IYBP0

IYBP1

IYBP2

IYBP3

LVDS

ICLKAM

ICLKAP

ICLKBM

ICLKBP

DDCPCLK

DDCPDATA

PANELBKLTCTL

PANELBKLTEN

PANELVDDEN

LIBG

RSVD3
RSVD4
RSVD5

DREFCLK

DREFSSCLK

LCLKCTLA
LCLKCTLB

CLKS

DPWR#

DPSLP#

RSTIN#

PWROK

MISCNC

EXTTS0

NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8

NC9
NC10
NC11

3

C9
D9
C8
D8
A7
A8
H10
J9
E8
B6
G9

G14
E15
C15
C13
F14
E14
C14
B13
H12
E12
C12
G11
G12
E11
C11
G10
D14
E13
E10
F10

LCD_DDCCLK

B4

LCD_DDCDATA

C5
G8

PANEL_BKEN

F8
A5

A10
D12

F12
B12

CLK_MCH_DISPLAY

B7

DREFSSCLK

B17
H9
C6

AA22
Y23
AD28

J11
D6

B1
AH1
A2
AJ2
A28
AJ28
A29
B29
AH29
AJ29
AA9
AJ4

R511 1@0_0402_5%

1 2

R512 1@1.5K_0603_1%

1 2

H_DPSLP#

R516 10K_0603_1%

CLK_VCH<16>

R521 @1K_0402_5%

1 2

R522 @1K_0402_5%

1 2

FS2 FS1

*

INTCRT_B <17>
INTCRT_G <17>
INTCRT_R <17>
INT_HSYNC <17>

INT_VSYNC <17>
INTDDCCK <17>

INTDDCDA <17>

LCD_A0- <18>
LCD_A1- <18>
LCD_A2- <18>

LCD_A0+ <18>
LCD_A1+ <18>
LCD_A2+ <18>

LCD_B0- <18>
LCD_B1- <18>
LCD_B2- <18>

LCD_B0+ <18>
LCD_B1+ <18>
LCD_B2+ <18>

LCD_ACLK- <18>
LCD_ACLK+ <18>
LCD_BCLK- <18>
LCD_BCLK+ <18>

LCD_DDCCLK <18>
LCD_DDCDATA <18>

CLK_MCH_DISPLAY <16>

LCLKCTLB

1 2

0 0
0 1
1 0
1 1

LCLKCTLB H:1.2V

PSB Voltage Select

H_DPSLP# <6,20>
PCIRST# <6,17,20,24,25,27,28,32,35>

PM_PWROK <21,32,34>

28< <38
38< <48
46< <60
58< <75

R506

1@127_0603_1%

1 2

ENABKL <17,18,33>
ENVDD <18>

1K_0402_5%

1 2

+3VS

2

LCD_DDCCLK

LCD_DDCDATA

R514

U78

1

X1/CLK

7

FS1

8

FS2

2

+3VS

R507

1 2

2.2K_0402_5%

R508

1 2

2.2K_0402_5%

H_DPSLP#

R570

@56 _0402_1%

+3VS

0.1U_0402_10V6K

R519 0_0402_5%

1 2

+SVDD

11/12 EMI change to W181-51

6

VDD

CLKOUT

X2

SS%

GND

@W181G_SOIC8

3

+CPU_CORE

12

1

C721

2

SSVCH_OUT DREFSSCLKCLK_VCH

5

2
4

12

R527
@1K_0402_5%

Title

Size Document Number Rev

Abacus-MT LA-1682

Date: Sheet of

1

C722

4.7U_0805_6.3V6K

1

2

R520 @22_0402_5%

1 2

R523

1 2

@1K_0402_5%

L41

FCM2012C-800_0805

1 2

C723

1

0.1U_0402_10V6K

2

+SVDD

+3VS+SVDD

SS% L : -0.625%< <0.625%
SS% H : -1.875%< <1.875%

Compal Electronics, Inc.

Montara-GT (2/4)

10 44Tu e sday, February 25, 2003

1

0.2

5

4

3

2

1

D D

DDR_SDQS[0..7]<13>

C C

B B

DDR_SDM[0..7]<13>

A A

DDR_SMA[0..12]

DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11

DDR_SDQS[0..7]

DDR_SWE#<13,14>
DDR_SRAS#<13,14>
DDR_SCAS#<13,14>

DDR_CLK0<13>
DDR_CLK0#<13>
DDR_CLK1<13>
DDR_CLK1#<13>
DDR_CLK2<13>
DDR_CLK2#<13>
DDR_CLK3<14>
DDR_CLK3#<14>
DDR_CLK4<14>
DDR_CLK4#<14>
DDR_CLK5<14>
DDR_CLK5#<14>

DDR_CKE0<13>
DDR_CKE1<13>
DDR_CKE2<14>
DDR_CKE3<14>
DDR_SCS#0<13>
DDR_SCS#1<13>
DDR_SCS#2<14>
DDR_SCS#3<14>

DDR_SBS0<13,14>
DDR_SBS1<13,14>

DDR_SDM[0..7]

DDR_SMAB1<14>
DDR_SMAB2<14>
DDR_SMAB4<14>
DDR_SMAB5<14>

Need place Via as closed as pin.

+SMRCOMP
+SMVSWINGL

+SMVSWINGH

DDR_SMA12

DDR_SDQS0
DDR_SDQS1
DDR_SDQS2
DDR_SDQS3
DDR_SDQS4
DDR_SDQS5
DDR_SDQS6
DDR_SDQS7

DDR_SWE#
DDR_SRAS#
DDR_SCAS#

DDR_CLK0
DDR_CLK0#
DDR_CLK1
DDR_CLK1#
DDR_CLK2
DDR_CLK2#
DDR_CLK3
DDR_CLK3#
DDR_CLK4
DDR_CLK4#
DDR_CLK5
DDR_CLK5#

DDR_CKE0
DDR_CKE1
DDR_CKE2
DDR_CKE3
DDR_SCS#0
DDR_SCS#1
DDR_SCS#2
DDR_SCS#3

DDR_SBS0
DDR_SBS1

DDR_SDM0
DDR_SDM1
DDR_SDM2
DDR_SDM3
DDR_SDM4
DDR_SDM5
DDR_SDM6
DDR_SDM7

DDR_SMAB1
DDR_SMAB2
DDR_SMAB4
DDR_SMAB5

U77C

AC18
AD14
AD13
AD17
AD11
AC13

AD8
AD7
AC6
AC5

AC19

AD5
AB5

AG2
AH5

AH8
AE12
AH17
AE21
AH24
AH27
AD15

AD25
AC21
AC24

AB2

AA2
AC26
AB25

AC3

AD4

AC2

AD2
AB23
AB24

AA3

AB4

AC7

AB7

AC9
AC10
AD23
AD26
AC22
AC25

AD22
AD20

AE5

AE6

AE9
AH12
AD19
AD21
AD24
AH28
AH15

AD16
AC12

AF11

AD10
AC15

AC16

AB1

AJ22
AJ19

Montara-GT

SMA0
SMA1
SMA2
SMA3
SMA4
SMA5
SMA6
SMA7
SMA8
SMA9
SMA10
SMA11
SMA12

SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7
SDQS8

SWE#
SRAS#
SCAS#

SCK0
SCK0#
SCK1
SCK1#
SCK2
SCK2#
SCK3
SCK3#
SCK4
SCK4#
SCK5
SCK5#

SCKE0
SCKE1
SCKE2
SCKE3
SCS#0
SCS#1
SCS#2
SCS#3

SBA0
SBA1

SDM0
SDM1
SDM2
SDM3
SDM4
SDM5
SDM6
SDM7
SDM8

SMAB1
SMAB2
SMAB4
SMAB5

RCVENOUT#
RCVENIN#

SMRCOMP
SMVSWINGL

SMVSWINGH

RG82G4350MA1_uFCBGA732_MONTARA-GT

MEMORY

SDQ0
SDQ1
SDQ2
SDQ3
SDQ4
SDQ5
SDQ6
SDQ7
SDQ8

SDQ9
SDQ10
SDQ11
SDQ12
SDQ13
SDQ14
SDQ15
SDQ16
SDQ17
SDQ18
SDQ19
SDQ20
SDQ21
SDQ22
SDQ23
SDQ24
SDQ25
SDQ26
SDQ27
SDQ28
SDQ29
SDQ30
SDQ31
SDQ32
SDQ33
SDQ34
SDQ35
SDQ36
SDQ37
SDQ38
SDQ39
SDQ40
SDQ41
SDQ42
SDQ43
SDQ44
SDQ45
SDQ46
SDQ47
SDQ48
SDQ49
SDQ50
SDQ51
SDQ52
SDQ53
SDQ54
SDQ55
SDQ56
SDQ57
SDQ58
SDQ59
SDQ60
SDQ61
SDQ62
SDQ63

SDQ64
SDQ65
SDQ66
SDQ67
SDQ68
SDQ69
SDQ70
SDQ71

SMVREF0

DDR_SDQ0

AF2

DDR_SDQ1

AE3

DDR_SDQ2

AF4

DDR_SDQ3

AH2

DDR_SDQ4

AD3

DDR_SDQ5

AE2

DDR_SDQ6

AG4

DDR_SDQ7

AH3

DDR_SDQ8

AD6

DDR_SDQ9

AG5

DDR_SDQ10

AG7

DDR_SDQ11

AE8

DDR_SDQ12

AF5

DDR_SDQ13

AH4

DDR_SDQ14

AF7

DDR_SDQ15

AH6

DDR_SDQ16

AF8

DDR_SDQ17

AG8

DDR_SDQ18

AH9

DDR_SDQ19

AG10

DDR_SDQ20

AH7

DDR_SDQ21

AD9

DDR_SDQ22

AF10

DDR_SDQ23

AE11

DDR_SDQ24

AH10

DDR_SDQ25

AH11

DDR_SDQ26

AG13

DDR_SDQ27

AF14

DDR_SDQ28

AG11

DDR_SDQ29

AD12

DDR_SDQ30

AF13

DDR_SDQ31

AH13

DDR_SDQ32

AH16

DDR_SDQ33

AG17

DDR_SDQ34

AF19

DDR_SDQ35

AE20

DDR_SDQ36

AD18

DDR_SDQ37

AE18

DDR_SDQ38

AH18

DDR_SDQ39

AG19

DDR_SDQ40

AH20

DDR_SDQ41

AG20

DDR_SDQ42

AF22

DDR_SDQ43

AH22

DDR_SDQ44

AF20

DDR_SDQ45

AH19

DDR_SDQ46

AH21

DDR_SDQ47

AG22

DDR_SDQ48

AE23

DDR_SDQ49

AH23

DDR_SDQ50

AE24

DDR_SDQ51

AH25

DDR_SDQ52

AG23

DDR_SDQ53

AF23

DDR_SDQ54

AF25

DDR_SDQ55

AG25

DDR_SDQ56

AH26

DDR_SDQ57

AE26

DDR_SDQ58

AG28

DDR_SDQ59

AF28

DDR_SDQ60

AG26

DDR_SDQ61

AF26

DDR_SDQ62

AE27

DDR_SDQ63

AD27

AG14
AE14
AE17
AG16
AH14
AE15
AF16
AF17

SMVREF0

AJ24

C728

0.1U_0402_10V6K

+2.5V

TOPOLOGY 2 FOR DDR

SMAA[12:6,3,0], SBA[1:0], SRAS#, SCAS#, SWE#

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

12

R537
@10K_0603_1%

12

1

2

DDR_SDQ[0..63]

R540
@10K_0603_1%

R539

1 2

0_0603_5%

DDR_SDQ[0..63] <13>DDR_SMA[0..12]<13,14>

+2.5V

12

R531
604_0603_1%

+SMVSWINGL

+SMRCOMP

60.4_0603_1%

+SMVSWINGH

SDREF

R534

12

R532
150_0603_1%

+2.5V

12

R533

60.4_0603_1%

12

0.1U_0402_10V6K

+2.5V

12

R535
150_0603_1%

12

R536
604_0603_1%

C727

1

2

Dell-Compal Confidential

Title

Size Document Number Rev

Abacus-MT LA-1682

2

Date: Sheet of

Compal Electronics, Inc.

Montara-GT (3/4)

1

0.2

11 44Tu e sday, February 25, 2003

5

U77D

C1

VSS0

G1

VSS1

L1

VSS2

U1

VSS3

AA1

VSS4

AE1

VSS5

R2

VSS6

D D

C C

B B

A A

AG3

VSS7

AJ3

VSS8

D4

VSS9

G4

VSS10

K4

VSS11

N4

VSS12

T4

VSS13

W4

VSS14

AA4

VSS15

AC4

VSS16

AE4

VSS17

B5

VSS18

U5

VSS19

Y5

VSS20

Y6

VSS21

AG6

VSS22

C7

VSS23

E7

VSS24

G7

VSS25

J7

VSS26

M7

VSS27

R7

VSS28

AA7

VSS29

AE7

VSS30

AJ7

VSS31

H8

VSS32

K8

VSS33

P8

VSS34

T8

VSS35

V8

VSS36

Y8

VSS37

AC8

VSS38

E9

VSS39

L9

VSS40

N9

VSS41

R9

VSS42

U9

VSS43

W9

VSS44

AB9

VSS45

AG9

VSS46

C10

VSS47

J10

VSS48

AA10

VSS49

AE10

VSS50

D11

VSS51

F11

VSS52

H11

VSS53

AB11

VSS54

AC11

VSS55

AJ11

VSS56

J12

VSS57

AA12

VSS58

AG12

VSS59

A13

VSS60

D13

VSS61

F13

VSS62

H13

VSS63

N13

VSS64

R13

VSS65

U13

VSS66

AB13

VSS67

AE13

VSS68

J14

VSS69

P14

VSS70

T14

VSS71

AA14

VSS72

AC14

VSS73

D15

VSS74

H15

VSS75

N15

VSS76

R15

VSS77

U15

VSS78

AB15

VSS79

AG15

VSS80

F16

VSS81

J16

VSS82

P16

VSS83

T16

VSS84

AA16

VSS85

AE16

VSS86

A17

VSS87

D17

VSS88

H17

VSS89

N17

VSS90

RG82G4350MA1_uFCBGA732_MONTARA-GT

Montara-GT

VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182

R17
U17
AB17
AC17
F18
J18
AA18
AG18
A19
D19
H19
AB19
AE19
F20
J20
AA20
AC20
A21
D21
H21
M21
P21
T21
V21
Y21
AA21
AB21
AG21
B24
F22
J22
L22
N22
R22
U22
W22
AE22
A23
D23
AA23
AC23
AJ23
F24
H24
K24
M24
P24
T24
V24
AA24
AG24
A25
D25
AA25
AE25
G26
J26
L26
N26
R26
U26
W26
AB26
A27
F27
AC27
AG27
AJ27
AC28
AE28
C29
E29
G29
J29
L29
N29
U29
W29
AA29
AJ10
AJ12
AJ18
AJ20
C22
D28
E28
L6
T9
AJ26
AJ1

4

C807

1

0.1U_0402_10V6K

+1.5VS

1

2

2

C808

0.1U_0402_10V6K

1.5V for GT

KC FBM-L11-201209-221LMAT_0805

L42

1 2

CLOSE TO PIN

C740
220U_D2_4VM

1 2

KC FBM-L11-201209-221LMAT_0805

C758

@220U_D2_4VM

1@47U_1210_6.3V4Z

L43

220U_D2_4VM

+1.5VS

12

L44

FLM1608081R8K_0603

1

0.01U_0402_25V7Z

1

+

2

2

C759

0.1U_0402_10V6K

+1.5VS_DLVDS

1

C769

2

L46

1 2

FLM1608081R8K_0603

C775

0.1U_0402_10V6K

L49

1 2

FLM1608081R8K_0603

C782

1@47U_1210_6.3V4Z

C730

1

150U_D2_6.3VM

+

2

C729
150U_D2_6.3VM

+VCCADPLLA

1

+

0.1U_0402_10V6K

2

+VCCADPLLB

1

+

C750

2

C749

0.1U_0402_10V6K

+1.5VS_DAC

C760

1

2

1

C770

1@22U_1210_6.3V6M

2

1

0.01U_0402_25V7Z

2

1@22U_1206_16V4Z_V1

1

2

1

1

+

2

2

C731

10U_1206_6.3V7K

1

C741

2

1

2

0.1U_0402_10V6K

+1.5VS

L45

BLM21A601SPT_0805

1 2

C814

0.1U_0402_10V6K

C817

0.1U_0402_10V6K

FLM1608081R8K_0603

1

C776

2

C783

1

1

2

2

C784

0.1U_0402_10V6K

CLOSE TO VCC

C732

0.1U_0402_10V6K

1

2

C733

0.1U_0402_10V6K

+1.5VS

C743

10U_1206_6.3V7K

C752

1

1

C753

0.1U_0402_10V6K

2

2

1

1

C761
150U_D2_6.3VM

2

1

2

L47

1 2

0.1U_0402_10V6K

1

2

2

1

C818

2

0.1U_0402_10V6K

C777

0.1U_0402_10V6K

C785

+2.5V_TXLVDS+2.5V

1

2

C786

0.1U_0402_10V6K

3

C734

0.1U_0402_10V6K

1

1

2

2

CLOSE TO VCCHL

1.5V for GT

0.1U_0402_10V6K

C744

0.1U_0402_10V6K

1

1

2

2

+1.5VS

+

1

0.1U_0402_10V6K

2

C762

10U_1206_6.3V7K

1

C819

2

0.1U_0402_10V6K

+1.5VS_DLVDS+1.5VS+1.5VS_ALVDS+1.5VS

0_0603_5%

+3VS

@10U_1206_6.3V7K

1

2

0.1U_0402_10V6K

C745

1

2

+1.5VS_DVO

C763

1

2

0.1U_0402_10V6K

+1.5VS_DAC

+1.5VS_ALVDS

+1.5VS_DLVDS

1

2

+2.5V_TXLVDS

R541

1 2

C780

1.5V for GT

+1.5VS

C735

1

2

C811

0.1U_0402_10V6K

+VCCADPLLA
+VCCADPLLB

1

2

C764

+VCC_GPIO

1

0.1U_0402_10V6K

2

2

+CPU_CORE

U77E

Montara-GT

J15

VCC0

P13

VCC1

T13

VCC2

N14

VCC3

R14

VCC4

U14

VCC5

P15

VCC6

T15

VCC7

AA15

VCC8

N16

VCC9

R16

VCC10

U16

VCC11

P17

VCC12

T17

VCC13

AA17

VCC14

AA19

VCC15

W21

VCC16

H14

VCC17

V1

VCCHL0

Y1

VCCHL1

W5

VCCHL2

U6

VCCHL3

U8

VCCHL4

W8

VCCHL5

V7

VCCHL6

V9

VCCHL7

D29

VCCAHPLL

Y2

VCCAGPLL

A6

VCCADPLLA

B16

VCCADPLLB

E1

VCCDVO_0

J1

VCCDVO_1

N1

VCCDVO_2

E4

VCCDVO_3

J4

VCCDVO_4

M4

VCCDVO_5

E6

VCCDVO_6

H7

VCCDVO_7

J8

VCCDVO_8

L8

VCCDVO_9

M8

VCCDVO_10

N8

VCCDVO_11

R8

VCCDVO_12

K9

VCCDVO_13

M9

VCCDVO_14

P9

VCCDVO_15

A9

VCCADAC0

B9

VCCADAC1

B8

VSSADAC

A11

VCCALVDS

B11

VSSALVDS

G13

VCCDLVDS0

B14

VCCDLVDS1

J13

VCCDLVDS2

B15

VCCDLVDS3

F9

VCCTXLVDS0

B10

VCCTXLVDS1

D10

VCCTXLVDS2

A12

VCCTXLVDS3

A3

VCCGPIO_0

A4

1

2

VCCGPIO_1

C781

RG82G4350MA1_uFCBGA732_MONTARA-GT

POWER

VTTLF0
VTTLF1
VTTLF2
VTTLF3
VTTLF4
VTTLF5
VTTLF6
VTTLF7
VTTLF8

VTTLF9
VTTLF10
VTTLF11
VTTLF12
VTTLF13
VTTLF14
VTTLF15
VTTLF16
VTTLF17
VTTLF18
VTTLF19
VTTLF20

VTTHF0
VTTHF1
VTTHF2
VTTHF3
VTTHF4

VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8
VCCSM9

VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36

VCCQSM0
VCCQSM1

VCCASM0
VCCASM1

G15
H16
H18
J19
H20
L21
N21
R21
U21
H22
M22
P22
T22
V22
Y29
K29
F29
AB29
A26
A20
A18

A22
A24
H29
M29
V29

AC1
AG1
AB3
AF3
Y4
AJ5
AA6
AB6
AF6
Y7
AA8
AB8
Y9
AF9
AJ9
AB10
AA11
AB12
AF12
AA13
AJ13
AB14
AF15
AB16
AJ17
AB18
AF18
AB20
AF21
AJ21
AB22
AF24
AJ25
AF27
AC29
AF29
AG29

0.1U_0402_10V6K

AJ6
AJ8

VCC_ASM

AD1
AF1

C787

0.1U_0402_10V6K

C737

0.1U_0402_10V6K

+2.5V

C754

0.1U_0402_10V6K

C765

0.1U_0402_10V6K

C778

1

2

1

2

C738

0.1U_0402_10V6K

1

2

1

2

1

2

1

C771

150U_D2_4VM

2

1

2

10U_1206_6.3V7K

0.1U_0402_10V6K

1

C809

2

0.1U_0402_10V6K

C742 0.1U_0402_16V4Z

1 2

C746 0.1U_0402_16V4Z

1 2

C747 0.1U_0402_16V4Z

1 2

C748 0.1U_0402_16V4Z

1 2

C751 0.1U_0402_16V4Z

1 2

C755

0.1U_0402_10V6K

1

2

C766

0.1U_0402_10V6K

1

2

C771 & C772 change to 100u
next Reversion

+

150U_D2_4VM

1

C779

4.7U_1206_10V7K

2

1

+

C788
100U_D_16VM

2

1

2

C756

0.1U_0402_10V6K

1

2

C767

0.1U_0402_10V6K

1

C772

+

0.1U_0402_10V6K

2

L48

1 2

KC FBM-L11-201209-221LMAT_0805

L50

1 2

KC FBM-L11-201209-221LMAT_0805

1

2

C739

1

C810

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C773

2

1

1

+

C736
150U_D2_4VM

2

C757

0.1U_0402_10V6K

1

2

C768

0.1U_0402_10V6K

1

2

0.1U_0402_10V6K

1

C774

2

0.1U_0402_10V6K

1

C812

2

0.1U_0402_10V6K

1

C815

2

0.1U_0402_10V6K

1

C820

2

R16

0_0805_5%

1 2

+1.5VS

1

C813

2

1

C816

2

1

C821

2

0.1U_0402_10V6K

+2.5V+2.5V_QSM

Dell-Compal Confidential

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Abacus-MT LA-1682

Date: Sheet

Compal Electronics, Inc.

Montara-GT(4/4)

1

0.2

of

12 44Tu e sday, February 25, 2003

A

RP32 10_4P2R_0402_5%

DDR_SDQ1
DDR_SDQ4

DDR_SDQ2
DDR_SDQ5

DDR_SDQ6

1 1

2 2

3 3

4 4

DDR_SDQ0

DDR_SDQ7
DDR_SDQ3

DDR_SDQ12 DDR_DQ12
DDR_SDQ8

DDR_SDQ9 DDR_DQ9
DDR_SDQ13

DDR_SDQ11 DDR_DQ11
DDR_SDQ14 DDR_DQ14

DDR_SDQ15
DDR_SDQ10

DDR_SDQ21
DDR_SDQ20

DDR_SDQ16 DDR_DQ16

DDR_SDQ23 DDR_DQ23
DDR_SDQ18

DDR_SDQ29 DDR_DQ29
DDR_SDQ28

DDR_SDQ25 DDR_DQ25
DDR_SDQ24

DDR_SDQ57
DDR_SDQ61

DDR_SDQ60 DDR_DQ60
DDR_SDQ56

DDR_SDQ63
DDR_SDQ58 DDR_DQ58

DDR_SDQS0
DDR_SDQS1
DDR_SDQS2
DDR_SDQS3

1 4
2 3

RP42 10_4P2R_0402_5%

1 4
2 3

RP33 10_4P2R_0402_5%

1 4
2 3

RP43 10_4P2R_0402_5%

1 4
2 3

RP20 10_4P2R_0402_5%

1 4
2 3

RP31 10_4P2R_0402_5%

1 4
2 3

RP21 10_4P2R_0402_5%

1 4
2 3

RP40 10_4P2R_0402_5%

1 4
2 3

RP41 10_4P2R_0402_5%

1 4
2 3

RP35 10_4P2R_0402_5%

1 4
2 3

RP44 10_4P2R_0402_5%

1 4
2 3

RP34 10_4P2R_0402_5%

1 4
2 3

RP45 10_4P2R_0402_5%

1 4
2 3

RP38 10_4P2R_0402_5%

1 4
2 3

DDR_SDQ[0..63]<11>
DDR_SDQS[0..7]<11>
DDR_SMA[0..12]<11,14>
DDR_SDM[0..7]<11>

RP51 10_4P2R_0402_5%

1 4
2 3

RP50 10_4P2R_0402_5%

1 4
2 3

RP36 10_4P2R_0402_5%

1 4
2 3

R124 10_0402_5%

R109 10_0402_5%

R120 10_0402_5%

R121 10_0402_5%

A

DDR_DQ1
DDR_DQ4

DDR_DQ2
DDR_DQ5

DDR_DQ6
DDR_DQ0

DDR_DQ7
DDR_DQ3

DDR_DQ8

DDR_DQ13

DDR_DQ15
DDR_DQ10

DDR_DQ21
DDR_DQ20

DDR_DQ17DDR_SDQ17

DDR_DQ18

DDR_DQ19DDR_SDQ19
DDR_DQ22DDR_SDQ22

DDR_DQ28

DDR_DQ24

DDR_SDQ[0..63]
DDR_SDQS[0..7]
DDR_SMA[0..12]
DDR_SDM[0..7]

DDR_DQ57
DDR_DQ61

DDR_DQ56

DDR_DQ63 DDR_SDQ62 DDR_DQ62

DDR_DQS0

12

DDR_DQS1

12

DDR_DQS2

12

DDR_DQS3

12

B

RP46 10_4P2R_0402_5%

DDR_SDQ26 DDR_DQ26
DDR_SDQ31 DDR_DQ31

DDR_SDQ27
DDR_SDQ30

DDR_SDM0
DDR_SDM1

DDR_SDM2 DDR_DM2
DDR_SDM3

DDR_SDM4 DDR_DM4
DDR_SDM5

DDR_SDM6 DDR_DM6
DDR_SDM7

DDR_SDQ32 DDR_DQ32
DDR_SDQ33

DDR_SDQ37 DDR_DQ37
DDR_SDQ36

DDR_SDQ39
DDR_SDQ34

DDR_SDQ35
DDR_SDQ38

DDR_SDQ45
DDR_SDQ44

DDR_SDQ40
DDR_SDQ41

DDR_SDQ47
DDR_SDQ46

DDR_SDQ42
DDR_SDQ43

DDR_SDQ49
DDR_SDQ52

DDR_SDQ48
DDR_SDQ53

DDR_SDQ51
DDR_SDQ50

DDR_SDQ54 DDR_DQ54

DDR_SDQ59

DDR_SDQS4
DDR_SDQS5
DDR_SDQS6
DDR_SDQS7

B

1 4
2 3

RP37 10_4P2R_0402_5%

1 4
2 3

R119 10_0402_5%

R117 10_0402_5%

R126 10_0402_5%

R127 10_0402_5%

R114 10_0402_5%

R113 10_0402_5%

R107 10_0402_5%

R118 10_0402_5%

RP16 10_4P2R_0402_5%

1 4
2 3

RP28 10_4P2R_0402_5%

1 4
2 3

RP26 10_4P2R_0402_5%

1 4
2 3

RP15 10_4P2R_0402_5%

1 4
2 3

RP27 10_4P2R_0402_5%

1 4
2 3

RP17 10_4P2R_0402_5%

1 4
2 3

RP29 10_4P2R_0402_5%

1 4
2 3

RP22 10_4P2R_0402_5%

1 4
2 3

RP30 10_4P2R_0402_5%

1 4
2 3

RP18 10_4P2R_0402_5%

1 4
2 3

RP25 10_4P2R_0402_5%

1 4
2 3

RP23 10_4P2R_0402_5%

1 4
2 3

RP39 10_4P2R_0402_5%

1 4
2 3

R108 10_0402_5%
R106 10_0402_5%
R115 10_0402_5%
R129 10_0402_5%

12
12

12
12

12
12

12
12

12
12
12
12

C

DDR_DQ27
DDR_DQ30

DDR_DM0
DDR_DM1

DDR_DM3

DDR_DM5

DDR_DM7

DDR_DQ33

DDR_DQ36

DDR_DQ39
DDR_DQ34

DDR_DQ35
DDR_DQ38

DDR_DQ45
DDR_DQ44

DDR_DQ40
DDR_DQ41

DDR_DQ47
DDR_DQ46

DDR_DQ42
DDR_DQ43

DDR_DQ49
DDR_DQ52

DDR_DQ48
DDR_DQ53

DDR_DQ51
DDR_DQ50

DDR_DQ55DDR_SDQ55

DDR_DQ59

DDR_DQS4
DDR_DQS5
DDR_DQS6
DDR_DQS7

C

D

+2.5V

JP22

1

VREF

3

DDR_DQ5
DDR_DQ2

DDR_DQS0
DDR_DQ0

DDR_DQ6
DDR_DQ8

DDR_DQS1
DDR_DQ14

DDR_DQ11

DDR_CLK0<11>
DDR_CLK0#<11>

DDR_DQ20 DDR_DQ16
DDR_DQ21 DDR_DQ17

DDR_DQS2
DDR_DQ18

DDR_DQ23 DDR_DQ19
DDR_DQ28

DDR_DQS3
DDR_DQ31

DDR_DQ26

DDR_CLK2<11>
DDR_CLK2#<11>

DDR_CKE1<11> DDR_CKE0 <11>

Layout note
Place these resistors

close to DIMM0,
all trace length<500 mil

DDR_CKE1 DDR_CKE0
DDR_SMAA12

DDR_SMAA9
DDR_SMAA7

DDR_SMA5
DDR_SMAA3
DDR_SMA1

DDR_SMAA10
DDR_BS0
DDR_WE#
DDR_SCS#0 DDR_SCS#1

DDR_DQ37
DDR_DQS4

DDR_DQ34

DDR_DQ44
DDR_DQ45

DDR_DQS5
DDR_DQ46

DDR_DQ47

DDR_DQ52
DDR_DQ49

DDR_DQS6
DDR_DQ50

DDR_DQ51
DDR_DQ56

DDR_DQ60
DDR_DQS7

DDR_DQ58
DDR_DQ63

DIMM_SMDATA<14,16,20,28>

DIMM_SMCLK<14,16,20,28>

+3VS

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0#

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2#

93

VDD

95

CKE1

97

DU/A13

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE#

121

S0#

123

DU

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD_SPD

199

VDD_ID

JAE MM50-200B1-1R_200P_Reverse

E

VREF

DQ12
DQ13

DQ14
DQ15

DQ20
DQ21

DQ22
DQ23

DQ28
DQ29

DQ30
DQ31

DU/RESET#

CKE0

DU/BA2

RAS#
CAS#

DQ36
DQ37

DQ38
DQ39

DQ44
DQ45

DQ46
DQ47

CK1#

DQ52
DQ53

DQ54
DQ55

DQ60
DQ61

DQ62
DQ63

VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7

VDD
DM1

VSS

VDD
VDD
VSS
VSS

VDD
DM2

VSS

VDD
DM3

VSS

VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7

VSS
VSS
VDD
VDD

VSS

VDD
BA1

VSS

VDD
DM4

VSS

VDD
DM5

VSS

VDD
CK1

VSS

VDD
DM6

VSS

VDD
DM7

VSS

VDD
SA0
SA1
SA2

F

+2.5V

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100

A11

102

A8

104
106

A6

108

A4

110

A2

112

A0

114
116
118
120
122

S1#

124

DU

126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DU

DDR_DQ4
DDR_DQ1

DDR_DM0
DDR_DQ3

DDR_DQ7
DDR_DQ13

DDR_DQ9DDR_DQ12
DDR_DM1

DDR_DQ10
DDR_DQ15

DDR_DM2
DDR_DQ22

DDR_DQ24
DDR_DQ25DDR_DQ29

DDR_DM3
DDR_DQ30

DDR_DQ27

DDR_SMAA11
DDR_SMAA8

DDR_SMAA6
DDR_SMA4
DDR_SMA2
DDR_SMAA0

DDR_BS1
DDR_RAS#
DDR_CAS#

DDR_DQ33DDR_DQ36
DDR_DQ32

DDR_DM4
DDR_DQ38

DDR_DQ35DDR_DQ39
DDR_DQ41

DDR_DQ40
DDR_DM5

DDR_DQ43
DDR_DQ42

DDR_DQ53
DDR_DQ48

DDR_DM6
DDR_DQ55

DDR_DQ54
DDR_DQ61

DDR_DQ57
DDR_DM7

DDR_DQ59
DDR_DQ62

SDREF_DIMM

1

C413

0.1U_0402_16V4Z

2

DDR_SCS#1 <11>DDR_SCS#0<11>

DDR_CLK1# <11>
DDR_CLK1 <11>

DDR TOPOLOGY 2 FOR SMAA[0, 3, 6:12], SBA[1, 0], SRAS#, SCAS#, SWE#

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

D

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

F

R322

0_0402_5%

G

12

SDREF

DDR_DQ[0..63]
DDR_DQS[0..7]
DDR_DM[0..7]

R167 10_0402_5%

R149 10_0402_5%

R152 10_0402_5%
R116 10_0402_5%
R137 10_0402_5%
R148 10_0402_5%
R146 10_0402_5%
R151 10_0402_5%
R136 10_0402_5%

DDR_DQ[0..63] <14>
DDR_DQS[0..7] <14>
DDR_DM[0..7] <14>

DDR_SMAA0DDR_SMA0

12

DDR_SMAA3DDR_SMA3

12

DDR_SMAA6DDR_SMA6

12

DDR_SMAA7DDR_SMA7

12

DDR_SMAA8DDR_SMA8

12

DDR_SMAA9DDR_SMA9

12

DDR_SMAA10DDR_SMA10

12

DDR_SMAA11DDR_SMA11

12

DDR_SMAA12DDR_SMA12

12

Layout note
Place these resistor

close by DIMM0,
all trace length
Max=1.4"

+1.25VS

DDR_CKE0
DDR_CKE1

DDR_SCS#1
DDR_SCS#0

DDR_SBS0<11,14>
DDR_SBS1<11,14>
DDR_SRAS#<11,14>
DDR_SCAS#<11,14>
DDR_SWE#<11,14>

RP47

1 4
2 3

56_4P2R_0402_5%

RP49

1 4
2 3

56_4P2R_0402_5%

R139 10_0402_5%
R133 10_0402_5%
R141 10_0402_5%
R131 10_0402_5%
R138 10_0402_5%

12
12
12
12
12

Dell-Compal Confidential

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DDR-SODIMM SLOT0

Abacus-MT LA-1682

G

H

DDR_BS0
DDR_BS1
DDR_RAS#
DDR_CAS#
DDR_WE#

13 44Tuesday, Feb ru ar y 25, 2003

H

0.2

of

A

+1.25VS +1.25VS

DDR_DQ4
DDR_DQ1

DDR_DQ5
DDR_DQ2

1 1

DDR_DM0
DDR_DQ3

DDR_DQS0
DDR_DQ0

DDR_DQ7
DDR_DQ13

DDR_DQ6
DDR_DQ8

DDR_DQ9
DDR_DM1

DDR_DQ12
DDR_DQS1

DDR_DQ14
DDR_DQ11

2 2

DDR_DQ10
DDR_DQ15

DDR_DQ20
DDR_DQ21

DDR_DQ16
DDR_DQ17

DDR_DQS2
DDR_DQ18

DDR_DM2
DDR_DQ22

DDR_DQ23
DDR_DQ28

3 3

DDR_DQ19
DDR_DQ24

RP89

1 4
2 3

56_4P2R_0402_5%

RP109

1 4
2 3

56_4P2R_0402_5%

RP88

1 4
2 3

56_4P2R_0402_5%

RP108

1 4
2 3

56_4P2R_0402_5%

RP87

1 4
2 3

56_4P2R_0402_5%

RP107

1 4
2 3

56_4P2R_0402_5%

RP86

1 4
2 3

56_4P2R_0402_5%

RP92

1 4
2 3

56_4P2R_0402_5%

RP67

1 4
2 3

56_4P2R_0402_5%

RP91

1 4
2 3

56_4P2R_0402_5%

RP110

1 4
2 3

56_4P2R_0402_5%

RP106

1 4
2 3

56_4P2R_0402_5%

RP85

1 4
2 3

56_4P2R_0402_5%

RP105

1 4
2 3

56_4P2R_0402_5%

RP84

1 4
2 3

56_4P2R_0402_5%

RP104

1 4
2 3

56_4P2R_0402_5%

RP83

DDR_DQ29

14

DDR_DQS3

23

56_4P2R_0402_5%

RP103

DDR_DQ25

14

DDR_DM3

23

56_4P2R_0402_5%

RP82

DDR_DQ31

14

DDR_DQ26

23

56_4P2R_0402_5%

RP111

DDR_DQ30

14

DDR_DQ27

23

56_4P2R_0402_5%

RP75

DDR_DQ36

14

DDR_DQ37

23

56_4P2R_0402_5%

RP100

DDR_DQ33

14

DDR_DQ32

23

56_4P2R_0402_5%

RP74

DDR_DQS4

14

DDR_DQ34

23

56_4P2R_0402_5%

RP99

DDR_DQ38

14

DDR_DQ35

23

56_4P2R_0402_5%

RP73

DDR_DQ39

14

DDR_DQ44

23

56_4P2R_0402_5%

RP98

DDR_DQ41

14

DDR_DQ40

23

56_4P2R_0402_5%

RP72

DDR_DQ45

14

DDR_DQS5

23

56_4P2R_0402_5%

RP97

DDR_DQ43

14

DDR_DQ42

23

56_4P2R_0402_5%

RP71

DDR_DQ46

14

DDR_DQ47

23

56_4P2R_0402_5%

RP96

DDR_DQ53

14

DDR_DQ48

23

56_4P2R_0402_5%

RP70

DDR_DQ52

14

DDR_DQ49

23

56_4P2R_0402_5%

RP95

DDR_DQ55

14

DDR_DQ54

23

56_4P2R_0402_5%

Layout note
Place these resistor

closely DIMM1,
all trace
length<=800mil

PAD1

PAD-2.5X3

PAD12

4 4

PAD-2.5X3

PAD5

PAD-2.5X3

PAD2

1

PAD-2.5X3

PAD11

1

PAD-2.5X3

PAD6

1

PAD-2.5X3

PAD3

PAD-2.5X3

PAD14

PAD-2.5X3

PAD7

PAD-2.5X3

1

PAD-2.5X3

1

PAD-2.5X3

1

PAD-2.5X3

1

1

1

A

PAD4

PAD16

PAD8

RP69

DDR_DQS6

14

DDR_DQ50

23

56_4P2R_0402_5%

RP94

DDR_DQ61

14

DDR_DQ57

23

56_4P2R_0402_5%

RP68

DDR_DQ51

14

DDR_DQ56

23

56_4P2R_0402_5%

RP93

DDR_DQ59

14

DDR_DQ62

23

56_4P2R_0402_5%

RP66

14
23

56_4P2R_0402_5%

RP53

14
23

56_4P2R_0402_5%

1 2

R179 56_0402_5%

1 2

R180 56_0402_5%

1 2

R177 56_0402_5%

1 2

R181 56_0402_5%

DDR_DQS[0..7]
DDR_DQ[0..63]
DDR_SMA[0..12]
DDR_DM[0..7]

DDR_SMAB1<11>

DDR_SMAB2<11>

DDR_SMAB4<11>

DDR_SMAB5<11>

1

EMI Clip PAD for Memory Door

PAD17

1

1

1

PAD-2.5X3

PAD9

1

PAD-2.5X3

B

DDR_DQ60
DDR_DQS7

DDR_DQ58
DDR_DQ63

DDR_DM4
DDR_DM5

DDR_DM6
DDR_DM7

DDR_DQS[0..7] <13>
DDR_DQ[0..63] <13>
DDR_SMA[0..12] <11,13>
DDR_DM[0..7] <13>

DDR_SMAB1

DDR_SMAB2

DDR_SMAB4

DDR_SMAB5

PAD10

PAD-2.5X3

B

C

DDR_CLK3<11>
DDR_CLK3#<11>

DDR_CLK5<11>

DDR_CLK5#<11>

DDR_SBS0<11,13>
DDR_SWE#<11,13>

DIMM_SMDATA<13,16,20,28>

DIMM_SMCLK<13,16,20,28>

+2.5V

DDR_DQ5 DDR_DQ4
DDR_DQ2

DDR_DQS0
DDR_DQ0

DDR_DQ6 DDR_DQ7
DDR_DQ8

DDR_DQS1
DDR_DQ14

DDR_DQ11

DDR_DQ20 DDR_DQ16

DDR_DQS2
DDR_DQ18

DDR_DQ23
DDR_DQ28

DDR_DQ29 DDR_DQ25
DDR_DQS3

DDR_DQ31
DDR_DQ26

DDR_CKE3 DDR_CKE2
DDR_SMA12

DDR_SMA9
DDR_SMA7

DDR_SMAB5
DDR_SMA3
DDR_SMAB1

DDR_SMA10
DDR_SBS0 DDR_SRAS#
DDR_SWE#
DDR_SCS#2 DDR_SCS#3

DDR_DQ36
DDR_DQ37

DDR_DQS4
DDR_DQ34

DDR_DQ39
DDR_DQ44

DDR_DQS5
DDR_DQ46

DDR_DQ47

DDR_DQ52
DDR_DQ49

DDR_DQS6
DDR_DQ50

DDR_DQ51
DDR_DQ56

DDR_DQ60
DDR_DQS7

DDR_DQ58
DDR_DQ63

+3VS

JP23

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0#

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2#

93

VDD

95

CKE1

97

DU/A13

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE#

121

S0#

123

DU

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD_SPD

199

VDD_ID

JAE MM50-200B1-1 200P_Normal

DDR TOPOLOGY 2 FOR SMAA[0, 3, 6:12], SBA[1, 0], SRAS#, SCAS#, SWE#

1

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

VREF

VDD
DM0
DQ6
VSS
DQ7

DQ12

VDD

DQ13

DM1

VSS
DQ14
DQ15

VDD

VDD

VSS

VSS

DQ20
DQ21

VDD

DM2
DQ22

VSS
DQ23
DQ28

VDD
DQ29

DM3

VSS
DQ30
DQ31

VDD

CB4

CB5

VSS

DM8

CB6

VDD

CB7

DU/RESET#

VSS

VSS

VDD

VDD

CKE0

DU/BA2

VSS

VDD

RAS#
CAS#

VSS
DQ36
DQ37

VDD

DM4
DQ38

VSS
DQ39
DQ44

VDD
DQ45

DM5

VSS
DQ46
DQ47

VDD

CK1#

CK1

VSS
DQ52
DQ53

VDD

DM6
DQ54

VSS
DQ55
DQ60

VDD
DQ61

DM7

VSS
DQ62
DQ63

VDD

VSS
DQ4
DQ5

A11

BA1

S1#

SA0
SA1
SA2

D

+2.5V

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102

A8

104
106

A6

108

A4

110

A2

112

A0

114
116
118
120
122
124

DU

126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DU

DDR_DQ1
DDR_DM0

DDR_DQ3

DDR_DQ13
DDR_DQ9DDR_DQ12

DDR_DM1
DDR_DQ10

DDR_DQ15

DDR_DQ17DDR_DQ21
DDR_DM2

DDR_DQ22
DDR_DQ19

DDR_DQ24

DDR_DM3
DDR_DQ30

DDR_DQ27

DDR_SMA11
DDR_SMA8

DDR_SMA6
DDR_SMAB4
DDR_SMAB2
DDR_SMA0

DDR_SBS1
DDR_SCAS#

DDR_DQ33
DDR_DQ32

DDR_DM4
DDR_DQ38

DDR_DQ35
DDR_DQ41

DDR_DQ40DDR_DQ45
DDR_DM5

DDR_DQ43
DDR_DQ42

DDR_DQ53
DDR_DQ48

DDR_DM6
DDR_DQ55

DDR_DQ54
DDR_DQ61

DDR_DQ57
DDR_DM7

DDR_DQ59
DDR_DQ62

+3VS

SDREF_DIMM

1

2

DDR_CKE2 <11>DDR_CKE3<11>

DDR_SBS1 <11,13>
DDR_SRAS# <11,13>
DDR_SCAS# <11,13>
DDR_SCS#3 <11>DDR_SCS#2<11>

DDR_CLK4# <11>
DDR_CLK4 <11>

C488

0.1U_0402_16V4Z

E

+1.25VS

DDR_SMA12

1 2

R128 56_0402_5%
RP48 56_4P2R_0402_5%

RP81 56_4P2R_0402_5%

RP78 56_4P2R_0402_5%

RP77 56_4P2R_0402_5%

R323 56 _0402_1%
R182 56 _0402_1%

RP102 56_4P2R_0402_5%

RP55 56_4P2R_0402_5%

RP54 56_4P2R_0402_5%

RP80 56_4P2R_0402_5%

RP76 56_4P2R_0402_5%

R358 56_0402_5%

1 2

DDR_CKE3
DDR_CKE2

DDR_SCS#2
DDR_SCS#3

DDR_SMA11

14

DDR_SMA9

23

DDR_SMA7

14

DDR_SMA8

23

DDR_SMA6

14

DDR_SMA3

23

DDR_SMA10

14

DDR_SMA0

23

DDR_SMA1

12

DDR_SMA2

12

DDR_SMAB1

14

DDR_SMAB2

23

DDR_SMA4

14

DDR_SMA5

23

DDR_SMAB4

14

DDR_SMAB5

23

DDR_SWE#

14

DDR_SBS0

23

DDR_SRAS#

14

DDR_SCAS#

23

DDR_SBS1

56_4P2R_0402_5%

56_4P2R_0402_5%

Layout note
Place these resistor

close by DIMM1,
all trace length
Max=0.8"

RP79

1 4
2 3

RP101

1 4
2 3

+1.25VS

Dell-Compal Confidential

Title

Size Document Number Rev

D

Date: Sheet

Compal Electronics, Inc.

DDR-SODIMM SLOT1

Abacus-MT LA-1682

0.2

of

14 44Tuesday, Feb ru ar y 25, 2003

E

A

Layout note :

Distribute as close as possible
to DDR-SODIMM0.

+2.5V

B

C

D

E

Layout note :

Distribute as close as possible
to DDR-SODIMM1.

+2.5V

1

1 1

+

C135
150U_D2_6.3VM

2

1

C164

0.1U_0402_10V6K

2

1

C789

+

150U_D2_6.3VM

2

1

C418

0.1U_0402_10V6K

2

1

C167

0.1U_0402_10V6K

2

1

+

C790
150U_D2_6.3VM

2

1

C419

0.1U_0402_10V6K

2

1

C166

0.1U_0402_10V6K

2

1

C415

0.1U_0402_10V6K

2

1

C162

0.1U_0402_10V6K

2

1

C420

0.1U_0402_10V6K

2

1

C160

0.1U_0402_10V6K

2

1

C423

0.1U_0402_10V6K

2

1

C157

0.1U_0402_10V6K

2

1

C422

0.1U_0402_10V6K

2

1

C158

0.1U_0402_10V6K

2

1

C421

0.1U_0402_10V6K

2

1

C168

0.1U_0402_10V6K

2

1

C414

0.1U_0402_10V6K

2

1

C169

0.1U_0402_10V6K

2

1

+

C170
150U_D2_6.3VM

2

1

C177

0.1U_0402_10V6K

2

1

C194

0.1U_0402_10V6K

2

1

C172

0.1U_0402_10V6K

2

1

C185

0.1U_0402_10V6K

2

1

C173

0.1U_0402_10V6K

2

1

C183

0.1U_0402_10V6K

2

1

C179

0.1U_0402_10V6K

2

1

C189

0.1U_0402_10V6K

2

1

C175

0.1U_0402_10V6K

2

1

C184

0.1U_0402_10V6K

2

1

C176

0.1U_0402_10V6K

2

1

C182

0.1U_0402_10V6K

2

1

C181

0.1U_0402_10V6K

2

1

C186

0.1U_0402_10V6K

2

1

C180

0.1U_0402_10V6K

2

1

C190

0.1U_0402_10V6K

2

1

C187

0.1U_0402_10V6K

2

Layout note :

Place one cap close to every 2 pull up resistors termination to

2 2

+1.25VS

1

C527

0.1U_0402_10V6K

2

+1.25VS

1

C535

0.1U_0402_10V6K

2

+1.25VS

1

C520

0.1U_0402_10V6K

3 3

2

+1.25VS

1

C528

0.1U_0402_10V6K

2

1

C536

0.1U_0402_10V6K

2

1

C514

0.1U_0402_10V6K

2

1

C529

0.1U_0402_10V6K

2

1

C512

0.1U_0402_10V6K

2

1

C516

0.1U_0402_10V6K

2

1

C530

0.1U_0402_10V6K

2

1

C537

0.1U_0402_10V6K

2

1

C517

0.1U_0402_10V6K

2

1

C518

0.1U_0402_10V6K

2

1

C538

0.1U_0402_10V6K

2

1

C503

0.1U_0402_10V6K

2

1

C531

0.1U_0402_10V6K

2

1

C539

0.1U_0402_10V6K

2

1

C519

0.1U_0402_10V6K

2

1

C532

0.1U_0402_10V6K

2

1

C522

0.1U_0402_10V6K

2

1

C533

0.1U_0402_10V6K

2

1

C511

0.1U_0402_10V6K

2

1

C515

0.1U_0402_10V6K

2

1

C521

0.1U_0402_10V6K

2

1

C534

0.1U_0402_10V6K

2

1

C513

0.1U_0402_10V6K

2

+1.25VS

1

C509

0.1U_0402_10V6K

2

+1.25VS

1

C494

0.1U_0402_10V6K

2

+1.25VS

4 4

1

C137

0.1U_0402_10V6K

2

1

C510

0.1U_0402_10V6K

2

1

C540

0.1U_0402_10V6K

2

1

C178

0.1U_0402_10V6K

2

A

1

C508

0.1U_0402_10V6K

2

1

C526

0.1U_0402_10V6K

2

1

C191

0.1U_0402_10V6K

2

1

C507

0.1U_0402_10V6K

2

1

C525

0.1U_0402_10V6K

2

1

C139

0.1U_0402_10V6K

2

1

C504

0.1U_0402_10V6K

2

1

C524

0.1U_0402_10V6K

2

1

C138

0.1U_0402_10V6K

2

1

C502

0.1U_0402_10V6K

2

1

C543

0.1U_0402_10V6K

2

1

C505

0.1U_0402_10V6K

2

B

1

C501

0.1U_0402_10V6K

2

1

C141

0.1U_0402_10V6K

2

1

C497

0.1U_0402_10V6K

2

1

C188

0.1U_0402_10V6K

2

1

C495

0.1U_0402_10V6K

2

1

C192

0.1U_0402_10V6K

2

1

C496

0.1U_0402_10V6K

2

1

C506

0.1U_0402_10V6K

2

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Dell-Compal Confidential

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DDR SODIMM Decoupling

Abacus-MT LA-1682

of

15 44Tuesday, Feb ru ar y 25, 2003

E

0.2

A

B

C

D

E

F

G

H

+3VS

L21
BLM21A601SPT_0805

+3VS

R463

12

Q25
2SC2411K_SOT23

1 2

C243

4.7U_0805_10V4Z

12

R24
1K_0402_5%

H_SEL0

PM_STPPCI#<21>

PM_STPCPU#<21,41>

+3VS

DIMM_SMDATA<13,14,20,28>

R542 33_0402_5%

R20 475_0603_1%

R230 33_0402_5%

R231 33_0402_5%

R236 33_0402_5%
R235 33_0402_5%

1

C248
@10P_0402_50V8K

2

+3VS

1 1

+3VS

12

R19
1K_0402_5%

H_BSEL0<6>

+3VS

10K_0402_5%

2 2

+CPU_CORE

CLK_VCH<10>

CLK_ICH_48M<21>

CLK_MCH_DISPLAY<10>

CLK_ICH_14M<21>

CLK_CODEC_14M<29>

3 3

1 2

R238
220_0402_5%

R242

1 2

2

B

1

2

0_0402_5%

1

C

E

3

C247
@10P_0402_50V8K

+3V_48M

1

2

C310 @10P_0402_50V8K

C272

R213 1K_0402_5%

R221 @1K_0603_1%

DIMM_SMCLK<13,14,20,28>

1 2

1 2

1 2

1 2

1 2
1 2

1

C244

0.1U_0402_16V4Z

2

1 2

1 2

1 2

R232

1 2

10K_0402_5%

12

@10P_0402_50V8K

CLK_VCH66

L26

KC FBM-L11-201209-221LMAT_0805

1 2

XTALIN

X2

XTALOUT

2

3

54
55
40

25
34
53

28

43

29
30

33
35

42

39

38

56

12

14.31818MHZ_20P

CLK_PWD#

ICH_48M

MCH_DISPLAY

ICH_14M

U75

XTAL_IN

XTAL_OUT

SEL0
SEL1
SEL2

PWR_DWN#
PCI_STOP#
CPU_STOP#

VTT_PWRGD#

MULT0

SDATA
SCLK

3V66_0
3V66_1/VCH_CLK

IREF

48MHZ_USB

48MHZ_DOT

REF

+3V_CLK

32

14

1

VDD_REF

VDD_PCI_08VDD_PCI_1

VDD_3V66_019VDD_3V66_1

GND_REF4GND_PCI_09GND_PCI_115GND_3V66_020GND_3V66_131GND_48MHZ

1

C325

2

10U_1206_10V4Z

37

50

VDD_CPU_046VDD_CPU_1

VDD_48MHZ

CPUCLKT2

CPU_CLKC2

CPUCLKT1

CPUCLKC1
CPUCLKT0

CPUCLKC0

PCICLK_F2
PCICLK_F1
PCICLK_F0

GND_IREF41GND_CPU

ICS950810CG_TSSOP56

36

47

0.1U_0402_16V4Z

VDDA

VSSA

3V66_5

3V66_4
3V66_3
3V66_2

PCICLK6
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK0

1

C264

2

26

27
45

44
49

48
52

51
24

23
22
21

7
6
5

18
17
16
13
12
11
10

1

C42

2

0.1U_0402_16V4Z

+3V_VDD

1

C303

0.1U_0402_16V4Z

2

CPU_BCLK

CPU_BCLK#
MCH_BCLK

MCH_BCLK#
CPU_ITP

CPU_ITP#

AGP_66M
MCH_66M
ICH_66M

PCI_ICH

PCI_DEBUG
PCI_LAN
PCI_PCM
PCI_MINI
PCI_LPC

0.1U_0402_16V4Z

1

C43

2

1

C312
10U_1206_10V4Z

2

1 2

R225 27.4_0603_1%

1 2

R226 27.4_0603_1%

1 2

R223 27.4_0603_1%

1 2

R224 27.4_0603_1%

1 2

R228 27.4_0603_1%

1 2

R222 27.4_0603_1%

R255 33_0402_5%

1 2

R254 33_0402_5%

1 2

R253 33_0402_5%

1 2

R248 33_0402_5%

1 2

R457 @33_0402_5%

1 2

R252 33_0402_5%

1 2

R251 33_0402_5%

1 2

R250 33_0402_5%

1 2

R249 33_0402_5%

1 2

0.1U_0402_16V4Z

1

C44

2

0.1U_0402_16V4Z

BLM21A601SPT_0805
L23

1 2

@10P_0402_50V8K

+3VS

R218 49.9_0603_1%

R219 49.9_0603_1%

R216 49.9_0603_1%

R217 49.9_0603_1%

R227 49.9_0603_1%

R220 49.9_0603_1%

C313

1

C59

2

0.1U_0402_16V4Z

CLK_CPU_BCLK <5>

1 2
1 2

CLK_CPU_BCLK# <5>
CLK_MCH_BCLK <9>

1 2
1 2

CLK_MCH_BCLK# <9>
CLK_CPU_ITP <6>

1 2
1 2

CLK_CPU_ITP# <6>

1

2

0.1U_0402_16V4Z

1

1

C58

2

2

1

2

C314
@10P_0402_50V8K

C61

1

2

1

C306

0.1U_0402_16V4Z

2

CLK_AGP_66M <17>
CLK_MCH_66M <10>
CLK_ICH_66M <20>

CLK_PCI_ICH <20>

CLK_PCI_DEBUG <35>
CLK_PCI_LAN <24>
CLK_PCI_PCM <25,27>
CLK_PCI_MINI <28>
CLK_PCI_LPC <32>

C315
@10P_0402_50V8K

+3V

CPU Frequency Select Table

SEL[2:0] CK-408 Speed

001

011

*

4 4

100 MHZ

133 MHZ

PM_SLP_S3#<21,32>
PM_SLP_S1#<21,32>

5

1

P

IN1

4

O

2

IN2

G

SN74AHC1G08HDCK_TSSOP5

3

U79

1 2

R355 @0_0402_5%

1 2

R356 0_0402_5%

CLK_PWD#

Dell-Compal Confidential

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

C

D

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

F

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Abacus-MT LA-1682

G

Clock Generator

0.2

of

16 44Tuesday, Feb ru ar y 25, 2003

H

A

B

C

D

E

AGP_ST[0..2]<10>

AGP_SBA[0..7]<10>

AGP_AD[0..31]<10>

AGP_CBE#[0..3]<10>

1 1

AGP_FRAME#<10>

AGP_TRDY#<10> AGP_DEVSEL# <10>
AGP_STOP#<10>

2 2

CLK_AGP_66M<16>

3 3

AGP_ADSTB1<10>

AGP_ADSTB1#<10>

EXTVGA_IN#<32>

12

R17
1@33_0402_5%

1

C33
1@10P_0402_25V8K

CRT_VSYNC<19>

2

CRT_HSYNC<19>

3VDDCDA<19>

3VDDCCK<19>

AGP_RBF#<10>
AGP_WBF#<10>

AGP_REQ#<10>
AGP_GNT#<10>

AGP_BUSY#<10,21>

+2.5V

AGP_RST#
AGP_CBE#0

AGP_AD1
AGP_AD3
AGP_AD5
AGP_AD7

AGP_AD9
AGP_AD11
AGP_AD13
AGP_AD15

AGP_PAR<10>

PID3<18,21>

SUSP#<29,32,35,38,40>

C/R<19>
Y/G<19>

COMP/B<19>

M_SEN#<19,33>

AGP_FRAME#
AGP_TRDY# AGP_DEVSEL#

AGP_STOP#

AGP_AD17
AGP_AD19
AGP_AD21
AGP_AD23
AGP_CBE#2

AGP_ADSTB1
AGP_ADSTB1#

AGP_AD25
AGP_AD27
AGP_AD29
AGP_AD31
AGP_CBE#3
EXTVGA_IN#

AGP_SBA7
AGP_SBA5
AGP_SBA3
AGP_SBA1

STP_AGP#

C/R
Y/G

COMP/B

M_SEN#

CRT_VSYNC

CRT_HSYNC

3VDDCDA

3VDDCCK

+5VALW

+1.5VS

AGP_ST[0..2]
AGP_SBA[0..7]

AGP_AD[0..31]

AGP_CBE#[0..3]

JP8

1

GND

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

GND

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

GND

43

43

45

45

47

47

49

49

51

51

53

53

55

55

57

57

59

59

61

GND

63

63

65

65

67

67

69

69

71

71

73

73

75

75

77

77

79

79

81

GND

83

83

85

85

87

87

89

89

91

91

93

93

95

95

97

97

99

GND

101

101

103

103

105

105

107

107

109

109

111

111

113

113

115

115

117

117

119

GND

121

121

123

123

125

125

127

127

129

129

131

131

133

133

135

135

137

137

139

GND

141

141

143

143

145

145

147

147

149

149

151

151

153

153

155

155

157

157

159

GND

161

161

163

163

165

165

167

167

169

169

171

171

173

173

175

175

177

177

179

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

2
4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22
24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42
44

44

46

46

48

48

50

50

52

52

54

54

56

56

58

58

60

60

62
64

64

66

66

68

68

70

70

72

72

74

74

76

76

78

78

80

80

82
84

84

86

86

88

88

90

90

92

92

94

94

96

96

98

98

100
102

102

104

104

106

106

108

108

110

110

112

112

114

114

116

116

118

118

120
122

122

124

124

126

126

128

128

130

130

132

132

134

134

136

136

138

138

140
142

142

144

144

146

146

148

148

150

150

152

152

154

154

156

156

158

158

160
162

162

164

164

166

166

168

168

170

170

172

172

174

174

176

176

178

178

180

AGP_AD0
AGP_AD2
AGP_AD4
AGP_AD6

AGP_AD8
AGP_AD10
AGP_AD12
AGP_AD14

AGP_CBE#1

AGP_IRDY#

AGP_AD16
AGP_AD18
AGP_AD20
AGP_AD22

AGP_AD24
AGP_AD26
AGP_AD28
AGP_AD30

AGP_SBA6

AGP_SBA4

AGP_SBA2

AGP_SBA0

AGP_ST0

AGP_ST1

AGP_ST2

CRT_B

CRT_G

CRT_R

+5VS

+3V
+3VS

B+

+12VALW

+1.5VS

12

C127

.1U_0402_16V4Z

AGP_ADSTB0 <10>
AGP_ADSTB0# <10>

AGP_IRDY# <10>
AGP_PIPE# <10>

PIRQE# <20>
AGP_SBSTB <10>

AGP_SBSTB# <10>

BKOFF# <18,32>
ENABKL <10,18,33>
PID0 <18,21>
PID1 <18,21>
SMB_EC_DA1 <18,32,33,36>
SMB_EC_CK1 <18,32,33,36>
PID2 <18,21>
AGP_NBREF
+AGPREF

CRT_B <19>

CRT_G <19>

CRT_R <19>

12

C806

.1U_0603_50V4Z

EXTVGA_IN#

R166

@0_0402_5%

STP_AGP#

2@SN74AHC1G08HDCK_TSSOP5

G_RST#<32>

PCIRST#<6,10,20,24,25,27,28,32,35>

AGP_IRDY#
AGP_TRDY#
AGP_STOP#

AGP_AD15
AGP_DEVSEL#
AGP_FRAME#

B+B+

12

+12VALW

C241

.1U_0603_50V4Z

100K_0402_5%

12

U36

4

O

12

C240

.1U_0402_16V4Z

+3VALW

R229

12

+3VS

5

1

P

IN1

2

IN2

G

3

1
2

R544 1@2.2K_0402_5%

1 2

R545 1@2.2K_0402_5%

1 2

R546 1@2.2K_0402_5%

1 2

R547 1@2.2K_0402_5%

1 2

R548 1@2.2K_0402_5%

1 2

R549 1@2.2K_0402_5%

1 2

+5VS +5VALW

12

C369

.1U_0402_16V4Z

SUS_STAT# <21,32>
PM_C3_STAT# <21>

+3VALW

14

U33A

P

A

3

O

B

G

SN74LVC32APWLE_TSSOP14

7

AGP_RST# = PCI_RST#

+1.5VS

12

R543
2@1K_0402_5%

AGP_PAR

DVO Detect

AGP_PAR internal pull low

+1.5VS

12

C242

.1U_0402_16V4Z

+AGPREF

+2.5V

12

.1U_0402_16V4Z

1 2

R243 1@0_0603_5%

POP for INT VGA
DEPOP for EXT VGA

V_PRST# <25,26,27>

1 2

R290 @0_0402_5%

R282 0_0402_5%

1 2

L: DVOH: AGP

C372

AGP_NBREF

12

+

+1.5VS

12

12

AGP_RST#

C355
150U_D_6.3VM

R240
1K_0603_1%

R239
1K_0603_1%

+3VS+2.5V

12

C239

.1U_0402_16V4Z

12

C273
.1U_0402_16V4Z

2@FOXCONN_QT00180A-5120C

4 4

INT_VSYNC<10>

INT_HSYNC<10>

INTDDCDA<10>

INTDDCCK<10>

A

R550

1 2

1@0_0603_5%

R552

1 2

1@0_0603_5%

R554

1 2

1@0_0603_5%

R556

1 2

1@0_0603_5%

CRT_VSYNC

CRT_HSYNC

3VDDCDA

3VDDCCK

CRT_B

CRT_G

CRT_R

B

R551

1 2

1@0_0603_5%

R553

1 2

1@0_0603_5%
R555

1 2

1@0_0603_5%

INTCRT_B <10>

INTCRT_G <10>

INTCRT_R <10>

EXTVGA_IN#

*

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

1: internal graphic
2: external AGP

D

Dell-Compal Confidential

Compal Electronics, Inc.

Title

External AGP

Size Document Number Rev

Abacus-MT LA-1682

B
Date: Sheet

E

of

17 44Tuesday, Feb ru ar y 25, 2003

0.2

5

D D

4

3

2

1

JP31

45

MGND1

46

MGND2

47

MGND3

48

MGND4

49

MGND5

50

MGND6

51

MGND7

56

MGND8

57

MGND9

54
55

C C

B B

TXLCLKOUT-

MGND10

TXLCLKOUT+

MGND11

TXUCLKOUT-

TXUCLKOUT+

PANEL_I2C_DAT

PANEL_I2C_CLK

PBAT_SMBCLK
PBAT_SMBDAT

1@JAE_FI-TD44SB-L

BACKLITE_ON

1@SN74AHC1G08HDCK_TSSOP5

TXLOUT0-

TXLOUT0+

GND1

TXLOUT1-

TXLOUT1+

GND2

TXLOUT2-

TXLOUT2+

GND3

GND4

TXUOUT0-

TXUOUT0+

GND5

TXUOUT1-

TXUOUT1+

GND6

TXUOUT2-

TXUOUT2+

GND7

GND8

GND9

VEDID

GND10
LCDVCC1
LCDVCC2

PID0
PID1
PID2
PID3

FPBACK

5VSUS

5VALW

GND12

GND11

44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

BACKLITE_ON

9
8
7
6
5
4
3
2

B+

1

B+

INVER_B+

+3VS

5

1

P

IN1

4

O

2

IN2

G

3

U80

LCD_A0- <10>
LCD_A0+ <10>

LCD_A1- <10>
LCD_A1+ <10>

LCD_A2- <10>
LCD_A2+ <10>

LCD_ACLK- <10>
LCD_ACLK+ <10>

LCD_B0- <10>
LCD_B0+ <10>

LCD_B1- <10>
LCD_B1+ <10>

LCD_B2- <10>
LCD_B2+ <10>

LCD_BCLK- <10>
LCD_BCLK+ <10>

LCD_DDCDATA <10>

LCD_DDCCLK <10>

+LCDVCC

1@0.1U_0402_10V6K

PID0 <17,21>
PID1 <17,21>
PID2 <17,21>
PID3 <17,21>

SMB_EC_CK1 <17,32,33,36>
SMB_EC_DA1 <17,32,33,36>

L52

1 2

1@FBM-11-201209-300AT_0805

1

C800

0.1U_0603_50V4Z

2

ENABKL <10,17,33>
BKOFF# <17,32>

C796

+3VS

1@FBM-11-201209-300AT_0805

1

1

C797
1@0.1U_0402_10V6K

2

2

INVPWR_B+

L51

1 2

1

C799
1@0.1U_0402_10V6K

2

+LCDVCC

+5VS
+5VALW

+LCDVDD

1

C798
1@4.7U_1206_10V7K

2

Q72

2

1@2N7002_SOT23

G

22K

2

22K

1

C793

1@0.1U_0603_50V4Z

2

+12VALW

12

R558

1@100K_0402_5%

13

1@DTC124EK_SOT23

B+

12

+5VS

1

C795
1@0.1U_0402_16V4Z

2

2

G

Q75

R560
1@100K_0402_5%

1 2

1@75K_0402_5%

+LCDVDD

12

R559
1@470_0402_5%

13

D

S

ENVDD<10>

+LCDVDD

12

R557
1@100K_0402_5%

13

D

Q73

S

1@2N7002_SOT23

Q71

1@FDS4435_SO8

1
2
3 6

4

R562

D

1 3

+5VS

1

2

C794

1@0.1U_0603_50V4Z

60mil60mil

8
7

5

Q74
1@2N7002_SOT23

S

G

2

Q70

D

S

13

1@SI2302DS_SOT23

G

2

1@0.1U_0402_16V4Z

12

R561

1@150K_0402_5%

INVPWR_B+

1

C792
1@0.1U_0603_50V4Z

2

FDS4435: P CHANNAL

C791

+3VS+12VALW

1

2

A A

Dell-Compal Confidential

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Internal LVDS

Abacus-MT LA-1682

0.2

of

18 44Tuesday, Feb ru ar y 25, 2003

1

5

4

C236

2@33P_0402_50V8J

1 2

3

2

1

C/R

C/R<17>

D D

COMP/B<17>

Y/G<17>

C C

COMP/B

Y/G

R203

2@75_0603_1%

R204

2@75_0603_1%

R205

2@75_0603_1%

12

12

12

1 2

L18
2@FLM1608081R8K_0603

1

C227
2@100P_0402_50V8J

2

1 2

L19
2@FLM1608081R8K_0603

1

C225
2@100P_0402_50V8J

2

1 2

L20
2@FLM1608081R8K_0603

1

C226
2@100P_0402_50V8J

2

C233

2@33P_0402_50V8J

1 2

C228

2@33P_0402_50V8J

1 2

2

C221
2@270P_0603_50V8J

1

2

C222
2@270P_0603_50V8J

1

2

C220
2@270P_0603_50V8J

1

SVIDEO_C

SVIDEO_CVBS

SVIDEO_Y

D19

@DAN217_SOT23

1

2

3

D4

@DAN217_SOT23

1

2

3

D5

@DAN217_SOT23

1

2

3

+3VS

JP3

3
6
7
5
2
4
1
8
9

2@SUYIN_35138S-07T1-01

CRTVCC

CRTVCC

0.1U_0402_16V4Z

1

C14

2K_0402_5%

2

12

12

R5

R201
2K_0402_5%

0_0402_5%

CRTVCC

2

1 3

D

Q14
2N7002_SOT23

JP1

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

FOX_DZ11A91-L8

3

DAN217_SOT23
D18

1

2

1

C214

3.3P_0603_50V8J

2

1

C217

27P_0402_50V8J

2

DAN217_SOT23
D1

M_SEN#<17,33>

@3.3P_0603_50V8J

B B

CRT_R<17>

CRT_G<17>

+5VS

CRT_B<17>

CRTVCC

13

Q24
SI2303DS_SOT23

SUSP<35> CRT_HSYNC<17>

2

CRT_VSYNC<17>

A A

CRT_HSYNC

CRT_VSYNC

CRT_R

CRT_G

CRT_B

5

1

P

4

OE#

A2Y

G

U13

3

SN74AHCT1G125GW_SOT353-5

5

1

P

4

OE#

A2Y

G

U4

3

SN74AHCT1G125GW_SOT353-5

R7

1K_0402_5%

1 2

75_0603_1%

1 2

R459

33_0402_5%

R460

1 2

33_0402_5%

M_SEN#

@3.3P_0603_50V8J

1

C3

2

12

R1

CRTVCC

1

2

1

1

C219

2

2

75_0603_1%

12

12

R195

C6

0.1U_0402_16V4Z

C4
@3.3P_0603_50V8J

1 2

L2
FBM-10-201209-260-T_0805

1 2

L15
FBM-10-201209-260-T_0805

1 2

L1
FBM-10-201209-260-T_0805

R2
75_0603_1%

FBM-11-160808-121-T_0603

FBM-11-160808-121-T_0603

1

2

CRTR

CRTG

CRTB

1

C2

3.3P_0603_50V8J

2

1 2

L16

1 2

L17

3

DAN217_SOT23
D3

1

2

1

C218

27P_0402_50V8J

2

100P_0402_50V8J

3

1

2

C15

0.1U_0402_16V4Z

+3VS

C1

3.3P_0603_50V8J

1

C8

2

100P_0402_50V8J

1

2

1

1

C7

2

2

100P_0402_50V8J

1

C5

2

C224
100P_0402_50V8J

G

+3VS

R4

S

1 3

D

+3VS

12

2

G

2.7K_0402_5%

R3

1 2

Q23

S

2N7002_SOT23

12

R202

2.7K_0402_5%

3VDDCDA

3VDDCCK

3VDDCDA <17>

3VDDCCK <17>

Dell-Compal Confidential

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

TV OUT & CRT

Abacus-MT LA-1682

0.2

of

19 44Tuesday, Feb ru ar y 25, 2003

1

A

B

C

D

1

2

1

2

DIMM_SMCLK
DIMM_SMDATA

SMB_CLK
SMB_DATA

IRQ14
IRQ15

GATEA20
KBRST#

GPI4
GPI3
PIRQE#
GPI5

SMLINK0

SMLINK1

APICCLK
APICD0
APICD1

R89

10K_0402_5%

D

+1.5VS

12

R564

80.6_0402_1%

12

R565

51.1_0603_1%

12

R566

40.2_0603_1%

1 2

R163 8.2K_0402_5%

1 2

R162 8.2K_0402_5%

1 2

R353 8.2K_0402_5%

1 2

R352 8.2K_0402_5%

1 2

R143 8.2K_0402_5%

1 2

R123 8.2K_0402_5%

1 2

R95 10K_0402_5%

1 2

R94 10K_0402_5%

RP4

1 8
2 7
3 6
4 5

8.2K_8P4R_1206_5%

1 2

R165

8.2K_0402_5%

1 2

R169

8.2K_0402_5%

1 2

1 2

R97
10K_0402_5%

1

C802

0.1U_0402_10V6K

2

1

C804

0.1U_0402_10V6K

2

+3VALW

1 2

of

20 44Tuesday, Feb ru ar y 25, 2003

+3VS

+3VALW

+3VS

R88
0_0402_5%

0.2

HUBLink reference Voltage

AD[0..31]<24,25,27,28,35>

1 1

H_FERR#

R319

R348

C480

R321

22_0402_5%

C395

RP5

1
2
3
4
5

8.2K_10P8R_1206_5%

RP3

1
2
3
4
5

8.2K_10P8R_1206_5%

1
2

1 2

56_0402_5%

12

1

2

12

1

2

10

PIRQA#

9

PIRQB#

8

REQ#4

7
6

10

PIRQC#

9

PIRQD#PCI_DEVSEL#

8

SIRQ

7

PCI_PLOCK#

6

REQ#0
REQ#1
REQ#2
REQ#3

REQB#

ICH_PCIRST#

+3V

5

P

IN1

4

O

IN2

G

U9

3

SN74AHC1G08HDCK_TSSOP5

A

+3VS

+3VS

PCIRST# <6,10,17,24,25,27,28,32,35>

+CPU_CORE

CLK_PCI_ICH

22_0402_5%

10P_0402_50V8K

2 2

+3VS

3 3

+3VS

4 4

CLK_ICH_66M

15P_0402_50V8J

PCI_PERR#
REQA#
PCI_STOP#
PCI_SERR#

PCI_IRDY#
PCI_TRDY#

PCI_FRAME#

+3VS

RP2

1 8
2 7
3 6
4 5

8.2K_8P4R_1206_5%

1 2

R158 8.2K_0402_5%

1 2

R571 8.2K_0402_5%

ICH_PCIRST#

AD[0..31]

C/BE#0<24,25,27,28,35>
C/BE#1<24,25,27,28,35>
C/BE#2<24,25,27,28,35>
C/BE#3<24,25,27,28,35>

REQ#0<24>
REQ#1<28>
REQ#2<25,27>

GNT#0<24>
GNT#1<28>
GNT#2<25,27>

CLK_PCI_ICH<16>

PCI_FRAME#<24,25,27,28,35>

PCI_DEVSEL#<24,25,27,28>

PCI_IRDY#<24,25,27,28>

PCI_PAR<24,25,27,28>

PCI_PERR#<24,25,27,28>

EC_WAKEUP#<32>

PCI_SERR#<24,25,27,28>

PCI_STOP#<24,25,27,28>

PCI_TRDY#<24,25,27,28,35>

PIDERST#<23>
SIDERST#<23>

DIMM_SMCLK<13,14,16,28>

B

C/BE#0
C/BE#1
C/BE#2
C/BE#3

REQ#0
REQ#1
REQ#2
REQ#3
REQ#4

CLK_PCI_ICH

PCI_PLOCK#
ICH_PCIRST#

REQA#
REQB#
PIDERST#
SIDERST#

U55A

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

H5

AD0

J3

AD1

H3

AD2

K1

AD3

G5

AD4

J4

AD5

H4

AD6

J5

AD7

K2

AD8

G2

AD9

L1

AD10

G4

AD11

L2

AD12

H2

AD13

L3

AD14

F5

AD15

F4

AD16

N1

AD17

E5

AD18

N2

AD19

E3

AD20

N3

AD21

E4

AD22

M5

AD23

E2

AD24

P1

AD25

E1

AD26

P2

AD27

D3

AD28

R1

AD29

D2

AD30

P4

AD31

J2

C/BE#0

K4

C/BE#1

M4

C/BE#2

N4

C/BE#3

B1

REQ#0

A2

REQ#1

B3

REQ#2

C7

REQ#3

B6

REQ#4

C1

GNT#0

E6

GNT#1

A7

GNT#2

B7

GNT#3

D6

GNT#4

P5

PCICLK

F1

FRAME#

M3

DEVSEL#

L5

IRDY#

G1

PAR

L4

PERR#

M2

LOCK#

W2

PME#

U5

PCIRST#

K5

SERR#

F3

STOP#

F2

TRDY#

B5

REQA#/GPI0

A6

REQB#/GPI1/REQ5#

E8

GNTA#/GPO16

C5

GNTB#/GPO17/GNT5#

FW82801DBM_BGA421

ICH4-M

SM I/F

SMB_ALERT#/GPI11

CPU I/F

HUB I/F

PCI I/F

Interrupt I/F

EEPROM I/F

LAN I/F

INTRUDER#

SMLINK0
SMLINK1

SMB_CLK

SMB_DATA

A20GATE

A20M#

DPSLP#

FERR#

IGNNE#

INIT#

INTR

CPU_PWRGOOD

RCIN#

SLP#

SMI#

STPCLK#

CLK66

HI_STB

HI_STB#
HICOMP

HUB_VREF

HUB_VSWING

APICCLK

APICD0
APICD1
PIRQA#
PIRQB#
PIRQC#

PIRQD#
PIRQE#/GPI2
PIRQF#/GPI3
PIRQG#/GPI4
PIRQH#/GPI5

IRQ14
IRQ15

SERIRQ

EE_CS

EE_IN

EE_OUT

EE_SHCLK

LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2

LAN_CLK

LAN_RSTSYNC

LAN_RST#

NMI

HI10
HI11

W6
AC3
AB1
AC4
AB4
AA5

Y22
AB23
U23
AA21
W21
V22
AB22
V21
Y23
U22
U21
W23
V23

L19

HI0

L20

HI1

M19

HI2

M21

HI3

P19

HI4

R19

HI5

T20

HI6

R20

HI7

P23

HI8

L22

HI9

N22
K21

T21
P21

N20
R23

M23
R22

J19
H19
K20
D5
C2
B4
A3
C8
D7
C3
C4
AC13
AA19
J22

D10
D11
A8
C12

A10
A9
A11
B10
C10
A12
C11
B11
Y5

SM_INTRUDER#
SMLINK0

R164 @0_0402_5%

SMLINK1
SMB_CLK
SMB_DATA
ACIN

GATEA20

R104 0_0402_5%

R110 0_0402_5%
R105 0_0402_5%

R91 0_0402_5%
R103 0_0402_5%

R112 0_0402_5%
R102 0_0402_5%
R101 0_0402_5%

R99 56_0402_5%

CLK_ICH_66M

HUB_RCOMP_ICH
HUB_VREF
HUB_VSWING

APICCLK
APICD0
APICD1
PIRQA#
PIRQB#
PIRQC#
PIRQD#
PIRQE#
GPI3
GPI4
GPI5
IRQ14
IRQ15
SIRQ

1 2

R172 @0_0402_5%

1 2

12

H_FERR#

12
12

12
12

12
12
12

HI[0..10]
HI0
HI1
HI2
HI3
HI4
HI5
HI6
HI7
HI8
HI9
HI10

1 2

CLK_ICH_66M <16>
HUB_PSTRB <9>

HUB_PSTRB# <9>

1 2

R87 48.7_0402_1%

PIRQA# <25,27>
PIRQB# <24>
PIRQC# <28>
PIRQD# <28>
PIRQE# <17>

IRQ14 <23>
IRQ15 <23>
SIRQ <25,27,32>

R156

1 2

@1K_0402_5%

R159

1 2

10K_0402_5%

ICH4-M

+3VS

G

2

DIMM_SMCLK

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

SMB_CLK

13

D

S

Q28
2N7002_SOT23

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SMB_DATA

2

G

1 3

D

S

Q27
2N7002_SOT23

DIMM_SMDATA

DIMM_SMDATA <13,14,16,28>

C

HI[0..10] <9>

+1.5VS

SM_INTRUDER# <34>

ACIN <32,36,38>

GATEA20 <32>
H_A20M# <6>
H_DPSLP# <6,10>
H_FERR# <6>
H_IGNNE# <6>
H_INIT# <6>
H_INTR <6>
H_NMI <6>
H_PWRGD <6>
KBRST# <32>
H_SLP# <6>
H_SMI# <6>
H_STPCLK# <6>

HUB_VSWING

C801

0.01U_0402_25V7Z

HUB_VREF

C803

0.01U_0402_25V7Z

Dell-Compal Confidential

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

INTEL ICH4 (1/3)

Abacus-MT LA-1682

A

SYSRST#<6>

VLBA#<32>

PWRBTN#<32>

EC_SWI#<32>

RSMRST#<32,34>

SUS_STAT#<17,32>

R96 33_0402_5%

IAC_BITCLK

IAC_SDATA_IN0
IAC_SDATA_IN1

USBP0+<34>

USBP0-<34>

USBP2+<34>

USBP2-<34>

R86

22.6_0603_1%

10K_0402_5%

PM_CPUPERF#

R160 33_0402_5%

USB_RBIAS

+3VS

1 1

1 2

R98 @1K_0402_5%

1 2

R150 @8.2K_0402_5%

1 2

R90 @1K_0402_5%

1 2

R78 @1K_0402_5%

2 2

3 3

4 4

PROCHOT#<6,33>

EC_THRM#<32>

1 2

R347 @100K_0402_5%

+3VS

R82 100K_0402_5%

1 2

R83 100K_0402_5%

1 2

R80 100K_0402_5%

1 2

R77 100K_0402_5%

1 2

+3VALW

R144 8.2K_0402_5%

1 2

R142 8.2K_0402_5%

1 2

R130 8.2K_0402_5%

1 2

R147 8.2K_0402_5%

1 2

+3VS

CLKRUN#<24,27,28,32>

IAC_SYNC<29,31>

IAC_SDATAO<29,31>

@22P_0402_50V8J

ICH_SPKR

ICH_AC_SDOUT LID_OUT#

PM_STPCPU#

PM_STPPCI#

R842 and R81 depop for ICH4

PM_STPCPU#<16,41>
PM_STPPCI#<16>
RTCCLK<10>

1 2

C457

R391

@0_0402_5%

R392

0_0402_5%

RTCCLK

R346

10K_0402_5%

1

2

A

RTCCLK

1

2

12

ICH_THRM#

12

PID0
PID1
PID2
PID3

OVCUR#1

OVCUR#3

OVCUR#4
OVCUR#5

D46

RB751V_SOD323

2 1

1 2

R335 33_0402_5%

1 2

R325 33_0402_5%

1

C452
@22P_0402_50V8J

2

R84 0_0402_5%
R81 0_0402_5%
R18 22_0402_5%

C62
@100P_0402_25V8K

1 2

ICLKRUN#CLKRUN#

ICH_AC_SYNC
ICH_AC_SDOUT

12
12

PM_CPUPERF#<6>

IAC_BITCLK<29,31>

IAC_RST#<29,31>
IAC_SDATA_IN0<29>
IAC_SDATA_IN1<31>

AGP_BUSY#<10,17>

PM_C3_STAT#<17>

PM_DPRSLPVR<41>

PM_PWROK<10,32,34>

PM_SLP_S1#<16,32>
PM_SLP_S3#<16,32>
PM_SLP_S4#<32>
PM_SLP_S5#<32>

VGATE<32,41>

LAD0<32>

LAD1<32>

LAD2<32>

LAD3<32>

LFRAME#<32>

OVCUR#0<34>
OVCUR#2<34>

1 2

SIDEPWR<23>

PID0<17,18>
PID1<17,18>
PID2<17,18>
PID3<17,18>

+3VALW

R79

AGP_BUSY#
SYSRST#

VLBA#
ICLKRUN#

EC_SWI#

ICH_THRM#

V_GATE

12

12

ICH_AC_SDOUT
ICH_AC_SYNC

LAD0
LAD1
LAD2
LAD3

LFRAME#

OVCUR#0
OVCUR#1
OVCUR#2
OVCUR#3
OVCUR#4
OVCUR#5

B

+3VS

12

B

12

R569
10K_0402_5%

R2

Y3

AB2

T3

AC2

V20
AA1
AB6

Y1
AA6
W18

Y4

Y2
AA2
W19

Y21
AA4
AB3

V1

J21

Y20

V19

B8
C13
D13

A13
B13

D9
C9

T2

R4

T4

U2
U3
U4

T5

C20
D20

A21

B21
C18
D18

A19

B19
C16
D16

A17

B17

B15
C14

A15

B14

A14
D14

A23

B23

J20
G22

F20
G20

F21
H20

F23
H22
G23
H21

F22

E23

U55B

AGPBUSY#
SYSRST#
BATLOW#
C3_STAT#
CLKRUN#
DPRSLPVR
PWRBTN#
PWROK
RI#
RSMRST#
SLP_S1#
SLP_S3#
SLP_S4#
SLP_S5#
STP_CPU#
STP_PCI#
SUS_CLK
SUS_STAT#/LPCPD#
THRM#

SSMUXSEL
CPUPERF#
VGATE/VRMPWRGD

AC97 I/F

AC_BITCLK
AC_RST#
AC_SDATAIN0
AC_SDATAIN1
AC_SDATAIN2
AC_SDATAOUT
AC_SYNC

LPC_AD0
LPC_AD1
LPC_AD2

LPC I/F

LPC_AD3
LPC_DRQ#0
LPC_DRQ#1
LPC_FRAME#

USBP0+
USBP0­USBP1+
USBP1­USBP2+
USBP2­USBP3+
USBP3­USBP4+
USBP4­USBP5+

USB I/F

USBP5-

OC#0
OC#1
OC#2
OC#3
OC#4
OC#5

USB_RBIAS
USB_RBIAS#

GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38

GPIO

GPIO39
GPIO40
GPIO41
GPIO42
GPIO43

FW82801DBM_BGA421

C

ICH4-M

GPIO

PM

IST

IDE I/F

CLOCK

MISC

GPI7

GPI8
GPI12
GPI13

GPIO25
GPIO27
GPIO28

PDA0
PDA1

PDA2
PDCS1#
PDCS3#

PDDREQ

PDDACK#

PDIOR#

PDIOW#

PIORDY

PDD0

PDD1

PDD2

PDD3

PDD4

PDD5

PDD6

PDD7

PDD8

PDD9

PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

SDA0

SDA1

SDA2
SDCS1#
SDCS3#

SDDREQ

SDDACK#

SDIOR#

SDIOW#

SIORDY

SDD0

SDD1

SDD2

SDD3

SDD4

SDD5

SDD6

SDD7

SDD8

SDD9

SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

CLK14
CLK48

RTCRST#

VBIAS
RTCX1
RTCX2

SPKR

THRMTRIP#

R3
V4
V5
W3
V2
W1
W4

AA13
AB13
W13
Y13
AB14

AA11
Y12
AC12
W12
AB12

AB11
AC11
Y10
AA10
AA7
AB8
Y8
AA8
AB9
Y9
AC9
W9
AB10
W10
W11
Y11

AA20
AC20
AC21
AB21
AC22

AB18
AB19
Y18
AA18
AC19

W17
AB17
W16
AC16
W15
AB15
W14
AA14
Y14
AC15
AA15
Y15
AB16
Y16
AA17
Y17

J23
F19

W7
Y6
AC7
AC6

H23
W20

EC_SMI#
SCI#

PDA0
PDA1
PDA2
PDCS1#
PDCS3#

PDDREQ
PDDACK#
PDIOR#
PDIOW#
PDIORDY

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

SDA0
SDA1
SDA2
SDCS1#
SDCS3#

SDDREQ
SDDACK#
SDIOR#
SDIOW#
SDIORDY

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

RTC_RST#
VBIAS
RTCX1
RTCX2

H_THERMTRIP#

EC_SMI# <32>
SCI# <32>
LID_OUT# <32>
EC_FLASH# <32>

PDA0 <23>
PDA1 <23>
PDA2 <23>
PDCS1# <23>
PDCS3# <23>

PDDREQ <23>
PDDACK# <23>
PDIOR# <23>
PDIOW # <23>
PDIORDY <23>

SDA0 <23>
SDA1 <23>
SDA2 <23>
SDCS1# <23>
SDCS3# <23>

SDDREQ <23>
SDDACK# <23>
SDIOR# <23>
SDIOW # <23>
SDIORDY <23>

CLK_ICH_14M <16>
CLK_ICH_48M <16>

ICH_SPKR <30>
H_THERMTRIP# <6>

C450

12P_0402_50V8J

R329

X3

32.768KHZ_12.5P

1

2

PDD[0..15]

SDD[0..15]

J1
JOPEN

12

10M_0603_5%

1

C448
12P_0402_50V8J

2

ICH4-M

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

12

R326
1K_0402_5%

1 2

R331
10M_0603_5%

D

IAC_BITCLK

12

R336
@10_0402_5%

1

C460
@10P_0402_50V8K

2

CLK_ICH_14M

12

R93
@10_0402_5%

1

C124
@10P_0402_50V8K

2

CLK_ICH_48M

12

R92
@10_0402_5%

1

C123
@10P_0402_50V8K

PDD[0..15] <23>

SDD[0..15] <23>

1

C156

12

1 2

0.1U_0402_10V6K

2

R_VBIAS

1 2

C163

0.047U_0402_16V4Z

R324 @22M_0603_5%
R330

@2.4M_0603_1%

180K_0402_5%

1 2

12

R145

R154
1K_0402_5%

2

+RTCVCC

12

Dell-Compal Confidential

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

INTEL ICH4 (2/3)

Abacus-MT LA-1682

of

D

21 44Tuesday, Feb ru ar y 25, 2003

0.2

A

U55C

D22

VSS0

E10

VSS1

E14

VSS2

E16

VSS3

E17

VSS4

E18

VSS5

E19

VSS6

E21

VSS7

E22

VSS8

F8

1 1

2 2

3 3

4 4

VSS9

G19

VSS10

G21

VSS11

G3

VSS12

G6

VSS13

H1

VSS14

J6

VSS15

K11

VSS16

K13

VSS17

K19

VSS18

K23

VSS19

K3

VSS20

L10

VSS21

L11

VSS22

L12

VSS23

L13

VSS24

L14

VSS25

L21

VSS26

M1

VSS27

M11

VSS28

M12

VSS29

M13

VSS30

M20

VSS31

M22

VSS32

N10

VSS33

N11

VSS34

N12

VSS35

N13

VSS36

N14

VSS37

N19

VSS38

N21

VSS39

N23

VSS40

N5

VSS41

P11

VSS42

P13

VSS43

P20

VSS44

P22

VSS45

P3

VSS46

R18

VSS47

R21

VSS48

R5

VSS49

T1

VSS50

T19

VSS51

T23

VSS52

U20

VSS53

V15

VSS54

V17

VSS55

V3

VSS56

W22

VSS57

W5

VSS58

W8

VSS59

Y19

VSS60

Y7

VSS61

A16

VSS62

A18

VSS63

A20

VSS64

A22

VSS65

A4

VSS66

AA12

VSS67

AA16

VSS68

AA22

VSS69

AA3

VSS70

AA9

VSS71

AB20

VSS72

AB7

VSS73

AC1

VSS74

AC10

VSS75

AC14

VSS76

AC18

VSS77

AC23

VSS78

AC5

VSS79

B12

VSS80

B16

VSS81

B18

VSS82

B20

VSS83

B22

VSS84

B9

VSS85

C15

VSS86

C17

VSS87

C19

VSS88

C21

VSS89

C23

VSS90

C6

VSS91

D1

VSS92

D12

VSS93

D15

VSS94

D17

VSS95

D19

VSS96

D21

VSS97

D23

VSS98

D4

VSS99

D8

VSS100

A1

VSS101

FW82801DBM_BGA421

B

ICH4-M

VCCSUS3.3_0
VCCSUS3.3_1
VCCSUS3.3_2
VCCSUS3.3_3
VCCSUS3.3_4
VCCSUS3.3_5
VCCSUS3.3_6
VCCSUS3.3_7
VCCSUS3.3_8
VCCSUS3.3_9

POWERGND

VCCSUS1.5_0
VCCSUS1.5_1
VCCSUS1.5_2
VCCSUS1.5_3
VCCSUS1.5_4
VCCSUS1.5_5
VCCSUS1.5_6
VCCSUS1.5_7

VCC5REFSUS1

VCC_CPU_IO_0
VCC_CPU_IO_1
VCC_CPU_IO_2

VCCLAN3.3_0
VCCLAN3.3_1

VCCLAN1.5_0
VCCLAN1.5_1

ICH4-M

VCC3.3_0
VCC3.3_1
VCC3.3_2
VCC3.3_3
VCC3.3_4
VCC3.3_5
VCC3.3_6
VCC3.3_7
VCC3.3_8

VCC3.3_9
VCC3.3_10
VCC3.3_11
VCC3.3_12
VCC3.3_13
VCC3.3_14
VCC3.3_15

VCC1.5_0

VCC1.5_1

VCC1.5_2

VCC1.5_3

VCC1.5_4

VCC1.5_5

VCC1.5_6

VCC1.5_7

VCC5REF1
VCC5REF2

VCCHI_0
VCCHI_1
VCCHI_2
VCCHI_3

VCCPLL

VCCRTC

A5
AC17
AC8
B2
H18
H6
J1
J18
K6
M10
P12
P6
U1
V10
V16
V18

E11
F10
F15
F16
F17
F18
K14
V7
V8
V9

K10
K12
K18
K22
P10
T18
U19
V14

E12
E13
E20
F14
G18
R6
T6
U6

E7
V6

E15

L23
M14
P18
T22

AA23
P14
U18

C22

AB5

E9
F9

F6
F7

+1.5VS_PLL

C

VCC5REF

VCC5REFSUS

+1.5VS

+CPU_CORE

1 2

R85 0_0805_5%

+RTCVCC

+3VS_ICHLAN

1 2

R338 0_0805_5%

+1.5VS_ICHLAN

1 2

R332 0_0805_5%

+3VS

+3VALW

+1.5VS

+1.5VALW

+1.5VS

+3VS

+1.5VS

D

+3VS

1

C146

2

4.7U_0805_10V4Z

1

C463

0.1U_0402_16V4Z

2

+3VALW

1

C433

4.7U_0805_10V4Z

2

1

C447

0.1U_0402_16V4Z

2

+1.5VS

1

C425

4.7U_0805_10V4Z

2

E

1

C140

0.1U_0402_16V4Z

2

1

C449

0.1U_0402_16V4Z

2

1

C434

0.1U_0402_16V4Z

2

1

C436

0.1U_0402_16V4Z

2

1

C427

0.1U_0402_16V4Z

2

1

C428

0.1U_0402_16V4Z

2

1

C430

0.1U_0402_16V4Z

2

1

C431

0.1U_0402_16V4Z

2

1

C396

0.1U_0402_16V4Z

2

1

C437

0.1U_0402_16V4Z

2

1

C441

0.1U_0402_16V4Z

2

1

C397

0.1U_0402_16V4Z

2

1

C451

0.1U_0402_16V4Z

2

1

C426

0.1U_0402_16V4Z

2

1

C467

0.1U_0402_16V4Z

2

F

1

2

1

2

1

2

1

2

C9

0.1U_0402_16V4Z

C469

0.1U_0402_16V4Z

C464

0.1U_0402_16V4Z

C465

0.1U_0402_16V4Z

1

C416

0.1U_0402_16V4Z

2

1

C473

0.1U_0402_16V4Z

2

1

C454

0.1U_0402_16V4Z

2

1

C446

0.1U_0402_16V4Z

2

G

1

C466

0.1U_0402_16V4Z

2

1

C472

0.1U_0402_16V4Z

2

1

C442

0.1U_0402_16V4Z

2

1

C440

0.1U_0402_16V4Z

2

1

C424

0.1U_0402_16V4Z

2

1

C443

0.1U_0402_16V4Z

2

1

C445

0.1U_0402_16V4Z

2

1

C398

0.1U_0402_16V4Z

2

H

VCC DECOUPLING

+1.5VS

1

C417

0.1U_0402_16V4Z

2

1

C453

0.1U_0402_16V4Z

2

1

C459

4.7U_0805_10V4Z

2

+1.5VALW

1

C444

0.1U_0402_16V4Z

2

1

C429

0.1U_0402_16V4Z

2

1

C435

0.1U_0402_16V4Z

2

1

C439

4.7U_0805_10V4Z

2

VCCHI DECOUPLING

+CPU_CORE

1

2

+RTCVCC

2

1

C130

0.1U_0402_16V4Z

C153

0.1U_0402_10V6K

1

C438

0.1U_0402_16V4Z

2

+1.5VS_PLL

1

2

1

C432
1U_0603_10V4Z

2

C129

0.1U_0402_16V4Z

1

C128

0.01U_0402_25V7Z

2

+1.5VS_ICHLAN

1

C468

0.1U_0402_16V4Z

2

1SS355_SOD323

C136

1U_0603_10V4Z

D23

1

2

1

C462

0.1U_0402_16V4Z

2

+3VALW

1 2

1

C143

0.1U_0402_16V4Z

2

+5VALW

12

1

C455

4.7U_0805_10V4Z

2

R111
1K_0603_1%

1U_0603_10V4Z

1SS355_SOD323

VCC5REFVCC5REFSUS

C475

+3VS_ICHLAN

1

C456

0.1U_0402_16V4Z

2

+3VS

D13

1

2

+5VS

1 2

1

C474

0.1U_0402_16V4Z

2

1

2

12

R349
1K_0603_1%

C461

0.1U_0402_16V4Z

Dell-Compal Confidential

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

C

D

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

F

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

INTEL ICH4 (3/3)

Abacus-MT LA-1682

G

0.2

of

22 44Tuesday, Feb ru ar y 25, 2003

H

A

B

C

D

E

HDD Connector

SDD[0..15]<21>

1 1

SIDERST#<20>

SDDREQ<21>
SDIOW#<21>
SDIOR#<21>
SDIORDY<21>

IRQ15<20>
SDA1<21>
SDA0<21>
SDCS1#<21>

2 2

SDD7
SDD6
SDD5
SDD4 SDD11
SDD3 SDD12
SDD2 SDD13
SDD1 SDD14
SDD0 SDD15

SDDREQ

SDIORDY
RSDDACK#
IRQ15

SHDD_LED#

+5VSHDD

SDD[0..15]

JP6

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44

FOX_HH99227-S1-TR

SDD8
SDD9
SDD10

SEC_CSEL

R274

470_0402_5%

1 2

SDA2 <21>
SDCS3# <21>

+5VSHDD

1000P_0402_50V7K

CD-ROM Connector

PDD[0..15]<21>

1 2

1 2

C196

3 3

4 4

INT_CD_L<29>
PIDERST#<20>

PDIOW#<21>

PDIORDY<21>

IRQ14<20>

PDA1<21>
PDA0<21>

PDCS1#<21>

+5VS

C197

47P_0402_50V8J

PDD7
PDD6
PDD5
PDD4 PDD12
PDD3
PDD2
PDD1
PDD0

PDIORDY
IRQ14

PHDD_LED#

PRI_CSEL

R185
470_0402_5%

1 2

PDD[0..15]

47P_0402_50V8J

JP14

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50

SUYIN_800185MB050S106ZU

CD_AGND <29>

PDD8
PDD9
PDD10
PDD11

PDD13
PDD14
PDD15
PDDREQ

RPDDACK#
PDIAG#

1 2

1 2

C563

0.1U_0402_16V4Z

INT_CD_R <29>

PDDREQ <21>
PDIOR# <21>

R374

100K_0402_5%

PDA2 <21>
PDCS3# <21>

1 2

47P_0402_50V8J

+5VS

C195

+5VS

+5VSHDD

C386

1

2

SDDACK#<21>

0.1U_0402_16V4Z

1

C389

2

+3VS

+3VS

PDDACK#<21>

+5VS

1

C567
1000P_0402_50V7K

2

+5VS

1

C206
1000P_0402_50V7K

2

1

C387

2

22U_1206_10V4Z

1 2

R280 4.7K_0402_5%

1 2

R289 22_0402_5%

SDDREQ

PDDREQ

1 2

C323
33P_0402_50V8J

1 2

R370 4.7K_0402_5%

1 2

R371 22_0402_5%

1 2

C559
33P_0402_50V8J

1

C565

0.1U_0402_16V4Z

2

1

C561

0.1U_0402_16V4Z

2

1U_0603_10V4Z

1

C375

2

SDIORDY

RSDDACK#

PDIORDY

RPDDACK#

1

2

1

2

1

2

0.1U_0402_16V4Z

C204
1U_0603_10V4Z

C205
1U_0603_10V4Z

C377

1

C202
10U_1206_10V4Z

2

1

C203
10U_1206_10V4Z

2

1

C643
@22U_1206_10V4Z

2

SIDEPWR<21>

2N7002_SOT23

100K_0402_5%

PHDD_LED#
SHDD_LED#

Q18

R67

+12VALW

2

G

12

13

D

S

1 2

R55
100K_0402_5%

150K_0603_5%

+5VS

100K_0402_5%

1 2

SI2301DS: P CHANNEL
VGS: -4.5V, RDS: 130 mOHM
VGS: -2.5V, RDS: 190mOHM
Id(MAX): 2.3A
VGS(MAX): +-8V

+5VS

12

R54

+5VS

R74

5

1

P

IN1

O

2

IN2

G

U18

3

SN74AHC1G08HDCK_TSSOP5

D1

SG

3

2

Q6
SI2301DS_SOT23

2

1

C86

0.1U_0402_16V4Z

2

C105

1 2

0.1U_0402_16V4Z

ACT_LED#

4

+5VSHDD

13

ACT_LED# <31>

Dell-Compal Confidential

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

IDE/FDD/CD-ROM Module

Abacus-MT LA-1682

0.2

of

23 44Tuesday, Feb ru ar y 25, 2003

E

5

+3VWOL

0.1U_0402_16V4Z

1

2

10U_1206_10V4Z

D D

+3VAUXLAN

+3VS

C C

PCI_FRAME#<20,25,27,28,35>

B B

A A

PCI_DEVSEL#<20,25,27,28>

CLK_PCI_LAN<16>

1

C97

PCI_IRDY#<20,25,27,28>

PCI_TRDY#<20,25,27,28,35>

PCI_STOP#<20,25,27,28>
PCI_PERR#<20,25,27,28>
PCI_SERR#<20,25,27,28>

LAN_PME#<33>

CLKRUN#<21,27,28,32>

1

2

C96

2

R461 0_0603_5%

1 2

1 2

R462 @0_0603_5%

AD[0..31]<20,25,27,28,35>

C/BE#3<20,25,27,28,35>
C/BE#2<20,25,27,28,35>
C/BE#1<20,25,27,28,35>
C/BE#0<20,25,27,28,35>

PCI_PAR<20,25,27,28>

PIRQB#<20>

PCIRST#0,17,20,25,27,28,32,35>

GNT#0<20>
REQ#0<20>

Y1
25MHZ_20P

XI

1 2

C39
27P_0402_50V8J

1 2

R64 100_0402_5%

0.1U_0402_16V4Z

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20

AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

PCIRST#

LAN_AD17

XO

LAN_AD17AD17

5

1

C94

2

AD[0..31]

12

R29
200_0603_5%

1

C40
27P_0402_50V8J

2

0.1U_0402_16V4Z

1

C77

2

+3VWOL

U11

122

PCI_AD31

123

PCI_AD30

124

PCI_AD29

126

PCI_AD28

127

PCI_AD27

128

PCI_AD26

1

PCI_AD25

3

PCI_AD24

6

PCI_AD23

8

PCI_AD22

9

PCI_AD21

10

PCI_AD20

11

PCI_AD19

14

PCI_AD18

15

PCI_AD17

16

PCI_AD16

33

PCI_AD15

34

PCI_AD14

36

PCI_AD13

37

PCI_AD12

38

PCI_AD11

39

PCI_AD10

41

PCI_AD9

42

PCI_AD8

45

PCI_AD7

48

PCI_AD6

49

PCI_AD5

50

PCI_AD4

51

PCI_AD3

53

PCI_AD2

54

PCI_AD1

55

PCI_AD0

4

PCI_CBE3_L

18

PCI_CBE2_L

32

PCI_CBE1_L

43

PCI_CBE0_L

20

PCI_FRAME_L

21

PCI_IRDY_L

23

PCI_TRDY_L

26

PCI_DEVSEL_L

27

PCI_STOP_L

28

PCI_PERR_L

29

PCI_SERR_L

31

PCI_PAR

116

PCI_INT_L

117

PCI_RST_L

118

PCI_CLK

119

PCI_GNT_L

121

PCI_REQ_L

113

PCI_PME_L

5

PCI_IDSEL

22

PCI_CLKRUN_L

67

XTAL_IN

66

XTAL_OUT

BCM4401_LQFP128

1

C74

2

0.1U_0402_16V4Z

+3VWOL

+1.8VLAN

112

44

VDDCORE1

VDDCORE217VDDCORE3

0.1U_0402_16V4Z

1

C88

2

115

125

7

VDDBUS1

VDDBUS2

VDDBUS319VDDBUS430VDDBUS540VDDBUS652VDDBUS7

Broadcom

BCM 4401L

VSS012VSS146VSS2

111

100

1

2

0.1U_0402_16V4Z

+3VAUXLAN

106

94

NC10

VDDIO179VDDIO2

VSS3

VSS484VSS52VSS624VSS774VSS813VSS947VSS10

4

C87

+1.8VLAN

96

97

REG_AVDD1

REG_AVDD2

VSS11

35

120

4

1

C80

0.1U_0402_16V4Z

2

+3VWOL

92

114

56

VESD1

VESD225VESD3

REG_VOUT191REG_VOUT2

Place closely pin 118

+3VAUXLAN

68

65

XTAL_AVSS

XTAL_AVDD

EPHY_AGND
EPHY_AVDD

EPHY_BIAS_AVDD

EPHY_BIAS_AVSS

EPHY_PLLVDD
EPHY_PLLGND

EPHY_VREF

EPHY_RDAC

EPHY_TESTMODE

EPHY_TDN
EPHY_RDP
EPHY_RDN

VAUX_AVAIL

BOOTROM_SCL
BOOTROM_SDA

SPROM_CS

SPROM_CLK

SPROM_DOUT

SPROM_DIN

EXT_POR_L

JTAG_TRST_L

CLK_PCI_LAN

12

R52
33_0402_5%

1

C79
22P_0402_50V8J

2

1

C67
1000P_0402_50V7K

2

LED0_L
LED1_L
LED2_L
LED3_L

EPHY_TDP

NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7

NC8
NC9

JTAG_TDO
JTAG_TCK

JTAG_TDI

JTAG_TMS

+1.8VLAN

1

C41

4.7U_0805_10V4Z

2

+3V

10K_0402_5%

LINK_LED10#

75

LINK_LED100#

76

ACTLED#

77
78

58
57

69
70

EPHY_PLLVDDAD19

64
63

R34 @10K_0402_5%

71

R28 1.27K_0603_1%

72
88

LAN_TX+

62

LAN_TX-

61

LAN_RX+

59

LAN_RX-

60
104

105
103
108
102
109
110
107

87
86
85

90
93

98
95
101
99

89
83

80
82
73
81

LAN_RX+
LAN_RX­LAN_TX+
LAN_TX-

3

0.1U_0402_16V4Z

1

C72

2

0.1U_0402_16V4Z

L7
@BLM11A121SPT_0603

L39
BLM11A121SPT_0603

12

12

R33

R32
10K_0402_5%

L8

1 2

LCN0603T-R22J-S_5%_0603

1 2

1 2

+3VAUXLAN

12

R35
1K_0402_5%

SPROM_CS
SPROM_CLK
SPROM_DOUT
SPROM_DI

LAN_DISABLE# <32>

SPROM_DOUT SPROM_CLK

1Kb

4Kb

10K Pullup

16Kb

EPHY_PLLVDD

C54

4.7U_0805_10V4Z

R53 49.9_0805_1%
R51 49.9_0805_1%
R42 49.9_0805_1%
R46 49.9_0805_1%

Place close to U11

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0.1U_0402_16V4Z

1

2

12

12

+3VAUXLAN

+1.8VLAN
+3VAUXLAN

C95

12

R31
10K_0402_5%

1

2

+1.8VLAN

None None

None

3

10K Pullup

1

2

C52
1000P_0402_50V7K

2

1

12
12
12
12

C82

+3VAUXLAN+3VALW

@10K_0402_5%

None

+3VAUXLAN

1

2

+3VAUXLAN

12

R30

1

C56

0.1U_0402_16V4Z

2

C70

0.1U_0402_16V4Z

1

C46

2

1000P_0402_50V7K

LINK_LED10#

WLAN_LINK_10_LED<28>

LINK_LED100#

WLAN_LINK_80211A<28>

ACTLED#

WLAN_ACT_LED<28>

12

R25
@10K_0402_5%

U8

1

CS

2

SK

3

DI

4

DO

AT93C46_SO8

+3VAUXLAN

LAN_TX+
LAN_TX-

LAN_RX+
LAN_RX-

1

2

C215

0.01U_0402_25V7Z

Close to RJ45 under inch

1

C84

0.1U_0402_16V4Z

2

+3VAUXLAN

1

C55

10U_1206_10V4Z

2

D8

VCC

NC
ORG
GND

1

2

2

RB751V_SOD323

D9

RB751V_SOD323

D2
RB751V_SOD323

RB751V_SOD323
D7

D10
RB751V_SOD323

+3VAUXLAN

8
7
6
5

U2

1

TD+
TD-2TX-

3

TDC

4

RDC

5

RD+

6

RD-

Pulse_H1112

C213

0.01U_0402_25V7Z

2

WLAN_LINK_80211A

WLAN_LINK_10_LDE

WLAN_ACT_LED

WLAN_LINK_80211A
WLAN_LINK_10_LDE

13

D

Q16
2N7002_SOT23

S

13

D

Q15
2N7002_SOT23

S

13

D

Q17

S

2N7002_SOT23

1

C20

0.1U_0402_16V4Z

2

12
11

10
9

8
7

12

R193

1

2

1

C48

0.1U_0402_16V4Z

2

21

2

G

21

21

2

G

21

21

2

G

12

R452
@100K_0402_5%

TX+

TCT
RCT

RX+

RX-

75_0603_1%

1

LED (JP28)WLAN LOM

LINK_LED100#

LINK_LED10#

ACTLED#

NC

C45

0.1U_0402_16V4Z

+3VAUXLAN

47K

B

2

10K

12

R190

75_0603_1%

2

C211

1000P_1808_3KV7K

1

2

31

C

LAN_RJ45T+
LAN_RJ45T­LAN_RJ45R+

LAN_RJ45R-

75_0603_1%

1

C47

0.1U_0402_16V4Z

2

2

+3VAUXLAN

31

47K

B

10K

C

E

Q5
DTA114YKA_SOT23

1 2

12

R192

ORANGE (100M)

GREEN (10M)

YELLOW

ORANGE/GREEN

1

C38

0.1U_0402_16V4Z

2

+3VAUXLAN

31

E

47K

B

10K

C

Q4
DTA114YKA_SOT23

E

Q3
DTA114YKA_SOT23

R13

200_0603_5%

R15

200_0603_5%

JP7

1

PR1+

2

PR1-

3

PR2+

4

PR3+

5

PR3-

6

PR2-

7

PR4+

8

PR4-

FOX_JM66113-L1B1-TR

12

R191
75_0603_1%

2

C212
1000P_1808_3KV7K

1

R14

200_0603_5%

12

10

9

LDE_GREEN+

LDE_ORANGE+

12

12

13

11

G_O_LED-

LED_YELLOW-

LED_YELLOW+

SHLD1

SHLD2

14

15

Chassis GND & Digital GND Short Together

Dell-Compal Confidential

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

BROADCOM 4401L LAN

Abacus-MT LA-1682

of

24 44Tuesday, Feb ru ar y 25, 2003

1

0.2

A

B

C

D

E

12

R73

PHY_CPS

12

PHY_CNA

CBS_PC0
CBS_PC1
CBS_PC2

PCI4510_R0
PCI4510_R1

IEEE1394_TPA0+
IEEE1394_TPA0-

IEEE1394_TPBIAS1

2@1U_0603_10V4Z

VDPLL

+3V_CBSD

1

C101

2

2@0.1U_0402_16V4Z

@402K_0603_1%

P10

P17

V10

W10

P9

W13

V13

V12

W12

V15

W15

V11

W11

V14

W14

U12
U15

R11
U13
U14

U11
R12
R13

P15

N14
T19

R17
N15
M14

N17
N18
N19
M15
M17
M18
M19

B7
C7
F7
A6
B6
E7
C6

1

C102

2

U35B

CPS

CNA

PC0
PC1
PC2

R0
R1

TPA0+
TPA0-

TPA1+
TPA1-

TPB0+
TPB0­TPB1+
TPB1­TPBIAS0
TPBIAS1

AVD2
AVD3
AVD4

AGND2
AGND3
AGND4

VDPLL

VSPLL
FILTER0

FILTER1
MC_RSVD1
MC_RSVD3

MC_RSVD4
MC_RSVD5
MC_RSVD6
MC_RSVD7
MC_RSVD8
MC_RSVD9
MC_RSVD10

SC_CD#
SC_RST
SC_CLK
SC_DATA
SC_PWR
SC_MODE
SC_FCB

2@PCI4510GHK_PBGA209

1

2

+3V_CBSD

1 1

2 2

3 3

4 4

R69

@0_0402_5%

R72

2@0_0402_5%

2@5.1K_0402_1%

2@270P_0402_50V8J

R65 2@1K_0402_5%
R56 2@1K_0402_5%

IEEE1394_TPBIAS0

1

2

C823

2@1U_0603_10V4Z

CBS_MFUNC1
CBS_MFUNC2
CBS_MFUNC4
CBS_MFUNC5
CBS_MFUNC6

R68

1 2

1 2

1 2

2@0_0402_5%

R574

12

C822

12

12
12

R577

2@56.2_0402_1%

R578

2@56.2_0402_1%

+3V +3V_CBSA

2@BLM21A601SPT_0805
L10

1 2

1

C114
2@10U_1206_10V4Z

2

1 2

@0_0402_5%

R71

1 2

1 2

R575

12

2@56.2_0402_1%

R576

12

2@56.2_0402_1%

C89

IEEE1394_TPA0+

12

IEEE1394_TPA0-

12

1 2

R23 2@10K_0402_5%

1 2

R38 2@10K_0402_5%

1 2

R36 2@10K_0402_5%

1 2

R39 2@10K_0402_5%

1 2

R26 2@10K_0402_5%

2@0.1U_0402_16V4Z

A

R59
@0_0402_5%

R58
2@0_0402_5%

12

C98

+3V_CBSA

1 2

C78

1

C108

2

R70

2@1K_0402_5%

1 2

R50
2@43K_0402_5%

R63

1 2

2@6.34K_0603_1%

IEEE1394_TPB0+
IEEE1394_TPB0­IEEE1394_TPB1+

2@0.1U_0402_16V4Z

IEEE1394_TPB1­IEEE1394_TPBIAS0

12

FILTER0
FILTER1

2@0.1U_0402_10V6K

2@0.1U_0402_16V4Z

+3V_CBSA

PCI4510

RI_OUT#/PME#

INTA#/MFUNC0
INTB#/MFUNC1

LEDSKT/MFUNC5

PHY_TEST_MA

C109
2@0.1U_0402_16V4Z

B

VCC_G01
VCC_M01
VCC_R01
VCC_W08

VCC_L19

VCC_H19

VCC_E19
VCC_A13
VCC_A08
VCC_A05

VCCCB_G14
VCCCB_A11

VCCP_L01

VCCP_W05

1.8V_G02

1.8V_L18

VCCD0#
VCCD1#

VPPD0#
VPPD1#

GND_E01
GND_K01
GND_N01

GND_W06

GND_P19
GND_K19
GND_G19
GND_A15
GND_A10

GND_A7

VR_EN#

SUSPEND#

SPKROUT

MFUNC2
MFUNC3
MFUNC4

MFUNC6

TEST0
TEST1

CLK48_RSVD

G1
M1
R1
W8
L19
H19
E19
A13
A8
A5

G14
A11

L1
W5

G2
L18

E6
B5

A4
C5

E1
K1
N1
W6
P19
K19
G19
A15
A10
A7

H5

G3

J3
E2
F5

G6
F3
F2
G5
F1
H6

E3

SCL

D1

SDA

P18
U10
R10
F6

R18

XI

R19

XO

2@22P_0402_50V8J

+3V_CBSD

CBS_VCC

+3V_CBSD

C53 2@0.1U_0402_16V4Z

1 2
1 2

C73 2@0.1U_0402_16V4Z

VCCD0# <26,27>
VCCD1# <26,27>

VPPD0 <26,27>
VPPD1 <26,27>

1V8_VR_EN#

R57

2@0_0402_5%

PCM_SPK#
PIRQA#

CBS_MFUNC1
CBS_MFUNC2

CBS_MFUNC4
CBS_MFUNC5
CBS_MFUNC6

CBS_SCL

CBS_SDA
PHY_TEST_MA
CBS_TEST0
CBS_TEST1

PCI4510XI

PCI4510XO

R21 2@220_0402_5%
R37 2@220_0402_5%

1 2

R41 100_0402_5%

C83

12
12

2@24.576MHz_16P

1

2

R44 2@4.7K_0402_5%
R61 2@200_0402_5%
R60 2@200_0402_5%

X1

1 2

PCM_IDAD20

R22

2@0_0402_5%

12

1

2

CBS_SCL
CBS_SDA

+3V_CBSA

L11

1 2

2@BLM21A05 _0805

2@10U_1206_10V4Z

C115

1

2

Place close to pin H1

CLK_PCI_PCM

12

R47
@33_0402_5%

1

C75
@22P_0402_50V8J

2

12

PCM_SUSP# <26,27,32>

PCM_PME# <27,33>

PCM_SPK# <27,30>

PIRQA# <20,27>

SIRQ <20,27,32>

+3V_CBSD

12
12
12

C106
2@22P_0402_50V8J

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

AD[0..31]<20,24,27,28,35>

VDPLL

1

C103
2@0.01U_0402_25V7Z

2

PCI_DEVSEL#<20,24,27,28>

PCI_FRAME#<20,24,27,28,35>

PCI_IRDY#<20,24,27,28>
PCI_PERR#<20,24,27,28>

PCI_SERR#<20,24,27,28>
PCI_STOP#<20,24,27,28>
PCI_TRDY#<20,24,27,28,35>

CLK_PCI_PCM<16,27>

C/BE#3<20,24,27,28,35>
C/BE#2<20,24,27,28,35>
C/BE#1<20,24,27,28,35>
C/BE#0<20,24,27,28,35>

PCI_PAR<20,24,27,28>

GNT#2<20,27>

REQ#2<20,27>

PCIRST#<6,10,17,20,24,27,28,32,35>
V_PRST#<17,26,27>

PCM_ID<27>

IEEE1394_TPBIAS0

@1U_0603_10V4Z

IEEE1394_TPB0­IEEE1394_TPB0+
IEEE1394_TPA0­IEEE1394_TPA0+

@56.2_0603_1%

@270P_0603_50V8J

U35A

AD31

J5

AD31

AD30

J6

AD30

AD29

K2

AD29

AD28

K3

AD28

AD27

K5

AD27

AD26

K6

AD26

AD25

L2

AD25

AD24

L3

AD24

AD23

M2

AD23

AD22

M3

AD22

AD21

M6

AD21

AD20

M5

AD20

AD19

N2

AD18

N3

AD17

N6

AD16

P1

AD15

R6

AD14

P7

AD13

V5

AD12

U6

AD11

V6

AD10

R7

AD9

P8

AD8

U7

AD7

W7

AD6

R8

AD5

U8

AD4

V8

AD3

W9

AD2

V9

AD1

U9

AD0

R9

L6
P2

U5

V7

W4

R2
N5

J1
P3

R3

J2
T1
P5
P6

H3
H2

PCM_ID CBS_CVS1

L5

H1

2@PCI4510GHK_PBGA209

1

C223

2

12

R197

1

C216

2

AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

C/BE3#
C/BE2#
C/BE1#
C/BE0#

PCI_PAR

DEVSEL#
FRAME#
GNT#

IRDY#
PERR#
REQ#
SERR#
STOP#
TRDY#
PCI_RESET#

G_RST#

IDSEL

PCICLK

12

R199
@56.2_0603_1%

PCI4510

12

R198
@56.2_0603_1%

12

R196

@56.2_0603_1%

12

R194

@5.1K_0603_1%

CAD31/D10

CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6

CAD19/A25

CAD18/A7
CAD17/A24
CAD16/A17

CAD15/IOWR#

CAD14/A9

CAD13/IORD#

CAD12/A11

CAD11/OE#

CAD10/CE2#

CAD9/A10

CAD8/D15

CAD7/D7

CAD6/D13

CAD5/D6

CAD4/D12

CAD3/D5

CAD2/D11

CAD1/D4
CAD0/D3

CC/BE3#/REG#

CC/BE2#/A12

CC/BE1#/A8

CC/BE0#/CE1#

CRESET

CFRAME#/A23

CIRDY#/A15

CTRDY#/A22

CDEVSEL#/A21

CSTOP#/A20
CPERR#/A14

CSERR#/WAIT#

CPAR/A13

CREQ#/INPACK#

CGNT#/WE#

CCLK/A16

CSTSCHG/BVD1

CCLKRUN#/WP

CBLOCK#/A19
CINT#/READY

CAUDIO/BVD2

CCD2/CD2#
CCD1/CD1#

CVS2/VS2#
CVS1/VS1#

CRSVD/D2
CRSVD/A18
CRSVD/D14

U3

8
7

@BTS0402-01_8P

1 8
2 7
3 6
4 5

CBS_CAD31

E8

CBS_CAD30

C8

CBS_CAD29

B8

CBS_CAD28

E9

CBS_CAD27

F9

CBS_CAD26

F11

CBS_CAD25

E11

CBS_CAD24

C11

CBS_CAD23

A12

CBS_CAD22

C12

CBS_CAD21

E12

CBS_CAD20

C13

CBS_CAD19

A14

CBS_CAD18

E13

CBS_CAD17

B14

CBS_CAD16

F18

CBS_CAD15

G17

CBS_CAD14

F19

CBS_CAD13

G18

CBS_CAD12

H15

CBS_CAD11

H14

CBS_CAD10

H17

CBS_CAD9

H18

CBS_CAD8

J14

CBS_CAD7

J17

CBS_CAD6

K14

CBS_CAD5

J19

CBS_CAD4

K17

CBS_CAD3

K15

CBS_CAD2

L14

CBS_CAD1

K18

CBS_CAD0

L15

CBS_CC/BE3#

B11

CBS_CC/BE2#

C14

CBS_CC/BE1#

G15

CBS_CC/BE0#

J15

CBS_CRST#

B13

CBS_CFRAME#

B15

CBS_CIRDY#

F13

CBS_CTRDY#

E14

CBS_CDEVSEL#

A16

CBS_CSTOP#

E17

CBS_CPERR#

F15

CBS_CSERR#

E10

CBS_CPAR

F14

CBS_CREQ#

B12

CBS_CGNT#

D19

CBS_CCLK_INTERNAL

C15

CBS_CSTSCHNG

A9

CBS_CCLKRUN#

B9

CBS_CBLOCK#

E18

CBS_CINT#

C10

CBS_CAUDIO

F10

CBS_CCD2#

C9

CBS_CCD1#

L17

CBS_CVS2

F12
B10

CBS_RSVD/D2

F8

CBS_RSVD/A18

F17

CBS_RSVD/D14

J18

1
2
3456

RP1

2@0_8P4R_1206_5%

Dell-Compal Confidential

Compal Electronics, Inc.

Title

PCMCIA & 1394 Controller PCI4510

Size Document Number Rev

Abacus-MT LA-1682

D

Date: Sheet

CBS_CAD[0..31] <26,27>

CBS_CC/BE3# <26,27>
CBS_CC/BE2# <26,27>
CBS_CC/BE1# <26,27>
CBS_CC/BE0# <26,27>

CBS_CRST# <26,27>

CBS_CFRAME# <26,27>
CBS_CIRDY# <26,27>
CBS_CTRDY# <26,27>
CBS_CDEVSEL# <26,27>
CBS_CSTOP# <26,27>
CBS_CPERR# <26,27>

CBS_CSERR# <26,27>

CBS_CPAR <26,27>
CBS_CREQ# <26,27>
CBS_CGNT# <26,27>
CBS_CCLK_INTERNAL <26,27>

CBS_CSTSCHNG <26,27>

CBS_CCLKRUN# <26,27>

CBS_CBLOCK# <26,27>
CBS_CINT# <26,27>

CBS_CAUDIO <26,27>
CBS_CCD2# <26,27>
CBS_CCD1# <26,27>

CBS_CVS2 <26,27>

CBS_CVS1 <26,27>

CBS_RSVD/D2 <26,27>

CBS_RSVD/A18 <26,27>

CBS_RSVD/D14 <26,27>

TPB0-

1

TPB0+

2

TPA0-

3
4

TPA0+

5
6
7
8

E

JP2

1
2
3
4

GND1
GND2
GND3
GND4

2@AMP_440168-2_4P

of

25 44Tuesday, F eb ru ar y 25, 2003

0.2

A

B

C

D

E

PCMCIA Power Controller

13
12
11

10

1
2
15
14

8

V_PRST#

CBS_VCC

1

C18

4.7U_0805_10V4Z

2

VCCD0#
VCCD1#
VPPD0
VPPD1

V_PRST# <17,25,27>

CBS_VPP

1

C23

0.1U_0402_16V4Z

2

VCCD0# <25,27>
VCCD1# <25,27>
VPPD0 <25,27>
VPPD1 <25,27>

L9
BLM21A601SPT_0805

+3V

1 2

1

C71

0.1U_0402_16V4Z

2

1

2

C36

0.1U_0402_16V4Z

C85
10U_1206_10V4Z

1

2

1

2

C51
10U_1206_10V4Z

C57

0.1U_0402_16V4Z

1

2

1

2

C34

0.1U_0402_16V4Z

C81

0.1U_0402_16V4Z

1

2

1

2

C92

0.1U_0402_16V4Z

C90

0.1U_0402_16V4Z

+3V_CBSD

1

1

2

C49

0.1U_0402_16V4Z

2

+12VALW

1

C31

0.1U_0603_50V4Z

1 1

2

1

C25

0.1U_0402_16V4Z

2

1

C21

2

0.1U_0402_16V4Z

+5VALW

+3VALW

U7

9

12V

5

5V

6

5V

3

3.3V

4

3.3V

VCC
VCC
VCC

VPP

VCCD0
VCCD1

VPPD0
VPPD1

OC

GND

SHDN

TPS2211AIDBR_SSOP16

7

16

2 2

3 3

4 4

+3VALW

1

C17
1U_0603_10V4Z

2

CBS_VPP

C24

0.01U_0402_25V7Z

CBS_CGNT#<25,27>

+5VALW

1

2

1

2

CBS_CAD0<25,27>
CBS_CAD1<25,27>
CBS_CAD3<25,27>
CBS_CAD5<25,27>
CBS_CAD7<25,27>
CBS_CC/BE0#<25,27>
CBS_CAD9<25,27>
CBS_CAD11<25,27>
CBS_CAD12<25,27>
CBS_CAD14<25,27>
CBS_CC/BE1#<25,27>
CBS_CPAR<25,27>
CBS_CPERR#<25,27>

CBS_CINT#<25,27>

CBS_CIRDY#<25,27>
CBS_CC/BE2#<25,27>
CBS_CAD18<25,27>
CBS_CAD20<25,27>
CBS_CAD21<25,27>
CBS_CAD22<25,27>
CBS_CAD23<25,27>
CBS_CAD24<25,27>
CBS_CAD25<25,27>
CBS_CAD26<25,27>
CBS_CAD27<25,27>
CBS_CAD29<25,27>
CBS_RSVD/D2<25,27>
CBS_CCLKRUN#<25,27>

A

1

2

CBS_VPP CBS_VPP

C30
1U_0603_10V4Z

C26
1U_0603_10V4Z

CBS_CAD0
CBS_CAD1
CBS_CAD3
CBS_CAD5
CBS_CAD7
CBS_CC/BE0#
CBS_CAD9
CBS_CAD11
CBS_CAD12
CBS_CAD14
CBS_CC/BE1#
CBS_CPAR
CBS_CPERR#
CBS_CGNT#
CBS_CINT#

CBS_CCLK
CBS_CIRDY#
CBS_CC/BE2#
CBS_CAD18
CBS_CAD20
CBS_CAD21
CBS_CAD22
CBS_CAD23
CBS_CAD24
CBS_CAD25
CBS_CAD26
CBS_CAD27
CBS_CAD29
CBS_RSVD/D2
CBS_CCLKRUN#

0.01U_0402_25V7Z

CBS_VCC

CBS_VCCL

1

C60

1

2

2

1 2

L6
KC FBM-L11-201209-221LMAT_0805

1 2

L5
@KC FBM-L11-201209-221LMAT_0805

PCMCIA Cardbus socket

JP18

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

31

32

32

33

33

34

34

69

GND
GND71GND
GND73GND

75

GND

77

GND

79

GND

81

GND

JAE JC21-BRB-E500

C50

4.7U_0805_10V4Z

35

35

36

36

37

37

38

38

39

39

40

40

41

41

42

42

43

43

44

44

45

45

46

46

47

47

48

48

49

49

50

50

51

51

52

52

53

53

54

54

55

55

56

56

57

57

58

58

59

59

60

60

61

61

62

62

63

63

64

64

65

65

66

66

67

67

68

68

70

GND

72
74
76

GND

78

GND

80

GND

82

GND

B

CBS_VCCL

CBS_CCD1#
CBS_CAD2
CBS_CAD4
CBS_CAD6
CBS_RSVD/D14
CBS_CAD8
CBS_CAD10
CBS_CVS1
CBS_CAD13
CBS_CAD15
CBS_CAD16
CBS_RSVD/A18
CBS_CBLOCK#
CBS_CSTOP#
CBS_CDEVSEL#

CBS_CTRDY#
CBS_CFRAME#
CBS_CAD17
CBS_CAD19
CBS_CVS2
CBS_CRST#
CBS_CSERR#
CBS_CREQ#
CBS_CC/BE3#
CBS_CAUDIO
CBS_CSTSCHNG
CBS_CAD28
CBS_CAD30
CBS_CAD31
CBS_CCD2#

C19
1000P_0402_50V7K

12

1

C107
1000P_0402_50V7K

2

CBS_CCD1# <25,27>
CBS_CAD2 <25,27>
CBS_CAD4 <25,27>
CBS_CAD6 <25,27>
CBS_RSVD/D14 <25,27>
CBS_CAD8 <25,27>
CBS_CAD10 <25,27>
CBS_CVS1 <25,27>
CBS_CAD13 <25,27>
CBS_CAD15 <25,27>
CBS_CAD16 <25,27>
CBS_RSVD/A18 <25,27>
CBS_CBLOCK# <25,27>
CBS_CSTOP# <25,27>
CBS_CDEVSEL# <25,27>

CBS_VCCLCBS_VCCL

CBS_CTRDY# <25,27>
CBS_CFRAME# <25,27>
CBS_CAD17 <25,27>
CBS_CAD19 <25,27>
CBS_CVS2 <25,27>

CBS_CRST# <25,27>

CBS_CSERR# <25,27>

CBS_CREQ# <25,27>
CBS_CC/BE3# <25,27>

CBS_CAUDIO <25,27>

CBS_CSTSCHNG <25,27>
CBS_CAD28 <25,27>
CBS_CAD30 <25,27>
CBS_CAD31 <25,27>

CBS_CCD2# <25,27>

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

C

PCM_SUSP#<25,27,32>

CBS_VCC

+3V_CBSD

CBS_CCLK

1

C37

0.1U_0402_16V4Z

2

2

C76

0.1U_0402_16V4Z

1

1 2

R27 47_0402_5%

R40 10K_0402_5%

D

1

C35

0.1U_0402_16V4Z

2

1

C93

0.1U_0402_16V4Z

2

CBS_CCLK_INTERNAL <25,27>

12

+3V_CBSD

Dell-Compal Confidential

Compal Electronics, Inc.

Title

PCMCIA Socket

Size Document Number Rev

Abacus-MT LA-1682

Date: Sheet

E

0.2

of

26 44Tuesday, F eb ru ar y 25, 2003

A

B

C

D

E

CBS_CAD[0..31]

U34B

1 1

AD[0..31]<20,24,25,28,35>

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18

2 2

CLK_PCI_PCM<16,25>

PCI_SERR#<20,24,25,28>
PCI_PERR#<20,24,25,28>

PCI_TRDY#<20,24,25,28,35>

PCI_DEVSEL#<20,24,25,28>

3 3

PCI_FRAME#<20,24,25,28,35>

AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE#0<20,24,25,28,35>
C/BE#1<20,24,25,28,35>
C/BE#2<20,24,25,28,35>
C/BE#3<20,24,25,28,35>

PCM_ID<25>

PCI_PAR<20,24,25,28>

PCI_STOP#<20,24,25,28>
PCI_IRDY#<20,24,25,28>

PCIRST#<6,10,17,20,24,25,28,32,35>

GNT#2<20,25>
REQ#2<20,25>

PCM_ID

U34A

PCI1510

56

AD0

55

AD1

53

AD2

52

AD3

51

AD4

50

AD5

49

AD6

48

AD7

46

AD8

45

AD9

44

AD10

43

AD11

42

AD12

41

AD13

39

AD14

38

AD15

25

AD16

24

AD17

23

AD18

22

AD19

18

AD20

17

AD21

16

AD22

15

AD23

11

AD24

10

AD25

9

AD26

7

AD27

6

PCI BUS

AD28

5

AD29

4

AD30

3

AD31

47

C/BE0#

37

C/BE1#

26

C/BE2#

13

C/BE3#

14

IDSEL

20

PCLK

35

PAR

34

SERR#

33

PERR#

31

STOP#

28

IRDY#

29

TRDY#

19

PRST#

30

DEVSEL#

27

FRAME#

2

GNT#

1

REQ#

1@PCI1510PGE_PQFP144

Multifunction&
Miscellaneous

MF0/INTA#

MF2/DMAREQ#

MF3/IRQSER

MF4/RI_OUT#

MF5/DMAGNT#

MF6/CLKRUN#

RI_OUT#/PME#

SPKROUT

SUSPEND#

CLK_48M_RSVD

VR_EN#

VR_PORT

PCI
PWR

CORE LOGIC

PWR

GND

VCCD0#
VCCD1#

VPPD0
VPPD1

Card PWR

S/W

GRST#

MF1

VCCP

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7

GND
GND
GND
GND
GND
GND
GND
GND

58
59
63
64
67
68
69

57
61
65
85

125
62

36

54
70
104
126
137
12
32

8
21
40
60
80
93
112
132

73
74
71
72

66

CBS_1510MF1
CBS_1510MF2

CBS_1510MF4
CBS_1510MF5

1

C91
1@0.1U_0402_16V4Z

2

+3V_CBSD

PIRQA# <20,25>

SIRQ <20,25,32>

CLKRUN# <21,24,28,32>

VCCD0# <25,26>
VCCD1# <25,26>
VPPD0 <25,26>
VPPD1 <25,26>

V_PRST# <17,25,26>

CBS_1510MF1
CBS_1510MF2
CBS_1510MF4
CBS_1510MF5

PCM_PME# <25,33>
PCM_SPK# <25,30>
PCM_SUSP# <25,26,32>

1 2

R75 1@10K_0402_5%

1 2

R76 1@10K_0402_5%

1 2

R66 1@10K_0402_5%

1 2

R62 1@10K_0402_5%

+3V_CBSD

PCI1510

1@PCI1510PGE_PQFP144

A_D3/CAD0
A_D4/CAD1

A_D11/CAD2

A_D5/CAD3

A_D12/CAD4

A_D6/CAD5

A_D13/CAD6

A_D7/CAD7

A_D15/CAD8

A_A10/CAD9

A_CE2#/CAD10

A_OE#/CAD11

A_A11/CAD12

A_IORD#/CAD13

A_A9/CAD14

A_IOWR#/CAD15

A_A17/CAD16
A_A24/CAD17

A_A7/CAD18

A_A25/CAD19

A_A6/CAD20
A_A5/CAD21
A_A4/CAD22
A_A3/CAD23
A_A2/CAD24
A_A1/CAD25

A_A0/CAD26
A_D0/CAD27
A_D8/CAD28
A_D1/CAD29
A_D9/CAD30

A_D10/CAD31

A_A18/RSVD
A_D14/RSVD

A_D2/RSVD

A_CE1#/CC/BE0#

A_A8/CC/BE1#

A_A12/CC/BE2#

A_REG#/CC/BE3#

A_A13/CPAR

A_A14/CPERR#

A_A15/CIRDY#

A_A16/CCLK

A_A19/CBLOCK#

PC CARD / CARD BUS INTERFACE

A_A20/CSTOP#

A_A21/CDEVSEL#

A_A22/CTRDY#

A_A23/CFRAME#

A_BVD1/CSTSCHG

A_BVD2/CAUDIO

A_READY/CINT#
A_WAIT#/CSERR#
A_WP/CCLKRUN#

A_CD1#/CCD1#
A_CD2#/CCD2#

A_INPACK/CREQ#

A_WE#/CGNT#

A_VS1#/CVS1
A_VS2#/CVS2

A_RESET/CRST#

VCC_CARD

CBS_CAD0

76

CBS_CAD1

78

CBS_CAD2

77

CBS_CAD3

81

CBS_CAD4

79

CBS_CAD5

83

CBS_CAD6

82

CBS_CAD7

86

CBS_CAD8

87

CBS_CAD9

89

CBS_CAD10

90

CBS_CAD11

91

CBS_CAD12

92

CBS_CAD13

94

CBS_CAD14

96

CBS_CAD15

95

CBS_CAD16

97

CBS_CAD17

114

CBS_CAD18

115

CBS_CAD19

116

CBS_CAD20

118

CBS_CAD21

120

CBS_CAD22

121

CBS_CAD23

123

CBS_CAD24

127

CBS_CAD25

128

CBS_CAD26

129

CBS_CAD27

139

CBS_CAD28

140

CBS_CAD29

141

CBS_CAD30

142

CBS_CAD31

144

CBS_RSVD/A18

99

CBS_RSVD/D14

84

CBS_RSVD/D2

143

CBS_CC/BE0#

88

CBS_CC/BE1#

98

CBS_CC/BE2#

113

CBS_CC/BE3#

124

CBS_CPAR

100

CBS_CPERR#

102

CBS_CIRDY#

110

CBS_CCLK_INTERNAL

107

CBS_CBLOCK#

101

CBS_CSTOP#

103

CBS_CDEVSEL#

106

CBS_CTRDY#

108

CBS_CFRAME#

111

CBS_CSTSCHNG

135

CBS_CAUDIO

134

CBS_CINT#

131

CBS_CSERR#

133

CBS_CCLKRUN#

136

CBS_CCD1#

75

CBS_CCD2#

138

CBS_CREQ#

122

CBS_CGNT#

105

CBS_CVS1

130

CBS_CVS2

117

CBS_CRST#

119
109

CBS_VCC

CBS_CAD[0..31] <25,26>

CBS_RSVD/A18 <25,26>
CBS_RSVD/D14 <25,26>
CBS_RSVD/D2 <25,26>

CBS_CC/BE0# <25,26>
CBS_CC/BE1# <25,26>
CBS_CC/BE2# <25,26>
CBS_CC/BE3# <25,26>
CBS_CPAR <25,26>
CBS_CPERR# <25,26>
CBS_CIRDY# <25,26>

CBS_CCLK_INTERNAL <25,26>

CBS_CBLOCK# <25,26>
CBS_CSTOP# <25,26>
CBS_CDEVSEL# <25,26>
CBS_CTRDY# <25,26>

CBS_CFRAME# <25,26>
CBS_CSTSCHNG <25,26>
CBS_CAUDIO <25,26>
CBS_CINT# <25,26>
CBS_CSERR# <25,26>

CBS_CCLKRUN# <25,26>
CBS_CCD1# <25,26>

CBS_CCD2# <25,26>
CBS_CREQ# <25,26>

CBS_CGNT# <25,26>

CBS_CVS1 <25,26>

CBS_CVS2 <25,26>
CBS_CRST# <25,26>

4 4

Dell-Compal Confidential

Compal Electronics, Inc.

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

C

D

PCMCIA Cont ro lle r PCI1510

Size Document Number Rev

Abacus-MT LA-1682

Date: Sheet

E

of

27 44Tuesday, F eb ru ar y 25, 2003

0.2

5

4

3

2

1

Place close to pin 25

MINI PCI TYPE III

D D

WLAN_ACT_LED<24>

RADIO_DISABLE#<32>

PIRQD#<20>

CLK_PCI_MINI<16>

REQ#1<20>

C C

PCI_IRDY#<20,24,25,27>

CLKRUN#<21,24,27,32>

PCI_SERR#<20,24,25,27>
PCI_PERR#<20,24,25,27>

+5VMINI

B B

+5VMINI

AD31
AD29

AD27
AD25

C/BE#3
AD23

AD21
AD19

AD17
C/BE#2

C/BE#1
AD14

AD12
AD10

AD8
AD7

AD5
AD3
AD1

+3VMINI

JP24

1

TIP

3

8PMJ-3

5

8PMJ-6

7

8PMJ-7

9

8PMJ-8

11

LED1_GRNP

13

LED1_GRNN

15

CHSGND

17

INTB#

19

3.3V

21

RESERVED

23

GROUND

25

CLK

27

GROUND

29

REQ#

31

3.3V

33

AD31

35

AD29

37

GROUND

39

AD27

41

AD25

43

RESERVED

45

C/BE#3

47

AD23

49

GROUND

51

AD21

53

AD19

55

GROUND

57

AD17

59

C/BE#2

61

IRDY#

63

3.3V

65

CLKRUN#

67

SERR#

69

GROUND

71

PERR#

73

C/BE#1

75

AD14

77

GROUND

79

AD12

81

AD10

83

GROUND

85

AD8

87

AD7

89

3.3V

91

AD5

93

RESERVED

95

AD3

97

5V

99

AD1

101

GROUND

103

AC_SYNC

105

AC_SDATA_IN

107

AC_BIT_CLK

109

AC_CODEC_ID1#

111

MOD_AUDIO_MON

113

AUDIO_GND

115

SYS_AUDIO_OUT

117

AUDIO_OUTGND

119

AUDIO_GND

121

RESEVED

123

VCC5VA

127

127

RING

8PMJ-1
8PMJ-2
8PMJ-4

8PMJ-5
LED2_YELP
LED2_YELN
REVERVED

INTA#

RESERVED

3.3VAUX
RST#

3.3V

GNT#

GROUND

PME#

RESERVED

AD30

3.3V
AD28
AD26
AD24

IDSEL

GROUND

AD22
AD20

PAR
AD18
AD16

GROUND

FRAME#

TRDY#
STOP#

3.3V
DEVSEL#
GROUND

AD15
AD13
AD11

GROUND

AD09

C/BE#0

3.3V

AD6
AD4
AD2

AD0
RESERVED_WIP
RESERVED_WIP

GROUND

M66EN

AC_SDATA_OUT

AC_CODEC_ID0#

AC_RESET#

RESERVED

GROUND

SYS_AUDIO_IN

AUDIO_INGND

AUDIO_GND

MPCIACT#

3.3VAUX

5V

128

+3VMINI

2
4

6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

128

+3VAUXMINI

AD30
AD28

AD26
AD24

1 2

R403 100_0402_5%

AD22
AD20

AD18
AD16

AD15
AD13
AD11

AD9
C/BE#0

AD6
AD4
AD2
AD0

M66EN

MPCIACT#

WLAN_LINK_10_LED <24>
WLAN_LINK_80211A <24>

+5VMINI

PIRQC# <20>

PCIRST# <6,10,17,20,24,25,27,32,35>
GNT#1 <20>
MINI_PME# <33>

AD18

PCI_PAR <20,24,25,27>

PCI_FRAME# <20,24,25,27,35>
PCI_T R D Y # <20,24,25,27,35>
PCI_STOP# <20,24,25,27>

PCI_DEVSEL# <20,24,25,27>

DIMM_SMCLK <13,14,16,20>
DIMM_SMDATA <13,14,16,20>

CLK_PCI_MINI

R428
33_0402_5%

1 2
2

C614
22P_0402_50V8J

1

C600

0.1U_0402_16V4Z

+3VAUXMINI

1

2

WLAN_LINK_80211A

WLAN_LINK_10_LED

WLAN_ACT_LED

M66EN

MPCIACT#

1

C596

0.1U_0402_16V4Z

2

AD[0..31]<20,24,25,27,35>

C/BE#[0..3]<20,24,25,27,35>

+3VAUXMINI +3VALW

R398 100K_0402_5%

R397 100K_0402_5%

R429 100K_0402_5%

R401 1K_0402_5%

R405 100K_0402_5%

1

C616

2

0.1U_0402_16V4Z

AD[0..31]
C/BE#[0..3]

1 2

R400 @0_0603_5%

1 2

R399 0_0603_5%

12

12

12

12

12

1 2

BLM21A05 _0805

1

C610
1000P_0402_50V7K

2

+3VAUXMINI

L36

+3V

+5VS+5VMINI

AMP 1318914

0.1U_0402_16V4Z

1

C613

WIRELESS SUPPORT ONLY

A A

10U_1206_10V4Z

2

1

2

0.1U_0402_16V4Z

1

C599

C612

2

0.1U_0402_16V4Z

1 2

BLM21A05 _0805

1

1

C598

2

C609
1000P_0402_50V7K

2

+3VS+3VMINI

L35

Dell-Compal Confidential

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Abacus-MT LA-1682

Date: Sheet of

Compal Electronics, Inc.

MiniPci Port

1

0.2

28 44Tu e sday, February 25, 2003

A

B

C

D

E

F

G

H

+5VALW +5VDDA

1 1

1

2

1

C562

0.1U_0402_16V4Z

2

C564

@4.7U_0805_10V4Z

1

VIN

3

EN

TPS793475DBV_SOT23-5

SUSP#<17,32,35,38,40>

U26

+5VDDA

1 2

L30
BLM21A05 _0805

AVDD_AC97

1

1

C541

2 2

0.1U_0402_16V4Z

2

C477

0.1U_0402_16V4Z

1

C551

2

@4.7U_0805_10V4Z

2

U24

38

AVCC25AVCC

14

AUX_L

15

AUX_R

16

EAPD

17
23
24
18
20
19
21
22
13
12

11
10

5

45
46

47
48

4
7

VIDEO_L
VIDEO_R
LIN_IN_L
LIN_IN_R
CD_L
CD_R
CD_GNA
MIC1
MIC2
PHONE
PC_BEEP

RESET#
SYNC
SDATA_OUT
ID0#

ID1#
EAPD
S/PDIF_OUT
GND

GND

12

0.1U_0402_16V4Z

C544

INT_CD_L<23>
INT_CD_R<23>

MD_SPK<31>

3 3

MONO_IN<30>

MONO_IN

47K_0402_5%

1 2

R364

R365

4.7K_0402_5%

R360 0_0603_5%
R363 0_0603_5%

0.033U_0402_16V4Z

12
12
12

R362 @6.8K_0603_1%

12

R361 @6.8K_0603_1%

12

R369 @51K_0402_5%

12

R368 0_0402_5%

1

C552
2700P_0603_50V7K

2

1 2

1

C557

2

CD_L_R

1 2

C549

CD_R_R

1 2

C547

CD_GNA

1 2

C546

MICIN<30>

1 2

C545

MDSPK

1 2

C550

1 2

C553

IAC_RST#<21,31>

IAC_SYNC<21,31>

IAC_SDATAO<21,31>

R344 @1K_0402_5%
R343 @1K_0402_5%

+3VCC

12
12

EAPD<30>

R339 10K_0402_5%

1U_0603_10V4Z
1U_0603_10V4Z
1U_0603_10V4Z

0.1U_0402_16V4Z

0.033U_0402_16V4Z

0.1U_0402_16V4Z

12

LINE_OUT_L

LINE_OUT_R

MONO_OUT

HP_OUT_L

HP_OUT_R

BIT_CLK

SDATA_IN

XTL_IN

XTL_OUT

AFLT1
AFLT2

VREFOUT

REFFLT

FLT3D

BPCFG_00/NC_50

FLTI_00/NC_50

FLTO_00/NC_50
NC_00/GPIO0_50
NC_00/GPIO1_50

NC_00/HP_COMM_50

AGND
AGND

STAC9750_TQFP48

CD_GNA

CD_AGND<23>

4 4

R367

0_0402_5%

12

12

R366
@6.8K_0603_1%

VOUT

BYPASS

9

VCC1VCC

5

4

2

GND

0.1U_0603_50V4Z

+3VCC

1

C484

2

0.1U_0402_16V4Z

LEFT

35

RIGHT

36

MDMIC

37
39
41

6

1 2

R359 22_0402_5%

8

1 2

R357 47_0402_5%

2

3
29
30
28
27
32

31
33
34

SPK_SHUTDOWN#

43
44

40
26
42

1

C558

2

0.1U_0402_16V4Z

1

C491

2

1 2

C499 820P_0603_50V7K

1 2

C493 820P_0603_50V7K

1

C471
1U_0603_10V4Z

2

12

1

R6

C555

@102K_0603_1%

2

4.7U_0805_10V4Z

12

R10
@280K_0603_1%

R345

1 2

0_0805_5%

1

C478

4.7U_0805_10V4Z

2

IAC_BITCLK <21,31>
IAC_SDATA_IN0 <21>

C490

1 2

1U_0603_10V4Z

SPK_SHUTDOWN# <30>

1

C556

0.1U_0402_16V4Z

2

@0.1U_0402_16V4Z

C486

+3VS

1000P_0402_50V7K

12

1 2

C487

1000P_0402_50V7K

1 2

@1000P_0402_50V7K

C476

1 2

0.1U_0402_16V4Z

C483

HP_OUT_L <30>
HP_OUT_R <30>

C500

1 2

@27P_0402_50V8J

1 2

C485

1 2

C542
0_0402_50V8J

1

2

C492
@1U_0603_10V4Z

@22P_0402_50V8J

1

2

X4
@24.576MHz_16P

1 2

c542 have been change to 0ohm

C489

@4.7U_0805_10V4Z

+5VDDA

1

C481

2

R350

1 2

@100K_0402_5%

1 2

R342 0_0402_5%

0.1U_0402_16V4Z
C523

R354
@100K_0402_5%

1 2

1

C554
@4.7U_0805_10V4Z

2

1

2

LEFT <30>
RIGHT <30>

MD_MIC <31>

CLK_CODEC_14M <16>

1

C498
1U_0603_10V4Z

2

C134

HP_OUT_R

HP_OUT_L

1000P_0402_50V7K

1 2

1 2

C165

1000P_0402_50V7K

Place close to pin 2

CLK_CODEC_14M

12

R341
@10_0402_5%

1

C479
@10P_0402_50V8K

2

short the digital ground and analong ground

Dell-Compal Confidential

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

C

D

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

F

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Abacus-MT LA-1682

G

AC97 CODEC

0.2

of

29 44Tuesday, Fe b r u a r y 25, 2003

H

A

B

C

D

E

+5VDDA

Gain Setting

1 2

16

15

6

VDD

PVDD1

PVDD2

GND41GND311GND213GND1

TI6017A2_TSSOP20

20

R436

100K_0402_5%

1 2

L31
BLM21A05 _0805

1 2

L32
@BLM21A05_0805

GAIN0
GAIN1

ROUT+

ROUT-

LOUT+

LOUT-

BYPASS

12

12

+5VAMP

1 1

1

C571

0.1U_0402_16V4Z

RIGHT<29>

LEFT<29>

2 2

SPK_SHUTDOWN#<29>

EAPD<29>

MUTE<32>

3 3

BEEP<32>

4 4

2

G

+3VS

5

1

P

IN1

2

IN2

G

3

R132 @0_0402_5%

A

RIGHT

LEFT

Q30

13

D

2N7002_SOT23

S

+3VS

12

R431
100K_0402_5%

U14

4

O

SN74AHC1G08HDCK_TSSOP5

12

R430

10K_0402_5%

1 2

C617

0.1U_0402_16V4Z

PCM_SPK#<25,27>

ICH_SPKR<21>

2

1 2

1 2

1 2

1 2

+3VS

13

D

HP_PLUG

2

G

Q31

S

2N7002_SOT23

1

2

C579

0.47U_0603_16V4Z

C584

0.1U_0402_16V4Z

C581

0.47U_0603_16V4Z

C576

0.1U_0402_16V4Z

R389
100K_0402_5%

1 2

2

G

U15

1

NC

VCC

2

A

3

GND

TC7SH14FU_SSOP5

+3V POWER

1

2

C582

0.1U_0402_16V4Z

7

17

9

5

19

13

D

Q32

S

2N7002_SOT23

+3VS

5
4

Y

1 2

R434
2K_0402_5%

1 2

R433
2K_0402_5%

1 2

R432
2K_0402_5%

W=40mils

RIN+

RIN-

LIN+

LIN-

SHUTDOWN

C621

0.1U_0402_16V4Z

1 2

C624

0.1U_0402_16V4Z

1 2

C623

0.1U_0402_16V4Z

1 2

C622

0.1U_0402_16V4Z

B

U28

2
3

18

14

4

8

12

NC

10

+5VDDA+5VDDA

C

2

B

E

D15

1SS355_SOD323

+5VALW

+5VDDA

1

C570
10U_1206_10V4Z

2

INTSPK_R+

INTSPK_R-

INTSPK_L+

INTSPK_L-

1

C588

0.47U_0603_16V4Z

2

12

R437
100K_0402_5%

C619

1 2

@0.1U_0402_16V4Z

C620

1 2

1

1U_0603_10V4Z

Q13

2SC2411K_SOT23

3

GAIN0
GAIN1

BYPASS

GAIN0
GAIN1

1

C583

0.1U_0402_16V4Z

2

1

C580
@0.1U_0402_16V4Z

2

MONO_IN

MONO_IN <29>

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

12

12

@10K_0402_5%

MICIN<29>

HP_OUT_R<29>

HP_OUT_L<29>

R379
10K_0402_5%

R383

+5VDDA

1 2

1K_0402_5%

C548

0.22U_0603_10V7K

R122

0_0402_5%

1 2
1 2

R155

0_0402_5%

12

R380
@10K_0402_5%

12

R384
10K_0402_5%

R327

12

12

R328
@2K_0402_5%

GAIN0 GAIN1 AV(inv) INPUT

0

0

1

*

0

1

0

11

INTSPK_R+
INTSPK_R­INTSPK_L+
INTSPK_L-

15 mils trace

D45

1

2

C161

4.7U_0805_10V4Z

47P_0402_50V8J

1

C155

2

47P_0402_50V8J

EXTMIC

HP_PLUG

12

R157
2K_0402_5%

@220U_D_6.3M_R40
C142

+

PR_RIGHT

1 2

+

PR_LEFT

1 2

C154
@220U_D_6.3M_R40

C636

+

1 2

220U_10V_M

+

1 2

C635
220U_10V_M

D

@DAN217_SOT23

1

2

L14
BLM11A121SPT_0603

1 2
1 2

L29
BLM11A121SPT_0603

HP_PLUG<33>

L12
BLM11A121SPT_0603

1 2
1 2

L13
BLM11A121SPT_0603

47P_0402_50V8J

IMPEDANCE

6dB

10dB

15.6dB

21.6dB

90K ohm

70K ohm

45K ohm

25K ohm

Speaker Connector

JP16

1

1

2

2

3

3

4

4

ACES_85205-0400

@DAN217_SOT23

3

C458

1

C144

2

1

2

3

D44
@DAN217_SOT23

1

2

+3VS

R125
100K_0402_5%

1 2

PR
PL

D43

1

2

EXT. MIC

JP11

5
4
3

6
2
1

7
8

JA6333L-6S0-TR

HP OUT

JP9

5
4
3

6
2
1

7
8

JA6333L-6S0-TR

3

1

2

3

D42
@DAN217_SOT23

+3VS

Dell-Compal Confidential

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

AMP & Audio Jack

Abacus-MT LA-1682

of

30 44Tuesday, Fe b r u a r y 25, 2003

E

0.2

5

4

3

2

1

+3V

1 2

+3V

R443 0_0805_5%

+3VALW

D D

1 2

R444 @0_0805_5%

4.7U_0805_10V4Z

C630

+3VMDC

1

2

2

C629

0.1U_0402_16V4Z

1

1

@1000P_0402_50V7K
C627

2

As close to P17

IAC_SDATAO<21,29>

IAC_RST#<21,29>

1

2

MD_MIC<29>

+3VMDC

C628
@0.1U_0402_16V4Z

@1000P_0402_50V7K

C625

JP25

1
3
5
7

9
11
13
15
17
19
21
23
25
27
29

FOX_QT8A0301-3011

1

2

MONO_OUT/PC_BEEP
AGND
AUXA_RIGHT
AUXA_LEFT
CD_GND
CD_RIGHT
CD_LEFT
GND

3.3Vaux
GND

3.3Vmain
AC97_SDATA_OUT
AC97_RESET#
GND
AC97_MSTRCLK

1

2

AUDIO_PWDN

MONO_PHONE

RESERVED

RESERVED
RESERVED

PRIMARY_DN

RESERVED
RESERVED

AC97_SYNC
AC97_SDATA_IN1
AC97_SDATA_IN0

AC97_BITCLK

+5VMDC

C626
@0.1U_0402_16V4Z

2
4
6
8

GND

10

+5V

12
14
16
18
20
22
24
26
28

GND

30

1 2

@0_0805_5%

R438 10K_0402_5%

R441 10_0402_5%
R442 22_0402_5%

R435

1 2

R439

@22_0402_5%

1 2

+5VALW

MD_SPK <29>

+3V

12
12

1: Have primary CODEC on mother board

IAC_SYNC <21,29>
IAC_SDATA_IN1 <21>

IAC_BITCLK <21,29>

MDC Conn.

MDC Note

C C

B B

Touch Pad & Status LED Conn.

TP_CLK<32>

ACT_LED#<23> BATT_LED# <33>

CHARGE_LED#<33>

TP_CLK

+5VS

ACT_LED#

CHARGE_LED#

+3VALW

JP13

1 2
3 4
5 6
7 8
9 10

13
15 16
171918

ACES 87216-2012_20P

1 2

C193 @220P_0603_50V8J

1 2

C171

CP1

6
7
8 1

@220P_1206_8P4C_50V8K

TP_DATA

121411

20

TP_CLK

TP_DATA

@220P_0603_50V8J

CHARGE_LED#

45

ACT_LED#

3

PWR_LED#

2

BATT_LED#

+5VS

PWR_LED#
BATT_LED#

TP_DATA <32>

PWR_LED# <33>

LID_SW# <32>

+5VALW

Pin 1 is NC for Pctel and connexant MDC modem
Pin 2 is NC for Pctel and connexant MDC modem

Screw Hole

H7

H8

@C315D126

@C315D126

1

H14

H17

@C315D118

@C315D118

1

H33

@O335x79D315x59

1

H13

@C315D126

1

H20

@C315D118

1

H30

@O335x79D315x59

1

1

1

H32

@O335x79D315x59

H12

@C315D126

1

H21

@C315D118

1

1

H19

H3

@C394D118

@C394D118

1

H28

H27

@C315D118

@C315D118

1

H15

@O335x79D315x59

1

1

1

H25

@H_O177x99D157x79

1

H11

@C394D118

1

H26

@C315D118

1

H5

@C315D118

1

H18

@C138D138N

1

H9

@O335x79D315x59

1

H4

H2

@C394D118

@C394D118

1

1

H29

@O197x138D197x138N

1

@C177D79

H10

H16

@C394D118

@C394D118

1

1

H6

@C315D177

1

H37

1

H34

@C177D87

1

H38

C138D48

1

H23

C197B256D157

1

H22

C197B256D157

1

H1

C256D87

1

Fiduial Mark

FD1

1

@FIDUCIAL MARK

FD8

1

A A

@FIDUCIAL MARK

FD15

1

@FIDUCIAL MARK

FD2

1

@FIDUCIAL MARK

FD9

1

@FIDUCIAL MARK

FD16

1

@FIDUCIAL MARK

5

FD3

1

@FIDUCIAL MARK

FD10

1

@FIDUCIAL MARK

FD17

1

@FIDUCIAL MARK

FD4

1

@FIDUCIAL MARK

FD11

1

@FIDUCIAL MARK

FD18

1

@FIDUCIAL MARK

FD5

1

@FIDUCIAL MARK

FD12

1

@FIDUCIAL MARK

4

FD6

1

@FIDUCIAL MARK

FD13

1

@FIDUCIAL MARK

FD7

1

@FIDUCIAL MARK

FD14

1

@FIDUCIAL MARK

THIS SHEET OF EN GINEE RING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Dell-Compal Confidential

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

MDC / SWITCH Connector

Abacus-MT LA-1682

of

31 44Tuesday, F eb r u a r y 25, 2003

1

0.2

A

+3VALW

C611

4.7U_0805_10V4Z

BLM18PG600SN1_0603
L33

+3VALW

1 1

2 2

3 3

4 4

1 2

C594

0.1U_0402_16V4Z

1 2

L34
BLM18PG600SN1_0603

+5VS

+3VALW

10P_0402_50V8K

0.1U_0402_10V6K

1

1

1

C607

2

1

2

12

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

R423 20M_0603_5%

1 2

32.768KHZ_12.5P

1

X5

2

A

C595

2

C593
1000P_0402_50V7K

RP7

8.2K_8P4R_1206_5%

RP6

8.2K_8P4R_1206_5%

RSMRST#<21,34>

2

0.1U_0402_16V4Z

2

1

ECAGND

ADB[0..7]
KBA[0..19]

1 2

R407 10K_0402_5%

1 2

R404 10K_0402_5%

R410 100K_0402_5%

PS2_CLK
PS2_DATA
KBD_DATA
KBD_CLK

FSEL#
SELIO#
FRD#
EC_SMI#

C615

1

C589
1000P_0402_50V7K

2

EC_AVCC

ADB[0..7] <33>
KBA[0..19] <33>

TP_DATA

TP_CLK

LID_SW#

+5VS

+3VALW

120K_0402_5%

1

C618
12P_0402_50V8J

2

G_RST#<17>

1 2

100K_0402_5%

FWE#<33>

R424

12

R417

3.3K_0402_5%

FWE#

R390 0_0402_5%

R415

@0_0402_5%

+3VALW

R422

1 2

6

+3VALW

CLK_PCI_LPC<16>

+3VALW

Place closely pin 18

12

1

2

LAN_DISABLE#<24>

12

12

+3VALW

14

4

P

A

O

5

B

G

U33B

7

SN74LVC32APWLE_TSSOP14

+3VS

R411 0_0402_5%

SIRQ<20,25,27>

LFRAME#<21>

LAD0<21>
LAD1<21>
LAD2<21>
LAD3<21>

R402 10K_0402_5%

SCI#<21>

GATEA20<20>
KBRST#<20>

KSI[0..7]<33,34>

KSO[0..15]<33>

CLK_PCI_LPC

R406
10_0402_5%

C597
15P_0402_50V8J

TP_CLK<31>

TP_DATA<31>

LID_SW#<31>

PS_ID<36>

EC_SMI#<21>

EC_SWI#<21>

RADIO_DISABLE#<28>

PM_SLP_S1#<16,21>

SYSON<35,40>

VR_ON<35,41>

VR_TT#<41>

BKOFF#<17,18>
FSEL#<33>

+3VALW

R421
100K_0402_5%

1 2

1 3

D

FWR#

B

1 2

0.1U_0402_16V4Z

1 2

SUSP#<17,29,35,38,40>
VGATE<21,41>

MUTE<30>

2

G

S

Q35
2N7002_SOT23

B

C

EC_3VDD

1

C602

2

7
8

9
15
14
13

EC_RST

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

CRY1
CRY2

EC_FLASH# <21>

10
18
19
22
23

31

5

6

71
72
73
74
77
78
79
80

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68

105
106
107
108
109

110
111
114
115
116
117
118
119

158
160

62
63
69
70
75
76

148
149
155
156

3

4
27
28

173
174

47

CLK_PCI_LPC

KSI[0..7]
KSO[0..15]

EC_TINIT#
EC_TCK

EC_TDO
EC_TDI
EC_TMS

KBD_CLK
KBD_DATA
PS2_CLK
PS2_DATA
TP_CLK
TP_DATA
LID_SW#

EC_SMI#
LAN_DISABLE#

FSEL# KBA18

SUS_STAT# <17,21>

16

U32

VDD

VCC134VCC245VCC3

SERIRQ
LDRQ#
LFRAME#
LAD0
LAD1
LAD2
LAD3
LCLK
RESET1#
SMI#
PWUREQ#

IOPD3/ECSCI#

GA20/IOPB5
KBRST/IOPB6

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15

TINT#
TCK
TDO
TDI
TMS

PSCLK1/IOPF0
PSDAT1/IOPF1
PSCLK2/IOPF2
PSDAT2/IOPF3
PSCLK3/IOPF4
PSDAT3/IOPF5
PSCLK4/IOPF6
PSDAT4/IOPF7

32KX1/32KCLKIN
32KX2

IOPJ2/BST0
IOPJ3/BST1
IOPJ4/BST2
IOPJ5/PFS
IOPJ6/PLI
IOPJ7/BRKL_RSTO

IOPM0/D8
IOPM1/D9
IOPM2/D10
IOPM3/D11
IOPM4/D12
IOPM5/D13
IOPM6/D14
IOPM7/D15

SEL0#
SEL1#
CLK

PC87591L-VPCN01 A2_LQFP176

Host interface

Key matrix scan

JTAG debug port

PS2 interface

PORTJ-2

PORTM

GND117GND235GND346GND4

EC_AVCC

123

GND5

122

159

95

136

157

166

VCC4

VCC5

VCC6

AD Input

DA output

PWM
or PORTA

PORTB

IOPB7/RING/PFAIL/RESET2

PORTC

PORTD-1

IOPD2/EXWINT24/RESET2

PORTE

IOPE7/CLKRUN/EXWINT46

PORTH

PORTI

PORTJ-1

PORTD-2

PORTK

PORTL

AGND

GND6

GND7

96

167

137

ECAGND

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

161

AVCC

VBAT

IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7

IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7

IOPB0/URXD
IOPB1/UTXD

IOPB2/USCLK

IOPB3/SCL1
IOPB4/SDA1

IOPC1/SCL2
IOPC2/SDA2

IOPC3/TA1

IOPC4/TB1/EXWINT22

IOPC5/TA2

IOPC6/TB2/EXWINT23

IOPC7/CLKOUT

IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21

IOPE4/SWIN

IOPE5/EXWINT40

IOPE6/LPCPD/EXWIN45

IOPH0/A0/ENV0

IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1

IOPH4/A4/TRIS

IOPH5/A5/SHBM

IOPH6/A6
IOPH7/A7

IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7

IOPJ0/RD

IOPJ1/WR0

IOPK0/A8

IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12

IOPK5/A13_BE0
IOPK6/A14_BE1

IOPK7/A15_CBRD

IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19

IOPL4/WR1#

NC212NC320NC421NC585NC686NC791NC892NC997NC10

NC1

11

DP/AD8
DN/AD9

IOPC0

SELIO#

IOPD4
IOPD5
IOPD6
IOPD7

AD0
AD1
AD2
AD3

DA0
DA1
DA2
DA3

98

2

1

81
82
83
84
87
88
89
90
93
94

99
100
101
102

32
33
36
37
38
39
40
43

153
154
162
163
164
165

168
169
170
171
172
175
176
1

26
29
30

2
44
24
25

124
125
126
127
128
131
132
133

138
139
140
141
144
145
146
147

150
151

152
41

42
54
55

143
142
135
134
130
129
121
120

113
112
104
103
48

+RTCVCC

C608
1U_0603_10V4Z

BATT_TEMP
VBATT

BATT_CHGI
BD_ID

KSO16
KSO17
EC_DEBUG
SMB_EC_CK1
SMB_EC_DA1

SMB_EC_CK2
SMB_EC_DA2

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

FRD#
FWR#

SELIO#

KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15

KBA16
KBA17

KBA19

D

BATT_TEMP <36>

BATT-OVP <37>

ADP_I <37,39>

EN_FAN2 <7>
EN_FAN1 <7>
IREF <37>
IREF2 <37>

BEEP <30>
ACOFF <37>

VLBA# <21>
EC_ON <34>
LID_OUT# <21>
PCM_SUSP# <25,26,27>

KSO16 <34>
KSO17

SMB_EC_CK1 <17,18,33,36>
SMB_EC_DA1 <17,18,33,36>
PCIRST# <6,10,17,20,24,25,27,28,35>

PWRBTN# <21>
SMB_EC_CK2 <6,8>
SMB_EC_DA2 <6,8>
FAN1_TACH <7>
EC_WAKEUP# <20>
EC_THRM# <21>
FAN2_TACH <7>

ACIN <20,36,38>
PM_SLP_S4# <21>
PM_SLP_S3# <16,21>

ON/OFF <34>
PM_SLP_S5# <21>
EXTVGA_IN# <17>
CLKRUN# <21,24,27,28>

FRD# <33>

SELIO# <33>
SCRLED# <34>

NUMLED# <34>
CAPSLED# <34>

EC_TINIT#
EC_TCK
EC_TDO

FSTCHG <37>

EC_TDI
EC_TMS

KSO16
KSO17
EC_DEBUG

D

+5VALW

+3VALW

12

12

R394
10K_0402_5%

12

R11
100K_0402_5%

1
2
3
4
5
6
7
8
9

10

R393
91K_0402_5%

*

2

1

PM_PWROK <10,21,34>

JP17

1
2
3
4
5
6
7
8
9
10

@96212-1011S

Title

Size Document Number Rev
Custom

Date: Sheet

E

BD_ID

REV

BADDR1-0

0 0
0 1
1 0
1 1

C592

0.1U_0402_10V6K

ECAGND

SHBM=1: Enable shared memory with host BIOS
TRIS=1: While in IRE and OBD, float all the
signals for clip-on ISE use

0.5V

0V

/10K

100K/10K

Index Data

4E 4F

(HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1

IRE
OBD

*

DEV
PROG

KBA1

KBA2

KBA3

KBA5

BATT_CHGI

BATT_TEMP

BATT-OVP

VBATT

1.0V 1.5V

0.3

0.20.1

100K/25K 100K/43K

I/O Address

Reserved

ENV0 ENV1

00
0011

11

(ENV1)

(BADDR0)

(BADDR1)

(SHBM)

C591 0.01U_0402_25V7Z

1 2

1 2

C587

C585 0.01U_0402_25V7Z

1 2

1 2

C586

1.0

TRIS

0
0
0
0

R412 10K_0402_5%

R414 10K_0402_5%

R416 @10K_0402_5%

R418 10K_0402_5%

ECAGND

0.01U_0402_25V7Z

ECAGND

0.01U_0402_25V7Z

2F2E

+3VALW

12

12

12

12

Dell-Compal Confidential

Compal Electronics, Ltd.

EC PC87591L

Abacus-MT LA-1682

E

of

32 44Tuesday, Fe b r u a r y 25, 2003

0.2

A

B

C

D

E

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

1 2

C569
1U_0603_10V4Z

D

Output Port

+5VALW

1 2

C575

0.1U_0402_16V4Z

20

U27

3

11

1

2

Q0

D0

5

VCC

D14Q1

6

D27Q2

9

D38Q3

12

D413Q4

15

D514Q5

16

D617Q6

19

D718Q7
CP

MR

GND

SN74HCT273PW_TSSOP20

10

PWR_LED# <31>
CHARGE_LED# <31>
BATT_LED# <31>
VCHG <37>M_SEN#<17,19>

<37,39>

90W/130W#

NM24C164 Address definition: 1 A2 A1# A0 B2 B1 B0 R/W#

SMB_EC_CK1<17,18,32,36>
SMB_EC_DA1<17,18,32,36>

+5VALW

1 2

C590

0.1U_0402_16V4Z

U29

8

VCC

7

WP

6

SCL

5

SDA

AT24C16_SO8

GND

+5VALW

12

R375
100K_0402_5%

1

A0

2

A1

3

A2

4

EC I2C Bus Address:

24C164: 1011xxx R/W#
24C16: 1010xxx R/W#

U16

21

A0

20

A1

19

A2

18

A3

17

A4

16

A5

15

A6

14

A7

8

A8

7

A9

36

A10

6

A11

5

A12

4

A13

3

A14

2

A15

1

A16

READY/BUSY#

40

A17

13

A18

37

A19

22

CE#

24

OE#

9

WE#

SST39VF080-70_TSOP40

VCC0
VCC1

NC0
NC1

GND0
GND1

31
30

ADB0

25

D0
D1
D2
D3
D4
D5
D6
D7

RP#

NC

26
27
28
32
33
34
35

10
11
12
29
38

23
39

ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

R440 100K_0402_5%

BIOS_RST#

1

2

1 2

+3VALW

C632

0.1U_0402_16V4Z

ADB[0..7] <32>

+3VALW

Dell-Compal Confidential

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

EC Extend I/O KB Conn. & BIOS

Abacus-MT LA-1682

E

1

C631

0.1U_0402_16V4Z

2

33 44Tuesday, Fe b r u a r y 25, 2003

0.2

of

Input Port

U30

1

19

R387
10K_0402_5%

PME#

4 5
3
2

CP3

4 5
3
2

CP4

4 5
3
2

CP5

4 5
3
2

CP6

4 5
3
2

CP7

4 5
3
2

B

+3VALW

1 2

C577

20

1A121Y1

VCC

1A241Y2
1A361Y3
1A481Y4
2A1112Y1
2A2132Y2
2A3152Y3
2A4172Y4

1G
2G

GND

SN74LVC244APWR_TSSOP20

10

CP2

6
7

@100P_1206_8P4C_50V8K

81

6
7
81

6
7
81

6
7
81

6
7
81

6
7
81

KSO[0..15]
KSI[0..7]

0.1U_0402_16V4Z

ADB0

18

ADB1

16

ADB2

14

ADB3

12

ADB4

9

ADB5

7

ADB6

5

ADB7

3

AA

R419 100K_0402_5%

CC

R420 100K_0402_5%

JP33
@6278-34P-DEBUG

+3VALW

1 2

0.1U_0402_16V4Z

C605

14

KBA2
SELIO# LARST#

+5VALW

+3VALW

1 2

1 2

+3VALW

34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

BIOS_RST#

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18

KBA19
ADB0
ADB1
ADB2
ADB3

9

ADB4

8

ADB5

7

ADB6

6

ADB7

5

FWE#

4

FRD#

3

FSEL#

2
1

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

+5VALW

R453 8.2K_0402_5%
R454 8.2K_0402_5%

KBA[0..19]<32>

U33C

9

P

A

10

B

G

SN74LVC32APWLE_TSSOP14

7

1 2

R377 20K_0402_5%

1 2
1 2

FSEL#<32>
FRD#<32>
FWE#<32>

AA

8

O

SMB_EC_DA1
SMB_EC_CK1

FSEL#
FRD#
FWE#

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

+3VS

1 1

2 2

+3VALW

1 2

R386 100K_0402_5%

1 2

R233 100K_0402_5%

1 2

R382 100K_0402_5%

PROCHOT#<6,21>

HP_PLUG<30>

ENABKL<10,17,18>

9C/12C#/8C#<36>

KBA1

SELIO#<32>

SELIO#

PME#

+3VALW

14

12

A

13

B

7

U33D

P

CC

11

O

G

SN74LVC32APWLE_TSSOP14

+3VALW

12

LAN_PME#<24>
MINI_PME#<28>
PCM_PME#<25,27>

3 3

Internal KB connector

LAN_PME#
MINI_PME#

PCM_PME#

INT_KBD CONN.

KSO6

KSO12

KSO7

KSO10

KSO14

25

21

23

JP32

4 4

21

23

20

22

24

Dummy

20

22

24

KSO15

KSO13

KSO11

FOX_GS22250-0001

A

KSO2

KSO1

11

13

15

17

19

11

13

15

17

19

12

14

16

18

10

12

14

16

18

KSO8

KSI0

KSO3

KSO4

KSI3

9

9

8

10

8

KSI2

KSO5

1 2

R49 0_0402_5%

1 2

R48 0_0402_5%

1 2

R45 0_0402_5%

KSI4

KSO0

KSI6

3

5

7

3

5

7

4

6

2

4

6

KSI5

KSO9

KSI1

1

1

2

KSI7

KSO0
KSO1
KSO2
KSO3

KSO12
KSO13
KSO14
KSO15

@100P_1206_8P4C_50V8K

KSO4
KSO5
KSO6
KSO7

@100P_1206_8P4C_50V8K

KSI7
KSI6
KSI0
KSI1

@100P_1206_8P4C_50V8K

KSO8
KSO9
KSO10
KSO11

@100P_1206_8P4C_50V8K

KSI2
KSI3
KSI4
KSI5

@100P_1206_8P4C_50V8K

can swap

KSO[0..15]<32>

KSI[0..7]<32,34>

A

2

G

Q40
2N7002_SOT23

VL

12

R449
470K_0402_5%

13

D

Q41
2N7002_SOT23

S

U6

1

GND

2

IN

3

EN1#

4

EN2#

TPS2042ADR_SO8

Note:

OC1#
OUT1
OUT2
OC2#

2

100K

SHDN_1632 <38>

8
7
6
5

1 1

SHDN#<38>

2 2

2

G

1

C16

0.1U_0402_16V4Z

2

VL

12

R447
100K_0402_5%

13

D

S

+5VALW USB_BS +3VALWUSB_AS

USB_AS=USB_BS=Trace width=40mils

SYSON#<35>

3 3

C638

1

@1000P_0402_50V7K

2

100K

13

1 2

Q22
DTC115EKA_SOT23

12

100K_0402_5%

B

PM_PWROK <10,21,32>

D17 1SS355_SOD323

12

1 2

R448 470K_0402_5%

C633

0.1U_0402_16V4Z

USB Over Current

12

R12

R212
100K_0402_5%

1 2

R210 47K_0402_5%

1 2

R211 47K_0402_5%

C238

0.1U_0402_16V4Z

1

2

+RTCVCC

SM_INTRUDER# <20>

OVCUR#0

OVCUR#2

1

C237

0.1U_0402_16V4Z

2

OVCUR#0 <21>

OVCUR#2 <21>

C

RTC Battery

BATT1

ML1220T13RE

USB_AS USB_BS

12

+RTCVCC

1 2

L38
FBM-11-451616-800T

@100U_4A_10V

RTCPWR

D41

3

BAS40-04_SOT23

R510

1M_0402_5%

C641

@15P_0402_50V8J

1

2

CHGRTC

+3VALW

12

R455
150K_0402_5%

12

1

C640

0.1U_0402_16V4Z

2

USB_A USB_B

1

12

+

+

C10

2

150U_D3_10VM

USB0D+ USB2D+

1

C232

2

D

EC_ON<32>

+3VALW

+3VALW

14

U56A

P

1

O2I

G

SN74LVC14APWLE_TSSOP14

7

USB PORT

1

C12

0.1U_0402_16V4Z

2

JP4

1

VCC

2

D0-

3

D0+

4

C11

VSS
G210G1

12

FOX_UB11123-8Z4-HT

1

2

@15P_0402_50V8J

ON/OFFBTN#

+3VALW

12

EC_ON

1 2

R189
22K_0402_5%

WHEN R=0,Vbe=1.35V
WHEN R=33K,Vbe=0.8V

1

C639

0.1U_0402_16V4Z

VCC

VSS

2

D1-

D1+

G311G4

5
6
7
8

9

+3VALW

3

1

2

0.1U_0402_16V4Z

1

C13

2

@15P_0402_50V8J

+3VALW

D12

1

3

2

DAN202U_SC70

R188

4.7K_0402_5%

22K

2

22K

14

U56B

P

O4I

G

SN74LVC14APWLE_TSSOP14

7

1

+

C231

2

150U_D3_10VM

1

C230
@15P_0402_50V8J

2

C229

USB2D-USB0D-

12

R186
100K_0402_5%

ON/OFF

13

Q21
DTC124EK_SOT23

RSMRST# <21,32>

12

+

C642
@100U_4A_10V

E

Power BTN

ON/OFF <32>
EC_ON# <39>

1000P_0402_50V7K

1

C209

2

12

L40
FBM-11-451616-800T

12

D16
RLZ20A_LL34

C805 @100P_0402_50V8J

KSO16

KSO16<32>

CAPSLED#<32>

+3VS +3VALW

KSO16 USB2D-

1 2

JP5

2

112

4

334

6

556

8

778

10

9910

SUYIN_12750AR-10G2T-9

KSI0 <32,33>
SCRLED# <32>
NUMLED# <32>

R209 0_0402_5%

USBP0-<21>

USBP0+<21>

USBP0-

USBP0+

R208 0_0402_5%

12

U21

1 4

2 3

@JTS0402-02_4P

12

USB0D-

USB0D+

USB2D+ON/OFFBTN#

12

R9 0_0402_5%

U17

14

23

@JTS0402-02_4P

12

R8 0_0402_5%

USBP2-

USBP2+

USBP2- <21>

USBP2+ <21>

Power SW Function Button

4 4

Dell-Compal Confidential

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Power OK/R eset/RTC battery/USB Conn

Abacus-MT LA-1682

E

0.2

of

34 44Tuesday, Fe b r u a r y 25, 2003

A

+1.5VALW to +1.5VS Transfer

+1.5VALW

U66

8

D

7

D

1 1

1

C568
10U_1206_10V4Z

2

6

D

5

D

SI4800DY_SO8

+1.5VS

C573

10U_1206_10V4Z

0.1U_0402_16V4Z

1

S

2

S

3

1

S

4

G

2

RUNON

+3VALW to +3V Transfer

+3VALW

U70

8

D

7

2 2

1

C207
22U_1206_10V4Z

2

D

6

D

5

D

SI4800DY_SO8

+3V

1

C208

2

SUSON

0.1U_0402_16V4Z

1

C210

2

1

S

2

S

3

S

4

G

22U_1206_10V4Z

+5VALW to +5VS Transfer

+12VALW

12

R408
100K_0402_5%

1M_0402_5%

3 3

4 4

SUSP

Q33

2N7002_SOT23

2

G

13

D

S

1

+

C145
150U_D2_6.3VM

2

12

R409

+3VALW +3VS

1

2

A

1

C601

0.01U_0402_25V7Z

2

U20

8

D

7

D

6

D

5

D

SI4800DY_SO8
C132
10U_1206_10V4Z

+5VALW

U31

8

D

7

D

6

D

5

D

SI4800DY_SO8

RUNON

+3VALW to +3VS Transfer

1

S

2

S

3

S

4

G

RUNON

1

S

2

S

3

S

4

G

0.1U_0402_16V4Z

+5VALW

1

+

C606
150U_D3_10VM

2

1

C133

2

22U_1206_10V4Z

+5VS

1

C603

2

C131

0.1U_0402_16V4Z

1

2

1

C572

2

12

R187
470_0402_5%

13

D

2

G

Q20

S

2N7002_SOT23

22U_1206_10V4Z

1

C604

2

12

R100
470_0402_5%

13

D

G

Q19

S

2N7002_SOT23

B

12

13

D

S

SYSON#

2

B

R378
470_0805_5%

2

G

Q60
2N7002_SOT23

12

13

D

S

SUSP

SUSP

R413
470_0805_5%

SUSP

2

G

Q34
2N7002_SOT23

C

SYSON#

2N7002_SOT23

VR_ON<32,41>

+12VALW

12

13

D

2

G

Q39

S

VR_ON

CLK_PCI_DEBUG

R458
33_0402_5%

1 2

1

C637
10P_0402_50V8K

2

R451
100K_0402_5%

12

R450
1M_0402_5%

+3VALW

1 2

13

D

2

G

S

SUSON

1

C634

0.01U_0402_25V7Z

2

R425
@100K_0402_5%

Q37
@2N7002_SOT23

+CPU_CORE

12

13

D

2

G

S

R427
@330_0603_5%

Q38
@2N7002_SOT23

AD9<20,24,25,27,28>

C/BE#2<20,24,25,27,28>

AD8<20,24,25,27,28>
AD5<20,24,25,27,28>
AD1<20,24,25,27,28>
AD2<20,24,25,27,28>
AD6<20,24,25,27,28>

D

SYSON#<34>

SYSON<32,40>

+5VS

JP27

1 2
3 4
5 6
7 8
9 10

13
15 16
171918

@AMP 5-175638-0

Debug PORT

+3V

12

R567
47K_0402_5%

VID_PWRGD<41>

1

C32
@0.1U_0402_16V4Z

2

+3V

5

1

2

+3V

5

3

2

CPU LEVEL SHIFT

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

+3V

U81A

P

O6I

G

SN74LVC2G07_SOT23-6

U81B

P

O4I

G

SN74LVC2G07_SOT23-6

E

+12VALW

12

R445
68K_0402_5%

12

R446
47K_0402_5%

R426
10K_0402_5%

Q36
2N7002_SOT23

PCI_TRDY# <20,24,25,27,28>
PCIRST# <6,10,17,20,24,25,27,28,32>PCI_FRAME#<20,24,25,27,28>
CLK_PCI_DEBUG <16>
C/BE#3 <20,24,25,27,28>
C/BE#1 <20,24,25,27,28>
AD7 <20,24,25,27,28>
AD3 <20,24,25,27,28>
AD0 <20,24,25,27,28>
AD4 <20,24,25,27,28>
C/BE#0 <20,24,25,27,28>

3

SUSP<19>

SUSP#<17,29,32,38,40>

100K_0402_5%

121411

20

R568

249K_0402_1%

1 2

SYSON#

2

2

Q61
@SM05_SOT23

1

R456

ENLL <41>

H_VID_PWRGD <6>

G

12

C/BE#0

13

D

S

2

G

Q2
2N7002_SOT23

+12VALW

12

13

D

S

Dell-Compal Confidential

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DC/DC Circuit / Debug Port

Abacus-MT LA-1682

of

35 44Tuesday, Fe b r u a r y 25, 2003

E

0.2

A

B

C

D

E

Detector

1K_0402_5%

1 2

PR50

100K_0603_1%

PD9

RB751V_SOD323
PD10

RB751V_SOD323

12

12

+3VALWP

1 2

1 2

PR161
100K_0402_1%

PR163
@1K_0402_5%

1 2

1K_0402_5%

1 2

25.5K_0402_1%

1 2

100_0402_5%

LM393M_SO8

12

D

PR162

1 2

1K_0402_5%

PR45

BATT_TEMP

PD6

@BAS40-04_SOT23

PR47

PR48

PD7

@BAS40-04_SOT23

PU5A

8

1

O

4

PC50

0.1U_0603_25V7K

PR54

1 2

VL

34K_0603_1%

66.5K_0603_1%

9C/12C#/8C# <33>

12

PR55

191K_0603_1%

PQ12

13

2N7002_SOT23

G

2

BATT_TEM P <32>

SMB_EC_DA1 <17,18,32,33>

B+

12

PR52
499K_0603_1%

12

PR53

499K_0603_1%

47K_0603_1%

13

100K

100K

PR60

PQ13
DTC115EUA_SC70

2

3

3

+5VALWP

PR51

2.2M_0603_5%

12

3

P

+

2

-

G

12

PR32

1

2

1

2

VS

12

PC52

0.01U_0603_50V7K

PC51
1000P_0603_50V8J

1 2

D

S

Dell-Compal Confidential

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Detector

Abacus-MT LA-1682

E

12

PACIN

12

+3VALWP

PC49
1000P_0603_50V8J

+5VALWP

of

36 44Tuesday, Fe b r u a r y 25, 2003

0.2

PL24

BLM11A121S_0603

12

1 1

PCN1

9

GND_4

8

GND_3

7

GND_2

6

GND_1

MH1

MH2

MH1

MH2

+3VALW +3VALW

2 2

PSID_IN

3

2

PQ106
SM05_SOT23

1

3 3

Low_PWR

DC+_1
DC+_2

DC-_1
DC-_2

DC PWR JACK

12

PR384
@4.7K_0402_5%

12

PR386

@0_0603_5%

1
2
3
4
5

12

PC240

100P_0603_50V8G

PR383
0_0603_5%

1 2

D

1 3

G

2

12

PC241

1000P_0603_50V8J

S

PQ105

@2N7002_SOT23

ADPGND

PSID_IN

PL25

FBM-L18-453215-900LMA90T_1812

ADPIN

1 2

PC242

PL26

12

PR385

4.7K_0402_5%

100P_0603_50V8G

1 2

FBM-L18-453215-900LMA90T_1812

ACIN

12

PC243

PS_ID <32>

VIN

12

PR309
10_1206_5%

12

12

PZD6

RLZ24B

1000P_0603_50V8J

PCN2 battery connector pin assignment

Vin Detector

17.90V/17.24V

PR56

1 2

VIN

12

PR57

84.5K_0603_1%

PR61

1 2

22K_0603_5%

12

1000P_0603_50V8J

4 4

A

12

PC53

PR62

20K_0603_1%

12

PC54

0.1U_0603_25V7K

1M_0603_1%

VS

5

+

6

-

PR64

12

10K_0603_0.1%

8

P

O

G

4

7

PU5B
LM393M_SO8

RTCVREF

B

RLZ4.3B_LL34

PZD2

VIN

12

PR58
10K_0603_0.1%

12

1 2

10K_0603_0.1%

12

BATT+

BATT+

12

2200P_0603_50V7K

SMB_EC_CK1<17,18,32,33>

SMART Battery:

1.BATT+

2.BATT+

3.9C/12C#/8C#

4.B/I

5.TS

6.SMB_EC_DA1

7.SMB_EC_CK1

8.GND

9.GND

PR59

ACIN

PACIN

PR63
10K_0603_0.1%

BATT++

PL5

FBM-L18-453215-900LMA90T_1812

1 2

PC43

0.1U_0805_25V7K

12

PC219

SUYIN-200275MR009G516ZL 9P

ACIN <20,32,38>

PCN2

10

GND

11

GND

1

2

+5VALWP

12

PC44

0.1U_0805_25V7K

BATT+
BATT+

ID
B/I
TS

SMD

SMC
GND­GND-

PD8
@BAS40-04_SOT23

3

SHDN_1632#<6,38>

ACON<37>

BATT++

1
2
3
4
5
6
7
8
9

PR49

100_0402_5%

PR46

1 2

12

VL

Precharge detector

PACIN <37>

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

15.97V/14.84V FOR
ADAPTOR

A

P2

12

PR66

200K_0402_5%

12

PR68
150K_0402_5%

13

D

S

IREF2<32>

IREF<32>

PQ15

SI4825DY_SO8

1

S

2

S

3

S

4

G

PQ19
2N7002_SOT23

PR393

1 2

8

D

7

D

6

D

5

D

30.9K_0603_1%

PR73

1 2

@16.9K_0603_1%

1 2

21K_0603_1%

PQ14

PD11

1 2

1SS355_SOD323

1 2

22K_0402_5%

2N7002_SOT23

PC309

SI4825DY_SO8

8

D

7

D

6

D

5

D

PR72

ACON

PQ109

12

1

S

2

S

3

S

4

G

2

G

13

D

2

G

S

VIN

1 1

ACOFF#

PACIN<36>

ACON<36>

2 2

90W/130W#

,39>

PR390

1 2

0_0402_5%

IREF=0.82*Icharge

@0.01U_0402_16V7K

+3VALWP

PC75

100K

2

100K

12

3 3

4 4

FSTCHG<32>

BATT-OVP<32>

@0.1U_0603_25V7K

12

PR231
47K_0603_1%

13

12

IREF=0~3.3V

100K

2

100K

PQ64
DTC115EUA_SC70

1

LM358A_SO8

PU7A

PR92
@2.2K_0603_5%

CS

13

0

PQ63
DTC115EUA_SC70

8

3

P

+

2

-

G

4

VS

12

PC119

OVP voltage :
LI-4S :18.0V----BATT-OVP=2.00V
LI-3S :13.5V----BATT-OVP=1.50V

BATT-OVP=0.2206*BATT++

A

P3

ADP_I<32,39>

12

PR75

PR83

0.01U_0603_50V7K

B

Iadp=0~4.10A(90W)
Iadp=0~3.20A(70W)
Iair=0~2.25A(Air)

PR65

12

0.012_2512_1%

12

12

PC61

PR74

51.1K_0603_1%

VREF_MB3887

21K_0603_1%

12

12

PC64

PR80

0.1U_0603_25V7K
@30.1K_0603_1%

12

12

PR86

20K_0603_1%

BATT++

12

PR90
845K_0603_1%

12

PR91
300K_0603_0.5%

12

12

PC76

143K_0603_0.5%

B

0.01U_0603_50V7K

PR93

PR71

100K_0603_1%

PC62

1 2

4700P_0603_50V7K

0.01U_0402_16V7K

VREF_MB3887

PC65

1 2

2200P_0603_50V7K

10K_0603_0.1%

PC72

0.01U_0402_16V7K

PC154

0.1U_0603_25V7K

LM358A_SO8

12

PR76

1 2

10K_0603_0.1%

PR79

1 2

1K_0603_5%

PR84

12

1 2

PU7B

B+

FBM-L18-453215-900LMA90T_1812

PU6
MB3887

1

-INC2

2

OUTC2

3

+INE2

4

-INE2

5

FB2

6

VREF

7

FB1

8

-INE1

9

+INE1

10

OUTC1

11

OUTD

12

-INC1

D

S

13

PQ40

G

2N7002_SOT23

2

13

100K

100K

-

7

0

+

C

PL8

1 2

12

PR69
0_0603_5%

24

+INC2

23

GND

CS

22

CS

21

VCC(o)

20

OUT

VH

VCC

RT

-INE3

FB3

CTL

+INC1

PR164

104K_0603_0.1%

PR36

2.2M_0805_5%

PR37

100K_0603_1%
PQ41

DTC115EKA_SOT23

2

6
5

PC63

19

1 2

0.1U_0603_25V7K

18

PR81

17

1 2

47K_0603_1%

16

PR85

15

1 2

330K_0603_5%

14

13

12

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

12

10P_0603_50V8J

+5VP

C

PC73

1 2

2200P_0603_50V7K

1 2

1 2

0.1U_0805_25V7K

PC66

1 2

0.1U_0805_25V7K

PC69

1 2

1500P_0603_50V7K

VCHG <33>

PC60

PC59

12

PC55

10U_1210_25V6M

ACON

12

PR87
@10K_0603_5%

12

PC56

10U_1210_25V6M

578

PR89

312K_0603_0.1%

PC74

1 2

22P_0603_50V8J

36

1

B+++

12

PC57

241

PQ17
SI4835DY_SO8

15U_SPC-1204P-150_4A_20%

2

PD13
EA60QC04

3

12

D

0.1U_0805_25V7K

LXCHRG

1 2

D

PC58

E

12

PC71

4.7U_1210_25V5K

Charger

BATT+

BATT+

PQ85

SI4835DY_SO8

1
2
3 6

12

1
2
3 6

2200P_0603_50V7K

ACOFF#

PL9

4

PQ16

SI4835DY_SO8

4

1 2

47K_0603_1%

PR70
10K_0603_0.1%

1 2

13

100K

100K

PR82

1 2

0.02_2512_1%

8
7

5

8
7

5

PR67

PQ18
DTC115EUA_SC70

2

VIN

ACOFF <32>

1

+

PC68

2

47U_25V_M

12

PC70

4.7U_1210_25V5K

Charge voltage
4S CC-CV MODE : 16.8V
VCHG is H

4S PULSE MODE : 17.4V
VCHG is L

Dell-Compal Confidential

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Abacus-MT LA-1682

Charger

E

0.2

of

37 44Tuesday, Fe b r u a r y 25, 2003

A

B

C

D

E

+3.3V/+5V/+12V

PC77

1 2

12

4.7U_1210_25V5K

PL10

FBM-L11-322513-151LMAT_1210

B+

1 1

12

12

PC80

0.1U_0805_25V7K

+3.3V Ipeak = 6.66A ~ 10A

2 2

150U_D_6.3VM

3 3

12

PC113

1000P_0603_50V8J

4 4

CPU thermal protection at 90 degree C
Recovery at 45 degree C

12

PC81

2200P_0603_50V7K

+3VALWP

1

+

PC98

2

VL

12

PR117

1.96K_0603_1%

1 2

19.1K_0603_1%

12

PH1

10K_TH11-3H103FT_0603

A

B++++

12

PR119

12

PC82

4.7U_1210_25V5K

0.012_2512_1%

1

+

PC99

2

12

PC114

1U_0805_25V4Z

PC83

4.7U_1210_25V5K

PR101

150U_D_6.3VM

@0_0603_5%

5
6

100K_0603_1%

12

PR121
100K_0603_1%

PL11

10U_SPC-1204P-100_4.5A_20%

12

PD16
EP10QY03

2 1

PR110

TP6

+

-

PR120

12

1 2

47K_0603_1%

VS

8

PU9B

P

G

LM393M_SO8

4

12

PC94

PR100

1 2

PR118

O

VL

5

D8D7D6D

S1S2S3G

4

5

D8D7D6D

12

S1S2S3G

4

47P_0402_50V8J

1 2

1M_0402_5%

12

PC102

PR105

1 2

3.57K_0603_1%

100P_0402_50V8K

12

PC109
@1000P_0402_50V7K

PR111

1 2

10K_0402_1%

7

0.1U_0805_25V7K

PQ21
SI4800DY_SO8

DH31

PQ23
SI4810DY_SO8

ACIN<20,32,36>

VL

12

12

PC79

1 2

PR95

1 2

0_0402_5%

LX3

DL3

CSH3

1 2

PR104

10K_0402_1%
@300K_0402_5%

+5VP

12

12

PR116
47K_0402_1%

PC112

0.047U_0603_16V7K

B+

FBM-L11-322513-151LMAT_1210

B

BST31

12

PR96
0_0402_5%

DH3

12

PR106

12

PR113
0_0402_5%

PC111
@0.047U_0603_16V7K

SHDN# <34>

PL28

1 2

Add a switch for
12V_FAN on 2/11

VS

PR97

12

PC91

0.1U_0805_25V7K

PU8

25

BST3

27

DH3

26

LX3

24

DL3

MAX1632_SSOP28

1

CSH3

2

CSL3

3

FB3

10

SKIP#

23

SHDN#

7

TIME/ON5

28

RUN/ON3

PC104
1000P_0402_50V7K

SHDN_1632# <6,36>

12

PC307

1U_0805_25V4Z

SUSP#<17,29,32,35,40>

VL

12

10_1206_5%

22

V+

GND

8

PR178

1 2

200K_0603_1%

12

PC158

0.47U_0603_16V7K

12

PC308

0.01U_0603_50V7K

PC86

0.1U_0603_25V7K

PC92

PR177
20K_0603_1%

2

G

13

PR389
150K_0402_5%

PQ107
2N7002_SOT23

BST51

+12VALWP

12

12

4.7U_1210_25V5K

PR108

1 2

0_0402_5%

PD18

1 2

@RB751V_SOD323

12

PC93

0.1U_0805_25V7K

2.5VREF

12

PC103

4.7U_1206_10V7K

+3VALWP

SHDN_1632 <34>

SI3455DV-T1_TSOP6

4 5

PC247

PR311

22U_1812_25V3M

0.1U_0805_25V7K

1 2

12

PR112
@100K_0402_1%

POK

PQ86

S

G

3

12

59K_0603_1%

PC84

1 2

PR98
0_0402_5%

@0_0603_5%

D

6
2

1

12

10.2K_0402_1%

PR115

12

PC246

100P_0603_50V8G

12

CSL5

PR109

PC301

PC87

100P_0603_50V8G

12

2200P_0603_50V7K

1 2

PR99

0_0402_5%

12

12

PR114

TP7

D

3

2

PD15
DAP202U_SOT323

1

12

PC85

1 2

4.7U_1206_10V7K

21

4

12OUT

VL

5

VDD

18

BST5

16

DH5

17

LX5

19

DL5

20

PGND

14

CSH5

13

CSL5

12

FB5

15

SEQ

9

REF

6

SYNC

11

RST#

1 2

VL

PR107

@0_0402_5%

VL

12

13

D

PQ42

S

2N7002_SOT23

PQ108
SI2303DS_SOT23

12

2

PR388

200K_0402_5%

12

13

D

2

G

S

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

PC78

470P_0805_100V7K

12

12

PC89

PC88

0.1U_0805_25V7K

12

PC108
100P_0402_50V8K

12

PC110
@100P_0402_50V8K

10K_0402_1%

12

PU21

1

ISENSE

2

GND

3

PWR GND

NC

4

FB

LM3485MM_MSOP8

1 2

PR94

22_1206_5%

9U_SDT-1204P-9R0-120_4.5A_20%

B++++

5

12

PC90

4.7U_1210_25V5K

DH51

SI4810DY_SO8

4.7U_1210_25V5K

PQ24

4

5

4

+5V Ipeak = 6.66A ~ 10A

+12V MAX=0.5A,PEAK=1A,OCP=1.2A

PL27

SPC-06704-220

1 2

EC10QS04

8
7
6
5

Title

Size Document Number Rev

Date: Sheet

PGATE

PD37

VIN

ADJ

PD14

EC11FS2_SOD106

FLYBACKSNB

12

PQ22

D8D7D6D

SI4800DY_SO8

S1S2S3G

D8D7D6D

S1S2S3G

PD17
EP10QY03

2 1

PT1

12

PC96
47P_0402_50V8J

12

PR102
2M_0402_5%

12

PR310

12

357K_0603_1%

PR312

41.2K_0603_1%

Dell-Compal Confidential

Compal Electronics, Inc.

Abacus-MT LA-1682

1 4

3 2

CSH5DL5

12

PR103

0.012_2512_1%

PC105
150U_D_6.3VM

12

PC244

470P_0603_50V7K

1

+

PC106
150U_D_6.3VM

2

1

+

PC245
15U_D2_25VM_R90

2

1

+

2

+3.3V/+5V/+12V/+12V_FANP

E

+12V_FANP

38 44Tuesday, Fe b r u a r y 25, 2003

+5VALWP

0.2

of

A

PL29

FBM-L11-322513-151LMAT_1210

B+

1 1

+5VALWP

2 2

3 3

4 4

1 2

@100K_0603_1%

12

PR318
10K_0603_0.1%

BATT+

CHGRTCP

PZD5

RLZ16B_LL34

12

PR322

0_0603_5%

VIN

PR139

200_0603_5%

EC_ON#<34>

12

PR317

2 1

A

12

PC251

PU22

ILIM

FPWM

EN

SS

PGOOD

PR134

PR135

10U_1210_25V6M

12

3

PR313

10_0603_5%

12

PC253

0.1U_0603_25V7K

1

VIN

VCC

BOOT

HDRV

LDRV

SW

ISNS

PGND

VSEN

VOUT

AGND

FAN5234QSCX_QSOP16

8

2

PC126

0.22U_1206_25V7K

RTCVREF

3

12

13

PQ31
TP0610T_SOT23

PC129

4.7U_1206_25VFZ

12

12

12

PC249

2200P_0603_50V7K

PR314
140K_0603_1%

12

12

PC259
1000P_0603_50V8J

12

12

PZD3

12

RLZ4.3B_LL34

PR141

100K_0603_1%

PR143

1 2

22K_0603_5%

PU10
S-81233SGUP-T1_SOT89

2

2

PC130
1U_0805_25V4Z

PC250

10U_1210_25V6M

4

16

3

7

2

1 2

200_0603_5%

1 2

200_0603_5%

12

1

1

PC248

0.1U_0603_25V7K

12

PD21

RLS4148

PD23
RLS4148

12

12

12

10_0603_5%

1 2

PC252

11

15

14

10

13

12

9

6

5

+5VALWP

PR376

1U_0805_25V4Z

PR321

1.5K_0603_5%

VS

12

PC127

0.1U_0805_25V7K

PR144

1 2

200_0603_5%

B

PD38

EC10QS04

PR315

0_0603_5%

12

12

PR140

1 2

10K_0603_0.1%

B

12

0.1U_0603_25V7K

1 2

12

PR142

PR34

1 2

200_0603_5%

PC254

PD22
RLS4148

150K_0603_5%

12

1.5K_1206_5%

12

PC128

0.1U_0603_25V7K

PR136

+5VP

12

CHGRTC

VS1

12

PZD4
RLZ5.1B

5

4

5

4

12

PR137

PQ87

D8D7D6D

SI4800DY_SO8

S1S2S3G

1 2

PQ88

D8D7D6D

SI4810DY_SO8

S1S2S3G

1.5K_1206_5%

C

D

+1.5V MAX=3.5A,PEAK=4.5A,OCP=5.5A

PL30

4.7U_SPC-1205P-4R7A_+40-20%

12

PC255

0.1U_0805_25V7K

12

PR319

0_0603_5%

TP5

H_PROCHOT#<6>

PR33

1.5K_1206_5%

B+

12

PR316

12

PR320

PJP1

2MM

1.2K_0603_5%

1.8K_0603_1%

1 2

21

PC258

1U_0805_25V4Z

H_PROCHOT#

2N7002_SOT23

12

PR138

12

1.5K_1206_5%

CPU Fan Only

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

1

+

2

+12V_FAN+12V_FANP

PC256

@150U_D_6.3VM

VL

1 2

47K_0402_1%

PQ83

+1.5VALWP

1

+

2

PR303

13

D

S

PC257

150U_D_6.3VM

2

G

+1.5VALWP

12

PC238

PU9A

LM393M_SO8

1

O

0.022U_0402_16V7K

D

Adaptor Current Detector(90W)

ADP_I : 1 . 20 7V . ... clock throttle(Iin=5.03A)

ADP_I : 1 .145V....No clock throttle(Iin=4.77A)

Adaptor Current Detector(130W)

ADP_I : 1.673V.... clock throttle(Iin=6.97A)

ADP_I : 1.61V....No clock throttle(Iin=6.71A)

PR304

12

2M_0402_5%

8

P

+

G

4

PJP3

3MM

PJP4

3MM

3
2

-

12

154K_0603_1%

PJP2

4MM

VS

12

PC239

0.01U_0603_50V7K

PR307

21

21

21

E

PC236

0.01U_0603_50V7K

VREF_MB3887

12

PR305
312K_0603_0.1%

1 2

12

267K_0603_1%

+1.5VALW

+5VALW+5VALWP

1 2

PR306

25.5K_0402_1%

PR391

PQ110

2N7002_SOT23

+3VALWP+2.5V+2.5VP

+12VALWP

+1.25VP

ADP_I <32,37>

13

D

S

G

2

PR392

0_0402_5%

PJP5
3MM

PJP6

2MM

PJP8
3MM

12

21

21

21

Dell-Compal Confidential

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

+1.5VS

Abacus-MT LA-1682

E

90W/130W# <33,37>

+3VALW

+12VALW

+1.25VS

of

39 44Tuesday, Fe b r u a r y 25, 2003

0.2

5

4

3

2

1

D D

12

PC196

2200P_0603_50V7K

+2.5V Ipeak =8.49A ~ 14.78A

C C

+2.5VP

1

1

+

2

18.2K_0603_1%

10K_0603_0.1%

PC208
220U_4V_M

PR287

PR289

PC209

220U_4V_M

B B

+

2

PL22

4.7U_SPC-1205P-4R7A_+40-20%

1 2

12

12

12

PC213

PR288

@0_0603_5%

0.01U_0603_50V7K

12

12

PR290
0_0603_5%

12

PR281
@100_0603_5%

12

PC210
@1000P_0603_50V8J

12

PD35

@EC31QS04

D8D7D6D

S1S2S3G

D8D7D6D

S1S2S3G

5

PQ79
SI4800DY_SO8

4

5

PQ80
SI4810DY_SO8

4

12

12

PC198

PC197

1 2

0.1U_0805_25V7K

DAP202U_SOT323

0.1U_0805_25V7K

PC217
@1000P_0603_50V8J

4.7U_1210_25V5K

PC206

12

PC199

4.7U_1210_25V5K

PD34

2

12

PR282

1 2

0_0603_5%

12

PC200

4.7U_1210_25V5K

1

3

0.01U_0603_50V7K
PR279

1 2

0_0603_5%

PR284

1 2

1K_0603_5%

12

PC202

0.1U_0805_25V7K

PC203

12

12

6

5
4

7
2

3

9

10

8

15
11

PR291
51K_0603_1%

1 2

12

14

SOFT1

VIN

BOOT1

UGATE1
PHASE1

ISL6225CA

ISEN1
LGATE1

PGND1

VOUT1
VSEN1
EN1
PG1

OCSET1

GND

1

ISL6225CA

PR278
51_1206_5%

+5VALWP

PU20

+5VALWP

PR299

2.2_0603_5%

1 2

28

VCC

UGATE2

PG2/REF

OCSET2

DDR

13

SOFT2

BOOT2

PHASE2

ISEN2

LGATE2

PGND2

VOUT2

VSEN2

17

0.01U_0603_50V7K

23

24
25

22
27

26

20
19
21

EN2

16
18

12

PC201

2.2U_0805_10V6K

PC204

12

PR280

1 2

0_0603_5%

PR285

1 2

2K_0603_5%

PR283

1 2

0_0603_5%

PC215

4.7U_0805_10V4Z

1 2

PL21

HCB4532K-800T90_1812

1 2

DDR Termination Voltage

PC207

0.1U_0805_25V7K

12

SDREF

4
3
2
1

PQ81
FDS6984S

B+

+2.5V/+1.25V

+2.5VP

12

PC224

0.1U_0603_25V7K

5
6
7
8

12

PC216
@1000P_0603_50V8J

12

PR286
@100_0603_5%

12

PC214
@1000P_0603_50V8J

12

PC205
10U_1206_6.3V7K

PL23

1.5U_TPR6D38-1R5M_4A_20%

1 2

+1.25VP

1

+

PC212

1 2

PC211

2

4.7U_0805_10V4Z

220U_D2_2.5VM

+2.5VP

Currently, only VER. ISL6225CA
can be used for PU20.
VER. ISL6225BCA is prohibited

PC218

470P_0603_50V7K

12

PR293
10K_0603_0.1%

12

12

PR295
10K_0603_0.1%

+2.5VPGD

PR292

0_0603_5%

12

+3VALWP

12

PR296
10K_0603_0.1%

SYSON<32,35>

A A

SYSON

PR30

0_0402_5%

SUSP#

12

SUSP# <17,29,32,35,38>

Dell-Compal Confidential

COMPAL ELEC TRONICS, INC

Title

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

DDR POWER 2.5V & 1.25V

Size Document Number Rev

B

Date: Sheet

Abacus-MT LA-1682

1

40 44Tuesday, February 25, 2003

of

0.2

A

Dell
command

CPU_VID4<6,8>
CPU_VID3<6,8>

ENLL

PR335 0_0603_5%

73.2K_0603_1%

1 2

PR395

LM358A_SO8

8

PU28A

3

P

+

2

-

G

4

12

100P_0402_50V7K
PC302

12

+3VS

1 2

0_0402_5%

PU28B

7

PR358

1 2

90.9K_0603_1%

PQ111

+3VALWP

4.7U_0805_10V4Z

CPU_VID2<6,8>
CPU_VID1<6,8>
CPU_VID0<6,8>
CPU_VID5<6,8>

1 2

1 2

PR337 0_0603_5%

PR342

26.1K_0603_1%

+5VS

PR381

1 2

PR347
10K_0402_1%

PR350

0

+

PR363

3 1

PR372

0_0402_5%

1 2

PC297

1 1

ENLL <35>

12

PC306

0.1U_0603_16V7K

PM_DPRSLPVR<21>

PM_STPCPU#<16,21>

PRESCOTT_OCP

VL

12

PC300

0.01U_0603_50V7K

1

12

0

PR341

2 2

442_0402_1%

12

PR344

25.5K_0402_1%

VR_TT#<32>

LM358A_SO8

10K_0603_0.1%

3 3

PRESCOTT_OCP

MMBT3904_SOT23

4 4

1 2

0_0603_5%

PR325

1 2

0_0603_5%

PR328

1 2

0_0603_5%

PR329

1 2

0_0603_5%

PR331

1 2

0_0603_5%

PR332

1 2

0_0603_5%

PR334

+5VS

1 2

PR379

12

PR377

@0_0402_5%

12

+5VS

1 2

PR336

1 2

PR338

Frequency Select

1 2

330K_0402_5%

VSSSENSE<6>

PR387

0_0402_5%

PH6

@0_0402_5%

+CPU_CORE

6

VCCSENSE<6>

-

5

1 2

47K_0603_5%

2

BOOTSELECT

Remote
Sensing

PR361

45.3K_0603_1%

2N7002_SOT23

PR394

12

<5>

12

PR367

47K_0603_5%

1 2

PR368
100K_0402_1%

1 2

Panasonic ERTJ0EV334J (0402)
Locate this NTC resistor on
PCB between phase 2 and 3
for thermal compensation.

VID_PWRGD<35>

PR374

12

0_0603_5%

VR_ON<32,35>

A

PR375
100K_0402_1%

1 2

PC266

1U_0603_10V6K

1 2

@0_0402_5%

@0_0402_5%

PR380@0_0402_5%

12

1 2

12

PR362

1 2

PQ98

2

1
4
3

B

+5VS

+5VS

@0_0402_5%

PC270

0.056U_0603_16V7K

12

PC273

220P_0603_50V

PR348

12

0_0402_5%

PR351

12

@0_0603_5%
PR352

12

0_0402_5%

PR355

12

@0_0603_5%

1 2

32.4K_0603_1%

13

D

2

G

S

3 1

PQ101

PU27

VIN
PG
EN

MIC5258_SOT23-5

B

MMBT3904_SOT23

32

1
2
3
4
5

6
34
33

35

10

11

9

36

37

38
40
12
19

D

S

5.1K_0603_1%

13

PU23

VCC
VID4

VID3
VID2
VID1
VID0
VID12.5

ENLL
DRSEN

DSEN#

OCSET

SOFT

DSV

FS

DRSV

VR-TT#
NTC
GND
GND

ISL6247_MLFP40

12

PC281

1U_0805_25V4Z

PR357

1 2

PR359

27K_0603_1%
PQ68

2N7002_SOT23

2

G

S

G

2

D

1 3

PQ102
2N7002_SOT23

5

OUT

2

GND

C

PR323

80.6K_0402_1%

7

RAMPS

39

PGOOD

25

PWM1

24

ISEN1+

23

ISEN1-

26

PWM2

27

ISEN2+

28

ISEN2-

20

PWM3

21

ISEN3+

22

ISEN3-

31

PWM4

30

ISEN4+

29

ISEN4-

15

COMP

13

FB

14

NC

16

VDIFF

17

VSEN

18

VRTN

8

OFS

12

12

+5VS

PR370

16.2K_0603_1%

PR353

PR354

1.2M_0603_5%

12

NTC Linearization
Network for load-line
compensation

13

12

TP0610T_SOT23

2

PQ97

PC284

0.1U_0603_16V7K

12

12

12

PR382

2.37K_0603_1%

12

+1.2VP

12

PC298

4.7U_0805_10V4Z

C

CPU_B+

Battery Feed
Forward

PR324

10K_0402_1%

1 2

PR327

10K_0402_1%

12

PR340

0_0402_5%

+5VS

PR378
@0_0402_5%

1 2

12

PC282

442K_0603_1%

@22P_0402_25V8K

12

PC286
1000P_0402_50V7K

PR360
20K _0402_1%

1 2

PC287
@ 1000P_0603_50V

PR365

@ 0_0603_5%

12

+3VS

12

VGATE <21,32>

+5VS

D

PR326
10K_0402_1%

1 2

PU24

6

1 2

12

PC269 0.01U_0603_25V7K

1 2

PR356 499K _0402_1%

PC299

PR371

499K _0402_1%

D

3
7
4

1 2

@1U_0805_25V4Z

VCC
PWM
EN
GND

ISL6207CB-T_SO8

PU25

6
3
7
4

ISL6207CB-T_SO8

6
3
7
4

@

PC268

1 2

1U_0805_25V4Z

PR339

1 2

499K _0402_1%

+5VS

PC283

1 2

1U_0805_25V4Z

+5VS

PC295

1 2

1U_0805_25V4Z

2

BOOT

1

UGATE

8

PHASE

5

LGATE

2

BOOT

VCC
PWM
EN
GND

1

UGATE

8

PHASE

5

LGATE

PU26

VCC
PWM
EN
GND

ISL6207CB-T_SO8

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

BOOT
UGATE
PHASE
LGATE

2
1
8
5

PR330
0_0603_5%

1 2

PR333

1 2

0_0603_5%

PR346
0_0603_5%

1 2

PR349

1 2

0_0603_5%

1 2

0_0603_5%
PR369
0_0603_5%

1 2

PR366

E

1536

7

PC267

1 2

0.15U_0805_16V7K

PC280

1 2

0.15U_0805_16V7K

1 2

E

4 2

1536

7

4 2

1536

7

4 2

1536

7

4 2

1536

7

PC294

4 2

0.15U_0805_16V7K

1536

7

4 2

CPU_B+

PQ89

IRF6604_DFET-7

PQ91

IRF6603_DFET-7

CPU_B+

PQ93

IRF6604_DFET-7

PQ95

IRF6603_DFET-7

CPU B+

PQ99

IRF6604_DFET-7

PQ103

IRF6603_DFET-7

F

1536

7

4 2

1536

7

4 2

IRF6603_DFET-7

1536

7

4 2

1536

7

PQ96

4 2

IRF6603_DFET-7

1536

7

4 2

1536

7

4 2

F

12

PC260

PQ90

@IRF6604_DFET-7

12

PD39

@EC31QS04

PQ92

12

PQ94

@IRF6604_DFET-7

12

PD41

PQ100

@IRF6604_DFET-7

12

PD42

PQ104

IRF6603_DFET-7

CPU_B+

12

12

PC261

PC262

@10U_1210_25V

10U_1210_25V6M

10U_1210_25V6M

0.7U_ETQP2H0R7BFA_30A_20%

1 2

PR343

1 2

61.9K_0603_1%

12

12

PC276

PC275

PC274

@10U_1210_25V

10U_1210_25V6M

10U_1210_25V6M

0.7U_ETQP2H0R7BFA_30A_20%

PR364

1 2

@EC31QS04

61.9K_0603_1%

12

PC289

@EC31QS04

12

12

PC290

10U_1210_25V6M

10U_1210_25V6M

0.7U_ETQP2H0R7BFA_30A_20%

PR373

1 2

61.9K_0603_1%

Title

Size Document Number Rev

B

Date: Sheet

G

PL31

12

PL32

1

PC263

2

0.1U_0603_25V7K

FBM-L18-453215-900LMA90T_1812

1

+

PC265
220U_25V_M

PC264

2

2200P_0402_50V7K

+CPU_CORE

12

PD40
EC31QS04

0.01U_0603_50V7K
PC271

1 2

PH2

12

S THERM_820+-5%_0603

12

12

12

PC279

PC278

PC277

@10U_1210_25V

PL33

12

12

PC292

PC291

@10U_1210_25V

PL34

Dell-Compal Confidential

0.1U_0603_25V7K
2200P_0402_50V7K

+CPU_CORE

PC285

0.01U_0603_50V7K

1 2

PH3

S THERM_820+-5%_0603

12

12

PC293

0.1U_0603_25V7K
2200P_0402_50V7K

+CPU_CORE

12

PC296

0.01U_0603_50V7K

1 2

PH5

S THERM_820+-5%_0603

12

12

PC303

2200P_0402_50V7K

Dell EMI Request

12

+CPU_CORE

+CPU_CORE

12

PC304

2200P_0402_50V7K

H

B+

12

PC305

2200P_0402_50V7K

+CPU_CORE

COMPAL ELECTRONICS, INC

+CPU_CORE
Abacus-MT LA-1682 0.1A

G

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41 44Tuesday, February 25, 2003

H

2

5

4

3

2

1

Power Version change list (P.I.R. List)

Reason for change

1

D D

2

FAN turns on when system off with battery only 0.1A P38

CPU ID net error+CPU_CORE voltage error

need to add a switch to control 12V_FAN power
when system off with battery only

CKT
Rev.

0.1A P41 Swap net CPU_ V ID0 and CPU_VID4 , CPU_VID1 and CPU_VID3(rework) 0.1 SST

PG# Modify List B.Ver# PhaseFixed IssueItem

add a switch for 12V_FAN with
PR388 200K 5% 0402 PR389 150K 5% 0402
PC307 1uF/25V 0805 PC308 0.01uF/50V 0603
PQ107 2N700 2 PQ108 SI2303DS

0.2 PT

doulbe puls e s on the output of U81.4 when the

3

input U81.3 s l owly rises to 1.58v

4

Issue found in ISL6225BCA

5

Load line is no t suit Intel SPEC. Change load line

6

C C

7

Adapter is 90 W / 130W

8

Change capacitor meterial

9 Adapter is 90 W / 130W Detect adapter 130W/90W

Load line test Base on Dell power team load line test

10

for H-VID_PWRGD transtion timing with VID_PWRGD meet Intel
SPEC.

to provide MOSFET damageMOSFET SMT damage

Oscillation behavior found in ISL6225BCA

Detect adapter 130W/90W

Capacitor material is not available

0.1A P41

0.1A P41

P400.1A

0.1A P41

0.1A P37

0.1A P38

0.1A P39

0.1A

P41

change PU27 CM2843 to PU27 MIC5258

Change PQ89, PQ90, PQ91, PQ92, PQ93, PQ94, PQ95, PQ96,
PQ99, PQ100, PQ103, PQ104 symbol footprint

change PU20 f rom ISL6225BCA to ISL6225CA

Change PR354 from 340K to 442K and PR382 from 1.91K to 2.49K

Add PQ109,PR390,PC309,PR393

Change PC245 from100U to 15U

Add PR391,PQ110,PR392,and change PR305 from 0 to 115K

De-pop PC282,change PR382 to 2.37K, PR361 to

45.3K,PR341 to 442 Ohm,PR344 to

PT0.2

PT0.2

0.2 PT

0.2 PT

0.2 PT

0.2 PT

25.5K,PR343,PR364,PR373 to 61.9K

11

+RTCCLK and S3# will a pulse when AC plug in

12

+RTCCLK and S3# will a pulse when AC plug in

B B

13

Issue found in ISL6225BCA

14

Not easy to adjust OCP setting only, due to

15

DVS and OCSET both within same network
divider

delay +3VALW output

delay +1.5VALW output rise time

With fix PWM condition

separate OCP setting point from the DSV setting point; Particularly,
use the Bo otS elec t si gnal t o contro l different OCP setting points for
NW CPU and Prescott-MT CPU

0.1A

0.1A

0.1A

0.1A P40

0.1A P41

P38

Change PC104 to 1000P

P39

Change PC259 to 1000P; PD38 EC10QS04 for cost down

P38

Change PR311 to 59K,PC244 to 470P, PC245 to 15uF/25VChange 12V FAN OCP point,a n d m o d o fy circuit12V FAN OCP point

Change PR290 to 0 and De-pop PR288

Use the PU28A for DSV setting only; use PR342 26.1K for
NW CPU ocp set ti n g; for prescott- M T CPU ocp setting, add
PR395 73.2K, PQ111 MMBT3904, PR394 47K, and change
PR367 to 47K. Dep PR378 requested from Dell

PT0.2

0.2 PT

0.2 PT

0.2 PT

0.2 PT

0.2 PT

A A

Dell-Compal Confidential

COMPAL ELECTRONICS, INC

Title

Power PIR

Size Document Number Rev

Abacus-MT L A-1682 0.2

5

4

3

2

Date: Sheet

1

of

42 44Tuesday, February 25, 2003

5

4

3

2

1

H/W Version change list (P.I.R. List)

Reason for change

D D

C C

System c ann't turn o n B+ is shutdown when AC in,Because the ti ming sequence of +12VALW is

1

H_VID_PWRGD delay time from VID_PWRGD

2

is not enough

3

LA-1682 MB INVPWR_B+ cann't used the

4

LS-1452 VGA BD

Board ID change P32

5

KB back to Abacus JP5 pin1 signal KSO17 change to KSO16 0.1A P 34 JP5 pin1 signal KSO17 change to KSO16 0. 2 PT

6

Prevent EMI impact

7

Lan EEPROM M aterial cont rol U8 will used the eeprom same as Abacus

8

later than +12V_FAN

specification (H_VID_PWRGD delay 1~10ms from VID_PWRGD)

Change K/B co nnector to Abacus co mpatibleAbacus and Abacus-MT K/B is different

We will use the LS-1452 to BDW11/12 project, will reduce some
parts for External Graphic.

Board ID change for EC code, due to the KB change

Prevent CL K_ AGP_66M antenna impact when no used 0.1A P 17 0.2 PT

CKT
Rev.

PG# Modify List B.Ver# PhaseFixed IssueItem

0.1A P7 Change U76 VCC net from +12VALW to +12V_FAN(rework)

0.1A

P35VID_PWRGD with H_VID_PWRGD Sequence need to meet the Intel

Change R567 on BOM SD028100200 10K_0402_5% to SD028200200
20K_0402_5% and add C32 0.1U_0402_16V4Z
Change K/B connector JP32 from SP01J00133L S H-CONN JAE

0.1A

0.1A

0.1A

0.1A

FK2S030W11 30P to SP01F005110 S H-CONN FOXCONN

P33

GS22250-0001 25P P1 and delete the net KSO17 and C805
Change net pin 164/166/168/170 of JP8 from INVPWR_B+ to B+ and

P17

Q71, C79 3, C795, R560, R562, Q74 add "1@"

Change Board ID to 0.5V ,So repl ace and pop t he R393 with
SD028910200 S RES 1/16W 91K +-5% 0402

Add R17 1@33 _0402_ 5% (SD028330A00 S RES 1/16W 33 +-5%

0402) And C33 1@10P _0402_25V8K (SE068100K00 S CER CAP 10P
25V +-10% NPO 0402)

Change the BOM U8 from SA093461030 without LAN
code to SA093461040 with Abacus LAN code

0.1

0.2

0.2

0.2

0.2 PT

0.2 PTP24

SST

PT

PT

PT

Extra connector Jp33 just for A-test BIOS debug connector

9

RTCCL K ri ng b ack Need to ad d se ries terminatio n on RTCCLK at the ICH

10

Part Number error Correct U77 A2 revision Part Number 0.2 PTP210.1A

11

12

13

Extra Pads abo ut @C659 & @C660

H_VID_PWR GD w avef o rm have nagative pulse

14

B B

A A

after rise up at VID_PWRGD voltage at

1.58V(riseing)

Default the ITPCLK/ITPCLK# to Intel

15

circuit sp ecification.

Audio cost reduction from Dell request Cost reduction 0.1A P29

16

Improve audio performance Improve audio performance 0.1A P 2 9 Populate C490 1uF 0.2 PT

17

Investigate Beep circuit cost down Co st 0.1A P30 Add R132 0 ohm, but depop. Test at PT step 0. 2 P T

18

Fix HP plug in phonejack delay time Plug in External SPK will delay some timing 0.1 A P30 C588 change from 4.7uF_0805 to 0.47uF_0603, and depop C580 0.2 PT

19

Reversed the capacitor about Fan circuit C687 & C701 make the voltage leakage so depop the parts . PT0.2Depop the parts C687,C701 (add @ )P70.1A

20

1394 can not link at 400 speed. Improve 1394 link test by TI test tool 0. 1 A P 25 D epo p C 223, C216, R198, R197, R196, R194, R199

21

5

because of signal quality/undershoot and ringback at Q69

Just do the reserved the RTCCLK modify waveform cap.Reversed the c apac itor about RTCCLK circuit 0.1A

Remove capacitor @C659 & @C660 extra component from PCB because
we have not used.

H_VID_PWRGD waveform abnormal 0.1A P 35 Change R5 67 on BOM from SD 028200200 20K_0402_5% to

4

0.1A

0.1A P21 PT0.2Add R18 SD028220A00 S RES 1/16W 22 +-5% 0402 and C62

0.1AFor meet Int el spe cification

3

Remove Jp33 on BOM

SE068101K00 S CE R CAP 100P 2 5V +-10% NPO 0402
Change the BOM U77 from SA243500000 S IC RG82G4350M A1
UFCBGA-732 MONTARA-GT to SA82852 0100 S IC RG82852GME
A2 UFCBGA-732 MONTARA-GT.

P2 1 Depo p the C62 (add @ ) 0. 2 P T

SD028470200 10K_0402_5% and pop C32 0.1U_0402_16V4Z

Add @ to RP61 and add SD014499A09 49.9 +-1% 0603

P6

R572/R573 for ITPCLK/ITPCLK# pull down

Depop the parts C481, C554, C551

P30

C553, C483, C6 22, C623, C624 change from 1uF to 0.1uF

add C822(270P), C823(1uF), R574(5.1K), R575~R578(56.2)

Title

Size Document Number Rev

2

Date: Sheet

0.2 PTP33

SST

PT0.1A 0.2Depop the parts C659 & C660 from Circuit & PCBP7

0.2 PT

0.2

0.2 PT

0.2 PT

PT

Dell-Compal Confidential

COMPAL ELECTRONICS, INC

H/W PIR
Abacus-MT L A-1682 0.2

1

of

43 44Tuesday, February 25, 2003

5

4

3

2

1

H/W Version change list (P.I.R. List)

Reason for change

D D

Audio cost reduction from Dell request c ost 0.1A P2 9 pop R342 0ohm, depop X4, C485.

22

Add adapter 90W/130W# select function pin. PT0.2P330.1A

23

Add +5V Fan for CPU thermal Fan thermal module same with Abacus 0 . 1A P7

24

update :Add +5V Fan for CPU thermal Fan thermal module same with Abacus 0.1 A P 7 R579 R580 prevent current issue, R579 change to jumper

25

Detect adapter 130W/90W

CKT
Rev.

PG# Modify List B.Ver# PhaseFixed IssueItem

C542 change to 0ohm
U27 Pin 12 add net 90W/130W#

Add R579 (0ohm_0603) for +12V Fan, and R580(0ohm_0603) for +5V
Fan, also add JP34 for +5V Fan connector. But depop R580 and JP34.
And R471 must change to 66.5K_1% if use +5VS Fan source.

and R580 change to 0805_bead(L53:3A rating, depop)

0.2 PT

0.2 PT

0.2 PT

26

Vcore test report recommend Vcore test report recommend 0.1A P 7 depop C645, C648, C6 50, C651, C662, C647, C653: 470uF of

27

C C

B B

decreasing the size of isolated ground islandsimproves V co r e copper plane 0.1A P 7 remove C664 and C665 0. 2 PT

CPU bulk capacitors

0.2 PT

A A

Dell-Compal Confidential

COMPAL ELECTRONICS, INC

Title

H/W PIR

Size Document Number Rev

Abacus-MT L A-1682 0.2

5

4

3

2

Date: Sheet

1

of

44 44Tuesday, February 25, 2003