Compal LA-1571, TravelMate 530 Schematic

Page 1
A
1 1
B
C
D
E
Compal confidential
2 2
Schematics Document
Mobile P4 uFCBGA/uFCPGA with INTEL MONTARA-GML/ICH4-M core logic
2002-02-10
3 3
4 4
A
B
REV:1.0
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Title
Size Document Number Rev
Date: Sheet
401238
星期一
Compal Electronics, Inc.
SCHEMATIC M/B LA-1571
21, 2004
六月
E
of
138,
Page 2
A
Compal confidential
File Name : LA-1571
B
C
D
E
Block Diagram
CPU Bypass
1 1
Fan Control
page 3
TV-OUT Conn
page 14
2 2
& CPUVID
page 5
CRT Conn
page 14
LCD Conn
page 13
TV ENCODER CH7011
page 11
uFCBGA-479/uFCPGA-478 CPU
HA#(3..31)
MONTARA-GML
DVOC
Mobile P4
page 3,4,5
System Bus
400MHz
VGA Embeded
732 pin u-FCBGA
page6,7,8
HUB LINK 1.5
HD#(0..63)
Thermal Sensor ADM1032AR
Memory BUS(DDR)
2.5V DDR- 200/266
page 3
DDR-SO-DIMM X2
BANK 0, 1, 2, 3
page 9,10
Clock Generator
CY28346
page 12
5 IN 1 CARDREADER
3.3V 33 MHz
IDSEL:AD19 (PIRQD#,GNT#3,REQ#3)
IEEE 1394 VT6307L
page 20
IDSEL:AD16 (PIRQA#,GNT#0,REQ#0)
3 3
Mini PCI socket
page 24
IDSEL:AD22/23 (PIRQG/H#,GNT#1/4,REQ#1/4)
LAN
RTL 8100BL
page 19
RJ45/11 CONN
page 19
CardBus Controller
PCI BUS
IDSEL:AD20 (PIRQE/F#,GNT#2,REQ#2)
ENE CB1420
page 21
Slot 1
page 22
Slot 0
page 22
ICH4-M
BGA 421 pin
page 15,16,17
LPC BUS
USB
AC-LINK
Primary IDE
Secondary IDE
USB conn
page 29
AC-LINK CONN
page 23
HDD Connector
page 18
CDROM Connector
page 18
Power On/Off Reset & RTC
page 30
EC NS87591L
DC/DC Interface Suspend
page 31
Touch Pad
page 26
EC I/O Bu ffer
4 4
Power Circuit
page 28
DC/DC
page 32,33,34,35,36,37
A
B
page 27
Int.KBD
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
BIOS
page 26
page 28
PARALLEL
SMsC LPC47N227
LPC to X-BUS Super I/O
page 25
FIR
page 25
D
page 25
FDD
page 26
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
401238
星期一 六月
page 26
MDC/BT CONN
page 23
SPR CONN
page 29
*RJ45/11 CONN *PS2 x2 CONN *CRT CONN *LINE IN JACK *LINE OUT JACK *MIC JACK *DC JACK *TVOUT CONN *PRINTER PORT *COM PORT *USB CONN x1
SCHEMATIC M/B LA-1571
238, 21, 2004
E
1.0
of
Page 3
A
FERR#
FERR# 15 A20M# 15 INIT# 15
INTR 15 NMI 15 IGNNE# 15 SMI# 15 CPUSLP# 15 STPCLK# 15
ADS# 6 HASTB0# 6 HASTB1# 6 BNR# 6 DBSY# 6 DEFER# 6 DRDY# 6 HIT# 6 HITM# 6 HTRDY# 6 BPRI# 6 BREQ0# 6 HLOCK# 6
HREQ0# 6 HREQ1# 6 HREQ2# 6 HREQ3# 6 HREQ4# 6
H_RS#0 6 H_RS#1 6 H_RS#2 6
CLK_CPU_BCLK 12 CLK_CPU_BCLK# 12
R18 0_0402 R19 0_0402
CPURST# 6 CPUPWRGD 15
Trace width : 25 mil
R32
1 2
0_0402
R28 0_0402
TCK 4 TDI 4 TDO 4 TMS 4 TRST# 4
CLK_CPU_ITP# 12 CLK_CPU_ITP 12
PULL UP
HTEST0 HTEST1 HTEST2 HTEST3 HTEST4 HTEST5 ITPCLKOUT0 ITPCLKOUT1 HTEST8 HTEST9 HTEST10
GHI# PROCHOT# CPUPWRGD FERR# IERR# BREQ0# CPURST#
THERMTRIP#
ITP_CLK# ITP_CLK
CPU_COMP0 CPU_COMP1
R4 56_0402 R5 56_0402 R6 56_0402
R7 300_0402
R11 300_0402
R12 56_0402 R13 56_0402 R14 220_0402 R15 51_0402
R34 @56_0402
R24
R25
+CPU_CORE
R2 56_0402 R3 56_0402
R10 56_0402
R20 49.9_1%_0402 R22 49.9_1%_0402
51.1_1%_0603
51.1_1%_0603
Thermal Sensor ADM1032AR
12
2200PF_0402
EC_SMC227 EC_SMD227
3.48K_1%_0603
1N4148
FAN1
C2
+12VS
R17
D2
2
H_THERMDA H_THERMDC
1 2 21
2.2UF_16V_0805
31
Q2 2SA1036K
CB1
FMMT619
1 2
Q1
D3
@1SS355
2 1
2 3 8 7
2
Address:1001_100X
3 1
PULL DOWN
+5VS
VCC
1 3
VEE
2 5
R27
Title
Size Document Number Rev
Date: Sheet of
45
HDSTBP#[0..3]
HDSTBN#[0..3]
+3VS
182736
RP1
8P4R_1K_0804
A
CPU_VID0 37 CPU_VID1 37 CPU_VID2 37 CPU_VID3 37 CPU_VID4 37
SB_THERMTRIP# 16
CPUPERF# 16 DPSLP# 6,15
12
R29
1K_0402
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HDSTBP#[0..3] 6
HDSTBN#[0..3] 6
12
C6 .1UF_0402
EN_FAN127
1 2
R26
13K_1%_0603
+3VALW+5VALW
W=15mil
C1
.1UF_0402
U2
VDD1
D+
ALERT
D-
THERM
SCLK SDATA
GND
ADM1032AR_SOP-8
1 2
1 2
1 6 4 5
R9
1K_0402
12
R8
10K_0402
Fan Control circuit
+5VS
D1 1SS355
2 1
+5VFAN1
D4
C3
1000PF_0402
1N4148
2 1
C4 1000PF_0402
.1UF_0402
1 2
C5
4
U3
LMV321_SOT23-5
1 2
7.32K_1%_0603
FAN1
Compal Electronics, Inc.
SCHEMATIC M /B LA- 1571
401238
,
星期一
21, 2004
六月
+3VS
JP1
12
1
R23
2
10K_0402
3
53398-0310
C3,C4 Close to JP1
FANSPEED1 27
3
38
HA#[3..31] 6
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
HD#[0..63]6
HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17
1 1
DBI#[0..3]6
HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63
DBI#0 DBI#1 DBI#2 DBI#3
U1A
K2
A#3
K4
A#4
L6
A#5
K1
A#6
L3
A#7
M6
A#8
L2
A#9
M3
A#10
M4
A#11
N1
A#12
M1
A#13
N2
A#14
N4
A#15
N5
A#16
T1
A#17
R2
A#18
P3
A#19
P4
A#20
R3
A#21
T2
A#22
U1
A#23
P6
A#24
U3
A#25
T4
A#26
V2
A#27
R6
A#28
W1
A#29
T5
A#30
U4
A#31
V3
A#32
W2
A#33
Y1
A#34
AB1
A#35
B21
D#0
B22
D#1
A23
D#2
A25
D#3
C21
D#4
D22
D#5
B24
D#6
C23
D#7
C24
D#8
B25
D#9
G22
D#10
H21
D#11
C26
D#12
D23
D#13
J21
D#14
D25
D#15
H22
D#16
E24
D#17
G23
D#18
F23
D#19
F24
D#20
E25
D#21
F26
D#22
D26
D#23
L21
D#24
G26
D#25
H24
D#26
M21
D#27
L22
D#28
J24
D#29
K23
D#30
H25
D#31
M23
D#32
N22
D#33
P21
D#34
M24
D#35
N23
D#36
M26
D#37
N26
D#38
N25
D#39
R21
D#40
P24
D#41
R25
D#42
R24
D#43
T26
D#44
T25
D#45
T22
D#46
T23
D#47
U26
D#48
U24
D#49
U23
D#50
V25
D#51
U21
D#52
V22
D#53
V24
D#54
W26
D#55
Y26
D#56
W25
D#57
Y23
D#58
Y24
D#59
Y21
D#60
AA25
D#61
AA22
D#62
AA24
D#63
E21
DBI0
G25
DBI1
P26
DBI2
V21
DBI3
ZIF_SOCKET478_478P
A20M FERR
INIT LINT0 LINT1
IGNNE
SMI
SLP
STPCLK
ADS ADSTB0 ADSTB1
BNR
DBSY
DEFER
DRDY
HITM
TRDY
BPRI
BR0
LOCK REQ0
REQ1 REQ2 REQ3 REQ4
RS0
RS1
RS2
DSTBP0 DSTBN0 DSTBP1 DSTBN1 DSTBP2 DSTBN2 DSTBP3 DSTBN3
BCLK0 BCLK1
ITP_CLK1 ITP_CLK0
IERR
MCERR
DBRESET
RESET
PWRGOOD
VSS75
COMP0 COMP1
DEP0 DEP1 DEP2 DEP3
THERMDA THERMDC
THERMTRIP
PROCHOT
TESTHI0 TESTHI1 TESTHI2 TESTHI3 TESTHI4
TESTHI5 TESTHI6/ITPCLKOUT0 TESTHI7/ITPCLKOUT1
TESTHI8
TESTHI9
TESTHI10
TESTHI11/GHI#
TESTHI12/DPSLP#
BSEL0 BSEL1
TCK
TDO TMS
TRST
VID0 VID1 VID2 VID3 VID4
HIT
TDI
C6 B6 W5 D1 E5 B2 B5 AB26 Y4
G1 L5 R5 G2 H5 E2 H2 F3 E3 J6 D2 H6 G4
J1 K5 J4 J3 H3
F1 G5 F4
F21 E22 J23 K22 P23 R22 W23 W22
AF22 AF23
AD26 AC26
AC3 V6
AE25 AB25 AB23 AF26
L24 P1
J26 K25 K26 L25
B3 C4 A2 C3
AD24 AA2 AC21 AC20 AC24 AC23 AA20 AB22 U6 W4 Y3 A6 AD25
AD6 AD5
D4 C1 D5 F7 E6
AE5 AE4 AE3 AE2 AE1
R1 0_0402
A20M# INIT#
INTR NMI IGNNE# SMI# CPUSLP# STPCLK#
BREQ0#
HDSTBP#0 HDSTBN#0 HDSTBP#1 HDSTBN#1 HDSTBP#2 HDSTBN#2 HDSTBP#3 HDSTBN#3
CPU_CLK CPU_CLK#
ITP_CLK# ITP_CLK
IERR#
CPURST# CPUPWRGD
CPU_COMP0 CPU_COMP1
H_THERMDA H_THERMDC THERMTRIP# PROCHOT#
HTEST0 HTEST1 HTEST2 HTEST3 HTEST4 HTEST5 ITPCLKOUT0 ITPCLKOUT1 HTEST8 HTEST9 HTEST10 GHI# DPSLP#
TCK TDI TDO TMS TRST#
CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4
Page 4
A
+CPU_CORE
A12
A14
A16
A18
A20
AA10
AA12
VCC_CORE
VCC_CORE
VCC_CORE
GND
GND
E13
E15
E17
AA14
AA16
VCC_COREA8VCC_CORE
VCC_CORE
VCC_CORE
GND
GND
GND
GND
E19
E23
E26
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF16
GND
AF18
AF9
VCC_CORE
GND
GND
AF6
AF20
VCC_CORE
VCC_CORE
VCC_CORE
GND
GND
GND
B10
B12
AF8
VCC_CORE
VCC_CORE
VCC_CORE
GND
GND
GND
B14
B16
B18
VCC_CORE
VCC_CORE
VCC_CORE
GND
GND
GND
B20
B23
B26
U1B
4 4
3 3
2 2
1 1
B11 B13 B15 B17 B19
C10 C12 C14 C16 C18 C20
D11 D13 D15 D17 D19
E10 E12 E14 E16 E18 E20
F11 F13 F15 F17 F19
D10
K21 K24
L23 L26
M22 M25
N21 N24
P22 P25
R23 R26
D12 D14 D16 D18 D20 D24
D21 AE22 AE24 AE26
AE7
AE9
AF1 AF10 AF12 AF14
B7 B9
C8
D7 D9
E8
F9
D8 D6 D3
J2 J22 J25
J5
K3 K6 L1
L4
M2
M5
N3 N6
P2
P5
R1
E1
VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
VCC_CORE
VCC_CORE
VCC_CORE
GND
GNDB4GNDB8GND
C11
A10
VCC_CORE
VCC_CORE
VCC_CORE
GND
GND
C13
C15
C17
VCC_CORE
VCC_CORE
VCC_CORE
GND
GND
GNDC2GND
E11
C19
AA18
AA8
AB11
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
GNDE4GNDE7GNDE9GND
F10
B
+CPU_CORE
AB13
AB15
AB17
AB19
VCC_CORE
VCC_CORE
VCC_CORE
GND
GND
GND
F18
F12
F14
F16
AB7
AB9
AC10
VCC_CORE
VCC_CORE
VCC_CORE
GND
GNDF2GND
F22
F25
R30
@54.9_1%_0402
AC12
AC14
AC16
VCC_CORE
VCC_CORE
VCC_CORE
GND
GNDF5GND
F8
G21
AC18
AC8
AD11
VCC_CORE
VCC_CORE
VCC_CORE
GND
GND
GNDG3GNDG6GND
G24
VCORE_SENSE
AD13
AD15
AD17
AD19
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
GNDC9GNDY5GND
Y25
C22
AD9
AE10
AE12
VCC_CORE
VCC_CORE
VCC_CORE
GND
GNDY2GNDW6GNDW3GND
Y22
AD7
A5
VCC_CORE
VCC_SENSE
GND
W24
W21
AB2
RSP
GNDV4GND
V26
AC1
AP0
GND
V23
V5
AC6
AP1
BPM0
GNDV1GNDU5GND
AB5
BPM1
U25
AC4
U22
AA5
AB4
BPM2
BPM3Y6BPM4
GND
GNDU2GNDT6GNDT3GND
C
AF3
AF4
AA3
BINIT
BPM5
VCCVID
GTLREF
VCCVIDPRG
GTLREF GTLREF GTLREF
VCCIOPLL
VSS_SENSE
GND
GND
ZIF_SOCKET478_478P
R4
T24
T21
BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5
VCCA VSSA
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
AA21 AA6 F20 F6
AD20 AD22
AE23 A4 C7
C5 H1 H4 H23 H26 A11 A13 A15 A17 A19 A21 A24 A26 A3 A9 AA1 AA11 AA13 AA15 AA17 AA19 AA23 AA26 AA4 AA7 AA9 AB10 AB12 AB14 AB16 AB18 AB20 AB21 AB24 AB3 AB6 AB8 AC11 AC13 AC15 AC17 AC19 AC2 AC22 AC25 AC5 AC7 AC9 AD1 AD10 AD12 AD14 AD16 AD18 AD21 AD23 AD4 AD8 AE11 AE13 AE15 AE17 AE19 C25
+1.2VPP
CB2
1UF_10V_0603
GTLREF
C7 220PF_0402
1UF_10V_0603
VCORE_PLL VSS_PLL
VIO_PLL VSS_SENSE
R35
@54.9_1%_0402
CB3
+CPU_CORE
R31
49.9_1%_0603
2/3VCORE
R33 100_1%_0603
12
CB4
+
33UF_D2_16V
CB6
+
33UF_D2_16V
1 2
L1 4.7UH_80mA
1 2
1 2
L2 4.7UH_80mA
D
+1.2VPP
+1.2VPP
CB5 10UF_10V_1206
CB7 10UF_10V_1206
P4-M + Montara
ITP PULL UP/DOWN
TMS3
TDO3
TDI3
TRST#3
TCK3
TMS
TDO
TDI
BPM#4 BPM#5 BPM#1 BPM#0
BPM#3 BPM#2
TRST# TCK
R38 R39 R40
RP2
R41
R42
R43 R44
27.4_1%_0603
39.2_1%_0603 75_0603 150_0603
18 27 36 45
8P4R-51_0804
51.1_1%_0603
51.1_1%_0603
680_0603
E
+CPU_CORE
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
SCHEMATIC M /B LA- 1571
Size Document Number Rev
401238
Date: Sheet of
Compal Electronics, Inc.
,
星期一
21, 2004
六月
438
E
Page 5
A
Layout note :
Place close to CPU, Use 2~3 vias per PAD. Place .22uF caps underneath balls on solder side. Place 10uF caps on the peripheral near balls. Use 2~3 vias per PAD.
B
C
D
E
Layout note :
Place close to CPU power and ground pin as possible (<1inch)
Please place these cap in the socket cavity area
+CPU_CORE
1 1
12
10UF_6.3V_1206
+CPU_CORE
12
10UF_6.3V_1206
CB8
CB13
12
CB9 10UF_6.3V_1206
12
CB14 10UF_6.3V_1206
12
CB10 10UF_6.3V_1206
12
CB15 10UF_6.3V_1206
12
CB11 10UF_6.3V_1206
12
CB16 10UF_6.3V_1206
12
CB12 10UF_6.3V_1206
12
CB17 10UF_6.3V_1206
Please place these cap on the socket north side
+CPU_CORE
12
CB18
10UF_6.3V_1206
2 2
+CPU_CORE
12
CB23
10UF_6.3V_1206
+CPU_CORE
12
CB28
10UF_6.3V_1206
12
CB19 10UF_6.3V_1206
12
CB24 10UF_6.3V_1206
12
CB29 10UF_6.3V_1206
12
CB20 10UF_6.3V_1206
12
CB25 10UF_6.3V_1206
12
CB30 10UF_6.3V_1206
12
CB21 10UF_6.3V_1206
12
CB26 10UF_6.3V_1206
12
CB31 10UF_6.3V_1206
12
CB22 10UF_6.3V_1206
12
CB27 10UF_6.3V_1206
+CPU_CORE
12
+
+CPU_CORE
12
+
+CPU_CORE
12
CE1 220UF_D2_4V_25m
CE8 220UF_D2_4V_25m
C9
0.22UF_0603
Used ESR 25m ohm cap total ESR=2.5m ohm
12
C10
0.22UF_0603
12
CE2
+
220UF_D2_4V_25m
12
CE9
+
220UF_D2_4V_25m
12
C11
0.22UF_0603
+
+
12
C12
0.22UF_0603
12
12
CE3 220UF_D2_4V_25m
CE6 @220UF_D2_4V_25m
12
C13
0.22UF_0603
12
CE5
+
220UF_D2_4V_25m
12
CE7
+
220UF_D2_4V_25m
12
C14
0.22UF_0603
12
C15
0.22UF_0603
12
CE4
+
220UF_D2_4V_25m
12
CE10
+
220UF_D2_4V_25m
12
C16
0.22UF_0603
12
C17
0.22UF_0603
12
C18
0.22UF_0603
Please place these cap on the socket south side
+CPU_CORE
3 3
4 4
12
10UF_6.3V_1206
+CPU_CORE
12
10UF_6.3V_1206
+CPU_CORE
12
10UF_6.3V_1206
CB32
CB37
CB42
12
12
12
A
CB33 10UF_6.3V_1206
CB38 10UF_6.3V_1206
CB43 10UF_6.3V_1206
12
CB34 10UF_6.3V_1206
12
CB39 10UF_6.3V_1206
12
CB44 10UF_6.3V_1206
12
CB35 10UF_6.3V_1206
12
CB40 10UF_6.3V_1206
12
CB45 10UF_6.3V_1206
12
CB36 10UF_6.3V_1206
12
CB41 10UF_6.3V_1206
B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Title
SCHEMATIC M /B LA- 1571
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
401238
星期一 六月
of
538, 21, 2004
E
3B
Page 6
5
HA#[3..31]3
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12
D D
HREQ0#3 HREQ1#3 HREQ2#3 HREQ3#3
HREQ4#3 HASTB0#3 HASTB1#3
CLK_MCH_BCLK#12 CLK_MCH_BCLK12
27.4_1%_0402
C C
B B
R55
R56
27.4_1%_0402
HDSTBP#[0..3]
HDSTBP#[0..3] 3
HDSTBN#[0..3]
HDSTBN#[0..3]
DBI#[0..3]3
CPURST#3
HI_PSTRB15 HI_PSTRB#15
+1.2VS
27.4_1%_0402
HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
HYSWING HXSWING HYRCOMP
HXRCOMP
HDVREF
HCCVREF HAVREF
HDSTBN#0 HDSTBN#1 HDSTBN#2 HDSTBN#3 HDSTBP#0 HDSTBP#1 HDSTBP#2 HDSTBP#3 DBI#0 DBI#1 DBI#2 DBI#3
CPURST#
HI_D0 HI_D1 HI_D2 HI_D3 HI_D4 HI_D5 HI_D6 HI_D7 HI_D8 HI_D9
HI_D10 HI_PSTRB HI_PSTRB#
NB_HI_VSWING
R67
NB_HI_VREF
U4A
Montara-GM(L)
P23
HA#3
T25
HA#4
T28
HA#5
R27
HA#6
U23
HA7#
U24
HA#8
R24
HA#9
U28
HA#10
V28
HA#11
U27
HA#12
T27
HA#13
V27
HA#14
U25
HA#15
V26
HA#16
Y24
HA#17
V25
HA#18
V23
HA#19
W25
HA#20
Y25
HA#21
AA27
HA#22
W24
HA#23
W23
HA#24
W27
HA#25
Y27
HA#26
AA28
HA#27
W28
HA#28
AB27
HA#29
Y26
HA#30
AB28
HA#31
R28
HREQ#0
P25
HREQ#1
R23
HREQ#2
R25
HREQ#3
T23 AA26 AD29
AE29
K28 B18 H28 B20
K21
Y28 Y22
C27 E22 D18 K27 D26 E21 E18
E25 B25 G19
T26
J21
J17
J28
J25
F15
U7 U4 U3
V3 W2 W6
V6 W7
T3
V5
V4 W3
V2
T2 U2 W1
HREQ#4 HADSTB#0 HADSTB#1
BCLK# BCLK HYSWING HXSWING HYRCOMP HXRCOMP
HVREF0 HVREF1 HVREF2 HCCVREF HAVREF
HDSTBN#0 HDSTBN#1 HDSTBN#2 HDSTBN#3 HDSTBP#0 HDSTBP#1 HDSTBP#2 HDSTBP#3 DINV0# DINV1# DINV2# DINV3#
CPURST# HL_0
HL_1 HL_2 HL_3 HL_4 HL_5 HL_6 HL_7 HL_8 HL_9 HL_10 HLSTB HLSTB# HLRCOMP PSWING HLVREF
MONTARA-GM(L)
HI_D[0..10]
HOST
HUB I/F
HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63
HTRDY#
DRDY#
DEFER#
HITM#
HLOCK#
BREQ0#
DBSY#
HI_D[0..10] 15
HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9
ADS#
HIT#
BNR# BPRI#
RS#0 RS#1 RS#2
4
HD#[0..63] 3
HD#0
K22
HD#1
H27
HD#2
K25
HD#3
L24
HD#4
J27
HD#5
G28
HD#6
L27
HD#7
L23
HD#8
L25
HD#9
J24
HD#10
H25
HD#11
K23
HD#12
G27
HD#13
K26
HD#14
J23
HD#15
H26
HD#16
F25
HD#17
F26
HD#18
B27
HD#19
H23
HD#20
E27
HD#21
G25
HD#22
F28
HD#23
D27
HD#24
G24
HD#25
C28
HD#26
B26
HD#27
G22
HD#28
C26
HD#29
E26
HD#30
G23
HD#31
B28
HD#32
B21
HD#33
G21
HD#34
C24
HD#35
C23
HD#36
D22
HD#37
C25
HD#38
E24
HD#39
D24
HD#40
G20
HD#41
E23
HD#42
B22
HD#43
B23
HD#44
F23
HD#45
F21
HD#46
C20
HD#47
C21
HD#48
G18
HD#49
E19
HD#50
E20
HD#51
G17
HD#52
D20
HD#53
F19
HD#54
C19
HD#55
C17
HD#56
F17
HD#57
B19
HD#58
G16
HD#59
E16
HD#60
C16
HD#61
E17
HD#62
D16
HD#63
C18
L28 M25 N24 M28 N28 N27 P27 M23 N25 P28 M26 N23 P26 M27
RTCCLK16
ADS# 3 HTRDY# 3 DRDY# 3 DEFER# 3 HITM# 3 HIT# 3 HLOCK# 3 BREQ0# 3 BNR# 3 BPRI# 3 DBSY# 3 H_RS#0 3 H_RS#1 3 H_RS#2 3
DVOBC_CLKINT11 DVOC_CLK11
DVOC_CLK#11 DVOC_HSYNC11 DVOC_VSYNC11
MI2CCLK11 MI2CDATA11
10K_1%_0402
CLK_MCH_66M12
3
U4B
Montara-GM(L)
R3
DVOBD0/(NC)
R5
DVOBD1/(NC)
R6
DVOBD2/(NC)
R4
DVOBD3/(NC)
P6
DVOBD4/(NC)
P5
DVOBD5/(NC)
N5
DVOBD6/(NC)
P2
DVOBD7/(NC)
N2
DVOBD8/(NC)
N3
DVOC_D0 DVOC_D1 DVOC_D2 DVOC_D3 DVOC_D4 DVOC_D5 DVOC_D6 DVOC_D7 DVOC_D8 DVOC_D9 DVOC_D10 DVOC_D11
GVREF
DVOBD9/(NC)
M1
DVOBD10/(NC)
M5
DVOBD11/(NC)
P3
DVOBCLK/(NC)
P4
DVOBCLK#/(NC)
T6
DVOBHSYNC/(NC)
T5
DVOBVSYNC/(NC)
L2
DVOBBLANK#/(NC)
M2
DVOBFLDSTL/(NC)
G2
DVOBCINTR#
M3
DVOBCCLKINT
J3
DVOCCLK
J2
DVOCCLK#
K6
DVOCHSYNC
L5
DVOCVSYNC
L3
DVOCBLANK#
H5
DVOCFLDSTL
K7
MI2CCLK
N6
MI2CDATA
N7
MDVICLK
M6
MDVIDATA
P7
MDDCCLK
T7
MDDCDATA
K5
DVOCD0
K1
DVOCD1
K3
DVOCD2
K2
DVOCD3
J6
DVOCD4
J5
DVOCD5
H2
DVOCD6
H1
DVOCD7
H3
DVOCD8
H4
DVOCD9
H6
DVOCD10
G3
DVOCD11
E5
ADDID0
F5
ADDID1
E3
ADDID2
E2
ADDID3
G5
ADDID4
F4
ADDID5
G6
ADDID6
F6
ADDID7
L7
DVODETECT
D5
DPMS
F1
GVREF
F7
AGPBUSY#
D1
DVORCOMP
Y3
GCLKIN
AA5
RVSD0
F2
RVSD1
F3
RVSD2
B2
RVSD3
B3
RVSD4
C2
RVSD5
C3
GST[1]
C4
GST[0]
D2
RVSD8
D3
RVSD9
D7
RVSD10
L4
RVSD11
MONTARA-GM(L)
DAC
DVO
PANELBKLTCTL
PANELBKLTEN
PANELVDDEN
CLKS
MISCNC
MCHDETECTVSS
+1.5VS
R406 1K_1%_0402
1 2
R52 100K_0402
DVOBC_CLKINT
DVOC_CLK DVOC_CLK# DVOC_HSYNC DVOC_VSYNC
R410
1 2
100K_0402
MI2CCLK
MI2CDATA
MDVICLK MDVIDATA MDDCCLK
R394 1K_0402
1 2
R405
1 2
1K_0402
40.2_1%_0402
MDDCDATA
DVORCOMP
R66
DVOC_D[0..11]11
+1.5VS
R62
Q8
13
D
BSN20
2
G
S
+1.5VS
AGP_BUSY#16
BLUE
BLUE#
GREEN
GREEN#
RED
RED# HSYNC VSYNC
REFSET
DDCACLK
DDCADATA
IYAM0 IYAM1 IYAM2 IYAM3
IYAP0
IYAP1
IYAP2
IYAP3
IYBM0 IYBM1 IYBM2 IYBM3
IYBP0
IYBP1
IYBP2
IYBP3
ICLKAM
ICLKAP
ICLKBM
ICLKBP
DDCPCLK
DDCPDATA
LVDS
LVREFH
LVREFL
LVBG
LIBG
DREFCLK
DREFSSCLK
LCLKCTLA LCLKCTLB
DPWR#/(NC)
DPSLP#
RSTIN#
PWROK EXTTS0
NC0 NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8
NC9 NC10 NC11
2
C9 D9 C8 D8 A7 A8 H10 J9 E8 B6 G9
G14 E15 C15 C13 F14 E14 C14 B13 H12 E12 C12 G11 G12 E11 C11 G10 D14 E13 E10 F10
B4 C5
G8 F8 A5
D12 F12
B12 A10
B7 B17 H9 C6
AA22 Y23 AD28
J11 D6
AJ1
B1 AH1 A2 AJ2 A28 AJ28 A29 B29 AH29 AJ29 AA9 AJ4
REFSET
EXTTS
LCD_DC2 LCD_DD2
R54
@0_0402
1 2
C430 22PF_0402
R57 1.5K_1%_0402
R60
1 2
@33_0402
LCLKCTLB
R63
1 2
@33_0402
PCIRST#
@22PF_0402
R64
10K_1%_0402
BLUE 14 GREEN 14 RED 14 HSYNC 14
VSYNC 14 DDCCLK 14
DDCDATA 14
TXA0- 13 TXA1- 13 TXA2- 13
TXA0+ 13 TXA1+ 13 TXA2+ 13
TXB0- 13 TXB1- 13 TXB2- 13
TXB0+ 13 TXB1+ 13 TXB2+ 13
TXACLK- 13 TXACLK+ 13 TXBCLK- 13 TXBCLK+ 13
INVT_PWM 13,27 ENABLT 13,27 ENAVDD 13
C19
1 2
@22PF_0402
CLK_MCH_48M 12 CLK_SSC_66M 12
C20
1 2
DPSLP# 3,15 PCIRST# 11,15,18,19,20,21,24,25,27
VCCcore_POK 12,30,37 +3VS
+3VS
R50 137_1%_0402
R58
510_0402
1
HOST REF VOLTAGE
5
+CPU_CORE
R71
301_1%_0402
R80
150_1%_0402
C30 .1UF_0402
1 2
+CPU_CORE +CPU_CORE
R72
49.9_1%_0402
R81
100_1%_0402
HCCVREF
C26 1UF_0402
1 2
C27
1 2
.1UF_0402
49.9_1%_0402
100_1%_0402
R74
HAVREF
C32
R83
.1UF_0402
1 2
4
+CPU_CORE
R75
49.9_1%_0402
R84
100_1%_0402
HDVREFHYSWINGHXSWING
C28 1UF_0402
1 2
C29
.1UF_0402
1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+CPU_CORE
R73
301_1%_0402
A A
R82
C31
150_1%_0402
.1UF_0402
1 2
+1.5VS
R68
80.6_1%_0402
R77
51.1_1%_0402
R85
40.2_1%_0402
NB_HI_VSWING
C23 .1UF_0402
1 2
NB_HI_VREF
C33
.1UF_0402
1 2
3
HUB I/F REF VOLTAGE
C24
1 2
0.01UF
C34
1 2
0.01UF_0402
+1.5VS
R69
1K_1%_0402
R76
1K_1%_0402
DVO REF VOLTAGE
GVREF
C25
.1UF_0402
1 2
2
I2C BUS PULL UP
MDVICLK
MDVIDATA MDDCCLK MDDCDATA
MI2CCLK
MI2CDATA
LCD_DC2
LCD_DD2
Compal Electronics, Inc.
Title
SCHEMATIC M /B LA-1571
Size Document Number Rev
Custom
401238
Date: Sheet
星期一 六月
8P4R-2.2K_0804
R70
R78 2.2K_0402
R79
R86
RP3
2.2K_0402
2.2K_0402
2.2K_0402
1
+1.5VS
18 27 36 45
+3VS
of
638, 21, 2004
1.0
Page 7
5
U4C
DDR_SMA0 DDR_SMA1 DDR_SMA2 DDR_SMA3 DDR_SMA4 DDR_SMA5 DDR_SMA6 DDR_SMA7 DDR_SMA8 DDR_SMA9 DDR_SMA10
D D
DDR_CLK09
DDR_CLK0#9
DDR_CLK19
DDR_CLK1#9
DDR_CLK39
DDR_CLK3#9
DDR_CLK49
DDR_CLK4#9
C C
DDR_CKE09,10 DDR_CKE19,10 DDR_CKE29,10
DDR_CKE39,10 DDR_SCS#09,10 DDR_SCS#19,10 DDR_SCS#29,10 DDR_SCS#39,10
B B
DDR_SMA11 DDR_SMA12
DDR_SDQS0 DDR_SDQS1 DDR_SDQS2 DDR_SDQS3 DDR_SDQS4 DDR_SDQS5 DDR_SDQS6 DDR_SDQS7
DDR_SWE# DDR_SRAS# DDR_SCAS#
DDR_SBS0 DDR_SBS1
DDR_SDM0 DDR_SDM1 DDR_SDM2 DDR_SDM3 DDR_SDM4 DDR_SDM5 DDR_SDM6 DDR_SDM7
DDR_SMA_B1 DDR_SMA_B2 DDR_SMA_B4 DDR_SMA_B5
MRCOMP MVSWINGL
MVSWINGH
Montara-GM(L)
AC18
SMA0
AD14
SMA1
AD13
SMA2
AD17
SMA3
AD11
SMA4
AC13
SMA5
AD8
SMA6
AD7
SMA7
AC6
SMA8
AC5
SMA9
AC19
SMA10
AD5
SMA11
AB5
SMA12
AG2
SDQS0
AH5
SDQS1
AH8
SDQS2
AE12
SDQS3
AH17
SDQS4
AE21
SDQS5
AH24
SDQS6
AH27
SDQS7
AD15
SDQS8
AD25
SWE#
AC21
SRAS#
AC24
SCAS#
AB2
SCK0
AA2
SCK0#
AC26
SCK1
AB25
SCK1#
AC3
SCK2
AD4
SCK2#
AC2
SCK3
AD2
SCK3#
AB23
SCK4
AB24
SCK4#
AA3
SCK5
AB4
SCK5#
AC7
SCKE0
AB7
SCKE1
AC9
SCKE2
AC10
SCKE3
AD23
SCS#0
AD26
SCS#1
AC22
SCS#2
AC25
SCS#3
AD22
SBA0
AD20
SBA1
AE5
SDM0
AE6
SDM1
AE9
SDM2
AH12
SDM3
AD19
SDM4
AD21
SDM5
AD24
SDM6
AH28
SDM7
AH15
SDM8
AD16
SMA_B1
AC12
SMA_B2
AF11
SMA_B4
AD10
SMA_B5
AC15
RCVENOUT#
AC16
RCVENIN#
AB1
SMRCOMP
AJ22
SMVSWINGL
AJ19
SMVSWINGH
MONTARA-GM(L)
MEMORY
SDQ0 SDQ1 SDQ2 SDQ3 SDQ4 SDQ5 SDQ6 SDQ7 SDQ8
SDQ9 SDQ10 SDQ11 SDQ12 SDQ13 SDQ14 SDQ15 SDQ16 SDQ17 SDQ18 SDQ19 SDQ20 SDQ21 SDQ22 SDQ23 SDQ24 SDQ25 SDQ26 SDQ27 SDQ28 SDQ29 SDQ30 SDQ31 SDQ32 SDQ33 SDQ34 SDQ35 SDQ36 SDQ37 SDQ38 SDQ39 SDQ40 SDQ41 SDQ42 SDQ43 SDQ44 SDQ45 SDQ46 SDQ47 SDQ48 SDQ49 SDQ50 SDQ51 SDQ52 SDQ53 SDQ54 SDQ55 SDQ56 SDQ57 SDQ58 SDQ59 SDQ60 SDQ61 SDQ62 SDQ63
SDQ64 SDQ65 SDQ66 SDQ67 SDQ68 SDQ69 SDQ70 SDQ71
SMVREF0
DDR REF & SWING VOLTAGE
+2.5V +2.5V +2.5V
R88
60.4_1%_0603
MRCOMP
C37
R91
.1UF_0402
1 2
A A
60.4_1%_0603
R89 604_1%_0603
MVSWINGL
R92
150_1%_0603
C38 .1UF_0402
1 2
R90 150_1%_0603
MVSWINGH
R93
C39
604_1%_0603
.1UF_0402
1 2
AF2 AE3 AF4 AH2 AD3 AE2 AG4 AH3 AD6 AG5 AG7 AE8 AF5 AH4 AF7 AH6 AF8 AG8 AH9 AG10 AH7 AD9 AF10 AE11 AH10 AH11 AG13 AF14 AG11 AD12 AF13 AH13 AH16 AG17 AF19 AE20 AD18 AE18 AH18 AG19 AH20 AG20 AF22 AH22 AF20 AH19 AH21 AG22 AE23 AH23 AE24 AH25 AG23 AF23 AF25 AG25 AH26 AE26 AG28 AF28 AG26 AF26 AE27 AD27
AG14 AE14 AE17 AG16 AH14 AE15 AF16 AF17
AJ24
4
DDR_SDQ0 DDR_SDQ1 DDR_SDQ2 DDR_SDQ3 DDR_SDQ4 DDR_SDQ5 DDR_SDQ6 DDR_SDQ7 DDR_SDQ8 DDR_SDQ9 DDR_SDQ10 DDR_SDQ11 DDR_SDQ12 DDR_SDQ13 DDR_SDQ14 DDR_SDQ15 DDR_SDQ16 DDR_SDQ17 DDR_SDQ18 DDR_SDQ19 DDR_SDQ20 DDR_SDQ21 DDR_SDQ22 DDR_SDQ23 DDR_SDQ24 DDR_SDQ25 DDR_SDQ26 DDR_SDQ27 DDR_SDQ28 DDR_SDQ29 DDR_SDQ30 DDR_SDQ31 DDR_SDQ32 DDR_SDQ33 DDR_SDQ34 DDR_SDQ35 DDR_SDQ36 DDR_SDQ37 DDR_SDQ38 DDR_SDQ39 DDR_SDQ40 DDR_SDQ41 DDR_SDQ42 DDR_SDQ43 DDR_SDQ44 DDR_SDQ45 DDR_SDQ46 DDR_SDQ47 DDR_SDQ48 DDR_SDQ49 DDR_SDQ50 DDR_SDQ51 DDR_SDQ52 DDR_SDQ53 DDR_SDQ54 DDR_SDQ55 DDR_SDQ56 DDR_SDQ57 DDR_SDQ58 DDR_SDQ59 DDR_SDQ60 DDR_SDQ61 DDR_SDQ62 DDR_SDQ63
C36 .1UF_0402
1 2
SDREF
DDR_SDQ5 DDR_SDQ4
DDR_SDQ0 DDR_SDQ2
DDR_SDQ1 DDR_SDQ6
DDR_SDQS0 DDR_SDQ7
DDR_SDQ3 DDR_SDM0
DDR_SDQ8 DDR_SDM1
DDR_SDQ12 DDR_SDQ13
DDR_SDQS1 DDR_SDQ11
DDR_SDQ9 DDR_SDQ15
DDR_SDQ10 DDR_SDQ14
DDR_SDQ21 DDR_SDQ20
DDR_SDM2
DDR_SDQ17
DDR_SDQS2 DDR_SDQ16
DDR_SDQ22 DDR_SDQ18
DDR_SDQ23 DDR_SDQ19
DDR_SDQ24 DDR_SDQ28
DDR_SDQ25 DDR_SDQ29
DDR_SDQ30 DDR_SDQ26
DDR_SDQ31 DDR_SDQ27
DDR_SMA9
DDR_SMA_B4
DDR_SMA4
DDR_SMA_B5
DDR_SMA5
DDR_SMA_B2
RP4 4P2R_10
1 4 2 3
RP7 4P2R_10
1 4 2 3
RP10 4P2R_10
1 4 2 3
RP13 4P2R_10
1 4 2 3
RP16 4P2R_10
1 4 2 3
RP19 4P2R_10
1 4 2 3
RP22 4P2R_10
1 4 2 3
RP24 4P2R_10
1 4 2 3
RP26 4P2R_10
1 4 2 3
RP28 4P2R_10
1 4 2 3
RP30 4P2R_10
1 4 2 3
RP32 4P2R_10
1 4 2 3
RP34 4P2R_10
1 4 2 3
RP36 4P2R_10
1 4 2 3
RP38 4P2R_10
1 4 2 3
RP40 4P2R_10
1 4 2 3
RP42 4P2R_10
1 4 2 3
RP44 4P2R_10
1 4 2 3
RP47 4P2R_10
1 4 2 3
RP49 4P2R_10
1 4 2 3
RP51 4P2R_10
1 4 2 3
RP5 4P2R_10
1 4 2 3
3
DDR_DQ5 DDR_DQ4
DDR_DQ0 DDR_DQ2
DDR_DQ1 DDR_DQ6
DDR_DQS0 DDR_DQ7
DDR_DQ3
DDR_DM0
DDR_DQ8
DDR_DM1
DDR_DQ12 DDR_DQ13
DDR_DQS1 DDR_DQ11
DDR_DQ9 DDR_DQ15
DDR_DQ10
DDR_DQ14
DDR_DQ21 DDR_DQ20
DDR_DM2
DDR_DQ17
DDR_DQS2 DDR_DQ16
DDR_DQ22 DDR_DQ18
DDR_DQ23 DDR_DQ19
DDR_DQ24 DDR_DQ28
DDR_DQ25 DDR_DQ29
DDR_DQ30
DDR_DQ26
DDR_DQ31
DDR_DQ27
DDR_MA9
DDR_MA_B4
DDR_MA4 DDR_MA_B5
DDR_MA5
DDR_MA_B2
Layout note
Place these resistor closely DIMM0, all trace length Max=0.75"
2
DDR_SMA1
RP6 4P2R_10
1 4 2 3
RP8 4P2R_10
1 4 2 3
RP11
4P2R_10
1 4 2 3
RP14 4P2R_10
1 4 2 3
RP23 4P2R_10
1 4 2 3
RP25 4P2R_10
1 4 2 3
RP17 4P2R_10
1 4 2 3
RP20 4P2R_10
1 4 2 3
RP27 4P2R_10
1 4 2 3
RP29 4P2R_10
1 4 2 3
RP31 4P2R_10
1 4 2 3
RP33 4P2R_10
1 4 2 3
RP35 4P2R_10
1 4 2 3
RP37 4P2R_10
1 4 2 3
RP39 4P2R_10
1 4 2 3
RP41 4P2R_10
1 4 2 3
RP43 4P2R_10
1 4 2 3
RP45 4P2R_10
1 4 2 3
RP46 4P2R_10
1 4 2 3
RP48 4P2R_10
1 4 2 3
RP50 4P2R_10
1 4 2 3
RP52 4P2R_10
1 4 2 3
RP53 4P2R_10
1 4 2 3
RP54 4P2R_10
1 4 2 3
RP55 4P2R_10
1 4 2 3
DDR_MA_B1 DDR_MA2
DDR_MA1
DDR_MA6
DDR_MA7
DDR_MA8
DDR_MA3 DDR_MA0
DDR_MA10
DDR_MA11
DDR_MA12
DDR_BS1 DDR_BS0
DDR_DQ32 DDR_DQ34DDR_SDQ34
DDR_RAS# DDR_WE#
DDR_DQ33 DDR_DQ38
DDR_DQS4
DDR_DQ37
DDR_DQ36 DDR_DQ39
DDR_CAS#
DDR_DQ35
DDR_DM5 DDR_DQ45
DDR_DQ40 DDR_DQ41
DDR_DQ44 DDR_DQS5
DDR_DQ46 DDR_DQ47
DDR_DQ43 DDR_DQ42
DDR_DQ48 DDR_DQ49
DDR_DQ53 DDR_DQS6
DDR_DQ50
DDR_DQ51 DDR_DQ52
DDR_DQ54 DDR_DQ55
DDR_DQ60
DDR_DM6
DDR_SMA_B1
DDR_SMA2
DDR_SMA6
DDR_SMA7 DDR_SMA8
DDR_SMA3 DDR_SMA0
DDR_SMA10 DDR_SMA11
DDR_SMA12
DDR_SBS1 DDR_SBS0
DDR_SDQ32
DDR_SRAS# DDR_SWE#
DDR_SDQ33 DDR_SDQ38
DDR_SDQS4 DDR_SDQ37
DDR_SDQ36 DDR_SDQ39
DDR_SCAS#
DDR_SDM4 DDR_DM4
DDR_SDQ35
DDR_SDM5
DDR_SDQ45
DDR_SDQ40 DDR_SDQ41
DDR_SDQ44 DDR_SDQS5
DDR_SDQ46 DDR_SDQ47
DDR_SDQ43 DDR_SDQ42
DDR_SDQ48 DDR_SDQ49
DDR_SDQ53 DDR_SDQS6
DDR_SDM6 DDR_SDQ50
DDR_SDQ51 DDR_SDQ52
DDR_SDQ54 DDR_SDQ55
DDR_SDQ60 DDR_SDQ57 DDR_DQ57
DDR_BS1 9,10 DDR_BS0 9,10
DDR_RAS# 9,10 DDR_WE# 9,10
DDR_CAS# 9,10
1
DDR_DM[0..7]
DDR_DQ[0..63]
DDR_DQS[0..8]
DDR_MA[0..12]
DDR_MA_B[1..2] DDR_MA_B[4..5]
RP9 4P2R_10
1 4 2 3
RP12 4P2R_10
1 4 2 3
RP15 4P2R_10
1 4 2 3
RP18 4P2R_10
1 4 2 3
RP21 4P2R_10
1 4 2 3
DDR_SDQ56 DDR_SDQS7
DDR_SDQ61 DDR_SDQ63
DDR_SDM7
DDR_SDQ59 DDR_DQ59
DDR_SDQ62 DDR_SDQ58
DDR_SDQS3
DDR_DQ56 DDR_DQS7
DDR_DQ61 DDR_DQ63
DDR_DM7
DDR_DQ62 DDR_DQ58
DDR_DQS3
DDR_DM3DDR_SDM3
DDR_DM[0..7] 9,10
DDR_DQ[0..63] 9,10
DDR_DQS[0..8] 9,10
DDR_MA[0..12] 9,10
DDR_MA_B[1..2] 9,10 DDR_MA_B[4..5] 9,10
Compal Electronics, Inc. Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR
5
4
DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
SCHEMATIC M/B LA-1571
Size Document Number Rev
Custom
401238
, 21, 2004
期一 六月
Date: Sheet
1
of
738
3B
Page 8
5
U4D
C1
VSS0
G1
VSS1
L1
VSS2
U1
VSS3
AA1
VSS4
AE1
VSS5
R2
VSS6
AG3
VSS7
AJ3
AA4
AC4
AE4
AG6
AA7 AE7
AJ7
AC8
AB9
AG9
C10
J10 AA10 AE10
D11
F11
H11 AB11 AC11
AJ11
J12 AA12 AG12
A13 D13
F13
H13 N13 R13
U13 AB13 AE13
J14
P14
T14 AA14 AC14
D15 H15 N15 R15
U15 AB15 AG15
F16 J16
P16
T16 AA16 AE16
A17 D17 H17 N17
D4
G4
K4 N4 T4
W4
B5 U5 Y5 Y6
C7 E7
G7
J7
M7
R7
H8 K8 P8 T8 V8 Y8
E9
L9 N9 R9 U9
W9
VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90
MONTARA-GM(L)
Montara-GM(L)
5
D D
C C
B B
A A
VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181
R17 U17 AB17 AC17 F18 J18 AA18 AG18 A19 D19 H19 AB19 AE19 F20 J20 AA20 AC20 A21 D21 H21 M21 P21 T21 V21 Y21 AA21 AB21 AG21 B24 F22 J22 L22 N22 R22 U22 W22 AE22 A23 D23 AA23 AC23 AJ23 F24 H24 K24 M24 P24 T24 V24 AA24 AG24 A25 D25 AA25 AE25 G26 J26 L26 N26 R26 U26 W26 AB26 A27 F27 AC27 AG27 AJ27 AC28 AE28 C29 E29 G29 J29 L29 N29 U29 W29 AA29 AJ10 AJ12 AJ18 AJ20 C22 D28 E28 L6 T9 AJ26
150UF_10V_E
150UF_10V_E
+1.2VS
CE11
+1.2VS
4
CE12
10UF_10V_1206
+1.5VS
4
CB46
+2.5VS
+3VS
3
Montara-GM(L)
J15
C44
C40
C41
.1UF_0402
.1UF_0402
1 2
1 2
R399
1_0603
R400
1_0603
0_0805
0_0805
@220UF_D2_4V_25m
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C43
C42
.1UF_0402
.1UF_0402
1 2
1 2
10UF_10V_1206
FB1
CE14 220UF_D2_4V_25m FB2
CE15
220UF_D2_4V_25m
CE18 150UF_10V_E
CE19
CE20
47UF_D2
CE22
47UF_D2
CB51
10UF_10V_1206
C45
.1UF_0402
.1UF_0402
1 2
1 2
CB48
C61 .1UF_0402
1 2
C68
.1UF_0402
1 2
CB49
10UF_10V_1206
C79 .1UF_0402
1 2
C85
C86
.1UF_0402
0.01UF_0402
1 2
1 2
CE21 10UF_16V_1206
CE23 10UF_16V_1206
C93 .1UF_0402
1 2
C46 .1UF_0402
1 2
C50
C51
.1UF_0402
.1UF_0402
1 2
1 2
C67 .1UF_0402
1 2
C73 .1UF_0402
1 2
C80
0.01UF_0402
1 2
C88 .1UF_0402
1 2
C89 .1UF_0402
1 2
3
C47 .1UF_0402
1 2
C60 .1UF_0402
1 2
C74 .1UF_0402
1 2
C90
C91
.1UF_0402
.1UF_0402
1 2
1 2
P13
T13 N14 R14 U14 P15 T15
AA15
N16 R16 U16 P17 T17
AA17 AA19
W21
H14
V1 Y1
W5
U6 U8
W8
V7 V9
D29
Y2 A6
B16
E1
J1 N1 E4
J4 M4 E6 H7
J8
L8 M8 N8 R8 K9 M9 P9
A9 B9 B8
A11 B11
G13 B14
J13
B15
F9
B10 D10 A12
A3 A4
MONTARA-GM(L)
VCC0 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17
VCCHL0 VCCHL1 VCCHL2 VCCHL3 VCCHL4 VCCHL5 VCCHL6 VCCHL7
VCCAHPLL VCCAGPLL
VCCADPLLA VCCADPLLB
VCCDVO_0 VCCDVO_1 VCCDVO_2 VCCDVO_3 VCCDVO_4 VCCDVO_5 VCCDVO_6 VCCDVO_7 VCCDVO_8 VCCDVO_9 VCCDVO_10 VCCDVO_11 VCCDVO_12 VCCDVO_13 VCCDVO_14 VCCDVO_15
VCCADAC0 VCCADAC1 VSSADAC
VCCALVDS VSSALVDS
VCCDLVDS0 VCCDLVDS1 VCCDLVDS2 VCCDLVDS3
VCCTXLVDS0 VCCTXLVDS1 VCCTXLVDS2 VCCTXLVDS3
VCCGPIO_0 VCCGPIO_1
VTTLF0 VTTLF1 VTTLF2 VTTLF3 VTTLF4 VTTLF5 VTTLF6 VTTLF7 VTTLF8
VTTLF9 VTTLF10 VTTLF11 VTTLF12 VTTLF13 VTTLF14 VTTLF15 VTTLF16 VTTLF17 VTTLF18 VTTLF19 VTTLF20
VTTHF0
VTTHF1
VTTHF2
VTTHF3
VTTHF4 VCCSM0
VCCSM1 VCCSM2 VCCSM3 VCCSM4 VCCSM5 VCCSM6 VCCSM7
POWER
VCCSM8 VCCSM9
VCCSM10 VCCSM11 VCCSM12 VCCSM13 VCCSM14 VCCSM15 VCCSM16 VCCSM17 VCCSM18 VCCSM19 VCCSM20 VCCSM21 VCCSM22 VCCSM23 VCCSM24 VCCSM25 VCCSM26 VCCSM27 VCCSM28 VCCSM29 VCCSM30 VCCSM31 VCCSM32 VCCSM33 VCCSM34 VCCSM35 VCCSM36
VCCQSM0 VCCQSM1
VCCASM0 VCCASM1
2
U4E
G15 H16 H18 J19 H20 L21 N21 R21 U21 H22 M22 P22 T22 V22 Y29 K29 F29 AB29 A26 A20 A18
C62 .1U F_0402
A22 A24 H29 M29 V29
AC1 AG1 AB3 AF3 Y4 AJ5 AA6 AB6 AF6 Y7 AA8 AB8 Y9 AF9 AJ9 AB10 AA11 AB12 AF12 AA13 AJ13 AB14 AF15 AB16 AJ17 AB18 AF18 AB20 AF21 AJ21 AB22 AF24 AJ25 AF27 AC29 AF29 AG29
AJ6 AJ8
AD1 AF1
2
C48
C49
.1UF_0402
.1UF_0402
1 2
1 2
10UF_10V_1206
C55
C56
C52
.1UF_0402
1 2
.1UF_0402
C63 .1UF_0402
C64 .1UF_0402
.1UF_0402
1 2
1 2
12
12
12
C65 .1U F_0402
C69 .1UF_0402
1 2
C75 .1UF_0402
1 2
C81 .1UF_0402
1 2
12
C66 .1UF_0402
C71
C70
.1UF_0402
.1UF_0402
1 2
1 2
C77
C76
.1UF_0402
.1UF_0402
1 2
1 2
C82
C83
.1UF_0402
.1UF_0402
1 2
1 2
C87 .1UF_0402
1 2
C92 .1UF_0402
1 2
Compal Electronics, Inc. Title
SCHEMATIC M/B LA-1571
Size Document Number Rev
Custom
Date: Sheet
CB47
C58
C57
.1UF_0402
.1UF_0402
1 2
1 2
12
C72 .1UF_0402
1 2
C78 .1UF_0402
1 2
C84 .1UF_0402
1 2
星期
R99
一六月
0_0805
CE24 47UF_D2
, 21, 2004
CB50
4.7UF_10V_0805
1
+CPU_CORE
CE13
150UF_10V_E
C59
C53 .1UF_0402
1 2
CE16
150UF_10V_E
FB4
1_0603 FB5
0_0805
C54
.1UF_0402
.1UF_0402
1 2
1 2
+2.5V
CE17 150UF_10V_E
+2.5V
+1.2VS
401238 3B
838
1
of
Page 9
5
+2.5V
JP4
1
VREF
3
DDR_DQ0 DDR_DQ3
DDR_DQS0 DDR_DQ5
D D
DDR_CLK07
DDR_CLK0#7
C C
DDR_CKE17,10
DDR_SCS#07,10 DDR_SCS#1 7,10
B B
DIMM_SMD12 DIMM_SMC12
A A
DDR_DQ1 DDR_DQ8
DDR_DQ13 DDR_DQS1
DDR_DQ14 DDR_DQ15
DDR_DQ16 DDR_DQ20
DDR_DQS2 DDR_DQ22
DDR_DQ18 DDR_DQ24
DDR_DQ25 DDR_DQS3
DDR_DQ26 DDR_DQ27
DDR_CKE1 DDR_MA12
DDR_MA9 DDR_MA7
DDR_MA5 DDR_MA3 DDR_MA1
DDR_MA10 DDR_BS0 DDR_WE# DDR_SCS#0
DDR_DQ32 DDR_DQ37
DDR_DQS4 DDR_DQ38
DDR_DQ34 DDR_DQ44
DDR_DQ40 DDR_DQS5
DDR_DQ43 DDR_DQ42
DDR_DQ52 DDR_DQ49
DDR_DQS6 DDR_DQ55
DDR_DQ50 DDR_DQ63
DDR_DQ58 DDR_DQS7
DDR_DQ56 DDR_DQ62
+3VS
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
AMP1565711-1_STANDARD 4.0
VREF
DQ12 DQ13
DQ14 DQ15
DQ20 DQ21
DQ22 DQ23
DQ28 DQ29
DQ30 DQ31
DU/RESET#
CKE0
DU/BA2
RAS# CAS#
DQ36 DQ37
DQ38 DQ39
DQ44 DQ45
DQ46 DQ47
CK1#
DQ52 DQ53
DQ54 DQ55
DQ60 DQ61
DQ62 DQ63
2 4
VSS
6
DQ4
8
DQ5
10
VDD
12
DM0
14
DQ6
16
VSS
18
DQ7
20 22
VDD
24 26
DM1
28
VSS
30 32 34
VDD
36
VDD
38
VSS
40
VSS
42 44 46
VDD
48
DM2
50 52
VSS
54 56 58
VDD
60 62
DM3
64
VSS
66 68 70
VDD
72
CB4
74
CB5
76
VSS
78
DM8
80
CB6
82
VDD
84
CB7
86 88
VSS
90
VSS
92
VDD
94
VDD
96 98 100
A11
102
A8
104
VSS
106
A6
108
A4
110
A2
112
A0
114
VDD
116
BA1
118 120 122
S1#
124
DU
126
VSS
128 130 132
VDD
134
DM4
136 138
VSS
140 142 144
VDD
146 148
DM5
150
VSS
152 154 156
VDD
158 160
CK1
162
VSS
164 166 168
VDD
170
DM6
172 174
VSS
176 178 180
VDD
182 184
DM7
186
VSS
188 190 192
VDD
194
SA0
196
SA1
198
SA2
200
DU
DIMM0
TOP SIDE
5
+2.5V
4
DDR_DQ2 DDR_DQ7
DDR_DM0 DDR_DQ4
DDR_DQ6 DDR_DQ9
DDR_DQ12 DDR_DM1
DDR_DQ11 DDR_DQ10
DDR_DQ17 DDR_DQ21
DDR_DM2 DDR_DQ19
DDR_DQ23 DDR_DQ28
DDR_DQ29 DDR_DM3
DDR_DQ30 DDR_DQ31
DDR_CKE0 DDR_MA11
DDR_MA8 DDR_MA6
DDR_MA4 DDR_MA2 DDR_MA0
DDR_BS1 DDR_RAS# DDR_CAS# DDR_SCS#1
DDR_DQ36 DDR_DQ33
DDR_DM4 DDR_DQ39
DDR_DQ35 DDR_DQ41
DDR_DQ45 DDR_DM5
DDR_DQ47 DDR_DQ46
DDR_DQ48 DDR_DQ53
DDR_DM6 DDR_DQ54
DDR_DQ51 DDR_DQ59
DDR_DQ57 DDR_DM7
DDR_DQ61 DDR_DQ60
4
SDREF
12
C95 .1UF_0402
DDR_CKE0 7,10
DDR_CLK1# 7 DDR_CLK1 7
DDR_DM[0..8]
DDR_DQ[0..63]
DDR_DQS[0..8]
DDR_MA[0..12]
DDR_MA_B[1..2] DDR_MA_B[4..5]
3
DDR_DM[0..8] 7,10
DDR_DQ[0..63] 7,10
DDR_DQS[0..8] 7,10
DDR_MA[0..12] 7,10
DDR_MA_B[1..2] 7,10 DDR_MA_B[4..5] 7,10
3
2
+2.5V
JP3
1
VREF
3
DDR_DQ2 DDR_DQ7
DDR_DQS0 DDR_DQ4
DDR_DQ6 DDR_DQ9
DDR_DQ12 DDR_DQS1
DDR_DQ11 DDR_DQ10
DDR_CLK37 DDR_CLK3#7
DDR_DQ17 DDR_DQ21
DDR_DQS2 DDR_DQ19
DDR_DQ23 DDR_DQ28
DDR_DQ29 DDR_DQS3
DDR_DQ30 DDR_DQ31
DDR_CKE37,10
DDR_BS07,10
DDR_SCS#27,10
DIMM_SMD12 DIMM_SMC12
DDR_CKE3 DDR_MA12
DDR_MA9 DDR_MA7 DDR_MA6
DDR_MA_B5 DDR_MA3 DDR_MA_B1
DDR_MA10 DDR_BS0 DDR_WE# DDR_SCS#2
DDR_DQ36 DDR_DQ33
DDR_DQS4 DDR_DQ39
DDR_DQ35 DDR_DQ41
DDR_DQ45 DDR_DQS5
DDR_DQ47 DDR_DQ46
DDR_DQ48 DDR_DQ53
DDR_DQS6 DDR_DQ54
DDR_DQ51 DDR_DQ59
DDR_DQ57 DDR_DQS7
DDR_DQ61 DDR_DQ60
+3VS
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
AMP1565619_REVERSE 5.2
VREF
DQ4 DQ5 VDD DM0 DQ6
DQ7
DQ12
VDD
DQ13
DM1
DQ14 DQ15
VDD VDD
DQ20 DQ21
VDD DM2
DQ22 DQ23
DQ28
VDD
DQ29
DM3
DQ30 DQ31
VDD
DM8 VDD
DU/RESET#
VDD VDD
CKE0
DU/BA2
VDD
RAS# CAS#
DQ36 DQ37
VDD DM4
DQ38 DQ39
DQ44
VDD
DQ45
DM5
DQ46 DQ47
VDD
CK1#
DQ52 DQ53
VDD DM6
DQ54 DQ55
DQ60
VDD
DQ61
DM7
DQ62 DQ63
VDD
VSS
VSS
VSS
VSS VSS
VSS
VSS
CB4 CB5 VSS
CB6 CB7 VSS
VSS
A11
A8
VSS
A6 A4 A2 A0
BA1
S1#
DU
VSS
VSS
VSS
CK1 VSS
VSS
VSS
SA0 SA1 SA2
DU
+2.5V
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DDR_DQ0 DDR_DQ3
DDR_DM0 DDR_DQ5
DDR_DQ1 DDR_DQ8
DDR_DQ13 DDR_DM1
DDR_DQ14 DDR_DQ15
DDR_DQ16 DDR_DQ20
DDR_DM2 DDR_DQ22
DDR_DQ18 DDR_DQ24
DDR_DQ25 DDR_DM3
DDR_DQ26 DDR_DQ27
DDR_CKE2
DDR_MA11 DDR_MA8
DDR_MA_B4 DDR_MA_B2 DDR_MA0
DDR_BS1 DDR_RAS# DDR_CAS# DDR_SCS#3
DDR_DQ32 DDR_DQ37
DDR_DM4 DDR_DQ38
DDR_DQ34 DDR_DQ44
DDR_DQ40 DDR_DM5
DDR_DQ43 DDR_DQ42
DDR_DQ52 DDR_DQ49
DDR_DM6 DDR_DQ55
DDR_DQ50 DDR_DQ63
DDR_DQ58 DDR_DM7
DDR_DQ56 DDR_DQ62
+3VS
DIMM1
BOTTOM SIDE
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
Title
Size Document Number Rev
Custom
Date: Sheet
1
SDREF
12
C94 .1UF_0402
DDR_CKE2 7,10
DDR_BS1 7,10 DDR_RAS# 7,10 DDR_CAS# 7,10DDR_WE#7,10 DDR_SCS#3 7,10
DDR_CLK4# 7 DDR_CLK4 7
SCHEMATIC M/B LA-1571
401238 3B
薑六月
1
of
938星@, 21, 2004
Page 10
5
Layout note :
Distribute as close as possible to DDR-SODIMM.
+2.5V
12
D D
C96 .1UF_0402_X5R
+2.5V
12
C107 .1UF_0402_X5R
Layout note :
Place one cap close to every 2 pull up resistors termination to +1.25V
+1.25VS
12
C C
C117 .1UF_0402_X5R
+1.25VS
12
C127 .1UF_0402_X5R
+1.25VS
12
C137 .1UF_0402_X5R
+1.25VS
12
C147
B B
.1UF_0402_X5R
+1.25VS
12
C157 .1UF_0402_X5R
+1.25VS
12
C167 .1UF_0402_X5R
A A
12
C97 .1UF_0402_X5R
12
C108 .1UF_0402_X5R
12
C118 .1UF_0402_X5R
12
C128 .1UF_0402_X5R
12
C138 .1UF_0402_X5R
12
C148 .1UF_0402_X5R
12
C158 .1UF_0402_X5R
12
C168 .1UF_0402_X5R
12
C98 .1UF_0402_X5R
12
C109 .1UF_0402_X5R
12
C119 .1UF_0402_X5R
12
C129 .1UF_0402_X5R
12
C139 .1UF_0402_X5R
12
C149 .1UF_0402_X5R
12
C159 .1UF_0402_X5R
12
C169 .1UF_0402_X5R
12
C99 .1UF_0402_X5R
12
C110 .1UF_0402_X5R
12
C120 .1UF_0402_X5R
12
C130 .1UF_0402_X5R
12
C140 .1UF_0402_X5R
12
C150 .1UF_0402_X5R
12
C160 .1UF_0402_X5R
12
C170 .1UF_0402_X5R
12
C100 .1UF_0402_X5R
12
C111 .1UF_0402_X5R
12
C121 .1UF_0402_X5R
12
C131 .1UF_0402_X5R
12
C141 .1UF_0402_X5R
12
C151 .1UF_0402_X5R
12
C161 .1UF_0402_X5R
12
C101 .1UF_0402_X5R
12
C112 .1UF_0402_X5R
12
C122 .1UF_0402_X5R
12
C132 .1UF_0402_X5R
12
C142 .1UF_0402_X5R
12
C152 .1UF_0402_X5R
12
C162 .1UF_0402_X5R
4
12
C102 .1UF_0402_X5R
+2.5V
12
+
12
C123 .1UF_0402_X5R
12
C133 .1UF_0402_X5R
12
C143 .1UF_0402_X5R
12
C153 .1UF_0402_X5R
12
C163 .1UF_0402_X5R
12
C113 @150UF_D2_6.3V
12
12
12
12
12
C103 .1UF_0402_X5R
12
C114
+
@150UF_D2_6.3V
C124 .1UF_0402_X5R
C134 .1UF_0402_X5R
C144 .1UF_0402_X5R
C154 .1UF_0402_X5R
C164 .1UF_0402_X5R
12
C104 .1UF_0402_X5R
+2.5V
+
12
C125 .1UF_0402_X5R
12
C135 .1UF_0402_X5R
12
C145 .1UF_0402_X5R
12
C155 .1UF_0402_X5R
12
C165 .1UF_0402_X5R
12
C115 150UF_D2_6.3V
12
C105 .1UF_0402_X5R
12
+
12
C126 .1UF_0402_X5R
12
C136 .1UF_0402_X5R
12
C146 .1UF_0402_X5R
12
C156 .1UF_0402_X5R
12
C166 .1UF_0402_X5R
12
C116 150UF_D2_6.3V
3
C106 .1UF_0402_X5R
2
+1.25VS +1.25VS+1.25VS
DDR_MA9
RP59 4P2R_56
14 23
RP63 4P2R_56
14 23
RP67 4P2R_56
14 23
RP71 4P2R_56
14 23
RP75 4P2R_56
14 23
RP79 4P2R_56
14 23
RP83
4P2R_56
14 23
RP87
4P2R_56
14 23
RP90
4P2R_56
14 23
RP93
4P2R_56
14 23
RP96
4P2R_56
14 23
DDR_SCS#1 7,9 DDR_SCS#0 7,9
DDR_DQ60 DDR_DQ57
DDR_DQ54 DDR_DQ55
DDR_DQ51 DDR_DQ52
DDR_DM6
DDR_DQ50
DDR_DQ53 DDR_DQS6
DDR_DQ48 DDR_DQ49
DDR_DQ43 DDR_DQ42
DDR_DQ46 DDR_DQ47
DDR_DQ44 DDR_DQS5
DDR_DQ40 DDR_DQ41
DDR_DQ45
DDR_DM[0..8]
DDR_DQ[0..63]
DDR_DQS[0..8]
DDR_MA[0..12]
DDR_MA_B[1..2] DDR_MA_B[4..5]
RP57 4P2R_56
DDR_DQ5
1 4
DDR_DQ4
2 3
RP61 4P2R_56
DDR_DQ0
1 4
DDR_DQ2
2 3
RP65 4P2R_56
DDR_DQ1
1 4
DDR_DQ6
2 3
RP69 4P2R_56
DDR_DQS0
1 4
DDR_DQ7
2 3
RP73 4P2R_56
DDR_DQ3
1 4
DDR_DM0
2 3
RP77 4P2R_56
DDR_DQ8
1 4
DDR_DM1
2 3
RP81 4P2R_56
DDR_DQ12
1 4
DDR_DQ13
2 3
RP85 4P2R_56
DDR_DQS1
1 4
DDR_DQ11
2 3
RP88 4P2R_56
DDR_DQ9
1 4
DDR_DQ15
2 3
RP91 4P2R_56
DDR_DQ10
1 4
DDR_DQ14
2 3
RP94 4P2R_56
DDR_DQ21
1 4
DDR_DQ20
2 3
RP97 4P2R_56
DDR_DM2
1 4
DDR_DQ17
2 3
RP99 4P2R_56
DDR_DQS2
1 4
DDR_DQ16
2 3
RP101 4P2R_56
DDR_DQ22
1 4
DDR_DQ18
2 3
RP103 4P2R_56
DDR_DQ23
1 4
DDR_DQ19
2 3
RP105 4P2R_56
DDR_DQ24 DDR_DQ28
RP107 4P2R_56
DDR_DQ25 DDR_DQ29
DDR_CKE27,9 DDR_CKE37,9
DDR_SCS#27,9 DDR_SCS#37,9
DDR_CKE07,9 DDR_CKE17,9
DDR_CKE2 DDR_CKE3
DDR_SCS#2 DDR_SCS#3
DDR_CKE0 DDR_CKE1
RP109 4P2R_56
1 4 2 3
RP110 4P2R_56
1 4 2 3
RP111
4P2R_56
1 4 2 3
RP58 4P2R_56
DDR_MA_B1
14
DDR_MA2
23
RP62 4P2R_56
DDR_MA1
14
DDR_MA6
23
RP66 4P2R_56
DDR_MA7
14
DDR_MA8
23
RP70 4P2R_56
DDR_MA3
14
DDR_MA0
23
RP74 4P2R_56
DDR_MA10
14
DDR_MA11
23
RP78 4P2R_56
DDR_MA12
14 23
RP82 4P2R_56
RP86 4P2R_56
RP89 4P2R_56
RP92 4P2R_56
RP95 4P2R_56
RP98 4P2R_56
RP100 4P2R_56
RP102 4P2R_56
RP104 4P2R_56
RP106 4P2R_56
14 23
14 23
DDR_DQ32
14
DDR_DQ34
23
DDR_DQ33
14
DDR_DQ38
23
DDR_DQS4
14
DDR_DQ37
23
DDR_DQ36
14
DDR_DQ39
23
DDR_DM4 DDR_DM5
14
DDR_DQ35
23
DDR_DQ30
14
DDR_DQ26
23
DDR_DQ31
14
DDR_DQ27
23
14
DDR_MA_B4
23
DDR_MA4
14
DDR_MA_B5
23
DDR_MA5
14
DDR_MA_B2
23
RP108
DDR_SCS#1
14
DDR_SCS#0
23
4P2R_56
1
RP56 4P2R_56
DDR_DQ56
14
DDR_DQS7
23
RP60 4P2R_56
DDR_DQ61
14
DDR_DQ63
23
RP64
4P2R_56
DDR_DM7
14
DDR_DQ59
23
RP68
4P2R_56
DDR_DQ62
14
DDR_DQ58
23
RP72 4P2R_56
DDR_DQS3
14
DDR_DM3
23
RP76
4P2R_56
DDR_BS0
14
DDR_BS1
23
RP80 4P2R_56
14
DDR_RAS#
23
RP84 4P2R_56
DDR_WE#
14
DDR_CAS#
23
Layout note Place these resistor
closely DIMM1, all trace length<=800mil
DDR_DM[0..8] 7,9
DDR_DQ[0..63] 7,9
DDR_DQS[0..8] 7,9
DDR_MA[0..12] 7,9
DDR_MA_B[1..2] 7,9 DDR_MA_B[4..5] 7,9
DDR_BS0 7,9 DDR_BS1 7,9
DDR_RAS# 7,9
DDR_WE# 7,9 DDR_CAS# 7,9
Compal Electronics, Inc. Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR
5
4
DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
SCHEMAT I C M / B LA- 1571
Size Docu m e n t N u mb er Re v
401238 3B
C
Date: Sheet
星期一 六月
, 2004
1
of
10 38, 21
Page 11
A
4 4
B
C
D
E
DVOC_D[0..11]6
DVOC_CLK#6
DVOC_CLK6
DVOBC_CLKINT6
3 3
D
S
R111
33_0402
13
G
2
Q10
BSN20
D
S
13
G
2
R107
1.2K_0402
12
12
1.2K_0402
R108
I2C Address = 1110110X
+3VS
+3VS
MI2CDATA6
MI2CCLK6
+3VS
2 2
Q9
BSN20
1 2
DVOC_HSYNC6
DVOC_VSYNC6
PCIRST#6,15,18,19,20,21,24,25,27
R106 @8.2k_0603
R109 330_0603
C182
0.1UF_0402
DVOC_D11 DVOC_D10 DVOC_D9 DVOC_D8 DVOC_D7 DVOC_D6 DVOC_D5 DVOC_D4 DVOC_D3 DVOC_D2 DVOC_D1 DVOC_D0
R104 0_0603
R409
1 2
1K_1%_0402
R110
140_1%_0603
+1.5VS
R112
1K_1%_0603
R113
1K_1%_0603
U7
50 51 52 53 54 55 58 59 60 61 62 63
56 57
2
46
4
5 13 14
15
7
8 10 35 19
3
CH7011
D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
XCLK* XCLK
NC Pout/DET# H
V RESET* SD
SC GPIO1
GPIO0 AS ISET NC VREF
NC21NC22NC24NC25NC27NC28NC30NC
XI/FIN
42
14.31818MHz_20PPM
C180
22P_0402
31
CVBS/B/U
XO
43
BCO
C/H Sync
CVBS
C/R/V
DVDD0 DVDD1 DVDD2
DGND0 DGND1 DGND2
DVDDV
AVDD0
AVDD1 AGND0 AGND1 AGND2
VDD GND0 GND1
C181 22P_0402
9
NC
47
R103
48 36 37
Y/G
38 39 1
12 49
6 11 64
45 23
NC
29
NC
20
NC
26
NC
32
NC
18 44 16 17 41 33 34 40
R435
+1.5VS
75_1%_0603
75_1%_0603
C178
0.1UF_0402
LUMA 14 CRMA 14 COMPS 14
C172
0.1UF_0402
C176
0.1UF_0402
+3VS
C179 10UF_16V_1206
C173
0.1UF_0402
+3VS
C177
10UF_16V_1206
+3VS
C174
10UF_16V_1206
1 1
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
SCHEMATIC M/B LA-1571
Size Document Number Rev
401238
Date: Sheet
星期一
21, 2004
六月
11 38,
E
of
Page 12
A
+12VS
+3VS
R114
10K_0402
1 2 2
G
1 2
1 1
1 3
Q11 2N7002
DIMM_SMC
D
S
+12VS
+3VS
R117
10K_0402
1 2 2
G
1 2
2N7002
1 3
D
Q12
S
SMB_DATA15 DIMM_SMD 9
2 2
3 3
R116 10K_0402
R118
10K_0402
DIMM_SMD
B
C
D
E
F
G
H
Clock Generator
+3VS
R115 0_0603
1 2
DIMM_SMC 9SMB_CLK15
12
SLP_S1#16,27 STP_PCI#16
STP_CPU#16,37
+3VS
1 2
12
C203 @10PF_0402
C191 10PF_0402
1 2
1 2
C194 10PF_0402
R121
1 2
1 2
R395 10K_0402
R131 10K_0402
DIMM_SMD DIMM_SMC
R136 33_0402
R137
R140 33_0402
33_0402
R142
R144 33_0402 R146 33_0402
12
C204
1 2
1 2
475_1%_0402
1 2
1 2
1 2
1 2 1 2
XTALIN
12
XTALOUT
10K_0402
_MCH_48M
Y2
14.318MHZ
@10PF_0402
2
3
40 55 54
25 34 53
28
43
29 30
33 35
42
39
38
56
CY28346-2
+3VS
R119
10K_0402
+3VS
+3VS
12
R125
12
R127
10K_0402
10K_0402
13
D
Q13
VCCcore_POK6,30,37
2
G
2N7002
S
C195
1000PF_0402
CLK_SSC_66M6
CLK_ICH_48M16
CLK_MCH_48M6
CLK_ICH_14M16 CLK_14M_SIO25
CLK_MCH_48M
12
C202 @10PF_0402
U8
XTAL_IN
XTAL_OUT
SEL2 SEL1 SEL0
PWR_DWN# PCI_STOP# CPU_STOP#
VTT_PWRGD#
MULT0
SDATA SCLK
3V66_0 3V66_1/VCH_CLK
IREF
48MHZ_USB
48MHZ_DOT
REF
+3V_CLK
Width=40 mils
32
37
14
1
VDD_PCI8VDD_PCI
VDD_REF
VDD_3V6619VDD_3V66
GND_REF4GND_PCI9GND_PCI15GND_3V6620GND_3V6631GND_48MHZ36GND_IREF41GND_CPU
12
+
10UF_16V_1206
50
VDD_CPU46VDD_CPU
VDD_48MHZ
47
C183
VDDA
VSSA
CPUCLKT2
CPU_CLKC2
CPUCLKT1
CPUCLKC1 CPUCLKT0
CPUCLKC0
3V66_5
3V66_4 3V66_3 3V66_2
PCICLK_F2 PCICLK_F1 PCICLK_F0
PCICLK6 PCICLK5 PCICLK4 PCICLK3 PCICLK2 PCICLK1 PCICLK0
12
12
C185
C184
0.1UF_0402
0.1UF_0402
+3V_VDD
26
12
C193
0.1UF_0402
27
CLK_BCLK
45
44 49
48 52
51 24
23 22 21
7
C198 1000PF_0402
6 5
18 17 16 13 12 11 10
R120 33_0402
CLK_BCLK#
R124 33_0402
CLK_MCH
R126 33_0402
CLK_MCH#
R130
CLK_ITP
R132
CLK_ITP#
C196 1000PF_0402
1 2 1 2
C197 1000PF_0402
MCH_66M ICH_66M
PCI_ICH
1 2
C199 1000PF_0402
1 2
PCI_1394 PCI_LAN
PCI_PCM PCI_MINI PCI_SIO PCI_LPC
12
12
C186
C187
L3 CHB2012U121
1 2
C192 10UF_16V_1206
0.1UF_0402
0.1UF_0402
12
+
1 2
1 2 1 2
33_0402
1 2
33_0402
1 2
R135 33_0402
1 2
R138 33_0402
1 2
R139 33_0402
1 2
R141 33_0402
1 2
R143 33_0402
1 2
R145 33_0402
1 2
R147 33_0402
1 2
R149 33_0402
1 2
R150 33_0402
1 2
R151 33_0402
1 2
12
C188
0.1UF_0402
+3VS
R122
49.9_1%_0402
1 2 1 2
R123
49.9_1%_0402
R128
49.9_1%_0402
1 2 1 2
R129
49.9_1%_0402
12
C189
0.1UF_0402
12
C200 @10PF_0402
12
C190
0.1UF_0402
12
C201 @10PF_0402
CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3 CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6 CLK_CPU_ITP 3
CLK_CPU_ITP# 3
CLK_MCH_66M 6 CLK_ICH_66M 15
CLK_PCI_ICH 15
CLK_PCI_1394 20 CLK_PCI_LAN 19
CLK_PCI_PCM 21 CLK_PCI_MINI 24 CLK_PCI_SIO 25 CLK_PCI_LPC 27
SEL2 SEL1 SEL0 CPUCLKC[0..2] CPUCLKT[0..2]
0 0 0 166.67 166.67 0 0 1 100.00 100.00 0 1 0 200.00 200.00 0 1 1 133.33 133.33
4 4
Compal Electronics, Inc.
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
C
D
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
E
F
SCHEMATIC M/ B LA-1571
Size Document Number Rev
B
401238
Date: Sheet
星期一 六月
G
of
12 38, 21, 2004
H
3B
Page 13
5
4
3
2
1
LCD CONN
LCDVDD_C
12
C206
0.1UF_0402
JP5
1
21
2
22
3
23
4
24
5
25
6
26
7
27
8
28
9
29
10
30
11
31
12
32
13
33
14
34
15
35
16
36
17
37
18
38
19
39
20
40
JST BM40B-SRDS
LCDVDD_C
FB3
TXA0-
TXA0+
TXA1­TXA1+
TXB0­TXB0+
TXBCLK­TXBCLK+
PID0
PID2 PID3
+
10UF_10V_1206
PID1
CB52
TXA0-6
D D
C C
TXA0+6 TXA1-6
TXA1+6 TXB0-6
TXB0+6 TXBCLK-6
TXBCLK+6
LCDVDD
FBM-L11-201209-221
LCD POWER CIRCUIT
+12VALW
R153
B B
LCDVDD +12VALW
12
R154
100_0402
13
2
Q15
2N7002
13
R156 100K_0402
100K_0402
R155
150K_0402
13
Q16
2
2N7002
TXA2­TXA2+
TXACLK­TXACLK+
TXB1­TXB1+
TXB2­TXB2+
DISPOFF#
INVT_B+
12
C205 68PF_0402
BKOFF#27
ENABLT6,27
LCDVDD
C208
0.047UF_0402
L4
12
FBM-L11-201209-221
D5 RB751V
D6
+
C207
0.1UF_0402
CB54
4.7UF_10V_0805
TXA2- 6 TXA2+ 6
TXACLK- 6 TXACLK+ 6
TXB1- 6 TXB1+ 6
TXB2- 6 TXB2+ 6
LCDVDD_C DAC_BRIG 27
INVT_PWM 6,27
B+
+3VS
21
21
RB751V
Q14
SI2302DS
13
2
CB53
4.7UF_10V_0805
R152
4.7K_0402
DISPOFF#
+3VS
+
PANEL ID switch
PID016 PID116 PID216 PID316
PID3 PID2 PID1 PID0
PID0 PID1 PID2 PID3
RP112
4 5 3 6 2 7 1 8
8P4R_10K_0804
SW1
4 3 2 1
SW DIP-4
+3VS
5 6 7 8
ENAVDD6
A A
ENAVDD
5
22K
2
22K
Q17 DTC124EK
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
3
2
SCHEMATIC M/B LA-1571
Size Document Number Rev
401238
Date: Sheet
星期一
21, 2004
六月
13 38,
1
of
Page 14
A
B
C
D
E
D10
DAN217
2
+1.5VS
1
3
D13
DAN217
1
2
S-Video
+5VS
C218
100PF_0402
D_VSYNC 29
D_HSYNC 29
+3VS
3
JP7
1 2 3 4 5 6 7
S CONN._suyin
POLYSWITCH_0.5A
MSEN#27,29
DDC_MD2
D_DDCDATA29
D_DDCCLK29
12
F1
D9
2 1
RB411D
0.1UF_0402
C219
220PF_0402
PAD_3.2X2.2MM
C209
12
PAD1
1
12
H6 HOLEA
1
H11 HOLEA
1
FM3
1
12
C220 220PF_0402
1
H12 HOLEA
CF1
W=40mils
6
11
1 7
12
2 8
13
3 9
14
4 10 15
5
1
1
1
CF171CF18
CRTVDD
JP6 CRT-15P
BSN20
Q21
D
1 3
G
2
PAD2
PAD_3.2X2.2MM
H2
H8
HOLEA
HOLEA
1
1
H13
H17
HOLEA
HOLEA
1
1
FM4
1
CF4
1
1
1
Q19 BSN20
D
1 3
2
S
1
H10 HOLEA
FM5
CF6
1
CF13
+3VS
R157 10K
S
G
R166
1 2
10K
1
H18 HOLEA
1
CF2
CF15
1
12
H9 HOLEA
1
H19 HOLEA
1
1
12
R158 10K
DDCDATA 6
DDCCLK 6
+3VS
H4
H3 HOLEA
1
H20 HOLEA
1
FM1
CF3
1
CF16
1
H5
HOLEA
HOLEA
1
1
H21
H22
HOLEA
HOLEA
1
1
FM2
1
1
CF8
CF7
1
CF11
CF12
1
1
H24
H25
HOLEA
HOLEA
1
1
H23 HOLEA
1
1
FM6
CF9
1
H15
H14 HOLEA
1
CF10
1
HOLEA
1
H16 HOLEA
1
3
12
1
12
C214 18PF_0402
C216 68PF_0402
3
12
D8
DAN217
1
2
12
C217 68PF_0402
D12
DAN217
1
2
C226 270PF_0402
3
3
12
12
C215 18PF_0402
C227 270PF_0402
CRT Connector
1 1
RED6
GREEN6
BLUE6
R159
75_1%_0603
HSYNC6
VSYNC6
2 2
R162
10K
+3VS +5VS
12
75_1%_0603
12
12
R160
12
R163
10K
+3VS
@@@
12
12
C210
R161
@22PF_0402
75_1%_0603
D
S
13
Q18
G
BSN20
1 2
R167
S
2
Q20
G
BSN20
10K
12
D
13
2
10K
D_BLUE29 D_GREEN29 D_RED29
C211 @22PF_0402
12
R164
FCM2012C-800_0805
FCM2012C-800_0805
FCM2012C-800_0805
12
C212 @22PF_0402
1 2
1 2
12
R165
10K
L5
1 2
L6
1 2
L7
1 2
R403 33_0402 R404 33_0402
D7
DAN217
2
12
C213 18PF_0402
L8
1 2
FBM-11-160808-121
L9
1 2
FBM-11-160808-121
DAN217
1
D11
TV-Out Connector
2
C224
D_LUMA29 D_CRMA29
1 2
C221 33PF_0402
L10
1 2
FBM-11-160808-121
1 2
C222 33PF_0402
L11
1 2
FBM-11-160808-121
1 2
C429 33PF_0402
1 2
FBM-11-160808-121 L35
12
C225 100PF_0402
3 3
LUMA11
CRMA11
COMPS11
LUMA
CRMA
COMPS
R168
75_1%_0603
12
75_1%_0603
12
R169
12
R170
75_1%_0603
12
100PF_0402
C223
12
100PF_0402
4 4
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR
A
B
DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
SCHEMATIC M /B LA- 1571
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
401238
, 21, 2004
星期一 六月
14 38
E
3B
of
Page 15
A
B
C
D
U9A
AD0
1 1
2 2
+3VS
+3VS
3 3
4 4
+3VS
SW_PCIRST#28
CLK_PCI_ICH
PERR# AC_IN STOP# SERR#
IRDY# TRDY#
FRAME#
+3VS
R432 51K_0402
330K_0402
12
12
PCI Pullups
RP113
1 2 3 4 5
10P8R-8.2K
RP114
1 2 3 4 5
10P8R-8.2K
8P4R-8.2K_0402
RP115
1 8 2 7 3 6 4 5
1 2
R181 8.2K_0402
SB_PCIRST#
12
12
12
R434
A
R173 @22_0402
C228 @10PF_0402
10 9 8 7 6
10 9 8 7 6
+3VS
1 2
C432
1U_0402
REQ#0 REQ#1 REQ#2 REQ#3
REQB#
5
U35
3
74AHC1G08
PIRQA# PIRQB# REQ#4
PIRQC# PIRQD#DEVSEL# SIRQ PLOCK#
R430 0_0402
R431 @0_0402
4
+3VS
+3VS
1 2
1 2
R433
@0_0402
AD[0..31]19,20,21,24
AD[0..31]
CBE#019,20,21,24 CBE#119,20,21,24 CBE#219,20,21,24 CBE#319,20,21,24
REQ#020 REQ#124 REQ#221 REQ#319 REQ#424
GNT#020 GNT#124 GNT#221 GNT#319 GNT#424
CLK_PCI_ICH12
FRAME#19,20,21,24
DEVSEL#19,20,21,24
IRDY#19,20,21,24
PAR19,20,21,24
PERR#19,20,21,24
SERR#19,21,24
STOP#19,20,21,24 TRDY#19,20,21,24
ACIN27,32,35
PDD_RST#18 SDD_RST#18
+3VS
U36
12
1 2 3 4
1A
VCC
3Y
1Y
2A
3A
GND
2Y
@74HC3G14DP
8 7 6 5
B
C/BE#0 C/BE#1 C/BE#2 C/BE#3
REQ#0 REQ#1 REQ#2 REQ#3 REQ#4
CLK_PCI_ICH FRAME#
DEVSEL# IRDY#
PERR# PLOCK#
SB_PCIRST# SERR# STOP# TRDY#
RB751VD14
21
REQB#
H5
AD1
J3
AD2
H3
AD3
K1
AD4
G5
AD5
J4
AD6
H4
AD7
J5
AD8
K2
AD9
G2
AD10
L1
AD11
G4
AD12
L2
AD13
H2
AD14
L3
AD15
F5
AD16
F4
AD17
N1
AD18
E5
AD19
N2
AD20
E3
AD21
N3
AD22
E4
AD23
M5
AD24
E2
AD25
P1
AD26
E1
AD27
P2
AD28
D3
AD29
R1
AD30
D2
AD31
P4
J2 K4
M4
N4 B1
A2 B3 C7 B6
C1 E6 A7 B7 D6
P5 F1
M3
L5
G1
L4 M2 W2
U5
K5
F3
F2
AC_IN
B5
A6
E8
C5
PCIRST# 6,11,18,19,20,21,24,25,27
ICH4-M
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE#0 C/BE#1 C/BE#2 C/BE#3
REQ#0 REQ#1 REQ#2 REQ#3 REQ#4
GNT#0 GNT#1 GNT#2 GNT#3 GNT#4
PCICLK FRAME#
DEVSEL# IRDY# PAR PERR# LOCK# PME# PCIRST# SERR# STOP# TRDY#
REQA#/GPI0 REQB#/GPI1/REQ5# GNTA#/GPO16 GNTB#/GPO17/GNT5#
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PCI I/F
ICH4-M
SM I/F
SMB_ALERT#/GPI11
CPU I/F
CPU_PWRGOOD
HUB I/F
HUB_VSWING
PIRQE#/GPI2
PIRQF#/GPI3 PIRQG#/GPI4 PIRQH#/GPI5
Interrupt I/F
EEPROM I/F
LAN I/F
LAN_RSTSYNC
INTRUDER#
SMLINK0 SMLINK1
SMB_CLK
SMB_DATA
A20GATE
A20M#
DPSLP#
FERR#
IGNNE#
INIT#
RCIN#
SLP#
STPCLK#
CLK66
HI_STB
HI_STB# HICOMP
HUB_VREF
APICCLK
APICD0 APICD1 PIRQA# PIRQB# PIRQC# PIRQD#
IRQ14 IRQ15
SERIRQ
EE_CS
EE_IN
EE_OUT
EE_SHCLK
LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2
LAN_CLK
LAN_RST#
INTR
NMI
SMI#
HI10 HI11
INTRUDER#
W6
SMLINK0
AC3
SMLINK1
AB1
SMB_CLK
AC4
SMB_DATA
AB4 AA5
Y22 AB23 U23 AA21 W21 V22 AB22 V21 Y23 U22 U21 W23 V23
HI_D0
L19
HI0
HI_D1
L20
HI1
HI_D2
M19
HI2
HI_D3
M21
HI3
HI_D4
P19
HI4
HI_D5
R19
HI5
HI_D6
T20
HI6
HI_D7
R20
HI7
HI_D8
P23
HI8
HI_D9
L22
HI9
HI_D10
N22 K21
1 2
CLK_HUB_66M
T21 P21
N20 R23
SB_HI_VREF
M23
SB_HI_VSWING
R22
APICCLK
J19
APICD0
H19
APICD1
K20
PIRQA#
D5
PIRQB#
C2
PIRQC#
B4
PIRQD#
A3
PIRQE#
C8
PIRQF#
D7
PIRQG#
C3
PIRQH#
C4
IDEIRQ14
AC13
IDEIRQ15
AA19
SIRQ
J22
D10 D11 A8
1 2
R182
C12
@1K_0402
A10 A9 A11 B10 C10 A12 C11 B11 Y5
1 2
R185 10K_0402
C
100K_0402
R171
1 2
1 2
R425 8.2K_0402
HI_D[0..10]
R176 56_0402
+RTCVCC
+3VALW
SM BUS
SMB_CLK 12
SMB_DATA 12
GATEA20 27 A20M# 3 DPSLP# 3,6 FERR# 3 IGNNE# 3 INIT# 3 INTR 3 NMI 3 CPUPWRGD 3 RC# 27 CPUSLP# 3 SMI# 3 STPCLK# 3
HI_D[0..10] 6
CLK_ICH_66M 12 HI_PSTRB 6
HI_PSTRB# 6
PIRQA# 20
PIRQD# 19 PIRQE# 21 PIRQF# 21 PIRQG# 24 PIRQH# 24 IDEIRQ14 18 IDEIRQ15 18 SIRQ 21,25,27
SMLINK0 SMLINK1
+1.5VS
R177
48.7_1%_0402
1 2
R172
1 2
R175
HL REF & SWING VOLTAGE
+1.5VS
R178
80.6_1%_0402
SB_HI_VSWING
R179
51.1_1%_0402
R180
40.2_1%_0402
INT I/F
IDEIRQ14 IDEIRQ15
PIRQE# PIRQF# PIRQG# PIRQH#
APICCLK
APICD0
APICD1
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC M/B LA-1571
401238
星期一 六月
1 2
R183 8.2K_0402
1 2
R184 8.2K_0402
RP116
1 8 2 7 3 6 4 5
8P4R-8.2K
R186 R187
R188
D
4.7K_0402
4.7K_0402
C230
0.1UF_0402
1 2
SB_HI_VREF
C232
0.1UF_0402
1 2
56_0402
12
10K_0402
12 12
10K_0402
15 38, 21, 2004
+3VALW
C231
0.01UF_0402
1 2
C233
0.01UF_0402
1 2
+3VS
of
3B
Page 16
A
R190 10K_0402
1 2
1 1
PM_POK30 PM_RSMRST#21,22,27
2 2
3 3
4 4
2 1
D31 RB751V
12
R396
4.7K_0402
+3VS
AGP_BUSY#6
+3VALW
PM_BATLOW#27
+3VS
PM_CLKRUN#21,24,25,27
PM_DPRSLPVR37
PWRBTN_OUT#27
SWI#27
SLP_S1#12,27 SLP_S3#27 SLP_S4#27
SLP_S5#27
STP_CPU#12,37 STP_PCI#12
RTCCLK6 SUS_STAT#28
EC_THERM#27
+3VS
PM_SSMUXSEL37 CPUPERF#3
VGATE30
AC97_BCLK23,24
AC97_RST#23,24 AC97_SDIN023 AC97_SDIN123 AC97_SDIN224
+3VS
AC97_SDOUT23,24
AC97_SYNC23,24
LAD025,27
LAD125,27
LAD225,27
LAD325,27
LDRQ#125
LFRAME#25,27
USB0_D+29
USB0_D-29
USB1_D+23
USB1_D-23
USB2_D+29
USB2_D-29
USB3_D+29
USB3_D-29
USB4_D+29
USB4_D-29
USB5_D+26
USB5_D-26
OC#029
+3VALW
OC#229 OC#329 OC#429
+3VALW
PID013 PID113 PID213 PID313
FDD_DET#26
+3VS
D15 RB751V
1 2
R193 10K_0402
C235
12
10PF_0402
R197
R200
22.6_1%_0603 RP117 8P4R-1K_0804
10K_0402
R429
1 2
R191 10K_0402
1 2
R192 10K_0402
RTCCLK
21
12
R195
IAC_SDATAI0 IAC_SDATAI1 IAC_SDATAI2
R196 @10K
1 2 1 2
1 2
R198 33_0402
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
LPC_FRAME#
R413 10K_0402
R199 10K_0402
12
1 8 2 7 3 6 4 5
12
1K_0402
R428
12
10_0402
33_0402
12
12
U9B
R2
AGPBUSY#
Y3
SYSRST#
AB2
BATLOW#
T3
C3_STAT#
AC2
CLKRUN#
V20
DPRSLPVR
AA1
PWRBTN#
AB6
PWROK
Y1
RI#
AA6
RSMRST#
W18
SLP_S1#
Y4
SLP_S3#
Y2
SLP_S4#
AA2
SLP_S5#
W19
STP_CPU#
Y21
STP_PCI#
AA4
SUS_CLK
AB3
SUS_STAT#/LPCPD#
V1
THRM#
J21
SSMUXSEL
Y20
CPUPERF#
V19
VGATE/VRMPWRGD
B8
AC_BITCLK
C13
AC_RST#
D13
AC_SDATAIN0
A13
AC_SDATAIN1
B13
AC_SDATAIN2
D9
AC_SDATAOUT
C9
AC_SYNC
T2
LPC_AD0
R4
LPC_AD1
T4
LPC_AD2
U2
LPC_AD3
U3
LPC_DRQ#0
U4
LPC_DRQ#1
T5
LPC_FRAME#
C20
USBP0+
D20
USBP0-
A21
USBP1+
B21
USBP1-
C18
USBP2+
D18
USBP2-
A19
USBP3+
B19
USBP3-
C16
USBP4+
D16
USBP4-
A17
USBP5+
B17
USBP5-
B15
OC#0
C14
OC#1
A15
OC#2
B14
OC#3
A14
OC#4
D14
OC#5
A23
USB_RBIAS
B23
USB_RBIAS#
J20
GPIO32
G22
GPIO33
F20
GPIO34
G20
GPIO35
F21
GPIO36
H20
GPIO37
F23
GPIO38
H22
GPIO39
G23
GPIO40
H21
GPIO41
F22
GPIO42
E23
GPIO43
ICH4-M
B
AC97 I/F
LPC I/F
USB I/F
ICH4-M
PM
IST
GPIO
GPIO
PDDACK#
IDE I/F
SDDACK#
RTCRST#
CLOCK
MISC
THRMTRIP#
GPI7
GPI8 GPI12 GPI13
GPIO25 GPIO27 GPIO28
PDA0 PDA1
PDA2 PDCS1# PDCS3#
PDDREQ
PDIOR# PDIOW# PIORDY
PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8
PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
SDA0 SDA1
SDA2 SDCS1# SDCS3#
SDDREQ
SDIOR# SDIOW# SIORDY
SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8
SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
CLK14 CLK48
VBIAS RTCX1 RTCX2
SPKR
+3VS
R3 V4 V5 W3 V2 W1 W4
AA13 AB13 W13 Y13 AB14
AA11 Y12 AC12 W12 AB12
AB11 AC11 Y10 AA10 AA7 AB8 Y8 AA8 AB9 Y9 AC9 W9 AB10 W10 W11 Y11
AA20 AC20 AC21 AB21 AC22
AB18 AB19 Y18 AA18 AC19
W17 AB17 W16 AC16 W15 AB15 W14 AA14 Y14 AC15 AA15 Y15 AB16 Y16 AA17 Y17
J23 F19
W7 Y6 AC7 AC6
H23 W20
1 2
EC_SMI#
EC_LID_OUT#
SCI#
1 2
R426 10K_0402
1 2
R427 1K_0402
PD_D0 PD_D1 PD_D2 PD_D3 PD_D4 PD_D5 PD_D6 PD_D7 PD_D8 PD_D9 PD_D10 PD_D11 PD_D12 PD_D13 PD_D14 PD_D15
SD_D0 SD_D1 SD_D2 SD_D3 SD_D4 SD_D5 SD_D6 SD_D7 SD_D8 SD_D9 SD_D10 SD_D11 SD_D12 SD_D13 SD_D14 SD_D15
R202
1 2
@33_0402
R204
1 2
@33_0402
RTC_RST# VBIAS
RTCX1 RTCX2
SPKR
R209 @1K_0402
R211
1 2
56_0402
R189 10K_0402
C236
1 2
1 2
EC_SMI# 27 LID_OUT# 27 SCI# 27 FLASH# 28
PD_A0 18 PD_A1 18 PD_A2 18 PD_CS#1 18 PD_CS#3 18
PD_DREQ 18 PD_DACK# 18 PD_IOR# 18 PD_IOW# 18 PD_IORDY 18
SD_A0 18 SD_A1 18 SD_A2 18 SD_CS#1 18 SD_CS#3 18
SD_DREQ 18 SD_DACK# 18 SD_IOR# 18 SD_IOW# 18 SD_IORDY 18
@22PF_0402 C238
@22PF_0402
12
+CPU_CORE
C
+3VALW
PD_D[0..15]
SD_D[0..15]
SB_SPKR 23
+3VS
SB_THERMTRIP# 3
PD_D[0..15] 18
SD_D[0..15] 18
CLK_ICH_14M 12 CLK_ICH_48M 12
1 2
10M_0402
12
C240
12PF_0402
R206
X1
32.768KHZ
J1 JOPEN
12
C241
12
1 2
R207 10M
12PF_0402
1 2
R203 1K_0402
1 2
R210 @2.4M
RTC Battery
BATT1
-+
RTCBATT
R201
1 2
12
C237
180K_0603
0.1UF_0402
R_VBIAS
1 2
.047UF_0603
R208 @22M
C239
1 2
R205 1K_0402
12
12
+RTCVCC
+RTCVCC
D
RTCPWR
RTCPWR
3
1
D16
PH_BAS4004
2
CHGRTC
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC M/B LA-1571
401238
星期一 六月
D
16 38, 21, 2004
3B
of
Page 17
A
B
C
D
E
F
G
H
U9C
VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101
ICH4-M
VCCSUS3.3_0 VCCSUS3.3_1 VCCSUS3.3_2 VCCSUS3.3_3 VCCSUS3.3_4 VCCSUS3.3_5 VCCSUS3.3_6 VCCSUS3.3_7 VCCSUS3.3_8 VCCSUS3.3_9
POWERGND
VCCSUS1.5_0 VCCSUS1.5_1 VCCSUS1.5_2 VCCSUS1.5_3 VCCSUS1.5_4 VCCSUS1.5_5 VCCSUS1.5_6 VCCSUS1.5_7
VCC5REFSUS1
VCC_CPU_IO_0 VCC_CPU_IO_1 VCC_CPU_IO_2
VCCLAN3.3_0 VCCLAN3.3_1
VCCLAN1.5_0 VCCLAN1.5_1
VCC3.3_0 VCC3.3_1 VCC3.3_2 VCC3.3_3 VCC3.3_4 VCC3.3_5 VCC3.3_6 VCC3.3_7 VCC3.3_8
VCC3.3_9 VCC3.3_10 VCC3.3_11 VCC3.3_12 VCC3.3_13 VCC3.3_14 VCC3.3_15
VCC1.5_0
VCC1.5_1
VCC1.5_2
VCC1.5_3
VCC1.5_4
VCC1.5_5
VCC1.5_6
VCC1.5_7
VCC5REF1 VCC5REF2
VCCHI_0 VCCHI_1 VCCHI_2 VCCHI_3
VCCPLL
VCCRTC
A5 AC17 AC8 B2 H18 H6 J1 J18 K6 M10 P12 P6 U1 V10 V16 V18
E11 F10 F15 F16 F17 F18 K14 V7 V8 V9
K10 K12 K18 K22 P10 T18 U19 V14
E12 E13 E20 F14 G18 R6 T6 U6
E7 V6
E15
L23 M14 P18 T22
AA23 P14 U18
C22
AB5
E9 F9
F6 F7
VCCPLL
+1.5VS
+CPU_CORE
0_0603
R214
1 2
R215
@0_0603
1 2
+3VS
+3VALW
+1.5VS
+1.5VALW
1SS355
12
C274 1UF_0603
+1.5VS +1.5VALW
+RTCVCC
+3VALW
+1.5VALW
+5VS
+3VS
12
21
R212
12
C275
0.1UF_0402
1K_0402
12
C279 1UF_0603
D18
1SS355
+3VALW
21
12
+5VALW
12
C280
0.1UF_0402
R213 1K_0402
D17
D22
E10 E14 E16 E17 E18 E19 E21
W22
AA12 AA16 AA22
AB20
AC10 AC14 AC18 AC23
E22
F8 G19 G21
G3 G6 H1
J6
K11 K13 K19 K23
K3
L10 L11 L12 L13 L14 L21
M1 M11 M12 M13 M20 M22 N10 N11 N12 N13 N14 N19 N21 N23
N5
P11 P13 P20 P22
P3 R18 R21
R5
T1
T19 T23
U20
V15 V17
V3
W5 W8
Y19
Y7
A16 A18 A20 A22
A4
AA3 AA9
AB7 AC1
AC5
B12 B16 B18 B20 B22
B9 C15 C17 C19 C21 C23
C6
D1 D12 D15 D17 D19 D21 D23
D4
D8
A1
ICH4-M
1 1
2 2
3 3
4 4
+3VS
12
C242 10UF_1206
+3VALW
12
C255 10UF_1206
+1.5VS
12
C262 10UF_1206
+1.5VALW
12
C270
0.1UF_0402
+1.5VS
12
C276
0.1UF_0402
+CPU_CORE
12
C281
0.1UF_0402
VCCPLL
+RTCVCC
12
12
C271
0.1UF_0402
12
C277
0.1UF_0402
C284
0.1UF_0402_X5R
C285
0.1UF_0402_X5R
12
C243
0.1UF_0402
12
C256
0.1UF_0402
C263
0.1UF_0402
12
C282
0.1UF_0402
12
C244
0.1UF_0402
12
C257
0.1UF_0402
12
C264
0.1UF_0402
12
C272
0.1UF_0402
12
C278 10UF_1206
12
C283 1UF_0603
12
C245
0.1UF_0402
12
C258
0.1UF_0402
12
C265
0.1UF_0402
12
C273
10UF_1206
12
C246
0.1UF_0402
12
C259
0.1UF_0402
12
C266
0.1UF_0402
12
C269
0.1UF_0402
12
C247
0.1UF_0402
12
C260
0.1UF_0402
12
C267
10UF_1206
12
C268
0.01UF_0402
12
C248
0.1UF_0402
12
12
C249
0.1UF_0402
0.1UF_0402
12
C261
0.01UF_0402
C250
12
C254
0.1UF_0402
12
C251
0.1UF_0402
12
C252
0.1UF_0402
12
C253
10UF_1206
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
C
D
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
E
F
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC M /B LA- 1571
401238
星期一 六月
G
3B
of
17 38, 21, 2004
H
Page 18
5
4
3
2
1
HDD/CD-ROM Module
PD_D[0..15]16
+5VS
PD_D[0..15]
1 2
R217 470_0402
CDROM_R 23CDROM_L23
SD_DREQ 16 SD_IOR# 16
SD_DACK# 16
R220
1 2
+5VS +5VS +5VS
+5VS
12
C287
0.1UF_0402
PD_A2 16 PD_CS#3 16
+5VS
@100K_0402
+5VS
D D
R398 22_0402
CB59
R221
+5VS
PD_DREQ16 PD_IOW#16 PD_IOR#16
PD_DACK#16 IDEIRQ1415 PD_A116 PD_A016 PD_CS#116
0_0402
HD_RST#
1 2
R218 10K_0402
+5VS
CB58
12
10UF_10V_1206
12
CD_RST#
SD_D7 SD_D6 SD_D5 SD_D4 SD_D12 SD_D3 SD_D2 SD_D1
SD_D0 SD_IOW# SD_IRQ15
SD_CS#1
12
+5VS +5VS
SD_CSEL
R224 470_0402
1 2
+5VS
147
U11A
SDD_RST#15
PCIRST#6,11,15,19,20,21,24,25,27
C C
B B
ACT_LED#23
A A
PDD_RST#15
U11D
11
74HCT08
1 2
74HCT08
U11B
4 5
74HCT08
U11C
12
8
13
R358
1 2
3
6
10K_0402
74HCT08
CD_RST#
HD_RST#
9 10
CR_LED# 26
+5VS
SD_D[0..15]16
HDD_LED#
CDLED#
PD_D[0..15]16
SD_D[0..15]
SD_IORDY16
+5VS
+5VS
PD_D[0..15]
+3VS
R216
4.7K_0402
PD_IORDY16
CD_AGND23
+3VS
CDLED#
INT_CD_L
10UF_10V_1206
R219
4.7K_0402
SD_IOW#16 IDEIRQ1515
SD_A116 SD_A016 SD_A2 16 SD_CS#116 SD_CS#3 16
12
R222
10K_0402
12
C286 1000PF_0402
1 2
PD_D7 PD_D6 PD_D5 PD_D4 PD_D3 PD_D2 PD_D1 PD_D0
PD_DREQ PD_IOW# PD_IOR# PD_IORDY PD_DACK# PD_IRQA PD_A1 PD_A0 PD_CS#1 HDD_LED#
+5VS
12
CB57
10UF_10V_1206
Place component's closely IDE CONN.
JP9
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
CD-ROM CONN.
12
CB55
10UF_10V_1206
Place component's closely IDE CONN.
JP8
112 334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344
HDD CONN
12
C288
0.1UF_0402
12
CB56 1UF_10V_0603
2
PD_D8
4
PD_D9
6
PD_D10
8
PD_D11
10
PD_D12
12
PD_D13
14
PD_D14
16
PD_D15
18 20 22 24 26
PD_CSEL
28 30 32 34
PD_A2
36
PD_CS#3
38 40 42 44
12
C289 1000PF_0402
INT_CD_R SD_D8
SD_D9 SD_D10 SD_D11
SD_D13 SD_D14 SD_D15 SD_DREQ SD_IOR#
SD_DACK#
SD_CS#3
1 2
R223 100K_0402
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR
5
4
DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
SCHEMATIC M /B LA- 1571
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
401238
星期一 六月
3B
of
18 38, 21, 2004
1
Page 19
5
+3VALW
2
10UF_1206
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
R234 100_0402
31
+
Q22 2SB1197K
CB60
12
R237 @22_0402
12
C304 @10PF_0402
C295
0.1UF_0402
45 44 42 41 38 37 36 33 30 29 28 27 26 25 24 23 10
9 8 5 4 3 1
100
95 94 93 92 91 89 87 86
32 21 11 98
12 13 14 15 17 18 19 20 85 84 99 81 82
83
RTL8100BL
VDD2.5
U12
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
CBE0B CBE1B CBE2B CBE3B
FRAMEB IRDYB TRDYB DEVSELB STOPB PERRB SERRB PAR REQB GNTB IDSEL INTAB RSTB
CLK
+VDD2.5
GND2GND16GND88GND43GND31GND73GND66GND62GND
VCTRL
D D
AD[0..31]15,20,21,24
C C
CBE#015,20,21,24 CBE#115,20,21,24
B B
A A
CBE#215,20,21,24 CBE#315,20,21,24
FRAME#15,20,21,24
IRDY#15,20,21,24
TRDY#15,20,21,24
DEVSEL#15,20,21,24
STOP#15,20,21,24 PERR#15,20,21,24 SERR#15,21,24
PAR15,20,21,24 REQ#315 GNT#315
PIRQD#15
PCIRST#6,11,15,18,20,21,24,25,27
CLK_PCI_LAN12
AD[0..31]
AD19
4
+VDD2.5
96
VDD25
51
VDD25
12
C290
0.1UF_0402
+VDD2.5
12
58
AVDD25
12
C292
C291
0.1UF_0402
1000PF_0402
6
90
97
VDD
VDD22VDD
VDD
39
VDD
12
C293
1000PF_0402
34
VDD
70
59
AVDD75AVDD
AVDD
LAN CONTROLLER RTL8100BL
NC
76
NC78NC54NC53NC
NC
NC
X1
7
52
69
61
CLKOUT
Y3 25MHz_25ppm
CRYSTAL
C306 27PF_0402
NC
NC
56
40
35
+3VALW+3VALW+VDD2.5
R227
5.6K_0402
50
AUX
ISOLATEB
PMEB
VCTRL
EECS EESK
EEDI
EEDO
LWAKE
RTT3 LED2
LED1 LED0
TXD-
TXD+
RXIN-
RXIN+
RTSET
X2
60
XTALFB
C307 27PF_0402
C296
0.1UF_0402
74 57
55
49 48 47 46
64 63
77 79 80
49.9_1%_0402
71 72
67 68
65
LANIO_AVDD
C297
0.1UF_0402
VCTRL
EECS EESK EEDI EEDO
LED1_GRNN LED2_YELN
C302
0.1UF_0402
1 2
12
R232
R238
5.6K_0402
3
(LAN_10LINK)
(LAN_100LINK)
12
R233
49.9_1%_0402
L12
HB-1M2012-601JT
C298
0.1UF_0402
1
CS
2
SK
3
DI
4
DO
LAN_TD­LAN_TD+
LAN_RD­LAN_RD+
49.9_1%_0402
+3VALW
ISOB
LAN_PME# 21,24,27
U13
8
VCC
7
NC
6
NC
5
GND
93C46-3GR
LED1_GRNN 29 LED2_YELN 29
Place close to U12
12
12
R235
C303
0.1UF_0402
1 2
R236
49.9_1%_0402
Place close to U14
R229
15K_0402
+3VS
+3VALW
C301
0.1UF_0402
R228
1K_0402
2
RJ45_TX+ RJ45_TX-
RJ45_GND
VH1
DSSA-P3100SB
MOD_RING
MOD_RING MOD_TIP
RJ45_RX-29 RJ45_RX+29
RJ45_TX-29 RJ45_TX+29
RJ45_RX­RJ45_RX+
LAN_RD+ LAN_RD-
LAN_TD+ LAN_TD-
RJ45_TX­RJ45_TX+
R225
R226
12
C294 220PF_3KV_1808
MOD_TIP
12
C299 220PF_3KV_1808
C305
12
0.1UF_0402
RJ45_RX+
75_1%_0603
RJ45_RX-
75_1%_0603
RJ45-ALLTOP C10049-10804
1
1 2
2
U14
1
RD+
2
RD-
3
CT
6
CT
7
TD+ TD-8TX-
Pulse-H0022
12
C300 220PF_3KV_1808
RX+
JP10
1
TX+
2
TX-
3
RX+
4
NC4
5
NC3
6
RX-
7
NC2
8
NC1
1 2
5 6
16 15
RX-
14
CT
11
CT
10
TX+
9
1
9
GND
10
GND
JP11
TIP RING
GND GND
RJ11-ALLT_C10121-10204
JP12
1 2
HEADER 2
12
12
R239
75 1%_0603
R240 75 1%_0603
RJ45_GND
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR
5
4
DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
SCHEMATIC M /B LA- 1571
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
401238
星期一 六月
1
19 38, 21, 2004
3B
of
Page 20
A
1 1
B
12
C308
0.1UF_0402
12
C309
0.1UF_0402
12
C310
0.1UF_0402
12
C311
0.1UF_0402
12
C312
0.1UF_0402
12
C313
0.1UF_0402
C
12
C314
0.1UF_0402
12
C315
0.1UF_0402
+3VS
12
C316
0.1UF_0402
D
E
IEEE1394 Controller/PHY
C328
59
GNDATX0
LPS/CMC38SCLK40D044D145D246D347D448D551D6/CMCJMP52D7/PC2JMP53CTL0/PC0JMP54CTL1/PC1JMP55LREQ/TSOJMP56LINKON/TSIJMP57NC
+3VS+3VS+3VS +3VS
C319
0.1UF_0402
76
VDDATX1
XI
60
X2
24.576MHz_30ppm
R250
1M_0402
69
SCL/EECK
PHYRESET
XO
61
C329 27PF_0402
GNDATX1
VDDATX2
GNDATX2 VDDARX0
GNDARX0 VDDARX1
GNDARX1 VDDARX2
GNDARX2
EECS EEDO
SDA/EEDI
PME# MODE1 MODE0
XCPS
XREXT
XTPB0M
XTPB0P
XTPA0M
XTPA0P
XTPBIAS0
XTPB1M
XTPB1P
XTPA1M
XTPA1P
XTPBIAS1
XTPB2M
XTPB2P
XTPA2M
XTPA2P
XTPBIAS2
XTPB0­XTPB0+ XTPA0­XTPA0+
XTPBIAS0
6.34K_1%_0603
+3VS
R245
R242
1K_0402
R243
1K_0402
C325 47PF_0402
+3VS
U16
1
A0
2
A1
3
A2 GND4SDA
24C02-27
XTPBIAS0
XTPA0+ XTPA0­XTPB0+ XTPB0-
+3VS
8
VCC
7
WC#
EECK_LAN
6
SCL
EEDI_LAN
5
Place close to 1394 chip
54.9_1%_0603
12
R246
12
R251
54.9_1%
12
R241 510_0402
54.9_1%_0603
12
R247
12
R252
54.9_1%
12
C326
0.33UF_16V_0805
JP13
345 2 1
1394_FOX
6
U15
90
C321
0.1UF_0402
83 65
C322
0.1UF_0402
64 75
C323
0.1UF_0402
68 89
C324
0.1UF_0402
82 29
30 31 32
37 42 43
63 66 70
71 72 73 74
77 78 79 80 81
84 85 86 87 88 58
EEDI_LAN EECK_LAN
C330
0.1UF_0402
PAR15,19,21,24
AD[0..31]
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
R244 100_0402
AD16
1 2
CLK_PCI_1394
12
R248 @33_0402
12
C327 @22PF_0402
102
28
AD0
27
AD1
23
AD2
22
AD3
21
AD4
19
AD5
18
AD6
17
AD7
14
AD8
13
AD9
12
AD10
11
AD11
10
AD12
7
AD13
6
AD14
5
AD15
120
AD16
119
AD17
118
AD18
117
AD19
116
AD20
112
AD21
110
AD22
109
AD23
106
AD24
105
AD25
104
AD26
101
AD27
100
AD28
99
AD29
98
AD30
97
AD31
15
CBE0#
4
CBE1#
122
CBE2#
107
CBE3#
108
IDSEL
123
FRAME#
124
IRDY#
126
TRDY#
127
DEVSEL#
128
STOP#
2
PERR#
3
PAR
96
REQ#
95
GNT#
91
INTA#
92
PCIRST#
93
PCICLK
36
114
113
125
33
VDD1
VDD2
VDD3
VDD48VDD520VDD6
VDDC235VDDC1
IEEE 1394
VSS51VSS69VSS716VSS826VSS934VSSC1
VSSC2
121
115
AD[0..31]15,19,21,24
2 2
CBE#015,19,21,24 CBE#115,19,21,24 CBE#215,19,21,24
CBE#315,19,21,24
FRAME#15,19,21,24
IRDY#15,19,21,24
TRDY#15,19,21,24
DEVSEL#15,19,21,24
STOP#15,19,21,24
3 3
PERR#15,19,21,24 REQ#015
GNT#015
PIRQA#15
PCIRST#6,11,15,18,19,21,24,25,27
CLK_PCI_139412
C317
0.1UF_0402
0.1UF_0402 C320
49
PVDD139PVDD2
41
PGND250PGND1
24
RAMVDD
VT6306
VSS194VSS2
VSS3
VSS4
RAMVSS
67
25
103
111
+3VS
C318
0.1UF_0402
62
VDDATX0
R249
2K_1%_0402
27PF_0402
12
4 4
A
B
VT6306/6307L
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
C331
270PF_0402
12
R253
5.1K_1%_0603
Title
SCHEMATIC M /B LA- 1571
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
401238
星期一 六月
of
20 38, 21, 2004
E
3B
Page 21
Q23 2N7002
D
100K_0402
S
G
2
S2_D0 S2_D1 S2_D2 S2_D3 S2_D4 S2_D5 S2_D6 S2_D7 S2_D8 S2_D9 S2_D10 S2_D11 S2_D12 S2_D13 S2_D14 S2_D15
S2_A0 S2_A1 S2_A2 S2_A3 S2_A4 S2_A5 S2_A6 S2_A7 S2_A8 S2_A9 S2_A10 S2_A11 S2_A12 S2_A13 S2_A14 S2_A15 SB_A16 S2_A17 S2_A18 S2_A19 S2_A20 S2_A21 S2_A22 S2_A23 S2_A24 S2_A25
S2_BVD1 S2_BVD2 S2_CD1# S2_CD2# S2_RDY# S2_WAIT# S2_WP S2_INPACK#
S2_OE# S2_VS1 S2_VS2
S2_RST
13
REQ#215
+12VS
S1_D[0..15]22
S1_A[0..25]22 S2_D[0..15]22 S2_A[0..25]22
AD[0..31]15,19,20,24
CBE#[0..3]15,19,20,24
S1_D[0..15] S1_A[0..25] S2_D[0..15] S2_A[0..25] AD[0..31] C/BE#[0..3]
S2_A16 S1_A16
R255
1 2
R259
1 2
47_0402
Placement near to PCMCIA controller
S2_BVD122 S2_BVD222 S2_CD1#22 S2_CD2#22 S2_RDY#22 S2_WAIT#22
S2_WP22
S2_INPACK#22
S2_CE1#22 S2_CE2#22
S2_WE#22 S2_IORD#22 S2_IOWR#22
S2_OE#22 S2_VS122
S2_VS222 S2_REG#22 S2_RST22
ENE_RTCCLK22
CLK_PCI_PCM12
W10
B_D0/CAD27
U10
B_D1/CAD29
P10
B_D2/RSVD
H2
B_D3/CAD0
J1
B_D4/CAD1
J3
B_D5/CAD3
K1
B_D6/CAD5
K3
B_D7/CAD7
V10
B_D8/CAD28
R10
B_D9/CAD30
W11
B_D10/CAD31
H1
B_D11/CAD2
J2
B_D12/CAD4
J6
B_D13/CAD6
K2
B_D14/RSVD
K5
B_D15/CAD8
R8
B_A0/CAD26
W7
B_A1/CAD25
V7
B_A2/CAD24
W6
B_A3/CAD23
V6
B_A4/CAD22
U6
B_A5/CAD21
V5
B_A6/CAD20
U5
B_A7/CAD18
N1
B_A8/CC/BE1#
M3
B_A9/CAD14
L1
B_A10/CAD9
M1
B_A11/CAD12
T1
B_A12/CC/BE2#
N3
B_A13/CPAR
P1
B_A14/CPERR#
P5
B_A15/CIRDY#
P6
B_A16/CCLK
M6
B_A17/CAD16
N2
B_A18/RSVD
N6
B_A19/CBLOCK#
N5
B_A20/CSTOP#
R1
B_A21/CDEVSEL#
R2
B_A22/CTRDY#
R3
B_A23/CFRAME#
W4
B_A24/CAD17
R6
B_A25/CAD19
V9
B_BVD1/CSTSCHG
W9
B_BVD2/CAUDIO
H3
B_CD1#/CCD1#
R9
B_CD2#/CCD2#
V8
B_READY/CINT#
W8
B_WAIT#/CSERR#
U9
B_WP/CCLKRUN#
R7
B_INPACK/CREQ#
K6
B_CE1#/CC/BE0#
L2
B_CE2#/CAD10
P3
B_WE#/CGNT#
L5
B_IORD#/CAD13
M2
B_IOWR#/CAD15
L6
B_OE#/CAD11
U8
B_VS1#/CVS1
P7
B_VS2#/CVS2
P8
B_REG#/CC/BE3#
W5
B_RESET/CRST#
SLATCH 22
F17
LATCH
CLOCK
+3VALW
G15
SPKOUT
PCM_SPK# 23
L
12
C333
0.1UF_0402
E11
D1
F18
F3
VCC
VCCI
VCCP
VCCP
Power
IRQ/DMA
1 2
12
C334
0.1UF_0402
+3VALW
W12
L3
U7
VCC
VCC
VCC
Slot
A
N15
VCC
R254
G19
VCC
0_0805
B14
VCC
E7
VCCC9VCC
GND
+3VALW
S2_VCC_R
S1_VCC_R
M17
M5
VCCA
VCCB
C332
1 2
C335
1 2
0.1UF_0402
A11
A_D0/CAD27
GRST#
A_D1/CAD29
A_D2/RSVD
A_D3/CAD0 A_D4/CAD1 A_D5/CAD3 A_D6/CAD5
A_D7/CAD7 A_D8/CAD28 A_D9/CAD30
A_D10/CAD31
A_D11/CAD2 A_D12/CAD4 A_D13/CAD6 A_D14/RSVD A_D15/CAD8
A_A0/CAD26 A_A1/CAD25 A_A2/CAD24 A_A3/CAD23 A_A4/CAD22 A_A5/CAD21 A_A6/CAD20 A_A7/CAD18
A_A8/CC/BE1#
A_A9/CAD14 A_A10/CAD9
A_A11/CAD12
A_A12/CC/BE2#
A_A13/CPAR
A_A14/CPERR#
A_A15/CIRDY#
A_A16/CCLK
A_A17/CAD16
A_A18/RSVD
A_A19/CBLOCK#
A_A20/CSTOP#
A_A21/CDEVSEL#
A_A22/TRDY#
A_A23/CFRAME#
A_A24/CAD17 A_A25/CAD19
A_BVD1/CSTSCHG
A_BVD2/CAUDIO
A_CD1#/CCD1# A_CD2#/CCD2#
A_READY/CINT#
A_WAIT#/CSERR#
A_WP/CCLKRUN#
A_INPACK/CREQ#
A_CE1#/CC/BE0#
A_CE2#/CAD10 A_WE#/CGNT#
A_IORD#/CAD13
A_IOWR#/CAD15
A_OE#/CAD11
A_VS1#/CVS1 A_VS2#/CVS2
A_REG#/CC/BE3#
A_RESET/CRST#
0.1UF_0402
U17
H14 G18 G14 U11 R11 U12 R12 V13 H15 G17 F19 P11 V12 P12 W13 U13
J19 K14 K15 K19 L15 L17 L19 M15 W16 R14 W14 P14 N18 R17 N14 M14 P18 U15 T19 P15 R18 P17 P19 N17 N19 M18
H19 J15 V11 H17 J17 J14 H18 L14
P13 R13 R19 W15 V15 U14 J18 M19 K17 L18
W=10mils
W=10mils
S1_BVD1 S1_BVD2 S1_CD1# S1_CD2# S1_RDY# S1_WAIT# S1_WP S1_INPACK#
S1_OE# S1_VS1 S1_VS2
S1_RST
S1_D0 S1_D1 S1_D2 S1_D3 S1_D4 S1_D5 S1_D6 S1_D7 S1_D8 S1_D9 S1_D10 S1_D11 S1_D12 S1_D13 S1_D14 S1_D15
S1_A0 S1_A1 S1_A2 S1_A3 S1_A4 S1_A5 S1_A6 S1_A7 S1_A8 S1_A9 S1_A10 S1_A11 S1_A12 S1_A13 S1_A14 S1_A15 SA_A16 S1_A17 S1_A18 S1_A19 S1_A20 S1_A21 S1_A22 S1_A23 S1_A24 S1_A25
S2_VCC S1_VCC
PM_RSMRST# 16,22,27
R260
1 2
47_0402
Placement near to PCMCIA controller
S1_BVD1 22 S1_BVD2 22 S1_CD1# 22 S1_CD2# 22 S1_RDY# 22 S1_WAIT# 22 S1_WP 22 S1_INPACK# 22
S1_CE1# 22 S1_CE2# 22 S1_WE# 22 S1_IORD# 22 S1_IOWR# 22 S1_OE# 22 S1_VS1 22 S1_VS2 22 S1_REG# 22 S1_RST 22
+3VALW
4.7UF_10V_0805
12
12
C339 1000PF_0402
1000PF_0402
PCM_INTA#
CB61
C340
PCI1420CARDBUS
+3VALW
12
C341
0.1UF_0402
S1_A23
S1_RST
S1_OE#
S2_A23
S2_RST
S2_OE#
R263
1 2
22K_0402
+3VALW
12
C336
0.1UF_0402
12
C342
0.1UF_0402
R257 22K_0402
1 2
1 2
R258 47K_0402
1 2
R422 47K_0402
1 2
R262 47K_0402
1 2
R261 22K_0402
1 2
R423 47K_0402
+3VALW
D19
21
RB751V
12
+3VALW+3VALW
12
C343 1000PF_0402
S1_VCC
S1_VCC
S1_VCC
S2_VCC
S2_VCC
S2_VCC
C337
0.1UF_0402
12
C344
1000PF_0402
PIRQE# 15
SLDATA22 GNT#215 CBE#315,19,20,24
CBE#215,19,20,24 CBE#115,19,20,24
CBE#015,19,20,24
FRAME#15,19,20,24 DEVSEL#15,19,20,24
PCIRST#6,11,15,18,19,20,24,25,27
TRDY#15,19,20,24
IRDY#15,19,20,24 STOP#15,19,20,24
PERR#15,19,20,24
SERR#15,19,24
PAR15,19,20,24
A6
C6
PAR
SERR#B6PERR#
12
R256
@33_0402
C338
12
@10PF_0402
C7
A7
A14
B7
F7
IRDY#
STOP#
A10
F8
TRDY#
PCLK
RSTIN#
FRAME#
DEVSEL#
C/BE0#E2C/BE1#A5C/BE2#C8C/BE3#
B13
A15
REQ#
C13
GNT#
E19
F14
DATA
PCI
Interface
Slot
B
AD4
AD5G5AD3H6AD2G3AD1
AD0
F1
H5
AD0
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
F2
G1
AD4
AD1
AD5
AD2
AD3
AD6
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD15F6AD14B5AD13E6AD12A4AD11
AD10E3AD9F5AD8G6AD7E1AD6
C12
AD15
AD14
AD13
AD10
AD7
AD9
AD12
AD11
AD8
AD21A9AD20B9AD19F9AD17
AD18
AD16
A8
E9
B8
AD17
AD18
AD16
F11
F10
E13
E10
AD21
AD25
AD24
AD23
AD22
AD19
AD20
AD31
AD30
B12
A12
B11
E12
C11
AD28
AD27
AD26
AD29
AD30
AD31
A13
IDSEL
C10 12
R265 100_0402
AD20
INTA#/MFUNC0
F15
PCM_INTA#
E17
PCM_INTB#
INTB#/MFUNC1
D19
SUSPEND#
DMAREQ#/MFUNC2
A16
DMAGNT#/MFUNC5
LOCK#/MFUNC4
IRQSER/MFUNC3
CLKRUN#/MFUNC6
F13
E14
B15
C15
PCM_RI#
1 2
R266 10_0402
C14
RIOUT#/PME#
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
J5
P2
P9
G2
V14
K18
PCM_PME# 19,24,27 PM_CLKRUN# 16,24,25,27
PCM_RI# 25 SIRQ 15,25,27
PCM_SUSP# 27
E8
F12
E18
B10
PCI1420-GHK
C5
Compal Electronics, Inc.
Title
Size Document Number Rev
B
Date: Sheet
PCM_INTB#
SCHEMATIC M/B LA-1571 401238
星期一
21, 2004
六月
R264
1 2
22K_0402
+3VALW
D20
RB751V
21
21 38,
PIRQF# 15
of
Page 22
SOCKETCARDBUS
JP14
A77
a68
A76
S1_CD2#21
S1_WP21
S1_BVD121
S1_BVD221
S1_REG#21
S1_INPACK#21
S1_WAIT#21
S1_RST21 S1_VS221
S1_VPP S2_VPP S1_VCC
S1_RDY#21
S1_WE#21
S1_IOWR#21
S1_IORD#21
S1_VS121 S1_OE#21
S1_CE2#21
S1_CE1#21
S1_CD1#21
S1_CD2# S1_WP
S1_D10 S1_D2 S1_D9 S1_D1 S1_D8 S1_D0 S1_BVD1
S1_A0 S1_BVD2 S1_A1 S1_REG# S1_A2 S1_INPACK# S1_A3
S1_WAIT# S1_A4 S1_RST S1_A5 S1_VS2 S1_A6 S1_A25
S1_A7 S1_A24 S1_A12 S1_A23 S1_A15 S1_A22
S1_A16
S1_A21 S1_RDY# S1_A20 S1_WE# S1_A19 S1_A14 S1_A18 S1_A13
S1_A17 S1_A8 S1_IOWR# S1_A9 S1_IORD#
S1_A11 S1_VS1 S1_OE# S1_CE2# S1_A10
S1_D15 S1_CE1# S1_D14 S1_D7 S1_D13 S1_D6
S1_D12 S2_D12 S1_D5 S1_D11
S1_D4
S1_CD1#
S1_D3
A75 A74 A73 A72 A71 A70 A69 A68 A67 A66 A65 A64 A63 A62 A61 A60 A59 A58 A57 A56 A55 A54 A53 A52 A51 A50 A49 A48 A47 A46 A45 A44 A43 A42 A41 A40 A39 A38 A37 A36 A35 A34 A33 A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10
a34 a67 a33 GND a66 a32 a65 a31 a64 a30 a63 GND a29 a62 a28 a61 a27 a60 a26 GND a59 a25 a58 a24 a57 a23 a56 GND a22 a55 a21 a54 a20 a53 GND a19 a52 a18 a51 a17 a50 a16 a49 a15 a48 a14 a47 a13 GND a46 a12 a45 a11 a44 GND a10 a43 a9 a42 a8 GND a41 a7 a40 a6 a39 a5
A9
GND
A8
a38
A7
a4
A6
a37
A5
a3
A4
a36
A3
a2
A2
a35
A1
a1
157
157
158
158
159
b68 b34 b67 b33
GND
b66 b32 b65 b31 b64 b30 b63
GND
b29 b62 b28 b61 b27 b60 b26
GND
b59 b25 b58 b24 b57 b23 b56
GND
b22 b55 b21 b54 b20 b53
GND
b19 b52 b18 b51 b17 b50 b16 b49 b15 b48 b14 b47 b13
GND
b46 b12 b45 b11 b44
GND
b10 b43
b9
b42
b8
GND
b41
b7
b40
b6
b39
b5
GND
b38
b4
b37
b3
b36
b2
b35
b1
159
160
PCMC154PIN
160
B77 B76 B75 B74 B73 B72 B71 B70 B69 B68 B67 B66 B65 B64 B63 B62 B61 B60 B59 B58 B57 B56 B55 B54 B53 B52 B51 B50 B49 B48 B47 B46 B45 B44 B43 B42 B41 B40 B39 B38 B37 B36 B35 B34 B33 B32 B31 B30 B29 B28 B27 B26 B25 B24 B23 B22 B21 B20 B19 B18 B17 B16 B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1
S2_CD2# S2_WP
S2_D10 S2_D2 S2_D9 S2_D1 S2_D8 S2_D0 S2_BVD1
S2_A0 S2_BVD2 S2_A1 S2_REG# S2_A2 S2_INPACK# S2_A3
S2_WAIT# S2_A4 S2_RST S2_A5 S2_VS2 S2_A6 S2_A25
S2_A7 S2_A24 S2_A12 S2_A23 S2_A15 S2_A22
S2_A16
S2_A21 S2_RDY# S2_A20 S2_WE# S2_A19 S2_A14 S2_A18 S2_A13
S2_A17 S2_A8 S2_IOWR# S2_A9 S2_IORD#
S2_A11 S2_VS1 S2_OE# S2_CE2# S2_A10
S2_D15 S2_CE1# S2_D14 S2_D7 S2_D13 S2_D6
S2_D5 S2_D11 S2_D4 S2_CD1# S2_D3
S2_CD2# 21 S2_WP 21
S2_BVD1 21
S2_BVD2 21 S2_REG# 21
S2_INPACK# 21
S2_WAIT# 21 S2_RST 21 S2_VS2 21
S2_VCC
S2_RDY# 21 S2_WE# 21
S2_IOWR# 21 S2_IORD# 21
S2_VS1 21 S2_OE# 21 S2_CE2# 21
S2_CE1# 21
S2_CD1# 21
S1_D[0..15]21 S1_A[0..25]21
S2_D[0..15]21
S2_A[0..25]21
S1_VCC
S2_VCC
S1_D[0..15] S1_A[0..25] S2_D[0..15] S2_A[0..25]
C345
0.1UF_0402
C348
0.1UF_0402
12
CB71
4.7UF_10V_0805
CB73
4.7UF_10V_0805
PCMCIA POWER CTRL.
CB63 2.2UF_16V_0805
CB64 4.7UF_10V_0805 CB65 CB66 4.7UF_10V_0805
CB68 4.7UF_10V_0805 CB69 4.7UF_10V_0805 CB70
4.7UF_10V_0805
4.7UF_10V_0805
ENE_RTCCLK21
S1_VPP
12
S2_VPP
12
+3VALW
SLDATA21
SLATCH21
8.2K_0402_5%
CB72
4.7UF_10V_0805
CB74
4.7UF_10V_0805
R424
+5VALW
+12VALW
12
25
7
24
1 2
30 15
16 17
3 5 4
13 19 18
U18
NC 12V
12V 5V
5V 5V
3.3V
3.3V
3.3V DATA
LATCH CLOCK
NC STBY# OC#
TPS2216AI
AVPP AVCC AVCC AVCC
BVPP BVCC BVCC BVCC
RESET
RESET#
MODE
GND
S1_VPP
8 9 10 11
S2_VPP
23 20 21 22
6 14
26
NC
27
NC
28
NC
29
12
S1_VPP S1_VCC
12
CB62
4.7UF_10V_0805
12
CB67
4.7UF_10V_0805
S2_VPP S2_VCC
PM_RSMRST# 16,21,27
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number Rev
B
Date: Sheet of
SCHEMATIC M/B LA-1571 401238
星期一
21, 2004
六月
22 38,
Page 23
A
BEEP#27
+3VALW
+3VALW POWER
U19
74AHCT1G125GW
1 1
2 2
LINE_OUT_PLUG29 DOCK_OUT_PLUG29
3 3
DOCK_MIC_PLUG29
4 4
135
2 4
PCM_SPK#21
SB_SPKR16
+3VALW
12
10K_1%_0603
+5VS
R267 100K_1%_0603
1 2
12
B
+3VALW
12
R278
1 2
1 2
100K_0402
14
1 2
+3VALW POWER
+3VALW
14
3 4
+3VALW POWER
+3VALW
14
5 6
+3VALW POWER
100K_0402
U20A 74LVC14
U20B 74LVC14
U20C 74LVC14
+3VALW
147
1 2
R268
C351
0.22UF_0603
LINE_OUT_PLUG
R279
Place close to JP29
Q25
2N7002
INT_MIC
Q26 2N7002
MIC
R283 1M_0402
DOCK_MIC29
INT_MIC26
13
D
2
G
S
CB75
1UF_10V_0603
CB76 1UF_10V_0603
CB77 1UF_10V_0603
U21A
74LVC32
Q24
2N7002
D
S
1 3
G
2
13
D
S
1 2
12
R269 560
12
1 2
R270 560
12
1 2
R271 560
3
1 2
2
G
C
HPS
1UF_10V_0603
1UF_10V_0603
R282
100K
C354
C355
12
R274 @10K
12
12
+12VS
MIC_MUTE 27
MONO_IN
2 1
MIC_CODEC
D21
RB751V
D
E
F
G
H
BT/MDC CONN
MDC_AUDIO_MON 24
AC97_RST#16,24
+3VALW
+3VS
JP15
MD_MIC
CHARGING_LED#28
POWER1_LED#28 POWER2_LED#28 BT_LED#27
1
MONO_OUT/PC_BEEP
3
AGND
5
AUXA_RIGHT
7
AUXA_LEFT
9
CD_GND
11
CD_RIGHT
13
CD_LEFT
15
GND
17
3.3Vaux
19
GND
21
3.3Vmain
23
AC97_SDATA_OUT
25
AC97_RESET#
27
GND
29
AC97_MSTRCLK
AMP 3-1473290-0
AUDIO_PWDN
MONO_PHONE
AC97_SDATA_IN1 AC97_SDATA_IN0
AC97_BITCLK
AC97 CODEC ALC202 CONN
+3VS
AC97_BCLK
LINE_OUT_PLUG
MD_MIC
MONO_IN MOD_AUDIO_MONR
INT_MIC
MIC_CODEC
MIC
HPS
EC_MUTE
AC97_BCLK16,24
AC97_RST#16,24
AC97_SYNC16,24
AC97_SDOUT16,24 AC97_SDIN016 MD_MIC24
CD_AGND18 CDROM_L18 CDROM_R18
INTSPK_L+29 INTSPK_R+29
DLINE_IN_L29 DLINE_IN_R29
WL_LED#27
PS2_DATA27
PS2_CLK27
EC_MUTE27 FULL_LED#28 ACT_LED#18
+5VS +5VALW +3VALW
RESERVED
GND
RESERVED RESERVED RESERVED RESERVED RESERVED
AC97_SYNC
GND
2 4
1 2
R272 0_0402
6 8 10
+5V
12 14 16 18 20 22 24
1 2
R276
26
1 2
R419
28 30
1 2
R277
JP16
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
37
37
38
38
CODEC CONN
22_0402 @0_0402
22_0402
R_USB1_D+ R_USB1_D-
BT_DETACH 28 BT_PD 28
+5VS
BT_WAKEUP 28 AC97_SYNC 16,24
AC97_SDIN1 16AC97_SDOUT16,24 AC97_SDIN0 16
AC97_BCLK 16,24
R275
1 2
MOD_AUDIO_MONR
R379 FBM-11-160808-121
1 2 1 2
R378
FBM-11-160808-121
AC97_BCLK
R281
1 2
C353
1 2
@33K
USB1_D+ 16 USB1_D- 16
10
10PF_0402
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR
A
B
C
DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
E
F
SCHEMATIC M /B LA- 1571
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
401238
星期一 六月
G
23
H
3B
38, 21, 2004
of
Page 24
A
B
C
D
E
Mini-PCI Slot
12
C361
0.1UF_0402
AD30 AD28
AD26 AD24 MINI_IDSEL
AD22 AD20
AD18 AD16
AD15 AD13 AD11
AD9
AD6 AD4 AD2 AD0
AUDIO_MON
+3VS
CB80
4.7UF_10V_0805
PIRQG#
PCIRST#
GNT#1
R285
1 2
0_0402
12
C362
0.01UF_0402
1 2
R287 100_0402
PAR 15,19,20,21
FRAME# 15,19,20,21 STOP# 15,19,20,21 DEVSEL# 15,19,20,21
CBE#0 15,19,20,21
AC97_SDOUT 16,23 AC97_RST# 16,23
+3VALW
12
CB81
C363
4.7UF_10V_0805
0.1UF_0402
PIRQG# 15 GNT#4 15
PCIRST# 6, 11,15,18,19,20,21,25,27
GNT#1 15 MINI_PME# 19,21,27
LAN_PME# 19,21,27
AD22
W=40mils
W=40mils
W=40mils
W=40mils
+5VS
+3VALW
+3VS
+3VALW
+5VS
12
12
R284 @10_0402
12
C364 @15PF_0402
C356
0.01UF_0402
1 1
2 2
3 3
12
C357
0.01UF_0402
W=40mils
+3VS
W=30mils
+5VS
AC97_SYNC16,23 AC97_SDIN216
AC97_BCLK16,23
12
C365 15PF_0402
MDC_AUDIO_MON23
MD_MIC23
MODEM_RI#25
+5VS
12
CB78 22UF_10V_1206
Wireless_OFF#27
CLK_PCI_MINI12
PM_CLKRUN#16,21,25,27 TRDY# 15,19,20,21
W=30mils
12
C358
0.01UF_0402
PIRQH#15
REQ#415
REQ#115
100_0402
1 2
CBE#315,19,20,21
CBE#215,19,20,21
IRDY#15,19,20,21
SERR#15,19,21
PERR#15,19,20,21 CBE#115,19,20,21
PIRQH#
CLK_PCI_MINICLK_PCI_MINI REQ#1 AD31
AD29 AD27
R286
AD25 LAN_IDSELAD23
AD23 AD21
AD19 AD17
CLKRUN#
AD14 AD12
AD10 AD8
AD7 AD5 AD3 AD1
R288 22_0402 R289 22_0402
+3VALW
R290
12
@0
+3VS
12
CB79
C359
@4.7UF_10V_0805
0.1UF_0402
AD[0..31]
TIP RING
D22
RB751V
12 12
AUDIO_MON
21
101 103 105 107 109 111 113 115 117 119 121 123
127
Mini-PCI SLOT
JP17
112
KEY KEY
334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152 535354 555556 575758 595960 616162 636364 656566 676768 696970 717172 737374 757576 777778 797980 818182 838384 858586 878788 898990 919192 939394 959596 979798 9999100 101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
127
129
12
C360
0.01UF_0402
AD[0..31] 15,19,20,21
2 4
6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124
129
4 4
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR
A
B
DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
SCHEMATIC M /B LA- 1571
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
401238
星期一 六月
3B
of
24 38, 21, 2004
E
Page 25
5
SUPER I/O SMsC LPC47N227
+3VS
R293
R292
10K_0402
1 2
R295 10K_0402
R298
@33_0402
1 2
C372
1 2
@22PF_0402
12
C373
0.1UF_0402
RP120
89 7 6 5 4 3 2 1
16P8R_68
10K_0402
1 2
12
C374
0.1UF_0402
U22
20
LAD0
21
LAD1
22
LAD2
23
LAD3
24
LFRAME#
25
LDRQ#
26
PCIRST#
27
LPCPD#
50
GPIO12/IO_SMI#
17
IO_PME#
30
SIRQ
28
CLKRUN#
29
PCICLK
19
CLK14
48
GPIO10
54
GPIO15
55
GPIO16
56
GPIO17
57
GPIO20
58
GPIO21
59
GPIO22
6
GPIO24
32
GPIO30
33
GPIO31
34
GPIO32
35
GPIO33
36
GPIO34
37
GPIO35
38
GPIO36
39
GPIO37
40
GPIO40
41
GPIO41
42
GPIO42
43
GPIO43
44
GPIO44
45
GPIO45
46
GPIO46
47
GPIO47
51
GPIO13/IRQIN1
52
GPIO14/IRQIN2
64
GPIO23/FDC_PP
18
VTR
53
VCC
65
VCC
93
VCC
7
VSS
31
VSS
60
VSS
76
VSS
SMsC LPC47N227
Parallel Port
FD3 FD2 FD1 FD0 FD7 FD6 FD5 FD4
LPT_INIT#
10 9 8 7 6
+5V_PRN
10 9 8 7 6
SLCTIN#
+5V_PRN
FD7 FD6 FD5 FD4
LPTACK# LPTBUSY LPTPE LPTSLCT
LPTAFD#
D D
LFRAME#16,27
LDRQ#116
PCIRST#6,11,15,18,19,20,21,24,27
+3VS
SIRQ15,21,27 PM_CLKRUN#16,21,24,27 CLK_PCI_SIO12
14.3M_SIO
C C
B B
A A
+3VS
+5V_PRN
SLCTIN# LPT_INIT# LPTERR# AFD/3M#
+5V_PRN
5
1 2
1 2
1 2
R300 10K_0402
1 2
R301 10K_0402
LPTSLCTIN#
FD3 FD2 FD1 FD0
LAD0 LAD1 LAD2 LAD3
1 2
R294 10K_0402
PCLK_SIO
14.3M_SIO
PCLK_SIO
R297 10_0402
C371 15PF_0402
CB82
4.7UF_10V_0805
LPD3 LPD2 LPD1 LPD0 LPD7 LPD6 LPD5 LPD4
LPTINIT#
1 2 3 4 5
1 2 3 4 5
1 2
10 11 12 13 14 15 16
1 2
R307 33_0402
1 2
R308 33_0402
RP121
10P8R_2.7K
RP122
10P8R_2.7K
+5VS
LPTSTB#
1 2
R306 33_0402
1 2
R309 33_0402
4
LPD[0..7] LAD[0..3]
PD0/INDEX#
PD1/TRK0
PD2/WRTPRT#
PD3/RDATA#
PD4/DSKCHG#
PD6/MTR0#
BUSY/MTR1#
PE/WDATA#
SLCT/WGATE#
ERROR#/HDSEL#
ACK#/DS1#
INIT#/DIR#
AUTOFD#/DRVDEN0#
STROBE#/DS0# SLCTIN#/STEP#
DSR2#
DCD2#
DSR1#
DCD1#
IRMODE/IRRX3
RDATA# WDATA# WGATE#
HDSEL#
INDEX# DSKCHG# WRTPRT#
MTR0#
DRVDEN0
DRVDEN1
GPIO11/SYSOPT
D25
2 1
RB420D
w=10mils
PD5 PD7
DTR2# CTS2# RTS2#
TXD2 RXD2
RI2#
DTR1# CTS1# RTS1#
TXD1 RXD1
RI1#
IRRX2 IRTX2
DIR#
STEP#
DS0#
TRK0#
+5V_PRN
12
68 69 70 71 72 73 74 75
79 78 77 81 80 66 82 83 67
100 99 98 97 96 95 94 92
89 88 87 86 85 84 91 90
63 61 62
16 10 11 12 8 9 5 13 4 15 14 3 1
2 49
R305 1K_0402
LPD[0..7] 29 LAD[0..3] 16,27
LPD0 LPD1 LPD2 LPD3 LPD4 LPD5 LPD6 LPD7
LPTBUSY LPTPE LPTSLCT LPTERR# LPTACK#
DTR#2 CTS#2 RTS#2 DSR#2 TXD2 RXD2 DCD#2 RI#2
DTRA# CTSA# RTSA# DSRA# TXDA RXDA DCDA# RIA#
12
C376
0.1UF_0402
W=10mils
AFD/3M#
FD0 LPTERR# FD1 LPT_INIT# FD2 SLCTIN# FD3 FD0
FD4 FD5 FD6 FD7 LPTACK# LPTBUSY LPTPE
LPTSLCT
4
JP18 LPTCN-25-SUYIN
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9 22 10 23 11 24 12 25 13
R296 1K_0402
R299 1K_0402
IRMODE IRRX IRTXOUT
RDATA# WDATA# WGATE# HDSEL# FDDIR#
STEP# DRV0#
INDEX#
DSKCHG#
WP#
TRACK0#
MTR0#
PCM_RI#21
RING#27
MODEM_RI#24
LPTBUSY 29 LPTPE 29 LPTSLCT 29 LPTERR# 29 LPTACK# 29 LPTINIT# 29 LPTAFD# 29 LPTSTB# 29 LPTSLCTIN# 29CLK_14M_SIO12
1 2
1 2
RDATA# 26 WDATA# 26 WGATE# 26 HDSEL# 26 FDDIR# 26 STEP# 26 DRV0# 26 INDEX# 26 DSKCHG# 26 WP# 26 TRACK0# 26 MTR0# 26 3MODE# 26
12
R302 10K_0402
1 2
R303 1K_0402
AFD/3M#
1 8
LPTERR#
2 7
LPT_INIT#
3 6
SLCTIN#
4 5
8P4C-220PF
LPTACK#
1 8
LPTBUSY
2 7
LPTPE
3 6
LPTSLCT
4 5
8P4C-220PF
1 8
FD1
2 7
FD2
3 6
FD3
4 5
8P4C-220PF
FD4
1 8
FD5
2 7
FD6
3 6
FD7
4 5
8P4C-220PF
CP1
CP2
CP3
CP4
3
+3VALW
12
R291 10K_0402
D23
21
RB751V
D24
21
RB751V
13
RIA1
2
RP118
1 8 2 7 3 6 4 5
8P4R-4.7K_0804
RP119
1 8 2 7 3 6 4 5
8P4R-4.7K_0804
+5VS
Q27
2N7002
CTS#2 DSR#2 DCD#2 RI#2
DCDA# RIA# CTSA# DSRA#
Base I/O Address
0 = 02Eh
*
1 = 04Eh
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+3VS
+3VS
2
25V
SUSP#27,31,36
C368
0.1UF_0402@CY27
C370
0.47UF_0805@CY27
DTRA# RTSA# TXDA CTSA# RIA#
RXDA DCDA# DSRA#
RIA1
MAX3243 Transceiver
+5VALW
C366
0.1UF_0402
C1+
C1­C2+
C2­TIN1 TIN2 TIN3 ROUT1 ROUT2 ROUT3 ROUT4 ROUT5 ROUTB2
FORCEON FORCEOFF#
U23 MAX3243@CY27
26
VCC
28
24
1
2 14 13 12 19 18 17 16 15 20
23 22
TOUT1 TOUT2 TOUT3
RIN1 RIN2 RIN3 RIN4 RIN5
INVLD#
GND
27
V+
3
V-
9 10 11 4 5 6 7 8
21 25
1
0.47UF_0805@CY27 C367
25V
C369
25V
0.47UF_0805@CY27
DTR#1 RTS#1 TXD1 CTS#1 RI#1 RXD1 DCD#1 DSR#1
DTR#1 29 RTS#1 29 TXD1 29 CTS#1 29 RI#1 29 RXD1 29 DCD#1 29 DSR#1 29
FIR Module
MODE
TXD
SD
T = 20mil
1 3 5 7
+5VS
12
1
R304
5.6_1206
T = 12mil T = 12mil
T = 12mil
C375
+
10UF_10V_1206
IRTXOUT IRMODE
IRRX
of
25 38, 21, 2004
3B
+3VS
T = 20mil
12
C377
10UF_10V_1206
3
+
2
T = 20mil
12
C378
+
10UF_1206
U24
2
LED_C
4
RXD
6
VCC
8
GND
TFDU6102
Title
Size Document Number Rev
Date: Sheet
LED_A
Compal Electronics, Inc.
SCHEMATIC M/B LA-1571
401238
星期一 六月
Page 26
INDEX#25 DRV0#25
DSKCHG#25
MTR0#25
FDDIR#25
3MODE#25
STEP#25
FDD_DET#16
WDATA#25 WGATE#25 TRACK0#25
RDATA#25
HDSEL#25
12
C382
0.1UF_0402
FDD CONN.
+5VS
JP20
26
26
INDEX# DRV0# DSKCHG#
MTR0# FDDIR#
3MODE# STEP# FDD_DET# WDATA#
WGATE# TRACK0#
+5VS
12
C383
0.1UF_0402
WDATA# WGATE# HDSEL# FDDIR#
+5VS
WP# RDATA# HDSEL#
6 7 8 9
10
RP124
10P8R_1K
WP#25
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
ACES 85203-2602
DSKCHG# INDEX# WP# TRACK0#
52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27
5 4 3 2 1
52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27
RP123
1 8 2 7 3 6 4 5
STEP# MTR0# RDATA# DRV0#
+5VS
INDEX#
DRV0#
DSKCHG#
MTR0#
FDDIR#
3MODE#
FDD_DET#
WDATA# WGATE#
TRACK0#
RDATA# HDSEL#
+5VS
8P4R-1K_0804
STEP#
WP#
+5VS
SWITCH BOARD CONN.
+3VALW
+3VS
JP21
1 2
SCROLLED#27
NUMLED#27
CAPSLED#27
EC_ON#32
INT_MIC23
3 4 5 6 7 8 9
10
SW BD CONN
11
1
11
12
2
12
13
3
13
14
4
14
15
5
15
16
6
16
17
7
17
18
8
18
19
9
19
20
10
20
USER_BTN0# 28 USER_BTN1# 28 BT_BTN# 28 WL_BTN# 28
INT_KBD CONN.
KB_LED#27
R311
10K_0402
+3VALW +3VALW
2
10K
+3VALW
12
+3VALW
47K
B
C
WL_BTN#
31
Q28
E
DTA114YKA
R310
330_0402
1 2
KB_ID227
KB_ID127
R313 100K
1 2 1 2
R314 100K
KSO[0..15]27
R312 0
KSO6 KSO3 KSO12 KSO13
KSO14 KSO11 KSO10 KSO15
KSI[0..7]27
KSI7 KSI6 KSI5 KSI4 KSI3 KSI2 KSI1 KSI0 KSO15 KSO14 KSO13 KSO12 KSO11 KSO10 KSO9 KSO8 KSO7 KSO6 KSO5 KSO4 KSO3 KSO2 KSO1 KSO0
LED+
12
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
CP5
1 8 2 7 3 6 4 5
8P4C-100PF
CP6
1 8 2 7 3 6 4 5
8P4C-100PF
KSO[0..15] KSI[0..7]
JP19
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
INT_KB
SW2
3
4
HCH SMT1-02
EC_ON27
ON/OFF BUTTON
+3VALW
22K
2
B
DTC124EK
1 2
22K
12
ON/OFFBTN#
13
C
E
R315
100K
Q29
1
1 2
R317 0
13
2
G
@2N7002
Q30
D26
3
DAN202U
ON/OFF
2
D
S
ON/OFFBTN# 27 EC_ON# 32
12
C384
0.01UF_0402
D27
12
RLZ20A
2 1
5 IN 1 CONN
+5VS +5VS
FBM-11-160808-121
USB5_D+16 USB5_D-16 CR_LED#18
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPER TY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
R380
R381
FBM-11-160808-121
L_USB5_D+
12
L_USB5_D-
12
CR_LED# CR_LED#
JP22
1
1
2
2
3
3
4
4
5
5
6
6
4 in1 CONN
7
7
8
8
L_USB5_D+
9
9
L_USB5_D-
10
10
11
11
12
12
CP7
KSO2
1 8
KSO4
2 7
KSO7
3 6
KSO8
4 5
8P4C-100PF
CP8
KSO9
1 8
KSO0
2 7
KSO5
3 6
KSO1
4 5
8P4C-100PF
NEED CLOSEST JP18 ADD BY EMI REQUEST
LID SW
LID_SW#27
Title
SCHEMATIC M/B LA-1571
Size Document Num ber Rev
401238
Date: Sheet
期一 六月
LID_SW#
Compal Electronics, Inc.
, 21, 2004
SW3
3
4
HORNG CHIH
1
2
of
26 38
3B
Page 27
A
+3VALW
CB83
4.7UF_10V_0805
1 1
+5VS
2 2
PS2_DATA PS2_CLK
FSEL# SELIO# FRD#
EC_SMI#
EC_SMD_2 EC_SMC_2 EC_SMD_1 EC_SMC_1
3 3
+3VALW
R328 20K_0402
1 2 1 2
R330 20K_0402
4 4
0.1UF_0402
L13
1 2
BLM11A20
L14
1 2
BLM11A20
ADB[0..7] KBA[0..18]
RP125
10
9 8 7 6
10P8R_10K
RP126
1 8 2 7 3 6 4 5
8P4R-10K_0804
RP127
1 8 2 7 3 6 4 5
8P4R-4.7K_0804
12
C385
12
0.1UF_0402
C390
0.1UF_0402
1 2
ECAGND
LID_SW# MSEN#
C386
1 2 3 4 5
+3VALW
+5VALW
12
C387
12
C391 1000PF_0402
GATEA2015
ADB[0..7] 28 KBA[0..18] 28
KBD_DATA KBD_CLK EXT_DATA EXT_CLK
C393
10PF_0402
+3VALW
0.01UF_0402
EC_AVCC+3VALW
10K_0402
RC#15
+5VS
12
32.768KHZ
R47 10K_0402
X3
1 2
+3VS
R319
R320
10K_0402
1 2
1 2
R329 20M_0603
1 2
12
C394 10PF_0402
+3VALW +3VS
SIRQ15,21,25
LFRAME#16,25
LAD016,25 LAD116,25 LAD216,25 LAD316,25
CLK_PCI_LPC12
+3VALW
EC_RST#
D28 RB751V
2 1
KSI[0..7]26
KSO[0..15]26
CLK_LPC_EC
12
R322 @10
12
C392 @15PF_0402
KBD_CLK29
KBD_DATA29
EXT_CLK29
EXT_DATA29
PS2_CLK23
PS2_DATA23
LID_SW#26
MIC_MUTE23
R331
12
120K_0402
EC_SMI#16
PCM_SUSP#21
SLP_S1#12,16
Wireless_OFF#24 PM_RSMRST#16,21,22
BKOFF#13
B
CB85
4.7UF_10V_0805
SCI#16
2 1
D29 RB751V
KSI[0..7] KSO[0..15]
MSEN#14,29
SWI#16
SYSON31
SUSP#25,31,36
VR_ON31,37
ENABLT6,13
FSEL#28
C
123
EC_AVCC
136
157
166
VCC4
VCC5
VCC6
AD Input
DA output
PWM or PORTA
PORTB
IOPB7/RING/PFAIL/LRESET2
PORTC
PORTD-1
PORTE
PORTH
PORTJ-1
PORTD-2
PORTK
PORTL
95
AVCC
IOPD2/EXWINT24/LRESET2
IOPE7/CLKRUN/EXWINT46
PORTI
161
VBAT
AD0 AD1 AD2
AD3 IOPE0AD4 IOPE1/AD5 IOPE2/AD6 IOPE3/AD7
DP/AD8 DN/AD9
DA0
DA1
DA2
DA3
IOPA0/PWM0 IOPA1/PWM1 IOPA2/PWM2 IOPA3/PWM3 IOPA4/PWM4 IOPA5/PWM5 IOPA6/PWM6 IOPA7/PWM7
IOPB0/URXD IOPB1/UTXD
IOPB2/USCLK
IOPB3/SCL1 IOPB4/SDA1
IOPC0
IOPC1/SCL2
IOPC2/SDA2
IOPC3/TA1
IOPC4/TB1/EXWINT22
IOPC5/TA2
IOPC6/TB2/EXWINT23
IOPC7/CLKOUT
IOPD0/RI1/EXWINT20 IOPD1/RI2/EXWINT21
IOPE4/SWIN
IOPE5/EXWINT40
IOPE6/LPCPD/EXWIN45
IOPH0/A0/ENV0
IOPH1/A1/ENV1 IOPH2/A2/BADDR0 IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
IOPH6/A6 IOPH7/A7
IOPI0/D0 IOPI1/D1 IOPI2/D2 IOPI3/D3 IOPI4/D4 IOPI5/D5 IOPI6/D6 IOPI7/D7
IOPJ0/RD
IOPJ1/WR0
SELIO IOPD4
IOPD5 IOPD6 IOPD7
IOPK0/A8
IOPK1/A9 IOPK2/A10 IOPK3/A11 IOPK4/A12
IOPK5/A13/BE0 IOPK6/A14/BE1
IOPK7/A15/CBRD
IOPL0/A16 IOPL1/A17 IOPL2/A18 IOPL3/A19
IOPL4/WR1
U25
1 2
1UF_10V_0603
81 82 83 84 87 88 89 90 93 94
99 100 101 102
32 33 36 37 38 39 40 43
153 154 162 163 164 165
168 169 170 171 172 175 176 1
26 29 30
2 44 24 25
124 125 126 127 128 131 132 133
138 139 140 141 144 145 146 147
150 151
152 41
42 54 55
143 142 135 134 130 129 121 120
113 112 104 103 48
EC_3VDD
12
C388
0.1UF_0402
7 8
9 15 14 13
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7
KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15
10 18 19 22 23
31
5
6
71 72 73 74 77 78 79 80
49 50 51 52 53 56 57 58 59 60 61 64 65 66 67 68
105 106 107 108 109
110 111 114 115 116 117 118 119
158 160
62 63 69 70 75 76
148 149 155 156
3
4 27 28
173 174
47
CLK_LPC_EC
R318 100K
SCI#
EC_TINIT# EC_TCK EC_TDO EC_TDI EC_TMS
KBD_CLK KBD_DATA EXT_CLK EXT_DATA PS2_CLK PS2_DATA LID_SW#
CRY1 CRY2
EC_SMI# MSEN#
FSEL# KBA18
16
VDD
SERIRQ LDRQ LFRAME LAD0 LAD1 LAD2 LAD3 LCLK LREST1 SMI PWUREQ
IOPD3/ECSCI
GA20/IOPB5 KBRST/IOPB6
KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7
KBSOUT0 KBSOUT1 KBSOUT2 KBSOUT3 KBSOUT4 KBSOUT5 KBSOUT6 KBSOUT7 KBSOUT8 KBSOUT9 KBSOUT10 KBSOUT11 KBSOUT12 KBSOUT13 KBSOUT14 KBSOUT15
TINT TCK TDO TDI TMS
PSCLK1/IOPF0 PSDAT1/IOPF1 PSCLK2/IOPF2 PSDAT2/IOPF3 PSCLK3/IOPF4 PSDAT3/IOPF5 PSCLK4/IOPF6 PSDAT4/IOPF7
32KX1/32KCLKOUT 32KX2
IOPJ2/BST0 IOPJ3/BST1 IOPJ4/BST2 IOPJ5/PFS IOPJ6/PLI IOPJ7/BRKL_RSTO
IOPM0/D8 IOPM1/D9 IOPM2/D10 IOPM3/D11 IOPM4/D12 IOPM5/D13 IOPM6/D14 IOPM7/D15
SEL0 SEL1 CLK
VCC134VCC245VCC3
Host interface
Key matrix scan
JTAG debug port
PS2 interface
PORTJ-2
PORTM
+RTCVCC
CB84
BATT_TEMP
R321
EC_SMC_1 EC_SMD_1 EC_PCIRST#
EC_SMC_2 EC_SMD_2
PCI_PME#
KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
FRD# FWR#
SELIO#
KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15
KBA16 KBA17
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1 2
C389 0.01UF_0402
CONA#
0
FSTCHG 33
D
BATT_TEMP 34
ECAGND
BATT_OVP 33 CONA# 29 LI/NIMH# 34 KB_ID1 26 KB_ID2 26
DAC_BRIG 13 EN_FAN1 3 IREF 33
INVT_PWM 6,13 BEEP# 23 FAN_PWM ACOFF 33 PM_BATLOW# 16 EC_ON 26 LID_OUT# 16 EC_THERM# 16
SMB_EC_CK1 28,34 SMB_EC_DA1 28,34 PCIRST# 6,11,15,18,19,20,21,24,25
PWRBTN_OUT# 16 EC_SMC2 3 EC_SMD2 3 FANSPEED1 3 WL_LED# 23 EC_MUTE 23
BT_LED# 23 ACIN 15,32,35
SLP_S4# 16 SLP_S3# 16
ON/OFFBTN# 26 SLP_S5# 16 RING# 25 PM_CLKRUN# 16,21,24,25
FREAD# 28 FWR# 28
SELIO# 28 SCROLLED# 26
NUMLED# 26 CAPSLED# 26 KB_LED# 26
BADDR1-0
*
0 0 0 1 1 0 1 1
Index Data
4E 4F
(HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1
*
SHBM=1: Enable shared memory with host BIOS TRIS=1: While in IRE and OBD, float all the signals for clip-on ISE use
KBA1
(ENV1)
KBA2
(BADDR0)
KBA3
(BADDR1)
KBA5
(SHBM)
CONA#
PCM_PME#19,21,24
MINI_PME#19,21,24
LAN_PME#19,21,24
EC DEBUG port
JP23
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
@96212-1011S
E
I/O Address
Reserved
ENV0 ENV1
IRE
00
OBD
0011 DEV PROG
11
100K_0402
EC_TINIT# EC_TCK EC_TDO EC_TDI EC_TMS
2F2E
R32310K_0402
R325@10K_0402
R32610K_0402
R392
PCI_PME#
+3VALW
R32410K_0402
+3VALW
+5VALW
12
TRIS
0 0 0 0
R327 20K
GND5
159
GND6
167
GND7
137
AGND
96
ECAGND
NC1
11
C
NC212NC320NC421NC585NC686NC791NC892NC997NC10
98
Compal Electronics, Inc.
Title
SCHEMATIC M/B LA-1571
Size Document Number Rev Custom
401238
Date: Sheet
星期一
21, 2004
D
六月
27 38,
E
of
PC87591L
A
B
GND117GND235GND346GND4
122
Page 28
+3VALW
U21B
R333
20K_0402
OUTPUT
ADB0
ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
6
CB86
1 2
1UF_10V_0603
3
11
1
+5VALW
20
D0
VCC
D14Q1 D27Q2 D38Q3 D413Q4 D514Q5 D617Q6 D718Q7
CLK CLR
0.1UF_0402
1 2
U27
Q0
GND
74HCT273
10
C396
2 5 6 9 12 15 16 19
FULL_LED# 23 POWER1_LED# 23 POWER2_LED# 23 CHARGING_LED# 23
SW_PCIRST# 15 BT_DETACH 23 BT_PD 23
INPUT
RP128
8P4R-100K_0804
1 8
2 7
3 6
4 5
USER_BTN0#26 USER_BTN1#26 BT_BTN#26 WL_BTN#26 BT_WAKEUP23
U21C
147
KBA1
SELIO#27
SELIO#
74LVC32
9
10
8
1 2
R420
1K_0402
1 2
R332
1K_0402
1A121Y1 1A241Y2 1A361Y3 1A481Y4 2A1112Y1 2A2132Y2 2A3152Y3 2A4172Y4
1
1G
19
2G
+3VALW
20
VCC
GND
10
+3VALW
C395
1 2
U26
74LVC244
0.1UF_0402
18 16 14 12 9 7 5 3
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
0.1UF_0402 C397
KBA2 SELIO#
12
+5VALW
+3VALW
4 5
147
74LVC32
1 2
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
KBA[0..18] ADB[0..7]
U28
A18 A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 VSS
@39F040_TSOP
U30
NC A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 VSS
SST39VF040
KBA18 KBA16 KBA15 KBA12 KBA7 KBA6 KBA5 KBA4 KBA3 KBA2 KBA1 KBA0 ADB0 ADB1 ADB2
KBA[0..18]27 ADB[0..7]27
KBA18 KBA16 KBA15 KBA17 KBA12 KBA14 KBA7 KBA13 KBA6 KBA8 KBA5 KBA9 KBA4 KBA11 KBA3 KBA2 KBA10 KBA1 KBA0 ADB0 ADB6 ADB1 ADB2
VCC WE*
A17 A14 A13
A11 OE* A10
CE* DQ7 DQ6 DQ5 DQ4 DQ3
VCC WE*
DQ7 DQ6 DQ5 DQ4 DQ3
A17 A14 A13
A11 OE* A10 CE*
1 2
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
8 7 6 5 4 3 2 1 32 31 30 29 28 27 26 25
+3VALW
C399
0.1UF_0402
FWE#
ADB7 ADB5
ADB4 ADB3
FWE# KBA17 KBA14 KBA13 KBA8 KBA9 KBA11 FREAD# KBA10 FSEL# ADB7 ADB6 ADB5 ADB4 ADB3
FREAD# 27 FSEL# 27
11
U21D 74LVC32
+5VALW +5VALW
C398
1 2
0.1UF_0402
SMB_EC_CK127,34 SMB_EC_DA127,34
+3VALW
12
R337 20K_0402
147
12 13
2
1 3
Q31
2N7002
FWR# 27
SUS_STAT# 16
FLASH# 16
12
8 7 6 5
R335 1K_0402
U29
VCC WC SCL SDA
NM24C164
GND
12
R334 10K_0402
1 2 3 4
12
R336 1K_0402
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPER TY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
SCHEMATIC M/B LA-1571
Size Document Num ber Rev
401238
Date: Sheet
Compal Electronics, Inc.
, 21, 2004
期一 六月
of
28 38
3B
Page 29
A
B
C
D
E
2
C414
2
334
13
DGS
2N7002
USB0_D-
USB0_D+
USB0_D­USB0_D+
150UF_10V_E
USB2_D-
2
USB2_D+
USB4_D­USB4_D+
12
+
CE27
150UF_10V_E
LINE_OUT_PLUG#
USB0_VCC
USB2_D+16
USB2_D-16
150UF_10V_E
USB4_VCC USB4_D-
USB4_D+
Q32 2N7002
1 3
1 3
Q34 2N7002
USB PORT 0
JP24
1
VCC
D-
D+
GND
2551A-04G2T
1 1
2 3 4
R_USB0_D-
R_USB0_D+
USBGND0
L30
.
112
4
334
.
@WCM2012F2S-900T08
1 4 2 3
RP129 4P2R_0
USB PORT 2
USB_4+5VALW
12
12
@WCM2012F2S-900T08
L31
.
4
.
1 4 2 3
RP130 4P2R_0
FBM-L11-201209-800
L24
1 2
R346
470K_0603
470PF_0402
R347
560K_0603
Q33
112
JP26
1
VCC
R_USB2_D-
2
D-
R_USB2_D+
3
D+
USBGND2
4
GND
2551A-04G2T
2 2
USB PORT 4
F6
POLYSWITCH_0.75A
OC#416
3 3
4 4
12
C416
1000PF_0402
INTSPK_R+23
LINE_OUT_PLUG23
INTSPK_L+23
CE25
USB2_VCC
CE26
DGS
2
2
DGS
+
USB4_D- 16 USB4_D+ 16
USB0_D- 16 USB0_D+ 16
L15
FBM-L11-201209-800
12
C402 470PF_0402
USB2_D+ USB2_D-
L20
FBM-L11-201209-800
12
+
C411
470PF_0402
@WCM2012F2S-900T08
L32
.
2
112
4
334
.
14
DQLINE_OUT_R
R350
12
100K_0402
DQLINE_OUT_L
23
RP131 4P2R_0
USB_0 +5VALW
12
12
R338
470K_0603
12
R341
560K_0603
12
12
R344
470K_0603
12
R345
560K_0603
R_USB4_D­R_USB4_D+
USBGND4
C417 150UF_6.3V_D2
+
1 2
+12VS
+
DLINE_OUT_L
1 2
C418 150UF_6.3V_D2
F2
POLYSWITCH_0.75A
12
C406
0.01UF_0402
+5VALWUSB_2
F5
POLYSWITCH_0.75A
12
C413
0.01UF_0402
1 2 3 4
DLINE_OUT_R
OC#0 16
JP28
VCC D­D+ GND
2551A-04G2T
LEFT
OC#2 16
MIDDLE
RIGHT
+5VALW
12
C431 .1UF_0402
U34
1
GND
2
IN
3
EN1# EN2#4OC2#
TPS2042A@CY27
OC1# OUT1 OUT2
8 7 6 5
OC#2 16 SPRUSB_VCCA SPRUSB_VCCB
OC#3 16
SPR CONN 204PIN
JP27
SPR@CY27
100
KBD_CLK27
KBD_DATA27
EXT_CLK27
EXT_DATA27
+5VS
DSR#125
RTS#125
RI#125
LPTSTB#25
LPD025 LPD125
LPD225 LPD325 LPD425
LPD525 LPD625 LPD725
DOCK_OUT_PLUG23
DLINE_IN_L23
330_0402
DLINE_IN_R23
R_USB3_D­R_USB3_D+
SPRUSB_VCCB
D_VSYNC14 D_DDCCLK14 D_DDCDATA14
MSEN#14,27
D_LUMA14
LED1_GRNN19
LED2_YELN19
R389 FBM-11-160808-121
USB3_D-16 USB3_D+16
1 2 1 2
R390 FBM-11-160808-121
+3VALW +3VALW
1 2 1 2
R349
R348
220_0402
99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56
52 2
50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27
DLINE_OUT_L
26
DLINE_OUT_R
25 24 23
MIC
22
USB- signal
21 20
USB+ signal
19 18 17 16 15 14 13 12 11 10 9 8 7 6
101
SPRUSB_VCCA
P1
CONA# 27 DCD#1 25 RXD1 25 TXD1 25CTS#125 DTR#1 25 LPTAFD# 25 LPTERR# 25 LPTINIT# 25 LPTSLCTIN# 25
LPTACK# 25 LPTBUSY 25 LPTSLCT 25 LPTPE 25
DOCK_MIC_PLUG 23 DOCK_MIC 23
D_HSYNC 14 D_BLUE 14
D_GREEN 14 D_RED 14 D_CRMA 14 RJ45_RX+ 19 RJ45_RX- 19 RJ45_TX+ 19 RJ45_TX- 19
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR
A
B
DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
SCHEMATIC M /B LA- 1571
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
401238
星期一 六月
3B
of
29 38, 21, 2004
E
Page 30
+3VALW
+3VALW
U20D
14
74LVC14
12
R355
47K_0402
12
C420
1UF_0805
9 8
VCCcore_POK6,12,37
+3VS
12
R357
330K_0402
R353
1 2
0_0402
+3VALW
U20F
14
74LVC14
13 12
12
2
G
14
11 10
C419 @1UF_0603
13
D
S
U20E 74LVC14
Q35 2N7002
D30 RB751V
21
+3VS
12
R354
10K_0402
PM_POK 16
R356
1 2
0_0402
VGATE 16
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPER TY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
SCHEMATIC M/B LA-1571
Size Document Num ber Rev
401238
Date: Sheet
Compal Electronics, Inc.
, 21, 2004
期一 六月
of
30 38
3B
Page 31
A
B
C
D
E
+1.5VALW To +1.5VS Transfer
+1.5VALW
U32
D D D D
SI4800
1
S
2
S
3
S
4
G
C425
0.01U_0402
1 1
8 7 6 5
C424
4.7U_0805_10V4Z
+1.5VS
C422
4.7U_0805_10V4Z
RUNON
1 2
R360 100K_0402_5%
13
D
2
G
Q38
S
2N7002
C423 .1U_0402_16V4Z
+12VALW
SUSP
+5VALW to +5VS Transfer
SI4800
S S S
G
RUNON
+5VALW
12
+
1 2 3 4
CE29 10UF_1206
+5VS+5VALW
12
C427
0.1UF_0402
12
CB92 10UF_1206
CB93
8 7 6 5
+5VALW
U33
D D D D
12
2 2
4.7UF_10V_0805
+2.5V to +2.5VS Transfer
+2.5V
12
CB87
1UF_10V_0603
13
RUNON
D
Q36
2
G
SI2306DS
S
+2.5VS
12
CB90
1UF_10V_0603
+12VALW TO +12VS Transfer
+12VALW
12
CB91
1UF_25V_0805
2
Q39
1 3
NDS352P
+12VS
12
CB94
1UF_25V_0805
12
C426
0.1UF_0402
SUSP#
2
+12VALW
12
R362 100K_0402_5%
12
R366 51K_0402
13
Q42
2N7002
+3VALW to +3VS Transfer
+3VS
U31
SI4800
1
S
D
2
S
D
3
S
D
4
G
D
SYSON#36
SYSON27
12
+
CE28 10UF_1206
+3VALW
12
8 7 6 5
CB89 10UF_10V_1206
12
10UF_1206
RUNON
CB88
+5VALW
SYSON#
2
12
C421
0.1UF_0402
12
R365 47K_0402
13
Q43
2N7002
Discharge circuit
2
2
G
G
+1.25VS
12
13
12
13
R368 100_0402_5%
D
Q45 2N7002
S
R375 100_0402_5%
D
Q52 2N7002
S
12
R369 100_0402_5%
13
D
Q46
2
2N7002
G
S
12
R376 100_0402_5%
13
D
Q53
2
G
2N7002
S
B
3 3
SUSP SUSP SYSON#SUSP
SUSP SUSP SUSP SUSP
4 4
12
R367 100_0402_5%
13
D
Q44
2
2N7002
G
S
+2.5VS +5VS+3VS +12VS
12
R374 100_0402_5%
13
D
Q51
2
G
2N7002
S
A
+2.5V+1.2VS +1.5VS
12
R370 100_0402_5%
13
D
Q47
2
2N7002
G
S
12
R377 100_0402_5%
13
D
Q54
2
G
2N7002
S
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VR_ON27,37
C
2
G
+5VALW
R372 100K_0402_5%
VR_ON#
13
D
Q50 2N7002
S
+CPU_CORE
2
G
12
R373 100_0402_5%
13
D
Q48 2N7002
S
SUSP36
SUSP#25,27,36
Title
SCHEMATIC M /B LA- 1571
Size Document Number Rev
401238
Date: Sheet
D
星期一 六月
+5VALW
12
R371 10K_0402
SUSP
13
Q49
2
2N7002
Compal Electronics, Inc.
E
31
3B
38, 21, 2004
of
Page 32
A
B
C
D
Vin Detector
VIN+
1
2
EC10QS04
PD1
PR8 1K_1206
1 2
PR10 1K_1206
1 2
PR11 1K_1206
1 2
12
PCN1
3
1
3
2
2DC-S315-B01
PD2 IN4148
12
1 1
2 2
VIN
FBM-L18-453215-900LMA 90T_1812
PC1
1000PF_0603_50V
B++
PL1
1 2
PC2
100PF_0402_50V
PC3
1000PF_0603_50V
VIN
PC4
100PF_0402_50V
PC6
1000PF_0603_50V
84.5K_0402_1%
12
VIN
PD4 IN4148
1 2
PD5
2 1
PZD3
RLZ4.3B
RB751V
100K_0402
1 2
PR21 22K_0402
12
PR20
12
VS+
TP0610T
12
ON_G
PC12
0.22UF_1206_25V
PQ1
13
2
VMB
3 3
CHGRTCP
EC_ON#26
VIN_L
PR18 33_1206
1 2
12
PC11
0.1UF_0603_50V
VS
MAINPWON34,35
ACON33
1 2
PD3
3
RB715F
High 18.784 17.901 17.077 V Low 17.877 17.043 16.195 V
VIN
12
PR3
PR5
12
22K_0402_1%
1 2
PC7
0.01UF_0402_16V
12
DIN
PR6
20K_0402_1%
VS
12
PR13
10K_0402
PRG
(6.0V)
PZD2 RLZ6.2C
2 1
ACIN
Precharge detector
16.6 15.9 15.2
13.48 12.93 12.09
BAT ONLY
1 2
0.01UF_0603_50V PC5
3 2
PR9 10K_0402
PU1B LM393M
7
12
PC9
1000PF_0603_50V
PR1 1M_0402_1%
VS
PU1A
84
LM393M
+
-
12
RTCVREF
(3.3V)
PR12 1M_0402_1%
5
+
6
-
12
1
12
PC10
0.01UF_0402_16V
RTCPWR
3.1V
PR16 10K_0402
1 2
PQ2 2N7002
VS
12
PR2
10K_0402
12
12
PRG++
13
D
S
PQ3
DTC115EUA
PZD1 RLZ4.3B
PR17 215K_0402_1%
2
G
12
PR7 10K_0402
13
PR4 1K_0402
1 2
B++
12
PR14 499K_0402_1%
12
PR15 499K_0402_1%
100K
100K
PACIN
PRG+
PR19 47K_0402
2
12
+5VALWP
ACIN 15,27,35
PACIN 33
12
PC8 1000PF_0603_50V
PACINPRG+_G
Precharge detector
(3.3V)
RTCVREF
4 4
CHGRTC
1 2
PR23 200_0805
PC14 10UF_1206_10V
A
S-81233SG(SOT-23)
3
3
PU2
2
2
1
1
CHGRTCP
PR22 200_0805
CHGRTCP+
PC13 1UF_0805_50V
2 1
PZD4 RLZ16B
B
8.597 8.247 7.904
6.310 6.101 5.683
THIS SHEET OF EN GINE ERI NG DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION I T CONTA INS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Compal Electronics, Inc.
Title
SCHEMATIC M/B L A-1571
Size Document Number Rev
B
Date: Sheet
星期一
401238 3B
21, 2004
六月
D
of
32 38,
Page 33
A
B
C
D
1 1
PQ4
SI4835DY
ACOFF#
8 7
5
PD6
1SS355
1 2
PR33
10K_0402
1 2
VIN
12
PR25
20K_0402
2 2
PACIN32
ACON32
IREF=1.235*Icharge
P2 P3
PQ5
1 2 36
4
2
G
SI4835DY
1 2 3 6
12
12
L_1T
13
0.1UF_0402_10V
PR26 200K_0402
L_1
PR30 150K_0402
D
PQ9 2N7002
S
4
PC20
8 7
5
12
12
PR35
12.7K_0402_1%
12
0.1UF_0402_10V
PC23
(1.73V)
12
PR34 24K_0402_1%
(5.0V)
IREF=0.6 ~ 3.248V
12
PR53
2.2K_0402
1 2
PR39
140K_0603_0.1%
PU4A LM358A
1
PR43
100K_0603_0.1%
VS
84
3
+
2
-
12
PC30
0.1UF_0603_50V
PR54
200K_0402_1%
12
PC27
0.1UF_0402_10V
VMB
12
PR48
L_7
12
PR49
L_8
12
604K_0402_1%
1M_0402_1%
IREF27
3 3
OVP voltage : LI-MH 8 CELL(4S2P)
VMB : 18.0V--> BATT_OVP : 2.0V
(BAT_OVP voltage = 0.110865 *VMB)
BATT_OVP27
4 4
0.1UF_0402_10V
PC33
12
A
Iadp=0~3.46A
PR24
0.02_2512_1%
PR32 10K_0402_1%
PR36 10K_0402_1%
1 2
PC21
4700PF_0402_25V
1 2
PC24
2200PF_0402_25V
PR41 10K_0402_1%
PC34
0.01UF_0603_50V
B
12
12
1 2
PR37 10K_0402_1%
1 2
12
SDREF
PU3 MB3878
1
-INC2
2
OUTC2
3
+INE2
4
-INE2
5
FB2
6
VREF
7
FB1
8
-INE1
9
+INE1
10
OUTC1
11
OUTD
12
-INC1
(1.25V)
B+
FBM-L18-453215-900LMA 90T_1812
1 2
24
+INC2
23
GND
22
CS
21
VCC(o)
20
OUT
0.1UF_0603_50V
VH
19
VH
18
VCC
1 2
17
RT
PR38 68K_0402
16
-INE3
FB3
CTL
+INC1
0.1UF_0402_10V
15
14
13
PR51 0_0402
PC32
PR42 47K_0402_1%
1 2
CHARGE
12
PL2
PR31 0_0402
PC22
1 2
12
12
PR29
12
0_0402
L_3
L_4
1 2
PC26
1 2
1500PF_0402_50V
1 2
PR44 1K_0402
PR46
49.9K_0603_0.1%
PC15 10UF_1210_25V
PC18 2200PF_0402_25V
1 2
1 2
PC19
0.1UF_0603_50V
PC25
0.1UF_0603_50V
(4.2V)
12
12
PC16
4.7UF_1210_25V
L_5
PD7 1SS355
1 2
12
PR45 47K_0402
12
PC17
0.1UF_0603_50V
FSTCHG 27
EC31QS04
12
PR47 150K_0603_0.1%
36
578
LXCHRG
SLF12565T_220M
12
PD8
L_6
+2.5VP
12
PR50
PU4B LM358A
5
+
7
THIS SHEET OF EN GINE ERI NG DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION I T CONTA INS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
-
SDREF_L
6
10K_0402_1%
L_9
12
PR52
10K_0402_1%
C
PC31
0.1UF_0402_10V
B++
PQ6 SI4835DY
1 2 3 6
ACOFF#
241
PQ7 SI4835DY
1 2
13
100K
100K
4
L_2
PR27 10K_0402
2
PQ8 DTC115EKA
8 7
5
1 2
PR28 47K_0402
ACOFF 27
CC=0(0.5A) ~ 2.7A CV=16.825V (8 CELLS)
PL3
1 2
1 2
PR40
0.02_2512_1%
12
PC29
PC28
10UF_1210_25V
4.7UF_1210_25V
CHARGE 34
RevCode = 3B
Compal Electronics, Inc.
Title
SCHEMATIC M/B L A-1571
Size Document Number Rev
B
Date: Sheet of
星期一
21, 2004
六月
401238
D
VIN
BATT+
12
33 38,
Page 34
A
B
C
D
PJP1
3MM
21
+5VALW+5VALWP +12VALW
+12VALWP
PJP4
3MM
PJP7
2MM
21
21
+3VALWP
1 1
+1.5VALWP
VMB
FBM-L18-453215-900LMA 90T_1812
12
PC37
1000PF_0603_50V
2 2
PCN2
1 2 3 4 5 6 7 8
SUYIN_25037A-08G1-C
3 3
4 4
VMB
ID
AB/I
TS
EEPROMVCC
12
*
+3VALW
+1.5VALW
PR69
100_0402
+1.2VP
PL4
1 2
*
1 2
PJP2
2MM
PJP5
3MM
BATT+
12
PC36
0.1UF_0603_50V
PR66 1K_0402
1 2
1K_0402
1 2
PR70 100_0402
1
PD12 @BAS40-04
21
21
@1K_0402_1%
12
PR67
PR68
25.5K_0402_1%
3
2
PR63
+1.2VS
+3VALWP
3
3
PR56 @100K_0402_1%
BATT_TEMP
1
2
2
1
+1.25VP
PR61 @1K_0402_1%
PD10
@BAS40-04
PD11 @BAS40-04
+3VALWP
PJP3
4MM
PJP6
3MM
LI/NIMH# 27
BATT_TEMP 27
+3VALWP
SMB_EC_DA1 27,28
SMB_EC_CK1 27,28
21
21
+2.5V+2.5VP
+1.25VS
BATTERY
PC42
0.1UF_0402_10V
PC38
0.1UF_0402_10V
PR71
3.65K_0402_1%
L_11T
PH1 under CPU botten side :
CPU thermal protection at 90(91)+-3 degree C Recovery at 50(51)+-3 degree C
RTCVREF
CPU
*
PR58
3.65K_0402_1%
L_10T
PTH1 10K_1%
L_10
PR62
18.2K_0402_1%
PR55
100K_0402_1%
PR60 1K_0402_1%
PR65
249K_0402_1%
rev
PC39
PC119
0.1UF_0402_10V
47K_0402_1%
PR57
3 2
1000PF_0603_50V
VS
84
+
1
-
PU5A
LM393M
PR64
470K_0402
PH2 near main Battery CONN :
BAT. thermal protection at 85(86)+-3 degree C Recovery at 50(51) degree C
RTCVREF
PC41
0.1UF_0402_10V
7
PR76
470K_0402
VS
PR73 10K_0402
OTP_B
21
PZD6 RLZ3.6B
PTH2 10K_1%
L_11
PR75
19.1K_0402_1%
PR74 1K_0402_1%
PR72 47K_0402_1%
5
rev
6
84
+
-
PU5B LM393M
PR59
10K_0402
OTP_C
21
PZD5
RLZ3.6B
PD13 1SS355
PC43
0.1UF_0402_10V
PQ11
DTC115EKA
12
PC35
0.1UF_0603_50V
PD9
OTP
12
1SS355
PC40
0.1UF_0402_10V
100K
2
100K
OTP
100K
2
CPU_ON
13
PQ12
DTC115EKA
2
100K
100K
CHARGE
13
100K
PQ10 DTC115EKA
37
MAINPWON
13
33
32,35
THIS SHEET OF EN GINE ERI NG DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION I T CONTA INS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
A
B
INC.
C
Compal Electronics, Inc.
Title
SCHEMATIC M/B L A-1571
Size Document Number Rev
B
Date: Sheet
星期一
21, 2004
六月
401238 3B
D
of
34 38,
Page 35
A
1 1
B++
12
PC47
0.1UF_0603_50V
12
PC48
PC49
2200PF_50V
10UF_1210_25V
SI4814DY
1 2 3 4
G1
D1 D1
S1/D2
G2
S1/D2 S1/D2
S2
PQ13
+3.3V Ipeak = 6.66A ~ 10A
12
12
PL5
SLF12565T_100M
2 2
12
PR82
PC60
12
150U_D3L_4VM_R18
+
0.012_2512_1%
PD16 EP10QY03
2 1
1 2
1 2
+3VALWP
12
+
PC59
@150UF_D_6.3V_FP
3 3
PR87
3.57K_0402_1%
PR90
L_BT3
1 2
10K_0402_1%
PC57 47PF_0402_50V
PR83 1M_0402
12
PC61
270PF_0402_50V
FB3_L
0.1UF_0603_50V
8 7 6 5
1 2
DH3
DL3
B
PC46
ACIN15,27,32
PR78 0_0402
1 2
CSH3
1 2
PR86 10K_0402
@300K_0402
VS
12
PR94 47K_0402
12
PC67
0.047UF_0603_50V
PR88
L_14
BST31
12
PR202 0_0402
25 27 26
24
1 2
3 10 23
7 28
12
PC65 680PF_0402_50V
12
VS
PD29
1SS355
1 2
L_12 L_13
12
PR79 10_1206
12
PC55
0.1UF_0603_50V
22
BST3
V+ DH3 LX3
DL3
CSH3 CSL3
MAX1632
FB3 SKIP# SHDN#
TIME/ON5 RUN/ON3
12
PR93 47K_0402
MAINPWON
PC68
0.047UF_0402_16V
PU6
DAP202U
PD15
2
1
12
21
12OUT
VL
VDD
BST5
DH5
DL5 PGND CSH5
CSL5
FB5
SEQ
REF
SYNC
RST#
GND
8
VL
C
3
VL
4.7UF_1206_10V
4 5 18 16 17 19 20 14 13 12 15 9 6 11
PR165
2.7K_1206
2
G
+12VALWP
PC51
ACIN 15,27,32
LX5
MAINP WON 32,34
BST51
12
13
D
S
PQ50 2N7002
PR92 @0_0402
1 2
PR95 0_0402
12
PC56
4.7UF_1210_25V
BST51+
2.5VREF
12
PC62
4.7UF_1206_10V
12
PC50
0.1UF_0603_50V
1 2
PR80 0_0402
1 2
L_15
LX5
VL
FB5_L
PC52
2200PF_50V
1 2
PR81 0_0402
D
B++
12
PC53
0.1UF_0603_50V
270PF_0402_50V
1 2
PC45
470PF_0805_100V
12
DH5
DL5
CSH5
PC66
PC54
10UF_1210_25V
12VDD
12
PR77 22_1206
12
SI4814DY
1
D1
2
D1
S1/D2
3
G2
S1/D2
4
S1/D2
S2
PQ14
PR89
10.5K_0402_1%
G1
FLYBACKSNB
8 7 6 5
12
12
E
PC44
2.2UF_1206_25V
1 2
12
PD14 EC11FS2
1 4
3 2
PT1
CST12057T-100M5R0-T
12
PC58 47PF_0402_50V
L_BT5
12
PR84 2M_0402
PD17
EP10QY03
PR91
10K_0402_1%
2 1
12
PR85
0.012_2512_1%
12
12
+
+
PC64
PC63
120U_D3L_6.3VM_R18
+5V Ipeak = 6.66A ~ 10A
+5VALWP
@47UF_D_6.3V_PC
4 4
THIS SHEET OF ENGINEERING DRAWING I S THE PRO PRIET ARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET IN F O RMATION. T HI S SHEET M AY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEIT HER THI S SHEET NOR
A
B
C
THIRD PART Y W ITHOUT PR IO R W RITTEN CONSENT OF COMPAL ELECTRONICS,
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC M /B LA- 1571
星期一 六月
401238
3B
of
35 38, 21, 2004
E
Page 36
A
B
C
D
+5VALWP
(+2.5V +-5%)
PL6
LA3
LX2.5
PC75
PQ19
LX1.5
12
12
SLF12565T_4R2M
191K_0402_1%
LA2
12
12
PR97
13
100K
100K
PL8
TPRH6D38-5R0M
1 2
191K_0402_1%
LB3
LB2
*
PR153 187K_0603_1%
12
PR101
47K_0402
1 2
2
PR107
100K
100K
PC69
12
13
B
D
S
1 1
PD18 RB751V
PR99 1K_0402
2
1 2
1 2
12
31
HMBT2222A
PD22 RB751V
PR109 1K_0402
2
PQ17
2
HMBT2222A
A
12
PC71
10UF_1210_25V
2200PF_0402_25V
2 2
3 3
PC85
4.7UF_1206_16V
2200PF_0402_25V
4 4
PC72
PQ18
2SA1036K
+3VALWP
1 2
12
31
12
PC86
PQ23
2SA1036K
1 2
13
PQ22
2
LB1
LA1
13
12
PR98 10K_0402
*
PU7A LM393M
4 5
G
PQ16
3
SI3445DV
L_16
1
PQ21 SI3445DV
S
4 5
12
PR108 10K_0402
PU7B LM393M
7
6 2
1
12
PC74
0.1UF_0402_10V
84
3
+
2
-
12
DTC115EUA
D
6 2
1
G
3
PD23
EC31QS04
L_17
5
+
6
-
PC87
4700PF_0402_25V
PD19 EC31QS04
4700PF_0402_25V
+2.5VP
12
470PF_0402_50V
2.5VREF
SYSON#
(+1.2V+-5%)
+1.2VP
12
PC118
470PF_0402_50V
1 2
PR111 200K_0402_1%
SUSP
2
PQ42 DTC115EKA
12
+
PC70 220UF_D_4V_FP
SYSON#31
12
+
150UF_D_4V_FP
2.5VREF
PC84
PC121
4.7UF_1206_16V
SUSP 31
+2.5VP
2200PF_0402_25V
+2.5VP
PR102 10_0805
12
12
PC76
0.1UF_0402_10V
12
PC78
4.7UF_1206_16V
1 2
PR105 100K_0402
SUSP# 25,27,31
+3VALWP
12
PC125
PQ41
2SA1036K
THIS SHEET OF EN GINE ERI NG DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION I T CONTA INS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
PQ20
DTC115EUA
PD30 RB751V
1 2
1 2
12
31
100K
100K
PR162 1K_0402
2
HMBT2222A
PU14B LM393M
SD
13
PC83
PQ40
13
2
LC1
+
7
-
C
12
1000PF_0603_50V
5 6
1.5VCC
1
VCC1
2
PVDD1
3
VL1
4
PGND1
5
AGND1
6
SD
7
VIN/2
8
AGSEN
PVDD2
PU8
CM8500IT
PGND2
AGND2
Layout : "Compensation network close to FB pin"
PQ39 SI3445DV
D
S
6
4 5
2 1
G
3
12
PR160 10K_0402
PU14A LM393M
L_33
84
+
1
-
4700PF_0402_25V
EC31QS04
3 2
PC127
16
VCC2
15
14
VL2
13
12
11
VFB
10
VCCQ
9
AGND
LX1.2
12
PD31
PC126
0.1UF_0402_10V
12
1 2
PC77
0.1UF_0402_10V
+1.25VP
PL7
LX1.25
12
PC79
4.7UF_1206_16V
+2.5VP
12
PC82
0.1UF_0402_10V
TPRH6D38-5R0M
1 2
PC81 1000PF_0603_50V
PR104 100K_0402
PR106 1K_0402
12
12
+
PC80
220UF_D_4V_FP
12
12
(+1.5V+-5%)
PL12
TPRH6D38-5R0M
1 2
12
PR161
191K_0402_1%
LC3
LC2
12
*
PR164 154K_0603_1%
Compal Electronics, Inc.
Title
SCHEMATIC M/B L A-1571
Size Document Number Rev
B
Date: Sheet of
星期一
21, 2004
六月
+1.5VALWP
12
12
+
PC122
470PF_0402_50V
1 2
PR163 100K_0402_1%
401238 3B
D
PC123
150UF_D_4V_FP
2.5VREF
36 38,
Page 37
A
1 1
CPU_VID43 CPU_VID33
CPU_ON34
+3VALWP
PR126 150K_0402_1%
PR128
180K_0402_1%
2 2
CPU_VID23 CPU_VID13 CPU_VID03
VCCcore_POK6,12,30
CPU_ON
PC96
1UF_0805_16V
+2VREF
*
PR136 121K_0402_1%
PC101
330PF_0402_50V
PR141 200_0402
1 2
PR143 200_0402
3 3
4 4
1 2
1 2
PR144 200_0402
1 2
PR146 200_0402
PR138
49.9K_0402_1%
PC102 4700PF_0402_25V
PC108 4700PF_0402_25V
B
PR116 100K_0402 PR119 100K_0402 PR120 100K_0402 PR121 100K_0402 PR122 0_0402
PR124 120K_0402
PC95
47PF_0402_50V
PC97 1UF_0805_16V
100K_0402_1%
53.6K_0402_1%
L_30 L_31
PR114 0_0402
+2VREF
*
PR132
*
PR134
L_29
L_32
L_26
B++
FBM-L18-453215-900LMA 90T_1812
CPUVDD
PU9 MAX1718
21
12 12 12 12 12
12
PR137
1K_0402_1%
22 23 24 25 14
3 2
17
6 20 11 12
PC99 1000PF_0603_50V
L_25
PU10MAX1887
1
ILIM
2
TRIG
3
CM+
4
CM-
5
CS-
6
CS+
7
COMP
8
GND
D4 D3 D2 D1 D0 VGATE TIME SDN/SKIP VDD CC OVP REF ILIM GND15TON
PL9
ZMODE
L_18
PR135
33K_0402_1%
PC100 470PF_0402_50V
LIMIT
V+
BST
LX
DH
VDD
DL
PGND
C
10UF_1210_25V
PR112 0_0402
1 2
LX
DH
BST
DL V+
VCC
FB POS NEG
SUS
S1
S0
16 15 14 13 12 11 10 9
PC88
27 28 26
PR200 0_0402
16 1 9 4 13 5 19 18 8 7 10
L_19
CPUVDD
PR113
20_0805
L_20
L_27
CPU_B+
CPUVCC
CPUFB
POS
PM_DPRSLPVR
PR201 0_0402
0.1UF_0603_50V PC103
L_23
2 1
1UF_0805_16V
PC89
4.7UF_1210_25V
+5VALWP
21
PD24 1SS355
1 2
PR117 2.2_0603_1%
1 2
L_22
PC93
PC94
4.7UF_1206_16V
PC98 1000PF_0603_50V
PM_DPRSLPVR 16
L_28
1 2
PD28 1SS355
PC109
D
PC90
4.7UF_1210_25V
*
PC91 0.1UF_0603_50V
0.1UF_0603_50V
*
PR145
2.2_0603_1%
L_LG
E
CPU_B+
L_21
PQ25
IR7811A
578
3 6
241
CPU_B+
IR7811A
PQ26
578
3 6
241
12
+
PC114
@100UF_EC_25V
VTT1LX
SI4362DY
PQ33
IR7811A
PQ27
578
L_24
578
3 6
3 6
241
241
CPU_B+
SI4362DY
PQ34
IR7811A
PQ28
578
3 6
578
3 6
PR118 68_0805
12
PC92 220PF_50V
241
1 2
PR125 100_0402
241
VTT2LX CS+
PQ37
SI4362DY
578
3 6
PQ38
SI4362DY
578
PR142 68_0805
12
241
3 6
PC107 220PF_50V
241
+3VALWP
4.7UF_1206_16V
CPU_ON
VR_ON27,31
VR_ON
PC128
2200PF_50V
PL10
HK-AE30A0R5
PD25
EC31QS04
2 1
PL11
HK-AE30A0R5
PD27 EC31QS04
2 1
PR147 0_0402
PC110
PC112 1000PF_0603_50V
F
12
PR150 0_0402
G
+5VALWP
PC120
0.01UF_0402_16V
1 2
PR156 0_0402
PR158
3.01K_0402_1%
CM+ +CPU_CORE
PR123
2.8K_0402_1%
PR129
49.9K_0402_1%
13
D
S
PR139
0.001_2512_5%
1.2VDD
PU11
4
VIN
2
DELAY ERROR7CNOISE
8
ON/OFF#
SI91822DH-12-T1
5
3
+
1
4
-
PU13
MAX4322EUK-T_SOT23-5
2
12
12
PR130 68K_0402_1%
+5VALWP
PR133 100K_0402
PQ31 2N7002
2
G
13
D
2
G
S
PQ32 2N7002
+CPU_CORE
12
PC104
10UF_1210_25V
PC129
2200PF_50V
5
VOUT
6
SENSE
1 3
GND
PR115
0.001_2512_5%
PR151
100K_0402
+CPU_CORE
PR155 510_0402_5%
PR157 1K_0402_1%
PQ30
13
D
2N7002
S
STP_CPU#12,16
CPU_B+
12
12 12
+CPU_CORE
2
G
PC105
4.7UF_1210_25V
PC113
0.1UF_0402_10V
+CPU_CORE
+5VALWP
13
D
S
+1.2VPP
CM+
PR127 100K
PQ29 2N7002
2
G
PQ36
13
D
2N7002
S
PC106
4.7UF_1210_25V
PR148 0_0402
PR149 @10K_0402_1%
PR131 100K_0402
PM_SSMUXSEL16
D
S
2
G
100K_0402
H
PQ35
13
2N7002
2
G
PR140
12
PC111
4.7UF_1206_16V
PM_DPRSLPVR
+1.2VPP
PM
1 1
PM_SSMUXSEL
STP_CPU#
1 0
0
BM D-S
A
Deeper
B
0 X
0 0
PM_DPRSLPVRBMVCORE'
0
01 0
C
1
1.30V
1.20V
1.0V
D
Offset
0%
4.62%0
2.0%
4.62% 0%
VCORE
1.30V
1.239VPM D-S
1.176V
1.144V
1.0V
THIS SHEET OF ENGINEERING DRAWING I S THE PRO PRIET ARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET IN F O RMATION. T HI S SHEET M AY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEIT HER THI S SHEET NOR THE INFORMATION IT CONTAINS M AY BE USED BY OR DISCLOSED TO ANY THIRD PART Y W ITHOUT PR IO R W RITTEN CONSENT OF COMPAL ELECTRONICS,
E
F
Compal Electronics, Inc.
Title
SCHEMATIC M/B LA-1571
Size Document Number Rev
B
Date: Sheet
星期一 六月
G
401238 3B
of
37 38, 21, 2004
H
Page 38
5
4
3
2
1
+3VALW/+5VALW/ +12VALW/+1.5VALW
PM_RSMRST#
D D
>10 ms
ON/OFF PWRBTN_OUT# SYSON / SUSP#
+1.25VS/+1.5VS/+2.5V/ +3VS/+5VS/+12VS
CLOCK VR_ON +1.2VPP
+CPU_CORE VCCcore_POK
C C
PM_POK/CPUPWRGD PCIRST# CPURST#
>1ms
110ms
10ms
10ms
7.5ms
1.6ms
1ms
3ms
1.3ms
12ms
1ms
1ms
A-TEST (2002-09-09)
Fine tune power on sequence
1.C425 change to 0.01U
2.Delete R364
3.R396 change to 4.7K_0402
4.Delete R194
5.Delete R351
6.Delete R87
B B
Page04 =To solve 4 sec shutdown restart issue : Delete Q3
Page03 = JP1 change to 3 pin connector(No PWM)
7.Delete R359 , Q37 , R361 , Q40 , R364 , C428 , R363 , Q41
8.Delete U10
9.Add D31
Page22 : Add R424 8.2K_0402
Page25 : Delete R298 , C372
Page28 : Add R420 pull low
Page29 : Add R421 , Q58
Page15 : Add R425 PULL UP
Page16 : Add R426 pull up , R427 pull down
B-TEST (2002-10-10)
Page08 : FB1,2,4,5 change to 0_0805
B2-TEST (2002-12-26)
Page27 : Change RP125 to 10K Page29 : Delete Q57, Q58 , R421 , R388 , R391
MP (2003-07-28)
Page11 : Change R107,R108 from 1K_0402 to 1.2K_0402
MP (2004-06-15)
Page11 : Change R111 from 1K_0402 to 33_0402
Page11 : R111 change to 1K_0402
Page11 : EMI solution
1.Add U35 , L36 , C432 , R414 , R415 , R416
Page12 : TV-OUT issue
A A
Page06 = Base on Intel spec : Delete Q6 , Q7 , R59 , R61 , C21, R87
Page20 = Delete R248 , C327 Page21 = R258 , R261 change to 47K_0402
Add R422 , R423 47K_0402 Delete R256 , C338
1. R107 , R108 changeto 4.7K
5
4
Page12 : Del L36,C432,R414,R415,R416,U35,R148 Page16 : Add R428,R429 for FDD_DET#
Add R195,C235 Page23 : Del R273,R275
Add R281,C353 Page29 : Del R382,3,4,5,6,7. L30,31,32
Add RP129,130,131 Page30 : C420 change to 1UF_0805
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Compal Electronics, Inc. Title
Size Document Number Rev
Date: Sheet
SCHEMATIC M/B LA-1571
B
401238
星期
, 21, 2004
一六月
1
38 38
of
3B
Page 39
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