Compal LA-1521-REV Schematics

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SHANGHAI 100
BTK20 LA-1521 Schematics Document
2 2
REV 1.0A
PVT2
INTEL Mobile P4 uFCBGA/uFCPGA Northwood Celeron
3 3
4 4
A
MCH-M(845MZ) + ICH3-M + M6-C(16MB VRAM)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS
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MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
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Compal Electronics, inc.
Title
Size Docu ment Number Re v Custom
Date: Sheet
401229
星期一 十一
SCHEM A T IC, M/B LA-1521
04, 2002
E
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SHANGHAI 100
BTK20 LA-1521 BLOCK DIAGRAM
4 4
Inte l Mobile
CRT
Connector
PAGE 19
Northwood
Celeron
(uFCBGA/uFCPGA)
PSB
PAGE 4,5,6
400MHz
Thermal S ensor MAX6654MEE NE1617
PAGE 5
Clock Generator
W320-04
ICS9508-05
PAGE13
CPU VID
PAGE 6
TFT LCD
3 3
2 2
Connector
RJ-45
PAGE 20
Slot 0/1
PAGE 26
PAGE 18
AGP
ATI M6-C
(VRAM DDR 16MB)
PAGE 14,15,16,17
TV-OUT
Connector
PAGE 19
LAN
RTL8100BL
CARDBUS
OZ6933B
PAGE 24
PAGE 25,26
AGP Bus
Super I/O
LPC47N227
REV B
33MHz (3.3V)
PAGE 27
PCI BUS
Brookdale-M
MCH-M 845MZ
593 FC-BGA
266MHz (1.8V)
ICH3-M
LPC BUS 3 3MHz (3.3V)
Embedded Controller
NS PC87591S
REV B1
PAGE 7,8,9
HUB
421 BGA
REV B1
PAGE 20,21,22
PAGE 33
200MHz (2.5V)
Memory Bus
48MHz (3.3V)
ATA 66/100
AC-LINK24.576MHz (3.3V)
SO-DI M M x 2(DDR)
BANK 0,1,2,3
USB
Slot 0/1/3
PAGE 29
IDE HDD
PAGE 23
AC97 CODEC
ALC202
MDC
PAGE 30
PAGE 28
PAGE 10,11
CD-ROM/DVD
Aud i o A m p lifier
TPA0132
RJ-11
PAGE 20
PAGE 31
FANController
PAGE 34
DC/DC Interface
PAGE 37
BATTERY
Charger
PAGE 38
Power Interface & TEMP. sensing circuit
PAGE 37,38,39,40,42
Parallel
1 1
A
PAGE 28
FDD
PAGE 19 PAGE 33
B
PAGE 34
BIOS & I/O PORTScan KB
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPE
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Title
Size Docu ment Number Re v Custom
Date: Sheet
SCHEM A T IC, M/B LA-1521 401229
星期一 十一
?04, 2002
E
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Voltage Rails
Power Plane Description
VIN B+
1 1
+CPU_CORE
1.2VP
Adapter power supply (19V) AC or battery power rail for power circuit. Core voltage for CPU
1.2VP switched power rail for CPU VID +1.25VS 1.25VS power rail ON OFF OFF +1.5VS
AGP 4X ON OFF OFF +1.8VALW 1.8V always power rail ON ON +1.8VS
+2.5VS 2.5V switched power rail ON OFF OFF +3VALW +3V +3VS +5VALW +5V +5VS +12VALW +12V
2 2
+12VS RTCVCC
3.3V always on power rail
3.3V power rail
3.3V switched power rail
5V always on power rail
5V power rail
5V switched power rail
12V always on power rail ON
12V power rail
12V switched power rail
RTC power +SDREF
Note : "ON*" means that this power plane is "ON" only with AC power available, otherwise it is "OFF".
S1 S3 S5
N/A N/A N/A
ON O F F ON O F F
OFF1.8V switched power rail ON
ON+2.5V 2.5V power rail OFFON
ON
ON ON
ON
OFF
ON
ON
ON
ON
ON ON
OFF ON ON
ON
OFF
ON
ON
ON
ON
ON+SDREF power
N/AN/AN/A OFF OFF
ON* OFF
ON* OFF OFF ON* OFF OFF ON* OFF OFF ON OFF
PIR
REV 0.1 (EVT/DVT PHASE)
Date Description
07/06 2002 ADD R441,R442 AND C622 FOR "+AGP_REF" 07/06 2002 07/06 2002 16
07/06 2002 07/06 2002 07/06 2002 07/12 2002 07/12 2002 07/12 2002 33 U pdate EC BOARD ID: 001 for PVT1.(Remove R331, Add R327)
REV 0.2 (PVT1 PHASE)
Date Page
07/26 2002 07/26 2002
Page
07 14
Change R137 Pin2 power name from "+AGP_NBREF" to "+AGP_VGAREF" for can't boot issue. Change R181 Pin2 power plane from "+2.5V" to "+2.5V_VGA" for leakage. DEL R43,R255,R40 and J1.07/06 2002 17 ADD Q4 7 FOR LAN POWER "+2.5VLAN".07/06 2002 24
ADD Q48 and Q49 FOR LAN Layout Rule. JP8 Pin25 Create "FDD_READY#" for W/O FDD (GI BTO).2707/06 2002
3007/06 2002 Change R122 to 10K, R121 to 2.4K for MDC Noise.
Change R340 to 100K_1%, R347 to 33K_1% for Back-Grand Noise.
Change R159 to 0, C220 to 0 for Vendor(Realtek) Recommend. 3207/06 2002 ADD R443, JP22 FOR EC JTAG Connector. 34
Change JP5 form 20pins to 26pins type. 36 DEL R352,R277,R243,R287,R301 and R355. 37
Change PR 15 pin2 power name form " +2.5VREF" to "2.5REF"
ADD Q50,Q51,Q52,R445 and R446 for "H_THERMTRIP#" Function.
05 39 ADD PF3 for "NA" of Battery type.
Description
0507/26 2002
Improved Q50,Q51,Q52,R445 and R446 for "H_THERMTRIP#" Function.
Change R446 pin1 power from "+5VS" to "+CPU_CORE"
Change R445 pin1 power from "+5VS" to "+5V" 24
Update BOM by DEL Q47, ADD R106 for LAN unstable. 33
Update EC BOARD ID: 011 for PVT2.(Remove R325, Add R324)
REV 1.0
DescriptionDate
Update EC BOARD ID Description :EC_BID 2 < - > E C_BID0.3307/30 2002
DescriptionDate
Exter n al PCI Devices
Device IDSEL# REQ#/GNT# Interrupts
CardBus
AD20
LAN AD17 3 PIRQB
2
Page
REV 1.0A (PVT 2 PHASE)
Page
PIRQ A/PIRQB
EC SM Bus1 address
3 3
Device
Smart Battery EEPROM(24C16/02)
(24C04)
Address Address
1010 000Xb 1011 000Xb
EC SM Bus2 address
Device
MAX6654MEE Smart Battery DOT Board
1001 110Xb0001 011Xb 0001 011Xb XXXX XXXXb
ICH3-M SM Bus address
Device
Clock Generator W320-04 / ICS9508-05
Address
1101 0000
DDR SODIMM SM Bus address
4 4
DDR SLOT SA2 SA1 SA0
DDR SODIMM 0 (REVERSE) DDR SODIMM 1 (NORMAL)
A
000 001
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPE
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Title
Size Docu ment Number Re v Custom
Date: Sheet
Compal Electronics, inc.
SCHEM A T IC, M/B LA-1521 401229
星期一 十一
?04, 2002
343, 
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+CPU_CORE
1 1
AB1
AC1 AA3
AC3
AF22 AF23
U40A
K2
A#3
K4
A#4
L6
A#5
K1
A#6
L3
A#7
M6
A#8
L2
A#9
M3
A#10
M4
A#11
N1
A#12
M1
A#13
N2
A#14
N4
A#15
N5
A#16
T1
A#17
R2
A#18
P3
A#19
P4
A#20
R3
A#21
T2
A#22
U1
A#23
P6
A#24
U3
A#25
T4
A#26
V2
A#27
R6
A#28
W1
A#29
T5
A#30
U4
A#31
V3
A#32
W2
A#33
Y1
A#34 A#35
J1
REQ#0
K5
REQ#1
J4
REQ#2
J3
REQ#3
H3
REQ#4
G1
ADS#
AP#0
V5
AP#1 BINIT# IERR#
H6
BR0#
D2
BPRI#
G2
BNR#
G4
LOCK#
BCLK0 BCLK1
F3
HIT#
E3
HITM#
E2
DEFER#
HA#[3..31]7
2 2
HREQ#[0..4]7
HADS#7
+CPU_CORE
HBR0#7
3 3
HBPRI#7
HBNR#7
HLOCK#7
CLK_HCLK13 CLK_HCLK#13
HIT#7
HITM#7
HDEFER#7
HA#[3..31]
HREQ#[0..4]
1 2
R416 10K
1 2
R95 200_0603
CLK_HCLK CLK_HCLK#
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4
B
A10
A12
A14
A16
A18
A20
AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6A8VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
NorthWood
VSS_0H1VSS_1H4VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12A3VSS_13A9VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
A11
A13
A15
A17
A19
A21
A24
H23
H26
A26
AA1
AA11
AA4
AA7
AA13
AA15
AA17
AA9
AA19
AA23
AA26
AB10
AB12
AB14
AB16
AB18
C
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
Mobile
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
AB3
AB6
AB8
AB20
AB21
AB24
AC11
AC13
AC15
D
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19
C10
C12
C14
C16
C18
C20
D11
D13
D15
D17
D19
D9
E10
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56B7VCC_57B9VCC_58
VCC_59
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65C8VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71D7VCC_72
VCC_73
D#0 D#1 D#2 D#3 D#4 D#5 D#6 D#7 D#8
D#9 D#10 D#11 D#12 D#13 D#14 D#15 D#16 D#17 D#18 D#19 D#20 D#21 D#22 D#23 D#24 D#25 D#26 D#27 D#28 D#29 D#30 D#31 D#32 D#33 D#34 D#35 D#36 D#37 D#38 D#39 D#40 D#41 D#42 D#43 D#44 D#45 D#46 D#47 D#48 D#49 D#50 D#51 D#52 D#53 D#54 D#55 D#56 D#57 D#58 D#59 D#60 D#61 D#62 D#63
VCC_74
VCC_75
VCC_76
VCC_77
VCC_78
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VCC_81
AC2
AC5
AC7
AC9
AC17
AC19
AD1
AC22
AC25
AD10
AD12
AD14
AD16
AD18
AD21
F13
AD4
AD8
AD23
VCC_79E8VCC_80
VCC_82
VCC_83
VCC_84
VCC_85
F9
F11
F15
F17
F19
NorthWood
E12
E14
E16
E18
E20
B21 B22 A23 A25 C21 D22 B24 C23 C24 B25 G22 H21 C26 D23 J21 D25 H22 E24 G23 F23 F24 E25 F26 D26 L21 G26 H24 M21 L22 J24 K23 H25 M23 N22 P21 M24 N23 M26 N26 N25 R21 P24 R25 R24 T26 T25 T22 T23 U26 U24 U23 V25 U21 V22 V24 W26 Y26 W25 Y23 Y24 Y21 AA25 AA22 AA24
HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63
HD#[0..63]
E
HD#[0..63] 7
+CPU_CORE
4 4
Compal Electronics, inc.
SCHEMATIC, M/B LA-1521 401229
期一 十一月
E
of
443¬P , 04, 2002
1B
A
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF
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Size Doc u men t Numbe r R e v Custom
Dat e : Sheet
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+CPU_CORE
H_A20M#
12
R83 200 R91 200 R113 200 R414 200
1 1
2 2
3 3
R53 200 R408 200 R413 200 R118 200
R109 56 R56 300
R59 51.1_1%_0603
R87 200
Place resistor <100mils from CPU pin
RP6 1 8 2 7 3 6 4 5
8P4R_1.5K
+CPU_CORE
12
R411 200_0603
12
R412 200_0603
12
R401 200_0603
12
R405 200_0603
Thermal Sensor MAX6654MEE
C503
+5VS
2200PF_0603
R400 1K
12
4 4
Address:1001_110X
12 12 12 12 12 12 12
12 12
12
12
+1.2VP
ITP_TMS ITP_TCK ITP_TRST# ITP_TDI
ITP_PREQ# ITP_PRDY# ITP_BPM0 ITP_BPM1
12
PM_CPUPERF#
1 2 1 2
H_THERMDA H_THERMDC
A
H_SMI# H_IGNNE# H_STPCLK# H_DPSLP# H_NMI H_INIT# H_INTR
H_F_FERR# H_PWRGD
H_RESET#
Murata LQG21F4R7N00
L22
4.7UH_80mA_0805
4.7UH_80mA_0805
L21
W=15mil
1 2 3 4 5 6 7 8
+CPU_CORE
12
R111 56
12
C485
+
33UF_D2_16V
CLK_ITPP13
CLK_ITPP#13
C495 .1UF
1 2
U39
NC VCC DXP DXN NC ADD1 GND GND
NE1617/ MAX6654MEE
STBY
SMBCLK
SMBDATA
ALERT
ADD0
NC
NC
NC
16 15 14 13 12 11 10 9
H_RS#07 H_RS#17 H_RS#27
H_TRDY#7
H_A20M#20
H_F_FERR#20
H_IGNNE#20
H_SMI#20
H_PWRGD20
H_STPCLK#20
H_DPSLP#20
H_INTR20 H_INIT#20
H_RESET#7
H_DBSY#7
H_DRDY#7
H_BSEL013 H_BSEL113
12
C486
+
33UF_D2_16V
H_VSSA
CLK_ITPP CLK_ITPP#
+5VS
1 2
R397 1K
H_NMI20
R395
10K
1 2
+5VS
H_THERMDA H_THERMDC
H_THERMTRIP#
ITP_BPM0 ITP_BPM1 ITP_PRDY# ITP_PREQ#
ITP_TCK ITP_TDI
ITP_TMS ITP_TRST#
51.1_1%_0603
R396 10K
1 2
R31
B
H_A20M# H_F_FERR# H_IGNNE# H_SMI# H_PWRGD H_STPCLK# H_DPSLP# H_INTR H_NMI H_INIT# H_RESET#
H_VCCA TP1 H_VCCIOPLL
1 2
1 2
EC_SMC2 32 EC_SMD2 32
B
F1 G5 F4
AB2
J6
C6 B6 B2 B5
AB23
Y4
AD25
D1 E5
W5
AB25
H5
H2 AD6 AD5
B3
C4
A2
AC6 AB5 AC4
Y6 AA5 AB4
D4
C1
D5
F7
E6
AD20
A5
AE23 AF25
AF3
AC26 AD26
L24
P1
R115
51.1_1%_0603
AE11
AE13
AE15
AE17
AE19
AE22
AE24
VSS_57
VSS_58
VSS_59
VSS_129F8VSS_130
G21
VSS_60
VSS_61
VSS_131
VSS_132G3VSS_133G6VSS_134J2VSS_135
G24
AE26
VSS_62
VSS_63
VSS_64
J22
U40B
RS#0 RS#1 RS#2 RSP# TRDY#
A20M# FERR# IGNNE# SMI# PWRGOOD STPCLK# DPSLP# LINT0 LINT1 INIT# RESET#
DBSY# DRDY# BSEL0 BSEL1
THERMDA THERMDC
THERMTRIP#
BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5
TCK TDI TDO TMS TRST#
VCCA VCCSENSE VCCIOPLL
NC7 NC8
ITP_CLK0 ITP_CLK1
COMP0 COMP1
GTL Reference Vol tage
+CPU_CORE
12
R393
R_A
49.9_1%_0603
Trace width>=7mila
12
R394 100_1%_0603
R_B
C
AE7
AE9
AF1
AF10
AF12
AF14
AF16
AF18
AF20
AF6
AF8
B10
B12
B14
B16
B18
B20
B23
AF26
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_75
VSS_76
SKTOCC#
B26
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85B4VSS_86B8VSS_87
NorthWood
VSS_136
VSS_137J5VSS_138
VSS_139
VSS_140K3VSS_141K6VSS_142L1VSS_143
VSS_144
VSS_145L4VSS_146M2VSS_147
VSS_148
VSS_149M5VSS_150
VSS_151
VSS_152N3VSS_153N6VSS_154P2VSS_155
VSS_156
VSS_157P5VSS_158R1VSS_159
J25
L23
L26
K21
K24
Layout note :
1. Place R_A and R_B near CPU.
2. Place decoupling cap 220PF near CPU.(Within 500mils )
M22
M25
C487
C481
1UF_0603
220PF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPE
P22
P25
N21
N24
C
C11
C13
C15
C17
C19
C22
C25
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92C2VSS_93
VSS_94
VSS_95C5VSS_96C7VSS_97C9VSS_98
Mobile
VSS_160
VSS_161R4VSS_162
VSS_163
VSS_164T3VSS_165T6VSS_166U2VSS_167
T21
T24
R23
R26
+H_GTLREF1
U22
D10
VSS_168
U25
D12
D14
VSS_99
VSS_100
VSS_169U5VSS_170V1VSS_171
V23
D
D16
D18
D20
D21
D24
E11
E13
E15
E17
E19
E23
E26
F10
F12
F14
F16
F18
F22
F25
F5
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106D3VSS_107D6VSS_108D8VSS_109E1VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117E4VSS_118E7VSS_119E9VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125F2VSS_126
VSS_127
VSS_128
J26
DP#0
K25
DP#1
K26
DP#2 DP#3
GTLREF0 GTLREF1 GTLREF2 GTLREF3
NC1 NC2
TESTHI0 TESTHI1 TESTHI2 TESTHI3 TESTHI4 TESTHI5 TESTHI6 TESTHI7 TESTHI8 TESTHI9
TESTHI10
GHI#
DSTBN#0 DSTBN#1 DSTBN#2 DSTBN#3
DSTBP#0 DSTBP#1 DSTBP#2 DSTBP#3
ADSTB#0 ADSTB#1
DBI#0 DBI#1 DBI#2 DBI#3
DBR#
PROCHOT#
MCERR#
SLP#
VSSA
VSSSENSE
NC3
VID0
VID1
VID2
VID3
AE5
AE4
AE3
1 3
D
D
VID4
AE2
AE1
2
G
Q51 @2N7002
NC5
NC6
AF24
AE21
S
VSS_172
VSS_173V4VSS_174
VSS_175
VSS_176W3VSS_177W6VSS_178Y2VSS_179
VSS_180
VSS_181
V26
W21
Y5
Y22
Y25
W24
CBRST#24,25,26
VR_ON32,43
EC_CPUPD#32
NC4
VCCVID
NorthWood
AF4
CPU_VR_VID4 6,43 CPU_VR_VID3 6,43 CPU_VR_VID2 6,43 CPU_VR_VID1 6,43 CPU_VR_VID0 6,43
+5V
12
***
Q52 3904
3 1
+H_GTLREF1
L25
AA21 AA6 F20 F6 A22 A7
TESTTHI0_1
AD24 AA2
TESTTHI2_7
AC21 AC20 AC24 AC23 AA20 AB22
TESTTHI8_10
U6 W4 Y3 A6
E22 K22 R22 W22
F21 J23 P23 W23
L5 R5
E21 G25 P26 V21
AE25
C3 V6 AB26
AD22 A4
AD2 AD3
+1.2VP
C63 .1UF
R445 10K
2
Q50 3904
Title
Size Docu ment Number Re v
Date: Sheet
PM_CPUPERF#
H_DSTBN#[0..3]
H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3
H_DSTBP#[0..3]
H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3
H_DBI#[0..3] H_DBI#0 H_DBI#1 H_DBI#2 H_DBI#3
H_PROCHOT#
H_SLP#
H_VSSA TP2
+CPU_CORE
12
3 1
R446 470
2
R415 56
R444 470
Compal Electronics, inc.
SCHEMATIC, M/B LA-1521 401229
星期一 十一
?04, 2002
E
All of these pin connected inside
1 2
R410 56
1 2
R62 56
1 2
R409 56
1 2
R54 200
H_THERMTRIP#
12
E
+CPU_CORE
PM_CPUPERF# 20 H_DSTBN#[0..3] 7
H_DSTBP#[0..3] 7
H_ADSTB#0 7 H_ADSTB#1 7
H_DBI#[0..3] 7
H_SLP# 20
12
+CPU_CORE
+CPU_CORE
543, 
of
Page 6
A
B
C
D
E
Layout note :
Place close to CPU, Use 2~3 vias per PAD. Place .22uF caps underneath balls on solder side. Place 10uF caps on the peripheral near balls. Use 2~3 vias per PAD.
1 1
2 2
Please place these cap in the socket cavity area
+CPU_CORE
12
C134
10UF_6.3V_1206_X5R
+CPU_CORE
12
C112
10UF_6.3V_1206_X5R
Please place these cap on the socket north side
+CPU_CORE
12
C118
10UF_6.3V_1206_X5R
+CPU_CORE
12
C497
10UF_6.3V_1206_X5R
+CPU_CORE
12
C520
10UF_6.3V_1206_X5R
12
C127 10UF_6.3V_1206_X5R
12
C141 10UF_6.3V_1206_X5R
12
C123 10UF_6.3V_1206_X5R
12
C502 10UF_6.3V_1206_X5R
12
C83 10UF_6.3V_1206_X5R
12
C120 10UF_6.3V_1206_X5R
12
C136 10UF_6.3V_1206_X5R
12
C479 10UF_6.3V_1206_X5R
12
C505 10UF_6.3V_1206_X5R
12
C97 10UF_6.3V_1206_X5R
12
C111 10UF_6.3V_1206_X5R
12
C128 10UF_6.3V_1206_X5R
12
C483 10UF_6.3V_1206_X5R
12
C509 10UF_6.3V_1206_X5R
12
C107 10UF_6.3V_1206_X5R
12
C103 10UF_6.3V_1206_X5R
12
C121 10UF_6.3V_1206_X5R
12
C488 10UF_6.3V_1206_X5R
12
C512 10UF_6.3V_1206_X5R
Layout note :
Place close to CPU power and ground pin as possible (<1inch)
+CPU_CORE
12
C199
+
220UF_D2_4V_25m
+CPU_CORE
12
C561
+
220UF_D2_4V_25m
+CPU_CORE
12
12
C142
C143
.22UF_X7R
.22UF_X7R
Used ESR 25m ohm cap total ESR=2.5m ohm
+
12
C145 .22UF_X7R
12
C197
+
220UF_D2_4V_25m
12
C563 220UF_D2_4V_25m
12
C146 .22UF_X7R
12
C196
+
220UF_D2_4V_25m
12
C564
+
@220UF_D2_4V_25m
12
C105 .22UF_X7R
12
12
C198
+
@220UF_D2_4V_25m
12
C562
+
220UF_D2_4V_25m
12
C144 .22UF_X7R
CPU Voltage ID
C96 .22UF_X7R
12
C195
+
220UF_D2_4V_25m
12
C565
+
220UF_D2_4V_25m
12
C95 .22UF_X7R
12
C94 .22UF_X7R
12
C93 .22UF_X7R
R179 1K
+3VS
182736
45
12
RP15 8P4R_1K
CPU_VID1 5,43 CPU_VID2 5,43 CPU_VID3 5,43 CPU_VID4 5,43
Title
Size Docu ment Number Re v
D
Date: Sheet
Compal Electronics, inc.
SCHEMATIC, M/B LA-1521 401229
星期一 十一
?04, 2002
E
of
643, 
Please place these cap on the socket south side
3 3
4 4
+CPU_CORE
12
C480
10UF_6.3V_1206_X5R
+CPU_CORE
12
C506
10UF_6.3V_1206_X5R
+CPU_CORE
12
C109
10UF_6.3V_1206_X5R
A
12
C484 10UF_6.3V_1206_X5R
12
C511 10UF_6.3V_1206_X5R
12
C119 10UF_6.3V_1206_X5R
12
C490 10UF_6.3V_1206_X5R
12
C513 10UF_6.3V_1206_X5R
12
C124 10UF_6.3V_1206_X5R
12
C498 10UF_6.3V_1206_X5R
12
C519 10UF_6.3V_1206_X5R
12
C130 10UF_6.3V_1206_X5R
12
12
B
C504 10UF_6.3V_1206_X5R
C98 10UF_6.3V_1206_X5R
CPU_VR_VID05,43 CPU_VID0 5,43 CPU_VR_VID15,43 CPU_VR_VID25,43 CPU_VR_VID35,43 CPU_VR_VID45,43
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPE
C
Page 7
A
B
C
D
E
HD#[0..63]
+V_MCH_GTLREF
GTL Reference Vol tage
Layout note :
1. Place R_E and R_F near MCH
2. Place decoupling cap 220PF near MCH pin.(Within 500mils)
C518 .01UF
C514 .01UF
A
HA#[3..31]
HREQ#[0..4]
H_DBI#[0..3]
R417
24.9_0603_1%
+1.5VS
HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4
CLK_GHT CLK_GHT#
H_DBI#0 H_DBI#1 H_DBI#2 H_DBI#3
H_SWNG0 H_SWNG1
12
R428 8.2K
R419 8.2K
R404 8.2K
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
AE17
AD15
AD13
AC13
12
R424
24.9_0603_1%
12
12
12
T4 T5 T3 U3 R3 P7 R2 P4 R6 P5 P3 N2 N7 N3
K4 M4 M3
L3
L5
K3
J2
M5
J3 L2 H4 N5
G2 M6
L7 R5
N6
U7 Y4 Y7
W5 J27
H26
V5 V4 Y5 Y3 V7 V3
W3
W2 W7 W6
U6 T7 R7 U5 U2
J8 K8
AD5 AG4 AH9
AA7
AC2
AGP_ADSTB0
AGP_ADSTB1
AGP_SBSTB
U7A
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
HADSTB#0 HADSTB#1
CPURST# HTRDY# DEFER# BPRI# HLOCK# RSTIN# TESTIN# DBSY# DRDY# HIT# HITM# BREQ#0 ADS# BNR#
RS#0 RS#1 RS#2
HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4
BCLK BCLK#
DBI#0 DBI#1 DBI#2 DBI#3
HSWNG0 HSWNG1
HRCOMP0 HRCOMP1
H_DSTBN#[0..3] H_DSTBP#[0..3]
HOST
HDSTBN#0 HDSTBN#1 HDSTBN#2 HDSTBN#3 HDSTBP#0 HDSTBP#1 HDSTBP#2 HDSTBP#3
BROOKDALE(MCH-M)
H_DSTBN#[0..3] 5 H_DSTBP#[0..3] 5
R427 @8.2K
R418 @8.2K
R403 @8.2K
HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8
HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63
HVREF0 HVREF1 HVREF2 HVREF3 HVREF4
AA2 AB5 AA5 AB3 AB4 AC5 AA3 AA6 AE3 AB7 AD7 AC7 AC6 AC3 AC8 AE2 AG5 AG2 AE8 AF6 AH2 AF3 AG3 AE5 AH7 AH3 AF4 AG8 AG7 AG6 AF8 AH5 AC11 AC12 AE9 AC9 AE10 AD9 AG9 AC10 AE12 AF10 AG11 AG10 AH11 AG12 AE13 AF12 AG13 AH13 AC14 AF14 AG14 AE14 AG15 AG16 AG17 AH15 AC17 AF16 AE15 AH17 AD17 AE16
AD4 AE6 AE11 AC15 AD3 AE7 AD11 AC16
M7 R8 Y8 AB11 AB17
12
12
12
B
HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63
H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3
AGP_ADSTB0#
AGP_ADSTB1#
AGP_SBSTB#
HA#[3..31]4
1 1
H_ADSTB#05 H_ADSTB#15
H_RESET#5
H_TRDY#5
HREQ#[0 ..4 ]4
+CPU_CORE
12
R420
12
R421
+CPU_CORE
12
R422
12
R423
HDEFER#4
HBPRI#4
HLOCK#4
PCIRST#14,20,23,24,25,26,27 H_DBSY#5
H_DRDY#5
HIT#4 HITM#4 HBR0#4
HADS#4
HBNR#4
H_RS#05 H_RS#15 H_RS#25
CLK_GHT13
CLK_GHT#13
H_DBI#[0..3]5
12
12
2 2
3 3
301_1%_0603
150_1%_0603
301_1%_0603
4 4
150_1%_0603
HD#[0 ..6 3 ] 4
AGP_AD[0..31]14
AGP_C/BE#[0..3]14
AGP_ST[0..2]14
+CPU_CORE
12
R426
R_E
49.9_1%_0603
12
R425
R_F
100_1%_0603
AGP_ST0 0=System memory is DDR 1=System memory is SDR
AGP_AD[0..31] HUB_PD[0..10]
AGP_ADSTB014 AGP_ADSTB0#14 AGP_ADSTB114 AGP_ADSTB1#14 AGP_SBSTB14 AGP_SBSTB#14
AGP_FRAME#14 AGP_DEVSEL#14 AGP_IRDY#14 AGP_TRDY#14 AGP_STOP#14 AGP_PAR14 AGP_REQ#14 AGP_GNT#14
Trace width>=7mila
C523
C525
1UF_0603
220PF
AGP_ST0 AGP_ST1
R398 2K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPE
C
12
AGP_AD0 AGP_AD1 AGP_AD2 AGP_AD3 AGP_AD4 AGP_AD5 AGP_AD6 AGP_AD7 AGP_AD8 AGP_AD9 AGP_AD10 AGP_AD11 AGP_AD12 AGP_AD13 AGP_AD14 AGP_AD15 AGP_AD16 AGP_AD17 AGP_AD18 AGP_AD19 AGP_AD20 AGP_AD21 AGP_AD22 AGP_AD23 AGP_AD24 AGP_AD25 AGP_AD26 AGP_AD27 AGP_AD28 AGP_AD29 AGP_AD30 AGP_AD31
AGP_C/BE#0 AGP_C/BE#1 AGP_C/BE#2 AGP_C/BE#3
AGP_ST0 AGP_ST1 AGP_ST2
AGP_ADSTB0 AGP_ADSTB0# AGP_ADSTB1 AGP_ADSTB1# AGP_SBSTB AGP_SBSTB#
AGP_FRAME# AGP_DEVSEL# AGP_IRDY# AGP_TRDY# AGP_STOP# AGP_PAR AGP_REQ# AGP_GNT# AGP_PIPE#
U7B
R27 R28 T25 R25 T26 T27 U27 U28 V26 V27 T23 U23 T24 U24 U25 V24 Y27
Y26 AA28 AB25 AB27 AA27 AB26
Y23 AB23 AA24 AA25 AB24 AC25 AC24 AC22 AD24
V25
V23
Y25 AA23
AG25
AF24
AG26
R24
R23 AC27 AC28
AF27 AF26
Y24
W28 W27 W24 W23
W25 AG24 AH25
AF22
N22 K27
K5
L24
M23
K7
J26
A3
A7 A11 A15
12
R406 @8.2K
G_AD0 G_AD1 G_AD2 G_AD3 G_AD4 G_AD5 G_AD6 G_AD7 G_AD8 G_AD9 G_AD10 G_AD11 G_AD12 G_AD13 G_AD14 G_AD15 G_AD16 G_AD17 G_AD18 G_AD19 G_AD20 G_AD21 G_AD22 G_AD23 G_AD24 G_AD25 G_AD26 G_AD27 G_AD28 G_AD29 G_AD30 G_AD31
G_C/BE#0 G_C/BE#1 G_C/BE#2 G_C/BE#3
ST0 ST1 ST2
AD_STB0 AD_STB#0 AD_STB1 AD_STB#1 SB_STB SB_STB#
G_FRAME# G_DEVSEL# G_IRDY# G_TRDY# G_STOP# G_PAR G_REQ# G_GNT# PIPE#
VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10
AGP_FRAME# AGP_TRDY# AGP_PAR AGP_STOP#
AGP_GNT# AGP_REQ# AGP_IRDY# AGP_DEVSEL#
AGP_WBF# AGP_PIPE# AGP_RBF#
AGP_ST2
HUB
HLRCOMP
AGP
GRCOMP
BROOKDALE(MCH-M)
RP65 @8P4R_8.2K
1 8 2 7 3 6 4 5
RP63 @8P4R_8.2K
1 8 2 7 3 6 4 5
RP64 @8P4R_8.2K
1 8 2 7 3 6 4 5
12
R402 8.2K
12
R399 8.2K
HI_0 HI_1 HI_2 HI_3 HI_4 HI_5 HI_6 HI_7 HI_8 HI_9
HI_10
HI_STB
HI_STB#
HI_REF
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
AGPREF
66IN
RBF#
WBF#
VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40
+1.5VS
D
P25 P24 N27 P23 M26 M25 L28 L27 M27 N28 M24
N25 N24
P27 P26
AH28 AH27 AG28 AG27 AE28 AE27 AE24 AE25
AA21 AD25 P22
AE22 AE23
A19 A23 A27 D5 D9 D13 D17 D21 E1 E4 E26 E29 F8 F12 F16 F20 F24 G26 H9 H11 H13 H15 H17 H19 H21 J1 J4 J6 J22 J29
AGP_ST1 0=533Mhz 1=400Mhz
HUB_PD0 HUB_PD1 HUB_PD2 HUB_PD3 HUB_PD4 HUB_PD5 HUB_PD6 HUB_PD7 HUB_PD8 HUB_PD9 HUB_PD10
HLRCOMP
AGP_SBA0 AGP_SBA1 AGP_SBA2 AGP_SBA3 AGP_SBA4 AGP_SBA5 AGP_SBA6 AGP_SBA7
R407 36.5_1%_0603
CLK_AGP_MCH
AGP_RBF# AGP_WBF#
+AGP_REF
HUB_PD[0..10] 20
HUB_PSTRB 20 HUB_PSTRB# 20
1 2
R430 36.5_1%_0603
AGP_SBA[0..7]
Place this cap near MCH
+AGP_REF
12
CLK_AGP_MCH 13
AGP_RBF# 14
**
301_1%_0603
301_1%_0603
Title
Size Docu ment Number Re v
Date: Sheet
星期一 十一
AGP_SBA[0..7] 14
12
C522 .1UF
+1.5VS
12
R441 1K_1%_0603
12
R442 1K_1%_0603
HUB Interface Reference
Layout note :
+1.8VS
1. Pla c e R_C and R_D in middle of Bus.
2. Place capacitors near MCH.
12
R116
R_C
12
R110
R_D
Compal Electronics, inc.
SCHEMATIC, M/B LA-1521 401229
?04, 2002
+1.8VS
12
C622 .1UF
12
C170 @470PF_0603
12
R130 @56.2_1%_0603
12
R107 0
12
C166 .01UF
E
+VS_HUBREF
12
C530 .01UF
Place closely ball P26
Place closely pin P22
CLK_AGP_MCH
R429 @33
1 2
C532
@10PF
+VS_HUBREF
of
743, 
Page 8
A
B
C
D
E
U7D
M8
+CPU_CORE
1 1
+2.5V
2 2
3 3
4 4
VTT_0
U8
VTT_1
AA9
VTT_2
AB8
VTT_3
AB18
VTT_4
AB20
VTT_5
AC19
VTT_6
AD18
VTT_7
AD20
VTT_8
AE19
VTT_9
AE21
VTT_10
AF18
VTT_11
AF20
VTT_12
AG19
VTT_13
AG21
VTT_14
AG23
VTT_15
AJ19
VTT_16
AJ21
VTT_17
AJ23
VTT_18
A5
VCCSM1
A9
VCCSM2
A13
VCCSM3
A17
VCCSM4
A21
VCCSM5
A25
VCCSM6
C1
VCCSM7
C29
VCCSM8
D7
VCCSM9
D11
VCCSM10
D15
VCCSM11
D19
VCCSM12
D23
VCCSM13
D25
VCCSM14
F6
VCCSM15
F10
VCCSM16
F14
VCCSM17
F18
VCCSM18
F22
VCCSM19
G1
VCCSM20
G4
VCCSM21
G29
VCCSM22
H8
VCCSM23
H10
VCCSM24
H12
VCCSM25
H14
VCCSM26
H16
VCCSM27
H18
VCCSM28
H20
VCCSM29
H22
VCCSM30
H24
VCCSM31
K22
VCCSM32
K24
VCCSM33
K26
VCCSM34
L23
VCCSM35
K6
VCCSM36
J5
VCCSM37
J7
VCCSM38
L1
VSS41
L4
VSS42
L6
VSS43
L8
VSS44
L22
VSS45
L26
VSS46
N1
VSS47
N4
VSS48
N8
VSS49
N13
VSS50
N15
VSS51
N17
VSS52
N29
VSS53
P6
VSS54
P8
VSS55
P14
VSS56
P16
VSS57
R1
VSS58
R4
VSS59
R13
VSS60
R15
VSS61
R17
VSS62
R26
VSS63
T6
VSS64
T8
VSS65
T14
VSS66
T16
VSS67
T22
VSS68
U1
VSS69
U4
VSS70
U15
VSS71
U29
VSS72
V6
VSS73
V8
VSS74
V22
VSS75
W1
VSS76
W4
VSS77
W8
VSS78
W26
VSS79
Y6
VSS80
Y22
VSS81
AA1
VSS82
BROOKDALE(MCH-M)
POWER/GND
VCC1_5_0 VCC1_5_1 VCC1_5_2 VCC1_5_3 VCC1_5_4 VCC1_5_5 VCC1_5_6 VCC1_5_7 VCC1_5_8
VCC1_5_9 VCC1_5_10 VCC1_5_11 VCC1_5_12 VCC1_5_13 VCC1_5_14 VCC1_5_15
VCC1_5_16 VCC1_5_17 VCC1_5_18 VCC1_5_19 VCC1_5_20 VCC1_5_21 VCC1_5_22 VCC1_5_23 VCC1_5_24 VCC1_5_25
VCC1_8_0
VCC1_8_1
VCC1_8_2
VCC1_8_3
VCC1_8_4
VCCGA1 VCCHA1
VSSGA2 VSSHA2
VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141
R22 R29 U22 U26 W22 W29 AA22 AA26 AB21 AC29 AD21 AD23 AE26 AF23 AG29 AJ25
N14 N16 P13 P15 P17 R14 R16 T15 U14 U16
L29 N26 L25 M22 N23
T17 T13
U17 U13
AA4 AA8 AA29 AB6 AB9 AB10 AB12 AB13 AB14 AB15 AB16 AB19 AB22 AC1 AC4 AC18 AC20 AC21 AC23 AC26 AD6 AD8 AD10 AD12 AD14 AD16 AD19 AD22 AE1 AE4 AE18 AE20 AE29 AF5 AF7 AF9 AF11 AF13 AF15 AF17 AF19 AF21 AF25 AG1 AG18 AG20 AG22 AH19 AH21 AH23 AJ3 AJ5 AJ7 AJ9 AJ11 AJ13 AJ15 AJ17 AJ27
VCC_MCH_PLL1 VCC_MCH_PLL0
VSS_MCH_PLL1 VSS_MCH_PLL0
+1.5VS
+1.5VS
+1.8VS
"Trace A"
"Trace A"
12
L43
4.7UH_30mA
"Trace A"
12
C527
+
33UF_D2_16V
"Trace A"
Layout note : Trace width 5mil ; Spacing 10mil
Trace A to ball U7/T13 or U7/T7 =1.5" Max
12
L42
4.7UH_30mA
12
C541
+
33UF_D2_16V
Murata LQG21N4R7K10
DDR_SDQ[0..63]10
DDR_CB[0..7]10
DDR_SDQ[0..63]
DDR_CB[0..7]
DDR_SDQ0 DDR_SDQ1 DDR_SDQ2 DDR_SDQ3 DDR_SDQ4 DDR_SDQ5 DDR_SDQ6 DDR_SDQ7 DDR_SDQ8 DDR_SDQ9 DDR_SDQ10 DDR_SDQ11 DDR_SDQ12 DDR_SDQ13 DDR_SDQ14 DDR_SDQ15 DDR_SDQ16 DDR_SDQ17 DDR_SDQ18 DDR_SDQ19 DDR_SDQ20 DDR_SDQ21 DDR_SDQ22 DDR_SDQ23 DDR_SDQ24 DDR_SDQ25 DDR_SDQ26 DDR_SDQ27 DDR_SDQ28 DDR_SDQ29 DDR_SDQ30 DDR_SDQ31 DDR_SDQ32 DDR_SDQ33 DDR_SDQ34 DDR_SDQ35 DDR_SDQ36 DDR_SDQ37 DDR_SDQ38 DDR_SDQ39 DDR_SDQ40 DDR_SDQ41 DDR_SDQ42 DDR_SDQ43 DDR_SDQ44 DDR_SDQ45 DDR_SDQ46 DDR_SDQ47 DDR_SDQ48 DDR_SDQ49 DDR_SDQ50 DDR_SDQ51 DDR_SDQ52 DDR_SDQ53 DDR_SDQ54 DDR_SDQ55 DDR_SDQ56 DDR_SDQ57 DDR_SDQ58 DDR_SDQ59 DDR_SDQ60 DDR_SDQ61 DDR_SDQ62 DDR_SDQ63
DDR_CB0 DDR_CB1 DDR_CB2 DDR_CB3 DDR_CB4 DDR_CB5 DDR_CB6 DDR_CB7
+SDREF
12
C547 .1UF_0402_X5R
Layout note Please closely pinJ21 and J9
U7C
G28
SDQ0
F27
SDQ1
C28
SDQ2
E28
SDQ3
H25
SDQ4
G27
SDQ5
F25
SDQ6
B28
SDQ7
E27
SDQ8
C27
SDQ9
B25
SDQ10
C25
SDQ11
B27
SDQ12
D27
SDQ13
D26
SDQ14
E25
SDQ15
D24
SDQ16
E23
SDQ17
C22
SDQ18
E21
SDQ19
C24
SDQ20
B23
SDQ21
D22
SDQ22
B21
SDQ23
C21
SDQ24
D20
SDQ25
C19
SDQ26
D18
SDQ27
C20
SDQ28
E19
SDQ29
C18
SDQ30
E17
SDQ31
E13
SDQ32
C12
SDQ33
B11
SDQ34
C10
SDQ35
B13
SDQ36
C13
SDQ37
C11
SDQ38
D10
SDQ39
E10
SDQ40
C9
SDQ41
D8
SDQ42
E8
SDQ43
E11
SDQ44
B9
SDQ45
B7
SDQ46
C7
SDQ47
C6
SDQ48
D6
SDQ49
D4
SDQ50
B3
SDQ51
E6
SDQ52
B5
SDQ53
C4
SDQ54
E5
SDQ55
C3
SDQ56
D3
SDQ57
F4
SDQ58
F3
SDQ59
B2
SDQ60
C2
SDQ61
E2
SDQ62
G5
SDQ63
C16
SDQ64/CB0
D16
SDQ65/CB1
B15
SDQ66/CB2
C14
SDQ67/CB3
B17
SDQ68/CB4
C17
SDQ69/CB5
C15
SDQ70/CB6
D14
SDQ71/CB7
J21
SDREF0
J9
SDREF1
BROOKDALE(MCH-M)
MEMORY
SMA0/CS#11 SMA1/CS#10
SMA2/CS#6 SMA3/CS#9 SMA4/CS#5 SMA5/CS#8 SMA6/CS#7 SMA7/CS#4 SMA8/CS#3 SMA9/CS#0
SMA11/CS#2 SMA12/CS#1
SMRCOMP
RCVENIN#
RCVENOUT#
SCK0
SCK#0
SCK1
SCK#1
SCK2
SCK#2
SCK3
SCK#3
SCK4
SCK#4
SCK5
SCK#5
SCK6
SCK#6
SCK7
SCK#7
SCK8
SCK#8 SCS#0
SCS#1 SCS#2 SCS#3 SCS#4 SCS#5
SDQS0 SDQS1 SDQS2 SDQS3 SDQS4 SDQS5 SDQS6 SDQS7 SDQS8
SMA10
SBS0 SBS1
SCKE0 SCKE1 SCKE2 SCKE3 SCKE4 SCKE5
SSI_ST
SRAS#
SWE#
SCAS#
NC0 NC1
E14 F15 J24 G25 G6 G7
G15 G14 E24 G24 H5 F5
K25 J25 G17 G16 H7 H6
DDR_SCS#0
E9
DDR_SCS#1
F7
DDR_SCS#2
F9
DDR_SCS#3
E7 G9 G10
DDR_SDQS0
F26
DDR_SDQS1
C26
DDR_SDQS2
C23
DDR_SDQS3
B19
DDR_SDQS4
D12
DDR_SDQS5
C8
DDR_SDQS6
C5
DDR_SDQS7
E3
DDR_SDQS8
E15
DDR_SMA0
E12
DDR_SMA1
F17
DDR_SMA2
E16
DDR_SMA3
G18
DDR_SMA4
G19
DDR_SMA5
E18
DDR_SMA6
F19
DDR_SMA7
G21
DDR_SMA8
G20
DDR_SMA9
F21
DDR_SMA10
F13
DDR_SMA11
E20
DDR_SMA12
G22
DDR_SBS0
G12
DDR_SBS1
G13
DDR_CKE0
G23
DDR_CKE1
E22
DDR_CKE2
H23
DDR_CKE3
F23 J23 K23
+SM_RCOMP
J28
RCVIN#
G3
RCVOUT#
H3 H27 F11
G11 G8
AD26 AD27
R432
DDR_SRAS# DDR_SWE# DDR_SCAS#
Layout note Place R_J closely Ball H3<40mil,Ball H3 to G3 trace must routing 1"
R431 30.1_1%
12
0_0402
R_J
DDR_CLK0 10 DDR_CLK0# 10 DDR_CLK1 10 DDR_CLK1# 10 DDR_CLK2 10 DDR_CLK2# 10
DDR_CLK3 11 DDR_CLK3# 11 DDR_CLK4 11 DDR_CLK4# 11 DDR_CLK5 11 DDR_CLK5# 11
DDR_SCS#0 10,11 DDR_SCS#1 10,11 DDR_SCS#2 11 DDR_SCS#3 11
DDR_SDQS0 10 DDR_SDQS1 10 DDR_SDQS2 10 DDR_SDQS3 10 DDR_SDQS4 10 DDR_SDQS5 10 DDR_SDQS6 10 DDR_SDQS7 10 DDR_SDQS8 10
DDR_SMA[0..12]
DDR_SBS0 10,11 DDR_SBS1 10,11
DDR_CKE0 10,11 DDR_CKE1 10,11 DDR_CKE2 11 DDR_CKE3 11
12
C553 .1UF_0402_X5R C555 @47PF
DDR_SRAS# 10,11 DDR_SWE# 10,11 DDR_SCAS# 10,11
DDR_SMA[0..12] 10,11
+1.25VS
Layout note Place R431 closely pinJ28
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPE
A
B
C
D
Title
Size Docu ment Number Re v
Date: Sheet
Compal Electronics, inc.
SCHEMATIC, M/B LA-1521 401229
星期一 十一
?04, 2002
E
of
843, 
Page 9
5
4
3
2
1
Layout note :
Distr ib ute as cl ose as possib le to M CH Processor Qu adrant.(b etween VTTFSB and VSS pin)
+CPU_CORE
D D
12
C533 .1UF_0402_X5R
+CPU_CORE
12
C510 .1UF_0402_X5R
+CPU_CORE
12
C494
10UF_6.3V_1206_X5R
C C
Layout note :
Distr ib ute as cl ose as possib le to MCH Processor Quadrant.(between VCCAGP/VCCCORE and VSS pin)
Processor system bus
12
C526 .1UF_0402_X5R
12
C501 .1UF_0402_X5R
12
C493
10UF_6.3V_1206_X5R
12
C515 .1UF_0402_X5R
12
C516 .1UF_0402_X5R
AGP/CORE
12
C507 .1UF_0402_X5R
12
C499 .1UF_0402_X5R
12
C492
10UF_6.3V_1206_X5R
12
C500 .1UF_0402_X5R
12
C508 .1UF_0402_X5R
Layout note :
Distr ib ute as cl ose as possib le to MCH Processor Quadrant.(between VCCSM and VSS pin)
+2.5V
12
C550 .1UF_0402_X5R
+2.5V
12
C538 .1UF_0402_X5R
+2.5V
12
C543 .1UF_0402_X5R
+2.5V
12
C568
+
150UF_D2_6.3V
DDR Memory interface
12
C549 .1UF_0402_X5R
12
C546 .1UF_0402_X5R
12
C560 .1UF_0402_X5R
12
C548 .1UF_0402_X5R
12
C557 .1UF_0402_X5R
12
C552 .1UF_0402_X5R
12
C542 .1UF_0402_X5R
12
C558 .1UF_0402_X5R
12
C544 .1UF_0402_X5R
12
C545 .1UF_0402_X5R
12
C559 .1UF_0402_X5R
12
C551 .1UF_0402_X5R
12
C570
22UF_10V_1206
12
C567
22UF_10V_1206
+1.5VS
12
C529 .1UF_0402_X5R
B B
+1.5VS
12
C535
10UF_6.3V_1206_X5R
Layout note :
Distr ib ute as cl ose as possib le to MC H P roce ssor Quadrant.(between VCCHL and VSS pin)
+1.8VS
A A
12
C537
10UF_6.3V_1206_X5R
12
C528 .1UF_0402_X5R
12
C536
10UF_6.3V_1206_X5R
Hub-Link
12
C534 .1UF_0402_X5R
5
12
C517 .1UF_0402_X5R
12
C539 .1UF_0402_X5R
12
C496
+
150UF_D2_6.3V
12
12
C524 .1UF_0402_X5R
C540 .1UF_0402_X5R
12
C521 .1UF_0402_X5R
4
12
C531 .1UF_0402_X5R
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE
3
2
Title
Size Doc u men t Numbe r R e v
Dat e : Sheet
Compal Electronics, inc.
SCH E MATIC, M/B LA-1521 401229
期一 十一月
943¬P , 04, 2002
1
1B
of
Page 10
A
DDR_SBS0 DDR_SWE#
RP86 4P2R_22 1 4 2 3
RP85 4P2R_22 1 4 2 3
RP84 4P2R_22 1 4 2 3
RP83 4P2R_22 1 4 2 3
RP82 4P2R_22 1 4 2 3
RP81 4P2R_22 1 4 2 3
RP80 4P2R_22 1 4 2 3
RP79 4P2R_22 1 4 2 3
RP78 4P2R_22 1 4 2 3
RP77 4P2R_22 1 4 2 3
RP76 4P2R_22 1 4 2 3
RP21 4P2R_10 1 4 2 3
RP23 4P2R_10 1 4 2 3
RP25 4P2R_10 1 4 2 3
RP75 4P2R_10 1 4 2 3
RP74 4P2R_22 1 4 2 3
RP73 4P2R_22 1 4 2 3
RP72 4P2R_22 1 4 2 3
RP71 4P2R_22 1 4 2 3
RP70 4P2R_22 1 4 2 3
RP69 4P2R_22 1 4 2 3
RP68 4P2R_22 1 4 2 3
RP67 4P2R_22 1 4 2 3
RP66 4P2R_22 1 4 2 3
DDR_SDQ0 DDR_SDQ6
DDR_SDQ3 DDR_SDQ2
DDR_SDQ8
1 1
2 2
DDR_SBS08,11 DDR_SWE#8,11
3 3
4 4
DDR_SDQ12
DDR_SDQS1 DDR_SDQ14
DDR_SDQ19 DDR_SDQ17
DDR_SDQS2 DDR_SDQ21
DDR_SDQ23 DDR_SDQ31
DDR_SDQ25
DDR_SDQ26 DDR_SDQS3
DDR_CB4 DDR_CB5
DDR_CB6 DDR_CB3
DDR_SMA12 DDR_SMA9
DDR_SMA8 DDR_SMA6
DDR_SMA3 DDR_SMA1
DDR_SDQ36 DDR_SDQ37
DDR_SDQS4 DDR_SDQ33
DDR_SDQ34 DDR_DQ34 DDR_SDQ44 DDR_DQ44
DDR_SDQ41 DDR_DQ41
DDR_SDQ47 DDR_SDQ46
DDR_SDQ48 DDR_SDQ49
DDR_SDQ50
DDR_SDQ60 DDR_DQ60
DDR_SDQ62 DDR_SDQ59
A
DDR_DQ0 DDR_DQ6
DDR_DQ3 DDR_DQ2
DDR_DQ8 DDR_DQ12
DDR_DQS1 DDR_DQ14
DDR_DQ19 DDR_DQ17
DDR_DQS2 DDR_DQ21
DDR_DQ23 DDR_DQ31
DDR_DQ27DDR_SDQ27 DDR_DQ25
DDR_DQ26 DDR_DQS3
DDR_F_CB4 DDR_F_CB5
DDR_F_CB6 DDR_F_CB3
DDR_F_SMA12 DDR_F_SMA9
DDR_F_SMA8 DDR_F_SMA6
DDR_F_SMA3 DDR_F_SMA1
DDR_F_SBS0 DDR_F_SWE#
DDR_DQ36 DDR_DQ37
DDR_DQS4 DDR_DQ33
DDR_DQ43DDR_SDQ43
DDR_DQ47 DDR_DQ46
DDR_DQ48 DDR_DQ49
DDR_DQ50 DDR_DQ54DDR_SDQ54
DDR_DQ57DDR_SDQ57
DDR_DQ62 DDR_DQ59
B
DDR_SDQ4 DDR_SDQ5
DDR_SDQ1 DDR_SDQS0
DDR_SDQ7 DDR_SDQ15
DDR_SDQ9 DDR_SDQ13
DDR_SDQ11 DDR_SDQ10
DDR_SDQ20 DDR_SDQ16
DDR_SDQ22 DDR_SDQ18
DDR_SDQ29 DDR_SDQ24
DDR_SDQ28 DDR_SDQ30
DDR_SDQS8 DDR_CB7
DDR_CB0
DDR_CB2
DDR_SMA7 DDR_SMA11
DDR_SMA4 DDR_SMA5
DDR_SMA10 DDR_SMA0
DDR_SCAS#8,11 DDR_SRAS#8,11
B
DDR_SCAS# DDR_SRAS# DDR_F_SRAS#
DDR_SDQ32 DDR_DQ32 DDR_SDQ39
DDR_SDQ35 DDR_DQ35
DDR_SDQ42 DDR_SDQS5
DDR_SDQ40 DDR_SDQ45
DDR_SDQ55 DDR_DQ55 DDR_SDQ52
DDR_SDQS6 DDR_SDQ53
DDR_SDQ51
DDR_SDQ61 DDR_SDQS7
DDR_SDQ58 DDR_SDQ63
C
RP108 4P2R_22 1 4 2 3
RP107 4P2R_22 1 4 2 3
RP106 4P2R_22 1 4 2 3
RP105 4P2R_22 1 4 2 3
RP104 4P2R_22 1 4 2 3
RP103 4P2R_22 1 4 2 3
RP102 4P2R_22 1 4 2 3
RP101 4P2R_22 1 4 2 3
RP100 4P2R_22 1 4 2 3
RP99 4P2R_22 1 4 2 3
RP98 4P2R_22 1 4 2 3
RP97 4P2R_22 1 4 2 3
RP22 4P2R_10 1 4 2 3
RP24 4P2R_10 1 4 2 3
RP26 4P2R_10 1 4 2 3
RP96 4P2R_10 1 4 2 3
RP95 4P2R_22 1 4 2 3
RP94 4P2R_22 1 4 2 3
RP93 4P2R_22 1 4 2 3
RP92 4P2R_22 1 4 2 3
RP91 4P2R_22 1 4 2 3
RP90 4P2R_22 1 4 2 3
RP89 4P2R_22 1 4 2 3
RP88 4P2R_22 1 4 2 3
RP87 4P2R_22 1 4 2 3
C
DDR_DQ4 DDR_DQ5
DDR_DQ1 DDR_DQS0
DDR_DQ7 DDR_DQ15
DDR_DQ9 DDR_DQ13
DDR_DQ11 DDR_DQ10
DDR_DQ20 DDR_DQ16
DDR_DQ22 DDR_DQ18
DDR_DQ29 DDR_DQ24
DDR_DQ28 DDR_DQ30
DDR_DQS8 DDR_F_CB7
DDR_F_CB1DDR_CB1 DDR_F_CB0
DDR_F_CB2
DDR_F_SMA7 DDR_F_SMA11
DDR_F_SMA4 DDR_F_SMA5
DDR_F_SMA10 DDR_F_SMA0
DDR_F_SCAS#
DDR_DQ39
DDR_DQ38DDR_SDQ38
DDR_DQ42 DDR_DQS5
DDR_DQ40 DDR_DQ45
DDR_DQ52
DDR_DQS6 DDR_DQ53
DDR_DQ51 DDR_DQ56DDR_SDQ56
DDR_DQ61 DDR_DQS7
DDR_DQ58 DDR_DQ63
D
DDR_DQ4
DDR_DQ0 DDR_DQ6 DDR_DQS0
DDR_DQ3 DDR_DQ7
DDR_DQ8 DDR_DQS1
DDR_DQ9 DDR_DQ14
DDR_CLK18 DDR_CLK1#8
DDR_DQ19 DDR_DQ20
DDR_DQS2 DDR_DQ22
DDR_DQ23 DDR_DQ29
DDR_DQ27 DDR_DQS3
DDR_DQ28 DDR_DQ30
DDR_F_CB4 DDR_F_CB6
DDR_DQS8 DDR_F_CB1
DDR_CLK08 DDR_CLK0#8
DDR_CKE18,11
DIMM_SMDATA11,13
DDR_CKE1 DDR_CKE0
DDR_F_SMA12 DDR_F_SMA9
DDR_F_SMA7 DDR_F_SMA5 DDR_F_SMA3 DDR_F_SMA1
DDR_F_SMA10 DDR_F_SBS0 DDR_F_SWE# DDR_F_SCAS# DDR_SCS#0
DDR_DQ36 DDR_DQ32
DDR_DQS4 DDR_DQ35
DDR_DQ34 DDR_DQ42
DDR_DQ41 DDR_DQS5
DDR_DQ40 DDR_DQ47
DDR_DQ55 DDR_DQ48
DDR_DQS6 DDR_DQ50
DDR_DQ51 DDR_DQ57
DDR_DQ60 DDR_DQS7
DDR_DQ62 DDR_DQ58
DIMM_SMCLK11,13
+3VS
E
+2.5V +2.5V
JP18
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
DDR-SODIMM_200_REVERSE
DU/RESET#
VREF
VSS DQ4
DQ5 VDD DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14 DQ15
VDD VDD
VSS
VSS
DQ20 DQ21
VDD DM2
DQ22
VSS
DQ23 DQ28
VDD
DQ29
DM3
VSS
DQ30 DQ31
VDD
CB4
CB5
VSS DM8
CB6 VDD
CB7
VSS
VSS VDD VDD
CKE0
DU/BA2
VSS
VDD
BA1
RAS# CAS#
VSS
DQ36 DQ37
VDD DM4
DQ38
VSS
DQ39 DQ44
VDD
DQ45
DM5
VSS
DQ46 DQ47
VDD
CK1#
CK1
VSS
DQ52 DQ53
VDD DM6
DQ54
VSS
DQ55 DQ60
VDD
DQ61
DM7
VSS
DQ62 DQ63
VDD
SA0
SA1
SA2
F
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100
A11
102
A8
104 106
A6
108
A4
110
A2
112
A0
114 116 118 120 122
S1#
124
DU
126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DU
DDR_DQ5
DDR_DQ1 DDR_DQ2
DDR_DQ12DDR_DQ15 DDR_DQ13
DDR_DQ11 DDR_DQ10
DDR_DQ17 DDR_DQ16
DDR_DQ21 DDR_DQ18
DDR_DQ31 DDR_DQ24
DDR_DQ25 DDR_DQ26
DDR_F_CB5 DDR_F_CB7
DDR_F_CB0 DDR_F_CB2DDR_F_CB3
DDR_F_SMA11 DDR_F_SMA8
DDR_F_SMA6 DDR_F_SMA4 DDR_F_SMA2 DDR_F_SMA0
DDR_F_SRAS#
DDR_DQ37 DDR_DQ39
DDR_DQ33 DDR_DQ38
DDR_DQ44 DDR_DQ43
DDR_DQ45 DDR_DQ46
DDR_DQ52 DDR_DQ49
DDR_DQ53 DDR_DQ54
DDR_DQ56 DDR_DQ61
DDR_DQ59 DDR_DQ63
+SDREF
12
C74 .1UF
DDR_CKE0 8,11
R241 10
R436 10
DDR_SCS#1 8,11DDR_SCS#08,11
DDR_CLK2# 8 DDR_CLK2 8
G
12
12
DDR_SMA2
DDR_SBS1DDR_F_SBS1
DDR_DQ[0..63] DDR_F_CB[0..7] DDR_DQS[0..8]
DDR_SMA[0..12]
DDR_SDQ[0..63] DDR_CB[0..7] DDR _ S DQS[0..8]
DDR_SBS1 8,11
H
DDR_DQ[0..63] 11 DDR_F_CB[0..7] 11 DDR_DQS[0..8] 11 DDR_SMA[0..12] 8,11 DDR_SDQ[0..63] 8 DDR_CB[0..7] 8 DDR_SDQS[0..8] 8
DIMM0 REVERSE H:5.2mm
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPE
D
E
F
Title
Size Docu ment Number Re v
Date: Sheet
Compal Electronics, inc.
SCHEMATIC, M/B LA-1521 401229
星期一 十一
G
?04, 2002
of
10 43, 
H
Page 11
A
DDR_F_CB[0..7]10
DDR_DQS[0..8]10 DDR_DQ[0..63]10
DDR_SMA[0..12]8,10
1 1
2 2
DDR_CKE08,10 DDR_CKE18,10
3 3
4 4
DDR_F_CB[0..7] DDR_DQS[0..8] DDR_DQ[0..63] DDR_SMA[0..12]
DDR_DQ4 DDR_DQ0
DDR_DQ3 DDR_DQ7
DDR_DQ15 DDR_DQ8
DDR_DQ9 DDR_DQ14
DDR_DQ19 DDR_DQ20
DDR_DQ22 DDR_DQ23
DDR_DQ27
DDR_DQ28 DDR_DQ30
DDR_F_CB4 DDR_F_CB6
DDR_F_CB1 DDR_F_CB3
DDR_CKE0 DDR_CKE1
DDR_CKE2 DDR_CKE3
DDR_SMA11 DDR_SMA8
DDR_SMA6 DDR_SMA4
DDR_SMA2 DDR_SMA0
RP131 4P2R_56 1 4 2 3
RP130 4P2R_56 1 4 2 3
RP129 4P2R_56 1 4 2 3
RP128 4P2R_56 1 4 2 3
RP127 4P2R_56 1 4 2 3
RP126 4P2R_56 1 4 2 3
RP125 4P2R_56 1 4 2 3
RP124 4P2R_56 1 4 2 3
RP123 4P2R_56 1 4 2 3
RP122 4P2R_56 1 4 2 3
RP41 4P2R_56 1 4 2 3
RP42 4P2R_56 1 4 2 3
RP121 4P2R_56 1 4 2 3
RP120 4P2R_56 1 4 2 3
RP119 4P2R_56 1 4 2 3
+1.25VS +1.25VS
RP28 4P2R_56
14 23
RP29 4P2R_56
14 23
RP30 4P2R_56
RP31 4P2R_56
RP32 4P2R_56
RP33 4P2R_56
RP34 4P2R_56
RP35 4P2R_56
RP36 4P2R_56
RP37 4P2R_56
RP38 4P2R_56
RP39 4P2R_56
RP40 4P2R_56
RP43 4P2R_56
RP44 4P2R_56
1 2
R291 56
1 2
R292 56
14 23
14 23
14 23
14 23
14 23
14 23
14 23
14 23
14 23
14 23
14 23
14 23
14 23
DDR_DQ2
DDR_DQ5 DDR_DQ6
DDR_DQS0 DDR_DQ1
DDR_DQ12
DDR_DQ13 DDR_DQS1
DDR_DQ11 DDR_DQ10
DDR_DQ17 DDR_DQ16
DDR_DQS2DDR_DQ29 DDR_DQ21
DDR_DQ18 DDR_DQ31
DDR_DQ24 DDR_DQS3
DDR_DQ25 DDR_DQ26
DDR_F_CB5 DDR_F_CB7
DDR_DQS8 DDR_F_CB0
DDR_SMA12 DDR_F_CB2
DDR_SMA7 DDR_SMA9
DDR_SMA3 DDR_SMA5
DDR_SMA1 DDR_SMA10
B
DDR_SBS18,10 DDR_SRAS#8,10
DDR_SCS#08,10 DDR_SCS#18,10
DDR_SCAS#8,10
DDR_SBS1 DDR_SRAS#
DDR_SCS#0 DDR_SCS#1
DDR_SCAS# DDR_SCS#3
DDR_DQ36 DDR_DQ32
DDR_DQ35 DDR_DQ34
DDR_DQ42
DDR_DQ41
DDR_DQ40 DDR_DQ47
DDR_DQ55 DDR_DQ48
DDR_DQ50 DDR_DQ51
DDR_DQ57 DDR_DQ60
DDR_DQ62 DDR_DQ58
DDR_DQ63
RP118 4P2R_56 1 4 2 3
RP47 4P2R_56 1 4 2 3
RP117 4P2R_56 1 4 2 3
RP116 4P2R_56
1 4 2 3
RP115 4P2R_56
1 4 2 3
RP114 4P2R_56
1 4 2 3
RP113 4P2R_56
1 4 2 3
RP112 4P2R_56
1 4 2 3
RP111 4P2R_56
1 4 2 3
RP110 4P2R_56
1 4 2 3
RP109 4P2R_56
1 4 2 3
RP57 4P2R_56
1 4 2 3
C
RP45 4P2R_56
14 23
RP46 4P2R_56
14 23
RP48 4P2R_56
14 23
RP49 4P2R_56
14 23
RP50 4P2R_56
14 23
RP51 4P2R_56
14 23
RP52 4P2R_56
14 23
RP53 4P2R_56
14 23
RP54 4P2R_56
14 23
RP55 4P2R_56
14 23
RP56 4P2R_56
14 23
DDR_SWE# DDR_SBS0
DDR_SCS#2 DDR_DQ37
DDR_DQ39 DDR_DQS4
DDR_DQ33 DDR_DQ38
DDR_DQ44 DDR_DQ43
DDR_DQS5 DDR_DQ45
DDR_DQ46 DDR_DQ52
DDR_DQ49 DDR_DQS6
DDR_DQ53 DDR_DQ54
DDR_DQ56 DDR_DQ61
DDR_DQS7 DDR_DQ59
DDR_SWE# 8,10 DDR_SBS0 8,10
DDR_CLK48 DDR_CLK4#8
DDR_CLK38 DDR_CLK3#8
DIMM_SMDATA10,13
DIMM_SMCLK10,13
D
+2.5V +2.5V
JP19
1
VREF
3 DDR_DQ5 DDR_DQ6
DDR_DQS0 DDR_DQ1
DDR_DQ2 DDR_DQ12
DDR_DQ13 DDR_DQS1
DDR_DQ11 DDR_DQ10
DDR_DQ17 DDR_DQ16
DDR_DQS2 DDR_DQ21
DDR_DQ18 DDR_DQ31
DDR_DQ24 DDR_DQS3
DDR_DQ25 DDR_DQ26
DDR_F_CB5 DDR_F_CB7
DDR_DQS8 DDR_F_CB0
DDR_F_CB2
DDR_CKE3 DDR_CKE2 DDR_SMA12
DDR_SMA9 DDR_SMA7
DDR_SMA5 DDR_SMA3 DDR_SMA1
DDR_SMA10 DDR_SBS0 DDR_SWE#
DDR_DQ37 DDR_DQ39
DDR_DQS4 DDR_DQ33
DDR_DQ38 DDR_DQ44
DDR_DQ43 DDR_DQS5
DDR_DQ45 DDR_DQ46
DDR_DQ52 DDR_DQ49
DDR_DQS6 DDR_DQ53
DDR_DQ54 DDR_DQ56
DDR_DQ61 DDR_DQS7
DDR_DQ59 DDR_DQ63
+3VS
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
DDR-SODIMM_200_NORMAL
VREF
VSS DQ4 DQ5 VDD DM0 DQ6 VSS DQ7
DQ12
VDD
DQ13
DM1
VSS DQ14 DQ15
VDD
VDD
VSS
VSS
DQ20 DQ21
VDD
DM2 DQ22
VSS DQ23 DQ28
VDD DQ29
DM3
VSS DQ30 DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD CKE0
DU/BA2
VSS
VDD
BA1 RAS# CAS#
VSS DQ36 DQ37
VDD
DM4 DQ38
VSS DQ39 DQ44
VDD DQ45
DM5
VSS DQ46 DQ47
VDD
CK1#
CK1
VSS DQ52 DQ53
VDD
DM6 DQ54
VSS DQ55 DQ60
VDD DQ61
DM7
VSS DQ62 DQ63
VDD
SA0
SA1
SA2
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100
A11
102
A8
104 106
A6
108
A4
110
A2
112
A0
114 116 118 120 122
S1#
124
DU
126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DU
E
DDR_DQ4 DDR_DQ0
DDR_DQ3 DDR_DQ7
DDR_DQ15 DDR_DQ8
DDR_DQ9 DDR_DQ14
DDR_DQ19 DDR_DQ20
DDR_DQ22 DDR_DQ23
DDR_DQ29 DDR_DQ27
DDR_DQ28 DDR_DQ30
DDR_F_CB4 DDR_F_CB6
DDR_F_CB1 DDR_F_CB3
DDR_SMA11 DDR_SMA8
DDR_SMA6 DDR_SMA4 DDR_SMA2 DDR_SMA0
DDR_SBS1 DDR_SRAS# DDR_SCAS# DDR_SCS#3
DDR_DQ36 DDR_DQ32
DDR_DQ35 DDR_DQ34
DDR_DQ42 DDR_DQ41
DDR_DQ40 DDR_DQ47
DDR_DQ55 DDR_DQ48
DDR_DQ50 DDR_DQ51
DDR_DQ57 DDR_DQ60
DDR_DQ62 DDR_DQ58
+3VS
+SDREF
DDR_CKE2 8DDR_CKE38
DDR_SCS#3 8DDR_SCS#28
DDR_CLK5# 8 DDR_CLK5 8
12
C573 .1UF
DIMM1 NORMAL H:9.2mm
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPE
A
B
C
D
Title
Size Docu ment Number Re v
Date: Sheet
Compal Electronics, inc.
SCHEMATIC, M/B LA-1521 401229
星期一 十一
?04, 2002
E
of
11 43, 
Page 12
A
B
C
D
E
Layout note :
Distribute as close as possible to DDR-SODIMM.
+2.5V
12
C574 150UF_D2_6.3V
12
C594 .1UF_0402_X5R
1 1
12
C601 .1UF_0402_X5R
+2.5V +2.5V
12
C592 .1UF_0402_X5R
12
C600 .1UF_0402_X5R
12
C603 .1UF_0402_X5R
12
C599 .1UF_0402_X5R
12
C591 .1UF_0402_X5R
12
C598 .1UF_0402_X5R
12
C590 .1UF_0402_X5R
12
C597 .1UF_0402_X5R
12
C589 .1UF_0402_X5R
12
C602 .1UF_0402_X5R
12
C588 .1UF_0402_X5R
12
C596 .1UF_0402_X5R
12
+
12
C577 150UF_D2_6.3V
C595 .1UF_0402_X5R
+
12
C593 .1UF_0402_X5R
Layout note :
Place one cap close to every 2 pull up resistors termination to +1.25V
2 2
+1.25VS
12
C363 .1UF_0402_X5R
+1.25VS
12
C373 .1UF_0402_X5R
12
C364 .1UF_0402_X5R
12
C374 .1UF_0402_X5R
12
C365 .1UF_0402_X5R
12
C375 .1UF_0402_X5R
12
C366 .1UF_0402_X5R
12
C376 .1UF_0402_X5R
12
C367 .1UF_0402_X5R
12
C377 .1UF_0402_X5R
12
C368 .1UF_0402_X5R
12
C378 .1UF_0402_X5R
12
C369 .1UF_0402_X5R
12
C379 .1UF_0402_X5R
12
C370 .1UF_0402_X5R
12
C380 .1UF_0402_X5R
12
C371 .1UF_0402_X5R
12
C381 .1UF_0402_X5R
12
C372 .1UF_0402_X5R
12
C382 .1UF_0402_X5R
+1.25VS
12
C383
3 3
4 4
.1UF_0402_X5R
+1.25VS
12
C392 .1UF_0402_X5R
+1.25VS
12
C401 .1UF_0402_X5R
+1.25VS
12
C409 .1UF_0402_X5R
12
C384 .1UF_0402_X5R
12
C359 .1UF_0402_X5R
12
C402 .1UF_0402_X5R
12
C410 .1UF_0402_X5R
A
12
C385 .1UF_0402_X5R
12
C393 .1UF_0402_X5R
12
C403 .1UF_0402_X5R
12
C411 .1UF_0402_X5R
12
C386 .1UF_0402_X5R
12
C394 .1UF_0402_X5R
12
C605 .1UF_0402_X5R
12
C412 .1UF_0402_X5R
12
C387 .1UF_0402_X5R
12
C395 .1UF_0402_X5R
12
C604 .1UF_0402_X5R
12
C388 .1UF_0402_X5R
12
C396 .1UF_0402_X5R
12
C408 .1UF_0402_X5R
B
12
C389 .1UF_0402_X5R
12
C397 .1UF_0402_X5R
12
C404 .1UF_0402_X5R
12
C390 .1UF_0402_X5R
12
C398 .1UF_0402_X5R
12
C405 .1UF_0402_X5R
12
C391 .1UF_0402_X5R
12
C399 .1UF_0402_X5R
12
C406 .1UF_0402_X5R
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPE
12
12
12
C
C358 .1UF_0402_X5R
C400 .1UF_0402_X5R
C407 .1UF_0402_X5R
Title
Size Docu ment Number Re v
D
Date: Sheet
Compal Electronics, inc.
SCHEMATIC, M/B LA-1521 401229
星期一 十一
?04, 2002
E
of
12 43, 
Page 13
A
B
C
+3VS
L30 BLM21A601SPT
1 2
L35 BLM21A601SPT
1 2
D
+3V_CLK
+3V_CLK
+
12
C235 22UF_10V_1206
E
C245 .1UF
12
12
C253 .1UF
12
C258 .1UF
12
C263 .1UF
F
12
C249 .1UF
12
C280 .1UF
12
C279 .1UF
G
H
1 1
SEL0SEL1
00
01
*
1
11
2 2
100Mhz Host CLK
0
200Mhz Host CLK
133Mhz Host CLK
H_BSEL05 H_BSEL15
Function
66Mhz Host CLK
R216
1K
1 2 R171 @0
12
R167 @1K
H_BSEL2 H_BSEL0
R175
+3VS +3VS
12
12
1K
MULT0
0 1 2.32mA
Place Crystal within 500 mils of CK_Titan
C237 10PF
CK408_PWRGD#32,35 +3VS
BSEL0
PM_STPCPU#20,43
PM_SLP_S1#20,32 PM_SLP_S3#20,32
PM_STPPCI#20
caps are i nternal to CK_TITAN
C238 10PF
R213 10K R218 @ 10K
12
R170
1K
12
R177 @1K
Iref
5.00mA
12
12
1 2 1 2
DIMM_SMDATA DIMM_SMCLK
1 2
R226 0
1 2
R233 @0
1 2
R166 0
Please closely pin42
1 2
R223 475_1%
CLK_ICH48M CLKPCI_F2
1 2
R164 33
1 2
R178 33
1 2
R169 @33
CLK_ICH14 CLK_SIO14 CLK_DAC14
1 2
R221 33
CLK_ICH4820
3 3
CLK_ICH1420 CLK_SIO1427
CLK_DAC1430
12
CLK_14M
Y3
14.318MHZ
+3V_CLK = 40mils
U12
2
XTAL_IN
3
XTAL_OUT
40
SEL2
55
SEL1
54
SEL0
25
PWR_DWN#
34
PCI_STOP#
53
CPU_STOP#
28
VTT_PWRGD#
43
MULT0
29
SDATA
30
SCLK
33
3V66_0/DRCG
35
3V66_1/VCH_CLK
42
IREF
39
48MHZ_USB
38
48MHZ_DOT
56
REF
W320-04
or ICS 9508-05
+3V_CLK
1
32
37
14
VDD_PCI8VDD_PCI
VDD_REF
VDD_3V6619VDD_3V66
VDD_48MHZ
66MHZ_OUT2/3V66_4 66MHZ_OUT1/3V66_3 66MHZ_OUT0/3V66_2
GND_REF4GND_PCI9GND_PCI15GND_3V6620GND_3V6631GND_48MHZ36GND_IREF41GND_CPU
+3VS_VDD48M = 10mils
50
26
VDD_CORE
VDD_CPU46VDD_CPU
27
GND_CORE
45
CPUCLKT2
CPUCLKT1
CPUCLKC1 CPUCLKT0
CPUCLKC0
PCICLK_F2 PCICLK_F1 PCICLK_F0
PCICLK6 PCICLK5 PCICLK4 PCICLK3 PCICLK2 PCICLK1 PCICLK0
44 49
48 52
51 24
23 22 21
7 6 5
18 17 16 13 12 11 10
CPU_CLKC2
66MHZ_IN/3V66_5
47
+3VS_CLKVDD
12
C281 .1UF
CLK66MCH CLK66AGP CLKICHHUB
CLKPCI_SIO CLKPCI_LAN CLKPCI_CB
CLKPCI_LPC CLKPCI_DBC
+3VS_VDD48M
L33 BLM21A601SPT
1 2
12
C300 10UF_10V_1206
CLK_BCLK
CLK_BCLK# CLK_HT
CLK_HT# CLK_ITP
CLK_ITP#
1 2
R222 33
1 2
R215 33
1 2
R188 33
R214 33
1 2
R209 33
1 2 1 2
R205 33
R202 33
1 2 1 2
R196 33
+3VS_VDD48M
12
+3VS
1 2
R204 33
RD1
RD2
1 2
R208 33
1 2
R195 33
RD3 RD4
1 2
R201 33
1 2
R180 33
RD5 RD6
1 2
R185 33
Place caps. near CK_Titan (U10)
L34
12
C274 .1UF
R219 33
C301 10UF_10V_1206
1 2
R206 49.9_1%_0603
1 2
R211 49.9_1%_0603
1 2
R190 49.9_1%_0603
1 2
R200 49.9_1%_0603
1 2
R176 49.9_1%_0603
1 2
R184 49.9_1%_0603
1 2
12
12
C268
C270
@10PF
@10PF
1 2
BLM21A601SPT
12
C275 @10PF
+3VS
CLK_HCLK 4
Place resistor near RD1,RD2 ;Trace<=400mils
CLK_HCLK# 4 CLK_GHT 7
Place resistor near RD3, RD4 ;Trace<=400mils
CLK_GHT# 7 CLK_ITPP 5
Place resistor near RD5, RD6 ;Trace<=400mils
CLK_ITPP# 5
CLK_AGP_MCH 7 CLK_AGP 14 CLK_ICHHUB 20
CLK_ICHPCI 20
CLK_LPC_SIO 27 CLK_PCI_LAN 24 CLK_PCI_CB 25
CLK_LPC_EC 32 CLK_PCI_DBC 27
+5VS
2
G
1 3
D
4 4
SMB_CLK20,22
A
S
Q19 2N7002
+5VS
2
G
1 3
D
S
Q20 2N7002
B
DIMM_SMDATA 10,11SMB_DATA20,22
DIMM_SMCLK 10,11
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPE
C
D
E
F
Title
Size Docu ment Number Re v
Date: Sheet
Compal Electronics, inc.
SCHEMATIC, M/B LA-1521 401229
星期一 十一
G
?04, 2002
of
13 43, 
H
Page 14
1
AGP_AD[0:31]7
+1.5VS
VDD ST
+3VS
R79 20K_0603
1 2
OUT GND
12
R137 @1K_1%_0603
12
R140 @1K_1%_0603
3 2
AGP_DEVSEL#7
AGP_FRAME#7
FREQOUT
A A
**
+AGP_REF
B B
AGP_BUSY#20
C C
+3VS
12
R71 10K_0603
X1
4
C100
.1UF
1
OSC_27MHz
12
Divide r circuit for 1.8Vdc XTALIN from 3.3Vdc OSC out
D D
1
12
AGP_REQ#7
AGP_GNT#7
PIRQA#20,22,25
AGP_PAR7
AGP_STOP#7 AGP_TRDY#7
AGP_IRDY#7
PCIRST#7,20,23,24,25,26,27
CLK_AGP13
AGP_ADSTB07
AGP_ADSTB0#7
AGP_ADSTB17
AGP_ADSTB1#7
AGP_SBA[0:7]7
1 2
R60
C108 .1UF
AGP_RBF#7
AGP_ST07 AGP_ST17 AGP_ST27
AGP_SBSTB7
AGP_SBSTB#7
+AGP_REF
120_0603
2
AGP_AD[0:31]
R131 0_0402 R129 0_0402 R117 0_0402 R112 0_0402 R108 0_0402 R85 0_0402
CLK_AGP
+3VS
(10 mil)
C192 .1UF_0402
12
R72 150_0603
2
AGP_C/BE#07 AGP_C/BE#17 AGP_C/BE#27 AGP_C/BE#37
1 2
1 2
C151 10PF_0603
1 2
R132
0_0402
R105
0_0402
AGP_SBA[0:7]
R98
R141 47_1%_0603
1 2
12
C104 @15PF_0603
12 12 12 12 12
12 12
12
0_0402
1 2
TV_CRMA19 TV_LUMA19
TV_COMPS19
1 2
R44 845_1%_0603
3
AGP_AD0 AGP_AD1 AGP_AD2 AGP_AD3 AGP_AD4 AGP_AD5 AGP_AD6 AGP_AD7 AGP_AD8 AGP_AD9 AGP_AD10 AGP_AD11 AGP_AD12 AGP_AD13 AGP_AD14 AGP_AD15 AGP_AD16 AGP_AD17 AGP_AD18 AGP_AD19 AGP_AD20 AGP_AD21 AGP_AD22 AGP_AD23 AGP_AD24 AGP_AD25 AGP_AD26 AGP_AD27 AGP_AD28 AGP_AD29 AGP_AD30 AGP_AD31
AGP_REQ# AGP_GNT# GINTA# AGP_PAR
1 2
R9310_0603
R8120K_0603
AGP_RBF# AGP_ADSTB0
AGP_ADSTB1
AGP_ST0 AGP_ST1 AGP_ST2
AGP_SBA0 AGP_SBA1 AGP_SBA2 AGP_SBA3 AGP_SBA4 AGP_SBA5 AGP_SBA6 AGP_SBA7
AGP_SBSTB
SSIN SSOUT
OSCLIN
1 2
R77 1K_0603
R2SET
(10 mil)
3
D24 C26 D25 D26 E23 E25 E24 E26
G23 G25 G24 G26 H24 H26 H25
M26 M24 N25 M25 N26 P23 P26 P24 R25 R24 R26
N23
AA25
Y24
AA24
K24 K26
K25 AA23 AA26
W24 AB25
AB26
W26
P25
N24
Y26
Y23
Y25
W25
V24
V26
V23
U26
U24
V25
U25
C25
B26
AE6
AE7
AF25 AF26
AC6
AF16 AF15 AF14 AE14 AF13
AF6
AF7 AE16
F26
L23 L26 L24
T23 T25
F23 J25 L25
J23 J24 J26
F25 F24
T26 T24
Y3
U10A
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE#0 C/BE#1 C/BE#2 C/BE#3
REQ# GNT# INTA# PAR STOP# DEVSEL# TRDY# IRDY# FRAME# RST# PCICLK
SERR# STP_AGP#
AGP_BUSY# RBF# AD_STB0 ADSTRB0# AD_STB1 ADSTRB1#
ST0 ST1 ST2
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
SB_STB SB_STB#
AGPTEST AGPREF
SSIN SSOUT
XTALIN XTALOUT
TESTEN ROMCS# C_R
Y_G COMP_B H2SYNC V2SYNC
CRT2DDCCLK CRT2DDCDATA
R2SET
4
GPIO0
Y2
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8
GPIO9 GPIO10 GPIO11
GPIO / ROM
GPIO12 GPIO13
ZV_LCDDATA0 ZV_LCDDATA1 ZV_LCDDATA2 ZV_LCDDATA3 ZV_LCDDATA4 ZV_LCDDATA5 ZV_LCDDATA6 ZV_LCDDATA7 ZV_LCDDATA8
ZV_LCDDATA9 ZV_LCDDATA10 ZV_LCDDATA11 ZV_LCDDATA12 ZV_LCDDATA13 ZV_LCDDATA14 ZV_LCDDATA15 ZV_LCDDATA16 ZV_LCDDATA17 ZV_LCDDATA18 ZV_LCDDATA19 ZV_LCDDATA20 ZV_LCDDATA21 ZV_LCDDATA22 ZV_LCDDATA23
ZV PORT / EXT TMDSLVDSTMDSDAC
ZV_LCDCNTL0
ZV_LCDCNTL1
ZV_LCDCNTL2
ZV_LCDCNTL3
TXOUT_L0N TXOUT_L0P TXOUT_L1N TXOUT_L1P TXOUT_L2N TXOUT_L2P
PCI/AGP HOST BUS INTERFACECLK
TXOUT_L3N TXOUT_L3P
TXCLK_LN
TXCLK_LP TXOUT_U0N TXOUT_U0P TXOUT_U1N TXOUT_U1P TXOUT_U2N TXOUT_U2P TXOUT_U3N TXOUT_U3P
TXCLK_UN
TXCLK_UP
LTGIO0 LTGIO1 LTGIO2
DIGON BLON#
TX0M TX0P TX1M TX1P TX2M TX2P
TXCM
TXCP
DVIDDCCLK
SSCDAC2
DVIDDCDATA
HPD
HSYNC VSYNC
VGADDCCLK
VGADDCDATA
MONID0 MONID1
SUS_STAT#
AUXWIN
RSET
M6-C
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF T
4
R G B
Y1 W3 W2 W1 V4 V3 V2 V1 U3 U2 U1 T4 T3
AA4 AB1 AB2 AB3 AB4 AC1 AC2 AC3 AD1 AD2 AD3 AE1 AE2 AF1 AF2 AF3 AE3 AF4 AE4 AD4 AF5 AE5 AD5 AC5
Y4 AA1 AA2 AA3
AC8 AD8 AC9 AD9 AE8 AF8 AC10 AD10 AE9 AF9 AD11 AC11 AE11 AF11 AD12 AC12 AD13 AE13 AE12 AF12
AD7 AD6 AC7
AB10 AB9
AE19 AF19 AE20 AF20 AE21 AF21 AE18 AF18
AD20 AC20
AD21
AF24 AF23 AF22 AE24 AE23
AC25 AC26
AD24 AD25
AE25 AC22 AE22
(10 mil)
GPIO1 GPIO2 GPIO3
RSET
5
Option Stra p Pins
R80 @10K_0603
1 2
R84 @10K_0603
1 2
R97 @10K_0603
1 2
R90 @10K_0603 Tp4 Tp5 Tp6 Tp7 Tp8 Tp9 Tp10 Tp11 Tp12 Tp13
Tp16 Tp17 Tp18 Tp19 Tp20 Tp21 Tp22 Tp23
1 2
C122 10U_0805_6.3V
TXD0# 18 TXD0 18 TXD1# 18 TXD1 18 TXD2# 18 TXD2 18
TXC0# 18 TXC0 18 TXD4# 18 TXD4 18 TXD5# 18 TXD5 18 TXD6# 18 TXD6 18
TXC1# 18 TXC1 18
ENVDD 18 BLON# 18
R57 100K
1 2
CRT_R 19 CRT_G 19 CRT_B 19 CRT_HSYNC1 19
DDCSCL DDCSDA
R47 0_0603 R49 10K_0603 R48 499_1%_0603
CRT_VSYNC1 19
1 2 1 2 1 2
5
+3VS
L23 BLM21P300S_0805
12
SUS_STAT#
+3VS
Strap-G Strap-H Strap-J Strap-K
C110
12
0.1U
12
CRT_DDCCLK 19 CRT_DDCDATA 19
+3VS
R74 10K
R68 @10K
6
12
R67 10K
12
R64 10K
+SPREAD_P2
1
X1/CLK
7
S0
6
S1
2
U4
VDD SSCLK
Xout
SSCC
GND
SM560
3
7
1 2
1 2
12
12
R73 0
4
8
12
5
R61 @10
12
C84 @22P
SM560 Schematic for 50MHz - 108MHz
SUS_STAT#
SUS_STAT# 20,24,27
1 2
R46 10K_0603
Compal Electronics, inc.
Title
Size Docume nt Num ber R e v Custom
6
Date: Sheet
SCHEMATI C, M /B LA-1521 401229
星期一 十一月
7
8
HOST INTERFACE
C76
@22P
R52
@10
1 2
R51 22_0402_5% C80 10P_0402_16V
1 2
R50 22_0402_5%
+3V
, 2002
SSOUT
SSIN
12
C90 @10P_0402_16V
of
14 43, 04
8
1B
Page 15
1
2
3
4
5
6
7
8
MEMORY INTERFACE
A A
RP8 16P8R-10
1
A26 B25 A25 A24 B23 A23 C22 B22 C21 B21 A21 D20 C20 B20 A20 C19 B18 A18 C17 B17 A17 D16 C16 B16 B15 A15 D14 C14 B14 A14 D13 C13
U10B
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
B1
DQ32
C1
DQ33
C2
DQ34
D1
DQ35
D2
DQ36
E1
DQ37
E2
DQ38
F1
DQ39
G2
DQ40
G3
DQ41
H1
DQ42
H2
DQ43
H3
DQ44
J1
DQ45
J2
DQ46
J3
DQ47
L1
DQ48
L2
DQ49
L3
DQ50
L4
DQ51
M1
DQ52
M2
DQ53
M3
DQ54
N1
DQ55
N4
DQ56
P1
DQ57
P2
DQ58
P3
DQ59
P4
DQ60
R1
DQ61
R2
DQ62
R3
DQ63
MEMORY INTERFACE
MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8
MA9 MA10 MA11 MA12 MA13
DQM#0 DQM#1 DQM#2 DQM#3 DQM#4 DQM#5 DQM#6 DQM#7
QS0
QS1
QS2
QS3
QS4
QS5
QS6
QS7 RAS# CAS#
WE# CS#0 CS#1
CKE
CLK0
CLK0#
CLK1
CLK1#
CLKFB
VREF
MEMVMODE
NC NC
NC NC
M6-C
VMD0 VMD1 VMD2 VMD3 VMD4 VMD5 VMD6 VMD7 VMD8 VMD9 VMD10 VMD11 VMD12 VMD13 VMD14 VMD15 VMD16 VMD17 VMD18 VMD19
B B
C C
VMD20 VMD21 VMD22 VMD23 VMD24 VMD25 VMD26 VMD27 VMD28 VMD29 VMD30 VMD31
B13 A13 C12 B12 A12 D11 C11 B11 A11 C10 B10 A10 D9 C9
A22 D21 A16 C15 F2 G1 N2 N3
A19 B19 D18 C18 J4 K1 K2 K3
A9 C8 D8 B9 B8 A8 A6
B6 A4
B4 A7
B7 A5
B5 B3
T2 T1
VMA0 VMA1 VMA2 VMA3 VMA4 VMA5 VMA6 VMA7 VMA8 VMA9 VMA10 VMA11 VMA12 VMA13
VDQM0 VDQM1 VDQM2 VDQM3
VDQS0
VMRAS# VMCAS# VMWE# VMCS0#
VMCKE
R143 0
VMCLK0
R144 22_0603
VMCLK0#
R145 22_0603
MVREF
1 2
R142
4.7K_0603
2 3 4 5 6 7 8 9 8 9 7 6 5 4 3 2 1
RP9 16P8R-10
RP12
8P4R_0 4 5 3 6 2 7 1 8
1 2 1 2
1 2
+1.8VS
16 15 14 13 12 11 10
10 11 12 13 14 15 16
VDQS0 16
(10 mil)
12
C152 .1UF_0402
NMA0 NMA1 NMA2 NMA3 NMA4 NMA5 NMA6 NMA7 NMA8 NMA9 NMA10 NMA11 NMA12 NMA13
NMRAS# NMCAS# NMWE# NMCS0#
NMCKE
12
C210
@15PF_0603
+2.5VS
12
12
NMCLK0 NMCLK0#
R101 1K_1%_0603
R103 1K_1%_0603
VMD[0:31] NMA[0:13] VDQM[0:3]
NMRAS# 16 NMCAS# 16 NMWE# 16 NMCS0# 16
NMCKE 16
12
C211
@15PF_0603
VMD[0:31] 16 NMA[0:13] 16 VDQM[0:3] 16
NMCLK0 16 NMCLK0# 16
D D
Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF T
1
2
3
4
5
6
SCHEMATI C, M /B LA-1521
Size Docume nt Num ber R e v Custom
401229
星期一 十一月
Date: Sheet
, 2002
7
15 43, 04
8
1B
of
Page 16
1
2
3
4
5
6
7
8
DDR SDRAM 4X32Mb
A A
+2.5VS
+2.5VS
12
C294 2200PF_0603
12
C264 .1UF_0402
12
C295
12
C266 .1UF_0402
R160 120_0603
1 2
12
C244
2200PF_0603
2200PF_0603
12
C291 .1UF_0402
12
C265 .1UF_0402
NMA0 NMA1 NMA2 NMA3 NMA4 NMA5 NMA6 NMA7 NMA8 NMA9 NMA10 NMA11 NMA13 NMA12
NDQM0 NDQM1 NDQM2 NDQM3
NDQS0 NVREF0
NMRAS# NMCAS# NMWE# NMCS0#
NMCKE
2
8
14
22
VDDQ
VDDQ
VDDQ
A0 A1 A2 A3 A4 A5 A6 A7 A8(AP) A9 A10 A11 BA0 BA1
DM0 DM1 DM2 DM3
DQS VREF
MCL RFU
RAS# CAS# WE# CS#
CKE CK
CK# NC
NC NC NC NC
VSSQ
5
11
VSSQ
19
VDDQ
VSSQ
31 32 33 34 47 48 49 50 51 45 36 37 29 30
23 56 24 57
94 58
52 93
27 26 25 28
53 55
54 87
88 89 90 91
12
C239
C302
.1UF_0402
10UF_1206
12
12
C261
C290
.1UF_0402
VDQM3 VDQM2 VDQM1 VDQM0
VDQS0
.1UF_0402
R174 33_0603 R163 33_0603 R165 33_0603 R168 33_0603
R242 33_0603
1 2 1 2 1 2 1 2
1 2
NMCLK0
NMCLK0#
B B
VMD[0:31]15
NMA[0:13]15
VDQM[0:3]15
NMWE#15 NMCAS#15 NMRAS#15 NMCS0#15
NMCKE15 NMCLK015
NMCLK0#15
C C
VDQS015
VMD[0:31] NMA[0:13] VDQM[0:3]
NMWE# NMCAS# NMRAS# NMCS0#
NMCKE NMCLK0 NMCLK0#
VDQS0
*
+2.5VS
*
1 2
1 2
R181 1K_1%_0603
VREF1
R172 1K_1%_0603
(10 mil)
12
C227 .1UF_0402
59
62
67
VDDQ
VDDQ
VSSQ
VSSQ
70
73
VDDQ
VSSQ
76
L28
CHB2012U121
79
95
15
35
65
VDD
VDD
VDD
VDDQ
VDDQ86VDDQ
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
NC NC NC NC NC NC NC
VSS
VSS
VSS
VSSQ82VSS
VSSQ92VSSQ
16
46
66
99
96
U14
VDD
97 98 100 1 3 4 6 7 60 61 63 64 68 69 71 72 9 10 12 13 17 18 20 21 74 75 77 78 80 81 83 84
38 39 40 41 42 43 44
K4D62323HA
85
DDR 4x32Mb
C299 10UF_1206
12
FBVDD
C242 2200PF_0603
NMD0 NMD1 NMD2 NMD3 NMD4 NMD5 NMD6 NMD7 NMD8 NMD9 NMD10 NMD11 NMD12 NMD13 NMD14 NMD15 NMD16 NMD17 NMD18 NMD19 NMD20 NMD21 NMD22 NMD23 NMD24 NMD25 NMD26 NMD27 NMD28 NMD29 NMD30 NMD31
12
C248 .1UF_0402
12
C262 .1UF_0402
8 9 7 6 5 4 3 2 1 8 9 7 6 5 4 3 2 1 8 9 7 6 5 4 3 2 1 8 9 7 6 5 4 3 2 1
FBVDD
10 11 12 13 14 15 16
10 11 12 13 14 15 16
10 11 12 13 14 15 16
10 11 12 13 14 15 16
C207 10UF_1206
**
RP19 16P8R-47
RP17 16P8R-47
RP16 16P8R-47
RP20 16P8R-47
VMD24 VMD25 VMD26 VMD27 VMD28 VMD29 VMD30 VMD31 VMD16 VMD17 VMD18 VMD19 VMD20 VMD21 VMD22 VMD23 VMD8 VMD9 VMD10 VMD11 VMD12 VMD13 VMD14 VMD15 VMD0 VMD1 VMD2 VMD3 VMD4 VMD5 VMD6 VMD7
D D
Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF T
1
2
3
4
5
6
SCHEMATI C, M /B LA-1521
Size Docume nt Num ber R e v Custom
401229
星期一 十一月
Date: Sheet
, 2002
7
16 43, 04
8
1B
of
Page 17
1
A A
B B
C C
VDD_DAC1.8
VDD_DAC2.5
VDD_PNLIO1.8
VDD_PLL1.8
D D
VDD_MEMPLL1.8
VDD_PNLPLL1.8
VDD_MCLK2.5
1
2
U10C
E5
VSS
C3
VSS
B2
VSS
A1
VSS
D4
VSS
T10
VSS
T11
VSS
T12
VSS
T13
VSS
T14
VSS
T15
VSS
T16
VSS
T17
VSS
K10
VSS
K11
VSS
K12
VSS
K13
VSS
K14
VSS
K15
VSS
K16
VSS
K17
VSS
L10
VSS
L11
VSS
L12
VSS
L13
VSS
L14
VSS
L15
VSS
L16
VSS
L17
VSS
M10
VSS
M11
VSS
M12
VSS
M13
VSS
M14
VSS
M15
VSS
M16
VSS
M17
VSS
N10
VSS
N11
VSS
N12
VSS
N13
VSS
N14
VSS
N15
VSS
N16
VSS
N17
VSS
P10
VSS
P11
VSS
P12
VSS
P13
VSS
P14
VSS
P15
VSS
P16
VSS
P17
VSS
R10
VSS
R11
VSS
R12
VSS
R13
VSS
R14
VSS
R15
VSS
R16
VSS
R17
VSS
U10
VSS
U11
VSS
U12
VSS
U13
VSS
U14
VSS
U15
VSS
U16
VSS
U17
VSS
C4
VSS
D3
VSS
E4
VSS
F5
VSS
D5
VSS
AD23
AVDD
AD22
AVSSN
AC21
AVSSQ
AD16
A2VDD
AD15
A2VDDQ
AC15
A2VSSN
AC16
A2VSSN
AE15
A2VSSQ
AC13
LVDDR
AD14
LVDDR
AB13
LVSSR
AC14
LVSSR
AC19
TXVDDR
AD19
TXVDDR
AD18
TXVSSR
AD17
TXVSSR
AC18
TXVSSR
AE26
PVDD
AD26
PVSS
A2
MPVDD
A3
MPVSS
AE17
TPVDD
AF17
TPVSS
AE10
LPVDD
AF10
LPVSS
C5
VDDRH
2
CORE & HOST & MEMORY & I/O POWER
3
VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC
VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1
VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3
3
VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP
M6-C
AB11 H5 K5 M5 R5 U5 W5 AB8 AB14 AB7 AB17 AB19 W22 U22 R22 M22 K22 H22 E19 E17 E15 E12 E10 E8 AB12
D10 C7 C23 D12 D17 E3 F4 B24 F3 D6 C6 D15 D19 D22 G4 E6 E7 E9 E11 E13 E14 E16 E18 E20 E21 G5 H4 J5 K4 L5 M4 N5 P5 R4 D7
T5 U4 V5 W4 Y5 AA5 AC4 AB5 AB6 AB15 AB16 AB18 AB20 AB21 AB22 AC17 AC23 AC24
E22 F22 G22 H23 J22 K23 L22 M23 N22 P22 R23 T22 U23 V22 W23 Y22 AA22 AB23 AB24 D23 C24
**
**
+1.8VS
+2.5VS
**
**
4
C65
22UF_10V_1206
+3VS
12
.1UF_0402
+1.5VS
12
.1UF_0402
12
C47
.1UF_0402
12
C303
1UF_0805
C72
C163
5
C41
22UF_10V_1206
12
C46
1000PF_0402
12
C307
.1UF_0402
12
C71
1000PF_0402
+1.5VS
12
C161
.1UF_0402
12
.1UF_0402
+1.8VS
12
1000PF_0402
12
C308
1000PF_0402
+3VS
12
C70
1000PF_0402
12
C159
.1UF_0402
C60
C48
12
1000PF_0402
12
.1UF_0402
+2.5VS
12
C309
1000PF_0402
12
C69
.1UF_0402
12
C156
.1UF_0402
C45
C49
+1.8VS
12
.1UF_0402
12
C68 .1UF_0402
12
C154 .1UF_0402
12
C56
1000PF_0402
12
C59
.01UF_0402
C310
6
12
C55
.1UF_0402
12
C58
.1UF_0402
12
C311
.1UF_0402
12
C44 .1UF_0402
12
C57
.01UF_0402
+2.5VS
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+2.5VS
+1.8VS
L17
CHB2012U121
C54 .1UF_0402
7
POWER INTERFACE
VDD_PLL1.8
CHB1608U301
CHB1608U301
CHB1608U301
CHB1608U301
1 2
CHB1608U301
L27
1 2
CHB1608U301
L19
L26
L24
L18
L20
(20 mil)
VDD_MCLK2.5
(20 mil)
C185 .1UF_0402
VDD_DAC2.5
C86 .1UF_0402
(20 mil)
C75
10UF_1206
VDD_MEMPLL1.8
(20 mil)
C178
@10UF_1206
VDD_PNLPLL1.8
(20 mil)
C79
10UF_1206
VDD_DAC1.8
(20 mil)
C81
10UF_1206
VDD_PNLIO1.8
(20 mil)
12
C82 .1UF_0402
12
C186 100PF
12
C66 100PF
C85 .1UF_0402
C176 .1UF_0402
C89 .1UF_0402
C88 .1UF_0402
C92
1000PF_0402
12
C187 100PF
12
C87 100PF
8
C193 470PF_0603
C64 470PF_0603
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF T
4
5
6
Title
Size Docume nt Num ber R e v Custom
Date: Sheet
SCHEMATI C, M /B LA-1521 401229
星期一 十一月
, 2002
7
17 43, 04
1B
of
8
Page 18
5
4
3
2
1
LVDS Connector
D D
+5VALW
C38
22UF_16V_1206
1 2
INVT_PWM32
PID0 PID1 PID2 PID3
TXD414 TXD514
C C
TXD614 TXC114
JP1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
HEADER 25X2-LCD
DISPOFF#
DAC_BRIG 32
LCDVDD
TXD0# 14 TXD0 14
TXD1# 14 TXD1 14
TXD2# 14 TXD2 14
TXC0# 14 TXC0 14
TXD4# 14 TXD5# 14 TXD6# 14 TXC1# 14
+3VS
RP3
1 8 2 7 3 6 4 5
8P4R-10K
PID0 PID1 PID2 PID3
PID0 27 PID1 27 PID2 27 PID3 27
+3VS
R24 10K
ENBKL32
D5
RB751V
BLON#14
DISPOFF#
21
C39
13
Q1
2
2N7002
220P_0402
1000P
C40
+3V
+ C77
LCDVDD
4.7UF_10V_1206
+ C53
10UF_10V_1206
13
2
Q7
SI2302DS
C43
100PF
+12V
R37
B B
12
R34 100
13
Q4
2N7002
ENVDD14
A A
ENVDD
R16 10K
2
+5VLCDVDD
R25 10K
2
R27
13
47K
22K
2
22K
Q3
DTC124EK
100K
Q5
DTC124EK
R38 200K
13
22K
22K
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF
5
4
3
2
Title
Size Doc u men t Numbe r R e v Custom
Dat e : Sheet
SCHEMATIC, M/B LA-1521 401229
期一 十一月
1
1B
of
18 43¬P , 04, 2002
Page 19
A
B
C
D
E
D3
DAN217
1
1 1
2
D2
DAN217
1
3
2
3
D4 DAN217
2
1
3
R30 Fo r C H 7 0 1 1/M6-C
1 2
R30 0
1 2
R29 @0
+3VS
+5VS
TV_OUT CONNECTOR
R29 Fo r CH7007
1 2
C29 22PF
L4
12
C30 270PF
1 2
FBM-11-160808-121
1 2
C25 22PF
L2
1 2
FBM-11-160808-121
1 2
C27 22PF
L3
1 2
FBM-11-160808-121
C33
330PF
JP12
1 2 3 4 5 6 7
S CONN._SUYIN
12
12
C32 330PF
12
C34
330PF
TV_LUMA14
TV_CRMA14
TV_COMPS14
12
12
R17
2 2
R18
75
12
R19
75
75
12
C28
270PF
12
C26
270PF
CRT CONNECTOR
+3VS +5VS
1
D1
DAN217
2
3 3
L7
CRT_R14
CRT_G14
CRT_B14
R35 1K
U2
1
OE
CRT_HSYNC114
4 4
CRT_VSYNC114
2
A
3
GND
74AHCT1G125GW
U1
1
OE
2
A
3
GND
A
74AHCT1G125GW
12
C36
R22
18PF
75
1 2
+5VS
12
5
VCC
4
Y
+5VS
5
VCC
4
Y
R21
12
C35
R23
18PF
75
1 2
75
+CRT_VCC
FCM2012C80_0805
FCM2012C80_0805
FCM2012C80_0805
12
C37 18PF
1 2
R36
@2.2K
1 2
B
1 2
L6
1 2
L5
1 2
R26
1 2
+CRT_VCC
1 2
CHB1608B121
1 2
CHB1608B121
@2.2K
12
L41
L1
3
C21 15PF
1
D31
DAN217
2
3
12
C20 15PF
12
12
C477 68PF *10PF *10PF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF
12
C23 68PF
D32
C19 15PF
DAN217
2
1
3
C
D30
2 1
RB491D
+R_CRT_VCC
FUSE_1A
12
C18 100PF
220PF
C476
+CRT_VCC
F4
21
12
C478 .1UF
12
+CRT_VCC
12
C17 220PF
6
11
1 7
12
2 8
13
3 9
14
4 10 15
5
5VDDCCL
JP11 CRT-15P
5VDDCDA
+CRT_VCC
12
R388
2.2K
12
R387
2.2K
Q2
2N7002
+12VS
R20
2.2K
2
1 3
12
Q44 2N7002
2
1 3
CRT_DDCDATA 14
CRT_DDCCLK 14
Compal Electronics, inc.
Title
Size Doc u men t Numbe r R e v Custom
D
Dat e : Sheet
SCHEMATIC, M/B LA-1521 401229
期一 十一月
E
1B
of
19 43¬P , 04, 2002
Page 20
A
PM_BATLOW#32
AGP_BUSY#14
ICH3-M
PM_CPUPERF#5
PM_GMUXSEL43
PM_STPCPU#13,43
PM_RSMRST#32 PM_PWROK35
PM_DPRSLPVR43
PM_CLKRUN#22,25,27,32
J2
K1
J4 K3 H5 K4 H3 L1 L2
G2
L4 H4
M4
J3
M5
J1 F5 N2
G4
P2
G1
P1 F2 P3 F3 R1 E2 N4 D1 P4 E1 P5
K2 K5 N1 R2
A4 E3 D2 D5 B4
D3 F4 A3 R4 E4
12
C337 12PF
ICH_VGATE35
ATF_INT#32
SUS_STAT#14,24,27
PM_STPPCI#13 PM_SLP_S5#32
PM_SLP_S3#13,32 PM_SLP_S1#13,32
ICH_RI#22
U11A
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_C/BE#0 PCI_C/BE#1 PCI_C/BE#2 PCI_C/BE#3
PCI_GNT#0 PCI_GNT#1 PCI_GNT#2 PCI_GNT#3 PCI_GNT#4
PCI_REQ#0 PCI_REQ#1 PCI_REQ#2 PCI_REQ#3 PCI_REQ#4
RTC_VBIAS RTC_X1
RTC_X2
PBTN#22
1 2
PM_LANPWROK
V4
PM_AGPBUSY#/GPIO6
PCI
Interface
VSS0A1VSS1
A13
Y5
PM_AUXPWROK
VSS2
A16
R_K
R_L
R2460
AA5
AA2
AB3
PM_BATLOW#
VSS3
A17
V5
A20
301_1%
301_1%
W20
AA1
AA6
AA7
AB1
AC2
AB21
PM_RI#
PM_PWROK
PM_SLP_S3#
PM_RSMRST#
PM_PWRBTN#
PM_DPRSLPVR
PM_SLP_S1#/GPIO19
PM_CLKRUN#/GPIO24
PM_C3_STAT#/GPIO21
VSS4
VSS5
VSS6B8VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
A23
B10
B13
B14
B15
B18
B19
B20
+RTCVCC
HUB Reference Voltage
+1.8VS
12
R220
Place R_K and R_L Closely ICH3
12
R225
V21
U21
PM_SLP_S5#
PM_STPCPU#/GPIO20
VSS13
VSS14
B22
CLK_ICH1413 CLK_ICH4813
PM_SUSCLK
AB4
U5
AA4
PM_SUS_CLK
PM_SUS_STAT#
PM_STPPCI#/GPIO18
GeyservillePower Management
VSS15C3VSS16C6VSS17
F19
C14
1 2
R260 15K
+VS_HUBREF
ECSMI#22 ECSCI#22
RTCCLK25,26
IAC_RST#28,30 IAC_SDATAI030 IAC_SDATAI128
IAC_SDATAO28,30
IAC_SYNC28,30
1 1
IAC_BITCLK28,30
Place closely to ICH3
CLK_ICH14
12
R199 @10
12
C255 @15PF
CLK_ICH48
12
2 2
R183 @10
12
C241 @15PF
3 3
+RTCVCC
12
R261
R276 22M
+1.8VS
4 4
R155
301_1%
R_G
R157
301_1%
ECSMI# ECSCI# LID#
LID#22
PM_SUSCLK
12
R259 0
IAC_RST#
IAC_SDATAI0 IAC_SDATAI1
IAC_SDATAO IAC_SYNC IAC_BITCLK
12
R151 10K
1 2
+3VS
C/BE#024,25,27 C/BE#124,25,27 C/BE#224,25,27 C/BE#324,25,27
GNT#022 GNT#122 GNT#222,25 GNT#322,24 GNT#422
REQ#022 REQ#122 REQ#222,25 REQ#322,24 REQ#422
1 2
R263 10M R264
C333
2.4M 12PF
R238 @ 10K
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
1 2
R262 10M_0603
12
32.768KHZ
AD[0..31]24,25,27
1K
C343
1 2
.047UF_0603
1 2
12
HUB Interface VSwing Voltage
12
1. Pla ce R_G and R_H in middle of Bus.
12
C191 .1UF
+VS_HUBVSWING
12
X3
R_H
A
B
C188
@ 10PF
12
R146
@ 33
IAC_SDATAI0
IAC_SDATAI1
IAC_BITCLK
IAC_RST#
V19
Y20
U20
D11
B11
C11
B7
AC_RST#
PM_THRM#
AC_BITCLK
AC_SDATAIN0
AC_SDATAIN1
PM_GMUXSEL/GPIO23
PM_CPUPREF#/GPIO22
PM_VGATE/VRMPWRGD
AC'97
Interface
ICH3-M (1/2)
VSS
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27D9VSS28
VSS29
C15
C16
C17
C18
C19
C20
C21
C22
D13
D16
CLK_ICH14 CLK_ICH48
C348
1UF_10V_0603
B
IAC_SDATAO
IAC_SYNC
1 2
1 2
R150 33
R152 0 C7
A7
AC_SYNC
AC_SDATAOUT
VSS30
VSS31
D17
D20
12
ECSCI#
ECSMI#
LID#
U2
LPC_AD0V1LPC_AD1U3LPC_AD2T3LPC_AD3
LPC
Interface
Clocks EEPROM
VSS32
VSS33
VSS34
E5
J23
D21
D22
W2
U4
U1
GPIO_7V2GPIO_8
LPC_DRQ#0T2LPC_DRQ#1
CLK_48
CLK_14
F20
GPIO_12Y4GPIO_13Y2GPIO_25W3GPIO_27W4GPIO_28
LPC_FRAME#
unMUX
GPIO
LAN
Interface
LAN_JCLKC9LAN_RSTSYNC
CLK_RTCX2
CLK_RTCX1
CLK_RTEST#
CLK_VBIAS
Y7
D7
A10
AB7
AC6
AC7
RTC_VBIAS
RTC_RST#
RTC_X2
RTC_X1
R271
1K
1 2
J2
1 2
JOPEN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPE
C
+VS_HUBREF
12
PIRQA# PIRQB# PIRQC# PIRQD#
CLK_ICHAPIC H_PICD0 H_PICD1
R192
CLK_ICHPCI 13 DEVSEL# 22,24,25 FRAME# 22,24,25,27 PCI_REQA# 22 PCI_REQB# 22
IRDY# 22,24,25 PAR 22,24,25 PERR# 22,24,25 PLOCK# 22,25 ICH_W AKE_UP# 32
SERR# 22,24,25 STOP# 22,24,25 TRDY# 22,24,25,27
SM_INTRUDER# 22 SMLINK0 22 SMLINK1 22 SMB_CLK 13,22 SMB_DATA 13,22 SMB_ALERT# 22
GATEA20 32 H_A20M# 5
H_IGNNE# 5 H_INIT# 5 H_INTR 5 H_NMI 5 H_PWRGD 5 RC# 32 H_SLP# 5 H_SMI# 5 H_STPCLK# 5
HUB_PD[0..10]
+VS_HUBVSWING
12
C267 .01UF
Close to ICH3-M.
PIRQA# 14,22,25 PIRQB# 22,24,25 PIRQC# 22 PIRQD# 22
12
12
R189
1K
C272 .01UF
1K
1 2
R244
33
1 2
R249 0
HUB_PD[0..10] 7
1 2
R212 36.5_1%
Compal Electronics, inc.
Title
SCHEM A TIC , M/ B LA -1521
Size Docu ment Number Re v Custom
401229
Date: Sheet
星期一 十一
LPC_AD0 27,32 LPC_AD1 27,32 LPC_AD2 27,32 LPC_AD3 27,32 LPC_DRQ#0 22,32 LPC_DRQ#1 22,27 LPC_FRAME# 27,32
CLK_ICHAPIC
H_PICD0 H_PICD1
INT_IRQ14 22,23 INT_IRQ15 22,23
PCI_CLK
PCI_DEVSEL#
PCI_FRAME#
PCI_IRDY#
PCI_PAR PCI_PERR# PCI_LOCK#
PCI_PME#
PCI_RST#
PCI_SERR#
STOP#
PCI_TRDY#
SM_INTRUDER#
SMLINK0
SMLINK1
SMB_CLK
SMB_DATA
CPU_A20GATE
CPU_A20M#
CPU_DPSLP#
CPU_FERR#
CPU_IGNNE#
CPU_INIT# CPU_INTR
CPU_NMI
CPU_PWRGOOD
CPU_RCIN#
CPU_SLP# CPU_SMI#
STPCLK#
HUB_PD0 HUB_PD1 HUB_PD2 HUB_PD3 HUB_PD4 HUB_PD5 HUB_PD6 HUB_PD7 HUB_PD8 HUB_PD9
HUB_PD10
CLK_ICHHUB
PM_LANPWROK
1 2
C314 .1 UF
C
INT_SERIRQ 22,25,27,32
CLK_ICHPCI
T5 M3 F1 C4 D4
GNTA#
B6 B3 N3 G5 M2 M1 W1 Y1 L5 H2 H1
Y6 AC3 AB2 AC4 AB5 AC5
Y22 V23 AB22
H_FERR#
J22 AA21 AB23 AA23 Y21 W23 U22 W21 Y23 U23
HUB_PD0
L22
HUB_PD1
M21
HUB_PD2
M23
HUB_PD3
N20
HUB_PD4
P21
HUB_PD5
R22
HUB_PD6
R20
HUB_PD7
T23
HUB_PD8
M19
HUB_PD9
P19
HUB_PD10
N19
CLK_ICHHUB 13 HUB_PSTRB 7 HUB_PSTRB# 7
PIRQC#
PIRQD#
ICH_PID3
ICH_PID1
ICH_PID0
ICH_PID2
PIRQB#
PIRQA#
J21
J20
B1
Y3
J19
B2
INT_APICD1
INT_APICD0
INT_PIRQB#C1INT_PIRQA#
INT_PIRQD#A2INT_PIRQC#
INT_APICCLK
Interrupt Interface
Interface
EEP_CSE9EEP_DIND8EEP_DOUTE8EEP_SHCLK
LAN_RXD0C8LAN_RXD1A8LAN_RXD2A9LAN_TXD0B9LAN_TXD1
LAN_TXD2
C10
D10
+3VS
12
R153 @0
B5
A5
W19
AB14
C5
A6
INT_IRQ14
INT_PIRQF#/GPIO3
INT_PIRQE#/GPIO2
INT_PIRQH#/GPIO5
INT_PIRQG#/GPIO4
PCI_GPIO17/GNTB#/GNT5#
Interface
Managment
Interface
Interface
HUB_RCOMP
HUB_VREF
HUB_VSWING
L20
L19
P23
K19
1 2
R248 100K
H22
INT_IRQ15
INT_SERIRQ
PCI_GPIO0/REQA#
PCI_GPIO1/REQB#/REQ5#
PCI_GPIO16/GNTA#
PCI
System
Interface
SMB_ALERT#/GPIO11
CPU
HubLink
HUB_CLK
HUB_PAR
HUB_PSTRB
HUB_PSTRB#
T19
R19
N22
HUB_ICH_RCOMP
12
R203 0
C304 @10PF
+CPU_CORE
12
R253 @10K
H_FERR#
?04, 2002
D
RP11 1 8 2 7
GNTA#
3 6 4 5
8P4R_4.7K
R149 @10K
+3VS
Place closely to ICH3
12
R227 @10
12
C276 @15PF
PCIRST# 7,14,23,24,25,26,27
(for use if CPU unable to support D PSLP#)
H_DPSLP# 5
+3VS
12
R210 300
2
Q13
3 1
3904
H_F_FERR#5
CLK_ICHHUB
R236 10
1 2
C287
5PF
D
1 2
1 2
12
R217 470
Q21
3 1
3904
1 2
R251 470
20 43, 
CLK_ICHAPICCLK_ICHPCI
R207 @33
C259 @10PF
2
ICH_PID0 ICH_PID1 ICH_PID2 ICH_PID3
of
+3VS
Page 21
A
B
C
D
E
+5VS +3VS
21
12
R156
1K
1 1
+1.8VALW
1 2
R148
0_0805
U11B
D19
USB_PP0
A19
USB_PP1
E17
USB_PP2
B17
USB_PP3
D15
USB_PP4
A15
USB_PP5
D18
USB_PN#0
A18
USB_PN#1
E16
USB_PN#2
B16
USB_PN#3
D14
USB_PN#4
A14
USB_PN#5
E12
USB_OC#0
D12
USB_OC#1
C12
USB_OC#2
B12
USB_OC#3
A12
USB_OC#4
A11
USB_OC#5
H20
USB_LEDA#0/GPIO32
G22
USB_LEDA#1/GPIO33
F21
USB_LEDA#2/GPIO34
G19
USB_LEDA#3/GPIO35
E22
USB_LEDA#4/GPIO36
E21
USB_LEDA#5/GPIO37
H21
USB_LEDG#0/GPIO38
G23
USB_LEDG#1/GPIO39
F23
USB_LEDG#2/GPIO40
G21
USB_LEDG#3/GPIO41
D23
USB_LEDG#4/GPIO42
E23
USB_LEDG#5/GPIO43
B21
USB_RBIAS
H23
SPKR
U19
VCCA
F17
VCCPSUS3/VCCPUSB0
F18
VCCPSUS4/VCCPUSB1
K14
VCCPSUS5/VCCPUSB2
E10
VCCPSUS0
V8
VCCPSUS1
V9
VCCPSUS2
ICH_IDE_PRST#23 ICH_IDE_SRST#23
USB_D_PP0 USB_D_PN0
USB_D_PP1 USB_D_PN1
USB_D_PP3 USB_D_PN3
USB_OC#029 USB_OC#129
USB_OC#329
FWH_WP#22
FWH_TBL#22
EC_FLASH#33
ICH_SPKR31
+1.8VS
+3VALW
USB_D_PP0 USB_D_PP1
USB_D_PP3
USB_D_PN0 USB_D_PN1
USB_D_PN3
USB_OC#0 USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5
1 2
R173 @0
ICH_ACIN
USB_RBIAS
ICH_SPKR IDE_SDD12
R162
1 2
0_0805
+V3A_ICH
USB_PP029 USB_PN029
USB_PP129 USB_PN129
USB_PP329 USB_PN329
2 2
+3V
RP13 8P4R_10K
1 8 2 7 3 6 4 5
3 3
USB_OC#2 USB_OC#4
USB_OC#5
12
R158
18.2_1%
Disable Timeout Feature
+3VS
1 2
R193 @1K
ICH_SPKR
+1.8VS
D18 1SS355
12
C225 .1UF
L31
1 2
CHB2012U170
E13
F14
K12
P10
VCC_SUS0
VCC_SUS1
VCC_SUS2
USB
Interface
Misc
Power
VCC_SUS3
12
V7
VCC_SUS4V6VCC_SUS5
+V5S_ICHREF
C228 1UF_10V_0603
+V1.8_ICHLAN
F15
F16
VCC_USB0/VCC_SUS6
VCC_USB1/VCC_SUS7
VCC_AUX0/VCCLAN1_8F7VCC_AUX1/VCCLAN1_8F8VCC_AUX2/VCCLAN1_8
+RTCVCC
AB6
K10
VCC_RTC
+V5S_ICHREF
W8
VCC5REF1E6VCC5REF2
+5VALW
12
R147 0
12
C203 .1UF
+3VS
VCC5REFSUS
12
C13
W5
F10
VCC5REFSUS1
VCC5REFSUS2
VCCPAUX0/VCCLAN3_3F9VCCPAUX1/VCCLAN3_3
+1.8VALW
+CPU_CORE
R182 0_0805
P14
U18
V22
VCCPCPU0
VCCPCPU1
VCCPCPU2
C23
VCCUSBBG/VCC_SUS8
12
R133 0_0805
+1.8VA_ICH
B23
N/C0E7N/C1
Power
VCCUSBPLL/VCC_SUS9
T21
C2
N/C2D6N/C3T1N/C4
ICH3-M (2/2)
VSS
A21
A22
VSS102
VSS103
VCCPPCI0F6VCCPPCI1G6VCCPPCI2H6VCCPPCI3J6VCCPPCI4
M10
U6
VCCPPCI5R6VCCPPCI6T6VCCPPCI7
+3VS +1.8VS
G18
H18
P12
V15
V16
V17
V18
VCCP0
VCCP1
VCCPIDE0
VCCPIDE1
VCCPIDE2
VCCPIDE3
VCCPIDE4
E11
K6
K18
P6
P18
V10
VCCCORE0
VCCCORE1
VCCCORE2
VCCCORE3
IDE
Interface
V14
IDE_PDCS1# IDE_PDCS3#
VCCCORE4
VCCCORE5
VCCCORE6
IDE_SDCS1# IDE_SDCS3#
IDE_PDD10 IDE_PDD11 IDE_PDD12 IDE_PDD13 IDE_PDD14 IDE_PDD15
IDE_SDD10 IDE_SDD11 IDE_SDD12 IDE_SDD13 IDE_SDD14 IDE_SDD15
IDE_PDDACK# IDE_SDDACK#
IDE_PDDREQ IDE_SDDREQ
IDE_PDIOR#
IDE_SDIOR# IDE_PDIOW# IDE_SDIOW# IDE_PIORDY IDE_SIORDY
IDE_PDA0 IDE_PDA1 IDE_PDA2 IDE_SDA0 IDE_SDA1 IDE_SDA2
IDE_PDD0 IDE_PDD1 IDE_PDD2 IDE_PDD3 IDE_PDD4 IDE_PDD5 IDE_PDD6 IDE_PDD7 IDE_PDD8 IDE_PDD9
IDE_SDD0 IDE_SDD1 IDE_SDD2 IDE_SDD3 IDE_SDD4 IDE_SDD5 IDE_SDD6 IDE_SDD7 IDE_SDD8 IDE_SDD9
AC15 AB15 AC21 AC22
AA14 AC14 AA15 AC20 AA19 AB20
W12 AB11 AA10 AC10 W11 Y9 AB9 AA9 AC9 Y10 W9 Y11 AB10 AC11 AA11 AC12
Y17 W17 AC17 AB16 W16 Y14 AA13 W15 W13 Y16 Y15 AC16 AB17 AA17 Y18 AC18
Y13 Y19 AB12 AB18 AC13 AC19 Y12 AA18 AB13 AB19
IDE_PDD0 IDE_PDD1 IDE_PDD2 IDE_PDD3 IDE_PDD4 IDE_PDD5 IDE_PDD6 IDE_PDD7 IDE_PDD8 IDE_PDD9 IDE_PDD10 IDE_PDD11 IDE_PDD12 IDE_PDD13 IDE_PDD14 IDE_PDD15
IDE_SDD0 IDE_SDD1 IDE_SDD2 IDE_SDD3 IDE_SDD4 IDE_SDD5 IDE_SDD6 IDE_SDD7 IDE_SDD8 IDE_SDD9 IDE_SDD10 IDE_SDD11
IDE_SDD13 IDE_SDD14 IDE_SDD15
IDE_PDCS1# 23 IDE_PDCS3# 23 IDE_SDCS1# 23 IDE_SDCS3# 23
IDE_PDA0 23 IDE_PDA1 23 IDE_PDA2 23 IDE_SDA0 23 IDE_SDA1 23 IDE_SDA2 23 IDE_PDD[0..15] 23
IDE_SDD[0..15] 23
IDE_PDDACK# 23 IDE_SDDACK# 23 IDE_PDDREQ 23 IDE_SDDREQ 23 IDE_PDIOR# 23 IDE_SDIOR# 23 IDE_PDIOW# 23 IDE_SDIOW# 23 IDE_PIORDY 23 IDE_SIORDY 23
J18
M14
R18
T18
VCCPHL0
VCCPHL1
VCCPHL2
VCCPHL3
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41G3VSS42
VSS43
VSS44
VSS45J5VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52L3VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65N5VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77R3VSS78R5VSS79
VSS80
VSS81T4VSS82
VSS83
VSS84V3VSS85
VSS86
VSS87W6VSS88W7VSS89
VSS90
VSS91
VSS92
VSS93Y8VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
4 4
ACIN37
D17 RB751V
A
21
R154 100K
+3VS
12
ICH_ACIN
ICH3-M
L10
L11
L12
L13
L14
L21
F22
E14
E15
E18
E19
E20
B
K11
K13
K20
K21
K22
H19
G20
AA22
K23
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF
L23
M11
N10
N11
M12
M13
M20
M22
C
P11
P13
P20
N12
N13
P22
N14
N21
N23
T20
T22
R21
R23
V20
AC23
W10
W14
W18
W22
AA3
AA8
VSS101
AB8
AC1
AC8
AA12
AA16
AA20
Title
Size Doc u men t Numbe r R e v Custom
D
Dat e : Sheet
Compal Electronics, inc.
SCHEMATIC, M/B LA-1521 401229
期一 十一月
E
of
21 43¬P , 04, 2002
1B
Page 22
A
B
C
D
E
+3VS PULL-UP/BY-PASS
RP18
FRAME#20,24,25,27
IRDY#20,24,25
TRDY#20,24,25,27
STOP#20,24,25
1 1
PCI_REQA#20 REQ#020
REQ#120
GNT#120
PIRQD#20
INT_IRQ1420,23
+3VALW PULL-UP
2 2
1 2 3 4 5
+3VS +3VS
+3VS
10P8R_8.2K
RP10
1 2 3 4 5
10P8R_8.2K
RP7
1 2 3 4 5
10P8R_8.2K
+3VS+3VS
10 9 8 7 6
10 9 8 7 6
+3VS
10 9 8 7 6
SERR# 20,24,25 DEVSEL# 20,24,25 PERR# 20,24,25 PLOCK# 20,25
REQ#2 20,25PCI_REQB#20 REQ#3 20,24 REQ#4 20 INT_SERIRQ 20,25,27,32
INT_IRQ15 20,23GNT#220,25 PIRQA# 14,20,25 PIRQB# 20,24,25 PIRQC# 20
+3V PULL-UP/BY-PASS
+3VALW
SMLINK020 SMLINK120
SMB_ALERT#20
3 3
ON/OFF32,35
PBTN_OUT#
ON/OFF
1 2
R269 4.7K
1 2
R268 4.7K
1 2
R270 10K
1 2
R254 0
1 2
R252 @0
PBTN#
+3VALW
+1.8SV BY-PASS +V1.8S_ICHLAN BY-PASS
PBTN# 20PBTN_OUT#32
+1.8VS
+
SMB_DATA13,20
SMB_CLK13,20
12
C180 150UF_6.3V_D2
+3VS
12
+
C181 22UF_16V_1206
R237 4.7K
R240 4.7K
12
12
C289 .1UF
12
+
C334 22UF_16V_1206
FWH_WP#21 FWH_TBL#21
PM_CLKRUN#20,25,27,32
LPC_DRQ#020,32 LPC_DRQ#120,27
PAR20,24,25
1 2
1 2
12
C313 47PF
C257 .1UF
12
12
C325 .1UF
R139 @100
1 2
12
12
C260
C298
.1UF
47PF
12
C286 C283 .1UF
47PF
RP14
1 8 2 7 3 6 4 5
8P4R_10K
1 2
R224 10K
1 2
R235 10K
+3V
12
12
C190 .1UF
C305 .1UF
12
12
C316
C320
.1UF
.1UF
+3VS
+3VS
12
12
C288
C256 .1UF
47PF
12
C323 47PF
12
C202 .1UF
GNT#020 GNT#320,24 GNT#420
12
C324 .1UF
12
12
C247
C328
.1UF
.1UF
12
C271 47PF
12
12
C329
C206
.1UF
.1UF
1 2
R134 8.2K
1 2
R136 8.2K
1 2
R135 8.2K
12
12
C252 .1UF
12
C326 .1UF
C327 47PF
+3VS
+RTCVCC PULL-UP
+RTCVCC
SM_INTRUDER#20
1 2
R275 100K
+V5S_ICHREF BY-PASS
+V1.8_ICHLAN
C251 .1UF
C240 .1UF
C246 .1UF
+V5S_ICHREF
12
+
C236
1UF_10V_0603
12
C224 .1UF
12
C223 .1UF
EC_RIOUT#32
EC_SMI#32 EC_SCI#32
EC_LID_OUT#32
4 4
EC_SWI# EC_SMI# EC_SCI# EC_LID_OUT#
A
RP27
4 5 3 6 2 7 1 8
8P4R_0
ICH_RI# ECSMI# ECSCI# LID#
ICH_ RI# 20 ECSMI# 20 ECSCI# 20
LID# 20
+CPU _C OR E BY -PAS S
+V3A_ICH
C234
C296
C229
C226
C189
C297
.1UF
.1UF
.1UF
.1UF
.01UF
.01UF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF
B
C
+CPU_CORE
12
+
C140 1UF_10V_0603
12
C148 .1UF
D
12
C137 .1UF
+1.8VA_ICH BY-PASS+V3A_ICH BY-PASS
+1.8VA_ICH
12
+
C183
22UF_16V_1206
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-1521
Size Doc u men t Numbe r R e v Custom
401229
Dat e : Sheet
期一 十一月
12
C205 .1UF
12
12
C204 .1UF
C194 .1UF
1B
of
22 43¬P , 04, 2002
E
Page 23
IDE Module CONN.
IDE_PDD[0..15]21
IDE_PDDREQ21
IDE_PDIOW#21
IDE_PDIOR#21 IDE_PIORDY21 IDE_PDDACK#21
INT_IRQ1420,22 IDE_PDA121 IDE_PDA021 IDE_PDCS1#21 IDE_PDCS3# 21 PHDD_LED#33
1 2
+5VS
R375 100K
IDE_PDD[0..15]
PIDE_RST# IDE_PDD7 IDE_PDD6 IDE_PDD5 IDE_PDD4 IDE_PDD3 IDE_PDD2 IDE_PDD1 IDE_PDD0
IDE_PDDREQ
IDE_PIORDY
INT_IRQ 1 4
+5VS
HDD 44P SUYIN 20225A-44G5-A
JP21
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44
IDE_PDD8 IDE_PDD9 IDE_PDD10 IDE_PDD11 IDE_PDD12 IDE_PDD13 IDE_PDD14 IDE_PDD15
PCSEL
1 2
R385 470
1 2
R384 @0
+5VS
CD-ROM Module CONN.
IDE_PDA2 21
R381 @10K
1 2
R380 5.6K
1 2
+3VS
R379 1K
+5VS
12
C472
1000PF
Place component's closely IDE CONN.
1 2
C469 10UF_16V_1206
IDE_PDD7
IDE_PDDREQ
IDE_PIORDY
12
C470
1UF_25V_0805
12
C473
.1UF
+5VS
C467
1 2
.1UF
PCIRST#7,14,20,24,25,26,27
ICH_IDE_PRST#21
PCIRST#
U36
5
1 2
3
7SH08FU
4
PIDE_RST#
INT_CD_L
C78
@10PF
1 2
R55 10K
1 2
R66 5.6K
1 2
R76 1K
1 2
R82 100K
W=80mils
12
C126 10UF_16V_1206
C138 1UF_25V_0805
12
IDE_SDD7
IDE_SDDREQ
IDE_SIORDY
SHDD_LED#
12
C133 .1UF
+5VS
C91
1 2
.1UF
PCIRST#
ICH_IDE_SRST#21
U5
5
1 2
3
7SH08FU
4
SIDE_RST#
Compal Electronics, inc.
Title
Size Doc u men t Numbe r R e v
Dat e : Sheet
SCH E MATIC, M/B LA-1521
B
401229
期一 十一月
1B
of
23 43¬P , 04, 2002
C67
IDE_SIORDY
SHDD_LED#
+5VS
CDD[0..15]
CD_AGND
SIDE_RST# IDE_SDD7 IDE_SDD6 IDE_SDD5 IDE_SDD4 IDE_SDD3 IDE_SDD2 IDE_SDD1 IDE_SDD0
R86 470
JP15
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
CD-ROM CONN 50Pin.
1 2
IDE_SDD[0..15]21
CD_AGND30
12
C61
@10PF
IDE_SDIOW#21
IDE_SIORDY21
INT_IRQ1520,22
IDE_SDA121 IDE_SDA021
IDE_SDCS1#21
SHDD_LED#33
12
@10PF
C62 @10PF
IDE_SDD8 IDE_SDD9 IDE_SDD10 IDE_SDD11 IDE_SDD12 IDE_SDD13 IDE_SDD14 IDE_SDD15 IDE_SDDREQ
1 2
R78 100K
1 2
C131 0 .1UF
1 2
INT_ CD_R 30
IDE_SDDREQ 21 IDE_SDIOR# 21
IDE_SDDACK# 21
+5VS IDE_SDA2 21 IDE_SDCS3# 21
+5VS
+5VS
+5VS
+5VS
+5VS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF T
12
C129 1000PF
Place component's closely CD-ROM CONN.
Page 24
5
D D
1 2
1 2
C491 0.1UF
R391 50
1 2
R392 50
SUS_STAT#14,20,27
*
PIRQB#20,22,25
PCIRST#7,14,20,23,25,26,27
CBRST#5,25,26
AD17
12
12
AD[0..31]20,25,27
R75 @22
C106 @10PF
CLK_PCI_LAN13
1 2
R70 100
C C
+3VLAN
+2.5VLAN
C114
0.1UF
12
C162
0.1UF
CLK_PCI_LAN
5
12
B B
A A
GNT#320,22
REQ#320,22
C/BE#320,25,27
1 2
R69 @0
1 2
R63 0
AD[0..31]
DEVSEL#20,22,25
12
R390 50
CLK_PCI_LAN
AD31 AD30
AD29 AD28
AD27 AD26 AD25 AD24
AD23
C/BE#220,25,27
FRAME#20,22,25,27
IRDY#20,22,25
TRDY#20,22,25,27
STOP#20,22,25 PERR#20,22,25 SERR#20,22,25
PAR20,22,25
C/BE#120,25,27
12
R389 50
12
C489
0.1UF
4
AVDD-1
AVDD-2
AVDD-3
LAN_PME#32
LAN_RD­LAN_RD+
LAN_TD­LAN_TD+ VCTRL
12
5.6K_1% R94
ACTIVITY#
LINK1 0_100#
72
73
78
76
75
79
77
74
NC
81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99
100
LED080LED1
INTAB RSTB CLK GNTB REQB AD31 AD30 GND AD29 VDD AD28 AD27 AD26 AD25 AD24 VDD25 VDD CBE3B IDSEL AD23
AD221GND2AD213AD204AD195VDD6VDD257AD188AD179AD1610CBE2B11FRAMEB12IRDYB13TRDYB14DEVSELB15GND16STOPB17PERRB18SERRB19PAR20CBE1B21VDD22AD1523AD1424AD1325AD1226AD1127AD1028AD929AD8
AD22
LAN_TD-
4
GND
LED2
AVDD
AVDD25
ISOLATEB
AD18
AD20
AD17
AD21
AD19
12
C482
0.1UF
TXD+
71
AD16
66
62
70
TXD-
AVDD
C/BE#2
69
FRAME#
68
RXIN+
AVDD25
IRDY#
67
RXIN-
TRDY#
DEVSEL#
60
63
58
59
65
GND
RTT264RTT3
RTSET
STOP#
PERR#
U38
3
RD+
1
RD-
2
CT
4
NC
5
NC CT7CT
8
TD+
6
TD-
SWAP NET NS601680
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF
SERR#
GND
PAR
X161X2
RX+
12
RX-
TX+
CT NC NC
TX-
AVDD
AD15
C116
0.1UF
57
AVDD25
AD14
56
GND
PMEB
AD12
AD13
+3VLAN
14 16 15 13 12 10 9 11
55
VCTRL
AD11
NC54NC53NC
AD10
R32 75
3
LAN_X1 LAN_X2
VCTRL
+2.5VLAN
51
52
VDD25
EECS EESK
EEDO
VDD25
VDD25
CBE0B
30
RTL8100-B(L)
AD9
AD8
12
3
AUX
EEDI
AD0 AD1
GND
AD2 AD3
VDD AD4 AD5 AD6
VDD AD7
GND
U6
12
R33 75
LAN_GND
12
C125
0.1UF
50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31
RJ45_RX+LAN_RD+ RJ45_RX-LAN_RD-
RJ45_TX+LAN_TD+ RJ45_TX-
12
C155
0.1UF
20mil 20mil
12
C150
R119
5.6K
LAN_EECS LAN_EECLK LAN_EEDI LAN_EEDO
0.1UF
R104 0
+3VLAN
AUX
AD0 AD1
AD2 AD3
AD4 AD5 AD6
AD7
12
C135
0.1UF
1 2
*
12
1 2
L25 4.7UH_0805
+2.5VLAN
12
1
CS
2
SK
3
DI
4
DO
+3VLAN
12
C117
0.1UF
2
+3VLAN
*
C179
4.7UF_10V_1206
Y1 25 MHz
LAN_X1 LAN_X2 C147 22PF
*
Q48
+3VLAN
8 7 6 5
**
2
B
**
2
B
2
U8
VCC
NC NC
GND
9346
C/BE#0 20,25,27
ACTIVITY#
DTA114YKA
LINK10_100#
12
C182
0.1UF
10K
+3VLAN
10K
+3VLAN
12
C
47K
3 1
C
47K
3 1
C153 22PF
E
1 2
E
Q49 DTA114YKA
+3VLAN To +2.5VLAN Transfer
12
C164
0.1UF
1 2
R14 510_0603
RJ45_RX-
RJ45_RX+ RJ45_TX­RJ45_TX+
R15 510_0603
R12
75
Title
Size Doc u men t Numbe r R e v
B
Dat e : Sheet
1
+3VLAN
**
Q47
2
@2SB1197K
12
C132
0.1UF
12
12
R13 75
LAN_GND LANGND
*
31
+2.5VLAN
10mil
12
C115
0.1UF
12
C160
1000PF
JP14
12
Amber LED+
11
Amber LED-
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
10
Green LED-
9
Green LED+
Foxconn RJ45/RJ11 with LED
C4
1000P_2KV_1206
1 2
R106 0_1206
12
C158
1000PF
30mil
12
C165
1000PF
C31
@0.1UF
+3VLAN
12
+2.5V
1 2
R65 0_1206
C99
4.7UF_10V_1206
SHLD4 SHLD3
SHLD2 SHLD1
12
C24 @4.7UF_10V_0805
Compal Electronics, inc.
SCH E MATIC, M/B LA-1521 401229
期一 十一月
24 43¬P , 04, 2002
1
*
+3V
16 15
14 13
1B
of
Page 25
A
B
C
D
E
CardBus Controller OZ6933B (uBGA)
1 1
AD[0..31]20,24,27
AD31
E1
AD30
E2
AD29
F3
AD28
F1
AD27
G5
AD26
H6
AD25
G3
AD24
G2
AD23
H2
AD22
H1
AD21
J1
AD20
J2
AD19
J3
AD18
J6
AD17
K1
AD16
K2
AD15
M5
AD14
N2
AD13
N1
AD12
N3
AD11
N6
AD10
P1
AD9
P3
AD8
2 2
C/BE#320,24,27 C/BE#220,24,27 C/BE#120,24,27 C/BE#020,24,27
CLK_PCI_CB13
CLK_PCI_CB
R439 22
1 2
C611 10PF
3 3
DEVSEL#20,22,24
FRAME#20,22,24,27
IRDY#20,22,24
TRDY#20,22,24,27
STOP#20,22,24
PAR20,22,24 PERR#20,22,24 SERR#20,22,24 REQ#220,22
GNT#220,22
PIRQA#14,20,22
PIRQB#20,22,24
PLOCK#20,22
PCIRST#7,14,20,23,24,26,27
PCM_PME#32
PM_CLKRUN#20,22,27,32
PCM_RI#32
PCM_SPK#31 PCM1_LED33 PCM2_LED33
INT_SERIRQ20,22,27,32
AD20 CLK_PCI_CB
R437 100
1 2
CardBus-OZ6933T-1
N5
AD7
P6
AD6
R2
AD5
R3
AD4
T1
AD3
W4
AD2
R6
AD1
U5
AD0
P7
G1
K3 M3 R1
H5
E3
L3
K6
L1
L2
L5 M2
L6 M1 G6
F5
B5
F6
V5 D1
B14
A4
V9
K19
J19
E8 C5
E6
+3V
U27
L15
AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19
2
AD18
CARDBUS CONTROLLER
AD17 AD16
OZ6933 209PIN CSP
AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
C/BE3# C/BE2# C/BE1# C/BE0#
IDSEL PCI_CLK DEVSEL# FRAME# IRDY# TRDY# STOP# PAR PERR# SERR# PCI_REQ# PCI_GNT# IRQ9/INTA# IRQ4/INTB# LOCK# RST#
IRQ12/PME# IRQ14/CLKRUN# IRQ15/RING_OUT SPKR_OUT# LED_OUT/SKT_ACTIVITY SKTB_ACTV
IRQ5/SERIRQ IRQ7/SIN#/B_VPP_PGM
GNDH3GNDK5GNDP2GNDW5GND
AUX_VCC
MICROO
+3VS
P5
PCI_VCCF2PCI_VCCJ5PCI_VCCM6PCI_VCC
GND
GND
V15
K18NCB15
E11
+3VS
R10
J18
B10
CORE_VCC
CORE_VCC
NCE5IRQ3/VCC3#
N18
GRST#
CORE_VCC
PCI
SCLK/A_VCC_5#
K14
K15
W12
S1_D10
S1_D9
L18
M19
A_D9/CAD30
A_D10/CAD31
SDATA/B_VCC_3#
SLATCH/B_VCC_5#
IRQ9/A_VPP_VCC
IRQ10/B_VPP_VCC
F19
K17
P19
S1_A1
S1_A2
S1_A0
S1_D0
S1_D8
S1_D1
M18
M15
M17
N17
P18
R19
A_A0/CAD26
A_A1/CAD25
A_A2/CAD24
A_D1/CAD29
A_D8/CAD28
A_D0/CAD27
B_D10/CAD31B6B_D9/CAD30A6B_D1/CAD29B7B_D8/CAD28C7B_D0/CAD27A7B_A0/CAD26B8B_A1/CAD25A8B_A2/CAD24E9B_A3/CAD23B9B_A4/CAD22
S2_D10
S2_D8
S2_D1
S2_D0
S2_D9
CBRST# 5,24,26
S1_A5
S1_A4
S1_A6
S1_A7
S1_A3
S1_A25
U15
N14
R17
T19
R14
P14
A_A3/CAD23
A_A4/CAD22
A_A5/CAD21
A_A6/CAD20
A_A7/CAD18
A_A25/CAD19
Slot A
Slot B
B_A5/CAD21
F10
E10
S2_A5
S2_A3
S2_A1
S2_A0
S2_A2
S2_A4
S1_IOWR#
S1_A17
S1_A24
W15
U11
P10
A_A24/CAD17
A_A17/CAD16
B_A6/CAD20
B_A25/CAD19
F11
B11
C11
S2_A7
S2_A6
S2_A25
S1_D15
S1_A9
S1_CE2#
S1_IORD#
S1_OE#
S1_A11
S1_A10
V10
P9
W9
R9
W11
U9
U10
A_A9/CAD14
A_A10/CAD9
A_D15/CAD8
A_A11/CAD12
A_OE#/CAD11
A_CE2#/CAD10
A_IOWR/CAD15
A_IORD#/CAD13
B_A7/CAD18
B_A24/CAD17
B_A17/CAD16
B_IOWR#/CAD15
B_A9/CAD14
B_IORD#/CAD13
B_A11/CAD12
B_OE#/CAD11
F15
F14
A11
E14
E17
D19
G15
S2_A9
S2_A11
S2_A17
S2_A24
S1_IOWR# S1_IORD# S1_OE# S1_CE2#
S1_D11
S1_D12
S1_D13
S1_D6
S1_D5
S1_D3
S1_D4
S1_D7
R8
V7
W6
U8
W7
U7
U6
A_D7/CAD7
A_D6/CAD5
A_D5/CAD3
A_D4/CAD1P8A_D3/CAD0
A_D13/CAD6
A_D12/CAD4
A_D11/CAD2
B_CE2#/CAD10
B_A10/CAD9
B_D15/CAD8
B_D7/CAD7
B_D13/CAD6
B_D6/CAD5
B_D12/CAD4
B_D5/CAD3
F18
F17
E19
H15
H14
H17
H18
G18
S2_D12
S2_D15
S2_D13
S2_D6
S2_D7
S2_A10
S2_D5
S1_IOWR# 26 S1_IORD# 26 S1_A[0..25] 26 S1_OE# 26 S1_CE2# 26
A_SOCKET_VCC A_SOCKET_VCC
A_REG#/CCBE3#
A_A12/CCBE2#
A_A8/CCBE1#
A_CE1#/CCBE0#
A_A16/CCLK
A_A23/CFRAME#
A_A15/CIRDY#
A_A22/CTRDY#
A_A21/CDEVSEL#
A_A20/CSTOP#
A_A13/CPAR
A_A14/CPERR
A_WAIT#/CSERR#
A_INPACK#/CREQ#
A_WE#/CGNT#
A_RDY_IRQ#/CINT#
A_A19/CBLOCK#
A_WP/CCLKRUN#
A_RST/CRESET#
A_D2/RFU A_D14/RFU A_A18/RFU
A_VS1/CVS1
A_VS2/CVS2 A_CD1#/CCD1# A_CD2#/CCD2#
A_BVD2/CAUDIO
A_BVD1/CSTSCHG B_BVD1/CSTSCHG
B_BVD2/CAUDIO
B_CD2#/CCD2# B_CD1#/CCD1#
B_VS2/CVS2
B_VS1/CVS1
B_A18/RFU B_D14/RFU
B_D2/RFU
B_RESET/CRESET#
B_WP/CCLKRUN#
B_A19/CBLOCK#
B_RDY_IRQ#/CINT#
B_WE#/CGNT#
B_INPACK#/CREQ#
B_WAIT#/CSERR#
B_A14/CPERR#
B_A13/CPAR
B_A20/CSTOP#
B_A21/CDEVSEL#
B_A22/CTRDY#
B_A15/CIRDY#
B_A23/CFRAME#
B_A16/CCLK
B_CE1#/CCBE0#
B_A8/CCBE1#
B_A12/CCBE2#
B_REG#/CCBE3#
B_SKT_VCC B_SKT_VCC B_SKT_VCC
B_D11/CAD2
B_D4/CAD1
B_D3/CAD0
J14
J17
H19
S2_D11
S2_D3
S2_D4
R7 R13
N15
S1_A12
V14
S1_A8
V11 W8
R440 33
V13
S1_A23
U14
S1_A15
P13
S1_A22
W14
S1_A21
U13
S1_A20
W13
S1_A13
R11
S1_A14
V12 R18 P17 R12 P12
S1_A19
U12 L17 P15
S1_D2
L19
S1_D14
V8
S1_A18
P11 W10 W16 V6 L14 M14 N19
F8 C8 C6 J15 A10 E18
S2_A18
C14
S2_D14
G17
S2_D2
F7 C10 A5
S2_A19
A14 F12 E13 C9 A9
S2_A14
A15
S2_A13
C15
S2_A20
C13
S2_A21
B13
S2_A22
A13
S2_A15
C12
S2_A23
B12 E12
G14
S2_A8
A16
S2_A12
A12 F9
G19 F13 E7
C609 .1UF
S1_A[0..25] S1_D[0..15]
C619 .1UF
1 2
1 2
R438 33
+S2_VCC
C621 .1UF
S1_REG# 26
S1_CE1# 26
S1_WAIT# 26 S1_INPACK# 26
S1_WE# 26
S1_RDY# 26
S1_WP 26 S1_RST 26
S1_VS1 26 S1_VS2 26
S1_CD1# 26 S1_CD2# 26 S1_BVD2 26 S1_BVD1 26
S2_BVD1 26 S2_BVD2 26 S2_CD2# 26
S2_CD1# 26 S2_VS2 26 S2_VS1 26
S2_RST 26 S2_WP 26
S2_RDY# 26 S2_WE# 26
S2_INPACK# 26
S2_WAIT# 26
S2_CE1# 26
S2_REG# 26
C608 .1UF
S1_D[0..15] 26
+S1_VCC
C618 .1UF
S1_A16
S2_A16
C610 .1UF
+3VS
4 4
+3VS
12
C463
4.7UF_10V_0805
C606 .1UF
A
C607 .1UF
C617 .1UF
C614 .1UF
C612 .1UF
C613 .1UF
C620 .1UF
SLATCH 26 SLDATA 26 RTCCLK 20,26
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPE
B
C
S2_CE2# S2_OE# S2_IORD# S2_IOWR#
S2_CE2# 26 S2_OE# 26 S2_IORD# 26 S2_IOWR# 26
S2_A[0..25] S2_D[0..15]
S2_A[0..25] 26 S2_D[0..15] 26
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-1521
Size Docu ment Number Re v Custom
401229
Date: Sheet
星期一 十一
04, 2002
D
25 43,
E
1B
of
Page 26
PCMCIA POWER CTRL.
1 2 1 2 1 2 1 2 1 2 1 2 1 2
+S2_VPP
+S1_VPP
C347 1UF_25V_0805
C318 .1UF C321
.1UF
C575
.1UF
C357
.1UF
C586
.1UF
C587
.1UF
OCCB#33
+3V
1 2
12
12
C349 10UF_1206
C352 10UF_1206
R283 100K
W=30mils
C578
.01UF
W=30mils
C579
.01UF
12
C584 56PF
12
C585 56PF
SLDATA25 SLATCH25
RTCCLK20,25
12
12
C583
.1UF
12
C582
.1UF
+3V
12
C335
1UF_25V_0805
C576
1UF_25V_0805
+S1_VCC
12
+S2_VCC
12
C580
1000PF
+12V+5V
C581
1000PF
U17
25
VCC_5V
7
12V
24
12V
1
5V
2
5V
30
5V
15
3.3V
16
3.3V
17
3.3V
3
DATA
5
LATCH
4
CLOCK
13
APWR_GOOD#
19
BPWR_GOOD#
18
OC#
TPS2206AI/TPS2216
S1_A[0..25]25
@1000PF
@1000PF
@1000PF
C616
1 2
C572
1 2
C615
1 2
C571
1 2
@1000PF
S1_ D [0 ..1 5 ]25 S2_A[0..25]25 S2_D[0..15]25
+S1_VPP
8
AVPP
9
AVCC
10
AVCC
11
AVCC BVPP
BVCC BVCC BVCC
RESET
RESET#
NC NC NC NC
GND
PCIRST#7,14,20,23,24,25,27
G_RST#32
+S2_VPP
23 20 21 22
6 14
26 27 28 29
12
W=40mils
12
C350
4.7UF_10V_0805
W=40mils
12
C351
4.7UF_10V_0805
CBRST#
+3V
147
2 3
R304
1 2
@0
+S1_VPP +S1_VCC
+S2_VPP +S2_VCC
U25A
1
74LVC125
+3V POWER
PCMRST# 33
CBRST#
12
R303 10K
+3V
CBRST# 5,24,25
S1_CD1#
S1_CD2#
S2_CD1#
S2_CD2#
S1_A[0..25] S1_D[0..15] S2_A[0..25] S2_D[0..15]
S1_CD2#25
S1_BVD125 S1_BVD225
S1_REG#25
S1_INPACK#25
S1_WAIT#25
S1_RST25
S1_VS225
+S1_VPP
S1_RDY#25
S1_WE#25
S1_IOWR#25
S1_IORD#25
S1_VS125 S1_OE#25
S1_CE2#25
S1_CE1#25
S1_CD1#25
S1_WP25
S1_WP S1_CD2# S1_D2 S1_D10 S1_D1 S1_D9
S1_D0 S1_D8 S1_A0 S1_BVD1 S1_A1 S1_BVD2 S1_A2
S1_REG# S1_A3 S1_INPACK# S1_A4 S1_WAIT# S1_A5 S1_RST
S1_A6 S1_VS2 S1_A7 S1_A25 S2_A25 S1_A12 S1_A24 S1_A15
S1_A23 S1_A16 S1_A22
S1_A21 S1_RDY# S1_A20
S1_WE# S1_A19 S1_A14 S1_A18 S1_A13 S1_A17 S1_A8
S1_IOWR# S1_A9 S1_IORD# S1_A11 S1_VS1 S1_OE# S1_CE2#
S1_A10 S1_D15 S1_CE1# S1_D14 S1_D7 S1_D13 S1_D6
S1_D12 S1_D5 S1_D11
S1_D4 S1_CD1# S1_D3
CARDBUS
SOCKET
JP17
A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75
A1
a68
A2
a34
A3
a67
A4
a33
A5
a66
A6
a32
A7
a65
A8
a31
A9
GND a64 a30 a63 a29 a62 a28 a61 GND a27 a60 a26 a59 a25 a58 a24 GND a57 a23 a56 a22 a55 a21 a54 GND a20 a53 a19 a52/a18 none a51/a17 a16 a50 a15 GND a49 a14 a48 a13 a47 a12 a46 GND a11 a45 a10 a44 a9 a43 a8 GND a42 a7 a41 a6 a40 a5 a39 GND a4 a38 a3 a37 a2 a36 a1 a35
B1
b68
B2
b34
B3
b67
B4
b33
B5
b66
B6
b32
B7
b65
B8
b31
B9
GND
B10
b64
B11
b30
B12
b63
B13
b29
B14
b62
B15
b28
B16
b61
B17
GND
B18
b27
B19
b60
B20
b26
B21
b59
B22
b25
B23
b58
B24
b24
B25
GND
B26
b57
B27
b23
B28
b56
B29
b22
B30
b55
B31
b21
B32
b54
B33
GND
B34
b20
B35
b53
B36
b19
B37
b52/b18
B38
none
B39
b51/b17
B40
b16
B41
b50
B42
b15
B43
GND
B44
b49
B45
b14
B46
b48
B47
b13
B48
b47
B49
b12
B50
b46
B51
GND
B52
b11
B53
b45
B54
b10
B55
b44
B56
b9
B57
b43
B58
b8
B59
GND
B60
b42
B61
b7
B62
b41
B63
b6
B64
b40
B65
b5
B66
b39
B67
GND
B68
b4
B69
b38
B70
b3
B71
b37
B72
b2
B73
b36
B74
b1
B75
b35
GND
GND
GND
GND
PCMC150PIN
155
156
157
158
B2B: F OX CO ON Q TS1150A- 1121W SLOT: FOXCOON 1CA85542-TC2-TR
S2_WP S2_CD2# S2_D2 S2_D10 S2_D1 S2_D9
S2_D0 S2_D8 S2_A0 S2_BVD1 S2_A1 S2_BVD2 S2_A2
S2_REG# S2_A3 S2_INPACK# S2_A4 S2_WAIT# S2_A5 S2_RST
S2_A6 S2_VS2 S2_A7
S2_A12 S2_A24 S2_A15
S2_A23 S2_A16 S2_A22
S2_A21 S2_RDY# S2_A20
S2_WE# S2_A19 S2_A14 S2_A18 S2_A13 S2_A17 S2_A8
S2_IOWR# S2_A9 S2_IORD# S2_A11 S2_VS1 S2_OE# S2_CE2#
S2_A10 S2_D15 S2_CE1# S2_D14 S2_D7 S2_D13 S2_D6
S2_D12 S2_D5 S2_D11 S2_D4 S2_CD1# S2_D3
S2_WP 25 S2_CD2# 25
S2_BVD1 25 S2_BVD2 25
S2_REG# 25
S2_INPACK# 25 S2_WAIT# 25 S2_RST 25
S2_VS2 25
+S2_VPP +S2_VCC+S1_VCC S2_RDY# 25
S2_WE# 25
S2_IOWR# 25 S2_IORD# 25 S2_VS1 25
S2_OE# 25 S2_CE2# 25
S2_CE1# 25
S2_CD1# 25
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF T
Title
Size Doc u men t Numbe r R e v
Dat e : Sheet
SCH E MATIC, M/B LA-1521
B
401229
期一 十一月
1B
of
26 43¬P , 04, 2002
Page 27
A
B
C
D
E
SUPER I/O SMsC FDC47N227
+3VS
RP59
1 2
1 2
1 2
CTS#2 DSR#2 DCD#2 RI#2
LPD[0..7] 28
1 8 2 7 3 6 4 5
DCD#1 RI#1 CTS#1
PD5 PD7
DTR2#
CTS2# RTS2#
DSR2#
TXD2 RXD2
DCD2#
RI2#
DTR1#
CTS1# RTS1#
DSR1#
TXD1 RXD1
DCD1#
RI1#
IRRX2 IRTX2
DIR#
STEP#
DS0#
INDEX#
TRK0#
MTR0#
DSR#1
68 69 70 71 72 73 74 75
79 78 77 81 80 66 82 83 67
100 99 98 97 96 95 94 92
89 88 87 86 85 84 91 90
63 61 62
16 10 11 12 8 9 5 13 4 15 14 3 1
2 49
Base I/O Address *
1 1
LPC_AD[0..3]20,32
LPC_FRAME#20,32
LPC_DRQ#120,22
SUS_STAT#14,20,24
INT_SERIRQ20,22,25,32 PM_CLKRUN#20,22,25,32 CLK_LPC_SIO13
CLK_SIO1413
2 2
+3VS
System Board ID
1 2
R315 10K
1 2
R310 10K
3 3
+3VS
+3VS
PID018 PID118 PID218 PID318
R313 10K
C471
4.7UF_10V_0805 10V
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
1 2
R326 10K
CLK_LPC_SIO CLK_SIO14
1 2
1 2
R312 10K
12
C439 .1UF
LPC_RST#
R311 @10K
12
C424 .1UF
1 2
R382 10K
R314 @10K
1 2
1 2
12
C464 .1UF
U33
20
LAD0
21
LAD1
22
LAD2
23
LAD3
24
LFRAME#
25
LDRQ#
26
PCIRST#
27
LPCPD#
50
GPIO12/IO_SMI#
17
IO_PME#
30
SIRQ
28
CLKRUN#
29
PCICLK
19
CLK14
48
GPIO10
54
GPIO15
55
GPIO16
56
GPIO17
57
GPIO20
58
GPIO21
59
GPIO22
6
GPIO24
32
GPIO30
33
GPIO31
34
GPIO32
35
GPIO33
36
GPIO34
37
GPIO35
38
GPIO36
39
GPIO37
40
GPIO40
41
GPIO41
42
GPIO42
43
GPIO43
44
GPIO44
45
GPIO45
46
GPIO46
47
GPIO47
51
GPIO13/IRQIN1
52
GPIO14/IRQIN2
64
GPIO23/FDC_PP
18
VTR
53
VCC
65
VCC
93
VCC
7
VSS
31
VSS
60
VSS
76
VSS
SMsC LPC47N227
PD0/INDEX#
PD1/TRK0
PD2/WRTPRT#
PD3/RDATA#
PD4/DSKCHG#
PD6/MTR0#
BUSY/MTR1#
PE/WDATA#
SLCT/WGATE#
ERROR#/HDSEL#
ACK#/DS1#
INIT#/DIR#
AUTOFD#/DRVDEN0#
STROBE#/DS0#
SLCTIN#/STEP#
IRMODE/IRRX3
RDATA# WDATA# WGATE#
HDSEL#
DSKCHG# WRTPRT#
DRVDEN0
DRVDEN1
GPIO11/SYSOPT
LPD0 LPD1 LPD2 LPD3 LPD4 LPD5 LPD6 LPD7
LPTBUSY LPTPE LPTSLCT LPTERR# LPTACK#
CTS#2 DSR#2
DCD#2 RI#2
DTR#1 CTS#1 RTS#1 DSR#1
TX_D1
RX_D1 DCD#1 RI#1
RDATA# WDATA# WGATE# HDSEL# FDDIR# STEP# DRV0# INDEX# DSKCHG# WP# TRACK0# MTR0# 3MODE#
0 = 02Eh
1 = 04Eh
1 8 2 7 3 6 4 5
8P4R_4.7K
1 2
R318 10K
LPTBUSY 28 LPTPE 28 LPTSLCT 28 LPTERR# 28 LPTACK# 28 LPTINIT# 28 LPTAFD# 28 LPTSTB# 28 LPTSLCTIN# 28
R365 1K
R338 1K
R330 1K
1 = 04Eh
+3VS
PCIRST#7,14,20,23,24,25,26
4 4
.1UF
C448
1 2
+3VS
LPCRST LPC_RST#
1 2
R339 10K
A
147
U31B
LPCRST
43
74LVC14
147
U31C
12
C431 .1UF
65
74LVC14
LPC_RST# 32
PROPRIETARY NOTE
B
Close to Super I/O
CLK_SIO14
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF
CLK_LPC_SIO
R383
22
1 2
C465
1 2
10PF
C
RP60
8P4R_4.7K
R358
22
1 2
C445
1 2
10PF
+3VS
ACPI Debug Connector
+5V
RX_D1 TX_D1 DSR#1 RTS#1 CTS#1 DTR#1 RI#1 DCD#1
JP4
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
@96212-1011S
Port 80 Debug Card Connector
CLK_PCI_DBC
12
R302 @33_0402
C423
@10PF_0402
Floppy Connector
WDATA# WGATE# HDSEL# FDDIR#
+5VS
RDATA# INDEX# DSKCHG# WP#
3MODE#
RP61
6 7 8 9
10
10P8R_1K
1 8 2 7 3 6 4 5
1 2
R370 10K
RP62
8P4R_1K
5
STEP#
4
MTR0#
3
DRV0#
2
TRACK0#
1
+5VS
D
+5VS
Title
Size Doc u men t Numbe r R e v
B
Dat e : Sheet
期一 十一月
C/BE#020,24,25
AD620,24,25 AD420,24,25 AD220,24,25 AD020,24,25 AD120,24,25 AD320,24,25 AD520,24,25 AD720,24,25
AD820,24,25 C/BE#120,24,25 C/BE#220,24,25 C/BE#320,24,25
CLK_PCI_DBC13
+5VS
FRAME#20,22,24,25
TRDY#20,22,24,25
AD920,24,25
DRV0#33
**
FDD_READY#32
+5VS
12
C459
1000PF
Place component's closely FDD CONN.
C461
10UF_16V_1206
CLK_PCI_DBC PCIRST#
INDEX# DRV0# DSKCHG#
MTR0# FDDIR#
3MODE# STEP#
WDATA# WGATE# TRACK0# WP# RDATA# HDSEL#
12
C458
1UF_25V_0805
+5VS
Compal Electronics, inc.
SCH E MATIC, M/B LA-1521 401229
E
12
27 43¬P , 04, 2002
JP3
20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
HEADER 20
JP8
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
SFW 26R-1STE1
C460
.1UF
of
1B
Page 28
Parallel Port
R9 33
R8 33
RP2 10P8R-2.7K
+5VRUN_PRN
RP4
1 8 2 7 3 6 4 5
8P4R-68
RP5
1 8 2 7 3 6 4 5
8P4R-68
1 2
1 2
LPT_D0 LPT_D1 LPT_D2 LPT_D3
LPT_D4 LPT_D5 LPT_D6 LPT_D7
LPT_INIT#
SLCTIN#
109876
12345
LPD0 LPD1 LPD2 LPD3
LPD4 LPD5 LPD6 LPD7
LPTINIT#27
LPTSLCTIN#27
D6
2 1
RB420D
+5VRUN_PRN
109876
12345
LPT_D4 LPT_D5 LPT_D6 LPT_D7
LPT_D3 LPT_D2 LPT_D1 LPT_D0
+5VS +5VRUN_PRN
LPTACK# LPTBUSY LPTPE LPTSLCT
RP1 10P8R-2.7K
+5VRUN_PRN
AFD#/3M# LPTERR# LPTINIT# SLCTIN#
LPD[0..7]27
AFD#/3M# LPT_D0 LPTERR# LPT_D1
LPTINIT# LPT_D2 SLCTIN# LPT_D3
LPT_D4 LPT_D5 LPT_D6 LPT_D7
LPTACK# LPTBUSY LPTPE LPTSLCT
LPD[0..7]
CP1
1 8 2 7 3 6 4 5
8P4C-220PF
CP2
1 8 2 7 3 6 4 5
8P4C-220PF
CP3
1 8 2 7 3 6 4 5
8P4C-220PF
CP4
1 8 2 7 3 6 4 5
8P4C-220PF
+5VRUN_PRN
R7
2.2K
R11 33
R10 33
1 2
LPTPE27
1 2
AFD#/3M# LPT_D0
LPT_D1 LPT_INIT# LPT_D2 SLCTIN# LPT_D3
LPT_D4 LPT_D5 LPT_D6 LPT_D7
LPTSTB#27
LPTAFD#27
LPTERR#27
LPTACK#27
LPTBUSY27
LPTSLCT27
+5VRUNPRN
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9 22 10 23 11 24 12 25 13
JP10 LPTCN-25
C22 220PF
MDC Connector
12
C434 1UF_25V_0805
12
C444
1UF_25V_0805
+3V
+5VS_MDC+3VS_MDC+3V
R350 0
IAC_SDATAO20,30
IAC_RST#20,30
12
C436
1UF_25V_0805
1 2
+3VS
L40
1 2
+3VS_MDC
CHB1608B121
MDC CONN.
JP20
1
MONO_OUT/PC_BEEP
3
GND
5
AUXA_RIGHT
7
AUXA_LEFT
9
CD_GND
11
CD_RIGHT
13
CD_LEFT
15
GND
17
3.3Vaux
19
GND
21
3.3Vmain
23
AC97_SDATA_OUT
25
AC97_RESET#
27
GND
29
AC97_MSTRCLK
AMP-108-5424 MDC Conn 30Pin.
AUDIO_PWDN
MONO_PHONE
RESERVED
RESERVED RESERVED RESERVED RESERVED RESERVED
AC97_SYNC AC97_SDATA_IN1 AC97_SDATA_IN0
AC97_BITCLK
GND
GND
+5V
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
+5VS_MDC
1 2
R359 22
1 2
L38 CHB1608B121
1 2
R351 10K
1 2
R357 22
1 2
R360 22
MDC_DN# 33MD_MIC30 MD_SPK 30
1 2
R354 10K
IAC_BITCLK 20,30
+5VS
+3VS
IAC_SYNC 20,30
IAC_SDATAI1 20
Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF T
SCH E MATIC, M/B LA-1521
Size Doc u men t Numbe r R e v
401229
Dat e : Sheet
期一 十一月
28 43¬P , 04, 2002
1B
of
Page 29
USB Port
+5V
USB_OC#121
F1
POLYSWITCH_0.75A
12
USB_PN121
USB_PP121
C3 1000PF
+USB_VCCB
12
12
R6
470K
R3
560K
USB1_D­USB1_D+
12
C16 .1UF
USB_BGND
L12
FBM-160808-121T
1 2 1 2
L11
FBM-160808-121T
CHB4516G750_1806
C52
150UF_E
L10
4516
+
JP13
1 2 3
PORT 1
4
12
12
C15
C13 .1UF
C14 47PF
47PF
12
12
5 6 7 8 9 10 11 12
SUYIN 2557A-12G USB
PORT 2 PORT 3
+5V
USB_OC#321
+5V
USB_OC#021
F3
POLYSWITCH_0.75A
12
USB_PN321
USB_PP321
F2
POLYSWITCH_0.75A
USB_PN021
USB_PP021
+USB_VCCC
12
12
C1
1000PF
12
C2
R4
470K
R1
560K
USB3_D­USB3_D+
+USB_VCCA
1000PF
USB0_D­USB0_D+
12
R5
470K
12
R2
560K
L16
FBM-160808-121T
1 2 1 2
L15
FBM-160808-121T
12
C8 .1UF
USB_CGND
L14
FBM-160808-121T
1 2 1 2
L13
FBM-160808-121T
CHB4516G750_1806
C50
150UF_E
L8
4516
12
C12 .1UF
USB_AGND
12
C11 47PF
CHB4516G750_1806
+
12
12
C51
150UF_E
12
C10 47PF
L9
4516
C5
.1UF
+
12
12
C9
.1UF
12
12
C7
C6
47PF
47PF
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF T
Title
Size Doc u men t Numbe r R e v
B
Dat e : Sheet
SCH E MATIC, M/B LA-1521 401229
期一 十一月
1B
of
29 43¬P , 04, 2002
Page 30
AC97 Audio Codec
MONO_IN31
IAC_RST#20,28
IAC_SYNC20,28
IAC_SDATAO20,28
1 2
1 2
MIC34
R123 0_0805
+5VS
+5VALW
INT_CD_L23
INT_ CD_R23
1 2
C169 1000PF
MD_SPK28
R138 MODE
Stuff
14.318MHz External
No-Stuff
24.576MHz Crystal or External Colck
JP6
PAD-OPEN 4x4m
JP7
PAD-OPEN 4x4m
R102 20K R96 20K
R100 20K R99 20K
MIC
12
R124 100
12
R138
@0
CD_AGND23
+A_5V
+A_5V
12 12
12 12
**
R121 2.4K R122 10K
12
12
R89
0
R88 20K
4.7UF_10V_0805
CD_L_R
C157 1UF_25V_0805
CD_R_R
C149 1UF_25V_0805
CD_GNA
C139 1UF_25V_0805 C184 1UF_25V_0805
12 12
C174 1UF_25V_0805
EAPD31
12
12
R92
C446
12
C212 .1UF
C177
12
.1UF
1 2 1 2 1 2 1 2
+AUD_VREF
1 2
CD_GNA
20K
+A_5V
SUSP#32,36,41,42
+VDDA
12
1 2
CHB2012U170
C230
12
4.7UF_10V_0805
U9
14 15 16 17 23 24 18 20 19 21 22 13 12
11 10
45 46
47 48
12
C452 .1UF
L29
AUX_L AUX_R VIDEO_L VIDEO_R LIN_IN_L LIN_IN_R CD_L CD_R CD_GNA MIC1 MIC2 PHONE PC_BEEP
RESET# SYNC
5
SDATA_OUT NC
XTSEL EAPD SPDIFO
4
GND
7
GND
+AVDD_AC97
38
AVCC25AVCC
U32
4
VIN
2
DELAY ERROR7CNOISE
8
ON/OFF#
SI9182
LINE_OUT_L LINE_OUT_R
MONO_OUT
TRUE_OUT_L
TRUE_OUT_R
BIT_CLK
SDATA_IN
XTL_IN
XTL_OUT
VREFOUT
ALC202
AFLT1 AFLT2
GPIO0 GPIO1
5
VOUT
6
SENSE
1
VCC1VCC
VREF
VRDA
VRAD
NC NC
NC AGND AGND
3
GND
+VDDC
12
9
LINEL
35
LINER
36 37 39 41
6 8 2
3 29 30 28 27 32
31 33 34 43 44
40 26 42
12
C451 .1UF
R127
1 2
C173
.1UF
R126 22
1 2 1 2
C214 1000PF
0
12
C175
4.7UF_10V_0805
1 2 1 2 1 2 1 2
R125 22
1 2
C219 1000PF
C216
12
@1000PF
12
12
1 2
**
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF T
**
**
+3VS
C218 1000PF C217 1000PF C221
4.7UF_10V_0805 C222
4.7UF_10V_0805 C209 1UF_25V_0805 C200 1000PF
R114 10K
1 2
1 2
R159 0
12
C232
1UF_25V_0805
12
C220 0
12
R340 100K_1%
12
R347 33K_1%
C167
LEFT RIGHT
22PF
**
1 2
R161 @100K
+VDDA
12
C433
4.7UF_10V_0805
LEFT 31 RIGHT 31 MD_MIC 28
+AUD_VREF
12
C215 @.01UF
CLK_DAC1413
IAC_BITCLK 20,28
IAC_SDATAI0 20
12
C233
1UF_25V_0805
14.31818MHz
CLK_DAC14
12
12
C213
4.7UF_10V_0805
.1UF
Y2
24.576MHz
C231
+VDDC
R128
C168
@0.01u
C172 22PF
C171 22PF
1 2
1 2
Title
Size Doc u men t Numbe r R e v
Dat e : Sheet
@10K
R120 @10K
***
L44 0_0603
L45 @0_0603
B
期一 十一月
+AUD_VREF
12
12
C201 .1UF
C208
4.7UF_10V_0805
Compal Electronics, inc.
SCH E MATIC, M/B LA-1521 401229
30 43¬P , 04, 2002
of
1B
Page 31
A
B
C
D
E
Audio AMP
L32
1 2
U3-5 U3-23 U3-6 U3-20
C250
12
.047UF_0805
CHB3216U121
12
C278 .1UF
7
PVDD
18
PVDD
19
VDD
2
PC-ENABLE
3
VOLUME
4
LOUT+
21
ROUT+
5
LLINEIN
23
RLINEIN
6
LHPIN
20
RHPIN
17
CLK
12
C243
4.7UF_10V_0805
U13
TPA0132
12
W=40Mil
C277 @.1UF
+5VOP
4 4
R234 100K
1 2
INTSPK_L134
LEFT30
RIGHT30
3 3
INTSPK_R134
R231 0
R187 0
VOL_AMP INTSPK_L1 INTSPK_R1
R230 0
R186 0
12
12
12
12
SHUTDOWN#
SE/BTL#
PC-BEEP
BYPASS
LOUT­ROUT-
GND GND GND GND
+5VS
LIN RIN
22 15 14 11 9 16 10 8
1
12
C273
12 13 24
SHUTDOWN#
C254
1 2
INTSPK_L2 INTSPK_R2
.47UF
GNDA
+5VS
.1UF
12
C269
12
R191
13
Q12
2N7002
.47UF
100K
2
NBA_PLUG 34
NBA_PLUG
INTSPK_L2 34 INTSPK_R2 34VOL_AMP32,34
12
C282
.47UF
EAPD 30
1 2
R198 100K
+5VOP
System Sound
4
+3V POWER
B
+3VS
12
R378 100K
1 2
R377 8.2K
.22UF
PCM_SPK#25
ICH_SPKR21
C468
BEEP#32
U25B
74LVC125
2 2
1 1
A
5 6
+3VS
C456
1 2
.1UF
147
U34A
21
12
74LVC14
+3VS POWER
+3VS
147
U34B
43
74LVC14
+3VS POWER
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF
C462
1 2
1UF_10V_0603
C466
1 2
1UF_10V_0603
C449
1 2
1UF_10V_0603
R371
1 2
560
R374
1 2
R363
1 2
C
560
560
+VDDA
12
R282 10K
12
2
3 1
12
R364 10K
RB751V
2 1
R256 10K
Q23 2SC2411K
D27
12
C340 10UF_16V_1206
R257
2.4K
1 2
C312
1 2
1UF_10V_0603
MONO_IN
D
MONO_IN 30
Title
Size Doc u men t Numbe r R e v
B
Dat e : Sheet
Compal Electronics, inc.
SCH E MATIC, M/B LA-1521 401229
期一 十一月
E
1B
of
31 43¬P , 04, 2002
Page 32
5
+3VALW
1000PF
+3VALW
1 2
C344
G20
RCL#
R274
12
10K
PCI_PME#
12
12
C360 .1UF
+RTCVCC
D D
12
C332 .1UF
C C
ICH_WAKE_UP#20
B B
LAN_PME#24
PCM_PME#25
C345 .1UF
+EC_AVCC
GATEA2020
ECAGND
+3VALW
+5VALW
12
C447 .1UF
12
C435 .1UF
R279 10K
RC#20
1 8 2 7 3 6 4 5
1 2
R317 470K
1 2
R267 4.7K
1 2
R266 4.7K
1 2
R443 10K
12
C430 .1UF
L39
1 2
CHB1608U800
ECAGND
+3VS
1 2
D21 RB751V
1 2
D20 RB717F
1 2
C450 .01UF
RP58
8P4R_10K
12
C346 1000PF
+3VALW
R297 10K
1 2
2 1
2 1
21
3
G_RST# FRD# SELIO# FSEL#
EC_RST#
D24 RB751V
D25 RB751V
BATT_TEMPA
EC_SMC2 EC_SMD2
FDD_READY#
+3VALW
+3VS
**
***
LPC_AD[0..3]20,27
**
EC JTAG Connector
+3VALW
A A
EC_TINIT# EC_TCK EC_TDO EC_TDI EC_TMS
EC_URXD EC_UTXD EC_USCLK
JP22
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
@96212-1011S
5
**
4
1 2
R306 @0
1 2
R299 0
INVT_PWM18
BEEP#31
ACOFF38
PM_BATLOW#20
EC_ON35
EC_LID_OUT#22
FDD_READY#27
EC_SMC133,39 EC_SMD133,39
LPC_RST#27
PBTN_OUT#22
EC_SMC25 EC_SMD25
FAN_SPEED34
EC_CPUPD#5
PACIN34,37,38,40
PM_SLP_S3#13,20
NUM_LED#34
CAPS_LED#34
PADS_LED#34
EC_SMI#22
G_RST#26
EC_RIOUT#22
PM_SLP_S1#13,20
BATT_TEMPA39
ALI/MH#39
ON/OFF22,35
PM_SLP_S5#20
DAC_BRIG18
VOL_AMP31,34
IREF38
EN_DFAN34
LPC_FRAME#20,27
LPC_DRQ#020,22
INT_SERIRQ20,22,25,27
PM_CLKRUN#20,22,25,27
EC_SCI#22
CLK_LPC_EC13
C420 10PF
4
**
LPC_AD[0..3]
1 2
3
+3VALW +EC_AVCC +RTCVCC
12
C416 .1UF
INVT_PWM
For PWM EN_DFAN
FDD_READY# EC_URXD
EC_UTXD EC_USCLK EC_SMC1 EC_SMD1
EC_SMC2 EC_SMD2
PCI_PME# ATFOUT#
PACIN RING#
SCR_LED#
VGA_SUSP#
A/B#USE
BATT_TEMPA SYSON
BLI/MH#
BATT_CHGI
ADP_I
OEM
OEM
1 2
R337 @0
EC_TINIT# EC_TCK EC_TDO EC_TDI EC_TMS
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
1 2
R296 @0
EC_RST#
G20 RCL#
1 2
R307 22
51VDD
123
136
157
VCC134VCC245VCC3
GND5
GND6
GND7
159
167
166
95
VCC4
VCC5
VCC6
AVCC
NC111NC212NC320NC421NC585NC686NC791NC892NC997NC10
AGND
96
ECAGND
3
161
IOPH0/A0/ENV0
VBAT
IOPH1/A1/ENV1 IOPH2/A2/BADDR0 IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
IOPK2/A10 IOPK3/A11
IOPK4/A12 IOPK5/A13/BE0 IOPK6/A14/BE1
IOPK7/A15/CBRD
IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19
IOPL4/WR1#
IOPJ0/RD#
IOPJ1/WR0#
IOPM0/D8
IOPM1/D9 IOPM2/D10 IOPM3/D11 IOPM4/D12 IOPM5/D13 IOPM6/D14 IOPM7/D15
PSCLK1/IOPF0 PSDAT1/IOPF1 PSCLK2/IOPF2 PSDAT2/IOPF3 PSCLK3/IOPF4 PSDAT3/IOPF5 PSCLK4/IOPF6 PSDAT4/IOPF7
KBSOUT0 KBSOUT1 KBSOUT2 KBSOUT3 KBSOUT4 KBSOUT5 KBSOUT6 KBSOUT7 KBSOUT8
KBSOUT9 KBSOUT10 KBSOUT11 KBSOUT12 KBSOUT13 KBSOUT14 KBSOUT15
32KX1/32KCLKOUT
98
IOPH6/A6 IOPH7/A7
IOPK0/A8 IOPK1/A9
IOPI0/D0 IOPI1/D1 IOPI2/D2 IOPI3/D3 IOPI4/D4 IOPI5/D5 IOPI6/D6 IOPI7/D7
SELIO#
SEL0# SEL1#
KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7
32KX2
CLK
1 2
CHB1608U800
124 125 126 127 128 131 132 133
143 142 135 134 130 129 121 120
113 112 104 103 48
138 139 140 141 144 145 146 147
150 151
152 173
174 148
149 155 156 3 4 27 28
110 111 114 115 116 117 118 119
71 72 73 74 77 78 79 80
49 50 51 52 53 56 57 58 59 60 61 64 65 66 67 68
158 160 47
PC87591VPC
L37
U20
32
IOPA0/PWM0
33
IOPA1/PWM1
36
IOPA2/PWM2
37
IOPA3/PWM3
38
IOPA4/PWM4
39
IOPA5/PWM5
40
IOPA6/PWM6
43
IOPA7/PWM7
153
IOPB0/URXD
154
IOPB1/UTXD
162
IOPB2/USCLK
163
IOPB3/SCL1
164
IOPB4/SDA1
165
IOPB7/RING#/PFAIL#
168
IOPC0
169
IOPC1/SCL2
170
IOPC2/SDA2
171
IOPC3/TA1
172
IOPC4/TB1/EXWINT22
175
IOPC5/TA2
176
IOPC6/TB2/EXWINT23
1
IOPC7/CLKOUT
26
IOPD0/RI1#/EXWINT20
29
IOPD1/RI2#/EXWINT21
30
IOPD2/EXWINT24
41
IOPD4
42
IOPD5
54
IOPD6
55
IOPD7
62
IOPJ2/BST0
63
IOPJ3/BST1
69
IOPJ4/BST2
70
IOPJ5/PFS#
75
IOPJ6/PLI
76
IOPJ7/BRKL_RSTO#
81
AD0
82
AD1
83
AD2
84
AD3
87
IOPE0AD4
88
IOPE1/AD5
89
IOPE2/AD6
90
IOPE3/AD7
2
IOPE4/SWIN
44
IOPE5/EXWINT40
93
DP/AD8
94
DN/AD9
99
DA0
100
DA1
101
DA2
102
DA3
105
TINT#
106
TCK
107
TDO
108
TDI
109
TMS
15
LAD0
14
LAD1
13
LAD2
10
LAD3
9
LFRAME#
8
LDRQ#
7
SERIRQ
19
LREST#
22
SMI#
23
PWUREQ#
24
IOPE6/LPCPD#/EXWIN45
25
IOPE7/CLKRUN#/EXWINT46
31
IOPD3/ECSCI#
5
GA20/IOPB5
6
KBRST#/IOPB6
18
LCLK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF
16
VDD
GND117GND235GND346GND4
122
137
KBA[0 ..1 8 ]33
ADB[0..7]33
KSI[0..7]34
KSO [0 ..1 5 ]34
KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7
KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15
KBA16 KBA17 KBA18
KBA19
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
FRD#
SELIO# FSEL#
SUSP# VR_ON
TRICKLE
ENBKL
KBD_CLK KBD_DATA PS2_CLK PS2_DATA
TP_CLK TP_DATA
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7
KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15
CRY1 CRY2
***
12
C331 10PF
2
KBA[0..18] ADB[0..7] KSI[0..7] KSO[0..15]
PCM_RI#25
FSTCHG 38
FRD# 33 FWR# 33
SELIO# 33 FSEL# 33
SYSON 36,41 SUSP# 30,36,41,42 VR_ON 5,43
EC_RESET# CK408_PWRGD# 13,35
ENBKL 18
TP_CLK 34 TP_DATA 34 LID_SW# 35
BADDR1(KBA3) BADDR0(KBA2)
0 0
*
11
R273
20M
X2
CRY2CR Y1
1 2 12
2
1 2
32.768KHZ
1
+3V +3V
12
ATFOUT#
R280 100K
1 2
+3VS
R372
10K
2 1
D28
RB751V
R258 10K
D23 RB751V
PM_RSMRST# 20
R373
10K
1 2
RING#
12
21
ATF_INT# 20
KBA0 KBA1 KBA2 KBA3 KBA4 KBA5
I/O Address
Index 0 1 01
2E 2F
4E
(HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1
Reserved
ENV1 (KBA1)
0 1
1
R272 120K
C336 12PF
ENV0 (KBA0) TRIS (KBA4)
IRE OBD 0
*
DEV 0 PROG
SHBM(KBA5)=1: Enable shared memory with host BIOS TRIS(KBA4)=1: While in IRE and OBD, float all the signals for clip-on ISE use
0 1
1
Compal Electronics, inc.
Title
Size Doc u men t Numbe r R e v
B
Dat e : Sheet
SCH E MATIC, M/B LA-1521 401229
期一 十一月
1
1 2
R290 @1K
1 2
R289 1K R288 @1K
1 2
R286 1K R284 @1K
1 2
R281 1K
Data
4F
0 0 0 0
of
32 43¬P , 04, 2002
+3VALW
1B
Page 33
EXT I/O PORT
INPUT PORT
12
R319
3
+12VS
FRD# KBA10 FSEL# ADB7 ADB6 ADB5 ADB4 ADB3
ADB2 ADB1 ADB0 KBA0 KBA1 KBA2 KBA3
KBA1
SELIO#
KBA[0..18] ADB[0..7]
100K
SHDD_LED#23 PHDD_LED#23
FRD# 32 FSEL# 32
OCCB#26
DRV0#27
+3VALW
147
4 5
+FLASH_VCC
U18B
74LVC32
PCM_LED
EC_BID0 EC_BID1 EC_BID2
6
KBA11 KBA9 KBA8 KBA13 KBA14 KBA17 FWE#
KBA18 KBA16 KBA15 KBA12 KBA7 KBA6 KBA5 KBA4
KBA18 KBA16 KBA15 KBA12 KBA7 KBA6 KBA5 KBA4 KBA3 KBA2
KBA0 ADB0 ADB1
D26 PCM1_LED25 PCM2_LED25
+3VALW
1 2
DAN202U
1 2
R331 @100K
1 2
R325 @100K
1 2
R322 100K
1 2
R321 @100K
12
R324 100K
12
R327 100K
*** **
EC BOARD ID
EVT
LOW LOW LOW
DVT
(STUFF R322)
(REV 0.1)
PVT1
LOW
(REV 0.2)
(STUFF R322)
PVT2
(REV 1.0)
LOW HI
(STUFF R322)
Pre-MP
*
SYSTEM BIOS SMBUS EEPROM
1 2
C453 . 1UF
FWE#
4
U35 7SH32FU
C457
1 2
.1UF
+FLASH_VCC
EC_BID1
(STUFF R325)
LOW
(STUFF R325)
(STUFF R324)
3 5
KBA11 KBA9 KBA8 KBA13 KBA14 KBA17 FWE#
KBA18 KBA16 KBA15 KBA12 KBA7 KBA6 KBA5 KBA4
EC_BID0EC_BID2
+3VALW+3VALW
12
R376 100K
2 1
R367 @0 R366 0
U26
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16
SST39VF040_TSOP
(STUFF R331)
HI
(STUFF R327)
HI
(STUFF R327)
2N7002
1 2 1 2
A11 A9 A8 A13 A14 A17 WE# VCC A18 A16 A15 A12 A7 A6 A5 A4
KBA[0 ..1 8 ]32 ADB[0..7]32
2
1 3
D
SELIO#32
R386
1 2
100K
G
Q43
S
+5VALW +3VALW
OE#
A10
CE# DQ7 DQ6 DQ5 DQ4 DQ3 VSS DQ2 DQ1 DQ0
A0 A1 A2 A3
EC_FLASH# 21 FWR# 32
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
+3VALW
1A121Y1 1A241Y2 1A361Y3 1A481Y4 2A1112Y1 2A2132Y2 2A3152Y3 2A4172Y4
1
1G
19
2G
R316
1 2
100K
U30
1
A11
2
A9
3
A8
4
A13
5
A14
6
A17
7
WE#
8
VCC
9
A18
10
A16
11
A15
12
A12
13
A7
14
A6
15
A5
16
A4
@29F040_TSOP
U28
1
NC
2
A16
3
A15
4
A12
5
A7
6
A6
7
A5
8
A4
9
A3
10
A2
11
A1
12
A0
13
DQ0
14
DQ1
15
DQ2
16
VSS
@SST39VF040_PLCC
C418
1 2
.1UF
20
U24
VCC
GND
10
+3VALW
PLCC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF T
18 16 14 12 9 7 5 3
74LVC244
OE#
A10 CE# DQ7 DQ6 DQ5 DQ4 DQ3 VSS DQ2 DQ1 DQ0
A0 A1 A2 A3
VCC WE*
A17 A14 A13
A8
A9 A11 OE*
A10
CE* DQ7 DQ6 DQ5 DQ4 DQ3
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
FRD# KBA10 FSEL# ADB7 ADB6 ADB5 ADB4 ADB3
ADB2 ADB1 ADB0 KBA0 KBA1 KBA2 KBA3
1 2
C455 . 1UF
+FLASH_VCC
FWE# KBA17 KBA14 KBA13 KBA8 KBA9 KBA11 FRD# KBA10 FSEL#KBA1 ADB7 ADB6 ADB5 ADB4ADB2 ADB3
KBA2 SELIO#
C338
1 2
.1UF
+3VALW
147
1 2
U18A
74LVC32
3
+3VALW
+5VALW
1 2
R278 100K
1 2
R300 20K
EC_SMC132,39 EC_SMD132,39
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
+5VALW +5VALW
11
12
C414
1UF_25V_0805
12
R336
4.7K
OUTPUT PORT
.1UF
+5VALW
C417
1 2
20
U22
R335
4.7K
Q0
VCC
GND
74HCT273
10
+5VALW
2 5 6 9 12 15 16 19
C428
1 2
.1UF
U23
8 7 6 5
NM24C16
VCC WC SCL SDA
GND
A0 A1 A2
+5VALW
1 2 3 4
PWR_LED# 34 MDC_DN# 28 BAT_LOW_LED# 34 BAT_CHG_LED# 34 PCMRST# 26
HDD_LED# 34 CD_LED# 34
12
R320 100K
12
R332 100K
3
D0 D14Q1 D27Q2 D38Q3 D413Q4 D514Q5 D617Q6 D718Q7
CLK
1
CLR
12
Compal Electronics, inc.
Title
Size Doc u men t Numbe r R e v
B
Dat e : Sheet
SCH E MATIC, M/B LA-1521 401229
期一 十一月
33 43¬P , 04, 2002
1B
of
Page 34
5
4
3
2
1
Q42
+3VS
31
E
47K
B
2
10K
C
12
R369
200_0603
21
D12
HP HSMG-C170 GRN 0805
31
E
47K
B
2
10K
C
Q35
DTA114YKA
12
R334
200_0603
21
D13
HP HSMG-C170 GRN 0805
RTC Batt.
Place near ICH3-M
BATT1
-
RTCBATT
+RTCVCC
12
+
W=30mils
C475 .1UF
+RTC_BATT
12
1
3
C474
1 2
.1UF
D29 BAS40-04/HSM126S
2
W=30mils
+CHGRTC
Int. Keyboard Connector
JP9
KSI[0..7] KSO[0..15]
KSI1
24
KSI7
23
KSI6
22
KSO9
21
KSI4
20
KSI5
19
KSO0
18
KSI2
17
KSI3
16
KSO5
15
KSO1
14
KSI0
13
KSO2
12
KSO4
11
KSO7
10
KSO8
9
KSO6
8
KSO3
7
KSO12
6
KSO13
5
KSO14
4
KSO11
3
KSO10
2
KSO15
1
1
KSI[0..7] 32 KSO[0..15] 32
45 36 27 18 45 36 27 18 45 36 27 18 45 36 27 18 45 36 27 18 45 36 27 18
34 43¬P , 04, 2002
of
CP10 8P4C-100P
CP9 8P4C-100P
CP8 8P4C-100P
CP7 8P4C-100P
CP6 8P4C-100P
CP5 8P4C-100P
1B
Switch Board Connector
+5VALW
BAT_CHG_LED#33 BAT_LOW_LED#33
PWR_LED#33
TP_DATA32
TP_CLK32
+AVDD_AC97
NBA_PLUG31
VOL_AMP31,32
INTSPK_R231
INTSPK_R131
INTSPK_L231
INTSPK_L131
MIC MIC_C
MIC30
1 2
L36 FBM-11-160808-700T
+5VS
BAT_CHG_LED# BAT_LOW_LED# PWR_LED#
TP_DATA TP_CLK
NBA_PLUG MIC_C VOL_AMP
INTSPK_R2 INTSPK_R1 INTSPK_L2 INTSPK_L1
12
C413 220PF
2
**
SW/B 26PINS
JP5
26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
KEY/B 24Pin
Compal Electronics, inc.
Title
Size Doc u men t Numbe r R e v
B
Dat e : Sheet
SCH E MATIC, M/B LA-1521 401229
期一 十一月
LED Interface
+5VALW
12
R39
D D
Q31
DTC115EK
PACIN
PACIN32,37,38,40
C C
2
21
13
100K
100K
200_0603
D8
HP HSMG-C170 GRN 0805
HDD_LED#33
CD_LED#33
HDD_LED#
2
CD_FDD_LED#
+5VS
47K
B
10K
C
31
E
12
R285
21
D9
Q25 DTA114YKA
200_0603
HP HSMG-C170 GRN 0805
+5VS
31
E
47K
B
2
10K
C
Q28 DTA114YKA
12
R295
200_0603
21
D10
HP HSMG-C170 GRN 0805
CAPS_LED#32 NUM_LED#32
CAPS_LED# NUM_LED#
PADS_LED#32
2
Q41
DTA114YKA
PADS_LED#
DTA114YKA
+3VS +3VS
31
E
47K
B
10K
C
12
R368
200_0603
21
D11
HP HSMG-C170 GRN 0805
System Connector
FAN Connector
+12VS
B B
12
C566
.1UF
EN_DFAN32
A A
EN_DFAN
1 2
R435 13K_1%_0603
5
+5VS
VCC
1 3
VEE
2 5
R434
7.32K_1%_0603
1 2
C554 . 1UF
U41
4
LMV321_SOT23-5
1 2
FAN_SPEED32
12
21
D35
Q45 2SA1036K
R362
3.6K
1N4148
+3VS
12
4
12
R433
10K
C569 .1UF
+5VS
1
C
Q46
2
B
FMMT619
E
3
D34 1N4148
2 1
+5VFAN
2 1
12
C556
D33
@10UF_16V_1206
1SS355
JP16
1 2 3
53398-0310-FAN 3Pin
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF
3
Page 35
A
B
C
D
E
Power Good Circuit
+3V
1 1
VGATE43
12
R349 10K
U25C
10
74LVC125
9 8
+3V
12 11
U25D
13
74LVC125
1 2
R341 20K
1UF_0805_X7R
C443
1 2
R343 0
1 2
+3V
+3V +3V
147
12
R344 10K
U37D 74LVC14
89
ICH_VGATE 20
147
U37E 74LVC14
1011
PM_PWROK 20
Screw Hole
H1
H6
1
S276D118
H2
1
C236D165
H8
1
S276D118
H3
1
C236D165
H15
H7
1
S276D118
H4
1
C236D165
H10
1
S276D118
H5
1
C236D165
H19
H13
S276D118
H12
H21
1
1
S276D118
ST1
SMD276X276
ST2
1
1
S276D173
H16
1
S315D118
H14
ST3
1
S276D173
H17
1
S315D118
ST4
S276D173
H18
S315D118
H9
ST5
1
1
S276D173
1
+3V
2 2
1 2
R342 100K
C440 100PF
1 2
+3VS
R353
10K
1 2
Q37
2
3904
3 1
CK408_PWRGD# 13,32
1
C148D118
1
C148D118
**
H26
1
H_R306X69D248X32
1
C276D110
1
C276D110
C144D114
H23
1
O355X79D315X39A
1
H24
O355X79D315X39A
1
1
O176X144D146X114
H25
1
O355X79D315X39A
EMI CLIP PAD
SW for P o w e r Button
3 3
D14
D16
DAN202U
2
DTC124EK
22K
+3VALW
12
R41
100K
ON/OFF
1 2
C
B
22K
51ON#
13
E
12
Q6
ON/OF F 22,32 51ON# 37
D15
12
C42
1000PF
RLZ20A
2 1
WHEN R=0,Vbe=1.35V WHEN R=33K,Vbe=0.8V
B
PSOT24C
3
2
SW2
3 4
Power Button
EC_ON32
4 4
SMT1-05
1 2
EC_ON
ON/OFFBTN#
+3VALW
12
R42
4.7K
1 2
R58 33K
13
D
2N7002
S
Q9
A
3
2
G
LID Switch
LID_SW#32
+3VALW
PAD1
+3VALW
12
R28 100K
SW1
3
LID_SW#
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF
4
HORNG CHIH
1
D7
2
3
1
2
DAN217
C
PAD-2.5X3
Fiducial Mark
CF11 SMD40M80
1
CF17 SMD40M80
1
FD1 FIDUCAL
1
1
PAD2
PAD-2.5X3
CF1 SMD40M80
1
CF6 SMD40M80
1
FD5 FIDUCAL
1
1
CF8 SMD40M80
1
CF15 SMD40M80
1
FD2 FIDUCAL
1
PAD-2.5X3
CF10 SMD40M80
1
CF3 SMD40M80
1
FD4 FIDUCAL
1
PAD3
1
CF7 SMD40M80
1
CF19 SMD40M80
1
FD3 FIDUCAL
1
D
PAD-2.5X3
FD6 FIDUCAL
1
PAD4
1
CF14 SMD40M80
1
CF4 SMD40M80
1
CF2 SMD40M80
1
CF9 SMD40M80
1
CF5 SMD40M80
1
CF18 SMD40M80
1
CF20 SMD40M80
1
CF13 SMD40M80
1
CF12 SMD40M80
1
CF16 SMD40M80
1
Compal Electronics, inc.
Title
SCH E MATIC, M/B LA-1521
Size Doc u men t Numbe r R e v
B
401229
Dat e : Sheet
期一 十一月
E
1B
of
35 43¬P , 04, 2002
Page 36
A
1 1
B
+1.8VALW To +1.8VS Transfer
+1.8VALW
12
8 7 6 5
C113
4.7UF_10V_0805
U3
D D D D
SI4800
+5VS_GATE
S
S
S
G
SUSP
1 2 3 4
2
G
+1.8VS
C
D
E
+2.5V To +2.5VS Transfer
U15
8
D
7
D
C73 1UF_10V_0603
12
C102
4.7UF_10V_0805
12
12
R45 1K
13
D
Q8 2N7002
S
12
C101
4.7UF_10V_0805
12
C285
4.7UF_10V_0805
6 5
D D
SI4800
+5VS_GATE SUSP
+2.5VS+2.5V
1
S
2
S
3
S
4
G
2
G
12
C319 1UF_10V_0603
12
R239 1K
13
D
Q18 2N7002
S
12
C341
4.7UF_10V_0805
12
C330
4.7UF_10V_0805
+3VALW To +3V Transfer
U29
D D D D
SI4800
S S S
G
ON_GATE
1 2 3 4
8 7 6 5
12
C422
4.7UF_10V_0805
2 2
+3V
12
C442
4.7UF_10V_0805
12
C454 1UF_25V_0805
+3VALW+3VALW
12
C421
4.7UF_10V_0805
+5VALW To +5V Transfer +5VALW To +5VS Transfer
+5VALW +5VALW
12
C317
4.7UF_10V_0805
+12VALW
3 3
U16
8
D
7
D
6
D
5
D
SI4800
1 2
R323 100K
1
S
2
S
3
S
4
G
** **
12
C284
4.7UF_10V_0805
R329 1M
12
.01UF
ON_GATE
C315
12
+5V +5VS
12
C292 1UF_25V_0805
Q14
13
D
SYSON#
2
G
S
2N7002
4.7UF_10V_0805
C322
12
+12VALW
R293 100K
+12VALW To +12V Transfer +12VALW To +12VS Transfer
+12VALW+12VALW +12VALW +12VALW
12
12
1000PF
C432
R333 100K
G
2
12
13
D
2
G
S
R328 47K
Q33 2N7002
A
1 3
12
C427 .1UF_25V_0805
1 2
4 4
SYSON SUSP#
12
C429
S
D
1UF_25V_0805
Q32
NDS352P
+12V +12VS
12
C438 .1UF_25V_0805
** **
C425 1UF_25V_0805
Q38 2N7002
12
R348 100K
G
2
12
13
D
2
G
S
R345 51K
B
1 3
12
S
Q34
NDS352P
D
C441
1UF_25V_0805
12
C437 1UF_25V_0805
+12V & +12VS Discharge
+12V +12VS
SYSON# SUSP
2
G
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPE
+3VALW To +3VS Transfer
U21
U19
12
13
D
S
C
D D D D
SI4800
+5VS_GATE
D D D D
SI4800
12
R294 1K
Q26 2N7002
R298
1
S
2
S
3
S
4
G
1
S
2
S
3
S
4
G
12
1M
8 7 6 5
8 7 6 5
1UF_10V_0603
+5VS_GATE
12
C342
.01UF
2
G
****
C339
12
C361
4.7UF_10V_0805
12
R361
1K
13
D
Q40 2N7002
S
+3V & +3VS Discharge
+3VS
12
12
C353 10UF_16V_1206
12
C362 10UF_16V_1206
12
C419 10UF_16V_1206
12
C426 10UF_16V_1206
R346 470
13
SYSON# SUSP
D
2
G
Q36 2N7002
S
+3VS+3V
12
R308 1K
13
D
2
G
Q27 2N7002
S
+5V & +5VS Discharge
SUSPSYSON#
R309
4.7K
SUSP
Q29 2N7002_SOT23
36 43,
+5VS+5V
12
R305 1K
13
D
2
G
Q30 2N7002
S
of
12
12
C415
C356
.1UF
4.7UF_25V_1206
Q24
13
D
2N7002
SUSP
2
G
S
SYSON32,41
D
12
4.7UF_25V_1206
+3VALW
2
G
C355
12
13
D
S
R356 10K
SYSON#
Q39 2N7002_SOT23
12
C354
4.7UF_25V_1206
SUSP#30,32,41,42
Compal Electronics, inc.
Title
SCHEM A TIC , M/ B LA -1521
Size Docu ment Number Re v
Custom
401229
星期一 十一
Date: Sheet
04, 2002
R228 470
13
D
2
G
Q15 2N7002
S
+3VALW
12
13
SUSP#
D
2
G
S
E
Page 37
A
B
C
D
Vin Detector
High 18.764 17.901 17.063 Low 17.745 16.903 16.038
PR1 1M_0603_1%
1 2
84
3
+
2
-
PU1A
1
LM393M_S08
RLZ4.3B_LL34
1
2
7A_24V_LF-R429007_1206
PF1
**
PD1
EC10QS04
2 1
PC1
1000P_0603_50V8J
1 1
PJP1
SUYIN_2DC-S315-B01
1
3
3
2
PL1
CHC4532U800_1812
1 2
PC2
100P_0603_50V8J
PC3
1000P_0603_50V8J
VIN
PC4
100P_0603_50V8J
PC5
1000P_0603_50V8J
PR3
84.5K_0603_1%
12
PR6
20K_0603_1%
VIN
12
12
PR5 22K_0603_5%
1 2
12
PC6
.1U_0603_50V4Z
PZD1
VS
12
12
PR2
10K_0603_5%
1 2
12
PR7 10K_0603_5%
PR4 1K_0603_1%
ACIN 21
PACIN 32,34,38,40
VIN
21
2 2
PD3
BATT+
CHGRTCP
51ON#35
3 3
+CHGRTC
+12VALWP
4 4
+5VALWP
+3VALWP
1 2
PR19 200_0603_5%
2 1
JOPEN/+12V
PJP9
1 2
PAD-OPEN 4x4m
PJP10
1 2
PAD-OPEN 4x4m
RTCVREF
PJP6
RB751V_DSM
2 1
PZD2
RLZ3.6B_LL-34
100K_0603_5%
1 2
PR13 22K_0603_5%
3.3V
PC13 10U_1206_10V4Z
+12VALW
+5VALW
+3VALW
A
12
12
PR12
PU2
S-81233SGUP-T1_SOT-89-3
3
3
1
1
(120mA,20mils ,Via NO.= 1)
(5A,200mils ,Via NO.= 10)
(5A,200mils ,Via NO.= 10)
12
PC7
.22U_1206_25V7K
2
2
PD2
1N4148 (SM)
PQ1
TP0610T_SOT23
2
PR18 200_0805_5%
PC12
1U_0805_25V4Z
13
PR9
33_1206_5%
12
PC8
.1U_0805_25V7K
PZD3 RLZ16B_LL-34
2 1
VS
+1.5VSP
+1.8VALWP
B
8 Cells LI-ION BAT Charger OVP : 18.059V
VIN
PR10 36K_0603_5%
ACOFF#38
2N7002_SOT23
PJP2
2 1
3MMA/CPU_IO
PJP4
2 1
3MMA/CPU_IO
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY O
+1.5VS
+1.8VALW
13
PQ2
2
100K_0603_5%
(1.5A,60mils ,Via NO.= 3)
(3A,120mils ,Via NO.= 6)
309K_0603_1%
PR17
PR14
1U_1206_25V7K
PU1B
7
LM393M_S08
PC9
+1.25VSP
+1.2VPP
C
12
PR8 10K_0603_5%
5
+
6
-
PC11
1000P_0603_50V8J
+2.5VP
RTCVREF
+3.3V
PR15 100K_0603_1%
PJP3
1 2
PAD-OPEN 3x3m
PJP5
1 2
PAD-OPEN 3x3m
PJP7
2 1
PAD-OPEN 2x2m
BATT+
PR11
1M_0603_0.5%
2.5VREF
PR16
PC10
1U_0805_16V7K
+2.5V
+1.25VS
+1.2VP
162K_0603_1%
(6A,240mils ,Via NO.= 12)
(3A,120mils ,Via NO.= 6)
(300mA,40mils ,Via NO.= 2)
Compal Electronics, inc.
Title
Size Doc u men t Numbe r R e v
B
Dat e : Sheet
期一 十一月
SCH E MATIC, M/B LA-1521
401229
D
1B
of
37 43¬P , 04, 2002
Page 38
A
1 1
B
C
D
PQ3
SI4835DY-T1_SO8
ACOFF#
8 7
5
PD4
1SS355
1 2
PR27 10K_0603_5%
1 2
IREF32
VIN
12
PR21 10K_0603_5%
ACOFF#37
2 2
PACIN32,34,37,40
IREF=1.31*Icharge
3 3
IREF=0~3.3V
P2 P3
PQ4
SI4835DY-T1_SO8
1
1
2
2
3 6
36
2
G
12
PR22 200K_0603_5$
12
PR25 150K_0603_5%
13
D
PQ8 2N7002_SOT23
S
.1U_0603_16V7K
1 2
PC18
PR33 162K_0603_1%
4
8 7
5
4
12
12
PR29
12.7K_0603_1%
12
100K_0603_1%
1.73V
12
PR28 24K_0603_1%
PC21
.1U_0603_16V7K
12
PR37
12
Iadp=0~3.5A
1 2
PC19 4700P_0603_50V7K
1 2
PC22 2200P_0603_50V7K
PC25 .1U_0603_16V7K
PR20
0.02_2512_1%
12
12
PR26 10K_0603_5%
PR30
1 2
10K_0603_5%
PR31
1 2
10K_0603_5%
PR35 10K_0603_5%
12
PU3 MB3878_SSOP24
1
-INC2
2
OUTC2
3
+INE2
4
-INE2
5
FB2
6
VREF
7
FB1
8
-INE1
9
+INE1
10
OUTC1
11
OUTD
12
-INC1
B+
FBM-L11-453215-900LMAT_1812
1 2
24
+INC2
23
GND
22
CS
21
VCC(o)
20
OUT
19
VH
18
VCC
17
RT
16
-INE3
15
FB3
14
CTL
13
+INC1
PL2
PC20 .1U_0603_50V4Z
1 2
1 2
PR32 68K_0603_5%
1 2
PR36 47K_0603_5%
12
PC14
4.7U_1210_25V6K
PC16
0.022U_0603_25V7K
1 2
1 2
PC17 .1U_0805_25V7K
PC23
.1U_0805_25V7K
1 2
1 2
PC24 1500P_0603_50V7K
12
PC15
4.7U_1210_25V6K
FSTCHG 32
PD5 1SS355
1 2
12
PR38 100K_0603_5%
578
LXCHRG
12
PD6
RB051L-40_SOD106
CHG_B+
ACOFF#
36
241
PQ6 SI4835DY-T1_SO8
PL3
22U_SPC-1205P-220A_22A_20%
1 2
1 2
PR34
0.02_2512_1%
PQ5 SI4835DY-T1_SO8
1 2 3 6
4
1 2
PR23 10K_0603_5%
13
100K
2
100K
PQ7 DTC115EK_SOT23
CC=0~2.52A CV=1 4.4V( 8 CELLS )
8 7
5
1 2
PR24 47K_0603_5%
12
PC26
4.7UF_ 1 210_25V6K
VIN
ACOFF 32
BATT+
12
PC27
4.7UF_ 1 210_25V6K
+5VALWP
PR41
47K_0603_5%
PQ10
13
DTC115EK_SOT23
4 4
A
100K
100K
2
LI/MH# 39
PC28 .1U_0603_16V7K
PQ9
2N7002_SOT23
S
G
100K
100K
B
2
13
PR39
47.5K_0603_1%
D
13
PR43
100K_0603_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY O
PR42
VL
PQ11
DTC115EK_SOT23
2
200K_0603_0.5%
C
12
12
PR40 115K_0603_1%
Title
Size Doc u men t Numbe r R e v
B
Dat e : Sheet
SCH E MATIC, M/B LA-1521 401229
期一 十一月
D
of
38 43¬P , 04, 2002
Compal Electronics, inc.
1B
Page 39
A
B
C
D
@12A_65V_UL/CSA FAST
1 1
BATT+
PC30
4.7U_1210_25V7K
PC31
4.7U_1210_25V7K
PF3
**
7A_24V_LF-R429007_1206
PF2
PR44
1K_0603_5%
FBM-L11-453215-900LMAT_1812
PL4
1 2
VMB
PC29 1000PF_50V
LI/MH#
B/I
SMD SMC
TS
PJP11
1 2 3 4 5 6 7
SUYIN_25063A-07G1
12
+3VALWP
2 2
PC32 100P_0603_50V8J
2
PR46
25.5K_0603_1%
1
@BAS40-04_SOT23
3
PD8
PR50
1K_0603_5%
PR47
100_0603_5%
BATT_TEMPA 32ALI/MH#32
PD9
@BAS40-04_SOT23
1
3
EC_SMD1
2
PR48 100_0603_5%
EC_SMC1
1
3
2
EC_SMC1 32,33 EC_SMD1 32,33
PD10
@BAS40-04_SOT23
+5VALWP
PR45 47K_0603_5%
PR49
LI/MH#
+3VALWP
PD7
@BAS40-04_SOT23
3
1
2
LI/MH#38
1K_0603_5%
3 3
4 4
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY O
A
B
C
Size Doc u men t Numbe r R e v
B
Dat e : Sheet
期一 十一月
SCH E MATIC, M/B LA-1521
401229
D
1B
of
39 43¬P , 04, 2002
Compal Electronics, inc.
Page 40
A
B
C
D
1 2
PR153
**
B+
1 1
SYS_B+
2 2
+3VALWP
12
PC46
150U_D_6.3VM
3 3
12
FBM-L11-453215-900LMAT_1812
PL5
12
12
PC36
PC37
4.7U_1210_25V6K
4.7U_1 210_25V6K
12
12
PL6
10U_SPC-1205P-100_4.5A_20%
12
PR54
PD14
2 1
1M_0603_1%
1 2
PR59
3.57K_0603_1%
+
PC47
150U_D_6.3VM
PR55
0.012_2512_1%
12
+
EP10QY03
+3.3V Ipeak = 6.66A ~ 10A
SI4814DY
1
D1
2
D1
3
G2
4
S2
PC44 47P_0603_50V8J
1 2
PR61
1 2
10K_0603_1%
8
G1
7
S1/D2
6
S1/D2
5
S1/D2
PQ12
12
PC48 100P_0603_50V8J
PC35
.1U_0805_25V7K
1 2
PR52 0_0603_5%
PDH31
1 2
PLX3
PDL3
CSH3
PACIN32,34,37,38
BST31
1 2
PR58 10K_0603_5%
VS
12
PR63 47K_0603_5%
12
PC54 .047U_0603_25V7K
PDH3
12
PC42
.1U_0805_25V7K
25 27 26
24
1 2
3 10 23
7 28
12
PC50 680P_0603_50V8J
12
.047U_0603_16V7K
VS
PD13
1SS355
BST3 DH3 LX3
DL3
CSH3 CSL3 FB3 SKIP# SHDN#
TIME/ON5 RUN/ON3
PR65
12
47K_0603_1%
PC55
2
VL
1
1 2
22
V+
MAX1632CAI-T_SSOP28
PU4
12
21
12OUT
VL
VDD
BST5
DH5
LX5 DL5
PGND
CSH5
CSL5
FB5
SEQ
REF
SYNC
RST#
GND
8
VL
MAINPWON 42
3
PC41
DAP202U PD12
4.7U_1206_25VFZ
4 5 18 16 17 19 20 14 13 12 15 9 6 11
+12VALWP
PC43
4.7U_1206_25VFZ
BST51
12
2.5VREF
12
PC49
4.7U_1206_25VFZ
+5VALWP
12
PR62 10K_0603_5%
PC38
.1U_0805_25V7K
1 2
PDH5
PLX5
10.5K_0603_1%
PR60
12
PC39
4.7U_1210_25V6K
1 2
PR53 0_0603_5%
PDL5
12
12
PR64 10K_0603_1%
SYS_B+
12
PC40
4.7U_1 210_25V6K
PDH51
12
PC53
100P_0603_50V8J
PC34
22_1206_5%
470P_0805_100V7K
PQ13
1
G1
D1
2
D1
S1/D2
3
G2
S1/D2
4
S1/D2
S2
SI4814DY
FLYBACKSNB
12
8 7 6 5
PR51
1 2
+5V Ipeak = 6.66A ~ 10A
@3.3K_0603_5%
PC33
4.7U_1210_25V
1 2
12
PD11 EC11FS2
1 4
3 2
PT1
10U_SDT-1205P-100-118_5A_20%
12
PC45 47P_0603_50V8J
CSH5
12
PR56 2M_0603_5%
12
+
PC51
150U_D_6.3VM
12
12
+
PC52
2 1
150U_D_6.3VM
PR57
0.012_2512_1%
+5VALWP
PD15 EP10QY03
4 4
Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY O
A
B
C
Size Doc u men t Numbe r R e v
B
Dat e : Sheet
期一 十一月
401229
SCH E MATIC, M/B LA-1521
of
D
40 43¬P , 04, 2002
1B
Page 41
A
+5VALWP
12
PR67 0_1206_5%
PC59
12
4.7UF_ 1 206_16V
PQ16 2SA1036K
2.5VIN
PC60 2200PF
PD16 RB751V
1 2
1 2
PR71
12
31
2
1K
PQ15
HMBT2222A
2
12
13
PR70 10K
1 1
2 2
S
4 5
3
PU6A LM393M
1
D
G
PQ14 SI3445DV
VS
84
+
-
12
PD17 RB051L-40
PC62
0.1UF_50V
LX2.5
6 2
1
3 2
12
PC65 1000PF
PQ17
DTC115EUA
PL7
SPC-4R7M
13
100K
100K
12
PR69 100
1 2
2
13
100K
B
+2.5V +-5%
12
PR72 200K
1 2
PR75 100K
PQ19
DTC115EUA
100K
2
2.5VREF
SYSON
+2.5VP
12
+
VL
SYSON 32,36
C
+2.5VP
D
12
PR66 0_1206
PR68 10
12
12
PC56
0.1UF_0805_25V
PC58
220UF_D_4V_FP
+2.5VP
PR74
1 2
100K
1.25VIN
12
PC61
4.7UF_1206_16V
13
100K
SUSP#
SUSP#30,32,36,42
2
PQ18
DTC115EUA
100K
1
VCC1
2
PVDD1
PU5
3
VL1
CM8500
4
PGND1
5
AGND1
6
SD
7
VIN/2
12
8
AGSEN
PC68 1000PF
Layout : "Compensation network close to FB pin"
VCC2
PVDD2
VL2
PGND2
AGND2
VFB
VCCQ
AGND
16
15
14
13
12
11
10
9
1 2
PC57
0.1UF_0805_25V
12
PC63
4.7UF_1206_16V
+2.5VP
12
PC67
0.1UF_0805_25V
LX1.25
1 2
PC66 1000PF
PL8
5UH_SPC_06704
PR73 100K
PR76 1K
+1.25VSP
12
12
+
PC64
220UF_D_4V_FP
12
12
3 3
4 4
Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY O
A
B
C
Size Doc u men t Numbe r R e v
Dat e : Sheet
SCH E MATIC, M/B LA-1521
401229
期一 十一月
D
1B
of
41
43¬P , 04, 2002
Page 42
A
B
C
D
+1.8VALWP
12
PR151 0_1206_5%
PQ23
SI3442DV_TSOP6
D
6
1 1
PC74
4.7U_1206_25VFZ
2 2
+SDREF
PC82
4.7U_1206_25VFZ
+3VALWP
3 3
4.7U_1206_25VFZ
4 4
12
12
PC85
2200P_0603_50V7K
2SA1036K-HQ_SOT23
PR152 0_1206_5%
PQ29
2 1
G
LM358AMX_SO8
12
PD22
RB751V_DSM
PC88
S
45
3
PU9A
LM358AMX_SO8
1
PC81
68P_0603_50V8J
PU9B
7
1 2
1 2
PR103
12
1K_0603_5%
31
2
7
PU10B LM393M_S08
A
+5VALWP
84
3
+
2
-
1 2
5
+
6
-
PQ28
HMBT2222A_SOT23
13
2
5
+
6
-
PC76
.1U_0603_50V4Z
+2.5VP
1 2
1 2
1 2
PR95
100K_0.5%
PR96
100K_0.5%
PQ27 SI3445DV_TSOP6
S
12
PR92 5.1K_0603_5%
4 5
3
12
PR102 10K_0603_5%
1
PU10A LM393M_S08
.01U_0603_50V7K
PR82
5.1K_0603_5%
D
G
84
+
-
1 2
0.01UF
PC78
PC83
6 2
1
+5VALWP
3 2
PC89
PR83
0_0603_5%
PC77
220P_0603_50V8J
PR88
13
DTC115EK
300K_0.5%
1 2
100K
100K
0.1UF
5U_SPC-06704-5R0_2.9A_30%
LX18
1 2
12
PD23 RB051L-40_SOD106
PR107
12
511K_0603_1%
PR87
200K_1%
PQ24
PL10
2
+ PC73
47U_6.3V_M
2.5VREF
12
+5VALWP
1 2 13
100K
100K
1 2
PR106
200K_0603_1%
+1.5VS +-5%
+1.5VSP
2.5VREF
100K
PR89
PQ25
DTC115EK
2
12
PR100 100_0603_5%
B
SUSP# 30,32,36,41
SUSP#
12
PR94 0
+1.8VALW +-5%
+1.8VALWP
12
+
PC84 150U_D2_6.3VM
2.5VREF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY O
PH1 near main Battery CONN :
BAT. thermal protection at 65 degree C Recovery at 40(41) degree C
PC79
.22U_0805_16V7K
VL
PH1
10K_TSM1A103(F4D3R)_0603_1%
PR86 10K_0603_1%
PR91
4.32K_0603_1%
PC80
1000P_0603_50V8J
**
12
TM_REF2
VS
PC75 .1U_0603_50V4Z
84
3
+
2
-
PR90 100K_0603_1%
PR93
100K_0603_1%
PR84 47K_0603_1%
1
PU8A LM393M_S08
PH2 under CPU botten side :
CPU thermal protection at 76 degree C Recovery at 37 degree C
VL
PR97 47K_0603_1%
10K_TSM1A103(F4D3R)_0603_1%
PH2
PR99
PC86
.22U_0805_16V7K
16.9K_0603_1%
TM_REF1
**
PR101
4.22K_0603_1%
PC87
1000P_0603_50V8J
C
5
+
6
-
PR105
100K_0603_1%
7
PU8B LM393M_S08
PR104
100K_0603_1%
VL
PR85
47K_0603_1%
PD20
12
1SS355
VL
MAINPWON 40
13
PQ26
100K
2
100K
VL
PR98
47K_0603_1%
PD21
12
1SS355
VL
DTC115EK_SOT23
Compal Electronics, inc.
Title
Size Doc u men t Numbe r R e v
B
Dat e : Sheet
期一 十一月
SCH E MATIC, M/B LA-1521
401229
D
of
42 43¬P , 04, 2002
1B
Page 43
A
1 1
CPU_VID45,6 CPU_VID35,6
CPU_VID25,6 CPU_VID15,6 CPU_VID05,6
+3VALWP
PR125 150K_0402_1%
PR127
180K_0402_1%
2 2
VGATE35
CPU_ON
PC99
1UF_0805_25V
+2VREF
*
PR138
48.7K_0402_1%
PC104
.1U_0402_16V4Z
PR144 200_0402
1 2
PR146 200_0402
3 3
4 4
1 2
1 2
PR147 200_0402
1 2
PR149 200_0402
PR141 20K_0402_1%
PC105 4700P_0402_25V7K
PC110 4700PF_0402_25V
PM
BM D-S Deeper
A
PC100 1UF_0805_25V
GMUXSEL
1 1 0 0 X
B
PR114 0_0402
PR116 100K_0402 PR118 100K_0402 PR119 100K_0402 PR121 100K_0402 PR122 0_0402
PR124 120K_0402
PC98
47PF_0402_50V
*
100K_0402_1%
*
53.6K_0402_1%
L_30 L_31
L_32
STPCPU#
B
12 12 12 12 12
12
+2VREF
PR132
PR135
L_26
DPRSLPVRBMVCORE' 1 0
0 0
B+
FBM-L18-453215-900LMA 90T_1812
CPUVDD
PU12 MAX1718
21
D4
22
D3
23
D2
24
D1
25
D0
14
VGATE
3
TIME
2
SDN/SKIP
17
VDD
6
CC
20
OVP
11
REF
12
ILIM GND15TON
L_18
PC102 1000PF_50V
PR140 1K_0402_1%
L_25
PU13 MAX1887
1
ILIM
2
TRIG
3
CM+
4
CM-
5
CS-
6
CS+
7
COMP
8
GND
1.30V
0
1.20V
01 0 1
1.0V
C
PL11
PR112 0_0402
1 2
LX
DH
BST
DL V+
VCC
FB POS NEG
ZMODE
SUS
S1
S0
PR136
33K_0402_1%
PC103 470P_0402_50V7K
16
LIMIT
15
V+
14
BST
13
LX
12
DH
11
VDD
10
DL
9
PGND
Offset
4.62%0
2.0%
4.62%
C
PC91
4.7UF_1210_25V
27 28 26 16
CPU_B+
1
CPUVCC
9
CPUFB
4
POS
13 5 19 18 8 7 10
L_19
CPUVDD
0%
0%
PR113
20_0805
L_20 L_27
L_28L_29
PC106
0.1UF_50V L_23
2 1
VCORE
1.30V
1.239VPM D-S
1.176V
1.144V
1.0V
PC92
4.7UF_1210_25V
+5VALWP
1 2
PC97
4.7UF_1206_16V
PC101 1000PF_50V
12
PR133 0_0402
PR137
@0_0402
PC112
1UF_0805_25V
<1ST>
21
PD24 1SS355
PR117 2.2_1%
1 2
L_22
PC95
0.1UF_50V
**
**
PR148
2.2_1%
1 2
PD28 1SS355
VR_ON5,32
D
PC93
4.7UF_1210_25V
*
PC94 0.1UF_50V
*
L_LG
PQ30
IR7811A
L_21
VTT1LX
PQ32
SI4362DY
PM_DPRSLPVR
PQ38
IR7811A
L_24
VTT2LX CS+
PQ42
SI4362DY
E
CPU_B+
CPU_B+
PQ31
IR7811A
578
3 6
241
PQ33
SI4362DY
578
3 6
241
PM_DPRSLPVR 20
CPU_B+
578
PQ39
IR7811A
3 6
241
PQ43
SI4362DY
578
3 6
241
578
3 6
578
3 6
578
3 6
578
3 6
F
PC90
0.1UF
1 2
PR109 0_0402_5%
241
PR120 68_0805
12
241
1 2
2 1
PC96 220PF_50V
PR129 100_0402
PL12
SSC-1206-0R5
PD25
EC31QS04
CM+ +CPU_CORE
**
241
PR145 68_0805
12
PC111 220PF_50V
241
SSC-1206-0R5
PD27 EC31QS04
2 1
PL13
1
MAX4322EUK-T_SOT23-5
PR111 1K_0603_1%
PR123
2.8K_0402_1%
PR128
49.9K_0402_1%
PQ36
13
D
2N7002
2
G
S
**
PQ37 2N7002
PR142
0.002_2512_1% 12
PU11
**
+5VALWP
5
+
-
2
12
12
PR130 68K_0402_1%
+5VALWP
PR134 100K_0402
13
D
S
+CPU_CORE
PC107
4.7UF_1210_25V
G
3 4
PR115
0.002_2512_1%
**
2
G
PR139
100K_0402
+CPU_CORE
PR108 499_0603_1%
PR110 1K_0603_1%
PQ35
13
D
2N7002
S
PM_STPCPU#13,20
**
CPU_B+
12 12
2 1
**
2
G
PC108
4.7UF_1210_25V
CM+
+CPU_CORE
+CPU_CORE
PD26 EC31QS04
+5VALWP
**
PR126 100K
PQ34
13
D
2N7002
S
D
**
S
4.7UF_1210_25V
G
**
2
13
PC109
**
PQ41 2N7002
G
H
PR131 100K_0402
PM_GMUXSEL20
13
D
S
2
**
PR143
100K_0402
**
PQ40 2N7002
G
2
PM_DPRSL PVR
For Celeron CPU Nonpop componts
+3VALWP
4.7UF_1206_16V
CPU_ON
VR_ON
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPE
D
12
PC113
PC114 1000PF_50V
PR150
0
E
1.2VDD PU14
4
VIN
2
DELAY ERROR7CNOISE
8
ON/OFF#
SI91822DH-12-T1
VOUT
SENSE
GND
PR126,PR128,PR130,PR131,PR134,PR139, PR143,PQ34,PQ35,PQ36,PQ37,PQ40,PQ41, PR133
5 6 1 3
+1.2VPP
PC116
1000PF_50V
F
+1.2VPP
12
PC115
4.7UF_1206_16V
Title
Size Docu ment Number Re v
B
星期一 十一
Date: Sheet
For Celeron CPU pop componts
PR137
Compal Electronics, inc.
SCHEMATIC, M/B LA-1521 401229
?04, 2002
G
1B
of
43 43, 
H
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