Compal LA-1511, TravelMate 472LC Schematic

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LA-1511 REV1.0 Schematics Document

uFCBGA/uFCPGA Northwood with
Brookdale

5 5

chipset(845MP+ICH3-M)

6 6

BOM !"

7 7

8 8

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

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Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

I

143, 21, 2002

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Compal confidential

File Name : LA-1511

1 1

Mobile Northwood

uFCBGA/uFCPGA CPU

CPU Bypass

2 2

Fan Control

page 6

& CPUVID

page 6

System Bus

400MHz

page 4,5

HD#(0..63)HA#(3..31)

Thermal Sensor

MAX6654MEE W320-04

page 5

Clock Generator

page 14

Memory

Brookdale-M
MCH-M

Docking

CRT Connector

page 15

Conn.

page 34

3 3

VGA

AGP Conn

AGP4X(1.5V)

845MP 625 BGA

page 8,9

BUS(DDR)

2.5V 266MHz

SO-DIMM X2

BANK 0, 1, 2, 3

page 11,12

Board

page 15

LAN interface

HUB Link

1.8V 266MHz

Mini PCI

4 4

Conn.

page 35

USB interface

LAN
Kinnereth

page 20

Bluetooth

page 32

RJ45

page 20

PCI BUS

IDSEL:AD20
(PIRQA#,GNT#2,REQ#2)

5 5

TI TSB43AB22

1394

page 26

CardBus Controller

O2 6912

3.3V 33MHz

page 24

ICH3-M
421 BGA

page 16,17

3.3V 48MHz

3.3V 24.576MHz

3.3V ATA100

3.3V ATA100

USB conn X3

page 32

AC-LINK

MDC

page 32

LPC BUS

3.3V 33MHz

DC/DC Interface
Suspend

6 6

page 36

Power Circuit
DC/DC

page
37,38,39,40,41,42,43

7 7

8 8

A

B

C

Slot 0

page 25

14M_5V

Touch Pad

page 29

EC Ext. I/O

page 31

BIOS

Int.KBD

page 31

page 33

EC
87591L

D

page 30

Card Reader
W83L518D

page 27

MS
CARD

page 27

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

E

SD/MMC
CARD

page 27

SMsC
LPC47N227

F

page 28

LPT Port.

page 29

FDD

page 19

FIR

page 29

G

HDD
Connector

Audio DJ
O2 163

CD-ROM
Connector

page 19

page 21

page 19

H

Title

Size Document Number Rev
Custom

Date: Sheet

AC97
Codec

ALC202

page 22

AMP& Phone
Jack

page 23

Compal Electronics, Inc.

SCHEMATIC, M/B LA-1511
401224

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Power Managment table

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8

7

6

5

4

3

2

1

H H

Signal

+3VALW
+5VALW
+1.8VALW

+3V
+5V
+2.5V

+12VALW

+12VS
+5VS
+3VS
+2.5VS
+1.8VS
+1.5VS

NB Chip Rev SB Chip Rev

+1.2VP

State

G G

+CPU_CORE
+1.25VS
+1.25VS_VGA

S0

S1

S3

F F

S5 S4/AC

S5 S4/AC don't exist

ON

ON ON ON

ON ON

ON OFF

OFF OFF OFF

ON ON

OFF

OFF

E E

D D

C C

B B

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

10

9

8

7

6

5

4

3

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

2

343, 21, 2002

of

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1 1

+CPU_CORE

2 2

HA#[3..31]<8>

3 3

4 4

HREQ#[0..4]<8>

HADS#<8>

5 5

+CPU_CORE

R148 not plant
for DT CPU.

HBR0#<8>
HBPRI#<8>

HBNR#<8>

HLOCK#<8>

CLK_HCLK<14>
CLK_HCLK#<14>

HA#[3..31]

HREQ#[0..4]

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

R148 M@10K_0402

1 2
1 2

R96 200_0402

CLK_HCLK
CLK_HCLK#

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

M6
M3

M4
M1

W1

W2

AB1

G1

AC1
AA3

AC3

G2
G4

AF22
AF23

K2
K4
L6
K1
L3

L2

N1
N2

N4
N5
T1
R2
P3
P4
R3
T2
U1
P6
U3
T4
V2
R6

T5
U4
V3

Y1

J1

K5

J4
J3

H3

V5

H6
D2

6 6

HIT#<8>

HITM#<8>

HDEFER#<8>

F3
E3
E2

U41A

A#3
A#4
A#5
A#6
A#7
A#8
A#9
A#10
A#11
A#12
A#13
A#14
A#15
A#16
A#17
A#18
A#19
A#20
A#21
A#22
A#23
A#24
A#25
A#26
A#27
A#28
A#29
A#30
A#31
A#32
A#33
A#34
A#35

REQ#0
REQ#1
REQ#2
REQ#3
REQ#4
ADS#

AP#0
AP#1
BINIT#
IERR#

BR0#
BPRI#
BNR#
LOCK#

BCLK0
BCLK1

HIT#
HITM#
DEFER#

A10

A12

A14

A16

A18

A20A8AA10

AA12

AA14

AA16

AA18

AA8

AB11

AB13

AB15

AB17

AB19

AB7

AB9

AC10

AC12

AC14

AC16

AC18

AC8

AD11

AD13

AD15

AD17

AD19

AD7

AD9

AE10

AE12

AE14

AE16

AE18

AE20

AE6

AE8

AF11

AF13

AF15

AF17

AF19

AF2

AF21

AF5

AF7

AF9

B11

B13

B15

B17

B19B7B9

C10

C12

C14

C16

C18

C20C8D11

D13

D15

D17

D19D7D9

E10

VCC_0

VCC_1

VCC_2

VCC_3

VCC_4

VCC_5

VCC_6

VCC_7

VCC_8

VCC_9

VCC_10

VCC_11

VCC_12

VCC_13

VCC_14

VCC_15

VCC_16

VCC_17

VCC_18

VCC_19

VCC_20

VCC_21

VCC_22

VCC_23

VCC_24

VCC_25

VCC_26

VCC_27

VCC_28

VCC_29

VCC_30

VCC_31

VCC_32

VCC_33

VCC_34

VCC_35

VCC_36

VCC_37

VCC_38

VCC_39

VCC_40

VCC_41

VCC_42

VCC_43

VCC_44

VCC_45

VCC_46

VCC_47

VCC_48

VCC_49

VCC_50

VCC_51

VCC_52

VCC_53

VCC_54

VCC_55

VCC_56

VCC_57

VCC_58

VCC_59

VCC_61

VCC_62

VCC_63

VCC_64

VCC_65

VCC_66

VCC_67

VCC_68

Mobile

NorthWood

VCC_69

VCC_70

VCC_71

VCC_72

D#10
D#11
D#12
D#13
D#14
D#15
D#16
D#17
D#18
D#19
D#20
D#21
D#22
D#23
D#24
D#25
D#26
D#27
D#28
D#29
D#30
D#31
D#32
D#33
D#34
D#35
D#36
D#37
D#38
D#39
D#40
D#41
D#42
D#43
D#44
D#45
D#46
D#47
D#48
D#49
D#50
D#51
D#52
D#53
D#54
D#55
D#56
D#57
D#58
D#59
D#60
D#61
D#62
D#63

VCC_73

D#0
D#1
D#2
D#3
D#4
D#5
D#6
D#7
D#8
D#9

B21
B22
A23
A25
C21
D22
B24
C23
C24
B25
G22
H21
C26
D23
J21
D25
H22
E24
G23
F23
F24
E25
F26
D26
L21
G26
H24
M21
L22
J24
K23
H25
M23
N22
P21
M24
N23
M26
N26
N25
R21
P24
R25
R24
T26
T25
T22
T23
U26
U24
U23
V25
U21
V22
V24
W26
Y26
W25
Y23
Y24
Y21
AA25
AA22
AA24

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

HD#[0..63]

HD#[0..63] <8>

VSS_0

VSS_1

H1H4H23

VCC_85

VCC_79

VSS_2

VSS_3

VSS_4

VSS_5

VSS_6

VSS_7

VSS_8

VSS_9

VSS_10

VSS_11

VSS_12

VSS_13

VSS_14

VSS_15

VSS_16

VSS_17

VSS_18

VSS_19

VSS_20

VSS_21

VSS_22

VSS_23

VSS_24

VSS_25

VSS_26

VSS_27

VSS_28

VSS_29

VSS_30

VSS_31

VSS_32

VSS_33

VSS_34

VSS_35

VSS_36

VSS_37

VSS_38

VSS_39

VSS_40

VSS_41

VSS_42

VSS_43

VSS_44

VSS_45

VSS_46

VSS_47

VSS_48

VSS_49

VSS_50

VSS_51

VSS_52

VSS_53

VSS_54

VSS_55

VSS_56

H26

A11

A13

A15

A17

A19

A21

A24

A26A3A9

AA1

AA11

AA13

AA15

AA17

AA19

AA23

AA26

AA4

AA7

AA9

AB10

AB12

AB14

AB16

AB18

AB20

AB21

AB24

AB3

AB6

AB8

AC11

AC13

AC15

AC17

AC19

AC2

AC22

AC25

AC5

AC7

AC9

AD1

AD10

AD12

AD14

AD16

AD18

AD21

AD23

AD4

AD8

F13

VCC_80

F15

F17

F19

F9

VCC_78

E18

E20E8F11

VCC_76

VCC_77

E16

VCC_75

E12

E14

VCC_74

NorthWood

VCC_81

VCC_82

VCC_83

VCC_84

7 7

+CPU_CORE

8 8

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

B

C

D

E

F

G

H

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

I

443, 21, 2002

of

J

0B

A

+CPU_CORE

R116
R119

1 1

R120
R100
R26
R99
R101
R146
R115

R28 300_0402

2 2

R30

R114

3 3

Place resistor <100mils from
CPU pin

+CPU_CORE

4 4

+1.2VP

200_0402

12

200_0402

12

200_0402

12

200_0402

12

200_0402

12

200_0402

12

200_0402

12

200_0402

12

56_0402

12
12

H_DPSLP#<16>

+CPU_CORE

51.1_1%

12

200_0402

12

PM_CPUPERF#

Murata LQG21F4R7N00

H_A20M#
H_SMI#
H_IGNNE#
H_STPCLK#
H_DPSLPR#
H_NMI
H_INIT#
H_INTR
H_F_FERR#
H_PWRGD

H_RESET#

L50

1 2

L19

1 2

DT : REMOVE

L51

1 2

L12

1 2

If used ITP port must depop

RP6 8P4R_1.5K

1 8
2 7

5 5

6 6

3 6
4 5

+CPU_CORE

R147 51.1_1%
R87

R88
R89 51.1_1%

R158 51.1_1%
R159 51.1_1%

THERMDA_591<30>
THERMDC_591<30>

ITP_TDI
ITP_TMS
ITP_TRST#
ITP_TCK

12
12

51.1_1%

51.1_1%

12
12

12
12

ITP_PREQ#
ITP_PRDY#

ITP_BPM0
ITP_BPM1

ITP_BPM2
ITP_BPM3

7 7

12

R191 @0_0402

R193 @0_0402

+5VALW

C155
2200PF

12

R197 1K_0402

12

8 8

Address:1001_110X

A

B

DT : REMOVE

M@0_0402

R20

R19

DT@56_0402

DT : INSTALL

DT@4.7UH_80mA
DT@4.7UH_80mA

M@4.7UH_80mA
M@4.7UH_80mA

12

C67

+

33UF_D2_16V

CLK_ITPP<14>
CLK_ITPP#<14>

12

H_THERMDA
H_THERMDC

B

H_TRDY#<8>

H_A20M#<16>

H_F_FERR#<16>

H_IGNNE#<16>
H_PWRGD<16>

12

12

+1.2VP

H_STPCLK#<16>

H_RESET#<8>

H_DBSY#<8>

H_DRDY#<8>

H_BSEL0<14>
H_BSEL1<14>

1 2

R124 56_0402

12

+

H_VSSA

Thermal Sensor
MAX6654MEE

W=15mil

1 2

U11

1

NC

2

VCC

3
4
5
6
7
8 9

MAX6654MEE

SMBCLK

DXP
DXN

SMBDATA

NC
ADD1
GND
GND NC

ALERT

C

H_RS#0<8>
H_RS#1<8>
H_RS#2<8>

H_SMI#<16>

H_INTR<16>

H_NMI<16>

H_INIT#<16>

TP1

1

C94
33UF_D2_16V

C198
.1UF_0402

16

NC

15

STBY

14
13

NC

12
11
10

ADD0

R199

1K_0402

C

R34 M@0_0402

DT : REMOVE

H_A20M#
H_F_FERR#
H_IGNNE#
H_SMI#
H_PWRGD
H_STPCLK#
H_DPSLPR#
H_INTR
H_NMI
H_INIT#
H_RESET#

H_THERMDA
H_THERMDC

H_THERMTRIP#

ITP_BPM0
ITP_BPM1
ITP_BPM2
ITP_BPM3
ITP_PRDY#
ITP_PREQ#

ITP_TCK
ITP_TDI

ITP_TMS
ITP_TRST#

H_VCCA
H_VCCIOPLL

1 2

1 2

R56

51.1_1%

+5VALW

R190

10K_0402

1 2

R195

10K_0402

1 2

1 2

+5VALW

12

F1

G5

F4

AB2

J6

C6
B6
B2
B5

AB23

Y4

AD25

D1
E5

W5

AB25

H5

H2
AD6
AD5

B3

C4

A2

AC6
AB5
AC4

Y6
AA5
AB4

D4
C1
D5

F7

E6

AD20

A5

AE23

AF25

AF3

AC26
AD26

L24

P1

R142

51.1_1%

+CPU_CORE

R_A

R_B

D

AE11

AE13

AE15

AE17

VSS_57

F8

VSS_58

VSS_59

VSS_129

VSS_130

G21

G24G3G6J2J22

AE19

VSS_60

VSS_131

VSS_61

VSS_132

U41B

RS#0
RS#1
RS#2
RSP#
TRDY#

A20M#
FERR#
IGNNE#
SMI#
PWRGOOD
STPCLK#
DPSLP#
LINT0
LINT1
INIT#
RESET#

DBSY#
DRDY#
BSEL0
BSEL1

THERMDA
THERMDC

THERMTRIP#

BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5

TCK
TDI
TDO
TMS
TRST#

VCCA
VCCSENSE
VCCIOPLL

NC7
NC8

ITP_CLK0
ITP_CLK1

COMP0
COMP1

GTL Reference Voltage

Layout note :

1. Place R_A and R_B near CPU.

2. Place decoupling cap 220PF near CPU.(Within

12

500mils)

R57

49.9_1%

Trace width>=7mila

12

R58
100_1%

EC_SMC2 <21,30,39>
EC_SMD2 <21,30,39>

12

R172

@0_0402

D

H_SKTOCC#

AE22

AE24

AE26

VSS_62

VSS_63

VSS_133

VSS_134

AE7

VSS_64

VSS_135

J25J5K21

C443
1UF

AE9

VSS_65

VSS_136

AF1

VSS_66

VSS_137

AF10

AF12

AF14

AF16

VSS_67

VSS_68

VSS_69

VSS_70

VSS_138

VSS_139

VSS_140

VSS_141

K24K3K6L1L23

C442
220PF

E

AF18

AF20

AF26

AF6

AF8

B10

B12

B14

B16

B18

B20

B23

B26B4B8

VSS_71

VSS_72

VSS_73

VSS_75

VSS_76

VSS_77

VSS_78

VSS_79

VSS_80

VSS_81

VSS_82

VSS_83

VSS_84

SKTOCC#

VSS_85

F

C11

C13

C15

C17

C19C2C22

C25C5C7C9D10

VSS_86

VSS_87

VSS_88

VSS_89

VSS_90

VSS_91

VSS_92

VSS_93

D12

D14

D16

D18

D20

VSS_94

VSS_95

VSS_96

VSS_97

VSS_98

VSS_99

VSS_100

VSS_101

VSS_102

D21

D24D3D6D8E1

VSS_103

VSS_104

VSS_105

VSS_106

G

VSS_107

VSS_108

E11

VSS_109

E13

VSS_110

E15

VSS_111

E17

VSS_112

E19

VSS_113

E23

E26E4E7E9F10

VSS_114

VSS_115

VSS_116

VSS_117

VSS_118

VSS_119

F12

VSS_120

F14

VSS_121

F16

VSS_122

F18F2F22

VSS_123

VSS_124

Mobile

NorthWood

VSS_142

VSS_143

VSS_144

VSS_145

VSS_146

VSS_147

VSS_148

VSS_149

VSS_150

VSS_151

VSS_152

VSS_153

VSS_154

VSS_155

VSS_156

VSS_157

VSS_158

VSS_159

VSS_160

VSS_161

VSS_162

VSS_163

VSS_164

VSS_165

VSS_166

VSS_167

VSS_168

VSS_169

VSS_170

VSS_171

VSS_172

VSS_173

VSS_174

VSS_175

VSS_176

VSS_177

VSS_178

VSS_179

VSS_180

VSS_181

L26L4M2

M22

M25M5N21

N24N3N6P2P22

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

E

P25P5R1

+H_GTLREF1

R23

R26R4T21

T24T3T6U2U22

PCIRST#<8,15,16,19,24,26,28,35>

MAINPWON<37,40,41>

F

U25U5V1

V23

V26V4W21

Q15

W24W3W6Y2Y22

2

G

1 3

D

@2N7002

Y25

Y5

R645

@301_1%_0402

S

G

1 2

Q82

3 1

@3904

2

VID0

AE5

VID1

AE4

VID2

AE3

VID3

AE2

+5VS

VID4

AE1

1 2

Q13

3 1

R153

@3904

NC5

NC6

AE21

AF24

CPU_VR_VID4 <7>
CPU_VR_VID3 <7>
CPU_VR_VID2 <7>
CPU_VR_VID1 <7>
CPU_VR_VID0 <7>

@470_0402

2

1 2

H

F25

F5

VSS_125

VSS_126

VSS_127

VSS_128

GTLREF0
GTLREF1
GTLREF2
GTLREF3

ITPCLKOUT0
ITPCLKOUT1

TESTHI10

DSTBN#0
DSTBN#1
DSTBN#2
DSTBN#3

DSTBP#0
DSTBP#1
DSTBP#2
DSTBP#3

ADSTB#0
ADSTB#1

PROCHOT#

MCERR#

VSSSENSE

VCCVID

AF4

PROCHOT#<30>

R144

@470_0402

H

I

R125 DT@56_0402

1 2

1 2

R123 M@0_0402

PM_CPUPERF#H_GHI#

+CPU_CORE

PM_CPUPERF# <16>

DT : REMOVE

J26

DP#0

K25

DP#1

K26

DP#2
DP#3

NC1
NC2

TESTHI0
TESTHI1
TESTHI2
TESTHI3
TESTHI4
TESTHI5

TESTHI8
TESTHI9

GHI#

DBI#0
DBI#1
DBI#2
DBI#3

DBR#

SLP#

VSSA

NC3
NC4

NorthWood

H_THERMTRIP#CPU_THRM# PROCHOT#

Title

+H_GTLREF1

L25

AA21
AA6
F20
F6
A22
A7

AD24
AA2
AC21
AC20
AC24
AC23
AA20
AB22
U6
W4
Y3
A6

E22
K22
R22
W22

F21
J23
P23
W23

L5
R5

E21
G25
P26
V21

AE25

C3
V6
AB26

AD22
A4

AD2
AD3

+1.2VP

TESTTHI0_1
TESTTHI2_7

ITPCLKOUT0
ITPCLKOUT1
TESTTHI8_10

H_GHI#

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3

H_DBR#

H_PROCHOT#
H_SLP#

H_VSSA

C145
.1UF_0402

R171
1K_0402

PROCHOT#

Q14
3904

R210 @0_0402

1

+3VALW

All of these pin
connected inside

R25 56_0402

1 2

R27 56_0402

1 2

R49 56_0402

1 2

R50 56_0402

1 2

R102 56_0402

1 2

H_DSTBN#[0..3]

H_DSTBP#[0..3]

H_DBI#[0..3]

1 2

1 2

R145 56_0402

R29 200_0402

TP2

1 2

1 2

2

3 1

Q12

3 1

R176
470_0402

2

3904

H_DSTBN#[0..3] <8>

H_DSTBP#[0..3] <8>

H_ADSTB#0 <8>
H_ADSTB#1 <8>

H_DBI#[0..3] <8>

ITP_DBR# <33>

H_SLP# <16>

12

1 2

Compal Electronics, Inc.

+CPU_CORE

+CPU_CORE

+CPU_CORE

R143

470_0402

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

I

543, 21, 2002

J

H_PROCHOT#

0B

of

J

A

B

C

D

E

F

G

H

I

J

Layout note :

Place close to CPU, Use 2~3 vias per PAD.
Place .22uF caps underneath balls on solder side.
Place 10uF caps on the peripheral near balls.

1 1

Use 2~3 vias per PAD.

Layout note :

Place close to CPU power and
ground pin as possible
(<1inch)

For Desktop's CPU:

Please place these cap in the socket cavity area

+CPU_CORE

12

2 2

3 3

4 4

C95

10UF_6.3V_1206_X5R

+CPU_CORE

12

C107

10UF_6.3V_1206_X5R

Please place these cap on the socket north side

+CPU_CORE

12

C80

10UF_6.3V_1206_X5R

+CPU_CORE

12

C128

10UF_6.3V_1206_X5R

+CPU_CORE

12

C429

10UF_6.3V_1206_X5R

12

C122
10UF_6.3V_1206_X5R

12

C106
10UF_6.3V_1206_X5R

12

C92
10UF_6.3V_1206_X5R

12

C61
10UF_6.3V_1206_X5R

12

C430
10UF_6.3V_1206_X5R

12

C89
10UF_6.3V_1206_X5R

12

C465
10UF_6.3V_1206_X5R

12

C104
10UF_6.3V_1206_X5R

12

C59
10UF_6.3V_1206_X5R

12

C423
10UF_6.3V_1206_X5R

12

C113
10UF_6.3V_1206_X5R

12

C461
10UF_6.3V_1206_X5R

12

C428
10UF_6.3V_1206_X5R

12

C57
10UF_6.3V_1206_X5R

12

C53
10UF_6.3V_1206_X5R

12

C98
10UF_6.3V_1206_X5R

12

C445
10UF_6.3V_1206_X5R

12

C118
10UF_6.3V_1206_X5R

12

C56
10UF_6.3V_1206_X5R

5 5

Please place these cap on the socket south side

+CPU_CORE

12

C123

10UF_6.3V_1206_X5R

12

C115
10UF_6.3V_1206_X5R

12

C159
10UF_6.3V_1206_X5R

12

C116
10UF_6.3V_1206_X5R

6 6

+CPU_CORE

12

C447

10UF_6.3V_1206_X5R

+CPU_CORE

7 7

12

C176

10UF_6.3V_1206_X5R

12

C83
10UF_6.3V_1206_X5R

12

C426
10UF_6.3V_1206_X5R

12

C495
10UF_6.3V_1206_X5R

12

C427
10UF_6.3V_1206_X5R

12

C174
10UF_6.3V_1206_X5R

12

C55
10UF_6.3V_1206_X5R

12

C448
10UF_6.3V_1206_X5R

12

C175
10UF_6.3V_1206_X5R

EN_FAN2<30>

ESR total=0.75m ohm
C total=6350uF

For Mobile's C PU:

ESR total=1.875m ohm
C total=2590uF

EN_FAN1<30>

12

R296
13K_1%

C190

.1UF_0402

+12VS

3

+

2

-

12

R295
13K_1%

84

U27A

R293

7.32K_1%

LM358

5
6

1

+12VS

84

+

-

12

U27B

7

LM358

R294

7.32K_1%

+CPU_CORE

+CPU_CORE

+CPU_CORE

+CPU_CORE

12

R434

3.48K_1%

2

12

C462

+

DT@470UF_D4_2.5V_10m

12

C485

+

470UF_D4_2.5V_10m

12

C149

+

330UF_D2_2.5V_15m

12

+12VS

1 2
21

31

C456
.22UF_X7R

3.48K_1%

+12VS

R292

2

D40
1N4148

Q51
2SA1036K

12

1 2
21

31

+

+

+

C455
.22UF_X7R

D27
1N4148

Q32
2SA1036K

Q24

FMMT619

2

C225

2.2UF_16V_0805

1 2

12

C449
DT@470UF_D4_2.5V_10m

12

C420
470UF_D4_2.5V_10m

12

C99
330UF_D2_2.5V_15m

12

C480
.22UF_X7R

1 2

D12
1N4148

12

C479
.22UF_X7R

Q23

FMMT619

2

C367

2.2UF_16V_0805
D15
1N4148

3 1

2 1

@33PF_0402

2 1

3 1

D13
1SS355

+5VFAN2

C755

12

C441

+

DT@470UF_D4_2.5V_10m

12

C474

+

DT@470UF_D4_2.5V_10m

12

C50

+

330UF_D2_2.5V_15m

12

C478
.22UF_X7R

D16
1SS355

2 1

+5VFAN1

C751

33PF_0402

2 1

220PF_0402

C754
@1000PF_0402

C756
@.1uF_0402

C757

220PF_0402

C753

+3VS

12

C752
.1uF_0402

+5VS

JP23

53398-0310

12

R220
10K_0402

12

C419

+

DT@470UF_D4_2.5V_10m

12

C434

+

DT@470UF_D4_2.5V_10m

12

C48

+

330UF_D2_2.5V_15m

12

C450
.22UF_X7R

12

C451
.22UF_X7R

C477
.22UF_X7R

12

C492

+

DT@470UF_D4_2.5V_10m

12

C421

+

DT@470UF_D4_2.5V_10m

12

C49

+

330UF_D2_2.5V_15m

12

C476
.22UF_X7R

12

C475
.22UF_X7R

Fan1 Control circuit

+5VS

C750
1000PF_0402

JP22

1
2
3

53398-0310

+3VS

12

R433
10K_0402

FAN_SPEED <30>

Fan2 Control circuit

1
2
3

FAN_SPEED2 <30>

8 8

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

B

C

D

E

F

G

H

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

I

643, 21, 2002

of

J

0B

10

H H

9

8

7

6

5

4

3

2

1

For Mobile CPU

G G

+3VS

12

182736

R173

1K_0402

CPU_VR_VID0<5>
CPU_VR_VID1<5>
CPU_VR_VID2<5>

F F

E E

CPU_VR_VID3<5>
CPU_VR_VID4<5>

CPU_VR_VID0
CPU_VR_VID1
CPU_VR_VID2
CPU_VR_VID3
CPU_VR_VID4

45

RP8
8P4R_1K

RP90 M@8P4R_0

4 5
3 6
2 7
1 8

R178 M@0_0402

1 2

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4

CPU_VID0 <43>
CPU_VID1 <43>
CPU_VID2 <43>
CPU_VID3 <43>
CPU_VID4 <43>

For Desktop CPU

+3VALW

R390

DT : REMOVE

D D

C C

CPU_VR_VID0

CPU_VR_VID1
CPU_VR_VID2
CPU_VR_VID3
CPU_VR_VID4 CPU_VID4

1 2

R399 DT@0_0402

RP89

4 5
3 6
2 7
1 8

DT@8P4R_0

CPU_ECVID0 <31>

CPU_ECVID1 <31>
CPU_ECVID2 <31>
CPU_ECVID3 <31>
CPU_ECVID4 <31>

M@100K_0402

1 2

R389

DT@100K_0402

1 2

NB/DT#_CPU <31,43>

EC_CPUVID0<31>

EC_CPUVID1<31>
EC_CPUVID2<31>
EC_CPUVID3<31>
EC_CPUVID4<31>

@10K_0402

1 2

R403 DT@0_0402

RP87

4 5
3 6
2 7
1 8

DT@8P4R_0

R404

+5VS

12

182736

45

RP86
@8P4R_10K

CPU_VID0

CPU_VID1
CPU_VID2
CPU_VID3

NB/DT_CPU

VID

VCC

1.750V

1.700V

1.650V

1.600V

1.550V

1.500V

1.450V

1.400V

1.350V

1.300V

1.250V

1.200V

1.150V

1.100V

1.050V

1.000V

0.975V

0.950V

0.925V

0.900V

0.875V

0.850V

0.825V

0.800V

0.775V

0.750V

0.725V

0.700V

0.675V

0.650V

0.625V

0.600V

Mobil CPU Destop CPU

10

00000

00 01

0000

000

1

00 0

1
1

00

0
0
0
0
0
0
0
1
1

1
0000

1

00

1

0

1

0

1
1

1

1

1

1

1

1

1
000

0
000

1

00

1
1
1
1
1
1
1
1
1
1
1
1

1
1

0

1

00

1

1

00

1

00

1

0

1
1

1

1

1

1

1

1

00011

0000

1
1

1

0000

1
000

1
1

1

1
0

1
1

1
00

0

1
0

1
1

1

1
000

1
1

1
000

00

1
0

1

1
00

1

1

1

0
0
0
0
1
1
1
1
1
1
1
1

0

11

1

11

0

0

0

0

1

0

1

0
1

0

1

0

1

1

1

1

XXXXX

X

X

X

X

X

X
XXX

XXXXX

XXXXX

XXXXX

1
1

1
00

XXXXX

0

1
0

1

XXXXX

11111

VRM output off 1 1 1 1

0412134023

0
0
0

0

0

11

0

0

0
0

0

0

1

0

0

0

1

0

0

0

1

0

0
1

0

XXXXX

X

X

X

X
XX

X

XXXX

XXXXX
XXXXX

XXXXX

XXXXX
XXXXX

XXXXX

XXXXX
1

B B

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

10

9

8

7

6

5

4

3

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

2

743, 21, 2002

of

1

0B

A

B

C

D

E

F

G

H

I

J

1 1

HA#[3..31]<4>

2 2

3 3

H_ADSTB#0<5>
H_ADSTB#1<5>

H_RESET#<5>

H_TRDY#<5>
HDEFER#<4>

HBPRI#<4>

HLOCK#<4>

H_DBSY#<5>
H_DRDY#<5>

HIT#<4>

H_RS#0<5>
H_RS#1<5>
H_RS#2<5>

HREQ#[0..4]<4>

CLK_GHT<14>

CLK_GHT#<14>

H_DBI#[0..3]<5>

12

C88
.01UF_0402

HITM#<4>
HBR0#<4>
HADS#<4>
HBNR#<4>

4 4

5 5

+CPU_CORE

12

R68

301_1%

6 6

12

R72

150_1%

+CPU_CORE

7 7

12

R63

301_1%

R64

150_1%

12

C90
.01UF_0402

12

8 8

A

HA#[3..31]

PCIRST#<5,15,16,19,24,26,28,35>

HREQ#[0..4]

H_DBI#[0..3]

24.9_0603_1%

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

CLK_GHT
CLK_GHT#

H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3

H_SWNG0
H_SWNG1

12

R48

+1.5VS

R90 8.2K_0402

R45 8.2K_0402

R41 8.2K_0402

B

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

AE17

W5
J27

H26

W3

W2
W7
W6

AD5
AG4
AH9

AD15

AA7

AD13

AC2

AC13

12

R75

24.9_0603_1%

12

12

12

U43A

T4

HA#3

T5

HA#4

T3

HA#5

U3

HA#6

R3

HA#7

P7

HA#8

R2

HA#9

P4

HA#10

R6

HA#11

P5

HA#12

P3

HA#13

N2

HA#14

N7

HA#15

N3

HA#16

K4

HA#17

M4

HA#18

M3

HA#19

L3

HA#20

L5

HA#21

K3

HA#22

J2

HA#23

M5

HA#24

J3

HA#25

L2

HA#26

H4

HA#27

N5

HA#28

G2

HA#29

M6

HA#30

L7

HA#31

R5

HADSTB#0

N6

HADSTB#1

CPURST#

U7

HTRDY#

Y4

DEFER#

Y7

BPRI#
HLOCK#
RSTIN#
TESTIN#

V5

DBSY#

V4

DRDY#

Y5

HIT#

Y3

HITM#

V7

BREQ#0

V3

ADS#
BNR#

RS#0
RS#1
RS#2

U6

HREQ#0

T7

HREQ#1

R7

HREQ#2

U5

HREQ#3

U2

HREQ#4

J8

BCLK

K8

BCLK#

DBI#0
DBI#1
DBI#2
DBI#3

HSWNG0
HSWNG1

HRCOMP0
HRCOMP1

H_DSTBN#[0..3]
H_DSTBP#[0..3]

AGP_ADSTB0

AGP_ADSTB1

AGP_SBSTB

HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42

HOST

HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

HDSTBN#0
HDSTBN#1
HDSTBN#2
HDSTBN#3
HDSTBP#0
HDSTBP#1
HDSTBP#2
HDSTBP#3

HVREF0
HVREF1
HVREF2
HVREF3
HVREF4

BROOKDALE(MCH-M)

H_DSTBN#[0..3] <5>
H_DSTBP#[0..3] <5>

R83 @8.2K_0402

R44 @8.2K_0402

R40 @8.2K_0402

C

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9

AA2
AB5
AA5
AB3
AB4
AC5
AA3
AA6
AE3
AB7
AD7
AC7
AC6
AC3
AC8
AE2
AG5
AG2
AE8
AF6
AH2
AF3
AG3
AE5
AH7
AH3
AF4
AG8
AG7
AG6
AF8
AH5
AC11
AC12
AE9
AC9
AE10
AD9
AG9
AC10
AE12
AF10
AG11
AG10
AH11
AG12
AE13
AF12
AG13
AH13
AC14
AF14
AG14
AE14
AG15
AG16
AG17
AH15
AC17
AF16
AE15
AH17
AD17
AE16

AD4
AE6
AE11
AC15
AD3
AE7
AD11
AC16

M7
R8
Y8
AB11
AB17

AGP_ADSTB0#

12

AGP_ADSTB1#

12

AGP_SBSTB#

12

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

D

HD#[0..63]

+V_MCH_GTLREF

AGP_ST0
0=System memory is DDR
1=System memory is SDR

HD#[0..63] <4>

AGP_AD[0..31] HUB_PD[0..10]

AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31

AGP_C/BE#0
AGP_C/BE#1
AGP_C/BE#2
AGP_C/BE#3

AGP_ST0
AGP_ST1
AGP_ST2

AGP_ADSTB0<15>

AGP_ADSTB0#<15>

AGP_ADSTB1<15>

AGP_ADSTB1#<15>

AGP_SBSTB<15>

AGP_SBSTB#<15>

AGP_FRAME#<15>

AGP_DEVSEL#<15>

AGP_IRDY#<15>

AGP_TRDY#<15>

AGP_STOP#<15>

AGP_PAR<15>
AGP_REQ#<15>
AGP_GNT#<15>

Trace
width>=7mila

C102

1UF

C103

220PF

AGP_ADSTB0
AGP_ADSTB0#
AGP_ADSTB1
AGP_ADSTB1#
AGP_SBSTB
AGP_SBSTB#

AGP_FRAME#
AGP_DEVSEL#
AGP_IRDY#
AGP_TRDY#
AGP_STOP#
AGP_PAR
AGP_REQ#
AGP_GNT#
AGP_PIPE#

+CPU_CORE

12

R66

R_E

49.9_1%

12

R65

R_F

100_1%

AGP_AD[0..31]<15>

AGP_C/BE#[0..3]<15>

AGP_ST[0..2]<15>

GTL Reference Voltage

Layout note :

1. Place R_E and R_F near MCH

2. Place decoupling cap 220PF near MCH pin.(Within
500mils)

AGP_ST0 AGP_ST1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

E

R337 2K_0402

12

F

U43B

R27

G_AD0

R28

G_AD1

T25

G_AD2

R25

G_AD3

T26

G_AD4

T27

G_AD5

U27

G_AD6

U28

G_AD7

V26

G_AD8

V27

G_AD9

T23

G_AD10

U23

G_AD11

T24

G_AD12

U24

G_AD13

U25

G_AD14

V24

G_AD15

Y27

G_AD16

Y26

G_AD17

AA28

G_AD18

AB25

G_AD19

AB27

G_AD20

AA27

G_AD21

AB26

G_AD22

Y23

G_AD23

AB23

G_AD24

AA24

G_AD25

AA25

G_AD26

AB24

G_AD27

AC25

G_AD28

AC24

G_AD29

AC22

G_AD30

AD24

G_AD31

V25

G_C/BE#0

V23

G_C/BE#1

Y25

G_C/BE#2

AA23

G_C/BE#3

AG25

ST0

AF24

ST1

AG26

ST2

R24

AD_STB0

R23

AD_STB#0

AC27

AD_STB1

AC28

AD_STB#1

AF27

SB_STB

AF26

SB_STB#

Y24

G_FRAME#

W28

G_DEVSEL#

W27

G_IRDY#

W24

G_TRDY#

W23

G_STOP#

W25

G_PAR

AG24

G_REQ#

AH25

G_GNT#

AF22

PIPE#

N22

VSS0

K27

VSS1

K5

VSS2

L24

VSS3

M23

VSS4

K7

VSS5

J26

VSS6

A3

VSS7

A7

VSS8

A11

VSS9

A15

VSS10

R336 @1K_0402

12

AGP_FRAME#
AGP_TRDY#
AGP_PAR
AGP_STOP#

AGP_GNT#
AGP_REQ#
AGP_IRDY#
AGP_DEVSEL#

AGP_WBF#
AGP_PIPE#
AGP_RBF#

AGP_ST2

G

HI_0
HI_1
HI_2
HI_3
HI_4
HI_5

HLRCOMP

GRCOMP

12

12

HI_6
HI_7
HI_8
HI_9

HI_10

HI_STB

HI_STB#

HI_REF

SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7

AGPREF

66IN

RBF#

WBF#

VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40

+1.5VS

HUB

AGP

BROOKDALE(MCH-M)

RP4 @8P4R_8.2K_0804

1 8
2 7
3 6
4 5

RP83 @8P4R_8.2K_0804

1 8
2 7
3 6
4 5

RP3 @8P4R_8.2K_0804

1 8
2 7
3 6
4 5

R62 6.2K_0402

6.2K_0402

R39

P25
P24
N27
P23
M26
M25
L28
L27
M27
N28
M24

N25
N24

P27
P26

AH28
AH27
AG28
AG27
AE28
AE27
AE24
AE25

AA21
AD25
P22

AE22
AE23

A19
A23
A27
D5
D9
D13
D17
D21
E1
E4
E26
E29
F8
F12
F16
F20
F24
G26
H9
H11
H13
H15
H17
H19
H21
J1
J4
J6
J22
J29

AGP_ST1
0=533Mhz
1=400Mhz

HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10

HLRCOMP

AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7

CLK_AGP_MCH

AGP_RBF#
AGP_WBF#

H

HUB_PD[0..10] <16>

HUB_PSTRB <16>

R85

AGP_NBREF

HUB_PSTRB# <16>

1 2

AGP_SBA[0..7]

Place this cap near MCH

+AGPREF

12

C84
.1UF_0402

R53

36.5_1%

12

CLK_AGP_MCH <14>

AGP_RBF# <15>
AGP_WBF# <15>

+1.5VS

12

R22
1K_1%

12

R23
1K_1%

36.5_1%

+1.8VS

AGP_SBA[0..7] <15>

Place this cap near AGP

12

C47
.1UF_0402

+VS_HUBREF

12

C120
.01UF_0402

Place closely
ball P26

Place closely pin P22

CLK_AGP_MCH

R94
@33_0402

1 2

C121
@10PF_0402

HUB Interface Reference

Layout note :

+1.8VS

1. Place R_C and R_D in middle of Bus.

2. Place capacitors near MCH.

12

R78

301_1%

R_C

12

R69

R_D

Compal Electronics, Inc.

Title

301_1%

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

I

12

C108
@470PF

12

R84
@56.2_1%

12

R71
0_0402

12

C100
.01UF_0402

+VS_HUBREF

843, 21, 2002

of

J

0B

A

B

C

D

E

F

G

H

I

J

U43D

M8

+CPU_CORE

1 1

2 2

+2.5V

3 3

4 4

5 5

6 6

7 7

VTT_0

U8

VTT_1

AA9

VTT_2

AB8

VTT_3

AB18

VTT_4

AB20

VTT_5

AC19

VTT_6

AD18

VTT_7

AD20

VTT_8

AE19

VTT_9

AE21

VTT_10

AF18

VTT_11

AF20

VTT_12

AG19

VTT_13

AG21

VTT_14

AG23

VTT_15

AJ19

VTT_16

AJ21

VTT_17

AJ23

VTT_18

A5

VCCSM1

A9

VCCSM2

A13

VCCSM3

A17

VCCSM4

A21

VCCSM5

A25

VCCSM6

C1

VCCSM7

C29

VCCSM8

D7

VCCSM9

D11

VCCSM10

D15

VCCSM11

D19

VCCSM12

D23

VCCSM13

D25

VCCSM14

F6

VCCSM15

F10

VCCSM16

F14

VCCSM17

F18

VCCSM18

F22

VCCSM19

G1

VCCSM20

G4

VCCSM21

G29

VCCSM22

H8

VCCSM23

H10

VCCSM24

H12

VCCSM25

H14

VCCSM26

H16

VCCSM27

H18

VCCSM28

H20

VCCSM29

H22

VCCSM30

H24

VCCSM31

K22

VCCSM32

K24

VCCSM33

K26

VCCSM34

L23

VCCSM35

K6

VCCSM36

J5

VCCSM37

J7

VCCSM38

L1

VSS41

L4

VSS42

L6

VSS43

L8

VSS44

L22

VSS45

L26

VSS46

N1

VSS47

N4

VSS48

N8

VSS49

N13

VSS50

N15

VSS51

N17

VSS52

N29

VSS53

P6

VSS54

P8

VSS55

P14

VSS56

P16

VSS57

R1

VSS58

R4

VSS59

R13

VSS60

R15

VSS61

R17

VSS62

R26

VSS63

T6

VSS64

T8

VSS65

T14

VSS66

T16

VSS67

T22

VSS68

U1

VSS69

U4

VSS70

U15

VSS71

U29

VSS72

V6

VSS73

V8

VSS74

V22

VSS75

W1

VSS76

W4

VSS77

W8

VSS78

W26

VSS79

Y6

VSS80

Y22

VSS81

AA1

VSS82

BROOKDALE(MCH-M)

VCC1_5_0
VCC1_5_1
VCC1_5_2
VCC1_5_3
VCC1_5_4
VCC1_5_5
VCC1_5_6
VCC1_5_7
VCC1_5_8

VCC1_5_9
VCC1_5_10
VCC1_5_11
VCC1_5_12
VCC1_5_13
VCC1_5_14
VCC1_5_15

VCC1_5_16
VCC1_5_17
VCC1_5_18
VCC1_5_19
VCC1_5_20
VCC1_5_21
VCC1_5_22
VCC1_5_23
VCC1_5_24
VCC1_5_25

VCC1_8_0

VCC1_8_1

VCC1_8_2

VCC1_8_3

VCC1_8_4

VCCGA1
VCCHA1

VSSGA2

POWER/GND

VSSHA2

VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141

R22
R29
U22
U26
W22
W29
AA22
AA26
AB21
AC29
AD21
AD23
AE26
AF23
AG29
AJ25

N14
N16
P13
P15
P17
R14
R16
T15
U14
U16

L29
N26
L25
M22
N23

T17
T13

U17
U13

AA4
AA8
AA29
AB6
AB9
AB10
AB12
AB13
AB14
AB15
AB16
AB19
AB22
AC1
AC4
AC18
AC20
AC21
AC23
AC26
AD6
AD8
AD10
AD12
AD14
AD16
AD19
AD22
AE1
AE4
AE18
AE20
AE29
AF5
AF7
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF25
AG1
AG18
AG20
AG22
AH19
AH21
AH23
AJ3
AJ5
AJ7
AJ9
AJ11
AJ13
AJ15
AJ17
AJ27

VCC_MCH_PLL1
VCC_MCH_PLL0

VSS_MCH_PLL1
VSS_MCH_PLL0

+1.5VS

Layout note :
Trace width 5mil ; Spacing

10mil
Trace A to ball U13/T13 or
U17/T7 =1.5" Max

+1.5VS

+1.8VS

12

"Trace A"

12

+

"Trace A"

"Trace A"

L22

4.7UH_30mA

"Trace A"

C169
33UF_D2_16V

Murata LQG21N4R7K10

12

L21

4.7UH_30mA

12

C168

+

33UF_D2_16V

DDR_SDQ[0..63]<11>

DDR_CB[0..7]<11>

SDREF

DDR_SDQ[0..63]

DDR_CB[0..7]

12

0_0402

R108

.1UF_0402_X5R

Layout note
Please closely
pin J21 and J9

DDR_SDQ0
DDR_SDQ1
DDR_SDQ2
DDR_SDQ3
DDR_SDQ4
DDR_SDQ5
DDR_SDQ6
DDR_SDQ7
DDR_SDQ8
DDR_SDQ9
DDR_SDQ10
DDR_SDQ11
DDR_SDQ12
DDR_SDQ13
DDR_SDQ14
DDR_SDQ15
DDR_SDQ16
DDR_SDQ17
DDR_SDQ18
DDR_SDQ19
DDR_SDQ20
DDR_SDQ21
DDR_SDQ22
DDR_SDQ23
DDR_SDQ24
DDR_SDQ25
DDR_SDQ26
DDR_SDQ27
DDR_SDQ28
DDR_SDQ29
DDR_SDQ30
DDR_SDQ31
DDR_SDQ32
DDR_SDQ33
DDR_SDQ34
DDR_SDQ35
DDR_SDQ36
DDR_SDQ37
DDR_SDQ38
DDR_SDQ39
DDR_SDQ40
DDR_SDQ41
DDR_SDQ42
DDR_SDQ43
DDR_SDQ44
DDR_SDQ45
DDR_SDQ46
DDR_SDQ47
DDR_SDQ48
DDR_SDQ49
DDR_SDQ50
DDR_SDQ51
DDR_SDQ52
DDR_SDQ53
DDR_SDQ54
DDR_SDQ55
DDR_SDQ56
DDR_SDQ57
DDR_SDQ58
DDR_SDQ59
DDR_SDQ60
DDR_SDQ61
DDR_SDQ62
DDR_SDQ63

DDR_CB0
DDR_CB1
DDR_CB2
DDR_CB3
DDR_CB4
DDR_CB5
DDR_CB6
DDR_CB7

SDREF_M

12

C141

U43C

G28

SDQ0

F27

SDQ1

C28

SDQ2

E28

SDQ3

H25

SDQ4

G27

SDQ5

F25

SDQ6

B28

SDQ7

E27

SDQ8

C27

SDQ9

B25

SDQ10

C25

SDQ11

B27

SDQ12

D27

SDQ13

D26

SDQ14

E25

SDQ15

D24

SDQ16

E23

SDQ17

C22

SDQ18

E21

SDQ19

C24

SDQ20

B23

SDQ21

D22

SDQ22

B21

SDQ23

C21

SDQ24

D20

SDQ25

C19

SDQ26

D18

SDQ27

C20

SDQ28

E19

SDQ29

C18

SDQ30

E17

SDQ31

E13

SDQ32

C12

SDQ33

B11

SDQ34

C10

SDQ35

B13

SDQ36

C13

SDQ37

C11

SDQ38

D10

SDQ39

E10

SDQ40

C9

SDQ41

D8

SDQ42

E8

SDQ43

E11

SDQ44

B9

SDQ45

B7

SDQ46

C7

SDQ47

C6

SDQ48

D6

SDQ49

D4

SDQ50

B3

SDQ51

E6

SDQ52

B5

SDQ53

C4

SDQ54

E5

SDQ55

C3

SDQ56

D3

SDQ57

F4

SDQ58

F3

SDQ59

B2

SDQ60

C2

SDQ61

E2

SDQ62

G5

SDQ63

C16

SDQ64/CB0

D16

SDQ65/CB1

B15

SDQ66/CB2

C14

SDQ67/CB3

B17

SDQ68/CB4

C17

SDQ69/CB5

C15

SDQ70/CB6

D14

SDQ71/CB7

J21

SDREF0

J9 AD26

SDREF1 NC0

12

C134
.1UF_0402_X5R

MEMORY

BROOKDALE(MCH-M)

SCK0

SCK#0

SCK1

SCK#1

SCK2

SCK#2

SCK3

SCK#3

SCK4

SCK#4

SCK5

SCK#5

SCK6

SCK#6

SCK7

SCK#7

SCK8

SCK#8
SCS#0

SCS#1
SCS#2
SCS#3
SCS#4
SCS#5

SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7
SDQS8

SMA0/CS#11
SMA1/CS#10

SMA2/CS#6
SMA3/CS#9
SMA4/CS#5
SMA5/CS#8
SMA6/CS#7
SMA7/CS#4
SMA8/CS#3
SMA9/CS#0

SMA10
SMA11/CS#2
SMA12/CS#1

SBS0
SBS1

SCKE0

SCKE1

SCKE2

SCKE3

SCKE4

SCKE5

SMRCOMP

RCVENIN#

RCVENOUT#

SSI_ST

SRAS#

SWE#

SCAS#

NC1

E14
F15
J24
G25
G6
G7

G15
G14
E24
G24
H5
F5

K25
J25
G17
G16
H7
H6

E9
F7
F9
E7
G9
G10

F26
C26
C23
B19
D12
C8
C5
E3
E15

E12
F17
E16
G18
G19
E18
F19
G21
G20
F21
F13
E20
G22

G12
G13

G23
E22
H23
F23
J23
K23

J28
G3
H3

H27
F11

G11
G8

AD27

DDR_SCS#0
DDR_SCS#1
DDR_SCS#2
DDR_SCS#3

DDR_SDQS0
DDR_SDQS1
DDR_SDQS2
DDR_SDQS3
DDR_SDQS4
DDR_SDQS5
DDR_SDQS6
DDR_SDQS7
DDR_SDQS8

DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6

DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12

DDR_SBS0
DDR_SBS1

DDR_CKE0
DDR_CKE1
DDR_CKE2
DDR_CKE3

SM_RCOMP

RCVIN#
RCVOUT#

DDR_SRAS#
DDR_SWE#
DDR_SCAS#

DDR_CLK0 <11>
DDR_CLK0# <11>
DDR_CLK1 <11>
DDR_CLK1# <11>
DDR_CLK2 <11>
DDR_CLK2# <11>

DDR_CLK3 <12>
DDR_CLK3# <12>
DDR_CLK4 <12>
DDR_CLK4# <12>
DDR_CLK5 <12>
DDR_CLK5# <12>

DDR_SCS#0 <11>
DDR_SCS#1 <11>
DDR_SCS#2 <12>
DDR_SCS#3 <12>

DDR_SDQS0 <11>
DDR_SDQS1 <11>
DDR_SDQS2 <11>
DDR_SDQS3 <11>
DDR_SDQS4 <11>
DDR_SDQS5 <11>
DDR_SDQS6 <11>
DDR_SDQS7 <11>
DDR_SDQS8 <11>

DDR_SMA[0..12]

DDR_SBS0 <11>
DDR_SBS1 <11>

DDR_CKE0 <11>
DDR_CKE1 <11>
DDR_CKE2 <12>
DDR_CKE3 <12>

R113 27.4_1%

12

0_0402

R112

R_J

DDR_SRAS# <11>
DDR_SWE# <11>
DDR_SCAS# <11>

Layout note
Place R_J closely Ball
H3<40mil,Ball H3 to G3
trace must
routing 1"

DDR_SMA[0..12] <11>

12

C142 .1UF_0402_X5R
C143 @47PF_0402

+1.25VS

Layout note
Place R113
closely ball
J28

8 8

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

B

C

D

E

F

G

H

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

I

943, 21, 2002

of

J

0B

10

9

8

7

6

5

4

3

2

1

Layout note :

Processor system bus

Distribute as close as possible

H H

G G

F F

to MCH Processor Quadrant.(between VTTFSB and VSS pin)

+CPU_CORE

12

C63
.1UF_0402_X5R

+CPU_CORE

12

C109
.1UF_0402_X5R

+CPU_CORE

12

C52

10UF_6.3V_1206_X5R

12

C62
.1UF_0402_X5R

12

C82
.1UF_0402_X5R

12

C54

10UF_6.3V_1206_X5R

12

C66
.1UF_0402_X5R

12

C70
.1UF_0402_X5R

12

10UF_6.3V_1206_X5R

C425

12

C78
.1UF_0402_X5R

12

C69
.1UF_0402_X5R

12

C125
.1UF_0402_X5R

12

C81
.1UF_0402_X5R

Layout note :

Distribute as close as possible
to MCH Processor Quadrant.(between VCCSM and VSS pin)

+2.5V

12

C136
.1UF_0402_X5R

+2.5V

12

C146
.1UF_0402_X5R

+2.5V

12

C163
.1UF_0402_X5R

+2.5V

DDR Memory interface

12

C137
.1UF_0402_X5R

12

C160
.1UF_0402_X5R

12

C157
.1UF_0402_X5R

12

C139
.1UF_0402_X5R

12

C164
.1UF_0402_X5R

12

C158
.1UF_0402_X5R

12

C140
.1UF_0402_X5R

12

C165
.1UF_0402_X5R

12

C152
.1UF_0402_X5R

12

C135
.1UF_0402_X5R

12

C162
.1UF_0402_X5R

12

C144
.1UF_0402_X5R

12

C150

22UF_10V_1206

12

C166

22UF_10V_1206

12

C167

+

Layout note :

E E

Distribute as close as possible
to MCH Processor Quadrant.(between VCCAGP/VCCCORE

AGP/CORE

220UF_D2_4V

and VSS pin)

+1.5VS

12

C114
.1UF_0402_X5R

12

C96
.1UF_0402_X5R

12

C105
.1UF_0402_X5R

12

C85
.1UF_0402_X5R

12

C97
.1UF_0402_X5R

12

C119
.1UF_0402_X5R

D D

+1.5VS

12

C126

10UF_6.3V_1206_X5R

12

C86

10UF_6.3V_1206_X5R

12

C75

+

100UF_D_16V

C C

Layout note :

Hub-Link

Distribute as close as possible
to MCH Processor Quadrant.(between VCCHL and VSS pin)

+1.8VS

12

B B

C130

10UF_6.3V_1206_X5R

A A

10

12

C127
.1UF_0402_X5R

12

C132
.1UF_0402_X5R

9

12

C133
.1UF_0402_X5R

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

8

7

6

5

4

3

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

2

10 43, 21, 2002

of

1

0B

A

Layout note
Place these resistor

DDR_SDQ0
DDR_SDQ4

closely DIMM0,

1 1

all trace length<750mil

2 2

3 3

4 4

5 5

DDR_SDQ[0..63]<9>

6 6

7 7

DDR_CB[0..7]<9>

DDR_SDQS[0..8]<9>

DDR_SDQ1
DDR_SDQ5

DDR_SDQ6
DDR_SDQS0

DDR_SDQ2
DDR_SDQ3

DDR_SDQ8
DDR_SDQ7

DDR_SDQ9
DDR_SDQ12

DDR_SDQS1
DDR_SDQ13

DDR_SDQ10
DDR_SDQ14

DDR_SDQ15
DDR_SDQ11

DDR_SDQ16
DDR_SDQ20

DDR_SDQ21
DDR_SDQ17

DDR_SDQ18
DDR_SDQS2

DDR_SDQ19
DDR_SDQ22

DDR_SDQ24
DDR_SDQ23

DDR_SDQ25
DDR_SDQ28

DDR_SDQS3
DDR_SDQ29

DDR_SDQ56
DDR_SDQ51

DDR_SDQ60
DDR_SDQ57

DDR_SDQS7
DDR_SDQ61

DDR_SDQ62
DDR_SDQ58

DDR_SDQ63 DDR_DQ63
DDR_SDQ59 DDR_DQ59

B

RP109 4P2R_22

1 4
2 3

RP130 4P2R_22

1 4
2 3

RP131 4P2R_22

1 4
2 3

RP110 4P2R_22

1 4
2 3

RP132 4P2R_22

1 4
2 3

RP92 4P2R_22

1 4
2 3

RP111 4P2R_22

1 4
2 3

RP93 4P2R_22

1 4
2 3

RP112 4P2R_22

1 4
2 3

RP94 4P2R_22

1 4
2 3

RP113 4P2R_22

1 4
2 3

RP95 4P2R_22

1 4
2 3

RP120 4P2R_22

1 4
2 3

RP96 4P2R_22

1 4
2 3

RP114 4P2R_22

1 4
2 3

RP97 4P2R_22

1 4
2 3

DDR_SDQ[0..63]
DDR_CB[0..7]
DDR_SDQS[0..8]

RP127 4P2R_22

1 4
2 3

RP106 4P2R_22

1 4
2 3

RP128 4P2R_22

1 4
2 3

RP108 4P2R_22

1 4
2 3

RP129 4P2R_22

1 4
2 3

DDR_DQ0
DDR_DQ4

DDR_DQ1
DDR_DQ5

DDR_DQ6
DDR_DQS0

DDR_DQ2
DDR_DQ3

DDR_DQ8
DDR_DQ7

DDR_DQ9
DDR_DQ12

DDR_DQS1
DDR_DQ13

DDR_DQ10
DDR_DQ14

DDR_DQ15
DDR_DQ11

DDR_DQ16
DDR_DQ20

DDR_DQ21
DDR_DQ17

DDR_DQ18
DDR_DQS2

DDR_DQ19
DDR_DQ22

DDR_DQ24
DDR_DQ23

DDR_DQ25
DDR_DQ28

DDR_DQS3
DDR_DQ29

DDR_DQ56
DDR_DQ51

DDR_DQ60
DDR_DQ57

DDR_DQS7
DDR_DQ61

DDR_DQ62
DDR_DQ58

C

DDR_SDQ30
DDR_SDQ26

DDR_SDQ31
DDR_SDQ27

DDR_CB5
DDR_CB4

DDR_CB1
DDR_CB0

DDR_CB2
DDR_SDQS8

DDR_CB3
DDR_CB6

DDR_CB7

DDR_SDQ36
DDR_SDQ32

DDR_SDQ33
DDR_SDQ37

DDR_SDQ38
DDR_SDQS4

DDR_SDQ39
DDR_SDQ34

DDR_SDQ44
DDR_SDQ35

DDR_SDQ45
DDR_SDQ40

DDR_SDQS5
DDR_SDQ41

DDR_SDQ43
DDR_SDQ42

DDR_SDQ47
DDR_SDQ46

DDR_SDQ49
DDR_SDQ48

DDR_SDQ53
DDR_SDQ52

DDR_SDQ54
DDR_SDQS6

DDR_SDQ55
DDR_SDQ50

D

RP115 4P2R_22

1 4
2 3

RP98 4P2R_22

1 4
2 3

RP116 4P2R_22

1 4
2 3

RP99 4P2R_22

1 4
2 3

RP121 4P2R_22

1 4
2 3

RP100 4P2R_22

1 4
2 3

RP117 4P2R_22

1 4
2 3

RP122 4P2R_22

1 4
2 3

RP102 4P2R_22

1 4
2 3

RP123 4P2R_22

1 4
2 3

RP103 4P2R_22

1 4
2 3

RP118 4P2R_22

1 4
2 3

RP119 4P2R_22

1 4
2 3

RP101 4P2R_22

1 4
2 3

RP104 4P2R_22

1 4
2 3

RP124 4P2R_22

1 4
2 3

RP125 4P2R_22

1 4
2 3

RP105 4P2R_22

1 4
2 3

RP126 4P2R_22

1 4
2 3

RP107 4P2R_22

1 4
2 3

DDR_DQ30
DDR_DQ26

DDR_DQ31
DDR_DQ27

DDR_F_CB5
DDR_F_CB4

DDR_F_CB1
DDR_F_CB0

DDR_F_CB2
DDR_DQS8

DDR_F_CB3
DDR_F_CB6

DDR_F_CB7

DDR_DQ36
DDR_DQ32

DDR_DQ33
DDR_DQ37

DDR_DQ38
DDR_DQS4

DDR_DQ39
DDR_DQ34

DDR_DQ44
DDR_DQ35

DDR_DQ45
DDR_DQ40

DDR_DQS5
DDR_DQ41

DDR_DQ43
DDR_DQ42

DDR_DQ47
DDR_DQ46

DDR_DQ49
DDR_DQ48

DDR_DQ53
DDR_DQ52

DDR_DQ54
DDR_DQS6

DDR_DQ55
DDR_DQ50

E

DDR_DQ4
DDR_DQ5

DDR_DQS0
DDR_DQ3

DDR_DQ7
DDR_DQ12

DDR_DQ13
DDR_DQS1

DDR_DQ14
DDR_DQ11

DDR_CLK1<9>

DDR_CLK1#<9>

DDR_DQ20
DDR_DQ17

DDR_DQS2
DDR_DQ22

DDR_DQ23
DDR_DQ28

DDR_DQ29
DDR_DQS3

DDR_DQ26
DDR_DQ27

DDR_F_CB4
DDR_F_CB0 DDR_F_CB1

DDR_DQS8
DDR_F_CB6

DDR_F_CB7

DDR_CLK0<9>

DDR_CLK0#<9>

DDR_CKE1<9>

DDR_SCS#0<9>

DIMM_SMDATA<12,14>

DIMM_SMCLK<12,14>

DDR_CKE1 DDR_CKE0
DDR_SMA12

DDR_SMA9
DDR_SMA7

DDR_SMA5
DDR_SMA3
DDR_SMA1

DDR_SMA10
DDR_SBS0
DDR_SWE#
DDR_SCS#0 DDR_SCS#1

DDR_DQ36
DDR_DQ33

DDR_DQS4
DDR_DQ38

DDR_DQ39
DDR_DQ44

DDR_DQ45
DDR_DQS5

DDR_DQ43
DDR_DQ47

DDR_DQ49
DDR_DQ53

DDR_DQS6
DDR_DQ54

DDR_DQ55
DDR_DQ56

DDR_DQ60
DDR_DQS7

DDR_DQ62
DDR_DQ63

F

+2.5V +2.5V

JP25

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0#

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2#

93

VDD

95

CKE1

97

DU/A13

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE#

121

S0#

123

DU

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

+3VS

199

VDD_SPD
VDD_ID

DDR-SODIMM_200_Normal

G

VREF

DU/RESET#

DU/BA2

VSS
DQ4

DQ5
VDD
DM0
DQ6

VSS
DQ7

DQ12

VDD

DQ13

DM1

VSS

DQ14
DQ15

VDD
VDD

VSS

VSS

DQ20
DQ21

VDD
DM2

DQ22

VSS

DQ23
DQ28

VDD

DQ29

DM3

VSS

DQ30
DQ31

VDD

CB4

CB5

VSS
DM8

CB6
VDD

CB7

VSS

VSS
VDD
VDD

CKE0

A11

VSS

VDD

BA1

RAS#
CAS#

S1#

DU

VSS

DQ36
DQ37

VDD
DM4

DQ38

VSS

DQ39
DQ44

VDD

DQ45

DM5

VSS

DQ46
DQ47

VDD

CK1#

CK1

VSS

DQ52
DQ53

VDD
DM6

DQ54

VSS

DQ55
DQ60

VDD

DQ61

DM7

VSS

DQ62
DQ63

VDD

SA0

SA1

SA2

DU

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102

A8

104
106

A6

108

A4

110

A2

112

A0

114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DIMM0

Front side / H=5.2mm

H

DDR_DQ0
DDR_DQ1

DDR_DQ6
DDR_DQ2

DDR_DQ8
DDR_DQ9

DDR_DQ10
DDR_DQ15

DDR_DQ16
DDR_DQ21

DDR_DQ18
DDR_DQ19

DDR_DQ24
DDR_DQ25

DDR_DQ30
DDR_DQ31

DDR_F_CB5

DDR_F_CB2
DDR_F_CB3

DDR_SMA11
DDR_SMA8

DDR_SMA6
DDR_SMA4
DDR_SMA2
DDR_SMA0

DDR_SBS1
DDR_SRAS#
DDR_SCAS#

DDR_DQ32
DDR_DQ37

DDR_DQ34
DDR_DQ35

DDR_DQ40
DDR_DQ41

DDR_DQ42
DDR_DQ46

DDR_DQ48
DDR_DQ52

DDR_DQ50
DDR_DQ51

DDR_DQ57
DDR_DQ61

DDR_DQ58
DDR_DQ59

DDR_SBS0<9>

DDR_SWE#<9>

DDR_SCAS#<9>
DDR_SRAS#<9>

DDR_SBS1<9>

SDREF_DIMM

12

C254
.1UF_0402

DDR_CKE0 <9>

DDR_SCS#1 <9>

DDR_CLK2# <9>
DDR_CLK2 <9>

Layout note
Place these resistor

closely DIMM0,
all trace
length<=750mil

DDR_SBS0
DDR_SWE#

DDR_SCAS#
DDR_SRAS#

DDR_SBS1

I

12

0_0402

R229

RP15 4P2R_10

1 4
2 3

RP17 4P2R_10

1 4
2 3

R223 10_0402

1 2

DDR_DQ[0..63]
DDR_F_CB[0..7]
DDR_DQS[0..8]

SDREF

DDR_SMA[0..12] <9>

DDR_SMA12
DDR_SMA9

DDR_SMA8
DDR_SMA11

DDR_SMA7
DDR_SMA5

DDR_SMA4
DDR_SMA6

DDR_SMA3
DDR_SMA1

DDR_SMA0
DDR_SMA2

DDR_SMA10 DDR_F_SMA10

DDR_DQ[0..63] <12>
DDR_F_CB[0..7] <12>
DDR_DQS[0..8] <12>

RP18 4P2R_10

1 4
2 3

RP16 4P2R_10

1 4
2 3

RP14 4P2R_10

1 4
2 3

RP19 4P2R_10

1 4
2 3

RP13 4P2R_10

1 4
2 3

RP12 4P2R_10

1 4
2 3

R224 10_0402

1 2

DDR_F_SMA[0..12]<12>

Layout note
Place these resistor

closely DIMM0,
all trace length<=750mil

Layout note
Place these resistor

closely DIMM0,
all trace length
Max=1.3"

DDR_CKE1
DDR_CKE0

DDR_SCS#0
DDR_SCS#1

RP28 4P2R_56

1 4
2 3

RP24 4P2R_56

1 4
2 3

DDR_F_SBS0
DDR_F_SWE#

DDR_F_SCAS#
DDR_F_SRAS#

DDR_F_SBS1

DDR_F_SBS0 <12>
DDR_F_SWE# <12>

DDR_F_SCAS# <12>
DDR_F_SRAS# <12>

DDR_F_SBS1 <12>

J

DDR_F_SMA12
DDR_F_SMA9

DDR_F_SMA8
DDR_F_SMA11

DDR_F_SMA7
DDR_F_SMA5

DDR_F_SMA4
DDR_F_SMA6

DDR_F_SMA3
DDR_F_SMA1

DDR_F_SMA0
DDR_F_SMA2

+1.25VS

8 8

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

B

C

D

E

F

G

H

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

I

11 43, 21, 2002

of

J

0B

A

+1.25VS

DDR_DQ4

1 1

DDR_DQ5
DDR_DQ1

DDR_DQS0
DDR_DQ6

DDR_DQ3
DDR_DQ2

2 2

DDR_DQ7
DDR_DQ8

DDR_DQ12
DDR_DQ9

DDR_DQS1
DDR_DQ13

3 3

DDR_DQ14
DDR_DQ10

DDR_DQ11
DDR_DQ15

DDR_DQ20
DDR_DQ16

4 4

DDR_DQ17
DDR_DQ21

DDR_DQS2
DDR_DQ18

DDR_DQ22
DDR_DQ19

DDR_DQ23

5 5

DDR_DQ24

DDR_DQ28
DDR_DQ25

DDR_DQS3
DDR_DQ29

RP78 4P2R_56

1 4
2 3

RP77 4P2R_56

1 4
2 3

RP76 4P2R_56

1 4
2 3

RP75 4P2R_56

1 4
2 3

RP74 4P2R_56

1 4
2 3

RP73 4P2R_56

1 4
2 3

RP72 4P2R_56

1 4
2 3

RP71 4P2R_56

1 4
2 3

RP70 4P2R_56

1 4
2 3

RP69 4P2R_56

1 4
2 3

RP68 4P2R_56

1 4
2 3

RP66 4P2R_56

1 4
2 3

RP67 4P2R_56

1 4
2 3

RP65 4P2R_56

1 4
2 3

RP64 4P2R_56

1 4
2 3

RP63 4P2R_56

1 4
2 3

RP62 4P2R_56

RP61 4P2R_56

RP60 4P2R_56

RP59 4P2R_56

RP58 4P2R_56

RP57 4P2R_56

RP29 4P2R_56

RP55 4P2R_56

RP54 4P2R_56

RP53 4P2R_56

RP52 4P2R_56

RP50 4P2R_56

RP51 4P2R_56

RP49 4P2R_56

RP48 4P2R_56

RP47 4P2R_56

Layout note

6 6

Place these resistor
closely DIMM1,
all trace
length<=800mil

7 7

B

DDR_DQ26

14

DDR_DQ30

23

DDR_DQ27

14

DDR_DQ31

23

DDR_F_CB4

14

DDR_F_CB5

23

DDR_F_CB0

14

DDR_F_CB1

23

DDR_F_CB2

14

DDR_DQS8

23

DDR_F_CB3

14

DDR_F_CB6

23

14

DDR_F_CB7

23

DDR_DQ36

14

DDR_DQ32

23

DDR_DQ37

14

DDR_DQ33

23

DDR_DQ38

14

DDR_DQS4

23

DDR_DQ39

14

DDR_DQ34

23

DDR_DQ35

14

DDR_DQ44

23

DDR_DQ40

14

DDR_DQ45

23

DDR_DQ41

14

DDR_DQS5

23

DDR_DQ42

14

DDR_DQ43

23

DDR_DQ46

14

DDR_DQ47

23

+1.25VS

RP46 4P2R_56

RP45 4P2R_56

RP44 4P2R_56

RP43 4P2R_56

RP42 4P2R_56

RP41 4P2R_56

RP40 4P2R_56

RP39 4P2R_56

RP38 4P2R_56

C

DDR_DQ48

14

DDR_DQ49

23

DDR_DQ52

14

DDR_DQ53

23

DDR_DQ54

14

DDR_DQS6

23

DDR_DQ50

14

DDR_DQ55

23

DDR_DQ51

14

DDR_DQ56

23

DDR_DQ57

14

DDR_DQ60

23

DDR_DQ61

14

DDR_DQS7

23

DDR_DQ58

14

DDR_DQ62

23

DDR_DQ59

14

DDR_DQ63

23

D

DDR_F_CB[0..7]
DDR_DQS[0..8]
DDR_DQ[0..63]DDR_DQ0
DDR_F_SMA[0..12]

E

DDR_F_CB[0..7] <11>
DDR_DQS[0..8] <11>
DDR_DQ[0..63] <11>
DDR_F_SMA[0..12] <11>

F

+2.5V +2.5V

DDR_DQ0
DDR_DQ1

DDR_DQS0
DDR_DQ6

DDR_DQ2
DDR_DQ8

DDR_DQ9
DDR_DQS1

DDR_DQ10
DDR_DQ15

DDR_CLK4<9>

DDR_CLK4#<9>

DDR_DQ16
DDR_DQ21

DDR_DQS2
DDR_DQ18

DDR_DQ19
DDR_DQ24

DDR_DQ25
DDR_DQS3

DDR_DQ30
DDR_DQ31

DDR_F_CB5
DDR_F_CB1 DDR_F_CB0

DDR_DQS8
DDR_F_CB2

DDR_F_CB3

DDR_CLK3<9>

DDR_CLK3#<9>

DDR_CKE3<9>

DDR_F_SBS0<11>

DDR_F_SWE#<11>

DDR_SCS#2<9>

DIMM_SMDATA<11,14>

DIMM_SMCLK<11,14>

DDR_CKE3 DDR_CKE2
DDR_F_SMA12

DDR_F_SMA9
DDR_F_SMA7

DDR_F_SMA5
DDR_F_SMA3
DDR_F_SMA1

DDR_F_SMA10
DDR_F_SBS0
DDR_F_SWE#
DDR_SCS#2 DDR_SCS#3

DDR_DQ32
DDR_DQ37

DDR_DQS4
DDR_DQ34

DDR_DQ35
DDR_DQ40

DDR_DQ41
DDR_DQS5

DDR_DQ42
DDR_DQ46

DDR_DQ48
DDR_DQ52

DDR_DQS6
DDR_DQ50

DDR_DQ51
DDR_DQ57

DDR_DQ61
DDR_DQS7

DDR_DQ58
DDR_DQ59

+3VS

G

JP28

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0#

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2#

93

VDD

95

CKE1

97

DU/A13

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE#

121

S0#

123

DU

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD_SPD

199

VDD_ID

DDR-SODIMM_200_Normal

DIMM1

Back side / H=9.2mm

VREF

VSS
DQ4

DQ5
VDD
DM0
DQ6

VSS
DQ7

DQ12

VDD

DQ13

DM1

VSS

DQ14
DQ15

VDD
VDD

VSS

VSS

DQ20
DQ21

VDD
DM2

DQ22

VSS

DQ23
DQ28

VDD

DQ29

DM3

VSS

DQ30
DQ31

VDD

CB4

CB5

VSS
DM8

CB6
VDD

CB7

DU/RESET#

VSS

VSS
VDD
VDD

CKE0

DU/BA2

A11

VSS

VDD

BA1

RAS#
CAS#

S1#

DU

VSS

DQ36
DQ37

VDD
DM4

DQ38

VSS

DQ39
DQ44

VDD

DQ45

DM5

VSS

DQ46
DQ47

VDD

CK1#

CK1

VSS

DQ52
DQ53

VDD
DM6

DQ54

VSS

DQ55
DQ60

VDD

DQ61

DM7

VSS

DQ62
DQ63

VDD

SA0

SA1

SA2

DU

H

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102

A8

104
106

A6

108

A4

110

A2

112

A0

114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_DQ4
DDR_DQ5

DDR_DQ3
DDR_DQ7

DDR_DQ12
DDR_DQ13

DDR_DQ14
DDR_DQ11

DDR_DQ20
DDR_DQ17

DDR_DQ22
DDR_DQ23

DDR_DQ28
DDR_DQ29

DDR_DQ26
DDR_DQ27

DDR_F_CB4

DDR_F_CB6
DDR_F_CB7

DDR_F_SMA11
DDR_F_SMA8

DDR_F_SMA6
DDR_F_SMA4
DDR_F_SMA2
DDR_F_SMA0

DDR_F_SBS1
DDR_F_SRAS#
DDR_F_SCAS#

DDR_DQ36
DDR_DQ33

DDR_DQ38
DDR_DQ39

DDR_DQ44
DDR_DQ45

DDR_DQ43
DDR_DQ47

DDR_DQ49
DDR_DQ53

DDR_DQ54
DDR_DQ55

DDR_DQ56
DDR_DQ60

DDR_DQ62
DDR_DQ63

+3VS

I

SDREF_DIMM

12

C253
.1UF_0402

DDR_CKE2 <9>

DDR_F_SBS1 <11>
DDR_F_SRAS# <11>
DDR_F_SCAS# <11>
DDR_SCS#3 <9>

DDR_CLK5# <9>
DDR_CLK5 <9>

+1.25VS

RP27 4P2R_56

RP23 4P2R_56

RP26 4P2R_56

RP22 4P2R_56

RP25 4P2R_56

RP21 4P2R_56

R242 56_0402

1 2

RP37 4P2R_56

RP20 4P2R_56

R230 56_0402

1 2

DDR_CKE2
DDR_CKE3

DDR_SCS#2
DDR_SCS#3

Layout note

J

DDR_F_SMA9

14

DDR_F_SMA12

23

DDR_F_SMA11

14

DDR_F_SMA8

23

DDR_F_SMA5

14

DDR_F_SMA7

23

DDR_F_SMA6

14

DDR_F_SMA4

23

DDR_F_SMA1

14

DDR_F_SMA3

23

DDR_F_SMA2

14

DDR_F_SMA0

23

DDR_F_SMA10

DDR_F_SWE#

14

DDR_F_SBS0

23

DDR_F_SRAS#

14

DDR_F_SCAS#

23

DDR_F_SBS1

RP56 4P2R_56

1 4
2 3

RP36 4P2R_56

1 4
2 3

+1.25VS

Place these resistor
closely DIMM1,
all trace length
Max=1.3"

8 8

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

B

C

D

E

F

G

H

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

I

12 43, 21, 2002

of

J

0B

A

B

C

D

E

F

G

H

I

J

Layout note :

Distribute as close as possible
to DDR-SODIMM.

1 1

+2.5V

12

C559
.1UF_0402_X5R

2 2

3 3

+2.5V +2.5V

12

C574
.1UF_0402_X5R

Layout note :

12

C577
.1UF_0402_X5R

12

C556
.1UF_0402_X5R

12

C560
.1UF_0402_X5R

12

C570
.1UF_0402_X5R

12

C562
.1UF_0402_X5R

12

C561
.1UF_0402_X5R

12

C571
.1UF_0402_X5R

12

C573
.1UF_0402_X5R

12

C558
.1UF_0402_X5R

12

C572
.1UF_0402_X5R

12

C576
.1UF_0402_X5R

12

C255

+

220UF_D2_6.3V

12

C555
.1UF_0402_X5R

12

C273

+

220UF_D2_6.3V

12

C575
.1UF_0402_X5R

12

C557
.1UF_0402_X5R

Place one cap close to every 2 pull up resistors termination to
+1.25V

+1.25VS

12

C259

4 4

.1UF_0402_X5R

12

C324
.1UF_0402_X5R

12

C271
.1UF_0402_X5R

12

C260
.1UF_0402_X5R

12

C347
.1UF_0402_X5R

12

C326
.1UF_0402_X5R

12

C310
.1UF_0402_X5R

12

C311
.1UF_0402_X5R

12

C307
.1UF_0402_X5R

12

C308
.1UF_0402_X5R

+1.25VS

12

C323
.1UF_0402_X5R

5 5

6 6

7 7

+1.25VS

12

C336
.1UF_0402_X5R

+1.25VS

12

C344
.1UF_0402_X5R

+1.25VS

12

C268
.1UF_0402_X5R

12

C325
.1UF_0402_X5R

12

C316
.1UF_0402_X5R

12

C328
.1UF_0402_X5R

12

C269
.1UF_0402_X5R

12

C319
.1UF_0402_X5R

12

C317
.1UF_0402_X5R

12

C330
.1UF_0402_X5R

12

C266
.1UF_0402_X5R

12

C309
.1UF_0402_X5R

12

C305
.1UF_0402_X5R

12

C318
.1UF_0402_X5R

12

C267
.1UF_0402_X5R

12

C312
.1UF_0402_X5R

12

C306
.1UF_0402_X5R

12

C331
.1UF_0402_X5R

12

C272
.1UF_0402_X5R

12

C313
.1UF_0402_X5R

12

C346
.1UF_0402_X5R

12

C322
.1UF_0402_X5R

12

C342
.1UF_0402_X5R

12

C314
.1UF_0402_X5R

12

C333
.1UF_0402_X5R

12

C270
.1UF_0402_X5R

12

C338
.1UF_0402_X5R

12

C332
.1UF_0402_X5R

12

C334
.1UF_0402_X5R

12

C329
.1UF_0402_X5R

12

C339
.1UF_0402_X5R

12

C315
.1UF_0402_X5R

12

C320
.1UF_0402_X5R

12

C345
.1UF_0402_X5R

12

C340
.1UF_0402_X5R

12

C335
.1UF_0402_X5R

12

C327
.1UF_0402_X5R

12

C343
.1UF_0402_X5R

12

C341
.1UF_0402_X5R

+1.25VS

12

C258
.1UF_0402_X5R

12

C257
.1UF_0402_X5R

12

C337
.1UF_0402_X5R

8 8

A

B

12

C321
.1UF_0402_X5R

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

E

F

G

H

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

I

13 43, 21, 2002

of

J

0B

A

B

C

D

E

F

G

H

I

J

1 1

+3VS

SEL0SEL1 Function

00
01
10

2 2

3 3

PM_STPCPU#<16,43>

H_BSEL0<5>
H_BSEL1<5>

SLP_S1#<16,30>

PM_STPPCI#<16>

11

R350

1K_0402

66Mhz Host CLK
100Mhz Host CLK
200Mhz Host CLK
133Mhz Host CLK

@1K_0402

1 2

R127 @0_0402

12

1K_0402

+3VS +3VS

12

12

R130

12

R134

R67 0_0402
R126 M@0_0402

1K_0402

12

1 2
1 2

R128

R129
@1K_0402

Place Crystal within 500 mils of CK_Titan

12

+3VS

+3VS

C154 @10PF_0402

caps are internal
to CK_TITAN

12

C147 @10PF_0402

R70 @1K_0402

1 2

R365 DT@1K_0402

1 2

CK408_PWRGD#<33>

R360 10K_0402

+3VS

1 2

R351 @10K_0402

1 2

H_BSEL2
H_BSEL0
BSEL0

12

Y1

14.318MHZ

4 4

DIMM_SMDATA
DIMM_SMCLK

Please closely pin42

5 5

CLK_ICH48<16>

CLK_SD48<27>

CLK_ICH14<16>

CLK_14M_SIO<28>

CLK_14M_AUD<22>

R76 475_1%

1 2

R77 22_0402

1 2

R73 22_0402

1 2

R131 10_0402

1 2

R133 10_0402

1 2

R132 @10_0402

1 2

CLK_ICH48M

CLK_SD48M

CLK_ICH14M

L23
BLM21A601SPT

1 2

L52
BLM21A601SPT

1 2

U6

2

XTAL_IN

40

SEL2

55

SEL1

54

SEL0

25

PWR_DWN#

34

PCI_STOP#

53

CPU_STOP#

28

VTT_PWRGD#

43

MULT0

29

SDATA

30

SCLK

33

3V66_0/DRCG

35

3V66_1/VCH_CLK

42

IREF

39

48MHZ_USB

38

48MHZ_DOT

56

REF

+3V_CLK

181419323746

VDD_PCI

VDD_REF

Width=40 mils

12

+

C507

22UF_10V_1206

50

VDD_PCI

VDD_CPU

VDD_CPU

VDD_3V66

VDD_3V66

VDD_48MHZ

66MHZ_IN/3V66_5

66MHZ_OUT2/3V66_4
66MHZ_OUT1/3V66_3
66MHZ_OUT0/3V66_2

VDD_CORE

GND_COREXTAL_OUT

CPUCLKT2

CPU_CLKC2

CPUCLKT1

CPUCLKC1

CPUCLKT0

CPUCLKC0

PCICLK_F2
PCICLK_F1
PCICLK_F0

PCICLK6
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK0

12

C151
.1UF_0402

26

273
45

44
49

48
52

51
24

23
22
21

7
6
5

18
17
16
13
12
11
10

12

C483
.1UF_0402

+3VS_CLKVDD

Width=15 mils

12

C93
.1UF_0402

CLK_BCLK

CLK_BCLK#
CLK_HT

CLK_HT#
CLK_ITP

CLK_ITP#

CLK66_MCH
CLK66_AGP
CLKICH_HUB

CLKPCI_F2

CLKPCI_MIN
CLKPCI_SD

CLKPCI_LPC
CLKPCI_SIO
CLKPCI_PCM_F
CLKPCI_1394_F

12

C458
.1UF_0402

R92 33.2_1%

R82 33.2_1%

R105 33.2_1%

R98 33.2_1%

R118 @33.2_1%

R109 @33.2_1%

R74 33.2_1%
R80 33.2_1%
R79 33.2_1%

R117 33.2_1%

R86 33.2_1%
R95 33.2_1%

R103 33.2_1%
R104 33.2_1%
R107 33.2_1%
R110 33.2_1%

12

C488
.1UF_0402

L20
BLM21A601SPT

1 2

12

C87
10UF_10V_1206

1 2

1 2
1 2

1 2
1 2

1 2

1 2
1 2
1 2

1 2

1 2
1 2

1 2
1 2
1 2
1 2

12

C138
.1UF_0402

+3VS

12

C124
.1UF_0402

1 2

R91 49.9_1%

R_1
R_2

R81 49.9_1%

1 2

1 2

R106 49.9_1%

R_3
R_4

R97 49.9_1%

1 2

1 2

R121 @49.9_1%

R_5
R_6

R111 @49.9_1%

1 2

12

C464
.1UF_0402

12

C486
470PF_0402

CLK_HCLK <4>

12

C489
47PF_0402

Place resistor near R_1,R_2 ;Trace
<=400mils

CLK_HCLK# <4>
CLK_GHT <8>

Place resistor near R_3,R_4 ;Trace
<=400mils

CLK_GHT# <8>
CLK_ITPP <5>

Place resistor near R_5,R_6 ;Trace
<=500mils

CLK_ITPP# <5>

CLK_AGP_MCH <8>
CLK_AGP <15>
CLK_ICHHUB <16>

CLK_ICHPCI <16>

CLK_PCI_MIN <35>
CLK_PCI_SD <27>

CLK_PCI_LPC <30>
CLK_PCI_SIO <28>
CLK_PCI_PCM <24>
CLK_PCI_1394 <26>

GND_REF

GND_PCI

GND_PCI

GND_3V66

GND_3V66

GND_48MHZ

GND_IREF

6 6

or ICS 9508-05

W320-04

491520313641

GND_CPU

47

12

12

12

Note:
CPU_CLK[2:0] needs to be running in C3, C4.

+12VS

12

1 3

D

B

R154
22_0402

2

G

S

Q11 2N7002

2

G

1 3

D

S

DIMM_SMDATA

DIMM_SMCLK

C

DIMM_SMDATA <11,12>SMB_DATA<16,18>

DIMM_SMCLK <11,12>

D

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

E

F

G

7 7

Q47 2N7002

SMB_CLK<16,18>

8 8

A

C101
@10PF_0402

C112
@10PF_0402

H

C117
@10PF_0402

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

I

14 43, 21, 2002

of

J

0B

A

B

C

D

E

F

G

H

I

J

AGP 100X2 Pin connector

JP3

1

GND

INT_MIC<23>

1 1

CRT_R<34>
CRT_G<34>
CRT_B<34>

PID0<28>
PID1<28>
PID2<28>
PID3<28>
PID4<28>

2 2

MEDIA_LED#<27>
NUMLED#<30>

CAPSLED#<30>

MAIL_LED#<30>

AGP_NBREF

+1.8VS

+1.5VS

CRT_R
CRT_G
CRT_B
CRT_HSYNC

CRT_VSYNC
3VDDCDA
3VDDCCL
PID0
PID1
PID2
PID3
PID4

GNDA

3 3

+5VS

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

GND

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

GND

43

43

45

45

47

47

49

49

51

51

53

53

55

55

57

57

59

59

61

GND

63

63

65

65

67

67

69

69

71

71

73

73

75

75

77

77

79

79

81

GND

83

83

85

85

87

87

89

89

91 92

91 92

93 94

93 94

95 96

95 96

97 98

97 98

99 100

GND GND

GND

GND

GND

GND

GND

2
4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22
24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42
44

44

46

46

48

48

50

50

52

52

54

54

56

56

58

58

60

60

62
64

64

66

66

68

68

70

70

72

72

74

74

76

76

78

78

80

80

82
84

84

86

86

88

88

90

90

TV_SYNC

TV_LUMA
TV_CRMA
TV_COMPS

EC_SMC1 <30,31,39>
EC_SMD1 <30,31,39>

SUS_STAT# <16,28>

TV_LUMA <34>
TV_CRMA <34>

KSO16 <30>
KSI0 <29,30,33>
KSI1 <29,30,33>
KSI2 <29,30,33>
KSI3 <29,30,33>

KSI4 <29,30,33>
LID_SW# <30,31>
DRV05V# <19,28>
ON/OFFBTN# <33>

+3VS

+1.25VS_VGA

AGP_ST[0..2]<8>

AGP_SBA[0..7]<8>

AGP_AD[0..31]<8>

AGP_C/BE#[0..3]<8>

AGP_ST[0..2]
AGP_SBA[0..7]
AGP_AD[0..31]
AGP_C/B#[0..3]

AGP_ST0
AGP_ST2
AGP_SBA0
AGP_SBA2
AGP_SBA4
AGP_SBA6
AGP_AD30
AGP_AD28
AGP_AD26

AGP_ADSTB1#<8>

AGP_ADSTB1<8>

AGP_ADSTB0<8>

AGP_ADSTB0#<8>

CLK_AGP<14>
AGP_PAR<8>

AGP_IRDY#<8>

AGP_TRDY#<8>

AGP_GNT#<8>
AGP_REQ#<8>

AGP_BUSY#<16>

AGP_WBF#<8>

+12VALW
+AGPREF

+2.5VS

AGP_AD24
AGP_AD22

AGP_AD20
AGP_AD18

AGP_AD16
AGP_AD14
AGP_AD12
AGP_AD10
AGP_AD8
AGP_AD6

AGP_AD4
AGP_AD2
AGP_AD0

FOXCONN-100P

4 4

B++

INV_B+

L10

FBM-L11-201209-221

Width=60 mils

12

C440
.1UF_0402

12

C46
.1UF_0402

12

C35
.1UF_0402

12

C406
22UF_10V_1206

+1.8VS+AGPREF

12

C129
.1UF_0402

12

C431
.1UF_0402

+3VS+2.5VS

12

C432
.1UF_0402

12

C22
.1UF_0402

+12VALW+1.5VS +5VS

12

C64
.1UF_0402

5 5

12

R344
100K_0402

CRT CONNECTOR

TV_OUT CONNECTOR

D6

@DAN217

1

D5

@DAN217

D3

1

@DAN217

6 6

2

3

2

3

1 2

C15 S@22PF_0402

TV_LUMA

7 7

TV_CRMA

TV_COMPS

12

12

R11

R12

S@75_0402

8 8

S@75_0402

12

R10

S@75_0402

A

12

12

C25

C26

S@270PF_0402

S@270PF_0402

B

12

C24

S@270PF_0402

L6

1 2

S@FBM-11-160808-121

1 2

C14 S@22PF_0402

L9

1 2

S@FBM-11-160808-121

1 2

C21 S@22PF_0402

L7

1 2

S@FBM-11-160808-121

C19

S@330PF_0402

12

C

12

C16

S@330PF_0402

2

12

C17

S@330PF_0402

TV_VCC

1

R13 S@0_0402

3

TV_LUMAL
TV_CRMAL

TV_COMPSL

1 2

+3VS

JP13

1
2
3
4
5
6
7

S@S CONN.

D

M_SEN#<30,31,34>

E

M_SEN#
CRT_R

CRT_G

R9

75_0402

C32

12

10PF_0402

R7

75_0402

1 2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C33

12

10PF_0402

75_0402

1 2

CRT_HSYNC

CRT_VSYNC CRT_VSYNCRFL

12

R8

1 2

F

JP2

1

GND

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

GND

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

GND

43

43

45

45

47

47

49

49

51

51

53

53

55

55

57

57

59

59

61

GND

63

63

65

65

67

67

69

69

71

71

73

73

75

75

77

77

79

79

81

GND

83

83

85

85

87

87

89

89

91 92

91 92

93 94

93 94

95 96

95 96

97 98

97 98

99 100

GND GND

FOXCONN-100P

Q42

1
2
3 6

FDS4435

4

R342

1 2

75K

L3

1 2

FCM2012C80_0805

L2

1 2

FCM2012C80_0805

L4

1 2

FCM2012C80_0805
C34
10PF_0402

CRT_HSYNCRFL<34>
CRT_VSYNCRFL<34>

G

2

GND

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

GND

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

GND

44

44

46

46

48

48

50

50

52

52

54

54

56

56

58

58

60

60

62

GND

64

64

66

66

68

68

70

70

72

72

74

74

76

76

78

78

80

80

82

GND

84

84

86

86

88

88

90

90

Width=60 mils

8
7

5

FDS4435: P CHANNAL

13

D

Q41

2

G

S

2N7002

1

D1

2

CRTL_R

CRTL_G

CRTL_BCRT_B

12

C10
22PF_0402

@DAN217

D4

3

12

C11
22PF_0402

L8

1 2

CHB1608B121

L1

1 2

CHB1608B121

CRT_HSYNCRFL
CRT_VSYNCRFL

+5V

1

@DAN217

2

VGA_DECT

AGP_ST1
AGP_SBA1
AGP_SBA3
AGP_SBA5
AGP_SBA7

AGP_C/BE#3
AGP_AD31
AGP_AD29
AGP_AD27
AGP_AD25
AGP_C/BE#2
AGP_AD23
AGP_AD21
AGP_AD19

AGP_AD17
AGP_C/BE#1
AGP_AD15
AGP_AD13
AGP_AD11
AGP_AD9
AGP_C/BE#0
AGP_AD7
AGP_AD5

AGP_AD3
AGP_AD1

AGP_RST#

M_SEN#

LVDS_BLON#

INVPWR_B+

3

12

CRT_HSYNCRFL

H

1

D2

@DAN217

2

C12
22PF_0402

AGP_SBSTB <8>
AGP_SBSTB# <8>

PM_C3_STAT# <16>
AGP_DEVSEL# <8>

AGP_STOP# <8>
AGP_FRAME# <8>
PIRQA# <16,18,24,26>
AGP_RBF# <8>

+2.5VS

LVDS_BLON#

+5VS+3VS

3

C6

22PF_0402

D33

2 1

RB411D

12

C7
22PF_0402

INVPWR_B+

INVT_PWM<30>

DAC_BRIG<30>

R339 0_0402

1 2

BKOFF#<30>

ENABLT<30>

+3VS

12

R514

10K_0402_5%

13

Q62

2

2N7002

F4

I

21

C4
.1UF_0402

C9

12

CRT_VCC

12

12

C3
220PF_0402

R_CRT_VCC

FUSE_1A

12

12

C13

220PF_0402

220PF_0402

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

C

#$% &'

Date: Sheet

INVT_PWM
DISPOFF#
DAC_BRIG

PCIRST# <5,8,16,19,24,26,28,35>

D42

RB751V
D43

RB751V

R702

R703

6.8K_0402

6.8K_0402

1 2

1 2

6

11

1
7

12

2
8

13

1 3

2

3
9

14

4
10
15

5

Q84

1 3

2

2N7002

4.7K_0402

CRT_VCC

Q83

2N7002

JP33

1

1

2

2

3

3

4

4

5

5

6

6

7

7

HEADER 7

+3VS

R513

4.7K_0402_5%

1 2

DISPOFF#

21

21

DOCK_DDCDA
DOCK_DDCCL

JP14

CRT CONN.

R704

DOCK_DDCDA <34>
DOCK_DDCCL <34>

15 43, 21, 2002

J

3VDDCDA

3VDDCCL

R705

4.7K_0402

+3VS

0B

of

A

+3VALW

R226 10K_0402

1 1

VLBA#<30>

RSMRST#

R200

1 2

1 2

C202 .1UF_0402

2 2

IAC_BITCLK<22,32,35>

SDATA_IN0<22>

3 3

SDATA_IN1<32,35>

+3VS

IAC_SDATAO<22,32,35>

1 2

R376 @10K_0402

12

21

D17 1SS355

PM_AUXPWROK

0_0402

PM_PWROK

IAC_BITCLK

1 2

R162 10K_0402

SDATA_IN0

1 2

R378 10K_0402

SDATA_IN1

R385 10K_0402

12

IAC_SDATAO

R221 @0_0402

12

4 4

IAC_SYNC<22,32,35>

AC97_RST#<22,32,35>

R377 33_0402

IAC_SYNC

12

C515
@27PF

1 2

AC_RST#

5 5

Place closely to
ICH3-M

CLK_ICH14

12

R421
@10_0402

12

6 6

C540
@10PF_0402

CLK_ICH48

12

R411
@10_0402

12

C532
@10PF_0402

+RTCVCC

1 2

R248 1K_0402

7 7

+1.8VS

HUB Interface VSwing Voltage

12

R211

301_1%

R_G

R216

301_1%

8 8

R_H

1. Place R_G and R_H in middle of Bus.

12

12

C544
.1UF_0402

+VS_HUBVSWING

A

BATTLOW#

1 2

AD[0..31]<24,26,35>

R165

22_0402

C516
@27PF

+R_VBAIS

B

+3VS

SDATAO

12

C/BE#0<24,26,35>
C/BE#1<24,26,35>
C/BE#2<24,26,35>
C/BE#3<24,26,35>

GNT#0<18,26>
GNT#1<18,35>
GNT#2<18,24>
GNT#3<18>
GNT#4<18,35>

REQ#0<18,26>
REQ#1<18,35>
REQ#2<18,24>
REQ#3<18>
REQ#4<18,35>

C276

1 2

.047UF

1 2

R245 @22M

B

EC_SMI#<30>
EC_SCI#<30>

LID_OUT#<30>

ICH_VGATE<33>

PM_CPUPERF#<5>

PM_GMUXSEL<43>

EC_THRM#<30>

SUS_STAT#<15,28>

PM_STPPCI#<14>

PM_STPCPU#<14,43>

SLP_S5#<30>
SLP_S3#<30>

SLP_S1#<14,30>
RSMRST#<20,33>
ICH_SWI#<18,30>

PM_PWROK<33>
PBTN_OUT#<30>

PM_DPRSLPVR<43>

PM_CLKRUN#<18,24,26,28,30,35>
PM_C3_STAT#<15>

PM_AUXPWROK

AGP_BUSY#<15>

1 2

R208

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

1 2

R247 10M

R246
@2.4M_1%

1 2

J2
K1
J4
K3

H5

K4

H3

L1
L2

G2

L4
H4
M4

J3
M5

J1

F5
N2
G4

P2
G1

P1

F2

P3

F3
R1

E2
N4
D1

P4

E1

P5

K2

K5
N1
R2

A4

E3
D2
D5

B4

D3

F4

A3
R4

E4

C566
12PF

C

PM_STPPCI#

RSMRST#
PM_PWROK

BATTLOW#

10K_0402

U52A

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4

PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4

ICH3-M

1 2

R441 10M

X4

12

32.768KHZ

C

EC_SMI#
EC_SCI#
LID_OUT#

PCI

Interface

V4Y5AB3V5AC2

PM_AGPBUSY#/GPIO6

VSS0

VSS1

A1

A13

A16

RTC_VBIAS
RTC_X1

RTC_X2

12

C582
12PF

PM_AUXPWROK

VSS2

A17

PM_BATLOW#

PM_C3_STAT#/GPIO21

VSS3

VSS4

A20

AB21

PM_CLKRUN#/GPIO24

VSS5

A23B8B10

R_K

R_L

AB1

PM_PWRBTN#

PM_DPRSLPVR

VSS6

VSS7

AA6

AA1

AA7

PM_RI#

PM_PWROK

VSS8

VSS9

B13

B14

B15

R205

301_1%

R202

301_1%

D

W20

AA5

AA2

V21

U21

AA4

AB4U5U20

PM_SLP_S3#

PM_SLP_S5#

PM_RSMRST#

PM_SLP_S1#/GPIO19

PM_THRM#

PM_SUS_CLK

PM_SUS_STAT#

PM_STPPCI#/GPIO18

PM_STPCPU#/GPIO20

GeyservillePower Management

VSS

VSS10

VSS11

VSS12

VSS13

VSS14

VSS15

VSS16

VSS17

VSS18

VSS19

VSS20

B18

B19

B20

B22C3C6

F19

C14

C15

C16

C17

CLK_ICH14<14>
CLK_ICH48<14>

+RTCVCC

+1.8VS

12

12

D

1 2

R185 15K

HUB Reference Voltage

Place R_K and R_L
Closely ICH3

+ICH_HUBREF

E

C519 @33PF_0402

1 2

R383
@22_0402

1 2

IAC_SYNC

R382

33_0402

SDATAO

IAC_BITCLK

AC_RST#

SDATA_IN1

SDATA_IN0

1 2

Y20

V19

B7

D11

B11

C11C7A7V1U3T3U2T2U4U1V2W2Y4Y2W3W4Y3

LPC_AD0

AC_SYNC

LPC_AD1

LPC

Interface

AC_RST#

AC_BITCLK

AC_SDATAIN0

AC_SDATAIN1

AC_SDATAOUT

PM_GMUXSEL/GPIO23

PM_CPUPREF#/GPIO22

AC'97

PM_VGATE/VRMPWRGD

Interface

ICH3-M (1/2)

VSS21

VSS22

VSS23

VSS24

VSS25

VSS26

VSS27

VSS28

VSS29

VSS30

VSS31

VSS32

VSS33

VSS34

C18

C19

C20

C21

C22D9D13

D16

D17

D20

D21

D22

E5

CLK_ICH14
CLK_ICH48

12

C189
1UF

R_RTC

Layout note:
Locate J1 and R_RTC on bottom side and with
easy access through memory door

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

E

F

1 2

R222 10K_0402

R697

10_0402

1 2

EC_SMI#

EC_SCI#

LID_OUT#

IDE_PATADET

GPIO_7

GPIO_8

GPIO_12

GPIO_13

GPIO_25

GPIO_27

LPC_AD2

LPC_AD3

LPC_DRQ#0

LPC_DRQ#1

LPC_FRAME#

unMUX

GPIO

Clocks EEPROM

CLK_RTCX2

CLK_RTCX1

CLK_RTEST#

CLK_48

CLK_14

J23

AC7Y7F20

RTC_X1

RTC_RST#

12

J1
JOPEN

12

R192
1K_0402

CLK_VBIAS

AC6

AB7

RTC_VBIAS

RTC_X2

GPIO_28

LAN

Interface

LAN_RXD2

LAN_TXD0

LAN_TXD1

LAN_TXD2

LAN_JCLK

LAN_RSTSYNC

A10C9D7

LAN_CLK_ICH

R164 22_0402

1 2

J19

INT_APICCLK

LAN_RXD0

LAN_RXD1

C8A8A9B9C10

PIRQA#

J20

INT_APICD1

INT_APICD0

INT_PIRQA#

Interrupt
Interface

Interface

EEP_SHCLK

D10

PIRQB#

INT_PIRQB#

EEP_DOUT

F

G

LAD0 <27,28,30>
LAD1 <27,28,30>
LAD2 <27,28,30>
LAD3 <27,28,30>
LDRQ#1 <28>
LFRAME# <27,28,30>

+3VS

SIDEPWR <19>

1 2

R417 10K_0402

IRQ14 <18,19>
IRQ15 <18,21>

GPIO2

GPIO5

GPIO4

GPIO3

PIRQC#

PIRQD#

H22

W19

AB14A5C5

B5A6A2B2C1B1J21

INT_IRQ15

INT_PIRQD#

INT_PIRQC#

EEP_CS

EEP_DIN

E9D8E8

INT_IRQ14

INT_PIRQF#/GPIO3

INT_PIRQE#/GPIO2

INT_PIRQH#/GPIO5

INT_PIRQG#/GPIO4

PCI_GPIO1/REQB#/REQ5#

PCI_GPIO17/GNTB#/GNT5#

PCI

Interface

System

Managment

Interface

CPU

Interface

HubLink

Interface

HUB_PSTRB#

HUB_RCOMP

HUB_VREF

HUB_VSWING

N22

P23

K19

L20

L19

HUB_ICH_RCOMP

LAN_RXD0 <20>
LAN_RXD1 <20>
LAN_RXD2 <20>
LAN_TXD0 <20>
LAN_TXD1 <20>
LAN_TXD2 <20>
LAN_JCLK <20>
LAN_RSTSYNC <20>

INT_SERIRQ

HUB_PSTRB

SIRQ <18,24,27,28,30>

PCI_CLK

PCI_DEVSEL#

PCI_FRAME#

PCI_GPIO0/REQA#

PCI_GPIO16/GNTA#

PCI_IRDY#

PCI_PAR
PCI_PERR#
PCI_LOCK#

PCI_PME#

PCI_RST#

PCI_SERR#

STOP#

PCI_TRDY#

SM_INTRUDER#

SMLINK0

SMLINK1

SMB_CLK

SMB_DATA

SMB_ALERT#/GPIO11

CPU_A20GATE

CPU_A20M#

CPU_DPSLP#

CPU_FERR#

CPU_IGNNE#

CPU_INIT#
CPU_INTR

CPU_NMI

CPU_PWRGOOD

CPU_RCIN#

CPU_SLP#

CPU_SMI#

STPCLK#

HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9

HUB_PD10

HUB_CLK

HUB_PAR

T19

R19

CLK_ICHHUB

H

CLK_ICHPCI

T5
M3
F1
C4
D4
B6
B3
N3
G5
M2
M1

ICH_WAKE_UP#

W1
Y1
L5
H2
H1

Y6
AC3
AB2
AC4
AB5
AC5

Y22
V23
AB22
J22
AA21
AB23
AA23
Y21
W23
U22
W21
Y23
U23

L22
M21
M23
N20
P21
R22
R20
T23
M19
P19
N19

CLK_ICHHUB <14>
HUB_PSTRB <8>
HUB_PSTRB# <8>

R161

@1K_0402

1 2

R264 33_0402

H_FERR#

HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10

EEP_CS <20>
EEP_DIN <20>
EEP_DOUT <20>
EEP_SHCLK <20>

PIRQA#<15,18,24,26>
PIRQB#<18>
PIRQC#<18,35>
PIRQD#<18,35>

CLK_ICHPCI <14>
DEVSEL# <18,24,26,35>
FRAME# <18,24,26,35>
PCI_REQA# <18>
PCI_REQB# <18>

IRDY# <18,24,26,35>
PAR <18,24,26,35>
PERR# <18,24,26,35>
PLOCK# <18,24>

12

SERR# <18,24,26,35>
STOP# <18,24,26,35>
TRDY# <18,24,26,35>

SM_INTRUDER# <18>
SMLINK0 <18>
SMLINK1 <18>
SMB_CLK <14,18>
SMB_DATA <14,18>
SMB_ALERT# <18>

GATEA20 <30>
H_A20M# <5>

H_IGNNE# <5>
H_INIT# <5>
H_INTR <5>
H_NMI <5>
H_PWRGD <5>
KBRST# <30>
H_SLP# <5>
H_SMI# <5>
H_STPCLK# <5>

HUB_PD[0..10]

+ICH_HUBREF

Title

I

GPIO4

GPIO2
GPIO3
GPIO4
GPIO5

PIRQA#
PIRQB#
PIRQC#
PIRQD#

1 2

R310 @0_0402

1 2

R384 8.2K_0402

1 2

R380 8.2K_0402

1 2

R379 8.2K_0402

1 2

R166 8.2K_0402

EC_WAKEUP#<31>

+3VS

GAIN_SEL# <23>

+3VALW

D14

21

@RB751V

Place closely to
ICH3-M

CLK_ICHPCI

12

R225
@10_0402

12

C224

ICH_WAKE_UP# <31>
PCIRST# <5,8,15,19,24,26,28,35>

R233 0_0402

1 2

+3VS

12

R201
300_0402

H_FERR#

Q21

2

3 1

3904

H_F_FERR#<5>

HUB_PD[0..10] <8>

+VS_HUBVSWING

1 2

R209 36.5_1%

12

C219
.01UF_0402

GPIO3

12

C215
.01UF_0402

2

G

+CPU_CORE

H_DPSLP#<5>

12

Q19

3 1

3904

Close to ICH3-M.

13

D

S

@15PF_0402

12

R228
@10K_0402

(for use if CPU unable
to support DPSLP#)

R204
470_0402

2

R194

1 2

470_0402

1 2

Q17
@2N7002

Compal Electronics, Inc.

J

12

R219
10K_0402

ICH_WAKE_UP#

CLK_ICHHUB

R227
@10_0402

C252
@10PF_0402

SWC13V <43>

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom

G

H

Date: Sheet

#$% &'

I

16 43, 21, 2002

of

J

0B

A

B

C

D

E

F

G

H

I

J

USBP0+<32>

USBP0-<32>

1 1

USBP1+<32>

USBP1-<32>

USBP2+<32>

USBP2-<32>

2 2

USBP3+<32,35>

USBP3-<32,35>

USBP4+<34>

USBP4-<34>

1 2

C171 5PF_0402

1 2

C172 5PF_0402

1 2

C173 5PF_0402

1 2

C170 5PF_0402

1 2

C192 5PF_0402

3 3

USBP5+<34>

USBP5-<34>

1 2

C182 5PF_0402

Layout note The Cap close to

4 4

ICH3-M(< 1 inch)

5 5

6 6

BT_DET#

1 2

R531 WOBT@100K_0402
R533 BT@10K_0402

1 2

R_BT

BlueTooth enable: Mount R_BT

USBP0+
USBP0-

USBP1+
USBP1-

USBP2+
USBP2-

USBP3+
USBP3-

USBP4+
USBP4-

USBP5+
USBP5-

PIDERST#<19>

ICH_IDE_SRST#<19>

12

*

+3VS

+3V

R394

18.2_1%

+3VALW

VCC1.8SUS : Width=40 mils
+1.8_ICHLAN : Width=20 mils

OVCUR#3

R160 100K_0402
R623 100K_0402
R624 100K_0402
R647 100K_0402
R648 100K_0402
R649 100K_0402

1 2

EC_FLASH#<31>

12
12
12
12
12
12

OVCUR#0<32>
OVCUR#1<32>
OVCUR#2<32>

OVCUR#4<34>
OVCUR#5<34>

R207 0_0402

MDC_DET#<32>

ICH_SPKR<22>

+1.8VS

R400

1 2

0_0805

OVCUR#0
OVCUR#1
OVCUR#2
OVCUR#4
OVCUR#5

ICH_IDE_SRST#

VCCPSUS

USBP0+
USBP1+
USBP2+
USBP3+
USBP4+
USBP5+
USBP0­USBP1­USBP2­USBP3­USBP4­USBP5-

OVCUR#0
OVCUR#1
OVCUR#2
OVCUR#3
OVCUR#4
OVCUR#5

BT_DET#

ICH_ACIN

ICH_SPKR

+5VS +3VS

12

R163

1K_0402

+1.8VALW

R217

1 2

0_0805

U52B

D19

USB_PP0

A19

USB_PP1

E17

USB_PP2

B17

USB_PP3

D15

USB_PP4

A15

USB_PP5

D18

USB_PN#0

A18

USB_PN#1

E16

USB_PN#2

B16

USB_PN#3

D14

USB_PN#4

A14

USB_PN#5

E12

USB_OC#0

D12

USB_OC#1

C12

USB_OC#2

B12

USB_OC#3

A12

USB_OC#4

A11

USB_OC#5

H20

USB_LEDA#0/GPIO32

G22

USB_LEDA#1/GPIO33

F21

USB_LEDA#2/GPIO34

G19

USB_LEDA#3/GPIO35

E22

USB_LEDA#4/GPIO36

E21

USB_LEDA#5/GPIO37

H21

USB_LEDG#0/GPIO38

G23

USB_LEDG#1/GPIO39

F23

USB_LEDG#2/GPIO40

G21

USB_LEDG#3/GPIO41

D23

USB_LEDG#4/GPIO42

E23

USB_LEDG#5/GPIO43

B21

USB_RBIAS

H23

SPKR

U19

VCCA

F17

VCCPSUS3/VCCPUSB0

F18

VCCPSUS4/VCCPUSB1

K14

VCCPSUS5/VCCPUSB2

E10

VCCPSUS0

V8

VCCPSUS1

V9

VCCPSUS2

21

12

.1UF_0402

VCC1.8SUS

VCC1.8SUS

E13

VCC_SUS0

Interface

D11
1SS355

Width=15 mils

C229

L25

1 2

BLM21A601SPT

F14

K12

P10V6V7

VCC_SUS1

VCC_SUS2

VCC_SUS3

VCC_SUS4

VCC_SUS5

USB

Misc

Power

VCC5REF

12

C208
1UF

+V1.8_ICHLAN

+VCC_RTC

F15

F16F7F8

VCC_USB0/VCC_SUS6

VCC_USB1/VCC_SUS7

VCC_AUX0/VCCLAN1_8

VCC_AUX1/VCCLAN1_8

K10

VCC_AUX2/VCCLAN1_8

AB6E6W8

VCC_RTC

VCC5REF1

+5VALW

VCC5REF2

12

R188

+3VALW

VCCREFSUS

C13W5F9

VCC5REFSUS1

VCC5REFSUS2

0_0402

+CPU_CORE
12

R186
0_0805

VCCPAU

F10

VCCPAUX0/VCCLAN3_3

VCCPAUX1/VCCLAN3_3

12

C185
.1UF_0402

+1.8VALW

12

R181
0_0805

VCC1.8SUS

P14

U18

V22

C23

B23E7T21D6T1C2A21

N/C0

N/C1

VCCPCPU0

VCCPCPU1

VCCPCPU2

Power

VCCUSBBG/VCC_SUS8

VCCUSBPLL/VCC_SUS9

N/C2

N/C3

N/C4

A22F6G6H6J6

VSS102

ICH3-M (2/2)

VSS

+RTCVCC+VCC_RTC

R437

C565
.1UF_0402

VCCPPCI5

VCCPPCI6

VCCPPCI7

1 2

1K_0402

Closely Pin AB6

+3VS

H18

P12

V15

V16

V17

V18

VCCP0

VCCP1

VCCPIDE0

VCCPIDE1

VCCPIDE2

VCCPIDE3

+1.8VS

J18

M14

R18

T18

E11K6K18P6P18

VCCPHL0

VCCPHL1

VCCPHL2

VCCPIDE4

VCCPHL3

VCCCORE0

VCCCORE1

VCCCORE2

VCCCORE3

IDE

Interface

V10

V14

IDE_PDCS1#
IDE_PDCS3#

VCCCORE4

VCCCORE5

VCCCORE6

IDE_SDCS1#
IDE_SDCS3#

IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15

IDE_PDDACK#
IDE_SDDACK#

IDE_PDDREQ
IDE_SDDREQ

IDE_PDIOR#

IDE_SDIOR#
IDE_PDIOW#
IDE_SDIOW#

IDE_PIORDY

IDE_SIORDY

IDE_PDA0
IDE_PDA1
IDE_PDA2
IDE_SDA0
IDE_SDA1
IDE_SDA2

IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9

IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9

AC15
AB15
AC21
AC22

AA14
AC14
AA15
AC20
AA19
AB20

W12
AB11
AA10
AC10
W11
Y9
AB9
AA9
AC9
Y10
W9
Y11
AB10
AC11
AA11
AC12

Y17
W17
AC17
AB16
W16
Y14
AA13
W15
W13
Y16
Y15
AC16
AB17
AA17
Y18
AC18

Y13
Y19
AB12
AB18
AC13
AC19
Y12
AA18
AB13
AB19

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

PDCS1# <19>
PDCS3# <19>
SDCS1# <21>
SDCS3# <21>

PDA0 <19>
PDA1 <19>
PDA2 <19>
SDA0 <21>
SDA1 <21>
SDA2 <21>
PDD[0..15] <19>

SDD[0..15] <21>

PDDACK# <19>
SDDACK# <21>
PDDREQ <19>
SDDREQ <21>
PDIOR# <19>
SDIOR# <21>
PDIOW# <19>
SDIOW# <21>
PDIORDY <19>
SDIORDY <21>

12

M10R6T6U6G18

VSS103

VCCPPCI0

VCCPPCI1

VCCPPCI2

VCCPPCI3

VCCPPCI4

BlueTooth disable: Mount R531.

VSS35

VSS36

VSS37

VSS38

VSS39

VSS40

VSS41

VSS42

VSS43

VSS44

VSS45

VSS46

VSS47

VSS48

VSS49

VSS50

VSS51

VSS52

VSS53

VSS54

VSS55

VSS56

VSS57

VSS58

VSS59

VSS60

VSS61

VSS62

VSS63

VSS64

VSS65

VSS66

VSS67

VSS68

VSS69

VSS70

VSS71

VSS72

VSS73

VSS74

VSS75

VSS76

VSS77

VSS78

VSS79

VSS80

VSS81

VSS82

VSS83

VSS84

VSS85

VSS86

VSS87

VSS88

VSS89

VSS90

VSS91

VSS92

VSS93

VSS94

VSS95

VSS96

VSS97

VSS98

VSS99

VSS100

VSS101

ICH3-M

7 7

Note:
R376=22.6_1% for B0(QB63 part)
R376=18.2_1% for B0(QB62 & SL5LF part)

E14

E15

E18

E19

E20

F22G3G20

H19

AA22J5K11

K13

K20

K21

K22

K23L3L10

L11

L12

L13

L14

L21

L23

M11

M12

M13

M20

M22N5N10

N11

N12

N13

N14

N21

N23

P11

P13

P20

P22R3R5

R21

R23T4T20

T22V3AC23

V20W6W7

W10

W14

W18

W22Y8AA3

AA8

AA12

AA16

AA20

AB8

AC1

AC8

+3VS

12

R180

100K_0402

+3VS

8 8

ICH_ACIN

ACIN<30,37,40>

D38 RB751V

A

21

B

C

Disable Timeout feature

R414

1 2

@1K_0402

D

ICH_SPKR

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

E

F

G

H

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

I

17 43, 21, 2002

of

J

0B

A

B

C

D

E

F

G

H

I

J

1 1

+3VS +3VS

RP11

FRAME#<16,24,26,35>

IRDY#<16,24,26,35> SERR# <16,24,26,35>

TRDY#<16,24,26,35>

2 2

3 3

4 4

STOP#<16,24,26,35>

+3VS

PCI_REQA#<16>
PCI_REQB#<16>

REQ#0<16,26>
REQ#1<16,35>

+3VS +3VS

GNT#1<16,35>
GNT#2<16,24>

PIRQD#<16,35>

IRQ14<16,19>

GNT#0<16,26>
GNT#3<16>
GNT#4<16,35>

PM_CLKRUN#<16,24,26,28,30,35>

1
2
3
4
5

10P8R_8.2K

RP10

1
2
3
4
5

10P8R_8.2K

RP9

1
2
3
4
5

10P8R_8.2K

R168 8.2K_0402

1 2

R152 8.2K_0402

1 2

R151 8.2K_0402

1 2

R150 10K_0402

1 2

10
9
8
7
6

+3VS

10
9
8
7
6

10
9
8
7
6

+3VS

DEVSEL# <16,24,26,35>
PERR# <16,24,26,35>
PLOCK# <16,24>

REQ#2 <16,24>
REQ#3 <16>
REQ#4 <16,35>
SIRQ <16,24,27,28,30>

IRQ15 <16,21>
PIRQA# <15,16,24,26>
PIRQB# <16>
PIRQC# <16,35>

+CPU_CORE

12

+

C217
1UF

+3VS

12

+

C529
22UF_10V_1206

+3VS

12

C242
47PF_0402

VCCPSUS

12

C235
.1UF_0402

12

12

+

C523
22UF_10V_1206

C203
.1UF_0402

12

C244
.1UF_0402

12

C243
.1UF_0402

12

C204
.1UF_0402

12

C238
47PF_0402

12

C199
.1UF_0402

12

12

47PF_0402

C239
.1UF_0402

C236

12

12

C216
.1UF_0402

C250
.1UF_0402

12

C240
.1UF_0402

12

C200

47PF_0402

12

C205
.1UF_0402

12

C212
.1UF_0402

12

C251

47PF_0402

12

C213
.1UF_0402

12

C237
.1UF_0402

12

C227
.1UF_0402

+3VALW

R155 4.7K_0402

SMB_DATA<14,16>

SMB_CLK<14,16>

1 2

R156 4.7K_0402

1 2

5 5

+3VALW

R187 8.2K_0402

ICH_SWI#<16,30>

SMB_ALERT#<16>

SMLINK0<16>

6 6

SMLINK1<16>

SM_INTRUDER#<16>

PAR<16,24,26,35>

1 2

R397 10K_0402

1 2

R395 4.7K_0402

1 2

R398 4.7K_0402

1 2

R218 100K_0402

1 2

R170 100

1 2

+3VALW

+RTCVCC

12

+

C218

22UF_10V_1206

+1.8VS

12

+

C513
100UF_D2_6.3V

VCC1.8SUS

12

C228
10UF_6.3V_P

12

C247
.1UF_0402

12

12

.1UF_0402

C210
.1UF_0402

C248

12

C245
.1UF_0402

12

12

C246
.1UF_0402

C214
33PF_0402

12

C211
.1UF_0402

12

C221
.1UF_0402

12

C196
.1UF_0402

12

C194
.1UF_0402

12

C226
.1UF_0402

12

C232
33PF_0402

12

C241
.1UF_0402

12

C249
.1UF_0402

7 7

8 8

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

B

C

D

E

F

G

H

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

I

18 43, 21, 2002

of

J

0B

A

B

C

D

E

F

G

H

I

J

PDD[0..15]<17>

1 1

PCIRST#<5,8,15,16,24,26,28,35>

PIDERST#<17>

PDD[0..15]

PCIRST#

C369

12

.1UF_0402

1
2

+3VS

5

3

U28

4

7SH08FU

HDD Connector

PIDE_RST#

Place closely to

2 2

3 3

JP31

PDIOW# PDIOR#

12

R517
10_0402

12

C675
15PF_0402

PDIORDY<17>

+3VS

12

R518
10_0402

12

C676
15PF_0402

+5VS

R304 4.7K_0402

1 2

1 2

R301 100K_0402

Correct HDD pin define ,pls update layout

PIDE_RST#
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0

+5VS

PDDREQ
PDIOW#
PDIOR#
PDIORDY
PDDACK#
IRQ14

PHDD_LED#

PDDREQ<17>

PDIOW#<17>

PDIOR#<17>

PDDACK#<17>

IRQ14<16,18>

PDA1<17>
PDA0<17>

PDCS1#<17>

JP31

12
34
56
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44

HDD_CONN_44P

PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

PCSEL

R298

1 2

470_0402

PDA2 <17>
PDCS3# <17>

+5VS

+5VS

Placea caps. near HDD CONN.

12

C370
1000PF_0402

PDDREQ

12

C363

10UF_16V_1206

1 2

C374 33PF_0402

12

C373

10UF_16V_1206

12

C371
1UF_25V_0805

12

C375
.1UF_0402

12

C758

4.7UF_10V_0805

+5VALW

12

C759
1UF_25V_0805

12

C760

4.7UF_10V_0805

+5VCD

12

C761
1UF_25V_0805

12

C762

13

@.1UF

Q87

2N7002

EXTID0EXTID1EXTID2DEVICE

+12VALW

2

1

111

12

13

R650
100K

2

Q85

2N7002

CDPLAY#

+5VALW

12

R651
100K

13

Q86

C

DTC124EK

22K

B

E

22K

1 2

2

R684 1K_0402

2 1

Placea caps. near CDROM
CONN.

+5VCD

W=100 mils

12

C283
.1UF_0402

12

C284
.1UF_0402

+5VCD

12

C285
1000PF_0402

12

C281
1000PF_0402

D49

RB751V

12

C586

1UF_25V_0805

12

C578

1UF_25V_0805

CD_PLAY <22,30>

SIDEPWR <16>

CDPLAY# <21>

12

C580
10UF_16V_1206

12

C579
10UF_16V_1206

4 4

CDD[0..15]<21>

5 5

INT_CD_L<22>

CD_AGND<22>

ICH_IDE_SRST#<17>

6 6

R260

1 2

+3VS

CD_SIORDY<21>

+5VCD

7 7

1 2

R257 100K_0402

R446 470_0402

CDD[0..15]

.1UF_0402

PCIRST#

1 2

C587 @47PF_0402

1 2

C588 @47PF_0402

R263 10K_0402

WODJ@4.7K_0402

12

C282

CD-ROM Connector

R627 @0_0402

U71

7SH08FU

1 2

4

CD_DREQ

ACT_LED#

1 2

C585 33PF_0402

ACT_LED# <27>

+3VS

12

U22

5

1
2

3

7SH08FU

CD_IDERST#<21>

12

+5VCD

CD_SIOW#<21>

CD_IRQ<21>
CD_SBA1<21>
CD_SBA0<21>

CD_SCS1#<21>

RDATA#<28>

WP#<28>

TRACK0#<28>

WDATA#<28>

STEP#<28>

MTR0#<28>

DISKCHG#<28>

DRV05V#<15,28>

4

SIDERST#

CD_AGND
CD_IDERST#
CDD7
CDD6
CDD5
CDD4
CDD3
CDD2
CDD1
CDD0

CD_SIORDY

SHDD_LED#
SEC_CSEL

RDATA#
WP#
TRACK0#
WDATA#
STEP#
MTR0#
DISKCHG#
DRV05V#

SIDERST# <21>

JP29

12
34
56
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
57 58
59 60

HEADER 2X30

CD_AGND
CDD8
CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15
CD_DREQ

EXTID0
EXTID1
EXTID2
HDSEL#

PHDD_LED#
SHDD_LED#

1 2

C589 @47PF_0402

WGATE#

FDDIR#

INDEX#

C717

12

.1UF_0402

1
2

+5VCD

+5VS

5

3

INT_CD_R <22>

CD_DREQ <21>
CD_SIOR# <21>
CD_DACK# <21>
CD_SBA2 <21>
CD_SCS3# <21>
EXTID0 <31>
EXTID1 <31>
EXTID2 <31>
HDSEL# <28>

WGATE# <28>

FDDIR# <28>
3MODE# <28>

INDEX# <28>

+5VALW

Extend Module ID list

FDD

CD-ROM

LS-120

2'nd HDD

NONE

U73

8

D

7

D

6

D

5

D

0

00

0

+5VCD

1

S

2

S

3

S

4

G

SI4800

R652

470

00

00

1

11

8 8

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

B

C

D

E

F

G

H

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

I

19 43, 21, 2002

of

J

0B

10

9

8

7

6

5

4

3

2

1

JCLK
JRSTSYNC
JTXD[2]
JTXD[1]
JTXD[0]
JRXD[2]
JRXD[1]
JRXD[0]

ADV10
ISOL_TCK
ISOL_TI
ISOL_TEX
TOUT
TESTEN

EEP_CS<16>

EEP_DIN<16>

12

+3VALW

1 2

L54 LAN@4.7UH

C469
LAN@.1UF_0402

125364027912141719

VCC

VCC

VCCP

VCCP

VCCA

VCCA2

Kinnereth

VSS

VSS

VSS

VSS

8131824483338362022

EEPROM for ICH3-m LAN
(Atmel
AT93C46-10PC-2.7)

1
2
3
4

VCCR_LAN

LAN@.1UF_0402

23

VCCT

VCCT

VCCT

VCCT

VCCR

VCCR

RBIAS100

RBIAS10

ACTLED#
SPDLED#

LILED#

VSS

VSSP

VSSP

VSSA

VSSA2

VSSR

VSSR

U40

CS
SK
DI
DO

LAN@AT93C46-10SC-2.7

VCC

DC
ORG
GND

8
7
6
5

12

TDP
TDN

RDP

RDN

X2
X1

U46LAN@82562ET

1 2

R345 LAN@10K_0402

12

+

C470

10
11

15
16

5
4

32
31
27

47
46

C466
LAN@4.7UF_10V_0805

LAN_TX+
LAN_TX-

LAN_RX+
LAN_RX-

R355 LAN@619_1%_0402

1 2

R356 LAN@549_1%_0402

1 2

LAN_ACTLED#
LAN_LILED#

LAN_X2
LAN_X1

+3VALW

LAN_TX+

LAN_RX+

X3

LAN@25MHZ

12

C501
LAN@22PF_0402

1 2

R354 LAN@100_1%_0402

1 2

R357 LAN@100_1%_0402

12

C502
LAN@22PF_0402

LAN_TX-

LAN_RX-

Layout note :

Cassis LAN_GND
should cover part
of U15.

U39

LAN_RX+
LAN_RX-

LAN_TX+
LAN_TX-

Layout Note:
H0022 Pls closely to
RJ45 Conn.

1

RD+

2

RD-

3

CT

6

CT

7

TD+

8 9

TD- TX-

LAN@Pulse-H0022

16

RX+

15

RX-

14

CT

11

CT

10

TX+

LAN@75_1%

R341

LAN_RJ45R+
LAN_RJ45R-

LAN_RJ45T+
LAN_RJ45T-

12

12

R340
LAN@75_1%

LAN_GND

C436
LAN@1000PF_1206_2KV

1 2

LAN_RJ45R+ <34>
LAN_RJ45R- <34>

LAN_RJ45T+ <34>
LAN_RJ45T- <34>

H H

+

12

LAN@4.7UF_10V_0805

C473

G G

F F

E E

RSMRST#<16,33>

= LAN_RST#

2

G

+3VALW

12

R370
LAN@100K_0402

LAN_TCK
LAN_TI
LAN_EX
LAN_TESTEN

13

D

S

+

12

C508

LAN@4.7UF_10V_0805

LAN_JCLK<16>

LAN_RSTSYNC<16>

LAN_TXD2<16>
LAN_TXD1<16>
LAN_TXD0<16>
LAN_RXD2<16>
LAN_RXD1<16>
LAN_RXD0<16>

1 2

R372 @0_0402

Q48
LAN@2N7002

LAN@.1UF_0402

12

C511

12

@10PF_0402

C505

R371

@33_0402

LAN_JCLK
LAN_RSTSYNC
LAN_TXD2
LAN_TXD1
LAN_TXD0
LAN_RXD2
LAN_RXD1
LAN_RXD0

TP_LAN_ADV
LAN_TCK
LAN_TI
LAN_EX
TP_LAN_TOUT
LAN_TESTEN

LAN@.1UF_0402

12

12

C471

C468

LAN@.1UF_0402

12

39
42
45
44
43
37
35
34

41
30
28
29
26
21

EEP_SHCLK<16>

EEP_DOUT<16>

JP18

12

Amber LED-

11

Amber LED+

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

10

Green LED-

9

Green LED+

LAN@AMP RJ45 with LED

SHLD4
SHLD3

SHLD2
SHLD1

16
15

14
13

10K

B

ORE_LED_1

C

47K

3 1

+3V

E

Q8
LAN@DTA114YKA

D D

LAN_ACTLED#

LED2_YELN<34>

LED2_YELN

R60 LAN@0_0402

R61 LAN@0_0402

ORE_LED_N

2

1 2

R36 LAN@510_0603

12

C60
LAN@47PF_0402

C C

GRN_LED_1 GRN_LED_2

C

LAN_LILED#

LED1_GRNN<34>

LED1_GRNN

R16 LAN@0_0402
R21 LAN@0_0402

GRN_LED_N

B B

10K

2

B

47K

E

Q4
LAN@DTA114YKA

3 1

+3V

1 2

R6 LAN@510_0603

12

C36
LAN@47PF_0402

ORE_LED_2

LAN_RJ45R-

LAN_RJ45R+
LAN_RJ45T­LAN_RJ45T+

LAN@75

R32

12

12

R31
LAN@75

LAN_GND

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

10

9

8

7

6

5

4

3

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

2

20 43, 21, 2002

of

1

0B

+5VCD

CDD[0..15]<19>

SDD[0..15]<17>

C767 DJ@1UF_10V

R663 DJ@100K_0402

D46 DJ@1N4148

12

1 2

21

+12VALW

CDPLAY#<19>

CDD[0..15]

SDD[0..15]

EC_SMD2<5,30,39>

EC_SMC2<5,30,39>

Q90
DJ@2N7002

R665 DJ@100K_0402

CDPLAY#

1 3

2

SDA0<17>
SDA1<17>
SDA2<17>

SDCS1#<17>
SDCS3#<17>

SDIOR#<17>
SDIOW#<17>

SDIORDY<17>

IRQ15<16,18>
SDDREQ<17>
SDDACK#<17>

SIDERST#<19>

1 3

Q89

DJ@2N7002

2

13

Q91

DM_ON

2

DJ@2N7002

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

SDA0
SDA1
SDA2

SDCS1#
SDCS3#

SDIOR#
SDIOW#

SDIORDY

IRQ15
SDDREQ
SDDACK#

SIDERST#

DM_ON
INTN

OSC1
OSC2

U74

76

HDD0

78

HDD1

81

HDD2

83

HDD3

86

HDD4

90

HDD5

95

HDD6

97

HDD7

2

HDD8

4

HDD9

8

HDD10

11

HDD11

15

HDD12

18

HDD13

20

HDD14

22

HDD15

68

HDA0

70

HDA1

66

HDA2

63

HCS0

61

HCS1

99

HDIOR#

6

HDIOW#

72

HIOCS16#

93

HIORDY

74

HINTRQ

12

HDMARQ

88

HDMACK#

24

HRESET#

59

HDASPN

48

HSYNC

53

HBIT_CLK

55

HDATA_OUT

50

HDATA_IN

46

HACRSTN

28

PAV_EN

36

PLAY/PAUSE

35

FFORWARD

34

REWIND

37

STOP/EJECT

29

PCSYSTEM_OFF

25

INTN

30

RESET#

26

SDATA

27

SCLK

31

OSCI

32

OSCO

+5VOZ

9

44

VDD

VDD

GND

GND

GND

GND

1633658592

58

VDD

CIOCS16#

CHINTRQ
CDMARQ

CHDMACK#

CRESET#

CDASPN

SBIT_CLK

SDATA_OUT

SDATA_IN
SACRSTN

PWR_CTL

ISCDROM

GPIO[1]/VOL_UP
GPIO[0]/VOL_DN

PAVMODE

GND

CDD0
CDD1
CDD2
CDD3
CDD4
CDD5
CDD6
CDD7
CDD8

CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15

CDA0
CDA1
CDA2

CCS0
CCS1

CDIOR#

CDIOW#

CIORDY

SSYNC

MODE0
MODE1

CSN

INCN

UDN

DJ@OZ163

77
79
82
84
87
91
96
98
1
3
7
10
14
17
19
21

69
71
67

64
62

100
5
73
94

75
13
89

23
60

47
52
54
49
45

51

80
39

40

56
57

38
41

42
43

CDD0
CDD1
CDD2
CDD3
CDD4
CDD5
CDD6
CDD7
CDD8
CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15

CD_SBA0
CD_SBA1
CD_SBA2

CD_SCS1#
CD_SCS3#

CD_SIOR#
CD_SIOW#
CIOCS16#
CD_SIORDY

CD_IRQ
CD_DREQ
CD_DACK#

CD_IDERST#
CDASPN

1 2

R659

ISCDROM
GPIO_1

GPIO_0

MODE0
MODE1

1 2

R664 DJ@100K_0402

DJ@.1UF_0402

CD_SBA0 <19>
CD_SBA1 <19>
CD_SBA2 <19>

CD_SCS1# <19>
CD_SCS3# <19>

CD_SIOR# <19>
CD_SIOW# <19>

CD_SIORDY <19>

CD_IRQ <19>
CD_DREQ <19>
CD_DACK# <19>

CD_IDERST# <19>

+5VCD

DJ@100K_0402

+5VOZ

C763

DJ@.1UF_0402

C764

CDD0
CDD1
CDD2
CDD3
CDD4
CDD5
CDD6
CDD7

SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

SDA0
SDA1
SDA2
SDCS1#
SDCS3#
SDIOR#
SDIOW#
SDIORDY

IRQ15
SDDREQ
SDDACK#

SIDERST#

+5VCD

C765

DJ@.1UF_0402

RP141WODJ@16P8R_0

8 9
7
6
5
4
3
2
1

8 9
7
6
5
4
3
2
1

RP142WODJ@16P8R_0

1
2
3
4
5
6
7
8 9

1 8
2 7
3 6
4 5

R658
DJ@100K_0402

C766
DJ@.1UF_0402

SDD0
SDD1

10

SDD2

11

SDD3

12

SDD4

13

SDD5

14

SDD6

15

SDD7

16

10
11
12
13
14
15
16

RP145

16
15
14
13
12
11
10

WODJ@16P8R_0

RP147

WODJ@8P4R-0

L87

12

DJ@HB-1M2012-601JT

CDD8
CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15

CD_SBA0
CD_SBA1
CD_SBA2
CD_SCS1#
CD_SCS3#
CD_SIOR#
CD_SIOW#
CD_SIORDY

CD_IRQ
CD_DREQ
CD_DACK#
CD_IDERST#

+5VCD

+5VCD

+5VCD

+5VCD

CIOCS16#
CD_SIORDY

CD_DREQ

ISCDROM
CD_IRQ
CDASPN

CDD0
CDD1
CDD2
CDD3

CDD8
CDD9
CDD10
CDD11

1 2

R655 DJ@47K_0402

1 2

R656 DJ@1K_0402

1 2

R657 DJ@5.6K_0402

RP143

1
2
3
4
5

DJ@10P8R_100K

RP144

1
2
3
4
5

DJ@10P8R_4.7K

RP146

1
2
3
4
5

DJ@10P8R_4.7K

CDD12

1 2

R701

+5VCD

10

MODE0

9

MODE1

8

GPIO_0INTN

7

GPIO_1

6

10

CDD7

9

CDD6

8

CDD5

7

CDD4

6

10

CDD15

9

CDD14

8

CDD13

7
6

DJ@4.7K_0402

+5VCD

+5VCD

+5VCD

+5VCD

X6

OSC1 OSC2

DJ@8MHZ
R666

DJ@1M_0402

C768
DJ@10PF_0402

C769
DJ@10PF_0402

DM_ON

13

CD_PLAY_ON#<30>

SUSP#<29,30,36,42>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

1 2

R685 DJ@0_0402

1 2

R686 @0_0402

2

Q88
DJ@2N7002

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

B

401224

#$% &'

Date: Sheet

21 43, 21, 2002

of

0B

A

1 1

BEEP#<30>

13

12 11

74LVC125

+3VALW

U21D

2 2

U81

1

NC

2

PCM_SPK#<24>

A

3

GND

NC7S14

3 3

DLINE_IN_R<34>

D

LINE_IN_PLUG<23>

2

G

S

4 4

DLINE_IN_L<34>

LINE_IN_L<23>

LINE_IN_L LINEINL_R

5 5

C783

@.1UF_0402

LINE_IN_R

1 2

R466 10K_0402

LINE_IN_R<23>

6 6

MD_SPK<32,35>

MD_MON<35>

7 7

R467 1K_0402

6.8K_0402

R468

6.8K_0402

12

12

CD_AGND<19>

R465

8 8

A

B

12

R449
100K_0402

R318

1 2

10K_0402

.22UF_0603

VCC

Y

13

Q98

2N7002

R503
R504 6.8K_0402

R507
R508 6.8K_0402

R470 20K_0402

R469 33K_0402

12

12

C605

+3VALW

5
4

1 3

1 3

12
12

12
12

12

Q97

2N7002

DGS

2

2

DGS

Q99

2N7002

6.8K_0402

6.8K_0402

12

12

MD_MONR

CD_AGNDR

B

R691

100K_0402

MD_SPKR

INT_CD_L<19>

INT_CD_R<19>

13 12

7 14

ICH_SPKR<17>

LINE_IN_R

12

+12VALW

LINE_IN_L

CLK_14M_AUD<14>

LINEINR_R

AC97_RST#<16,32,35>

IAC_BITCLK<16,32,35>

IAC_SYNC<16,32,35>

IAC_SDATAO<16,32,35>

SDATA_IN0<16>

MICIN<23>

LINEINL_R

LINEINR_R

+3VALW

U12F
74LVC14

MONO_IN

CDL
CDR

C

1 2

1 2

1 2

C626 1UF_10V

1 2

C625 1UF_10V

1 2

C624

1 2

C616 1UF_10V

1 2

C622 1UF_10V

1 2

C617 .1UF_0402

R493
R494 6.8K_0402
R495
R496 6.8K_0402

C

C609

1 2

.1UF_0402

C387

1 2

1UF_0603

C613

1UF_0603

C388

1UF_0603

R492

1 2

@0_0402

C644 15PF_0402

1 2

1UF_10V

12
12

12
12

C648

22PF_0402

12

C620

.1UF_0402

6.8K_0402

6.8K_0402

1 2

1 2

1 2

D

R452

560_0402

R464

560_0402

R454

560_0402

R320

@10K_0402

1M_0402

R475
Y2

24.576MHz
22PF_0402

1 2

R473 22_0402

1 2

R472 22_0402

MD_SPKRC

CD_AGNDRC

CDL

CDR

D

+5VS

12

R319
@100K_0402

12

C649

MD_MONRC
LINEL_IN_C
LINER_IN_C

.1UF_0402

C627

E

VDDA

12

R463
10K_0402

12

R462
10K_0402

R488 0_0402

2

D31
1SS355

2 1

12

3 1

2
3

11

6

10

5
8

12
13
14
15
16
17
18
20
21
22
23
24

Q60
2SC2411EK

XTL-IN
XTL-OUT

RESET#
BIT-CLK
SYNC
SDATA-OUT
SDATA-IN

PC-BEEP
PHONE
AUX-L
AUX-R
VIDEO-L
VIDEO-R
CD-L
CD-R
MIC1
MIC2
LINE-L
LINE-R

+5VALW

12

C607

10UF_16V_1206

MONO_IN_R MONO_IN

12

12

R489

2.4K_0402

1

9

VDD

VDD

CD-GND

VSS

VSS

AVSS

4

7

26

19

F

12

C770
.1UF_0402

Close to AC97 CODEC

C615

1 2

1UF_10_0603

VDDC

12

C634
.1UF_0402

AVDD_AC97

25

38

AVDD

AVDD

AVSS

42

U62

NC

ID0#
ID1#

NC

12

35
36
37

27
28

29
30

31
32
33
34
43
44
45
46
47
48
39
40
41

+

1 2

R471 0_0805

C630

10UF_10V_1206

12

C772

22UF_10V_1206 16V

12

C629
.1UF_0402

LINE-OUTL

LINE-OUTR

MONO-OUT

VREF

VREFOUT

AFILT1
AFILT2

VRAD
VRDA

CAP1

JD/SDIN1

TEST1

EAPD

SPDIFO

HP-OUT-L

HP-OUT-R

ALC202

G

12

C771
1UF_0603

L62

HB-1M2012-121JT

C614
10UF_10V_1206

C647

1000PF_0402

LINEL
LINER
MDMIC

AUD_REF

+AUD_VREF

C637

1000PF_0402

C640

1 2

R670 0_0402

12

R480
@0_0402

U75

2 1

VIN SD

5 3

GND VOUT

LP3964-ADJ

+3VS

12

VDDA

C645
1000PF_0402

1 2

1 2

1000PF_0402

VDDA

12

R476
@0_0402

H

ADJ

10K_1%_0402

4

R669

1 2

R668 30K_1%_0402

12

R480 R476 FREQ. SEL

X

ON

X

C651 4.7UF_10V_0805

1 2

C628

+

1UF_10V

C643

1UF_10V

12

C633

.1UF_0402

+3VALW+5VALW

12

R706

6.8K_0402

12

C773 68PF_0402

12

C775

.1UF_0402

X
X

ON

C646 4.7UF_10V_0805

12

C631
.1UF_0402

C641
1UF_10V

+AUD_VREF

12

VDDA

24.576MHZ

14.318MHZ
48MHZ

1 2

C657 1UF_25V_0805
C653 1000PF_0402

C636

1UF_10V

C635
@10UF_10V_1206

I

1 2
1 2

2

1 3

Q101

2N7002

12

R707

4.7K_0402

L63

1 2

0_0805

L66

1 2

0_0805

L60

1 2

0_0805

L56

1 2

0_0805

L65

1 2

0_0805

J

CD_PLAY <19,30>

LEFT <23>
RIGHT <23>

MD_MIC <32,35>

GNDA

AGNDDGND

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

E

F

G

H

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

I

22 43, 21, 2002

of

J

0B

A

B

C

D

E

F

G

H

I

J

+5V_AMP

1 1

8

RIGHT<22>

2 2

LEFT<22>

RIGHT

LEFT

3 3

EC_MUTEO<31>

R455

1 2

0_0402
R313

1 2

0_0402

+5V_AMP

EC_MUTEO

RIGHT_R

LEFT_R

R312

@100K_0402

HPS

R321 100K_0402

12

1 2

R459

1 2

100K_0402

12

R453
@100K_0402

12

17

15

4

5

R460
100K_0402

RLINEIN

LLINEIN

HPS

MODE

GND1 VDD1

1 3

4 4

+5VALW

LINE_OUT_PLUG

DOCK_OUT_PLUG<34>

5 5

LINE_OUT_PLUG<34>

C618 150UF_63V_D2

+

+

LINEC_OUT_R
LINEC_OUT_L

INTSPK_R+ <34>

INTSPK_L+ <34>

1 2

L58 BLM11A121S

1 2

L59 BLM11A121S

INTSPK_R+

INTSPK_L+

1 2
1 2

C638 150UF_63V_D2

6 6

L33

1 2

BLM21A05_0805

W=40mils

U59

18

13

VDD4

VDD3

VDD2

R_UP/DOWN#

L_UP/DOWN#

GAINSEL

GND4

GND3

GND2

201110

TDA8552TS

R458

1 2

1 2

R457 100K_0402

LINE_OUT_PLUG

LINECL_OUT_R
LINECL_OUT_L

47PF_0402

ROUT+

ROUT-

LOUT+

LOUT-

SVR

C639

12

19

2

9

6

7

14

16

C603

.1UF_0402

100K_0402

12

VDDA

C384
1000PF_0402

SPK_R+

SPK_L+

+5V_AMP

2
1

12

C632

47PF_0402

C389
.1UF_0402

R461

1 2

1K_0402

C604

2.2UF_16V_0805

U35

7SH32FU

3 5

+

C385

4

JP9

5
4
3

6
2
1

C386
100UF_10V_D2

Q102

2N7002

.1UF_0402

HPS

7

LINE OUT

+

C382

13

D

S

8

EC_MUTEO

G

S

S

G

R317
100K_0402

HPS

2

G

2

13

D

D

13

2

Q35
2N7002

Q59
2N7002

10UF_16V_1206

16V

1 2

LINE OUT

SPKF_R+

SPKF_L+

+5V_AMP

S

G

2

D

1 3

2

Q57

G

1 3

D

Q58 2N7002

D

1 3

G

2

Q34

2N7002

R456

1 2

100K_0402

2N7002

S

S

+5VALW

135

+12VALW

INTSPK_R+

INTSPK_R-

INTSPK_L+

INTSPK_L-

U61

24

74AHCT1G125GW

DIS_ADJVOL <30>

ADJVOL_UP/DW# <31>

GAIN_SEL# <16>

INT_MIC<15>

INTMICOFF#<34>

INTSPK_R+
INTSPK_R-

INTSPK_L+
INTSPK_L-

R613 39K

1 2

+5VALW

Layout note:

Trace width=15 mils.

1.SPK_R+,SPK_L+,SPKF_R+,SPKF_L+

2.INTSPK_R+/-,INTSPK_L+/-

3.LINEOUT_L,LINEOUT_R

15 mils trace

12

12

C44

DOCK_MIC

1 2

R614 470K

C43
@220PF_0402

LINE IN

@220PF_0402

INT_MIC

MICOFF#

R692

1 2

12

C42

@220PF_0402

12

C45

Q74
2N7002

S

G

2

+

100K_0402

@220PF_0402

D

13

C733

10UF_16V_1206

16V

JP4

1

1

2

2

R-SPK CONN.

JP1

1

1

2

2

L-SPK CONN

DOCK_MIC <34>

+12VS

7

JP10

5
4
3

6
2
1

LINE IN

C654

H

LINE_IN_PLUG

12

12

C664
47PF_0402

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

I

VDDA

R615
@51K_0402

1 2

1 2

R616
@51K_0402

12

R617

@43K_1%_0603

C

C723

1 2

1UF

B

VDDA

7 7

8 8

MICIN<22>

MICIN DOCK_MIC_R DOCK_MIC

A

Q75

@2SC2411K

12

2

C734

@1UF_10V_0603

3 1

12

R618
1K_0402

MIC_PWR

R699

1K_0402

1 2

R698

1 2

D

0_0402

+AUD_VREF

LINE_IN_R<22>
LINE_IN_L<22>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

E

F

L64 BLM11A121S

L61 BLM11A121S

G

LINE_IN_PLUG<22>

1 2
1 2

LINEL_IN_R
LINEL_IN_L

47PF_0402

8

0B

23 43, 21, 2002

of

J

A

B

C

D

E

S1_VCC

F

G

H

I

J

12

C481

8 8

3V_CB

12

C472

4.7UF_10V_0805

12

C482

.1UF_0402

.1UF_0402

3V_CB

12

C503
.1UF_0402

R_OZ

1 2

R393 0_1206

R_TI/ENE

1 2

R396 @0_1206

3V_CB

3V_CB

12

+3VS

+3V

C504
.1UF_0402

C499
.1UF_0402

Stuff R_OZ for OZ6912.

12

C517
.1UF_0402

12

C524
.1UF_0402

12

C525
.1UF_0402

12

C509
.1UF_0402

12

C496
.1UF_0402

Stuff R_TI/ENE for TI/ENE CB1410.

7 7

VPPD0<25>

VPPD1<25>
VCCD0#<25>
VCCD1#<25>

18

44

71

72

73

74

U47

AD[0..31]<16,26,35>

6 6

5 5

4 4

1 2

+3V

R174 22K_0402

3 3

+3VALW

+3V

PCM_SUSP#<30>

1 2

R261 10K_0402

1 2

R392 10K_0402

CLK_PCI_PCM

2 2

PCM_RI#

D39

RB751V

12

R373
@10_0402

12

C510
@15PF_0402

21

AD[0..31]

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE#0<16,26,35>
C/BE#1<16,26,35>
C/BE#2<16,26,35>
C/BE#3<16,26,35>

PCIRST#<5,8,15,16,19,26,28,35>

FRAME#<16,18,26,35>

IRDY#<16,18,26,35>

TRDY#<16,18,26,35>

DEVSEL#<16,18,26,35>

STOP#<16,18,26,35>
PERR#<16,18,26,35>
SERR#<16,18,26,35>

PAR<16,18,26,35>
REQ#2<16,18>
GNT#2<16,18>

CLK_PCI_PCM<14>

PCM_PME#<31>

AD20

PIRQA#<15,16,18,26>

PCM_RI#<29>

SIRQ<16,18,27,28,30>

PLOCK#<16,18>

PM_CLKRUN#<16,18,26,28,30,35>

G_RST#<25,26,30>

PCIRST#

CLK_PCI_PCM

1 2

R391 0_0402

1 2

R367 100_0402

PCM_RI#

57

AD0

56

AD1

55

AD2

54

AD3

53

AD4

52

AD5

51

AD6

49

AD7

47

AD8

46

AD9

45

AD10

43

AD11

41

AD12

40

AD13

39

AD14

38

AD15

26

AD16

25

AD17

24

AD18

23

AD19

19

AD20

17

AD21

16

AD22

15

AD23

11

AD24

10

AD25

9

AD26

8

AD27

7

AD28

5

AD29

4

AD30

3

AD31

48

C/BE0#

37

C/BE1#

27

C/BE2#

12

C/BE3#

20

PCIRST#

28

PCIFRAME#

29

PCIIRDY#

31

PCITRDY#

32

PCIDEVSEL#

33

PCISTOP#

34

PCIPERR#

35

PCISERR#

36

PCIPAR

1

PCIREQ#

2

PCIGNT#

21

PCIPCLK

59

RI_OUT#/PME#

70

SUSPEND#

13

IDSEL

60

MF0

61

MF1

64

MF2

65

MF3

67

MF4

68

MF5

69

MF6

66

G_RST#

VCCD0#

VCCD1#

VPPD0

VPPD1

GND

GND

6

22

PCI1410

42

90

126

VCCP

VCCP

VCCCB

GND

GND

GND

GND

GND

58

78

94

114

130

VCCCB

GND

138

102

122

VCC

VCC

VCC

RSVD/D14

RSVD/A18

84

100

+3V

14

30

50

86

143

63

VCC

VCC

RSVD/D2

VCCI

VCCP

VCCP

CAD31/D10

CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6

CAD19/A25

CAD18/A7

CAD17/A24

CAD16/A17

CAD15/IOWR#

CAD14/A9

CAD13/IORD#

CAD12/A11

CAD11/OE#

CAD10/CE2#

CAD9/A10
CAD8/D15

CAD7/D7

CAD6/D13

CAD5/D6

CAD4/D12

CAD3/D5

CAD2/D11

CAD1/D4
CAD0/D3

CCBE3#/REG#

CCBE2#/A12

CCBE1#/A8

CCBE0#/CE1#
CRST#/RESET

CFRAME#/A23

CIRDY#/A15

CTRDY#/A22

CDEVSEL#/A21

CSTOP#/A20

CPERR#/A14

CSERR#/WAIT#

CPAR/A13

CREQ#/INPACK#

CGNT#/WE#

CCCLK/A16

CSTSCHNG/BVD1

CCLKRUN#/WP

CBLOCK#/A19

CINT#/READY

SPKROUT

CAUDIO#/BVD2

CCD2#/CD2#
CCD1#/CD1#

CVS2/VS2#
CVS1/VS1#

C522

1 2

.1UF_0402

144
142
141
140
139
129
128
127
124
121
120
118
116
115
113
98
96
97
93
95
92
91
89
87
85
82
83
80
81
77
79
76

125
112
99
88

119
111
110
109
107
105
104
133
101
123
106
108

135
136

103
132
62

134
137

75
117
131

S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3

S1_REG#
S1_A12
S1_A8
S1_CE1#

S1_RST
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A14
S1_WAIT#
S1_A13

S1_INPACK#

S1_WE#

1 2

R362 33_0402

S1_BVD1
S1_WP

S1_A19
S1_RDY#
PCM_SPK#

S1_BVD2
S1_CD2#

S1_CD1#
S1_VS2
S1_VS1

S1_D2
S1_A18
S1_D14

S1_IOWR# <25>
S1_IORD# <25>
S1_OE# <25>

S1_CE2# <25>

S1_REG# <25>

S1_CE1# <25>
S1_RST <25>

S1_WAIT# <25>
S1_INPACK# <25>

S1_WE# <25>

S1_BVD1 <25>
S1_WP <25>

S1_RDY# <25>
PCM_SPK# <22>

S1_BVD2 <25>
S1_CD2# <25>

S1_CD1# <25>
S1_VS2 <25>
S1_VS1 <25>

S1_A[0..25]

S1_D[0..15]

S1_A23
S1_WP

Stuff this resistor

1 2

R412 22K_0402

1 2

R410 @22K_0402

S1_OE#

R206

@47K_0402

S1_A[0..25] <25>

S1_D[0..15] <25>

12

for ENE CB1410 only.

S1_A16

S1_VCC
S1_VCC

S1_VCC

1 1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

B

C

D

E

F

G

H

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

I

24 43, 21, 2002

of

J

0B

A

B

C

D

E

F

G

H

I

J

1 1

+12VALW

U51

C547

.1UF_0402

2 2

3 3

+3VALW +5VALW

12

4 4

C528
10UF_10V_1206

+5VALW

C539
.1UF_0402

+3VALW

C535
.1UF_0402

TPS2211

9

12V

5

5V

6

5V

3

3.3V

4

3.3V

12

C545
10UF_10V_1206

GND

7

S1_VPP

SHDN

16

G_RST#

VCC
VCC
VCC

VPP

VCCD0
VCCD1
VPPD0
VPPD1

OC

12

C153
.01UF_0402

5 5

S1_VCC

13
12
11

10

1
2
15
14

8

G_RST# <24,26,30>

12

C536

4.7UF_10V_0805

S1_VPP

+

C494

4.7UF_10V_0805

C541
.1UF_0402

VCCD0# <24>
VCCD1# <24>
VPPD0 <24>
VPPD1 <24>

S1_VCC

L24

1 2

FBM-11-160808-800LMT

S1_VCCL

12

C498
.1UF_0402

S1_CE1#<24>

S1_OE#<24>

S1_WE#<24>

S1_RDY#<24>

12

C506
10UF_10V_1206

JP21A1

CARDBUS HOUSING

CardBus Socket

S1_A[0..25]<24>

S1_D[0..15]<24>

S1_D3
S1_D4
S1_D5
S1_D6
S1_D7
S1_CE1#
S1_A10
S1_OE#
S1_A11
S1_A9
S1_A8
S1_A13
S1_A14
S1_WE#
S1_RDY#

S1_A16
S1_A15
S1_A12
S1_A7
S1_A6
S1_A5
S1_A4
S1_A3
S1_A2
S1_A1
S1_A0
S1_D0
S1_D1
S1_D2

S1_WP<24>

S1_WP

S1_A[0..25]
S1_D[0..15]

JP21

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

53

55

55

57

57

59

59

61

61

63

63

65

65

67

67

69

GND

71

GND

73

GND

75

GND

77

GND

79

GND

81

GND

83

GND

GND
GND
GND
GND
GND
GND
GND
GND

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

54

56

56

58

58

60

60

62

62

64

64

66

66

68

68

70
72
74
76
78
80
82
84

S1_CD1#
S1_D11
S1_D12
S1_D13
S1_D14
S1_D15
S1_CE2#
S1_VS1
S1_IORD#
S1_IOWR#
S1_A17
S1_A18
S1_A19
S1_A20
S1_A21
S1_VCCL

S1_A22
S1_A23
S1_A24
S1_A25
S1_VS2
S1_RST
S1_WAIT#
S1_INPACK#
S1_REG#
S1_BVD2
S1_BVD1
S1_D8
S1_D9
S1_D10
S1_CD2#

1 2

S1_VPPS1_VPP

12

C91
1000PF_0402

C191

1000PF_0402

S1_CD1# <24>

S1_CE2# <24>
S1_VS1 <24>
S1_IORD# <24>
S1_IOWR# <24>

S1_VS2 <24>
S1_RST <24>
S1_WAIT# <24>
S1_INPACK# <24>
S1_REG# <24>
S1_BVD2 <24>
S1_BVD1 <24>

S1_CD2# <24>

PCMCIA Power Controller

FOXCONN_1CA415M1-TA_68P

6 6

7 7

8 8

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

B

C

D

E

F

G

H

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

I

25 43, 21, 2002

of

J

0B

10

9

8

7

6

5

4

3

2

1

H H

+3VALW

R286

1394@100K_0402

G G

AD[0..31]<16,24,35>

F F

CLK_PCI_1394

12

R270
@10_0402

12

C291
@15PF_0402

E E

C/BE#3<16,24,35>
C/BE#2<16,24,35>
C/BE#1<16,24,35>
C/BE#0<16,24,35>

CLK_PCI_1394<14>

GNT#0<16,18>

AD16

D D

REQ#0<16,18>

FRAME#<16,18,24,35>

IRDY#<16,18,24,35>

TRDY#<16,18,24,35>

DEVSEL#<16,18,24,35>

STOP#<16,18,24,35>
PERR#<16,18,24,35>

PIRQA#<15,16,18,24>

1394_PME#<31>

SERR#<16,18,24,35>

PAR<16,18,24,35>

PM_CLKRUN#<16,18,24,28,30,35>

PCIRST#<5,8,15,16,19,24,28,35>

G_RST#<24,25,30>

C C

CLK_PCI_1394

R275 1394@100_0402

1 2

R287
R288

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

1394@220_0402

12
12

1394@220_0402

U26

22
24
25
26
28
29
31
32
37
38
40
41
42
43
45
46
61
63
65
66
67
69
70
71
74
76
77
79
80
81
82
84
34
47
60
73
16
18
19
36
49
50
52
53
54
56
13
21
57
58
12
85

14
89

90

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
PCI_C/BE3
PCI_C/BE2
PCI_C/BE1
PCI_C/BE0
PCI_CLK
PCI_GNT
PCI_REQ
PCI_IDSEL
PCI_FRAME
PCI_IRDY
PCI_TRDY
PCI_DEVSEL
PCI_STOP
PCI_PERR
PCI_INTA
PCI_PME
PCI_SERR
PCI_PAR
PCI_CLKRUN
PCI_RST

G_RST
GPIO3

GPIO2

9

REG_EN#

REG18

REG18

2035486278

VDDP

VDDP

VDDP

VDDP

VDDP

TSB43AB22

PCI BUS INTERFACE

AGND

AGND

AGND

AGND

AGND

110

111

117

126

127

AGND

AGND

128

8

PLLGND1

109

R285

1394@100K_0402

12

12

87

CYCLEIN

12

R291

1394@100K_0402

101186

96

CNA

TEST17

CYCLEOUT

PHY PORT 2

BIAS CURRENT

OSCILLATOR

FILTER

EEPROM 2 WIRE BUS

POWER CLASS

PHY PORT 1

DGND

DGND

DGND

DGND

DGND

DGND

DGND

DGND

445564

17

233033

DGND

68

75

8393103

R272
1394@100K_0402

12

DVDD
DVDD

TEST16

DVDD
DVDD
DVDD
DVDD
DVDD
DVDD

PLLVDD

AVDD
AVDD
AVDD
AVDD
AVDD

CPS

TPBIAS1

TPA1+

TPA1-

TPB1+

TPB1-

R0

R1

X0

X1

FILTER0
FILTER1

SDA

SCL
PC0

PC1
PC2

TPBIAS0

TPA0+

TPA0-

TPB0 +

TPB0 -

TEST9
TEST8

TEST3
TEST2
TEST1
TEST0

DGND

12

R269
1394@100K_0402

+3VALW

15
27
39
51
59
72
88
100
7
1
2
107
108
120

R283 1394@1K_0402

106

125
124
123

R273 1394@1K_0402

122

R274 1394@1K_0402

121

1 2

118

119
6

5

C295 1394@.1UF_0402

3
4

SDA_1395

92

SCL_1394

91
99

98
97

XTPBIAS0

116

XTPA0+

115

XTPA0-

114

XTPB0+

113

XTPB0-

112

94
95

101
102
104
105

1 2

1394@0_0805

1 2

C298 1394@.1UF_0402

1 2

1 2
1 2

R276

X2

1394@24.576MHz

1 2

L28

VPLL_1394

12

C292
1394@.01UF_0402

1394@6.34K_1%_0402

Near 1394 IC

C293 1394@15PF_0402

1 2

C294 1394@15PF_0402

1 2

R290 1394@220_0402

1 2

R289 1394@220_0402

1 2

12

C288
1394@4.7UF_10V_0805

XTPBIAS0
XTPA0+
XTPA0­XTPB0+
XTPB0-

1394@220PF_0402

R281

1394@56.2_1%

C354

+3VALW

12

R278
1394@56.2_1%

12

12

1394@.1UF_0402

12

C296

1394@.1UF_0402

12

C349

1394@1000PF_0402

12

C359

1394@1000PF_0402

12

C356

1394@.1UF_0402

12

C289

1394@.1UF_0402

12

C350

1394@1000PF_0402

12

C362

12

C302

1394@1000PF_0402

12

R279
1394@56.2_1%

12

R280
1394@56.2_1%

12

R284
1394@5.11K_1%

1394@.1UF_0402

12

C297

1394@.1UF_0402

12

C351

12

C301

1394@.1UF_0402

12

C353

1394@.1UF_0402

12

C360

1394@1000PF_0402

12

C303
1394@1UF_25V_0805

1 2

L69 1394@0_0603

1 2

L70 1394@0_0603

1 2

L71 1394@0_0603

1 2

L72 1394@0_0603

JP30

PA0+_C
PA0-_C
PB0+_C
PB0-_C

1394@1394_CONN 4PIN

5

4

6

3

7

2

8

1

12

C290

1394@.1UF_0402

12

C361
1394@.1UF_0402

B B

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

10

9

8

7

6

5

4

3

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

of

2

26 43, 21, 2002

1

0B

5

D D

C207

.1UF_0402

4

+3VS

WR_PT
SDPWCTL#

12

12

C197

R642 1K_0402

1 2

SDLED

10UF_10V_0805

3

MSLED

MSPWCTL#

R693

1 2

10_0402

2530262728

3436313233

35

SDLED

SDPWCTL#

29

VSS

SCC4

SCC8

MSLED

MS4

MS3

MS2

MS1

MSCLK

MSPWCTL#

MSCLK

MS1
MS2
MS3
MS4

U8

2

1

SD_CLK

LAD[0..3]<16,28,30>

SD_CLK

R136
@10_0402

C C

1 2

C156
@10PF_0402

CLK_PCI_SD

R175
@10_0402

1 2

C181
@15PF_0402

R137 10_0402

1 2

LAD[0..3]

+3VS

SD1
SD2

SD3
SD4
SD5
LAD3
LAD2
LAD1
LAD0

SIRQ<16,18,24,28,30>

CLK_PCI_SD<14>

LFRAME#<16,28,30>

LPC_RST#<28,30>

37
38
39
40
41
42
43
44

46
47
48

CLK_PCI_SD

SDCLK
SD1
SD2
VDD3V
SD3
SD4
SD5
LAD3
LAD2
LAD1
LAD0
SERIRQ

W83L518D (LPC)

SCBCLK

SCBIO

SCBRST#

VSS

SCBC8

SCBC4

PME#

lESET#

LFRAME#

RESERVED

PCICLK

7

5

4453

2

1

SCBPSNT

1110968

12

SCRST#

SCCLK

SCPSNT

SCPWCTL#

SCLED

SCBLED

SCBPWCTL#

W83L518D (LPC)

MS5

XIN

XOUT

SCIO

VDD

24
23
22
21
20
19
18
17
16
15
14
13

MS5
CLK_SD48

MMC_DET#

12

R708

8.2K_0402

C417

@.1UF_0402

CLK_SD48 <14>

12

+5VS

12

C418
@10UF_10V_0805

CLK_SD48

R141
@10_0402

1 2

C161
@10PF_0402

+3VS

R549

12

RP5

8P4R_4.7K_0804

1 8

2 7

3 6

4 5

+3VS

12

Q10
2N7002

+3VS

U7

3

VIN

4

VIN/CE

2

GND

RT9701-CB

VOUT
VOUT

4.7UF_10V_0805

R122

B B

10K_0402

SDPWCTL#

13

D

2

G

S

1
5

SD_3VCC

C148

12

MMC_DET#
SD4

SD3
SD_CLK

SD2

SD1

SD5

R149

10K_0402

10 11

MMC_DET# Wr_Pt_Vss

8

SD4

7

SD3

6

Vss2

5

SDCLK

4

Vdd

3

Vss1

2

SD2

1

SD1

9

SD5

SD_SOCKET

JP6

Vss3
Vss4

Wr_Pt

12
13
14

1M

12

R138

4.7K_0402

WR_PT

10K_0402

MSPWCTL#

R695

2

G

+3VS

12

13

D

S

Q100
2N7002

U80

3

VIN

4

VIN/CE

2

GND

RT9701-CB

1

VOUT

5

VOUT

4.7UF_10V_0805

MS_3VCC+3VS

C781

+3VS

12

R694

4.7K_0402

MS1

MS2

MS3

MS4

12

MS5
MSCLK

12

R696

200K_0402

12

C782

.1UF_0402

JP40

1

GND

2

BS

3

VCC

4

SDIO

5

RSVD

6

INS

7

RSVD

8

SCLK

9

VCC

10

GND

11

GND

12

GND

13

GND

14

GND

HRS_CB1EBB

+5VS

12

+5VS

MSLED
SDLED

A A

R677

100K_0402

5

12

100K_0402

12

R678

U78

2
1

7SH32FU

3 5

R675

10K_0402

13

D

S

Q93
2N7002

2

4

G

ACT_LED#<19>

+5VS

U77

5

1
2

4

3

4

7SH08FU

MEDIA_LED# <15>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

3

2

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

of

1

27 43, 21, 2002

0B

A

B

C

D

E

F

G

H

I

J

1 1

+3VS

SUPER I/O SMsC FDC47N227

68
69
70
71
72
73
74
75

79
78
77
81
80
66
82
83
67

100
99
98
97
96
95
94
92

89
88
87
86
85
84
91
90

63
61
62

16
10
11
12
8
9
5
13
4
15
14
3
1

2
49

LPD[0..7]LAD[0..3]
LPD0

LPD1
LPD2
LPD3
LPD4
LPD5
LPD6
LPD7

LPTBUSY
LPTPE
LPTSLCT
LPTERR#
LPTACK#
LPTINIT#
LPTAFD#
LPTSTB#
LPTSLCTIN#

CTS#2
DSR#2

DCD#2
RI#2

DTRA#
CTSA#
RTSA#
DSRA#
TXDA
RXDA
DCDA#
RIA#

IRMODE
IRRX
IRTXOUT

RDATA#
WDATA#
WGATE#
HDSEL#
FDDIR#
STEP#
DRV05V#
INDEX#
DISKCHG#
WP#
TRACK0#
MTR0#
3MODE#

1 2

R491 @10K_0402

1 2

R135 10K_0402

R415 1K

LAD[0..3]<16,27,30>

2 2

LFRAME#<16,27,30>

LDRQ#1<16>

SUS_STAT#<15,16>
+3VS

SIRQ<16,18,24,27,30>

PM_CLKRUN#<16,18,24,26,30,35>

CLK_PCI_SIO

3 3

CLK_14M_SIO

4 4

R368
@10_0402

1 2

C500
@15PF_0402

1 2

R375
@10_0402

1 2

C514
@15PF_0402

1 2

R374 10K_0402
R388 10K_0402

+3VS

CLK_PCI_SIO<14>

+3VS

R387 100K_0402

1 2
1 2

PID0<15>
PID1<15>
PID2<15>
PID3<15>
PID4<15>

RP84

1 8
2 7
3 6
4 5

8P4R-100K_0804

1 2

LAD0
LAD1
LAD2
LAD3

LPC_RST#

1 2

R369 10K_0603

CLK_PCI_SIO
CLK_14M_SIO
PID0

PID1
PID2
PID3
PID4

PID0
PID1
PID2
PID3

PID4

1 2

R386 10K_0603

5 5

C521

4.7UF_10V_0805

10V

12

C534
.1UF_0402

12

C512
.1UF_0402

12

C518
.1UF_0402

U48

20

LAD0

21

LAD1

22

LAD2

23

LAD3

24

LFRAME#

25

LDRQ#

26

PCIRST#

27

LPCPD#

50

GPIO12/IO_SMI#

17

IO_PME#

30

SIRQ

28

CLKRUN#

29

PCICLK

19

CLK14

48

GPIO10

54

GPIO15

55

GPIO16

56

GPIO17

57

GPIO20

58

GPIO21

59

GPIO22

6

GPIO24

32

GPIO30

33

GPIO31

34

GPIO32

35

GPIO33

36

GPIO34

37

GPIO35

38

GPIO36

39

GPIO37

40

GPIO40

41

GPIO41

42

GPIO42

43

GPIO43

44

GPIO44

45

GPIO45

46

GPIO46

47

GPIO47

51

GPIO13/IRQIN1

52

GPIO14/IRQIN2

64

GPIO23/FDC_PP

18

VTR

53

VCC

65

VCC

93

VCC

7

VSS

31

VSS

60

VSS

76

VSS

SMsC LPC47N227

PD0/INDEX#

PD1/TRK0

PD2/WRTPRT#

PD3/RDATA#

PD4/DSKCHG#

SLCT/WGATE#

ERROR#/HDSEL#

AUTOFD#/DRVDEN0#

STROBE#/DS0#

SLCTIN#/STEP#

IRMODE/IRRX3

GPIO11/SYSOPT

PD5

PD6/MTR0#

PD7

BUSY/MTR1#

PE/WDATA#

ACK#/DS1#

INIT#/DIR#

DTR2#

CTS2#
RTS2#

DSR2#

TXD2
RXD2

DCD2#

RI2#

DTR1#

CTS1#
RTS1#

DSR1#

TXD1
RXD1

DCD1#

RI1#

IRRX2

IRTX2

RDATA#

WDATA#

WGATE#

HDSEL#

DIR#

STEP#

DS0#

INDEX#
DSKCHG#
WRTPRT#

TRK0#

MTR0#

DRVDEN0
DRVDEN1

LPD[0..7] <29,34>

LPTBUSY <29,34>
LPTPE <29,34>
LPTSLCT <29,34>
LPTERR# <29,34>
LPTACK# <29,34>
LPTINIT# <29,34>
LPTAFD# <29,34>
LPTSTB# <29,34>
LPTSLCTIN# <29,34>CLK_14M_SIO<14>

1 2

DTRA# <29>
CTSA# <29>

RTSA# <29>
DSRA# <29>

TXDA <29>
RXDA <29>
DCDA# <29>
RIA# <29>

IRMODE <29>
IRRX <29>
IRTXOUT <29>

RDATA# <19>
WDATA# <19>
WGATE# <19>
HDSEL# <19>
FDDIR# <19>
STEP# <19>
DRV05V# <15,19>
INDEX# <19>
DISKCHG# <19>
WP# <19>
TRACK0# <19>
MTR0# <19>
3MODE# <19>

R405 10K_0402

+3VS

RP91

CTS#2
DSR#2
DCD#2
RI#2

TRACK0#
WP#
INDEX#
DISKCHG#

HDSEL#
WGATE#
WDATA#
FDDIR#

+5VS

12

+5VS

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

RP88

6
7
8
9

10

10P8R_1K

+3VS

8P4R_4.7K_0804

+5VS

RP85

8P4R_1K_0804

5

STEP#

4

MTR0#

3

RDATA#

2

DRV05V#

1

BOARD ID

12

R408
@10K_0402

12

R409
10K_0402

+5VS

12

R407
@10K_0402

12

R402
10K_0402

BD_ID2
SST
PT 0

0
01
0

QT

0

12

R315
@10K_0402

12

R316
10K_0402

BD_ID1

BD_ID2 <31>
BD_ID1 <31>
BD_ID0 <31>

BD_ID0

0

1
1

0

0ST
1

Base I/O Address
0 = 02Eh

6 6

7 7

8 8

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

B

C

D

E

1 = 04Eh*

.1UF_0402
C180

1 2

+3VS

PCIRST#<5,8,15,16,19,24,26,35>

LPCRST

1 2

R299
10K

12

C372
.1UF_0402

U29

5 6

VCC Y1

1

A1

Y2

3

A2

GND

NC7WZ14

LPCRST

4
2

LPC_RST#

Compal Electronics, Inc.

Title

LPC_RST# <27,30>

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom

F

G

H

Date: Sheet

#$% &'

I

28 43, 21, 2002

of

J

0B

A

B

C

D

E

F

G

H

I

J

+5V_PRN

1 1

TP_DATA<30>

TP_CLK<30>

2 2

KSI0 for PLAYBTN
KSI1 for FRDBTN
KSI2 for REVBTN
KSI3 for STOPBTN
KSI4 for VOLUME_UP
KSI5 for VOLUME_DOWN

3 3

Touch Pad & Status LED Conn.

+5VS

12

C583

22PF_0402

12

C584
22PF_0402

DJ_ON BTN.

D47

D_ON/OFF# DJ_ON_LED

3

1
2

DAN202U

+3VS

KSO17<30>

KSI0<15,30,33>
KSI1<15,30,33>
KSI2<15,30,33>
KSI3<15,30,33>
KSI4<15,30,33>
KSI5<30,33>

PMLED_0#<31>
PMLED_1#<31>

BATLED_0#<31>

1 2

R680 100K_0402

D_ON/OFF#
DJ_ON_LED

+5VALW

+3VALW

DJ_ON/OFF# <30>
EC_PWR_ON# <33,37>

FIR Module

10
11
12
13
14
15
16
17
18
19
20

1
2
3
4
5
6
7
8
9

+5VS

JP7

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

ACES_20P

+5VS

12

C779
.1UF_0402

+5VALW

31

E

47K

C

10K

Q94

DTA114YKA

B

2

DJ_ON_LED# <31>

+5V_PRN

SLCTIN#
PRNINIT#
ERR#
AFD/3M#

+5V_PRN

FD0
FD1
FD2
FD3

RP1

1
2
3
4
5

10P8R_2.7K

RP2

1
2
3
4
5

10P8R_2.7K

+5V_PRN

10
9
8
7
6

10
9
8
7
6

FD7
FD6
FD5
FD4

+5V_PRN

ACK#
BUSY
PE
SLCT

12

C39

4.7UF_10V_0805

LPTSLCTIN#<28,34>

AFD/3M#
ERR#
PRNINIT#
SLCTIN#

ACK#
BUSY
PE
SLCT

FD0
FD1
FD2
FD3

FD4
FD5
FD6
FD7

LPD[0..7]

CP10

1 8
2 7
3 6
4 5

8P4C_220PF

CP3

1 8
2 7
3 6
4 5

8P4C_220PF

CP11

1 8
2 7
3 6
4 5

8P4C_220PF

CP12

1 8
2 7
3 6
4 5

8P4C_220PF

LPD[0..7]<28,34>

12

C38
.1UF_0402

LPTSTB#<28,34>

LPTAFD#<28,34>

LPTERR#<28,34>

LPTINIT#<28,34>

LPTACK#<28,34>

LPTBUSY<28,34>

LPTPE<28,34>

LPTSLCT<28,34>

+5VS

LPTSTB#

LPD0
LPD1
LPD2
LPD3
LPD4
LPD5
LPD6
LPD7

EXTFDD must connect
to docking.

L47 68
L46 68
L45 68
L44 68
L43 68
L42 68
L41 68
L40 68

L39 68
L38 68
L37 68
L13 68
L16 68
L15 68
L14 68
L17 68

2 1

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

D7

RB420D

1 2

w=10mils

R4
33_0402

AFD/3M#
FD0
ERR#
FD1
PRNINIT#
FD2
SLCTIN#
FD3

FD4
FD5
FD6
FD7
ACK#
BUSY
PE
SLCT

+5V_PRN

12

w=10mils

R5

2.7K_0402

PWRPRN

1

14

2

15

3

16

4

17

5

18

6

19

7

20

8

21

9
22
10
23
11
24
12
25
13

C18

1 2

47PF_0402

JP15
LPTCN-25-SUYIN

Parallel Port

1
3
5
7

12

R332
FIR@10_1206

T = 40mil

T = 12mil
T = 12mil
T = 12mil

T = 40mil

4 4

FIR@10UF_10V_1206

C402

12

+

C404
FIR@.1UF_0402

12

C403

+

FIR@22UF_10V_1206

U64

2

LED_C

4

RXD

6

VCC

8

GND

FIR@TFDU6101E

LED_A

TXD

SD

MODE

12

R490
FIR@10_1206

IRTXOUT
IRMODE
IRRX

+5VS_IR

+

C400
FIR@10UF_10V_1206

IRTXOUT <28>
IRMODE <28>
IRRX <28>

C670
FIR@.1UF_0402

5 5

+5V

+3V

12

R335
100K_0402

6 6

PCM_RI#<24>

MD_RI#<35>

RING#<30>

7 7

D34

RB751V
D35

RB751V

Q40

2N7002

21

21

13

D

S

RIA0

2

G

12

R334
100K_0402

DTRA#<28>
RTSA#<28>

TXDA<28>

CTSA#<28>

RIA#<28>

RXDA<28>

DCDA#<28>

DSRA#<28>

SUSP#<21,30,36,42>

DTRA#
RTSA#
TXDA
CTSA#
RIA#
RXDA
DCDA#
DSRA#
RIA0

SUSP#

C40

1 2

.1UF_0402
C1

1 2

.1UF_0402

12

28

24

1

2
14
13
12
19
18
17
16
15
20

23
22

C415

.1UF_0402

C1+

C1­C2+

C2­TIN1
TIN2
TIN3
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5
ROUTB2

FORCEON
FORCEOFF#

U4
MAX3243

26

TOUT1
TOUT2
TOUT3

RIN1
RIN2
RIN3
RIN4
RIN5

INVLD#

GND

27

V+

3

V-

9
10
11
4
5
6
7
8

21
25

VCC

Serial Port

.1UF_0402

C416

1 2
1 2

C414

.1UF_0402

DTR1#
RTS1#
TXD1
CTS1#
RI1#
RXD1
DCD1#
DSR1#

DTR1# <34>
RTS1# <34>
TXD1 <34>
CTS1# <34>
RI1# <34>
RXD1 <34>
DCD1# <34>
DSR1# <34>

8 8

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

B

C

D

E

F

G

H

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

I

29 43, 21, 2002

of

J

0B

A

B

C

D

E

136

157

VCC5

VCC4

PORTB

PORTD-1

EC_AVCC

95

166

VCC6

AVCC

AD Input

DA output

PWM
or
PORTA

IOPB7/RING/PFAIL/LRESET2

PORTC

IOPC4/TB1/EXWINT22
IOPC6/TB2/EXWINT23

IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21

IOPD2/EXWINT24/LRESET2

PORTE

IOPE6/LPCPD/EXWIN45

IOPE7/CLKRUN/EXWINT46

IOPH2/A2/BADDR0

PORTH

IOPH3/A3/BADDR1

PORTI

PORTJ-1

PORTD-2

PORTK

PORTL

161

U24

VBAT

AD0
AD1
AD2
AD3

IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7

DP/AD8

DN/AD9

DA0
DA1
DA2
DA3

IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7

IOPB0/URXD

IOPB1/UTXD

IOPB2/USCLK

IOPB3/SCL1

IOPB4/SDA1

IOPC0

IOPC1/SCL2

IOPC2/SDA2

IOPC3/TA1
IOPC5/TA2

IOPC7/CLKOUT

IOPE4/SWIN

IOPE5/EXWINT40

IOPH0/A0/ENV0
IOPH1/A1/ENV1

IOPH4/A4/TRIS

IOPH5/A5/SHBM

IOPH6/A6
IOPH7/A7

IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7

IOPJ0/RD

IOPJ1/WR0

SELIO

IOPD4
IOPD5
IOPD6
IOPD7

IOPK0/A8

IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12

IOPK5/A13/BE0
IOPK6/A14/BE1

IOPK7/A15/CBRD

IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19

IOPL4/WR1

+RTCVCC

C277
1UF_0603

1 2

BATT_TEMPA

81

BATT_TEMPB

82
83

ADI_PR ADI_P

84
87
88
89
90
93
94

99
100
101
102

32
33
36
37
38
39
40
43

KSO16

153

KSO17

154

MAIL_LED#

162

EC_SMC1

163

EC_SMD1

164

LPC_RST#

165
168

EC_SMC2

169

EC_SMD2

170
171

PME_EC#

172
175
176
1

26
29
30

2
44
24
25

124
125
126
127
128
131
132
133

138
139
140
141
144
145
146
147

150
151

152
41

42
54
55

142
135
134
130
129
121
120

113
112
104
103
48

21

D24 RB751V

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

FRD#
FWR#

SELIO#

KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15

KBA16
KBA17
KBA18
KBA19

ADI_P

BATT_TEMPA

BATT_TEMPA <39>
BATT_TEMPB <39>
PROCHOT# <5>

ALI/NIMH# <39>
BLI/NIMH# <39>
M_SEN# <15,31,34>
DJ_ON/OFF# <29>
THERMDA_591 <5>
THERMDC_591 <5>

DAC_BRIG <15>

EN_FAN1 <6>
EN_FAN2 <6>

IREF <38>
INVT_PWM <15>

BEEP# <22>
CD_PLAY <19,22>
ACOFF <38>
VLBA# <16>
EC_ON <33>
LID_OUT# <16>
CONA# <31,34>

KSO16 <15>
KSO17 <29>
MAIL_LED# <15>
EC_SMC1 <15,31,39>
EC_SMD1 <15,31,39>
LPC_RST# <27,28>

PBTN_OUT# <16>
EC_SMC2 <5,21,39>

EC_SMD2 <5,21,39>
FAN_SPEED <6>
PME_EC# <31>

FAN_SPEED2 <6>
WL_ON <32,35>

ACIN <17,37,40>
RING# <29>
SLP_S3# <16>

ON/OFF# <33>
SLP_S5# <16>

PM_CLKRUN# <16,18,24,26,28,35>

ADB[0..7]
KBA[0..19]

FRD# <31>
FWR# <31>

SELIO# <31>

NUMLED# <15>
CAPSLED# <15>
A/B#USE <39>

FSTCHG <39>

C366 @.01UF_0402

1 2

C364 .01UF_0402

1 2

EEROM/BATTERY

THERMAL/DOCKING

EC_THRM#

ECAGND

R51910K_0402

C677

1 2

.22UF_0603

EC_THRM# <16>

ADB[0..7] <31>
KBA[0..19] <31>

C365 .01UF_0402

12

12

BADDR1-0

*

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5

JP27

1
2
3
4
5
6
7
8
9

10

@96212-1011S

BATT_TEMPB

ADI_P <38>

Index
00
01
10
11

2E
4E

(HCFGBAH, HCFGBAL)

IRE
OBD

*

DEV
PROG

SHBM=1: Enable shared memory with host BIOS
TRIS=1: While in IRE and OBD, float all the

I/O Address

(HCFGBAH, HCFGBAL)+1

Reserved

ENV0

ENV1

0

0

1

0
1
1

Data

TRIS

0
0
00
01

2F
4F

signals for clip-on ISE use

+3VALW

(ENV0)
(ENV1)
(BADDR0)
(BADDR1)
(TRIS)
(SHBM)

EC_SMC1
EC_SMD1
EC_SMC2
EC_SMD2

1
2
3
4
5
6
7
8
9
10

EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

KSO16
KSO17
MAIL_LED#

R239 @10K_0402
R267 10K_0402
R254 @10K_0402
R252 10K_0402
R215 @10K_0402
R251 10K_0402

+5VALW

RP30

18
27
36
45

8P4R_10K_0804

+5VALW

+3VALW

+3VALW

1 1

+5VS

TP_CLK PS2_CLK
TP_DATA

2 2

3 3

12

22UF_10V_1206

1 2

BLM11A20

1 2

BLM11A20

GATEA20<16>

KBRST#<16>

RP35

10

9
8
7
6

10P8R_10K

+3VS

1 8
2 7
3 6
4 5

+3VALW

+3VS

10K_0402

VR_ON<36,43>

C368

L31

L29

RP32

8P4R_10K_0804
RP31

8P4R_10K_0804

R401

12

C355
.1UF_0402

C358
.1UF_0402

1 2

ECAGND

1
2
3
4
5

KBRST#
GATEA20
EC_THRM#

FSEL#

18

SELIO#

27

FRD#

36

EC_SMI#

45

12

.1UF_0402

12

C300

EC_RST#<33>

GATEA20

KBRST#

KBD_DATA
KBD_CLK
PS2_DATA

D18

2 1

12

C280
1000PF_0402

12

C357
1000PF_0402

RB751V

2 1

D25
RB751V

2 1

D26

+5VS

RB751V

EC_AVCC

12

C279
10PF_0402

LAD[0..3]<16,27,28>

R249 20M

1 2

32.768KHZ
X1

CD_PLAY_ON#<21>

PCM_SUSP#<24>

EC_RSMRST#<33>

+3VALW

+3VS

KSO[0..15]<33>

12

EC_SMI#<16>

EN_WOL#<35>

G_RST#<24,25,26>

ICH_SWI#<16,18>

SLP_S1#<14,16>

SYSON<36>

SUSP#<21,29,36,42>

TRICKLE<39>

ENABLT<15>
BKOFF#<15>

FSEL#<31>

1 2

SIRQ<16,18,24,27,28>

LFRAME#<16,27,28>

LAD[0..3]

CLK_PCI_LPC<14>

KSI[0..7]<15,29,33>

CLK_PCI_LPC

12

R277
@10_0402

12

C348
@15PF_0402

KBD_CLK<34>

KBD_DATA<34>

PS2_CLK<34>

PS2_DATA<34>

TP_CLK<29>
TP_DATA<29>
LID_SW#<15,31>

DIS_ADJVOL<23>

R250

12

120K_0402

C278
10PF_0402

R268 0_0402

22UF_10V_1206

EC_SCI#<16>

KSI[0..7]
KSO[0..15]

EC_SMI#

MMO_ON

FSEL#

12

C299

LAD0
LAD1
LAD2
LAD3

CLK_PCI_LPC

EC_SCI#

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

KBD_CLK
KBD_DATA
PS2_CLK
PS2_DATA
TP_CLK
TP_DATA
LID_SW#

CRY1
CRY2

EC_3VDD

12

C304
.1UF_0402

7

SERIRQ

8

LDRQ

9

LFRAME

15

LAD0

14

LAD1

13

LAD2

10

LAD3

18

LCLK

19

LREST1

22

SMI

23

PWUREQ

31

IOPD3/ECSCI

5

GA20/IOPB5

6

KBRST/IOPB6

KSI0

71

KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

KBSIN0

72

KBSIN1

73

KBSIN2

74

KBSIN3

77

KBSIN4

78

KBSIN5

79

KBSIN6

80

KBSIN7

49

KBSOUT0

50

KBSOUT1

51

KBSOUT2

52

KBSOUT3

53

KBSOUT4

56

KBSOUT5

57

KBSOUT6

58

KBSOUT7

59

KBSOUT8

60

KBSOUT9

61

KBSOUT10

64

KBSOUT11

65

KBSOUT12

66

KBSOUT13

67

KBSOUT14

68

KBSOUT15

105

TINT

106

TCK

107

TDO

108

TDI

109

TMS

110

PSCLK1/IOPF0

111

PSDAT1/IOPF1

114

PSCLK2/IOPF2

115

PSDAT2/IOPF3

116

PSCLK3/IOPF4

117

PSDAT3/IOPF5

118

PSCLK4/IOPF6

119

PSDAT4/IOPF7

158

32KX1/32KCLKOUT

160

32KX2

62

IOPJ2/BST0

63

IOPJ3/BST1

69

IOPJ4/BST2

70

IOPJ5/PFS

75

IOPJ6/PLI

76 143

IOPJ7/BRKL_RSTO

148

IOPM0/D8

149

IOPM1/D9

155

IOPM2/D10

156

IOPM3/D11

3

IOPM4/D12

4

IOPM5/D13

27

IOPM6/D14

28

IOPM7/D15

173

SEL0

174

SEL1

47

CLK

16

VDD

Host interface

Key matrix scan

JTAG debug port

PS2 interface

PORTM

3445123

VCC1

VCC2

PORTJ-2

VCC3

167

AGND

NC2

NC3

NC4

NC5

NC6

NC7

NC8

NC9

NC10

Compal Electronics, Inc.

Title

96

NC1

11

ECAGND

122021858691929798

GND6

GND7

137

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom

C

D

Date: Sheet

#$% &'

of

E

30 43, 21, 2002

0B

GND1

GND2

GND3

GND4

4 4

A

B

PC87591VPC

GND5

173546

122

159

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

B

C

D

E

INPUT

+3VALW

2 18

1A1 1Y1

4 16

1A2 1Y2

6 14

1A3 1Y3

8 12

1A4 1Y4

11 9

2A1 2Y1

13 7

2A2 2Y2

15 5

2A3 2Y3

17 3

2A4 2Y4

1

1G

19

2G

+3VALW

2 18

1A1 1Y1

4 16

1A2 1Y2

6 14

1A3 1Y3

8 12

1A4 1Y4

11 9

2A1 2Y1

13 7

2A2 2Y2

15 5

2A3 2Y3

17 3

2A4 2Y4

1

1G

19

2G

20

20

VCC

10

VCC

10

1 2

U56

GND

74LVC244

1 2

U33

GND

74LVC244

C601

.1UF_0402

C377

.1UF_0402

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5BT/WL_ON/OFF#
ADB6

OUTPUT

TPAD_ON/OFF#
EXTID0
EXTID1
EXTID2

CONA#<30,34>

LID_SW#<15,30>

CONA#
BT_PRES#

BT/WL_ON/OFF#

1394_PME#

MDM_PME#
LAN_PME#

M_SEN#<15,30,34>

RP133

1 8
2 7
3 6
4 5

8P4R_100K_0804

RP80

1 8
2 7
3 6
4 5

8P4R-100K

RP81

1 8
2 7
3 6
4 5

8P4R_100K_0804

M_SEN#

+3VALW

+3VALW

+3VS

R509

1 2

10K_0402

KBA2
SELIO#

KBA4
SELIO#

C379

1 2

.1UF_0402

+3VALW

C381

1 2

.1UF_0402

+3VALW

147

1
2

+3VALW

147

9

10

U17A

74LVC32

R450

1 2

U17C

74LVC32

3

20K_0402

8

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

LARST#

C602

1 2

1UF_0603

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

LARST#

+5VALW

C599

1 2

.1UF_0402

20

3
4 5
7 6

8 9
13 12
14 15
17 16
18 19

11

1

3

4 5

7 6

8 9
13 12
14 15
17 16
18 19

11

1

Q0

D0

VCC

D1 Q1
D2 Q2
D3 Q3
D4 Q4
D5 Q5
D6 Q6
D7 Q7

CLK
CLR

10

+5VALW

20

Q0

D0

VCC

D1 Q1
D2 Q2
D3 Q3
D4 Q4
D5 Q5
D6 Q6
D7 Q7

CLK
CLR

10

U58

GND

74HCT273

C378

1 2

U31

GND

74HCT273

2

.1UF_0402

2

ADJVOL_UP/DW# <23>
BT_RST# <32,35>
BT_DETACH <32,35>
BT_ON# <32,35>
PMLED_0# <29>
PMLED_1# <29>
BATLED_0# <29>
DJ_ON_LED# <29>

EC_WAKEUP# <16>
EC_GRST <33>
EC_MUTEO <23>
EC_CPUVID0 <7>
EC_CPUVID1 <7>
EC_CPUVID2 <7>
EC_CPUVID3 <7>
EC_CPUVID4 <7>

CPU_ECVID0<7>
CPU_ECVID1<7>
CPU_ECVID2<7>
CPU_ECVID3<7>
CPU_ECVID4<7>

NB/DT#_CPU<7,43>

BT/WL_ON/OFF#<32>

BT_WAKE_UP<32,35>

ADB[0..7]
KBA[0..19]

EXTID0<19>
EXTID1<19>
EXTID2<19>

KBA1
SELIO#

BD_ID0<28>
BD_ID1<28>
BD_ID2<28>

BT_PRES#<32,35>

KBA3
SELIO#

+3VALW

147

4
5

EXTID0
EXTID1
EXTID2

U17B
74LVC32

6

TPAD_ON/OFF#
BT_PRES#

BT_WAKE_UP ADB7

1 2

R311 100K_0402

+3VALW

U17D

147

74LVC32

12
13

11

ADB[0..7]<30>

KBA[0..19]<30>

1 1

SELIO#<30>

2 2

3 3

VCC_FLASH

12

OE#

A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0

+5VS

R238

100K_0402

1 3

32
31
30
29
28
27
26
25
24
23
22
21
20

A0

19

A1

18

A2

17

A3

12

R431

100K_0402

2

G

Q52

2N7002

D

S

FRD#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3

ADB2
ADB1
ADB0
KBA0
KBA1
KBA2
KBA3

EC_FLASH# <17>

FWR# <30>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

PCM_PME#<24>

1394_PME#<26>

MDM_PME#<35>

LAN_PME#<35>

ICH_WAKE_UP#<16>

C

U18

KBA18
KBA16
KBA15 KBA17
KBA12 KBA14
KBA7 KBA13
KBA6 KBA8
KBA5 KBA9
KBA4 KBA11
KBA3 FRD#
KBA2 KBA10
KBA1 FSEL#
KBA0
ADB0 ADB6
ADB1
ADB2 ADB4

KBA9
KBA8

4 4

KBA13
KBA14
KBA17
FWE#

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4

1

NC

2

A16

3

A15

4

A12

5

A7

6

A6

7

A5

8

A4

9

A3

10

A2

11

A1

12

A0

13

DQ0

14

DQ1

15

DQ2

16

VSS

@29F040/SST39VF040_PLCC

U20

1

A11

2

A9

3

A8

4

A13

5

A14

6

A17

7

WE#

8

VCC

9

A18

10

A16

11

A15

12

A12

13

A7

14

A6

15

A5

16

A4

SST39VF040_TSOP

A

32

VCC

WE*

A17
A14
A13

A11
OE*
A10

CE*
DQ7
DQ6
DQ5
DQ4
DQ3

OE#

A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0

A8
A9

A0
A1
A2
A3

FWE#

31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

ADB7
ADB5
ADB3

FRD#KBA11
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3

ADB2
ADB1
ADB0
KBA0
KBA1
KBA2
KBA3

4.7UF_10V_0805

TSOP 8x14 TSOP 8x20

12

+

C563

FRD# <30>
FSEL# <30>

R435 0_0402
C564
.1UF_0402

1 2

1 2

FWE#

VCC_FLASHVCC_FLASH

+3VALW

C220

1 2

.1UF_0402

4

7SH32FU

KBA11
KBA9
KBA8
KBA13
KBA14
KBA17
FWE#

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4

B

+3VALW

3 5

U19

1

A11

2

A9

3

A8

4

A13

5

A14

6

A17

7

WE#

8

VCC

9

A18

10

A16

11

A15

12

A12

13

A7

14

A6

15

A5

16

A4

@29F040_TSOP

+3VALW

U15

2
1

R688

10K_0402

1394_PME#

MDM_PME#

LAN_PME#

+3V +3V

1 2

3 1

RB751V
D21

RB751V
D22

RB751V
D48

@RB751V

12

2

D20

R689

22K_0402

Q96

3904

21

21

21

21

+3VALW

12

R240
100K_0402

PME_EC#

D

PME_EC# <30>

+3VALW +3VALW

12

C265

.1UF_0402

EC_SMC1<15,30,39>
EC_SMD1<15,30,39>

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

12

R237
100K_0402

U16

8

VCC

7

WC

6

SCL

5

SDA

NM24C16-27

GND

E

A0
A1
A2

12

R430
100K_0402

1
2
3
4

12

R426
100K_0402

of

31 43, 21, 2002

0B

10

9

8

7

6

5

4

3

2

1

MDC Note

H H

G G

Pin 1 is NC for Pctel and connexant MDC modem
Pin 2 is NC for Pctel and connexant MDC modem

+3VMDC

1 2

+3V

R487 MDC@0_0805

+3VALW

1 2

R486 @0_0805

MDC@4.7UF_10V_0805

C668

12

C667
MDC@.1UF_0402

1 2

12

C665

MDC@1000PF_0402

12

C666
MDC@.1UF_0402

MD_MIC<22,35>

+3VMDC

IAC_SDATAO<16,22,35>

AC97_RST#<16,22,35>

+3V

F F

+3VALW +5VALW

Bluetooth Connector

BT_DETACH<31,35>

L26 BT@FBM-11-160808-121

USBP3+<17,35>

USBP3-<17,35>

1 2
1 2

L27 BT@FBM-11-160808-121

E E

BT_WAKE_UP<31,35>

BT_RST#<31,35>

BT@.1UF_0402

BT_WAKE_UP

C444

12

JP26

12
34
56
78
910

12

11

14

13
15 16
171918

20

BT@AXK5S20035

BT_ON#

12

C233
BT@.1UF_0402

BT_ON# <31,35>
BT_PRES# <31,35>

MDC Conn.

JP11

1

MONO_OUT/PC_BEEP

3

AGND

5

AUXA_RIGHT

7

AUXA_LEFT

9

CD_GND

11

CD_RIGHT

13

CD_LEFT

15

GND

17

3.3Vaux

19

GND

21

3.3Vmain

23

AC97_SDATA_OUT

25

AC97_RESET#

27

GND

29

AC97_MSTRCLK

MDC@AMP 3-1473290-0

12

C392
@1000PF_0402

12

C393
@.1UF_0402

AUDIO_PWDN

MONO_PHONE

RESERVED

GND

RESERVED
RESERVED
RESERVED
RESERVED
RESERVED

AC97_SYNC
AC97_SDATA_IN1
AC97_SDATA_IN0

GND

AC97_BITCLK

BlueTooth Interface

C596

1 2

BT@.1UF_0402

SW2

21
43

BT@HCH_PTS-05

+5VMDC

2
4
6
8
10

+5V

12
14
16
18
20
22
24
26
28
30

BT/WL_ON/OFF#

1 2

R329 @0_0805

MD_SPK <22,35>

1 2

R326 MDC@10K_0402

R328

12

MDC@22_0402
R327

12

@22_0402

1 2

BT/WL_ON/OFF# <31>

+5V

R325
10_0402

C391
22PF_0402

+3VS

R532

100K_0402

1 2

+3V

IAC_SYNC <16,22,35>
SDATA_IN1 <16,35>

IAC_BITCLK <16,22,35>

+5VALW

MDC_DET# <17>

GREEN

D28

2 1

BT@12-215 SYGC

D45

2 1

WL@12-215 UYOC

ORANGE

0: Have primary CODEC on mother board

2

B

10K

47K

E

R633

12

WL@330_0402

BLUE TOOTH

WIRELESS LAN

3 1

Q76
BT@DTA114YKA

1
2 4

BT_ON#

C

D

1 3

JP34

1243

RJ11 CONN.

R632

BT@330_0402

Q77
WL@2N7002

S

G

2

3

12

WL_ON <30,35>

D D

USB_VCCC

W=40mils

USBP2-<17>

USBP2+<17>

C C

B B

USB CONNECTOR 3

C748

.1UF_0402

USBP2+

12

+

C747

100UF_16V_D2

L85

FBM-11-160808-121

1 2
1 2

FBM-11-160808-121

L86

12

C749
1000PF_0402

USB2D-USBP2­USB2D+

JP39

1
2
3
4

USB3_CONN

U67

1

GND

+5V USB_VCCA

12

C777
.1UF_0402

+5V

12

C776
.1uF_0402

2

IN

3

EN1#

4 5

EN2# OC2#

TPS2042

U76

1

GND

2

IN

3

IN

4 5

EN# OC#

TPS2041

OC1#
OUT1
OUT2

OUT
OUT
OUT

8
7
6

8
7
6

OVCUR#0

OVCUR#1

USB_VCCB

USB_VCCC

Close to USB Port

OVCUR#0 <17>

OVCUR#1 <17>

OVCUR#2 <17>

USB_VCCA

USB_VCCB

W=40mils

USBP0-<17>
USBP0+<17>

W=40mils

USBP1-<17>

USBP1+<17>

USB CONNECTOR 1

C394

.1UF_0402

USBP0­USBP0+

12

+

C396

100UF_16V_D2

L35

FBM-11-160808-121

1 2
1 2

FBM-11-160808-121

L34

12

C395
1000PF_0402

USB0D­USB0D+

USB CONNECTOR 2

C672

.1UF_0402

USBP1­USBP1+

12

+

C671

100UF_16V_D2

L67

FBM-11-160808-121

1 2
1 2

FBM-11-160808-121

L68

12

C673
1000PF_0402

USB1D­USB1D+

JP12

1
2
3
4

USB1_CONN

JP32

1
2
3
4

USB2_CONN

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

10

9

8

7

6

5

4

3

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

2

32 43, 21, 2002

of

1

0B

A

B

C

D

E

F

G

H

I

J

Power ON Circu it

+3VALW +3VALW

1 1

147

R271

12

R184

12

+3VALW

1

147

2 3

74LVC125

VR_ON#<36>

12

C188
.1UF_0402

U21A

ITP_DBR#<5>

200K_0402

330K_0402

2 2

+3V

12

R440

10K_0402

R700 10K_0402

1 2

12

C784

3 3

1000PF_0402

VGATE <43>

4 4

U12A
74LVC14

1 2

R182 M@20K_0402

1 2

13

D

2

G

S

R451

+3VS

@240_0402

ITP_PWROK

RSM_RST# RSMRST#EC_RST#

Q20

@2N7002

C186
M@1UF_0805_X7R

1 2

1
2

U12B
74LVC14

3 4

7 14

+3VALW +3VALW

5 6

U12C
74LVC14

7 14

+3VS

C610 @.01UF_0402

1 2

53

U14

4

@7SH08

R196

1 2

0_0402

9 8

7 14

12

R418
@10K_0402

1 2

12

R203
@100K_0402

U12D
74LVC14

R241

@0_0402

ITP_PWROK

PM_PWROK

EC_RSMRST# <30>

RSMRST# <16,20>

DT : REMOVE

PM_PWROK <16>

SW3

1 2
3 4

RESET BTN

EC_GRST<31>

Power BTN

D9

R51
100K_0402

1 2

R52
0_0402

3

DAN202U

DTC124EK

ON/OFFBTN#<15>

+3VALW

12

EC_ON<30>

EC_ON

Reset Butto n

+3VALW

12

1
2

C

22K

2

B

22K

Q7

+3VALW

R447
10K_0402

2
1

R253

1 2

10K_0402

1 2

R47 100K_0402

13

12

C68
1000PF_0402

E

C286 .01UF_0402

1 2

U23

4

7SH32FU

3 5

+3VALW

ON/OFF#

D8

12

RLZ20A

WHEN R=0,Vbe=1.35V
WHEN R=33K,Vbe=0.8V

EC_RST#

ON/OFF# <30>

EC_PWR_ON# <29,37>

EC_RST# <30>

R422 M@0_0402

R438

4

5 5

R244 100K_0402

1 2

U21B

5 6

74LVC125

C287
100PF_0402

1 2

R439 0_0402

2

3 1

+3V

1 2
1 2

R255 10K_0402

Q31
3904

6 6

RSM_RST#

+3VALW

+5V +3V

12

R419

12

+5VS

R442
DT@240K_0402

DT@47K_0402

C533
DT@.1UF_0402

1 2

DT@100K_0402

R416

7 7

1 2

DT@330K_0402

8 8

A

C590

12

DT@.01UF_0402

11 10

DT@.01UF_0402

12

R445

B

7 14

U12E
74LVC14

12

C569

2
1

12

C567

DT@.1UF_0402

U13

3 5

DT@7SH32FU

5
3

C183

1 2

DT@.1UF_0402

4

MR#
PFI

C

10K_0402

+3VS

+3VS

12

VCCGND

12

C201

1 2

DT@.1UF_0402
U53

6

RST#

4

PFO#

DT@MAX6342

ICH_VGATE <16>

CK408_PWRGD# <14>

10

U21C

9 8

74LVC125

D

R213 DT@0_0402

1 2

12

R212
DT@10K_0402

INT_KBD CONN.

KSI[0..7]

KSO[0..15]

KSI1

DT : INSTALL

PM_PWROK

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

E

F

G

KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15

JP5

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

INT_KB_CONN.

H

CP6

1 8
2 7
3 6
4 5

8P4C_100PF

CP7

1 8
2 7
3 6
4 5

8P4C_100PF

CP4

1 8
2 7
3 6
4 5

8P4C_100PF

CP5

1 8
2 7
3 6
4 5

8P4C_100PF

CP8

1 8
2 7
3 6
4 5

8P4C_100PF

CP9

1 8
2 7
3 6
4 5

8P4C_100PF

KSI[0..7] <15,29,30>
KSO[0..15] <30>

Compal Electronics, Inc.

Title

KSI3
KSO5
KSO1
KSI0

KSO2
KSO4
KSO7
KSO8

KSI1
KSI7
KSI6
KSO9

KSI4
KSI5
KSO0
KSI2

KSO6
KSO3
KSO12
KSO13

KSO14
KSO11
KSO10
KSO15

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

I

33 43, 21, 2002

of

J

0B

DOCKING 204 PIN

JP37

100

KBD_CLK<30>

KBD_DATA<30>

PS2_CLK<30>

Q78 2N7002

DQLINE_OUT_R DLINE_OUT_R

13

D

S

1 3

DGS

2

2

DGS

1 3

Q80 2N7002

DOCK_MIC_PLUG

2

G

R635

100K_0402

DQLINE_OUT_L

INTSPK_R+<23>

LINE_OUT_PLUG#

13

D

LINE_OUT_PLUG<23>

INTSPK_L+<23>

INTMICOFF#<23>

2

Q79

G

S

2N7002

Q81

2N7002

C736 150UF_63V_D2

+

1 2

12

+12VALW

+

1 2

C740 150UF_63V_D2

12

R640
1M_0402

DLINE_OUT_L

+3VALW
+3VALW

1 2

R638 330_0402

1 2

R641 220_0402

+5VS

GNDA

SPRUSB_VCCB

PS2_DATA<30>

DSR1#<29>

RTS1#<29>
CTS1#<29>

RI1#<29>

LPTSTB#<28,29>

LPD0<28,29>
LPD1<28,29>

LPD2<28,29>
LPD3<28,29>
LPD4<28,29>

LPD5<28,29> LPTPE <28,29>
LPD6<28,29>
LPD7<28,29>

DOCK_OUT_PLUG<23>

DLINE_IN_L<22>

DLINE_IN_R<22>

USBP5-<17>

USBP5+<17>

CRT_VSYNCRFL<15>

DOCK_DDCCL<15>
DOCK_DDCDA<15>

M_SEN#<15,30,31>

TV_LUMA<15>

LED1_GRNN<20>

LED2_YELN<20>

99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56

50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6

DLINE_OUT_L
DLINE_OUT_R

DOCK_MIC_PLUG

CONA# <30,31>
DCD1# <29>
RXD1 <29>
TXD1 <29>
DTR1# <29>
LPTAFD# <28,29>
LPTERR# <28,29>
LPTINIT# <28,29>
LPTSLCTIN# <28,29>

LPTACK# <28,29>
LPTBUSY <28,29>
LPTSLCT <28,29>

DOCK_MIC <23>
USBP4- <17>
USBP4+ <17>

CRT_HSYNCRFL <15>
CRT_B <15>

CRT_G <15>
CRT_R <15>
TV_CRMA <15>
LAN_RJ45R+ <20>
LAN_RJ45R- <20>
LAN_RJ45T+ <20>
LAN_RJ45T- <20>

DOCKVIN

GNDA

SPRUSB_VCCA

+5V

12

C780
.1UF_0402

SPRUSB_VCCA

.1UF_0402

SPRUSB_VCCB

.1UF_0402

12

12

+

C735

100UF_16V_D2

+

C741

100UF_16V_D2

OC1#
OUT1
OUT2

C737

C742

U79

1

GND

2

IN

3

EN1#

4 5

EN2# OC2#

TPS2042

12

C738
1000PF_0402

12

C743
1000PF_0402

8
7
6

OVCUR#4 <17>
SPRUSB_VCCA
SPRUSB_VCCB

OVCUR#5 <17>

.1UF_0402

C29

+5VS

DKMOD_TIP

FBM-L18-453215-900LMA 90T_1812

12

12

C31
.1UF_0402

12

C409
1000PF_0402

L36

12

52 2

101

SPR

DOCKVINVIN

12

C408
1000PF_0402

DKMOD_RING

DKMOD_TIP
DKMOD_RING

220PF_3KV_1808

JP38

1
2

12

C745

12

HEADER 2

C746

220PF_3KV_1808

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom

#$% &'

Date: Sheet

of

34 43, 21, 2002

0B

A

B

C

D

E

F

G

H

I

J

1 1

Or use SI2305DS.

+3VALW +3VAUX

12

C275

1UF_0603

2 2

+3VALW +5VALW

Q28
SI2301DS

S

G

2

D

13

12

C274
1UF_0603

12

C711

.1UF_0402

3 3

+3VS

4 4

R425

0_1206

C548

1000PF_0402

+3VS_MINI_L

12

12

CLK_PCI_MIN

12

R428
@10_0402

12

C550
@15PF_0402

5 5

IAC_BITCLK

12

6 6

R432
@10_0402

12

C552
@15PF_0402

12

C712

12

C551
100PF_0402

.1UF_0402

TIP RING

+3VALW
+5VALW

BT_PRES#<31,32>

BT_ON#<31,32>
WL_ON<30,32>

BT_DETACH<31,32>

PIRQD#<16,18>

REQ#4<16,18> GNT#4 <16,18>

CLK_PCI_MIN<14>

REQ#1<16,18>

AD31<16,24,26>
AD29<16,24,26>

AD27<16,24,26>
AD25<16,24,26>

IDSEL : AD22

C/BE#3<16,24,26>

AD23<16,24,26>
AD21<16,24,26>

AD19<16,24,26>
AD17<16,24,26>

C/BE#2<16,24,26>

IRDY#<16,18,24,26>

PM_CLKRUN#<16,18,24,26,28,30>

SERR#<16,18,24,26>

PERR#<16,18,24,26>

C/BE#1<16,24,26>

AD14<16,24,26>
AD12<16,24,26>

AD10<16,24,26>

AD8<16,24,26>
AD7<16,24,26>

AD5<16,24,26>
AD3<16,24,26>

+5VS

AD1<16,24,26>

IAC_SYNC<16,22,32>

IAC_BITCLK<16,22,32>

MD_MON<22>

MD_MIC<22,32>

MD_RI#<29>

+5VS

W=40mils

CLK_PCI_MIN
REQ#1 GNT#1

AD22

W=30mils

IAC_BITCLK
MD_MON

BT_ON#
WL_ON

1 2

R427 0_0402

1 2

R429 100_0402

W=30mils W=40mils

JP24

KEY KEY

3 4

34

5 6

56

7 8

78

9 10

910

11 12

11 12

13 14

13 14

15 16

15 16

17 18

17 18

19 20

19 20

21 22

21 22

23 24

23 24

25 26

25 26

27 28

27 28

29 30

29 30

31 32

31 32

33 34

33 34

35 36

35 36

37 38

37 38

39 40

39 40

41 42

41 42

43 44

43 44

45 46

45 46

47 48

47 48

49 50

49 50

51 52

51 52

53 54

53 54

55 56

55 56

57 58

57 58

59 60

59 60

61 62

61 62

63 64

63 64

65 66

65 66

67 68

67 68

69 70

69 70

71 72

71 72

73 74

73 74

75 76

75 76

77 78

77 78

79 80

79 80

81 82

81 82

83 84

83 84

85 86

85 86

87 88

87 88

89 90

89 90

91 92

91 92

93 94

93 94

95 96

95 96

97 98

97 98

99 100

99 100

101 102

101 102

103 104

103 104

105 106

105 106

107 108

107 108

109 110

109 110

111 112

111 112

113 114

113 114

115 116

115 116

117 118

117 118

119 120

119 120

121 122

121 122

123 124

123 124

127 128

127 128

Mini-PCI SLOT

W=30mils

1 2

R231 0_0402

W=40mils

W=40mils

1 2

R236 100_0402

1 2

R510 10K_0402

LAN RESERVEDLAN RESERVED

BT_WAKE_UP

+3VS_MINI_R

MDM_PME#
LAN_PME#

AD18

MD_SPK

BT_WAKE_UP <31,32>

BT_RST# <31,32>

+5VS
PIRQC# <16,18>

+3VAUX
PCIRST# <5,8,15,16,19,24,26,28>

GNT#1 <16,18>
MDM_PME# <31>

LAN_PME# <31>
AD30 <16,24,26>

AD28 <16,24,26>
AD26 <16,24,26>
AD24 <16,24,26>

IDSEL : AD18

AD22 <16,24,26>
AD20 <16,24,26>
PAR <16,18,24,26>
AD18 <16,24,26>
AD16 <16,24,26>

FRAME# <16,18,24,26>
TRDY# <16,18,24,26>
STOP# <16,18,24,26>

DEVSEL# <16,18,24,26>
AD15 <16,24,26>

AD13 <16,24,26>
AD11 <16,24,26>

AD9 <16,24,26>
C/BE#0 <16,24,26>

AD6 <16,24,26>
AD4 <16,24,26>
AD2 <16,24,26>
AD0 <16,24,26>

IAC_SDATAO <16,22,32>SDATA_IN1<16,32>
AC97_RST# <16,22,32>

MD_SPK <22,32>

+3VAUX

12

C261
100PF_0402

L82 FBM-11-160808-121

12

C262
1000PF_0402

12
12

L83 FBM-11-160808-121

R234

1 2

0_1206

USBP3+ <17,32>
USBP3- <17,32>

+3VS

C549

4.7UF_10V_0805

C223

4.7UF_10V_0805

C264

4.7UF_10V_0805

+5VS

12

+

+3VS

12

+

+3VAUX

12

+

EN_WOL#<30>

12

C553
.1UF_0402

12

C230
.1UF_0402

12

C263
.1UF_0402

12

C554
1000PF_0402

12

C231
.1UF_0402

12

C256
1000PF_0402

12

C542
1000PF_0402

12

C543

+

4.7UF_10V_0805

7 7

8 8

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

B

C

D

E

F

G

H

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom
Date: Sheet

#$% &'

of

I

35 43, 21, 2002

J

0B

A

+12VALW

12

R363

1 1

SYSON#

Q46

2N7002

100K_0402

R364

1M_0402

12

12

C491
.01UF_0402

13

D

2

G

S

2 2

4.7UF_10V_0805

3 3

+3VALW

U49

8

D

7

D

6

D

5

12

C520

+

33UF_D2_16V

D

SI4800

12

C527
10UF_6.3V_P

4 4

+12VALW

5 5

100K_0402

SUSP

2N7002

Q44

R352

2

G

12

13

D

S

R353

1M_0402

12

12

6 6

B

+5VALW to +5V Tran sf er

+5VALW

U44

8

D

7

D

6

D

5

D

SI4800

SUSON

+5VALW +5VALW

C493

12

12

+3VALW to +3V Tran sf er

+3V

1

S

2

S

3

S

4

G

12

C526
22UF_10V_1206

SUSON

+5VALW to +5VS Tra ns fer

+5VALW

U42

SI4800

C467

.01UF_0402

4.7UF_10V_0805

C463

8
7
6
5

+5VALW

D
D
D
D

RUNON

12

S
S
S

G

+5VALW

1

S

2

S

3

S

4

G

C490

+

33UF_D2_16V

12

1
2
3
4

12

C452

+

100UF_D_16V

C

+5V

12

C487

10UF_10V_1206

C538
.1UF_0402

+5VS

12

C453

.1UF_0402

12

R420
470_0402

13

D

2

G

Q50

S

2N7002

12

C459
22UF_10V_1206

12

C484
.1UF_0402

SYSON#

12

13

D

S

12

13

D

S

R348
470_0805

Q43

2

G

2N7002

D

R361
470_0805

2

G

Q45
2N7002

SUSP

SYSON#

E

+3VALW

R232
@100K_0402

VR_ON#<33>

VR_ON<30,43>

VR_ON#

VR_ON

1 2

13

D

2

G

Q25

S

@2N7002

F

+CPU_CORE

12

13

D

2

G

S

R235
@330

Q26

@2N7002

+1.25VS

12

13

D

S

R520
470_0402

2

G

Q65
2N7002

SUSP

+12VALW To +12VS Transfer +2.5V To +2.5VS Transfer

C187

1 2

@.1UF_25V_0805

R177

1 2

100K_0402

+12VALW

12

C184
1UF_25V_0805

U9

8

D

7

D

6

D

5

D

12

C195
10UF_6.3V_P

CF5

HOLEB

+12VALW

12

13

D

S

HOLEC

HOLEB

@.1UF_0402

1 2

+2.5VS

12

R179
470_0402

Q18
2N7002

2

G

CF14

H22

H8

1 2

R1

100K_0402

+

C412

4.7UF_10V_0805

SUSP

1

Q16
SI3861

D

S

4
6

SUSP# SUSP#

5

+1.8VS+1.8VALW

SI4800

1

S

2

S

3

S

4

G

CF8

HOLEB

H5

2

G

3

C193

12

1

1UF_25V_0805

12

R189
0_0402

+12VS

12

R515
470_0402

13

D

SUSP SUSP

2

G

Q63

S

2N7002

+1.8VALW to +1.8VS Transfer

CF7

HOLEB

HOLEC

12

.1UF_0402

HOLEB

H11

H12

C179

CF9

1

RUNON

CF6

HOLEB

H13

HOLEC

H3

12

C177

22UF_10V_1206

1

C405

CF10

HOLEB

+2.5V

Q39
SI3865

S

4
6
5

-+

RTC Batter y

CF13

HOLEB

H21

1

HOLEC

H7

G

D

2

G

3

12

+

C413

1

4.7UF_10V_0805

12

R333
0_0402

BATT1

RTCBATT

+RTCVCC

CF16

HOLEB

H2

HOLEC

H9

D

S

CF18

HOLEB

1

12

R516
470_0402

13

Q64
2N7002

12

+2.5VS

2

G

RTCPWR

CF11

HOLEB

H19

HOLEC

H10

SUSP<42>

SUSP#<21,29,30,42>

RTCPWR

1

3

HSM126S

HOLEB

1

CF15

H

2

H15

HOLEC

H4

12

D41

SUSP

+1.5VS

C669

.1UF_0402

CHGRTC

CF12

HOLEB

1

+12VALW

12

R424
10K_0402

13

D

2

G

S

12

C424

22UF_10V_1206

CF17

HOLEB

H23

1

HOLEC

H1

Q53
2N7002

CF19

HOLEB

I

12

C27

.1UF_0402

SYSON#<42>

H27

HOLEC

H28

12

13

D

S

SYSON<30>

CF20

HOLEB

1

R214
470_0402

Q22
2N7002

2

G

CF1

HOLEB

H18

HOLEC

SUSP

SYSON#

1

2

G

CF2

HOLEB

+12VALW

12

13

D

S

J

R423
47K_0402

Q27
2N7002

7 7

12

C530

+

100UF_D_16V

8 8

A

+3VALW +3VS

U50

SI4800

8

D

7

D

6

D

5

D

12

C537
10UF_6.3V_P

1

S

2

S

3

S

4

G

B

+3VALW to +3VS Transfer

12

C546

22UF_10V_1206

RUNON

12

.1UF_0402

C531

C

D

S

12

R406
82_0402

13

Q49
2N7002

2

G

SUSP

D

HOLED

HOLEH

1

H25

1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

1

HOLED

H24

1

HOLEH

E

1

HOLED

H14

1

HOLEI

F

HOLEE

H16

HOLEI

1

1

HOLEE

H17

HOLEG

1

HOLEG

HOLEE

H20

1

H26

HOLEG

HOLEE

1

FD3

HOLEA

HOLEF

FD2

HOLEA

Title

HOLEG

FD1

HOLEA

1

FD4

HOLEA

HOLEG

FD6

HOLEA

1

FD5

HOLEA

Compal Electronics, Inc.

H29

HOLEH

H30

1

1

HOLEH

SCHEMATIC, M/B LA-1511

Size Document Number Rev

401224

Custom

G

H

Date: Sheet

#$% &'

I

36 43, 21, 2002

of

J

0B

A

B

C

D

Vin Detector

P1

PCN1

3

3

1 1

4

4 2

SIN-2DC-S726B201

1

1

2

6

12

PD1

EC10QS04

PC1

1000PF_50V

VIN

PR8 1K_1206

PR10 1K_1206

PR11 1K_1206

PR12 1K_1206

VS+

12

PC10

0.22UF_1206_25V

PQ1

TP0610T

2

PZD2

PR19
100K

VIN+

PD4
RB715F

3

12

12

2 1

PD2

IN4148

2 2

VMB_A<39>

VMB_B<39>

CHGRTCP

*

1
2

*

RLZ4.3B

EC_PWR_ON #<29,33>

3 3

1 2

PR21
22K

PD3

IN4148

13

B++

VIN

21

VIN++

33_1206

12

0.1UF_0805_25V

CHGRTCP

PL1

FBM-L18-453215-900LMA 90T_1812

1 2

100PF_50V

PR16

PC11

PC2

VS

PC3

1000PF_50V

VIN

100PF_50V

MAINPWON<5,40,41>

PC4

1000PF_50V

1

ACON<38,39>

2

PD5
RB715F

High 18.784 17.901 17.077 V
Low 17.877 17.043 16.195 V

VIN VS

12

PR3

84.5K_1%
PR5

22K

1 2

PC6

RLZ6.2C

3

PZD3

12

PR6

20K_1%

12

12

12

12

VS

PR13

10K_1%

0.1UF_16V

PC9
1000PF_50V

PC7

12

84

7

+

-

PU1B
LM393M

5
6

12

PR9
10K

PR14
1M_1%

12

PR1
1M_1%

1 2

VS

PC5

0.1UF_50V

84

3

+

2

-

12

12

PR17
10K

PC12

0.1UF_16V

1

PU1A
LM393M

RTCVREF

(3.3V)

12

RTCVREF

(3.3V)

PQ2

2N7002

12

PR20
215K_1%

13

12

PR2

10K

PR4
1K

1 2

ACIN <17,30,40>

PACIN <38,39>

12

PZD1
RLZ4.3B

12

PR7
10K

ACIN

Precharge detector

16.6 15.9 15.2

13.48 12.93 12.09

BAT ONLY

B++

12

PR15
499K_1%

12

PR18
499K_1%

2

13

12

PC8
1000PF_50V

PR22
47K

Precharge detector

8.597 8.247 7.904

6.310 6.101 5.683

PACIN

12

RTCVREF

CHGRTC

4 4

1 2

PR24
200

3.3V

PC14
10UF_1206_10V

A

3

PU2

S-81233SG(SOT-23-5)

3

1

1

2

2

PR23
200_0805

CHGRTCP+

PC13
1UF_0805_25V

PZD4
RLZ16B

2 1

PQ3
DTC115EUA

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

100K

100K

2

Compal Electronics, Inc.

Title

+5VALWP

SCHEMATIC, M/B LA-1511

Size Document Number Rev

B

401224 0B

#$% &'

Date: Sheet

D

37 43, 21, 2002

of

A

B

C

D

1 1

P2 P3

PQ4

SI4835DY

VIN

12

PR26
10K

ACOFF#<41>

ACOFF#

PACIN<37,39>

2 2

8
7

5

PD6

1SS355

1 2

PR33
10K

1 2

1
2
36

12

4

PR27
200K

12

PR31
150K

13

D

2

G

S

ACON<37,39>

IREF=1.31 * Icharge
IREF=0(0.73)~3.3V

IREF<30>

PQ5

SI4835DY

1
2
3 6

4

L_1

PQ8
2N7002

12

PC20

0.1UF_16V

PR39
162K_1%

1 2

8
7

5

2.22V

12

100K_1%

PR35

19.1K_1%

12

PR43

ADI_P<30>

12

PR34
24K_1%

12

(5.0V)

PC23

0.1UF_16V

12

PC27

0.1UF_16V

Iadp=0~4.5A

PR25

0.02_2512_1%

PR32 10K

1 2

PC21 4700PF_50V

1 2

PC24 2200PF_50V

12

12

PR36 10K

1 2

1 2

PR41 10K

PR37 10K

B+

1 2

PR30
0

L_3

VH

1 2

1 2

PL2

PC22

0.1UF_50V

1 2

PR38
68K

PR42
47K

1 2

PR210

*

PC18

0.022UF_25V

1 2

1 2

PC19

0.1UF_0805_25V

PC25

0.1UF_0805_25V

1 2

PC26 1500PF_50V

1 2

PR203 1K

12

PC15
10UF_1210_25V

0

12

CHR_G

ACON

12

PR44
47K

12

PC16

0.1UF_0805_25V

13

D

S

2

G

PQ58
2N7002

FSTCHG_EN#<39>

FBM-L18-453215-900LMA 90T_1812

1 2

PU3 MB3878

1

-INC2

2

OUTC2

3

+INE2

4

-INE2

5

FB2

6

VREF

7

FB1

8

-INE1

9

+INE1

12

10

OUTC1

11

OUTD

12

-INC1

+INC2

GND

CS

VCC(o)

OUT

VH

VCC

-INE3

FB3

CTL

+INC1

24

23

22

21

20

19

18

17

RT

16

15

14

13

B++

12

PC17
@1000PF_50V

36

241

PQ7
FDS4435

578

LXCHRG

PL3

22UH_SPC_1205P_220A

1 2

12

PD8

EC31QS04

L_2

ACOFF#

1 2

PR40

0.02_2512_1%

PQ6

SI4835DY

1
2
3 6

4

1 2

PR28
10K

13

100K

2

100K

PQ9
DTC115EKA

CC=2.5A +-10%
CV=13.2V(9 CELLS)

8
7

5

PR29
47K

1 2

ACOFF <30>

12

12

PC29

PC28

10UF_1210_25V

4.7UF_1210_25V

VIN

BATT+

3 3

VS

12

PC30

0.1UF_50V

PU4A

PR48

0

12

PC32

10UF_1206_10V

4 4

A

LM358A

1

PU4B
LM358A

7

84

3

+

2

-

5

+

6

-

L_L19

L_L18

+2.5VPSDREF

12

PR47

100K_0.5%

12

PR49

100K_0.5%

PC31

0.1UF_16V

B

PR45

47.5K_1%

12

(4.2V)

PR46
102K_1%

12

CHARGE<41>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

B

401224 0B

#$% &'

Date: Sheet

D

38 43, 21, 2002

of

A

B

C

D

VMB_A

AB/I

TS_A

12

PC33

1000PF_50V

PD9

@BAS40-04

+5VALWP

12

PC38

0.1UF_16V

3

12

PR54
100

1

2

PU5

74HC253

1Y

1C0

1C1

12

EC_SMD1
EC_SMC1

PD10

1

@BAS40-04

3

1C2

1C3

PL4

PR50
1K

9

2Y

2C0

2C1

12

2C2

FBM-L18-453215-900LMA 90T_1812

12

PR55
100

2

7

16

VCC

6543101112131421

BAT_LA BAT_LB

EC_SMD1 <15,30,31>

EC_SMC1 <15,30,31>

8

GND

2C3S0S1

1EN

2EN

15

PCN2

1 1

*

2 2

1
2
3
4
5
6
7
8
9

@BTD-09JR1

PCN4

BTD-09JR1

ACON<37,38>

1
2
3
4
5
6
7
8
9

VL

PR72

1 2

270K

ALI/NIMH#

VMB_A <37>

12

PC35

0.01UF_50V

1 2

VL

12

PR68
100K

1 2

PR71 4.7K

PAD-OPEN 4x4m

1 2

8
7

5

100K

2

100K

PR62
10K

P5

PJP9

PQ10

FDS4435

1
2
36

4

L_4 L_5

1 2

PR58 22K

HMBT2222A

PR60
10K

13

13

2

PQ14

12

PJP10

PAD-OPEN 4x4m

1 2

PQ11

FDS4435

1
2
3 6

12

4

PR52
39K

PD11

IN4148

1 2

GB<41>

PQ16
DTC115EKA

VS

12

PC37

0.01UF_50V

PU6A

84

LM393M

3

+

1

2

-

FSTCHG_EN#<38>

PQ18

3 3

FSTCHG<30>

4 4

DTC115EKA

2

100K

100K

13

A/B#USE<30>

PR75
100K

1 2

1 2

PR79
100K

100K

2

PQ19
DTC115EKA

100K

S1

VL

12

PR78
100K

S0

13

1 2

PR81 4.7K

1 2

PR74 5.6M

7

1 2

PR84 5.6M

PU6B
LM393M

5

+

6

-

PQ20

DTC115EKA

13

100K

100K

RTCVREF

2

8
7

5

GB

PR70

100K_1%

1 2

3.3V

12

PR76
10K

PR80

100K_1%

12

PC41
1000PF_50V

PR88
47K

PD19
IN4148

BATT+

8
7

5

1 2

12

2

PR63
@10K

12

12

PQ12

@FDS4435

100K

100K

VMB_B

12

PR67
@1M_0.5%

12

PR73
499K_1%

VMB_A

12

PR77
1M_0.5%

12

PR82
499K_1%

P4

1
2
36

4

1 2

PR59 @22K

2

PQ15

@HMBT2222A

PR61

@10K

13

PACIN <37,38>

12

PQ17

@DTC115EKA

12

PC39
@100PF_50V

12

PC40
100PF_50V

TRICKLE<30>

EC_SMC2<5,21,30>

EC_SMD2<5,21,30>

8
7

5

PC36

VMB_B

12

PD13

@BAS40-04

@FBM-L18-453215-900LMA 90T_1812

PR51
@1K

EC_SMD2

ALI/NIMH#

PL5

12

12

12

EC_SMC2

2

PR69
1K

12

PR57
@100

2

12

PR56
@100

1

3

VMB_B<37>

PQ13

@FDS4435

1
2
3 6

12

13

1 2

PR53
@39K

PD12

@IN4148

4

@0.01UF_50V

ALI/NIMH#<30>

12

1

PR65
47K

1

12

PC34
@1000PF_50V

BLI/NIMH#

BB/I
TS_B

PD14
@BAS40-04

3

+5VALWP

PD15

@BAS40-04

+3VALWP

3

2

PCN3

1
2
3
4
5
6
7
8
9

@BTD-09JR1

PR64

25.5K_1%

1 2

PD16

3

2

@BAS40-04

TS_A

12

PR66
1K

1

BATT_TEMPA<30>

8 CELLS BATTERY UVP
H 8.0V L 7.2V

+3VALWP

12

PR85
@47K

1

PD17

@BAS40-04

3

2

3

2

PR87

BLI/NIMH#

@1K

12

BLI/NIMH#<30>

PR83
@25.5K_1%

1 2

PD18

@BAS40-04

TS_B

12

PR86
@1K

1

BATT_TEMPB<30>

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

SCHEMATIC, M/B LA-1511

Size Document Number Rev

B

401224 0B

#$% &'

Date: Sheet

D

39 43, 21, 2002

of

A

B++

1 1

12

PC45

0.1UF_0805_25V

12

PC46

2200PF_50V

PC47

10UF_1210_25V

7
8

S1

S2

D1

D2

PQ21
FDS6982S

G1

G2

+3.3V Ipeak = 6.66A ~ 10A

12

PL6

SLF12565T_100M

12

2 2

+3VALWP

3 3

+5VALWP

+12VALWP

+1.2VPP

+1.8VALWP +1.8VALW

+1.5VP +1.5VS

+2.5VP

4 4

+1.25VP

+1.25VS

+3VALWP

12

+

PC57

1 2

PJP1 PAD-OPEN 4x4m

1 2

PJP4 PAD-OPEN 4x4m

PJP6 JOPEN/2MMA

PJP8 JOPEN/2MMA

PJP2 JOPEN/3MMA

PJP3 JOPEN/3MMA

PJP5 JOPEN/3MMA

PJP7 JOPEN/3MMA

PJP11 JOPEN/3MMA

PC58

150UF_D_6.3V_FP

21

21

1 2

1 2

A

150UF_D_6.3V_FP

21

21

21

0.012_2512_1%

12

+

2 1

+3VALW

+5VALW

+12VALW

+1.2VP

+2.5V

+1.25VS

+1.25VS_VGA

PR94

PD22
EP10QY03

1 2

10K

PR102

1 2

(5A,200mils ,Via NO.= 10)

(5A,200mils ,Via NO.= 10)

(120mA,20mils ,Via NO.= 1)

(100mA,20mils ,Via NO.= 1)

(3A,120mils ,Via NO.= 6)

(3A,120mils ,Via NO.= 6)

(3A,120mils ,Via NO.= 6)

(3A,120mils ,Via NO.= 6)

(3A,120mils ,Via NO.= 6)

12

PC55
47PF_50V

PR95
1M

1 2

ACIN<17,30,37>

12

PC59

3.57K_1%

PR99

33PF_50V

FB3_L

B

PC44

0.1UF_0805_25V

1 2

DH3

45

LX3

36

DL3

2
1

B

PR90
0

1 2

CSH3

1 2

PR98
10K

PR100
@300K

VS

12

PR106
47K

12

PC65

0.047UF_50V

BST31

L_6

12

12

RUN

12

PD40

1SS355

PR91
10_1206

12

PC53

0.1UF_0805_25V

25

BST3

27

DH3

26

LX3

24

DL3

1

CSH3

2

CSL3

3

FB3

10

SKIP#

23

SHDN#

7

TIME/ON5

28

RUN/ON3

PC63
680PF_50V

PR105
47K

PC66

0.047UF_16V

VS

1 2

VS_L+VS_L++

12

22

V+

PU7

MAX1632

12

MAINPWON

GND

8

DAP202U

PD21

2

1

12

21

12OUT

VL

VDD

BST5

DH5

PGND

CSH5

CSL5

SEQ

REF

SYNC

RST#

LX5

DL5

FB5

3

VL

PC49

C

4.7UF_1206_16V

4
5
18
16
17
19
20
14
13
12
15
9
6
11

VL

BST51+
L_51

BST51

+12VALWP

12

PC54

4.7UF_1210_25V

PR104
@0

2.5VREF

12

PC60

4.7UF_1206_16V

12

PC48

0.1UF_0805_25V

1 2

PR92
0

1 2

VL

FB5_L

PC50

2200PF_50V

1 2

PR93
0

12

D

PC43

B++

PC51

0.1UF_0805_25V

12VDD

1 2

470PF_0805_100V

12

PC52

10UF_1210_25V

DH5

LX5

DL5

CSH5

12

PC64
33PF_50V

PR103
10K

VL

1 2

PR107
0

MAINPWON <5,37,41>

+1.5VS

PC147

4.7U_1206_25VFZ

PU17B

LM358AMX_SO8

+

7

-

5
6

PQ60

SI3442DV_TSOP6

D

6
2

1

S

G

3

45

PU17A

84

LM358AMX_SO8

+

1

-

PC151

68P_0603_50V8J

3
2

M7C
+1.25VS_VGA

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

PR89
22_1206

4 5
3 6

2
1

12

PR101

10.5K_1%

12

+5VALWP

12

1 2

PR220 5.1K_0603_5%

FLYBACKSNB

12

D1

G1

S1

D2

G2

S2

PQ22
FDS6982S

PC148

.1U_0603_50V4Z

Title

Size Document Number Rev

B

Date: Sheet

E

PC42

4.7UF_1210_25V

1 2

12

PD20
EC11FS2

1 4

3 2

PT1

SDT-1205P-100

7
8

12

PC56
47PF_50V

PD23

EP10QY03

12

PR96
2M

12

2 1

12

PR97

0.012_2512_1%

12

+

+

PC61

150UF_D_6.3V_FP

47UF_D_6.3V_PC

PC62

+5V Ipeak = 6.66A ~ 10A

+

PC146

47U_6.3V_M

12

PR218

97.6K_0603_1%

1 2

PR216

5.1K_0603_5%

1 2

PC150

PR217

0_0603_5%

PC149

220P_0603_50V8J

1000P_0603_50V7K

PR219

33K_0603_1%

1 2

Compal Electronics, Inc.

SCHEMATIC, M/B LA-1511
401224

#$% &'

E

+5VALWP

*

+1.25V+-5%

+1.25VS_VGA

VL

40 43, 21, 2002

of

0B

A

B

C

D

PH1 under CPU botten side :

CPU thermal protection at 90(91)+-3 degree C
Recovery at 50(51)+-3 degree C

1 1

PH2 near main Battery CONN :

BAT. thermal protection at 85(86)+-3 degree C
Recovery at 50(51)+-3 degree C

3.3V

RTCVREF

*

PC139

0.1UF_16V

CPU

L_7

PR111

3.65K_1%

L_L1

2 2

PC70

0.1UF_16V

PR117

19.1K_1%

PTH1
10K_1%

PR108

100K_1%

PR115
1K_1%

1000PF_50V

PC71

L_L2

REV

PR121
249K_1%

PR110
47K_1%

L_L4

RTCVREF

L_8

PTH2
10K_1%

PR114

3.65K_1%

PR118

18.2K_1%

PR116
1K_1%

PC67

0.1UF_16V

REV

L_L5

PR113
47K_1%

5

+

6

-

84

7

PU8B
LM393M

PR120

470K

VS

PR109
10K

L_L6

PZD6
RLZ3.6B

21

1SS355
PD25

PC74

0.1UF_16V

OTP

12

<38>

CHARGE

CHARGE

13

100K

2

100K

PQ56
DTC115EKA

MAINPWON

<5,37,40>

VS

PC68

0.1UF_50V

100K

100K

MAINPWON

13

PQ23
DTC115EKA

PR112
10K

84

3

+

2

1

-

PU8A
LM393M

PR119

470K

L_L3

21

PZD5
RLZ3.6B

PD24

1SS355

PC72

0.1UF_16V

12

OTP

2

PC73
@1000PF_50V

Battery

PC69

0.1UF_16V

BATTERY Charger OVP : 13.56V

PR122
36K_1%

L_L8

PC76

VIN

VS

12

PC75

0.1UF_50V

84

3

+

1

-

2

PU11A
LM393M

PR124 0

L_L9 L_L10

PR126
100K

1UF_0805_16V

2.5VREF

PC77

BATT+

PR123
1M_0.5%

PR127
@100K_0.5%

PR128

226K_1%

ACOFF#<38>

13

3 3

GB<39>

4 4

2N7002

13

@2N7002

2

PQ24

L_L7

2

PQ25

PR129

100K_1%

PR125
309K 1%

1UF_1206_25V

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

B

C

Title

SCHEMATIC, M/B LA-1511

Size Document Number Rev

B

401224 0B

#$% &'

Date: Sheet

D

41 43, 21, 2002

of

A

D

S

3

S

3

L_9

12

6
2

1

G

D

6
2

1

G

PQ27
SI3445DV

+

-

PQ32
SI3445DV

S

4 5

PR146
10K

1

PU9A
LM393M

5
6

3

L_10

PQ26
@SI3445DV

12

4700PF_50V

D

6
2

1

G

PD30

EC31QS04

VS

84

3

+

2

-

LX2.5

PD27
EC31QS04

L_L12

L_L13

PC88

LX1.8

12

12

PC99

0.1UF_50V

4.7UH SPC-1205P-4R7A

12

PR133
@2M

12

PC85

@0.1UF_16V

12

5UH SPC-06704-5R0

1 2

12

PR143
@2M

12

PC95

@0.1UF_16V

1.8V

PL7

13

PL9

191K_1%

PR134

191K_1%

1 2

100K

100K

PQ30
DTC115EKA

PR144

L_L16

1 2

(+2.5V +-5%)

12

12

PR137
47K

PR208
@47K

2

*

12

PR152
100K

+5VALWP

12

PR132
0_1206

1 1

12

PC82

10UF_1210_25V

PC84

2200PF_50V

PQ29
2SA1036K

2 2

+3VALWP

PC94

10UF_1206_10V

3 3

2.5VDD

PD26
RB751V

1 2

1 2

12

31

12

PR142
0_1206

12

PD29

RB751V

PC96

2200PF_50V

PQ36
2SA1036K

PR136

1K

2

PQ28

HMBT2222A

2

1.8VDD

1 2

1 2

PR147

12

1K

31

2

13

L_L11

PQ33

HMBT2222A

2

12

PR135
10K

PU9B
LM393M

13

L_L15

4 5

4 5

7

B

+2.5VP

+2.5VP

12

PC80

470PF_0805_100V

2.5VREF

VS

12

L_L14

(+1.8V+-5%)

+1.8VALWP

12

PC92
2200PF_50V

2.5VREF

12

+

PC81

220UF_D_4V_FP

SYSON# <36>

12

+

PC93
150UF_D_6.3V_FP

+2.5VP

+2.5VP

SUSP#<21,29,30,36>

PR130
0_1206

1 2

PR138 100K

DTC115EUA

12

2

PQ31

PC100

10UF_1206_10V

1 2

0.1UF_0805_25V

12

4.7UF_1206_16V

100K

100K

+3VALWP

12

PR145
0_1206

12

PC102

2200PF_50V

PR131
10_1206

PC78

PC83

13

12

+2.5VDD

PR141 @0

1.5VDD

PD31
RB751V

1 2

1 2

PR151

12

1K

12

PC91 1000PF_50V

HMBT2222A

C

1

VCC1

2

PVDD1

3 14

VL1 VL2

4

PGND1

5

AGND1

6

SD

7

VIN/2

12

8

AGSEN

Layout : "Compensation network close to FB pin"

PQ35

2

12

13

+2.5VCC

PU10
CM8500IT

PQ34
SI3445DV

S

4 5

PR150
10K

VCC2

PVDD2

PGND2

AGND2

VFB

VCCQ

AGND

G

3

L_11

16

15

13

12

11

10

9

D

6
2

1

EC31QS04

PD32

12

12

LX1.5

12

PC79

0.1UF_0805_25V

1 2

LX1.25

PC86

4.7UF_1206_16V

+2.5VP

PC90

0.1UF_0805_25V

5UH SPC-06704-5R0

1 2

12

PR148
@2M

12

PC101

@0.1UF_16V

1 2

PC89
1000PF_50V

PL10

PR149

191K_1%

PL8

5UH SPC-06704-5R0

PR139
100K

PR140
1K

12

12

PC97

2200PF_50V

D

(+1.25V+-5%)

+1.25VP

12

12

+

12

12

(+1.5V+-5%)

+1.5VP

12

+

PC98

150UF_D_6.3V_FP

PC87

220UF_D_4V_FP

PR153
43K_1%

1 2

1 2

4 4

A

PR154
215K_1%

12

PC103

0.01UF_50V

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

B

PQ37
2SA1036K

31

2

L_L17

SUSP<36>

SUSP

C

7

PQ61

DTC115EKA

2

84

+

-

5
6

PU11B

LM393M

100K

100K

L_LTT

13

PR222
150K_1%

12

1 2

Title

PC152

PR221

100K_1%

0.01UF_50V

12

2.5VREF

Compal Electronics, Inc.

SCHEMATIC, M/B LA-1511

Size Document Number Rev

B

401224 0B

#$% &'

Date: Sheet

D

42 43, 21, 2002

of

A

B

C

D

E

F

G

H

VID_VCC

+3VALWP

1 1

VR_ON<30,36>

+3VALWP

+2VREF

2 2

+2VREF

*

PR179

48.7K_1%

PR181
20K_1%

3 3

4 4

PM
PM D-S
BM
BM D-S
Deeper

0.1UF_0805_25V

PR185
200

1 2

1 2

1 2

1 2

PR193
200

1 2

1 2

PR196
200

1 2

PR199
200

1 2

GMUXSEL STPCPU# VCORE

11
1

00
X

A

PR155
0

PC104

4.7UF_1206_16V

CPU_ON

VR_ON

PR175
150K_1%

PR176

180K_1%

PC121

PR187
200

PR189
200

PR191
200

PR194
200

PC132

4700PF_50V

0
10

0

1.2VDD +1.2VPP

12

PC105
68NF_50V

PC138
@1000PF_50V

PR158
0

PU12

4

VIN

2

DELAY

7 1

ERROR CNOISE

8

ON/OFF#

SI9182DH-AD

VOUT

SENSE

GND

1 2

PR159 0

5
6

PC106

12

3

0.1UF_16V

+5VALWP

SWC13V<16>

PU13 MAX1718A

21

D4

22

D3

23

D2

24

D1

25

D0

14

VGATE

3

TIME

2

SDN/SKIP

17

VDD

6

CC

20

OVP

11

REF

12

ILIM

15 10

GND TON

ILIM

PU14
MAX1887

TRIG V+
CM+
CM­CS­CS+
COMP
GND

PR202 0

ILIM

PU15
MAX1887

TRIG V+
CM+
CM­CS­CS+
COMP
GND

ZMODE

LIMIT

BST

LX

DH

VDD

DL

PGND

LIMIT

BST

LX

DH

VDD

DL

PGND

1.30V

1.2309V

1.176V

1.144V

1.0V

C

BST

VCC

POS

NEG

SUS

LX

DH

DL

V+

FB

S1
S0

16

14
13
12
11
10
9

16

14
13
12
11
10
9

27

L_12

28

L_19

26
16
1

CPUVCC

9
4
13
5
19
18
8
7

PR182 33K_1%

L_13

CPUVDD

L_16

PR192 33K_1%

CPUVDD

CPU_VID4<7>
CPU_VID3<7>

CPU_VID2<7>
CPU_VID1<7>
CPU_VID0<7>

VGATE<33>

CPU_ON

PC116
1UF_0805

PC122
4700PF_50V

PC127
4700PF_50V

PC130

4700PF_50V

CM1+

CM1+

DPRSLPVR VCORE'

0
0
0
0
1

PR161 0
PR163 100K
PR166 100K
PR167 100K
PR169 100K

PR170 0

PR173 120K

CPUVDD

PC115 47PF_50V

PC117
1UF_0805

*

*

470PF_50V

PC133
470PF_50V

PR178
100K_1%

PR180

53.6K_1%

PR201

@0

PC125

PR197 1K_1%

+2VREF

PR190
1K_1%

Offset

1.30V 0%

4.62%

1.20V 2.0%

4.62%

1.0V

B

0%

12
12
12
12
12

12

ILIM

PC118
1000PF_50V

1
2 15
3
4
5
6
7
8

1
2 15
3
4
5
6
7
8

PR157
@10K_1%

PR160
20

1 2

PR164 0

PC123

0.1UF_0805_25V

L_15

2 1

PC126
1UF_0805

L_17

PC134
1UF_0805

PR156
0

1 2

*

PM_DPRSLPVR_R

L_14

PD37
1SS355

ILIM

PC131

0.1UF_0805_25V

L_18

2 1

12

21

PD33
1SS355

PC110

0.1UF_0805_25V

CPU_B+

PC112

0.1UF_0805_25V

PC113

4.7UF_0805_10V

CPU_GL1

PR223

0

1 2

ILIM

CPU_LX2

1 2

PD38
1SS355

D

PQ38

PQ40

SI4362DY

PQ45

PQ51

IR7811A

CPU_GH3

PQ54

SI4362DY

CPU_B+

578

3 6

241

578

3 6

241

578

3 6

241

578

3 6

241

578

3 6

241

578

3 6

CPU_B+

IR7811A

SI4362DY

CPU_B+

IR7811A

PQ47
SI4362DY

241

E

PQ39

PQ41

PQ46

CPU_B+

PQ52

IR7811A

PQ55

SI4362DY

+1.2VPP

PC107

4.7UF_1206_16V

CPU_GH1

IR7811A

CPU_LX1

CPU_FB

POS

CPU_GH2

IR7811A

PR188

*

0

CPU_GL2

*

PR195
0

12

CPU_LX3

CPU_GL3

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

10UF_1210_25V

578

3 6

241

578

3 6

241

578

3 6

241

578

3 6

241

578

3 6

241

578

3 6

241

PC108

4.7UF_1210_25V

PR165

2.7_0805

1000PF_50V

PQ48
SI4362DY

4.7UF_1210_25V

PC109

PC153

0.01UF_0805_50V

SRC-1205-0R5

PD34

12

4.7UF_1210_25V

PC128

EC31QS04

2 1

PC111

0.01UF_50V

1 2

PC114

PC119

PR186

2.7_0805

12

PC124

0.01UF_50V

PC156

0.01UF_0805_50V

**

PM_DPRSLPVR<16>

PR200

2.7_0805

12

PC135

0.01UF_50V

PC154

0.01UF_0805_50V

0.01UF_0805_50V

**

PL12

PR174
100

PC120

10UF_1210_25V

PL13

SRC-1205-0R5

PD36
EC31QS04

2 1

PC157

0.01UF_0805_50V

PL14

SRC-1205-0R5

PD39
EC31QS04

2 1

F

PC155

*

CM1+

PR168

2.8K_1%

PC142

@10UF_1210_25V

*

CM2+

@10UF_1210_25V

PC144

PM_DPRSLPVR

CM3+

12

+

PC136

@100UF_EC_25V

PR162

0.002_2512_1%

PR183

0.002_2512_1%

PC129
10UF_1210_25V

0.002_2512_1%

@100UF_EC_25V

12

12

+

Title

2 1

PR205
100K

12

PL11

1 2

PR212

0_0603_5%

+CPU_CORE

+CPU_CORE

PD35
EC31QS04

PR171

49.9K_1%

D

S

PR207
100K

B++

PC145

0.1U

PR214
2K_0603_1%

PR215

1K_0603_1%

PR172
68K_1%

+5VALWP

PR177

PQ43

13

2N7002

100K

2

G

13

D

2

G

S

+5VALWP

MAX4322EUK-T_SOT23-5

5

+

1

-

2

12
12

13

D

S

PQ44
2N7002

+5VALWP

PU16

+CPU_CORE

PR184
100K

PR204
100K

PM_GMUXSEL<16>

13

D

PQ59

S

2

G

2N7002

2

G

PM_DPRSLPVR_R

13

D

2

G

S

13

D

PQ50

S

2N7002

+CPU_CORE

2N7002

PR206
100K

NB/DT#_CPU<7,31>

Compal Electronics, Inc.

PR211
499_0603_1%

3
4

PR213
1K_0603_1%

1K for MB P4 CPU.
2K for DT P4 CPU.

PQ42
2N7002

2

G

PQ49

2N7002

13

D

2

G

S

PQ53

2

G

PQ57

2N7002

FBM-L18-453215-900LMA 90T_1812

PC137

12

PM_S T PCPU # <14,16>

PR198

SCHEMATIC, M/B LA-1511

Size Document Number Rev

B

401224 0B

#$% &'

Date: Sheet

G

43 46, 21, 2002

H

12

+CPU_CORE

12

13

D

S

of

CM1+