Compal LA-1452 BDW00, Inspiron 1100, Vostro 1500 Schematic

Page 1
A
B
COMPAL CONFIDENTIAL
C
D
E
1 1
MODEL NAME :
COMPAL P/N :
PCB NO :
Revision :
LA-1452
0.2
BDW00
DA8DW00L100
DATE :
2 2
Abacus/TangII Schematics Document
uFCBGA/uFCPGA Northwood
2002-08-22
3 3
REV: 0.2 (PT)
4 4
Dell-Compal Confidential
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET N OR THE INFORMATION I T CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Size Document Number Re v
Abacus/TangII LA-1452
Date: Sheet
Compal Electronics, Inc.
Cover Sheet
E
of
143Monday, August 26, 2002
Page 2
A
Compal confidential
Model Name : ABACUS/TangII
File Name :
LA-1452
B
C
D
E
Block Diagram
DT & Mobile Northwood
1 1
2 2
Minipci CONN
WIRELESS
+3VALW +3V +3VS +3VALW
3 3
Fan Control
page 7
DT/BD-PE/ICH4/EXT VGA
DT/BD-GL/ICH4/INT VGA
(PIRQE#,G_GNT#,G_REQ#) FOR EXT.
AGP GRAPHIC/CHRONTEL
LVDS Connector
IDSEL:AD18 (PIRQC#D#,GNT#1,REQ#1)
LAN BCM-4401L
page 26
+3VS
RJ45
EXT. CRT
+3VS 33MHz
IDSEL:AD17 (PIRQB#,GNT#0,REQ#0)
page 22
page 22
CPU Bypass & CPUVID
page 7, 8
CRT Connector
AGP Conn
TV OUT
page 17
page 16
page 17
CardBus & 1394
PCI4510/PCI1510
+3V
page 23,24,25
Card Bus
SLOT CONN
page 24
INT. CRT
AGP4X(1.5V)
PCI BUS
IDSEL:AD20 (PIRQA#,GNT#2,REQ#2)
1394
page 23
uFCBGA/uFCPGA CPU
+1.2VP
+CPU_CORE
System Bus
400/533 MHz
INTEL
BROOKDALE-GL/PE
+1.5VS
+2.5V
+1.25VS
+CPU_CORE
760 BGA
HUB LINK
+1.5VS 66MHz
+3VS
+3VALW
+1.5VS
+1.5VALW
+CPU_CORE
VCC5REF
VCC5REFSUS
INTEL
ICH4
421 BGA
LPC BUS
+3VS 33MHz
page 5,6
HD#(0..63)HA#(3..31)
page 9,10,11
page 18,19,20
Memory BUS(DDR)
48MHz
24.576MHz
ATA100
IDE HDD
+5VALW
page 21
NS EC87591L
845PE / PCI4510 845GL / PCI1510
Touch Pad
LED Status LID Switch
+5VS +5VALW
4 4
Power Circuit DC/DC
page 34,35,36,37,38,39,40
A
DC/DC Interface Suspend
page 33
Power On/Off Reset & RTC
page 32
B
+3VALW
EC I/O Buffer
+5VALW +3VALW
Embedded Controller
+3VS +3VALW
page 29
page 30
Int.KBD
+3VALW
BIOS
page 31
page 30
EC DEBUG
page 31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
page 30
Thermal Sensor
ADM1032
+3VS +3VS
+2.5V 200/266MHz
AC-LINK
IDE
CD-ROM
+5VS
page 21
PIDE IRQ14SIDE IRQ15
page 6
AC97 Codec
+5VDDA
AMP & INT. Speaker
+5VALW
page 28
DDR-DIMM X2
BANK 0, 1, 2, 3
+2.5V
+1.25VS
STAC9750
page 27
HeadPhone & MIC Jack
+5VDDA
Dell-Compal Confidential
Title
Size Document Number Rev
Abacus/TangII LA-1452
D
Date: Sheet
Clock Generator
ICS950810
page 12,13,14
2 USB Ports
+3VALW +5VALW
page 15
page 32
MDC
+3VALW +3V
page 29
Cable
RJ11
page 28
Compal Electronics, Inc.
Block Diagram
E
0.2
of
243Monday, August 26, 2002
Page 3
5
4
3
2
1
Revision List
Schematics Rev
SST-Build
D D
PT-Build
ST-Build
QT-Build
0.1
0.2 0.2
PCB Rev CHIPS Rev
0.1
845PE Rev B0 845GL Rev B1 ICH4 Rev B0
Power Managment table
Signal
State
S0
S1
S3
S5 S4/AC
S5 S4/AC don't exist
+3VALW
+5VALW
+12VALW
ON
+3V
+5V
+2.5V
ON ON
ON ON ON
ON ON
ON OFF
OFF OFF OFF
+3VS
+5VS
+1.5VS
+1.2VP
+CPU_CORE
+1.25VS
OFF
OFF
Ceramic Capacitor Spec Guide:
C C
Temperature Characteristics:
Symbol
CODE
0
Z5U
8
NP0 SH
H
UK
UJ
1
Z5V
9
C0G SJ
I
J
Z5P
A
BJ
SL
3
2
Y5U X7R
C
B
CH
Y5V
CJ
4
5
Y5P
D
E
CK
X5R
6
7
F
G
Tolerance:
Symbol
B B
CODE
+-10%
K
A
+-0.05PF
M
+-20%
B
+-0.1PF
N
+-30%
C
+-0.25PF
P
+100,-0%
D
+-0.5PF +-1PF
Q
+30,-10%
F
V
+20,-10%
G
+-2%
X
+40,-20%
H
+-3%
Z
+80,-20%
J
+-5%
SMBUS Control Table
SOURCE
SMB_EC_CK1 SMB_EC_DA1
SMB_EC_CK2 SMB_EC_DA2
A A
SMB_CLK SMB_DATA
NS 87591
NS 87591
ICH4
5
INVERTER BATT
SERIAL SENSOR EEPROM
(1010)
THERMAL
(CPU) (U57) (U25/U23)
4
THERMAL SENSOR
SODIMM CLK CHIP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET N OR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MINI PCI
3
NOTE1:
@XX : Depop component
1@XX : Pop for INT, Depop for EXT
2@XX : Pop for EXT, Depop for INT
Title
Size Document Number Re v
2
Date: Sheet
Compal Electronics, Inc.
Note & Revision
Abacus/TangII LA-1452
Dell-Compal Confidential
of
343Monday, August 26, 2002
1
Page 4
5
4
3
2
1
PQ26
+1.5VALW
D D
SUSP#
+5VALW
SHDN#
MAX1632
page 36
SIDEPWR
SUSP#
+3VALW
C C
page 34
AC
Battery
B+
VR_ON#
page 34
+12VALW
page 35
page 31
page 21
page 25
SYSON
SUSP#
+5VS
+5VSHDD
+5VDDA
+3V
page 31
+3VS
page 31
SUSP#
VR_ON#
+1.5VS
page 35
CM2843
page 38
+1.2V
+5VS
Mobile
B B
ISL6215
DT
page 38
+CPU_CORE
+3VS
+1.5VS
+2.5V
VGA Conn. 180 pin
+3V
ISL6219
+5VALW
(Either one by CPU)
SUSP#
+12VALW
B+
page 16
+1.25VS
A A
5
SYSON
4
ISL6225
page 36
+2.5V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
3
2
Dell-Compal Confidential
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
POWER DIAGRAM
Abacus/TangII LA-1452
of
443Monday, August 26, 2002
1
0.2
Page 5
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1 1
+CPU_CORE
2 2
HA#[3..31]<9>
3 3
4 4
H_REQ#[0..4]<9>
5 5
H_ADS#<9>
+CPU_CORE
H_BREQ0#<9>
H_BPRI#<9>
H_BNR#<9>
H_LOCK#<9>
CLK_CPU_BCLK<15>
CLK_CPU_BCLK#<15>
HA#[3..31]
H_REQ#[0..4]
R284 @4.7K_0402_5%
1 2
R301 200_0402_5%
For Mobile
12
CLK_CPU_BCLK CLK_CPU_BCLK#
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
AF22 AF23
6 6
H_HIT#<9>
H_HITM#<9>
H_DEFER#<9>
A10
A12
A14
A16
A18
A20
AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19
C10
C12
C14
C16
C18
C20
D11
D13
D15
D17
D19
D9
VCC_85
F11
VCC_67
VCC_68
HOST DATA
VCC_79E8VCC_80
VCC_69
VCC_78
E20
VCC_70
VCC_77
E18
VCC_71D7VCC_72
VCC_76
E14
E16
E10
VCC_73
D#10 D#11 D#12 D#13 D#14 D#15 D#16 D#17 D#18 D#19 D#20 D#21 D#22 D#23 D#24 D#25 D#26 D#27 D#28 D#29 D#30 D#31 D#32 D#33 D#34 D#35 D#36 D#37 D#38 D#39 D#40 D#41 D#42 D#43 D#44 D#45 D#46 D#47 D#48 D#49 D#50 D#51 D#52 D#53 D#54 D#55 D#56 D#57 D#58 D#59 D#60 D#61 D#62 D#63
VCC_74
VCC_75
E12
D#0 D#1 D#2 D#3 D#4 D#5 D#6 D#7 D#8 D#9
B21 B22 A23 A25 C21 D22 B24 C23 C24 B25 G22 H21 C26 D23 J21 D25 H22 E24 G23 F23 F24 E25 F26 D26 L21 G26 H24 M21 L22 J24 K23 H25 M23 N22 P21 M24 N23 M26 N26 N25 R21 P24 R25 R24 T26 T25 T22 T23 U26 U24 U23 V25 U21 V22 V24 W26 Y26 W25 Y23 Y24 Y21 AA25 AA22 AA24
NorthWood
HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63
HD#[0..63]
HD#[0..63] <9>
U19A
VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6A8VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56B7VCC_57B9VCC_58
VCC_59
VCC_61
VCC_62
VCC_63
VCC_64
VSS_56
AD8
VCC_65C8VCC_66
CPU CORE
VCC_81
VCC_82
VCC_83
VCC_84
F9
F13
F15
F17
F19
K2
A#3
K4
A#4
L6
A#5
K1
A#6
L3
A#7
M6
A#8
L2
A#9
M3
A#10
M4
A#11
N1
A#12
M1
A#13
N2
A#14
N4
A#15
N5
A#16
T1
A#17
R2
A#18
P3
A#19
P4
A#20
R3
A#21
T2
A#22
U1
A#23
P6
A#24
U3
A#25
T4
A#26
V2
A#27
R6
A#28
W1
A#29
T5
A#30
U4
A#31
V3
A#32
W2
A#33
Y1
A#34
AB1
A#35
J1
REQ#0
K5
REQ#1
J4
REQ#2
J3
REQ#3
H3
REQ#4
G1
ADS#
AC1
AP#0
V5
AP#1
AA3
BINIT#
AC3
IERR#
H6
BR0#
D2
BPRI#
G2
BNR#
G4
LOCK#
BCLK0 BCLK1
F3
HIT#
E3
HITM#
E2
DEFER#
VSS_0H1VSS_1H4VSS_2
H23
HOST ADDRESS CONTROL SIGNAL
VSS_3
VSS_4
A11
H26
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12A3VSS_13A9VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
A13
A15
A17
A19
A21
A24
A26
AA1
AA11
AA4
AA13
AA15
AA17
AA19
AA23
AA26
CPU CORE
DT/Mobile
NorthWood
GND
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
AA7
AA9
AB10
AB12
AB3
AB14
AB16
AB18
AB20
AB21
AB24
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
AB6
AB8
AC2
AC5
AC7
AC9
AC11
AC13
AC15
AC17
AC19
AD1
AC22
AC25
AD10
AD4
AD12
AD14
AD16
AD18
AD21
AD23
7 7
+CPU_CORE
Dell-Compal Confidential
8 8
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMP AL ELECTRONIC S, INC. NEITH ER THIS SHEET NO R THE INFORM ATION IT CONT AINS
A
B
C
D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
E
F
G
H
Compal Electronics, Inc.
Title
Northwood / P4 uFCPGA (1/2)
Size Document Number Rev
Abacus/TangII LA-1452
Custom Date: Sheet
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Page 6
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1 1
2 2
+CPU_CORE
R271
R288 300_0402_5%
3 3
4 4
R279
Place resistor <100mils from CPU pin
R206
@0_0603_5%
For Mobile
5 5
+CPU_CORE
R278 51_0402_5%
R291 R262
R272 51_0402_5% R268 51_0402_5%
6 6
R296 51_0402_5%
1 2
R313 1.5K_0402_5%
1 2
R305 1.5K_0402_5%
1 2
R314 680_0402_5%
+1.2VP
12
H_DPSLP#<18>
200_0402_5%
12
12
51.1_0603_1%
12
+CPU_CORE
12
R207 0_0603_5%
L24
1 2
L25
1 2
Murata LQG21F4R7N00
CLK_CPU_ITP<15>
CLK_CPU_ITP#<15>
CLK_ITP#<8> CLK_ITP<8>
12 12
51_0402_5% 51_0402_5%
12 12
12 12
If used ITP port must depop
7 7
SMB_EC_CK2<8,30>
SMB_EC_DA2<8,30>
H_THERMDA
Width 10mil , Spacing 10mil
2200P_0603_50V7K
H_THERMDC
8 8
A
B
H_RS#0<9> H_RS#1<9> H_RS#2<9>
H_TRDY#<9>
H_A20M#<18>
H_FERR#<18>
H_IGNNE#<18>
H_SMI#<18>
H_PWRGD<18>
H_STPCLK#<18>
12
1 4 2 3
H_INTR<18>
H_NMI<18 >
H_INIT#<18 >
H_RESET#<8,9>
H_DBSY#<9>
H_DRDY#<9>
H_BSEL0<10>
1 2
R315 62_0402_5%
ITP_BPM0<8> ITP_BPM1<8>
ITP_PRDY#<8>
ITP_PREQ#<8 >
ITP_TCK<8> ITP_TDI<8>
ITP_TDO<8 >
ITP_TMS<8>
ITP_TRST#<8 >
RP61
12
TP2 C320
1U_0603_10V4Z
CLK_CPU_ITTP CLK_CPU_ITTP#
R333
8.2K_0402_5%
U57
2
D+
3
D-
8
SCLK
7
SDATA
ADM1032ARM_RM8
12
@0_0402_4P2R_5%
H_DPSLPR#
H_PWRGD
H_RESET#
SMB_EC_CK2
SMB_EC_DA2
R269
4.7UH_80mA
4.7UH_80mA
12
22U_1206_10V4Z
C321 22U_1206_10V4Z
RP62
1 4 2 3
0_0402_4P2R_5%
ITP_PREQ# ITP_PRDY#
ITP_BPM0 ITP_BPM1
ITP_BPM2 ITP_BPM3
ITP_TDI
ITP_TMS
ITP_TRST#
C470
12
For Mobile
@0_0402_5%
+CPU_CORE
C305
H_VSSA
8.2K_0402_5%
R334
12
CPU Temperature Sensor
B
C
H_THERMDA H_THERMDC
H_THERMTRIP#
1
H_VCCIOPLL
R302
51.1_0603_1%
+5VS+5VS
C
R267
H_A20M# H_FERR# H_IGNNE# H_SMI# H_PWRGD H_STPCLK# H_DPSLPR# H_INTR H_NMI H_INIT# H_RESET#
ITP_BPM0 ITP_BPM1 ITP_BPM2 ITP_BPM3 ITP_PRDY# ITP_PREQ#
ITP_TCK ITP_TDI ITP_TDO ITP_TMS ITP_TRST#
H_VCCA
1 2
12
C174
.1U_0402_16V4Z
VDD1
ALERT
THERM
GND
@33_0402_5%
AB23
AD25
AB25
AD20
AE23
AF25
AC26 AD26
1 2
R300
51.1_0603_1%
1
6
4
5
12
F1
G5
F4
AB2
J6
C6 B6 B2 B5
Y4
D1 E5
W5
H5
H2 AD6 AD5
B3
C4
A2
AC6 AB5 AC4
Y6 AA5 AB4
D4
C1
D5
F7
E6
A5
AF3
L24
P1
D
AE11
U19B
RS#0 RS#1 RS#2 RSP# TRDY#
A20M# FERR# IGNNE# SMI# PWRGOOD STPCLK# DPSLP# LINT0 LINT1 INIT# RESET#
DBSY# DRDY# BSEL0 BSEL1
THERMDA THERMDC
THERMTRIP#
BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5
TCK TDI TDO TMS TRST#
VCCA VCCSENSE VCCIOPLL
NC7 NC8
ITP_CLK0 ITP_CLK1
COMP0 COMP1
12
R337
@10K_0402_5%
D
VSS_57
AE13
VSS_58
VSS_129F8VSS_130
AE15
VSS_59
G21
AE17
AE19
VSS_60
VSS_61
VSS_131
VSS_132G3VSS_133G6VSS_134J2VSS_135
G24
AE22
AE24
VSS_62
VSS_63
H_SKTOCC#
AE26
AE7
AE9
AF1
VSS_64
VSS_65
VSS_66
VSS_67
VSS_136
VSS_137J5VSS_138
J22
J25
K21
+CPU_CORE
R_A
R_B
E
AF10
AF12
AF14
AF16
AF18
AF20
AF26
AF6
AF8
B10
B12
B14
B16
B18
B20
B23
B26
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
SKTOCC#
VSS_85B4VSS_86B8VSS_87
DT/Mobile
NorthWood
GND
VSS_139
VSS_140K3VSS_141K6VSS_142L1VSS_143
VSS_144
VSS_145L4VSS_146M2VSS_147
VSS_148
VSS_149M5VSS_150
VSS_151
VSS_152N3VSS_153N6VSS_154P2VSS_155
VSS_156
VSS_157P5VSS_158R1VSS_159
L23
L26
K24
12
12
M22
M25
GTL Reference Voltage
Layout note :
1. Place R_A and R_B near CPU (Within 1.5").
2. Place decoupling cap 220PF near CPU.(Within 500mils)
R265
49.9_0603_1%
Trace width>=7mil
R261
100_0603_1%
1U_0603_10V4Z
E
P22
P25
N21
N24
C319
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMP AL ELECTRONIC S, INC. NEITH ER THIS SHEET NO R THE INFORM ATION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C318
220P_0603_50V8J
F
C11
C13
C15
C17
C19
C22
C25
D10
D12
D14
D16
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92C2VSS_93
VSS_94
VSS_95C5VSS_96C7VSS_97C9VSS_98
VSS_99
VSS_100
GND
VSS_160
VSS_161R4VSS_162
VSS_163
VSS_164T3VSS_165T6VSS_166U2VSS_167
VSS_168
VSS_169U5VSS_170V1VSS_171
T21
T24
R23
R26
U22
U25
+H_GTLREF1
V23
V26
VSS_101
VSS_172
D18
VSS_102
VSS_173V4VSS_174
D20
VSS_103
W21
D21
D24
VSS_104
VSS_105
VSS_175
VSS_176W3VSS_177W6VSS_178Y2VSS_179
W24
G
E11
VSS_106D3VSS_107D6VSS_108D8VSS_109E1VSS_110
VSS_180
VSS_181
Y5
Y22
Y25
SHDN_1632#<34,36>
H_THERMTRIP#<19>
H
DP#0 DP#1 DP#2 DP#3
NC1 NC2
TESTHI0 TESTHI1 TESTHI2 TESTHI3 TESTHI4 TESTHI5
TESTHI8 TESTHI9
GHI#
DBI#0 DBI#1 DBI#2 DBI#3
DBR#
MCERR#
SLP#
VSSA
NC3 NC4
NorthWood
R316
47K_0402_5%
1 2
Q59
3 1
3904
H_GHI#
J26 K25 K26 L25
AA21 AA6 F20 F6 A22 A7
AD24 AA2 AC21 AC20 AC24 AC23 AA20 AB22 U6 W4 Y3 A6
E22 K22 R22 W22
F21 J23 P23 W23
L5 R5
E21 G25 P26 V21
AE25
C3 V6 AB26
AD22 A4
AD2 AD3
+1.2VP
+CPU_COREVL
2
H_THERMTRIP#
E13
E15
E17
E19
E23
E26
F10
F12
F14
F16
F18
F22
F25
F5
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117E4VSS_118E7VSS_119E9VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125F2VSS_126
VSS_127
VSS_128
GTLREF0 GTLREF1 GTLREF2 GTLREF3
ITPCLKOUT0 ITPCLKOUT1
TESTHI10
DSTBN#0 DSTBN#1 DSTBN#2 DSTBN#3
DSTBP#0 DSTBP#1 DSTBP#2 DSTBP#3
ADSTB#0 ADSTB#1
PROCHOT#
VSSSENSE
VID0
VID1
VID2
VID3
VID4
AE5
AE4
AE3
AE2
AE1
PCIRST#<10,16,18, 22,23,25,26,30,33>
Q62
2N7002
NC5
NC6
AF24
AE21
CPU_V ID4 <8,40> CPU_V ID3 <8,40> CPU_V ID2 <8,40> CPU_V ID1 <8,40> CPU_V ID0 <8,40>
G
2
13
D
S
VCCVID
AF4
1 2
R317@0_0402_5%
+H_GTLREF1
TESTTHI0_1
TESTTHI2_7
ITPCLKOUT0 ITPCLKOUT1 TESTTHI8_10
H_GHI#
H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3
H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3
H_DBI#0 H_DBI#1 H_DBI#2 H_DBI#3
H_DBR#
H_PROCHOT#
H_SLP#
H_VSSA
1
C317
.1U_0402_16V4Z
12
R320
470_0402_5%
I
1 2
R318 56_0402_5%
PM_CPUPERF#
For Mobile
R285 56_0402_5%
1 2
R275 56_0402_5%
1 2
R293 56_0402_5%
1 2
R276 56_0402_5%
1 2
R294 56_0402_5%
1 2
H_DSTBN#[0..3]
H_DSTBP#[0..3]
H_DBI#[0..3]
R266 @0_0402_5%
1 2
R311 62_0402_5%
TP1
PROCHOT#<19,31>
R303
1K_0402_5%
H_DSTBN#[0..3] <9>
H_DSTBP#[0..3] <9>
H_ADSTB#0 <9> H_ADSTB#1 <9>
H_DBI#[0..3] <9>
12
H_ITP_DBR# <8>
H_SLP# <18>
+3VS
1 2
3 1
J
+CPU_CORE
PM_CPUPERF# <19>
+CPU_CORE
SYSRST# <19>
+CPU_CORE
+CPU_CORE
R307
470_0402_5%
1 2
Q26
2
3904
H_PROCHOT#
Dell-Compal Confidential
Compal Electronics, Inc.
Title
Mobile Northwood / P4 uFCPGA & Thermal sensor (2/2)
Size Document Number Rev
Abacus/TangII LA-1452
Custom
F
G
H
Date: Sheet
I
643Monday, August 26, 2002
0.2
of
J
Page 7
A
Layout note :
Place close to CPU, Use 2~3 vias per PAD. Place .22uF caps underneath balls on solder side. Place 10uF caps on the peripheral near balls.
1 1
Use 2~3 vias per PAD.
Please place these cap in the socket cavity area
+CPU_CORE
12
2 2
3 3
C407
10U_1206_6.3V7K
+CPU_CORE
12
C412
10U_1206_6.3V7K
Please place these cap on the socket north side
+CPU_CORE
12
C388
10U_1206_6.3V7K
B
12
C391 10U_1206_6.3V7K
12
C376 10U_1206_6.3V7K
12
C408 10U_1206_6.3V7K
12
C63 10U_1206_6.3V7K
12
C290 10U_1206_6.3V7K
12
C400 10U_1206_6.3V7K
C
12
C65 10U_1206_6.3V7K
12
C282 10U_1206_6.3V7K
12
C258 10U_1206_6.3V7K
12
C294 10U_1206_6.3V7K
12
C406 10U_1206_6.3V7K
12
C293 10U_1206_6.3V7K
D
E
Layout note :
Place close to CPU power and ground pin as possible (<1inch)
For Desktop's CPU:
ESR total=0.75m ohm C total=6350uF
For Mobile's CPU:
ESR total=1.875m ohm C total=2590uF
F
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
.22U_0603_10V7K
+12VALW
G
12
C390
+
470U_D4_2.5V_10m
12
C352
+
470U_D4_2.5V_10m
12
C151
+
330U_D2_2.5V_15m
.22U_0603_10V7K
12
C104
+
+
+
12
C111
.22U_0603_10V7K
12
C371
470U_D4_2.5V_10m
12
C259
470U_D4_2.5V_10m
12
C152 330U_D2_2.5V_15m
.22U_0603_10V7K
12
C113
H
For DT
12
C261
+
470U_D4_2.5V_10m
12
C148
+
470U_D4_2.5V_10m
12
C265
+
330U_D2_2.5V_15m
12
C147
+
470U_D4_2.5V_10m
12
C149
+
470U_D4_2.5V_10m
12
C262
+
330U_D2_2.5V_15m
PLACE ON CPU SIDE
12
C119
.22U_0603_10V7K
.22U_0603_10V7K
12
C120
.22U_0603_10V7K
12
C117
I
12
C110
.22U_0603_10V7K
12
C112
12
C263
+
470U_D4_2.5V_10m
12
C150
+
470U_D4_2.5V_10m
12
C266
+
330U_D2_2.5V_15m
12
C116
.22U_0603_10V7K
J
.22U_0603_10V7K
12
C118
+CPU_CORE
4 4
5 5
12
10U_1206_6.3V7K
+CPU_CORE
12
10U_1206_6.3V7K
C411
C403
12
C410 10U_1206_6.3V7K
12
C405 10U_1206_6.3V7K
12
C257 10U_1206_6.3V7K
12
C291 10U_1206_6.3V7K
12
C402 10U_1206_6.3V7K
12
C99 10U_1206_6.3V7K
12
C401 10U_1206_6.3V7K
SUSP<17,33>
.1U_0402_16V4Z
EN_FAN1<30>
R385 13K_0603_1%
Please place these cap on the socket south side
+CPU_CORE
12
C122
10U_1206_6.3V7K
6 6
7 7
+CPU_CORE
12
10U_1206_6.3V7K
+CPU_CORE
12
10U_1206_6.3V7K
C351
C409
12
C121 10U_1206_6.3V7K
12
C292 10U_1206_6.3V7K
12
C64 10U_1206_6.3V7K
12
C356 10U_1206_6.3V7K
12
C368 10U_1206_6.3V7K
12
C68 10U_1206_6.3V7K
12
C62 10U_1206_6.3V7K
12
C100 10U_1206_6.3V7K
12
C66 10U_1206_6.3V7K
12
C404 10U_1206_6.3V7K
12
C296 10U_1206_6.3V7K
+12VS
EN_FAN2<30>
R10 13K_0603_1%
Q29
2
1 3
12
C574
U10 LMV321_SOT23-5
12
U1 LMV321_SOT23-5
12
SI2303DS
+12VS
+5VS
5
1
+
3
-
2
R381
7.32K_0603_1%
+5VS
5
1
+
3
-
2
R6
7.32K_0603_1%
Fan1 Control circuit
R376
3.48K_0603_1%
4
12
12
21
D22 1N4148
31
2
Q12 2SA1036K
Q10
FMMT619
C578
.1U_0402_16V4Z
1 2
D21 1N4148
2
Fan2 Control circuit
Q8
R11
3.48K_0603_1%
4
12
12
21
D20 1N4148
31
2
Q1 2SA1036K
2SC2411EK
C234
.1U_0402_16V4Z
1 2
D6 @1N4148
2
3 1
2 1
3 1
2 1
+5VS
D14 1SS355
2 1
+5VFAN_1
C566
@1000P_0402_50V7K
+5VS
D11 1SS355
2 1
+5VFAN_2
C235
@1000P_0402_50V7K
JP12
1 2 3
MOLEX_53398-0390_3P
1 2
R340 10K_0402_5%
FAN1_TACH <30>
JP19
1 2 3
MOLEX_53398-0390_3P
1 2
R200 10K_0402_5%
FAN2_TACH <30>
+3VS
+3VS
Dell-Compal Confidential
8 8
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMP AL ELECTRONIC S, INC. NEITH ER THIS SHEET NO R THE INFORM ATION IT CONT AINS
A
B
C
D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
E
F
G
H
Compal Electronics, Inc.
Title
CPU Decoupling CAP. & Fan control
Size Document Number Rev
Abacus/TangII LA-1452
Custom Date: Sheet
I
of
743Monday, August 26, 2002
J
0.2
Page 8
10
9
8
7
6
5
4
3
2
1
Mobile CPU Desktop CPU
H H
CPU_VID0<6,40>
CPU_VID1<6,40>
CPU_VID2<6,40>
CPU_VID3<6,40>
G G
CPU_VID4<6,40>
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
R260 1K_0402_5%
R259 1K_0402_5%
R258 1K_0402_5%
R257 1K_0402_5%
R256 1K_0402_5%
+3VS
12
12
12
12
12
MO/DT_CPU
VID
VCC
1.750V
1.700V
1.650V
1.600V
1.550V
1.500V
1.450V
1.400V
1.350V
1.300V
1.250V
+CPU_CORE
F F
E E
ITP_BPM0<6> ITP_BPM1<6>
ITP_PRDY#<6>
ITP_PREQ#<6 >
H_RESET#<6,9>
ITP_TCK<6>
CLK_ITP<6>
CLK_ITP#<6>
C201 @2.2P_0402_16V8J
12
C200
@10U_1206_6.3V7K
12
12
C199
@.1U_0402_16V4Z
C198
12
@2.2P_0402_16V8J
12
C560
@.1U_0402_16V4Z
JP15
1
2
1
3
4
3
5
6
5
7
8
7
9
10
9
11
12
11
13
14
13 151516 171718 191920 212122 232324 2525K
@2MM SMT KEY26
R184 @1.5K_0603_1%
1 2
R183 @75_0603_1%
1 2
R372 @39_0603_1%
1 2
R310 @150_0603_1%
1 2
2 4 6 8 10 12 14 16 18 20 22 24 26
R373 @33_0402_5%
12
12
R304 @27.4_0603_1%
+CPU_CORE
AGP_BUSY # <16,19> H_ITP_DBR# <6>
ITP_TDI <6> ITP_TMS <6> ITP_TRST# <6> ITP_TCK <6>
ITP_TDO <6>
1.200V
1.150V
1.100V
1.050V
1.000V
0.975V
0.950V
0.925V
0.900V
0.875V
0.850V
0.825V
0.800V
0.775V
0.750V
0.725V
0.700V
D D
ITP Debug Connector
0.675V
0.650V
0.625V
0.600V
10
00000
0000
1
000
00 0
00
0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 0000
1 1 1
1
1
1
0000
1
00
1
0
1
1
0
1
1
1
1
0
1
1
1
1
1
1
1
1
000
0 000
1
00
1
1
00
1
0
1
1
0
1
1
1
0
00
1
00
1
1
0
1
1
1
1
0
1
1
1
1
1
00 01 00011
1 0000 1
1 000 1
1 0 1 00 1 0
1
0 0
0
11
0
1
11
0
0
0
1
0
0
1
0
1
1
0
1
1
0
1
1
0
1
1
1
1
1
1
1
1 XXXXX
1
1
X
000
XXX 1 000
XXXXX 1 0 1
XXXXX 00 1
XXXXX
1 00
XXXXX 1 0
XXXXX 11111
VRM output off 1 1 1 1
0412134023
0 0
0
0
11
0
0
0 0
0
0
1
0
0
0
1
0
0
0
1
0 0
0
0
1
XXXXX
X
XXXXXXX
X
XX
X
XXXX
XXXXX XXXXX
XXXXX
XXXXX XXXXX
XXXXX
XXXXX 1
C C
+5VS
12
C482
U25
SMB_EC_DA2<6,30>
B B
SMB_EC_CK2<6,30>
1
SDA
2
SCL
3
OS#
4
GND
LM75CIMMX-5
Address:1001_000X Address:1001_000X
VCC
8 7
A0
6
A1
5
A2
.1U_0402_16V4Z
R351 1K_0402_5%
1 2
SMB_EC_DA2<6,30>
SMB_EC_CK2<6,30>
U23
1
SDA
2
SCL
3
OS#
4
GND
LM75CIMMX-5
VCC
8 7
A0
6
A1
5
A2
C394
.1U_0402_16V4Z
1 2
1 2
R308 10K_0402_5%
12
R306 1K_0402_5%
+5VS
Dell-Compal Confidential
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMP AL ELECTRONIC S, INC. NEITH ER THIS SHEET NO R THE INFORM ATION IT CONT AINS
10
9
8
7
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
6
5
4
3
COMPAL Electronics, Inc.
Title
CPU VID & ITP PORT
Size Document Number Rev
Abacus/TangI I LA-1452
Custom Date: Sheet
2
of
843Monday, August 26, 2002
1
0.2
Page 9
5
HD#[0..63]
HA#[3..31]
U12A
HD#0
D D
C C
B B
H_DSTBP#0<6> H_DSTBP#1<6> H_DSTBP#2<6> H_DSTBP#3<6> H_DSTBN#0<6> H_DSTBN#1<6> H_DSTBN#2<6> H_DSTBN#3<6>
H_RESET#<6,8>
CLK_MCH_BCLK<15>
CLK_MCH_BCLK#<15>
MCH_GTLREF<11>
C335
.1U_0402_10V6K
.1U_0402_10V6K
HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63
12
12
C304
12
.1U_0402_10V6K
BROOKDALE-GL/PE
T30
HD#0
R33
HD#1
R34
HD#2
N34
HD#3
R31
HD#4
L33
HD#5
L36
HD#6
P35
HD#7
J36
HD#8
K34
HD#9
K36
HD#10
M30
HD#11
M35
HD#12
L34
HD#13
K35
HD#14
H36
HD#15
G34
HD#16
G36
HD#17
J33
HD#18
D35
HD#19
F36
HD#20
F34
HD#21
E36
HD#22
H34
HD#23
F35
HD#24
D36
HD#25
H35
HD#26
E33
HD#27
E34
HD#28
B35
HD#29
G31
HD#30
C36
HD#31
D33
HD#32
D30
HD#33
D29
HD#34
E31
HD#35
D32
HD#36
C34
HD#37
B34
HD#38
D31
HD#39
G29
HD#40
C32
HD#41
B31
HD#42
B32
HD#43
B30
HD#44
B29
HD#45
E27
HD#46
C28
HD#47
B27
HD#48
D26
HD#49
D28
HD#50
B26
HD#51
G27
HD#52
H26
HD#53
B25
HD#54
C24
HD#55
B23
HD#56
B24
HD#57
E23
HD#58
C22
HD#59
G25
HD#60
B22
HD#61
D24
HD#62
G23
HD#63
L31
HDSTBP0#
J34
HDSTBP1#
E29
HDSTBP2#
E25
HDSTBP3#
N31
HDSTBN0#
G33
HDSTBN1#
C30
HDSTBN2#
D25
HDSTBN3#
D22
CPURST#
K30
HCLK
J31
HCLK#
D27
HD_VREF2
H24
HD_VREF1
H30
HD_VREF0
AD30
HA_VREF
P30
HCC_VREF
BROOKDALE-GL /PE_760P
C274
82845GL-INT VGA
82845PE-EXT VGA
HOST,HUB
HD#[0..63] <5>
HA#[3..31] <5>
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8
HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
HADSTB0# HADSTB1#
HIT#
HITM#
ADS# BNR# BPRI#
BREQ0#
DBSY#
DEFER#
DRDY# HTRDY# HLOCK#
DINV3 DINV2 DINV1 DINV0
HREQ0# HREQ1# HREQ2# HREQ3# HREQ4#
HI10
HI_STBS HI_STBF
RS2# RS1# RS0#
HX_RCOMP HY_RCOMP
HX_SWING HY_SWING
HI_VREF
HI_RCOMP
HI_SWING
W31 AA33 AB30 V34 Y36 AC33 Y35 AA36 AC34 AB34 Y34 AB36 AC36 AC31 AF35 AD36 AD35 AE34 AD34 AE36 AF36 AE33 AF34 AG34 AG36 AE31 AH35 AG33 AG31
AB35 AF30
P36 M36 T36 T34 M34 U33 U31 N36 U36 V30 T35
C26 B33 C35 N33
V36 AA31 W33 AA34 W35
AF2 AE2
HI9
AF3
HI8
AE5
HI7
AE4
HI6
AF4
HI5
AD8
HI4
AC5
HI3
AC7
HI2
AB8
HI1
AA7
HI0
AD4 AC4
P34 U34 R36
B28 V35 H28 Y30 AD3 AC2 AD2
4
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
HI10 HI9 HI8 HI7 HI6 HI5 HI4 HI3 HI2 HI1 HI0
HX_RCOMP HY_RCOMP
R295
1 2
68.1_0603_1%
12
C302
.1U_0402_10V6K
H_ADSTB#0 <6> H_ADSTB#1 <6>
H_HIT# <5> H_HITM# <5> H_ADS# <5> H_BNR# <5> H_BPRI# <5> H_BREQ0# <5> H_DBSY# <6> H_DEFER# <5> H_DRDY# <6> H_TRDY# <6> H_LOCK# <5>
H_DBI#3 <6> H_DBI#2 <6> H_DBI#1 <6> H_DBI#0 <6>
H_REQ#0 <5> H_REQ#1 <5> H_REQ#2 <5> H_REQ#3 <5> H_REQ#4 <5> HI[0..10] <18>
HUB_PSTRB <18> HUB_PSTRB# <18>
H_RS#2 <6> H_RS#1 <6> H_RS#0 <6>
1 2
24.9_0603_1%
10 mil
10 mil
H_XY_ SWING <11>
HUB_V REF <11,18>
HUB_VSW ING <11,18>
12
R18
R263
1 2
24.9_0603_1%
C327
.1U_0402_10V6K
+1.5VS
3
DDR_SDQ[0..63]<12>
DDR_SDQS[0..7]<12>
DDR_SDM[0..7]<12>
DDR_SMA[0..12]<12,13>
DDR_CLK2#<12>
DDR_CLK2<12> DDR_CLK3# <13>
DDR_CLK1#<12>
DDR_CLK1<12>
DDR_CLK0#<12>
DDR_CLK0<12>
DDR_SDQ0
AN4
DDR_SDQ1
AP2
DDR_SDQ2
AT3
DDR_SDQ3
AP5
DDR_SDQ4
AN2
DDR_SDQ5
AP3
DDR_SDQ6
AR4
DDR_SDQ7
AT4
DDR_SDQ8
AT5
DDR_SDQ9
AR6
DDR_SDQ10
AT9
DDR_SDQ11
AR10
DDR_SDQ12
AT6
DDR_SDQ13
AP6
DDR_SDQ14
AT8
DDR_SDQ15
AP8
DDR_SDQ16
AP10
DDR_SDQ17
AT11
DDR_SDQ18
AT13
DDR_SDQ19
AT14
DDR_SDQ20
AT10
DDR_SDQ21
AR12
DDR_SDQ22
AR14
DDR_SDQ23
AP14
DDR_SDQ24
AT15
DDR_SDQ25
AP16
DDR_SDQ26
AT18
DDR_SDQ27
AT19
DDR_SDQ28
AR16
DDR_SDQ29
AT16
DDR_SDQ30
AP18
DDR_SDQ31
AR20
DDR_SDQ32
AR22
DDR_SDQ33
AP22
DDR_SDQ34
AP24
DDR_SDQ35
AT26
DDR_SDQ36
AT22
DDR_SDQ37
AT23
DDR_SDQ38
AT25
DDR_SDQ39
AR26
DDR_SDQ40
AP26
DDR_SDQ41
AT28
DDR_SDQ42
AR30
DDR_SDQ43
AP30
DDR_SDQ44
AT27
DDR_SDQ45
AR28
DDR_SDQ46
AT30
DDR_SDQ47
AT31
DDR_SDQ48
AR32
DDR_SDQ49
AT32
DDR_SDQ50
AR36
DDR_SDQ51
AP35
DDR_SDQ52
AP32
DDR_SDQ53
AT33
DDR_SDQ54
AP34
DDR_SDQ55
AT35
DDR_SDQ56
AN36
DDR_SDQ57
AM36
DDR_SDQ58
AK36
DDR_SDQ59
AJ36
DDR_SDQ60
AP36
DDR_SDQ61
AM35
DDR_SDQ62
AK35
DDR_SDQ63
AK34
DDR_SDQ[0..63]
DDR_SDQS[0..7]
DDR_SDM[0..7]
DDR_SMA[0..12]
U12B
SDQ_0 SDQ_1 SDQ_2 SDQ_3 SDQ_4 SDQ_5 SDQ_6 SDQ_7 SDQ_8 SDQ_9 SDQ_10 SDQ_11 SDQ_12 SDQ_13 SDQ_14 SDQ_15 SDQ_16 SDQ_17 SDQ_18 SDQ_19 SDQ_20 SDQ_21 SDQ_22 SDQ_23 SDQ_24 SDQ_25 SDQ_26 SDQ_27 SDQ_28 SDQ_29 SDQ_30 SDQ_31 SDQ_32 SDQ_33 SDQ_34 SDQ_35 SDQ_36 SDQ_37 SDQ_38 SDQ_39 SDQ_40 SDQ_41 SDQ_42 SDQ_43 SDQ_44 SDQ_45 SDQ_46 SDQ_47 SDQ_48 SDQ_49 SDQ_50 SDQ_51 SDQ_52 SDQ_53 SDQ_54 SDQ_55 SDQ_56 SDQ_57 SDQ_58 SDQ_59 SDQ_60 SDQ_61 SDQ_62 SDQ_63
BROOKDALE-GL /PE_760P
AL21
SCMD_CLK0
AN11
AM34
AP21
AP9
AK22
AP11
SCMD_CLK1
SCMD_CLK0#
AP33
AL33
AN21
AN9
AN34
SCMD_CLK2
SCMD_CLK3
SCMD_CLK4
SCMD_CLK1#
SCMD_CLK5
SCMD_CLK2#
SCMD_CLK3#
SCMD_CLK4#
SCMD_CLK5#
BROOKDALE-GL/PE
DDR
SMAA12/BS0 SMAA11/DQS8 SMAA10/DQ31
SMAA9/SMA3 SMAA8/SMA4 SMAA7/SMA6
SMAA6/SDQ29
SMAA5/SMA8
SMAA4/SMA11
SMAA3/SMA7
SMAA2/SMA9 SMAA1/SDQ19 SMAA0/SMA12
SCKE3/SCK#5
SCKE2/RSVD SCKE1/SDQ58
SCKE0/RSVD
SCS#0/SCKE2
SCS#1/RSVD SCS#2/SCK#2 SCS#3/SCAS#
SRAS#/SCKE0
SCAS#/RSVD
SWE#/SDQ5
SRCVEN_OUT#
SRCVEN_IN#
SMY_RCOMP
SM_VREF
SMAB5 SMAB4 SMAB2 SMAB1
SBA1 SBA0
SDQS0 SDQS1 SDQS2 SDQS3 SDQS4 SDQS5 SDQS6 SDQS7
SDM0 SDM1 SDM2 SDM3 SDM4 SDM5 SDM6 SDM7
2
DDR_CLK3 <13>
DDR_CLK4 <13> DDR_CLK4# <13> DDR_CLK5 <13> DDR_CLK5# <13>
DDR_SMA12
AN15
DDR_SMA11
AL15
DDR_SMA10
AK26
DDR_SMA9
AK16
DDR_SMA8
AN17
DDR_SMA7
AP17
DDR_SMA6
AP19
DDR_SMA5
AL17
DDR_SMA4
AL19
DDR_SMA3
AK20
DDR_SMA2
AP23
DDR_SMA1
AN25
DDR_SMA0
AL25
DDR_SMAB5
AK18
DDR_SMAB4
AN19
DDR_SMAB2
AN23
DDR_SMAB1
AP25
DDR_SBS1
AP27
DDR_SBS0
AN27
DDR_SDQS0
AR2
DDR_SDQS1
AT7
DDR_SDQS2
AT12
DDR_SDQS3
AT17
DDR_SDQS4
AR24
DDR_SDQS5
AT29
DDR_SDQS6
AT34
DDR_SDQS7
AL36
DDR_SDM0
AP4
DDR_SDM1
AR8
DDR_SDM2
AP12
DDR_SDM3
AR18
DDR_SDM4
AT24
DDR_SDM5
AP28
DDR_SDM6
AR34
DDR_SDM7
AL34
DDR_CKE3
AL13
DDR_CKE2
AK14
DDR_CKE1
AN13
DDR_CKE0
AP13
DDR_SCS#0
AL29
DDR_SCS#1
AP31
DDR_SCS#2
AK30
DDR_SCS#3
AN31
DDR_SRAS#
AK28
DDR_SCAS#
AN29
DDR_SWE#
AP29
RDCLKO
AK24
RDCLKI
AL23
AJ34
AM2
12
1 2
C364
.1U_0402_10V6K
DDR_SMAB5 <13> DDR_SMAB4 <13> DDR_SMAB2 <13> DDR_SMAB1 <13>
DDR_SBS1 <12,13> DDR_SBS0 <12,13>
DDR_CKE3 <13> DDR_CKE2 <13> DDR_CKE1 <12> DDR_CKE0 <12>
DDR_SCS#0 <12> DDR_SCS#1 <12> DDR_SCS#2 <13> DDR_SCS#3 <13>
DDR_SR AS# <12,13> DDR_SC AS# <12,13> DDR_SW E# <12,13>
12
R297 @0_0603_5%
R299 0_0603_5%
RDCLKI & RDCLKO 100mils LENGTH 5mils WIDTH
12
R292
60.4_0603_1%
R298
60.4_0603_1%
SDREF
12
1
+2.5V
12
C357
.1U_0402_10V6K
Close to H28 Close to Y30
A A
Layout note :
1. HX_RCOM P, HY_RCOMP Trace width 10 mil.
2. Terminator Max 500 mil.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Date: Sheet
Dell-Compal Confidential
Compal Electronics, Inc.
BROOKDALE-GL/PE (1/3)
Abacus/TangII LA-1452
1
0.2
of
943Monday, August 26, 2002
Page 10
A
U12C
AGP_PIPE#<16>
A A
AGP_WBF#<16> AGP_RBF#<16>
AGP_ST0<16> AGP_ST1<16> AGP_ST2<16>
AGP_ADSTB0<16>
AGP_ADSTB0#<16>
AGP_ADSTB1<16>
AGP_ADSTB1#<16>
AGP_SBSTB<16>
AGP_SBSTB#<16>
AGP_FRAME#<16>
AGP_IRDY#<16>
AGP_TRDY#<16>
AGP_STOP#<16>
AGP_DEVSEL#<16>
AGP_REQ#<16>
AGP_PAR<16>
AGP_GNT#<16> AGP_C/BE#3<16> AGP_C/BE#2<16> AGP_C/BE#1<16> AGP_C/BE#0<16>
B B
C C
D D
INT_HSYNC<16> INT_VSYNC<16>
INTDDCDA<16>
+AGPREF
INTDDCCK<16>
R17
137_0603_1%
RSTIN#
INTCRT_B#
INTCRT_G#
INTCRT_R#
AGP_PIPE# AGP_SBA0 AGP_SBA1 AGP_SBA2 AGP_SBA3 AGP_SBA4 AGP_SBA5 AGP_SBA6 AGP_SBA7
AGP_ST0 AGP_ST1 AGP_ST2
AGP_C/BE#3 AGP_C/BE#2 AGP_C/BE#1 AGP_C/BE#0
47.5_0603_1% R215
1 2 1 2
R21447.5_0603_1%
R241
36.5_0603_1%
R43 0_0402_5%
12
C69
1 2
@15P_0402_50V8J
A
H8
GPIPE#
C3
GSBA0/ADDIN0
C2
GSBA1/ADDIN1
D3
GSBA2/ADDIN2
D2
GSBA3/ADDIN3
E4
GSBA4/ADDIN4
E2
GSBA5/ADDIN5
F3
GSBA6/ADDIN6
F2
GSBA7/ADDIN7
G5
GWBF#
G7
GRBF#
C4
GST0
B4
GST1
B3
GST2
V8
GAD_STB0/DVOBCLK
U7
GAD_STB0#/DVOBCLK#
M8
GAD_STB1/DVOCCLK
L7
GAD_STB1#/DVOCCLK#
F4
GSBSTB
E5
GSBSTB#
M4
G_FRAME#/MDVI DATA
N7
G_IRDY#/MI2C CLK
N5
G_TRDY#/MDVI CLK
P2
G_STOP#/MDDC DATA
N2
G_DEVSEL#/MI2C DATA
D5
G_REQ#
P4
G_PAR/ADD_DETECT
B5
G_GNT#
H2
GCBE3#/DVOCD5
M2
GCBE2#
N4
GCBE1#/DVOBBLANK#
R4
GCBE0#/DVOBD7
L2
AGP RCOMP/DVOBCRCOMP
W2
AGP_VREF
B7
HSYNC
C6
VSYNC
D7
DDCA_CLK
C7
DDCA_DATA
B16
REFSET
BROOKDALE-GL /PE_760P
12
C324
.1U_0402_10V6K
PCIRST# <6,16,18,2 2,23,25,26,30,33>
AGP/DVO
BROOKDALE-GL/PE
ANALOG DISPLAY
B
AGP_AD[0..31]<16>
AGP_SBA[0..7]<16>
GAD0/DVOBHSYNC GAD1/DVOBVSYNC
GAD2/DVOBD1 GAD3/DVOBD0 GAD4/DVOBD3 GAD5/DVOBD2 GAD6/DVOBD5 GAD7/DVOBD4 GAD8/DVOBD6 GAD9/DVOBD9
GAD10/DVOBD8 GAD11/DVOBD11 GAD12/DVOBD10
GAD13/DVOBCCLKINT#
GAD14/DVOBFLDSTL
GAD15/MDDC CLK GAD16/DVOCVSYNC GAD17/DVOCHSYNC
GAD18/DVOCBLANK#
GAD19/DVOCD0 GAD20/DVOCD1 GAD21/DVOCD2 GAD22/DVOCD3 GAD23/DVOCD4 GAD24/DVOCD7 GAD25/DVOCD6 GAD26/DVOCD9
GAD27/DVOCD8 GAD28/DVOCD11 GAD29/DVOCD10
GAD30/DVOBCINTR#
GAD31/DVOCFLDSTL
GCLKIN
RSTIN#
DREFCLK
PWROK PSBSEL
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
*
+1.5VS
+1.5VS
+1.5VS
.1U_0402_10V6K
NEAR AA1
B
AGP_AD[0..31]
AGP_SBA[0..7]
AGP_AD0
V4
AGP_AD1
V2
AGP_AD2
W4
AGP_AD3
W5
AGP_AD4
U5
AGP_AD5
U4
AGP_AD6
U2
AGP_AD7
V3
AGP_AD8
T2
AGP_AD9
T3
AGP_AD10
T4
AGP_AD11
R2
AGP_AD12
R5
AGP_AD13
R7
AGP_AD14
T8
AGP_AD15
P3
AGP_AD16
P8
AGP_AD17
K4
AGP_AD18
K2
AGP_AD19
J2
AGP_AD20
M3
AGP_AD21
L5
AGP_AD22
L4
AGP_AD23
H4
AGP_AD24
G2
AGP_AD25
K3
AGP_AD26
J4
AGP_AD27
J5
AGP_AD28
J7
AGP_AD29
H3
AGP_AD30
K8
AGP_AD31
G4
AE7
RSTIN#
AJ31 D14
R270 2@8.2K_0402_5%
E7
1 2
Y3
INTCRT_B
G15
INTCRT_B#
H16
INTCRT_G
E15
INTCRT_G#
F16
INTCRT_R
C15
INTCRT_R#
D16
12
R273
8.2K_0402_5%
PSBSEL FSB FREQUENCY
12
400 MHZ
533 MHZ
VCCA_DPLL
12
12
C28
22U_1206_10V4Z
12
+
VCCA_FSB
12
0
1
L3
FBM-L11-201209-221LMAT
1 2
C29
22U_1206_10V4Z
L4
FBM-L11-201209-221LMAT
1 2
C27
.1U_0402_10V6K
12
C343
Place close to pin AE7
CLK_MCH_DISPLAY
@10_0402_5%
@10P_0402_50V8K
Place close to pin AE7
CLK_MCH_66M
@22_0402_5%
@10P_0402_50V8K
CLK_MCH_66M <15>
CLK_MCH_DISPLAY <15> PM_PWROK <19,30,32> H_BSEL0 <6> H_SEL0 <15> INTCRT_B <16>
INTCRT_G <16>
INTCRT_R <16>
C22 150U_D_6.3VM
12
C33
.1U_0402_10V6K
C341
.1U_0402_10V6K
NEAR AE1
C
+1.5VS
12
R234
12
C249
12
R286
12
C333
+CPU_CORE
R277
+1.5VS
12
C251
.1U_0402_10V6K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
12
1.5K_0402_5%
C
U12D
Y19
VCC1
AA19
VCC2
W20
VCC3
U21
VCC4
W21
VCC5
AA21
VCC6
A9
VCC7
B9
VCC8
C9
VCC9
D9
VCC10
E9
VCC11
B10
VCC12
C10
VCC13
D10
VCC14
F10
VCC15
H10
VCC16
A11
VCC17
B11
VCC18
C11
VCC19
D11
VCC20
E11
VCC21
G11
VCC22
J11
VCC23
B12
VCC24
C12
VCC25
D12
VCC26
F12
VCC27
H12
VCC28
G13
VCC29
J13
VCC30
H14
VCC31
J15
VCC32
AA17
VCC33
W17
VCC34
U17
VCC35
W18
VCC36
V19
VCC37
U19
VCC38
K10
VCC39
K12
VCC40
K14
VCC41
K16
VCC42
W19
VCC43
B18
VTTFSB0
C18
VTTFSB1
D18
VTTFSB2
H18
VTTFSB3
B19
VTTFSB4
C19
VTTFSB5
D19
VTTFSB6
E19
VTTFSB7
G19
VTTFSB8
J19
VTTFSB9
B20
VTTFSB10
C20
VTTFSB11
D20
VTTFSB12
F20
VTTFSB13
H20
VTTFSB14
F18
VTTFSB15
K18
VTTFSB16
K20
VTTFSB17
K22
VTTFSB18
K26
VTTFSB19
M28
VTTFSB20
T28
VTTFSB21
Y28
VTTFSB22
AD28
VTTFSB23
AB2
TESTIN#
Y2
MEM_SEL
A37
RSVD0
AB3
RSVD1
AA2
RSVD2
AA3
RSVD3
AA4
RSVD4
AA5
RSVD5
Y4
RSVD6
Y8
RSVD7
W7
RSVD8
AU37
NC
AU36
NC
AT37
NC
AU2
NC
AU1
NC
AT1
NC
AJ35
NC
AH34
NC
BROOKDALE-GL /PE_760P
VCCAGP0A3VCCAGP1A7VCCAGP2C1VCCAGP3D4VCCAGP4D6VCCAGP5G1VCCAGP6K6VCCAGP7L1VCCAGP8L9VCCAGP9
BROOKDALE-GL/PE
P6
VCCAGP10R1VCCAGP11R9VCCAGP12W9VCCAGP13
POWER
D
V6
P10
VCCAGP14
D
V10
AB10
VCCAGP15
VCCAGP16
VCCA_SM0 VCCA_SM1
VTTDECAP0 VTTDECAP1 VTTDECAP2 VTTDECAP3 VTTDECAP4
VCCA_DPLL
VCCA_DAC0 VCCA_DAC1
SMX_RCOMP
VCCSM0 VCCSM1 VCCSM2 VCCSM3 VCCSM4 VCCSM5 VCCSM6 VCCSM7 VCCSM8
VCCSM9 VCCSM10 VCCSM11 VCCSM12 VCCSM13 VCCSM14 VCCSM15 VCCSM16 VCCSM17 VCCSM18 VCCSM19 VCCSM20 VCCSM21 VCCSM22 VCCSM23 VCCSM24 VCCSM25 VCCSM26 VCCSM27 VCCSM28 VCCSM29 VCCSM30 VCCSM31 VCCSM32 VCCSM33 VCCSM34 VCCSM35 VCCSM36 VCCSM37 VCCSM38 VCCSM39 VCCSM40 VCCSM41 VCCSM42 VCCSM43 VCCSM44 VCCSM45 VCCSM46 VCCSM47 VCCSM48 VCCSM49 VCCSM50 VCCSM51 VCCSM52 VCCSM53 VCCSM54 VCCSM55
VCCQSM0 VCCQSM1 VCCQSM2
VCCA_FSB
VCCA_HI
VCCHI0 VCCHI1 VCCHI2 VCCHI3
VCCGPIO
E
+2.5V
AH8 AK8 AG9 AJ9 AL9 AM22 AJ23 AL37 AU9 AK10 AJ11 AL11 AU25 AM26 AU13 AM14 AJ27 AJ1 AL1 AJ15 AP15 AU29 AH2 AJ2 AK2 AL2 AM30 AH3 AJ3 AK3 AL3 AH4 AJ4 AK4 AL4 AU17 AJ5 AL5 AU5 AM18 AJ19 AK32 AU33 AH6 AK6 AP20 AG7 AJ7 AL7 AP7 AH10 AH12 AH14 AH18 AH22 AH26
AG1 AG2
AT20 AT21 AU21
A31 AC37 R37 L37 G37
A17
AD10 AD6 AC9 AC1 AE3
A13 B6 B14 A15
AF10
A2
NC
A36
NC
B37
NC
B1
NC
100U_D_6.3VM
.1U_0402_10V6K
12
VCCA_SM
C640
.1U_0402_10V6K
VCCA_FSB
+1.5VS
VCCA_DPLL
VCCA_DAC
12
R283
60.4_0603_1%
12
C340
+
12
L27 FBM-L11-201209-221LMAT
12
C334
4.7U_0805_10V4Z
C385
12
R281
1_0402_5%
.1U_0402_10V6K
12
C353
.1U_0402_10V6K
12
R287
60.4_0603_1%
12
C399
+
100U_D_6.3VM
12
.1U_0402_10V6K
12
C277
12
C344
.1U_0402_10V6K
12
+
+1.5VS
12
12
+
.1U_0402_10V6K
12
C297
.1U_0402_10V6K
+2.5V
C159
100U_D_6.3VM
L28
FBM-L11-201209-221LMAT
C336
100U_D_6.3VM
12
C316
12
C270
.1U_0402_10V6K
C268
VCCA_DAC
12
.1U_0402_10V6K
12
C332
+3VS
12
C267
12
C32
.1U_0402_10V6K
.01U_0402_25V4Z
Dell-Compal Confidential
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
BROOKDALE-GL/PE (2/3)
Abacus/TangII LA-1452
0.2
of
10 43Monday, August 26, 2002
E
Page 11
5
U12E
AM10
VSS0
AR23
D D
C C
B B
A A
VSS1
AU23
VSS2
F24
VSS3
AM24
VSS4
A25
VSS5
C16
VSS6
N37
VSS7
U18
VSS8
V18
VSS9
Y18
VSS10
AA18
VSS11
AL31
VSS12
AR31
VSS13
AU31
VSS14
F32
VSS15
H32
VSS16
K32
VSS17
M32
VSS18
P32
VSS19
T32
VSS20
V32
VSS21
Y32
VSS22
AB32
VSS23
AD32
VSS24
AF32
VSS25
AH32
VSS26
AM4
VSS27
A5
VSS28
C5
VSS29
AG5
VSS30
AN5
VSS31
AR5
VSS32
AR19
VSS33
AM32
VSS34
A33
VSS35
C33
VSS36
AJ33
VSS37
AN33
VSS38
AR33
VSS39
F6
VSS40
H6
VSS41
M6
VSS42
T6
VSS43
Y6
VSS44
AB6
VSS45
AF6
VSS46
AM6
VSS47
U20
VSS48
V20
VSS49
Y20
VSS50
AA20
VSS51
AM20
VSS52
A21
VSS53
B21
VSS54
C21
VSS55
D21
VSS56
E21
VSS57
G21
VSS58
J21
VSS59
D34
VSS60
W34
VSS61
A35
VSS62
E35
VSS63
G35
VSS64
J35
VSS65
L35
VSS66
AN7
VSS67
AR7
VSS68
AU7
VSS69
B8
VSS70
C8
VSS71
D8
VSS72
F8
VSS73
V21
VSS74
Y21
VSS75
AJ21
VSS76
AR21
VSS77
F22
VSS78
H22
VSS79
M10
VSS80
T10
VSS81
Y10
VSS82
AH16
VSS83
AH20
VSS84
AH24
VSS85
BROOKDALE-GL /PE_760P
AR9
AR17
AJ17
Y17
AG4
AB4
AU3
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
BROOKDALE-GL/PE
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
N35
R35
U35
AL35
AA35
AE35
AC35
AN35
AR35
AG35
VSS117
VSS95
AR3
VSS118
VSS
VSS96
AU35
AN3
AM3
AG3
AC3
C31
AH30
V17
J17
G17
E17
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS97
VSS98
VSS99
VSS100
VSS101G9VSS102J9VSS103N9VSS104U9VSS105
VSS106
VSS107
VSS108
VSS109
B36
AF8
W36
AM8
J23
A23
C23
D23
AA9
AE9
4
R264 226_0603_1%
+1.5VS
C17
VSS129
B17
VSS130
AM16
VSS131
W3
VSS132
U3
VSS133
R3
VSS134
D17
VSS135
N3
VSS136
L3
VSS137
J3
VSS138
G3
VSS139
E3
VSS140
AT2
VSS141
F30
VSS142
AR29
VSS143
AJ29
VSS144
AG29
VSS145
AE29
VSS146
AC29
VSS147
AA29
VSS148
W29
VSS149
R29
VSS150
U29
VSS151
N29
VSS152
L29
VSS153
J29
VSS154
C29
VSS155
A29
VSS156
AU15
VSS157
AR15
VSS158
D15
VSS159
B2
VSS160
AR1
VSS161
AN1
VSS162
AE1
VSS163
AA1
VSS164
U1
VSS165
N1
VSS166
J1
VSS167
E1
VSS168
AM28
VSS169
F28
VSS170
AU27
VSS171
AR27
VSS172
AL27
VSS173
F14
VSS174
AR13
VSS175
AJ13
VSS176
J27
VSS177
C27
VSS178
A27
VSS179
E13
VSS180
D13
VSS181
C13
VSS182
B13
VSS183
AM12
VSS184
AK12
VSS185
F26
VSS186
AR25
VSS187
AJ25
VSS188
J25
VSS189
AU11
VSS190
AR11
VSS191
AR37
VSS192
AN37
VSS193
C25
VSS194
AJ37
VSS195
AG37
VSS196
AE37
VSS197
AA37
VSS198
U37
VSS199
AH28
VSS200
AF28
VSS201
AB28
VSS202
V28
VSS203
P28
VSS204
K28
VSS205
K24
VSS206
J37
VSS207
E37
VSS208
C37
VSS209
AT36
VSS210
AH36
VSS211
B15
VSSA_DAC0
C14
VSSA_DAC1
VSS110
1 2
.01U_0402_25V4Z
+CPU_CORE
12
10U_1206_6.3V7K
12
.1U_0402_10V6K
+2.5V
12
C345
.1U_0402_10V6K
12
C360
.1U_0402_10V6K
+1.5VS
12
C326
.1U_0402_10V6K
12
C301
.1U_0402_10V6K
C245
C288
.1U_0402_10V6K
3
.01U_0402_25V4Z
12
C337
C126
NEAR MCH NEAR ICH
FSB DECOUPLING
10U_1206_6.3V7K
12
C246
.1U_0402_10V6K
.1U_0402_10V6K
12
C281
.1U_0402_10V6K
.1U_0402_10V6K
C346
.1U_0402_10V6K
C367
.1U_0402_10V6K
C329
.1U_0402_10V6K
C300
.1U_0402_10V6K
12
12
12
12
12
.1U_0402_10V6K
12
.1U_0402_10V6K
12
12
R312 100_0603_1%
1 2
12
12
C253
12
C279
.1U_0402_10V6K
.1U_0402_10V6K
12
C393
.1U_0402_10V6K
12
C255
.1U_0402_10V6K
12
C284
SYSTEM MEMORY DECOUPLING
.1U_0402_10V6K
12
C348
C378
C349
.1U_0402_10V6K
12
C380
.1U_0402_10V6K
.1U_0402_10V6K
GMCH DECOUPLING
.1U_0402_10V6K
12
C322
C285
C331
.1U_0402_10V6K
12
C269
.1U_0402_10V6K
.1U_0402_10V6K
PLACE NOTE: CAP PLACE AT MIDPOINT OF THE BUS.
.1U_0402_10V6K
12
C254
12
C289
.1U_0402_10V6K
.1U_0402_10V6K
12
C350
.1U_0402_10V6K
12
C379
.1U_0402_10V6K
12
C308
.1U_0402_10V6K
12
C276
12
R309
100_0603_1%
12
C252
12
C370
12
C383
12
C330
12
C275
12
C392
.1U_0402_10V6K
12
12
C359
.1U_0402_10V6K
12
C384
.1U_0402_10V6K
12
C328
.1U_0402_10V6K
12
C260
.1U_0402_10V6K
2
.01U_0402_25V4Z
NEAR MCH
Within 250milWithin 250mil
C250
.1U_0402_10V6K
.1U_0402_10V6K
12
.1U_0402_10V6K
12
.1U_0402_10V6K
12
.1U_0402_10V6K
12
12
C339
C347
.1U_0402_10V6K
C381
.1U_0402_10V6K
C271
.1U_0402_10V6K
C307
.1U_0402_10V6K
12
C125
.01U_0402_25V4Z
NEAR ICH
+CPU_CORE
+CPU_CORE
.1U_0402_10V6K
12
C363
.1U_0402_10V6K
12
C382
.1U_0402_10V6K
12
C278
.1U_0402_10V6K
12
C295
HUB_VSW ING <9,18>
10 mil Trace, 7mil Space
HUB_V REF <9,18>
R245 49.9_0603_1%
1 2
100_0603_1%
NEAR MCH
R246
12
301_0603_1%
R247
150_0603_1%
12
12
12
12
C362
.1U_0402_10V6K
C366
.1U_0402_10V6K
C298
C287
12
12
.1U_0402_10V6K
.1U_0402_10V6K
R244
1 2
.1U_0402_10V6K
C373
.1U_0402_10V6K
C338
.1U_0402_10V6K
12
C256
.1U_0402_10V6K
12
C311
1
10 mil Trace, 7mil Space
12
12
C299
.1U_0402_10V6K
10 mil Trace, 7mil Space
12
C309
.01U_0402_25V4Z
12
C374
.1U_0402_10V6K
12
C354
.1U_0402_10V6K
12
C342
12
C286
MCH_GTLREF <9>
H_XY_SWING <9>
12
C361
12
C365
12
.1U_0402_10V6K
12
.1U_0402_10V6K
C358
.1U_0402_10V6K
12
C280
C283
Dell-Compal Confidential
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
BROOKDALE-GL/PE (3/3)
Abacus/TangII LA-1452
0.2
of
11 43Monday, August 26, 2002
1
Page 12
A
DDR_SDQ4 DDR_SDQ0
DDR_SDQ1 DDR_SDQ5
DDR_SDQ6
1 1
2 2
3 3
4 4
DDR_SDQ2
DDR_SDQ3 DDR_SDQ7
DDR_SDQ9 DDR_DQ9 DDR_SDQ8
DDR_SDQ13 DDR_DQ13 DDR_SDQ12
DDR_SDQ15 DDR_DQ15 DDR_SDQ14 DDR_DQ14
DDR_SDQ11 DDR_SDQ10
DDR_SDQ16 DDR_SDQ20
DDR_SDQ17 DDR_DQ17
DDR_SDQ22 DDR_DQ22 DDR_SDQ18
DDR_SDQ28 DDR_DQ28 DDR_SDQ24
DDR_SDQ25 DDR_DQ25 DDR_SDQ29
DDR_SDQ[0..63]<9>
DDR_SDQS[0..7]<9>
DDR_SMA[0..12]<9,13>
DDR_SDM[0..7]<9>
DDR_SDQ57 DDR_SDQ61
DDR_SDQ56 DDR_DQ56 DDR_SDQ60
DDR_SDQ58 DDR_SDQ63 DDR_DQ63
DDR_SDQS0
DDR_SDQS1
DDR_SDQS2
DDR_SDQS3
RP32 10_0402_4P2R_5%
1 4 2 3
RP42 10_0402_4P2R_5%
1 4 2 3
RP33 10_0402_4P2R_5%
1 4 2 3
RP43 10_0402_4P2R_5%
1 4 2 3
RP20 10_0402_4P2R_5%
1 4 2 3
RP31 10_0402_4P2R_5%
1 4 2 3
RP21 10_0402_4P2R_5%
1 4 2 3
RP40 10_0402_4P2R_5%
1 4 2 3
RP41 10_0402_4P2R_5%
1 4 2 3
RP35 10_0402_4P2R_5%
1 4 2 3
RP44 10_0402_4P2R_5%
1 4 2 3
RP34 10_0402_4P2R_5%
1 4 2 3
RP45 10_0402_4P2R_5%
1 4 2 3
RP38 10_0402_4P2R_5%
1 4 2 3
RP51 10_0402_4P2R_5%
1 4 2 3
RP50 10_0402_4P2R_5%
1 4 2 3
RP36 10_0402_4P2R_5%
1 4 2 3
R119 10_0402_5%
R109 10_0402_5%
R120 10_0402_5%
R127 10_0402_5%
A
DDR_DQ4 DDR_DQ0
DDR_DQ1 DDR_DQ5
DDR_DQ6 DDR_DQ2
DDR_DQ3 DDR_DQ7
DDR_DQ8
DDR_DQ12
DDR_DQ11 DDR_DQ10
DDR_DQ16 DDR_DQ20
DDR_DQ21DDR_SDQ21
DDR_DQ18
DDR_DQ23DDR_SDQ23 DDR_DQ19DDR_SDQ19
DDR_DQ24
DDR_DQ29
DDR_SDQ[0..63]
DDR_SDQS[0..7]
DDR_SMA[0..12]
DDR_SDM[0..7]
DDR_DQ57 DDR_DQ61
DDR_DQ60
DDR_DQ58 DDR_SDQ59 DDR_DQ59
DDR_DQS0
12
DDR_DQS1
12
DDR_DQS2
12
DDR_DQS3
12
B
DDR_SDQ30 DDR_DQ30 DDR_SDQ26 DDR_DQ26
DDR_SDQ31 DDR_SDQ27
DDR_SDM0 DDR_SDM1
DDR_SDM2 DDR_DM2 DDR_SDM3
DDR_SDM4 DDR_DM4 DDR_SDM5
DDR_SDM6 DDR_DM6 DDR_SDM7
DDR_SDQ37 DDR_DQ37 DDR_SDQ32
DDR_SDQ36 DDR_DQ36 DDR_SDQ33
DDR_SDQ38 DDR_SDQ34
DDR_SDQ35
DDR_SDQ39
DDR_SDQ44
DDR_SDQ40
DDR_SDQ41 DDR_SDQ45
DDR_SDQ46 DDR_SDQ42
DDR_SDQ47 DDR_SDQ43
DDR_SDQ49 DDR_SDQ48
DDR_SDQ53 DDR_SDQ52
DDR_SDQ55 DDR_SDQ54
DDR_SDQ50 DDR_DQ50
DDR_SDQ62
DDR_SDQS4
DDR_SDQS5
DDR_SDQS6
DDR_SDQS7
B
RP46 10_0402_4P2R_5%
1 4 2 3
RP37 10_0402_4P2R_5%
1 4 2 3
R124 10_0402_5%
R117 10_0402_5%
R126 10_0402_5%
R121 10_0402_5%
R108 10_0402_5%
R113 10_0402_5%
R115 10_0402_5%
R118 10_0402_5%
RP16 10_0402_4P2R_5%
1 4 2 3
RP28 10_0402_4P2R_5%
1 4 2 3
RP26 10_0402_4P2R_5%
1 4 2 3
RP15 10_0402_4P2R_5%
1 4 2 3
RP27 10_0402_4P2R_5%
1 4 2 3
RP17 10_0402_4P2R_5%
1 4 2 3
RP29 10_0402_4P2R_5%
1 4 2 3
RP22 10_0402_4P2R_5%
1 4 2 3
RP30 10_0402_4P2R_5%
1 4 2 3
RP18 10_0402_4P2R_5%
1 4 2 3
RP25 10_0402_4P2R_5%
1 4 2 3
RP23 10_0402_4P2R_5%
1 4 2 3
RP39 10_0402_4P2R_5%
1 4 2 3
R114 10_0402_5%
R106 10_0402_5%
R107 10_0402_5%
R129 10_0402_5%
C
DDR_DQ31 DDR_DQ27
DDR_DM0
12
DDR_DM1
12
12
DDR_DM3
12
DDR_CLK1<9>
12
DDR_DM5
12
12
DDR_DM7
12
DDR_DQ32
DDR_DQ33
DDR_DQ38 DDR_DQ34
DDR_DQ35 DDR_DQ39
DDR_DQ44 DDR_DQ40
DDR_DQ41 DDR_DQ45
DDR_DQ46 DDR_DQ42
DDR_DQ47 DDR_DQ43
DDR_DQ49 DDR_DQ48
DDR_DQ53 DDR_DQ52
DDR_DQ55 DDR_DQ54
DDR_DQ51DDR_SDQ51
DDR_DQ62
DDR_DQS4
12
DDR_DQS5
12
DDR_DQS6
12
DDR_DQS7
12
C
DDR_CLK1#<9>
DDR_CLK0<9> DDR_CLK0#<9>
DDR_CKE1<9> DDR_CKE0 <9>
DIMM_SMDATA<13,15,18,26>
Layout note Place these resistors
close to DIMM0, all trace length<500 mil
D
+2.5V
JP22
1
VREF
3
DDR_DQ5 DDR_DQ1
DDR_DQS0 DDR_DQ2
DDR_DQ6 DDR_DQ8
DDR_DQS1
DDR_DQ14 DDR_DQ15
DDR_DQ20 DDR_DQ17 DDR_DQ16 DDR_DQ21
DDR_DQS2 DDR_DQ18
DDR_DQ22 DDR_DQ23 DDR_DQ24
DDR_DQS3
DDR_DQ26 DDR_DQ30
DDR_CKE1 DDR_CKE0
DDR_SMAA12 DDR_SMAA9
DDR_SMAA7 DDR_SMAA5 DDR_SMAA3 DDR_SMAA1
DDR_SMAA10 DDR_BS0 DDR_WE# DDR_SCS#0 DDR_SCS#1
DDR_DQ36
DDR_DQS4 DDR_DQ34
DDR_DQ40
DDR_DQ44 DDR_DQS5
DDR_DQ42 DDR_DQ46
DDR_DQ48 DDR_DQ49
DDR_DQS6 DDR_DQ54
DDR_DQ55 DDR_DQ60
DDR_DQ56 DDR_DQS7
DDR_DQ63 DDR_DQ58
DIMM_SMCLK<13,15,18,26>
+3VS
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
E
VREF
DQ12
DQ13
DQ14 DQ15
DQ20 DQ21
DQ22
DQ23 DQ28
DQ29
DQ30 DQ31
DU/RESET#
CKE0
DU/BA2
RAS# CAS#
DQ36 DQ37
DQ38
DQ39 DQ44
DQ45
DQ46 DQ47
CK1#
DQ52 DQ53
DQ54
DQ55 DQ60
DQ61
DQ62 DQ63
DDR-SODIMM_200_Reverse
VDD DM0
VDD
DM1
VDD VDD
VDD DM2
VDD
DM3
VDD
DM8
VDD
VDD VDD
VDD
VDD DM4
VDD
DM5
VDD
VDD DM6
VDD
DM7
VDD
VSS DQ4 DQ5
DQ6 VSS DQ7
VSS
VSS VSS
VSS
VSS
CB4 CB5 VSS
CB6
CB7
VSS VSS
VSS
BA1
VSS
VSS
VSS
CK1 VSS
VSS
VSS
SA0 SA1 SA2
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100
A11
102
A8
104 106
A6
108
A4
110
A2
112
A0
114 116 118 120 122
S1#
124
DU
126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DU
DIMM0
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
E
+2.5V
F
20mil
DDR_DQ0 DDR_DQ4
DDR_DM0 DDR_DQ7
DDR_DQ3 DDR_DQ12
DDR_DQ13DDR_DQ9 DDR_DM1
DDR_DQ10 DDR_DQ11
DDR_DM2 DDR_DQ19
DDR_DQ29
DDR_DQ25DDR_DQ28 DDR_DM3
DDR_DQ27 DDR_DQ31
DDR_SMAA11 DDR_SMAA8
DDR_SMAA6 DDR_SMAA4 DDR_SMAA2 DDR_SMAA0
DDR_BS1 DDR_RAS# DDR_CAS#
DDR_DQ32DDR_DQ33 DDR_DQ37
DDR_DM4 DDR_DQ39
DDR_DQ35DDR_DQ38 DDR_DQ45
DDR_DQ41 DDR_DM5
DDR_DQ43 DDR_DQ47
DDR_DQ52 DDR_DQ53
DDR_DM6 DDR_DQ51
DDR_DQ50 DDR_DQ61
DDR_DQ57 DDR_DM7
DDR_DQ62 DDR_DQ59
F
SDREF_DIMM
R322
12
C413
.1U_0402_16V4Z
DDR_SCS#1 <9>DDR_SCS#0<9>
DDR_CLK2# <9> DDR_CLK2 <9>
12
SDREF
0_0402_5%
DDR_DQ[0..63]
DDR_DQS[0..8]
DDR_DM[0..7]
DDR_SMAA[0..12]
Note:
Place Close to DIMM0
Layout note
Place these resistor close by DIMM0, all trace length Max=1.4"
DDR_CKE0 DDR_CKE1
DDR_SCS#0 DDR_SCS#1
DDR_SBS0<9,13>
DDR_SBS1<9,13>
DDR_SRAS#<9,13>
DDR_SCAS#<9,13>
DDR_SWE#<9,13>
Title
Size Document Number Rev
Date: Sheet
G
DDR_DQ[0..63] <13>
DDR_DQS[0..8] <13>
DDR_DM[0..7] <13>
DDR_SMAA[0..12]
DDR_SMAA0DDR_SMA0
12
R167 10_0402_5%
R134 10_0402_5%
R132 10_0402_5%
R149 10_0402_5%
R135 10_0402_5%
R140 10_0402_5%
R152 10_0402_5%
R116 10_0402_5%
R137 10_0402_5%
R148 10_0402_5%
R146 10_0402_5%
R151 10_0402_5%
R136 10_0402_5%
DDR_SMAA1DDR_SMA1
12
DDR_SMAA2DDR_SMA2
12
DDR_SMAA3DDR_SMA3
12
DDR_SMAA4DDR_SMA4
12
DDR_SMAA5DDR_SMA5
12
DDR_SMAA6DDR_SMA6
12
DDR_SMAA7DDR_SMA7
12
DDR_SMAA8DDR_SMA8
12
DDR_SMAA9DDR_SMA9
12
DDR_SMAA10DDR_SMA10
12
DDR_SMAA11DDR_SMA11
12
DDR_SMAA12DDR_SMA12
12
+1.25VS
RP47 56_0402_4P2R_5%
1 4 2 3
RP49 56_0402_4P2R_5%
1 4 2 3
Note:
Place Close to DIMM0
R139 10_0402_5%
R133 10_0402_5%
R141 10_0402_5%
R131 10_0402_5%
R138 10_0402_5%
DDR_BS1
12
DDR_RAS#
12
DDR_CAS#
12
DDR_WE#
12
DDR_BS0
12
Dell-Compal Confidential
Compal Electronics, Inc.
DDR-SODIMM SLOT0
Abacus/TangII LA-1452
G
H
0.2
of
12 43Monday, August 26, 2002
H
Page 13
A
+1.25VS +1.25VS
RP89 56_0402_4P2R_5%
DDR_DQ4
1 4
DDR_DQ0
2 3
RP109 56_0402_4P2R_5%
DDR_DQ5
1 4
DDR_DQ1
2 3
DDR_DQS0 DDR_DQ6
DDR_DQ3 DDR_DQ2
DDR_DQ7 DDR_DQ8
DDR_DQ9 DDR_DQ12
DDR_DQS1 DDR_DQ13
DDR_DQ14 DDR_DQ10
DDR_DQ11 DDR_DQ15
DDR_DQ20 DDR_DQ16
DDR_DQ17 DDR_DQ21
DDR_DQ18 DDR_DQS2
DDR_DQ19 DDR_DQ22
DDR_DQ23 DDR_DQ24
DDR_DQ28 DDR_DQ25
DDR_DQ29 DDR_DQS3
RP88 56_0402_4P2R_5%
1 4 2 3
RP67 56_0402_4P2R_5%
1 4 2 3
RP108 56_0402_4P2R_5%
1 4 2 3
RP87 56_0402_4P2R_5%
1 4 2 3
RP92 56_0402_4P2R_5%
1 4 2 3
RP107 56_0402_4P2R_5%
1 4 2 3
RP86 56_0402_4P2R_5%
1 4 2 3
RP106 56_0402_4P2R_5%
1 4 2 3
RP85 56_0402_4P2R_5%
1 4 2 3
RP105 56_0402_4P2R_5%
1 4 2 3
RP84 56_0402_4P2R_5%
1 4 2 3
RP104 56_0402_4P2R_5%
1 4 2 3
RP91 56_0402_4P2R_5%
1 4 2 3
RP83 56_0402_4P2R_5%
1 4 2 3
1 1
2 2
3 3
RP103 56_0402_4P2R_5%
DDR_DQ26
14
DDR_DQ30
23
RP82 56_0402_4P2R_5%
DDR_DQ27
14
DDR_DQ31
23
RP69 56_0402_4P2R_5%
DDR_DQ56
14
DDR_DQ51
23
RP94 56_0402_4P2R_5%
DDR_DQ60
14
DDR_DQ57
23
RP68 56_0402_4P2R_5%
DDR_DQ61
14
DDR_DQS7
23
RP93 56_0402_4P2R_5%
DDR_DQ62
14
DDR_DQ58
23
RP66 56_0402_4P2R_5%
DDR_DQ63
14
DDR_DQ59
23
RP100 56_0402_4P2R_5%
DDR_DQ36
14
DDR_DQ32
23
RP75 56_0402_4P2R_5%
DDR_DQ33
14
DDR_DQ37
23
RP99 56_0402_4P2R_5%
DDR_DQS4
14
DDR_DQ38
23
RP74 56_0402_4P2R_5%
DDR_DQ34
14
DDR_DQ39
23
RP98 56_0402_4P2R_5%
DDR_DQ35
14
DDR_DQ44
23
RP73 56_0402_4P2R_5%
DDR_DQ40
14
DDR_DQ45
23
RP72 56_0402_4P2R_5%
DDR_DQ41
14
DDR_DQS5
23
RP97 56_0402_4P2R_5%
DDR_DQ43
14
DDR_DQ42
23
RP71 56_0402_4P2R_5%
DDR_DQ47
14
DDR_DQ46
23
Layout note
Place these resistor closely DIMM1, all trace length<=800mil
PAD1
PAD-2.5X3
PAD12
4 4
PAD-2.5X3
PAD5
PAD-2.5X3
PAD2
1
PAD-2.5X3
PAD13
1
PAD-2.5X3
PAD6
1
PAD-2.5X3
PAD3
1
1
1
A
1
PAD-2.5X3
PAD14
1
PAD-2.5X3
PAD7
1
PAD-2.5X3
PAD4
PAD-2.5X3
PAD16
PAD-2.5X3
PAD8
PAD-2.5X3
RP96 56_0402_4P2R_5%
DDR_DQ48
14
DDR_DQ49
23
RP70 56_0402_4P2R_5%
DDR_DQ53
14
DDR_DQ52
23
RP95 56_0402_4P2R_5%
DDR_DQ54
14
DDR_DQS6
23
RP53 56_0402_4P2R_5%
DDR_DQ50
14
DDR_DQ55
23
R174 56_0402_5%
1 2 1 2
R168 56_0402_5%
R173 56_0402_5%
1 2 1 2
R175 56_0402_5%
R179 56_0402_5%
1 2 1 2
R180 56_0402_5%
R177 56_0402_5%
1 2 1 2
R181 56_0402_5%
DDR_DQS[0..7]
DDR_DQ[0..63]
DDR_SMA[0..12]
DDR_DM[0..7]
DDR_SMAB1<9>
DDR_SMAB2<9>
DDR_SMAB4<9>
DDR_SMAB5<9>
1
EMI Clip PAD for Memory Door
PAD17
1
1
1
PAD-2.5X3
PAD9
1
PAD-2.5X3
DDR_DM0 DDR_DM1
DDR_DM2 DDR_DM3
DDR_DM4 DDR_DM5
DDR_DM6 DDR_DM7
PAD10
PAD-2.5X3
B
B
DDR_DQS[0..7] <12>
DDR_DQ[0..63] <12>
DDR_SMA[0..12] <9,12>
DDR_DM[0..7] <12>
R178 10_0402_5%
R171 10_0402_5%
R176 10_0402_5%
R170 10_0402_5%
PAD11
1
PAD-2.5X3
C
DDR_CLK4<9> DDR_CLK4#<9>
DDR_CLK3<9>
DDR_CLK3#<9>
DDR_SBS0<9,12> DDR_SWE#<9,12>
DDR_SMMAB1DDR_SMAB1
12
DDR_SMMAB2DDR_SMAB2
12
DDR_SMMAB4DDR_SMAB4
12
DDR_SMMAB5DDR_SMAB5
12
DIMM_SMDATA<12,15,18,26>
DIMM_SMCLK<12,15,18,26>
+2.5V
DDR_DQ5 DDR_DQ0 DDR_DQ1
DDR_DQS0 DDR_DQ2
DDR_DQ6 DDR_DQ3 DDR_DQ8
DDR_DQS1
DDR_DQ14 DDR_DQ15
DDR_DQ20 DDR_DQ17
DDR_DQS2 DDR_DQ18
DDR_DQ22 DDR_DQ24
DDR_DQ28 DDR_DQ25 DDR_DQS3
DDR_DQ26 DDR_DQ30
DDR_CKE3 DDR_CKE2
DDR_SMA12 DDR_SMA9
DDR_SMA7 DDR_SMMAB5 DDR_SMA3 DDR_SMMAB1
DDR_SMA10 DDR_SBS0 DDR_SRAS# DDR_SWE# DDR_SCS#2 DDR_SCS#3
DDR_DQ33 DDR_DQ36
DDR_DQS4 DDR_DQ34
DDR_DQ38 DDR_DQ40
DDR_DQS5
DDR_DQ42 DDR_DQ46
DDR_DQ48 DDR_DQ49
DDR_DQS6 DDR_DQ54
DDR_DQ55 DDR_DQ60
DDR_DQ56 DDR_DQS7
DDR_DQ63 DDR_DQ58
+3VS
JP23
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
DDR-SODIMM_200_Narmal
VREF
VSS DQ4
DQ5 VDD DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14 DQ15
VDD VDD
VSS
VSS
DQ20 DQ21
VDD DM2
DQ22
VSS
DQ23 DQ28
VDD
DQ29
DM3
VSS
DQ30 DQ31
VDD
CB4
CB5
VSS DM8
CB6 VDD
CB7
DU/RESET#
VSS
VSS VDD VDD
CKE0
DU/BA2
VSS
VDD
BA1
RAS# CAS#
VSS
DQ36 DQ37
VDD DM4
DQ38
VSS
DQ39 DQ44
VDD
DQ45
DM5
VSS
DQ46 DQ47
VDD
CK1#
CK1
VSS
DQ52 DQ53
VDD DM6
DQ54
VSS
DQ55 DQ60
VDD
DQ61
DM7
VSS
DQ62 DQ63
VDD
SA0
SA1
SA2
D
+2.5V
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100
A11
102
A8
104 106
A6
108
A4
110
A2
112
A0
114 116 118 120 122
S1#
124
DU
126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DU
DDR_DQ4
DDR_DM0 DDR_DQ7
DDR_DQ12
DDR_DQ13DDR_DQ9 DDR_DM1
DDR_DQ10 DDR_DQ11
DDR_DQ21DDR_DQ16
DDR_DM2 DDR_DQ19
DDR_DQ23 DDR_DQ29
DDR_DM3
DDR_DQ27 DDR_DQ31
DDR_SMA11 DDR_SMA8
DDR_SMA6 DDR_SMMAB4 DDR_SMMAB2 DDR_SMA0
DDR_SBS1
DDR_SCAS#
DDR_DQ32 DDR_DQ37
DDR_DM4 DDR_DQ39
DDR_DQ35 DDR_DQ45
DDR_DQ41DDR_DQ44 DDR_DM5
DDR_DQ43 DDR_DQ47
DDR_DQ52 DDR_DQ53
DDR_DM6 DDR_DQ50
DDR_DQ51 DDR_DQ61
DDR_DQ57 DDR_DM7
DDR_DQ62 DDR_DQ59
+3VS
SDREF_DIMM
12
C488 .1U_0402_16V4Z
DDR_CKE2 <9>DDR_CKE3<9>
DDR_SBS1 <9,12> DDR_SR AS# <9,12> DDR_SC AS# <9,12> DDR_SCS#3 <9>DDR_SCS#2<9>
DDR_CLK5# <9> DDR_CLK5 <9>
E
+1.25VS
R128 56_0402_5%
1 2
RP48 56_0402_4P2R_5%
14 23
RP81 56_0402_4P2R_5%
14 23
RP78 56_0402_4P2R_5%
14 23
RP77 56_0402_4P2R_5%
14 23
R323 33_0402_5%
1 2
1 2
R182 33_0402_5%
RP102 33_0402_4P2R_5%
14 23
RP55 33_0402_4P2R_5%
14 23
RP54 33_0402_4P2R_5%
14 23
RP80 56_0402_4P2R_5%
14 23
RP76 56_0402_4P2R_5%
14 23
R358 56_0402_5%
1 2
DDR_CKE3 DDR_CKE2
DDR_SCS#2 DDR_SCS#3
Layout note
Place these resistor close by DIMM1, all trace length Max=0.8"
DDR_SMA12
DDR_SMA11 DDR_SMA9
DDR_SMA7 DDR_SMA8
DDR_SMA6 DDR_SMA3
DDR_SMA10 DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMAB1 DDR_SMAB2
DDR_SMA4 DDR_SMA5
DDR_SMAB4 DDR_SMAB5
DDR_SWE# DDR_SBS0
DDR_SRAS# DDR_SCAS#
DDR_SBS1
+1.25VS
RP79 56_0402_4P2R_5%
1 4 2 3
RP101 56_0402_4P2R_5%
1 4 2 3
DIMM1
Dell-Compal Confidential
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
DDR-SODIMM SLOT1
Abacus/TangII LA-1452
0.2
of
13 43Monday, August 26, 2002
E
Page 14
A
Layout note :
Distribute as close as possible to DDR-SODIMM0.
+2.5V
B
C
D
E
Layout note :
Distribute as close as possible to DDR-SODIMM1.
+2.5V
1 1
12
C135
+
150U_D_6.3VM
12
C164 .1U_0402_10V6K
12
C418 .1U_0402_10V6K
12
C167 .1U_0402_10V6K
12
C419 .1U_0402_10V6K
12
C166 .1U_0402_10V6K
12
C415 .1U_0402_10V6K
12
C162 .1U_0402_10V6K
12
C420 .1U_0402_10V6K
12
C160 .1U_0402_10V6K
12
C423 .1U_0402_10V6K
12
C157 .1U_0402_10V6K
12
C422 .1U_0402_10V6K
12
C158 .1U_0402_10V6K
12
C421 .1U_0402_10V6K
12
C168 .1U_0402_10V6K
12
C414 .1U_0402_10V6K
12
C169 .1U_0402_10V6K
12
C170
+
150U_D_6.3VM
12
C177 .1U_0402_10V6K
12
C194 .1U_0402_10V6K
12
C172 .1U_0402_10V6K
12
C185 .1U_0402_10V6K
12
C173 .1U_0402_10V6K
12
C183 .1U_0402_10V6K
12
C179 .1U_0402_10V6K
12
C189 .1U_0402_10V6K
12
C175 .1U_0402_10V6K
12
C184 .1U_0402_10V6K
12
C176 .1U_0402_10V6K
12
C182 .1U_0402_10V6K
12
C181 .1U_0402_10V6K
12
C186 .1U_0402_10V6K
12
C180 .1U_0402_10V6K
12
C190 .1U_0402_10V6K
12
C187 .1U_0402_10V6K
Layout note :
Place one cap close to every 2 pull up resistors termination to
2 2
+1.25VS
12
C527 .1U_0402_10V6K
+1.25VS
12
C535 .1U_0402_10V6K
+1.25VS
12
C520
3 3
.1U_0402_10V6K
+1.25VS
12
C528 .1U_0402_10V6K
12
C536 .1U_0402_10V6K
12
C514 .1U_0402_10V6K
12
C529 .1U_0402_10V6K
12
C512 .1U_0402_10V6K
12
C516 .1U_0402_10V6K
12
C530 .1U_0402_10V6K
12
C537 .1U_0402_10V6K
12
C517 .1U_0402_10V6K
12
C518 .1U_0402_10V6K
12
C538 .1U_0402_10V6K
12
C503 .1U_0402_10V6K
12
C531 .1U_0402_10V6K
12
C539 .1U_0402_10V6K
12
C519 .1U_0402_10V6K
12
C532 .1U_0402_10V6K
12
C522 .1U_0402_10V6K
12
C533 .1U_0402_10V6K
12
C511 .1U_0402_10V6K
12
C515 .1U_0402_10V6K
12
C521 .1U_0402_10V6K
12
C534 .1U_0402_10V6K
12
C513 .1U_0402_10V6K
+1.25VS
12
C509 .1U_0402_10V6K
+1.25VS
12
C494 .1U_0402_10V6K
+1.25VS
4 4
12
C137 .1U_0402_10V6K
12
C510 .1U_0402_10V6K
12
C540 .1U_0402_10V6K
12
C178 .1U_0402_10V6K
A
12
C508 .1U_0402_10V6K
12
C526 .1U_0402_10V6K
12
C191 .1U_0402_10V6K
12
C507 .1U_0402_10V6K
12
C525 .1U_0402_10V6K
12
C139 .1U_0402_10V6K
12
C504 .1U_0402_10V6K
12
C524 .1U_0402_10V6K
12
C138 .1U_0402_10V6K
12
C502 .1U_0402_10V6K
12
C543 .1U_0402_10V6K
12
C505 .1U_0402_10V6K
B
12
C501 .1U_0402_10V6K
12
C141 .1U_0402_10V6K
12
C497 .1U_0402_10V6K
12
C188 .1U_0402_10V6K
12
C495 .1U_0402_10V6K
12
C192 .1U_0402_10V6K
12
C496 .1U_0402_10V6K
12
C506 .1U_0402_10V6K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Dell-Compal Confidential
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
DDR SODIMM Decoupling
Abacus/TangII LA-1452
of
14 43Monday, August 26, 2002
E
0.2
Page 15
A
B
C
D
E
F
G
H
Clock Generator
+3VS
L21 BLM21A601SPT
12
Q25 2SC2411EK
1 2
C243
4.7U_0805_10V4Z
R24 1K_0402_5%
PM_SLP_S3#<19,30>
PM_SLP_S1#<19,30> PM_STPPCI#<19>
PM_STPCPU#<19,40>
+3VS
DIMM_SMDATA<12,13,18,26>
R20 475_0603_1%
R230 33_0402_5%
R231 33_0402_5%
R236 33_0402_5%
R235 33_0402_5%
12
C248
@10P_0402_50V8K
+3VS
1 1
+3VS
12
R19
2@1.5K_0402_5%
H_SEL0<10>
R242 10K_0402_5%
1 2
+3VS
2 2
+CPU_CORE
CLK_ICH_48M<19>
CLK_MCH_DISPLAY<10>
CLK_ICH_14M<19>
CLK_CODEC_14M<27>
3 3
1 2
R238
220_0402_5%
1
C
2
B
E
3
12
C247
@10P_0402_50V8K
+3V_48M
12
C310 @10P_0402_50V8K
1 2
1 2
R213 1K_0402_5%
1 2
1 2
R356 0_0402_5%
1 2
R355 @0_0402_5%
R232 10K_0402_5%
1 2
R221
@1K_0603_1%
DIMM_SMCLK<12,13,18,26>
1 2
1 2
1 2
1 2
1 2
12
C244
.1U_0402_16V4Z
C272 @10P_0402_50V8K
12
XTALIN
12
XTALOUT
ICH_48M
MCH_DISPLAY
ICH_14M
L26
FBM-L11-201209-221LMAT
1 2
L22
1 2
@FBM-L11-201209-221LMAT
2
X2
14.318MHZ
3
54 55 40
25 34 53
28
43
29 30
33 35
42
39
38
56
U75
XTAL_IN
XTAL_OUT
SEL0 SEL1 SEL2
PWR_DWN# PCI_STOP# CPU_STOP#
VTT_PWRGD#
MULT0
SDATA SCLK
3V66_0 3V66_1/VCH_CLK
IREF
48MHZ_USB
48MHZ_DOT
REF
ICS950810_CG
+3V_CLK
Width=40 mils
1
14
32
VDD_REF
VDD_PCI_08VDD_PCI_1
VDD_3V66_019VDD_3V66_1
GND_REF4GND_PCI_09GND_PCI_115GND_3V66_020GND_3V66_131GND_48MHZ
12
C325
10U_1206_10V4Z
37
50
VDD_CPU_046VDD_CPU_1
VDD_48MHZ
GND_IREF41GND_CPU
36
47
VDDA
VSSA
CPUCLKT2
CPU_CLKC2
CPUCLKT1
CPUCLKC1
CPUCLKT0
CPUCLKC0
3V66_5
3V66_4 3V66_3 3V66_2
PCICLK_F2 PCICLK_F1 PCICLK_F0
PCICLK6 PCICLK5 PCICLK4 PCICLK3 PCICLK2 PCICLK1 PCICLK0
.1U_0402_16V4Z
12
C264
.1U_0402_16V4Z
26
27
45
44
49
48
52
51
24
23 22 21
7 6 5
18 17 16 13 12 11 10
.1U_0402_16V4Z
12
C42
+3V_VDD
12
C303
.1U_0402_16V4Z
CPU_BCLK
R225
CPU_BCLK#
R226 27.4_0603_1%
MCH_BCLK
R223 27.4_0603_1%
MCH_BCLK#
R224
CPU_ITP
R228
CPU_ITP#
R222
AGP_66M MCH_66M ICH_66M
PCI_ICH
PCI_DEBUG PCI_LAN PCI_PCM PCI_MINI PCI_LPC
R255 33_0402_5% R254 33_0402_5% R253 33_0402_5%
R248 33_0402_5%
R457 1@33_0402_5% R252 33_0402_5% R251 33_0402_5% R250 33_0402_5% R249 33_0402_5%
12
C43
.1U_0402_16V4Z
L23 BLM21A601SPT
1 2
12
C312
10U_1206_10V4Z
1 2
27.4_0603_1%
1 2
1 2
1 2
1 2
27.4_0603_1%
1 2
27.4_0603_1%
1 2 1 2 1 2
1 2
1 2 1 2 1 2 1 2 1 2
.1U_0402_16V4Z
12
C44
+3VS
R218 49.9_0603_1%
R219 49.9_0603_1%
R216 49.9_0603_1%
R217 49.9_0603_1%
27.4_0603_1%
R227 49.9_0603_1%
R220 49.9_0603_1%
@10P_0402_50V8K
12
C59
.1U_0402_16V4Z
CLK_CPU_BCLK <5>
1 2 1 2
CLK_CPU_BCLK# <5>
CLK_MCH_BCLK <9>
1 2 1 2
CLK_MCH_BCLK# <9>
CLK_CPU_ITP <6>
1 2 1 2
CLK_CPU_ITP# <6>
12
C313
.1U_0402_16V4Z
12
C58
12
C314
@10P_0402_50V8K
12
C61
12
C306
.1U_0402_16V4Z
12
C315
@10P_0402_50V8K
CLK_AGP_66M <16> CLK_MCH_66M <10> CLK_ICH_66M <18>
CLK_PCI_ICH <18>
CLK_PCI_DEBUG <33> CLK_PCI_LAN <22> CLK_PCI_PC M <23,25> CLK_PCI_MINI <26> CLK_PCI_LPC <30>
CPU Frequency Select Table
SEL[2:0] CK-408 Speed
001
011
*
4 4
100 MHZ
133 MHZ
Dell-Compal Confidential
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
A
B
C
D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
E
F
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Clock Generator
Abacus/TangII LA-1452
G
0.2
of
15 43Monday, August 26, 2002
H
Page 16
A
B
C
D
E
AGP_ST[0..2]<10>
AGP_SBA[0..7]<10>
AGP_AD[0..31]<10>
AGP_C/BE#[0..3]<10>
1 1
AGP BUS Pullup
on VGA BD
AGP_FRAME#<10>
AGP_TRDY#<10> AGP_DEVSEL# <10> AGP_STOP#<10>
2 2
3 3
4 4
AGP_ADSTB1<10>
AGP_ADSTB1#<10>
EXTVGA_IN#<30>
AGP_RBF#<10> AGP_WBF#<10>
INTVGA_IN#<31>
AGP_REQ#<10> AGP_GNT#<10>
CLK_AGP_66M<15>
AGP_BUSY#<8,19>
INT_VSYNC<10>
CRT_VSYNC<17>
INT_HSYNC<10>
CRT_HSYNC<17>
INTDDCDA<10> 3VDDCDA<17>
INTDDCCK<10> 3VDDCCK<17>
CLK_AGP_66M
Terminator on VGA BD
+2.5V
AGP_RST# AGP_C/BE#0
AGP_AD1 AGP_AD3 AGP_AD5 AGP_AD7
AGP_AD9 AGP_AD11 AGP_AD13 AGP_AD15
AGP_PAR<10>
AGP_AD17 AGP_AD19 AGP_AD21 AGP_AD23 AGP_C/BE#2
AGP_AD25 AGP_AD27 AGP_AD29 AGP_AD31 AGP_C/BE#3 EXTVGA_IN#
AGP_SBA7 AGP_SBA5 AGP_SBA3 AGP_SBA1
INTVGA_IN#
PID3<19>
SUSP#<27, 30,33,38>
C/R<17>
Y/G<17>
COMP/B<17>
M_SEN#<17,31>
+5VALW
+1.5VS
STP_AGP#
C/R
Y/G
COMP/B
M_SEN#
INT_VSYNC CRT_VSYNC
INT_HSYNC CRT_HSYNC
INTDDCDA 3VDDCDA
INTDDCCK 3VDDCCK
AGP_ST[0..2]
AGP_SBA[0..7]
AGP_AD[0..31]
AGP_C/BE#[0..3]
JP8
1
GND
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
GND
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
GND
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
GND
63
63
65
65
67
67
69
69
71
71
73
73
75
75
77
77
79
79
81
GND
83
83
85
85
87
87
89
89
91
91
93
93
95
95
97
97
99
GND
101
101
103
103
105
105
107
107
109
109
111
111
113
113
115
115
117
117
119
GND
121
121
123
123
125
125
127
127
129
129
131
131
133
133
135
135
137
137
139
GND
141
141
143
143
145
145
147
147
149
149
151
151
153
153
155
155
157
157
159
GND
161
161
163
163
165
165
167
167
169
169
171
171
173
173
175
175
177
177
179
GND
FOXCONN_QT00180A-5120C
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
C241
.1U_0603_50V4Z
R229
100K_0402_5%
STP_AGP#
HIGH
HIGH
+12VALW
12
.1U_0402_16V4Z
+3VALW
12
AGP_RST#
G_RST#<30>
PCIRST#<6,10,18,2 2,23,25,26,30,33>
+1.5VS
12
C127
.1U_0402_16V4Z
2 4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22 24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42 44
44
46
46
48
48
50
50
52
52
54
54
56
56
58
58
60
60
62 64
64
66
66
68
68
70
70
72
72
74
74
76
76
78
78
80
80
82 84
84
86
86
88
88
90
90
92
92
94
94
96
96
98
98
100 102
102
104
104
106
106
108
108
110
110
112
112
114
114
116
116
118
118
120 122
122
124
124
126
126
128
128
130
130
132
132
134
134
136
136
138
138
140 142
142
144
144
146
146
148
148
150
150
152
152
154
154
156
156
158
158
160 162
162
164
164
166
166
168
168
170
170
172
172
174
174
176
176
178
178
180
AGP_AD0 AGP_AD2 AGP_AD4 AGP_AD6
AGP_AD8 AGP_AD10 AGP_AD12 AGP_AD14
AGP_C/BE#1
AGP_AD16 AGP_AD18 AGP_AD20 AGP_AD22
AGP_AD24 AGP_AD26 AGP_AD28 AGP_AD30
AGP_SBA6
AGP_SBA4
AGP_SBA2
AGP_SBA0
AGP_ST0
AGP_ST1
AGP_ST2
1 2
R237 2@0_0402_5%
INTCRT_B CRT_B
INTCRT_G CRT_G
INTCRT_R CRT_R
+5VS
+3V
+3VS
B+
+12VALW
AGP_ADSTB0 <10> AGP_ADSTB0# <10>
AGP_IRDY# <10>
AGP_PIPE# <10>
PIRQE# <18>
AGP_SBSTB <10> AGP_SBSTB# <10>
BKOFF# <30> ENABKL <31> PID0 <19> PID1 <19> SMB_EC_DA1 <30,31,34> SMB_EC_CK1 <30,31,34> PID2 <19> AGP_NBREF +AGPREF
INTCRT_B <10> CRT_B <17>
INTCRT_G <10> CRT_G <17>
INTCRT_R <10> CRT_R <17>
Daughter Card Present Table
EXTVGA_IN#
POP for EXT VGA
DEPOP for INT VGA
(Ext. Graphy)
INTVGA_IN#
(Int. Graphy)
B+
12
EXTVGA_IN#
DOCKED NON DOCKED
LOW
LOW
C240
R166
@0_0402_5%
74AHC1G08
+5VS +5VALW
12
C369
.1U_0402_16V4Z
12
+AGPREF
POP for INT VGA
DEPOP for EXT VGA
+3VS
12
5
4
1
2
U36
3
1 2
R290 @0_0402_5%
R282 0_0402_5%
1 2
+2.5V
12
AGP_NBREF
SUS_STAT# <19,30>
PM_C3_STAT# <19>
3
C372
.1U_0402_16V4Z
V_PRST#
C242
.1U_0402_16V4Z
R243
1 2
1@0_0402_5%
V_PRST# <23,24,25>
PCIRST# <6,10,18,2 2,23,25,26,30,33>
+3VALW
U33A
147
74VHC32
1
2
+1.5VS
12
R240 1K_0603_1%
12
R239 1K_0603_1%
+
+3VS+2.5V
12
C355 150U_D_6.3VM
12
.1U_0402_16V4Z
Place this cap near AGP
12
C273 .1U_0402_16V4Z
C239
Dell-Compal Confidential
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
AGP Conn.
Abacus/TangII LA-1452
0.2
of
16 43Monday, August 26, 2002
E
Page 17
5
C/R
C/R<16>
D D
COMP/B<16>
Y/G<16>
C C
COMP/B
Y/G
12
R203
75_0603_1%
12
R204
75_0603_1%
12
R205
75_0603_1%
4
12
12
12
33P_0402_50V8K
1 2
L18
1 2
C227
100P_0402_50V8K
33P_0402_50V8K
1 2
L19
1 2
C225
100P_0402_50V8K
33P_0402_50V8K
1 2
L20
1 2
C226
100P_0402_50V8K
C236
1.8U_MLF1608A1R8K_25M_20%_0603
C221
270P_0603_50V8K
1 2
C233
1.8U_MLF1608A1R8K_25M_20%_0603
C222
270P_0603_50V8K
1 2
C228
1.8U_MLF1608A1R8K_25M_20%_0603
C220
270P_0603_50V8K
1 2
3
SVIDEO_C
SVIDEO_CVBS
SVIDEO_Y
1
D19 @DAN217
2
3
1
D4 @DAN217
2
3
1
D5 @DAN217
2
3
+3VS
2
JP3
3 6 7 5 2 4 1 8 9
SUYIN_35138S_7P
1
R5
10K_0402_5%
12
C15
.1U_0402_16V4Z
12
C7
100P_0402_50V8K
CRTVCC
12
12
R201 10K_0402_5%
CRTVCC
12
12
C5
C224
100P_0402_50V8K
100P_0402_50V8K
2N7002
Q14
+3VS
R4
0_0402_5%
2
G
1 3
D
S
Q23
2N7002
1 3
D
JP1
6
11
1 7
12
2 8
13
3 9
14
4 10 15
5
FOX_DZ11A91-L8-HT
+3VS
12
2
G
S
2.7K_0402_5%
R3
1 2
CRT Connector
12
R202
2.7K_0402_5%
3VDDCDA
3VDDCCK
3VDDCDA <16>
3VDDCCK <16>
CRTVCC
12
C14
.1U_0402_16V4Z
M_SEN#<16,31>
B B
+5VS
13
SUSP<7,33> CRT_HSYNC<16>
A A
2
Q24
SI2303DS
CRT_VSYNC<16>
CRT_R<16>
CRT_G<16>
CRT_B<16>
CRTVCC
CRT_HSYNC
CRT_VSYNC
CRT_R
CRT_G
CRT_B
135
2 4
U13 74AHCT1G125GW
135
2 4
74AHCT1G125GW U4
@3.3P_0603_50V8J
DDC_MONID0
R7
1 2
1K_0402_5%
75_0603_1%
1 2
R459
33_0402_5%
1 2
R460
33_0402_5%
M_SEN#
@3.3P_0603_50V8J
12
C3
12
R1
CRTVCC
12
C6
.1U_0402_16V4Z
12
12
C4
C219
@3.3P_0603_50V8J
L2 F CM2012C-800(0805)
12
12
R195
R2
75_0603_1%
75_0603_1%
1 2
L15
1 2
FCM2012C-800(0805)
L1
1 2
FCM2012C-800(0805)
L16
L17
FBM-11-160808-121
1
D1 @DAN217
2
CRTR
CRTG
CRTB
12
C2
3.3P_0603_50V8J
1 2
1 2
FBM-11-160808-121
3
D18@DAN217
2
12
C214
3.3P_0603_50V8J
12
C217
27P_0402_50V8J
1
3
D3 @DAN217
2
12
C218
27P_0402_50V8J
100P_0402_50V8K
1
3
+3VS
12
C13.3P_ 0603_50V8J
12
C8
Dell-Compal Confidential
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
TV OUT & CRT
Abacus/TangII LA-1452
0.2
of
17 43Monday, August 26, 2002
1
Page 18
A
B
C
D
AD[0..31]<22,23, 24,25,26,33>
1 1
R319
H_FERR#
+CPU_CORE
12
62_0402_5%
AD[0..31]
Place closely pin P5
CLK_PCI_ICH
@22_0402_5%
@10P_0402_50V8K
2 2
Place closely pin T21
CLK_ICH_66M
22_0402_5%
15P_0402_50V8J
PCI Pullups
PCI_PERR# REQA# PCI_STOP# PCI_SERR#
+3VS
3 3
PCI_IRDY# PCI_TRDY#
PCI_FRAME#
+3VS
+3VS
RP2
1 8 2 7 3 6 4 5
8.2K_0804_8P4R_5%
1 2
R158 8.2K_0402_5%
1 2
R153 @8.2K_0402_5%
4 4
ICH_PCIRST#
12
R348
12
C480
12
R321
12
C395
RP5
1 2 3 4 5
8.2K_1206_10P8R_5%
RP3
1 2 3 4 5
8.2K_1206_10P8R_5%
REQ#0 REQ#1 REQ#2 REQ#3
REQB#
PIDERST#
+3VS
5
1
2
U9
3
74AHC1G08
A
10 9 8 7 6
10 9 8 7 6
(Strap)
4
PIRQA# PIRQB# REQ#4
PIRQC# PIRQD#PCI_DEVSEL# SIRQ PCI_PLOCK#
+3VS
+3VS
PCIRST# <6,10,16,2 2,23,25,26,30,33>
C/BE#0<2 2,23,25,26,33> C/BE#1<2 2,23,25,26,33> C/BE#2<2 2,23,25,26,33> C/BE#3<2 2,23,25,26,33>
REQ#0<22> REQ#1<26> REQ#2<23,25>
GNT#0<22> GNT#1<26> GNT#2<23,25>
CLK_PCI_ICH<15>
PCI_FRAME#<22,23,25,26,33>
PCI_DEVSEL#<22,23,25,26>
PCI_IRDY#<22,23,25,26>
PCI_PAR<2 2,23,25,26>
PCI_PERR#<22,23,25,26>
EC_WAKEUP#<30>
PCI_SERR#<22,23,25,26>
PCI_STOP#<22,23,25,26>
PCI_TRDY#<22,23,25,26,33>
PIDERST#<21> SIDERST#<21>
DIMM_SMCLK<12,13,15,26>
B
C/BE#0 C/BE#1 C/BE#2 C/BE#3
REQ#0 REQ#1 REQ#2 REQ#3 REQ#4
CLK_PCI_ICH
PCI_PLOCK#
ICH_PCIRST#
REQA# REQB# PIDERST# SIDERST#
U55A
+3VS
G
ICH4
PCI I/F
2
SMB_CLK
13
D
SMB_DATA
SM I/F
SMB_ALERT#/GPI11
CPU I/F
CPU_PWRGOOD
HUB I/F
HUB_VSWING
PIRQE#/GPI2 PIRQF#/GPI3
PIRQG#/GPI4
PIRQH#/GPI5
Interrupt I/F
EEPROM I/F
LAN I/F
LAN_RSTSYNC
2
1 3
D
Q27 2N7002
INTRUDER#
SMLINK0 SMLINK1
SMB_CLK
SMB_DATA
A20GATE
A20M#
DPSLP#
FERR#
IGNNE#
INIT# INTR
RCIN#
SLP# SMI#
STPCLK#
HI10 HI11
CLK66
HI_STB
HI_STB#
HICOMP
HUB_VREF
APICCLK
APICD0 APICD1 PIRQA# PIRQB# PIRQC# PIRQD#
IRQ14 IRQ15
SERIRQ
EE_CS
EE_IN
EE_OUT
EE_SHCLK
LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2
LAN_CLK
LAN_RST#
G
DIMM_SMDATA
S
SM_INTRUDER#
W6
SMLINK0
AC3 AB1 AC4 AB4 AA5
Y22 AB23 U23 AA21 W21 V22 AB22 V21
NMI
Y23 U22 U21 W23 V23
L19
HI0
L20
HI1
M19
HI2
M21
HI3
P19
HI4
R19
HI5
T20
HI6
R20
HI7
P23
HI8
L22
HI9
N22 K21
T21
P21 N20
R23 M23 R22
J19 H19 K20 D5 C2 B4 A3 C8 D7 C3 C4 AC13 AA19 J22
D10 D11 A8 C12
A10 A9 A11 B10 C10 A12 C11 B11 Y5
C
1 2
SMLINK1
R164 @0_0402_5%
1 2
SMB_CLK
R172 @0_0402_5%
SMB_DATA ACIN
GATEA20
R104 68_0402_5%
R110 68_0402_5%
R105 68_0402_5% R91 68_0402_5% R103 68_0402_5%
R112 68_0402_5% R102 68_0402_5% R101 68_0402_5%
HI0 HI1 HI2 HI3 HI4 HI5 HI6 HI7 HI8 HI9 HI10
1 2
CLK_ICH_66M
HUB_RCOMP_ICH HUB_VREF HUB_VSWING
APICCLK APICD0 APICD1 PIRQA# PIRQB# PIRQC# PIRQD# PIRQE# GPI3 GPI4 GPI5 IRQ14 IRQ15 SIRQ
12
12
12 12 12
12 12 12
HI[0..10]
R99 62_0402_5%
CLK_ICH_66M <15>
HUB_PSTRB <9> HUB_PSTRB# <9>
R87
1 2
68.1_0603_1%
PIRQA# <23,25> PIRQB # <22> PIRQC# <26> PIRQD# <26> PIRQE # <16>
IRQ14 <21> IRQ15 <21> SIRQ <23,25,30>
1 2
R156 @1K_0402_5%
1 2
R159 10K_0402_5%
DIMM_SMDATA <12,13,15,26>
AD0
H5
AD0
AD1
J3
AD1
AD2
H3
AD2
AD3
K1
AD3
AD4
G5
AD4
AD5
J4
AD5
AD6
H4
AD6
AD7
J5
AD7
AD8
K2
AD8
AD9
G2
AD9
AD10
L1
AD10
AD11
G4
AD11
AD12
L2
AD12
AD13
H2
AD13
AD14
L3
AD14
AD15
F5
AD15
AD16
F4
AD16
AD17
N1
AD17
AD18
E5
AD18
AD19
N2
AD19
AD20
E3
AD20
AD21
N3
AD21
AD22
E4
AD22
AD23
M5
AD23
AD24
E2
AD24
AD25
P1
AD25
AD26
E1
AD26
AD27
P2
AD27
AD28
D3
AD28
AD29
R1
AD29
AD30
D2
AD30
AD31
P4
AD31
J2
C/BE#0
K4
C/BE#1
M4
C/BE#2
N4
C/BE#3
B1
REQ#0
A2
REQ#1
B3
REQ#2
C7
REQ#3
B6
REQ#4
C1
GNT#0
E6
GNT#1
A7
GNT#2
B7
GNT#3
D6
GNT#4
P5
PCICLK
F1
FRAME#
M3
DEVSEL#
L5
IRDY#
G1
PAR
L4
PERR#
M2
LOCK#
W2
PME#
U5
PCIRST#
K5
SERR#
F3
STOP#
F2
TRDY#
B5
REQA#/GPI0
A6
REQB#/GPI1/REQ5#
E8
GNTA#/GPO16
C5
GNTB#/GPO17/GNT5#
ICH4
DIMM_SMCLK
S
Q28
2N7002
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HI[0..10] <9>
+1.5VS
HUB_V REF <9,11> HUB_VSW ING <9,11>
SM_INTRUDER# <32>
ACI N <30,34,36>
GATEA20 <30> H_A20M# <6> H_DPSLP# <6> H_FERR# <6> H_IGNNE# <6> H_INIT# <6> H_INTR <6> H_NMI <6> H_PWRGD <6> KBRST# <30> H_SLP# <6> H_SMI# <6> H_STPCLK# <6>
DIMM_SMCLK
DIMM_SMDATA
SMB_CLK
SMB_DATA
IRQ14
IRQ15
GATEA20
KBRST#
GPI4 GPI3 PIRQE# GPI5
SMLINK0
SMLINK1
ACIN
APICCLK APICD0 APICD1
10K_0402_5%
1 2
R163 8.2K_0402_5%
1 2
R162 8.2K_0402_5%
1 2
R353 8.2K_0402_5%
1 2
R352 8.2K_0402_5%
1 2
R143 8.2K_0402_5%
1 2
R123 8.2K_0402_5%
1 2
R95 10K_0402_5%
1 2
R94 10K_0402_5%
1 8 2 7 3 6 4 5
1 2
R165
8.2K_0402_5%
1 2
R169
8.2K_0402_5%
1 2
R161 @10K_0402_5%
R89
1 2
10K_0402_5%
Dell-Compal Confidential
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
INTEL ICH4 (1/3)
Abacus/TangII LA-1452
D
RP4
8.2K_0804_8P4R_5%
+3VALW
R97
R88 0_0402_5%
1 2
1 2
of
18 43Tuesday, Aug ust 27, 2002
+3VS
+3VALW
+3VS
0.2
Page 19
A
B
C
D
+3VALW
12
R79
+3VS
1 1
1 2
R98 @1K_0402_5%
1 2
R150 @8.2K_0402_5%
1 2
R90 1K_0402_5%
1 2
R78 1K_0402_5%
2 2
3 3
4 4
PROCHOT#<6,31>
EC_THRM#<30>
1 2
R347 @100K_0402_5%
+3VS
R82 100K_0402_5%
1 2
R83 100K_0402_5%
1 2
R80 100K_0402_5%
1 2
R77 100K_0402_5%
1 2
+3VALW
1 2
R144 8.2K_0402_5%
1 2
R142 8.2K_0402_5%
1 2
R130 8.2K_0402_5%
1 2
R147 8.2K_0402_5%
+3VS
CLKRUN#<22,25,26,30>
IAC_SYNC<27,29>
IAC_SDATAO<27,29>
@22P_0402_50V8J
ICH_SPKR
ICH_AC_SDOUT LID_OUT#
PM_STPCPU#
PM_STPPCI#
PM_STPCPU#<15,40> PM_STPPCI#<15>
PM_GMUXSEL
PM_CPUPERF#<6>
R391 @0_0402_5%
R392
0_0402_5%
RTCCLK
R346
10K_0402_5%
1 2
12
C457
12
12
C452
A
ICH_THRM#
PID0
PID1
PID2
PID3
OVCUR#1
OVCUR#3
OVCUR#4
OVCUR#5
D46
2 1
@RB751V
1 2
R335 33_0402_5%
1 2
R325 33_0402_5%
12
@22P_0402_50V8J
IAC_BITCLK<27,29>
IAC_SDATA_IN0<27> IAC_SDATA_IN1<29>
ICLKRUN#CLKRUN#
ICH_AC_SYNC
ICH_AC_SDOUT
IAC_RST#<27,29>
AGP_BUSY#<8,16>
SYSRST#<6>
PM_C3_STAT#<16>
PM_DPRSLPVR<40>
PWRBTN#<30>
PM_PWROK<10,30,32>
EC_SWI#<30>
RSMRST#<30> PM_SLP_S1#<15,30> PM_SLP_S3#<15,30> PM_SLP_S4#<30> PM_SLP_S5#<30>
R84 @0_0402_5% R81 @0_0402_5%
SUS_STAT#<16,30>
VGATE<30,40>
LAD0<30> LAD1<30> LAD2<30> LAD3<30>
LFRAME#<30>
OVCUR#0<32>
OVCUR#2<32>
R86
22.6_0603_1%
1 2
SIDEPWR<21>
PID0<16> PID1<16> PID2<16> PID3<16>
10K_0402_5%
VLBA#<30>
12 12
PM_CPUPERF#
R96 33_0402_5%
IAC_BITCLK
R160 33_0402_5%
IAC_SDATA_IN0 IAC_SDATA_IN1
USBP0+<32>
USBP0-<32>
USBP2+<32>
USBP2-<32>
USB_RBIAS
AGP_BUSY# SYSRST#
VLBA#
ICLKRUN#
EC_SWI#
RTCCLK
ICH_THRM#
V_GATE
12
12
ICH_AC_SDOUT ICH_AC_SYNC
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
LFRAME#
OVCUR#0 OVCUR#1 OVCUR#2 OVCUR#3 OVCUR#4 OVCUR#5
B
U55B
R2
AGPBUSY#/GPI6
Y3
SYSRST#
AB2
BATLOW#
T3
C3_STAT#/GPO21
AC2
CLKRUN#/GPIO24
V20
DPRSLPVR
AA1
PWRBTN#
AB6
PWROK
Y1
RI#
AA6
RSMRST#
W18
SLP_S1#/GPO19
Y4
SLP_S3#
Y2
SLP_S4#
AA2
SLP_S5#
W19
STP_CPU#/GPO20
Y21
STP_PCI#/GPO18
AA4
SUS_CLK
AB3
SUS_STAT#/LPCPD#
V1
THRM#
J21
SSMUXSEL/GPO23
Y20
CPUPERF#/GPO22
V19
VGATE/VRMPWRGD
B8
AC_BITCLK
C13
AC_RST#
D13
AC_SDATAIN0
A13
AC_SDATAIN1
B13
AC_SDATAIN2
D9
AC_SDATAOUT
C9
AC_SYNC
T2
LPC_AD0
R4
LPC_AD1
T4
LPC_AD2
U2
LPC_AD3
U3
LPC_DRQ#0
U4
LPC_DRQ#1
T5
LPC_FRAME#
C20
USBP0+
D20
USBP0-
A21
USBP1+
B21
USBP1-
C18
USBP2+
D18
USBP2-
A19
USBP3+
B19
USBP3-
C16
USBP4+
D16
USBP4-
A17
USBP5+
B17
USBP5-
B15
OC#0
C14
OC#1
A15
OC#2
B14
OC#3
A14
OC#4
D14
OC#5
A23
USB_RBIAS
B23
USB_RBIAS#
J20
GPIO32
G22
GPIO33
F20
GPIO34
G20
GPIO35
F21
GPIO36
H20
GPIO37
F23
GPIO38
H22
GPIO39
G23
GPIO40
H21
GPIO41
F22
GPIO42
E23
GPIO43
ICH4
ICH4
PM
IST
AC97 I/F
LPC I/F
USB I/F
GPIO
R3
GPI7 GPI8
GPI12
GPO13
GPIO
GPIO25 GPIO27 GPIO28
PDA0 PDA1
PDA2 PDCS1# PDCS3#
PDDREQ
PDDACK#
PDIOR# PDIOW# PIORDY
PDD0 PDD1 PDD2 PDD3 PDD4 PDD5
IDE I/F
CLOCK
MISC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PDD6 PDD7 PDD8
PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
SDA0
SDA1
SDA2
SDCS1# SDCS3#
SDDREQ
SDDACK#
SDIOR# SDIOW# SIORDY
SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8
SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
CLK14 CLK48
RTCRST#
VBIAS
RTCX1
RTCX2
SPKR
THRMTRIP#
V4 V5 W3 V2 W1 W4
AA13 AB13 W13 Y13 AB14
AA11 Y12 AC12 W12 AB12
AB11 AC11 Y10 AA10 AA7 AB8 Y8 AA8 AB9 Y9 AC9 W9 AB10 W10 W11 Y11
AA20 AC20 AC21 AB21 AC22
AB18 AB19 Y18 AA18 AC19
W17 AB17 W16 AC16 W15 AB15 W14 AA14 Y14 AC15 AA15 Y15 AB16 Y16 AA17 Y17
J23 F19
W7
Y6
AC7
AC6
H23
H_THERMTRIP#
W20
EC_SMI# SCI#
PDA0 PDA1 PDA2 PDCS1# PDCS3#
PDDREQ PDDACK# PDIOR# PDIOW# PDIORDY
PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
SDA0 SDA1 SDA2 SDCS1# SDCS3#
SDDREQ SDDACK# SDIOR# SDIOW# SDIORDY
SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
RTC_RST#
VBIAS
RTCX1
RTCX2
EC_SMI# <30> SCI# <30> LID_OUT# <30> EC_FLASH# <30>
PDA0 <21> PDA1 <21> PDA2 <21> PDCS1# <21> PDCS3# <21>
PDDREQ <21> PDDACK# <21> PDIOR# <21> PDIOW# <21> PDIORDY <21>
SDA0 <21> SDA1 <21> SDA2 <21> SDCS1# <21> SDCS3# <21>
SDDREQ <21> SDDACK# <21> SDIOR# <21> SDIOW# <21> SDIORDY <21>
CLK_ICH_14M <15> CLK_ICH_48M <15>
ICH_SPKR <28>
H_THERMTRIP# <6>
12P_0402_50V8K
C
R329
10M_0603_5%
X3
32.768KHZ_12.5P_
12
C450
PDD[0..15]
SDD[0..15]
J1 JOPEN
12
12
C448
12P_0402_50V8K
12
1K_0402_5%
1 2
R331 10M_0603_5%
R326
PDD[0..15] <21>
SDD[0..15] <21>
R145
12
12
1 2
C163
.047U_0402_16V4Z
R324
@22M_0603_5% R330 @2.4M_0603_5%
1 2
C156 1U_0603_10V4Z
R_VBIAS
1 2
12
15K_0402_5%
R154 1K_0402_5%
Dell-Compal Confidential
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
INTEL ICH4 (2/3)
Abacus/TangII LA-1452
Place close to pin B8
12
12
Place close to pin J23
12
12
Place close to pin F19
12
12
+RTCVCC
12
D
IAC_BITCLK
R336
@10_0402_5%
C460
@10P_0402_50V8K
CLK_ICH_14M
R93
@10_0402_5%
C124
@10P_0402_50V8K
CLK_ICH_48M
R92
@10_0402_5%
C123
@10P_0402_50V8K
19 43Monday, August 26, 2002
0.2
of
Page 20
A
U55C
D22
VSS0
E10
VSS1
E14
VSS2
E16
VSS3
E17
VSS4
E18
VSS5
E19
VSS6
E21
VSS7
E22
VSS8
F8
W22
AA12 AA16 AA22
AB20
AC10 AC14 AC18 AC23
VSS9
G19
VSS10
G21
VSS11
G3
VSS12
G6
VSS13
H1
VSS14
J6
VSS15
K11
VSS16
K13
VSS17
K19
VSS18
K23
VSS19
K3
VSS20
L10
VSS21
L11
VSS22
L12
VSS23
L13
VSS24
L14
VSS25
L21
VSS26
M1
VSS27
M11
VSS28
M12
VSS29
M13
VSS30
M20
VSS31
M22
VSS32
N10
VSS33
N11
VSS34
N12
VSS35
N13
VSS36
N14
VSS37
N19
VSS38
N21
VSS39
N23
VSS40
N5
VSS41
P11
VSS42
P13
VSS43
P20
VSS44
P22
VSS45
P3
VSS46
R18
VSS47
R21
VSS48
R5
VSS49
T1
VSS50
T19
VSS51
T23
VSS52
U20
VSS53
V15
VSS54
V17
VSS55
V3
VSS56 VSS57
W5
VSS58
W8
VSS59
Y19
VSS60
Y7
VSS61
A16
VSS62
A18
VSS63
A20
VSS64
A22
VSS65
A4
VSS66 VSS67 VSS68 VSS69
AA3
VSS70
AA9
VSS71 VSS72
AB7
VSS73
AC1
VSS74 VSS75 VSS76 VSS77 VSS78
AC5
VSS79
B12
VSS80
B16
VSS81
B18
VSS82
B20
VSS83
B22
VSS84
B9
VSS85
C15
VSS86
C17
VSS87
C19
VSS88
C21
VSS89
C23
VSS90
C6
VSS91
D1
VSS92
D12
VSS93
D15
VSS94
D17
VSS95
D19
VSS96
D21
VSS97
D23
VSS98
D4
VSS99
D8
VSS100
A1
VSS101
ICH4
1 1
2 2
3 3
4 4
B
ICH4
POWERGND
VCC3.3_0 VCC3.3_1 VCC3.3_2 VCC3.3_3 VCC3.3_4 VCC3.3_5 VCC3.3_6 VCC3.3_7 VCC3.3_8
VCC3.3_9 VCC3.3_10 VCC3.3_11 VCC3.3_12 VCC3.3_13 VCC3.3_14 VCC3.3_15
VCCSUS3.3_0 VCCSUS3.3_1 VCCSUS3.3_2 VCCSUS3.3_3 VCCSUS3.3_4 VCCSUS3.3_5 VCCSUS3.3_6 VCCSUS3.3_7 VCCSUS3.3_8 VCCSUS3.3_9
VCC1.5_0
VCC1.5_1
VCC1.5_2
VCC1.5_3
VCC1.5_4
VCC1.5_5
VCC1.5_6
VCC1.5_7
VCCSUS1.5_0 VCCSUS1.5_1 VCCSUS1.5_2 VCCSUS1.5_3 VCCSUS1.5_4 VCCSUS1.5_5 VCCSUS1.5_6 VCCSUS1.5_7
VCC5REF1 VCC5REF2
VCC5REFSUS1
VCCHI_0 VCCHI_1 VCCHI_2 VCCHI_3
VCC_CPU_IO_0 VCC_CPU_IO_1 VCC_CPU_IO_2
VCCPLL
VCCRTC
VCCLAN3.3_0 VCCLAN3.3_1
VCCLAN1.5_0 VCCLAN1.5_1
A5 AC17 AC8 B2 H18 H6 J1 J18 K6 M10 P12 P6 U1 V10 V16 V18
E11 F10 F15 F16 F17 F18 K14 V7 V8 V9
K10 K12 K18 K22 P10 T18 U19 V14
E12 E13 E20 F14 G18 R6 T6 U6
E7 V6
E15
L23 M14 P18 T22
AA23 P14 U18
C22
AB5
E9 F9
F6 F7
+1.5VS_PLL
C
VCC5REF
VCC5REFSUS
+1.5VS
+CPU_CORE
1 2
R85 0_0805_5%
+RTCVCC
+3VS_ICHLAN
1 2
R338 0_0805_5%
+1.5VS_ICHLAN
1 2
R332 0_0805_5%
+3VS
+3VALW
+1.5VS
+1.5VALW
+1.5VS
+3VS
+1.5VS
D
+3VS
12
C146
4.7U_0805_10V4Z
12
C463
.1U_0402_16V4Z
+3VALW
12
C433
4.7U_0805_10V4Z
12
C447
.1U_0402_16V4Z
+1.5VS
12
C425
4.7U_0805_10V4Z
E
12
C140
.1U_0402_16V4Z
12
C449
.1U_0402_16V4Z
12
C434
.1U_0402_16V4Z
12
C436
.1U_0402_16V4Z
12
C427
.1U_0402_16V4Z
12
C428
.1U_0402_16V4Z
12
C430
.1U_0402_16V4Z
12
C431
.1U_0402_16V4Z
12
C396
.1U_0402_16V4Z
12
C437
.1U_0402_16V4Z
12
C441
.1U_0402_16V4Z
12
C397
.1U_0402_16V4Z
12
C451
.1U_0402_16V4Z
12
C426
.1U_0402_16V4Z
12
C467
.1U_0402_16V4Z
F
12
C9
.1U_0402_16V4Z
12
C469
.1U_0402_16V4Z
12
C464
.1U_0402_16V4Z
12
C465
.1U_0402_16V4Z
12
C416
.1U_0402_16V4Z
12
C473
.1U_0402_16V4Z
12
C454
.1U_0402_16V4Z
12
C446
.1U_0402_16V4Z
G
12
C466
.1U_0402_16V4Z
12
C472
.1U_0402_16V4Z
12
C442
.1U_0402_16V4Z
12
C440
.1U_0402_16V4Z
12
C424
.1U_0402_16V4Z
12
C443
.1U_0402_16V4Z
12
C445
.1U_0402_16V4Z
H
12
C398
.1U_0402_16V4Z
VCC DECOUPLING
+1.5VS
12
C417
.1U_0402_16V4Z
12
C453
.1U_0402_16V4Z
12
C459
4.7U_0805_10V4Z
+1.5VALW
12
C444
.1U_0402_16V4Z
12
C429
.1U_0402_16V4Z
12
C435
.1U_0402_16V4Z
12
C439
4.7U_0805_10V4Z
VCCHI DECOUPLING
+CPU_CORE
12
C130
.1U_0402_16V4Z
+RTCVCC
C153
.1U_0402_10V6K
12
C438
.1U_0402_16V4Z
+1.5VS_PLL
12
C129
.1U_0402_16V4Z
12
C432
1U_0603_10V4Z
12
C128
.01U_0402_25V4Z
12
C468
.1U_0402_16V4Z
VCC5REFSUS
C136
1U_0603_10V4Z
12
D23
1SS355
12
C462
.1U_0402_16V4Z
21
12
C143
.1U_0402_16V4Z
12
R111 1K_0603_1%
12
C455
4.7U_0805_10V4Z
1U_0603_10V4Z
VCC5REF
C475
+3VS_ICHLAN+1.5VS_ICHLAN
12
C456
.1U_0402_16V4Z
+3VS +5VS+3VALW +5VALW
D13
1SS355
12
21
12
12
C474
.1U_0402_16V4Z
12
C461
.1U_0402_16V4Z
R349 1K_0603_1%
Dell-Compal Confidential
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
A
B
C
D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
E
F
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
INTEL ICH4 (3/3)
Abacus/TangII LA-1452
G
0.2
of
20 43Monday, August 26, 2002
H
Page 21
A
HDD Connector
SDD[0..15]<19>
1 1
SIDERST#<18>
SDDREQ<19> SDIOW#<19> SDIOR#<19> SDIORDY<19>
SDA1<19> SDA0<19> SDCS1#<19>
2 2
Correct HDD pin define ,pls update layout
SDD7 SDD6 SDD5 SDD4 SDD11 SDD3 SDD12 SDD2 SDD13 SDD1 SDD14 SDD0 SDD15
SDDREQ
SDIORDY RSDDACK#
+5VSHDD
IRQ15
SHDD_LED#
IRQ15<18>
SDD[0..15]
JP6
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44
FOX_HH99227-S1-TR
SDD8 SDD9 SDD10
SEC_CSEL
CD-ROM Connector
PDD[0..15]<19>
1 2
1 2
C196 47P_0402_25V8K
3 3
INT_CD_L<27>
PIDERST#<18>
PDIOW#<19>
PDIORDY<19>
IRQ14<18>
PDA1<19> PDA0<19>
PDCS1#<19>
+5VS
C197 47P_0402_25V8K
PDD7 PDD6 PDD5 PDD4 PDD12 PDD3 PDD2 PDD1 PDD0
PDIORDY IRQ14
PHDD_LED#
PRI_CSEL
R185
470_0402_5%
1 2
PDD[0..15]
JP14
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
SUYIN_800185MB050
CD_AGND <27>
PDD8 PDD9 PDD10 PDD11
PDD13 PDD14 PDD15 PDDREQ
RPDDACK#
PDIAG#
W=80mils
1 2
C563 .1U_0402_16V4Z
R274
1 2
470_0402_5%
SDA2 <19> SDCS3# <19>
+5VSHDD
INT_CD_R <27>
PDDREQ <19> PDIO R# <19>
R374
1 2
PDA2 <19> PDCS3# <19>
B
1 2
C195
47P_0402_25V8K
100K_0402_5%
+5VS
+5VS
Placea caps. near HDD CONN.
+5VSHDD
12
12
C389
.1U_0402_16V4Z
C386
1000P_0402_50V7K
SDDACK#<19>
PDDACK#<19>
Placea caps. near CDROM CONN.
+5VS
12
C567
1000P_0402_50V7K
+5VS
12
C206
1000P_0402_50V7K
C
Layout Note: +5VSHDD trace width 60 mil
12
C387
22U_1206_10V4Z
R280
1 2
R289 22_0402_5%
SDDREQ
+3VS
1 2
R371 22_0402_5%
PDDREQ
1 2
4.7K_0402_5%
1 2
33P_0402_50V8K
R370
1 2
4.7K_0402_5%
1 2
33P_0402_50V8K
12
C565
.1U_0402_16V4Z
12
C561
.1U_0402_16V4Z
C323
C559
+3VS
12
C375
1U_0603_10V4Z
SDIORDY
RSDDACK#
PDIORDY
RPDDACK#
12
C204
1U_0603_10V4Z
12
C205
1U_0603_10V4Z
12
C377
.1U_0402_16V4Z
12
C202
10U_1206_10V4Z
12
C203
10U_1206_10V4Z
D
SI2301DS: P CHANNEL VGS: -4.5V, RDS: 130 mOHM VGS: -2.5V, RDS: 190mOHM Id(MAX): 2.3A VGS(MAX): +-8V
E
D1
2SG3
Q6
R55 100K_0402_5%
R54
150K_0603_5%
C105
1 2
.1U_0402_16V4Z
R74 100K_0402_5%
U18B
4
5
74HCT08
+5VS
12
3
6
+12VALW
12
Q18
13
D
2N7002
R67
PHDD_LED#
SHDD_LED#
2
G
S
+5VS
147
U18A
1
2
74HCT08
+5VS
1 2
1 2
SIDEPWR<19>
100K_0402_5%
SI2301DS
2
12
C86 .1U_0402_16V4Z
ACT_LED#
+5VSHDD
13
ACT_LED# <29>
4 4
Dell-Compal Confidential
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
IDE/FDD/CD-ROM Module
Abacus/TangII LA-1452
0.2
of
21 43Monday, August 26, 2002
E
Page 22
5
+3VS
.1U_0402_16V4Z
12
C97
12
C96
10U_1206_10V4Z
D D
AD[0..31]<18,23,2 4,25,26,33>
C C
C/BE#3<1 8,23,25,26,33> C/BE#2<1 8,23,25,26,33> C/BE#1<1 8,23,25,26,33> C/BE#0<1 8,23,25,26,33>
PCI_FRAME#<18,23,25,26,33>
PCI_IRDY#<18,23,25,26>
PCI_TRDY#<18,23,25,26,33>
PCI_DEVSEL#<18,23,25,26>
C39
PCI_STOP#<18,23,25,26> PCI_PERR#<18,23,25,26> PCI_SERR#<18,23,25,26>
PCI_PAR<1 8,23,25,26>
PIRQB#<18>
PCIRST#0,16,18,23 ,25,26,30,33>
CLK_PCI_LAN<15 >
LAN_PME#<31>
CLKRUN#<19,25,26,30>
XI
12
27P_0402_50V8J
GNT#0<18> REQ#0<18>
25MHZ_30PPM
Y1
1 2
1 2
100_0402_5%
B B
A A
.1U_0402_16V4Z
AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20
AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
PCIRST#
LAN_AD17
XTA L
XO
R64
LAN_AD17AD17
5
12
C94
AD[0..31]
12
R29
200_0603_5%
12
C40
27P_0402_50V8J
.1U_0402_16V4Z
12
U11
122
PCI_AD31
123
PCI_AD30
124
PCI_AD29
126
PCI_AD28
127
PCI_AD27
128
PCI_AD26
1
PCI_AD25
3
PCI_AD24
6
PCI_AD23
8
PCI_AD22
9
PCI_AD21
10
PCI_AD20
11
PCI_AD19
14
PCI_AD18
15
PCI_AD17
16
PCI_AD16
33
PCI_AD15
34
PCI_AD14
36
PCI_AD13
37
PCI_AD12
38
PCI_AD11
39
PCI_AD10
41
PCI_AD9
42
PCI_AD8
45
PCI_AD7
48
PCI_AD6
49
PCI_AD5
50
PCI_AD4
51
PCI_AD3
53
PCI_AD2
54
PCI_AD1
55
PCI_AD0
4
PCI_CBE#3
18
PCI_CBE#2
32
PCI_CBE#1
43
PCI_CBE#0
20
PCI_FRAME#
21
PCI_IRDY#
23
PCI_TRDY#
26
PCI_DEVSEL#
27
PCI_STOP#
28
PCI_PERR#
29
PCI_SERR#
31
PCI_PAR
116
PCI_INT#
117
PCI_RST#
118
PCI_CLK
119
PCI_GNT#
121
PCI_REQ#
113
PCI_PME#
5
PCI_IDSEL
22
PCI_CLKRUN#
67
XTAL_IN
66
XTAL_OUT
BCM4401
C77
+1.8VLAN
12
C74
.1U_0402_16V4Z
+3VS
112
44
115
VDDCORE
VDDCORE17VDDCORE
.1U_0402_16V4Z
12
C88
+3VAUXLAN
125
7
VDDBUS
VDDBUS
VDDBUS19VDDBUS30VDDBUS40VDDBUS52VDDBUS
Broadcom
BCM 4401L
VSS12VSS46VSS
111
100
12
.1U_0402_16V4Z
106
94
VDDIO
VDDIO79VDDIO
VSS
VSS84VSS2VSS24VSS74VSS13VSS47VSS
4
.1U_0402_16V4Z
C87
+1.8VLAN
97
REGULATOR_AVDD96REGULATOR_AVDD
VSS
35
120
4
12
+3VS
92
114
VESD
REGULATOR_VOUT191REGULATOR_VOUT2
C80
+3VAUXLAN
12
C67
1000P_0402_50V7K
65
68
56
VESD25VESD
EPHY_LED#0
XTAL_AVSS
XTAL_AVDD
EPHY_LED#1 EPHY_LED#2 EPHY_LED#3
EPHY_AGND EPHY_AVDD
EPHY_BIAS_AVDD
EPHY_BIAS_AVSS
EPHY_PLLVDD EPHY_PLLGND
EPHY_VREF
EPHY_VDAC
EPHY_TESTMODE
EPHY_TDP EPHY_TDN EPHY_RDP EPHY_RDN
GPIO2/VAUXAVAIL
BOOTROM_SCL BOOTROM_SDA
SPROM_CS
SPROM_CLK
SPROM_DOUT
SPROM_DIN
EXT_POR#
JTAG_TDP
JTAG_TCK
JTAG_TDI
JTAG_TRST_L
JTAG_TMS
Place closely pin 118
CLK_PCI_LAN
12
R52
33_0402_5%
12
C79
22P_0402_50V8J
GPIO1 GPIO0
NC NC NC NC NC NC NC NC
+1.8VLAN
.1U_0402_16V4Z
12
C41
4.7U_0805_10V4Z
10K_0402_5%
LINK_LED10#
75
LINK_LED100#
76
ACTLED#
77 78
58 57
69 70
EPHY_PLLVDDAD19
64 63
71 72 88
62 61 59 60
104 105 103 108 102 109 110 107
87 86 85
90 93
98 95 101 99
89
83 80 82 73 81
12
L7 @BLM11A121S
L39 BLM11A121S
+3V
12
R33
R34 @10K_0402_5%
1 2
1 2
R28 1.27K_0603_1%
LAN_TX+ LAN_TX­LAN_RX+ LAN_RX-
12
R35
10K_0402_5%
4.7U_0805_10V4Z
R53 49.9_0805_1%
LAN_RX+
R51 49.9_0805_1%
LAN_RX­LAN_TX+
R42 49.9_0805_1% R46 49.9_0805_1%
LAN_TX-
Place close to U82
3
.1U_0402_16V4Z
12
C72
.1U_0402_16V4Z
12
12
+3VAUXLAN
12
12
R32
10K_0402_5%
+1.8VLAN
+3VAUXLAN
L8
1 2
220NH_FSR22J_0603
+3VAUXLAN
SPROM_CS SPROM_CLK SPROM_DOUT SPROM_DI
LAN_DISABLE# <30>
C95
15 mil
R31
10K_0402_5%
+1.8VLAN
12
12
C82
+3VAUXLAN+3VALW
Place close to pin 69
+3VAUXLAN
R30
@10K_0402_5%
C70
.1U_0402_16V4Z
Place close to pin 57
12
C46
1000P_0402_50V7K
LINK_LED10#
WLAN_LINK_10_LED<26>
LINK_LED100#
WLAN_LI NK_80211A<26>
ACTLED#
WLAN_ACT_LED<26>
R25
12
12
@10K_0402_5%
1 2 3 4
AT93C46
LAN_TX+ LAN_TX-
U8
CS SK DI DO
SPROM_DOUT SPROM_CLK
1Kb
4Kb
16Kb
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
10K Pullup
EPHY_PLLVDD
12
C54
12 12 12 12
3
None None
None
None
10K Pullup
C52
1000P_0402_50V7K
1 2
+3VAUXLAN
12
C56
.1U_0402_16V4Z
LAN_RX+ LAN_RX-
12
C215
.01U_0402_25V4Z
Close to RJ45 under inch
12
C84
.1U_0402_16V4Z
+3VAUXLAN
12
C55
10U_1206_10V4Z
D8 RB751V
D9 RB751V
D2 RB751V
D7 RB751V
D10 RB751V
VCC
NC
NC/ORG
GND
+3VAUXLAN
12
.01U_0402_25V4Z
+3VAUXLAN
8 7 6 5
C213
2
WLAN_LINK_80211A
WLAN_LINK_10_LDE
WLAN_LINK_80211A
WLAN_LINK_10_LDE
12
C48
.1U_0402_16V4Z
21
2
21
21
2
21
21
2
12
@100K_0402_5%
U2
1
TD+
TX+
TD-2TX-
3
TCT
TDC
4
RDC
RCT
5
RD+
RX+
6
RD-
RX-
Pulse_H1112
2
WLAN LOM
WLAN_ACT_LED
13
D
Q16 2N7002
G
S
13
D
Q15 2N7002
G
S
(LAN_ACTIVE)
13
D
G
S
Q17 2N7002
12
C20
R452
.1U_0402_16V4Z
12 11
10 9
8 7
12
75_0603_1%
C211
1000P_1206_2KV7K_R45
1
LED (JP28)
12
C45
.1U_0402_16V4Z
(LAN_10LINK)
(LAN_100LINK)
2
10K
12
R193
75_0603_1%
1 2
LINK_LED100#
LINK_LED10#
ACTLED#
NC
12
C47
.1U_0402_16V4Z
+3VAUXLAN
B
2
10K
+3VAUXLAN
31
E
47K
B
C
LAN_RJ45T+
LAN_RJ45T-
LAN_RJ45R+
LAN_RJ45R-
12
R190
75_0603_1%
+3VAUXLAN
B
2
10K
31
E
47K
C
Q5
DTA114YKA
R15
1 2
200_0603_5%
12
R191
R192
75_0603_1%
C212
1 2
1000P_1206_2KV7K_R45
ORANGE (100M)
GREEN (10M)
YELLOW
ORANGE/GREEN
12
C38
.1U_0402_16V4Z
31
Q4
E
DTA114YKA
47K
C
R14
200_0603_5%
Q3
DTA114YKA
R13
12
200_0603_5%
9
JP7
1
PR1+
2
PR1-
3
PR2+
4
5
6
7
8
LDE_ORANGE+
PR3+
PR3-
PR2-
PR4+
PR4-
FOX_JM66113-L1B1
12
10
11
12
G_O_LED-
LDE_GREEN+
LED_YELLOW+
SHLD1
SHLD2
14
15
Chassis GND & Digital GND Short Together
Dell-Compal Confidential
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
BROADCOM 4401L LAN
Abacus/TangII LA-1452
22 43Tuesday, A ugust 27, 2002
1
13
LED_YELLOW-
0.2
of
Page 23
A
B
C
D
E
This page POP with 845PE for EXT.
R73
@402K_0603_1%
12
+3V_CBSD
@0_0402_5%
@0_0402_5%
1 1
2 2
3 3
R69 @0_0402_5%
R72
2@0_0402_5%
R65 2@1K_0402_5%
R56 2@1K_0402_5%
CBS_MFUNC1
CBS_MFUNC2
CBS_MFUNC4
CBS_MFUNC5
CBS_MFUNC6
R68
R59
1 2
1 2
1 2
12
12
1 2
R71
R58
1 2
1 2
2@0_0402_5%
2@0_0402_5%
C89 2@.1U_0402_16V4Z
+3V_CBSA
R23 2@10K_0402_5%
1 2
R38 2@10K_0402_5%
1 2
R36 2@10K_0402_5%
1 2
R39 2@10K_0402_5%
1 2
R26 2@10K_0402_5%
1 2
R70
2@1K_0402_5%
1 2
2@43K_0402_5%
1 2
12
2@1U_0603_10V4Z
1 2
C78 2@.1U_0402_10V6K
12
R50
R63
2@6.34K_0603_1%
IEEE1394_TPA0+
IEEE1394_TPA0-
IEEE1394_TPB0+
IEEE1394_TPB0-
IEEE1394_TPB1+
IEEE1394_TPB1-
IEEE1394_TPBIAS0
IEEE1394_TPBIAS1
12
C98
VDPLL
FILTER0 FILTER1
+3V_CBSD
PHY_CPS
PHY_CNA
CBS_PC0 CBS_PC1 CBS_PC2
PCI4510_R0
PCI4510_R1
U35B
P10
CPS
P17
CNA
V10
PC0
W10
PC1
P9
PC2
W13
R0
V13
R1
V12
TPA0+
W12
TPA0-
V15
TPA1+
W15
TPA1-
V11
TPB0+
W11
TPB0-
V14
TPB1+
W14
TPB1-
U12
TPBIAS0
U15
TPBIAS1
R11
AVD2
U13
AVD3
U14
AVD4
U11
AGND2
R12
AGND3
R13
AGND4
P15
VDPLL
N14
VSPLL
T19
FILTER0
R17
FILTER1
N15
MC_RSVD1
M14
MC_RSVD3
N17
MC_RSVD4
N18
MC_RSVD5
N19
MC_RSVD6
M15
MC_RSVD7
M17
MC_RSVD8
M18
MC_RSVD9
M19
MC_RSVD10
B7
SC_CD#
C7
SC_RST
F7
SC_CLK
A6
SC_DATA
B6
SC_PWR
E7
SC_MODE
C6
SC_FCB
2@PCI4510PDV_BGA-209
POP for 845PE
+3V +3V_CBSA
L10
2@BLM21A601SPT
1 2
4 4
12
C114
2@10U_1206_10V4Z
2@.1U_0402_16V4Z
A
12
C108
2@.1U_0402_16V4Z
12
C101
12
C102
2@.1U_0402_16V4Z
12
+3V_CBSA
PCI4510
C109
2@.1U_0402_16V4Z
VCC_G01 VCC_M01 VCC_R01
VCC_W08
VCC_L19 VCC_H19 VCC_E19 VCC_A13 VCC_A08 VCC_A05
VCCCB_G14
VCCCB_A11
VCCP_L01
VCCP_W05
1.8V_G02
1.8V_L18
VCCD0# VCCD1#
VPPD0# VPPD1#
GND_E01 GND_K01 GND_N01
GND_W06
GND_P19 GND_K19
GND_G19
GND_A15 GND_A10
GND_A7
VR_EN#
SUSPEND#
RI_OUT#/PME#
SPKROUT
INTA#/MFUNC0 INTB#/MFUNC1
MFUNC2
MFUNC3
MFUNC4
LEDSKT/MFUNC5
MFUNC6
PHY_TEST_MA
TEST0
TEST1
CLK48_RSVD
B
+3V_CBSD
G1 M1 R1 W8 L19 H19 E19 A13 A8 A5
G14 A11
L1 W5
G2 L18
E6 B5
A4 C5
E1 K1 N1 W6 P19 K19 G19 A15 A10 A7
H5
G3
J3
E2
F5 G6 F3 F2 G5 F1 H6
E3
SCL
D1
SDA
P18
U10
R10
F6
R18
XI
R19
XO
2@22P_0402_50V8J
R21 2@220_0402_5%
R37 2@220_0402_5%
1 2
1 2
C73 2@ .1U_0402_16V4Z
1V8_VR_EN#
2@0_0402_5%
PCM_SPK#
PIRQA# CBS_MFUNC1 CBS_MFUNC2
CBS_MFUNC4 CBS_MFUNC5 CBS_MFUNC6
CBS_SCL CBS_SDA
PHY_TEST_MA
CBS_TEST0
CBS_TEST1
PCI4510XI
PCI4510XO
C83
12
12
+3V_CBSA
1 2
2@BLM21A05_0805
CBS_VCC
+3V_CBSD
C53 2 @.1U_0402_16V4Z
VCCD0# <24,25> VCCD1# <24,25>
VPPD0 <24,25> VPPD1 <24,25>
R22
2@0_0402_5%
12
PCM_SUSP# <24,25,30>
R57
12
PCM_PME# <25,31>
PCM_SPK# <25,28>
PIRQA# <18,25>
SIRQ <18,25,30>
R44 2@4.7K_0402_5%
R61 2@200_0402_5%
R60 2@200_0402_5%
2@24.576MHz30-ppm
1 2
12
2@22P_0402_50V8J
12
12
12
X1
12
C106
CBS_SCL
CBS_SDA
L11
12
C115
2@10U_1206_10V4Z
Place close to pin H1
CLK_PCI_PCM
12
R47
@33_0402_5%
12
C75
@22P_0402_50V8J
+3V_CBSD
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
AD[0..31]<18,22, 24,25,26,33>
VDPLL
12
C103
2@.01U_0402_25V4Z
PCI_DEVSEL#<18,22,25,26>
PCI_FRAME#<18,22 ,25,26,33>
CLK_PCI_PCM<15,25>
PCI_PAR<18,22,25,26>
PCI_IRDY#<18,22,25,26>
PCI_PERR#<18,22,25,26>
PCI_SERR#<18,22,25,26>
PCI_STOP#<18,22,25,26>
PCI_TRDY#<18,22,25,26,33>
PCIRST#<6,10,16,1 8,22,25,26,30,33>
V_PRST#<16,24,25>
PCM_ID<24,25>
C/BE#3<18,22,25,26,33> C/BE#2<18,22,25,26,33> C/BE#1<18,22,25,26,33> C/BE#0<18,22,25,26,33>
GNT#2<18,25>
REQ#2<18,25>
IEEE1394_TPBIAS0
2@1U_0603_10V4Z
IEEE1394_TPB0­IEEE1394_TPB0+ IEEE1394_TPA0­IEEE1394_TPA0+
2@270P_0603_50V8K
2@56.2_0603_1%
U35A
AD31
J5
AD31
AD30
J6
AD30
AD29
K2
AD29
AD28
K3
AD28
AD27
K5
AD27
AD26
K6
AD26
AD25
L2
AD25
AD24
L3
AD24
AD23
M2
AD23
AD22
M3
AD22
AD21
M6
AD21
AD20
M5
AD20
AD19
N2
AD19
AD18
N3
AD18
AD17
N6
AD17
AD16
P1
AD16
AD15
R6
AD15
AD14
P7
AD14
AD13
V5
AD13
AD12
U6
AD12
AD11
V6
AD11
AD10
R7
AD10
AD9
P8
AD9
AD8
U7
AD8
AD7
W7
AD7
AD6
R8
AD6
AD5
U8
AD5
AD4
V8
AD4
AD3
W9
AD3
AD2
V9
AD2
AD1
U9
AD1
AD0
R9
AD0
L6
C/BE3#
P2
C/BE2#
U5
C/BE1#
V7
C/BE0#
W4
PCI_PAR
R2
DEVSEL#
N5
FRAME#
J1
GNT#
P3
IRDY#
R3
PERR#
J2
REQ#
T1
SERR#
P5
STOP#
P6
TRDY#
H3
PCI_RESET#
H2
G_RST#
PCM_ID CBS_CVS1
L5
IDSEL
H1
PCICLK
2@PCI4510PDV_BGA-209
2@56.2_0603_1%
12
R199
12
12
12
D
C223
R197
C216
PCI4510
12
R198
2@56.2_0603_1%
12
R196
2@56.2_0603_1%
12
R194 2@5.1K_0603_5%
AD[0..31]<18,22, 24,25,26,33>
CC/BE3#/REG#
CDEVSEL#/A21
CSERR#/WAIT#
CREQ#/INPACK#
CSTSCHG/BVD1
CCLKRUN#/WP
AD[0..31]
CAD31/D10
CAD30/D9 CAD29/D1 CAD28/D8 CAD27/D0 CAD26/A0 CAD25/A1 CAD24/A2 CAD23/A3 CAD22/A4 CAD21/A5 CAD20/A6
CAD19/A25
CAD18/A7 CAD17/A24 CAD16/A17
CAD15/IOWR#
CAD14/A9
CAD13/IORD#
CAD12/A11
CAD11/OE#
CAD10/CE2#
CAD9/A10
CAD8/D15
CAD7/D7
CAD6/D13
CAD5/D6
CAD4/D12
CAD3/D5
CAD2/D11
CAD1/D4 CAD0/D3
CC/BE2#/A12
CC/BE1#/A8
CC/BE0#/CE1#
CRESET
CFRAME#/A23
CIRDY#/A15
CTRDY#/A22
CSTOP#/A20 CPERR#/A14
CPAR/A13
CGNT#/WE#
CCLK/A16
CBLOCK#/A19 CINT#/READY
CAUDIO/BVD2
CCD2/CD2# CCD1/CD1#
CVS2/VS2# CVS1/VS1#
CRSVD/D2 CRSVD/A18 CRSVD/D14
U3
8
8
7
7
6
6
5
5
@KC_BTS0402-01_8P
RP1
1 8 2 7 3 6 4 5
2@0_1206_8P4R_5%
CBS_CAD31
E8
CBS_CAD30
C8
CBS_CAD29
B8
CBS_CAD28
E9
CBS_CAD27
F9
CBS_CAD26
F11
CBS_CAD25
E11
CBS_CAD24
C11
CBS_CAD23
A12
CBS_CAD22
C12
CBS_CAD21
E12
CBS_CAD20
C13
CBS_CAD19
A14
CBS_CAD18
E13
CBS_CAD17
B14
CBS_CAD16
F18
CBS_CAD15
G17
CBS_CAD14
F19
CBS_CAD13
G18
CBS_CAD12
H15
CBS_CAD11
H14
CBS_CAD10
H17
CBS_CAD9
H18
CBS_CAD8
J14
CBS_CAD7
J17
CBS_CAD6
K14
CBS_CAD5
J19
CBS_CAD4
K17
CBS_CAD3
K15
CBS_CAD2
L14
CBS_CAD1
K18
CBS_CAD0
L15
CBS_CC/BE3#
B11
CBS_CC/BE2#
C14
CBS_CC/BE1#
G15
CBS_CC/BE0#
J15
CBS_CRST#
B13
CBS_CFRAME#
B15
CBS_CIRDY#
F13
CBS_CTRDY#
E14
CBS_CDEVSEL#
A16
CBS_CSTOP#
E17
CBS_CPERR#
F15
CBS_CSERR#
E10
CBS_CPAR
F14
CBS_CREQ#
B12
CBS_CGNT#
D19
CBS_CCLK_INTERNAL
C15
CBS_CSTSCHNG
A9
CBS_CCLKRUN#
B9
CBS_CBLOCK#
E18
CBS_CINT#
C10
CBS_CAUDIO
F10
CBS_CCD2#
C9
CBS_CCD1#
L17
CBS_CVS2
F12 B10
CBS_RSVD/D2
F8
CBS_RSVD/A18
F17
CBS_RSVD/D14
J18
1
1
2
2
3
3
4
4
CBS_CAD [0..31] <24,25>
CBS_CC /BE3# <24,25> CBS_CC /BE2# <24,25> CBS_CC /BE1# <24,25> CBS_CC /BE0# <24,25>
CBS_CRST# <24,25>
CBS_CFRAME # <24,25> CBS_ CIRDY# <24,25> CBS_C TRDY# <24,25> CBS_CDEVSEL# <24,25> CBS_CSTOP# <24,25> CBS_CPE RR# <24,25>
CBS_CSE RR# <24,25>
CBS_CPA R <24,25> CBS_CREQ# <24,25> CBS_CGNT# <24,25> CBS_CC LK_INTERNAL <24,25>
CBS_CSTSCHNG <24,25>
CBS_C CLKRUN# <24,25>
CBS_CBLOC K# <24,25> CBS_CINT# <24,25>
CBS_C AUDIO <24,25> CBS_CC D2# <24,25> CBS_CC D1# <24,25>
CBS_CVS2 <24,25>
CBS_CVS1 <24,25>
CBS_R SVD/D2 <24,25>
CBS_RSV D/A18 <24,25>
CBS_RSV D/D14 <24,25>
TPB0-
1
TPB0+
2
TPA0-
3 4
TPA0+
5 6 7 8
JP2
1 2 3 4
GND1 GND2 GND3 GND4
2@AMP_440168-2_4P
Dell-Compal Confidential
Compal Electronics, Inc.
Title
PCMCIA Ctrl OZ6912 & Socket
Size Document Number Rev
Abacus/TangI I LA-1452
Date: Sheet
E
of
23 43Monday, August 26, 2002
0.2
Page 24
A
PCMCIA Power Controller
B
C
D
E
13 12 11
10
1 2 15 14
8
V_PRST#
CBS_VCC
12
C18
4.7U_0805_10V4Z
CBS_VPP
12
L6
L5
C23
VCCD0 # <23,25> VCCD1 # <23,25> VPPD0 <23,25> VPPD1 <23,25>
12
C50
4.7U_0805_10V4Z
.1U_0402_16V4Z
VCCD0# VCCD1# VPPD0 VPPD1
V_PRST# <16,23,25>
CBS_VCCL
12
C60
.01U_0402_25V4Z
FBM-L11-201209-221LMAT
1 2
1 2
@FBM-L11-201209-221LMAT
CardBus Socket
JP18
1
1
35
2
2
36
3
3
37
4
4
38
5
5
39
6
6
40
7
7
41
8
8
42
9
9
43
10
10
44
11
11
45
12
12
46
13
13
47
14
14
48
15
15
49
16
16
50
17
17
51
18
18
52
19
19
53
20
20
54
21
21
55
22
22
56
23
23
57
24
24
58
25
25
59
26
26
60
27
27
61
28
28
62
29
29
63
30
30
64
31
31
65
32
32
66
33
33
67
34
34
68
69
GND
GND GND71GND GND73GND
JAE_JC21-BRB_68P
+3V
BLM21A601SPT
12
C71
.1U_0402_16V4Z
L9
1 2
.1U_0402_16V4Z
10U_1206_10V4Z
12
C36
12
C85
.1U_0402_16V4Z
12
C51
10U_1206_10V4Z
CBS_VCC
12
C57
.1U_0402_16V4Z
12
C34
.1U_0402_16V4Z
12
C37 .1U_0402_16V4Z
12
C81
12
.1U_0402_16V4Z
12
C92
.1U_0402_16V4Z
C35 .1U_0402_16V4Z
+3V_CBSD
12
12
C49
C90
.1U_0402_16V4Z
Near U35 Pin G14 Near U35 Pin A11
CBS_VCCL
C19
12
35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 70 72 74
1000P_0402_50V7K
CBS_CCD1# CBS_CAD2 CBS_CAD4 CBS_CAD6 CBS_RSVD/D14 CBS_CAD8 CBS_CAD10 CBS_CVS1 CBS_CAD13 CBS_CAD15 CBS_CAD16 CBS_RSVD/A18 CBS_CBLOCK# CBS_CSTOP# CBS_CDEVSEL#
CBS_CTRDY# CBS_CFRAME# CBS_CAD17 CBS_CAD19 CBS_CVS2 CBS_CRST# CBS_CSERR# CBS_CREQ# CBS_CC/BE3# CBS_CAUDIO CBS_CSTSCHNG CBS_CAD28 CBS_CAD30 CBS_CAD31 CBS_CCD2#
12
CBS_CCD1# <23,25> CBS_CAD2 <23,25> CBS_CAD4 <23,25> CBS_CAD6 <23,25> CBS_RSV D/D14 <23,25> CBS_CAD8 <23,25> CBS_CAD10 <23,25> CBS_CVS1 <23,25> CBS_CAD13 <23,25> CBS_CAD15 <23,25> CBS_CAD16 <23,25> CBS_RSVD /A18 <23,25> CBS_CBLOCK# <23,25> CBS_CSTOP# <23,25> CBS_CDEVSEL# <23,25>
CBS_VCCLCBS_VCCL
CBS_C TRDY# <23,25> CBS_CFRAME # <23,25> CBS_CAD17 <23,25> CBS_CAD19 <23,25> CBS_CVS2 <23,25>
CBS_CRST# <23,25>
CBS_CSE RR# <23,25>
CBS_CREQ# <23,25> CBS_CC /BE3# <23,25>
CBS_C AUDIO <23,25>
CBS_CSTSCHNG <23,25> CBS_CAD28 <23,25> CBS_CAD30 <23,25> CBS_CAD31 <23,25>
CBS_CCD2# <23,25>
C107 1000P_0402_50V7K
AD20<18,22,23,25,26>
PCM_SUSP#<23,25,30>
+3V_CBSD
CBS_CCLK
C76
.1U_0402_16V4Z
1 2
Near U35 Pin L1
R27
47_0402_5%
1 2
1 2
R41 100_0402_5%
R40 10K_0402_5%
12
C93
.1U_0402_16V4Z
Near U35 Pin W5
CBS_CC LK_INTERNAL <23,25>
PCM_IDAD20
12
+3V_CBSD
PCM_ID <23,25>
Dell-Compal Confidential
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
PCMCIA Ctrl OZ6912 & Socket
Size Document Number Rev
Abacus/TangI I LA-1452
Date: Sheet
E
of
24 43Tuesday, Au gust 27, 2002
0.2
+12VALW
12
C31
+3VALW
CBS_VPP
.1U_0603_50V4Z
12
C25
.1U_0402_16V4Z
12
12
C17
1U_0603_10V4Z
CBS_CAD0<23,25> CBS_CAD1<23,25> CBS_CAD3<23,25> CBS_CAD5<23,25> CBS_CAD7<23,25> CBS_CC/BE0#<23,25> CBS_CAD9<23,25> CBS_CAD11<23,25> CBS_CAD12<23,25> CBS_CAD14<23,25> CBS_CC/BE1#<23,25> CBS_CPAR<23,25> CBS_CPERR#<23,25>
CBS_CGNT#<23,25>
CBS_CINT#<23,25>
CBS_CIRDY#<23,25> CBS_CC/BE2#<23,25> CBS_CAD18<23,25> CBS_CAD20<23,25> CBS_CAD21<23,25> CBS_CAD22<23,25> CBS_CAD23<23,25> CBS_CAD24<23,25> CBS_CAD25<23,25> CBS_CAD26<23,25> CBS_CAD27<23,25> CBS_CAD29<23,25> CBS_RSVD/D2<23,25> CBS_CCLKRUN#<23,25>
C21
.1U_0402_16V4Z
A
1 1
2 2
3 3
4 4
U7
VCC
VCCD0 VCCD1
VPPD0 VPPD1
GND
SHDN
7
16
CBS_VCC
CBS_CAD0 CBS_CAD1 CBS_CAD3 CBS_CAD5 CBS_CAD7 CBS_CC/BE0# CBS_CAD9 CBS_CAD11 CBS_CAD12 CBS_CAD14 CBS_CC/BE1# CBS_CPAR CBS_CPERR# CBS_CGNT# CBS_CINT#
CBS_CCLK CBS_CIRDY# CBS_CC/BE2# CBS_CAD18 CBS_CAD20 CBS_CAD21 CBS_CAD22 CBS_CAD23 CBS_CAD24 CBS_CAD25 CBS_CAD26 CBS_CAD27 CBS_CAD29 CBS_RSVD/D2 CBS_CCLKRUN#
VCC VCC
VPP
OC
9
12V
+5VALW
5
5V
6
5V
+3VALW
3
3.3V
4
3.3V
+5VALW
12
C30
1U_0603_10V4Z
12
.01U_0402_25V4Z
12
C24
C26
1U_0603_10V4Z
CBS_VPP CBS_VPP
Page 25
A
B
C
D
E
This page POP with 845GL for INT.
U34B
A_D3/CAD0
1 1
56 55 53 52 51 50 49 48 46 45 44 43 42 41 39 38 25 24 23 22 18 17 16 15 11 10
9 7 6 5 4 3
47 37 26 13
14
20
35 34 33 31 28 29 19 30 27
2 1
U34A
PCI1510
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE0# C/BE1# C/BE2# C/BE3#
IDSEL
PCLK
PAR SERR# PERR# STOP# IRDY# TRDY# PRST# DEVSEL# FRAME# GNT# REQ#
1@PCI1510
CLK_48M_RSVD
PCI PWR
PCI BUS
GND
Multifunction& Miscellaneous
MF0/INTA#
MF1
MF2/DMAREQ#
MF3/IRQSER
MF4/RI_OUT#
MF5/DMAGNT#
MF6/CLKRUN#
RI_OUT#/PME#
SPKROUT
SUSPEND#
VR_EN#
VR_PORT
VCCP
VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7
CORE LOGIC
PWR
GND GND GND GND GND GND GND GND
VCCD0# VCCD1#
VPPD0 VPPD1
Card PWR
S/W
GRST#
58 59 63 64 67 68 69
57 61 65 85
125 62
36
54 70 104 126 137 12 32
8 21 40 60 80 93 112 132
73 74 71 72
66
CBS_1510MF1 CBS_1510MF2
CBS_1510MF4 CBS_1510MF5
C91 1@.1U_0402_16V4Z
+3V_CBSD
PIRQA# <18,23>
SIRQ <18,23,30>
CLKR UN# <1 9,22,26,30>
VCCD0# <23,24> VCCD1# <23,24> VPPD0 <23,24> VPPD1 <23,24>
V_PRST# <16,23,24>
CBS_1510MF1
CBS_1510MF2
CBS_1510MF4
CBS_1510MF5
PCM_PME# <23,31> PCM_SPK# <23,28> PCM_SUSP# <23,24,30>
R75 1@10K_0402_5%
1 2
R76 1@10K_0402_5%
1 2
R66 1@10K_0402_5%
1 2
R62 1@10K_0402_5%
1 2
+3V_CBSD
AD[0..31]<18,22, 23,24,26,33>
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18
2 2
CLK_PCI_PCM<15,23>
PCI_SERR#< 18,22,23,26> PCI_PERR#< 18,22,23,26>
PCI_TRDY#<18,22,23,26,33>
PCI_DEVSEL#<18,22,23,26>
3 3
PCI_FRAME#<18,2 2,23,26,33>
AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE#0<18,22,23,26,33> C/BE#1<18,22,23,26,33> C/BE#2<18,22,23,26,33> C/BE#3<18,22,23,26,33>
PCM_ID<23,24>
PCI_PAR<18,22,23,26>
PCI_STOP#<18,22,23,26> PCI_IRDY#< 18,22,23,26>
PCIRST#<6,10,16,1 8,22,23,26,30,33>
GNT#2<18,23> REQ#2<18,23>
PCM_ID
PCI1510
1@PCI1510
A_D4/CAD1
A_D11/CAD2
A_D5/CAD3
A_D12/CAD4
A_D6/CAD5
A_D13/CAD6
A_D7/CAD7
A_D15/CAD8
A_A10/CAD9
A_CE2#/CAD10
A_OE#/CAD11
A_A11/CAD12
A_IORD#/CAD13
A_A9/CAD14
A_IOWR#/CAD15
A_A17/CAD16 A_A24/CAD17
A_A7/CAD18
A_A25/CAD19
A_A6/CAD20 A_A5/CAD21 A_A4/CAD22 A_A3/CAD23 A_A2/CAD24 A_A1/CAD25
A_A0/CAD26 A_D0/CAD27 A_D8/CAD28 A_D1/CAD29 A_D9/CAD30
A_D10/CAD31
A_A18/RSVD A_D14/RSVD
A_D2/RSVD
A_CE1#/CC/BE0#
A_A8/CC/BE1#
A_A12/CC/BE2#
A_REG#/CC/BE3#
A_A13/CPAR
A_A14/CPERR#
A_A15/CIRDY#
A_A16/CCLK
A_A19/CBLOCK#
PC CARD / CARD BUS INTERFACE
A_A20/CSTOP#
A_A21/CDEVSEL#
A_A22/CTRDY#
A_A23/CFRAME#
A_BVD1/CSTSCHG
A_BVD2/CAUDIO
A_READY/CINT# A_WAIT#/CSERR# A_WP/CCLKRUN#
A_CD1#/CCD1# A_CD2#/CCD2#
A_INPACK/CREQ#
A_WE#/CGNT#
A_VS1#/CVS1 A_VS2#/CVS2
A_RESET/CRST#
VCC_CARD
CBS_CAD0
76
CBS_CAD1
78
CBS_CAD2
77
CBS_CAD3
81
CBS_CAD4
79
CBS_CAD5
83
CBS_CAD6
82
CBS_CAD7
86
CBS_CAD8
87
CBS_CAD9
89
CBS_CAD10
90
CBS_CAD11
91
CBS_CAD12
92
CBS_CAD13
94
CBS_CAD14
96
CBS_CAD15
95
CBS_CAD16
97
CBS_CAD17
114
CBS_CAD18
115
CBS_CAD19
116
CBS_CAD20
118
CBS_CAD21
120
CBS_CAD22
121
CBS_CAD23
123
CBS_CAD24
127
CBS_CAD25
128
CBS_CAD26
129
CBS_CAD27
139
CBS_CAD28
140
CBS_CAD29
141
CBS_CAD30
142
CBS_CAD31
144
CBS_RSVD/A18
99
CBS_RSVD/D14
84
CBS_RSVD/D2
143
CBS_CC/BE0#
88
CBS_CC/BE1#
98
CBS_CC/BE2#
113
CBS_CC/BE3#
124
CBS_CPAR
100
CBS_CPERR#
102
CBS_CIRDY#
110
CBS_CCLK_INTERNAL
107
CBS_CBLOCK#
101
CBS_CSTOP#
103
CBS_CDEVSEL#
106
CBS_CTRDY#
108
CBS_CFRAME#
111
CBS_CSTSCHNG
135
CBS_CAUDIO
134
CBS_CINT#
131
CBS_CSERR#
133
CBS_CCLKRUN#
136
CBS_CCD1#
75
CBS_CCD2#
138
CBS_CREQ#
122
CBS_CGNT#
105
CBS_CVS1
130
CBS_CVS2
117
CBS_CRST#
119 109
CBS_VCC
CBS_CAD[0..31]
CBS_RSVD /A18 <23,24> CBS_RSV D/D14 <23,24> CBS_RSV D/D2 <23,24>
CBS_CC /BE0# <23,24> CBS_CC /BE1# <23,24> CBS_CC /BE2# <23,24> CBS_CC /BE3# <23,24> CBS_CPA R <23,24> CBS_CPE RR# <23,24> CBS_ CIRDY# <23,24>
CBS_CC LK_INTERNAL <23,24>
CBS_CBLOCK# <23,24> CBS_CSTOP# <23,24> CBS_CDEVSEL# <23,24> CBS_CT RDY# <23,24>
CBS_CFRAME # <23,24> CBS_CSTSCHNG <23,24> CBS_C AUDIO <23,24> CBS_CINT # <23,24> CBS_CSE RR# <23,24>
CBS_CCLKRUN# <23,24>
CBS_CCD1# <23,24> CBS_CCD2# <23,24>
CBS_CREQ # <23,24> CBS_CGNT# <23,24>
CBS_CVS1 <23,24>
CBS_CVS2 <23,24>
CBS_CRST# <23,24>
CBS_C AD[0..31] <23,24>
4 4
Dell-Compal Confidential
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
PCMCIA Ctrl OZ6912 & Socket
Size Document Number Rev
Abacus/TangI I LA-1452
Date: Sheet
E
of
25 43Monday, August 26, 2002
0.2
Page 26
5
4
3
2
1
MINI PCI TYPE III
+3VMINI
D D
WLAN_ACT_LED<22>
RADIO_DISABLE#<30>
PIRQD#<18>
CLK_PCI_MINI<15>
REQ#1<18>
C C
B B
PCI_IRDY#<1 8,22,23,25>
CLKRUN#<19,22,25,30>
PCI_SERR#< 18,22,23,25>
PCI_PERR#< 18,22,23,25>
+5VMINI
+5VMINI
AD31 AD29
AD27 AD25
C/BE#3 AD23
AD21 AD19
AD17 C/BE#2
C/BE#1 AD14
AD12 AD10
AD8 AD7
AD5
AD3
AD1
JP24
1
TIP
3
8PMJ-3
5
8PMJ-6
7
8PMJ-7
9
8PMJ-8
11
LED1_GRNP
13
LED1_GRNN
15
CHSGND
17
INTB#
19
3.3V
21
RESERVED
23
GROUND
25
CLK
27
GROUND
29
REQ#
31
3.3V
33
AD31
35
AD29
37
GROUND
39
AD27
41
AD25
43
RESERVED
45
C/BE#3
47
AD23
49
GROUND
51
AD21
53
AD19
55
GROUND
57
AD17
59
C/BE#2
61
IRDY#
63
3.3V
65
CLKRUN#
67
SERR#
69
GROUND
71
PERR#
73
C/BE#1
75
AD14
77
GROUND
79
AD12
81
AD10
83
GROUND
85
AD8
87
AD7
89
3.3V
91
AD5
93
RESERVED
95
AD3
97
5V
99
AD1
101
GROUND
103
AC_SYNC
105
AC_SDATA_IN
107
AC_BIT_CLK
109
AC_CODEC_ID1#
111
MOD_AUDIO_MON
113
AUDIO_GND
115
SYS_AUDIO_OUT
117
AUDIO_OUTGND
119
AUDIO_GND
121
RESEVED
123
VCC5VA
127
127
RING
8PMJ-1 8PMJ-2 8PMJ-4
8PMJ-5 LED2_YELP LED2_YELN REVERVED
INTA#
RESERVED
3.3VAUX RST#
3.3V
GNT#
GROUND
PME#
RESERVED
AD30
3.3V AD28 AD26 AD24
IDSEL
GROUND
AD22 AD20
PAR AD18 AD16
GROUND
FRAME#
TRDY# STOP#
3.3V
DEVSEL#
GROUND
AD15 AD13 AD11
GROUND
AD09
C/BE#0
3.3V AD6 AD4 AD2 AD0
RESERVED_WIP RESERVED_WIP
GROUND
M66EN
AC_SDATA_OUT
AC_CODEC_ID0#
AC_RESET#
RESERVED
GROUND
SYS_AUDIO_IN
AUDIO_INGND
AUDIO_GND
MPCIACT#
3.3VAUX
AMP 1318914
5V
128
+3VMINI
2
4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124
128
+3VAUXMINI
AD30
AD28 AD26 AD24
1 2
R403 100_0402_5%
AD22 AD20
AD18 AD16
AD15 AD13 AD11
AD9 C/BE#0
AD6 AD4 AD2 AD0
M66EN
MPCIACT#
WLAN_LINK_10_LED <22> WLAN_LINK_80211A <22>
+5VMINI
PIRQC# <18>
PCIRST# <6,10,16,18,22,23,25,30,33>
GNT#1 <18>
MINI_PME # <31>
AD18
IDSEL AD18
PCI_ PAR <18,22,23,25>
PCI_FRAME# <18,22,23,25,33> PCI_T RDY# <18,22,23,25,33> PCI_STOP# <18,22,23,25>
PCI_DEVSEL# <18,22,23,25>
DIMM_SMCLK < 12,13,15,18> DIMM_SMDATA <12 ,13,15,18>
Place close to pin 25
CLK_PCI_MINI
R428 33_0402_5%
1 2
C614
22P_0402_50V8J
1 2
+3VAUXMINI
12
C600
.1U_0402_16V4Z
+3VAUXMINI +3VALW
WLAN_LINK_80211A
WLAN_LINK_10_LED
WLAN_ACT_LED
M66EN
MPCIACT#
12
C596
.1U_0402_16V4Z
AD[0..31]<18,22,23,24,25,33>
C/BE#[0..3]<18,22,23,25,33>
R398 100K_0402_5%
R397 100K_0402_5%
R429 100K_0402_5%
R401 1K_0402_5%
R405 100K_0402_5%
12
C616
.1U_0402_16V4Z
AD[0..31]
C/BE#[0..3]
1 2
R400 @0_0603_5%
1 2
R399 0_0603_5%
12
12
12
12
12
30mil
L36
1 2
BLM21A05_0805
12
C610 1000P_0402_50V7K
+3VAUXMINI
+3V
+5VS+5VMINI
WIRELESS SUPPORT ONLY
A A
+3VMINI
12
C613
10U_1206_10V4Z
.1U_0402_16V4Z
12
C612
.1U_0402_10V6K
12
C599
30mil
12
12
C598
.1U_0402_16V4Z
BLM21A05_0805
C609 1000P_0402_50V7K
L35
1 2
+3VS
Dell-Compal Confidential
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET N OR THE INFORMATION I T CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Re v
Abacus/TangII LA-1452
Date: Sheet
Compal Electronics, Inc.
MiniPci Port
1
of
26 43Monday, August 26, 2002
Page 27
A
B
C
reserve for AC97 coedc using only
D
E
F
G
H
+5VALW +5VDDA
1 1
C564
@4.7U_0805_10V4Z
SUSP#<16,30,33,38>
+5VDDA
12
12
2 2
INT_CD_L<21>
INT_CD_R<21>
MD_SPK<29>
3 3
4 4
MONO_IN<28>
MONO_IN
1 2
R364
47K_0402_5%
CD_AGND<21>
R365
4.7K_0402_5%
.033U_0402_16V4Z
R367 0_0402_5%
12
R360 0_0603_5%
12
R363 0_0603_5%
12
R362 @6.8K_0603_1%
12
R361 @6.8K_0603_1%
12
R369 @51K_0402_5%
12
R368 0_0402_5%
12
C552
2700P_0603_50V7K
1 2
12
C557
CD_GNA
12
12
R366 @6.8K_0603_1%
C541
.1U_0402_16V4Z
.1U_0402_16V4Z
.1U_0402_16V4Z
C544
12
CD_L_R
C549 1U_0603_10V4Z
CD_R_R
C547 1U_0603_10V4Z
CD_GNA
C546 1U_0603_10V4Z
C545
MDSPK
C550 .033U_0402_16V4Z
C553 1U_0603_10V4Z
IAC_RST#<19,29>
IAC_SYNC<19,29>
IAC_SDATAO<19,29>
R344 @1K_0402_5% R343 @1K_0402_5%
EAPD<28> SPK_SHUTDOWN# <28>
+3VCC
R339 10K_0402_5%
ID0# ID1#
1 1 1 0 0 1
*
0 0
C477
1 2
1 2
1 2
MICIN<28>
1 2
.1U_0402_16V4Z
1 2
1 2
12 12
W=40Mil
12
12
C562
.1U_0402_16V4Z
L30
1 2
BLM21A05_0805
AVDD_AC97
C551
12
4.7U_0805_10V4Z
U24
14
AUX_L
15
AUX_R
16
VIDEO_L
17
VIDEO_R
23
LIN_IN_L
24
LIN_IN_R
18
CD_L
20
CD_R
19
CD_GNA
21
MIC1
22
MIC2
13
PHONE
12
PC_BEEP
11
RESET#
10
SYNC
5
SDATA_OUT
45
ID0#
46
ID1#
EAPD SPK_SHUTDOWN#
47
48
4 7
EAPD
S/PDIF_OUT
GND GND
12
14.318 OPEN 27MHZ 48MHZ
24.576MHZ
MAX 80mA
38
AVCC25AVCC
BPCFG_00/NC_50
NC_00/HP_COMM_50
U26
1
VIN
3
EN
TPS793475
VCC1VCC
LINE_OUT_L
LINE_OUT_R
MONO_OUT
HP_OUT_L
HP_OUT_R
BIT_CLK
SDATA_IN
XTL_IN
XTL_OUT
AFLT1
AFLT2
VREFOUT
REFFLT
FLT3D
FLTI_00/NC_50
FLTO_00/NC_50 NC_00/GPIO0_50 NC_00/GPIO1_50
AGND AGND
STAC9750
VOUT
BYPASS
GND
.1U_0402_16V4Z
9
35
36
37
39
41
6
8
2
3
29
30
28
27
32
31 33 34 43 44
40 26 42
5
4
2
+3VCC
12
C484
.1U_0402_16V4Z
LEFT
RIGHT
MDMIC
1 2
R359 22_0402_5%
1 2
R357 47_0402_5%
C499 820P_0603_50V7K
C493 820P_0603_50V7K
12
C471
1U_0603_10V4Z
12
C558
.1U_0402_16V4Z
12
C491
12
C555
4.7U_0805_10V4Z
1 2
R345 0_0805_5%
12
C478
4.7U_0805_10V4Z
IAC_BITCL K <19,29>
IAC_SDATA_IN0 <19>
C490 @1U_0603_10V4Z
1 2
+3VS
1 2
C476 @1000P_0402_50V7K
1 2
@4.7U_0805_10V4Z
12
C556
.1U_0402_16V4Z
C483 1U_0603_10V4Z
HP_OUT_L <28>
HP_OUT_R <28>
C500
@27P_0402_50V8J
X4
24.576MHz30-ppm
C489
C486 1000P_0402_50V7K
12
1 2
C487 1000P_0402_50V7K
C485
22P_0402_50V8J
C542
22P_0402_50V8J
12
12
C492
@1U_0603_10V4Z
+5VDDA
12
C481
.1U_0402_16V4Z
1 2
12
1 2
R350 @100K_0402_5%
R342 @0_0402_5%
.1U_0402_16V4Z
12
C523
R354 @100K_0402_5%
1 2
C554
4.7U_0805_10V4Z
LEFT <28>
RIGHT <28>
CLK_CODEC_14M <15>
12
C498
1U_0603_10V4Z
C134
1000P_0402_50V7K
HP_OUT_R
HP_OUT_L
MD_MIC <29>
1 2
1 2
C165
1000P_0402_50V7K
short the digital ground and analong ground
Place close to pin 2
CLK_CODEC_14M
12
R341
@10_0402_5%
12
C479
@10P_0402_50V8K
Dell-Compal Confidential
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
A
B
C
D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
E
F
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
AC97 CODEC
Abacus/TangII LA-1452
G
0.2
of
27 43Monday, August 26, 2002
H
Page 28
A
B
C
D
E
+5VDDA
Gain Setting
L31
1 2
16
VDD
20
100K_0402_5%
C624
1 2
1U_0603_10V4Z
C623
1 2
1U_0603_10V4Z
C622
1 2
1U_0603_10V4Z
BLM21A05_0805
1 2
@BLM21A05_0805
15
6
PVDD
PVDD
GAIN0
GAIN1
ROUT+
ROUT-
LOUT+
LOUT-
BYPASS
GND1GND11GND13GND
TI 6017A2
L32
12
2 1
+5VAMP
1 1
12
.1U_0402_16V4Z
1 2
C579 .47U_0603_16V4Z
LEFT<27>
13
D
S
4
U14 74AHC1G08
RIGHT
LEFT
2N7002
+3VS
12
R431 100K_0402_5%
1 2
10K_0402_5%
C617
.1U_0402_16V4Z
PCM_SPK#<23,25>
ICH_SPKR<19>
RIGHT<27>
2 2
SPK_SHUTDOWN#<27>
Q30
2N7002
EAPD<27>
MUTE<30>
3 3
BEEP<30>
4 4
2
G
+3VS
5
1
2
3
A
C584 .1U_0402_16V4Z
C581 .47U_0603_16V4Z
C576 .1U_0402_16V4Z
Q31
13
D
2
G
S
R430
12
1 2
1 2
1 2
+3VS
HP_PLUG
C571
R389 100K_0402_5%
1 2
2N7002
U15
1
NC
2
A
3
GND
TC7SH14
+3V POWER
12
Q32
2
G
VCC
Y
C582
.1U_0402_16V4Z
7
RIN+
17
RIN-
9
LIN+
5
LIN-
19
SHUTDOWN
13
D
S
+3VS
5
4
R434
1 2
R433
1 2
2K_0402_5%
R432
1 2
2K_0402_5%
W=40mils
C621
1 2
.1U_0402_16V4Z
2K_0402_5%
B
U28
NC
R436
2
D15
1SS355
2
3
18
14
4
8
12
10
+5VDDA+5 VDDA
+5VALW
+5VDDA
12
C570
10U_1206_10V4Z
12
4.7U_0805_10V4Z
12
R437 100K_0402_5%
Q13 2SC2411EK
3 1
GAIN0
GAIN1
INTSPK_R+
INTSPK_R-
INTSPK_L+
INTSPK_L-
BYPASS
C588
C619
1 2
@.1U_0402_16V4Z
C620
MONO_IN
1 2
1U_0603_10V4Z
GAIN0
GAIN1
12
C583
.1U_0402_16V4Z
12
C580
.1U_0402_16V4Z
MONO_IN <27>
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
12
10K_0402_5%
12
@10K_0402_5%
MICIN<27>
HP_OUT_R<27>
HP_OUT_L<27>
R379
R383
+5VDDA
1 2
R327
C548
.22U_0603_10V7K
1 2
1 2
0_0402_5%
12
12
1K_0402_5%
12
R122
0_0402_5%
R155
R380
@10K_0402_5%
R384
10K_0402_5%
12
R328
2K_0402_5%
C142 @220U_D_6.3V
@220U_D_6.3V
C636 220U_4B_10V
C635 220U_4B_10V
GAIN0 GAIN1 AV(inv) INPUT
0
0
1
*
0
1
0
11
INTSPK_R+ INTSPK_R­INTSPK_L+ INTSPK_L-
15 mils trace
D45 @DAN217
2
R157
+
1 2
+
1 2
C154
+
1 2
+
1 2
12
2K_0402_5%
PR_RIGHT
PR_LEFT
D
C161
12
4.7U_0805_10V4Z
L14 BLM11A121S
1 2
1 2
L29
BLM11A121S
HP_PLUG<31>
1 2
L12 BLM11A121S
1 2
L13 BLM11A121S
C155
47P_0402_25V8K
100K_0402_5%
HP_PLUG
12
IMPEDANCE
6dB
10dB
15.6dB
21.6dB
90K ohm
70K ohm
45K ohm
25K ohm
Speaker Connector
JP16
1
1
2
2
3
3
4
4
Molex_53398-0410
1
3
EXTMIC
12
C458
47P_0402_25V8K
12
C144
47P_0402_25V8K
D44 @DAN217
1
2
3
+3VS
R125
PR
PL
D43 @DAN217
2
5
4
3 6 2 1
7 8
JP9
5
4
3 6 2 1
7 8
JA6333L-100
1
3
EXT. MIC
JP11
JA6333L-100
HP OUT
D42 @DAN217
1
2
3
+3VS
Dell-Compal Confidential
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
AMP & Audio Jack
Abacus/TangII LA-1452
of
28 43Monday, August 26, 2002
E
0.2
Page 29
5
4
3
2
1
@.1U_0402_16V4Z
C628
12
C627
@1000P_0402_50V7K
MD_MIC<27>
12
C629
.1U_0402_16V4Z
+3VMDC
1 2
1 2
+3V
R443 0_0805_5%
+3VALW
D D
1 2
R444 @0_0805_5%
4.7U_0805_10V4Z
C630
As close to P17
IAC_SDATAO<19,27>
IAC_RST#<19,27>
+3V
12
+3VMDC
JP25
1
MONO_OUT/PC_BEEP
3
AGND
5
AUXA_RIGHT
7
AUXA_LEFT
9
CD_GND
11
CD_RIGHT
13
CD_LEFT
15
GND
17
3.3Vaux
19
GND
21
3.3Vmain
23
AC97_SDATA_OUT
25
AC97_RESET#
27
GND
29
AC97_MSTRCLK
AMP 3-1612118-0
@1000P_0402_50V7K
12
C625
12
AUDIO_PWDN
MONO_PHONE
AC97_SDATA_IN1 AC97_SDATA_IN0
C626
@.1U_0402_16V4Z
RESERVED
GND
+5V RESERVED RESERVED RESERVED RESERVED RESERVED
AC97_SYNC
GND
AC97_BITCLK
+5VMDC
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
1 2
R435
@0_0805_5%
MD_SPK <27>
1 2
R438 10K_0402_5%
R439 @22_0402_5% R441 22_0402_5%
1 2
R442 22_0402_5%
+5VALW
1: Have primary CODEC on mother board
+3V
12
12
IAC _SYNC <19,27> IAC_SDATA_IN1 <19>
IAC_BITCL K <19,27>
MDC Conn.
MDC Note
C C
B B
Touch Pad & Status LED Conn.
TP_CLK<30>
ACT_LED#<21> BATT_LED# <31>
CHARGE_LED#<31>
TP_CLK
+5VS
ACT_LED#
CHARGE_LED#
+3VALW
JP13
1 2 3 4 5 6 7 8 9 10
121411 13 15 16 171918
20
JST BM20B-SRDS-G
C193
TP_CLK
1 2
@220P_0603_50V8J C171
TP_DATA
1 2
@220P_0603_50V8J CP1
CHARGE_LED#
45
ACT_LED#
36
PWR_LED#
27
BATT_LED#
18
@220P_1206_8P4C_50V8K
TP_DATA
+5VS
PWR_LED# BATT_LED#
TP_DATA <30>
PWR_LED# <31>
LID_SW# <30>
+5VALW
Pin 1 is NC for Pctel and connexant MDC modem
Pin 2 is NC for Pctel and connexant MDC modem
Screw Hole
H7
C315D126
1
H14
C315D118
1
H33
O335x79D315x59
1
H8
C315D126
1
H17
C315D118
1
H30
O335x79D315x59
1
H13
C315D126
1
H20
C315D118
1
H12
C315D126
1
H21
C315D118
1
H32
O335x79D315x59
1
H3
C394D118
1
H28
C315D118
1
H15
O335x79D315x59
1
H19
C394D118
1
H27
C315D118
1
H25
H_O177x99D157x79
H11
H5
H4
H2
H10
C394D118
C315D118
C394D118
C394D118
1
1
1
1
H23
H26
C197B256D157
C315D118
1
H31
O335x79D315x59
1
H22
C197B256D157
1
1
1
H24
O335x79D315x59
1
H18
C138D138N
1
H9
O335x79D315x59
1
C394D118
1
H29
O197x138D197x138N
1
H16
C394D118
1
H1
C256D87
H6
C315D177
1
1
Fiduial Mark
FD1
1
FIDUCIAL MARK
FD10
1
FIDUCIAL MARK
A A
FD2
1
FIDUCIAL MARK
FD11
1
FIDUCIAL MARK
FD3
1
FIDUCIAL MARK
FD12
1
FIDUCIAL MARK
FD4
1
FIDUCIAL MARK
FD13
1
FIDUCIAL MARK
FD5
1
FIDUCIAL MARK
FD14
1
FIDUCIAL MARK
FD6
1
FIDUCIAL MARK
FD15
1
FIDUCIAL MARK
FD7
1
FIDUCIAL MARK
FD16
1
FIDUCIAL MARK
FD8
1
FIDUCIAL MARK
FD17
1
FIDUCIAL MARK
FD9
1
FIDUCIAL MARK
FD18
1
FIDUCIAL MARK
Dell-Compal Confidential
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMP AL ELECTRONIC S, INC. NEITH ER THIS SHEET NO R THE INFORM ATION IT CONT AINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
MDC connector / SWITCH / ACPI DEBUG
Abacus/TangII LA-1452
1
0.2
of
29 43Monday, August 26, 2002
Page 30
A
+3VALW
Place closely pin 18
12
12
+3VALW
U33B
74VHC32
+3VALW
CLK_PCI_LPC<15>
CLK_PCI_LPC
12
R406
10_0402_5%
12
C597
15P_0402_50V8J
LAN_DISABLE#<22>
100K_0402_5%
147
+3VALW
4.7U_0805_10V4Z
L33
+3VALW
1 1
2 2
3 3
4 4
1 2
MURATABLM11P600S
.1U_0402_16V4Z
L34
1 2
MURATABLM11P600S
+5VS
+3VALW
+3VALW
12
R395
100K_0402_5%
12
R396
@100K_0402_5%
CPU_DT/MO# CPU
HIGH
LOW
MOBILE
C595 .1U_0402_10V6K
12
12
C611
C607
.1U_0402_16V4Z
C594
1 2
ECAGND
ADB[0..7]
KBA[0..19]
1 2
R407 10K_0402_5%
1 2
R404 10K_0402_5%
12
R410 100K_0402_5%
PS2_CLK
1 8
PS2_DATA
2 7
KBD_DATA
3 6
KBD_CLK
4 5
8.2K_0804_8P4R_5%
FSEL#
1 8
SELIO#
2 7
FRD#
3 6
EC_SMI#
4 5
R423 20M_0603_5%
1 2
32.768KHZ_12.5P
12
X5
C615
10P_0402_50V8K
CPU_DT/MO#
DT
A
12
12
C589
1000P_0402_50V7K
EC_AVCC
12
C593
1000P_0402_50V7K
ADB[0..7] <31>
KBA[0..19] <31>
TP_DATA
TP_CLK
LID_SW#
RP7
+3VALW
RP6
8.2K_0804_8P4R_5%
12
12P_0402_50V8K
FWE#<31>
+5VS
R424
12
120K_0402_5%
C618
G_RST#<16>
RSMRST#<19>
1 2
100K_0402_5%
R422 3.3K_0402_5%
FWE#
R390
0_0402_5%
R415 0_0402_5%
R417
+3VALW
1 2
6
+3VS
SIRQ<18,23,25>
LFRAME#<19>
LAD0<19> LAD1<19> LAD2<19> LAD3<19>
SCI#<19>
GATEA20<18> KBRST#<18>
KSI[0..7]<31,32>
KSO[0..15]<31 >
TP_CLK<29>
TP_DATA<29>
LID_SW#<29>
AC_LOW_P RES#<39>
EC_SMI#<19>
EC_SWI#<19>
RADIO_DISABLE#<26>
PM_SLP_S1#<15,19>
SYSON<33,38>
BKOFF#<16>
FSEL#<31>
+3VALW
R421
4
FWR#
5
B
1 2
R411 0_0402_5%
CLK_PCI_LPC
1 2
R402 10K_0402_5%
KSI[0..7]
KSO[0..15]
EC_TINIT# EC_TCK EC_TDO EC_TDI EC_TMS
KBD_CLK KBD_DATA PS2_CLK PS2_DATA TP_CLK TP_DATA LID_SW#
EC_SMI# LAN_DISABLE#
SUSP#<16,27,33,38>
VR_ON<33,40>
VGATE<19,40>
MUTE<28>
1 2
1 3
D
B
CPU_DT/MO#
FSEL# KBA18
2
G
S
Q35
2N7002
12
C602
.1U_0402_16V4Z
EC_RST
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7
KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15
CRY1
CRY2
SUS_STAT# <16,19>
EC_FLASH# <19>
EC_3VDD
7
SERIRQ
8
LDRQ
9
LFRAME
15
LAD0
14
LAD1
13
LAD2
10
LAD3
18
LCLK
19
LREST1
22
SMI
23
PWUREQ
31
IOPD3/ECSCI
5
GA20/IOPB5
6
KBRST/IOPB6
71
KBSIN0
72
KBSIN1
73
KBSIN2
74
KBSIN3
77
KBSIN4
78
KBSIN5
79
KBSIN6
80
KBSIN7
49
KBSOUT0
50
KBSOUT1
51
KBSOUT2
52
KBSOUT3
53
KBSOUT4
56
KBSOUT5
57
KBSOUT6
58
KBSOUT7
59
KBSOUT8
60
KBSOUT9
61
KBSOUT10
64
KBSOUT11
65
KBSOUT12
66
KBSOUT13
67
KBSOUT14
68
KBSOUT15
105
TINT
106
TCK
107
TDO
108
TDI
109
TMS
110
PSCLK1/IOPF0
111
PSDAT1/IOPF1
114
PSCLK2/IOPF2
115
PSDAT2/IOPF3
116
PSCLK3/IOPF4
117
PSDAT3/IOPF5
118
PSCLK4/IOPF6
119
PSDAT4/IOPF7
158
32KX1/32KCLKOUT
160
32KX2
62
IOPJ2/BST0
63
IOPJ3/BST1
69
IOPJ4/BST2
70
IOPJ5/PFS
75
IOPJ6/PLI
76
IOPJ7/BRKL_RSTO
148
IOPM0/D8
149
IOPM1/D9
155
IOPM2/D10
156
IOPM3/D11
3
IOPM4/D12
4
IOPM5/D13
27
IOPM6/D14
28
IOPM7/D15
173
SEL0
174
SEL1
47
CLK
PC87591VPC
16
VDD
VCC134VCC245VCC3
Host interface
Key matrix scan
JTAG debug port
PS2 interface
PORTJ-2
PORTM
GND117GND235GND346GND4
C
EC_AVCC
123
136
95
157
166
VCC4
VCC5
VCC6
AVCC
AD Input
DA output
PWM or PORTA
PORTB
IOPB7/RING/PFAIL/LRESET2
PORTC
PORTD-1
IOPD2/EXWINT24/LRESET2
PORTE
IOPE7/CLKRUN/EXWINT46
PORTH
PORTI
PORTJ-1
PORTD-2
PORTK
PORTL
AGND
GND5
GND6
GND7
96
122
159
167
137
ECAGND
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
161
VBAT
IOPE0AD4 IOPE1/AD5 IOPE2/AD6 IOPE3/AD7
DP/AD8 DN/AD9
IOPA0/PWM0 IOPA1/PWM1 IOPA2/PWM2 IOPA3/PWM3 IOPA4/PWM4 IOPA5/PWM5 IOPA6/PWM6 IOPA7/PWM7
IOPB0/URXD IOPB1/UTXD
IOPB2/USCLK
IOPB3/SCL1 IOPB4/SDA1
IOPC0 IOPC1/SCL2 IOPC2/SDA2
IOPC3/TA1
IOPC4/TB1/EXWINT22
IOPC5/TA2
IOPC6/TB2/EXWINT23
IOPC7/CLKOUT
IOPD0/RI1/EXWINT20 IOPD1/RI2/EXWINT21
IOPE4/SWIN
IOPE5/EXWINT40
IOPE6/LPCPD/EXWIN45
IOPH0/A0/ENV0
IOPH1/A1/ENV1 IOPH2/A2/BADDR0 IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
IOPH6/A6 IOPH7/A7
IOPI0/D0 IOPI1/D1 IOPI2/D2 IOPI3/D3 IOPI4/D4 IOPI5/D5 IOPI6/D6 IOPI7/D7
IOPJ0/RD
IOPJ1/WR0
SELIO
IOPD4 IOPD5 IOPD6 IOPD7
IOPK0/A8
IOPK1/A9 IOPK2/A10 IOPK3/A11 IOPK4/A12
IOPK5/A13/BE0 IOPK6/A14/BE1
IOPK7/A15/CBRD
IOPL0/A16 IOPL1/A17 IOPL2/A18 IOPL3/A19
IOPL4/WR1
NC212NC320NC421NC585NC686NC791NC892NC997NC10
NC1
11
U32
AD0 AD1 AD2 AD3
DA0 DA1 DA2 DA3
98
C608
1U_0603_10V4Z
1 2
81 82 83 84 87 88 89 90 93 94
99 100 101 102
32 33 36 37 38 39 40 43
153 154 162 163 164 165
168 169 170 171 172 175 176 1
26 29 30
2 44 24 25
124 125 126 127 128 131 132 133
138 139 140 141 144 145 146 147
150 151
152
41 42 54 55
143 142 135 134 130 129 121 120
113 112 104 103 48
+RTCVCC
BATT_TEMP
VBATT
BATT_CHGI
BD_ID
KSO16 KSO17 EC_DEBUG SMB_EC_CK1 SMB_EC_DA1
SMB_EC_CK2 SMB_EC_DA2
KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
FRD# FWR#
SELIO#
KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15
KBA16 KBA17
KBA19
BATT_TEMP <34>
BATT-OVP <35 >
ADP_I <35>
EN_FAN2 <7> EN_FAN1 <7> IRE F <35> IRE F2 <35>
BEEP <28>
ACOF F <35> VLBA# <19> EC_ON <32> LID_OUT# <19> PCM_SUSP# <23,24,25>
KSO16 <32>
SMB_EC_CK1 <16,31,34> SMB_EC_DA1 <16,31,34> PCIRST# <6 ,10,16,18,22,23, 25,26,33>
PWRBTN# <19> SMB_EC_CK2 <6,8> SMB_EC_DA2 <6,8> FAN1_TACH <7> EC_WAKEUP# <18> EC_THRM# <19> FAN2_TACH <7> PM_PWROK <10,19,32>
ACI N <18,34,36> PM_SLP_S4# <19> PM_SLP_S3# <15,19>
ON/ OFF <32> PM_SLP_S5# <19> EXTVGA_IN# <16> CLKRUN# <19,22,25,26>
FRD # <31>
SELIO# <31>
SCRLED# <32> NUMLED# <32> CAPSLED# <32>
FSTCHG <35>
D
ALI/MH#
EC_TINIT# EC_TCK EC_TDO EC_TDI EC_TMS
KSO16 KSO17 EC_DEBUG
D
+5VALW
+3VALW
12
R393 @100K_0603_1%
12
R394 10K_0603_1%
JP17
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
@96212-1011S
E
BD_ID
0V
REV
0.1
/10K
BADDR1-0
*
C592
.1U_0402_10V6K
1 2
ECAGND
Index Data 0 0 0 1 1 0 1 1
4E 4F
(HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1
*
SHBM=1: Enable shared memory with host BIOS TRIS=1: While in IRE and OBD, float all the signals for clip-on ISE use
KBA1
KBA2
KBA3
KBA5
For EC debug
BATT_CHGI
BATT_TEMP
BATT-OVP
VBATT
1.0V 1.5V0.5V
0.2
100K/10K
100K/20K 100K/30K
I/O Address
Reserved
ENV0 ENV1
IRE
00
OBD
0011
DEV
PROG
11
(ENV1)
(BADDR0)
(BADDR1)
(SHBM)
C591 .01U_0402_25V4Z
1 2
C587
1 2
C585 .01U_0402_25V4Z
1 2
C586
1 2
2F2E
TRIS
0
0
0
0
12
R412 10K_0402_5%
12
R414 10K_0402_5%
12
R416 @10K_0402_5%
12
R418 10K_0402_5%
ECAGND
.01U_0402_25V4Z
ECAGND
.01U_0402_25V4Z
Dell-Compal Confidential
Compal Electronics, Ltd.
Title
EC PC87591/BIOS
Size Document Number Rev Custom
Abacus/TangII LA-1452
Date: Sheet
30 43Monday, August 26, 2002
E
+3VALW
0.2
of
Page 31
A
ADB[0..7]<30>
KBA[0..19]<30>
1 1
2 2
ADB[0..7]
KBA[0..19]
+3VS
+3VS
+3VALW
LAN_PME#<22>
MINI_PME#<26>
PCM_PME#<23,25>
R388 100K_0402_5%
R386 100K_0402_5%
R233 100K_0402_5%
R382 100K_0402_5%
PROCHOT#<6,19>
INTVGA_IN#<16>
HP_PLUG<28>
ENABKL<16>
AC_LOW_P RES2#<39>
SELIO#<30>
1 2
1 2
1 2
1 2
KBA1
SELIO#
LAN_PME#
MINI_PME#
PCM_PME#
PME#
+3VALW
U33D
147
74VHC32
12
13
1 2
R49 0_0402_5%
1 2
R48 0_0402_5%
1 2
R45 0_0402_5%
11
CC
+3VALW
12
B
Input Port
1
19
R387
10K_0402_5%
PME#
+3VALW
20
1A121Y1
VCC
1A241Y2 1A361Y3 1A481Y4 2A1112Y1 2A2132Y2 2A3152Y3 2A4172Y4
1G 2G
GND
10
C577
1 2
.1U_0402_16V4Z
U30
18 16 14 12 9 7 5 3
74LVC244_TSSOP20
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
AA
1 2
R419 100K_0402_5%
CC
1 2
R420 100K_0402_5%
C
C605
1 2
.1U_0402_16V4Z
KBA2
SELIO# LARST#
+5VALW
+3VALW
+5VALW
+3VALW
U33C
147
74VHC32
9
10
1 2
R377 20K_0402_5%
R453
8.2K_0402_5%
SMB_EC_DA1
1 2
SMB_EC_CK1
1 2
R454
8.2K_0402_5%
8
1 2
1U_0603_10V4Z
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
AA
D
C569
E
Output Port
+5VALW
C575
1 2
.1U_0402_16V4Z
20
U27
D0
VCC
D14Q1 D27Q2 D38Q3 D413Q4 D514Q5 D617Q6 D718Q7
CLK CLR
2
Q0
5 6 9 12 15 16 19
GND
74HCT273_TSSOP20
10
PWR_LED# <29> CHARGE_LED# <29> BATT_LED# <29> VCHG <35>M_SEN#<16,17>
NM24C164 Address definition: 1 A2 A1# A0 B2 B1 B0 R/W#
GND
+5VALW
12
R375 100K_0402_5%
1
A0
2
A1
3
A2
4
1 2
C590 .1U_0402_16V4Z
SMB_EC_CK1<16,30,34> SMB_EC_DA1<16,30,34>
+5VALW
8 7 6 5
U29
VCC WC SCL SDA
NM24C16
EC I2C Bus Address:
24C164: 1011xxx R/W# 24C16: 1010xxx R/W#
3
11
1
KSI1
4 5
KSI7
3 3
4 4
INT_KBD CONN.
KSO6
KSO7
KSO14
KSO12
KSO10
25
23
23
24
Dummy
22
24
KSO15
15
17
19
21
15
17
19
21
22
KSO11
14
16
18
20
14
16
18
20
KSO13
KSO3
KSO4
KSO8
KSO[0..15]<30>
A
KSO1
KSI3
KSO2
9
11
13
9
11
13
8
10
12
8
10
12
KSI2
KSI0
KSO5
KSI[0..7]<30,32>
KSO0
5
7
7
6
6
KSI5
KSI1
KSI4
KSI6
1
3
1
3
5
2
4
2
4
Foxconn GS22250-0001
KSO9
KSI7
KSO[0..15]
KSI[0..7]
JP10
KSI6 KSO9
KSI4 KSI5 KSO0 KSI2
KSI3 KSO5 KSO1 KSI0
KSO2 KSO4 KSO7 KSO8
KSO6 KSO3 KSO12 KSO13
KSO14 KSO11 KSO10 KSO15
3 6 2 7 1 8
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
B
CP2
@100P_1206_8P4C_50V8K
CP3
@100P_1206_8P4C_50V8K
CP4
@100P_1206_8P4C_50V8K
CP5
@100P_1206_8P4C_50V8K
CP6
@100P_1206_8P4C_50V8K
CP7
@100P_1206_8P4C_50V8K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
KBA[0..19]<30>
FSEL#<30> FRD#<30> FWE#<30>
KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7 KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15 KBA16 KBA17 KBA18 KBA19
U16
21
A0
20
A1
19
A2
18
A3
17
A4
16
A5
15
A6
14
A7
8
A8
7
A9
36
A10
6
A11
5
A12
4
A13
3
A14
2
A15
1
A16
READY/BUSY#
40
A17
13
A18
37
A19
22
CE#
24
OE#
9
WE#
SST39VF080_TSOP40
31
VCC0
30
VCC1
ADB0
25
D0 D1 D2 D3 D4 D5 D6 D7
RP#
NC
NC0 NC1
GND0 GND1
D
26 27 28 32 33 34 35
10 11 12 29 38
23 39
ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
R440 100K_0402_5%
12
.1U_0402_16V4Z
1 2
Title
Size Document Number Rev
Abacus/TangII LA-1452
Date: Sheet
+3VALW
C632
12
ADB[0..7] <30>
+3VALW
C631
.1U_0402_16V4Z
Dell-Compal Confidential
Compal Electronics, Inc.
EC Extend I/O KB Conn. & BIOS
31 43Monday, August 26, 2002
E
0.2
of
Page 32
A
VL
1000P_0402_50V7K
12
R449 470K_0402_5%
13
D
2
G
S
2N7002
Q40
12
Q41
2
G
VL
12
R447 100K_0402_5%
13
D
S
2N7002
1 1
SHDN#<36>
2 2
C639
G
2
13
D
S
Q22
2N7002
SHDN_1632 <36>
12
C633 .1U_0402_16V4Z
PM_PWROK <10,19,30>
C638 @1000P_0402_50V7K
D17 1SS355
R448 470K_0402_5%
1 2
B
2 1
1 2
+RTCVCC
SM_INTRUDER# <18>
C
RTC Battery
BATT1
-+
RTCBATT
+RTCVCC
12
RTCPWR
1
3
BAS40-04
2
D
ON/OFFBTN#
D41
CHGRTC
EC_ON<30 >
EC_ON
22K_0402_5%
+3VALW
12
R189
R188
4.7K_0402_5%
1 2
3
D12
DAN202U
Q21 DTC124EK
+3VALW
12
R186 100K_0402_5%
1
2
13
22K
2
22K
ON/OFF
E
Power BTN
12
C209
1000P_0402_50V7K
ON/ OFF <30>
EC_ON# <37>
D16
12
RLZ20A
WHEN R=0,Vbe=1.35V WHEN R=33K,Vbe=0.8V
12
C16
.1U_0402_16V4Z
+5VALW USB_BS +3VALWUSB_AS
W=40mils
U6
1 2 3 4
GND
IN
EN1#
EN2#
TPS2042A
OC1# OUT1 OUT2 OC2#
8 7 6 5
100K_0402_5%
12
R12
USB Over Current
12
R212 100K_0402_5%
12
OVCUR#0
OVCUR#2
12
C237
.1U_0402_16V4Z
1 2
R210 47K_0402_5%
1 2
R211 47K_0402_5%
C238
.1U_0402_16V4Z
OVCUR#0 <19>
OVCUR#2 <19>
USB_AS USB_BS
L38
1 2
FBM-11-451616-800T
@100U_4A_10V
C641
12
USB_A USB_B
12
+
C10
+
150U_D_10VM
Note:
SYSON#<33>
3 3
KSO16<30>
CAPSLED#<30>
+3VS
LID Switch & Function Button
4 4
USB_AS=USB_BS=Trace width=40mils
JP5
1 2 3 4 5 6 7 8 9 10
SUYIN_12750A-10_10P
ON/OFFBTN#
KSI0 <30,31> SCRLED# <30> NUMLED# <30>
+3VALW
USB0D+ USB2D+
12
@15P_0402_50V8J
R209 0_0402_5%
12
USBP0-<19>
USBP0+<19>
USBP0-
USBP0+
U21
1 4
2 3
@KC-JTS0402-02
12
R208 0_0402_5%
R1565, R1567 Close to L48 R1566, R1568 Close to L48
USB PORT
.1U_0402_16V4Z
C12
12
12
C232@15P_0402_50V8J
C11
USB0D-
USB0D+
1
3
+3VS
.1U_0402_16V4Z
JP4
1
VCC
VCC
2
D0-
D1-
3
D0+
D1+
4
VSS
VSS
G210G1
12
G311G4
SUYIN_2522A-08G3T-K
USB2D-
USB2D+
U22
1
4
3
6
2
5
2
5
5 6 7 8
9
@CM1210_6P
12
C231
150U_D_10VM
12
12
@15P_0402_50V8J
C13
@15P_0402_50V8J
R9 0_0402_5%
@KC-JTS0402-02
R8 0_0402_5%
C230
L40
12
12
C229
+
USB2D-USB0D-
12
U17
14
23
12
FBM-11-451616-800T
12
+
C642 @100U_4A_10V
USBP2-
USBP2+
USBP2- <19>
USBP2+ <19>
Dell-Compal Confidential
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Power OK/Reset/RTC battery/USB Conn.& Lid Switch
Abacus/TangII LA-1452
E
of
32 43Monday, August 26, 2002
0.2
Page 33
A
B
C
D
E
2
SYSON#
1
3
R456
Q61
@SMO5
2
G
+12VALW
12
13
2
G
12
R445
68K_0402_5%
D
Q2 2N7002
S
+12VALW
12
13
R426
10K_0402_5%
D
Q36 2N7002
S
12
R446
47K_0402_5%
+1.5VALW to +1.5VS Transfer
+1.5VALW
U66
8
D
7
D
1 1
12
C568
10U_1206_10V4Z
6
D
5
D
SI4800
+1.5VS
1
S
2
S
3
12
S
C573
4
G
10U_1206_10V4Z
.1U_0402_16V4Z
RUNON
12
12
C572
R378 470_0805_5%
13
D
SUSP
2
G
S
Q60 2N7002
+3VALW to +3V Transfer
+3VALW
U70
8
D
7
2 2
12
C207
22U_1206_10V4Z
D
6
D
5
D
SI4800
+3V
1
S
2
S
3
S G
12
4
C208
22U_1206_10V4Z
.1U_0402_16V4Z
SUSON
12
12
C210
R187 470_0402_5%
13
D
SYSON#
2
G
Q20
S
2N7002
SYSON#
VR_ON<30,40>
Q39
2N7002
2
G
+12VALW
12
13
D
S
VR_ON
R451 100K_0402_5%
R450
1M_0402_5%
+3VALW
2
G
SUSON
12
12
C634
.01U_0402_25V4Z
R425 @100K_0402_5%
1 2
13
D
Q37
S
@2N7002
+CPU_CORE
12
13
D
2
G
S
R427
@330_0603_5%
Q38
@2N7002
SYSON#<32>
SYSON<30,38>
SUSP<7,17>
SUSP#<16,27,30,38>
100K_0402_5%
+12VALW
12
R408 100K_0402_5%
3 3
4 4
SUSP
Q33
2N7002
2
G
13
D
R409
S
1M_0402_5%
12
C145
+
150U_D_6.3VM
12
+3VALW +3VS
12
A
+5VALW to +5VS Transfer
+5VALW
8 7 6
SI4800
5
1
S
2
S
3
S
4
G
12
C601
.01U_0402_25V4Z
U20
8
D
7
D
6
D
5
D
C132 10U_1206_10V4Z
SI4800
S S S
G
1 2 3 4
+5VALW
12
+
+5VS
12
C603
C606 150U_D_10VM
U31
D D D D
RUNON
.1U_0402_16V4Z
+3VALW to +3VS Transfer
12
C133
22U_1206_10V4Z
RUNON
12
C131
.1U_0402_16V4Z
12
C604
22U_1206_10V4Z
12
R100 470_0402_5%
Q19
13
D
2N7002
2
G
S
B
SUSP
12
13
D
S
R413 470_0805_5%
Q34
SUSP
2
G
2N7002
+5VS
AD9<18,2 2,23,25,26>
C/BE#2<18,22,23,25,26>
AD8<18,2 2,23,25,26> AD5<18,2 2,23,25,26> AD1<18,2 2,23,25,26> AD2<18,2 2,23,25,26> AD6<18,2 2,23,25,26>
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
JP27
1 2 3 4 5 6 7 8 9 10
121411 13 15 16 171918
20
@AMP 5-175638-0
Debug PORT
PCI_T RDY# <18,22,23,25,26> PCIRST# < 6,10,16,18,22,23 ,25,26,30>PCI_FRAME#<18,22 ,23,25,26> CLK_PCI_DEBUG <15> C/BE#3 < 18,22,23,25,26> C/BE#1 < 18,22,23,25,26> AD7 <18,22,23,25,26> AD3 <18,22,23,25,26> AD0 <18,22,23,25,26> AD4 <18,22,23,25,26> C/BE#0 < 18,22,23,25,26>
CLK_PCI_DEBUG
R458 33_0402_5%
1 2 12
C637 10P_0402_50V8K
D
Dell-Compal Confidential
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
DC/DC Circuit
Abacus/TangII LA-1452
of
33 43Monday, August 26, 2002
E
0.2
Page 34
A
B
C
D
E
Detector
1 2
PD9
RB751V
PD10
RB751V
+3VALWP
+5VALWP
12
12
PR161
100K_0402_5%
PR163
@1K_0402_5%
PC50
1000P_0603_50V8J
D
PR162
1K_0402_5%
PR45 1K_0402_5%
1 2
PR47
1 2
25.5K_0402_1%
PR48 100_0402_5%
1 2
PU5A
1
LM393A
12
BATT_TEMP
PD7
@BAS40-04
84
+
-
9C/12C#/8C#
12
PR55 215K_0603_1%
13
2
PQ13
DTC115EUA
BATT_TEMP <30>
SMB_EC_DA1 <16,30,31>
B+
12
PR52 499K_0603_1%
12
PR53 499K_0603_1%
PR60 47K_0603_5%
13
100K
100K
2
3
3
+5VALWP
PR51 1M_0603_1%
3
2
12
12
PC51
1
1
VS
0.1U_0603_16V
PD6
@BAS40-04
2
2
12
PC52
0.01U_0603_50V7K
PR54
10K_0603_5%
1 2
RTCVREF
PQ12
2N7002
Dell-Compal Confidential
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Detector
Abacus/TangII LA-1452
E
+3VALWP
12
PC49 1000P_0603_50V8J
PACIN
12
+5VALWP
34 43Monday, August 26, 2002
PACIN <35>
0.2
of
BATT+
BATT++
PC44
0.1U_0805_25V7K
1 2 3
ID
4
B/I
5
TS
6 7 8 9
PR49 100_0402_5%
3
+5VP
BATT++
12
PR46 1K_0402_5%
1 2
PR50 100K_0603_5%
1 1
PCN1 RP34-8RD-3PDL2J
3
VIN
1
GND
AIR_ADP
2 2
3 3
456
2
7
12
PC45
LOW_PWR <39>
VIN
12
PC48
1000P_0603_50V8J
12
100P_0603_50V
ADPIN
1 2
FBM-L18-453215-900-LMA90T_1812
12
PD5
@EC10QS04
PC46 1000P_0603_50V8J
ADPGND
PL6
12
PC47
100P_0603_50V
PCN2 battery connector pin assignment
SMART Battery:
1.BATT+
2.BATT+
3.9C/12C#/8C#
4.B/I
5.TS
6.SMB_EC_DA1
7.SMB_EC_CK1
8.GND
9.GND
Vin Detector
12
PR44 10_1206_5%
12
PZD1
RLZ24B
BATT+
FBM-L18-453215-900-LMA90T_1812
12
PC43
0.1U_0805_25V7K
SMB_EC_CK1<16,30,31>
PL5
1 2
PCN2
12
PC219
10
GND
11
GND
2200P_0603_50V7K
SUYIN-200275MR009G516ZL 9P
PD8
@BAS40-04
12
BATT+ BATT+
SMD
SMC GND­GND-
1
2
SHDN_1632#<6,36>
17.90V/17.24V
PR56 1M_0603_1%
PU5B
LM393A
PR64 10K_0603_5%
5
6
1 2
+
-
12
7
RTCVREF
B
VIN
12
PR57
PR61 22K_0603_5%
84.5K_0603_1%
1 2
12
PR62
20K_0603_1%
12
0.1U_0603_16V
PC54
12
PC53
4 4
1000P_0603_50V8J
A
VIN
12
PR58
10K_0603_5%
12
PZD2 RLZ4.3B
PR59 10K_0603_5%
1 2
12
PR63 10K_0603_5%
ACIN <18,30,36>
PACIN <35>
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
ACON<35>
Precharge detector
15.9V/13.2V FOR ADAPTOR
Page 35
A
PQ14
VIN
1 1
ACOFF#
1 2
PACIN<34>
ACON<34>
2 2
1 2
8 7
5
PD11
1SS355
PR72
22K_0402_5%
ACON
SI4835DY_SO-8
IREF=0.82*Icharge
P2
1 2 36
4
12
12
13
D
2
G
S
IREF2<30>
SI4835DY_SO-8
1 2 3 6
PR66 200K_0402_5%
PR68 150K_0402_5%
PQ19
2N7002
PR73
16.9K_0603_1%
IREF<30>
PQ15
4
1 2
8 7
5
PR75
1 2
21K_0603_1%
IREF=0~3.3V
+3VALWP
12
PR231 47K_0603_5%
13
PC75
100K
2
100K
12
@0.1U_0603_16V
PR92
@2.2K_0603_5%
PQ64
DTC115EUA
12
3 3
4 4
FSTCHG<30>
BATT-OVP<30>
CS
13
100K
2
100K
1
PU7A
LM358
PQ63
DTC115EUA
84
3
+
2
-
VS
12
PC119
0.01U_0603_50V7K
OVP voltage :
LI-4S :18.0V----BATT-OVP=2.00V
LI-3S :13.5V----BATT-OVP=1.50V
BATT-OVP=0.2206*BATT++
A
P3
ADP_I<30>
12
21K_0603_1%
12
PC64
PR83
PR86
20K_0603_1%
BATT++
12
PR90
12
PR91
12
PR93
B
Iadp=0~4.10A(90W) Iadp=0~3.20A(70W) Iair=0~2.25A(Air)
PR65
0.02_2010_1%
12
12
12
PC61
PR74
@28.7K_0603_1%
12
PR80
0.1U_0603_16V
12
845K_0603_1%
300K_0603_0.5%
PC76
143K_0603_0.5%
B
@30.1K_0603_1%
12
PC72
0.01U_0603_50V7K
1 2
0.01U_0402_16V
PC62 4700P_0603_50V
1 2
PC65
2200P_0603_50V7K
0.01U_0402_16V
12
PR71 100K_0603_5%
PR76
1 2
10K_0603_5%
1 2
PR84 10K_0603_5%
2N7002
PC154
0.1U_0603_16V
B+
FBM-L18-453215-900-LMA90T_1812
PU6 MB3887
1
-INC2
2
OUTC2
3
+INE2
4
-INE2
5
FB2
6
VREF
7
PR79 1K_0603_5%
12
PQ40
FB1
8
-INE1
9
+INE1
10
OUTC1
11
OUTD
12
-INC1
13
2
13
100K
100K
C
PL8
1 2
+
PC226
12
PR69
1 2
1 2
1 2
PC73 10P_0603_50V
VCHG <31>
0_0603_5%
PC59 2200P_0603_50V7K
1 2
1 2
PC60
0.1U_0805_25V7K
PC66
0.1U_0805_25V7K
PC69
1500P_0603_5%
24
+INC2
23
GND
0.1U_0603_16V
12
12
+5VP
C
CS
PC63
1 2
1 2
PR81
66.5K_0603_1%
PR85
1 2
330K_0603_5%
22
CS
21
VCC(o)
20
OUT
19
VH
18
VCC
17
RT
16
-INE3
15
FB3
14
CTL
13
+INC1
PR164 104K_0603_0.1%
PR36 2.2M_0603_5%
PR37 100K_0603_5%
12
PQ41
DTC115EK
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
12
15U_D_25V
12
PR87 @10K_0603_5%
12
PC55
PC56
4.7U_1210_25V
4.7U_1210_25V
36
578
ACON <34>
1
PR89
312K_0603_0.1%
1 2
PC74 22P_0603_50V
B+++
241
2
12
D
12
PC57
0.1U_0805_25V7K
PQ17 SI4835DY_SO-8
LXCHRG
15U_SPC-1204P-150
1 2
PD13 EA60QC04
3
D
E
Charger
PQ16
SI4835DY_SO-8
1 2 3 6
PC58
2200P_0603_50V7K
ACOFF#
PL9
8 7
5
4
PR67
47K_0603_5%
1 2
PR70
10K_0603_5%
1 2
13
100K
100K
PR82
0.02_2512_1%
1 2
2
PQ18 DTC115EUA
VIN
ACOFF <30>
12
+
PC70
PC68
47U_EC_25V
12
4.7U_1210_25V
BATT+
12
PC71
4.7U_1210_25V
Charge voltage 4S CC-CV MODE : 16.8V VCHG is H
4S PULSE MODE : 17.4V VCHG is L
Dell-Compal Confidential
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Abacus/TangII LA-1452
Charger
E
of
35 43Monday, August 26, 2002
BATT+
0.2
Page 36
A
B
C
D
E
+3.3V/+5V/+12V
B+
1 1
+3.3V Ipeak = 6.66A ~ 10A
2 2
3 3
4 4
1 2
12
12
PC113
1000P_0603_50V8J
PL10
FBM-L11-322513-151LMAT
B++++
12
+3VALWP
PC98
150U_D_6.3V_FP
1.74K_0603_1%
PH1
A
PC82
PC81
2200P_0603_50V7K
10U_SPC-1204P-100
0.012_2512_1%
12
+
PC99
PR119 21K_0603_1%
10K_0805_1%
PC80
0.1U_0805_25V7K
VL
PR117
12
4.7U_1210_25V
PL11
PR101
12
+
150U_D_6.3V_FP
NC_TEST2
1U_0805_25V
PC114
+
PC83
4.7U_1210_25V
12
2 1
PD16
EP10QY03
@0_0603_5%
3
2
PR120
100K_0603_1%
PR121
100K_0603_1%
PC227
PR110
VL
84
+
-
15U_D_25V
12
12
PC94
1 2
PR100
1 2
PR118
47K_0603_1%
PU9A
LM393A
1
VL
47P_0402_50V
1M_0402_5%
PR105
1 2
3.57K_0603_1%
PR111
1 2
10K_0402_5%
PC79
578
PQ21 SI4800DY_SO-8
3 6
241
578
PQ23 SI4810DY_SO-8
3 6
241
12
PC102 100P_0402_50V
PC109 @1000P_0402_50V7K
12
0.1U_0805_25V7K
1 2
DH31
LX3
DL3
ACIN<18,30,34>
VL
12
PR116
12
PC112
PR95 0_0402_5%
1 2
CSH3
1 2
@300K_0402_5%
+5VP
47K_0402_1%
0.047U_0603_16V
BST31
DH3
PR104 10K_0402_5%
PR106
12
PR113 47K_0402_5%
12
PC111
0.047U_0603_16V
12
PR96
0_0402_5%
PC91
0.1U_0805_25V7K
12
12
SHDN# <32>
PR97
10_1206_5%
12
25
BST3
27
DH3
26
LX3
24
DL3
1
CSH3
2
CSL3
3
FB3
10
SKIP#
23
SHDN#
7
TIME/ON5
28
RUN/ON3
PC104
680P_0402_50V
PC158
VS
SHDN_1632# <6,34>
CPU thermal protection at 95 degree C Recovery at 45 degree C
B
VL
12
22
V+
PU8
MAX1632
12
0.1U_0603_16V
DAP202U
PD15
2
3
1
12
PC85
1 2
4.7U_1206_10V
21
4
12OUT
VL
5
VDD
18
BST5
16
DH5
17
LX5
19
DL5
20
PGND
14
CSH5
13
CSL5
12
FB5
15
SEQ
9
REF
6
SYNC
11
RST#
GND
8
1 2
VL
PR107 @0_0402_5%
VL
PR177 20K_0603_1%
PR178
200K_0603_1%
13
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
PC86
PQ42
2N7002
2
0.1U_0603_16V
PC92
BST51
12
4.7U_1210_25V
1 2
+12VALWP
12
PR108 0_0402_5%
1 2
PD18 @RB751V
PC93
0.1U_0805_25V7K
2.5VREF
12
PC103
4.7U_1206_10V
+3VALWP
12
SHDN_1632 <32>
PC84
0.1U_0805_25V7K
1 2
PR98 0_0402_5%
1 2
PR112 @100K_0402_5%
POK
@0_0603_5%
+
CSL5
PR109
10.2K_0402_1%
12
PR115
PC228
15U_D_25V
1 2
PR99 0_0402_5%
12
12
PR114
10K_0402_1%
NC_TEST1
PC87
2200P_0603_50V7K
DL5
D
12
12
PC88
0.1U_0805_25V7K
12
PC108
100P_0402_50V
PC110
12
@100P_0402_50V8K
PC78
470P_0805_100V
PC89
DH51
4.7U_1210_25V
PC77
4.7U_1210_25V
1 2
12
PR94
1 2
22_1206_5%
B++++
12
PC90
4.7U_1210_25V
PQ24
SI4810DY_SO-8
PD17 EP10QY03
12
PQ22 SI4800DY_SO-8
578
3 6
241
578
3 6
241
2 1
FLYBACKSNB
PD14 EC11FS2
1 4
3 2
PT1
9U_SDT-1204P-100-120
12
PC96 47P_0402_50V
12
PR102 2M_0402_5%
12
+
PC105
150U_D_6.3V_FP
CSH5
12
PR103
0.012_2512_1%
12
+
PC106
+5V Ipeak = 6.66A ~ 10A
Dell-Compal Confidential
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
+3.3V/+5V/+12V
Abacus/TangII LA-1452
E
+5VALWP
150U_D_6.3V_FP
0.2
of
36 43Monday, August 26, 2002
Page 37
A
+5VALW
PQ26
SI3445DV
D
S
4 5
G
3
12
1 1
PC118
4.7U_1206_25V
PD19
RB751V
PC121 2200P_0603_50V7K
PQ28 2SA1036K
1K_0603_5%
1 2
1 2
PR126
12
31
2
2
PQ27
13
2SC2411K
12
PR125
10K_0603_5%
LM393A
VL
PU9B
7
B
+1.5VALW+-5%
12
10K_0603_5%
PC148
+1.5VALWP
12
470P_0603_50V
12
+
PC116
150U_D_6.3V_KO
PL12
PD20
RB051L-40
PR127
4.7U_SPC-1205P-4R7A
12
PC147
0.1U_0603_16V
12
1M_0603_5%
PR122
LX18
6
2 1
12
12
PC122
84
0.1U_0603_16V
5
+
6
-
12
12
PR133
PC125
301K_0603_1%
PR131 200K_0603_1%
12
2.5VREF
C
D
E
+1.5VALW
PU7B LM358
5
+
7
6
-
PR124
PR123
1 2
0_0603_5%
1 2
0_0603_5%
0.01U_0603_50V7K
2 2
PR134 200_1206_5%
PD21
RLS4148
VIN
BATT+
PR139
3 3
200_0805_5%
EC_ON#<32>
12
PD23 RLS4148
12
12
PZD3 RLZ4.3B
1 2
PR143 22K_0603_5%
1 2
PR135 200_1206_5%
1 2
VS
PQ31 TP0610T
12
12
13
2
12
PC126
PR141
100K_0603_5%
0.22U_1206_25V
12
1 2
PC127
0.1U_0805_25V7K
PR140 10K_0603_5%
12
PR142
PD22 RLS4148
PC128
150K_0603_5%
12
12
0.1U_0603_16V
+5VP
12
PZD4 RLZ5.1B
VS1
2MM
PJP2 4MM
PJP3 2MM
PJP4 3MM
PJP5 3MM
PJP6
21
+2.5V+2.5VP
21
+1.5VALW
21
+5VALW+5VALWP
21
+3VALW
21
+12VALW
1.5K_1206_5%
12
PR137
1.5K_1206_5%
12
PR138
12
PR136
1.5K_1206_5%
12
PR33
1.5K_1206_5%
B+
+1.5VALWP
+3VALWP
+12VALWP
OUT
RTCVREF
3
PR144 200_0603_5%
1 2
PR34 200_0603_5%
1 2
CHGRTC
+1.25VP
PJP8 3MM
+1.25VS
21
12
PC129
4.7U_1206_25V
PU10 S-81233SG
CHGRTCP
12
PZD5 RLZ16B
4 4
2
IN
12
PC130
1U_0805_25V
GND
1
Dell-Compal Confidential
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
+1.5VS
Abacus/TangII LA-1452
0.2
of
37 43Monday, August 26, 2002
E
Page 38
5
4
3
2
1
D D
PC229
15U_D_25V
PC202
0.1U_0805_25V7K
SOFT1
BOOT1
UGATE1
PHASE1
ISL6225
ISEN1
LGATE1
PGND1
VOUT1 VSEN1 EN1 PG1
OCSET1
IS6225
PR278 51_1206_5%
14
VIN
PU20
GND
1
+5VALWP
28
VCC
DDR
13
+5VALWP
PR299
2.2_0603_5%
SOFT2
BOOT2
UGATE2
PHASE2
ISEN2
LGATE2
PGND2
VOUT2 VSEN2
EN2
PG2/REF
OCSET2
17
23
24
25
22
27
26
20 19 21 16
18
PC201
2.2U_0805_10V
PC204
0.01U_0603_50V7K
PR2800_0603_5%
PR285
2K_0603_5%
PC215
4.7U_0805_6.3V6K
1 2
0_0603_5%PR281
12
PC196
2200P_0603_50V7K
+2.5V Ipeak =8.49A ~ 14.78A
PQ79
SI4800DY_SO-8
C C
+2.5VP
12
12
+
+
PC209
B B
PC208
220U_D_4V_FP
220U_D_4V_FP
PR287
18.2K_0603_1%
PR289
10K_0603_1%
PL22
4.7U_SPC-1205P-4R7A
PC213
PR288 0_0603_5%
0.01U_0603_50V7K
@10K_0603_5%
@100_0603_5%
PC210
PD35@EC31QS04
2 1
@1000P_0603_50V8J
578
3 6
241
578
PQ80
SI4810DY_SO-8
3 6
241
PC217 @1000P_0603_50V8J
PC197
0.1U_0805_25V7K
PC198
4.7U_1210_25V
PC206
0.1U_0805_25V7K
PC199
4.7U_1210_25V
3
PR2820_0603_5%
1
0_0603_5%
PR284
PC200
4.7U_1210_25V
PD34
DAP202U
2
PC203
0.01U_0603_50V7K
PR279
1K_0603_5%
PR291 51K_0603_1%
+
12
6
5
4
7
2
3
9
10
8
15
11
PL21
HCB4532K-800T90_9A
1 2
DDR Termination Voltage
PC207
0.1U_0805_25V7K
PQ81 FDS6984S
PR283
4
3
2
1
SDREF
B+
+2.5V/+1.25V
+2.5VP
12
PC224
0.1U_0603_16V
5
6
7
8
PC216 @1000P_0603_50V8JPR290
PR286 @100_0603_5%
PC214
@1000P_0603_50V8J
12
PC205
10U_1206_6.3V7K
PL23
1.5U_TPR6D38-1R5M
1 2
PC211
220U_D_2V
+1.25VP
+
1 2
PC212
4.7U_0805_10V4Z
+2.5VP
+2.5VPGD
PR292
0_0603_5%
12
+3VALWP
12
PR296
10K_0603_5%
PR293 10K_0603_0.1%
12
PR295 10K_0603_0.1%
PC218
470P_0603_50V7K
PR294
0_0603_5%
12
SUSP# <16,27,30,33>
SYSON<30,33>
A A
Dell-Compal Confidential
COMPAL ELEC TRONICS, INC
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
DDR POWER 2.5V & 1.25V
Size Document Number Rev
B
Date: Sheet
Abacus/TangI I LA-1452
1
38 43Monday, August 26, 2002
of
0.2
Page 39
5
4
3
2
1
AC Adapter Detector
D D
LOW_PWR AC_LOW_PRES# AC_LOW_PRES2#
VIN
90W
VIN
12
PR170 10K_0603_5%
12
VIN
C C
12
PC156
@1000P_0603_50V8J
12
PR173 10K_0603_5%
LOW_PWR<34>
12
PR174 10K_0603_5%
B B
12
PR171 10K_0603_5%
12
PR172 10K_0603_5%
12
PC157
@1000P_0603_50V8J
3
2
5
6
PC155
0.01U_0603_50V7K
PU14A
84
LM393A
+
1
-
VIN
PU14B
84
LM393A
+
7
-
+5VALWP
12
PR168 10K_0603_5%
+5VALWP
12
PR169 10K_0603_5%
AC_LOW_P RES# <30>
AC_LOW_P RES2# <31>
70W
AIRLINE
0V
Float
20V
0
0
0
1
11
IREF2AC Adapter
2.96V
2.31V
1.62V
A A
Dell-Compal Confidential
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Adapter Detector
Size Document Number Rev
Abacus/TangII LA-1452 0.2
Date: Sheet
1
of
39 43Monday, August 26, 2002
Page 40
A
Different Pin Definition for ISL6215 in PU16
RAMPS
#6
VMON
#8
OCSET
#11
#26 SOFT
1 1
CPU_VID0<6,8>
CPU_VID1<6,8>
CPU_VID2<6,8>
CPU_VID3<6,8>
CPU_VID4<6,8>
VGAT E<19,30>
#12
#13
#15
ALTV
OFFSET
VRTN
PR238
PR239 0_0603_5%
PR240 0_0603_5%
PR242 0_0603_5%
PR243 0_0603_5%
0_0603_5%
PR246 0_0603_5%
PM_DPRSLPVR<19>
PM_STPCPU#<15,19>
PR247
@10K_0603_5%
1 2
2 2
CPU_B+
PR255
@80.6K_0603_1%
1 2
PR260
@10K_0603_1%
1 2
PR265 100K_0603_5%
1 2
+3VALWP
3 3
PR269
100K_0603_5%
PR272
0_0603_5%
PC190
4.7U_1206_16V
VR_ON<30,33>
12
PC185
0.1U_0603_16V
12
PR274 0_0603_5%
PR301
100K_0603_5%
1.2VDD
2
1 2
@3.09K_0603_1%
1 2
@10.2K_0603_1%
1 2
@3.24K_0603_1%
1 2
+5VALWP
1
4
3
DE-POP PR249 PR256 PR268 PC171
4 4
ISL6219 for desk-top
PR247, PR255, PR260 PR248, PR250,PR258, PC178,PC172,PR236
ISL6215 for mobile
PR266, PQ74, PQ71 PR253, PC179, PR257
A
#17
#24
#27
PR248
PR250
PR258
PR266
10K_0603_5%
1 2 13
PQ74
2N7002
PU18
VIN
PG
EN
CM2843
3.48K
6.04K2K1.5K
NODV
EN
ALTEN
12
12
12
12
12
B
PU16
1
VID0
2
VID1
3
VID2
4
VID3
5
VID4
25
PGOOD
24
NC
27
NC
17
NC
6
NC
11
NC
12
NC
13
NC
FSET/EN7GND
1 2
PR252
90.9K_0603_1%
2
VOUT
GND
B
ISL6219
100K
2
5
2
100K
VCC
PWM1
ISEN1
PWM3
ISEN3
PWM2
ISEN2
COMP
VSEN
13
13
300K
130K
2.2_0603_5%
28
22
23
18
19
21
20
10
9
FB
8
NC
16
15
NC
26
NC
14
PQ71
DTC115EUA
ISL6207_EN
PQ82
2N7002
6.8nF
4.7nF
PR300
PC178
1 2
PC181
+1.2VP
12
1 2
1U_0805_25V
PC192
+5VS
12
@0.1U_0603_16V
4.7U_1206_16V
PTC solution
NTC solution
C
PC166
PR236
@0_0603_5%
4.7U_1206_25V
PR2530_0603_1%
1 2
+5VALWP
C
1 2
PR267
PR2971.15K_0603_5%
1 2
@280K_0603_1%
ISL6207_EN
12
PC171
PC17247P_0603_50V8J
12
5.6N_0603_50V7K
PR249
1 2
7.5K_0603_1%
PC179
12
PR298
681_0603_1%
1 2
5.6N_0603_50V7K
PR257
1 2
1 2
PH5
4.7K_0603_1%
1 2
909_0603_1%
PR256
1 2
1.74K_0603_1%
PR268
1 2
@300K_0603_5%
1.PH6,PH7,PH8 pop thermal resistor
2. Non-pop PR298 and PH5
3.PR297 0 ohm
1.PH6,PH7,PH8 pop 1.5K resistor
2. Pop PR298 357_0603_1%,PR297 1.2K_0603_1%
3. Pop PH5 3K thermal resistor
+5VS
PC169
ISL6207_EN
PC182
ISL6207_EN
1 2
1U_0805_25V
1 2
1U_0805_25V
1 2
PC193
D
PR232 10K_0603_5%
1 2
6
3
7
4
PR244
12
PC168
1 2
@100K_0603_5%
+5VS
1 2
PR262@100K_0603_5%
12
1 2
+5VS
1 2
PR277@100K_0603_5%
12
1U_0805_25V
1 2
D
E
CPU_B+
578
PQ65
PC167
PR259 0_0603_5%
PR271
0_0603_5%
PR273 0_0603_5%
IR7811A
IR7811A
3 6
SI4362DY_SO-8
PQ69
IR7811A
0.1U_0805_25V7K
1 2
0.1U_0805_25V7K
241
PQ67
PQ75
IR7811A
PQ77
SI4362DY_SO-8
578
3 6
578
3 6
578
SI4362DY_SO-8
241
241
3 6
241
578
3 6
241
578
3 6
1 2
0.1U_0805_25V7K
1 2
PC180
PC191
E
PR233
LGTE
BOOT
UGTE
PHSE
LGTE
BOOT
UGTE
PHSE
LGTE
2
1
8
5
2
1
8
5
2
1
8
5
1 2
0_0603_5%
1 2
PR237 0_0603_5%
PR254
1 2
0_0603_5%
1 2
1 2
1 2
PU15
BOOT
VCC
PWM
UGTE
EN
PHSE
GND
ISL6207
0.01U_0603_50V7K
PR251
@5.1_0603_5%
PU17
6
VCC
3
PWM
7
EN
4
GND
ISL6207
PC183
@0.01U_0603_50V7K
PR270
@5.1_0603_5%
PU19
6
VCC
3
PWM
7
EN
4
GND
ISL6207
PC194
@0.01U_0603_50V7K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
578
PQ66
3 6
578
PQ68
3 6
CPU_B+
578
PQ70
IR7811A
PQ72
578
SI4362DY_SO-8
CPU_B+
PQ76
IR7811A
PQ78
SI4362DY_SO-8
241
F
CPU_B+
241
241
3 6
241
3 6
241
578
3 6
578
3 6
F
+
PD28
EC31QS04
2 1
PQ73 SI4362DY_SO-8
EC31QS04
2 1
241
EC31QS04
2 1
241
+
PD31
PD32
PC230
+
15U_D_25V
0_0603_5%
1 2
1 2
PC232
15U_D_25V
+
G
FBM-L18-453215-900-LMA 90T_1812
12
PC159
PC231
15U_D_25V
10U_1210_25V
PL18
0.6U_HK-AE26A0R6
PR241
@5.1_0805_5%
PH6
12
PC170 @1000P_0603_50V8J
PR245
1.96K_0603_1%
DE-POP all items in dash- area if ISL6215is used for mobile CPU
+
PC233
PC173
15U_D_25V
0.6U_HK-AE26A0R6
PR261
PH7
@5.1_0805_5%
0_0603_5%
12
1 2
PC184 @1000P_0603_50V8J
PR263
1.43K_0603_1%
1 2
+
PC234
PC235
15U_D_25V
15U_D_25V
0.6U_HK-AE26A0R6
PR275
PH8
@5.1_0805_5%
0_0603_5%
12
1 2
PR276
1.5K_0603_1%
1 2
PC161
PC160
10U_1210_25V
2 1
PC174
10U_1210_25V
10U_1210_25V
PL19
PC186
10U_1210_25V
PL20
PC195 @1000P_0603_50V8J
@10U_1210_25V
EC31QS04
PC162
@10U_1210_25V
+CPU_CORE
PD29
PC175
10U_1210_25V
+CPU_CORE
PC187
PC188
10U_1210_25V
+CPU_CORE
PC163
0.1U_0805_25V7K
12
PC176
10U_1210_25V
PC189
10U_1210_25V
PC164
PC220
10U_1210_25V
Dell-Compal Confidential
COMPAL ELECTRONICS, INC
Title
+CPU_CORE
Size Document Number Rev
B
Abacus/TangII LA-1452 0.2
Date: Sheet
G
H
12
+
PC165
47U_EC_25V
2200P_0603_50V7K
+CPU_CORE
PC221
0.1U_0805_25V7K 2200P_0603_50V7K
+CPU_CORE
12
PC222
0.1U_0805_25V7K
+CPU _CORE
40 43Monday, August 26, 2002
H
PC223
of
PL17
B+
2200P_0603_50V7K
Page 41
5
4
3
2
1
Version change list (P.I.R. List) Page 1 of 1
Reason for change Rev. PG# Modify List B.Ver# PhaseFixed IssueItem
Fireware issue The ICH4 GNTA# strap pull up for EC BIOS
Leakage current issue
D D
2
3
Fix schematics part value
BOM issue
4
5 HDD leakage current issue
Reduce Broadcom 4401L leakage current
L21, L22, L23, L26 part value different with BOM Change L21, L22, L23, L26 part value from CHB2012U121 to
R445 include wrong part number
When AC in +5VSHDD will go up to 5V
6 Capture library package issue 0.1C 2 8
7 BOM issue
8 Fix LOM EEPROM issue
9 Fix CLKRUN# leakage issue
10 LOM EEPROM issue
C C
11 SW BD LED keep turn on
12 0.2
13 Change address and control signals
layout topology
Fixed R196~R199 from 56.2K ohm to 56.2 ohm
U8 (AT93C46) is used X16 organization
ICH4 not implement CLKRUN#, GPIO24 is resume power well.
U8 (AT93C46) is used X16 organization. U8 pin6 pull up or NC for X16 organization select, pull down for X8 organization selcet.
SW BD LED control transistor Emitter conncet to +5VALW be keep LED always turn on
(1.5VS)
Change ddr address and control signal layout topology
14 Fix EE issue item 89 Signal COMP/B and Y/G connect error 0.1E 1 7
15 Fix EE issue item 91 BEEP# from EC should be high active 0.1E 2 8
16 Fix EE issue item 92 Fix FSB 400MHz when 845GL pop 0.1E 1 5
17 Fix EE issue item 95 When AC insertion SUSP# may be floating before the KBC
can programit.
18 Fix EE issue item 47 Provide enough current rating 0.2
19
enough
20 Fix EE issue item 102 0.1F 10,15 0.2
B B
2122Battery charge issue ACIN pull up +3VALW can't change power supplier to battery
Provide enough current ratingCard Bus power bead current rating not
Fix Intel CPU FSB frequency issue
when AC exit
NO Change PCMCIA connector 0.1F 2 4
23 Fix INTRUDER issue ESD protect for Q22 0.1F 32
24 Remove PS2 connector No necessary 0.1G 2 9
25 A dd debug port PE board have not pop minipci connector, we need a port 80
debug tool
27 For cost save 0.1G 3 2For cost save
28 It no need Use R19 pop and depop to control H_SEL0 high or low 0.1G 15
Fix EE issue item 134 0.1H 12,13
29
30 Pop Petit Cap after EA test
Fix EE issue item 149
A A
31 F ix EMI issue 0.1I 1 0
Change ddr address and control signal layout topology
EMI team's recommendation 0.2
0.1A 1 81 0.1
0.1A 2 2
0.1B 1 5
0.1B 3 3
0.1C 2 1 0.1
0.1C 2 3
0.1C 2 2
0.1D 1 9 0.2
0.1D 2 2
Depop R153, GNTA# have internal pull up
Depop L39 and pop L7, conncetor power source from +3VALW to +3V, R31, R32, R33 pull up to +3VAUXLAN
BLM21A601SPT on schematics
Change R445 part number from SD028470200 to SD028680200. PN indicate value from 47K_0402_5% to 68K_0402_5%
Q6 change to SI2302DS as schematics, SIDEPWR active low when HDD power on
Fixed Q30, Q31, Q32 Capture libaray , pin1 fixed to pin3, pin3 fixed to pin1
Change R196~R199 PN from SD014562207 to SD014562A00 on schematics
NC U8 pin6 for X16 organization select
and depop D46.
U8 pin6 pull up +3VAUXLAN via R452 , and depop R452.
0.1
0.1
0.1
0.1
0.1
0.1
0.2
0.1D 3 2 0.2
0.1E 1 0Fix VCCA_SM voltage drop issue Add current rating for VCCA_SM, VCCA_DPLL, VCCA_FSB
0.1E 12,13
0.1E 3 3
0.1F 1 5
0.1F 2 4
0.1F 1 8
0.1G 3 3
Change L3, L4, L27, L28 from MLF2012DR68XT to FBM-L11-201209­121LMA05
DDR address and control signals layout topology same the ddr data layout topology
Swap COMP/B and Y/G to correct connection
Change net name BEEP# to BEEP
Add R455 (8.2K_5%) pull down for H_BSEL0
Add R456 (100K_5%) pull down SUSP#
L22 and L26 change frome BLM21A601SPT (300mA) to FBM-L11-201209-121LMA05 (500mA) and depop L22
L5 and L6 change frome FBM-11-160808-800LMT_0603 (300mA) to FBM-L11-201209-121LMA05 (500mA)
H_SEL0 connect to R270 pin1 from CLK generator, HBSEL0 connector to R270 pin2 from CPU. Depop R270 on GL board.
Depop R161
Change PCMCIA conncetor from AMP_0-1376275-1 to JAE_JC21-BRB
Add C638, C639 for Q22 protection
Remove RP7, JP26
Add R458, C637 and JP27
Depop C10, C229 (150U Poly Cap), add C641, C642 (100U Petit Cap)
Remove R455
Change DDR address and control signal to go back SST topology
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.1H 3 2 0.2
Pop R52, C79 for CLK_CLK_PCI_LAN; R428, C614 for CLK_PCI_MINI; R406, C597 for CLK_PCI_LPC; R321, C395 for CLK_ICH_66M
SST
SST
SST
SST
SST
SST2N7002 Drain is pin1, Source is pin3
SST
SST
PTAdd a diode D46 to isolate GPIO24 from ICH4 to PCI devices,
PT
PTChange JP5 pin9 from +5VALW to +3VS
PT
PT
PT
PT
PT
PT
PT
PT
PT
PT
PT
PT
PT
PT
PT
PT
PT
PTDepop C641, C642 and pop C10, C229
PT
Compal Electronics, Inc.
Title
P.I.R History
Size Document Number Re v
ADY13 LA-1271
5
4
3
2
Date: Sheet
41 43Tuesday, August 27, 2002
1
of
Page 42
5
4
3
2
1
Version change list (P.I.R. List) Page 1 of 1
Reason for change Rev. PG# Modify List B.Ver# PhaseFixed IssueItem
Fix EE issue item 171 For CRT Hsync and Vsync to allow tuning
33
D D
C C
No Schematic version change for PT build
0.1I 1 732 0.2
0.2 ALL
Change revision from 0.1I to 0.2
0.2
PTAdd series resistors R459, R460 for Hsync and Vsync
PT
B B
A A
Compal Electronics, Inc.
Title
P.I.R History
Size Document Number Re v
ADY13 LA-1271
5
4
3
2
Date: Sheet
42 43Monday, August 26, 2002
1
of
Page 43
5
T
4
3
2
1
Version change list (P.I.R. List) Page 1 of 1
Reason for change Rev. PG# Modify List B.Ver# PhaseFixed IssueItem
CPU_CORE can't power up
1
D D
2
Pin7 of PU16 can't be used as on/off control pin 0.1B 40 1. Change VCC power source of PU16 from +5VALWP to +5VS 0.1 SST
Current limtited is about 37A while PH6,PH7,PH8 is 1.5K that is not enough for design target.Because we don't use PTC resistor on PCB now, the value must be tuned later.
40 1. Change PH6,PH7,PH8 from 1.5K_0603_5% to 3K_0603_1%current limited is not up to 60A 0.1 SST0.1B
Turn on voltage of PQ19 is not eonugh Vgs of PQ19 is 2V while PR72 is 47K. That is not enough.
3
4
Fix noise issue On SST PCB, we can sound some noise due to PC77, the
5
6
Fix CPU_CORE Transient Response fail
C C
B B
SDREF output voltage is over spec. 380.1EAdd bypass capacitor pallel pin18 of ISL6225 Populate PC218 470P_0603_50V7K
7
PG of CM28423 has a glitch
8
while VCC is ready and VR_ON is float
Change VCC power source of PU15,
9
PU17, PU19 from +5VALWP to +5VS
Prevent abnoral function OVP
10
caused by ISL6219 while system powerwd off ; bouble pulses was observed at output PW1, PW2, PWM3 of ISL6219
11
Fine-tune current sharing of CPU VR phase1,2,3 to have thermal balance
Fine-tune CPU load-line with NTC Fine-tune CPU load-line with NTC 0.1E 40 1. Keep PR268 nonpop
12
While PR72 is 22K, the Vgs can be improved to 2.5V.
-L18-453215-900LMA90T1812 is 9A that is better.
cernamic capacitor has sounded noise with thinner type.
The transient response is too slow. We must to tune feedback resistor and capacitor to fix it.
Add pulldown resistor tie to GND while VR_ON is float that can be made sure the logic is low.
Negative voltage was observed on +5VALWP when system powered off
ISL6219 caused OVP when on/off pin changed from high to low level
uneven current sharing found 0.1E 40 1. Change PH6, PH7, PH8 form 3K_0603_1% to 0_0603_5%
0.1B 35
0.1B 35
0.1E 40
0.1E 40
0.1E 40 1. Change VCC power source of PU15, PU17, PU19
0.1E 40
1. Change PL8 from FBM-L11-322513-151LMAT to FBM -L18-453215-900LMA90T1812.
1. Change PR249 from 3.48K_0603_1% to 5.76K_0603_1%.
2. Change PR257 from 49.9_0603_1% to 1.1K_0603_1%
3. Populate PC172 68PF_0603_50V.
Add PR301 100K_0603_1%
from +5VALWP to +5VS
1. Add PQ82 2N7002
2. Change PR232 from 5.1_0603_5% to 10K_0603_5%
3. Change PC168 from 1U_0805_25V to 0.01U_0603_50V.
4. Depop PR251, PR270, PC183, PC194
5. Tie the EN pin of PU15, PU17, PU19 to Pin1 of PQ82
2. Change PR245 from 0_0603_5% to 1.96K_0603_1%
3. Change PR263 from 0_0603_5% to 1.43K_0603_1%.
4. Change PR276 from 0_0603_5% to 1.5K_0603_1%
2. Change PR256 from 2K_0603_1% to 1.74K_0603_1%
3. Change PR297 from 0_0603_5% to 1.15K_0603_1%.
4. Change PH5from depop to 4.7K_0603_1%
5. Change PR298 from depop to 681_0603_1%
6. Change PR257 from 49.9_0603_1% to 909_0603_1%
7. Change PC179 from 3900P_0603_50V to 5.6N_0603_50V
8. Change PR249 from 3.48K_0603_5% to 7.5K_0603_1%
7. Change PC171 from 6800P_0603_50V to 5.6N_0603_50V
8. Change PC172 from depop to 47P_0603_50V
0.1 SST1. Change PR72 from 47K_0402_5% to 22K_0402_5%
0.2 PT1. Change PC77 from 2.2U_1206_25V to 4.7U_1210_25V360.1C
0.2 PT
0.2 PT
0.2 PT
0.2 PT
0.2 PT
0.2 PT
0.2
PT0.2current rating is not enough. FBM-L11-322513-151LMAT is 5A that is not enough.So FBM
PT
Audio noise found
13
PC212 location space change requested by ME to put a connector around 0.1E 38
14
A A
5
Still find root cause 0.1E 1. reserve 15U_D_25V capacitors on PC226-PC235,
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPE
4
3
35, 36, 38, 40
1. change the size of PC212 from D size to 0805 and pop 4.7U_0805_10V
Title
PIR
Size Document Number Re v
Abacus/TangII LA-1452
2
Date: Sheet
Compal Electronics, Inc.
0.2
0.2
PT
PT
of
43 43Monday, August 26, 2002
1
0.2
Page 44
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