A
1 1
B
C
D
E
ATR60 LA-1432 REV1.A Schematics
Document
2 2
Intel Pentium 4 Processor it the 478-pin
Package
with 845D chipset
3 3
4 4
Compal Electronics, Ltd.
Title
Cover Sheet
Size Document Number Rev
B
LA1432
Date: Sheet
星期五
07, 2002
A
B
C
D
六月
14 5 ,
E
1.A
of
COMPAL CONFIDENTIAL
MODEL NAME : ATR60 LA-1432
REV:1.A
VGA DDR
CH-A
PAGE 17
VGA DDR
CH-B
PAGE 18
INTERNAL IDE
IDE/CD
/FDD
PAGE 29
USB X 3
LPT
PORT
Direct CD
Play
PAGE 28
PAGE 30
PAGE 32
CRT & TV-OUT
& LVDS
PAGE 19
VGA Controller
nVIDIA NV17M
PIRQA#
PAGE 13,14,15,16
FUNC 0: LAN, HUB-TO-PCI ,
PCI-TO-LPC BRIDGE
FUNC 1: IDE Controller
FUNC 2: USB Controller #1
FUNC 3: POWER MANAGEMENT
FUNC 4: USB Controller #2
FUNC 5: AC97 Audio Controller
FUNC 5: AC97 Modem Controller
SIO
LPC 47N227
Wireless
Keyboard/Mouse
LED Board Conn.
HUB Link
ICH2
LPC
PAGE 31
KB/PS2 Interface
PAGE 36
PCI BUS
PAGE 20,21,22
LPC
EC/KBC
PC87591
PAGE 33
BIOS
EC BUFFER
PROPRIETARY NOTE
Northwood
uFCBGA/uFCPGA
CPU
PSB
Brookdale-D MCH
Host-HUB Bridge
1394 Controller
TAB43AB22
AC LINK
MDC
Connector
Audio Board
PAGE 35
FIR/SIR Interface
LED Board Conn.
PAGE 34
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PAGE 4,5
IDSEL: AD11
PAGE 6,7,8
IDSEL: AD16
MASTER 0
PIRQA#
PAGE 25
PAGE 35
PAGE 35
MEMORY BUS AGP BUS
CARDBUS
OZ6933
PCMCIA
SOCKET
DDR SODIMM X2
-BANK 0,1,2,3
IDSEL: AD20
MASTER 2
PIRQA#,
PIRQB#
SIRQ
PAGE 23
PAGE 24
PAGE 9,10,11
IDSEL: AD17
MASTER 3
PIRQB#
LAN Controller
RTL8100BL
PAGE 26
Title
Size Document Number Rev
Date: Sheet of
CLOCK
W320-04
Reset Circuit
POWER
INTERFACE
Mini PCI
Connector
DC/DC POWER
+1.2VP POWER
+1.25VS POWER
+1.5VS POWER
+1.8VALW POWER
+2.5V POWER
+3VALW POWER
+5VALW POWER
+12VALW POWER
CPU_CORE POWER
PAGE 39,40,41,42,43,44
Compal Electronics, Inc.
ATR60 COVER S HEET
B
LA1432
星期五
07, 2002
六月
PAGE 12
PAGE 38
PAGE 37
IDSEL: AD18
MASTER 1
PIRQC#,
PIRQD#
PAGE 27
24 5 ,
1.A
A
Voltage Rails
B
C
D
E
Power Plane Description
1 1
2 2
VIN
B+
+CPU_VCC
+1.2VP
+1.25VS 1.25V switched power rail
+1.8VALW 1.8V power rail O N ON
+1.8VS
+2.5V
+2.5VS 2.5V switched power rail
+3VALW
+3V
+3VS
+5VALW
+5V
+5VS
RTCVCC
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Adapter power supply (19V)
AC or batte ry power rail for power circuit.
Core voltage for CPU
1.2V switched power rail for CPU AGTL Bus
AGP 4X ON OF F O F F +1.5VS
1.8V switched power rail
2.5V power rail
3.3V always on power rail
3.3V power rail
3.3V switched power rail
5V always on power rail
5V power rail
5V switched power rail
12V always on power rail
RTC power
S1 S3 S5
N/A N/A N/A
N/A N/A N/A
ON OFF
ON OFF
ON OFF OFF
ON
ON
ON
ON
ON
ON
ON
ON ON
ON
ON +12VALW
ON
OFF
OFF
ON*
OFF
OFF
OFF
ON
OFF
OFF
ON ON*
OFF
ON
OFF
OFF
ON
ON*
OFF
OFF
OFF
ON
ON*
ON
ON
Board ID Table for AD channel
Vcc 3.3V +/- 5%
Board ID0
0
1
2
3
100K +/- 5%Ra
Rb V min
0
47K +/- 5%
100K +/- 5%
NC
AD_BID
0V
0.921 V 1.055 V 1.204 V
1.453 V
2.5 V
Vt y p
AD_BID
0V 0V
1.650 V
3.3 V
V
AD_BID
1.759 V
3.465 V
max
Vcc 3.3V +/- 5%
100K +/- 5%Rc
External PCI Devices
Device IDSEL # REQ # / GNT # Interrupts
VGA
CardBus
LAN
Mini-PCI
1394
3 3
AD20
AD17
AD18
AD16 0
EC SM Bus1 address
Device
Smart Battery
EEPROM(24C16/02)
(24C04)
Address Address
0001 011X b
1010 000X b
1011 000Xb
2
3P I R Q B
1/4
EC SM Bus2 address
Device
MAX1617MEE
OZ163
Smart Battery
Docking
DOT Board
PIRQA
PIRQA/PIRQB
PIRQC/PIRQD
PIRQA
1001 110X b
0011 0100 b
0001 011X b
0011 011X b
XXXX XXXXb
ICH2 SM Bus address
Device
4 4
Clock Generator ( ICS9238-50)
SDRAM Select ( 74HC4052 )
CPU Voltage VID select ( F3565 )
A
Address
1101 0000
1010 0000
0110 111Xb
B
Board ID1
0
1
2
3
Rd V min
0
47K +/- 5%
100K +/- 5%
NC
Real Board ID Board ID1 Board ID0
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
C
0
0
0
0
1
1
1
1
2
2
2
2
3
3
3
3
AD_BID
0V
Vt y p
AD_BID
0V 0V
V
AD_BID
max
0.921 V 1.055 V 1.204 V
1.453 V
2.5 V
1.650 V
3.3 V
1.759 V
3.465 V
PCB Revision
0
1
0.1
1.0
2
3
0
1
2
3
0
1
2
3
0
1
2
3
Compal Electronics, Ltd.
Title
Notes & PIR
Size Document Number Rev
B
LA1432
Date: Sheet
星期五
07, 2002
D
六月
1.A
34 5 ,
E
of
A
+CPU_VCC
1 2
R340 51_1%_0603
1 2
R387 56
1 2
R359 300_1%_0603
1 2
R363 51_1%_0603
4 4
RP75
1 8
2 7
3 6
4 5
8P4R-1K
CPURST#
FERR#
CPU_PWRGD
BREQ0#
ITP_TMS
ITP_TRST#
ITP_TCK
ITP_TDI
HA#[3..31] 6
HA#[3..31]
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
W1
W2
AB1
HREQ#0 6
HREQ#1 6
3 3
+CPU_VCC
1 2
R305 51_1%_0603
1 2
R306 51_1%_0603
1 2
R318 51_1%_0603
1 2
R307 51_1%_0603
1 2
R319 51_1%_0603
1 2
R320 51_1%_0603
2 2
BPM0#
BPM1#
BPM2#
BPM3#
BPM4#
BPM5#
HREQ#2 6
HREQ#3 6
HREQ#4 6
ADSTB0# 6
ADSTB1# 6
ADS# 6
BNR# 6
BREQ0# 6
BPRI# 6
HLOCK# 6
HIT# 6
HITM# 6
DEFER# 6
DRDY# 6
CPURST# 6
HTRDY# 6
RS#0 6
RS#1 6
RS#2 6
BREQ0#
BPM0#
BPM1#
BPM2#
BPM3#
BPM4#
BPM5#
CPURST#
AC1
AA3
AC3
K25
K26
L25
AB25
AB2
AC6
AB5
AC4
AA5
AB4
J26
AF26
ITP_TDI
ITP_TMS
ITP_TRST#
ITP_TCK
+CPU_VCC
H_BSEL0 12
H_BSEL1 12
DBSY# 6
CPU_PWRGD 20
CPUSLP# 20
1 1
SELPSB[1:0] STSEM BUS FREQUENCY
00
01
10
11
100MHZ
RESERVED
RESERVED
RESERVED
A
1 2
R82 @62_1%_0603
BSEL0
AD6
AD5
AE25
CPU_PWRGD
CPUSLP#
THERMDA
THERMDC
THERMTRIP#
AB23
AB26
K2
K4
L6
K1
L3
M6
L2
M3
M4
N1
M1
N2
N4
N5
T1
R2
P3
P4
R3
T2
U1
P6
U3
T4
V2
R6
T5
U4
V3
Y1
J1
K5
J4
J3
H3
L5
R5
G1
V5
G2
H6
D2
G4
F3
E3
E2
H2
V6
J6
F1
G5
F4
Y6
D5
C1
F7
E6
D4
C3
H5
B3
C4
A2
U26A
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
ADSTB0#
ADSTB1#
ADS#
AP0#
AP1#
BINIT#
BNR#
IERR#
DP0#
DP1#
DP2#
DP3#
BREQ0#
BPRI#
LOCK#
HIT#
HITM#
DEFER#
DRDY#
MCERR#
RESET#
TRDY#
RS0#
RS1#
RS2#
RSP#
BPM0#
BPM1#
BPM2#
BPM3#
BPM4#
BPM5#
SKTOCC#
TDO
TDI
TMS
TRST#
TCK
PROCHOT#
BSEL0
BSEL1
DBSY#
DBR#
PWRGOOD
SLP#
THERMDA
THERMDC
THERMTRIP#
mPGA478
B
ADDR GROUP
CONTROL GROUP
THERMAL DIODE
B
Northwood
MISC
PROPRIETARY NOTE
C
HD#[0..63]
HD#0
B21
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
DATA GROUP
HOST CLK
LEGACY CPU
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DBI0#
DBI1#
DBI2#
DBI3#
DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#
BCLK0
BCLK1
ITPCLK0
ITPCLK1
A20M#
FERR#
IGNNE#
INTR/LINT0
NMI/LINT1
INIT#
STPCLK#
SMI#
B22
A23
A25
C21
D22
B24
C23
C24
B25
G22
H21
C26
D23
J21
D25
H22
E24
G23
F23
F24
E25
F26
D26
L21
G26
H24
M21
L22
J24
K23
H25
M23
N22
P21
M24
N23
M26
N26
N25
R21
P24
R25
R24
T26
T25
T22
T23
U26
U24
U23
V25
U21
V22
V24
W26
Y26
W25
Y23
Y24
Y21
AA25
AA22
AA24
E21
G25
P26
V21
E22
K22
R22
W22
F21
J23
P23
W23
AF22
AF23
AC26
AD26
C6
B6
B2
D1
E5
W5
Y4
B5
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
A20M#
FERR#
IGNNE#
INTR
NMI
C
HD#[0..63] 6
DBI0# 6
DBI1# 6
DBI2# 6
DBI3# 6
DSTBN0# 6
DSTBN1# 6
DSTBN2# 6
DSTBN3# 6
DSTBP0# 6
DSTBP1# 6
DSTBP2# 6
DSTBP3# 6
CLK_HCLK 12
CLK_HCLK# 12
A20M# 20
FERR# 20
IGNNE# 20
INTR 20
NMI 20
CPUINIT# 20
STPCLK# 20
SMI# 20
+5VS
1 2
C191
2200PF
R83 1K
1 2
1 2
THERMDA
THERMDC
C192
.1UF_X5R
THERMTRIP#
D
U4
1
NC
2
VCC
3
DXP
4
DXN
5
NC
6
ADD1
7
GND
8
GND
MAX1617/MAX6654
1 2
R392
56
PAD3
EMI PAD-4.5X3.2
PAD8
EMI PAD-4.5X3.2
D
1617VCC
STBY
SMBCLK
SMBDATA
ALERT
ADD0
+CPU_VCC
1 2
R394
@470
2
3
Q46
@2SC2411K
1
1
16
NC
15
14
13
NC
12
11
10
9
NC
CBE
1
EMI PAD-4.5X3.2
EMI PAD-4.5X3.2
E
+5VS
1 2
R90
200
EC_SMC2 28,33
1 2
R87
1K
1
1
EC_SMD2 28,33
PAD4
EMI PAD-4.5X3.2
PAD6
EMI PAD-4.5X3.2
1
1
PAD7
1
EMI PAD-4.5X3.2
PAD5
1
EMI PAD-4.5X3.2
ATF#
+5VS
MAINPWON 39,41,43
PAD2
PAD9
Compal Electronics, Inc.
Title
Pentium 4/Northwood Processor in mPGA478
Size Document Number Rev
B
LA1432
Date: Sheet
星期五
07, 2002
六月
44 5 ,
E
of
1.A
A
+CPU_VCC
+
+
10
TESTHI7
9
TESTHI6
8
TESTHI5
7
TESTHI4
6
10
9
8
7
TESTHI12
6
1 2
C404
220PF
1 2
C405
220PF
1 2
R360 51.1_1%_0603
1 2
R63 51.1_1%_0603
+1.2VP
+VCCA
C351
150U_D
VSSA
VCCIOPLL
+CPU_VCC
+CPU_VCC
CPU_GTLREF
H_GTLREF
1 2
C363
1UF_0603
+CPU_VCC
TESTHI0
TESTHI1
TESTHI2
TESTHI3
TESTHI4
TESTHI5
TESTHI6
TESTHI7
TESTHI8
TESTHI9
TESTHI10
TESTHI11
TESTHI12
COMP0
COMP1
R323
@0
U26B
AD20
VCCA
AD22
VSSA
AE23
VCCIOPLL
A5
VCCSENSE
A4
VSSSENSE
A10
VCC
A12
VCC
A14
VCC
A16
VCC
A18
VCC
A20
VCC
A8
VCC
AA10
VCC
AA12
VCC
AA14
VCC
AA16
VCC
AA18
VCC
AA8
VCC
AB11
VCC
AB13
VCC
AB15
VCC
AB17
VCC
AB19
VCC
AB7
VCC
AB9
VCC
AC10
VCC
AC12
VCC
AC14
VCC
AC16
VCC
AC18
VCC
AC8
VCC
AD11
VCC
AD13
VCC
AD15
VCC
AD17
VCC
AD19
VCC
AD7
VCC
AD9
VCC
AE10
VCC
AE12
VCC
AE14
VCC
AE16
VCC
AE18
VCC
AE20
VCC
AE6
VCC
AE8
VCC
AF11
VCC
AF13
VCC
AF15
VCC
AF17
VCC
AF19
VCC
AF2
VCC
AF21
VCC
AF5
VCC
AF7
VCC
AD24
TESTHI0
AA2
TESTHI1
AC21
TESTHI2
AC20
TESTHI3
AC24
TESTHI4
AC23
TESTHI5
AA20
TESTHI6
AB22
TESTHI7
U6
TESTHI8
W4
TESTHI9
Y3
TESTHI10
A6
TESTHI11
AD25
TESTHI12
AA21
GTLREF
AA6
GTLREF
F20
GTLREF
F6
GTLREF
L24
COMP0
P1
COMP1
A22
RSVD
A7
RSVD
AD2
RSVD
AD3
RSVD
AE21
RSVD
1 2
AF3
RSVD
AF24
RSVD
AF25
RSVD
mPGA478
1 2
L33
4.7UH_0805
1 2
L32
4.7UH_0805
4 4
TESTHI0
TESTHI1
TESTHI2
TESTHI3
+CPU_VCC
TESTHI8
TESTHI9
TESTHI10
TESTHI11
+CPU_VCC
+CPU_VCC
3 3
R366
49.9_1%_0603
1 2
100_1%_0603
1 2
+CPU_VCC
1 2
2 2
100_1%_0603
1 2
1 1
CPU_GTLREF
R361
R354
49.9_1%_0603
H_GTLREF
R358
1
2
3
4
5
1
2
3
4
5
1 2
1 2
RP55
10P8R-4.7K
RP53
10P8R-4.7K
C411
1UF_0603
C424
1UF_0603
C341 150U_D
1 2
C439
220PF
1 2
C440
220PF
A
B
PLL ANALOG VOLTAGE
Northwood
POWER,
GROUND,
RESERVED
SIGNALS
B
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D10
A11
A13
A15
A17
A19
A21
A24
A26
A3
A9
AA1
AA11
AA13
AA15
AA17
AA19
AA23
AA26
AA4
AA7
AA9
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AB3
AB6
AB8
AC11
AC13
AC15
AC17
AC19
AC2
AC22
AC25
AC5
AC7
AC9
AD1
AD10
AD12
AD14
AD16
AD18
AD21
AD23
AD4
AD8
AE11
AE13
AE15
AE17
AE19
AE22
AE24
AE26
AE7
AE9
AF1
AF10
AF12
AF14
AF16
AF18
AF20
AF6
AF8
B10
B12
B14
B16
B18
B20
B23
B26
B4
B8
C11
C13
C15
C17
C19
C2
C22
C25
C5
C7
C9
D12
D14
D16
D18
D20
D21
D24
D3
+CPU_VCC
1 2
+CPU_VCC
1 2
+CPU_VCC
1 2
+CPU_VCC
1 2
C96
10UF_1206
+CPU_VCC
1 2
C99
10UF_1206
+CPU_VCC
1 2
C105
10UF_1206
+CPU_VCC
1 2
C81
10UF_1206
+CPU_VCC
1 2
C406
10UF_1206
+CPU_VCC
1 2
C380
10UF_1206
+CPU_VCC
+
+CPU_VCC
+
C364
.1UF_X5R
C367
.1UF_X5R
C120
1UF_0603
C470
470U_E
2.5V
C345
470U_E
2.5V
1 2
C365
.1UF_X5R
1 2
C396
.1UF_X5R
1 2
C126
1UF_0603
1 2
C97
10UF_1206
1 2
C158
10UF_1206
1 2
C117
10UF_1206
1 2
C106
10UF_1206
1 2
C413
10UF_1206
1 2
C407
10UF_1206
+
C484
470U_E
2.5V
+
C350
470U_E
2.5V
C
1 2
C366
.1UF_X5R
1 2
C397
.1UF_X5R
1 2
C129
1UF_0603
1 2
C98
10UF_1206
1 2
C159
10UF_1206
1 2
C374
10UF_1206
1 2
C118
10UF_1206
1 2
C428
10UF_1206
1 2
C414
10UF_1206
+
C474
470U_E
2.5V
+
C348
470U_E
2.5V
C
1 2
1 2
1 2
C160
10UF_1206
1 2
C145
10UF_1206
1 2
C135
10UF_1206
1 2
C434
10UF_1206
1 2
C430
10UF_1206
+
+
PROPRIETARY NOTE
1 2
C398
.1UF_X5R
1 2
C121
1UF_0603
1 2
C161
10UF_1206
1 2
C166
10UF_1206
1 2
C155
10UF_1206
1 2
C447
10UF_1206
1 2
C435
10UF_1206
C473
470U_E
2.5V
C347
470U_E
2.5V
+CPU_VCC
C401
.1UF_X5R
C359
1UF_0603
+1.2VP
1 2
+
C494
470U_E
2.5V
C352
1UF_0603
D
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
+
C471
470U_E
2.5V
AF9
B11
B13
B15
B17
B19
B7
B9
C10
C12
C14
C16
C18
C20
C8
D11
D13
D15
D17
D19
D7
D9
E10
E12
E14
E16
E18
E20
E8
F11
F13
F15
F17
F19
F9
AE5
AE4
AE3
AE2
AE1
AF4
Y5
Y25
Y22
Y2
W6
W3
W24
W21
V4
V26
V23
V1
U5
U25
U22
+
C483
470U_E
2.5V
U26C
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VID0
VID1
VID2
VID3
VID4
VCCVID
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
mPGA478
Northwood
POWER, GROUND AND NC
+
C475
330U_E
2.5V
VID[0..4] 44
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C399
.1UF_X5R
C358
1UF_0603
1 2
C64
10UF_1206
1 2
C186
10UF_1206
1 2
C174
10UF_1206
1 2
C449
10UF_1206
1 2
C377
10UF_1206
+
C472
330U_E
2.5V
+
C346
470U_E
2.5V
1 2
1 2
1 2
10UF_1206
1 2
10UF_1206
1 2
10UF_1206
1 2
10UF_1206
1 2
10UF_1206
C400
.1UF_X5R
C360
1UF_0603
C80
C65
C188
C454
C368
+
C495
470U_E
2.5V
+
C349
330U_E
2.5V
1 2
1 2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E
D6
D8
E1
E11
E13
E15
E17
E19
E23
E26
E4
E7
E9
F10
F12
F14
F16
F18
F2
F22
F25
F5
F8
G21
G24
G3
G6
H1
H23
H26
H4
J2
J22
J25
J5
K21
K24
K3
K6
L1
L23
L26
L4
M2
M22
M25
M5
N21
N24
N3
N6
P2
P22
P25
P5
R1
R23
R26
R4
T21
T24
T3
T6
U2
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID[0..4]
RP54
1 8
2 7
3 6
4 5
8P4R-1K
R317 1K
Compal Electronics, Inc.
Title
Pentium 4/Northwood Processor in mPGA478
Size Document Number Rev
B
LA1432
Date: Sheet
星期五
07, 2002
D
六月
54 5 ,
E
of
+3VS
1 2
1.A
A
B
C
D
E
MC-1/3(GTL+,AGP,HUB)
1 2
1 2
R65
10
C151
10PF
AA28
AB25
AB27
AA27
AB26
AB23
AA24
AA25
AB24
AC25
AC24
AC22
AD24
AA23
AG24
AH25
AF22
AC27
AC28
AF27
AF26
AE22
AE23
AA21
AD25
AD26
AD27
1 2
R27
R28
T25
R25
T26
T27
U27
U28
V26
V27
T23
U23
T24
U24
U25
V24
Y27
Y26
Y23
V25
V23
Y25
Y24
W28
W27
W24
W23
W25
R24
R23
P22
AGPREF 13
C141
0.1UF_X5R
U21C
G_AD0
G_AD1
G_AD2
G_AD3
G_AD4
G_AD5
G_AD6
G_AD7
G_AD8
G_AD9
G_AD10
G_AD11
G_AD12
G_AD13
G_AD14
G_AD15
G_AD16
G_AD17
G_AD18
G_AD19
G_AD20
G_AD21
G_AD22
G_AD23
G_AD24
G_AD25
G_AD26
G_AD27
G_AD28
G_AD29
G_AD30
G_AD31
G_C/BE#0
G_C/BE#1
G_C/BE#2
G_C/BE#3
G_FRAME#
G_DEVSEL#
G_IRDY#
G_TRDY#
G_STOP#
G_PAR
G_REQ#
G_GNT#
PIPE#
AD_STB0
AD_STB#0
AD_STB1
AD_STB#1
SB_STB
SB_STB#
RBF#
WBF#
AGPREF
GRCOMP
NC
NC
66IN
BROOKDALE
1 2
AGPREF
C221
0.1UF_X5R
AGP
+1.5VS
+1.8VS
HUB
1 2
R350
1K_1%_0603
1 2
R351
1K_1%_0603
1 2
R207
150_1%_0603
1 2
R206
150_1%_0603
D
TESTIN#
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
HI10
HIREF
HISTB
HISTB#
HLRCOMP
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
RSTIN#
HI0
HI1
HI2
HI3
HI4
HI5
HI6
HI7
HI8
HI9
ST0
ST1
ST2
C90
0.1UF_X5R
C222
1 2
0.01UF
H26
G9
G10
G16
G17
H6
H7
J23
H27
K23
K25
J25
AC18
AC20
AC21
AC23
AC26
AD6
AD8
AD10
AD12
AD14
AD16
AD19
AD22
AE1
AE4
AE18
AE20
AE29
P25
P24
N27
P23
M26
M25
L28
L27
M27
N28
M24
P26
N25
N24
+GMCH_HLCOMP
P27
AH28
AH27
AG28
AG27
AE28
AE27
AE24
AE25
ST0
AG25
ST1
AF24
ST2
AG26
J27
HL[0..10]
HL0
HL1
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
HL10
HUBREF
HL_STB
HL_STB#
C409
0.1UF_X5R
ST0
ST1
GPAR
AD_STB0#
AD_STB1#
SBSTB#
Title
Size Document Number Rev
Date: Sheet
HL[0..10] 20 GC/BE#0 13
HUBREF 20
HL_STB 20
1 2
R56 40.2_1%_0603
R30 2K
R38 @2K
R53 100K
R57 6.8K
R40 6.8K
R26 6.8K
HL_STB# 20
+1.8VS
ST0 13
ST1 13
ST2 13
PCIRST# 13,20,23,24,25,26,27,31,33
1 2
1 2
1 2
1 2
1 2
1 2
Compal Electronics, Inc.
Brookdale-1/3(GTL+,AGP,HUB)
B
LA1432
星期五 六月
GTRDY#
GIRDY#
GDEVSEL#
GSTOP#
GFRAME#
GREQ#
GGNT#
SBSTB
RBF#
PIPE#
WBF#
AD_STB0
AD_STB1
ST1
E
R52 6.8K
R46 6.8K
R54 6.8K
R51 6.8K
R50 6.8K
R28 6.8K
R29 6.8K
R36 @6.8K
R31 6.8K
R22 6.8K
R32 6.8K
R58 @6.8K
R47 @6.8K
R37 @10K
+1.5VS
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1.A
of
64 5 , 07, 2002
HD#[0..63] 4
1 1
2 2
3 3
+CPU_VCC
1 2
4 4
1 2
HD#[0..63] HA#[3..31]
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
DSTBN0# 4
DSTBN1# 4
DSTBN2# 4
DSTBN3# 4
DSTBP0# 4
DSTBP1# 4
DSTBP2# 4
DSTBP3# 4
DBI0# 4
DBI1# 4
DBI2# 4
DBI3# 4
R69
49.9_1%_0603
MCH_GTLREF
R55
100_1%_0603
C87
0.1UF_X5R
U21A
AA2
HD#0
AB5
HD#1
AA5
HD#2
AB3
HD#3
AB4
HD#4
AC5
HD#5
AA3
HD#6
AA6
HD#7
AE3
HD#8
AB7
HD#9
AD7
HD#10
AC7
HD#11
AC6
HD#12
AC3
HD#13
AC8
HD#14
AE2
HD#15
AG5
HD#16
AG2
HD#17
AE8
HD#18
AF6
HD#19
AH2
HD#20
AF3
HD#21
AG3
HD#22
AE5
HD#23
AH7
HD#24
AH3
HD#25
AF4
AG8
AG7
AG6
AF8
AH5
AC11
AC12
AE9
AC9
AE10
AD9
AG9
AC10
AE12
AF10
AG11
AG10
AH11
AG12
AE13
AF12
AG13
AH13
AC14
AF14
AG14
AE14
AG15
AG16
AG17
AH15
AC17
AF16
AE15
AH17
AD17
AE16
AD4
AE6
AE11
AC15
AD3
AE7
AD11
AC16
AD5
AG4
AH9
AD15
A
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#
DBI0#
DBI1#
DBI2#
DBI3#
BROOKDALE
C88
0.1UF_X5R
HOST
C104
0.1UF_X5R
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
RS#0
RS#1
RS#2
ADSTB0#
ADSTB1#
BCLK#
BCLK
CPURST#
HLOCK#
DEFER#
ADS#
BNR#
BPRI#
DBSY#
DRDY#
HIT#
HITM#
HTRDY#
BR0#
RCOMP0
RCOMP1
SWNG0
SWNG1
HVREF
HVREF
HVREF
HVREF
HVREF
C130
0.1UF_X5R
T4
T5
T3
U3
R3
P7
R2
P4
R6
P5
P3
N2
N7
N3
K4
M4
M3
L3
L5
K3
J2
M5
J3
L2
H4
N5
G2
M6
L7
U6
T7
R7
U5
U2
W2
W7
W6
R5
N6
K8
J8
AE17
W5
Y4
V3
W3
Y7
V5
V4
Y5
Y3
U7
V7
AC2
AC13
AA7
AD13
M7
R8
Y8
AB11
AB17
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HREQ#[0..4]
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
RS#0
RS#1
RS#2
RS#[0..2]
RCOMP0
RCOMP1
MCH_GTLREF
HA#[3..31] 4
HREQ#[0..4] 4
RS#[0..2] 4
ADSTB0# 4
ADSTB1# 4
CLK_GHT# 12
CLK_GHT 12
CPURST# 4
HLOCK# 4
DEFER# 4
ADS# 4
BNR# 4
BPRI# 4
DBSY# 4
DRDY# 4
HIT# 4
HITM# 4
HTRDY# 4
BREQ0# 4
R44 22
R45 22
SWNG
B
1 2
1 2
C70
0.1UF_X5R
SWNG
C94
0.1UF_X5R
+CPU_VCC
1 2
R33
300_1%_0603
1 2
R49
150_1%_0603
PROPRIETARY NOTE
GAD[0..31] 13
GC/BE#1 13
GC/BE#2 13
GC/BE#3 13
GFRAME# 13
GDEVSEL# 13
GIRDY# 13
GTRDY# 13
GSTOP# 13
GPAR 13
GREQ# 13
GGNT# 13
PIPE# 13
AD_STB0 13
AD_STB0# 13
AD_STB1 13
AD_STB1# 13
RBF# 13
WBF# 13
CLK_AGP_MCH 12
C71
0.01UF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
GAD[0..31]
GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31
GFRAME#
GDEVSEL#
GIRDY#
GTRDY#
GSTOP#
GPAR
GREQ#
GGNT#
PIPE#
AD_STB0
AD_STB0#
AD_STB1
AD_STB1#
SBSTB
SBSTB#
RBF#
WBF#
AGPREF
R48 40.2_1%_0603
CLK_66M_MCH
1 2
HUBREF
C140
0.1UF_X5R
1 2
GRCOMP
A
B
C
D
E
MCH-2/3(SDRAM)
G28
F27
C28
E28
H25
G27
F25
B28
E27
C27
B25
C25
B27
D27
D26
E25
D24
E23
C22
E21
C24
B23
D22
B21
C21
D20
C19
D18
C20
E19
C18
E17
E13
C12
B11
C10
B13
C13
C11
D10
E10
C9
D8
E8
E11
B9
B7
C7
C6
D6
D4
B3
E6
B5
C4
E5
C3
D3
F4
F3
B2
C2
E2
G5
J28
J9
J21
U21B
SMD0
SMD1
SMD2
SMD3
SMD4
SMD5
SMD6
SMD7
SMD8
SMD9
SMD10
SMD11
SMD12
SMD13
SMD14
SMD15
SMD16
SMD17
SMD18
SMD19
SMD20
SMD21
SMD22
SMD23
SMD24
SMD25
SMD26
SMD27
SMD28
SMD29
SMD30
SMD31
SMD32
SMD33
SMD34
SMD35
SMD36
SMD37
SMD38
SMD39
SMD40
SMD41
SMD42
SMD43
SMD44
SMD45
SMD46
SMD47
SMD48
SMD49
SMD50
SMD51
SMD52
SMD53
SMD54
SMD55
SMD56
SMD57
SMD58
SMD59
SMD60
SMD61
SMD62
SMD63
SRCOMP
SDREF
SDREF
BROOKDALE
DDR_SMA[0..12]
RCVIN#
RCVOUT#
DDR_SMA0 DDR_SDQ0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12
DDR_SBS0
DDR_SBS1
DDR_SRAS#
DDR_SCAS#
DDR_SWE#
DDR_CKE0
DDR_CKE1
DDR_CKE2
DDR_CKE3
DDR_SCS#0
DDR_SCS#1
DDR_SCS#2
DDR_SCS#3
DDR_SDQS0
DDR_SDQS1
DDR_SDQS2
DDR_SDQS3
DDR_SDQS4
DDR_SDQS5
DDR_SDQS6
DDR_SDQS7
DDR_SDQS8
DDR_CB0
DDR_CB1
DDR_CB2
DDR_CB3
DDR_CB4
DDR_CB5
DDR_CB6
DDR_CB7
E12
SMAA0
F17
SMAA1
E16
SMAA2
G18
SMAA3
G19
SMAA4
E18
SMAA5
F19
SMAA6
G21
SMAA7
G20
SMAA8
F21
SMAA9
F13
SMAA10
E20
SMAA11
G22
SMAA12
G12
SBS0
G13
SBS1
E14
SCK0
F15
SCK#0
J24
SCK1
G25
SCK#1
G6
SCK2
G7
SCK#2
G15
SCK3
G14
SCK#3
E24
SCK4
G24
SCK#4
H5
SCK5
F5
SCK#5
F11
SRAS#
G8
SCAS#
G11
SWE#
DDR-MEMORY
G23
SCKE0
E22
SCKE1
H23
SCKE2
F23
SCKE3
E9
SCS#0
F7
SCS#1
F9
SCS#2
E7
SCS#3
F26
SDQS0
C26
SDQS1
C23
SDQS2
B19
SDQS3
D12
SDQS4
C8
SDQS5
C5
SDQS6
E3
SDQS7
E15
SDQS8
C16
SCB0
D16
SCB1
B15
SCB2
C14
SCB3
B17
SCB4
C17
SCB5
C15
SCB6
D14
SCB7
G3
RCVENIN#
RCVENOUT#
H3
1 2
R81 0
DDR_SMA[0..12] 9
DDR_SBS0 9
DDR_SBS1 9
DDR_CLK0 9
DDR_CLK#0 9
DDR_CLK1 9
DDR_CLK#1 9
DDR_CLK2 9
DDR_CLK#2 9
DDR_CLK3 10
DDR_CLK#3 10
DDR_CLK4 10
DDR_CLK#4 10
DDR_CLK5 10
DDR_CLK#5 10
DDR_SRAS# 9
DDR_SCAS# 9
DDR_SWE# 9
DDR_CKE0 9
DDR_CKE1 9
DDR_CKE2 10
DDR_CKE3 10
DDR_SCS#0 9
DDR_SCS#1 9
DDR_SCS#2 10
DDR_SCS#3 10
DDR_SDQS0 9
DDR_SDQS1 9
DDR_SDQS2 9
DDR_SDQS3 9
DDR_SDQS4 9
DDR_SDQS5 9
DDR_SDQS6 9
DDR_SDQS7 9
DDR_SDQS8 9
DDR_CB0 9
DDR_CB1 9
DDR_CB2 9
DDR_CB3 9
DDR_CB4 9
DDR_CB5 9
DDR_CB6 9
DDR_CB7 9
1 2
C187
@47PF
DDR_SDQ[0..63] 9
1 1
2 2
+1.25VS
SDREF
3 3
1 2
R75 0
1 2
C173
0.1UF_X5R
DDR_SDQ[0..63]
DDR_SDQ1
DDR_SDQ2
DDR_SDQ3
DDR_SDQ4
DDR_SDQ5
DDR_SDQ6
DDR_SDQ7
DDR_SDQ8
DDR_SDQ9
DDR_SDQ10
DDR_SDQ11
DDR_SDQ12
DDR_SDQ13
DDR_SDQ14
DDR_SDQ15
DDR_SDQ16
DDR_SDQ17
DDR_SDQ18
DDR_SDQ19
DDR_SDQ20
DDR_SDQ21
DDR_SDQ22
DDR_SDQ23
DDR_SDQ24
DDR_SDQ25
DDR_SDQ26
DDR_SDQ27
DDR_SDQ28
DDR_SDQ29
DDR_SDQ30
DDR_SDQ31
DDR_SDQ32
DDR_SDQ33
DDR_SDQ34
DDR_SDQ35
DDR_SDQ36
DDR_SDQ37
DDR_SDQ38
DDR_SDQ39
DDR_SDQ40
DDR_SDQ41
DDR_SDQ42
DDR_SDQ43
DDR_SDQ44
DDR_SDQ45
DDR_SDQ46
DDR_SDQ47
DDR_SDQ48
DDR_SDQ49
DDR_SDQ50
DDR_SDQ51
DDR_SDQ52
DDR_SDQ53
DDR_SDQ54
DDR_SDQ55
DDR_SDQ56
DDR_SDQ57
DDR_SDQ58
DDR_SDQ59
DDR_SDQ60
DDR_SDQ61
DDR_SDQ62
DDR_SDQ63
SRCOMP
1 2
R80 30.1_1%_0603
1 2
C172
0.1UF_X5R
4 4
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
A
B
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Brookdale-2/3(SDRAM)
Size Document Number Rev
B
LA1432
Date: Sheet
星期五 六月
E
of
74 5 , 07, 2002
1.A
A
B
C
D
E
MCH-3/3(Power)
U21D
W22
W29
AA22
AA26
AB21
AC29
AD21
AD23
AE26
AF23
AG29
AJ25
M22
AB18
AB20
AC19
AD18
AD20
AE19
AE21
AF18
AF20
AG19
AG21
AG23
AJ19
AJ21
AJ23
AB19
AB22
AF21
AF25
AG1
AG18
AG20
AG22
AH19
AH21
AH23
AJ27
AJ17
R22
R29
U22
U26
N14
N16
P13
P15
P17
R14
R16
T15
U14
U16
L25
L29
N23
N26
A13
A17
A21
A25
C29
D11
D15
D19
D23
D25
F10
F14
F18
F22
G29
H10
H12
H14
H16
H18
H20
H22
H24
K22
K24
K26
L23
AA9
AB8
AC1
AC4
AJ3
AJ5
AJ7
A5
A9
C1
D7
F6
G1
G4
H8
J5
J7
K6
M8
U8
BROOKDALE
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VCCHA1
VCCGA1
VSSHA2
VSSGA2
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
POWER/GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
B
+1.5VS +1.5VS
1 1
+1.8VS
+2.5V
2 2
3 3
+CPU_VCC
4 4
A
T13
T17
U13
U17
A3
A7
A11
A15
A19
A23
A27
D5
D9
D13
D17
D21
E1
E4
E26
E29
F8
F12
F16
F20
F24
G26
H9
H11
H13
H15
H17
H19
H21
J1
J4
J6
J22
J26
J29
K5
K7
K27
L1
L4
L6
L8
L22
L24
L26
M23
N1
N4
N8
N13
N15
N17
N22
N29
P6
P8
P14
P16
R1
R4
R13
R15
R17
R26
T6
T8
T14
T16
T22
U1
U4
U15
U29
V6
V8
V22
W1
W4
W8
W26
Y6
Y22
AA1
AA4
AA8
AA29
AB6
AB9
AB10
AB12
AB13
AB14
AB15
AB16
AF5
AF7
AF9
AF11
AF13
AF15
AF17
AF19
AJ9
AJ11
AJ13
AJ15
VCCA0
VCCA1
VSSA0
VSSA1
+
+
C127 33U_D
C131 33U_D
PROPRIETARY NOTE
L13
4.7UH_0805
1 2
1 2
L14
4.7UH_0805
+1.8VS
+
C144
22UF_10V_1206
+CPU_VCC
C33
+
22UF_10V_1206
+2.5V
1 2
C185
+
150UF_E
6.3V
+1.5VS
1 2
C49
+
150UF_E
6.3V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C189
4.7UF_0805
C46
+
22UF_10V_1206
C
+1.5VS
C138
.1UF_X5R
C57
.1UF_X5R
C152
.1UF_X5R
C53
.1UF_X5R
C164
.1UF_X5R
C66
.1UF_X5R
C156
.1UF_X5R
C76
.1UF_X5R
C169
.1UF_X5R
C115
.1UF_X5R
C139
.1UF_X5R
C86
.1UF_X5R
C170
.1UF_X5R
C128
.1UF_X5R
C157
.1UF_X5R
C75
.1UF_X5R
C163
.1UF_X5R
C143
.1UF_X5R
C114
.1UF_X5R
C171
.1UF_X5R
C113
.1UF_X5R
D
C150
.1UF_X5R
C168
.1UF_X5R
C69
.1UF_X5R
C89
.1UF_X5R
C167
.1UF_X5R
C119
.1UF_X5R
C193
C194
.1UF_X5R
.1UF_X5R
C77
.1UF_X5R
Compal Electronics, Inc.
Title
Brookdale-3/3(Power)
Size Document Number Rev
B
LA1432
Date: Sheet
星期五 六月
C195
.1UF_X5R
C198
.1UF_X5R
E
C197
.1UF_X5R
84 5 , 07, 2002
C196
.1UF_X5R
of
1.A
A
DDR_SDQ0
DDR_SDQ4
DDR_SDQ1
DDR_SDQ5
DDR_SDQS0
1 1
Layout note
Place these resistor
closely DIMM0,
all trace length<750mil
2 2
3 3
DDR_SDQ[0..63] 7
DDR_SDQS[0..8] 7
4 4
A
DDR_SDQ6
DDR_SDQ8
DDR_SDQ7
DDR_SDQ2
DDR_SDQ3
DDR_SDQ15
DDR_SDQS1
DDR_SDQ12
DDR_SDQ13
DDR_SDQ16
DDR_SDQ20
DDR_SDQ14
DDR_SDQ9
DDR_SDQ11
DDR_SDQ10
DDR_SDQ21
DDR_SDQ17
DDR_SDQ19
DDR_SDQ18
DDR_SDQ22
DDR_SDQS2
DDR_SDQ25
DDR_SDQ28
DDR_SDQ24
DDR_SDQ23
DDR_SDQS3
DDR_SDQ29
DDR_SDQ[0..63]
DDR_CB[0..7] 7
DDR_CB[0..7]
DDR_SDQS[0..8]
DDR_SDQ60
DDR_SDQ50
DDR_SDQ56
DDR_SDQ58
DDR_SDQ61
DDR_SDQ57
DDR_SDQ62
DDR_SDQS7
DDR_SDQ59 DDR_DQ59
DDR_SDQ63 DDR_DQ63
1 2
R434 22
1 2
R197 22
1 2
R433 22
1 2
R196 22
1 2
R195 22
1 2
R435 22
1 2
R437 22
1 2
R193 22
1 2
R436 22
1 2
R194 22
1 2
R440 22
1 2
R190 22
1 2
R438 22
1 2
R192 22
1 2
R187 22
1 2
R441 22
1 2
R439 22
1 2
R191 22
1 2
R188 22
1 2
R189 22
1 2
R186 22
1 2
R442 22
1 2
R444 22
1 2
R184 22
1 2
R443 22
1 2
R185 22
1 2
R446 22
1 2
R182 22
1 2
R445 22
1 2
R183 22
1 2
R180 22
1 2
R181 22
1 2
R474 22
1 2
R149 22
1 2
R475 22
1 2
R148 22
1 2
R476 22
1 2
R147 22
1 2
R145 22
1 2
R146 22
1 2
R144 22
1 2
R477 22
B
B
DDR_DQ0
DDR_DQ4
DDR_DQ1
DDR_DQ5
DDR_DQS0
DDR_DQ6
DDR_DQ8
DDR_DQ7
DDR_DQ2
DDR_DQ3
DDR_DQ15
DDR_DQS1
DDR_DQ12
DDR_DQ13
DDR_DQ16
DDR_DQ20
DDR_DQ14
DDR_DQ9
DDR_DQ11
DDR_DQ10
DDR_DQ21
DDR_DQ17
DDR_DQ19
DDR_DQ18
DDR_DQ22
DDR_DQS2
DDR_DQ25
DDR_DQ28
DDR_DQ24
DDR_DQ23
DDR_DQS3
DDR_DQ29
DDR_DQ60
DDR_DQ50
DDR_DQ56
DDR_DQ58
DDR_DQ61
DDR_DQ57
DDR_DQ62
DDR_DQS7
DDR_SDQ30
DDR_SDQ26
DDR_SDQ31
DDR_SDQ27
DDR_CB7
DDR_CB6
DDR_CB5
DDR_CB4
DDR_CB0
DDR_CB1
DDR_CB2
DDR_SDQS8
DDR_CB3
DDR_SDQ36
DDR_SDQ32
DDR_SDQS4
DDR_SDQ37
DDR_SDQ34
DDR_SDQ33
DDR_SDQ39
DDR_SDQ38
DDR_SDQ44
DDR_SDQ35
DDR_SDQS5
DDR_SDQ40
DDR_SDQ41
DDR_SDQ45
DDR_SDQ46
DDR_SDQ42
DDR_SDQ43
DDR_SDQ47
DDR_SDQ49
DDR_SDQ48
DDR_SDQS6
DDR_SDQ53
DDR_SDQ54
DDR_SDQ52
DDR_SDQ51
DDR_SDQ55
C
1 2
R179 22
1 2
R447 22
1 2
R178 22
1 2
R448 22
1 2
R452 22
1 2
R174 22
1 2
R177 22
1 2
R449 22
1 2
R176 22
1 2
R450 22
1 2
R451 22
1 2
R175 22
1 2
R173 22
1 2
R162 22
1 2
R163 22
1 2
R161 22
1 2
R462 22
1 2
R160 22
1 2
R463 22
1 2
R159 22
1 2
R464 22
1 2
R158 22
1 2
R465 22
1 2
R156 22
1 2
R467 22
1 2
R157 22
1 2
R466 22
1 2
R468 22
1 2
R155 22
1 2
R469 22
1 2
R154 22
1 2
R470 22
1 2
R153 22
1 2
R151 22
1 2
R152 22
1 2
R472 22
1 2
R471 22
1 2
R473 22
1 2
R150 22
C
DDR_DQ30
DDR_DQ26
DDR_DQ31
DDR_DQ27
DDR_F_CB7
DDR_F_CB6
DDR_F_CB5
DDR_F_CB4
DDR_F_CB0
DDR_F_CB1
DDR_F_CB2
DDR_DQS8
DDR_F_CB3
DDR_DQ36
DDR_DQ32
DDR_DQS4
DDR_DQ37
DDR_DQ34
DDR_DQ33
DDR_DQ39
DDR_DQ38
DDR_DQ44
DDR_DQ35
DDR_DQS5
DDR_DQ40
DDR_DQ41
DDR_DQ45
DDR_DQ46
DDR_DQ42
DDR_DQ43
DDR_DQ47
DDR_DQ49
DDR_DQ48
DDR_DQS6
DDR_DQ53
DDR_DQ54
DDR_DQ52
DDR_DQ51
DDR_DQ55
PROPRIETARY NOTE
D
DDR_DQ5
DDR_DQ4
DDR_DQS0
DDR_DQ3
DDR_DQ7
DDR_DQ13
DDR_DQ9
DDR_DQS1
DDR_DQ10
DDR_DQ11
DDR_CLK1 7
DDR_CLK#1 7
DDR_DQ16
DDR_DQ21
DDR_DQS2
DDR_DQ18
DDR_DQ23
DDR_DQ28
DDR_DQ29
DDR_DQS3
DDR_DQ30
DDR_DQ31
DDR_F_CB5
DDR_F_CB0
DDR_DQS8
DDR_F_CB6
DDR_F_CB3 DDR_F_CB7
DDR_CLK0 7
DDR_CLK#0 7
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
DDR_CKE1 DDR_CKE0
DDR_F_SMA12
DDR_F_SMA9
DDR_F_SMA7
DDR_F_SMA5
DDR_F_SMA3
DDR_F_SMA1
DDR_F_SMA10
DDR_F_SBS0
DDR_F_SWE#
DDR_SCS#0 DDR_SCS#1
DDR_DQ32 DDR_DQ37
DDR_DQ36 DDR_DQ33
DDR_DQS4
DDR_DQ34
DDR_DQ39
DDR_DQ44 DDR_DQ45
DDR_DQS5
DDR_DQ42 DDR_DQ46
DDR_DQ48
DDR_DQ53
DDR_DQS6
DDR_DQ50 DDR_DQ51
DDR_DQ58
DDR_DQ57
DDR_DQS7
DDR_DQ62
DDR_DQ59
SMB_DATA 10,12,21
SMB_CLK 10,12,21
+3VS
E
+2.5V +2.5V
JP17
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
DDR-SODIMM_200_Normal
DU/RESET#
VREF
VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14
DQ15
VDD
VDD
VSS
VSS
DQ20
DQ21
VDD
DM2
DQ22
VSS
DQ23
DQ28
VDD
DQ29
DM3
VSS
DQ30
DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
VSS
VSS
VDD
VDD
CKE0
DU/BA2
VSS
VDD
BA1
RAS#
CAS#
VSS
DQ36
DQ37
VDD
DM4
DQ38
VSS
DQ39
DQ44
VDD
DQ45
DM5
VSS
DQ46
DQ47
VDD
CK1#
CK1
VSS
DQ52
DQ53
VDD
DM6
DQ54
VSS
DQ55
DQ60
VDD
DQ61
DM7
VSS
DQ62
DQ63
VDD
SA0
SA1
SA2
F
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
A11
102
A8
104
106
A6
108
A4
110
A2
112
A0
114
116
118
120
122
S1#
124
DU
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
DU
DIMM0
Bottom side
E
F
DDR_DQ1
DDR_DQ0
DDR_DQ6
DDR_DQ2
DDR_DQ8
DDR_DQ12
DDR_DQ14
DDR_DQ15
DDR_DQ20
DDR_DQ17
DDR_DQ22
DDR_DQ19
DDR_DQ24
DDR_DQ25
DDR_DQ26
DDR_DQ27
DDR_F_CB4
DDR_F_CB1
DDR_F_CB2
DDR_F_SMA11
DDR_F_SMA8
DDR_F_SMA6
DDR_F_SMA4
DDR_F_SMA2
DDR_F_SMA0
DDR_F_SBS1
DDR_F_SRAS#
DDR_F_SCAS#
DDR_DQ38
DDR_DQ35
DDR_DQ40 DDR_DQ41
DDR_DQ43 DDR_DQ47
DDR_DQ49
DDR_DQ52
DDR_DQ54 DDR_DQ55
DDR_DQ60
DDR_DQ56
DDR_DQ61
DDR_DQ63
DDR_SWE# 7
DDR_SBS0 7
DDR_SCAS# 7
DDR_SRAS# 7
DDR_SBS1 7
SDREF_DIMM
1 2
C571
.1UF_X5R
G
R497
DDR_DQ[0..63]
DDR_F_CB[0..7]
DDR_DQS[0..8]
1 2
0
SDREF
DDR_SMA[0..12] 7
DDR_SMA9
DDR_SMA12
DDR_SMA6
DDR_SMA8
DDR_SMA11
DDR_SMA7
DDR_SMA5
DDR_SMA4
DDR_SMA1
DDR_SMA3
DDR_SMA10
DDR_SMA2
DDR_SMA0
DDR_F_SMA[0..12] 10
DDR_DQ[0..63] 10
DDR_F_CB[0..7] 10
DDR_DQS[0..8] 10
1 2
R171 10
1 2
R172 10
1 2
R455 10
1 2
R454 10
1 2
R453 10
1 2
R170 10
1 2
R169 10
1 2
R456 10
1 2
R167 10
1 2
R168 10
1 2
R166 10
1 2
R457 10
R458 10
1 2
H
DDR_SMA[0..12]
DDR_F_SMA9
DDR_F_SMA12
DDR_F_SMA6
DDR_F_SMA8
DDR_F_SMA11
DDR_F_SMA7
DDR_F_SMA5
DDR_F_SMA4
DDR_F_SMA1
DDR_F_SMA3
DDR_F_SMA10
DDR_F_SMA2
DDR_F_SMA0
DDR_F_SMA[0..12]
Layout note
DDR_CKE0 7 DDR_CKE1 7
Place these resistor
closely DIMM0,
all trace length<=750mil
Layout note
Place these resistor
closely DIMM0,
DDR_SCS#1 7 DDR_SCS#0 7
DDR_CLK#2 7
DDR_CLK2 7
all trace length Max=1.3"
+1.25VS
RP12 4P2R_56
DDR_CKE1
1 4
DDR_CKE0
2 3
RP11 4P2R_56
DDR_SCS#0
1 4
DDR_SCS#1
2 3
Layout note
Place these resistor
closely DIMM0,
all trace length<=750mil
DDR_SWE# DDR_F_ SW E#
1 2
R164 10
DDR_SBS0
R165 10
DDR_SCAS#
R461 10
DDR_SRAS#
R460 10
R459 10
DDR_SBS1
Title
Size Document Number Rev
B
LA1432
Date: Sheet
星期五 六月
G
DDR_F_SBS0
1 2
DDR_F_SCAS#
1 2
DDR_F_SRAS#
1 2
DDR_F_SBS1
1 2
Compal Electronics, Inc.
DDR-SODIMM SLOT1
DDR_F_SWE# 10
DDR_F_SBS0 10
DDR_F_SCAS# 10
DDR_F_SRAS# 10
DDR_F_SBS1 10
of
94 5 , 07, 2002
H
1.A
A
+1.25VS +1.25VS
RP96 4P2R_56
DDR_DQ4
1 4
DDR_DQ5
2 3
RP97 4P2R_56
DDR_DQ3
1 4
DDR_DQS0
2 3
DDR_DQ1
DDR_DQ0
DDR_DQ13
DDR_DQ7
DDR_DQS1
DDR_DQ9
DDR_DQ6
DDR_DQ2
DDR_DQ11
DDR_DQ10
DDR_DQ14
DDR_DQ15
DDR_DQ8
DDR_DQ12
DDR_DQ17
DDR_DQ20
DDR_DQ21
DDR_DQ16
DDR_DQ31
DDR_DQ30
DDR_DQ22
DDR_DQ19
DDR_DQ18
DDR_DQS2
DDR_DQS3
DDR_DQ29
DDR_DQ28
DDR_DQ23
RP40 4P2R_56
1 4
2 3
RP98 4P2R_56
1 4
2 3
RP99 4P2R_56
1 4
2 3
RP39 4P2R_56
1 4
2 3
RP100 4P2R_56
1 4
2 3
RP37 4P2R_56
1 4
2 3
RP38 4P2R_56
1 4
2 3
RP36 4P2R_56
1 4
2 3
RP101 4P2R_56
1 4
2 3
RP105 4P2R_56
1 4
2 3
RP35 4P2R_56
1 4
2 3
RP102 4P2R_56
1 4
2 3
RP104 4P2R_56
1 4
2 3
RP103 4P2R_56
1 4
2 3
1 1
2 2
3 3
RP34 4P2R_56
1 4
2 3
RP32 4P2R_56
1 4
2 3
RP106 4P2R_56
1 4
2 3
RP107 4P2R_56
1 4
2 3
RP33 4P2R_56
1 4
2 3
RP31 4P2R_56
1 4
2 3
RP108 4P2R_56
1 4
2 3
RP28 4P2R_56
1 4
2 3
RP30 4P2R_56
1 4
2 3
RP27 4P2R_56
1 4
2 3
RP111 4P2R_56
1 4
2 3
RP29 4P2R_56
1 4
2 3
RP112 4P2R_56
1 4
2 3
RP113 4P2R_56
1 4
2 3
RP114 4P2R_56
1 4
2 3
RP115 4P2R_56
1 4
2 3
DDR_DQ24
DDR_DQ25
DDR_DQ26
DDR_DQ27
DDR_F_CB0
DDR_F_CB5
DDR_F_CB6
DDR_DQS8
DDR_F_CB4
DDR_F_CB1
DDR_F_CB2
DDR_F_CB7
DDR_F_CB3
DDR_DQ45
DDR_DQ40
DDR_DQ37
DDR_DQ33
DDR_DQ46
DDR_DQ43
DDR_DQ36
DDR_DQ32
DDR_DQ38
DDR_DQ35
DDR_DQ34
DDR_DQS4
DDR_DQ44
DDR_DQ39
DDR_DQS5
DDR_DQ41
DDR_DQ47
DDR_DQ42
Layout note
Place these resistor
closely DIMM1,
all trace
length<=800mil
4 4
RP26 4P2R_56
DDR_DQ49
1 4
DDR_DQ52
2 3
RP116 4P2R_56
DDR_DQ53
1 4
DDR_DQ48
2 3
RP117 4P2R_56
DDR_DQ55
1 4
DDR_DQS6
2 3
RP25 4P2R_56
DDR_DQ54
1 4
DDR_DQ51
2 3
RP118 4P2R_56
DDR_DQ58
1 4
DDR_DQ50
2 3
RP24 4P2R_56
DDR_DQ60
1 4
DDR_DQ56
2 3
RP119 4P2R_56
DDR_DQS7
1 4
DDR_DQ57
2 3
RP120 4P2R_56
DDR_DQ59
1 4
DDR_DQ62
2 3
RP23 4P2R_56
DDR_DQ61
1 4
DDR_DQ63
2 3
For EC Tools
1
2
3
4
5
6
+5VALW
EC_URXD/KSO16
EC_UTXD/KSO17
EC_USCLK
JP20
@ FCI SFW06R-2ST E1
B
EC_URXD/KSO16 33
EC_UTXD/KSO17 33,35
EN_USCLK 33
DDR_F_CB[0..7]
DDR_DQS[0..8]
DDR_DQ[0..63]
DDR_F_SMA[0..12]
DDR_F_CB[0..7] 9
DDR_DQS[0..8] 9
DDR_DQ[0..63] 9
DDR_F_SMA[0..12] 9
C
DDR_CLK4 7
DDR_CLK#4 7
DDR_CLK3 7
DDR_CLK#3 7
DDR_F_SBS0 9
DDR_F_SWE# 9
SMB_DATA 9,12,21
SMB_CLK 9,12,21
+2.5V +2.5V
JP18
1
VREF
3
DDR_DQ5
DDR_DQ4
DDR_DQS0
DDR_DQ3
DDR_DQ7
DDR_DQ13
DDR_DQ9
DDR_DQS1
DDR_DQ10
DDR_DQ11
DDR_DQ16
DDR_DQ21
DDR_DQS2
DDR_DQ18
DDR_DQ23
DDR_DQ28
DDR_DQ29
DDR_DQS3
DDR_DQ30
DDR_DQ31
DDR_F_CB5
DDR_F_CB0
DDR_DQS8
DDR_F_CB6
DDR_F_CB3
DDR_CKE3 DDR_CKE2
DDR_F_SMA12
DDR_F_SMA9
DDR_F_SMA7
DDR_F_SMA5
DDR_F_SMA3
DDR_F_SMA1
DDR_F_SMA10
DDR_F_SBS0
DDR_F_SWE#
DDR_SCS#2 DDR_SCS#3
DDR_DQ32
DDR_DQ36
DDR_DQS4
DDR_DQ34
DDR_DQ39
DDR_DQ44
DDR_DQ41
DDR_DQS5
DDR_DQ42
DDR_DQ47
DDR_DQ48
DDR_DQ53
DDR_DQS6
DDR_DQ55
DDR_DQ50
DDR_DQ58
DDR_DQ57
DDR_DQS7
DDR_DQ62
DDR_DQ59
+3VS
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
DDR-SODIMM_200_Reverse
DIMM1
D
DU/RESET#
DU/BA2
VREF
DQ4
DQ5
VDD
DM0
DQ6
DQ7
DQ12
VDD
DQ13
DM1
DQ14
DQ15
VDD
VDD
DQ20
DQ21
VDD
DM2
DQ22
DQ23
DQ28
VDD
DQ29
DM3
DQ30
DQ31
VDD
DM8
VDD
VDD
VDD
CKE0
VDD
RAS#
CAS#
DQ36
DQ37
VDD
DM4
DQ38
DQ39
DQ44
VDD
DQ45
DM5
DQ46
DQ47
VDD
CK1#
DQ52
DQ53
VDD
DM6
DQ54
DQ55
DQ60
VDD
DQ61
DM7
DQ62
DQ63
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
CB4
CB5
VSS
CB6
CB7
VSS
VSS
A11
VSS
BA1
S1#
VSS
VSS
VSS
CK1
VSS
VSS
VSS
SA0
SA1
SA2
E
SDREF_DIMM
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
A8
104
106
A6
108
A4
110
A2
112
A0
114
116
118
120
122
124
DU
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
DU
DDR_DQ1
DDR_DQ0
DDR_DQ6
DDR_DQ2
DDR_DQ8
DDR_DQ12
DDR_DQ14
DDR_DQ15
DDR_DQ20
DDR_DQ17
DDR_DQ22
DDR_DQ19
DDR_DQ24
DDR_DQ25
DDR_DQ26
DDR_DQ27
DDR_F_CB4
DDR_F_CB1
DDR_F_CB2
DDR_F_CB7
DDR_F_SMA11
DDR_F_SMA8
DDR_F_SMA6
DDR_F_SMA4
DDR_F_SMA2
DDR_F_SMA0
DDR_F_SBS1
DDR_F_SRAS#
DDR_F_SCAS#
DDR_DQ37
DDR_DQ33
DDR_DQ38
DDR_DQ35
DDR_DQ45
DDR_DQ40
DDR_DQ46
DDR_DQ43
DDR_DQ49
DDR_DQ52
DDR_DQ54
DDR_DQ51
DDR_DQ60
DDR_DQ56
DDR_DQ61
DDR_DQ63
+3VS
1 2
C616
.1UF_X5R
DDR_CKE2 7 DDR_CKE3 7
DDR_F_SBS1 9
DDR_F_SRAS# 9
DDR_F_SCAS# 9
DDR_SCS#3 7 DDR_SCS#2 7
DDR_CLK#5 7
DDR_CLK5 7
+1.25VS
RP93 4P2R_56
DDR_F_SMA9
1 4
DDR_F_SMA12
2 3
RP19 4P2R_56
DDR_F_SMA11
1 4
DDR_F_SMA8
2 3
RP94 4P2R_56
DDR_F_SMA5
1 4
DDR_F_SMA7
2 3
RP18 4P2R_56
DDR_F_SMA6
1 4
DDR_F_SMA4
2 3
RP95 4P2R_56
DDR_F_SMA1
1 4
DDR_F_SMA3
2 3
RP17 4P2R_56
DDR_F_SMA2
1 4
DDR_F_SMA0
2 3
R525 56
R224 56
DDR_CKE2
DDR_CKE3
DDR_SCS#2
DDR_SCS#3
1 2
RP109 4P2R_56
1 4
2 3
RP16 4P2R_56
1 4
2 3
1 2
RP22 4P2R_56
1 4
2 3
RP110 4P2R_56
1 4
2 3
DDR_F_SMA10
DDR_F_SWE#
DDR_F_SBS0
DDR_F_SRAS#
DDR_F_SCAS#
DDR_F_SBS1
Layout note
Place these resistor
closely DIMM0,
all trace length
Max=1.3"
+1.25VS
Top side
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
A
B
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Title
Size Document Number Rev
B
Date: Sheet
Compal Electronics, Inc.
DDR-SODIMM SLOT1
LA1432
星期五 六月
1.A
of
10 45 , 07, 2002
E
A
B
C
D
E
Layout note :
Distribute as close as possible
to DDR-SODIMM.
+2.5V
1 1
1 2
C232
.1UF_X5R
+2.5V +2.5V
1 2
C244
.1UF_X5R
1 2
C242
.1UF_X5R
1 2
C236
.1UF_X5R
1 2
C239
.1UF_X5R
1 2
C245
.1UF_X5R
1 2
C243
.1UF_X5R
1 2
C246
.1UF_X5R
1 2
C233
.1UF_X5R
1 2
C237
.1UF_X5R
1 2
C247
.1UF_X5R
1 2
C241
.1UF_X5R
1 2
C238
.1UF_X5R
1 2
C593
+
150UF_D2_6.3V
1 2
C234
.1UF_X5R
1 2
C606
+
150UF_D2_6.3V
1 2
C240
.1UF_X5R
1 2
C235
.1UF_X5R
Layout note :
Place one cap close to every 2 pull up resistors termination to
+1.25V
2 2
+1.25VS
1 2
+1.25VS
1 2
C279
.1UF_X5R
C630
.1UF_X5R
1 2
C638
.1UF_X5R
1 2
C263
.1UF_X5R
1 2
C278
.1UF_X5R
1 2
C631
.1UF_X5R
1 2
C639
.1UF_X5R
1 2
C643
.1UF_X5R
1 2
C277
.1UF_X5R
1 2
C275
.1UF_X5R
1 2
C640
.1UF_X5R
1 2
C644
.1UF_X5R
1 2
C276
.1UF_X5R
1 2
C645
.1UF_X5R
1 2
C641
.1UF_X5R
1 2
C274
.1UF_X5R
1 2
C642
.1UF_X5R
1 2
C646
.1UF_X5R
1 2
C629
.1UF_X5R
1 2
C647
.1UF_X5R
+1.25VS
1 2
C273
+1.25VS
1 2
+1.25VS
1 2
+1.25VS
1 2
.1UF_X5R
C627
.1UF_X5R
C654
.1UF_X5R
C264
.1UF_X5R
3 3
4 4
1 2
C648
.1UF_X5R
1 2
C628
.1UF_X5R
1 2
C268
.1UF_X5R
1 2
C658
.1UF_X5R
A
1 2
C272
.1UF_X5R
1 2
C635
.1UF_X5R
1 2
C659
.1UF_X5R
1 2
C634
.1UF_X5R
1 2
C649
.1UF_X5R
1 2
C636
.1UF_X5R
1 2
C267
.1UF_X5R
1 2
C270
.1UF_X5R
1 2
C262
.1UF_X5R
1 2
C637
.1UF_X5R
1 2
C660
.1UF_X5R
1 2
C650
.1UF_X5R
1 2
C651
.1UF_X5R
1 2
C280
.1UF_X5R
B
1 2
C632
.1UF_X5R
1 2
C652
.1UF_X5R
1 2
C655
.1UF_X5R
1 2
C633
.1UF_X5R
1 2
C271
.1UF_X5R
1 2
C266
.1UF_X5R
PROPRIETARY NOTE
1 2
C261
.1UF_X5R
1 2
C653
.1UF_X5R
1 2
C656
.1UF_X5R
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
1 2
C657
.1UF_X5R
1 2
C269
.1UF_X5R
1 2
C265
.1UF_X5R
D
Title
Size Document Number Rev
B
Date: Sheet
Compal Electronics, Inc.
DDR SODIMM Decoupling
LA1432
星期五 六月
of
11 45 , 07, 2002
E
1.A
A
B
C
D
E
F
G
H
+3VS
SEL0 SEL1 Function
00
01
10
1 1
11
66Mhz Host CLK
100Mhz Host CLK
200Mhz Host CLK
133Mhz Host CLK
L17
BLM21A601SPT
1 2
L16
BLM21A601SPT
1 2
Place Crystal within 500 mils of CK_Titan
Y1
14.318MHZ
2
3
40
55
54
25
34
53
28
43
29
30
33
35
42
39
38
56
+3VS +3VS
1 2
1 2
R93
R92
1K
@1K
H_BSEL0 4
H_BSEL1 4
2 2
Host Swing Select
MULT0 Reference R,
Iref=
VDD/(3*Rr)
Rr = 221 1%,
0
Iref =5.00mA
Rr = 475 1%,
1
Iref =2.32mA
1 2
R91 @0
Output
Current
Ioh = 4 * Iref
Ioh = 6 * Iref
1 2
1 2
R99
@1K
1 2
R100
1K
CK408_PWRGD# 42
+3VS
SMB_DATA 9,10,21
SMB_CLK 9,10,21
R98
1K
Please closely pin42
R409 475_1%_0603
CLK_ICH48 21
3 3
CLK_ICH14 21
CLK_14M_SIO 31
R102 22
R107 33
R108 33
1 2
C208 @10P
caps are internal
to CK_TITAN
1 2
C214 @10P
H_BSEL2
H_BSEL0
BSEL0
1 2
+3VS
R101 1K
R89 10K
1 2
R88 @10K
1 2
SMB_DATA
SMB_CLK
1 2
1 2
1 2
1 2
1 2
CLK_ICH48M
CLK_ICH14M
or W320-04
U7
XTAL_IN
XTAL_OUT
SEL2
SEL1
SEL0
PWR_DWN#
PCI_STOP#
CPU_STOP#
VTT_PWRGD#
MULT0
SDATA
SCLK
3V66_0/DRCG
3V66_1/VCH_CLK
IREF
48MHZ_USB
48MHZ_DOT
REF
ICS 9508-05
+3V_CLK
Width=40 mils
32
14
1
VDD_PCI8VDD_PCI
VDD_REF
VDD_3V6619VDD_3V66
GND_REF4GND_PCI9GND_PCI15GND_3V6620GND_3V6631GND_48MHZ
1 2
+
C200
22UF_10V_1206
37
50
VDD_CORE
VDD_CPU46VDD_CPU
VDD_48MHZ
GND_CORE
CPUCLKT2
CPU_CLKC2
CPUCLKT1
CPUCLKC1
CPUCLKT0
CPUCLKC0
66MHZ_IN/3V66_5
66MHZ_OUT2/3V66_4
66MHZ_OUT1/3V66_3
66MHZ_OUT0/3V66_2
PCICLK_F2
PCICLK_F1
PCICLK_F0
PCICLK6
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK0
GND_IREF41GND_CPU
36
47
1 2
C201
.1UF_X5R
26
27
45
44
49
48
52
51
24
23
22
21
7
6
5
18
17
16
13
12
11
10
1 2
C202
.1UF_X5R
+3VS_CLKVDD
1 2
C209
.1UF_X5R
CLK66MCH
CLK66AGP
CLKICHHUB
CLKPCI_F2
CLKPCI_EC
CLKPCI_1394
CLKPCI_MINI
CLKPCI_SIO
CLKPCI_CB
CLKPCI_LAN
1 2
C204
.1UF_X5R
1 2
C213
10UF_10V_1206
CLK_BCLK
CLK_BCLK#
CLK_HT
CLK_HT#
R112 33
1 2
R117 33
1 2
R114 33
1 2
R118 33
1 2
R113 33
R121 33
R120 22
R116 33
R119 33
R115 33
L18
BLM21A601SPT
1 2
1 2
R105 33
1 2
R106 33
1 2
R103 33
1 2
R104 33
1 2
1 2
1 2
1 2
1 2
1 2
1 2
C206
.1UF_X5R
+3VS
1 2
C211
.1UF_X5R
1 2
C212
.1UF_X5R
+3VS_VDD48M
1 2
C203
.1UF_X5R
1 2
R96 49.9_1%_0603
1 2
R97 49.9_1%_0603
1 2
R94 49.9_1%_0603
1 2
R95 49.9_1%_0603
1 2
C531
10PF
1 2
C210
.1UF_X5R
L15
1 2
*BLM21A601SPT
1 2
C199
10UF_10V_1206
10_0805
+3VS
CLK_HCLK 4
Place resistor near R184,R185 ;Trace
<=400mils
CLK_HCLK# 4
CLK_GHT 6
Place resistor near R182,R183 ;Trace
<=400mils
CLK_GHT# 6
CLK_AGP_MCH 6
CLK_AGP 13
CLK_ICHHUB 21
CLK_ICHPCI 20
CLK_PCI_EC 33
CLK_PCI_1394 25
CLK_PCI_MINI 27
CLK_PCI_SIO 31
CLK_PCI_CB 23
CLK_PCI_LAN 26
Note:
CPU_CLK[2:0] needs to be running in C3, C4.
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
A
B
C
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
E
F
Title
Size Document Number Rev
B
Date: Sheet
Compal Electronics, Inc.
LA1432
星期五 六月
G
Clock Generator
1.A
of
12 45 , 07, 2002
H
5
GAD[0..31] 6
GC/BE#[0..3] 6
ST0 6
ST1 6
D D
C C
B B
A A
AGPREF
1 2
C61
.1UF_X5R
+3VS
1 2
R42 10K
1 2
R41 10K
CLK_AGP
STP_AGP#
AGP_BUSY#
1 2
R21
10
1 2
C56
10PF
5
ST2 6
AD_STB0 6
AD_STB0# 6
AD_STB1 6
AD_STB1# 6
PIPE# 6
RBF# 6
AGPREF 6
WBF# 6
CLK_AGP 12
GDEVSEL# 6
GFRAME# 6
GGNT# 6
PIRQA# 20,23,25
GIRDY# 6
GPAR 6
GREQ# 6
PCIRST# 6,20,23,24,25,26,27,31,33
GSTOP# 6
GTRDY# 6
4
GAD[0..31]
GC/BE#[0..3]
ST0
ST1
ST2
AD_STB0
AD_STB0#
AD_STB1
AD_STB1#
AGP_BUSY#
PIPE#
RBF#
STP_AGP#
AGPREF
WBF#
GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31
GC/BE#0
GC/BE#1
GC/BE#2
GC/BE#3
CLK_AGP
GDEVSEL#
GFRAME#
GGNT#
PIRQA
GIRDY#
GPAR#
GREQ#
PCIRST#
GSTOP#
GTRDY#
4
AJ13
AH14
AJ14
AJ28
AF24
AK20
AH19
AF15
AG14
AK14
AH15
AF27
AF14
AH29
AJ30
AH27
AJ29
AG25
AG26
AG24
AK30
AK28
AF22
AH26
AH25
AJ26
AF21
AK26
AH24
AH21
AK22
AG20
AF18
AJ21
AJ22
AH20
AK18
AF17
AJ20
AJ17
AJ18
AG16
AK16
AH16
AJ16
AF23
AJ25
AJ24
AG18
AH18
AG22
AH22
AF13
AF16
AK24
AF20
AK12
AH17
AH23
AF19
U15
U16
U17
U18
U19
V11
V12
V13
V14
V15
V16
V17
V18
V19
V27
V30
W12
W13
W14
W15
W16
W17
W18
W19
W20
W23
Y13
Y15
Y19
Y27
AB27
V8
U20A
AGPST0
AGPST1
AGPST2
AGPADSTB0
AGPADSTB0#
AGPADSTB1
AGPADSTB1#
AGPBUSY#
AGPPIPE#
APGRBF#
AGPSTOP#
AGPVREF
AGPWBF#
PCIAD0
PCIAD1
PCIAD2
PCIAD3
PCIAD4
PCIAD5
PCIAD6
PCIAD7
PCIAD8
PCIAD9
PCIAD10
PCIAD11
PCIAD12
PCIAD13
PCIAD14
PCIAD15
PCIAD16
PCIAD17
PCIAD18
PCIAD19
PCIAD20
PCIAD21
PCIAD22
PCIAD23
PCIAD24
PCIAD25
PCIAD26
PCIAD27
PCIAD28
PCIAD29
PCIAD30
PCIAD31
PCIC/BE#0
PCIC/BE#1
PCIC/BE#2
PCIC/BE#3
PCICLK
PCIDEVSEL#
PCIFRAME#
PCIGNT#
PCIINTA#
PCIIRDY#
PCIPAR
PCIREQ#
PCIRST#
PCISTOP#
PCITRDY#
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
NV17M
3
PROPRIETARY NOTE
A1
GND
A4
GND
A6
GND
A10
GND
A14
GND
A18
GND
A22
GND
A26
GND
A30
GND
B2
GND
B29
GND
C1
GND
C3
GND
C28
GND
D4
GND
D6
GND
D8
GND
D10
GND
D12
GND
D14
GND
D16
GND
D18
GND
D20
GND
D22
GND
D24
GND
D27
GND
D30
GND
E1
GND
E5
GND
E26
GND
F27
GND
F30
GND
G4
GND
H12
GND
H18
GND
H27
GND
J1
GND
K27
GND
K30
GND
L4
GND
L12
GND
L16
GND
L18
GND
M8
GND
M11
GND
M12
GND
HOST INTERFACE PCI/AGP INTERFACE
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
M13
M14
M15
M16
M17
M18
M19
M27
N1
N12
N13
N14
N15
N16
N17
N18
N19
N20
N23
P12
P13
P14
P15
P16
P17
P18
P19
P27
P30
R12
R13
R14
R15
R16
R17
R18
R19
R20
T11
T12
T13
T14
T15
T16
T17
T18
T19
T27
U12
U13
U14
3
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
1
Compal Electronics, Inc.
Title
ATI M7-P AGP BUS
Size Document Number Rev
B
LA1432 1.A
Date: Sheet
星期五
07, 2002
2
六月
13 45 ,
1
of
5
NMAA[0..13] 17,18
NMD[0..127] 17,18
NDQM[0..15] 17,18
NMAA[0..13]
NMD[0..127]
NDQM[0..15]
4
3
NMAB[4..7] 17,18
NMAB[4..7]
2
1
AD28
AD26
AC27
AC26
AC29
AB26
AB28
AC30
AA27
AA26
AA29
W26
AA30
W28
W27
G27
H26
D29
G26
C30
C29
C23
C21
D17
C18
AK8
AK10
Y26
F29
E30
E29
E28
E27
B30
A29
B28
B27
A28
E22
A25
B23
A23
E21
B22
E16
B17
A17
A15
B15
E15
B10
E12
E11
U20B
FBD0
FBD1
FBD2
FBD3
FBD4
FBD5
FBD6
FBD7
FBD8
FBD9
FBD10
FBD11
FBD12
FBD13
FBD14
FBD15
FBD16
FBD17
FBD18
FBD19
FBD20
FBD21
FBD22
FBD23
FBD24
FBD25
FBD26
FBD27
FBD28
FBD29
FBD30
FBD31
FBD32
FBD33
FBD34
FBD35
FBD36
FBD37
FBD38
FBD39
FBD40
FBD41
FBD42
FBD43
FBD44
FBD45
FBD46
FBD47
FBD48
FBD49
B9
FBD50
A9
FBD51
FBD52
B7
FBD53
C9
FBD54
C8
FBD55
E3
FBD56
F4
FBD57
F3
FBD58
D1
FBD59
F2
FBD60
E2
FBD61
H4
FBD62
G3
FBD63
NC9
NC10
+2.5VS
SDRAM/SGRAM FRAMEBUFFER INTERFACE
GPIO
NC
NV17M
FBAA0
FBAA1
FBAA2
FBAA3
FBAA4
FBAA5
FBAA6
FBAA7
FBAA8
FBAA9
FBAA10
FBAA11
FBAA12
FBAA13
FBAA14
FBACAS#
FBARAS#
FBAWE#
FBACLK0
FBACLK0#
FBACLK1
FBACLK1#
FBDQM0
FBDQM1
FBDQM2
FBDQM3
FBDQM4
FBDQM5
FBDQM6
FBDQM7
FBDQS0
FBDQS1
FBDQS2
FBDQS3
FBDQS4
FBDQS5
FBDQS6
FBDQS7
FBACS0#
FBACS1#
FBACKE
FBVREF
GPIOD0
GPIOD1
GPIOD2
GPIOD3
GPIOD4
GPIOD5
GPIOD6
GPIOD7
NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
T28
U30
T26
P29
R29
R30
R26
P28
N27
P26
N26
M28
K29
J29
N30
L30
L29
N29
R28
R27
L27
L28
AB29
AE30
C27
F26
B18
E17
E10
K4
AC28
Y28
F28
D26
C22
C17
C10
H5
N28
M26
K28
D23
B5
E8
D7
C7
B6
A5
A3
J5
C16
G28
J4
AF2
AF12
AG27
AH12
AH13
AJ12
NMD0
NMD1
D D
C C
B B
NMD2
NMD3
NMD4
NMD5
NMD6
NMD7
NMD8
NMD9
NMD10
NMD11
NMD12
NMD13
NMD14
NMD15
NMD16
NMD17
NMD18
NMD19
NMD20
NMD21
NMD22
NMD23
NMD24
NMD25
NMD26
NMD27
NMD28
NMD29
NMD30
NMD31
NMD32
NMD33
NMD34
NMD35
NMD36
NMD37
NMD38
NMD39
NMD40
NMD41
NMD42
NMD43
NMD44
NMD45
NMD46
NMD47
NMD48
NMD49
NMD50
NMD51
NMD52
NMD53
NMD54
NMD55
NMD56
NMD57
NMD58
NMD59
NMD60
NMD61
NMD62
NMD63
NMAA0
NMAA1
NMAA2
NMAA3
NMAA4
NMAA5
NMAA6
NMAA7
NMAA8
NMAA9
NMAA10
NMAA11
NMAA12
NMAA13
NMCAS#
NMRAS#
NMWE#
NMCLKA0
NMCLKA0#
NMCLKA1
NMCLKA1#
NDQM0
NDQM1
NDQM2
NDQM3
NDQM4
NDQM5
NDQM6
NDQM7
NDQS1
NDQS2
NDQS5
NDQS6
NMCS0#
NMCKE#
FBVREF
ENVEE
ENVDD
N_SUS_STAT#
1 2
+3VS
NMCAS# 17,18
NMRAS# 17,18
NMWE# 17,18
NMCLKA0 18
NMCLKA0# 18
NMCLKA1 18
NMCLKA1# 18
NDQS1 18
NDQS2 18
NDQS5 17
NDQS6 17
NMCS0# 17,18
ENVEE 19,33
ENVDD 19
R377
10K
NMD64
NMD65
NMD66
NMD67
NMD68
NMD69
NMD70
NMD71
NMD72
NMD73
NMD74
NMD75
NMD76
NMD77
NMD78
NMD79
NMD80
NMD81
NMD82
NMD83
NMD84
NMD85
NMD86
NMD87
NMD88
NMD89
NMD90
NMD91
NMD92
NMD93
NMD94
NMD95
NMD96
NMD97
NMD98
NMD99
NMD100
NMD101
NMD102
NMD103
NMD104
NMD105
NMD106
NMD107
NMD108
NMD109
NMD110
NMD111
NMD112
NMD113
NMD114
NMD115
NMD116
NMD117
NMD118
NMD119
NMD120
NMD121
NMD122
NMD123
NMD124
NMD125
NMD126
NMD127
AH30
AG29
AG28
AF28
AF29
AE28
AE27
AG30
W29
W30
V28
V26
U27
U29
U28
U26
L26
G30
K26
H28
G29
E24
D25
A27
C26
E23
B26
C24
B25
E20
D21
A21
B21
D19
E19
B19
A19
C15
D15
B14
E14
C13
D13
E13
C12
AK13
AK17
AK21
AK25
AK29
U20C
FBD64
FBD65
FBD66
FBD67
FBD68
FBD69
FBD70
FBD71
FBD72
FBD73
FBD74
FBD75
FBD76
FBD77
FBD78
FBD79
J30
FBD80
FBD81
FBD82
J28
FBD83
FBD84
FBD85
J26
FBD86
FBD87
FBD88
FBD89
FBD90
FBD91
FBD92
FBD93
FBD94
FBD95
FBD96
FBD97
FBD98
FBD99
FBD100
FBD101
FBD102
FBD103
FBD104
FBD105
FBD106
FBD107
FBD108
FBD109
FBD110
FBD111
C6
FBD112
C5
FBD113
D3
FBD114
E6
FBD115
E4
FBD116
A2
FBD117
B3
FBD118
F5
FBD119
M5
FBD120
L3
FBD121
M2
FBD122
M4
FBD123
N5
FBD124
M1
FBD125
N4
FBD126
N3
FBD127
GND
GND
GND
GND
GND
NV17M
SDRAM/SGRAM FRAMEBUFFER INTERFACE
Power Supply
FBBA4
FBBA5
FBBA6
FBBA7
FBBCLK0
FBBCLK0#
FBBCLK1
FBBCLK1#
FBDQM8
FBDQM9
FBDQM10
FBDQM11
FBDQM12
FBDQM13
FBDQM14
FBDQM15
FBDQS8
FBDQS9
FBDQS10
FBDQS11
FBDQS12
FBDQS13
FBDQS14
FBDQS15
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
B13
A13
A11
B11
C11
D11
E9
D9
AE29
AA28
D28
E25
C19
E18
E7
L5
AE26
V29
J27
C25
C20
C14
D5
M3
A8
A12
A16
A20
A24
B8
B12
B16
B20
B24
G1
G2
H29
H30
M29
M30
T29
T30
Y29
Y30
AD29
AD30
AB30
AC13
AC19
AD27
AF3
AF25
AF26
AF30
AG7
AG9
AG11
AG13
AG15
AG17
AG19
AG21
AG23
AH28
AK6
NMAB4
NMAB5
NMAB6
NMAB7
NMCLKB0
NMCLKB0#
NMCLKB1
NMCLKB1#
NDQM8
NDQM9
NDQM10
NDQM11
NDQM12
NDQM13
NDQM14
NDQM15
+2.5VS
+2.5VS
+2.5VS
+2.5VS
+2.5VS
1 2
1 2
1 2
1 2
C181
470PF
C74
470PF
C82
4700PF
C62
0.047UF
NMCLKB0 17
NMCLKB0# 17
NMCLKB1 17
NMCLKB1# 17
1 2
C179
470PF
1 2
C92
470PF
1 2
C122
4700PF
1 2
C107
0.047UF
1 2
C177
470PF
1 2
C112
470PF
1 2
C184
4700PF
1 2
C142
0.047UF
1 2
C175
470PF
1 2
C133
470PF
1 2
C180
4700PF
1 2
C182
0.047UF
1 2
C147
470PF
1 2
C153
470PF
1 2
C176
4700PF
1 2
C178
0.047UF
1 2
1 2
C183
470PF
C162
4700PF
R76
1K_1%_0603
A A
R77
1K_1%_0603
1 2
(10mil)
1 2
1 2
C165
.1UF_X5R
FBVREF
Plece at T-Point
NMCKE#
1 2
R64
10K
1 2
C134
@.1UF_X5R
NMCKE# 17,18
Place clost to the NV17M
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
5
4
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
+2.5VS
1 2
C154
4.7UF_0805
1 2
C190
4.7UF_0805
1 2
C110
4.7UF_0805
Compal Electronics, Inc.
Title
ATI M7-P DDA CH-A
Size Document Number Rev
B
LA1432 1.A
Date: Sheet of
星期五
07, 2002
六月
14 45 ,
1