Compal LA-1421, Satellite 1100, Satellite 1105 Schematic

A

1 1

B

C

D

E

LA-1421 Schematics Document Ve r1.0

2 2

uFCBGA/uFCPGA for Celeron/ Coppermine-T and Tualatin CPU

Almador-M(830-MG) + ICH3 + VCH

3 3

4 4

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA-1421

Size Document Number Rev
Custom

401218

星期四 八月

Date: Sheet of

1 44, 22, 2002

E

1A

A

B

C

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

D

E

BLOCK DIAGRAM

Mobile Celeron

4 4

CRT

Connector

PAGE 16

LVDS

Connector

PAGE 16

3 3

VCH

Connector

GM Bus Interface

PAGE 15

Coppermine-T

(Trualatin)

(uFCBGA/uFCPGA)

PSB

Almador-M
GMCH-M

830MG

625 BGA

PAGE 8,9,10,11

HUB

Interface

PAGE 4,5,6

Thermal Sensor
MAX6654MEE

Memory Bus

PAGE 5

CK TITAN
ICS950805

PAGE 12

SO-DIMM * 2

BANK 2,3,4,5

PAGE 13,14

CPU VID & All
reference voltage

PAGE 7

HDD Connector

PAGE 20

2 2

CD-ROM Connector

PAGE 20

LPC

Super I/O

LPC47N227

PAGE 24

1 1

Parallel

PAGE 26

A

B

Embedded
Controller

NS PC87591

Scan KB

PAGE 31

ICH3-M

421 BGA

PAGE 17,18,19

PAGE 29

BIOS & I/O
PORT

USB

PCI BUS

PAGE 30

C

USB
Connector

CardBus

ENE 1420

LAN

RTL 8100B

AC'97
CODEC
CS2002

PAGE 27

PAGE 28

PAGE 26

PAGE 22

PAGE 21

Slot 0/1

PAGE 23

Audio Amp lifierAudio Jack

PAGE 28

D

Title

Size Document Number Rev
Custom

Date: Sheet of

FAN on controller &
TEMP. sensing circuit

PAGE 34

DC/DC Interface
RTC Battery

PAGE 36

BATTERY
Charger

PAGE 38,39

POWER
Interface

PAGE 37,40,41,42,43

Compal Electronics, inc.

SCHEMATIC, M/B LA-1421
401218

星期四 八月

2 44, 22, 2002

E

1A

A

Voltage Ra ils

B

C

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

D

E

Power Plane Description

1 1

B+
+VCC_H_CORE
+VTT

VIN

Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU

1.2V switched power rail for CPU AGTL Bus

S1 S3 S5

N/A N/A N/A

N/AN/AN/A
ON OFF
ON OFF

OFF

OFF

+1.5V 1.5V power rail ON ON OFF
+1.5VS

AGP 4X ON OFF OFF
+1.8V 1.8V power rail ON ON OFF
+1.8VS
+3VALW
+3V
+3VS
+5VALW
+5V ON
+5VS
+12VALW

2 2

+12VS
RTCVCC

1.8V switched power rail

3.3V always on power rail ON*

3.3V power rail

3.3V switched power rail

5V always on power rail

5V power rail

5V switched power rail

12V always on power rail

12V switched power rail

RTC power

ON
ON
ON
ON
ON ON

ON
ON
ON
ON

OFF
ON
ON
OFF

ON
OFF
ON
OFF
ON

OFF

OFF
OFF
ON*
OFF
OFF
ON*
OFF
ON

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

External PCI Device s

Device IDSEL# REQ#/GNT# Interrupts

CardBus

On Board LAN

3 3

AD20

AD17

2

3

PIRQA/PIRQB

PIRQB

EC SM Bus1 address

Device

Smart Battery
EEPROM(24C16/02)

(24C04)

Address Address
0001 011X b
1010 000X b
1011 000Xb

EC SM Bus2 address

Device

MAX1617MEE
Smart Battery
Docking
DOT Board

1001 110X b
0001 011X b
0011 011X b
XXXX XXXXb

ICH3-M SM Bus address

4 4

Clock Generator ( ICS9238-50)
SDRAM Select ( 74HC4052 )
CPU Voltage VID select ( F3565 )

A

Device

Address

1101 0000
1010 0000
0110 111Xb

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1421

Size Document Number Rev
Custom

401218

星期四 八月

B

C

D

Date: Sheet of

3 44, 22, 2002

E

1A

A

1 1

H_A#[3..31]8

2 2

H_REQ#[0..4]8

H_ADS#8

3 3

H_BPRI#8

H_BNR#8

H_LOCK#8

H_HIT#8

H_HITM#8

H_DEFER#8

H_A#[3..31]

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#[0..4] H_D#33

+1.5VS

R376 1.5K

1 2

R378 10

1 2

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

G2

G1

G3

B11

A10
A13

C12
C10

A15
A14
B13
A12

AA3

W2

AB3
C14

AF23

AF4

C22

AD23

AA2

K1

J1

K3

J2

H3
A3

J3
H1
D3
F3

C2
B5

C6
B9
B7
C8
A8

B3
A9

C3

A6

R1
L3
T1
U1
L1
T4

P3

A7
C4

R2
L2
V3

U2
T3

U43A

TUALATIN

+VCC_H_CORE

D22

F22

VCC_0

VCC_1

A#3
A#4
A#5
A#6
A#7
A#8
A#9
A#10
A#11
A#12
A#13
A#14
A#15
A#16
A#17
A#18
A#19
A#20
A#21
A#22
A#23
A#24
A#25
A#26
A#27
A#28
A#29
A#30
A#31
A#32
A#33
A#34
A#35

REQ#0
REQ#1
REQ#2
REQ#3
REQ#4
RP#
ADS#

AERR#
AP#0
AP#1

Interface

BERR#
BINIT#
IERR#

BREQ0#

Arbitration

NC
NC
NC
BPRI#
BNR#
LOCK#

HIT#
HITM#
DEFER#

B

E21

H22

G21

VCC_2

VCC_3

VCC_4

Address

Lines

Request

Signals

Error

Signals

Snoop

Signals

VSS_0

VSS_1

VSS_2

E16R4E25

K22

VCC_5

VSS_3

G25

J21

VCC_6

VSS_4

J25

M22

VCC_7

VSS_5

L25

L21

VCC_8

VSS_6

N25

P22

VCC_9

VSS_7

R25

N21

T22

VCC_10

VSS_8

U25

W25

R21

V22

VCC_11

VCC_12

VSS_9

VSS_10

AA25

AC25

U21

Y22

VCC_13

VCC_14

VCC_15

VSS_11

VSS_12

VSS_13

AF25

AE26

W21

AB22

VCC_16

VSS_14

C23

F23

AA21

AC21

VCC_17

VCC_18

VSS_15

VSS_16

H23

K23

D20

F20

VCC_19

VCC_20

VCC_21

VSS_17

VSS_18

VSS_19

M23

P23

E19

AB20

AA19

AC19

D18

F18

E17

AB18

AA17

AC17

D16

F16

VCC_22

VCC_23

VCC_24

VCC_25

VCC_26

VCC_27

VCC_28

VCC_29

VCC_30

VCC_31

VCC_32

Mobile

Celeron

Coppermine-T

VSS_20

VSS_21

VSS_22

VSS_23

VSS_24

VSS_25

VSS_26

VSS_27

VSS_28

VSS_29

VSS_30

T23

V23

Y23

AB23

AE23

B22

D21

F21

E22

H21

G22

K21

C

E15

AB16

AA15

AC15

D14

F14

E13

AB14

AA13

AC13

D12

F12

E11

AB12

AA11

AC11

D10

F10E9AB10

AA9

AC9D8F8E7AB8

VCC_33

VCC_34

VCC_35

VCC_36

VCC_37

VCC_38

VCC_39

VCC_40

VCC_41

VCC_42

VCC_43

VCC_44

VCC_45

VCC_46

VCC_47

VCC_48

VCC_49

VCC_50

VCC_51

VCC_52

VCC_53

VCC_54

VCC_55

VCC_56

VCC_57

VCC_58

VCC_59

VCC

VSS VCC

VSS_31

VSS_32

VSS_33

VSS_34

VSS_35

VSS_36

VSS_37

VSS_38

VSS_39

VSS_40

VSS_41

VSS_42

VSS_43

VSS_44

VSS_45

VSS_46

VSS_47

VSS_48

VSS_49

VSS_50

VSS_51

VSS_52

VSS_53

VSS_54

VSS_55

VSS_56

VSS_57

J22

M21

L22

P21

N22

T21

R22

V21

U22

Y21

W22

AB21

AA22

AC22

AE21

B20

D19

AB19

AA20

AC20

AE19

B18

D17

F17

E18

AB17

D

AA7

AC7D6F6E5H6G5K6J5N5T6V6

VCC_61

VCC_62

VCC_63

VCC_64

VCC_65

VCC_66

VCC_67

VCC_68

Data

Signals

VCC_75

VCC_76

VCC_77

VCC_78

VCC_79

VCC_80

AB6

AA5

AC5M6P6

VCC_69

VCC_70

VCC_71

VCC_73

VCC_74

U5Y6W5

VCC_72

D#0
D#1
D#2
D#3
D#4
D#5
D#6
D#7
D#8

D#9
D#10
D#11
D#12
D#13
D#14
D#15
D#16
D#17
D#18
D#19
D#20
D#21
D#22
D#23
D#24
D#25
D#26
D#27
D#28
D#29
D#30
D#31
D#32
D#33
D#34
D#35
D#36
D#37
D#38
D#39
D#40
D#41
D#42
D#43
D#44
D#45
D#46
D#47
D#48
D#49
D#50
D#51
D#52
D#53
D#54
D#55
D#56
D#57
D#58
D#59
D#60
D#61
D#62
D#63

A16
B17
A17
D23
B19
C20
C16
A20
A22
A19
A23
A24
C18
D24
B24
A18
E23
B21
B23
E26
C24
F24
D25
E24
B25
G24
H24
F26
L24
H25
C26
K24
G26
K25
J24
K26
F25
N26
J26
M24
U26
P25
L26
R24
R26
M25
V25
T24
M26
P24
AA26
T26
U24
Y25
W26
V26
AB25
T25
Y24
W24
Y26
AB24
AA24
V24

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32

H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_D#[0..63]

E

H_D#[0..63] 8

+VCC_H_CORE

4 4

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA-1421

Size Document Number Rev
Custom

401218

星期四 八月

Date: Sheet of

4 44, 22, 2002

E

1A

A

B

C

D

E

+VTT

+1.8VSB

+1.5VS

+1.5VS

Place H_RESET#

1 1

R38<0.1" from U43

H_FERR#19

H_PWRGD19

H_RESET#8

2 2

H_PICD019
H_PICD119

3 3

12

C526

2200PF

4 4

+5VALW

R38

56.2_1%_0603

R82 @0
1 2
1 2

R69 @0

H_THERMDA
H_THERMDC

1 2

A

12

R391

1K

R42

+1.5VS

1.5K

R71
150

R386

12

+VS_CMOSREF

C522
.1UF

1 2

12

12

12

R384

1.5K

3K

+1.5VS

12

R76
150

CLK_CPU_APIC12

PM_CPUPERF#19,21

1 2

U44

1

NC

2

VCC

3
4
5
6
7
8 9

MAX6654

STBY

DXP

SMBCLK
DXN
NC

SMBDATA

ADD1

ALERT

GND

ADD0

GND NC

Thermal Sensor

H_TRDY#8

H_IGNNE#19

H_STPCLK#19

H_DPSLP#19,40

H_DBSY#8

H_DRDY#8

+1.5VS

R392

200

NC

NC

H_RS#08
H_RS#18
H_RS#28

H_A20M#19

H_SMI#19

H_INTR19

H_INIT#19

H_BSEL010,12
H_BSEL112

10PF

H_NMI19

C587

16
15
14
13
12
11
10

R403 1.5K

1 2

R406
1K

H_A20M#

H_IGNNE#

H_INTR
H_NMI

H_THERMDA
H_THERMDC

1 2

R404

110_1%_0603

R412

1 2

22_0402

ITP_TRST#

1 2
R409 200

1 2

R405 56.2_1%_0603

Note :
GHI# Pull-Up internally

+5VALW

12

12

R407
10K

+5VALW

B

M5
W1

AC3
AF6
AF5
AD9
AD3
AB4
AE4

AF8
AD15
AE14

AE6

B15

W3

AF13
AF14

AE12
AF10
AF16

AD19
AD17
AF20

AF22
AE20
AD22
AD21

AD10

AD7
AD11

AF7
AF15
AF19
AE22

AF12

AD5
AE16

Y3
V1
U3

Y1

L5

AA18

AC18

AE17

B16

D15

F15

AB15

AA16

AC16

AE15

B14

D13

F13

E14

AB13

AA14

AC14

AE13

B12

D11

F11

E12

AB11

AA12

U43B

VSS_58

VSS_59

VSS_60

VSS_61

VSS_62

VSS_63

VSS_64

VSS_65

VSS_66

VSS_67

VSS_68

VSS_69

VSS_70

VSS_71

VSS_72

VSS_73

VSS_74

RS#0
RS#1
RS#2

Request

RSP#

Signals GND

TRDY#

A20M#
FERR#
FLUSH#
IGNNE#
SMI#
PWRGOOD
STPCLK#

Compatibility

DPSLP#
INTR/LINT0
NMI/LINT1
INIT#
RESET#

DBSY#
DRDY#

THERMDA
THERMDC

SELFSB0
SELFSB1
EDGECTRLP

PICD0
PICD1
PICCLK

RP2#
RP3#
BPM0#
BPM1#

TCK
TDI
TDO
TMS
TRST#
PREQ#
PRDY#

CMOSREF_1
CMOSREF_0
RTTIMPDEP

GHI#

+VTT

VCCT_1

A26

G23

APIC

Debug

Break

Point

Test

Access

PORT
( ITP )

VCCT_2

VCCT_3

VCCT_4

J23

L23

VCCT_5

VCCT_6

VCCT_7

N23

R23

U23

EC_SMC2 32

VCCT_8

W23

AA23

VCCT_9

VCCT_10

C21

C19

VCCT_11

VCCT_12

VCCT_13

AD20

C17

AD18

VCCT_14

VCCT_15

VCCT_16

C15

C13

AD14

AC12

VSS_75

VSS_76

VSS_77

VSS_78

VSS_79

VSS_80

VSS_81

VCCT VID

VCCT_17

VCCT_18

VCCT_19

VCCT_20

VCCT_21

VCCT_22

VCCT_23

C11

AD12C9C7

AD8C5AD6

From 87591

EC_SMD2 32

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

AE11

B10D9F9

E10

AB9

AA10

AC10

AE9B8D7F7E8

AB7

AA8

VSS_82

VSS_83

VSS_84

VSS_85

VSS_86

VSS_87

VSS_88

VSS_89

VSS_90

VSS_91

VSS_92

VSS_93

VSS_94

VSS_95

VSS_96

VSS_97

Mobile

Celeron

Coppermine-T

VCCT_24

VCCT_25

VCCT_26

VCCT_27

VCCT_28

VCCT_29

VCCT_30

VCCT_31

VCCT_32

VCCT_33

VCCT_34

VCCT_35

VCCT_36

VCCT_37

VCCT_38

AC23

AA4E4G4J4L4

AC4V4AE3

AF2

AF1

AE18D5E6

AC8

AE7B6F5H5G6K5J6N6L6T5R6V5U6Y5W6

VSS_98

VSS_99

VSS_100

VSS_101

VSS_102

VSS_103

VSS_104

VSS_105

VSS_106

VSS_107

VSS_108

VSS_109

VID0

VID1

VID2

VID3

VID4

VSS

VSS

VSSNCNC

AB1

AC2

AE2

AF3R3B26M4AF26C1AF17

CPU_VR_VID4 7
CPU_VR_VID3 7
CPU_VR_VID2 7
CPU_VR_VID1 7
CPU_VR_VID0 7

VSS_110

VSS_111

VSS_112

N4

D

AB5

AA6

VSS_113

VSS_114

VSS_115

NC

AC6

AE5B4D4F4H4K4M3U4W4B2D2F2H2

VSS_116

VSS_117

VSS_118

VSS_119

VSS_120

VSS_121

VSS_122

VSS_123

VSS_124

VSS_125

Data

Signals

VTT Ref

Analog

VSS_133

VSS_134

VSS_135

VSS_136

VSS_137

VSS_138

VSS_139

VSS_140

VSS_141

VSS_142

AD2

AE1

A25

C25

E20

F19

+3VS

+3VS

12

R80

147

10K

12

C153
.1UF

U9A

Title

Size Document Number Rev
Custom

Date: Sheet of

VSS_126

VSS_127

VSS_128

VSS_129

DEP#0
DEP#1
DEP#2
DEP#3
DEP#4
DEP#5
DEP#6
DEP#7

VREF_1
VREF_2
VREF_3
VREF_4
VREF_5
VREF_6
VREF_7
VREF_8

TESTLO

VCC
PLL1
PLL2

NC
NC
NC
NC

CLK0

CLK0#

TESTLO

NC

NCHCTRLP

TESTHI

NC
NC
NC

TESTHI

NC

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7

VTTPWRGOOD

NC

VSS_130

VSS_131

VSS_132

TUALATIN

K2M2P2T2V2Y2AB2

21

74LVC14

AE24
AD25
AE25
AC24
AF24
AD26
AC26
AD24

AF21
AB26
H26
A21
AF9
A4
N1
AA1

Y4
R5
N3
N2
P1
P5
E1
F1

AC1
AD1
M1

AF18
AD16
AF11
AE8
N24
AE10
E2

P4

AD4
A5
D1
AD13
B1
P26
A11

E3

D26

TESTHI1
TESTHI2

+V_AGTLREF

+VCC_H_CORE

TESTLO1

C42
33UF_16V_D2

+

CLK_HCLK
CLK_HCLK#
TESTLO2

R66 14_1%_0603

TESTHI1

TESTHI2

1 2

1 2

+VTT

R352

22_0402

C477

10PF

Close to ball AC1 Close to ball AD1

CPUVTT_PWRGD

+VTT

12

R63
10K

13

Q21

2

VTT_PWRGD# 12,32VTT_PWRGD41

Compal Electronics, inc.

SCHEMATIC, M/B LA-1421

401218

星期四 八月

E

+VTT

RP9
1 8
2 7
3 6
4 5

8P4R_1K

1 2

L11 4.7UH

CLK_HCLK 12
CLK_HCLK# 12

CLK_HCLK#CLK_HCLK

1 2

CPUVTT_PWRGD

2N7002

5 44, 22, 2002

TESTLO1
TESTLO2

+VTT

R362

22_0402

C486

10PF

1A

A

B

C

D

E

Layout note :

1 1

Place close to CPU, Use 2~3 vias per PAD.
Place .47uF caps underneath balls on solder side.
Place 10uF caps on the peripheral near balls.
Use 2~3 vias per PAD.

Layout note :
Place close to CPU,

Use 2 vias per PAD.

+VCC_H_CORE

12

12

12

12

12

12

12

12

12

12

12

.47UF

C75

.47UF

C76

.47UF

C77

.47UF

C78

.47UF

C79

.47UF

C80

.47UF

C73

.47UF

C89

.47UF

C101

.47UF

C123

.47UF

C114

12

C106

.47UF

+VCC_H_CORE

12

12

.47UF

C103

12

C96

.47UF

12

12

12

12

12

12

12

12

C144

C143

C142

C141

C140

C139

.47UF

.47UF

.47UF

.47UF

2 2

.47UF

.47UF

.47UF

C146

.47UF

C129

12

.47UF

C119

.47UF

C112

+VTT

12

C33

+

220UF_4V_D2

+VTT

12

C187

1UF_10V_0603

1UF_10V_0603

12

C188

1UF_10V_0603

12

C200

+

220UF_4V_D2

1UF_10V_0603

12

C189

12

C155

1UF_10V_0603

1UF_10V_0603

12

C549

12

C525

1UF_10V_0603

12

C44

1UF_10V_0603

12

C95

12

C107

1UF_10V_0603

12

C128
1UF_10V_0603

+VCC_H_CORE

12

C98
10UF_10V_1206

12

C120
10UF_10V_1206

12

C99
10UF_10V_1206

12

C23
10UF_10V_1206

12

C22
10UF_10V_1206

+VCC_H_CORE

12

C81
10UF_10V_1206

3 3

+VCC_H_CORE

12

C26

+

150UF_6.3V_D2

12

C195
10UF_10V_1206

12

C474

+

150UF_6.3V_D2

12

C196
10UF_10V_1206

12

C25

+

150UF_6.3V_D2

12

C197
10UF_10V_1206

12

C532

+

220UF_4V_D2

12

C190
10UF_10V_1206

12

C568

+

@150UF_6.3V_D2

+VCC_H_CORE

12

C108

+

150UF_6.3V_D2

4 4

A

12

C87

+

150UF_6.3V_D2

12

C194

+

150UF_6.3V_D2

12

C483

+

150UF_6.3V_D2

B

12

C537

+

150UF_6.3V_D2

12

C122

+

220UF_4V_D2

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA-1421

Size Document Number Rev
Custom

401218

星期四 八月

Date: Sheet of

6 44, 22, 2002

1A

E

A

1 1

Mount R223 and RP24 and remove U22 R212
R213 U24 if without support SpeedStep

CPU Voltege ID

2 2

Default for Resistors Should
be +VCC_CPU = 0.7V, for
Deeper Sleep Only.

SMB_CLK12,14,19

SMB_DATA12,14,19

CPU_VR_VID05
CPU_VR_VID15

+3VS

CPU_VR_VID25
CPU_VR_VID35
CPU_VR_VID45

1 2

R214

PM_DPRSLPVR19,40

PM_GMUXSEL19,40

From Tualatin CPU

3 3

@10K

R223
0

12

182736

45

RP24
8P4R_0

+3V

1 2

1
2

U22

3 5

@NC7SZ02

R452
1K

CPU_VID4

+3V

12

R209

@100K

C278

.1UF

4

Override# MUX_SEL A/B# MUX_outputs

1
1

PM_GMUXSEL = 1 : for Performance mode

PM_DPRSLPVR = 1: for Deeper Sleep mode

4 4

0 : for CPU default power

0 : for Performance mode

1

B

+3V

12

Address 0110 111X

1
2
3
4
5
6
7
8
9

10

MUX_SEL

3 6

4 5

U24

SCL
SDA
Override#
I_0
I_1
I_2
I_3
I_4
A/B#
GND

@FM3565

1 8

2 7

VCC

ASEL

WP

MUX_SEL

Y_0
Y_1
Y_2
Y_3
Y_4

RP29

8P4R_1K

20
19
18
17

NC

16
15
14
13
12
11

CPU_VID3
CPU_VID2
CPU_VID1
CPU_VID0

+3V

R213 @0

1 X MUX_inputs
0 0 From

0 1

C279

1 2

.1UF

R212 @0
1 2
1 2

Non-volatile
register(SOPRB)

From
Non-volatile
register(SOPRA)

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4

CPU_VID0 40
CPU_VID1 40
CPU_VID2 40
CPU_VID3 40
CPU_VID4 40

Mode
Battery

Performance

Deeper sleep

C

+3V

System Memory Reference

12

R421

249_1%

49.9_1%

301_1%

301_1%

249.9_1%

Place capacitor close to GMCH.

12

R422

+1.8VSB

HUB Interface Reference

12

R420

Layout note :

1. Place R419 and R420 in middle of Bus.

2. Place capacitors near GMCH.

12

R419
301_1%

+1.8VS

HUB Interface VSwing Voltage

12

R138

+V_SMREF

12

C617
.1UF

+VS_HUBREF

12

C616
.1UF

1. Place R138 and R137 in middle of Bus.

R147

301_1%

12

12

C220
.1UF

+VS_HUBVSWING

D

+VTT

GTL Reference Voltage

12

R396

Layout note :

1K_1%

1. Place R396 and R397 between and GMCH and CPU.

2. Place decoupling caps near CPU.(Within 500mils)

12

12

R397
2K_1%

+1.5VS

12

R377
499_1%

12

R373
1K_1%

+VAGP_BRDREF

+1.8VSB

R393

576_1%

12

12

C519

C515

.1UF

.1UF

CMOS Reference Voltage

Layout note :

1. Place R377 and R373 between and GMCH and CPU.

2. Place decoupling caps near CPU.

12

C507
.1UF

Place Reference Circuit near GMCH

+1.5VS

12

12

12

12

C508
.1UF

R400
1K_1%

R402
1K_1%

C509
.1UF

E

C531

1 2

C560

1 2

+V_AGTLREF

12

C504
.1UF

+VS_CMOSREF

470PF

470PF

12

R399

82.5_1%

12

R401

82.5_1%

1. Place R393 and R394 near GMCH.

+VS_RIMMREF

R394

2K_1%

12

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA-1421

Size Document Number Rev
Custom

401218

星期四 八月

Date: Sheet of

7 44, 22, 2002

E

1A

A

B

C

D

E

+VS_HUBREF

B

AA3

AD3
AB4
AB5

AA4
AA1
AA6
AB1
AC4
AA2
AB3
AD2
AD1
AC2
AB6
AC6
AC1
AF3
AD4
AD6
AC3
AH3
AE5
AE3

AG2

AF4
AF2

AJ3

AE4

AG1

AE1

AG4

AH4

AG3

AF1

U4
P1

W6

U2
U6
R1
N3

W5

V4
P3
R3
U1
V6

W4

T3
P2
V3
R2
T1

W3

U3
Y4

W1

V1
Y1
Y6

V2
Y3
Y2

12

U10A

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

ALMADOR-M

.01UF

1 1

2 2

3 3

CLK_GHT CLK_GHT#

1 2

R365

22_0402

C487

10PF

1 2

R366

22_0402

C488

10PF

H_D#[0..63]

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

Close to ball AJ4 Close to ball AH5

HUB_PD[0..10]19

HUB_PSTRB19

HUB_PSTRB#19

4 4

A

C600

M12

M13

VSS0

Host

Interface

HUB_PD0

HUB_PD1

G26

H28

H29

HUB_PD0

HUB_PD1

HUB_PD2

M17

M18

N12

N13

N14

N15

N16

N17

N18

P13

P14

P15

P16

P17

R13

R14

R15

R16

R17

T13

T14

T15

T16

T17

U12

U13

U14

U15

U16

U17

U18

V12

V13

V17

V18

AJ5D2AC5Y5U5P5L5H5AH2

VSS1

VSS2

VSS3

VSS4

VSS5

VSS6

VSS7

VSS8

VSS9

VSS10

VSS11

VSS12

VSS13

VSS14

VSS15

VSS16

VSS17

VSS18

VSS19

VSS20

VSS21

VSS22

VSS23

VSS24

VSS25

VSS26

VSS27

VSS28

VSS29

VSS30

VSS31

VSS32

VSS33

VSS34

VSS35

VSS36

VSS_H0

VSS_H1

VSS

Almador-M
GMCH

A3

HUB_PD2

HUB_PD3

HUB_PD4

HUB_PD5

HUB_PD6

HUB_PD7

HUB_PD8

HUB_PD9

HUB_PD10

HUB_PSTRB

HUB_REF

HUB_PSTRB#

DVO_RCOMP

SM_RCOMP

HUB_RCOMP

AGP_REF

AGP_RCOMP/DVOBC_RCOMP

RESET#

H_GTLREF1

H_GTLREF0

H_GTLRCOMP

VSS

VSS

VSSPCMOS_LM0

VSSPCMOS_LM1

VSSPCMOS_LM2

VSSP_HUB0

VSSP_HUB1

H27

F29

F27

E29

E28

G25

G27

H26

G29

H24

F28

AC22F6J23

J25

K24

AB24

AA7J7C2

HUB_PD3

HUB_PD4

HUB_PD5

HUB_PD7

HUB_PD6

HUB_PD8

HUB_PD9

HUB_PD10

R388 54.9_1%12
R423 27.4_1%1 2
R418 54.9_1%1 2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

+VAGP_BRDREF

C

12

12

C602
.1UF

R415 54.9_1%

12

C599
.1UF

AB23

AC23

AH19

AH20

AF5

1 2

R111 80.6_1%

+V_AGTLREF

C536
.1UF

12

G28

H25

AC26

PCIRST# 15,17,19,21,22,23,25,26,27,33

10 mils wide,length <=500 mils.

VSS_H2

VSS_H3

VSS_H4

VSS_H5

VSSP_IO0

VSSP_IO1

VSSP_IO2

AD22

AE28

AE2

VSS_H6

VSS_H7

VSS_H8

VSS_H9

VSSP_DVO0

VSSP_DVO1

VSSP_DVO2

AH24

AF25

AF27

AB2W2T2N2K2G2AC7

VSS_H10

VSS_H11

VSS_H12

VSS_H13

VSS_H14

VSS_H15

Host

Interface

VSSA_DAC

VSSA_CPLL

AH26G8AD7

D

VSS_H16

H_CPURST#

H_DBSY#

H_DEFER#

H_DRDY#

H_HITM#

H_LOCK#

H_TRDY#

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

CLK_HT#

CLK_DREF

CLK_GBIN

CLK_GBOUT

VSSA_HPLL

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8

H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_ADS#
H_BNR#

H_BPRI#

H_HIT#

H_RS#0
H_RS#1
H_RS#2

CLK_HT

22_0402

10PF

Title

Size Document Number Rev
Custom

Date: Sheet of

H_A#[3..31]

H_A#3

H2

H_A#4

E3

H_A#5

G3

H_A#6

N4

H_A#7

M6

H_A#8

F1

H_A#9

F2

H_A#10

J3

H_A#11

F3

H_A#12

P6

H_A#13

G1

H_A#14

N5

H_A#15

H1

H_A#16

P4

H_A#17

T4

H_A#18

M2

H_A#19

J2

H_A#20

L2

H_A#21

R4

H_A#22

K1

H_A#23

L3

H_A#24

L1

H_A#25

J1

H_A#26

N1

H_A#27

T5

H_A#28

H3

H_A#29

M3

H_A#30

M1

H_A#31

K3

R6
C1
E1
L4
G5
J4
F4
D3
D1
J6
G4

K6
M4
K5
K4
L6

H6
H4
G6

AJ4
AH5

AC19
AG26
AD24

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

C490

R368

1 2

1 2

R37247

R398
22_0402

1 2

C541
10PF

H_REQ#[0..4]

H_RS#[0..2]

.01UF
C489

CLK_GHT 12
CLK_GHT# 12

R193
240K

Closely to C.G

1 2

Compal Electronics, inc.

SCHEMATIC, M/B LA-1421

401218

星期四 八月

E

H_A#[3..31] 4H_D#[0..63]4

H_RESET# 5
H_ADS# 4
H_BNR# 4
H_BPRI# 4
H_DBSY# 5
H_DEFER# 4
H_DRDY# 5
H_HIT# 4
H_HITM# 4
H_LOCK# 4
H_TRDY# 5
H_REQ#[0..4] 4

H_RS#[0..2] 5

CLK_DREF 12
CLK_GBIN 12
CLK_GBOUT 12

8 44, 22, 2002

1A

A

B

C

VSSA_DPLL0 10
VSSA_DPLL1 10

D

E

U10B

MD0

D29
MD1
MD2

1 1

MD3
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30

2 2

MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD59

3 3

MD60
MD61
MD62
MD63

MD[0..63]

SM_DQ0

C29

SM_DQ1

D27

SM_DQ2

C27

SM_DQ3

A27

SM_DQ4

B26

SM_DQ5

E24

SM_DQ6

C25

SM_DQ7

E23

SM_DQ8

B25

SM_DQ9

C23

SM_DQ10

F22

SM_DQ11

B23

SM_DQ12

C22

SM_DQ13

E21

SM_DQ14

B22

SM_DQ15

C12

SM_DQ16

D10

SM_DQ17

C11

SM_DQ18

A10

SM_DQ19

C10

SM_DQ20

C8

SM_DQ21

A7

SM_DQ22

E9

SM_DQ23

C7

SM_DQ24

E8

SM_DQ25

A5

SM_DQ26

F8

SM_DQ27

C5

SM_DQ28

D6

SM_DQ29

B4

SM_DQ30

C4

SM_DQ31

E27

SM_DQ32

C28

SM_DQ33

B28

SM_DQ34

E26

SM_DQ35

C26

SM_DQ36

D25

SM_DQ37

A26

SM_DQ38

D24

SM_DQ39

F23

SM_DQ40

A25

SM_DQ41

G22

SM_DQ42

D22

SM_DQ43

A23

SM_DQ44

F21

SM_DQ45

D21

SM_DQ46

A22

SM_DQ47

F11

SM_DQ48

A11

SM_DQ49

B11

SM_DQ50

F10

SM_DQ51

B10

SM_DQ52

B8

SM_DQ53

D9

SM_DQ54

B7

SM_DQ55

F9

SM_DQ56

A6

SM_DQ57

C6

SM_DQ58

D7

SM_DQ59

B5

SM_DQ60

E6

SM_DQ61

A4

SM_DQ62

D4

SM_DQ63

ALMADOR-M

MD[0..63] 14

Layout note :
Place resistors & capacitors near GMCH

4 4

SM_D_CLK0
SM_D_CLK1
SM_D_CLK2
SM_D_CLK3

R431 101 2
R425 10

1 2
R430 101 2
R426 101 2

AD8

AD9

AD10

AJ21

AE8

AE9

AE10

AE11

AE12

AE13

AE17

AE19

AH21

AF8

AF9

AF10

AF11

AF12

AF13

AF14

AF15

AF16

AF17

AF18

AF19

AF20

AG7

AG15

AG16

AG21

AH6

AH8

AH9

AH11

AH12

AH14

AH17

AH18

K28

N28

T28

W28

AB28

L25

P25

U25

Y25

AE20

VSS_LM

SDRAM
System

Memory

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

Almador-M
GMCH

VSS Power

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS

A3

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSSP_AGP0

VSSP_AGP1

VSSP_AGP2

VSSP_AGP3

VSSP_AGP4

VSSP_AGP5

VSSP_AGP6

VSSP_AGP7

G24

VSSP_AGP8

VSSA_DPLL0

SDRAM
System
Memory

VSSA_DPLL1

SM_MA0
SM_MA1
SM_MA2
SM_MA3
SM_MA4
SM_MA5
SM_MA6
SM_MA7
SM_MA8

SM_MA9
SM_MA10
SM_MA11
SM_MA12

NC
NC
NC

NC
VSS
VSS

VCC_SM
VCC_SM

SM_BA0
SM_BA1

SM_DQM0
SM_DQM1
SM_DQM2
SM_DQM3
SM_DQM4
SM_DQM5
SM_DQM6
SM_DQM7

SM_CS#0
SM_CS#1
SM_CS#2
SM_CS#3

VCCQ_SM

VSS

SM_CLK0
SM_CLK1
SM_CLK2
SM_CLK3

VSS
VSS

SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3

VSS

VCC_SM

A20
B20
B19
C19
A18
A19
C17
C18
B17
A17
A16
C15
C14

F20
E20
F12
E11
C21
F19
E12
A12

B16
C16

F18
D18
D13
D12
E18
F17
F14
F13

E17
F16
D16
D15
E15
E14

A15
B2
B14
A3
A14
C3

A13
C9
C13
A9
B13
A8

SM_D_MA0
SM_D_MA1
SM_D_MA2
SM_D_MA3
SM_D_MA4
SM_D_MA5
SM_D_MA6
SM_D_MA7
SM_D_MA8
SM_D_MA9
SM_D_MA10
SM_D_MA11
SM_D_MA12

SM_DQM0
SM_DQM1
SM_DQM2
SM_DQM3
SM_DQM4
SM_DQM5
SM_DQM6
SM_DQM7

SM_CS#0

SM_CS#1
SM_CS#2
SM_CS#3

SM_D_CLK0
SM_D_CLK1

SM_D_CLK2

SM_D_CLK3

SM_CKE0

SM_CKE1
SM_CKE2
SM_CKE3

SM_D_MA[0..12]

XOR layout note:
F20,E20,F12,E11 add
testpoint for factory

SM_D_BA0
SM_D_BA1

C605 .1UF

1 2

SM_D_MA[0..12] 13

+3V

1 2
C615 .1UF
R434 10

1 2
R433 101 2

+3V

SM_DQM[0..7] 14

SM_CS#0 14
SM_CS#1 14
SM_CS#2 14
SM_CS#3 14

+3V

SM_CKE0 14
SM_CKE1 14
SM_CKE2 14
SM_CKE3 14

VSSA_DPLL0
VSSA_DPLL1

SM_BA0 14
SM_BA1 14

R389 0

1 2

R424 0

1 2

*
*

Layout note :

VSSP_SM0

VSSP_SM1

VSSP_SM2

VSSP_SM3

VSSP_SM4

VSSP_SM5

VSSP_SM6

VSSP_SM7

VSSP_SM8

VSSP_SM9

VSSP_SM10

VSSP_SM11

VSSP_SM12

VSSP_SM13

VSSP_SM14

VSSP_SM15

VSSP_SM16

VSSP_SM17

VSSP_SM18

VSSP_SM19

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

B3B6B9

B12

B15

B18

B21

B24

B27E7E10

E13

E16

E19

E22

E25G9G21E4D28

12

12

C216
33PF

12

C641
33PF

C642
33PF

A

+VTT

H7

12

C217
33PF

H23K7K23L7N6T6W7Y7AB7

SMD_CLK0 14
SMD_CLK1 14
SMD_CLK2 14
SMD_CLK3 14

B

M24

P24

T24

V24

Y23

M14

M15

M16

P12

R12

T12

SM_VREF1

VCC

VCC

VCC

VCC

C20

D19

A21

A24

C24

E5

F24

P18

R18

T18

SM_OCLK

SM_RCLK

Layout note :

Line length 0.15 inches +- 50mils

12

C623
.1UF

+V_SMREF

Close to Ball E5 and F24

12

C624
.1UF

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

SM_RAS#

SM_CAS#

SM_WE#

SM_OCLK

SM_RCLK

SM_VREF0

1.Placement TP6 for Almador-M A2 stepping die.

2.The 0.1uF capacitor and connection to +3V
must be implanted for Almador-M A3 stepping
die.

SM_D_RAS#
SM_D_CAS#
SM_D_WE#

R428 101 2
R427 101 2
R429 101 2

1 2

C638 22PF

Layout note :

near pin C638

C

SM_RAS# 14
SM_CAS# 14
SM_WE# 14

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1421

Size Document Number Rev
Custom

401218

星期四 八月

D

Date: Sheet of

9 44, 22, 2002

E

1A

A

DVOB_D[0..11]15

RP13

DVOB_D0_R

DVOB_D015
DVOB_D115
DVOB_D715
DVOB_D315

1 1

DVOB_D615
DVOB_D415
DVOB_D515
DVOB_D215

DVOB_D915

DVOB_D815
DVOB_D1115
DVOB_D1015

2 2

M_DDC1_DATA15

M_DDC1_CLK15

M_DDC2_DATA15

M_I2C_DATA15

3 3

4 4

4 5

DVOB_D1_R

3 6

DVOB_D7_R

2 7

DVOB_D3_R

1 8

8P4R_22
RP27

DVOB_D6_R

4 5

DVOB_D4_R

3 6

DVOB_D5_R

2 7

DVOB_D2_R

1 8

8P4R_22
RP11

DVOB_D9_R

4 5

DVOB_D8_R

3 6

DVOB_D11_R

2 7

DVOB_D10_R

1 8

8P4R_22

DVOB_D7_R

R416 15_1%1 2
R417 15_1%1 2

R472 15_1%
1 2
1 2

R473 15_1%

R413 330

DVOB_BLANK#

1 2

DVOB_HSYNC
DVOB_VSYNC
DVOB_D1_R
DVOB_D0_R
DVOB_D3_R
DVOB_D2_R
DVOB_D5_R
DVOB_D4_R
DVOB_D6_R
DVOB_D9_R
DVOB_D8_R
DVOB_D11_R

DVOB_D10_R
DVOBC_CLKINT#
DVOB_FLD/STL

DPMS_CLK

R453

100K

1 2

DVOB_BLANK#15

DVOC_D517

DVOB_CLK15

DVOB_CLK#15

DVOC_CLK17

DVOC_CLK#17

M_I2C_CLK15

DVOB_HSYNC15

DVOB_VSYNC15

DVOBC_CLKINT#15,17

DVOB_FLD/STL15

M_DDC2_CLK15
DVOC_VSYNC17
DVOC_HSYNC17

DVOC_D017
DVOC_D117
DVOC_D217
DVOC_D317
DVOC_D417
DVOC_D717
DVOC_D617
DVOC_D917

DVOC_D817
DVOC_D1117
DVOC_D1017
DPMS_CLK15

Layout note :
Place close to AE16,

AE15 of GMCH

C518

1 2

68PF

U10C

AA29

AGP_SBA0/ZV_D8

AA24

AGP_SBA1/ZV_D7

AA25

AGP_SBA2/ZV_D6

Y24

AGP_SBA3/ZV_D5

Y27

AGP_SBA4/ZV_D2

Y26

AGP_SBA5/ZV_D1

W24

AGP_SBA6/ZV_D0

Y28

AGP_SBA7/ZV_HREF

L27

AGP_CBE#0/DVOB_D7

P29

AGP_CBE#1/DVOB_BLANK#

R27

AGP_CBE#2/ZV_VSYNC

T25

AGP_CBE#3/DVOC_D5

L29

AGP_ADSTB0/DVOB_CLK

L28

AGP_ADSTB#0/DVOB_CLK#

U29

AGP_ADSTB1/DVOC_CLK

U28

AGP_ADSTB#1/DVOC_CLK#

AA27

AGP_SBSTB/ZV_D4

AA28

AGP_SBSTB#/ZV_D3

R29

AGP_FRAME#/M_DDC1_DATA

P26

AGP_IRDY#/M_I2C_CLK

P27

AGP_TRDY#/M_DDC1_CLK

N25

AGP_STOP#/M_DDC2_DATA

R28

AGP_DEVSEL#/M_I2C_DATA

AC27

AGP_REQ#/ZV_CLK

AD29

AGP_GNT#/ZV_D15

P28

AGP_PAR/DVO_DETECT

J29

AGP_AD0/DVOB_HSYNC

J28

AGP_AD1/DVOB_VSYNC

K26

AGP_AD2/DVOB_D1

K25

AGP_AD3/DVOB_D0

L26

AGP_AD4/DVOB_D3

J27

AGP_AD5/DVOB_D2

K29

AGP_AD6/DVOB_D5

K27

AGP_AD7/DVOB_D4

M29

AGP_AD8/DVOB_D6

M28

AGP_AD9/DVOB_D9

L24

AGP_AD10/DVOB_D8

M27

AGP_AD11/DVOB_D11

N29

AGP_AD12/DVOB_D10

M25

AGP_AD13/DVOBC_CLKINT#

N26

AGP_AD14/DVOB_FLD/STL

N27

AGP_AD15/M_DDC2_CLK

R25

AGP_AD16/DVOC_VSYNC

R24

AGP_AD17/DVOC_HSYNC

T29

AGP_AD18/DVOC_BLANK#

T27

AGP_AD19/DVOC_D0

T26

AGP_AD20/DVOC_D1

U27

AGP_AD21/DVOC_D2

V27

AGP_AD22/DVOC_D3

V28

AGP_AD23/DVOC_D4

U26

AGP_AD24/DVOC_D7

V29

AGP_AD25/DVOC_D6

W29

AGP_AD26/DVOC_D9

V25

AGP_AD27/DVOC_D8

W26

AGP_AD28/DVOC_D11

W25

AGP_AD29/DVOC_D10

W27

AGP_AD30/DVOBC_INTR#/DPMS_CLK

Y29

AGP_AD31/DVOC_FLD/STL

ALMADOR-M

B

V14

V15

V16

AE16

AE15

VDD_LM

VDD_LM

VDD_LM

VDD_LM

AGP

Interface

(DVOB/DVOC & ZV port)

AGP_PIPE#/ZV_D10

AGP_WBF#/ZV_D9

AGP_RBF#/ZV_D11

AB26

AB29

AB25

AC28

+1.8VSB

+3V

AD15

AD16

AE25

AD23

J24

VDD_LM

VDD_LM

VDD_LM

VCCP_IO

VCCP_IO

AGP_ST0/ZV_D14

AGP_ST1/ZV_D13

AGP_ST2/ZV_D12

LM_CMD

LM_SCK

LM_SIO

AC29

AB27

AH7

AF7

AJ7

+1.5VS

F26

N24

W23

VCCP_HUB

VCCP_HUB

VCCQ_AGP

LM_RQ0

LM_RQ1

LM_RQ2

AG11

AJ12

AG12

AH13

C517 .1UF

12
12

C585 .1UF

J26

M26

R26

V26

AA26

L23

AA23

U24

VCCP_AGP

VCCP_AGP

VCCP_AGP

VCCP_AGP

VCCP_AGP

VCCP_AGP

VCCP_AGP

VCCQ_AGP

VCCP_AGP

Almador-M
GMCH

Local Memory
Inter face

LM_RQ3

LM_RQ4

LM_RQ5

LM_RQ6

LM_RQ7

LM_RCLK

LM_GCLK

LM_RAMREF0

AG13

AJ13

AG14

AJ14

AJ6

AG6

AD14

C

+VTT

+3V

AE6G7G10

VCCA_HPLL

VCCA_CPLL

Power

Interface

A3

LM_RAMREF1

LM_CTM

LM_CTM#

AE14

AH15

AJ15

G20

AF6

VCCQ_SM

VCCQ_SM

VCCPCMOS_LM

LM_CFM

LM_CFM#

AJ16

AH16

1 2

+1.8VSB+VTT

AE7

AC9

AC8

AF26

AG27F5J5M5R5V5AA5

VCCA_DAC

VCCPCMOS_LM

VCCPCMOS_LM

VCCPCMOS_LM

VCCP_SM

VCCP_SM

VCCP_SM

VCCP_SM

VCCP_SM

D5D8D11

D14

D17

D20

0_0805

+1.8VSB

R387

12

12

C535

C534

.01UF

.1UF

+VTT

AD5

AG5

VCC_H

VCC_H

VCC_H

VCC_H

VCC_H

VCC_H

VCCP_SM

VCCQ_SM

VCCQ_SM

G11

1 2

VCC_H

VCCP_SM

VCCQ_SM

VCCP_SM

G19

G23

AC10

VCCA_DAC

VCCP_SM

VCCP_SM

D23

D26F7F15

R369 10K
R370 10K1 2

12

C520
.1UF

E2

AC20

F25

VCC_H

VCC_H

VCCA_DPLL0

VCCA_DPLL1

(DVOA port)

Local Memory
Interface

VCC_LM

VCC_LM

VCC_LM

VCC_LM

VCC_LM

AC11

AD11

AD12

AD13

12

+1.5VS

AC21

AF21

AF24

VCCP_DVO

VCCP_DVO

Display

Interface

VCC_LM

VCC_LM

VCC_LM

AE18

AD17

AD18

AD19

C625
.1UF

150UF_6.3V_D2

DAC_VSYNC

VCCP_DVO

DAC_HSYNC

DAC_RED#

DAC_GREEN#

DAC_BLUE#

DAC_RED

DAC_GREEN

DAC_BLUE

IO_DDC1CLK

IO_DDC1DATA

DAC_REFSET

DVO_CLKIN

DVO_BLANK#

DVO_VSYNC
DVO_HSYNC

IO_I2CCLK

IO_I2CDATA

DVO_CLK#

DVO_CLK

DVO_D10
DVO_D11

IO_DDC2DATA

IO_DDC2CLK

DVO_INTR#
DVO_FIELD

LM_DQA0
LM_DQA1
LM_DQA2
LM_DQA3
LM_DQA4
LM_DQA5
LM_DQA6
LM_DQA7

LM_DQB0
LM_DQB1
LM_DQB2
LM_DQB3
LM_DQB4
LM_DQB5
LM_DQB6
LM_DQB7

AGP_BUSY#

VCC_LM

+3V

+VS_RIMMREF

D

C629

DVO_D0
DVO_D1
DVO_D2
DVO_D3
DVO_D4
DVO_D5
DVO_D6
DVO_D7
DVO_D8
DVO_D9

C640

150UF_6.3V_D2

L41 0_0805
1 2
1 2

L40 0_0805

+1.5VS

AE29
AD28
AF28
AG28
AH27
AF29
AG29
AH28

IO_DDC1CLK

AE27

IO_DDC1DATA

AD27
AJ27

1 2

R364 255_1%_0603
DVOA_CLKIN

AD20
AD21
AF23
AF22
AD25
AC25
AG24
AJ24

DVOA_D0

AJ22

DVOA_D1

AH22
AG22
AJ23
AH23

DVOA_D5

AG23

DVOA_D6

AE23
AE24
AJ25
AH25
AG25
AJ26

AD26
AE26

DVOA_INTR#

AE21

DVOA_FIELD

AE22

AG17
AJ17
AG18
AJ18
AG19
AJ19
AG20
AJ20

AJ11
AH10
AJ10
AG10
AJ9
AG9
AJ8
AG8

AGP_BUSY#

AC24

+1.8VSB

12

C521
68PF

VSSA_DPLL0 9
VSSA_DPLL1 9

R432 0
1 2
1 2

R436 0

R379 @2.2K1 2
R374 2.2K1 2

R367 @2.2K

R385 10K1 2
R390 10K1 2

XOR layout note: AE24,AJ25
add testpoint for factory

R383 10K1 2
R375 10K1 2

Strap Name Low High
DVOA_D0 Reserved 133MHz
DVOA_D1 IOQD=2 IOQD=8

+VTT

DVOA_D5 Desktop Mobile
DVOA_D6 Dual Ended Term Single Ended Term

1 2

DAC_VSYNC 16
DAC_HSYNC 16
DAC_RED# 16
DAC_GREEN# 16
DAC_BLUE# 16
DAC_RED 16
DAC_GREEN 16
DAC_BLUE 16

VCH_I2CDATA 15
VCH_I2CCLK 15

TV_OUT_DATA 17
TV_OUT_CLK 17

R395

1 2

*

@10K

AGP_BUSY# 19

DVOA_D6
DVOA_D5

DVOA_D0

VCH_DDCCLK 16
VCH_DDCDATA 16

+3VS

DVOA_CLKIN
DVOA_INTR#

DVOA_FIELD

+3VS

E

1 2

R371@2.2K

R380 100K
R381 100K
R382 10K

H_BSEL0 5,12

+1.5VS

1 2
1 2
1 2

+3VS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

B

12

C524
.1UF

C

12

C523
.1UF

D

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1421

Size Document Number Rev
Custom

401218

星期四 八月

Date: Sheet of

10 44, 22, 2002

E

1A

A

B

C

D

E

Layout note :
Distribute as close as possible

to GMCH Processor Quadrant .

+VTT

1 1

+VTT

12

12

C545
.1UF

12

C565
.1UF

12

C544

C543

.1UF

.1UF

12

12

C559

C554

.1UF

.1UF

12

12

C567

C562

.1UF

.1UF

12

12

C561

C572

.1UF

.1UF

12

12

C574
.1UF

12

C580
.1UF

12

12

C592

C593

.1UF

.1UF

12

12

C505

C506

.1UF

.1UF

12

C594

C571

.1UF

.1UF

12

12

C530

C540

.1UF

.1UF

Layout note :
Distribute as close as possible

to GMCH Local Memory Quadrant .

+1.8VSB

+1.8VS +1.8VSB

L46

1 2

CHB3216U121

12

12

C493

C529

+

22UF_16V_1206

82PF

2 2

3 3

+VTT

12

C497

+

220UF_4V_D2

+VTT

12

C628

+

220UF_4V_D2

+VTT

12

C550

+

220UF_4V_D2

+VTT

12

C542
.1UF

Layout note :
Distribute as close as possible

12

12

12

C498

C547

.1UF

.1UF

12

12

C618

C604

.1UF

.1UF

12

C552

C558

.1UF

.1UF

12

12

C575

C590

.1UF

.1UF

12

12

C570
.1UF

12

C503
.1UF

12

C577

C582

.1UF

.1UF

12

12

C511

C516

.1UF

.1UF

12

12

C588
.1UF

12

C553
.1UF

12

C596

C601

.1UF

.1UF

12

12

C621

C603

.1UF

.1UF

to GMCH AGP/DVO Quadrant .

+1.5VS

12

+

22UF_16V_1206

C502

12

C586
.1UF

Layout note :
Distribute as close as possible

12

12

12

C566
.1UF

12

C579
.1UF

12

C578
.1UF

12

C583
.1UF

C573
.1UF

12

12

C546

C557

.1UF

.1UF

12

12

C591

C595

.1UF

.1UF

12

12

C589

C539

.1UF

.1UF

C533
.1UF

12

C598
.1UF

12

12

C563

C581

.1UF

.1UF

12

12

C556

C622

.1UF

.1UF

to GMCH System Memory Quadrant .

+3V

12

+

22UF_16V_1206

C485

12

C606
.1UF

12

12

C510

C528

.1UF

.1UF

12

12

C576
C597
.1UF

82PF

12

12

C610
C607
.1UF

82PF

12

12

C514

C512

.1UF

82PF

12

12

C564

C551

.1UF

.1UF

12

12

C609

C611

.1UF

.1UF

12

12

C513

+

.1UF

12

12

C538
82PF

12

12

C614
82PF

C620
68UF_4V_B2

12

C527

C555

.1UF

.1UF

12

C632

C608

.1UF

.1UF

12

C495

+

68UF_4V_B2

12

12

C499
82PF

C619
82PF

12

C500
.1UF

12

C633
.1UF

12

C494

+

68UF_4V_B2

12

+

12

12

C548
C501
.1UF

82PF

12

12

C612
C634
.1UF

82PF

C626

+

@68UF_4V_B2

12

C584
.1UF

12

C635
.1UF

12

C496
@68UF_4V_B2

12

12

C637
.1UF

C636
.1UF

12

C613
.1UF

Layout note :

+VTT

12

C627

+

220UF_4V_D2

4 4

12

C569

+

220UF_4V_D2

Distribute as close as possible
to IO Quadrant .

+3V

12

C639

+

22UF_16V_1206

12

12

C631
.1UF

C630
.1UF

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA-1421

Size Document Number Rev
Custom

401218

星期四 八月

Date: Sheet of

11 44, 22, 2002

E

1A

A

B

C

D

E

+3VS

Check Bead Value
should be 19.6K

1 1

+3VS

+3VS

+3VS

12

12

12

R182
10K

H_BSEL15
H_BSEL05,10

2 2

CLK_ICH4819

CLK_DREF8

3 3

CLK_ICH1419
CLK_SIO1427

CLK_DAC_1430

12

R177
@0

R134

R133

1K

1K

SEL2
SEL1
SEL0

12

12

R135

R136

@0

@0

VTT_PWRGD#5,32

CLK_DAC_14

12

12

C241

C247

22PF

22PF

Place Crystal within 500 mils of CK_Titan

C222 5PF

1 2

caps are internal
to CK_TITAN

1 2

R202 4.7K1 2

R196 4.7K
R181 331 2

1 2

1 2

1 2

R179 01 2

R185 @01 2

R141 01 2

R161 10K1 2

1 2

* 221_1%

* 33

* 33

PM_SLP_S1#19,32
PM_SLP_S3#19,32

PM_STPPCI#19

PM_STPCPU#19

+3V

SMB_DATA7,14,19

SMB_CLK7,14,19

+3V

CLK_VCH15

R172 220_1%_0603

R166 221 2

R173 221 2

R123 331 2
R122 33

R124 @33

Place caps. near
CK Titan

12

Y2

14.318MHZ

L23
CHB2012U170

1 2

2

40
55
54

25
34
53

28

43

29
30

33
35

42

39

38

56

+3V_CLK

U15

XTAL_IN

SEL2
SEL1
SEL0

PWR_DWN#
PCI_STOP#
CPU_STOP#

VTT_PWRGD#

MULT0

SDATA
SCLK

3V66_0/DRCG
3V66_1/VCH_CLK

IREF

48MHZ_USB

48MHZ_DOT

REF

ICS950805

Width=40 mils

181419323746

VDD_PCI

VDD_PCI

VDD_REF

VDD_3V66

VDD_3V66

GND_REF

GND_PCI

GND_PCI

GND_3V66

GND_3V66

491520313641

12

+

C209

22UF_16V_1206

50

VDD_CPU

VDD_CPU

VDD_CORE

VDD_48MHZ

GND_COREXTAL_OUT

CPUCLKT2

CPU_CLKC2

CPUCLKT1

CPUCLKC1
CPUCLKT0

CPUCLKC0

66MHZ_IN/3V66_5

66MHZ_OUT2/3V66_4
66MHZ_OUT1/3V66_3
66MHZ_OUT0/3V66_2

PCICLK_F2
PCICLK_F1
PCICLK_F0

PCICLK6
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK0

GND_48MHZ

GND_IREF

GND_CPU

47

12

C251
.01UF

L24
CHB2012U170
1 2

12

+

C268
22UF_16V_1206

CLK_BCLK

CLK_BCLK#
CLK_GCLK

CLK_GCLK#

1 2

1 2

1 2

12

C259
.01UF

12

12

C228

C214

.01UF

.01UF

+3VS

12

R358
475_1%_0603

12

R148
475_1%_0603

PCIF1
PCIF0

12

12

C234

C230

.01UF

.01UF

26

12

C265

.01UF
273
45

44
49

48
52

51
24

23

R186 33

22

R180 331 2

21

7

R143 331 2

R125 33

6
5

R140 @331 2

18

R174 331 2

R171 33

17

R168 331 2

16
13

R162 331 2
12

R158 331 2
11
10

12

12

C239
.01UF

Place all these Block's
Components near CK_Titan

1 2C227 5PF

R356 33

1 2

R350 61.9_1%_0603

R363 61.9_1%_0603

1 2

R359

1 2

R144 33

1 2

R139 61.9_1%_0603

R160 61.9_1%_06031 2
R151 33

1 2

12

C253
@10PF

12

C249
.01UF

C257
@10PF

12

C223
.01UF

331 2

Place caps. near
CK_Titan

CLK_HCLK 5

Place all these Block's
Components near CPU

CLK_HCLK# 5
CLK_GHT 8

Place all these Block's
Components near GMCH

CLK_GHT# 8

CLK_GBOUT 8

CLK_GBIN 8
CLK_ICHHUB 19

CLK_ICHPCI 19

CLK_PCI_CB 25
CLK_LPC_EC 32
CLK_LPC_SIO 27
CLK_PCI_DBC 27
CLK_PCI_LAN 23

22_0402

R200

12

10PF

C264

Place near CPU

R72 26.7_1%_0603

PCIF1

1 2

SEL2 SEL1 SEL0 CPUCLKC[0..2] CPUCLKT[0..2]

1 0 0 66.67 66.67
1 0 1 100.00 100.00
1 1 0 200.00 200.00
1 1 1 133.33 133.33

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

PCIF0

12

R68

137_1%_0603

D

1 2
R119
@51.1_1%_0603

Title

Size Document Number Rev
Custom

Date: Sheet of

12

R115
0_0603
0 ohm resistor for ICH3 doesn't
need to support APIC function.

Compal Electronics, inc.

SCHEMATIC, M/B LA-1421

401218

星期四 八月

CLK_CPU_APIC 5
CLK_ICHAPIC 19

12 44, 22, 2002

E

1A

A

B

C

D

E

1 1

Layout note :
One .1uF cap per power pin .

Place each cap close to SODIMM(DIMM 0) pin .

+3V

SM_D_MA[0..12]9 MAA[0..12] 14

SM_D_MA3
SM_D_MA2
SM_D_MA0
SM_D_MA1

SM_D_MA6
SM_D_MA4
SM_D_MA7
SM_D_MA5

SM_D_MA8

2 2

SM_D_MA9
SM_D_MA10
SM_D_MA11

RP21
1 8
2 7
3 6
4 5

8P4R_10

RP22
1 8
2 7
3 6
4 5

8P4R_10

RP28
1 8
2 7
3 6
4 5

MAA3
MAA2
MAA0
MAA1

MAA6
MAA4
MAA7
MAA5

MAA8
MAA9
MAA10
MAA11

8P4R_10

SM_D_MA12

1 2

MAA12

R435 10

12

C288
.1UF

+3V

12

C274

+

22UF_16V_1206

Layout note :
One .1uF cap per power pin .

Place each cap close to SODIMM(DIMM 1) pin .

C287

1000PF

12

C286
.1UF

C285

1000PF

12

C284
.1UF

C283

1000PF

12

C281
.1UF

C280

1000PF

12

C320
.1UF

C321

1000PF

12

C322
.1UF

C325

1000PF

12

C326
.1UF

C323

1000PF

12

C348
.1UF

C317

1000PF

12

C319

C318

1000PF

.1UF

+3V

12

C346
.1UF

C345

1000PF

12

C344
.1UF

C343

1000PF

12

C342
.1UF

C341

1000PF

12

C340
.1UF

C375

1000PF

12

C282
.1UF

C377

1000PF

12

C378
.1UF

C379

1000PF

12

C381
.1UF

C382

1000PF

12

C383
.1UF

C384

1000PF

12

C376

C385

1000PF

.1UF

+3V

12

C350

+

3 3

22UF_16V_1206

4 4

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA-1421

Size Document Number Rev
Custom

401218

星期四 八月

Date: Sheet of

13 44, 22, 2002

E

1A

A

SO-DIM 144 PINS
RAM MODULE CONN.

MD0

1 1

MAA[0..12]13

MD[0..63]9

SM_DQM[0..7]9

2 2

3 3

MAA[0..12]

MD[0..63]
SM_DQM[0..7]

SMD_CLK09

SM_RAS#9
SM_WE#9
SM_CS#09
SM_CS#19

MD1
MD2
MD3

MD4
MD5
MD6
MD7

SM_DQM0
SM_DQM4

MAA0
MAA1
MAA2

MD32
MD33
MD34
MD35

MD36
MD37
MD38
MD39

R253

C347

22

22PF

SM_RAS# SM_CAS#
SM_WE# SM_CKE1
SM_CS#0 MAA12
SM_CS#1

MD16
MD17
MD18
MD19

MD20
MD21
MD22
MD23

MAA6 MAA7
MAA8

MAA9
MAA10 MAA11

SM_DQM2
SM_DQM6

MD48
MD49
MD50
MD51

MD52
MD53
MD54
MD55

SDADIMM0 SCKDIMM0

BANK 0/1

+3V +3V

JP18

1

VSS

3

DQ0

5

DQ1

7

DQ2

9

DQ3

11

VCC

13

DQ4

15

DQ5

17

DQ6

19

DQ7

21

VSS

23

CE0#

25

CE1#

27

VCC

29

A0

31

A1

33

A2

35

VSS

37

DQ8

39

DQ9

41

DQ10

43

DQ11

45

VCC

47

DQ12

49

DQ13

51

DQ14

53

DQ15

55

VSS

57

RESVD/DQ64

59

RESVD/DQ65

61

RFU/CLK0

63

VCC

65

RFU

67

WE#

69

RE0#

71

RE1#

73

OE#/RESVD

75

VSS

77

RESVD/DQ66

79

RESVD/DQ67

81

VCC

83

DQ16

85

DQ17

87

DQ18

89

DQ19

91

VSS

93

DQ20

95

DQ21

97

DQ22

99

DQ23

101

VCC

103

A6

105

A8

107

VSS

109

A9

111

A10

113

VCC

115

CE2#/RESVD

117

CE3#/RESVD

119

VSS

121

DQ24

123

DQ25

125

DQ26

127

DQ27

129

VCC

131

DQ28

133

DQ29

135

DQ30

137

DQ31

139

VSS

141

SDA

143

VCC
S O-DIMM144-STANDRD

DIMM0

4 4

+3V

RP23

SCKDIMM1

1 8

SCKDIMM0

2 7

SDADIMM1

3 6

SDADIMM0

4 5

8P4R_10K

A

B

VSS
DQ32
DQ33
DQ34
DQ35

VCC
DQ36
DQ37
DQ38
DQ39

VSS

CE4#
CE5#

VCC

A3
A4
A5

VSS
DQ40
DQ41
DQ42
DQ43

VCC
DQ44
DQ45
DQ46
DQ47

VSS

RESVD/DQ68
RESVD/DQ69

RFU/CKE0

VCC

RFU

RFU/CKE1

RFU

RFU

RFU/CLK1

VSS

RESVD/DQ70
RESVD/DQ71

VCC
DQ48
DQ49
DQ50
DQ51

VSS
DQ52
DQ53
DQ54
DQ55

VCC

A7

A11/BA0

VSS

A12/BA1
A13/A11

VCC

CE6#/RESVD
CE7#/RESVD

VSS
DQ56
DQ57
DQ58
DQ59

VCC
DQ60
DQ61
DQ62
DQ63

VSS

SCL

VCC

B

2

MD8

4

MD9

6

MD10

8

MD11

10
12

MD12

14

MD13

16

MD14

18

MD15

20
22

SM_DQM1

24

SM_DQM5

26
28

MAA3

30

MAA4

32

MAA5

34
36

MD40

38

MD41

40

MD42

42

MD43

44
46

MD44

48

MD45

50

MD46

52

MD47

54
56
58
60

SM_CKE0

62
64
66
68
70
72
74
76
78
80
82

MD24

84

MD25

86

MD26

88

MD27

90
92

MD28

94

MD29

96

MD30

98

MD31

100
102
104

SM_BA0

106
108

SM_BA1

110
112
114

SM_DQM3

116

SM_DQM7

118
120

MD56

122

MD57

124

MD58

126

MD59

128
130

MD60

132

MD61

134

MD62

136

MD63

138
140
142
144

PROPRIETARY NOTE

C

+3V+3V

C386

+

10UF_10V_1206

SM_CKE0 9

SM_CKE1 9

R282
22

C380
22PF

SM_BA0 9
SM_BA1 9

SM_SEL019

SMB_CLK7,12,19

SMB_DATA7,12,19

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C387

+

10UF_10V_1206

SMD_CLK1 9

C303

6

INH

10

A

9

B

3

X

13

Y

.1UF

+3V

7

C

16

GND

8

VCC

GND

+3V

X0
X1
X2
X3

Y0
Y1
Y2
Y3

+

C277

10UF_10V_1206

SMD_CLK29

SM_CS#29
SM_CS#39

U26

SCKDIMM0

1

SCKDIMM1

5
2
4

SDADIMM0

12

SDADIMM1

14
15
11

74HC4052

BANK 2/3

+3V +3V

MD0
MD1
MD2
MD3

MD4
MD5
MD6
MD7

SM_DQM0
SM_DQM4

MAA0
MAA1
MAA2

MD32
MD33
MD34
MD35

MD36
MD37
MD38
MD39

C276

R210

22PF

22

SM_RAS# SM_CAS#

SM_WE# SM_CKE3
SM_CS#2 MAA12
SM_CS#3

MD16
MD17
MD18
MD19

MD20
MD21
MD22
MD23

MAA6 MAA7
MAA8

MAA9
MAA10 MAA11

SM_DQM2
SM_DQM6

MD48
MD49
MD50
MD51

MD52
MD53
MD54
MD55

SDADIMM1

SM_SEL0 X/Y

0 SCKDIMM0

SCKDIMM11

D

JP16

1

VSS

3

DQ0

5

DQ1

7

DQ2

9

DQ3

11

VCC

13

DQ4

15

DQ5

17

DQ6

19

DQ7

21

VSS

23

CE0#

25

CE1#

27

VCC

29

A0

31

A1

33

A2

35

VSS

37

DQ8

39

DQ9

41

DQ10

43

DQ11

45

VCC

47

DQ12

49

DQ13

51

DQ14

53

DQ15

55

VSS

57

RESVD/DQ64

59

RESVD/DQ65

61

RFU/CLK0

63

VCC

65

RFU

67

WE#

69

RE0#

71

RE1#

73

OE#/RESVD

75

VSS

77

RESVD/DQ66

79

RESVD/DQ67

81

VCC

83

DQ16

85

DQ17

87

DQ18

89

DQ19

91

VSS

93

DQ20

95

DQ21

97

DQ22

99

DQ23

101

VCC

103

A6

105

A8

107

VSS

109

A9

111

A10

113

VCC

115

CE2#/RESVD

117

CE3#/RESVD

119

VSS

121

DQ24

123

DQ25

125

DQ26

127

DQ27

129

VCC

131

DQ28

133

DQ29

135

DQ30

137

DQ31

139

VSS

141

SDA

143

VCC
SO-DIMM144 REVERSE

DIMM1

D

VSS
DQ32
DQ33
DQ34
DQ35

VCC
DQ36
DQ37
DQ38
DQ39

VSS

CE4#
CE5#

VCC

A3
A4
A5

VSS
DQ40
DQ41
DQ42
DQ43

VCC
DQ44
DQ45
DQ46
DQ47

VSS

RESVD/DQ68
RESVD/DQ69

RFU/CKE0

VCC

RFU

RFU/CKE1

RFU

RFU

RFU/CLK1

VSS

RESVD/DQ70
RESVD/DQ71

VCC
DQ48
DQ49
DQ50
DQ51

VSS
DQ52
DQ53
DQ54
DQ55

VCC

A7

A11/BA0

VSS

A12/BA1
A13/A11

VCC

CE6#/RESVD
CE7#/RESVD

VSS
DQ56
DQ57
DQ58
DQ59

VCC
DQ60
DQ61
DQ62
DQ63

VSS

SCL

VCC

Title

Size Document Number Rev

Custom

Date: Sheet of

2

MD8

4

MD9

6

MD10

8

MD11

10
12

MD12

14

MD13

16

MD14

18

MD15

20
22

SM_DQM1

24

SM_DQM5

26
28

MAA3

30

MAA4

32

MAA5

34
36

MD40

38

MD41

40

MD42

42

MD43

44
46

MD44

48

MD45

50

MD46

52

MD47

54
56
58
60

SM_CKE2

62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144

MD24
MD25
MD26
MD27

MD28
MD29
MD30
MD31

SM_BA0
SM_BA1

SM_DQM3
SM_DQM7

MD56
MD57
MD58
MD59

MD60
MD61
MD62
MD63

SCKDIMM1

SM_CKE2 9
SM_CAS# 9

SM_CKE3 9

R239
22

C324
22PF

Compal Electronics, inc.

SCHEMATIC, M/B LA-1421

401218

星期四 八月

E

E

SMD_CLK3 9

1A

14 44, 22, 2002

5

12

C58
10UF_10V_1206

12

D D

C C

B B

A A

DVOB_CLK
DVOB_CLK#

DVOB_FLD/STL10

CLK_VCH

R70
22

1 2

C121
10PF

C135
.1UF

+1.5VS

12

12

R97
22

1 2

C178
10PF

R100

2K_1%

R95

2K_1%

NTSC/PAL_SELECT17,20

12

C70
.1UF

12

C173
.1UF

12

C50
.1UF

DVOB_D[0..11]10

R96
22

1 2

C177
10PF

R99

12

DVOB_HSYNC10

R101
75_1%

LCD_VREF

12

C175
10UF_10V_1206

5

12

C104
.1UF

12

C172
.1UF

12

C49
.1UF

15_1%1 2

DVOB_VSYNC10

PID316,27
PID216,27
PID116,27
PID016,27

VCH_I2CDATA10
VCH_I2CCLK10

+1.8VS_VCH

12

12

C109
.1UF

12

C171
.1UF

12

C170
.1UF

DVOB_CLK10

DVOB_CLK#10

DVOB_BLANK#10

NTSC/PAL_SELECT

R98 36.5_1%

1 2

R45 2.2K12

PCIRST#8,17,19,21,22,23,25,26,27,33

CLK_VCH12

C174
.01UF

12

C117
.1UF

12

C51
.1UF

12

C169
.1UF

DVOB_D1
DVOB_D2
DVOB_D3
DVOB_D4
DVOB_D5
DVOB_D6
DVOB_D7
DVOB_D8
DVOB_D9
DVOB_D10
DVOB_D11

DVOB_HSYNC
DVOB_VSYNC

LCD_VREF

PID3
PID2
PID1
PID0

R474 0

+3VS

+3VS

+3VS

M11

P10
N10

M10

P9

M9

P8
P7
N7

M7

P6
N6

M8

N8
N11
P12
P11
N12
P13

F13
E14
F12
E13
E12
C13
B13
C14
C12

12

D13
D12

N9
B14

D14

M12

82807

M_DDC1_DATA10

M_DDC1_CLK10

M_DDC2_DATA10

M_DDC2_CLK10

M_I2C_DATA10

M_I2C_CLK10

DVOBC_CLKINT#10,17

1 2

FBM-11-160808-121

1 2

FBM-11-160808-121

1 2

FBM-11-160808-121

U6

DVODATA0
DVODATA1
DVODATA2
DVODATA3
DVODATA4
DVODATA5
DVODATA6
DVODATA7
DVODATA8
DVODATA9
DVODATA10
DVODATA11

CLKIN
CLKIN#
BLANK#
CLKOUT
LCD_HDE#
LCD_VDE#
LCD_VREF

GPIO8
GPIO7
GPIO6
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
GPIO0

I2C_DATA
I2C_CLK

DVOrCOMP
TESTIN

PCIRST#

OSC

VSS1

A1

M_DDC1_DATA
M_DDC1_CLK
M_DDC2_DATA
M_DDC2_CLK
M_I2C_DATA
M_I2C_CLK
DVOBC_CLKINT#

4

L13

L14

L19

VSS2

A14B1C4

R414
@ 10K

4

+3VS_VCH

+3VS_VCH

+3VS_VCH

+3VS_VCH

A2

A13C9D4D6D9E4F11G4H4J4K4L6C6D5D10E8E11F4G11

VCC_3V1

VCC_3V2

VCC_3V3

VCC3_3V4

VCC3_3V5

VCC3_3V6

VCC3_3V7

VCC3_3V8

VCC3_3V9

VCC3_3V10

VCC3_3V11

VCC3_3V12

+1.8VS

L18

FBM-11-160808-121

1 2

+1.8VS_VCH

VCC1_8V1

VCC3_3V13

VCC3_3V14

VCC1_8V16

VCC1_8V2

VCC1_8V3

VCC1_8V5

VCC1_8V7

VCH

VSS3

VSS4

VSS7

VSS8

VSS9

VSS10

VSS11

VSS12

VSS13

VSS14

VSS15

VSS16

VSS17

VSS5

VSS18

VSS19

VSS20

VSS21

VSS22

VSS23

VSS6

VSS24

VSS25

VSS26

VSS27

VSS28

VSS29

VSS30

D11E5E6E7E9

E10F5F6F7F8F9F10G5G6G7G8G9G10H5H6H7H8H9H10J5J6J7J8J9J10K5K6K7K8K9K10L4N14P1P14

+1.5VS

R74 4.7K
R83 4.7K
R410 4.7K
R94 4.7K
R79 4.7K
R408 4.7K
R411 10K

PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

H11

J11

K11L5L7L8L9

VCC1_8V6

VCC1_8V8

VCC1_8V9

VCC1_8V10

VSS31

VSS32

VSS33

VSS34

3

+1.8VS_VCH

+1.8VS_VCH

N13C5L10

VCC1_8V11

VCC1_8V12

VCC1_8V13

VCC1_8V14

VSS35

VSS36

VSS37

VSS40

TXD016

TXD0#16

P_TXD116

TXD1#16

TXD216

TXD2#16

TXC016

TXC0#16

+1.8VS_VCH+1.8VS_VCH

L20

1 2

FBM-11-160808-121

L22

1 2

FBM-11-160808-121

VCCA

VCC1_8V15

VSS38

VSS39

VSS41

VSS42

VSS43

VSS44

+1.8VS

+1.8VS

C10

C7

H14

H13

H12

J14

K14

K13

K12

VCCBA

VCCDA

TV_DATA0

TV_DATA1

TV_DATA2

TV_DATA3

TV_DATA4

TV_DATA5

VSSA

VSSBA

VSSDA

YA0P

YA0M

YA1P

YA2P

YA1M

L11

C11

C8

A3B3A4A5B4B5A7B7A6B6A8B8A9B9A10

TXD2

TXD0

TXD0#

TXD1#

P_TXD1

12

C55
.1UF

L14

L13

TV_DATA6

TV_DATA7

TV_DATA8

YA2M

YA3P

YA3M

TXD2#

DPMS_CLK10

1 2

L12

M14

M13

TV_DATA9

TV_DATA10

CLKAP

CLKAM

TXC0

TXC0#

TV_DATA11

TXD4

2

1.5V level clock

L12

+1.8VS_VCH

L0805

G14

G13

G12

F14

J13

TV_CLKIN

TV_VSYNC

TV_HSYNC

TV_BLANK#

YA4P

YA4M

YA5P

YA5M

YA6P

YA6M

B10

A11

TXD5

TXD6

TXD5#

TXD6#

TXD4#

2

DPMS_CLK RTCCLK

R59

604_1%_0603

R62 10K_1%

J12

VREF_HI

VREF_LO

TV_CLKOUT

TV_CLKOUT#

ENEXBUF

YA7P

YA7M

CLKBP

CLKBM

B11

A12

B12

TXC1

TXC1#

R58

732_1%_0603

1 2

12

D8
D7

E3

P0

E2

P1

E1

P2

F3

P3

F2

P4

F1

P5

G3

P6

G2

P7

G1

P8

H3

P9

H2

P10

H1

P11

J3

P12

J2

P13

J1

P14

K3

P15

K2

P16

K1

P17

L3

P18

L2

P19

L1

P20

M3

P21

M2

P22

M1

P23

N1

P24

N2

P25

P2

P26

N3

P27

P3

P28

M4

P29

N4

P30

P4

P31

M5

P32

N5

P33

P5

P34

M6

P35

C1

FLM

B2

LP

D2

DE

D3

SHFCLK

C2

ENABKL

C3

ENAVDD

D1

TXC1# 16
TXC1 16
TXD6# 16
TXD6 16
TXD5# 16
TXD5 16
TXD4# 16
TXD4 16

Title

Size Document Number Rev

Custom

Date: Sheet of

U9D

8 9

12

74LVC14

14 7

12

+3VS

C92
.1UF

+1.8VS_VCH

VCH_VREFHI
VCH_VREFLODVOB_D0

+3VS_VCH

ENABKL
ENVDD

R46 150 _1%12
R47

12

C152
10UF_10V_1206

150_1%1 2

12

12

12

ENABKL 16
ENVDD 16

Compal Electronics, inc.

SCHEMATIC, M/B LA-1421

401218

星期四 八月

C48
.1UF

C47
.1UF

C82
.1UF

1

RTCCLK 19,25,26

12

C52
.1UF

12

C102
.1UF

12

C118
.1UF

1

12

12

C53

C54

.1UF

.1UF

12

12

C110

C105

.1UF

.1UF

12

12

C94

C88

.1UF

.1UF

15 44, 22, 2002

1A

A

LVDS Connector

LCDVDD +5V

Q13

2N7002

ENVDD

12

100

13

2

R40
10K

R29
10K

R28

13

47K

22K

2

22K

Q12

DTC124EK

1 1

ENVDD

2 2

+12V

R27
100K

13

22K

2

22K

DTC124EK

Q10

R26
200K

B

LVDDVGA

+ C43

LCDVDD

+ C32

4.7UF_10V_1206

10UF_10V_1206

C30

1000P

13

2

Q11

SI2302DS

C29

100PF

C

+3VS

R25

4.7K

+3VS

D6

RB751V
D7

RB751V

RP4
1 8
2 7
3 6
4 5

8P4R-10K

ENABKL15

ENBKL32

DISPOFF#

21

C28

21

PID0
PID1
PID2
PID3

1000P

PID0 15,27
PID1 15,27
PID2 15,27
PID3 15,27

D

+5VALW

C27

22UF_16V_1206

1 2

INVT_PWM32

+5V

C690

+3V

1000PR39

PID0
PID1
PID2
PID3
ENVDD

DISPOFF#

TXD415
TXD515
TXD615
TXC115

JP2

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50

HEADER 25X2-LCD

E

DISPOFF#

1 2

L10

CHB2012U170

DAC_BRIG 32

LCDVDD

TXD0# 15
TXD0 15

TXD1# 15
P_TXD1 15

TXD2# 15
TXD2 15

TXC0# 15
TXC0 15

TXD4# 15
TXD5# 15
TXD6# 15
TXC1# 15

LVDDVGA

CRT Connector

*

1 2

0.1UF

C67

1 2

C492

1 2

C491

M_SEN#20

0.1UF

+12VS

0.1UF

*
*

*

*
*

12

R11

C17
18PF

75

1 2

12

C10

R4

18PF

75

1 2

R16 100K

12

C700
1000PF

R337

75

13

2

+5VS

12

R6
10K

FCM2012C80_0805

FCM2012C80_0805

FCM2012C80_0805

12

C460
18PF

1 2

1 2

Q6

R339 0

2N7002

1 2

13

R13 0
Q4

2N7002

2

B

L7

1 2

L9

1 2

L36

1 2

DAN217

2

12

C13
15PF

L35
1 2
CHB1608B121

L8

1 2

CHB1608B121

+5VS

+5VS

R_CRT_VCC

1

1

D37

DAN217

2

3

12

C463
15PF

12

C462
68PF

*10PF *10PF

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

1

D36

DAN217

3

2

3

12

C461
15PF

12

12

C14

C11

68PF

100PF

C

D3

2 1D1

RB491D

12

C12
100PF

220PF

F1

FUSE_1A

C15

12

C18
.1UF

CRT_VCC

21

12

12

CRT_VCC

C19
220PF

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

5VDDCDA

5VDDCCL

JP8
CRT-15P

D

CRT_VCC

12

CRT_VCC

12

R14

R7

2.2K

2.2K

1 3

Q48

2N7002

Title

Size Document Number Rev
Custom

Date: Sheet of

2

1 3

+3VS +3VS

12

R342

10K

R15

10K

12

R341

2.2K

2

+3VS

12

Q3
2N7002

Compal Electronics, inc.

SCHEMATIC, M/B LA-1421

401218

星期四 八月

E

VCH_DDCDATA 10

VCH_DDCCLK 10

1A

16 44, 22, 2002

DAC_RED#10

DAC_GREEN#10

3 3

DAC_BLUE#10

DAC_RED10

DAC_GREEN10

DAC_BLUE10

4 4

FROM GMCH

1 2

R52 36.5_1%_0603

1 2

R361 36.5_1%_0603

1 2

R360 36.5_1%_0603

R5 10_5%1 2

R12 10_5%1 2

R338 10_5%1 2

DAC_HSYNC10

DAC_VSYNC10

A

5

D D

+5VS +5VS

4

+1.5VS

C661
.1UF

+3VS

3

C660

22UF_16V_1206

2

12

1

.1UF

C668

12

C669
.1UF

CH7007

44

1
2
3
4
6
7

9
10
11
12
13

27
26

42
43

40
41
37

32
33

35
29

C670

.1UF

U46

D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11

SC
SD

H
V

XCLK
XCLK#
P-OUT

XI/FIN
XO

DS/BCO
RESET#

GND

1923828183436

255163038

VDD

DVDD

DVDD

GND

DGND

DGND

DVDD

DVDD2

CVBS/B

CSYNC

GPIO0
GPIO1

VREF

DGND

DGND

C/G

ISET

Y/R

31

AVDD

AGND

21

22

20

17

14
15

39
24

ANALOG
GND

TV_SYNC

12

C672

22UF_16V_1206

GPIO_0
GPIO_1

ISET

*

R464
360_1% 0603

CRMA 18

LUMA 18

COMPS 18

TV_SYNC 18

12

C673

.1UF

+1.5VS

NTSC/PAL_SELECT15,20

R462
10K_1%

C678 .1UF

TV_SYNC

R463
10K_ 1%

@ 365K_1% 0603

10K_1%

R466
75_1%

+3VS

PAL

R455

MODE

NTSC/PAL_SELECT

R457

R454

0

@ 0

R458

GPIO_0

12

C674

.1UF

R456
@365K_1% 0603

*

GPIO_1

12

C675
.1UF

R461
@365K_1% 0603

*

TCX0

C667

12

1 2

L47

L_0603

PCIRST#8,15,19,21,22,23,25,26,27,33

TV_OUT_CLK
TV_OUT_DATA

DVOC_CLK
DVOC_CLK#

12

C663

22UF_16V_1206

C C

R459

4.7K

12

C676

22PF

B B

+3VS+3VS

12

DVOBC_CLKINT#10,15

12

C679
10PF_+-1%

R460

4.7K
TV_OUT_DATATV_OUT_CLK

C677

22PF

Y4

1 2

14.318MHZ

1 2

R465

@2M

12

12

.1UF

C665

C666

.1UF

TCX1

12

C680
10PF_+-1%

22UF_16V_1206

DVOC_D010
DVOC_D110
DVOC_D210
DVOC_D310
DVOC_D410
DVOC_D510
DVOC_D610
DVOC_D710
DVOC_D810

DVOC_D910
DVOC_D1010
DVOC_D1110

TV_OUT_CLK10
TV_OUT_DATA10

DVOC_HSYNC10
DVOC_VSYNC10

DVOC_CLK10

DVOC_CLK#10

12

C691

10PF

A A

Compal Electronics, inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

5

4

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

3

2

Title

Size Document Number Rev
Custom

Date: Sheet of

SCHEMATIC, M/B LA-1421

401218

星期四 八月

17 44, 22, 2002

1

1A

5

D D

4

3

2

1

TV_OUT CONN.

1

3

L43

1 2

L44

1 2

L45

1 2

D39

DAN217

2

C684

47PF

1

3

12

D38

DAN217

2

L42

R480 10

C C

LUMA17

CRMA17

COMPS17

1 2

R481 10

1 2

R482 10

1 2

TV_SYNC17

12

12

R470

R469

75

75

TV_GND

@FBM-11-160808-121

12

R471

75

1 2

12

C681

47PF

12

C682
47PF

FBM-11-160808-121

FBM-11-160808-121

FBM-11-160808-121

12

C683

47PF

12

C685

47PF

12

C686

D40
DAN217

2

47PF

1

12

C687
@470PF

1 2

R467 @0

3

1 2

R468 0

R559 For VCH (CH7011)

+3VS

+5VS

R560 For CH7007

JP23

1
2
3
4
5
6
7

S CONN._SUYIN

B B

A A

Compal Electronics, inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

5

4

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

3

2

Title

Size Document Number Rev
Custom

Date: Sheet of

SCHEMATIC, M/B LA-1421

401218

星期四 八月

18 44, 22, 2002

1

1A

A

R164 100K

R91
10K

PM_BATLOW#32

1 2

R231 10M

12

R232

2.4M

12

PM_CPUPERF#5,21

PM_DPRSLPVR7,40

G2

M4
M5

G4
G1

C298
12PF

PM_GMUXSEL7,40

PM_RSMRST#35

PM_CLKRUN#21,25,27,32

J2

K1

J4
K3
H5
K4
H3
L1
L2

L4
H4

J3

J1
F5
N2

P2
P1

F2
P3
F3
R1
E2
N4
D1
P4
E1
P5

K2
K5
N1
R2

A4
E3
D2
D5
B4

D3
F4
A3
R4
E4

ATF_INT#32

SUS_STAT#23,27,33

PM_STPPCI#12

PM_STPCPU#12

PM_SLP_S5#32
PM_SLP_S3#12,32
PM_SLP_S1#12,32

ICH_RI#21

SYS_PWROK35

AGP_BUSY#10

U12A

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4

PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4

ICH3-M

12

PBTN#21

PM_LANPWROK

1 2

R230 10M

X1

32.768KHZ

PM_RSMRST#

1 2

V4Y5AB3V5AC2

PM_BATLOW#

PM_AUXPWROK

PM_AGPBUSY#/GPIO6

PCI

Interface

VSS0

VSS1

VSS2

VSS3

A1

A13

A16

A17

RTC_VBIAS
RTC_X1

RTC_X2

12

C299
12PF

R1840

AB21

AB1

AA6

AA1

AA7

W20

AA5

AA2

PM_RI#

PM_PWROK

PM_SLP_S3#

PM_PWRBTN#

PM_RSMRST#

PM_DPRSLPVR

PM_CLKRUN#/GPIO24

PM_C3_STAT#/GPIO21

VSS4

A20

A23B8B10

PM_SLP_S1#/GPIO19

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

VSS5

VSS6

VSS7

VSS8

VSS9

VSS10

VSS11

VSS12

B13

B14

B15

B18

B19

B20

+RTCVCC

PM_SUSCLK

12

PCI_C/BE#023,25,27
PCI_C/BE#123,25,27
PCI_C/BE#223,25,27
PCI_C/BE#323,25,27

PCI_GNT#021
PCI_GNT#121
PCI_GNT#221,25
PCI_GNT#321,23
PCI_GNT#421

PCI_REQ#021
PCI_REQ#121
PCI_REQ#221,25
PCI_REQ#321,23
PCI_REQ#421

1 2

.047UF

1 2

R233 22M

A

+3V

12

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

C310

LID#21

PCI_AD[0..31]23,25,27

ECSMI#
ECSCI#
LID#
IDE_PATADET
R191 0

R234 1K

1 2

IAC_BITCLK
IAC_RST#

IAC_SDATAI0
IAC_SDATAI1

IAC_SDATAO
IAC_SYNC

ECSMI#21
ECSCI#21

IDE_PATADET22

RTCCLK15,25,26

IAC_BITCLK28,30

IAC_RST#28,30
IAC_SDATAI030
IAC_SDATAI128

1 1

IAC_SDATAO28,30

IAC_SYNC28,30

2 2

Place closely to ICH3-M

CLK_ICH14

12

R131
22

12

C211
10PF

CLK_ICH48

12

3 3

R113
22

12

C203
10PF

+RTCVCC

4 4

B

PM_SUSCLK

V21

U21

AA4

AB4U5U20

PM_THRM#

PM_SLP_S5#

PM_SUS_CLK

PM_SUS_STAT#

PM_STPPCI#/GPIO18

PM_STPCPU#/GPIO20

GeyservillePower Management

VSS

VSS13

VSS14

VSS15

VSS16

VSS17

VSS18

VSS19

VSS20

B22C3C6

F19

C14

C15

C16

C17

CLK_ICH1412
CLK_ICH4812

1 2

R221 15K

B

C145

10PF

IAC_SDATAO

IAC_SYNC

12

22

R87

1 2

1 2

IAC_BITCLK

IAC_SDATAI0

IAC_SDATAI1

IAC_RST#

R92 47

R78 47

Y20

V19B7D11

B11

C11C7A7V1U3T3U2T2U4U1V2W2Y4Y2W3W4Y3

AC_RST#

AC_SYNC

LPC_AD0

AC_SDATAIN1

AC_SDATAOUT

Interface

LPC_AD1

LPC

AC_BITCLK

AC_SDATAIN0

PM_GMUXSEL/GPIO23

PM_CPUPREF#/GPIO22

PM_VGATE/VRMPWRGD

AC'97

Interface

ICH3-M (1/2)

VSS21

VSS22

VSS23

VSS24

VSS25

VSS26

VSS27

VSS28

VSS29

VSS30

VSS31

VSS32

VSS33

VSS34

C18

C19

C20

C21

C22D9D13

D16

D17

D20

D21

D22

E5

CLK_ICH14
CLK_ICH48

12

C301

1UF_10V_0603

CLK_ICHAPIC

PIRQB#

H_PICD0

H_PICD1

GPIO_27

GPIO_28

LAN_RXD1

LAN_RXD2

LAN_TXD0

LAN_TXD1

PIRQA#

J20

J19

INT_APICD1

INT_APICD0

INT_PIRQA#

INT_APICCLK

Interrupt
Interface

Interface

EEP_SHCLK

LAN_RXD0

D10

C8A8A9B9C10

12

+3V

PM_RSMRST#

ECSCI#

LID#

IDE_PATADET

ECSMI#

GPIO_25

GPIO_7

LPC_DRQ#0

LPC_DRQ#1

LPC_FRAME#

CLK_RTCX2

CLK_RTCX1

CLK_RTEST#

CLK_48

CLK_VBIAS

AC6

AC7Y7F20

AB7

RTC_X2

RTC_VBIAS

RTC_X1

RTC_RST#

12

J1
JOPEN

12

R289
1K

GPIO_8

GPIO_12

GPIO_13

GPIO_25

unMUX

GPIO

LAN

Interface

LAN_TXD2

LAN_JCLK

LAN_RSTSYNC

A10C9D7

LPC_AD2

LPC_AD3

Clocks EEPROM

CLK_14

J23

C

ICH_PID1

ICH_PID0

PIRQC#

PIRQD#

INT_PIRQD#

INT_PIRQC#

INT_PIRQB#

INT_PIRQF#/GPIO3

INT_PIRQE#/GPIO2

EEP_CS

EEP_DIN

EEP_DOUT

E9D8E8

R93
@0

C

ICH_PID3

ICH_PID2

H22

W19

AB14

A5C5B5A6A2B2C1B1J21

INT_IRQ15

INT_IRQ14

INT_SERIRQ

INT_PIRQH#/GPIO5

INT_PIRQG#/GPIO4

PCI_GPIO1/REQB#/REQ5#

PCI_GPIO17/GNTB#/GNT5#

PCI

Interface

System

Managment

Interface

SMB_ALERT#/GPIO11

CPU

Interface

HubLink

Interface

HUB_CLK

HUB_PAR

HUB_PSTRB

HUB_PSTRB#

HUB_RCOMP

HUB_VREF

HUB_VSWING

T19

R19

N22

P23

K19

L20

L19

HUB_ICH_RCOMP

100K
R220

1 2

R219 10K

1 2

LPC_AD0 27,32
LPC_AD1 27,32
LPC_AD2 27,32
LPC_AD3 27,32
LPC_DRQ#0 21,32
LPC_DRQ#1 21,27
LPC_FRAME# 27,32

SM_SEL0 14
CLK_ICHAPIC 12

H_PICD0 5
H_PICD1 5

INT_IRQ14 21,22
INT_IRQ15 21,22
INT_SERIRQ 21,25,27,32

PCI_CLK

PCI_DEVSEL#

PCI_FRAME#

PCI_GPIO0/REQA#

PCI_GPIO16/GNTA#

PCI_IRDY#

PCI_PAR

PCI_PERR#

PCI_LOCK#

PCI_PME#

PCI_RST#

PCI_SERR#

STOP#

PCI_TRDY#

SM_INTRUDER#

SMLINK0
SMLINK1

SMB_CLK

SMB_DATA

CPU_A20GATE

CPU_A20M#

CPU_DPSLP#

CPU_FERR#

CPU_IGNNE#

CPU_INIT#

CPU_INTR

CPU_NMI

CPU_PWRGOOD

CPU_RCIN#

CPU_SLP#

CPU_SMI#

STPCLK#

HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9

HUB_PD10

CLK_ICHHUB

PM_LANPWROK

C290

1 2

.1UF

CLK_ICHPCI

T5
M3
F1
C4
D4

GNTA#

B6
B3
N3
G5
M2
M1
W1
Y1
L5
H2
H1

Y6
AC3
AB2
AC4
AB5
AC5

Y22
V23
AB22
J22
AA21
AB23
AA23
Y21
W23
U22
W21
Y23
U23

HUB_PD0

L22

HUB_PD1

M21

HUB_PD2

M23

HUB_PD3

N20

HUB_PD4

P21

HUB_PD5

R22

HUB_PD6

R20

HUB_PD7

T23

HUB_PD8

M19

HUB_PD9

P19

HUB_PD10

N19

CLK_ICHHUB 12
HUB_PSTRB 8
HUB_PSTRB# 8

D

RP10
1 8
2 7

+3VS

PIRQA#
PIRQB#
PIRQC#
PIRQD#

+VS_HUBREF

12

Title

Size Document Number Rev
Custom

Date: Sheet of

PIRQA# 21,25
PIRQB# 21,23,25
PIRQC# 21
PIRQD# 21

CLK_ICHPCI 12
PCI_DEVSEL# 21,23,25
PCI_FRAME# 21,23,25,27
PCI_REQA# 21
PCI_REQB# 21

PCI_IRDY# 21,23,25
PCI_PAR 21,23,25
PCI_PERR# 21,23,25
PCI_LOCK# 21,25
ICH_WAKE_UP# 32
PCIRST# 8,15,17,21,22,23,25,26,27,33
PCI_SERR# 21,23,25
PCI_STOP# 21,23,25
PCI_TRDY# 21,23,25,27

SM_INTRUDER# 21
SMLINK0 21
SMLINK1 21
SMB_CLK 7,12,14
SMB_DATA 7,12,14
SMB_ALERT# 21

GATEA20 32
H_A20M# 5

H_FERR# 5
H_IGNNE# 5
H_INIT# 5
H_INTR 5
H_NMI 5
H_PWRGD 5
RC# 32

H_SMI# 5
H_STPCLK# 5

HUB_PD[0..10]

+VS_HUBVSWING

12

C218
.01UF

C225
.01UF

Compal Electronics, inc.

SCHEMATIC, M/B LA-1421

401218

星期四 八月

3 6
4 5

R90 @10K

GNTA#

1 2

GPIO_25

1 2

R175 10K

Place closely to ICH3-M

+1.5VS

12

R199
@10K

1 2

R203 0

H_PICD0
H_PICD1

HUB_PD[0..10] 8

1 2

R128

36.5_1%

Close to ICH3-M.

D

ICH_PID0
ICH_PID1
ICH_PID2
ICH_PID3

8P4R_4.7K

CLK_ICHAPIC

R120
22_0402

1 2

C204
10PF

CLK_ICHPCI

12

R163
22

12

C237
10PF

( for use if CPU unable
to support DPSLP#)

H_DPSLP# 5,40

12

12

R127

R121

1K

1 2

19 44, 22, 2002

+3VS
+3V

1K

CLK_ICHHUB

R157
10

C232
5PF

1A

A

B

C

D

E

CLOSE TO ICH3-M(< 1 inch)

C165 @5PF

1 2

USB_PP129
USB_PN129
USB_PP029
USB_PN029

1 1

USB_PP329
USB_PN329

+3V

RP12

NTSC/PAL_SELECT15,17

8P4R_10K

1 8
2 7
3 6
4 5

+3VS

Disable Timeout Feature

2 2

3 3

4 4

C166 @5PF
C164 @5PF

12

1 2

R114
@1K

ACIN32,34,37

1 2

1 2

USB_OC#2
USB_OC#4

USB_OC#5

R102

18.2_1%

ICH_SPKR

A

USB_D_PP1
USB_D_PN1
USB_D_PP0
USB_D_PN0

USB_D_PP3
USB_D_PN3

USB_OC#029
USB_OC#129

USB_OC#329

ICH_IDE_PRST#22
ICH_IDE_SRST#22

NTSC/PAL_SELECT

FWH_WP#21

FWH_TBL#21

EC_FLASH#33

M_SEN#16

ICH_SPKR31

+1.8VS

+3V

R107
100K

21

D10 RB751V

1 2

USB_RBIAS

1 2

+V3A_ICH

+3VS

12

USB_D_PP0
USB_D_PP1

USB_D_PP3

USB_D_PN0
USB_D_PN1

USB_D_PN3

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5

R116 @0

ICH_ACIN

ICH_SPKR

R110

0_0805

ICH_ACIN

+5VS +3VS

12

R132

1K

+1.8V

R84

1 2

0_0805

U12B

D19

USB_PP0

A19

USB_PP1

E17

USB_PP2

B17

USB_PP3

D15

USB_PP4

A15

USB_PP5

D18

USB_PN#0

A18

USB_PN#1

E16

USB_PN#2

B16

USB_PN#3

D14

USB_PN#4

A14

USB_PN#5

E12

USB_OC#0

D12

USB_OC#1

C12

USB_OC#2

B12

USB_OC#3

A12

USB_OC#4

A11

USB_OC#5

H20

USB_LEDA#0/GPIO32

G22

USB_LEDA#1/GPIO33

F21

USB_LEDA#2/GPIO34

G19

USB_LEDA#3/GPIO35

E22

USB_LEDA#4/GPIO36

E21

USB_LEDA#5/GPIO37

H21

USB_LEDG#0/GPIO38

G23

USB_LEDG#1/GPIO39

F23

USB_LEDG#2/GPIO40

G21

USB_LEDG#3/GPIO41

D23

USB_LEDG#4/GPIO42

E23

USB_LEDG#5/GPIO43

B21

USB_RBIAS

H23

SPKR

U19

VCCA

F17

VCCPSUS3/VCCPUSB0

F18

VCCPSUS4/VCCPUSB1

K14

VCCPSUS5/VCCPUSB2

E10

VCCPSUS0

V8

VCCPSUS1

V9

VCCPSUS2

ICH3-M

21

D11
1SS355

12

C212
.1UF

L21

1 2

CHB2012U170

E13

F14

K12

P10V6V7

VCC_SUS0

VCC_SUS1

VCC_SUS2

USB

Interface

Misc

Power

VSS35

E14

E15

B

VCC5REF

12

C219
1UF_10V_0603

+V1.8_ICHLAN

F15

F16F7F8

VCC_SUS3

VCC_SUS4

VCC_SUS5

VCC_USB0/VCC_SUS6

VSS36

VSS37

VSS38

VSS39

VSS40

E18

E19

E20

F22G3G20

+V5S_ICHREF

+RTCVCC

K10

AB6E6W8

VCC_RTC

VCC5REF1

VCC_USB1/VCC_SUS7

VCC_AUX0/VCCLAN1_8

VCC_AUX1/VCCLAN1_8

VCC_AUX2/VCCLAN1_8

VSS41

VSS42

VSS43

VSS44

VSS45

VSS46

VSS47

VSS48

VSS49

H19

AA22J5K11

K13

K20

K21

K22

VCC5REF2

VSS50

+3V

12

R73
0

12

C130
.1UF

+3V

V CC5REFSUS

12

C13W5F9

F10

VCC5REFSUS1

VCC5REFSUS2

VCCPAUX0/VCCLAN3_3

VSS51

VSS52

VSS53

VSS54

VSS55

K23L3L10

L11

L12

L13

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

+1.8V

+1.5VS

12

R85
0_0805

U18

V22

C23

B23E7T21D6T1C2A21

VCCPCPU1

VCCPCPU2

VCCUSBBG/VCC_SUS8

+1.8VA_ICH

N/C0

N/C1

N/C2

N/C3

VCCUSBPLL/VCC_SUS9

Power

R77
0_0805

P14

VCCPCPU0

VCCPAUX1/VCCLAN3_3

ICH3-M (2/2)

VSS

VSS56

VSS57

VSS58

VSS59

VSS60

VSS61

VSS62

VSS63

VSS64

VSS65

VSS66

VSS67

VSS68

VSS69

L14

L21

L23

M11

M12

M13

M20

M22N5N10

N11

N12

N13

C

N/C4

VSS70

N14

N21

A22F6G6H6J6

VSS102

VSS103

VSS71

VSS72

VSS73

N23

P11

P13

VCCPPCI0

VSS74

VSS75

P20

P22R3R5

M10R6T6U6G18

VCCPPCI1

VCCPPCI2

VCCPPCI3

VSS76

VSS77

VSS78

R21

VCCPPCI4

VCCPPCI5

VCCPPCI6

VSS79

VSS80

VSS81

R23T4T20

H18

VCCP0

VCCPPCI7

VSS82

VSS83

VSS84

T22V3AC23

+3VS +1.8VS

P12

V15

V16

V17

V18

J18

M14

R18

VCCP1

VSS85

VSS86

V20W6W7

VCCPIDE0

VCCPIDE1

VCCPIDE2

VSS87

VSS88

VSS89

W10

W14

VCCPIDE3

VCCPIDE4

VSS90

VSS91

VSS92

W18

W22Y8AA3

VCCPHL0

VCCPHL1

VSS93

VSS94

AA8

T18

E11K6K18P6P18

VCCPHL2

VCCPHL3

VSS95

VSS96

VSS97

AA12

AA16

AA20

D

VCCCORE0

VCCCORE1

VCCCORE2

VCCCORE3

IDE

Interface

VSS98

VSS99

VSS100

VSS101

AB8

AC1

AC8

V10

V14

VCCCORE4

VCCCORE5

VCCCORE6

IDE_PDDACK#
IDE_SDDACK#

IDE_PDDREQ
IDE_SDDREQ

AC15

IDE_PDCS1#

AB15

IDE_PDCS3#

AC21

IDE_SDCS1#

AC22

IDE_SDCS3#

AA14

IDE_PDA0

AC14

IDE_PDA1

AA15

IDE_PDA2

AC20

IDE_SDA0

AA19

IDE_SDA1

AB20

IDE_SDA2

W12

IDE_PDD0

AB11

IDE_PDD1

AA10

IDE_PDD2

AC10

IDE_PDD3

W11

IDE_PDD4

Y9

IDE_PDD5

AB9

IDE_PDD6

AA9

IDE_PDD7

AC9

IDE_PDD8

Y10

IDE_PDD9

W9

IDE_PDD10

Y11

IDE_PDD11

AB10

IDE_PDD12

AC11

IDE_PDD13

AA11

IDE_PDD14

AC12

IDE_PDD15

Y17

IDE_SDD0

W17

IDE_SDD1

AC17

IDE_SDD2

AB16

IDE_SDD3

W16

IDE_SDD4

Y14

IDE_SDD5

AA13

IDE_SDD6

W15

IDE_SDD7

W13

IDE_SDD8

Y16

IDE_SDD9

Y15

IDE_SDD10

AC16

IDE_SDD11

AB17

IDE_SDD12

AA17

IDE_SDD13

Y18

IDE_SDD14

AC18

IDE_SDD15

Y13
Y19
AB12
AB18
AC13

IDE_PDIOR#

AC19

IDE_SDIOR#

Y12

IDE_PDIOW#

AA18

IDE_SDIOW#

AB13

IDE_PIORDY

AB19

IDE_SIORDY

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1421

Size Document Number Rev
Custom

401218

星期四 八月

Date: Sheet of

IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15

IDE_PDCS1# 22
IDE_PDCS3# 22
IDE_SDCS1# 22
IDE_SDCS3# 22

IDE_PDA0 22
IDE_PDA1 22
IDE_PDA2 22
IDE_SDA0 22
IDE_SDA1 22
IDE_SDA2 22
IDE_PDD[0..15] 22

IDE_SDD[0..15] 22

IDE_PDDACK# 22
IDE_SDDACK# 22
IDE_PDDREQ 22
IDE_SDDREQ 22
IDE_PDIOR# 22
IDE_SDIOR# 22
IDE_PDIOW# 22
IDE_SDIOW# 22
IDE_PIORDY 22
IDE_SIORDY 22

20 44, 22, 2002

E

1A

A

B

C

D

E

ICH3-M PullUp Resistor

12

C293
47PF

12

C185
.01UF

C292
47PF

12

+3VS

+3V

+3VS

12

C295

C294

.1UF

.1UF

+V1.8_ICHLAN

C138
.1UF

12

12

C291
.1UF

C297
.1UF

SM_INTRUDER#19

PM_CPUPERF#5,19

PCI_PAR19,23,25

12

12

C186

C193
.1UF

47PF

C137

C136

.1UF

.1UF

12

12

C199
.1UF

+V5S_ICHREF

12

+

C229

1UF_10V_0603

C160
47PF

12

C296
.1UF

12

1 2

R217 100K

R192 @10K

1 2

R117 @100

1 2

12

12

C159

C242

.1UF

.1UF

12

C208

C205

.1UF

.1UF

+3VS +3VS

RP19

PCI_FRAME#19,23,25,27

1 1

2 2

PCI_IRDY#19,23,25 PCI_SERR# 19,23,25

PCI_TRDY#19,23,25,27

PCI_STOP#19,23,25

PCI_REQA#19
PCI_REQB#19
PCI_REQ#019
PCI_REQ#119

PCI_GNT#119
PCI_GNT#219,25

PIRQD#19

INT_IRQ1419,22

PCI_GNT#019
PCI_GNT#319,23

PCI_GNT#419

PCIRST#8,15,17,19,22,23,25,26,27,33
SMLINK019
SMLINK119

1
2
3
4
5

10P8R_8.2K

+3VS +3VS

RP15
1
2
3
4
5

10P8R_8.2K

+3VS

RP14
1
2
3
4
5

10P8R_8.2K

Break Event Between ICH3-M and EC591

3 3

PBTN_OUT#32 PBTN# 19

ON/OFF32,35

+3V

EC_RIOUT#32 ICH_RI# 19

+3V

EC_SMI#32

+3V

EC_SCI#32

+3V

4 4

EC_LID_OUT#32

21

D19 RB751V

21

D18 @RB751V

1 2

R197 10K

21

D17 RB751V

1 2

R169 10K

21

D16 RB751V

1 2

R198 10K

21

D32 RB751V

1 2

R150 10K

21

D15 RB751V

10
9
8
7
6

10
9
8
7
6

10
9
8
7
6

1 2

R89 8.2K

1 2

R108 8.2K

1 2

R88 8.2K

1 2

R178 @8.2K

1 2

R216 4.7K

1 2

R215 4.7K

PBTN#

ICH_RI#

ECSMI#

ECSCI#

LID#

+3VS

ECSMI# 19

ECSCI# 19

LID# 19

PCI_DEVSEL# 19,23,25
PCI_PERR# 19,23,25
PCI_LOCK# 19,25

PCI_REQ#2 19,25
PCI_REQ#3 19,23
PCI_REQ#4 19
INT_SERIRQ 19,25,27,32

INT_IRQ15 19,22
PIRQA# 19,25
PIRQB# 19,23,25
PIRQC# 19

+3VS

+3V

+3VS

12

+

+3V

12

+

22UF_16V_1206

+1.8VS

12

+

+1.8VA_ICH

12

+

22UF_16V_1206

FWH_TBL#20
FWH_WP#20

PM_CLKRUN#19,25,27,32

SMB_ALERT#19

LPC_DRQ#019,32

LPC_DRQ#119,27

ICH3-M Decoupling Capacitor

12

+

C306
22UF_16V_1206

C127

C302
150UF_6.3V_D2

C168

C192
.1UF

C202
22UF_16V_1206

12

C131
.1UF

12

12

C161
.1UF

C150
.1UF

12

C252
.1UF

12

C151
.1UF

C132
.1UF

C162
.1UF

12

R218 10K1 2

R156 10K1 2

R170 10K1 2

12

C191
.1UF

12

C133
.1UF

12

C248

C243

47PF

.1UF

12

C163
.1UF

C312
.1UF

RP17
1 8
2 7
3 6
4 5

8P4R_10K

12

C206
.1UF

12

C134

47PF

12

C256
.1UF

+V3A_ICH

C313

.01UF

12

C158
47PF

+1.5VS

12

+

C255
1UF_10V_0603

+RTCVCC

+VTT

12

C157
.1UF

12

12

C238

C156

47PF

.1UF

12

C246
.1UF

12

12

C226

C231

.1UF

.1UF

12

C250
.1UF

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA-1421

Size Document Number Rev
Custom

401218

星期四 八月

Date: Sheet of

21 44, 22, 2002

E

1A

IDE Module CONN.

IDE_PDD[0..15]20

IDE_PDDREQ20

IDE_PDIOW#20

IDE_PDIOR#20
IDE_PIORDY20
IDE_PDDACK#20

INT_IRQ1419,21
IDE_PDA120
IDE_PDA020
IDE_PDCS1#20 IDE_PDCS3# 20
PHDD_LED#33

1 2

+5VS

R334 100K

IDE_PDD[0..15]

PIDE_RST#
IDE_PDD7
IDE_PDD6
IDE_PDD5
IDE_PDD4
IDE_PDD3
IDE_PDD2
IDE_PDD1
IDE_PDD0

IDE_PDDREQ

IDE_PIORDY

INT_IRQ14

JP21

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38

+5VS +5VS

39 40
41 42
43 44

HDD 44P SUYIN 20225A-44G5-A

IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

PCSEL

1 2

R336 @0

1 2

R335 470

CD-ROM Module CONN.

IDE_PDA2 20

R331 10K

1 2

R332 5.6K

1 2

R333 1K

+3VS

+5VS

1 2

12

C456

C459
10UF_16V_1206

1000PF

Place component's closely IDE CONN.

IDE_PDD7

IDE_PDDREQ

IDE_PIORDY

12

C458

1UF_25V_0805

12

C457

.1UF

+5VS

12

12

HDD Manual ATA Type Selection:
ATA33 : populate R43, de-populate R46.

ATA66/100 : populate R46, de-populate R43.

R183

@10K

IDE_PATADET 19

R176

10K

1 2

PCIRST#8,15,17,19,21,23,25,26,27,33

ICH_IDE_PRST#20

PCIRST#

C454

.1UF

+5VS

U41

5

1
2

3

4

7SH08FU

PIDE_RST#

INT_CD_L

C479

1 2

@10PF

IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15
IDE_SDDREQ

1 2

R51 100K

1 2

C86 0.1UF

INT_CD_R 30

IDE_SDDREQ 20
IDE_SDIOR# 20

IDE_SDDACK# 20

+5VS
IDE_SDA2 20
IDE_SDCS3# 20

+5VS

+5VS

+5VS

+5VS

+5VS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

12

C61
1000PF

Place component's closely CD-ROM CONN.

CD_AGND

C480

@10PF

IDE_SIORDY

SHDD_LED#

+5VS

CDD[0..15]

SIDE_RST#

IDE_SDD7
IDE_SDD6
IDE_SDD5
IDE_SDD4
IDE_SDD3
IDE_SDD2
IDE_SDD1
IDE_SDD0

R61
470

JP14

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50

CD-ROM CONN.

1 2

IDE_SDD[0..15]20

12

CD_AGND30

C478

@10PF

12

IDE_SDIOW#20

IDE_SIORDY20

INT_IRQ1519,21

IDE_SDA120
IDE_SDA020

IDE_SDCS1#20

SHDD_LED#33

C36

12

@10PF

1 2

R33 10K

1 2

R43 5.6K

1 2

R49 1K

1 2

R53 100K

W=80mils

12

C66

C85

1UF_25V_0805

10UF_16V_1206

IDE_SDD7

IDE_SDDREQ

IDE_SIORDY

SHDD_LED#

12

C72
.1UF

+5VS

C57

1 2

.1UF

PCIRST#

ICH_IDE_SRST#20

Title

Size Document Number Rev

B

Date: Sheet of

U3

5

1
2

3

4

7SH08FU

SIDE_RST#

Compal Electronics, inc.

SCHEMATIC, M/B LA-1421

401218

星期四 八月

22 44, 22, 2002

1A

5

LAN_IDSEL

12

R55

100K

LAN_PME#32

D D

LAN_RD-24

LAN_RD+24

LAN_TD-24

R50 @1K

R48

@15K

1 2

LAN_TD+24

1 2

12

LINK10_100#24

ACTIVITY#24

0

R35@ 01 2
R34

CLK_PCI_LAN

PCI_AD31
PCI_AD30

PCI_AD29
PCI_AD28

PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24

VDD25

PCI_AD23

Q17

EN_LAN#33

+12VALW

C C

2

R44

1 2

470K

Q18
FDV301

1 3

2

1 3

2N7002

LAN_IDSELPCI_AD17

SUS_STAT#19,27,33

+3VS

PIRQB#19,21,25

PCIRST#8,15,17,19,21,22,25,26,27,33

CBRST#25,26

CLK_PCI_LAN12

PCI_GNT#319,21

PCI_REQ#319,21

+3VLAN

12

0.1UF

C41

LAN_IDSEL

PCI_C/BE#319,25,27

1 2

R32 100

LAN_RD­LAN_RD+

LAN_TD­LAN_TD+

LINK10_100#
ACTIVITY#

81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99

100

4

R54

1 2

5.6K_1%_0603

8079787776757473727170696867666564636261605958575655545352

X1

GND

RTT2

RTSET

DEVSELB

GND

STOPB

GND

RTT3

PERRB

SERRB

PAR

X2

CBE1B

INTAB
RSTB
CLK
GNTB
REQB
AD31
AD30
GND
AD29
VDD
AD28
AD27
AD26
AD25
AD24
VDD25
VDD
CBE3B
IDSEL
AD23

LED0

LED1NCLED2

AD22

GND

AD21

AVDD25

AD20

AD19

GND

AVDD

ISOLATEB

VDD

VDD25

AD18

TXD+

AD17

TXD-

AD16

AVDD

AVDD25

CBE2B

FRAMEB

RXIN-

RXIN+

IRDYB

TRDYB

1234567891011121314151617181920212223242526272829

AVDD-1

AVDD-2

AVDD-3

AVDD

AVDD25

VDD

AD15

GND

PMEB

AD14

AD13

NCNCNC

VCTRL

AD12

AD11

3

LAN_X1

LAN_X2

VCTRL

VDD25

51

AD10

AD9

30

VDD_25

VDD25

AUX
EECS
EESK

EEDI

EEDO

AD0

AD1

GND

AD2

AD3

VDD25

VDD

AD4

AD5

AD6

VDD25

VDD

AD7

CBE0B

GND

AD8

RTL8100BL

2

1 2

L15 4.7UH

1 2

L16 4.7UH

1 2

R57

1 2

+3V

12

R67

L17 4.7UH

12

C68

0.1UF

0

VDD25

12

C46

0.1UF

12

C59

0.1UF

12

C71

0.1UF

U4

5.6K

AUX

50
49
48
47
46

PCI_AD0

45

PCI_AD1

44
43

PCI_AD2

42

PCI_AD3

41
40
39

PCI_AD4

38

PCI_AD5

37

PCI_AD6

36
35
34

PCI_AD7

33
32
31

LAN_EECS
LAN_EECLK
LAN_EEDI
LAN_EEDO

+3VLAN

1
2
3
4

C35

4.7UF_10V_1206

+3V

C97

4.7UF_10V_1206

Y1
25 MHz

LAN_X1

12

C60
22PF

U8

9346

VCC

GND

8
7

NC

6

NC

5

CS
SK
DI
DO

PCI_C/BE#0 19,25,27

LAN_X2

+3V

12

C100

0.1UF

2.5V power generated by VCTRL.

+3VLAN

VCTRL

22UF_16V_1206

12

C69
22PF

1 2

Q16
2SA1036K

C45

1

VDD25

C38

0.1U

VDD25

B B

CLK_PCI_LAN

12

R36

PCI_AD[0..31]19,25,27

22

12

C39
10PF

A A

5

PCI_AD[0..31]

PCI_DEVSEL#19,21,25

PCI_AD20

PCI_AD22

PCI_C/BE#219,25,27

PCI_FRAME#19,21,25,27

PCI_IRDY#19,21,25

PCI_TRDY#19,21,25,27

PCI_STOP#19,21,25
PCI_PERR#19,21,25
PCI_SERR#19,21,25

PCI_PAR19,21,25

PCI_C/BE#119,25,27

4

PCI_AD18

PCI_AD19

PCI_AD21

PROPRIETARY NOTE

PCI_AD16

PCI_AD17

PCI_TRDY#

PCI_FRAME#

PCI_C/BE#2

PCI_IRDY#

PCI_STOP#

PCI_DEVSEL#

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PCI_PAR

PCI_PERR#

PCI_SERR#

PCI_AD14

PCI_AD13

PCI_AD15

12

PCI_AD12

PCI_AD11

PCI_AD10

+3VLAN

C40

0.1UF

PCI_AD8

PCI_AD9

3

2

For 3V LAN only

+3VLAN

12

C116

0.1UF

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1421

Size Document Number Rev

B

401218

星期四 八月

Date: Sheet of

12

C115
1000PF

12

12

C84

1000PF

12

C37

0.1UF

23 44, 22, 2002

C56

0.1UF

1

1A

+3V+3VLAN

5

LAN Transformer and Conn.

4

3

2

1

D D

Layout Note
H0013 pls close to

LAN_TD-23

LAN_TD+23

LAN_RD+23

LAN_RD-23

R355
50

C C

12

12

R351
50

12

C484

0.1UF
1 2

C482 0.1UF

R353
50

12

conn.

U42

3

LAN_RD-

LAN_TD+
LAN_TD-

12

R357
50

C476

0.1UF

12

RD+

1

RD-

2

CT

4

NC

5

NC

7 10

CT CT

6

TD-

SWAP NET NS601680

RX+

RX-

TX+TD+

TX-

14
16
15

CT

13

NC

12

NC

98
11

R344
75

RJ45_RX+LAN_RD+
RJ45_RX-

RJ45_TX+
RJ45_TX-

12

12

R343
75

LAN_GND

LAYOUT NOTICE: This area do not connect to power plan
include Vcc and GND in any layer

B B

C

LINK10_100#23

ACTIVITY#23

A A

LINK10_100#

ACTIVITY#

DTA114YKA

10K

2

B

47K

3 1

+3V

C

10K

2

B

Q2

47K

3 1

+3V

E

Q1
DTA114YKA

E

R1

1 2

510_0603

R10
510_0603

1 2

12

C688
100PF

12

Green_LED+

Amber_LED+
C689
100PF

Keep Out 40mil

Amber_LED+

RJ45_RX-

RJ45_RX+
RJ45_TX­RJ45_TX+

Green_LED+

12

R2
75

Termination plane should be copled to chassis ground

12

R3
75

JP13

12

Amber LED+

11

Amber LED-

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

10

Green LED-

9

Green LED+

AMP RJ45/RJ11 with LED

C3

1000P_2KV_1206

16

SHLD4

15

SHLD3

14

SHLD2

13

SHLD1

LANGNDLAN_GND

Compal Electronics, inc.

Title

PROPRIETARY NOTE

5

4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

SCHEMATIC, M/B LA-1421

Size Document Number Rev

B

401218

星期四 八月

Date: Sheet of

24 44, 22, 2002

1

1A

A

B

C

D

E

CardBus Controller
OZ6933T (uBGA)

1 1

PCI_AD[0..31]19,23,27

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9

2 2

PCI_C/BE#319,23,27
PCI_C/BE#219,23,27
PCI_C/BE#119,23,27
PCI_C/BE#019,23,27

PCI_AD2019,23

CLK_PCI_CB12

CLK_PCI_CB

R328
22

1 2

C453
10PF

3 3

R330

1 2

+12VS

PCI_SERR#19,21,23

100K

2

Q47 2N7002

13

SERR#

PCI_DEVSEL#19,21,23

PCI_FRAME#19,21,23,27

PCI_IRDY#19,21,23

PCI_TRDY#19,21,23,27

PCI_STOP#19,21,23

PCI_PAR19,21,23

PCI_PERR#19,21,23
PCI_REQ#219,21

PCI_GNT#219,21

PIRQA#19,21
PIRQB#19,21,23

PCI_LOCK#19,21

PCIRST#8,15,17,19,21,22,23,26,27,33

PCM_PME#32

PM_CLKRUN#19,21,27,32

PCM_RI#32

PCM_SPK#31

PCM1_LED33

PCM2_LED33

INT_SERIRQ19,21,27,32

PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

R329 100

1 2

SERR#

PCM_INTA#
PCM_INTB#

CardBus-OZ6933T-1

B14

K19
J19

U34

E1

AD31

E2

AD30

F3

AD29

F1

AD28

G5

AD27

H6

AD26

G3

AD25

G2

AD24

H2

AD23

H1

AD22

J1

AD21

J2

AD20

J3

AD19

J6

AD18

K1

AD17

K2

AD16

M5

AD15

N2

AD14

N1

AD13

N3

AD12

N6

AD11

P1

AD10

P3

AD9

N5

AD8

P6

AD7

R2

AD6

R3

AD5

T1

AD4

W4

AD3

R6

AD2

U5

AD1

P7

AD0

G1

C/BE3#

K3

C/BE2#

M3

C/BE1#

R1

C/BE0#

H5

IDSEL

E3

PCI_CLK

L3

DEVSEL#

K6

FRAME#

L1

IRDY#

L2

TRDY#

L5

STOP#

M2

PAR

L6

PERR#

M1

SERR#

G6

PCI_REQ#

F5

PCI_GNT#

B5

IRQ9/INTA#

F6

IRQ4/INTB#

V5

LOCK#

D1

RST#
IRQ12/PME#

A4

IRQ14/CLKRUN#

V9

IRQ15/RING_OUT
SPKR_OUT#
LED_OUT/SKT_ACTIVITY

E8

SKTB_ACTV

C5

IRQ5/SERIRQ

E6

IRQ7/SIN#/B_VPP_PGM

GND

H3K5P2W5V15

+3V

+3VS

+3VS

L15F2J5M6P5

R10

J18

B10

N18

PCI_VCC

PCI_VCC

CORE_VCC

CORE_VCC

CORE_VCC

GRST#

PCI_VCC

AUX_VCC

PCI_VCC

MICROO
CARDBUS CONTROLLER
OZ6933 209PIN CSP

PCI

GND

GND

GND

GND

GNDNCNC

IRQ3/VCC3#

GND

K18

B15E5W12

K14

E11

S1_D10

S1_D9

L18

M19

A_D10/CAD31

SCLK/A_VCC_5#

SDATA/B_VCC_3#

SLATCH/B_VCC_5#

IRQ9/A_VPP_VCC

IRQ10/B_VPP_VCC

K15

K17

P19

F19B6A6B7C7A7B8A8E9B9F10

S1_D0

S1_D8

S1_D1

S1_A0

M18

M15

M17

N17

A_D9/CAD30

A_D1/CAD29

A_D8/CAD28

A_D0/CAD27

B_D10/CAD31

B_D9/CAD30

CBRST# 23,26

S1_A1

S1_A2

S1_A3

S1_A4

P18

R19

N14

R17

A_A0/CAD26

A_A1/CAD25

A_A2/CAD24

A_A3/CAD23

B_D1/CAD29

B_D8/CAD28

B_D0/CAD27

B_A0/CAD26

S1_A17

S1_A24

S1_A5

S1_IOWR#

S1_A7

S1_A25

S1_A6

T19

R14

U15

P14

W15

U11

P10

A_A4/CAD22

A_A5/CAD21

A_A6/CAD20

A_A7/CAD18

A_A25/CAD19

A_A24/CAD17

A_A17/CAD16

Slot A

Slot B

B_A1/CAD25

B_A2/CAD24

B_A3/CAD23

B_A4/CAD22

B_A5/CAD21

B_A6/CAD20

B_A25/CAD19

E10

F11

C11

B11

S1_IORD#

S1_CE2#

S1_OE#

S1_A9

S1_A11

S1_A10

W11

U10

V10P9R9U9W9U8R8W7V7U7W6P8U6

A_A9/CAD14

A_A10/CAD9

A_A11/CAD12

A_OE#/CAD11

A_IOWR/CAD15

A_CE2#/CAD10

A_IORD#/CAD13

B_A7/CAD18

B_A24/CAD17

B_A17/CAD16

B_IOWR#/CAD15

B_A9/CAD14

B_IORD#/CAD13

B_A11/CAD12

A11

E14

D19

F15

E17

F14

S1_D6

S1_D13

S1_D15

S1_D7

A_D7/CAD7

A_D6/CAD5

A_D15/CAD8

A_D13/CAD6

B_OE#/CAD11

B_CE2#/CAD10

B_A10/CAD9

B_D15/CAD8

G15

E19

F18

F17

S1_D11

S1_D5

S1_D12

A_D5/CAD3

A_D12/CAD4

A_D11/CAD2

B_D7/CAD7

B_D13/CAD6

B_D6/CAD5

G18

H15

H14

S1_IOWR#
S1_IORD#
S1_OE#
S1_CE2#

S1_D4

S1_D3

A_D4/CAD1

A_D3/CAD0

B_D12/CAD4

B_D5/CAD3

B_D11/CAD2

H17

H18

H19

J14

S1_IOWR# 26
S1_IORD# 26 S1_A[0..25] 26
S1_OE# 26
S1_CE2# 26

A_SOCKET_VCC
A_SOCKET_VCC

A_REG#/CCBE3#

A_A12/CCBE2#

A_A8/CCBE1#

A_CE1#/CCBE0#

A_A16/CCLK

A_A23/CFRAME#

A_A15/CIRDY#

A_A22/CTRDY#

A_A21/CDEVSEL#

A_A20/CSTOP#

A_A13/CPAR

A_A14/CPERR

A_WAIT#/CSERR#

A_INPACK#/CREQ#

A_WE#/CGNT#

A_RDY_IRQ#/CINT#

A_A19/CBLOCK#

A_WP/CCLKRUN#

A_RST/CRESET#

A_D2/RFU

A_D14/RFU

A_A18/RFU
A_VS1/CVS1
A_VS2/CVS2

A_CD1#/CCD1#
A_CD2#/CCD2#

A_BVD2/CAUDIO

A_BVD1/CSTSCHG
B_BVD1/CSTSCHG

B_BVD2/CAUDIO

B_CD2#/CCD2#
B_CD1#/CCD1#

B_VS2/CVS2
B_VS1/CVS1

B_A18/RFU

B_D14/RFU

B_D2/RFU

B_RESET/CRESET#

B_WP/CCLKRUN#

B_A19/CBLOCK#

B_RDY_IRQ#/CINT#

B_WE#/CGNT#

B_INPACK#/CREQ#

B_WAIT#/CSERR#

B_A14/CPERR#

B_A13/CPAR

B_A20/CSTOP#

B_A21/CDEVSEL#

B_A22/CTRDY#

B_A15/CIRDY#

B_A23/CFRAME#

B_A16/CCLK

B_CE1#/CCBE0#

B_A8/CCBE1#

B_A12/CCBE2#

B_REG#/CCBE3#

B_SKT_VCC
B_SKT_VCC
B_SKT_VCC

B_D4/CAD1

B_D3/CAD0

J17

R7
R13

N15
V14

S1_A12
S1_A8

V11
W8

V13

R447 33

S1_A23

U14
P13

S1_A15
S1_A22

W14
U13

S1_A21
S1_A20

W13
R11

S1_A13
S1_A14

V12
R18
P17
R12
P12
U12

S1_A19
L17
P15

S1_D2

L19
V8

S1_D14

S1_A18

P11
W10
W16
V6
L14
M14
N19

F8
C8
C6
J15
A10
E18

S2_A18

C14
G17

S2_D14

S2_D2

F7
C10
A5
A14

S2_A19
F12
E13
C9
A9

S2_A14

A15
C15

S2_A13

S2_A20

C13
B13

S2_A21

S2_A22

A13
C12

S2_A15

S2_A23

B12
E12

G14

S2_A8

A16
A12

S2_A12
F9

G19
F13
E7

C421

.1UF

S1_A[0..25]
S1_D[0..15]

C426
.1UF

1 2

1 2

R274 33

S2_VCC

C352
.1UF

S1_D[0..15] 26

S1_VCC

C651
.1UF

S1_REG# 26

S1_CE1# 26

S1_A16

S1_WAIT# 26
S1_INPACK# 26

S1_WE# 26

S1_RDY# 26

S1_WP 26
S1_RST 26

S1_VS1 26
S1_VS2 26

S1_CD1# 26
S1_CD2# 26
S1_BVD2 26
S1_BVD1 26

S2_BVD1 26
S2_BVD2 26
S2_CD2# 26

S2_CD1# 26
S2_VS2 26
S2_VS1 26

S2_RST 26
S2_WP 26

S2_RDY# 26
S2_WE# 26

S2_INPACK# 26

S2_WAIT# 26

S2_A16

S2_CE1# 26

S2_REG# 26

C648
.1UF

C431
.1UF

S2_D9

S2_D1

S2_D10

+3VS

4 4

+3VS

12

C406

4.7UF_10V_0805

C451
.1UF

A

C452
.1UF

C647
.1UF

C655
.1UF

C449
.1UF

C450
.1UF

C396
.1UF

SLATCH 26
SLDATA 26
RTCCLK 15,19,26

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

S2_D8

S2_D0

S2_A0

C

S2_A1

S2_A2

S2_A3

S2_A4

S2_A5

S2_A6

S2_A25

S2_A7

S2_A17

S2_A24

S2_A9

S2_A11

S2_D15

S2_A10

S2_D7

S2_D6

S2_D13

S2_CE2#
S2_OE#
S2_IORD#
S2_IOWR#

S2_A[0..25]
S2_D[0..15]

S2_D12

S2_D5

S2_D4

S2_D11

S2_CE2# 26
S2_OE# 26
S2_IORD# 26
S2_IOWR# 26

S2_A[0..25] 26
S2_D[0..15] 26

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1421

Size Document Number Rev
Custom

D

Date: Sheet of

星期四 八月

401218

25 44, 22, 2002

E

1A

S2_D3

PCMCIA POWER CTRL.

+12V+5V

+3V

C408
1UF_25V_08051 2

C388

1 2

.1UF
C395

1 2

.1UF

C389

1 2

.1UF

C417

1 2

.1UF

C422

1 2
1 2

S1_A[0..25]25

S1_D[0..15]25
S2_A[0..25]25

S2_D[0..15]25

S2_VPP

S1_VPP

.1UF

C416

.1UF

OCCB#33

+3V

C367
10UF_1206

1 2

R296
100K

12

C360

.01UF

12

C354

.01UF

S1_A[0..25]
S1_D[0..15]
S2_A[0..25]
S2_D[0..15]

W=30mils

W=30mils

12

C361
56PF

SLDATA25
SLATCH25

RTCCLK15,19,25

12

C351

1UF_25V_0805

12

C339

1UF_25V_0805

S1_VCC

12

C337

.1UF

12

C357

1000PF

U36

25

VCC_5V

7

12V

24

12V

1

5V

2

5V

30

5V

15

3.3V

16

3.3V

17

3.3V

3

DATA

5

LATCH

4

CLOCK

13

APWR_GOOD#

19

BPWR_GOOD#

18 12

OC# GND

TPS2206AI/TPS2216

AVPP
AVCC
AVCC
AVCC

BVPP
BVCC
BVCC
BVCC

RESET

RESET#

NC
NC
NC
NC

PCIRST#8,15,17,19,21,22,23,25,27,33

G_RST#32

8
9
10
11

23
20
21
22

6
14

26
27
28
29

S1_VPP

W=40mils

S2_VPP

W=40mils

CBRST#

+3V POWER

S1_VPP
S1_VCC

12

C411

4.7UF_10V_0805

S2_VPP
S2_VCC

12

C410

4.7UF_10V_0805

+3V

1

147

2 3

R271

1 2

@0

U29A
74LVC125

PCMRST# 33

CBRST#

12

R267
10K

+3V

CBRST# 23,25

S1_CD1#

@1000PF

S1_CD2#

S2_CD1#

@1000PF

S2_CD2#

C434

1 2

C262

1 2

@1000PF

1 2

C425

1 2

@1000PF

C435

CARDBUS

SOCKET

JP17

A77

a68

A76

S1_CD2#25

S1_WP25

S1_BVD125

S1_BVD225

S1_REG#25

S1_INPACK#25

S1_WAIT#25

S1_RST25
S1_VS225

S1_VPP S2_VPP
S1_VCC

S1_RDY#25

S1_WE#25

S1_IOWR#25

S1_IORD#25

S1_VS125
S1_OE#25

S1_CE2#25

S1_CE1#25

S1_CD1#25

S1_CD2#
S1_WP

S1_D10
S1_D2
S1_D9
S1_D1
S1_D8
S1_D0
S1_BVD1

S1_A0
S1_BVD2
S1_A1
S1_REG#
S1_A2
S1_INPACK#
S1_A3

S1_WAIT#
S1_A4
S1_RST
S1_A5
S1_VS2
S1_A6
S1_A25

S1_A7
S1_A24
S1_A12
S1_A23
S1_A15
S1_A22

S1_A16

S1_A21
S1_RDY#
S1_A20
S1_WE#
S1_A19
S1_A14
S1_A18
S1_A13

S1_A17
S1_A8
S1_IOWR#
S1_A9
S1_IORD#

S1_A11
S1_VS1
S1_OE#
S1_CE2#
S1_A10

S1_D15
S1_CE1#
S1_D14
S1_D7
S1_D13
S1_D6

S1_D12 S2_D12
S1_D5
S1_D11

S1_D4

S1_CD1#

S1_D3

A75
A74
A73
A72
A71
A70
A69
A68
A67
A66
A65
A64
A63
A62
A61
A60
A59
A58
A57
A56
A55
A54
A53
A52
A51
A50
A49
A48
A47
A46
A45
A44
A43
A42
A41
A40
A39
A38
A37
A36
A35
A34
A33
A32
A31
A30
A29
A28
A27
A26
A25
A24
A23
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10

A9
A8
A7
A6
A5
A4
A3
A2
A1

a34
a67
a33
GND
a66
a32
a65
a31
a64
a30
a63
GND
a29
a62
a28
a61
a27
a60
a26
GND
a59
a25
a58
a24
a57
a23
a56
GND
a22
a55
a21
a54
a20
a53
GND
a19
a52
a18
a51
a17
a50
a16
a49
a15
a48
a14
a47
a13
GND
a46
a12
a45
a11
a44
GND
a10
a43
a9
a42
a8
GND
a41
a7
a40
a6
a39
a5
GND
a38
a4
a37
a3
a36
a2
a35
a1

PCMC154PIN

b68
b34
b67
b33

GND

b66
b32
b65
b31
b64
b30
b63

GND

b29
b62
b28
b61
b27
b60
b26

GND

b59
b25
b58
b24
b57
b23
b56

GND

b22
b55
b21
b54
b20
b53

GND

b19
b52
b18
b51
b17
b50
b16
b49
b15
b48
b14
b47
b13

GND

b46
b12
b45
b11
b44

GND

b10
b43

b42

GND

b41
b40
b39

GND

b38
b37
b36
b35

B77
B76

S2_CD2#

B75

S2_WP

B74
B73

S2_D10

B72

S2_D2

B71

S2_D9

B70

S2_D1

B69

S2_D8

B68

S2_D0

B67

S2_BVD1

B66
B65

S2_A0

B64

S2_BVD2

B63

S2_A1

B62

S2_REG#

B61

S2_A2

B60

S2_INPACK#

B59

S2_A3

B58
B57

S2_WAIT#

B56

S2_A4

B55

S2_RST

B54

S2_A5

B53

S2_VS2

B52

S2_A6

B51

S2_A25

B50
B49

S2_A7

B48

S2_A24

B47

S2_A12

B46

S2_A23

B45

S2_A15

B44

S2_A22

B43
B42

S2_A16

B41
B40
B39
B38
B37

S2_A21

B36

S2_RDY#

B35

S2_A20

B34

S2_WE#

B33

S2_A19

B32

S2_A14

B31

S2_A18

B30

S2_A13

B29
B28

S2_A17

B27

S2_A8

B26

S2_IOWR#

B25

S2_A9

B24

S2_IORD#

B23
B22

S2_A11

B21

S2_VS1

B20

S2_OE#

B19

b9
b8

b7
b6
b5

b4
b3
b2
b1

B18
B17
B16
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1

S2_CE2#
S2_A10

S2_D15
S2_CE1#
S2_D14
S2_D7
S2_D13
S2_D6

S2_D5
S2_D11
S2_D4
S2_CD1#
S2_D3

S2_CD2# 25
S2_WP 25

S2_BVD1 25

S2_BVD2 25
S2_REG# 25

S2_INPACK# 25

S2_WAIT# 25
S2_RST 25
S2_VS2 25

S2_VCC

S2_RDY# 25
S2_WE# 25

S2_IOWR# 25
S2_IORD# 25

S2_VS1 25
S2_OE# 25
S2_CE2# 25

S2_CE1# 25

S2_CD1# 25

C368
10UF_1206

12

C362
56PF

12

C333

.1UF

S2_VCC

12

C355

1000PF

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

Title

Size Document Number Rev

Date: Sheet of

SCHEMATIC, M/B LA-1421

B

401218

星期四 八月

Compal Electronics, inc.

26 44, 22, 2002

1A

A

SUPER I/O SMsC FDC47N227

+3VS

PID015,16
PID115,16
PID215,16
PID315,16

R149 10K

C182

4.7UF_10V_0805
10V

PCIRST#8,15,17,19,21,22,23,25,26,33

.1UF

C90

1 2

LPCRST

1 2

A

LPC_AD[0..3]

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

1 2

R189 10K

CLK_LPC_SIO
CLK_SIO14

1 2

1 2

R142 10K

12

C183
.1UF

.1UF

C91

1 2

+3VS

+3VS

R81
10K

LPC_RST#

R137
@10K

12

1 = 04Eh

12

C154
.1UF

1 2

R152 10K

1 2

1 2

12

C207
.1UF

147

U9B

147

U9C

R155

@10K

C236
.1UF

74LVC14

74LVC14

20
21
22
23

24
25

26
27

50
17
30
28
29

19
48

54
55
56
57
58
59

6
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47

51
52
64

18
53

65
93

7
31
60
76

43

65

U11
LAD0

LAD1
LAD2
LAD3

LFRAME#
LDRQ#

PCIRST#
LPCPD#

GPIO12/IO_SMI#
IO_PME#
SIRQ
CLKRUN#
PCICLK

CLK14
GPIO10

GPIO15
GPIO16
GPIO17
GPIO20
GPIO21
GPIO22
GPIO24
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO40
GPIO41
GPIO42
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47

GPIO13/IRQIN1
GPIO14/IRQIN2
GPIO23/FDC_PP

VTR
VCC

VCC
VCC

VSS
VSS
VSS
VSS

SMsC LPC47N227

LPCRST

LPC_RST#

LPC_AD[0..3]19,32

1 1

LPC_FRAME#19,32

LPC_DRQ#119,21

SUS_STAT#19,23,33

INT_SERIRQ19,21,25,32
PM_CLKRUN#19,21,25,32
CLK_LPC_SIO12

CLK_SIO1412

2 2

+3VS

System Board I D

1 2

R167 10K

1 2

3 3

4 4

R126 10K

+3VS

B

PD0/INDEX#

PD1/TRK0

PD2/WRTPRT#

PD3/RDATA#

PD4/DSKCHG#

PD5

PD6/MTR0#

PD7

BUSY/MTR1#

PE/WDATA#

SLCT/WGATE#

ERROR#/HDSEL#

ACK#/DS1#

INIT#/DIR#

AUTOFD#/DRVDEN0#

STROBE#/DS0#
SLCTIN#/STEP#

DTR2#
CTS2#
RTS2#
DSR2#

TXD2
RXD2

DCD2#

RI2#

DTR1#
CTS1#
RTS1#
DSR1#

TXD1
RXD1

DCD1#

RI1#

IRMODE/IRRX3

IRRX2
IRTX2

RDATA#

WDATA#

WGATE#

HDSEL#

DIR#

STEP#

DS0#

INDEX#
DSKCHG#
WRTPRT#

TRK0#

MTR0#

DRVDEN0
DRVDEN1

GPIO11/SYSOPT

LPC_RST# 32

PROPRIETARY NOTE

B

LPD0

68

LPD1

69

LPD2

70

LPD3

71

LPD4

72

LPD5

73

LPD6

74

LPD7

75

LPTBUSY

79

LPTPE

78

LPTSLCT

77

LPTERR#

81

LPTACK#

80
66
82
83
67

100

CTS#2

99
98

DSR#2

97
96
95

DCD#2

94

RI#2

92

DTR#1

89

CTS#1

88

RTS#1

87

DSR#1

86

TXD1

85

RXD1

84

DCD#1

91

RI#1

90
63

61
62

16
10
11
12
8
9
5
13
4
15
14
3
1

2
49

Base I/O Address
*

C

D

ACPI Debug Connector

+3VS

RP8

1 8
2 7
3 6
4 5

8P4R_4.7K

LPD[0..7]

LPD[0..7] 28

CTS#2
DSR#2
DCD#2
RI#2

RP16

1 8
2 7
3 6
4 5

8P4R_4.7K

+3VS

RI#1
CTS#1
DSR#1

Port 80 Debug Card Connector

+5VS

LPTBUSY 28
LPTPE 28
LPTSLCT 28
LPTERR# 28
LPTACK# 28
LPTINIT# 28
LPTAFD# 28
LPTSTB# 28
LPTSLCTIN# 28

1 2

R104 1K

PCI_AD919,23,25

PCI_FRAME#19,21,23,25

PCI_C/BE#219,23,25

PCI_AD819,23,25
PCI_AD519,23,25
PCI_AD119,23,25
PCI_AD219,23,25
PCI_AD619,23,25

JP19
1 2

3 4
5 6
7 8
9 10

12

11

14

13
15 16
171918

20

AMP 5-175638-0

Floppy Connector

1 2

R105 1K

1 2

R130 10K

WDATA#
WGATE#
HDSEL#
FDDIR#

+5VS

3MODE#

RDATA#
WDATA#
WGATE#
HDSEL#

FDDIR#
STEP#
DRV0#

INDEX#

DSKCHG#

WP#

TRACK0#

MTR0#

1 2

R187 1K

0 = 02Eh

Close to Super I /O

CLK_SIO14

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CLK_LPC_SIO

R159

22

1 2

C240

10PF

1 2

C

R188

22

1 2

C258

10PF

1 2

RDATA#
INDEX#
DSKCHG#
WP#

3MODE#

RP18

6
7
8
9

10

10P8R_1K

RP20

1 8
2 7
3 6
4 5

1 2

R146 10K

8P4R_1K

D

5
4
3
2
1

+5VS

+5VS

STEP#
MTR0#
DRV0#

TRACK0#

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1421

Size Document Number Rev

B

401218

星期四 八月

Date: Sheet of

+5V

RXD1DCD#1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1

CLK_PCI_DBC

PCIRST#

DRV0#33

+5VS

12

C656

C657

1000PF

10UF_16V_1206

Place component's closely FDD CONN.

E

JP1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

@96212-1011S

R310

@33_0402

PCI_TRDY# 19,21,23,25
CLK_PCI_DBC 12

PCI_C/BE#3 19,23,25
PCI_C/BE#1 19,23,25
PCI_AD7 19,23,25
PCI_AD3 19,23,25
PCI_AD0 19,23,25
PCI_AD4 19,23,25
PCI_C/BE#0 19,23,25

+5VS

INDEX#
DRV0#
DSKCHG#

MTR0#
FDDIR#

3MODE#
STEP#

WDATA#
WGATE#
TRACK0#
WP#
RDATA#
HDSEL#

12

C658

1UF_25V_0805

E

12

JP22

10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

C659

12

27 44, 22, 2002

C445

@10PF_0402

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

SFW26R-1STE1

.1UF

1A

Parallel Port

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 2

L50

L_0603

1 2

L51

L_0603

RP7
10P8R-2.7K

+5VRUN_PRN

RP5

8P4R-68

RP6

8P4R-68

LPT_D0
LPT_D1
LPT_D2
LPT_D3

LPT_D4
LPT_D5
LPT_D6
LPT_D7

LPT_INIT#

SLCTIN#

109876

12345

LPD0
LPD1
LPD2
LPD3

LPD4
LPD5
LPD6
LPD7

LPTINIT#27

LPTSLCTIN#27

D2

2 1

RB420D

+5VRUN_PRN

109876

12345

LPT_D4
LPT_D5
LPT_D6
LPT_D7

LPT_D3
LPT_D2
LPT_D1
LPT_D0

+5VS +5VRUN_PRN

LPTACK#
LPTBUSY
LPTPE
LPTSLCT

RP26
10P8R-2.7K

+5VRUN_PRN

AFD#/3M#
LPTERR#
LPTINIT#
SLCTIN#

LPD[0..7]27

AFD#/3M#
LPT_D0
LPTERR#
LPT_D1

LPTINIT#
LPT_D2
SLCTIN#
LPT_D3

LPT_D4
LPT_D5
LPT_D6
LPT_D7

LPTACK#
LPTBUSY
LPTPE
LPTSLCT

LPD[0..7]

CP1
1 8
2 7
3 6
4 5

8P4C-100PF

CP4
1 8

2 7
3 6
4 5

8P4C-100PF

CP3
1 8
2 7
3 6
4 5

8P4C-100PF

CP2
1 8
2 7
3 6
4 5

8P4C-100PF

+5VRUN_PRN

R8

2.2K

LPTSTB#27

LPTAFD#27

1 2

L49

L_0603

LPTERR#27

LPTBUSY27

LPTACK#27

LPTSLCT27

1 2

L48

L_0603

AFD#/3M#

LPT_D0
LPT_D1

LPT_INIT#
LPT_D2

SLCTIN#

LPT_D3

LPT_D4
LPT_D5
LPT_D6
LPT_D7

LPTPE27

+5VRUNPRN

1

14

2

15

3

16

4

17

5

18

6

19

7

20

8

21

9
22
10
23
11
24
12
25
13

JP9

LPTCN-25

C16
47PF

MDC Connector

12

C433
1UF_25V_0805

12

C442

1UF_25V_0805

+3V

+5VS_MDC+3VS_MDC+3V

12

1 2

R304 0

IAC_SDATAO19,30

IAC_RST#19,30

C438

1UF_25V_0805

+3VS

L33

1 2

+3VS_MDC

CHB1608B121

JP20

1

MONO_OUT/PC_BEEP

3

GND

5

AUXA_RIGHT

7

AUXA_LEFT

9

CD_GND

11

CD_RIGHT

13

CD_LEFT

15

GND

17

3.3Vaux

19

GND

21

3.3Vmain

23

AC97_SDATA_OUT

25

AC97_RESET#

27

GND

29

AC97_MSTRCLK

AMP-108-5424

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

MONO_PHONE

AC97_SDATA_IN1
AC97_SDATA_IN0

MDC CONN.

AUDIO_PWDN

RESERVED

GND

+5V
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED

AC97_SYNC

GND

AC97_BITCLK

2
4
6
8

+5VS_MDC

10
12
14
16
18
20
22
24
26
28
30

1 2

R322 22

MDC_DN# 33MD_MIC30
MD_SPK 30

1 2

L31 CHB1608B121

1 2

R303 10K

1 2

R315 @22

1 2

R320 22

+5VS

+3VS

1 2

R314 10K

IAC_BITCLK 19,30

IAC_SYNC 19,30

IAC_SDATAI1 19

Title

SCHEMATIC, M/B LA-1421

Size Document Number Rev

401218

星期四 八月

Date: Sheet of

Compal Electronics, inc.

1A

28 44, 22, 2002

USB Port

+5VS

USB_OC#120

F3

POLYSWITCH_0.75A

12

C471

1000PF

USB_VCCB

12

12

R348
470K

R347
560K

USB_PN120

USB_PP120

12

C692
1000P

USB1_D­USB1_D+

12

C472

C468

150UF_E

.1UF

USB_BGND

L4

FBM-160808-121T

1 2
1 2

L3

FBM-160808-121T

+

JP10
1

2
3

PORT 1

4

12

12

C6

C5

47PF

47PF

5
6
7
8
9
10
11
12

SUYIN 2557A-12G

PORT 2
PORT 3

+5VS

USB_OC#320

+5VS

POLYSWITCH_0.75A

USB_OC#020

F4

POLYSWITCH_0.75A

12

F2

C481
1000PF

12

C473
1000PF

USB_VCCC

12

12

USB_VCCA

R349

470K

R354

560K

12

12

R345

470K

12

R346

560K

USB_PN020

USB_PP020

USB_PN320

USB_PP320

USB0_D­USB0_D+

12

C694
1000P

USB3_D­USB3_D+

C693
1000P

FBM-160808-121T

1 2
1 2

FBM-160808-121T

12

C475
.1UF

USB_CGND

L2

FBM-160808-121T

1 2
1 2

L1

FBM-160808-121T

L6

L5

C470

150UF_E

12

C467
.1UF
USB_AGND

12

C9
47PF

+

C469

150UF_E

12

C8
47PF

+

12

12

C7

C4

47PF

47PF

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

SCHEMATIC, M/B LA-1421

Size Document Number Rev

B

401218

星期四 八月

Date: Sheet of

Compal Electronics, inc.

1A

29 44, 22, 2002

AC97 Audio Codec

INT_CD_L22

INT_CD_R22

MIC34

1 2

C650 1000PF

MD_SPK28

R493 MODE

Stuff

14.318MHz External

No-Stuff

24.576MHz Crystal
or External Colck

MONO_IN31

IAC_RST#19,28

IAC_SYNC19,28

IAC_SDATAO19,28

R242 0_0805

12

CD_AGND22

R268 20K
R272 20K

R260 20K
R276 20K

MIC

12

R443 100

R258

@0

12
12

CD_L_R

12
12

CD_GNA

12

R257 @6.8K

12

R251 6.8K

12

EAPD31

R445
20K

12

R446

@0

C418

4.7UF_10V_0805

VDDA

12

C400
.1UF

C365

12

.1UF

1 2

C353 1UF_25V_0805

CD_R_R

1 2

C369 1UF_25V_0805

1 2

C363 1UF_25V_0805

1 2

C372 1UF_25V_0805

AUD_VREF

1 2

C334 1UF_25V_0805

CD_GNA

12

12

R444

20K

12

L30

1 2

CHB2012U170

C415

12

4.7UF_10V_0805

U30

14
15
16
17
23
24
18
20
19
21
22
13
12

11
10

5

45
46

47
48

4
7

+5VS+5VS

12

C419
.1UF

AVDD_AC97

25

38

AVCC

AVCC

AUX_L
AUX_R
VIDEO_L
VIDEO_R
LIN_IN_L
LIN_IN_R
CD_L
CD_R
CD_GNA
MIC1
MIC2
PHONE
PC_BEEP

RESET#
SYNC
SDATA_OUT
NC

XTSEL
EAPD
SPDIFO
GND

GND

PROPRIETARY NOTE

U38

4

VIN

2

DELAY

7 1

ERROR CNOISE

8

ON/OFF#

SI9182

LINE_OUT_L
LINE_OUT_R

MONO_OUT
TRUE_OUT_L
TRUE_OUT_R

SDATA_IN

XTL_OUT

VREFOUT

ALC202A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND

TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

9

VCC

BIT_CLK

XTL_IN

AFLT1
AFLT2

VREF
VRDA

VRAD

NC

NC
GPIO0
GPIO1

NC

AGND
AGND

VOUT

SENSE

GND

VCC

5
6

3

VDDC

12

C649
.1UF

LINEL

35

LINER

36
37
39
41

6
8
2

3
29
30
28
27
32

31
33
34
43
44

40
26
42

12

C424
.1UF

R440

1 2

0

12

C315

4.7UF_10V_0805

C374
1000PF12
C391
1000PF1 2
C392

4.7UF_10V_08051 2
C371

4.7UF_10V_08051 2
C366
1UF_25V_0805

1 2

C370
1000PF12

R441 22

1 2

R442
221 2

1 2

C653 1000PF_1%

1 2

C652 1000PF_1%

C397

12

@1000PF

12

+3VS

C645 22PF

R439 10K
1 2

1 2

R448 0

12

C358

1UF_25V_0805

R477

1K

12

12

LEFT
RIGHT

1 2

R478

69.8K_1%

R479

24K_1%

R270
@100K

LEFT 31
RIGHT 31
MD_MIC 28

AUD_VREF

12

C401
@.01UF

VDDA

12

C440

4.7UF_10V_0805

CLK_DAC_1412

IAC_BITCLK 19,28

IAC_SDATAI0 19

12

C404

1UF_25V_0805

14.318MHz

12

C654
.1UF

CLK_DAC_14

Y3

24.576MHz

12

C403

4.7UF_10V_0805

C643

@0.01u

C644
22PF

C314
22PF

Title

Size Document Number Rev

B

Date: Sheet of

VDDC

R437
@10K

R438
@10K

Compal Electronics , inc.

401218

星期四 八月

AUD_VREF

12

12

C399
.1UF

C402

4.7UF_10V_0805

SCHEMATIC, M/B LA-1421

30 44, 22, 2002

1A

A

Audio AMP

4 4

R324 100K

1 2

INTSPK_L134

LEFT30

RIGHT30

3 3

INTSPK_R134

R313 0

R326 0

VOL_AMP
INTSPK_L1
INTSPK_R1

R319 0

R325 0

12

12

12

12

+5VOP

12

B

C446
@.1UF

W=40Mil

12

12

U3-5
U3-23
U3-6
U3-20

C430

.047UF_0805

L34

1 2

CHB3216U121

12

C436

C441

.1UF

4.7UF_10V_0805

U39

7

PVDD

18

PVDD

19

VDD

2

PC-ENABLE

3

VOLUME

4

LOUT+

21

ROUT+

5

LLINEIN

23

RLINEIN

6

LHPIN

20

RHPIN

17

CLK

TPA0132

+5VS

SHUTDOWN#

SE/BTL#

PC-BEEP

BYPASS

LOUT­ROUT-

LIN
RIN

GND
GND
GND
GND

C

+5VS

12

R327

100K

SHUTDOWN#

22
15
14
11
9
16
10
8

1

12

C420

12
13

.47UF

24

C423

13

Q46

2N7002

1 2

.1UF
INTSPK_L2
INTSPK_R2

12

C437

.47UF

2

NBA_PLUG 34

NBA_PLUG

INTSPK_L2 34
INTSPK_R2 34VOL_AMP32,34

12

C428

.47UF

EAPD 30

1 2

R300 100K

INTSPK_L1

INTSPK_L2

INTSPK_R1

R308 33

INTSPK_R2

R292 33

+5VOP

1 2

R307 33

1 2

R306 33

D

1 2

1 2

1 3

2

Q42 DTC314TK

10K

1 3

Q40 DTC314TK

1 3

2

Q43 DTC314TK

10K

2

Q44 DTC314TK

10K

1 3

2

10K

Q41

32

2SB1188

1 2

1

R312 2.2K

12

R311

4.7K
10UF_16V_1206

12

C439

4.7UF_10V_0805

C447

E

D35

3

12

R321

2.2K

12

2

DAN217

1

+5VS

System Sound

BEEP#32

U29B

74LVC125

2 2

1 1

A

5 6

+3V POWER

4

B

+3V

12

R259
100K

1 2

R256 8.2K

.22UF

PCM_SPK#25

ICH_SPKR20

PROPRIETARY NOTE

C356

+3V

C364

1 2

.1UF

147

U32A

21

12

74LVC14

+3V POWER

+3V

147

U32B

74LVC14

+3V POWER

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C394

1 2

1UF_10V_0603

C390

1 2

1UF_10V_0603

C373

43

1 2

1UF_10V_0603

R286

1 2

R279

1 2

R278

1 2

C

560

560

560

VDDA

12

R299
10K

12

12

2

3 1

12

R283
10K

RB751V

2 1

R297
10K

Q38
2SC2411K

D26

C412
10UF_16V_1206

C409

1 2

1UF_10V_0603

R293

2.4K

1 2

MONO_IN

D

MONO_IN 30

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics , inc.

401218

星期四 八月

SCHEMATIC, M/B LA-1421

E

31 44, 22, 2002

1A

5

12

12

C336
.1UF

+RTCVCC

D D

12

C327
.1UF

C C

ICH_WAKE_UP#19

B B

A A

LAN_PME#23

PCM_PME#25

C393
.1UF

EC_AVCC

GATEA2019

ECAGND

+5VALW

12

C448
.1UF

12

C432
.1UF

RC#19

1 2

R244 4.7K

1 2

R243 4.7K

12

12

C332

C427

1000PF

.1UF

+3VALW

L32

1 2

CHB1608U800

ECAGND

+3VS

R246

R245

10K

10K

2 1

1 2

1 2

RB751V

2 1

RB751V

D20 RB751V

21

D22

1
2

RB717F

1 2

C429 .01UF

+3VALW

RP25

1 8
2 7
3 6
4 5

8P4R_10K

EC_SMC2
EC_SMD2

JP4

1
2
3
4
5
6

@ FCI SFW06R-2STE1

5

1000PF

D24

D23

+3VALW

1 2

3

BATT_TEMPA

G_RST#
FRD#
SELIO#
FSEL#

EC_URXD
EC_UTXD
EC_USCLK

C335

G20

RCL#

R249

+3VALW

10K

12

VOL_AMP31,34

+5VALW

LPC_AD[0..3]19,27

+3VALW

+3VS

1 2

R302 @0

4

1 2

R287 @0

1 2

R288 0

PM_BATLOW#19
EC_LID_OUT#21

PBTN_OUT#21

FAN_SPEED34

PM_SLP_S3#12,19

NUM_LED#34

CAPS_LED#34

ARROW_LED#34

EC_RIOUT#21

PM_SLP_S1#12,19

BATT_TEMPA38

PM_SLP_S5#19

LPC_AD[0..3]

LPC_FRAME#19,27

LPC_DRQ#019,21

INT_SERIRQ19,21,25,27

C407 10PF

4

INVT_PWM16

EC_SMC133,38
EC_SMD133,38

LPC_RST#27

EC_SMC25
EC_SMD25

EC_SMI#21

DAC_BRIG16

EN_DFAN34

1 2

BEEP#31

ACOFF43

G_RST#26

ALI/MH#38

ON/OFF21,35

51ON35

KSO16
KSO17

PC733

ACIN20,34,37

IREF43

R280 @0

EC_RST#33

LPCPD#33

PM_CLKRUN#19,21,25,27

EC_SCI#21

CLK_LPC_EC12

R290 22

3

+3VALW EC_AVCC +RTCVCC

12

C398
.1UF

INVT_PWM

For PWM
EN_DFAN

EC_URXD
EC_UTXD
EC_USCLK
EC_SMC1
EC_SMD1

EC_SMC2
EC_SMD2

PCI_PME#
ATFOUT#

PC7
ACIN

RING#

SCR_LED#

VGA_SUSP#

A/B#USE

BATT_TEMPA SYSON

BATT_TEMPB

VBATTA

VBATTB

BLI/MH#

BATT_CHGI

ADP_I

OEM

OEM

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

1 2

51RST#

G20
RCL#

1 2

PROPRIETARY NOTE

51VDD

U37

32

IOPA0/PWM0

33

IOPA1/PWM1

36

IOPA2/PWM2

37

IOPA3/PWM3

38

IOPA4/PWM4

39

IOPA5/PWM5

40

IOPA6/PWM6

43

IOPA7/PWM7

153

IOPB0/URXD

154

IOPB1/UTXD

162

IOPB2/USCLK

163

IOPB3/SCL1

164

IOPB4/SDA1

165

IOPB7/RING#/PFAIL#

168

IOPC0

169

IOPC1/SCL2

170

IOPC2/SDA2

171

IOPC3/TA1

172

IOPC4/TB1/EXWINT22

175

IOPC5/TA2

176

IOPC6/TB2/EXWINT23

1

IOPC7/CLKOUT

26

IOPD0/RI1#/EXWINT20

29

IOPD1/RI2#/EXWINT21

30

IOPD2/EXWINT24

41

IOPD4

42

IOPD5

54

IOPD6

55

IOPD7

62

IOPJ2/BST0

63

IOPJ3/BST1

69

IOPJ4/BST2

70

IOPJ5/PFS#

75

IOPJ6/PLI

76

IOPJ7/BRKL_RSTO#

81

AD0

82

AD1

83

AD2

84

AD3

87

IOPE0AD4

88

IOPE1/AD5

89

IOPE2/AD6

90

IOPE3/AD7

2

IOPE4/SWIN

44

IOPE5/EXWINT40

93

DP/AD8

94

DN/AD9

99

DA0

100

DA1

101

DA2

102

DA3

105

TINT#

106

TCK

107

TDO

108

TDI

109

TMS

15

LAD0

14

LAD1

13

LAD2

10

LAD3

9

LFRAME#

8

LDRQ#

7

SERIRQ

19

LREST#

22

SMI#

23

PWUREQ#

24

IOPE6/LPCPD#/EXWIN45

25

IOPE7/CLKRUN#/EXWINT46

31

IOPD3/ECSCI#

5

GA20/IOPB5

6

KBRST#/IOPB6

18

LCLK

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

GND1

173546

GND2

GND3

122

VDD

GND4

137

GND5

3445123

VCC1

VCC2

GND6

GND7

159

167

136

157

1661695

VCC3

VCC4

VCC5

VCC6

AVCC

NC1

NC2

NC3

AGND

111220218586919297

96

ECAGND

3

161

IOPH0/A0/ENV0

VBAT

IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1

IOPH5/A5/SHBM

IOPK5/A13/BE0

IOPK6/A14/BE1

IOPK7/A15/CBRD

32KX1/32KCLKOUT

NC4

NC5

NC6

NC7

NC8

IOPH4/A4/TRIS

IOPH6/A6
IOPH7/A7

IOPK0/A8

IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12

IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19

IOPL4/WR1#

IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7

IOPJ0/RD#

IOPJ1/WR0#

SELIO#

SEL0#
SEL1#

IOPM0/D8

IOPM1/D9
IOPM2/D10
IOPM3/D11
IOPM4/D12
IOPM5/D13
IOPM6/D14
IOPM7/D15

PSCLK1/IOPF0
PSDAT1/IOPF1
PSCLK2/IOPF2
PSDAT2/IOPF3
PSCLK3/IOPF4
PSDAT3/IOPF5
PSCLK4/IOPF6
PSDAT4/IOPF7

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

KBSOUT0

KBSOUT1

KBSOUT2

KBSOUT3

KBSOUT4

KBSOUT5

KBSOUT6

KBSOUT7

KBSOUT8

KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15

32KX2

CLK

NC9

NC10

PC87591VPC

98

L29

1 2

CHB1608U800

124
125
126
127
128
131
132
133

143
142
135
134
130
129
121
120

113
112
104
103
48

138
139
140
141
144
145
146
147

150
151

152
173

174
148

149
155
156
3
4
27
28

110
111
114
115
116
117
118
119

71
72
73
74
77
78
79
80

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68

158
160
47

KBA[0..18]33

ADB[0..7]33

KSI[0..7]34

KSO[0..15]34

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7

KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15

KBA16
KBA17
KBA18
KBA19

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

FRD#

SELIO#
FSEL#

SUSP#
ECVR_ON
TRICKLE
VTT_ON
VTT_PWRGD#

ENVEE

ENBKL
KBD_CLK

KBD_DATA
PS2_CLK
PS2_DATA

TP_CLK

TP_DATA

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

CRY1
CRY2

12

C329
10PF

2

KBA[0..18]
ADB[0..7]
KSI[0..7]
KSO[0..15]

PCM_RI#25

FSTCHG 43

FRD# 33
FWR# 33

SELIO# 33

FSEL# 33

SYSON 36
SUSP# 36

VTT_ON 41
VTT_PWRGD# 5,12

ENBKL 16

TP_CLK 34
TP_DATA 34
LID_SW# 34

BADDR1(KBA3) BADDR0(KBA2)

0
0

*

1 1

R241

CRY2CRY1

1 2

20M

X2

32.768KHZ

2

R248
120K

1 2
12

C338
12PF

1

1 2

+3V

R240 10K

ECVR_ON

+3VS

ATFOUT#

+3VS

1 2

R295

10K

21

D21 RB751V

12

R247 10K

21

D25 RB751V

+3V +3V

R298

10K

D31

2 1

1 2

RB751V

R294

10K

1 2

VR_ON 40

ATF_INT# 19

RING#

KBA0PCI_PME#
KBA1
KBA2
KBA3
KBA4
KBA5

1 2

R284 @1K

1 2

R281 1K
R277 @1K

1 2

R273 1K
R269 @1K

1 2

R261 1K

I/O Address

Index
0
1
01

2E 2F

4E

(HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1

Data

4F

Reserved

ENV0 (KBA0) TRIS (KBA4)

IRE
OBD 0

*

DEV 0
PROG

SHBM(KBA5)=1: Enable shared memory with host BIOS
TRIS(KBA4)=1: While in IRE and OBD, float all the

signals for clip-on ISE use

ENV1 (KBA1)
0
1

1

0
1

1

0
0
0
0

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1421

Size Document Number Rev

B

401218

星期四 八月

Date: Sheet of

32 44, 22, 2002

1

+3VALW

1A

EXT I/O PORT

R264 @100K1 2

1 2

R252

1 2

R262 100K

+3VALW

R266 100K

100K

BID

R263

1 2

@100K

R254 @100K

12
12

SELIO#32

INPUT PORT

SHDD_LED#22
PHDD_LED#22

OCCB#26

DRV0#27

KBA1

SELIO#

PCM1_LED25
PCM2_LED25

PCM_LED

+3VALW

147

4
5

U19B

74LVC32

D30

1
2

DAN202U

+3VALW

C359

1 2

.1UF

20

1A1 1Y1

VCC

1A2 1Y2
1A3 1Y3
1A4 1Y4
2A1 2Y1
2A2 2Y2
2A3 2Y3
2A4 2Y4

1G
2G

GND

10

+3VALW

U31

74LVC244

ADB3
ADB4
ADB5
ADB6
ADB7

KBA2
SELIO#

+3VALW

+3VALW

PC732

12

R275
470K

2

R285
470K

EC_RST# LPCPD#

13

Q37
@2N7002

12

2 18
4 16
6 14

8 12
11 9
13 7
15 5
17 3

1
19

6

R265

1 2 C330

100K

12

R291

100K

PCM_LED

3

OUTPUT PORT

+3VALW

C266

1 2

.1UF

147

1
2

EC_RST# 32

U19A

74LVC32

3

+3VALW

+5VALW

ADB0ADB0

ADB1ADB1
ADB2ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

1 2

R236 100K

1 2

R250 20K

3

D0

4 5

D1 Q1

7 6

D2 Q2

8 9

D3 Q3

13 12

D4 Q4

14 15

D5 Q5

17 16

D6 Q6

18 19

D7 Q7

11

CLK

1

CLR

12

1UF_25V_0805

SUS_STAT#19,23,27

LPCPD#

R211 @0

+5VALW

C349

1 2

20

U28

2

Q0

VCC

GND

74HCT273

10

1 2

C267 @.1UF

PCIRST#8,15,17,19,21,22,23,25,26,27

.1UF

+3VALW

1
2

5

3

U18

4

@7SH08FU

PWR_LED# 34
MDC_DN# 28
BAT_LOW_LED# 34
BAT_CHG_LED# 34
PCMRST# 26
EN_LAN# 23
HDD_LED# 34
CD_LED# 34

LPCPD# 32

For PC87591 REV 0.A Only

SYSTEM BIOS

1 2

C443 .1UF

FWE#

4

U40
7SH32FU

C444

1 2

.1UF

KBA[0..18]32
ADB[0..7]32

3 5

FLASH_VCC

KBA11
KBA9
KBA8
KBA13
KBA14
KBA17
FWE#

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4

+3VALW+3VALW

12

R323
100K

2

2N7002

1

1 2

R317 @0

1 2

R318 0
U33

1

A11

2

A9

3

A8

4

A13

5

A14

6

A17

7

WE#

8

VCC

9

A18

10

A16

11

A15

12

A12

13

A7

14

A6

15

A5

16

A4

@SST39VF040_TSOP
KBA[0..18]
ADB[0..7]

2

1 3

D

R316

1 2

100K

G

Q45

S

+5VALW
+3VALW

OE#

A10

CE#
DQ7
DQ6
DQ5
DQ4
DQ3

VSS
DQ2
DQ1
DQ0

A0
A1
A2
A3

EC_FLASH# 20
FWR# 32

FRD#

32

KBA10

31

FSEL#

30

ADB7

29

ADB6

28

ADB5

27

ADB4

26

ADB3

25
24

ADB2

23

ADB1

22

ADB0

21

KBA0

20

KBA1

19

KBA2

18

KBA3

17

+12VS

FLASH_VCC

FRD# 32
FSEL# 32

U35

KBA11

1

A11

KBA9

2

A9

KBA8

3

A8

KBA13

4

A13

KBA14

5

A14

KBA17

6

A17

FWE#

7

WE#

8

VCC

KBA18

9

A18

KBA16

10

A16

KBA15

11

A15

KBA12

12

A12

KBA7

13

A7

KBA6

14

A6

KBA5

15

A5

KBA4

16

A4

@29F040_TSOP

PLCC

U45

KBA18

1

NC

KBA16

2

A16

KBA15

3

A15

KBA12

4

A12

KBA7 KBA13

5

A7

KBA6

6

A6

KBA5

7

A5

KBA4

8

A4

KBA3

9

A3

KBA2

10

A2

KBA1

11

A1

KBA0

12

A0

ADB0

13

DQ0

ADB1

14

DQ1

ADB2

15

DQ2

16

VSS

29F040/SST39VF040_PLCC

OE#

A10

CE#
DQ7
DQ6
DQ5
DQ4
DQ3

VSS
DQ2
DQ1
DQ0

A0
A1
A2
A3

C455 .1UF

32

VCC

FWE#

31

WE*

KBA17

30

A17

KBA14

29

A14

28

A13

KBA8

27

A8

KBA9

26

A9

KBA11

25

A11

FRD#

24

OE*

KBA10

23

A10

FSEL#

22

CE*

ADB7

21

DQ7

ADB6

20

DQ6

ADB5

19

DQ5

ADB4

18

DQ4

ADB3

17

DQ3

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

1 2

FRD#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3

ADB2
ADB1
ADB0
KBA0
KBA1
KBA2
KBA3

FLASH_VCC

SMBus
EEPROM

GND

+5VALW

12

R222
100K

1

A0

2

A1

3

A2

4

12

R235
100K

R225

4.7K

+5VALW

C300

1 2

12

R226

4.7K

.1UF

8
7
6
5

U25

VCC
WC
SCL
SDA

NM24C16

+5VALW +5VALW

12

EC_SMC132,38
EC_SMD132,38

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1421

Size Document Number Rev

B

401218

星期四 八月

Date: Sheet of

33 44, 22, 2002

1A

5

System Connector

4

3

2

1

LID Switch

Switch Board Connector

D D

C C

AVDD_AC97_JP5

BAT_CHG_LED#33
BAT_LOW_LED#33

PWR_LED#33

TP_DATA32

NBA_PLUG31

VOL_AMP31,32

INTSPK_R231

INTSPK_R131

INTSPK_L231

INTSPK_L131

MIC30

TP_CLK32

+5VALW

+5VS

MIC_C

1 2

L27
FBM-11-160808-700T

JP5

20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

HEADER 20

MIC_CMIC

12

C311
220PF

ACIN20,32,37

HDD_LED#33

CD_LED#33

CAPS_LED#32

ARROW_LED#32

NUM_LED#32

C695

C696

100P

100P

1 2

1 2

AVDD_AC97 AVDD_AC97_JP5

AUD_VREF

1 2

R475 @0

1 2

R476 0

FAN Connector

+12V

B B

12

C233

.1UF

EN_DFAN32

A A

EN_DFAN

1 2
R165
13K_1%_0603

+5V

C224 .1UF

VCC

U14

1
3

VEE

LMV321_SOT23-5

2 5

1 2

R154

7.32K_1%_0603

1 2

4

FAN_SPEED32

12

R129

3.6K

21

D13

1N4148

Q30
2SA1036K

+3V

12

12

R118

10K

C210
.1UF

+5V

1

C

2

B

E

3

2 1

LED Board Connector

+5VALW

+5VS
+3VS

CP11

8P4C-100P

1 8

2 7

3 6

4 5

Q28
FMMT619

FAN1

D14
1N4148

2 1

12

D12

1SS355

C697

1000PF

12

C201
@10UF_16V_1206

JP15

1
2
3

53398-0310-FAN

JP3

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

96212-1011S

2

+3VALW

12

R18

100K

LID_SW#32

LID_SW#

SW1

3

4

HORNG CHIH

RTC Batt. Connector

+3VALW

3

1

D27

DAN217

1

2

+RTCVCC

12

C413
.1UF

Place near ICH3-M

Int. Keyboard Connector

JP7

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

int. kb

KSI[0..7]
KSO[0..15]

D28
RB751V

21

W=30mils

+RTC_BATT

12

BATT1

- +

RTCBATT

C414

1 2

.1UF

D29
RB751V

KSI1
KSI7
KSI6
KSO9
KSI4
KSI5

KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15

4 5
3 6
2 7
1 8
4 5
3 6
2 7
1 8
4 5
3 6
2 7
1 8
4 5
3 6
2 7
1 8
4 5
3 6
2 7
1 8
4 5
3 6
2 7
1 8

21

W=30mils

CP10
8P4C-100P

8P4C-100P

CP8
8P4C-100P

CP7
8P4C-100P

CP6
8P4C-100P

CP5
8P4C-100P

KSI[0..7] 32
KSO[0..15] 32

CHGRTC

CP9

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

5

4

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

3

2

SCHEMATIC, M/B LA-1421

Size Document Number Rev

B

401218

星期四 八月

Date: Sheet of

34 44, 22, 2002

1

1A

A

B

C

D

E

South Bridge Power Good Circuit

+3V

R195
47K

+5VS

12

12

R205

1 2

330K

R228
100K

R229

240K

R194

12

330K

+5V +3V

12

12

12

C316

.01UF

1 1

2 2

+3V +3V

147

C260

.22UF

+3V

R206
47K

C275
.1UF

12

C328

.1UF

U21D

89

74LVC14

+3V POWER +3V POWER

147

U21F

74LVC14

147

U21E

74LVC14

U17

2

1213

1

@7SH32FU

3 5

+3VS

1 2

U27
MAX6342

12

5

MR#

3

VCCGND

PFI

1011

1 2

C331

RST#

PFO#

C261

.1UF

4

.1UF

6

4

PM_RSMRST#

1 2

R190

0

10

9 8

+3V POWER

PM_RSMRST# 19

U29C
74LVC125

SYS_PWROK 19

12

R255

10K

Screw Hole

H1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

S276D118

H16

2
3
4
5
6
7
8
9

S315D118

H2

2
3
4
5
6
7
8
9

C236D165

H8

2
3
4
5
6
7
8
9

C148D118

S276D118

2
3
4
5
6
7
8
9

S315D118

2
3
4
5
6
7
8
9

C236D165

2
3
4
5
6
7
8
9

C148D118

H6

H17

H3

H15

2
3
4
5
6
7
8
9

2
3
4
5
6
7
8
9

2
3
4
5
6
7
8
9

2
3
4
5
6
7
8
9

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

S276D118

H18

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

S315D118

2
3
4
5
6
7
8
9

2
3
4
5
6
7
8
9

H4

2
3
4
5
6
7
8
9

C236D165

H7

2

H10
2
3
4
5
6
7
8
9

2
3
4
5
6
7
8
9

2
3
4
5
6
7
8
9

2
3
4
5
6
7
8
9

S276D118

H5

2
3
4
5
6
7
8
9

C236D165

H14

2
3
4
5
6
7
8
9

C144D114

2
3
4
5
6
7
8
9

H13

2
3
4
5
6
7
8
9

S276D118

ST2

2
3
4
5
6
7
8
9

S276D173

2
3
4
5
6
7
8
9

2
3
4
5
6
7
8
9

2
3
4
5
6
7
8
9

2
3
4
5
6
7
8
9

H21

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

S276D118

ST1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

S276D173

C276D110

O355X79D315X39A

H19

H23

S276D173

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

C276D110

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

O176X144D146X114

ST3

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

H12

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

H24

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

O355X79D315X39A

H9

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

H25

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

O355X79D315X39A

EMI Finger

PAD1

PAD2

PAD3

PAD4

PAD5

PAD6

Switch for Power Button

3 3

D5

PSOT03C

3

SW2

3
4

SMT1-05

Power Button

51ON32

4 4

2

1

ON/OFFBTN#

2

+3VALW

12

R41

1 2

13

D

2N7002

S

4.7K

R37
33K

G

Q15

2

51ON

A

D4

3

DAN202U

2

DTC124EK

22K

B

1
2

22K

+3VALW

12

13

C

E

R24
100K

Q9

ON/OFF

51ON#

12

C34

1000PF

ON/OFF 21,32
51ON# 37

D8

12

RLZ20A

2 1

B

WHEN R=0,Vbe=1. 35V
WHEN R=33K,Vbe=0. 8V

PROPRIETARY NOTE

Fiducial Mark

CF11

CF13

SMD40M80

SMD40M80

1

1

CF9

CF14

SMD40M80

SMD40M80

1

1

FD2

FD5

FIDUCAL

FIDUCAL

1

1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

EMI FINGER

CF15
SMD40M80

1

CF12
SMD40M80

1

FD1
FIDUCAL

1

1

CF16
SMD40M80

1

CF3
SMD40M80

1

FD4
FIDUCAL

1

1

EMI FINGER

CF1
SMD40M80

1

CF6
SMD40M80

1

FD3
FIDUCAL

1

D

1

EMI FINGER

CF2
SMD40M80

1

FD6
FIDUCAL

1

1

EMI FINGER

CF8
SMD40M80

1

CF4
SMD40M80

1

EMI FINGER

CF5
SMD40M80

1

1

CF10
SMD40M80

1

1

EMI FINGER

CF7
SMD40M80

1

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1421

Size Document Number Rev

B

401218

星期四 八月

Date: Sheet of

35 44, 22, 2002

E

1A

A

Power Plan After System On --> Active By SYSON

U23

VIN
VIN
VIN VHV

VON/OFF

SI4702DY

3

S2

4

S2

1

S1

7

12

C289

1 1

4.7UF_10V_0805

6
5 8

2

+3V+3VALW

12

C308

4.7UF_10V_0805

ON_GATE

12

C269

.01UF

12

R208

1M

+3V

12

C309
1UF_25V_0805

12

R207
100K

B

+12VALW

12

C213

4.7UF_10V_0805

C

U13

7

S2

VIN

6

S2

VIN

5 8

VIN VHV

S1

2

VON/OFF

SI4702DY

3
4

1

+5V+5VALW

4.7UF_10V_0805

C221

12

12

C245

.01UF

+5V

12

C215
1UF_25V_0805

ON_GATESYSON# SYSON#

SYSON#

2

G

2N7002

D

+12VALW

C180
.1UF_25V_0805

1 2

Q31

13

D

S

SYSON

12

C179

1000PF

2

G

12

12

13

R106
100K

D

S

R103
47K

Q25
2N7002

G

2

+12VALW

1 3

12

S

Q24

NDS352P

D

+12V

C167
1UF_25V_0805

E

12

C176
1UF_25V_0805

+12V

Power Off During System Suspend(S3) --> Active By SUSP

+3VALW

2 2

U5

8

D

7

D

6

D

5

D

12

3 3

SI4800

C65

4.7UF_10V_0805

SUSP

SUSP

12

C273

4.7UF_10V_0805

+1.8VS+1.8V

1

S

2

S

3

S

4

G

12

R65
1K

13

D

2

G

S

+1.8VS

+5VS_GATE

Q20
2N7002

U20

7

S2

VIN

6

S2

VIN

5 8

VIN VHV

S1

2

VON/OFF

SI4702DY

+1.8V

12

C64

4.7UF_10V_0805

3
4

1

12

C126
1UF_10V_0603

1UF_10V_0603

12

C307

C272
.1UF

12

C125

4.7UF_10V_0805

12

C93
1UF_10V_0603

12

C304
10UF_16V_1206

+5VS_GATE

12

12

C124

4.7UF_10V_0805

+3VS +5VS

1 2

12

C63

4.7UF_10V_0805

12

12

R204
1M

12

C62

4.7UF_10V_0805

12

C305
10UF_16V_1206

R201 100K

+3VS

C271
10UF_16V_1206

+12V

12

C270
10UF_16V_1206

U16

8

D

7

D

6

D

5

D

12

SI4800

C263

4.7UF_10V_0805

SUSP

12

C698
1000PF

+1.5VS+1.5V

1

S

2

S

3

S

4

G

12

R145
1K

13

D

2

G

S

+1.5V TO +1.5V_SW Transfer

Signal Inverter

+3VALW+3VALW

12

R227

4 4

SUSP#

SUSP#

4.7K

SUSP

13

D

2

G

S

A

Q34
2N7002

SYSON32

12

R237

10K

SYSON#

13

D

2

Q35

G

2N7002

S

SYSON# 39

B

For Discharger

12

R86
1K

13

D

2

Q22

G

2N7002

S

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

SUSPSYSON#

C

+5VALW +5VS

SUSP

12

12

C699

C74

1000PF

4.7UF_10V_0805

U7

7

VIN

6

VIN

5 8

VIN VHV

2

VON/OFF

SI4702DY

+1.5VS

+5VS_GATE

Q29
2N7002

+12VS+12V

12

13

D

2

G

S

R30
1K

Q14
2N7002

12

C254
1UF_10V_0603

SYSON#

3

S2

4

S2

1

S1

12

C235

4.7UF_10V_0805

+3V +3VS

R238
470

13

D

2

G

S

Q36
2N7002

12

C111

4.7UF_10V_0805

12

C83

.01UF

12

C244

4.7UF_10V_0805

SUSP

D

+5VS_GATE

12

R56
330K

12

13

2

G

D

S

12

R224
1K

Q33
2N7002

12

C113

C147

.1UF

4.7UF_25V_1206

Q19

13

D

2N7002

2

G

S

12

C198
.1UF_25V_0805

SUSP#

2

G

Q26
2N7002

Title

Size Document Number Rev
Custom

Date: Sheet of

12

C148

4.7UF_25V_1206

SUSP

+12VALW

+12VALW

12

R109
100K

G

2

12

R112
51K

13

D

S

2

G

Compal Electronics, inc.

SCHEMATIC, M/B LA-1421

401218

星期四 八月

S

Q27

NDS352P

D

1 3

12

C184
1UF_25V_0805

R153
470

13

D

Q32
2N7002

S

12

C149

4.7UF_25V_1206

+12VS

12

C181

1UF_25V_0805

12

SUSPSYSON#

E

C701

1000P

2

G

+12VS

+5VS+5V

12

R75
1K

13

D

Q23
2N7002

S

36 44, 22, 2002

1A

A

B

C

D

Vin Detector
High 18.764 17.901 17.063

Low 17.745 16.903 16.038

PR1

1 1

PJP1

SUYIN_2DC-S315-B01

1

3

3

2

1

2

PF1

5A_32V_TR/3216FF-5A_1206

PD1

EC10QS04

2 1

PC1

1000P_0603_50V8J

PL1

CHC4532U800_1812

1 2

PC2

100P_0603_50V8J

PC3

1000P_0603_50V8J

VIN

PC4

100P_0603_50V8J

PC5

1000P_0603_50V8J

PR3

84.5K_0603_1%

12

PR6

20K_0603_1%

VIN

12

1 2

12

.1U_0603_50V4Z

PR5
22K_0603_5%

12

PC6

1M_0603_1%

1 2

84

3

+

2

-

LM393M_S08

PU1A

1

PZD1

RLZ4.3B_LL34

VS

12

PR2

12

10K_0603_5%

12

PR4
1K_0603_1%

1 2

PR7
10K_0603_5%

ACIN 20,32,34

PACIN 42,43

VIN

2 2

PD3

BATT+

RB751V_DSM

2 1

PZD2

RLZ3.6B_LL-34

CHGRTCP

51ON#35

3 3

CHGRTC

+12VALWP

4 4

+5VALWP

+3VALWP

1 2

PR20
200_0603_5%

PJP4

2 1

JOPEN/+12V

PJP6

1 2

PAD-OPEN 4x4m
PJP7

1 2

PAD-OPEN 4x4m

RTCVREF

3.3V

PC13
10U_1206_10V4Z

12

12

PR12

100K_0603_5%

1 2

PR14
22K_0603_5%

S-81233SGUP-T1_SOT-89-3

3

3

+12VALW

+5VALW

+3VALW

A

12

PC7

.22U_1206_25V7K

PU2

2

1

1

(120mA,20mils ,Via NO.= 1)

(5A,200mils ,Via NO.= 10)

(5A,200mils ,Via NO.= 10)

2

1N4148 (SM)

PQ1

TP0610T_SOT23

PR19
200_0805_5%

PC12

1U_0805_25V4Z

21

PD2

PR9

VS

33_1206_5%

13

2

12

PC8

.1U_0805_25V7K

PZD3
RLZ16B_LL-34

2 1

B

+1_5VP

+1_8VP

+VTTP

ACOFF#43

13

2

PQ2

2N7002_SOT23

PR18
100K_0603_5%

PJP2

2 1

3MMA/CPU_IO

PJP3

2 1

3MMA/CPU_IO

PJP5

1 2

PAD-OPEN 4x4m

+1.5V

+1.8V

+VTT

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NE ITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.

VIN

PR10
36K_0603_5%

PR15
309K_0603_1%

PC9

1U_1206_25V7K

PU1B

7

LM393M_S08

(1.5A,60mils ,Via NO.= 3)

(3A,120mils ,Via NO.= 6)

(6A,240mils ,Via NO.= 12)

C

12

PR8
10K_0603_5%

RTCVREF

3.3V

8 Cells LI-ION BAT Charger OVP : 18.059V

BATT+

PR11

1M_0603_0.5%

5

+

6

-

PC11

1000P_0603_50V8J

PR13 0_0603_5%

+2.5VREF
PR16
100K_0603_1%

1U_0805_16V7K

PR17

PC10

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1421

Size Document Number Rev

B

星期四 八月

Date: Sheet of

162K_0603_1%

401218 1A

D

37 44, 22, 2002

A

B

C

D

1 1

@100P

PC93

VMB

BATT+

PC14

4.7U_1210_25V7K

PC15

4.7U_1210_25V7K

PR21

1K_0603_5%

PF27A_24V_LF-R429007_1206

PL10

FBM-L11-453215-900LMAT_1812

1 2

@1000P

PC92

LI/MH#

B/I

SMD
SMC

TS

PJP8

1
2
3
4
5
6
7

SUYIN_25063A-07G1

+3VALWP

2 2

PR22

1

3

47K_0603_5%

2

PR26

1K_0603_5%

LI/MH#

@BAS40-04_SOT23

PD4

LI/MH#43

3 3

+3VALWP

PR23

25.5K_0603_1%

1

2

PD5

@BAS40-04_SOT23

3

PR27

1K_0603_5%

1

EC_SMD1

2

PR25
100_0603_5%

EC_SMC1

1

3

2

EC_SMC1 32,33
EC_SMD1 32,33

PD7

@BAS40-04_SOT23

PR24

100_0603_5%

BATT_TEMPA 32ALI/MH#32

PD6

@BAS40-04_SOT23

3

+5VALWP

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NE ITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

A

B

INC.

C

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1421

Size Document Number Rev

B

星期四 八月

Date: Sheet of

401218

D

38 44, 22, 2002

1A

A

B

C

D

PH2 near main Battery CONN :

BAT. thermal protection at 73(74) degree C
Recovery at 50(51) degree C

+1_8VP

1 1

PC17

4.7U_1206_25VFZ

PU4B

LM358AMX_SO8

+

7

-

2 2

+5VALWP

12

PC26

3 3

4.7U_1206_25VFZ

4 4

RB751V_DSM

PC27

2200P_0603_50V7K

PQ7

2SA1036K-HQ_SOT23

5
6

PD8

PQ3

SI3442DV_TSOP6

D

6

S

2
1

G

3

HMBT2222A_SOT23

1 2

1 2

PR43

12

1K_0603_5%

31

2

7

PU5B
LM393M_S08

45

PU4A

84

LM358AMX_SO8

3

+

1

2

-

PC24

68P_0603_50V8J

PQ6

13

2

5

+

6

-

+5VALWP

12

PC19

.1U_0603_50V4Z

1 2

PR36 5.1K_0603_5%

PQ5
SI3445DV_TSOP6

D

S

6

4 5

2
1

G

12

3

PR41
10K_0603_5%

+5VALWP

84

3

+

1

2

-

PU5A
LM393M_S08

.01U_0603_50V7K

PR28

1 2

5.1K_0603_5%

PC30

PR29

1 2

0_0603_5%

PC20

220P_0603_50V8J

PR34

30.1K_0603_1%

1 2

PC21

.01U_0603_50V7K

PL2

5U_SPC-06704-5R0_2.9A_30%

LX18

1 2

12

PD9
RB051L-40_SOD106

PR48

12

100K_0603_1%

+1.5V+-5%

+ PC16

47U_6.3V_M

13

100K

100K

+1.8V+-5%

12

PR39
100_0603_5%

1 2

13

100K

2

100K

PQ8
DTC115EK_SOT23

+1_5VP

12

PR33

69.8K_0603_1%

2

1 2

PR37 0_0603_5%

PQ4
DTC115EK_SOT23

+1_8VP

12

+

PC25
150U_D2_4VM

PR45 39K_0603_1%

SYSON#

VL

SYSON#

+2.5VREF

VL

12

PC18
.1U_0603_50V4Z

PH1

10K_T SM1A103(F4D3R)_0603_1%

PR32

SYSON# 36

PC23

.22U_0805_16V7K

10K_0603_1%

PC22

1000P_0603_50V8J

PR30

3.24K_0603_1%

TM_REF2

3
2

PR38

100K_0603_1%

PH1 under CPU botten side :

CPU thermal protection at 79(80) degree C
Recovery at 54(55) degree C

VL

10K_T SM1A103(F4D3R)_0603_1%

PH2

PR44

PC29

.22U_0805_16V7K

10K_0603_1%

TM_REF1

PR40

2.74K_0603_1%

PC28

1000P_0603_50V8J

5
6

PR47

100K_0603_1%

VS

PR31
47K_0603_1%

84

+

1

-

PU3A
LM393M_S08

PR35 100K_0603_1%

PR42
47K_0603_1%

+

7

-

PU3B
LM393M_S08

VL

PR46

100K_0603_1%

VL

VL

VL

PR101

47K_0603_1%

PD16

12

1SS355

PR102

47K_0603_1%

PD17

1SS355

MAINPWON 42

13

PQ21

100K

2

DTC115EK_SOT23

100K

12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NE ITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

A

B

INC.

C

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1421

Size Document Number Rev

B

401218

星期四 八月

Date: Sheet of

D

39 44, 22, 2002

1A

A

B

C

PC31

4.7U_1210_25V6K

PC33

4.7U_1210_25V6K

CPU_B+

1 2

PL3

FBM-L11-453215-900LMAT_1812

D

B+

PC32

1 1

+5VALWP

PR49

CPU_VID47
CPU_VID37
CPU_VID27
CPU_VID17
CPU_VID07

+3V

2 2

VR_ON32

3 3

10K_0603_5%

PC38

.01U_0603_50V7K

1 2

PR68
150K_0603_5%

180K_0603_5%

12

12

PR69

1 2

PR58 0_0603_5%

1 2

1 2

PR60 1K_0603_5%

PC40 4.7U_1206_16V4Z

PC43 1U_0805_16V7K

249K_0603_1%

150K_0603_1%

PR54 0_0603_5%

1 2

PR55 0_0603_5%

1 2

PR56 0_0603_5%

PR61 51K_0603_5%

PC42 470P_0603_50V8J

PR78

PR83

1 2

12

PR52 0_0603_5%

PR82
0_0603_5%

PR51 10_0603_5%

1 2

PU6 MAX1718EEI-T_QSOP28

21
22
23
24
25
14

3
2

17

6
20
11
12
15 10

CPU CONTROL MODE

MODE
DEEPER SLEEP
BATTEY SLEEP

4 4

PERFORMANCE SLEEP

BATTERY MODE

PERFORMANCE MODE

OFFSET
0mV

-56mV

-51mV

-16mV

-1.8mV

RBOTTOM

X

16.2K

19.6K

61.9K
604K

Vout(0A)

0.850

1.094

1.199

1.134

1.248

ADDA
X
1
1
0
0

ADDB
X
0
1
0
1

0_0805_5%

1 2

D4
D3
D2
D1
D0
VGATE
TIME
SDN/SKIP
VDD
CC
OVP
REF
ILIM
GND TON

PR71 0_0603_5%

PR74 0_0603_5%

LX
DH

BST

DL
V+

VCC

FB
POS
NEG

ZMODE

SUS

S1

S0

27

1 2

28
26
16
1
9
4
13
5
19
18
8
7

PR76

0_0603_5%

*

PR84

19.6K_0603_1%

PR53

20_0603_5%

*

PR57

2_0603_5%

1 2

* *

PR79
604K_0603_1%

1 2

21

1 2

PC39 4.7U_1206_16V4Z

1 2

PD10
1SS355

PC35
.1U_0805_25V7KPR59

PC37 .1U_0805_25V7K

PR80

61.9K_0603_1%

*

PR85

16.2K_0603_1%

1 2

GL2

1 2

BL1

578

PQ9
IRF7811A
@SI4894DY @SI4894DY

3 6

241

PQ12

578

@SI4404DY-T1_SO8
SI4362DY SI4362DY

3 6

241

GL3

1

NO2

2
3
4
5 6

V+

NO3

COM

NO1

NO0

INH

ADDA

GND ADDB

PU8
MAX4524EUB-T_UMAX10

*

PR142
0_0603_5%

578

3 6

241

BL2

PQ13

578

@SI4404DY-T1_SO8

3 6

241

10
9
8
7

PQ10
IRF7811A

1 2

13

578

3 6

578

3 6

*

PR72
10K_0603_5%

100K

100K

4.7U_1210_25V6K

PQ11
@IRF7811A
@SI4894DY

241

PQ14
@SI4404DY-T1_SO8
@SI4362DY

241

PR73
@0_0603_5%

1 2

*

2

*

PQ15

*

DTC115EK_SOT23

PR50

0.002_2512_1%(2W)

LC

PL4

0.5U_SSC-1305-0R5_32A_20%

PD11
EC10QS04

2 1

1 2

PR63
100_0603_5%

PC41
1000P_0603_50V8J

COM

1 2

PR70

*

0_0603_5%

12

PR75 0_0603_5%

12

PR77 0_0603_5%

12

PR81 0_0603_5%

PC34

4.7U_1210_25V6K

12

*

PR144
68_0805_5%

*

1 2

PC91
220P_0603_50V8J

1 2

PR64 0_0603_5%

12

*

PR66
1K_0603_1%

+3VALWP

PM_GMUXSEL 7,19

PM_DPRSLPVR 7,19

H_DPSLP# 5,19

+VCC_H_CORE

+5VALWP

PC36

.1U_0805_25V7K

PR67
1K_0603_1%

5

+

1

-

PU7

MAX4322EUK-T_SOT23-5

2

12

CPU_COREP OUTPUT_ MODE

D3

D1

D0

0

0

0

0

1 1.70

000

1

0

0

0 0 1 1 0.900 1.60
0

0

1
1
1

1
1 1 0 0

1
1
1

0

1

0

1

0

10

0

1

1

1 1 10 0.800 1.40

0

0

0

0

1

1

0

0

1

1

0

1

100.650

0

0

1

1
1

11

3
4

PR62
499_0603_1%

PR65
1K_0603_1%

VOLTS

D4 = 1

0.975

0.950

0.925

0.875

0.850

0.825

0.775

0.7500

0.725

0.700

0.625

0.600

12
12

D4 = 0D2

1.75

1.65

1.55

1.50

1.45

1.35

1.30

1.25

1.20

1.150.675

1.10

1.05

1.00

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NE ITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

A

B

INC.

C

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1421

Size Document Number Rev

B

星期四 八月

Date: Sheet of

401218 1A

D

40 44, 22, 2002

5

4

3

2

1

+3VS

1

PR99

19.6K_0603_1%

PR86

10K_0603_5%

VTT

VTT_PWRGD 5

+VTTP

D D

PQ16
SI3445DV_TSOP6

D

PU9B

4 5

12

PR90
10K_0603_5%

7

S

G

3

+

-

+3VALWP

12

PD12

PC46

4.7U_1210_25V6K

C C

B B

RB751V_DSM

PC48
4700P_0603_50V7K

PQ18

2SA1036K-HQ_SOT23

1 2

12

31

PR91
1K_0603_5%

1 2

2

PQ17

HMBT2222A_SOT23

13

2

LM393M_S08

LX125

6
2

1

5
6

12

PC51
4700P_0603_50V7K

PD13

12

RB051L-40_SOD106

PR97
100K_0603_1%

PQ19
DTC115EUAT106_UMT3

PL5

5u-SPC-06704-5R0_2.9A_30%

1 2

12

PR88
@2M_0603_5%

12

PC49
@.1U_0603_25V7K

1 2

13

100K

100K

DTC115EUA

12

PR89
100_0603_1%

PR95
100K_0603_1%

2

PQ20

VL

12

PR98
100K_0603_5%

13

100K

+VTTP

+1.25V +-5%

12

+

12

PC45
@470P_0603_50V8J

(10 mil)

100K

2

PC44

220U_D_4VM

+3VALWP

+2.5VREF +2.5VREF

2

PR92
750_0603_5%

PD14
AS2431_SOT23

1 3

VTT_ON 32

1 2

PD15
1SS355

10K_0603_1%

PR94

PR100

100K_0603_1%

1 2

PR93

19.6K_0603_1%

PC52
.22U_0603_16V4Z

PR87
1M_0603_5%

VL

PC47

.1U_0603_25V7K

10K_0603_1%

PR96

12

12

1 2

84

PU9A

3

+

2

-

LM393M_S08

PC50
1000P_0603_50V7K

VTTP=1.021V------>VTT_PWRGD:"L"
VTTP=1.014V------>VTT_PWRGD:"H"

A A

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

5

4

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

3

2

SCHEMATIC, M/B LA-1421

Size Document Number Rev

Custom

Date: Sheet of

401218 1A

星期四 八月

1

41 44, 22, 2002

A

B

C

D

B+

PC53

1 1

SYS_B+

2 2

+3VALWP

PC66

150U_D_6.3VM

3 3

12

FBM-L11-453215-900LMAT_1812

PL6

12

12

PC56

PC57

4.7U_1210_25V6K

4.7U_1210_25V6K

12

PL7

10U_SPC-1205P-100_4.5A_20%

12

PR106

1M_0603_1%

3.57K_0603_1%

2 1

PD21

12

+

0.012_2512_1%

12

+

PC67

150U_D_6.3VM

PR107

EP10QY03

+3.3V Ipeak = 6.66A ~ 10A

241

12

47P_0603_50V8J
PC64

241

1 2

PR111

1 2

PR113

1 2

10K_0603_1%

.1U_0805_25V7K

578

PQ22
SI4800DY-T1_SO8

PDH31

3 6

578

PQ24
SI4810DY-T1_SO8

3 6

PACIN37,43

12

PC68
100P_0603_50V8J

PC55

1 2

1 2

PLX3

PDL3

CSH3

BST31

PR104
0_0603_5%

1 2

PR110
10K_0603_5%

VS

12

PR115
47K_0603_5%

12

PC74
.047U_0603_16V7K

PDH3

PD20

1SS355

12

PC62

.1U_0805_25V7K

25

BST3

27

DH3

26

LX3

24

DL3

1

CSH3

2

CSL3

3

FB3

10

SKIP#

23

SHDN#

7

TIME/ON5

28

RUN/ON3

12

PC70
680P_0603_50V8J

PR117

47K_0603_1%

12

PC75

.047U_0603_16V7K

2

VS

VL

1

1 2

22

MAX1632CAI-T_SSOP28

12

21

12OUT

VL

V+

PU10

BST5

PGND

CSH5
CSL5

SYNC
RST#

GND

8

VL

12

MAINPWON 39

3

DAP202U
PD19

PC61

4.7U_1206_25VFZ

4
5

VDD

18
16

DH5

17

LX5

19

DL5

20
14
13
12

FB5

15

SEQ

9

REF

6
11

BST51

+12VALWP

12

PC63

4.7U_1206_25VFZ

.1U_0805_25V7K

2.5VREF

12

PC69

4.7U_1206_25VFZ

+5VALWP

12

PR114
10K_0603_5%

PC58

1 2

PDH5

PLX5

10.5K_0603_1%

PR112

1 2

PR105
0_0603_5%

PDL5

12

12

PR116
10K_0603_1%

PC54

SYS_B+

12

PC59

4.7U_1210_25V6K

PDH51

12

PC73

100P_0603_50V8J

PR103
22_1206_5%

1 2

FLYBACKSNB

12

470P_0805_100V7K

PQ23
SI4800DY-T1_SO8

578

12

PC60

4.7U_1210_25V6K

3 6

241

578

PQ25

SI4810DY-T1_SO8

3 6

241

+5V Ipeak = 6.66A ~ 10A

2.2U_1206_25VFZ
1 2

12

PD18
EC11FS2

PT1

1 4

3 2

10U_SDT-1205P-100-118_5A_20%

12

PC65
47P_0603_50V8J

CSH5

12

PR108
2M_0603_5%

12

+

PC71

150U_D_6.3VM

12

+

PC72

12

PR109

0.012_2512_1%

PD22
EP10QY03

150U_D_6.3VM

2 1

+5VALWP

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NE ITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

A

B

INC.

C

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1421

Size Document Number Rev

B

星期四 八月

Date: Sheet of

401218 1A

D

42 44, 22, 2002

A

1 1

B

C

D

PQ26

SI4835DY-T1_SO8

ACOFF#

8
7

5

PD23

1SS355

1 2

PR126
10K_0603_5%

1 2

VIN

12

PR119
10K_0603_5%

ACOFF#

2 2

1
2
36

4

2

G

IREF32

IREF=1.31*Icharge

3 3

IREF=0~3.3V

PQ27

SI4835DY-T1_SO8
1
2
3 6

12

PR120

4

200K_0603_5$

12

PR124
150K_0603_5%

13

D

PQ31
2N7002_SOT23

S

PC80

.1U_0603_16V7K

PR132
162K_0603_1%

1 2

8
7

5

12

12

PR128
10K_0603_1%

12

PR127

24.9K_0603_1%

12

PC83

.1U_0603_16V7K

12

PR136

100K_0603_1%

12

P2 P3

Iadp=0~2.9A

0.02_2512_1%

PR125
10K_0603_5%

1 2

PC81
4700P_0603_50V7K

1 2

PC84
2200P_0603_50V7K

PC87
.1U_0603_16V7K

PR134 10K_0603_5%

PR118

12

12

1 2

PR129
10K_0603_5%

1 2

PR130
10K_0603_5%

12

B+

PU11
MB3878_SSOP24

1

-INC2

2

OUTC2

3

+INE2

4

-INE2

5

FB2

6

VREF

7

FB1

8

-INE1

9

+INE1

10

OUTC1

11

OUTD

12

-INC1

PL8

FBM-L11-453215-900LMAT_1812

1 2

24

+INC2

23

GND

22

CS

21

VCC(o)

20

OUT

VCC

-INE3

FB3

CTL

+INC1

PC82
.1U_0603_50V4Z

19

1 2

VH

18

17

1 2

RT

16

15

14

PR131
68K_0603_5%

1 2

PR135
47K_0603_5%

13

12

PC76

4.7U_1210_25V6K

12

PR123
0_0603_5%

PC78

0.022U_0603_25V7K

1 2

1 2

PC79
.1U_0805_25V7K

PC85
.1U_0805_25V7K
1 2

1 2
PC86

1500P_0603_50V7K

12

PC77

4.7U_1210_25V6K

FSTCHG 32

PD24

1SS355
1 2

12

PR137

47K_0603_5%

CHG_B+

36

241

578

22U_SPC-1205P-220A_22A_20%

1 2

12

PD25

RB051L-40_SOD106

PQ29
SI4835DY-T1_SO8

LXCHRG

PL9

ACOFF#

1 2

PR133

0.02_2512_1%

PQ28

SI4835DY-T1_SO8
1
2
3 6

8
7

5

4

1 2

PR121 10K_0603_5%

13

100K

2

100K

PQ30
DTC115EK_SOT23

CC=0~2.52A

CV=14.4V(8 CE LLS)

1 2

VIN

PR122 47K_0603_5%

ACOFF 32PACIN37,42

12

12

PC88

PC89

4.7UF_1210_25V6K
@4.7UF_1210_25V6K

BATT+

+5VALWP

PR143

47K_0603_5%

PQ34

13

4 4

DTC115EK_SOT23

100K

2

LI/MH# 38

PQ32

2N7002_SOT23

S

G

PC90
.1U_0603_16V7K

100K

A

B

D

13

2

PR141

100K_0603_5%

13

100K

100K

PR138

47.5K_0603_1%

PR140

VL

PQ33

DTC115EK_SOT23

2

200K_0603_0.5%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS C ONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. N EITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.

C

12

12

PR139
115K_0603_1%

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1421

Size Document Number Rev

B

401218

星期四 八月

Date: Sheet of

D

43 44, 22, 2002

1A

22

PIR

REV 0.2

Change L35 and L8 size from 0603 to 0805

A

B

C

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

D

E

DescriptionDate Page

Del R305, R309, D33, D343/29 25

27 Del R64, D9

1 1

33 Q37 added @

Batt SMBus change to EC_SMC1, EC_SMD1

38

Added PR141

40
43 Added PR43, PQ34 and PQ32 change to

2N7002
Del C1, C2, Added C688, C6894/1 24

4/2 6

C568 added @, C532, C122 change to 220uf
Del CF17, CF18, CF19

REV 0.3

DescriptionDate Page

4/25 10

2 2

27&33

C629 C640 change footp rint
from CAP-A_B_1206_1210_TAN
to CAP-D_E_TAN
RP5 RP6 change footprint

28

from 8P4R-0402-N EW
to 8P4R
Connect DRV0# between
JP22 Pin4 and U31 Pin11
Delete R60 Let +3VLAN connect

23

with +3V directly.
Add C690 1000P on net INVT_PWM4/29 16

Add C691 10P and L47 on net DVOBC_C LKINT#17
Delete R17 R451 R9 R450, Change to L50 L51

28

L48 L49
Delete L37 C466 L39 C465 L38 C464

29

Add C692 C693 C694

4/30 16

Add CP11 C695 C696 C69734
Change L35 L8 size from 0603 to 0805
Add C698 C69936

5/5 33 Change Board ID from 000 to 001

28 Change RP5 RP6 Size from 0804 to 1206

3 3

16 Change R339 and R13 from 10Ohm to 0Ohm

REV 1.0

DescriptionDate Page
Update revision code from 0.3 to 1.0 directly5/30

4 4

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1421

Size Document Number Rev
Custom

401218

星期四 八月

A

B

C

D

Date: Sheet of

44 44, 22, 2002

E

1A