Compal LA-1421, Satellite 1100, Satellite 1105 Schematic
A
1 1
B
C
D
E
LA-1421 Schematics Document Ve r1.0
2 2
uFCBGA/uFCPGA for Celeron/ Coppermine-T and Tualatin CPU
Almador-M(830-MG) + ICH3 + VCH
3 3
4 4
Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
A
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
D
SCHEMATIC, M/B LA-1421
Size Document Number Rev
Custom
401218
星期四 八月
Date: Sheet of
1 44, 22, 2002
E
1A
A
B
C
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
D
E
BLOCK DIAGRAM
Mobile Celeron
4 4
CRT
Connector
PAGE 16
LVDS
Connector
PAGE 16
3 3
VCH
Connector
GM Bus Interface
PAGE 15
Coppermine-T
(Trualatin)
(uFCBGA/uFCPGA)
PSB
Almador-M
GMCH-M
830MG
625 BGA
PAGE 8,9,10,11
HUB
Interface
PAGE 4,5,6
Thermal Sensor
MAX6654MEE
Memory Bus
PAGE 5
CK TITAN
ICS950805
PAGE 12
SO-DIMM * 2
BANK 2,3,4,5
PAGE 13,14
CPU VID & All
reference voltage
PAGE 7
HDD Connector
PAGE 20
2 2
CD-ROM Connector
PAGE 20
LPC
Super I/O
LPC47N227
PAGE 24
1 1
Parallel
PAGE 26
A
B
Embedded
Controller
NS PC87591
Scan KB
PAGE 31
ICH3-M
421 BGA
PAGE 17,18,19
PAGE 29
BIOS & I/O
PORT
USB
PCI BUS
PAGE 30
C
USB
Connector
CardBus
ENE 1420
LAN
RTL 8100B
AC'97
CODEC
CS2002
PAGE 27
PAGE 28
PAGE 26
PAGE 22
PAGE 21
Slot 0/1
PAGE 23
Audio Amp lifierAudio Jack
PAGE 28
D
Title
Size Document Number Rev
Custom
Date: Sheet of
FAN on controller &
TEMP. sensing circuit
PAGE 34
DC/DC Interface
RTC Battery
PAGE 36
BATTERY
Charger
PAGE 38,39
POWER
Interface
PAGE 37,40,41,42,43
Compal Electronics, inc.
SCHEMATIC, M/B LA-1421
401218
星期四 八月
2 44, 22, 2002
E
1A
A
Voltage Ra ils
B
C
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
D
E
Power Plane Description
1 1
B+
+VCC_H_CORE
+VTT
VIN
Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU
1.2V switched power rail for CPU AGTL Bus
S1 S3 S5
N/A N/A N/A
N/AN/AN/A
ON OFF
ON OFF
OFF
OFF
+1.5V 1.5V power rail ON ON OFF
+1.5VS
AGP 4X ON OFF OFF
+1.8V 1.8V power rail ON ON OFF
+1.8VS
+3VALW
+3V
+3VS
+5VALW
+5V ON
+5VS
+12VALW
2 2
+12VS
RTCVCC
1.8V switched power rail
3.3V always on power rail ON*
3.3V power rail
3.3V switched power rail
5V always on power rail
5V power rail
5V switched power rail
12V always on power rail
12V switched power rail
RTC power
ON
ON
ON
ON
ON ON
ON
ON
ON
ON
OFF
ON
ON
OFF
ON
OFF
ON
OFF
ON
OFF
OFF
OFF
ON*
OFF
OFF
ON*
OFF
ON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
External PCI Device s
Device IDSEL# REQ#/GNT# Interrupts
CardBus
On Board LAN
3 3
AD20
AD17
2
3
PIRQA/PIRQB
PIRQB
EC SM Bus1 address
Device
Smart Battery
EEPROM(24C16/02)
(24C04)
Address Address
0001 011X b
1010 000X b
1011 000Xb
EC SM Bus2 address
Device
MAX1617MEE
Smart Battery
Docking
DOT Board
1001 110X b
0001 011X b
0011 011X b
XXXX XXXXb
ICH3-M SM Bus address
4 4
Clock Generator ( ICS9238-50)
SDRAM Select ( 74HC4052 )
CPU Voltage VID select ( F3565 )
A
Device
Address
1101 0000
1010 0000
0110 111Xb
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-1421
Size Document Number Rev
Custom
401218
星期四 八月
B
C
D
Date: Sheet of
3 44, 22, 2002
E
1A
A
1 1
H_A#[3..31]8
2 2
H_REQ#[0..4]8
H_ADS#8
3 3
H_BPRI#8
H_BNR#8
H_LOCK#8
H_HIT#8
H_HITM#8
H_DEFER#8
H_A#[3..31]
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_REQ#[0..4] H_D#33
+1.5VS
R376 1.5K
1 2
R378 10
1 2
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
G2
G1
G3
B11
A10
A13
C12
C10
A15
A14
B13
A12
AA3
W2
AB3
C14
AF23
AF4
C22
AD23
AA2
K1
J1
K3
J2
H3
A3
J3
H1
D3
F3
C2
B5
C6
B9
B7
C8
A8
B3
A9
C3
A6
R1
L3
T1
U1
L1
T4
P3
A7
C4
R2
L2
V3
U2
T3
U43A
TUALATIN
+VCC_H_CORE
D22
F22
VCC_0
VCC_1
A#3
A#4
A#5
A#6
A#7
A#8
A#9
A#10
A#11
A#12
A#13
A#14
A#15
A#16
A#17
A#18
A#19
A#20
A#21
A#22
A#23
A#24
A#25
A#26
A#27
A#28
A#29
A#30
A#31
A#32
A#33
A#34
A#35
REQ#0
REQ#1
REQ#2
REQ#3
REQ#4
RP#
ADS#
AERR#
AP#0
AP#1
Interface
BERR#
BINIT#
IERR#
BREQ0#
Arbitration
NC
NC
NC
BPRI#
BNR#
LOCK#
HIT#
HITM#
DEFER#
B
E21
H22
G21
VCC_2
VCC_3
VCC_4
Address
Lines
Request
Signals
Error
Signals
Snoop
Signals
VSS_0
VSS_1
VSS_2
E16R4E25
K22
VCC_5
VSS_3
G25
J21
VCC_6
VSS_4
J25
M22
VCC_7
VSS_5
L25
L21
VCC_8
VSS_6
N25
P22
VCC_9
VSS_7
R25
N21
T22
VCC_10
VSS_8
U25
W25
R21
V22
VCC_11
VCC_12
VSS_9
VSS_10
AA25
AC25
U21
Y22
VCC_13
VCC_14
VCC_15
VSS_11
VSS_12
VSS_13
AF25
AE26
W21
AB22
VCC_16
VSS_14
C23
F23
AA21
AC21
VCC_17
VCC_18
VSS_15
VSS_16
H23
K23
D20
F20
VCC_19
VCC_20
VCC_21
VSS_17
VSS_18
VSS_19
M23
P23
E19
AB20
AA19
AC19
D18
F18
E17
AB18
AA17
AC17
D16
F16
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
Mobile
Celeron
Coppermine-T
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
T23
V23
Y23
AB23
AE23
B22
D21
F21
E22
H21
G22
K21
C
E15
AB16
AA15
AC15
D14
F14
E13
AB14
AA13
AC13
D12
F12
E11
AB12
AA11
AC11
D10
F10E9AB10
AA9
AC9D8F8E7AB8
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC
VSS VCC
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
J22
M21
L22
P21
N22
T21
R22
V21
U22
Y21
W22
AB21
AA22
AC22
AE21
B20
D19
AB19
AA20
AC20
AE19
B18
D17
F17
E18
AB17
D
AA7
AC7D6F6E5H6G5K6J5N5T6V6
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
Data
Signals
VCC_75
VCC_76
VCC_77
VCC_78
VCC_79
VCC_80
AB6
AA5
AC5M6P6
VCC_69
VCC_70
VCC_71
VCC_73
VCC_74
U5Y6W5
VCC_72
D#0
D#1
D#2
D#3
D#4
D#5
D#6
D#7
D#8
D#9
D#10
D#11
D#12
D#13
D#14
D#15
D#16
D#17
D#18
D#19
D#20
D#21
D#22
D#23
D#24
D#25
D#26
D#27
D#28
D#29
D#30
D#31
D#32
D#33
D#34
D#35
D#36
D#37
D#38
D#39
D#40
D#41
D#42
D#43
D#44
D#45
D#46
D#47
D#48
D#49
D#50
D#51
D#52
D#53
D#54
D#55
D#56
D#57
D#58
D#59
D#60
D#61
D#62
D#63
A16
B17
A17
D23
B19
C20
C16
A20
A22
A19
A23
A24
C18
D24
B24
A18
E23
B21
B23
E26
C24
F24
D25
E24
B25
G24
H24
F26
L24
H25
C26
K24
G26
K25
J24
K26
F25
N26
J26
M24
U26
P25
L26
R24
R26
M25
V25
T24
M26
P24
AA26
T26
U24
Y25
W26
V26
AB25
T25
Y24
W24
Y26
AB24
AA24
V24
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_D#[0..63]
E
H_D#[0..63] 8
+VCC_H_CORE
4 4
Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
A
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
D
SCHEMATIC, M/B LA-1421
Size Document Number Rev
Custom
401218
星期四 八月
Date: Sheet of
4 44, 22, 2002
E
1A
A
B
C
D
E
+VTT
+1.8VSB
+1.5VS
+1.5VS
Place H_RESET#
1 1
R38<0.1" from U43
H_FERR#19
H_PWRGD19
H_RESET#8
2 2
H_PICD019
H_PICD119
3 3
12
C526
2200PF
4 4
+5VALW
R38
56.2_1%_0603
R82 @0
1 2
1 2
R69 @0
H_THERMDA
H_THERMDC
1 2
A
12
R391
1K
R42
+1.5VS
1.5K
R71
150
R386
12
+VS_CMOSREF
C522
.1UF
1 2
12
12
12
R384
1.5K
3K
+1.5VS
12
R76
150
CLK_CPU_APIC12
PM_CPUPERF#19,21
1 2
U44
1
NC
2
VCC
3
4
5
6
7
8 9
MAX6654
STBY
DXP
SMBCLK
DXN
NC
SMBDATA
ADD1
ALERT
GND
ADD0
GND NC
Thermal Sensor
H_TRDY#8
H_IGNNE#19
H_STPCLK#19
H_DPSLP#19,40
H_DBSY#8
H_DRDY#8
+1.5VS
R392
200
NC
NC
H_RS#08
H_RS#18
H_RS#28
H_A20M#19
H_SMI#19
H_INTR19
H_INIT#19
H_BSEL010,12
H_BSEL112
10PF
H_NMI19
C587
16
15
14
13
12
11
10
R403 1.5K
1 2
R406
1K
H_A20M#
H_IGNNE#
H_INTR
H_NMI
H_THERMDA
H_THERMDC
1 2
R404
110_1%_0603
R412
1 2
22_0402
ITP_TRST#
1 2
R409 200
1 2
R405 56.2_1%_0603
Note :
GHI# Pull-Up internally
+5VALW
12
12
R407
10K
+5VALW
B
M5
W1
AC3
AF6
AF5
AD9
AD3
AB4
AE4
AF8
AD15
AE14
AE6
B15
W3
AF13
AF14
AE12
AF10
AF16
AD19
AD17
AF20
AF22
AE20
AD22
AD21
AD10
AD7
AD11
AF7
AF15
AF19
AE22
AF12
AD5
AE16
Y3
V1
U3
Y1
L5
AA18
AC18
AE17
B16
D15
F15
AB15
AA16
AC16
AE15
B14
D13
F13
E14
AB13
AA14
AC14
AE13
B12
D11
F11
E12
AB11
AA12
U43B
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
RS#0
RS#1
RS#2
Request
RSP#
Signals GND
TRDY#
A20M#
FERR#
FLUSH#
IGNNE#
SMI#
PWRGOOD
STPCLK#
Compatibility
DPSLP#
INTR/LINT0
NMI/LINT1
INIT#
RESET#
DBSY#
DRDY#
THERMDA
THERMDC
SELFSB0
SELFSB1
EDGECTRLP
PICD0
PICD1
PICCLK
RP2#
RP3#
BPM0#
BPM1#
TCK
TDI
TDO
TMS
TRST#
PREQ#
PRDY#
CMOSREF_1
CMOSREF_0
RTTIMPDEP
GHI#
+VTT
VCCT_1
A26
G23
APIC
Debug
Break
Point
Test
Access
PORT
( ITP )
VCCT_2
VCCT_3
VCCT_4
J23
L23
VCCT_5
VCCT_6
VCCT_7
N23
R23
U23
EC_SMC2 32
VCCT_8
W23
AA23
VCCT_9
VCCT_10
C21
C19
VCCT_11
VCCT_12
VCCT_13
AD20
C17
AD18
VCCT_14
VCCT_15
VCCT_16
C15
C13
AD14
AC12
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VCCT VID
VCCT_17
VCCT_18
VCCT_19
VCCT_20
VCCT_21
VCCT_22
VCCT_23
C11
AD12C9C7
AD8C5AD6
From 87591
EC_SMD2 32
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
AE11
B10D9F9
E10
AB9
AA10
AC10
AE9B8D7F7E8
AB7
AA8
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
Mobile
Celeron
Coppermine-T
VCCT_24
VCCT_25
VCCT_26
VCCT_27
VCCT_28
VCCT_29
VCCT_30
VCCT_31
VCCT_32
VCCT_33
VCCT_34
VCCT_35
VCCT_36
VCCT_37
VCCT_38
AC23
AA4E4G4J4L4
AC4V4AE3
AF2
AF1
AE18D5E6
AC8
AE7B6F5H5G6K5J6N6L6T5R6V5U6Y5W6
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VID0
VID1
VID2
VID3
VID4
VSS
VSS
VSSNCNC
AB1
AC2
AE2
AF3R3B26M4AF26C1AF17
CPU_VR_VID4 7
CPU_VR_VID3 7
CPU_VR_VID2 7
CPU_VR_VID1 7
CPU_VR_VID0 7
VSS_110
VSS_111
VSS_112
N4
D
AB5
AA6
VSS_113
VSS_114
VSS_115
NC
AC6
AE5B4D4F4H4K4M3U4W4B2D2F2H2
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
Data
Signals
VTT Ref
Analog
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
AD2
AE1
A25
C25
E20
F19
+3VS
+3VS
12
R80
147
10K
12
C153
.1UF
U9A
Title
Size Document Number Rev
Custom
Date: Sheet of
VSS_126
VSS_127
VSS_128
VSS_129
DEP#0
DEP#1
DEP#2
DEP#3
DEP#4
DEP#5
DEP#6
DEP#7
VREF_1
VREF_2
VREF_3
VREF_4
VREF_5
VREF_6
VREF_7
VREF_8
TESTLO
VCC
PLL1
PLL2
NC
NC
NC
NC
CLK0
CLK0#
TESTLO
NC
NCHCTRLP
TESTHI
NC
NC
NC
TESTHI
NC
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
VTTPWRGOOD
NC
VSS_130
VSS_131
VSS_132
TUALATIN
K2M2P2T2V2Y2AB2
21
74LVC14
AE24
AD25
AE25
AC24
AF24
AD26
AC26
AD24
AF21
AB26
H26
A21
AF9
A4
N1
AA1
Y4
R5
N3
N2
P1
P5
E1
F1
AC1
AD1
M1
AF18
AD16
AF11
AE8
N24
AE10
E2
P4
AD4
A5
D1
AD13
B1
P26
A11
E3
D26
TESTHI1
TESTHI2
+V_AGTLREF
+VCC_H_CORE
TESTLO1
C42
33UF_16V_D2
+
CLK_HCLK
CLK_HCLK#
TESTLO2
R66 14_1%_0603
TESTHI1
TESTHI2
1 2
1 2
+VTT
R352
22_0402
C477
10PF
Close to ball AC1 Close to ball AD1
CPUVTT_PWRGD
+VTT
12
R63
10K
13
Q21
2
VTT_PWRGD# 12,32VTT_PWRGD41
Compal Electronics, inc.
SCHEMATIC, M/B LA-1421
401218
星期四 八月
E
+VTT
RP9
1 8
2 7
3 6
4 5
8P4R_1K
1 2
L11 4.7UH
CLK_HCLK 12
CLK_HCLK# 12
CLK_HCLK#CLK_HCLK
1 2
CPUVTT_PWRGD
2N7002
5 44, 22, 2002
TESTLO1
TESTLO2
+VTT
R362
22_0402
C486
10PF
1A
A
B
C
D
E
Layout note :
1 1
Place close to CPU, Use 2~3 vias per PAD.
Place .47uF caps underneath balls on solder side.
Place 10uF caps on the peripheral near balls.
Use 2~3 vias per PAD.
Layout note :
Place close to CPU,
Use 2 vias per PAD.
+VCC_H_CORE
12
12
12
12
12
12
12
12
12
12
12
.47UF
C75
.47UF
C76
.47UF
C77
.47UF
C78
.47UF
C79
.47UF
C80
.47UF
C73
.47UF
C89
.47UF
C101
.47UF
C123
.47UF
C114
12
C106
.47UF
+VCC_H_CORE
12
12
.47UF
C103
12
C96
.47UF
12
12
12
12
12
12
12
12
C144
C143
C142
C141
C140
C139
.47UF
.47UF
.47UF
.47UF
2 2
.47UF
.47UF
.47UF
C146
.47UF
C129
12
.47UF
C119
.47UF
C112
+VTT
12
C33
+
220UF_4V_D2
+VTT
12
C187
1UF_10V_0603
1UF_10V_0603
12
C188
1UF_10V_0603
12
C200
+
220UF_4V_D2
1UF_10V_0603
12
C189
12
C155
1UF_10V_0603
1UF_10V_0603
12
C549
12
C525
1UF_10V_0603
12
C44
1UF_10V_0603
12
C95
12
C107
1UF_10V_0603
12
C128
1UF_10V_0603
+VCC_H_CORE
12
C98
10UF_10V_1206
12
C120
10UF_10V_1206
12
C99
10UF_10V_1206
12
C23
10UF_10V_1206
12
C22
10UF_10V_1206
+VCC_H_CORE
12
C81
10UF_10V_1206
3 3
+VCC_H_CORE
12
C26
+
150UF_6.3V_D2
12
C195
10UF_10V_1206
12
C474
+
150UF_6.3V_D2
12
C196
10UF_10V_1206
12
C25
+
150UF_6.3V_D2
12
C197
10UF_10V_1206
12
C532
+
220UF_4V_D2
12
C190
10UF_10V_1206
12
C568
+
@150UF_6.3V_D2
+VCC_H_CORE
12
C108
+
150UF_6.3V_D2
4 4
A
12
C87
+
150UF_6.3V_D2
12
C194
+
150UF_6.3V_D2
12
C483
+
150UF_6.3V_D2
B
12
C537
+
150UF_6.3V_D2
12
C122
+
220UF_4V_D2
Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
D
SCHEMATIC, M/B LA-1421
Size Document Number Rev
Custom
401218
星期四 八月
Date: Sheet of
6 44, 22, 2002
1A
E
A
1 1
Mount R223 and RP24 and remove U22 R212
R213 U24 if without support SpeedStep
CPU Voltege ID
2 2
Default for Resistors Should
be +VCC_CPU = 0.7V, for
Deeper Sleep Only.
SMB_CLK12,14,19
SMB_DATA12,14,19
CPU_VR_VID05
CPU_VR_VID15
+3VS
CPU_VR_VID25
CPU_VR_VID35
CPU_VR_VID45
1 2
R214
PM_DPRSLPVR19,40
PM_GMUXSEL19,40
From Tualatin CPU
3 3
@10K
R223
0
12
182736
45
RP24
8P4R_0
+3V
1 2
1
2
U22
3 5
@NC7SZ02
R452
1K
CPU_VID4
+3V
12
R209
@100K
C278
.1UF
4
Override# MUX_SEL A/B# MUX_outputs
1
1
PM_GMUXSEL = 1 : for Performance mode
PM_DPRSLPVR = 1: for Deeper Sleep mode
4 4
0 : for CPU default power
0 : for Performance mode
1
B
+3V
12
Address 0110 111X
1
2
3
4
5
6
7
8
9
10
MUX_SEL
3 6
4 5
U24
SCL
SDA
Override#
I_0
I_1
I_2
I_3
I_4
A/B#
GND
@FM3565
1 8
2 7
VCC
ASEL
WP
MUX_SEL
Y_0
Y_1
Y_2
Y_3
Y_4
RP29
8P4R_1K
20
19
18
17
NC
16
15
14
13
12
11
CPU_VID3
CPU_VID2
CPU_VID1
CPU_VID0
+3V
R213 @0
1 X MUX_inputs
0 0 From
0 1
C279
1 2
.1UF
R212 @0
1 2
1 2
Non-volatile
register(SOPRB)
From
Non-volatile
register(SOPRA)
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID0 40
CPU_VID1 40
CPU_VID2 40
CPU_VID3 40
CPU_VID4 40
Mode
Battery
Performance
Deeper sleep
C
+3V
System Memory Reference
12
R421
249_1%
49.9_1%
301_1%
301_1%
249.9_1%
Place capacitor close to GMCH.
12
R422
+1.8VSB
HUB Interface Reference
12
R420
Layout note :
1. Place R419 and R420 in middle of Bus.
2. Place capacitors near GMCH.
12
R419
301_1%
+1.8VS
HUB Interface VSwing Voltage
12
R138
+V_SMREF
12
C617
.1UF
+VS_HUBREF
12
C616
.1UF
1. Place R138 and R137 in middle of Bus.
R147
301_1%
12
12
C220
.1UF
+VS_HUBVSWING
D
+VTT
GTL Reference Voltage
12
R396
Layout note :
1K_1%
1. Place R396 and R397 between and GMCH and CPU.
2. Place decoupling caps near CPU.(Within 500mils)
12
12
R397
2K_1%
+1.5VS
12
R377
499_1%
12
R373
1K_1%
+VAGP_BRDREF
+1.8VSB
R393
576_1%
12
12
C519
C515
.1UF
.1UF
CMOS Reference Voltage
Layout note :
1. Place R377 and R373 between and GMCH and CPU.
2. Place decoupling caps near CPU.
12
C507
.1UF
Place Reference Circuit near GMCH
+1.5VS
12
12
12
12
C508
.1UF
R400
1K_1%
R402
1K_1%
C509
.1UF
E
C531
1 2
C560
1 2
+V_AGTLREF
12
C504
.1UF
+VS_CMOSREF
470PF
470PF
12
R399
82.5_1%
12
R401
82.5_1%
1. Place R393 and R394 near GMCH.
+VS_RIMMREF
R394
2K_1%
12
Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
A
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
D
SCHEMATIC, M/B LA-1421
Size Document Number Rev
Custom
401218
星期四 八月
Date: Sheet of
7 44, 22, 2002
E
1A
A
B
C
D
E
+VS_HUBREF
B
AA3
AD3
AB4
AB5
AA4
AA1
AA6
AB1
AC4
AA2
AB3
AD2
AD1
AC2
AB6
AC6
AC1
AF3
AD4
AD6
AC3
AH3
AE5
AE3
AG2
AF4
AF2
AJ3
AE4
AG1
AE1
AG4
AH4
AG3
AF1
U4
P1
W6
U2
U6
R1
N3
W5
V4
P3
R3
U1
V6
W4
T3
P2
V3
R2
T1
W3
U3
Y4
W1
V1
Y1
Y6
V2
Y3
Y2
12
U10A
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
ALMADOR-M
.01UF
1 1
2 2
3 3
CLK_GHT CLK_GHT#
1 2
R365
22_0402
C487
10PF
1 2
R366
22_0402
C488
10PF
H_D#[0..63]
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
Close to ball AJ4 Close to ball AH5
HUB_PD[0..10]19
HUB_PSTRB19
HUB_PSTRB#19
4 4
A
C600
M12
M13
VSS0
Host
Interface
HUB_PD0
HUB_PD1
G26
H28
H29
HUB_PD0
HUB_PD1
HUB_PD2
M17
M18
N12
N13
N14
N15
N16
N17
N18
P13
P14
P15
P16
P17
R13
R14
R15
R16
R17
T13
T14
T15
T16
T17
U12
U13
U14
U15
U16
U17
U18
V12
V13
V17
V18
AJ5D2AC5Y5U5P5L5H5AH2
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS_H0
VSS_H1
VSS
Almador-M
GMCH
A3
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10
HUB_PSTRB
HUB_REF
HUB_PSTRB#
DVO_RCOMP
SM_RCOMP
HUB_RCOMP
AGP_REF
AGP_RCOMP/DVOBC_RCOMP
RESET#
H_GTLREF1
H_GTLREF0
H_GTLRCOMP
VSS
VSS
VSSPCMOS_LM0
VSSPCMOS_LM1
VSSPCMOS_LM2
VSSP_HUB0
VSSP_HUB1
H27
F29
F27
E29
E28
G25
G27
H26
G29
H24
F28
AC22F6J23
J25
K24
AB24
AA7J7C2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD7
HUB_PD6
HUB_PD8
HUB_PD9
HUB_PD10
R388 54.9_1%12
R423 27.4_1%1 2
R418 54.9_1%1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
+VAGP_BRDREF
C
12
12
C602
.1UF
R415 54.9_1%
12
C599
.1UF
AB23
AC23
AH19
AH20
AF5
1 2
R111 80.6_1%
+V_AGTLREF
C536
.1UF
12
G28
H25
AC26
PCIRST# 15,17,19,21,22,23,25,26,27,33
10 mils wide,length <=500 mils.
VSS_H2
VSS_H3
VSS_H4
VSS_H5
VSSP_IO0
VSSP_IO1
VSSP_IO2
AD22
AE28
AE2
VSS_H6
VSS_H7
VSS_H8
VSS_H9
VSSP_DVO0
VSSP_DVO1
VSSP_DVO2
AH24
AF25
AF27
AB2W2T2N2K2G2AC7
VSS_H10
VSS_H11
VSS_H12
VSS_H13
VSS_H14
VSS_H15
Host
Interface
VSSA_DAC
VSSA_CPLL
AH26G8AD7
D
VSS_H16
H_CPURST#
H_DBSY#
H_DEFER#
H_DRDY#
H_HITM#
H_LOCK#
H_TRDY#
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
CLK_HT#
CLK_DREF
CLK_GBIN
CLK_GBOUT
VSSA_HPLL
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_ADS#
H_BNR#
H_BPRI#
H_HIT#
H_RS#0
H_RS#1
H_RS#2
CLK_HT
22_0402
10PF
Title
Size Document Number Rev
Custom
Date: Sheet of
H_A#[3..31]
H_A#3
H2
H_A#4
E3
H_A#5
G3
H_A#6
N4
H_A#7
M6
H_A#8
F1
H_A#9
F2
H_A#10
J3
H_A#11
F3
H_A#12
P6
H_A#13
G1
H_A#14
N5
H_A#15
H1
H_A#16
P4
H_A#17
T4
H_A#18
M2
H_A#19
J2
H_A#20
L2
H_A#21
R4
H_A#22
K1
H_A#23
L3
H_A#24
L1
H_A#25
J1
H_A#26
N1
H_A#27
T5
H_A#28
H3
H_A#29
M3
H_A#30
M1
H_A#31
K3
R6
C1
E1
L4
G5
J4
F4
D3
D1
J6
G4
K6
M4
K5
K4
L6
H6
H4
G6
AJ4
AH5
AC19
AG26
AD24
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
C490
R368
1 2
1 2
R37247
R398
22_0402
1 2
C541
10PF
H_REQ#[0..4]
H_RS#[0..2]
.01UF
C489
CLK_GHT 12
CLK_GHT# 12
R193
240K
Closely to C.G
1 2
Compal Electronics, inc.
SCHEMATIC, M/B LA-1421
401218
星期四 八月
E
H_A#[3..31] 4H_D#[0..63]4
H_RESET# 5
H_ADS# 4
H_BNR# 4
H_BPRI# 4
H_DBSY# 5
H_DEFER# 4
H_DRDY# 5
H_HIT# 4
H_HITM# 4
H_LOCK# 4
H_TRDY# 5
H_REQ#[0..4] 4
H_RS#[0..2] 5
CLK_DREF 12
CLK_GBIN 12
CLK_GBOUT 12
8 44, 22, 2002
1A
A
B
C
VSSA_DPLL0 10
VSSA_DPLL1 10
D
E
U10B
MD0
D29
MD1
MD2
1 1
MD3
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
2 2
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD59
3 3
MD60
MD61
MD62
MD63
MD[0..63]
SM_DQ0
C29
SM_DQ1
D27
SM_DQ2
C27
SM_DQ3
A27
SM_DQ4
B26
SM_DQ5
E24
SM_DQ6
C25
SM_DQ7
E23
SM_DQ8
B25
SM_DQ9
C23
SM_DQ10
F22
SM_DQ11
B23
SM_DQ12
C22
SM_DQ13
E21
SM_DQ14
B22
SM_DQ15
C12
SM_DQ16
D10
SM_DQ17
C11
SM_DQ18
A10
SM_DQ19
C10
SM_DQ20
C8
SM_DQ21
A7
SM_DQ22
E9
SM_DQ23
C7
SM_DQ24
E8
SM_DQ25
A5
SM_DQ26
F8
SM_DQ27
C5
SM_DQ28
D6
SM_DQ29
B4
SM_DQ30
C4
SM_DQ31
E27
SM_DQ32
C28
SM_DQ33
B28
SM_DQ34
E26
SM_DQ35
C26
SM_DQ36
D25
SM_DQ37
A26
SM_DQ38
D24
SM_DQ39
F23
SM_DQ40
A25
SM_DQ41
G22
SM_DQ42
D22
SM_DQ43
A23
SM_DQ44
F21
SM_DQ45
D21
SM_DQ46
A22
SM_DQ47
F11
SM_DQ48
A11
SM_DQ49
B11
SM_DQ50
F10
SM_DQ51
B10
SM_DQ52
B8
SM_DQ53
D9
SM_DQ54
B7
SM_DQ55
F9
SM_DQ56
A6
SM_DQ57
C6
SM_DQ58
D7
SM_DQ59
B5
SM_DQ60
E6
SM_DQ61
A4
SM_DQ62
D4
SM_DQ63
ALMADOR-M
MD[0..63] 14
Layout note :
Place resistors & capacitors near GMCH
4 4
SM_D_CLK0
SM_D_CLK1
SM_D_CLK2
SM_D_CLK3
R431 101 2
R425 10
1 2
R430 101 2
R426 101 2
AD8
AD9
AD10
AJ21
AE8
AE9
AE10
AE11
AE12
AE13
AE17
AE19
AH21
AF8
AF9
AF10
AF11
AF12
AF13
AF14
AF15
AF16
AF17
AF18
AF19
AF20
AG7
AG15
AG16
AG21
AH6
AH8
AH9
AH11
AH12
AH14
AH17
AH18
K28
N28
T28
W28
AB28
L25
P25
U25
Y25
AE20
VSS_LM
SDRAM
System
Memory
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
Almador-M
GMCH
VSS Power
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS
A3
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSSP_AGP0
VSSP_AGP1
VSSP_AGP2
VSSP_AGP3
VSSP_AGP4
VSSP_AGP5
VSSP_AGP6
VSSP_AGP7
G24
VSSP_AGP8
VSSA_DPLL0
SDRAM
System
Memory
VSSA_DPLL1
SM_MA0
SM_MA1
SM_MA2
SM_MA3
SM_MA4
SM_MA5
SM_MA6
SM_MA7
SM_MA8
SM_MA9
SM_MA10
SM_MA11
SM_MA12
NC
NC
NC
NC
VSS
VSS
VCC_SM
VCC_SM
SM_BA0
SM_BA1
SM_DQM0
SM_DQM1
SM_DQM2
SM_DQM3
SM_DQM4
SM_DQM5
SM_DQM6
SM_DQM7
SM_CS#0
SM_CS#1
SM_CS#2
SM_CS#3
VCCQ_SM
VSS
SM_CLK0
SM_CLK1
SM_CLK2
SM_CLK3
VSS
VSS
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
VSS
VCC_SM
A20
B20
B19
C19
A18
A19
C17
C18
B17
A17
A16
C15
C14
F20
E20
F12
E11
C21
F19
E12
A12
B16
C16
F18
D18
D13
D12
E18
F17
F14
F13
E17
F16
D16
D15
E15
E14
A15
B2
B14
A3
A14
C3
A13
C9
C13
A9
B13
A8
SM_D_MA0
SM_D_MA1
SM_D_MA2
SM_D_MA3
SM_D_MA4
SM_D_MA5
SM_D_MA6
SM_D_MA7
SM_D_MA8
SM_D_MA9
SM_D_MA10
SM_D_MA11
SM_D_MA12
SM_DQM0
SM_DQM1
SM_DQM2
SM_DQM3
SM_DQM4
SM_DQM5
SM_DQM6
SM_DQM7
SM_CS#0
SM_CS#1
SM_CS#2
SM_CS#3
SM_D_CLK0
SM_D_CLK1
SM_D_CLK2
SM_D_CLK3
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
SM_D_MA[0..12]
XOR layout note:
F20,E20,F12,E11 add
testpoint for factory
SM_D_BA0
SM_D_BA1
C605 .1UF
1 2
SM_D_MA[0..12] 13
+3V
1 2
C615 .1UF
R434 10
1 2
R433 101 2
+3V
SM_DQM[0..7] 14
SM_CS#0 14
SM_CS#1 14
SM_CS#2 14
SM_CS#3 14
+3V
SM_CKE0 14
SM_CKE1 14
SM_CKE2 14
SM_CKE3 14
VSSA_DPLL0
VSSA_DPLL1
SM_BA0 14
SM_BA1 14
R389 0
1 2
R424 0
1 2
*
*
Layout note :
VSSP_SM0
VSSP_SM1
VSSP_SM2
VSSP_SM3
VSSP_SM4
VSSP_SM5
VSSP_SM6
VSSP_SM7
VSSP_SM8
VSSP_SM9
VSSP_SM10
VSSP_SM11
VSSP_SM12
VSSP_SM13
VSSP_SM14
VSSP_SM15
VSSP_SM16
VSSP_SM17
VSSP_SM18
VSSP_SM19
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
B3B6B9
B12
B15
B18
B21
B24
B27E7E10
E13
E16
E19
E22
E25G9G21E4D28
12
12
C216
33PF
12
C641
33PF
C642
33PF
A
+VTT
H7
12
C217
33PF
H23K7K23L7N6T6W7Y7AB7
SMD_CLK0 14
SMD_CLK1 14
SMD_CLK2 14
SMD_CLK3 14
B
M24
P24
T24
V24
Y23
M14
M15
M16
P12
R12
T12
SM_VREF1
VCC
VCC
VCC
VCC
C20
D19
A21
A24
C24
E5
F24
P18
R18
T18
SM_OCLK
SM_RCLK
Layout note :
Line length 0.15 inches +- 50mils
12
C623
.1UF
+V_SMREF
Close to Ball E5 and F24
12
C624
.1UF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
SM_RAS#
SM_CAS#
SM_WE#
SM_OCLK
SM_RCLK
SM_VREF0
1.Placement TP6 for Almador-M A2 stepping die.
2.The 0.1uF capacitor and connection to +3V
must be implanted for Almador-M A3 stepping
die.
SM_D_RAS#
SM_D_CAS#
SM_D_WE#
R428 101 2
R427 101 2
R429 101 2
1 2
C638 22PF
Layout note :
near pin C638
C
SM_RAS# 14
SM_CAS# 14
SM_WE# 14
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-1421
Size Document Number Rev
Custom
401218
星期四 八月
D
Date: Sheet of
9 44, 22, 2002
E
1A
A
DVOB_D[0..11]15
RP13
DVOB_D0_R
DVOB_D015
DVOB_D115
DVOB_D715
DVOB_D315
1 1
DVOB_D615
DVOB_D415
DVOB_D515
DVOB_D215
DVOB_D915
DVOB_D815
DVOB_D1115
DVOB_D1015
2 2
M_DDC1_DATA15
M_DDC1_CLK15
M_DDC2_DATA15
M_I2C_DATA15
3 3
4 4
4 5
DVOB_D1_R
3 6
DVOB_D7_R
2 7
DVOB_D3_R
1 8
8P4R_22
RP27
DVOB_D6_R
4 5
DVOB_D4_R
3 6
DVOB_D5_R
2 7
DVOB_D2_R
1 8
8P4R_22
RP11
DVOB_D9_R
4 5
DVOB_D8_R
3 6
DVOB_D11_R
2 7
DVOB_D10_R
1 8
8P4R_22
DVOB_D7_R
R416 15_1%1 2
R417 15_1%1 2
R472 15_1%
1 2
1 2
R473 15_1%
R413 330
DVOB_BLANK#
1 2
DVOB_HSYNC
DVOB_VSYNC
DVOB_D1_R
DVOB_D0_R
DVOB_D3_R
DVOB_D2_R
DVOB_D5_R
DVOB_D4_R
DVOB_D6_R
DVOB_D9_R
DVOB_D8_R
DVOB_D11_R
DVOB_D10_R
DVOBC_CLKINT#
DVOB_FLD/STL
DPMS_CLK
R453
100K
1 2
DVOB_BLANK#15
DVOC_D517
DVOB_CLK15
DVOB_CLK#15
DVOC_CLK17
DVOC_CLK#17
M_I2C_CLK15
DVOB_HSYNC15
DVOB_VSYNC15
DVOBC_CLKINT#15,17
DVOB_FLD/STL15
M_DDC2_CLK15
DVOC_VSYNC17
DVOC_HSYNC17
DVOC_D017
DVOC_D117
DVOC_D217
DVOC_D317
DVOC_D417
DVOC_D717
DVOC_D617
DVOC_D917
DVOC_D817
DVOC_D1117
DVOC_D1017
DPMS_CLK15
Layout note :
Place close to AE16,
AE15 of GMCH
C518
1 2
68PF
U10C
AA29
AGP_SBA0/ZV_D8
AA24
AGP_SBA1/ZV_D7
AA25
AGP_SBA2/ZV_D6
Y24
AGP_SBA3/ZV_D5
Y27
AGP_SBA4/ZV_D2
Y26
AGP_SBA5/ZV_D1
W24
AGP_SBA6/ZV_D0
Y28
AGP_SBA7/ZV_HREF
L27
AGP_CBE#0/DVOB_D7
P29
AGP_CBE#1/DVOB_BLANK#
R27
AGP_CBE#2/ZV_VSYNC
T25
AGP_CBE#3/DVOC_D5
L29
AGP_ADSTB0/DVOB_CLK
L28
AGP_ADSTB#0/DVOB_CLK#
U29
AGP_ADSTB1/DVOC_CLK
U28
AGP_ADSTB#1/DVOC_CLK#
AA27
AGP_SBSTB/ZV_D4
AA28
AGP_SBSTB#/ZV_D3
R29
AGP_FRAME#/M_DDC1_DATA
P26
AGP_IRDY#/M_I2C_CLK
P27
AGP_TRDY#/M_DDC1_CLK
N25
AGP_STOP#/M_DDC2_DATA
R28
AGP_DEVSEL#/M_I2C_DATA
AC27
AGP_REQ#/ZV_CLK
AD29
AGP_GNT#/ZV_D15
P28
AGP_PAR/DVO_DETECT
J29
AGP_AD0/DVOB_HSYNC
J28
AGP_AD1/DVOB_VSYNC
K26
AGP_AD2/DVOB_D1
K25
AGP_AD3/DVOB_D0
L26
AGP_AD4/DVOB_D3
J27
AGP_AD5/DVOB_D2
K29
AGP_AD6/DVOB_D5
K27
AGP_AD7/DVOB_D4
M29
AGP_AD8/DVOB_D6
M28
AGP_AD9/DVOB_D9
L24
AGP_AD10/DVOB_D8
M27
AGP_AD11/DVOB_D11
N29
AGP_AD12/DVOB_D10
M25
AGP_AD13/DVOBC_CLKINT#
N26
AGP_AD14/DVOB_FLD/STL
N27
AGP_AD15/M_DDC2_CLK
R25
AGP_AD16/DVOC_VSYNC
R24
AGP_AD17/DVOC_HSYNC
T29
AGP_AD18/DVOC_BLANK#
T27
AGP_AD19/DVOC_D0
T26
AGP_AD20/DVOC_D1
U27
AGP_AD21/DVOC_D2
V27
AGP_AD22/DVOC_D3
V28
AGP_AD23/DVOC_D4
U26
AGP_AD24/DVOC_D7
V29
AGP_AD25/DVOC_D6
W29
AGP_AD26/DVOC_D9
V25
AGP_AD27/DVOC_D8
W26
AGP_AD28/DVOC_D11
W25
AGP_AD29/DVOC_D10
W27
AGP_AD30/DVOBC_INTR#/DPMS_CLK
Y29
AGP_AD31/DVOC_FLD/STL
ALMADOR-M
B
V14
V15
V16
AE16
AE15
VDD_LM
VDD_LM
VDD_LM
VDD_LM
AGP
Interface
(DVOB/DVOC & ZV port)
AGP_PIPE#/ZV_D10
AGP_WBF#/ZV_D9
AGP_RBF#/ZV_D11
AB26
AB29
AB25
AC28
+1.8VSB
+3V
AD15
AD16
AE25
AD23
J24
VDD_LM
VDD_LM
VDD_LM
VCCP_IO
VCCP_IO
AGP_ST0/ZV_D14
AGP_ST1/ZV_D13
AGP_ST2/ZV_D12
LM_CMD
LM_SCK
LM_SIO
AC29
AB27
AH7
AF7
AJ7
+1.5VS
F26
N24
W23
VCCP_HUB
VCCP_HUB
VCCQ_AGP
LM_RQ0
LM_RQ1
LM_RQ2
AG11
AJ12
AG12
AH13
C517 .1UF
12
12
C585 .1UF
J26
M26
R26
V26
AA26
L23
AA23
U24
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCQ_AGP
VCCP_AGP
Almador-M
GMCH
Local Memory
Inter face
LM_RQ3
LM_RQ4
LM_RQ5
LM_RQ6
LM_RQ7
LM_RCLK
LM_GCLK
LM_RAMREF0
AG13
AJ13
AG14
AJ14
AJ6
AG6
AD14
C
+VTT
+3V
AE6G7G10
VCCA_HPLL
VCCA_CPLL
Power
Interface
A3
LM_RAMREF1
LM_CTM
LM_CTM#
AE14
AH15
AJ15
G20
AF6
VCCQ_SM
VCCQ_SM
VCCPCMOS_LM
LM_CFM
LM_CFM#
AJ16
AH16
1 2
+1.8VSB+VTT
AE7
AC9
AC8
AF26
AG27F5J5M5R5V5AA5
VCCA_DAC
VCCPCMOS_LM
VCCPCMOS_LM
VCCPCMOS_LM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
D5D8D11
D14
D17
D20
0_0805
+1.8VSB
R387
12
12
C535
C534
.01UF
.1UF
+VTT
AD5
AG5
VCC_H
VCC_H
VCC_H
VCC_H
VCC_H
VCC_H
VCCP_SM
VCCQ_SM
VCCQ_SM
G11
1 2
VCC_H
VCCP_SM
VCCQ_SM
VCCP_SM
G19
G23
AC10
VCCA_DAC
VCCP_SM
VCCP_SM
D23
D26F7F15
R369 10K
R370 10K1 2
12
C520
.1UF
E2
AC20
F25
VCC_H
VCC_H
VCCA_DPLL0
VCCA_DPLL1
(DVOA port)
Local Memory
Interface
VCC_LM
VCC_LM
VCC_LM
VCC_LM
VCC_LM
AC11
AD11
AD12
AD13
12
+1.5VS
AC21
AF21
AF24
VCCP_DVO
VCCP_DVO
Display
Interface
VCC_LM
VCC_LM
VCC_LM
AE18
AD17
AD18
AD19
C625
.1UF
150UF_6.3V_D2
DAC_VSYNC
VCCP_DVO
DAC_HSYNC
DAC_RED#
DAC_GREEN#
DAC_BLUE#
DAC_RED
DAC_GREEN
DAC_BLUE
IO_DDC1CLK
IO_DDC1DATA
DAC_REFSET
DVO_CLKIN
DVO_BLANK#
DVO_VSYNC
DVO_HSYNC
IO_I2CCLK
IO_I2CDATA
DVO_CLK#
DVO_CLK
DVO_D10
DVO_D11
IO_DDC2DATA
IO_DDC2CLK
DVO_INTR#
DVO_FIELD
LM_DQA0
LM_DQA1
LM_DQA2
LM_DQA3
LM_DQA4
LM_DQA5
LM_DQA6
LM_DQA7
LM_DQB0
LM_DQB1
LM_DQB2
LM_DQB3
LM_DQB4
LM_DQB5
LM_DQB6
LM_DQB7
AGP_BUSY#
VCC_LM
+3V
+VS_RIMMREF
D
C629
DVO_D0
DVO_D1
DVO_D2
DVO_D3
DVO_D4
DVO_D5
DVO_D6
DVO_D7
DVO_D8
DVO_D9
C640
150UF_6.3V_D2
L41 0_0805
1 2
1 2
L40 0_0805
+1.5VS
AE29
AD28
AF28
AG28
AH27
AF29
AG29
AH28
IO_DDC1CLK
AE27
IO_DDC1DATA
AD27
AJ27
1 2
R364 255_1%_0603
DVOA_CLKIN
AD20
AD21
AF23
AF22
AD25
AC25
AG24
AJ24
DVOA_D0
AJ22
DVOA_D1
AH22
AG22
AJ23
AH23
DVOA_D5
AG23
DVOA_D6
AE23
AE24
AJ25
AH25
AG25
AJ26
AD26
AE26
DVOA_INTR#
AE21
DVOA_FIELD
AE22
AG17
AJ17
AG18
AJ18
AG19
AJ19
AG20
AJ20
AJ11
AH10
AJ10
AG10
AJ9
AG9
AJ8
AG8
AGP_BUSY#
AC24
+1.8VSB
12
C521
68PF
VSSA_DPLL0 9
VSSA_DPLL1 9
R432 0
1 2
1 2
R436 0
R379 @2.2K1 2
R374 2.2K1 2
R367 @2.2K
R385 10K1 2
R390 10K1 2
XOR layout note: AE24,AJ25
add testpoint for factory
R383 10K1 2
R375 10K1 2
Strap Name Low High
DVOA_D0 Reserved 133MHz
DVOA_D1 IOQD=2 IOQD=8
+VTT
DVOA_D5 Desktop Mobile
DVOA_D6 Dual Ended Term Single Ended Term
1 2
DAC_VSYNC 16
DAC_HSYNC 16
DAC_RED# 16
DAC_GREEN# 16
DAC_BLUE# 16
DAC_RED 16
DAC_GREEN 16
DAC_BLUE 16
VCH_I2CDATA 15
VCH_I2CCLK 15
TV_OUT_DATA 17
TV_OUT_CLK 17
R395
1 2
*
@10K
AGP_BUSY# 19
DVOA_D6
DVOA_D5
DVOA_D0
VCH_DDCCLK 16
VCH_DDCDATA 16
+3VS
DVOA_CLKIN
DVOA_INTR#
DVOA_FIELD
+3VS
E
1 2
R371@2.2K
R380 100K
R381 100K
R382 10K
H_BSEL0 5,12
+1.5VS
1 2
1 2
1 2
+3VS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
12
C524
.1UF
C
12
C523
.1UF
D
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-1421
Size Document Number Rev
Custom
401218
星期四 八月
Date: Sheet of
10 44, 22, 2002
E
1A
A
B
C
D
E
Layout note :
Distribute as close as possible
to GMCH Processor Quadrant .
+VTT
1 1
+VTT
12
12
C545
.1UF
12
C565
.1UF
12
C544
C543
.1UF
.1UF
12
12
C559
C554
.1UF
.1UF
12
12
C567
C562
.1UF
.1UF
12
12
C561
C572
.1UF
.1UF
12
12
C574
.1UF
12
C580
.1UF
12
12
C592
C593
.1UF
.1UF
12
12
C505
C506
.1UF
.1UF
12
C594
C571
.1UF
.1UF
12
12
C530
C540
.1UF
.1UF
Layout note :
Distribute as close as possible
to GMCH Local Memory Quadrant .
+1.8VSB
+1.8VS +1.8VSB
L46
1 2
CHB3216U121
12
12
C493
C529
+
22UF_16V_1206
82PF
2 2
3 3
+VTT
12
C497
+
220UF_4V_D2
+VTT
12
C628
+
220UF_4V_D2
+VTT
12
C550
+
220UF_4V_D2
+VTT
12
C542
.1UF
Layout note :
Distribute as close as possible
12
12
12
C498
C547
.1UF
.1UF
12
12
C618
C604
.1UF
.1UF
12
C552
C558
.1UF
.1UF
12
12
C575
C590
.1UF
.1UF
12
12
C570
.1UF
12
C503
.1UF
12
C577
C582
.1UF
.1UF
12
12
C511
C516
.1UF
.1UF
12
12
C588
.1UF
12
C553
.1UF
12
C596
C601
.1UF
.1UF
12
12
C621
C603
.1UF
.1UF
to GMCH AGP/DVO Quadrant .
+1.5VS
12
+
22UF_16V_1206
C502
12
C586
.1UF
Layout note :
Distribute as close as possible
12
12
12
C566
.1UF
12
C579
.1UF
12
C578
.1UF
12
C583
.1UF
C573
.1UF
12
12
C546
C557
.1UF
.1UF
12
12
C591
C595
.1UF
.1UF
12
12
C589
C539
.1UF
.1UF
C533
.1UF
12
C598
.1UF
12
12
C563
C581
.1UF
.1UF
12
12
C556
C622
.1UF
.1UF
to GMCH System Memory Quadrant .
+3V
12
+
22UF_16V_1206
C485
12
C606
.1UF
12
12
C510
C528
.1UF
.1UF
12
12
C576
C597
.1UF
82PF
12
12
C610
C607
.1UF
82PF
12
12
C514
C512
.1UF
82PF
12
12
C564
C551
.1UF
.1UF
12
12
C609
C611
.1UF
.1UF
12
12
C513
+
.1UF
12
12
C538
82PF
12
12
C614
82PF
C620
68UF_4V_B2
12
C527
C555
.1UF
.1UF
12
C632
C608
.1UF
.1UF
12
C495
+
68UF_4V_B2
12
12
C499
82PF
C619
82PF
12
C500
.1UF
12
C633
.1UF
12
C494
+
68UF_4V_B2
12
+
12
12
C548
C501
.1UF
82PF
12
12
C612
C634
.1UF
82PF
C626
+
@68UF_4V_B2
12
C584
.1UF
12
C635
.1UF
12
C496
@68UF_4V_B2
12
12
C637
.1UF
C636
.1UF
12
C613
.1UF
Layout note :
+VTT
12
C627
+
220UF_4V_D2
4 4
12
C569
+
220UF_4V_D2
Distribute as close as possible
to IO Quadrant .
+3V
12
C639
+
22UF_16V_1206
12
12
C631
.1UF
C630
.1UF
Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
A
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
D
SCHEMATIC, M/B LA-1421
Size Document Number Rev
Custom
401218
星期四 八月
Date: Sheet of
11 44, 22, 2002
E
1A
A
B
C
D
E
+3VS
Check Bead Value
should be 19.6K
1 1
+3VS
+3VS
+3VS
12
12
12
R182
10K
H_BSEL15
H_BSEL05,10
2 2
CLK_ICH4819
CLK_DREF8
3 3
CLK_ICH1419
CLK_SIO1427
CLK_DAC_1430
12
R177
@0
R134
R133
1K
1K
SEL2
SEL1
SEL0
12
12
R135
R136
@0
@0
VTT_PWRGD#5,32
CLK_DAC_14
12
12
C241
C247
22PF
22PF
Place Crystal within 500 mils of CK_Titan
C222 5PF
1 2
caps are internal
to CK_TITAN
1 2
R202 4.7K1 2
R196 4.7K
R181 331 2
1 2
1 2
1 2
R179 01 2
R185 @01 2
R141 01 2
R161 10K1 2
1 2
* 221_1%
* 33
* 33
PM_SLP_S1#19,32
PM_SLP_S3#19,32
PM_STPPCI#19
PM_STPCPU#19
+3V
SMB_DATA7,14,19
SMB_CLK7,14,19
+3V
CLK_VCH15
R172 220_1%_0603
R166 221 2
R173 221 2
R123 331 2
R122 33
R124 @33
Place caps. near
CK Titan
12
Y2
14.318MHZ
L23
CHB2012U170
1 2
2
40
55
54
25
34
53
28
43
29
30
33
35
42
39
38
56
+3V_CLK
U15
XTAL_IN
SEL2
SEL1
SEL0
PWR_DWN#
PCI_STOP#
CPU_STOP#
VTT_PWRGD#
MULT0
SDATA
SCLK
3V66_0/DRCG
3V66_1/VCH_CLK
IREF
48MHZ_USB
48MHZ_DOT
REF
ICS950805
Width=40 mils
181419323746
VDD_PCI
VDD_PCI
VDD_REF
VDD_3V66
VDD_3V66
GND_REF
GND_PCI
GND_PCI
GND_3V66
GND_3V66
491520313641
12
+
C209
22UF_16V_1206
50
VDD_CPU
VDD_CPU
VDD_CORE
VDD_48MHZ
GND_COREXTAL_OUT
CPUCLKT2
CPU_CLKC2
CPUCLKT1
CPUCLKC1
CPUCLKT0
CPUCLKC0
66MHZ_IN/3V66_5
66MHZ_OUT2/3V66_4
66MHZ_OUT1/3V66_3
66MHZ_OUT0/3V66_2
PCICLK_F2
PCICLK_F1
PCICLK_F0
PCICLK6
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK0
GND_48MHZ
GND_IREF
GND_CPU
47
12
C251
.01UF
L24
CHB2012U170
1 2
12
+
C268
22UF_16V_1206
CLK_BCLK
CLK_BCLK#
CLK_GCLK
CLK_GCLK#
1 2
1 2
1 2
12
C259
.01UF
12
12
C228
C214
.01UF
.01UF
+3VS
12
R358
475_1%_0603
12
R148
475_1%_0603
PCIF1
PCIF0
12
12
C234
C230
.01UF
.01UF
26
12
C265
.01UF
273
45
44
49
48
52
51
24
23
R186 33
22
R180 331 2
21
7
R143 331 2
R125 33
6
5
R140 @331 2
18
R174 331 2
R171 33
17
R168 331 2
16
13
R162 331 2
12
R158 331 2
11
10
12
12
C239
.01UF
Place all these Block's
Components near CK_Titan
1 2C227 5PF
R356 33
1 2
R350 61.9_1%_0603
R363 61.9_1%_0603
1 2
R359
1 2
R144 33
1 2
R139 61.9_1%_0603
R160 61.9_1%_06031 2
R151 33
1 2
12
C253
@10PF
12
C249
.01UF
C257
@10PF
12
C223
.01UF
331 2
Place caps. near
CK_Titan
CLK_HCLK 5
Place all these Block's
Components near CPU
CLK_HCLK# 5
CLK_GHT 8
Place all these Block's
Components near GMCH
CLK_GHT# 8
CLK_GBOUT 8
CLK_GBIN 8
CLK_ICHHUB 19
CLK_ICHPCI 19
CLK_PCI_CB 25
CLK_LPC_EC 32
CLK_LPC_SIO 27
CLK_PCI_DBC 27
CLK_PCI_LAN 23
22_0402
R200
12
10PF
C264
Place near CPU
R72 26.7_1%_0603
PCIF1
1 2
SEL2 SEL1 SEL0 CPUCLKC[0..2] CPUCLKT[0..2]
1 0 0 66.67 66.67
1 0 1 100.00 100.00
1 1 0 200.00 200.00
1 1 1 133.33 133.33
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
A
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
PCIF0
12
R68
137_1%_0603
D
1 2
R119
@51.1_1%_0603
Title
Size Document Number Rev
Custom
Date: Sheet of
12
R115
0_0603
0 ohm resistor for ICH3 doesn't
need to support APIC function.
Compal Electronics, inc.
SCHEMATIC, M/B LA-1421
401218
星期四 八月
CLK_CPU_APIC 5
CLK_ICHAPIC 19
12 44, 22, 2002
E
1A
A
B
C
D
E
1 1
Layout note :
One .1uF cap per power pin .
Place each cap close to SODIMM(DIMM 0) pin .
+3V
SM_D_MA[0..12]9 MAA[0..12] 14
SM_D_MA3
SM_D_MA2
SM_D_MA0
SM_D_MA1
SM_D_MA6
SM_D_MA4
SM_D_MA7
SM_D_MA5
SM_D_MA8
2 2
SM_D_MA9
SM_D_MA10
SM_D_MA11
RP21
1 8
2 7
3 6
4 5
8P4R_10
RP22
1 8
2 7
3 6
4 5
8P4R_10
RP28
1 8
2 7
3 6
4 5
MAA3
MAA2
MAA0
MAA1
MAA6
MAA4
MAA7
MAA5
MAA8
MAA9
MAA10
MAA11
8P4R_10
SM_D_MA12
1 2
MAA12
R435 10
12
C288
.1UF
+3V
12
C274
+
22UF_16V_1206
Layout note :
One .1uF cap per power pin .
Place each cap close to SODIMM(DIMM 1) pin .
C287
1000PF
12
C286
.1UF
C285
1000PF
12
C284
.1UF
C283
1000PF
12
C281
.1UF
C280
1000PF
12
C320
.1UF
C321
1000PF
12
C322
.1UF
C325
1000PF
12
C326
.1UF
C323
1000PF
12
C348
.1UF
C317
1000PF
12
C319
C318
1000PF
.1UF
+3V
12
C346
.1UF
C345
1000PF
12
C344
.1UF
C343
1000PF
12
C342
.1UF
C341
1000PF
12
C340
.1UF
C375
1000PF
12
C282
.1UF
C377
1000PF
12
C378
.1UF
C379
1000PF
12
C381
.1UF
C382
1000PF
12
C383
.1UF
C384
1000PF
12
C376
C385
1000PF
.1UF
+3V
12
C350
+
3 3
22UF_16V_1206
4 4
Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
A
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
D
SCHEMATIC, M/B LA-1421
Size Document Number Rev
Custom
401218
星期四 八月
Date: Sheet of
13 44, 22, 2002
E
1A
A
SO-DIM 144 PINS
RAM MODULE CONN.
MD0
1 1
MAA[0..12]13
MD[0..63]9
SM_DQM[0..7]9
2 2
3 3
MAA[0..12]
MD[0..63]
SM_DQM[0..7]
SMD_CLK09
SM_RAS#9
SM_WE#9
SM_CS#09
SM_CS#19
MD1
MD2
MD3
MD4
MD5
MD6
MD7
SM_DQM0
SM_DQM4
MAA0
MAA1
MAA2
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
R253
C347
22
22PF
SM_RAS# SM_CAS#
SM_WE# SM_CKE1
SM_CS#0 MAA12
SM_CS#1
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MAA6 MAA7
MAA8
MAA9
MAA10 MAA11
SM_DQM2
SM_DQM6
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
SDADIMM0 SCKDIMM0
BANK 0/1
+3V +3V
JP18
1
VSS
3
DQ0
5
DQ1
7
DQ2
9
DQ3
11
VCC
13
DQ4
15
DQ5
17
DQ6
19
DQ7
21
VSS
23
CE0#
25
CE1#
27
VCC
29
A0
31
A1
33
A2
35
VSS
37
DQ8
39
DQ9
41
DQ10
43
DQ11
45
VCC
47
DQ12
49
DQ13
51
DQ14
53
DQ15
55
VSS
57
RESVD/DQ64
59
RESVD/DQ65
61
RFU/CLK0
63
VCC
65
RFU
67
WE#
69
RE0#
71
RE1#
73
OE#/RESVD
75
VSS
77
RESVD/DQ66
79
RESVD/DQ67
81
VCC
83
DQ16
85
DQ17
87
DQ18
89
DQ19
91
VSS
93
DQ20
95
DQ21
97
DQ22
99
DQ23
101
VCC
103
A6
105
A8
107
VSS
109
A9
111
A10
113
VCC
115
CE2#/RESVD
117
CE3#/RESVD
119
VSS
121
DQ24
123
DQ25
125
DQ26
127
DQ27
129
VCC
131
DQ28
133
DQ29
135
DQ30
137
DQ31
139
VSS
141
SDA
143
VCC
S O-DIMM144-STANDRD
DIMM0
4 4
+3V
RP23
SCKDIMM1
1 8
SCKDIMM0
2 7
SDADIMM1
3 6
SDADIMM0
4 5
8P4R_10K
A
B
VSS
DQ32
DQ33
DQ34
DQ35
VCC
DQ36
DQ37
DQ38
DQ39
VSS
CE4#
CE5#
VCC
A3
A4
A5
VSS
DQ40
DQ41
DQ42
DQ43
VCC
DQ44
DQ45
DQ46
DQ47
VSS
RESVD/DQ68
RESVD/DQ69
RFU/CKE0
VCC
RFU
RFU/CKE1
RFU
RFU
RFU/CLK1
VSS
RESVD/DQ70
RESVD/DQ71
VCC
DQ48
DQ49
DQ50
DQ51
VSS
DQ52
DQ53
DQ54
DQ55
VCC
A7
A11/BA0
VSS
A12/BA1
A13/A11
VCC
CE6#/RESVD
CE7#/RESVD
VSS
DQ56
DQ57
DQ58
DQ59
VCC
DQ60
DQ61
DQ62
DQ63
VSS
SCL
VCC
B
2
MD8
4
MD9
6
MD10
8
MD11
10
12
MD12
14
MD13
16
MD14
18
MD15
20
22
SM_DQM1
24
SM_DQM5
26
28
MAA3
30
MAA4
32
MAA5
34
36
MD40
38
MD41
40
MD42
42
MD43
44
46
MD44
48
MD45
50
MD46
52
MD47
54
56
58
60
SM_CKE0
62
64
66
68
70
72
74
76
78
80
82
MD24
84
MD25
86
MD26
88
MD27
90
92
MD28
94
MD29
96
MD30
98
MD31
100
102
104
SM_BA0
106
108
SM_BA1
110
112
114
SM_DQM3
116
SM_DQM7
118
120
MD56
122
MD57
124
MD58
126
MD59
128
130
MD60
132
MD61
134
MD62
136
MD63
138
140
142
144
PROPRIETARY NOTE
C
+3V+3V
C386
+
10UF_10V_1206
SM_CKE0 9
SM_CKE1 9
R282
22
C380
22PF
SM_BA0 9
SM_BA1 9
SM_SEL019
SMB_CLK7,12,19
SMB_DATA7,12,19
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C387
+
10UF_10V_1206
SMD_CLK1 9
C303
6
INH
10
A
9
B
3
X
13
Y
.1UF
+3V
7
C
16
GND
8
VCC
GND
+3V
X0
X1
X2
X3
Y0
Y1
Y2
Y3
+
C277
10UF_10V_1206
SMD_CLK29
SM_CS#29
SM_CS#39
U26
SCKDIMM0
1
SCKDIMM1
5
2
4
SDADIMM0
12
SDADIMM1
14
15
11
74HC4052
BANK 2/3
+3V +3V
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
SM_DQM0
SM_DQM4
MAA0
MAA1
MAA2
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
C276
R210
22PF
22
SM_RAS# SM_CAS#
SM_WE# SM_CKE3
SM_CS#2 MAA12
SM_CS#3
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MAA6 MAA7
MAA8
MAA9
MAA10 MAA11
SM_DQM2
SM_DQM6
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
SDADIMM1
SM_SEL0 X/Y
0 SCKDIMM0
SCKDIMM11
D
JP16
1
VSS
3
DQ0
5
DQ1
7
DQ2
9
DQ3
11
VCC
13
DQ4
15
DQ5
17
DQ6
19
DQ7
21
VSS
23
CE0#
25
CE1#
27
VCC
29
A0
31
A1
33
A2
35
VSS
37
DQ8
39
DQ9
41
DQ10
43
DQ11
45
VCC
47
DQ12
49
DQ13
51
DQ14
53
DQ15
55
VSS
57
RESVD/DQ64
59
RESVD/DQ65
61
RFU/CLK0
63
VCC
65
RFU
67
WE#
69
RE0#
71
RE1#
73
OE#/RESVD
75
VSS
77
RESVD/DQ66
79
RESVD/DQ67
81
VCC
83
DQ16
85
DQ17
87
DQ18
89
DQ19
91
VSS
93
DQ20
95
DQ21
97
DQ22
99
DQ23
101
VCC
103
A6
105
A8
107
VSS
109
A9
111
A10
113
VCC
115
CE2#/RESVD
117
CE3#/RESVD
119
VSS
121
DQ24
123
DQ25
125
DQ26
127
DQ27
129
VCC
131
DQ28
133
DQ29
135
DQ30
137
DQ31
139
VSS
141
SDA
143
VCC
SO-DIMM144 REVERSE
DIMM1
D
VSS
DQ32
DQ33
DQ34
DQ35
VCC
DQ36
DQ37
DQ38
DQ39
VSS
CE4#
CE5#
VCC
A3
A4
A5
VSS
DQ40
DQ41
DQ42
DQ43
VCC
DQ44
DQ45
DQ46
DQ47
VSS
RESVD/DQ68
RESVD/DQ69
RFU/CKE0
VCC
RFU
RFU/CKE1
RFU
RFU
RFU/CLK1
VSS
RESVD/DQ70
RESVD/DQ71
VCC
DQ48
DQ49
DQ50
DQ51
VSS
DQ52
DQ53
DQ54
DQ55
VCC
A7
A11/BA0
VSS
A12/BA1
A13/A11
VCC
CE6#/RESVD
CE7#/RESVD
VSS
DQ56
DQ57
DQ58
DQ59
VCC
DQ60
DQ61
DQ62
DQ63
VSS
SCL
VCC
Title
Size Document Number Rev
Custom
Date: Sheet of
2
MD8
4
MD9
6
MD10
8
MD11
10
12
MD12
14
MD13
16
MD14
18
MD15
20
22
SM_DQM1
24
SM_DQM5
26
28
MAA3
30
MAA4
32
MAA5
34
36
MD40
38
MD41
40
MD42
42
MD43
44
46
MD44
48
MD45
50
MD46
52
MD47
54
56
58
60
SM_CKE2
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
SM_BA0
SM_BA1
SM_DQM3
SM_DQM7
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
SCKDIMM1
SM_CKE2 9
SM_CAS# 9
SM_CKE3 9
R239
22
C324
22PF
Compal Electronics, inc.
SCHEMATIC, M/B LA-1421
401218
星期四 八月
E
E
SMD_CLK3 9
1A
14 44, 22, 2002
Loading...