Compal LA-1391 ATR11, Satellite 1905 Schematic

COMPAL CONFIDENTIAL
MODEL NAME :ATR11 LA-1391
REV:1.0
CRT & TV-OUT LCD
PAGE 18
Pentium4/Northwood mPGA478 CPU
PAGE 2,3
PSB
CLOCK
ICS950805
PAGE 11
INTERNAL IDE
IDE/CD /FDD
PAGE 25
USB/BlueTooth
LPT PORT MDC
ATI M6P
16MB DD R SDRAM
PIRQA#
Direct CD Play
PAGE 24
PAGE 27
LPC 47 N227
PAGE 26
PAGE 1 4, 15,16,17
HUB Link
ICH2
FUNC 0: LAN, HUB-TO-PCI , PCI-TO-LPC BRIDGE FUNC 1: IDE Controller
FUNC 2: USB Controller #1 FUNC 3: SM BUS Controller FUNC 4: USB Controller #2 FUNC 5: AC97 Audio Controller FUNC 5: AC97 Modem Controller
LPC
SIO
PAGE 27
PAGE 1 0,11,12
EC/KBC
PC87591
EC BUFFER
PCI BUS
LPC
PAGE 31
BIOS
PAGE 31 PAGE 30
PROPRIETARY NOTE
Brookdale MCH
Host-AGP Bridge DRAM controller Hub interface
1394 Controller
TAB43AB22
AC LINK
AC97 Codec
PAGE 29 PAGE 30
PAGE 4,5,6
IDSEL: AD26 MASTER 2 PIRQC#
PAGE 19
MDC Connector
PAGE 25
MEMORY BUSAGP BUS
AMP & Audio Jack
IDSEL: AD16 MASTER 3 PIRQA#, PIRQB# SIRQ
CARDBUS
OZ6933
PCMCIA SOCKET
DDR DIMM*2
PAGE 7,8
LAN Controller
INTEL PHY
PAGE 20
PAGE 20
Switchs & Connectors
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
POWER INTERFACE
PAGE 35
IDSEL: AD27 MASTER 0 PIRQA#, PIRQD#
Mini PCI Connector
PAGE 22
PAGE 23
DC/DC POWER
+1.5V POWER +1.8V POWER +2.5V POWER +3VA L W POWER +5VA L W POWER +12VALW POWER CPU_VCC POWER
PAGE 36,37,38,39,40,41
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1391
Size Do cum e nt Number R e v
401211
Dat e : Sheet
期二 十一月
of
144¬P , 26, 2002
1B
A
CPU_VCC
1 2
R274 51_1%
1 2
R91 56
1 2
R280 300_1%
1 2
R290 51_1%
4 4
RP5
1 8 2 7 3 6 4 5
8P4R-1K
3 3
CPU_VCC
2 2
1 1
SELPSB[1:0] STSEM BUS FREQUENCY
CPURST#
FERR#
CPU_PW RGD
ITP_TMS ITP_TRST# ITP_TCK ITP_TDI
1 2
R250 51_1%
1 2
R251 51_1%
1 2
R262 51_1%
1 2
R253 51_1%
1 2
R254 51_1%
1 2
R263 51_1%
00 01 10 11
BREQ0#
BPM0# BPM1# BPM2# BPM3# BPM4# BPM5#
A
100MHZ RESERVED RESERVED RESERVED
CPU_PWRGD10
HREQ#04 HREQ#14 HREQ#24 HREQ#34 HREQ#44
ADSTB0#4 ADSTB1#4
BREQ0#4
BPRI#4 HLOCK#4 HIT#4 HITM#4 DEFER#4 DRDY#4
CPURST#4
HTRDY#4
CPU_VCC
BSEL013 BSEL113
DBSY#4
CPUSLP#10
HA#[3..31]4
ADS#4
BNR#4
RS#04 RS#14 RS#24
HA#[3..31]
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
BREQ0#
CPURST#
BPM0# BPM1# BPM2# BPM3# BPM4# BPM5#
ITP_TDI ITP_TMS ITP_TRST# ITP_TCK
1 2
R82 @62_1%
BSEL0 BSEL1
CPU_PW RGD CPUSLP#
THERMDA THERMDC THERMTRIP#
AB1
AC1 AA3 AC3
K25 K26 L25
AB25
AB2 AC6
AB5 AC4
AA5 AB4
AF26
AD6
AD5 AE25 AB23
AB26
W1
W2
J26
K2 K4 L6 K1 L3
M6
L2 M3 M4 N1 M1 N2 N4 N5
T1 R2
P3
P4 R3
T2 U1
P6 U3
T4
V2 R6
T5 U4
V3
Y1
J1
K5
J4 J3
H3
L5 R5
G1
V5
G2
H6
D2
G4
F3
E3
E2 H2
V6
J6 F1 G5 F4
Y6
D5 C1 F7 E6 D4 C3
H5
B3 C4 A2
U23A
A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# A32# A33# A34# A35#
REQ0# REQ1# REQ2# REQ3# REQ4#
ADSTB0# ADSTB1#
ADS# AP0# AP1# BINIT# BNR# IERR# DP0# DP1# DP2# DP3# BREQ0# BPRI# LOCK# HIT# HITM# DEFER# DRDY# MCERR# RESET# TRDY# RS0# RS1# RS2# RSP#
BPM0# BPM1# BPM2# BPM3# BPM4# BPM5#
SKTOCC# TDO TDI TMS TRST# TCK PROCHOT#
BSEL0 BSEL1 DBSY# DBR#
PWRGOOD SLP#
THERMDA THERMDC THERMTRIP#
mPGA478
B
ADDR GROUP
CONTROL GROUP
THERMAL DIODE
B
Northwood
MISC
PROPRIETARY NOTE
C
HD#[0..63]
HD#0
B21
D0# D1# D2# D3# D4# D5# D6# D7# D8#
D9# D10# D11# D12# D13# D14# D15# D16# D17# D18# D19# D20# D21# D22#
DATA GROUP
HOST CLK
LEGACY CPU
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D23# D24# D25# D26# D27# D28# D29# D30# D31# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63#
DBI0# DBI1# DBI2# DBI3#
DSTBN0# DSTBN1# DSTBN2# DSTBN3# DSTBP0# DSTBP1# DSTBP2# DSTBP3#
BCLK0 BCLK1
ITPCLK0 ITPCLK1
A20M# FERR#
IGNNE#
INTR/LINT0
NMI/LINT1
INIT#
STPCLK#
SMI#
B22 A23 A25 C21 D22 B24 C23 C24 B25 G22 H21 C26 D23 J21 D25 H22 E24 G23 F23 F24 E25 F26 D26 L21 G26 H24 M21 L22 J24 K23 H25 M23 N22 P21 M24 N23 M26 N26 N25 R21 P24 R25 R24 T26 T25 T22 T23 U26 U24 U23 V25 U21 V22 V24 W26 Y26 W25 Y23 Y24 Y21 AA25 AA22 AA24
E21 G25 P26 V21
E22 K22 R22 W22 F21 J23 P23 W23
AF22 AF23
AC26 AD26
C6 B6 B2 D1 E5
W5 Y4 B5
HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63
A20M# FERR# IGNNE# INTR NMI
C
HD#[0..63] 4
SB_A20M#
SB_IGNNE#
SB_INTR
SB_NMI NMI
DBI0# 4 DBI1# 4 DBI2# 4 DBI3# 4
DSTBN0# 4 DSTBN1# 4 DSTBN2# 4 DSTBN3# 4 DSTBP0# 4 DSTBP1# 4 DSTBP2# 4 DSTBP3# 4
HCLK_CPU 13 HCLK_CPU# 13
FERR# 10
CPUINIT# 10 STPCLK# 10 SMI# 10
2200PF
+5VS
1 2
1 2
1 2
1 2
CPU_VCC
CPU_VCC
12
C104
R67 1K
R95 0
R97 0
R66 0
R65 0
1 2
A20M#
IGNNE#
INTR
R92 @0
1 2
R142 56
1 2
R98 56
12
THERMDA THERMDC
R93
C71 .1UF
@0
D
1 2 3 4 5 6 7 8
1 8
2 7
3 6
4 5
12
12
12
12
2
THERMTRIP#
D
1617VCC
U5
NC VCC
STBY
DXP
SMBCLK DXN NC
SMBDATA
ADD1
ALERT
GND
ADD0
GND
MAX1617/MAX6654
CPU_VCC
RP7
@8P4R_1K
SB_A20M#10
SB_IGNNE#10
SB_INTR10
SB_NMI10
CPURST#4
R96
R94
@0
@0
+3V
R144 1K
1 2
1 2
1
C
Q8
B
2SC2411K
E
3
16
NC
15 14 13
NC
12 11 10 9
NC
SB_A20M#
SB_IGNNE#
SB_INTR
SB_NMI
1 2
R497 @1K
R145 @0
Compal Electronics, Inc.
Title
Size Do cum e nt Number R e v
Dat e : Sheet
+5VS
12
R38 200
EC_SMC2 24,31
12
R39 1K
2 3
5 6
11 10
14 13
1
C604
@0.22UF
EC_SMD2 24,31
U7
IOA IOA
IOB IOB
I1C I1C
I1D I1D
S
@QS3257
A20M# IGNNE# INTR NMI
ATF#
+5VS
1 2
SW1 RA TI O SELECT
RATIO 15X 16X 17X 18X 19X 20X 21X 22X 23X 24X
SCHEMATIC, M/B LA-1391
401211
NM I A 20M# IGNNE# I N TR
H L L L L L L L H L
THERTRIP# 31 VR_ON 31,41
期二 十一月
VCC
GND
YA
YB
YC
YD
E#
16 4
7
9
12 8
15
1 2
RP6 @8P4R_330
L H H H H L L L H L
E
+3VS
C96
1 2
@.1UF
A20M#
IGNNE#
INTR
NMI
R61 @1K
45 36 27 18
L H H L L H H L H L
E
244¬P , 26, 2002
CPU_VCC
L H L H L H L H L L
1B
of
A
10 9 8 7 6
10 9 8 7 6
+
TESTHI7 TESTHI6 TESTHI5 TESTHI4
1 2
CPUVID
VCCA
C368
+
150U_D
VSSA
VCCIOPLL
CPU_VCC
CPU_VCC
CPU_VCC
TESTHI12
CPU_GTLREF H_GTLREF
R294
51.1_1%
TESTHI0 TESTHI1 TESTHI2 TESTHI3 TESTHI4 TESTHI5 TESTHI6 TESTHI7 TESTHI8 TESTHI9 TESTHI10 TESTHI11 TESTHI12
COMP0 COMP1
R59
51.1_1%
1 2
R492 @0
12
C365 1UF
U23B
AD20
VCCA
AD22
VSSA
AE23
VCCIOPLL
A5
VCCSENSE
A4
VSSSENSE
A10
VCC
A12
VCC
A14
VCC
A16
VCC
A18
VCC
A20
VCC
A8
VCC
AA10
VCC
AA12
VCC
AA14
VCC
AA16
VCC
AA18
VCC
AA8
VCC
AB11
VCC
AB13
VCC
AB15
VCC
AB17
VCC
AB19
VCC
AB7
VCC
AB9
VCC
AC10
VCC
AC12
VCC
AC14
VCC
AC16
VCC
AC18
VCC
AC8
VCC
AD11
VCC
AD13
VCC
AD15
VCC
AD17
VCC
AD19
VCC
AD7
VCC
AD9
VCC
AE10
VCC
AE12
VCC
AE14
VCC
AE16
VCC
AE18
VCC
AE20
VCC
AE6
VCC
AE8
VCC
AF11
VCC
AF13
VCC
AF15
VCC
AF17
VCC
AF19
VCC
AF2
VCC
AF21
VCC
AF5
VCC
AF7
VCC
AD24
TESTHI0
AA2
TESTHI1
AC21
TESTHI2
AC20
TESTHI3
AC24
TESTHI4
AC23
TESTHI5
AA20
TESTHI6
AB22
TESTHI7
U6
TESTHI8
W4
TESTHI9
Y3
TESTHI10
A6
TESTHI11
AD25
TESTHI12
AA21
GTLREF
AA6
GTLREF
F20
GTLREF
F6
GTLREF
L24
COMP0
P1
COMP1
A22
RSVD
A7
RSVD
AD2
RSVD
AD3
RSVD
AE21
RSVD
AF3
12
RSVD
AF24
RSVD
AF25
RSVD
mPGA478
12
C379 220PF
12
C72 @220PF
1 2
L6
4.7UH_0805
1 2
L7
4.7UH_0805
RP25
1 2 3 4 5
10P8R-4.7K RP4
1 2 3 4 5
10P8R-4.7K
12
C392 220PF
12
C65
@220PF
A
C28 150U_D
CPU_VCC
4 4
3 3
TESTHI0 TESTHI1 TESTHI2 TESTHI3
CPU_VCC
TESTHI8 TESTHI9 TESTHI10 TESTHI11
CPU_VCC
CPU_VCC
2 2
R291
49.9_1%
1 2
CPU_GTLREF
12
R287
C388 1UF
100_1%
1 2
CPU_VCC
R62 @49.9_1%
1 2
H_GTLREF
12
R60 @100_1%
1 2
C76 @1UF
1 1
B
PLL ANALOG VOLTAGE
Northwood
POWER, GROUND, RESERVED SIGNALS
B
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
D10 A11 A13 A15 A17 A19 A21 A24 A26 A3 A9 AA1 AA11 AA13 AA15 AA17 AA19 AA23 AA26 AA4 AA7 AA9 AB10 AB12 AB14 AB16 AB18 AB20 AB21 AB24 AB3 AB6 AB8 AC11 AC13 AC15 AC17 AC19 AC2 AC22 AC25 AC5 AC7 AC9 AD1 AD10 AD12 AD14 AD16 AD18 AD21 AD23 AD4 AD8 AE11 AE13 AE15 AE17 AE19 AE22 AE24 AE26 AE7 AE9 AF1 AF10 AF12 AF14 AF16 AF18 AF20 AF6 AF8 B10 B12 B14 B16 B18 B20 B23 B26 B4 B8 C11 C13 C15 C17 C19 C2 C22 C25 C5 C7 C9 D12 D14 D16 D18 D20 D21 D24 D3
CPU_VCC
CPU_VCC
CPU_VCC
CPU_VCC
CPU_VCC
CPU_VCC
CPU_VCC
CPU_VCC
12
.1UF
12
1UF
12
C35
10UF_1206
12
C32
10UF_1206
12
C372 10UF_1206
12
C445
10UF_1206
12
C450
10UF_1206
12
C145
10UF_1206
+
C167 470U_E
2.5V
+
C163 470U_E
2.5V
C70
C107
12
C66
.1UF
12
C98 1UF
12
C34
10UF_1206
12
C31
10UF_1206
12
C373
10UF_1206
12
C369
10UF_1206
12
C451
10UF_1206
12
C135
10UF_1206
+
C168
470U_E
2.5V
+
C166 470U_E
2.5V
C
12
C73
.1UF
12
C88
1UF
12
C33
10UF_1206
12
C30
10UF_1206
12
C374
10UF_1206
12
C413
10UF_1206
12
C452
10UF_1206
12
C130
10UF_1206
C
12
C77
.1UF
12
C85
1UF
+
+
C164
470U_E
2.5V
C160
470U_E
2.5V
12
12
C84 .1UF
12
12
C78
1UF
1UF
12
C29
10UF_1206
12
C367
10UF_1206
12
C446
10UF_1206
12
C423
10UF_1206
12
C118
10UF_1206
PROPRIETARY NOTE
12
C87
C97
.1UF
.1UF
CPU_VCC
12
C74
C67
1UF
12
C366
10UF_1206
12
C442
10UF_1206
12
C447
10UF_1206
12
C148
10UF_1206
12
C428
10UF_1206
+
C19
470U_E
2.5V
+
C18
470U_E
2.5V
12
C106
.1UF
12
C370
10UF_1206
12
C443
10UF_1206
12
C448
10UF_1206
12
C147
10UF_1206
12
C418
10UF_1206
+
C359
330U_E
2.5V
+
C105 470U_E
2.5V
CPU_VCC
+
C159
470U_E
2.5V
D
CPU_VID0 CPU_VID1
CPU_VID2 CPU_VID3 CPU_VID4
CPUVID
12
C40 1UF
+
C161
470U_E
2.5V
AF9 B11 B13 B15 B17 B19
B7
B9 C10 C12 C14 C16 C18 C20
C8 D11 D13 D15 D17 D19
D7
D9 E10 E12 E14 E16 E18 E20
E8
F11 F13 F15 F17 F19
AE5 AE4 AE3 AE2 AE1
AF4
Y5 Y25 Y22
Y2
W6
W3 W24 W21
V4 V26 V23
V1
U5 U25 U22
+
C162
470U_E
2.5V
F9
U23C
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
VID0 VID1 VID2 VID3 VID4
VCCVID
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
mPGA478
VID[0..4]41
Northwood
POWER, GROUND AND NC
+
C360
330U_E
2.5V
CPU_VID[0..4]
CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3
CPU_VID4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
CPU_VCC
12
12
C103
C41
.1UF
.1UF
12
C371
10UF_1206
12
C444
10UF_1206
CPUVID41
12
C449
10UF_1206
12
C146
10UF_1206
12
C410
10UF_1206
+
C165
470U_E
2.5V
+
C468 330U_E
2.5V
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
RP3
1 8 2 7 3 6 4 5
8P4R-1K
R17 1K
E
D6 D8 E1 E11 E13 E15 E17 E19 E23 E26 E4 E7 E9 F10 F12 F14 F16 F18 F2 F22 F25 F5 F8 G21 G24 G3 G6 H1 H23 H26 H4 J2 J22 J25 J5 K21 K24 K3 K6 L1 L23 L26 L4 M2 M22 M25 M5 N21 N24 N3 N6 P2 P22 P25 P5 R1 R23 R26 R4 T21 T24 T3 T6 U2
+3V
12
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1391
Size Do cum e nt Number R e v
401211
期二 十一月
D
Dat e : Sheet
344¬P , 26, 2002
E
1B
of
A
B
C
D
E
MC-1/3(GTL+,AGP,HUB)
HD#[0 ..6 3 ]2
1 1
2 2
DSTBN0#2 DSTBN1#2 DSTBN2#2
DSTBN3#2
3 3
DSTBP0#2 DSTBP1#2 DSTBP2#2 DSTBP3#2 DBI0#2 DBI1#2
DBI2#2
DBI3#2
CPU_VCC
4 4
HD#[0..63] HA#[3..31]
C81 .1UF
AC11 AC12
AE10
AC10 AE12
AF10 AG11 AG10
AH11 AG12
AE13
AF12 AG13
AH13
AC14
AF14 AG14
AE14 AG15 AG16 AG17
AH15
AC17
AF16
AE15
AH17
AD17
AE16
AE11
AC15
AD11
AC16
AD15
AA2 AB5 AA5 AB3 AB4 AC5 AA3 AA6 AE3 AB7 AD7 AC7 AC6 AC3 AC8 AE2 AG5 AG2 AE8 AF6 AH2 AF3 AG3 AE5 AH7 AH3 AF4 AG8 AG7 AG6 AF8 AH5
AE9 AC9
AD9 AG9
AD4 AE6
AD3 AE7
AD5 AG4 AH9
BROOKDALE
A
U22A
HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63
DSTBN0# DSTBN1# DSTBN2# DSTBN3# DSTBP0# DSTBP1# DSTBP2# DSTBP3# DBI0# DBI1# DBI2# DBI3#
C82 .1UF
HOST
MCH_GTLREF
ADSTB0# ADSTB1#
CPURST#
12
12
R63
49.9_1%
R56 100_1%
HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8
HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4
RS#0
RS#1
RS#2
BCLK#
BCLK
HLOCK# DEFER#
ADS#
BNR#
BPRI#
DBSY#
DRDY#
HIT#
HITM#
HTRDY#
BR0#
RCOMP0 RCOMP1
SWNG0 SWNG1
HVREF HVREF HVREF HVREF HVREF
SWNG
T4 T5 T3 U3 R3 P7 R2 P4 R6 P5 P3 N2 N7 N3 K4 M4 M3 L3 L5 K3 J2 M5 J3 L2 H4 N5 G2 M6 L7
U6 T7 R7 U5 U2
W2 W7 W6
R5 N6
K8 J8
AE17 W5 Y4 V3 W3 Y7 V5 V4 Y5 Y3 U7 V7
AC2 AC13 AA7 AD13
M7 R8 Y8 AB11 AB17
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4
RS#0 RS#1 RS#2
RCOMP0 RCOMP1
CPU_VCC
HA#[3..31] 2
HREQ#[0..4]
RS#[0..2]
ADSTB0# 2 ADSTB1# 2
CLK_HMCH# 13 CLK_HMCH 13
CPURST# 2 HLOCK# 2 DEFER# 2 ADS# 2 BNR# 2 BPRI# 2 DBSY# 2 DRDY# 2 HIT# 2 HITM# 2 HTRDY# 2 BREQ0# 2
R270 22
1 2
R20 22
1 2
SWNG
MCH_GTLREF
12
R18 300_1%
12
R19 150_1%
B
C43
0.01UF
HREQ#[0 ..4 ] 2
RS#[0..2] 2
PROPRIETARY NOTE
R273 40.2_1%
C83
0.1UF
GAD[0..31]
GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8 GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31
GFRAME# GDEVSEL# GIRDY# GTRDY# GSTOP# GPAR GREQ# GGNT# PIPE#
AD_STB0 AD_STB0# AD_STB1 AD_STB1# SBSTB SBSTB#
RBF# WBF#
AGPREF
1 2
CLK_66M_MCH
C116
0.1UF
GRCOMP
1 2
C109
0.1UF
R27 R28
R25
U27 U28
U23 U24
U25
AA28 AB25 AB27 AA27 AB26
AB23 AA24 AA25 AB24 AC25 AC24 AC22 AD24
AA23
W28 W27 W24 W23
W25 AG24 AH25 AF22
R24
R23 AC27 AC28 AF27 AF26
AE22 AE23
AA21 AD25 AD26 AD27
12
12
T25 T26
T27
V26 V27 T23
T24
V24 Y27 Y26
Y23
V25 V23 Y25
Y24
P22
R347 10
C473 10PF
G_AD0 G_AD1 G_AD2 G_AD3 G_AD4 G_AD5 G_AD6 G_AD7 G_AD8 G_AD9 G_AD10 G_AD11 G_AD12 G_AD13 G_AD14 G_AD15 G_AD16 G_AD17 G_AD18 G_AD19 G_AD20 G_AD21 G_AD22 G_AD23 G_AD24 G_AD25 G_AD26 G_AD27 G_AD28 G_AD29 G_AD30 G_AD31
G_C/BE#0 G_C/BE#1 G_C/BE#2 G_C/BE#3
G_FRAME# G_DEVSEL# G_IRDY# G_TRDY# G_STOP# G_PAR G_REQ# G_GNT# PIPE#
AD_STB0 AD_STB#0 AD_STB1 AD_STB#1 SB_STB SB_STB#
RBF# WBF#
AGPREF GRCOMP NC NC
66IN
HUBREF
C110
0.1UF
1 2
U22C
BROOKDALE
+1_8VS
1 2
12
12
R73 150_1%
R69
150_1%
AGP
HUB
1 2
D
TESTIN#
HIREF HISTB
HISTB#
HLRCOMP
RSTIN#
C117
0.01UF
RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
HI10
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
HI0 HI1 HI2 HI3 HI4 HI5 HI6 HI7 HI8 HI9
ST0 ST1 ST2
H26 G9 G10 G16 G17 H6 H7 J23 H27 K23 K25 J25
AC18 AC20 AC21 AC23 AC26 AD6 AD8 AD10 AD12 AD14 AD16 AD19 AD22 AE1 AE4 AE18 AE20 AE29
P25 P24 N27 P23 M26 M25 L28 L27 M27 N28 M24 P26 N25 N24
+GMCH_HLCOMP
P27
AH28 AH27 AG28 AG27 AE28 AE27 AE24 AE25
AG25 AF24 AG26 J27
R315 0
HL0 HL1 HL2 HL3 HL4 HL5 HL6 HL7 HL8 HL9 HL10 HUBREF HL_STB HL_STB#
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
ST0 ST1 ST2
1 2
ST0 ST1CLK_66M_MCH GPAR AD_STB0# AD_STB1# SBSTB#
GAD[0..31]14
GC/BE#014 GC/BE#114 GC/BE#214 GC/BE#314
GFRAME#14
GDEVSEL#14
GIRDY#14
GTRDY#14
GSTOP#14
GPAR14 GREQ#14 GGNT#14
AD_STB014
AD_STB0#14
AD_STB114
AD_STB1#14
SBSTB14
SBSTB#14
RBF#14
AGPREF14
CLK_66M_MCH13
+1_5VS
12
R57 1K
AGPREF
12
R58 1K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
HUBREF 10 HL_STB 10
1 2
R304
40.2_1%
R523 2K R25 @2K R285 100K R299 6.8K R277 6.8K R275 6.8K
Title
Size Docu ment Number Re v
B
Date: Sheet
HL_STB# 10
+1_8VS
SBA[0..7]
HL[0..10 ]
ST0 14 ST1 14 ST2 14 PCIRST# 10,14,19,20,21,23,25,27,31,34
GTRDY#
R289 6.8K
GIRDY#
R281 6.8K
GDEVSEL#
12 12 12 12 12 12
GSTOP# GFRAME# GREQ# GGNT# SBSTB RBF# PIPE#
WBF# AD_STB0 AD_STB1 SBSTB ST1
R279 6.8K R292 6.8K R278 6.8K R269 6.8K R268 6.8K R272 @6.8K R22 6.8K R21 6.8K R23 6.8K R297 @6.8K R276 @6.8K R271 @6.8K R24 @10K
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1391 401211
星期二 十一
?26, 2002
E
SBA[0..7] 14 HL[0..10] 10
12 12 12 12 12 12 12 12 12 12 12 12 12 12 12
of
444, 
+1_5VS
1B
A
B
C
D
E
MCH-2/3(SDRAM)
1 1
2 2
3 3
DDR_SMA[0..12]7
DDR_CB[0..7]7
DDR_SMA[0..12]
DDR_SBS07 DDR_SBS17
DDR_CLK07 DDR_CLK0#7 DDR_CLK17 DDR_CLK1#7 DDR_CLK27 DDR_CLK2#7 DDR_CLK38 DDR_CLK3#8 DDR_CLK48 DDR_CLK4#8 DDR_CLK58 DDR_CLK5#8
DDR_SRAS#7 DDR_SCAS#7 DDR_SWE#7
DDR_CKE07 DDR_CKE17 DDR_CKE28 DDR_CKE38
DDR_SCS#07 DDR_SCS#17 DDR_SCS#28 DDR_SCS#38
DDR_SDQS07 DDR_SDQS17 DDR_SDQS27 DDR_SDQS37 DDR_SDQS47 DDR_SDQS57 DDR_SDQS67 DDR_SDQS77 DDR_SDQS87
DDR_CB[0..7]
Length must equal
1.0"
DDR_SMA0 DDR_SMA1 DDR_SMA2 DDR_SMA3 DDR_SMA4 DDR_SMA5 DDR_SMA6 DDR_SMA7 DDR_SMA8 DDR_SMA9 DDR_SMA10 DDR_SMA11 DDR_SMA12
DDR_SBS0 DDR_SBS1
DDR_SRAS# DDR_SCAS# DDR_SWE#
DDR_CKE0 DDR_CKE1 DDR_CKE2 DDR_CKE3
DDR_SCS#0 DDR_SCS#1 DDR_SCS#2 DDR_SCS#3
DDR_SDQS0 DDR_SDQS1 DDR_SDQS2 DDR_SDQS3 DDR_SDQS4 DDR_SDQS5 DDR_SDQS6 DDR_SDQS7 DDR_SDQS8
DDR_CB0 DDR_CB1 DDR_CB2 DDR_CB3 DDR_CB4 DDR_CB5 DDR_CB6 DDR_CB7
RDCLK
C631
1 2
@10P_0402
E12 F17 E16 G18 G19 E18 F19 G21 G20 F21 F13 E20 G22
G12 G13
E14 F15
J24
G25
G6
G7 G15 G14 E24 G24
H5
F5 F11
G8 G11
G23 E22 H23 F23
E9
F7
F9
E7 F26
C26 C23 B19 D12
C8
C5
E3 E15
C16 D16 B15 C14 B17 C17 C15 D14
G3
H3
U22B
SMAA0 SMAA1 SMAA2 SMAA3 SMAA4 SMAA5 SMAA6 SMAA7 SMAA8 SMAA9 SMAA10 SMAA11 SMAA12
SBS0 SBS1
SCK0 SCK#0 SCK1 SCK#1 SCK2 SCK#2 SCK3 SCK#3 SCK4 SCK#4 SCK5 SCK#5
SRAS# SCAS# SWE#
SCKE0 SCKE1 SCKE2 SCKE3
SCS#0 SCS#1 SCS#2 SCS#3
SDQS0 SDQS1 SDQS2 SDQS3 SDQS4 SDQS5 SDQS6 SDQS7 SDQS8
SCB0 SCB1 SCB2 SCB3 SCB4 SCB5 SCB6 SCB7
RCVENIN# RCVENOUT#
BROOKDALE
DDR-MEMORY
SMD0 SMD1 SMD2 SMD3 SMD4 SMD5 SMD6 SMD7 SMD8
SMD9 SMD10 SMD11 SMD12 SMD13 SMD14 SMD15 SMD16 SMD17 SMD18 SMD19 SMD20 SMD21 SMD22 SMD23 SMD24 SMD25 SMD26 SMD27 SMD28 SMD29 SMD30 SMD31 SMD32 SMD33 SMD34 SMD35 SMD36 SMD37 SMD38 SMD39 SMD40 SMD41 SMD42 SMD43 SMD44 SMD45 SMD46 SMD47 SMD48 SMD49 SMD50 SMD51 SMD52 SMD53 SMD54 SMD55 SMD56 SMD57 SMD58 SMD59 SMD60 SMD61 SMD62 SMD63
SRCOMP
SDREF SDREF
DDR_SDQ0
G28
DDR_SDQ1
F27
DDR_SDQ2
C28
DDR_SDQ3
E28
DDR_SDQ4
H25
DDR_SDQ5
G27
DDR_SDQ6
F25
DDR_SDQ7
B28
DDR_SDQ8
E27
DDR_SDQ9
C27
DDR_SDQ10
B25
DDR_SDQ11
C25
DDR_SDQ12
B27
DDR_SDQ13
D27
DDR_SDQ14
D26
DDR_SDQ15
E25
DDR_SDQ16
D24
DDR_SDQ17
E23
DDR_SDQ18
C22
DDR_SDQ19
E21
DDR_SDQ20
C24
DDR_SDQ21
B23
DDR_SDQ22
D22
DDR_SDQ23
B21
DDR_SDQ24
C21
DDR_SDQ25
D20
DDR_SDQ26
C19
DDR_SDQ27
D18
DDR_SDQ28
C20
DDR_SDQ29
E19
DDR_SDQ30
C18
DDR_SDQ31
E17
DDR_SDQ32
E13
DDR_SDQ33
C12
DDR_SDQ34
B11
DDR_SDQ35
C10
DDR_SDQ36
B13
DDR_SDQ37
C13
DDR_SDQ38
C11
DDR_SDQ39
D10
DDR_SDQ40
E10
DDR_SDQ41
C9
DDR_SDQ42
D8
DDR_SDQ43
E8
DDR_SDQ44
E11
DDR_SDQ45
B9
DDR_SDQ46
B7
DDR_SDQ47
C7
DDR_SDQ48
C6
DDR_SDQ49
D6
DDR_SDQ50
D4
DDR_SDQ51
B3
DDR_SDQ52
E6
DDR_SDQ53
B5
DDR_SDQ54
C4
DDR_SDQ55
E5
DDR_SDQ56
C3
DDR_SDQ57
D3
DDR_SDQ58
F4
DDR_SDQ59
F3
DDR_SDQ60
B2
DDR_SDQ61
C2
DDR_SDQ62
E2
DDR_SDQ63
G5
SRCOMP
J28 J9
1 2
J21
R525 0_0603
DDR _ S DQ[0..63]
12mil
1 2
R524 30_0603_1%
SDREF
15mil
12
C7220.1U_0402_X7R
DDR_SDQ[0..63] 7
C630
1 2
0.1U_0402_X7R
+1.25VS
C735
10UF_1206_6.3V
SDREF
+2.5V
VS
15mil
12
84
5
+
7
6
-
LM358 U60B
84
3
+
1
2
-
LM358 U60A
C731
R562
R563
0.1UF_16V
0
0
12 12
12
R560
100K_0.5%
12
R561
100K_0.5%
C732
0.01UF
4 4
Compa l E l e c t r onics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
A
B
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
SCHEMATIC, M/B LA-1391
Size Docu ment Number Re v
B
401211
Date: Sheet
星期二 十一
?26, 2002
E
of
544, 
1B
A
B
C
D
E
MCH-3/3(Power)
U22D
R22
W22
W29 AA22 AA26 AB21
AC29 AD21 AD23 AE26 AF23 AG29
AJ25
M22
AB18 AB20 AC19 AD18 AD20 AE19 AE21 AF18 AF20 AG19 AG21 AG23
AJ19 AJ21 AJ23
AB19 AB22
AC1
AC4
AF21 AF25
AG1
AG18 AG20 AG22 AH19 AH21 AH23
AJ27 AJ17
R29 U22 U26
N14 N16 P13 P15 P17 R14 R16 T15 U14 U16
L25 L29
N23 N26
A13 A17 A21 A25
C29 D11
D15 D19 D23 D25
F10 F14 F18 F22
G1 G4
G29 H10
H12 H14 H16 H18 H20 H22 H24
K22 K24 K26
L23
M8
AA9 AB8
AJ3 AJ5 AJ7
A5 A9
C1 D7
F6
H8
J5 J7
K6
U8
BROOKDALE
VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5
VCC1_8 VCC1_8 VCC1_8 VCC1_8 VCC1_8
VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM
VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
+1_5VS
1 1
+1_8VS
+2.5V
2 2
3 3
CPU_VCC
4 4
A
VCC1_5 VCC1_5
VSS VSS
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
POWER/GND
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
B
T13 T17
U13 U17
A3 A7 A11 A15 A19 A23 A27 D5 D9 D13 D17 D21 E1 E4 E26 E29 F8 F12 F16 F20 F24 G26 H9 H11 H13 H15 H17 H19 H21 J1 J4 J6 J22 J26 J29 K5 K7 K27 L1 L4 L6 L8 L22 L24 L26 M23 N1 N4 N8 N13 N15 N17 N22 N29 P6 P8 P14 P16 R1 R4 R13 R15 R17 R26 T6 T8 T14 T16 T22 U1 U4 U15 U29 V6 V8 V22 W1 W4 W8 W26 Y6 Y22 AA1 AA4 AA8 AA29 AB6 AB9 AB10 AB12 AB13 AB14 AB15 AB16 AF5 AF7 AF9 AF11 AF13 AF15 AF17 AF19 AJ9 AJ11 AJ13 AJ15
VCCA0 VCCA1
VSSA0 VSSA1
PROPRIETARY NOTE
VCCA0
C391 33U_D
VSSA0
VCCA1
C378 33U_D
VSSA1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+
+
1 2
L31 4.7UH_0805
1 2
L26 4.7UH_0805
12
C86
+
150UF_E
6.3V
C
+1_5VS
+1_5VS
CPU_VCC
C42
+
22UF_10V_1206
+2.5V
12
+
+1_5VS
C92
+
22UF_10V_1206
C425
150UF_E
6.3V
.1UF_0402
C123
4.7UF_0805
.1UF_0402
C47
C101
.1UF_0402
C153
.1UF_0402
.1UF_0402
C46
C95
+1_8VS
+
.1UF_0402
C152
.1UF_0402
.1UF_0402
C94 22UF_10V_1206
C48
C68
.1UF_0402
C126
.1UF_0402
C91
C108
.1UF_0402
.1UF_0402
D
C120 .1UF_0402
C57
.1UF_0402
C149
C112
.1UF_0402
C114 .1UF_0402
.1UF_0402
C125
.1UF_0402
.1UF_0402
C56
C111
C113 .1UF_0402
C59
.1UF_0402
C151
.1UF_0402
C100
.1UF_0402
.1UF_0402
.1UF_0402
C69
.1UF_0402
C154
C122
.1UF_0402
星期二 十一
C124
.1UF_0402
?26, 2002
.1UF_0402
C90 .1UF_0402
Compa l E l e c t r onics, Inc.
Title
SCHEMATIC, M/B LA-1391
Size Docu ment Number Re v
B
401211
Date: Sheet
C127
.1UF_0402
C150
.1UF_0402
E
C115
C121
C134
.1UF_0402
644, 
C144
.1UF_0402
1B
of
A
DDR_SDQ0 DDR_SDQ4
DDR_SDQ5 DDR_SDQ1
DDR_SDQS0
1 1
Layout note
Place these resistor closely DIMM0, all trace length<750mil
2 2
3 3
DDR_SDQ[0..63]5 DDR_SD QS [0 ..8 ]5
4 4
A
DDR_SDQ6
DDR_SDQ3 DDR_SDQ2
DDR_SDQ7 DDR_SDQ8
DDR_SDQ13 DDR_SDQ12
DDR_SDQ15 DDR_SDQS1
DDR_SDQ9 DDR_SDQ11
DDR_SDQ14 DDR_SDQ10
DDR_SDQ16 DDR_SDQ20
DDR_SDQ21 DDR_SDQ17
DDR_SDQS2 DDR_SDQ18
DDR_SDQ23 DDR_SDQ22
DDR_SDQ19 DDR_SDQ24
DDR_SDQ29 DDR_SDQ25
DDR_SDQ28 DDR_SDQS3
DDR_SDQ[0..63]
DDR_CB[0..7]5
DDR_CB[0..7] DDR _ S DQS[0..8]
DDR_SDQ51 DDR_SDQ59
DDR_SDQ63 DDR_SDQ58
DDR_SDQ62 DDR_SDQS7
DDR_SDQ57 DDR_SDQ61
DDR_SDQ60 DDR_DQ60 DDR_SDQ56 DDR_DQ56
B
RP53 4P2R_33 1 4 2 3
RP55 4P2R_33 1 4 2 3
RP57 4P2R_33 1 4 2 3
RP60 4P2R_33 1 4 2 3
RP63 4P2R_33 1 4 2 3
RP66 4P2R_33 1 4 2 3
RP69 4P2R_33 1 4 2 3
RP72 4P2R_33 1 4 2 3
RP75 4P2R_33 1 4 2 3
RP77 4P2R_33 1 4 2 3
RP79 4P2R_33 1 4 2 3
RP81 4P2R_33 1 4 2 3
RP83 4P2R_33 1 4 2 3
RP85 4P2R_33 1 4 2 3
RP87 4P2R_33 1 4 2 3
RP90 4P2R_33 1 4 2 3
RP95 4P2R_33 1 4 2 3
RP97 4P2R_33 1 4 2 3
RP99 4P2R_33 1 4 2 3
RP101 4P2R_33 1 4 2 3
RP103 4P2R_33 1 4 2 3
B
DDR_DQ0 DDR_DQ4
DDR_DQ5 DDR_DQ1
DDR_DQS0 DDR_DQ6
DDR_DQ3 DDR_DQ2
DDR_DQ7 DDR_DQ8
DDR_DQ13 DDR_DQ12
DDR_DQ15 DDR_DQS1
DDR_DQ9 DDR_DQ11
DDR_DQ14 DDR_DQ10
DDR_DQ16 DDR_DQ20
DDR_DQ21 DDR_DQ17
DDR_DQS2 DDR_DQ18
DDR_DQ23 DDR_DQ22
DDR_DQ19 DDR_DQ24
DDR_DQ29 DDR_DQ25
DDR_DQ28 DDR_DQS3
DDR_DQ51 DDR_DQ59
DDR_DQ63 DDR_DQ58
DDR_DQ62 DDR_DQS7
DDR_DQ57 DDR_DQ61
DDR_SDQ26 DDR_SDQ27
DDR_SDQ30 DDR_SDQ31
DDR_CB5 DDR_CB4
DDR_CB0 DDR_CB2
DDR_SDQS8 DDR_CB6
DDR_CB1 DDR_CB7
DDR_CB3
DDR_SDQ32 DDR_SDQ36
DDR_SDQ37 DDR_SDQ33
DDR_SDQS4 DDR_SDQ39
DDR_SDQ38 DDR_SDQ34
DDR_SDQ44 DDR_SDQ35
DDR_SDQ40 DDR_SDQ41
DDR_SDQ45 DDR_SDQS5
DDR_SDQ42 DDR_SDQ43
DDR_SDQ47 DDR_SDQ46
DDR_SDQ52 DDR_SDQ49
DDR_SDQ48 DDR_SDQ53
DDR_SDQS6 DDR_SDQ55
DDR_SDQ50 DDR_SDQ54
C
RP54 4P2R_33 1 4 2 3
RP56 4P2R_33 1 4 2 3
RP58 4P2R_33 1 4 2 3
RP61 4P2R_33 1 4 2 3
RP64 4P2R_33 1 4 2 3
RP67 4P2R_33 1 4 2 3
RP70 4P2R_33 1 4 2 3
RP73 4P2R_33 1 4 2 3
RP76 4P2R_33 1 4 2 3
RP78 4P2R_33 1 4 2 3
RP80 4P2R_33 1 4 2 3
RP82 4P2R_33 1 4 2 3
RP84 4P2R_33 1 4 2 3
RP86 4P2R_33 1 4 2 3
RP88 4P2R_33 1 4 2 3
RP91 4P2R_33 1 4 2 3
RP93 4P2R_33 1 4 2 3
RP94 4P2R_33 1 4 2 3
RP96 4P2R_33 1 4 2 3
RP98 4P2R_33 1 4 2 3
C
DDR_DQ26 DDR_DQ27
DDR_DQ30 DDR_DQ31
DDR_F_CB5 DDR_F_CB4
DDR_F_CB0 DDR_F_CB2
DDR_DQS8 DDR_F_CB6
DDR_F_CB1 DDR_F_CB7
DDR_F_CB3
DDR_DQ32 DDR_DQ36
DDR_DQ37 DDR_DQ33
DDR_DQS4 DDR_DQ39
DDR_DQ38 DDR_DQ34
DDR_DQ44 DDR_DQ35
DDR_DQ40 DDR_DQ41
DDR_DQ45 DDR_DQS5
DDR_DQ42 DDR_DQ43
DDR_DQ47 DDR_DQ46
DDR_DQ52 DDR_DQ49
DDR_DQ48 DDR_DQ53
DDR_DQS6 DDR_DQ55
DDR_DQ50 DDR_DQ54
PROPRIETARY NOTE
D
DDR_DQ4 DDR_DQ5
DDR_DQS0 DDR_DQ3
DDR_DQ7 DDR_DQ12
DDR_DQ15 DDR_DQS1
DDR_DQ11 DDR_DQ10
DDR_CLK15 DDR_CLK1#5
DDR_DQ20 DDR_DQ17
DDR_DQS2 DDR_DQ22
DDR_DQ19 DDR_DQ25
DDR_DQ28 DDR_DQS3
DDR_DQ27 DDR_DQ31
DDR_F_CB4 DDR_F_CB2
DDR_DQS8 DDR_F_CB7
DDR_F_CB3
DDR_CLK05 DDR_CLK0#5
DDR_CKE15
DDR_SCS#05
DIMM_SMDATA8,13
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
DDR_CKE1
DDR_F_SMA12 DDR_F_SMA9
DDR_F_SMA7 DDR_F_SMA5 DDR_F_SMA3 DDR_F_SMA1
DDR_F_SMA10 DDR_F_SBS0 DDR_F_SWE#
DDR_SCS#0
DDR_DQ36 DDR_DQ33
DDR_DQS4 DDR_DQ39
DDR_DQ38 DDR_DQ44
DDR_DQ40 DDR_DQS5
DDR_DQ43 DDR_DQ47
DDR_DQ52 DDR_DQ48
DDR_DQS6 DDR_DQ55
DDR_DQ50 DDR_DQ59
DDR_DQ63 DDR_DQS7
DDR_DQ57 DDR_DQ60
DIMM_SMCLK8,13
E
+2.5V +2.5V
JP29
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
+3VS
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
DDR-SODIMM_200_Normal
DU/RESET#
VREF
VSS DQ4 DQ5 VDD DM0 DQ6 VSS DQ7
DQ12
VDD
DQ13
DM1
VSS DQ14 DQ15
VDD
VDD
VSS
VSS
DQ20 DQ21
VDD
DM2 DQ22
VSS DQ23 DQ28
VDD DQ29
DM3
VSS DQ30 DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
VSS
VSS
VDD
VDD CKE0
DU/BA2
VSS
VDD
BA1 RAS# CAS#
VSS DQ36 DQ37
VDD
DM4 DQ38
VSS DQ39 DQ44
VDD DQ45
DM5
VSS DQ46 DQ47
VDD
CK1#
CK1
VSS DQ52 DQ53
VDD
DM6 DQ54
VSS DQ55 DQ60
VDD DQ61
DM7
VSS DQ62 DQ63
VDD
SA0
SA1
SA2
F
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100
A11
102
A8
104 106
A6
108
A4
110
A2
112
A0
114 116 118 120 122
S1#
124
DU
126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DU
DIMM0(STD)
Top side
E
F
DDR_DQ0 DDR_DQ1
DDR_DQ6 DDR_DQ2
DDR_DQ8 DDR_DQ13
DDR_DQ9 DDR_DQ14
DDR_DQ16 DDR_DQ21
DDR_DQ18 DDR_DQ23
DDR_DQ24 DDR_DQ29
DDR_DQ26 DDR_DQ30
DDR_F_CB5 DDR_F_CB0
DDR_F_CB6 DDR_F_CB1
DDR_CKE0
DDR_F_SMA11 DDR_F_SMA8
DDR_F_SMA6 DDR_F_SMA4 DDR_F_SMA2 DDR_F_SMA0
DDR_F_SBS1 DDR_F_SRAS# DDR_F_SCAS#
DDR_SCS#1
DDR_DQ32 DDR_DQ37
DDR_DQ34 DDR_DQ35
DDR_DQ41 DDR_DQ45
DDR_DQ42 DDR_DQ46
DDR_DQ49 DDR_DQ53
DDR_DQ54 DDR_DQ51
DDR_DQ58 DDR_DQ62
DDR_DQ61 DDR_DQ56
DDR_SBS15
DDR_SBS05 DDR_SWE#5
DDR_SCAS#5 DDR_SRAS#5
SDREF_DIMM
12
C632 .1UF_0402
G
R526
DDR_DQ[0..63] DDR_F_CB [0..7] DDR_DQS[0..8]
12
SDREF
0_0402
DDR_SMA[0..12] 5
DDR_SMA12 DDR_SMA9
DDR_SMA8 DDR_SMA11
DDR_SMA7 DDR_SMA5
DDR_SMA4 DDR_SMA6
DDR_SMA3 DDR_SMA1
DDR_SMA0 DDR_SMA2
DDR_SMA10 DDR_F_SMA10
H
DDR_DQ[0..63] 8 DDR_F_CB[0..7] 8 DDR_DQS[0..8] 8
RP59 4P2R_0 1 4 2 3
RP62 4P2R_0 1 4 2 3
RP65 4P2R_0 1 4 2 3
RP68 4P2R_0 1 4 2 3
RP71 4P2R_0 1 4 2 3
RP74 4P2R_0 1 4 2 3
R527 0_0402
1 2
DDR_F_SMA[0..12]8
DDR_F_SMA12 DDR_F_SMA9
DDR_F_SMA8 DDR_F_SMA11
DDR_F_SMA7 DDR_F_SMA5
DDR_F_SMA4 DDR_F_SMA6
DDR_F_SMA3 DDR_F_SMA1
DDR_F_SMA0 DDR_F_SMA2
Layout note
DDR_CKE0 5
Place these resistor closely DIMM0, all trace length<=750mil
Layout note Place these resistor
closely DIMM0,
DDR_SCS#1 5
DDR_CLK2# 5 DDR_CLK2 5
R528 0_0402
DDR_SBS1 DDR_F_SBS1
DDR_SBS0 DDR_SWE#
DDR_SCAS# DDR_SRAS# DDR_F_SRAS#
Title
Size Docu ment Number Re v
Date: Sheet
1 2
RP100 4P2R_0
1 4 2 3
RP102 4P2R_0
1 4 2 3
SCHEM AT IC , M/ B LA- 1391
401211
星期二 十一
G
all trace length Max=1.3"
RP89 4P2R_47
DDR_CKE1
1 4
DDR_CKE0
2 3
RP92 4P2R_47
DDR_SCS#0
1 4
DDR_SCS#1
2 3
Layout note
Place these resistor closely DIMM0, all trace length<=750mil
DDR_F_SBS1 8
DDR_F_SBS0 DDR_F_SWE#
DDR_F_SCAS#
DDR_F_SBS0 8 DDR_F_SWE# 8
DDR_F_SCAS# 8 DDR_F_SRAS# 8
Compa l E l e c t r onics, Inc.
?26, 2002
+1.25VS
of
744, 
H
1B
A
+1.25VS +1.25VS
RP104 4P2R_47
DDR_DQ4
1 4
DDR_DQ0
2 3
RP107 4P2R_47
DDR_DQ5
1 4
DDR_DQ1
2 3
DDR_DQS0 DDR_DQ6
DDR_DQ3 DDR_DQ2
DDR_DQ7 DDR_DQ8
DDR_DQ12 DDR_DQ13
DDR_DQS1 DDR_DQ15
DDR_DQ11 DDR_DQ9
DDR_DQ10 DDR_DQ14
DDR_DQ20 DDR_DQ16
DDR_DQ17 DDR_DQ21
DDR_DQ18 DDR_DQS2
DDR_DQ22 DDR_DQ23
DDR_DQ19 DDR_DQ24
DDR_DQ25 DDR_DQ29
DDR_DQS3 DDR_DQ28
RP110 4P2R_47 1 4 2 3
RP114 4P2R_47 1 4 2 3
RP118 4P2R_47 1 4 2 3
RP122 4P2R_47 1 4 2 3
RP126 4P2R_47 1 4 2 3
RP130 4P2R_47 1 4 2 3
RP134 4P2R_47 1 4 2 3
RP137 4P2R_47 1 4 2 3
RP140 4P2R_47 1 4 2 3
RP143 4P2R_47 1 4 2 3
RP145 4P2R_47 1 4 2 3
RP147 4P2R_47 1 4 2 3
RP149 4P2R_47 1 4 2 3
RP151 4P2R_47 1 4 2 3
1 1
2 2
3 3
RP105 4P2R_47
14 23
RP108 4P2R_47
14 23
RP111 4P2R_47
14 23
RP115 4P2R_47
14 23
RP119 4P2R_47
14 23
RP123 4P2R_47
14 23
RP127 4P2R_47
14 23
RP131 4P2R_47
14 23
RP135 4P2R_47
14 23
RP138 4P2R_47
14 23
RP141 4P2R_47
14 23
RP144 4P2R_47
14 23
RP146 4P2R_47
14 23
RP148 4P2R_47
14 23
RP150 4P2R_47
14 23
RP152 4P2R_47
14 23
DDR_DQ27 DDR_DQ26
DDR_DQ31 DDR_DQ30
DDR_F_CB4 DDR_F_CB5
DDR_F_CB2 DDR_F_CB0
DDR_F_CB6 DDR_DQS8
DDR_F_CB1 DDR_F_CB7
DDR_F_CB3
DDR_DQ36 DDR_DQ32
DDR_DQ37 DDR_DQ33
DDR_DQ39 DDR_DQS4
DDR_DQ38 DDR_DQ34
DDR_DQ35 DDR_DQ44
DDR_DQ41 DDR_DQ40
DDR_DQS5 DDR_DQ45
DDR_DQ42 DDR_DQ43
DDR_DQ46 DDR_DQ47
RP106 4P2R_47
14 23
RP109 4P2R_47
14 23
RP112 4P2R_47
14 23
RP116 4P2R_47
14 23
RP120 4P2R_47
14 23
RP124 4P2R_47
14 23
RP128 4P2R_47
14 23
RP132 4P2R_47
14 23
RP136 4P2R_47
14 23
DDR_DQ49 DDR_DQ52
DDR_DQ53 DDR_DQ48
DDR_DQ55 DDR_DQS6
DDR_DQ54 DDR_DQ50
DDR_DQ51 DDR_DQ59
DDR_DQ58 DDR_DQ63
DDR_DQ62 DDR_DQS7
DDR_DQ61 DDR_DQ57
DDR_DQ56 DDR_DQ60
Layout note Place these resistor
closely DIMM1, all trace length<=800mil
4 4
B
DDR_F_CB[0..7] 7
DDR_DQ[0..63]
DDR_DQS[0..8] 7 DDR_DQ[0..63] 7 DDR_F_SMA[0..12] 7
C
DDR_CLK45 DDR_CLK4#5
DDR_CLK35 DDR_CLK3#5
DDR_F_SBS07 DDR_F_SWE#7
DIMM_SMDATA7,13 DIMM_SMCLK7,13
+2.5V +2.5V
JP30
1
VREF
3 DDR_DQ0 DDR_DQ4 DDR_DQ1
DDR_DQS0 DDR_DQ6
DDR_DQ2 DDR_DQ8
DDR_DQ13 DDR_DQS1
DDR_DQ9 DDR_DQ14
DDR_DQ16 DDR_DQ21
DDR_DQS2 DDR_DQ18
DDR_DQ23 DDR_DQ24
DDR_DQ29 DDR_DQS3
DDR_DQ26 DDR_DQ30
DDR_F_CB5 DDR_F_CB0 DDR_F_CB2
DDR_DQS8 DDR_F_CB6
DDR_F_CB1
DDR_CKE3 DDR_CKE2
DDR_F_SMA12 DDR_F_SMA9
DDR_F_SMA7 DDR_F_SMA5 DDR_F_SMA3 DDR_F_SMA1
DDR_F_SMA10 DDR_F_SBS0 DDR_F_SWE# DDR_SCS#2 DDR_SCS#3
DDR_DQ32 DDR_DQ37
DDR_DQS4 DDR_DQ34
DDR_DQ35 DDR_DQ41
DDR_DQ45 DDR_DQS5
DDR_DQ42 DDR_DQ46
DDR_DQ49 DDR_DQ53
DDR_DQS6 DDR_DQ54
DDR_DQ51 DDR_DQ58
DDR_DQ62 DDR_DQS7
DDR_DQ61 DDR_DQ56
+3VS
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
DDR-SODIMM_200_Reverse
DIMM1(REV)
D
DU/RESET#
DU/BA2
VREF
VSS DQ4 DQ5 VDD DM0 DQ6 VSS DQ7
DQ12
VDD
DQ13
DM1
VSS DQ14 DQ15
VDD
VDD
VSS
VSS
DQ20 DQ21
VDD
DM2 DQ22
VSS DQ23 DQ28
VDD DQ29
DM3
VSS DQ30 DQ31
VDD
VSS
DM8
VDD
VSS
VSS
VDD
VDD
CKE0
VSS
VDD
RAS# CAS#
VSS DQ36 DQ37
VDD
DM4 DQ38
VSS DQ39 DQ44
VDD DQ45
DM5
VSS DQ46 DQ47
VDD CK1#
VSS DQ52 DQ53
VDD
DM6 DQ54
VSS DQ55 DQ60
VDD DQ61
DM7
VSS DQ62 DQ63
VDD
E
SDREF_DIMM
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72
CB4
74
CB5
76 78 80
CB6
82 84
CB7
86 88 90 92 94 96 98 100
A11
102
A8
104 106
A6
108
A4
110
A2
112
A0
114 116
BA1
118 120 122
S1#
124
DU
126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160
CK1
162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194
SA0
196
SA1
198
SA2
200
DU
DDR_DQ5
DDR_DQ3 DDR_DQ7
DDR_DQ12 DDR_DQ15
DDR_DQ11 DDR_DQ10
DDR_DQ20 DDR_DQ17
DDR_DQ22 DDR_DQ19
DDR_DQ25 DDR_DQ28
DDR_DQ27 DDR_DQ31
DDR_F_CB4
DDR_F_CB7 DDR_F_CB3
DDR_F_SMA11 DDR_F_SMA8
DDR_F_SMA6 DDR_F_SMA4 DDR_F_SMA2 DDR_F_SMA0
DDR_F_SBS1 DDR_F_SRAS# DDR_F_SCAS#
DDR_DQ36 DDR_DQ33
DDR_DQ39 DDR_DQ38
DDR_DQ44 DDR_DQ40
DDR_DQ43 DDR_DQ47
DDR_DQ52 DDR_DQ48
DDR_DQ55 DDR_DQ50
DDR_DQ59 DDR_DQ63
DDR_DQ57 DDR_DQ60
+3VS
12
C633 .1UF_0402
DDR_CKE2 5DDR_CKE35
DDR_F_SBS1 7 DDR_F_SRAS# 7 DDR_F_SCAS# 7 DDR_SCS#3 5DDR_SCS#25
DDR_CLK5# 5 DDR_CLK5 5
+1.25VS
RP113 4P2R_56
DDR_F_SMA9
14
DDR_F_SMA12
23
RP117 4P2R_56
DDR_F_SMA8
14
DDR_F_SMA11
23
RP121 4P2R_56
DDR_F_SMA5
14
DDR_F_SMA7
23
RP125 4P2R_56
DDR_F_SMA6
14
DDR_F_SMA4
23
RP129 4P2R_56
DDR_F_SMA1
14
DDR_F_SMA3
23
RP133 4P2R_56
DDR_F_SMA2
14
DDR_F_SMA0
23
R529 56_0402
R530 56_0402
DDR_CKE2 DDR_CKE3
DDR_SCS#2 DDR_SCS#3
1 2
RP139 4P2R_56
14 23
RP142 4P2R_56
14 23
1 2
RP153 4P2R_47 1 4 2 3
RP154 4P2R_47 1 4 2 3
DDR_F_SMA10
DDR_F_SWE# DDR_F_SBS0
DDR_F_SRAS# DDR_F_SCAS#
DDR_F_SBS1
Layout note Place these resistor
closely DIMM1, all trace length Max=1.3"
+1.25VS
Bottem side
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
A
B
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Title
Size Docu ment Number Re v
Date: Sheet
Compa l E l e c t r onics, Inc.
SCHEM AT IC , M/ B LA- 1391
401211
星期二 十一
?26, 2002
1B
of
844, 
E
A
B
C
D
E
Layout note :
Distribute as close as possible to DDR-SODIMM.
+2.5V
1 1
+2.5V +2.5V
12
C660 .1UF_0402_X5R
12
C651 .1UF_0402_X5R
12
C661 .1UF_0402_X5R
12
C652 .1UF_0402_X5R
12
C662 .1UF_0402_X5R
12
C653 .1UF_0402_X5R
12
C663 .1UF_0402_X5R
12
C654 .1UF_0402_X5R
12
C664 .1UF_0402_X5R
12
C655 .1UF_0402_X5R
12
C665 .1UF_0402_X5R
12
C656 .1UF_0402_X5R
12
+
12
C666 150UF_D2_6.3V
C657 .1UF_0402_X5R
12
C667
+
150UF_D2_6.3V
12
C658 .1UF_0402_X5R
12
C659 .1UF_0402_X5R
Layout note :
Place one cap close to every 2 pull up resistors termination to +1.25V
2 2
+1.25VS
12
C668 .1UF_0402_X5R
+1.25VS
12
C678 .1UF_0402_X5R
12
C669 .1UF_0402_X5R
12
C679 .1UF_0402_X5R
12
C670 .1UF_0402_X5R
12
C680 .1UF_0402_X5R
12
C671 .1UF_0402_X5R
12
C681 .1UF_0402_X5R
12
C672 .1UF_0402_X5R
12
C682 .1UF_0402_X5R
12
C673 .1UF_0402_X5R
12
C683 .1UF_0402_X5R
12
C674 .1UF_0402_X5R
12
C684 .1UF_0402_X5R
12
C675 .1UF_0402_X5R
12
C685 .1UF_0402_X5R
12
C676 .1UF_0402_X5R
12
C686 .1UF_0402_X5R
12
C677 .1UF_0402_X5R
12
C687 .1UF_0402_X5R
+1.25VS
12
C688
3 3
4 4
.1UF_0402_X5R
+1.25VS
12
C698 .1UF_0402_X5R
+1.25VS
12
C708 .1UF_0402_X5R
+1.25VS
12
C718
4.7UF_10V_0805
12
C689 .1UF_0402_X5R
12
C699 .1UF_0402_X5R
12
C709 .1UF_0402_X5R
12
C719
4.7UF_10V_0805
A
12
C690 .1UF_0402_X5R
12
C700 .1UF_0402_X5R
12
C710 .1UF_0402_X5R
12
C720
+
150UF_D2_6.3V
12
C691 .1UF_0402_X5R
12
C701 .1UF_0402_X5R
12
C711 .1UF_0402_X5R
12
C721 .1UF_0402_X5R
12
C692 .1UF_0402_X5R
12
C702 .1UF_0402_X5R
12
C712 .1UF_0402_X5R
12
C693 .1UF_0402_X5R
12
C703 .1UF_0402_X5R
12
C713 .1UF_0402_X5R
B
12
C694 .1UF_0402_X5R
12
C704 .1UF_0402_X5R
12
C714 .1UF_0402_X5R
12
C695 .1UF_0402_X5R
12
C705 .1UF_0402_X5R
12
C715 .1UF_0402_X5R
PROPRIETARY NOTE
12
C696 .1UF_0402_X5R
12
C706 .1UF_0402_X5R
12
C716 .1UF_0402_X5R
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
12
12
12
C
C697 .1UF_0402_X5R
C707 .1UF_0402_X5R
C717 .1UF_0402_X5R
D
Title
Size Docu ment Number Re v
Date: Sheet
Compa l E l e c t r onics, Inc.
SCHEM AT IC , M/ B LA- 1391
401211
星期二 十一
?26, 2002
of
944, 
E
1B
A
1 1
B
C
D
AD[0..31]19,20,23
2 2
C/BE#019,20,23 C/BE#119,20,23 C/BE#219,20,23 C/BE#319,20,23
DEVSEL#19,20,23
FRAME#19,20,23
IRDY#19,20,23 TRDY#19,20,23 STOP#19,20,23
PCIRST#4,14,19,20,21,23,25,27,31,34
PLOCK#20 SERR#19,20,23
PCI Pullups
3 3
+3VS
+3VS
PERR# REQA# STOP# SERR#
IRDY# TRDY#
FRAME#
RP35 1 2 3 4 5
10P8R-8.2K
RP34 1 2 3 4 5
10P8R-8.2K
10
PIRQA#
9
PIRQB#
8
REQ#4
7 6
10
PIRQC#
9
PIRQD#DEVSEL#
8
SIRQ
7
PLOCK#
6
+3VS
+3VS
PERR#19,20,23
PME# ha s i n te rnal PU
PIDERST#25 PCLK_ICH13
REQ#023 REQ#219
REQ#320
PCI REQ ASSIGMENT REQ#0 REQ#1 REQ#2 REQ#3 REQ#4
+3VS
RP37
1 8
4 4
2 7 3 6 4 5
8P4R-8.2K
1 2
R350 8.2K
1 2
R349 @1K
REQ#0 REQ#1 REQ#2 REQ#3
GPI1 GNTA#
GNTA# Strapping for "A16 swap override" : "0" -> Enable
A
AD[0..3 1 ]
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
DEVSEL# FRAME# IRDY# TRDY#
PAR19,20,23
STOP#
PCIRST# PLOCK#
SERR# PERR#
REQA# GNTA#
PCLK_ICH REQ#0
REQ#1 REQ#2 REQ#3 REQ#4 GPI1
WLAN NC 1394
PCMC IA CONTROLLER
NC
PROPRIETARY NOTE
B
W10
AA10
AA15
W11
AB10
ICH-2
(FW82801BA)
U33A
AA4
AD0
AB4
AD1
Y4
AD2
W5
AD3
W4
AD4
Y5
AD5
AB3
AD6
AA5
AD7
AB5
AD8
Y3
AD9
W6
AD10
W3
AD11
Y6
AD12
Y2
AD13
AA6
AD14
Y1
AD15
V2
AD16
AA8
AD17
V1
AD18
AB8
AD19
U4
AD20
W9
AD21
U3
AD22
Y9
AD23
U2
AD24
AB9
AD25
U1
AD26 AD27
T4
AD28
Y10
AD29
T3
AD30 AD31
AA3
C/BE0#
AB6
C/BE1#
Y8
C/BE2#
AA9
C/BE3#
AB7
DEVSEL#
V3
FRAME#
W8
IRDY#
V4
TRDY#
W1
STOP#
W2
PAR PCIRST#
AA7
PLOCK#
W7
SERR#
Y7
PERR#
Y15
PME#
M3
GPI0/REQA#
L2
GPO16/GNTA# PCICLK
R2
REQ0#
R3
REQ1#
T1
REQ2# REQ3#
P4
REQ4#
L3
GPI1/REQB#/REQ5#
ICH-2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PCI
PCLK_ICH
CPU
CPUPWRGD
HUB
IRQ
GPI2/PIRQE#
GPI3/PIRQF# GPI4/PIRQG# GPI5/PIRQH#
GPO17/GNTB#/GNT5#
12
12
CPUSLP#
IGNNE#
STPCLK# A20GATE
HL_STB HL_STB# HLCOMP HUBREF
PIRQA#
PIRQB# PIRQC# PIRQD#
APICCLK
APICD0
APICD1 SERIRQ
R154
@33
C222
@22PF
A20M# FERR#
INIT#
INTR SMI#
RCIN#
HL10 HL11
IRQ14 IRQ15
GNT0# GNT1# GNT2# GNT3# GNT4#
D11 A12
FERR#
R22 A11
CPUINIT#
C12 C11 B11
NMI
SMI#
B12
STPCLK#
C10
RC#
B13
GATEA20
C13
CPU_PWRGD
A13
HL0
A4
HL0
HL1
B5
HL1
HL2
A5
HL2
HL3
B6
HL3
HL4
B7
HL4
HL5
A8
HL5
HL6
B8
HL6
HL7
A9
HL7
HL8
C8
HL8
HL9
C6
HL9
HL10
C7
HL11
C5
HL_STB
A6
HL_STB#
A7
+ICH_HLCOMP
A3
HUBREF
B4
PIRQA#
P1
PIRQB#
P2
PIRQC#
P3
PIRQD#
N4
IRQ14
F21
IRQ15
C16
CLK_APIC_ICH
N20
PICD0
P22
PICD1
N19
SIRQ
N21
GPI2
N3
GPI3
N2
GPI4
N1
GPI5
M4
PIN N3, M4 can not use GPIO.
GNT#0
M2 M1
GNT#2
R4
GNT#3
T2 R1
SIDERST#
L4
1 2
R383 0
C484 .1UF
C
HL[0..10]
HL_STB 4 HL_STB# 4
12
HUBREF 4 PIRQA# 14,20,23 PIRQB# 20 PIRQC# 19 PIRQD# 23
IRQ14 25 IRQ15 24
SIRQ 20,27,31
GNT#0 23 GNT#2 19
GNT#3 20
SIDERST# 25
SB_A20M# 2 CPUSLP# 2 FERR# 2 SB_IGNNE# 2 CPUINIT# 2 SB_INTR 2 SB_NMI 2 SMI# 2 STPCLK# 2 RC# 31 GATEA20 31 CPU_PWRGD 2
HL[0..10] 4
+1_8VS
HL11 +ICH_HLCOMP
SIDERST# IRQ14 IRQ15
GPI4 GPI3 GPI2 GPI5
PICD0 PICD1 CLK_APIC_ICH
Compa l E l e c t r onics, Inc.
Title
SCHEMATIC, M/B LA-1391
Size Docu ment Number Re v
B
401211
Date: Sheet
星期二 十一
?26, 2002
D
1 2
R357 @10K
1 2
R354 40.2_1%
1 2
R351 @8.2K
1 2
R410 10K
1 2
R390 10K
RP36
1 8 2 7 3 6 4 5
8P4R-100K
12
R414 10K
12
R409 10K
1 2
R415 0
+3VS
of
10 44, 
1B
A
1 2
+3V
+3V
+3V
ACIN31,34,36,37,39
+3V
+3V
+3V
+RTCVCC
1 2
INTRUDER#
SMLINK0 SMLINK1 OVCUR#2 OVCUR#0
VGATE
CLKRUN#
LDRQ#1
DSCACHE# ICH_AC_SDOUT
RSMRST#
IAC_BITCLK IAC_SDATAI IAC_SDATAI1 SPKR
R403 10K D38 RB751V
1 2
R380 10K D34 RB751V
D22 RB751V
D21 @RB751V
1 2
R388 10K D36 RB751V
1 2
R370 10K D33 RB751V
1 2
R362 10K D32 RB751V
1 2
R384 10K D35 RB751V
R190
1 2
15K
1UF_25V_0805
R191
1K
LLBATT#31
EC_LID_OUT#31
PBTN_OUT#31
ON/OFF31,34
1 1
ECSMI#31
ECSCI#31
EC_RIOUT#31
2 2
+RTCVCC
1 2
R183 10K
+3V
3 3
1 2
R175 10K
1 2
R184 10K
1 2
R178 10K
1 2
R548 10K
+3VS
1 2
R386 100K
1 2
R436 10K
1 2
R356 @10K
12
R355 10K
1 2
R179 @10K
AC_SDOUT Strapping: "1" -> Safe Mode Boot
4 4
R168 100K
R169 10K R404 10K R405 10K R407 1K
12
12 12 12 12
SPKR Strapping: "0" -> No Reboot
A
BATTLOW#
21
LID#
21
PBTN#
21
21
ICH_ACIN
21
EXT_SMI#
21
SCI#
21
ICH_RI#
21
12
C303
+R_VBAIS
1 2
C282 .047UF
12
1 2
R479 22M
R480
2.4M
1 2
CLKRUN# 19,20,23,27,31
R392
1 2
1K
R181
10M
C538 12PF
J1
JOPEN
1 2
R406 10M
32.768KHZ
12
IAC_BITCLK
USBP2­USBP2+ USBP0­USBP0+
CP5
8P4C-22PF
1 8
2 7
3 6
4 5
12
X3
12
C539 12PF
1 2
R158 @10K
12
R170
@33
C543
@33PF
RP41 1 8 2 7 3 6 4 5
8P4R-15
SYS_PWROK35
RSMRST#12,35
SUS_STAT#14,27,34
B
182736
45
RP40 8P4R-15K
C293 22PF
AA13
D14 W16
AB18
R20 W21
AA17
R21 W15
AA18
Y11 A15
C14
V21 Y17 T19
AA16 AB16 AB17
U19
V20 T20
T21
U22
T22
V22 P19
R19
P21
Y22 W22 N22
Y14
AA11
W14
AB15
L1 AB14 AA14
Y12
W12 AB13 AB12
Y13
W13 AB11 AA12
W17
Y18 AB19 AA19
W18
Y19 AB20 AA20
W19
Y20
Y21
W20
R408 22 R180 22
12
1 2 1 2
U33B
THRM# GPO19 SLP_S3# SLP_S5# PWROK PWRBTN# RI# RSMRST# GPIO25 SUSCLK GPI6 GPO18 GPO20 GPIO24 SUSSTAT# INTRUDER#
SMBDATA SMBCLK SMBALERT#/GPI11 SMLINK0 SMLINK1
RTCRST# VBIAS RTCX1 RTCX2
AC_RST# AC_SYNC AC_BIT_CLK AC_SDOUT AC_SDIN0 AC_SDIN1 SPKR
GPI8 GPI7 GPI12 GPI13 GPO21 GPIO27 GPIO28
LAD0/FWH0 LAD1/FWH1 LAD2/FWH2 LAD3/FWH3 LDRQ0# LDRQ1# LFRAME#/FWH4 FSO
USBP0+ USBP0­USBP1+ USBP1­USBP2+ USBP2­USBP3+
ICH-2
USBP3­OC0#
OC1# OC2# OC3#
SYSTEM
AC97
GPIO
LPC
USB
ICH_AC_SYNC ICH_AC_SDOUT
ATF_INT#31
SLP_S3#31 SLP_S5#31
FLASH#32 RTCCLK20,21
SDAP413 SCKP413
IAC_RST#26,29 PDD[0..15] 25 IAC_BITCLK26,29 IAC_SDATAI29
IAC_SDATAI126
SPKR30
USB_EN#28
LAD027,31 LAD127,31 LAD227,31
LAD327,31 LDRQ#031 LDRQ#127
LFRAME#27,31
OVCUR#128 OVCUR#328
IAC_SYNC26,29
IAC_SDATAO26,29
PROPRIETARY NOTE
B
ATF_INT# SLP_S3#
SLP_S5# SYS_PWROK PBTN# ICH_RI# RSMRST#
BATTLOW#
INTRUDER# SDAP4
SCKP4 ICH_ACIN SMLINK0 SMLINK1
+RTCRST# +VBIAS RTCX1 RTCX2
ICH_AC_SYNC IAC_BITCLK ICH_AC_SDOUT IAC_SDATAI IAC_SDATAI1 SPKR
EXT_SMI# DSCACHE# SCI# LID#
LAD0 LAD1 LAD2 LAD3 LDRQ#0 LDRQ#1 LFRAME#
USBP0+ USBP0­USBP1+ USBP1­USBP2+ USBP2­USBP3+ USBP3-
OVCUR#0 OVCUR#1 OVCUR#2 OVCUR#3
12
C544 22PF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
USBP3­USBP3+ USBP1­USBP1+
8P4C-22PF
GPO22 GPO23
VGATE/VRMPWRGD
CLK48 CLK14 CLK66
PDA0 PDA1
PDA2 PDCS1# PDCS3#
PDREQ
PDDACK#
PDIOR# PDIOW# PIORDY
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
IDE
PDD6
PDD7
PDD8
PDD9
PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
SDA0
SDA1
SDA2 SDCS1# SDCS3#
SDDREQ
SDDACK#
SDIOR# SDIOW# SIORDY
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
C
RP44 1 8 2 7 3 6 4 5
U20 B14 A14 B15
P20 M19 D4
F20 F19 E22 E21 E19
G22 F22 G19 G21 G20
H19 H22 J19 J22 K21 L20 M21 M22 L22 L21 K22 K20 J21 J20 H21 H20
A16 D16 B16 C15 D15
B18 B17 D17 C17 A17
D18 B19 D19 A20 C20 C21 D22 E20 D21 C22 D20 B20 C19 A19 C18 A18
1 8
2 7
3 6
VGATE CLK_USB_ICH
CLK_14M_ICH CLK_HUB_ICH
8P4R-15
8P4R-15K
4 5
1 2
R478 0
PDA0 PDA1 PDA2 PDCS1# PDCS3#
PDDREQ PDDACK# PDIOR# PDIOW# PDIORDY
PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
SDA0 SDA1 SDA2 SDCS1# SDCS3#
SDDREQ SDDACK# SDIOR# SDIOW# SDIORDY
SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
R400 1K
1 2
CP6
TP0
RP43
182736
45
+3V
CLK_USB_ICH 13 CLK_14M_ICH 13 CLK_66M_ICH 13
PDA0 25 PDA1 25 PDA2 25 PDCS1# 25 PDCS3# 25
PDDREQ 25 PDDACK# 25 PDIOR# 25 PDIOW# 25 PDIORDY 25
PDD[0..15]
SDA0 24 SDA1 24 SDA2 24 SDCS1# 24 SDCS3# 24
SDDREQ 24 SDDACK# 24 SDIOR# 24 SDIOW# 24 SDIORDY 24
SDD[0..15]
V_GATE 41
CLK_USB_ICH CLK_14M_ICH CLK_HUB_ICH
D
ICH2-B(IDE,LPC,GPIO)
USB3_D- 28 USB3_D+ 28 USB1_D- 28 USB1_D+ 28
SDD[0..15] 24
PDIORDY
1 2
R416 4.7K
SDIORDY
1 2
R394 4.7K
?26, 2002
12
R162 10
12
C245 10PF_0402
D
12
R149 10
12
C198 10PF
11 44, 
12
R166 22
12
C270 10PF_0402
Compa l E l e c t r onics, Inc.
Title
SCHEMATIC, M/B LA-1391
Size Docu ment Number Re v
B
401211
Date: Sheet
星期二 十一
+5VS
1B
of
A
B
C
D
ICH2-C(LAN,Power)
+1_8VS
AA21 AA22
AB21 AB22
U33C
D10
VCC1_8_1
E5
VCC1_8_2
K19
VCC1_8_3
L19
VCC1_8_4
P5
VCC1_8_5
V9
VCC1_8_6
D2
VCC1_8_7
A1
GND1
A2
GND2
A10
GND3
B1
GND4
B2
GND5
B3
GND6
B9
GND7
B10
GND8
C2
GND9
C3
GND10
C4
GND11
C9
GND12
D5
GND13
D6
GND14
D7
GND15
D8
GND16
D9
GND17
E6
GND18
E7
GND19
E8
GND20
E9
GND21
J10
GND22
J11
GND23
J12
GND24
J13
GND25
J14
GND26
J9
GND27
K10
GND28
K11
GND29
K12
GND30
K13
GND31
K14
GND32
K9
GND33
L10
GND34
L11
GND35
L12
GND36
L13
GND37
L14
GND38
L9
GND39
M10
GND40
M11
GND41
M12
GND42
M13
GND43
M14
GND44
M9
GND45
N10
GND46
N11
GND47
N12
GND48
P9
GND49
P14
GND50
P13
GND51
P12
GND52
P11
GND53
P10
GND54
N9
GND55
N14
GND56
N13
GND57
A21
GND58
A22
GND59
B21
GND60
B22
GND61
AA1
GND62
AA2
GND63 GND64 GND65
AB1
GND66
AB2
GND67 GND68 GND69
K1
GND70
D3
GND71
ICH-2
VCC3_3_1 VCC3_3_2 VCC3_3_3 VCC3_3_4 VCC3_3_5 VCC3_3_6 VCC3_3_7 VCC3_3_8
VCC3_3_9 VCC3_3_10 VCC3_3_11 VCC3_3_12 VCC3_3_13 VCC3_3_14 VCC3_3_15 VCC3_3_16 VCC3_3_17 VCC3_3_18
V5REF1 V5REF2
VCCSUS1_8_1 VCCSUS1_8_2 VCCSUS1_8_3 VCCSUS1_8_4 VCCSUS1_8_5
VCCSUS3_3_1 VCCSUS3_3_2 VCCSUS3_3_3 VCCSUS3_3_4 VCCSUS3_3_5 VCCSUS3_3_6
V_CPU_IO_1 V_CPU_IO_2
VCCRTC
V5REF_SUS
EEPROM
EE_CS
EE_SHCLK
EE_DOUT
EE_DIN
LAN
LAN_CLK LAN_RXD0 LAN_RXD1 LAN_RXD2
LAN_TXD0 LAN_TXD1 LAN_TXD2
LAN_RSTSYNC
RSM_PWROK
1 1
2 2
+3V
12
C250 .1UF_0402
+1_8V
12
+
12
12
C251 .1UF_0402
12
C238 .1UF_0402
C208
4.7UF_10V_0805
C227 .1UF_0402
12
12
C244 .1UF_0402
12
C209 .1UF_0402
CPU_VCC
12
C242 .1UF_0402
C229 .1UF_0402
12
12
C221 .1UF_0402
12
C212 .1UF_0402
C243 .1UF_0402
12
C253 .1UF_0402
12
C213 .1UF_0402
12
C252 .1UF_0402
12
C249 .1UF_0402
12
C224 .1UF_0402
12
C214 1000PF_0402
12
C246 1000PF_0402
+3VS
+1_8VS
12
C215 1000PF_0402
12
C225 1000PF_0402
12
C216 .1UF_0402
12
C247
+
4.7UF_10V_0805
3 3
12
C230 .1UF_0402
12
C231 .1UF_0402
+3VS
E14 E15 E16 E17 E18 F18 G18 H18 J18 P18 R18 R5 T5 U5 V5 V6 V7 V8
+VCC5REF
K2 M20
V14 V15 V16 H5 J5
T18 U18 F5 G5 V17 V18
D12 D13
U21 V19
K4 J3 J4 K3
R353 @10K
G3 G2 G1 H1
LANTXD0
F3
LANTXD1
F2
LANTXD2
F1 H2 Y16
1 2
+1_8V
+3V
CPU_VCC
VCCRTC
+3V
LAN_EECS LAN_EECLK LAN_EEDI LAN_EEDO
LAN_CLK
R100 33
1 2
R101 33
1 2
R102 33
1 2
R99 33
1 2 1 2
R167 0
LAN_CLK
1 2 3 4
1 2
R182 1K
C540 .1UF
U29
CS SK DI DO
9346
D12
1SS355
12
C197 1UF_0805
1 2
8
VCC
7
NC
6
NC
5
GND
LAN_CLK 22 LAN_RXD0 22 LAN_RXD1 22 LAN_RXD2 22 LAN_TXD0 22 LAN_TXD1 22
LAN_TXD2 22 LAN_RST 22 RSMRST# 11,35
12
R86
@33
12
C136
@22PF
+3VS
21
12
C292 .1UF
+RTCVCC
+5VS
12
R140 1K
+3V
12
C476 .1UF
4 4
Compa l E l e c t r onics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
A
B
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
SCHEMATIC, M/B LA-1391
Size Docu ment Number Re v
B
401211
Date: Sheet
星期二 十一
?26, 2002
D
of
12 44, 
1B
A
B
C
D
E
F
G
H
Clock Generator
+3VS
SEL2 SEL1 SEL0 CPUCLKC[0..2] CPUCLKT[0..2]
0 0 0 66.67 66.67 0 0 1 100.00 100.00 0 1 0 200.00 200.00 0 1 1 133.33 133.33
1 1
+3VS +3VS
12
12
R326
R328
1K
@1K
BSEL02 BSEL12
2 2
1 2
R547 @0
CPU_VCC
12
12
R545
R546
@1K
1K
+3VS
1 2
1 2
R338 10K
R346 220
+3VS
1
C
Q40
2SC2411K
2
B
E
3
R324 220
CLK_USB_ICH11
R107 33
C169 10PF
1 2
R323 1K
R339 1K
1 2
R317 1K
1 2
R327 1K
1 2
+3VS
1 2
1 2
1 2
12
1 2
C176 10PF
R325 10K
1 2
DIMM_SMDATA DIMM_SMCLK
XTALIN
Y2
14.318MHZ
XTALOUT
L11 CHB2012U121
1 2
L12 CHB2012U121
1 2
2
3
40 55 54
25 34 53
28
43
29 30
33 35
42
39
38
R109 33
CLK_14M_ICH11
14.3M_SIO27
3 3
12
C133
1 2 1 2
R110 33
56
@10PF
U9
XTAL_IN
XTAL_OUT
SEL2 SEL1 SEL0
PWR_DWN# PCI_STOP# CPU_STOP#
VTT_PWRGD#
MULT0
SDATA SCLK
3V66_0/DRCG 3V66_1/VCH_CLK
IREF
48MHZ_USB
48MHZ_DOT
REF
ICS950805
+3V_CLK
Width=40 mils
1
14
VDD_PCI8VDD_PCI
VDD_REF
GND_REF4GND_PCI9GND_PCI15GND_3V6620GND_3V6631GND_48MHZ36GND_IREF41GND_CPU
12
+
C139
22UF_16V_1206
50
32
37
VDD_CPU46VDD_CPU
VDD_3V6619VDD_3V66
VDD_48MHZ
CPU_CLKC2
66MHZ_IN/3V66_5
66MHZ_OUT2/3V66_4 66MHZ_OUT1/3V66_3 66MHZ_OUT0/3V66_2
47
VDD_CORE
GND_CORE
CPUCLKT2
CPUCLKT1
CPUCLKC1
CPUCLKT0
CPUCLKC0
PCICLK_F2 PCICLK_F1 PCICLK_F0
PCICLK6 PCICLK5 PCICLK4 PCICLK3 PCICLK2 PCICLK1 PCICLK0
26
27 45
44 49
48 52
51 24
23 22 21
7 6 5
18 17 16 13 12 11 10
12
12
C140 .01UF_0402
+3V_VDD
12
+
C175
.01UF_0402
CLK_BCLK
CLK_BCLK#
CLK_MCH
CLK_MCH#
66M_MCH
R131 33
1 2
R134 33
1 2
R521 33
1 2
R133 33
1 2
R132 33
1 2
R122 33
1 2
12
C141
C142
.01UF_0402
.01UF_0402
L14 CHB2012U121 1 2
12
C177 22UF_16V_1206
R105 27
1 2
R106 27
1 2
R103 27
1 2
R104 27
1 2
R125 33
1 2
R124 33
1 2
R123 33
1 2
12
12
C143
C172
.01UF_0402
.01UF_0402
+3VS
1 2
R87 49.9_1%
R88 49.9_1%
1 2
1 2
R89 49.9_1%
R90 49.9_1%
1 2
12
C157 .01UF_0402
12
C182 @10PF
12
C174 .01UF_0402
12
C183 @10PF
12
C171 .01UF_0402
HCLK_CPU 2
HCLK_CPU# 2 CLK_HMCH 4
CLK_HMCH# 4
12
C184 @10PF
CLK_66M_AGP 14 CLK_66M_ICH 11 CLK_66M_MCH 4
PCLK_ICH 10
PCLK_PCM 20 PCLK_1394 19 PCLK_SIO 27
PCLK_EC 31 PCLK_MINI 23
+3V
R321
4.7K
1 2
+3V
R322
4.7K
4 4
SCKP411
1 2
+5VS
2
G
1 3
D
Q61 2N7002
+5VS
2
G
1 3
D
DIMM_SMDATA
S
DIMM_SMCLK
S
DIMM_SMDATA 7,8SDAP411
DIMM_SMCLK 7,8
Q62 2N7002
Compa l E l e c t r onics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
A
B
C
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
E
F
SCHEMATIC, M/B LA-1391
Size Docu ment Number Re v
B
401211
Date: Sheet
星期二 十一
G
?26, 2002
of
13 44, 
H
1B
1
2
3
4
5
6
7
8
GAD[0:31]4
A A
GC/BE#[0:3 ]4
CLK_66M_AGP13
R40 @0
R41 0
FREQOUT
GREQ#4 GGNT#4
PIRQA#10,20,23
GPAR4
GSTOP#4
GDEVSEL#4
GTRDY#4 GIRDY#4
GFRAME#4
PCIRST#4,10,19,20,21,23,25,27,31,34
RBF#4
AD_STB04
AD_STB0#4
AD_STB14
AD_STB1#4
ST04 ST14 ST24
SBA[0:7]4
SBSTB4
SBSTB#4
AGPREF4
1 2
R494 22
1 2
R46 120
B B
+3V_VGA
L47 BLM21P300S_0805
12
C602
10UF_1206
C C
D D
C102 .1UF
CLK
PD#
LEE
MK1709
X1
VDD ST
OSC_27MHz
12
12
R550 @0
4
8 5
OUT GND
12
3 2
12
12
R43
R44
0
@0
12
12
R42
R45
@0
@0
+3V_VGA
2
U6
VDD
1
X1/CLK
7
S0
6
S1
GND
3
12
R64 10K
4
C93 .1UF
1
12
Divide r circuit for 1.8Vdc XTALIN from 3.3Vdc OSC out
1
2
GAD[0:31]
GC/BE#[0:3]
+3VS +3VS
SBA[0:7]
(10 mil)
C158 .1UF
12
R54 @20K
12
R47 150
3
1 2
R4910
1 2
C393 10PF
1 2 1 2
R115 47_1%
1 2
1 2
R53 10
1 2
12
R37 @20K
12
C75 @15PF
COMPS18
LCD_CLK18
LCD_DATA18
R52
1 2
845_1%
PROPRIETARY NOTE
GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8 GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31
GC/BE#0 GC/BE#1 GC/BE#2 GC/BE#3
GREQ# GGNT# GINTA# GPAR GSTOP# GDEVSEL# GTRDY# GIRDY# GFRAME#
1 2
R30110
R7220K
RBF#
R6820K
ADSTBA ADSTBA# ADSTBB ADSTBB#
ST0 ST1 ST2
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
SBSTB SBSTB#
OSCLIN
1 2
R55 1K
CRMA18 LUMA18
R2SET
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
G23 G25 G24 G26
M26 M24
M25
AA25 AA24
AA23 AA26
W24
AB25 AB26
W26
W25
AE6 AE7
AF25 AF26
AC6
AF16 AF15 AF14 AE14 AF13
AE16
4
AF6 AF7
D24 C26 D25 D26 E23 E25 E24 E26 F26
H24 H26 H25 L23 L26 L24
N25 N26
P23 P26 P24 R25 R24 R26 T23 T25
F23 J25 L25 N23
Y24 J23
J24 J26 K24 K26 K25
F25 F24 P25 N24
Y26 Y23 Y25
V24 V26 V23 U26 U24 T26 T24
V25 U25
C25 B26
Y3
U8A
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE#0 C/BE#1 C/BE#2 C/BE#3
REQ# GNT# INTA# PAR STOP# DEVSEL# TRDY# IRDY# FRAME# RST# PCICLK
SERR# STP_AGP#
AGP_BUSY# RBF# AD_STB0 ADSTRB0# AD_STB1 ADSTRB1#
ST0 ST1 ST2
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
SB_STB SB_STB#
AGPTEST AGPREF
SSIN SSOUT
XTALIN XTALOUT
TESTEN ROMCS# C_R
Y_G COMP_B H2SYNC V2SYNC
CRT2DDCCLK CRT2DDCDATA
R2SET
M6-P
PCI/AGP HOST BUS INTERFACECLK
SSCDAC2
GPIO / ROM
ZV_LCDDATA0 ZV_LCDDATA1 ZV_LCDDATA2 ZV_LCDDATA3 ZV_LCDDATA4 ZV_LCDDATA5 ZV_LCDDATA6 ZV_LCDDATA7 ZV_LCDDATA8
ZV_LCDDATA9 ZV_LCDDATA10 ZV_LCDDATA11 ZV_LCDDATA12 ZV_LCDDATA13 ZV_LCDDATA14 ZV_LCDDATA15 ZV_LCDDATA16 ZV_LCDDATA17 ZV_LCDDATA18 ZV_LCDDATA19 ZV_LCDDATA20 ZV_LCDDATA21 ZV_LCDDATA22 ZV_LCDDATA23
ZV PORT / EXT TMDSLVDSTMDSDAC
ZV_LCDCNTL0
ZV_LCDCNTL1
ZV_LCDCNTL2
ZV_LCDCNTL3
TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P
TXOUT_L3N
TXOUT_L3P
TXCLK_LN
TXCLK_LP TXOUT_U0N TXOUT_U0P TXOUT_U1N TXOUT_U1P TXOUT_U2N TXOUT_U2P TXOUT_U3N TXOUT_U3P
TXCLK_UN TXCLK_UP
DVIDDCCLK
DVIDDCDATA
VGADDCCLK
VGADDCDATA
SUS_STAT#
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8
GPIO9 GPIO10 GPIO11 GPIO12 GPIO13
LTGIO0 LTGIO1 LTGIO2
DIGON BLON#
TX0M
TX0P
TX1M
TX1P
TX2M
TX2P
TXCM
TXCP
HPD
HSYNC VSYNC
MONID0 MONID1
AUXWIN
RSET
5
Y2 Y1 W3 W2 W1 V4 V3 V2 V1 U3 U2 U1 T4 T3
AA4 AB1 AB2 AB3 AB4 AC1 AC2 AC3 AD1 AD2 AD3 AE1 AE2 AF1 AF2 AF3 AE3 AF4 AE4 AD4 AF5 AE5 AD5 AC5
Y4 AA1 AA2 AA3
AC8 AD8 AC9 AD9 AE8 AF8 AC10 AD10 AE9 AF9 AD11 AC11 AE11 AF11 AD12 AC12 AD13 AE13 AE12 AF12
AD7 AD6 AC7
AB10 AB9
AE19 AF19 AE20 AF20 AE21 AF21 AE18 AF18
AD20 AC20
AD21
AF24
R
AF23
G
AF22
AE24 AE23
AC25 AC26
AD24 AD25
AE25 AC22 AE22
Option Stra p Pins
GPIO0
R71 @10K GPIO1 GPIO2 GPIO3
M_SEN#
R51 10K
RSET
1 2
R70 @10K
1 2
R74 @10K
1 2
R75 @10K
1 2
ENVDD BLON#
DDCSCL DDCSDA
R49 0
1 2
1 2
1 2
(10 mil)(10 mil)
TXOUT0- 18 TXOUT0+ 18 TXOUT1- 18 TXOUT1+ 18 TXOUT2- 18 TXOUT2+ 18
TXCLKO- 18 TXCLKO+ 18 TZOUT0- 18 TZOUT0+ 18 TZOUT1- 18 TZOUT1+ 18 TZOUT2- 18 TZOUT2+ 18
TZCLKO- 18 TZCLKO+ 18
R18 G18 B18 HSYNC1 18 VSYNC1 18
SUS_STAT#
499_1% R50
6
Strap-G Strap-H Strap-J Strap-K
M_SEN# 18 DDC_MD2 18
+3V_VGA
+3V_VGA
ENVDD 18 BLON# 18
DDC_CLK 18 DDC_DATA 18
SUS_STAT# 11,27,34
HOST INTERFACE
SUS_STAT#
1 2
R48 10K
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1391
Size D ocume nt Number R e v Custom
401211
Date: Sheet
星期二 十一月
, 2002
7
+3V
14 44, 26
of
8
1B
1
2
3
4
5
6
7
8
MEMORY INTERFACE
C181 @15PF
NMD[0:63] NMA[0:13] NDQM [0 :7 ]
NDQS0 16
NDQS4 16
NMRAS# 16 NMCAS# 16 NMWE# 16 NMCS0# 16
NMCKE 16
12
C178 @15PF
NMCLK0 NMCLK0#
NMCLK1 NMCLK1#
12
C170 @15PF
A A
1
NMD0
8 9
NMD1
7
NMD2
6
NMD3
5
NMD4
4
NMD5
3
NMD6
2
NMD7
1
NMD8
8 9
NMD9
7
NMD10
6
NMD11
5
NMD12
4
NMD13
3
NMD14
2
NMD15
1
NMD16
8 9
NMD17
7
NMD18
6
NMD19
5
NMD20
B B
C C
NMD21 NMD22 NMD23 NMD24 NMD25 NMD26 NMD27 NMD28 NMD29 NMD30 NMD31 NMD32 NMD33 NMD34 NMD35 NMD36 NMD37 NMD38 NMD39 NMD40 NMD41 NMD42 NMD43 NMD44 NMD45 NMD46 NMD47 NMD48 NMD49 NMD50 NMD51 NMD52 NMD53 NMD54 NMD55 NMD56 NMD57 NMD58 NMD59 NMD60 NMD61 NMD62 NMD63
4 3 2 1 8 9 7 6 5 4 3 2 1 8 9 7 6 5 4 3 2 1 8 9 7 6 5 4 3 2 1 8 9 7 6 5 4 3 2 1 8 9 7 6 5 4 3 2 1
10 11 12 13 14 15 16
10 11 12 13 14 15 16
10 11 12 13 14 15 16
10 11 12 13 14 15 16
10 11 12 13 14 15 16
10 11 12 13 14 15 16
10 11 12 13 14 15 16
10 11 12 13 14 15 16
RP15 16P8R-33
RP16 16P8R-33
RP17 16P8R-33
RP18 16P8R-33
RP11 16P8R-33
RP10 16P8R-33
RP9 16P8R-33
RP8 16P8R-33
VMD0 VMD1 VMD2 VMD3 VMD4 VMD5 VMD6 VMD7 VMD8 VMD9 VMD10 VMD11 VMD12 VMD13 VMD14 VMD15 VMD16 VMD17 VMD18 VMD19 VMD20 VMD21 VMD22 VMD23 VMD24 VMD25 VMD26 VMD27 VMD28 VMD29 VMD30 VMD31 VMD32 VMD33 VMD34 VMD35 VMD36 VMD37 VMD38 VMD39 VMD40 VMD41 VMD42 VMD43 VMD44 VMD45 VMD46 VMD47 VMD48 VMD49 VMD50 VMD51 VMD52 VMD53 VMD54 VMD55 VMD56 VMD57 VMD58 VMD59 VMD60 VMD61 VMD62 VMD63
A26 B25 A25 A24 B23 A23 C22 B22 C21 B21 A21 D20 C20 B20 A20 C19 B18 A18 C17 B17 A17 D16 C16 B16 B15 A15 D14 C14 B14 A14 D13 C13
U8B
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
B1
DQ32
C1
DQ33
C2
DQ34
D1
DQ35
D2
DQ36
E1
DQ37
E2
DQ38
F1
DQ39
G2
DQ40
G3
DQ41
H1
DQ42
H2
DQ43
H3
DQ44
J1
DQ45
J2
DQ46
J3
DQ47
L1
DQ48
L2
DQ49
L3
DQ50
L4
DQ51
M1
DQ52
M2
DQ53
M3
DQ54
N1
DQ55
N4
DQ56
P1
DQ57
P2
DQ58
P3
DQ59
P4
DQ60
R1
DQ61
R2
DQ62
R3
DQ63
M6-P
MEMORY INTERFACE
MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8
MA9 MA10 MA11 MA12 MA13
DQM#0 DQM#1 DQM#2 DQM#3 DQM#4 DQM#5 DQM#6 DQM#7
QS0 QS1 QS2 QS3 QS4 QS5 QS6
QS7 RAS# CAS#
WE# CS#0 CS#1
CKE CLK0
CLK0#
CLK1
CLK1#
CLKFB
VREF
MEMVMODE
NC NC
NC NC
VMA0
B13
VMA1
A13
VMA2
C12
VMA3
B12
VMA4
A12
VMA5
D11
VMA6
C11
VMA7
B11
VMA8
A11
VMA9
C10
VMA10
B10
VMA11
A10
VMA12
D9
VMA13
C9
VDQM0
A22 D21 A16 C15 F2 G1 N2 N3
A19 B19 D18 C18 J4 K1 K2 K3
A9 C8 D8 B9 B8 A8 A6
B6 A4
B4 A7
B7 A5
B5 B3
T2 T1
R345 33
VDQM1
R344 33
VDQM2
R342 33
VDQM3
R341 33
VDQM4
R333 33
VDQM5
R332 33
VDQM6
R316 33
VDQM7
R320 33
VDQS0 NDQS0
R343 33
VDQS4
R329 33
VMRAS# VMCAS# VMWE#
VMCS0#
VMCKE
R340 0
VMCLK0
R135 22
VMCLK0#
R130 22
VMCLK1
R128 22
VMCLK1#
R116 22
MVREF
1 2
R306 4.7K
2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
1 2
1 2
1 8 2 7 3 6 4 5
1 2 1 2
1 2 1 2
1 2
+1_8V_VGA
16 15 14 13 12 11 10
16 15 14 13 12 11 10
RP12 16P8R-10
RP13 16P8R-10
RP14 8P4R_0
(10 mil)
12
C399 .1UF
NMA0 NMA1 NMA2 NMA3 NMA4 NMA5 NMA6 NMA7 NMA8 NMA9 NMA10 NMA11 NMA12 NMA13
NDQM0 NDQM1 NDQM2 NDQM3 NDQM4 NDQM5 NDQM6 NDQM7
NDQS4
NMRAS# NMCAS# NMWE# NMCS0#
NMCKE
12
C186 @15PF
+2_5V
12
12
12
R314 1K_1%
R298 1K_1%
NMD[0:63] 16 NMA[0:13] 16 NDQM[0 :7] 16
NMCLK0 16 NMCLK0# 16
NMCLK1 16 NMCLK1# 16
D D
Compal Electronics, Inc.
Title
PROPRIETARY NOTE THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
1
2
3
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
5
6
SCHEMATIC, M/B LA-1391
Size D ocume nt Number R e v Custom
401211
Date: Sheet
星期二 十一月
, 2002
7
15 44, 26
of
8
1B
1
2
3
4
5
6
7
8
DDR SDRAM
+3V
A A
12
12
C262
C258 10UF_1206
12
C483 .1UF
B B
NMD[0:63]15
NMA[0:13]15
NDQM[0:7]15
NMWE#15 NMCAS#15 NMRAS#15 NMCS0#15
NMCKE15 NMCLK015
NMCLK0#15
NMCLK115
NMCLK1#15
NDQS015
C C
NDQS415
NMD[0:63] NMA[0:13] NDQM[0:7]
NMWE# NMCAS# NMRAS# NMCS0#
NMCKE NMCLK0 NMCLK0# NMCLK1 NMCLK1#
NDQS0 NDQS4
C206
.1UF
2200PF
12
12
C204
C261
.1UF
.1UF
+2_5V
1 2
1 2
12
12
R147 1K_1% VREF1
R146 1K_1%
C236 2200PF
C260 .1UF
(10 mil)
NMCLK0
NMCLK0#
12
C219 2200PF
12
12
C264
C202
.1UF
.1UF
NMA0
31
NMA1
32
NMA2
33
NMA3
34
NMA4
47
NMA5
48
NMA6
49
NMA7
50
NMA8
51
NMA9
45
NMA10
36
NMA11
37
NMA13
29
NMA12
30
NDQM0
23
NDQM1
56
NDQM2
24
NDQM3
57 NDQS0 NVREF0
94
NMRAS# NMCAS# NMWE# NMCS0#
NMCKE
R148 120
58
52
93
27
26
25
28
53
55
54
87
88
89
90
91
12
C207 .1UF
1 2
2
VDDQ
A0 A1 A2 A3 A4 A5 A6 A7 A8(AP) A9 A10 A11 BA0 BA1
DM0 DM1 DM2 DM3
DQS VREF
MCL RFU
RAS# CAS# WE# CS#
CKE CK
CK# NC
NC NC NC NC
8
5
14
VDDQ
VDDQ
VSSQ
VSSQ
11
22
19
+2_5V
59
VDDQ
VDDQ
VSSQ
VSSQ
62
67
VDDQ
VSSQ
70
73
76
L17
@CHB2012U121
L16
CHB2012U121
79
95
15
35
65
VDD
VDD
VDDQ
VDDQ
VDDQ86VDDQ
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
VSS
VSS
VSSQ
VSSQ82VSS
VSSQ92VSSQ
16
46
66
99
96
U13
VDD
VDD
NC NC NC NC NC NC NC
VSS
K4D62323HA
85
FBVDD
12
C187
C188 10UF_1206
.1UF
+2_5V+2_5V
12
C200 10UF_1206
FBVDD FBVDD
12
12
C263
C237 2200PF
NMD0
97
NMD1
98
NMD2
100
NMD3
1
NMD4
3
NMD5
4
NMD6
6
NMD7
7
NMD8
60
NMD9
61
NMD10
63
NMD11
64
NMD12
68
NMD13
69
NMD14
71
NMD15
72
NMD16
9
NMD17
10
NMD18
12
NMD19
13
NMD20
17
NMD21
18
NMD22
20
NMD23
21
NMD24
74
NMD25
75
NMD26
77
NMD27
78
NMD28
80
NMD29
81
NMD30
83
NMD31
84 38
39 40 41 42 43 44
.1UF
C226 10UF_1206
12
C194 .1UF
12
C482
C205
.1UF
2200PF
12
12
C179
C467
.1UF
.1UF
+2_5V
R112 1K_1%
1 2
R113 1K_1%
1 2
12
C203 2200PF
12
C466 .1UF
(10
VREF2 NVREF1
mil)
12
NMCLK1
NMCLK1#
12
12
C156 .1UF
C201 2200PF
C465 .1UF
1 2
NMA0 NMA1 NMA2 NMA3 NMA4 NMA5 NMA6 NMA7 NMA8 NMA9 NMA10 NMA11 NMA13 NMA12
NDQM4 NDQM5 NDQM6 NDQM7 NDQS4
NMRAS# NMCAS# NMWE# NMCS0#
NMCKE
R114 120
12
96
VDD
VDD
NC NC NC NC NC NC NC
VSS
85
U10
97 98 100 1 3 4 6 7 60 61 63 64 68 69 71 72 9 10 12 13 17 18 20 21 74 75 77 78 80 81 83 84
38 39 40 41 42 43 44
K4D62323HA
12
C155 2200PF
NMD32 NMD33 NMD34 NMD35 NMD36 NMD37 NMD38 NMD39 NMD40 NMD41 NMD42 NMD43 NMD44 NMD45 NMD46 NMD47 NMD48 NMD49 NMD50 NMD51 NMD52 NMD53 NMD54 NMD55 NMD56 NMD57 NMD58 NMD59 NMD60 NMD61 NMD62 NMD63
C195 .1UF
C196 10UF_1206
12
C464 .1UF
2
8
14
22
59
67
73
79
95
15
35
65
VDD
VDDQ
VDDQ
VDDQ
VDDQ86VDDQ
VSSQ
VSSQ
VSSQ82VSS
VSSQ92VSSQ
76
99
VDD
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
VSS
VSS
16
46
66
VDDQ
VDDQ
VDDQ
VDDQ
A0 A1 A2 A3 A4 A5 A6 A7 A8(AP) A9 A10 A11 BA0 BA1
DM0 DM1 DM2 DM3
DQS VREF
MCL RFU
RAS# CAS# WE# CS#
CKE CK
CK# NC
NC NC NC NC
VSSQ
5
VSSQ
11
VSSQ
19
62
VDDQ
VSSQ
70
31 32 33 34 47 48 49 50 51 45 36 37 29 30
23 56 24 57
94 58
52 93
27 26 25 28
53 55
54 87
88 89 90 91
D D
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
1
2
3
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
5
6
SCHEMATIC, M/B LA-1391
Size D ocume nt Number R e v Custom
401211
Date: Sheet
星期二 十一月
, 2002
7
16 44, 26
of
8
1B
1
A A
B B
C C
VDD_DAC1.8
VDD_DAC2.5
VDD_PNLIO1.8
VDD_PLL1.8
D D
VDD_MEMPLL1.8
VDD_PNLPLL1.8
VDD_MCLK2.5
1
2
U8C
E5
VSS
C3
VSS
B2
VSS
A1
VSS
D4
VSS
T10
VSS
T11
VSS
T12
VSS
T13
VSS
T14
VSS
T15
VSS
T16
VSS
T17
VSS
K10
VSS
K11
VSS
K12
VSS
K13
VSS
K14
VSS
K15
VSS
K16
VSS
K17
VSS
L10
VSS
L11
VSS
L12
VSS
L13
VSS
L14
VSS
L15
VSS
L16
VSS
L17
VSS
M10
VSS
M11
VSS
M12
VSS
M13
VSS
M14
VSS
M15
VSS
M16
VSS
M17
VSS
N10
VSS
N11
VSS
N12
VSS
N13
VSS
N14
VSS
N15
VSS
N16
VSS
N17
VSS
P10
VSS
P11
VSS
P12
VSS
P13
VSS
P14
VSS
P15
VSS
P16
VSS
P17
VSS
R10
VSS
R11
VSS
R12
VSS
R13
VSS
R14
VSS
R15
VSS
R16
VSS
R17
VSS
U10
VSS
U11
VSS
U12
VSS
U13
VSS
U14
VSS
U15
VSS
U16
VSS
U17
VSS
C4
VSS
D3
VSS
E4
VSS
F5
VSS
D5
VSS
AD23
AVDD
AD22
AVSSN
AC21
AVSSQ
AD16
A2VDD
AD15
A2VDDQ
AC15
A2VSSN
AC16
A2VSSN
AE15
A2VSSQ
AC13
LVDDR
AD14
LVDDR
AB13
LVSSR
AC14
LVSSR
AC19
TXVDDR
AD19
TXVDDR
AD18
TXVSSR
AD17
TXVSSR
AC18
TXVSSR
AE26
PVDD
AD26
PVSS
A2
MPVDD
A3
MPVSS
AE17
TPVDD
AF17
TPVSS
AE10
LPVDD
AF10
LPVSS
C5
VDDRH
M6-P
2
CORE & HOST & MEMORY & I/O POWER
3
VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC
VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1
VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3
VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP
3
+1_8V_VGA
AB11 H5 K5 M5 R5 U5 W5 AB8 AB14 AB7 AB17 AB19 W22 U22 R22 M22 K22 H22 E19 E17 E15 E12 E10 E8 AB12
D10 C7 C23 D12 D17 E3 F4 B24 F3 D6 C6 D15 D19 D22 G4 E6 E7 E9 E11 E13 E14 E16 E18 E20 E21 G5 H4 J5 K4 L5 M4 N5 P5 R4 D7
T5 U4 V5 W4 Y5 AA5 AC4 AB5 AB6 AB15 AB16 AB18 AB20 AB21 AB22 AC17 AC23 AC24
E22 F22 G22 H23 J22 K23 L22 M23 N22 P22 R23 T22 U23 V22 W23 Y22 AA22 AB23 AB24 D23 C24
PROPRIETARY NOTE
4
J4
1 2
PAD-OPEN 4x4m
L50
FBM-L11-201209-221
L51
FBM-L11-201209-221
For S3 mode,short J4
+2_5V
+3V_VGA
J5
1 2
PAD-OPEN 4x4m
J6
1 2
PAD-OPEN 4x4m
+1_5VS
For S3 mode,short J6
+3V
+3VS
SYSON31,33,40,42
SUSP#24,31,33,42
+1_8VS
+3VALW
C441
22UF_10V_1206
22UF_10V_1206
C129 10UF_1206
1 2
R495 @0
1 2
R496 0
C403
12
C453
1UF_0805
12
C406
.1UF_0402
12
C411
.1UF_0402
+5VALW
1 2
5
12
12
C439
C438
.1UF_0402
1000PF_0402
12
12
C417
.1UF_0402
12
C457
.1UF_0402
12
C407
1000PF_0402
12
C414
.1UF_0402
C404
1000PF_0402
12
C458
1000PF_0402
+3V_VGA
12
C408
1000PF_0402
+1_5VS
12
C420
.1UF_0402
+2.5Vdc Regulator
U24 AMS1503
5
Q35 TP0610T
13
2
R300
100K
13
22K
2
22K
Q4 DTC124EK
+1_8V_VGA
12
C437
1000PF_0402
+1_8V_VGA
12
C440
1000PF_0402
+2_5V
12
C459
1000PF_0402
12
C402
.1UF_0402
12
C424
.1UF_0402
Sense
Vpower
Control
4
1
C138 .1UF
Output
Adjust
12
C436
.1UF_0402
12
C405
.1UF_0402
12
C460
.1UF_0402
12
C409 .1UF_0402
12
C429 .1UF_0402
3
2
VREF 1.25V
6
12
C432
.01UF_0402
12
C415 .1UF_0402
12
C427
.1UF_0402
@FBM-L11-201209-221
@FBM-L11-201209-221 R111 @100_1%
1 2
R108 0
1 2
12
12
C426
.01UF_0402
.1UF_0402
J7
1 2
PAD-OPEN 4x4m
L48
L49
C421
+2_5V
+2_5V
For S3 mode,mount R496
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
5
6
7
8
POWER INTERFACE
VDD_PLL1.8
+1_8V_VGA
+1_8V_VGA
+1_8V_VGA
+1_8V_VGA
+1_8V_VGA
+2_5V
+
C137 150UF_D_6.3V
Title
Size D ocume nt Number R e v Custom
Date: Sheet
L30
CHB1608U301
L33
CHB1608U301
L27
CHB1608U301
L29
CHB1608U301
L28
1 2
CHB1608U301
L34
1 2
CHB1608U301
L32
CHB2012U121
C456 .1UF_0402
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1391 401211
星期二 十一月
7
, 2002
(20 mil)
C396
10UF_1206
VDD_MEMPLL1.8
(20 mil)
C469
@10UF_1206
VDD_PNLPLL1.8
(20 mil)
C384
10UF_1206
VDD_DAC1.8
(20 mil)
C385
10UF_1206
VDD_PNLIO1.8
(20 mil)
C380 .1UF
VDD_MCLK2.5
(20 mil)
C725 100PF
VDD_DAC2.5
(20 mil)
C728 100PF
C401
.1UF_0402
C471 .1UF_0402
C381
.1UF_0402
C383
.1UF_0402
C382
1000PF_0402
C463 .1UF_0402
C394 .1UF_0402
C726 100PF
C729 100PF
17 44, 26
of
8
C727 470PF
C730 470PF
1B
A
1
D27
@DAN217
2
1 1
LUMA14
CRMA14
COMPS14
2 2
3 3
DDC_MD214
M_SEN#14
4 4
LUMA
CRMA
COMPS
12
12
12
R256
R257
R252
75_1%
75_1%
75_1%
LCDVDD
Q21
2N7002
R248
75_1%
ENVDD
1 2
ENVDD14
R14
G14
B14
12
13
R255
75_1%
12
C355
150PF
+5V
R14
R13
100
10K
R12
2
13
47K
22K
2
22K
R259
75_1%
1 2
1 2
12
C356 150PF
Q22 DTC124EK
12
C362 18PF
C17 @47PF
L3 CHB1608U301
C13 @47PF
1 2
L1 CHB1608U301
L2 CHB1608U301
12
C354
150PF
2
22K
12
C361 18PF
HSYNC
VSYNC
3
1 2
1 2 1 2
1 2
1 2
C15 @47PF
+12V
13
22K
CHB2012U121_0805
CHB2012U121_0805
CHB2012U121_0805
12
C352 18PF
R7
D28
R11 100K
Q23 DTC124EK
1 2
1 2
1 2
@2.2K
1 2
CRT_VCC CRT_VCC
A
B
1
@DAN217
2
3
12
12
C14
270PF
12
C12
C16
270PF
+3V
2
C22
R10
1000PF
200K
CRT Connector
1
D2
DAN217
2
L21
L22
L23
12
C9 15PF
L20
1 2
CHB1608B121
L4
1 2
CHB1608B121
R264
@2.2K
1 2
B
1
D26
@DAN217
2
3
270PF
+
C364
4.7UF_1206
13
10V
Q24
SI2302DS
LCDVDD
+
C21
C23
4.7UF_1206 10V
.1UF
D4
DAN217
3
2
12
C7 15PF
12
C6 68PF
PROPRIETARY NOTE
C
PID[0..3 ]
1
12
BKOFF#31 ENVEE31
+5VS +5VS
3
C10 100PF
+3VS
RP24
45 36 27 18
8P4R-10K
BLON#14
D7
2 1
RB491D
C
12
+5VS
JP16
1 2 3 4 5 6 7
S CONN._SUYIN
1
D3
DAN217
3
2
12
C5 15PF
12
C26 68PF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PID3 PID2 PID1 PID0
1 2
FUSE_1A
C25 100PF
C8
220PF
D29
BLON#
F1
PID[0..3] 27
RB717F
3
2
G
CRT_VCCR_CRT_VCC
21
12
C27 .1UF
12
12
+3VS
R258 1K
13
D
S
CRT_VCC
C24 220PF
12
C358 .1UF
DISPOFF#
Q25 2N7002
B+
12
JP15 CRT-15P
6
11
1 7
12
2 8
13
3 9
14
4 10 15
5
C357 10UF_1210_35V
CRT_VCC CRT_VCC
DDCD DDCC
D
L24 CHB2012U170
B+
DAC_BRIG31
INVT_PWM31
12
R249
2.2K
L25 CHB2012U170
LCDVDD
TXOUT0+14
TXOUT0-14
TXOUT1+14
TXOUT1-14
TXOUT2+14
TXOUT2-14
TXCLKO+14
TXCLKO-14
PID0 PID1 PID2 PID3
TZOUT0+14
TZOUT0-14
TZOUT1+14
TZOUT1-14
TZOUT2+14
TZOUT2-14
TZCLKO+14
TZCLKO-14
LCD_DATA14
LCD_CLK14
12
R265
2.2K
D
1 2 1 2
DAC_BRIG INVT_PWM DISPOFF#
C738 68PF
HSYNC114
VSYNC114
R540 1K
1 2
E
JP1
IB+
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
ipex_20228-040e_f40p
12
12
C73968PF
+5VS
U62
1
+3VS
1 3
Q65 2N7002
12
R541 1K
2
Q66 2N7002
2 3
1 2 3
2
1 3
OE A GND
U61
OE A GND
5
VCC
4
Y
74AHCT1G125GW
5
VCC
4
Y
74AHCT1G125GW
+3VS
+5VS
12
HSYNC
VSYNC
R302
4.7K
+3VS
12
R303
4.7K
DDC_DATA 14
DDC_CLK 14
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1391
Size Do cum e nt Number R e v
401211
Dat e : Sheet
期二 十一月
E
of
18 44¬P , 26, 2002
1B
A
R518 220
1 2
AD[0..31]
AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10
AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 C/BE#3 C/BE#2 C/BE#1 C/BE#0
PCLK_1394
GNT#2 REQ#2
1394_IDSEL
FRAME# IRD Y# TRDY# DEVSEL#
STOP# PERR# PIRQC#
1394_PME#
SERR#
PAR
PCIRST#
1 2
22 24 25 26 28 29 31 32 37 38 40 41 42 43 45 46 61 63 65 66 67 69 70 71 74 76 77 79 80 81 82 84 34 47 60 73 16 18 19 36 49 50 52 53 54 56 13 21 57 58 12 85
14 89
90
R519
220
U57
TSB43AB22
PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0 PCI_C/BE3 PCI_C/BE2 PCI_C/BE1 PCI_C/BE0 PCI_CLK PCI_GNT PCI_REQ PCI_IDSEL PCI_FRAME PCI_IRDY PCI_TRDY PCI_DEVSEL PCI_STOP PCI_PERR PCI_INTA/CINT PCI_PME/CSTSCHG PCI_SERR PCI_PAR PCI_CLKRUN PCI_RST
G_RST GPIO3
GPIO2
AD[0..31]10,20,23
1 1
2 2
AD26
1 2
R504 100
3 3
1394_IDSEL
PCLK_139413
1394_PME#31
C/BE#310,20,23 C/BE#210,20,23 C/BE#110,20,23 C/BE#010,20,23
GNT#210 REQ#210
FRAME#10,20,23
IRDY#10,20,23
TRDY#10,20,23
DEVSEL#10,20,23
STOP#10,20,23
PERR#10,20,23
PIRQC#10
SERR#10,20,23
PAR10,20,23
CLKRUN#11,20,23,27,31
PCIRST#4,10,14,20,21,23,25,27,31,34
CBRST#20,21,23
B
PCI BUS IN TERFACE
AGND
AGND
AGND
AGND
PLLGND18REG_EN
9
109
110
111
117
+3V
87
78
VDDP20VDDP35VDDP48VDDP62VDDP
CYCLEIN
TSB43AB22
PHY PORT 2
BIAS CURRENT
OSCILLATOR
FILTER
EEPROM 2 W IR E BU S
POWER CLASS
PHY PORT 1
AGND
AGND
DGND44DGND55DGND64DGND
AGND
DGND17DGND23REG1830DGND
68
126
33
127
128
86
96
CNA
TEST1710TEST16
CYCLEOUT/CARDBUS
DGND75DGND83REG1893DGND
103
11
PLLVDD
TPBIAS1
FILTER0 FILTER1
TPBIAS0
DVDD DVDD DVDD DVDD DVDD DVDD DVDD DVDD
AVDD AVDD AVDD AVDD AVDD
CPS
TPA1+
TPA1-
TPB1+
TPB1-
SDA
SCL PC0
PC1 PC2
TPA0+
TPA0-
TPB0 +
TPB0 -
TEST9 TEST8
TEST3 TEST2 TEST1 TEST0
R0
R1 X0
X1
RP52
1 8 2 7 3 6 4 5
8P4R_4.7K
15 27 39 51 59 72 88 100 7 1 2 107 108 120
106
1 2
R500 1K
125 124
R501 1K
123 122
1 2
121
1 2
R502 1K
118
R503
6.34K_1%_0603
119 6
5
3
C624 .1UF
4 92
1 2
R505 220
91
1 2
R506 220
99 98 97
TPBIAS0
116 115 114 113 112
R509 220
94
R512 220
95
R513 220
101
R514 220
102
R516 220
104
R517 220
105
C
+3V
1 2
C621 .1UF
1 2
1 2 1 2
1 2 1 2 1 2 1 2
+3V
+3V
12
12
C619
.01UF
C622
1 2
Y4
24.576 MHz
15PF
C623
1 2
15PF
R507 56.2_1%_0603 C625
R508
56.2_1%_0603
R510
56.2_1%_0603
R515
56.2_1%_0603
L52
1 2
0_0805
C620
4.7UF_0805
TPA0+ TPA0­TPB0+ TPB0-
+3V
0.33UF_0603
R511
5.11K_1%_0603
C626 220PF
D
+3V
+3V
12
12
C606
.01UF
C615
.1UF
12
C607
.01UF
12
C616 .1UF
12
C608
.01UF
12
C617
.1UF
12
C609
.01UF
12
12
C611
C610
.1UF
.01UF
12
C618
.1UF
TPB0­TPB0+ TPA0­TPA0+
12
C612 .1UF
E
12
12
C613
C614
.1UF
.1UF
JP28
1
1
2
2
3
3
4
4
Molex SD-54030-0411
PCLK_1394
4 4
12
R520
@22
@0.1UF
1 2
C627
@0.1UF
1 2
C628
TSB43AB22 USE
C629
@10PF
PROPRIETARY NOTE
A
B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
For TSB43AA22 C627,C628 change to 0 ohm to short to GND
C
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1391
Size Do cum e nt Number R e v
401211
Dat e : Sheet
D
期二 十一月
19 44¬P , 26, 2002
E
1B
of
A
CardBus Controller OZ6933T (uBGA)
1 1
AD[0..31]10,19,23
S1_IOWR# S1_IORD# S1_OE# S1_CE2#
2 2
3 3
CLK_PCI_CB
R534
1 2
C649 @10PF
@33
S1_IOWR# 21 S1_IORD# 21 S1_OE# 21 S1_CE2# 21
C/BE#310,19,23 C/BE#210,19,23 C/BE#110,19,23 C/BE#010,19,23
AD16
R532 100
1 2
PCLK_PCM13
DEVSEL#10,19,23
FRAME#10,19,23
IRDY#10,19,23 TRDY#10,19,23 STOP#10,19,23
PAR10,19,23 PERR#10,19,23 SERR#10,19,23 REQ#310 GNT#310
PIRQA#10,14,23
PIRQB#10
PLOCK#10
PCIRST#4,10,14,19,21,23,25,27,31,34
PCM_PME#31 CLKRUN#11,19,23,27,31
RING#31
PCM_SPK#30
PCM1_LED32
PCM2_LED32
SIRQ10,27,31
CLK_PCI_CB
CardBus-OZ6933T-1
AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
B
C642 .1UF
U58
E1
AD31
E2
AD30
F3
AD29
F1
AD28
G5
AD27
H6
AD26
G3
AD25
G2
AD24
H2
AD23
H1
AD22
J1
AD21
J2
AD20
J3
AD19
J6
AD18
K1
AD17
K2
AD16
M5
AD15
N2
AD14
N1
AD13
N3
AD12
N6
AD11
P1
AD10
P3
AD9
N5
AD8
P6
AD7
R2
AD6
R3
AD5
T1
AD4
W4
AD3
R6
AD2
U5
AD1
P7
AD0
G1
C/BE3#
K3
C/BE2#
M3
C/BE1#
R1
C/BE0#
H5
IDSEL
E3
PCI_CLK
L3
DEVSEL#
K6
FRAME#
L1
IRDY#
L2
TRDY#
L5
STOP#
M2
PAR
L6
PERR#
M1
SERR#
G6
PCI_REQ#
F5
PCI_GNT#
B5
IRQ9/INTA#
F6
IRQ4/INTB#
V5
LOCK#
D1
RST#
B14
IRQ12/PME#
A4
IRQ14/CLKRUN#
V9
IRQ15/RING_OUT
K19
SPKR_OUT#
J19
LED_OUT/SKT_ACTIVITY
E8
SKTB_ACTV
C5
IRQ5/SERIRQ
E6
IRQ7/SIN#/B_VPP_PGM
+3V
+3VS
+3VS
R10
J18
B10
P5
L15
PCI_VCCF2PCI_VCCJ5PCI_VCCM6PCI_VCC
AUX_VCC
2
CARDBUS CONTROLLER
CORE_VCC
CORE_VCC
CORE_VCC
MICROO
OZ6933 209PIN CSP
PCI
GNDH3GNDK5GNDP2GNDW5GND
GND
NCE5IRQ3/VCC3#
GND
V15
K18NCB15
E11
C
CBRST# 19,21,23
S1_A6
S1_A7
S1_A1
S1_A4
S1_A2
S1_D10
S1_D1
S1_D8
S1_D9
L18
M19
M18
N18
GRST#
SCLK/A_VCC_5#
SDATA/B_VCC_3#
K14
K15
K17
W12
M15
A_D9/CAD30
A_D1/CAD29
A_D10/CAD31
SLATCH/B_VCC_5#
IRQ9/A_VPP_VCC
IRQ10/B_VPP_VCC
F19
P19
S2_D10
S1_A5
S1_A0
S1_A3
S1_D0
M17
N17
P18
R19
N14
R17
T19
R14
A_A0/CAD26
A_A1/CAD25
A_A2/CAD24
A_A3/CAD23
A_A4/CAD22
A_D8/CAD28
B_D10/CAD31B6B_D9/CAD30A6B_D1/CAD29B7B_D8/CAD28C7B_D0/CAD27A7B_A0/CAD26B8B_A1/CAD25A8B_A2/CAD24E9B_A3/CAD23B9B_A4/CAD22
A_A5/CAD21
A_D0/CAD27
S2_A0
S2_A1
S2_A2
S2_D9
S2_A3
S2_D1
S2_D8
S2_D0
S1_IORD#
S1_IOWR#
S1_A9
S1_A25
U15
P14
A_A6/CAD20
A_A25/CAD19
S1_OE#
S1_A17
S1_A24
S1_A11
W15
U11
V10
P10
P9
W11
U10
A_A7/CAD18
A_A9/CAD14
A_A24/CAD17
A_A17/CAD16
A_A11/CAD12
A_IOWR/CAD15
A_IORD#/CAD13
Slot A
Slot B
B_A5/CAD21
B_A6/CAD20
B_A25/CAD19
B_A7/CAD18
B_A24/CAD17
B_A17/CAD16
B_IOWR#/CAD15
F10
F11
E10
S2_A4
S2_A5
F15
B11
A11
E14
C11
D19
S2_A6
S2_A7
S2_A9
S2_A25
S2_A17
S2_A24
S1_D13
S1_D12
S1_D15
W9
A_A10/CAD9
B_A11/CAD12
G15
S1_D7
U8
A_D15/CAD8
B_OE#/CAD11
E19
A_D7/CAD7
B_CE2#/CAD10
S1_D11
S1_D3
S1_D6
S1_D5
S1_D4
R8
V7
W6
W7
U7
U6
A_SOCKET_VCC
H17
S2_D12
A_D4/CAD1P8A_D3/CAD0
B_D12/CAD4
H18
S2_D5
B_D5/CAD3
B_D11/CAD2
B_D4/CAD1
B_D3/CAD0
J14
J17
H19
S2_D11
S2_D3
S2_D4
A_SOCKET_VCC
A_REG#/CCBE3#
A_CE1#/CCBE0#
A_A23/CFRAME#
A_A21/CDEVSEL#
A_WAIT#/CSERR#
A_INPACK#/CREQ#
A_RDY_IRQ#/CINT#
A_A19/CBLOCK#
A_WP/CCLKRUN#
A_RST/CRESET#
A_BVD2/CAUDIO
A_BVD1/CSTSCHG B_BVD1/CSTSCHG
B_BVD2/CAUDIO
B_RESET/CRESET#
B_WP/CCLKRUN#
B_A19/CBLOCK#
B_RDY_IRQ#/CINT#
B_INPACK#/CREQ#
B_WAIT#/CSERR#
B_A21/CDEVSEL#
B_A23/CFRAME#
B_CE1#/CCBE0#
B_REG#/CCBE3#
A_D6/CAD5
A_D5/CAD3
A_D13/CAD6
A_D12/CAD4
A_D11/CAD2
B_A10/CAD9
B_D15/CAD8
B_D7/CAD7
B_D13/CAD6
B_D6/CAD5
F18
F17
H15
H14
G18
S2_D15
S2_D13
S2_D6
S2_D7
S2_A10
S1_CE2#
S1_A10
R9
U9
A_OE#/CAD11
A_CE2#/CAD10
B_A9/CAD14
B_IORD#/CAD13
F14
E17
S2_A11
A_A12/CCBE2#
A_A8/CCBE1#
A_A16/CCLK
A_A15/CIRDY#
A_A22/CTRDY# A_A20/CSTOP#
A_A13/CPAR
A_A14/CPERR
A_WE#/CGNT#
A_D2/RFU A_D14/RFU A_A18/RFU
A_VS1/CVS1
A_VS2/CVS2 A_CD1#/CCD1# A_CD2#/CCD2#
B_CD2#/CCD2# B_CD1#/CCD1#
B_VS2/CVS2
B_VS1/CVS1
B_A18/RFU B_D14/RFU
B_D2/RFU
B_WE#/CGNT#
B_A14/CPERR#
B_A13/CPAR
B_A20/CSTOP# B_A22/CTRDY#
B_A15/CIRDY#
B_A16/CCLK
B_A8/CCBE1#
B_A12/CCBE2#
B_SKT_VCC
B_SKT_VCC
B_SKT_VCC
D
R7 R13
N15 V14 V11 W8
V13 U14 P13 W14 U13 W13 R11 V12 R18 P17 R12 P12 U12 L17 P15 L19 V8 P11 W10 W16 V6 L14 M14 N19
F8 C8 C6 J15 A10 E18 C14 G17 F7 C10 A5 A14 F12 E13 C9 A9 A15 C15 C13 B13 A13 C12 B12 E12
G14 A16 A12 F9
G19 F13 E7
C643 .1UF
S1_A12 S1_A8
R531
1 2
S1_A23 S1_A15 S1_A22 S1_A21 S1_A20 S1_A13 S1_A14
S1_A19
S1_D2 S1_D14 S1_A18
S2_A18 S2_D14 S2_D2
S2_A19
S2_A14 S2_A13 S2_A20 S2_A21 S2_A22 S2_A15 S2_A23
R533 33
S2_A8 S2_A12
S2_VCC
C646 .1UF
33
1 2
C647 .1UF
+3VS
+3VS
S1_VCC
C644 .1UF
S1_REG# 21
S1_CE1# 21
S1_A16
S1_WAIT# 21 S1_INPACK# 21 S1_WE# 21 S1_RDY# 21
S1_WP 21 S1_RST 21
S1_VS1 21 S1_VS2 21 S1_CD1# 21 S1_CD2# 21 S1_BVD2 21 S1_BVD1 21
S2_BVD1 21 S2_BVD2 21 S2_CD2# 21 S2_CD1# 21 S2_VS2 21 S2_VS1 21
S2_RST 21 S2_WP 21
S2_RDY# 21 S2_WE# 21 S2_INPACK# 21 S2_WAIT# 21
S2_A16
S2_CE1# 21
S2_REG# 21
C648 .1UF
C645 .1UF
12
C634
4.7UF_10V_0805
C638 .1UF
C639 .1UF
S1_A[0..25]
S2_A[0..25] S2_D[0..15]
E
C635 .1UF
C636 .1UF
C640 .1UF
S1_A[0..25] 21 S1_D[0..15] 21
S2_A[0..25] 21 S2_D[0..15] 21
C637 .1UF
C641 .1UF
SLATCH 21 SLDATA 21
4 4
PROPRIETARY NOTE
A
B
RTCCLK 11,21
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
S2_CE2# S2_OE# S2_IORD# S2_IOWR#
S2_CE2# 21 S2_OE# 21 S2_IORD# 21 S2_IOWR# 21
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1391
Size Docu ment Number Re v Custom
401211
Date: Sheet
星期二 十一
D
?26, 2002
20 44, 
E
1B
of
PCMCIA POWER CTRL.
CARDBUS
1 2 1 2 1 2 1 2 1 2 1 2 1 2
S1_A[0..25]20 S1_D[0..15]20 S2_A[0..25]20
S2_ D [0 ..1 5 ]20
S2_VPP
S1_VPP
C502 1UF_25V_0805
C503 .1UF C529
.1UF
C530
.1UF
C504
.1UF
C531
.1UF
C505
.1UF
OCCB#32
+3V
1 2
12
12
C276 10UF_1206
C275 10UF_1206
R363 100K
W=30mils
C220
.01UF
W=30mils
C259
.01UF
S1_A[0..25] S1_D[0..15] S2_A[0..25] S2_D[0..15]
12
C281 56PF
12
C280 56PF
SLDATA20 SLATCH20
RTCCLK11,20
12
12
C288
.1UF
12
C287
.1UF
+5V_CBS
+3V
12
C223
1UF_25V_0805
C257 1UF_25V_0805
S1_VCC
12
C535
1000PF
S2_VCC
12
C295
1000PF
+12V
@1UF
25
7
24
1 2
30 15
16 17
3 5 4
13 19 18
C305
S1_VPP
U39
VCC_5V 12V
12V 5V
5V 5V
3.3V
3.3V
3.3V DATA
LATCH CLOCK
APWR_GOOD# BPWR_GOOD# OC#
TPS2206AI/TPS2216
PCIRST#4,10,14,19,20,23,25,27,31,34
+5V +5V_CBS
12
1 2 1 2
AVPP AVCC AVCC AVCC
BVPP BVCC BVCC BVCC
RESET
RESET#
NC NC NC NC
GND
12
R401 @10K R412 @10K
C306 .1UF
8 9 10 11
23 20 21 22
6 14
26 27 28 29
12
+3V
2 3
G_RST#31
S2_VPP
147
U15
1
IN
2
IN
3
RST#
4
SHDN#
@MAX1857
U41
1
IN
2
IN
3
RST#
4
SHDN#
@MAX1857
W=40mils
12
C528
4.7UF_10V_0805
W=40mils
12
C507
4.7UF_10V_0805
CBRST#
U49A
1
74LVC125
+3V POWER
J2
1 2
PAD-OPEN 4x4m
PROPRIETARY NOTE
S1_VPP S1_VCC
S2_VPP S2_VCC
1 2
R234 0
1 2
R233 @0
8
OUT
7
OUT
6
SET
5
GND
8
OUT
7
OUT
6
SET
5
GND
PCMRST# 32
CBRST#
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+3V
12
R232 10K
1 2
1 2
4.926V
R173 @100K_1%
1.25V
R174 @34K_1%
CBRST# 19,20,23
12
C267
@2.2UF_0805
S1_CD1#
@1000PF
S1_CD2#
@1000PF
S2_CD1#
@1000PF
S2_CD2#
@1000PF
C211
1 2
C331
1 2
C210
1 2
C330
1 2
S1_INPACK#20
S1_CD2#20
S1_BVD120 S1_BVD220
S1_REG#20
S1_WAIT#20
S1_RDY#20
S1_IOWR#20
S1_IORD#20
S1_CE2#20 S1_CE1#20
S1_CD1#20
S1_WP20
S1_RST20
S1_VS220
S1_VPP
S1_VCC
S1_WE#20
S1_OE#20 S1_VS120
JP26
A1
a68
A2
A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75
A3 A4 A5 A6 A7 A8 A9
a34 a67 a33 a66 a32 a65 a31 GND a64 a30 a63 a29 a62 a28 a61 GND a27 a60 a26 a59 a25 a58 a24 GND a57 a23 a56 a22 a55 a21 a54 GND a20 a53 a19 a52/a18 none a51/a17 a16 a50 a15 GND a49 a14 a48 a13 a47 a12 a46 GND a11 a45 a10 a44 a9 a43 a8 GND a42 a7 a41 a6 a40 a5 a39 GND a4 a38 a3 a37 a2 a36 a1 a35
PCMC150PIN
S1_CD2# S1_WP S1_D10 S1_D2 S1_D9 S1_D1
S1_D8 S1_D0 S1_BVD1 S1_A0 S1_BVD2 S1_A1 S1_REG#
S1_A2 S1_INPACK# S1_A3 S1_WAIT# S1_A4 S1_RST S1_A5
S1_VS2 S1_A6 S1_A25 S1_A7 S1_A24 S1_A12 S1_A23
S1_A15 S1_A22 S1_A16
S1_RDY# S1_A21 S1_WE#
S1_A20 S1_A14 S1_A19 S1_A13 S1_A18 S1_A8 S1_A17
S1_A9 S1_IOWR# S1_A11 S1_IORD# S1_OE# S1_VS1 S1_A10
S1_CE2# S1_CE1# S1_D15 S1_D7 S1_D14 S1_D6 S1_D13
S1_D5 S1_D12 S2_D12
S1_D4
S1_D11
S1_D3 S1_CD1#
GND
GND
GND
GND
b52/b18
none
b51/b17
GND
GND
GND
GND
B1
b68
B2
b34 b67 b33 b66 b32 b65 b31
b64 b30 b63 b29 b62 b28 b61
b27 b60 b26 b59 b25 b58 b24
b57 b23 b56 b22 b55 b21 b54
b20 b53 b19
b16 b50 b15
b49 b14 b48 b13 b47 b12 b46
b11 b45 b10 b44
b9
b43
b8
b42
b7
b41
b6
b40
b5
b39
b4
b38
b3
b37
b2
b36
b1
b35
B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75
S2_CD2# S2_WP S2_D10 S2_D2 S2_D9 S2_D1
S2_D8 S2_D0 S2_BVD1 S2_A0 S2_BVD2 S2_A1 S2_REG#
S2_A2 S2_INPACK# S2_A3 S2_WAIT# S2_A4 S2_RST S2_A5
S2_VS2 S2_A6 S2_A25 S2_A7 S2_A24 S2_A12 S2_A23
S2_A15 S2_A22 S2_A16
S2_RDY# S2_A21 S2_WE#
S2_A20 S2_A14 S2_A19 S2_A13 S2_A18 S2_A8 S2_A17
S2_A9 S2_IOWR# S2_A11 S2_IORD# S2_OE# S2_VS1 S2_A10
S2_CE2# S2_CE1# S2_D15 S2_D7 S2_D14 S2_D6 S2_D13
S2_D5 S2_D4
S2_D11 S2_D3 S2_CD1#
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1391
Size Do cum e nt Number R e v
401211
Dat e : Sheet
期二 十一月
SOCKET
S2_CD2# 20 S2_WP 20
S2_BVD1 20 S2_BVD2 20 S2_REG# 20
S2_INPACK# 20 S2_WAIT# 20 S2_RST 20
S2_VS2 20
S2_VPP S2_VCC
S2_RDY# 20 S2_WE# 20
S2_IOWR# 20 S2_IORD# 20
S2_OE# 20 S2_VS1 20
S2_CE2# 20 S2_CE1# 20
S2_CD1# 20
1B
of
21 44¬P , 26, 2002
5
4
3
2
1
U4
LANRXD2 LANRXD1 LANRXD0
36
VCCP
40
VCCP
14
VCCT
17
VCCT
25
VCC
1
VCC
9
VCCT
12
VCCT
2
VCCA
7
VCCA2
42
LAN_RSTSYNC
39
LAN_CLK
45
LAN_TXD2
44
LAN_TXD1
43
LAN_TXD0
37
LAN_RXD2
35
LAN_RXD1
34
LAN_RXD0
33
VSSP
38
VSSP
13
VSS
8
VSS
18
VSS
24
VSS
48
VSS
3
VSSA
6
VSSA2
INTEL-82562ET
LAN_X1 LAN_X2
12
C132 22PF
R79 33
1 2 1 2 1 2
+3V
1 2
D D
LAN_RST12
LAN_CLK12
LAN_TXD212 LAN_TXD112 LAN_TXD012
LAN_RXD212 LAN_RXD112 LAN_RXD012
C C
B B
A A
R85 33 R84 33 R78 33
VCCR VCCR
VSSR VSSR
LILED# ACTLED# SPDLED#
RBIAS100
RBIAS10
RDN RDP
TDN
TDP
ADV10
ISOL_TCK ISOL_TEX
ISOL_TI
TOUT
TESTEN
X247X1
Y1 25 MHz
46
19 23
20 22
27 32 31
5 4
16 15
11 10
41 30
29 28 26
21
+3V
12
C389
4.7UF_1206
R33 619 R34 562
12
LAN_VCC
12
C62 1000PF
LINK10_100# ACTIVITY#
1 2 1 2
LAN_RD­LAN_RD+
R31 100_1%
LAN_TD­LAN_TD+
R32 100_1%
R83 100
1 2
R77 100
1 2
R76 100
1 2
R30
100
1 2
C131 22PF
12
C60
4.7UF_1206
12
C64
4.7UF_1206
1 2
1 2
12
C390 .1UF
12
C119 .1UF
L10
4.7UH_0805
12
12
C61
0.1UF
12
C79 .1UF
+3V
U2
LAN_RD+ LAN_RD-
LAN_TD+ LAN_TD-
12
C375
0.01UF
Q2 DTA114YKA
+3V
E
3 1
C
47K
B
10K
1 2
R6 300
2
ACTIVITY#
Q1 DTA114YKA
+3V
E
3 1
47K
B
C
10K
RJ45_RX-
RJ45_RX+ RJ45_TX­RJ45_TX+
1 2
R3 300
2
LINK10_100#
RJ45_PR LANGND
12
C386 .1UF
12
12
C89 .1UF
C387 .1UF
12
12
C80
C377
.1UF
.1UF
12
1
RD+
2
RD-
3
CT
4
NC
5
NC
6
CT TD+7TX+
8
TD-
Pulse H0013
C63 @0.01UF
R1 75
1 2
Termination plane should be copled to chassis ground
RX+
RX-
CT NC NC CT
TX-
R2 75
1 2
1 2
1000PF_2KV_1206
16 15 14 13 12 11 10 9
R266
75
JP19
12
Amber LED+
11
Amber LED-
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
10
Green LED-
9
Green LED+
AMP RJ45/RJ11 with LED
C1
RJ45_RX+ RJ45_RX-
RJ45_TX+ RJ45_TX-
12
12
R267 75
RJ45_PR
16
SHLD4
15
SHLD3
14
SHLD2
13
SHLD1
C11
.1UF
12
C3
4.7UF_10V_0805
12
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
5
4
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
SCHEMATIC, M/B LA-1391
Size Do cum e nt Number R e v
401211
Dat e : Sheet
期二 十一月
1
of
22 44¬P , 26, 2002
1B
+3V
+3VALW
EN_WOL#31
12
C44 @1UF_25V_0805
Q3 @SI2301DS
S
G
2
D
13
1 2
R26
@100K
+3.3VAUX
12
R29
1 2
C58 @1UF_25V_0805
+5VALW
+3V
0
+3VS_MINIPCI
+3V
CHB1608B121
PCLK_MINI
12
R27 10
12
C50 33PF
WL_OFF#32,34
KILL_SW#32,34
1 2
0603
5
1 2
L8
W=40mils
4
U3
3
7SH08FU
PCLK_MINI13
CLKRUN#11,19,20,27,31
+5VS_MINIPCI
+5VS
D8 RB751V
PIRQA#10,14,20
REQ#010 GNT#0 10
C/BE#310,19,20
C/BE#210,19,20
IRDY#10,19,20
SERR#10,19,20
PERR#10,19,20 C/BE#110,19,20
1 2
L5 0
+5VS_MINIPCI
TIP RING
LAN RESERVED
21
PIRQA#
AD31 AD29
AD27 AD25
AD23 AD21
AD19 AD17
AD14 AD12
AD10 AD8
AD7 AD5 AD3
W=30mils
AD1
W=30mils W =20mils
0603
JP20
112
KEY KEY
334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152 535354 555556 575758 595960 616162 636364 656566 676768 696970 717172 737374 757576 777778 797980 818182 838384 858586 878788 898990 919192 939394 959596 979798 9999100
101
101
103
103
105
105
107
107
109
109
111
111
113
113
115
115
117
117
119
119
121
121
123
123
Mini-P CI SLOT
2 4
6 8
LAN RESERVED
10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102
102
104
104
106
106
108
108
110
110
112
112
114
114
116
116
118
118
120
120
122
122
124
124
W=40mils
MINI_RST#
MINI_IDSEL
12
W=30mils
PIRQD#
AD30 AD28
AD26 AD24
AD22 AD20
AD18 AD16
AD15 AD13 AD11
AD9
AD6 AD4 AD2 AD0
C55 .1UF
1 2
+3.3VAUX
+3.3VAUX
R28
100
MINI_RST#
+5VS_MINIPCI
PIRQD# 10
WLANPME# 31
AD27
PAR 10,19,20
FRAME# 10,19,20 TRD Y# 10,19,20 STOP# 10,19,20
DEVSEL# 10,19,20
C/BE#0 10,19,20
1 2
R35 0
1 2
R36 @0
W=40mils
PCIRST#
+3VS_MINIPCI
L9
1 2
CHB1608B121
0603
IDSEL : AD27
PCIRST# 4,10,14,19,20,21,25,27,31,34 CBRST# 19,20,21
+3V
12
C36 .1UF
C49 @1000PF
12
C54
.1UF
12
C37 @.1UF
C52 .1UF
+5VS_MINIPCI
12
C38
C39 @10U_1210
@.1UF
+3VS_MINIPCI
12
12
C363 .1UF
C51 .1UF
C53 10UF_1210
Compal Electronics, Inc.
Title
AD[0..31]
AD[0..31] 10,19,20
PROPRIETARY NOTE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SCHEMATIC, M/B LA-1391
Size Do cum e nt Number R e v
401211
Dat e : Sheet
期二 十一月
of
23 44¬P , 26, 2002
1B
+5VCD
OSC1 OSC2
C573 10PF
C336
R239 10K
1 2
+5VALW
C334 10UF_1206
+5VALW
D25
RB751V
X4
8MHZ R449
1M
10UF_1206
21
C333 1UF_0805
+5VALW
1 2
SUSP#17,31,33,42
CDD[0..15]
SDD[0..15]
C574 10PF
+5VCD
R230 240K
C335
1U_0805
Q50
2N7002
2
PLAYBTN#34
FRDBTN#34 REVBTN#34
1 3
8
D
7
D
6
D
5
13
1 2
R223 0
D23
@RB751V
SDA011 SDA111 SDA211
SDCS1#11 SDCS3#11
SDIOR#11 SDIOW#11
SDIORDY11
IRQ1510 SDDREQ11 SDDACK#11
SIDE_RST#25
CD_INTA#32
2
12
+5VCD
R439 100K
+5VCD
13
OZ_STOPBTN#
21
SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
SDA0 SDA1 SDA2
SDCS1# SDCS3#
SDIOR# SDIOW#
SDDREQ SDDACK#
DM_ON PLAYBTN# FRDBTN# REVBTN#
OZ_STOPBTN#
DM_ON INTN
12
OSC1 OSC2
R428 100K
C321 10UF_1206
22K
2
22K
Q19 DTC124EK
STOPBTN#32,34
CD_STOPBTN#32
CDD[0..15] 25
SDD[0..15] 11
EC_SMD22,31
Q52 2N7002
1 3
EC_SMC22,31
1 2
R477 100K
U16
1
S
2
S
3
S G4D
SI4425DY
1 2
R238 10K
2
22K
Q18 DTC124EK
22K
SUSP# CDPLAY
76
HDD0
78
HDD1
81
HDD2
83
HDD3
86
HDD4
90
HDD5
95
HDD6
97
HDD7
2
HDD8
4
HDD9
8
HDD10
11
HDD11
15
HDD12
18
HDD13
20
HDD14
22
HDD15
68
HDA0
70
HDA1
66
HDA2
63
HCS0
61
HCS1
99
HDIOR#
6
HDIOW#
72
HIOCS16#
93
HIORDY
74
HINTRQ
12
HDMARQ
88
HDMACK#
24
HRESET#
59
HDASPN
48
HSYNC
53
HBIT_CLK
55
HDATA_OUT
50
HDATA_IN
46
HACRSTN
28
PAV_EN
36
PLAY/PAUSE
35
FFORWARD
34
REWIND
37
STOP/EJECT
29
PCSYSTEM_OFF
25
INTN
30
RESET#
26
SDATA
27
SCLK
31
OSCI
32
OSCO
C317
.1UF
CD_PLAY 32
PROPRIETARY NOTE
+5VOZ
58
VDD9VDD44VDD
CDD0 CDD1 CDD2 CDD3 CDD4 CDD5 CDD6 CDD7 CDD8
CDD9 CDD10 CDD11 CDD12 CDD13 CDD14 CDD15
CDA0
CDA1
CDA2
CCS0
CCS1
CDIOR#
CDIOW#
CIOCS16#
CIORDY
CHINTRQ CDMARQ
CHDMACK#
CRESET#
CDASPN
SSYNC
SBIT_CLK
SDATA_OUT
SDATA_IN SACRSTN
PWR_CTL
ISCDROM
GPIO[1]/VOL_UP GPIO[0]/VOL_DN
MODE0 MODE1
PAVMODE
CSN
INCN
UDN
+5VOZ
C302
.1UF
U42 OZ168
77 79 82 84 87 91 96 98 1 3 7 10 14 17 19 21
69 71 67
64 62
100 5 73 94
75 13 89
23 60
47 52 54 49 45
51
80 39
40
56 57
38 41
42 43
C554 .1UF
CDD0 CDD1 CDD2 CDD3 CDD4 CDD5 CDD6 CDD7 CDD8 CDD9 CDD10 CDD11 CDD12 CDD13 CDD14 CDD15
CD_SBA0 CD_SBA1 CD_SBA2
CD_SCS1# CD_SCS3#
CD_SIOR# CD_SIOW# CIOCS16# CD_SIORDY
CD_IRQ CD_DREQ CD_DACK#
CD_RSTDRV# CDASPN
1 2
R215
1 2
R216 10K
1 2
R176 @0 GPIO_1 GPIO_0
R207 @1K
1 2
MODE1
1 2
R227 10K
@10K
C557 .1UF
C576 .1UF
CD_SBA0 25 CD_SBA1 25 CD_SBA2 25
CD_SCS1# 25 CD_SCS3# 25
CD_SIOR# 25 CD_SIOW# 25
CD_SIORDY 25
CD_IRQ 25 CD_DREQ 25 CD_DACK# 25
CD_RSTDRV# 25
+5VCD
ISCDROM
CHB1608U301
1 2
L41
1 2
L42 CHB1608U301
1 2
R177 0
+5VCD
MEDIA_DETECT 32
+5VCD
GND16GND33GND65GND85GND
92
DM_ON
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+5VCD
R228 100K
DM_ON#
13
2
Q17
2N7002
SUSP#
DM_ON# 29
R454 100K
DM_ON
13
2
Q54 2N7002
DM_ON 29
+5VCD
ISCDROM CD_IRQ CDASPN MODE1
GPIO_0 GPIO_1 OZ_STOPBTN#
PLAYBTN# FRDBTN# REVBTN# INTN
CDD7 CDD6 CDD5 CDD4 CDD3 CDD2 CDD1 CDD0
CDD8 CDD9 CDD10 CDD11 CDD12 CDD13 CDD14 CDD15
CD_SIORDY
CIOCS16#
CDD7 CD_DREQ
RP46
1 8 2 7 3 6 4 5
8P4R-10K
RP49
1 8 2 7 3 6 4 5
8P4R-10K
RP48
1 8 2 7 3 6 4 5
8P4R-10K RP45
1 2 3 4 5 6 7 8 9
@16P8R_4.7K RP47
8 9 7 6 5 4 3 2 1
@16P8R_4.7K
1 2
R399 1K
1 2
R411 47K
1 2
R398 10K
1 2
R206 5.6K
16 15 14 13 12 11 10
10 11 12 13 14 15 16
+5VCD
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1391
Size Do cum e nt Number R e v
401211
期二 十一月
Dat e : Sheet
of
24 44¬P , 26, 2002
1B
+5VS
IDE,CD-R O M Module CONN.
+5VS
C351
12
C350
1000PF
Place component's closely IDE CONN.
PIDE_RST#
PDD7 PDD6 PDD5 PDD4 PDD3 PDD2 PDD1 PDD0
PDDREQ11 PDIOW#11 PDIOR#11 PDIORDY11 PDDACK#11 IRQ1410 PDA111 PDA011 PDCS1#11 PDCS3# 11 PHDD_LED#32
1 2
+5VS
R243 100K
+5VCD
PDD[0..15]11 CDD[0..15]24
IRQ14 PDA1
PDCS1#
CD_SIOW#24 CD_SIORDY24 CD_IRQ24 CD_SBA124 CD_SBA024 CD_SCS1#24 SHDD_LED#32
1 2
R188
PDIOW# PDIOR#
INT_CD_L29
CD_RSTDRV#24
CD_AGND29
100K
+5VS
PDD[0..15]
CDD[0..15]
+5VCD
SHDD_LED#
CD_RSTDRV#
CDD7 CDD6 CDD5 CDD4 CDD3 CDD2 CDD1 CDD0
SHDD_LED#
12
R452 470
C593 10UF_1210
JP13
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44
HDD 44P
12
C594
1UF_25V_0805
JP25
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
CD-ROM C ONN.
12
PCSEL
PDA2PDA0
PDCS3#
.1UF
PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
1 2
R244 470
+5VS
W=80mils
CDD8 CDD9 CDD10 CDD11 CDD12 CDD13 CDD14 CDD15
PDIAG#
1 2
C311
PDA2 11
PDIOW# PDIOR#
R189
1 2
.1UF
12
R535 10
12
C765 15PF
INT_ CD_R 29
CD_DREQ 24 CD_SIOR# 24
CD_DACK# 24
100K
+5VCD CD_SBA2 24 CD_SCS3# 24
+5VCD
+5VCD
+5VS
STEP#
WDATA# WGATE# HDSEL#
+5VS
RP50
8P4R_1K
6 7 8 9
10
FDDIR#
18
DRV0#
27
DSKCHG#
36
MTR0#
45
RP51
10P8R_1K
12
C584
C586 10UF_1210
1000PF
Place component's closely FDD CONN.
5 4 3 2 1
INDEX# TRACK0# WP# RDATA#
+5VS
12
C587
1UF_25V_0805
INDEX#27
DRV0#27,32
DSKCHG#27
MTR0#27
FDDIR#27
3MODE#27
STEP#27 WDATA#27 WGATE#27
TRACK0#27
RDATA#27 HDSEL#27
C585
12
.1UF
+5VS
JP11
1
INDEX# DRV0# DSKCHG#
MTR0# FDDIR#
3MODE# STEP#
WDATA# WGATE# TRACK0#
WP#27
WP# RDATA# HDSEL#
2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
85201-2605
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
12
R536 10
12
C766 15PF
+5VS
C342
12
0.1UF
PCIRST#4,10,14,19,20,21,23,27,31,34
PIDERST#10
SIDERST#10
PCIRST#
C590
0.1UF
PCIRST#
U18
5
1 2
3
7SH08FU
+5VS
PIDE_RST#
4
12
U52
5
1 2
3
7SH08FU
SIDE_RST#
4
SIDE_RST# 24
+5VCD
W=80mils
12
C300
C309 10UF_1210
1000PF
Place component's closely CD-ROM CONN.
12
C308 1UF_25V_0805
12
C301 .1UF
PROPRIETARY NOTE
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SCHEMATIC, M/B LA-1391
Size Do cum e nt Number R e v
401211
Dat e : Sheet
期二 十一月
1B
of
25 44¬P , 26, 2002
+5V_PRN
109876
12345
+5V_PRN
109876
12345
IAC_SDATAO11,29
IAC_RST#11,29
AFD#/3M# LPTERR# LPTINIT# LPTSLCTIN#
1 2
+3VS
L13 CHB1608B121
LPTSLCT LPTPE LPTBUSY LPTACK#
RP2 10P8R-2.7K
+5V_PRN
FD4 FD5 FD6 FD7
RP22 10P8R-2.7K
+5V_PRN
FD3 FD2 FD1 FD0
MD_MIC29 MDC_DN# 32
+3.3VAUX
+3VS_MDC
INIT#27
SLCTIN#27
JP21
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
AMP 108-5424
R246 33
1 2
R247 33
1 2
LPD0 FD0 LPD1 FD1 LPD2 FD2 LPD3 FD3
LPD7 FD7 LPD6 FD6 LPD5 FD5 LPD4 FD4
LPD[0..7]27
RP23
1 8 2 7 3 6 4 5
8P4R-68
LPD[0..7]
+5VS_MDC
1 2
L15 CHB1608B121
1 2
R117 10K
1 2
R476 0
1 2
R119 22
LPTINIT#
LPTSLCTIN#
RP1
1 8 2 7 3 6 4 5
8P4R-68
PROPRIETARY NOTE
MD_SPK 29
IAC_SYNC 11,29
1 2
R118 22
IAC_BITCLK 11,29
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+5VS
+3VS
IAC_SDATAI1 11
PARALLEL PORT
+5V_PRN
+5VS
LPTSTB#27
LPTAFD#27
LPTERR#27
LPTACK#27 LPTBUSY27
LPTPE27
LPTSLCT27
LPTSTB# AFD#/3M#
FD0 LPTERR#
LPTINIT# FD2 LPTSLCTIN# FD3
FD4 FD5 FD6 FD7 LPTACK# LPTBUSY LPTPE LPTSLCT
RB420D
R4
33
R245
33
R5
2.2K
C4 220PF
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
JP14
21
9
LPTCN-25
22 10 23 11 24 12 25 13
D6
2 1
AFD#/3M# LPTERR# LPTINIT# LPTSLCTIN#
LPTSLCT LPTPE LPTBUSY LPTACK#
FD0 FD1 FD2 FD3FD1
FD4 FD5 FD6 FD7
CP1
1 8 2 7 3 6 4 5
8P4C-220PF CP2
4 5 3 6 2 7 1 8
8P4C-220PF
CP4
1 8 2 7 3 6 4 5
8P4C-220PF
CP3
1 8 2 7 3 6 4 5
8P4C-220PF
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1391
Size Do cum e nt Number R e v
401211
Dat e : Sheet
期二 十一月
26 44¬P , 26, 2002
1B
of
A
B
C
D
E
SUPER I/O SMsC FDC47N227
1 1
LPD[0..7]
LPD0
68
LPD1
69
LPD2
70
LPD3
71
LPD4
72
LPD5
73
LPD6
74
LPD7
75
LPTBUSY
79
LPTPE
78
LPTSLCT
77
LPTERR#
81
LPTACK#
80 66 82 83 67
100
CTS#2
99 98
DSR#2
97 96 95
DCD#2
94
RI#2
92
DTR#1
89
CTS#1
88
RTS#1
87
DSR#1
86
TXD1
85
RXD1
84
DCD#1
91
RI#1
90 63
61 62
16 10 11 12 8 9 5 13 4 15 14 3 1
2 49
Base I/O Address
0 = 02Eh
*
1 = 04Eh
IRRX
DSKCHG#
R440 1K
R213 1K
RDATA# WDATA# WGATE#
HDSEL#
FDDIR#
STEP#
DRV0#
INDEX#
WP#
TRACK0#
MTR0#
R240 10K R214 1K
LPTBUSY 26 LPTPE 26 LPTSLCT 26 LPTERR# 26 LPTACK# 26 INIT# 26 LPTAFD# 26 LPTSTB# 26 SLCTIN# 26
1 2
1 2
1 2
LPD[0..7] 26
IRMOD E 28 IRRX 28 IRTXOUT 28
RDATA# 25 WDATA# 25 WGATE# 25 HDSEL# 25 FDDIR# 25 STEP# 25 DRV0# 25,32 INDEX# 25 DSKCHG# 25 WP# 25 TRACK0# 25 MTR0# 25 3MODE# 25
12
+5VS
DCD#1 RI#1 CTS#1 DSR#1
IRRX
1 2
R193 1K
RP20
1 8 2 7 3 6 4 5
8P4R-4.7K
+5V
CTS#2 DSR#2 DCD#2
RI#2
RXD1 TXD1 DSR#1 RTS#1 CTS#1 DTR#1
RI#1
DCD#1
RP21
1 8 2 7 3 6 4 5
8P4R-4.7K
JP24
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
@96212-1011S
+3VS+3VS
SIRQ10,20,31
PID018 PID118 PID218 PID318
+3VS
C298
4.7UF_0805
10V
+3VS
+3VS
LAD[0..3]
LAD0 LAD1 LAD2 LAD3
1 2
R205 10K
PCLK_SIO
14.3M_SIO
1 2
R194 10K
1 2
R498 100K
12
C296 .1UF
R241 10K
12
C339 .1UF
1 2
12
C329 .1UF
U17
20
LAD0
21
LAD1
22
LAD2
23
LAD3
24
LFRAME#
25
LDRQ#
26
PCIRST#
27
LPCPD#
50
GPIO12/IO_SMI#
17
IO_PME#
30
SIRQ
28
CLKRUN#
29
PCICLK
19
CLK14
48
GPIO10
54
GPIO15
55
GPIO16
56
GPIO17
57
GPIO20
58
GPIO21
59
GPIO22
6
GPIO24
32
GPIO30
33
GPIO31
34
GPIO32
35
GPIO33
36
GPIO34
37
GPIO35
38
GPIO36
39
GPIO37
40
GPIO40
41
GPIO41
42
GPIO42
43
GPIO43
44
GPIO44
45
GPIO45
46
GPIO46
47
GPIO47
51
GPIO13/IRQIN1
52
GPIO14/IRQIN2
64
GPIO23/FDC_PP
18
VTR
53
VCC
65
VCC
93
VCC
7
VSS
31
VSS
60
VSS
76
VSS
SMsC LPC47N227
PD0/INDEX#
PD1/TRK0
PD2/WRTPRT#
PD3/RDATA#
PD4/DSKCHG#
PD5
PD6/MTR0#
PD7
BUSY/MTR1#
PE/WDATA#
SLCT/WGATE#
ERROR#/HDSEL#
ACK#/DS1#
INIT#/DIR#
AUTOFD#/DRVDEN0#
STROBE#/DS0# SLCTIN#/STEP#
DTR2# CTS2# RTS2#
DSR2#
TXD2
RXD2
DCD2#
RI2#
DTR1# CTS1# RTS1#
DSR1#
TXD1
RXD1
DCD1#
RI1#
IRMODE/IRRX3
IRRX2 IRTX2
RDATA# WDATA# WGATE#
HDSEL#
DIR#
STEP#
DS0#
INDEX# DSKCHG# WRTPRT#
TRK0#
MTR0#
DRVDEN0 DRVDEN1
GPIO11/SYSOPT
LAD[0..3]11,31
LFRAME#11,31
LDRQ#111
PCIRST#4,10,14,19,20,21,23,25,31,34
SUS_STAT#11,14,34
CLKRUN#11,19,20,23,31
PCLK_SIO13
14.3M_SIO13
2 2
FIREN#28
1 2
R195 10K
1 2
R192 10K
3 3
PCLK_SIO14.3M_SIO
R242 10
1 2
C340
1 2
15PF
R237
33
1 2
C332
1 2
22PF
+3VS
4 4
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
A
B
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
SCHEMATIC, M/B LA-1391
Size Do cum e nt Number R e v
401211
Dat e : Sheet
期二 十一月
E
of
27 44¬P , 26, 2002
1B
C353
@10UF 6.3V_A
FIREN#27 USB1_D-11
USB1_D+11
IRMODE27
+3VS
USB_AS
+3VS
12
JP18
1 2 3 4 5 6 7 8 9 10
12
11
14
13 15 16 171918
20
80065AR-020G2T
USB_BS
USB3_D- 11 USB3_D+ 11
IRRX 27 IRTXOUT 27
+
+3VUSB_AS
USB_BS
PROPRIETARY NOTE
R482 100K
12
R483 100K
1 2
1 2
R484 47
R485 47
12
+5V
U55
1
GND
2
IN
12
C597
+
C376
150UF_E
USB_EN#11
1 2
R487 0
.1UF
USBEN#
3
EN1#
4
EN2#
TPS2042
12
R488 1K
OC1# OUT1 OUT2
OC2#
8 7 6 5
12
12
R566
R567
100K
100K
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SCHEMATIC, M/B LA-1391
Size Do cum e nt Number R e v
401211
Dat e : Sheet
C598
.1UF
期二 十一月
OVCUR#1
OVCUR#3
12
12
C599 .1UF
OVCUR#1 11
OVCUR#3 11
of
28 44¬P , 26, 2002
1B
C580
4.7UF_10V_0805
+5VS
AC97 C odec
U51
4
12
12
C578 .1UF
CDROM_L CDROM_R
MIC30
MD_SPK26
MONO_IN30
IAC_RST#11,26
IAC_SYNC11,26
IAC_SDATAO11,26
EAPD30
VIN
2
DELAY ERROR7CNOISE
8
ON/OFF#
SI9182
R221 6.8K R451 6.8K
R220 20K R441 20K
MIC
R204 100
12 12
12 12
12
VOUT
SENSE
GND
1 2
C605
R222 10K
5 6 1 3
CD_L_R
C567 1UF_25V_0805
CD_R_R
C569 1UF_25V_0805
CD_GNA
C568 1UF_25V_0805 C565 1UF_25V_0805
0.01UF
12
C566 1UF_25V_0805
12
C577 .1UF
12
C310 .1UF
AUD_VREF
1 2 1 2 1 2 1 2
AUD_VREF
1 2
12
VDDA
12
4.7UF_10V_0805
VDDA
C579
4.7UF_10V_0805
L18
1 2
CHB2012U170
C291
U43
14
AUX_L
15
AUX_R
16
VIDEO_L
17
VIDEO_R
23
LIN_IN_L
24
LIN_IN_R
18
CD_L
20
CD_R
19
CD_GNA
21
MIC1
22
MIC2
13
PHONE
12
PC_BEEP
11
RESET#
10
SYNC
5
SDATA_OUT
45
ID0#
46
ID1#
47
EAPD#
48
S/PDIF_OUT
4
GND
7
GND
AVDD_AC97
38
AVCC25AVCC
VCC1VCC
LINE_OUT_L LINE_OUT_R
MONO_OUT
HP_OUT_L
HP_OUT_R
BIT_CLK
SDATA_IN
XTL_IN
XTL_OUT
AFLT1 AFLT2
VREFOUT
REFFLT
FLT3D
BPCFG
FLTI
FLTO
AGND AGND
CS4299A
INT_CD_L25
INT_ CD_R25
DM_ON24
+5VAMP_PU R460 0
+3VS
VDDC
12
9
LINEL
35
LINER
36 37 39
C561
.1UF
R438
1 2
12
C559
4.7UF_10V_0805
12 1 2 1 2 1 2 1 2
12
+3VS
0
C542 1000PF C304 1000PF C297
4.7UF_10V_0805 C290
4.7UF_10V_0805 C299 1UF_0805 C286 1000PF
LEFT RIGHT
LEFT 30 RIGHT 30 MD_MIC 26
1 2
+5VAMP_PU
DM_ON#24
41
R423
1 2
12
C547
1000PF
22 R422 22
C549 1000PF
1 2
1 2
R203 0
IAC_BITCLK 11,26 IAC_SDATAI 11
Y3
24.576 MHz
R418 @100K
1 2
C541 22PF
C545 22PF
AUD_VREF
12
C546 .01UF
12
12
C558 .1UF
C560 1UF_25V_0805
6
1 2
8
1 2
2
3 29
C555 1000PF
30 28 27 32
31 33 34 43
NC
44
NC
40
NC
26 42
1UF_25V_0805
1UF_25V_0805
R202 10K
C591
10UF_1206
R459 10K
C289
R_INT_CD_L
C583
R_INT_CD_R
DM_ON
R_INT_CD_L CDROM_L
12
12
R198 @10K
R_INT_CD_R
12
12
R458 @10K
DM_ON#
L19 0_0805
1 2
L43 0_0805
1 2
L39 0_0805
1 2
Q15 2N7002
Q57 2N7002
Q49 2N7002
Q56 2N7002
2
2
2
2
12
13
13
13
13
C319 .1UF
1 3
1 3
1 3
1 3
Q46 2N7002
2
Q47 2N7002
2
Q48 2N7002
2
Q55 2N7002
2
AUD_VREF
12
4.7UF_10V_0805
LEFT
input to AMPLIFY
RIGHT
input to CS 4297A
CDROM_R
C318
CD_GNA
R218
12
R219
3.3K
12
0
R450
3.3K
PROPRIETARY NOTE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Do cum e nt Number R e v
Dat e : Sheet
Com pal Electronics, Inc.
SCHEMATIC, M/B LA-1391
401211
期二 十一月
1B
of
29 44¬P , 26, 2002
CD_AGND25
12
A
B
C
D
E
AMP & A udio Jack
JP8
5 4 3
6 2 1
PHONEJACK
JP6
5 4 3
6 2 1
PHONEJACK
EXT. MICPHONE
JACK
SHUTDOWN#
NBA_PLUG
C234
1 2
INTSPK_L2 INTSPK_R2
12
C524 .47UF
MONO_IN
+5VCD
.1UF
12
R387
13
Q45
2N7002
12
C523 .47UF
100K
2
MONO_IN 29
R157 100K
INTSPK_R1
INTSPK_L1
EAPD 29
C518 150UF_D
1 2 1 2
C533 150UF_D
AVDD_AC97
MIC29
12
+ +
+5VCD
1 2
R393 47
1 2
R397 47
R377 18K_1%
1 2 1 2
R382 18K_1%
MIC
L38
1 2
FBM-11-160808-700T
1 2
L40
FBM-11-160808-700T
12
R381 100K
1 2
L36 FBM-11-160808-700T
12
C512 1UF
INTSPK_L1 INTSPK_L2
INTSPK_R1 INTSPK_R2
NBA_PLUG INTSPK_R1-3 INTSPK_L1-3
C536 330PF
2
R378 @2.2K
12
AVDD_AC97
3 1
12
12
12
C527 330PF
Q41 2SC2411EK
12
R481
2.2K
C509 220PF
JP7
1 2
SPEAER-R
JP9
1 2
SPEAKER-L
+5VCD
R429
3.9K
1 2
1
4 4
3 3
2 2
1 1
4
VOL_AMP
3
3
1 2
5 6
+3V POWER
U49B 74LVC125
R453
1.2K
2
VR1
4
10K
LEFT29
RIGHT29
+3V
12
R209 100K
1 2
R210 8.2K
.22UF
PCM_SPK#20
SPKR11
C550
R172 100K
C273 .47UF
C233 .47UF
12
1 2
1 2 1 2
+3V
147
+3V
1 2
C232 .47UF
1 2
U48E
74LVC14
+3V POWER
147
U48F
74LVC14
+3V POWER
VOL_AMP INTSPK_L1 INTSPK_R1
1 2
C272 .47UF
C307
.1UF
1011
1213
C328
1 2
1UF
C327
1 2
1UF
C322
1 2
1UF
12
C271 .1UF
1 2
1 2
1 2
5
BEEP#31
W=40Mil
R236
560
R235
560
R226
560
+5VCD
C235
12
.047UF_0805
12
12
R231 10K
C274 .1UF
18 19
21 23 20 17
7
2 3 4
5 6
2
12
C269
4.7UF_10V_0805
U14
PVDD
SHUTDOWN# PVDD VDD
PC-ENABLE VOLUME LOUT+ ROUT+ LLINEIN RLINEIN LHPIN RHPIN
CLK
TPA0132
VDDA
12
R224 10K
12
R217 10K
Q51 2SC2411EK
3 1
D24
RB751V
2 1
SE/BTL#
PC-BEEP
BYPASS
LOUT­ROUT-
GND GND GND GND
LIN RIN
12
C575 10UF_1206
22 15 14 11 9 16 10 8
1
12
C522
12 13
.47UF
24
C320
1 2
1UF
R212
2.4K
1 2
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
A
B
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
SCHEMATIC, M/B LA-1391
Size Do cum e nt Number R e v
401211
Dat e : Sheet
期二 十一月
E
of
30 44¬P , 26, 2002
1B
5
+3VALW
R200 10K
C506
1000PF
G20
RCL#
PME#
+3VALW
12
12
12
C279 .1UF
+RTCVCC
D D
12
C285 .1UF
C C
C294 .1UF
GATEA2010
12
51AVCC
12
RC#10
C562 .1UF
C508 .1UF
R443 10K
12
1 2
CHB1608U800
ECAGND
+3VS
C553 .1UF
L37
1 2
12
C517 1000PF
+3VALW
R444 10K
D40
1 2
2 1
RB751V
D41
2 1
RB751V
+3VALW
12
1 2
+12V
R185 100K
PCM_PME#20
WLANPME#23
LAN_PME#23
1 2
+12V
R522 @100K
1394_PME#19
B B
ECAGND
C520 .01UF
+3VALW
+5VALW
1 2
R426 4.7K
1 2
R432 4.7K
JP3
1 2 3
A A
4 5 6 7 8 9
10
@96212-1011S
Q16 2N7002
Q60 @2N7002
1 2
1 8 2 7 3 6 4 5
1 2 3 4 5 6 7 8 9 10
2
2
RP42
8P4R_10K
EC_SMC2 EC_SMD2
EC_TINIT# EC_TCK EC_TDO EC_TDI EC_TMS
EC_URXD EC_UTXD EC_USCLK
5
13
13
BATT_TEMP
MODE# FRD# SELIO# FSEL#
+3VALW
+3VS
1 2
R446 0
1 2
R445 @0
EC_LID_OUT#11
1 2
C603 0.22UF
ADP_I37
LAD[0..3]11,27
LFRAME#11,27
LDRQ#011
SIRQ10,20,27
4
INVT_PWM18
BEEP#30
ACOFF37
LLBATT#11
51ON34
EN_WOL#23 EC_SMC132,38 EC_SMD132,38
PCIRST#4,10,14,19,20,21,23,25,27,34
PBTN_OUT#11
EC_SMC22,24 EC_SMD22,24
FAN_SPEED34
PC734
ACIN11,34,36,37,39
RING#20
SLP_S3#11
ECSMI#11
G_RST#21
EC_RIOUT#11
THERTRIP#2
BATT_TEMP38
BATT-UVP37
BLI/MH#38
R493 10K
ON/OFF11,34
SLP_S5#11
DAC_BRIG18
IREF37
EN_DFAN34
1 2
C572 22PF
4
3
+3VALW +RTCVCC
12
C563 .1UF
INVT_PWM
For PWM EN_DFAN
EC_URXD EC_UTXD EC_USCLK EC_SMC1 EC_SMD1
EC_SMC2 EC_SMD2
PME# ATFOUT#
PC7 ACIN ADB2
RING#
SCR_LED#
NUM_LED# CAPS_LED# ARROW_LED#
ECSMI#
VGA_SUSP#
G_RST#
BATT_TEMP
BATT_TEMPB
VBATTA VBATTB
BATT_CHGI
EC_TINIT# EC_TCK EC_TDO EC_TDI EC_TMS
1 2
ADP_I
OEM OEM
LAD0 LAD1 LAD2 LAD3
51RST#
ECSCI# G20 RCL#
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1 2
LAD[0..3]
R433 @0
51RST#34
LPCPD#34
CLKRUN#11,19,20,23,27
ECSCI#11
PCLK_EC13
1 2
R434 33
PROPRIETARY NOTE
51VDD
U45
32
IOPA0/PWM0
33
IOPA1/PWM1
36
IOPA2/PWM2
37
IOPA3/PWM3
38
IOPA4/PWM4
39
IOPA5/PWM5
40
IOPA6/PWM6
43
IOPA7/PWM7
153
IOPB0/URXD
154
IOPB1/UTXD
162
IOPB2/USCLK
163
IOPB3/SCL1
164
IOPB4/SDA1
165
IOPB7/RING#/PFAIL#
168
IOPC0
169
IOPC1/SCL2
170
IOPC2/SDA2
171
IOPC3/TA1
172
IOPC4/TB1/EXWINT22
175
IOPC5/TA2
176
IOPC6/TB2/EXWINT23
1
IOPC7/CLKOUT
26
IOPD0/RI1#/EXWINT20
29
IOPD1/RI2#/EXWINT21
30
IOPD2/EXWINT24
41
IOPD4
42
IOPD5
54
IOPD6
55
IOPD7
62
IOPJ2/BST0
63
IOPJ3/BST1
69
IOPJ4/BST2
70
IOPJ5/PFS#
75
IOPJ6/PLI
76
IOPJ7/BRKL_RSTO#
81
AD0
82
AD1
83
AD2
84
AD3
87
IOPE0AD4
88
IOPE1/AD5
89
IOPE2/AD6
90
IOPE3/AD7
2
IOPE4/SWIN
44
IOPE5/EXWINT40
93
DP/AD8
94
DN/AD9
99
DA0
100
DA1
101
DA2
102
DA3
105
TINT#
106
TCK
107
TDO
108
TDI
109
TMS
15
LAD0
14
LAD1
13
LAD2
10
LAD3
9
LFRAME#
8
LDRQ#
7
SERIRQ
19
LREST#
22
SMI#
23
PWUREQ#
24
IOPE6/LPCPD#/EXWIN45
25
IOPE7/CLKRUN#/EXWINT46
31
IOPD3/ECSCI#
5
GA20/IOPB5
6
KBRST#/IOPB6
18
LCLK
16
VDD
GND117GND235GND346GND4
122
137
VCC134VCC245VCC3
GND5
GND6
159
167
123
GND7
136
VCC4
AGND
96
3
157
VCC5
51AVCC
166
95
161
IOPH0/A0/ENV0
VBAT
VCC6
AVCC
IOPH1/A1/ENV1 IOPH2/A2/BADDR0 IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
IOPK5/A13/BE0 IOPK6/A14/BE1
IOPK7/A15/CBRD
PSCLK1/IOPF0 PSDAT1/IOPF1 PSCLK2/IOPF2 PSDAT2/IOPF3 PSCLK3/IOPF4 PSDAT3/IOPF5 PSCLK4/IOPF6 PSDAT4/IOPF7
32KX1/32KCLKOUT
NC111NC212NC320NC421NC585NC686NC791NC892NC997NC10
ECAGND
IOPL4/WR1#
IOPJ1/WR0#
IOPH6/A6 IOPH7/A7
IOPK0/A8
IOPK1/A9 IOPK2/A10 IOPK3/A11 IOPK4/A12
IOPL0/A16 IOPL1/A17 IOPL2/A18 IOPL3/A19
IOPI0/D0 IOPI1/D1 IOPI2/D2 IOPI3/D3 IOPI4/D4 IOPI5/D5 IOPI6/D6 IOPI7/D7
IOPJ0/RD#
SELIO#
SEL0# SEL1#
IOPM0/D8
IOPM1/D9 IOPM2/D10 IOPM3/D11 IOPM4/D12 IOPM5/D13 IOPM6/D14 IOPM7/D15
KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7
KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10 KBSOUT11 KBSOUT12 KBSOUT13 KBSOUT14 KBSOUT15
32KX2
98
1 2
CHB1608U800
CLK
PC97591VPC
L35
124 125 126 127 128 131 132 133
143 142 135 134 130 129 121 120
113 112 104 103 48
138 139 140 141 144 145 146 147
150 151
152 173
174 148
149 155 156 3 4 27 28
110 111 114 115 116 117 118 119
71 72 73 74 77 78 79 80
49 50 51 52 53 56 57 58 59 60 61 64 65 66 67 68
158 160 47
KBA[0 ..1 8 ]32
ADB[0..7]32
KSI[0..7]
KSO [0 ..1 5 ]
KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7
KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15
KBA16 KBA17 KBA18
KBA19
ADB0 ADB1
ADB3 ADB4 ADB5 ADB6 ADB7
FRD#
SELIO# FSEL#
SYSON SUSP# MMO_ON
VTT_ON VTT_PWRGD#
ENVEE ENBKL
KBD_CLK KBD_DATA PS2_CLK PS2_DATA
TP_CLK TP_DATA
MODE# KSI0
KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7
KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15
CRY1 CRY2
FSTCHG 37
FRD# 32 FWR# 32
SELIO# 32 FSEL# 32
SYSON 17,33,40,42 SUSP# 17,24,33,42
ENVEE 18 BKOFF# 18
TP_CLK 34 TP_DATA 34 LID_SW# 34 MODE# 34
CRY1
1 2
12
32.768KHZ C534 10PF
2
KBA[0..18] ADB[0..7] KSI[0..7] KSO[0..15]
BADDR1(KBA3) BADDR0(KBA2)
0 0
*
11
R402
CRY2
20M
X2
2
R413 510K
1 2 12
C548 12PF
1
1 2
+3V
R171 10K
MMO_ON
+3VS
ATFOUT#
6278-34P-KBCON
21
D20 RB751V
R442 10K
21
D39 RB751V
JP12
34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1
12
NUM_LED# ARROW_LED# CAPS_LED#
KSO15 KSO14 KSO10 KSO11 KSO8 KSO9 KSO13 KSI7 KSO3 KSO7 KSO12 KSI4 KSI6 KSI5 KSO6 KSO5 KSI3 KSI0 KSO0 KSO1 KSI1 KSI2 KSO2 KSO4
1 2
R463 300
VR_ON 2,41
ATF_INT# 11
NUM_LED# 34 ARROW_LED# 34 CAPS_LED# 34
1 2
R462 300
KBA1 KBA2 KBA3 KBA5
TP_CLK TP_DATA
1 2
R461 300
+3VS
R367 1K R366 @1K R365 1K R364 1K
R369 4.7K R368 4.7K
+3VS
+3VS
1 2
1 2
1 2
I/O Address
Index 0 1 01
2E 2F
4E
(HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1
Data
4F
Reserved
ENV0 (KBA0) TRIS (KBA4)
IRE OBD 0
*
DEV 0 PROG
SHBM(KBA5)=1: Enable shared memory with host BIOS TRIS(KBA4)=1: While in IRE and OBD, float all the signals for clip-on ISE use
0 1
1
ENV1 (KBA1)
0 1
1
0 0 0 0
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1391
Size Do cum e nt Number R e v
401211
期二 十一月
Dat e : Sheet of
31 44¬P , 26, 2002
1
+3VALW
+5VS
1B
PCM1_LED20 PCM2_LED20
+3VALW
KBA5 SELIO#
C470
1 2
.1UF
KBA[0..18]31
ADB[0..7]31
1 2
R464 @100K
1 2
R465 100K
1 2
R466 @100K
+3VALW
1 2
2 1
3 5
+3VALW
KBA11 KBA9 KBA8 KBA13 KBA14 KBA17 FWE#
KBA18 KBA16 KBA15 KBA12 KBA7 KBA6 KBA5 KBA4
SELIO#31
D11
1 2
DAN202U
BID0 BID1 BID2
C596
.1UF
U54
7SH32FU
10 11 12 13 14 15 16
KBA[0..18] ADB[0..7]
4
1 2 3 4 5 6 7 8 9
BUTTON1#34
INTERNET#34
CD_INTA#24
SHDD_LED#25 PHDD_LED#25
DRV0#25,27
OCCB#21
KBA1 SELIO#
12
R141
100K
PCM_LED
3
MP3_STOPBTN#34 MP3_PLAYBTN#34
MP3_FRDBTN#34
BT_WAKE_UP
MP3_REVBTN#34
STOPBTN#24,34
KILL_SW#23,34
KBA3 SELIO#
2MX32 B ID:010 4MX32 B ID:011
U26
A11 A9 A8 A13 A14 A17 WE# VCC A18 A16 A15 A12 A7 A6 A5 A4
@SST39VF040_TSOP
+3VALW
4 5
+3VALW
12 13
+3VALW
OE#
A10
CE# DQ7 DQ6 DQ5 DQ4 DQ3
VSS DQ2 DQ1 DQ0
A0 A1 A2 A3
PCM_LED
147
147
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
U34B
74LVC32
6
MP3_STOPBTN# MP3_PLAYBTN# MP3_FRDBTN#
MP3_REVBTN#
U34D
74LVC32
11
1 2
R467 1K
1 2
R468 @1K
1 2
R469 1K
1 2
R470 1K
1 2
R472 1K
1 2
R474 1K
R471 1K R473 1K
1 2
R475 100K
FRD# KBA10 FSEL# ADB7 ADB6 ADB5 ADB4 ADB3
ADB2 ADB1 ADB0 KBA0 KBA1 KBA2 KBA3
CC
12
DD
BID0 BID1 BID2
1 2 1 2
FRD# 31 FSEL# 31
R348 100K
1
19
+3VALW
1A121Y1 1A241Y2 1A361Y3 1A481Y4 2A1112Y1 2A2132Y2 2A3152Y3 2A4172Y4
1G 2G
+3VALW
1A121Y1 1A241Y2 1A361Y3 1A481Y4 2A1112Y1 2A2132Y2 2A3152Y3 2A4172Y4
1
1G
19
2G
1A121Y1 1A241Y2 1A361Y3 1A481Y4 2A1112Y1 2A2132Y2 2A3152Y3 2A4172Y4
1
1G
19
2G
C474
1 2
.1UF
20
U31
VCC
GND
10
1 2
20
VCC
10
+3VALW
20
ADB0
18
ADB1
16
ADB2
14
ADB3
12
ADB4
9
ADB5
7
ADB6
5
ADB7
3
74LVC244
C475
.1UF
U32
GND
1 2
VCC
10
ADB0
18
ADB1
16
ADB2
14
ADB3
12
ADB4
9
ADB5
7
ADB6
5
ADB7
3
74LVC244
C595
.1UF
U53
GND
KBA18 KBA16 KBA15 KBA17 KBA12 KBA14 KBA7 KBA13 KBA6 KBA8 KBA5 KBA9 KBA4 KBA11 KBA3 FRD# KBA2 KBA10 KBA1 FSEL# KBA0 ADB0 ADB6 ADB1 ADB2 ADB4
PROPRIETARY NOTE
18 16 14 12 9 7 5 3
74LVC244
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
U30
NC A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 VSS
29F040/SST39VF040_PLCC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VCC WE*
OE*
DQ7 DQ6 DQ5 DQ4 DQ3
A17 A14 A13
A11 A10
CE*
A8 A9
DD AA BB
CC
FWE#
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
RP19
1 8 2 7 3 6 4 5
8P4R_100K
1 2
C199 . 1UF
4
U11 7SH32FU
FWE#
ADB7 ADB5 ADB3
+3VALW
+3VALW
3 5
1 2
C480 . 1UF
+3VALW
+3VALW
2 1
.1UF
+5VALW
C461
1 2
20
ADB0
3
8
ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
AA
C180
1 2
1UF_25V_0805
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
BB
+3VALW
C481
1 2
+5VALW
147
1 2
+3VALW
147
9
10
FLASH# 11 FWR# 31
U34A
74LVC32
R127
1 2
20K
U34C
74LVC32
+12VS
.1UF KBA2 SELIO# LARST#
KBA4 SELIO# LARST#
12
R152 100K
2N7002
2
1 3
D
R153
1 2
100K
G
Q11
S
3
11
1
3
11
1
EC_SMC131,38 EC_SMD131,38
D0 D14Q1 D27Q2 D38Q3 D413Q4 D514Q5 D617Q6 D718Q7
CLK CLR
+5VALW
20
D0 D14Q1
VCC D27Q2 D38Q3 D413Q4 D514Q5 D617Q6 D718Q7
CLK CLR
U27
2
Q0
5
VCC
6 9 12 15 16 19
GND
74HCT273
10
C462
1 2
.1UF
U28
2
Q0
5 6 9 12 15 16 19
GND
74HCT273
10
+5VALW +5VALW
------>BT_DETACH
------>RFOFF#
------>BT_RESET#
12
12
R424
4.7K
R425
4.7K
+5VALW
1 2
PWR_SUSP_LED# 34 MDC_DN# 26
CD_PLAY 24 HDD_LED# 34 CD_FDD_LED# 34
PWR_LED# 34 CDON_LED# 34 MP3_LED# 34 BATT_CHGI_LED# 34 WL_OFF# 23,34 CD_STOPBTN# 24MEDIA_DETECT24 PCMRST# 21 BATT_LOW_LED# 34
C556
.1UF
U46
8
VCC
7
WC
6
SCL
5
SDA
GND
NM24C16
+5VALW
12
R430 100K
1
A0
2
A1
3
A2
4
12
R431 100K
U25
+3VALW
KBA11 KBA9 KBA8 KBA13 KBA14 KBA17 FWE#
KBA18 KBA16 KBA15 KBA12 KBA7 KBA6 KBA5 KBA4
1
A11
2
A9
3
A8
4
A13
5
A14
6
A17
7
WE#
8
VCC
9
A18
10
A16
11
A15
12
A12
13
A7
14
A6
15
A5
16
A4
@29F040_TSOP
OE# A10
CE# DQ7 DQ6 DQ5 DQ4 DQ3
VSS DQ2 DQ1 DQ0
FRD#
32
KBA10
31
FSEL#
30
ADB7
29
ADB6
28
ADB5
27
ADB4
26
ADB3
25 24
ADB2
23
ADB1
22
ADB0
21
KBA0
20
A0
KBA1
19
A1
KBA2
18
A2
KBA3
17
A3
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1391
Size Do cum e nt Number R e v
401211
Dat e : Sheet
期三 十一月
of
32 44¬P , 27, 2002
1B
A
+3V
B
C
+1_5V +1_8V
D
+12V+3V +5V
E
C430 1UF_0805 50V
R288 470
Q29
13
2N7002
SYSON# SYSON# SYSON#
2
R136 470
Q7
13
2N7002
2
SUSP#
13
13
2
R391 @470
R282 @470
C454 .1UF
Q43 @2N7002
SYSON#
2
Q26 @2N7002
2
+12VALW
13
R330 100K
R312 51K
Q31
2N7002
+
C521
1 2 3 4
1 2 3 4
+5VS
1 2 3 4
C515 .01UF
C228
.01UF
.01UF
10UF_1206
+
10UF_1206
C343
6.3V
C217
6.3V
+3VALW
U37
8
S1
D1
7
G1
D1
6
1 1
+3VALW
2 2
+5VALW
5
+
C532 10UF_1206
6.3V
8 7 6 5
+
C248 10UF_1206
6.3V
8 7 6 5
+
C344
4.7UF_1206 16V
D2 D2
8936
U12
D1 D1 D2 D2
8936
U20
D1 D1 D2 D2
8936
S2
G2
S1
G1
S2
G2
S1
G1
S2
G2
SYSON_ALW
+3VS
12
R159 @1M
+
C345
4.7UF_1206 16V
5VS_GATE
C519
1UF_0805
C218
1UF_0805
5VS_GATE
2N7002
2N7002 Q44
Q12
C346
1UF_0805
R385 100K
13
R150
13
100K
U36
S1
D1
G1
D1
S2
D2
G2
D2
8936
C514
4.7UF_1206 16V
S1
G1
S2
G2
1 2 3 4
+1_8VS
1 2 3 4
+
C511
4.7UF_1206 16V
5VS_GATE
C501
.01UF
5VS_GATE SUSPSUSP
C516
.01UF
+
C525
4.7UF_1206 16V
C513
1UF_0805
C526
1UF_0805
+1_8V
8 7 6
+12VALW
SYSON#
2
+12VALW
SUSP
2
5
+
+1_5V +1_5VS
U38
8
D1
7
D1
6
D2
5
D2
8936
+
C537
4.7UF_1206 16V
2
13
+1_8VS+1_5VS
13
+12VALW
1 3
NDS352P
+
R379 @470
2
Q42 @2N7002
R283 @470
Q27 @2N7002
2
Q36
+12VS
C416 1UF_1206 25V
SYSON#
R293 470
13
2
Q28 2N7002
+5VS+3VS +12VS
R129 470
13
SUSPSUSP SUSP
2
Q5 2N7002
SYSON17,31,40,42
SYSON
SYSON#
Q34 2N7002
2
13
13
+5VALW
13
R155 470
2
Q14 2N7002
R143 470
2
Q9 2N7002
R311 10K
3 3
+5VALW
8 7 6 5
+
C341
4.7UF_1206 16V
4 4
U19
D1 D1 D2 D2
8936
+5V
1
S1
2
G1
3
S2
4
G2
SYSON_ALW
C348
.01UF
+
C349
4.7UF_1206 16V
C347
1UF_0805
+5V
+12VALW
+12VALW
R331
C455
100K
.1UF
2
Q37
12
R305
100K
R313 51K
13
Q32
2
2N7002
1 3
NDS352P
+12V
+
C419 1UF_1206_25V 25V
C431 1UF_0805 50V
SUSP
SUSP#17,24,31,42
SUSP
SUSP#
2
Q10 2N7002
+5VALW
13
R139 10K
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
A
B
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
SCHEMATIC, M/B LA-1391
Size Do cum e nt Number R e v
401211
期二 十一月
Dat e : Sheet
E
of
33 44¬P , 26, 2002
1B
5
+3VALW
ON/OFFBTN#
D D
LID_SW#31
+3VALW
C C
PC731
LID_SW#
R486 100K
+3VALW
ARROW_LED#31
+3VALW
12
12
R447 470K
13
2
1 2
NUM_LED#31
CAPS_LED#31
R435
470K
51RST#
Q53 2N7002
+3VALW
12
Power Button
D31
DAN202U
2
DTC124EK
1 2
22K
B
22K
+3VALW
1 2
13
C
5
3
ON/OFFBTN#
+3VALW
51ON31
B B
A A
51ON
SUS_STAT#11,14,27
LPCPD#
12
R307
4.7K
1 2
R308 33K
13
D
2
G
2N7002
S
Q33
C571 .1UF
PCIRST#4,10,14,19,20,21,23,25,27,31
R448 @0
3
1 2
BUTTON1#32
+5VALW
R309 100K
Q30
E
U50
7SH08FU
4
51ON#
MOLEX_SD-53307-1417_F14P
ON/OFFBTN#
C736 68PF
51RST# 31
ON/OFF 51ON#
12
C395
1000PF
LPCPD#
For PC87591 REV 0.A Only
5
JP2
1 2 3 4 5 6 7 8 9 10 11 12 13 14
12
ON/OFF 11,31 51ON# 36
D30
12
RLZ20A
2 1
LPCPD# 31
4
+3VALW
12
C99 1UF
3
+3VS
RP38
10K-8P4R
MP3_STOPBTN# MP3_FRDBTN#
MP3_REVBTN#
MP3_FRDBTN#
MP3_REVBTN#
MP3_STOPBTN#
MP3_PLAYBTN#
2 1
D14 RB751V
2 1
D13 RB751V
2 1
D16 RB751V
1 2
R499 0
FRDBTN#
REVBTN#
STOPBTN#
PLAYBTN#
1 8 2 7 3 6 4 5
MP3_FRDBTN#32
MP3_REVBTN#32
MP3_STOPBTN#32
MP3_PLAYBTN#32
2
JP10
PWR_SUSP_LED#32
TP_CLK31
TP_DATA31
BATT_LOW_LED#32 BATT_CHGI_LED#32
HDD_LED#32
CD_FDD_LED#32
MP3_LED#32
CDON_LED#32INTERNET#32
MODE#31
FRDBTN#24
STOPBTN#24,32
REVBTN#24
PLAYBTN#24
PWR_LED#32
WL_OFF#23,32
+5VS
ACIN11,31,36,37,39
FRDBTN# STOPBTN# REVBTN# PLAYBTN#
+5VALW
+3VALW
51ON#
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22
85201-2205
1
+5VS +5VALW
12
12
C581
C338
1UF
1UF
+3VALW
12
C337 1UF
Kill SWITCH
+3V
2
3
SW1 DS-1200-02
DAN217
11223
LID_SW#31
D37
3
+3V
12
1
LID_SW#
2
D46 PSOT03C
R396
100K
KILL_SW#
3
KILL_SW# 23,32
SW2
3
4
HORNG CHIH
EN_DFAN31
EN_DFAN
1 2
R16 10K
1
2
+12V
3
+
2
-
+12V
84
5
+
6
-
1 2
R15
8.2K
84
U1A LM358
1 2
C45 . 1UF
7
U1B LM358
FAN_SPEED31
1
FAN CONN.
1 2
R8 100
+3V
12
12
R9
10K
C20
.1UF
+5V
1
C
Q20
2
B
FMMT619
E
3
D1
1N4148
FAN1
2 1
2 1
D5
1SS355
12
C2 10UF_1206
JP17
1 2 3
53398-0310-FAN
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
4
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
SCHEMATIC, M/B LA-1391
Size Do cum e nt Number R e v
401211
Dat e : Sheet
期二 十一月
1
of
34 44¬P , 26, 2002
1B
A
B
C
D
E
CF1
H8
H19
H18
H7
H9
C315D146
C315D146
C315D146
C315D146
C315D165
1
1
1
1
H4
H12
1 1
H3
C315D150
1
C315D150
1
C315D150
H11
C315D150
1
1
H13
C315D165
1
1
SMD40M80
CF5 SMD40M80
CF9 SMD40M80
CF3 SMD40M80
1
CF6 SMD40M80
1
CF11 SMD40M80
1
M8
C157D157N
1
M2
M1
M7
C85D85N
C315D91
C315D106
1
1
M9
O95X173D95X173N
2 2
1
M12
C256D256N
M10
O157X197D157X197N
1
1
M4
C315D106
1
1
+3V
147
U48C
CF15 SMD40M80
S315D110
S315D110
1
H1
1
H16
1
S315D110
S315D110
CF18 SMD40M80
H14
1
H23
1
1
1
1
1
S315D110
S315D110
CF2 SMD40M80
1
CF7 SMD40M80
1
CF10 SMD40M80
1
CF13 SMD40M80
1
H20
S315D110
1
H21
S315D110
1
H15
1
H2
1
CF4 SMD40M80
1
CF8 SMD40M80
1
CF12 SMD40M80
1
CF16 SMD40M80
1
H17
S315D110
1
H22
S315D110
1
FD1 FIDUCAL
FD5 FIDUCAL
CF14 SMD40M80
S315D146
C256D146
1
1
1
H5
1
H24
1
S315D146
C256D146
FD3 FIDUCAL
1
FD6 FIDUCAL
1
CF19 SMD40M80
1
H6
1
H25
1
FD2 FIDUCAL
FD4 FIDUCAL
S315D110
S315D110
1
1
CF17 SMD40M80
1
H10
1
H26
1
CF20 SMD40M80
1
EP9 EMIPAD
1
EP4 EMIPAD
1
EP20 EMIPAD
1
EP24 EMIPAD
1
R437
330K
EP11 EMIPAD
1
EP5 EMIPAD
1
EP22 EMIPAD
1
EP25 EMIPAD
1
R427
47K
+3V
EP13
EP15
EMIPAD
EMIPAD
1
1
EP7
EP1
EMIPAD
EMIPAD
1
1
EP23 EMIPAD
1
EP26 EMIPAD
1
+3V +3V
D44
@1N4148
147
2 1
C564 1UF
EP14
EP10 EMIPAD
1
EP6 EMIPAD
1
EP12 EMIPAD
1
147
U48B
U48A
EMIPAD
1
EP3 EMIPAD
1
21
74LVC14
+3V POWER +3V POWER
74LVC14
EP2 EMIPAD
1
RSMRST#
43
RSMRST# 11,12
65
74LVC14
U49D
13
74LVC125
12 11
3 3
R419
1 2
330K
R420 47K
+5V
+3V
12
12
@1N4148
2 1
C551 .1UF
D45
+3V
147
U48D
89
74LVC14
2 1
3 5
1 2
U44
7SH32FU
C552
.1UF
4
RTC BATT
+3VS
1
2
C325
1 2
U49C
10
74LVC125
9 8
+3V POWER
SYS_PWROK 11
12
R421 10K
VCC
GND
.1UF U47
RST#
PFO#
MAX6342
6
4
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1391
Size Do cum e nt Number R e v
401211
Dat e : Sheet
期二 十一月
E
1B
of
35 44¬P , 26, 2002
BATT1
-+
RTCBATT
+RTCVCC
4 4
A
12
C592 .1UF
+RTCBATT
3
1
2
D42 HSM1265
CHGRTC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
B
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
+5VS
1 2
R225 240K
12
12
C324
.01UF
12
C316
.1UF
R211
100K
5
MR#
3
PFI
D
A
B
C
D
Vin Detector
High 18.764 17.901 17.063 Low 17.745 16.903 16.038
1 1
*
PL2
PF1
1
23
RTCVREF
3.3V
7A 125V UL/CSA FAST
12
*
S-81233SG
3
3
PC104 10UF_1206_10V
PD1
BYS10-45
PU10
1
1
PC3
1000PF_50V
2
2
PCN1
1
4
3
2
2DC-S107B200
2 2
CHGRTC
3 3
1 2
PR27 200
CHC4532U800_1812
100PF_50V
PR18 200_0805
PC106 1UF_0805_25V
1 2
PC4
2 1
CHGRTCP
PZD3 RLZ16B
PC2
1000PF_50V
VMB37,38
51ON#34
VIN
100PF_50V
PD3 1SS355
2 1
PZD2
RLZ6.2C
PR86 100K
1 2
PR84 22K
PC1
12
PR4 10_1206
12
PZD1
RLZ24B
12
12
12
PC38
0.22UF_1206_25V
1000PF_50V
PQ21
TP0610T
2
PD18
RLS4148
13
VIN
21
12
12
PC72
VIN VIN
12
PR51
84.5K_1% PR50
22K
1 2
PR58
20K_1%
PR83
33_1206
PC97
0.1UF_0805_25V
12
0.1UF_50V
VS +5VP
PC84
1 2
PR208 10K
12
PR209 150K
12
PC192
0.1UF_50V
PR48 1M_1%
1 2
3 2
PR49 10K
12
12
+
-
12
84
3.3V
PZD5 RLZ5.1B
1
PU27A LM393M
RTCVREF
12
12
PR56
10K
PZD4 RLZ4.3B
ADAPTER-IN/AC DETECTER
PR47 1K
1 2
12
PR57 10K
ACIN 11,31,34,37,39
PACIN 37,40
+1.8VP
+12VALWP
+5VALWP
4 4
+3VALWP
PJP4
1 2
3MMA
PJP3
2 1
JOPEN/+12V
PJP2
1 2
PAD-OPEN 4x4m
PJP5
1 2
PAD-OPEN 4x4m
+1_8V
+12VALW
+5VALW
+3VALW
(3A,120mils ,Via NO.= 6)
(120mA,20mils ,Via NO.= 1)
(5A,200mils ,Via NO.= 10)
(5A,200mils ,Via NO.= 10)
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1391
Size Do cum e nt Number R e v
B
401211
Dat e : Sheet
期二 十一月
D
of
36 44¬P , 26, 2002
1B
+1.5VP
PJP6
2 1
3MMA/CPU_IO
+1_5V
A
(3A,120mils ,Via NO.= 6)
PROPRIETARY NOTE
B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
A
B
C
D
CHARGER
1 1
PQ1
SI4835DY
ACOFF#
8 7
5
PD17
1SS355
1 2
PR81 10K
1 2
IREF31
+3VALWP
12
PR206
47K
VIN
12
PR1 10K
ACOFF#38
2 2
PACIN36,40
ACON40
3 3
13
100K
FSTCHG31
BATT-UVP31
4 4
2
PC65
@0.1UF_16V
100K
DTC115EUA
12
A
P2 P3
PQ2
SI4835DY
1
1
2
2
3 6
36
4
12
PR3 200K
12
PR2 150K
13
D
PQ20 2N7002
2
G
S
PC83
0.1UF_16V
PR116 226K_1%
1 2
CS
8 7
5
4
12
13
100K
PQ39
2
100K
12
PR106
2.2K
1
PQ38
DTC115EUA
PC70
0.1UF_50V
84
+
-
VS
3 2
PU25A LM358
12
12
PR54 10K_1%
12
0.1UF_16V
PR65
100K_1%
PC86
VMB
12
PR55
29.4K_1%
12
12
PR39
205K_1%
12
PR38
300K_0.5%
12
PR36
143K_0.5%
ADP_I31
12
Iadp=0~4.2A
0.015_2512_1%
PR46 10K
1 2
PC121 4700PF_50V
1 2
PC71 1000PF_50V
PC87
0.1UF_16V
PC66
0.01UF_50V
PROPRIETARY NOTE
B
B++
36
241
578
LXCHRG
PL11
22UH_SPC_1205P_220A
1 2
2
1
3
PQ11 FDS4435
PD20 EA60QC04
10
11
12
1
2
3
4
5
6
7
8
9
PU12 MB3887
-INC2
OUTC2
+INE2
-INE2
FB2
VREF
FB1
-INE1
+INE1
OUTC1
OUTD
-INC1
12
B+
FBM-L11-453215-900LMAT_1812
1 2
24
+INC2
23
GND
22
CS
21
VCC(o)
20
OUT
19
VH
18
VCC
17
RT
16
-INE3
15
FB3
14
CTL
13
+INC1
PL8
CS
PC112
0.1UF_50V
1 2
1 2
PR101 68K
1 2
PR31 47K
12
PC53
4.7UF_1210_25V
12
PR41 0
PC48
0.022UF_25V
1 2
1 2
PC55
0.1UF_0805_25V
PC56
0.1UF_0805_25V
1 2
1 2
PC49 1500PF_50V
C
12
PC54
4.7UF_1210_25V
ACON 11,31,34,36,39
12
PR100 47K
PR67 143K_1%
12
PC58
0.1UF_0805_25V
12
PR5
12
12
1 2
PR64
4.7K
1 2
PR37 1K
PR53 10K
12
PR66
47.5K_1%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PQ24
12
PC45 @1000PF
ACOFF#
SI4835DY
1 2 3 6
1 2
PR25 10K
8 7
5
4
1 2
PR26 47K
VIN
13
100K
100K
2
PQ10 DTC115EK
ACOFF 31
CC=0~2.52A CV=16.84V(12 CELLS)
1 2
PR72
0.02_2512_1%
PC90
4.7UF_ 1 210_25V
12
12
+
PC130
PC122
4.7UF_ 1 210_25V
4.7UF_ 1 210_25V
VMB
12
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1391
Size Do cum e nt Number R e v
B
401211
Dat e : Sheet
期二 十一月
D
of
37 44¬P , 26, 2002
1B
A
12 Cel l s C h a rg er OVP : 1 8.059V
VS
PU26A LM393M
84
3
+
2
-
PC82
1000PF_50V
PR111 0
PR44 100K_1%
PR210 51K_1%
2.5VREF
1UF_0805_16V
VMB
PC79
PR59 36K
PR42 309K 1%
VIN
PC81
1UF_1206_25V
1
1 1
ACOFF#37
13
2
PQ9
2N7002
PR43 100K
2 2
PR45 1M_0.5%
B
PR109 100K_0.5%
PR110
97.6K_1%
BLI/MH#31
BLI/NIMH#
PR113 @1K
C
PL12
*
PR122
25.5K_1%
1
HCB4532K-800T90_9A
1 2
PC124 @1000PF_50V
TS
12
PR121 1K
EC_SMD131,32
EC_SMC131,32
12
0.01UF_50V
PD27
@BAS40_04
BATT_TEMP 31
VMB36,37
+3VALWP
3
2
1 2
PD5
@BAS40_04
12
PR114 47K
PD6
3
12
1
2
@BAS40_04
PC123
12
EC_SMD1
12A 65V UL /CSA fast
12
PR120
1K PR123
100
EC_SMC1
1
3
D
12
PC132 1000PF_50V
PF2
BLI/NIMH#
BB/I
TS
12
12
PR124 100
BP0207
PJP7
1 2 3 4 5 6 7
1
PD28 @BAS40_04
2
3
2
+5VALWP
PH1 under CPU botten side : PH2 near main Battery CONN :
CPU thermal protection at 76 degree C Recovery at 45 degree C
BAT. thermal protection at 82 degree C Recovery at 45 degree C
2.2UF_ 1 206_16V
PC134
PH2
10K_1%_0805
PR171
3.32K_1%
VL
PR117
*
15.8K_1%
PC129 1000PF_50V
VS
5
+
6
-
PU26B LM393M
PR127 100K_0402_1%
PR128
47K_0402_1% PR126
7
PR169 47K_0402_1%
VL
PD35
1SS355
12
12
PC126
0.1UF_50V
TM_REF2TM_REF1
100K_0402_1%
VL
VS
12
PC128
0.1UF_50V
PR170
3.48K_1%
PC135
PH1
10K_1%_0805
PR130
13.3K_1%
1000PF_50V
PC127
100K_0402_1%
3 3
2.2UF_ 1 206_16V
4 4
5 6
PR133
84
+
-
100K_0402_1%
PR131
47K_0402_1%
7
PU27B LM393M
PR132
VL VL
PR168 47K_0402_1%
PD34
OTPON OTPON
12
1SS355
VL
OTPON 39 OTPON 39
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
A
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
C
SCHEMATIC, M/B LA-1391
Size Do cum e nt Number R e v
B
401211
Dat e : Sheet
期二 十一月
D
of
38 44¬P , 26, 2002
1B
A
B
C
D
E
+3.3V/+5V/+12V
1 1
PC80
4.7UF_1210_25V 1 2
PC64
0.1UF_0805_25V
PQ14 SI4800DY
DH31
PQ23 SI4810DY
12
1 2
LX3
DL3
PC108 @1000PF
ACIN11,31,34,36,37
B++
12
PC75
PC113
12
+
150UF_D_6.3V_FP
12
2200PF
PC117
SLF12565T_100M
PR60
0.012_2512_1%
12
PC76
@47UF_D_6.3V_PC
4.7UF_1210_25V
PL10
+
EP10QY03
PD26
PC62
4.7UF_1210_25V
12
1M_0402
2 1
12
PR91
47PF_0402
12
PC51
1 2
PR90
3.57K_1%
12
PC59
0.1UF_0805_25V
+3.3V Ipeak = 6.66A ~ 10A
2 2
+3VALWP
12
+
PC74
150UF_D_6.3V_FP
3 3
578
3 6
241
578
3 6
241
12
PC105 33PF_0402
1 2
PC107 @.01UF_0402
12
PR89
10K_0402
1 2
PR107 0_0402
1 2
CSH3
@300K_0402
BST31
1 2
PR85 10K_0402
PR88
VS
12
PR33 47K_0402
12
PC67
0.047UF_16V
12
PR32 0_0402
PR108
10_1206
DH3
12
PC118
0.1UF_0805_25V 25
BST3
27
DH3
26
LX3
24
DL3
1
CSH3
2
CSL3
3
FB3
10
SKIP#
23
12
12
PC102 1PF_0402_50V
SHDN#
7
TIME/ON5
28
RUN/ON3
PR29
47K_0402_1%
VS
12
VL
PD168
1SS355
1 2 12
22
V+
PU23
MAX1632
8
VL
GND
DAP202U
PD4
2
21
VL
VL
3
1
12
12OUT
VDD
BST5
DH5 LX5 DL5
PGND
CSH5
CSL5
FB5 SEQ REF
SYNC
RST#
1 2
PR93
PC63
4.7UF_1206_10V
4 5 18 16 17 19 20 14 13 12 15 9 6 11
0_0402
PR71
1 2
PC57
0.1UF_0805_25V
12
33PF_0402
12
@100PF_0402
12
PC110
PC101
PC85
B++
PC61
4.7UF_1210_25V
DH51
PC109 @1000PF
470PF_0805_100V
12
PC116
4.7UF_1210_25V
PQ25
SI4810DY
12
22_1206
PQ15 SI4800DY
PD25 EP10QY03
578
3 6
578
3 6
12
241
241
2 1
BST51
PC68
0.1UF_0805_25V 1 2
PC119
0.1UF_16V
PC100
+12VALWP
12
4.7UF_1210_25V
1 2
PR92 @0_0402
POK
12
PC99
0.1UF_0805_25V
2.5VREF
12
PC103
4.7UF_1206_10V
POK 41
1 2
PR30 0_0402
CSL5
PR95
10.5K_0402
PR87
10K_0402
PC50
2200PF
1 2
PR102 0_0402
12
12
12
DL5
1 2
12
PD29
1 4
SDT-1205P-100
12
PC52 47PF_0402
12
PR34 2M_0402
12
+
PC78
EC11FS2
PT1
12
+
150UF_D_6.3V_FP
3 2
CSH5
12
PR61
0.012_2512_1%
PC77
@47UF_D_6.3V_PC
FLYBACKSNB
+5V Ipeak = 6.66A ~ 10A
+5VALWP
MAINPWON 40
13
100K
OTPON
OTPON38
4 4
A
2
PQ34
DTC115EK
B
100K
12
PC47
0.047UF_16V
PROPRIETARY NOTE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Title
Size Docu ment Number Re v
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1391 401211
星期二 十一
?26, 2002
39 44, 
E
of
1B
A
PQ26 SI3445DV
+5VALWP
1 1
10UF_1206_10V
2 2
PC115
12
RB751V
4700PF_50V
PQ7 2SA1036K
PD2
PC114
1 2
1 2
PR104
12
1K
31
2
PQ6
HMBT2222A
2
12
13
PR103 10K
PU11A LM393M
D
S
4 5
G
PD22
RB051L-40
3
VS
84
+
1
-
P1.5V
6 2
1
3 2
PR152
12
17.8K
LX18
12
PC166
PC60
1 2
5UH_TPRH6D38_5R0
1 2
12
PC111
0.1UF_50V
12
PR96 2M_5%
0.1UF_25V
1.8V
0.01UF_50V
12
PR35
249K
PL7
13
1 2
12
PR40 191K_1%
PR62
1 2
93.1K
100K
100K
PQ16 DTC115EK
B
+1.8VP+-5%
+1.8VP
12
+5VALWP
2
PC69
2200PF
2.5VREF
12
13
PR68 47K
100K
100K
12
+
PC98 150UF_D_4V_FP
SYSON
2
PQ12 DTC115EK
+5VP
MAINPWON39
ACON37
SYSON 17,31,33,42
PR154 100K
1 2
PD31
RB751V
PD32
RB751V
C
D
1.8V/1.5V
B+
PR155
1000PF
4.4V
LM393M
12
PU11B
7
@1M_1%
-
6
+
5
12
PC138
12
1000PF
1 2
PC136
12
12
RTCVREF
PR15710K
12
PR159 332K_1%
13
PQ29
2N7002
12
PR156 698K_1%
12
PR158 402K_1%
2
PR160 47K
12
12
PC137 100PF
PACIN
PACIN 36,37
13
+5VALWP
100K
PQ30
DTC115EUA
2
100K
PQ37
+1.8VP
3 3
PC165
4.7UF_ 1 206_25V
4 4
SI3456DV-T1
D
6 2
1
S
45
G
3
PR203
1 2
VS
PU25B
5
+
PC169
68PF
7
LM358
-
6
PR205
5.1K
1 2
0
5.1K PR204
1 2
220PF
PC167
P1.5V
0.01UF
PC168
+1.5VS+-5%
12
+
+1.5VP
PC164 150UF_D_6.3V_KO
VIN
PD33
2 1
RLS4148
1.5K_1206 PR161
PR1621.5K_1206
PR1631.5K_1206
PR1641.5K_1206
B+
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
A
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
C
SCHEMATIC, M/B LA-1391
Size Do cum e nt Number R e v
B
401211
Dat e : Sheet
期二 十一月
D
of
40 44¬P , 26, 2002
1B
A
PQ32
SI2301
POK
2
PQ33
DTC115EK
PR28
10K_1%
PR98 105K_1%
1 3
100K
100K
V_GATE11
2.5VREF
1 2
PR97 100K_1%
VID03 VID13 VID23 VID33 VID43
2
1 2
PR176
1 2
1K
13
PR175
10K
+3VS
PC191
@2200PF
+12VALWP
PC42
0.1UF_50V
84
3
+
2
-
PU24A LM358
+5VALWP
1 1
POK39
2 2
VR_ON2,31
+5VALWP
1 2
13
100K
VR_ON
2
100K
PQ5
DTC115EK
3 3
1 2
13
D
PQ22 2N7002
2
G
PR99 150K_1%
4 4
PR23 100K_1%
S
1 2
1 2
PD19
1SS355
PC43
0.1UF_16V
PR22 33K_1%
12
1 2
5
+
6
-
PU24B
12
LM358
A
PR13 PR14
0
PR15
0
PR16
0
PR17
0
PR11
0
1 2
10K
1 2
PR207 0
DTC115EK
CORE_EN
12
1
7
+5VDRIVE
12 12 12 12 12
PQ3
100K
2
+3VS
2
G
PC46
4.7UF_ 1 206_25V
100K
13
D
S
PQ8 2N7002
PR153
@100K
+5VALWP
PC39
20
0.22UF _ 0805_16V
18
PWM4
17
ISEN4
5
VID0
4
VID1
3
VID2
2
VID3
1
VID4
19
PGOOD
8
FS/DIS
13
PR19 137K_1%
1 2
+5VALWP
PR24 100K
1 2 13
D
2
G
S
VCC
GND
9
PQ4 2N7002
PWM1
ISEN1
PWM2
ISEN2
PWM3
ISEN3
VSEN
COMP
11 12 14 13 15 16 10
6
7
FB
PC40
33PF
PU22
PR21 3K_1%
CPUVID 3
CORE_EN
1 2
B
PC411500PF_50V
PR20 10K
1 2
1 2
PROPRIETARY NOTE
B
C
+12VALWP
+5VDRIVE
PD16
+5VDRIVE
2 1
EP10QY03
PC27
PC28
0.22UF _ 0805_16V
2 3
PC96
PC31
0.22UF _ 0805_16V
2 3
PC95
PC34
0.22UF _ 0805_16V
2 3
PC94
IN DLY
IN DLY
PR8
IN DLY
@220PF
+5VDRIVE
PC32
@220PF
1 2
+5VDRIVE
PC35
@220PF
4
VCC
PGND
6
4
VCC
PGND
6
1K_1%
4
VCC
PGND
6
BST
DRVH
DRVL
ADP3414
BST
DRVH
DRVL
ADP3414
BST
DRVH
DRVL
ADP3414
4.7UF_ 0 805_10V
1K_1%
PR9
1 2
4.7UF_ 0 805_10V
4.7UF_ 0 805_10V
PR12
1K_1%
1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SW
PU21
2 1
SW
PU20
2 1
SW
PU19
PR80
1
HR1
8 7 5
PD15
EP10QY03
PR79
1
HR2
8 7 5
PD14
EP10QY03
PR78
1
HR3
8 7 5
0
12
PC23
0
12
PC24
0
PC26
12
@4.7U_0805_10V
0.1UF_ 0 805_25V
3
0.1UF_ 0 805_25V
3
0.1UF_ 0 805_25V
3
PC29
PR174
2
BOOST
PWM
+5VDRIVE
PR179
2
BOOST
PWM
+5VDRIVE
PR184
2
BOOST
PWM
@10K
1 2 7
PVCC
UGATE
PHASE LGATE
GND
@ISL6206
4
PC25
@10K
1 2 7
PVCC
UGATE
PHASE LGATE
GND
@ISL6206
4
@10K
1 2 7
@4.7U_0805_10V
PVCC
UGATE
PHASE LGATE
GND
@ISL6206
4
@10K
PR172
PR173
1 2
6
VCC
1 8
5
PU7
+12VALWP
@10K
PR178
1 2
6
@4.7U_0805_10V
VCC
1 8
5
PU8
+12VALWP
PC36
PR182
6
VCC
1 8
5
PU9
@10K
1 2
1 2
@10K
LR1
LR2
LR3
PC30
SW1
PR76
2.4_1%
PR180
1 2
@10K
SW2
PR82
2.4_1%
PR183
1 2
@10K
PC37
SW3
PR77
2.4_1%
C
@4.7U_0805_10V
12
PR177
1 2
PC33
@4.7U_0805_10V
12
PR181
1 2
@4.7U_0805_10V
12
PR185
1 2
@10K
@10K
@10K
D8D7D6D
PU1
S1S3G
S
2
D8D7D6D
PU18
S1S3G
S
2
D8D7D6D
PU3
S1S3G
S
2
D8D7D6D
PU16
S1S3G
S
2
D8D7D6D
PU5
S1S3G
S
2
D8D7D6D
PU14
S1S3G
S
2
5
IRF7811A
4
5
SI4362
4
5
IRF7811A
4
5
SI4362
4
5
IRF7811A
4
5
SI4362
4
D8D7D6D
PU2
S1S3G
S
2
D8D7D6D
PU17
S1S3G
S
2
D8D7D6D
PU4
S1S3G
S
2
D8D7D6D
PU15
S1S3G
S
2
D8D7D6D
PU6
S1S3G
S
2
D8D7D6D
PU13
S1S3G
S
2
5
4.7UF_ 1 210_25V
IRF7811A
4
5
PD13
SI4362
4
5
4.7UF_ 1 210_25V
IRF7811A
4
5
PD12
SI4362
4
5
4.7UF_ 1 210_25V
IRF7811A
4
5
PD11
SI4362
4
PC11
12
PC7
12
PC15
12
D
CPU-CORE
HCB4532K-800T90_9A
1 2
12
12
+
PC141
100UF_EC_25V
+
PC190
100UF_EC_25V
4.7UF_ 1 210_25V
EC31QS04
4.7UF_ 1 210_25V
EC31QS04
4.7UF_ 1 210_25V
EC31QS04
PC12
4.7UF_ 1 210_25V
0.6U_HK-26A0R6
PR10
2K_1%
1 2
PC8
4.7UF_ 1 210_25V
PR7
2K_1%
1 2
PC16
4.7UF_ 1 210_25V
PR6
2K_1%
1 2
PC14
PC13
4.7UF_ 1 210_25V
PL6
12
PC9
PC10
4.7UF_ 1 210_25V
PL5
0.6U_HK-AE26A0R6
PC18
PC17
4.7UF_ 1 210_25V
PL4
0.6U_HK-AE26A0R6
1UF_08 05_25V
1UF_08 05_25V
12
1UF_08 05_25V
12
PC22
1000PF_50V
CPU_VCC
12
RB051L-20
B+++
1000PF_50V
PC19
12
RB051L-20
B+++
PC21
1000PF_50V
12
RB051L-20
PC6
PD10
PC5
PD9
PC20
PD8
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1391
Size Do cum e nt Number R e v
B
401211
Dat e : Sheet
期二 十一月
D
41 44¬P , 26, 2002
PL3
B+B+++
1B
of
5
D D
4
3
2
1
+2.5V/+1.25V
PL13
KC FBM -LI11-322513-151AT
PC147
.1UF _ 0 8 05_16V
12
SOFT1
6
BOOT1
5
UGATE1
4
PHASE1
7
ISEN1
2
LGATE1
3
PGND1
9
VOUT1
10
VSEN1
8
EN1
15
PG1
11
OCSET1
IS6225
PR186
51_1206
14
VIN
ISL6225
GND
1
PU28
PR187
20
+5VALWP
+5VALWP
4.7U_ 1 210_25V
28
SOFT2
VCC
BOOT2
UGATE2
PHASE2
LGATE2
PGND2
VOUT2
VSEN2 PG2/REF OCSET2
DDR
13
PC145
PC146
.1UF _ 0 805
ISEN2
EN2
17
23
24 25
22 27
26
20 19 21 16
18
PC193
1000PF_50V
PC149
0.01uF_50V
PR191
2K
+2.5VP
PR201 10K_0.1%
PR202 10K_0.1%
PC152
.1UF _ 0 8 05_25V
PR1890
SDREFA
PC160
2.2UF _0805_6.3V
4 3 2 1
PR197100K
12
PC162
@4.7U F_1206_16V
PQ36 FDS69 84S
SUSP# 17,24,31,33
PC143
4 3 2 1
PC144
4.7U_ 1 210_25V
3
PC151
.1UF _ 0 8 05_25V
PR196
0
1
PD36
DAP202U
2
PC148
0.01uF_50V
PR1880
PR190
1K
PR200 50K
PC142
.1UF _ 0 805
4.7U_ 1210_25V
C C
PQ35
FDS6984S
PR192 @100
PC158
@1000PF_50V
PC163 @1000PF_50V
5 6 7 8
SYSON17,31,33,40
PL14
PC159
4.7UH _SPC-1205P-100
PR194 0
PR195
18.2K _10%
PR198
PR199
10K
@100
+2.5VP
PC155
220UF_D2_2.5V
B B
12
+
4.7uF _0805_6.3V
12
+
PC156 @220UF_D2_2.5V
PC195
15000F_50V
5 6 7 8
+2.5VP
+1.25VP
B++
+2.5VP
PC161 @1000PF_50V
12
PJP8
1 2
PAD-OPEN 4x4m
PJP9
1 2
PAD-OPEN 4x4m
4.7UF_1206_16V PC150
PR193 @ 100
PC157
@1000PF_50V
+2.5V
+1.25VS
PL15
1.5UH _TPRH 6 D 38_1R5 1 2
PC194
4.7uF _0805_6.3V
(5A,120mils ,Via NO.=6)
(3A,200mils ,Via NO.= 10)
PC153
220UF_D2_2V
+1.25VP
+
+
PC154 220UF_D2_2V
A A
Compal E lectroni cs, I nc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
5
4
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
SCHEMA TI C , M / B LA-1391
Size Document Number Re v
401211
Date: Sheet
十一月
1
of
42 44星期G, 26, 2002
1B
ATR11 PIR LIST
HW PIR LIST
ATEST 9/6~
1
+2.5V LEVEL ERROR
2
SDRAM BANK select error
3 Add CPU VCCVID pin Add R492 connect to U23.AF3 P3
4 TV OUT output error
5 Add MK1707 output terminate Add R494 22 ohm P12
Add low pass filter for MK1707 power pin
6
Change VGA option resistor to jumper
7
8 Reserve +2.5V option control
9 Change LCD connector type P16Change JP1
Add TI TPS2042 for USB protect cicuit
10
BTEST
Remove R111 100ohm Change R108 from 100 to 0 ohm Change CLK_SDRAM3 from U22.F3 to U22.E3 Change CLK_SDRAM5 from U22.H5 to U22.G5 Change RRAS#3 from U22.H7 to U22.F7 Change RRAS#5 from U22.G6 to U22.H6
Change CRMA from U8.AF15 to U8.AF16 Change LUMA from U8.AF16 to U8.AF15 P12
Add L47 P12 Change R284 to J3 Change R286 to J4 Change R295 to J5 Change R296 to J6 Add R495 for SYSON control Add R496 for SUSP control P 15
Add U56(TPS2042) P25
PWR PIR LIST
P15
P5
P15
PROPRIETARY NOTE
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SCHEMATIC, M/B LA-1391
Size Do cum e nt Number R e v Custom
401211
Dat e : Sheet
期二 十一月
1B
of
43 44¬P , 26, 2002
5
4
3
2
1
Version chan ge list (P.I.R. List) Page 1 of 1
for PWR
Reason for change Rev. PG # Modify List B.Ver# PhaseFixed IssueItem
1
D D
2
Creat +5VP power
Meet spec. of ISL6225 DDR2.5V Vsense voltage
36
42
0.89V
3
4
5
For CP mode
For DDR 1.25V ripple voltage 42 DVT
For DDR 2.5V voltage 42 Add PC156: 220uF/2V; delete PC155: 220uF/2V DVT
37
Add PC192: 0.1UF; PZD5: RLZ5.1B PR208: 10K; PR209: 150K
Change PR195 from 17.8K to 18.2K Change PR64 from 10K to 4.7K
PC121 from 4700PF to 1000PF Change PC153, PC154 from 150uF/6.3V to
220uF/2V
DVT
DVT
DVT
6
For cost downe
42
40
C C
7
For DDR 1.25V voltage sense Change PR191 from 6.8K_1% to 2K_1%42 DVT
Change PL15 from 1.5uH SPC_06703 to 1.5UH TPRH6D38 Change PL7 from 5uH SPC_06703 to5UH TPRH6D38
For transient response of DDR 2.5V 1.25V 42 Add PC195 PC194 4.7uF/6.3V; de-pop PC153
8
Change PC193 from 1000pF to 4700pF;
DVT
PVT
PR186 from 10 to 51Ohm
9
10
11
B B
For reduce CP mo de noise 37 Change PC121 from 4700PF to 1000PF
Increase voltage margin on CTL of MB1887
Change 1.8V to 1.85V P1.5V to 1.73V requested f r om H/W
37
40 Change PR62 f r om 100K to 93.1K
.De-pop PR100
PR152 from 43K to 17.8K PR35 from 215K to 249K
PVT
PVT
PVT
A A
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE
5
4
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
SCHEMATIC, M/B LA-1391
Size Document Number R ev
401211
Date: Sheet
星期二 十一月
, 2002
1
of
44 44, 26
1B
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