Compal LA-1361 ADQ00, LA-1361 ADQ10 Schematic

A

1 1

B

C

D

E

2 2

Compal Confidential

Schematics Document

P4 uFCBGA/uFCPGA Northwood with SIS Core Logic

2001-5-30

3 3

REV:1.0A

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

B

C

D

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

ACT10

Cover Sheet

E

145Thursday, May 30, 2002

1.0A

of

A

Compal confidential

B

C

D

E

Block Diagram

Model Name :CT10
File Name : LA-1361

CPU Bypass

1 1

Fan Control

VGA
Board

page 6

& CPUVID

LM75 thermal
sensor

CRT Connector

page 16

AGP Conn

page 16

page 5

page 6

AGP4X(1.5V)

Mobile Northwood

uFCBGA/uFCPGA CPU

478pin
System Bus

400MHz

page 3,4,5

HD#(0..63)HA#(3..31)

SIS 650

BGA-702

page 7,8,9,10,11

Memory
BUS(DDR)

2.5V 200MHz

Thermal Sensor

MAX6654

page 4

DDR-SO-DIMM X2

BANK 0, 1, 2, 3

Clock Generator

page 15

page 12,13,14

2 2

PCI BUS

MINI
PCI I/F

3 3

1394
Controller

TI TSB43AB22

page 25page 26

1394
Connector

page 25

LED INDICATE

page 36

Power On/Off
Reset & RTC

page 35

DC/DC Interface
Suspend

4 4

Power Circuit
DC/DC

page 38, 39,
40, 41 42, 43

page 37

A

LAN

RTL 8100L

page 22

RJ45

page 22

Ext. Board

SERIAL

IO PC87391

Legacy I/O Option

B

3.3V 33MHz

CardBus

ENE CB1410

2Eh-2Fh

Slot 0

page 24

FDDFIR

PARALLEL

page
23

page 32

MULTIO

Ext. Board

SIS 961

BGA-371

LPC BUS

3.3V 33MHz

page 17,18,19,20

NS PC87591S

LPC to X-BUS
& KBC

page 33

USB port 0, 1, 2

3.3V 48MHz

3.3V 24.576MHz

3.3V ATA100

HDD

page 21

USBx3

USB conn

page 27

AC-LINK

O2
OZ165

CD Player

page 29

CDROM

C

Touch Pad

page 36

page 35

page 21

D

EC I/O Buffer

page 34

BIOS Int.KBD

page 33

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

SD/MS Slot

page 28

USB port 3 USB port 4

Winbond
W81386D

page 28

AC97
Codec

ALC202

AMP& Phone
Jack

Title

Size Document Number Rev

Date: Sheet

BlueTooth I/F

page 27

page 30

page 31

Compal Electronics, Inc.

Block Diagram

ACT10

E

245Thursday, May 30, 2002

1.0A

of

A

B

C

D

E

HD#[0..63]<7>
HA#[3..31]<7>

1 1

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20

2 2

+CPU_CORE

HREQ#[0..4]

R23 10K_0402

1 2
1 2

HREQ#[0..4]<7>

HADS#<7>

HBR0#<7>

3 3

HBPRI#<7>

HBNR#<7>

HLOCK#<7>

CLK_HCLK<15>
CLK_HCLK#<15>

HIT#<7>

HITM#<7>

HDEFER#<7>

HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

R42 200_0402

AF22
AF23

M6
M3

M4
N1
M1
N2
N4
N5

R2

R3
U1
U3

R6
W1

U4
W2

AB1

H3
G1

AC1
AA3

AC3

H6
D2
G2
G4

K2
K4
L6
K1
L3

L2

T1
P3

P4
T2
P6
T4

V2

T5
V3
Y1

J1
K5
J4
J3

V5

F3
E3
E2

+CPU_CORE

A10

U1A

A#3
A#4
A#5
A#6
A#7
A#8
A#9
A#10
A#11
A#12
A#13
A#14
A#15
A#16
A#17
A#18
A#19
A#20
A#21
A#22
A#23
A#24
A#25
A#26
A#27
A#28
A#29
A#30
A#31
A#32
A#33
A#34
A#35

REQ#0
REQ#1
REQ#2
REQ#3
REQ#4
ADS#

AP#0
AP#1
BINIT#
IERR#

BR0#
BPRI#
BNR#
LOCK#

BCLK0
BCLK1

HIT#
HITM#
DEFER#

+CPU_CORE

A12

A14

A16

A18

A20A8AA10

AA12

AA14

AA16

AA18

AA8

AB11

AB13

AB15

AB17

AB19

AB7

AB9

AC10

AC12

AC14

AC16

AC18

AC8

AD11

AD13

AD15

AD17

AD19

AD7

AD9

AE10

AE12

AE14

AE16

AE18

AE20

AE6

AE8

AF11

AF13

AF15

AF17

AF19

AF2

AF21

AF5

AF7

AF9

B11

B13

B15

B17

B19B7B9

C10

C12

C14

C16

C18

C20C8D11

D13

D15

D17

D19D7D9

E10

VCC_0

VCC_1

VCC_2

VCC_3

VCC_4

VCC_5

VCC_6

VCC_7

VCC_8

VSS_0

H1H4H23
GND

VCC_9

VCC_10

VCC_11

VCC_12

VCC_13

VCC_14

VCC_15

VCC_16

VCC_17

VCC_18

VCC_19

VCC_20

VCC_21

VCC_22

VCC_23

VCC_24

VCC_25

VCC_26

VCC_27

VCC_28

VCC_29

VCC_30

VCC_31

VCC_32

VCC_33

VCC_34

VCC_35

VCC_36

VCC_37

VCC_38

VCC_39

VCC_40

VCC_41

VCC_42

VCC_43

VCC_44

VCC_45

VCC_46

VCC_47

VCC_48

VCC_49

VCC_50

VCC_51

VCC_52

VCC_53

VCC_54

VCC_55

VCC_56

VCC_57

VCC_58

VCC_59

VCC_61

VCC_62

VCC_63

VCC_64

VCC_65

Mobile

NorthWood

32

VSS_33

VSS_34

VSS_35

VSS_36

VSS_37

VSS_38

VSS_39

VSS_40

VSS_41

VSS_42

VSS_43

VSS_44

VSS_45

VSS_46

VSS_47

VSS_48

VSS_49

VSS_50

VSS_25

VSS_26

VSS_27

VSS_28

VSS_29

VSS_30

VSS_31

VSS_1

VSS_2

VSS_3

VSS_4

VSS_5

VSS_6

VSS_7

VSS_8

VSS_9

VSS_10

VSS_11

VSS_12

VSS_13

VSS_14

VSS_15

VSS_16

VSS_17

VSS_18

VSS_19

VSS_20

VSS_21

VSS_22

VSS_23

H26

A11

A13

A15

A17

A19

A21

A24

A26A3A9

AA1

AA11

AA13

AA15

VSS_24

AA17

AA19

AA23

AA26

AA4

AA7

AA9

AB10

VSS_

AB12

AB14

AB16

AB18

AB20

AB21

AB24

AB3

AB6

AB8

AC11

AC13

AC15

AC17

AC19

AC2

AC22

AC25

AC5

VSS_51

AC7

AC9

AD1

AD10

AD12

AD14

AD16

AD18

VCC_81

VCC_82

VCC_83

VSS_52

VSS_53

VSS_54

AD21

AD23

AD4

VCC_84

VSS_55

VSS_56

AD8

F13

F15

F17

F19

F9

VCC_73

VCC_66

VCC_67

VCC_68

VCC_69

VCC_70

VCC_71

VCC_72

D#0
D#1
D#2
D#3
D#4
D#5
D#6
D#7
D#8

D#9
D#10
D#11
D#12
D#13
D#14
D#15
D#16
D#17
D#18
D#19
D#20
D#21
D#22
D#23
D#24
D#25
D#26
D#27
D#28
D#29
D#30
D#31
D#32
D#33
D#34
D#35
D#36
D#37
D#38
D#39
D#40
D#41
D#42
D#43
D#44
D#45
D#46
D#47
D#48
D#49
D#50
D#51
D#52
D#53
D#54
D#55
D#56
D#57
D#58
D#59
D#60
D#61
D#62
D#63

VCC_85

VCC_74

VCC_75

VCC_76

VCC_77

VCC_78

VCC_79

VCC_80

E12

E14

E16

E18

E20E8F11

B21
B22
A23
A25
C21
D22
B24
C23
C24
B25
G22
H21
C26
D23
J21
D25
H22
E24
G23
F23
F24
E25
F26
D26
L21
G26
H24
M21
L22
J24
K23
H25
M23
N22
P21
M24
N23
M26
N26
N25
R21
P24
R25
R24
T26
T25
T22
T23
U26
U24
U23
V25
U21
V22
V24
W26
Y26
W25
Y23
Y24
Y21
AA25
AA22
AA24

NorthWood

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

HD#[0..63]
HA#[3..31]

+CPU_CORE

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

B

C

D

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Mobile NorthwooduFCPGA

ACT10

345Thursday, May 30, 2002

E

1.0A

of

200_0402

12

+CPU_CORE

R238
@10K_0402

R242
@10K_0402

1 8
2 7
3 6
4 5

C254

12

12
12

12
12

12

56_0402

12

56_0402

12

56_0402

12

56_0402

12

200_0402

12

56_0402

12

56_0402

12

56_0402

12

56_0402

12
12

51.1_1%

12

+1.2VP

A

H_A20M#
H_SMI#
H_IGNNE#
H_STPCLK#
H_DPSLP#
H_NMI
H_INIT#
H_INTR

H_FERR#
H_PWRGD

H_RESET#

PM_CPUPERF#

12

R237
@10K_0402

H_BSEL0
H_BSEL1

12

R241
@10K_0402

Murata LQG21F4R7N00

L15

1 2

L16

1 2

ITP_TDI
ITP_TMS
ITP_TRST#
ITP_TCK

ITP_PREQ#
ITP_PRDY#

ITP_BPM0
ITP_BPM1

H_THERMDA
H_THERMDC

A

+1.2VP

BSEL0 BSEL1

0 0
0 1
1 0

MurataLQG21F4R7N00_80mA
MurataLQG21F4R7N00_80mA

12

C10

+

33UF_D2_16V

R246

+CPU_CORE

R245

W=15mil

C255

.1UF_16V_0402_Y5V

1 2

U2

1
2
3
4
5
6
7
8 9

MAX6654MEE

NC

STBY

VCC

SMBCLK

DXP
DXN

SMBDATA

NC
ADD1

ALERT

GND

ADD0

GND NC

NC

NC

H_RS#0<7>
H_RS#1<7>
H_RS#2<7>

H_TRDY#<7>

H_A20M#<18>

H_FERR#<18>

H_IGNNE#<18>

H_SMI#<18>

H_PWRGD<7>

H_STPCLK#<18>

H_DPSLP#<18>

H_INTR<18>

H_NMI<18>

H_INIT#<18>

H_RESET#<7>

H_DBSY#<7>

H_DRDY#<7>

1 2

R236 56_0402

100
Resvd
Resvd
Resvd1 1

12

C17

+

33UF_D2_16V

H_VSSA

4.7K_0402

12

4.7K_0402

12

+5VS

R213

10K_0402

1 2

16
15
14
13
12
11
10

R211

1K_0402

1 2

+5VS

R210

1 2

1 1

+CPU_CORE

1 1

2 2

R306
R304
R303
R268
R244
R299
R269
R300

R305

R251 51.1_1%

R258

R308

Place resistor <100mils from
CPU pin

12

12

If used ITP port must depop

RP70 8P4R_1.5K

+CPU_CORE

3 3

4 4

+5VS

R252 51.1_1%

R262 51.1_1%
R249 51.1_1%

R272 51.1_1%

Thermal Sensor
MAX6654MEE

2200PF_50V_0603

R212 1K_0402

Address:1001_110X

B

AE11

AE13

AE15

AE17

AE19

AE22

AE24

AE26

AE7

AE9

AF1

AF10

AF12

AF14

AF16

AF18

AF20

AF26

U1B

VSS_57

VSS_58

VSS_59

VSS_60

VSS_61

VSS_62

VSS_63

VSS_64

VSS_65

VSS_66

VSS_131

VSS_132

VSS_133

VSS_134

VSS_67

VSS_135

VSS_136

VSS_137

VSS_138

J25J5K21

+CPU_CORE

F1

RS#0

G5

RS#1

F4

RS#2

AB2

RSP#

J6

TRDY#

H_A20M#

C6

1 2

AB23
AD25

AB25

AD6
AD5

AC6
AB5
AC4

AA5
AB4

AD20
AE23
AF25

AF3

AC26
AD26

R34

51.1_1%

B6
B2
B5

Y4

D1

E5

W5

H5
H2

B3

C4

A2

Y6

D4
C1
D5

F7
E6

A5

L24

P1

A20M#
FERR#
IGNNE#
SMI#
PWRGOOD
STPCLK#
DPSLP#
LINT0
LINT1
INIT#
RESET#

DBSY#
DRDY#
BSEL0
BSEL1

THERMDA
THERMDC

THERMTRIP#

BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5

TCK
TDI
TDO
TMS
TRST#

VCCA
VCCSENSE
VCCIOPLL

NC7
NC8

ITP_CLK0
ITP_CLK1

COMP0
COMP1

VSS_129

F8

VSS_130

G21

G24G3G6J2J22

H_FERR#
H_IGNNE#
H_SMI#
H_PWRGD
H_STPCLK#
H_DPSLP#
H_INTR
H_NMI
H_INIT#
H_RESET#

H_BSEL0 TESTTHI8_10
H_BSEL1

H_THERMDA
H_THERMDC

H_THERMTRIP#

ITP_BPM0
ITP_BPM1
ITP_PRDY#
ITP_PREQ#

ITP_TCK
ITP_TDI

ITP_TMS
ITP_TRST#

H_VCCA
VCCSENSE
H_VCCIOPLL

CLK_ITPP
CLK_ITPP#

R41

51.1_1%
1 2

R_A

EC_SMB_CK2 <6,16,29,33>
EC_SMB_DA2 <6,16,29,33>

R_B

10K_0402

B

AF6

VSS_68

VSS_69

VSS_70

VSS_71

VSS_72

VSS_73

SKTOCC#

VSS_139

VSS_140

VSS_141

VSS_142

VSS_143

VSS_144

VSS_145

K24K3K6L1L23

L26L4M2

GTL Reference Voltage

Layout note :

1. Place R_A and R_B near CPU.

2. Place decoupling cap 220PF near CPU.(Within

12

500mils)

R297

49.9_1%

Trace width>=7mila

12

R298
100_1%

C399

1UF_10V_0603_X5R

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

VSS_75

VSS_146

AF8

B10

VSS_76

VSS_147

M22

M25M5N21

VSS_77

VSS_148

B12

B14

VSS_78

VSS_79

VSS_149

VSS_150

C

B16

B18

B20

B23

B26B4B8

C11

C13

C15

C17

VSS_80

VSS_81

VSS_82

VSS_83

VSS_84

VSS_85

VSS_86

VSS_87

VSS_88

VSS_89

Mobile

NorthWood

VSS_151

VSS_152

VSS_153

VSS_154

VSS_155

VSS_156

VSS_157

VSS_158

VSS_159

N24N3N6P2P22

VSS_160

P25P5R1

R23

R26R4T21

C398
220PF_50V_0402_NPO

C

GND

VSS_90

VSS_161

C19C2C22

VSS_91

VSS_162

B_PCIRST#<16,17,28,29,33,34>

MAINPWON<38,41,42>

C25C5C7C9D10

VSS_92

VSS_93

VSS_94

VSS_163

VSS_164

VSS_165

T24T3T6U2U22

+H_GTLREF1

VSS_95

VSS_166

VSS_96

VSS_167

U25U5V1

VSS_97

VSS_168

VSS_98

VSS_169

D

D12

D14

D16

D18

D20

D21

D24D3D6D8E1

E11

E13

E15

E17

E19

E23

E26E4E7E9F10

F12

VSS_99

VSS_100

VSS_101

VSS_102

VSS_103

VSS_104

VSS_105

VSS_106

VSS_107

VSS_108

VSS_109

VSS_110

VSS_111

VSS_112

VSS_113

VSS_114

VSS_115

VSS_116

VSS_117

VSS_118

VSS_119

VSS_120

VSS_121

VID0

VID1

VID2

VID3

VSS_170

VSS_171

V23

VSS_172

VSS_173

V26V4W21

1 3

D

Q24
@2N7002

VSS_174

VSS_175

VSS_176

W24W3W6Y2Y22

2

G

S

VSS_177

VSS_178

VSS_179

VSS_180

VSS_181

Y25

Y5

R226

@300_0402

VID4

AE5

AE4

AE3

AE2

AE1

VL

R10
1 2
Q25

1 2

1

2

3

@3904

Q26

1
3

@3904

D

F14

F16

F18F2F22

F25

F5

VSS_122

VSS_123

VSS_124

VSS_125

VSS_126

VSS_127

PROCHOT#

VSSSENSE

VCCVID

NC5

NC6

AF4

AE21

AF24

CPU_VR_VID4 <5,43>
CPU_VR_VID3 <5,43>
CPU_VR_VID2 <5,43>
CPU_VR_VID1 <5,43>
CPU_VR_VID0 <5,43>

@470_0402

R225

1 2

2

@470_0402

GND

VSS_128

DP#0
DP#1
DP#2
DP#3

GTLREF0
GTLREF1
GTLREF2
GTLREF3

NC1
NC2

TESTHI0
TESTHI1
TESTHI2
TESTHI3
TESTHI4
TESTHI5
TESTHI6
TESTHI7
TESTHI8
TESTHI9

TESTHI10

GHI#

DSTBN#0
DSTBN#1
DSTBN#2
DSTBN#3

DSTBP#0
DSTBP#1
DSTBP#2
DSTBP#3

ADSTB#0
ADSTB#1

DBI#0
DBI#1
DBI#2
DBI#3

DBR#

MCERR#

SLP#

VSSA

NC3
NC4

NorthWood

PROCHOT#<33>

H_THERMTRIP#

E

J26
K25
K26

+H_GTLREF1

L25

AA21
AA6
F20
F6
A22
A7

TESTTHI0_1

AD24
AA2

TESTTHI2_7

AC21
AC20
AC24
AC23
AA20
AB22
U6
W4
Y3
A6

H_DSTBN#0

E22

H_DSTBN#1

K22

H_DSTBN#2

R22

H_DSTBN#3

W22

H_DSTBP#0

F21

H_DSTBP#1

J23

H_DSTBP#2

P23

H_DSTBP#3

W23

L5
R5

H_DBI#0

E21

H_DBI#1

G25

H_DBI#2

P26

H_DBI#3

V21

DBR#

AE25

H_PROCHOT#

C3
V6

H_SLP#

AB26

H_VSSA

AD22

VSSSENSE

A4

AD2
AD3

+1.2VP

Title

Size Document Number Rev

ACT10

Date: Sheet

All of these pin
connected inside

+CPU_CORE

R243 1K_0402

1 2

R260 1K_0402

1 2

R267 1K_0402

1 2

PM_CPUPERF#

H_DSTBN#[0..3]

H_DSTBP#[0..3]

H_DBI#[0..3]

R302 56_0402

1 2

C287
.1UF_16V_0402_Y5V

+5VS

R206
1K_0402

1 2

R261 200_0402

R518
470_0402

H_DSTBN#[0..3] <7>

H_DSTBP#[0..3] <7>

H_ADSTB#0 <7>
H_ADSTB#1 <7>

H_DBI#[0..3] <7>

12

+CPU_CORE

1 2
2

31

Q60
3904

PM_CPUPERF# <18>

+CPU_CORE

H_SLP# <18>
+CPU_CORE

H_PROCHOT#

Compal Electronics, Inc.

Mobile Northwood uFCPGA & Thermal sensor

445Thursday, May 30, 2002

E

of

1.0A

A

B

C

D

E

Layout note :

Place close to CPU, Use 2~3 vias per PAD.
Place .22uF caps underneath balls on solder side.
Place 10uF caps on the peripheral near balls.
Use 2~3 vias per PAD.

1 1

2 2

3 3

+CPU_CORE

C99
10UF_6.3V_1206_X7R

+CPU_CORE

C97
10UF_6.3V_1206_X7R

+CPU_CORE

C289
10UF_6.3V_1206_X7R

+CPU_CORE

C103
10UF_6.3V_1206_X7R

+CPU_CORE

C359
10UF_6.3V_1206_X7R

+CPU_CORE

C330
10UF_6.3V_1206_X7R

+CPU_CORE

Please place these cap in the socket cavity area

C98

10UF_6.3V_1206_X7R

C77

10UF_6.3V_1206_X7R

C100

10UF_6.3V_1206_X7R

C96

10UF_6.3V_1206_X7R

C101

10UF_6.3V_1206_X7R

C56

10UF_6.3V_1206_X7R

Please place these cap on the socket north side

C411

10UF_6.3V_1206_X7R

C424

10UF_6.3V_1206_X7R

C383

10UF_6.3V_1206_X7R

C339

10UF_6.3V_1206_X7R

C416

10UF_6.3V_1206_X7R

C302

10UF_6.3V_1206_X7R

C421

10UF_6.3V_1206_X7R

C387

10UF_6.3V_1206_X7R

C311

10UF_6.3V_1206_X7R

Please place these cap on the socket south side

C347

10UF_6.3V_1206_X7R

C364

10UF_6.3V_1206_X7R

C422

10UF_6.3V_1206_X7R

C102

10UF_6.3V_1206_X7R

C67

10UF_6.3V_1206_X7R

C400

10UF_6.3V_1206_X7R

C319

10UF_6.3V_1206_X7R

C60

10UF_6.3V_1206_X7R

CPU_VR_VID1<4,43>
CPU_VR_VID2<4,43>
CPU_VR_VID3<4,43>
CPU_VR_VID4<4,43>

Layout note :

Place close to CPU power and
ground pin as possible
(<1inch)

+CPU_CORE

12

C276

+

220UF_D2_4V_15m

+CPU_CORE

12

C274

+

220UF_D2_4V_15m

+CPU_CORE

12

C34

.22UF_10V_0603_X7R

R224

1K_0402

12

C35

.22UF_10V_0603_X7R

.22UF_10V_0603_X7R

+3VS

12

182736

45

RP69
8P4R_1K

Used ESR 15m ohm cap total ESR=1.875m
ohm

12

C420

+

220UF_D2_4V_15m

12

C273

+

220UF_D2_4V_15m

12

C32

.22UF_10V_0603_X7R

12

C33

12

+

+

12

C46

.22UF_10V_0603_X7R

.22UF_10V_0603_X7R

C271
220UF_D2_4V_15m

12

C272
220UF_D2_4V_15m

12

C47

.22UF_10V_0603_X7R

CPU Voltage ID

12

+

12

+

12

12

C30

.22UF_10V_0603_X7R

C269
220UF_D2_4V_15m

C270
220UF_D2_4V_15m

12

C48

C49

.22UF_10V_0603_X7R

CPU_VID0 <4,43>CPU_VR_VID0<4,43>
CPU_VID1 <4,43>
CPU_VID2 <4,43>
CPU_VID3 <4,43>
CPU_VID4 <4,43>

12

C50

.22UF_10V_0603_X7R

1

C385

10UF_6.3V_1206_X7R

C337

10UF_6.3V_1206_X7R

PAD4

PAD-5.0X3.5

C358

10UF_6.3V_1206_X7R

1

B

PAD5

PAD-5.0X3.5

1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

CPU Bypass & CPU VID

ACT10

545Thursday, May 30, 2002

E

1.0A

of

C423
10UF_6.3V_1206_X7R

+CPU_CORE

C317
10UF_6.3V_1206_X7R

4 4

EMI Clip PAD for CPU

PAD1

1

PAD-5.0X3.5

C384

10UF_6.3V_1206_X7R

C335

10UF_6.3V_1206_X7R

PAD2

PAD-5.0X3.5

A

1

C360

10UF_6.3V_1206_X7R

C318

10UF_6.3V_1206_X7R

PAD3

PAD-5.0X3.5

5

4

3

2

1

D D

ITP_PWROK<35>

+5VS

53

R583 @100K_0402

+5VS

EC_PWROFF<34>

C C

1 2

POWERCUT

U68

1
2

@7SH08

R620

+5VS

C173

R126

@10K_0402

+5VS

.1UF_16V_0402_Y5V

1 2

U4A

14

1
2

7

4

0_0402

+3V

74HCT08

+5VS
POWER

3

U69

1

VCC

GND

2

3

RST

@MAX809_2.93V

R128

5.6K_0402

R584 @100K_0402

POWERCUT

R129
10K_0402

1 2

PM_PWROK <9,18>

U5

EC_SMB_DA2<4,16,29,33>

EC_SMB_CK2<4,16,29,33>

1

SDA

2

SCL

3

OS#

4

GND

@LM75CIMMX-5

Dectect PCB Thermal

+5VS

8

VCC

7

A0

6

A1

5

A2

Address:1001_000X

12

C84

.1UF_16V_0402_Y5V

R37 1K_0402

1 2

Fan1 Control circuit

+12VALW

2

D9
1N4148

1
3

+5VALW

2 1

D10
1SS355

2 1

C4
@1000PF_0402

1000PF_0402_X7R

+5VFAN

12

12

C744

C743

.1UF_16V_0402_Y5V

JP1

1
2
3

53398-0390

+3V

12

R8
10K_0402

FAN1_TACH <33>

12

B B

U60

LMV321_SOT23-5

+5V

5

1

EC_EN_FAN<33>

R431
13K_1%

+

12

4

3

-

2

12

R430

7.32K_1%

R7
10K_0402

21

D7
1N4148

3

Q4

2

2SA1036K

1

Q5

FMMT619

C8

2.2UF_16V_0805

1 2

A A

COMPAL Electronics,Inc

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

5

4

3

2

Title

LM75 Thermal sensor & Fan control

Size Document Number Rev

ACT10

Date: Sheet

645Thursday, May 30, 2002

1

of

1.0A

A

B

C

D

E

H_DSTBP#[0..3]<4>
H_DSTBN#[0..3]<4>

H_DBI#[0..3]<4>

HD#[0..63]<3>

1 1

2 2

3 3

A4XAVDD

.1UF_0402_X5R

+CPU_CORE

4 4

HREQ#[0..4]<3>

MurataBLM21A601S

C9

R229

20_1%
R240

113_1%

HA#[3..31]<3>

L2

1 2

H_DSTBP#[0..3]
H_DSTBN#[0..3]
H_DBI#[0..3]

HA#[3..31]
HREQ#[0..4]

CLK_GHT<15>

CLK_GHT#<15>

HLOCK#<3>
HDEFER#<3>
H_TRDY#<4>

H_RESET#<4>
H_PWRGD<4>

HBPRI#<3>

HBR0#<3>

H_RS#2<4>
H_RS#1<4>
H_RS#0<4>

HADS#<3>

HITM#<3>

HIT#<3>

H_DRDY#<4>

H_DBSY#<4>

HBNR#<3>

H_ADSTB#1<4>
H_ADSTB#0<4>

+3VS

C5
10UF_10V_1206

HNCOMP

Rds-on(n) = 10 ohm
HNCVERF = 1/3 VCCP

HPCOMP

Rds-on(p) = 56 ohm
HPCVERF = 2/3 VCCP

A

+3VS

C1XAVDD

CLOSE CHIP

C415

.1UF_0402_X5R

C4XAVDD

HVREF

HNCVREF

HNCOMP

HPCOMP

C1XAVSS

AH25

AJ25

AH27

AJ27

U21

T21

P21

N21

J17

B20

B19

A19A7F9B7M6M5M4L3L6L4K6L2K3J3K4J2J6J4J1H6F4F1G6E3F5E2E4E1D3D4C2F7C3E6B2D5D6A3D7C5A5C6D8

CPU_GHT
CPU_GHT#

HLOCK#
HDEFER#
H_TRDY#
H_RESET#
H_PWRGD
HBPRI#
HBR0#

HRS#2
HRS#1
HRS#0

HADS#
HITM#
HIT#
H_DRDY#
H_DBSY#
HBNR#

HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0

H_ADSTB#1
H_ADSTB#0

HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
HA#5
HA#4
HA#3

+CPU_CORE +CPU_CORE

R274

75_1%

R271
150_1%

AJ26

CPUCLK

AH26

CPUCLK#

U24

HLOCK#

U26

DEFER#

V26

HTRDY#

C20

CPURST#

D19

CPUPWRGD

T27

BPRI#

U25

BREQ0#

T24

RS#2

T26

RS#1

U29

RS#0

V28

ADS#

T28

HITM#

U28

HIT#

W26

DRDY#

V24

DBSY#

V27

BNR#

W28

HREQ#4

W29

HREQ#3

W24

HREQ#2

W25

HREQ#1

Y27

HREQ#0

AD24

HASTB#1

AA24

HASTB#0

AF26

HA#31

AE25

HA#30

AH28

HA#29

AD26

HA#28

AG29

HA#27

AE26

HA#26

AF28

HA#25

AC24

HA#24

AG28

HA#23

AE29

HA#22

AD28

HA#21

AC25

HA#20

AD27

HA#19

AE28

HA#18

AF27

HA#17

AB24

HA#16

AB26

HA#15

AC28

HA#14

AC26

HA#13

AC29

HA#12

AA26

HA#11

AB28

HA#10

AB27

HA#9

AA25

HA#8

AA29

HA#7

AA28

HA#6

Y26

HA#5

Y24

HA#4

Y28

HA#3

C349
.01UF_25V_0402_X7R

C343

.01UF_25V_0402_X7R

place this capacitor
under 650 solder side

C1XAVSS

C4XAVSS

C1XAVDD

C4XAVDD

HOST

HD#63

HD#62

HD#61

HD#60

HD#59

HD#58

HD#57

F19

A21

HD#62

HD#61

E19

D22

D20

HD#58

HD#60

HD#59

HVREF

C355
.1UF_0402_X5R

B

HD#56

B22

C22

B23

HD#57

HD#55

HD#56

B21

HD#63

HVREF0

HVREF1

HVREF2

HVREF3

HVREF4

HPCOMP

HNCOMP

HNCOMPVREF

HD#55

HD#54

HD#53

HD#52

HD#51

HD#50

HD#49

HD#48

HD#47

A23

D21

HD#53

HD#54

HD#46

F22

D24

D23

C24

B24

E25

E23

HD#47

HD#49

HD#51

HD#52

HD#50

HD#48

HD#46

AGP_AD2

AGP_AD0

AGP_AD6

AGP_ST2

AGP_AD1

AGP_AD7

AGP_AD5

AGP_AD3

AGP_ST0

AGP_AD4

AGP_ST1

ST0

ST1

ST2

VBD7/AAD0

VBD6/AAD1

VBD5/AAD2

VBD4/AAD3

VBD3/AAD4

VBD2/AAD5

CBD1/AAD6

AGP_AD14

AGP_AD11

AGP_AD9

AGP_AD16

AGP_AD10

AGP_AD8

VAD6/AAD8

VAD5/AAD9

CBD0/AAD7

AGP_AD17

AGP_AD13

AGP_AD12

AGP_AD18

AGP_AD15

VAD4/AAD10

VAD7/AAD11

VAD8/AAD12

VAD9/AAD13

VADE/AAD16

VAD10/AAD14

VAD11/AAD15

VAVSYNC/AAD17

650-1

HD#45

HD#44

HD#43

HD#42

HD#41

HD#40

HD#39

HD#38

HD#37

HD#36

HD#35

HD#34

HD#33

HD#32

HD#31

HD#30

HD#29

HD#28

HD#27

HD#26

HD#25

D25

A25

C26

B26

B27

D26

B28

E26

F28

G25

F27

F26

G24

H24

G29

HD#36

HD#37

HD#41

HD#42

HD#45

HD#39

HD#38

HD#33

HD#35

HD#31

HD#32

HD#44

75_1%

HD#43

R230

150_1%

R228

HD#34

HD#40

C290
.01UF_25V_0402_X7R

HNCVREF

C285
.01UF_25V_0402_X7R

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

HD#24

J26

G26

J25

H26

G28

H28

J24

K28

HD#26

HD#30

HD#27

HD#23

HD#25

HD#29

HD#24

HD#28

C

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

R24 8.2K_0402

12

R17 8.2K_0402

12

R279

60.4_1%

R227

8.2K_0603
R21

8.2K_0603

AGP_ADSTB0#

12

AGP_ADSTB1#

12

AGP_SBSTB#

12

12

R239
@22_0402

12

C283
@10PF_0402

745Thursday, May 30, 2002

of

VDDQ

VDDQ

1.0A

AGP_ST[0..2]<16>

AGP_AD29

AGP_AD30

AGP_SBA6

AGP_AD28

AGP_AD31

AGP_SBA7

SBA7

SBA6

VBCTL0AAD28

VBCTL1/AAD29

VBVSYNCAAD31

VBHSYNC/AAD30

AGP

HD#13

HD#12

HD#11

HD#10

HD#9

HD#8

HD#7

P26

L29

N24

N26

M27

N28

P27

HD#8

HD#12

HD#7

HD#10

HD#9

HD#11

HD#13

AGP_SBA5

AGP_SBA3

AGP_SBA2

AGP_SBA4

SBA5

SBA4

SBA3

SBA2

VAGCLKN/AD_STB#0

VBGCLKN/AD_STB#1

HD#6

HD#5

HD#4

HD#3

N29

R24

R28

M28

HD#3

HD#5

HD#6

HD#4

AGP_SBA0

AGP_SBA1

C7

AC/BE#3

SBA1

AC/BE#2
AC/BE#1
AC/BE#0

VBCLK/SBA0

VBCAD/AREQ#

AGNT#

AFRAME#

AIRDY#

ATRDY#

ADEVSEL#

ASERR#
ASTOP#

VBHCLK/RBF#
VGPIO2/WBF#
VGPIO3/PIPE#

SB_STB

SB_STB#

VAGCLK/AD_STB0

VBGCLK/AD_STB1

AGPCLK

AGPRCOMP

A1XAVDD

A1XAVSS

A4XAVDD

A4XAVSS

AGPVREF

AGPVSSREF

HDSTBN#3
HDSTBN#2
HDSTBN#1
HDSTBN#0

HDSTBP#3
HDSTBP#2
HDSTBP#1
HDSTBP#0

DBI#3

DBI#2

HD#2

HD#1

HD#0

P28

R26

R29

E21

A27

HD#0

HD#1

HD#2

H_DBI#2

H_DBI#3

C4XAVDD

U6A

F6
F3
H4
K5

C9
A6
G2
G1
G3
G4
H5
H1

H3

APAR

E8
F8
D9

D10

NC

B3

NC

C4

NC

B5
A4

K1
L1

C1
D1

B10
M1
B9

A9
B8

A8
M3

M2

F20
F23
K24
P24

F21
F24
L24
N25

DBI#1

DBI#0

SIS650

H27

R25

H_DBI#0

H_DBI#1

.1UF_0402_X5R

AGP_AD[0..31]<16>

AGP_C/BE#[0..3]<16>

AGP_C/BE#3
AGP_C/BE#2
AGP_C/BE#1
AGP_C/BE#0

AGP_REQ#
AGP_GNT#
AGP_FRAME#
AGP_IRDY#
AGP_TRDY#
AGP_DEVSEL#
AGP_SERR#
AGP_STOP#

AGP_PAR
AGP_RBF#

AGP_WBF#
AGP_PIPE#

CLK_AGP0
AGPRCOMP

A4XAVDD

H_DSTBN#3
H_DSTBN#2
H_DSTBN#1
H_DSTBN#0

H_DSTBP#3
H_DSTBP#2
H_DSTBP#1
H_DSTBP#0

C419

C418

.01UF_25V_0402_X7R

D

1 2

AGP_AD25

AGP_AD21

AGP_AD24

AGP_AD26

AGP_AD20

AGP_AD19

AGP_AD22

AGP_AD27

AGP_AD23

VBD8/AAD21

VBD9/AAD22

VAD1/AAD23

VAD0/AAD24

VAD2/AAD25

VAD3/AAD26

VBD11/AAD19

VAHSYNC/AAD18

HD#23

HD#22

J29

K27

HD#22

HD#21

VBDE/AAD27

VBD10/AAD20

HD#21

HD#20

HD#19

HD#18

HD#17

HD#16

HD#15

HD#14

J28

M24

L26

K26

L25

L28

M26

HD#14

HD#16

HD#17

HD#20

HD#15

HD#18

HD#19

AGP_ST[0..2]

AGP_AD[0..31]HD#[0..63]
AGP_C/BE#[0..3]

AGP_SBSTB

AGP_SBSTB#

AGP_ADSTB0
AGP_ADSTB#0

AGP_ADSTB1
AGP_ADSTB#1

A1XAVDD
A1XAVSS

AGP_NBREF

L36

MurataBLM21A601S

RP4 8P4R_8.2K
AGP_FRAME#
AGP_TRDY#
AGP_PAR
AGP_STOP#

RP2 8P4R_8.2K
AGP_GNT#

AGP_IRDY#
AGP_DEVSEL#

RP3 8P4R_8.2K

AGP_WBF#

ENVDD

AGP_PIPE#

ENBLT

AGP_SBSTB

AGP_REQ# <16>
AGP_GNT# <16>
AGP_FRAME# <16>
AGP_IRDY# <16>
AGP_TRDY# <16>
AGP_DEVSEL# <16>

AGP_STOP# <16>
AGP_PAR <16>
AGP_RBF# <16>

AGP_WBF# <16>
AGP_PIPE# <16>

AGP_ADSTB0 <16>
AGP_ADSTB0# <16>

AGP_ADSTB1 <16>

CLK_AGP0 <15>

C41 .1UF_0402_X5R

AGP_ADSTB1# <16>

+3VS

C288

.1UF_0402_X5R

CLOSE CHIP

AGP_NBREF

25MIL

+3VS

C417
10UF_10V_1206

Title

Size Document Number Rev

ACT10

Date: Sheet

AGP_SERR#

AGP_ADSTB0

AGP_ADSTB1

AGPRCOMP

AGP_REQ#

AGP_RBF#

R28 8.2K_0402

R18 8.2K_0402

R11 8.2K_0402

VDDQ

R27

300_0603_1%

R35
300_0603_1%

CLK_AGP0

Compal Electronics, Inc.

SiS 645/650

E

A

1 1

2 2

+3VALW

12

12

R280

R162

4.7K_0402

4.7K_0402

PSON#<18> SLP_S5# <33>

S3AUXSW#

3 3

S0 S3 S5
S3AUXSW#
PSON#
SLP_S3#
SLP_S5#

1 0 1 0

0 1 1 0

1 0 1 0

0 1 1 0

R408

0_0402

1 2

R404
0_0402

1 2

B

DDR_SDQ61
DDR_SDQ58
DDR_SDQ57
DDR_SDQ56
DDR_SDQ63
DDR_SDQ59
DDR_SDQ62
DDR_SDQ60
DDR_DM7

DDR_SDQS7

DDR_SDQ55
DDR_SDQ50
DDR_SDQ52
DDR_SDQ48
DDR_SDQ51
DDR_SDQ54
DDR_SDQ49
DDR_SDQ53
DDR_DM6

DDR_SDQS6

DDR_SDQ46
DDR_SDQ42
DDR_SDQ43
DDR_SDQ44
DDR_SDQ47
DDR_SDQ45
DDR_SDQ40
DDR_SDQ41
DDR_DM5

DDR_SDQS5

DDR_SDQ38
DDR_SDQ35
DDR_SDQ33
DDR_SDQ32
DDR_SDQ39
DDR_SDQ34
DDR_SDQ36
DDR_SDQ37
DDR_DM4

DDR_SDQS4

DDR_SDQ31
DDR_SDQ26
DDR_SDQ29
DDR_SDQ25
DDR_SDQ30
DDR_SDQ27
DDR_SDQ28
DDR_SDQ24
DDR_DM3

DDR_SDQS3

DDR_SDQ21
DDR_SDQ17
DDR_SDQ19
DDR_SDQ20
DDR_SDQ22
DDR_SDQ23
DDR_SDQ18
DDR_SDQ16
DDR_DM2

DDR_SDQS2

DDR_SDQ10
DDR_SDQ15
DDR_SDQ12
DDR_SDQ14
DDR_SDQ9
DDR_SDQ8
DDR_SDQ13

SLP_S3# <33>

X

DDR_SDQ11
DDR_DM1

DDR_SDQS1

DDR_SDQ0
DDR_SDQ3
DDR_SDQ4
DDR_SDQ5
DDR_SDQ6
DDR_SDQ2
DDR_SDQ7
DDR_SDQ1
DDR_DM0

DDR_SDQS0

AJ23
AG22
AH21

AJ21
AD23
AE23
AF22
AF21
AD22
AH22
AD21
AG20
AE19
AF19
AE21
AD20
AD19
AH19
AF20
AH20
AF18
AG18
AH17
AD16
AD18
AD17
AF17

AJ17
AE17
AH18
AD14
AG14

AJ13
AE13

AJ15
AF14
AD13
AF13
AH13
AH14
AD10
AH10

AG10
AF10

AE9

AD8

AH9

AF9

AD9

AJ9
AH5
AG4

AE5
AH3
AG6

AF6

AF5

AF4
AH4

AJ3

AE4
AD6

AE2
AC5
AG2
AG1

AF3
AC6
AD4

AF2

AB6
AD3

AA6

AB3
AC4

AE1
AD2
AC1

AB4
AC2

C

U6B

MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
DQM0
DQS0/CSB#0
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
DQM1
DQS1/CSB#1
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
DQM2
DQS2/CSB#2
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
DQM3
DQS3/CSB#3
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
DQM4
DQS4/CSB#4
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
DQM5
DQS5/CSB#5
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
DQM6
DQS6/CSB#6
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
DQM7
DQS7/CSB#7

SIS650

650-2

MA10
MA11
MA12
MA13
MA14

SRAS#
SCAS#

SWE#

CS#0
CS#1
CS#2
CS#3
CS#4
CS#5

CKE0
CKE1
CKE2
CKE3
CKE4
CKE5

S3AUXSW#

SDCLK

FWDSDCLKO

SDRCLKI

SDAVDD
SDAVSS

DDRAVDD
DDRAVSS

DDRVREFA
DDRVREFB

DRAM_SEL

D

DDR_SMA[0..12]

DDRMA9
DDRMA12

DDRMA8
DDRMA11

DDRMA5
DDRMA7

DDRMA1

MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9

AF12
AH12
AG12
AD12
AH15
AF15
AH16
AE15
AD15
AF11
AG8
AJ11
AG16
AF16

AH8
AJ7
AH7

AE7
AF7
AH6
AJ5
AF8
AD7

AB2
AA4
AB1
Y6
AA5
Y5
Y4

AA3
AD11
AE11

Y1
Y2

AA1
AA2

AJ19
AH2

W3

DDRMA1
DDRMA2
DDRMA3
DDRMA4
DDRMA5
DDRMA6
DDRMA7
DDRMA8
DDRMA9
DDRMA10

DDRMA11
DDRMA12

DDR_CKE0
DDR_CKE1
DDR_CKE2
DDR_CKE3

S3AUXSW#

SDCLK

B_CLOCK

SDAVDD

DDRAVDD

DDRVREFA
DDRVREFB

DDR_SBS0
DDR_SBS1

DDRCAS#
DDRRAS#

DDRWE#
DDRCS#0
DDRCS#1

DDRCS#2
DDRCS#3

R301

22_0402

R291 4.7K_0402

DDR_CKE0 <12>
DDR_CKE1 <12>
DDR_CKE2 <13>
DDR_CKE3 <13>

DDRMA0

AH11

DDRMA3
DDRMA0

DDRMA2
DDRMA4

DDRMA6

DDRMA10

1 4
2 3

R101 10_0402
R99 10_0402
R100 10_0402

1 4
2 3

SDCLK <15>

FW

DSDCLKO

C414

10PF_0402_NPO

+3VALW

DDR_SDQ[0..63]
DDR_SDQS[0..7]

DDR_DM[0..7]

RP424P2R_10

RP184P2R_10

DDR_SCAS#
DDR_SRAS#

DDR_SWE#
DDR_SCS#0
DDR_SCS#1

DDR_SCS#2
DDR_SCS#3

FWDSDCLKO <15>

DDR_SMA[0..12] <12,13>

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

R112

10_0402

DDR_SBS0 <12>
DDR_SBS1 <12>

DDR_SCAS# <12,13>
DDR_SRAS# <12,13>

DDR_SWE# <12,13>

DDR_SDQ[0..63] <12>
DDR_SDQS[0..7] <12>
DDR_DM[0..7] <12>

E

DDR_SMA9

RP154P2R_10

DDR_SMA12
DDR_SMA8

RP404P2R_10

DDR_SMA11
DDR_SMA5

RP164P2R_10

DDR_SMA7
DDR_SMA1

RP294P2R_10

DDR_SMA3
DDR_SMA0

RP174P2R_10

DDR_SMA2
DDR_SMA4

RP414P2R_10

DDR_SMA6

DDR_SMA10

DDR_SCS#0 <12,13>
DDR_SCS#1 <12>

DDR_SCS#2 <13>
DDR_SCS#3 <13>

SDCLK

+2.5V+2.5V

.01UF_25V_0402_X7R

4 4

.01UF_25V_0402_X7R

C105

R72
150_1%

A

DDRVREFBDDRVREFA

.01UF_25V_0402_X7R

.01UF_25V_0402_X7R

R71
150_1%

C409

R74

150_1%

C95

SDAVDD

R73
150_1%

C82

.1UF_0402_X5R

B

1 2

C389

+3VS

L33

MurataBLM21A601S

DDRAVDD

C386

.01UF_25V_0402_X7R

.1UF_0402_X5R

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

L29

1 2

MurataBLM21A601S

C390

+3VS

C52
10UF_10V_1206

D

12

R295
@22_0402

12

C379
@10PF_0402

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SiS 645/650

ACT10

845Thursday, May 30, 2002

E

of

1.0A

A

B

C

D

E

NB Hardware Trap Table(For Mobil Only)

CLK_NB14M

1 1

+1.8VS

R39

C353
.1UF_0402_X5R

150_1%

R38

150_1%

2 2

+3VS

1 2

C45

10UF_10V_1206

3 3

C357
.1UF_0402_X5R

L28

MurataBLM21A601S

ZVREF

C372

Z4XAVDD

.01UF_25V_0402_X7R

.01UF_25V_0402_X7R

961_PCIRST#<17>

PM_PWROK<6,18>

RSMRST#<18,33,35>

12

R248
@22_0402

12

C299
@10PF_0402

ZAD[0..15]<17>

C382

PID0_OLD

ZCLK0

ZCLK0<15>

ZUREQ<17>
ZDREQ<17>

ZSTB0<17>

ZSTB#0<17>

ZSTB1<17>

ZSTB#1<17>

R294 0_0402
R292 0_0402

R257 1K_0402

12

R285
@22_0402

12

C361
@10PF_0402

ZAD[0..15]

Z4XAVDD

PWRGD
AUXOK

U6C

SIS650
ZCLK0
ZUREQ

ZDREQ
ZSTB0

ZSTB#0
ZSTB1

ZSTB#1
ZAD0

ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15

ZVREF
VDDZCMP
ZCMP_P

Z4XAVDD

TRAP0

V3

ZCLK

U6

ZUREQ

U1

ZDREQ

T3

ZSTB0

T1

ZSTB#0

P1

ZSTB1

P3

ZSTB#1

T4

ZAD0

R3

ZAD1

T5

ZAD2

T6

ZAD3

R2

ZAD4

R6

ZAD5

R1

ZAD6

R4

ZAD7

P4

ZAD8

N3

ZAD9

P5

ZAD10

P6

ZAD11

N1

ZAD12

N6

ZAD13

N2

ZAD14

N4

ZAD15

U3

ZVREF

V5

VDDZCMP

U4

ZCMP_N

U2

ZCMP_P

V6

VSSZCMP

W1

Z1XAVDD

W2

Z1XAVSS

V2

Z4XAVDD

V1

Z4XAVSS

Y3

PCIRST#

W4

PWROK

W6

AUXOK

D11

TRAP1

E10

TRAP0

DRAM_SEL
TRAP0

TRAP1 Panel ID0
CSYNC
RSYNC
LSYNC

0

enable PLL

normal

Panel ID1
enable VGA interface
Panel ID2

C15

VOSCI

A12

ROUT

B13

GOUT

A13

BOUT

F13

HSYNC

E13

VSYNC

D13

VGPIO0

D12

VGPIO1

B11

INT#A

E12

CSYNC

A11

RSYNC

F12

LSYNC

E14

VCOMP

D14

VRSET

F14

VVBWN

B12

DACAVDD1

C12

DACAVSS1

C13

DACAVDD2

C14

DACAVSS2

B15

DCLKAVDD

A15

DCLKAVSS

B14

ECLKAVDD

A14

ECLKAVSS

F10

ENTEST

E11

DLLEN#

C11

TESTMODE0

F11

TESTMODE1

A10

TESTMODE2

disable PLL
DDR
NB debug mode

ROUT
GOUT
BOUT

R263
R253

RP68 4P2R_100
1 4
2 3

PID1_OLD
RSYNC
PID2_OLD

VCOMP
VRSET
VVBWN

DACAVDD2

DACAVDD2ZCMP_N

DCLKAVDD

ECLKAVDD

ENTEST

DLLEN#

1

R259

R13
R12
R14

33_0402
33_0402

1K_0402

CLK_NB14M

DDCCL_SIS
DDCDA_SIS

HSYNC_SIS
VSYNC_SIS

R250 130_1%

embedded pull-low

Default

(30~50K Ohm)

yesDLLEN#

0

yes1(DDR)SDR
yes0

X
X
1
X

CLK_NB14M <15>

CRT_R_SIS

0_0402

CRT_G_SIS

0_0402

CRT_B_SIS

0_0402

HSYNC_SIS <16>
VSYNC_SIS <16>

DDCCL_SIS <16>
DDCDA_SIS <16>

SIS_PIRQA# <16>

Ap Note:
DACAVDD1 & DACAVDD2 connect together
DACAVSS1 & DACAVSS2 connect together

CRT_R_SIS <16>
CRT_G_SIS <16>
CRT_B_SIS <16>

for 650 only

RSYNC

PID0_OLD
PID1_OLD

PID2_OLD

ENTEST
PWRGD
AUXOK

R234 4.7K_0402

R254 @10K_0402
R265 @10K_0402

R264

1 2

@10K_0402

R266 4.7K_0402
C388 .1UF_0402_X5R
C374 @.1UF_0402_X5R

+3VS

L13

DCLKAVDD

+1.8VS

4 4

A

0_0603

R277

C366

.1UF_0402_X5R

C348

.01UF_25V_0402_X7R

R286 56_0402
R290 56_0402

VDDZCMP
ZCMP_N
ZCMP_P

B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

.01UF_25V_0402_X7R

ECLKAVDD

.01UF_25V_0402_X7R

C292

C294

MurataBLM21A601S

C291

.1UF_0402_X5R

C293

.1UF_0402_X5R

1 2

L14

1 2

MurataBLM21A601S

D

+3VS

C275

10UF_10V_1206

+3VS

C268

10UF_10V_1206

C300

VVBWN

VCOMP

DACAVDD2

.1UF_0402_X5R

C301

.1UF_0402_X5R

C297

C286

.1UF_0402_X5R

Title

Size Document Number Rev

ACT10

Date: Sheet

+1.8VS

L17

1 2

MurataBLM21A601S

1UF_10V_0603_X5R

C341

10UF_10V_1206

Compal Electronics, Inc.

SiS 645/650

E

945Thursday, May 30, 2002

1.0A

of

A

+CPU_CORE

1 1

2 2

3 3

4 4

+CPU_CORE

+2.5V

VDDQ

+1.8VS

AE10
AE12
AE14
AE16
AE18
AE20
AE22

W18

AA10
AA13
AA14
AA15
AA16
AA17

AB13
AB17

H21

H22

J16

J20

J21

A16

VTT

A17

VTT

A18

VTT

B16

VTT

B17

VTT

B18

VTT

C16

VTT

C17

VTT

C18

VTT

D15

VTT

D16

VTT

D17

VTT

D18

VTT

E15

VTT

E16

VTT

E17

VTT

E18

VTT

F15

VTT

F16

VTT

F17

VTT

F18

VTT

AB5

VDDM

AD5

VDDM

AE6

VDDM

AE8

VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM

V10

VDDM

V11

VDDM
VDDM

Y9

VDDM

Y10

VDDM

Y12

VDDM

Y14

VDDM

Y16

VDDM

Y18

VDDM

Y19

VDDM

AA8

VDDM

AA9

VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM

AB8

VDDM

AB9

VDDM
VDDM
VDDM

E5

VDDQ

E7

VDDQ

E9

VDDQ

G5

VDDQ

J5

VDDQ

L5

VDDQ

H8

VDDQ

H9

VDDQ

J8

VDDQ

J9

VDDQ

J10

VDDQ

J13

VDDQ

K9

VDDQ

K11

VDDQ

K13

VDDQ

L10

VDDQ

N9

VDDQ

N10

VDDQ

N5

VDDZ

R5

VDDZ

U5

VDDZ

W5

VDDZ

P9

VDDZ

P10

VDDZ

R9

VDDZ

R10

VDDZ

T9

VDDZ

T10

VDDZ

T11

VDDZ

PVDDP

L17

J22

VTT

VTT

VTT

VTT

VTT

PVDDP

PVDDP

PVDDP

PVDDP

PVDDP

VSS

L19

N19

R19

U19

W19

M12

M13

B

K16

K17

K18

K19

K20

K21

L20

M20

N20

P20

R20

R21

T20

U20

V20

W20

Y20

Y21

AA20

AA21

AA22

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

650-4

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

M14

M15

M16

M17

M18

N12

N13

N14

N15

N16

N17

N18

P12

P13

VSS

P14

P15

P16

P17

P18

R12

R13

C

+1.8VS +3VS

AB21

AB22

L12

L14

L15

L16

L18

M11

M19

N11

P19

R11

T19

U11

V19

W11

W13

W15

W17

VTT

VTT

IVDD

IVDD

IVDD

IVDD

IVDD

IVDD

IVDD

IVDD

IVDD

IVDD

IVDD

IVDD

IVDD

IVDD

IVDD

IVDD

Power

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

R14

R15

R16

R17

R18

T12

T13

T14

T15

T16

T17

T18

VSS

U12

U13

U14

U15

U16

U17

U18

V12

D

+3VALW

12

R283

+PVDDM

0_0805

P11

J14

J15

K15

K10

K12

K14

M10

W10

Y11

Y13

Y15

Y17

IVDD

PVDD

PVDD

PVDD

PVDD

OVDD

OVDD

OVDD

PVDDZ

VSS

VSS

VSS

VSS

VSS

V13

V14

V15

V16

V17

PVDDM

PVDDM

PVDDM

PVDDM

PVDDM

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

V18

B25

C28

VSS

C29

D27

D28

E28

E29

AF23

AF24

AF25

VSS

AUX1.8
AUX3.3

VSS

AG24

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS

AG26

AH23

NBAUX1.8V NBAUX3.3V

U6D

U10
U9

A20
A22
A24
A26
C19
C21
C23
C25
C27
E20
E22
E24
F25
H25
K25
M25
P25
T25
V25
Y25
AB25
AD25
E27
G27
J27
L27
N27
R27
U27
W27
AA27
AC27
AE27
D29
F29
H29
K29
M29
P29
T29
V29
Y29
AB29
AD29
AF29
AE24
AG25
B4
B6
C8
C10
D2
F2
H2
K2

P2
T2
V4
AD1
AF1
AC3
AE3
AG3
AG5
AG7
AG9
AG11
AG13
AG15
AG17
AG19
AG21
AG23
AJ4
AJ6
AJ8
AJ10
AJ12
AJ14
AJ16
AJ18
AJ20
AJ22
AJ24
AG27

VSS

VSS

SIS650

AH24

E

+3VALW

+1.8VALW

12

12

R223

R220

0_0603

0_0603

+5VS VDDQ

R590

1 2

10K_0402

C730

.1UF_0402_X5R

1
2

5

F

U67

IN
IN

GND

MAX1857

OUT
OUT

SETSHDN
RST

8
7

64
3

R593

49.9K_1%_0603

12

R591

20K_1%_0603

12

.1UF_0402_X5R

G

12

R592

20K_1%_0603

12

R594

6.8K_1%

Q70

13

D

G

S

2N7002

C733

C731

.1UF_0402_X5R

+5VS

12

2

Internal AGP : H
External AGP : L

R595

100K_0402

12

C732

4.7UF_16V_1206

VDDQ_SW <16>

H

+1.8VS

A

B

C

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

D

E

F

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SiS 645/650

ACT10

G

10 45Thursday, May 30, 2002

H

1.0A

of

5

4

3

2

1

Layout note :

Distribute as close as possible
to ProcessorQuadrant.(betweenVTTFSB and VSS pin)

D D

+1.8VALW +3VALW

C C

10UF_6.3V_1206_X7R

10UF_6.3V_1206_X7R

B B

10UF_6.3V_1206_X7R

10UF_6.3V_1206_X7R

Processor system bus

C266

10UF_10V_1206

C265

1UF_10V_0603_X5R

C6

.1UF_0402_X5R

C391

C392

C325

C267

C262

10UF_10V_1206

C263

1UF_10V_0603_X5R

C260

.1UF_0402_X5R

C280

1UF_10V_0603_X5R

C329

1UF_10V_0603_X5R

C346

1UF_10V_0603_X5R

C332

1UF_10V_0603_X5R

+3VS

10UF_10V_1206

1UF_10V_0603_X5R

C279

.1UF_0402_X5R

C380

.1UF_0402_X5R

C351

.1UF_0402_X5R

C320

.1UF_0402_X5R

C278

C277

C321

.1UF_0402_X5R

C328

.1UF_0402_X5R

C281

.1UF_0402_X5R

C371

.1UF_0402_X5R

C367

.1UF_0402_X5R

C312

.1UF_0402_X5R

CHECK SiS 650 CAP.
IT NEED HOW MANY ESR

+1.8VS+CPU_CORE

C354

10UF_6.3V_1206_X7R

C370

1UF_10V_0603_X5R

C350

.1UF_0402_X5R

C334

.1UF_0402_X5R

C723

10UF_6.3V_1206_X7R

C724

1UF_10V_0603_X5R

C725

.1UF_0402_X5R

VDDQ +2.5V

C313

.1UF_0402_X5R

C323

.1UF_0402_X5R

C327

.1UF_0402_X5R

C310

.1UF_0402_X5R

Place these capacitors under 650 solder side

+CPU_CORE

C304

.1UF_0402_X5R

C308

.1UF_0402_X5R

C303

.1UF_0402_X5R

C307

.1UF_0402_X5R

+1.8VS

C336

.1UF_0402_X5R

C342

.1UF_0402_X5R

C338

.1UF_0402_X5R

C315

.1UF_0402_X5R

C333

.1UF_0402_X5R

C344

.1UF_0402_X5R

C352

.1UF_0402_X5R

C356

.1UF_0402_X5R

+2.5V

C393

10UF_10V_1206

C394

10UF_10V_1206

C395

10UF_10V_1206

C396

10UF_10V_1206

C407

.1UF_0402_X5R

C404

.1UF_0402_X5R

C405

.1UF_0402_X5R

C406

.1UF_0402_X5R

+1.8VS

.1UF_0402_X5R

+3VS

.1UF_0402_X5R

C365

1UF_10V_0603_X5R

C368

1UF_10V_0603_X5R

C408

.1UF_0402_X5R
C410

.1UF_0402_X5R

C381

C314

10UF_6.3V_1206_X7R

C397

.1UF_0402_X5R
C322

+3VS

.1UF_0402_X5R

.1UF_0402_X5R

C401

1UF_10V_0603_X5R

C362

1UF_10V_0603_X5R

C412

.1UF_0402_X5R

C373

.1UF_0402_X5R

C324

C282

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

5

4

3

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SiS 645/650 Decoupling
ACT10

1

11 45Thursday, May 30, 2002

1.0A

of

5

DDR SWAP NOW, SO DATA NOT CORRECT

DDR_SDQ1

!

DDR_SDQ5

DDR_SDQ2

!

DDR_SDQ7

DDR_DM0

!

D D

Layout note

Place these resistor
closely DIMM0,
all trace
length<750mil

C C

B B

A A

DDR_SDQS0

DDR_SDQ4

!

DDR_SDQ3

DDR_SDQ0

!

DDR_SDQ6

DDR_SDQ14

!

DDR_SDQ11

DDR_SDQ12 DDR_DQ41

!

DDR_SDQ15

DDR_DM1
DDR_SDQS1

!

DDR_SDQ9

!

DDR_SDQ8

DDR_SDQ10

!

DDR_SDQ13

DDR_SDQ20

!

DDR_SDQ19

DDR_SDQ17

!

DDR_SDQ16

DDR_SDQS2

!

DDR_DM2

DDR_SDQ18

!

DDR_SDQ21

DDR_SDQ23

!

DDR_SDQ22

DDR_SDQ31

!

DDR_SDQ25

DDR_SDQ28

!

DDR_SDQ29

!

DDR_DM3

DDR_SDQ26

!

DDR_SDQ24

DDR_SDQ30

!

DDR_SDQ27

5

RP5 4P2R_10
1 4
2 3

RP30 4P2R_10
1 4
2 3

RP6 4P2R_10
1 4
2 3

RP31 4P2R_10
1 4
2 3

RP7 4P2R_10
1 4
2 3

RP32 4P2R_10
1 4
2 3

RP8 4P2R_10
1 4
2 3

RP33 4P2R_10
1 4
2 3

RP9 4P2R_10
1 4
2 3

RP34 4P2R_10
1 4
2 3

RP10 4P2R_10
1 4
2 3

RP35 4P2R_10
1 4
2 3

RP11 4P2R_10
1 4
2 3

RP36 4P2R_10
1 4
2 3

RP12 4P2R_10
1 4
2 3

RP37 4P2R_10
1 4
2 3

RP13 4P2R_10
1 4
2 3

RP38 4P2R_10
1 4
2 3

RP14 4P2R_10
1 4
2 3

RP39 4P2R_10
1 4
2 3

DDR_DQ1
DDR_DQ5

DDR_DQ2
DDR_DQ7

DDR_F_DM0
DDR_DQS0

DDR_DQ4
DDR_DQ3

DDR_DQ0
DDR_DQ6

DDR_DQ14
DDR_DQ11

DDR_DQ12
DDR_DQ15

DDR_F_DM1
DDR_DQS1

DDR_DQ9
DDR_DQ8

DDR_DQ10
DDR_DQ13

DDR_DQ20
DDR_DQ19

DDR_DQ17
DDR_DQ16

DDR_DQS2
DDR_F_DM2

DDR_DQ18
DDR_DQ21

DDR_DQ23
DDR_DQ22

DDR_DQ31
DDR_DQ25

DDR_DQ28
DDR_DQ29

DDR_DQS3DDR_SDQS3
DDR_F_DM3

DDR_DQ26
DDR_DQ24

DDR_DQ30
DDR_DQ27

4

DDR_SDQ36

!

DDR_SDQ38

DDR_SDQ37

!

DDR_SDQ32

DDR_SDQS4

!

DDR_DM4

DDR_SDQ39

!

DDR_SDQ33

DDR_SDQ34

!

DDR_SDQ35

DDR_SDQ43

!

DDR_SDQ44

DDR_SDQ41

!

DDR_SDQ45

DDR_DM5
DDR_SDQS5

!

DDR_SDQ40

!

DDR_SDQ42

DDR_SDQ47

!

DDR_SDQ46

DDR_SDQ49

!

DDR_SDQ48

DDR_SDQ53

!

DDR_SDQ50

DDR_SDQS6

!

DDR_DM6

DDR_SDQ51

!

DDR_SDQ52 DDR_DQ52

DDR_SDQ55

!

DDR_SDQ54 DDR_CKE1

DDR_SDQ58

!

DDR_SDQ60

DDR_SDQ57

!

DDR_SDQ56

DDR_DM7

!

DDR_SDQS7

DDR_SDQ62

!

DDR_SDQ61

DDR_SDQ63

!

DDR_SDQ59

RP43 4P2R_10
1 4
2 3

RP20 4P2R_10
1 4
2 3

RP44 4P2R_10
1 4
2 3

RP21 4P2R_10
1 4
2 3

RP45 4P2R_10
1 4
2 3

RP22 4P2R_10
1 4
2 3

RP46 4P2R_10
1 4
2 3

RP23 4P2R_10
1 4
2 3

RP47 4P2R_10
1 4
2 3

RP24 4P2R_10
1 4
2 3

RP48 4P2R_10
1 4
2 3

RP25 4P2R_10
1 4
2 3

RP49 4P2R_10
1 4
2 3

RP26 4P2R_10
1 4
2 3

RP50 4P2R_10
1 4
2 3

RP27 4P2R_10
1 4
2 3

RP51 4P2R_10
1 4
2 3

RP28 4P2R_10
1 4
2 3

RP52 4P2R_10
1 4
2 3

RP71 4P2R_10
1 4
2 3

Layout note
Place these resistor closely DIMM0,

all trace length<=750mil

DDR_SDQ[0..63]<8>

DDR_DM[0..7]<8>

DDR_SDQS[0..7]<8>

4

DDR_DQ36
DDR_DQ38

DDR_DQ37
DDR_DQ32

DDR_DQS4
DDR_F_DM4

DDR_DQ39
DDR_DQ33

DDR_DQ34
DDR_DQ35

DDR_DQ43
DDR_DQ44

DDR_DQ45

DDR_F_DM5
DDR_DQS5

DDR_DQ40
DDR_DQ42

DDR_DQ47
DDR_DQ46

DDR_DQ49
DDR_DQ48

DDR_DQ50

DDR_DQS6
DDR_F_DM6

DDR_DQ51

DDR_DQ55
DDR_DQ54

DDR_DQ58
DDR_DQ60

DDR_DQ57
DDR_DQ56

DDR_F_DM7
DDR_DQS7

DDR_DQ62
DDR_DQ61

DDR_DQ63
DDR_DQ59

DDR_SDQ[0..63]
DDR_DM[0..7]
DDR_SDQS[0..7]

DDR_CLK1<15>

DDR_CLK1#<15>

DDR_CLK0<15>

DDR_CLK0#<15>

DDR_CKE1<8>

DDR_SWE#<8,13>

DDR_SCS#0<8,13>

SMB_DATA<13,15,18,20>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

3

+2.5V

JP2

1

VREF

3
DDR_DQ1
DDR_DQ2

DDR_DQS0
DDR_DQ4

DDR_DQ0
DDR_DQ14

DDR_DQ12
DDR_DQS1

DDR_DQ9
DDR_DQ10

DDR_DQ20
DDR_DQ17

DDR_DQS2
DDR_DQ18

DDR_DQ23
DDR_DQ31

DDR_DQ28
DDR_DQS3

DDR_DQ26
DDR_DQ30

DDR_CKE1
DDR_SMA12

DDR_SMA9
DDR_SMA7DDR_DQ53

DDR_SMA5
DDR_SMA3
DDR_SMA1

DDR_SMA10
DDR_F_SBS0
DDR_SW

E#

DDR_SCS#0

DDR_DQ36
DDR_DQ37

DDR_DQS4
DDR_DQ39

DDR_DQ34
DDR_DQ43

DDR_DQ41
DDR_DQS5

DDR_DQ40
DDR_DQ47

DDR_DQ49
DDR_DQ53

DDR_DQS6
DDR_DQ51

DDR_DQ55
DDR_DQ58

DDR_DQ57
DDR_DQS7

DDR_DQ62 DDR_DQ61
DDR_DQ63

SMB_CLK<13,15,18,20>

+3VS

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0#

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2#

93

VDD

95

CKE1

97

DU/A13

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE#

121

S0#

123

DU

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD_SPD

199

VDD_ID

MOLEX 67589-2003 200P STD

VREF

DQ4

DQ5
VDD
DM0

DQ6

VSS

DQ7

DQ12

VDD

DQ13

DM1

VSS

DQ14
DQ15

VDD
VDD

VSS

VSS

DQ20
DQ21

VDD
DM2

DQ22

VSS

DQ23
DQ28

VDD

DQ29

DM3

VSS

DQ30
DQ31

VDD

CB4

CB5

VSS
DM8

CB6
VDD

CB7

DU/RESET#

VSS

VSS
VDD
VDD

CKE0

DU/BA2

VSS

VDD

RAS#
CAS#

VSS

DQ36
DQ37

VDD
DM4

DQ38

VSS

DQ39
DQ44

VDD

DQ45

DM5

VSS

DQ46
DQ47

VDD

CK1#

CK1

VSS

DQ52
DQ53

VDD
DM6

DQ54

VSS

DQ55
DQ60

VDD

DQ61

DM7

VSS

DQ62
DQ63

VDD

VSS

A11

A8
A6

A4
A2
A0

BA1

S1#

DU

SA0
SA1
SA2

DU

DIMM0

top
side

3

2

+2.5V

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_DQ5
DDR_DQ7

DDR_F_DM0
DDR_DQ3

DDR_DQ6
DDR_DQ11

DDR_DQ15
DDR_F_DM1

DDR_DQ8
DDR_DQ13

DDR_DQ19
DDR_DQ16

DDR_F_DM2
DDR_DQ21

DDR_DQ22
DDR_DQ25

DDR_DQ29
DDR_F_DM3

DDR_DQ24
DDR_DQ27

DDR_CKE0

DDR_SMA11
DDR_SMA8

DDR_SMA6
DDR_SMA4
DDR_SMA2
DDR_SMA0

DDR_F_SBS1
DDR_SRAS#
DDR_SCAS#
DDR_SCS#1

DDR_DQ38
DDR_DQ32

DDR_F_DM4
DDR_DQ33

DDR_DQ35
DDR_DQ44

DDR_DQ45
DDR_F_DM5

DDR_DQ42
DDR_DQ46

DDR_DQ48
DDR_DQ50

DDR_F_DM6
DDR_DQ52

DDR_DQ54
DDR_DQ60

DDR_DQ56
DDR_F_DM7

DDR_DQ59

2

SDREF_R

12

DDR_CKE0 <8>

DDR_SRAS# <8,13>
DDR_SCAS# <8,13>
DDR_SCS#1 <8>

DDR_CLK2# <15>
DDR_CLK2 <15>

DDR_F_SBS1<13>

DDR_F_SBS0<13>

Title

Size Document Number Rev

Date: Sheet

L54

1 2

C451

MurataBLM21A601S

.1UF_16V_0402_Y5V

ACT10

1

SDREF

DDR_DQ[0..63]
DDR_F_DM[0..7]
DDR_DQS[0..7]

DDR_SMA[0..12]

Layout note
Place these resistor

closely DIMM0,
all trace length
Max=1.3"

DDR_CKE0

DDR_SCS#1

PULL -UP AT PAGE 13

DDR_F_SBS1

DDR_F_SBS0

DDR_DQ[0..63] <13>
DDR_F_DM[0..7] <13>
DDR_DQS[0..7] <13>

DDR_SMA[0..12] <8,13>

RP58 4P2R_470
1 4
2 3

R132

1 2

33_0402

RP194P2R_10

14
23

Compal Electronics, Inc.

DDR-SODIMM SLOT1

1

+2.5V

+1.25VS

DDR_SBS1 <8>
DDR_SBS0 <8>

12 45Thursday, May 30, 2002

1.0A

of

A

+1.25VS +1.25VS

RP116 4P2R_33

DDR_DQ5

1 4
2 3

RP115 4P2R_33

DDR_DQ1

1 4

DDR_DQ2

2 3

DDR_F_DM0
DDR_DQ3

DDR_DQS0
DDR_DQ4

DDR_DQ6
DDR_DQ11

DDR_DQ0
DDR_DQ14

DDR_DQ15
DDR_F_DM1

DDR_DQ12
DDR_DQS1

DDR_DQ8
DDR_DQ13

DDR_DQ9
DDR_DQ10

DDR_DQ19
DDR_DQ16

DDR_DQ20
DDR_DQ17

DDR_F_DM2
DDR_DQ21

DDR_DQS2
DDR_DQ18

DDR_DQ22
DDR_DQ25

DDR_DQ23
DDR_DQ31

RP114 4P2R_33
1 4
2 3

RP113 4P2R_33
1 4
2 3

RP111 4P2R_33
1 4
2 3

RP112 4P2R_33
1 4
2 3

RP110 4P2R_33
1 4
2 3

RP108 4P2R_33
1 4
2 3

RP107 4P2R_33
1 4
2 3

RP109 4P2R_33
1 4
2 3

RP106 4P2R_33
1 4
2 3

RP105 4P2R_33
1 4
2 3

RP104 4P2R_33
1 4
2 3

RP103 4P2R_33
1 4
2 3

RP98 4P2R_33
1 4
2 3

RP102 4P2R_33
1 4
2 3

1 1

2 2

3 3

RP100 4P2R_33

14
23

RP101 4P2R_33

14
23

RP97 4P2R_33

14
23

RP99 4P2R_33

14
23

RP95 4P2R_33

14
23

RP90 4P2R_33

14
23

RP94 4P2R_33

14
23

RP89 4P2R_33

14
23

RP93 4P2R_33

14
23

RP88 4P2R_33

14
23

RP91 4P2R_33

14
23

RP87 4P2R_33

14
23

RP92 4P2R_33

14
23

RP86 4P2R_33

14
23

RP85 4P2R_33

14
23

RP83 4P2R_33

14
23

DDR_DQ29
DDR_F_DM3

DDR_DQ28
DDR_DQS3

DDR_DQ24
DDR_DQ27

DDR_DQ26
DDR_DQ30

DDR_DQ38
DDR_DQ32

DDR_DQ36
DDR_DQ37

DDR_F_DM4
DDR_DQ33

DDR_DQS4
DDR_DQ39

DDR_DQ35
DDR_DQ44

DDR_DQ34
DDR_DQ43

DDR_DQ45
DDR_F_DM5

DDR_DQ41
DDR_DQS5

DDR_DQ42
DDR_DQ46

DDR_DQ40
DDR_DQ47

DDR_DQ48
DDR_DQ50

DDR_DQ49
DDR_DQ53

RP84 4P2R_33

DDR_F_DM6

14

DDR_DQ52

23

RP82 4P2R_33

DDR_DQS6

14

DDR_DQ51

23

RP81 4P2R_33

DDR_DQ54

14

DDR_DQ60

23

RP80 4P2R_33

DDR_DQ55

14

DDR_DQ58

23

RP78 4P2R_33

DDR_DQ56

14

DDR_F_DM7

23

RP79 4P2R_33

DDR_DQ57

14

DDR_DQS7

23

RP76 4P2R_33

DDR_DQ61

14

DDR_DQ59

23

RP77 4P2R_33

DDR_DQ62

14

DDR_DQ63

23

Layout note
Place these resistor

closely DIMM1,
all trace
length<=800mil

4 4

A

B

DDR_DQ[0..63]DDR_DQ7
DDR_SMA[0..12]

DDR_F_DM[0..7]
DDR_DQS[0..7]

DDR_SDQ[0..7]

B

DDR_DQ[0..63] <12>
DDR_SMA[0..12] <8,12>

DDR_F_DM[0..7] <12>
DDR_DQS[0..7] <12>

DDR_SDQ[0..7] <8,12>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

DDR_CLK4<15>
DDR_CLK4#<15>

DDR_CLK3<15>
DDR_CLK3#<15>

DDR_SWE#<8,12>

SMB_DATA<12,15,18,20>

SMB_CLK<12,15,18,20>

C

+2.5V +2.5V

JP3

1

VREF

3

DDR_DQ5
DDR_DQ7

DDR_DQS0
DDR_DQ3

DDR_DQ6
DDR_DQ11

DDR_DQ15
DDR_DQS1

DDR_DQ8
DDR_DQ13

DDR_DQ19
DDR_DQ16

DDR_DQS2
DDR_DQ21

DDR_DQ22
DDR_DQ25

DDR_DQ29
DDR_DQS3

DDR_DQ24
DDR_DQ27

DDR_CKE3
DDR_SMA12

DDR_SMA9
DDR_SMA7

DDR_SMA5
DDR_SMA3
DDR_SMA1

DDR_SMA10

DDR_F_SBS0

E#

DDR_SW
DDR_SCS#2 DDR_SCS#3

DDR_DQ38
DDR_DQ32

DDR_DQS4
DDR_DQ33

DDR_DQ35
DDR_DQ44

DDR_DQ45
DDR_DQS5

DDR_DQ42
DDR_DQ46

DDR_DQ48
DDR_DQ50

DDR_DQS6
DDR_DQ52

DDR_DQ54
DDR_DQ60

DDR_DQ56
DDR_DQS7

DDR_DQ61
DDR_DQ59

+3VS

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0#

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2#

93

VDD

95

CKE1

97

DU/A13

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE#

121

S0#

123

DU

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD_SPD

199

VDD_ID

MOLEX 67625-2003 200P REV

DIMM1

bottom
side

D

DU/RESET#

DU/BA2

D

VREF

VDD
DM0

DQ12

VDD

DQ13

DM1

DQ14
DQ15

VDD
VDD

DQ20
DQ21

VDD
DM2

DQ22
DQ23

DQ28

VDD

DQ29

DM3

DQ30
DQ31

VDD

DM8
VDD

VDD
VDD

CKE0

VDD

RAS#
CAS#

DQ36
DQ37

VDD
DM4

DQ38
DQ39

DQ44

VDD

DQ45

DM5

DQ46
DQ47

VDD

CK1#

DQ52
DQ53

VDD
DM6

DQ54
DQ55

DQ60

VDD

DQ61

DM7

DQ62
DQ63

VDD

E

2
4

VSS

6

DQ4

8

DQ5

10
12
14

DQ6

16

VSS

18

DQ7

20
22
24
26
28

VSS

30
32
34
36
38

VSS

40

VSS

42
44
46
48
50
52

VSS

54
56
58
60
62
64

VSS

66
68
70
72

CB4

74

CB5

76

VSS

78
80

CB6

82
84

CB7

86
88

VSS

90

VSS

92
94
96
98
100

A11

102

A8

104

VSS

106

A6

108

A4

110

A2

112

A0

114
116

BA1

118
120
122

S1#

124

DU

126

VSS

128
130
132
134
136
138

VSS

140
142
144
146
148
150

VSS

152
154
156
158
160

CK1

162

VSS

164
166
168
170
172
174

VSS

176
178
180
182
184
186

VSS

188
190
192
194

SA0

196

SA1

198

SA2

200

DU

DDR_DQ1
DDR_DQ2

DDR_F_DM0
DDR_DQ4

DDR_DQ0
DDR_DQ14

DDR_DQ12
DDR_F_DM1

DDR_DQ9
DDR_DQ10

DDR_DQ20
DDR_DQ17

DDR_F_DM2
DDR_DQ18

DDR_DQ23
DDR_DQ31

DDR_DQ28
DDR_F_DM3

DDR_DQ26
DDR_DQ30

DDR_CKE2

DDR_SMA11
DDR_SMA8

DDR_SMA6
DDR_SMA4
DDR_SMA2
DDR_SMA0

DDR_F_SBS1
DDR_SRAS#
DDR_SCAS#

DDR_DQ36
DDR_DQ37

DDR_F_DM4
DDR_DQ39

DDR_DQ34
DDR_DQ43

DDR_DQ41
DDR_F_DM5

DDR_DQ40
DDR_DQ47

DDR_DQ49
DDR_DQ53

DDR_F_DM6
DDR_DQ51

DDR_DQ55
DDR_DQ58

DDR_DQ57
DDR_F_DM7

DDR_DQ62
DDR_DQ63

SDREF_R

12

C450
.1UF_16V_0402_Y5V

+1.25VS

RP604P2R_33

DDR_SMA8

1 4

DDR_SMA11

2 3

RP61 4P2R_33

DDR_SMA9

14

DDR_SMA12

23

RP54 4P2R_33

RP55 4P2R_33

R130 33_0402

DDR_CKE2 <8>DDR_CKE3<8>

R131 33_0402

DDR_SRAS# <8,12>
DDR_SCAS# <8,12>
DDR_SCS#3 <8>DDR_SCS#2<8>

DDR_F_SBS0
DDR_F_SBS1
DDR_SCS#0

DDR_CLK5# <15>
DDR_CLK5 <15>

+3VS

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DDR-SODIMM SLOT1

ACT10

DDR_SMA4

1 4

DDR_SMA6

2 3

RP53 4P2R_33

DDR_SMA5

14

DDR_SMA7

23

DDR_SMA0

1 4

DDR_SMA2

2 3

RP56 4P2R_33

DDR_SMA1

14

DDR_SMA3

23

DDR_SMA10

1 2

RP96 4P2R_33

DDR_F_SBS1

14

DDR_F_SBS0

23

RP574P2R_33

DDR_SCAS#

1 4

DDR_SRAS#

2 3

DDR_SWE#

1 2

DDR_F_SBS0 <12>
DDR_F_SBS1 <12>
DDR_SCS#0 <8,12>

RP72 4P2R_470

DDR_CKE2

1 4

DDR_CKE3

2 3

RP59 4P2R_33

DDR_SCS#0

1 4

DDR_SCS#2

2 3

R133 33_0402

DDR_SCS#3

1 2

Layout note
Place these resistor

closely DIMM0,
all trace length
Max=1.3"

13 45Thursday, May 30, 2002

E

+2.5V

+1.25VS

of

1.0A

A

B

C

D

E

Layout note :

Distribute as close as possible
to DDR-SODIMM.

+2.5V

1 1

12

C146
.1UF_0402_X5R

+2.5V +2.5V

12

C156
.1UF_0402_X5R

12

C147
.1UF_0402_X5R

12

C161
.1UF_0402_X5R

12

C148
.1UF_0402_X5R

12

C157
.1UF_0402_X5R

12

C149
.1UF_0402_X5R

12

C158
.1UF_0402_X5R

12

C150
.1UF_0402_X5R

12

C159
.1UF_0402_X5R

12

C151
.1UF_0402_X5R

12

C160
.1UF_0402_X5R

12

C152
.1UF_0402_X5R

12

+

C170
150UF_D2_6.3V

12

C153
.1UF_0402_X5R

12

+

C144
150UF_D2_6.3V

12

C154
.1UF_0402_X5R

12

C155
.1UF_0402_X5R

Layout note :

Place one cap close to every 2 pull up resistors termination to
+1.25V

2 2

+1.25VS

12

C504
.1UF_0402_X5R

+1.25VS

12

C495
.1UF_0402_X5R

12

C503
.1UF_0402_X5R

12

C494
.1UF_0402_X5R

12

C502
.1UF_0402_X5R

12

C493
.1UF_0402_X5R

12

C501
.1UF_0402_X5R

12

C492
.1UF_0402_X5R

12

C500
.1UF_0402_X5R

12

C491
.1UF_0402_X5R

12

C505
.1UF_0402_X5R

12

C490
.1UF_0402_X5R

12

C499
.1UF_0402_X5R

12

C489
.1UF_0402_X5R

12

C498
.1UF_0402_X5R

12

C488
.1UF_0402_X5R

12

C497
.1UF_0402_X5R

12

C487
.1UF_0402_X5R

12

C496
.1UF_0402_X5R

12

C486
.1UF_0402_X5R

+1.25VS

12

C485

3 3

4 4

.1UF_0402_X5R

+1.25VS

12

C475
.1UF_0402_X5R

+1.25VS

12

C465
.1UF_0402_X5R

+1.25VS

12

C455
.1UF_0402_X5R

12

C484
.1UF_0402_X5R

12

C474
.1UF_0402_X5R

12

C464
.1UF_0402_X5R

12

C454
.1UF_0402_X5R

A

12

C483
.1UF_0402_X5R

12

C473
.1UF_0402_X5R

12

C463
.1UF_0402_X5R

12

C453
.1UF_0402_X5R

12

C482
.1UF_0402_X5R

12

C472
.1UF_0402_X5R

12

C462
.1UF_0402_X5R

12

C452
.1UF_0402_X5R

12

C481
.1UF_0402_X5R

12

C471
.1UF_0402_X5R

12

C461
.1UF_0402_X5R

12

C480
.1UF_0402_X5R

12

C470
.1UF_0402_X5R

12

C460
.1UF_0402_X5R

B

12

C479
.1UF_0402_X5R

12

C469
.1UF_0402_X5R

12

C459
.1UF_0402_X5R

12

C478
.1UF_0402_X5R

12

C468
.1UF_0402_X5R

12

C458
.1UF_0402_X5R

12

C477
.1UF_0402_X5R

12

C467
.1UF_0402_X5R

12

C457
.1UF_0402_X5R

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

12

12

12

C

C476
.1UF_0402_X5R

C466
.1UF_0402_X5R

C456
.1UF_0402_X5R

Title

Size Document Number Rev

D

Date: Sheet

Compal Electronics, Inc.

DDR SODIMM Decoupling

ACT10

14 45Thursday, May 30, 2002

E

1.0A

of

A

1 1

2 2

+2.5VS

3 3

4 4

A

PAD6

PAD-5.0X3.5

FOR
CLK

1

B

C403

22UF_10V_1206

L41
MurataBLM21A601S

1 2

B

+3VS

L34

MurataBLM21A601S

+

.1UF_0402_X5R

12

+

C521

22UF_10V_1206

C65

C112

.1UF_0402_X5R

+3VS

C59

.1UF_0402_X5R

STPCPU#<18>

CK408_PWRGD#<35>

12

C516

.1UF_0402_X5R

+2.5VS

FB_IN

CLKG_VDD

C62

.1UF_0402_X5R

.1UF_0402_X5R

CLKG_AVDD

L35

MurataBLM21A601S

C

C115

C113

.1UF_0402_X5R

C413

.1UF_0402_X5R

+3VS

R86

C114

C64

.1UF_0402_X5R

.1UF_0402_X5R

C63

.01UF_25V_0402_X7R

10K_0402

R307

C70 5PF_0402_NPO

C111 5PF_0402_NPO

.1UF_0402_X5R

C71

PM_STPPCI#
PM_STPCPU#

CK408_PWGGD#

475_1%

SMB_DATA
SMB_CLK

12

14.318MHZ

12

D

1
11
13
19
28
29
42
48
36

37

5

8
18
24
25
32
41
46

12
45

33
38
34

35

6

12

X1

7

ICS suggestion 14.318MHz > 36pF, C273, C274 4pF

CLKB_VDD

12

12

C530

C509

10UF_10V_1206

FWDSDCLKO

C

C519
.1UF_0402_X5R

+

.1UF_0402_X5R

SMB_CLK<12,13,18,20>

SMB_DATA<12,13,18,20>

FWDSDCLKO<8>

12

R344
@22_0402

12

C512
@10PF_0402_NPO

CLKB_AVDD

C517

C518

.01UF_25V_0402_X7R

SMB_CLK

SMB__DATA

FWDSDCLKO

FB_IN

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

D

.1UF_0402_X5R

L42
MurataBLM21A601S

1 2

12

R361
@22_0402

12

C535
@10PF_0402_NPO

E

Main Clock Generator

(3 OPTIONS)
1: (ICS:ICS952001)
2: (Cypress:CY28342)

3. (Hitachi:HDTS403)

U8
ICS952001

VDDREF
VDDZ
VDDPCI
VDDPCI
VDD48
VDDAGP
VDDCPU
VDDSD
VDDA

VSSA
VSSREF
VSSZ
VSSPCI
VSSPCI
VSS48
VSSAGP
VSSCPU
VSSSD

PCI_STOP#
CPU_STOP#

PD#/VTT_PWRGD
IREF
SDATA

SCLK

XIN

XOUT

U9
ICS93722

3

VDD

12

VDD

23

VDD

10

AVDD

7

SCLK

22

SDATA

8

CLK_IN

20

FB_IN

9

NC

18

NC

21

NC

CPUCLK0

CPUCLK#0

CPUCLK1

CPUCLK#1

AGPCLK0

AGPCLK1

SDCLK

ZCLK0
ZCLK1

PCICLK_F0/FS3
PCICLK_F1/FS4

PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5

REF0/FS0
REF1/FS1
REF2/FS2

24_48M/MULTISEL

2

CLK0

1

CLK#0

4

CLK1

5

CLK#1

13

CLK2

14

CLK#2

17

CLK3

16

CLK#3

24

CLK4

25

CLK#4

26

CLK5

27

CLK#5

19

FB_OUT

28

GND

15

GND

11

GND

6

GND

48M

40

39

44

43

31

30
47
9

10
14

15
16
17
20
21
22
23

2
3
4

27
26

DDRCLK0
DDRCLK#0

DDRCLK1
DDRCLK#1

DDRCLK2
DDRCLK#2

DDRCLK3

DDRCLK4
DDRCLK#4

DDRCLK5
DDRCLK#5

FB_OUT

E

CLK_BCLK

CLK_BCLK#

CLK_HT

CLK_HT#

AGPCLK0

AGPCLK1
SDCLK_B
ZCLK_B0

ZCLK_B1
CLKFS3

CLKFS4
CLKPCI_LPC
CLKPCI_SIO
CLKPCI_PCM
CLKPCI_LAN
CLKPCI_1394
CLKPCI_MINI

CLKFS0
CLKFS1
CLKFS2

CLKSB48M
MULTISEL

R55

R350 10_0402
R354 10_0402

R347 10_0402
R346 10_0402

R343 10_0402
R342 10_0402

R359 10_0402
R358 10_0402

R363 10_0402
R364 10_0402

R365 10_0402
R366 10_0402

R360

F

1 2

R51 33_0402
R52

1 2

33_0402

1 2

R49 33_0402
R50

1 2

R47 22_0402

R53 22_0402
R48 22_0402
R81 22_0402

R82 22_0402

R94 33_0402
R83 33_0402
R96 33_0402
R97 33_0402
R84 33_0402
R98 33_0402
R77 33_0402

R78 33_0402
R79 33_0402
R80 33_0402

R54 33_0402

22_0402

33_0402

1 2

1 2
1 2
1 2

1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2

1 2

@10K_0402

R56 33_0402

1 2

DDR_CLK0
DDR_CLK0#

DDR_CLK1
DDR_CLK1#

DDR_CLK2
DDR_CLK2#

DDR_CLK3
DDR_CLK3#DDRCLK#3

DDR_CLK4
DDR_CLK4#

DDR_CLK5
DDR_CLK5#

F

1 2
R45 49.9_1%
R46 49.9_1%

1 2

1 2
R43 49.9_1%
R44 49.9_1%

1 2

CLK_AGP0 <7>

CLK_AGP1 <16>
SDCLK <8>
ZCLK0 <9>

ZCLK1 <17>

CLK_PCI_SB <17>
CLK_PCI_LPC <33>
CLK_PCI_SIO <32>
CLK_PCI_PCM <23>
CLK_PCI_LAN <22>
CLK_PCI_1394 <25>
CLK_PCI_MINI <26>

CLK_SB14M <18>
CLK_NB14M <9>
CLK_14M_SIO <30,32>

CLK_SB48M <19>

SD_48MHZ <28>

DDR_CLK0 <12>
DDR_CLK0# <12>

DDR_CLK1 <12>
DDR_CLK1# <12>

DDR_CLK2 <12>
DDR_CLK2# <12>

DDR_CLK3 <13>
DDR_CLK3# <13>

DDR_CLK4 <13>
DDR_CLK4# <13>

DDR_CLK5 <13>
DDR_CLK5# <13>

+3VS

R102

R103
R104
R105
R110

G

TO 591
TO 391
TO OZ6912
TO RTL8100
TO TSB43AB22
TO MINIPCI

10K_0402

10K_0402
@10K_0402
@10K_0402
@10K_0402

CLK_HCLK <3>

CLK_HCLK# <3>

CLK_GHT <7>

CLK_GHT# <7>

CLKFS0
CLKFS1
CLKFS2
CLKFS3
CLKFS4

R91
R92
R93
R106
R107

H

@10K_0402
@10K_0402
10K_0402
10K_0402
10K_0402

FS4 FS3 FS2 FS1 FS0 CPU DDR ZCLK AGP PCI

1 1 0 0 0
1 1 0 0 1
0 0 1 1 1
0 0 0 1 1 100.0 133.3 66.7 66.7 33.3

*

Title

Size Document Number Rev

ACT10

Date: Sheet

G

100.0 133.0 80.0 66.7 33.3

100.0 100.0 80.0 66.7 33.3

100.0 133.3 80.0 66.7 33.3

Compal Electronics, Inc.

Clock Generator

15 45Thursday, May 30, 2002

H

1.0A

of

A

CRT_R_SIS<9>
CRT_G_SIS<9>
CRT_B_SIS<9>

VDDQ_SW : (5V Level)
L : Enternal AGP

1 1

H : Internal VGA

LVDS_PRES# : (3V Level)
H : Enternal AGP

L : Internal VGA

2 2

VDDQ_SW<10>

LVDS_PRES#<18>

CLK_AGP1 AGP_BUSY#

AGP_ADSTB1#<7>

AGP_ADSTB1<7>

AGP_ADSTB0<7>

AGP_ADSTB0#<7>

CLK_AGP1<15>

AGP_PAR<7>
AGP_IRDY#<7>
AGP_TRDY#<7>

AGP_GNT#<7>

AGP_REQ#<7>
AGP_PIPE#<7>

AGP_WBF#<7>

12

R26
@22_0402

12

C36
@10PF_0402

DDCCL_SIS<9>

DDCDA_SIS<9>

CRT_R
CRT_G
CRT_B
CRT_HSYNC

CRT_VSYNC
3VDDCDA

3VDDCCL

AGP_ST0
AGP_ST2

VSYNC_SIS<9>
HSYNC_SIS<9>

AGP_AD30
AGP_AD28 AGP_AD31
AGP_AD26
AGP_AD24

AGP_AD22
AGP_AD20

AGP_AD18
AGP_AD16

AGP_AD14
AGP_AD12
AGP_AD10
AGP_AD8

AGP_AD0
AGP_AD2
AGP_AD4
AGP_AD6

CLK_AGP1

AGP_BUSY#
AGP_PIPE#
AGP_WBF#

+12VALW

VDDQ
+5VS
+5VALW

+2.5V

JP4

1

GND

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

GND

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

GND

43

43

45

45

47

47

49

49

51

51

53

53

55

55

57

57

59

59

61

GND

63

63

65

65

67

67

69

69

71

71

73

73

75

75

77

77

79

GND

81

81

83

83

85

85

87

87

89

89

91

91

93

93

95

95

97

97

99

GND

101

101

103

103

105

105

107

107

109

109

111

111

113

113

115

115

117

117

119

GND

121

121

123

123

125

125

127

127

129

129

131

131

133

133

135

135

137

137

139

GND

FOXCONN_QTS0140A-1121_M140P_VGA

3 3

+12VALW

.1UF_16V_0402_Y5V

+5VALW

.1UF_16V_0402_Y5V

4 4

12

C23

12

C13

VDDQ +5VS

12

C20

.1UF_16V_0402_Y5V

+2.5V

12

C15

.1UF_16V_0402_Y5V

1 2

R256 100K_0402

CRT_ON#<34>

+3VS +3V

12

C18

.1UF_16V_0402_Y5V

.1UF_16V_0402_Y5V

+5V

12

C298

.1UF_16V_0402_Y5V

+12VALW

2

G

Q30
2N7002

A

12

12

47K_0402

13

D

S

R22

2

C296

G

+5VS

CRTVCC

13

D

S

12

Q32
SI2302DS

C12

.1UF_16V_0402_Y5V

12

C28

.1UF_16V_0402_Y5V

CRT_HSYNC

CRT_VSYNC

CRTVCC

B

2

GND

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

GND

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

GND

44

44

46

46

48

48

50

50

52

52

54

54

56

56

58

58

60

60

62

GND

64

64

66

66

68

68

70

70

72

72

74

74

76

76

78

78

80

GND

82

82

84

84

86

86

88

88

90

90

92

92

94

94

96

96

98

98

100

GND

102

102

104

104

106

106

108

108

110

110

112

112

114

114

116

116

118

118

120

GND

122

122

124

124

126

126

128

128

130

130

132

132

134

134

136

136

138

138

140

GND

CRT_R

CRT_G

CRT_B

1

5
2 4

U10 74AHCT1G125GW

3

1

5
2 4

74AHCT1G125GW
U11

3

B

AGP 140 Pin connector

C51

1 2

EC_SMB_CK2
EC_SMB_DA2
INVT_PWM
DAC_BRIG

EC SUSP#

AGP_ST1

AGP_C/BE#3
AGP_AD29

AGP_AD27
AGP_AD25

AGP_C/BE#2
AGP_AD23
AGP_AD21

AGP_AD19
AGP_AD17

AGP_C/BE#1
AGP_AD9
AGP_AD11
AGP_AD13
AGP_AD15

AGP_C/BE#0
AGP_AD7
AGP_AD5
AGP_AD3
AGP_AD1

PM_C3_STAT#

AGP_RST#

PIRQA#
AGP_RBF#
BKOFF#

ENBLT
M_SEN#

+5V
+3VS

R288

1 2

1K_0402

.1UF_50V_0805_X7R

EC_SMB_CK2 <4,6,29,33>
EC_SMB_DA2 <4,6,29,33>
INVT_PWM <33>
DAC_BRIG <33>

PID0 <34>
PID1 <34>
PID2 <34>
PID3 <34>

AGP_C/BE#[0..3]<7>

AGP_DEVSEL# <7>
AGP_STOP# <7>

AGP_FRAME# <7>
PIRQA# <17,20>
AGP_RBF# <7>
BKOFF# <33>

ENBLT <33>
M_SEN# <20,33>

+3V

3.3PF_0402_NPO

INVPWR_B+

1 2

R631 @0_0402

AGP_ST[0..2]<7>

AGP_AD[0..31]<7>

R276

10K_0402

1 2

12

C11

12

R16

75_1%

INVPWR_B+

1 2

R57 0_0402

H: DAUL L: SINGAL

PANEL_SEL <33>

PIRQA#
AGP_ST[0..2]

AGP_AD[0..31]
AGP_C/BE[0..3]

+3V

R273 @0_0402

AGP_NBREF

C29

3.3PF_0402_NPO

12

12

C21

3.3PF_0402_NPO

1 2

L5 FCM2012C-800(0805)

L4

1 2

FCM2012C-800(0805)

1 2

FCM2012C-800(0805)

12

12

R25

R19

75_1%

75_1%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

VGA_SUSP# <33>

1 2

1 2

R621 0_0402

M_SEN#

L3

C

SIS_PIRQA# <9>

B_PCIRST# <4,17,28,29,33,34>

V_PRST# <23,24,25>

+3VS

R20 @10K_0402

1 2

DAN217
1

D13

2

D12

2

3

CRTR

CRTG

CRTB

12
C31

3.3PF_0402_NPO

12
C26

3.3PF_0402_NPO

L21

1 2

FBM-11-160808-121

L22

1 2

FBM-11-160808-121

DAN217
1

3

12
C25

27PF_0402_NPO

27PF_0402_NPO

CRTVCC

DAN217
1

D11

2

12
C19

D

12

C22

.1UF_0402_X5R

.1UF_16V_0402_Y5V

+3VS

3

12
C16

3.3PF_0402_NPO

12
C37

100PF_0402_NPO

D

CRTVCC

R270

10K_0402

12

C24

12
C14

100PF_0402_NPO

100PF_0402_NPO

12

C42

.1UF_50V_0805_X7R

+5V

2

G

12

12

R247

10K_0402

CRTVCC

2N7002

12

12

C295

C316

100PF_0402_NPO

E

FDS4435

R278

4.7K_0402

INVPWR_B+

8
7

5

12

R232

4.7K_0402

3VDDCDA

3VDDCCL

E

16 45Thursday, May 30, 2002

of

B+

12

R33
100K_0402

12

R36
75K_0603

13

D

S

Q33

1 3

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

FOXCONNDZ11A91-L8

Title

Size Document Number Rev

Date: Sheet

Q9
1
2
3 6

4

FDS4435: P CHANNAL

Q8

2N7002

+3VS

+3VS

12

R275

D

2N7002

0_0402

2

Q29

JP5

G

S

1 3

D

1 2

2

G

S

CRT Connector

Compal Electronics, Inc.

AGPConn. & CRT

ACT10

1.0A

A

8

CLK_PCI_SB<15>

961_PCIRST#<9>

L8

@0_0402

.1UF_0402_X5R

+3V

U62
5
2

1

7SH08

+3V

U63
5
2

1

7SH08

SERR#<20,22,23,25,26>

C514

PCIRST#

4

4

REQ#4<20,26>
REQ#3<20,22>
REQ#2<20,23>
REQ#1<20,26>
REQ#0<20,25>

GNT#4<20,26>
GNT#3<20,22>
GNT#2<20,23>
GNT#1<20,26>
GNT#0<20,25>

C/BE#3<22,23,25,26>
C/BE#2<22,23,25,26>
C/BE#1<22,23,25,26>
C/BE#0<22,23,25,26>

PIRQA#<16,20>

PIRQB#<20,25>
PIRQC#<20,23,26>
PIRQD#<20,22,26>

FRAME#<20,22,23,25,26>

IRDY#<20,22,23,25,26>

TRDY#<20,22,23,25,26>

STOP#<20,22,23,25,26>

PAR<22,23,25,26>

DEVSEL#<20,22,23,25,26>

CLK_PCI_SB

961_PCIRST#

ZCLK1<15>

ZSTB0<9>

ZSTB#0<9>

ZSTB1<9>

ZSTB#1<9>

ZUREQ<9>

ZDREQ<9>

C515

.01UF_25V_0402_X7R

PCIRST# <22,23,24,25,26>

TO PCI CHIP

B_PCIRST# <4,16,28,29,33,34>

TO OTHER CHIP

ZCLK1
ZSTB0

ZSTB#0
ZSTB1

ZSTB#1

ZUREQ
ZDREQ

SVDDZCMP
SZCMP_N

SZCMP_P

SZ1XAVDD

Z1XAVSS

SZ4XAVDD

Z4XAVSS

SZVREF

AD[0..31]<22,23,25,26>

F1

PREQ#4

F2

PREQ#3

E1

PREQ#2

H5

PREQ#1

F3

PREQ#0

H3

PGNT#4

G1

PGNT#3

G2

PGNT#2

G3

PGNT#1

H4

PGNT#0

K3

C/BE#3

M4

C/BE#2

P1

C/BE#1

R4

C/BE#0

E3

INT#A

F4

INT#B

E2

INT#C

G4

INT#D

M3

FRAME#

M1

IRDY#

M2

TRDY#

N4

STOP#

M5

SERR#

N3

PAR

N1

DEVSEL#

N2

PLOCK#

Y2

PCICLK

C3

PCIRST#

V20

ZCLK

N19

ZSTB0

N20

ZSTB0#

K20

ZSTB1

K19

ZSTB1#

N16

ZUREQ

N17

ZDREQ

R19

VDDZCMP

N18

ZCMP_N

R18

ZCMP_P

P18

VSSZCMP

U20

Z1XAVDD

U19

Z1XAVSS

T20

Z4XAVDD

T19

Z4XAVSS

R20

VZREF

P20

ZVSSREF

ZAD[0..15]<9>

961_PCIRST#

R555

1 2

0_0402

PCIRST#

ZCLK1

R137

.1UF_0402_X5R

R551

12

R340
@22_0402

12

C508
@10PF_0402

12

R138
@22_0402

12

C183
@10PF_0402

0_0603

C187

+3VS

1 2

MurataBLM21A601S

C506

10UF_10V_1206

EC_PCIRST#

,33>

1 1

CLK_PCI_SB

2 2

PLOCK#<20>

3 3

+3VS

B

AD[0..31]
AD31 ZAD0

AD30 ZAD1

AD29 ZAD2

AD28 ZAD3

AD27 ZAD4

AD26 ZAD5

AD25 ZAD6

AD24 ZAD7

AD23 ZAD8

AD22 ZAD9

AD21 ZAD10

AD20 ZAD11

AD19 ZAD12

AD18 ZAD13

AD17 ZAD14

AD16 ZAD15

AD15

AD14

AD13

AD12

AD11

AD10

AD9

AD8

AD7

AD6

AD5

AD4

AD3

AD2

J5J4H2H1J3K4J2J1K5K2L3K1L1L4L5L2N5P2P3P4R2R3R1T1P5T2U1U2T3R5U3

AD9

AD8

AD7

AD6

AD5

AD4

AD31

AD30

AD29

AD28

AD27

AD26

AD25

AD24

AD23

AD22

AD21

AD20

AD19

AD18

AD17

AD16

AD15

AD14

AD13

AD12

AD11

AD3

AD10

PCI

961A-1

MULTIO

ZAD0

ZAD1

ZAD2

ZAD3

ZAD4

ZAD5

ZAD6

ZAD7

ZAD8

ZAD9

ZAD10

ZAD11

ZAD12

ZAD13

ZAD14

M18

M19

M17

M16

M20

L16

L20

L18

K18

ZAD15

J20

K17

K16

H20

J18

H19

H18

AD1

AD0

V1

AD2

AD1

AD0

IDE

IDEAVDD

IDEAVSS

ICHRDYA

IDREQA

IIRQA

CBLIDA

IIOR#A

IIOW#A

IDACK#A

IDSAA2
IDSAA1
IDSAA0

IDECSA#1
IDECSA#0

ICHRDYB

IDREQB

IIRQB

CBLIDB

IIOR#B

IIOW#B

IDACK#B

IDSAB2
IDSAB1
IDSAB0

IDECSB#1
IDECSB#0

IDA0
IDA1
IDA2
IDA3
IDA4
IDA5
IDA6
IDA7
IDA8

IDA9
IDA10
IDA11
IDA12
IDA13
IDA14
IDA15

IDB0

IDB1

IDB2

IDB3

IDB4

IDB5

IDB6

IDB7

IDB8

IDB9
IDB10
IDB11
IDB12
IDB13
IDB14
IDB15

U13A

Y3
Y4

W10
V10
Y11
U12

V11
Y9
Y10

T11
U11
W11

T12
V12

W17
Y17
T16
U17

T14
W16
V16

Y18
T15
V17

U16
W18

U10
V9
W8
T9
Y7
V7
Y6
Y5
W6
U8
W7
V8
U9
Y8
T10
W9

Y16
V15
U14
W14
V13
T13
Y13
Y12
W12
W13
U13
Y14
V14
W15
Y15
U15

SIS961

C

IDEAVDD

C186

.01UF_25V_0402_X7R

ICHRDYA
IDEREQA
IDEIRQA
CBLIDA

IDEIOR-A
IDEIOW-A
IDACK-A

IDESAA2
IDESAA1
IDESAA0

IDECS-A1
IDECS-A0

ICHRDYB
IDEREQB
IDEIRQB
CBLIDB

IDEIOR-B
IDEIOW-B
IDACK-B

IDESAB2
IDESAB1
IDESAB0

IDECS-B1
IDECS-B0

IDEDA0
IDEDA1
IDEDA2
IDEDA3
IDEDA4
IDEDA5
IDEDA6
IDEDA7
IDEDA8
IDEDA9
IDEDA10
IDEDA11
IDEDA12
IDEDA13
IDEDA14
IDEDA15

IDEDB0
IDEDB1
IDEDB2
IDEDB3
IDEDB4
IDEDB5
IDEDB6
IDEDB7
IDEDB8
IDEDB9
IDEDB10
IDEDB11
IDEDB12
IDEDB13
IDEDB14
IDEDB15

+1.8VS

L9
MurataBLM21A601S

1 2

C188
.1UF_0402_X5R

R327 10_0402

1 2

R333 82_0402

1 2

R334 82_0402

1 2

R332 10_0402

1 2

R335 22_0402

1 2

R328 22_0402

1 2

1 8
2 7
3 6
4 5

R326 10_0402

1 2

R329 10_0402

1 2

R330 82_0402

1 2

R144 82_0402

1 2

R143 10_0402

1 2

R331 22_0402

1 2

R337 22_0402

1 2

1 8
2 7
3 6
4 5

R336 10_0402

1 2

1 8

RP121

2 7

8P4R_10

3 6
4 5

1 8

RP123

2 7

8P4R_10

3 6
4 5
1 8

RP122

2 7

8P4R_10

3 6
4 5
1 8

RP120

2 7

8P4R_10

3 6
4 5

1 8

RP118

2 7

8P4R_10

3 6
4 5
1 8

RP74

2 7

8P4R_10

3 6
4 5
1 8

RP119

2 7

8P4R_10

3 6
4 5
1 8

RP73

2 7

8P4R_10

3 6
4 5

C513
.1UF_0402_X5R

RP75
8P4R_10

RP117
8P4R_10

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

Put near 961A Chip.

ZSTB0
ZSTB1

PDIORDY <21>
PDDREQ <21>
IRQ14 <21>
CBLIDA <21>

PDIOR# <21>
PDIOW# <21>
PDDACK# <21>

PDA2 <21>
PDA1 <21>
PDA0 <21>
PDCS3# <21>

PDCS1# <21>

SDIORDY <29>
SDDREQ <29>
IRQ15 <29>
CBLIDB <21>

SDIOR# <29>
SDIOW# <29>
SDDACK# <29>

SDA2 <29>
SDA1 <29>
SDA0 <29>
SDCS3# <29>

SDCS1# <29>

PDD[0..15]

SDD[0..15]

R151 @0_0402

R153 @0_0402

+1.8VS

IDEIRQA

@10K_0402

+1.8VS

D

R145

150_1%

R146
150_1%

R581

C203

.1UF_0402_X5R

SZVREF

C198

.1UF_0402_X5R

1 2

PDD[0..15] <21>

SDD[0..15] <29>

+1.8VS

4 4

0_0603

R150

R149 56_0402

C197

C206

.1UF_0402_X5R

.01UF_25V_0402_X7R

Analog Power supplies of Transzip function for 961A Chip.

A

R147 56_0402

SVDDZCMP
SZCMP_N

SZCMP_P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

B

C

R148 @0_0402

ZSTB#0

R152 @0_0402

ZSTB#1

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SiS 961-1

ACT10

D

17 45Thursday, May 30, 2002

1.0A

of

A

B

C

D

SCI#

LID_F_OUT#

ICH_THRM#

PWRBTN_OUT#

961_PME#

VLBA#_961

SWI#

961_AC97_RST#

PM_STPCPU# <43>

PM_GMUXSEL <43>

+5VS

4
5

U4B

74HCT08

D25

RB751V

2 1

D26

2 1

D34

2 1

D38

2 1

6

R597

+3V

U64
5
2

1

@7SH08

R554

RB751V

RB751V

RB751V

LID_OUT# <34>

EC_THRM# <34>

EC_WAKEUP# <34>

VLBA# <33>

R596

@0_0402

4

0_0402

Title

Size Document Number Rev

Date: Sheet

PM_DPRSLPVR

0_0402

NEED NOT to place
close to 961A

LAD3
LAD2
LAD1
LAD0

LDRQ#

R351 4.7K_0402

SIRQ

R352 4.7K_0402

LFRAME#

R632 4.7K_0402

961_EXTSMI#

GPIO17

LVDS_PRES#
961_MUXSEL

GPIO18

GPIO6

IO_PRES#

DPRSLPVR

SDATA_IN0

R393 100K_0402

SDATA_IN1

R170 100K_0402

AC'97 Pull-Down:

Compal Electronics, Inc.

SiS 961-2

ACT10

AC97_RST# <26,30>

+3VS

RP124
1 8
2 7
3 6
4 5

8P4R_10K

+3VS

1 2

R580 10K_0402

1 2

R608 @10K_0402

RP131
1 8
2 7
3 6
4 5

8P4R_10K
1 2

R348 10K_0402

1 2

R219 10K_0402

D

PM_DPRSLPVR <43>

18 45Thursday, May 30, 2002

of

1.0A

EC_SMI# <33>

RB751V

21

PM_CPUPERF#GPIO_LO/HI#

+3VS

12

R598
51K_0402

PM_STPCPU#

+3VS

4.7K_0402

Q71
3904

D37

@RB751V

+3VALW

+3VALW

+3VS

+3VALW

+3VALW

+3VS

+3VALW

+3VALW

R410

2

21

Programable on-die pull-high strength for CPU_S:

U13B

A8

*GPIO12/CPUSTP#

*GPIO13/DPRSLPVR

*GPO15/VR_HILO#

*GPO17/VGATEM#

CLK_SB14M

B

MIICLK25M

MIITXCLK

MIITXEN
MIITXD0

MIITXD1
MIITXD2
MIITXD3

MIIRXCLK

MIIRXDV
MIIRXER

MIIRXD0
MIIRXD1
MIIRXD2
MIIRXD3

MIICOL
MIICRS

MIIMDC

MIIMDIO

MIIAVDD
MIIAVSS

GPIO0
GPIO1/LDRQ1#
GPIO2/THERM#

GPIO3/EXTSMI#

GPIO4/CLKRUN#

GPIO5/PREQ5#
GPIO6/PGNT5#

*GPIO7

GPI8/RING

GPI9/AC_SDIN2

GPI10/AC_SDIN3

*GPIO11

*GPIO14

*GPO16/LO_HI#

*GPO18/PMCLK

*GPIO19
*GPIO20

12

R69
@22_0402

12

C104
@10PF_0402_NPO

12

R139
@22_0402

12

C184
@10PF_0402

A6
B6
E8

D7
C6
B4

A7
C7

C8
D8

A5
B5
A4

B7
E9
C5
E7

B9

?

B8

V2
T8

ICH_THRM#

T4

961_EXTSMI#

T6

961_MUXSEL

W1

VLBA#_961

U5

GPIO6

U4

SCI#

C4

SWI#

C14

IO_PRES#

E6

LVDS_PRES#

B3

LID_F_OUT#

F5

PM_STPCPU#

D4
B1

1 2
R221 0_0402
EC_FLASH#

E5

MUXSEL

E13
A16

GPIO17

D13

GPIO18

B15
A1
B2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

MIIAVDD

1 2

R398 0_0603

IDE_RST# <29>
PIDEPWR <21>

D35

2 1

RB751V

SCI# <33>
SWI# <33>

LVDS_PRES# <16>

D23

DPRSLPVR

EC_FLASH# <33>

D18

21

RB751V

SMB_CLK <12,13,15,2 0>
SMB_DATA <12,13,15,20>

MUXSEL

12

1 2

IAC_BIT_CLK

R163

10K_0402

961_PME#

RSMRST#

H_INIT#
H_A20M#
H_SMI#
H_INTR
H_NMI
H_IGNNE#
H_FERR#
H_STPCLK#
H_SLP#

LAD0
LAD1
LAD2
LAD3

LFRAME#
LDRQ#
SIRQ

RTC_X1

RTC_X2

RTCVDD

C538
.047UF_25V_0603_X7R
1 2

SDATA_IN0
SDATA_IN1

R339 22_0402
R353 22_0402

961_AC97_RST#

CLK_SB14M

SENTEST

SB_SPKR

PWRBTN_OUT#
PSON#

12

C236
.1UF_16V_0402_Y5V

C537

1 2

1UF_10V_0603_X5R

1 1

TP13

1

TP3

1

C233

1 2

R402 10M_0603

32.768KHZ_CM155

12

C557
12PF_0402_NPO

RTCVDD

1 2

10K_0603

12

12

C229

.1UF_16V_0402_Y5V

X5

12

+3VALW

D36

21

1N4148

R175

10UF_10V_1206

PM_PWROK<6,9>

C566
12PF_0402_NPO

IAC_SDATAO<19,26,30>

PWRBTN_OUT#<33>

C729

IAC_BITCLK<26,30>

CLK_SB14M<15>

SDATA_IN0<30>
SDATA_IN1<26>

IAC_SYNC<26,30>

SB_SPKR<19,31>

PLACE
TOGETHER

1UF_10V_0805_X5R

2 2

3 3

30mil 20mil

12

R403
@51K_0402

4 4

12

R395
@10K_0402

H_INIT#<4>

H_A20M#<4>

H_SMI#<4>
H_INTR<4>

H_NMI<4>

H_IGNNE#<4>

H_FERR#<4>

H_STPCLK#<4>

H_SLP#<4>

LAD0<32,33>
LAD1<32,33>
LAD2<32,33>
LAD3<32,33>

LFRAME#<32,33>

LDRQ#<32>

SIRQ<23,32,33>

RTC_PWROK

C728

@.1UF_25V_0402_Y5V

C543

1UF_10V_0805_X5R

PSON#<8>

RSMRST#<9,33,35>

Q37 @2SA1036K

3 1

2
12

R382
10K_0402

Q40

1

2

@3904

3

R384

1K_0402

T18
P16
R17
R16
Y20
U18
T17

W20

V19
Y19

V18

W19

W5
W4

W2

W3

A14
B14
D14

A15

RTCVDD

V5
T7

U6

U7

V6

D3
D1

C2
D2

C1

E4

A2

D5

T5

D6

Y1

G5

V3

A3

1 2

INIT#
A20M#
SMI#
INTR
NMI
IGNNE#
FERR#
STPCLK#
CPUSLP#

APICCK
APICD0
APTCD1

LAD0
LAD1
LAD2
LAD3

LFRAME#
LDRQ#
SIRQ

BATOK
PWROK

OSC32KHI
OSC32KHO

RTCVDD

SIS961

RTCVSS

AC_SDIN0
AC_SDIN1

AC_SDOUT
AC_SYNC

AC_RESET#
AC_BIT_CLK

OSCI
ENTEST
SPK

PWRBTN#
PME#
PSON#

AUXOK
ACPILED

+RTCVCC

IAC_BIT_CLK

20mil

CHECK COMPAL COMPARE WITH SiS

A

EC_PCIRST#<17,33>

1
3

+3VS

R391

4.7K_0402

C

1 2

R397 10K_0402

1 2

R396 10K_0402

1 2

R425 10K_0402

1 2

R512 10K_0402

1 2

R202 10K_0402

1 2

R355 10K_0402

1 2

R387 10K_0402

961_MUXSEL
DPRSLPVR

STPCPU# <15>

PM_CPUPERF# <4>

H_DPSLP# <4>

A

B

C

D

E

F

G

H

FOR 961 USB PIN DEFINITION

Control 0 : port 0 UV0+ B18 UV0- C18 OC0# G20
Control 0 : port 1 UV1+ E14 UV1- D15 OC1# J16
Control 0 : port 2 UV2+ E16 UV2- E15 OC2# H17

HW TRIP PULL LOW 1K SOUTH BIRDGE DEBUG MODE

Control 0 : port 0 UV0+ B18 UV0- C18 OC0# G20
Control 0 : port 3 UV3+ E18 UV3- F18 OC3# H16

Control 1 : port 1 UV1+ D18 UV1- D19 OC1# G17

FOR 962 USB PIN DEFINITION

Control 1 : port 4 UV4+ E16 UV4- E15 OC4# H17

1 1

+1.8VS

+CPU_CORE

2 2

+1.8VALW

1 2

+3VALW

1 2

3 3

4 4

VTT_961

L7

1 2

L_0805

MurataBLM21A601S

R154

0_0805

R155

0_0805

+3VS

IVDD_AUX

PVDD_AUX

SPKR( LPC addr mapping)

SDATO( PCICLK PLL) disable

OC2-( SB debug mode) enable

OC5-( Trap mode)

IAC_SDATAO<18,26,30>

G15

J15
J17
L15

L17
N15
P17
K15

G6

H15

L6

M15

R6
R10
R14

P15
R15

H6

K6

M6

P6
R7
R9

R11
R13

J6
N6
R8

R12

F9

F12

F7

F10
F11
F14
F15

F8

F13

SB_SPKR<18,31>

U13D

VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
PVDDZ
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD

VTT
VTT

OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD

PVDD
PVDD
PVDD
PVDD

IVDD_AUX
IVDD_AUX

OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX

PVDD_AUX
PVDD_AUX

SIS961

X8
@12MHz

USB_X1 USB_X2

12

C741
@27PF_0402_NPO

SB Hardware Trap

R341
R338

enable

PCI AD ROM

enabledisable

disable

VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ

12

@10K_0402
@10K_0402

H8

VSS

H9

VSS

H10

VSS

H11

VSS

H12

VSS

H13

VSS

J8

VSS

J9

VSS

J10

VSS

J11

VSS

J12

VSS

K8

VSS

K9

VSS

K10

VSS

K11

VSS

L8

VSS

L9

VSS

L10

VSS

L11

VSS

M8

VSS

M9

VSS

M10

VSS

M11

VSS

N8

VSS

N9

VSS

N10

VSS

N11

VSS

N12

VSS

N13

VSS

J13
J19
K12
K13
L12
L13
L19
M12
M13
P19

C742
@27PF_0402_NPO

+3VS

Default01

0

0

1

1

+3VALW

+3VALW

Control 1 : port 3 UV3+ D18 UV3- D19 OC3# G17
Control 1 : port 4 UV4+ E18 UV4- F18 OC4# H16
Control 1 : port 5 UV5+ G18 UV5- G19 OC5# G16

HW TRIP PULL LOW 1K TRIP FROM PCI AD0..31
PULL HIGH TRIP FROM FLASH ROM

USBPVDD

R599

1 2

@0_0805

C734

@10UF_10V_1206

USBIVDD

R602

1 2

@0_0805

C737

@10UF_10V_1206

C735

@1UF_10V_0603_X5R

C736

@.1UF_0402_X5R

C738

@.1UF_0402_X5R

USBP0+<27>

USBP0-<27>

USBP1+<27>

USBP1-<27>

USBP2+<27>

USBP2-<27>

BlueTooth

SD/MS Winbond W81386D

R603

1 2

@0_0805

C739

@10UF_10V_1206

R173

15K_0402

R186

R187

15K_0402

15K_0402

R166

R164

15K_0402

15K_0402

USBREFVDD

R185

R172

R181

15K_0402

R178

R179

R168

R165

+3VALW

SD/MS Winbond W81386D

C740

@.1UF_0402_X5R

22_0402

22_0402

22PF_0402_NPO

22_0402

22_0402

1 2

22PF_0402_NPO

22_0402

22_0402

1 2

22PF_0402_NPO

BlueTooth

CLK_SB48M

1 2

C232

1 2

C231

5PF_0402_NPO

1 2

C235

C219

5PF_0402_NPO

1 2

C230

USB CONNECTOR

USB CONNECTOR

12

R140
@22_0402

12

C185
@10PF_0402

C238

5PF_0402_NPO

C237

1 2

22PF_0402_NPO

USB_P1+

USB_P1-

C234

1 2

22PF_0402_NPO

USB_P2+

USB_P2-

C224

1 2

22PF_0402_NPO

USB_P0+

USB_P0-

Control 2 : port 2 UV2+ E14 UV2- D15 OC2# J16
Control 2 : port 5 UV5+ G18 UV5- G19 OC5# G16

U13C

R160

+3VALW

USB_P3+<27>
USB_P3-<27>

15K_0402

R196

1 2

0_0805

10UF_10V_1206

CLK_SB48M<15>

USB_P3+
USB_P3-

USB_P4+<28>

USB_P4-<28>

OVCUR#0<27>
OVCUR#1<27>

OVCUR#2<27>

USBCDD

C722

+5V

C247

1UF_10V_0603_X5R

C246

.1UF_0402_X5R

R604

@4.7K_0402

OVCUR#3(PORT 2) DEBUG MARK 1K

R557

470K_0603

R559

470K_0603

R561

470K_0603

CLK_SB48M

USB_P0+
USB_P0­USB_P1+
USB_P1-

USB_P2+
USB_P2­USB_P4+
USB_P4-

OVCUR#0
OVCUR#1
OVCUR#3
OVCUR#2
OVCUR#4
OVCUR#5

1 2

OVCUR#3

OVCUR#4

OVCUR#5

B18
C18
E14
D15
E16
E15
D18
D19
E18

F18
G18
G19

G20

J16
H17
G17
H16
G16

D16

F17
B17

E19

C11
A12
B12
C12
A13
D12
E11
E12
B13
C13

for 1394
un-use_962

R558

R560

R562

V4

USBCLK48M

UV0+/RSDP0
UV0-/RSDM0
UV1+/RSDP1
UV1-/RSDM1
UV2+/RSDP2
UV2-/RSDM2
UV3+/RSDP3
UV3-/RSDM3
UV4+/RSDP4
UV4-/RSDM4
UV5+/RSDP5
UV5-/RSDM5

OC0#
OC1#
OC2#
OC3#
OC4#
OC5#

USBVDD
USBVDD

USBVSS
USBVSS

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

SIS961

560K_0603

560K_0603

560K_0603

OVCUR#5 : PULL UP TRAP FROM SYSTEM FLASH ROM

PULL DOWN 1K TRAP FROM PCI AD31..0

NC
NC
NC
NC
NC
NC

NC
NC
NC
NC
NC
NC

NC
NC

NC
NC

NC
NC

NC
NC
NC
NC
NC
NC
NC
NC
NC

NC
NC
NC

A19
C16
E17
C19
D20
F20

A20
C17
D17
C20
E20
F19

F16
B16

C15
A18

A17
B20

B19
B11
D11
A11
E10
D9
B10
A10
A9

C9
C10
D10

R605

@4.7K_0402

USBIVDD

USBCDD

USBIVDD

R600

@4.7K_0402

R601
@432_1%_0603
USB_X1

USBPVDD

USB_X2

USBREFVDD

1 2

12

12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

B

C

D

E

F

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SiS 961(3) USB

ACT10

G

19 45Thursday, May 30, 2002

H

1.0A

of

A

+3VS +3VS

RP126

10P8R_8.2K

RP127

10P8R_8.2K

RP125

10P8R_8.2K

10
9
8
7
6

10
9
8
7
6

10
9
8
7
6

+3VS

DEVSEL# <17,22,23,25,26>
PERR# <22,23,25,26>
PLOCK# <17>

REQ#2 <17,23>
REQ#3 <17,22>
REQ#4 <17,26>
GNT#0 <17,25>

GNT#1 <17,26>
PIRQA# <16,17>
PIRQB# <17,25>
PIRQC# <17,23,26>

FRAME#<17,22,23,25,26>

IRDY#<17,22,23,25,26> SERR# <17,22,23,25,26>

TRDY#<17,22,23,25,26>

STOP#<17,22,23,25,26>

1 1

REQ#0<17,25>
REQ#1<17,26>

GNT#4<17,26>
GNT#3<17,22>

PIRQD#<17,22,26>

GNT#2<17,23>

1
2
3
4
5

+3VS

1
2
3
4
5

+3VS +3VS

1
2
3
4
5

B

VTT_961

CPU VCC LEVEL

12

12

12

.1UF_16V_0402_Y5V

C179

.1UF_16V_0402_Y5V

+3VS

12

+

C522

22UF_10V_1206

C181

12

+

C523

22UF_10V_1206

C180
.1UF_16V_0402_Y5V

12

C193

.1UF_16V_0402_Y5V

C

12

C205

.1UF_16V_0402_Y5V

12

C207

47PF_0402_NPO

.1UF_16V_0402_Y5V

12

C211

.1UF_16V_0402_Y5V

12

C214

12

C216

47PF_0402_NPO

C199

.1UF_16V_0402_Y5V

12

C200

.1UF_16V_0402_Y5V

D

12

12

12

C194

47PF_0402_NPO

C201

.1UF_16V_0402_Y5V

.1UF_16V_0402_Y5V

12

C202

.1UF_16V_0402_Y5V

12

C196

2 2

+3VS

+3VALW

R356 10K_0402

PM_CLKRUN#<23,25,26,33>

M_SEN#<16,33>

SMB_DATA<12,13,15,18>

3 3

4 4

SMB_CLK<12,13,15,18>

1 2

R349 10K_0402

1 2

R401 4.7K_0402

1 2

R394 4.7K_0402

1 2

+3VS

PVDD_AUX

3.3V LEVEL

+1.8VS

IVDD_AUX

1.8V LEVEL

C556
10UF_6.3V_1206_X7R

12

+

C536

22UF_10V_1206

12

+

C528
100UF_D2_6.3V

12

C222

.1UF_16V_0402_Y5V

12

C192

.1UF_16V_0402_Y5V

12

C227

.1UF_16V_0402_Y5V

.1UF_16V_0402_Y5V

C220

.1UF_16V_0402_Y5V

12

12

C223

12

C195
33PF_0402_NPO

C204

.1UF_16V_0402_Y5V

12

12

C226

.1UF_16V_0402_Y5V

12

.1UF_16V_0402_Y5V

12

12

C208

.1UF_16V_0402_Y5V

C225
.1UF_16V_0402_Y5V

C221

12

C209
33PF_0402_NPO

.1UF_16V_0402_Y5V

C210

12

12

C213
.1UF_16V_0402_Y5V

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

B

C

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SiS961 Decoupling & Pull-Up

ACT10

D

20 45Thursday, May 30, 2002

1.0A

of

A

HDD Connector

PDD[0..15]<17>

1 1

IDE_RESET#<29>

Correct HDD pin define ,pls update layout

PDD7
PDD6
PDD5

R177

10K_0402

PDDREQ<17>

PDIOW#<17>

PDIOR#<17>

PDIORDY<17>

PDCS1#<17> PDCS3# <17>

PDD4 PDD11
PDD3 PDD12
PDD2 PDD13
PDD1 PDD14

1 2

PDD0 PDD15
PDDREQ

PDIORDY
RPDDACK#
RIRQ14

PDA1<17>
PDA0<17>

PHDD_LED#

+5VSHDD

PDD[0..15]

JP6

12
34
56
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44

FOXCONNHH99221-T3_44P

PDD8
PDD9
PDD10

PCSEL

R442

1 2

470_0402

CBLIDA <17>
PDA2 <17>

+5VSHDD

B

PIDEPWR<18>

+5VSHDD

+12VALW

2

G

Placea caps. near HDD
CONN.

12

C654
1000PF_0402_X7R

+

C630

10UF_16V_1206

Q55

+5VS

SI2301DS

12

R465

100K_0402

13

D

Q49

2N7002

S

Layout Note: +5VSHDD trace
width 60 mil

+

C636

10UF_16V_1206

12

R469
150K_0603

12

C659

1UF_25V_0805_Y5V

2

12

C

+5VSHDD

13

C602
.01UF_25V_0402_X7R

12

C655
.1UF_16V_0402_Y5V

SI2301DS: P CHANNEL
VGS: -4.5V, RDS: 130 mOHM
VGS: -2.5V, RDS: 190mOHM
Id(MAX): 2.3A
VGS(MAX): +-8V

3

2

S

G

D1

D

E

2 2

+3VS

R459

1 2

4.7K_0402

PDIORDY

PDDACK#<17>

IRQ14<17>

CD-ROM Connector

OZ_DACK#<29>

OZ_IRQ<29>

+5VCD

1000PF_0402_X7R

+5VCD

+5VCD

1000PF_0402_X7R

C120

JP7

131
232
333
434
535
636
737
838
939
10 40
11 41
12 42
13 43
14 44
15 45
16 46
17 47
18 48
19 49
20 50
21 51
22 52
23 53
24 54
25 55
26
27
28
29
30
61 62
63 64
65 66

FOXCONNQL11303-A606

OZ_SDD[0..15]

56
57
58
59
60

C126

CD_AGND <30>

OZ_SDD8
OZ_SDD9
OZ_SDD10
OZ_SDD11
OZ_SDD12OZ_SDD4
OZ_SDD13OZ_SDD3
OZ_SDD14
OZ_SDD15OZ_SDD1
OZ_DREQ

RSDDACK#

CBLIDB

W=80mils

1 2

C435 .1UF_16V_0402_Y5V

1000PF_0402_X7R

1 2

INT_CD_R <29>

OZ_DREQ <29>
OZ_SIOR# <29>

OZ_SBA2 <29>
OZ_SCS3# <29>

WGATE# <32>
TRK0# <32>
WRPRT# <32>
RDATA# <32>

HDSEL# <32>
INDEX# <32>
DRV0# <32>

CBLIDB <17>

+5VCD

R318 @100K_0402

1 2

R318, C435, R317 MUST MOVE

B

OZ_SDD[0..15]<29>

1000PF_0402_X7R

SEC_CSEL

12

C751

OZ_SDD7
OZ_SDD6
OZ_SDD5

OZ_SDD2
OZ_SDD0

OZ_SIORDY
RIRQ15

SHDD_LED#

1 2

3 3

OZ_IDE_SRST#<29>

4 4

+5VS

12

C749

.1UF_16V_0402_Y5V

.1UF_16V_0402_Y5V

10K_0402

OZ_SIOW#<29>

OZ_SIORDY<29>

R317

470_0402

WDATA#<32>

1.6M_EN#<32>

DISKCHG#<32>

1000PF_0402_X7R

INT_CD_L<29>

R412

OZ_SBA1<29>
OZ_SBA0<29>
OZ_SCS1#<29>

12

STEP#<32>

DIR#<32>

MTR0#<32>

12

C750

C119

1 2

1 2

+5VCD

+5VS
+5VS

4.7UF_10V_0805

A

1 2

R446 22_0402

1 2

R466 22_0402

PDDREQ

1 2

R400 22_0402

1 2

R374 22_0402

OZ_DREQ

Placea caps. near CDROM
CONN.

12

12

C90

C89

.1UF_16V_0402_Y5V

12

12

C92

C91

.1UF_16V_0402_Y5V

RPDDACK#
RIRQ14

1 2

R419 5.6K_0402

C571

1 2

33PF_0402_NPO

RSDDACK#

RIRQ15

C

@10K_0402

+

C106

10UF_16V_1206

+

C117

10UF_16V_1206

R582

1 2

+5VS

100K_0402

PHDD_LED#
SHDD_LED#

R445

R127
100K_0402

1 2

1 2

U4C

9

10

74HCT08

ACT_LED#

8

+5VS

Title

Size Document Number Rev

D

Date: Sheet

1 2

R195 5.6K_0402

C248

1 2

33PF_0402_NPO

12

C87

1UF_25V_0805_Y5V

12

C88

1UF_25V_0805_Y5V

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

ACT_LED# <36>

Compal Electronics, Inc.

IDE/CD-ROM Module

ACT10

21 45Thursday, May 30, 2002

E

1.0A

of

5

3
1

+

Q73
2SB1197K

+3VLAN +3V

12

C746
.1UF_0402_X5R

+2.5VLAN

+3VLAN

VCTRL

2

D D

C745

22UF_10V_1206

ONBD_LAN_PME#<23,25,26,33,34>

LAN_RD-<27>

LAN_RD+<27>

LAN_TD-<27>
LAN_TD+<27>

12

12

PIRQD#<17,20,26>

PCIRST#<17,23,24,25,26>

12

.1UF_0402_X5R

GNT#3<17,20>
REQ#3<17,20>

R322

49.9_1%_0603

C439

R324

49.9_1%_0603

C C

CLK_PCI_LAN<15>

+3VLAN

+2.5VLAN

12

.1UF_0402_X5R

C/BE#3<17,23,25,26>

C437

AD17

B B

AD[0..31]<17,23,25,26>

CLK_PCI_LAN LAN_IDSEL

12

12

R315
@22_0402

12

C428

R314
100K_0402

+3VS

CLK_PCI_LAN

R64

1 2

100_0402

AD[0..31]

1 2

R313 10K_0402

DIS_LAN#<33>

AD31
AD30

AD29
AD28

AD27
AD26
AD25
AD24

LAN_IDSEL

AD23

LAN_IDSEL

@10PF_0402

LAN_RD-

LAN_RD+

LAN_TD-

LAN_TD+

4

12

C727

.1UF_0402_X5R

AVTIVITY#

LAN_100#

LAN_10#

8079787776757473727170696867666564636261605958575655545352

NC

NC

GND

LED0

LED1NCLED2

81

INTAB

82

RSTB

83

CLK

84

GNTB

85

REQB

86

AD31

87

AD30

88

GND

89

AD29

90

VDD

91

AD28

92

AD27

93

AD26

94

AD25

95

AD24

96

VDD25

97

VDD

98

CBE3B

99

IDSEL

100

AD23

AD22

GND

TXD-

TXD+

AVDD

AD21

AD20

AD19

VDDNCAD18

RXIN-

AVDD

RXIN+

ISOLATEB

AD17

AD16

CBE2B

FRAMEB

IRDYB

TRDYB

1234567891011121314151617181920212223242526272829

AD22

AD18

AD20

AD16

AD17

AD21

AD19

C/BE#2

TRDY#

IRDY#

FRAME#

DEVSEL#

C/BE#2<17,23,25,26>

FRAME#<17,20,23,25,26>

IRDY#<17,20,23,25,26>
TRDY#<17,20,23,25,26>

DEVSEL#<17,20,23,25,26>

STOP#<17,20,23,25,26>
PERR#<20,23,25,26>
SERR#<17,20,23,25,26>

PAR<17,23,25,26>

C/BE#1<17,23,25,26>

12

R323

5.6K_1%_0603

GND

RTT3

RTSET

LWAKE

DEVSELB

GND

STOPB

PERRB

SERR#

STOP#

PERR#

GND

SERRB

3

AVDD-1
AVDD-2

AVDD25-3

C438

12

C440

.1UF_0402_X5R

.1UF_16V_0402_Y5V

LAN_X1

LAN_X2

VCTRL

12

C434

.1UF_0402_X5R

12

.1UF_0402_X5R

12

+2.5VLAN

+3VLAN

AUX
LAN_EECS
LAN_EECLK
LAN_EEDI
LAN_EEDO

AD0
AD1

AD2
AD3

AD4
AD5
AD6

AD7

.1UF_0402_X5R

12

C132

R309

5.6K_0402

1

CS

2

SK

3

DI

4

DO

12

U15

9346

+3VLAN

51

NCNCNC

AD11

AD11

U14

VDD25

50

AUX

49

EECS

48

EESK

47

EEDI

46

EEDO

45

AD0

44

AD1

43

GND

42

AD2

41

AD3

40

NC

39

VDD

38

AD4

37

AD5

36

AD6

35

NC

34

VDD

33

AD7

32

CBE0B

31

GND

AD10

AD9

AD8

30

RTL8100-BL

AD8

AD9

AD10

X1

X2

GND

AVDD

PMEB

VCTRL

AVDD25

PAR

CBE1B

VDD

AD15

AD14

AD13

AD12

AD14

AD12

AD13

AD15

MURATALQG21N4R7K10

C441

LAN_X1 LAN_X2

12

C448
27PF_0402_NPO

8

VCC

7

NC

6

NC

5

GND

C/BE#0 <17,23,25,26>

12

C425

@.1UF_0402_X5R

1 2

L40

4.7UF_16V_1206

X2
25MHz

+3VLAN

12

2

+2.5VLAN +3VLAN

L37

MURATALQG21N4R7K10

1 2
1 2

L38

MURATALQG21N4R7K10

C427

12

C447
27PF_0402_NPO

LAN_100#

(LAN_100LINK)

C449
.1UF_16V_0402_Y5V

LAN_10#

(LAN_10LINK)

12

C426

.1UF_0402_X5R

+3VLAN

AVTIVITY#

(LAN_ACT)

+2.5VLAN

.1UF_0402_X5R

+3VLAN

C429

.1UF_0402_X5R

Q12

1

G1

D1

2

S2

S1

3 4

G2 D2

FDC6320C

Q11

1

G1

D1

2

S2

S1

3 4

G2 D2

FDC6320C

R312

12

200_0402

C443

1000PF_0402_X7R

12

12

C432

.1UF_0402_X5R

12

12

C433

1000PF_0402_X7R

6
5

6
5

200_0402

12

1000PF_0402_X7R

C444

12

1000PF_0402_X7R

C446

.1UF_0402_X5R

R31

12

200_0402

R32

12

1

12

12

C430

C431

.1UF_0402_X5R

12

12

C442

C445

.1UF_0402_X5R

LAN_ACTIVE <27>

LINK_100 <27>

12

C129
1000PF_0402_X7R

LINK_10 <27>

12

C127
1000PF_0402_X7R

PAR

+3VLAN

12

C131

.1UF_0402_X5R

A A

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

5

4

3

2

Title

Realtek RTL8100BL

Size Document Number Rev

ACT10

Date: Sheet

22 45Thursday, May 30, 2002

1

of

1.0A

A

B

C

D

E

C139

1 2

R116 33_0402

+3V

12

.1UF_16V_0402_Y5V

C167

.1UF_16V_0402_Y5V

S1_IOWR# <24>
S1_IORD# <24>
S1_OE# <24>

S1_CE2# <24>

S1_REG# <24>

S1_CE1# <24>
S1_RST <24>

S1_WAIT# <24>
S1_INPACK# <24>

S1_WE# <24>

S1_BVD1 <24>
S1_WP <24>

S1_RDY# <24>
PCM_SPK# <31>

S1_BVD2 <24>
S1_CD2# <24>

S1_CD1# <24>
S1_VS2 <24>
S1_VS1 <24>

12

C166

S1_A16

12

.1UF_16V_0402_Y5V

C168

.1UF_16V_0402_Y5V

12

C85

12

C94

.1UF_16V_0402_Y5V

12

C128

.1UF_16V_0402_Y5V

S1_VCC

+3V

12

12

C109

S1_A[0..25]

4 4

3 3

2 2

SUSP#<33,37,39>

CLK_PCI_PCM

1 1

S1_D[0..15]
AD[0..31]

1 2

+3V

R85 10K_0402

RB751V

12

R63
@33_0402

12

C79
@10PF_0402_NPO

D14

21

S1_A[0..25] <24>
S1_D[0..15] <24>
AD[0..31] <17,22,25,26>

C/BE#3<17,22,25,26>
C/BE#2<17,22,25,26>
C/BE#1<17,22,25,26>
C/BE#0<17,22,25,26>

PCIRST#<17,22,24,25,26>

FRAME#<17,20,22,25,26>

IRDY#<17,20,22,25,26>
TRDY#<17,20,22,25,26>

DEVSEL#<17,20,22,25,26>

STOP#<17,20,22,25,26>
PERR#<20,22,25,26>

SERR#<17,20,22,25,26>

CLK_PCI_PCM<15>

PCM_PME#<22,25,26,33,34>

AD19

PM_CLKRUN#<20,25,26,33>

PAR<17,22,25,26>
REQ#2<17,20>
GNT#2<17,20>

1 2

R65 100_0402

PIRQC#<17,20,26>

PCM_RI#<36>

SIRQ<18,32,33>

V_PRST#<16,24,25>

4.7UF_10V_0805

VPPD0<24>

VPPD1<24>
VCCD0#<24>
VCCD1#<24>

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

1 2

R67 0_0402

PCM_ID

3

AD31

4

AD30

5

AD29

7

AD28

8

AD27

9

AD26

10

AD25

11

AD24

15

AD23

16

AD22

17

AD21

19

AD20

23

AD19

24

AD18

25

AD17

26

AD16

38

AD15

39

AD14

40

AD13

41

AD12

43

AD11

45

AD10

46

AD9

47

AD8

49

AD7

51

AD6

52

AD5

53

AD4

54

AD3

55

AD2

56

AD1

57

AD0

12

C/BE3#

27

C/BE2#

37

C/BE1#

48

C/BE0#

20

PCIRST#

28

PCIFRAME#

29

PCIIRDY#

31

PCITRDY#

32

PCIDEVSEL#

33

PCISTOP#

34

PCIPERR#

35

PCISERR#

36

PCIPAR

1

PCIREQ#

2

PCIGNT#

21

PCIPCLK

59

RI_OUT#/PME#

70

SUSPEND#

13

IDSEL

60

MF0

61

MF1

64

MF2

65

MF3

67

MF4

68

MF5

69

MF6

66

G_RST#

CB1410

C93

.1UF_16V_0402_Y5V

717273

74

VPPD0

VPPD1

VCCD0#

VCCD1#

PQFP 144

22.2 X

22.2 X

1.60

GND

GND

6

22

18

44

VCCP

VCCP

GND

GND

GND

GND

42

58

78

94

12
C141

.1UF_16V_0402_Y5V

86

90

102

122

126

138

VCC

VCC

VCC

VCC

VCCCB

VCCCB

CSTSCHNG/BVD1

RSVD/D14

RSVD/A18

GND

GND

RSVD/D2

84

100

114

130

143

12

C169
.1UF_16V_0402_Y5V

+3V

+3V

14

30

50

63

VCC

VCCI

VCCP

VCCP

CAD31/D10

CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6

CAD19/A25

CAD18/A7
CAD17/A24
CAD16/A17

CAD15/IOWR#

CAD14/A9

CAD13/IORD#

CAD12/A11

CAD11/OE#

CAD10/CE2#

CAD9/A10

CAD8/D15

CAD7/D7

CAD6/D13

CAD5/D6

CAD4/D12

CAD3/D5

CAD2/D11

CAD1/D4
CAD0/D3

CCBE3#/REG#

CCBE2#/A12

CCBE1#/A8

CCBE0#/CE1#

CRST#/RESET

CFRAME#/A23

CIRDY#/A15

CTRDY#/A22

CDEVSEL#/A21

CSTOP#/A20
CPERR#/A14

CSERR#/WAIT#

CPAR/A13

CREQ#/INPACK#

CGNT#/WE#

CCCLK/A16

CCLKRUN#/WP

CBLOCK#/A19

CINT#/READY

SPKROUT

CAUDIO#/BVD2

CCD2#/CD2#
CCD1#/CD1#

CVS2/VS2#
CVS1/VS1#

C138
.1UF_16V_0402_Y5V

1 2

U18

144
142
141
140
139
129
128
127
124
121
120
118
116
115
113
98
96
97
93
95
92
91
89
87
85
82
83
80
81
77
79
76

125
112
99
88

119
111
110
109
107
105
104
133
101
123
106
108

135
136

103
132
62

134
137

75
117
131

.1UF_16V_0402_Y5V

S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3

S1_REG#
S1_A12
S1_A8
S1_CE1#

S1_RST
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A14
S1_WAIT#
S1_A13
S1_INPACK#
S1_WE#
A16_CLK

S1_BVD1
S1_WP

S1_A19
S1_RDY#
PCM_SPK#

S1_BVD2
S1_CD2#

S1_CD1#
S1_VS2
S1_VS1

S1_D2
S1_A18
S1_D14

Compal Electronics, Ltd.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

B

C

D

Title

PCMCIA controller ENE CB1410

Size Document Number Rev

ACT10

Date: Sheet

23 45Thursday, May 30, 2002

E

of

1.0A

A

B

C

D

E

PCMCIA Power Controller

+12VALW

U19

9

+5VALW

5
6

+3VALW

3
4

C74
.1UF_16V_0402_Y5V

S1_VPP

G_RST#

PCIRST#<17,22,23,25,26>

CP2211

12V

5V
5V

3.3V

3.3V

12

C107
1UF_25V_0805_Y5V

S1_A23
S1_WP

+3VALW

12

R59

100K_0402

GND

7

+3VALW

2
1

SHDN

16

5

1 2

@0_0402

VCC
VCC
VCC

VPP

VCCD0
VCCD1
VPPD0
VPPD1

OC

S1_VPP

1 2

R109 22K_0402

1 2

R108 22K_0402

U20

7SH32

R60

1 1

2 2

+3VALW +5VALW

C69
10UF_10V_1206

3 3

C58

.1UF_16V_0402_Y5V

C73

.1UF_16V_0402_Y5V

C68
10UF_10V_1206

G_RST#<33>

S1_VCC

13
12
11

10

1
2
15
14

8

V_PRST#

12

C110

.01UF_25V_0402_X7R

V_PRST#

4

12

C137
.1UF_16V_0402_Y5V

S1_VPP

VCCD0# <23>
VCCD1# <23>
VPPD0 <23>
VPPD1 <23>

+

C86

4.7UF_25V_1206

S1_VCC
S1_VCC

C57
.1UF_16V_0402_Y5V

V_PRST# <16,23,25>

S1_VCC

S1_VCC

1 2

FBM-11-160808-800LMT

S1_VCCL

12

C176

.1UF_16V_0402_Y5V

L6

S1_CE1#<23>
S1_OE#<23>

S1_WE#<23>
S1_RDY#<23>

12

C175

.01UF_25V_0402_X7R

C177
10UF_10V_1206

S1_WP<23>

S1_VPP

S1_D3
S1_D4
S1_D5
S1_D6
S1_D7
S1_CE1#
S1_A10
S1_OE#
S1_A11
S1_A9
S1_A8
S1_A13
S1_A14
S1_WE#
S1_RDY#
S1_VCCL

S1_A16
S1_A15
S1_A12
S1_A7
S1_A6
S1_A5
S1_A4
S1_A3
S1_A2
S1_A1
S1_A0
S1_D0
S1_D1
S1_D2
S1_WP

S1_A[0..25]<23>
S1_D[0..15]<23>

CardBus Socket

JP8

1

GND

GND

2

D3

CD1#

3

D4

D11

4

D5

D12

5

D6

D13

6

D7

D14

7

CE1#

D15

8

A10

CE2#

9

OE#

VS1#

10

A11

IORD#

11

A9

IOWR#

12

A8

A17

13

A13

A18

14

A14

A19

15

WE#

A20

16

RDY

A21

17

VCC

VCC

18

VPP1

VPP2

19

A16

A22

20

A15

A23

21

A12

A24

22

A7

A25

23

A6

VS2#

24

A5

RST

25

A4

WAIT#

26

A3

INPACK#

27

A2

REG#

28

A1

BVD2

29

A0

BVD1

30

D0

31
32
33
34

70
73 74
71 72

D8

D1

D9

D2

D10

WP

CD2#

GND

GND

GND

GND
GND GND
GND GND

HRS1C11SA_68P1

35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68

69

S1_A[0..25]
S1_D[0..15]

S1_CD1#
S1_D11
S1_D12
S1_D13
S1_D14
S1_D15
S1_CE2#
S1_VS1
S1_IORD#
S1_IOWR#
S1_A17
S1_A18
S1_A19
S1_A20
S1_A21
S1_VCCL

S1_A22
S1_A23
S1_A24
S1_A25
S1_VS2
S1_RST
S1_WAIT#
S1_INPACK#
S1_REG#
S1_BVD2
S1_BVD1
S1_D8
S1_D9
S1_D10
S1_CD2#

1000PF_0402_X7R

C133

1 2

1000PF_0402_X7R

S1_VPP

12

C123

S1_CD1# <23>

S1_CE2# <23>
S1_VS1 <23>
S1_IORD# <23>
S1_IOWR# <23>

S1_VS2 <23>
S1_RST <23>
S1_WAIT# <23>
S1_INPACK# <23>
S1_REG# <23>
S1_BVD2 <23>
S1_BVD1 <23>

S1_CD2# <23>

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

B

C

D

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

ACT10

CardBus Socket

E

24 45Thursday, May 30, 2002

1.0A

of

5

4

3

2

1

+3VS

D D

AD[0..31]<17,22,23,26>

CLK_PCI_1394

12

R369
@10_0402

V_PRST#<16,23,24>

12

C527
@10PF_0402

C/BE#3<17,22,23,26>
C/BE#2<17,22,23,26>
C/BE#1<17,22,23,26>
C/BE#0<17,22,23,26>
CLK_PCI_1394<15>
GNT#0<17,20>
REQ#0<17,20>

ID: AD16

PCIRST#<17,22,23,24,26>

AD16

FRAME#<17,20,22,23,26>
IRDY#<17,20,22,23,26>
TRDY#<17,20,22,23,26>
DEVSEL#<17,20,22,23,26>
STOP#<17,20,22,23,26>
PERR#<20,22,23,26>
PIRQB#<17,20>
1394_PME#<22,23,26,33,34>
SERR#<17,20,22,23,26>
PAR<17,22,23,26>
PM_CLKRUN#<20,23,26,33>

1 2

R623 @0_0402

R415 220_0402

R416 220_0402

C C

B B

A A

CLK_PCI_1394

1 2

R622

1 2

0_0402

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

R383
100_0402

12

12

22

PCI_AD31

24

PCI_AD30

25

PCI_AD29

26

PCI_AD28

28

PCI_AD27

29

PCI_AD26

31

PCI_AD25

32

PCI_AD24

37

PCI_AD23

38

PCI_AD22

40

PCI_AD21

41

PCI_AD20

42

PCI_AD19

43

PCI_AD18

45

PCI_AD17

46

PCI_AD16

61

PCI_AD15

63

PCI_AD14

65

PCI_AD13

66

PCI_AD12

67

PCI_AD11

69

PCI_AD10

70

PCI_AD9

71

PCI_AD8

74

PCI_AD7

76

PCI_AD6

77

PCI_AD5

79

PCI_AD4

80

PCI_AD3

81

PCI_AD2

82

PCI_AD1

84

PCI_AD0

34

PCI_C/BE3

47

PCI_C/BE2

60

PCI_C/BE1

73

PCI_C/BE0

16

PCI_CLK

18

PCI_GNT

19

PCI_REQ

36

PCI_IDSEL

49

PCI_FRAME

50

PCI_IRDY

52

PCI_TRDY

53

PCI_DEVSEL

54

PCI_STOP

56

PCI_PERR

13

PCI_INTA

21

PCI_PME

57

PCI_SERR

58

PCI_PAR

12

PCI_CLKRUN

85

PCI_RST

14

G_RST

89

GPIO3

90

GPIO2

C532

.1UF_0402_X5R

REG_EN#

REG18

9

12

CLOSE CHIP

PCI BUS INTERFACE

AGND

AGND

PLLGND1

REG18

109

110

8

12

C569
.1UF_0402_X5R

2035486278

VDDP

VDDP

VDDP

VDDP

TSB43AB22

AGND

AGND

AGND

AGND

111

117

126

127

R422

100K_0402

12

R420

100K_0402

87

VDDP

CYCLEIN

PHY PORT 2

BIAS CURRENT

OSCILLATOR

FILTER

EEPROM 2 WIRE BUS

POWER CLASS

PHY PORT 1

DGND

DGND

AGND

DGND

DGND

DGND

445564

128

17

233033

12

CYCLEOUT

DGND

DGND

68

12

R423

100K_0402

101186

96

CNA

TEST17

TEST16

PLLVDD

TPBIAS1

FILTER0
FILTER1

TPBIAS0

DGND

DGND

DGND

75

8393103

DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD

AVDD
AVDD
AVDD
AVDD
AVDD

CPS

TPA1+

TPA1-

TPB1+

TPB1-

SDA

TPA0+

TPA0-

TPB0 +

TPB0 -

TEST9
TEST8

TEST3
TEST2
TEST1
TEST0

12

R368
100K_0402

R0

R1
X0

X1

SCL
PC0

PC1
PC2

12

R367
100K_0402

+3VS

L43

15
27

MurataBLM21A601S

39
51
59
72
88
100
7
1
2
107
108
120

R399 1K_0402

106

125
124
123
122
121

118

119
6

5

3
4
92
91
99

98
97

116
115
114
113
112

94
95

101
102
104
105

U21
TSB43AB22

1 2

C541 .1UF_0402_X5R

R375 1K_0402

1 2

R379 1K_0402

1 2

1 2

R385 6.34K_1%

C531 .1UF_0402_X5R

1 2

SDA_1394
SCL_1394

XTPBIAS0
XTPA0+
XTPA0­XTPB0+
XTPB0-

1 2

12
C529

.01UF_25V_0402_X7R

1 2

Near 1394 IC

C526 10PF_0402_NPO

1 2

X3

24.576MHz30-ppm

C525 10PF_0402_NPO

1 2

R418 220_0402

1 2

R417 220_0402

1 2

+VPLL_1394

+VPLL_1394

12
C524

4.7UF_10V_0805

XTPBIAS0
XTPA0+
XTPA0­XTPB0+
XTPB0-

12

R541

56.2_1%

12

R543

56.2_1%

12

R534

5.11K_1%

+3VS

12
C140

.1UF_0402_X5R

12
C544

.1UF_0402_X5R

12
C533

1000PF_0402_X7R

12
C549

1000PF_0402_X7R

12

R540

56.2_1%

12

R542

56.2_1%

12

C679

220PF_50V_0402_NPO

12
C554

.1UF_0402_X5R

.1UF_0402_X5R

12
C545

.1UF_0402_X5R

.1UF_0402_X5R

12
C568

1000PF_0402_X7R

12
C559

1000PF_0402_X7R

R610

12

C548
1UF_25V_0805_Y5V

1
2 3

R6110_0603

1
2 3

12
C534

12
C552

12
C561

1000PF_0402_X7R

0_0603

L53

@RFCMF3216

4

0_0603

R612

4

0_0603

R613

12
C560

.1UF_0402_X5R

12
C542

.1UF_0402_X5R

PA0+_C
PA0-_C
PB0+_C
PB0-_C

SUYIN8004A-04G5T

L52
@RFCMF3216

JP9

3456
2
1

Compal Electronics, Ltd.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

5

4

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

3

2

IEEE-1394 Controller (TSB43AB22 )

Size Document Number Rev
Custom

ACT10

Date: Sheet

1

of

25 45Thursday, May 30, 2002

1.0A

A

B

C

D

E

Or use SI2305DS.

+3VALW +3VAUX

12

1 1

21

101 102
103 104
105 106
107 108
109 110
111 112
113 114
115 116
117 118
119 120
121 122
123 124

125 126

JP10

1 2

12

KEY KEY

3 4

34

5 6

56

7 8

78

9 10

910

11 12

11 12

13 14

13 14

15 16

15 16

17 18

17 18

19 20

19 20

21 22

21 22

23 24

23 24

25 26

25 26

27 28

27 28

29 30

29 30

31 32

31 32

33 34

33 34

35 36

35 36

37 38

37 38

39 40

39 40

41 42

41 42

43 44

43 44

45 46

45 46

47 48

47 48

49 50

49 50

51 52

51 52

53 54

53 54

55 56

55 56

57 58

57 58

59 60

59 60

61 62

61 62

63 64

63 64

65 66

65 66

67 68

67 68

69 70

69 70

71 72

71 72

73 74

73 74

75 76

75 76

77 78

77 78

79 80

79 80

81 82

81 82

83 84

83 84

85 86

85 86

87 88

87 88

89 90

89 90

91 92

91 92

93 94

93 94

95 96

95 96

97 98

97 98

99 100

99 100
101 102
103 104
105 106
107 108
109 110
111 112
113 114
115 116
117 118
119 120
121 122
123 124

125 126

AMP1318916

W=30mils

1 2

R120 0_0402

W=40mils

W=40mils

1 2

R113 100_0402

MD_SPK <30>

PIRQC#
GNT#4

MINI_RST#
GNT#1

AD30
AD28

AD26
AD24
AD18

AD22
AD20

AD18

AD15
AD13
AD11

AD9

AD6
AD4
AD2
AD0

+5VS
PIRQC# <17,20,23>

+3VAUX

GNT#1 <17,20>
MDM_PME# <22,23,25,33,34>

MINI_LAN_PME# <22,23,25,33,34>

IDSEL : AD18

PAR <17,22,23,25>

FRAME# <17,20,22,23,25>
TRDY# <17,20,22,23,25>
STOP# <17,20,22,23,25>

DEVSEL# <17,20,22,23,25>

C/BE#0 <17,22,23,25>

IAC_SDATAO <18,19,30>SDATA_IN1<18>
AC97_RST# <18,30>

+3VAUX

R118

0_0402

+3V_MINI_2

12

C145

100PF_0402_NPO

12

R117

1 2

0_1206

12

C143
1000PF_0402_X7R

4.7UF_10V_0805

PCIRST# <17,22,23,24,25>

+3VS

4.7UF_10V_0805

+3V_MINI_1

C164

4.7UF_10V_0805

TIP RING

D22

+3V_MINI_1

+3VS

2 2

3 3

R111

12

0_1206

1000PF_0402_X7R

12

C136

CLK_PCI_MINI
12

R119
@10_0402

12

C163
@10PF_0402

IAC_BIT CLK
12

R61
@10_0402

12

C83
@10PF_0402

12

C135

100PF_0402_NPO

PIRQD#<17,20,22>

REQ#4<17,20> GNT#4 <17,20>

CLK_PCI_MINI<15>

REQ#1<17,20>

C/BE#3<17,22,23,25>

C/BE#2<17,22,23,25>

IRDY#<17,20,22,23,25>

PM_CLKRUN#<20,23,25,33>

SERR#<17,20,22,23,25>
PERR#<20,22,23,25>

C/BE#1<17,22,23,25>

IAC_SYNC<18,30>

IAC_BITCLK<18,30>

MOD_AUDIO_MON<30>

MOD_MIC<30>

MODEM_RI#<36>

+5VS

IDSEL : AD22

+5VS

WIRELESS_OFF#<33>

PIRQD#

W=40mils

REQ#4
CLK_PCI_MINI
REQ#1
AD31

AD29
AD27

AD25
AD22

AD23
AD21

AD19
AD17

C/BE#2 AD16

PM_CLKRUN#

AD14
AD12

AD10
AD8

AD7
AD5
AD3

W=30mils

AD1

MOD_AUDIO_MON

RB751V

1 2

R121 0_0402

1 2

R114 100_0402

+3VAUX

W=30mils W=40mils

1UF_10V_0603_X5R

C75

12

12

C165

C563

+5VS

12

.1UF_0402_X5R

C142
.1UF_0402_X5R

+3VAUX

12

.1UF_0402_X5R

12

C108

12

C72

S

12

C171
1000PF_0402_X7R

+3V_MINI_2

12

C134

.1UF_0402_X5R

12

C162
1000PF_0402_X7R

Q13
SI2301DS

D

13

G

2

1UF_10V_0603_X5R

12

C118

1000PF_0402_X7R

C174

12

12

C172

4.7UF_10V_0805

AD[0..31]<17,22,23,25>

4 4

A

AD[0..31]

Compal Electronics, Ltd.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

Mini PCI Slot

Size Document Number Rev
Custom

ACT10

Date: Sheet

E

of

26 45Thursday, May 30, 2002

1.0A

A

B

C

D

E

BlueTooth Interface

1 1

BT_DETACH<34>
BT_WAKE_UP<33>

BT_RST#<34>

USB_BT+

2 2

3 3

USB_BT-

R284

15K_0402

USBPWR1

USBPWR2

+3VALW +5VALW

USB_BT+
USB_BT-

C43

.1UF_0402_X5R

FBM-11-160808-800LMT

FBM-11-160808-800LMT

R287

15K_0402

USBPWR0

L30

1 2

FBM-11-451616-800T

1000PF_0402_X7R

BT_WAKE_UP

12

L27

12

L23

12

1 2

47PF_0402_NPO

L31

1 2

FBM-11-451616-800T

C378

Bluetooth Connector

USBBLUE+

USBBLUE-

C363

12

22UF_10V_1206

JP11

12
34
56
78
910

121411
13
15 16
171918

20

MOLEX_55091_0209

R293

R289

C375

1 2

47PF_0402_NPO

L32

1 2

FBM-11-451616-800T

+

C53

1000PF_0402_X7R

12

C377

12

C39

.1UF_0402_X5R

22_0402

22_0402

+

C55

22UF_10V_1206

1000PF_0402_X7R

BT_ON# <34>
BT_PRES# <33>

C369
5PF_0402_NPO
1 2

12

+

C376

4.7UF_10V_0805

USB_P3+ <19>

USB_P3- <19>

USB_5VA
USB_5VB
USB_5VC USB2-

C54

22UF_10V_1206

4.7UF_10V_0805

+5V

C76

+5V

C78

USBP2+<19>

USBP2-<19>

F1

POLYSWITCH_0.75A

12

R565

560K_0603

F2

POLYSWITCH_0.75A

12

R568

560K_0603

R614

USBP1-<19>

LINK_10<22> LID_SW# <33>
LINK_100<22>

LAN_TD+<22>
LAN_TD-<22>

R616

R618
R619

USBPWR0

R563

470K_0603

OVCUR#0 <19>

12

C124

1000PF_0402_X7R

USBPWR1

R567

470K_0603

OVCUR#1 <19>

12

C125

1000PF_0402_X7R

0_0603
0_0603

USB1+

0_0603

USB2+ USB_5VA

0_0603

JP17

12
34
56
78
910

13
15 16
171918

SUYIN80067AR-020G2T

+5V

F3

POLYSWITCH_0.75A

12

C121

4.7UF_10V_0805

R566

560K_0603

OVCUR#2 FOR DEBUG
MARK 1K ONLY

USB0+
USB0-USB1-

USB_5VB

121411

20

USB_5VC

LAN_ACTIVE <22>

LAN_RD+ <22>
LAN_RD- <22>

NEED PULL HIGH FOR LID_SW#

R615
R617

R564

470K_0603

0_0603
0_0603

30mil
30mil
30mil

USBPWR2

12

OVCUR#2 <19>

C122

1000PF_0402_X7R

USBP0+ <19>USBP1+<19>
USBP0- <19>

4 4

Compal Electronics, Ltd.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

USB & BlueTooth Connector

Size Document Number Rev
Custom

ACT10

Date: Sheet

E

of

27 45Thursday, May 30, 2002

1.0A

5

4

3

2

1

C674

@10PF_0402

USB_SD+
USB_SD-

SD_VDD3

R606

1.5K_0603

SD_VDD3

12

C618
.1UF_16V_0402_Y5V

SD_VDD3

USB_SD+

SD_VDD

SD_CD/DAT3_WIN
SD_CMD_WIN

SD_CLK_WIN
SD_DAT0_WIN

SD_DAT1_WIN
SD_DAT2_WIN

USB_SD-

R169

15K_0402

R489

47K_0402

D D

C C

15K_0402

1 2

R174

1 2

1 2

L11

FBM-11-160808-800LMT

1 2

L10

FBM-11-160808-800LMT

R473

47K_0402

47K_0402

1 2

1 2

47PF_0402_NPO

R490

C212

1 2

C239

5PF_0402_NPO

1 2

R474

47K_0402

C240

1 2

47PF_0402_NPO

R472

47K_0402

1 2

USB_SDATA+

USB_SDATA-

SD_WP

R471

300K_0402

1 2

R180

R156

33_0402

33_0402

51K_0402

1 2

12

C619

.1UF_16V_0402_Y5V

USB_P4+ <19>

USB_P4- <19>

SD_48MHZ<15>

SD_48MHZ

PLLEN 0: 6MHz 1: 48MHz

R497

1 2

+3VS

10K_0402

B_PCIRST#<4,16,17,29,33,34>

R508

will layout create the SD
connector footprint

2

G

JP18

1

CD/DAT3

2

CMD

3

VSS1

4

VDD

5

CLK

6

VSS2

7

DAT0

8

DAT1

9

DAT2
WP#

WP
DETECT#

DETECT

GND
GND
GND
GND
GND
GND

10
11

12
13

SDCARD_FOXCONNWK21923

SD_48MHZ

13

D

S

19
18
14
15
16
17

R495

@22_0402

1 2
12

C670
@10PF_0402_NPO

10UF_10V_1206

SD_RESET

2N7002

Q61

SD_EN#

C671

SD_VDD3

SD_VDD3

+5VS

12

C686

.1UF_16V_0402_Y5V

12

C677
.1UF_16V_0402_Y5V

1 2

R496 4.7K_0402

R507

@10K_0402

SD_VDD3
SD_VDD3

12

C689

.1UF_16V_0402_Y5V

U24

46

VDD5

1

VDD3

2

VDD3

23

VDD3

SD_SEM_CS
SD_SEM_SK

12

TWO LED MODE

R475
R476

0_0402

10K_0402

39
36

37
34

32

26
27
28
29
30
13

31
33

12
19
25
35
38
47

12
12

VDD3
XTI

XTO
PLLEN

RESET

SEM_CS
SEM_SK
SEM_WSD
SEM_RSD
SELF_PWR
SDMODE

NC
NC

VSS
VSS
VSS
VSS
VSS
VSS

W81386D

SD_SEM_CS

MS_EN

USB_LEDN

MS_ALEDN

MS_ILEDN
SD_ALEDN

SD_ILEDN

MS_VDD
MS_OLN

SD_VDD
SD_OLN

SD/MMC_INSN

SD_SEM_SK

for optional usb VID/PID setting

C681

1 2

@10PF_0402

40

D+

41

SD_EN

D-

MS1
MS2
MS3
MS4

SD1
SD2
SD3
SD4
SD5
SD6
SD7

SD_EN#

24

MS_EN#

48
42

MS_LED#

43
10

SD_LED#

44
45

MS_VDD

5
6

7
8
9
11

3
4

14
15
16
18
20
21
22
17

MS_BS_WIN
MS_SDIO_WIN
MS_INS#_WIN
MS_SCLK_WIN

SD_VDD

SD_DAT2_WIN
SD_CD/DAT3_WIN
SD_CMD_WIN
SD_CLK_WIN
SD_DAT0_WIN
SD_DAT1_WIN
SD_WP

SD_VDD AND MS_VDD POWER
Max. 110mA at 2.65V,
88mA AT 3.3V

1 2

1 2

R523 100K_0402

1 2

R550 100K_0402

1 2

R539 10K_0402

B B

MS_VDD

R453

R451

47K_0402

47K_0402

1 2

1 2

MS_BS_WIN
MS_SDIO_WIN
MS_INS#_WIN
MS_SCLK_WIN

A A

5

47K_0402

1 2

4

R452

R454

47K_0402

1 2

C594

.1UF_16V_0402_Y5V

JP19

1

GND

2

BS

3

VCC

4

SDIO

5

RSVD

6

INS

7

RSVD

8

SCLK

9

VCC

10

12

MS_EN#

GND

11

GND

12

GND

13

GND

14

GND

@FOXCONNWJ20A13-S1T

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

3

SD_VDD3

SD_VDD3

1 2

R125 10K_0402

1 2

R123 10K_0402

2

SD_LED#
MS_LED#

U4D

12
13

74HCT08

11

SD/MS_LED# <36>

+5VS

Compal Electronics, Ltd.

Title

SD/MMC W81386D

Size Document Number Rev
Custom

ACT10

Date: Sheet

28 45Thursday, May 30, 2002

1

of

1.0A

5

4

3

2

1

R376,R377,C540,C539,R381,R380,C580,C567 CANCEL

+5VCD

10
9
8
7
6

+5VCD

10
9
8
7
6

+12VALW

OZ_SDD4
OZ_SDD5
OZ_SDD6
OZ_SDD7

OZ_SDD12
OZ_SDD13
OZ_SDD14
OZ_SDD15

12

R441
100K_0402

13

2N7002

.1UF_0402_X5R

U51

1

NC

2

A

3

GND

CDPLAY#

2

Q51

DM_ON

DM_ON

TC7SH14

C249

INT_CD_L<21>

INT_CD_R<21>

OZ_SDD0
OZ_SDD1
OZ_SDD2
OZ_SDD3

+5VCD

OZ_SDD8
OZ_SDD9
OZ_SDD10
OZ_SDD11

+5VCD

INT_CD_L

INT_CD_R

RP129

1
2
3
4
5

10P8R_4.7K

RP132

1
2
3
4
5

10P8R_4.7K

CD_PLAY_LED#<34,36>

+5VCD

U30

1

8

S

D

2

7

S

D

3

6

S

D

4

5

G

D

12

SI4800

R66

470_0402

C584
.1UF_0402_X5R

13

2

Q53

2N7002

+5V_AMP

C588

14

1 2
7

14
11 10

7

VCC

Y

+5VALW

E

INT_CD_L

INT_CD_R

+5VCD

5

DM_ON

4

12

R491
100K_0402

13

C

22K

22K

13

12

DM_ON#

DM_ON#

Q54
DTC124EK

B

U26A
74HCT4066

U26B
74HCT4066

14

4 3
7

14

8 9
7

CD_PLAY

2

LEFT_CD <30>

RIGHT_CD <30>

U26C

5

74HCT4066

U26D

6

74HCT4066

+5VCD

12

13

C

22K

2

B

22K

CDROM_L <30>

CDROM_R <30>

R378
100K_0402

DM_ON#

E

Q39
DTC124EK

CD_PLAY <34>

1 2

L44
HB-1M2012-601JT

OZ_SDD0
OZ_SDD1
OZ_SDD2
OZ_SDD3
OZ_SDD4
OZ_SDD5
OZ_SDD6
OZ_SDD7
OZ_SDD8
OZ_SDD9
OZ_SDD10
OZ_SDD11
OZ_SDD12
OZ_SDD13
OZ_SDD14
OZ_SDD15

OZ_SBA0
OZ_SBA1
OZ_SBA2

OZ_SCS1#
OZ_SCS3#

OZ_SIOR#
OZ_SIOW#
TOUCHDN
OZ_SIORDY

OZ_IRQ
OZ_DREQ
OZ_DACK#

OZ_IDE_SRST#
CDASPN

1 2

100K_0402

R372

1 2

R371 @100K_0402

ISCDROM
GPIO_1

GPIO_0
R373 100K_0402

1 2

1 2

R392 100K_0402

+5VCD

C553

1UF_10V_0603_X5R

+5VCD

+5VCD

OZ_SBA0 <21>
OZ_SBA1 <21>
OZ_SBA2 <21>

OZ_SCS1# <21>
OZ_SCS3# <21>

OZ_SIOR# <21>
OZ_SIOW# <21>

OZ_SIORDY <21>

OZ_IRQ <21>IRQ15<17>
OZ_DREQ <21>
OZ_DACK# <21>

OZ_IDE_SRST# <21>

+5VCD

MODE1

+

C555

22UF_10V_1206

16V

+5VALW

+5VALW

1UF_10V_0603_X5R

94458

VDD

VDD

GND

GND

GND

1633658592

+

C242

22UF_10V_1206

+5VCD_1

.1UF_0402_X5R

VDD

GPIO[1]/VOL_UP

GPIO[0]/VOL_DN

GND

GND

C547

CDD0
CDD1
CDD2
CDD3
CDD4
CDD5
CDD6
CDD7
CDD8

CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15

CDA0

CDA1

CDA2

CCS0

CCS1

CDIOR#

CDIOW#

TOUCHDN

CIORDY

CHINTRQ

CDMARQ

CHDMACK#

CRESET#

CDASPN

SSYNC

SBIT_CLK

SDATA_OUT

SDATA_IN

SACRSTN

PWR_CTL

ISCDROM

MODE0
MODE1

PAVMODE

CSN

INCN

UDN

+

22UF_10V_1206

C577
1000PF_0402_X7R

U27
OZ165

77
79
82
84
87
91
96
98
1
3
7
10
14
17
19
21

69
71
67

64
62

100
5
73
94

75
13
89

23
60

47
52
54
49
45

51

80
39

40

56
57

38
41

42
43

C241

+5VCD

PLAYBTN#

REVBTN#

FRDBTN#

STOPBTN#

OSC1

10PF_0402_NPO

IRQ15

RP64
1 8
2 7
3 6
4 5

8P4R_100K

X4

OSC2

8MHZ

R406
1M_0402

C558

R607

1 2

10K_0402

C562

1UF_10V_0603_X5R

R194 100K_0402

1 2

D17

21

1N4148

EC_SMB_DA2<4,6,16,33>

EC_SMB_CK2<4,6,16,33>

+12VALW

CDPLAY#<30>

1
2

7SH08

PLAYBTN#
REVBTN#
FRDBTN#
STOPBTN#

D D

C C

IDE_RST#<18>

B_PCIRST#<4,16,17,28,33,34>

+5VCD

B B

A A

PLAYBTN# <34,36>

REVBTN# <34,36>

FRDBTN# <34,36>

STOPBTN# <34,36>

C546

10PF_0402_NPO

+5VS

53

U28

+5VS

R461 100K_0402

CDPLAY#

ISCDROM
OZ_IRQ
CDASPN
MODE1

+5VCD

+5VCD

+5VCD

OZ_SDD[0..15]

SDD[0..15]

SDA0<17>
SDA1<17>
SDA2<17>

SDCS1#<17>
SDCS3#<17>

SDIOR#<17>
SDIOW#<17>

SDIORDY<17>

SDDREQ<17>

SDDACK#<17>

4

DM_ON

1 3

Q47

2N7002

2

2

1 3

13

Q48

RP128

1
2
3
4
5

10P8R_100K

R370 47K_0402

1 2

R405 1K_0402

1 2

OZ_SDD[0..15] <21>

SDD[0..15] <17>

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

IRQ15

IDE_RESET#

IDE_RESET# <21>

PLAYBTN#
FRDBTN#
REVBTN#
STOPBTN#

INTN

Q46
2N7002

2

2N7002

10
9
8
7
6

TOUCHDN

OZ_SIORDY

OSC1
OSC2

GPIO_0
GPIO_1
INTN

+5VCD

76

HDD0

78

HDD1

81

HDD2

83

HDD3

86

HDD4

90

HDD5

95

HDD6

97

HDD7

2

HDD8

4

HDD9

8

HDD10

11

HDD11

15

HDD12

18

HDD13

20

HDD14

22

HDD15

68

HDA0

70

HDA1

66

HDA2

63

HCS0

61

HCS1

99

HDIOR#

6

HDIOW#

72

HIOCS16#

93

HIORDY

74

HINTRQ

12

HDMARQ

88

HDMACK#

24

HRESET#

59

HDASPN

48

HSYNC

53

HBIT_CLK

55

HDATA_OUT

50

HDATA_IN

46

HACRSTN

28

PAV_EN

36

PLAY/PAUSE

35

FFORWARD

34

REWIND

37

STOP/EJECT

29

PCSYSTEM_OFF

25

INTN

30

RESET#

26

SDATA

27

SCLK

31

OSCI

32

OSCO

Compal Electronics, Ltd.

Title

Direct CD Play OZ165

Size Document Number Rev
Custom

ACT10

5

4

3

2

Date: Sheet

29 45Thursday, May 30, 2002

1

1.0A

of

A

B

C

D

E

F

G

H

+5V_AMP VDDA

+12V_SW

1 2

C634
1UF_10V_0603_X5R

12

C632
1UF_10V_0603_X5R

1 2

MOD_MIC <26>

1 2

R521

@100K_0402

C616
@10PF_0402

C623 @22PF_0402_NPO

X6

@24.576MHz30-ppm

C625 @22PF_0402_NPO

+

C626

10UF_16V_1206
R478

@100K_0402

1 2

13

12

C604

C664

.1UF_16V_0402_Y5V

C612

1000PF_0402_X7R

1 2
1 2

1000PF_0402_X7R

12

C627

@1000PF_0402

R486

1 2

100K_0402

Q59

2N7002

2

1 2

R502 0_0805

12

C663

4.7UF_10V_0805

C622

+

12

C631
@.047UF_25V_0603_X7R

+5VALW

CDPLAY# <29>

+3VS

RIGHT_CD<29>

LEFT_CD<29>

C638
@1000PF_0402_X7R

12

C629
@1000PF_0402_X7R

1 2

C650
@1UF_25V_0805_Y5V

1 2

1 2

C649 @1000PF_0402

IAC_BITCLK <18,26>
SDATA_IN0 <18>

C747

1 2

4.7UF_10V_0805

C611

10UF_16V_1206

12

C595

1UF_25V_0805_Y5V

+5V_AMP about

+5VALW

1 1

4.7UF_10V_0805

2 2

3 3

W=40Mil

12

12

C615

.1UF_16V_0402_Y5V

5VAUD_GATE

MOD_AUDIO_MON<26>

CDROM_L<29>
CDROM_R<29>

MD_SPK<26>

MONO_IN<31>

MONO_IN

47K_0402

C620

R70 1K_0402

1 2

R494

U31
4

VIN

SENSE

DELAY
ERROR CNOISE
ON/OFF#

SI9182DH-AD

VOUT

GND

2
7 1
8

SI9182 250mA

SI9182 350mA

MDSPK

12

12

R437 68K_1%

12

R436 68K_1%

12

R435 68K_1%

12

R438 68K_1%

12

R456 @1K_0402

12

R457 1K_0402

12

C581

R493

4.7K_0402
2700PF_50V_0603

1 2

C590

2200PF_50V_0603

5
6

3

.47UF_0603_X7R

12

C600

.1UF_16V_0402_Y5V

C592

12

.1UF_16V_0402_Y5V

CD_L_R
CD_R_R

CD_GNA

MDSPK

12

12

.1UF_16V_0402_Y5V

MICIN<31>

C589

R506 ONLY FOR 14.318MHz

CD_GNA

CD_AGND<21>

12

R76 68K_1%

12

R75

68K_1%

4.86V

+5V_AMP

R485

12

86.6K_1%

R484

28.7K_1%

1 2

C628

1 2

VDDA

HB-1M2012-601JT

12

C645

1 2

C586 1UF_25V_0805_Y5V

1 2

C585 1UF_25V_0805_Y5V

1 2

C579 2.2UF_16V_0805

1 2

1 2

C587 1UF_25V_0805_Y5V

1 2

C591 1UF_25V_0805_Y5V

AC97_RST#<18,26>

IAC_SYNC<18,26>

IAC_SDATAO<18,19,26>

R505 @1K_0402
R506 1K_0402

C662

12

4.7UF_10V_0805

U32

CD_L_IN
CD_R_IN
CD_G_IN

.1UF_16V_0402_Y5V

12
12

ALC202

12

C621

4.7UF_10V_0805

.1UF_16V_0402_Y5V

AVDD_AC97

L47

25

AVCC

14

AUX_L

15

AUX_R

16

VIDEO_L

17

VIDEO_R

23

LIN_IN_L

24

LIN_IN_R

18

CD_L

20

CD_R

19

CD_GNA

21

MIC1

22

MIC2

13

PHONE

12

PC_BEEP

11

RESET#

10

SYNC

5

SDATA_OUT

45

ID0#

46

ID1#

47

EAPD#

48

S/PDIF_OUT

4

GND

7

GND

1 2

12

C601

MAX 80mA

38

AVCC

LINE_OUT_R

BPCFG_00/NC_50

FLTI_00/NC_50

FLTO_00/NC_50
NC_00/GPIO0_50
NC_00/GPIO1_50

NC_00/HP_COMM_50

R477

100_0805

1

VCC

LINE_OUT_L

MONO_OUT

HP_OUT_L
HP_OUT_R

BIT_CLK

SDATA_IN

XTL_IN

XTL_OUT

AFLT1
AFLT2

VREFOUT

REFFLT

FLT3D

AGND
AGND

5VAUD_GATE

Q57

13

2N7002

2

VDDC

.1UF_16V_0402_Y5V

9

VCC

35
36
37
39

C646 @1000PF_0402

41

C647 @1000PF_0402
6
8
2

3
29
30
28
27
32

31
33
34
43
44

40
26
42

12

LINEL
LINER

MDMIC
1 2
1 2

1 2

R470 22_0402

1 2

R468 47_0402

VREFOUT

Q58
SI2306DS

D

1 3

2

R511

12

47K_0402

C652
1UF_10V_0603_X5R

12

C651
1UF_10V_0603_X5R

12

C624

.1UF_16V_0402_Y5V

.1UF_16V_0402_Y5V

S

W=40mils

G

1 2

C653 .1UF_16V_0402_Y5V

LEFT <31>
RIGHT <31>

1 2

R480 0_0402

12

C608

SI2306DS: N CHANNEL
VGS: -4.5V, RDS: 0.094OHM
Id(MAX): 2.8A
VGS(MAX): +-20V

@.1UF_0402_X5R

CLK_14M_SIO <15,32>

short the digital ground and analong ground

12

C596

4.7UF_10V_0805

VDDA

12

12

C672

C683
@4.7UF_10V_0805

4 4

A

ID0# ID1#

1 1
1 0
0 1
0 0

B

14.318 OPEN
27MHZ
48MHZ

24.576MHZ

C

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

D

E

F

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

ACT10

G

AC97 CODEC

30 45Thursday, May 30, 2002

of

H

1.0A

A

B

C

D

E

+5V_AMP

MAX 20mA

12

R434
100K_0402

1

3

C582

1 2

2.2UF_16V_0805
C583

1 2

12

2.2UF_16V_0805

R428
@10K_0402

12

R444

12

100K_0402

+3VS

+5V POWER

.1UF_16V_0402_Y5V

12

R440

12

R544
100K_0402

R517

1 2

PCM_SPK#<23>

17

15

4

5

100K_0402

10K_0402

C666

RIGHT

RIGHT<30>

1 1

LEFT

LEFT<30>

R426

@10K_0402

HPS

MUTE<33>

2 2

3 3

MUTE

BEEP#<33>

+5VALW

5
2 4

U65
74AHCT1G125GW

RLINEIN

LLINEIN

HPS

MODE

12

1
2
3

8

VDD2

GND2

GND1 VDD1

1 3

U36

NC
A
GND

TC7SH14

+3V POWER

18

13

VDD3

R_UP/DOWN#

L_UP/DOWN#

GND3

201110

VDD4

ROUT+

ROUT-

LOUT+

LOUT-

GAINSEL

GND4

TDA8552TS

VCC

Y

C598
.1UF_16V_0402_Y5V
1 2

U33

12

19

2

9

6

7

14

16

SVR

.1UF_0402_X5R

+3VS

.1UF_16V_0402_Y5V

5

1 2

4

R510

1 2

2K_0402

R538

2K_0402

C575

C675

1 2

1UF_25V_0805_Y5V

C661

1 2

1UF_25V_0805_Y5V

C605

.1UF_16V_0402_Y5V

1 2

SPK_RIGHT+

INTSPK_R-

SPK_LEFT+

R449

2.2K_0402

C576

2.2UF_16V_0805

C684

1 2

12

GAIN_SEL#

+5VS

12

R501
100K_0402

<34>

2N7002

12

R624
@10K_0402

2

+

C613

10UF_16V_1206

DIS_ADJVOL#

Q52

VDDA

12

INTSPK_L-

13

D

S

R516
100K_0402

1

Q62

3

2SC2411EK

+

C614

10UF_16V_1206

Q76

2N7002

1 3

D

R458

1 2

100K_0402

2

G

C648

1 2

@.1UF_0402_X5R

C635

1 2

1UF_25V_0805_Y5V

2

G

S

1

3

+5V_AMP

HPS

MONO_IN

1 3

+5VALW

U34

5
24

74AHCT1G125GW

D

MUTE

G

2

S

G

2

D

1 3

S

Q77
2N7002

ADJVOL_UP/DN# <34>

C660

1UF_10V_0603_X5R

1 2

MONO_IN <30>

Q75

2N7002

INTSPK_R+

INTSPK_L+

C758
.1UF_0402_X5R

VDDA

R524

100K_0402

R520

100K_0402

R647

1 2

100K_0402

INTSPK_R+ <36>

INTSPK_R- <36>

MICIN<30>

12

12

+12VALW

@2K_0402

INT_MIC

12

C668

.22UF_10V_0603_X7R

C676

.1UF_16V_0402_Y5V

U61B

84

TDA1308

5

+

7

6

-

C759

.1UF_16V_0402_Y5V

close
U61 pin3

C259
220UF_10V_D

INTSPK_R+ PR_RIGHT

R533

1 2

+

1 2

+

1 2

C258
220UF_10V_D

12

2K_0402

1 2

1 2

PR_LEFTINTSPK_L+

R537

3
2

1 2

10K_0402

Speaker Connector

12

12

R532

2K_0402

VDDA

U61A

84

TDA1308

+

1

-

C669

220PF_50V_0402_NPO

12

R519

47K_0402

R528

1 2

R514

2K_0402

C678

1UF_10V_0603_X5R

+

HPS

R625

10_1%_0603

1 2
1 2

R626

10_1%_0603

INTSPK_L+

INTSPK_L-

L51

BLM11A121S

1 2
1 2

L50

BLM11A121S

INT_MIC+

12

R530

2K_0402

1 2

C637
10UF_16V_1206

L49 BLM11A121S
L48 BLM11A121S

47PF_0402_NPO

VDDA

1 2

R546 1K_0402

C691

47PF_0402_NPO

R531

1 2

0_0402

C694

47PF_0402_NPO

1 2
1 2

C692

12

1

1

12

47PF_0402_NPO

1 2

NOTE

+5V_AMP

12

JP23

1

SPEAKER CLIP

JP24

1

SPEAKER CLIP

1 2

C685 .1UF_16V_0402_Y5V

EXTMIC

12

C687

INT_MIC

R529

@0_0402

R547
0_0402

1

R548
0_0402

CLOSE U61

R545
820K_0603

PR
PL

12

C690
47PF_0402_NPO

EXT. MIC

JP12

5
4
3

6
2
1

MIC+
MIC-

JP13

5
4
3

6
2
1

JA6033L-1S1

JA6033L-1S1

2
1

MIC1

LINE OUT

4 4

A

SB_SPKR<18,19>

1 2

R500

2K_0402

C633

1 2

1UF_25V_0805_Y5V

R509

@10K_0402

B

12

D30
1SS355

2 1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

AMP & Audio Jack

ACT10

31 45Thursday, May 30, 2002

E

1.0A

of

5

4

3

2

1

Fiduial Mark

FD1

1

FIDUCIALMARK

FD6

D D

1

FIDUCIALMARK

FD3

1

FIDUCIALMARK

FD5

1

FIDUCIALMARK

FD2

1

FIDUCIALMARK

FD4

1

FIDUCIALMARK

Screw Hole

H20

O188X72D148X32

1

H21

O188X72D148X32

1

H26

O188X72D148X32

1

H27

O188X72D148X32

1

For HDD Case

H1

S354D118

C C

B B

A A

S354D118

1

H5

H4

S315D118

S315D118

1

H13

S315D118

1

H11

S315D173

1

H24

S354D173

1

H19

S335D118

1

H30

S217X146D197X126

1

1

1

H7

S315D173

1

H10

S217X146D197X126

1

5

S315D118

S315D118

S276D142X173

S354D122

S354D118

1

H22

1

H25

1

H16

1

H28

1

S315D118

H9

S315D173

1

H12

S354D118

1

H23

1

H6

S315D173

1

CF2

1

SMDC40M80

CF9

1

SMDC40M80

CF10

1

SMDC40M80

CF1

1

SMDC40M80

CF18

1

SMDC40M80

S354D169

H8

H2

H17

S354D118

1

H14
S315D118

1

H3

1

H31

S354D118

H29

S315D118

4.4
Skew

CF4

1

SMDC40M80

CF12

1

SMDC40M80

CF14

1

SMDC40M80

CF3

1

SMDC40M80

CF16

1

SMDC40M80

1

1

CF5

1

SMDC40M80

CF13

1

SMDC40M80

CF11

1

SMDC40M80

CF7

1

SMDC40M80

CF20

1

SMDC40M80

+3VALW

12

R388

2.15K_1%_0603

12

R389
0_0402

12

R40
Thermistor_0805_10K

SL210020F00

The temperature sensing for
SIS650

CF6

1

SMDC40M80

CF17

1

SMDC40M80

CF15

1

SMDC40M80

CF8

1

SMDC40M80

CF19

1

SMDC40M80

4

TEMP_650 <33>

+5VS

WDATA#
WGATE#
HDSEL#
DIR#

1
2
3
4
5

1K_1206_10P8R

DISKCHG#

4 5

INDEX#

3 6

WRPRT#

2 7

TRK0#

1 8

LPD0
LPD1
LPD2
LPD3
LPD4
LPD5
LPD6
LPD7

+5VS

TXDA DCDA#
CTSA#
DTRA#
RIA#

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

RP135

RP136

8P4R_1K

+5VS

12

12

CLK_PCI_SIO<15>

LFRAME#<18,33>

10
9
8
7
6

R157
@10_0402

C218
@10PF_0402

JP26

12

LAD0<18,33>
LAD1<18,33>
LAD2<18,33>
LAD3<18,33>

LPC_RST#<34>

LDRQ#<18>

STEP#
MTR0#
DRV0#
RDATA#

12
34
56
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26

27 28
29 30

ACES 87153-2601

C189
.1UF_0402_X5R

3

+5VS

CLK_14M_SIOCLK_PCI_SIO

12

R158
@10_0402

12

C217
@10PF_0402

IO_PD#

IO_CLKRUN#

DISKCHG#<21>

HDSEL#<21>
RDATA#<21>

WRPRT#<21>

TRK0#<21>

WGATE#<21>

WDATA#<21>

STEP#<21>

DRV0#<21>

MTR0#<21>

INDEX#<21>

1.6M_EN#<21>

XCNF2

+3VS

LPTSLCT
LPTPE
LPTBUSY
LPTACK#
LPTSLCTIN#
LPTINIT#
LPTERR#
LPTAFD#
LPTSTB#

DSRA#
RXDA
RTSA#

+5VS+5VS

12

C191
.1UF_0402_X5R

SIRQ<18,23,33>

CLK_14M_SIO<15,30>

DIR#<21>

R636 100K_0402

+3VS

R633

10K_0402

RP137
1 8
2 7
3 6
4 5

8P4R_100K

10K_0402

DISKCHG#
HDSEL#
RDATA#
WRPRT#
TRK0#
WGATE#
WDATA#
STEP#
DIR#
DRV0#
MTR0#
INDEX#

1.6M_EN#

12

R634

U70

15

LAD0

16

LAD1

17

LAD2

18

LAD3

8

LCLK

9

LRESET#

12

LFRAME#

11

LDRQ#

7

LPCPD#

6

CLKRUN#

10

SERIRQ

19

SMI#

20

CLKIN

21

DSKCHG#

22

HDSEL#

23

RDATA#

24

WP#

25

TRK0#

26

WGATE#

27

WDATA#

28

STEP#

29

DIR#

30

DR0#

31

MTR0#

32

INDEX#

33

DENSEL

34

DRATE0/IRSL2

95

NC

94

NC

93

NC

92

NC

91

NC

90

NC/XCNF2

87

NC

86

NC

85

NC

84

MTR1#

83

NC

82

NC

81

RI2#

80

DTR2#_BOUT2

79

CTS2#

78

SOUT2

77

RTS2#

76

SIN2

75

DSR2#

74

DCD2#

PC87391_TQFP_100P

+3VS

143963

VDD

VDD

VDD

PC87391

VSS

VSS

VSS

133864

Signal Description

BADDR:
DTRA#

2

C752

10UF_10V_1206

88

VDD

PD4/DSKCHG#

SLCT/WGATE#

BUSY_WAIT#/MTR1#

SLIN#_ASTRB#/STEP#

ERR#/HDSEL#

AFD#_DSTRB#/DENSEL

STB#_WRITE#

SOUT1/XCNF0

DTR1#_BOUT1/BADDR

IRRX2_IRSL0

IRSL3/PWUREQ#

MTR1#/DRATE0

VSS

89

TXDA

XCNF1

XCNF2 XCNF2

Pin #

61

Title

Size Document Number Rev

ACT10

Date: Sheet

+3VS

12

12

+

C753

.1UF_16V_0402_Y5V

LPD0

52

PD0/INDEX#

PD1/TRK0#

PD2/WP#

PD3/RDATA#

PD5/MSEN0

PD6/DRATE0

PD7/MSEN1

PNF/XRDY

PE/WDATA#

ACK#/DR1#

INIT#/DIR#

DCD1#
DSR1#

SIN1

RTS1#/TEST

CTS1#

RI1#

IRTX

IRRX1

IRSL1

NC/XCNF1

WDO#

IRSL2/DR1#

DR1#

R637

@10K_0402

R639

@10K_0402
R641

@10K_0402
R643

@10K_0402

NC
NC
NC
NC
NC
NC
NC
NC

50
48
46
45
44
43
42

R635 100K_0402

35
36
37
40
41
47
49
51
53
54

55
56
57
58
59
60
61
62

70
69
68
67
66

3
2
1
100
99
98
97
96

4
5
73
71
72

TXDA

XCNF1

DTRA#DTRA#

LPD1
LPD2
LPD3
LPD4
LPD5
LPD6
LPD7

LPTSLCT
LPTPE
LPTBUSY
LPTACK#
LPTSLCTIN#
LPTINIT#
LPTERR#
LPTAFD#
LPTSTB#

DCDA#
DSRA#
RXDA
RTSA#
TXDA
CTSA#
DTRA#
RIA#

IRTXOUT
IRRX
IRMODE

XCNF1

BASE Address Selection

"0": 2E~2F (Default)
"1": 4E~4F

Compal Electronics, Inc.

Skew Hole/SUPER IO

1

12
C190

.1UF_0402_X5R

12

R638

@10K_0402

R640

@10K_0402
R642

@10K_0402

R644

@10K_0402

32 45Thursday, May 30, 2002

+3VS

IRTXOUT <36>
IRRX <36>
IRMODE <36>

+3VS

of

1.0A

A

+3VALW

C570

22UF_10V_1206

+3VALW

MURATABLM11P600S

1 1

2 2

3 3

4 4

+3VALW

FSEL#
SELIO#
FRD#
EC_SMI#

10PF_0402_NPO

BT_WAKE_UP

BT_PRES#

R214

3.3K_0402

FWE#

PS2_DATA
PS2_CLK

RP65
1 8
2 7
3 6
4 5

8P4R_10K

C667

+3VALW

C551 .1UF_0402_X5R

12
C574

+

.1UF_0402_X5R

L45

1 2

.1UF_0402_X5R

L46

1 2

MURATABLM11P600S

KBD_DATA
KBD_CLK
PS2_DATA
PS2_CLK

ADB[0..7]
KBA[0..18]

+5VS

R464 100K_0402

R627 @100K_0402
R628 @100K_0402

12

1 2

RP133

10

9
8
7
6

10P8R_10K

12

12
12

+3VALW +5VALW

R504 20M_0603

1 2

32.768KHZ_CM155
X7

100K_0402

12

R182

12

100K_0402

R192

U49A

3

74VHC32

A

12

EC_AVCC
C565

1 2

ECAGND

EC_RST#<35>

LID_SW#

GA20
KBRST#

EC_SMB_DA2
EC_SMB_CK2
EC_SMB_DA1
EC_SMB_CK1

R515

120K_0402

12

C641

10PF_0402_NPO

+3VALW

RSMRST#<9,18,35>

+3VALW

12

12

1
2
3
4
5

R217

100K_0402

14
1

2
7

12

C639
1000PF_0402_X7R

C564
1000PF_0402_X7R

KBD_DATA <34>
KBD_CLK <34>
PS2_DATA <34>
PS2_CLK <34>

ADB[0..7] <34>
KBA[0..18] <34>

KBD_DATA
KBD_CLK
TP_DATA
TP_CLK

1 8
2 7
3 6
4 5

CRY2

M_SEN#<16,20>

+3VALW

1 2

FWR#

EC_AVCC

+5VS

RP66

8P4R_10K

CRY1

H: DAUL L: SINGAL

R556

@0_0402

1 2

2

G

1 3

D

S

12

R190

100K_0402

Q20

2N7002

+3VALW

+3VS

+3VALW

KSO[0..15]<35>

G_RST#<24>

DIS_LAN#<22>

EC_FLASH# <18>

SIRQ<18,23,32>

LFRAME#<18,32>

LAD0<18,32>
LAD1<18,32>
LAD2<18,32>
LAD3<18,32>

CLK_PCI_LPC<15>

KSI[0..7]<35>

CLK_PCI_LPC
12

R95
@10_0402

12

C130
@10PF_0402

just pull high

LID_SW#<27>

USER_BTN2<36>

EC_SMI#<18>

PANEL_SEL<16>

VGA_SUSP#<16>

SUSP#<23,37,39>

ENBLT<16>

PROCHOT#<4>

+5VS

SCI#<18>

TP_CLK<36>

TP_DATA<36>

SWI#<18>

SYSON<37,39>

VR_ON<43>

BKOFF#<16>

1 2

1 2

B

R463 0_0402

R467 @0_0402

C606

22UF_10V_1206

KSI[0..7]
KSO[0..15]

B

+

CLK_LPC_EC

SCI#

GA20
KBRST#

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

EC_TIN IT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

KBD_CLK
KBD_DATA
PS2_CLK
PS2_DATA
TP_CLK
TP_DATA
LID_SW#

CRY1
CRY2

EC_SMI#

12

R390 0_0402

SUSP#

1 2

R630 @0_0402

FSEL#

C

122

123

VCC2

GND4

159

136

VCC3

VCC4

GND5

GND6

167

157

166

VCC5

VCC6

PORTB

PORTD-1

PORTE

GND7

137

EC_AVCC

95

AVCC

AD Input

DA output

IOPA0/PWM0
IOPA1/PWM1

PWM
or
PORTA

IOPB7/RING/PFAIL/LRESET2

PORTC

IOPD2/EXWINT24/LRESET2

PORTH

PORTJ-1

PORTD-2

PORTK

PORTL

AGND

96

ECAGND

IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7

IOPB0/URXD
IOPB1/UTXD

IOPB2/USCLK

IOPB3/SCL1
IOPB4/SDA1

IOPC1/SCL2

IOPC2/SDA2
IOPC4/TB1/EXWINT22
IOPC6/TB2/EXWINT23

IOPC7/CLKOUT

IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21

IOPE4/SWIN

IOPE5/EXWINT40

IOPE6/LPCPD/EXWIN45

IOPE7/CLKRUN/EXWINT46

IOPH0/A0/ENV0

IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1

IOPH4/A4/TRIS

IOPH5/A5/SHBM

PORTI

IOPK5/A13/BE0

IOPK6/A14/BE1

IOPK7/A15/CBRD

NC2

NC3

NC4

NC5

NC1

122021858691929798

11

C

EC_3VDD

12

C607
.1UF_0402_X5R

7
8

9
15
14
13
10
18
19
22
23

31

5

6

KSI0

71

KSI1

72

KSI2

73

KSI3

74

KSI

4

77

KSI5

78

KSI6

79

KSI7

80
49

50
51
52
53
56
57
58
59
60
61
64
65
66
67
68

105
106
107
108
109

110
111
114
115
116
117
118
119

158
160

62
63
69
70
75
76 143

148
149
155
156

3

4
27
28

173
174

47

SERIRQ
LDRQ
LFRAME
LAD0
LAD1
LAD2
LAD3
LCLK
LREST1
SMI
PWUREQ

IOPD3/ECSCI

GA20/IOPB5
KBRST/IOPB6

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15

TINT
TCK
TDO
TDI
TMS

PSCLK1/IOPF0
PSDAT1/IOPF1
PSCLK2/IOPF2
PSDAT2/IOPF3
PSCLK3/IOPF4
PSDAT3/IOPF5
PSCLK4/IOPF6
PSDAT4/IOPF7

32KX1/32KCLKOUT
32KX2

IOPJ2/BST0
IOPJ3/BST1
IOPJ4/BST2
IOPJ5/PFS
IOPJ6/PLI
IOPJ7/BRKL_RSTO

IOPM0/D8
IOPM1/D9
IOPM2/D10
IOPM3/D11
IOPM4/D12
IOPM5/D13
IOPM6/D14
IOPM7/D15

SEL0
SEL1
CLK

PC87591VPC

163445

VDD

VCC1

Host interface

Key matrix scan

JTAG debug port

PS2 interface

PORTJ-2

PORTM

GND1

GND2

GND3

173546

161

VBAT

AD0
AD1
AD2
AD3

IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7

DP/AD8
DN/AD9

DA0
DA1
DA2
DA3

IOPC0

IOPC3/TA1
IOPC5/TA2

IOPH6/A6
IOPH7/A7

IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7

IOPJ0/RD

IOPJ1/WR0

SELIO
IOPD4

IOPD5
IOPD6
IOPD7

IOPK0/A8

IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12

IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19

IOPL4/WR1

NC6

NC7

NC8

NC9

U38

NC10

+RTCVCC

C644
1UF_10V_0603_X5R

1 2

BATT_TEMP

81
82
83

TEMP_650

84
87
88
89
90
93
94

99
100
101
102

32
33
36
37
38
39

BT_PRES#

40

BT_WAKE_UP

43

BD_ID0

153

BD_ID1

154

BD_ID2

162

EC_SMB_CK1

163

EC_SMB_DA1

164

B_PCIRST#

165
168

EC_SMB_CK2

169

EC_SMB_DA2

170
171
172
175
176

PC7

1

ACIN

26
29
30

2
44
24
25

124
125
126
127
128
131
132
133

138
139
140
141
144
145
146
147

150
151

152
41

42
54
55

142
135
134
130
129
121
120

113
112
104
103
48

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

LPCPD#

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

FRD#
FWR#

SELIO#

USER_BTN1 <36>

KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15

KBA16
KBA17
KBA18

FSTCHG <40>

D

C573 .01UF_25V_0402_X7R

TEMP_650 ECAGND

C572 .01UF_25V_0402_X7R

BATT_TEMP

BATT_TEMP <42>

BATT_ OVP <40>

TEMP_650 <32>

VOL_DOWN# <34,36>
VOL_UP# <34,36>
RF_OFF# <36>

DAC_BRIG <16>
EC_EN_FAN <6>
IREF <40>
EC_PCIRST# <17,18>

INVT_PWM <16>
BEEP# <31>
WIRELESS_OFF# <26>
ACOFF <40>
VLBA# <18>
EC_ON <35>
BT_PRES# <27>
BT_WAKE_UP <27>

EC_SMB_CK1 <34,42>
EC_SMB_DA1 <34,42>
B_PCIRST# <4,16,17,28,29,34>

PWRBTN_OUT# <18>
EC_SMB_CK2 <4,6,16,29>
EC_SMB_DA2 <4,6,16,29>
FAN1_TACH <6>
CD_ON/OFF# <35>
MUTE <31>
PCI_PME# <22,23,25,26,34>
PC7 <35>

ACIN <38>
RING# <36>
SLP_S3# <8>

ON/OFF# <35>
SLP_S5# <8>

PM_CLKRUN# <20,23,25,26>

SELIO# <34>
SCROLLED# <36>

NUMLED# <36>
CAPSLED# <36>

BD_ID0
BD_ID1

BD_ID2

+5VALW

EC_TIN IT#

EC_TCK
EC_TDO
EC_TDI
EC_TMS

D

ALI/MH# <42>

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17

FSEL#
FRD#
FWE#

JP22

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

1 2

1 2

BADDR1-0

*

Index Data
00
01
10
11

4E 4F

(HCFGBAH, HCFGBAL)(HCFGBAH, HCFGBAL)+1

IRE
OBD
DEV
PROG

SHBM=1: Enable shared memory with host BIOS
TRIS=1: While in IRE and OBD, float all the

signals for clip-on ISE use

KBA1

(ENV1)

KBA2

(BADDR0)

KBA3

(BADDR1)

KBA5

(SHBM)

R569

12

@33_0402

D0
D1
D2
D3
D4
D5
D6
D7

VPP

VCC

GND

100K_0402

R571

@100K_0402

R573

@100K_0402

B_PCIRST#

13
14
15
17
18
19
20
21

1

32

16

10UF_10V_1206

+3VALW

12

C578

R433

.1UF_0402_X5R

U40
29F040/SST39VF040

12

A0

11

A1

10

A2

9

A3

8

A4

7

A5

6

A6

5

A7

27

A8

26

A9

23

A10

25

A11

4

A12

28

A13

29

A14

3

A15

2

A16

30

A17

22

CE#

24

OE#

31

WE#

For EC debug

Compal Electronics, Ltd.

Title

EC PC87591/BIOS

Size Document Number Rev
Custom

@96212-1011S

ACT10

Date: Sheet

E

I/O Address

2F2E

Reserved

ENV0 ENV1

00
0011

TRIS

0
0
0

11

BD_ID0

12

BD_ID1

12

BD_ID2

12

BOARD ID 000 --> 001
VERSION 0.2

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

KBA18

0

R570

@100K_0402

R572

100K_0402

R574

100K_0402

12

+

C550

E

+3VALW

R19710K_0402

R19310K_0402

R191@10K_0402

R18310K_0402

12

12

12

+3VALW

C215

@.1UF_16V_0402_Y5V
1 2

33 45Thursday, May 30, 2002

12

of

R386
0_0603

+3VBIOS

1.0A

A

ADB[0..7]<33>

KBA[0..18]<33>

ADB[0..7]
KBA[0..18]

Input Port

1 1

1394_PME#<22,23,25,26,33>

PCM_PME#<22,23,25,26,33>

MDM_PME#<22,23,25,26,33>

ONBD_LAN_PME#<22,23,25,26,33>

+3VALW

1 2

B

R208

100K_0402

C

JP25

@KBD/PS2_6

563

D

+5VS

40mil

4
2
1

40mil

PS2_CLK

PS2_DATA
KBD_DATA

KBD_CLK

E

PS2_CLK <33>
PS2_DATA <33>

KBD_DATA <33>

KBD_CLK <33>

FOR DEBUG USE

Output Port

+5VALW

3

D0

4 5

D1 Q1

7 6

D2 Q2

8 9

D3 Q3

13 12

D4 Q4

14 15

D5 Q5

17 16

D6 Q6

18 19

D7 Q7

11

CLK

1

CLR

+5VALW

1 2

20

U44

3

Q0

D0

4 5

D1 Q1

VCC

7 6

D2 Q2

8 9

D3 Q3

13 12

D4 Q4

14 15

D5 Q5

17 16

D6 Q6

18 19

D7 Q7

11

CLK

1

CLR

GND

74HCT273

10

R575

1 2

100K_0402

RP63
1 8
2 7
3 6
4 5

8P4R_100K

C243

1 2

.1UF_16V_0402_Y5V

20

U42

2

Q0

VCC

GND

74HCT273

10

C253

.1UF_16V_0402_Y5V

2

+3VALW

PWR_LED# <36>
CHARGE_LED# <36>
BATTLOW_LED# <36>
CD_PLAY <29>
CD_PLAY_LED# <29,36>
WIRELESS_LED# <36>
DIS_ADJVOL# <31>
ADJVOL_UP/DN# <31>

LID_OUT# <18>
EC_THRM# <18>
EC_PWROFF <6>
EC_WAKEUP# <18>
CRT_ON# <16>
BT_DETACH <27>
BT_RST# <27>
BT_ON# <27>

LED

1
2
3
4

+5VALW

12

R462
100K_0402

PCI_PME#

PCI_PME# <22,23,25,26,33>

ADB0

C250

1 2

.1UF_16V_0402_Y5V

KBA2
SELIO# LARST#

+5VALW

U49C

74VHC32

14

9

10

7

1 2

R184 20K_0402

+3VALW

ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

AA

8

C244

1 2

1UF_25V_0805_Y5V

MINI_LAN_PME#<22,23,25,26,33>

CAN USE WIRE AND

2 2

NM24C164 Address definition: 1 A2 A1# A0 B2 B1 B0 R/W#

+5VALW

1 2

C252

.1UF_16V_0402_Y5V

EC_SMB_CK1<33,42>
EC_SMB_DA1<33,42>

8
7
6
5

U45

VCC
WC
SCL
SDA

NM24C16

GND

A0
A1
A2

EC I2C Bus Address:

24C164: 1011xxx R/W#
24C16: 1010xxx R/W#

SELIO#

+3VALW

14

4
5

7

U49B

74VHC32

3 3

+5VS

RP134

PID0

1 8

PID1

2 7

PID2

3 6

PID3

4 5

8P4R_100K

KBA1
SELIO#

4 4

14
12

13

7

+3VALW

PLAYBTN#<29,36>
STOPBTN#<29,36>

FRDBTN#<29,36>

REVBTN#<29,36>

U49D

74VHC32

PID0

PID0<16>

PID1

PID1<16>

PID2

PID2<16>

PID3

PID3<16>

EE

11

+5VALW

1 2

.1UF_16V_0402_Y5V

20

1A1 1Y1

VCC

1A2 1Y2
1A3 1Y3
1A4 1Y4
2A1 2Y1
2A2 2Y2
2A3 2Y3
2A4 2Y4

1G
2G

GND

10

+3VALW+3VALW

U47

74HCT244

2 18
4 16
6 14

8 12
11 9
13 7
15 5
17 3

1
19

C245

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

KBA4

SELIO#<33>

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

BB

6

LARST#

VOL_DOWN#<33,36>

VOL_UP#<33,36>

AA
BB
EE

100K_0402

1 2

A

R629

9 8

7 14

B_PCIRST#<4,16,17,28,29,33>

U29D
74LVC14

1 2

R215 0_0402

12

5 6

C256

@.1UF_16V_0402_Y5V

7 14

B

U29C
74LVC14

LPC_RST#

LPC_RST# <32>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

EC Extend I/O KB Conn. & BIOS

ACT10

34 45Thursday, May 30, 2002

E

1.0A

of

A

Power ON Circuit RTC Battery

+3VALW

+3VALW +3VALW

12

R218
150K_0603

R498

12

1 1

2 2

1M_0402

13 12

12

C257

.1UF_16V_0402_Y5V

VGATE<43>

+3V

7 14

12

R411
10K_0402

VGATE

74LVC14

U29F

11 10

1

5
2 4

U50

3

74AHCT1G125GW

+3VS

7 14

12

R135
@10K_0402

U29E
74LVC14

1 2

R447

12

20K_0402

1UF_10V_0805_X5R
1 2

R216
10K_0402

C609

B

RSMRST# <9,18,33>

147

74LVC14
U29A

1 2

+3VS

12

R136
10K_0402

+3VALW+3VALW+3VALW

3 4

U29B
74LVC14

7 14

C

BATT1

-+

RTCBATT

ITP_PWROK <6>

+RTCVCC

RTCPWR

12

1

2

3

PH_BAS4004

D

Q68

@2N7002

CD_PLAY_SW#<36>

ON/OFFBTN#

EC_ON

13

D

S

+3VALW

2

G

12

R414

4.7K_0402

1 2
R413
33K_0402

ON/OFFBTN#<36>

D21

CHGRTC

EC_ON<33>

D1

3

DAN202U

RB751V

RB751V

22K

2

22K

Q1
DTC124EK

D16

D15

21

21

+3VALW

1
2

12

R479
100K_0402

ON/OFF

13

Power BTN

12

C228

1000PF_0402_X7R

+3VALW

12

R176
100K_0402

ON/OFF# <33>
51ON# <38>

WHEN R=0,Vbe=1.35V
WHEN R=33K,Vbe=0.8V

D8

12

RLZ20A

CD_ON/OFF# <33>

E

R134

@10K_0402

+CPU_CORE

3 3

KSO[0..15]<33>

KSI[0..7]<33>

1 2

KSO[0..15]
KSI[0..7]

C182

@100PF_0402_NPO

1 2

INT_KBD CONN.

4 4

A

1

Q18

2

3

@3904

KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15

JP14

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

ACES85203-2502

Q36

1

2

3

@3904

KSI1

26

26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50

KSI7

27

KSI6

28

KSO9

29

KSI4

30

KSI5

31

KSO0

32

KSI2

33

KSI3

34

KSO5

35

KSO1

36

KSI0

37

KSO2

38

KSO4

39

KSO7

40

KSO8

41

KSO6

42

KSO3

43

KSO12

44

KSO13

45

KSO14

46

KSO11

47

KSO10

48

KSO15

49
50

B

CK408_PWRGD# <15>

KSI1

1 8

KSI7

2 7

KSI6

3 6

KSO9

4 5

KSI4

1 8

KSI5

2 7

KSO0

3 6

KSI2

4 5

KSI3

1 8

KSO5

2 7

KSO1

3 6

KSI0

4 5

KSO2

1 8

KSO4

2 7

KSO7

3 6

KSO8

4 5

KSO6

1 8

KSO3

2 7

KSO12

3 6

KSO13

4 5

KSO14

1 8

KSO11

2 7

KSO10

3 6

KSO15

4 5

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

8P4C_100PF

CP6

8P4C_100PF
CP5

8P4C_100PF

CP4

8P4C_100PF
CP3

8P4C_100PF

CP2

8P4C_100PF
CP1

C

PC7<33>

FOR VERSION A ONLY

D

+3VALW

+3VALW

12

R450

12

10K_0402

R487
@10K_0402

13

D

2

G

S

Title

Power OK/Reset/RTC battery/Lid Switch/Int. KB

Size Document Number Rev

ACT10

Date: Sheet

EC_RST# <33>

Q56

@2N7002

Compal Electronics, Inc.

E

35 45Thursday, May 30, 2002

1.0A

of

5

LEDBLUE

LEDBLUE

D D

5.0 V LED LEVEL

C C

PWR_LED#<34>
CHARGE_LED#<34>
BATTLOW_LED#<34>
WIRELESS_LED#<34>
CD_PLAY_LED#<29,34>

VOL_UP#<33,34>

VOL_DOWN#<33,34>
PLAYBTN#<29,34>
STOPBTN#<29,34>
REVBTN#<29,34>
FRDBTN#<29,34>

CD_PLAY_SW#<35>

+5VALW

+5VS

TP_CLK<33>

TP_DATA<33>

INTSPK_R-<31>

INTSPK_R+<31>

LED

PWR_LED#
CHARGE_LED#
BATTLOW_LED#

WIRELESS_LED#

CD_PLAY_LED#

VOL_UP#

VOL_DOWN#

PLAYBTN#

STOPBTN#

REVBTN#

FRDBTN#

CD_PLAY_SW#

INTSPK_R­INTSPK_R+

TP_CLK
TP_DATA

LEDBLUE

LEDBLUE

GND

GND

10
11
12
13
14
15
16

GND GND

17
18
19
20
21
22
23
24
25

will change the pin definition after FPC finish by the M_E

SW1
MISAKI_TC020_PS11AET

2

B B

A A

4

5

SW4
HCH_PTO36-B2F

2
4

5

1
3

+3VALW

1
3

ON/OFFBTN# <35> USER_BTN1 <33>

12

C748
@.1UF_0402_X5R

12

R296
47K_0402

RF_OFF# <33>

12

C402
.01UF_25V_0402_X7R

D6

D4

D5

D3

JP15

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25

ACES85203-2502

4

R576

21

1 2

330_0805
R577

21

1 2

330_0805

R578

21

1 2

330_0805
R579

21

1 2

330_0805

GND

26

26

PWR_LED#

27

27

CHARGE_LED#

28

28

BATTLOW_LED#

29

29

WIRELESS_LED#

30

30

CD_PLAY_LED#

31

31

GND

32

32

VOL_UP#

33

33

VOL_DOWN#

34

34

PLAYBTN#

35

35

STOPBTN#

36

36

REVBTN#

37

37

FRDBTN#

38

38

CD_PLAY_SW#

39

39

40

40

41

41

42

42

43

43

44

44

TP_CLK

45

45

TP_DATA

46

46

47

47

48

48

49

49

50

50

SW2
MISAKI_TC020_PS11AET

2
4

5

SW3

MISAKI_TC020_PS11AET

2
4

5

LED_SCR#

LED_NUM#

LED_CAP#

LED_HDD#

CHECK BY TOUCH PAD

INTSPK_R­INTSPK_R+

1
3

1
3

+5VALW

+5VS

12

C178
.1UF_0402_X5R

+3VALW

+3VALW

DTA114YKA_SOT23

LED_SCR#

Q38

DTA114YKA_SOT23

LED_CAP#

12

R4
47K_0402

12

C2
.01UF_25V_0402_X7R

12

R6
47K_0402

12

C3
.01UF_25V_0402_X7R

3

+5VS

31

Q45

E

47K

10K

C

+5VS

31

E

47K

10K

C

USER_BTN2 <33>

+5VS

Q44

B

B

DTA114YKA_SOT23

SCR# NUM#

2

CAP#

2

C755

10UF_10V_1206

.1UF_16V_0402_Y5V

E

LED_NUM#

E

Q15

DTA114YKA_SOT23
LED_HDD#

+3VS

T = 20mil

12

+

12
C757

PCM_RI#<23>

MODEM_RI#<26>

31

47K

B

2

10K

C

+5VS

31

47K

B

2

HDD/CD LED

11

ACT_LED# <21>

10K

C

U66D

12
13

74HCT08

FIR Module

+

C756

22UF_10V_1206

T = 20mil

RING#<33>

U71

2

LED_C

4

RXD

6

VCC

8

GND

VISHAY_TFDU6101E_8P

+3VALW

D28

21

RB751V
D27

21

RB751V

Q50
CANCEL

2

12

R429
100K_0402

R645

5.6_1206_5%

LED_A

TXD

SD

MODE

1

+5VS

31

Q14

E

47K

B

2

U66A

74HCT08

U66B

74HCT08

U66C

74HCT08

SD/MS_LED# <28>

NUM#

3

SCR#

6

CAP#

8

10K

C

+5VS

14

1
2

7

4
5

9

10

12

LEDBLUE

NUMLED#<33>

SCROLLED#<33>

CAPSLED#<33>

+5VS

12

5.6_1206_5%

D2

R646

DTA114YKA_SOT23

R1

1 2

21

330_0805

12

+

C754

10UF_10V_1206

T = 20mil

1
3
5
7

T = 12mil
T = 12mil
T = 12mil

IRTXOUT
IRMODE
IRRX

IRTXOUT <32>
IRMODE <32>
IRRX <32>

Compal Electronics, Ltd.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

5

4

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

3

2

SW/LED/RI#/IR/CD BUTTOM

Size Document Number Rev
Custom

ACT10

Date: Sheet

36 45Thursday, May 30, 2002

1

of

1.0A

A

B

C

D

E

SYSON#

SUSP#

D

S

SUSP

12

R9
100_0402

13

Q7

2N7002

2

2

2

G

+12VALW

G

+12VALW

G

SUSP

12

13

D

S

12

13

D

S

+12V_SW

R536
47K_0402

Q22
2N7002

R5
10K_0402

Q3
2N7002

+12VALW

12

R535
100K_0402

12

13

D

2

G

Q67

C61

10UF_10V_1206

+12VALW

12

R255

13

2

G

Q35

S

C726

D

S

1M_0402

1M_0402

R527

.01UF_25V_0402_X7R

8
7
6
5

C66
10UF_10V_1206

12

R282

SYSON#

1 1

2 2

3 3

2N7002

10UF_10V_1206

100K_0402

SUSP

2N7002

+5VALWto +5V Transfer

+5VALW

12

C673

+5VALW

12

C643

4.7UF_16V_1206

+3VALW to +3V Transfer

U55

D
D
D
D

SI4800

+3V+3VALW

1

S

2

S

3

S

4

G

SUSON

+5VALW to +5VS Transfer

+5VALW

12

C309

.01UF_25V_0402_X7R

+5VALW

C345

4.7UF_16V_1206

U54

8

D

7

D

6

D

5

D

SI4800

SUSON

+

C80

22UF_10V_1206

U57

8

D

7

D

6

D

5

D

RUNON

12

1

S

2

S

3

S

4

G

+5VALW

+

C642

10UF_16V_1206

.1UF_16V_0402_Y5V

SI4800

1

S

2

S

3

S

4

G

.1UF_16V_0402_Y5V

+5VALW

12

C331

+

100UF_D_16V

+5V

12

C688

10UF_16V_1206

.1UF_16V_0402_Y5V

+

C665

22UF_10V_1206

C680

12

D

S

R526
470_0402

13

2

G

Q66
2N7002

SYSON#

SYSON<33,39>

+

1.8VALW/+1.5VS Power direct provide

SUSP#<23,33,39>

12

12

R58

C81

+5VS

470_0402

13

D

SYSON#

2

G

Q10

S

2N7002

12

D

S

R281
470_0402

Q34

13

@2N7002

SUSP

2

G

12

+

C326

22UF_10V_1206

C340

C264

10UF_6.3V_1206_X7R

U56

8
7
6
5

RUNON

SI2306DS

+1.8VS+1.8VALW

SI4800

S

D

S

D

S

D

G

D

2

Q74

+1.8VALW to +1.8VS Transfer

1
2
3

+

4

+2.5V

G

C116

22UF_10V_1206

RUNON

.1UF_16V_0402_Y5V

12

C261

.1UF_16V_0402_Y5V

+2.5V to +2.5VS Transfer

12

C511

13

D

.1UF_16V_0402_Y5V

S

+

22UF_10V_1206

+2.5VS

C520

12

+2.5VS

C284

D

S

12

R609
470_0402

13

12

13

D

S

Q72
2N7002

2

G

R233
470_0402

Q28
2N7002

2

G

SUSP

SUSP

FOR CD PLAYER 12V SW

12
C1

.1UF_16V_0402_Y5V

SUSP#

Q2

2

G

2N7002

12

R3
100K_0402

12

R2
51K_0402

13

D

S

+12VALW+12VALW

G

2

1 3

12

S

Q6

NDS352P

D

C7

4.7UF_25V_1206

+3VALW +3VS

U59

SI4800

8

S

D

7

S

D

6

S

D

5

G

+

+

4 4

C656

22UF_10V_1206

C657

22UF_10V_1206

A

D

C658

10UF_6.3V_1206_X7R

+3VALWto +3VS Transfer

1
2
3

+

4

C682

22UF_10V_1206

.1UF_16V_0402_Y5V

RUNON

12

12

R549
470_0402

C693

Q65

13

D

@2N7002

SUSP

2

G

S

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

B

C

D

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DC/DC Circuit Interface

ACT10

37 45Thursday, May 30, 2002

E

1.0A

of

A

Build 0 ohm for ACL10

PCN1

1

2

BATT+

CHGRTCP

51ON#<35>

1 2

PR22
200

PJP1

1 2

PAD-OPEN 3x3m

PJP3

2 1

PAD-OPEN 3x3m

PJP4

2 1

PAD-OPEN 3x3m

PJP5

2 1

PAD-OPEN 2x2m

PJP7

1 2

PAD-OPEN 3x3m
PJP8

1 2

PAD-OPEN 3x3m

1

2

2 1

RLZ6.2C

1 2

RTCVREF

+1.5VS

+1.8VALW

+12VALW

+5VALW

+3VALW

A

PD3
RB751V

PZD2

12

PR12
100K

PR14
22K

3.3V

PC13
10UF_1206_10V

12

PD1

EC10QS04

12

S-81233SG (SOT-89)

3

3

12

PC7

0.22UF_1206_25V

PU2

1

1

PC1

1000PF_50V

2

2

TP0610T

(6A,240mils ,Via NO.= 12)

(2A,80mils ,Via NO.= 4)

(3A,120mils ,Via NO.= 6)

(120mA,20mils ,Via NO.= 1)

(5A,200mils ,Via NO.= 10)

(5A,200mils ,Via NO.= 10)

1 1

3

3

2DC-S026B201 2.5D 5P

2 2

3 3

CHGRTC

+2.5VP +2.5V

+1.5VSP

+1.8VALWP

4 4

+12VALWP

+5VALWP

+3VALWP

CHC4532U800_1812

1 2

PC2

100PF_50V

PD2

RLS4148

PQ1

13

2

PR18
200_0805

PC12
1UF_0805_25V

PL1

VIN

21

PR10

33_1206

12

PC8

0.1UF_0805_25V

PZD4
RLZ16B

2 1

+1.25VSP

+1.2VPP

B

VIN

PC3

1000PF_50V

VS

PC4

100PF_50V

1000PF_50V

MAINPWON<4,41,42>

ACON<40>

PJP2

1 2

PAD-OPEN 3x3m

(3A,120mils ,Via NO.= 6)

PJP6

2 1

PAD-OPEN 2x2m

(300mA,40mils ,Via NO.= 2)

B

PC5

+1.25VS

+1.2VP

12

PR3

84.5K_1%

PR6
20K_1%

1
2

RB715F

C

PD5

VIN

12

12

VIN

1 2

PC6

0.1UF_50V

VS

3

PR5
22K

PD4
RLS4148

12

12

PR15
10K

1 2

PON

2 1

PZD3
RLZ6.2C

1 2

VS

3
2

PR8
10K

PR1
1M_1%

84

+

-

12

1 2

1 2

1 2

6.0V

PU1A

LM393M

1

RTCVREF

3.3V

PR9
1K_1206

PR11
1K_1206

PR13
1K_1206

12

7

PC10
1000PF

PU1B
LM393M

Precharge detector

15.34 15.90 16.48

13.13 13.71 14.20

THIS SHEET OF ENGINEERING DRAWINGIS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR
THE INFORMATIONIT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTYWITHOUT PRIORWRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.

C

+

-

PR16
1M_1%

5
6

D

VS

12

PR2

10K

12

PZD1
RLZ3.6B

12

1 2

PR7
10K

PACIN

PR4
1K

ACIN <33>

PACIN <40,41>

Vin Detector
High 18.764 17.901 17.063

Low 17.745 16.903 16.038

B+

12

12

PC11

0.1UF_16V

RTCVREF

3.3V

12

PR20

PR21

10K

215K_1%

1 2

13

D

PQ2
2N7002

S

PQ3

DTC115EUA

Title

Size Document Number Rev

B

Date: Sheet

12

PR17
499K_1%

12

PR19
499K_1%

2

G

13

100K

100K

PR23
47K

12

PC9
1000PF

12

2

COMPAL ELECTRONICS, INC

DCIN & DETECTOR

ACT10 1.0A

D

PACIN

+5VALWP

38 45Thursday, May 30, 2002

of

A

D

S

+5VALWP

12

PR87
0_1206

1 1

2.5VIN

12

PC67

10UF_1210_16V

PQ17
2SA1036K

PC68
2200PF

1 2

12

3
1

PD17
RB751V

1 2

PR92

1K

2

PQ16

HMBT2222A

2

12

PR91

1

10K

3

PU8A
LM393M

4 5

G

3

D

S

4 5

G

PQ15

3

SI3445DV

1

6

PQ14

2

@SI3445DV

1

PC71

0.1UF_50V

PC74
1000PF

12

PD18
RB051L-40

12

LX2.5

12

PR89
2M

12

0.1UF_16V

SPC-5R0M

PC69

13

6
2

1

VS

84

3

+

2

-

100K

2 2

PU8B
LM393M

7

5

+

6

-

PQ18

DTC115EUA

100K

PQ20

DTC115EUA

PL7

12

PR90
100

1 2

2

13

PR93
200K

100K

B

100K

12

1 2

PR96
100K

2

+2.5V +-5%

+2.5VP

12

12

+

PC64
470P

2.5VREF

SYSON

PC66

220UF_D_4V_FP

VL

SYSON <33,37>

+2.5VP

SUSP#

PR95

1 2

100K

2

PQ19

DTC115EUA

+2.5VP

12

PR86
0_1206

0.1UF_0805_25V

1.25VIN

12

4.7UF_1206_16V

100K

100K

13

PR88
10

PC70

PC63

C

D

12

12

1

VCC1

2

PVDD1

3 14

VL1 VL2

4

PGND1

5

AGND1

6

SD

7

VIN/2

12

8

AGSEN

PU7

CM8500

VCC2

PVDD2

PGND2

AGND2

VCCQ

AGND

VFB

16

0.1UF_0805_25V

15

13

12

11

10

9

PC65

12

+2.5VP

12

LX1.25

PC72

4.7UF_1206_16V

PC76

0.1UF_0805_25V

1 2

PC75
1000PF

12

PL8

5UH_SPC_06704

PD19
@EP10QY03

PR94
100K

PR97
1K

+1.25VSP

12

12

+

PC73

220UF_D_4V_FP

12

12

1 2

PC77 1000PF

Layout : "Compensation network close to FB pin"

PQ21

@SI3442DV

+3VALWP

+1.8VALWP

12

PC83

PR98
0_1206

12

PC85

2200PF_50V

PQ26
2SA1036K

1 2

12

3
1

1.8VIN

PD20
RB751V

1 2

PR103
1K

2

A

PQ23

HMBT2222A

2

PQ22
SI3445DV

D

S

6

4 5

2
1

G

12

3

PR102

1

10K

PU10A
LM393M

1

PU10B
LM393M

7

VS

PC87

0.1UF_50V

84

3

+

2

-

5

+

6

-

3

LX1.8

12

12

PR110
511K_1%

PL9

5UH-SPC-06704

1 2

PD21
RB051L-40

1000PF

3 3

4.7UF_1206_25V

4 4

12

PC88

+1.8V+-5%

PR104
100

12

B

+1.8VALWP

12

+

PC82

150UF_D_4V_FP

1 2

PR108 200K

PC79

@4.7UF_1206_25V

2.5VREF

D

6

S

45
2
1

G

3

PU9A
@LM358

1

PC86

@68PF

PU9B

@LM358

7

THIS SHEET OF ENGINEERING DRAWINGIS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR
THE INFORMATIONIT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTYWITHOUT PRIORWRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.

84

+

-

3
2

+

-

C

VS

PR107

1 2

5
6

12

@5.1K

PC80

@0.1UF_16V

PR99

@5.1K

1 2

1 2

PR100

PC81

PC84

@0.01UF

@0

@220PF

PR105

1 2

+1.5V+-5%

@300K_0.5%

12

+1.5VSP

+

PC78
@150UF_D_6.3V_KO

PR101

@200K_1%

2.5VREF

12

PQ24

13

@DTC115EK

100K

2

100K

COMPAL ELECTRONICS, INC

Title

DDR /2.5V / 1.8V/1.25V

Size Document Number Rev

B

Date: Sheet

2.5VREF

+5VALWP

@100K

PR106

1 2

PQ25

13

@DTC115EK

100K

2

100K

12

PR109 @0

ACT10 1.0A

D

SUSP# <23,33,37>

39 45Thursday, May 30, 2002

of

A

B

C

D

PC25

0.1UF_16V

Iadp=0~3.5A

PR24

0.02_2512_1%

PR31
10K

1 2

1 2

PC19
4700PF_50V

1 2

1 2

PC22
2200PF_50V

PR40 10K

12

PR35
10K

12

PR36
10K

12

B+

PU3
MB3878

1

+INC2

-INC2

2

GND

OUTC2

3

4

5

6

7

8

9

10

11

12

+INE2

-INE2

FB2

VREF

FB1

-INE1

+INE1

OUTC1

OUTD

-INC1

CS

VCC(o)

OUT

VH

VCC

RT

-INE3

FB3

CTL

+INC1

PL2

FBM-L11-453215-900LMAT_1812

1 2

24

23

22

21

20

PC20

0.1UF_50V

19

1 2

18

17

1 2

16

15

1 2

14

13

PR37
68K

PR41
47K

0.1UF_0805_25V

1 2

1 2

PC24
1500PF_50V

12

PC14

4.7UF_1210_25V

12

PR29
0

PC16
220PF_50V

1 2

1 2

PC17

0.1UF_0805_25V

PC23

12

PC15

4.7UF_1210_25V

PD7
1SS355

1 2

12

PR43
47K

FSTCHG <33>

RB051L-40

PD8

B++

36

241

PQ7
FDS4435

578

LXCHRG

PL3

22UH_SPC-1205P-220A

1 2

12

PQ6

ACOFF#

SI4835DY
1
2
3 6

1 2

PR27 10K

13

100K

100K

4

2

PQ8
DTC115EK

8
7

5

1 2

PR28 47K

CC=0.5~2.52A
CV=16.84V(8 CELLS LI-ION)

1 2

PR39

0.02_2512_1%
12

PC26

4.7UF_1210_25V

VIN

ACOFF <33>

BATT+

12

PC27

4.7UF_1210_25V

PQ4

SI4835DY

ACOFF#

8
7

5

PD6

1SS355

1 2

PR32
10K

1 2

IREF<33>

VIN

1 1

2 2

PR25
10K

12

PACIN<38,41>

ACON<38>

IREF=1.31*Icharge
IREF=0.73~3.3V

P2 P3

1
2
36

4

2

G

PQ5

SI4835DY

1
2
3 6

12

4

PR26
200K

12

PR30
150K

13

D

PQ9
2N7002

S

PC18

0.1UF_16V

PR38
162K_1%

1 2

8
7

5

12

12

PR34
10K_1%

12

0.1UF_16V

PR42

100K_1%

PC21

12

12

PR33
21K_1%

12

12

PC32

0.01UF

PR44

47.5K_1%

THIS SHEET OF ENGINEERING DRAWINGIS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR
THE INFORMATIONIT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTYWITHOUT PRIORWRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.

3 3

VS

PC28

OVP voltage : LI-MH

0.1UF_50V

8 CELL : 18V--> BATT_OVP= 2.0V

(BAT_OVP=0.1111 *VMB)

PU4A

84

LM358

BATT_OVP<33>

12

12

PC31

4 4

@0.1UF_16V

A

PR51

2.2K

3

+

1

2

-

PR52

105K_0.5%

VMB

12

12

12

PR46

340K_1%

PR47

499K_1%

B

4.2V

SDREF

10UF_1206

PR49

PC30

0

7

12

C

PU4B
LM358

PR45
143K_1%

+

-

12

+2.5V

12

PR48

100K_0.5%

5
6

12

PR50

100K_0.5%

PC29

0.1UF_16V

COMPAL ELECTRONICS, INC

Title

CHARGER

Size Document Number Rev

B

Date: Sheet

ACT10 1.0A

D

40 45Thursday, May 30, 2002

of

A

1 1

PC35

0.1UF_0805_25V

PQ10
SI4800DY

PDH31

PQ12
SI4810DY

1 2

PLX3

PDL3

FBM-L11-322513-151LMAT

PL4

B+

2 2

+3VALWP

12

0.012_2512_1%

B+++

12

PC36

4.7UF_1210_25V

PL5

SLF12565T-100M

PR58

12

PC37

4.7UF_1210_25V

12

12

PR57

578

3 6

241

578

12

47PF
PC44

3 6

241

1M

1 2

PR54
0

1 2

BST31

PDH3

CSH3

12

12

+

150UF_D_6.3V_FP

PC47

150UF_D_6.3V_FP

+

PD11

EP10QY03

PC46

3 3

PR62

3.57K_1%

PR64

1 2

10K_1%

1 2

2 1

PACIN<38,40>

12

PC48
100PF

+3.3V Ipeak = 6.66A ~ 10A

1 2

PR61
10K

PON

12

PR66
47K

12

PC54

0.047UF_16V

12

PC42

0.1UF_0805_25V

25
27
26

24

1
2

3
10
23

7
28

12

PC50
680PF

12

0.047UF_16V

B

PR68

47K_1%

PC55

PR55

10_1206

BST3
DH3
LX3

DL3

CSH3
CSL3
FB3
SKIP#
SHDN#

TIME/ON5
RUN/ON3

VS

12

VL

12

22

V+

PU5

MAX1632

2

3

DAP202U
PD10

1

12

PC41

4.7UF_1206_10V

21

4

12OUT

VL

5

VDD

18

BST5

16

DH5

17

LX5

19

DL5

20

PGND

14

CSH5

13

CSL5

12

FB5

15

SEQ

9

REF

6

SYNC

11

RST#

GND

8

VL

MAINPWON <4,38,42>

BST51

+12VALWP

12

PC43

4.7UF_1206_25V

2.5VREF

12

PC49

4.7UF_1206_10V

+5VALWP

12

PC38

0.1UF_0805_25V
1 2

PR65
10K

C

PDH5

PLX5

PR63
10K_1%

1 2

PR56
0

PDL5

12

12

PR67
10K_1%

D

PC33

2.2UF_1206_25V
1 2

12

PC34

1 2

470PF_0805_100V

B+++

PR53
22_1206

PQ11
SI4800DY

FLYBACKSNB

12

PD9
EC11FS2

4

1

PT1

SDT-1205P-100

2

3

578

12

12

PC39

PC40

4.7UF_1210_25V

4.7UF_1210_25V

3 6

PDH51

PQ13

SI4810DY

578

241

12

PC45
47PF

CSH5

12

3 6

241

PR59
2M

12

PR60

0.012_2512_1%

+5VALWP

12

12

12

PC53

100PF

+

PC51

150UF_D_6.3V_FP

PD12

+

EP10QY03

PC52

2 1

150UF_D_6.3V_FP

+5V Ipeak = 6.66A ~ 10A

4 4

THIS SHEET OF ENGINEERING DRAWINGIS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR
THE INFORMATIONIT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTYWITHOUT PRIORWRITTEN CONSENT OF COMPAL ELECTRONICS,

A

B

INC.

C

COMPAL ELECTRONICS, INC

Title

5V/3.3V/12V

Size Document Number Rev

B

Date: Sheet

ACT10 1.0A

D

41 45Thursday, May 30, 2002

of

A

B

C

D

+3VALWP

VMB

12

+3VALWP

PJP9
BTC-07GR1 7P

1

ALI/NIMH#

2

AB/I

3

TSA

4

EC_SMD1

5

1 1

2 2

3 3

EC_SMC1

6
7

@BAS40-04

+5VALWP

PD15

12

PR71
100

1

3

2

PR69
1K

12

12

12

PR72

PR73

100

1K

12

PR78
1K

1

1

PD16
@BAS40-04

3

2

1 2

PR77

25.5K_1%

1 2

3

2

PR70
47K

1

PD14
@BAS40-04

3

2

PD13
@BAS40-04

PL6

BLM41P600S_1806

PC56
1000PF_50V

ALI/MH# <33>

BATT_TEMP <33>

EC_SMB_DA1 <33,34>
EC_SMB_CK1 <33,34>

12

BATT+

PH1 under CPU botten side :

CPU thermal protection at 87 degree C
Recovery at 48 degree C

12

PC57

0.01UF_50V

PC60

0.22UF_0805_16V

PH2 near main Battery CONN :

PR74

3K_1%

PH1

VL

10K_1%

PC58

0.1UF_50V

PR76

16.9K_1%

PC59

1000PF_50V

12

TM_REF1

3
2

100K_1%

PR80

100K_1%

VS

+

-

PR79

84

PR75
47K_1%

PU6A
LM393M

1

MAINPWON<4,38,41>

VL

PR148

47K_1%

12

1SS355

PD27

VL

PQ41

13

DTC115EK

100K

2

100K

BAT. thermal protection at 73 degree C
Recovery at 50(51) degree C

PH2

VL

10K_1%

PR83
10K_1%

TM_REF2

PR82
47K_1%

5

+

6

-

PU6B

LM393M

7

VL

PR149

47K_1%

PD28

12

1SS355

PR81

3.24K_1%

PC62

0.22UF_0805_16V

4 4

THIS SHEET OF ENGINEERING DRAWINGIS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR
THE INFORMATIONIT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTYWITHOUT PRIORWRITTEN CONSENT OF COMPAL ELECTRONICS,

A

B

INC.

C

PC61 1000PF_50V

PR84 100K_1%

PR85

100K_1%

COMPAL ELECTRONICS, INC

Title

BATTERY CONN / OTP

Size Document Number Rev

B

Date: Sheet

VL

ACT10 1.0A

D

42 45Thursday, May 30, 2002

of

A

B

C

D

E

F

G

H

B+

1 1

PC113
4700P

PC115
4700P

CPU_ON

PR113 0
PR115 100K
PR118 100K
PR119 100K
PR120 100K

PR121 0

CM++

CM--

CS--

B

CPU_VID4<4,5>
CPU_VID3<4,5>

CPU_VID2<4,5>
CPU_VID1<4,5>
CPU_VID0<4,5>

+3VALWP

PR125

150K_1%

2 2

+2VREF

PR134
30K_1%

PR137

PC103

0.1UF_0805

3 3

4 4

20K_1%

+CPU_CORE

+CPU_CORE

A

VGATE<35>

PR126
180K_1%

PC99

1UF_0805

PC102
470P

PR138
1K_1%

PR141
200

CM+

1 2

PR143
200

1 2

PR144
200

CS+ CS++

1 2

PR147
200

1 2

PC100

1UF_0805

PR123120K

2VREF

PR130

53.6K_1%

PR132

100K_100%

CM++
CM-­CS-­CS++

12
12
12
12
12

12

PC98
47PF_0603

1
2 15
3
4
5
6
7
8

PL10

KC-FBM-L11-322513-201LMAT

CPUVDD

21
22
23
24
25
14

3
2

17

6
20
11
12
15 10

PC101
1000P

PU12MAX1887

ILIM
TRIG V+
CM+
CM­CS­CS+
COMP
GND

PU11 MAX1718A

D4
D3
D2
D1
D0
VGATE
TIME
SDN/SKIP
VDD
CC

ZMODE
OVP
REF
ILIM
GND TON

33K_1%

LIMIT

BST

LX

DH

VDD

DL

PGND

1 2

PM
PM D-S
BM
BM D-S
Deeper

4.7UF_1210_25V

PC90

1 2

PR116 0

CPUFB
POS

PM_DPRSLPVR

PC104 0.1UF_0805

2 1

1SS355

1UF_0805

+5VALWP

PR112
20

PD26

PC110

4.7UF_1210_25V

PR111

0

LX

DH

BST

DL
V+

VCC

FB

POS

NEG

SUS

S1
S0

PR133

16

14
13
12
11
10
9

PC89

27
28
26
16
1
9
4
13
5
19
18
8
7

CPUVDD

GMUXSEL CPUSTP# VCORE

11
1

0
10

00

0

X

C

4.7UF_1210_25V

PC92

PC91

4.7UF_1210_25V

21

PD22
1SS355

1 2

PC93

0.1UF_0805

CPUB+

PC95

0.1UF_0805

PC96

4.7UF_0805_10V

PM_DPRSLPVR <18>

1 2

0
PR139

DPRSLPVR VCORE'

1.30V 0%

0
0
0

1.20V 2.0%

0

1.0V

1

D

12

PR117

2.7_0805

PC94

0.01UF

12

Offset

CPUB+

578

PQ27

IR7811A

3 6

241

VTT1LX

578

3 6

578

PQ35

IR7811A

3 6

241

VTT2LX CS+

PR136

PC105

0.01UF

2.7_0805

578

3 6

+3VALWP

VR_ON<33>

241

241

PQ29
SI4362DY

PQ38
SI4362DY

CPU_ON

578

3 6

578

3 6

578

3 6

578

3 6

PR1400

4.7UF_1206_16V

VR_ON

241

PQ30
SI4362DY

241

1000PF_0603

CPUB+

241

PQ39
SI4362DY

241

PC111

1000PF

PQ28
IR7811A

PC97

PQ36
IR7811A

CPU-CORE

0.7UF HK-RM136-22A0R7

PD23
EC31QS04

2 1

PR124 100

PL12

0.7UF HK-RM136-22A0R7

PD25
EC31QS04

2 1

PC106

4.7UF_1210_25V

12

PC114

PR146
0

1 2

1.30V

1.239V

4.62%

4.62%
0%

1.176V

1.144V

1.0V

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

E

PL11

PQ33
2N7002

PC107

4.7UF_1210_25V

PU13

4

VIN

SENSE

DELAY
ERROR CNOISE
ON/OFF#

SI9182AD

F

VOUT

GND

2
7 1
8

PR135
2mR

CM+

PR122

2.8K_1%

PR127

49.9K_1%

PR131
100K

13

D

2

G

S

PQ34

2N7002

12

+CPU_CORE

CPUB+

PC108

4.7UF_1210_25V

5
6

3

+CPU_CORE

PQ31
2N7002

2

G

D

S

+CPU_CORE

PD24
EC31QS04

2 1

+5VALWP

PR128
100K

PQ32

13

D

2N7002

PQ40

13

D

S

PQ37

13

2N7002

G

PR142
0

PR145
@10K_1%

2N7002

G

2

2

S

PM_DPRSLPVR

12

PC119

0.01UF

12

PC112

4.7UF_1206_16V

2

G

+1.2VPP

12

PC117

0.01UF

ACT10 1.0A

PR114
2mR

12

PR129
68K_1%

13

+5VALWP

D

S

13

D

2

G

PM_STPCPU#<18>

S

12

PC118

0.01UF

PC109

4.7UF_1210_25V

12

PC116
.1UF

COMPAL ELECTRONICS, INC

Title

+VCC_H_CORE

Size Document Number Rev

B

Date: Sheet

G

PM_GMUXSEL <18>

43 45Thursday, May 30, 2002

of

H

5

Power Managment tableAGP Multiplexed Channel B List

AGP D0 : VBD7
AGP D1 : VBD6
AGP D2 : VBD5

Signal

AGP D3 : VBD4
AGP D4 : VBD3

D D

AGP D5 : VBD2

State

AGP D6 : VBD1
AGP D7 : VBD0
AGP D19 : VBD11
AGP D20 : VBD10
AGP D21 : VBD8
AGP D22 : VBD9
AGP D27 : VBDE
AGP D28 : VBCTL0
AGP D29 : VBCTL1
AGP D30 : VBHSYNC
AGP D31 : VBVSYNC
AGP AREQ# : VBCD
AGP RBF# : VBHCLK

C C

AGP SBA0 : VBCLK
AGP STB1 : VBGCLK
AGP STB1# : VBGCLK#

AGP D24 : VAD0
AGP D23 : VAD1

S0

S1

S3

S5 S4/AC

S5 S4/AC don't exist

IDSEL :
1394 : AD16
LAN : AD17
CARDBUS : AD19
MINI_PCI : AD18, AD22

4

+3VS

+5VS
+3VALW
+5VALW
+1.8VALW
+12VALW

ON

ON ON ON

ON ON

ON OFF

OFF OFF OFF

PCI MASTER :
1394 : REQ0#, GNT0#
MINI-PCI(Wireless Lan) : REQ1#, GNT1#
CARDBUS : REQ2#, GNT2#
LAN : REQ3#, GNT3#
MINI-PCI : REQ4#, GNT4#

+3V
+5V
+2.5V

ON ON

+1.8VS

+1.5VS

+1.2VP

+CPU_CORE

+1.25VS

OFF

OFF

3

History List

Item Description Page Note Date

1 Layout Ver. 0.0 Power not Include 01/11/22
2 Power Include 01/11/23Layout Ver. 0.0 add power
3 Add Part Number 01/12/25
4 Change some parts suggest from SiS 01/1/3Add Jumpper

2

1

AGP D25 : VAD2
AGP D26 : VAD3
AGP D10 : VAD4
AGP D9 : VAD5
AGP D8 : VAD6
AGP D11 : VAD7

PCI IRQ ROUTING :
VGA : INTA#
1394 : INTB#
CARDBUS/MINI-PCI : INTC#
LAN/MINI-PCI : INTD#

AGP D12 : VAD8
AGP D13 : VAD9

B B

AGP D14 : VAD10
AGP D15 : VAD11
AGP D16 : VADE
AGP D18 : VAHSYNC
AGP D17 : VAVSYNC
AGP STB0 : VAGCLK
AGP STB0# : VAGCLK#

A A

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

5

4

3

2

Title

Note & Revision

Size Document Number Rev

ACT10

Date: Sheet

44 45Thursday, May 30, 2002

1

of

1.0A

5

D D

C C

4

3

2

1

B B

A A

Title

<Title>

Size Document Number Rev

<Doc> 1.0A

Custom

5

4

3

2

Date: Sheet

45 45Thursday, May 30, 2002

1

of