Compal LA-1302 888Z4.5, Pavilion zt1000 Schematic

A

B

C

D

E

Cover Sheet

888Z4.5 / LA-1302 Mother Board

Rev : 0.5 for Layout

Intel (Northwood) with Intel 845M+ICH3

1 1

SHEET

SHEET

SHEETSHEET

1
2
3,4
5
6,7,8

9,10,11

12
13,14,15

2 2

16, 17
18,19,20
21
22
23
24
25
26
27
28

3 3

29
30
31
32
33
34
35

36
37
38
39

4 4

40
41

42

A

Cover Page
Block Diagram

Northwood CPU / Fan / Thermal
CPU Decoupling
North Bridge Intel 845MP
DDR-SODIMM
Clock Genera to r

VGA ATI M7C/ Penal interface
VGA DDR SGRAM/ CRT & TVOUT CONNECTOR
South Bridge ICH3M
Card Bus Controller / Card Bus Socket

IEEE1394 VT6306 / PHY
LAN Controller RTL8100BL
Audio DJ OZ163

AC97 Codec_ALC2 0 1
Audio EQ_TAS3002

AMP & Audio Jack

HDD/CDROM
LPC EC_PC87591

BIOS & I/O Port

Printer/USB Port/TP

Dot Matrix LCD/FIR/Reset/PS
DC/DC Interface

Mimi-PCI & Docking
SIO VT1211

SD CONTROLLER/SOCKET/UNS E D GA T E S

5V/3V/12V

CHARGER

CPU_COR E

DETECTOR

DDR/Connector
Notes & PIR List

TITLE

TITLE

TITLETITLE

B

stencil not open:

J1
U24
PJP2
PJP4
C715
C716
PC155
C72
C94

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

Title

Size Document Number Rev

B

Date: Sheet

Comp a l Electro nics , In c .

SCHEMATIC, M/B LA -1302

401216

E

145Wednesday, May 29, 2002

of

1B

A

Compal confidential

Model Name : 888Z4/LA-1301 (Intel Northwood)

1 1

Power On/Off
Reset Circuit

page 29

DC/DC Interface
RTC Battery

page 30

2 2

+3VS +5VS +3VALW

Mini PCI
Socket

page 31 page 21

* HSP Modem Card
* Combo for HSP Modem and

802.11b
* Controllerless Modem
* Combo for Controllerless

3 3

Modem and 802.11b

VID SELECT
/CPU_CORE Decouple
CAP.

CRT Connector

+3VS

LCDVDD

page 17

+5VS FOR INVERTER

TFT/HPA Panel
Interface

page 13

TV OUT
Connector

page 17

PCMCIA

S1_VCC +3VALW

Slot 0

page 21

S1_VPP

page 5

B

+3VS

ATI M7C

page
13,14,15

VIA VT6306

1394 ControllerCB1410

+5VALW
+12VALW

LPC BUS

+1.8VS

+1.5VS
+2.5VS

+2.5VS

SGRAM
8/16MB

+3VS

page 22

page 16

AC Link

C

+CPU_CORE

+1.2VS

Intel

Northwood Micro-FCPGA

page 3,4,5

+1.8VS

+1.5VS

+CPU_CORE

Brookdale-M

MCH-M

page6,7,8

PCI BUS

AD(0..31)

+1.8VS +3VS +3VALW+3V

+2.5V

MA(0..13)

MD(0..63)

HUB LINK

ICH3-M
421 BGA

page 18,19,20

D

+2.5V +2.5V

+3VS +3VS
page 9

DDR
SO-DIMM 0
(Bank 0,1)

DDR
SO-DIMM 1
(Bank 2,3)

DDR
Decoupling

+1.8VALW+CPU_CORE

Y1

14.318MHZ

+3VS

Clock Generator
W320-04/9508-05

+3VSUS
+3VRUN

page 10

page12

+1.25VS

TERMINATION
RESISTORS

page 11

+5VS +5VALW +3VALW

USB

Port 0,1

page 31

E

Block Diagram

New

USB

Port 2

Bluetooth

page 31

RJ45/RJ11
Jack

page 23

6-7A 6-7A 3A 50mA
+3VALWP +5VALWP +2.5VALWP

Power Circuit
DC/DC

page 37,38,39,40,41

4 4

A

+3VALW OR +2.5VALW

LAN
RTL8100BL

page 23

+12VALWP

+1.25VP
+1.2VP

PCB1

LA-1302 PCB

3A

300mA

+3VS +3VALW

Super I/O

14M_5V

SMC47N227

page 35

+5VS

Touch Pad

page 31

PIO

page 31

+3VS

Smart Card
Connector

page 36

+3VS,+5VS

B

I/O Buffer

page 30

+3VALW

BIOS

page 30

SD
CONTROLLER

page 36

KeyBoard

NS87591

page 29

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

AC Link

+3VS AVDD +5VALW

AC97

KBD

page 29

+3VCD +5VAMP

Audio
EQ

page 26

Speaker

page 27

C

Codec

page 25

AMP
Jack

page 27

AC Link

+5VCD +5VS

OZ163

page 24

+5VS

+5VCD

CD-ROM
Connector

page 28

HDD
Connector

page 28

+5VCD
+3VCD
+5VAMP +5VALW

D

+5VALW
+3VALW

EN_CDPLAY#

Docking Connector

* DC-IN
* 2 USB Port
* TV Out (S Video)
* VGA Out
* 2 PS/2
* LAN
* Parallel Port
* Serial Port
* Line Out
* Headphone
* Microphone

page 34

Title

Size Document Number Rev

B

Date: Sheet

Comp a l Electro nics , In c .

SCHEMATIC, M/B LA -1302

401216

E

245Wednesday, May 29, 2002

of

1B

5

HA#[3..31]6

HA#3

R221 220_1%_0402

CLK_HCLK
CLK_HCLK#

HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

D D

+CPU_CORE

HREQ#[0..4]

R233 10K_0402

1 2
1 2

C C

B B

HREQ#[0..4]6

HADS#6

HBR0#6
HBPRI#6

HBNR#6

HLOCK#6

CLK_HCLK12
CLK_HCLK#12

HIT#6

HITM#6

HDEFER#6

AF22
AF23

W1

W2

AB1

AC1
AA3

AC3

K2
K4
L6
K1
L3
M6
L2
M3
M4
N1
M1
N2
N4
N5
T1
R2
P3
P4
R3
T2
U1
P6
U3
T4
V2
R6

T5
U4
V3

Y1

J1
K5
J4
J3
H3
G1

V5

H6
D2
G2
G4

F3
E3
E2

4

+CPU_CORE

U13A

A#3
A#4
A#5
A#6
A#7
A#8
A#9
A#10
A#11
A#12
A#13
A#14
A#15
A#16
A#17
A#18
A#19
A#20
A#21
A#22
A#23
A#24
A#25
A#26
A#27
A#28
A#29
A#30
A#31
A#32
A#33
A#34
A#35

REQ#0
REQ#1
REQ#2
REQ#3
REQ#4
ADS#

AP#0
AP#1
BINIT#
IERR#

BR0#
BPRI#
BNR#
LOCK#

BCLK0
BCLK1

HIT#
HITM#
DEFER#

3

A10

A12

A14

A16

A18

A20A8AA10

AA12

AA14

AA16

AA18

AA8

AB11

AB13

AB15

AB17

AB19

AB7

AB9

AC10

AC12

AC14

AC16

AC18

AC8

AD11

AD13

AD15

AD17

AD19

AD7

AD9

AE10

AE12

AE14

AE16

AE18

AE20

AE6

AE8

AF11

AF13

AF15

AF17

AF19

AF2

AF21

AF5

AF7

AF9

B11

B13

B15

B17

B19B7B9

C10

C12

VCC_0

VCC_1

VCC_2

VCC_3

VCC_4

VCC_5

VCC_6

VCC_7

VCC_8

VCC_9

VCC_10

VCC_11

VCC_12

VCC_13

VCC_14

VCC_15

VCC_16

VCC_17

VCC_18

VCC_19

VCC_20

VCC_21

VCC_22

VCC_23

VCC_24

VCC_25

VCC_26

VCC_27

VCC_28

VCC_29

VCC_30

VCC_31

VCC_32

VCC_33

VCC_34

VCC_35

VCC_36

VCC_37

VCC_38

VCC_39

VCC_40

VCC_41

VCC_42

VCC_43

VCC_44

VCC_45

VCC_46

VCC_47

VCC_48

VCC_49

VCC_50

VCC_51

VCC_52

VCC_53

VCC_54

VCC_55

VCC_56

VCC_57

VCC_58

Mobile

NorthWood

VSS_0

VSS_1

VSS_2

VSS_3

VSS_4

VSS_5

VSS_6

VSS_7

VSS_8

VSS_9

VSS_10

VSS_11

VSS_12

VSS_13

VSS_14

VSS_15

VSS_16

VSS_17

VSS_18

VSS_19

VSS_20

VSS_21

VSS_22

VSS_23

VSS_24

VSS_25

VSS_26

VSS_27

VSS_28

VSS_29

VSS_30

VSS_31

VSS_32

VSS_33

VSS_34

VSS_35

VSS_36

VSS_37

VSS_38

VSS_39

VSS_40

VSS_41

VSS_42

VSS_43

VSS_44

VSS_45

VSS_46

VSS_47

VSS_48

VSS_49

VSS_50

VSS_51

VSS_52

VSS_53

VSS_54

VSS_55

VSS_56

H1H4H23

H26

A11

A13

A15

A17

A19

A21

A24

A26A3A9

AA1

AA11

AA13

AA15

AA17

AA19

AA23

AA26

AA4

AA7

AA9

AB10

AB12

AB14

AB16

AB18

AB20

AB21

AB24

AB3

AB6

AB8

AC11

AC13

AC15

AC17

AC19

AC2

AC22

AC25

AC5

AC7

AC9

AD1

AD10

AD12

AD14

AD16

AD18

AD21

AD23

AD4

AD8

2

C14

C16

C18

C20C8D11

D13

D15

D17

D19D7D9

E10

HD#0

B21

VCC_59

VCC_61

VCC_62

VCC_63

VCC_64

VCC_65

VCC_66

VCC_81

VCC_82

VCC_83

VCC_84

VCC_85

F13

F15

F17

F19

F9

VCC_73

VCC_67

VCC_68

VCC_69

VCC_70

VCC_71

VCC_72

D#0
D#1
D#2
D#3
D#4
D#5
D#6
D#7
D#8

D#9
D#10
D#11
D#12
D#13
D#14
D#15
D#16
D#17
D#18
D#19
D#20
D#21
D#22
D#23
D#24
D#25
D#26
D#27
D#28
D#29
D#30
D#31
D#32
D#33
D#34
D#35
D#36
D#37
D#38
D#39
D#40
D#41
D#42
D#43
D#44
D#45
D#46
D#47
D#48
D#49
D#50
D#51
D#52
D#53
D#54
D#55
D#56
D#57
D#58
D#59
D#60
D#61
D#62
D#63

VCC_74

VCC_75

VCC_76

VCC_77

VCC_78

VCC_79

VCC_80

E12

E14

E16

E18

E20E8F11

NorthWood

B22
A23
A25
C21
D22
B24
C23
C24
B25
G22
H21
C26
D23
J21
D25
H22
E24
G23
F23
F24
E25
F26
D26
L21
G26
H24
M21
L22
J24
K23
H25
M23
N22
P21
M24
N23
M26
N26
N25
R21
P24
R25
R24
T26
T25
T22
T23
U26
U24
U23
V25
U21
V22
V24
W26
Y26
W25
Y23
Y24
Y21
AA25
AA22
AA24

HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

HD#[0..63]HA#[3..31]

1

HD#[0..63] 6

+CPU_CORE

+12VS

+12VS

Fan1 Control circuit Fan2 Control circuit

R91

3.48K_1%

12

C429
.1UF_0402

A A

1 2

R249 13K_1%

5

1 2

VCC

5
1

3

U19

2

VEE

LMV321_SOT23-5

1 2

R245 7.32K_1%

.1UF_0402

C424

4

1 2
21

D15
1N4148

3

Q17

2

2SA1036K

1

Q12

FMMT619

2

C108

2.2UF_16V_0805

1 2

10UF_10V_0805

4

C722

12

+5VS

1

D7
1SS355

3

2 1

+5VFAN1 +5VFAN2

C123
1000PF_0402

JP13

1
2
3

53398-0310

FANSPEED1 29

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

12

C240
@.1UF_0402

EN_FAN229EN_FAN129

3

1 2

R144 @13K_1%

+5VS+5VS

@.1UF_0402

1 2

C239

VCC

5
1

4

3

U17

2

VEE

@LMV321_SOT23-5

1 2

R143 @7.32K_1%

R314

@3.48K_1%

2

1 2
21

3
1

2

D11
@1N4148

Q13
@2SA1036K

Q1

@FMMT619

2

C238

@2.2UF_16V_0805

1 2

C723

@10UF_10V_0805

+5VS

1

D1
@1SS355

3

2 1

12

C1
@1000PF_0402

JP4

1
2
3

@53398-0310

PIRPIR

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1302

Size Document Number Rev

401216

Date: Sheet

3

1

1B

45Wednesday, May 29, 2002

of

200_0402

12
12

12
12

200_0402

12

200_0402

12

200_0402

12

200_0402

12

200_0402

12

200_0402

12

200_0402

12

200_0402

12

56_0402

12
12

51.1_1%

12

+1.2VS

ITP_TDI
ITP_TMS
ITP_TRST#
ITP_TCK

ITP_PREQ#
ITP_PRDY#

ITP_BPM0
ITP_BPM1

5

H_A20M#
H_SMI#
H_IGNNE#
H_STPCLK#
H_DPSLP#
H_NMI
H_INIT#
H_INTR

H_F_FERR#
H_PWRGD

H_RESET#

PM_CPUPERF#

Murata LQG21F4R7N00

L14

1 2

L15

1 2

4.7UH_80mA

4.7UH_80mA

12

+

+1.2VS

C49
33UF_D2_16V

CLK_ITPP12
CLK_ITPP#12

H_RS#06
H_RS#16
H_RS#26

H_TRDY#6

H_A20M#18

H_F_FERR#18

H_IGNNE#18

H_SMI#18

H_PWRGD18

H_STPCLK#18

H_DPSLP#18

H_INTR18

H_NMI18

H_INIT#18

H_RESET#6

H_DBSY#6
H_DRDY#6

H_BSEL012
H_BSEL112

1 2

R92 56_0402

TP1

12

C59

+

33UF_D2_16V

H_VSSA

H_A20M#
H_F_FERR#
H_IGNNE#
H_SMI#
H_PWRGD
H_STPCLK#
H_DPSLP#
H_INTR
H_NMI
H_INIT#
H_RESET#

H_THERMDA
H_THERMDC

H_THERMTRIP#

ITP_BPM0
ITP_BPM1
ITP_PRDY#
ITP_PREQ#

ITP_TCK
ITP_TDI

ITP_TMS
ITP_TRST#

H_VCCA

1

H_VCCIOPLL

R190

51.1_1%
1 2

+CPU_CORE

D D

C C

R226
R230
R234
R231
R191
R229
R228
R240

R224

R194 301_1%_0402

R187

R75

12

Place resistor <100mils from
CPU pin

If used ITP port must depop

RP16 8P4R_1.5K_0804

1 8
2 7
3 6
4 5

+CPU_CORE

B B

R117 51.1_1%

R116 51.1_1%
R119 51.1_1%

R118 51.1_1%

1 2

AB2

AB23
AD25

AB25

AD6
AD5

AC6
AB5
AC4

AA5
AB4

AD20
AE23
AF25

AF3

AC26
AD26

L24

R113

51.1_1%

F1
G5
F4

J6

C6
B6
B2
B5

Y4
D1

E5

W5

H5
H2

B3
C4

A2

Y6

D4
C1
D5
F7
E6

A5

P1

4

AE11

U13B

RS#0
RS#1
RS#2
RSP#
TRDY#

A20M#
FERR#
IGNNE#
SMI#
PWRGOOD
STPCLK#
DPSLP#
LINT0
LINT1
INIT#
RESET#

DBSY#
DRDY#
BSEL0
BSEL1

THERMDA
THERMDC

THERMTRIP#

BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5

TCK
TDI
TDO
TMS
TRST#

VCCA
VCCSENSE
VCCIOPLL

NC7
NC8

ITP_CLK0
ITP_CLK1

COMP0
COMP1

3

AE13

AE15

AE17

AE19

AE22

AE24

AE26

AE7

AE9

AF1

AF10

AF12

AF14

AF16

AF18

AF20

AF26

AF6

AF8

B10

B12

B14

B16

B18

B20

B23

B26B4B8

C11

C13

C15

C17

C19C2C22

C25C5C7C9D10

D12

D14

D16

D18

D20

D21

D24D3D6D8E1

E11

E13

E15

E17

E19

E23

E26E4E7E9F10

F12

F14

F16

F18F2F22

VSS_57

VSS_58

VSS_59

VSS_60

VSS_61

VSS_62

VSS_63

VSS_64

VSS_65

VSS_66

VSS_67

VSS_68

VSS_69

VSS_70

VSS_71

VSS_72

VSS_73

VSS_75

VSS_76

VSS_77

VSS_78

VSS_79

VSS_80

VSS_81

VSS_82

VSS_83

VSS_84

VSS_85

VSS_86

VSS_87

VSS_88

VSS_89

VSS_90

VSS_91

VSS_92

VSS_93

VSS_94

VSS_95

VSS_96

VSS_97

VSS_98

VSS_99

VSS_100

VSS_101

VSS_102

VSS_103

VSS_104

VSS_105

VSS_106

VSS_107

VSS_108

VSS_109

VSS_110

VSS_111

VSS_112

VSS_113

VSS_114

VSS_115

VSS_116

VSS_117

VSS_118

VSS_119

VSS_120

VSS_121

VSS_122

VSS_123

SKTOCC#

VSS_124

Mobile

NorthWood

VSS_129

VSS_130

VSS_131

VSS_132

VSS_133

VSS_134

VSS_135

VSS_136

VSS_137

VSS_138

VSS_139

VSS_140

VSS_141

VSS_142

VSS_143

VSS_144

VSS_145

VSS_146

VSS_147

VSS_148

VSS_149

VSS_150

VSS_151

VSS_152

VSS_153

VSS_154

VSS_155

VSS_156

VSS_157

VSS_158

VSS_159

VSS_160

VSS_161

VSS_162

VSS_163

VSS_164

VSS_165

VSS_166

VSS_167

VSS_168

VSS_169

VSS_170

VSS_171

VSS_172

VSS_173

VSS_174

VSS_175

VSS_176

VSS_177

VSS_178

VSS_179

VSS_180

F8

G21

G24G3G6J2J22

J25J5K21

K24K3K6L1L23

L26L4M2

VSS_181

VID0

M22

M25M5N21

N24N3N6P2P22

P25P5R1

R23

R26R4T21

T24T3T6U2U22

U25U5V1

V23

V26V4W21

W24W3W6Y2Y22

AE5

Y25

Y5

NC5

NC6

VID1

VID2

VID3

VID4

AE4

AE3

AE2

AE1

AE21

AF24

CPU_VID4
CPU_VID3
CPU_VID2
CPU_VID1
CPU_VID0

F25

VSS_125

VSS_126

VSS_127

ITPCLKOUT0
ITPCLKOUT1

PROCHOT#

VCCVID

AF4

F5

VSS_128

DP#0
DP#1
DP#2
DP#3

GTLREF0
GTLREF1
GTLREF2
GTLREF3

NC1
NC2

TESTHI0
TESTHI1
TESTHI2
TESTHI3
TESTHI4
TESTHI5

TESTHI8
TESTHI9

TESTHI10

GHI#

DSTBN#0
DSTBN#1
DSTBN#2
DSTBN#3

DSTBP#0
DSTBP#1
DSTBP#2
DSTBP#3

ADSTB#0
ADSTB#1

DBI#0
DBI#1
DBI#2
DBI#3

DBR#

MCERR#

SLP#

VSSA

VSSSENSE

NC3
NC4

NorthWood

2

J26
K25
K26
L25

AA21
AA6
F20
F6
A22
A7

AD24
AA2
AC21
AC20
AC24
AC23
AA20
AB22
U6
W4
Y3
A6

E22
K22
R22
W22

F21
J23
P23
W23

L5
R5

E21
G25
P26
V21

AE25

C3
V6
AB26

AD22
A4

AD2
AD3

All of these pin
connected
inside

TESTTHI0_1
TESTTHI2_7

ITPCLKOUT0
ITPCLKOUT1
TESTTHI8_10

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3

H_PROCHOT#

H_SLP#

H_VSSA

1

+1.2VS

C135
.1UF_0402

GTL Reference Voltage

Trace width > 7 mils

+CPU_CORE

R192 56_0402

1 2

R193 56_0402

1 2

R200 56_0402

1 2

R195 56_0402

1 2

R225 56_0402

1 2

PM_CPUPERF#
H_DSTBN#[0..3]

H_DSTBP#[0..3]

H_DBI#[0..3]

R232 56_0402

1 2

TP2

H_ADSTB#0 6
H_ADSTB#1 6

12

R188 200_0402

R104

1K_0402

CPU_VID4
CPU_VID3
CPU_VID2
CPU_VID1
CPU_VID0

PM_CPUPERF# 18

H_DSTBN#[0..3] 6

H_DSTBP#[0..3] 6

H_DBI#[0..3] 6

12

+CPU_CORE

H_SLP# 18
+CPU_CORE

+3VS

182736

1

+CPU_CORE

12

R197

12

C343

CPU_VID4 39
CPU_VID3 39
CPU_VID2 39
CPU_VID1 39
CPU_VID0 39

49.9_1%_0402

12

R196
100_1%_0402

+H_GTLREF1

C338
220PF_0402

1UF_10V

Layout note :

1. Place R_A and R_B near CPU.

2. Place decoupling cap 220PF near CPU.(Within
500mils)

45

RP112

8P4R_1K_0804

VDD1

ALERT

THERM

GND

W=15mil

1 2

+5VALW

+5VS

R246

R519

1 2

1K_0402

+3VALW

R83

10K_0402

1 2

R82

@0_0402

PROCHOT#

4

PROCHOT# 29 MAINP37,40

1
6
4
5

PCIRST#6,13,18,21,22,23,29,34,35,36

@301_1%_0402

2

G

1 3

D

S

Q21

2N7002

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

3

R241

470_0402

1 2

Q23

3904

1 2

1

2

3

Q19
3904

1
3

2

R238

1 2

470_0402

H_THERMTRIP#

PROCHOT#

2

R248

0_0402

R244

1K_0402

+3VS

1
3

R242
470_0402

1 2

1 2

2

Q22

Q18

3904

3904

1
3

R237

2

1 2

Title

Size Document Number Rev

Date: Sheet

H_PROCHOT#

470_0402

Compal Electronics, Inc.

SCHEMATIC, M/B LA-1302

401216

1

4

of

1B

45Wednesday, May 29, 2002

Thermal Sensor ADM1032AR

H_THERMDA

R85

2200PF_0402

H_THERMDC

@0_0402

C122

R81

@0_0402

12

THERMDA_59129

THERMDC_59129

A A

EC_SMC224,29,34
EC_SMD224,29,34

Address:1001_100X

5

.1UF_0402

U56

2

D+

3

D-

8

SCLK

7

SDATA

ADM1032AR_SOP-8

R02
PIR1

C129

A

Layout note :

Place close to CPU, Use 2~3 vias per PAD.
Place .22uF caps underneath balls on solder side.
Place 10uF caps on the peripheral near balls.
Use 2~3 vias per PAD.

Please place these cap in the socket cavity area

+CPU_CORE

1 1

12

C357

10UF_6.3V_1206_X7R

+CPU_CORE

12

C347

10UF_6.3V_1206_X7R

12

C370
10UF_6.3V_1206_X7R

12

C367
10UF_6.3V_1206_X7R

12

C378
10UF_6.3V_1206_X7R

12

C376
10UF_6.3V_1206_X7R

12

C346
10UF_6.3V_1206_X7R

12

C345
10UF_6.3V_1206_X7R

Please place these cap on the socket north side

+CPU_CORE

12

C102

10UF_6.3V_1206_X7R

2 2

+CPU_CORE

12

C363

10UF_6.3V_1206_X7R

+CPU_CORE

12

C404

10UF_6.3V_1206_X7R

12

C379
10UF_6.3V_1206_X7R

12

C339
10UF_6.3V_1206_X7R

12

C331
10UF_6.3V_1206_X7R

12

C350
10UF_6.3V_1206_X7R

12

C352
10UF_6.3V_1206_X7R

12

C380
10UF_6.3V_1206_X7R

12

C340
10UF_6.3V_1206_X7R

12

C368
10UF_6.3V_1206_X7R

12

C428
10UF_6.3V_1206_X7R

B

12

C355
10UF_6.3V_1206_X7R

12

C358
10UF_6.3V_1206_X7R

12

C421
10UF_6.3V_1206_X7R

12

C397
10UF_6.3V_1206_X7R

C

Layout note :

Place close to CPU power and
ground pin as possible
(<1inch)

R02

12

C73

+

220UF_D2_4V_25m

12

C715

+

4SP560M

12

C79
.22UF_X7R

PIR2

12

+CPU_CORE

+CPU_CORE

+CPU_CORE

D

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

Used ESR 15m ohm cap total ESR=2.5m ohm

C95
.22UF_X7R

12

C126

+

@220UF_D2_4V_25m

12

C342

+

220UF_D2_4V_25m

12

C100
.22UF_X7R

12

C105
.22UF_X7R

12

+

12

+

C72
@220UF_D2_4V_25m

C364
220UF_D2_4V_25m

12

C78
.22UF_X7R

+

12

12

C60
@220UF_D2_4V_25m

12

C716

+

4SP560M

12

C103

C96

.22UF_X7R

.22UF_X7R

12

C94

+

@220UF_D2_4V_25m

12

C390

+

@220UF_D2_4V_25m

12

C111
.22UF_X7R

12

C113
.22UF_X7R

12

C99
.22UF_X7R

E

Please place these cap on the socket south side

+CPU_CORE

M1

3 3

4 4

12

C387

10UF_6.3V_1206_X7R

+CPU_CORE

12

C67

10UF_6.3V_1206_X7R

+CPU_CORE

12

C61

10UF_6.3V_1206_X7R

12

C150
10UF_6.3V_1206_X7R

12

C334
10UF_6.3V_1206_X7R

12

C112
10UF_6.3V_1206_X7R

12

C408
10UF_6.3V_1206_X7R

12

C383
10UF_6.3V_1206_X7R

12

C80
10UF_6.3V_1206_X7R

12

C56
10UF_6.3V_1206_X7R

12

C372
10UF_6.3V_1206_X7R

12

C97
10UF_6.3V_1206_X7R

EMI Clip PAD for CPU

PAD1

@PAD-2.5X3

1

PAD3

@PAD-2.5X3

PAD5

1

@PAD-2.5X3

A

1

PAD7

@PAD-2.5X3

1

R03 PIR 30

12

C305
10UF_6.3V_1206_X7R

12

C393
10UF_6.3V_1206_X7R

B

CF23

1

FIDUCIAL MARK

CF20

1

FIDUCIAL MARK

CF3

1

FIDUCIAL MARK

CF1

1

FIDUCIAL MARK

Fiducial Mar k

FD3

1

FIDUCIAL MARK

CF10

1

FIDUCIAL MARK

CF6

1

FIDUCIAL MARK

CF19

1

FIDUCIAL MARK

CF4

1

FIDUCIAL MARK

C

FD2

1

FIDUCIAL MARK

CF11

1

FIDUCIAL MARK

CF21

1

FIDUCIAL MARK

CF25

1

FIDUCIAL MARK

CF8

1

FIDUCIAL MARK

HOLEA

FD1

1

FIDUCIAL MARK

CF5

1

FIDUCIAL MARK

CF13

1

FIDUCIAL MARK

CF24

1

FIDUCIAL MARK

CF2

1

FIDUCIAL MARK

H1

1

1

H2

HOLEA

HOLEA

1

1

FD4

1

FIDUCIAL MARK

CF7

1

FIDUCIAL MARK

CF12

1

FIDUCIAL MARK

CF28

1

FIDUCIAL MARK

CF9

1

FIDUCIAL MARK

H4

1

1

FIDUCIAL MARK

FIDUCIAL MARK

FIDUCIAL MARK

FIDUCIAL MARK

FIDUCIAL MARK

H8

HOLEA

1

1

1

1

1

1

FD6

CF15

CF18

CF27

CF17

H3

HOLEA

HOLEA

1

1

FD5

1

FIDUCIAL MARK

CF16

1

FIDUCIAL MARK

CF14

1

FIDUCIAL MARK

CF26

1

FIDUCIAL MARK

CF22

1

FIDUCIAL MARK

H5

1

1

H6

HOLEA

1

1

1

D

H11

H7

HOLEB

1

HOLEH

1

H13

H9

H10

HOLEB

HOLEB

1

1

1

1

H19

H12

HOLEH

HOLEH

1

1

1

1

1

1

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1302

Size Document Number Rev

401216

Date: Sheet

HOLEB

1

HOLEH

H21

HOLEE

1

1

1

H22

H15

HOLEI

1

1

1

1

H16

HOLEF

1

H23

HOLEJ

1

H14

HOLEC

1

1

1

H20

HOLEL

1

1

1

E

HOLEI

1

H17

HOLED

1

H18

HOLEK

1

5

M2

HOLEI

1

1

1

H24

HOLEK

1

1

1

H25

HOLEL

1

1

1

1B

45Wednesday, May 29, 2002

of

A

B

C

D

E

HA#[3..31]3

1 1

H_ADSTB#04
H_ADSTB#14

H_RESET#4

H_TRDY#4

HREQ#[0..4]3

12

12

R213
150_1%_0402

12

12

R211
150_1%_0402

HDEFER#3

H_DBSY#4

H_DRDY#4

CLK_GHT12

CLK_GHT#12

H_DBI#[0..3]4

12

12

HBPRI#3

HLOCK#3

HIT#3
HITM#3
HBR0#3

HADS#3

HBNR#3

H_RS#04
H_RS#14
H_RS#24

C356
.01UF_0402

C351
.01UF_0402

2 2

3 3

+CPU_CORE

R212

301_1%_0402

+CPU_CORE

R208

301_1%_0402

4 4

HA#[3..31]

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

PCIRST#4,13,18,21,22,23,29,34,35,36

HREQ#[0..4]

H_DBI#[0..3]

24.9_1%

A

CLK_GHT
CLK_GHT#

R204

+1.5VS

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3

H_SWNG0
H_SWNG1

12

R218 8.2K_0402

R206 8.2K_0402

R199 8.2K_0402

12

R210

24.9_1%

12

12

12

T4
T5
T3
U3
R3
P7
R2
P4
R6
P5
P3
N2
N7
N3

K4
M4
M3

L3

L5

K3

J2
M5

J3

L2

H4

N5
G2
M6

L7

R5

N6

AE17

U7

Y4

Y7

W5
J27
H26

V5

V4

Y5

Y3

V7

V3

W3

W2
W7
W6

U6

T7

R7

U5

U2

J8

K8

AD5
AG4
AH9

AD15

AA7

AD13

AC2

AC13

AGP_ADSTB0

AGP_ADSTB1

AGP_SBSTB

U9A

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

HADSTB#0
HADSTB#1

CPURST#
HTRDY#
DEFER#
BPRI#
HLOCK#
RSTIN#
TESTIN#
DBSY#
DRDY#
HIT#
HITM#
BREQ#0
ADS#
BNR#

RS#0
RS#1
RS#2

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

BCLK
BCLK#

DBI#0
DBI#1
DBI#2
DBI#3

HSWNG0
HSWNG1

HRCOMP0
HRCOMP1

H_DSTBN#[0..3]
H_DSTBP#[0..3]

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8

HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42

HOST

HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

HDSTBN#0
HDSTBN#1
HDSTBN#2
HDSTBN#3
HDSTBP#0
HDSTBP#1
HDSTBP#2
HDSTBP#3

HVREF0
HVREF1
HVREF2
HVREF3
HVREF4

BROOKDALE(MCH-M)

H_DSTBN#[0..3] 4
H_DSTBP#[0..3] 4

R217 @8.2K_0402

R205 @8.2K_0402

R198 @8.2K_0402

AA2
AB5
AA5
AB3
AB4
AC5
AA3
AA6
AE3
AB7
AD7
AC7
AC6
AC3
AC8
AE2
AG5
AG2
AE8
AF6
AH2
AF3
AG3
AE5
AH7
AH3
AF4
AG8
AG7
AG6
AF8
AH5
AC11
AC12
AE9
AC9
AE10
AD9
AG9
AC10
AE12
AF10
AG11
AG10
AH11
AG12
AE13
AF12
AG13
AH13
AC14
AF14
AG14
AE14
AG15
AG16
AG17
AH15
AC17
AF16
AE15
AH17
AD17
AE16

AD4
AE6
AE11
AC15
AD3
AE7
AD11
AC16

M7
R8
Y8
AB11
AB17

AGP_ADSTB0#

12

AGP_ADSTB1#

12

AGP_SBSTB#

12

B

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

HD#[0..63]

+V_MCH_GTLREF

GTL Reference Voltage

Layout note :

1. Place R_E and R_F near MCH

2. Place decoupling cap 220PF near MCH pin.(Within
500mils)

AGP_ST0
0=System memory is DDR
1=System memory is SDR

HD#[0..63] 3

+CPU_CORE

12

R_E

12

R_F

100_1%_0402

AGP_AD[0..31]13

AGP_C/BE#[0..3]13

AGP_ST[0..2]13

R223

49.9_1%_0402

R227

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

AGP_AD[0..31] HUB_PD[0..10]

AGP_ADSTB013
AGP_ADSTB0#13
AGP_ADSTB113
AGP_ADSTB1#13
AGP_SBSTB13
AGP_SBSTB#13

AGP_FRAME#13
AGP_DEVSEL#13
AGP_IRDY#13
AGP_TRDY#13
AGP_STOP#13
AGP_PAR13
AGP_REQ#13
AGP_GNT#13

Trace
width>=7mils

C362

C394

220PF_0402

1UF_10V

R201 2K_1%_0402

AGP_ST0 AGP_ST1

C

AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31

AGP_C/BE#0
AGP_C/BE#1
AGP_C/BE#2
AGP_C/BE#3

AGP_ST0
AGP_ST1
AGP_ST2

AGP_ADSTB0
AGP_ADSTB0#
AGP_ADSTB1
AGP_ADSTB1#
AGP_SBSTB
AGP_SBSTB#

AGP_FRAME#
AGP_DEVSEL#
AGP_IRDY#
AGP_TRDY#
AGP_STOP#
AGP_PAR
AGP_REQ#
AGP_GNT#
AGP_PIPE#

12

U9B

R27

G_AD0

R28

G_AD1

T25

G_AD2

R25

G_AD3

T26

G_AD4

T27

G_AD5

U27

G_AD6

U28

G_AD7

V26

G_AD8

V27

G_AD9

T23

G_AD10

U23

G_AD11

T24

G_AD12

U24

G_AD13

U25

G_AD14

V24

G_AD15

Y27

G_AD16

Y26

G_AD17

AA28

G_AD18

AB25

G_AD19

AB27

G_AD20

AA27

G_AD21

AB26

G_AD22

Y23

G_AD23

AB23

G_AD24

AA24

G_AD25

AA25

G_AD26

AB24

G_AD27

AC25

G_AD28

AC24

G_AD29

AC22

G_AD30

AD24

G_AD31

V25

G_C/BE#0

V23

G_C/BE#1

Y25

G_C/BE#2

AA23

G_C/BE#3

AG25

ST0

AF24

ST1

AG26

ST2

R24

AD_STB0

R23

AD_STB#0

AC27

AD_STB1

AC28

AD_STB#1

AF27

SB_STB

AF26

SB_STB#

Y24

G_FRAME#

W28

G_DEVSEL#

W27

G_IRDY#

W24

G_TRDY#

W23

G_STOP#

W25

G_PAR

AG24

G_REQ#

AH25

G_GNT#

AF22

PIPE#

N22

VSS0

K27

VSS1

K5

VSS2

L24

VSS3

M23

VSS4

K7

VSS5

J26

VSS6

A3

VSS7

A7

VSS8

A11

VSS9

A15

VSS10

R203 @1K_0402

12

AGP_FRAME#
AGP_TRDY#
AGP_PAR
AGP_STOP#

AGP_GNT#
AGP_REQ#

AGP_IRDY#
AGP_DEVSEL#

AGP_WBF#
AGP_PIPE#
AGP_RBF#

AGP_ST2

HUB

AGP

BROOKDALE(MCH-M)

R02
PIR3

1 8
2 7
3 6
4 5

1 4
2 3

1 4
2 3

1 8
2 7
3 6
4 5

R202 6.2K_0402

12

6.2K_0402

R189

12

HI_10

HI_STB

HI_STB#

HLRCOMP

HI_REF

SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7

AGPREF

GRCOMP

RBF#

WBF#

VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40

+1.5VS

D

P25

HI_0

P24

HI_1

N27

HI_2

P23

HI_3

M26

HI_4

M25

HI_5

L28

HI_6

L27

HI_7

M27

HI_8

N28

HI_9

M24

N25
N24

P27
P26

AH28
AH27
AG28
AG27
AE28
AE27
AE24
AE25

AA21
AD25
P22

66IN

AE22
AE23

A19
A23
A27
D5
D9
D13
D17
D21
E1
E4
E26
E29
F8
F12
F16
F20
F24
G26
H9
H11
H13
H15
H17
H19
H21
J1
J4
J6
J22
J29

RP111
@8P4R_8.2K_0804

RP11
@4P2R_8.2K

RP15
@4P2R_8.2K

RP12
@8P4R_8.2K_0804

AGP_ST1
0=533Mhz
1=400Mhz

HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10

HLRCOMP

GRCOMP

AGP_RBF#
AGP_WBF#

HUB_PD[0..10] 18

HUB_PSTRB 18
HUB_PSTRB# 18

R220

1 2

AGP_NBREF

AGP_SBA[0..7]

Place this cap near MCH

+AGPREF

12

C361
.1UF_0402

R66

40.2_1%

12

CLK_AGP_MCH 12

AGP_RBF# 13
AGP_WBF# 13

+1.5VS

12

R166
1K_1%_0402

12

R168
1K_1%_0402

+1.8VS

R214

301_1%_0402

AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7

CLK_AGP_MCH

R_C

R_D

Title

Size Document Number Rev

Date: Sheet

Comp a l Electro nics , In c .

SCHEMATIC, M/B LA -1302

401216

+1.8VS

36.5_1%

AGP_SBA[0..7] 13

Place this cap near AGP

12

C282
.1UF_0402

HUB Interface Reference

Layout note :

1. Place R_C and R_D close to MCH

2. Place capacitors near MCH.

12

12

C371
@470PF

12

R215
@56.2_1%

12

R216

R219
301_1%_0402

0_0402

12

C385
.01UF_0402

E

12

+VS_HUBREF

12

C384
.01UF_0402

Place closely
ball P26

Place closely pin P22

CLK_AGP_MCH

R222
@33_0402

1 2

C386
@10PF_0402

+VS_HUBREF

645Wednesday, May 29, 2002

of

1B

A

B

C

D

E

U9D

M8

+CPU_CORE

1 1

+2.5V

2 2

3 3

4 4

VTT_0

U8

VTT_1

AA9

VTT_2

AB8

VTT_3

AB18

VTT_4

AB20

VTT_5

AC19

VTT_6

AD18

VTT_7

AD20

VTT_8

AE19

VTT_9

AE21

VTT_10

AF18

VTT_11

AF20

VTT_12

AG19

VTT_13

AG21

VTT_14

AG23

VTT_15

AJ19

VTT_16

AJ21

VTT_17

AJ23

VTT_18

A5

VCCSM1

A9

VCCSM2

A13

VCCSM3

A17

VCCSM4

A21

VCCSM5

A25

VCCSM6

C1

VCCSM7

C29

VCCSM8

D7

VCCSM9

D11

VCCSM10

D15

VCCSM11

D19

VCCSM12

D23

VCCSM13

D25

VCCSM14

F6

VCCSM15

F10

VCCSM16

F14

VCCSM17

F18

VCCSM18

F22

VCCSM19

G1

VCCSM20

G4

VCCSM21

G29

VCCSM22

H8

VCCSM23

H10

VCCSM24

H12

VCCSM25

H14

VCCSM26

H16

VCCSM27

H18

VCCSM28

H20

VCCSM29

H22

VCCSM30

H24

VCCSM31

K22

VCCSM32

K24

VCCSM33

K26

VCCSM34

L23

VCCSM35

K6

VCCSM36

J5

VCCSM37

J7

VCCSM38

L1

VSS41

L4

VSS42

L6

VSS43

L8

VSS44

L22

VSS45

L26

VSS46

N1

VSS47

N4

VSS48

N8

VSS49

N13

VSS50

N15

VSS51

N17

VSS52

N29

VSS53

P6

VSS54

P8

VSS55

P14

VSS56

P16

VSS57

R1

VSS58

R4

VSS59

R13

VSS60

R15

VSS61

R17

VSS62

R26

VSS63

T6

VSS64

T8

VSS65

T14

VSS66

T16

VSS67

T22

VSS68

U1

VSS69

U4

VSS70

U15

VSS71

U29

VSS72

V6

VSS73

V8

VSS74

V22

VSS75

W1

VSS76

W4

VSS77

W8

VSS78

W26

VSS79

Y6

VSS80

Y22

VSS81

AA1

VSS82

BROOKDALE(MCH-M)

POWER/GND

VCC1_5_0
VCC1_5_1
VCC1_5_2
VCC1_5_3
VCC1_5_4
VCC1_5_5
VCC1_5_6
VCC1_5_7
VCC1_5_8

VCC1_5_9
VCC1_5_10
VCC1_5_11
VCC1_5_12
VCC1_5_13
VCC1_5_14
VCC1_5_15

VCC1_5_16
VCC1_5_17
VCC1_5_18
VCC1_5_19
VCC1_5_20
VCC1_5_21
VCC1_5_22
VCC1_5_23
VCC1_5_24
VCC1_5_25

VCC1_8_0

VCC1_8_1

VCC1_8_2

VCC1_8_3

VCC1_8_4

VCCGA1
VCCHA1

VSSGA2

VSSHA2

VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141

R22
R29
U22
U26
W22
W29
AA22
AA26
AB21
AC29
AD21
AD23
AE26
AF23
AG29
AJ25

N14
N16
P13
P15
P17
R14
R16
T15
U14
U16

L29
N26
L25
M22
N23

T17
T13

U17
U13

AA4
AA8
AA29
AB6
AB9
AB10
AB12
AB13
AB14
AB15
AB16
AB19
AB22
AC1
AC4
AC18
AC20
AC21
AC23
AC26
AD6
AD8
AD10
AD12
AD14
AD16
AD19
AD22
AE1
AE4
AE18
AE20
AE29
AF5
AF7
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF25
AG1
AG18
AG20
AG22
AH19
AH21
AH23
AJ3
AJ5
AJ7
AJ9
AJ11
AJ13
AJ15
AJ17
AJ27

VCC_MCH_PLL1
VCC_MCH_PLL0

VSS_MCH_PLL1
VSS_MCH_PLL0

+1.5VS

Layout note :
Trace width 5mil ; Spacing

10mil
Trace A to ball U13/T13 or
U17/T7 =1.5" Max

+1.5VS

+1.8VS

12

"Trace A"

12

+

"Trace A"

"Trace A"

L34

4.7UH_30mA

"Trace A"

C381

33UF_D2_16V

Murata LQG21N4R7K10

12

L35

4.7UH_30mA

12

C389

+

33UF_D2_16V

DDR_SDQ[0..63]9

DDR_CB[0..7]9

SDREF

DDR_SDQ[0..63]

DDR_CB[0..7]

R235

DDR_SDQ0
DDR_SDQ1
DDR_SDQ2
DDR_SDQ3
DDR_SDQ4
DDR_SDQ5
DDR_SDQ6
DDR_SDQ7
DDR_SDQ8
DDR_SDQ9
DDR_SDQ10
DDR_SDQ11
DDR_SDQ12
DDR_SDQ13
DDR_SDQ14
DDR_SDQ15
DDR_SDQ16
DDR_SDQ17
DDR_SDQ18
DDR_SDQ19
DDR_SDQ20
DDR_SDQ21
DDR_SDQ22
DDR_SDQ23
DDR_SDQ24
DDR_SDQ25
DDR_SDQ26
DDR_SDQ27
DDR_SDQ28
DDR_SDQ29
DDR_SDQ30
DDR_SDQ31
DDR_SDQ32
DDR_SDQ33
DDR_SDQ34
DDR_SDQ35
DDR_SDQ36
DDR_SDQ37
DDR_SDQ38
DDR_SDQ39
DDR_SDQ40
DDR_SDQ41
DDR_SDQ42
DDR_SDQ43
DDR_SDQ44
DDR_SDQ45
DDR_SDQ46
DDR_SDQ47
DDR_SDQ48
DDR_SDQ49
DDR_SDQ50
DDR_SDQ51
DDR_SDQ52
DDR_SDQ53
DDR_SDQ54
DDR_SDQ55
DDR_SDQ56
DDR_SDQ57
DDR_SDQ58
DDR_SDQ59
DDR_SDQ60
DDR_SDQ61
DDR_SDQ62
DDR_SDQ63

DDR_CB0
DDR_CB1
DDR_CB2
DDR_CB3
DDR_CB4
DDR_CB5
DDR_CB6
DDR_CB7

SDREF_M

12

0_0402

Layout note
Please
closely
pinJ21 and
J9

12

C402
.1UF_0402_X5R

U9C

G28

SDQ0

F27

SDQ1

C28

SDQ2

E28

SDQ3

H25

SDQ4

G27

SDQ5

F25

SDQ6

B28

SDQ7

E27

SDQ8

C27

SDQ9

B25

SDQ10

C25

SDQ11

B27

SDQ12

D27

SDQ13

D26

SDQ14

E25

SDQ15

D24

SDQ16

E23

SDQ17

C22

SDQ18

E21

SDQ19

C24

SDQ20

B23

SDQ21

D22

SDQ22

B21

SDQ23

C21

SDQ24

D20

SDQ25

C19

SDQ26

D18

SDQ27

C20

SDQ28

E19

SDQ29

C18

SDQ30

E17

SDQ31

E13

SDQ32

C12

SDQ33

B11

SDQ34

C10

SDQ35

B13

SDQ36

C13

SDQ37

C11

SDQ38

D10

SDQ39

E10

SDQ40

C9

SDQ41

D8

SDQ42

E8

SDQ43

E11

SDQ44

B9

SDQ45

B7

SDQ46

C7

SDQ47

C6

SDQ48

D6

SDQ49

D4

SDQ50

B3

SDQ51

E6

SDQ52

B5

SDQ53

C4

SDQ54

E5

SDQ55

C3

SDQ56

D3

SDQ57

F4

SDQ58

F3

SDQ59

B2

SDQ60

C2

SDQ61

E2

SDQ62

G5

SDQ63

C16

SDQ64/CB0

D16

SDQ65/CB1

B15

SDQ66/CB2

C14

SDQ67/CB3

B17

SDQ68/CB4

C17

SDQ69/CB5

C15

SDQ70/CB6

D14

SDQ71/CB7

J21

SDREF0

J9 AD26

SDREF1 NC0

BROOKDALE(MCH-M)

SCK0

SCK#0

SCK1

SCK#1

SCK2

SCK#2

SCK3

SCK#3

SCK4

SCK#4

SCK5

SCK#5

SCK6

SCK#6

SCK7

SCK#7

SCK8

SCK#8
SCS#0

SCS#1
SCS#2
SCS#3
SCS#4

MEMORY

SCS#5

SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7
SDQS8

SMA0/CS#11
SMA1/CS#10

SMA2/CS#6
SMA3/CS#9
SMA4/CS#5
SMA5/CS#8
SMA6/CS#7
SMA7/CS#4
SMA8/CS#3
SMA9/CS#0

SMA10
SMA11/CS#2
SMA12/CS#1

SBS0
SBS1

SCKE0

SCKE1

SCKE2

SCKE3

SCKE4

SCKE5

SMRCOMP

RCVENIN#

RCVENOUT#

SSI_ST

SRAS#

SWE#

SCAS#

NC1

E14
F15
J24
G25
G6
G7

G15
G14
E24
G24
H5
F5

K25
J25
G17
G16
H7
H6

E9
F7
F9
E7
G9
G10

F26
C26
C23
B19
D12
C8
C5
E3
E15

E12
F17
E16
G18
G19
E18
F19
G21
G20
F21
F13
E20
G22

G12
G13

G23
E22
H23
F23
J23
K23

J28
G3
H3

H27
F11

G11
G8

AD27

DDR_SCS#0
DDR_SCS#1
DDR_SCS#2
DDR_SCS#3

DDR_SDQS0
DDR_SDQS1
DDR_SDQS2
DDR_SDQS3
DDR_SDQS4
DDR_SDQS5
DDR_SDQS6
DDR_SDQS7
DDR_SDQS8

DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6

DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12

DDR_SBS0
DDR_SBS1

DDR_CKE0
DDR_CKE1
DDR_CKE2
DDR_CKE3

SM_RCOMP

RCVIN#
RCVOUT#

DDR_SRAS#
DDR_SWE#
DDR_SCAS#

R239

DDR_SMA[0..12]

R236 30.1_1%

12

0_0402

R_J

DDR_CLK0 9
DDR_CLK0# 9
DDR_CLK1 9
DDR_CLK1# 9
DDR_CLK2 9
DDR_CLK2# 9

DDR_CLK3 10
DDR_CLK3# 10
DDR_CLK4 10
DDR_CLK4# 10
DDR_CLK5 10
DDR_CLK5# 10

DDR_SCS#0 9
DDR_SCS#1 9
DDR_SCS#2 10
DDR_SCS#3 10

DDR_SDQS0 9
DDR_SDQS1 9
DDR_SDQS2 9
DDR_SDQS3 9
DDR_SDQS4 9
DDR_SDQS5 9
DDR_SDQS6 9
DDR_SDQS7 9
DDR_SDQS8 9

DDR_SBS0 9,10
DDR_SBS1 9,10

DDR_CKE0 9
DDR_CKE1 9
DDR_CKE2 10
DDR_CKE3 10

12

C399 .1UF_0402_X5R
C411 @47PF_0402

DDR_SRAS# 9,10
DDR_SWE# 9,10
DDR_SCAS# 9,10

DDR_SMA[0..12] 9,10

Layout note

+1.25VS

Layout note
Place R_J closely Ball
H3<40mil,Ball H3 to G3 trace
must
routing 1"

Place R620
closely pinJ28

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

Title

Size Document Number Rev

Date: Sheet

Comp a l Electro nics , In c .

SCHEMATIC, M/B LA -1302

401216

745Wednesday, May 29, 2002

E

1B

of

5

4

3

2

1

Layout note :

Distribute as close as p ossi ble
to MCH Processor Quad rant.(between VTTFSB and VSS pin)

+CPU_CORE

D D

12

C336
.1UF_0402_X 5R

+CPU_CORE

12

C348
.1UF_0402_X 5R

+CPU_CORE

12

C374

10UF_6.3V_1206 _X5R

C C

Layout note :

Distribute as close as p ossi ble
to MCH Processor Quadrant.(between VCCAGP/VCCCORE
and VSS pin)

Processor system bus

12

C337
.1UF_0402_X 5R

12

C335
.1UF_0402_X 5R

12

10UF_6.3V_120 6_X5R

C365

12

C341
.1UF_0402_X5 R

12

C344
.1UF_0402_X5 R

AGP/CORE

12

C359
.1UF_0402_X5 R

12

C392
.1UF_0402_X5 R

12

C332

10UF_6.3V_120 6_X5R

12

C373
.1UF_0402_X 5R

12

C353
.1UF_0402_X 5R

Layout note :

Distribute as close as p ossi ble
to MCH Processor Quadrant .(between VCCSM and VSS pin)

+2.5V

12

C407
.1UF_0402_X5 R

+2.5V

12

C426
.1UF_0402_X5 R

+2.5V

12

C403
.1UF_0402_X5 R

+2.5V

12

C405

+

150UF_6.3V_D2

DDR Memory interface

12

C418
.1UF_0402_X 5R

12

C409
.1UF_0402_X 5R

12

C412
.1UF_0402_X 5R

12

C415
.1UF_0402_X 5R

12

C410
.1UF_0402_X 5R

12

C422
.1UF_0402_X 5R

12

C400
.1UF_0402_X 5R

12

C420
.1UF_0402_X 5R

12

C414
.1UF_0402_X 5R

12

C416
.1UF_0402_X5 R

12

C406
.1UF_0402_X5 R

12

C423
.1UF_0402_X5 R

12

C413

22UF_10V_1 206

12

C417

22UF_10V_12 06

+1.5VS

12

C349
.1UF_0402_X 5R

B B

+1.5VS

12

C398

10UF_6.3V_1206 _X5R

Layout note :

Distribute as close as p ossi ble
to MCH Processor Quadrant .(between VCCHL and VSS pin)

+1.8VS

A A

12

C391

10UF_6.3V_1206 _X5R

12

C360
.1UF_0402_X 5R

12

10UF_6.3V_120 6_X5R

Hub-Link

12

C395
.1UF_0402_X 5R

5

C401

12

C354
.1UF_0402_X5 R

12

C388
.1UF_0402_X5 R

12

C366

+

150UF_6.3V_D2

12

12

C375
.1UF_0402_X5 R

C396
.1UF_0402_X 5R

12

C369
.1UF_0402_X 5R

4

12

C382
.1UF_0402_X 5R

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

3

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-1302
401216

845Wednesday, May 29, 2002

1

1B

of

A

DDR_SDQ0
DDR_SDQ4

DDR_SDQ1
DDR_SDQ5

DDR_SDQ6

1 1

Layout note

Place these resistor
closely DIMM0,
all trace length<750mil

2 2

3 3

DDR_SDQ[0..63]7
DDR_SDQS[0..8]7

4 4

A

DDR_SDQS0

DDR_SDQ2
DDR_SDQ3

DDR_SDQ8
DDR_SDQ7

DDR_SDQ9
DDR_SDQ12

DDR_SDQS1
DDR_SDQ13

DDR_SDQ10
DDR_SDQ14

DDR_SDQ15
DDR_SDQ11

DDR_SDQ16
DDR_SDQ20

DDR_SDQ21
DDR_SDQ17

DDR_SDQ18
DDR_SDQS2

DDR_SDQ19
DDR_SDQ22

DDR_SDQ24
DDR_SDQ23

DDR_SDQ25
DDR_SDQ28

DDR_SDQS3
DDR_SDQ29

DDR_SDQ[0..63]

DDR_CB[0..7]7

DDR_CB[0..7]
DDR_SDQS[0..8]

DDR_SDQ56
DDR_SDQ51

DDR_SDQ60
DDR_SDQ57

DDR_SDQS7
DDR_SDQ61

DDR_SDQ62
DDR_SDQ58

DDR_SDQ63 DDR_DQ63
DDR_SDQ59 DDR_DQ59

B

RP42 4P2R_22
1 4
2 3

RP19 4P2R_22
1 4
2 3

RP43 4P2R_22
1 4
2 3

RP20 4P2R_22
1 4
2 3

RP44 4P2R_22
1 4
2 3

RP21 4P2R_22
1 4
2 3

RP45 4P2R_22
1 4
2 3

RP22 4P2R_22
1 4
2 3

RP46 4P2R_22
1 4
2 3

RP23 4P2R_22
1 4
2 3

RP47 4P2R_22
1 4
2 3

RP24 4P2R_22
1 4
2 3

RP48 4P2R_22
1 4
2 3

RP25 4P2R_22
1 4
2 3

RP49 4P2R_22
1 4
2 3

RP26 4P2R_22
1 4
2 3

RP61 4P2R_22
1 4
2 3

RP38 4P2R_22
1 4
2 3

RP62 4P2R_22
1 4
2 3

RP39 4P2R_22
1 4
2 3

RP63 4P2R_22
1 4
2 3

B

DDR_DQ0
DDR_DQ4

DDR_DQ1
DDR_DQ5

DDR_DQ6
DDR_DQS0

DDR_DQ2
DDR_DQ3

DDR_DQ8
DDR_DQ7

DDR_DQ9
DDR_DQ12

DDR_DQS1
DDR_DQ13

DDR_DQ10
DDR_DQ14

DDR_DQ15
DDR_DQ11

DDR_DQ16
DDR_DQ20

DDR_DQ21
DDR_DQ17

DDR_DQ18
DDR_DQS2

DDR_DQ19
DDR_DQ22

DDR_DQ24
DDR_DQ23

DDR_DQ25
DDR_DQ28

DDR_DQS3
DDR_DQ29

DDR_DQ56
DDR_DQ51

DDR_DQ60
DDR_DQ57

DDR_DQS7
DDR_DQ61

DDR_DQ62
DDR_DQ58

DDR_SDQ30
DDR_SDQ26

DDR_SDQ31
DDR_SDQ27

DDR_CB5
DDR_CB4

DDR_CB1
DDR_CB0

DDR_CB2
DDR_SDQS8

DDR_CB3
DDR_CB6

DDR_CB7

DDR_SDQ36
DDR_SDQ32

DDR_SDQ33
DDR_SDQ37

DDR_SDQ38
DDR_SDQS4

DDR_SDQ39
DDR_SDQ34

DDR_SDQ44
DDR_SDQ35

DDR_SDQ45
DDR_SDQ40

DDR_SDQS5
DDR_SDQ41

DDR_SDQ43
DDR_SDQ42

DDR_SDQ47
DDR_SDQ46

DDR_SDQ49
DDR_SDQ48

DDR_SDQ53
DDR_SDQ52

DDR_SDQ54
DDR_SDQS6

DDR_SDQ55
DDR_SDQ50

C

RP50 4P2R_22
1 4
2 3

RP27 4P2R_22
1 4
2 3

RP51 4P2R_22
1 4
2 3

RP28 4P2R_22
1 4
2 3

RP52 4P2R_22
1 4
2 3

RP29 4P2R_22
1 4
2 3

RP53 4P2R_22
1 4
2 3

RP40 4P2R_22
1 4
2 3

RP55 4P2R_22
1 4
2 3

RP32 4P2R_22
1 4
2 3

RP56 4P2R_22
1 4
2 3

RP33 4P2R_22
1 4
2 3

RP57 4P2R_22
1 4
2 3

RP34 4P2R_22
1 4
2 3

RP58 4P2R_22
1 4
2 3

RP35 4P2R_22
1 4
2 3

RP59 4P2R_22
1 4
2 3

RP36 4P2R_22
1 4
2 3

RP60 4P2R_22
1 4
2 3

RP37 4P2R_22
1 4
2 3

C

DDR_DQ30
DDR_DQ26

DDR_DQ31
DDR_DQ27

DDR_F_CB5
DDR_F_CB4

DDR_F_CB1
DDR_F_CB0

DDR_F_CB2
DDR_DQS8

DDR_F_CB3
DDR_F_CB6

DDR_F_CB7

DDR_DQ36
DDR_DQ32

DDR_DQ33
DDR_DQ37

DDR_DQ38
DDR_DQS4

DDR_DQ39
DDR_DQ34

DDR_DQ44
DDR_DQ35

DDR_DQ45
DDR_DQ40

DDR_DQS5
DDR_DQ41

DDR_DQ43
DDR_DQ42

DDR_DQ47
DDR_DQ46

DDR_DQ49
DDR_DQ48

DDR_DQ53
DDR_DQ52

DDR_DQ54
DDR_DQS6

DDR_DQ55
DDR_DQ50

D

DDR_DQ4
DDR_DQ5

DDR_DQS0
DDR_DQ3

DDR_DQ7
DDR_DQ12

DDR_DQ13
DDR_DQS1

DDR_DQ14
DDR_DQ11

DDR_CLK17
DDR_CLK1#7

DDR_DQ20
DDR_DQ17

DDR_DQS2
DDR_DQ22

DDR_DQ23
DDR_DQ28

DDR_DQ29
DDR_DQS3

DDR_DQ26
DDR_DQ27

DDR_F_CB4
DDR_F_CB0 DDR_F_CB1

DDR_DQS8
DDR_F_CB6

DDR_F_CB7

DDR_CLK07
DDR_CLK0#7

DIMM_SMDATA10,12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

D

DDR_CKE1 DDR_CKE0

DDR_SMA12
DDR_SMA9

DDR_SMA7
DDR_SMA5
DDR_SMA3
DDR_SMA1

DDR_SMA10
DDR_SBS0
DDR_SWE#

DDR_SCS#0 DDR_SCS#1

DDR_DQ36
DDR_DQ33

DDR_DQS4
DDR_DQ38

DDR_DQ39
DDR_DQ44

DDR_DQ45
DDR_DQS5

DDR_DQ43
DDR_DQ47

DDR_DQ49
DDR_DQ53

DDR_DQS6
DDR_DQ54

DDR_DQ55
DDR_DQ56

DDR_DQ60
DDR_DQS7

DDR_DQ62
DDR_DQ63

DIMM_SMCLK10,12

+3VS

E

+2.5V +2.5V

JP17

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0#

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2#

93

VDD

95

CKE1

97

DU/A13

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE#

121

S0#

123

DU

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD_SPD

199

VDD_ID

DDR-SODIMM_200_Normal

VREF

DQ12
DQ13

DQ14
DQ15

DQ20
DQ21

DQ22
DQ23

DQ28
DQ29

DQ30
DQ31

DU/RESET#

CKE0

DU/BA2

RAS#
CAS#

DQ36
DQ37

DQ38
DQ39

DQ44
DQ45

DQ46
DQ47

CK1#

DQ52
DQ53

DQ54
DQ55

DQ60
DQ61

DQ62
DQ63

VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7

VDD
DM1

VSS

VDD
VDD
VSS
VSS

VDD
DM2

VSS

VDD
DM3

VSS

VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7

VSS
VSS
VDD
VDD

VSS

VDD
BA1

VSS

VDD
DM4

VSS

VDD
DM5

VSS

VDD
CK1

VSS

VDD
DM6

VSS

VDD
DM7

VSS

VDD
SA0
SA1
SA2

F

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100

A11

102

A8

104
106

A6

108

A4

110

A2

112

A0

114
116
118
120
122

S1#

124

DU

126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DU

DIMM0

top side

E

F

DDR_DQ0
DDR_DQ1

DDR_DQ6
DDR_DQ2

DDR_DQ8
DDR_DQ9

DDR_DQ10
DDR_DQ15

DDR_DQ16
DDR_DQ21

DDR_DQ18
DDR_DQ19

DDR_DQ24
DDR_DQ25

DDR_DQ30
DDR_DQ31

DDR_F_CB5

DDR_F_CB2
DDR_F_CB3

DDR_SMA11
DDR_SMA8

DDR_SMA6
DDR_SMA4
DDR_SMA2
DDR_SMA0

DDR_SBS1
DDR_SRAS#
DDR_SCAS#

DDR_DQ32
DDR_DQ37

DDR_DQ34
DDR_DQ35

DDR_DQ40
DDR_DQ41

DDR_DQ42
DDR_DQ46

DDR_DQ48
DDR_DQ52

DDR_DQ50
DDR_DQ51

DDR_DQ57
DDR_DQ61

DDR_DQ58
DDR_DQ59

DDR_SBS07,10
DDR_SWE#7,10

DDR_SCAS#7,10
DDR_SRAS#7,10

DDR_SBS17,10

SDREF_DIMM

12

C184
.1UF_0402

G

DDR_DQ[0..63]
DDR_F_CB[0..7]
DDR_DQS[0..8]

12

SDREF

0_0402

R136

SDREF width 12 mil, space 12 mil

DDR_SMA[0..12] 7,10

DDR_SMA12
DDR_SMA9

DDR_SMA7
DDR_SMA8

DDR_SMA10
DDR_SMA0

DDR_SMA2
DDR_SMA5

DDR_SMA1
DDR_SMA3

DDR_SMA6
DDR_SMA4

DDR_SMA11

DDR_F_SMA[0..12]10

H

DDR_DQ[0..63] 10
DDR_F_CB[0..7] 10
DDR_DQS[0..8] 10

LENGTH < 3 "

RP30 4P2R_10

DDR_F_SMA12

1 4

DDR_F_SMA9

2 3

RP31 4P2R_10

DDR_F_SMA7

1 4

DDR_F_SMA8

2 3

RP41 4P2R_10

DDR_F_SMA10

1 4

DDR_F_SMA0

2 3

RP54 4P2R_10

DDR_F_SMA2

1 4

DDR_F_SMA5

2 3

RP18 4P2R_10

DDR_F_SMA1

1 4

DDR_F_SMA3

2 3

RP115 4P2R_10

DDR_F_SMA6

1 4

DDR_F_SMA4

2 3

R133 10_0402

1 2

DDR_F_SMA11

Layout note

DDR_CKE0 7DDR_CKE17

Place these resistor
closely DIMM0,
all trace length<=750mil

Layout note
Place these resistor

closely DIMM0,

DDR_SCS#1 7DDR_SCS#07

DDR_CLK2# 7
DDR_CLK2 7

all trace length Max=1.3"

RP127 4P2R_56

DDR_CKE0

1 4

DDR_CKE1

2 3

RP124 4P2R_56

DDR_SCS#0

1 4

DDR_SCS#1

2 3

Layout note
Place these resistor

closely DIMM0,
all trace

DDR_SBS0
DDR_SWE#

DDR_SCAS#
DDR_SRAS#

DDR_SBS1

Title

Size Document Number Rev

Date: Sheet

RP114 4P2R_10
1 4
2 3

RP113 4P2R_10
1 4
2 3

R134 10_0402

1 2

SCHEMATIC, M/B LA -1302

401216

G

length<=750mil

DDR_F_SBS0
DDR_F_SWE#

DDR_F_SCAS#
DDR_F_SRAS#

DDR_F_SBS1

DDR_F_SBS0 10
DDR_F_SWE# 10

DDR_F_SCAS# 10
DDR_F_SRAS# 10

DDR_F_SBS1 10

Comp a l Electro nics , In c .

945Wednesday, May 29, 2002

of

H

+1.25VS

1B

A

+1.25VS +1.25VS

RP64 4P2R_56

DDR_DQ4

1 4
2 3

RP65 4P2R_56

DDR_DQ5

1 4

DDR_DQ1

2 3

DDR_DQS0
DDR_DQ6

DDR_DQ3
DDR_DQ2

DDR_DQ7
DDR_DQ8

DDR_DQ12
DDR_DQ9

DDR_DQS1
DDR_DQ13

DDR_DQ14
DDR_DQ10

DDR_DQ11
DDR_DQ15

DDR_DQ20
DDR_DQ16

DDR_DQ17
DDR_DQ21

DDR_DQS2
DDR_DQ18

DDR_DQ22
DDR_DQ19

DDR_DQ23
DDR_DQ24

DDR_DQ28
DDR_DQ25

DDR_DQS3
DDR_DQ29

RP66 4P2R_56
1 4
2 3

RP67 4P2R_56
1 4
2 3

RP68 4P2R_56
1 4
2 3

RP69 4P2R_56
1 4
2 3

RP70 4P2R_56
1 4
2 3

RP71 4P2R_56
1 4
2 3

RP72 4P2R_56
1 4
2 3

RP132 4P2R_56
1 4
2 3

RP73 4P2R_56
1 4
2 3

RP74 4P2R_56
1 4
2 3

RP75 4P2R_56
1 4
2 3

RP130 4P2R_56
1 4
2 3

RP76 4P2R_56
1 4
2 3

RP77 4P2R_56
1 4
2 3

1 1

2 2

3 3

RP131 4P2R_56

DDR_DQ26

14

DDR_DQ30

23

RP79 4P2R_56

DDR_F_CB1

14

DDR_DQ27

23

RP78 4P2R_56

DDR_F_CB5

14

DDR_DQ31

23

RP80 4P2R_56

DDR_F_CB0

14

DDR_F_CB4

23

RP129 4P2R_56

DDR_F_CB2

14

DDR_DQS8

23

RP128 4P2R_56

DDR_F_CB3

14

DDR_F_CB6

23

RP81 4P2R_56

14

DDR_F_CB7

23

RP89 4P2R_56

DDR_DQ36

14

DDR_DQ32

23

RP122 4P2R_56

DDR_DQ37

14

DDR_DQ33

23

RP90 4P2R_56

DDR_DQ38

14

DDR_DQS4

23

RP91 4P2R_56

DDR_DQ39

14

DDR_DQ34

23

RP92 4P2R_56

DDR_DQ44

14

DDR_DQ35

23

RP93 4P2R_56

DDR_DQ40

14

DDR_DQ45

23

RP121 4P2R_56

DDR_DQS5

14

DDR_DQ41

23

RP94 4P2R_56

DDR_DQ42

14

DDR_DQ43

23

RP120 4P2R_56

DDR_DQ47

14

DDR_DQ46

23

RP95 4P2R_56

DDR_DQ48

14

DDR_DQ49

23

RP96 4P2R_56

DDR_DQ52

14

DDR_DQ53

23

RP97 4P2R_56

DDR_DQ54

14

DDR_DQS6

23

RP98 4P2R_56

DDR_DQ50

14

DDR_DQ55

23

RP99 4P2R_56

DDR_DQ51

14

DDR_DQ56

23

RP100 4P2R_56

DDR_DQ57

14

DDR_DQ60

23

RP119 4P2R_56

DDR_DQ61

14

DDR_DQS7

23

RP101 4P2R_56

DDR_DQ58

14

DDR_DQ62

23

RP118 4P2R_56

DDR_DQ59

14

DDR_DQ63

23

Layout note
Place these resistor

closely DIMM1,
all trace
length<=800mil

4 4

EMI Clip PAD for Memory D oo r

PAD12

@PAD-2.5X4

1

A

PAD13

@PAD-2.5X4

PAD14

1

@PAD-2.5X4

1

PAD9

1

@PAD-2.5X4

PAD10

@PAD-2.5X4

B

DDR_F_CB[0..7] 9

1

DDR_DQS[0..8] 9
DDR_DQ[0..63] 9
DDR_F_SMA[0..12] 9
DDR_SMA[0..12] 7,9

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

DDR_DQ[0..63]DDR_DQ0

PAD11

1

@PAD-2.5X4

B

C

DDR_CLK47
DDR_CLK4#7

DDR_CLK37
DDR_CLK3#7

DDR_F_SBS09
DDR_F_SWE#9

DIMM_SMDATA9,12

DIMM_SMCLK9,12

C

+2.5V +2.5V

JP28

1

VREF

3
DDR_DQ0
DDR_DQ1

DDR_DQS0
DDR_DQ6

DDR_DQ2
DDR_DQ8

DDR_DQ9
DDR_DQS1

DDR_DQ10
DDR_DQ15

DDR_DQ16
DDR_DQ21

DDR_DQS2
DDR_DQ18

DDR_DQ19
DDR_DQ24

DDR_DQ25
DDR_DQS3

DDR_DQ30
DDR_DQ31

DDR_F_CB5
DDR_F_CB1 DDR_F_CB0

DDR_DQS8
DDR_F_CB2

DDR_F_CB3

DDR_CKE3 DDR_CKE2

DDR_F_SMA12
DDR_F_SMA9

DDR_F_SMA7
DDR_F_SMA5
DDR_F_SMA3
DDR_F_SMA1

DDR_F_SMA10
DDR_F_SBS0
DDR_F_SWE#

DDR_SCS#2 DDR_SCS#3

DDR_DQ32
DDR_DQ37

DDR_DQS4
DDR_DQ34

DDR_DQ35
DDR_DQ40

DDR_DQ41
DDR_DQS5

DDR_DQ42
DDR_DQ46

DDR_DQ48
DDR_DQ52

DDR_DQS6
DDR_DQ50

DDR_DQ51
DDR_DQ57

DDR_DQ61
DDR_DQS7

DDR_DQ58
DDR_DQ59

+3VS

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0#

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2#

93

VDD

95

CKE1

97

DU/A13

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE#

121

S0#

123

DU

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD_SPD

199

VDD_ID

DDR-SODIMM_200_Reverse

DIMM1

bot side

D

DU/RESET#

DU/BA2

D

VREF

DQ12
DQ13

DQ14
DQ15

DQ20
DQ21

DQ22
DQ23

DQ28
DQ29

DQ30
DQ31

CKE0

RAS#
CAS#

DQ36
DQ37

DQ38
DQ39

DQ44
DQ45

DQ46
DQ47

CK1#

DQ52
DQ53

DQ54
DQ55

DQ60
DQ61

DQ62
DQ63

DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7

VDD
DM1

VSS

VDD
VDD
VSS
VSS

VDD
DM2

VSS

VDD
DM3

VSS

VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7

VSS
VSS
VDD
VDD

VSS

VDD

VSS

VDD
DM4

VSS

VDD
DM5

VSS

VDD
CK1

VSS

VDD
DM6

VSS

VDD
DM7

VSS

VDD

E

SDREF_DIMM

2
4

VSS

6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100

A11

102

A8

104
106

A6

108

A4

110

A2

112

A0

114
116

BA1

118
120
122

S1#

124

DU

126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194

SA0

196

SA1

198

SA2

200

DU

DDR_DQ4
DDR_DQ5

DDR_DQ3
DDR_DQ7

DDR_DQ12
DDR_DQ13

DDR_DQ14
DDR_DQ11

DDR_DQ20
DDR_DQ17

DDR_DQ22
DDR_DQ23

DDR_DQ28
DDR_DQ29

DDR_DQ26
DDR_DQ27

DDR_F_CB4

DDR_F_CB6
DDR_F_CB7

DDR_F_SMA11
DDR_F_SMA8

DDR_F_SMA6
DDR_F_SMA4
DDR_F_SMA2
DDR_F_SMA0

DDR_F_SBS1
DDR_F_SRAS#
DDR_F_SCAS#

DDR_DQ36
DDR_DQ33

DDR_DQ38
DDR_DQ39

DDR_DQ44
DDR_DQ45

DDR_DQ43
DDR_DQ47

DDR_DQ49
DDR_DQ53

DDR_DQ54
DDR_DQ55

DDR_DQ56
DDR_DQ60

DDR_DQ62
DDR_DQ63

+3VS

Title

Size Document Number Rev

401216

Date: Sheet

12

C456
.1UF_0402

+1.25VS

R139 56_0402

DDR_CKE2 7DDR_CKE37

R346 56_0402

DDR_F_SBS1 9
DDR_F_SRAS# 9
DDR_F_SCAS# 9
DDR_SCS#3 7DDR_SCS#27

DDR_SBS07,9
DDR_SWE#7,9

DDR_SCAS#7,9
DDR_SRAS#7,9

DDR_SBS17,9

DDR_CLK5# 7
DDR_CLK5 7

DDR_CKE3
DDR_CKE2

DDR_SCS#3
DDR_SCS#2

Layout note
Place these resistor

closely DIMM0,
all trace length
Max=1.3"

Comp a l Electro nics , In c .

SCHEMATIC, M/B LA -1302

E

RP83 4P2R_56

14
23

RP84 4P2R_56

14
23

RP85 4P2R_56

14
23

RP86 4P2R_56

14
23

RP126 4P2R_56

14
23

RP87 4P2R_56

14
23

1 2

RP125 4P2R_56

14
23

RP88 4P2R_56

14
23

1 2

RP82 4P2R_56
1 4
2 3

RP123 4P2R_56
1 4
2 3

10 45Wednesday, May 29, 2002

DDR_SMA11
DDR_SMA12

DDR_SMA6
DDR_SMA9

DDR_SMA7
DDR_SMA8

DDR_SMA4
DDR_SMA5

DDR_SMA2
DDR_SMA3

DDR_SMA0
DDR_SMA1

DDR_SMA10

DDR_SRAS#
DDR_SBS0

DDR_SCAS#
DDR_SWE#

DDR_SBS1

DDR_SBS0
DDR_SWE#

DDR_SCAS#
DDR_SRAS#

DDR_SBS1

of

+1.25VS

1B

A

B

C

D

E

Layout note :

Distribute as close as possible
to DDR-SODIMM.

+2.5V

1 1

12

C457
.1UF_0402_X5R

+2.5V +2.5V

12

C458
.1UF_0402_X5R

12

C461
.1UF_0402_X5R

12

C186
.1UF_0402_X5R

12

C460
.1UF_0402_X5R

12

C190
.1UF_0402_X5R

12

C464
.1UF_0402_X5R

12

C191
.1UF_0402_X5R

12

C465
.1UF_0402_X5R

12

C185
.1UF_0402_X5R

12

C463
.1UF_0402_X5R

12

C188
.1UF_0402_X5R

12

C189
.1UF_0402_X5R

12

C521

+

@330UF_D2_6.3V

12

C462
.1UF_0402_X5R

12

C192
.1UF_0402_X5R

12

C522

+

150UF_6.3V_D2

12

C187
.1UF_0402_X5R

12

C234

+

150UF_6.3V_D2

Layout note :

Place one cap close to every 2 pull up resistors termination to
+1.25V

2 2

+1.25VS

12

C193
.1UF_0402_X5R

+1.25VS

12

C202
.1UF_0402_X5R

12

C194
.1UF_0402_X5R

12

C515
.1UF_0402_X5R

12

C195
.1UF_0402_X5R

12

C203
.1UF_0402_X5R

12

C196
.1UF_0402_X5R

12

C514
.1UF_0402_X5R

12

C197
.1UF_0402_X5R

12

C204
.1UF_0402_X5R

12

C198
.1UF_0402_X5R

12

C504
.1UF_0402_X5R

12

C199
.1UF_0402_X5R

12

C207
.1UF_0402_X5R

12

C201
.1UF_0402_X5R

12

C205
.1UF_0402_X5R

12

C200
.1UF_0402_X5R

12

C513
.1UF_0402_X5R

12

C516
.1UF_0402_X5R

12

C206
.1UF_0402_X5R

+1.25VS

12

C512

3 3

4 4

.1UF_0402_X5R

+1.25VS

12

C214
.1UF_0402_X5R

+1.25VS

12

C224
.1UF_0402_X5R

+1.25VS

12

C229
.1UF_0402_X5R

12

C208
.1UF_0402_X5R

12

C215
.1UF_0402_X5R

12

C225
.1UF_0402_X5R

12

C231
.1UF_0402_X5R

A

12

C209
.1UF_0402_X5R

12

C216
.1UF_0402_X5R

12

C226
.1UF_0402_X5R

12

C232
.1UF_0402_X5R

12

C210
.1UF_0402_X5R

12

C217
.1UF_0402_X5R

12

C227
.1UF_0402_X5R

12

C230
.1UF_0402_X5R

12

C211
.1UF_0402_X5R

12

C218
.1UF_0402_X5R

12

C508
.1UF_0402_X5R

12

C212
.1UF_0402_X5R

12

C219
.1UF_0402_X5R

12

C228
.1UF_0402_X5R

B

12

C213
.1UF_0402_X5R

12

C220
.1UF_0402_X5R

12

C509
.1UF_0402_X5R

12

C233
.1UF_0402_X5R

12

C221
.1UF_0402_X5R

12

C507
.1UF_0402_X5R

12

C511
.1UF_0402_X5R

12

C222
.1UF_0402_X5R

12

C505
.1UF_0402_X5R

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

12

12

12

C

C510
.1UF_0402_X5R

C223
.1UF_0402_X5R

C506
.1UF_0402_X5R

D

Title

Size Document Number Rev

Date: Sheet

Comp a l Electro nics , In c .

SCHEMATIC, M/B LA -1302

401216

E

11 45Wednesday, May 29, 2002

of

1B

A

B

C

D

E

F

G

H

+3VS

SEL0SEL1 Function

00
01
10

1 1

2 2

3 3

11

H_BSEL04
H_BSEL14

66Mhz Host CLK
100Mhz Host CLK
200Mhz Host CLK
133Mhz Host CLK

1 2

R264 @0_0402

12

R275

1K_0402

CLK_ICH4818

CLK_SD4836

CLK_ICH1418
CLK_SIO1435

CLK_AC1425

+3VS

+3VS

12

12

R282

@1K_0402

H_BSEL2
H_BSEL0

R281

1K_0402

R277

1K_0402

12

12

R276
@1K_0402

Please closely pin42

Place Crystal within 500 mils of CK_Titan

12

C468 10PF_0402
caps are internal

to CK_TITAN

C473 10PF_0402

BSEL0

+3VS

PM_SLP_S1#18,29
PM_STPPCI#18

PM_STPCPU#18,39

CK408_PWRGD#32

R263 10K_0402

+3VS

R254 @10K_0402

R279 475_1%

1 2

R280 22_0402

1 2

R272 22_0402

1 2

R284 10_0402

1 2
1 2

R285 10_0402

1 2

R286 10_0402

R283 @1K_0402

1 2

1 2
1 2

12

12

R265 0_0402

1 2

DIMM_SMDATA
DIMM_SMCLK

CLK_ICH48M

CLK_SD48M

CLK_ICH14M

Y2

14.318MHZ

L37
BLM21A601SPT

1 2

L38
BLM21A601SPT

1 2

2

40
55
54

25
34
53

28

43

29
30

33
35

42

39

38

56

R02 PIR4

or ICS 9508-05

U25

XTAL_IN

SEL2
SEL1
SEL0

PWR_DWN#
PCI_STOP#
CPU_STOP#

VTT_PWRGD#

MULT0

SDATA
SCLK

3V66_0/DRCG
3V66_1/VCH_CLK

IREF

48MHZ_USB

48MHZ_DOT

REF

W320-04

+3V_CLK

Width=40 mils

181419323746

VDD_PCI

VDD_REF

GND_REF

GND_PCI

491520313641

+

VDD_PCI

VDD_CPU

VDD_3V66

VDD_3V66

VDD_48MHZ

66MHZ_OUT2/3V66_4
66MHZ_OUT1/3V66_3
66MHZ_OUT0/3V66_2

GND_PCI

GND_3V66

GND_3V66

GND_48MHZ

GND_IREF

12

C452

22UF_10V_1206

Width=15 mils

50

VDD_CORE

VDD_CPU

GND_COREXTAL_OUT

CPUCLKT2

CPU_CLKC2

CPUCLKT1

CPUCLKC1
CPUCLKT0

CPUCLKC0

66MHZ_IN/3V66_5

PCICLK_F2
PCICLK_F1
PCICLK_F0

PCICLK6
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK0

GND_CPU

47

12

C469
.1UF_0402

26

273
45

44
49

48
52

51
24

23
22
21

7
6
5

18
17
16
13
12
11
10

12

C467
.1UF_0402

+3VS_CLKVDD

Width=15 mils

12

C459
.1UF_0402

CLK66MCH
CLK66AGP
CLKICHHUB

CLKPCI_F2

CLKPCI_MINI
CLKPCI_1394
CLKPCI_SD
CLKPCI_EC
CLKPCI_SIO
CLKPCI_PCM
CLKPCI_LAN

12

C470
.1UF_0402

L39
BLM21A601SPT

1 2

12

C466
10UF_10V_0805

CLK_BCLK

CLK_BCLK#
CLK_HT

CLK_HT#
CLK_ITP

CLK_ITP#

R270 33.2_1%

R271 33.2_1%

R268 33.2_1%

R269 33.2_1%

R266 33.2_1%

R267 33.2_1%

R304 33.2_1%

1 2

R309 33.2_1%

1 2

R308 33.2_1%

1 2

R300 33.2_1%

1 2

R303 33.2_1%
R313 33.2_1%
R312 33.2_1%
R302 33.2_1%
R311 33.2_1%
R310 33.2_1%
R301 33.2_1%

12

1 2

1 2
1 2

1 2
1 2

1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2

C438
.1UF_0402

+3VS

12

12

C440
.1UF_0402

C436
.1UF_0402

+3VS_VDD48M

12

C437
.1UF_0402

1 2

R260 49.9_1%_0402

R261 49.9_1%_0402

1 2

1 2

R258 49.9_1%_0402

R259 49.9_1%_0402

1 2

1 2

R256 49.9_1%_0402

R257 49.9_1%_0402

1 2

12

C439
.1UF_0402

1 2

12

C435
10UF_10V_0805

L36

10_0805

*BLM21A601SPT

+3VS

CLK_HCLK 3

Place resistor near R184,R185 ;Trace
<=400mils

CLK_HCLK# 3
CLK_GHT 6

Place resistor near R182,R183 ;Trace
<=400mils

CLK_GHT# 6
CLK_ITPP 4

Place resistor near R180,R181 ;Trace
<=500mils

CLK_ITPP# 4

CLK_AGP_MCH 6
CLK_AGP 13
CLK_ICHHUB 18

CLK_ICHPCI 18

CLK_PCI_MINI 34
CLK_PCI_1394 22
CLK_PCI_SD 36
CLK_PCI_EC 29
CLK_PCI_SIO 35
CLK_PCI_PCM 21
CLK_PCI_LAN 23

Note:
CPU_CLK[2:0] needs to be running in C3, C4.

+12VS

2

Q25

G

2N7002

1 3

D

+12VS

2

1 3

D

G

S

Q30
2N7002

S

B

4 4

SMB_CLK18,20

A

DIMM_SMDATA 9,10SMB_DATA18,20

DIMM_SMCLK 9,10

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

C

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

D

E

F

Title

Size Document Number Rev

Date: Sheet

Comp a l Electro nics , In c .

SCHEMATIC, M/B LA -1302

401216

G

12 45Wednesday, May 29, 2002

H

1B

of

1

+1.5VS

10 mil

+3VS

+3VALW

12

R73

10K_0402

12

R79

@10K_0402

22PF_0402

12

R207
1K_0402

12

R209
1K_0402

R50

1 2

10K_0402

R64

1 2

10K_0402

R02 PIR5

12

R72
10K_0402

12

R546

10_0402

1 2
12

C721

+AGPREF

10 mil

PM_C3_STAT#

SUS_STAT#

C81
.1UF_0402

12

10UF_10V_0805

U6

1

X1/CLK

6

S0

R03 PIR 21

+3VS

12

C120
.1UF_0402

+3VS

L20
FBM-L11-201209-221

C98

12

2

VDD

4

CLK

87

SDS1

5

LEE

GND

3

SM560_SO-8

1 2

Close to U6

X1

4

OUT

VDD

1

GND

ST

SG-710ECK_27MHz_3.3V_20ppm

A A

B B

+3VS +3VS

C C

R80

@0_0402

D D

Divider ci rcui t f or 1.8Vdc XTALIN from 3. 3Vdc OSC out

1

2

AGP_AD[0:31]6

AGP_C/BE#[0..3]6

AGP_DEVSEL#6

AGP_FRAME#6

PM_C3_STAT#18

AGP_BUSY#18
AGP_ADSTB06

AGP_ADSTB16
AGP_SBA[0:7]6

+3VS

12

R74
@0_0402

12

R70

@0_0402

R555

10_0402

XTALIN XTALIN_F

3
2

1 2

150_1%_0402

2

@22PF_0402

CLK_AGP12

PCIRST#4,6,18,21,22,23,29,34,35,36

AGP_REQ#6

AGP_GNT#6

AGP_PAR6

AGP_STOP#6

AGP_TRDY#6

AGP_IRDY#6

PIRQA#18,20,21,22

AGP_WBF#6

AGP_RBF#6

AGP_SBSTB6

AGP_ST06
AGP_ST16
AGP_ST26

AGP_SBSTB#6
AGP_ADSTB0#6
AGP_ADSTB1#6

AGP_NBREF

CRMA17,34

LUMA17,34

COMPS17,34

C720

R547

1 2

12

10_0402

22PF_0402

Close to U6

R59

120_0402

12

R56

IF OSC USED, R59 120
OHM ON, R56 ON

AGP_AD[0:31]

AGP_C/BE#[0:3]

R51

C68

1 2

1 2

@0_0402

R53 @0_0402

1 2

AGP_SBA[0:7]

R163

@100K_0402

12

47_1%_0402

R159

10 mil

1 2

TP3

C77

12

@22PF_0402

SUS_STAT#18,35

12

R58

3

XTALOUT

1

1 2

R67 1K_0402

3

AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31

AGP_C/BE#0
AGP_C/BE#1
AGP_C/BE#2
AGP_C/BE#3

PCIRST#
AGP_REQ#
AGP_GNT#
AGP_PAR
AGP_STOP#
AGP_DEVSEL#
AGP_TRDY#
AGP_IRDY#
AGP_FRAME#
PIRQA#

PM_C3_STAT#
AGP_BUSY#
AGP_RBF#
AGP_ADSTB0
AGP_ADSTB1
AGP_SBSTB

AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7

AGP_ST0
AGP_ST1
AGP_ST2

AGP_SBSTB#
AGP_ADSTB0#
AGP_ADSTB1#

715_1%_0402

CRMA
LUMA
COMPS

SUS_STAT#

W27
W30

AA28
AA27

AA30
AB28
AA29
AB27
AB30

W28

AG30
AH30
AF29
AF27

AH29
AE27
AG29

AG28
AE30

W29

AC29
AD29

AE28
AD30
AD27
AC30
AC27
AB29
AC28

AF30
AF28
AE29

AD28

AJ24

AK24
AK23
AK22
AG24
AG25

AH25
AH26

AJ26
AJ25

AJ29
AJ30

AH24

AJ28

K28
L29
L27
L30

L28
M29
M27
M30
N30
N28

P29

P27

P30

P28
R29
R27
U28
U30

V27

V29

V28

V30

Y30

N27
R30
U29

R28

T27

T29

T28

T30
U27

N29

M28

Y29

K30

K29

U2A

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE#0
C/BE#1
C/BE#2
C/BE#3

PCICLK
RST#
REQ#
GNT#
PAR
STOP#
DEVSEL#
TRDY#
IRDY#
FRAME#
INTA#

WBF/SERR#
STP_AGP#

AGP_BUSY#
RBF#
AD_STB0
AD_STB1
SB_STB

SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7

ST0
ST1
ST2

SB_STB#
ADSTB0#
ADSTB1#

AGPREF
AGPTEST

R2SET
C_R

Y_G
COMP_B
H2SYNC
V2SYNC

CRT2DDCCLK
CRT2DDCDATA

SSIN
SSOUT

XTALIN
XTALOUT

TESTEN
SUS_STAT#

M7-C

4

Part 1 of 5

PCI/AGP HOST BUS

INTERFACE

AGP4X AG P 2XSSC

DAC2

CLK

4

GPIO /

ROM

ZV_LCDDATA0
ZV_LCDDATA1
ZV_LCDDATA2
ZV_LCDDATA3
ZV_LCDDATA4
ZV_LCDDATA5
ZV_LCDDATA6
ZV_LCDDATA7
ZV_LCDDATA8

ZV_LCDDATA9
ZV_LCDDATA10
ZV_LCDDATA11
ZV_LCDDATA12
ZV_LCDDATA13
ZV_LCDDATA14
ZV_LCDDATA15
ZV_LCDDATA16
ZV_LCDDATA17
ZV_LCDDATA18
ZV_LCDDATA19
ZV_LCDDATA20
ZV_LCDDATA21
ZV_LCDDATA22

ZV PORT / EXT

TMDS

ZV_LCDDATA23

ZV_LCDCNTL0

ZV_LCDCNTL1

ZV_LCDCNTL2

ZV_LCDCNTL3

TXOUT_L0N

TXOUT_L0P

TXOUT_L1N

TXOUT_L1P

TXOUT_L2N

TXOUT_L2P

TXOUT_L3N

TXOUT_L3P

TXCLK_LN

LVDSTMDSDAC1

TXCLK_LP
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P

TXCLK_UN
TXCLK_UP

DVIDDCCLK

DVIDDCDATA

VGADDCDATA

VGADDCCLK

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15

ROMCS#

DIGON

BLON#

TX0M

TX0P

TX1M

TX1P

TX2M

TX2P

TXCM

TXCP

HSYNC
VSYNC

RSET

AUXWIN

5

AJ2
AK2
AK1
AH3
AH2
AJ1
AF4
AH1
AG3
AF3

留

AG2
AF2
AG1
AF1
AE2
AE1

AE5

INTERNAL PULL UP

AJ5
AK5
AG6
AH6
AJ6
AK6
AG7
AH7
AJ7
AK7
AG8
AH8
AJ8
AK8
AG9
AH9
AJ9
AK9
AG10
AH10
AJ10
AK10
AG11
AH11

AJ4
AK4
AH5
AG5

AK16
AJ16
AK17
AJ17
AK18
AJ18
AK20
AJ20
AK19
AJ19
AH18
AG18
AH19
AG19
AH20
AG20
AH22
AG22
AH21
AG21

AE13
AF13

AJ13
AK13
AJ14
AK14
AJ15
AK15
AJ12
AK12

AF12
AE12

AF11

HPD

AK28

R

AK27

G

AK26

B

AG26
AG27

AK25

AH28
AH27

AJ27

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

+3VS

12

R512

D

TEST PA

10K_0402

TEST PA留D

LVDS1_0­LVDS1_0+
LVDS1_1­LVDS1_1+
LVDS1_2­LVDS1_2+

LVDS1_C­LVDS1_C+
LVDS2_0­LVDS2_0+
LVDS2_1­LVDS2_1+
LVDS2_2­LVDS2_2+

LVDS2_C­LVDS2_C+

ENVDD

(10 mil)
(10 mil)
(10 mil)
(10 mil)
(10 mil)

(10 mil)

RED 17
GREEN 17
BLUE 17
HSYNC 17
VSYNC 17

1 2

R55
499_1%_0402

MCLK_SPREAD

R65 @10K_0402

1 2

5

MSEN# 17,29,34

ENVDD

+3VS

12

1

2

3

DDCDATA 17
DDCCLK 17

R68
10K_0402

ENVEE

Q9
2N7002

+3VS

12

R38
1K_0402

1

2

3

Q7

2N7002

22K

2

ENVEE29

ENBKL29

6

+12VALW

22K

LVDS1_2+
LVDS1_2-

LVDS1_1+
LVDS1_1-

LVDS2_2+
LVDS2_2-

LVDS1_0+
LVDS1_0-

LVDS1_C+
LVDS1_C- PID0

LVDS2_1+
LVDS2_1-

LVDS2_0+
LVDS2_0-

LVDS2_C+
LVDS2_C-

+12VALWLCDVDD

R33
100K_0402

13

R167
100K_0402

1

2

3

150K_0402

Q16

2N7002

Q14
DTC124EK

+3VS

D13

ENVEE DISPOFF#

21
RB751V
D14

21
RB751V

JP11

26

26

27

27

28

28

29

29

30

30

31

31

32

32

33

33

34

34

35

35

36

36

37

37

38

38

39

39

40

40

41

41

42

42

43

43

44

44

45

45

46

46

47

47

48

48

49

49

50

50

LVDS 50 PIN CONN.

R164

C292
@1000PF_0402

R45

4.7K_0402

1 2

1000PF_0402

LCDVDD_1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

DISPOFF#

11

11

12

12

13

13

14

14

PID4

15

15

PID0

16

16

PID1

17

17

PID2

18

18

PID3

19

19

20

20

21

21

22

22

23

23

24

24

25

25

PIR

U7

1

CLKIN/X1

W180

NC/X2
SS%
GND

CLKOUT

SSON#

VDD

FS1

2

4

3

1 2

1K_0402

XTALIN

R76

6

Q15

1

2

3

SI2302DS

12

C50
.1UF_0402

12

C51

C300

10UF_10V_0805

INV_B+

INVT_PWM 29

PID4 35

TFT LCD CONN.

10K_0402

6
5
7

SSON#

8

R579

@10K_0402

7

+3V

12

LCDVDD

C317

4.7UF_10V_0805

C298

4.7UF_10V_0805

PID[0..3]35

INV_B+

12

12

C48

4.7UF_25V_1206

12

1000PF_0402

+SVDD

12

R548

1 2

C315
.1UF_0402

FBM-L11-201209-221

C52

12

R69
10K_0402

MCLK_SPREAD

R580

@10K_0402

1 2

PID[0..3]

L12

12

PID1
PID2
PID3

PID4

4.7U_0805

C316
1000PF_0402

22UF_10V_1206

L13

FBM-L11-201209-221

12

C53
.01UF_0402

RP5

8P4R_10K_0804

R173

1 2

10K_0402

+SVDD

12

C107

8

12

C319

+5VALW

LCDVDD

+3VS

18
27
36
45

L21

FCM2012C80_0805

1 2

12

C106

0.1U_0402

+3VS

Compal Electronics, Inc.

Title

Size Document Number Rev
Custom

Date: Sheet of

7

SCHEMATIC, M/B LA-1302
401216

13 45Wednesday, May 29, 2002

8

1B

1

2

3

4

5

6

7

8

MEMORY INTERFACE

NMD[0:63]
NMA[0:13]

A A

B B

C C

NDQM[0:7]

J30

J29
H30
H29

F30

F29
E30
E29

J28

J27
H28
H27

F28

F27
E28
E27
D30
D29
C30
C29
A30
A29
A28
B28
D28
C28
D27
C27
D25
C25
D24
C24
D18
C18
D17
C17
D15
C15
D14
C14
B17
A17
B16
A16
B14
A14
B13
A13
D13
C13
D12
C12
D10
C10

D9

C9
B12
A12
B11
A11

B9

A9

B8

A8

U2B

M7-C

DQA0
DQA1
DQA2
DQA3
DQA4
DQA5
DQA6
DQA7
DQA8
DQA9
DQA10
DQA11
DQA12
DQA13
DQA14
DQA15
DQA16
DQA17
DQA18
DQA19
DQA20
DQA21
DQA22
DQA23
DQA24
DQA25
DQA26
DQA27
DQA28
DQA29
DQA30
DQA31
DQA32
DQA33
DQA34
DQA35
DQA36
DQA37
DQA38
DQA39
DQA40
DQA41
DQA42
DQA43
DQA44
DQA45
DQA46
DQA47
DQA48
DQA49
DQA50
DQA51
DQA52
DQA53
DQA54
DQA55
DQA56
DQA57
DQA58
DQA59
DQA60
DQA61
DQA62
DQA63

NMD[0:63] 16
NMA[0:13] 16
NDQM[0:7] 16

Part 2 of 5

MEMORY INTERFACE

A

AA10
AA11
AA12
AA13

DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7

QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6

QSA7
RASA#
CASA#

WEA#
CSA0#
CSA1#

CKEA

CLKA0

CLKA0#

CLKA1

CLKA1#

CLKAFB

NC5

VREF

NC1
NC3
NC2
NC4

AA0
AA1
AA2
AA3
AA4
AA5
AA6
AA7
AA8
AA9

B26
A26
B25
A25
C22
D21
C21
D20
C20
D22
C23
D23
A27
B27

G30
G28
B30
D26
D16
B15
D11
B10

G29
G27
B29
C26
C16
A15
C11
A10

B18
A19
A18
C19
B19
D19

B23
A23

B22
A22

A21
B21

D8
B24

A24
B20
A20

MVREF

(10 mil)

12

C258

.1UF_0402

12

+

C260
10UF_10V_08 05

+2.5VS

12

R147
1K_1%_0402

12

R151
1K_1%_0402

NMD0
NMD1
NMD2
NMD3
NMD4
NMD5
NMD6
NMD7
NMD8
NMD9
NMD10
NMD11
NMD12
NMD13
NMD14
NMD15
NMD16
NMD17
NMD18
NMD19
NMD20
NMD21
NMD22
NMD23
NMD24
NMD25
NMD26
NMD27
NMD28
NMD29
NMD30
NMD31
NMD32
NMD33
NMD34
NMD35
NMD36
NMD37
NMD38
NMD39
NMD40
NMD41
NMD42
NMD43
NMD44
NMD45
NMD46
NMD47
NMD48
NMD49
NMD50
NMD51
NMD52
NMD53
NMD54
NMD55
NMD56
NMD57
NMD58
NMD59
NMD60
NMD61
NMD62
NMD63

AA1
AA2
AC1
AC2
AD1
AD2
AA3
AA4
AB3
AB4
AD3
AD4
AE3
AE4

U2C

C7

DQB0

D7

DQB1

C6

DQB2

D6

DQB3

C4

DQB4

D4

DQB5

C3

DQB6

D3

DQB7

A5

DQB8

B5

DQB9

A4

DQB10

B4

DQB11

A2

DQB12

B2

DQB13

A1

DQB14

B1

DQB15

E4

DQB16

E3

DQB17

F3

DQB18

F4

DQB19

H3

DQB20

H4

DQB21

J3

DQB22

J4

DQB23

C1

DQB24

C2

DQB25

D1

DQB26

D2

DQB27

F1

DQB28

F2

DQB29

G1

DQB30

G2

DQB31

R1

DQB32

R2

DQB33

T1

DQB34

T2

DQB35

V1

DQB36

V2

DQB37

W1

DQB38

W2

DQB39

T3

DQB40

T4

DQB41

U3

DQB42

U4

DQB43

W3

DQB44

W4

DQB45

Y3

DQB46

Y4

DQB47

Y1

DQB48

Y2

DQB49
DQB50
DQB51
DQB52
DQB53
DQB54
DQB55
DQB56
DQB57
DQB58
DQB59
DQB60
DQB61
DQB62
DQB63

M7-C

Part 3 of 5

MEMORY INTERFACE

B

MEMVMODE0
MEMVMODE1

AB0
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8

AB9
AB10
AB11
AB12
AB13

DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7

QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6

QSB7
RASB#
CASB#

WEB#
CSB0#
CSB1#

CKEB

CLKB0

CLKB0#

CLKB1

CLKB1#
CLKBFB

NC6

MEMTEST

H2
H1
J2
J1
K4
K3
L4
M3
L3
M4
N2
N1
N4
N3

D5
B3
G3
E1
U1
V3
AB1
AC3

C5
A3
G4
E2
U2
V4
AB2
AC4

P4
R3
R4
P2
P3
P1

K2
K1

L2
L1

M2
M1

B7
B6

C8

R21 0_0402

1 2

R23 0_0402

1 2

R26 0_0402

1 2

R27 0_0402

1 2

R160 0_0402

1 2

R158 0_0402

1 2

R171 0_0402

1 2

R174 0_0402

1 2

R170 0_0402

1 2

R172 0_0402

1 2

R47 0_0402

1 2

R46 0_0402

1 2

R177 0_0402

1 2

R181 0_0402

1 2

VDQS2

R146 33_0402

1 2

VDQS5

R52 33_0402

1 2

R182 33_0402

1 2

R49 33_0402

1 2

R186 33_0402

1 2

R178 33_0402

1 2

R48 0_0402

1 2

VMCLK0

R35 0_0402

VMCLK0#
VMCLK1

VMCLK1#

1 2

R32 0_0402

1 2

R44

1 2

R40 0_0402

1 2

R149 4.7K_04 02

1 2

12

R152
47_1%_0402

NDQM0
NDQM1
NDQM2
NDQM3
NDQM4
NDQM5
NDQM6
NDQM7

12

NMRAS#
NMCAS#
NMWE#
NMCS0#

NMCKE

0_0402

+1.8VS

R150

4.7K_0402

NMA0
NMA1
NMA2
NMA3
NMA4
NMA5
NMA6
NMA7
NMA8
NMA9
NMA10
NMA11
NMA12
NMA13

Close to memory

NDQS2

NDQS5

NMRAS# 16
NMCAS# 16
NMWE# 16
NMCS0# 16

NMCKE 16

NMCLK0
NMCLK0#

NMCLK1
NMCLK1#

PIR

NDQS2 16

NDQS5 16

NMCLK0 16
NMCLK0# 16

NMCLK1 16
NMCLK1# 16

D D

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

1

2

3

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

4

5

6

Title

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-1302
401216

7

14 45Wednesday, May 29, 2002

8

1B

of

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

+1.25VS

A A

B B

+1.8VS

C C

D D

1

+1.25VS

C276
1UF_10V

PLACE DIRECTLY
UNDERNEATH CHANNEL
A SECTION OF ASIC.

PLACE DIRECTLY
UNDERNEATH CHANNEL
B SECTION OF ASIC.

L32

FBM-11-160808-121

10UF_10V_0 805

+1.8VS

+1.8VS

L19

FBM-11-160808-121

L18

FBM-11-160808-600T_0603

1

120 mil - 2.7A

C301

.1UF_0402

C274
.1UF_0402

+2.5VS

10 mil - 3 mA

C322

C275

.1UF_0402

C299
.1UF_0402

40 mil - 0.7A

C247

22UF_10V_12 06

C249

22UF_10V_12 06

C266

22UF_10V_12 06

C320
.1UF_0402

12

+

10 mil - 10 mA

12

C85

+

10UF_10V_0 805

+2.5VS

FBM-11-160808-600T_0603

10 mil - 30 mA - analog

12

+

22UF_10V_12 06

C280
1UF_10V

C321
.1UF_0402

C251

.1UF_0402

C308

.1UF_0402

C255

.1UF_0402

C294
.1UF_0402

LVDDR_1.8

C325

12

.1UF_0402

PVDD_1.8

12

L31

C84

10UF_10V_08 05

2

C76

.1UF_0402

VDD_PLL1.8

12

2

C712

C329
.1UF_0402

C252

.1UF_0402

C253

.1UF_0402

C250

.1UF_0402

C256
.1UF_0402

C75

.1UF_0402

10UF_10V_0 805

12

+

12

C323

+

10UF_10V_0 805

DAC_2.5

12

+

C713

C278
.1UF_0402

C310

.1UF_0402

C254

.1UF_0402

C257
.1UF_0402

+1.8VS

C324

12

.1UF_0402

10 mil - 5 mA - analog

12

C311

+

10UF_10V_0 805

3

C714
10UF_10V_0 805

C270

.1UF_0402

C326
.1UF_0402

12

C272

+

10UF_10V_0 805

5 mil
5 mil

C318

12

.1UF_0402

3

+2.5VS

+1.25VS

20 mil

C303

12

.1UF_0402

AC6
AD6
AE6

W26

AD26

AG4
AH4

AK3
AF14
AF15
AE11
AE10

AA5

AA6

AB5

AC5

AD5

G25
AB25

AB6

AK21
AE16
AF16

AG16

AF17
AJ21

AH16
AH17
AG17

AF18
AK11

AJ11

AG12
AG13
AG14
AG15
AH12
AH13
AH14
AH15

AE21
AF21

AJ23
AF23
AF24

AE19
AF19

AJ22

AF5
F24

AJ3

H25

F15
F16
F21
F22

F12
F17

R25

G6
H6

P6

U6

V6

W6

G5
H5

J5
J6
K5
K6

L5
M5
N5

P5
R5
R6

T5
U5

V5

W5

Y5

Y6

J26
J25

F5

F8

F9

T6

L6

4

U2D

VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC

VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1

VDDC18
VDDC18
VDDC18
VDDC18
VDDC18
VDDC18
VDDC18
VDDC18

LPVDD
LVDDR_18
LVDDR_18
LVDDR_18_25
LVDDR_18_25

LPVSS
LVSSR
LVSSR
LVSSR
LVSSR

TPVDD
TPVSS

TXVDDR
TXVDDR
TXVDDR
TXVDDR
TXVSSR
TXVSSR
TXVSSR
TXVSSR

A2VDD
A2VDD

A2VDDQ
AVDD
AVDD

A2VSSN
A2VSSDI

A2VSSQ

M7-C

4

Part 4 of 5

CORE & I/O

VDDM/VDDR1
VDDM/VDDR1
VDDM/VDDR1
VDDM/VDDR1
VDDM/VDDR1
VDDM/VDDR1
VDDM/VDDR1
VDDM/VDDR1
VDDM/VDDR1

VDDQM/VDDR1
VDDQM/VDDR1
VDDQM/VDDR1
VDDQM/VDDR1
VDDQM/VDDR1
VDDQM/VDDR1
VDDQM/VDDR1
VDDQM/VDDR1
VDDQM/VDDR1
VDDQM/VDDR1
VDDQM/VDDR1
VDDQM/VDDR1
VDDQM/VDDR1
VDDQM/VDDR1
VDDQM/VDDR1
VDDQM/VDDR1

VDDRH0
VDDRH1

VSSRH0
VSSRH1

MPVDD

POWER

AVDDDI

A2VDDDI

AVSSDIA2VSSN

VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC

MPVSS

PVDD
PVSS

VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3

VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP

AVSSQ

AVSSN
AVSSN

5

F6
F7
F10
F11
F13
F14
F18
F23
F25
M25
N25
P25
V25
W25
AC25
AF25
AE24
AE18
AE17
AE15
AE14

10 mil

E5
E6
E12
E13
E18
E19
E20
E26
F26

10 mil

E7
E8
E9
E10
E11
E14
E15
E16
E17
E21
E22
E23
E24
E25
G26
H26

F19
N6

F20
M6

10 mil - 15 mA - analog

A7
A6

10 mil - 30 mA - analog

AK29
AK30

AF6
AF7
AF8
AF9
AF10
AE7
AE8
AE9
AF26
AE26
AE25
AD25

K25
K26
K27
L25
L26
M26
N26
P26
R26
T25
T26
U25
U26
V26
Y25
Y26
AA25
AA26
AB26
AC26
Y27
Y28

AH23
AF20

AF22
AG23AE20
AE23
AE22

5

VDD_MEMPLL 1.8

+2.5VS

VDDRH

12

10 mil - 10 mA - analog

C259

12

.1UF_0402

C290
10UF_10V_0 805

VDD_MEMPLL 1.8

VDD_PLL1.8

C306
.1UF_0402

12

10 mil - 15 mA - analog

12

C248

+

10UF_10V_08 05

FBM-11-160808-121

12

.1UF_0402

R02 PIR7

+3VS

12

C307
.01UF_0402

12

C312
.1UF_0402

DAC_1.8

C74

+

.1UF_0402

6

FBM-11-16080 8-600T_0603

L29

12

+

C719

12

12

C327
.1UF_0402

12

FBM-11-160808-121

C83

10UF_10V_0 805

6

L26

+2.5VS

12

.1UF_0402

C284
.01UF_0402

L17

7

+1.8VS

POWER INTERFACE

U2E

L10

VSS

L11
L12
L13
L14
L15
L16
L17
L18
L19
L20

L21
M10
M11
M12
M13
M14
M15
M16
M17
M18
M19
M20
M21

N10

N11

N12

N13

N14

N15

N16

N17

N18

N19

N20

N21

P10

P11

P12

P13

P14

P15

P16

P17

P18

P19

C297

12

C328
.01UF_0402

P20

P21

R10

R11

R12

R13

R14

R15

R16

R17

R18

R19

R20

R21

12

C279
.1UF_0402

12

C313
.01UF_0402

+1.8VS

Title

Size Document Number Rev

Date: Sheet of

7

Part 5 of 5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

M7-C

30 mil - 20mA

12

+

C271
10UF_10V_08 05

+1.5VS

30 mil - 20mA

12

+

C314

10UF_10V_08 05

CORE GND

Compal Electronics, Inc.

SCHEMATIC, M/B LA-1302
401216

+3VS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

8

T10
T11
T12
T13
T14
T15
T16
T17
T18
T19
T20
T21
U10
U11
U12
U13
U14
U15
U16
U17
U18
U19
U20
U21
V10
V11
V12
V13
V14
V15
V16
V17
V18
V19
V20
V21
W10
W11
W12
W13
W14
W15
W16
W17
W18
W19
W20
W21
Y10
Y11
Y12
Y13
Y14
Y15
Y16
Y17
Y18
Y19
Y20
Y21

15 45Wednesday, May 29, 2002

8

1B

1

2

3

4

5

6

7

8

NOTE : MA11 CONNECTION REQUI RE D

FOR 4Mx32 DDR SGRAM ONLY

12

C62
2200PF_0402

2200PF_0402

12

C63

.1UF_0402

+2.5VS+2.5VS

1 2

1 2

R574
@2K_1%_0402

R578
@2K_1%_0402

VDQM0
VDQM1
VDQM2
VDQM3
VDQM4
VDQM5
VDQM6
VDQM7

12

12

12

R42
1K_1%_0402

R37
1K_1%_0402

C71

C37

2200PF_0402

12

C57

C55
.1UF_0402

.1UF_0402

(10

NVREF1

mil)

12

C47

.1UF_0402

R28

180_0402

Place close to DDR SGRAM

1 2

12

.1UF_0402

NMA0
NMA1
NMA2
NMA3
NMA4
NMA5
NMA6
NMA7
NMA8
NMA9
NMA10
NMA11
NMA13
NMA12

VDQM7
VDQM4
VDQM5
VDQM6
NDQS5

NMRAS#
NMCAS#
NMWE#
NMCS0#

NMCKE

C54

NMD[0:63]14

NMA[0:13]14

NDQM[0:7]14

NMWE#14
NMCAS#14
NMRAS#14
NMCS0#14

NMCKE14
NMCLK014

NMCLK0#14

NMCLK114

NMCLK1#14

NDQS214
NDQS514

2

141622

VDDQ

VDDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8(AP)
A9
A10
A11
BA0
BA1

DM0
DM1
DM2
DM3

DQS
VREF

MCL
RFU

RAS#
CAS#
WE#
CS#

CKE
CK

CK#
NC

NC
NC
NC
NC

5 8

VSSQ VDDQ

VSSQ

11

VDDQ

VSSQ

19

31
32
33
34
47
48
49
50
51
45
36
37
29
30

23
56
24
57

94
58

52
93

27
26
25
28

53
55

54
87

88
89
90
91

5962

VDDQVSSQ

6770

7376

VDDQVSSQ

79828586

VDDQVSSQ

VDDQVSSQ

92

95

VDDQ

VDDQ

VSSQ

VSSQ

99

15

VDD

VSS

3546

6566

96

U4

VDD

VDDVSS

VDDVSS

97

DQ0

98

DQ1

100

DQ2

1

DQ3

3

DQ4

4

DQ5

6

DQ6

7

DQ7

60

DQ8

61

DQ9

63

DQ10

64

DQ11

68

DQ12

69

DQ13

71

DQ14

72

DQ15

9

DQ16

10

DQ17

12

DQ18

13

DQ19

17

DQ20

18

DQ21

20

DQ22

21

DQ23

74

DQ24

75

DQ25

77

DQ26

78

DQ27

80

DQ28

81

DQ29

83

DQ30

84

DQ31

38

NC

39

NC

40

NC

41

NC

42

NC

43

NC

44

NC

VSS

4M32-5_DDR_SGR AM

VMD63
VMD62
VMD61
VMD60
VMD59
VMD58
VMD57
VMD56
VMD32
VMD33
VMD34
VMD35
VMD36
VMD37
VMD38
VMD39
VMD47
VMD46
VMD45
VMD44
VMD43
VMD42
VMD41
VMD40
VMD48
VMD49
VMD50
VMD51
VMD52
VMD53
VMD54
VMD55

NDQM0

R175 33_0402

NDQM1

R184 33_0402

NDQM2

R180 33_0402

NDQM3

+2.5VS

A A

12

C286

12

C330

C244
10UF_10V_08 05

.1UF_0402

12

C281

C285
.1UF_0402

R571
1K_1%_0402

R575
@2K_1%_0402

C246

10UF_10V_08 05

+2.5VS +2.5VS

12

B B

C C

NMCLK0

NMCLK0#

.1UF_0402

1 2

1 2

12

C269

2200PF_0402

12

C283

.1UF_0402

R572
@2K_1%_0402

1 2

R576
@2K_1%_0402

1 2

.1UF_0402

12

C245

2200PF_0402

12

C242
.1UF_0402

R176
1K_1%_0402

(10

1 2

mil)

R179
1K_1%_0402
1 2

.1UF_0402

12

C293
2200PF_0402

12

12

C309

C268

NVREF0

C304

NMA0
NMA1
NMA2
NMA3
NMA4
NMA5
NMA6
NMA7
NMA8
NMA9
NMA10
NMA11
NMA13
NMA12

VDQM0
VDQM3
VDQM2
VDQM1
NDQS2

NMRAS#
NMCAS#
NMWE#
NMCS0#

NMCKE

1 2

.1UF_0402

.1UF_0402

12

R185

180_0402

Place close to DDR SGRAM

+2.5VS +2.5VS

12

12

2

141622

VDDQ

VDDQ

VDDQ

31

A0

32

A1

33

A2

34

A3

47

A4

48

A5

49

A6

50

A7

51

A8(AP)

45

A9

36

A10

37

A11

29

BA0

30

BA1

23

DM0

56

DM1

24

DM2

57

DM3

94

DQS

58

VREF

52

MCL

93

RFU

27

RAS#

26

CAS#

25

WE#

28

CS#

53

CKE

55

CK

54

CK#

87

NC

88

NC

89

NC

90

NC

91

NC

VSSQ VDDQ

VSSQ

VSSQ

5 8

11

19

5962

VDDQVSSQ

6770

7376

VDDQVSSQ

79828586

VDDQVSSQ

VDDQVSSQ

VDDQ

VSSQ

92

95

VDDQ

VSSQ

99

15

3546

VDD

VDDVSS

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

VSS

6566

96

U18

VDD

VDDVSS

97
98
100
1
3
4
6
7
60
61
63
64
68
69
71
72
9
10
12
13
17
18
20
21
74
75
77
78
80
81
83
84

38

NC

39

NC

40

NC

41

NC

42

NC

43

NC

44

NC

VSS

4M32-5_DDR_SGR AM

C302

C264
2200PF_0402

.1UF_0402

VMD0
VMD1
VMD2
VMD3
VMD4
VMD5
VMD6
VMD7
VMD31
VMD30
VMD29
VMD28
VMD27
VMD26
VMD25
VMD24
VMD16
VMD17
VMD18
VMD19
VMD20
VMD21
VMD22
VMD23
VMD15
VMD14
VMD13
VMD12
VMD11
VMD10
VMD9
VMD8

4 5
3 6
2 7
1 8

RP103 8P4R_33_ 0804

4 5
3 6
2 7
1 8

RP105 8P4R_33_ 0804

4 5
3 6
2 7
1 8

RP109 8P4R_33_ 0804

4 5
3 6
2 7
1 8

RP107 8P4R_33_ 0804

4 5
3 6
2 7
1 8

RP106 8P4R_33_ 0804

4 5
3 6
2 7
1 8

RP110 8P4R_33_ 0804

4 5
3 6
2 7
1 8

RP104 8P4R_33_ 0804

4 5
3 6
2 7
1 8

RP102 8P4R_33_ 0804

C262
10UF_10V_08 05

R183 33_0402

NDQM4

R30 33_0402

NDQM5

R36 33_0402

NDQM6

R29 33_0402

NDQM7

R41 33_0402

Close to memory

NMD0
NMD1
NMD2
NMD3
NMD4
NMD5
NMD6
NMD7
NMD31
NMD30
NMD29
NMD28
NMD27
NMD26
NMD25
NMD24
NMD16
NMD17
NMD18
NMD19
NMD20
NMD21
NMD22
NMD23
NMD15
NMD14
NMD13
NMD12
NMD11
NMD10
NMD9
NMD8

NMCLK1

NMCLK1#

C65
10UF_10V_08 05

12

C70

.1UF_0402

R573

1K_1%_0402

1 2

R577
@2K_1%_0402

1 2

12
12
12
12
12
12
12
12

12

.1UF_0402

12

C64

C58
.1UF_0402

+2.5VS+2.5VS+2.5V S +2.5VS

1 2

1 2

DDR SGRAM

NMD[0:63]
NMA[0:13]
NDQM[0:7]
NMWE#

NMCAS#
NMRAS#
NMCS0#

NMCKE
NMCLK0
NMCLK0#
NMCLK1
NMCLK1#

NDQS2
NDQS5

12

12

C66

C45
2200PF_0402

.1UF_0402

RP14 8P4R_33_ 0804
RP10 8P4R_33_ 0804
RP4 8P4R_33_0804
RP7 8P4R_33_0804
RP8 8P4R_33_0804
RP6 8P4R_33_0804
RP9 8P4R_33_0804
RP13 8P4R_33_ 0804

C69

10UF_10V_0 805

NMD63

18

NMD62

27

NMD61

36

NMD60

45

NMD59

18

NMD58

27

NMD57

36

NMD56

45

NMD32

18

NMD33

27

NMD34

36

NMD35

45

NMD36

18

NMD37

27

NMD38

36

NMD39

45

NMD47

18

NMD46

27

NMD45

36

NMD44

45

NMD43

18

NMD42

27

NMD41

36

NMD40

45

NMD48

18

NMD49

27

NMD50

36

NMD51

45

NMD52

18

NMD53

27

NMD54

36

NMD55

45

NOTE : Resistors of NDQS0 and NDQS4 closed to

D D

the 9 4 pin of every DDR SGRAM

16/32MB DDR 2/4MX32 SGRAM

16MB 64 BI T I N T E R F ACE WITH TWO PIECES 2MX32
32MB 64 BI T I N T E R F ACE WITH TWO PIECES 4MX32

1

2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

3

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

4

5

6

Title

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-1302
401216

7

16 45Wednesday, May 29, 2002

8

1B

of

A

CRT Connector

1 1

RED13

GREEN13

BLUE13

HSYNC13

VSYNC13

2 2

12

R16
75_1%

12

+12VS

R15
75_1%

12

R17
75_1%

B

12

C26
@22PF_0402

S

Q5

G

2N7002

1 2

R24 100K_0402

12

C25
@22PF_0402

D

13

2

Q6
2N7002

S

G

FCM2012C-800_0805

FCM2012C-800_0805

FCM2012C-800_0805

12

C24
@22PF_0402

D

13

2

L7

1 2

L6

1 2

L8

1 2

L5

1 2

FBM-11-160808-121

L2

1 2

FBM-11-160808-121

12

C4
18PF_0402

D6

DAN217

2

C

3

+3VS

100PF_0402

+5VS

POLYSWITCH_0.5A

MSEN#13,29,34

DDC_MD2

12

C10

220PF_0402

F1

12

C5

DOCK_VSYNC 34
DOCK_HSYNC 34
DOCK_BLUE 34
DOCK_GREEN 34
DOCK_RED 34

2 1

RB411D

12

D2

DAN217

3

12

C3
68PF_0402

12

C6
18PF_0402

1

2

12

1

3

C8
68PF_0402

12

C7
18PF_0402

D3

DAN217

2

1

D5

C15

.1UF_0402

C11
220PF_0402

D

+3VS

12

12

11

12

13

14
10

15

1 3

Q3
2N7002

6
1

7
2

8
3

9
4

5

D

JP1
CRT-15P

G

2

D

1 3

S

2.2K_0402

Q2
2N7002

2

12

R5

S

G

1 2

R6 100K_0402

R3

2.2K_0402

MSEN#MSEN#

C27
@10PF_0402

DDCDATA 13

DDCCLK 13

+12VS

DOCK_DDCD 34
DOCK_DDCC 34

E

3

D

+3VS

2

3

1

S-Video

S CONN._FOXCONN

D12

DAN217

JP3

1
2
3
4
5
6
7

Title

Size Document Number Rev

B

Date: Sheet

Comp a l Electro nics , In c .

SCHEMATIC, M/B LA -1302

401216

17 45Wednesday, May 29, 2002

E

of

1B

TV-Out Connector

2

3

2

D10

3 3

1 2

12

C22
150PF_0402

C18 47PF_0402

1 2

FBM-11-160808-121

1 2

C20 47PF_0402

1 2

FBM-11-160808-121

1 2

C19 47PF_0402

1 2

FBM-11-160808-121

LUMA13,34

CRMA13,34

COMPS13,34

4 4

A

B

LUMA

CRMA

COMPS

75_1%

12

R12

12

12

R8

75_1%

R13

75_1%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

12

C23

150PF_0402

12

C21

150PF_0402

C

DAN217

L3

L4

L1

270PF_0402

D9
DAN217

1

12

C13

C14

270PF_0402

1

12

12

C12

270PF_0402

A

D20

ICH_THRM#

THRM#29

1 1

1 2

+3VS

R345 100K_0402

RSMRST#

2 2

3 3

12

12

4 4

1 2

R344 10K_0402

AC_BITCLK

AC97_RST#25,34

Place closely to
ICH3-M

CLK_ICH14

R403
@10_0402

C578
@15PF_0402

+1.8VS

12

R295

301_1%_0402

R_G

12

R290

301_1%_0402

21

RB751V

PM_LANPWROK

1 2

C492 .1UF_0402

SDATA_IN0

R483

10K_0402

1 2

SDATA_IN1

1 2

R473 33_0402

CLK_ICH48

12

R422
10_0402

12

C599
5PF_0402

+RTCVCC

1 2

R326 1K_0402

HUB Interface VSwing V o l ta g e

1. Place R_G and R_H in middle of Bus.

12

C454
.1UF_0402

R377 10K_0402

PM_LANPWROK

AD[0..31]21,22,23,34

1 2

12

AC_RST#

+R_VBAIS

+VS_HUBVSWING

1 2

R474

10K_0402

R463

10K_0402

CBE#021,22,23,34
CBE#121,22,23,34
CBE#221,22,23,34
CBE#321,22,23,34

C482
.047UF

1 2

R329 @22M

+3VS

GNT#020,22
GNT#120,34
GNT#220,21
GNT#320,23
GNT#420,34

REQ#020,22
REQ#120,34
REQ#220,21
REQ#320,23
REQ#420,34

+3VS

PM_C3_STAT#13

PM_BATLOW#29

1 2

R372 10K_0402

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

1 2

R_H

A

AC_SYNC25,34

AC_SDATAO25,34

SDATA_IN134
SDATA_IN025
AC_BITCLK25,34
ICH_VGATE32

PM_CPUPERF#4

PM_GMUXSEL39

SUS_STAT#13,35

PM_STPPCI#12

PM_STPCPU#12,39

PM_SLP_S5#29
PM_SLP_S3#29
PM_SLP_S1#12,29

RSMRST#29

SWI#29

PM_PWROK32

PWRBTN_OUT#29

PM_DPRSLPVR39

CLKRUN#20,21,29,34,35 IRQ14 20,28

PM_BATTLOW#

AGP_BUSY#13

U42A

J2

PCI_AD0

K1

PCI_AD1

J4

PCI_AD2

K3

PCI_AD3

H5

PCI_AD4

K4

PCI_AD5

H3

PCI_AD6

L1

PCI_AD7

L2

PCI_AD8

G2

PCI_AD9

L4

PCI_AD10

H4

PCI_AD11

M4

PCI_AD12

J3

PCI_AD13

M5

PCI_AD14

J1

PCI_AD15

F5

PCI_AD16

N2

PCI_AD17

G4

PCI_AD18

P2

PCI_AD19

G1

PCI_AD20

P1

PCI_AD21

F2

PCI_AD22

P3

PCI_AD23

F3

PCI_AD24

R1

PCI_AD25

E2

PCI_AD26

N4

PCI_AD27

D1

PCI_AD28

P4

PCI_AD29

E1

PCI_AD30

P5

PCI_AD31

K2

PCI_C/BE#0

K5

PCI_C/BE#1

N1

PCI_C/BE#2

R2

PCI_C/BE#3

A4

PCI_GNT#0

E3

PCI_GNT#1

D2

PCI_GNT#2

D5

PCI_GNT#3

B4

PCI_GNT#4

D3

PCI_REQ#0

F4

PCI_REQ#1

A3

PCI_REQ#2

R4

PCI_REQ#3

E4

PCI_REQ#4

ICH3-M

1 2

R338 10M

R331
@2.4M_1%

1 2

18PF_0402

C490

1 2

R340 10M

X3 32.768KHZ_2MM_10ppm

12

PWRBTN_OUT#

V4Y5AB3V5AC2

PCI

Interface

VSS0

A1

A13

12

C491
18PF_0402

PM_STPPCI#

PM_BATLOW#

PM_AUXPWROK

PM_AGPBUSY#/GPIO6

PM_C3_STAT#/GPIO21

VSS1

VSS2

VSS3

VSS4

A16

A17

A20

A23B8B10

RTC_VBIAS
RTC_X1

RTC_X2

PM_CLKRUN#/GPIO24

VSS5

AB21

PM_DPRSLPVR

VSS6

R_K

AB1

AA6

PM_PWRBTN#

VSS7

B13

301_1%_0402

R_L

301_1%_0402

B

AA1

AA7

W20

AA5

AA2

V21

U21

AA4

PM_RI#

PM_PWROK

PM_SLP_S3#

PM_SLP_S5#

PM_SUS_CLK

PM_RSMRST#

PM_STPPCI#/GPIO18

PM_SLP_S1#/GPIO19

PM_STPCPU#/GPIO20

VSS8

VSS9

VSS10

VSS11

VSS12

VSS13

VSS14

VSS15

VSS16

B14

B15

B18

B19

B20

B22C3C6

CLK_ICH1412
CLK_ICH4812

+RTCVCC

+1.8VS

HUB Reference Voltage

12

R390

Place R_K and R_L
Closely ICH3

12

R384

B

ICH_THRM#

AB4U5U20

PM_THRM#

PM_SUS_STAT#

GeyservillePower Management

VSS

VSS17

VSS18

VSS19

F19

C14

C15

1 2

R330 15K_0402

AC_RST#

AC_SYNC

AC_SDATAO

SDATA_IN0

AC_BITCLK

SDATA_IN1

Y20

V19B7D11

B11

C11C7A7V1U3T3U2T2U4U1V2W2Y4Y2W3W4Y3

AC_RST#

AC_SYNC

AC_BITCLK

AC_SDATAIN0

AC_SDATAIN1

AC_SDATAOUT

PM_GMUXSEL/GPIO23

PM_CPUPREF#/GPIO22

AC'97

PM_VGATE/VRMPWRGD

Interface

ICH3-M (1/2)

VSS20

VSS21

VSS22

VSS23

VSS24

VSS25

VSS26

VSS27

VSS28

VSS29

VSS30

VSS31

VSS32

C16

C17

C18

C19

C20

C21

C22D9D13

D16

D17

D20

D21

CLK_ICH14
CLK_ICH48

C484

12

1UF_10V

+ICH_HUBREF

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

+3VS

R37310K_0402

1 2

EXTSMI#

LID_OUT#

SCI#

IDE_PATADET

GPIO_7

GPIO_8

GPIO_12

GPIO_13

GPIO_25

LPC_AD0

LPC_AD1

LPC_AD2

LPC_AD3

LPC_DRQ#0

LPC_DRQ#1

LPC_FRAME#

LPC

Interface

Clocks EEPROM

CLK_RTCX2

CLK_RTCX1

CLK_RTEST#

CLK_48

CLK_14

VSS33

VSS34

AC6

AC7Y7F20

J23

D22

E5

RTC_X1

RTC_RST#

RTC_X2

12

J1
JOPEN

12

R337
1K_0402

GPIO_27

unMUX

GPIO

LAN

Interface

CLK_VBIAS

LAN_TXD1

LAN_TXD2

LAN_JCLK

LAN_RSTSYNC

A10C9D7

AB7

RTC_VBIAS

Layout note:
Locate J1 and R751 on bottom side and with
easy access through memory door

C

LAD0 29,35,36
LAD1 29,35,36
LAD2 29,35,36
LAD3 29,35,36
LDRQ# 35
LFRAME# 29,35,36

EXTSMI# 29
SCI# 29
LID_OUT# 29

GPIO2

1 2

1 2

R416 10K_0402

IRQ15 20,24

PCI_CLK

PCI_DEVSEL#

PCI_FRAME#

PCI_IRDY#

PCI_PAR

PCI_PERR#

PCI_LOCK#

PCI_PME#

PCI_RST#

PCI_SERR#

STOP#

PCI_TRDY#

SM_INTRUDER#

SMLINK0
SMLINK1

SMB_CLK

SMB_DATA

CPU_A20GATE

CPU_A20M#

CPU_DPSLP#

CPU_FERR#

CPU_IGNNE#

CPU_INIT#
CPU_INTR

CPU_NMI

CPU_PWRGOOD

CPU_RCIN#

CPU_SLP#

CPU_SMI#

STPCLK#

HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9

HUB_PD10

SERIRQ 20,21,29,35,36

CLK_ICHPCI

T5
M3
F1
C4
D4
B6
B3
N3
G5
M2
M1
W1

R363 33_0402

Y1
L5
H2
H1

Y6
AC3
AB2
AC4
AB5
AC5

Y22
V23
AB22

H_FERR#

J22
AA21
AB23
AA23
Y21
W23
U22
W21
Y23
U23

HUB_PD0

L22

HUB_PD1

M21

HUB_PD2

M23

HUB_PD3

N20

HUB_PD4

P21

HUB_PD5

R22

HUB_PD6

R20

HUB_PD7

T23

HUB_PD8

M19

HUB_PD9

P19

HUB_PD10

N19

CLK_ICHHUB 12
HUB_PSTRB 6
HUB_PSTRB# 6

PIRQA#13,20,21,22
PIRQB#20,23
PIRQC#20,34
PIRQD#20,34

+ICH_HUBREF

GPIO5

GPIO3

GPIO2

GPIO4

PIRQB#

PIRQA#

PIRQC#

PIRQD#

H22

W19

J21

J20

J19

GPIO_28

INT_APICD1

INT_APICD0

INT_PIRQA#

INT_APICCLK

Interrupt
Interface

Interface

EEP_SHCLK

LAN_RXD0

LAN_RXD1

LAN_RXD2

LAN_TXD0

D10

C8A8A9B9C10

@1K_0402
1 2

AB14A5C5B5A6A2B2C1B1

INT_IRQ15

R476

INT_PIRQD#

INT_PIRQC#

INT_PIRQF#/GPIO3

INT_PIRQE#/GPIO2

EEP_CS

EEP_DIN

E9D8E8

C

INT_IRQ14

INT_SERIRQ

INT_PIRQH#/GPIO5

INT_PIRQG#/GPIO4

PCI_GPIO0/REQA#

PCI_GPIO1/REQB#/REQ5#

PCI_GPIO16/GNTA#

PCI_GPIO17/GNTB#/GNT5#

PCI

Interface

System

Managment

Interface

SMB_ALERT#/GPIO11

CPU

Interface

HubLink

Interface

HUB_CLK

HUB_PAR

HUB_PSTRB

HUB_PSTRB#

HUB_RCOMP

HUB_VREF

HUB_VSWING

T19

R19

N22

P23

K19

L20

L19

CLK_ICHHUB

HUB_ICH_RCOMP

INT_PIRQB#

EEP_DOUT

R464 8.2K_0402

GPIO3

1 2

R465 8.2K_0402

GPIO4

1 2

R467 8.2K_0402

GPIO5

1 2

R466 8.2K_0402

PIRQA#
PIRQB#
PIRQC#
PIRQD#

CLK_ICHPCI 12
DEVSEL# 20,21,22,23,34
FRAME# 20,21,22,23,34
PCI_REQA# 20
PCI_REQB# 20

IRDY# 20,21,22,23,34
PAR 21,22,23,34
PERR# 20,21,22,23,34
PLOCK# 20

12

SERR# 20,21,23,34
STOP# 20,21,22,23,34
TRDY# 20,21,22,23,34

SM_INTRUDER# 20
SMLINK0 20
SMLINK1 20
SMB_CLK 12,20
SMB_DATA 12,20
SMB_ALERT# 20

GATEA20 29
H_A20M# 4
H_DPSLP# 4

H_IGNNE# 4
H_INIT# 4
H_INTR 4
H_NMI 4
H_PWRGD 4
KBRST# 29
H_SLP# 4
H_SMI# 4
H_STPCLK# 4

HUB_PD[0..10]

+VS_HUBVSWING

12

Title

Size Document Number Rev

Date: Sheet

C570
.01UF_0402

12

D

+3VS

+3VALW

R369
10K_0402

1 2

ICH_PME#

+3VS

12

R410
301_1%_0402

H_FERR#

C571
.1UF_0402

Q52

1
3

H_F_FERR#4

HUB_PD[0..10] 6

1 2

R401 36.5_1%

Close to ICH3-M.

2

3904

Comp a l Electro nics , In c .

SCHEMATIC, M/B LA -1302

401216

D

Place closely to
ICH3-M

CLK_ICHPCI

12

R380
10_0402

12

C551
15PF_0402

+3VS

R581

@10K_0402

1 2

R582

@10K_0402

1 2

(for use if CPU unable
to support DPSLP#)

12

R441
470_0402

Q58

1

2

3

3904

R440

1 2

470_0402

CLK_ICHHUB

R383
33_0402

1 2

C552
5PF_0402

18 45Wednesday, May 29, 2002

of

PCIRST# 4,6,13,21,22,23,29,34,35,36

1B

A

B

C

D

RTC BATT

A22F6G6H6J6

VSS102

VSS103

VCCPPCI0

VSS72

VSS73

VSS74

VSS75

P11

P13

P20

P22R3R5

VCCPPCI1

VCCPPCI2

VSS76

VSS77

+VCC_RTC

12

M10R6T6U6G18

VCCPPCI3

VCCPPCI4

VCCPPCI5

VCCPPCI6

VSS78

VSS79

VSS80

VSS81

R21

R23T4T20

C

C499
.1UF_0402

VCCPPCI7

VSS82

T22V3AC23

+3V

OVCUR#5
OVCUR#4
OVCUR#3
OVCUR#1

1 1

USBP0+31,34

USBP0-31,34

USBP2+31,34

USBP2-31,34

+3VS

12

R407

2 2

1K_0402

AV_VID4

0=I2C CTRL CPUVID select
1=Bus switch CPUVID select

3 3

+3VS

12

R429
@10K_0402

12

R421

2.5K_0402

4 4

RP148
1 8
2 7
3 6
4 5

8P4R_10K_0804

1 2

C632 5PF_0402

1 2

C633 5PF_0402

M/B ID

12

R436
@10K_0402

MB_ID0
MB_ID1

12

R431

2.5K_0402

USBP0+
USBP0-

USBP2+
USBP2-

Layout note The Cap close to
ICH3-M(< 1 inch)

*

USBP4+31

USBP4-31

1 2

C643 5PF_0402

OVCUR#031,34
OVCUR#231

PIDERST#28
SIDERST#24

FLASH#30

12

R472

18.2_1%

Note:
R376=22.6_1% for B0(QB63 part)
R376=18.2_1% for B0(QB62 & SL5LF part)

SPKR25

+1.8VS

+3VALW

USBP0+
USBP2+
USBP4+
USBP0­USBP2­USBP4-

OVCUR#0
OVCUR#1
OVCUR#2
OVCUR#3
OVCUR#4
OVCUR#5

AV_VID4
MB_ID0
MB_ID1

ICH_ACIN

SPKR

MB_ID0 MB_ID1
SST
PT
ST
QT

00

01
10

11

A

+5VS +3VS

21

12

+1.8VALW

R411

1 2

@1K_0402

D17
1SS355

12

C639

.1UF_0402

+1.8VS

BLM21A601SPT

E13

F14

K12

P10V6V7

VCC_SUS0

VCC_SUS1

VCC_SUS2

USB

Interface

Misc

Power

VSS35

E14

E15

L47

1 2

VCC_SUS3

VCC_SUS4

VCC_SUS5

VSS36

VSS37

VSS38

E18

E19

SPKR

USBP4+
USBP4-

R479

1K_0402

U42B

D19

USB_PP0

A19

USB_PP1

E17

USB_PP2

B17

USB_PP3

D15

USB_PP4

A15

USB_PP5

D18

USB_PN#0

A18

USB_PN#1

E16

USB_PN#2

B16

USB_PN#3

D14

USB_PN#4

A14

USB_PN#5

E12

USB_OC#0

D12

USB_OC#1

C12

USB_OC#2

B12

USB_OC#3

A12

USB_OC#4

A11

USB_OC#5

H20

USB_LEDA#0/GPIO32

G22

USB_LEDA#1/GPIO33

F21

USB_LEDA#2/GPIO34

G19

USB_LEDA#3/GPIO35

E22

USB_LEDA#4/GPIO36

E21

USB_LEDA#5/GPIO37

H21

USB_LEDG#0/GPIO38

G23

USB_LEDG#1/GPIO39

F23

USB_LEDG#2/GPIO40

G21

USB_LEDG#3/GPIO41

D23

USB_LEDG#4/GPIO42

E23

USB_LEDG#5/GPIO43

B21

USB_RBIAS

H23

SPKR

U19

VCCA

F17

VCCPSUS3/VCCPUSB0

F18

VCCPSUS4/VCCPUSB1

K14

VCCPSUS5/VCCPUSB2

E10

VCCPSUS0

V8

VCCPSUS1

V9

VCCPSUS2

ICH3-M

+3VS

Disable Timeout feature

B

12

C494
1UF_10V

+V1.8_ICHLAN

F15

F16F7F8

VCC_USB0/VCC_SUS6

VCC_USB1/VCC_SUS7

VSS39

VSS40

VSS41

VSS42

E20

F22G3G20

VCC5REF

+VCC_RTC

K10

VCC_AUX0/VCCLAN1_8

VCC_AUX1/VCCLAN1_8

VSS43

VSS44

H19

AA22J5K11

+3VALW

12

C530
.1UF_0402

+CPU_CORE

VCC_AUX2/VCCLAN1_8

AB6E6W8

VCC_RTC

+3VS

C13W5F9

VCC5REF1

VCC5REF2

VCC5REFSUS1

VCC5REFSUS2

VCCPAUX0/VCCLAN3_3

F10

VCCPAUX1/VCCLAN3_3

P14

U18

V22

VCCPCPU0

VCCPCPU1

VCCPCPU2

+1.8VALW

C23

B23E7T21D6T1C2A21

Power

VCCUSBBG/VCC_SUS8

VCCUSBPLL/VCC_SUS9

N/C0

N/C1

N/C2

N/C3

N/C4

ICH3-M (2/2)

VSS

VSS45

VSS46

VSS47

VSS48

VSS49

VSS50

VSS51

VSS52

VSS53

VSS54

VSS55

VSS56

VSS57

VSS58

VSS59

VSS60

VSS61

VSS62

VSS63

VSS64

VSS65

VSS66

VSS67

VSS68

VSS69

VSS70

VSS71

K13

K20

K21

K22

K23L3L10

L11

L12

L13

L14

L21

L23

M11

M12

M13

M20

M22N5N10

N11

N12

N13

N14

N21

N23

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

R336

1 2

1K_0402

H18

VCCP0

VCCP1

VSS83

VSS84

VSS85

VSS86

V20W6W7

+RTCVCC

Closely Pin AB6

+3VS

P12

V15

V16

V17

V18

VCCPIDE0

VCCPIDE1

VCCPIDE2

VCCPIDE3

VCCPIDE4

VSS87

VSS88

VSS89

VSS90

VSS91

W10

W14

W18

W22Y8AA3

BATT1

-+

ML1220

+RTCVCC

+1.8VS

J18

M14

R18

T18

E11K6K18P6P18

V10

V14

AC15

VCCCORE0

VCCCORE1

VCCCORE2

IDE

Interface

VSS98

VSS99

VSS100

AB8

AC1

AC8

VCCCORE3

VCCCORE4

VSS101

IDE_PDCS1#

AB15

IDE_PDCS3#

VCCCORE5

VCCCORE6

IDE_PDDACK#
IDE_SDDACK#

IDE_PDDREQ
IDE_SDDREQ

AC21

IDE_SDCS1#

AC22

IDE_SDCS3#

AA14

IDE_PDA0

AC14

IDE_PDA1

AA15

IDE_PDA2

AC20

IDE_SDA0

AA19

IDE_SDA1

AB20

IDE_SDA2
IDE_PDD0

IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8

IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

IDE_SDD0

IDE_SDD1

IDE_SDD2

IDE_SDD3

IDE_SDD4

IDE_SDD5

IDE_SDD6

IDE_SDD7

IDE_SDD8

IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15

IDE_PDIOR#

IDE_SDIOR#
IDE_PDIOW#
IDE_SDIOW#

IDE_PIORDY

IDE_SIORDY

PDD0

W12

PDD1

AB11

PDD2

AA10

PDD3

AC10

PDD4

W11

PDD5

Y9

PDD6

AB9

PDD7

AA9

PDD8

AC9

PDD9

Y10

PDD10

W9

PDD11

Y11

PDD12

AB10

PDD13

AC11

PDD14

AA11

PDD15

AC12

SDD0

Y17

SDD1

W17

SDD2

AC17

SDD3

AB16

SDD4

W16

SDD5

Y14

SDD6

AA13

SDD7

W15

SDD8

W13

SDD9

Y16

SDD10

Y15

SDD11

AC16

SDD12

AB17

SDD13

AA17

SDD14

Y18

SDD15

AC18
Y13

Y19
AB12
AB18
AC13
AC19
Y12
AA18
AB13
AB19

Title

Size Document Number Rev

Date: Sheet

VCCPHL0

VCCPHL1

VCCPHL2

VCCPHL3

VSS92

VSS93

VSS94

VSS95

VSS96

VSS97

AA8

AA12

AA16

AA20

BATT1.1

12

W=15mils

1

D30

HSM126S

CHGRTC

2

3

W=15milsW=15mils

R453

100K_0402

ACIN29,40

21

D28 RB751V

PDCS1# 28
PDCS3# 28
SDCS1# 24
SDCS3# 24

PDA0 28
PDA1 28
PDA2 28
SDA0 24
SDA1 24
SDA2 24
PDD[0..15] 28

SDD[0..15] 24

PDDACK# 28
SDDACK# 24
PDDREQ# 28
SDDREQ# 24
PDIOR# 28
SDIOR# 24
PDIOW# 28
SDIOW# 24
PDIORDY 28
SDIORDY 24

Comp a l Electro nics , In c .

SCHEMATIC, M/B LA -1302

401216

D

19 45Wednesday, May 29, 2002

+3VS

12

ICH_ACIN

1B

of

A

B

C

D

+3VS +3VS

RP142

FRAME#18,21,22,23,34
IRDY#18,21,22,23,34 SERR# 18,21,23,34
TRDY#18,21,22,23,34
STOP#18,21,22,23,34

1 1

1
2
3
4
5

+3VS

PCI_REQA#18
PCI_REQB#18
REQ#018,22
REQ#118,34

1
2
3
4
5

+3VS +3VS

GNT#118,34
GNT#218,21

PIRQD#18,34

IRQ1418,28

1
2
3
4
5

GNT#018,22

2 2

3 3

GNT#318,23
GNT#418,34

R356 10K_0402

CLKRUN#18,21,29,34,35

SMB_DATA12,18

SMB_CLK12,18

SMB_ALERT#18

1 2

R362 10K_0402

1 2

R353 10K_0402

1 2

R350 10K_0402

1 2

10
9
8
7
6

10P8R_8.2K

RP145

10
9
8
7
6

10P8R_8.2K

RP146

10
9
8
7
6

10P8R_8.2K

1 2

R469 8.2K_0402

1 2

R468 8.2K_0402

1 2

R470 8.2K_0402

+3VS

+3VS

+3VS

+3V

+3VALW

DEVSEL# 18,21,22,23,34
PERR# 18,21,22,23,34
PLOCK# 18

REQ#2 18,21
REQ#3 18,23
REQ#4 18,34
SERIRQ 18,21,29,35,36

IRQ15 18,24
PIRQA# 13,18,21,22
PIRQB# 18,23
PIRQC# 18,34

1UF_10V

+CPU_CORE

C531

+3VS

+3VS

+3VALW

+1.8VS

+1.8VALW

12

+

12

+

C493
22UF_10V_1206

12

C541
47PF_0402

12

+

C517

22UF_10V_1206

12

+

C519
100UF_10V_D2

12

C654
10UF_10V_0805

12

C525
.1UF_0402

12

+

C558
22UF_10V_1206

12

C628
.1UF_0402

12

C631
.1UF_0402

12

12

.1UF_0402

12

C565
.1UF_0402

C624

C527
.1UF_0402

12

C627
.1UF_0402

12

C630
.1UF_0402

12

12

C620
.1UF_0402

12

C540
.1UF_0402

C566
33PF_0402

12

C637
47PF_0402

12

12

12

C524
.1UF_0402

12

C549
.1UF_0402

C634
.1UF_0402

C606
.1UF_0402

12

C613
.1UF_0402

12

12

47PF_0402

C526
.1UF_0402

12

C548
.1UF_0402

C610

12

C580
.1UF_0402

12

C498
33PF_0402

12

C636
.1UF_0402

12

C635
.1UF_0402

12

C638
.1UF_0402

12

C547
.1UF_0402

12

C629

47PF_0402

12

C500
.1UF_0402

12

C496
.1UF_0402

12

C497

47PF_0402

12

C587
.1UF_0402

12

C538
.1UF_0402

12

C577
.1UF_0402

+3VALW

R351 4.7K_0402

SMLINK018
SMLINK118

1 2

R360 4.7K_0402

1 2

+RTCVCC

R320 8.2K_0402

SM_INTRUDER#18

4 4

A

1 2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

Size Document Number Rev

Date: Sheet

Title

Comp a l Electro nics , In c .

SCHEMATIC, M/B LA -1302

401216

20 45Wednesday, May 29, 2002

1B

D

of

A

+12VALW S1_VCC S1_VPP S1_VCC

U14

+5VALW

+3VALW

9

5
6

3
4

TPS2211

12V

5V
5V

3.3V

3.3V
GND

7

R545

22K_0402

16

Q76
3904

+3V

SHDN

VCC
VCC
VCC

VPP

VCCD0
VCCD1

VPPD0
VPPD1

G_RST#

12

2

31

OC

+3V

C162
.1UF_0402

1 1

C155
.1UF_0402

C153
.1UF_0402

2 2

WAKEUP#22,23,29

13
12
11

10

1
2
15
14

8

1 2

VCCD0#
VCCD1#
VPPD0
VPPD1

R114
10K_0402

PCM_PMER#

12

C154

4.7UF_10V_0805
S1_VPP

C161
.1UF_0402

PIR

CBE#318,22,23,34
CBE#218,22,23,34
CBE#118,22,23,34

G_RST#29

PIRQA#13,18,20,22

SERIRQ18,20,29,35,36

CBE#018,22,23,34

PCIRST#4,6,13,18,22,23,29,34,35,36

FRAME#18,20,22,23,34
IRDY#18,20,22,23,34
TRDY#18,20,22,23,34
DEVSEL#18,20,22,23,34
STOP#18,20,22,23,34

PERR#18,20,22,23,34

SERR#18,20,23,34

GNT#218,20

CLK_PCI_PCM12

PCM_PMER#

AD20

PAR18,22,23,34

3 3

REQ#218,20

4 4

+12VS

G

2

REQ#

13

D

S

Q28
2N7002

PCM_SUSP#29

+3V

1 2

R115 10K_0402

D8

RB751V

21

PCM_RI#34

CLKRUN#18,20,29,34,35

B

4.7UF_10V_0805

VPPD0
VPPD1
VCCD0#
VCCD1#

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

REQ#
CLK_PCI_PCM

1 2

R120 0_0402

1 2

R131 100_0402

PCM_RI#

G_RST#

+3V_CB

12

12

C169

10
11
15
16
17
19
23
24
25
26
38
39
40
41
43
45
46
47
49
51
52
53
54
55
56
57

12
27
37
48

20
28
29
31
32
33
34
35
36

21
59

70
13
60

61
64
65
67
68
69

66

3
4
5
7
8
9

1
2

C167
.1UF_0402

717273

74

VPPD0

VPPD1

VCCD0#

VCCD1#

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3

CARDBUS

AD2
AD1

CONTROLLER

AD0
C/BE3#

C/BE2#
C/BE1#
C/BE0#

PCIRST#
PCIFRAME#
PCIIRDY#
PCITRDY#
PCIDEVSEL#
PCISTOP#
PCIPERR#
PCISERR#
PCIPAR
PCIREQ#
PCIGNT#
PCIPCLK

RI_OUT#/PME#
SUSPEND#

IDSEL
MF0

MF1
MF2
MF3
MF4
MF5
MF6

G_RST#

CB1410

GND

GND

6

22

C

D

E

CardBus Socket

b68
b34
b67
b33

GND

b66
b32
b65
b31
b64
b30
b63

GND

b29
b62
b28
b61
b27
b60
b26

GND

b59
b25
b58
b24
b57
b23
b56

GND

b22
b55
b21
b54
b20
b53

GND

b19
b52
b18
b51
b17
b50
b16
b49
b15
b48
b14
b47
b13

GND

b46
b12
b45
b11
b44

GND

b10
b43

b9

b42

b8

GND

b41

b7

b40

b6

b39

b5

GND

b38

b4

b37

b3

b36

b2

b35

b1

81

PCMC154PIN

JP15AS1

CARDBUS HOU SING

B77
B76
B75
B74
B73
B72
B71
B70
B69
B68
B67
B66
B65
B64
B63
B62
B61
B60
B59
B58
B57
B56
B55
B54
B53
B52
B51
B50
B49
B48
B47
B46
B45
B44
B43
B42
B41
B40
B39
B38
B37
B36
B35
B34
B33
B32
B31
B30
B29
B28
B27
B26
B25
B24
B23
B22
B21
B20
B19
B18
B17
B16
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1

S1_CD2#
S1_WP

S1_D10
S1_D2
S1_D9
S1_D1
S1_D8
S1_D0
S1_BVD1

S1_A0
S1_BVD2
S1_A1
S1_REG#
S1_A2
S1_INPACK#
S1_A3

S1_WAIT#
S1_A4
S1_RST
S1_A5
S1_VS2
S1_A6
S1_A25

S1_A7
S1_A24
S1_A12
S1_A23
S1_A15
S1_A22

S1_A16

S1_A21
S1_RDY#
S1_A20
S1_WE#
S1_A19
S1_A14
S1_A18
S1_A13

S1_A17
S1_A8
S1_IOWR#
S1_A9
S1_IORD#

S1_A11
S1_VS1
S1_OE#
S1_CE2#
S1_A10

S1_D15
S1_CE1#
S1_D14
S1_D7
S1_D13
S1_D6

S1_D12
S1_D5
S1_D11
S1_D4
S1_CD1#
S1_D3

S1_VPP
S1_VCC

AD[0..31]18,22,23,34

S1_VCC

12

12

18

44

90

126

VCCP

VCCP

VCCCB

VCCCB

GND

GND

GND

GND

GND

GND

42

58

78

94

114

130

C171
.1UF_0402

1 2

R125 @0_1206

1 2

R111 0_1206

86

102

122

138

VCC

VCC

VCC

RSVD/D14

RSVD/A18

84

100

143

C181
.1UF_0402

+3V

14

30

50

63

VCC

VCC

VCCI

VCCP

VCCP

CAD31/D10

CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6

CAD19/A25

CAD18/A7
CAD17/A24
CAD16/A17

CAD15/IOWR#

CAD14/A9

CAD13/IORD#

CAD12/A11
CAD11/OE#

CAD10/CE2#

CAD9/A10

CAD8/D15

CAD7/D7

CAD6/D13

CAD5/D6

CAD4/D12

CAD3/D5

CAD2/D11

CAD1/D4
CAD0/D3

CCBE3#/REG#

CCBE2#/A12

CCBE1#/A8

CCBE0#/CE1#

CRST#/RESET

CFRAME#/A23

CIRDY#/A15

CTRDY#/A22

CDEVSEL#/A21

CSTOP#/A20
CPERR#/A14

CSERR#/WAIT#

CPAR/A13

CREQ#/INPACK#

CGNT#/WE#

CCCLK/A16

CSTSCHNG/BVD1

CCLKRUN#/WP

CBLOCK#/A19

CINT#/READY

SPKROUT

CAUDIO#/BVD2

CCD2#/CD2#
CCD1#/CD1#

CVS2/VS2#
CVS1/VS1#

RSVD/D2

+3VS

+3V

1 2

C158 .1UF_0402

U16

144
142
141
140
139
129
128
127
124
121
120
118
116
115
113
98
96
97
93
95
92
91
89
87
85
82
83
80
81
77
79
76

125
112
99
88

119
111
110
109
107
105
104
133
101
123
106
108

135
136

103
132
62

134
137

75
117
131

S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3

S1_REG#
S1_A12
S1_A8
S1_CE1#

S1_RST
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A14
S1_WAIT#
S1_A13
S1_INPACK#
S1_WE#

1 2
R135 33_0402
S1_BVD1
S1_WP

S1_A19
S1_RDY#

S1_BVD2

S1_CD2#

S1_CD1#
S1_VS2
S1_VS1

S1_D2
S1_A18
S1_D14

AD[0..31]

1 2

S1_VCC

S1_VCC

S1_A16

C165
1000PF_0402

1 2

R137 @22K_0402

1 2

R138 @22K_0402
CLK_PCI_PCM

+3V

12

R130
@47K_0402

PCM_SPK# 25

1 2

12

C159

4.7UF_25V_1206

S1_A23
S1_WP

12

R129
10_0402

12

C170
22PF_0402

1 2

R319 22K_0402

C183
1000PF_0402

PCM_RI#

12

C151
.01UF_0402

S1_VPP

S1_VCC

C140

10UF_16V_1206

S1_CD2#
S1_WP

S1_D10
S1_D2
S1_D9
S1_D1
S1_D8
S1_D0
S1_BVD1

S1_A0
S1_BVD2
S1_A1
S1_REG#
S1_A2
S1_INPACK#
S1_A3

S1_WAIT#
S1_A4
S1_RST
S1_A5
S1_VS2
S1_A6
S1_A25

S1_A7
S1_A24
S1_A12
S1_A23
S1_A15
S1_A22

S1_A16

S1_A21
S1_RDY#
S1_A20
S1_WE#
S1_A19
S1_A14
S1_A18
S1_A13

S1_A17
S1_A8
S1_IOWR#
S1_A9
S1_IORD#

S1_A11
S1_VS1
S1_OE#
S1_CE2#
S1_A10

S1_D15
S1_CE1#
S1_D14
S1_D7
S1_D13
S1_D6

S1_D12
S1_D5
S1_D11
S1_D4
S1_CD1#
S1_D3

12

C143
.1UF_0402

JP15

A77

a68

A76

a34

A75

a67

A74

a33

A73

GND

A72

a66

A71

a32

A70

a65

A69

a31

A68

a64

A67

a30

A66

a63

A65

GND

A64

a29

A63

a62

A62

a28

A61

a61

A60

a27

A59

a60

A58

a26

A57

GND

A56

a59

A55

a25

A54

a58

A53

a24

A52

a57

A51

a23

A50

a56

A49

GND

A48

a22

A47

a55

A46

a21

A45

a54

A44

a20

A43

a53

A42

GND

A41

a19

A40

a52

A39

a18

A38

a51

A37

a17

A36

a50

A35

a16

A34

a49

A33

a15

A32

a48

A31

a14

A30

a47

A29

a13

A28

GND

A27

a46

A26

a12

A25

a45

A24

a11

A23

a44

A22

GND

A21

a10

A20

a43

A19

a9

A18

a42

A17

a8

A16

GND

A15

a41

A14

a7

A13

a40

A12

a6

A11

a39

A10

a5

A9

GND

A8

a38

A7

a4

A6

a37

A5

a3

A4

a36

A3

a2

A2

a35

A1

a1

787980

787980

81

+3V_CB

12

C157
.1UF_0402

12

C179
.1UF_0402

12

C182
.1UF_0402

A

12

C180
.1UF_0402

12

C156
.1UF_0402

12

C173
.1UF_0402

12

C172
.1UF_0402

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA -1302

Size Document Number Rev

Date: Sheet

Comp a l Electro nics , In c .

401216

21 45Wednesday, May 29, 2002

E

1B

of

A

B

C

D

E

IEEE1394 Controller/PHY

1 1

+3VS +3VS +3VS

113

1258203335

114

VDD1

VDD2

VDD3

VDD4

VDD5

VDD6

VDDC2

IEEE 1394

VSS5

VSS6

VSS7

VSS8

VSS9

VSSC1

VSSC2

12119162634115

PAR18,21,23,34

AD[0..31]

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

R93 100_0402

AD16

1 2

CLK_PCI_1394

12

R106
33_0402

12

C152
22PF_0402

102

28

AD0

27

AD1

23

AD2

22

AD3

21

AD4

19

AD5

18

AD6

17

AD7

14

AD8

13

AD9

12

AD10

11

AD11

10

AD12

7

AD13

6

AD14

5

AD15

120

AD16

119

AD17

118

AD18

117

AD19

116

AD20

112

AD21

110

AD22

109

AD23

106

AD24

105

AD25

104

AD26

101

AD27

100

AD28

99

AD29

98

AD30

97

AD31

15

CBE0#

4

CBE1#

122

CBE2#

107

CBE3#

108

IDSEL

123

FRAME#

124

IRDY#

126

TRDY#

127

DEVSEL#

128

STOP#

2

PERR#

3

PAR

96

REQ#

95

GNT#

91

INTA#

92

PCIRST#

93

PCICLK

36

AD[0..31]18,21,23,34

2 2

CBE#018,21,23,34
CBE#118,21,23,34
CBE#218,21,23,34

CBE#318,21,23,34

FRAME#18,20,21,23,34

IRDY#18,20,21,23,34

TRDY#18,20,21,23,34

DEVSEL#18,20,21,23,34

STOP#18,20,21,23,34

PERR#18,20,21,23,34
REQ#018,20

3 3

GNT#018,20

PIRQA#13,18,20,21

PCIRST#4,6,13,18,21,23,29,34,35,36

CLK_PCI_139412

C116
.1UF_0402

.1UF_0402

C118

39

49

50

PVDD1

PVDD2

PGND2

41

PGND1

24

VDDC1

RAMVDD

VT6306

D7/PC2JMP

CTL0/PC0JMP

CTL1/PC1JMP

LREQ/TSOJMP

LINKON/TSIJMP

NC

VSS1

VSS2

VSS3

VSS4

RAMVSS

94

103

111

25

C128

.1UF_0402

62

VDDATX0

D6/CMCJMP

R88

2K_1%_0402

27PF_0402

+3VS

SCLKD0D1D2D3D4D5

C131

59

GNDATX0

LPS/CMC

384044454647485152535455565767

+3VS

C138

.1UF_0402

76

VDDATX1

XI

60

X2

24.576MHz_30ppm

R90

1M_0402

69

GNDATX2

GNDARX0

GNDARX1

GNDARX2

SCL/EECK

XTPBIAS0

XTPBIAS1

XTPBIAS2

PHYRESET

XO

61

C137

27PF_0402

GNDATX1
VDDATX2

VDDARX0

VDDARX1

VDDARX2

EECS
EEDO

SDA/EEDI

PME#
MODE1
MODE0

XCPS

XREXT

XTPB0M
XTPB0P
XTPA0M
XTPA0P

XTPB1M
XTPB1P
XTPA1M
XTPA1P

XTPB2M
XTPB2P
XTPA2M
XTPA2P

VT6306

U10

90

83
65

64
75

68
89

82
29

30
31
32

37
42
43

63
66
70

71
72
73
74

R94 1K_0402

77

R98 1K_0402

78

R101 1K_0402

79

R103 1K_0402

80
81

R105 1K_0402

84

R109 1K_0402

85

R110 1K_0402

86

R112 1K_0402

87
88
58

C117

.1UF_0402

C114

.1UF_0402

C125

.1UF_0402

C115

.1UF_0402

EEDI_LAN
EECK_LAN

C134
.1UF_0402

XTPB0­XTPB0+
XTPA0­XTPA0+

XTPBIAS0

+3VS

WAKEUP# 21,23,29

+3VS

R96

1K_0402

R95

1K_0402

R102

6.34K_1%

C142
47PF_0402

12

.1UF_0402

+3VS

CLOSE TO CHIP

C144

12

.1UF_0402

XTPBIAS0
XTPA0+
XTPA0­XTPB0+
XTPB0-

270PF_0402

C147

R99

54.9_1%

C141

12

C136
.1UF_0402

12

12

12

R108

54.9_1%

12

.1UF_0402

C119

U5

1

A0

2

A1

3

A2

4 5

GND SDA

24C02-27

12

R107

54.9_1%

12

R100

54.9_1%

12

R97

5.1K_1%

12

C145
.1UF_0402

12

C149

.1UF_0402

+3VS

8

VCC

7

WC#

EECK_LAN

6

SCL

EEDI_LAN

12

C160

0.33UF_25V_1206

R515 0_0402
R516 0_0402
R517 0_0402
R518 0_0402

12

C148
.1UF_0402

12

R54
510

12

C130

.1UF_0402

1394_CONN 4PIN

JP12

+3VS

12

C146
.1UF_0402

4
3
2
1

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

Title

Size Document Number Rev

Date: Sheet

Comp a l Electro nics , In c .

SCHEMATIC, M/B LA -1302

401216

22 45Wednesday, May 29, 2002

E

1B

of

A

B

C

D

E

LANIO

Q8

2

AD[0..31]

AD17

CLK_PCI_LAN

3
1

@PBSS5140T

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9

AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

R89 100_0402

CLK_PCI_LAN

12

12

VCTRL

1 1

AD[0..31]18,21,22,34

2 2

CBE#018,21,22,34
CBE#118,21,22,34
CBE#218,21,22,34

CBE#318,21,22,34

FRAME#18,20,21,22,34

IRDY#18,20,21,22,34

TRDY#18,20,21,22,34

DEVSEL#18,20,21,22,34

STOP#18,20,21,22,34
PERR#18,20,21,22,34
SERR#18,20,21,34

3 3

PAR18,21,22,34
REQ#318,20
GNT#318,20

PIRQB#18,20

PCIRST#4,6,13,18,21,22,29,34,35,36

CLK_PCI_LAN12

PMOS , Rdson = 0.19@Vgs=2.5V

LANIO

R84 @0_0805

U12

45

R71
10_0402

C109
22PF_0402

100

44
42
41
38
37
36
33
30
29
28
27
26
25
24
23
10

9
8
5
4
3
1

95
94
93
92
91
89
87
86

32
21
11
98

12
13
14
15
17
18
19
20
85
84
99
81
82

83

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

CBE0B
CBE1B
CBE2B
CBE3B

FRAMEB
IRDYB
TRDYB
DEVSELB
STOPB
PERRB
SERRB
PAR
REQB
GNTB
IDSEL
INTAB
RSTB

CLK

RTL8100BL

VDD25

LAN CONTROLLER
RTL8100BL

GND

GND

GND

GND

21688433173666256

Q10
SI2301DS

S

D

1 3

+3VALWLANVDD

G

2
2

G

1 3

+2.5VALW

D

S

Q11
SI2301DS

6722

51

VDD25

GND

GND

GND

90969740393534

58

VDDNCVDD

VDD

VDDNCVDDNCVDD

AVDD25

NCNCNC

NC

NC

GND

GND

785453

52

76

X1

61

CLKOUT

C90
27PF_0402

75

706959

AVDD

AVDDNCAVDD

Y1 25MHz_25ppm

CRYSTAL

EN_WOL# 29

LANIOLANVDDLANVDD LANIO

50

AUX

R77

5.6K_0402

ISOLATEB

LWAKE

60

XTALFB

PMEB

VCTRL

EECS
EESK

EEDI

EEDO

RTT3
LED2

LED1
LED0

TXD-

TXD+

RXIN-

RXIN+

RTSET

X2

C88
27PF_0402

74
57

55

49
48
47
46

64
63

77
79
80

49.9_1%_0402

71
72

67
68

65

C89

.1UF_0402

VCTRL

EECS
EESK
EEDIAD10
EEDO

LAN_LED1
LAN_LED0

R62

LAN_RX­LAN_RX+

1 2

12

C82
.1UF_0402

12

R61

49.9_1%_0402

R63

5.6K_0402

LANIO_AVDD

C86

.1UF_0402

1
2
3
4

LAN_TX­LAN_TX+

ISOB

WAKEUP# 21,22,29

U8

CS
SK
DI
DO

93C46-3GR

C87

.1UF_0402

VCC

NC
NC

GND

C38 .1UF_0402

49.9_1%_0402

LANIO

L16

HB-1M2012-601JT

8
7
6
5

1 2

12

R25

1 2

12

C43
.1UF_0402

LANIO

C121
.1UF_0402

1:1

U3

8 9

TD+ TX+

7

CT

5

NC

4

NC

2

CT

1

RD-

3

RD+

R19

TS6121C

49.9_1%_0402

15K_0402

RX­RX+

LANVDD

12

C133

10UF_10V_0805

+3VS

R60

1K_0402

R57

116

TX-TD-

10

CT

13

NC

12

NC

15

CT

16
14

RJ45_TXX­RJ45_TXX+

RJ45_RXX+

C132
.1UF_0402

RJ45_TXX- 34
RJ45_TXX+ 3 4
RJ45_RXX- 34
RJ45_RXX+ 34

R153

75_1%

1000PF_2KV_1206

CHASSIS GND

12

R148
75_1%

LANGND

C261

R02
PIR8

12

C93
.1UF_0402

C124
.1UF_0402

RJ45_TXX+
RJ45_TXX­RJ45_RXX+

RJ45_RXX-

MOD_RING

VH1

DSSA-P3100SB

MOD_TIP

C91
.1UF_0402

R154 75_1%

1 2

R156 75_1%

1 2

12

12

C295

220PF_3KV_1808

10UF_10V_0805

LAN Realtek RTL8100

LANVDDLANIO

12

12

C296
220PF_3KV_1808

8
7
6
5
4
3
2
1

9
10
11
12

C92
.1UF_0402

JP7

TX+
TX-

CATHODE1

RX+
N/C1
N/C2
RX­N/C3

CATHODE2

N/C4

N/C5
RING
TIP
N/C6

RJ-45 & RJ-11

GND1

ANODE1

ANODE2

GND2

MOD_TIP
MOD_RING

R02
PIR8

C127

12

LAN_LED1

C101
@10PF_0402

LAN_LED0

C104
@10PF_0402

JP26

1
2

MODEM CONN.

LAN_LED1

12

1000PF_0402

ACT_CRRJ45_RXX-

R02
PIR8

C241

R145 330_0402

LAN_LED0

12

C277

1000PF_0402

GREEN

R157

330_0402

YELLOW

12

LANIO

12

LANIO

13

16

15

17

18

14

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

C

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

D

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-1302

401216

E

23 45Wednesday, May 29, 2002

1B

of

A

To TAS3002 EQ and OZ163 DJ

SDD[0..15]

CD_DD[0..15]

1 1

EC_SMD24,29,34

EC_SMC24,29,34

EN_CDPLAY#25,27

OSC1

2 2

3 3

4 4

12

PLAYBTN#
REVBTN#
FRDBTN#
STOPBTN#

+5VCD

12

C600

4.7UF_10V_0805

12

C604

4.7UF_10V_0805

C529
22PF_0402

EN_CDPLAY#

X4

8MHZ

R368 1M_0402

RP138
1 8
2 7
3 6
4 5

8P4R_10K_0804

C523 1UF_10V

1 2

R355 100K_0402

D18 1N4148

+5VCD

12

C608
1UF_25V_0805

+5VALW

12

C597
1UF_25V_0805

A

SDD[0..15] 19

CD_DD[0..15] 28

Q43

2N7002

1 3

2

OSC2

12

C532
22PF_0402

+5VCD

12

21

2N7002

1 3

2

CD_PLAY_ON#30

Q42

2

1 2

1 2

13

Q41
2N7002

SIDERST#19

EC_SMD1_CD

EC_SMC1_CD

R348

100K_0402

R585

@100K_0402

+5VCD

DM_ON

CD_PLAY_ON#

EC_SMD1_CD

EC_SMC1_CD

R03 PIR

+5VALW

+12VALW

SDA019
SDA119
SDA219

SDCS1#19
SDCS3#19

SDIOR#19
SDIOW#19

SDIORDY19

IRQ1518,20

SDDREQ#19

SDDACK#19

SIDERST#

R341 33_0402

R361

1 2

10K_0402
D22

21

RB751V

+5VALW

5 6

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

SDA0
SDA1
SDA2

SDCS1#
SDCS3#

SDIOR#
SDIOW#

SDIORDY

IRQ15
SDDREQ#
SDDACK#

1 2

PLAYBTN#
FRDBTN#
REVBTN#
STOPBTN#

EC_SMD1_CD 26
EC_SMC1_CD 26

U29C

74HCT14

+5VALW POWER

7 14

INTN

OSC1
OSC2

B

+5VCD_2

C574
.1UF_0402

94458

VDD

VDD

Q55
2N7002

GND

GND

GND

1633658592

VDD

GPIO[1]/VOL_UP
GPIO[0]/VOL_DN

GND

GND

CDD0
CDD1
CDD2
CDD3
CDD4
CDD5
CDD6
CDD7
CDD8

CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15

CDA0

CDA1

CDA2

CCS0

CCS1

CDIOR#

CDIOW#

CIOCS16#

CIORDY

CHINTRQ
CDMARQ

CHDMACK#

CRESET#

CDASPN

SSYNC

SBIT_CLK

SDATA_OUT

SDATA_IN

SACRSTN

PWR_CTL

ISCDROM

MODE0
MODE1

PAVMODE

CSN
INCN
UDN

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

76

HDD0

78

HDD1

81

HDD2

83

HDD3

86

HDD4

90

HDD5

95

HDD6

97

HDD7

2

HDD8

4

HDD9

8

HDD10

11

HDD11

15

HDD12

18

HDD13

20

HDD14

22

HDD15

68

HDA0

70

HDA1

66

HDA2

63

HCS0

61

HCS1

99

HDIOR#

6

HDIOW#

72

HIOCS16#

93

HIORDY

74

HINTRQ

12

HDMARQ

88

HDMACK#

24

HRESET#

59

HDASPN

48

HSYNC

53

HBIT_CLK

55

HDATA_OUT

50

HDATA_IN

46

HACRSTN

28

PAV_EN

36

PLAY/PAUSE

35

FFORWARD

34

REWIND

37

STOP/EJECT

29

PCSYSTEM_OFF

25

INTN

30

RESET#

26

SDATA

27

SCLK

31

OSCI

32

OSCO

+5VCD

12

R437
10K_0402

DM_ON#

DM_ON

B

13

2

C554

.1UF_0402

U30
OZ163

77
79
82
84
87
91
96
98
1
3
7
10
14
17
19
21

69
71
67

64
62

100
5
73
94

75
13
89

23
60

47
52
54
49
45

51

80
39

40

56
57

38

R374 10K_0402
41
42
43

C

+5VCD

CD_DD0
CD_DD1
CD_DD2
CD_DD3
CD_DD4
CD_DD5
CD_DD6
CD_DD7
CD_DD8
CD_DD9
CD_DD10
CD_DD11
CD_DD12
CD_DD13
CD_DD14
CD_DD15

CD_DA0
CD_DA1
CD_DA2

CD_DCS1#
CD_DCS3#

CD_DIOR#
CD_DIOW#
CIOCS16#
CD_DIORDY

CD_IRQ15
CD_DDREQ#
CD_DACK#

CD_IDERST#
CDASPN

1 2

R395
ISCDROM
GPIO_1

GPIO_0

MODE0
MODE1

1 2

C

L44
HB-1M2012-601JT

1 2

C501
.1UF_0402

10K_0402

CD_DA0 28
CD_DA1 28
CD_DA2 28

CD_DCS1# 28
CD_DCS3# 28

CD_DIOR# 28
CD_DIOW# 28

CD_DIORDY 28

CD_IRQ15 28
CD_DDREQ# 28
CD_DACK# 28

CD_IDERST# 28

+5VCD

+5VCD

+5VCD

+5VCD

INT_CD_L28

ISCDROM
CD_IRQ15
CDASPN
INTN

CIOCS16#

CD_DD0
CD_DD1
CD_DD2
CD_DD3

CD_DD8
CD_DD9
CD_DD10
CD_DD11

D

INT_CD_L

INT_CD_R

RP143
1
2
3
4
5

10P8R_10K

1 2

R402 47K_0402

RP139
1
2
3
4
5

10P8R_4.7K

RP117
1
2
3
4
5

10P8R_4.7K

+3VS

12

R357

@4.7K_0402

1 2

R366 @0_0402

1 2

R397 @0_0402

1 2

R347 @0_0402

1 2

R342 @0_0402

D

R02 PIR9

10

MODE0

9

MODE1

8

GPIO_0

7

GPIO_1

6

10

CD_DD7

9

CD_DD6

8

CD_DD5

7

CD_DD4

6

10

CD_DD15

9

CD_DD14

8

CD_DD13

7

CD_DD12

6

R365 1K_0402

CD_DIORDYSDIORDY

CD_IRQ15IRQ15

1 2

R343 5.6K_0402

CD_DDREQ#SDDREQ#

CD_IDERST#SIDERST#

E

Audio DJ OZ163

R563

1 2

0_0402

R564

1 2

@0_0402

Input to CODEC

R565

1 2

0_0402

R566

1 2

@0_0402

SDCS3#

+5VCD

+5VCD

+5VCD

+5VCD

12

+5VCD

Title

Size Document Number Rev

B

401216

Date: Sheet

SDCS1#
SDA2
SDA0
SDA1
SDIOW#
SDIOR#
SDDACK#

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7

SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

Comp a l Electro nics , In c .

SCHEMATIC, M/B LA -1302

CDROM_L 25

CDROM_LR 25

CDROM_R 25

CDROM_RR 25INT_CD_R28

RP144
1
2
3
4
5
6
7
8 9

@16P8R_0

RP136
1
2
3
4
5
6
7
8 9

@16P8R_0

RP116

16
15
14
13
12
11
10

@16P8R_0

E

CD_DCS3#

16

CD_DCS1#

15

CD_DA2

14

CD_DA0

13

CD_DA1

12

CD_DIOW#

11

CD_DIOR#

10

CD_DACK#

CD_DD0

16

CD_DD1

15

CD_DD2

14

CD_DD3

13

CD_DD4

12

CD_DD5

11

CD_DD6

10

CD_DD7

CD_DD8

1

CD_DD9

2

CD_DD10

3

CD_DD11

4

CD_DD12

5

CD_DD13

6

CD_DD14

7

CD_DD15

89

24 45Wednesday, May 29, 2002

of

1B

A

BEEP#29

+5VALW POWER

12

C472

.1UF_0402

1 1

2 2

+3VALW

14

2 3
7

1

U28A
74LVC125

CLK_AC1412

+3VALW

12

PCM_SPK#21

R273

100K_1%_0402

R02 PIR9

R424

1 2

0_0402

@0_0402

0_0402

20K_0402

R559

@0_0402

R560

R561

R562

12

MOD_AUDIO_MON34

3 3

CDROM_LR24

CDROM_L24

CDROM_RR24

CDROM_R24

4 4

C602

.1UF_0402

1 2

1 2

1 2

1 2

R274

1 2

10K_1%_0402

SPKR19

R425

33K_0402

12

3.9K_0402

3.9K_0402

B

C434

.22UF_X7R

MOD_AUDIO_MONR

R525

12

R528

12

30K_0402

+3VALW

14

1 2

12

+3VALW

14

3 4

+3VALW

14

5 6

R385

0_0402

@22PF_0402

C579 @15PF_0402

AC97_RST#18,34

AC_BITCLK18,34

AC_SYNC18,34
AC_SDATAO18,34
SDATA_IN018

12

R526

CD_AGND28

C585

12

30K_0402

U21A
74LVC14

U21B
74LVC14

U21C
74LVC14

1 2

1UF_10V

1 2

1UF_10V

R527

12

C601

C612

1UF_10V

R02
PIR4

R405

@1M_0402

Y4

@24.576MHz

C

C432

R262

12

1 2

560_0402

1UF_10V

C431

R255

12

1 2

560_0402

C430

R253

12

1 2

560_0402

1UF_10V

@10K_0402

C584

@22PF_0402

1 2

R408 22_0402

MONO_IN

1 2

C594 .1UF_0402

MICIN27

R443

3.9K_0402

R03 PIR29

12

R251

2

12

12

R448

30K_0402

AVDD

12

12

10K_0402

1
3

Q47

2SC2411EK

2
3

11

6

10

5
8

12
13
14
15
16
17
18
20
21
22
23
24

CD_GNA

R438
10K_0402

R430

12

2 1

XTL-IN
XTL-OUT

RESET#
BIT-CLK
SYNC
SDATA-OUT
SDATA-IN

PC-BEEP
PHONE
AUX-L
AUX-R
VIDEO-L
VIDEO-R
CD-L
CD-R
MIC1
MIC2
LINE-L
LINE-R

1 2

1UF_10V_0603

C603

12

1UF_10V

C590

1 2

1UF_25V_0805

R423

2.4K_0402

D16
RB751V

12DB totally
for CD channel

4

C609

D

MONO_IN

1925

CD-GND

VSS

VSS

72642

19

VDD

AVDD_AC97

VDD

AVSS

AVSS

+3VALW

38

AVDD

AVDD

VDDC

12

C586
.1UF_0402

8
7
6
5

12

C656
.1UF_0402

LINE-OUTL
LINE-OUTR

MONO-OUT

VREF

VREFOUT

AFILT1
AFILT2

VRAD
VRDA

CAP1

JD/SDIN1

TEST1

ID0#
ID1#

EAPD

SPDIFO

HP-OUT-L

HP-OUT-R

ALC202

U53

D
D
D
D

SI4800

33_0402

R398 0_0805

12

C583
10UF_10V_0805

U38

35
36
37

27
28

29
30

31
32
33
34

NC

43
44
45
46
47
48
39
40

NC

41

+3VCD

1

S

2

S

3

S

4

G

12

R495

13

1 2

HB-1M2012-121JT

12

C605
10UF_16V_1206

1000PF_0402

MDMIC

1 2

R587 0_0402

12

E

C695

.1UF_0402

2

Q62

2N7002

1 2

C651

C641

R413
0_0402

+12VALW

12

+3VS

L46

1000PF_0402

C642

12

R501
100K_0402

Q69
2N7002

13

2

AVDD

1 2

1000PF_0402

AVDD

R03 PTR

1 2

12

R419
@0_0402

+5VALW

EN_CDPLAY# 24,27

C589

4.7UF_10V_0805

C657
1000PF_0402

1 2

R409

33_0402

0_0805

MIC_REF 27

C738

C659
1UF_10V

C650
1UF_10V

12

R413 R419 FREQ. SEL

X

ON

X

F

U40
8
7
6
5

SI4800

12

12

C595
.1UF_0402

C737

0_0805

12

12

C640

.1UF_0402

C649

R02 PIR4

X

24.576MHZ

X

14.318MHZ

ON

48MHZ

G

+12VALW

+5VCD

1

S

D

2

S

D

3

.1UF_0402

S

D

4

G

D

12

R415

33_0402

13

2N7002

Some components was reserved
for adjustable regulator.

+5VCD+5VALW

R406
10K_0402

1

C617 1UF_25V_0805
C623 1000PF_0402

C648

1UF_10V

1UF_10V

SPDIFO 34

12

100K_0402

C596

12

2

Q50

R414

13

Q49
2N7002

EN_CDPLAY#

+5VALW

2

40 Mil trace

R553

@10K_0402

U37

VIN

Si9183DT-33

1 2
1 2

5

VOUT

4

BP

23

GNDSHDN#

Refer to below figure for upper
three resistor placement

12

12

LEFT_EQ 26
RIGHT_EQ 26

MD_MIC 34

Zin 4.5 MB solder side view

Digital area Analog

U29D

74HCT14

98

7 14

@.1UF_0402

C728

.1UF_0402

AC97 Codec

CD_PLAY

C582

C727

.1UF_0402

1 2

H

CD_PLAY 30

AVDD=3.3V

AVDD

12

12

C591

4.7UF_10V_0805

R557

1 2

0_1206

R558

1 2

@0_1206

R557

area

R558

R556

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

C

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

D

E

F

Title

Size Document Number Rev

B

Date: Sheet

Comp a l Electro nics , In c .

SCHEMATIC, M/B LA -1302

401216

G

25 45Wednesday, May 29, 2002

H

1B

of

A

1 1

+3VCD

RP152

8P4R_10K_0804
RP151

8P4R_10K_0804

2 2

HPS27

3 3

4 4

D31

RB751V

21

45
36
27
18

45
36
27
18

+3VCD

12

R498

10K_0402

IO0
IO1
IO2
IO3

LOW = 68H

IO4

HIGH= 6AH

IO5

EC_SMC1_CD24

EC_SMD1_CD24

+3VCD

12

R462

10K_0402

12

C653

.1UF_0402

@10UF_10V_0805

C658

27PF_0402

C731

B

+3VCD

12

12

1 2

1 2

12

R454
10K_0402

R461
@10K_0402

@10K_0402

R583

0_0402

R584

0_0402

X5

24.576MHz_30ppm

27PF_0402

+3VCD

C732

@.1UF_0402

12

CS1

+3VCD

12

12

R588

C666

R471 10K_0402

1 2

R497 @10K_0402

10UF_10V_0805

+5VCD+5VALW

R567
@10K_0402

R589

@10K_0402

12

C678

U58

1

VIN

@Si9183DT-33

2

CS1

+3VCD

3

1

12

C

D

R02 PIR

R492

C682

C619

C730

1 2

3.9K_0402

12

R456

1 2

3.9K_0402

12

@10K_0402

AVDD

R549
0_0603

1 2

12

R496
@10K_0402

1 2

R455

1 2

1

LINA

48

LINB

40

RINA

41

RINB

47

ANLP

46

ANLM

42

ANRP

43

ANRM

37

AOUTR

38

VCOM

39

AOUTL

34

NC

36

NC1

2

VRFILT

44

VREFP

45

VREFM

10

CAP_PLL

35

AVDD

3

AVSSREF

4

AVSS

@FBM-11-160808-121

EQAVDD

40 Mil trace

10UF_10V_0805

C626
1UF_10V_0805

1 2

C646

1 2

1UF_10V

1 2

+3VCD

L49

C701

C675
1UF_10V

C644 1200PF

C668
1200PF

12

12

12

C688

.1UF_0402

1 2

RIGHT

LEFT

12

C660
1UF_10V_0805

R477

24.9K

R488

24.9K

C645

1500PF

RIGHT 27

LEFT 27

C625

10UF_10V_0805

12

12

C667

.1UF_0402

R475

27.4

12

C622
.068UF

12

C647

.1UF_0402

12

LEFT_BYPASS 27

C696

10UF_10V_0805

C661
1UF_10V

RIGHT_EQ25 RIGHT_BYPASS 27

@220PF_0402

LEFT_EQ25

@220PF_0402

U45

22

D32

RB715F

IO0
IO1
IO2
IO3
IO4
IO5

C670

.1UF_0402

12

40 Mil trace

5

VOUT

4

BP

23

GNDSHDN#

23

26
24
25

19
20
12

13
14

15
16

5
6
7
8

9
11
21

27
28
29
30
31
32
33

17
18

12

SDIN1
SDIN2

SDOUT1
SDOUT2
SDOUT_ADC

LRCLK/O
SCLK/O
MCLK_OUT

XTLIN1/MCLK
XTLIN2

SCL
SDA

INPA_ACT
RST#
CS1
PWRDWN
TEST
CLK_SEL
IFM/S

ALLPASS
IO0
IO1
IO2
IO3
IO4
IO5

DVDD
DVSS

TAS3002CPFB

@.1UF_0402

C733

@.1UF_0402

C729

12

@4.7UF_10V_0805

E

DIGITAL EQ

EQOUT_VREF 27

12

12

C684
.1UF_0402

12

C655

.1UF_0402

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

Title

Size Document Number Rev

B

Date: Sheet

Comp a l Electro nics , In c .

401216

SCHEMATIC, M/B LA -1302

26 45Wednesday, May 29, 2002

E

of

1B

A

B

C

D

E

AMP & Audio Jack

18

13

VDD4

VDD3

VDD2

R_UP/DOWN#

L_UP/DOWN#

GND4

GND3

GND2

201110

TDA8552TS

DOCK_MIC

CHANGE FROM
220U 07/05

ROUT+

ROUT-

LOUT+

LOUT-

GAINSEL

SVR

12

+

C674
100UF_10V_D2

12

19

2

9

6

7

14

16

C679

.1UF_0402

LINEOUTR 34

LINEOUTL 34

S

G

2

D

1 3

2

13

Q66

SI2302DS

Q71 SI2302DS

13

2

+

C690

BT_ON# 30,31

R541 301_0402

1 2
1 2

R542 301_0402

12

R504
@24K_1%

LOUT_VREF

12

R503
@75K_1%

Q61

2N7002

R490

1 2

100K_0402

SPKR+

SPKL+

10UF_16V_1206
16V

HP_OUT_PLUG

D

+12VALW

R02
PIR10

JP8

INT MIC IN CONN.

INTMICOFF#34

BT_ON/OFF# 30

SPKL+
SPKR+

1
2

SI2302DS

DIS_ADJVOL 30

+5VALW

S

220PF_0402

EC_MUTE_L

EC_MUTE_LINE#

2

1 3

Q63

Q65

SI2302DS

1 3

2

EC_MUTE_LINE#

ADJVOL_UP/DW# 30

12

12

R510
330_0402

Q74

NDS352P

G

2

D

1 3

R543

@4.22K_0402

1 2

1 2

R499 0_0402

+5VAMP

R544

@4.22K_0402

R02 PIR15

1 2

+3VCD

EC_MUTE_L30

SPKR-

SPKL-

4

U57B
74AHC125

13

Q73

2N7002

12

C708
220PF_0402

EQOUT_VREF26

56

+5VAMP POWER

R491 100K_0402

HPS

2

12

C707

12

R508 0_0402

30dB/20dB#

12

12

C680

2.2UF_16V_0805

JP24

12
34
56
78
910

1112

HP/MIC_12PIN

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C709

220PF_0402

C

12

SPKR+
SPKR-

SPKL+
SPKL-

12

C39

220PF_0402

12

C40

220PF_0402

12

C41

220PF_0402

12

C42
220PF_0402

SI2304 Rds(on) = 0.90 @ Vin = 4.5 V

Id max. = 2.5 A

1
2

INT_MIC

R20 39K

1 2

Q4

SI2304DS

2

1 2

+

13

1M_0402
R155

1 2

R22 10M

C36

10UF_16V_1206
16V

DOCK_MIC

SI2306 Rds(on) = 0.094 @ Vin = 4.5 V

Id max. = 3.5 A

+5VALW +5VAMP

4.7UF_10V_0805

R500

+12VALW

EN_CDPLAY#24,25

Title

Size Document Number Rev

Date: Sheet

1 2

100K_0402

B

401216

Q67

1 3

12

2N7002

SI2306DS

2

Q68

1

2

3

C700

Comp a l Electro nics , In c .

SCHEMATIC, M/B LA -1302

E

1
2

R-SPK CONN.

1
2

L-SPK CONN

+12VS

C687

4.7UF_10V_0805

12

C697
.01UF_0402

27 45Wednesday, May 29, 2002

JP10

1
2

JP9

1
2

DOCK_MIC 34

12

of

1B

C706

.1UF_0402

+5VAMP

1 1

RIGHT_BYPASS26

RIGHT26

LEFT26

LEFT_BYPASS26

+5VALW

12

R509
100K_0402

HP_OUT_PLUG

1

1 2

1UF_10V

C618

U57A
74AHC125

HPS26

1 2

C662 22PF_0402

1 2

R481 82K_0402

+5VAMP

U46A

84

TDA1308

3

+

2

-

1 2

C663 22PF_0402

1 2

R482 82K_0402

+5VAMP

U46B

84

TDA1308

5

+

6

-

14

R502

MIC_REF25

LOUT_VREF

1 2

LOUT_VREF

1 2

A

2 3
7

12

MICIN

1 2

R484 56K_0402

1 2

R487 56K_0402

DOCK_HP_OUT_PLUG34

2 2

100K_0402

3 3

MICIN25

RIGHT

C677

2.2UF_16V_0805

4 4

LEFT

C669

2.2UF_16V_0805

RIGHT

LEFT

+5VAMP

100K_0402

1

7

0_0805

C734

@2.2UF_16V_0805

1 2

2.2UF_16V_0805
1 2

2.2UF_16V_0805
1 2

1 2

C735

@2.2UF_16V_0805

1 2

R531

12

C672

C673

@100K_0402

100K_0402

C616

10UF_10V_0805

1 2

12

C742

@4700PF_0402

Q59
2N7002

D

S

1 3

G

2

Q64
2N7002

D

S

1 3

G

2

L48

1 2

+5VAMP

R507

R505

R590

1k_0402

.1UF_0402

12

12

12

12

C611

.1UF_0402

R05
PIR10

B

C705

12

U54

17

RLINEIN

15

LLINEIN

4

HPS

5

MODE

R586

1 2

100K_0402

Q60
2N7002

S

Q70
2N7002

S

G

2

G

2

+5VAMPP

8

GND1 VDD1

1 3

EC_MUTE_L

12

R511

2.2K_0402

D

LINEOUTR

13

EC_MUTE_LINE#

D

LINEOUTL

13

EC_MUTE_LINE#

5

4

3

2

1

HDD/CD-ROM Module

PDD[0..15]19

D D

C C

PIDERST#19

PDDREQ#19
PDIOW#19
PDIOR#19

PDIORDY19

PDDACK#19

IRQ1418,20
PDA119
PDA019

B B

HDDACT_LED#30,32

+5VS

PDCS1#19

1 2

R494 10K_0402

PDD[0..15]

+5VS

12

C689
1000PF_0402

1 2

R386 @10K_0402

PIDERST#
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0

PDDREQ#
PDIOW#
PDIOR#
PDIORDY
PDDACK#
IRQ14
PDA1
PDA0
PDCS1#

12

C702

10UF_16V_1206

Place component's closely IDE CONN.

+5VS

12

C698
1UF_25V_0805

JP21

1 2

12

3 4

34

5 6

56

7 8

78

9 10

910

11 12

11 12

13 14

13 14

15 16

15 16

17 18

17 18

19 20

19 20

21 22

21 22

23 24

23 24

25 26

25 26

27 28

27 28

29 30

29 30

31 32

31 32

33 34

33 34

35 36

35 36

37 38

37 38

39 40

39 40

41 42

41 42

43 44

43 44

HDD CONN

12

C694
.1UF_0402

PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

PCSEL

PDA2
PDCS3#

+5VS

1 2

R480 470_0402

+5VS

12

R460
100K_0402

PDA2 19
PDCS3# 19

+5VCD

+5VCD

CD_DD[0..15]24

R03 PIR16

CD_IDERST#24

CD_DIOW#24

CD_DIORDY24

CD_IRQ1524
CD_DA124
CD_DA024

CD_DCS1#24

CDACT_LED#30,32

R396 10K_0402

L43

1 2

FBM-L11-322513-151

CD_DD[0..15]

C237

12

10UF_16V_1206
R142 10K_0402

12

INT_CD_L

CD_DD7
CD_DD6
CD_DD5
CD_DD4 CD_DD12
CD_DD3
CD_DD2
CD_DD1
CD_DD0

+5VCD_1
+5VCD_1

12

SEC_CSEL

R371
470_0402

+5VCD_1

12

C539
1000PF_0402

12

C557

10UF_16V_1206

Place component's closely IDE CONN.

40 Mil trace

JP23

12
34
56
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50

CD-ROM CONN.

INT_CD_R
CD_DD8

CD_DD9
CD_DD10
CD_DD11

CD_DD13
CD_DD14
CD_DD15

PDIAG#

W=80mils

C533 .1UF_0402

1 2

R358 100K_0402

12

C550
1UF_25V_0805

R404

1 2

12

12

C543
.1UF_0402

CD_AGND 25

INT_CD_R 24INT_CD_L24

CD_DDREQ# 24
CD_DIOR# 24

CD_DACK# 24

100K_0402

CD_DA2 24
CD_DCS3# 24

+5VCD_1
+5VCD_1
+5VCD_1

+5VCD

+5VCD

+3VS

A A

1 2

R478 4.7K_0402

5

PDIORDY

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

4

3

1 2

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-1302

Size Document Number Rev

401216

2

Date: Sheet

28 45Wednesday, May 29, 2002

1

of

1B

A

+3VALW

22UF_10V_1206

ADPREFCLK_PCI_EC

1 1

12

R400

12

C581

@10_0402

@15PF_0402

AVBATT_TEMP
THROTTLE
AVBATT

@2200PF_0402

INT_KBD CONN.

KSI1
KSI6

2 2

KSI4
KSO0
KSI3
KSO1
KSO2
KSO7
KSO6
KSO12
KSO14
KSO10

KSI0
KSI1
KSI2
KSI3

3 3

KSI4
KSI5
KSI6
KSI7

@8P4R_4.7K_0804

4 4

JP18

1
3
5
7

9
11
13
15
17
19
21
23

INT_KB_CONN.

+3VALW

RP134
1 8
2 7
3 6
4 5

@8P4R_4.7K_0804

RP133
1 8
2 7
3 6
4 5

NS
RECOMMEND

GATEA2018

KBRST#18

1
3
5
7
9
11
13
15
17
19
21
23

R426

10K_0402

KSI7

2

2

KSO9

4

4

KSI5

6

6

KSI2

8

8

KSO5

10

10

KSI0

12

12

KSO4

14

14

KSO8

16

16

KSO3

18

18

KSO13

20

20

KSO11

22

22

KSO15

24

24

KSO6
KSO3
KSO12
KSO13

KSO14
KSO11
KSO10
KSO15

+3VS

R412

10K_0402

1 2

1 2

RB751V

2 1

2 1

RB751V

A

C588

12

C485

@2200PF_0402

CP9
1 8
2 7
3 6
4 5

8P4C_100PF

CP10
1 8
2 7
3 6
4 5

8P4C_100PF

VR_ON33,39

D24

D23

12

12

C487

C495

@2200PF_0402

EC_G20

KBRST#_RC

12

C486

.1UF_0402

12

C483

@2200PF_0402

KSI1
KSI7
KSI6
KSO9

KSI4
KSI5
KSO0
KSI2

KSI3
KSO5
KSO1
KSI0

KSO2
KSO4
KSO7
KSO8

10PF_0402

.1UF_0402

12

CP5
1 8
2 7
3 6
4 5

8P4C_100PF

CP6
1 8
2 7
3 6
4 5

8P4C_100PF

CP7
1 8
2 7
3 6
4 5

8P4C_100PF

CP8
1 8
2 7
3 6
4 5

8P4C_100PF

R364 20M

12

C520

32.768KHZ_2MM_10ppm

R339

10K_0402

1 2

12

C480

1000PF_0402

1 2

Y3

12

C545

CLK_PCI_EC12

DJ_ON/OFF#32

12

PM_SLP_S1#12,18

VOL_UP#30,32
VOL_DW#30,32

B

12

C576
.1UF_0402

SERIRQ18,20,21,35,36

LFRAME#18,35,36

LAD018,35,36
LAD118,35,36
LAD218,35,36
LAD318,35,36

EC_RST#32

SCI#18

KBD_CLK34

KBD_DATA34

PS2_CLK34

PS2_DATA34

TP_CLK31

TP_DATA31

LID_SW#32

CRY1
CRY2

12
R370 121K_0402
C528

12PF_0402

LAN_PME#34

G_RST#21

SWI#18

SYSON33,41
SUSP#33,34,37,41,42

RSMRST#18

ENVEE13

ENBKL13

FSEL#30

B

+3VS

12

C575
.1UF_0402

EC_G20
KBRST#_RC

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

LAN_PME#

DOT_EN_R

VOL_UP#
VOL_DW#

FSEL#

D21 RB751V

2 1

D19 RB751V

2 1

C

EC_AVCC

163445

123

136

157

U35

VDD

7

SERIRQ

8

LDRQ

9

LFRAME

15

LAD0

14

LAD1

13

LAD2

10

LAD3

18

LCLK

19

LREST

22

SMI

23

PWUREQ

31

IOPD3/ECSCI

5

GA20/IOPB5

6

KBRST/IOPB6

71

KBSIN0

72

KBSIN1

73

KBSIN2

74

KBSIN3

77

KBSIN4

78

KBSIN5

79

KBSIN6

80

KBSIN7

49

KBSOUT0

50

KBSOUT1

51

KBSOUT2

52

KBSOUT3

53

KBSOUT4

56

KBSOUT5

57

KBSOUT6

58

KBSOUT7

59

KBSOUT8

60

KBSOUT9

61

KBSOUT10

64

KBSOUT11

65

KBSOUT12

66

KBSOUT13

67

KBSOUT14

68

KBSOUT15

105

TINT

106

TCK

107

TDO

108

TDI

109

TMS

110

PSCLK1/IOPF0

111

PSDAT1/IOPF1

114

PSCLK2/IOPF2

115

PSDAT2/IOPF3

116

PSCLK3/IOPF4

117

PSDAT3/IOPF5

118

PSCLK4/IOPF6

119

PSDAT4/IOPF7

158

32KX1/32KCLKOUT

160

32KX2

62

IOPJ2/BST0

63

IOPJ3/BST1

69

IOPJ4/BST2

70

IOPJ5/PFS

75

IOPJ6/PLI

76 143

IOPJ7/BRKL_RSTO

148

IOPM0/D8

149

IOPM1/D9

155

IOPM2/D10

156

IOPM3/D11

3

IOPM4/D12

4

IOPM5/D13

27

IOPM6/D14

28

IOPM7/D15

173

SEL0

174

SEL1

47

CLK

PC87591VPC
False

MINI_PME#

LAN_PME#WAKEUP#

Host interface

Key matrix scan

JTAG debug port

PS2 interface

PORTM

173546

166

VCC5

VCC6

VCC1

VCC2

VCC3

VCC4

AD Input

DA output

PWM
or PORTA

PORTB

PORTC

PORTD-1

PORTE

PORTH

PORTJ-1

PORTD-2

PORTK

PORTL

AGND

GND4

GND5

GND6

GND7

96

159

167

137

1 2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

GND1

PORTJ-2

GND2

GND3

122

FBM-L11-160808-601LMP

C479
.1UF_0402

1 2

95

PORTI

FBM-L11-160808-601LMP

161

AVCC

IOPE7/CLKRUN/EXWINT46

VBAT

IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7

IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7

IOPB0/URXD

IOPB1/UTXD

IOPB2/USCLK

IOPB3/SCL1

IOPB4/SDA1

IOPB7/RING/PFAIL

IOPC1/SCL2
IOPC2/SDA2

IOPC3/TA1

IOPC4/TB1/EXWINT22

IOPC5/TA2

IOPC6/TB2/EXWINT23

IOPC7/CLKOUT

IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21

IOPD2/EXWINT24

IOPE4/SWIN

IOPE5/EXWINT40

IOPE6/LPCPD/EXWIN45

IOPH0/A0/ENV0

IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1

IOPH4/A4/TRIS

IOPH5/A5/SHBM

IOPH6/A6
IOPH7/A7

IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7

IOPJ0/RD

IOPJ1/WR0

IOPK0/A8

IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12

IOPK5/A13/BE0
IOPK6/A14/BE1

IOPK7/A15/CBRD

IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19

IOPL4/WR1

NC2

NC3

NC4

NC5

NC6

NC7

NC1

122021858691929798

11

L40

C

AD0
AD1
AD2
AD3

DP/AD8
DN/AD9

DA0
DA1
DA2
DA3

IOPC0

SELIO
IOPD4

IOPD5
IOPD6
IOPD7

NC8

NC9

KBA[0..18]
ADB[0..7]

KSI[0..7]

R03 PIR 17

12

C481
2200PF_0402

D

KBA[0..18] 30
ADB[0..7] 30

KSI[0..7] 32

BADDR1-0

0 0
0 1
1 0
1 1

Index

2E

(HCFGBAH, HCFGBAL)

R02 R429,433 MOUNTED, R428 NOT

ABATT_TEMP 41

12

C736
1UF_25V_0805

THERMDA_591 4

THERMDC_591 4

DOT_EN_R

DOT_RS_R

12

R389
10K_0402

JP20

1
2
3
4
5
6
7
8
9

10

@96212-1011S

D

(ENV1)
(BADDR0)
(BADDR1)
(SHBM)

12

R418

10K_0402

12

R427

1.5K_0402

+3VALW +3VALW +3VS+3VALW

12

R367
10K_0402

MINI_PME#WAKEUP# LAN_PME# FANSPEED1

1

EC_TINIT#

2

EC_TCK

3

EC_TDO

4

EC_TDI

5

EC_TMS

6
7

VOL_UP#

8

VOL_DW#

9

THRM#

10

Title

Size Document Number Rev

B

401216

Date: Sheet

KBA1
KBA2
KBA3
KBA5

+5VALW+3VALW

12

R451
10K_0402

13

2

Q57

2N7002

+5VALW+3VALW

12

R452
10K_0402

1

Q56

2

3904

3

EC_SMC1
EC_SMD1
EC_SMC2
EC_SMD2

12

R378
10K_0402

MSEN#

+3VALW

Comp a l Electro nics , In c .

SCHEMATIC, M/B LA -1302

L41

12

+3VALW

+RTCVCC

C536

1UF_25V_0805

1 2

AVBATT_TEMP

81

THROTTLE

82

AVBATT

83
84
87
88
89
90
93
94

99
100
101
102

32
33

DOT_RS_R

36
37
38
39
40
43

153
154
162

EC_SMC1

163

EC_SMD1

164

PCIRST#

165
168

169
170

FANSPEED1

171

WAKEUP#

172

THRM#

175

EC_ACT#

176
1

26
29
30

2
44
24
25

KBA0

124

KBA1

125

KBA2

126

KBA3

127

KBA4

128

KBA5

131

KBA6

132

KBA7

133

ADB0

138

ADB1

139

ADB2

140

ADB3

141

ADB4

144

ADB5

145

ADB6

146

ADB7

147

FRD#

150

FWR#

151
152
41

42
54

MINI_PME#

55

KBA8
KBA9

142

KBA10

135

KBA11

134

KBA12

130

KBA13

129

KBA14

121

KBA15

120

KBA16

113

KBA17

112

KBA18

104
103
48

NC10

THROTTLE 38
AVBATT 38

ALI/MH# 38,41
MSEN# 13,17,34

PROCHOT# 4

ADPREF 38
EN_FAN1 3
IREF 38
EN_FAN2 3

INVT_PWM 13
BEEP# 25

ACOFF 38
PM_BATLOW# 18
EC_ON 32
LID_OUT# 18
PCM_SUSP# 21

KSO16 32
KSO17 32
EN_WOL# 23
EC_SMC1 30,41
EC_SMD1 30,41
PCIRST# 4,6,13,18,21,22,23,34,35,36

PWRBTN_OUT# 18
EC_SMC2 4,24,34
EC_SMD2 4,24,34
FANSPEED1 3
WAKEUP# 21,22,23
THRM# 18
EC_ACT# 32

ACIN 19,40
RING# 34
PM_SLP_S3# 18

ON/OFF 32
PM_SLP_S5# 18

CLKRUN# 18,20,21,34,35

FRD# 30
FWR# 30

SELIO# 30
EN_WOLR# 34EXTSMI#18

NUMLED# 32
CAPSLED# 32
MINI_PME# 34

FSTCHG 38

E

I/O Address

+3VALW

Data

(HCFGBAH, HCFGBAL)+1

Reserved

12

R325 10K_0402

12

R324 @10K_0402

12

R323 10K_0402

12

R322 10K_0402

12

C740
@820PF_0402

RP140
1 8
2 7
3 6
4 5

8P4R_4.7K_0804

12

R18
@10K_0402

E

PC87591

2F
4F4E

+3VALW

DOT_EN 32

DOT_RS 32

+5VALW

12

R387
10K_0402

29 45Wednesday, May 29, 2002

1B

of

A

ADB[0..7]29

KBA[0..18]29

+3VALW

12

R439

1 1

EC_MUTE#32

2 2

3 3

4 4

D26 RB751V

21

A

10K_0402

DOT_PRES#32

CONA#34

BT_PRE#31
TP_ON/OFF#31

BT_ON/OFF#27

BT_WAKE_UP31

+3VALW

KBA1

SELIO#29

HDDACT_LED#28,32

CDACT_LED#28,32

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1 FSEL#
KBA0
ADB0
ADB1
ADB2

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
KBA0
ADB0
ADB1
ADB2

SELIO#

U23

9

A18

10

A16

11

A15

12

A12

13

A7

14

A6

15

A5

16

A4

17

A3

18

A2

19

A1

20

A0

21

DQ0

22

DQ1

23

DQ2

24

VSS

39F040_TSOP

U24

1

NC

2

A16

3

A15

4

A12

5

A7

6

A6

7

A5

8

A4

9

A3

10

A2

11

A1

12

A0

13

DQ0

14

DQ1

15

DQ2

16

VSS

@29F040/SST39VF040_PLCC

4
5

D29

1
2

RB717F

VCC
WE*

A17
A14
A13

A11
OE*
A10

CE*
DQ7
DQ6
DQ5
DQ4
DQ3

4.7UF_10V_0805

C443 .1UF_0402

VCC
WE*

A17

A14

A13

A11

OE*

A10

CE*
DQ7
DQ6
DQ5
DQ4
DQ3

A8
A9

A8
A9

147

3

C441

U26B

74LVC32

ADB[0..7]
KBA[0..18]

DOT_PRES#
DRIVER_ACT#
CONA#
BT_PRE#

TP_ON/OFF#
BT_ON/OFF#

6

DRIVER_ACT#

Request by EC 6/20

+3VALW

8

FWE#

7

KBA17

6

KBA14

5

KBA13

4

KBA8

3

KBA9

2

KBA11

1

FRD#

32

KBA10

31
30

ADB7

29

ADB6

28

ADB5

27

ADB4

26

ADB3

25

12

12

32

FWE#

31

KBA17

30

KBA14

29

KBA13

28

KBA8

27

KBA9

26

KBA11

25

FRD#

24

KBA10

23

FSEL#

22

ADB7

21

ADB6

20

ADB5

19

ADB4

18

ADB3

17

B

CC

+3VALW

B

U22
7SH32

4

FRD# 29
FSEL# 29

C

D

Input Port Output Port

+3VALW

20

1A1 1Y1
1A2 1Y2

VCC
1A3 1Y3
1A4 1Y4
2A1 2Y1
2A2 2Y2
2A3 2Y3
2A4 2Y4

1G
2G

10

VOL_UP#29,32

VOL_DW#29,32

+3VALW

+3VALW

5
1

2
3

U44

GND

2 18
4 16
6 14

8 12
11 9
13 7
15 5
17 3

1
19

74LVC244

12

R291
100K_0402

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

CONA#
EE
VOL_UP#
VOL_DW#

AA
CC
BB

TP_ON/OFF#

DOT_PRES#
BT_PRE#
BT_ON/OFF#
DRIVER_ACT#

2

1 3

D

U24AS1

BIOS_PLCC_IC

ADB0

3

ADB1

4 5

ADB2

7 6

3

1UF_25V_0805

8

11

R388

100K_0402

ADB3
ADB4
ADB5
ADB6
ADB7

AA

C676

1 2

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

BB

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

EE

+5VALW

8
7
6
5

12

8 9
13 12
14 15
17 16
18 19

11

1

3

4 5

7 6

8 9
13 12
14 15
17 16
18 19

11

1

3

4 5

7 6

8 9
13 12
14 15
17 16
18 19

11

1

U36

VCC
WC
SCL
SDA

NM24C16

D

+3VALW

147

KBA2
SELIO# LARST#

+5VALW

KBA4

+3VALW

RP147
1 8
2 7
3 6
4 5

8P4R_100K_0804

+3VALW

RP150
1 8
2 7
3 6
4 5

8P4R_100K_0804

RP149
1 8
2 7
3 6
4 5

8P4R_100K_0804

12

R305 100K_0402

G

Q29 2N7002

S

+12VS

FLASH# 19
FWR# 29

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

SELIO# LARST#

KBA6
SELIO# LARST#

U26A

1
2

74LVC32

1 2

R489 20K_0402

+3VALW

147

U26C

9

10

74LVC32

+3VALW

147

U26D

12
13

74LVC32

EC_SMC129,41
EC_SMD129,41

+5VALW

20

D0
D1 Q1

VCC
D2 Q2
D3 Q3
D4 Q4
D5 Q5
D6 Q6
D7 Q7

CLK
CLR

+5VALW

20

D0
D1 Q1

VCC
D2 Q2
D3 Q3
D4 Q4
D5 Q5
D6 Q6
D7 Q7

CLK
CLR

+5VALW

20

D0
D1 Q1

VCC
D2 Q2
D3 Q3
D4 Q4
D5 Q5
D6 Q6
D7 Q7

CLK
CLR

GND

U47

Q0

GND

10

U49

Q0

GND

10

U43

Q0

GND

10

A0
A1
A2

2

74HCT273

2

74HCT273

2

74HCT273

1
2
3
4

E

BIOS & I/O Port

GATE_RST 32
BT_RST# 31
BT_DET 31
BT_ON# 27,31
DOT_R/W# 32
EC_MUTE_L 27
CD_PLAY 25
CD_PLAY_ON# 24

TPAD_LED# 31
BACKLIGHT# 32
DIS_ADJVOL 27
ADJVOL_UP/DW# 27
DOT_DB4 32
DOT_DB5 32
DOT_DB6 32
DOT_DB7 32

PWR1_LED# 32
PWR2_LED# 32
BATT1_LED# 32
BATT2_LED# 32
PLED# 32
MP3_LED# 32
MUTELED 32
CDPLAY_LED# 32

+5VALW

12

R428
100K_0402

12

R420
100K_0402

Comp a l Electro nics , Inc.

Title

SCHEMATIC, M/B LA -1302

Size Document Number Rev

B

401216

Date: Sheet

E

30 45Wednesday, May 29, 2002

1B

of

A

B

C

D

E

Printer Port/USB

Bluetooth Connector

USB_AS

1 1

1 2

FBM-11-451616-800T

150UF_6.3V_D2

USB_A

L11

12

+

C44

12

C46
1000PF_0402

USBP0-

L10

FBM-11-160808-121

1 2
1 2

L28

FBM-11-160808-121

JP5

1
2
3
4

USB CONN.

L9

5
6
7
8

FBM-11-160808-121
1 2
1 2

L27

FBM-11-160808-121

USBP2­USBP2+USBP0+

12

C267
1000PF_0402

USB_B

FBM-11-451616-800T

12

+

C273
150UF_6.3V_D2

USB_BS

L30

12

USBP4+19
USBP4-19

L22 FBM-11-160808-121

1 2

L23 FBM-11-160808-121

1 2

USB BUSB A USB Port

+3VALW

BT_DET30

BT_WAKE_UP30

BT_RST#30

12

C139
.1UF_0402

JP14

12
34
56
78
910

121411
13
15 16
171918

20

AXN420C530P

BT_ON# 27,30
BT_PRE# 30

+5VALW

12

C419
.1UF_0402

USB_AS

+5VALW

U48

1

GND

2 2

4.7UF_10V_0805

C671

12

2
3
4 5

IN
EN1#
EN2# OC2#

TPS2042

OC1#
OUT1
OUT2

USB_BS

8
7
6

Parallel Port

+5V_PRN

+5V_PRN

LPTACK#
LPTBUSY
LPTPE
LPTSLCT

FD7
FD6
FD5
FD4

LPD[0..7]

1 2

R10 33

1 2

R11 33

PIR23

INIT#

SLCTIN#

10
11
12
13
14
15
16

RP3

16P8R_33

89
7
6
5
4
3
2
1

LPD3
LPD2

LPD0
LPD7 FD7
LPD6
LPD5
LPD4

LPD[0..7]34,35

RP2

10P8R_2.7K

RP1

10P8R_2.7K

LPTINIT#34,35

LPTSLCTIN#34,35

10
9
8
7
6

10
9
8
7
6

3 3

FD0

1

FD1

2

FD2

3

FD3

4

+5VS

SLCTIN#
INIT#
LPTERR#
AFD/3M#

+5VS

4 4

5

1
2
3
4
5

LPTSTB#34,35

LPTAFD#34,35
LPTERR#34,35

FD3
FD2
FD1
FD0

FD6
FD5
FD4

12

R485
10K_0402

+3VALW

12

1UF_10V

R486
10K_0402

C664

LPTSTB#

1 2

R9 33

1 2

R14 33

LPTACK#34,35

LPTBUSY34,35

LPTSLCT34,35

12

+5VS

R4 33

LPTPE34,35

12

C665
1UF_10V

2 1

1 2

D4

RB420D

AFD/3M#
FD0
LPTERR#_
FD1
INIT#
FD2
SLCTIN#
FD3

FD4
FD5
FD6
FD7
LPTACK#
LPTBUSY
LPTPE
LPTSLCT

OVCUR#0 19,34

OVCUR#2 19

+5V_PRN

w=10mils

12

R7

2.7K_0402

1

w=10mils

14

2

15

3

16

4

17

5

18

6

19

7

20

8

21

9
22
10
23
11
24
12
25
13

JP2
LPTCN-25

28

29

@10PF_0402

C17

4.7UF_10V_0805

AFD/3M#
LPTERR#
INIT#
SLCTIN#

LPTACK#
LPTBUSY
LPTPE
LPTSLCT

FD0
FD1
FD2LPD1
FD3

FD4
FD5
FD6
FD7

USBP2-

C35
@10PF_0402

USBP2+

C265
@10PF_0402

+5V_PRN

12

CP3
1 8
2 7
3 6
4 5

8P4C_220PF

CP1
1 8
2 7
3 6
4 5

8P4C_220PF

CP4
1 8
2 7
3 6
4 5

8P4C_220PF

CP2
1 8
2 7
3 6
4 5

8P4C_220PF

12

C16
.1UF_0402

USBP0-

C34
@10PF_0402

USBP0+

C263
@10PF_0402

TP_DATA29
TP_CLK29

10K_0402

R141

USBP0+
USBP0­USBP2+
USBP2-

+5VSC9

12

12

R140
10K_0402

TP_ON/OFF#30

TPAD_LED#30

TP_DATA

TP_CLK

12

C236
@22PF_0402

TP_ON/OFF#
TPAD_LED#

12

C235
@22PF_0402

USBP0+ 19,34
USBP0- 19,34
USBP2+ 19,34
USBP2- 19,34

+5VS +5VS

JP19
1
2
3
4
5
6
7
8

1

2

3

4

5

6

7

8

HEADER 8

A1

A1

A2

A2

A3

A3

A4

A4

A5

A5

A6

A6

A7

A7

A8

A8

TP_ON/OFF#
TPAD_LED#

TP_DATA
TP_CLK

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

Title

Size Document Number Rev

B

Date: Sheet

Comp a l Electro nics , In c .

401216

SCHEMATIC, M/B LA -1302

31 45Wednesday, May 29, 2002

E

1B

of

A

LID Switch

SW2

1 1

LID_SW#29

12
34

LID SW

B

12

C564
1000PF_0402

+5VS

12

C553
.01UF_0402

C

+5VALW

12

C563
.01UF_0402

DOT_EN29

MODE
PLAY STOP
FRD

DOT_DB430 DOT_PRES# 30

DJ_ON/OFF#29

MP3_LED#30

PWR1_LED#30

HDDACT_LED#28,30

BATT2_LED#30
IRTXOUT35

IRMODE35

DOT_DB630

Change from +3VS for adding FIR transferring distance to 1m . 90.11.01.

+5VS

+5VALW
+5VS

KSO1729

KSI129
KSI329

KSI529
VOL_DW#29,30
MUTELED30

KSI1
KSI3

CD_PLAYER_50PIN_ACES

JP22

12
34
56
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50

D

+5VS
+5VALW

+5VALW
+5VALW

DOT_R/W# 30

KSI0
KSI2
KSI4

51ON#

DOT_RS 29
KSI0 29

KSI2 29
KSI4 29
VOL_UP# 29,30
EC_MUTE# 30
EC_ACT# 29

CDPLAY_LED# 30
PWR2_LED# 30
BATT1_LED# 30
BACKLIGHT# 30
IRRX 35

DOT_DB5 30
DOT_DB7 30

E

Dot Matrix LCD/FIR

12

C562
1000PF_0402

MP3
REV

12

C567
1000PF_0402

+5VALW

+3VS

12

12

C556
.01UF_0402

C568
.01UF_0402

PIR11

D25

DAN202U

22K

2

Q54

DTC124EK

B

22K

+3VALW

1
2

C

+5VS

KSI1
KSI3

12

R432
100K_0402

ON/OFF
51ON#

13

E

JP6

12
34
56
78
910
11 12
13 14
15 16

F_BTN_16PIN

12

C607
1000PF_0402

ON/OFF 29
51ON# 40

12

2 1

D

ON/OFFBTN#

KSI0
KSI2
KSI4

D27
RLZ20A

+5VALW

PLED# 30

BTN1
BTN3
BTN5

12

C31
1000PF_0402

M/E OFF Button

R2

GATE_RST30

SW1

RESET BTN

for ESD 9/14

ME_OFF#34

Title

Size Document Number Rev

B

Date: Sheet

10K_0402

1 2

12
34

1 2

Comp a l Electro nics , In c .

SCHEMATIC, M/B LA -1302

401216

R1
10K_0402

+5VS

CAPSLED#29

12

2 2

+3VS

PWR: +3VALW

12

R315
10K_0402

10

R306

1 2

A

9 8

5 6

100K_0402

U28C
74LVC125

4

U28B
74LVC125

C476
100PF_0402

1 2

VGATE39

3 3

4 4

Q32

2

3904

R278

1 2

+3VS

R318

10K_0402

1 2

1
3

20K_0402

C433
1UF_25V_0805

1 2

+3VALW

U21F

14

74LVC14

13 12

+3V

12

R321
10K_0402

B

PWR ON CKT

+3VALW

14
11 10

ICH_VGATE 18

CK408_PWRGD# 12

U21E
74LVC14

12

R252
10K_0402

PM_PWROK 18

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C32
.01UF_0402

EC_ON29

C

CDACT_LED#28,30

ON/OFFBTN#

+3VALW

12

R446
@4.7K_0402

1 2

0_0402

13

D

S

NUMLED#29

BTN2
BTN4

R442

Q51

2

G

@2N7002

KSO1629

3

12

+3VALW+3VALW

2
1

C30
.01UF_0402

1 2

C2 .1UF_0402
U1

5

7SH32

E

+5VALW

12

4

C33

4.7UF_25V_1206

32 45Wednesday, May 29, 2002

of

EC_RST# 29

1B

A

2

G

+5VALW

12

13

D

S

R532
100K_0402

SYSON#

Q75
2N7002

VR_ON29,39

R02
PIR12

SYSON29,41

1 1

B

+5VALW

U29A

147

74HCT14

1 2

VR_ON#

C

SUSP# SUSP

+5VALW

U29B
74HCT14

3 4

7 14

D

E

DC/DC Interface & RTC

+2.5V tolerence +- 200 mV

+2.5VALW

U33

8

S

D

7

S

D

6

S

D

5

G

D

12

SI4800

C572

4.7UF_10V_0805

2 2

SYSON#

R379

100K_0402

Q46

2N7002

2

G

+12VALW

12

13

D

S

+2.5V +1.8VS

1
2
3
4

12

C542

4.7UF_10V_0805

12

C683

.01UF_50V_0805

C544

4.7UF_10V_0805

12

ON_GATE

12

C537

1UF_10V

U51

8

D

7

D

6

D

5

D

SI4800

12

C710

4.7UF_10V_0805

S
S
S

G

1
2
3
4

+3V+3VALW

12

C686

4.7UF_10V_0805

C685

4.7UF_10V_0805

12

ON_GATE

12

C699
1UF_10V

3VS and 5VS are seperated control to achieve maximum power sequence flexibility

+3VALW +3VS+5VALW +5VS

C518

12

R570

0_0402

SUSPSUSP SUSP

SUSP SUSP

U52

8

D

7

D

6

D

5

D

SI4800

12

C704

4.7UF_10V_0805

12

@1UF_50V_0805

12

R447
100_0402

13

D

Q53

2

2N7002

G

S

+1.8VS +1.5VS

12

R317
100_0402

1

Q39

2

2N7002

3

C681

1UF_10V

1

S

2

S

3

S

4

G

+3VS_GATE+5VS_GATE

12

C739

B

C703

1
2
3
4

12

13

D

S

13

D

S

R307
100_0402

Q36
2N7002

R316
100_0402

Q35
2N7002

C503

1UF_10V

12

A

U31

8

S

D

7

S

D

6

S

D

5

G

D

SI4800

12

C534

4.7UF_10V_0805

3 3

.01UF_50V_0805

SUSP VR_ON#SUSP

2

G

+3V

4 4

SYSON#

2

G

C502

4.7UF_10V_0805

12

+12VALW +12VALW

R506
100K_0402

1 2
13

D

Q72

2N7002

S

2

G

SYSON#

2

4.7UF_10V_0805

12

SUSP SUSP

2

G

+5VS+12VS +2.5VS+3VS

12

R399
100_0402

13

D

Q48
2N7002

S

+2.5V

12

R376
100_0402

1

Q44
2N7002

3

12

@2N7002

2

G

2

4.7UF_10V_0805

Q77

12

R382
100_0402

13

D

Q45
2N7002

S

12

R332

100_0402

1

Q40
2N7002

3

C691

12

R569
@100K_0402

1 2
13

D

S

2

G

C693

4.7UF_10V_0805
12

+1.25VS +CPU_CORE

12

R294
100_0402

1

Q27

2

2N7002

3

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

+2.5VALW

12

U34

8

D

7

D

6

D

5

D

SI4800

C555

4.7UF_10V_0805

S
S
S
G

1
2
3
4

+2.5VS

12

C560

4.7UF_10V_0805

C569

4.7UF_10V_0805

12

12

C573
1UF_10V

+5VS_GATE +5VS_GATE

+1.8VALW

12

U27

8

D

7

D

6

D

5

D

SI4800

C477

4.7UF_10V_0805

C475

12

C474

4.7UF_10V_0805

4.7UF_10V_0805

12

12

C478
1UF_10V

1

S

2

S

3

S

4

G

+12VALW To +12VS Transfer

12

R298
100K_0402

12

R299
51K

13

D

S

Q33
2N7002

+12VALW

G

2

S

D

1 3

12

C471

4.7UF_25V_1206

Q34
NDS352P

P CHANNEL MOSFET

+12VS

+12VALW

12
C455

.1UF_0402

SUSP#

SUSP#29,34,37,41,42

2

G

R299 can be eliminated ?

12

R247
@100_0402

3MM

Q24

1

2

C

3

@2N7002

120mil

120mil

40mil

120mil

+3VALWP

+2.5VALWP

+12VALWP

+5VALWP +5VALW

JOPEN5

2 1

3MM

JOPEN6

2 1

2MM

JOPEN4

2 1

3MM

JOPEN8

2 1

+3VALW

+2.5VALW

+12VALW

D

(5A)

(3A)

(50MA)

(5A)

120mil

120mil

120mil

+1.8VALWP

+1.5VP

+1.25VP

+1.2VP

Title

Size Document Number Rev

B

401216

Date: Sheet

3MM

JOPEN2

2 1

JOPEN3

2 1

JOPEN7

2 1

2MM

JOPEN1

2 1

+1.8VALW

+1.5VS

+1.25VS

+1.2VS

Comp a l Electro nics , In c .

SCHEMATIC, M/B LA -1302

E

33 45Wednesday, May 29, 2002

(2A)

(2A)

(3A)

(300MA)

1B

of

A

B

C

D

E

Mini-PCI Slot

+5VS_MINIPCI

+5VS_MINIPCI

B

12

C442
.1UF_0402

AD[0..31] 18,21,22,23

R297 @0_0402
R296 0_0402

W=40mils

AD30
AD28

AD26
AD24
MINI_IDSEL

AD22
AD20

AD18
AD16

AD15
AD13
AD11

AD9

AD6
AD4
AD2
AD0

MOD_AUDIO_MON

EN_WOLR# 29

12

CLK_PCI_MINI

12

R287
10_0402

12

C444
15PF_0402

AC_SYNC18,25
SDATA_IN118
AC_BITCLK18,25

C445
1000PF_0402

+3VS_MINIPCI

C450

15PF_0402

1 1

2 2

3 3

4 4

12

C451
.1UF_0402

PIRQD#18,20

REQ#118,20

12

A

12

C447
.1UF_0402

PIRQC#
PIRQD#

W=40mils

CLK_PCI_MINI12

REQ#418,20

R288

100_0402

1 2

CBE#318,21,22,23

CBE#218,21,22,23

IRDY#18,20,21,22,23

CLKRUN#18,20,21,29,35

SERR#18,20,21,23

PERR#18,20,21,22,23
CBE#118,21,22,23

+5VS_MINIPCI

R289 22_0402

+3.3VAUX

MOD_AUDIO_MON25

MD_MIC25

+5VS

+5VS_MINIPCI

C449
10UF_16V_1206

TIP RING

R292 @0_0402
R293 0_0402

1 2

FBM-11-160808-121

12
12

CLK_PCI_MINI

REQ#4
AD31

AD29
AD27

AD25
LAN_IDSELAD22

AD23
AD21

AD19
AD17

CLKRUN#

AD14
AD12

AD10
AD8

AD7
AD5
AD3

W=30mils

AD1

12

MODEM_RI#

W=30mils W=40mils

L24

12

101 102
103 104
105 106
107 108
109 110
111 112
113 114
115 116
117 118
119 120
121 122
123 124

127 129

1 3

12

C174
1000PF_0402

AD[0..31]

JP27

1 2

12

KEY KEY

3 4

34

5 6

56

7 8

78

9 10

910

11 12

11 12

13 14

13 14

15 16

15 16

17 18

17 18

19 20

19 20

21 22

21 22

23 24

23 24

25 26

25 26

27 28

27 28

29 30

29 30

31 32

31 32

33 34

33 34

35 36

35 36

37 38

37 38

39 40

39 40

41 42

41 42

43 44

43 44

45 46

45 46

47 48

47 48

49 50

49 50

51 52

51 52

53 54

53 54

55 56

55 56

57 58

57 58

59 60

59 60

61 62

61 62

63 64

63 64

65 66

65 66

67 68

67 68

69 70

69 70

71 72

71 72

73 74

73 74

75 76

75 76

77 78

77 78

79 80

79 80

81 82

81 82

83 84

83 84

85 86

85 86

87 88

87 88

89 90

89 90

91 92

91 92

93 94

93 94

95 96

95 96

97 98

97 98

99 100

99 100
101 102
103 104
105 106
107 108
109 110
111 112
113 114
115 116
117 118
119 120
121 122
123 124

127 129

Mini-PCI SLOT

+3VALW+3.3VAUX

Q26
SI2301DS

S

D

G

2

C448
10UF_10V_0805

12

+3VS_MINIPCI

12

C176
.1UF_0402

12
12

PCIRST# 4,6,13,18,21,22,23,29,35,36

GNT#4

R02 R255 MOUNTED

1 2

R128 100_0402

PAR 18,21,22,23

FRAME# 18,20,21,22,23
TRDY# 18,20,21,22,23
STOP# 18,20,21,22,23

DEVSEL# 18,20,21,22,23

CBE#0 18,21,22,23

AC_SDATAO 18,25
AC97_RST# 18,25

+3.3VAUX

12

C178
10UF_10V_0805

PIRQD#

PIRQC#

GNT#1 18,20

+3.3VAUX

AD18

+3.3VAUX

12

PIRQC# 18,20

+3VS_MINIPCI

GNT#4 18,20
MINI_PME# 29

LAN_PME# 29

W=40mils

PCM_RI#21

MODEM_RI#

RING#29

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C168
1000PF_0402

1 2

FBM-11-160808-121

+3.3VAUX

C

12

L25

2N7002

S

C175
.1UF_0402

Q37

G

S

G

2

13

D

Q31 2N7002

2N7002

2

Q38

12

C446
.1UF_0402

+3VS

+3VALW+3V

13

D

12

13

D

S

12

R328
100K_0402

2

G

C453
10UF_10V_0805

12

DOCK_HP_OUT_PLUG27

RIA0

12

R327

100K_0402

C28
1000PF_0402

LPTSLCTIN#31,35

DOCK_BLUE17

DOCK_GREEN17

DOCK_RED17

INTMICOFF#27

LINEOUTR27

LINEOUTL27
DOCK_MIC27
SPDIFO25

RJ45_RXX+23

OVCUR#019,31

CONA#30

12

C287
1000PF_0402

LPD[0..7]31,35

VIN

12

C29
100PF_0402

LPD4
LPD3

CONA#

LPD2

LPD0

PS2_CLK
PS2_DATA
KBD_DATA
KBD_CLK

D

LPTINIT#31,35
LPTERR#31,35

LPTAFD#31,35

LPTSTB#31,35

CRMA13,17
LUMA13,17

COMPS13,17

RJ45_TXX+23
RJ45_TXX-23

RJ45_RXX-23

USBP2-19,31

USBP2+19,31

12

1
3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99

+5VS +5VALW

12

C289
.01UF_0402

JP25

C291
22UF_10V_1206

LPD[0..7]

2

2

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

54

56

56

58

58

60

60

62

62

64

64

66

66

68

68

70

70

72

72

74

74

76

76

78

78

80

80

82

82

84

84

86

86

88

88

90

90

92

92

94

94

96

96

98

98

100

100

101

102

103

104

101

102

103

104

DOCKING 100

RP108

4 5
3 6
2 7
1 8

8P4R_10K_0804

Title

Size Document Number Rev

B

Date: Sheet

+5VS

401216

12

C288
.01UF_0402

LPTSLCT 31,35
LPTPE 31,35
LPTBUSY 31,35
LPTACK# 31,35

LPD7
LPD6
LPD5LPD1

EC_SMD2 4,24,29
EC_SMC2 4,24,29
SUSP# 29,33,37,41,42

ME_OFF# 32
DOCK_DDCC 17

DOCK_VSYNC 17
DOCK_HSYNC 17
DOCK_DDCD 17
MSEN# 13,17,29

DCD1# 35
DSR1# 35
TXD1 35
RXD1 35
DTR1# 35
CTS1# 35
RTS1# 35
RI1# 35

RIA0

+5VS

+5VALW

PS2_CLK
PS2_DATA
KBD_CLK
KBD_DATA

USBP0- 19,31
USBP0+ 19,31

Comp a l Electro nics , In c .

SCHEMATIC, M/B LA -1302

E

PS2_CLK 29
PS2_DATA 29
KBD_CLK 29
KBD_DATA 29

34 45Wednesday, May 29, 2002

1B

of

A

B

C

D

E

SUPER I/O SMC FDC47N227

1 1

LDRQ#18

2 2

CLK_PCI_SIOCLK_SIO14

R391

3 3

10_0402

1 2

C559
15PF_0402

1 2

R375
@33_0402

1 2

1 2

C546
@22PF_0402

+3VS

12

R392

4.7K_0402

+3VS

CLKRUN#18,20,21,29,34

+3VS

1 2

R335 10K_0402

1 2

R333 10K_0402

+3VS

C488

4.7UF_10V_0805

LFRAME#18,29,36

PCIRST#4,6,13,18,21,22,23,29,34,36

SUS_STAT#13,18

SERIRQ18,20,21,29,36

CLK_PCI_SIO12

CLK_SIO1412

.1UF_0402

LAD018,29,36
LAD118,29,36
LAD218,29,36
LAD318,29,36

1 2

R349

1 2

R334 10K_0402

PID013
PID113
PID213
PID313
PID413

12

C535

C561

.1UF_0402

LAD0
LAD1
LAD2
LAD3

LFRAME#

10K_0402

1 2

SERIRQ

CLK_PCI_SIO
CLK_SIO14

12

.1UF_0402

R394 10K_0402

12

C489

U32

20

LAD0

21

LAD1

22

LAD2

23

LAD3

24

LFRAME#

25

LDRQ#

26

PCIRST#

27

LPCPD#

50

GPIO12/IO_SMI#

17

IO_PME#

30

SIRQ

28

CLKRUN#

29

PCICLK

19

CLK14

48

GPIO10

54

GPIO15

55

GPIO16

56

GPIO17

57

GPIO20

58

GPIO21

59

GPIO22

6

GPIO24

32

GPIO30

33

GPIO31

34

GPIO32

35

GPIO33

36

GPIO34

37

GPIO35

38

GPIO36

39

GPIO37

40

GPIO40

41

GPIO41

42

GPIO42

43

GPIO43

44

GPIO44

45

GPIO45

46

GPIO46

47

GPIO47

51

GPIO13/IRQIN1

52

GPIO14/IRQIN2

64

GPIO23/FDC_PP

18

VTR

53

VCC

65

VCC

93

VCC

7

VSS

31

VSS

60

VSS

76

VSS

SMsC LPC47N227

PD0/INDEX#

PD1/TRK0

PD2/WRTPRT#

PD3/RDATA#

PD4/DSKCHG#

PD6/MTR0#

BUSY/MTR1#

PE/WDATA#

SLCT/WGATE#

ERROR#/HDSEL#

ACK#/DS1#

INIT#/DIR#

AUTOFD#/DRVDEN0#

STROBE#/DS0#
SLCTIN#/STEP#

DTR2#
CTS2#
RTS2#
DSR2#

TXD2
RXD2

DCD2#

DTR1#
CTS1#
RTS1#
DSR1#

TXD1
RXD1

DCD1#

IRMODE/IRRX3

IRRX2

IRTX2

RDATA#
WDATA#
WGATE#

HDSEL#

STEP#

DS0#

INDEX#
DSKCHG#
WRTPRT#

TRK0#
MTR0#

DRVDEN0
DRVDEN1

GPIO11/SYSOPT

PD5
PD7

RI2#

RI1#

DIR#

LPD0

68

LPD1

69

LPD2

70

LPD3

71

LPD4

72

LPD5

73

LPD6

74

LPD7

75

LPTBUSY

79

LPTPE

78

LPTSLCT

77

LPTERR#

81

LPTACK#

80

LPTINIT#

66

LPTAFD#

82

LPTSTB#

83

LPTSLCTIN#

67
100

CTS2#

99
98

DSR2#

97
96

RXD2

95

DCD2#

94

RI2#

92

DTR1#

89

CTS1#

88

RTS1#

87

DSR1#

86

TXD1

85

RXD1

84
91

RI1#

90
63

61
62

RDATA#

16
10
11
12
8
9
5

INDEX#

13

DSKCHG#

4

WP#

15

TRACK0#

14
3
1

2
49

Base I/O Address

0 = 02Eh

*

1 = 04Eh

LPD0 31,34
LPD1 31,34
LPD2 31,34
LPD3 31,34
LPD4 31,34
LPD5 31,34
LPD6 31,34
LPD7 31,34

LPTBUSY 31,34
LPTPE 31,34
LPTSLCT 31,34
LPTERR# 31,34
LPTACK# 31,34
LPTINIT# 31,34
LPTAFD# 31,34
LPTSTB# 31,34
LPTSLCTIN# 31,34

DTR1# 34
CTS1# 34
RTS1# 34
DSR1# 34
TXD1 34
RXD1 34
DCD1# 34
RI1# 34

IRMODE 32
IRRX 32
IRTXOUT 32

+3VS

R354
@1K_0402

1 2

12

R352
1K_0402

INDEX#
RDATA#
DSKCHG#
WP#

CTS2#
DSR2#
DCD2#
RI2#

DCD1#
DSR1#
CTS1#
RI1#

RXD1

R359

RXD2

R381 1K_0402

TRACK0#

RP141

1 8
2 7
3 6
4 5

8P4R_4.7K_0804

RP137

1 8
2 7
3 6
4 5

8P4R_4.7K_0804

RP135

4 5
3 6
2 7
1 8

8P4R_4.7K_0804

12

1K_0402

1 2

R393 1K_0402

12

+3VS

+3VS

+5VS

+3VS

4 4

Compal Electronics, Inc.

Title

PROPRIETARY NOTE

A

B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

SCHEMATIC, M/B LA-1302

Size Document Number Rev

B

Date: Sheet

401216

35 45Wednesday, May 29, 2002

E

of

1B

5

+3VS

12

12

C164

.1UF_0402

D D

C C

CLK_PCI_SD

C163
10UF_10V_0805

SD_CLK

CLK_SD48

R243
@33_0402

1 2

C427
@10PF_0402

+3VS

SD_CLK

R122

1 2

10_0402

LAD318,29,35
LAD218,29,35
LAD118,29,35
LAD018,29,35

SERIRQ18,20,21,29,35

SD1 CLK_SD48
SD2

SD3
SD4
SD5
LAD3
LAD2
LAD1
LAD0

4

37
38
39
40
41
42
43
44

46
47
48

SDLED
SDPWCTL#

SDCLK
SD1
SD2
VDD3V
SD3
SD4
SD5
LAD3
LAD2
LAD1
LAD0
SERIRQ

R124

1M_0402

3436313233

35

SCC4

SCC8

SDLED

MSLED

SDPWCTL#

W83L518D (LPC)

3

+3VS

12

R123
1M_0402

1 2

2530262728

29

VSS

MSPWCTL#

MS4

MS3

MS2

MS1

MSCLK

U15

MS5

XIN

XOUT

SCRST#

SCIO

SCCLK

SCPSNT

SCPWCTL#

SCLED

VDD

SCBLED

SCBPWCTL#

24
23
22
21
20
19
18
17
16
15
14

MMC_DET#

13

CLK_SD48 12

R514

@10K_0402

1 2

SCBLED PIN HIGH FOR 2E

+5VS

2

+3VALW

U21D
74LVC14

14

9 8

+3VALW POWER

+3VS

R513
10K_0402

1 2

1

+5VALW

U29E
74HCT14

11 10

7 14

+5VALW

U29F
74HCT14

13 12

7 14

R132
@33_0402

1 2

C177
@10PF_0402

B B

A A

R126
@33_0402

1 2

C166
@10PF_0402

5

SDPWCTL#

R250

10K_0402

2

G

RESERVED

PCICLK

7

5

4453

2

1

4

VOUT
VOUT

CLK_PCI_SD

SD_3VCC

1
5

C425

4.7UF_10V_0805

12

RP17

8P4R_4.7K_0804

SDLED SD_WRPT
SD4

SD3

SD_CLK
SD2
SD1
SD5

CLK_PCI_SD12

LFRAME#18,29,35

PCIRST#4,6,13,18,21,22,23,29,34,35

+3VS+3VS

12

U20

3

VIN

4

VIN/CE

2

13

D

Q20
2N7002

S

GND

RT9701-CB

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

R127
470K

+3VS

1 8

SCBPSNT

1110968

12

2 7

3 6

4 5

12

R121
33K_5%_0402

R03 PIR20

R568

3.3K_5%_0402

1 2

3

JP16

10 11

Wr_Pt Wr_Pt_Vss

8

SD4

7

SD3

6

Vss2

5

SDCLK

4

Vdd

3

Vss1

2

SD2

1

SD1

9

SD5

SD_SOCKET

VSS

MMC_DET#

FOXCONN SD SOCKET

2

10

9 8

U57C
74AHC125

13

12 11

U57D
74AHC125

12

13

C741

@1UF_10V_0805

Title

Compal Electronics, Inc.

13

12 11

U28D
74LVC125

SCHEMATIC, M/B LA-1302

Size Document Number Rev

Custom

401216

Date: Sheet

36 45Wednesday, May 29, 2002

1

of

1B

SCBCLK

SCBIO

SCBRST#

VSS

SCBC8

SCBC4

PME#

lESET#

LFRAME#

A

B

C

D

E

5V/3V/12V

PU1

7

PC20

GND

25

TRIP1

PR2
15K_1%

REF

8

MAINP

B1+

24

STBY2

STBY1

10

9611

0.85VREF
PC23

MAINP

PC9

0.1UF_0805_25V

VCC

PGOD

SCP

SCP

10P

PC18

0.01UF

PC32

.047U_16V

PQ7
TP0610T

PC8

0.1UF_0805_25V

23

TRIP2

OUTGND2

FB2

SOFT2

14

131215

SCP

LH2

OUT2_U

OUT2_D

INV2

PR15

12.1K_1%

1 3

LL2

PR11
330

PC27
2200PF

PR25

330

B1+

PC1

@4.7UF_1210_25V

PC3
2200PF

PC2

12

+3VALWP

PD4
EP10QY03

2 1

16

17

18

19

20

PR1

15K_1%

PR13
220

PR5 0

PR7 0

+3VALWP

PC14

0.1UF_0805_25V

3VDH

3VDL

PC17

@1000PF

PR9

35.7K_1%

PC22
4700P

RLZ4.3B

PR16
@100K

PZD2

5

D

5

D

21

PC155

4SP560M

876

DDD

PQ3
SI4800

SSG

S

134

2

3VSW

876

DDD

SSG

S

134

2

PQ4
SI4810

+3VALWP

+

@150UF_D_6.3V_TPB

4.7UF_1210_25V

PL2

SLF12565_10UH

PC29

@47UF_D_6.3V_SP

+

+

PC28

+3.3V:Ipeak=9.22A~12.13A

VIN

PC35

0.1UF_0805_25V

2

PR21
10K

D

VL

Title

Size Document Number Rev

B

Date: Sheet

Comp a l Electro nics , In c .

SCHEMATIC, M/B LA -1302

401216

E

37 45Wednesday, May 29, 2002

1B

of

+5VALWP

PC12

876

DDD

SSG

S

134

2

876

DDD

SSG

S

134

2

21

B1+

5

5

D

PQ2
SI4800

0.1UF_0805_25V

D

PC21
3300P

PZD1
RLZ6.2C

PC13

5VDH

5VDL

PC16
@1000PF

VL

PR4 0

PR6 0

PR8

57.6K_1%

PR12
430

PR17
100K

VL

PC4

PR3

SNB1

CST12057T_10UH

PD3

EP10QY03

@0.1UF_0805_25V

14

32

PT1

+5VALWP

2 1

150UF_D_6.3V_TPB

B+

1 1

2 2

+12VALWP

PC30

4.7UF_1206_16V

1 2

PL1

HI1812V101R-00 8A/100 Ohms

SNB2

3

Vin

1

Vout

GND

2

470PF_0805_100V

2.2UF_1206_25V

PU2
XC6202-SOT-89

PC10

1 2

PD2
EC11FS2

PC15

+5VALWP

22_1206

4.7UF_1210_25V

PC5

4.7UF_1210_25V

5VSW

@47UF_D_6.3V_SP

+

PC24

PC6

PC25

PQ1
SI4810

+

+5V : 6.81A ~ 9.03A

13

100K

SUSP#29,33,34,41,42

3 3

CPU thermal protection at 89 degree C (1.301K Ohms)
Recovery at 44 degree C (5.084K Ohms)

VL

PC34

10K_1%_0603_SL210021F20 FCE

PR24

19.1K_1%

0.1UF_16V

PC37

0.22UF_0805_16V

12

PR27

100K_1%

3
2

100K_1%

PR28

VL

PR22

47K_1%

84

+

1

-

PU3A
LM393M

VL

PQ8
2N7002

PR23

47K_1%

13

D

S

2

G

MAINP

PQ9
2N7002

B

MAINP

RTCVREF

13

D

S

PR26

100K

2

G

VL

PR20
2K_1%

4 4

PC36
1000PF

PH1

A

2

PACIN38,40

MAINP 4,40

PR144
47K

100K

+5VP

PQ5

DTC115EUA

PACIN

2

G

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

DAP202U

PD1

PC11

4.7UF_1206_16V

30

LH1

29

OUT1_U

28

LL1

27

OUT1_D

26

OUTGND1

PC26
2200PF

PR14

11.5K_1%

PC31 0.01UF

B+_READY40

13

D

PQ6
2N7002

S

2.2UF_0805_16V

2

3

1

22

VREF5

INV1

FB1

SOFT1

123

PR10
330

C

SKIP/PWM #

4

PC33

0.01UF

PC19
47P

PC7

0.1UF_0805_25V

21

REG5V_IN

TPS5120

CT

5V_STBY

5

0.1UF_16V

0.85VREF

12

A

P2

PQ10

PD5

PR37
47K

ACON

FDS4435

8
7

5

1
2
36

4

12

PR31
200K

12

PR35
150K

13

D

2

G

S

VIN

PACIN37,40

ACON40

PR30
10K

ACOFF#

12

1SS355

1 2

1 2

1 1

2 2

PZD8
RLZ24B

1 2

PQ11

FDS4435

1
2
3 6

4

ADPREF29

PQ15
2N7002

3.33V

IREF29

8
7

5

THROTTLE29

PR143

86.6K_1%

1 2

100K_1%

PR39

PR45

1 2

1M_1%

IREF=1.201*Icharge
IREF=0~3.3V
Set charge current 2.74A for LI-ION
(3960mAH*0.7C=2.77A)

+3VALWP

12

3 3

AVBATT29

PR56
0

PC59

10UF_1206_6.3V

PD7

@RB751V

12

12

PR148

2.2K

1

LM358
PU9A

VL

84

3

+

2

-

LI-4S:0.1381*BATT+ = AVBATT

4 4

LI-3S:0.1794*BATT+ = AVBATT

12

B

75W * 10% = 67.5W = 19V * 3.55A
Air : 50W/19V*0.025*20=1.3V <--- THROTTLE

12

PR38

@28K_0.5%

PC47

0.1UF_16V

12

PR48

499K_1%

12

12

12

12

+3VALWP

PD29
@RB751V

BATT+

PR52

324K_0.5%

PR55

300K_0.5%

PR58

100K_0.5%

PR59

36.5K_1%

PQ18
2N7002

PR142
0

1 2

0.1UF_16V

12

12

PR42
@24.9K_1%

12

PC44

D

S

P3

12

12

PC54

0.01uF

13

2

G

12

PR36
10K

1 2

PC45
4700P

1 2

PC48
2200PF

PC57

0.01UF

PR29

0.025_2512_1%

12

1 2

PR40

4.7K

1 2

PR46
10K

12

12

PR41
1K

PQ16
2N7002

12

B+

10

11

12

PC58

0.1UF_16V

1

2

3

4

5

6

7

8

9

12

+

S

PU4
MB3887

PC154
100UF_EC_25V

-INC2

OUTC2

+INE2

-INE2

FB2

VREF

FB1

-INE1

+INE1

OUTC1

OUTD

-INC1

D

13

G

2

13

100K

100K

C

1 2

PL3

HI1812V101R-00 8A/100 Ohms

24

+INC2

23

GND

CHG_CS

22

CS

21

VCC(o)

20

OUT

VH

VCC

RT

-INE3

FB3

CTL

+INC1

19

18

17

16

15

14

13

PQ17
DTC115EUA

2

PR57
100K

PC46

0.1UF_16V

1 2

1 2

1 2

PR50
147K_0.1%

PR53
316K_0.1%

12

PR43
68K

PR47
330K

1 2

PC55
56PF

12

12

12

PR33
0

PC42

2200PF

1 2

1 2

PC49

0.1UF_0805_25V

1 2

1 2

PC51
1500P

VL

LI-3S/LI-4S(NI)#

4.7UF_1210_25V

12

PC135

4.7UF_1210_25V

PC43

0.1UF_0805_25V

PC38

12

ACON 40

ACON

LI-3S/LI-4S# 29,41

ALI/MH# 29,41

PC39

4.7UF_1210_25V

12

@0.1UF_0805_25V

PR51
316K_0.1%

1 2

PC56
22PF

12

PC40

D

+INC1

12

578

36

1

241

PC41
2200PF

2

CHG_CS

PQ46
2N7002

B++

1 2

PQ13
FDS4435

SLF12565_22UH

3

ACOFF#

LXCHRG

PL4

PD6

EA60QC04

13

D

S

PQ47

DTC115EUA

PQ12

FDS4435
1
2
3 6

PR44

0.02_2512_1%

12

1 2

VL

12

2

G

13

8
7

5

4

PR32

47K

1 2

PR34

0

1 2
13

100K

2

100K

PQ14
DTC115EUA

Charge voltage :
(4.25V/Cell)

LI-4S:17.43V
LI-3S:13.22V

PR159
100K

100K

2

100K

VIN

ACOFF 29

PC50

68UF_EC_25V

12

+

E

Charger

PC53

4.7UF_1210_25V

12

PC52

4.7UF_1210_25V

FSTCHG 29

VMB

12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

B

C

D

Title

Size Document Number Rev

B

Date: Sheet

Comp a l Electro nics , In c .

SCHEMATIC, M/B LA -1302

401216

E

38 45Wednesday, May 29, 2002

1B

of

A

B

C

D

E

F

G

H

PM_GMUXSEL 18

+3VALWP

1 1

PM_STPCPU#

2 2

+3VALWP

VGATE 32

3 3

PR72
@10K

PR60
30K

100K

2

PQ23

DTC115EUA

+1.2VP

12

PM_DPRSLPVR18

1 2

13

100K

PC73

4.7UF_1210_25V

VR_ON29,33

13

2

PQ20
2N7002

+

VID4,3,2,1,0 :

1.30V: 0 1 0 0 1

1.25V: 0 1 0 1 0

1.20V: 0 1 0 1 1

GMUXSEL CPUSTP# VCORE
PM
PM D-S
BM
BM D-S
Deeper

4 4

A1 CPU Silicon set DSoff =1.2V
PR83=13.3K,PR84=39.2K

A2 CPU Silicon set DSoff =1.0V
PR83=21.5K,PR84=30.9K

For A1,A2 CPU Silicon stepping
PQ19 is nopop, PR61=0, PR62=13K and PR65 is nopop
For B0 CPU Silicon stepping
PQ19 is pop, PR61=9.31K,PR62=12.7K and PR65=30.1K

11
1

00
X

A

0
10

0

PQ19

2

2N7002

13

12

PR61

9.31K_1%

30.1K_1%

2SB1132

CPU_VID44
CPU_VID34

CPU_VID24
CPU_VID14
CPU_VID04

PR65

PQ27

SOT-89

1

PR62

12.7K_1%

1 2

12

4.7UF_0805_10V

32

12

DPRSLPVR VCORE'

0
0
0
0
1

<-------Must fine-tune

B

PC68

PC71

4.7UF_0805_10V

+2.5VALWP

PC74

10UF_1206_6.3V

PR76 0
PR77 0
PR78 0
PR79 0
PR80 0
PR81 0
PR82 0

PR84

30.9K_1%

12
12
12
12
12
12
12
12

PR83 21.5K_1%

Offset

1.30V 0%

4.62%

1.20V 2.0%

4.62%

1.0V

PC85

0.01U

0%

PU5 SC1474

38

V5_1

20

V5_2

36

PGND1

22

PGND2

7

OSB

4

VIDFB

5

VIDB

10

VID4

11

VID3

12

VID2

13

VID1

14

VID0

35

EN

6

DPRSL

8

HYS

9

VDPR

1.30V

1.239V

1.176V

1.144V

1.0V

CMPRF

C

1UF_0805_25V

DRN1

TG1

BST1

BG1

ISH1

CL1

CMP1

CLRF

VCCA

GND

DAC

CORE

SSPWRGD

DRN2

TG2

BST2

BG2

ISH2

CL2

CMP2

0.1UF_16V

PC67

1
2
3
37
34
33
32
31
30
29
25
24
23
1516

PC78

0.1UF_16V
19
18
17
21
26
27
28

PC84

BST1

BST2

12

PC64

PR66

1mR

PC90

4.7UF_1210_25V

PC89

12

PL8

PL17

401216

G

PC65
2200PF

PC61

PC60

4.7UF_1210_25V

PQ22
IR7811A

CPULX1

12

12

PQ29
IR7811A

578

3 6

241

578

3 6

241

F

4.7UF_1210_25V

4.7UF_1210_25V

PR146

2.2_1206

2 1

PC136
470P

12

PR69 332_1%

12

PR74 392_1%

PR85 10K

1 2

1 2

PR87 475_1%

PC87

4.7UF_1210_25V

CPULX2 CORE2

12

PQ31
SI4362

CPU_B1+

+3VALWP

12

PR63

10

PR67 2.2

12

PC77

0.01U

+5VALWP

+5VALWP

1 2

PR64 0

21

PD8

EP10QY03

1 2

2 1

PD11

EP10QY03

D

PC82
330PF

PC83
100PF

PC69
1UF_0805_25V

PR71
619_1%

12

PC75
1000PF

PC79
330PF

PR88

2.2

1 2

PC92

1UF_0805_25V

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

PC80
180PF

PC76
330PF

PC86
180PF

PR89

1 2

0

TG1

BG1

PQ21
IR7811A

PC81
180PF

E

CPU_B2+

578

3 6

578

3 6

BG2

241

241

TG2

PQ24
SI4362

12

578

578

PR141
51K_1%

PQ28
IR7811A

3 6

3 6

578

578

241

241

3 6

241

PQ25
SI4362

3 6

241

PR70 475_1%

PQ30
SI4362

4.7UF_1210_25V

PC62

PL16

ETQP1H0R6BFA

PL7

@0R7D-CPI

1 2

PD9
EC31QS04

PC72

4.7UF_0805_10V

PR68 10K

PR73 475_1%

PR75 1K

PR86 332_1%

PC88

@4.7UF_1210_25V

PR147

2.2_1206

PC137
470P

PC63

@4.7UF_1210_25V

12

CORE1

12

12

12

4.7UF_1210_25V

@0R7D-CPI

1 2

ETQP1H0R6BFA

2 1

PD12

EC31QS04

Title

Size Document Number Rev

B

Date: Sheet

CPU-CORE

1 2

12

PL5

HI1812V101R-00 8A/100 Ohms

PC66

@0.1UF_0805_25V

12

12

PD10
SMAL340

PC133
2200PF

12

PC91

4.7UF_1210_25V

PC94

4.7UF_0805_10V

Comp a l Electro nics , In c .

SCHEMATIC, M/B LA -1302

PR90
1mR

PC134

@0.1UF_0805_25V

12

B+

+CPU_CORE

B+

1 2

PL15

HI1812V101R-00 8A/100 Ohms

+CPU_CORE

39 45Wednesday, May 29, 2002

of

H

1B

A

B

C

D

E

ACIN 19,29

PACIN 37,38

12

PC102
1000PF

PACIN

12

Detector

PACIN 37,38

+5VALWP

12

PC98
1000PF

12

PC107

0.1UF_16V

CHGRTCP

PR116
200_0805

PC108

1UF_0805_25V

VIN

12

PR91

+5VP

2 1

PZD6
RLZ5.1B

2 1

PZD7
RLZ16B

@10_1206

12

PZD3
@RLZ24B

12

PL10

PCN1

1

3

3

1 1

2 2

3 3

4 4

2

SINGATRON 2DC-S026B301

1 2

PJP1
3MM-NEW

VIN

VMB

CHGRTCP

2 1

PZD5
RLZ4.3B

51ON#32

1 2

CHGRTC

PD16
RB751V

PR111
22K

1

2

PD14

RLS4148

12

PR112
100K

1 2

PR137
200

ADPIN

12

12

ADPGND

200_1206

1 2

@200_1206

1 2

2 1

PC105

0.22UF_1206_25V

1 2

PD13

@BYS10-45

12

PR100

PR101

PJP4

@

12

PR117
200

PC95
100PF

12

PQ33

TP0610T

2

RTCVREF

13

3.3V

RTCVREF

HI1812V101R-00 8A/100 Ohms

PC96
1000PF

1 2

12

1 2

PL11

@HI1812V101R-00 8A/100 Ohms

VS

PR113
10K

1 2

12

PC106

@0.1UF_0805_25V

3

3

PC109

4.7UF_1206_16V

PU7

S-81233SGUP

1

1

PC97
100PF

PR114

27K

1 2

2

2

VIN detector

16.90 17.55 18.22

16.46 17.08 17.72

VIN

12

PR92

82.5K_1%

12

12

PC100
1000PF

+5VP

MAINP4,37

ACON38

B+_READY37

PR93
20K_1%

PD15

VIN

RLS4148

PR105
10K

1 2

PD17

RB751V

PD18

RB751V

Precharge detector

15.34 15.90 16.48

13.13 13.71 14.20

PR94
22K

1 2

12

12

12

12

PC101

0.1UF_16V

VS1

4.4V

12

PU6A

LM393A

PU6B

LM393A
PC103

1000PF

7

PR99
10K

VS

3

+

2

-

PR95
1M_1%

1 2

12

84

12

PR145

1.5K_1206

1 2

PR102

1.5K_1206

1 2

PR103

1.5K_1206

1 2

PR104

1.5K_1206

1 2

PR106
1M_1%

VS

5

+

6

-

PC99

0.01UF

1

RTCVREF

3.3V

12

12

PC104

0.1UF_16V

RTCVREF

3.3V

PR110
10K

1 2

PQ34

2N7002

VIN

12

PR96
10K

3.2V

12

PZD4
RLZ4.3B

12

PR109
215K_1%

13

PQ35

DTC115EUA

PR97
10k

1 2

12

PR98
10K

B+

12

PR107
499K_1%

12

PR108
499K_1%

PR115

2

47K

13

100K

2

100K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

Title

Size Document Number Rev

B

Date: Sheet

Comp a l Electro nics , Inc.

401216

SCHEMATIC, M/B LA -1302

40 45Wednesday, May 29, 2002

E

of

1B

A

PQ38

HMBT2222A

2

PQ36

@SI3445DV

PQ37

SI3445DV

1
3

12

+3VALWP

+5VALWP

PJP3

2 1

PJP2

2 1

@

1 1

PC113

47UF_D_6.3V_SP

2 2

+

12

RB751V

PC115

10UF_1210_16V

PQ39
2SA1036K

PD19

PC117
4700P

1 2

12

3
1

1 2

PR122

1K

2

4 5

4 5

PR121
10K

PU3B
LM393M

D

S

6
2

1

G

3

D

S

6
2

1

G

3

VL

84

5

+

7

6

-

PC124
4700P

VL +2.5V

12

SDREF

PR138

3 3

0

SDREF7,9

PC131

10UF_1206_6.3V

7

LM358
PU9B

84

+

-

PC132

5
6

@SMAL340

PD20

SMAL340

12

12

PQ41
@DTC115EUA

12

0.1UF_16V

12

B

PD21

LX2.5

12

PR135

100K_0.5%

PR136

100K_0.5%

SLF12565_4R2N5R5

12

PR119
2M

12

PC118

0.1UF_16V

13

100K

100K

PQ42

@DTC115EUA

PC130

0.1UF_16V

2

PL12

12

1 2

VL

12

PR128
@100K

13

100K

100K

PR124
47K

12

PR120

23.2K_1%

12

PR123

11.8K_1%

C

D

E

+2.5V +-5%

DDR/Connector

12

PC112
150P

220UF_D_4V_TPB

+2.5VALWP

PC110

12

+

PC111

@220UF_D_4V_TPB

12

+

0.85VREF

+2.5VALWP

PR125

1 2

100K

SUSP#29,33,34,37,42

DTC115EUA

2

SYSON 29,33

LI-3S/LI-4S#29,38

100K

2

100K

PQ40

PD25

@BAS40-04

ABATT_TEMP29

+2.5VALWP

12

13

+3VALWP

1

PR118
10

PC114

0.1UF_0805_25V

PC120

4.7UF_1206_16V

12

PR129
@0

PR131

1K

3

2

12

1000PF

PC127

12

PC116

16

VCC2

15

PVDD2

13

PGND2

12

AGND2

11

VFB

10

VCCQ

9

AGND

HI1812V101R-00 8A/100 Ohms

1 2

TS

12

PL14

PC128

0.01UF

0.1UF_0805_25V

PD22

@EP10QY03

12

PC121

4.7UF_1206_16V

+2.5VALWP

12

PC126

0.1UF_0805_25V

21

LX1.25

12

PD23

@SMAL340

1 2

PC125
1000PF

PL13

TPRH6D38-5R0M

PR126
100K

PR127
1K

12

+1.25VP

12

12

+

+

12

12

@220UF_D_4V_TPB

PC122

220UF_D_4V_TPB

PC123

BATT+

BATT+

PR134

PCN2

1
2

B/I

3
4

SLD

5

SLC

6
789

BATT CONN.

1K

PC129

1000PF

12

+3VALWP

3

2

@BAS40-04

+5VALWP

1

2

3 14

4

5

6

7

8

PR130
15K

PR132 25.5K_1%

1

PD24

3

VCC1

PVDD1

PU8

VL1 VL2

CM8500

PGND1

AGND1

SD

VIN/2

AGSEN

VMB

PR133
1K

1

2

PD27

EC_SMD129,30

+5VALWP

@BAS40-04

3

PR139 100

1

2

PD28
@BAS40-04

4 4

EC_SMC129,30

PR140 100

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

Title

SCHEMATIC, M/B LA-1302

Size Document Number Rev

401216

Date: Sheet

41 45Wednesday, May 29, 2002

E

of

1BB

5

4

3

2

1

+1.8V+-5%

12

PR150
10K

PQ45

SI3445DV

D

S

4 5

G

3

VL

PU10A
LM393A

1

6
2

1

PD31

SMAL340

84

3

+

2

-

12

LX18

PC140

0.1UF_16V

12

PC142

0.01UF

+5VALW

D D

12

10UF_1210_25V

C C

PC139
2200PF

PQ43
2SA1036K

1 2

12

3
1

PD30

RB751V

PC138

PR149

1K

1 2

2

PQ44

HMBT2222A

2

1
3

PL18

TPRH6D38-5R0M

12

PC141

0.1UF_16V

12

PR151
2M

12

12

12

PR152

11.5K_1%

PR153
10K_1%

PR154
100K

12

12

+1.8VALWP

PC143
470P

0.85VREF

12

+

PC144
150UF_D_6.3V_KO

+1.5V+-5%

PQ52

+1.5VP

12

12

+

PC153

PC152

150UF_D_6.3V_KO

470P

PR165
100K

12

0.85VREF

VL

12

PR166
100K

2

13

100K

2

100K

SUSP# 29,33,34,37,41

12

PR161
10K

PQ50

SI3445DV

D

S

4 5

G

3

PU10B
LM393A

7

6
2

1

PD33

SMAL340

VL

84

+

-

LX15

12

5
6

PC151

0.01UF

+5VALW

12

PD32

RB751V

PC148

4.7UF_1206_25V

B B

A A

PC149
2200PF

PQ48
2SA1036K

1 2

12

3
1

PR160

1K

1 2

2

PQ49

HMBT2222A

2

1
3

PL19

TPRH6D38-5R0M

12

PC150

0.1UF_16V

12

PR162
2M

12

PQ51
DTC115EUA

12

12

PR163

7.87K_1%

PR164
10K_1%

13

100K

100K

DTC115EUA

Compal Elect ro ni cs, In c .

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

5

4

3

2

Title

SCHEMATIC, M/B LA-1302

Size Document Number Rev

401216

Date: Sheet

42 45Wednesday, May 29, 2002

1

of

1B

A

Voltage Rails

B

C

D

E

Power Plane Description

VIN
B+

1 1

+CPU_CORE
+2.5VALW

Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU

2.5V always on power rail ON ON ON*

2.5V power rail
+2.5VS 2.5V switched power rail ON OFF OFF
+3VALW

+3V

3.3V always on power rail

3.3V power rail

3.3V switched power rail+3VS
+5VALW
+5V

5V always on power rail
5V power rail OFFON

+5VS

+12VAL W
+12VS

2 2

+RTCVCC
+1.25VS

12V always on power rail
12V switched power rail
RTC power

1.25V switched power rail ON
+1.2VS 1.2V switched power rail

S1 S3 S5

N/A N/A N/A

N/AN/AN/A

ON OFF

OFF

ON+2.5V OFFON

ON

ON

ON*

ON
ON
ON

ON
OFF
ON

OFF
OFF
ON*

ON

OFF

ON
OFF
ON

OFF

OFF5V switched power rail

ON*
OFFON
ON

OFF

ON

ON

ON

OFFOFFON

FUNCTION

Pullhigh,Switch,DOCKING,VL,AC IN.
Pullhigh,Switch,B1+,PWR MB3878,PWR MAX1718.

Pullhigh,Switch,NB,CPU.

Pullhigh,Switch,NB,DDR SODIMM.
Pullhigh,Switch,NB,DDR SODIMM.

Pullhigh,Switch,NB,CLK Buffer,SB,LANVDD.
Pullhigh,Switch,PCMCIA Switch,LAN,CMOS,KBD CTRL,

SMBus,BIOS,BlueTooth, USB

Pullhigh,Switch,SB,PCMCIA CTRL,CMOS,PANEL.
Pullhigh,DJ,Switch,LOGIC,KBD,SIO,LAN,1394,

Pullhigh,Docking,DJ,Switch,BT,LOGIC,AVDD(Audio),Thermal,FAN.
Pullhigh,Switch.
Pullhigh,Docking,MiniPCI,+5VALW,

USB,T/P,LPT,DJ,HDD,TV,CRT,Inverter,Switch,VID.
PC CARD,Pullhigh,Switch,MOS

Switch,Power MOS.
RTC Power.
Pullhigh,DDR termination.

CPU

RELATED POWER NET NAME

VIN1

B++,B1+,CPU_B1+,CPU_B2+

LANVDD

+VCCHCK,+VCCMCK,+VCCMDLL,+2.5VRGBPLL,+2.5VRGBDAC,+2.5VSBRAM
,+SB_PLLVDD

+3VCD(+3VCD_A), LANIO, +3.3VAUX

LCDVDD,+3V_CB

VDDC,+3VS_MINIPCI,LCDVDD(LCDVDD_1),TV_DVDD,LVDS_PLLVCC(LVDS_VCC)

+5VCD(+5VCD_1,+5VCD_2),AVDD(AVDD_AC97),S1_VCC,+5VAMP,INV_B+

+5VFAN1,+5VFAN2,CRTVDD,+5V_PRN,+5VS_MINIPCI,USB_AS(USB_A),
USB_BS(USB_B),TV_VDD,TV_AVDD

1.25VP

1.2VP,+H_VCCA,+HVCCIOPLL

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

External PCI Devices

VGA LCD PANEL ID LIST

Device I DSE L # REQ # / GN T # Interrupts

LAN
CardBus
Mini-PCI
Mini-PCI LAN

3 3

IEEE-1394 Controller
AGP VGA

AD17

AD20
AD18
AD22 PIRQC1
AD16 0 PIRQA

3 PIRQB
2
4

PIRQA
PIRQD

PIRQA

EC SM Bus1 address

Device

Smart Batte r y
EEPROM

0001 011X b
1010 000X b

EC SM Bus2 address

Device

AD1032
OZ163
Docking
EQ TAS3002

1001 100X b
0011 0100 b
0011 011X b
0110 011X b

ICH3-M SM Bus address

Device

SODIMM

4 4

Clock Gen

P.S:Default Resistor & Capacitor's package are 0603.

1010 000X b
1101 001x b

Default 8P4R package is 0402.

A

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA-1302

Size Document Number Rev

401216

Date: Sheet

43 45Wednesday, May 29, 2002

E

of

1B

5

4

3

2

1

PIR listing :

PAGE 4
PAGE 5
PAGE 6
PAGE 12

D D

PAGE 24
PAGE 25
PAGE 13

PAGE 15
PAGE 23
PAGE 27

PAGE 26

PAGE 33

PAGE 27
PAGE 25

PAGE 27

C C

PAGE 28
PAGE 29

PIR1 CHANGE THERMAL SENSOR FROM MAX6654 TO ADM1032

DEL U11, R78, R86; ADD U56, R519
PIR2 COST DOWN CPU CAPS DEL C110, C377 ADD DIP 560UF_4V_14m C715, C716; C72, C97, C126 NOT ON
PIR3 REMOVE AGP_BUS PULLUPS RP111, RP11, RP12, RP15 NOT ON

CHANGE R284, R285 FROM 33 OHM TO 10 OHM
PIR4 AUDIO CODEC CHANGED FROM ALC201 TO ALC202

PIR5 EMI REQUEST TO PULL HIGH ON MK1709

ADD R286 10_0402; U41, C592, C615, C593, R459, R458, C621, R433, R417, C598, R449, R444

NOT ON; CHANGE R450, R444 TO 0_0402, ADD R522, R523 0_0402

ADD R385 0_0402, RESERVE R405, C585, C584, Y4; ADD 20K_0402 R525, R528 33K_0402 R526,

R527; ADD R413 0_0402, R524 10K_0402, Q75 PDTA114EK
PIR7 DECREASE THE NOISE ON VDDRH ADD A .1UF_0402 CAP C719

PIR8 REMOVE LAN CHASIS GROUND PER EMI'S REQUEST
PIR10
PIR11 FOR AUDIO NOISE, ISOLATE LEFT_EQ , GET_EQ , CHANGE C237'S

GND TO AGND
PIR12

PIR13
PIR14

PIR15
PIR16
PIR17 Add capacitor to filter out noise on AVBATT_TEMP to

MOVE SPKR CAPS TO AUDIO BOARD FOR COST DOWN

+3V, +2.5V RISES AS AC_IN, USE 2N7002 AS INVERTER
INSTEAD OF 7414

COST DOWN, USE 74AHC125 TO REPLACED 7SH32
RESERVE A JUMPER FOR AGND TO DGND

DECREASE EARPHONE'S VOLUME
Add bead for CD ROM analog grounding option

prevent shut_down bug

DEL C243

C692, C711 NOT ON, ADD 0_0805 R531, R532

RESERVE R529, R530

ADD Q75, R532

ADD U57, DEL U56, U50

ADD R541, 542, 543, 544

Del C237 , add L50 , change bead connection from Analog to Digital ground

Add C736 1uF capacitor

PAGE 5 PIR18 EMI team agree to delete all EMI clip Del EMI clip PAD2,4,6,8

Still reserve four clip for backup
PAGE 36 PIR19 Add JAE SD/MMC socket as 2nd source Add JP29
PAGE 36 1.Chang R121 from 499 1% 0402 Resistor to 33K 5%

PAGE 13 Some additional RC on SPECTRUM IC was requested

B B

0402 resistor

2.Add R568 to prevent SDLED signal directly short

with Ground while write protect tag enabled.

by EMI to reduce interference .

Change R121PIR20

Add R568 3.3K , 5% , 0402

Add R547 -> 10 Ohm , R546 -> 10 Ohm , R555 -> 10 Ohm , C720 -> 22p , C721 -> 22pPIR21

A A

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

5

4

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

3

2

SCHEMATIC, M/B LA-1302

Size Document Number Rev

B

401216

Date: Sheet

44 45Wednesday, May 29, 2002

1

of

1B

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 1

Power section

Reason for change PG# Modify List B.Ver#Item

1 For thermal teem request that thermal setting point changed

D D

from 96 to 90 degree C.

3 B test BOM

For cost down issue 37 PC28,PC29 should not be POP

4

Prevent PU4 leakage lock pre-charge circuit

37

38

5

6

C C

PR20 changed from 1.74k into 2k_1%_0603(SD014200101)
PR24 changed from 21k into 19.1k_1%_0603(SD014191209)

B test BOM

PQ41,PQ42,PR128 should not be PO P412 +2.5VALWP is always power plane B test BOM

PC155 should be POP (CB5600NM000)

PU4 pin14 changed from PACIN into ACON B gerber

B B

A A

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

5

4

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

3

2

SCHEMATIC, M/B LA-1302

Size Document Number Rev
Custom

401216

Date: Sheet

45 45Wednesday, May 29, 2002

1

of

1B