Compal LA-1251 ATR10 Schematic
A
4 4
B
C
D
E
3 3
ATR10 LA-1251 Schematic Document
Pentium4/Northwood mPGA478 CPU/Brookdale MCH/ICH2
ATI Mobility M6-P
2 2
2001-12-26
Rev: 0.5
1 1
Compal Electronics, Inc.
PROPRIETARY NOTE
A
B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Title
Size Rev
Document Number
B
ATR10 LA1251
Wednesday, December 26, 2001
Date:
E
0.5
A B C D E
COMPAL CONFIDENTIAL
MODEL NAME : ATR10 LA-1251
REV:0.5
4
3
2
1
INTERNAL IDE
IDE/CD
/FDD
PAGE 22
USB/BlueTooth
LPT PORT
MDC
Direct CD
Play
A B C D E
CRT & TV-OUT
LCD
ATI M6P
16MB DDR SDRAM
PIRQA#
PAGE 21
PAGE 25
PAGE 24
PAGE 12,13,14,15
LPC 47N227
PAGE 16
HUB Link
PCI BUS
ICH2
FUNC 0: LAN, HUB-TO-PCI ,
PCI-TO-LPC BRIDGE
FUNC 1: IDE Controller
FUNC 2: USB Controller #1
FUNC 3: SM BUS Controller
FUNC 4: USB Controller #2
FUNC 5: AC97 Audio Controller
FUNC 5: AC97 Modem Controller
LPC
SIO
PAGE 23
PAGE 8,9,10
LPC
EC/KBC
PC87591
PAGE 28
BIOS
EC BUFFER
Pentium4/Northwood
mPGA478 CPU
PAGE 2,3
PSB
Brookdale
MCH
Host-AGP Bridge
DRAM controller
Hub interface
AC LINK
MDC
Connector
AC97 Codec
PAGE 26 PAGE 27
Switchs &
Connectors
PAGE 29 PAGE 30
PROPRIETARY NOTE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PAGE 4,5,6
PAGE 12
MEMORY BUSAGP BUS
CARDBUS
PCMCIA
SOCKET
AMP &
Audio Jack
PCI1420
PC133
SODIMM X2
BANK2,3,4,5
IDSEL: AD16
MASTER 3
PIRQA#, PIRQB#
SIRQ
PAGE 17
PAGE 18
PAGE 7
LAN Controller
INTEL PHY
PAGE 19
Title
Size Document Number Rev
Date: Sheet of
CLOCK
ICS950805
POWER
INTERFACE
Mini PCI
Connector
DC/DC POWER
+1.5V POWER
+1.8V POWER
+2.5V POWER
+3VALW POWER
+5VALW POWER
+12VALW POWER
CPU_VCC POWER
PAGE 33,34,35,36,37,38
Compal Electronics, Inc.
ATR10 COVER SHEET
B
ATR10 LA1251
Wednesday, December 26, 2001
PAGE 11
PAGE 30
IDSEL: AD27
MASTER 0
PIRQA#,
PIRQD#
PAGE 20
1 39
4
3
2
1
0.5
A
CPU_VCC
1 2
R274 51_1%
1 2
R91 56
1 2
R280 300_1%
1 2
R290 51_1%
4 4
1 8
2 7
3 6
4 5
3 3
CPU_VCC
2 2
1 1
CPURST#
FERR#
CPU_PWRGD
BREQ0#
RP5
ITP_TMS
ITP_TRST#
ITP_TCK
ITP_TDI
8P4R-1K
1 2
R250 51_1%
1 2
R251 51_1%
1 2
R262 51_1%
1 2
R253 51_1%
1 2
R254 51_1%
1 2
R263 51_1%
SELPSB[1:0] STSEM BUS FREQUENCY
00
01
10
11
BPM0#
BPM1#
BPM2#
BPM3#
BPM4#
BPM5#
CPU_PWRGD8
100MHZ
RESERVED
RESERVED
RESERVED
A
HREQ#04
HREQ#14
HREQ#24
HREQ#34
HREQ#44
ADSTB0#4
ADSTB1#4
BREQ0#4
HLOCK#4
HIT#4
HITM#4
DEFER#4
DRDY#4
CPURST#4
HTRDY#4
CPU_VCC
BSEL011
DBSY#4
CPUSLP#8
HA#[3..31]4
ADS#4
BNR#4
BPRI#4
RS#04
RS#14
RS#24
HA#[3..31]
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
BREQ0#
CPURST#
BPM0#
BPM1#
BPM2#
BPM3#
BPM4#
BPM5#
ITP_TDI
ITP_TMS
ITP_TRST#
ITP_TCK
1 2
R82 @62_1%
BSEL0
CPU_PWRGD
CPUSLP#
THERMDA
THERMDC
THERMTRIP#
AB1
AC1
AA3
AC3
K25
K26
AB25
AB2
AC6
AB5
AC4
AA5
AB4
AF26
AD6
AD5
AE25
AB23
AB26
K2
K4
L6
K1
L3
M6
L2
M3
M4
N1
M1
N2
N4
N5
T1
R2
P3
P4
R3
T2
U1
P6
U3
T4
V2
R6
W1
T5
U4
V3
W2
Y1
J1
K5
J4
J3
H3
L5
R5
G1
V5
G2
J26
L25
H6
D2
G4
F3
E3
E2
H2
V6
J6
F1
G5
F4
Y6
D5
C1
F7
E6
D4
C3
H5
B3
C4
A2
U23A
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
ADSTB0#
ADSTB1#
ADS#
AP0#
AP1#
BINIT#
BNR#
IERR#
DP0#
DP1#
DP2#
DP3#
BREQ0#
BPRI#
LOCK#
HIT#
HITM#
DEFER#
DRDY#
MCERR#
RESET#
TRDY#
RS0#
RS1#
RS2#
RSP#
BPM0#
BPM1#
BPM2#
BPM3#
BPM4#
BPM5#
SKTOCC#
TDO
TDI
TMS
TRST#
TCK
PROCHOT#
BSEL0
BSEL1
DBSY#
DBR#
PWRGOOD
SLP#
THERMDA
THERMDC
THERMTRIP#
mPGA478
B
ADDR GROUP
CONTROL GROUP
THERMAL DIODE
B
Northwood
MISC
PROPRIETARY NOTE
C
HD#[0..63]
HD#0
B21
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
DATA GROUP
HOST CLK
LEGACY CPU
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DBI0#
DBI1#
DBI2#
DBI3#
DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#
BCLK0
BCLK1
ITPCLK0
ITPCLK1
A20M#
FERR#
IGNNE#
INTR/LINT0
NMI/LINT1
INIT#
STPCLK#
SMI#
B22
A23
A25
C21
D22
B24
C23
C24
B25
G22
H21
C26
D23
J21
D25
H22
E24
G23
F23
F24
E25
F26
D26
L21
G26
H24
M21
L22
J24
K23
H25
M23
N22
P21
M24
N23
M26
N26
N25
R21
P24
R25
R24
T26
T25
T22
T23
U26
U24
U23
V25
U21
V22
V24
W26
Y26
W25
Y23
Y24
Y21
AA25
AA22
AA24
E21
G25
P26
V21
E22
K22
R22
W22
F21
J23
P23
W23
AF22
AF23
AC26
AD26
C6
B6
B2
D1
E5
W5
Y4
B5
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
A20M#
FERR#
IGNNE#
INTR
NMI
C
HD#[0..63] 4
SB_A20M#
SB_IGNNE#
SB_INTR
SB_NMI NMI
DBI0# 4
DBI1# 4
DBI2# 4
DBI3# 4
DSTBN0# 4
DSTBN1# 4
DSTBN2# 4
DSTBN3# 4
DSTBP0# 4
DSTBP1# 4
DSTBP2# 4
DSTBP3# 4
HCLK_CPU 11
HCLK_CPU# 11
FERR# 8
CPUINIT# 8
STPCLK# 8
SMI# 8
2200PF
+5VS
1 2
1 2
1 2
1 2
CPU_VCC
CPU_VCC
12
C104
R67 1K
R95
0
R97
0
R66
0
R65
0
1 2
A20M#
IGNNE#
INTR
R92
@0
1 2
R142 56
1 2
R98 56
12
THERMDA
THERMDC
C71
.1UF
R93
@0
1 8
2 7
12
12
THERMTRIP#
D
1617VCC
U5
1
NC
2
VCC
3
DXP
SMBCLK
4
DXN
5
NC
SMBDATA
6
ADD1
7
8 9
3 6
4 5
12
12
D
ALERT
GND
GND NC
MAX1617/MAX6654
CPU_VCC
RP7
@8P4R_1K
SB_A20M#8
SB_IGNNE#8
SB_INTR8
SB_NMI8
CPURST#4
R94
R96
@0
@0
+3V
R144
1K
1 2
1
C
Q8
2
B
2SC2411K
E
3
1 2
E
+5VS
12
R38
200
16
NC
15
STBY
ADD0
NC
1 2
14
13
12
11
10
SB_A20M#
SB_IGNNE#
SB_INTR
SB_NMI
R497
@1K
ATF#
12
+5VS
@0.22UF
1 2
C604
11
10
14
13
R39
1K
2
3
5
6
1
EC_SMC2 21,28
EC_SMD2 21,28
U7
IOA
IOA
IOB
IOB
I1C
I1C
I1D
I1D
S
@QS3257
A20M#
IGNNE#
INTR
NMI
VCC
GND
YA
YB
YC
YD
E#
16
A20M#
4
IGNNE#
7
9
NMI
12
8
1 2
15
RP6
@8P4R_330
+3VS
C96
1 2
@.1UF
INTR
R61 @1K
45
36
27
18
SW1 RATIO SELECT
RATIO
NMI A20M# IGNNE# INTR
R145
@0
15X
16X
17X
18X
19X
20X
21X
22X
23X
24X
THERTRIP# 28
VR_ON 28,38
H
L
L
L
L
L
L
L
H
L
L
L
H
H
H
H
H
L
L
H
L
H
H
L
L
L
H
H
L
L
Compal Electronics, Inc.
Title
Pentium 4/Northwood Processor in mPGA478
Size Document Number Rev
B
ATR10 LA1251
Date: Sheet of
E
CPU_VCC
L
H
L
H
L
H
L
H
L
L
0.5
2 39Wednesday, December 26, 2001
A
C28
150U_D
10
9
8
7
6
10
9
8
7
6
+
CPUVID
VCCA
C368
+
150U_D
VCCIOPLL
CPU_VCC
CPU_VCC
TESTHI7
TESTHI6
TESTHI5
TESTHI4
CPU_VCC
TESTHI12
CPU_GTLREF
H_GTLREF
R294
51.1_1%
1 2
VSSA
TESTHI0
TESTHI1
TESTHI2
TESTHI3
TESTHI4
TESTHI5
TESTHI6
TESTHI7
TESTHI8
TESTHI9
TESTHI10
TESTHI11
TESTHI12
R492
@0
1 2
12
C365
1UF
COMP0
COMP1
R59
51.1_1%
12
AD20
AD22
AE23
AA10
AA12
AA14
AA16
AA18
AB11
AB13
AB15
AB17
AB19
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AD24
AA2
AC21
AC20
AC24
AC23
AA20
AB22
AD25
AA21
AA6
AD2
AD3
AE21
AF3
AF24
AF25
A5
A4
A10
A12
A14
A16
A18
A20
A8
AA8
AB7
AB9
U6
W4
Y3
A6
F20
F6
L24
P1
A22
A7
U23B
VCCA
VSSA
VCCIOPLL
VCCSENSE
VSSSENSE
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
TESTHI0
TESTHI1
TESTHI2
TESTHI3
TESTHI4
TESTHI5
TESTHI6
TESTHI7
TESTHI8
TESTHI9
TESTHI10
TESTHI11
TESTHI12
GTLREF
GTLREF
GTLREF
GTLREF
COMP0
COMP1
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
mPGA478
12
C379
220PF
12
C72
@220PF
1 2
L6
4.7UH_0805
1 2
L7
4.7UH_0805
RP25
1
2
3
4
5
10P8R-4.7K
RP4
1
2
3
4
5
10P8R-4.7K
12
C392
220PF
12
C65
@220PF
A
CPU_VCC
4 4
3 3
TESTHI0
TESTHI1
TESTHI2
TESTHI3
CPU_VCC
TESTHI8
TESTHI9
TESTHI10
TESTHI11
CPU_VCC
CPU_VCC
2 2
R291
49.9_1%
1 2
CPU_GTLREF
12
R287
C388
1UF
100_1%
1 2
CPU_VCC
R62
@49.9_1%
1 2
H_GTLREF
12
R60
@100_1%
1 2
C76
@1UF
1 1
B
PLL ANALOG VOLTAGE
Northwood
POWER,
GROUND,
RESERVED
SIGNALS
B
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D10
A11
A13
A15
A17
A19
A21
A24
A26
A3
A9
AA1
AA11
AA13
AA15
AA17
AA19
AA23
AA26
AA4
AA7
AA9
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AB3
AB6
AB8
AC11
AC13
AC15
AC17
AC19
AC2
AC22
AC25
AC5
AC7
AC9
AD1
AD10
AD12
AD14
AD16
AD18
AD21
AD23
AD4
AD8
AE11
AE13
AE15
AE17
AE19
AE22
AE24
AE26
AE7
AE9
AF1
AF10
AF12
AF14
AF16
AF18
AF20
AF6
AF8
B10
B12
B14
B16
B18
B20
B23
B26
B4
B8
C11
C13
C15
C17
C19
C2
C22
C25
C5
C7
C9
D12
D14
D16
D18
D20
D21
D24
D3
CPU_VCC
CPU_VCC
CPU_VCC
CPU_VCC
CPU_VCC
CPU_VCC
CPU_VCC
CPU_VCC
12
C35
10UF_1206
12
C32
10UF_1206
12
C372
10UF_1206
12
C445
10UF_1206
12
C450
10UF_1206
12
C145
10UF_1206
+ C167
470U_E
2.5V
+ C163
470U_E
2.5V
12
C70
.1UF
12
C107
1UF
12
C66
.1UF
12
C98
1UF
12
C34
10UF_1206
12
C31
10UF_1206
12
C373
10UF_1206
12
C369
10UF_1206
12
C451
10UF_1206
12
C135
10UF_1206
+ C168
470U_E
2.5V
+ C166
470U_E
2.5V
C
12
C73
.1UF
12
C88
1UF
12
C33
10UF_1206
12
C30
10UF_1206
12
C374
10UF_1206
12
C413
10UF_1206
12
C452
10UF_1206
12
C130
10UF_1206
C
12
C77
.1UF
12
C85
1UF
+ C164
470U_E
2.5V
+ C160
470U_E
2.5V
12
C84
.1UF
12
C78
1UF
12
C29
10UF_1206
12
C367
10UF_1206
12
C446
10UF_1206
12
C423
10UF_1206
12
C118
10UF_1206
PROPRIETARY NOTE
12
12
C87
C97
.1UF
.1UF
CPU_VCC
12
12
C74
C67
1UF
1UF
12
C366
10UF_1206
12
C442
10UF_1206
12
C447
10UF_1206
12
C148
10UF_1206
12
C428
10UF_1206
+ C19
470U_E
2.5V
+ C18
470U_E
2.5V
CPU_VCC
+ C159
470U_E
2.5V
D
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPUVID
12
C40
1UF
+ C161
470U_E
2.5V
AF9
B11
B13
B15
B17
B19
B7
B9
C10
C12
C14
C16
C18
C20
C8
D11
D13
D15
D17
D19
D7
D9
E10
E12
E14
E16
E18
E20
E8
F11
F13
F15
F17
F19
F9
AE5
AE4
AE3
AE2
AE1
AF4
Y5
Y25
Y22
Y2
W6
W3
W24
W21
V4
V26
V23
V1
U5
U25
U22
+ C162
470U_E
2.5V
U23C
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VID0
VID1
VID2
VID3
VID4
VCCVID
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
mPGA478
VID[0..4]38
+ C360
330U_E
2.5V
Northwood
POWER, GROUND AND NC
CPU_VID[0..4]
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
CPU_VCC
12
12
12
C106
C103
C41
.1UF
.1UF
.1UF
12
12
C371
C370
10UF_1206
10UF_1206
12
12
C443
C444
10UF_1206
10UF_1206
CPUVID38
12
12
C448
C449
10UF_1206
10UF_1206
12
12
C147
C146
10UF_1206
10UF_1206
12
12
C418
C410
10UF_1206
10UF_1206
+ C359
+ C165
330U_E
470U_E
2.5V
2.5V
+ C468
+ C105
470U_E
2.5V
330U_E
2.5V
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
RP3
1 8
2 7
3 6
4 5
8P4R-1K
R17
1K
E
D6
D8
E1
E11
E13
E15
E17
E19
E23
E26
E4
E7
E9
F10
F12
F14
F16
F18
F2
F22
F25
F5
F8
G21
G24
G3
G6
H1
H23
H26
H4
J2
J22
J25
J5
K21
K24
K3
K6
L1
L23
L26
L4
M2
M22
M25
M5
N21
N24
N3
N6
P2
P22
P25
P5
R1
R23
R26
R4
T21
T24
T3
T6
U2
+3V
12
Compal Electronics, Inc.
Title
Pentium 4/Northwood Processor in mPGA478
Size Document Number Rev
B
ATR10 LA1251
D
Date: Sheet of
E
3 39Wednesday, December 26, 2001
0.5
A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.
AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF TH
E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE I
NFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF
COMPAL ELECTRONICS, INC.
PROPRIETARY
B
C
D
E
MC-1/3(GTL+,AGP,HUB)
HD#[0..63]2
1 1
2 2
DSTBN0#2
DSTBN1#2
DSTBN2#2
DSTBN3#2
3 3
DSTBP0#2
DSTBP1#2
DSTBP2#2
DSTBP3#2
DBI0#2
DBI1#2
DBI2#2
DBI3#2
CPU_VCC
4 4
HD#[0..63] HA#[3..31]
U22A
HD#0
AA2
C81
.1UF
AC11
AC12
AE10
AC10
AE12
AF10
AG11
AG10
AH11
AG12
AE13
AF12
AG13
AH13
AC14
AF14
AG14
AE14
AG15
AG16
AG17
AH15
AC17
AF16
AE15
AH17
AD17
AE16
AE11
AC15
AD11
AC16
AD15
AB5
AA5
AB3
AB4
AC5
AA3
AA6
AE3
AB7
AD7
AC7
AC6
AC3
AC8
AE2
AG5
AG2
AE8
AF6
AH2
AF3
AG3
AE5
AH7
AH3
AF4
AG8
AG7
AG6
AF8
AH5
AE9
AC9
AD9
AG9
AD4
AE6
AD3
AE7
AD5
AG4
AH9
A
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#
DBI0#
DBI1#
DBI2#
DBI3#
BROOKDALE
C82
.1UF
HOST
CPURST#
MCH_GTLREF
12
12
R63
49.9_1%
R56
100_1%
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
RS#0
RS#1
RS#2
ADSTB0#
ADSTB1#
BCLK#
BCLK
HLOCK#
DEFER#
ADS#
BNR#
BPRI#
DBSY#
DRDY#
HITM#
HTRDY#
BR0#
RCOMP0
RCOMP1
SWNG0
SWNG1
HVREF
HVREF
HVREF
HVREF
HVREF
HA#[3..31] 2
HA#3
T4
HA#4
T5
HA#5
T3
HA#6
U3
HA#7
R3
HA#8
P7
HA#9
R2
HA#10
P4
HA#11
R6
HA#12
P5
HA#13
P3
HA#14
N2
HA#15
N7
HA#16
N3
HA#17
K4
HA#18
M4
HA#19
M3
HA#20
L3
HA#21
L5
HA#22
K3
HA#23
J2
HA#24
M5
HA#25
J3
HA#26
L2
HA#27
H4
HA#28
N5
HA#29
G2
HA#30
M6
HA#31
L7
HREQ#0
U6
HREQ#1
T7
HREQ#2
R7
HREQ#3
U5
HREQ#4
U2
RS#0
W2
RS#1
W7
RS#2
W6
R5
N6
K8
J8
AE17
W5
Y4
V3
W3
Y7
V5
V4
Y5
HIT#
Y3
U7
V7
RCOMP0
AC2
RCOMP1
AC13
AA7
AD13
M7
R8
Y8
AB11
AB17
SWNG
ADSTB0# 2
ADSTB1# 2
CLK_HMCH# 11
CLK_HMCH 11
CPURST# 2
HLOCK# 2
DEFER# 2
ADS# 2
BNR# 2
BPRI# 2
DBSY# 2
DRDY# 2
HIT# 2
HITM# 2
HTRDY# 2
BREQ0# 2
R270 22
1 2
R20 22
1 2
SWNG
MCH_GTLREF
CPU_VCC
12
R18
300_1%
12
R19
150_1%
HREQ#[0..4]
RS#[0..2]
B
C43
0.01UF
HREQ#[0..4] 2
RS#[0..2] 2
NOTE
AGPREF
CLK_66M_MCH11
+1_5VS
12
12
GAD[0..31]12
GC/BE#012
GC/BE#112
GC/BE#212
GC/BE#312
GFRAME#12
GDEVSEL#12
GIRDY#12
GTRDY#12
GSTOP#12
GREQ#12
GGNT#12
AD_STB012
AD_STB0#12
AD_STB112
AD_STB1#12
SBSTB12
SBSTB#12
AGPREF12
R57
1K
R58
1K
C
GPAR12
PIPE#
RBF#12
WBF#
C83
0.1UF
GAD[0..31]
GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31
GFRAME#
GDEVSEL#
GIRDY#
GTRDY#
GSTOP#
GPAR
GREQ#
GGNT#
PIPE#
AD_STB0
AD_STB0#
AD_STB1
AD_STB1#
SBSTB
SBSTB#
RBF#
WBF#
AGPREF
1 2
R273 40.2_1%
CLK_66M_MCH
C116
0.1UF
GRCOMP
1 2
C109
0.1UF
AA28
AB25
AB27
AA27
AB26
AB23
AA24
AA25
AB24
AC25
AC24
AC22
AD24
AA23
AG24
AH25
AF22
AC27
AC28
AF27
AF26
AE22
AE23
AA21
AD25
AD26
AD27
12
12
W28
W27
W24
W23
W25
R27
R28
T25
R25
T26
T27
U27
U28
V26
V27
T23
U23
T24
U24
U25
V24
Y27
Y26
Y23
V25
V23
Y25
Y24
R24
R23
P22
R347
10
C473
10PF
HUBREF
1 2
U22C
G_AD0
G_AD1
G_AD2
G_AD3
G_AD4
G_AD5
G_AD6
G_AD7
G_AD8
G_AD9
G_AD10
G_AD11
G_AD12
G_AD13
G_AD14
G_AD15
G_AD16
G_AD17
G_AD18
G_AD19
G_AD20
G_AD21
G_AD22
G_AD23
G_AD24
G_AD25
G_AD26
G_AD27
G_AD28
G_AD29
G_AD30
G_AD31
G_C/BE#0
G_C/BE#1
G_C/BE#2
G_C/BE#3
G_FRAME#
G_DEVSEL#
G_IRDY#
G_TRDY#
G_STOP#
G_PAR
G_REQ#
G_GNT#
PIPE#
AD_STB0
AD_STB#0
AD_STB1
AD_STB#1
SB_STB
SB_STB#
RBF#
WBF#
AGPREF
GRCOMP
NC
NC
66IN
BROOKDALE
C110
0.1UF
1 2
+1_8VS
12
12
R73
150_1%
R69
150_1%
AGP
HUB
1 2
D
TESTIN#
HISTB#
HLRCOMP
RSTIN#
C117
0.01UF
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
HIREF
HISTB
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
HIO
HI1
HI2
HI3
HI4
HI5
HI6
HI7
HI8
HI9
HI10
ST0
ST1
ST2
H26
B19
C5
C8
C23
C26
D12
F26
H27
K23
K25
AC18
AC20
AC21
AC23
AC26
AD6
AD8
AD10
AD12
AD14
AD16
AD19
AD22
AE1
AE4
AE18
AE20
AE29
P25
P24
N27
P23
M26
M25
L28
L27
M27
N28
M24
P26
N25
N24
+GMCH_HLCOMP
P27
AH28
AH27
AG28
AG27
AE28
AE27
AE24
AE25
AG25
AF24
AG26
J27
HL0
HL1
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
HL10
HUBREF
HL_STB
HL_STB#
1 2
R304
40.2_1%
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
ST0
ST1
ST2
1 2
R315
0
ST1CLK_66M_MCH
R25 @2K
GPAR
R285 100K
AD_STB0#
R299 6.8K
AD_STB1#
R277 6.8K
SBSTB#
R275 6.8K
Title
Size Document Number Rev
B
Date: Sheet of
HUBREF 8
HL_STB 8
HL_STB# 8
+1_8VS
SBA[0..7]
HL[0..10]
ST0 12
ST1 12
ST2 12
PCIRST# 8,12,17,18,20,22,23,28,31
GTRDY#
GIRDY#
GDEVSEL#
12
12
12
12
12
GSTOP#
GFRAME#
GREQ#
GGNT#
SBSTB
RBF#
PIPE#
WBF#
AD_STB0
AD_STB1
SBSTB
ST1
Compal Electronics, Inc.
Brookdale-1/3(GTL+,AGP,HUB)
ATR10 LA1251
E
R289 6.8K
R281 6.8K
R279 6.8K
R292 6.8K
R278 6.8K
R269 6.8K
R268 6.8K
R272 @6.8K
R22 6.8K
R21 6.8K
R23 6.8K
R297 @6.8K
R276 @6.8K
R271 @6.8K
R24 @10K
SBA[0..7] 12
HL[0..10] 8
+1_5VS
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
0.5
4 39Wednesday, December 26, 2001
A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.
AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF TH
E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE I
NFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF
COMPAL ELECTRONICS, INC.
PROPRIETARY
MD32
MD0
MD37
MD33
MD1
MD5
MD39
MD35
MD11
MD45
MD12
MD13
MD14
MD46
MD47
MD15
MD59
MD28
MD61
MD29
MD62
MD30
MD63
MD31
MD20
MD51
MD21
MD54
MD53
MD55
MD23
MD56
MD[0..63]
RP26
1
2
3
4
5
6
7
8 9
16P8R-22
RP29
1
2
3
4
5
6
7
8 9
16P8R-22
RP33
1
2
3
4
5
6
7
8 9
16P8R-22
16
15
14
13
12
11
10
16
15
14
13
12
11
10
RP31
1
2
3
4
5
6
7
8 9
16P8R-22
16
15
14
13
12
11
10
MMD32
MMD0
MMD37
MMD33
MMD1
MMD5
MMD39
MMD35
MMD11
MMD45
MMD12
MMD13
MMD14
MMD46
MMD47
MMD15
16
15
14
13
12
11
10
MMD59
MMD28
MMD61
MMD29
MMD62
MMD30
MMD63
MMD31
MMD20
MMD51
MMD21
MMD54
MMD53
MMD55
MMD23
MMD56
MD4
MD34
MD3
MD38
MD2
MD36
MD6
MD[0..63]7
1 1
2 2
3 3
MD40
MD9
MD41
MD8
MD10
MD42
MD43
MD44
MD48
MD16
MD49
MD17
MD18
MD50
MD19
MD52
RP27
1
2
3
4
5
6
7
8 9
16P8R-22
1
2
3
4
5
6
7
8 9
1
2
3
4
5
6
7
8 9
MD22
MD57
MD24
MD58
MD26
MD25
MD60
MD27
B
RP28
16P8R-22
RP30
16P8R-22
1
2
3
4
5
6
7
8 9
16
15
14
13
12
11
10
16
15
14
13
12
11
10
RP32
16P8R-22
MMD4
MMD7MD7
MMD34
MMD3
MMD38
MMD2
MMD36
MMD6
16
15
14
13
12
11
10
MMD40
MMD9
MMD41
MMD8
MMD10
MMD42
MMD43
MMD44
16
15
14
13
12
11
10
MMD48
MMD16
MMD49
MMD17
MMD18
MMD50
MMD19
MMD52
MMD22
MMD57
MMD24
MMD58
MMD26
MMD25
MMD60
MMD27
R81
49.9_1%
1 2
R310 22
+3V
R80
49.9_1%
1 2
SMVREF
1 2
C
MMD0
MMD1
MMD2
MMD3
MMD4
MMD5
MMD6
MMD7
MMD8
MMD9
MMD10
MMD11
MMD12
MMD13
MMD14
MMD15
MMD16
MMD17
MMD18
MMD19
MMD20
MMD21
MMD22
MMD23
MMD24
MMD25
MMD26
MMD27
MMD28
MMD29
MMD30
MMD31
MMD32
MMD33
MMD34
MMD35
MMD36
MMD37
MMD38
MMD39
MMD40
MMD41
MMD42
MMD43
MMD44
MMD45
MMD46
MMD47
MMD48
MMD49
MMD50
MMD51
MMD52
MMD53
MMD54
MMD55
MMD56
MMD57
MMD58
MMD59
MMD60
MMD61
MMD62
MMD63
SRCOMP
SMVREF
12
C128
0.1UF
F27
E27
B28
C27
D26
E25
B25
D24
F23
B23
C22
C21
D20
C19
C18
C17
B13
E13
C12
B11
E11
C10
F9
C9
E8
E7
C7
D6
B5
D4
C3
B2
G28
E28
C28
D27
B27
F25
C25
E24
C24
E23
D22
E22
B21
C20
D18
E18
E14
C13
E12
F11
C11
E10
D10
B9
E9
D8
B7
E6
C6
C4
B3
D3
J28
J9
J21
U22B
SMD0
SMD1
SMD2
SMD3
SMD4
SMD5
SMD6
SMD7
SMD8
SMD9
SMD10
SMD11
SMD12
SMD13
SMD14
SMD15
SMD16
SMD17
SMD18
SMD19
SMD20
SMD21
SMD22
SMD23
SMD24
SMD25
SMD26
SMD27
SMD28
SMD29
SMD30
SMD31
SMD32
SMD33
SMD34
SMD35
SMD36
SMD37
SMD38
SMD39
SMD40
SMD41
SMD42
SMD43
SMD44
SMD45
SMD46
SMD47
SMD48
SMD49
SMD50
SMD51
SMD52
SMD53
SMD54
SMD55
SMD56
SMD57
SMD58
SMD59
SMD60
SMD61
SMD62
SMD63
SRCOMP
SDREF
SDREF
BROOKDALE
D
E
MCH-2/3(SDRAM)
MAA0
G22
SMAA0
MAA1
E21
SMAA1
MAA2
F21
SMAA2
MAA3
G21
SMAA3
MAA4
E20
SMAA4
MAA5
G20
SMAA5
MAA6
E19
SMAA6
MAA7
F19
SMAA7
MAA8
G19
SMAA8
MAA9
G18
SMAA9
MAA10
E17
SMAA10
SMAA11
SMAA12
MEMORY
SCS#10
SCS#11
RDCLKIN
RDCLKO
SBS0
SBS1
SCK0
SCK1
SCK2
SCK3
SCK4
SCK5
SCK6
SCK7
SCK8
SCK9
SCK10
SCK11
SRAS#
SCAS#
SWE#
SCKE0
SCKE1
SCKE2
SCKE3
SCKE4
SCKE5
SCS#0
SCS#1
SCS#2
SCS#3
SCS#4
SCS#5
SCS#6
SCS#7
SCS#8
SCS#9
SCB0
SCB1
SCB2
SCB3
SCB4
SCB5
SCB6
SCB7
MAA11
E15
MAA12
G12
SBS0
F17
SBS1
G17
F13
G13
E2
C2
1 2
G15
R335 10
G14
1 2
F3
R337 10
E3
1 2
G16
R334 10
F15
1 2
H5
R336 10
G5
SRASA#
G23
SCASA#
J25
RMWEA#
G27
G9
F4
CKE2
G10
CKE3
F5
CKE4
G11
CKE5
E5
H23
J23
G7
G8
RRAS#2
J24
G24
H7
RRAS#3
F7
RRAS#4
G25
H25
G6
RRAS#5
H6
C16
E16
C15
D14
B17
D16
B15
C14
RDCLK
G3
H3
12
C400
@10PF_0402
MAA0 7
MAA1 7
MAA2 7
MAA3 7
MAA4 7
MAA5 7
MAA6 7
MAA7 7
MAA8 7
MAA9 7
MAA10 7
MAA11 7
MAA12 7
SBS0 7
SBS1 7
CLK_SDRAM2 7
CLK_SDRAM3 7
CLK_SDRAM4 7
CLK_SDRAM5 7
SRASA# 7
SCASA# 7
RMWEA# 7
CKE2 7
CKE3 7
CKE4 7
CKE5 7
RRAS#[2..5]7
RRAS#[2..5]
4 4
Compal Electronics, Inc.
Title
Brookdale-2/3(SDRAM)
Size Document Number Rev
B
ATR10 LA1251
Date: Sheet of
5 39Wednesday, December 26, 2001
E
A
NOTE
B
C
D
0.5
A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.
AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF TH
E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE I
NFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF
COMPAL ELECTRONICS, INC.
PROPRIETARY
B
C
D
E
MCH-3/3(Power)
U22D
AA22
AA26
AB21
AC29
AD21
AD23
AE26
AF23
AG29
AJ25
AB18
AB20
AC19
AD18
AD20
AE19
AE21
AF18
AF20
AG19
AG21
AG23
AJ19
AJ21
AJ23
AB19
AB22
AF21
AF25
AG18
AG20
AG22
AH19
AH21
AH23
AJ27
W22
W29
M22
AA9
AB8
AC1
AC4
AG1
R22
R29
U22
U26
N14
N16
P13
P15
P17
R14
R16
T15
U14
U16
L25
L29
N23
N26
A5
A9
A13
A17
A21
A25
C1
C29
D7
D11
D15
D19
D23
D25
F6
F10
F14
F18
F22
G1
G4
G29
H8
H10
H12
H14
H16
H18
H20
H22
H24
J5
J7
K6
K22
K24
K26
L23
M8
U8
AJ3
AJ5
AJ7
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
BROOKDALE
POWER/GND
B
VCCA0
VCCA1
VSSA0
VSSA1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GNDGND
+1_5VS
1 1
+1_8VS
+3V
2 2
3 3
CPU_VCC
4 4
A
T13
T17
U13
U17
A3
A7
A11
A15
A19
A23
A27
D5
D9
D13
D17
D21
E1
E4
E26
E29
F8
F12
F16
F20
F24
G26
H9
H11
H13
H15
H17
H19
H21
J1
J4
J6
J22
J26
J29
K5
K7
K27
L1
L4
L6
L8
L22
L24
L26
M23
N1
N4
N8
N13
N15
N17
N22
N29
P6
P8
P14
P16
R1
R4
R13
R15
R17
R26
T6
T8
T14
T16
T22
U1
U4
U15
U29
V6
V8
V22
W1
W4
W8
W26
Y6
Y22
AA1
AA4
AA8
AA29
AB6
AB9
AB10
AB12
AB13
AB14
AB15
AB16
AF5
AF7
AF9
AF11
AF13
AF15
AF17
AF19
AJ9
AJ11
AJ13
AJ15AJ17
VCCA0
VCCA1
VSSA0
VSSA1
VCCA0
VSSA0
VCCA1
VSSA1
NOTE
C391
33U_D
33U_D
+
+C378
1 2
L31 4.7UH_0805
1 2
L26 4.7UH_0805
12
C86
+
150UF_E
6.3V
C
+1_5VS
+1_5VS
CPU_VCC
+
+3V
12
+
+1_5VS
+
C42
22UF_10V_1206
C425
150UF_E
6.3V
C92
22UF_10V_1206
.1UF_0402
C123
4.7UF_0805
.1UF_0402
C47
C101
.1UF_0402
C153
.1UF_0402
.1UF_0402
C46
C95
+1_8VS
+
.1UF_0402
C152
.1UF_0402
.1UF_0402
C94
22UF_10V_1206
C48
C68
.1UF_0402
C126
.1UF_0402
C108
C91
.1UF_0402
.1UF_0402
D
C120
.1UF_0402
C57
.1UF_0402
C149
C112
.1UF_0402
C114
.1UF_0402
.1UF_0402
C125
.1UF_0402
.1UF_0402
C121
C56
C111
C113
.1UF_0402
C59
.1UF_0402
C151
.1UF_0402
C100
.1UF_0402
C115
.1UF_0402
.1UF_0402
C69
.1UF_0402
C122
C154
.1UF_0402
C90
.1UF_0402
Title
Size Document Number Rev
B
Date: Sheet of
C124
.1UF_0402
C127
.1UF_0402
.1UF_0402
Compal Electronics, Inc.
Brookdale-3/3(Power)
ATR10 LA1251
.1UF_0402
E
C150
C134
.1UF_0402
6 39Wednesday, December 26, 2001
C144
.1UF_0402
0.5
A
B
C
+3V
D
E
SO-DIM 144 PINS
+
RAM MODULE CONN.
+3V
+
+3V
MAA[0..12]
MD[0..63]
RRAS#[2..5]
C192
10UF_1206
6.3V
RP39
1 8
2 7
3 6
4 5
8P4R-10K
CLK_SDRAM25
SRASA#5
RMWEA#5
C495
.1UF
SCKDIMM1
SCKDIMM0
SDADIMM1
SDADIMM0
A
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
RCAS#2
MAA0
MAA1
MAA2
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
R360
C494
51
270PF
SRASA# SCASA#
RMWEA# CKE3
RRAS#2 MAA12
RRAS#3
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MAA6
MAA8
MAA9
MAA10
RCAS#1
RCAS#0
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
SDADIMM0 SCKDIMM0
C499
.1UF
MAA[0..12]5
MD[0..63]5
1 1
RRAS#[2..5]5
2 2
3 3
4 4
BANK2/3
+3V +3V
JP5
C497
.1UF
1
VSS
3
DQ0
5
DQ1
7
DQ2
9
DQ3
11
VCC
13
DQ4
15
DQ5
17
DQ6
19
DQ7
21
VSS
23
CE0#
25
CE1#
27
VCC
29
A0
31
A1
33
A2
35
VSS
37
DQ8
39
DQ9
41
DQ10
43
DQ11
45
VCC
47
DQ12
49
DQ13
51
DQ14
53
DQ15
55
VSS
57
RESVD/DQ64
59
RESVD/DQ65
61
RFU/CLK0
63
VCC
65
RFU
67
WE#
69
RE0#
71
RE1#
73
OE#/RESVD
75
VSS
77
RESVD/DQ66
79
RESVD/DQ67
81
VCC
83
DQ16
85
DQ17
87
DQ18
89
DQ19
91
VSS
93
DQ20
95
DQ21
97
DQ22
99
DQ23
101
VCC
103
A6
105
A8
107
VSS
109
A9
111
A10
113
VCC
115
CE2#/RESVD
117
CE3#/RESVD
119
VSS
121
DQ24
123
DQ25
125
DQ26
127
DQ27
129
VCC
131
DQ28
133
DQ29
135
DQ30
137
DQ31
139
VSS
141
SDA
143
VCC
SO-DIMM144 REVERSE
C491
C490
.1UF
.01UF
R358 1K
R373 1K
R375 1K
R376 1K
R371 1K
R372 1K
R374 1K
R361 1K
RESVD/DQ68
RESVD/DQ69
RESVD/DQ70
RESVD/DQ71
CE6#/RESVD
CE7#/RESVD
DIMM0
C488
.01UF
RCAS#0
RCAS#1
RCAS#2
RCAS#3
RCAS#4
RCAS#5
RCAS#6
RCAS#7
DQ32
DQ33
DQ34
DQ35
VCC
DQ36
DQ37
DQ38
DQ39
CE4#
CE5#
VCC
DQ40
DQ41
DQ42
DQ43
VCC
DQ44
DQ45
DQ46
DQ47
RFU/CKE0
VCC
RFU
RFU/CKE1
RFU
RFU
RFU/CLK1
VCC
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
VCC
A11/BA0
A12/BA1
A13/A11
VCC
DQ56
DQ57
DQ58
DQ59
VCC
DQ60
DQ61
DQ62
DQ63
VCC
B
VSS
VSS
A3
A4
A5
VSS
VSS
VSS
VSS
A7
VSS
VSS
VSS
SCL
C486
.01UF
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
RCAS#7RCAS#3
RCAS#6
MAA3
MAA4
MAA5
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
CKE2
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MAA7
SBS0
SBS1
MAA11
RCAS#5
RCAS#4
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
PROPRIETARY NOTE
C479
10UF_1206
6.3V
CKE2 5
SCASA# 5
CKE3 5
SBS0 5
SBS1 5
SM_SEL9
SCKP49,11
SDAP49,11
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
R138
51
C190
270PF
C496
1000PF
.01UF
CLK_SDRAM3 5
C510
.1UF
6
INH
10
A
9
B
3
X
13
Y
C500
+3V
GND
7
C
C492
CLK_SDRAM45
U35
1
5
2
4
12
14
15
11
74HC4052
C489
1000PF
C477
270PF
SCKDIMM0
SCKDIMM1
SDADIMM0
SDADIMM1
1000PF
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
RCAS#3
RCAS#2
MAA0
MAA1
MAA2
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
R352
51
SRASA# SCASA#
RMWEA# CKE5
RRAS#4 MAA12
RRAS#5
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MAA6 MAA7
MAA8
MAA9
MAA10 MAA11
RCAS#1
RCAS#0
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
SDADIMM1
1000PF
16
X0
VCC
X1
X2
X3
Y0
Y1
Y2
Y3
GND
8
BANK4/5
C487
+3V +3V
JP23
1
VSS
3
DQ0
5
DQ1
7
DQ2
9
DQ3
11
VCC
13
DQ4
15
DQ5
17
DQ6
19
DQ7
21
VSS
23
CE0#
25
CE1#
27
VCC
29
A0
31
A1
33
A2
35
VSS
37
DQ8
39
DQ9
41
DQ10
43
DQ11
45
VCC
47
DQ12
49
DQ13
51
DQ14
53
DQ15
55
VSS
57
RESVD/DQ64
59
RESVD/DQ65
61
RFU/CLK0
63
VCC
65
RFU
67
WE#
69
RE0#
71
RE1#
73
OE#/RESVD
75
VSS
77
RESVD/DQ66
79
RESVD/DQ67
81
VCC
83
DQ16
85
DQ17
87
DQ18
89
DQ19
91
VSS
93
DQ20
95
DQ21
97
DQ22
99
DQ23
101
VCC
103
A6
105
A8
107
VSS
109
A9
111
A10
113
VCC
115
CE2#/RESVD
117
CE3#/RESVD
119
VSS
121
DQ24
123
DQ25
125
DQ26
127
DQ27
129
VCC
131
DQ28
133
DQ29
135
DQ30
137
DQ31
139
VSS
141
SDA
143
VCC
SO-DIMM144-STANDARD
+3V
+
D
DIMM1
C485
10UF_1206
6.3V
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
CE4#
CE5#
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
RESVD/DQ68
RESVD/DQ69
RFU/CKE0
RFU/CKE1
RFU/CLK1
RESVD/DQ70
RESVD/DQ71
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
A11/BA0
A12/BA1
A13/A11
CE6#/RESVD
CE7#/RESVD
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
C478
.1UF
2
VCC
VSS
VCC
VSS
VCC
VSS
VCC
RFU
RFU
RFU
VSS
VCC
VSS
VCC
VSS
VCC
VSS
VCC
VSS
SCL
VCC
VSS
A3
A4
A5
A7
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
C498
.1UF
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
RCAS#7
RCAS#6
MAA3
MAA4
MAA5
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
CKE4
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
SBS0
SBS1
RCAS#5
RCAS#4
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
SCKDIMM1
C193
.1UF
CKE4 5
CKE5 5
C189
.1UF
R359
51
C493
270PF
CLK_SDRAM5 5
C191
.01UF
Compal Electronics, Inc.
Title
S.O. DIMM CONNECTOR
Size Document Number Rev
B
ATR10 LA1251
Date: Sheet of
7 39Wednesday, December 26, 2001
E
0.5
A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.
AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF TH
E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE I
NFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF
COMPAL ELECTRONICS, INC.
PROPRIETARY
1 1
B
C
D
W10
AA10
AA15
W11
AB10
U33A
AA4
AB4
Y4
W5
W4
Y5
AB3
AA5
AB5
Y3
W6
W3
Y6
Y2
AA6
Y1
V2
AA8
V1
AB8
U4
W9
U3
Y9
U2
AB9
U1
T4
Y10
T3
AA3
AB6
Y8
AA9
AB7
V3
W8
V4
W1
W2
AA7
W7
Y7
Y15
M3
L2
R2
R3
T1
P4
L3
ICH-2
ICH-2
(FW82801BA)
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
PCI
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE0#
C/BE1#
C/BE2#
C/BE3#
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PCIRST#
PLOCK#
SERR#
PERR#
PME#
GPI0/REQA#
GPO16/GNTA#
PCICLK
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
GPI1/REQB#/REQ5#
PCLK_ICH
A20M#
CPUSLP#
FERR#
IGNNE#
CPU
STPCLK#
RCIN#
A20GATE
CPUPWRGD
HUB
HL_STB
HL_STB#
HLCOMP
HUBREF
PIRQA#
PIRQB#
IRQ
PIRQC#
PIRQD#
IRQ14
IRQ15
APICCLK
APICD0
APICD1
SERIRQ
GPI2/PIRQE#
GPI3/PIRQF#
GPI4/PIRQG#
GPI5/PIRQH#
GNT0#
GNT1#
GNT2#
GNT3#
GNT4#
GPO17/GNTB#/GNT5#
12
R154
@33
12
C222
@22PF
D11
A12
FERR#
R22
A11
CPUINIT#
C12
INIT#
C11
INTR
B11
NMI
SMI#
B12
SMI#
STPCLK#
C10
RC#
B13
GATEA20
C13
CPU_PWRGD
A13
HL0
A4
HL0
HL1
B5
HL1
HL2
A5
HL2
HL3
B6
HL3
HL4
B7
HL4
HL5
A8
HL5
HL6
B8
HL6
HL7
A9
HL7
HL8
C8
HL8
HL9
C6
HL9
HL10
C7
HL10
HL11
C5
HL11
HL_STB
A6
HL_STB#
A7
+ICH_HLCOMP
A3
HUBREF
B4
PIRQA#
P1
PIRQB#
P2
PIRQC#
P3
PIRQD#
N4
IRQ14
F21
IRQ15
C16
CLK_APIC_ICH
N20
PICD0
P22
PICD1
N19
SIRQ
N21
GPI2
N3
GPI3
N2
GPI4
N1
GPI5
M4
PIN N3, M4 can not use GPIO.
GNT#0
M2
M1
R4
GNT#3
T2
R1
SIDERST#
L4
1 2
R383 0
C484 .1UF
C
HL[0..10]
HL_STB 4
HL_STB# 4
12
HUBREF 4
PIRQA# 12,17,20
PIRQB# 17
PIRQD# 20
IRQ14 22
IRQ15 21
SIRQ 17,23,28
GNT#0 20
GNT#3 17
SIDERST# 22
SB_A20M# 2
CPUSLP# 2
FERR# 2
SB_IGNNE# 2
CPUINIT# 2
SB_INTR 2
SB_NMI 2
SMI# 2
STPCLK# 2
RC# 28
GATEA20 28
CPU_PWRGD 2
HL[0..10] 4
+1_8VS
HL11
+ICH_HLCOMP
SIDERST#
IRQ14
IRQ15
GPI4
GPI3
GPI2
GPI5
PICD0
PICD1
CLK_APIC_ICH
Compal Electronics, Inc.
Title
ICH2-A(PCI,HUB,CPU) & FWH
Size Document Number Rev
B
ATR10 LA1251
Date: Sheet of
D
1 2
R357 @10K
1 2
R354 40.2_1%
1 2
R351 @8.2K
1 2
R410 10K
1 2
R390 10K
RP36
1 8
2 7
3 6
4 5
8P4R-100K
12
R414 10K
12
R409 10K
1 2
R415 0
+3VS
8 39Wednesday, December 26, 2001
0.5
AD[0..31]17,20
2 2
C/BE#017,20
C/BE#117,20
C/BE#217,20
C/BE#317,20
DEVSEL#17,20
FRAME#17,20
IRDY#17,20
TRDY#17,20
STOP#17,20
PCIRST#4,12,17,18,20,22,23,28,31
SERR#17,20
PCI Pullups
3 3
+3VS
+3VS
PERR#
REQA#
STOP#
SERR#
IRDY#
TRDY#
FRAME#
RP35
1
2
3
4
5
10P8R-8.2K
RP34
1
2
3
4
5
10P8R-8.2K
10
PIRQA#
9
PIRQB#
8
REQ#4
7
6
10
PIRQC#
9
PIRQD#DEVSEL#
8
SIRQ
7
PLOCK#
6
+3VS
+3VS
PERR#17,20
PME# has internal PU
PIDERST#22
PCLK_ICH11
REQ#020
REQ#317
REQ#0
REQ#1
REQ#2
REQ#3
REQ#4
+3VS
RP37
1 8
4 4
2 7
3 6
4 5
8P4R-8.2K
1 2
R350 8.2K
1 2
R349 @1K
REQ#0
REQ#1
REQ#2
REQ#3
GPI1
GNTA#
GNTA# Strapping for "A16 swap override" : "0" -> Enable
A
AD[0..31]
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR17,20
PCIRST#
PLOCK#
SERR#
PERR#
REQA#
GNTA#
PCLK_ICH
REQ#0
REQ#1
REQ#2
REQ#3
REQ#4
GPI1
PCI REQ ASSIGMENT
WLAN
NC
NC
PCMCIA CONTROLLER
NC
B
NOTE
A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.
AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF TH
E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE I
NFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF
COMPAL ELECTRONICS, INC.
PROPRIETARY
1 2
+3V
R403 10K
LLBATT#28
D38 RB751V
1 2
+3V
ON/OFF28,31
+3V
ACIN28,31,33,34,36
+3V
ECSMI#28
+3V
ECSCI#28
+3V
+RTCVCC
INTRUDER#
SMLINK0
SMLINK1
OVCUR#2
VGATE
CLKRUN#
LDRQ#1
DSCACHE#
ICH_AC_SDOUT
RSMRST#
IAC_BITCLK
IAC_SDATAI
IAC_SDATAI1
SPKR
R380 10K
D34 RB751V
D22 RB751V
D21 @RB751V
1 2
R388 10K
D36 RB751V
1 2
R370 10K
D33 RB751V
1 2
R362 10K
D32 RB751V
1 2
R384 10K
D35 RB751V
R190
1 2
15K
1UF_25V_0805
R191
1 2
1K
EC_LID_OUT#28
PBTN_OUT#28
1 1
EC_RIOUT#28
2 2
+RTCVCC
3 3
1 2
R183 10K
+3V
1 2
R175 10K
1 2
R184 10K
1 2
R178 10K
+3VS
1 2
R386 100K
1 2
R436 10K
1 2
R356 @10K
12
R355 10K
1 2
R179 @10K
AC_SDOUT Strapping: "1" -> Safe Mode B oot
4 4
R168 100K
R169 10K
R404 10K
R405 10K
R407 1K
12
12
12
12
12
SPKR Strapping: "0" -> No Reboot
A
BATTLOW#
21
LID#
21
PBTN#
21
21
ICH_ACIN
21
EXT_SMI#
21
SCI#
21
ICH_RI#
21
12
C303
+R_VBAIS
1 2
C282
.047UF
12
R479
22M
CLKRUN# 17,20,23,28
R181
1 2
10M
R480
2.4M
1 2
R392
1 2
1K
C538
12PF
J1
JOPEN
1 2
R406 10M
32.768KHZ
12
IAC_BITCLK
USBP2USBP2+
USBP0USBP0+
CP5
8P4C-22PF
1 8
2 7
3 6
12
X3
12
C539
12PF
1 2
R158 @10K
12
R170
@33
C543
@33PF
RP41
1 8
2 7
3 6
4 5
8P4R-15
4 5
B
USB2_D- 25
USB2_D+ 25
USB0_D- 25
AA13
AB18
AA17
AA18
AA16
AB16
AB17
AA11
AB15
AB14
AA14
AB13
AB12
AB11
AA12
AB19
AA19
AB20
AA20
12
D14
W16
R20
W21
R21
W15
Y11
A15
C14
V21
Y17
T19
U19
V20
T20
T21
U22
T22
V22
P19
R19
P21
Y22
W22
N22
Y14
W14
L1
Y12
W12
Y13
W13
W17
Y18
W18
Y19
W19
Y20
Y21
W20
R408 22
R180 22
USB0_D+ 25
U33B
THRM#
GPO19
SLP_S3#
SLP_S5#
PWROK
PWRBTN#
RI#
RSMRST#
GPIO25
SUSCLK
GPI6
GPO18
GPO20
GPIO24
SUSSTAT#
INTRUDER#
SMBDATA
SMBCLK
SMBALERT#/GPI11
SMLINK0
SMLINK1
RTCRST#
VBIAS
RTCX1
RTCX2
AC_RST#
AC_SYNC
AC_BIT_CLK
AC_SDOUT
AC_SDIN0
AC_SDIN1
SPKR
GPI8
GPI7
GPI12
GPI13
GPO21
GPIO27
GPIO28
LAD0/FWH0
LAD1/FWH1
LAD2/FWH2
LAD3/FWH3
LDRQ0#
LDRQ1#
LFRAME#/FWH4
FSO
USBP0+
USBP0USBP1+
USBP1USBP2+
USBP2USBP3+
ICH-2
USBP3-
OC0#
OC1#
OC2#
OC3#
1 2
1 2
SYSTEM
AC97
GPIO
LPC
USB
ICH_AC_SYNC
ICH_AC_SDOUT
182736
45
RP40
8P4R-15K
ATF_INT#28
SLP_S3#28
SLP_S5#28
SYS_PWROK32
RSMRST#10,32
FLASH#29
RTCCLK17,18
SUS_STAT#12,23,31
SDAP47,11
SCKP47,11
IAC_RST#24,26 PDD[0..15] 22
IAC_BITCLK24,26
IAC_SDATAI26
IAC_SDATAI124
SPKR27
SM_SEL7
USB_EN#25
LAD023,28
LAD123,28
LAD223,28
LAD323,28
LDRQ#028
LDRQ#123
LFRAME#23,28
OVCUR#025
OVCUR#125
OVCUR#325
IAC_SYNC24,26
IAC_SDATAO24,26
B
ATF_INT#
SLP_S3#
SLP_S5#
SYS_PWROK
PBTN#
ICH_RI#
RSMRST#
BATTLOW#
INTRUDER#
SDAP4
SCKP4
ICH_ACIN
SMLINK0
SMLINK1
+RTCRST#
+VBIAS
RTCX1
RTCX2
ICH_AC_SYNC
IAC_BITCLK
ICH_AC_SDOUT
IAC_SDATAI
IAC_SDATAI1
SPKR
EXT_SMI#
DSCACHE#
SCI#
LID#
LAD0
LAD1
LAD2
LAD3
LDRQ#0
LDRQ#1
LFRAME#
USBP0+
USBP0USBP1+
USBP1USBP2+
USBP2USBP3+
USBP3-
OVCUR#2
OVCUR#3
12
C544
22PF
NOTE
C293
22PF
C
USBP3USBP3+
USBP1USBP1+
8P4C-22PF
GPO22
GPO23
VGATE/VRMPWRGD
CLK48
CLK14
CLK66
PDA0
PDA1
PDA2
PDCS1#
PDCS3#
PDREQ
PDDACK#
PDIOR#
PDIOW#
PIORDY
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
IDE
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
SDA0
SDA1
SDA2
SDCS1#
SDCS3#
SDDREQ
SDDACK#
SDIOR#
SDIOW#
SIORDY
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
C
RP44
1 8
2 7
3 6
4 5
U20
B14
A14
B15
P20
M19
D4
F20
F19
E22
E21
E19
G22
F22
G19
G21
G20
H19
H22
J19
J22
K21
L20
M21
M22
L22
L21
K22
K20
J21
J20
H21
H20
A16
D16
B16
C15
D15
B18
B17
D17
C17
A17
D18
B19
D19
A20
C20
C21
D22
E20
D21
C22
D20
B20
C19
A19
C18
A18
1 8
2 7
3 6
VGATE
CLK_USB_ICH
CLK_14M_ICH
CLK_HUB_ICH
8P4R-15
8P4R-15K
4 5
1 2
R478 0
PDA0
PDA1
PDA2
PDCS1#
PDCS3#
PDDREQ
PDDACK#
PDIOR#
PDIOW#
PDIORDY
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
SDA0
SDA1
SDA2
SDCS1#
SDCS3#
SDDREQ
SDDACK#
SDIOR#
SDIOW#
SDIORDY
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
CP6
TP0
RP43
R400 1K
1 2
182736
45
+3V
CLK_USB_ICH 11
CLK_14M_ICH 11
CLK_66M_ICH 11
PDA0 22
PDA1 22
PDA2 22
PDCS1# 22
PDCS3# 22
PDDREQ 22
PDDACK# 22
PDIOR# 22
PDIOW# 22
PDIORDY 22
PDD[0..15]
SDA0 21
SDA1 21
SDA2 21
SDCS1# 21
SDCS3# 21
SDDREQ 21
SDDACK# 21
SDIOR# 21
SDIOW# 21
SDIORDY 21
SDD[0..15]
D
ICH2-B(IDE,LPC,GPIO)
USB3_D- 25
USB3_D+ 25
USB1_D- 25
USB1_D+ 25
V_GATE 38
SDD[0..15] 21
PDIORDY
1 2
R416 4.7K
SDIORDY
1 2
R394 4.7K
CLK_USB_ICH CLK_14M_ICH CLK_HUB_ICH
12
R166
10
12
C270
10PF_0402
Compal Electronics, Inc.
Title
ICH2-B(IDE,LPC,GPIO)
Size Document Number Rev
B
ATR10 LA1251
Date: Sheet of
12
R162
10
12
C245
10PF_0402
D
+5VS
12
R149
10
12
C198
10PF
9 39Wednesday, December 26, 2001
0.5
A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.
AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF TH
E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE I
NFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF
COMPAL ELECTRONICS, INC.
PROPRIETARY
B
C
D
ICH2-C(LAN,Power)
+1_8VS
AA21
AA22
AB21
AB22
U33C
D10
VCC1_8_1
E5
VCC1_8_2
K19
VCC1_8_3
L19
VCC1_8_4
P5
VCC1_8_5
V9
VCC1_8_6
D2
VCC1_8_7
A1
GND1
A2
GND2
A10
GND3
B1
GND4
B2
GND5
B3
GND6
B9
GND7
B10
GND8
C2
GND9
C3
GND10
C4
GND11
C9
GND12
D5
GND13
D6
GND14
D7
GND15
D8
GND16
D9
GND17
E6
GND18
E7
GND19
E8
GND20
E9
GND21
J10
GND22
J11
GND23
J12
GND24
J13
GND25
J14
GND26
J9
GND27
K10
GND28
K11
GND29
K12
GND30
K13
GND31
K14
GND32
K9
GND33
L10
GND34
L11
GND35
L12
GND36
L13
GND37
L14
GND38
L9
GND39
M10
GND40
M11
GND41
M12
GND42
M13
GND43
M14
GND44
M9
GND45
N10
GND46
N11
GND47
N12
GND48
P9
GND49
P14
GND50
P13
GND51
P12
GND52
P11
GND53
P10
GND54
N9
GND55
N14
GND56
N13
GND57
A21
GND58
A22
GND59
B21
GND60
B22
GND61
AA1
GND62
AA2
GND63
GND64
GND65
AB1
GND66
AB2
GND67
GND68
GND69
K1
GND70
D3
GND71
ICH-2
VCC3_3_1
VCC3_3_2
VCC3_3_3
VCC3_3_4
VCC3_3_5
VCC3_3_6
VCC3_3_7
VCC3_3_8
VCC3_3_9
VCC3_3_10
VCC3_3_11
VCC3_3_12
VCC3_3_13
VCC3_3_14
VCC3_3_15
VCC3_3_16
VCC3_3_17
VCC3_3_18
V5REF1
V5REF2
VCCSUS1_8_1
VCCSUS1_8_2
VCCSUS1_8_3
VCCSUS1_8_4
VCCSUS1_8_5
VCCSUS3_3_1
VCCSUS3_3_2
VCCSUS3_3_3
VCCSUS3_3_4
VCCSUS3_3_5
VCCSUS3_3_6
V_CPU_IO_1
V_CPU_IO_2
VCCRTC
V5REF_SUS
EEPROM
EE_CS
EE_SHCLK
EE_DOUT
EE_DIN
LAN
LAN_CLK
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
LAN_RSTSYNC
RSM_PWROK
1 1
2 2
+3V
12
12
12
12
12
C216
.1UF_0402
12
C247
+
4.7UF_10V_0805
3 3
12
C230
.1UF_0402
12
C231
.1UF_0402
C250
.1UF_0402
12
C208
+
4.7UF_10V_0805
+1_8V
12
C227
.1UF_0402
12
C238
.1UF_0402
C251
.1UF_0402
12
C244
.1UF_0402
12
C209
.1UF_0402
CPU_VCC
12
C242
.1UF_0402
12
12
C229
.1UF_0402
C243
.1UF_0402
C221
.1UF_0402
C212
.1UF_0402
12
C253
.1UF_0402
12
C213
.1UF_0402
12
C252
.1UF_0402
12
C249
.1UF_0402
12
C224
.1UF_0402
12
C214
1000PF_0402
12
C246
1000PF_0402
+3VS
+1_8VS
12
C215
1000PF_0402
12
C225
1000PF_0402
+3VS
E14
E15
E16
E17
E18
F18
G18
H18
J18
P18
R18
R5
T5
U5
V5
V6
V7
V8
+VCC5REF
K2
M20
V14
V15
V16
H5
J5
T18
U18
F5
G5
V17
V18
D12
D13
U21
V19
K4
J3
J4
K3
R353 @10K
G3
G2
G1
H1
LANTXD0
F3
LANTXD1
F2
LANTXD2
F1
H2
Y16
+1_8V
+3V
CPU_VCC
VCCRTC
+3V
LAN_EECS
LAN_EECLK
LAN_EEDI
LAN_EEDO
1 2
LAN_CLK
R100 33
1 2
R101 33
1 2
R102 33
1 2
R99 33
1 2
1 2
R167 0
LAN_CLK
1
2
3
4
1 2
R182 1K
C540 .1UF
U29
CS
SK
DI
DO
9346
1SS355
12
C197
1UF_0805
1 2
8
VCC
7
NC
6
NC
5
GND
LAN_RST 19
RSMRST# 9,32
12
R86
@33
12
C136
@22PF
+3VS
21
D12
12
C292
.1UF
+RTCVCC
LAN_CLK 19
LAN_RXD0 19
LAN_RXD1 19
LAN_RXD2 19
LAN_TXD0 19
LAN_TXD1 19
LAN_TXD2 19
+5VS
12
R140
1K
+3V
12
C476
.1UF
4 4
Compal Electronics, Inc.
Title
ICH2-C(LAN,Power) & Pull-Up
Size Document Number Rev
B
ATR10 LA1251
Date: Sheet of
D
10 39Wednesday, December 26, 2001
A
NOTE
B
C
0.5
A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.
AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF TH
E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE I
NFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF
COMPAL ELECTRONICS, INC.
PROPRIETARY
Width=40
CPUCLKC[0.
CPUCLKT[0.
B
C
D
E
F
G
H
Clock Generator
+3VS
1 1
+3VS +3VS
12
12
R328
1K
BSEL02
+3VS
1 2
+3VS
R338 10K
1
2 2
CPU_VCC
1 2
R346 220
C
2
B
E
3
SDAP47,9
SCKP47,9
CLK_USB_ICH9
C169 10PF
R326
1K
1 2
R323 1K
R339 1K
1 2
R317 1K
1 2
R327 1K
1 2
Q40
2SC2411K
+3VS
R321 4.7K
1 2
+3V
+3V
R322 4.7K
R324 220
1 2
R107 22
1 2
1 2
1 2
C176
10PF
R325 10K
1 2
1 2
XTALIN
12
XTALOUT
Y2
14.318MHZ
L11
CHB2012U121
1 2
L12
CHB2012U121
1 2
2
40
55
54
25
34
53
28
43
29
30
33
35
42
39
38
R109 33
CLK_14M_ICH9
14.3M_SIO23
3 3
12
C133
1 2
1 2
R110 33
56
@10PF
U9
XTAL_IN
SEL2
SEL1
SEL0
PWR_DWN#
PCI_STOP#
CPU_STOP#
VTT_PWRGD#
MULT0
SDATA
SCLK
3V66_0/DRCG
3V66_1/VCH_CLK
IREF
48MHZ_USB
48MHZ_DOT
REF
ICS950805
+3V_CLK
181419323746
VDD_PCI
VDD_REF
GND_REF
GND_PCI
491520313641
mils
+
VDD_PCI
VDD_CPU
VDD_3V66
VDD_3V66
VDD_48MHZ
66MHZ_OUT2/3V66_4
66MHZ_OUT1/3V66_3
66MHZ_OUT0/3V66_2
GND_PCI
GND_3V66
GND_3V66
GND_48MHZ
GND_IREF
12
C139
22UF_16V_1206
50
VDD_CORE
VDD_CPU
GND_COREXTAL_OUT
CPUCLKT2
CPU_CLKC2
CPUCLKT1
CPUCLKC1
CPUCLKT0
CPUCLKC0
66MHZ_IN/3V66_5
PCICLK_F2
PCICLK_F1
PCICLK_F0
PCICLK6
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK0
GND_CPU
47
26
273
45
44
49
48
52
51
24
23
22
21
7
6
5
18
17
16
13
12
11
10
CLK_BCLK#
12
12
C140
.01UF_0402
+3V_VDD
12
C175
.01UF_0402
CLK_BCLK
CLK_MCH
CLK_MCH#
66M_MCH
R131 33
1 2
R134 33
1 2
R133 33
1 2
R132 33
1 2
R122 33
1 2
12
C142
C141
.01UF_0402
.01UF_0402
L14
CHB2012U121
1 2
12
+
C177
22UF_16V_1206
R105 27
1 2
R106 27
1 2
R103 27
1 2
R104 27
1 2
R125 33
1 2
R124 33
1 2
R123 33
1 2
12
12
C172
C143
.01UF_0402
.01UF_0402
+3VS
1 2
R87 49.9_1%
R88 49.9_1%
1 2
1 2
R89 49.9_1%
R90 49.9_1%
1 2
12
C157
.01UF_0402
12
C182
@10PF
12
C174
.01UF_0402
12
C183
@10PF
12
C171
.01UF_0402
HCLK_CPU 2
HCLK_CPU# 2
CLK_HMCH 4
CLK_HMCH# 4
12
C184
@10PF
CLK_66M_AGP 12
CLK_66M_ICH 9
CLK_66M_MCH 4
PCLK_ICH 8
PCLK_PCM 17
PCLK_SIO 23
PCLK_EC 28
PCLK_MINI 20
SEL2 SEL1 SEL0
0 0 0 66.67 66.67
0 0 1 100.00 100.00
0 1 0 200.00 200.00
0 1 1 133.33 133.33
4 4
A
.2]
.2]
Compal Electronics, Inc.
Title
NOTE
B
C
D
E
F
Clock Generator
Size Document Number Rev
B
ATR10 LA1251
Date: Sheet of
G
11 39Wednesday, December 26, 2001
H
0.5
1
2
3
4
5
6
7
8
GAD[0:31]4
A A
GC/BE#[0:3]4
CLK_66M_AGP11
R40
@0
R41
0
FREQOUT
GREQ#4
GGNT#4
PIRQA#8,17,20
GPAR4
GSTOP#4
GDEVSEL#4
GTRDY#4
GIRDY#4
GFRAME#4
PCIRST#4,8,17,18,20,22,23,28,31
RBF#4
AD_STB04
AD_STB0#4
AD_STB14
AD_STB1#4
ST04
ST14
ST24
SBA[0:7]4
SBSTB4
SBSTB#4
AGPREF4
1 2
R494 22
1 2
R46 120
B B
+3V_VGA
L47
BLM21P300S_0805
12
C102
C602
10UF_1206
C C
D D
.1UF
12
12
R43
R44
0
@0
12
12
R42
R45
@0
@0
+3V_VGA
2
U6
VDD
1
X1/CLK
CLK
6
12
C93
.1UF
PD#S0
S1
LEE
GND
MK1709
3
12
R64
10K
X1
4
VDD
1
ST
OSC_27MHz
12
4
87
5
12
3
OUT
2
GND
GAD[0:31]
GC/BE#[0:3]
+3VS
+3VS
SBA[0:7]
(10 mil)
C158 .1UF
12
R54
@20K
12
R47
150
1 2
R4910
1 2
C393 10PF
1 2
1 2
R115 47_1%
1 2
1 2
R53 0
1 2
12
R37
@20K
12
C75
@15PF
COMPS16
LCD_CLK16
LCD_DATA16
R52
1 2
845_1%
GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31
GC/BE#0
GC/BE#1
GC/BE#2
GC/BE#3
GREQ#
GGNT#
GINTA#
GPAR
GSTOP#
GDEVSEL#
GTRDY#
GIRDY#
GFRAME#
1 2
R7220K
RBF#
R6820K
ADSTBA
ADSTBA#
ADSTBB
ADSTBB#
ST0
ST1
ST2
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
SBSTB
SBSTB#
OSCLIN
1 2
R55 1K
CRMA16
LUMA16
R2SET
R30110
Divider circuit for 1.8Vdc XTALIN from 3.3Vdc OSC out
1
2
3
4
AA25
AA24
AA23
AA26
W24
AB25
AB26
W26
W25
AF25
AF26
AF16
AF15
AF14
AE14
AF13
AE16
D24
C26
D25
D26
E23
E25
E24
E26
F26
G23
G25
G24
G26
H24
H26
H25
L23
L26
L24
M26
M24
N25
M25
N26
P23
P26
P24
R25
R24
R26
T23
T25
F23
J25
L25
N23
Y24
J23
J24
J26
K24
K26
K25
F25
F24
P25
N24
Y26
Y23
Y25
V24
V26
V23
U26
U24
T26
T24
V25
U25
C25
B26
AE6
AE7
AC6
AF6
AF7
U8A
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE#0
C/BE#1
C/BE#2
C/BE#3
REQ#
GNT#
INTA#
PAR
STOP#
DEVSEL#
TRDY#
IRDY#
FRAME#
RST#
PCICLK
SERR#
STP_AGP#
AGP_BUSY#
RBF#
AD_STB0
ADSTRB0#
AD_STB1
ADSTRB1#
ST0
ST1
ST2
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
SB_STB
SB_STB#
AGPTEST
AGPREF
SSIN
SSOUT
XTALIN
XTALOUT
TESTEN
Y3
ROMCS#
C_R
Y_G
COMP_B
H2SYNC
V2SYNC
CRT2DDCCLK
CRT2DDCDATA
R2SET
M6-P
PCI/AGP HOST BUS INTERFACECLK
SSCDAC2
GPIO / ROM
ZV_LCDDATA0
ZV_LCDDATA1
ZV_LCDDATA2
ZV_LCDDATA3
ZV_LCDDATA4
ZV_LCDDATA5
ZV_LCDDATA6
ZV_LCDDATA7
ZV_LCDDATA8
ZV_LCDDATA9
ZV_LCDDATA10
ZV_LCDDATA11
ZV_LCDDATA12
ZV_LCDDATA13
ZV_LCDDATA14
ZV_LCDDATA15
ZV_LCDDATA16
ZV_LCDDATA17
ZV_LCDDATA18
ZV_LCDDATA19
ZV_LCDDATA20
ZV_LCDDATA21
ZV_LCDDATA22
ZV_LCDDATA23
ZV PORT / EXT TMDSLVDSTMDSDAC
ZV_LCDCNTL0
ZV_LCDCNTL1
ZV_LCDCNTL2
ZV_LCDCNTL3
DVIDDCDATA
VGADDCDATA
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P
TXOUT_L3N
TXOUT_L3P
TXCLK_LN
TXCLK_LP
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P
TXCLK_UN
TXCLK_UP
LTGIO0
LTGIO1
LTGIO2
DIGON
BLON#
TX0M
TX0P
TX1M
TX1P
TX2M
TX2P
TXCM
TXCP
DVIDDCCLK
HPD
HSYNC
VSYNC
VGADDCCLK
MONID0
MONID1
SUS_STAT#
AUXWIN
RSET
5
Y2
Y1
W3
W2
W1
V4
V3
V2
V1
U3
U2
U1
T4
T3
AA4
AB1
AB2
AB3
AB4
AC1
AC2
AC3
AD1
AD2
AD3
AE1
AE2
AF1
AF2
AF3
AE3
AF4
AE4
AD4
AF5
AE5
AD5
AC5
Y4
AA1
AA2
AA3
AC8
AD8
AC9
AD9
AE8
AF8
AC10
AD10
AE9
AF9
AD11
AC11
AE11
AF11
AD12
AC12
AD13
AE13
AE12
AF12
AD7
AD6
AC7
AB10
AB9
AE19
AF19
AE20
AF20
AE21
AF21
AE18
AF18
AD20
AC20
AD21
AF24
R
AF23
G
AF22
B
AE24
AE23
AC25
AC26
AD24
AD25
AE25
AC22
AE22
Option Strap Pins
GPIO0
R71 @10K
GPIO1
R70 @10K
GPIO2
R74 @10K
GPIO3
R75 @10K
ENVDD
BLON#
DDCSCL
DDCSDA
M_SEN#
R49 0
1 2
R51 10K
1 2
RSET
1 2
(10 mil)(10 mil)
1 2
1 2
1 2
1 2
TXOUT0- 16
TXOUT0+ 16
TXOUT1- 16
TXOUT1+ 16
TXOUT2- 16
TXOUT2+ 16
TXCLKO- 16
TXCLKO+ 16
TZOUT0- 16
TZOUT0+ 16
TZOUT1- 16
TZOUT1+ 16
TZOUT2- 16
TZOUT2+ 16
TZCLKO- 16
TZCLKO+ 16
R 16
G 16
B 16
HSYNC1 16
VSYNC1 16
499_1%
R50
SUS_STAT#
6
Strap-G
Strap-H
Strap-J
Strap-K
M_SEN# 16
DDC_MD2 16
+3V_VGA
+3V_VGA
ENVDD 16
BLON# 16
DDC_CLK 16
DDC_DATA 16
SUS_STAT# 9,23,31
HOST INTERFACE
SUS_STAT#
1 2
R48 10K
Compal Electronics, Inc.
Title
ATI Mobility M6-P HOST INTERFACE
Size Document Number Rev
Custom
ATR10 LA1251
Date: Sheet of
7
+3V
12 39Wednesday, December 26, 2001
8
0.5
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