Compal LA-1081 Schematics
COMPAL CONFIDENTIAL
MODEL NAME : 888M1 LA-1081
REV:1.0
CRT & TV-OUT
PAGE 13
Coppermine
uBGA2/uPGA2
CPU
PAGE 2,3
PSB
CLOCK
ICS925AG-31
PAGE 11
KB/PS2 Interface
INTERNAL IDE
IDE/CD
/FDD
PAGE 20
Smart
Media
PAGE 21
USB/BlueTooth
FIR/LPT
PORT
VGA Board Connector
PIRQA#
Direct CD
Play
PAGE 19
PAGE 24
LPC 47N227
PAGE 23
PAGE 12
HUB Link
PCI BUS
ICH2-M
FUNC 0: LAN, HUB-TO-PCI ,
PCI-TO-LPC BRIDGE
FUNC 1: IDE Controller
FUNC 2: USB Controller #1
FUNC 3: POWER MANAGEMENT
FUNC 4: USB Controller #2
FUNC 5: AC97 Audio Controller
FUNC 5: AC97 Modem Controller
LPC
SIO
PAGE 22
PAGE 8,9,10
LPC
EC/KBC
PC87591
BIOS
EC BUFFER
GMCH2-M
Host-HUB Bridge
Internal GFX
1394 Controller
TAB43AB22
AC LINK
AC97 Codec
PAGE 27
PAGE 28 PAGE 30
PROPRIETARY NOTE
PAGE 25 PAGE 26
Switchs &
Connectors
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
IDSEL: AD11
IDSEL: AD13
PAGE 4,5,6
IDSEL: AD26
MASTER 2
PIRQC#
PAGE 17
MDC
Connector
PAGE 12
AMP &
Audio Jack
MEMORY BUSAGP BUS
CARDBUS
PCI1420
PCMCIA
SOCKET
SODIMM X2
-BANK 2,3,4,5
IDSEL: AD16
MASTER 3
PIRQA#, PIRQB#
SIRQ
PAGE 14
PAGE 15
PAGE 7
IDSEL: AD23
MASTER 1
PIRQD#
LAN Controller
RTL8139C
PAGE 16
Title
Size Document Number Rev
Date: Sheet of
POWER
INTERFACE
Mini PCI
Connector
DC/DC POWER
+1.5V POWER
+1.8V POWER
+3VALW POWER
+5VALW POWER
+12VALW POWER
CPU_CORE POWER
PAGE 32,33,34,35,36,37
Compal Electronics, Inc.
888M1 COVER SHEET
B
888M1
PAGE 29
IDSEL: AD27
MASTER 0
PIRQA#,
PIRQD#
PAGE 18
1 38Tuesday, April 24, 2001
1.0
A
CPU_IO
1 2
R256 56.2_1%_0603
1 2
R235 1.5K
1 2
R229 1.5K
1 2
R233 1.5K
1 2
R195 1.5K
4 4
R196 @56.2_1%_0603
R227 10K
R224 @10K
R223 0
+2.5V_CLK
1 2
R252 1.5K
1 2
3 3
R243 10
1 8
2 7
3 6
4 5
2 2
1 1
CPURST#
FLUSH#
FERR#
CPUSLP#
ITP_PREQ#
GTL_PRDY#
12
SELPSB0
12
SELPSB1
12
12
CPU_PWRGD
BREQ0#
RP4
ITP_TDI
ITP_TMS
ITP_TCK
ITP_TRST#
8P4R-1K
SELPSB[1:0] STSEM BUS FREQUENCY
00
01
10
11
66MHZ
100MHZ
RESERVED
133MHZ
A
HA#[3..31]4
HREQ#04
HREQ#14
HREQ#24
HREQ#34
HREQ#44
ADS#4
BPRI#4
BNR#4
HLOCK#4
HIT#4
HITM#4
DEFER#4
HTRDY#4
RS#04
RS#14
RS#24
A20M#8
FERR#8
IGNNE#8
CPU_PWRGD8
SMI#8
INTR8
NMI8
STPCLK#8
CPUSLP#8
HA#[3..31]
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
IERR#
BREQ0#
A20M#
FERR#
IGNNE#
CPU_PWRGD
SMI#
ITP_TDI
ITP_TMS
ITP_TRST#
ITP_TCK
ITP_PREQ#
GTL_PRDY#
SELPSB0
SELPSB1
INTR
NMI
STPCLK#
CPUSLP#
THERMDA
THERMDC
AA21
W21
W19
AD10
AC12
AC13
AB10
AC15
AD13
AD14
AA14
AA11
AB20
W20
AA12
AB15
AB18
AC19
AC11
AB12
AA15
AB16
AB2
AA1
AB1
V21
AD9
Y21
AA2
L3
K3
J2
L4
L1
K5
K1
J1
J3
K4
G1
H1
E4
F1
F4
F2
E1
C4
D3
D1
E2
D5
D4
C3
C1
B3
A3
B2
C2
A4
A5
B4
C5
T2
V4
V2
W3
W5
W2
Y2
E6
C6
U4
T4
R1
V1
Y4
U3
U2
U1
W1
Y1
V5
U7A
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
RP#
ADS#
AERR#
AP0#
AP1#
BERR#
BINIT#
IERR#
BREQ0#
BPRI#
BNR#
LOCK#
HIT#
HITM#
DEFER#
BP2#
BP3#
BPM0#
BPM1#
TRDY#
RS0#
RS1#
RS2#
RSP#
A20M#
FERR#
IGNNE#
PWRGOOD
SMI#
TDO
TDI
TMS
TRST#
TCK
PREQ#
PRDY#
SELPSB0
SELPSB1
INTR/LINT0
NMI/LINT1
STPCLK#
SLP#
THERMDA
THERMDC
MICRO-PGA
B
B
COPPERMINE
REQUEST
PHASE
SIGNALS
ERROR
SIGNALS
ARBITRATION
PHASE
SIGNALS
SNOOP PHASE
SIGNALS
RESPONSE
PHASE
SIGNALS
PC
COMPATIBILITY
SIGNALS
DIAGNOSTIC
& TEST
SIGNALS
EXECUTION
CONTROL
SIGNALS
THERMAL DIODE
PROPRIETARY NOTE
DATA
PHASE
SIGNALS
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DEP0#
DEP1#
DEP2#
DEP3#
DEP4#
DEP5#
DEP6#
DEP7#
DBSY#
DRDY#
C
HD#[0..63]
HD#0
D10
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D11
C7
C8
B9
A9
C10
B11
C12
B13
A14
B12
E12
B16
A13
D13
D15
D12
B14
E14
C13
A19
B17
A18
C17
D17
C18
B19
D18
B20
A20
B21
D19
C21
E18
C20
F19
D20
D21
H18
F18
J18
F21
E20
H19
E21
J20
H21
L18
G20
P18
G21
K18
K21
M18
L21
R19
K19
T20
J21
L20
M19
U18
R18
V20
T21
U21
R21
V18
P21
P20
U19
AA3
T1
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
HD#[0..63] 4
17V/16V#22
DBSY# 4
DRDY# 4
R323
@10K
2200PF
+5VS
+5VS
1 2
1K
R330
1 2
12
C15
1 2
R12 1K
@1K
R325
1 2
D38
RB751V
12
THERMDA
THERMDC
1K
R324
1 2
21
C14
.1UF
1K
R302
1 2
D
1617VCC
U3
1
NC
2
VCC
3
DXP
SMBCLK
4
DXN
5
NC
SMBDATA
6
ADD1
7
8 9
CPU_VID3
1 2
Q77
2N7002
ALERT
GND
GND NC
MAX1617/MAX6654
+5VS
CPU_VID0
CPU_VID1
CPU_VID2 VID2
CPU_VID3
CPU_VID4 VID4
1K
R304
13
2
For 1GHz CPU
R200 1K
CPUINIT#
FLUSH#
CPURST#
C
1 2
R265
10
1 2
12
C373
10PF
CPUINIT# 8
CPURST# 4
HCLK_CPU 11
D
AA18
PICCLK
Y20
PICD1
AB21
PICD0
AA10
INIT#
AC9
FLUSH#
A6
RESET#
M3
BCLK
AA16
EDGCTRLN
R219
110_1%_0603
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
E
+5VS
12
R11
200
16
NC
15
STBY
ADD0
10
NC
6
7
8
9
14
13
12
ATF#
11
10
RP34
10P8R-10K
4 5
8 9
14 15
18 19
22 23
1
5
4
3
2
1
EC_SMC2 19,27,34
EC_SMD2 19,27,34
12
R174
1K
+5VS
+5VS
1 2
R326 10K
U44
B0 D0
B1 D1
B2 D2
B3 D3
B4 D4
BE#
SN74CBT3383
VR_HI/LO#
CPU_VID[0..4]
C0A0
C1A1
C2A2
C3A3
C4A4
VCC
GNDBX
CPU_VID4
CPU_VID2
CPU_VID1CPU_VID0
VID[0..4]
VID0
23
VID1
67
1011
VID3
1617
2021
24
1213
VR_HI/LO# 9,37
+5VS
12
C436
.1UF
VID[4..0]
0 0 0 0 1
0 000
0
0
0
0
0
0
0
*
0
00
*
1 1
0
1
0
1
0 0 0 0
0
1
1 1
0
1
0 0
1 1
0
11
1 1 1
00
1
0
1 11
0
0 1 1 0 0
1 1 1
0
*
0
0
111
Compal Electronics, Inc.
Title
Mobile Coppermine Processor in Micro-PGA2
Size Document Number Rev
888M1 1.0
B
Date: Sheet of
E
CPU_VID[0..4] 3
VID[0..4] 37
2.00
00000
1.95
1.90
1.85
1.80
1.75
0
1.70
1.65
1.60
1.55
0
1.50
1.45
1.40
1.35
0
1.30
2 38Tuesday, April 24, 2001
V01234
A
+ C91
33U_D
12
C250
.1UF
12
C364
.1UF
CPU_IO
R207
56.2_1%_0603
1 2
VCCT_VCCA
VCCT_VSSA
VCCTREF
12
C357
.1UF
CPU_CORE
12
12
12
C356
C226
.1UF
4.7U_0805
CLKREF
CMOSREF
R218 1.5K
R245
1K
1 2
C362
.1UF
U7B
L2
VCCA
M2
VSSA
E5
VREF0
E16
VREF1
E17
VREF2
F5
VREF3
F17
VREF4
U5
VREF5
Y17
VREF6
Y18
VREF7
H8
VCC0
H10
VCC1
H12
VCC2
H14
VCC3
H16
VCC4
J7
VCC5
J9
VCC6
J11
VCC7
J13
VCC8
J15
VCC9
K8
VCC10
K10
VCC11
K12
VCC12
K14
VCC13
K16
VCC14
L7
VCC15
L9
VCC16
L11
VCC17
L13
VCC18
L15
VCC19
M8
VCC20
M10
VCC21
M12
VCC22
M14
VCC23
M16
VCC24
N7
VCC25
N9
VCC26
N11
VCC27
N13
VCC28
N15
VCC29
P8
VCC30
P10
VCC31
P12
VCC32
P14
VCC33
P16
VCC34
R7
VCC35
R9
VCC36
R11
VCC37
R13
VCC38
R15
VCC39
T8
VCC40
T10
VCC41
T12
VCC42
T14
VCC43
T16
VCC44
U7
VCC45
U9
VCC46
U11
VCC47
U13
VCC48
U15
VCC49
AB19
RSVD
P2
CLKREF
AA9
CMOSREF1
AD18
CMOSREF2
R2
GHI#
AD19
RTTIMPEDP
AD17
12
TESTHI
Y5
TESTLO1
N5
TESTLO2
AD20
TESTP1
H4
TESTP2
AA17
TESTP3
G4
TESTP4
R247
1K
1 2
MICRO-PGA
CPU_IO
1 2
L3 4.7Uh
VCCTREF
1 2
CPU_IO
R208
4 4
3 3
1K_1%_0603
R199
2K_1%_0603
12
+2.5V_CLK+2.5V_CLK
R246
1.5K_1%_0603
1 2
2 2
R238
12
C235
12
.1UF
1 2
1K_1%_0603
C320
.1UF
R268
2K_1%_0603
1 2
R269
1 2
2K_1%_0603
IST_CPU_PERF#9
1 1
A
B
PLL ANALOG VOLTAGE
COPPERMINE
POWER,
GROUND,
RESERVED
SIGNALS
B
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
A2
A7
A8
A12
A21
B1
B5
B6
B7
B8
B10
B15
B18
C9
C11
C15
C16
C19
D2
D6
D7
D9
E3
E7
E8
E9
E10
E11
E13
E19
F3
F6
F7
F8
F9
F10
F11
F12
F13
F14
F15
F16
F20
G3
G19
H2
H7
H9
H11
H13
H15
H20
J4
J8
J10
J12
J14
J16
J19
K2
K7
K9
K11
K13
K15
K20
L5
L8
L10
L12
L14
L16
L19
M7
M9
M11
M13
M15
M20
N2
N3
N4
N8
N10
N12
N14
N16
N18
N19
N20
P5
P7
P9
P11
P13
P15
P19
R3
R4
R5
R8
R10
12
C276
.1UF
CPU_CORE
12
C259
.1U
CPU_CORE
12
C324
.1U
CPU_CORE
12
C271
.1U
CPU_CORE
12
C280
.1U
CPU_CORE
12
C311
.1U
CPU_CORE
12
C22
2.2U_0805
CPU_CORE
+ C92
CPU_CORE
+ C7
220U_E
6.3V
220U_E
6.3V
12
12
12
12
12
12
12
C264
.1UF
C291
.1UF
C269
.1U
C316
.1U
C279
.1U
C287
.1U
C303
.1U
12
C282
.1UF
12
C306
.1UF
12
C277
.1U
12
C308
.1U
12
C286
.1U
12
C295
.1U
12
C40
2.2U_0805
+ C93
220U_E
6.3V
+ C6
220U_E
6.3V
12
.1UF
12
.1UF
+ C64
12
12
12
.1U
12
.1U
12
.1U
C297
C246
220U_E
C294
C302
C296
C
C284
.1U
C300
.1U
12
C67
2.2U_0805
C
12
C312
.1UF
12
C247
.1UF
12
C292
.1U
12
C293
.1U
12
C301
.1U
12
C310
.1U
12
C288
.1U
+ C94
CPU_IO
220U_E
6.3V
12
C328
.1UF
12
C248
.1UF
12
C349
.1UF
12
C299
.1U
12
C285
.1U
12
C309
.1U
12
C318
.1U
12
C281
.1U
12
C23
2.2U_0805
PROPRIETARY NOTE
12
12
C345
C344
.1UF
.1UF
12
12
C249
C245
.1UF
.1UF
12
12
C307
.1U
12
C278
.1U
12
12
C317
C325
.1U
.1U
12
12
C326
C335
.1U
.1U
12
12
C273
C263
.1U
.1U
12
C60
2.2U_0805
+ C4
220U_E
6.3V
C315
.1U
G10
G11
G12
G13
G14
G15
G16
G17
H17
K17
M17
N17
P17
R17
T17
U17
AA6
AA7
AA8
AB6
AB7
AB8
AC6
AC7
AC8
AD6
AD7
AD8
G6
G7
G8
G9
H6
J6
J17
K6
L6
L17
M6
N6
P1
P6
R6
T6
U6
V6
V7
V8
V9
V10
V11
V12
V13
V14
V15
V16
V17
W6
W7
W8
W9
Y6
Y7
Y8
U7C
VCCT0
VCCT1
VCCT2
VCCT3
VCCT4
VCCT5
VCCT6
VCCT7
VCCT8
VCCT9
VCCT10
VCCT11
VCCT12
VCCT13
VCCT14
VCCT15
VCCT16
VCCT17
VCCT18
VCCT19
VCCT20
VCCT21
VCCT22
VCCT23
VCCT24
VCCT25
VCCT26
VCCT27
VCCT28
VCCT29
VCCT30
VCCT31
VCCT32
VCCT33
VCCT34
VCCT35
VCCT36
VCCT37
VCCT38
VCCT39
VCCT40
VCCT41
VCCT42
VCCT43
VCCT44
VCCT45
VCCT46
VCCT47
VCCT48
VCCT49
VCCT50
VCCT51
VCCT52
VCCT53
VCCT54
VCCT55
VCCT56
VCCT57
VCCT58
VCCT59
VCCT60
VCCT61
VCCT62
VCCT63
VCCT64
VCCT65
VCCT66
VCCT67
VCCT68
VCCT69
VCCT70
VCCT71
MICRO-PGA
D
COPPERMINE
POWER, GROUND AND NC
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VID4
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VID3
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VID0
VID1
VID2
VSS159
VSS160
VSS161
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
NC19
NC20
NC21
NC22
NC23
NC24
R12
R14
R16
R20
T3
T5
T7
T9
T11
T13
T15
T18
T19
U8
U10
U12
U14
U16
U20
V3
V19
W4
W18
Y3
Y9
Y10
Y11
Y12
Y13
Y14
Y15
Y16
Y19
AA4
AA13
AA20
AB3
AB4
AB5
AB9
AB11
AB13
AB14
AB17
AC1
AC2
AC4
AC5
AC10
AC14
AC16
AC18
AC21
AD1
AD2
AD3
AD4
AD5
AD16
AD21
A15
A16
A17
C14
D8
D14
D16
E15
G2
G5
G18
H3
H5
J5
M4
M5
P3
P4
AA5
AA19
AC3
AC17
AC20
AD15
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
CPU_IO
12
12
12
C343
C258
C342
.1UF
.1UF
.1UF
CPU_IO
12
12
C321
C348
.1UF
.1UF
CPU_CORE
12
12
12
C332
C333
C323
.1U
.1U
.1U
12
12
12
C270
C260
C261
.1U
.1U
.1U
12
12
12
C334
C262
C272
12
.1U
C319
.1U
W10
W11
W12
W13
W14
W15
W16
W17
.1U
12
C336
.1U
12
C374
.1U
12
C327
.1U
2.2U_0805
12
12
C20
C47
2.2U_0805
2.2U_0805
+ C8
+ C9
220U_E
6.3V
220U_E
6.3V
CPU_VID4
CPU_VID3
CPU_VID0
CPU_VID1
CPU_VID2
E
CPU_VID[0..4]2
Compal Electronics, Inc.
Title
Mobile Coppermine Processor in Micro-BGA2
Size Document Number Rev
888M1 1.0
B
D
Date: Sheet of
E
CPU_VID[0..4]
3 38Tuesday, April 24, 2001
A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.
AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF TH
E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE I
NFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF
COMPAL ELECTRONICS, INC.
PROPRIETARY
B
C
D
E
GMCH2-M-1/3(GTL+,AGP,HUB)
HD#[0..63]2
1 1
2 2
3 3
CPU_IO
4 4
HD#[0..63] HA#[3..31]
U6A
HD#0
AA1
12
R230
1K_1%_0603
12
R231
2K_1%_0603
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
C267
.1UF
AD11
AD10
AF12
AB11
AB10
AC10
AF10
AD14
AD12
AB12
AE11
AE15
AF11
AF13
AB14
AF14
AB13
AB15
AE13
AC14
AD13
AD15
AF16
AF15
AC12
HD#0
AB2
HD#1
AF2
HD#2
AD4
HD#3
AB1
HD#4
AB3
HD#5
AA3
HD#6
AC4
HD#7
AC1
HD#8
AF3
HD#9
AD1
HD#10
AE3
HD#11
AD2
HD#12
AD3
HD#13
AF1
HD#14
AA4
HD#15
AD6
HD#16
AC3
HD#17
AE1
HD#18
AB6
HD#19
AF4
HD#20
AE5
HD#21
AC8
HD#22
AB5
HD#23
AF5
HD#24
AC6
HD#25
AF6
AF8
AD8
AD5
AB7
AF7
AD7
AB8
AE7
AE9
AB9
AF9
AD9
HOST
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
GMCH2v0
+GTLREF
C230
.1UF
A
GTLREFA
GTLREFB
CPURST#
HCLKIN
RSTIN#
HLOCK#
DEFER#
ADS#
BNR#
BPRI#
DBSY#
DRDY#
HITM#
HTRDY#
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
RS#0
RS#1
RS#2
HA#[3..31] 2
U6
AA10
+GTLREF
AA7
H3
AA5
L4
M3
G1
N4
M5
J3
J1
K1
HIT#
L3
K3
R4
P1
T2
R3
N5
P5
R1
U1
P2
T1
T3
P3
T5
R5
V5
Y2
V3
W1
U4
V2
W3
W4
U5
Y5
Y3
U3
Y1
W5
V1
M1
N1
M2
L5
N3
K2
L1
H1
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
RS#0
RS#1
RS#2
CPURST# 2
HLOCK# 2
DEFER# 2
ADS# 2
BNR# 2
BPRI# 2
DBSY# 2
DRDY# 2
HIT# 2
HITM# 2
HTRDY# 2
R205
HREQ#[0..4]
RS#[0..2]
B
@33
1 2
74LVC125
C251 @18PF
HCLK_GMCH 11
U18D
+3V POWER
HREQ#[0..4] 2
RS#[0..2] 2
13
1211
PCIRST# 8,12,14,15,16,17,18,20,22,27,30
NOTE
GAD[0..31]12
GC/BE#012
GC/BE#112
GC/BE#212
GC/BE#312
GFRAME#12
GDEVSEL#12
GIRDY#12
GTRDY#12
GSTOP#12
GREQ#12
GGNT#12
AD_STBA12
AD_STBA#12
AD_STBB12
AD_STBB#12
SBSTB12
SBSTB#12
AGP_VGAREF12
C
GPAR12
PIPE#12
RBF#12
WBF#12
GAD[0..31]
GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31
GFRAME#
GDEVSEL#
GIRDY#
GTRDY#
GSTOP#
GPAR
GREQ#
GGNT#
PIPE#
AD_STBA
AD_STBA#
AD_STBB
AD_STBB#
SBSTB
SBSTB#
RBF#
WBF#
AGP_VGAREF
GRCOMP
1 2
R50 36.5_1%_0603
AGP_NBREF12
U6C
K26
AE26
AD25
AC26
AA24
AD26
AB24
J22
K25
J21
L24
J20
L26
K23
K22
M25
M24
M26
M21
N24
N22
N26
T26
T22
U24
T23
U26
T24
V24
U21
V25
V21
V26
W21
W24
W22
W26
Y21
H23
N21
T25
Y26
R26
P26
P23
P21
P25
R24
M22
L23
U22
V23
Y23
J24
J26
G10
R22
P22
G_AD0/LDQM0
G_AD1/LMD4
G_AD2/LMD7
G_AD3/LMD3
G_AD4/LMD6
G_AD5/LMD2
G_AD6/LMD5
G_AD7/LMD1
G_AD8/LMD0
G_AD9/LMA4
G_AD10/LDQM1
G_AD11/LMA2
G_AD12/LMD8
G_AD13/LMA5
G_AD14/LMD9
G_AD15/MA1
G_AD16/LMA8
G_AD17/LMD14
G_AD18/LMA11/LBA
G_AD19/LMD15
G_AD20/LMA9
G_AD21/LMD16
G_AD22/LMA0
G_AD23/LMD17
G_AD24/LCKE
G_AD25/LMD18
G_AD26/LCAS#
G_AD27/LMD19
G_AD28/LTCLK1
G_AD29/LMD20
G_AD30/LTCLK0
G_AD31/LMD21
G_C/BE#0/LMA3
G_C/BE#1/LMD10
G_C/BE#2/LMD13
G_C/BE#3/LRAS#
G_FRAME#/LMA10
G_DEVSEL#/LMD11
G_IRDY#/LMD12
G_TRDY#/LMA7
G_STOP#/LCS#
G_PAR/LMA6
G_REQ#/LMD27
G_GNT#
PIPE#/LMD24
AD_STB0
AD_STB#0
AD_STB1
AD_STB#1
SB_STB
SB_STB#
RBF#/LMD30
WBF#
AGPREF
GRCOMP
NC
LOCLK
LRCLK
GMCH2v0
AGP
LTVD0
LTVD1
LTVD2
LTVD3
LTVD4
LTVD5
LTVD6
LTVD7
LTVD8
LTVD9
LTVD10
LTVD11
BLANK#
TVCLKIN/STALL
CLKOUT0
CLKOUT1
LTVVSYNC
DVO
LTVHSYNC
LTVDA
LTVCK
DDCK
DDDA
DCLKREF
IWASTE
VSYNC
HSYNC
GREEN
BLUE
HLCLK
HUB
HLREF
HLPSTRB
HLPSTRB#
HLZCOMP
SBA0/LMD31
SBA1/LMD25
SBA2/LDQM2
SBA3/LMD26
SBA4/LMD23
SBA5/LWE#
SBA6/LMD22
SBA7/LGM_FRQ_SEL
ST0/LMD28
ST1/LDQM3
ST2/LMD29
IREF
RED
HL10
HL0
HL1
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
TYPEDET# +VDDQ AGP-REF
0
1.5V
1
3.3V
+1_5VS
AGP_NBREF
Place reference circuitry near GMC H2-M
12
470PF
R30
1K_1%_0603
12
R36
1K_1%_0603
470PF
0.5VDDQ
0.4VDDQ
C26
12
R29
82_1%_0603
12
R35
82_1%_0603
C39
D
AD16
AF17
AE17
AD17
AF18
AD18
AF20
AD20
AC20
AF21
AE21
AD21
AB19
AC18
AE19
AF19
AC16
AB17
AA20
AB21
AB18
AA18
AE24
Y20
GMCH_IREF
AD23
AF22
AF23
AD22
AE22
AE23
CLK_HUB_GMCH
F22
HL0
H24
HL1
H26
HL2
H25
HL3
G24
HL4
F24
HL5
E26
HL6
E25
HL7
D26
HL8
D25
HL9
D24
HL10
C26
HUBREF
H21
HL_STB
G25
HL_STB#
F26
+GMCH_HLCOMP
H20
SBA0
AB22
SBA1
AB25
SBA2
AB23
SBA3
AB26
SBA4
AA22
SBA5
AA26
SBA6
Y22
SBA7
Y25
ST0
AD24
ST1
AC24
ST2
AC23
1 2
R428 2.2K
1 2
1 2
R187 4.7K
1 2
R185 10K
HL[0..10]
SBA[0..7]
R186 4.7K
1 2
R184 10K
1 2
R193 4.7K
1 2
R183 174_1%_0603
CLK_HUB_GMCH 11
1 2
R237
36.5_1%_0603
ST0 12
ST1 12
ST2 12
HL[0..10] 8
SBA[0..7] 12
CLK_HUB_GMCH
12
R255
@33
12
C358
@22PF
Title
Size Document Number Rev
B
888M1
Date: Sheet of
+1_8VS
+3V
HUBREF
HUBREF 8
HL_STB 8
HL_STB# 8
+1_8VS
GTRDY#
R88 8.2K
GIRDY#
R293 8.2K
GDEVSEL#
R300 8.2K
GSTOP#
R91 8.2K
AD_STBA
R312 8.2K
AD_STBB
R292 8.2K
GFRAME#
R83 8.2K
GREQ#
R273 8.2K
GGNT#
R64 8.2K
SBSTB
R282 8.2K
RBF#
R280 8.2K
PIPE#
R66 8.2K
WBF#
R68 8.2K
GPAR
R95 100K
AD_STBA#
R101 8.2K
AD_STBB#
R76 8.2K
SBSTB#
R69 8.2K
Compal Electronics, Inc.
GMCH2-M-1/3(GTL+,AGP,HUB)
E
12
C341
.1UF
+1_5VS
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
4 38Tuesday, April 24, 2001
1.0
A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.
AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF TH
E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE I
NFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF
COMPAL ELECTRONICS, INC.
PROPRIETARY
MD[0..63]7
1 1
2 2
MD[0..63]
RP25
1
2
3
4
5
6
7
8 9
16P8R-10
RP10
1
2
3
4
5
6
7
8 9
16P8R-10
RP23
1
2
3
4
5
6
7
8 9
16P8R-10
RP24
1
2
3
4
5
6
7
8 9
16P8R-10
MMD46
16
MMD47
15
MMD43
14
MMD44
13
MMD45
12
MMD40
11
MMD41
10
MMD42
MMD10
16
MMD9
15
MMD8
14
MMD12
13
MMD11
12
MMD13
11
MMD14
10
MMD15
MMD31
16
MMD63
15
MMD30
14
MMD62
13
MMD29
12
MMD61
11
MMD28
10
MMD60
MMD52
16
MMD20
15
MMD19
14
MMD51
13
MMD18
12
MMD50
11
MMD17
10
MMD49
MD46
MD43
MD44 MD37
MD45
MD40
MD41
MD42 MD32
MD10
MD9
MD8
MD12
MD13
MD14
MD15
MD31
MD63
MD30
MD62
MD29
MD61
MD28
MD60
MD52
MD20
MD19
MD51
MD18
MD50
MD17
MD49
Power-Up Strap Options
Pin Name Strap Description Configuration InternalInterface
3 3
SCAS# Host Freq. "H" : 133MHz (Default)
"L" : 100MHz
SWE# System"H" : 100MHz (Default)Host Freq.
SMAA11 IOQ Depth
"H" : 4 (Default) System
"L" : 1
SMAA10 "H" : Normal SystemALL Z
SMAA9
FSB P-MOS Kicker Enable System"H" : Enabled (Default)
"L" : Disabled (Cumine)
SMAC6#
SMAC5# "H" : Disabled
4 4
VGA_LFSEL#
Enable VCH Serial
Programming
Mode
Enable Quick Start
Support
"L" : Disabled
(Stop Grant Mode)
"L" : Enabled (Default)
(Quick Start Mode)
Local Memory Freq. Select "H" : 133MHz (Default)
"L" : 100MHz
MD38
MD39MD47
MD36
MD34
MD35
MD33
MD1
MD0
MD2
MD4
MD3MD11
MD7
MD6
MD5
MD53
MD21
MD54
MD22
MD55
MD23
MD48
MD16
MD24
MD27
MD59
MD56
MD26
MD58
MD25
MD57
RP26
1
2
3
4
5
6
7
8 9
16P8R-10
RP9
1
2
3
4
5
6
7
8 9
16P8R-10
RP11
1
2
3
4
5
6
7
8 9
16P8R-10
RP12
1
2
3
4
5
6
7
8 9
16P8R-10
B
MMD38
16
MMD39
15
MMD36
14
MMD37
13
MMD34
12
MMD35
11
MMD33
10
MMD32
MMD1
16
MMD0
15
MMD2
14
MMD4
13
MMD3
12
MMD7
11
MMD6
10
MMD5
MMD53
16
MMD21
15
MMD54
14
MMD22
13
MMD55
12
MMD23
11
MMD48
10
MMD16
MMD24
16
MMD27
15
MMD59
14
MMD56
13
MMD26
12
MMD58
11
MMD25
10
MMD57
System
PULL_UP
Memory
PULL_UP
Memory"L" : 66MHz
PULL_UP
Memory
PULL_UP
Memory"L" : All Z
PULL_UP
Memory
System"H" : Enabled (Default)
PULL_UP
Memory
System
Memory
PULL_UP
AGP/LM i815/i815-m
C
D
E
GMCH2-M-2/3(SDRAM)
MMD0
MMD1
MMD2
MMD3
MMD4
MMD5
MMD6
MMD7
MMD8
MMD9
MMD10
MMD11
MMD12
MMD13
MMD14
MMD15
MMD16
MMD17
MMD18
MMD19
MMD20
MMD21
MMD22
MMD23
MMD24
MMD25
MMD26
MMD27
MMD28
MMD29
MMD30
MMD31
MMD32
MMD33
MMD34
MMD35
MMD36
MMD37
MMD38
MMD39
MMD40
MMD41
MMD42
MMD43
MMD44
MMD45
MMD46
MMD47
MMD48
MMD49
MMD50
MMD51
MMD52
MMD53
MMD54
MMD55
MMD56
MMD57
MMD58
MMD59
MMD60
MMD61
MMD62
MMD63
U6B
D23
SMD0
C23
SMD1
D22
SMD2
F21
SMD3
E21
SMD4
G20
SMD5
F20
SMD6
D20
SMD7
F19
SMD8
E19
SMD9
D19
SMD10
E18
SMD11
B18
SMD12
F18
SMD13
G18
SMD14
D17
SMD15
A3
SMD16
A1
SMD17
C1
SMD18
F2
SMD19
G3
SMD20
D6
SMD21
C5
SMD22
B4
SMD23
D4
SMD24
C2
SMD25
D3
SMD26
E4
SMD27
F5
SMD28
G4
SMD29
J6
SMD30
K5
SMD31
A26
SMD32
A25
SMD33
B24
SMD34
A24
SMD35
B23
SMD36
A23
SMD37
C22
SMD38
A22
SMD39
D21
SMD40
B21
SMD41
A21
SMD42
C20
SMD43
B20
SMD44
A20
SMD45
C19
SMD46
A19
SMD47
A4
SMD48
A2
SMD49
B1
SMD50
E1
SMD51
G2
SMD52
E6
SMD53
D5
SMD54
C4
SMD55
B3
SMD56
D2
SMD57
E3
SMD58
F4
SMD59
F6
SMD60
G5
SMD61
H4
SMD62
J4
SMD63
GMCH2v0
SMAA0
SMAA1
SMAA2
SMAA3
SMAA4
SMAA5
SMAA6
SMAA7
SMAA8
SMAA9
SMAA10
SMAA11
SMAA12
SMAB#4
SMAB#5
SMAB#6
SMAB#7
SMAC#4
SMAC#5
SMAC#6
SMAC#7
MEMORY
SCSA#0
SCSA#1
SCSA#2
SCSA#3
SCSA#4
SCSA#5
SCSB#0
SCSB#1
SCSB#2
SCSB#3
SCSB#4
SCSB#5
SRAS#
SCAS#
SWE#
SCKE0
SCKE1
SCKE2
SCKE3
SCKE4
SCKE5
SDQM0
SDQM1
SDQM2
SDQM3
SDQM4
SDQM5
SDQM6
SDQM7
SRCOMP
SBS0
SBS1
SCLK
D13
B16
F12
A16
B12
A12
C11
A11
D12
C13
E11
A13
B7
B15
A15
C14
A14
B10
A10
C10
A9
B13
D11
D15
A17
D14
E14
E13
B17
F9
F8
D10
D9
B9
A8
C16
D18
E16
D8
E8
E9
D7
C8
C7
F7
D16
F15
A7
A6
A18
C17
B6
A5
G7
RMWEA#
SCASA#
SBS0
MAA9
SMAC#5
SMAC#6
MAA0
MAA1
MAA2
MAA3
MAA8
MAA9
MAA10
MAA11
MAA12
SMAB#4
SMAB#5
SMAB#6
SMAB#7
SMAC#4
SMAC#5
SMAC#6
SMAC#7
SBS0
SBS1
CSA#2
CSA#3
CSA#4
CSA#5
SRASA#
SCASA#
RMWEA#
CKE2
CKE3
CKE4
CKE5
CLK_MEM_GMCH
DQM#0
DQM#1
DQM#2
DQM#3
DQM#4
DQM#5
DQM#6
DQM#7
SRCOMP
R259 @10K
R263 10K
R267 10K
R264 10K
R270 10K
R266 10K
R239 36.5_1%_0603
1 2
1 2
1 2
1 2
1 2
1 2
SMAB#6
SMAB#7
SMAB#4
SMAB#5
SMAC#6
SMAC#4
SMAC#5
SMAC#7
1 2
1 8
2 7
3 6
4 5
RP13 8P4R-10
RP27 8P4R-10
1 8
2 7
3 6
4 5
+3V
MAC#6
MAC#4
MAC#5
MAC#7
CLK_MEM_GMCH
MAA0 7
MAA1 7
MAA2 7
MAA3 7
MAA8 7
MAA9 7
MAA10 7
MAA11 7
MAA12 7
MAB#6 7
MAB#7 7
MAB#4 7
MAB#5 7
MAC#6 7
MAC#4 7
MAC#5 7
MAC#7 7
SBS0 7
SBS1 7
CSA#2 7
CSA#3 7
CSA#4 7
CSA#5 7
SRASA# 7
SCASA# 7
RMWEA# 7
CKE2 7
CKE3 7
CKE4 7
CKE5 7
CLK_MEM_GMCH 11
DQM#0 7
DQM#1 7
DQM#2 7
DQM#3 7
DQM#4 7
DQM#5 7
DQM#6 7
DQM#7 7
12
R254
@33
C352
@22PF
A
Title
NOTE
B
C
D
Size Document Number Rev
B
Date: Sheet of
Compal Electronics, Inc.
GMCH2-M-2/3(SDRAM)
888M1
5 38Tuesday, April 24, 2001
E
1.0
A
Please make sre the ESR and p
art nmber
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.
AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF TH
E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE I
NFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF
COMPAL ELECTRONICS, INC.
PROPRIETARY
B
C
D
E
GMCH2-M-3/3(Power)
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
HCLK#
VCC1_8
VCC1_8
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
INTRPT#
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
W6
G26
M6
P6
Y9
Y18
AA8
AA11
AA13
AA15
AA17
AA19
AB16
AB20
AC22
AD19
C25
E24
F23
G22
K6
Y7
AA21
E23
AF26
AF25
AA6
V7
T6
B2
B5
B8
B11
B14
B19
B22
B25
E2
F10
F14
F17
G6
G8
G19
H2
H5
H7
K20
Y24
L21
M23
U25
N25
R21
U20
U23
W20
Y17
E7
M14
M15
M16
N2
N6
N11
N12
N13
N14
N15
N16
N23
P4
AA23
F16
F25
G9
G17
G21
G23
P24
H6
H22
J2
J5
J23
J25
K4
K21
L2
L6
L11
L12
L13
L14
AA25
W7
+1_8VS
+3V
+1_5VS
1 2
R203 10K
NOTE
+1_8VS
12
+
+1_8VS
1 2
+VCCDA
12
C232
.1UF
+3V
12
C257
4.7UF_0805
+3V
+
+1_5VS
+
12
12
C5
150UF_E
6.3V
L26
68nH
C256
22UF_1206
C74
150UF_E
6.3V
C289
22UF_10V_1206
C274
+
22UF_10V_1206
C337
4.7UF_0805
C252
.1UF
C347
.01UF
C236
.1UF
C283
.1UF
C346
.01UF
.1UF
C219
C305
.1UF
C338
82PF
C221
82PF
C322
.1UF
C340
.01UF
C231
.1UF
C298
.1UF
C339
.01UF
C304
.1UF
C237
82PF
C372
82PF
C353
82PF
C268
82PF
C365
.01UF
C354
.1UF
C275
82PF
C371
.01UF
C366
.1UF
C368
82PF
C360
82PF
C369
.01UF
C350
.1UF
C370
.01UF
C234
.1UF
C367
.01UF
C224
.1UF
C227
.1UF
C359
.01UF
PIN# DT_GMCH GMCH2-M
E7
AA6
VSS (GND)
V_1.8 (1.8V)
AGPBUSY# (OUTPUT)
RESERVED (1.8V)
Y17 VSS (GND) INTRPT# (INPUT)
AC18 LTVCLKIN (INPUT) LTVCLKIN/STALL (INPUT)
Title
Size Document Number Rev
B
C
D
Date: Sheet of
Compal Electronics, Inc.
GMCH2-M-3/3(Power)
888M1
6 38Tuesday, April 24, 2001
E
1.0
+1_8VS
1 1
2 2
3 3
4 4
+
A
C314
4.7UF_0805
+
C329
4.7UF_0805
12
C331
.1UF
AE25
AF24
AC11
AC13
AC15
AC17
AC19
AC21
AC25
AE10
AE12
AE14
AE16
AE18
AE20
AA12
AA14
AA16
J7
K7
E22
Y8
AB4
M13
AC2
AC5
AC7
AC9
AE2
AE4
AE6
AE8
B26
C3
C6
C9
C12
C15
C18
C21
C24
D1
E5
E10
E12
E15
E17
E20
F1
F3
F11
F13
T21
U2
U7
K24
V4
V6
V20
V22
W2
W23
W25
Y4
Y6
Y10
Y19
AA2
AA9
P11
P12
P13
P14
P15
P16
R2
R6
R11
R12
R13
R14
R15
R16
R23
R25
T4
T11
T12
T13
T14
T15
T16
L15
L16
L22
L25
M4
M11
M12
U6D
VCC1_8/VCCDPLL
GND/VSSDPLL
GND/VSSDACA1
GND/VSSDACA2
GND/VSSBA
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GMCH2v0
B
VCCDA/(VCC1_8)
VCCBA/(VCC1_8)
VCCDACA1/(VCC1_8)
VCCDACA2/(VCC1_8)
VSUS_3.3_1
VSUS_3.3_2
VSUS_3.3_3
VSUS_3.3_4
VSUS_3.3_5
VSUS_3.3_6
VSUS_3.3_7
VSUS_3.3_8
VSUS_3.3_9
VSUS_3.3_10
VSUS_3.3_11
VSUS_3.3_12
VSUS_3.3_13
VSUS_3.3_14
VSUS_3.3_15
VSUS_3.3_16
VSUS_3.3_17
VSUS_3.3_18
POWER/GND
AGPBUSY#
A
B
C
+3V
D
E
SO-DIM 144 PINS
+
RAM MODULE CONN.
RP14
8P4R-10K
MAC#[4..7]
MAB#[4..7]
MAA[0..12]
MD[0..63]
RCAS#[0..7]
RRAS#[0..5]
CLK_SDRAM211
SRASA#5
RMWEA#5
C539
.1UF
SCKDIMM1
SCKDIMM0
SDADIMM1
SDADIMM0
A
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
DQM#0
DQM#4
MAA0
MAA1
MAA2
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
C512
R384
22PF
33
SRASA# SCASA#
RMWEA# CKE3
CSA#2 MAA12
CSA#3
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MAB#6 MAB#7
MAA8
MAA9
MAA10 MAA11
DQM#2
DQM#6
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
SDADIMM0
C545
.1UF
MAC#[4..7]5
1 1
2 2
3 3
4 4
MAB#[4..7]5
MAA[0..12]5
DQM#[0..7]5
CSA#[0..5]5
+3V
+
+3VS
MD[0..63]5
C411
10UF_1206
6.3V
1 8
2 7
3 6
4 5
BANK2/3
+3V +3V
JP27
C544
.1UF
1
VSS
3
DQ0
5
DQ1
7
DQ2
9
DQ3
11
VCC
13
DQ4
15
DQ5
17
DQ6
19
DQ7
21
VSS
23
CE0#
25
CE1#
27
VCC
29
A0
31
A1
33
A2
35
VSS
37
DQ8
39
DQ9
41
DQ10
43
DQ11
45
VCC
47
DQ12
49
DQ13
51
DQ14
53
DQ15
55
VSS
57
RESVD/DQ64
59
RESVD/DQ65
61
RFU/CLK0
63
VCC
65
RFU
67
WE#
69
RE0#
71
RE1#
73
OE#/RESVD
75
VSS
77
RESVD/DQ66
79
RESVD/DQ67
81
VCC
83
DQ16
85
DQ17
87
DQ18
89
DQ19
91
VSS
93
DQ20
95
DQ21
97
DQ22
99
DQ23
101
VCC
103
A6
105
A8
107
VSS
109
A9
111
A10
113
VCC
115
CE2#/RESVD
117
CE3#/RESVD
119
VSS
121
DQ24
123
DQ25
125
DQ26
127
DQ27
129
VCC
131
DQ28
133
DQ29
135
DQ30
137
DQ31
139
VSS
141
SDA
143
VCC
SO-DIMM144 REVERSE
C538
.1UF
DIMM0
C520
.01UF
RESVD/DQ68
RESVD/DQ69
RESVD/DQ70
RESVD/DQ71
CE6#/RESVD
CE7#/RESVD
C496
.01UF
VSS
DQ32
DQ33
DQ34
DQ35
VCC
DQ36
DQ37
DQ38
DQ39
VSS
CE4#
CE5#
VCC
VSS
DQ40
DQ41
DQ42
DQ43
VCC
DQ44
DQ45
DQ46
DQ47
VSS
RFU/CKE0
VCC
RFU
RFU/CKE1
RFU
RFU
RFU/CLK1
VSS
VCC
DQ48
DQ49
DQ50
DQ51
VSS
DQ52
DQ53
DQ54
DQ55
VCC
A11/BA0
VSS
A12/BA1
A13/A11
VCC
VSS
DQ56
DQ57
DQ58
DQ59
VCC
DQ60
DQ61
DQ62
DQ63
VSS
SCL
VCC
B
A3
A4
A5
A7
C481
.01UF
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
DQM#1
DQM#5
MAA3
MAB#4
MAB#5
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
CKE2
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
SBS0
SBS1
DQM#3
DQM#7
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
SCKDIMM0
PROPRIETARY NOTE
C546
10UF_1206
6.3V
CKE2 5
SCASA# 5
CKE3 5
SBS0 5
SBS1 5
SM_SEL9
SCKP49,11
SDAP49,11
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
R377
33
C490
22PF
C425
C441
1000PF
.01UF
CLK_SDRAM3 11
+3V
C90
.1UF
6
INH
10
A
9
B
3
X
13
Y
7
C
GND
1000PF
CLK_SDRAM411
U10
16
VCC
GND
8
X0
X1
X2
X3
Y0
Y1
Y2
Y3
1
5
2
4
12
14
15
11
74HC4052
SCKDIMM0
SCKDIMM1
SDADIMM0
SDADIMM1
1000PF
1000PF
BANK4/5
+3V +3V
JP26
1
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
DQM#0
DQM#4
MAA0
MAA1
MAA2
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
C503
R380
22PF
33
SRASA# SCASA#
RMWEA# CKE5
CSA#4 MAA12
CSA#5
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MAC#6 MAC#7
MAA8
MAA9
MAA10 MAA11
DQM#2
DQM#6
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
SDADIMM1
VSS
3
DQ0
5
DQ1
7
DQ2
9
DQ3
11
VCC
13
DQ4
15
DQ5
17
DQ6
19
DQ7
21
VSS
23
CE0#
25
CE1#
27
VCC
29
A0
31
A1
33
A2
35
VSS
37
DQ8
39
DQ9
41
DQ10
43
DQ11
45
VCC
47
DQ12
49
DQ13
51
DQ14
53
DQ15
55
VSS
57
RESVD/DQ64
59
RESVD/DQ65
61
RFU/CLK0
63
VCC
65
RFU
67
WE#
69
RE0#
71
RE1#
73
OE#/RESVD
75
VSS
77
RESVD/DQ66
79
RESVD/DQ67
81
VCC
83
DQ16
85
DQ17
87
DQ18
89
DQ19
91
VSS
93
DQ20
95
DQ21
97
DQ22
99
DQ23
101
VCC
103
A6
105
A8
107
VSS
109
A9
111
A10
113
VCC
115
CE2#/RESVD
117
CE3#/RESVD
119
VSS
121
DQ24
123
DQ25
125
DQ26
127
DQ27
129
VCC
131
DQ28
133
DQ29
135
DQ30
137
DQ31
139
VSS
141
SDA
143
VCC
SO-DIMM144-STANDARD
+3V
+
DIMM1
C528
10UF_1206
6.3V
DQ32
DQ33
DQ34
DQ35
VCC
DQ36
DQ37
DQ38
DQ39
VSS
CE4#
CE5#
VCC
VSS
DQ40
DQ41
DQ42
DQ43
VCC
DQ44
DQ45
DQ46
DQ47
VSS
RESVD/DQ68
RESVD/DQ69
RFU/CKE0
VCC
RFU
RFU/CKE1
RFU
RFU
RFU/CLK1
VSS
RESVD/DQ70
RESVD/DQ71
VCC
DQ48
DQ49
DQ50
DQ51
VSS
DQ52
DQ53
DQ54
DQ55
VCC
A11/BA0
VSS
A12/BA1
A13/A11
VCC
CE6#/RESVD
CE7#/RESVD
VSS
DQ56
DQ57
DQ58
DQ59
VCC
DQ60
DQ61
DQ62
DQ63
VSS
SCL
VCC
C455
.1UF
VSS
2
MD8
4
MD9
6
MD10
8
MD11
10
12
MD12
14
MD13
16
MD14
18
MD15
20
22
DQM#1
24
DQM#5
26
28
MAA3
30
A3
A4
A5
A7
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
C440
.1UF
MAC#4
MAC#5
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
CKE4
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
SBS0
SBS1
DQM#3
DQM#7
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
SCKDIMM1
C424
.1UF
CKE4 5
CKE5 5
R383
33
C511
22PF
C401
.1UF
CLK_SDRAM5 11
C399
.01UF
C495
C483
C456
Compal Electronics, Inc.
Title
S.O. DIMM CONNECTOR
Size Document Number Rev
B
888M1
D
Date: Sheet of
7 38Tuesday, April 24, 2001
E
1.0
A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.
AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF TH
E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE I
NFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF
COMPAL ELECTRONICS, INC.
PROPRIETARY
1 1
B
C
D
W10
AA10
AA3
AB6
AA9
AB7
AA15
AA7
W11
AB10
U34A
AA4
AB4
Y4
W5
W4
Y5
AB3
AA5
AB5
Y3
W6
W3
Y6
Y2
AA6
Y1
V2
AA8
V1
AB8
U4
W9
U3
Y9
U2
AB9
U1
T4
Y10
T3
Y8
V3
W8
V4
W1
W2
W7
Y7
Y15
M3
L2
R2
R3
T1
P4
L3
ICH-2M
ICH-2M
(FW82801BAM)
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
PCI
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE0#
C/BE1#
C/BE2#
C/BE3#
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PCIRST#
PLOCK#
SERR#
PERR#
PME#
GPI0/REQA#
GPO16/GNTA#
PCICLK
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
GPI1/REQB#/REQ5#
PCLK_ICH
A20M#
CPUSLP#
FERR#
IGNNE#
CPU
STPCLK#
RCIN#
A20GATE
CPUPWRGD
HUB
HL_STB
HL_STB#
HLCOMP
HUBREF
PIRQA#
PIRQB#
IRQ
PIRQC#
PIRQD#
IRQ14
IRQ15
APICCLK
APICD0
APICD1
SERIRQ
GPI2/PIRQE#
GPI3/PIRQF#
GPI4/PIRQG#
GPI5/PIRQH#
GNT0#
GNT1#
GNT2#
GNT3#
GNT4#
GPO17/GNTB#/GNT5#
12
R57
@33
12
C66
@22PF
A20M#
D11
A12
FERR#
R22
IGNNE#
A11
CPUINIT#
C12
INIT#
INTR
C11
INTR
NMI
B11
NMI
SMI#
B12
SMI#
STPCLK#
C10
RC#
B13
GATEA20
C13
CPU_PWRGD
A13
HL0
A4
HL0
HL1
B5
HL1
HL2
A5
HL2
HL3
B6
HL3
HL4
B7
HL4
HL5
A8
HL5
HL6
B8
HL6
HL7
A9
HL7
HL8
C8
HL8
HL9
C6
HL9
HL10
C7
HL10
HL11
C5
HL11
HL_STB
A6
HL_STB#
A7
+ICH_HLCOMP
A3
HUBREF
B4
PIRQA#
P1
PIRQB#
P2
PIRQC#
P3
PIRQD#
N4
IRQ14
F21
IRQ15
C16
CLK_APIC_ICH
N20
PICD0
P22
PICD1
N19
SIRQ
N21
GPI2
N3
GPI3
N2
GPI4
N1
GPI5
M4
PIN N3, M4 can not use GPIO.
GNT#0
M2
GNT#1
M1
GNT#2
R4
GNT#3
T2
GNT#4
R1
SIDERST#
L4
1 2
R260 @0
HL[0..10]
HL_STB 4
HL_STB# 4
12
C80 .1UF
PIRQA# 12,14,18
PIRQB# 14
PIRQC# 17
PIRQD# 16,18
IRQ14 20
IRQ15 19
SIRQ 14,22,27
GNT#0 18
GNT#1 16
GNT#2 17
GNT#3 14
SIDERST# 20
+1_8VS
12
R287
300_1%_0603
HUBREF4
HUBREF
12
R281
300_1%_0603
Place divider pair in middle o f bus
C
A20M# 2
CPUSLP# 2
FERR# 2
IGNNE# 2
CPUINIT# 2
INTR 2
NMI 2
SMI# 2
STPCLK# 2
RC# 27
GATEA20 27
CPU_PWRGD 2
HL[0..10] 4
1 2
C390 470PF
1 2
C380 470PF
HL11
+ICH_HLCOMP
SIDERST#
IRQ14
IRQ15
GPI2
GPI3
12
R283
56_1%_0603
12
R275
56_1%_0603
Title
Size Document Number Rev
B
Date: Sheet of
GPI4
GPI5
PICD0
PICD1
CLK_APIC_ICH
Compal Electronics, Inc.
ICH2M-A(PCI,HUB,CPU) & FWH
888M1
1 2
R272 @10K
1 2
R279 36.5_1%_0603
1 2
R62 @8.2K
1 2
R33 8.2K
1 2
R236 8.2K
RP30
1 8
2 7
3 6
4 5
8P4R-100K
R21 10K
R23 10K
1 2
R43 0
D
+1_8VS
+3VS
12
12
1.0
8 38Tuesday, April 24, 2001
AD[0..31]14,16,17,18
2 2
C/BE#014,16,17,18
C/BE#114,16,17,18
C/BE#214,16,17,18
C/BE#314,16,17,18
DEVSEL#14,16,17,18
FRAME#14,16,17,18
TRDY#14,16,17,18
PCIRST#4,12,14,15,16,17,18,20,22,27,30
SERR#14,16,17,18
PCI Pullups
3 3
+3VS
+3VS
PERR#
REQA#
STOP#
SERR#
IRDY#
TRDY#
FRAME#
RP28
1
2
3
4
5
10P8R-8.2K
RP29
1
2
3
4
5
10P8R-8.2K
10
9
8
7
6
10
9
8
7
6
PIRQA#
PIRQB#
REQ#4
PIRQC#
PIRQD#DEVSEL#
SIRQ
PLOCK#
+3VS
+3VS
PERR#14,16,17,18
PME# has internal PU
PIDERST#20
PCLK_ICH11
REQ#0
REQ#1
REQ#2
REQ#3
REQ#4
+3VS
RP31
1 8
4 4
2 7
3 6
4 5
8P4R-8.2K
1 2
R60 8.2K
1 2
R61 @1K
REQ#0
REQ#1
REQ#2
REQ#3
GPI1
GNTA#
GNTA# Strapping for "A16 swap override" : "0" -> Enable
A
AD[0..31]
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
IRDY#14,16,17,18
STOP#14,16,17,18
PAR14,16,17,18
PCIRST#
PLOCK#
REQA#
GNTA#
PCLK_ICH
REQ#0
REQ#018
REQ#1
REQ#116
REQ#2
REQ#217
REQ#3
REQ#314
REQ#4
GPI1
PCI REQ ASSIGMENT
WLAN
LAN
1394
PCMCIA CONTROLLER
NC
B
NOTE
A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.
AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF TH
E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE I
NFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF
COMPAL ELECTRONICS, INC.
PROPRIETARY
1 2
+3V
R34 10K
LLBATT#27
D22 RB751V
1 2
+3V
ON/OFF27,30
+3V
ACIN27,30,32,35
+3V
ECSMI#27
+3V
ECSCI#27
+3V
+RTCVCC
INTRUDER#
SMLINK0
SMLINK1
V_GATE
OVCUR#2
CLKRUN#
SDAP4
SCKP4
LDRQ#1
AGP_BUSY#
DSCACHE#
ICH_AC_SDOUT
IAC_BITCLK
IAC_SDATAI
IAC_SDATAI1
SPKR
R249 10K
D26 RB751V
D20 RB751V
D21 RB751V
1 2
R53 10K
D27 RB751V
1 2
R54 10K
D29 RB751V
1 2
R56 10K
D28 RB751V
1 2
R52 10K
D30 RB751V
R221
1 2
15K
1UF_25V_0805
R210
1 2
1K
EC_LID_OUT#27
PBTN_OUT#27
1 1
EC_RIOUT#27
2 2
+RTCVCC
3 3
1 2
R39 10K
+3V
1 2
R20 10K
1 2
R38 10K
+3VS
1 2
R55 100K
1 2
R19 10K
1 2
R37 10K
1 2
R248 10K
1 2
R244 10K
1 2
R257 @10K
12
R261 10K
12
R262 10K
1 2
R24 @10K
4 4
AC_SDOUT Strapping: "1" -> Safe Mode B oot
12
R26 10K
12
R40 10K
12
R25 10K
12
R45 1K
SPKR Strapping: "0" -> No Reboot
A
21
21
21
21
21
21
21
21
C255
+R_VBAIS
.047UF_0603
12
1 2
C228
BATTLOW#
LID#
PBTN#
ICH_ACIN
EXT_SMI#
SCI#
ICH_RI#
1 2
R107
1 2
1K
R206
10M_0603
C266
12PF
12
IAC_BITCLK
USBP2+
USBP2ÂUSBP0+
USBP0-
J1
12
JOPEN
1 2
R215 10M_0603
X2
32.768KHZ
12
12
R41
@33
C34
@33PF
CP6
8P4C-22PF
C229
12PF
1 8
2 7
3 6
1 2
R258 @10K
RP8
1 8
2 7
3 6
4 5
8P4R-15
4 5
B
182736
45
RP7
8P4R-15K
5PF
1 2
C50
1 2
C45 5PF
CLOSE TO ICH2-M(< 1 inch)
USB2_D+ 21
USB2_D- 21
USB0_D+ 24
USB0_D- 24
USBP3+
USBP3ÂUSBP1+
USBP1-
8P4C-22PF
C
RP6
1 8
2 7
3 6
4 5
CP5
8P4R-15
8P4R-15K
1 8
2 7
3 6
4 5
182736
45
RP5
CLOSE TO ICH2-M(< 1 inch)
U34B
ATF_INT#
ATF_INT#27
SLP_S1#11,27
SLP_S3#27
SLP_S5#27
SYS_PWROK31
RSMRST#31
FLASH#28
RTCCLK14,15
AGP_BUSY#12
PCI_STP#11
CPU_STP#11
CLKRUN#14,16,17,18,22,27
SUS_STAT#12,22,30
SDAP47,11
SCKP47,11
+RTCRST#
+VBIAS
RTCX1
RTCX2
IAC_RST#12,25 PDD[0..15] 20
IAC_BITCLK12,25
IAC_SDATAI25
IAC_SDATAI112
C3_STAT#12
SM_SEL7
SYSIDEPWR20
LDRQ#027
LDRQ#122
LFRAME#22,27
OVCUR#024
OVCUR#124
OVCUR#324
IAC_SYNC12,25
IAC_SDATAO12,25
B
ICH_AC_SYNC
IAC_BITCLK
ICH_AC_SDOUT
IAC_SDATAI
IAC_SDATAI1
SPKR
SPKR26
EXT_SMI#
DSCACHE#
SCI#
LID#
LAD0
LAD022,27
LAD1
LAD122,27
LAD2
LAD222,27
LAD3
LAD322,27
LDRQ#0
LDRQ#1
LFRAME#
USBP0+
USBP0ÂUSBP1+
USBP1ÂUSBP2+
USBP2ÂUSBP3+
USBP3-
OVCUR#2
OVCUR#3
C59
22PF
NOTE
SLP_S1#
SLP_S3#
SLP_S5#
SYS_PWROK
PBTN#
ICH_RI#
RSMRST#
AGP_BUSY#
CLKRUN#
INTRUDER#
SDAP4
SCKP4
ICH_ACIN
SMLINK0
SMLINK1
12
C28
22PF
12
AA13
W16
AB18
W21
AA17
W15
AA18
AA16
AB16
AB17
W22
AA11
W14
AB15
AB14
AA14
W12
AB13
AB12
W13
AB11
AA12
W17
AB19
AA19
W18
AB20
AA20
W19
W20
D14
R20
R21
Y11
A15
C14
V21
Y17
T19
U19
V20
T20
T21
U22
T22
V22
P19
R19
P21
Y22
N22
Y14
L1
Y12
Y13
Y18
Y19
Y20
Y21
R49 22
R22 22
THRM#
SLP_S1#
SLP_S3#
SLP_S5#
PWROK
PWRBTN#
RI#
RSMRST#
GPIO25
SUSCLK
AGPBUSY#
STP_PCI#
STP_CPU#
CLKRUN#
SUSSTAT#
INTRUDER#
SMBDATA
SMBCLK
SMBALERT#/GPI11
SMLINK0
SMLINK1
RTCRST#
VBIAS
RTCX1
RTCX2
AC_RST#
AC_SYNC
AC_BIT_CLK
AC_SDOUT
AC_SDIN0
AC_SDIN1
SPKR
GPI8
GPI7
GPI12
GPI13
C3_STAT#/GPO21
GPIO27
GPIO28
LAD0/FWH0
LAD1/FWH1
LAD2/FWH2
LAD3/FWH3
LDRQ0#
LDRQ1#
LFRAME#/FWH4
FSO
USBP0+
USBP0ÂUSBP1+
USBP1ÂUSBP2+
USBP2ÂUSBP3+
USBP3-
OC0#
OC1#
OC2#
OC3#
ICH-2M
1 2
1 2
SYSTEM
AC97
GPIO
LPC
USB
ICH_AC_SYNC
ICH_AC_SDOUT
BATLOW#
CPUPERF#
SSMUXSEL#
VGATE/VRMPWRGD
CLK48
CLK14
CLK66
PDCS1#
PDCS3#
PDREQ
PDDACK#
PDIOR#
PDIOW#
PIORDY
IDE
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
SDCS1#
SDCS3#
SDDREQ
SDDACK#
SDIOR#
SDIOW#
SIORDY
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
PDA0
PDA1
PDA2
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
SDA0
SDA1
SDA2
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
C
U20
B14
A14
B15
P20
M19
D4
F20
F19
E22
E21
E19
G22
F22
G19
G21
G20
H19
H22
J19
J22
K21
L20
M21
M22
L22
L21
K22
K20
J21
J20
H21
H20
A16
D16
B16
C15
D15
B18
B17
D17
C17
A17
D18
B19
D19
A20
C20
C21
D22
E20
D21
C22
D20
B20
C19
A19
C18
A18
BATTLOW#
1 2
R253 0
V_GATE
CLK_USB_ICH
CLK_14M_ICH
CLK_HUB_ICH
PDA0
PDA1
PDA2
PDCS1#
PDCS3#
PDDREQ
PDDACK#
PDIOR#
PDIOW#
PDIORDY
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
SDA0
SDA1
SDA2
SDCS1#
SDCS3#
SDDREQ
SDDACK#
SDIOR#
SDIOW#
SDIORDY
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
CLK_USB_ICH 11
CLK_14M_ICH 11
CLK_HUB_ICH 11
PDA0 20
PDA1 20
PDA2 20
PDCS1# 20
PDCS3# 20
PDDREQ 20
PDDACK# 20
PDIOR# 20
PDIOW# 20
PDIORDY 20
PDD[0..15]
SDA0 19
SDA1 19
SDA2 19
SDCS1# 19
SDCS3# 19
SDDREQ 19
SDDACK# 19
SDIOR# 19
SDIOW# 19
SDIORDY 19
SDD[0..15]
D
5PF
1 2
C42
1 2
C37 5PF
1 2
R435 @0
1 2
R436 @0
IST_CPU_PERF# 3
VR_HI/LO# 2,37
V_GATE 37
SDD[0..15] 19
CLK_USB_ICH CLK_14M_ICH CLK_HUB_ICH
ICH2M-B(IDE,LPC,GPIO)
USB3_D+
USB3_D+ 24
USB3_D-
USB3_D- 24
USB1_D+ 24
USB1_D- 24
USBBT_D+ 24
USBBT_D- 24
PDIORDY
1 2
R46 1K
SDIORDY
1 2
R240 1K
12
R42
@33
12
C35
@10PF
Title
Size Document Number Rev
B
888M1
Date: Sheet of
12
R44
@33
12
C36
@10PF
Compal Electronics, Inc.
ICH2M-B(IDE,LPC,GPIO)
D
+5VS
12
R67
@33
12
C83
@10PF
9 38Tuesday, April 24, 2001
1.0
A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.
AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF TH
E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE I
NFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF
COMPAL ELECTRONICS, INC.
PROPRIETARY
B
C
D
ICH2M-C(LAN,Power) & Pull-Up
+1_8VS
1 1
2 2
+3V
12
12
12
12
C46
C43
.1UF
.1UF
12
C376
3 3
+
4.7UF_10V_0805
12
+
C386
10UF_1206
12
C71
.1UF
C49
.1UF
12
C290
10UF_1206
C51
.1UF
+3VS
12
12
C62
C52
.1UF
.1UF
12
C54
.1UF
12
12
C77
C75
.1UF
.1UF
12
12
C68
C55
.1UF
.1UF
12
12
C53
.1UF
12
C79
.1UF
12
C56
1000PF
C76
1000PF
+1_8VS
12
12
C57
1000PF
C69
1000PF
AA21
AA22
AB21
AB22
U34C
D10
VCC1_8_1
E5
VCC1_8_2
K19
VCC1_8_3
L19
VCC1_8_4
P5
VCC1_8_5
V9
VCC1_8_6
A1
GND1
A2
GND2
A10
GND3
B1
GND4
B2
GND5
B3
GND6
B9
GND7
B10
GND8
C2
GND9
C3
GND10
C4
GND11
C9
GND12
D5
GND13
D6
GND14
D7
GND15
D8
GND16
D9
GND17
E6
GND18
E7
GND19
E8
GND20
E9
GND21
J10
GND22
J11
GND23
J12
GND24
J13
GND25
J14
GND26
J9
GND27
K10
GND28
K11
GND29
K12
GND30
K13
GND31
K14
GND32
K9
GND33
L10
GND34
L11
GND35
L12
GND36
L13
GND37
L14
GND38
L9
GND39
M10
GND40
M11
GND41
M12
GND42
M13
GND43
M14
GND44
M9
GND45
N10
GND46
N11
GND47
N12
GND48
P9
GND49
P14
GND50
P13
GND51
P12
GND52
P11
GND53
P10
GND54
N9
GND55
N14
GND56
N13
GND57
A21
GND58
A22
GND59
B21
GND60
B22
GND61
AA1
GND62
AA2
GND63
GND64
GND65
AB1
GND66
AB2
GND67
GND68
GND69
K1
GND70
D3
GND71
ICH-2M
VCC3_3_1
VCC3_3_2
VCC3_3_3
VCC3_3_4
VCC3_3_5
VCC3_3_6
VCC3_3_7
VCC3_3_8
VCC3_3_9
VCC3_3_10
VCC3_3_11
VCC3_3_12
VCC3_3_13
VCC3_3_14
VCC3_3_15
VCC3_3_16
VCC3_3_17
VCC3_3_18
V5REF1
V5REF2
VCCSUS1_8_1
VCCSUS1_8_2
VCCSUS1_8_3
VCCSUS3_3_1
VCCSUS3_3_2
VCCLAN1_8_1
VCCLAN1_8_2
VCCLAN3_3_1
VCCLAN3_3_2
VCCSUS3_3_3
VCCSUS3_3_4
V_CPU_IO_1
V_CPU_IO_2
VCC1_8_7
VCCRTC
V5REF_SUS
EEPROM
EE_CS
EE_SHCLK
EE_DOUT
EE_DIN
LAN
LAN_CLK
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
LAN_RSTSYNC
LAN_PWROK
+3VS
E14
E15
E16
E17
E18
F18
G18
H18
J18
P18
R18
R5
T5
U5
V5
V6
V7
V8
+VCC5REF
K2
M20
V14
V15
V16
T18
U18
H5
J5
F5
G5
V17
V18
D12
D13
D2
U21
V19
K4
J3
J4
K3
G3
G2
G1
H1
F3
F2
F1
H2
Y16
LAN_1.8V
LAN_3V
CPU_IO
+1_8VS
VCCRTC
+3V
+1_8V
+3V
1 2
R63 0
1 2
R271 0
1 2
R74 @10K
1 2
R27 1K
C29 .1UF
+1_8V
+3V
1 2
1SS355
12
C265
1UF_0805
+3VS
+5VS
21
12
12
C30
.1UF
+RTCVCC
R222
1K
D19
+1_8V CPU_IO
C63
.1UF
12
C61
.1UF
12
4 4
A
12
C65
.1UF
Title
NOTE
B
C
Size Document Number Rev
B
Date: Sheet of
Compal Electronics, Inc.
ICH2M-C(LAN,Power) & Pull-Up
888M1
D
10 38Tuesday, April 24, 2001
1.0
A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.
AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF TH
E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE I
NFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF
COMPAL ELECTRONICS, INC.
PROPRIETARY
B
C
D
E
F
G
H
Clock Generator
L2
1 2
+3VS
1 1
2 2
3 3
BLM21A601SPT
CLK_14M_ICH9
CLK_USB_ICH9 CLK_HUB_GMCH 4
12
C87
4.7UF_10V_0805
14.3M_SIO22
PCI_STP#9
PCLK_ICH8
PCLK_SIO22
PCLK_LAN16
PCLK_139417
PCLK_MINI18
PCLK_EC27
SLP_S1#9,27
SDAP47,9
SCKP47,9
+3V_CLK
+3V_CLK
+3V_CLK
12
12
C101
C95
.1UF
.1UF
R72 33
R71 33
1 2
R81 33
1 2
R85 33
1 2
R89 33
1 2
R93 33
1 2
R98 33
1 2
R102 8.2K
1 2
R103 10K
+3V_CLK
12
12
C103
.1UF
C86
18PF
C84
18PF
12
12
C105
.1UF
12
12
12
1 2
R80 33
1 2
R84 33
1 2
R92 33
1 2
R97 0
12
C96
.1UF
CK133-XIN
12
14.318MHZ
R70
2M_0603
CK133-XOUT
SEL0
SEL1
CLK_14M
PCISTP#
CLK_ICH
CLK_PCI1
CLK_LAN SDRAM4
CLK_SIO
CLK_1394
CLK_MINI
CLK_EC
CLK_USB
SDACG
SCKCG
12
12
Y1
C102
.1UF
C104
.1UF
3
X1
4
X2
28
SEL0
29
SEL1(TRIST#)
1
REF0/(SEL1)
11
PCI_STP#/(VCC3)
12
PCI_F(PCI0_ICH)
13
PCI1
15
PCI2
16
PCI3
18
PCI4
19
PCI5
20
PCI6
25
USB(48M)
26
DOT(48M)
TEST#/(VCC3)
32
PWR_DWN#
30
SDATA
31
SCLK
23
GNDA
GND
6
5
22332
VDDA
GND
GND
1417243541
VCC3
GND
102127
44
37
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3/(SDRAM6)
CPU2(ITP)
VCH_CLK/(SDRAM7)
3V66_AGP
DCLK/(VCC3)
CPU_STP#(DCLK)
GND
GND
GND
GND
GND
CK133-SOLANO2-M
48
47
56
51
53
VCC2
VCC2
APIC0
APIC1
CPU0
CPU1
SDRAM0
SDRAM1
SDRAM2
SDRAM3
SDRAM4
SDRAM5
3V66_1
3V66_0
12
55
54
52
50
49
46
45
43
42
40
39
36
9
8
7
38
34
C89
.1UF
U9
+2.5V_CLKS
12
C88
.1UF
HCLK1
R73 33
HCLK2
SDRAM2
SDRAM3
SDRAM5
CLK_3V66_AGP
CLK_3V66_1
CLK_3V66_0
DCLK
SA092500000 ICS 9 250AG-31TSSOP-56
12
C85
4.7UF_10V_0805
1 2
1 2
R86 10
1 2
R90 10
1 2
R77 33
1 2
R94 33
L1
BLM21A601SPT
12
+2.5V_CLK
R75 33
1 2
1 2
R82 10
1 2
R87 10
1 2
R79 33
1 2
R78 33
*
HCLK_CPU 2
HCLK_GMCH 4
CLK_SDRAM2 7
CLK_SDRAM3 7
CLK_SDRAM4 7
CLK_SDRAM5 7PCLK_PCM14
AGP_CLK 12
CLK_HUB_ICH 9
CLK_MEM_GMCH 5
CPU_STP# 9
SEL0SEL1 PSB SDRAM
00
66 100
0 1
01
133 133
11
133 100
100100
+3V_CLK +3V_CLK
12
R104
10K
SEL0
4 4
Title
A
B
NOTE
C
D
E
F
Size Document Number Rev
B
888M1
Date: Sheet of
G
12
R100
@10K
SEL1
R96
1K
1 2
Compal Electronics, Inc.
Clock Generator
11 38Tuesday, April 24, 2001
H
1.0
5
4
3
2
1
+2.5V
+3VS
+5VS
KSI[0..7]
KS0[0..15]
KSI0
KSI2
KSI4
KSI6
KSO0
KSO2
KSO4
KSO6
KSO8
KSO10
KSO12
KSO14
+3VS_MDC
JP11
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
HEADER 2X20
JP13
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
AMP 108-5424
12
C450
1UF_0805
KSI1
KSI3
KSI5
KSI7
KSO1
KSO3
KSO5
KSO7
KSO9
KSO11
KSO13
KSO15
12
+5VS_MDC
1 2
R108 22
1 2
R106 22
+12V
+3V+3V
+5V
+5VS_MDC+3VS_MDC+3.3VAUX
C443
1UF_0805
12
C115
1UF_0805
MD_SPK 25
1 2
L5 CHB1608U121
1 2
R112 10K
IAC_SYNC 9,25
IAC_SDATAI1 9
IAC_BITCLK 9,25
+5VS
+3VS
KSI[0..7]27
JP8
D D
R13
G13
B13
HSYNC113
VSYNC113
DDC_DATA13
DDC_CLK13
DDC_MD213
M_SEN#13
+5VALW
DAC_BRIG27
CBRST#14,15,16,17,18
+1_5V +1_5V
+1_5VS +1_5VS
SUS_STAT#9,22,30
AGP_BUSY#9
GREQ#4 GGNT# 4
ST04
ST24
RBF#4
SBSTB4
C C
AGP_CLK11
AD_STBB4
GC/BE#24
GIRDY#4
GDEVSEL#4
GC/BE#14
SBA0
SBA2
SBA4
SBA6
AGP_CLK
GAD31
GAD29
GAD27
GAD25
GAD23
GAD21
GAD19
GAD17
GAD14
GAD12
GAD10
GAD8
AD_STBA4
C3_STAT#9
B B
AGP_NBREF4 AGP_VGAREF 4
GAD7
GAD5
GAD3
GAD1
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
61
63
63
65
65
67
67
69
69
71
71
73
73
75
75
77
77
79
79
81
81
83
83
85
85
87
87
89
89
91
91
93
93
95
95
97
97
99
99
101
101
103
103
105
105
107
107
109
109
111
111
113
113
115
115
117
117
119
119
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
SBA1
48
SBA3
50
52
SBA5
54
SBA7
56
58
60
GAD30
62
GAD28
64
GAD26
66
GAD24
68
70
72
74
GAD22
76
GAD20
78
GAD18
80
GAD16
82
84
86
88
90
92
94
GAD15
96
GAD13
98
GAD11
100
GAD9
102
104
106
108
110
GAD6
112
GAD4
114
GAD2
116
GAD0
118
120
CRMA 13
LUMA 13
COMPS 13
TV_SYNC 13
PID0 22
PID1 22
PID2 22
PID3 22
INVT_PWM 27
+5VALW
ENBKL 27
ENVEE 27
PIRQA# 8,14,18
PCIRST# 4,8,14,15,16,17,18,20,22,27,30
ST1 4
PIPE# 4
WBF# 4
SBSTB# 4
GC/BE#3 4
AD_STBB# 4
GFRAME# 4
GTRDY# 4
GSTOP# 4
GPAR 4
AD_STBA# 4
GC/BE#0 4
+1_5V
C375
+
22UF_10V_1206
MD_MIC25 MDC_DN# 28
IAC_SDATAO9,25
IAC_RST#9,25
KSO[0..15]27
TP_DATA27 TP_CLK 27
+3.3VAUX
1 2
+3VS
L35 CHB1608U121
HEADER 2X60
GAD[0..31]4
SBA[0..7]4
GAD[0..31]
SBA[0..7]
AGP_CLK
12
R447
@33
A A
5
12
C580
@22PF
PROPRIETARY NOTE
4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Compal Electronics, Inc.
Title
VGA Connector & MDC Connector
Size Document Number Rev
888M1 1.0
B
Date: Sheet of
12 38Tuesday, April 24, 2001
1
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