Compal LA-1044 Schematics

Page 1
A
B
C
D
E
Cover Sheet
1 1
2 2
888Z3 LA-1044 REV2.0 SCHEMATIC DOCUMENT
Intel (Tualatin) with VIA(VT8606-TwisterT + VT8231)
3 3
BOM &' LN_ SKU W/SS ()
L@ SKU WO/SS () %394@ SKU W/%394 () TV@ SKU W/TVOUT ()
4 4
DJ@ SKU W/AUDIO DJ () DJN_ SKU WO/AUDIO DJ () EQ@ SKU W/EQ () EQN_ SKU WO/EQ () F@ SKU W/FPR () FN_ SKU WO/FPR () SPR@ SKU W/DOCKING CONN. ()
A
!"#$: JOPEN%
PCB Layer Structure:
TOP GND% IN% GND2 VCC IN2 GND3 BOT
B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
D
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1044
Size Document Number Rev
B
401196
*+,
-.
,
Date: Sheet
17, 2002
E
144
of
2A
Page 2
A
Compal confidential
B
C
D
E
Block Diagram
Model Name : 888Z3/LA-1044 (Intel Tualatin)
Intel
Tualatin Micro-FCPGA
1 1
SpeedStep Logic
page 6
VID SELECT
page 7
CRT Connector
page 14
Power On/Off Reset Circuit
page 32
DC/DC Interface RTC Battery
page 33
2 2
Mini PCI
PCMCIA
Socket
page 36 page 16
TFT/HPA Panel Interface
page 15
TV/Out Connector
page 14
VIA VT6306
1394 ControllerENE CB1410
page 18
TV Encoder
CH7005
page 14
AC97 Codec
page 3,4,5
VIA North Bridge
Twister-T
page 8,9,10
MD(0..63)
AD(0..31)
AC Link
VIA South Bridge
page 24
DCLKWR
MA(0..13)
SO-DIMM 0 (Bank 0,1)
VT8231
page 19,20,21
page 12
PCI BUS
CLK_SDRAM0,1
SO-DIMM 1 (Bank 2,3)
Clock Generator
DCLKO
CLK_SDRAM1,2
page 13
CLK_48MHZ 14M_3V
Y1
14.318MHZ
CY28317-2
page 11
+3VSUS +3VRUN
PCLK_PIIX4
14M_3V 14M_5V
PCLK_DOCK
PCLK_PCM
FingerPR
USB
Port 3
page 36
USB HUB
page 37
PCB1
LA-1044 PCB
Slot 0
page 17
Speaker
page 26
14M_5V
I/O Buffer
B
page 33
page 32
BIOS
page 32
Audio EQ
page 25
LPC BUS
KeyBoard
NS87591
page 31
KBDTouch Pad
page 32
AMP Jack
page 26
IDE Damping Resistor
page 22
HDD Connector
page 22
CD Player OZ163
page 23
CD-ROM Connector
page 22
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
* HSP Modem Card * Combo for HSP Modem and
802.11b * Controllerless Modem * Combo for Controllerless
3 3
Modem and 802.11b
RJ45/RJ11 Jack
page 30
LAN
RTL8100
page 29
Power Circuit DC/DC
page 37,38,39,40
4 4
A
D
Port 0,1
page 28
PIO
page 28
FIR
page 27
USB
USB
Port 2
page 27
USB
Port 3
Bluetooth
page 37
Docking Connector
* DC-IN * 2 USB Port * TV Out (S Video) * VGA Out * 2 PS/2 * LAN * Parallel Port * Serial Port * Line Out * Headphone * Microphone
page 35
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044
B
401196
*+,
-.
,
17, 2002
E
244
of
2A
Page 3
A
B
C
D
E
Tualatin/Celeron-T CPU
+CPU_CORE
1 1
D22
F22
E21
H22
G21
K22
J21
M22
L21
P22
N21
T22
R21
V22
U21
Y22
W21
AB22
AA21
AC21
D20
F20
E19
AB20
AA19
AC19
D18
F18
E17
AB18
AA17
AC17
D16
F16
E15
AB16
AA15
AC15
D14
F14
E13
AB14
AA13
AC13
D12
F12
E11
AB12
AA11
AC11
D10
F10E9AB10
AA9
AC9D8F8E7AB8
AA7
VCC_55
VSS_53
B18
D17
VCC_56
VCC_57
VSS_54
VSS_55
F17
E18
VCC_58
VSS_56
AC7D6F6E5H6G5K6J5N5T6V6
VCC_59
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
Data
Signals
VCC_76
VCC_77
VCC_78
VCC_79
VCC_80
VSS_57
AB6
AA5
AC5M6P6
AB17
H_D#[0..63]
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
D#0 D#1 D#2 D#3 D#4 D#5 D#6 D#7 D#8
D#9 D#10 D#11 D#12 D#13 D#14 D#15 D#16 D#17 D#18 D#19 D#20 D#21 D#22 D#23 D#24 D#25 D#26 D#27 D#28 D#29 D#30 D#31 D#32 D#33 D#34 D#35 D#36 D#37 D#38 D#39 D#40 D#41 D#42 D#43 D#44 D#45 D#46 D#47 D#48 D#49 D#50 D#51 D#52 D#53 D#54 D#55 D#56 D#57 D#58 D#59 D#60 D#61 D#62 D#63
VCC_73
VCC_74
VCC_75
U5Y6W5
A16 B17 A17 D23 B19 C20 C16 A20 A22 A19 A23 A24 C18 D24 B24 A18 E23 B21 B23 E26 C24 F24 D25 E24 B25 G24 H24 F26 L24 H25 C26 K24 G26 K25 J24 K26 F25 N26 J26 M24 U26 P25 L26 R24 R26 M25 V25 T24 M26 P24 AA26 T26 U24 Y25 W26 V26 AB25 T25 Y24 W24 Y26 AB24 AA24 V24
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32
H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_D#[0..63] 8
B11
A10 A13
C12 C10
A15 A14 B13 A12
AA3
AB3 C14
AF23
AF4
C22
AD23
AA2
K1
J1 G2 K3
J2 H3 G1 A3
J3 H1 D3 F3 G3 C2 B5
C6 B9 B7 C8 A8
B3 A9
C3
A6
R1 L3 T1 U1 L1 T4
W2
P3
A7 C4
R2 L2 V3
U2 T3
U8A
A#3 A#4 A#5 A#6 A#7 A#8 A#9 A#10 A#11 A#12 A#13 A#14 A#15 A#16 A#17 A#18 A#19 A#20 A#21 A#22 A#23 A#24 A#25 A#26 A#27 A#28 A#29 A#30 A#31 A#32 A#33 A#34 A#35
REQ#0 REQ#1 REQ#2 REQ#3 REQ#4 RP# ADS#
AERR# AP#0 AP#1 BERR# BINIT# IERR#
BREQ0# NC NC NC BPRI# BNR# LOCK#
HIT# HITM# DEFER#
TUALATIN
VCC_0
VCC_1
VCC_2
VCC_3
Address
Lines
Request
Signals
Error
Interface
Arbitration
Signals
Snoop
Signals
VSS_0
VSS_1
E16R4E25
VCC_4
VCC_5
VSS_2
VSS_3
G25
VCC_6
VSS_4
J25
L25
VCC_7
VCC_8
VSS_5
VSS_6
N25
VCC_9
VSS_7
R25
VCC_10
VSS_8
U25
VCC_11
VSS_9
W25
VCC_12
VSS_10
AA25
AC25
VCC_13
VCC_14
VSS_11
VSS_12
AF25
AE26
VCC_15
VCC_16
VSS_13
VSS_14
C23
F23
VCC_17
VCC_18
VSS_15
VSS_16
H23
K23
VCC_19
VCC_20
VSS_17
VSS_18
M23
P23
VCC_21
VCC_22
VSS_19
VSS_20
T23
V23
VCC_23
VCC_24
VSS_21
VSS_22
Y23
AB23
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
Mobile
Tualatin
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
AE23
B22
D21
F21
E22
H21
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC
VSS VCC
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
G22
K21
J22
M21
L22
P21
N22
T21
R22
V21
U22
Y21
W22
AB21
AA22
AC22
AE21
B20
D19
AB19
AA20
AC20
AE19
H_A#[3..31]8
2 2
H_REQ#[0..4]8
H_ADS#8
3 3
H_BREQ0#8
PIR(37)
H_A#[3..31]
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
H_REQ#[0..4] H_D#33
+1.5VS
1 2 1 2 1 2
H_BPRI#8
H_BNR#8
H_LOCK#8
H_HIT#8
H_HITM#8
H_DEFER#8
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
R229 1.5K_0402
R249 @0_0402 R250 10_0402
+CPU_CORE
4 4
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
A
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
D
SCHEMATIC, M/B LA-1044
Size Document Number Rev
Custom
401196
*+
,-.
Date: Sheet
, 17, 2002
3
44
E
of
2A
Page 4
A
B
C
D
E
+VCPU_IO
+1.5VS
+1.5VS
+1.5VS
Place CPURST#
1 1
R208<0.1" from U6
R208
1K_0402
12
R228
1.5K_0402
12
R225
3K_0402
PIR(37)
H_PWRGD6
CPURST#8,20
PIR(37)
BSEL111
2 2
C598
L@1UF_0603
CLK_CPU_APIC11
+1.5VS +1.5VS
R202
150_0402
*26.7_1%_0402
12
12
R200 150_0402
1 2
R194 0_0402
PIR(19)
+VS_CMOSREF
3 3
12
R226
1.5K_0402
+3VS
12
12
H_TRDY#8
GT_A20M#6
GT_IGNNE#6
GT_SMI#6
GT_STPCLK#6
H_DPSLP#20,40
GT_INTR6
GT_CPUINIT#6
H_DBSY#8
H_DRDY#8
R218 1K_0402 1 2 1 2
R220 @1K_0402
R196 @137_1%_0402
CPU_LO/HI#6
Note : GHI# Pull-Up internally
H_RS#08 H_RS#18 H_RS#28
GT_NMI6
PIC_CLK
C278
1 2
R199 @33_0402
@10PF_0402
1 2
R212 56.2_1%_0402
GT_A20M# H_FERR# H_FLUSH# GT_IGNNE#
GT_INTR GT_NMI
H_THERMDA H_THERMDC
1 2
R60 110_1%_0402
ITP_TCK ITP_TDI ITP_TDO ITP_TMS ITP_TRST# ITP_PREQ# ITP_PRDY#
AC3
AF6
AF5 AD9 AD3
AB4
AE4
AF8
AD15 AE14
AE6
B15
AF13 AF14
AE12 AF10 AF16
AD19 AD17 AF20
AF22 AE20 AD22 AD21
AD10
AD7
AD11
AF7
AF15 AF19 AE22
AF12
AD5
AE16
W1
W3
But pull high too weak
12
R51 10K_0402
CRTIT0 CRTIT1 H_THERMDA
12
C87 2200PF_0402
+3VS
+3VS
1 2
R52 10K_0402
R45 1K_0402
1 2
R214 1K_0402
1 2
W=40mil
16
NC
13
NC OS#
5
CRIT0
1
CRIT1
3
DXP
4
DXN
12
R55 200_0402
2
15
U25MAX1617
VCC
14
STBY#
SMBC
12
SMBD
11
ALERT#
ADD1
GND
GND
ADD0
678910
Address:1001_110X
C89 .1UF_0402
1 2
Thermal Sensor MAX1617
R44 @10K_0402
1 2
+3VS
B
MAINP
+3VS
+3VS
12
12
R57
R59
@0_0402
@0_0402
R46 @0_0402
1 2
4 4
12
12
R54
R58
@0_0402
@0_0402
R187 @0_0402
THERMDA_59131 THERMDC_59131
1 2 1 2
R188 @0_0402
A
AA18
AC18
AE17
B16
D15
F15
AB15
AA16
AC16
AE15
B14
D13
F13
E14
AB13
AA14
AC14
AE13
B12
D11
F11
E12
AB11
U8B
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
Y3
RS#0
V1
RS#1
U3
RS#2
M5
Request
RSP#
Signals GND
TRDY#
A20M# FERR# FLUSH# IGNNE# SMI# PWRGOOD STPCLK#
Compatibility
DPSLP# INTR/LINT0 NMI/LINT1 INIT# RESET#
DBSY#
Y1
DRDY#
THERMDA THERMDC
SELFSB0 SELFSB1 EDGECTRLP
PICD0 PICD1 PICCLK
RP2# RP3# BPM0# BPM1#
TCK TDI TDO TMS TRST# PREQ# PRDY#
CMOSREF_1 CMOSREF_0 RTTIMPDEP
L5
GHI#
+VCPU_IO
EC_SMC2 23,31,35 EC_SMD2 23,31,35
From 87591
VCCT_1
VCCT_2
A26
G23
1.5K_0402
APIC
Debug Break
Point
Test
Access
PORT ( ITP )
VCCT_3
VCCT_4
VCCT_5
VCCT_6
VCCT_7
VCCT_8
VCCT_9
VCCT_10
VCCT_11
VCCT_12
VCCT_13
VCCT_14
VCCT_15
VCCT_16
J23
L23
N23
R23
U23
W23
AA23
C21
C19
AD20
C17
AD18
C15
C13
+3VS+1.5VS
12
12
R201
R62
4.7K_0402
1
Q12
2
FDV301N
3
H_FERR#
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
AA12
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VCCT VID
VCCT_17
VCCT_18
VCCT_19
VCCT_20
VCCT_21
VCCT_22
AD14
C11
AD12C9C7
AD8C5AD6
FERR# 20
C
AC12
AE11
VSS_81
VSS_82
VCCT_23
VCCT_24
AC23
B10D9F9
VSS_83
VSS_84
VSS_85
VCCT_25
VCCT_26
VCCT_27
AA4E4G4J4L4
+VCPU_IO
VSS_86
VCCT_28
E10
AB9
AA10
AC10
AE9B8D7F7E8
AB7
AA8
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
Mobile
Tualatin
VCCT_29
VCCT_30
VCCT_31
VCCT_32
VCCT_33
VCCT_34
VCCT_35
VCCT_36
VCCT_37
VCCT_38
AC4V4AE3
AF2
AF1
AE18D5E6
R191
1 2
56.2_1%_0402 R492
+1.5VS
PIR(1)
ITP_TMSH_THERMDC
1 2
RP8
10
9 8 7 6
10P8R-1.5K
200_0402
AC8
AE7B6F5H5G6K5J6N6L6T5R6V5U6Y5W6
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VID0
VID1
VID2
VID3
VID4
VSS
VSS
VSSNCNC
AB1
AC2
AE2
AF3R3B26M4AF26C1AF17
ITP_PRDY#
ITP_PREQ#
ITP_TRST#
1
ITP_TDO
2
ITP_TCK
3
ITP_TDI
4 5
AB5
AA6
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
NC
N4
CPU_VR_VID4 7 CPU_VR_VID3 7 CPU_VR_VID2 7 CPU_VR_VID1 7 CPU_VR_VID0 7
D
AC6
AE5B4D4F4H4K4M3U4W4B2D2F2H2
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
Data
Signals
VTT Ref
Analog
VTTPWRGOOD
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
AD2
AE1
A25
C25
E20
F19
VTT_PWRGD#11,31,42
CLK_BCLK11
CLK_BCLK#11
Title
Size Document Number Rev
Custom
Date: Sheet
VSS_127
VSS_128
NCHCTRLP
VSS_130
VSS_131
K2M2P2T2V2Y2AB2
Tualatin/Celeron-T CPU
VSS_129
AE24
DEP#0
AD25
DEP#1
AE25
DEP#2
AC24
DEP#3 DEP#4 DEP#5 DEP#6 DEP#7
VREF_1 VREF_2 VREF_3 VREF_4 VREF_5 VREF_6 VREF_7 VREF_8
TESTLO
VCC PLL1 PLL2
NC NC NC NC
CLK0
CLK0#
TESTLO
NC
TESTHI
NC NC NC
TESTHI
NC
NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7
NC
TUALATIN
CLK_BCLK CLK_HCLK
12
R266 475_1%_0402
+VCPU_IO
AF24 AD26 AC26 AD24
AF21 AB26 H26 A21 AF9 A4 N1 AA1
Y4 R5 N3 N2 P1 P5 E1 F1
AC1 AD1 M1
AF18 AD16 AF11 AE8 N24 AE10 E2
P4
AD4 A5 D1 AD13 B1 P26 A11
E3
D26
+V_AGTLREF
TESTLO1 VCPU_PLL1
VCPU_PLL2
C370 33UF_16V_D2
CLK_HCLK CLK_HCLK# TESTLO2
NCHCTRLP TESTHI1
TESTHI2
VTT_PWRGD
VTT_PWRGD#
2N7002
R259 33_0402
1 2
R264 60.4_1%_0402
1 2
Place all these Block's Components near CPU (U6)
R261 60.4_1%_0402
1 2
R260 33_0402
1 2
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044 401196
*+
,-.
, 17, 2002
RP28 1 8 2 7 3 6 4 5
8P4R_1K_0804
+CPU_CORE
L46
1 2
LQG21N4R7K10_4.7UH
+
1 2
R209 14_1%_0402
CLK_HCLK CLK_HCLK#
R262 @33_0402
1 2
C369 @10PF_0402
Q31
2
E
+VCPU_IO
1 3
12
12
4
1 2
R267 2K_0402
VTT_PWRGD
C371 @2.2UF_10V_0805
CLK_HCLK#CLK_BCLK#
of
TESTLO1 TESTLO2 TESTHI2 TESTHI1
+VCPU_IO
+VCPU_IO
R258 @33_0402
C367 @10PF_0402
44
2A
Page 5
A
B
C
D
E
CPU Decoupling CAP.
Layout note :
1 1
Place close to CPU, Use 2~3 vias per PAD. Place 0.22uF caps underneath balls on solder side. Place 10uF caps on the peripheral near balls. Use 2~3 vias per PAD.
Layout note :
Place close to CPU, Use 2 vias per PAD.
+CPU_CORE
12
.22UF
12
.22UF
C321
C303
12
C287
.22UF
12
C319
.22UF
12
C67 10UF_6.3V_P
12
C232 10UF_6.3V_P
12
.22UF
12
.22UF
C288
C320
12
.22UF
12
.22UF
C284
C335
12
.22UF
12
.22UF
C285
C317
12
12
.22UF
C339
.22UF
C318
12
12
C275
C274
.22UF
.22UF
+CPU_CORE
12
12
C336
C338
2 2
3 3
.22UF
.22UF
+CPU_CORE
12
C71 10UF_6.3V_P
+CPU_CORE
12
C236 10UF_6.3V_P
+CPU_CORE
12
C76
+
470UF_4V_D4
ESR=%8m ohm ESR=%8m ohm
+
12
C283
.22UF
12
C337
.22UF
12
C70 10UF_6.3V_P
12
C235 10UF_6.3V_P
12
C62 470UF_4V_D4
12
.22UF
12
.22UF
C270
C299
12
12
12
+
12
C271
.22UF
12
C300
.22UF
C69 10UF_6.3V_P
C234 10UF_6.3V_P
C104 470UF_4V_D4
12
.22UF
12
.22UF
C272
C302
+
12
C68 10UF_6.3V_P
12
C233 10UF_6.3V_P
12
C102 470UF_4V_D4
ESR=%8m ohmESR=%8m ohm
+VCPU_IO
12
C286 1UF_10V
12
C368
+
220UF_2.5V_D2
ESR=25m ohm
12
C304 1UF_10V
C=690uF
C=690uF
C=690uFC=690uF
ESR=%0.
ESR=%0.465m ohm .
465m ohm .
ESR=%0.ESR=%0.
465m ohm .465m ohm .
(CPU)
(CPU)
(CPU)(CPU)
12
12
C322
C273
1UF_10V
1UF_10V
12
C289 1UF_10V
12
C92
+
470UF_4V_D4
ESR=%8m ohm
+VCPU_IO
12
C269 1UF_10V
Tualatin
D4 D3 D2 D1 D0 CPU_Core(V) QS( MP)
-------------------------------------------------------
0
110
111
0 1.15V0
-------------------------------------------------------
1.40V
0
12
C301 1UF_10V
12
C316 1UF_10V
12
12
C340
C334
1UF_10V
1UF_10V
300 MHz & 0.95V : 4.11A 500 MHz & 1.05V : 6.38A 533 MHz & 1.05V : 6.61A 700 MHz & 1.10V : 8.40A 733 MHz & 1.15V : 9.39A 800 MHz & 1.15V : 9.84A 1000 MHz & 1.40V : 16.83 A 1066 MHz & 1.40V : 17.46 A 1133 MHz & 1.40V : 18.11 A
EMTS updated by the note released on April 27 , 2001.
+CPU_CORE
12
C231
+
220UF_2.5V_D2
ESR=25m ohm ESR=25m ohm
4 4
A
12
C230
+
220UF_2.5V_D2
Ctotal=2320uF
Ctotal=2320uF
Ctotal=2320uFCtotal=2320uF
ESR=3.309m
ESR=3.309m
ESR=3.309mESR=3.309m ohm
ohm
ohmohm
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
D
SCHEMATIC, M/B LA-1044
Size Document Number Rev
Custom
401196
*+
,-.
Date: Sheet
, 17, 2002
5
44
E
of
2A
Page 6
A
B
C
D
E
Geyserville Logic
without Geyserville, GHI#(CPU_LO/HI#) can
+1.5VS
+VCPU_IO
+3V
+3VS
+3VS
+3VS
+3VS
FD5
1
FIDUCIAL MARK
CF5
1
FIDUCIAL MARK
CF14
1
FIDUCIAL MARK
CF17
1
FIDUCIAL MARK
CF4
1
FIDUCIAL MARK
OPEN
+3V +3VS +3VS +3VS +3VS
1
FIDUCIAL MARK
1
FIDUCIAL MARK
1
FIDUCIAL MARK
1
FIDUCIAL MARK
1
FIDUCIAL MARK
RP39
8P4R_1.5K_0804
RP22 1 8 2 7 3 6 4 5
LN_8P4R_4.7K_0804 1 2 1 2
1 2 1 2 1 2 1 2 1 2
1
FIDUCIAL MARK
1
FIDUCIAL MARK
1
FIDUCIAL MARK
GT_NMI GT_INTR GT_IGNNE# GT_A20M#
GT_CPUINIT# GT_STPCLK# GT_SMI# CPU_LO/HI#
VR_HI/LO#
G_VR_POK
GT_CPU_STP#
GT_SUSTAT1#
FD3
CF16
CF13
1 8 2 7 3 6 4 5
1 2
R129 1K_0402
1 2
R138 680_0402
1 2
R322 330_0402
1 2
R128 L@1.5K_0402
1 2
R135 10K_0402
1 2
R357 LN_10K_0402
1 2
R333 4.7K_0402
1 2
R345 10K_0402
R137 LN_4.7K_0402 R323 10K_0402
R349 LN_1K_0402 R341 10K_0402 R347 LN_10K_0402 R328 @10K_0402 R334 @10K_0402
FD6
CF6
CF18
CF11
CF1
HCPUINIT# HNMI HINTR HSMI#
HSTPCLK# VRCHGNG#
CRESET# GT_LO/HI# SUS_STAT# HA20M# HIGNNE#
PIR(28)
FD1
1
FIDUCIAL MARK
CF10
1
FIDUCIAL MARK
CF7
1
FIDUCIAL MARK
FD2
1
FIDUCIAL MARK
CF19
1
FIDUCIAL MARK
CF3
1
FIDUCIAL MARK
U32 LN_AMI11686-001
HNMI
HNMI20
R494
100K_0402
22K
2
Q61 DTC124EK
C484 LN_15PF_0402
+5VS
C
B
22K
HOLEB
HINTR HCPUINIT#
HSMI# HSTPCLK#
SUS_STAT# CPUSTP#
GT_LO/HI#
VGATE
CRESET#
LN_14.318MHZ
12
12
2
G
13
E
HA6 HOLEA
1
1
HB1
1
1
Y6
1 2
13
D
S
HOLEB
R346 LN_1K_0402
12
LN_15PF_0402
HNMI
Q60 2N7002
PIR(6)
HA1 HOLEA
1
1
HB4
1
1
12
HINTR20
1 1
2 2
3 3
HCPUINIT#20
HSTPCLK#20
SUS_STAT#20,29
CPUSTP#11,20,33
GT_LO/HI#20
CRESET#9
CRESET#
HSMI#20
VR_ON31,34,40 VGATE40
C481
HA3 HOLEA
1
HB2
HOLEB
1
20
NMI
16
INTR
22
INIT#
24
A20M#
21
IGNNE#
17
SMI#
23
STPCLK#
19
SUSSTAT1#
13
CPU_STP#
14
G_LO/HI#
15
VR_ON
29
VGATE
43
IGN_VGATE#
28
VR100/50#
44
PLL30/60#
41
CRESET#
26
CLK_IN
25
CLK_OUT
45
CLKEN#L
38
STB#
37
DIN
36
DOUT
GND
GND
618314227
HA20M#20 GT_A20M# 4
HIGNNE#20
HA2
HA5
HOLEA
HOLEA
1
1
HB3
HOLEB
1
1
1
HC1
HOLEC
1
1
1
G_NMI
G_INTR
G_INIT#
G_A20M#
G_IGNNE#
G_SMI#
G_STPCLK#
G_SUSSTAT1#
G_CPU_STP#
RESERVED
CPUPWRGD
VRPWRGD
VRCHGNG#
VR_HI/LO#
LP_TRANS#
RESERVED RESERVED RESERVED
GND
GND
GND
VCC3
VCC3
30
7
12 C423
LN_.01UF_0402
CPUSTP# HINTR HSMI# HCPUINIT#
HNMI SUS_STAT#
VGATE G_VR_POK HSTPCLK# GT_STPCLK#
HA4 HOLEA
1
1
1
1
HD1
HOLED
1
1
GT_NMI
1
GT_INTR
4
GT_CPUINIT#
8 48 2
GT_SMI#
5
GT_STPCLK#
3
GT_SUSTAT1#
11
GT_CPU_STP#
47 46 10
GHI#
H_PWRGD
9
G_VR_POK
32
VRCHGNG#
12
VR_HI/LO#
33 34
35 39 40
12 C466
LN_.1UF_0402
HA20M#
HIGNNE#
RP43
L@16P8R_0 R361 L@0_0402 R134 L@0_0402
for without Geyserville
HA7 HOLEA
1
1
HD2
HOLED
1
1
1 2
+3V
R327 0_0402
R331
0_0402
1 2 1 2
R136
LN_10K_0402
12
12
89 710 611 512 413 314 215 116
HA8 HOLEA
1
1
2
G
GT_A20M#
GT_IGNNE#
GT_CPU_STP# GT_INTR GT_SMI# GT_CPUINIT#
GT_NMI GT_SUSTAT1#
HA9 HOLEA
1
GT_NMI 4 GT_INTR 4 GT_CPUINIT# 4
GT_SMI# 4 GT_STPCLK# 4
GT_SUSTAT1# 9 GT_CPU_STP# 7,11
H_PWRGD 4 G_VR_POK 33
VRCHGNG# 20 VR_HI/LO# 7,40
CPU_LO/HI#
13
D
Q18
S
LN_SI2302DS
1
L@_1.5K_0402
H_PWRGD
GT_IGNNE# 4
CPU_LO/HI# 4
R499
+3VS
12
2
31 Q63 L@_FDV301N
SPWROFF# 19,20,31,33
PIR(16)
Fiducial Mark
FD4
1
FIDUCIAL MARK
CF12
1
FIDUCIAL MARK
CF15
1
FIDUCIAL MARK
CF8
1
FIDUCIAL MARK
CF2
1
FIDUCIAL MARK
4 4
A
HE1 HOLEE
1
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
B
C
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044
B
401196
*+,
-.
,
17, 2002
E
644
2A
of
Page 7
A
B
C
D
E
+3VS
U11
5
PCISTP#11,20
PM_SLP_S1#10,19,20,31,33
1 1
CPU_VR_VID0 CPU_VR_VID1 CPU_VR_VID2 CPU_VR_VID3
CPU_VR_VID4
RP14 1 8 2 7 3 6 4 5
L@8P4R-0 1 2
R263
L@0_0402
CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3
CPU_VID4
GT_CPU_STP#6,11
DPSLP#20
1 2
R79 @1.2K_0402
1 2
R78 @56_0402
C116
@1UF_10V
C118
@.1UF_0402
1 2
3
12
+3VS
5 1
2 3
12
@7SH32
U9
@7SH32
4
R493
@0_0402
4
+3VS
2 1
U10 @7SH00
1 2
3 5
DPRSLPVR
4
12
R501 0_0402
DPRSLPVR 40
CPU Voltege ID
PIR(28,30)
201
VCC3SCL
19
ASEL
18
WP
17 16
15
Y-0
14
Y-1
13
Y-2
12
Y-3
11
Y-4
RP79 1 8 2 7 3 6 4 5
LN_8P4R_0 1 2
R502
LN_0_0402
U12
B0 D0 B1 D1 B2 D2 B3 D3 B4 D4
BE#
@SN74CBT3383
+3V
12
C374 LN_.1UF_0402
R275 LN_0_0402
1 2
VID0 VID1 VID2 VID3 VID4
CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3
CPU_VID4
C0A0 C1A1 C2A2 C3A3 C4A4
VCC
GNDBX
+VCPU_IO
12
R48
+1.5VS
1K_1%_0402
12
R53 2K_1%_0402
PIR(22)
12
R230 510_0402
12
R235 1K_0402
R272
1 2
LN_0_0402
ADDRESS: ASEL = LOW => 6E/6F
R274 LN_10K_0402
1 2
13
D
Q32
2
G
S
LN_SI2302DS
CPU_VID0
23
CPU_VID1
67
CPU_VID2
1011
CPU_VID3
1617
CPU_VID4
2021
+5V 24 1213
12
C117 @.01UF_0402
+3V
CPU_VID0 40 CPU_VID1 40 CPU_VID2 40 CPU_VID3 40 CPU_VID4 40
GTL Reference Voltage
Layout note :
1. Place R48 and R53 between the TwisterT and CPU.
2. Place decoupling caps near CPU.(Within 500mils)
12
C255 .1UF_0402
12
C256 .1UF_0402
12
C351 .1UF_0402
12
C350 .1UF_0402
+V_AGTLREF
CMOS Reference Voltage
Layout note :
1. Place R230 and R235 between the TwisterT and CPU.
2. Place decoupling caps near CPU.
12
C308 .1UF_0402
12
C352 .1UF_0402
+VS_CMOSREF
R271 @0_0402
R76 @0_0402
1 2
R270
1 2
@0_0402
R72
@10K_0402
R71
@0_0402
1 2
R273 LN_0_0402
1 2
R269 LN_0_0402
CPU_VR_VID0 CPU_VR_VID1 CPU_VR_VID2 CPU_VR_VID3
CPU_VR_VID4
+3V
12
182736
45
RP21 @8P4R_10K_0804
12
12
12
12
12
U28
2
SDA
3
Override#
4
I-0
5
I-1
6
I-2
7
I-3
8
I-4
9
Level
10
GND
LN_FM3560
VID0 VID1 VID2 VID3 VID4
STRAP_VID0 STRAP_VID1 STRAP_VID2 STRAP_VID3 STRAP_VID4
DPRSLPVR
Non_Mux_Out
Mux_Sel
VR_HI/LO#6,40
VID0 VID1 VID2 VID3
VID4
4 5
8 9 14 15 18 19 22 23
1
EC_SMC131,32,41
SMB_SB_CK12,20
EC_SMD131,32,41
SMB_SB_DA12,20
2 2
3 3
4 4
+3V
CPU_VR_VID04 CPU_VR_VID14 CPU_VR_VID24 CPU_VR_VID34 CPU_VR_VID44
Default for Resistors Should be +VCC_CPU = 0.85V, for Deeper Sleep Only. VID[4:0]->10101
R73
R74 @0_0402
@0_0402
@0_0402
RP27
1 8 2 7 3 6 4 5
8P4R_1K_0804
1 2
R268 1K_0402
R75
PIR(30)
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
A
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
D
SCHEMATIC, M/B LA-1044
Size Document Number Rev
Custom
401196
*+
,-.
Date: Sheet
, 17, 2002
7
44
E
of
2A
Page 8
A
B
C
D
E
TwisterT(VIA_VT8606)-A
W=40mils
12
C312
1UF_10V
H_REQ#[0..4] H_RS#[0..2] H_D#[0..63] H_A#[3..31]
12
+
C246 47UF_6.3V_B
12
+
C280 47UF_6.3V_B
CPURST#4,20 H_ADS#3 H_BNR#3 H_BPRI#3
H_DBSY#4 H_DEFER#3
H_DRDY#4
H_HIT#3 H_HITM#3 H_LOCK#3 H_TRDY#4
H_BREQ0#3
12
C358
1UF_10V
12
C357 1000PF_0402
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
R232
1 2
0_0402
H_RS#0 H_RS#1 H_RS#2
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
HCLK_NB
12
C305 1000PF_0402
2.5V +- 5%
+2.5VS
U7A
A25
HA3#
D24
HA4#
B25
HA5#
B26
HA6#
E23
HA7#
C26
HA8#
C24
HA9#
A23
HA10#
C25
HA11#
D22
HA12#
B24
HA13#
D25
HA14#
F22
HA15#
C23
HA16#
D21
HA17#
A20
HA18#
C22
HA19#
A21
HA20#
B23
HA21#
A22
HA22#
B21
HA23#
E20
HA24#
B22
HA25#
B19
HA26#
C20
HA27#
A24
HA28#
B20
HA29#
D20
HA30#
C21
HA31#
A19
CPURST#
J24
ADS#
D26
BNR#
E26
BPRI#
H26
DBSY#
F26
DEFER#
J23
DRDY#
G24
HIT#
G26
HITM#
G23
HLOCK#
G25
HTRDY#
J25
BREQ0#
H23
RS0#
K23
RS1#
H25
RS2#
E24
HREQ0#
F23
HREQ1#
F24
HREQ2#
F25
HREQ3#
E25
HREQ4#
G22
HCLK
E12
GTLVREF
E21
GTLVREF1
VIA_VT8606
L9M9R9T9V10
J11
J12
J15
V15
J16
L18
M18
T18
U18
J9K9U9V9J10
V11
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VT8606 TwisterT
HOST INTERFACE
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
N6
B2N3L11
GND
GND
GND
GND
GND
GND
GND
GND
N11
A18
P11
T11
M12
N12
P12
R12
GND
AF18
C19
AD19
F21
N21
P21
AA21
V12
VDD25
GND
D23
V16
AC23
J17
VDD25
VDD25
GND
GND
H24
V17
VDD25
GND
W24
J18
VDD25
GND
A26
K18
VDD25
GND
J26
R18
VDD25
GND
V26
V18
VDD25
GND
AF26
HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8#
HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63#
H_D#0
E19
H_D#1
B18
H_D#2
B16
H_D#3
A16
H_D#4
C18
H_D#5
C17
H_D#6
D18
H_D#7
D15
H_D#8
D17
H_D#9
C16
H_D#10
B17
H_D#11
D16
H_D#12
A17
H_D#13
A15
H_D#14
E16
H_D#15
D19
H_D#16
A14
H_D#17
E18
H_D#18
E17
H_D#19
B14
H_D#20
C15
H_D#21
E14
H_D#22
B11
H_D#23
D14
H_D#24
B15
H_D#25
D13
H_D#26
C13
H_D#27
E9
H_D#28
C12
H_D#29
D12
H_D#30
E15
H_D#31
A13
H_D#32
B12
H_D#33
B13
H_D#34
A12
H_D#35
E13
H_D#36
D11
H_D#37
D10
H_D#38
A11
H_D#39
E10
H_D#40
E8
H_D#41
C9
H_D#42
D9
H_D#43
C11
H_D#44
B10
H_D#45
A10
H_D#46
E7
H_D#47
D8
H_D#48
B8
H_D#49
C10
H_D#50
B6
H_D#51
B9
H_D#52
F8
H_D#53
D6
H_D#54
D7
H_D#55
C7
H_D#56
E5
H_D#57
A7
H_D#58
E6
H_D#59
B7
H_D#60
C6
H_D#61
D5
H_D#62
A6
H_D#63
A8
H_REQ#[0..4]3
H_RS#[0..2]4
12
C342 .1UF_0402
12
C309 .1UF_0402
H_D#[0..63]3
H_A#[3..31]3
12
C282 .1UF_0402
12
C323 .1UF_0402
1 1
+2.5VS
12
12
12
12
12
12
C295
C291
C307
C326
.01UF_0402
.01UF_0402
.01UF_0402
+2.5VS
12
12
12
C266
C324
.01UF_0402
.01UF_0402
2 2
C354 .01UF_0402
12
.1UF_0402
C330 .1UF_0402
C292 .1UF_0402
12
C310 .1UF_0402
C327 .1UF_0402
12
C268 .1UF_0402
12
C279 .1UF_0402
12
C281 .1UF_0402
PIR(37)
R213
1 2
75_1%_0402
150_1%_0402
+GTL_VREF
2/3 +VCPU_IO +- 2%
12
R215
3 3
HCLK_NB11
+VCPU_IO
12
R242
@10_0402
12
C366
@27PF_0402
** Place as close to TwisterT as possible.
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044
B
401196
*+,
-.
,
17, 2002
E
844
2A
of
Page 9
A
B
C
D
E
TwisterT(VIA_VT8606)-B
1 1
MMD[0..63]13
+3VS
12
C277
C293
C311
C315
12
C297
.01UF_0402
12
C329
.01UF_0402
12
C332
.01UF_0402
12
C306
.01UF_0402
C296 .01UF_0402
12
C294 .01UF_0402
12
C314 .01UF_0402
12
C328 .01UF_0402
12
1000PF_0402
2 2
+3VS
12
1000PF_0402
+3VS
12
1000PF_0402
3 3
+3VS
12
1000PF_0402
4 4
MMD[0..63]
** Place as close to VT8606 as possible.
12
C331 .1UF_0402
12
C349 .1UF_0402
12
C325 .1UF_0402
12
C265 .1UF_0402
12
C348 .1UF_0402
12
C356 .1UF_0402
12
C355 .1UF_0402
12
C290 .1UF_0402
12
C347 1000PF_0402
12
C333 1000PF_0402
MMD0 MMD1 MMD2 MMD3 MMD4 MMD5 MMD6 MMD7 MMD8 MMD9 MMD10 MMD11 MMD12 MMD13 MMD14 MMD15 MMD16 MMD17 MMD18 MMD19 MMD20 MMD21 MMD22 MMD23 MMD24 MMD25 MMD26 MMD27 MMD28 MMD29 MMD30 MMD31 MMD32 MMD33 MMD34 MMD35 MMD36 MMD37 MMD38 MMD39 MMD40 MMD41 MMD42 MMD43 MMD44 MMD45 MMD46 MMD47 MMD48 MMD49 MMD50 MMD51 MMD52 MMD53 MMD54 MMD55 MMD56 MMD57 MMD58 MMD59 MMD60 MMD61 MMD62 MMD63
+3VS +- 5%
+3VS +VCPU_IO
M23
M26 M24
AD22 AF22 AB21 AE21 AB20 AD20 AE20 AC19 AF19 AC18 AE18 AD17 AF17 AB17 AE16 AC16
M22 M25
AE22 AC21 AD21 AF21 AC20 AF20 AB19 AE19 AB18 AD18 AA19 AE17 AC17 AD16 AF16 AB16
K25 L26 L25
N26 N24 P23 P25 R23 R25 P22 T23 T25 T22
K26 L23
L24 N23
N25 N22 P26 P24 R26 R24 R22 T26 T24 U23
U7B
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63
VIA_VT8606
GND
GND
GND
P1
AF1D4AC4F6P6
G6
H6
VCC3
J6
VCC3
VCC3
L4
R21
VCC3
T4
VCC3
VCC3
U21
VCC3
V6
V21
VCC3
W6Y6AA7
VCC3
VCC3
VCC3
Y21
VCC3
AA9
VCC3
AA10
VCC3
VT8606 TwisterT
DRAM INTERFACE
GND
GND
GND
GND
GND
GND
GND
GND
GND
AA6C8AD8A9N9P9AF9
GND
GND
GND
GND
GND
M11
R11
L12
T12
F13
VCC3
GND
AA17
J13
VCC3
GND
AA18
V13
AA20
VCC3
GND
L13
VCC3
GND
M13
GND
F7
F10
F12
F17
G21
F20
F18
E11
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
GND
N13
VTT
GND
GND
GND
GND
GND
GND
GND
GND
P13
R13
T13
AA13
AD13
C14
J14
V14
L15
VTT
GND
K21
J21F9F19
VTT
GND
T15
M16
VTT
RAS0#/CS0# RAS1#/CS1# RAS2#/CS2# RAS3#/CS3# RAS4#/CS4# RAS5#/CS5#
DQM0/CAS0# DQM1/CAS1# DQM2/CAS2# DQM3/CAS3# DQM4/CAS4# DQM5/CAS5# DQM6/CAS6# DQM7/CAS7#
SRASA# SCASA#
SWEC#/CKE0
SCASC#/CKE1
SWEB#/CKE2 SCASB#/CKE3 SRASC#/CKE4 SRASB#/CKE5
VSUS25
SUSST#
PLLTEST
CRSTD#
PWROK
PCIRST#
GND
GND
GND
GND
R16
N18
P18
M21
MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8
MA9 MA10 MA11 MA12 MA13 MA14
SWEA#
DCLKO
DCLKI
GND
GND
T21
+VCPU_IO
12
W=5mils
C365
R237 @100_0402
1 2
R248
@500
1 2
PIR(26)
PIR(26)
12
+3V
+
C298 47UF_6.3V_B
W=5mils
R234 10_0402
1 2 12
C345 15PF_0402
R265
4.7K_0402
21
MMA0
AA23
MMA1
AB23
MMA2
AB26
MMA3
AB25
MMA4
AB24
MMA5
AC26
MMA6
AC25
MMA7
AC24
MMA8
AD26
MMA9
AD25
MMA10
AE26
MMA11
AD24
MMA12
AE24
MMA13
AE25
MMA14
AF25
RRAS0#
R256 22_0402
Y26
RRAS1#
Y25
RRAS2#
Y24
RRAS3#
Y23 Y22 W21
RRCAS#0
V23
RRCAS#1
W23
RRCAS#2
AF24
RRCAS#3
AE23
RRCAS#4
W26
RRCAS#5
W25
RRCAS#6
AD23
RRCAS#7
AF23
S_RASA#
AA24
S_CASA#
U22
RM_WEA#
U24
CKE0_1
U26
CKE1_1
V24
CKE2_1
U25
CKE3_1
V25 AA26 AA25
DCLKO_R
J22
W=5mils
K22
V22
N/C
W22
NC PINs
N/C
AB22
N/C
VSUS25
AA22
AC22 K24
CRESET#
E22 AD14 AE15
1 2
R252 22_0402
1 2
R240 22_0402
1 2
R239 22_0402
1 2
RP30 8P4R_22_0804
4 5 3 6 2 7 1 8 4 5 3 6 2 7 1 8
RP35 8P4R_22_0804
R246 10_0402
1 2
R238 10_0402
1 2
R247 10_0402
1 2
R257 33_0402
1 2
R245 33_0402
1 2
R251 33_0402
1 2
R253 33_0402
1 2
R241
1 2
18_0402
@22PF_0402
place closely to VT8606
GT_SUSTAT1# 6 CRESET# 6
PWROK 33 PCIRST# 14,16,18,19,22,23,29,31,36
12
C353
@.1UF_0402
PIR(14,35)
12
D14 1N4148
VSUS25
+VCPU_IO +VCPU_IO
12
C592 1000PF_0402
RAS#0 12 RAS#1 12 RAS#2 13 RAS#3 13
RCAS#0 12,13 RCAS#1 12,13 RCAS#2 12,13 RCAS#3 12,13 RCAS#4 12,13 RCAS#5 12,13 RCAS#6 12,13 RCAS#7 12,13
SRASA# 12,13 SCASA# 12,13 RMWEA# 12,13
CKE0 12 CKE1 12 CKE2 13 CKE3 13
DCLKO 11 DCLKRW 11
12
C593 .1UF_0402
MMA[0..14]
PIR(17)
+3VS
12
+
C341 47UF_6.3V_B
MMA[0..14] 13 RCAS#[0..7] 12,13
+3VS
R65 @10K_0402
MMA4
1 2
R255 @10K_0402
MMA3
1 2
R254 @10K_0402
MMA2
1 2
R66 10K_0402
MMA6
1 2
R67 10K_0402
MMA8
1 2
R64 @10K_0402
MMA12
1 2
MA4 L DISABLE INTA# CLAIM
H ENSABLE INTA# CLAIM
MA3 L DISABLE I/O ACCESS
H ENABLE I/O ACCESS
MA2 L ADDRESS MAPPING 1
H ADDRESS MAPPING 0
MA12 MA8
00=66 MHZ 01=AUTO 11 = 133 MHZ 10 = 100 MHZ
MA6 GTL INTRNAL PULLUPS 0 ENABLE 1 DISABLE
CPU FSB FREQ.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044
B
401196
*+,
-.
,
17, 2002
E
944
2A
of
Page 10
A
C364 1UF_10V
RP7
1 2 3 4 5
@10P8R_10K
RP6
1 2 3 4 5
10P8R_10K
CBE#[0..3] AD[0..31]
HB-1M2012-601JT
12
C360
+
10UF_10V_1206
10 9 8 7 6
10 9 8 7 6
+3VS
53
2 4
L43
GNT#0 GNT#1 GNT#2 GNT#3
REQ#0 REQ#1 REQ#2 REQ#3
U23
NC7S04
+2.5VS
+3VS
+3VS
REQ#036 REQ#136 REQ#229 REQ#316 REQ#418,21
GNT#036 GNT#136 GNT#229 GNT#316 GNT#418,21
PREQ#19
PGNT#19
FRAME#16,18,19,29,36
PLOCK#19
PAR16,18,19,29,36 SERR#16,19,29,36 TRDY#16,18,19,29,36
IRDY#16,18,19,29,36 STOP#16,18,19,29,36
DEVSEL#16,18,19,29,36 PCLK_NB11 CLKRUN#16,19,31,36
LVDS2_C+15 LVDS2_C-15 LVDS2_2+15 LVDS2_2-15 LVDS2_1+15 LVDS2_1-15 LVDS2_0+15 LVDS2_0-15 LVDS1_C+15 LVDS1_C-15 LVDS1_2+15 LVDS1_2-15 LVDS1_1+15 LVDS1_1-15 LVDS1_0+15 LVDS1_0-15
SUSPEND
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
CBE#0 CBE#1 CBE#2 CBE#3
REQ#0 REQ#1 REQ#2 REQ#3 REQ#4
GNT#0 GNT#1 GNT#2 GNT#3 GNT#4
PREQ# PGNT#
PCLK_NB
+VCCA
16,18,19,29,36
CBE#[0..3]
AD[0..31]16,18,19,29,36
1 1
+3VS
2 2
+3VS
3 3
4 4
C362
1000PF_0402
GNT#4
PGNT# PREQ# REQ#4
12
12
PM_SLP_S1#7,19,20,31,33
+VCCA
PCLK_NB
R221
10_0402
C313
15PF_0402
AF14 AE14 AE13 AF13 AC14 AB14 AC13 AB13 AE12 AD12 AB12 AC12 AF11 AE11 AD11 AC11
AA8 AC9 AF8 AE8 AE7 AB8 AF7 AC8 AC7 AB7 AF6 AE6 AD6 AC6 AB6 AF5
AF12 AB11
AD9 AD7
AC5 AD5 AE4 AD4 AF2
AB5 AF4 AF3 AE3 AE2
AC15 AD15
AE9
AE5 AB10 AF10 AD10 AC10 AE10
AB9 AB15 AF15
AD1
AE1
AA4
AB4
AC3
AD3
AC2
AD2
AB1
AC1
AA5
AA3
AB3
Y5
W4
Y4
H22 H21
B
U7C
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
CBE0# CBE1# CBE2# CBE3#
REQ0# REQ1# REQ2# REQ3# REQX#
GNT0# GNT1# GNT2# GNT3# GNTX#
PREQ# PGNT#
FRAME# PLOCK# PAR SERR# TRDY# IRDY# STOP# DEVSEL# PCLK CLKRUN#
ZCP ZCM Z2P Z2M Z1P Z1M Z0P Z0M YCP YCM Y2P Y2M Y1P Y1M Y0P Y0M
VCCA VCCA
VIA_VT8606
GNDA
L22
GNDA
L21
+DACVDD
C1D1A5
VCCDAC
PCI INTERFACE LVDS
GND
GND
GND
F14
L14
M14
LAVDDPLLVDD2
LVDD
PLLVDD1
B3
VCCRGB
VCCPLL1
W1W2Y2
VCCPLL2
LVDSVCCA
LAVDD
LVDS1VCCA
VT8606 TwisterT
GND
GND
GND
GND
GND
GND
GND
GND
GND
N14
P14
R14
T14
AA14
M15
N15
P15
R15
VDDD
GND
AA15
C
VCCRGB VCCA VCCDAC VCCPLL1
1 2
R193 4.7K_0402
WSC#
DFTIN
BISTIN
AB2
PLLVCCA
GND
GND
GND
GND
GND
F16
L16
N16
P16
T16
GNDPLL1
A4
F15
AA11
WSC
BISTIN
GNDRGB
GNDPLL2
F11
DFTIN
GNDDAC
B1A1B5
1 2
R189 4.7K_0402
C4
B4
STP_AGP
AGP_BUSY
STRW/GPOUT
SUSPEND STANDBY
PANELDET
PANELCLK PANELDEN
PANELVS
PANELHS PD0/TVD11 PD1/TVD10
DISPLAY INTERFACE
PD8/TVD9
PD9/TVD8
PD16/TVCLKR
PD17/TVBLANK
PD24/TVD6 PD25/TVD4 PD26/TVD5 PD27/TVD7 PD28/TVD0 PD29/TVD1 PD30/TVD3 PD31/TVVS
PD32/TVCLK
PD33/TVD2 PD34/TVHS
LVDSGND
LVDS1GND
PLLGND
VSSD
Y1
AA1
Y3
AA2
GREEN
BLUE HSYNC VSYNC
SPD1
SPCLK1
COMP
RSET
GOP0
FPGPIO
XTLO
INTA
SPCLK2
SPD2
LD10 LD11 LD12 LD13 LD14 LD15
HREF
LCLK
ENVEE ENVDD
PD10 PD11 PD12 PD13 PD14 PD15
PD18 PD19 PD20 PD21 PD22 PD23
PD35
RED
XTLI
PD2 PD3 PD4 PD5 PD6 PD7
N/C
LD0 LD1 LD2 LD3 LD4 LD5 LD6 LD7 LD8 LD9
VS
+3VS
C2 D3 D2 E2 E1 F2 F3 E4
IRSET
E3
GOP0
C3 G1 AA12 A2 A3 W5
SUSPEND
F5
STANDBY
F4 U6 M2 M3
R6 T2 T1 R5 R2 R4 R1 R3 P5 P2 P3 P4 N5 N2 N1 N4 T3 U1 U3
AA16 H5 F1 G4 H3 G3 G5 G2 H2 H1 J2 J1 H4 K6 J4 J3 L5 K2 J5 K1 K3 L6 L2
R195 22_0402
K5 L1 L3 M6 K4 M4 M5 M1 T6 T5 U4 U2 V1 V2 V3 W3 V4 U5 V5 C5
VCCPLL2 VCCLPLL VCCLVDS VDDD
C359 .1UF_0402
R190 @33K_0402
12
R197
10K_0402
R224 33K_0402
PANELDET
TVD11 TVD10
TVD[0..11]
TVD9 TVD8
TVD6 TVD4 TVD5 TVD7 TVD0 TVD1 TVD3
TVD2
12
12
2.5V +- 0.25V
2.5V +- 0.25V
2.5V +- 0.25V
2.5V +- 0.25V
2.5V +- 0.25V
3.3V +- 0.3V
3.3V +- 0.3V
2.5V +- 0.25V
+2.5VS
+3VS
R33 10_0402
C79 15PF_0402
12
C264 15PF_0402
12
R198 10_0402
12
C276 15PF_0402
D
RED 14,35 GREEN 14,35 BLUE 14,35 HSYNC 14 VSYNC 14 SPDAT1 14 SPCLK1 14
OSCGUI 11 PIRQA# 16,19
DDCCLK 14 DDCDATA 14
ENVEE 15,31 ENVDD 15
TVD[0..11] 14
TVCLKR 14
TVVS 14 TVCLK 14
TVHS 14
-> 2.5V +- 0.25V
+2.5VS
+2.5VS
FBM_L11-201209-601LMT
+2.5VS
FBM_L11-201209-601LMT
+2.5VS
LAVDD
E
TwisterT(VIA_VT8606)-C
WSC# BISTIN DFTIN IRSET
L40
HB-1M2012-601JT
L37
L38
HB-1M2012-601JT
L41
C254 .1UF_0402
+3VS
C245 1000PF_0402
C267 1000PF_0402
C260 1000PF_0402
C253 .1UF_0402
L39
HB-1M2012-601JT
1 2
R216 10K_0402
1 2
R222 1K_0402
1 2
R217 1K_0402
1 2
R182 147_1%
1 2
R223 @0_0402
1 2
R219 @0_0402
+DACVDD
C244 1UF_10V
PLLVDD2
C263 1UF_10V
PLLVDD1
C261 1UF_10V
12
C251
+
10UF_10V_1206
LVDD
C257 .1UF_0402
+3VS
PIR(3)
12
C240
+
10UF_10V_1206
12
C262
+
10UF_10V_1206
12
C249
+
10UF_10V_1206
C252 .1UF_0402
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044
B
401196
*+,
-.
,
17, 2002
10 44
E
2A
of
Page 11
A
B
C
D
E
F
G
H
Clock Generator
1 1
12
C136 1000PF_0402
12
C140 .1UF_0402
+VCLK_CPU
PWR_DWN#
GT_CPU_STP#
FS1 FS0
+3VS_CPUCLK
U13
46
VDDCPU_2.5
45
VDDCPU_3.3
5
VDDREF
9
VDDPCI
29
VDDSDRAM
35
VDDSDRAM
28
AVDD48
21
*PD#
19
*CPU_STOP#
20
*PCI_STOP#
24 43
SDATA CPUCLKC
25
SCLK
26
24_48MHz/FS1*
27
48MHz/FS0*
4
Vtt_PWRGD#
22
MULTSEL
40
IREF
41
RESET#
1
GND
6
GND
12
GND
23
GND
32
GND
38
GND
42
GND
7 8
X1 X2
CY28317-2
1 2
12
C163 15PF_0402
14.318MHZ
*FS4/PCICLK_F
*FS3/PCICLK0
Y1
REF0
*FS2/REF1
PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5
CPUCLK1 CPUCLK0 CPUCLKT
SDRAM_IN
SDRAM0 SDRAM1
SDRAM2 SDRAM3
SDRAM4 SDRAM5
SDRAM6
PIR(20)
R105 33_0402
1 2
R106 33_0402
3
FS2
2
FS4
10
FS3
11 13 14 15 16 17
47 48
HOST_CPU
44
HOST_CPU# CLK_BCLK#
18 37
36 34
33 31
30 39
12
C164 15PF_0402
1 2
R110 33_0402
1 2
R87 22_0402
1 2
R116 22_0402
1 2
R127 22_0402
1 2
R117 22_0402
1 2
R118 22_0402
1 2
R119 22_0402
1 2
R120 22_0402
1 2
R123 22_0402
1 2
R99 22_0402
1 2
R100 @22_0402
1 2
R89 0_0402
1 2
R90 0_0402
1 2
R97 10_0402
1 2
R98 10_0402
1 2
R94 10_0402
1 2
R95 10_0402
1 2
R96 22_0402
1 2
12
R121 @10_0402
12
C166 @15PF_0402
PIR(14)
CLK_BCLK CLK_BCLK
C134
15PF_0402
14.318M_TV 14 OSCGUI 10 OSCSB 21 CLK_CPU_APIC 4 PCLK_SB 19 PCLK_LAN 29 PCLK_LPC 31 PCLK_NB 10 PCLK_PCM 16 PCLK_MINI 36 PCLK_1394 18
HCLK_NB 8 CLK_BCLK 4
CLK_BCLK# 4
DCLKO 9
CLK_SDRAM0 12 CLK_SDRAM1 12
CLK_SDRAM2 13 CLK_SDRAM3 13
DCLKRW 9
L23
+3VS
VTT_PWRGD#4,31,42
1 2
1 2
HB-1M2012-121JT
4.7UF_10V_0805
1 2
HB-1M2012-121JT
12
C161 1000PF_0402
12
C141 1000PF_0402
GT_CPU_STP#6,7
SDACLK12 SCKCLK12 BSEL14 USBCLK19
C131
L21
12
C160 .01UF_0402
+3VSCLK
PCISTP#7,20
+2.5V_CLK
+3VSCLK
L25
1 2
+3VS
HB-1M2012-121JT
C158
4.7UF_10V_0805
L22
1 2
+3VS
HB-1M2012-121JT
C130
4.7UF_10V_0805
2 2
CPUSTP#6,20,33
3 3
12
C159 .01UF_0402
+3VS_SDR
Width=40 mils
12
C132 .01UF_0402
1 2
R109 @0_0402
Width=40 mils
12
12
+3VSCLK
12
R108 @10K_0402
C139 1000PF_0402
C138 1000PF_0402
GT_CPU_STP#
12
C162 .01UF_0402
12
C142 .01UF_0402
R86 220_1%_0402
Width=40 mils
12
C135 .01UF_0402
Width=40 mils
12
C167 1000PF_0402
R107 10K_0402
1 2
R101 100_0402
1 2 1 2
R92 22_0402
12
R112
10K_0402
12
C137 @33PF_0402
+3VSCLK +3VSCLK +3VSCLK +3VSCLK+3VSCLK
12
12
12
R124
R88
10K_0402
10K_0402
12
R125
4 4
@10K_0402
A
R122 10K_0402
12
R111 @10K_0402
12
R93 10K_0402
12
R91 10K_0402
FS0 FS1 FS2 FS3 FS4
FS4 FS3 FS2 FS1 FS0 CPUCLK/PCICLK
1
1
0
1
0
1
11
1 111 01
1
133.30/33.30 (0 ~ -0.5% down spread)
133.60/33.40 (+/-0.25% center spread)
133.90/33.47 (+/-0.25% center spread)
11101 100.00/33.30 (0 ~ -0.5% down spread)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
B
C
D
E
F
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044
B
401196
*+,
-.
,
17, 2002
G
11 44
of
H
2A
Page 12
A
B
C
D
E
F
G
H
SO-DIMM0 (Bank 0,1)
+3V
INHIB ENDIM0 ENDIM1
12
12
C155 1UF_25V_0805
12
12
6
10
9
3
13
0
0
1
X
12
C144
C145
.1UF_0402
.1UF_0402
12
C152 .01UF_0402
12
C422
4.7UF_25V_1206
C165 .01UF_0402
SM BUS
C444 .1UF_0402
8P4R_10K_0804
16
INH A B
X Y
X0 X1
VCC
X2 X3
Y0 Y1 Y2 Y3
GND
GND
7
8
ENDIM0
0
1 SO-DIMM1
0
X
12
12
C146
C143
.01UF_0402
.01UF_0402
12
C157 .01UF_0402
12
C156 .01UF_0402
+3V+3V
RP42
1 8
2 7
3 6
U36
1 5 2 4
12 14 15 11
74HC4052
4 5
Channel ONENDIM1
SO-DIMM0
Clock Generator
NONE
12
C418 .01UF_0402
12
+3V
12
C421 10UF_10V_1206
C149 1UF_25V_0805
RP44 8P4R_10K_0804
1 8
2 7
3 6
4 5
SCKDIMM0
SDADIMM0
SCKDIMM1 13 SCKCLK 11
SDACLK 11
RCAS#[0..7]9,13
MA[0..14]13
MD[0..63]13
JP28
1 MD0 MD1 MD2 MD3
MD4 MD5 MD6 MD7
RCAS#0 RCAS#1
MA0 MA1 MA2
MD8 MD9 MD10 MD11
MD12 MD13 MD14
C427
12
@15PF_0402
CLK_SDRAM011 CKE0 9
PIR(14)
R325 @10_0402
12
SRASA#9,13
RMWEA#9,13
RAS#09 RAS#19
MD15
RMWEA# RAS#0 RAS#1
MD16 MD17 MD18 MD19
MD20 MD21 MD22 MD23
MA6 MA8
MA9 MA10
RCAS#2 RCAS#3
MD24 MD25 MD26 MD27
MD28 MD29 MD30 MD31
SDADIMM0
3
5
7
9
11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59
61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97
99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143
VSS DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 VSS CE0# CE1# VCC A0 A1 A2 VSS DQ8 DQ9 DQ10 DQ11 VCC DQ12 DQ13 DQ14 DQ15 VSS RESVD/DQ64 RESVD/DQ65
RFU/CLK0 VCC RFU WE# RE0# RE1# OE#/RESVD VSS RESVD/DQ66 RESVD/DQ67 VCC DQ16 DQ17 DQ18 DQ19 VSS DQ20 DQ21 DQ22 DQ23 VCC A6 A8 VSS A9 A10 VCC CE2#/RESVD CE3#/RESVD VSS DQ24 DQ25 DQ26 DQ27 VCC DQ28 DQ29 DQ30 DQ31 VSS SDA VCC
SO-DIMM144
RCAS#[0..7]
MA[0..14]
MD[0..63]
DQ32 DQ33 DQ34 DQ35
VCC DQ36 DQ37 DQ38 DQ39
CE4# CE5#
VCC
DQ40 DQ41 DQ42 DQ43
VCC DQ44 DQ45 DQ46 DQ47
RESVD/DQ68 RESVD/DQ69
RFU/CKE0
VCC
RFU/CKE1
RFU/CLK1
RESVD/DQ70 RESVD/DQ71
VCC DQ48 DQ49 DQ50 DQ51
DQ52 DQ53 DQ54 DQ55
VCC
A11/BA0 A12/BA1
A13/A11
VCC
CE6#/RESVD CE7#/RESVD
DQ56 DQ57 DQ58 DQ59
VCC DQ60 DQ61 DQ62 DQ63
VCC
VSS
VSS
VSS
VSS
RFU RFU
RFU VSS
VSS
VSS
VSS
VSS SCL
+3V+3V
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
A3
32
A4
34
A5
36 38 40 42 44 46 48 50 52 54 56 58 60
62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104
A7
106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144
1/20 ADD MMA14 LINK
MD32 MD33 MD34 MD35
MD36 MD37 MD38 MD39
RCAS#4 RCAS#5
MA3 MA4 MA5
MD40 MD41 MD42 MD43
MD44 MD45 MD46 MD47
MA14
MD48 MD49 MD50 MD51
MD52 MD53 MD54 MD55
MA7 MA11
MA12 MA13
RCAS#6 RCAS#7
MD56 MD57 MD58 MD59
MD60 MD61 MD62 MD63
SCKDIMM0
+3V +3V
SCASA# 9,13
12
12
12
R103 @10K_0402
R104 @10_0402
C150 @15PF_0402
PIR(14)
12
R102 @10K_0402
CLK_SDRAM1 11
CKE1 9
12
1 1
+3V
12
+3V
12
2 2
INHIB
CHANGE FROM
4.7K_0402 07/05
3 3
10K_0402
ENDIM021 ENDIM121
SMB_SB_CK7,20 SMB_SB_DA7,20 SDADIMM1 13
12
C148 1000PF_0402
C153 1000PF_0402
C151 1000PF_0402
C420 1UF_25V_0805
12
C154 1000PF_0402
12
C147 1000PF_0402
1 2
R365 10K_0402
+3V
12
12
R367
R336 10K_0402
INHIB
0
0
0
1
4 4
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
E
F
Title
SCHEMATIC, M/B LA-1044
Size Document Number Rev
B
401196
*+,
-.
,
Date: Sheet
17, 2002
G
12 44
of
H
2A
Page 13
A
B
C
D
E
SO-DIMM1 (Bank 2,3)
RCAS#[0..7]9,12
1 1
2 2
3 3
4 4
+3V
MD0 MD1 MD2 MD3
MD4 MD5 MD6 MD7
MD8 MD9 MD10 MD11
MD12 MD13 MD14 MD15
MD16 MD17 MD18 MD19
MD20 MD21 MD22 MD23
MD24 MD25 MD26 MD27
MD28 MD29 MD30 MD31
MMA[0..14]9
MMD[0..63]9
12
C123 .1UF_0402
12
C106
4.7UF_25V_1206
12
C109 1UF_25V_0805
PIR(26)
12
C124 .1UF_0402
12
12
C115 .01UF_0402
MMA[0..14]
MMD[0..63]
12
C121 .01UF_0402
MMD32 MMD33 MMD34 MMD35
MMD36 MMD37 MMD38 MMD39
MMD40 MMD41 MMD42 MMD43
MMD44 MMD45 MMD46 MMD47
MMD48 MMD49 MMD50 MMD51
MMD52 MMD53 MMD54 MMD55
MMD56 MMD57 MMD58 MMD59
MMD60 MMD61 MMD62 MMD63
C125 .01UF_0402
12
C114 .01UF_0402
12
C110 .01UF_0402
RP34 8P4R_22_0804 4 5 3 6 2 7 1 8
RP19 8P4R_22_0804 1 8 2 7 3 6 4 5
RP18 8P4R_22_0804 1 8 2 7 3 6 4 5
RP17 8P4R_22_0804 1 8 2 7 3 6 4 5
RP13 8P4R_22_0804 4 5 3 6 2 7 1 8
RP11 8P4R_22_0804 4 5 3 6 2 7 1 8
RP9 8P4R_22_0804 4 5 3 6 2 7 1 8
RP25 8P4R_22_0804 4 5 3 6 2 7 1 8
12
C126 .01UF_0402
B
12
1UF_25V_0805
12
C111 .01UF_0402
C127
MD32 MD33 MD34 MD35
MD36 MD37 MD38 MD39
MD40 MD41 MD42 MD43
MD44 MD45 MD46 MD47
MD48 MD49 MD50 MD51
MD52 MD53 MD54 MD55
MD56 MD57 MD58 MD59
MD60 MD61 MD62 MD63
12
C107 10UF_10V_1206
CLK_SDRAM211 CKE2 9
RP31 8P4R_10_0804
MMA0
4 5
MMA1
3 6
MMA2
2 7
MMA3
1 8
RP16 8P4R_10_0804
MMA4
4 5
MMA5
3 6
MMA6
2 7
MMA7
1 8
RP29 8P4R_10_0804
MMA8
4 5
MMA9
3 6
MMA10
2 7
MMA11
1 8
RP15 8P4R_10_0804
MMA12
4 5
MMA13
3 6
MMA14 MA14
2 7 1 8
MA0 MA1 MA2 MA3
MA4 MA5 MA6 MA7
MA8 MA9 MA10 MA11
MA12 MA13
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C105
12
@15PF_0402
MD0 MD1 MD2 MD3
MD4 MD5 MD6 MD7
RCAS#0 RCAS#1
MA0 MA1
MD8 MD9 MD10 MD11
MD12 MD13 MD14
PIR(14)
R68
12
@10_0402
SRASA#9,12 RMWEA#9,12 RAS#29 RAS#39
C
MD15
RMWEA# RAS#2 RAS#3
MD16 MD17 MD18 MD19
MD20 MD21 MD22 MD23
MA6 MA8
MA9 MA10
RCAS#2 RCAS#3
MD24 MD25 MD26 MD27
MD28 MD29 MD30 MD31
12
+3V
12
+3V +3V +3V
12
MMD0 MMD1 MMD2 MMD3
MMD4 MMD5 MMD6 MMD7
MMD8 MMD9 MMD10 MMD11
MMD12 MMD13 MMD14 MMD15
MMD16 MMD17 MMD18 MMD19
MMD20 MMD21 MMD22 MMD23
MMD24 MMD25 MMD26 MMD27
MMD28 MMD29 MMD30 MMD31
A
12
C122 1000PF_0402
C119 1000PF_0402
C113 1000PF_0402
C128 1UF_25V_0805
12
C120 1000PF_0402
12
C112 1000PF_0402
RP20 8P4R_22_0804 1 8 2 7 3 6 4 5
RP33 8P4R_22_0804 4 5 3 6 2 7 1 8
RP32 8P4R_22_0804 4 5 3 6 2 7 1 8
RP36 8P4R_22_0804 4 5 3 6 2 7 1 8
RP26 8P4R_22_0804 4 5 3 6 2 7 1 8
RP12 8P4R_22_0804 4 5 3 6 2 7 1 8
RP10 8P4R_22_0804 4 5 3 6 2 7 1 8
RP24 8P4R_22_0804 4 5 3 6 2 7 1 8
MA[0..14]12
MD[0..63]12
JP17
1
VSS
3
DQ0
5
DQ1
7
DQ2
9
DQ3
11
VCC
13
DQ4
15
DQ5
17
DQ6
19
DQ7
21
VSS
23
CE0#
25
CE1#
27
VCC
29
A0
31
A1
33
A2
35
VSS
37
DQ8
39
DQ9
41
DQ10
43
DQ11
45
VCC
47
DQ12
49
DQ13
51
DQ14
53
DQ15
55
VSS
57
RESVD/DQ64
59
RESVD/DQ65
61
RFU/CLK0
63
VCC
65
RFU
67
WE#
69
RE0#
71
RE1#
73
OE#/RESVD
75
VSS
77
RESVD/DQ66
79
RESVD/DQ67
81
VCC
83
DQ16
85
DQ17
87
DQ18
89
DQ19
91
VSS
93
DQ20
95
DQ21
97
DQ22
99
DQ23
101
VCC
103
A6
105
A8
107
VSS
109
A9
111
A10
113
VCC
115
CE2#/RESVD
117
CE3#/RESVD
119
VSS
121
DQ24
123
DQ25
125
DQ26
127
DQ27
129
VCC
131
DQ28
133
DQ29
135
DQ30
137
DQ31
139
VSS
141
SDA
143
VCC
SO-DIMM144_H5.6
RCAS#[0..7]
MA[0..14]
MD[0..63]
D
VSS DQ32 DQ33 DQ34 DQ35
VCC DQ36 DQ37 DQ38 DQ39
VSS
CE4# CE5#
VCC
VSS DQ40 DQ41 DQ42 DQ43
VCC DQ44 DQ45 DQ46 DQ47
VSS
RESVD/DQ68 RESVD/DQ69
RFU/CKE0
VCC
RFU
RFU/CKE1
RFU
RFU
RFU/CLK1
VSS
RESVD/DQ70 RESVD/DQ71
VCC DQ48 DQ49 DQ50 DQ51
VSS DQ52 DQ53 DQ54 DQ55
VCC
A11/BA0
VSS
A12/BA1 A13/A11
VCC
CE6#/RESVD CE7#/RESVD
VSS DQ56 DQ57 DQ58 DQ59
VCC DQ60 DQ61 DQ62 DQ63
VSS
VCC
+3V+3V
2
MD32
4
MD33
6
MD34
8
MD35
10 12
MD36
14
MD37
16
MD38
18
MD39
20 22
RCAS#4
24
RCAS#5
26 28
MA3
30
A3 A4 A5
A7
SCL
MA4
32
MA5MA2
34 36
MD40
38
MD41
40
MD42
42
MD43
44 46
MD44
48
MD45
50
MD46
52
MD47
54 56 58 60
62 64 66 68
MA14
70 72 74 76 78 80 82
MD48
84
MD49
86
MD50
88
MD51
90 92
MD52
94
MD53
96
MD54
98
MD55
100 102
MA7
104
MA11
106 108
MA12
110
MA13
112 114
RCAS#6
116
RCAS#7
118 120
MD56
122
MD57
124
MD58
126
MD59
128 130
MD60
132
MD61
134
MD62
136
MD63
138 140 142 144
Title
Size Document Number Rev
B
*+,
Date: Sheet
12
SCASA# 9,12
12
R80 @10_0402
12
C129 @15PF_0402
R82 @10K_0402
12
R81 @10K_0402
CLK_SDRAM3 11
PIR(14)
SCKDIMM1 12SDADIMM112
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044 401196
-.
,
17, 2002
E
CKE3 9
13 44
of
2A
Page 14
A
1 1
RED10,35
GREEN10,35
BLUE10,35
HSYNC10
2 2
3 3
PIR(8)
4 4
VSYNC10
@10K_0402
CRTVDD
+5VS
+3VS
TVD[0..11]10
L36
1 2
TV@FBM_L10-201209-201LMT
TV@10UF_10V_1206
L19
1 2
TV@FBM_L10-201209-201LMT
TV@10UF_10V_1206
R35 4.7K_0402
1 2
R37 4.7K_0402
1 2
SPDAT110 SPCLK110
TVCLKR10 TVHS10
TVVS10 TVCLK 10
PCIRST#9,16,18,19,22,23,29,31,36
TVD[0..11]
12
R8 75_1%
12
R3
C241
C75
TVD7 TVD6 TVD5 TVD4 TVD3 TVD2 TVD1 TVD0
TV@10_0402
12
12
12
12
R49
R6 75_1%
R22 @10K_0402
CRT Connector
12
12
C13
R9 75_1%
@22PF_0402
Q3 2N7002
1 2
+12VS
R10 100K_0402
12
C238 TV@.1UF_0402
12
C81 TV@.1UF_0402
312530516
26
SD
27 39 40
41
6 4 3 2
1 44 43 42
29
12
12
C86 TV@15PF_0402
SC XCLK H
V D7
D6 D5 D4 D3 D2 D1 D0
RESETB
AVDD
AGND
3423198183628
S
VDD
CH7005
GND
G
GND
12
C10 @22PF_0402
D
13
2
Q6 2N7002
DVDD
DVDD
DGND
DGND
S
DVDD
DGND
G
38
DVDD
DGND
B
2
1 2
FCM2012C-800_0805
1 2
FCM2012C-800_0805
1 2
FCM2012C-800_0805
12
C12 @22PF_0402
1 2
FBM-11-160808-121
D
1 2
13
FBM-11-160808-121
12
C223 TV@.1UF_0402
U22
CVBS/B
Y/R
C/G
CSYNC
BCO
P-OUT
XO/FIN
D10 D11 D12 D13 D14 D15
RSET
TV@CH7005
L1
L2
L3
L4
L16
12
20 22 21
17 35 37
33 32
XI
7
D8
9
D9
10 11 12 13 14 15
24
D1
DAN217
2
12
C4 18PF_0402
C222
TV@FBM_L10-201209-201LMT
TV@10UF_10V_1206
COMPS LUMA CRMA
1
1 2 R43 TV@0_0402 14M_TV1 14M_TV2
TVD8 TVD9 TVD10 TVD11
12
R179 TV@360
C
+5VS
F1
POLYSWITCH_0.5A
D2
DAN217
3
12
C8 68PF_0402
12
2
12
C6 18PF_0402
COMPS 35 LUMA 35 CRMA 35
12
C84 TV@15PF_0402
1
12
+3VS
14M_TV2
12
1
L18
TP1
Notes : If Rx mount, remove Yx/Cx, and
D3
CRTVDD
DAN217
1
3
2
3
12
C3 18PF_0402
C40 68PF_0402
1 2
TV@14.318MHZ
C248 TV@10PF_0402
Y3
100PF_0402
LUMA
CRMA
COMPS
TV@75_1%
14M_TV1
Cx change to 0_0603 resister.
2 1
RB411D
MSEN#31,35
DDC_MD2
12
C7
12
R173
1 2
R185 @0_0402
12
C247 TV@10PF_0402
D4
12
C39
.1UF_0402
12
C5
220PF_0402
DOCK_VSYNC 35
DOCK_HSYNC 35
12
12
R175
TV@75_1%
12
C9 220PF_0402
R178
TV@75_1%
14.318M_TV 11
W=40mils
12
C33 TV@150PF_0402
Q1 2N7002
6
11
1 7
12
2 8
13
3 9
14
4 10 15
5
D
1 3
12
D
R24
2.2K_0402
JP3 CRT-15P
Q5 2N7002
D
S
1 3
S
G
2
G
2
1 2
R25 100K_0402
1 2
C30 TV@47PF_0402
L6
1 2
TV@FBM-11-160808-121
1 2
C29 TV@47PF_0402
L5
1 2
TV@FBM-11-160808-121
C34 TV@150PF_0402
12
12
DOCK_DDCD 35 DOCK_DDCC 35
12
C227 TV@150PF_0402
R11
2.2K_0402
CRTVDD
DDCDATA 10
DDCCLK 10
+12VS
12
C26 TV@270PF_0402
E
CRT Conn./TV Encoder
TV-Out Connector
S-Video
JP5
1 2 3 4 5 6 7
TV@S CONN._FOXCONN
12
C27 TV@270PF_0402
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044
B
401196
*+,
-.
,
17, 2002
14 44
E
2A
of
Page 15
A
B
C
D
E
W/LVDS LCD CONN.
1 1
LVDS1_2+10 LVDS1_2-10
LVDS1_1+10 LVDS1_1-10
LVDS2_2+10
2 2
3 3
LVDS2_2-10 LVDS1_0+10
LVDS1_0-10 LVDS1_C+10
LVDS1_C-10 LVDS2_1+10
LVDS2_1-10
LVDS2_0+10 LVDS2_0-10
LVDS2_C+10 LVDS2_C-10
LVDS1_2+ LVDS1_2-
LVDS1_1+ LVDS1_1-
LVDS2_2+ LVDS2_2-
LVDS1_0+ LVDS1_0-
LVDS1_C+ LVDS1_C-
LVDS2_1+ LVDS2_1-
LVDS2_0+ LVDS2_0-
LVDS2_C+ LVDS2_C-
+3VS
PID[0..3]
RP5 8P4R_10K_0804 1 8 2 7 3 6 4 5
JP12
26
1
26
27
2
27
28
3
28
29
4
29
30
5
30
31
6
31
32
7
32
33
8
33
34
9
34
35
10
35
36
11
36
37
12
37
38
13
38
39
14
39
40
15
40
41
16
41
42
17
42
43
18
43
44
19
44
45
20
45
46
21
46
47
22
47
48
23
48
49
24
49
50
25
50
LVDS 50 PIN CONN.
ENVDD
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
PID[0..3] 20,21
PID0 PID1 PID2 PID3
PID0 PID1 PID2 PID3
LCDVDD
12
R27 1K_0402
1
2
3
Q9
2N7002
22K
2
22K
+12VS
LCDVDD_1
INV_B+
R26 100K_0402
13
DAC_BRIG 31 INVT_PWM 31
Q7 DTC124EK
INV_B+
+12VS
R29 100K_0402
150K_0402
Q8
1
2
3
2N7002
L35
@FBM-L11-201209-221
L34
FBM-L11-201209-221
LCDVDD_1
12
C57 1000PF_0402
R28
.047UF_0402
SI2301DS: P CHANNEL VGS: -4.5V, RDS: 130 mOHM VGS: -2.5V, RDS: 190mOHM Id(MAX): 2.3A VGS(MAX): +-8V
B+
JOPEN4
2 1
JOPEN2
2 1
CHANGE INVERTER POWER SOURCE TO +5VS
12
C58 .01UF_0402
LCDVDD
C52
+5VALW
+5VS
L33
FBM-L11-201209-221
Q10
SI2302DS
C55
+
C56
.1UF_0402
4.7UF_10V_0805
SI2302DS: N CHANNEL VGS: 4.5V, RDS: 85 mOHM VGS: 2.5V, RDS: 115mOHM Id(MAX): 2.8A VGS(MAX): +-8V
LCDVDD
2
12
C224 1000PF_0402
The cap.'s colsely to LCD CONN.
ENVEE10,31
ENVDD10
ENBKL31
13
+3VS
12
C225 .1UF_0402
ENVEE
ENVDD
INV_B+
12
C228
4.7UF_25V_1206
D9
RB751V D10
RB751V D11
RB751V
+3VS
12
R172 1K_0402
DISPOFF#DISPOFF#
21
21
21
4 4
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
SCHEMATIC, M/B LA-1044
Size Document Number Rev
B
401196
*+,
-.
,
Date: Sheet
17, 2002
15 44
E
of
2A
Page 16
A
B
C
D
E
PCMCIA Controller
S1_VCC
12
12
S1_VCC
1 1
2 2
+3V
3 3
PCM_SUSP#31
+3VALW
4 4
WAKEUP#18,29,31
A
1 2
R47 22K_0402
1 2
R192 @22K_0402
PCLK_PCM
1 2
R20 22K_0402
+3V
1 2
R19 10K_0402
+5V
2
1 3
D
Q23 2N7002
1 2
R21 10K_0402
G
PCM_PMER#
S
S1_A23 S1_WP
12
12
PCM_RI#
AD[0..31]10,18,19,29,36
R174 10_0402
C226 22PF_0402
D8
RB751V
4.7UF_10V_0805
AD[0..31]
CBE#310,18,19,29,36 CBE#210,18,19,29,36 CBE#110,18,19,29,36 CBE#010,18,19,29,36
PCIRST#9,14,18,19,22,23,29,31,36 FRAME#10,18,19,29,36 IRDY#10,18,19,29,36 TRDY#10,18,19,29,36 DEVSEL#10,18,19,29,36 STOP#10,18,19,29,36
PERR#18,19,29,36
SERR#10,19,29,36
PAR10,18,19,29,36
REQ#310
GNT#310
PCLK_PCM11
21
G_RST#17,31
PCM_PMER#
AD15
PIRQA#10,19
SERIRQ21,31
PCM_RI#19
CLKRUN#10,19,31,36
1 2
R165 0_0402
B
AD31 S1_D10 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
PCLK_PCM
1 2
R164 0_0402
1 2
R31 100_0402
PCM_RI#
12
C207 1UF_25V_0805
12
3
AD31
4
AD30
5
AD29
7
AD28
8
AD27
9
AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
C/BE3# C/BE2# C/BE1# C/BE0#
PCIRST# PCIFRAME# PCIIRDY# PCITRDY# PCIDEVSEL# PCISTOP# PCIPERR# PCISERR# PCIPAR
1
PCIREQ#
2
PCIGNT# PCIPCLK
RI_OUT#/PME# SUSPEND#
IDSEL MF0
MF1 MF2 MF3 MF4 MF5 MF6
G_RST#
CB1410
12
C202
74
VCCD1#
.1UF_0402
VCCD0#
PQFP 144
22.2 X
22.2 X
1.60
6
3V_CB
18
44
717273
90
126
VCCP
VCCP
VPPD0
VPPD1
GND
VCCCB
VCCCB
GND
GND
GND
GND
GND
GND
GND
22
42
58
78
94
114
130
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C237
VPPD017 VPPD117 VCCD0#17 VCCD1#17
10 11 15 16 17 19 23 24 25 26 38 39 40 41 43 45 46 47 49 51 52 53 54 55 56 57
12 27 37 48
20 28 29 31 32 33 34 35 36
21 59
70 13 60
61 64 65 67 68 69
66
C259 .1UF_0402
1 2
R38 @0_1206
1 2
R41 0_1206
86
102
122
138
VCC
VCC
VCC
RSVD/D14
RSVD/A18
84
100
143
C
C239 .1UF_0402
+3V
14
30
50
63
VCC
VCC
VCCI
VCCP
VCCP
CAD31/D10
CAD30/D9 CAD29/D1 CAD28/D8 CAD27/D0 CAD26/A0 CAD25/A1 CAD24/A2 CAD23/A3 CAD22/A4 CAD21/A5 CAD20/A6
CAD19/A25
CAD18/A7 CAD17/A24 CAD16/A17
CAD15/IOWR#
CAD14/A9
CAD13/IORD#
CAD12/A11
CAD11/OE#
CAD10/CE2#
CAD9/A10
CAD8/D15
CAD7/D7
CAD6/D13
CAD5/D6
CAD4/D12
CAD3/D5
CAD2/D11
CAD1/D4 CAD0/D3
CCBE3#/REG#
CCBE2#/A12
CCBE1#/A8
CCBE0#/CE1# CRST#/RESET
CFRAME#/A23
CIRDY#/A15
CTRDY#/A22
CDEVSEL#/A21
CSTOP#/A20
CPERR#/A14
CSERR#/WAIT#
CPAR/A13
CREQ#/INPACK#
CGNT#/WE#
CCCLK/A16
CSTSCHNG/BVD1
CCLKRUN#/WP
CBLOCK#/A19
CINT#/READY
SPKROUT
CAUDIO#/BVD2
CCD2#/CD2# CCD1#/CD1#
CVS2/VS2# CVS1/VS1#
RSVD/D2
+3VS
Stuff R38 for OZ6912.
+3V
Stuff R41 for TI/ENE CB1410.
1 2
C206 .1UF_0402
U21
144 142 141 140 139 129 128 127 124 121 120 118 116 115 113 98 96 97 93 95 92 91 89 87 85 82 83 80 81 77 79 76
125 112 99 88
119 111 110 109 107 105 104 133 101 123 106 108
135 136
103 132 62
134 137
75 117 131
3V_CB
12
C203 .1UF_0402
S1_D9 S1_D1 S1_D8 S1_D0 S1_A0 S1_A1 S1_A2 S1_A3 S1_A4 S1_A5 S1_A6 S1_A25 S1_A7 S1_A24 S1_A17
S1_A9 S1_A11
S1_OE# S1_A10
S1_D15 S1_D7 S1_D13 S1_D6 S1_D12 S1_D5 S1_D11 S1_D4 S1_D3
S1_A12 S1_A8
S1_A23 S1_A15 S1_A22 S1_A21 S1_A20 S1_A14
S1_A13
1 2
R181 33_0402 S1_WP S1_A19
S1_D2 S1_A18 S1_D14
12
C204 .1UF_0402
S1_IOWR# 17 S1_IORD# 17 S1_OE# 17
S1_CE2# 17
S1_REG# 17
S1_CE1# 17 S1_RST 17
S1_WAIT# 17 S1_INPACK# 17
S1_WE# 17
S1_BVD1 17 S1_WP 17
S1_RDY# 17 PCM_SPK# 24
S1_BVD2 17 S1_CD2# 17
S1_CD1# 17 S1_VS2 17 S1_VS1 17
12
C205 .1UF_0402
S1_A[0..25]
S1_D[0..15]
PIR(24)
S1_A16
D
12
S1_OE#
C229 .1UF_0402
S1_A[0..25] 17
S1_D[0..15] 17
12
12
C85 .1UF_0402
R500
47K_0402
12
12
C258
C243
.1UF_0402
.1UF_0402
S1_VCC
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044
B
401196
*+,
-.
,
17, 2002
E
16 44
of
2A
Page 17
A
B
C
D
E
PCMCIA Socket
S1_A[0..25]
S1_D[0..15]
C98
1 2
1000PF_0402
C133
1 2
1000PF_0402
JP16AS1
CARDBUS HOUSING
13 12 11
10
1 2 15 14
8
PIR(18)
C103
4.7UF_25V_1206
S1_VCC
12
G_RST# 16,31
C61
4.7UF_10V_0805 S1_VPP
VCCD0# 16 VCCD1# 16 VPPD0 16 VPPD1 16
C108 .01UF_0402
C49 .1UF_0402
JP16
A77
a68
A76
S1_CD2#16
S1_WP16
S1_BVD116
S1_BVD216
S1_REG#16
S1_INPACK#16
S1_WAIT#16
S1_RST16 S1_VS216
S1_VPP
S1_VCC
S1_RDY#16
S1_WE#16
S1_IOWR#16
S1_IORD#16
S1_VS116 S1_OE#16
S1_CE2#16
S1_CE1#16
S1_CD1#16
S1_CD2# S1_WP
S1_D10 S1_D2 S1_D9 S1_D1 S1_D8 S1_D0 S1_BVD1
S1_A0 S1_BVD2 S1_A1 S1_REG# S1_A2 S1_INPACK# S1_A3
S1_WAIT# S1_A4 S1_RST S1_A5 S1_VS2 S1_A6 S1_A25
S1_A7 S1_A24 S1_A12 S1_A23 S1_A15 S1_A22
S1_A16
S1_A21 S1_RDY# S1_A20 S1_WE# S1_A19 S1_A14 S1_A18 S1_A13
S1_A17 S1_A8 S1_IOWR# S1_A9 S1_IORD#
S1_A11 S1_VS1 S1_OE# S1_CE2# S1_A10
S1_D15 S1_CE1# S1_D14 S1_D7 S1_D13 S1_D6
S1_D12 S1_D5 S1_D11
S1_D4
S1_CD1#
S1_D3
a34
A75
a67
A74
a33
A73
GND
A72
a66
A71
a32
A70
a65
A69
a31
A68
a64
A67
a30
A66
a63
A65
GND
A64
a29
A63
a62
A62
a28
A61
a61
A60
a27
A59
a60
A58
a26
A57
GND
A56
a59
A55
a25
A54
a58
A53
a24
A52
a57
A51
a23
A50
a56
A49
GND
A48
a22
A47
a55
A46
a21
A45
a54
A44
a20
A43
a53
A42
GND
A41
a19
A40
a52
A39
a18
A38
a51
A37
a17
A36
a50
A35
a16
A34
a49
A33
a15
A32
a48
A31
a14
A30
a47
A29
a13
A28
GND
A27
a46
A26
a12
A25
a45
A24
a11
A23
a44
A22
GND
A21
a10
A20
a43
A19
a9
A18
a42
A17
a8
A16
GND
A15
a41
A14
a7
A13
a40
A12
a6
A11
a39
A10
a5
A9
GND
A8
a38
A7
a4
A6
a37
A5
a3
A4
a36
A3
a2
A2
a35
A1
a1
787980
787980
b68 b34 b67 b33
GND
b66 b32 b65 b31 b64 b30 b63
GND
b29 b62 b28 b61 b27 b60 b26
GND
b59 b25 b58 b24 b57 b23 b56
GND
b22 b55 b21 b54 b20 b53
GND
b19 b52 b18 b51 b17 b50 b16 b49 b15 b48 b14 b47 b13
GND
b46 b12 b45 b11 b44
GND
b10 b43
b9
b42
b8
GND
b41
b7
b40
b6
b39
b5
GND
b38
b4
b37
b3
b36
b2
b35
b1
81
PCMC154PIN
81
B77 B76 B75 B74 B73 B72 B71 B70 B69 B68 B67 B66 B65 B64 B63 B62 B61 B60 B59 B58 B57 B56 B55 B54 B53 B52 B51 B50 B49 B48 B47 B46 B45 B44 B43 B42 B41 B40 B39 B38 B37 B36 B35 B34 B33 B32 B31 B30 B29 B28 B27 B26 B25 B24 B23 B22 B21 B20 B19 B18 B17 B16 B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1
+12VALW
1 1
2 2
3 3
C38 .1UF_0402
C60 .1UF_0402
C59 .1UF_0402
10UF_10V_1206
U4 TPS2211
9
12V
+5VALW
5
5V
6
5V
+3VALW
3
3.3V
4
3.3V
S1_VCC S1_VPP
12
C101
GND
7
VCCD0 VCCD1 VPPD0 VPPD1
SHDN
16
C99 .1UF_0402
VCC VCC VCC
VPP
OC
S1_A[0..25] 16
S1_D[0..15] 16
S1_CD1#
S1_CD2#
4 4
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
SCHEMATIC, M/B LA-1044
Size Document Number Rev
B
401196
*+,
-.
,
Date: Sheet
17, 2002
17 44
E
of
2A
Page 18
A
B
C
D
E
IEEE1394 Controller/PHY
1 1
+3VS
X1
+3VS
R184
1394@1K_0402
1394@1K_0402
R30
PCLK_139411
R180
PIRQC#19
PCIRST#9,14,16,19,22,23,29,31,36
GNT#410,21 REQ#410,21
C66 1394@47PF_0402
1394@.1UF_0402
12
R56 33_0402
12
C97 22PF_0402
AD[0..31]
1394@6.34K 1%
AD[0..31]10,16,19,29,36
2 2
PCLK_1394
3 3
1394@10PF_0402
+3VS
1394@.1UF_0402
C78
1394@.1UF_0402
C73
1394@.1UF_0402
XTPB0­XTPB0+ EECK_LAN XTPA0- EEDI_LAN XTPA0+ XTPBIAS0
C63
PCLK_1394
AD31 AD14 AD30 AD15 AD29 AD28 AD27
1394@24.576MHz
C242
R183 1394@1M_0402
C77
1394@.1UF_0402
65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98
99 100 101 102
VDDARX0 XREXT NC GNDARX1 GNDATX1 XTPB0M XTPB0P XTPA0M XTPA0P XTPBIAS0 VDDARX1 VDDATX1 XTPB1M XTPB1P XTPA1M XTPA1P XTPBIAS1 GNDARX2 GNDATX2 XTPB2M XTPB2P XTPA2M XTPA2P XTPBIAS2 VDDARX2 VDDATX2 INTA# PCIRST# PCICLK VSS1 GNT# REQ# AD31 AD30 AD29 AD28 AD27 VDD1
C250
1394@10PF_0402
C96
64
103
XCPS
VDDATX0
GNDARX0
VSS2
AD26
AD25
104
105
AD26
AD25
XI
XO
GNDATX0
AD24
CBE3#
IDSEL
106
107
108
AD24
C80
1394@.1UF_0402
C93
1394@.1UF_0402
PHYRESET
D7/PC2JMP
CTL0/PC0JMP
CTL1/PC1JMP
LREQ/TSOJMP
LINKON/TSIJMP
AD23
AD22
VSS3
AD21
VDD2
VDDC1
109
110
111
112
113
114
AD23
AD22
AD21
Enable I2C EEPROM
C95
1394@.1UF_0402
D5
PVDD2
PGND2
D6/CMCJMP
VSSC1
AD20
AD19
AD18
AD17
AD16
VSS4
115
116
117
118
119
120
121
AD19
AD16
AD17
AD18
AD20
R176
CBE2#
122
D0D1D2D3D4
MODE0
FRAME#
IRDY#
123
124
1394@2K_0402
C94 1394@.1UF_0402
39404142434445464748495051525354555657585960616263
SCLK
PVDD1
PGND1
MODE1
STOP#
VDD3
TRDY#
DEVSEL#
128
125
126
127
LPS/CMC
PME# VSSC2 VDDC2
VSS9
VDD6
SCL/EECK
SDA/EEDI
EEDO
EECS
VSS8
RAMVSS
RAMVDD
VDD5
VSS7
CBE0#
AD10 AD11 AD12 VSS6
VDD4
AD13 AD14 AD15
CBE1#
PAR
PERR#
VSS5
AD0 AD1
AD2 AD3 AD4
AD5 AD6 AD7
AD8 AD9
+3VS
U6
38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
1394@VT6306
+3VS
1394@.1UF_0402
AD0 AD1
AD2 AD3 AD4
AD5 AD6 AD7
AD8 AD9 AD10 AD11 AD12
AD13
WAKEUP# 16,29,31
CBE#0 10,16,19,29,36
CBE#1 10,16,19,29,36 PAR 10,16,19,29,36 PERR# 16,19,29,36
12
C50
1394@.1UF_0402
12
C51
12
C64 1394@.1UF_0402
1394@.1UF_0402
XTPBIAS0 XTPA0+
XTPA0-
XTPB0+
XTPB0-
1394@56.2_1%
1394@220PF_0402
12
C53
1 2 3 4 5
1394@56.2_1%
R39
C83
12
C88 1394@.1UF_0402
U20
A0
VCC
A1
WC# A2 GND SDA
1394@24C02-27
12
R32
12
12
12
C82
1394@.1UF_0402
+3VS
8 7
EECK_LAN
6
SCL
EEDI_LAN
1394@56.2_1%
12
R36
12
R50 1394@56.2_1%
12
R42 1394@5.11K
12
C54 1394@.1UF_0402
1394@.1UF_0402
12
R177 1394@510
12
C72 1394@1UF_25V_0805
L20
1 2 3 45
1394@IEEE1394-COILS
12
12
C90
C91 1394@.1UF_0402
JP13
8 7 6
4 3 2 1
1394@1394_CONN 4PIN
STOP# 10,16,19,29,36
C
DEVSEL# 10,16,19,29,36 TRDY# 10,16,19,29,36 IRDY# 10,16,19,29,36 FRAME# 10,16,19,29,36 CBE#2 10,16,19,29,36
Title
Size Document Number Rev
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044
B
401196
*+,
-.
,
17, 2002
18 44
E
2A
of
CBE#310,16,19,29,36
AD25
4 4
A
1 2
R40 1394@100_0402
B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Page 19
A
+3VS
12
12
12
12
12
C496
C456
C417
1UF_10V
1UF_10V
1 1
1UF_10V
C400 1UF_10V
C408 1UF_10V
12
C471 1UF_10V
12
C405 1UF_10V
B
+3VS
12
C407 1UF_10V
12
C401 1UF_10V
+3VS
12
C404 1UF_10V
12
C426 1UF_10V
12
C451 1UF_10V
12
C457 1UF_10V
C
D
VT8231-A
12
12
C505 1UF_10V
12
C432 1UF_10V
C506 1UF_10V
AD[0..31]10,16,18,29,36
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10
+3VS
U66
2 2
PCIRST#9,14,16,18,22,23,29,31,36
4
7SH08FU
PIR(40)
3 3
PCIRST#_SB
1 2
3
R298 @15_0402
1 2
5
PIR(40)
+3V
10K_0402 R296 R297
10K_0402
4 4
RP38
PERR#16,18,29,36
PLOCK#10
+3VS
A
1
STOP#
2
SERR# DEVSEL#
3 4 5
10P8R_4.7K
C599
1 2
@15PF_0402
SPWROFF# 6,20,31,33
CBE#010,16,18,29,36 CBE#110,16,18,29,36 CBE#210,16,18,29,36 CBE#310,16,18,29,36
FRAME#10,16,18,29,36
DEVSEL#10,16,18,29,36
IRDY#10,16,18,29,36
TRDY#10,16,18,29,36
STOP#10,16,18,29,36 SERR#10,16,29,36
PAR10,16,18,29,36
PREQ#10 PGNT#10
PIRQA#10,16 PIRQB#29,36 PIRQC#18 PIRQD#36
PCLK_SB11
CLKRUN#10,16,31,36
GATEA2031 KBRST#31
12 12
IRRX27 IRTXOUT27 IRMODE27
PCI Pullups
10
PIRQA#
9
PIRQB#
8
PIRQC#
7
PIRQD#
6
AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
FRAME# DEVSEL# IRDY# TRDY# STOP# SERR# PAR
PIRQA# PIRQB# PIRQC#
PIRQD# PCIRST#_SB CLKRUN#
12
R395 0_0402
+3VS +3VS
U34A
C11
AD0
B11
AD1
D10
AD2
E10
AD3
B10
AD4
A10
AD5
C10
AD6
D9
AD7
E9
AD8
A9
AD9
B9
AD10
F8
AD11
C9
AD12
E8
AD13
D8
AD14
B8
AD15
A6
AD16
E6
AD17
B6
AD18
C6
AD19
D5
AD20
A5
AD21
E5
AD22
B5
AD23
A4
AD24
B4
AD25
A3
AD26
C4
AD27
B3
AD28
D4
AD29
A1
AD30
A2
AD31
F10
C_BE0
A8
C_BE1
D6
C_BE2
C5
C_BE3
F6
FRAME
A7
DEVSEL
C7
IRDY
B7
TRDY
D7
STOP
E7
SERR
C8
PAR
D2
REQL
D1
GNTL
B2
PINTA
B1
PINTB
C3
PINTC
C2
PINTD
E4
PCIRST
M17
PCICLK
R5
CLKRUN
M4
KBCK/KA20G
N1
KBDT/KBRC
N2
MSCK/IRQ1
N4
MSDT/IRQ12
U8
IRRX
R8
IRTX
T8
IRRX2/GPI
12
R416
VT8231
10_0402
12
C507 15PF_0402
IRDY# RXD1 TRDY#
FRAME#
PAR
G6H6J6L6M6N6F7G8G9
VCC
VCC
VCC
VCC
VIA VT8231 South Bridge
PC99 Compliant, Integrated Super-I/O (FDC,LPT,COM,FIR), Integrated Fast Ethernet, LPC, ISA/LPC BIOS ROM, Integrated SoundBlaster Pro/MultiChannel, DirectSound AC97 Audio and MC97 Modem Interface, UltraDMA-33/66/100
PCI Bus
Interface
Master Mode EIDE Controller, 4 Port USB Controller, Keyboard Controller, RTC, Serial IRQ, SMBus, Plug and Play, ACPI, Enhanced Power Managerment, Temperature, Voltage, and Fan-Speed Monitoring
Internal
* *
Keyboard
* *
Controller
FIR
GND
GND
GND
J8J9J10
P14
RP41 1 8 2 7 3 6 4 5
8P4R_4.7K_0804
12
R171 @4.7K_0402
B
VCC
GND
J11
VCC
GND
J12
+3VS
VCC
VCC
Power
GND
GND
J13K8K9
G10
G12F9F12
F13
F15
J15
K15
M15
P15
USBVDD
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Ground
GND
GND
GND
GND
GND
GND
GND
K10
K11
K12
K13L8L9
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
VCC
GND
U*
VCC
VCC
VCC
USBGND
USBCLK
USBP0+
U*
USB
Interface
USBP0-
U*
USBP1+
U*
USBP1-
U*
USBP2+
U*
USBP2-
U*
USBP3+
U*
USBP3-
U*
OC0 OC1
PRD0 PRD1 PRD2 PRD3 PRD4
Parallel
Port
PRD5 PRD6 PRD7
ACK
BUSY
PE
SLCT
ERROR
PINIT
AUTOFD
SLCTIN
STROBE
Serial
Port
TXD DTR RTS CTS DSR DCD
RI
RXD
DRVDEN0
Floppy
Disk
DRVDEN1
INDEX
MTR0
DS1 DS0
MTR1
DIR
STEP
WDATA WGATE TRAK00
WRTPRT
RDATA HDSEL
GND
L10
DSKCHG
GND
GND
GND
GND
L11
L12
L13
P10
USB_VCC
E15
12
C462
.1UF_0402
F14
USBCLK
C15 B18
A18 B19 A19
B20 A20 C17 B17
OVCUR#0
A17
OVCUR#1
D16
LPD0
D11
LPD1
C12
LPD2
A12
LPD3
E12
LPD4
C13
LPD5
B13
LPD6
A13
LPD7
C14 B14
A14 D13 E13 F11 B12 E11 D12 A11
TXD1
B15
DTR1#
A16
RTS1#
A15
CTS1#
B16
DSR1#
D14
DCD1#
D15
RI1#
C16
RXD1
E14
L17 K17
INDEX#
L20 K18 K19 J17 J16 K20 J18 J19 J20
TRAK0#
H16
WP#
H17
RDATA#
H20 H19
DSKCHG#
H18
INDEX# RDATA#
DSKCHG# WP#
TRAK0#
RTS1#
1 2
FBM-L11-160808-601LMP 12
C458
10UF_10V_1206
USBCLK 11 USBP0+ 28
USBP0- 28 USBP1+ 28 USBP1- 28
USBP2+ 28 USBP2- 28 USBP3+ 28 USBP3- 28
OVCUR#0 28,35 OVCUR#1 28
LPTACK# 28,35 LPTBUSY 28,35 LPTPE 28,35 LPTSLCT 28,35 LPTERR# 28,35 LPTINIT# 28,35 LPTAFD# 28,35 LPTSLCTIN# 28,35 LPTSTB# 28,35
TXD1 35 DTR1# 35 RTS1# 35 CTS1# 35 DSR1# 35 DCD1# 35
RXD1 35
R421 1K_0402 R420 330_0402
8P4R_1K_0804
R363 10K_0402 R366 10K_0402
C
L51
LPD[0..7] 28,35
RP64 1 8 2 7 3 6 4 5
+3VS
12
+3VS
.1UF_0402
12
10K_0402
C460
USBCLK
R364
12
R360 10_0402
12
15PF_0402
RI1# 35
C463
PCM_RI#16
MODEM_RI#36
RING#31
D18
RB751V D19
RB751V
Q40
2N7002
+3V
12
R370 100K_0402
21
21
13
D
2
G
S
12
R388 100K_0402
RIA0 35
Power-On Configuration Strapping Pins
+3VS
SA1621
PM_SLP_S1#7,10,20,31,33
MCCS#20
+5VS
12 12
+3VS
12 12
SA1721
CLKRUN#
PIR(38)
12
R394 4.7K_0402
12
R283 10K_0402
12
R376 10K_0402
12
R371 @10K_0402
12
R338 10K_0402
12
R337 @10K_0402
12
R508 4.7K_0402
12
R290 @1K_0402
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1044
Size Document Number Rev
B
401196
*+,
-.
,
Date: Sheet
17, 2002
LO:Disable LPC ROM
Hi:INIT polarity ( slot A )
+3VS
H:Disable CPU strapping
+3VS
L:Enable CPU strapping
+3VS
H:Disable auto reboot L:Enable auto reboot
+3VS
D
19 44
of
2A
Page 20
A
B
C
D
VT8231-B
1 1
R291
C395
12
AC97_BCLK24,36 AC97_SDIN024 AC97_SDIN136 AC97_SYNC24,36
AC97_SDOUT24,36
AC97_RST#24,36
2 2
3 3
4 4
15PF_0402
R300 22_0402 R299 22_0402 R307 22_0402
PDD[0..15]22
PDCS1#22 PDCS3#22
PDDREQ#22
PDDACK#22
PDIOR#22
PDIOW#22
PDIORDY22
PDA022 PDA122 PDA222
SDCS1#22 SDCS3#22
SDDREQ#22
SDDACK#22
SDIOR#22
SDIOW#22
SDIORDY22
SDA022 SDA122 SDA222
+3V
10_0402
12 12 12
12
C409 .1UF_0402
12
PDD0 PDD1 PDD2 PDD3 PDD4 PDD5
PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
R16 U20
N17 R20 R18
R19 N16
R17
N20 N18
N19 M19
M18 M20
U18 U19
U17 W20 W19
T16
T19 P16
P18
P17 T20 T18
T17 L18
L19 P19
P20
Y19 Y20
V19 V18 V20
J3 H1 H2
G1
H3
G2
J2 K5 K4 J1 H5
G3
H4 F1 J4
G4
P5 P6
U34B
BITCLK SDIN0 SDIN1 SYNC SDOUT ACRST JBY JBX JAY JAX JAB2 JAB1 JBB2 JBB1 MSO/SPDIF MSI/I2S
PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
PDCS1 PDCS3
PDDREQ PDDACK PDIOR PDIOW PHDRDY
PDA0 PDA1 PDA2
SDCS1 SDCS3
SDDREQ SDDACK SDIOR SDIOW SHDRDY
SDA0 SDA1 SDA2
VCCSUS VCCSUS
VT8231
R15
R14
P13
VCC
VCC
AC97 Audio/Modem Game Port
Primary IDE
Secondary IDE
* *
Power
GND
GND
GND
M9
M10
M11
M8
R10P9P8
R13
P12
P11
VCC
VCC
VCC
VCC
VCC
VCC
Power
CPU Interface
Power Management and External State Monitoring
R*
GPIO
PCS1/SDIN2/GPI19/GPO19
Hardware Monitoring
VH* VH*
Ground
GND
GND
GND
GND
GND
GND
M12
M13G7G11
G14
+3VS
R9
R7
CPURST
VCC
VCC
VCC
IGNNE
STPCLK
EXTSMI/GPI2
*
PWRGD
R*
PWRBTN
*
RSMRST
R*
RING/GPI3
* * *
PME/GPI6
*
LID/GPI4
*
BATLOW/GPI5
*
SUSST1/GPO3
*
SUSCLK/GPO4
*
SUSA/GPO1
*
SUSB/GPO2
* *
SMBALT/GPI7
*
SMBCLK
*
SMBDATA
*
GPIOA/GPI24/GPO24 GPIOC/GPI25/GPO25 GPIOD/GPI30/GPO30 GPIOE/GPI31/GPO31
PCS0/GPO16
MCCS/GPO17
CPUSTP/GPO5
PCISTP/GPO6 ROMCS/KBCS
SPEAK
VH* VH* VH* VH*
FAN2/GPI18/GPO18
VH*
VH*
VDD78
VH*
GND78
GND
GND
GND
GND
GND
H15
L15
N15
P7
K6
A20M
FERR
INIT
INTR
SLP
GPO0
GPI1
SUSC
GPI0
UIC1 UIC2 UIC3 UIC4 UIC5
FAN1
DTD+ VFER
DTD-
NMI SMI
W5 U4
1 2
R314 @0_0402
U5 T6 V5 R6 T5 U6 Y5 V6
W1 E2 U2 F2 U3 R4 V3 U1 V2 T3 N5 W2 P1 P2 N3 T2 R3 T1
F4 Y2 J5 Y1 W3 Y6 W6 G5 P4 T4
T9 U9
M1 M3 M2 L4 L1
K2 K3
L2 K1 L3 M5
L5
DPSLP#
EXTSMI# PBTN# SWI#
PME_SB# LID# BATLOW# SUS_STAT#R SUS_CLKPDD6
VRCHGNG# FLASH#
PCS0# MCCS#
CPUSTP# PCISTP#
SPKR
12
.1UF_0402
12
R69
1.5K_0402
4.7K_0402
HA20M# 6 CPURST# 4,8 FERR# 4 HIGNNE# 6 HCPUINIT# 6 HINTR 6 HNMI 6 DPSLP# 7 HSMI# 6 HSTPCLK# 6
EXTSMI# 31 SPWROFF# 6,19,31,33
RSMRST# 33 SWI# 31 MUTE# 32 SCI# 31
PM_SLP_S1# 7,10,19,31,33 PM_SLP_S3# 31 PM_SLP_S5# 31
SMB_SB_CK 7,12 SMB_SB_DA 7,12
PID2 15 VRCHGNG# 6 PM_BATLOW# 31 FLASH# 32 PID3 15
MCCS# 19 GT_LO/HI# 6 CPUSTP# 6,11,33 PCISTP# 7,11
SPKR 24
HW_VCC
12
C396
C402 10UF_10V_1206
1 2
R289 10K_0402
1 2
R292 10K_0402
+3VS
12 L49 FBM-L11-160808-601LMP
+3V
+3V
DPSLP#
PME_SB#
PBTN#
LID#
BATLOW#
VRCHGNG# FLASH#
SUS_CLK SUS_STAT# PBTN# CPUSTP# PCISTP# EXTSMI# BATLOW# LID#
PCS0# SPKR
PIR(38)
1 2
R303 10K_0402
D16
2 1
RB751V
D17
2 1
RB751V D26
2 1
RB751V
D15
RB751V
1 2
R306 @10K_0402
1 2
R293 10K_0402
1 2
R354 @10K_0402
1 2
R279 @10K_0402
1 2
R310 10K_0402
1 2
R311 @10K_0402
1 2
R382 @10K_0402
1 2
R348 @10K_0402
1 2
R288 10K_0402
1 2
R351 10K_0402
1 2
R368 @10K_0402
1 2
R391 4.7K_0402
+1.5VS+1.5VS+3VS
12
12
2
SUS_STAT#SUS_STAT#R
R77
1.5K_0402
H_DPSLP# 4,40
1
Q13 3904
3
+3V
PBTN_OUT# 31
LID_OUT# 31
SUS_STAT# 6,29
+3VS +3V+3V +3VS
R70
21
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
Title
SCHEMATIC, M/B LA-1044
Size Document Number Rev
B
401196
*+,
-.
,
Date: Sheet
17, 2002
D
20 44
of
2A
Page 21
A
B
C
D
E
VT8231-C
1 1
2 2
3 3
OSCSB11
SDD[0..15]22
R356
10_0402
C465
15PF_0402
+3VS
R02 VALUE CHANGE
SA1619 SA1719
OVCUR#227
IRQ1422 IRQ1522
SERIRQ16,31
OSCSB
12
+RTCVCC
12
THRM#31
PID115
PID015
L55
1 2
FBM-L11-160808-601LMP
SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
SA16 SA17
OVCUR#2
MEMR# MEMW# IOR# IOW#
IRQ14 IRQ15 SERIRQ
12
SYSVOL_UP# SYSVOL_DW#
THRM# CPUMISS INTRUDER#
PLLVDD
12
C500 .1UF_0402
C397 .1UF_0402
W17
W15
W14
W16
W18
W13
M16
Y18 V16
Y16 V14
U16 U15 T15
Y15 V15
Y17 V17
Y14 T13 U13 V13
Y13
W9
Y9 U7 T7
T14 U14
V9
T12
E1
R2 R1 P3 V1 F3
V4
W4
Y4 Y3
L16
U34C
SA0/SDD0 SA1/SDD1 SA2/SDD2 SA3/SDD3 SA4/SDD4 SA5/SDD5 SA6/SDD6 SA7/SDD7 SA8/SDD8 SA9/SDD9 SA10/SDD10 SA11/SDD11 SA12/SDD12 SA13/SDD13 SA14/SDD14 SA15/SDD15
SA16 SA17 SA18 SA19 LA20/GPO20 LA21/GPO21
MEMR MEMW IOR/OC2/GPO22 IOW/OC3/GPO23
IRQ14 IRQ15 SERIRQ
OSC
VBAT
SMBDT2/GPI26/GPO26 SMBCK2/GPI27/GPO27 AOLGPI/GPI17 CPUMISS/GPI16 INTRUDER/GPI8
APICREQ/WSC/GPI14 APICCS/PICD0/GPI28/GPO28 APICACK/PICD1/GPI29/GPO29 APICCLK/GPI9
PLLVDD
PLLGND
VT8231
14.31818MHz
R*
RTC Battery
Power and Ground for Internal PLL
Secondary IDE
ISA Bus
* * R*
*
I2C and
*
Monitoring
RTC Clock
R* R*
RTCX1
E3
Y5
32.768KHZ
12
C399 10PF_0402
APIC
LPC Interface
LPC Interface
PCI Bus
LAN Controller
Serial EEPROM
RTCX2
F5
12
C413 10PF_0402
SD8/HREQ1/GPI10
SD9/HGNT1/GPO8
SD10/HREQ2/GPI11
SD11/HGNT2/GPO9 SD12/LREQ1/GPI12
SD13/LGNT1/GPO10
SD14/LREQ2/GPI13
SD15/LGNT2/GPO11
LFRAME
LREQ/SDIN3/GPI15
LAD0 LAD1 LAD2 LAD3
REQH
GNTH
CRS
L* L*
MTXE
L*
MTXD0
L*
MTXD1
L*
MTXD2
L*
MTXD3
L*
MTXC
L*
MRXER
L*
MRXC
L*
MRXDV
L*
MRXD0
L*
MRXD1
L*
MRXD2
L*
MRXD3
L*
MDC
L*
MDIO
L*
SEECS SEEDO
SEEDI
SEECLK
VDDRAM
GNDRAM
LAN
VDDM
Power
L*
VDDM
L*
SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7
COL
R12
V12
W12
Y12
U12
U11
R11
T11
Y11
W11
V11
T10
U10
Y10
W10
V10
W8
Y8
V8
Y7
W7
V7
C1
D3
G16
G17
F19
F20
G18
G19
G20
F17
F18
C19
E20
E19
E18
D20
D19
C20
D18
C18
D17
E17
E16
G15
G13
F16
K16
SD8 SD10 SD12 SD14
LFRAME# LDRQ# LAD0 LAD1 LAD2 LAD3
+3VS
ENDIM0 12 ENDIM1 12 PIDERST# 22 SIDERST# 22
RP70 1 2 3 4 5
10P8R_10K
RP63 1 8 2 7 3 6 4 5
8P4R_10K_0804
LFRAME# 31 LDRQ# 31 LAD0 31 LAD1 31 LAD2 31 LAD3 31
REQ#4 10,18 GNT#4 10,18
10 9 8 7 6
CPUMISS
INTRUDER#
SD8 SD10 SD12 SD14
LAD0 LAD1 LAD2 LAD3
LDRQ# LFRAME# IOR# IOW#
MEMR# MEMW# SERIRQ
IRQ14 IRQ15
SYSVOL_UP# SYSVOL_DW#
1 2
R309 10K_0402
1 2
R308 10K_0402
RP37 1 8 2 7 3 6 4 5
8P4R_4.7K_0804
RP74 1 8 2 7 3 6 4 5
8P4R_4.7K_0804
12
R319 4.7K_0402
12
R318 4.7K_0402
12
R317 4.7K_0402
12
R315 4.7K_0402
RP46 1 8 2 7 3 6 4 5
8P4R_4.7K_0804
RP48 1 8 2 7 3 6 4 5
8P4R_4.7K_0804
12
R285 4.7K_0402
12
R284 4.7K_0402
+3V
+RTCVCC
+3VS
+3VS
+5VS
+3V
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044
B
401196
*+,
-.
,
17, 2002
21 44
E
2A
of
Page 22
A
B
C
D
E
HDD/CD-ROM Module
+5VS
12
C562 1000PF_0402
1 1
PCIRST#9,14,16,18,19,23,29,31,36
PCIRST# P_IDERST#
PIR(36)
2 2
3 3
4 4
C595
1 2
.1UF_0402
+5VCD
+3VS
5
U64
1 2
7SH08FU
3
HDDACT_LED#27,32
+5VS
+5VCD
FBM-L11-322513-151
INT_CD_L23
CD_IDERST#23
CD_DIOW#23
CD_DIORDY23
CD_IRQ1523 CD_DA123 CD_DA023
CD_DCS1#23
CDACT_LED#27,32
R396 10K_0402
1 2
R150 10K_0402
PDD_IDERST#
4
1 2
R475 10K_0402
L53
1 2
C513
12
10UF_10V_1206
R407 10K_0402
+5VCD_1 +5VCD_1
12
1 2
P_DD7 P_DD6 P_DD5 P_DD4 P_DD3 P_DD2 P_DD1 P_DD0
P_DDREQ# P_DIOW# P_DIOR# P_DIORDY P_DDACK# P_IRQ14 P_DA1 P_DA0 P_DCS#1
+5VS
+5VCD_1
12
12
CD_DD7 CD_DD6 CD_DD5 CD_DD4 CD_DD3 CD_DD2 CD_DD1 CD_DD0
SEC_CSEL
R358 470_0402
12
C177 10UF_10V_1206
Place component's closely IDE CONN.
JP21
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44
HDD CONN
C473 1000PF_0402
CD_DD[0..15]23
12
C470 10UF_10V_1206
Place component's closely IDE CONN.
1 2
R426 @0_0402
JP23
CD-ROM CONN.
12 34 56 78 910 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44
CD_DD[0..15]
12 34 56 78 910 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
12
C561 1UF_25V_0805
12
12
P_DD8 P_DD9 P_DD10 P_DD11 P_DD12 P_DD13 P_DD14 P_DD15
PCSEL
R466 470_0402
P_DA2 P_DCS#3
+5VS
C485 1UF_25V_0805
1 2
R433 @0_0402
CD_DD8 CD_DD9 CD_DD10 CD_DD11 CD_DD12 CD_DD13 CD_DD14 CD_DD15
R411
PDIAG#
W=80mils
C480 .1UF_0402
1 2
R353 100K_0402
C563 .1UF_0402
+5VS
1 2
12
C478 .1UF_0402
1 2
12
12
R398 100K_0402
CD_AGND 23,24
INT_CD_R 23
CD_DDREQ# 23 CD_DIOR# 23
CD_DACK# 23
100K_0402
CD_DA2 23 CD_DCS3# 23
+5VCD_1 +5VCD_1 +5VCD_1
+5VCD
+5VCD
SDCS3#20 SDCS1#20 SDA220 SDA020
PDD[0..15]20
PDCS3#20 PDCS1#20 PDA220 PDA020
PDA120
IRQ1421
PDIORDY20
PIDERST#21
PDIOW#20
PDIOR#20 PDDREQ#20 PDDACK#20
SDA120
IRQ1521
SDIORDY20
SIDERST#21
SDIOW#20
SDIOR#20 SDDREQ#20
SDDACK#20
PIDERST# P_IDERST#
SDD[0..15]21
S_DD[0..15]23
SIDERST#
PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7
PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7
SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
PDD[0..15]
RP68 1 2 3 4 5 6 7 8 9
16P8R_33
RP67 1 2 3 4 5 6 7 8 9
16P8R_33
RP65 1 8 2 7 3 6 4 5
8P4R_33_0804
RP62 1 8 2 7 3 6 4 5
8P4R_22_0804
RP66 1 8 2 7 3 6 4 5
8P4R_22_0804
SDD[0..15] S_DD[0..15]
RP40
16 15 14 13 12 11 10
16P8R_33
RP52 1 2 3 4 5 6 7 8 9
16P8R_33
RP71 1 8 2 7 3 6 4 5
8P4R_33_0804
RP58 1 8 2 7 3 6 4 5
8P4R_22_0804
RP61 1 8 2 7 3 6 4 5
8P4R_22_0804
P_DD0
16
P_DD1
15
P_DD2
14
P_DD3
13
P_DD4
12
P_DD5
11
P_DD6
10
P_DD7
P_DD8
16
P_DD9
15
P_DD10
14
P_DD11
13
P_DD12
12
P_DD13
11
P_DD14
10
P_DD15
P_DCS#3 P_DCS#1 P_DA2 P_DA0
P_DA1 P_IRQ14 P_DIORDY
1 2
R415 1K_0402
P_DIOW# P_DIOR# P_DDREQ# P_DDACK#
R422 5.6K_0402
S_DD0
1
S_DD1
2
S_DD2
3
S_DD3
4
S_DD4
5
S_DD5
6
S_DD6
7
S_DD7
89
S_DD8SDD8
16
S_DD9
15
S_DD10
14
S_DD11
13
S_DD12
12
S_DD13
11
S_DD14
10
S_DD15
1 2
R409 1K_0402
R412 5.6K_0402
12
12
+5VS
S_DCS3# 23 S_DCS1# 23 S_DA2 23 S_DA0 23
S_DA1 23 S_IRQ15 23 S_DIORDY 23 S_IDERST# 23
+5VS
S_DIOW# 23 S_DIOR# 23 S_DDREQ# 23 S_DACK# 23
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
Size Document Number Rev
B
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044 401196
*+,
-.
,
17, 2002
22 44
E
2A
of
Page 23
A
CD_PLAY
EC_SMD24,31,35
1 1
2 2
EC_SMC24,31,35
OSC1
12
PLAYBTN# REVBTN# FRDBTN# STOPBTN#
PCIRST#9,14,16,18,19,22,29,31,36
S_IDERST#22
U14
1 2
YZ
3
GND
DJ@74HCT1G66
U15
1 2
YZ
3
GND
DJ@74HCT1G66
X3
DJ@8MHZ
R379 DJ@1M_0402 C492 DJ@10PF_0402
1 8 2 7 3 6 4 5
DJ@8P4R_10K_0804
RP54
PCIRST# S_IDERST#
PIR(36)
C173 DJ@1UF_10V
12
3 3
4 4
+5VCD
12
C429
4.7UF_10V_0805
12
C434
4.7UF_10V_0805
1 2
R142 DJ@100K_0402
D6 DJ@1N4148
+5VALW
12
C430 1UF_25V_0805
+5VCD
12
C431 1UF_25V_0805
A
21
VCCE
VCCE
OSC2
C596
1 2
.1UF_0402
+5VALW
+5VALW
54
54
12
C482 DJ@10PF_0402
+5VCD
+3VS
5
1 2
3
+3VCD
DJ@22K_0402
EC_SMD1_CD
EC_SMC1_CD
EC_SMD1_CD
EC_SMC1_CD
U65
4
7SH08FU
+5VCD
DM_ON
R148
U33 8 7 6 5
SI4800
S_DIORDY22
S_DDREQ#22
SDD_IDERST#
12
12
D D D D
33_0402
S_DA022 S_DA122 S_DA222
S_DCS1#22 S_DCS3#22
S_DIOR#22 S_DIOW#22
S_IRQ1522 S_DACK#22
R381
1 2
DJ@10K_0402
D5
DJ@RB751V
R144 DJ@22K_0402
+5VCD
1
S
2
S
3
S
4
G
12
R132
13
1 2
21
2
Q37
2N7002
DJ@33_0402
12
EC_SMD1_CD 25 EC_SMC1_CD 25
C425 .1UF_0402
S_DD[0..15]
S_DD0 S_DD1 S_DD2 S_DD3 S_DD4 S_DD5 S_DD6 S_DD7 S_DD8 S_DD9 S_DD10 S_DD11 S_DD12 S_DD13 S_DD14 S_DD15
S_DA0 S_DA1 S_DA2
S_DCS1# S_DCS3#
S_DIOR# S_DIOW#
S_DIORDY
S_IRQ15 S_DDREQ# S_DACK#
R147
PLAYBTN# FRDBTN# REVBTN# STOPBTN#
INTN
OSC1 OSC2
+12VALW
B
12
R324 100K_0402
13
2N7002
B
2
Q35
S_DD[0..15] 22
76
HDD0
78
HDD1
81
HDD2
83
HDD3
86
HDD4
90
HDD5
95
HDD6
97
HDD7
2
HDD8
4
HDD9
8
HDD10
11
HDD11
15
HDD12
18
HDD13
20
HDD14
22
HDD15
68
HDA0
70
HDA1
66
HDA2
63
HCS0
61
HCS1
99
HDIOR#
6
HDIOW#
72
HIOCS16#
93
HIORDY
74
HINTRQ
12
HDMARQ
88
HDMACK#
24
HRESET#
59
HDASPN
48
HSYNC
53
HBIT_CLK
55
HDATA_OUT
50
HDATA_IN
46
HACRSTN
28
PAV_EN
36
PLAY/PAUSE
35
FFORWARD
34
REWIND
37
STOP/EJECT
29
PCSYSTEM_OFF
25
INTN
30
RESET#
26
SDATA
27
SCLK
31
OSCI
32
OSCO
94458
VDD
GND
1633658592
+5VALW POWER
+5VCD_2
VDD
VDD
CHDMACK#
SDATA_OUT
GPIO[1]/VOL_UP GPIO[0]/VOL_DN
GND
GND
GND
GND
EN_CDPLAY# 25,26
+5VALW
U35D
74HCT14
98
7 14
C
+5VCD
1 2
DJ@10K_0402
C488 DJ@.1UF_0402
CD_DA0 22 CD_DA1 22 CD_DA2 22
CD_DCS1# 22 CD_DCS3# 22
CD_DIOR# 22 CD_DIOW# 22
CD_DIORDY 22
CD_IRQ15 22 CD_DDREQ# 22 CD_DACK# 22
CD_IDERST# 22
L52 DJ@HB-1M2012-601JT
INT_CD_L22
INT_CD_R22
+5VCD
+5VCD
CD_PLAY_ON#
R126
R130 33K_0402
R133 33K_0402
R131
CD_DD[0..15]
+5VCD
+5VCD
+5VALW
5 6
20K_0402
20K_0402
ISCDROM CD_IRQ15 CDASPN INTN
CIOCS16#
CD_DD0 CD_DD1 CD_DD2 CD_DD3
CD_DD8 CD_DD9 CD_DD10 CD_DD11
+5VALW POWER
7 14
U35C 74HCT14
C454 DJ@.1UF_0402
CDD0 CDD1 CDD2 CDD3 CDD4 CDD5 CDD6 CDD7 CDD8
CDD9 CDD10 CDD11 CDD12 CDD13 CDD14 CDD15
CDA0
CDA1
CDA2
CCS0
CCS1
CDIOR#
CDIOW#
CIOCS16#
CIORDY
CHINTRQ CDMARQ
CRESET#
CDASPN
SSYNC
SBIT_CLK
SDATA_IN
SACRSTN
PWR_CTL
ISCDROM
MODE0 MODE1
PAVMODE
CSN
INCN
UDN
CD_PLAYEN_CDPLAY#
C461 DJ@.1UF_0402
U41 DJ@OZ163
CD_DD0
77
CD_DD1
79
CD_DD2
82
CD_DD3
84
CD_DD4
87
CD_DD5
91
CD_DD6
96
CD_DD7
98
CD_DD8
1
CD_DD9
3
CD_DD10
7
CD_DD11
10
CD_DD12
14
CD_DD13
17
CD_DD14
19
CD_DD15
21
CD_DA0
69
CD_DA1
71
CD_DA2
67
CD_DCS1#
64
CD_DCS3#
62
CD_DIOR#
100
CD_DIOW#
5
CIOCS16#
73
CD_DIORDY
94
CD_IRQ15
75
CD_DDREQ#
13
CD_DACK#
89
CD_IDERST#
23
CDASPN
60 47
52 54 49 45
1 2
51
R332
ISCDROM
80
GPIO_1
39
GPIO_0
40
MODE0
56
MODE1
57
1 2
38
R141 DJ@10K_0402 41 42 43
CD_PLAY_ON#32
CD_PLAY 32
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
D
INT_CD_L1
12
12
12
12
1 2 3 4 5
R145 DJ@47K_0402
1 2 3 4 5
1 2 3 4 5
INT_CD_R1
CD_DD[0..15] 22
RP51
DJ@10P8R_10K
1 2
RP55
DJ@10P8R_4.7K
RP72
DJ@10P8R_4.7K
DM_ON
2
D
1 2
1 2
C168
1UF_10V
C170
1UF_10V
10 9 8 7 6
10 9 8 7 6
10 9 8 7 6
+5VCD
12
13
CD_AGND22,24
MODE0 MODE1 GPIO_0 GPIO_1
CD_DD7 CD_DD6 CD_DD5 CD_DD4
CD_DD15 CD_DD14 CD_DD13 CD_DD12
R143 10K_0402
DM_ON#
Q19 2N7002
.1UF_0402
INT_CD_L2
INT_CD_R2
INT_CD_L2
INT_CD_R2
+5VCD
+5VCD
+5VCD
+5VCD
E
Audio DJ OZ163
1 3
Q17 @2N7002
2
DM_ON
+5VCD
C459
12
DM_ON
DM_ON
DM_ON#
DM_ON#
U31A 74HCT4066
14
1 2 7
13
U31B 14 11 10
7
12
74HCT4066
U31C 14
4 3 7
5
74HCT4066
U31D 14
8 9 7
6
74HCT4066
S_DCS3# S_DCS1# S_DA2 S_DA0 S_DA1 S_DIOW# S_DIOR# S_DACK#
S_DD0 S_DD1 S_DD2 S_DD3 S_DD4 S_DD5 S_DD6 S_DD7
S_DD8 S_DD9 S_DD10 S_DD11 S_DD12 S_DD13 S_DD14 S_DD15
1 2
R378 DJN_0_0402
1 2
R342 DJN_0_0402
1 2
R139 DJN_0_0402
1 2
R146 DJN_0_0402
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044
B
401196
*+,
-.
,
17, 2002
Input to EQ
CDROM_L 24
Input to CODEC
CDROM_R 24
RP23 1 2 3 4 5 6 7 8 9
DJN_16P8R_0
RP49 1 2 3 4 5 6 7 8 9
DJN_16P8R_0
RP56
16 15 14 13 12 11 10
DJN_16P8R_0
R149 1K_0402
R140 5.6K_0402
LEFT_EQ 24,25
RIGHT_EQ 24,25
CD_DCS3#
16
CD_DCS1#
15
CD_DA2
14
CD_DA0
13
CD_DA1
12
CD_DIOW#
11
CD_DIOR#
10
CD_DACK#
CD_DD0
16
CD_DD1
15
CD_DD2
14
CD_DD3
13
CD_DD4
12
CD_DD5
11
CD_DD6
10
CD_DD7
CD_DD8
1
CD_DD9
2
CD_DD10
3
CD_DD11
4
CD_DD12
5
CD_DD13
6
CD_DD14
7
CD_DD15
89
12
CD_DIORDYS_DIORDY
CD_IRQ15S_IRQ15 1 2
CD_DDREQ#S_DDREQ#
CD_IDERST#SDD_IDERST#
E
+5VCD
23 44
of
2A
Page 24
A
+3VALW
4
+3VALW POWER
PCM_SPK#16
12
R389 100K_1%
1 2
BEEP#31
U48B 74LVC125
5 6
1 1
R390
10K_1%
C503 .22UF
B
+3VALW
14
9 8
12
+3VALW
14 11 10
+3VALW
U42D 74LVC14
+3VALW POWER
U42E 74LVC14
+3VALW POWER
C520
C519
12
1UF_10V
12
1UF_10V
C
1 2
R441 560_0402
1 2
R439 560_0402
2
AVDD
12
R330 10K_0402
12
R335 10K_0402
1 3
Q36 2SC2411EK
12
C452 1UF_10V
C441 1UF_25V_0805
12
R340
2.4K_0402
D
1 2
MONO_IN
E
F
G
H
AC97 Codec
+5VS+5VALW
R276 10K_0402
U29
C375
4.7UF_10V_0805
3
12
12
C376 .1UF_0402
VIN
MAX8868_EUK50
VOUT
GNDSHDN#
4 5
BP
21
12
C372 .01UF_0402
12
AVDD
C373
4.7UF_10V_0805
PIR(5)
14
SPKR20
2 2
12
R312 1K_0402
MD_SPK36
3 3
12
R304 10K_0402
CDROM_L23 CDROM_R23
MOD_AUDIO_MON36
13 12
MDSPK
1 2
C403 1UF_10V
AC97_RST#20,36
AC97_BCLK20,36
AC97_SYNC20,36
AC97_SDOUT20,36
AC97_SDIN020
MOD_AUDIO_MONR
1 2
C412 1UF_10V
1 2
C416 1UF_10V
12
R278 20K_0402
U42F 74LVC14
+3VALW POWER
C392 15PF_0402
1 2
C410 .1UF_0402
12
R282 33K_0402
12
C518
1UF_10V
C406
22PF_0402
MOD_AUDIO_MONR
24.576MHz
12
R294 22_0402
R295 22_0402 MONO_IN
MDSPK
1 2
R438 560_0402
1M_0402 R305
Y4
C393
22PF_0402
1 2
1 2
MICIN26
.1UF_0402
C411
12
R444 10K_0402
12
2 3
11
6
10
5 8
12 13 14 15 16 17 18 20 21 22 23 24
D30
RB751V
2 1
XTL-IN XTL-OUT
RESET# BIT-CLK SYNC SDATA-OUT SDATA-IN
PC-BEEP PHONE AUX-L AUX-R VIDEO-L VIDEO-R CD-L CD-R MIC1 MIC2 LINE-L LINE-R
VDDC
12
C398 .1UF_0402
AVDD_AC97
1925
38
VDD
VDD
AVDD
AVDD
LINE-OUTL LINE-OUTR
MONO-OUT
HP-OUT-R
VSS
VSS
AVSS
AVSS
CD-GND
4
7
26
42
19
12
C419 .1UF_0402
VREF
VREFOUT
AFILT1 AFILT2
VRAD VRDA
CAP1
JD/SDIN1
TEST1
ID0# ID1#
EAPD
SPDIFO
HP-OUT-L
ALC201
R302 0_0805
12
10UF_10V_1206
U30
35 36 37
27 28
29 30
31 32 33 34
NC
43 44 45 46 47 48 39 40
NC
41
1 2
C394
12
C433 10UF_10V_1206
1000PF_0402
LINEL LINER MDMIC
C438
12
C436
C447
@1000PF_0402
R114 @10K_0402
+3VS
1 2
AUD_VREF
1000PF_0402
C439
1000PF_0402
12
R115 @10K_0402
C437 1000PF_0402
1 2
C445 4.7UF_10V_0805
1 2
R113 33_0402
1 2
+
C443 1UF_10V
C448 1UF_10V
C446 4.7UF_10V_0805
12
C440 .1UF_0402
C449 1UF_10V
1 2
C450
1UF_10V
SPDIFO 35
1 2
C442 1UF_25V_0805
1 2
C435 1000PF_0402
AVDD
C424
.1UF_0402
L50
1 2
HB-1M2012-121JT
12
AVDD_AC97
12
C428 10UF_10V_1206
LEFT_EQ 23,25 RIGHT_EQ 23,25
MD_MIC 36
1 2
L24 0_0805
1 2
L58 0_0805
12
R321
6.8K_0402
CD_GNA
C
1 2
C414 .1UF_0402
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
D
E
F
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1044
Size Document Number Rev
B
401196
*+,
-.
,
Date: Sheet
17, 2002
G
24 44
of
H
2A
CD_AGND22,23
4 4
A
12
R320 6.8K_0402
B
Page 25
A
UPDATED EQ SCHEMATICS
R432 EQ@20K_0402
+3VCD
+3VCD
1 2
1 2
R450 EQ@20K_0402
12
R401 EQ@10K_0402
12
C498 EQ@.1UF_0402
+3VCD
C499
+3VCD
12
12
LEFT_EQ23,24
RIGHT_EQ23,24
R393 EQ@10K_0402
R387 @10K_0402
HPS26
+3VCD_A
+
A
CS1
1 2
EQ@FBM-11-160808-121
12
C515 EQ@.1UF_0402
D20
EQ@RB751V
L56
+3VCD
21
C526
@220PF_0402
C542
@220PF_0402
12
R385 EQ@10K_0402
1 1
2 2
3 3
EQ@10UF_10V_1206
4 4
B
R435
1 2 EQN_0_0402
R431 @4.22K
1 2
R451
1 2
EQN_0_0402
R448 @4.22K
1 2
X2
EQ@24.576MHz
C464 EQ@15PF_0402
C477
EQ@10UF_10V_1206
RP69
45 36 27 18
EQ@8P4R_10K_0804
RP73
45 36 27 18
EQ@8P4R_10K_0804
B
+3VCD
IO0 IO1 IO2 IO3
IO4 IO5
EQ@10K_0402
C469 EQ@15PF_0402
+
R380
EQ_SCL EQ_SDA
CS1
R384
@10K_0402
12
C479 EQ@.1UF_0402
LEFT_BYPASS 26
RIGHT_BYPASS 26
+3VCD
12
12
C
U43
22
SDIN1
23
SDIN2
26
SDOUT1
24
SDOUT2
25
SDOUT_ADC
19
LRCLK/O
20
SCLK/O
12
MCLK_OUT
13
XTLIN1/MCLK
14
XTLIN2
15
SCL
16
SDA
5
INPA_ACT
6
RST#
7
CS1
8
PWRDWN
9
TEST
11
CLK_SEL
21
IFM/S
27
ALLPASS
IO0
28
IO0
IO1
29
IO1
IO2
30
IO2
IO3
31
IO3
IO4
32
IO4
IO5
33
IO5
17
DVDD
18
DVSS
EQ@TAS3002CPFB
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
LINA LINB
RINA RINB
ANLP ANLM
ANRP
ANRM
AOUTR
VCOM
AOUTL
VRFILT
VREFP
VREFM
CAP_PLL
AVDD
AVSSREF
AVSS
NC1
1
C527
1 2
48
EQ@1UF_10V
40
C529
1 2
41
EQ@1UF_10V
47 46
42 43
R383 EQ@27.4
12
C476 EQ@.068UF
RIGHT
LEFT
+3VCD_A
37 38 39 34
NC
36 2 44 45 10
35
3 4
12
C483 EQ@1500PF
D
+3VALW
C536
EQ@1200PF
C534
EQ@1200PF
RIGHT 26
LEFT 26
D
U37
8
D
7
D
6
D
5
D
SI4800
EQ_SCL EQ_SDA
R449
EQ@24.9K R447
EQ@24.9K
C497
EQ@10UF_10V_1206
12
C530 EQ@.1UF_0402
E
DIGITAL EQ
+3VCD
+12VALW
12
R359
1
S
2
S
3
S
4
G
12
R362
33_0402
13
+
12
C539 EQ@1UF_10V
Title
Size Document Number Rev
Date: Sheet
100K_0402
C468
.1UF_0402
12
13
2
Q38
2N7002
2
Q39
2N7002
R369 EQ@0_0402
1 2
R377 EQ@0_0402
1 2
10UF_10V_1206
12
C504 EQ@.1UF_0402
C533
12
+
C541 EQ@.1UF_0402
12
C531 .1UF_0402
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044
B
401196
*+,
-.
,
17, 2002
EN_CDPLAY# 23,26
EC_SMC1_CD 23 EC_SMD1_CD 23
EQOUT_VREF 26
E
25 44
of
2A
Page 26
+5VALW
147
U26A
1 2
74AHCT32
1 1
2 2
DOCK_HP_OUT_PLUG35
3 3
LOUT_VREF
RIGHT
1 2
C559
2.2UF_16V_0805
4 4
LOUT_VREF
LEFT
1 2
C547
2.2UF_16V_0805
A
3
RIGHT_BYPASS25
RIGHT25
LEFT_BYPASS25
LEFT25
HPS1
HP_OUT_PLUG27
LINE_OUT_PLUG
1 2
R470 56K_0402
1 2
R445 56K_0402
RIGHT
1 2
C528 2.2UF_16V_0805
LEFT
1 2
C553 2.2UF_16V_0805
+5VALW
12
R204
10K_0402
12 13
12
R207 100K_0402
1 2
C555 22PF_0402
1 2
R471 82K_0402
+5VAMP
U53A
84
TDA1308
3
+
1
2
-
1 2
C535 22PF_0402
1 2
R443 82K_0402
+5VAMP
U53B
84
TDA1308
5
+
7
6
-
+5VAMP
EC_MUTE_LINE#
EC_MUTE_LINE#
+5VALW
147
4 5
HP_OUT_PLUG
+5VALW
147
U26D
74AHCT32
U26B
74AHCT32
HPS25
+5VAMP
10K_0402
11
14
1 2 7
+5VAMP
14
4 3 7
L57
1 2
0_0805
U62B 74HCT4066
14 11 10
7
12 U62D
74HCT4066
14
8 9 7
6
HPS
6
RB751V
R469
1 2
@100K_0402
+5VALW
12
+5VALW
R203
147
9
10
U62A 74HCT4066
LINEOUTR
13
EC_MUTE_LINE# EC_MUTE_L#
C583 .1UF_0402 1 2
U62C 74HCT4066
LINEOUTL
5
EC_MUTE_LINE#
PIR(12)
A
D33
U26C
74AHCT32
12
C545 .1UF_0402
RIGHT_SW
LEFT_SW
+5VAMP
12
R472 100K_0402
21
12
R473 100K_0402
8
EN_CDPLAY#23,25
R481 0_0603
B
+5VAMPP
12
C546 .1UF_0402
8
18
U51
17
RLINEIN
15
LLINEIN
4
HPS
5
MODE
HPS1
+5VALW +5VAMP
4.7UF_10V_0805
+12VALW
LINEOUTR 35
1 2
LINEOUTL 35
B
13
VDD2
GND2
GND1 VDD1
1 3
L42
0_0805
1 2
100K_0402 R243
VDD4
VDD3
R_UP/DOWN#
L_UP/DOWN#
GND4
GND3
201110
TDA8552TS
12
2N7002
12
+
12
ROUT+
19
ROUT-
2
LOUT+
9
LOUT-
6
7
14
GAINSEL
16
SVR
C552
.1UF_0402
SI2306DS
Q27
1 3
12
C343
2
Q30
1
2
3
EC_MUTE_L# 32 MICIN24
PIR(27)
C
C554 100UF_10V_D2
SPKR+
SPKR­SPKL+
SPKL-
PIR(12)PIR(12)
R468 0_0402
30dB/20dB#
12
12
C550
2.2UF_16V_0805
12
C363 .01UF_0402
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C557 100UF_10V_D2
C558 100UF_10V_D2
12
+5VALW POWER
R474 100K_0402
2 1
D34 RB751V
INTMICOFF#35
AUD_VREF
C
1 2
1 2
HPOUT_R
+
+
HPOUT_L
1
5 24
U57
3
7SZ125
12
+5VAMP
12
C586 1UF
C589
MICIN
1 2
1UF
HPOUT_R 27
HPOUT_L 27
DIS_ADJVOL 32
+5VALW
ADJVOL_UP/DW# 32
+5VALW
U35B 74HCT14
34
7 14
Q11
SI2304DS
12
DOCK_MICEXT_MIC
13
PIR(7)
2
1 2
R34 10M
AVDD
3
+
2
-
C587 .1UF_0402
AVDD
7
1 2
R498 12K_1%
1 2
C591 15PF_NPO_0402
HPS
84
U63B TDA1308
84
+
-
U63A TDA1308
5 6
1
1 2
+12VS
R497
10K_1%
LINEOUTR LINEOUTL
DOCK_MIC 35
R496
1 2
100_0402
1 2
D
1 2
C25 4.7UF_10V_0805
1 2
C23 4.7UF_10V_0805
INT_MIC EXT_MIC
12
C588 .1UF_0402
C590
MIC_IN
.22UF
PIR(15,39)
D
LINEOUT_R LINEOUT_L
HB1M1608-601JT
HB1M1608-601JT
JP8
1 2
R-SPK CONN.
MIC_PWR
HB1M1608-601JT
HB1M1608-601JT
L14
1 2 1 2
L8
1 2
E
AMP & Audio Jack
MIC
+3VCD
12
12
R456 EQN_24K_1%
12
R458 EQN_75K_1%
E
JP10
1
1
2
2
R-SPK CONN.
JP11
1
1
2
2
L-SPK CONN
1 2
7
8
1 2
7
8
R168
2.2K_0402
DOCK_MIC
LOUT_VREF
26 44
JOPEN3
JOPEN1
SPKR+ SPKR-
SPKL+ SPKL-
12
C47
220PF_0402
C24 330PF_0402
FOXCONN JA6033L-101
C16 330PF_0402
MIC_PWR
PIR(15)
12
C192
4.7UF_10V_0805
0_0402
.1UF_0402
R170
1 2
R430 0_0402
12
C46 220PF_0402
LINE_OUT JP2
5 4 3
6 2 1
JP1
5 4 3
6 2 1
1 2
C208
12
12
C44
220PF_0402
LINE_OUT_PLUG
L7 1 2 1 2
L10
C22
330PF_0402
C15
330PF_0402
INT_MIC
PIR(15)
EQOUT_VREF25
Title
Size Document Number Rev
B
Date: Sheet
C43
220PF_0402
12
12
12
12
MIC_IN
1 2
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044 401196
*+,
-.
,
17, 2002
@3MM
@3MM
2A
of
Page 27
A
B
C
D
E
Dot Matrix LCD/FIR
+3VS
12
C17 1000PF_0402
12
C493 1000PF_0402
12
C486 1000PF_0402
12
C489 1000PF_0402
W=40mils
USB_C
USB_CS
12
12
JP24
HP/USB_12PIN
R490 470K_0402
R488 560K_0402
1112
L62
1 2
FBM-11-451616-800T
C415 1000PF_0402
1 2
LEDVCC
12 34 56 78 910
220PF_0402
.1UF_0402
12
S
D
1 3
C582
C576
R485 330_0402
Q56
NDS352P
G
2
12
C581 220PF_0402
USB_C
12
12
+
OVCUR#2 21
12
W=40mils
C575 100UF_10V_D2
BT_ON# 32,37
BT_ON/OFF# 32 HPOUT_L 26
HPOUT_R 26 HP_OUT_PLUG 26
12
C580
220PF_0402
C574 150PF_0402
1 2
MODE FRD
+5VS
12
C19 .01UF_0402
1 1
+5VS
1 2
2 2
3 3
RT9701-CBL
C566
1UF_25V_0805
USB2_D+28 USB2_D-28
3 4
U58
VIN1 VIN2
VOUT1 VOUT2
GND
2
L63
FBM-11-160808-121
1 2 1 2
L61
FBM-11-160808-121
1 5
PIR(41)
+5VS
+5VALW
+5VS
DOT_EN31
DOT_DB432
KSO1731
KSI131 KSI331
KSI531 VOL_UP# 31,32 VOL_DW#31,32 EC_MUTE# 32 MUTELED32 EC_ACT# 31
DJ_ON/OFF#31 51ON# 33,41
MP3_LED#32
PWR1_LED#32
HDDACT_LED#22,32
BATT2_LED#32
IRTXOUT19 IRMODE19
DOT_DB632
CAPSLED#31
NUMLED#31
CDACT_LED#22,32
KSI1 KSI2 KSI3 KSI4
+5VS
KSO1631
BTN2 BTN4
KSI3 KSI4
JP22
12 34 56 78 910 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
CD_PLAYER_50PIN_ACES
JP7
12 34 56 78 910 11 12 13 14 15 16
F_BTN_16PIN
KSI0 KSI2KSI1
KSI0
+5VS +5VALW
LEDVCC LEDVCC
LEDVCC
PLED# 32 ON/OFFBTN# 33
DOT_R/W# 32 DOT_RS 31 DOT_PRES# 32 KSI0 31 KSI2 31 KSI4 31
CDPLAY_LED# 32 PWR2_LED# 32 BATT1_LED# 32 BACKLIGHT# 32 IRRX 19
DOT_DB5 32 DOT_DB7 32
BTN1 BTN3 BTN5
MP3 REV STOPPLAY
12
C18 .01UF_0402
12
LEDVCC
12
+5VALW
12
LEDVCC
C494 .01UF_0402
C487 .01UF_0402
C490 .01UF_0402
12
C28
4.7UF_25V_1206
+5VS
12
C174 .01UF_0402
Q20 NDS352P
S
D
1 3
LID Switch
SW2
LID SW
12 34
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
B
C
LID_SW#31
4 4
A
LEDVCC
S
2
G
2
Q44 NDS351
G
13
D
+5VALW
D24
1 2
BYS10-45
D
D22
1 2
BYS10-45
+12VALW
12
R413 100K_0402
Q45
13
D
+5VALW
2
G
2N7002
S
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1044
Size Document Number Rev
B
401196
*+,
Date: Sheet
,
-.
17, 2002
ACIN 31,42
E
27 44
of
2A
Page 28
A
B
C
D
E
Printer Port/USB
USB_AS
1 2
1 1
2 2
LPD[0..7]19,35
RP3
10P8R_2.7K
RP2
10P8R_2.7K
LPTINIT#19,35
LPTSLCTIN#19,35
+5V_PRN
10
FD7 LPTSLCT
9
FD6
8
FD5
7
FD4
6
+5V_PRN
10
LPTACK#
9
LPTBUSY
8
LPTPE
7 6
3 3
FD0
1
FD1
2
FD2
3
FD3
4
+5V_PRN
SLCTIN# INIT# LPTERR# AFD/3M#
+5V_PRN
4 4
5
1 2 3 4 5
FBM-11-451616-800T
LPD[0..7]
1 2
R14 33_0402
1 2
R5 33_0402
LPD3 LPD2 LPD1 LPD0 LPD7 FD7 LPD6 LPD5 LPD4
100UF_10V_D2
INIT#
SLCTIN#
USB_A
L17
12
+
C209
4.7UF_10V_0805
Parallel Port
LPTSTB#19,35
LPTAFD#19,35
RP1
FD3
89
FD2
7
10 11 12 13 14 15 16
16P8R_68
FD1
6
FD0
5 4
FD6
3
FD5
2
FD4
1
12
C45 .1UF_0402
C65
FBM-11-160808-121
USB0_D-
FBM-11-160808-121
FBM-11-451616-800T
+5VS
12
2 1
+5VS
LPTSTB#
1 2
R4 33_0402
1 2
R7 33_0402
LPTERR#19,35
LPTACK#19,35
LPTBUSY19,35
LPTPE19,35
LPTSLCT19,35
L31
1 2 1 2
L28
USBGND
12
L12
U5
1
GND
2
IN
3
EN1#
4 5
EN2# OC2#
TPS2042
+5V_PRN
D7
w=10mils
RB420D
AFD/3M#
FD0 LPTERR# FD1 INIT# FD2 SLCTIN# FD3
FD4 FD5 FD6 FD7 LPTACK# LPTBUSY LPTPE LPTSLCT
OC1# OUT1 OUT2
12
R13 1K_0402
w=10mils
12
C35 .1UF_0402
8 7 6
JP4 LPTCN-25-SUYIN
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9 22 10 23 11 24 12 25 13
JP6
1 2 3 4
USB CONN.
USB_AS
USB_BS
5 6 7 8
C37
.1UF_0402
USBGND
12
12
R17 10K_0402
4.7UF_10V_0805
L30
FBM-11-160808-121 1 2 1 2
L29
FBM-11-160808-121
12
L13
FBM-11-451616-800T
+3VS
12
R18
10K_0402
C36
1UF_10V
+5V_PRN
C11
AFD/3M# LPTERR# INIT# SLCTIN#
LPTACK# LPTBUSY LPTPE
FD0 FD1 FD2 FD3
FD4LPTSLCT FD5 FD6 FD7
12
12
CP1 1 8 2 7 3 6 4 5
8P4C_220PF
CP6 1 8 2 7 3 6 4 5
8P4C_220PF
CP3 1 8 2 7 3 6 4 5
8P4C_220PF
CP2 1 8 2 7 3 6 4 5
8P4C_220PF
USB1_D­USB1_D+USB0_D+
12
12
C74 1UF_10V
C190 .1UF_0402
12
C42 .1UF_0402
OVCUR#0 19,35
OVCUR#1 19
USB_B
FBM-11-451616-800T
12
+
C210 100UF_10V_D2
USBP2+19 USBP2-19 USBP3+19 USBP3-19
USBP0+19 USBP0-19 USBP1+19 USBP1-19
USB_BS
L32
12
The component'
The component's most place cloely
The component'The component' VT823%.
VT823%.
VT823%.VT823%.
1 8
2 7
3 6
1 8
2 7
3 6
CP11 8P4C_33PF
4 5
CP10 8P4C_33PF
4 5
RP53 1 8 2 7 3 6 4 5
8P4R_33_0804
RP60 1 8 2 7 3 6 4 5
8P4R_33_0804
s most place cloely
s most place cloelys most place cloely
45
45
USB2_D+ USB2_D­USB3_D+ USB3_D-
182736
RP50 8P4R_15K_0804
USB0_D+ USB0_D­USB1_D+ USB1_D-
182736
RP59 8P4R_15K_0804
USB2_D+ 27 USB2_D- 27 USB3_D+ 37 USB3_D- 37
USB0_D+ 35 USB0_D- 35 USB1_D+ 35 USB1_D- 35
USB BUSB A USB Port
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044
B
401196
*+,
-.
,
17, 2002
28 44
E
2A
of
Page 29
A
B
C
D
E
LAN Realtek RTL8100
L15
AD12
NCNCNC
VCTRL
AD12
AD11
AD11
AD10
LANVDD
WAKEUP# 16,18,31
LANVDD
51
VDD25
AUX
EECS
EESK
EEDI
EEDO
AD0 AD1
GND
AD2 AD3
VDD25
VDD
AD4 AD5 AD6
VDD25
VDD
AD7
CBE0B
GND
AD10
AD9
AD8
30
AD8
AD9
U19
50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31
RTL8100
CBE#1 10,16,18,19,36 PAR 10,16,18,19,36 SERR# 10,16,19,36 PERR# 16,18,19,36 STOP# 10,16,18,19,36
EECS EESK EEDI EEDO AD0 AD1 GND AD2 AD3 LANVDD
AD4 AD5 AD6 LANVDD
AD7 GND
C187 .1UF_0402
LANVDD_AVDD
C191 .1UF_0402
C217 .1UF_0402
R23 5.6K_0402
CBE#0 10,16,18,19,36
PIR(29)
LANIO
L9
HB-1M2012-601JT
U3
1
CS
2
SK
3
DI
4
DO
93C46-3GR
VCC
NC NC
GND
C193 27PF_0402
LANVDD
8 7 6 5
Y2 25MHz
CRYSTAL
GND
LANIO
C32 .1UF_0402
CLKOUT
XTALFB
C211 27PF_0402
C186
10UF_10V_1206
C216
10UF_10V_1206
LAN_TX+ LAN_TX­LAN_RX+ LAN_RX-
LANVDD
+
GND GND
+
GND
GND
C188 .1UF_0402
LANIO
C212 .1UF_0402
LAN_TX+ 30 LAN_TX- 30 LAN_RX+ 30 LAN_RX- 30
FBM_L11-201209-601LMT
R159 1K_0402
LAN_LED130
LAN_LED030
PIRQB#19,36
GNT#210
REQ#210
CBE#310,16,18,19,36
R157 100_0402
R507
@0_0402
15K_0402
AD[0..31]
R158
(ISOLATEB)
LANIO
PCLK_LAN
AD31 AD30 GND AD29
AD28 AD27 AD26 AD25 AD24 LANVDD
AD23
DEVSEL#10,16,18,19,36
GND
ISOB
AVDD
ISOLATEB
VDD
VDD25
AD18
LANVDD
GND
AD18
C14
.1UF_0402
R15
1.8K
LAN_TX+
GND
LAN_TX-
LAN_RX+
LAN_RX-
GND
TXD-
TXD+
RXIN-
AVDD
RXIN+
RTSET
AVDD25
AD17
AD16
CBE2B
FRAMEB
IRDYB
TRDYB
DEVSELB
GND
AD16
AD17
GND
RTT2
STOPB
GND
GND
RTT3
PERRB
SERRB
CLKOUT
XTALFB
X1
X2
PAR
CBE1B
C31
.1UF_0402
GND
AVDD
PMEB
AVDD25
VDD
AD15
AD14
AD13
AD14
AD15
GND
AD13
C2
.1UF_0402
LAN_LED0
LAN_LED1
8079787776757473727170696867666564636261605958575655545352
LED0
81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99
100
CBE#210,16,18,19,36
FRAME#10,16,18,19,36
IRDY#10,16,18,19,36
TRDY#10,16,18,19,36
LED1NCLED2
INTAB RSTB CLK GNTB REQB AD31 AD30 GND AD29 VDD AD28 AD27 AD26 AD25 AD24 VDD25 VDD CBE3B IDSEL AD23
AVDD25
AD22
GND
AD21
AD20
AD19
1234567891011121314151617181920212223242526272829
GND
AD19
AD22
AD20
AD21
SUS_STAT#6,20
AD24
PIR(34)
+3VS
PCIRST#9,14,16,18,19,22,23,31,36
PCLK_LAN11
AD[0..31]10,16,18,19,36
1 1
2 2
3 3
+12VALW
12
R16
13
D
S
100K_0402
Q4
2
G
2N7002
D
EN_WOL# 31
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044
B
401196
*+,
-.
,
17, 2002
29 44
E
of
2A
+3VALWLANVDD
S
Q2 NDS351
G
2
D
13
PCLK_LAN
4 4
A
12
R156 10_0402
12
C185 22PF_0402
B
LANIO
R12 0_0805
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
Page 30
A
B
C
D
E
LAN CONN.
C196
R160 50_1%
1 2
C215 .1UF_0402
1 2
1 2
.1UF_0402
1 2
12
R167 50_1%
12
R161 50_1%
LANIO
.1UF_0402
C198
1 2
1 2
1:1
U2
7 10
TD+ TX+
6
CT
5
NC
4
NC
3
CT
2
RD-
1
RD+
H0013
C200 .1UF_0402
RJ45_TXX- 35 RJ45_TXX+ 35 RJ45_RXX- 35 RJ45_RXX+ 35
98
TX-TD-
11
CT
12
NC
13
NC
14
CT
15
RX-
16
RX+
RJ45_TXX­RJ45_TXX+
RJ45_RXX­RJ45_RXX+
12
R162
75_1%
C48
CHASSIS GND
12
R163
75_1%
1000PF_2KV_1206
1 1
LAN_TX-29 LAN_TX+29
LAN_RX-29 LAN_RX+29
R166
50_1%
2 2
ACT_CR
12
C194
1000PF_0402
JOPEN5
C189
1 2
.1UF_0402
R155 330_0402
12
C214
1000PF_0402
R169
330_0402
LAN_LED1 29
12
LANIO
12
LANIO
LAN_LED0 29
GREEN
YELLOW
Title
Size Document Number Rev
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044
B
401196
*+,
-.
,
17, 2002
30 44
E
2A
of
RJ45_TXX+ RJ45_TXX­RJ45_RXX+
RJ45_RXX-
C199
@10PF_0402
3 3
4 4
A
MOD_RING
VH1
DSSA-P3100SB
MOD_TIP
B
12
C201
@10PF_0402
12
12
PIR(2)
220PF_3KV_1808
12
C197
@10PF_0402
12
C195
@10PF_0402
12
C219
MOD_TIP MOD_RING
12
12
C213
JP9
1
TX+
2
TX-
3
RX+
4
N/C1
5
N/C2
6
RX-
7
N/C3
8
N/C4
9
N/C5
10
RING
11
TIP
12
N/C6
RJ-45 & RJ-11
220PF_3KV_1808
JP26
1 2
MODEM CONN.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
GND1
CATHODE1
ANODE1
CATHODE2
ANODE2
GND2
C
13
16
15
17
18
14
2 1
Page 31
A
+3VALW
1 1
+3VALW
+3VALW
LDRQ#21
EC_RST#33
R427 470K_0402
R429 470K_0402
12
12
12
C514
.1UF_0402
R326 @0_0402
PC7
2
12
.1UF_0402
12
13
Q46 2N7002
C517
1000PF_0402
12
C540
For REV:A Only.
INT_KBD CONN.
KSO6 KSO3 KSO12 KSO13
KSO14 KSO11 KSO10 KSO15
PIR(11)
591SCI#
GATEA2019
KBRST#19
JP19
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
INT_KB_CONN.
CP4 1 8 2 7 3 6 4 5
8P4C_100PF
CP5 1 8 2 7 3 6 4 5
8P4C_100PF
D28
RB751V
D25
RB751V
2 4 6
8 10 12 14 16 18 20 22 24
21
21
R425
10K_0402
KSI7
2
KSO9
4
KSI5
6
KSI2
8
KSO5
10
KSI0
12
KSO4
14
KSO8
16
KSO3
18
KSO13
20
KSO11
22
KSO15
24
+3V
R417
10K_0402
1 2
+3V
12
R402
10K_0402
+3VS
R400
10K_0402
D23
1 2
1 2
2 1
RB751V
D21
2 1
RB751V
A
KSI1 KSI6 KSI4 KSO0
2 2
KSI3 KSO1 KSO2 KSO7 KSO6 KSO12 KSO14 KSO10
3 3
THRMOUT#
4 4
KSI1 KSI7 KSI6 KSI5
KSO9 KSO0 KSO1 KSO5
KSI4 KSI2 KSI3 KSI0
KSO2 KSO4 KSO7 KSO8
THRM# 21
SCI# 20
G20
KBRST#_RC
CP13 1 8 2 7 3 6 4 5
8P4C_100PF
CP12 1 8 2 7 3 6 4 5
8P4C_100PF
CP8 1 8 2 7 3 6 4 5
8P4C_100PF
CP7 1 8 2 7 3 6 4 5
8P4C_100PF
12PF_0402
C538
1 2
R465 20M
12
32.768KHZ Y7
10K_0402
DOT_EN_591#
PIR(31,44)
R505
TP2 TP3
TP4 TP5 TP6 TP7 TP8
DJ_ON/OFF#27
12
PM_SLP_S1#7,10,19,20,33
12
B
C564 .1UF_0402
C508
LAD021 LAD121 LAD221 LAD321
+3VALW
1 1
1 1 1 1 1
SWI#20
VR_ON6,34,40
ENVEE10,15 ENBKL15
FSEL#32
12
13
12
10_0402
CRY1 CRY2
12
R506 10K_0402
Q65 2N7002
B
R418
0_0402
R428
12
591SCI#
G20 KBRST#_RC
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7
KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15
ECSMI# LAN_PME#
DOT_EN_591#
SYSON
EQ_ON/OFF#
FSEL#
DOT_EN 27
+3VALW +3VS
12
15PF_0402
SERIRQ16,21
LFRAME#21
PCLK_LPC11
KBD_CLK35
KBD_DATA35
PS2_CLK35
PS2_DATA35
TP_CLK33
TP_DATA33
LID_SW#27
R457 121K_0402 C549
12PF_0402
LAN_PME#36
G_RST#16,17
SUSP#34,35,38,41
VOL_UP#27,32
VOL_DW#27,32
+5VALW+3VALW
2
R423
12
12
C522 .1UF_0402
12
@0_0402
U47
7
SERIRQ
8
LDRQ
9
LFRAME
15
LAD0
14
LAD1
13
LAD2
10
LAD3
18
LCLK
19
LREST
22
SMI
23
PWUREQ
31
IOPD3/ECSCI
5
GA20/IOPB5
6
KBRST/IOPB6
71
KBSIN0
72
KBSIN1
73
KBSIN2
74
KBSIN3
77
KBSIN4
78
KBSIN5
79
KBSIN6
80
KBSIN7
49
KBSOUT0
50
KBSOUT1
51
KBSOUT2
52
KBSOUT3
53
KBSOUT4
56
KBSOUT5
57
KBSOUT6
58
KBSOUT7
59
KBSOUT8
60
KBSOUT9
61
KBSOUT10
64
KBSOUT11
65
KBSOUT12
66
KBSOUT13
67
KBSOUT14
68
KBSOUT15
105
TINT
106
TCK
107
TDO
108
TDI
109
TMS
110
PSCLK1/IOPF0
111
PSDAT1/IOPF1
114
PSCLK2/IOPF2
115
PSDAT2/IOPF3
116
PSCLK3/IOPF4
117
PSDAT3/IOPF5
118
PSCLK4/IOPF6
119
PSDAT4/IOPF7
158
32KX1/32KCLKOUT
160
32KX2
62
IOPJ2/BST0
63
IOPJ3/BST1
69
IOPJ4/BST2
70
IOPJ5/PFS
75
IOPJ6/PLI
76 143
IOPJ7/BRKL_RSTO
148
IOPM0/D8
149
IOPM1/D9
155
IOPM2/D10
156
IOPM3/D11
3
IOPM4/D12
4
IOPM5/D13
27
IOPM6/D14
28
IOPM7/D15
173
SEL0
174
SEL1
47
CLK
PC87591VPC False
EC_AVCC
163445
123
136
VDD
VCC1
VCC2
VCC3
Host interface
Key matrix scan
JTAG debug port
PS2 interface
PORTJ-2
PORTM
PCB FOOTPRINT:PC87570
GND1
GND2
GND3
GND4
GND5
173546
122
159
167
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
157
VCC4
VCC5
PORTD-1
GND6
GND7
137
166
VCC6
AD Input
DA output
PWM or PORTA
PORTE
PORTC
PORTH
AGND
96
C
FBM-L11-160808-601LMP
C568 .1UF_0402
1 2
95
PORTB
IOPE7/CLKRUN/EXWINT46
PORTI
PORTJ-1
PORTD-2
PORTK
PORTL
1 2
FBM-L11-160808-601LMP
161
AVCC
IOPE0AD4 IOPE1/AD5 IOPE2/AD6 IOPE3/AD7
IOPA0/PWM0 IOPA1/PWM1 IOPA2/PWM2 IOPA3/PWM3 IOPA4/PWM4 IOPA5/PWM5 IOPA6/PWM6 IOPA7/PWM7
IOPB0/URXD
IOPB1/UTXD
IOPB2/USCLK
IOPB3/SCL1
IOPB4/SDA1
IOPB7/RING/PFAIL
IOPC1/SCL2 IOPC2/SDA2
IOPC3/TA1
IOPC4/TB1/EXWINT22
IOPC5/TA2
IOPC6/TB2/EXWINT23
IOPC7/CLKOUT
IOPD0/RI1/EXWINT20 IOPD1/RI2/EXWINT21
IOPD2/EXWINT24
IOPE4/SWIN
IOPE5/EXWINT40
IOPE6/LPCPD/EXWIN45
IOPH0/A0/ENV0
IOPH1/A1/ENV1 IOPH2/A2/BADDR0 IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
IOPJ1/WR0
IOPK2/A10 IOPK3/A11
IOPK4/A12 IOPK5/A13/BE0 IOPK6/A14/BE1
IOPK7/A15/CBRD
IOPL0/A16 IOPL1/A17 IOPL2/A18 IOPL3/A19
IOPL4/WR1
NC2
NC3
NC4
NC5
NC6
NC1
122021858691929798
11
L60
C
VBAT
AD0 AD1 AD2 AD3
DP/AD8 DN/AD9
DA0 DA1 DA2 DA3
IOPC0
IOPH6/A6 IOPH7/A7
IOPI0/D0 IOPI1/D1 IOPI2/D2 IOPI3/D3 IOPI4/D4 IOPI5/D5 IOPI6/D6 IOPI7/D7
IOPJ0/RD
SELIO IOPD4
IOPD5 IOPD6 IOPD7
IOPK0/A8 IOPK1/A9
NC7
NC8
NC9
L59
NC10
12
81 82 83 84 87 88 89 90 93 94
99 100 101 102
32 33 36 37 38 39 40 43
153 154 162 163 164 165
168 169 170 171 172 175 176 1
26 29 30
2 44 24 25
124 125 126 127 128 131 132 133
138 139 140 141 144 145 146 147
150 151
152 41
42 54 55
142 135 134 130 129 121 120
113 112 104 103 48
+3VALW
+RTCVCC
C516
1UF_25V_0805
1 2
MSEN#
DOT_RS_591
VTT_ON
EC_SMC1 EC_SMD1 PCIRST#
FANSPEED WAKEUP# THRMOUT# EC_ACT# PC7
LPC_PD#
KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
FRD# FWR#
MINI_PME# KBA8
KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15
KBA16 KBA17 KBA18 KBA19
D
KBA[0..19] ADB[0..7]
KSI[0..7]
VTT_PWRGD# 4,11,42 ABATT_TEMP 41 AVBATT 39 ALI/MH# 39,41
MSEN# 14,35
C565 2200PF_0402
1 2
DAC_BRIG 15 EN_FAN 33 IREF 39
INVT_PWM 15 BEEP# 24 VTT_ON 42 ACOFF 39 PM_BATLOW# 20 EC_ON 33 LID_OUT# 20 PCM_SUSP# 16
KSO16 27 KSO17 27 EN_WOL# 29 EC_SMC1 7,32,41 EC_SMD1 7,32,41 PCIRST# 9,14,16,18,19,22,23,29,36
PBTN_OUT# 20 EC_SMC2 4,23,35 EC_SMD2 4,23,35 FANSPEED 33 WAKEUP# 16,18,29
EC_ACT# 27
ACIN 27,42 RING# 19 PM_SLP_S3# 20
ON/OFF 33 PM_SLP_S5# 20
CLKRUN# 10,16,19,36
FRD# 32 FWR# 32
SELIO# 32 EN_WOLR# 36
NUMLED# 27 CAPSLED# 27 MINI_PME# 36
FSTCHG 39
EQ_ON/OFF#
PIR(33)
EC_SMC1 EC_SMD1 EC_SMC2 EC_SMD2
D
THERMDA_591 4
THERMDC_591 4
+5VALW
KBA[0..19] 32 ADB[0..7] 32
KSI[0..7] 27
BADDR1-0
00 01
(HCFGBAH, HCFGBAL)
10 11
(ENV0) (ENV1) (BADDR0) (BADDR1) (TRIS) (SHBM)
LPC_PD#
KBA0 KBA1 KBA2 KBA3 KBA4 KBA5
4
For REV:A Only.
+5VALW
SYSON
11 10
12
R476 EQ@10K_0402
12
R477 EQN_10K_0402
RP75 1 8 2 7 3 6 4 5
8P4R_4.7K_0804
EC_SMC1
5
EC_SMD1
4
+3VALW +5VALW
12
R503
1.5K_0402
2
PIR(31)
R419 @0_0402
5 2
1
SYSON# 34
12
R437 10K_0402
D37 RB751V
D38 RB751V
D40 @RB751V
E
PC87591
12
R504 100K_0402
1
Q64 FDV301N
3
DOT_RS_591
LPC_PD#
12
SPWROFF# 6,19,20,33
PCIRST#
.1UF_0402
R343
1 2
8.2K_0402 EXTSMI# 20
12
R478 10K_0402
MINI_PME#
LAN_PME#WAKEUP#
CONA#
31 44
E
C521
+3V
12
CONA# 32,35
of
+3VALW
U17
1
Vcc
SMBus1
2
GND
SMBus2
3
NC
@LTC1694-1
I/O Address
Index
2E
R453 @10K_0402 R463 10K_0402 R462 @10K_0402 R461 10K_0402 R460 @10K_0402 R480 10K_0402
+3V
U45
7SH08
74HCT14
+5VALW POWER
7 14
12
R313 10K_0402
+3VALW
Data
2F 4F4E
(HCFGBAH, HCFGBAL)+1
Reserved
+3VALW
12 12 12 12 12 12
+3V
U44
4
5
7SH08
2 1
U35E
10
ECSMI# EXTSMI#
9 8
U48C 74LVC125
+3VALW POWER
+3VALW +3VALW +3VS+3VALW+3VALW
12
R436 10K_0402
LAN_PME# MSEN# FANSPEED
MINI_PME#WAKEUP#
2 1
2 1
2 1
PIR(10,23,43)
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044
B
401196
*+,
-.
,
17, 2002
DOT_RS 27
+3VS
12
R434 10K_0402
12
R63 10K_0402
2A
Page 32
A
B
C
D
E
BIOS & I/O Port
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
AA
C567
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
BB
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
EE
12
Output Port
+5VALW
3
D0
4 5
D1 Q1
7 6
D2 Q2
8 9
D3 Q3
13 12
D4 Q4
14 15
D5 Q5
17 16
D6 Q6
18 19
D7 Q7
11
CLK
1
CLR
+5VALW
3
D0
4 5
D1 Q1
7 6
D2 Q2
8 9
D3 Q3
13 12
D4 Q4
14 15
D5 Q5
17 16
D6 Q6
18 19
D7 Q7
11
CLK
1
CLR
+5VALW
3
D0
4 5
D1 Q1
7 6
D2 Q2
8 9
D3 Q3
13 12
D4 Q4
14 15
D5 Q5
17 16
D6 Q6
18 19
D7 Q7
11
CLK
1
CLR
U39
8
VCC
7
WC
6
SCL
5
SDA
NM24C16-27
20
20
20
VCC
10
VCC
10
VCC
10
GND
Q0
Q0
Q0
GND
GND
GND
A0 A1 A2
U61
U59
U60
2
74HCT273
2
74HCT273
2
74HCT273
1 2 3 4
+3VALW
12
12
R408 100K_0402
R375 100K_0402
GATE_RST 33 BT_RST# 37 BT_DET 37 BT_ON# 27,37 DOT_R/W# 27 EC_MUTE_L# 26 CD_PLAY 23
CD_PLAY_ON# 23
TPAD_LED# 33 BACKLIGHT# 27 DIS_ADJVOL 26 ADJVOL_UP/DW# 26 DOT_DB4 27 DOT_DB5 27 DOT_DB6 27 DOT_DB7 27
PWR1_LED# 27 PWR2_LED# 27 BATT1_LED# 27 BATT2_LED# 27 PLED# 27 MP3_LED# 27 MUTELED 27 CDPLAY_LED# 27
12
12
8 7 6 5 4 3 2 1 32 31 30 29 28 27 26 25
+3VALW
147
U52B
4 5
74LVC32
CONA# EE VOL_UP# VOL_DW#
AA CC BB
TP_ON/OFF#
DOT_PRES# BT_PRE# BT_ON/OFF# DRIVER_ACT#
FWE# KBA17 KBA14 KBA13 KBA8 KBA9 KBA11 FRD# KBA10 FSEL# ADB7 ADB6 ADB5 ADB4 ADB3
ADB[0..7] KBA[0..19]
DOT_PRES# DRIVER_ACT# CONA# BT_PRE#
TP_ON/OFF# BT_ON/OFF#
6
D27
1 2
RB717F
1 8 2 7 3 6 4 5
8P4R_100K_0804
1 8 2 7 3 6 4 5
8P4R_100K_0804
1 8 2 7 3 6 4 5
8P4R_100K_0804
+3VALW
U49 7SH32
4
FRD# 31 FSEL# 31
CC
3
RP76
RP78
RP77
+3VALW
Input Port
+3VALW
2 18
1A1 1Y1
4 16
1A2 1Y2
6 14
1A3 1Y3
8 12
1A4 1Y4
11 9
2A1 2Y1
13 7
2A2 2Y2
15 5
2A3 2Y3
17 3
2A4 2Y4
1
1G
19
2G
DRIVER_ACT#
+3VALW
+3VALW
+3VALW
12
R454 100K_0402
5 1
2 3
20
VCC
U56
GND
10
1 3
D
74LVC244
R442 100K_0402
2
G
Q49 2N7002
S
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
12
FLASH# 20 FWR# 31
+12VS
+3VALW
147
KBA2 SELIO# LARST#
+5VALW
KBA4 SELIO# LARST#
KBA6 SELIO# LARST#
U52A
1 2
74LVC32
1 2
R486 20K_0402
+3VALW
147
U52C
9
10
74LVC32
+3VALW
147
U52D
12 13
74LVC32
EC_SMC17,31,41 EC_SMD17,31,41
3
1UF_25V_0805
8
11
R399
100K_0402
1 2
+3VALW
ADB[0..7]31
KBA[0..19]31
+3VALW
21
21
KBA18 KBA16 KBA15 KBA12 KBA7 KBA6 KBA5 KBA4 KBA3 KBA2 KBA1 KBA0 ADB0 ADB1 ADB2
12
SELIO#31
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
R479 10K_0402
HDDACT_LED#22,27
CDACT_LED#22,27
U54
A18 A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 VSS
39F040_TSOP
DOT_PRES#27
CONA#31,35
BT_PRE#37 TP_ON/OFF#33
BT_ON/OFF#27
BT_WAKE_UP37
KBA1 SELIO#
VOL_UP#27,31
VOL_DW#27,31
C556
4.7UF_10V_0805
C560 .1UF_0402
VCC WE*
A17 A14 A13
A8 A9
A11
OE*
A10
CE* DQ7 DQ6 DQ5 DQ4 DQ3
1 1
MUTE#20
EC_MUTE#27
2 2
3 3
4 4
D31 @RB751V
D32 RB751V
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
SCHEMATIC, M/B LA-1044
Size Document Number Rev
B
401196
*+,
-.
,
Date: Sheet
17, 2002
32 44
E
of
2A
Page 33
A
B
C
D
E
Reset & PS2 & FAN CKT
+3V
R405
12
C361 .1UF_0402
EN_FAN
1 2
R236 13K_1%
1 2
330K_0402
R464
113K_1%
R467
100K_0402
+3VS
12
12
1 1
2 2
3 3
EN_FAN31
4 4
+3VALW +3VALW
12
R406 47K_0402
14
C491 .1UF_0402
C551 .01UF_0402
1 2
+5VS
.1UF_0402 1 2
C346
VCC
4
U27
VEE
LMV321_SOT23-5
1 2
R231 7.32K_1%
3 4
G_VR_POK6
C544 .1UF_0402
1 2
12
5 1
3 2
U42B 74LVC14
14
5 6
U42C 74LVC14
+3VALW POWER+3VALW POWER
PWR ON CKT
R404 47K_0402
C495 .1UF_0402
C548 .1UF_0402
VCC
PFO#
MAX6342
R459
+3VALW
12
U50
R403
1 2
330K_0402
+5V
12
12
5
MR#
3 6
PFI RST#
2
GND
1 2
2.2M_0402
FAN Connector
+12VS
PIR(4)
FANSPEED31
R244
Q28
FMMT619
2
C344
2.2UF_16V_0805
1 2
R227
3.48K_1% 1 2
21
D13 1N4148
Q29
3
2
2SA1036K
1
Second FAN connector
PIR(13,32)
RSMRST#
1 2
.1UF_0402
14
1 2
+3VALW POWER
12
C543 .1UF_0402
+3VS
1
4
0
1 2
1 3
C525
U42A 74LVC14
+3VALW
14
2 3 7
+5VS
D12 1SS355
2 1
RSMRST# 20
1
U48A 74LVC125
+3VALW POWER
JP14
1 2 3
FAN_CON_3P
SPWROFF#
R440 100K_0402
1 2
SPWROFF# 6,19,20,31
+5VS +5VS
JP20
1
D35
3
DAN202U
DTC124EK
+3V
5 2
1
2
Q58
2 3 4 5 6 7 8
U24 @7SH08
1 2
R211 0_0402
+3VALW
1 2
22K
B
22K
ON/OFFBTN#27
EC_ON31
TP_ON/OFF# TPAD_LED#
TP_DATA TP_CLK
12
C171 @22PF_0402
12
C172 @22PF_0402
SPWROFF#
1 2
R205 @0_0402
1 2
R206 @0_0402
SPWROFF# PWROK
+3VALW
12
R491 100K_0402
R487
1 2
0_0402
TP_ON/OFF#32
TPAD_LED#32
TP_DATA31 TP_CLK31
CPUSTP#6,11,20
PM_SLP_S1#7,10,19,20,31
1 2 3 4 5 6 7 8
HEADER 8
12
13
C
R482 100K_0402
ON/OFF
51ON#
E
A1
A1
A2
A2
A3
A3
A4
A4
A5
A5
A6
A6
A7
A7
A8
A8
1 2
4
R210 @0_0402
12
C570 1000PF_0402
TP_ON/OFF# TPAD_LED#
TP_DATA TP_CLK
PWROK
ON/OFF 31 51ON# 27,41
12
2 1
WHEN R=0,Vbe=1.35V WHEN R=33K,Vbe=0.8V
D36 RLZ20A
PWROK 9
M/E OFF Button
+3VALW+3VALW
2 1
1 2
C1 .1UF_0402 U1
5
7SH32
4
EC_RST# 31
GATE_RST32
ME_OFF#35
SW1
RESET BTN
PIR(9)
R1 10K_0402
1 2
12 34
R2 10K_0402
1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044
B
401196
*+,
-.
,
17, 2002
33 44
E
2A
of
Page 34
A
+5VALW
SUSP
SUSP#
1 1
SUSP#31,35,38,41
12
R397 @10K_0402
2
G
12
R392 10K_0402
13
D
S
Q42 2N7002
B
C
D
E
DC/DC Interface & RTC
+12VS +5VS +3VS
12
R386 1K_0402
13
D
Q41 2N7002
SYSON#SYSON#
2
G
S
SUSP
12
R153 1K_0402
13
D
Q22
2
2N7002
G
S
SYSON#31
R151 470_0402
13
D
Q21
2
G
S
SUSP SUSP
2N7002
+3V+5V
12
R85 470_0402
13
D
Q15
2
2N7002
G
S
R83 1K_0402
13
D
Q14
2
2N7002
G
S
SUSP
+2.5VS
12
R84 1K_0402
13
D
Q16
2
2N7002
G
S
+5VALW To +5V Transfer +3VALW To +3V Transfer
U18
8
D1
7
G1
D1
12
2 2
3 3
6
C179
4.7UF_10V_0805
+5VALW +5VS
D2
5
G2
D2
8936
1 2
+12VALW
R483
100K_0402
Q59
13
D
2N7002
SYSON#
2
G
S
+5VALW To +5VS Transfer
U16
S1
D1
G1
D1
S2
D2
G2
D2
8936
C183
4.7UF_10V_0805
C180
.01UF_0402
1 2 3 4
8 7 6 5
12
+12VALW To +12VS Transfer
+12VALW
12
C569
1UF_25V_0805
C573
1 2
@.1UF_25V_0805
R489
1 2
100K_0402
+5V +3V
1
S1
2 3 4
SUSP#
12
C571 @.01UF_0402
12
C182
10UF_10V_0805
12
R154 @330K_0402
+12VALW
Q57
SI3861 4 6 5
12
C184
4.7UF_10V_0805
S
G
1 12
S2
12
12
D
R152 0_0402
R484 @1M_0402
12
2 3
12
12
C579 1UF_25V_0805
C178 .1UF_0402
+12VS
C181 1UF_25V_0805
ON_GATE
12
10UF_10V_0805
C577
+3VALW+5VALW
12
C502
4.7UF_10V_0805
12
10UF_10V_0805
C572
JOPEN7
U40
D1 D1 D2 D2
8936
1
S1
2
G1
3
S2
4
G2
12
C578
10UF_10V_0805
+RTCVCC
1 2
12
C475
.01UF_0402
W=15mils
12
C524 .1UF_0402
12
C474
4.7UF_10V_0805
12
R373 1M_0402
RTC BATT
BATT1
-
ML1220
PIR(21)
1 2
R424 100_0402
12
C472 1UF_25V_0805
12
+
3
BATT1.1
W=15mils
1
2
W=15mils
D29 HSM126S
CHGRTC
8 7 6 5
12
+
C176
4.7UF_25V_1206
+3VALW To +3VS Transfer
+3VALW +3VS
U46 8 7 6 5
8936
12
C532
4.7UF_10V_0805
+2.5VS To +2.5VCLK Transfer
@.1UF_0402
1 2
VR_ON6,31,40
1
S1
D1
2
G1
D1
3
S2
D2
4
G2
D2
C537
@.1UF_0402
+2.5V_CLK
12
R233 330_0402
1
2
3
Q26
2N7002
+2.5VS+2.5VS
C501
1 2
R410
100K_0402
12
Q43 SI3865
S
4 6 5
12
C523 .1UF_0402
+5VS_GATE+5VS_GATE
12
D
R446 1M_0402
S
+VCPU_IO +CPU_CORE
12
R61 330_0402
1
2
3
Q25
2N7002
D
2
G
3
12
+
1 12
R414 0_0402
12
C509 10UF_10V_1206
1 2
R452 100K_0402
13
SUSP
2
G
Q47 2N7002
12
R186 330_0402
1
2
3
Q24
2N7002
+2.5V_CLK
C175
4.7UF_25V_1206
12
C511 10UF_10V_1206
SYSON#
+12VALW
12
C512 10UF_10V_1206
12
C510 10UF_10V_1206
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044
B
401196
*+,
-.
,
17, 2002
34 44
E
2A
of
Page 35
A
B
C
D
E
SPR CONN.
1 1
LPD[0..7]19,28
L11
1 2
VIN
SPR@FBM-L11-322513-151
SPR@1000PF_0402
2 2
3 3
12
C21
DOCK_HP_OUT_PLUG26
LPTSLCTIN#19,28
LPTINIT#19,28 LPTERR#19,28
INTMICOFF#26
LINEOUTR26
LINEOUTL26 DOCK_MIC26 SPDIFO24
RJ45_TXX+30 RJ45_TXX-30
RJ45_RXX+30
RJ45_RXX-30
OVCUR#019,28
CONA#31,32
12
SPR@100PF_0402
LPTAFD#19,28
LPTSTB#19,28
BLUE10,14
GREEN10,14
RED10,14
CRMA14 LUMA14
COMPS14
USB1_D-28 USB1_D+28
VIN_1
C20
LPD4 LPD3
LPD2
LPD0
CONA#
LPD[0..7]
JP25
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
61
63
63
65
65
67
67
69
69
71
71
73
73
75
75
77
77
79
79
81
81
83
83
85
85
87
87
89
89
91
91
93
93
95
95
97
97
99
99
101
102
103
101
102
103
SPR@DOCKING 100
+5VS
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
54
56
56
58
58
60
60
62
62
64
64
66
66
68
68
70
70
72
72
74
74
76
76
78
78
80
80
82
82
84
84
86
86
88
88
90
90
92
92
94
94
96
96
98
98
100
100
104
104
LPD7 LPD6 LPD5LPD1
PS2_CLK PS2_DATA KBD_CLK KBD_DATA
LPTSLCT 19,28 LPTPE 19,28 LPTBUSY 19,28 LPTACK# 19,28
EC_SMD2 4,23,31 EC_SMC2 4,23,31 SUSP# 31,34,38,41
PIR(42)
ME_OFF# 33 DOCK_DDCC 14
DOCK_VSYNC 14 DOCK_HSYNC 14 DOCK_DDCD 14 MSEN# 14,31
DCD1# 19 DSR1# 19 TXD1 19 RXD1 19 DTR1# 19 CTS1# 19 RTS1# 19 RI1# 19 RIA0 19
+5VS
+5VALW
PS2_CLK 31 PS2_DATA 31 KBD_CLK 31 KBD_DATA 31
USB0_D- 28 USB0_D+ 28
PS2_CLK PS2_DATA KBD_DATA KBD_CLK
12
C221
SPR@1000PF_0402
RP4
4 5 3 6 2 7 1 8
8P4R_10K_0804
SPR@.01UF_0402
12
C220
+5VS +5VALW
12
C41 SPR@22UF_16V_1206
12
C218 SPR@.01UF_0402
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044
B
401196
*+,
-.
,
17, 2002
35 44
E
2A
of
Page 36
A
B
C
D
E
Mini-PCI Slot
+5VS_MINIPCI
12
1 1
2 2
3 3
C387 15PF_0402
C379 1000PF_0402
12
12
12
C385 .1UF_0402
+3VS_MINIPCI
IDSEL : AD31
PCLK_MINI
12
R287 10_0402
12
C391 15PF_0402
AC97_SYNC20,24
AC97_SDIN120
AC97_BCLK20,24
MOD_AUDIO_MON24
MD_MIC24
MODEM_RI#19
C384 .1UF_0402
PIRQD#19
12
C380
10UF_10V_1206
PIRQD#
W=40mils
PCLK_MINI11
REQ#110
100_0402
1 2
CBE#310,16,18,19,29
CBE#210,16,18,19,29
IRDY#10,16,18,19,29
CLKRUN#10,16,19,31
SERR#10,16,19,29
PERR#16,18,19,29 CBE#110,16,18,19,29
+5VS_MINIPCI
C594 .1UF_0402
+5VS
12
C386 1000PF_0402
PCLK_MINI REQ#1 AD31
AD29
R316
AD27 AD25 LAN_IDSELAD31
AD23 AD21
AD19 AD17
CLKRUN#
AD14 AD12
AD10 AD8
AD7 AD5 AD3
W=30mils
AD1
R281 22_0402 R280 22_0402
+3.3VAUX
1 2
+5VS_MINIPCI
12 12
PIR(25)
1 2
L47
FBM-11-160808-121
W=30mils W=40mils
12
10UF_10V_1206
TIP RING
12
C389
101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124
127 129
C383 .1UF_0402
AD[0..31]
JP27
1 2
12
KEY KEY
3 4
34
5 6
56
7 8
78
9 10
910
11 12
11 12
13 14
13 14
15 16
15 16
17 18
17 18
19 20
19 20
21 22
21 22
23 24
23 24
25 26
25 26
27 28
27 28
29 30
29 30
31 32
31 32
33 34
33 34
35 36
35 36
37 38
37 38
39 40
39 40
41 42
41 42
43 44
43 44
45 46
45 46
47 48
47 48
49 50
49 50
51 52
51 52
53 54
53 54
55 56
55 56
57 58
57 58
59 60
59 60
61 62
61 62
63 64
63 64
65 66
65 66
67 68
67 68
69 70
69 70
71 72
71 72
73 74
73 74
75 76
75 76
77 78
77 78
79 80
79 80
81 82
81 82
83 84
83 84
85 86
85 86
87 88
87 88
89 90
89 90
91 92
91 92
93 94
93 94
95 96
95 96
97 98
97 98
99 100
99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124
127 129
Mini-PCI SLOT
+3VS_MINIPCI +3.3VAUX
12
12
C388
10UF_10V_1206
.1UF_0402
AD[0..31] 10,16,18,19,29
W=40mils
PCIRST#
R286
1 2
AD30
0_0402
AD28 AD26 AD24 MINI_IDSEL
AD22 AD20
AD18 AD16
AD15 AD13 AD11
AD9
AD6 AD4 AD2 AD0
+3.3VAUX
C390
PIRQB#
GNT#1
+5VS_MINIPCI
+3.3VAUX
PCIRST# 9,14,16,18,19,22,23,29,31
1 2
R301 100_0402
PAR 10,16,18,19,29
FRAME# 10,16,18,19,29 TRDY# 10,16,18,19,29 STOP# 10,16,18,19,29
DEVSEL# 10,16,18,19,29
CBE#0 10,16,18,19,29
AC97_SDOUT 20,24 AC97_RST# 20,24
MD_SPK 24
the channel width 50 mils
12
C377 1000PF_0402
PIRQB# 19,29 GNT#0 10REQ#010
GNT#1 10 MINI_PME# 31
LAN_PME# 31
AD27
IDSEL : AD27
MINI_GNDADIGITAL GND
12
C382 .1UF_0402
+3VS_MINIPCI
W=40mils
12
1 2
FBM-11-160808-121
+3.3VAUX
C381 .1UF_0402
L48
S
Q33 NDS351
G
2
12
C378
10UF_10V_1206
+3VS
+3VALW
+12VALW
D
13
12
13
D
S
R277 100K_0402
Q34
2
G
2N7002
EN_WOLR# 31
20mil
100mil
120mil
100mil
100mil
2MM
PJP2
+2.5VP
+VTTP
+1.5VP
2 1
3MM
PJP3
2 1
3MM
PJP4
2 1
3MM
PJP5
2 1
3MM
PJP6
2 1
2MM
PJP9
2 1
+12VALWP
+5VALWP +5VALW
+3VALWP
+12VALW
+3VALW
+2.5VS
+VCPU_IO
+1.5VS
(0.5A)
(2A)
(3A)
(2A)
(2.5A)
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044
B
401196
*+,
-.
,
17, 2002
36 44
E
2A
of
Page 37
A
B
C
D
E
USB HUB/BT/FPR
1 1
R372 @0_0402
1 2
R355 @0_0402
1 2
R350 FN_0_0402
1 2
R352 FN_0_0402
1 2
+HUBVCC
VERG
R374 F@1.5K_0402
U38
USB3_D+28
USB3_D-28
F6MHZ
R339
1 2
F@10K_0402
2 2
+5VS
+5VS
25 24
11 10 17
15 16
19 18
3 4 5 6 7
DP0 DM0
HUBGL# SP/BP# RESET#
XTAL1 XTAL2
INDV/SDA OPTION/SCL
OC1# OC2# OC3# OC4# OC5#/GOC#
F@HB-1M2012-121JT
C467
1 2
F@.1UF_0402
2
VCC
PSW1#/GL1# PSW2#/GL2# PSW3#/GL3# PSW4#/GL4#
PSW5#/GL5#/GPSW#
GND
31
L54
12
DP1
DM1
DP2
DM2
DP3
DM3
DP4
DM4
DP5
DM5
VREG(3.3)
F@ISP1122BD
+5VS
RP47
F@8P4R_33_0804
CP9 F@8P4C_47PF
18 27 36 45
23 22
27 26
1 32
9 8
21 20
29
VERG
28 30 12 13 14
RP57
1 2 3 4 5
F@10P8R_100K
182736
45
10 9 8 7 6
VERG
45
FP_USB1_D+ FP_USB1_D­BT_USB2_D+ BT_USB2_D-
182736
RP45 F@8P4R_15K_0804
BT_USB2_D+ BT_USB2_D-
Bluetooth Connector
BT_DET32
1 2 1 2
BT_WAKE_UP32
+3VALW
BT_RST#32
12
C100 BT@.1UF_0402
L44 BT@FBM-11-160808-121 L45 BT@FBM-11-160808-121
JP15
12 34 56 78 910
121411 13 15 16 171918
20
BT@AXK5F20535P
BT_ON# 27,32 BT_PRE# 32
+5VALW
Finger Printer Connector
3 3
C169 F@.1UF_0402
L26
1 2
L27
1 2
R329
F@10K_0402
12
C453
F@.1UF_0402
+5VS
FP_USB1_D+ FP_USB1_D-
OSC1
4
OUT
VDD
1
GND
ST
12
F@OSC_6MHZ
R344
F@33_0402
F6MHZ
12
C455 F@22PF_0402
3 2
12
F@FBM-11-160808-121 F@FBM-11-160808-121
+3VS
JP18
1 2 3 4
F@FINGER_4PIN
4 4
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
SCHEMATIC, M/B LA-1044
Size Document Number Rev
B
401196
*+,
-.
,
Date: Sheet
17, 2002
37 44
E
of
2A
Page 38
A
B
C
D
E
5V/3V/12V
PU8
GND
7
PC107
PR125
11.5K_1%
25
TRIP1
REF
8
MAINP
PR154 100K
B1+
STBY2
STBY1
10
9611
0.85VREF
MAINP
PC126
0.1UF_0805_25V
24
VCC
SCP
SCP
PC108
10P
PC112
.047U_16V
SOFT2
PGOD
131215
PC109
0.01UF
PC102
0.1UF_0805_25V
23
LH2
TRIP2
OUT2_U
LL2
OUT2_D
OUTGND2
FB2
INV2
14
PR118 330
PC110 2200P
PR117
11.5K_1%
16
17
18
19
20
PR126
15K_1%
PR121 220
PR123 0
PR124 0PR108 0
+3VALWP
PC114
0.1UF_0805_25V
3VDH
3VDL
PC115
@1000PF
PR120
33.2K_1%
PC113 4700P
RLZ4.3B
PR122 @100K
PZD9
B1+
PC116
4.7UF_1210_25V
876
5
DDD
D
PQ29 SI4800
SSG
S
@4.7UF_1210_25V
134
5
D
21
2
876
DDD
SSG
S
134
2
PQ30 SI4810
+3VALWP
PC120
150UF_D_6.3V_FP
3VSW
47UF_D_6.3V_SP
+
PL13
SPC-100M
PC121
+3.3V : 9.22A ~ 12.13A
PC118 2200P
PC117
12
+3VALWP
2 1
PD29 EP10QY03
+
+5VALWP
876
DDD
SSG
S
134
2
876
DDD
SSG
S
134
2
B1+
5
D
5
D
21
PZD8 RLZ6.2C
2
PQ27 SI4800
PC96
0.1UF_0805_25V
5VDH
5VDL
PC97 @1000PF
PC103 3300P
VL
100K
100K
13
PR107 0
PR110
57.6K_1%
PR111 430
PR112 100K
PQ31
DTC115EUA
VL
4.7UF_1206_16V
VS
4.7UF_1210_25V
PC92
4.7UF_1210_25V
5VSW
@47UF_D_6.3V_SP
+
PC88
PC93
PC89
SUSP#31,34,35,41
PQ28 SI4810
+
PR106
EP10QY03
SNB1
PD26
PC91
0.1UF_0805_25V
PT1
10UH-SDT-1205P
+5VALWP
2 1
150UF_D_6.3V_FP
14
32
B+
1 1
2 2
+12VALWP
PC86
4.7UF_1206_16V
3 3
CPU thermal protection at 85 degree C
PL12
1 2
FBM-L11-322513-201LMAT
JOPEN8
2 1
JOPEN9
2 1
PR103 75_1%
PR104
649_1%
2
PR210 @0
470PF_0805_100V
Vout
PC94
22_1206
1 2
PD24 EC11FS2
PC95
2.2UF_1206_25V
PU7 AMS2906-SOT-89
+5VALWP
ADJ Vin
1 3
+5V : 6.81A ~ 9.03A
DAP202U
PD27
PC99
30
29
28
27
26
PC104 2200P
PR114
11.5K_1%
LH1
OUT1_U
LL1
OUT1_D
OUTGND1
PC100
2.2UF_0805_16V
2
1
22
INV1
FB1
123
PR113 330
PC105 0.01UF
PR115 150K
PC101
3
0.1UF_0805_25V
21
VREF5
REG5V_IN
TPS5120
SOFT1
SKIP/PWM #
CT
5V_STBY
4
5
PC106 47P
0.1UF_16V
0.85VREF
12
PC111
0.01UF
VL
PC73
10K_1%_0805
PR74
16.9K_1%
0.1UF_16V
PC75
0.22UF_0805_16V
12
3 2
PR76
100K_1%
PR77
100K_1%
VL
PR75
47K_1%
84
+
1
-
PU9A LM393M
VL
PQ39 2N7002
47K_1%
13
D
S
PR73
MAINP
2
G
PQ40 2N7002
B
MAINP
VL RTCVREF
PR156
@100K
13
D
2
G
S
VL
PR72
2.15K_1%
4 4
PC74 1000P
PH1
A
PACIN39,42
PR157
100K
13
D
PQ33
PACIN
2N7002
2
G
S
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
PQ38 TP0610T
SCP
VIN
PC136
0.1UF_0805_25V
2
1 3
PR153
330
D
PR152 10K
VL
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044
B
401196
*+,
-.
,
17, 2002
E
38 44
of
2A
Page 39
A
B
Iadp=0~2.60A
C
D
E
Charger
Air-line:50W
36
578
1
241
PC37 2200P
1 2
SPC-220M
2
B++
PQ12 FDS4435
3
ACOFF#
LXCHRG
PL14
PD12
EA60QC04
PQ11 FDS4435
4
1 2 13
100K
PR135
0
100K
8 7
5
PR38
47K
1 2
2
PQ13 DTC115EUA
1 2 3 6
PR39
0.02_2512_1%
1 2
12
Charge voltage : LI-3S : 13.2V LI-4S ( NI ) : 17.4V
VIN
ACOFF 31
PC43
68UF_EC_25V
12
+
PC45
4.7UF_1210_25V
12
PC44
4.7UF_1210_25V
VMB
12
PC134
0.1UF_16V
12
12
PC135
0.01uF
P3
0.02_2512_1%
PR25 100K
1 2
PC31 4700P
1 2
PC32 2200P
PR28 10K
PR24
12
12
1 2
PR26 10K
1 2
PR27 1K
12
PQ8
VIN
1 1
PACIN38,42
2 2
PR20 10K
ACOFF#
PACIN
12
1 2
1 2
PR207 47K
PD33 1SS355
SI4835DY
8 7
5
P2
1 2 36
12
4
12
13
D
2
G
S
IREF31
PQ9
SI4835DY
1 2 3 6
4 PR21 200K
PR22 150K
PQ10 2N7002
10K_1%
1 2
PR31
PR32
1M_1%
8 7
5
12
PR29
12
28K_1%
PC33
0.1UF_16V
12
12
PR30 @24.9K_1%
12
PR33
768K_1%
IREF=1.151*Icharge IREF=0~3.3V Set charge current 2.86A for LI-ION Set charge current 2A for NI-MH (SPEC. ---> 2.5h)
BATT+
12
12
12
12
PR149
324K_0.5%
PR146
300K_0.5%
PR147
100K_0.5%
PR148
36.5K_1%
PQ34 2N7002
PQ14 2N7002
12
PC132
0.01UF
13
D
2
G
S
12
+3VALWP +3VALWP
PR144
10K
12
PD32
RB751V
PU9B
LM393M
84
5
+
7
6
-
3 3
AVBATT31
PC131
2.2UF_0805_16V
12
1 2
10
11
12
PC138
0.1UF_16V
1
2
3
4
5
6
7
8
9
S
B+
PU3 MB3878
-INC2
OUTC2
+INE2
-INE2
FB2
VREF
FB1
-INE1
+INE1
OUTC1
OUTD
-INC1
G
2
13
100K
D
13
100K
+INC2
GND
VCC(o)
OUT
VCC
-INE3
FB3
CTL
+INC1
FBM-L11-453215-900LMAT
1 2
24
23
22
CS
21
20
1 2
19
VH
18
17
1 2
RT
16
1 2
15
14
13
PR43 100K
PQ15 DTC115EUA
2
PL3
PC40
0.1UF_16V
PR35 68K
PR36 330K
1 2
PR40 147K_0.1%
PR41 316K_0.1%
12
PC133 56PF
12
12
12
PR34 0
PC38
2200P
1 2
1 2
PC41
0.1UF_0805_25V
1 2
1 2
PC42 1500P
VL
LI-3S/LI-4S(NI)#
4.7UF_1210_25V
PC39
0.1UF_0805_25V
PC34
PC35
4.7UF_1210_25V
12
12
FSTCHG31
12
PR37 10K
PR42 316K_0.1%
1 2
PC125 22PF
LI-3S/LI-4S(NI)# 31,41
ALI/MH# 31,41
12
PC36
@0.1UF_0805_25V
+INC1
-INC1
12
LI-3S:0.1794*BATT+ = AVBATT LI-4S(NI):0.1381*BATT+ = AVBATT
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044
B
401196
*+,
-.
,
17, 2002
39 44
E
2A
of
Page 40
A
B
C
D
E
F
G
H
CPU_CORE
B+
+CPU_CORE
12 12
VOLTS
OUTPUT
D4=1
D4=0
0.975
1.75
1.70
0.950
1.65
0.925
0.900
1.60
0.875
1.55
1.50
0.850
0.825
0.800 1.40
1.35
0.775
1.30
0.750
0.725 1.25
1.20
0.700
1.15
0.675
0.650
1.10
0.625
1.05
1.00
0.600
COREDH
578
3 6
1 2
PQ41
SI4892DY
PQ43 SI4362DY
241
1 2
PR192
19.6K_1%
COREB+
578
1 2
PR193
16.2K_1%
SI4892DY
3 6
241
578
3 6
241
MODE DEEPER SLEEP BATTEY SLEEP PERFORMANCE SLEEP BATTERY MODE PERFORMANCE MODE
PQ42
PQ44 SI4362DY
PU13
1
NO2
2
NO3
3
NO1
4
INH
5 6
GND ADDB
578
3 6
578
3 6
MAX4524
PC152
4.7UF_1210_25V
241
PQ45 SI4362DY
241
DPRSLPVR 7
ZMODE POS
V+
COM
NO0
ADDA
OFFSET 0mV
-56mV
-51mV
-16mV
FB NEG
10 9 8 7
4.7UF_1210_25V
@ESPI-1206-1R0M
1 2
1 2
0.9UH_25A_LPI
PD35 EC31QS04
2 1
PR191
1 2
61.9K_1%
RBOTTOM
X
16.2K
19.6K
61.9K
PC153
PL17
PL18
PC162
1U_0603_10V
Vout(0A)
0.850
1.083
1.332
1.131
1.400
4.7UF_1210_25V
PC154
4.7UF_1210_25V
1 2
PR188
100
PC161 1000PF
+3VALWP
ADDA X 1 1 0 0
PR181 3mR
PR182 3mR
1 2
13
ADDB X 0 1 0 1
PR189 10K
10K
10K
PC155
4.7UF_1210_25V
12
12
2 1
12
2
PQ47 DTC114EUA
PC156
PD37 EP10QY03
1U_0603_10V
PR186
0
1 2
PR187 1K_1%
2200P
PC157
PC175
PR185 1K_1%
H_DPSLP# 4,20
12
@0.1UF_0805_25V
+CPU_CORECORELX
PU12
1
12
VR_HI/LO# 6,7
D3
0
010
0
0
0
0
0
0
1
1
1
1
1
1
1
1
FBM-L11-322513-201LMAT
PC158
+5VALWP
5
3
+
4
-
2
MAX4322
D2
D1
0
0
0
1
0
1
0
0
1
0
1
1
1 1.45
1
1
0
0
0
0
0
1
0
1
0
1
0
1
1
1
1
1
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
PL15
PR183 510_1%
PR184 604_1%
PR159
100K
1 2
PC142 @4700PF
PR163 0
1 2
PR160
100K
1 2
PR164 0
1 2
1U_0603_10V
2VREF
PC143 @4700PF
PC146 470PF_0603
PC147
PR158
PR168 10K
100K
1 2
PC141 @4700PF
+3VALWP
12
PR170 150K_1%
PR171 180K_1%
+3VALWP
1 1
VGATE 6
2 2
PC176
0.047UF_16V
3 3
4 4
PC140 @4700PF
CPU_VID47 CPU_VID37 CPU_VID27 CPU_VID17 CPU_VID07
PR202 10K
VR_ON6,31,34
1 2
PR161
100K
1 2
PC144 @4700PF
PR165 0
1 2
PR162
100K
1 2
PR166 0
1 2
PR169 51K PC145
4.7UF_0805_10V
2VREF
PR172
249K_1%
PR173
274K_1%
PR167 0
1 2
21 22 23 24 25 14
12
3 2
17
6 20 11 12 15 10
MAX1718
D4 D3
PU10
D2 D1 D0
VCC
VGATE TIME SDN/SKIP
POS
VDD
NEG
CC
ZMODE OVP REF ILIM GND TON
1 2
PR174 0
BST
SUS
COREB+
+5VALWP
1 2
PR176
0.1UF_0805_25V COREDL
PC149
1 2
PR179 @0
0
PC148
PC151 @2200P
PR194
@604K_1%
PR175
20
1 2
27
LX
28
DH
26
1 2
16
DL V+
FB
S1 S0
1 2 1 9 4 13 5 19 18 8 7
PD34
RB751V
PR177 0
PR178 0
PR180
0
1 2
0.1UF_0805_25V
PC150
4.7UF_0805_10V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
E
F
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044
B
401196
*+,
-.
,
17, 2002
G
40 44
of
H
2A
Page 41
A
B
C
D
E
Connector/2.5V/1.5V
PL8
FBM-L11-453215-900LMAT
PC70
PC69
PCN1
1
3
3
1 1
SINGATRON 2DC-S026B301
1
2
2
1 2
JOPEN6
ADPIN
ADPGND
PD17
BYS10-45
12
100P
1000P
1 2
12
12
PC71 100P
1 2
PL9
@FBM-L11-453215-900LMAT
3MM-NEW
PQ21
TP0610T
VIN
21
PD19
RLS4148
13
12
2
PC77
0.1UF_0805_25V
PD18
CHGRTCP
RB751V
2 1
PZD3 RLZ4.3B
1 2
PR79 22K
12
12
PR78 100K
12
PC76
0.22UF_1206_25V
VMB
2 2
51ON#27,33
VIN
1K
+3VALWP
+3VALWP
3
2
@BAS40-04
3
PR81 15K
PD21
VMB
PR83 25.5K_1%
1
PR93 1K
PL10
FBM-L11-453215-900LMAT
1 2
TS
0.01UF
PC80
BATT
PC81
12
PR136
12
10_1206
PZD2 RLZ24B
PR82
LI-3S/LI-4S(NI)#31,39
+3VALWP
3
1
PD20
@BAS40-04
2
12
12
PC72 1000P
ABATT_TEMP31
1000P
PF1
7A SLOW
PR84 1K
BATT+
PCN2
1 2
B/I
3 4
SLD
5
SLC
6 789
BATT CONN.
1
2
PD22
VS
EC_SMD17,31,32
+3VALWP
@BAS40-04
3
PR85 100
1
2
PD23 @BAS40-04
PR86 100
EC_SMC17,31,32
2
2
B
CHGRTCP
PR80
200_0805
PC79
1UF_0805_25V
PR198 10K_1%
PR197
42.2K_1%
PZD4 RLZ16B
2 1
12
PC166
2.2UF_0805_16V
PU6
AMS1503
1
Sense
35
OutputVpower
Adjust
Control
2
4
PC122
0.1UF_0805_25V
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1044
Size Document Number Rev
B
401196
*+,
Date: Sheet
PR151 100K
PQ35
TP0610T
13
1 2
2
PR150 68
PC82
10UF_1210_16V
12
+5VALWP
1 2
+1.5VP+3VALWP
SUSP#31,34,35,38
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
13
100K
2
100K
D
PQ36 DTC115EUA
,
-.
12
17, 2002
+2.5VP+3VALWP
PC84 10UF_1210_16V
41 44
2A
E
of
RTCVREF
RTCVREF
CHGRTC
3 3
1 2
PR94 200
PC78
4.7UF_1206_16V
PU11
1
Vin
3 4
EN PG
3
Vout
AdjGND
3
6 52
PU5
S-81233SGUP
1
1
AME8804AEEY
PC165
4.7UF_0805_10V
4 4
SUSP#31,34,35,38
PR201 0
A
Page 42
A
B
C
D
E
VTT
PQ7 SI3445DV
D
12
PR16 10K
PU2A LM393M
1
S
4 5
G
3
VL
84
+
-
6 2
1
PC128
0.1UF_16V
12
3 2
PC29 4700P
LX125
PD8
12
RB051L-40
12
PQ48 DTC115EUA
+3VALWP
12
1 1
2 2
PC27
10UF_1210_16V
PD7
RB751V
PC28 4700P
PQ5 2SA1036K
1 2
12
3 1
PR15 1K
1 2
2
PQ6
HMBT2222A
2
1 3
5uH-SPC-06704
12
PR195 2M
12
PC163
0.1UF_16V
13
100K
100K
DTC115EUA
PL2
1 2
2
PQ49
1 2
VL
12
PR196 100K
13
100K
PR200 47K
100K
12
PR17
5.62K_1%
12
PR18
11.8K_1%
2
+VTTP
+1.25V +-5%
12
+
0.85VREF
PC30
220UF_D_4V_FP
1 2
PD36 1SS355
VTT_ON 31
PR141
10K_1%
PR143
100K_1%
0.85VREF
PC129
0.22U_0603
12
1 2
PC130 1000P
PR199 10K
-
6
+
5
8 4
PR138
5.6M
VTTP=1.021V------>VTT_PWRGD:"L" VTTP=1.014V------>VTT_PWRGD:"H"
12
PC164 470P
PU2B LM393M
7
PR142
19.6K_1%
+3VS
PR139
10K
VTT_PWRGD# 4,11,31
+VTTP
VIN detector
16.90 17.55 18.22
16.46 17.08 17.72
Detector
PR208
3 3
VIN
12
PR209
82.5K_1%
12
PC179 1000PF
4 4
A
PR205 20K_1%
B
PR206 22K
1 2
12
12
PC178
0.1UF_16V
1M_1%
1 2
VS
12
PC177 PU14A LM393A
3 2
PR204 10K
0.01UF
84
+
1
-
12
RTCVREF
3.3V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
VIN
PR129
ACIN
PR128 10k
12
10K
PACIN
PR127
10k
1 2
PZD5
2 1
RLZ3.6B
C
1 2
PU14B LM393A
7
ACIN 27,31
PACIN 38,39
5
+
6
-
Title
Size Document Number Rev
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044
B
401196
*+,
-.
,
17, 2002
42 44
E
2A
of
Page 43
A
B
C
D
E
For C1-test
1.Solving can't boot-up issue.
Voltage Rails
1 1
2 2
Power Plane Description
VIN B+ +CPU_CORE +CPU_IO +1.5VS 1.5V switched power rail ON
+3VALW +3V +3VS +5VALW +5V +5VS +12VALW +12VS RTCVCC
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Adapter power supply (19V) AC or battery power rail for power circuit Core voltage for CPU
1.25V switched power rail for CPU AGTL Bus
3.3V always on power rail
3.3V power rail
3.3V switched power rail 5V always on power rail 5V power rail OFFON
12V always on power rail 12V switched power rail RTC power
S1 S3 S5
N/A N/A N/A
ON OFF ON OFF
ON+2.5VS 2.5V switched power rail for TwisterT(VT8606) core power. OFF ON ON ON ON ON ON ON ON ON
N/AN/AN/A OFF
OFF OFF OFF OFF
ON*
ON ON
OFF OFF
OFF
ON*
ON
OFF5V switched power rail
OFF
ON*
ON OFF
OFF
ON
ON
External PCI Devices
Device IDSEL# REQ#/GNT# Interrupts
Mini-PCI Mini-PCI(LAN) LAN(RTL8100) CardBus(CB1410) IEEE-1394 Controller
3 3
EC SM Bus1 address
Device
CPU voltage Mux Smart Battery EEPROM
P.S:Default Resistor & Capacitor's package are 0603.
Default 8P4R package is 0402.
4 4
A
AD27 AD31 1 PIRQD#
AD24
AD15 AD25 4
0
2 3
EC SM Bus2 address
Device
0110 1110 b 0001 011X b 1010 000X b
MAX1617MEE OZ163 Docking
PIRQB#
PIRQB# PIRQA# PIRQC#
1001 110X b 0011 0100 b 0011 011X b
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Pull-high(R492;200 ohm) ITP_PREQ# to +VCPU_IO.
2.For solving high voltage test fail issue.
Change C219,C213 from 1000P_2KV_1206 to 220P_3KV_1808.
3.To avoid the chipse t e n ter a n u np r ed ic tab le s tate.(VIA's recommend by AN198)
Add two 1K ohm pull-high resistor at R217,R222.
4.Change Q28 from 2S C2411E K(P =0.2W) to FM MT619(P=0.625W) for increasing system reliability.
5.For solving Microphone noise issue.
Change C372 from 0.1uF to 0.01uF.
6.For solving 1.06GHz QS CPU speed detect incorrect issue.
Add Q60 2N7002 Add Q61 DTC124EK Add R494 100K_0402
7.Exchange Q11.1 and Q 11. 3 fo r s olv ing e xte r na l MIC. can't be disable on docking side.
8.Cahnge R 3 5 , R 37 from TV@4.7K _0402 to 4.7K _0402 for so lving B3C082.
9.For solving ESD fail issue.
Exchange SW1.1,SW1.3 with SW1.2,SW1.4
10.For solving EC can't resume from idle mode issue.
Add D37 and D38.(RB751V)
11.For EMI requirement.
Add CP4,CP5 8P4C_100PF.
12.For solving audio sound can't be muted issue.
Del Q48,Q50,Q51,Q52,Q53,Q54,Q55,R455. Add U62(74HCT4066),C583(0.1UF).
13.Reserve for second FAN.
Add JP29,C584(0.1UF),D39(1N4148),Q62(NDS351),R495(0_0402).
14.For solving SDRAM clock timing can't meet PC133 specification issue.
Del R234,R121,R325,R104,R68,R80 Del C345,C166,C427,C150,C105,C129
15.For solving the record sound is much weaker issue.
Add U63(TDA1308) Add R496(100_0402) Add R497(10K_0603_1%) Add R498(22K_0603_1%) Add C588(0.1UF_0402) Add C590(0.22UF_0603) Add C591(15PF_NPO_0603) Add C586(1UF_0603) Add C587(0.1UF_0402) Add C589(1UF_0603)
C
Title
Size Document Number Rev
Custom
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044 401196
*+
,-.
, 17, 2002
43
E
of
2A
44
Page 44
A
16.For solving Celeron-T CPU can't power on issue.(Celeron-T SKU only)
Add Q63(FDV301N) Add R499(1.5K_0402)
17.VIA recommend.It can increasing +VCPU_IO power plan noise immunity.
Add C592(1000PF_0402) Add C593(.1UF_0402)
1 1
18.To change CardBu s po w e r s w itc her from CP2211(ENE) to TPS2211(TI).
19.To change 133MHz from +-0.25% center s pre ad to -0. 5% do wn s pread.
Del R196(137_1%_0402) Change R194 from 26.7_1%_0402 to 0_0402.
20.To change clock generator fro m IC S950602 to C Y28317 fo r s olv ing s ystem up issue.
21.Change RTC battery from VL1220(Panaso nic) to ML1220(Maxell) fo r purchase policy.
22.Intel recommend that change +VS_CMOSREF voltage divider from 1K/2K to 510/1K.
Change R230 from 1K ohm to 510 ohm. Change R235 from 2K ohm to 1K ohm.
2 2
23.EC team change their SPEC. for support dock-on to wake up EC(591).
Add D40.
24.Add a pull high resistor(R500,47K ohm) for solving cardbus card can't be detected.
25.For solving audio noise from PHONE channel.
Add C594,0.1UF_0402.
B
C
D
E
32.Delete second FAN ci rc u it u nnec e s sa r ily in a ll of SKU.(2001/10/11)
Del JP29,C584,Q62,D39,R495.
33.For solving wake up from Ring failure issue.(To divide On-board LAN and MINI-PCI car d ' s A U X . po w e r p la n for saving power consumption.(2001/10/11)
34.Reserve R507(@0_0402) for BIOS team request.(2001/10/17)
35.SDRAM skew didn't met specification.(2001/10/17)
Add R234(10_0402),C345(15PF_0402).
36.For solving IDE bus reset incorrect issue.(2001/10/18)
Add U64,U65(7SH08FU). Add C595,C596(.1UF_0402).
37.For solving Celer o n-T 933M Hz CP U r eboot fail issue.(2001/10/24)
Add R250(10_0402),R232(0_0402) Add C598(1UF_0603) for Celeron-T SKU only. Del R249,R314 Change R208 from 56.2_1%_0402 to 1K_0402.
38.To correct pull-up resistor error.(2001/10/24)
Del R290(1K_0402) Add R508(4.7K_0402),R391(4.7K_0402)
39.For solving internal microphone echo issue.(2001/10/24)
Change R498 from 22K_1% to 12K_1%.
40.For solving PCIRST# from VT8231 has glitch issue.It causes system cold boot from LAN failure.(2001/10/24)
Add U66(7SH08FU) Del R298.
41.Change JP22.1 & JP 22.2 ' s p ow e r p lan fr o m +3VS to +5VS for increasing IR transmission distance.
26.For EMI team requirement.
1.Change R256,R252,R240,R239 from 0_0402 to 22_0402.
2.Change R246,R238,R247 from 0_0402 to 10_0402.
3.Change R257,R245,R251,R253 from 0_0402 to 33_0402.
4.Change RP9~RP13,RP17~RP20,RP24~RP26,RP32~RP34,RP36.
27.For solving c-test unit can't power-on issue.(2001/9/20)
Change net "EC_MUTE#" to "EC_MUTE_L". Change R481 from 10M ohm to 0_0603.
3 3
28.For Intel PMU SPEC. and SKU change.(2001/9/25)
1.)For all SKU. Del R79(1.2K_0402) Del C116(1UF_10V) Del U11(7SH32)
2.)For Tualatin SKU only. Stuff R78,C118,U9,R493,U10,R349
3.)For Celeron-T SKU only. Stuff R501
For MP(REV1.0)
42.For solving system auto re-start while system hot dock to SPR.
Disconnection JP25.38 and JP25.42
43.EC team request.
Delete D40.
For MP(REV2.0)
44.For solving CD-Play board abnormal issue.
Change R505 from 1.5K_0402 to 10K_0402. Change R506 from 1K_0402 to 10K_0402. Change Q65 from FDV301N to 2N7002.
29.Increasing LANVDD power plan noise immunity.(2001/9/25)
Add C187,C191,C217(.1UF_0402)
For C2-test
30.BIOS can't supp or t C4 an d d e e pp e r s le e p m o d e , so d e lete unnecessary components for all of the Tualatin CPU SKU.(2001/10/11)
4 4
Del U9,U10,R493,U12,C117,R74,R76,R72,RP21,R78,C118. Add R501(0_0402),R502(0_0402),RP79(8P4R_0).
31.Build two sets level s hifte r fo r so lv ing CD -play e r bo ar d u ns ta ble issue.(2001/10/11)
Add Q64,Q65(FDV301N). Add R503,R505(1.5K_0402). Add R504(100K_0402). Add R506(1K_0402).
A
B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Title
Size Document Number Rev
Custom
C
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1044 401196
*+
,-.
, 17, 2002
44
E
2A
44
of
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