Page 1
A
B
COMPAL CONFIDENTIAL
C
D
E
1 1
PCB NO :
BOM P/N :
LA-3801P ( DA800009P1L)
43152331L01
MODEL NAME :
JBL00
M09 Roush UMA
2 2
uFCPGA Mobile Penryn
Intel Cantiga GM + ICH9M
2008-06-12
REV : 1.0(A00)
@ : Nopop Component
3 3
1@ : Use PCMCIA card only
2@ : Use Express card only
3@ : Use ATG only
4@ : Use China TPM only
5@ : Use BROADCOM TPM only
6@ : All TPM Disabled for CCC - Depop D70, Pop R483
4 4
MB PCB
Part Number Description
DA800009P0L
A
PCB 03I LA-3801P REV0 M/B UMA
B
7@ : Non- ATG only
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
C
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
D
Date: Sheet
Compal Electronics, Inc.
Cover Sheet
LA-3801P
166Thursday, June 12, 2008
E
0.8
of
Page 2
A
B
C
D
E
Block Diagram
Compal confidential
Model : JBL00
FAN
CRT CONN
+5V_RUN
+FAN1_VOUT
1 1
RGB
DP CONN
+5V_RUN
2 2
DOCKING
page 18 page6page 7
page 20
RGB
SVID
page 21
DPB
DPB
LVDS CONN
+PWR_SRC
+5V_ALW
+3.3V_RUN
page 19
PORT
page 35
DAI
USB[8,9]
SATA5
DOCK LPC BUS
+3.3V_RUN/ +1.5V_RUN 100MHz
PCIE3 PCIE2 PCIE1
Mini Card3
WPAN/BT/Robson
+3.3V_RUN
+1.5V_RUN
3 3
page 34
SD/MMC
CONN
+3.3V_RUN
page 31
PCI Express BUS
Mini Card2
WLAN
+3.3V_WLAN
+1.5V_RUN +1.5V_RUN
page 34 page 34
USB[4] USB[5]USB[6]
Smart Card
page 36
RFID
page 36
Trough Cable
Biometric
1.8V/1.25V/0.9V
4 4
page 52
VCORE (IMVP-6)
page 47
CHARGER
page 48 page 43
1.5V/1.05V
A
+3.3V_RUN
BATT IN3V/5V
DC IN DC/DC Interface
page 45
Thermal
GUARDIAN III
EMC4002
+3.3V_SUS
Vedio Switch
TS3DV520ERHUR
+3.3V_RUN
DP Switch
TS2DP512
+5V_RUN_DP
PCI BUS
IDSEL:AD17
(PIRQD#,GNT#1,REQ#1)
CardBus
R5C847
+3.3V_RUN
Mini Card 1
+3.3V_RUN
+5V_RUN
+3.3V_RUN
page 33
page 31,32
USB[7]
WWAN
73S8009CN
page 36
USBH
page 43page 44
page 18
page 20
page 21
+3VRUN 33MHz
Trough Cable
USH
+3.3V_RUN
+2.5V_RUN
+1.2V_RUN
Touch Pad
page 39
Power Sequence
Power On/Off
SW & LED
B
RGB
SVID
DPB
DPC
LVDS
IEEE1394
page 42
Option
TPM1.2
For China
TPM1.2
SSX35BCB
BCM5880
page 36
USB[10]
SMBUS
Stick
page 41
page 42
Pentium-M
+1.5V_RUN
+1.05V_VCCP
+VCC_CORE
H_A#(3..35) H_D#(0..63)
Penryn -4MB (Socket P)
uFCPGA CPU
478pin
System Bus
FSB 800/1066 MHz
INTEL
+3.3V_RUN
+1.8V_MEM
+1.5V_RUN
+VCC_GFXCORE
+1.05V_M
+1.05V_VCCP
Cantiga
1329pin BGA
page 10,11,12,13,14,15
DMI
+1.5V_RUN
100MHz
+RTC_CELL
+3.3V_ALW_ICH
+3.3V_RUN
+1.5V_RUN
+1.05V_VCCP
LPC BUS
+3V_RUN
33MHz
INTEL
ICH9-M
676pin BGA
page 22,23,24,25
SPI
W25X32VSSIG
+3.3V_M
32M 4K sector
SMSC KBC
MEC5035
+RTC_CELL
+3.3V_ALW
page 38
DOCK LPC BUS
BC BUS
ECE1077
+3.3V_ALW
page 39
Int.KBD &
page 39
Stick
page 40
C
page 7,8,9
page 24
BC BUS
CPU ITP Port
+1.05V_VCCP
Memory BUS
(DDR2)
48MHz USB0 : Right side pair top
GLCI/LCI
Azalia I/F
S-ATA 0/1/4/5
E-Module
+5V_MOD
+1.8V_MEM 533 / 667MHz
USB[11]
SATA4
USB[2,3] L SIDE
USB[0,1] R SIDE
SATA1 SATA0
S-HDD
+5V_HDD
+3.3V_RUN
page 26
page 26
Camera
+5V_RUN
E-SATA
USB Ports X2
+5V_ALW
USB Ports X2
+5V_ALW
+3V_RUN/ +1.5V_RUN 100MHz
Azalia Codec
92HD71B
+3.3V_RUN
+VDDA
SMSC SIO
ECE5028
+3.3V_ALW
page 37
MDC
+3V_SUS
page 26
On IO/B
RJ11
Trough Cable
D
Clock Generator
CK505
SLG8LP554
+3.3V_M
DDRII-DIMM X2
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7 ,8
+1.8V_MEM
+0.9V_DDR_VTT
page 19
page 33
page 26
page 16,17
Trough LVDS Cable
USB2 : Left side pair top
USB3 Rear Right pair bottom
USB1 : Right side pair bottom
On IO/B
Intel Boaz
82567LM
+3.3V_ALW
+1.8V_LAN_M
page 27
AMP & INT.
Speaker
+5V_RUN
page 28
HeadPhone &
MIC Jack
+3.3V_RUN
page 26
+1V_LAN_M
page 29
LAN SWITCH
PI3L500-AZFEX
+3.3V_ALW
RJ45
page 26
SNIFFER
DAI
SSM2602
+3.3V_RUN
page 27
DOCK
Dig. MIC
page 19
Trough LVDS Cable
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Block Diagram
LA-3801P
266Thursday, June 12, 2008
E
pg 30
On IO/B
0.8
of
Page 3
5
4
3
2
1
POWER STATES
State
D D
S0 (Full ON) / M0
S3 (Suspend to RAM) / M1
S4 (Suspend to DISK) / M1 ON ON ON ONOFF
S5 (SOFT OFF) / M1 ON ON ON ONOFFLOW HIGH LOW HIGHLOW
S3 (Suspend to RAM) / M-OFF
S4 (Suspend to DISK) / M-OFF
S5 (SOFT OFF) / M-OFF
Signal
SLP
SLP
S3#
S4#
HIGH HIGH HIGH
HIGH
LOW HIGH HIGH HIGH ON ON ON ONOFF
LOW HIGH HIGH HIGHLOW
LOW HIGH HIGH HIGH LOW ON ONOFF OFF OFF
LOW LOW LOW LOW ON OFF OFF OFF OFF
LOW LOW LOW LOW LOW ON OFF OFF OFF OFF
SLP
S5#
HIGH
S4
STATE#
SLP
M#
HIGH
HIGH
ALWAYS
PLANE
ON
M
PLANE
ON
SUS
RUN
PLANE
PLANE
ON ON ON
CLOCKS
ICH9-M
USB PORT#
0
1
2
3
4
5
6
7
DESTINATION
JUSB1 (Ext Right Side Top)
JUSB1 (Ext Right Side Bottom)
JESA1 (Ext Left Side Top)
JESA1 (Ext Left Side Bottom)
WLAN
WWAN
WPAN
Card Bus/Express card
DOCKING8
C C
PM TABLE
State
power
plane
+15V_ALW
+5V_ALW
+3.3V_ALW_ICH
+3.3V_RTC_LDO
+3.3V_SUS
+1.8V_MEM
+5V_RUN
+3.3V_RUN
+1.8V_RUN
+1.5V_RUN
+0.9V_DDR_VTT
+VCC_GFXCORE
+VCC_CORE
+1.05V_VCCP
+3.3V_M +3.3V_M
+1.05V_M +1.05V_M
(M-OFF)
PCI EXPRESS
Lane 1
ON
ON
ON
ON
OFF
OFF
OFFOFF
Lane 2
Lane 3
Lane 4
Lane 5
S0
S3
B B
S5 S4/AC
S5 S4/AC don't exist
ON
ON
ON ON
ON
OFF
OFFOFF
OFFON
OFF
OFF
9
11
DESTINATION
MINI CARD-1 WWAN
MINI CARD-2 WLAN
MINI CARD-3 BT/UWB
EXPRESS CARD
None
DOCKING
USH->BIO10
Camera
Lane 6
10/100/1G LAN
PCI TABLE
REQ#/GNT#
R5C847 REQ#1 / GNT#1AD17
A A
PIRQPCI DEVICE IDSEL
PIRQ[B..D]
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Index and Config.
LA-3801P
366Thursday, June 12, 2008
1
0.8
of
Page 4
5
4
3
2
1
RUN_ON
FDS4435
Q16
+INV_PWR_SRC
ADAPTER
D D
GFX_CORE_ON
ADP3209
(PU15)
+VGFX_COREP
+PWR_SRC
BATTERY
CHARGER
C C
ALW_ON
3.3V_SUS_ON
ISL6236
(PU2)
STS11NF30L
(Q60)
ISL6260
(PU7)
IMVP_VR_ON
+VCC_CORE
ISL88550
(PU16)
DDR_ON
0.9V_DDR_VTT_ON
+1.8V_MEM +0.9V_DDR_VTT
ISL6236
(PU3)
M_ON
1.5V_RUN_ON
+1.05V_M +1.5V_RUN
ISL6236
(PU2)
ALWON
ALWON
+5V_ALW
+3.3V_ALW
ENAB_3VLAN
STS11NF30L
RUN_ON
3.3V_RUN_ON
(Q44)
+15V_ALW
+5V_RUNSTS11NF30L
(Q55)
SI4336DY
(Q61)
+5V_ALW
B B
+3.3V_SUS
+3.3V_LAN
+3.3V_RUN
EMC4002
LDO Out
HDDC_EN
MODC_EN
RUN_ON
REGCTL_PNP1
REGCTL_PNP18
(U3)
BCP69 BCP69
SI3456BDVSI3456BDV
(Q29)(Q32)
MAX9789A
(U22)
(Q46)
(Q45)
+1.8V_RUN
A A
+5V_HDD
+5V_MOD
+VDDA
+1V_LAN_M +1.8V_LAN_M
DELL CONFIDENTIAL/PROPRIETARY
On IO/B
5
4
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Power Rail
LA-3801P
466Thursday, June 12, 2008
1
0.8
of
Page 5
5
G16
ICH_SMBCLK
ICH_SMBDATA
A13
ICH9-M
D D
C17
B18
AMT_SMBCLK
AMT_SMBDAT
2.2K
2.2K
10K
10K
4
+3.3V_ALW
+3.3V_ALW_ICH
2N7002
2N7002
MEM_SCLK
MEM_SDATA
3
2.2K
2.2K
+3.3V_M
197
195
DIMMA
197
195
DIMMB
SMBUS Address [TBD]
SMBUS Address [TBD]
2
1
2.2K
9493
2A 2A
C C
6
5
8
7
DOCK_SMB_CLK
DOCK_SMB_DAT
LCD_SMBCLK
LCD_SMDATA
1A
1A
1B
1B
2.2K
2.2K
2.2K
+3.3V_ALW
+3.3V_ALW
6
5
6
5
DOCKING
INVERTER
(JLVDS)
SMBUS Address [TBD]
SMBUS Address [TBD]
2.2K
PBAT_SMBCLK
112
10
9
100
99
98
97
PBAT_SMBDAT
CARD_SMBCLK
CARD_SMBDAT
KBC
B B
1C1C111
1D
1D
1E
1E
1F
1F
2.2K
2.2K
2.2K
MEC 5035
96
1G
95
1H
2.2K
12
13
CKG_SMBDAT
CKG_SMBCLK
1H
1H
2.2K
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
100 ohm
100 ohm
3
BATTERY
4
CONN
2N7002
2N7002
SMBUS Address [TBD]
2.2K
2.2K
CLK_SDATA
CLK_SCLK
+3.3V_M
17
16
CLK GEN
2N7002
2N7002
2N7002
2N7002
2N7002
2N7002
32
WWAN
SMBUS Address [TBD]
2.2K
2.2K
EXP_SMBCLK
EXP_SMBDATA
2.2K
2.2K
WLAN_SMBCLK
WLAN_SMBDATA
2.2K
2.2K
MINI_SMBCLK
MINI_SMBDATA
30
SMBUS Address [TBD]
+3.3V_SUS
7
8
Express card
+3.3V_WLAN
30
32
WLAN
+3.3V_RUN
30
32
BT/UWB
SMBUS Address [TBD]
SMBUS Address [TBD]
SMBUS Address [TBD]
A A
5
106
1J
105
1J
1K
1K
Dedicated JTAG
103
102
Dedicated JTAG
9
Charger
10
SMBUS Address [TBD]
2N7002
2N7002
DAI
SMBUS Address [TBD]
4
3
USH
SMBUS Address [TBD]
2.2K
2.2K
+3.3V_RUN
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
SMBUS TOPOLOGY
LA-3801P
566Thursday, June 12, 2008
1
0.8
of
Page 6
5
+3.3V_M
1 2
R3
@
0_0402_5%~D
CKG_SMBDAT<27,38,48>
D D
CKG_SMBCLK<27,38,48>
FSC FSB FSA CPU
CLKSEL2 CLKSEL0CLKSEL1
000
*
00
1
0
11
C C
0
1
1
0
11
+3.3V_M
12
R51
@
10K_0402_5%~D
FSA
12
R55
@
10K_0402_5%~D
B B
+3.3V_RUN
10K_0402_5%~D
R43
1 2
PCI_DOCKING
+3.3V_RUN
10K_0402_5%~D
R46
1 2
+3.3V_RUN
10K_0402_5%~D
@
R50
1 2
A A
PCI_SIO
10K_0402_5%~D
12
R54
PCI_ICH
*
*
*
6 1
Q1A
2N7002DW-7-F_SOT363-6~D
+3.3V_M
1
0
00
1
0
TME
ITP_EN
2
5
Q1B
2N7002DW-7-F_SOT363-6~D
3
4
1 2
R9
@
0_0402_5%~D
SRC
MHz
MHz
100
266
100
133
100
200
100
166
100
333
100
100
100
400
PIN 32
0
overclocking enabled
1
overclocling disabled
PIN 37
0
Pin 5/6 as SRC_10
PCI
MHz
33.3
33.3
33.3
33.3
33.3
33.3
33.3
1 Pin 5/6 as CPU_ITP
FCTSEL1 PIN43 PIN44 PIN47 PIN48
0=UMA
1=DIS
DOT96T DOT96C 96/100M_T 96/100M_C
27M_out 27M SSout SRCT0 SRCC0
2.2K_0402_5%~D
12
R1
Place crystal within
500 mils of CK505
12
2.2K_0402_5%~D
R2
CLK_SDATA
CLK_SCLK
CLK_ICH_48M<24>
CPU_MCH_BSEL0<8,10>
CPU_MCH_BSEL1<8,10>
CPU_MCH_BSEL2<8,10>
CLK_PCI_5028<37>
CLK_PCI_TPM_CHA<29>
CLK_PCI_DOCK<35>
CLK_PCI_5035<38>
CLK_ICH_14M<24>
CLK_SIO_14M<37>
MCH_DREFCLK<10>
MCH_DREFCLK#<10>
CLK_PCI_ICH<22>
CLK_PCI_PCM<31>
CLK_PCI_TPM<36>
CLK_PWRGD<24>
0=UMA
1=Disc. GRFX down
5
4
1 2
0.1U_0402_16V4Z~D
L1
1
2
4.7U_0603_6.3V4Z~D
0.047U_0402_16V4Z~D
1
1
@
C11
C12
2
2
X1
14.31818MHz_20P_1BX14318CC1A~D
12
C16
33P_0402_50V8J~D
C17
33P_0402_50V8J~D
12
CLK_ICH_48M FSA
CPU_MCH_BSEL0
CPU_MCH_BSEL1
CPU_MCH_BSEL2
CLK_PCI_PCM
CLK_PCI_TPM_CHA
CLK_PCI_5035 PCI_EC
CLK_ICH_14M
CLK_SIO_14M
MCH_DREFCLK
MCH_DREFCLK#
CLK_PWRGD
4
BK2125HS601-T 0805~D
C1
+CK_VDD_MAIN2
1 2
L2
@
BLM21PG600SN1D_0805~D
+CK_VDD_REF+CK_VDD_48
0.047U_0402_16V7K~D
1
C13
2
12
R17 0_0402_5%~D
1 2
5.2
R19 33_0402_5%~D
R22 2.2K_0402_5%~D
R1044 0_0402_5%~D
R24 10K_0402_5%~D
R26 33_0402_5%~D
R30 22_0402_5%~D
R29 22_0402_5%~D5@
R854 22_0402_5%~D4@
R27 33_0402_5%~D
R32 33_0402_5%~D
R33 22_0402_5%~D
R35 22_0402_5%~D
R37 33_0402_5%~D
R38 33_0402_5%~D
R41 33_0402_5%~D
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
12
12
12
12
12
12
12
1 2
R12 0_0603_5%~D
1 2
R14 0_0603_5%~D
+CK_VDD_MAIN+3.3V_M
0_0805_5%~D
1 2
3
+CK_VDD_MAIN
1
R851
2
1
2
+CK_VDD_REF
+CK_VDD_48
CLK_XTAL_IN
CLK_XTAL_OUT
FSB
FSC
PCI_SIOCLK_PCI_5028
PCI_TPMCLK_PCI_TPM
PCI_DOCKINGCLK_PCI_DOCK
CLKREF
DOT96
DOT96#
PCI_ICHCLK_PCI_ICH
CLK_SCLK
CLK_SDATA
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
0.1U_0402_16V4Z~D
10U_0805_10V4Z~D
1
C3
C2
2
0.1U_0402_16V4Z~D
10U_0805_10V4Z~D
1
@
C9
C8
2
1 2
R10 2.2_0603_5%~D
U1
1
VDD_SRC
49
VDD_SRC
54
VDD_SRC
65
VDD_SRC
30
VDD_PCI
36
VDD_PCI
12
VDD_CPU
18
VDD_REF
40
VDD_48
20
XTAL_IN
19
XTAL_OUT
41
USB_48MHz/FSLA
45
FSL_B/TEST_MODE
23
REF_0/FSL_C/TEST_SEL
34
PCICLK4/FCT_SEL
33
PCICLK3
32
PCICLK2/TME
27
PCICLK1
22
REF_1
43
DOT_96/27M
44
DOT_96#/27M_SS
37
PCICLK_F0/ITP_EN
39
CKPWRGD/PD#
9
NC
16
SMBCLK
17
SMBDAT
4
VSS_SRC
15
VSS_CPU
21
VSS_REF
31
VSS_PCI
35
VSS_PCI
42
VSS_48
68
VSS_SRC
73
THRM_PAD
SLG8LP554VTR_QFN72_10X10~D
1
2
1
2
SLG8LP554VTR
0.1U_0402_16V4Z~D
C4
0.1U_0402_16V4Z~D
C10
0.1U_0402_16V4Z~D
1
C5
2
+CK_VDD_A
PCI_STP#
CPU_STP#
CPU_ITP/SRC_10
CPU_ITP#/SRC_10#
CLKREQ_9#
CLKREQ_8#
CLKREQ_7#
CLKREQ_6#
CLKREQ_5#
CLKREQ_4#
CLKREQ_3#
CLKREQ_2#
SRC_1/SATA
SRC_1#/SATA#
CLKREQ_1#
LCD_CLK/SRC_0
LCD_CLK#/SRC_0#
1
2
VDD_A
VSS_A
CPU_1
CPU_1#
CPU_0
CPU_0#
SRC_9
SRC_9#
SRC_8
SRC_8#
SRC_7
SRC_7#
SRC_6
SRC_6#
SRC_5
SRC_5#
SRC_4
SRC_4#
SRC_3
SRC_3#
SRC_2
SRC_2#
0.1U_0402_16V4Z~D
C6
7
8
25
24
11
10
14
13
6
5
3
2
72
70
69
71
66
67
38
63
64
62
60
61
29
58
59
57
55
56
28
52
53
26
50
51
46
47
48
2
0.1U_0402_16V4Z~D
1
C7
2
0.047U_0402_16V4Z~D
4.7U_0603_6.3V4Z~D
1
1
2
H_STP_PCI#
H_STP_CPU#
MCH_BCLK CLK_MCH_BCLK
MCH_BCLK#
CPU_BCLK
CPU_BCLK#
CPU_ITP
CPU_ITP#
PCIE_MINI1
PCIE_MINI1#
MINI1CLK_REQ#
PCIE_MINI2
PCIE_MINI2#
MINI2CLK_REQ#
PCIE_ICH
PCIE_ICH#
MINI3CLK_REQ#
PCIE_EXP#
EXPCLK_REQ#
MCH_3GPLL
CLK_3GPLLREQ#_R
PCIE_SATA CLK_PCIE_SATA
PCIE_SATA#
SATA_CLKREQ#_R
DOT96_SSC
DOT96_SSC#
2
C15
C14
2
1 2
R11 33_0402_5%~D
1 2
R13 33_0402_5%~D
1 2
R15 33_0402_5%~D
1 2
R16 33_0402_5%~D
1 2
R18 33_0402_5%~D@
1 2
R21 33_0402_5%~D@
1 2
R23 33_0402_5%~D
1 2
R25 33_0402_5%~D
1 2
R28 33_0402_5%~D
1 2
R31 33_0402_5%~D
1 2
R34 33_0402_5%~D
1 2
R36 33_0402_5%~D
1 2
R39 33_0402_5%~D
1 2
R40 33_0402_5%~D
1 2
R408 33_0402_5%~D
1 2
R415 33_0402_5%~D
1 2
R45 33_0402_5%~D
1 2
R47 33_0402_5%~D
1 2
R48 475_0402_1%~D
1 2
R49 33_0402_5%~D
1 2
R52 33_0402_5%~D
1 2
R53 475_0402_1%~D
1 2
R523 33_0402_5%~D
1 2
R670 33_0402_5%~D
CLK_MCH_BCLK#
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_CPU_ITP
CLK_CPU_ITP#
CLK_PCIE_MINI1
CLK_PCIE_MINI1#
CLK_PCIE_MINI2
CLK_PCIE_MINI2#
CLK_PCIE_ICH
CLK_PCIE_ICH#
CLK_PCIE_MINI3PCIE_MINI3
CLK_PCIE_MINI3#PCIE_MINI3#
CLK_PCIE_EXPPCIE_EXP
CLK_PCIE_EXP#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#MCH_3GPLL#
CLK_3GPLLREQ#
CLK_PCIE_SATA#
1
+3.3V_RUN
MINI1CLK_REQ#
MINI2CLK_REQ#
CLK_3GPLLREQ#
SATA_CLKREQ#
MINI3CLK_REQ#
EXPCLK_REQ#
H_STP_PCI# <24>
H_STP_CPU# <24>
CLK_MCH_BCLK <10>
CLK_MCH_BCLK# <10>
CLK_CPU_BCLK <7>
CLK_CPU_BCLK# <7>
CLK_CPU_ITP <7>
CLK_CPU_ITP# <7>
CLK_PCIE_MINI1# <34>
MINI1CLK_REQ# <34>
CLK_PCIE_MINI2 <34>
CLK_PCIE_MINI2# <34>
MINI2CLK_REQ# <34>
CLK_PCIE_ICH <24>
CLK_PCIE_ICH# <24>
CLK_PCIE_MINI3 <34>
CLK_PCIE_MINI3# <34>
MINI3CLK_REQ# <34>
CLK_PCIE_EXP <32>
CLK_PCIE_EXP# <32>
EXPCLK_REQ# <32>
CLK_MCH_3GPLL <10>
CLK_MCH_3GPLL# <10>
CLK_3GPLLREQ# <10>
CLK_PCIE_SATA <23>
CLK_PCIE_SATA# <23>
SATA_CLKREQ# <24>
DREF_SSCLK <10>
DREF_SSCLK# <10>
1 2
R4 10K_0402_5%~D
1 2
R5 10K_0402_5%~D
1 2
R6 10K_0402_5%~D
1 2
R7 10K_0402_5%~D
1 2
R8 10K_0402_5%~D
1 2
R356 10K_0402_5%~D
CLK_PCIE_MINI1 <34>
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Clock Generator
LA-3801P
666Thursday, June 12, 2008
1
of
0.8
Page 7
5
4
3
2
1
H_A#[3..35]<10>
D D
H_ADSTB#0<10>
H_REQ#0<10>
H_REQ#1<10>
H_REQ#2<10>
H_REQ#3<10>
H_REQ#4<10>
C C
H_ADSTB#1<10>
H_A20M#<23>
H_FERR#<23>
H_IGNNE#<23>
H_STPCLK#<23>
H_INTR<23>
H_NMI<23>
H_SMI#<23>
B B
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_ADSTB#0
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#4
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25 ITP_TCK
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_ADSTB#1
H_A20M#
H_FERR#
H_IGNNE#
H_STPCLK#
H_INTR
H_NMI
H_SMI#
JCPU1A
J4
ADDR GROUP_0
A[3]#
L5
A[4]#
L4
A[5]#
K5
A[6]#
M3
A[7]#
N2
A[8]#
J1
A[9]#
N3
A[10]#
P5
A[11]#
P2
A[12]#
L2
A[13]#
P4
A[14]#
P1
A[15]#
R1
A[16]#
M1
ADSTB[0]#
K3
REQ[0]#
H2
REQ[1]#
K2
REQ[2]#
J3
REQ[3]#
L1
REQ[4]#
Y2
A[17]#
U5
A[18]#
R3
ADDR GROUP_1
A[19]#
W6
A[20]#
U4
A[21]#
Y5
A[22]#
U1
A[23]#
R4
A[24]#
T5
A[25]#
T3
A[26]#
W2
A[27]#
W5
A[28]#
Y4
A[29]#
U2
A[30]#
V4
A[31]#
W3
A[32]#
AA4
AB2
AA3
V1
A6
A5
C4
D5
C6
B4
A3
M4
N5
T2
V3
B2
D2
D22
D3
F6
THERMAL
A[33]#
A[34]#
PROCHOT#
A[35]#
ADSTB[1]#
ICH
A20M#
FERR#
THERMTRIP#
IGNNE#
STPCLK#
LINT0
LINT1
SMI#
RSVD[01]
RSVD[02]
RSVD[03]
RSVD[04]
RSVD[05]
RSVD[06]
RSVD[07]
RSVD[08]
RSVD[09]
RESERVED
TYCO_1-1674770-2_Penryn~D
ADS#
BNR#
BPRI#
DEFER#
DRDY#
DBSY#
BR0#
IERR#
INIT#
LOCK#
CONTROL
RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#
HIT#
HITM#
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDO
TMS
TRST#
DBR#
XDP/ITP SIGNALS
THERMDA
THERMDC
H CLK
BCLK[0]
BCLK[1]
H_ADS#
H1
H_BNR#
E2
H_BPRI#
G5
H_DEFER#
H5
H_DRDY#
F21
H_DBSY#
E1
H_BR0#
F1
H_IERR#
D20
H_INIT#
B3
H_LOCK#
H4
H_RESET#
C1
H_RS#0
F3
H_RS#1
F4
H_RS#2
G3
H_TRDY#H_REQ#3
G2
H_HIT#
G6
H_HITM#
E4
ITP_BPM#0
AD4
ITP_BPM#1
AD3
ITP_BPM#2
AD1
ITP_BPM#3
AC4
ITP_BPM#4
AC2
ITP_BPM#5
AC1
AC5
ITP_TDI
AA6
TDI
AB3
AB5
AB6
C20
D21
A24
B25
C7
A22
A21
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_DBRESET#
EC_CPU_PROCHOT#
H_THERMTRIP#
CLK_CPU_BCLK
CLK_CPU_BCLK#
R1104 0_0402_5%~D
R1105 0_0402_5%~D
R1106 0_0402_5%~D
R1107 0_0402_5%~D
R1108 0_0402_5%~D
H_THERMDA
H_THERMDC
H_ADS# <10>
H_BNR# <10>
H_BPRI# <10>
H_DEFER# <10>
H_DRDY# <10>
H_DBSY# <10>
H_BR0# <10>
H_INIT# <23>
H_LOCK# <10>
H_RESET# <10>
H_RS#0 <10>
H_RS#1 <10>
H_RS#2 <10>
H_TRDY# <10>
H_HIT# <10>
H_HITM# <10>
1 2
1 2
1 2
1 2
1 2
ITP_DBRESET# <24>
2
C18
@
100P_0402_50V8K~D
1
H_THERMTRIP# <18>
CLK_CPU_BCLK <6>
CLK_CPU_BCLK# <6>
R1103 0_0402_5%~D@
1 2
R780 0_0402_5%~D@
1 2
R59
56_0402_5%~D
+1.05V_VCCP
+1.05V_VCCP
R781 0_0402_5%~D@
1 2
R782 0_0402_5%~D@
1 2
R783 0_0402_5%~D@
1 2
R784 0_0402_5%~D@
1 2
R785 0_0402_5%~D@
1 2
R57 124_0402_1%~D
1 2
R1111 0_0402_5%~D@
1 2
CLK_CPU_ITP
CLK_CPU_ITP#
R58 22.6_0402_1%~D
1 2
R1109 0_0402_5%~D@
1 2
R1112 0_0402_5%~D@
1 2
R1113 0_0402_5%~D@
1 2
1 2
R61 56_0402_5%~D
1 2
R912 51_0402_5%~D@
R56
56_0402_5%~D
12
+1.05V_VCCP
CLK_CPU_ITP<6>
CLK_CPU_ITP#<6>
+1.05V_VCCP
12
H_THERMDA <18>
H_THERMDC <18>
H_THERMDA, H_THERMDC routing together,
Trace width / Spacing = 10 / 10 mil
H_THERMTRIP#
ITP_BPM#5
Place close to CPU within 200 mil
+1.05V_VCCP
ITP_DBRESET#R
ITP_BPM#0R
ITP_BPM#1R
ITP_BPM#2R
ITP_BPM#3R
ITP_BPM#4R
ITP_BPM#5R
H_RESET#R
ITP_TCK_R
ITP_TDO_R
ITP_TCK_R
ITP_TRST#R
ITP_TMS_R
ITP_TDI_R
+3.3V_ALW_ICH
R60 150_0402_5%~D
+1.05V_VCCP
+1.05V_VCCP
1
2
Place near JITP
1 2
1 2
R62 56_0402_5%~D
R63
@
1 2
R64 39_0402_5%~D
1 2
R67 27_0402_5%
Place close to JITP within 200ps = 1000 mil
+1.05V_VCCP
29
JITP1
28
VTT1
27
GND6
VTT0
26
VTAP
25
DBR#
24
DBA#
23
BPM0#
22
GND5
21
BPM1#
20
GND4
19
BPM2#
18
GND3
17
BPM3#
16
GND2
15
BPM4#
14
GND1
13
BPM5#
12
RESET#
11
FBO
10
GND0
9
BCLKP
8
BCLKN
7
TDO
6
NC2
5
TCK
4
NC1
3
TRST#
2
TMS
1
TDI
GND7
MOLEX_52435-2891_28P~D
30
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C20
C19
2
ITP_DBRESET#
ITP_TDO
H_RESET#
51_0402_1%~D
ITP_TMS
This shall place near CPU
ITP_TCK
JCPU1D
A4
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
VSS[082]
VSS[001]
VSS[002]
VSS[083]
VSS[003]
VSS[084]
VSS[004]
VSS[085]
VSS[005]
VSS[086]
VSS[006]
VSS[087]
VSS[007]
VSS[088]
VSS[008]
VSS[089]
VSS[009]
VSS[090]
VSS[010]
VSS[091]
VSS[011]
VSS[092]
VSS[012]
VSS[093]
VSS[013]
VSS[094]
VSS[014]
VSS[095]
VSS[015]
VSS[096]
VSS[016]
VSS[097]
VSS[017]
VSS[098]
VSS[018]
VSS[099]
VSS[019]
VSS[100]
VSS[020]
VSS[101]
VSS[021]
VSS[102]
VSS[022]
VSS[103]
VSS[023]
VSS[104]
VSS[024]
VSS[105]
VSS[025]
VSS[106]
VSS[026]
VSS[107]
VSS[027]
VSS[108]
VSS[028]
VSS[109]
VSS[029]
VSS[110]
VSS[030]
VSS[111]
VSS[031]
VSS[112]
VSS[032]
VSS[113]
VSS[033]
VSS[114]
VSS[034]
VSS[115]
VSS[035]
VSS[116]
VSS[036]
VSS[117]
VSS[037]
VSS[118]
VSS[038]
VSS[119]
VSS[039]
VSS[120]
VSS[040]
VSS[121]
VSS[041]
VSS[122]
VSS[042]
VSS[123]
VSS[043]
VSS[124]
VSS[044]
VSS[125]
VSS[045]
VSS[126]
VSS[046]
VSS[127]
VSS[047]
VSS[128]
VSS[048]
VSS[129]
VSS[049]
VSS[130]
VSS[050]
VSS[131]
VSS[051]
VSS[132]
VSS[052]
VSS[133]
VSS[053]
VSS[134]
VSS[054]
VSS[135]
VSS[055]
VSS[136]
VSS[056]
VSS[137]
VSS[057]
VSS[138]
VSS[058]
VSS[139]
VSS[059]
VSS[140]
VSS[060]
VSS[141]
VSS[061]
VSS[142]
VSS[062]
VSS[143]
VSS[063]
VSS[144]
VSS[064]
VSS[145]
VSS[065]
VSS[146]
VSS[066]
VSS[147]
VSS[148]
VSS[067]
VSS[068]
VSS[149]
VSS[069]
VSS[150]
VSS[070]
VSS[151]
VSS[071]
VSS[152]
VSS[072]
VSS[153]
VSS[073]
VSS[154]
VSS[074]
VSS[155]
VSS[075]
VSS[156]
VSS[076]
VSS[157]
VSS[077]
VSS[158]
VSS[078]
VSS[159]
VSS[079]
VSS[160]
VSS[080]
VSS[161]
VSS[081]P3VSS[162]
VSS[163]
TYCO_1-1674770-2_Penryn~D
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25
1 2
R65 150_0402_5%~D
1 2
R66 649_0402_1%~D
A A
Place close to CPU within 200ps = 1000 mil
ITP_TDI
ITP_TRST#
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Penryn Processor(1/2)
LA-3801P
766Thursday, June 12, 2008
1
0.8
of
Page 8
5
4
3
2
1
+VCC_CORE +VCC_CORE
D D
C C
B B
1 2
A A
1K_0402_5%~D
CPU_MCH_BSEL0<6,10>
CPU_MCH_BSEL1<6,10>
CPU_MCH_BSEL2<6,10>
@
R72
H_D#[0..63]<10>
+V_CPU_GTLREF
@
@
@
1K_0402_5%~D
@
R73
1 2
H_DSTBN#0<10>
H_DSTBP#0<10>
H_DSTBN#1<10>
H_DSTBP#1<10>
H_DINV#0<10>
H_DINV#1<10>
T1PAD~D
T138PAD~D
T4PAD~D
CPU_MCH_BSEL0
CPU_MCH_BSEL1
CPU_MCH_BSEL2
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_DSTBN#0
H_DSTBP#0
H_DINV#0
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_DSTBN#1
H_DSTBP#1
H_DINV#1
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
TEST7
R1041 0_0402_5%~D
R1042 0_0402_5%~D
R1043 0_0402_5%~D
TEST1
TEST2
JCPU1B
E22
D[0]#
F24
D[1]#
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25
N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24
AD26
C23
D25
C24
AF26
AF1
A26
C3
1 2
1 2
1 2
@
@
B22
B23
C21
T2PAD~D
T3PAD~D
For the purpose of testability, route these signals
through a ground referenced Z0 = 55ohm trace that
ends in a via that is near a GND via and is
accessible through an oscilloscope connection.
FSB
BCLK BSEL2 BSEL1 BSEL0
533
133
667
166
800
200
DATA GRP 0
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#
D[16]#
D[17]#
D[18]#
D[19]#
DATA GRP 1
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#
GTLREF
MISC
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
TEST7
BSEL[0]
BSEL[1]
BSEL[2]
TYCO_1-1674770-2_Penryn~D
TEST3
TEST5
001
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
DATA GRP 2DATA GRP 3
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#
COMP[0]
COMP[1]
COMP[2]
COMP[3]
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
100
Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22
AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20
R26
U26
AA1
Y1
E5
B5
D24
D6
D7
AE6
110
1067 266 0 0 0
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_DSTBN#2
H_DSTBP#2
H_DINV#2
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54H_D#22
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DSTBN#3
H_DSTBP#3
H_DINV#3
COMP0
COMP1
COMP2
COMP3
H_DPRSTP#
H_DPSLP#
H_DPWR#
H_PWRGOOD
H_CPUSLP#
H_PSI#
+V_CPU_GTLREF
H_DPRSTP# <10,23,47>
H_DPSLP# <23>
H_DPWR# <10>
H_PWRGOOD <23>
H_CPUSLP# <10>
H_PSI# <47>
+1.05V_VCCP
12
R77
1K_0402_1%~D
12
R78
2K_0402_1%~D
H_DSTBN#2 <10>
H_DSTBP#2 <10>
H_DINV#2 <10>
H_DSTBN#3 <10>
H_DSTBP#3 <10>
H_DINV#3 <10>
54.9_0402_1%~D
12
R68
Resistor placed within 0.5" of
CPU pin.Trace should be at least
25 mils away from any other
toggling signal. COMP0, COMP2
trace should be 27.4 ohm.
COMP1, COMP3 should be 55
ohm.
12
12
R69
12
R70
54.9_0402_1%~D
27.4_0402_1%~D
27.4_0402_1%~D
R71
JCPU1C
A7
VCC[001]
A9
VCC[002]
A10
VCC[003]
A12
VCC[004]
A13
VCC[005]
A15
VCC[006]
A17
VCC[007]
A18
VCC[008]
A20
VCC[009]
B7
VCC[010]
B9
VCC[011]
B10
VCC[012]
B12
VCC[013]
B14
VCC[014]
B15
VCC[015]
B17
VCC[016]
B18
VCC[017]
B20
VCC[018]
C9
VCC[019]
C10
VCC[020]
C12
VCC[021]
C13
VCC[022]
C15
VCC[023]
C17
VCC[024]
C18
VCC[025]
D9
VCC[026]
D10
VCC[027]
D12
VCC[028]
D14
VCC[029]
D15
VCC[030]
D17
VCC[031]
D18
VCC[032]
E7
VCC[033]
E9
VCC[034]
E10
VCC[035]
E12
VCC[036]
E13
VCC[037]
E15
VCC[038]
E17
VCC[039]
E18
VCC[040]
E20
VCC[041]
F7
VCC[042]
F9
VCC[043]
F10
VCC[044]
F12
VCC[045]
F14
VCC[046]
F15
VCC[047]
F17
VCC[048]
F18
VCC[049]
F20
VCC[050]
AA7
VCC[051]
AA9
VCC[052]
AA10
VCC[053]
AA12
VCC[054]
AA13
VCC[055]
AA15
VCC[056]
AA17
VCC[057]
AA18
VCC[058]
AA20
VCC[059]
AB9
VCC[060]
AC10
VCC[061]
AB10
VCC[062]
AB12
VCC[063]
AB14
VCC[064]
AB15
VCC[065]
AB17
VCC[066]
AB18
VCC[067]
TYCO_1-1674770-2_Penryn~D
AB20
VCC[068]
AB7
VCC[069]
AC7
VCC[070]
AC9
VCC[071]
AC12
VCC[072]
AC13
VCC[073]
AC15
VCC[074]
AC17
VCC[075]
AC18
VCC[076]
AD7
VCC[077]
AD9
VCC[078]
AD10
VCC[079]
AD12
VCC[080]
AD14
VCC[081]
AD15
VCC[082]
AD17
VCC[083]
AD18
VCC[084]
AE9
VCC[085]
AE10
VCC[086]
AE12
VCC[087]
AE13
VCC[088]
AE15
VCC[089]
AE17
VCC[090]
AE18
VCC[091]
AE20
VCC[092]
AF9
VCC[093]
AF10
VCC[094]
AF12
VCC[095]
AF14
VCC[096]
AF15
VCC[097]
AF17
VCC[098]
AF18
VCC[099]
AF20
VCC[100]
G21
VCCP[01]
V6
VCCP[02]
J6
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
VCCA[01]
VCCA[02]
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
VCCSENSE
VSSSENSE
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
B26
C26
AD6
AF5
AE5
AF4
AE3
AF3
AE2
AF7
AE7
VID0
VID1
VID2
VID3
VID4
VID5
VID6
VCCSENSE
VSSSENSE
1
+
2
Length match within 25 mils, Z0=27.4 ohm
Place R75 and R76 near CPU
+VCC_CORE
1 2
R75 100_0402_1%~D
1 2
R76 100_0402_1%~D
Route VCCSENSE and VSSSENSE trace at
27.4 ohms, 7 mils spacing and R75 & R76
keep to pad max 1 inch
+1.05V_VCCP
220U_D2_4VY_R15M~D
C21
CRB was 270uF
VID0 <47>
VID1 <47>
VID2 <47>
VID3 <47>
VID4 <47>
VID5 <47>
VID6 <47>
VCCSENSE <47>
VSSSENSE <47>
VCCSENSE=18 mils
VCCSENSE
VSSSENSE
10U_0805_10V4Z~D
0.01U_0402_16V7K~D
+1.5V_RUN
1
1
C23
C22
2
2
1 2
R833 27.4_0402_1%~D@
Reserve for testing
only
DELL CONFIDENTIAL/PROPRIETARY
Layout close CPU PIN AD26
55 ohm, 0.5 inch (max)
5
4
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Penryn Processor(2/2)
LA-3801P
866Thursday, June 12, 2008
1
0.8
of
Page 9
5
+VCC_CORE
Place these inside
socket cavity on L8
(North side
D D
C C
Secondary)
Place these inside
socket cavity on L8
(Sorth side
Secondary)
Place these inside
socket cavity on L8
(North side
Primary)
Place these inside
socket cavity on L8
(Sorth side
Primary)
1
2
+VCC_CORE
1
2
+VCC_CORE
1
2
+VCC_CORE
1
2
C24
10U_0805_4VAM~D
C34
10U_0805_4VAM~D
C44
10U_0805_4VAM~D
C50
10U_0805_4VAM~D
1
C25
10U_0805_4VAM~D
2
1
C35
10U_0805_4VAM~D
2
1
C45
10U_0805_4VAM~D
2
1
C51
10U_0805_4VAM~D
2
4
1
C26
10U_0805_4VAM~D
2
1
C36
10U_0805_4VAM~D
2
1
C46
10U_0805_4VAM~D
2
1
C52
10U_0805_4VAM~D
2
1
C27
10U_0805_4VAM~D
2
1
C37
10U_0805_4VAM~D
2
1
C47
10U_0805_4VAM~D
2
1
C53
10U_0805_4VAM~D
2
1
C28
10U_0805_4VAM~D
2
1
C38
10U_0805_4VAM~D
2
1
C48
10U_0805_4VAM~D
2
1
C54
10U_0805_4VAM~D
2
1
C29
10U_0805_4VAM~D
2
1
C39
10U_0805_4VAM~D
2
1
C49
10U_0805_4VAM~D
2
1
C55
10U_0805_4VAM~D
2
3
1
C30
10U_0805_4VAM~D
2
1
C40
10U_0805_4VAM~D
2
1
C31
10U_0805_4VAM~D
2
1
C41
10U_0805_4VAM~D
2
1
2
1
2
2
C32
10U_0805_4VAM~D
C42
10U_0805_4VAM~D
1
C33
10U_0805_4VAM~D
2
1
C43
10U_0805_4VAM~D
2
1
10uF 0805 X6S -> 85 degree C
High Frequence Decoupling
Near VCORE regulator.
+VCC_CORE
270U_X_2VM_R4.5M~D
270U_X_2VM_R4.5M~D
1
+
@
C59
2
270U_X_2VM_R4.5M~D
1
North Side Secondary
+
@
@
C60
C61
2
ESR <= 1.5m ohm
South Side Secondary
270U_X_2VM_R4.5M~D
1
1
+
+
2
C57
C56
2
1
1
+
+
C58
2
2
270U_X_2VM_R4.5M~D
270U_X_2VM_R4.5M~D
Capacitor > 1320uF
B B
+1.05V_VCCP
1
C62
0.1U_0402_10V7K~D
2
A A
1
C63
0.1U_0402_10V7K~D
2
1
C64
0.1U_0402_10V7K~D
2
1
C65
0.1U_0402_10V7K~D
2
1
C66
0.1U_0402_10V7K~D
2
1
C67
0.1U_0402_10V7K~D
2
Place these inside
socket cavity on L8
(North side
Secondary)
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
CPU Bypass
LA-3801P
966Thursday, June 12, 2008
1
0.8
of
Page 10
5
+15V_ALW
100K_0402_5%~D
2
R1120
AD14
AA13
AA11
AD11
AD10
AD13
AE12
AE14
AE11
12
61
F2
G8
F8
E6
G2
H6
H2
F6
D4
H3
M9
M11
J1
J2
N12
J6
P2
L2
R2
N9
L6
M5
J3
N2
R1
N5
N6
P13
N8
L7
N10
M3
Y3
Y6
Y10
Y12
Y14
Y7
W2
AA8
Y9
AA9
AE9
AA2
AD8
AA3
AD3
AD7
AF3
AC1
AE3
AC3
AE8
AG2
AD6
C5
E3
C12
E11
A11
B11
2N7002DW-7-F_SOT363-6~D
U2A
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
H_SWING
H_RCOMP
H_CPURST#
H_CPUSLP#
H_AVREF
H_DVREF
CANTIGA ES_FCBGA1329~D
ICH_AZ_MCH_BITCLK<23>
ICH_AZ_MCH_RST#<23>
ICH_AZ_MCH_SDOUT<23>
ICH_AZ_MCH_SYNC<23>
ICH_AZ_MCH_SDIN2<23>
+3.3V_ALW
Q153
SI3456BDV-T1-E3_TSOP6~D
+3.3V_RUN_D
D
6
S
2
1
G
3
Q153_GATE
470K_0402_5%~D
12
@
Q154A
R1121
1
2
45
100P_0402_50V8J~D
H_D#[0..63]<8>
D D
+1.05V_VCCP
12
R91
221_0402_1%~D
H_SWNG
100_0402_1%~D
C C
+H_VREF
B B
+3.3V_ALW +3.3V_RUN_D
A A
2N7002DW-7-F_SOT363-6~D
0.1U_0402_16V7K~D
12
R95
1
C74
2
+1.05V_VCCP
12
R90
1K_0402_1%~D
0.1U_0402_16V7K~D
2K_0402_1%~D
12
1
R94
2
1 2
R82 24.9_0402_1%~D
H_RESET#<7>
H_CPUSLP#<8>
@
Q155
NTR4003NT1G_SOT23-3
D
1 3
G
2
Q153_GATE
Q154B
ICH_PWRGD<24,41>
S
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
@
C73
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_SWNG
+H_RCOMP
H_RESET#
H_CPUSLP#
+H_VREF
+3.3V_ALW2
100K_0402_5%~D
12
R1119
3
5
4
5
HOST
0.1U_0402_16V4Z~D
ICH_AZ_MCH_RST#
ICH_AZ_MCH_SDOUT
ICH_AZ_MCH_SYNC
ICH_AZ_MCH_SDIN2
10K_0402_5%~D
12
R1122
8.2K_0402_5%~D
12
R1123
C1049
+3.3V_RUN
H_ADSTB#_0
H_ADSTB#_1
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
+3.3V_RUN_D
C1046
1 2
@
0_0603_5%~D
U67_OD_DELAY
MCH_TSATN#
4
SDVO_CTRLCLK
12
R180 2.2K_0402_5%~D
R182 2.2K_0402_5%~D
R183 2.2K_0402_5%~D
Place close to U2.
N28,M28,G36,E36
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HITM#
H_LOCK#
H_TRDY#
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
R1118
SDVO_CTRLDATA
12
R181 2.2K_0402_5%~D
DDPC_CTRLCLK
12
DDPC_CTRLDATA
12
H_A#3
A14
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_ADS#
H_HIT#
+3.3V_RUN
H_A#4
C15
H_A#5
F16
H_A#6
H13
H_A#7
C18
H_A#8
M16
H_A#9
J13
H_A#10
P16
H_A#11
R16
H_A#12
N17
H_A#13
M13
H_A#14
E17
H_A#15
P17
H_A#16
F17
H_A#17
G20
H_A#18
B19
H_A#19
J16
H_A#20
E20
H_A#21
H16
H_A#22
J20
H_A#23
L17
H_A#24
A17
H_A#25
B17
H_A#26
L16
H_A#27
C21
H_A#28
J17
H_A#29
H20
H_A#30
B18
H_A#31
K17
H_A#32
B20
H_A#33
F21
H_A#34
K21
H_A#35
L20
H_ADS#
H12
H_ADSTB#0
B16
H_ADSTB#1
G17
H_BNR#
A9
H_BPRI#
F11
H_BR0#
G12
H_DEFER#
E9
H_DBSY#
B10
CLK_MCH_BCLK
AH7
CLK_MCH_BCLK#
AH6
H_DPWR#
J11
H_DRDY#
F9
H_HIT#
H9
H_HITM#
E12
H_LOCK#
H11
H_TRDY#
C9
H_DINV#0
J8
H_DINV#1
L3
H_DINV#2
Y13
H_DINV#3
Y1
H_DSTBN#0
L10
H_DSTBN#1
M7
H_DSTBN#2
AA5
H_DSTBN#3
AE6
H_DSTBP#0
L9
H_DSTBP#1
M8
H_DSTBP#2
AA6
H_DSTBP#3
AE5
H_REQ#0
B15
H_REQ#1
K13
H_REQ#2
F13
H_REQ#3
B13
H_REQ#4
B14
H_RS#0
B6
H_RS#1
F12
H_RS#2
C8
0.1U_0402_16V4Z~D
1
2
U67
16
VCCB
15
CLK_OUT
14
CMD_B
13
B0
12
B1
11
B2
10
B3
GND9OE
FXL2SD106BQX_DQFN16_2P5X3P5~D
+1.05V_VCCP
12
R103
0_0402_5%~D
MMST3904-7-F_SOT323-3~D
4
+1.5V_RUN
C1047
VCCA
CLK_IN
CMD_A
A0
A1
A2
A3
12
R101
54.9_0402_1%~D
1 2
R104
330_0402_5%~D
+1.8V_MEM
+V_DDR_MCH_REF
H_ADS# <7>
H_ADSTB#0 <7>
H_ADSTB#1 <7>
H_BNR# <7>
H_BPRI# <7>
H_BR0# <7>
H_DEFER# <7>
H_DBSY# <7>
CLK_MCH_BCLK <6>
CLK_MCH_BCLK# <6>
H_DPWR# <8>
H_DRDY# <7>
H_HIT# <7>
H_HITM# <7>
H_LOCK# <7>
H_TRDY# <7>
H_DINV#0 <8>
H_DINV#1 <8>
H_DINV#2 <8>
H_DINV#3 <8>
H_DSTBN#0 <8>
H_DSTBN#1 <8>
H_DSTBN#2 <8>
H_DSTBN#3 <8>
H_DSTBP#0 <8>
H_DSTBP#1 <8>
H_DSTBP#2 <8>
H_DSTBP#3 <8>
H_REQ#0 <7>
H_REQ#1 <7>
H_REQ#2 <7>
H_REQ#3 <7>
H_REQ#4 <7>
H_RS#0 <7>
H_RS#1 <7>
H_RS#2 <7>
1
2
1
2
GMCH_HDA_BITCLKICH_AZ_MCH_BITCLK
3
GMCH_HDA_RST#
4
GMCH_HDA_SDOUT
5
GMCH_HDA_SYNC
6
GMCH_HDA_SDIN2
7
8
2
B
E
Q4
H_A#[3..35] <7>
R79 80.6_0402_1%~D
R80 80.6_0402_1%~D
0.1U_0402_16V4Z~D
1
2
+1.05V_M
1K_0402_1%~D
12
499_0402_1%~D
R87
1 2
R89
10K_0402_5%~D
12
+3.3V_RUN
1K_0402_5%~D
1K_0402_5%~D
12
12
R99
R98
C
2
B
E
C
3 1
Q3
MMST3904-7-F_SOT323-3~D
3 1
3
M_CLK_DDR0<16>
M_CLK_DDR1<16>
M_CLK_DDR2<17>
M_CLK_DDR3<17>
M_CLK_DDR#0<16>
M_CLK_DDR#1<16>
M_CLK_DDR#2<17>
M_CLK_DDR#3<17>
DDR_CKE0_DIMMA<16>
DDR_CKE1_DIMMA<16>
DDR_CKE2_DIMMB<17>
DDR_CKE3_DIMMB<17>
DDR_CS0_DIMMA#<16>
DDR_CS1_DIMMA#<16>
DDR_CS2_DIMMB#<17>
DDR_CS3_DIMMB#<17>
SMRCOMP
12
SMRCOMP#
12
0.1U_0402_16V4Z~D
1
C68
C69
2
R83
0.1U_0402_16V4Z~D
C70
1
2
R42 33_0402_5%~D
R44 33_0402_5%~D
R685 0_0402_5%~D
R686 33_0402_5%~D
R687 33_0402_5%~D
MCH_TSATN_EC <37>
R81
499_0402_1%~D
1 2
MCH_DREFCLK<6>
MCH_DREFCLK#<6>
DREF_SSCLK<6>
DREF_SSCLK#<6>
CLK_MCH_3GPLL<6>
CLK_MCH_3GPLL#<6>
DMI_MRX_ITX_N0<24>
DMI_MRX_ITX_N1<24>
DMI_MRX_ITX_N2<24>
DMI_MRX_ITX_N3<24>
DMI_MRX_ITX_P0<24>
DMI_MRX_ITX_P1<24>
DMI_MRX_ITX_P2<24>
DMI_MRX_ITX_P3<24>
DMI_MTX_IRX_N0<24>
DMI_MTX_IRX_N1<24>
DMI_MTX_IRX_N2<24>
DMI_MTX_IRX_N3<24>
DMI_MTX_IRX_P0<24>
DMI_MTX_IRX_P1<24>
DMI_MTX_IRX_P2<24>
DMI_MTX_IRX_P3<24>
GFX_VR_ON<49>
CL_CLK0<24>
CL_DATA0<24>
ICH_CL_PWROK<24,38>
CL_RST0#<24>
DDPC_CTRLCLK<21>
DDPC_CTRLDATA<12,21>
SDVO_CTRLCLK<21>
SDVO_CTRLDATA<21>
CLK_3GPLLREQ#<6>
MCH_ICH_SYNC#<24>
When pop R314, then R42,
R44, R685, R686, R687
should be no stuff
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3
M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
M_ODT0
M_ODT0<16>
M_ODT1
M_ODT1<16>
M_ODT2
M_ODT2<17>
M_ODT3
M_ODT3<17>
SMRCOMP
SMRCOMP#
SMRCOMP_VOH
SMRCOMP_VOL
+V_DDR_MCH_REF
SM_PWROK
MCH_DREFCLK
MCH_DREFCLK#
DREF_SSCLK
DREF_SSCLK#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
DMI_MRX_ITX_N0
DMI_MRX_ITX_N1
DMI_MRX_ITX_N2
DMI_MRX_ITX_N3
DMI_MRX_ITX_P0
DMI_MRX_ITX_P1
DMI_MRX_ITX_P2
DMI_MRX_ITX_P3
DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3
DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3
GFX_VID0
GFX_VID0<49>
GFX_VID1
GFX_VID1<49>
GFX_VID2
GFX_VID2<49>
GFX_VID3
GFX_VID3<49>
GFX_VID4
GFX_VID4<49>
GFX_VR_ON
CL_CLK0
CL_DATA0
ICH_CL_PWROK
CL_RST0#
+CL_VREF
DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
CLK_3GPLLREQ#
MCH_ICH_SYNC#
MCH_TSATN#
HD support 1.5V
GMCH_HDA_BITCLK_R
1 2
GMCH_HDA_RST_R#
1 2
GMCH_HDA_SDI N2_ R
1 2
GMCH_HDA_SDOUT_R
1 2
GMCH_HDA_SYNC_R
1 2
AP24
AT21
AV24
AU20
AR24
AR21
AU24
AV20
BC28
AY28
AY36
BB36
BA17
AY16
AV16
AR13
BD17
AY17
BF15
AY13
BG22
BH21
BF28
BH28
AV42
AR36
BF17
BC36
AE41
AE37
AE47
AH39
AE40
AE38
AE48
AH40
AE35
AE43
AE46
AH42
AD35
AE44
AF46
AH43
G33
AH37
AH36
AN36
AJ35
AH34
M28
G36
U2B
B38
A38
E41
F41
F43
E43
B33
B32
F33
E33
C34
N28
E36
K36
H36
B12
B28
B30
B29
C29
A28
SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1
SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1
SA_CKE_0
SA_CKE_1
SB_CKE_0
SB_CKE_1
SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1
SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1
SM_RCOMP
SM_RCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL
SM_VREF
SM_PWROK
SM_REXT
SM_DRAMRST#
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
PEG_CLK
PEG_CLK#
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4
GFX_VR_EN
CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF
DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
CLKREQ#
ICH_SYNC#
TSATN#
HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC
2
M36
RSVD
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD20
RSVD22
RSVD23
RSVD24
RSVD25
N36
R33
T33
AH9
AH10
AH12
AH13
K12
AL34
AK34
AN35
AM35
TP_MCH_RSVD14
T24
B31
B2
M1
AY21
BG23
BF23
BH18
BF18
TP_MCH_RSVD2
TP_MCH_RSVD3
TP_MCH_RSVD6
TP_MCH_RSVD7
TP_MCH_RSVD8
ME_JTAG_TCK
ME_JTAG_TDI
ME_JTAG_TDO
ME_JTAG_TMS
TP_MCH_RSVD15
TP_MCH_RSVD20
TP_MCH_RSVD24
TP_MCH_RSVD25
R804 100_0402_5%~D@
R805 100_0402_5%~D@
R806 100_0402_5%~D@
R807 100_0402_5%~D@
R1088 51K_0402_1%~D@
T151PAD~D
T152PAD~D
T155PAD~D
T156PAD~D
T157PAD~D
1 2
1 2
1 2
1 2
1 2
T6 PAD~D
T9 PAD~D
T12 PAD~D
T159PAD~D
DDR CLK/ CONTROL/COMPENSATION
CLK
CFG
CFG_10
DMI
PM
GRAPHICS VID
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
PM_SYNC#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
THERMTRIP#
DPRSLPVR
MEHDA
NC
MISC
CANTIGA ES_FCBGA1329~D
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
RSTIN#
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
NC_25
NC_26
T25
R25
P25
P20
P24
C25
N24
M24
E21
C23
C24
N21
P21
T21
R20
M20
L21
H21
P29
R28
T28
R29
B7
N33
P32
AT40
AT11
T20
R32
BG48
BF48
BD48
BC48
BH47
BG47
BE47
BH46
BF46
BG45
BH44
BH43
BH6
BH5
BG4
BH3
BF3
BH2
BG2
BE2
BG1
BF1
BD1
BC1
F1
A47
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
PM_SYNC#
H_DPRSTP#
PM_EXTTS#
ICH_PWRGD
PLTRST1#_R
THERMTRIP_MCH#
DPRSLPVR
GFX_VR_ON
PLTRST1#_R
+3.3V_RUN
CPU_MCH_BSEL0 <6,8>
CPU_MCH_BSEL1 <6,8>
CPU_MCH_BSEL2 <6,8>
T14 PAD~D
T15 PAD~D
CFG5 <12>
CFG6 <12>
CFG7 <12>
T16 PAD~D
CFG9 <12>
T17 PAD~D
T18 PAD~D
T19 PAD~D
T20 PAD~D
T21 PAD~D
T22 PAD~D
CFG16 <12>
T23 PAD~D
T24 PAD~D
CFG19 <12>
CFG20 <12>
PM_SYNC# <24>
H_DPRSTP# <8,23,47>
PM_EXTTS# <18>
ICH_PWRGD <24,41>
THERMTRIP_MCH# <18>
DPRSLPVR <24,47>
PM_EXTTS#
THERMTRIP_MCH#
SM_PWROK
12
R156
30K_0402_5%~D
12
R157
100K_0402_5%~D
R100 100_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
Cantiga(1 of 6)
LA-3801P
1
@
@
@
@
@
T125PAD~D
@
@
+1.8V_MEM
@
@
3.01K_0402_1%~D
1K_0402_1%~D
@
@
@
@
@
@
@
@
@
@
@
Use for DDR3 signls,
if support DDR2 need
connect to GND
12
+1.05V_VCCP
Reserve 100ohm
and Test point
for ME JTAG
debug
12
R88
1K_0402_1%~D
SMRCOMP_VOH
0.01U_0402_16V7K~D
1
2
SMRCOMP_VOL
0.01U_0402_16V7K~D
1
2
Notes refer
page 12
12
1 2
12
PLTRST1# <22,32>
10 66Thursday, June 12, 2008
C71
C75
of
12
R93
12
R97
R84 10K_0402_5%~D
R102 56_0402_5%~D
R86 0_0402_5%~D
1
@
2.2U_0603_6.3V6K~D
1
2
2.2U_0603_6.3V6K~D
1
2
+3.3V_RUN
+1.05V_VCCP
C72
C76
0.8
Page 11
5
D D
4
3
2
1
DDR_A_BS0<16>
DDR_A_BS1<16>
DDR_A_BS2<16>
DDR_A_RAS#<16>
DDR_A_CAS#<16>
DDR_A_WE#<16>
DDR_A_DM[0..7]<16>
C C
B B
DDR_A_DQS[0..7]<16>
DDR_A_DQS#[0..7]<16>
DDR_A_MA[0..14]<16>
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
DDR_A_RAS#
DDR_A_CAS#
DDR_A_DM0 DDR_A_D11
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
BD21
BG18
AT25
BB20
BD20
AY20
AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5
AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8
BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25
U2D
SA_BS_0
SA_BS_1
SA_BS_2
SA_RAS#
SA_CAS#
SA_WE#
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14
SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
DDR SYSTEM MEMORY A
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
CANTIGA ES_FCBGA1329~D
SA_DQ_63
AJ38
AJ41
AN38
AM38
AJ36
AJ40
AM44
AM42
AN43
AN44
AU40
AT38
AN41
AN39
AU44
AU42
AV39
AY44
BA40
BD43
AV41
AY43
BB41
BC40
AY37
BD38
AV37
AT36
AY38
BB38
AV36
AW36
BD13
AU11
BC11
BA12
AU13
AV13
BD12
BC12
BB9
BA9
AU10
AV9
BA11
BD9
AY8
BA6
AV5
AV7
AT9
AN8
AU5
AU6
AT5
AN10
AM11
AM5
AJ9
AJ8
AN12
AM13
AJ11
AJ12
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6DDR_A_WE#
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
DDR_B_BS0<17>
DDR_B_BS1<17>
DDR_B_BS2<17>
DDR_B_RAS#<17>
DDR_B_CAS#<17>
DDR_B_WE#<17>
DDR_B_DM[0..7]<17>
DDR_B_DQS[0..7]<17>
DDR_B_DQS#[0..7]<17>
DDR_B_MA[0..14]<17>
DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
DDR_B_RAS#
DDR_B_CAS#
DDR_B_WE#
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
BC16
BB17
BB33
AU17
BG16
BF14
AM47
AY47
BD40
BF35
BG11
AL47
AV48
BG41
BG37
AL46
AV47
BH41
BH37
BG9
AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33
BA3
AP1
AK2
BH9
BB2
AU1
AN6
BC2
AT2
AN5
U2E
SB_BS_0
SB_BS_1
SB_BS_2
SB_RAS#
SB_CAS#
SB_WE#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14
SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
DDR SYSTEM MEMORY B
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
CANTIGA ES_FCBGA1329~D
SB_DQ_63
AH46
AP47
AP46
AJ46
AJ48
AM48
AP48
AU47
AU46
BA48
AY48
AT47
AR47
BA47
BC47
BC46
BC44
BG43
BF43
BE45
BC41
BF40
BF41
BG38
BF38
BH35
BG35
BH40
BG39
BG34
BH34
BH14
BG12
BH11
BG8
BH12
BF11
BF8
BG7
BC5
BC6
AY3
AY1
BF6
BF5
BA1
BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1
AL1
AL2
AJ1
AH1
AM2
AM3
AH3
AJ3
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
DDR_B_D0
AK47
DDR_B_D[0..63] <17>DDR_A_D[0..63] <16>
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Cantiga(2 of 6)
LA-3801P
11 66T h u r s da y, June 12, 2008
1
0.8
of
Page 12
5
U2C
BIA_PWM<19>
D D
The value is recommended per Intel
C C
B B
R688 2.4K_0402_1%~D
CRT_HSYNC<20>
CRT_VSYNC<20>
PANEL_BKEN_MCH<37>
LDDC_CLK_MCH<19>
LDDC_DATA_MCH<19>
1 2
LCD_ACLK-_MCH<19>
LCD_ACLK+_MCH<19>
LCD_BCLK-_MCH<19>
LCD_BCLK+_MCH<19>
LCD_A0-_MCH<19>
LCD_A1-_MCH<19>
LCD_A2-_MCH<19>
LCD_A0+_MCH<19>
LCD_A1+_MCH<19>
LCD_A2+_MCH<19>
LCD_B0-_MCH<19>
LCD_B1-_MCH<19>
LCD_B2-_MCH<19>
LCD_B0+_MCH<19>
LCD_B1+_MCH<19>
LCD_B2+_MCH<19>
75_0402_5%~D
12
R1114
CRT_BLU<20>
CRT_GRN<20>
CRT_RED<20>
CRT_HSYNC CRT_HSYNC_R
R672 976_0402_1%~D
CRT_VSYNC CRT_VSYNC_R
BIA_PWM
PANEL_BKEN_MCH
LDDC_CLK_MCH
LDDC_DATA_MCH
ENVDD<19>
12
ENVDD
L_IBG
LCD_ACLK-_MCH
LCD_ACLK+_MCH
LCD_BCLK-_MCH
LCD_BCLK+_MCH
LCD_A0-_MCH
LCD_A1-_MCH
LCD_A2-_MCH
LCD_A0+_MCH
LCD_A1+_MCH
LCD_A2+_MCH
LCD_B0-_MCH
LCD_B1-_MCH
LCD_B2-_MCH
LCD_B0+_MCH
LCD_B1+_MCH
LCD_B2+_MCH
75_0402_5%~D
75_0402_5%~D
R1116
12
R1115
CRT_BLU
CRT_GRN
CRT_RED
G_CLK_DDC2
G_DAT_DDC2
1 2
R480 30_0402_1%~D
CRT_IREF
12
1 2
R673 30_0402_1%~D
L32
G32
M32
M33
K33
J33
M29
C44
B43
E37
E38
C41
C40
B37
A37
H47
E46
G40
A40
H48
D45
F40
B40
A41
H38
G37
J37
B42
G38
F37
K37
F25
H25
K25
H24
C31
E32
E28
G28
J28
G29
H32
J32
J29
E29
L29
L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK
LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3
LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3
LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3
LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3
TVA_DAC
TVB_DAC
TVC_DAC
TV_RTN
TV_DCONSEL_0
TV_DCONSEL_1
CRT_BLUE
CRT_GREEN
CRT_RED
CRT_IRTN
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC
4
PEG_COMPI
PEG_COMPO
PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
LVDS
TV
VGA
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15
PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15
PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PCI-EXPRESS GRAPHICS
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15
CANTIGA ES_FCBGA1329~D
T37
T36
H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39
H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40
J41
M46
M47
M40
M42
R48
N38
T40
U37
U40
Y40
AA46
AA37
AA40
AD43
AC46
J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46
+VCC_PEG
1 2
PEGCOMP
DPB_AUX#
DPC_DOCK_AUX#
DPB_AUX
DPB_HPD#
DPC_DOCK_AUX
DPC_DOCK_HPD#
DPB_LANE_N0
DPB_LANE_N1
DPB_LANE_N2
DPB_LANE_N3
DPC_LANE_N0
DPC_LANE_N1
DPC_LANE_N2
DPC_LANE_N3
DPB_LANE_P0
DPB_LANE_P1
DPB_LANE_P2
DPB_LANE_P3
DPC_LANE_P0
DPC_LANE_P1
DPC_LANE_P2
DPC_LANE_P3
3
49.9_0402_1%~D
0.1U_0402_10V7K~D
1
R105
C77
2
DPB_AUX# <21>
DPC_DOCK_AUX# <21>
DPB_AUX <21>
DPB_HPD# <21>
DPC_DOCK_AUX <21>
DPC_DOCK_HPD# <35>
C716 0.1U_0402_10V7K~D
12
C717 0.1U_0402_10V7K~D
12
C718 0.1U_0402_10V7K~D
12
C719 0.1U_0402_10V7K~D
12
C720 0.1U_0402_10V7K~D
12
C721 0.1U_0402_10V7K~D
12
C722 0.1U_0402_10V7K~D
12
C723 0.1U_0402_10V7K~D
12
C724 0.1U_0402_10V7K~D
12
C725 0.1U_0402_10V7K~D
12
C726 0.1U_0402_10V7K~D
12
C727 0.1U_0402_10V7K~D
12
C728 0.1U_0402_10V7K~D
12
C729 0.1U_0402_10V7K~D
12
C730 0.1U_0402_10V7K~D
12
C731 0.1U_0402_10V7K~D
12
DPB_LANE_N0_C <21>
DPB_LANE_N1_C <21>
DPB_LANE_N2_C <21>
DPB_LANE_N3_C <21>
DPC_LANE_N0_C <35>
DPC_LANE_N1_C <35>
DPC_LANE_N2_C <35>
DPC_LANE_N3_C <35>
DPB_LANE_P0_C <21>
DPB_LANE_P1_C <21>
DPB_LANE_P2_C <21>
DPB_LANE_P3_C <21>
DPC_LANE_P0_C <35>
DPC_LANE_P1_C <35>
DPC_LANE_P2_C <35>
DPC_LANE_P3_C <35>
2
CFG5 DMI X2 Select
iTPM Host
CFG6
Interface
Management
CFG7
Engine Crypto
Strap
PCI Express
CFG9
Graphic Lane
FSB Dynamic
CFG16
ODT
CFG19
DMI Lane
Reversal
SDVO/PCIE
CFG20
Concurrent
Operation
SDVO_CRTL_DATA
DDPC_CTRLDATA
DDPC_CTRLDATA<10,21>
Strap Pin Table
Low = DMI x 2
High = DMI x 4 (Default)
Low = iTPM enable
High = iTPM disable(Defult)
Low = TLS cipher s u i t e wit h n o c onfidentiality
High = TLS cip h e r s u i t e with
confidentiality(Default)
Low = Reverse Lane
High = Normal O p e r a t i o n(Default)
Low=Dynamic O D T Disable
High=Dynamic ODT Enable(default)
Low=Normal (default)
High=Lane Reversed
Low=Only SDVO or PCIEx1 is
operational (default)
High=SDVO and P C I E x 1 a r e o p e rating
simultaneously via PEG port
Low=No SDVO Device Present
(default)
High=SDVO Dev i ce Present
Low=DisplayPort disabled (default)
High=DisplayPort device present
R106 2.21K_0402_1%~D@
CFG5<10>
CFG6<10>
CFG7<10>
CFG9<10>
CFG16<10>
CFG19<10>
CFG20<10>
1 2
R107 2.21K_0402_1%~D@
1 2
R108 2.21K_0402_1%~D@
1 2
R109 2.21K_0402_1%~D@
1 2
R110 2.21K_0402_1%~D@
1 2
CFG[5:16] have internal pullup
R111 4.02K_0402_1%~D@
R112 4.02K_0402_1%~D@
R113 4.02K_0402_1%~D@
1 2
1 2
1 2
+3.3V_RUN
CFG[19:20] have internal pulldown
1
+3.3V_RUN
R675
2.2K_0402_5%~D
5
CRT_BLU
CRT_GRN
CRT_RED
ENVDD
G_DAT_DDC2 DAT_DDC2
1 2
R679 150_0402_1%~D
1 2
R680 150_0402_1%~D
1 2
R681 150_0402_1%~D
1 2
A A
R682 100K_0402_5%~D
NO CONNECT FOR DISCRETE
12
12
R676
2.2K_0402_5%~D
1 2
R860
@
0_0402_5%~D
+3.3V_RUN
2
5
4
1 2
R861
@
0_0402_5%~D
4
CLK_DDC2G_ C LK_DDC2
61
Q123A
2N7002DW-7-F_SOT363-6~D
Q123B
2N7002DW-7-F_SOT363-6~D
3
CLK_DDC2 <20>
DAT_DDC2 <20>
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Cantiga(3 of 6)
LA-3801P
12 66T h u r s da y, June 12, 2008
1
of
0.8
Page 13
5
220U_D2_4VY_R15M~D
1
C109
2
4.7U_0603_6.3V6M~D
1
1
C115
2
2
+VCC_AXF
12
1
2
+VCC_TX_LVDS
C136
+VCC_PEG
+VCC_DMI
1
2
0.47U_0402_10V4Z~D
C142
C143
1
2
C147
10U_0805_4VAM~D
+1.05V_VCCP
0.47U_0402_10V4Z~D
C110
2.2U_0603_10V7K~D
C116
10U_0805_4VAM~D
@
1
C125
2
+1.8V_SM_CK
0.1U_0402_16V4Z~D
C137
GMCH_VTTLF1
GMCH_VTTLF2
GMCH_VTTLF3
0.47U_0402_10V4Z~D
1
2
12
12
1U_0603_10V4Z~D
C144
CRB 270uF
1
+
2
D D
4.7U_0603_6.3V6M~D
1
C114
2
+1.05V_M
C C
R118
0_1210_5%~D
+3.3V_RUN
1 2
R1076 0_0603_5%~D
0.1U_0402_16V4Z~D
1
B B
A A
2
0.47U_0402_10V4Z~D
1
2
+1.8V_MEM +1.8V_SM_CK
L7
LQM21FN1R0 N 0 0 _0805~D
Rdc=0.1~0.2,rated
current=220mA(MAX)
U2H
U13
VTT_1
T13
VTT_2
U12
VTT_3
T12
VTT_4
U11
VTT_5
T11
VTT_6
U10
VTT_7
T10
VTT_8
U9
VTT_9
T9
VTT_10
U8
VTT_11
T8
VTT_12
U7
VTT_13
T7
VTT_14
U6
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VTT
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1
POWER
C126
B22
VCC_AXF_1
B21
VCC_AXF_2
A21
VCC_AXF_3
BF21
VCC_SM_CK_1
BH20
VCC_SM_CK_2
BG20
VCC_SM_CK_3
BF20
VCC_SM_CK_4
K47
VCC_TX_LVDS
C35
VCC_HV_1
B35
VCC_HV_2
A35
VCC_HV_3
V48
VCC_PEG_1
U48
VCC_PEG_2
V47
VCC_PEG_3
U47
VCC_PEG_4
U46
VCC_PEG_5
AH48
VCC_DMI_1
AF48
VCC_DMI_2
AH47
VCC_DMI_3
AG47
VCC_DMI_4
A8
VTTLF1
L1
VTTLF2
AB2
VTTLF3
L47
HK1608R10J-T_0603~D
1_0603_5%~D
12
R121
5
AXF
SM CK
HV
PEG
DMI
VTTLF
12
0.1U_0402_16V4Z~D
1
C146
2
VCCA_CRT_DAC_1
VCCA_CRT_DAC_2
VCCA_DAC_BG
VSSA_DAC_BG
CRTPLLA PEGA SM
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
VCCA_LVDS
VSSA_LVDS
VCCA_PEG_BG
A LVDS
VCCA_PEG_PLL
VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5
VCCA_SM_6
VCCA_SM_7
VCCA_SM_8
VCCA_SM_9
VCCA_SM_CK_1
VCCA_SM_CK_2
VCCA_SM_CK_3
VCCA_SM_CK_4
VCCA_SM_CK_5
VCCA_SM_CK_NCTF_1
VCCA_SM_CK_NCTF_2
VCCA_SM_CK_NCTF_3
VCCA_SM_CK_NCTF_4
VCCA_SM_CK_NCTF_5
A CK
VCCA_SM_CK_NCTF_6
VCCA_SM_CK_NCTF_7
VCCA_SM_CK_NCTF_8
VCCA_TV_DAC_1
VCCA_TV_DAC_2
TV
HDA
VCCD_TVDAC
VCCD_QDAC
VCCD_HPLL
VCCD_PEG_PLL
D TV/CRT
VCCD_LVDS_1
VCCD_LVDS_2
LVDS
CANTIGA ES_FCBGA1329~D
+VCC_TX_LVDS+1.8V_MEM
1
2
1000P_0402_50V7K~D
C744
22U_0805_6.3V6M~D
1
C745
2
118.8mA Max.
VCC_HDA
4
+3.3V_CRT_DAC
B27
A26
A25
B25
F47
+1.05V_M_DPLLA
L48
+1.05V_M_DPLLB
AD1
+1.05V_M_HPLL
AE1
+1.05V_M_MPLL
+VCC_TX_LVDS
J48
J47
+VCCA_PEG_BG
AD48
AA48
+1.05V_M_PEGPLL
AR20
AP20
AN20
AR17
AP17
AN17
AT16
AR16
AP16
+1.05V_M_SM_CK
AP28
AN28
AP25
AN25
AN24
AM28
AM26
AM25
AL25
AM24
AL24
AM23
AL23
B24
A24
A32
M25
L28
AF1
AA47
M38
L37
1U_0603_10V4Z~D
1
2
2 1
D1
@
RB751V_SOD323-2~D
Follow CRB to
VCC_HV(C35,B35,A35)
4
+1.8V_MEM
C743
1U_0603_10V4Z~D
1
C121
2
0.1U_0402_16V4Z~D
1
C127
2
+1.5V_RUN
+1.05V_M_PEGPLL
VCC_HV
+3.3V_CRT_DAC
0.01U_0402_25V7K~D
1
2
1 2
R778 0_0402_5%~D
1 2
@
R779 0_0402_5%~D
1
C117
0.1U_0402_16V4Z~D
2
+1.05V_M_A_SM
4.7U_0603_6.3V6M~D
1
1
C122
2
2
22U_0805_6.3V6M~D
1
1
C128
2
2
0.1U_0402_16V4Z~D
1
C998
2
0.1U_0402_16V4Z~D
1
C141
2
1 2
R122
@
10_0603_5%~D
3
0.01U_0402_25V7K~D
1
0.1U_0402_16V4Z~D
1
C735
C734
2
R116
1 2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
0_0805_5%~D
@
1
C123
C124
2
1 2
2.2U_0603_6.3V6K~D
R119 0_1210_5%~D
@
C129
+1.5V_RUN_QDAC +1.5V_RUN
0.01U_0402_25V7K~D
1
C737
2
+1.05V_M
0.1U_0402_16V4Z~D
1
2
220U_D2_4VY_R15M~D
+3.3V_RUN+1.05V_VCCP
1
C732
2
2
+1.5V_RUN
+3.3V_RUN
+1.05V_M
100U_D2E_6.3VM_R15M~D
1
+
C120
2
+1.05V_M
0.1U_0402_16V4Z~D
L44
BLM18PG181SN1_0603~D
1
C738
2
C140
+VCC_DMI
@
C145
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
L43
0.1U_0402_16V4Z~D
BLM18PG181SN1_0603~D
C733
+VCC_TX_LVDS
1000P_0402_50V7K~D
1
C736
2
12
@
L6
1
LBC2518T91NM_1210~D
+
2
3
2
+3.3V_RUN+3.3V_CRT_DAC
12
12
PJP1
@
PAD-OPEN1x1m
12
+VCC_PEG
220U_D2_4VY_R15M~D
4.7U_0603_6.3V6M~D
1
+
2
+1.05V_M
10U_0805_4VAM~D
+1.05V_M_HPLL
+1.05V_M_DPLLA +1.05V_M_DPLLB
64.8mA Max. 64.8mA Max.
+VCC_PEG
+1.05V_M
1
1
C111
C112
2
2
L3
BLM21PG221SN1D_0805~D
1 2
C118
12
R117
0.1U_0402_16V4Z~D
4.7U_0603_6.3V6M~D
1
1
C130
2
2
220U_D2_4VY_R15M~D
0.1U_0402_16V4Z~D
1
1
+
C741
2
2
1 2
R114
22U_0805_6.3V6M~D
0_1210_5%~D
1 2
@
R115
C113
0_1210_5%~D
+1.05V_M_PEGPLL
1_0402_5%~D
+1.05V_M +1.05V_M
L4
12
BLM18AG121SN1D_0603~D
C131
L45
12
10UH_LB2012T100MR_20%_0805~D
C739
2
+1.05V_M
+1.05V_VCCP
Follow ERB,CRB option
to select +1.05V_M or
+1.05V_VCCP
0.1U_0402_16V4Z~D
1
C119
2
1
+1.05V_M_MPLL
139.2mA Max.24mA Max.
0.1U_0402_16V4Z~D
L5
LQH32CNR15M33L_1210~D
R120
1
C132
0_0603_5%~D
1 2
2
1
C133
22U_0805_6.3VAM~D
2
10UH_LB2012T100MR_20%_0805~D
0.1U_0402_16V4Z~D
220U_D2_4VY_R15M~D
1
1
+
C742
2
2
12
+1.05V_M+1.05V_M
L46
12
C740
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Cantiga(4 of 6)
LA-3801P
13 66T h u r s da y, June 12, 2008
1
of
0.8
Page 14
5
4
3
2
1
AP33
AN33
BH32
BG32
BF32
BD32
BC32
BB32
BA32
AY32
AW32
AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29
AW29
AV29
AU29
AT29
AR29
AP29
BA36
BB24
BD16
BB21
AW16
AW13
AT13
AE25
AB25
AA25
AE24
AC24
AA24
AE23
AC23
AB23
AA23
AJ21
AG21
AE21
AC21
AA21
AH20
AF20
AE20
AC20
AB20
AA20
AM15
AL15
AE15
AJ15
AH15
AG15
AF15
AB15
AA15
AN14
AM14
AJ14
AH14
Y26
Y24
Y21
T17
T16
Y15
V15
U15
U14
T14
U2G
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36/NC
VCC_SM_37/NC
VCC_SM_38/NC
VCC_SM_39/NC
VCC_SM_40/NC
VCC_SM_41/NC
VCC_SM_42/NC
VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC_AXG_35
VCC_AXG_36
VCC_AXG_37
VCC_AXG_38
VCC_AXG_39
VCC_AXG_40
VCC_AXG_41
VCC_AXG_42
VCC_AXG_SENSE
VSS_AXG_SENSE
POWER
VCC SMVCC GFX
VCC GFX NCTF
VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7
VCC SM LF
+VCC_GFXCORE
W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16
AV44
BA37
AM40
AV21
AY5
AM10
BB13
VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7
330U_D2_2.5VY_R15M
330U_D2_2.5VY_R15M
@
@
Layout Note:
1
1
+
2
1
2
0.1U_0402_10V7K~D
1
2
C747
C746
+
Place close to GMCH
2
1U_0603_10V4Z~D
0.47U_0402_16V4Z~D
1
C749
C748
2
Layout Note: Inside GMCH
cavity for VCC_AXG.
0.1U_0402_10V7K~D
C157
C158
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
1
C750
2
2
0.22U_0402_10V4Z~D
0.22U_0402_10V4Z~D
C159
C160
1
1
2
2
C751
10U_0805_10V4Z~D
22U_0805_6.3VAM~D
1
1
C752
C753
2
2
0.47U_0402_10V4Z~D
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
C161
C162
1
2
C163
1
1
2
2
+1.8V_MEM
+1.05V_M
D D
CRB 270uF
220U_D2_4VY_R15M~D
1
C152
+
2
Layout Note:
Place close to GMCH
C C
Layout Note:
Inside GMCH cavity.
B B
A A
0.22U_0402_10V4Z~D
22U_0805_6.3VAM~D
C153
1
1
C154
2
2
0.1U_0402_10V7K~D
0.22U_0402_10V4Z~D
C156
C155
1
1
2
2
1 2
R123
0_0402_5%~D
AG34
AC34
AB34
AA34
U34
AM33
AK33
AJ33
AG33
AF33
AE33
AC33
AA33
W33
U33
AH28
AF28
AC28
AA28
AJ26
AG26
AE26
AC26
AH25
AG25
AF25
AG24
AJ23
AH23
AF23
U2F
VCC_1
VCC_2
VCC_3
VCC_4
Y34
VCC_5
V34
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
Y33
VCC_16
VCC_17
V33
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
T32
VCC_35
VCC CORE
POWER
VCC NCTF
CANTIGA ES_FCBGA1329~D
VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44
AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23
+1.05V_M
Layout Note:
Place close to GMCH
0.1U_0402_10V7K~D
2
C149
1
330U_D2_2.5VY_R15M
1
C148
+
2
Layout Note:
Place on the edge
VCC_AXG_SENSE<49>
VSS_AXG_SENSE<49>
22U_0805_6.3V6M~D
1
1
C150
2
2
+VCC_GFXCORE
VCC_AXG_SENSE
VSS_AXG_SENSE
22U_0805_6.3V6M~D
C151
CANTIGA ES_FCBGA1329~D
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Cantiga(5 of 6)
LA-3801P
14 66T h u r s da y, June 12, 2008
1
of
0.8
Page 15
5
4
3
2
1
U2I
AU48
VSS_1
AR48
VSS_2
AL48
VSS_3
BB47
VSS_4
AW47
VSS_5
AN47
VSS_6
AJ47
VSS_7
AF47
VSS_8
AD47
D D
C C
B B
A A
AB47
BD46
BA46
AY46
AV46
AR46
AM46
BF44
AH44
AD44
AA44
M44
BC43
AV43
AU43
AM43
BG42
AY42
AT42
AN42
AJ42
AE42
BD41
AU41
AM41
AH41
AD41
AA41
M41
BG40
BB40
AV40
AN40
AT39
AM39
AJ39
AE39
BH38
BC38
BA38
AU38
AH38
AD38
AA38
BF37
BB37
AW37
AT37
AN37
AJ37
BG36
BD36
AK15
AU36
VSS_9
VSS_10
Y47
VSS_11
T47
VSS_12
N47
VSS_13
L47
VSS_14
G47
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
V46
VSS_22
R46
VSS_23
P46
VSS_24
H46
VSS_25
F46
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
Y44
VSS_31
U44
VSS_32
T44
VSS_33
VSS_34
F44
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
J43
VSS_40
C43
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
N42
VSS_48
L42
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
Y41
VSS_56
U41
VSS_57
T41
VSS_58
VSS_59
G41
VSS_60
B41
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
H40
VSS_66
E40
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
N39
VSS_72
L39
VSS_73
B39
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
Y38
VSS_82
U38
VSS_83
T38
VSS_84
J38
VSS_85
F38
VSS_86
C38
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
H37
VSS_94
C37
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS
CANTIGA ES_FCBGA1329~D
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23
AJ6
BG21
AW21
AU21
AP21
AN21
AH21
AF21
AB21
BC20
BA20
AW20
AT20
AJ20
AG20
BG19
BG17
BC17
AW17
AT17
BA16
AU16
AN16
BG15
AC15
W15
BG14
AA14
BG13
BC13
BA13
AN13
AJ13
AE13
BF12
AV12
AT12
AM12
AA12
BD11
BB11
AY11
AN11
AH11
BG10
AV10
AT10
AJ10
AE10
AA10
AM9
U2J
VSS_199
L12
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
R21
VSS_208
M21
VSS_209
J21
VSS_210
G21
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
Y20
VSS_218
N20
VSS_219
K20
VSS_220
F20
VSS_221
C20
VSS_222
A20
VSS_223
VSS_224
A18
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
R17
M17
H17
C17
N16
K16
G16
E16
A15
C14
N13
L13
G13
E13
J12
A12
Y11
N11
G11
C11
M10
BF9
BC9
AN9
AD9
G9
B9
BH8
BB8
AV8
AT8
VSS_230
VSS_231
VSS_232
VSS_233
VSS_235
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS NCTF
VSS_NCTF_15
VSS_NCTF_16
VSS SCB
NC
CANTIGA ES_FCBGA1329~D
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_SCB_1
VSS_SCB_2
VSS_SCB_3
VSS_SCB_4
VSS_SCB_5
NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_42
AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4
BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1
U24
U28
U25
U29
AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17
BH48
BH1
A48
C1
A3
E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Cantiga(6 of 6)
LA-3801P
15 66T h u r s da y, June 12, 2008
1
0.8
of
Page 16
5
DDR_A_DQS#[0..7]<11>
DDR_A_D[0..63]<11>
DDR_A_DM[0..7]<11>
DDR_A_DQS[0..7]<11>
DDR_A_MA[0..14]<11>
D D
+1.8V_MEM
2.2U_0603_6.3V6K~D
C166
1
2
0.1U_0402_16V4Z~D
C C
+0.9V_DDR_VTT
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
B B
A A
1
1
2
2
C176
C175
DDR_A_MA3
DDR_A_MA1
56_0404_4P2R_5%~D
DDR_A_BS0
DDR_A_MA10
56_0404_4P2R_5%~D
DDR_CS0_DIMMA#
DDR_A_RAS#
56_0404_4P2R_5%~D
DDR_A_CAS#
DDR_A_WE#
56_0404_4P2R_5%~D
DDR_CS1_DIMMA#
M_ODT1
56_0404_4P2R_5%~D
DDR_CKE1_DIMMA
DDR_CKE0_DIMMA
DDR_A_BS2
56_0404_4P2R_5%~D
0.1U_0402_16V4Z~D
1
2
C177
5
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
C167
1
2
0.1U_0402_16V4Z~D
C171
1
2
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V_DDR_VTT
0.1U_0402_16V4Z~D
1
2
C178
RN1
1 4
2 3
RN3
1 4
2 3
RN5
1 4
2 3
RN7
1 4
2 3
RN9
1 4
2 3
R130
56_0402_5%~D
RN12
2 3
1 4
C168
1
2
0.1U_0402_16V4Z~D
C172
1
2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
2
C179
+0.9V_DDR_VTT
12
2.2U_0603_6.3V6K~D
1
2
C173
1
2
0.1U_0402_16V4Z~D
1
2
C180
RN2
RN4
RN6
RN8
RN10
RN11
RN13
2.2U_0603_6.3V6K~D
C169
0.1U_0402_16V4Z~D
1
2
1
2
C181
14
23
56_0404_4P2R_5%~D
14
23
56_0404_4P2R_5%~D
14
23
56_0404_4P2R_5%~D
14
23
56_0404_4P2R_5%~D
14
23
56_0404_4P2R_5%~D
14
23
56_0404_4P2R_5%~D
14
23
56_0404_4P2R_5%~D
Layout Note:
Place near JDIMMA
C170
1
2
C174
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
2
2
C182
DDR_A_MA12
DDR_A_MA8
DDR_A_MA6
DDR_A_MA7
DDR_A_MA5
DDR_A_MA9
DDR_A_MA2
DDR_A_MA4
DDR_A_BS1
DDR_A_MA0
DDR_A_MA13
M_ODT0
DDR_A_MA11
DDR_A_MA14
0.1U_0402_16V4Z~D
1
2
C184
C183
4
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
2
2
C186
C185
Layout Note:
Place these resistor
closely DIMMA,all
trace length<750 mil
Layout Note:
Place these resistor
closely DIMMA,all
trace length
Max=1.3"
4
3
+1.8V_MEM +1.8V_MEM +V_DDR_MCH_REF
JDIMMA
1
VREF
3
DDR_A_D0
DDR_A_D1
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D11
DDR_A_D16
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D24
DDR_A_D25
DDR_A_DM3
DDR_A_D26 DDR_A_D30
DDR_A_D27
DDR_CKE0_DIMMA<10>
DDR_A_BS2<11>
DDR_A_BS0<11>
DDR_A_WE#<11>
DDR_A_CAS#<11>
DDR_CS1_DIMMA#<10>
M_ODT1<10>
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
2
2
C188
C187
MEM_SDATA<17,24>
MEM_SCLK<17,24>
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
DDR_CKE0_DIMMA
DDR_A_BS2
DDR_A_MA12
DDR_A_MA9 DDR_A_MA7
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
DDR_CS1_DIMMA#
M_ODT1
DDR_A_D32
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D35
DDR_A_D40
DDR_A_D41
DDR_A_DM5
DDR_A_D42
DDR_A_D43
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51 DDR_A_D55
DDR_A_D57
DDR_A_DM7
DDR_A_D58
DDR_A_D59
MEM_SDATA
MEM_SCLK
+3.3V_M
2.2U_0603_6.3V6K~D
0.1U_0402_16V4Z~D
C190
C189
1
1
2
2
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
201
GND1
TYCO_1-1734074-1~D
REVERSE
NC/CKE1
DIMMA
DQ12
DQ13
CK0#
DQ14
DQ15
DQ20
DQ21
DQ22
DQ23
DQ28
DQ29
DQS3#
DQS3
DQ30
DQ31
NC/A15
NC/A14
RAS#
ODT0
NC/A13
DQ36
DQ37
DQ38
DQ39
DQ44
DQ45
DQS5#
DQS5
DQ46
DQ47
DQ52
DQ53
CK1#
DQ54
DQ55
DQ60
DQ61
DQS7#
DQS7
DQ62
DQ63
GND2
2
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
VSS
DM1
VSS
VSS
VSS
VSS
VSS
DM2
VSS
VSS
VSS
VSS
VSS
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
DM4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DM6
VSS
VSS
VSS
VSS
VSS
SAO
2
1
+V_DDR_MCH_REF
2
DDR_A_D4
4
DDR_A_D5
6
8
DDR_A_DM0
10
12
DDR_A_D6
14
DDR_A_D7
16
18
DDR_A_D12
20
DDR_A_D13
22
24
DDR_A_DM1
26
28
M_CLK_DDR0
30
CK0
NC
A11
A7
A6
A4
A2
A0
BA1
S0#
NC
CK1
SA1
M_CLK_DDR#0
32
34
DDR_A_D14DDR_A_D10
36
DDR_A_D15
38
40
42
DDR_A_D20
44
DDR_A_D21DDR_A_D17
46
48
50
DDR_A_DM2
52
54
DDR_A_D22
56
DDR_A_D23DDR_A_D19
58
60
DDR_A_D28
62
DDR_A_D29
64
66
DDR_A_DQS#3
68
DDR_A_DQS3
70
72
74
DDR_A_D31
76
78
DDR_CKE1_DIMMA
80
82
84
DDR_A_MA14
86
88
DDR_A_MA11
90
92
DDR_A_MA6
94
96
DDR_A_MA4
98
DDR_A_MA2
100
DDR_A_MA0
102
104
DDR_A_BS1
106
DDR_A_RAS#
108
DDR_CS0_DIMMA#
110
112
M_ODT0
114
DDR_A_MA13
116
118
120
122
DDR_A_D36
124
DDR_A_D37
126
128
DDR_A_DM4
130
132
DDR_A_D38
134
DDR_A_D39
136
138
DDR_A_D44
140
DDR_A_D45
142
144
DDR_A_DQS#5
146
DDR_A_DQS5
148
150
DDR_A_D46
152
DDR_A_D47
154
156
DDR_A_D52DDR_A_D48
158
DDR_A_D53
160
162
M_CLK_DDR1
164
M_CLK_DDR#1
166
168
DDR_A_DM6
170
172
DDR_A_D54
174
176
178
DDR_A_D60DDR_A_D56
180
DDR_A_D61
182
184
DDR_A_DQS#7
186
DDR_A_DQS7
188
190
DDR_A_D62
192
DDR_A_D63
194
196
R128 10K_0402_5%~D
198
200
202
1 2
R129 10K_0402_5%~D
1 2
2.2U_0603_6.3V6K~D
0.1U_0402_16V4Z~D
1
C164
2
M_CLK_DDR0 <10>
M_CLK_DDR#0 <10>
DDR_CKE1_DIMMA <10>
DDR_A_BS1 <11>
DDR_A_RAS# <11>
DDR_CS0_DIMMA# <10>
M_ODT0 <10>
M_CLK_DDR1 <10>
M_CLK_DDR#1 <10>
1
C165
2
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
DDRII-SODIMM SLOT1
LA-3801P
16 66T h u r s da y, June 12, 2008
1
0.8
of
Page 17
5
DDR_B_DQS#[0..7]<11>
DDR_B_D[0..63]<11>
DDR_B_DM[0..7]<11>
DDR_B_DQS[0..7]<11>
DDR_B_MA[0..14]<11>
D D
C C
B B
A A
+1.8V_MEM
+0.9V_DDR_VTT
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
2
C202
DDR_B_MA3
DDR_B_MA1
56_0404_4P2R_5%~D
DDR_B_BS0
DDR_B_MA10
56_0404_4P2R_5%~D
DDR_B_BS1
DDR_B_MA0
56_0404_4P2R_5%~D
DDR_B_RAS#
DDR_CS2_DIMMB#
56_0404_4P2R_5%~D
DDR_B_WE#
DDR_B_CAS#
56_0404_4P2R_5%~D
DDR_CKE3_DIMMB
DDR_CS3_DIMMB#
M_ODT3
56_0404_4P2R_5%~D
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
C193
C194
1
1
2
2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C198
1
2
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V_DDR_VTT
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
1
2
2
RN14
RN16
RN18
RN20
RN22
RN25
5
2
C204
C205
+0.9V_DDR_VTT
12
C203
1 4
2 3
1 4
2 3
1 4
2 3
1 4
2 3
1 4
2 3
R133
56_0402_5%~D
2 3
1 4
2.2U_0603_6.3V6K~D
1
2
C199
1
2
0.1U_0402_16V4Z~D
1
2
C206
RN15
RN17
RN19
RN21
RN23
RN24
RN26
2.2U_0603_6.3V6K~D
C196
C195
1
2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C200
1
2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
2
C207
DDR_B_MA12
14
DDR_B_BS2
23
56_0404_4P2R_5%~D
DDR_B_MA14
14
DDR_B_MA11
23
56_0404_4P2R_5%~D
DDR_B_MA5
14
DDR_B_MA8
23
56_0404_4P2R_5%~D
DDR_B_MA7
14
DDR_B_MA6
23
56_0404_4P2R_5%~D
DDR_B_MA4
14
DDR_B_MA2
23
56_0404_4P2R_5%~D
M_ODT2
14
DDR_B_MA13
23
56_0404_4P2R_5%~D
DDR_B_MA9
14
DDR_CKE2_DIMMB
23
56_0404_4P2R_5%~D
Layout Note:
Place near JDIMMB
2.2U_0603_6.3V6K~D
C197
1
2
C201
1
2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
2
2
C208
C209
0.1U_0402_16V4Z~D
1
2
C210
4
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
2
C211
Layout Note:
Place these resistor
closely DIMMB,all
trace length<750 mil
Layout Note:
Place these resistor
closely DIMMB,all
trace length
Max=1.3"
0.1U_0402_16V4Z~D
1
1
2
2
C213
C212
4
3
JDIMMB
1
VREF
3
C216
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
201
GND1
TYCO_2-1734072-2~D
DIMMB
STANDARD
DDR_B_D0 DDR_B_D5
DDR_B_D1
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11
DDR_B_D16 DDR_B_D20
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
DDR_B_DM3
DDR_B_D26
DDR_B_D27
DDR_CKE2_DIMMB<10>
DDR_B_BS2<11>
DDR_B_BS0<11>
DDR_B_WE#<11>
DDR_B_CAS#<11>
DDR_CS3_DIMMB#<10>
MEM_SDATA<16,24>
MEM_SCLK<16,24>
M_ODT3<10>
+3.3V_M
1
2
C214
DDR_CKE2_DIMMB
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
DDR_B_MA10
DDR_B_BS0 DDR_B_RAS#
DDR_B_WE#
DDR_B_CAS#
DDR_CS3_DIMMB#
M_ODT3
DDR_B_D32
DDR_B_D33
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_DM5
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57
DDR_B_DM7
DDR_B_D58
DDR_B_D59
MEM_SDATA
MEM_SCLK
2.2U_0603_6.3V6K~D
0.1U_0402_16V4Z~D
C215
1
1
2
2
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
VDD
VDD
RAS#
VDD
ODT0
NC/A13
VDD
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
GND2
NC
A11
A7
A6
A4
A2
A0
BA1
S0#
NC
SA1
2
+1.8V_MEM+1.8V_MEM +V_DDR_MCH_REF
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
+V_DDR_MCH_REF
DDR_B_D4
DDR_B_DM0
DDR_B_D6
DDR_B_D7
DDR_B_D12
DDR_B_D13
DDR_B_DM1
M_CLK_DDR2
M_CLK_DDR#2
DDR_B_D14
DDR_B_D15
DDR_B_D21
DDR_B_DM2
DDR_B_D22
DDR_B_D23
DDR_B_D28
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D30
DDR_B_D31
DDR_CKE3_DIMMB
DDR_B_MA14
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
DDR_B_BS1
DDR_CS2_DIMMB#
M_ODT2
DDR_B_MA13
DDR_B_D36
DDR_B_D37
DDR_B_DM4
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
M_CLK_DDR3
M_CLK_DDR#3
DDR_B_DM6
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
10K_0402_5%~D
12
R132
2.2U_0603_6.3V6K~D
M_CLK_DDR2 <10>
M_CLK_DDR#2 <10>
DDR_CKE3_DIMMB <10>
DDR_B_BS1 <11>
DDR_B_RAS# <11>
DDR_CS2_DIMMB# <10>
M_ODT2 <10>
M_CLK_DDR3 <10>
M_CLK_DDR#3 <10>
R131
10K_0402_5%~D
1
2
+3.3V_M
12
0.1U_0402_16V4Z~D
C191
1
1
C192
2
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
DDRII-SODIMM SLOT2
LA-3801P
17 66T h u r s da y, June 12, 2008
1
0.8
of
Page 18
5
+3.3V_M
12
R134
8.2K_0402_5%~D
+1.05V_VCCP
R135
D D
H_THERMTRIP#<7>
THERMTRIP_MCH#<10>
2.2K_0402_5%~D
1 2
MMST3904-7-F_SOT323-3~D
+1.05V_VCCP
R138
2.2K_0402_5%~D
1 2
MMST3904-7-F_SOT323-3~D
Q5
Q6
2
B
2
B
C
E
3 1
+3.3V_M
12
C
E
3 1
THERMATRIP1#
1
C218
0.1U_0402_16V4Z~D
2
R137
8.2K_0402_5%~D
THERMATRIP2#
1
C220
0.1U_0402_16V4Z~D
2
RB751S40T1_SOD523-2~D
Place under CPU
C231
C
3 1
1
C225
2
C
3 1
1
+RTC_CELL
C229
0.1U_0402_16V4Z~D
2
1
2
E
E
100P_0402_50V8K~D
C C
H_THERMDA<7>
H_THERMDC<7>
Q9 Place near DIMM
Place C227 close
to Q9
B B
+3.3V_M
1
Place C223 close to the Q8 as possible
Place C224, C225 close to the Guardian pins as possible
470P_0402_50V7K~D
Place C228 close to the Guardian pins as possible
1
C227
@
100P_0402_50V8K~D
2
1 2
R142
0_0603_5%~D
0.1U_0402_16V4Z~D
2
C223
@
Rset=953,Tp=88degree
+3.3V_M
12
R155
8.2K_0402_5%~D
A A
THERMATRIP3#
1
C240
0.1U_0402_16V4Z~D
2
5
4
D2
2 1
19.2
2
B
Q8
MMBT3904WT1G_SC70-3~D
2
B
Q9
MMBT3904WT1G_SC70-3~D
12
R151
953_0402_1%~D
2200P_0402_50V7K~D
R887 0_0603_5%~D
1 2
+5V_RUN
*
4
+3.3V_M
FAN1_DET#<22>
1
C219
2
22U_0805_6.3VAM~D
BC_DAT_EMC4002<38>
BC_CLK_EMC4002<38>
2
C224
2200P_0402_50V7K~D
1
REM_DIODE1_P
REM_DIODE1_N
1
C228
2
1U_0603_10V4Z~D
1
C230
3.3V_M_PWRGD<38,41>
2
ICH_PWRGD#<41>
+3VSUS_THRM
10U_0805_10V4Z~D
0.1U_0402_16V4Z~D
+3.3V_RUN
C235
1
1
C234
2
2
Pull-up Resistor
on ADDR_MODE/XEN
10U_0805_10V4Z~D
0.1U_0402_16V4Z~D
1
1
C236
2
2
EC_32KHZ_OUT<38>
<= 4.7K +/- 5% 2F(r/w)
10K
18K
>= 33K
REM_DIODE3_P
REM_DIODE3_N
+3VSUS_THRM
+RTC_CELL_R
1 2
R146 1K_0402_5%~D
1 2
R148 1K_0402_5%~D
THERMATRIP1#
THERMATRIP2#
THERMATRIP3#
VSET
R150 4.7K_0402_5%~D
+FAN1_VOUT
C237
FAN1_TACH_FB
EC_32KHZ_OUT
For Remote1
mode
2N3904
2N3904
Thermistor
Thermistor
3
12
R136
10K_0402_5%~D
+FAN1_VOUT
FAN1_TACH_FB
12
SMBUS
Address
2E(r/w)
2F(r/w)
2E(r/w)
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
U3
EMC4002
10
11
36
35
38
37
41
40
4
21
18
17
22
23
24
42
3
6
5
9
7
8
15
14
3
JFAN1
1
1
2
2
3
5
3
G1
4
6
4
G2
MOLEX_53398-0471~D
200K_0402_1%~D
SMDATA/BC-LINK_DATA
SMBCLK/BC-LINK_CLK
DP1/VREF_T
DN1/THERM
DP2
DN2
DP3/DN7
DN3/DP7
VCC
ATF_INT#/BC-LINK_IRQ#
RTC_PWR3V
THERMTRIP_SIO/PWM1/GPIO5
VCC_PWRGD
3V_PWROK#
THERMTRIP1#
THERMTRIP2#
THERMTRIP3#
VSET
ADDR_MODE/XEN
VDD_5V
VDD_5V
VDD_3V
FAN_OUT
FAN_OUT
TACH1/GPIO3
CLK_IN/GPIO2
LDO_OUT/FAN_OUT2
LDO_OUT/FAN_OUT2
VSS
49
R930
0_0402_5%~D
12
R997
39
VIN1
48
VCP1
45
VCP2
44
DP4/DN8
43
DN4/DP8
47
DP5/DN9
46
DN5/DP9
DN6/VIN2
LDO_POK
LDO_SET
1
2
12
26
27
20
25
19
34
33
32
31
28
29
30
16
13
4
R1014 0_0402_5%~D@
R1015 0_0402_5%~D@
DP6/VREF_T2
POWER_SW#
ACAVAIL_CLR
SYS_SHDN#
LDO_SHDN#
VDDH/VDD_5V2
VDDH/VDD_5V2
VDDL/VDD_3V2
TACH2/GPIO4
PWM2/GPIO1
74AHC1G08GW_SOT353-5~D
POWER_SW#
R998
1 2
12
4.7K_0402_5%~D
Place C221 close to the
Guardian pins as possible.
REM_DIODE4_P
REM_DIODE4_N
12
R141 10K_0402_5%~D
POWER_SW#
12
R149 10K_0402_5%~D
12
R211 10K_0402_5%~D@
LDO_SET
+3V_LDOIN
R926
0_0402_5%~D
+RTC_CELL
0.1U_0402_16V4Z~D
5
P
IN1
O
IN2
G
3
1 2
1 2
1 2
1
2
U68
2
PWR_MON_GFX <49>
PWR_MON <47>
ISL88731_ICM <48>
1
C221
2
2200P_0402_50V7K~D
THERMISTOR OPTION:
Single-ended ro ut in g t o thermistor is permissible
(ground retu r n ) . Pl a c e R139 and C226 near EMC4002
+3.3V_M
BC_INT#_EMC4002 <38>
ACAV_IN <38,48>
2.5V_RUN_PWRGD <37,41>
+1.8V_RUN
10U_0805_10V6K~D
0.1U_0402_16V4Z~D
1
1
C238
2
2
12
C1050
PM_EXTTS# <10>
R143
0_0402_5%~D
R144
0_0402_5%~D
2
1 2
R139
1.2K_0402_1%~D
+3.3V_SUS
10U_0805_10V4Z~D
1
2
C239
12
12
1
Diode circui t a t DP 4 /DN4 is used for skin
temp sensor (p la ce d o ptimally between CPU,
MCH and MEM).
C
Q7
2
B
MMBT3904WT1G_SC70-3~D
E
3 1
1 2
R140
10KB_0603_1%_TSM1A103F34D3R~D
C226
0.1U_0402_16V4Z~D
1 2
12
R145 10K_0402_5%~D
1 2
R147 47K_0402_1%~D@
At maximum loa d c ur rent of 600mA,the the
voltage drop a c r o ss the should be keep
in the range of 0.5V to 1V
0.1U_0402_16V4Z~D
R152
0.82_1210_1%~D
1
C232
C233
2
DOCK_PWR_SW# <38>
POWER_SW_IN# <38>
+3.3V_M
THERM_STP# <44>
+RTC_CELL
+3.3V_RUN
12
1
C222
@
100P_0402_50V8K~D
2
Place C222 close to Q7 as
possible.
+1.8V_RUN
LDO_SET
Voltage margi ning circuit
for LDO output. Adjustable
from 1.2 to 2.5V.
Ra=((LDO_OUT / 1.12)-1)*Rb.
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
FAN & Thermal Sensor
LA-3801P
1
12
R153
Ra
3.16K_0402_1%~D
12
R154
Rb
5.1K_0402_1%~D
18 66T h u r s da y, June 12, 2008
0.8
of
Page 19
5
4
3
2
1
JLVDS1
59
MGND1
60
MGND2
61
MGND3
62
MGND4
63
MGND5
64
MGND6
65
MGND7
66
MGND8
67
MGND9
68
D D
C C
MGND10
69
MGND11
70
MGND12
71
MGND13
72
MGND14
Diag_Loop_CAM
JAE_FI-DP58SB-VF88L
DATA EEDID
For Webcam
+CAMERA_VDD
B B
100K_0402_5%~D
Webcam PWR CTRL
CCD_OFF<37>
A A
CCD_OFF
Even_ClkIN+
Even_ClkIN-
VSS
Even_Rin2+
Even_Rin2-
VSS
Even_Rin1+
Even_Rin1-
VSS
Even_Rin0+
Even_Rin0-
VSS
Odd_ClkIN+
Odd_ClkIN-
VSS
Odd_Rin2+
Odd_Rin2-
VSS
Odd_Rin1+
Odd_Rin1-
VSS
Odd_Rin0+
Odd_Rin0-
VSS
CLK EEDID
VSS
VEEDID
MIC_CLK
3.3V
MIC_SIG
USB-
USB+
GND
CONNTST
SMB_CLK
SMB_DATA
INV_SRC
INV_SRC
INV_SRC
INV_SRC
VBLVBLVBLVBL-
INV_PWM
+5V_ALW
TEST
VDD
VDD
VDD
CONNTST
PWR_LED
BATT2_LED
BATT1_LED
VSS
0.1U_0402_16V4Z~D
1
2
2
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
5V
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
PMV45EN_SOT23-3~D
10U_1206_16V4Z~D
1
C249
2
+15V_ALW
12
R169
13
D
G
S
LDDC_DATA_MCH
LDDC_CLK_MCH
LVDS_CBL_DET#
CAM_MIC_CBL_DET#
DMIC_CLK
DMIC0
USBP11_D-
USBP11_D+
LCD_SMBCLK
LCD_SMBDAT
LCD_TST
BREATH_BLUE_LED
BATT_YELLOW_LED
BATT_BLUE_LED
Q132
S
G
C250
Q133
2N7002W-7-F_SOT323-3~D
1 2
C246
0.1U_0603_50V4Z~D
D
+CMOS_VDD
13
2
1
C1044
0.1U_0402_25V4K~D
2
LCD_BCLK+_MCH <12>
LCD_BCLK-_MCH <12>
LCD_B2+_MCH <12>
LCD_B2-_MCH <12>
LCD_B1+_MCH <12>
LCD_B1-_MCH <12>
LCD_B0+_MCH <12>
LCD_B0-_MCH <12>
LCD_ACLK+_MCH <12>
LCD_ACLK-_MCH <12>
LCD_A2+_MCH <12>
LCD_A2-_MCH <12>
LCD_A1+_MCH <12>
LCD_A1-_MCH <12>
LCD_A0+_MCH <12>
LCD_A0-_MCH <12>
LDDC_DATA_MCH <12>
LDDC_CLK_MCH <12>
LVDS_CBL_DET# <22>
+3.3V_RUN
CAM_MIC_CBL_DET# <22>
+CAMERA_VDD
LCD_SMBCLK <38>
LCD_SMBDAT <38>
+INV_PWR_SRC
LCD_TST <37>
+LCDVDD
PNL_BKLT_CBL_DET# <22>
BREATH_BLUE_LED <42>
BATT_YELLOW_LED <42>
BATT_BLUE_LED <42>
R170
@
0_0603_5%~D
12
R995
0_0603_5%~D
12
1
C1043
0.1U_0402_16V4Z~D
2
+3.3V_RUN
12
@
10K_0402_5%~D
+3.3V_RUN
+5V_RUN
+3.3V_RUN
D47
@
2 1
R165
SD05.TCT_SOD323-2~D
1 2
R166 0_0402_5%~D
Close to JLVD1.9 Close to JLVD1.6,7,8
1 2
R159 2.2K_0402_5%~D
1 2
R160 2.2K_0402_5%~D
LDDC_CLK_MCH
LDDC_DATA_MCH
Place near to JLVDS1
DMIC_CLK <27>
+3.3V_RUN
DMIC0 <27>
D48
D56
@
@
2 1
2 1
SD05.TCT_SOD323-2~D
SD05.TCT_SOD323-2~D
BIA_PWM <12>
+5V_ALW
1
C245
0.1U_0402_16V4Z~D
2
+3.3V_RUN +LCDVDD
0.1U_0402_16V4Z~D
1
C243
2
0.1U_0402_16V4Z~D
1
C244
2
LCD Power
2N7002DW-T/R7_SOT363-6~D
LCD_VCC_TEST_EN<37>
ENVDD<12>
Dual layout for Q17
Overlap on Q16 for pop option
+PWR_SRC
Q17
SI3457DV-T1_TSOP6~D
D
6
S
4 5
2
1
G
3
PWR_SRC_ON
SI3457DV : P CHANNAL
USBP11-<24>
USBP11+<24>
USBP11+
USBP11_D-
Q13A
D3
3
2
BAT54CW_SOT323~D
1 2
R164 0_0402_5%~D@
+INV_PWR_SRC
L59
@
DLW21SN121SQ2L_4P~D
1
1
4
4
1 2
R457 0_0402_5%~D
1 2
R513 0_0402_5%~D
U50
@
1
GND
2
IO1
PRTR5V0U2X_SOT143-4~D
+LCDVDD
1
IO2
VIN
12
61
2
3
3
4
470_0402_5%~D
R161
2
2
2
3
USBP11_D+
+15V_ALW
I
40mil
1000P_0402_50V7K~D
1
C248
2
+15V_ALW +3.3V_RUN
100K_0402_5%~D
12
R162
5
1
O
Q15
G
DDTC124EUA-7-F_SOT323-3~D
3
+PWR_SRC
12
USBP11_D-USBP11-
USBP11_D+
+CAMERA_VDD
+LCDVDD
12
R158
100K_0402_5%~D
2N7002DW-T/R7_SOT363-6~D
3
12
Q13B
4
R167
100K_0402_5%~D
PWR_SRC_ON
1 2
R168 100K_0402_5%~D
RUN_ON<28,37,40,41>
D
S
4 5
G
SI3456DV-T1-E3_TSOP6~D
3
100K_0402_5%~D
0.1U_0402_25V4Z~D
@
R163
1
C242
2
Q16
@
FDS4435_NL_SO8~D
8
7
1
6
2
5
3
4
D
1 3
6
2
1
Q12
Q18
2N7002W-7-F_SOT323-3~D
S
G
2
1
C241
0.1U_0402_16V4Z~D
2
40mil
1
C247
0.1U_0603_50V4Z~D
2
FDS4435: P CHANNAL
+INV_PWR_SRC
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
LVDS Conn
LA-3801P
19 66T h u r s da y, June 12, 2008
1
0.8
of
Page 20
2
+3.3V_RUN
RED_CRT
GREEN_CRT
BLUE_CRT
12
R172
150_0402_1%~D
B B
DAT_DDC2<12>
CLK_DDC2<12>
CRT_VSYNC<12>
CRT_HSYNC<12>
CRT_RED<12>
CRT_GRN<12>
CRT_BLU<12>
CRT_SWITCH<37>
SEL CRT
0 MB
1 APR/SPR
+3.3V_RUN
DAT_DDC2
CLK_DDC2
CRT_SWITCH
U4
4
VCC
10
VCC
18
VCC
27
VCC
38
VCC
50
VCC
56
VCC
2
A0
3
A1
7
A2
8
A3
11
A4
12
A5
14
A6
15
A7
19
A8
20
A9
17
SEL
1
GND
6
GND
9
GND
13
GND
16
GND
21
GND
24
GND
28
GND
33
GND
39
GND
44
GND
49
GND
53
GND
55
GND
TS3DV520ERHUR_QFN56_11X5~D
12
12
R174
R173
150_0402_1%~D
150_0402_1%~D
48
0B1
47
1B1
43
2B1
42
3B1
37
4B1
36
5B1
32
6B1
31
7B1
22
8B1
23
9B1
46
0B2
45
1B2
41
2B2
40
3B2
35
4B2
34
5B2
30
6B2
29
7B2
25
8B2
26
9B2
52
NC
5
NC
54
NC
51
NC
10P_0402_50V8J~D
10P_0402_50V8J~D
1
1
@
@
C255
2
2
DAT_DDC2_CRT
CLK_DDC2_CRT
VSYNC_BUF
HSYNC_BUF
RED_CRT
GREEN_CRT
BLUE_CRT
DAT_DDC2_DOCK
CLK_DDC2_DOCK
VSYNC_DOCK
HSYNC_DOCK
RED_DOCK
GREEN_DOCK VSYNC_CRT
BLUE_DOCK
10U_0805_10V4Z~D
1
2
10P_0402_50V8J~D
1
@
C256
C257
2
DAT_DDC2_DOCK <35>
CLK_DDC2_DOCK <35>
VSYNC_DOCK <35>
HSYNC_DOCK <35>
RED_DOCK <35>
GREEN_DOCK <35>
BLUE_DOCK <35>
0.1U_0402_16V4Z~D
1
1
C259
C260
2
2
1 2
R1095
0_0402_5%~D
1 2
R1096
0_0402_5%~D
1 2
R1097
0_0402_5%~D
To MB CRT Conn.
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C262
C261
2
10P_0402_50V8J~D
1
2
0.1U_0402_16V4Z~D
1
1
C263
2
2
RED_CRT_L
GREEN_CRT_L
BLUE_CRT_L
10P_0402_50V8J~D
1
1
C390
C518
2
2
To Dock Conn.
+3.3V_RUN
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C264
C265
2
1
2
10P_0402_50V8J~D
C996
0.1U_0402_16V4Z~D
C266
1 2
L61
BLM18BB470SN1D_0603~D
1 2
L62
BLM18BB470SN1D_0603~D
1 2
L63
BLM18BB470SN1D_0603~D
DAT_DDC2_CRT
CLK_DDC2_CRT
HSYNC_CRT
R177 0_0402_5%~D
R178 0_0402_5%~D
2
10P_0402_50V8J~D
1
C251
2
1 2
1 2
1
3
DA204U_SOT323-3~D
@
D5
+5V_RUN_SYNC
HSYNC_L2
VSYNC_L2
DA204U_SOT323-3~D
1
@
D6
2
3
10P_0402_50V8J~D
1
C252
2
2.2K_0402_5%~D
2.2K_0402_5%~D
12
12
R794
L11
BLM11A121S_0603~D
1 2
1 2
L12
BLM11A121S_0603~D
R793
2
10P_0402_50V8J~D
1
C253
2
1K_0402_5%~D
12
@
R175
22P_0402_50V8J~D
1
@
C267
2
1
DA204U_SOT323-3~D
1
@
D7
3
1K_0402_5%~D
12
@
R176
22P_0402_50V8J~D
1
@
C268
2
+5V_RUN
5A_125V_R451005.MRL~D
@
F2
1 2
SDM10U45-7_SOD523-2~D
21
D8
+CRT_VCC
+5V_RUN_CRT
0_1206_5%~D
R171
1 2
R
G
JVGA_HS
B
+CRT_VCC
JVGA_VS
M_ID2#
1
C258
2
0.1U_0402_16V4Z~D
0.01U_0402_16V7K~D
1
C254
2
JCRT1
6
11
1
7
12
2
8
16
13
17
3
9
14
4
10
15
5
SUYIN_070546FR015S558ZR
+5V_RUN
21
D9
SDM10U45-7_SOD523-2~D
C269
0.1U_0402_16V4Z~D
HSYNC_BUF HSYNC_CRT
A A
1 2
C270
0.1U_0402_16V4Z~D
1
5
P
OE#
A2Y
G
U5
SN74AHCT1G125GW_SC70-5~D
3
1
5
P
OE#
A2Y
G
U6
SN74AHCT1G125GW_SC70-5~D
3
+5V_RUN_SYNC
1 2
4
4
1 2
R179 1K_0402_5%~D
VSYNC_CRTVSYNC_BUF
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
2
1
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
CRT/Video switch
LA-3801P
20 66T h u r s da y, June 12, 2008
0.8
of
Page 21
2
SW for MB side SW for E-Docking side
C271
DPB_AUX<12>
DPB_AUX#<12>
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C273
12
12
DPB_AUX_C
U75
2
1A
VCC
2A51B
1
1OE#
7
GND
2OE#
SN74CBTD3306CPWR_TSSOP8~D
+5V_RUN
8
3
6
2B
4
C314
0.1U_0402_16V4Z~D
12
DPB_AUX_SWDPB_AUX#_C
DPB_AUX#_SW
C272
DPC_DOCK_AUX<12>
DPC_DOCK_AUX#<12>
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C274
12
12
DPC_AUX_C
DPC_AUX#_C
SN74CBTD3306CPWR_TSSOP8~D
2
1A
2A51B
1
1OE#
7
2OE#
1
Display port Connector
U77
VCC
GND
+5V_RUN
8
3
6
2B
4
C329
0.1U_0402_16V4Z~D
12
DPC_AUX_DOCK
DPC_AUX#_DOCK
DPC_AUX_DOCK <35>
DPC_AUX#_DOCK <35>
+3.3V_RUN
0_1206_5%~D
21
R210
1 2
D10
@
B0540WS-7_SOD323-2~D
U76
SDVO_CTRLCLK<10>
SDVO_CTRLDATA<10>
B B
+5V_RUN +3.3V_RUN
1U_0603_10V4Z~D
1
1
C1025
2
2
DPB_LANE_P0_C<12>
DPB_LANE_N0_C<12>
DPB_LANE_P1_C<12>
DPB_LANE_N1_C<12>
DPB_LANE_P2_C<12>
DPB_LANE_N2_C<12>
DPB_LANE_P3_C<12>
DPB_LANE_N3_C<12>
+3.3V_RUN
100K_0402_5%~D
R189
DPB_DOCK_HPD<35>
1 2
DPB_DOCK_CA_DET<35>
DP_PRIORITY<37>
A A
12
Pin30
LP
Hi
Low
State
Normal Mode
Low power Mode
2
1A
2A51B
1
1OE#
7
2OE#
SN74CBTD3306CPWR_TSSOP8~D
DPB_CA_DET#
0.1U_0402_10V7K~D
1
1
C1027
2
2
DPB_AUX_SW
DPB_AUX#_SW
DP_MB_HPD_EN
DPB_DOCK_HPD
DPB_MB_CA_DET
DPB_DOCK_CA_DET
DP_PRIORITY
100K_0402_5%~D
R190
1 2
R193
+3.3V_RUN
+5V_RUN
0.01U_0402_16V7K~D
0.1U_0402_10V7K~D
C1026
5.11K_0402_1%~D
VCC
GND
0.001U_0402_25V7K~D
1
C1028
2
Standard operational mode for device
Device is forced into a low power mode
causing the output s to go to a high-Z
state, all other inputs are ignore
+5V_RUN
8
3
6
2B
4
4
NC7SZ04P5X_NL_SC70-5~D
0.1U_0402_10V7K~D
1
C1029
C1030
2
U9
3
ML_IN 0(p)
4
ML_IN 0(n)
6
ML_IN 1(p)
7
ML_IN 1(n)
9
ML_IN 2(p)
10
ML_IN 2(n)
12
ML_IN 3(p)
13
ML_IN 3(n)
36
AUX (p)
35
AUX (n)
40
HPD_A
32
HPD_B
41
CAD_A
33
CAD_B
30
LP
29
Priority
1
DPVadj
38
VDD*1
2
VDD
8
VDD
14
VDD
17
VDD
23
VDD
34
VDD
48
VDD
54
VDD
TS2DP512_QFN56_8X8~D
DescriptionLevel
U8
2
+3.3V_RUN
1
5
P
NC
A2Y
G
3
C1073
0.1U_0402_16V4Z~D
1 2
12
C277
0.1U_0402_16V4Z~D
DPB_CA_DET
ML_A 0(p)
ML_A 0(n)
ML_A 1(p)
ML_A 1(n)
ML_A 2(p)
ML_A 2(n)
ML_A 3(p)
ML_A 3(n)
AUX_A (p)
AUX_A (n)
ML_B 0(p)
ML_B 0(n)
ML_B 1(p)
ML_B 1(n)
ML_B 2(p)
ML_B 2(n)
ML_B 3(p)
ML_B 3(n)
AUX_B (p)
AUX_B (n)
HPD
CAD
GND
GND
GND
GND
GND
GND
GND
GND
Thermal GND
DDPC_CTRLCLK<10>
DDPC_CTRLDATA<10,12>
DPC_CA_DET
1 2
R996 1M_0402_5%~D
R185 1M_0402_5%~D@
R186 100K_0402_5%~D
R187 1M_0402_5%~D@
R188 100K_0402_5%~D
R797 5.1M_0603_1%
DPB_MB_LANE0
56
DPB_MB_LANE0#
55
DPB_MB_LANE1
53
DPB_MB_LANE1#
52
DPB_MB_LANE2 DPB_MB_LANE2_C
50
DPB_MB_LANE2#
49
DPB_MB_LANE3
47
DPB_MB_LANE3#
46
DPB_MB_AUX
45
DPB_MB_AUX#
43
DPB_DOCK_LANE0
25
DPB_DOCK_LANE0#
24
DPB_DOCK_LANE1
22
DPB_DOCK_LANE1#
21
DPB_DOCK_LANE2
19
DPB_DOCK_LANE2#
18
DPB_DOCK_LANE3
16
DPB_DOCK_LANE3#
15
DPB_DOCK_AUX
28
DPB_DOCK_AUX#
26
DPB_HPD_R
37
DPB_CA_DET
39
5
11
20
27
31
42
44
51
57
C278 0.1U_0402_10V7K~D
C279 0.1U_0402_10V7K~D
C280 0.1U_0402_10V7K~D
C281 0.1U_0402_10V7K~D
C282 0.1U_0402_10V7K~D
C283 0.1U_0402_10V7K~D
C284 0.1U_0402_10V7K~D
C285 0.1U_0402_10V7K~D
C286 0.1U_0402_10V7K~D
C287 0.1U_0402_10V7K~D
C288 0.1U_0402_10V7K~D
C289 0.1U_0402_10V7K~D
C290 0.1U_0402_10V7K~D
C291 0.1U_0402_10V7K~D
C292 0.1U_0402_10V7K~D
C293 0.1U_0402_10V7K~D
1M_0402_5%~D
12
DPB_HPD_R
DPB_DOCK_AUX <35>
DPB_DOCK_AUX# <35>
R1098
1 2
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
+3.3V_RUN
2
G
100K_0402_5%~D
R191
DPB_MB_CA_DET
1 2
DPB_MB_HPD
1 2
DPB_DOCK_CA_DET
1 2
DPB_DOCK_HPD
1 2
DPB_MB_P14
1 2
DPB_MB_LANE0_C
DPB_MB_LANE0#_C
DPB_MB_LANE1_C
DPB_MB_LANE1#_C
DPB_MB_LANE2#_C
DPB_MB_LANE3_C
DPB_MB_LANE3#_C
DPB_DOCK_LANE0_C <35>
DPB_DOCK_LANE0#_C <35>
DPB_DOCK_LANE1_C <35>
DPB_DOCK_LANE1#_C <35>
DPB_DOCK_LANE2_C <35>
DPB_DOCK_LANE2#_C <35>
DPB_DOCK_LANE3_C <35>
DPB_DOCK_LANE3#_C <35>
R798
20K_0402_5%~D
1 2
13
D
Q10
BSS138_SOT23~D
S
1 2
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
U78
2
1A
2A51B
1
1OE#
7
2OE#
SN74CBTD3306CPWR_TSSOP8~D
DPB_HPD# <12>
R824
7.5K_0402_5%~D
DOCK_DET#<35,37>
DP_MB_EN<37>
VCC
GND
+5V_RUN
8
3
6
2B
4
4
R918
@
1 2
R919
1 2
DPB_MB_HPD
C1074
0.1U_0402_16V4Z~D
1 2
+3.3V_RUN
C276
1
5
0.1U_0402_16V4Z~D
P
NC
A2Y
G
U7
NC7SZ04P5X_NL_SC70-5~D
3
DPB_MB_AUX
DPB_MB_AUX#
DPB_DOCK_AUX
DPB_DOCK_AUX#
DPC_DOCK_AUX
DPC_DOCK_AUX#
DPB_AUX#_SW
DPC_AUX#_DOCK
DPB_AUX_SW
DPC_AUX_DOCK
DPB_MB_AUX
DPB_MB_AUX#
DPB_DOCK_AUX
DPB_DOCK_AUX#
DPB_AUX_SW
DPC_AUX_DOCK
DPB_AUX#_SW
DPC_AUX#_DOCK
+3.3V_RUN
R917
@
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
DPC_CA_DETDPC_CA_DET#
1 2
12
R209 100K_0402_5%~D@
R278 100K_0402_5%~D
R336 100K_0402_5%~D@
R337 100K_0402_5%~D@
R419 100K_0402_5%~D@
R647 100K_0402_5%~D@
R1033 100K_0402_5%~D@
1 2
R1031 100K_0402_5%~D@
1 2
R1072 100K_0402_5%~D@
1 2
R1074 100K_0402_5%~D@
1 2
R1024 100K_0402_5%~D
1 2
R1025 100K_0402_5%~D@
R1028 100K_0402_5%~D@
R1029 100K_0402_5%~D@
R1032 100K_0402_5%~D@
1 2
R1030 100K_0402_5%~D@
R1073 100K_0402_5%~D@
1 2
R1075 100K_0402_5%~D@
+3.3V_RUN
5
1
P
IN1
2
IN2
G
U62
3
74AHC1G08GW_SOT353-5~D
DPC_CA_DET <35>
+3.3V_RUN
12
12
12
12
12
12
12
12
12
12
12
1 2
C1041 0.1U_0402_16V4Z~D
DP_MB_HPD_EN
4
O
+5V_RUN_R
0_1206_5%~D
@
1 2
1 2
D11
@
1
2
4
5
3
8
RCLAMP0524P.TCT~D
D12
@
1
2
4
5
3
8
RCLAMP0524P.TCT~D
D13
@
1
2
4
5
3
8
RCLAMP0524P.TCT~D
R184
+VDISPLAY_VCC
JDP1
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
MOLEX_105019-0001
0.01U_0402_16V7K~D
1
C275
2
DP_PWR
RTN
HP_DET
AUX_CHGND
AUX_CH+
GND
CA_DET
LANE3LANE3_shield
LANE3+
LANE2LANE2_shield
LANE2+
LANE1LANE1_shield
LANE1+
LANE0LANE0_shield
LANE0+
DPB_MB_LANE1#_C
10
DPB_MB_LANE1_C
9
DPB_MB_LANE0#_C
7
DPB_MB_LANE0_C
6
DPB_MB_LANE3#_C
10
DPB_MB_LANE3_C
9
DPB_MB_LANE2#_C
7
DPB_MB_LANE2_C
6
DPB_MB_CA_DET
10
DPB_MB_HPD
9
DPB_MB_AUX#
7
DPB_MB_AUX
6
10U_0805_10V6K~D
1
C1075
2
GND
GND
GND
GND
F1
1206L150PR~D
DPB_MB_HPD
DPB_MB_AUX#
DPB_MB_AUX
DPB_MB_P14
DPB_MB_CA_DET
DPB_MB_LANE3#_C
DPB_MB_LANE3_C
DPB_MB_LANE2#_C
DPB_MB_LANE2_C
DPB_MB_LANE1#_C
DPB_MB_LANE1_C
DPB_MB_LANE0#_C
DPB_MB_LANE0_C
DPB_MB_LANE1#_C
DPB_MB_LANE1_C
DPB_MB_LANE0#_C
DPB_MB_LANE0_C
DPB_MB_LANE3#_C
DPB_MB_LANE3_C
DPB_MB_LANE2#_C
DPB_MB_LANE2_C
DPB_MB_CA_DET
DPB_MB_HPD
DPB_MB_AUX#
DPB_MB_AUX
Place close to JDP1 connector
21
22
23
24
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
1
Date: Sheet
Compal Electronics, Inc.
Display port
LA-3801P
21 66T h u r s da y, June 12, 2008
0.8
of
Page 22
5
+3.3V_RUN
D D
C C
1 2
R194 8.2K_0402_5%~D
1 2
R195 8.2K_0402_5%~D
1 2
R196 8.2K_0402_5%~D
1 2
R197 8.2K_0402_5%~D
1 2
R198 8.2K_0402_5%~D
1 2
R199 8.2K_0402_5%~D
1 2
R200 8.2K_0402_5%~D
1 2
R201 8.2K_0402_5%~D
+3.3V_RUN
1 2
R202 8.2K_0402_5%~D
1 2
R203 8.2K_0402_5%~D
1 2
R204 8.2K_0402_5%~D
1 2
R205 8.2K_0402_5%~D
1 2
R207 8.2K_0402_5%~D
1 2
R208 8.2K_0402_5%~D
1 2
R702 100K_0402_5%~D
1 2
R755 100K_0402_5%~D
1 2
R212 100K_0402_5%~D
1 2
R817 100K_0402_5%~D
PCI_DEVSEL#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#
PCI_PLOCK#
PCI_IRDY#
PCI_SERR#
PCI_PERR#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_REQ0#
PCI_REQ1#
FAN1_DET#
LVDS_CBL_DET#
CAM_MIC_CBL_DET#
PNL_BKLT_CBL_DET#
PCI_AD[0..31]<31>
4
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_PIRQA#
PCI_PIRQB#<31>
PCI_PIRQC#< 31>
PCI_PIRQD#< 31>
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
U10B
D11
AD0
C8
D9
E12
E9
C9
E10
B7
C7
C5
G11
F8
F11
E7
A3
D2
F10
D5
D10
B3
F7
C3
F3
F4
C1
G7
H7
D1
G5
H6
G1
H3
J5
E1
J6
PCI
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
Interrupt I/F
PIRQA#
PIRQB#
PIRQC#
PIRQD#C4PIRQH#/GPIO5
ICH9M REV 1.0
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
REQ0#
GNT0#
C/BE0#
C/BE1#
C/BE2#
C/BE3#
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
PLTRST#
PCICLK
PME#
3
PCI_REQ0#
F1
PCI_GNT0#
G4
PCI_REQ1#
B6
PCI_GNT1#
A7
F13
F12
E6
ICH_GPIO55
F6
PCI_C_BE0#
D8
PCI_C_BE1#
B4
PCI_C_BE2#
D6
PCI_C_BE3#
A5
PCI_IRDY#
D3
PCI_PAR
E3
PCI_PCIRST#
R1
PCI_DEVSEL#
C6
PCI_PERR#
E4
PCI_PLOCK#
C2
PCI_SERR#
J4
PCI_STOP#
A4
PCI_TRDY#
F5
PCI_FRAME#
D7
PCI_PLTRST#
C14
CLK_PCI_ICH
D4
ICH_PME#
R2
LVDS_CBL_DET#
H4
PNL_BKLT_CBL_DET#
K6
CAM_MIC_CBL_DET#
F2
FAN1_DET#
G2
PCI_REQ1# <31>
PCI_GNT1# <31>
PCIE_MCARD2_DET# <34>
PCIE_MCARD3_DET# <34>
PCI_C_BE0# <31>
PCI_C_BE1# <31>
PCI_C_BE2# <31>
PCI_C_BE3# <31>
PCI_IRDY# <31>
PCI_PAR <31>
PCI_DEVSEL# <31>
PCI_PERR# <31>
PCI_SERR# <31>
PCI_STOP# <31>
PCI_TRDY# <31>
PCI_FRAME# <31>
CLK_PCI_ICH <6>
ICH_PME# <37>
LVDS_CBL_DET# <19>
PNL_BKLT_CBL_DET# <19>
CAM_MIC_CBL_DET# <19>
FAN1_DET# <18>
2
PCI_PCIRST#
PCI_PLTRST#
+3.3V_ALW_ICH
14
1
P
IN1
OUT
2
IN2
G
U11A
7
74VHC08MTCX_NL_TSSOP14~D
+3.3V_ALW_ICH
14
4
P
IN1
OUT
5
IN2
G
U11B
7
74VHC08MTCX_NL_TSSOP14~D
+3.3V_ALW_ICH
14
10
P
IN1
OUT
9
IN2
G
U11C
7
74VHC08MTCX_NL_TSSOP14~D
C294
0.1U_0402_16V4Z~D
PCI_RST#
3
PLTRST1#
6
PLTRST2#
8
1
PCI_RST# <29,31>
PLTRST1# <10,32>
PLTRST2# <37,38>
+3.3V_ALW_ICH
14
13
P
IN1
12
IN2
SPI
PCI
LPC
ICH_SPI_CS1#
12
R214
@
1K_0402_5%~D
Place closely pin U10.D4
CLK_PCI_ICH
B B
ICH_GPIO55
12
R215
@
1K_0402_5%~D
A16 away override strap.
PCI_GNT3#/(MDC_RST_DIS#)
Low = A16 swap override enabled.
High = Default.
*
PCI_GNT0#
12
R213
1K_0402_5%~D
Boot BIOS Strap
PCI_GNT0# SPI_CS1#
0
1
A A
1
ICH_SPI_CS1#<24>
Boot BIOS Location
1
0
1
PLTRST3#
11
OUT
G
U11D
7
74VHC08MTCX_NL_TSSOP14~D
R216
@
10_0402_5%~D
1 2
CLK_ICH_TERM
1
C295
@
8.2P_0402_50V8J~D
2
PLTRST3# <34,36>
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
ICH9-M(1/4)
LA-3801P
22 66T h u r s da y, June 12, 2008
1
0.8
of
Page 23
5
D D
+3.3V_ALW_ICH
R221 10K_0402_5%~D
GLAN_DOCK#
12
CMOS settingCMOS_CLR1
Shunt
Open
Clear CMOS
Keep CMOS
32.768KHZ_12.5PF_9H03200584~D
TPM settingME_CLR1
Shunt
Clear ME RTC Registers
Open
Keep ME RTC Registers
1
1
C C
ME1 @SHORT PADS~ D@
1 2
C298 1U_0603_10V4Z~D
Close to U55
ICH_AZ_CODEC_SDOUT<27>
ICH_AZ_CODEC_SYNC<27>
ICH_AZ_CODEC_RST#<27>
ICH_AZ_CODEC_BITCLK<27>
C302
27P_0402_50V8J~D
ICH_AZ_MCH_SDOUT<10>
ICH_AZ_MCH_SYNC<10>
ICH_AZ_MCH_RST#<10>
B B
ICH_AZ_MCH_BITCLK<10>
C309
27P_0402_50V8J~D
R234 33_0402_5%~D
R235 33_0402_5%~D
R239 33_0402_5%~D
R241 33_0402_5%~D
1
2
R243 33_0402_5%~D
R244 33_0402_5%~D
R245 33_0402_5%~D
R246 33_0402_5%~D
1
2
2
2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
+RTC_CELL
ICH_AZ_SDOUT
ICH_AZ_SYNC
ICH_AZ_RST#
ICH_AZ_BITCLK
ICH_AZ_SDOUT
ICH_AZ_SYNC
ICH_AZ_RST#
ICH_AZ_BITCLK
1 2
R224 20K_0402_5%~D
1 2
R225 20K_0402_5%~D
1 2
R226 1M_0402_5%~D
1
1
CMOS1 @SHORT PA D S~D@
1 2
C299 1U_0603_10V4Z~D
SATA_ODD_IRX_DTX_N1_C<26>
SATA_ODD_IRX_DTX_P1_C<26>
SATA_ODD_ITX_DRX_N1<26>
SATA_ODD_ITX_DRX_P1<26>
2
2
ICH_AZ_MDC_BITCLK<33>
ICH_AZ_MDC_SYNC<33>
ICH_AZ_MDC_RST#<33>
ICH_AZ_CODEC_SDIN0<27>
ICH_AZ_MDC_SDIN1<33>
ICH_AZ_MCH_SDIN2<10>
ICH_AZ_MDC_SDOUT<33>
ME_FWP<37>
SATA_ACT#_R<42>
PSATA_IRX_DTX_N0_C<26>
PSATA_IRX_DTX_P0_C<26>
PSATA_ITX_DRX_N0<26>
PSATA_ITX_DRX_P0<26>
4
Package
9.6X4.06 mm
12
C296
15P_0402_50V8J~D
C297 12P_0402_50V8J~D
Y1
12
LAN_RSTSYNC<29>
LAN_TX0<29>
LAN_TX1<29>
LAN_TX2<29>
+1.5V_RUN_PCIE_ICH
12
C300
27P_0402_50V8J~D
12
C307 0.01U_0402_16V7K~D
12
C308 0.01U_0402_16V7K~D
12
C310 0.01U_0402_16V7K~D
12
C311 0.01U_0402_16V7K~D
12
R223
0_0402_5%~D
1 2
LAN_CLK<29>
LAN_RX0<29>
LAN_RX1<29>
LAN_RX2<29>
R236 33_0402_5%~D
1 2
1 2
R238 33_0402_5%~D
1 2
R240 33_0402_5%~D
1 2
R242 33_0402_5%~D
ICH_RTCX1
12
R222
10M_0402_5%~D
ICH_RTCX2
ICH_RTCRST#
SRTCRST#
INTRUDER#
ICH_INTVRMEN
LAN100_SLP
LAN_RX0
LAN_RX1
LAN_RX2
LAN_TX0
LAN_TX1
LAN_TX2
GLAN_DOCK#
1 2
R232
24.9_0402_1%~D
ICH_AZ_BITCLK
ICH_AZ_SYNC
ICH_AZ_RST#
ICH_AZ_CODEC_SDIN0
ICH_AZ_MDC_SDIN1
ICH_AZ_MCH_SDIN2
ICH_AZ_SDOUT
ME_FWP
RTC_BAT_DET#
SATA_ACT#_R
PSATA_ITX_DRX_N0_C
PSATA_ITX_DRX_P0_C
SATA_ODD_ITX_DRX_N1_C
SATA_ODD_ITX_DRX_P1_C
3
+RTC_CELL +RTC_CELL
12
R217
332K_0402_1%~D
ICH_INTVRMEN
R219
@
0_0402_5%~D
1 2
ICH9M Internal VR Enable Strap
(Internal VR f or Vc cS us 1.05, VccSus1.5, VccCL1.5)
ICH_INTVRMEN
U10A
C23
RTCX1
C24
RTCX2
A25
RTCRST#
F20
SRTCRST#
C22
INTRUDER#
B22
INTVRMEN
A22
LAN100_SLP
E25
GLAN_CLK
C13
LAN_RSTSYNC
F14
LAN_RXD0
G13
LAN_RXD1
D14
LAN_RXD2
D13
LAN_TXD0
D12
LAN_TXD1
E13
LAN_TXD2
B10
GPIO56
B28
GLAN_COMPI
B27
GLAN_COMPO
AF6
HDA_BIT_CLK
AH4
HDA_SYNC
AE7
HDA_RST#
AF4
HDA_SDIN0
AG4
HDA_SDIN1
AH3
HDA_SDIN2
AE5
HDA_SDIN3
AG5
HDA_SDOUT
AG7
HDA_DOCK_EN#/GPIO33
AE8
HDA_DOCK_RST#/GPIO34
AG8
SATALED#
AJ16
SATA0RXN
AH16
SATA0RXP
AF17
SATA0TXN
AG17
SATA0TXP
AH13
SATA1RXN
AJ13
SATA1RXP
AG14
SATA1TXN
AF14
SATA1TXP
ICH9M REV 1.0
Low = Internal VR Disabled
High = Internal VR Enabled(Default)
LPC_LAD0
K5
RTCLAN / GLANIHDASATA
LPCCPU
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
FWH4/LFRAME#
LDRQ0#
LDRQ1#/GPIO23
A20GATE
A20M#
DPRSTP#
DPSLP#
FERR#
CPUPWRGD
IGNNE#
INIT#
INTR
RCIN#
SMI#
STPCLK#
THRMTRIP#
TP12
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATA_CLKN
SATA_CLKP
SATARBIAS#
SATARBIAS
NMI
K4
L6
K2
K3
J3
J1
N7
AJ27
AJ25
AE23
AJ26
AD22
AF25
AE22
AG25
L3
AF23
AF24
AH27
AG26
AG27
AH11
AJ11
AG12
AF12
AH9
AJ9
AE10
AF10
AH18
AJ18
AJ7
AH7
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
LPC_LDRQ0#
LPC_LDRQ1#
SIO_A20GATE
H_A20M#
H_DPRSTP#
H_DPSLP#
R229
12
56_0402_5%~D
H_PWRGOOD
H_IGNNE#
H_INIT#
H_INTR
SIO_RCIN#
H_NMI
H_SMI#
H_STPCLK#
THRMTRIP_ICH#
ESATA_ITX_DRX_N4_C
ESATA_ITX_DRX_P4_C
SATA_ITX_DRX_N3_C
SATA_ITX_DRX_P3_C
CLK_PCIE_SATA#
CLK_PCIE_SATA
R247 24.9_0402_1%~D
Within 500 mils
2
ICH_LAN100_SLP Low = In t e r n al VR Disabled
LPC_LAD[0..3] <29,36,37,38>
LPC_LAD0 <29,36,37,38>
LPC_LAD1 <29,36,37,38>
LPC_LAD2 <29,36,37,38>
LPC_LAD3 <29,36,37,38>
LPC_LFRAME# <29,36,37,38>
LPC_LDRQ0# <37>
LPC_LDRQ1# <37>
SIO_A20GATE <38>
H_A20M# <7>
H_FERR# <7>
H_PWRGOOD <8>
H_IGNNE# <7>
H_INIT# <7>
H_INTR <7>
SIO_RCIN# <38>
H_NMI <7>
H_SMI# <7>
H_STPCLK# <7>
12
C303 0.01U_0402_16V7K~D
12
C304 0.01U_0402_16V7K~D
12
C305 0.01U_0402_16V7K~D
12
C306 0.01U_0402_16V7K~D
CLK_PCIE_SATA# <6>
CLK_PCIE_SATA <6>
12
1
12
R218
332K_0402_1%~D
LAN100_SLP
R220
@
0_0402_5%~D
1 2
ICH9M LAN100 SLP Strap
(Internal VR f or Vc cL AN1.05 and VccCL1.05)
High = Interna l V R Enabled(Default)
+1.05V_VCCP
56_0402_1%~D
12
@
R227
+1.05V_VCCP
12
SIO_A20GATE
SIO_RCIN#
56_0402_1%~D
@
R228
H_FERR#
H_DPRSTP# <8,10,47>
H_DPSLP# <8>
12
R237
56_0402_5%~D
1 2
C301
0.1U_0402_16V4Z~D
ESATA_IRX_DTX_N4_C <33>
ESATA_IRX_DTX_P4_C <33>
ESATA_ITX_DRX_N4 <33>
ESATA_ITX_DRX_P4 <33>
SATA_SBRX_DTX_N3_C <35>
SATA_SBRX_DTX_P3_C <35>
SATA_SBTX_C_DRX_N3 <35>
SATA_SBTX_C_DRX_P3 <35>
R230 10K_0402_5%~D
R231 10K_0402_5%~D
R233 56_0402_5%~D
+3.3V_RUN
12
12
+1.05V_VCCP
12
+3.3V_RUN
12
R905
+3.3V_RUN
12
R248
XOR Chain Entrance Strap
DescriptionICH_RSVD_TP3 HDA SDOUT
A A
00
0
1
11
5
RSVD
1
Enter XOR Chain
0
Normal Operation (Default)
Set PCIE port config bit 1
@
1K_0402_5%~D
10K_0402_5%~D
12
@
R1124
4
ICH_AZ_SDOUT
ICH_AZ_SYNC
10K_0402_5%~D
12
@
R1125
12
R249
@
1K_0402_5%~D
ICH_RSVD_TP3 <24>
RTC_BAT_DET_R#<43>
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
RTC_BAT_DET#
RTC_BAT_DET_R#
100K_0402_5%~D
R907
@
0_0402_5%~D
1 2
+COINCELL
1 3
2N7002W-7-F_SOT323-3~D
R906
1 2
1M_0402_5%~D
2
G
D
S
Q96
12
R908
1K_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
ICH9-M(2/4)
LA-3801P
23 66T h u r s da y, June 12, 2008
1
0.8
of
Page 24
+3.3V_RUN
1 2
R251 2.2K_0402_5%~D@
1 2
R254 10K_0402_5%~D@
1 2
R258 8.2K_0402_5%~D
12
R261 10K_0402_5%~D
1 2
R264 1K_0402_5%~D@
1 2
R834 100K_0402_5%~D
1 2
D D
R272 10K_0402_5%~D
+3.3V_LAN
1 2
R270 1K_0402_5%~D@
+3.3V_ALW_ICH
1 2
R822 100K_0402_5%~D
No Reboot Strap
Low = Default
SPKR
High = No Reboot
+3.3V_RUN
12
R282
8.2K_0402_5%~D
C C
B B
CLKRUN#
12
@
10_0402_5%~D
+3.3V_ALW_ICH
10K_1206_8P4R_5%~D
10K_1206_8P4R_5%~D
R288 10K_0402_5%~D
R291 10K_0402_5%~D
R293 10K_0402_5%~D
Option to " Disable "
R283
clkrun. Pulling it
down
will keep the clks
running.
RP1
45
36
27
18
RP2
45
36
27
18
1 2
1 2
1 2
For iAMT
ICH_SPI_CS0#
ICH_EC_SPI_DIN
SPI_WP#_SEL
A A
ICH_SPI_CS1#
ICH_SPI_DIN_R
SPI_WP#_SEL
1 2
R300 33_0402_5%~D
1 2
R386 0_0402_5%~D
SPI_WP#_SEL <37>
1 2
R384 33_0402_5%~D@
1 2
R1060 0_0402_5%~D@
5
IMVP_PWRGD
MCH_ICH_SYNC#
RSV_THRM#
IRQ_SERIRQ
SPKR
SPEAKER_DET#
SIO_EXT_SCI#
ICH_EC_SPI_DO
CONTACTLESS_DET#
+3.3V_ALW_ICH
1 2
R252 2.2K_0402_5%~D
1 2
R255 2.2K_0402_5%~D
1 2
R259 10K_0402_5%~D@
1 2
R262 10K_0402_5%~D
1 2
R265 10K_0402_5%~D
1 2
R267 10K_0402_5%~D
1 2
R268 10K_0402_5%~D
R269 10K_0402_5%~D
1 2
R274 10K_0402_5%~D
1 2
R787 10K_0402_5%~D
1 2
R192 10K_0402_5%~D
1 2
R835 100K_0402_5%~D
1 2
R74 100K_0402_5%~D
1 2
R295 10K_0402_5%~D@
iTPM function
R270
SIO_EXT_WAKE#<37>
USB_MCARD1_DET#<34>
USB_MCARD2_DET#<34>
MiniWWAN (Mini Card 1)--->
MiniWLAN (Mini Card 2)--->
USB_OC0_1#
USB_OC2#
ESATA_USB_OC#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#
USB_OC11#
USB_OC9#
USB_OC10#
USB_OC8#
+3.3V_LAN
SPI_DIN_R1
+3.3V_LAN
SPI_DIN_R2
5
10/100/1G LAN --->
12
R298
3.3K_0402_5%~D
12
@
3.3K_0402_5%~D
BT/UWB--->
Express card--->
200 MIL SO8
Flash ROM
U12
1
CS#
2
SO
HOLD#
3
WP#
4
GND
W25X32VSSIG_SO8~D
R304
U13
@
1
CS#
2
SO
HOLD#
3
WP#
4
GND
W25X16-VSSIG_SO8~D
ICH_SMBCLK
ICH_SMBDATA
ICH_CL_RST1#
AMT_SMBCLK
AMT_SMBDAT
ICH_RI#
ICH_PCIE_W AKE#
ME_SUS_PWR_ACK
12
SIO_EXT_SMI#
ICH_GPIO60
SMB_ALERT#
IO_LOOP
ROUSH_PAID_TS_DET#
LAN_DISABLE#
No stuff = Disable
Stuff = Enable
47P_0402_50V8J~D
1
@
C313
2
1 2
R811 100K_0402_5%~D@
1 2
R789 1K_0402_5%~D@
12
8
VCC
7
SPI_CLK_R1
6
SCLK
SPI_DO_R1
5
SI
12
8
VCC
7
SPI_CLK_R2
6
SCLK
SPI_DO_R2
5
SI
1 2
R277 0_0402_5%~D
1 2
R280 0_0402_5%~D
1 2
R281 0_0402_5%~D
47P_0402_50V8J~D
47P_0402_50V8J~D
1
1
@
@
C315
C316
2
2
ITP_DBRESET#
DMI_TERM_SEL
PCIE_IRX_WANTX_N1<34>
PCIE_IRX_WANTX_P1<34>
PCIE_ITX_WANRX_N1_C<34>
PCIE_ITX_WANRX_P1_C<34>
PCIE_IRX_WLANTX_N2<34>
PCIE_IRX_WLANTX_P2<34>
PCIE_ITX_WLANRX_N2_C<34>
PCIE_ITX_WLANRX_P2_C<34>
PCIE_IRX_MCARDTX_N3<34>
PCIE_IRX_MCARDTX_P3<34>
PCIE_ITX_MCARDRX_N3_C<34>
PCIE_ITX_MCARDRX_P3_C<34>
PCIE_IRX_EXPTX_N4<32>
PCIE_IRX_EXPTX_P4<32>
PCIE_ITX_EXPRX_N4_C<32>
PCIE_ITX_EXPRX_P4_C<32>
PCIE_IRX_GLANTX_N6<29>
PCIE_IRX_GLANTX_P6<29>
PCIE_ITX_GLANRX_N6_C<29>
PCIE_ITX_GLANRX_P6_C<29>
R301
33_0402_5%~D
1 2
1 2
C395
@
1 2
R380
ICH_SPI_CS1#<22>
R308
@
33_0402_5%~D
1 2
1 2
R309
@
33_0402_5%~D
C328
1 2
0.1U_0402_16V4Z~D
R299
3.3K_0402_5%~D
R302 33_0402_5%~D
0.1U_0402_16V4Z~D
@
3.3K_0402_5%~D
ICH_PCIE_W AKE#<37>
IRQ_SERIRQ<29,31,36,37,38>
ICH_EC_SPI_CLK
ICH_EC_SPI_DO
ICH_EC_SPI_CLK
ICH_EC_SPI_DO
4
ICH_SMBCLK
ICH_SMBDATA
ICH_GPIO60
T173
1 2
R1126
33_0402_5%~D
T90PAD~D
T132PAD~D
T51PAD~D
R294
33_0402_5%~D
R377
33_0402_5%~D
0_0402_5%~D
USB_OC2#<33>
ESATA_USB_OC#<33>
R385 0_0402_5%~D
AMT_SMBCLK
AMT_SMBDAT
ICH_RI#
SUS_STAT#/LPCPD#
ITP_DBRESET#
PM_SYNC#
SMB_ALERT#
H_STP_PCI#
H_STP_CPU#
CLKRUN#
IRQ_SERIRQ_ICH
IMVP_PWRGD
SIO_EXT_SCI#
TPM_ID
SIO_EXT_SMI#
LAN_DISABLE#
CONTACTLESS_DET#
ICH_GPIO20
ROUSH_PAID_TS_DET#
IO_LOOP
SATA_CLKREQ#
ODD_DET#
HDD_DET#
DMI_TERM_SEL
SPKR
MCH_ICH_SYNC#
ICH_RSVD_TP3
ICH_TP9
1 2
1 2
R1045
1 2
R303
22.6_0402_1%~D
Within 500 mils
1 2
AMT_SMBCLK<38>
AMT_SMBDAT<38>
@
PAD~D
ITP_DBRESET#<7>
PM_SYNC#<10>
H_STP_PCI#<6>
H_STP_CPU#<6>
CLKRUN#<29,31,37,38>
ICH_PCIE_W AKE#
IRQ_SERIRQ
IMVP_PWRGD<37,41,47,49>
SIO_EXT_SCI#<38>
SIO_EXT_SMI#<38>
LAN_DISABLE#<29>
CONTACTLESS_DET#<36>
@
@
ROUSH_PAID_TS_DET#<37>
IO_LOOP<33>
SATA_CLKREQ#<6>
ODD_DET#<26,38>
HDD_DET#<26>
SPKR<27>
MCH_ICH_SYNC#<10>
ICH_RSVD_TP3<23>
@
C317 0.1U_0402_10V7K~D
1 2
C319 0.1U_0402_10V7K~D
1 2
C320 0.1U_0402_10V7K~D
1 2
C321 0.1U_0402_10V7K~D
1 2
C322 0.1U_0402_10V7K~D
1 2
C323 0.1U_0402_10V7K~D
1 2
C1008 0.1U_0402_10V7K~D
1 2
C1009 0.1U_0402_10V7K~D
1 2
C326 0.1U_0402_10V7K~D
1 2
C327 0.1U_0402_10V7K~D
1 2
ICH_SPI_CS0# ICH_SP I_ C S 0#_R
ICH_SPI_CS1#
USB_OC0_1#<33>
ICH_EC_SPI_DIN ICH_S PI _DIN_R
Follow Daisy Chain and Star
Topology. Place close to U10
pinE23 within 500mils
4
G16
A13
E17
C17
B18
F19
R4
G19
M6
A17
A14
E19
L4
E20
12
M5
AJ23
D21
A20
AG19
AH21
AG21
A21
C12
C21
AE18
AF8
AJ22
D19
AE19
AG22
AF21
AH24
M7
AJ24
B21
AH20
AJ20
AJ21
USBRBIAS
K1
A9
L1
A8
RSV_THRM#
PCIE_IRX_WANTX_N1
PCIE_IRX_WANTX_P1
PCIE_ITX_WANRX_N1
PCIE_ITX_WANRX_P1
PCIE_IRX_WLANTX_N2
PCIE_IRX_WLANTX_P2
PCIE_ITX_WLANRX_N2
PCIE_ITX_WLANRX_P2
PCIE_IRX_MCARDTX_N3
PCIE_IRX_MCARDTX_P3
PCIE_ITX_MCARDRX_N3
PCIE_ITX_MCARDRX_P3
PCIE_IRX_EXPTX_N4
PCIE_IRX_EXPTX_P4
PCIE_ITX_EXPRX_N4
PCIE_ITX_EXPRX_P4
PCIE_IRX_GLANTX_N6
PCIE_IRX_GLANTX_P6
PCIE_ITX_GLANRX_N6
PCIE_ITX_GLANRX_P6
ICH_EC_SPI_CLK
ICH_SPI_CS1#_R
ICH_EC_SPI_DO
ICH_EC_SPI_DIN
USB_OC0_1#
USB_OC1#
USB_OC2#
ESATA_USB_OC#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#
USB_OC8#
USB_OC9#
USB_OC10#
USB_OC11#
3
1 2
U10C
SMBCLK
SMBDATA
LINKALERT#/GPIO60/CLGPIO4
SMLINK0
SMLINK1
RI#
SUS_STAT#/LPCPD#
SYS_RESET#
PMSYNC#/GPIO0
SMBALERT#/GPIO11
STP_PCI#
STP_CPU#
CLKRUN#
WAKE#
SERIRQ
THRM#
VRMPWRGD
TP11
GPIO1
GPIO6
GPIO7
GPIO8
GPIO12
GPIO13
GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
GPIO27
GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
GPIO49
GPIO57/CLGPIO5
SPKR
MCH_SYNC#
TP3
TP8
TP9
TP10
ICH9M REV 1.0
U10D
N29
PERN1
N28
PERP1
P27
PETN1
P26
PETP1
L29
PERN2
L28
PERP2
M27
PETN2
M26
PETP2
J29
PERN3
J28
PERP3
K27
PETN3
K26
PETP3
G29
PERN4
G28
PERP4
H27
PETN4
H26
PETP4
E29
PERN5
E28
PERP5
F27
PETN5
F26
PETP5
C29
PERN6/GLAN_RXN
C28
PERP6/GLAN_RXP
D27
PETN6/GLAN_TXN
D26
PETP6/GLAN_TXP
D23
SPI_CLK
D24
SPI_CS0#
F23
SPI_CS1#/GPIO58/CLGPIO6
D25
SPI_MOSI
E23
SPI_MISO
N4
OC0#/GPIO59
N5
OC1#/GPIO40
N6
OC2#/GPIO41
P6
OC3#/GPIO42
M1
OC4#/GPIO43
N2
OC5#/GPIO29
M4
OC6#/GPIO30
M3
OC7#/GPIO31
N3
OC8#/GPIO44
N1
OC9#/GPIO45
P5
OC10#/GPIO46
P3
OC11#/GPIO47
AG2
USBRBIAS
AG1
USBRBIAS#
ICH9M REV 1.0
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
SATA
GPIO
SMBSYS GPIO
Clocks
S4_STATE#/GPIO26
DPRSLPVR/GPIO16
Power MGTController Link
GPIO
GPIO10/SUS_PWR_ACK
GPIO14/AC_PRESENT
MISC
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
DMI_CLKN
PCI-Express
DMI_CLKP
Direct Media Interface
DMI_ZCOMP
DMI_IRCOMP
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
SPI
USBP5P
USBP6N
USB
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37
CLK14
CLK48
SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#
PWROK
BATLOW#
PWRBTN#
LAN_RST#
RSMRST#
CK_PWRGD
CLPWROK
SLP_M#
CL_CLK0
CL_CLK1
CL_DATA0
CL_DATA1
CL_VREF0
CL_VREF1
CL_RST0#
CL_RST1#
MEM_LED/GPIO24
WOL_EN/GPIO9
V27
V26
U29
U28
Y27
Y26
W29
W28
AB27
AB26
AA29
AA28
AD27
AD26
AC29
AC28
T26
T25
AF29
AF28
AC5
AC4
AD3
AD2
AC1
AC2
AA5
AA4
AB2
AB3
AA1
AA2
W5
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2
DMI_MTX_IRX_N0
DMI_MTX_IRX_P0
DMI_MRX_ITX_N0
DMI_MRX_ITX_P0
DMI_MTX_IRX_N1
DMI_MTX_IRX_P1
DMI_MRX_ITX_N1
DMI_MRX_ITX_P1
DMI_MTX_IRX_N2
DMI_MTX_IRX_P2
DMI_MRX_ITX_N2
DMI_MRX_ITX_P2
DMI_MTX_IRX_N3
DMI_MTX_IRX_P3
DMI_MRX_ITX_N3
DMI_MRX_ITX_P3
CLK_PCIE_ICH#
CLK_PCIE_ICH
R256 8.2K_0402_5%~D
AH23
SPEAKER_DET#
AF19
USB_MCARD3_DET#
AE21
1394_DET#
AD20
CLK_ICH_14M
H1
CLK_ICH_48M
AF3
P1
SIO_SLP_S3#
C16
SIO_SLP_S4#
E16
SIO_SLP_S5#
G17
C10
ICH_PWRGD
G20
DPRSLPVR
M2
ICH_BATLOW#
B13
SIO_PWRBTN#
R3
ICH_LAN_RST#
D20
ICH_RSMRST#
D22
CLK_PWRGD
R5
ICH_CL_PWROK
R6
SIO_SLP_M#
B16
F24
B19
F22
C19
+CL_VREF0_ICH
C25
+CL_VREF1_ICH
A19
CL_RST0#
F21
ICH_CL_RST1#
D18
A16
ME_SUS_PWR_ACK
C18
AC_PRESENT
C11
ME_WOL_EN
C20
1 2
R284
@
10K_0402_5%~D
DMI_IRCOMP
USBP0-
USBP0+
USBP1USBP1+
USBP2USBP2+
USBP3USBP3+
USBP4USBP4+
USBP5USBP5+
USBP6USBP6+
USBP7USBP7+
USBP8USBP8+
USBP9USBP9+
USBP10USBP10+
USBP11USBP11+
2
+3.3V_RUN
R275 8.2K_0402_5%~D
DMI_MTX_IRX_N0 <10>
DMI_MTX_IRX_P0 <10>
DMI_MRX_ITX_N0 <10>
DMI_MRX_ITX_P0 <10>
DMI_MTX_IRX_N1 <10>
DMI_MTX_IRX_P1 <10>
DMI_MRX_ITX_N1 <10>
DMI_MRX_ITX_P1 <10>
DMI_MTX_IRX_N2 <10>
DMI_MTX_IRX_P2 <10>
DMI_MRX_ITX_N2 <10>
DMI_MRX_ITX_P2 <10>
DMI_MTX_IRX_N3 <10>
DMI_MTX_IRX_P3 <10>
DMI_MRX_ITX_N3 <10>
DMI_MRX_ITX_P3 <10>
CLK_PCIE_ICH# <6>
CLK_PCIE_ICH <6>
USBP0- <33>
USBP0+ <33>
USBP1- <33>
USBP1+ <33>
USBP2- <33>
USBP2+ <33>
USBP3- <33>
USBP3+ <33>
USBP4- <34>
USBP4+ <34>
USBP5- <34>
USBP5+ <34>
USBP6- <34>
USBP6+ <34>
USBP7- <31>
USBP7+ <31>
USBP8- <35>
USBP8+ <35>
USBP9- <35>
USBP9+ <35>
USBP10- <36>
USBP10+ <36>
USBP11- <19>
USBP11+ <19>
2
SPEAKER_DET# <28>
USB_MCARD3_DET# <34>
1394_DET# <31>
CLK_ICH_14M <6>
CLK_ICH_48M <6>
SIO_SLP_S3# <37>
SIO_SLP_S4# <38>
SIO_SLP_S5# <38>
ICH_PWRGD <10,41>
DPRSLPVR <10,47>
12
SIO_PWRBTN# <38>
ICH_LAN_RST# <38>
ICH_RSMRST# <38>
CLK_PWRGD <6>
ICH_CL_PWROK <10,38>
SIO_SLP_M# <38>
CL_CLK0 <10>
ICH_CL_CLK1 <34>
CL_DATA0 <10>
ICH_CL_DATA1 <34>
CL_RST0# <10>
ICH_CL_RST1# <34>
PCIE_MCARD1_DET# <34>
ME_SUS_PWR_ACK <38>
AC_PRESENT <38>
ME_WOL_EN <38>
+3.3V_ALW_ICH
+3.3V_ALW_ICH
Straped high ROW TPM
Straped low China_TPM
Within 500 mils
1 2
R292 24.9_0402_1%~D
----->Right Side Top
----->Right Side Bottom
----->Left Side Top
----->Left Side Bottom
----->WLAN
----->WWAN
----->WPAN
----->Card Bus
----->DOCK
----->DOCK
----->BIO
----->Camera
1
ICH_LAN_RST#
TPM_ID
+1.5V_RUN_PCIE_ICH
ICH_SMBDATA
6 1
+3.3V_M
ICH_SMBCLK
3
1394_DET#
ODD_DET#
HDD_DET#
ICH_CL_PWROK
DPRSLPVR
ICH_PWRGD
ICH_RSMRST#
ME_WOL_EN
+3.3V_ALW_ICH
10K_0402_5%~D
@
1 2
10K_0402_5%~D
1 2
+3.3V_RUN
100K_0402_5%~D
5@
R273
1 2
100K_0402_5%~D
6@
R922
1 2
+CL_VREF1_ICH
1
2
+3.3V_M
12
Q27A
2N7002DW-T/R7_SOT363-6~D
2
5
4
Q27B
2N7002DW-T/R7_SOT363-6~D
1 2
R836 100K_0402_5%~D
R760 100K_0402_5%~D
1 2
R759 100K_0402_5%~D
1 2
R250 100K_0402_5%~D
1 2
R253 100K_0402_5%~D@
1 2
R257 10K_0402_5%~D
1 2
R260 10K_0402_5%~D
1 2
R263 100K_0402_5%~D
Place closely pin U10.H1
CLK_ICH_14M
12
R271
R276
+3.3V_WLAN
C324
2.2K_0402_5%~D
R279
@
10_0402_5%~D
1
C312
@
4.7P_0402_50V8C~D
2
Place closely pin U10.AF3
CLK_ICH_48M
12
R285
10_0402_5%~D
1
C318
4.7P_0402_50V8C~D
2
12
R286
+CL_VREF0_ICH
3.24K_0402_1%~D
12
R289
453_0402_1%~D
0.1U_0402_16V4Z~D
2.2K_0402_5%~D
12
R297
R296
MEM_SDATA
MEM_SCLK
12
+3.3V_M
1
C325
2
0.1U_0402_16V4Z~D
MEM_SDATA <16,17>
MEM_SCLK <16,17>
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
ICH9-M(3/4)
LA-3801P
24 66T h u r s da y, June 12, 2008
1
of
+3.3V_RUN
12
R287
3.24K_0402_1%~D
12
R290
453_0402_1%~D
0.8
Page 25
5
+3.3V_RUN+5V_RUN
12
21
R311
100_0402_5%~D
D D
D15
RB751S40T1_SOD523-2~D
1
C335
1U_0603_10V6K~D
2
+1.5V_RUN
L13
1 2
BLM21PG600SN1D_0805~D
+RTC_CELL
1U_0603_10V4Z~D
1
C330
2
+1.5V_RUN_PCI E _I CH
+1.5V_RUN_ PCI E _I CH
220U_D2_4VY_R15M~D
1
+
1
2
C336
2
+3.3V_ALW_ICH+5V_ALW
12
21
R313
100_0402_5%~D
C C
+1.5V_RUN
D16
RB751S40T1_SOD523-2~D
ICH_V5REF_SUS
1
C342
1U_0603_10V6K~D
2
L16
10UH_LB2012T100MR_20%_0805~D
1 2
+1.5V_RUN_SATAPLL
10U_0805_4VAM~D
1
2
B B
0.1U_0402_16V4Z~D
1
C365
+3.3V_LAN
0.1U_0402_16V4Z~D
1
C367
2
1 2
L17
A A
1UH_20%_0805~D
5
2
C370
0.1U_0402_16V4Z~D
+VCCGLANPLL+1.5V_RUN
2.2U_0603_6.3V6K~D
10U_0805_4VAM~D
1
1
C371
C372
2
2
0.1U_0402_16V4Z~D
C350
1 2
4
0.1U_0402_16V4Z~D
1
C332
C331
2
ICH_V5REF_RUN
ICH_V5REF_SUSICH_V5REF_RUN
2.2U_0603_6.3V6K~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1
1
1
C337
2
2
1U_0603_10V4Z~D
1
C351
C339
C338
2
2
1U_0603_10V4Z~D
1
C358
2
1U_0603_10V4Z~D
1
C359
2
0.1U_0402_16V4Z~D
1
C364
2
VCCLAN1.05_INT_ICH
+1.5V_RUN
4.7U_0603_6.3V6M~D
1
+3.3V_RUN
C373
2
4
AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29
M24
M25
W24
W25
AJ19
AC16
AD15
AD16
AE15
AF15
AG15
AH15
AJ15
AC11
AD11
AE11
AF11
AG10
AG11
AH10
AJ10
AC9
AC18
AC19
AC21
AC12
AC13
AC14
AC6
AC7
A23
A6
AE1
F25
G25
H24
H25
J24
J25
K24
K25
L23
L24
L25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T24
T27
T28
T29
U24
U25
V24
V25
U23
K23
Y24
Y25
G10
G9
AJ5
AA7
AB6
AB7
A10
A11
A12
B12
A27
D28
D29
E26
E27
A26
U10F
VCCRTC
V5REF
V5REF_SUS
VCC1_5_B[1]
VCC1_5_B[2]
VCC1_5_B[3]
VCC1_5_B[4]
VCC1_5_B[5]
VCC1_5_B[6]
VCC1_5_B[7]
VCC1_5_B[8]
VCC1_5_B[9]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]
VCC1_5_B[47]
VCC1_5_B[48]
VCC1_5_B[49]
VCCSATAPLL
VCC1_5_A[1]
VCC1_5_A[2]
VCC1_5_A[3]
VCC1_5_A[4]
VCC1_5_A[5]
VCC1_5_A[6]
VCC1_5_A[7]
VCC1_5_A[8]
VCC1_5_A[9]
VCC1_5_A[10]
VCC1_5_A[11]
VCC1_5_A[12]
VCC1_5_A[13]
VCC1_5_A[14]
VCC1_5_A[15]
VCC1_5_A[16]
VCC1_5_A[17]
VCC1_5_A[18]
VCC1_5_A[19]
VCC1_5_A[20]
VCC1_5_A[21]
VCC1_5_A[22]
VCC1_5_A[23]
VCC1_5_A[24]
VCC1_5_A[25]
VCCUSBPLL
VCC1_5_A[26]
VCC1_5_A[27]
VCC1_5_A[28]
VCC1_5_A[29]
VCC1_5_A[30]
VCCLAN1_05[1]
VCCLAN1_05[2]
VCCLAN3_3[1]
VCCLAN3_3[2]
VCCGLANPLL
VCCGLAN1_5[1]
VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]
VCCGLAN3_3
ICH9M REV 1.0
CORE
VCCA3GP ATXARX USB CORE
VCCPSUSVCCPUSB
GLAN POWER
3
+1.05V_VCCP
D14
L14
+3.3V_RUN
1
C354
2
0.1U_0402_16V4Z~D
1
C369
2
2
3
MMBD4148-7-F_SOT23-3~D
R312
1_0603_1%~D
+1.05V_VCCP
+3.3V_RUN
0.1U_0402_16V4Z~D
1
2
0.1U_0402_16V4Z~D
+3.3V_RUN
C355
+3.3V_ALW_ICH
12
C347
+3.3V/1.5V_RUN_HDA
2
1
VCC1_05[1]
VCC1_05[2]
VCC1_05[3]
VCC1_05[4]
VCC1_05[5]
VCC1_05[6]
VCC1_05[7]
VCC1_05[8]
VCC1_05[9]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]
VCCDMIPLL
VCC_DMI[1]
VCC_DMI[2]
V_CPU_IO[1]
V_CPU_IO[2]
VCC3_3[1]
VCC3_3[2]
VCC3_3[7]
VCC3_3[3]
VCC3_3[4]
VCC3_3[5]
VCC3_3[6]
VCCP_CORE
VCC3_3[8]
VCC3_3[9]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
PCI
VCC3_3[14]
VCCHDA
VCCSUSHDA
VCCSUS1_05[1]
VCCSUS1_05[2]
VCCSUS1_5[1]
VCCSUS1_5[2]
VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCCL1_05
VCCCL1_5
VCCCL3_3[1]
VCCCL3_3[2]
+1.05V_VCCP
A15
B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
R29
W23
Y23
AB23
AC23
AG29
AJ6
AC10
AD19
AF20
AG24
AC20
B9
F9
G3
G6
J2
J7
K7
AJ4
AJ3
AC8
F17
AD8
F18
A18
D16
D17
E22
AF1
T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7
G22
G23
A24
B24
+VCCDMIPLL
+VCC_DMI_ICH
+3.3V_RUN
C349
0.1U_0402_16V4Z~D
1 2
+3.3V/1.5V_RUN_HDA
VCCSUS1_5_ICH_1
VCCSUS1_5_ICH_2
0.022U_0402_16V7K~D
1
2
VCCCL1_05_ICH
C366 0.1U_0402_16V4Z~D
VCCCL1_5
+3.3V_LAN
C361
1 2
0.1U_0402_16V4Z~D
1
C333
2
0.01U_0402_16V7K~D
1
C340
2
1
2
+3.3V_ALW_ICH
0.022U_0402_16V7K~D
1
C362
2
0.1U_0402_16V4Z~D
1
C334
2
BLM18PG181SN1_0603~D
1 2
10U_0805_4VAM~D
1
C341
2
5ohm@100MHz
1 2
4.7U_0603_6.3V6M~D
L15
BLM18PG181SN1_0603~D
C343
0.1U_0402_16V4Z~D
1
C348
2
0.1U_0402_16V4Z~D
1
1
C353
2
2
@PAD~D
T91
+3.3V_ALW_ICH
0.1U_0402_16V4Z~D
1
C363
2
1U_0603_10V4Z~D
1
C368
0.1U_0402_16V4Z~D
2
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
+1.05V_VCCP_D
1
+1.5V_RUN
+1.05V_VCCP
0.1U_0402_16V4Z~D
4.7U_0603_6.3V6M~D
1
1
C345
C344
2
2
1
C352
0.1U_0402_16V4Z~D
2
C357
0.1U_0402_16V4Z~D
VCCSUS1_5_ICH_2
2
0.1U_0402_16V4Z~D
1
2
R314
0_0603_5%~D
R315
@
0_0603_5%~D
C346
1
U10E
AA26
VSS[1]
AA27
VSS[2]
AA3
AA23
AB28
AB29
AC17
AC26
AC27
AD10
AD12
AD13
AD14
AD17
AD18
AD21
AD28
AD29
AE12
AE13
AE14
AE16
AE17
AE20
AE24
AF13
AF16
AF18
AF22
AH26
AF26
AF27
AG13
AG16
AG18
AG20
AG23
AH12
AH14
AH17
AH19
AH22
AH25
AH28
AJ12
AJ14
AJ17
AA6
AB1
AB4
AB5
AC3
AD1
AD4
AD5
AD6
AD7
AD9
AE2
AE3
AE4
AE6
AE9
AF5
AF7
AF9
AG3
AG6
AG9
AH2
AH5
AH8
AJ8
B11
B14
B17
B2
B20
B23
B5
B8
C26
C27
E11
E14
E18
E2
E21
E24
E5
E8
F16
F28
F29
G12
G14
G18
G21
G24
G26
G27
G8
H2
H23
H28
H29
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
ICH9M REV 1.0
VSS_NCTF[1]
VSS_NCTF[2]
VSS_NCTF[3]
VSS_NCTF[4]
VSS_NCTF[5]
VSS_NCTF[6]
VSS_NCTF[7]
VSS_NCTF[8]
VSS_NCTF[9]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]
+1.5V_RUN
R310
1 2
10_0805_5%~D
12
+3.3V_RUN
12
+1.5V_RUN
Choice to support GMCH
1
C360
0.1U_0402_16V4Z~D
2
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
ICH9-M(4/4)
LA-3801P
1
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
25 66Thursday, June 12, 2008
H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25
A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29
0.8
of
Page 26
5
D D
4
3
2
1
For ODD
JSATA1
1
+5V_MOD
1
2
SATA_ODD_ITX_DRX_P1<23>
0.1U_0402_16V4Z~D
1000P_0402_50V7K~D
1
C377
C376
2
SATA_ODD_ITX_DRX_N1<23>
SATA_ODD_IRX_DTX_N1_C<23>
SATA_ODD_IRX_DTX_P1_C<23>
close SATA connector
SATA_ODD_ITX_DRX_P1
SATA_ODD_ITX_DRX_N1
SATA_ODD_IRX_DTX_N1
12
C374 0.01U_0402_16V7K~D
SATA_ODD_IRX_DTX_P1
12
C375 0.01U_0402_16V7K~D
ODD_DET#<24,38>
+5V_MOD
ODD_DET#
Pleace near ODD CONN
C C
GND
2
RX+
3
RX-
4
GND
5
TX-
6
TX+
7
GND
8
DP
9
+5V
10
+5V
11
MD
12
GND
13
GND
TYCO_2-1759838-8
GND1
GND2
14
15
Main SATA +5V Default
MODC_EN<37>
100K_0402_5%~D
100K_0402_5%~D
12
R319
+5VMOD Source
+3.3V_ALW2
12
R317
2N7002DW-T/R7_SOT363-6
61
Q31A
2
5
12
R316
100K_0402_5%~D
2
MOD_EN
2N7002DW-T/R7_SOT363-6
3
Q31B
4
+5V_ALW+15V_ALW
6
2
1
D
Q29
G
SI3456BDV-T1-E3_TSOP6~D
3
S
+5V_MOD +5V_RUN
0.1U_0603_50V4Z~D
4 5
10U_0805_10V4Z~D
1
C378
1
2
2
C379
100K_0402_5%~D
12
PJP2
1 2
PAD-OPEN 4x4m@
R318
HDD PWR
R320
100K_0402_5%~D
2N7002DW-T/R7_SOT363-6
Q34B
1
2
+5V_ALW
6
2
1
D
7@
G
SI3456BDV-T1-E3_TSOP6~D
3
S
+5V_HDD
4 5
0.1U_0603_50V4Z~D
10U_0805_10V4Z~D
7@
1
C382
C383
2
+5V_HDD Source
+3.3V_ALW
6
2
1
D
G
3
S
4 5
3@
10U_0805_10V4Z~D
1
C79
2
Q32
PJP3
1 2
100K_0402_5%~D
7@
PAD-OPEN 4x4m@
12
R322
Open
Q117
3@
SI3456BDV-T1-E3_TSOP6~D
+3.3V_HDD
PJP47
1 2
3@
100K_0402_5%~D
PAD-OPEN 4x4m@
12
R477
Open
+5V_RUN
+3.3V_RUN
+15V_ALW
+3.3V_ALW2
For HDD
JSATA2
1
PSATA_ITX_DRX_P0<23>
PSATA_ITX_DRX_N0<23>
PSATA_IRX_DTX_N0_C<23>
PSATA_IRX_DTX_P0_C<23>
+5V_HDD +3.3V_HDD
1000P_0402_50V7K~D
B B
0.1U_0402_16V4Z~D
7@
7@
1
1
C384
C385
2
2
0.1U_0402_16V4Z~D
10U_0805_10V4Z~D
3@
3@
1
1
C387
C386
2
2
PSATA_ITX_DRX_P0
PSATA_ITX_DRX_N0
C380 0.01U_0402_16V7K~D
C381 0.01U_0402_16V7K~D
close SATA connector
0.1U_0402_10V7K~D
3@
1
C388
2
12
12
HDD_DET#<24>
PSATA_IRX_DTX_N0
PSATA_IRX_DTX_P0
+3.3V_HDD
HDD_DET#
+5V_HDD
GND
2
RX+
3
RX-
4
GND
5
TX-
6
TX+
7
GND
8
3.3V
9
3.3V
10
3.3V
11
GND
12
GND
13
GND
14
5V
15
5V
16
5V
17
GND
18
Reserved
19
GND
20
12V
21
12V
22
12V
TYCO_1775707-3_RV
GND1
GND2
23
24
HDDC_EN<37>
100K_0402_5%~D
100K_0402_5%~D
R323
12
R321
2N7002DW-T/R7_SOT363-6
61
2
12
Q34A
12
HDD_EN_5V
3
5
4
Main SATA +5V Default
Pleace near HDD CONN
+3.3V_HDD Source
A A
DELL CONFIDENTIAL/PROPRIETA RY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
ODD/HDD CONNECTOR
LA-3801P
26 66Thursday, June 12, 2008
1
0.8
of
Page 27
2
1
+3.3V_RUN
1 2
R786 100_0402_5%~D
SPKR<24>
BEEP<38>
+3.3V_RUN
1000P_0402_50V7K~D
10U_0805_10V6K~D
1
1
B B
2
@
C403
C402
2
1 2
C389 0.1U_0402_16V4Z~D
1 2
C394 0.1U_0402_16V4Z~D
1U_0603_10V6K~D
0.1U_0402_10V7K~D
1
1
C404
C405
2
2
Close to U16 pin1 & pin9
ICH_AZ_CODEC_SDIN0<23>
+3.3V_RUN
0.1U_0402_10V7K~D
1
C407
2
Close to U16 pin3
DMIC_CLK<19>
Close to U16 pin6
ICH_AZ_CODEC_BITCLK
12
R343
@
10_0402_5%~D
1
C412
@
10P_0402_50V8J~D
2
Close to U16 pin5
ICH_AZ_ CODE C_S DOUT
12
R344
@
47_0402_5%~D
1
C416
@
0.1U_0402_10V7K~D
2
A A
Place closely to Pin 13.
AUD_SENSE_A
+3.3V_RUN
12
R350
100K_0402_5%~D
2N7002DW-T/R7_SOT363-6~D
Q38A
ICH_AZ_CODEC_BITCLK<23>
ICH_AZ_CODEC_SDOUT<23>
ICH_AZ_CODEC_SYNC<23>
ICH_AZ_CODEC_RST#<23>
39.2K_0402_1%~D
12
61
2
1 2
R327 499K_0402_1%~D
1 2
R828 499K_0402_1%~D
ICH_AZ_CODEC_BITCLK
1 2
R332 33_0402_5%~D
BLM18BB221SN1D_0603~D
1
2
12
R348
3
4
ICH_AC_SDIN0_R
ICH_AZ_ CODE C_S DOUT
L78
1 2
150P_0402_50V8J~D
DMIC0<19>
C676
AUD_EAPD<28>
20K_0402_1%~D
R349
5
Q38B
2N7002DW-T/R7_SOT363-6~D
12
+3.3V_RUN
DMIC_CLK_R
R346
5.11K_0402_1%~D
1000P_0402_50V7K~D
1
C417
2
2
AUD_PC_BEEP
TRACE>15 mil
R328
@
10K_0402_5%~D
U16
1
DVDD_CORE
9
DVDD_CORE
40
NC/OTP
3
DVDD_IO
6
HDA_BITCLK
8
HDA_SDI_CODEC
5
HDA_SDO
10
HDA_SYNC
11
HDA_RST#
46
DMIC_CLK
2
DMIC0/VOL_UP/GPIO1
4
DMIC1/VOL_DN/GPIO2
47
SPDIF_OUT_0_1/EAPD/GPIO0
48
SPDIF_OUT_0
43
GPIO5
44
GPIO6
45
SPDIF_OUT_1/GPIO7
7
DVSS
49
Thermal PAD GND
92HD71B7X5NLGXB3X8_QFN48_7x7~D
+VDDA_AVDD
12
+3.3V_RUN
12
R355
100K_0402_5%~D
AUD_MIC_SWITCH <33>AUD_HP_NB_SENSE<28,33,37>
92HD71B
27P_0402_50V8J~D
2
C994
1
VREFOUT_B
VREFOUT_C
GPIO4/VREFOUT_E
MONO_OUT
Place closely to Pin 34
Y5
1 2
12MHZ_18PF_1Y712000CE1J~D
25
AVDD
38
AVDD
AUD_SENSE_A
13
SENSE_A
SENSE_B
PORT_A_L
PORT_A_R
PORT_B_L
PORT_B_R
PORT_C_L
PORT_C_R
PORT_D_L
PORT_D_R
PORT_E_L
PORT_E_R
PORT_F_L
PORT_F_R
PC_BEEP
VREFFILT
AUD_SENSE_B
34
39
41
37
NC
21
22
28
23
24
29
35
36
AUD_DOCK_MIC_IN_L
14
AUD_DOCK_MIC_IN_R
15
31
AUD_DOCK_HP_OUT_L
16
17
30
GPIO3
18
NC
19
NC
20
NC
AUD_PC_BEEP
12
32
CAP2
33
CAP2
VREFFILT
27
26
AVSS
42
AVSS
12
2N7002DW-T/R7_SOT363-6~D
XTALO_12MHZ
XTALI_12MHZ
+VDDA_AVDD
0.1U_0402_10V7K~D
1
C399
2
C1068
1000P_0402_50V7K~D
1 2
1 2
C1069
1000P_0402_50V7K~D
1
C414
2
10U_0805_10V6K~D
AUD_SENSE_B
100K_0402_5%~D
R353
2
Q40A
27P_0402_50V8J~D
2
C995
1
L77
BLM18EG601SN1D_2P~D
1 2
0.1U_0402_10V7K~D
10U_0805_10V6K~D
1
1
@
C401
C400
2
2
AUD_HP_OUT_L <28>
AUD_HP_OUT_R <28>
AUD_EXT_MIC_L <33>
AUD_EXT_MIC_R <33>
+VREFOUT
AUD_LINE_OUT_L <28>
AUD_LINE_OUT_R <28>
C408 1U_0805_16V7K~D
DOCK_MIC_IN_L_C
12
12
C409 1U_0805_16V7K~D
C410 0.22U_0805_16V7K~D
AUD_DOCK_HP_L_C
1 2
AUD_DOCK_HP_R_C
1 2
C411 0.22U_0805_16V7K~D
1
C415
2
1U_0603_10V6K~D
5.11K_0402_1%~D
1000P_0402_50V7K~D
39.2K_0402_1%~D
20K_0402_1%~D
12
R351
61
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
1
12
R352
2
L18
BLM18EG601SN1D_2P~D
1 2
+3.3V_RUN_I2S_AV DD_HPV DD
12
L70
47UH_LBMF1608T470M_20%~D
+VDDA
+3.3V_RUN
12
12
Select I2C & SPI
interface
R1091 200_0402_5%~D
R1092 200_0402_5%~D
R340 200_0402_5%~D
R342 200_0402_5%~D
1 2
1 2
1 2
1 2
AUD_DOCK_MIC_IN_L_C
AUD_DOCK_MIC_IN_R_CDOCK_MIC_IN_R_C
AUD_DOCK_HP_L_R
AUD_DOCK_HP_R_RAUD_DOCK_HP_OUT_R
Place close to U16
+VDDA_AVDD
R347
12
+3.3V_RUN+3.3V_RUN
C420
12
R354
100K_0402_5%~D
3
5
Q40B
4
2N7002DW-T/R7_SOT363-6~D
4.7U_0603_6.3V4Z~D
1
2
C397
2
1
R329
@
10K_0402_5%~D
R331
10K_0402_5%~D
10M_0402_5%~D
R1089
1 2
EN_I2S_NB_CODEC<37>
DOCK_MIC_DET <37>DOCK_HP_DET<37>
0.1U_0402_16V7K~D
C398
+3.3V_RUN
10M_0402_5%~D
R1090
1 2
1000P_0402_50V7K~D
C1066
1
1
2
2
74LVC1G14GV_SOT753-5
+3.3V_RUN_I2S_VDD
4.7U_0603_6.3V4Z~D
1
C391
2
AUD_DOCK_HP_L_R
1000P_0402_50V7K~D
AUD_DOCK_HP_R_R
C1067
DAI_SMBCLK
DAI_SMBDATA
XTALI_12MHZ
XTALO_12MHZ
1 2
R330
@
10K_0402_5%~D
+3.3V_RUN
2
1
I2S_BCLK
I2S_LRCLK
I2S_DO
I2S_12MHZ
R345
1K_0402_5%~D
+3.3V_RUN +3.3V_RUN
0.1U_0402_16V7K~D
@
C418
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
2
2
C393
C392
1
1
+3.3V_RUN_I2S_AVDD
10K_0402_5%~D
12
R333
DAI_SMBCLK
DAI_SMBDATA
For next version I2S.
will disconnect SMBUS
and PU.
Need check the PU
value.
0.1U_0402_16V7K~D
C413
U17
16
VCC
2
1A
4
2A
6
3A
10
4A
12
5A
14
6A
1
OE1#
15
12
OE2#
CD74HC366M96_SO16~D
2
5
1
1
P
NC
4
A2Y
G
U18
@
3
1
1
2
R762 0_0402_5%~D
U15
DCVDD3DVSS
18
AVDD
12
HPVDD
5
DBVDD
24
LLINEIN
23
RLINEIN
28
SCLK
27
SDIN
1
MCLK/XTI
2
XTO/ POR
22
MICIN
21
MICBIAS
25
MODE
26
CSB
20
VMID
SSM2602_LFCSP28_5X5~D
C406
10U_0805_10V6K~D
+3.3V_RUN
12
+3.3V_RUN
3
1Y#
5
2Y#
7
3Y#
9
4Y#
11
5Y#
13
6Y#
8
GND
0.1U_0402_16V7K~D
2
@
C419
1
4
1 2
SSM2602
2.2K_0402_5%~D
12
R334
2
3
1
I2S_DI#
1
NC
4
19
AVSS
15
HPVSS
16
LOUT
17
ROUT
13
LHPOUT
14
RHPOUT
6
CLKOUT
7
BCLK
8
DACDAT
10
ADCDAT
9
DACLRC
11
ADCLRC
29
Thermal Pad
+3.3V_RUN
2.2K_0402_5%~D
R335
5
4
Q36B
2N7002DW-T/R7_SOT363-6~D
DA204U_SOT323-3~D
DA204U_SOT323-3~D
2
3
@
@
D17
D18
1
+3.3V_RUN
3
1
5
P
A2Y
G
U19
@
3
74LVC1G14GV_SOT753-5
AUD_DOCK_MIC_IN_L_C
AUD_DOCK_MIC_IN_R_C
NC_LHPOUT
I2S_12MHZ
I2S_BCLK
I2S_DI#
I2S_DO
I2S_LRCLK
NC_ADCLRC
2
61
2
DA204U_SOT323-3~D
@
D19
CKG_SMBCLK <6,38,48>
CKG_SMBDAT <6,38,48>
2
3
1
Q36A
2N7002DW-T/R7_SOT363-6~D
3
3
1
2
D20
DA204U_SOT323-3~D@
T56 PAD~D
T61PAD~D
DA204U_SOT323-3~D
@
D55
DAI_DI <35>
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Azalia (HD) Codec
LA-3801P
27 66Thursday, June 12, 2008
@
@
DAI_BCLK# <35>
DAI_LRCK# <35>
DAI_DO# <35>
DAI_12MHZ# <35>
0.8
of
Page 28
5
4
3
2
1
+5V_SPK_AMP
AUD_NB_MUTE
AUD_LINE_OUT_L<27>
AUD_LINE_OUT_R<27>
AUD_HP_OUT_L<27>
AUD_HP_OUT_R<27>
+5V_SPK_AMP
R364
100K_0402_5%~D
2
Q42A
5
Q42B
AUD_HP_NB_ SENSE
AUD_EAPD
12
R365
100K_0402_5%~D
1 2
61
3
4
C434
0 .033U_0805_50V7K~D
C435
0 .033U_0805_50V7K~D
1 2
C436
10U_1206_25VAK~D
1 2
C437
10U_1206_25VAK~D
AUD_HP_NB_SENSE<27,33,37>
D D
AUD_EAPD<27>
C C
B B
AUD_SPK_ENABLE#
AUD_EAPD<27>
2N7002DW-T/R7_SOT363-6~D
AUD_NB_MUTE<37>
2N7002DW-T/R7_SOT363-6~D
C421
1 2
5
0.1U_0402_10V7K~D
U20
2
P
A
4
Y
1
B
G
74AHCT1G08GW_SOT353-5~D
3
+5V_SPK_AMP
C422
1 2
5
0.1U_0402_10V7K~D
U21
2
P
A
4
Y
1
B
G
74AHCT1G08GW_SOT353-5~D
3
12
12
1 2
R818 1K_0402_1%~D
1 2
R827 1K_0402_1%~D
1 2
@
R357
0_0402_5%~D
47P_0402_50V8J~D
47P_0402_50V8J~D
@
@
1
1
1
C440
C439
2
2
2
+5V_SPK_AMP
For TPA6040A,pop
R368,depop R367
RUN_ON
1 2
R368 0_0402_5%~D
AUD_HP_EN
47P_0402_50V8J~D
@
1
C441
2
+5V_SPK_AMP
L19
BLM21PG600SN1D_0805~D
CPVSS13HPVSS
1 2
+5V_SPK_AMP
8
18
30
VDD
SPVDD
SPVDD
SPGND21SPGND
SGND
TP
5
28
33
6
LOUT+
7
LOUT-
20
ROUT+
19
ROUT-
16
HP_OUTL
15
HP_OUTR
31
GAIN0
32
GAIN1
4
SPKR_LIN-
29
REG_OUT
1
SPKR_RIN-
TPA6040A4RHBR_QFN32_5X5~D
Place Close to Audio Chip P la ce Cl ose to Audio Chip
1U_0603_10V6K~D
47P_0402_50V8J~D
1 2
@
C438 1U_0603_10V6K~D
C442
1U_0603_10V6K~D
10U_0805_10V6K~D
2
1
C444
1
2
12
@
R367
100K_0402_5%~D
AUD_AMP_MUTE#
2
1
SPKR_INL_C
SPKR_INR_C
HP_INL_C
HP_INR_C
AUD_SPK_ENABLE#
AUD_HP_EN
AUD_AMP_MUTE#
C445
12
R363
1M_0402_1%~D
1U_0603_10V6K~D
C427
1U_0603_10V6K~D
2
1
2
1
C428
1
2
C1P
C1N
C446
12
C450
1U_0603_10V6K~D
0.1U_0402_10V7K~D
C429
3
2
27
26
24
23
22
25
17
9
10
12
11
+CPVSS
U22
SPKR_LIN+
SPKR_RIN+
HP_INL
HP_INR
BYPASS
/SPKR_EN
HP_EN
REG_EN
HPVDD
CPVDD
C1P
C1N
CPGND
14
8mil
SPEAKER_DET#<24>
+5V_RUN
W=40mils
1U_0603_10V6K~D
2
C430
1
INT_SPK_L1
INT_SPK_L2
INT_SPK_R1
INT_SPK_R2
HP_SPK_L1
HP_SPK_R1
AUD_GAIN1
AUD_GAIN2
@
C443
0.033U_0402_16V7K~D
SET
0_0402_5%~D
12
@
R366
For
MAX9789A
depop
C449,pop
R366
+5V_SPK_AMP
1U_0603_10V6K~D
2
1
C449
10U_0805_10V6K~D
1
C432
C433
2
HP_SPK_L1 <33>
HP_SPK_R1 <33>
1U_0603_10V6K~D
2
2
C447
1
1
RUN_ON <19,37,40,41>
1U_0603_10V6K~D
+VDDA
C448
Minimum 150 mA
10U_0805_10V6K~D
1
C431
2
For MAX9789A, depop C443,pop R362
R362 0_0402_5%~D
1 2
1 2
0.033U_0402_16V7K~D
2
1
15 mils trace
INT_SPK_R1
INT_SPK_R2
INT_SPK_L1
INT_SPK_L2
1
2
100P_0402_50V8J~D
@
C423
100P_0402_50V8J~D
@
1
1
C424
2
2
*
100P_0402_50V8J~D
100P_0402_50V8J~D
@
@
1
C426
C425
2
Gain Setting
AUD_GAIN1
AUD_GAIN2
GAIN1 INPUTAV(inv)GAIN2
0
0
1
0
1
0
11
+5V_SPK_AMP
100K_0402_5%~D
12
100K_0402_5%~D
12
10dB
15.6dB
21.6dB
Speaker Connector
100K_0402_5%~D
@
12
R359
R358
100K_0402_5%~D
@
12
R360
R361
IMPEDANCE
6dB
JSPK1
1
1
2
2
3
3
4
4
5
5
6
6
7
GND
8
GND
MOLEX_53780-0670~D
82K ohm
66K ohm
45K ohm
26K ohm
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
AMP and PHONE JACK
LA-3801P
28 66T h u r s da y, June 12, 2008
1
0.8
of
Page 29
5
PCIE_IRX_GLANTX_P6_C
PCIE_IRX_GLANTX_P6<24>
PCIE_IRX_GLANTX_N6<24>
PCIE_ITX_GLANRX_P6_C<24>
PCIE_ITX_GLANRX_N6_C<24>
LAN_CLK<23>
+3.3V_LAN
1 2
R1008 4.3K_0402_5%~D@
2 1
D38 RB751S40T1_SOD523-2~D@
C677 1U_0402_6.3V6K~D@
1 2
1 2
Y2
LAN_RSTSYNC<23>
LAN_TX0<23>
LAN_TX1<23>
LAN_TX2<23>
LAN_RX0<23>
LAN_RX1<23>
LAN_RX2<23>
LOM_ACTLED_YEL#<30>
LOM_SPD100LED_ORG#<30>
LOM_SPD10LED_GRN#<30>
R373 0_0402_5%~D@
R375 1K_0402_5%~D@
R376 1K_0402_5%~D
12
2
1
D D
For internal 1.0V
regulator strap
R376 and unstuff
R375,R377 and Q46
LAN_DISABLE#<24>
C C
LAN_DISABLE#_R<37>
R379 100_0402_5%~D
25MHZ_12PF1HX25000CE1G~D
2
C475
12P_0402_50V8J~D
1
12
C451 0.1U_0402_10V7K~D
PCIE_IRX_GLANTX_N6_C
12
C452 0.1U_0402_10V7K~D
1 2
R369 33_0402_5%~D
R372 4.99K_0402_1%~D
1 2
12
12
LAN_DISABLE#_R
1 2
R378 10K_0402_5%~D
XTALO
Need to ensure
crystal at least
XTALI
300uW max power
drive-level
C476
12P_0402_50V8J~D
12
LAN_TEST_P
LAN_TEST_N
XTALO
XTALI
China TPM
+3.3V_RUN
51K_0402_1%~D
4@
12
R893
R381
C_TPM_LPC_EN
TESTI
R383
4@
100_0402_1%~D
1 2
U24
4@
1
GPIO1
2
GPIO2
6
GPIO_EXPRESS_00
28
LPCPD#
26
LAD0
23
LAD1
20
LAD2
17
LAD3
21
LCLK
22
LFRAME#
16
LRESET#
27
SERIRQ
15
CLKRUN#
7
PP
9
TESTBI/BADD
8
TESTI
SSX35BCB_TSSOP28~D
B B
A A
LOW:Power Down Mode
High:Working Mode
SP_TPM_LPC_EN<36,37>
+3.3V_RUN
1 2
R382
@
4.7K_0402_5%~D
CLK_PCI_TPM_CHA<6>
LPC_LFRAME#<23,36,37,38>
IRQ_SERIRQ<24,31,36,37,38>
R884
@
4.7K_0402_5%~D
5
LPC_LAD0<23,36,37,38>
LPC_LAD1<23,36,37,38>
LPC_LAD2<23,36,37,38>
LPC_LAD3<23,36,37,38>
PCI_RST#<22,31>
CLKRUN#<24,31,37,38>
4@
0_0402_5%~D
1 2
1 2
U23
52
GLAN_TXP
53
GLAN_TXN
55
GLAN_RXP
56
GLAN_RXN
45
JKCLK
50
JRSTSYNC
42
JTXD_0
43
JTXD_1
44
JTXD_2
47
JRXD_0
48
JRXD_1
49
JRXD_2
4
LED_0
2
LED_1
1
LED_2
15
RSET
12
IEEE_TEST_P
13
IEEE_TEST_N
34
DIS_REG10
37
LAN_DISABLE_N
36
TEST_EN
9
XTAL2
10
XTAL1
4
LAN_TX0-
26
MDI_N_0
27
MDI_P_0
22
MDI_N_1
23
MDI_P_1
20
MDI_N_2
21
MDI_P_2
16
MDI_N_3
17
MDI_P_3
3
VDDO_33_3
DVDD_10_5
DVDD_10_8
CTRL18
CTRL10
GND_PAD
46
28
5
8
33
38
11
14
19
18
24
25
41
54
32
30
29
31
51
57
R889 0_0402_5%~D@
1 2
R890 200_0402_5%~D@
1 2
R915 200_0402_5%~D@
1 2
R916 200_0402_5%~D@
1 2
R891 1K_0402_5%~D@
2
1
C_TPM_LPC_EN
VDDO_33_46
AVDD_33_28
DVDD_10_33
DVDD_10_38
AVDD_18_11
AVDD_18_14
AVDD_18_19
AVDD_18_18
AVDD_18_24
AVDD_18_25
AVDD_18_41
AVDD_18_54
AVDD_18_32
AVDD_18_30
RESERVED_NC
JTAG_TMS39JTAG_TCK40JTAG_TRST35JTAG_TDI7JTAG_TDO
82567LM_QFN56~D
6
JTAG_TDO_LAN
JTAG_TDI_LAN
JTAG_TMS_LAN
JTAG_TCK_LAN
JTAG_TRST_LAN
+3.3V_RUN
10
VDD_0
19
VDD_1
24
VDD_2
11
GND_11
18
GND_18
25
GND_25
4
GND_4
3
NC_3
5
NC_5
12
NC_12
13
NC_13
14
NC_14
4
LAN_TX0+
LAN_TX1-
LAN_TX1+
LAN_TX2-
LAN_TX2+LAN_CLK_R
LAN_TX3-
LAN_TX3+
1 2
0.1U_0402_16V4Z~D
2
4@
C484
1
LAN_TX0- <30>
LAN_TX0+ <30>
LAN_TX1- <30>
LAN_TX1+ <30>
LAN_TX2- <30>
LAN_TX2+ <30>
LAN_TX3- <30>
LAN_TX3+ <30>
+1V_LAN_M
+1.8V_LAN_M
REGCTL_PNP18
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
4@
4@
C485
1
12
R892
4@
4.7K_0402_5%~D
0.1U_0402_16V4Z~D
2
1
+3.3V_LAN +3.3V_LAN
10U_0603_6.3V6M~D
1
4@
C487
C486
2
3
+3.3V_LAN
4.7U_0603_6.3V4Z~D
2
C463
C464
1
VOUT = 1.204 (1+R1/R2),
where R1 = R1017 + R1018, R2 = R1019
4.7U_0603_6.3V4Z~D
C482
1
2
DOCKED
DOCKED<30,37>
Pull-up on LPC_EN_R
Pull-down on LPC_EN_R
Series from EC to LPC_EN_R
Series from EC to LPD#
Pull-up on LPD#
Pull-up on EC
Pull-down on China TPM
Series from EC to China PD#
Broadcom USH
China TPM
LPCBus Series Resistors
2
1
Trace=12mil
REGCTL_PNP18
1
VIN
2
GND
3
EN
E
3
B
2
MMBT3906WT1G_SC70-3~D
1
12
R1020
10K_0402_5%~D
4.7U_0603_6.3V4Z~D
C453
VOUT
TPS73601
Q146
C
+3.3V_ALW
0.1U_0402_16V4Z~D
2
C454
1
ENAB_3VLAN<40>
R374
5.1K_0402_5%~D
Q50
5
4
ADJ
PART/PINDESCRIPTION B0 USHA0 USHRef Des
USH pin R6 LPCEN
USH pin R6 LPCEN
EC to USH Pin R6 LPCEN
EC to USH Pin P7 LPCPD_N
USH pin P7 LPCPD_N
SIO pin 105 OUT65
To China TPM U24 pin 28
SIO to China Pin 28 LPCPD#
U32 USH
U24 China TPM
R705,R723,R7 24,R732,R733
2
Q44
STS11NF30L_SO8~D
8
7
5
+3.3V_LAN
12
12
R370
2_1210_5%~D
12
Trace=12mil
3
1
2
12
R1017
4.64K_0402_1%
12
R1018
39.2K_0402_1%~D
12
R1019
36.5K_0402_1%~D
ROUSH USH and China TPM B OM Option
TPM_ID(Strap Low) ICH9M GPIO6 Pin AH21 POP
4@ is for China TPM only
5@ is for Broadcom TPM only
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
1
2
36
4
R371
2_1210_5%~D
+3.3V_LAN_R
1
2
C_0402
Q45
BCP69_SOT223~D
4
+LOM_VCT
1
2
0.1U_0402_16V4Z~D
C465
+1.8V_LAN_M
4.7U_0603_6.3V4Z~D
C483
10U_0805_10V4Z~D
1
2
C_0805
10U_0805_10V4Z~D
1
2
C_0805
1
2
C_0402
1
Layout Notice : Place as close
chip as possible.
+3.3V_LAN
4.7U_0603_6.3V4Z~D
4.7U_0603_6.3V4Z~D
2
2
C457
C456
1
1
0.1U_0402_16V4Z~D
10U_0805_10V4Z~D
2
1
C468
C467
1
2
C_0805
4.7U_0805_10V4Z~D
4.7U_0805_10V4Z~D
1
1
C477
2
2
C_0805
C_0805
Follow 82567 schematic
chiplist that VCC_1.0 for
external use 1 0uF XR5 *2 and
0.1uF *2
for internal u se 4.7uF X5R *2
and 0.1uF *1
C478
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
2
C459
C458
1
1
0.1U_0402_16V4Z~D
2
C469
1
0.1U_0402_16V4Z~D
2
1
2
1
C479
X02
build
4.7U_0603_6.3V4Z~D
0.1U_0402_16V4Z~D
2
1
1
2
C471
C470
2
1
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
2
C480
C603
1
1
470P_0402_50V7K~D
C466
C474
0.1U_0402_16V4Z~D
C481
10U_0805_10V4Z~D
1
C455
2
C_0805
+1.8V_LAN_M
+1V_LAN_M
A0 w/CHINAB0 w/CHINA
@
R841
R483
5@ R464
R466
R474
R788
4@ R892
4@ R893
U32
4@ U24
5@
4@ R922
5@ R273@POP@POP
POP POP
POP
@
POP
@
@
@
POPPOP POP POP
@
@
@
@
@
POP
POP
POP
POP POP
@
POP
POP
@@
POP POP
@
POP
@
@
@
POP
POP
POP
@@
POP
@
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
LAN-82567LM
LA-3801P
29 66T h u r s da y, June 12, 2008
1
470P_0402_50V7K~D
1
C472
C473
2
0.1U_0402_16V4Z~D
C645
@
@
@
@
@TPM_ID (Strap High) ICH9M GPIO6 Pin AH21
0.8
of
Page 30
5
4
3
2
1
+3.3V_LAN
D D
LAN_TX0+<29>
LAN_TX0-<29>
LAN_TX1+<29>
LAN_TX1-<29>
LAN_TX2+<29>
LAN_TX2-<29>
LAN_TX3+<29>
LAN_TX3-<29>
C C
DOCKED<29,37>
Layout Notice : Place bead as
close PI3L500 as possible
1 2
L20 22NH_0603CS-220EJTS_5%_0603~D
1 2
L21 22NH_0603CS-220EJTS_5%_0603~D
LAN_TX1+
1 2
L22 22NH_0603CS-220EJTS_5%_0603~D
LAN_TX1-
1 2
L23 22NH_0603CS-220EJTS_5%_0603~D
1 2
L24 22NH_0603CS-220EJTS_5%_0603~D
LAN_TX2-
1 2
L25 22NH_0603CS-220EJTS_5%_0603~D
1 2
L26 22NH_0603CS-220EJTS_5%_0603~D
LAN_TX3-
1 2
L27 22NH_0603CS-220EJTS_5%_0603~D
DOCKED
0.1U_0402_16V4Z~D
2
C460
1
LOM_ACTLED_YEL#<29>
LOM_SPD10LED_GRN#<29>
LOM_SPD100LED_ORG#<29>
FROM NIC DOCKED
0.1U_0402_16V4Z~D
2
C461
1
LAN_TX0+RLAN_TX0+
LAN_TX0-RLAN_TX0-
LAN_TX1+R
LAN_TX1-R
LAN_TX2+RLAN_TX2+
LAN_TX2-R
LAN_TX3+RLAN_TX3+
LAN_TX3-R
1: TO DOCK
0: TO RJ45
0.1U_0402_16V4Z~D
2
C462
1
56
U25
2
A0
3
A1
7
A2
8
A3
11
A4
12
A5
14
A6
15
A7
17
SEL
19
LED0
20
LED1
54
LED2
5
NC
57
PAD_GND
GND01GND16GND29GND313GND416GND521GND624GND728GND833GND939GND1044GND1149GND1253GND13
LAN ANALOG
SWITCH
0B1
VDD04VDD110VDD218VDD327VDD438VDD550VDD6
1B1
2B1
3B1
4B1
5B1
6B1
7B1
0LED1
1LED1
2LED1
0B2
1B2
2B2
3B2
4B2
5B2
6B2
7B2
0LED2
1LED2
2LED2
PI3L500-AZFEX_TQFN56~D
55
48
47
43
42
37
36
32
31
22
23
52
46
45
41
40
35
34
30
29
25
26
51
SW_LAN_TX0+
SW_LAN_TX0-
SW_LAN_TX1+
SW_LAN_TX1-
SW_LAN_TX2+
SW_LAN_TX2-
SW_LAN_TX3+
SW_LAN_TX3-
LAN_LEDACT#
LINK_LED10#
LINK_LED100#
DOCK_LOM_TRD0+
DOCK_LOM_TRD0-
DOCK_LOM_TRD1+
DOCK_LOM_TRD1-
DOCK_LOM_TRD2+
DOCK_LOM_TRD2-
DOCK_LOM_TRD3+
DOCK_LOM_TRD3-
DOCK_LOM_ACTLED_YEL#
DOCK_LOM_SPD10LED_GRN#
DOCK_LOM_SPD100LED_ORG#
SW_LAN_TX0+ <33>
SW_LAN_TX0- <33>
SW_LAN_TX1+ <33>
SW_LAN_TX1- <33>
SW_LAN_TX2+ <33>
SW_LAN_TX2- <33>
SW_LAN_TX3+ <33>
SW_LAN_TX3- <33>
DOCK_LOM_TRD0+ <35>
DOCK_LOM_TRD0- <35>
DOCK_LOM_TRD1+ <35>
DOCK_LOM_TRD1- <35>
DOCK_LOM_TRD2+ <35>
DOCK_LOM_TRD2- <35>
DOCK_LOM_TRD3+ <35>
DOCK_LOM_TRD3- <35>
DOCK_LOM_ACTLED_YEL# <35>
DOCK_LOM_SPD10LED_GRN# <35>
DOCK_LOM_SPD100LED_ORG# <35>
TO
DOCK
12
10K_0402_5%~D
@
R392
+3.3V_LAN
10K_0402_5%~D
12
12
@
R393
LED_10_GRN_R#
LED_100_ORG_R#
10K_0402_5%~D
@
R394
LAN_ACTLED_YEL_R# <33>
LED_10_GRN_R# <33>
LED_100_ORG_R# <33>
B B
LOM_ACTLED_YEL#
LOM_SPD10LED_GRN#
LOM_SPD100LED_ORG#
LAN_LEDACT# LAN_ACTLED_YEL_R#
LINK_LED10#
LINK_LED100#
A A
1 2
R395 150_0402_5%~D
1 2
R396 110_0402_5%~D
1 2
R397 200_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
LAN TRANSFOMER
LA-3801P
30 66T h u r s da y, June 12, 2008
1
0.8
of
Page 31
5
U26A
PCI_AD[0..31]<22>
+3.3V_RUN
D D
C C
B B
A A
1 2
R400 10K_0402_5%~D
1 2
R402 100K_0402_5%~D
1 2
R405 10K_0402_5%~D
+3.3V_RUN_PHY
1 2
R404 0_0402_5%~D
1 2
R406 10K_0402_5%~D
1 2
R1037 100K_0402_5%~D@
0.01U_0402_16V7K~D
10K_0402_1%~D
C513
2
1
1 2
USBP7-_EXP<32>
USBP7+_EXP<32>
CLK_PCI_PCM
10_0402_5%~D
12
R418
4.7P_0402_50V8C~D
PCI_CBS_TERM
2
C517
1
R417
CB_HWSP ND#
CBS_SPK
UDIO3
CPS
UDIO4
CBS_SPK
PCI_PAR<22>
PCI_C_BE0#<22>
PCI_C_BE1#<22>
PCI_C_BE2#<22>
PCI_AD17 CBS_IDSEL
1 2
R409 100_0402_5%~D
PCI_FRAME#<22>
PCI_IRDY#<22>
PCI_TRDY#<22>
PCI_DEVSEL#<22>
PCI_STOP#<22>
USBP7-<24>
USBP7+<24>
R671
2@
0_0402_5%~D
12
12
R739
2@
0_0402_5%~D
5
PCI_C_BE3#<22>
PCI_REQ1#<22>
PCI_GNT1#<22>
PCI_PERR#<22>
PCI_SERR#<22>
PCI_RST#<22,29>
CLK_PCI_PCM<6>
CLKRUN#<24,29,37,38>
CB_HWSPND#<37>
PCI_PIRQD#<22>
PCI_PIRQB#<22>
PCI_PIRQC#<22>
IRQ_SERIRQ<24,29,36,37,38>
R802
0_0402_5%~D1@
1@
0_0402_5%~D
1 2
C622
@
0.01U_0402_16V7K~D
R803
+3.3V_RUN
12
12
FIL0
12
1
2
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_PAR
PCI_C_BE0#
PCI_C_BE1#
PCI_C_BE2#
PCI_C_BE3#
PCI_REQ1#
PCI_GNT1#
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_DEVSEL#
PCI_STOP#
PCI_PERR#
PCI_SERR#
CBUS_GRST#
PCI_RST#
CLK_PCI_PCM
CLKRUN#
CB_HWSP ND#
UDIO3
UDIO4
CBS_SPK
TPAP0
TPAN0
TPBP0
TPBN0
TPBIAS0
CPS
CBVREF
CBREXT
R5C847XI
R5C847XO
FIL0
USBP7-_R1
USBP7+_R1
100K_0402_5%~D
R420
CBUS_GRST#
1U_0603_10V4Z~D
C516
R5C847-CSP208Q
W12
AD0
V12
AD1
T12
AD2
W11
AD3
V11
AD4
T11
AD5
W9
AD6
V9
AD7
R9
AD8
W8
AD9
V8
AD10
T8
AD11
R8
AD12
W7
AD13
V7
AD14
T7
AD15
V1
AD16
U1
AD17
U2
AD18
T1
AD19
T2
AD20
R1
AD21
R2
AD22
R4
AD23
P4
AD24
P5
AD25
N1
AD26
N2
AD27
N4
AD28
N5
AD29
M1
AD30
M2
AD31
V6
PAR
T9
C/BE0#
W6
C/BE1#
W2
C/BE2#
P2
C/BE3#
P1
IDSEL
M4
REQ#
M5
GNT#
V3
FRAME#
V4
IRDY#
W4
TRDY#
T5
DEVSEL#
V5
STOP#
W5
PERR#
T6
SERR#
G2
GBRST#
L4
PCIRST#
K1
PCICLK
L5
CLKRUN#
F2
HWSPND#
J2
INTA#
K4
INTB#
K2
INTC#
J4
UDIO0/SRIRQ#
H1
UDIO1
H2
UDIO2
H4
UDIO3
H5
UDIO4
G1
UDIO5
G4
RI_OUT#/PME#
F1
SPKROUT#
B12
TPAP0
A12
TPAN0
B13
TPBP0
A13
TPBN0
D12
TPBIAS0
D11
CPS
D13
VREF
B14
REXT
A16
XI
B16
XO
A14
FIL0
W14
USBDM
V14
USBDP
F4
TEST1
R7
TEST2
R5C847-CSP208Q_CSP208~D
4
CDATA10/CAD31
CDATA9/CAD30
CDATA1/CAD29
CDATA8/CAD28
CDATA0/CAD27
CADR0/CAD26
CADR1/CAD25
CADR2/CAD24
CADR3/CAD23
CADR4/CAD22
CADR5/CAD21
CADR6/CAD20
CADR25/CAD19
CADR7/CAD18
CADR24/CAD17
CADR17/CAD16
IOWR#/CAD15
CADR9/CAD14
IORD#/CAD13
CADR11/CAD12
PCI I/F
OE#/CAD11
CE2#/CAD10
CADR10/CAD9
CDATA15/CAD8
CDATA7/CAD7
CDATA13/CAD6
CDATA6/CAD5
CDATA12/CAD4
CDATA5/CAD3
CDATA11/CAD2
CDATA4/CAD1
CDATA3/CAD0
REG#/CCBE3#
CADR12/CCBE2#
CADR8/CCBE1#
CE1#/CCBE0#
CADR13/CPAR
CADR23/CFRAME#
CADR22/CTRDY#
CADR15/CIRDY#
CADR20/CSTOP#
CADR21/CDEVSEL#
CADR19
CADR14/CPERR#
WAIT#/CSERR#
16 bit PC card I/F
INPACK#/CREQ#
WE#/CGNT#
BVD1/CSTSCHG
WP/CCLKRUN#
RST&
CLK
AUDIO
CADR16/CCLK
READY/CINT#
RESET/CRST#
BVD2/CAUDIO
INT &
1394 I/F
USB TEST
Media Card I/F
C514
27P_0402_50V8J~D
C515
22P_0402_50V8J~D
4
CD1#/CCD1#
CD2#/CCD2#
VS1#/CVS1
VS2#/CVS2
CDATA14
CDATA2
CADR18
VPPEN0
VPPEN1
VCC5EN#
VCC3EN#
MDIO00
MDIO01
MDIO02
MDIO03
MDIO04
MDIO05
MDIO06
MDIO07
MDIO08
MDIO09
MDIO10
MDIO11
MDIO12
MDIO13
MDIO14
MDIO15
MDIO16
MDIO17
MDIO18
MDIO19
12
12
B19
C18
D19
D18
E19
E16
F18
F15
G18
G15
H18
H15
J18
J16
J15
P16
CBS_CAD15/USB7-
P19
R19
CBS_CAD13/USBP7+
P18
R18
T19
T18
U19
U18
W17
V17
W16
V16
W15
V15
T15
R14
CBS_CC/BE3#
F16
CBS_CC/BE2#
K18
CBS_CC/BE1#
P15
CBS_CC/BE0#
V19
CBS_CPAR
N15
CBS_CFRAME#
K16
CBS_CTRDY#
L16
CBS_CIRDY#
K15
CBS_CSTOP#
M16
CBS_CDEVSEL#
L18
CBS_CBLOCK#
N19
CBS_CPERR#
N18
CBS_CSERR#
G16
CBS_CREQ#
G19
CBS_CGNT#
M15
CBS_CSTSCHNG
E18
CBS_CCLKRUN#
A18
CBS_CCLK_R
L19
CBS_CINT#
M18
CBS_CRST#
H19
CBS_CAUDIO
F19
CBS_CCD1#
T14
CBS_CCD2#
D15
CBS_CVS1
R16
CBS_CVS2
H16
CBS_DATA14
W18
CBS_DATA2
C19
CBS_DATA18
N16
VPPEN0
V13
VPPEN1
W13
VCC5EN#
R13
VCC3EN#
T13
SDCD#/MMCCD#
B1
A2
A3
SDWP#
B3
CARD_PWR
B4
A5
B5
MDIO07
D5
SDCMD/MMCCMD
A6
SDCLK/MMCCLK
B6
SDDAT0/MMCDAT0
D6
SDDAT1/MMCDAT1
E6
SDDAT2/MMCDAT2
A7
SDDAT3/MMCDAT3
B7
MMCDAT4
D7
MMCDAT5
E7
MMCDAT6
A8
MMCDAT7
B8
D8
E8
X3
24.576MHz_16P_1BG24576CKIA~D
1 2
R421 0_0402_5%~D
12
R414 0_0402_5%~D
1 2
R416 0_0402_5%~D
Close to Pin A16,B16
CBS_CAD31 <32>
CBS_CAD30 <32>
CBS_CAD29 <32>
CBS_CAD28 <32>
CBS_CAD27 <32>
CBS_CAD26 <32>
CBS_CAD25 <32>
CBS_CAD24 <32>
CBS_CAD23 <32>
CBS_CAD22 <32>
CBS_CAD21 <32>
CBS_CAD20 <32>
CBS_CAD19 <32>
CBS_CAD18 <32>
CBS_CAD17 <32>
CBS_CAD16 <32>
CBS_CAD15/USBP7- <32>
CBS_CAD14 <32>
CBS_CAD13/USBP7+ <32>
CBS_CAD12 <32>
CBS_CAD11 <32>
CBS_CAD10 <32>
CBS_CAD9 <32>
CBS_CAD8 <32>
CBS_CAD7 <32>
CBS_CAD6 <32>
CBS_CAD5 <32>
CBS_CAD4 <32>
CBS_CAD3 <32>
CBS_CAD2 <32>
CBS_CAD1 <32>
CBS_CAD0 <32>
CBS_CC/BE3# <32>
CBS_CC/BE2# <32>
CBS_CC/BE1# <32>
CBS_CC/BE0# <32>
CBS_CPAR <32>
CBS_CFRAME# <32>
CBS_CTRDY# <32>
CBS_CIRDY# <32>
CBS_CSTOP# <32>
CBS_CDEVSEL# <32>
CBS_CBLOCK# <32>
CBS_CPERR# <32>
CBS_CSERR# <32>
CBS_CREQ# <32>
CBS_CGNT# <32>
CBS_CSTSCHNG <32>
CBS_CCLKRUN# <32>
CBS_CINT# <32>
CBS_CAUDIO <32>
CBS_CCD1# <32>
CBS_CCD2# <32>
CBS_CVS1 <32>
CBS_CVS2 <32>
CBS_DATA14 <32>
CBS_DATA2 <32>
CBS_DATA18 <32>
12
SDCLK/MMC_CLK_R
For MMC PLUS
R5C847XI
12
R1117
@
10M_0402_5%~D
R5C847XO
3
12
R410
1@
22_0402_5%~D
1 2
C501
@
0.01U_0402_16V7K~D
close to R5C847
CBS_CCLK <32>
CBS_CRST# <32>
VPPEN0
SDCLK/MMCCLK
SDDAT0/MMCDAT0
SDDAT1/MMCDAT1
SDDAT2/MMCDAT2
SDDAT3/MMCDAT3
MMCDAT4
MMCDAT5
MMCDAT6
MMCDAT7
CBS_CCD1#
CBS_CCD2#
+3.3V_RUN_CARD
+3.3V_RUN_CARD
0.1U_0402_16V4Z~D
1
C767
2
Place close
to JSD1.9
TPBIAS0
TPAP0
TPAN0
TPBP0
TPBN0
56.2_0402_1%~D
270P_0402_50V7K~D
+3.3V_RUN +CBS_VCC
1 2
R411 100K_0402_5%~D
1 2
R412 100K_0402_5%~D@
12
C502 100P_0402_50V8J~D
12
C503 100P_0402_50V8J~D
12
C504 100P_0402_50V8J~D
12
C507 100P_0402_50V8J~D
12
C508 100P_0402_50V8J~D
12
C510 100P_0402_50V8J~D
12
C511 100P_0402_50V8J~D
12
C512 100P_0402_50V8J~D
12
C1036 270P_0402_50V7K~D
12
C1037 270P_0402_50V7K~D
SDDAT3/MMCDAT3
SDCMD/MMCCMD
SDCLK/MMC_CLK_R
SDDAT0/MMCDAT0
10P_0402_50V8J~D
SDDAT1/MMCDAT1
SDDAT2/MMCDAT2
C491
1
MMCDAT4
MMCDAT5
2
MMCDAT6
MMCDAT7
SDCD#/MMCCD#
SDWP#
SDCD#/MMCCD#
SDWP#
2
56.2_0402_1%~D
56.2_0402_1%~D
12
12
R398
R399
12
12
Z3008
2
1
1 2
1U_0402_6.3V6K~D
1@
1
C498
2
JSD1
14
DAT3/SD1
12
CMD/SD2
10
VSS1/SD3
9
VCC/SD4
8
CLK/SD5
6
GND/VSSS2/SD6
4
DAT7/SD7
3
DAT1/SD8
15
DAT2/SD9
13
DAT4/MMC10
11
DAT5/MMC11
7
DAT6/MMC12
5
DAT7/MMC13
16
CD_WP_SW/GRD
17
CD_WP_SW/GRD
19
CD_SW/SD
20
WP_SW/SD
2
CD_SW_TAISOL/SD
1
WP/SW_TAISOL/SD
18
GND_SW
FOX_2WX131A1-31DD-7F
R401
56.2_0402_1%~D
R407
5.1K_0402_1%~D
Close to U26
VPPEN0
VPPEN1
VCC3EN#
VCC5EN#
R403
C494
1U_0402_6.3V6K~D
+5V_RUN
1@
1
C495
2
only for MMC/SD
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
0.01U_0402_16V7K~D
1
C492
2
CARD_PWR
1
2
11
13
15
3
4
2
1
5
16
1
0.33U_0603_10V7K~D
C493
J1394
1
1
2
2
3
3
4
4
5
5
GND
OUT
OC#
9
14
12
8
7
6
10
6
6
7
GND
8
GND
MOLEX_53780-0670~D
+CBS_VPP
1
2
1
2
3
0.1U_0402_16V4Z~D
1@
1
2
0.01U_0402_16V7K~D
0.1U_0402_16V4Z~D
@
1@
2
C500
C499
1
+3.3V_RUN_CARD+3.3V_RUN
1U_0603_10V4Z~D
0.01U_0402_16V7K~D
1
2
C505
2
1
1394_DET#<24>
U27
1@
VCC3IN
VCCOUT
VCCOUT
VCCOUT
VCC5IN
VCC5IN
EN0
VPPOUT
EN1
VCC3_EN
VCC5_EN
FLG
GND
R5531V002-E2-FA_SSOP16~D
0.1U_0402_16V4Z~D
1
2
NC
NC
NC
U28
5
IN
4
EN#
TPS2051BDBVR_SOT23-5~D
C509
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
CardBus Controller(R5C847)
LA-3801P
1
10U_0805_10V4Z~D
@
1
C497
C496
2
150K_0402_5%~D
R413
C506
1 2
Close to JP5 pin5Close to JP5 pin5
31 66T h u r s da y, June 12, 2008
0.8
of
Page 32
5
4
3
2
1
+3.3V_RUN
0.47U_0402_16V4Z~D
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
1
C522
C521
2
2
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
C532
1
1
C529
2
2
0.01U_0402_16V7K~D
1
1
C537
C538
2
2
10U_0805_10V4Z~D
0.01U_0402_16V7K~D
1
1
C519
C520
2
D D
+3.3V_RUN
+3.3V_RUN
0.01U_0402_16V7K~D
10U_0805_10V4Z~D
1
1
C534
C533
2
2
C C
2
10U_0805_10V4Z~D
C531
1
2
0.1U_0402_10V7K~D
0.01U_0402_16V7K~D
1
1
C536
C535
1
2
2
2
1
2
1
2
0.47U_0402_16V4Z~D
C539
0.01U_0402_16V7K~D
1
C523
2
0.01U_0402_16V7K~D
C530
0.01U_0402_16V7K~D
+3.3V_RUN_PHY
1
C540
2
0.01U_0402_16V7K~D
C776
+3.3V_RUN
L28
BLM21A601SPT_0805~D
1 2
U26B
R5C847-CSP208Q
F5
VCC_3V
G5
VCC_3V
J19
K19
W3
R11
R12
R6
E13
L1
E14
A4
E10
E11
A17
B17
D10
E1
C2
D2
E2
L2
E4
VCC_3V
VCC_3V
VCC_PCI3V
VCC_PCI3V
VCC_PCI3V
VCC_RIN
VCC_RIN
VCC_ROUT
VCC_ROUT
VCC_MD3V
AVCC_PHY3V
AVCC_PHY3V
AVCC_PHY3V
AVCC_PHY3V
NC
NC
NC
NC
NC
NC
NC
DIGITAL
POWER
ANALOG
POWER
NC
R5C847-CSP208Q_CSP208~D
10U_0805_10V4Z~D
1
2
0.1U_0402_16V4Z~D
1
C524
C525
2
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
DIGITAL
GND
AGND
AGND
AGND
AGND
AGND
AGND
ANALOG
GND
NC
NC
NC
NC
NC
NC
NC
0.1U_0402_16V4Z~D
1
2
J1
J5
K5
E9
R10
T10
V10
W10
L15
M19
A9
B9
D9
D14
A15
B15
A10
A11
B10
B11
C1
D1
E12
+3.3V_RUN_PHY
1000P_0402_50V7K~D
1
C526
C527
2
1000P_0402_50V7K~D
1
C528
2
+1.5V_RUN
+3.3V_SUS
+3.3V_RUN
0.1U_0402_16V4Z~D
2@
1
1
C134
2
2
+3.3V_SUS
1 2
R657 100K_0402_5%~D@
EXPRCRD_STDBY#<37>
EXPRCRD_PWREN#<37>
CBS_CTRDY#
1 2
R683 0_0402_5%~D2@
1 2
R684 100K_0402_5%~D@
1 2
R790 100K_0402_5%~D@
1 2
R800 0_0402_5%~D@
PLTRST1#<10,22>
0.1U_0402_16V4Z~D
2@
1
0.1U_0402_16V4Z~D
PLTRST1#
EXPRCRD_STBY_R#
EXPRCRD_PWREN#
CPUSB#
C997
2@
2
C135
U52
2@
12
1.5Vin
14
1.5Vin
2
3.3Vin
4
3.3Vin
AUX_IN17AUX_OUT
6
SYSRST#
20
SHDN#
1
STBY#
10
CPPE#
9
CPUSB#
18
RCLKEN
R5538_QFN20~D
1.5Vout
1.5Vout
3.3Vout
3.3Vout
OC#
PERST#
GND
NC
+1.5V_CARD
11
13
3
5
15
19
8
16
7
0.1U_0402_16V4Z~D
1
2
1 2
R799 0_0402_5%~D@
2@
C999
1
2
0.1U_0402_16V4Z~D
1
2
0.1U_0402_16V4Z~D
2@
C1006
10U_0805_6.3V6M~D
2@
2@
1
C1012
C1000
2
10U_0805_6.3V6M~D
2@
C1016
1
2
CARD_RESET#
CBS_DATA2
+3.3V_CARD
+3.3V_CARDAUX
0.1U_0402_16V4Z~D
2@
1
C1001
2
10U_0805_6.3V6M~D
0.1U_0402_16V4Z~D
2@
2@
1
1
C1003
C1002
2
2
Express Card
JCBUS1
1
GND1
2
CAD0
3
CAD1
4
CAD3
5
CAD5
6
CAD7
7
CCBE0#
8
CAD9
9
CAD11
10
CAD12
11
CAD14
12
CCBE1#
13
CPAR
14
CPERR#
15
CGNT#
16
CINT#
17
VCC
18
VPP1
19
CCLK
20
CIRDY#
21
CCBE2#
22
CAD18
23
CAD20
24
CAD21
25
CAD22
26
CAD23
27
CAD24
28
CAD25
29
CAD26
30
CAD27
31
CAD29
32
CB_D2
33
CCLKRUN#
34
GND2
69
GND5
70
GND6
MOLEX_48315-0013_RT
1@
+CBS_VPP
0.1U_0402_10V7K~D
1
C769
2
Close to JCBUS1 Pin18/52
+CBS_VCC
+CBS_VPP
CBS_CAD0
CBS_CAD1
CBS_CAD3
CBS_CAD5
CBS_CAD7
CBS_CC/BE0#
CBS_CAD9
CBS_CAD11
CBS_CAD12
CBS_CAD14
CBS_CC/BE1#
CBS_CPAR
CBS_CPERR#
CBS_CGNT#
CBS_CINT#
CBS_CCLK
CBS_CIRDY#
CBS_CC/BE2#
CBS_CAD18
CBS_CAD20
CBS_CAD21
CBS_CAD22
CBS_CAD23
CBS_CAD24
CBS_CAD25
CBS_CAD26
CBS_CAD27
CBS_CAD29
CBS_DATA2
CBS_CCLKRUN#
CBS_CAD0<31>
CBS_CAD1<31>
CBS_CAD3<31>
CBS_CAD5<31>
CBS_CAD7<31>
CBS_CC/BE0#<31>
CBS_CAD9<31>
CBS_CAD11<31>
CBS_CAD12<31>
CBS_CAD14<31>
CBS_CC/BE1#<31>
CBS_CPAR<31>
CBS_CPERR#<31>
CBS_CGNT#<31>
B B
A A
CBS_CINT#<31>
CBS_CCLK<31>
CBS_CIRDY#<31>
CBS_CC/BE2#<31>
CBS_CAD18<31>
CBS_CAD20<31>
CBS_CAD21<31>
CBS_CAD22<31>
CBS_CAD23<31>
CBS_CAD24<31>
CBS_CAD25<31>
CBS_CAD26<31>
CBS_CAD27<31>
CBS_CAD29<31>
CBS_DATA2<31>
CBS_CCLKRUN#<31>
5
GND3
CCD1#
CAD2
CAD4
CAD6
CB_D14
CAD8
CAD10
CVS1
CAD13
CAD15
CAD16
CB_D18
CBLOCK#
CSTOP#
CDEVSEL#
VCC
VPP2
CTRDY#
CFRAME#
CAD17
CAD19
CVS2
CRST#
CSERR#
CREQ#
CCBE3#
CAUDIO
CSTSCHG
CAD28
CAD30
CAD31
CCD2#
GND4
GND7
GND8
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
71
72
4
CBS_CCD1#
CBS_CAD2
CBS_CAD4
CBS_CAD6
CBS_DATA14
CBS_CAD8
CBS_CAD10
CBS_CVS1
CBS_CAD13/USBP7+
CBS_CAD15/USBP7CBS_CAD16
CBS_DATA18
CBS_CBLOCK#
CBS_CSTOP#
CBS_CDEVSEL#
CBS_CTRDY#
CBS_CFRAME#
CBS_CAD17
CBS_CAD19
CBS_CVS2
CBS_CRST#
CBS_CSERR#
CBS_CREQ#
CBS_CC/BE3#
CBS_CAUDIO
CBS_CSTSCHNG
CBS_CAD28
CBS_CAD30
CBS_CAD31
CBS_CCD2#
+CBS_VCC
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1@
1@
C541
C542
1
1
1
2
2
2
Close to JCBUS1 pin23,63
CBS_CCD1# <31>
CBS_CAD2 <31>
CBS_CAD4 <31>
CBS_CAD6 <31>
CBS_DATA14 <31>
CBS_CAD8 <31>
CBS_CAD10 <31>
CBS_CVS1 <31>
CBS_CAD13/USBP7+ <31>
CBS_CAD15/USBP7- <31>
CBS_CAD16 <31>
CBS_DATA18 <31>
CBS_CBLOCK# <31>
CBS_CSTOP# <31>
CBS_CDEVSEL# <31>
+CBS_VCC
+CBS_VPP
CBS_CTRDY# <31>
CBS_CFRAME# <31>
CBS_CAD17 <31>
CBS_CAD19 <31>
CBS_CVS2 <31>
CBS_CRST# <31>
CBS_CSERR# <31>
CBS_CREQ# <31>
CBS_CC/BE3# <31>
CBS_CAUDIO <31>
CBS_CSTSCHNG <31>
CBS_CAD28 <31>
CBS_CAD30 <31>
CBS_CAD31 <31>
CBS_CCD2# <31>
10U_0805_10V4Z~D
1@
C543
1 2
R791 0_0402_5%~D@
1 2
R792 0_0402_5%~D@
+3.3V_CARDAUX
2.2K_0402_5%~D
2.2K_0402_5%~D
12
2@
R126
4
4
1
1
L64
2@
DLW21SN900SQ2_0805~D
0.1U_0402_16V4Z~D
2@
1
C1004
2
2@
R127
EXP_SMBDATA
EXP_SMBCLK
2
USBP7-_EXP<31>
USBP7+_EXP<31>
+3.3V_SUS
12
+3.3V_SUS
6 1
2
5
3
Q112A
2@
2N7002DW-T/R7_SOT363-6
Q112B
2@
2N7002DW-T/R7_SOT363-6
4
CARD_SMBDAT<34,38>
CARD_SMBCLK<34,38>
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
+1.5V_CARD: Max. 650mA, A verage 500m A
+3.3V_CA R D: Max. 1300mA, Average 1000mA
3
3
2
2
+3.3V_CARD
0.1U_0402_16V4Z~D
1
2
USBP7_D-
USBP7_D+
PCIE_WAKE#<34,37>
EXPCLK_REQ#<6>
CLK_PCIE_EXP#<6>
2@
C1005
CLK_PCIE_EXP<6>
PCIE_IRX_EXPTX_N4<24>
PCIE_IRX_EXPTX_P4<24>
PCIE_ITX_EXPRX_N4_C<24>
PCIE_ITX_EXPRX_P4_C<24>
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
LA-3801P
Date: Sheet
+1.5V_CARD
CPUSB#
EXP_SMBCLK
EXP_SMBDATA
PCIE_WAKE#
CARD_RESET#
EXPRCRD_PWREN#
0.1U_0402_16V4Z~D
2@
1
C1007
2
2@
JEXP1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
MOLEX_48326-0001_RT
GND1
USB_DUSB_D+
CPUSB#
RESERVED
RESERVED
SMB_CLK
SMB_DAT
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLKREFCLK+
GND
PER_N0
PER_P0
GND
PET_N0
PET_P0
GND
GND
GND
GND
GND
Compal Electronics, Inc.
CardBus/SD card Socket
32 66T h u r s da y, June 12, 2008
1
0.8
of
Page 33
5
FUSE1
@
L0603
1 2
+5V_ALW
0.1U_0402_16V4Z~D
1
D D
2
C C
USBP3-<24>
USBP3+<24>
SW_LAN_TX3+<30>
B B
SW_LAN_TX3-<30>
SW_LAN_TX2-<30>
SW_LAN_TX2+<30>
SW_LAN_TX1+<30>
SW_LAN_TX1-<30>
SW_LAN_TX0-<30>
SW_LAN_TX0+<30>
+3.3V_LAN
IO_LOOP<24>
A A
+3.3V_LAN +VREFOUT +3.3V_SUS +LOM_VCT
Place close
to JIO1.13
C546
1
2
USBP0+<24>
USBP0-<24>
USBP1+<24>
USBP1-<24>
+5V_ALW
1
2
PJP4
PAD-OPEN 4x4m
10U_1206_16V4Z~D
C547
USBP2_D+
USBP2_D-
USBP3-
USBP3+
1
2
0.1U_0402_16V4Z~D
C768
12
USB_POWERSHARE_PWR_EN#<37>
0.1U_0402_16V4Z~D
C623
+5V_ALW_FUSE
ESATA_USB_PWR_EN#<37>
+5V_ALW_FUSE
L30
@
DLW21SN121SQ2L_4P~D
1
1
4
4
1 2
R424 0_0402_5%~D
1 2
R425 0_0402_5%~D
L31
@
DLW21SN121SQ2L_4P~D
1
1
4
4
1 2
R426 0_0402_5%~D
1 2
R427 0_0402_5%~D
JIO1
1
1
26
2
2
27
3
3
28
4
4
29
5
5
30
6
6
31
7
7
32
8
8
33
9
9
34
10
10
35
11
11
36
12
12
37
13
13
38
14
14
39
15
15
40
16
16
41
17
17
42
18
18
43
19
19
44
20
20
45
21
21
46
22
22
47
23
23
48
24
24
49
25
25
50
TYCO_1759898-1
0.1U_0402_16V4Z~D
1
2
Place close
to JIO1.30
5
2
2
3
3
2
2
3
3
Left side USB Port
DETECT_GND
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
ICH_AZ_MDC_RST1#
42
43
44
45
46
47
48
49
50
C634
Place close
to JIO1.35
1
2
3
4
1
2
3
4
USBP2_D+_SW
USBP2_D-_SW
USBP3_D-
USBP3_D+
0.1U_0402_16V4Z~D
1
C711
2
U29
GND
OC1#
IN
OUT1
EN1#
OUT2
EN2#
OC2#
TPS2062ADR_SO8~D
U53
GND
OC1#
IN
OUT1
EN1#
OUT2
EN2#
OC2#
TPS2062ADR_SO8~D
AUD_EXT_MIC_L <27>
AUD_EXT_MIC_R <27>
+VREFOUT
AUD_MIC_SWIT CH <27>
LAN_ACTLED_YEL_R# <30>
LED_10_GRN_R# <30>
LED_100_ORG_R# <30>
+3.3V_SUS
+LOM_VCT
USB_SIDE_EN# <37>
USB_OC0_1# <24>
ICH_AZ_MDC_BITCLK <23>
ICH_AZ_MDC_SDOUT <23>
ICH_AZ_MDC_SYNC <23>
ICH_AZ_MDC_SDIN1 <23>
AUD_HP_NB_SENSE <27,28,37>
HP_SPK_L1 <28>
HP_SPK_R1 <28>
1
2
Place close
to JIO1.36
8
7
6
5
8
7
6
5
0.1U_0402_16V4Z~D
4
+5V_ESATA
ESATA_USB_OC#
+5V_CHGUSB
USB_OC2#
Output Swing Control
SEL2_ [A:B]
0
**
1
ESATA_ITX_DRX_P4<23>
ESATA_ITX_DRX_N4<23>
ESATA_IRX_DTX_P4_C<23>
ESATA_IRX_DTX_N4_C<23>
+1.8V_RUN
R1047 0_0402_5%~D
R1049 0_0402_5%~D
R1050 0_0402_5%~D@
R1051 0_0402_5%~D@
R1052 0_0402_5%~D
R1053 0_0402_5%~D
R1054 0_0402_5%~D
R1055 0_0402_5%~D
R306 5.1K_0402_1%~D
R307 5.1K_0402_1%~D
R305 470_0402_5%~D@
+1.8V_RUN
ESATA_USB_OC# <24>
USB_OC2# <24>
EN_CELL_CHARGER_DET#<38>
CELL_CHARGER_DET#<37>
Swing
1 2
C1062 0.01U_0402_16V7K~D
1 2
C1063 0.01U_0402_16V7K~D
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
R1056 0_0402_5%~D
1 2
R1057 0_0402_5%~D
1 2
1x
1.2x
IRX_DTX_P4
IRX_DTX_N4
+5V_ESATA
150U_D_6.3VM_R15M~D
1
+
2
+5V_CHGUSB
150U_D_6.3VM_R15M~D
1
+
2
Output De-emphasis Adjustment
SEL3_ [A:B]
U72
2
AI+
3
AI-
7
BO+
8
BO-
34
SEL0_A
13
SEL0_B
33
SEL1_A
14
SEL1_B
32
SEL2_A
15
SEL2_B
31
SEL3_A
16
SEL3_B
30
EN_A
29
EN_B
19
IREF
11
CLKIN+
12
CLKIN-
PI2EQX3201BZFE_TQFN36_6X5~D
0.1U_0402_16V4Z~D
1
C544
C588
C545
2
0.1U_0402_16V4Z~D
1
C548
2
1 2
C1042 1U_0402_6.3V6K~D
12
R928 0_0402_5%~D@
2 1
D69
RB751S40T1_SOD523-2~D
De-emphasis
0
1
0dB
-3.5dB
+LOM_VCT = 2.5V when undocked.
U30
@
1
USBP2_D+_SW
C712
USBP3_D+
Place ESD diodes as close as USB connector
4
GND
2
IO1
PRTR5V0U2X_SOT143-4~D
U55
@
1
GND
2
IO1
PRTR5V0U2X_SOT143-4~D
USBP2_D-_SW
3
IO2
4
VIN
3
IO2
4
VIN
USBP3_D-
+5V_CHGUSB
+5V_ESATA
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
SATA_IRX_DTX_N4_C
SATA_IRX_DTX_P4_C
1
VDD
6
VDD
10
VDD
23
VDD
28
VDD
5
AVDD
27
AO+
26
AO-
21
BI-
22
BI+
17
OUT+
18
OUT-
36
SD_A
35
SD_B
25
GND
20
GND
9
GND
4
GND
24
AGND
37
PAD
3
C549 4700P_0402_25V7K~D
C550 4700P_0402_25V7K~D
100K_0402_5%~D
1 2
+1.8V_RUN
SATA_ITX_DRX_P4
SATA_ITX_DRX_N4
SATA_IRX_DTX_N4_C
SATA_IRX_DTX_P4_C
R1066 0_0402_5%~D@
1 2
R1067 0_0402_5%~D@
1 2
R1069 0_0402_5%~D@
1 2
R1070 0_0402_5%~D@
1 2
*
USBP2-<24>
USBP2+<24>
+3.3V_SUS
C1045
0.1U_0402_16V4Z~D
USBP3_DUSBP3_D+
USBP2_D-_SW
USBP2_D+_SW
SATA_ITX_DRX_P4_C
SATA_ITX_DRX_N4_C
SATA_IRX_DTX_N4
12
SATA_IRX_DTX_P4
12
R1040
1
2
SEL0_ [A:B] SEL1_ [A:B]
+3.3V_ALW2
1
1
C1054
2
10U_1206_16V4Z~D
C490
0.1U_0402_16V4Z~D
12
C489
2
0.1U_0402_16V4Z~D
R1058
470_0402_5%~D
1
2
C1052
4700P_0402_25V7K~D
C488
4700P_0402_25V7K~D
Equalizer Selection
00
01
1
11
USBP2USBP2+
1
2
0
R1082 0_0402_5%~D
R1083 0_0402_5%~D
TS3USB31RSER_QFN8_1P5X1P5~D
Place Switch as close to
ICH9M as possible
JESA1
1
A_VCC
2
A_D-
3
A_D+
4
A_GND
5
B_VCC
6
B_D-
7
B_D+
8
B_GND
9
GND
10
A+
11
A-
12
GND
13
B-
14
B+
15
GND
16
DET1
17
DET2
18
G1
19
G2
20
G3
21
G4
TYCO_1759562-1
1
1
C1057
C1056
C1055
2
2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
SATA_ITX_DRX_P4_C
12
SATA_ITX_DRX_N4_C
12
Compliance Channel
no equalization
[0:2.5dB] @ 1.6 GHz
[2.5:4.5dB] @ 1.6 GHz
[4.5:6.5dB] @ 1.6 GHz
1 2
1 2
U54
@
8
2
1
VCC
HSD-6DHSD+
GND
OE#
7
NC
5
3
D+
4
ESATA
0.1U_0402_16V4Z~D
2
USB PORT#
0
1
2
USB
3
4
5
6
7
8
9
10
11
FP_USBD+<36>
FP_USBD-<36>
JUSB1 (Ext Right Side Top)
JUSB1 (Ext Right Side Bottom)
JESA1 (Ext Left Side Top)
JESA1 (Ext Left Side Bottom)
WLAN
WWAN
WPAN
Card Bus/Express card
DOCKING
DOCKING
USH->BIO
Camera
L29
@
DLW21SN121SQ2L_4P~D
1
1
4
4
1 2
R422 0_0402_5%~D
1 2
R423 0_0402_5%~D
Fingerprint CONN.
JBIO1
1
1
2
USBP2_DUSBP2_D+
2
3
4
5
6
GND
GND
TYCO_1734242-6
FP_USB_D-
ICH_AZ_MDC_RST#<23>
MDC_RST_DIS#<37>
3
4
5
6
7
8
1 2
R873
@
0_0402_5%~D
FP_USB_DFP_USB_D+
U51
1
GND
IO2
2
IO1
VIN
PRTR5V0U2X_SOT143-4~D
+5V_ALW
12
1
DESTINATION
FP_USB_D+
2
2
FP_USB_D-
3
3
+5V_RUN Place close to
JBIO1.6
+3.3V_RUN
+5V_RUN
+3.3V_RUN
FP_RESET# <36>
+5V_RUN
+3.3V_RUN P l ace close to
JBIO1.1
FP_USB_D+
3
4
1 2
R324 0_0402_5%~D@
D
1 3
G
2
R326
10K_0402_5%~D
0.1U_0402_16V4Z~D
1
C770
2
+3.3V_RUN
S
ICH_AZ_MDC_RST1#
Q35
2N7002W-7-F_SOT323-3~D
1
2
0.1U_0402_16V4Z~D
@
C1035
12
R325
100K_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
USB 2.0 PORT
LA-3801P
33 66T h u r s da y, June 12, 2008
1
0.8
of
Page 34
5
+3.3V_RUN
2.2K_0402_5%~D
2.2K_0402_5%~D
12
12
R430
R429
2
MINI_SMBCLK
D D
MINI_SMBDATA CARD_SMBDAT
Mini WWAN
+3.3V_RUN
1
C570
2
PCIE_WAKE#
MINI1CLK_REQ#
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
PCIE_IRX_WANTX_N1
PCIE_IRX_WANTX_P1
PCIE_ITX_WANRX_N1_C
PCIE_ITX_WANRX_P1_C
PCIE_MCARD2_DET#
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
C565
C564
2
JSIM1
1
VCC
2
RST
3
CLK
4
NC
MOLEX_475531001
Voltage
Tolerance
+-9%
+-9%
+-5%
5
33P_0402_50V8J~D
1
1
C566
2
2
GND
VPP
I/O
NC
GND
GND
Primary Power Aux Power
Peak Normal Normal
1000 750
330
500
PCIE_WAKE#<32,37>
MINI1CLK_REQ#<6>
CLK_PCIE_MINI1#<6>
CLK_PCIE_MINI1<6>
PCIE_IRX_WANTX_N1<24>
PCIE_IRX_WANTX_P1<24>
PCIE_ITX_WANRX_N1_C<24>
PCIE_ITX_WANRX_P1_C<24>
PCIE_MCARD2_DET#<22>
C C
+1.5V_RUN
0.047U_0402_16V4Z~D
33P_0402_50V8J~D
1
1
C569
2
2
+SIM_PWR
1
2
1U_0603_10V4Z~D
C573
UIM_RESET
UIM_CLK
PWR
Rail
B B
A A
+3.3V
+3.3Vaux
+1.5V
22U_0805_6.3VAM~D
5
6
7
8
9
10
C567
1
2
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
33P_0402_50V8J~D
C568
UIM_VPP
UIM_DATA
JMINI1
1
1
3
3
5
5
7
7
9
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
GND1
TYCO_1775861-1~D
330U_D2E_6.3VM_R25~D
1
+
C563
2
250
375
5
3
4
Q48B
2N7002DW-T/R7_SOT363-6~D
+3.3V_RUN+3.3V_RUN
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
GND2
USBP5-<24>
USBP5+<24>
UIM_RESET
UIM_CLK
33P_0402_50V8J~D
1
C574
2
250 (Wake enable)
5 (Not wake enable)
NA
4
WLAN_RADIO_DIS#<37>
CARD_SMBCLK
61
Q48A
2N7002DW-T/R7_SOT363-6~D
USB_MCARD2_DET# PCIE_MCARD2_DET#
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP
WWAN_RADIO_DIS#
1 2
R442 0_0402_5%~D
MINI_SMBCLK
MINI_SMBDATA
USBP5_DUSBP5_D+
USB_MCARD2_DET#
LED_WWAN_OUT#
1 2
R840 0_0402_5%~D
For WIMAX LED debug
USB_MCARD2_DET#
PCIE_MCARD2_DET#
33P_0402_50V8J~D
1
C575
2
1 2
R740 0_0402_5%~D@
+1.5V_RUN
+SIM_PWR
PLTRST3#
USB_MCARD2_DET# <24>
LED_WWAN_OUT# <42>
WIMAX LED
R447 100K_0402_5%~D
1 2
R449 100K_0402_5%~D
L32
@
DLW21SN121SQ2L_4P~D
1
1
4
4
1 2
R450 0_0402_5%~D
1 2
R451 0_0402_5%~D
U31
1
2
3
SRV05-4.TCT_SOT23-6~D
4
12
2
2
3
3
6
5
4
WWAN_RADIO_DIS# <37>
PLTRST3# <22,36>
+3.3V_RUN
USBP5_D-
USBP5_D+
UIM_VPP
UIM_DATA
33P_0402_50V8J~D
1
C576
2
+SIM_PWR
33P_0402_50V8J~D
1
2
1 2
R428 0_0402_5%~D@
D21
RB751S40T1_SOD523-2~D
C577
3
100K_0402_5%~D
WLAN_RADIO_DIS#_R
21
2N7002DW-T/R7_SOT363-6~D
AUX_EN_WOWL<38>
100K_0402_5%~D
COEX2_WLAN_ACTIVE
33P_0402_50V8J~D
+1.5V_RUN
0.047U_0402_16V4Z~D
1
C555
2
@
0.047U_0402_16V4Z~D
1
2
R437
C552
+3.3V_WLAN
1
C556
2
Q53A
12
1
2
0.1U_0402_16V4Z~D
2
@
C557
100K_0402_5%~D
12
R431
61
COEX2_WLAN_ACTIVE
COEX1_BT_ACTIVE
PCIE_IRX_WLANTX_N2<24>
PCIE_IRX_WLANTX_P2<24>
PCIE_ITX_WLANRX_N2_C<24>
PCIE_ITX_WLANRX_P2_C<24>
0.047U_0402_16V4Z~D
1
1
C558
2
2
PCIE_MCARD1_DET#<24>
0.047U_0402_16V4Z~D
12
3
5
200K_0402_5%~D
4
12
@
R436
MINI2CLK_REQ#<6>
CLK_PCIE_MINI2#<6>
CLK_PCIE_MINI2<6>
ICH_CL_CLK1<24>
ICH_CL_DATA1<24>
ICH_CL_RST1#<24>
0.1U_0402_16V4Z~D
1
C559
2
D
6
S
R432
2N7002DW-T/R7_SOT363-6~D
Q53B
R440 0_0402_5%~D
R441 0_0402_5%~D
0.1U_0402_16V4Z~D
1
C560
2
45
2
Q47
1
SI3456BDV-T1-E3_TSOP6~D
G
3
470K_0402_5%~D
12
@
PCIE_WAKE#
1 2
1 2
PCIE_IRX_WLANTX_N2
PCIE_IRX_WLANTX_P2
PCIE_ITX_WLANRX_N2_C
PCIE_ITX_WLANRX_P2_C
1 2
R448 0_0402_5%~D
4.7U_0603_6.3V4Z~D
1
1
+
C562
C561
2
2
R435
330U_D2E_6.3VM_R25~D
@
C554
WPAN Card
COEX2_WLAN_ACTIVE
COEX1_BT_ACTIVE
MINI3CLK_REQ#<6>
CLK_PCIE_MINI3#<6>
CLK_PCIE_MINI3<6>
HOST_DEBUG_RX<38>
PCIE_MCARD3_DET#<22>
0.1U_0402_16V4Z~D
1
@
C580
C579
2
MSCLK<38>
R458 100K_0402_5%~D
R266 100K_0402_5%~D
1
2
PCIE_IRX_MCARDTX_N3<24>
PCIE_IRX_MCARDTX_P3<24>
PCIE_ITX_MCARDRX_N3_C<24>
PCIE_ITX_MCARDRX_P3_C<24>
+3.3V_RUN
+1.5V_RUN
+3.3V_RUN
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
1
C578
2
2
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
PCIE_WAKE#
R454 0_0402_5%~D
1 2
R455 0_0402_5%~D
1 2
MINI3CLK_REQ#
CLK_PCIE_MINI3#
CLK_PCIE_MINI3
HOST_DEBUG_RX
MSCLK
PCIE_IRX_MCARDTX_N3
PCIE_IRX_MCARDTX_P3
PCIE_ITX_MCARDRX_N3_C
PCIE_ITX_MCARDRX_P3_C
PCIE_MCARD3_DET#
1 2
USB_MCARD3_DET#
1 2
0.047U_0402_16V4Z~D
C581
0.1U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
1
C583
C582
2
2
0.1U_0402_16V4Z~D
1
1
C584
2
2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
4.7U_0603_6.3V4Z~D
53
C585
2
+3.3V_WLAN+3.3V_ALW+15V_ALW
4700P_0402_25V7K~D
1
C551
2
Mini WLAN
+3.3V_WLAN
JMINI3
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
GND1
TYCO_1775861-1~D
2
GND2
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
WLAN_SMBCLK
WLAN_SMBDATA
JMINI2
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
GND1
TYCO_1775861-1~D
+3.3V_RUN+3.3V_RUN
2.2K_0402_5%~D
12
+3.3V_WLAN
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
GND2
USB_MCARD3_DET# PCIE_MCARD3_DET#
+1.5V_RUN
HOST_DEBUG_TX
R456 0_0402_5%~D
MINI_SMBCLK
MINI_SMBDATA
USBP6_DUSBP6_D+
USB_MCARD3_DET#
MSDATA
1 2
R459 0_0402_5%~D
+3.3V_WLAN
2.2K_0402_5%~D
12
R433
R434
5
4
+1.5V_RUN
WLAN_RADIO_DIS#_R
R444 0_0402_5%~D
WLAN_SMBCLK
WLAN_SMBDATA
USBP4_DUSBP4_D+PCIE_MCARD1_DET#
USB_MCARD1_DET#
WIMAX LED
LED_WLAN_OUT#
1 2
R446 0_0402_5%~D@
USBP4-<24>
USBP4+<24>
1 2
R742 0_0402_5%~D@
C571 4700P_0402_25V7K~D
PLTRST3#
12
USB_MCARD3_DET# <24>
MSDATA <38>
LED_WPAN_OUT#
USBP6-<24>
USBP6+<24>
2
CARD_SMBCLK
61
Q49A
2N7002DW-T/R7_SOT363-6~D
CARD_SMBDAT
3
Q49B
2N7002DW-T/R7_SOT363-6~D
USB_MCARD1_DET#
PCIE_MCARD1_DET#
PCIE_MCARD1_DET#
USB_MCARD1_DET# PCIE_MCARD1_DET#
PLTRST3#
12
LED_WPAN_OUT#
L33
@
DLW21SN121SQ2L_4P~D
4
4
1
1
1 2
R452 0_0402_5%~D
1 2
R453 0_0402_5%~D
1 2
HOST_DEBUG_TX <38>
WPAN_RADIO_DIS# <37>
L34
@
DLW21SN121SQ2L_4P~D
1
1
4
4
1 2
R460 0_0402_5%~D
1 2
R461 0_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Mini Card
LA-3801P
1
CARD_SMBCLK <32,38>
CARD_SMBDAT <32,38>
+3.3V_RUN
1 2
R438 100K_0402_5%~D
1 2
R439 100K_0402_5%~D@
1 2
R443 100K_0402_5%~D
1 2
R741 0_0402_5%~D@
1
3
2
2
3
+3.3V_ALW_ICH
USB_MCARD1_DET# <24>
LED_WLAN_OUT# <42>
LED_WPAN_OUT# <42>
WWAN Noise
USB_MCARD1_DET#
1
C553
4700P_0402_25V7K~D
2
USBP4_D-
3
USBP4_D+
2
WPAN Noise
USB_MCARD3_DET#
1
C572
4700P_0402_25V7K~D
2
2
3
34 66T h u r s da y, June 12, 2008
USBP6_D-
USBP6_D+
0.8
of
Page 35
2
1
JDOCK1
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
61
63
63
65
65
67
67
69
69
71
71
73
73
75
75
77
77
79
79
81
81
83
83
85
85
87
87
89
89
91
91
93
93
95
95
97
97
99
99
101
101
103
103
105
105
107
107
109
109
111
111
113
113
115
115
117
117
119
119
121
121
123
123
125
125
127
127
129
129
131
131
133
133
135
135
137
137
139
139
141
141
143
143
145
GND1
146
PWR1
147
PWR1
148
PWR1
153
Shield_G
154
Shield_G
155
Shield_G
156
Shield_G
157
Shield_G
158
Shield_G
JAE_WD2F144WB1
PWR2
PWR2
PWR2
GND2
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
DOCK_AC_OFF
2
2
4
4
6
6
8
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
149
150
151
152
159
160
161
162
163
164
DPC_LANE_P0_C
DPC_LANE_N0_C
DPC_LANE_P1_C
DPC_LANE_N1_C
DPC_LANE_P2_C
DPC_LANE_N2_C
DPC_LANE_P3_C
DPC_LANE_N3_C
DPC_AUX_DOCK
DPC_AUX#_DOCK
1 2
R821 0_0603_5%~D
SATA_SBRX_DTX_P3
SATA_SBRX_DTX_N3
TR0/1CT
TR2/3CT
DOCK_DET_R#
0.1U_0603_50V4Z~D
C1033
1
2
DOCK_AC_OFF <37,50>
DOCK_LOM_SPD100LED_ORG# <30>
DPC_CA_DET <21>
DPC_LANE_P0_C <12>
DPC_LANE_N0_C <12>
DPC_LANE_P1_C <12>
DPC_LANE_N1_C <12>
DPC_LANE_P2_C <12>
DPC_LANE_N2_C <12>
DPC_LANE_P3_C <12>
DPC_LANE_N3_C <12>
DPC_AUX_DOCK <21>
DPC_AUX#_DOCK <21>
ACAV_DOCK_SRC# <50>
DAT_DDC2_DOCK <20>
CLK_DDC2_DOCK <20>
12
C586 0.01U_0402_16V7K~D
12
C587 0.01U_0402_16V7K~D
SATA_SBTX_C_DRX_P3 <23>
SATA_SBTX_C_DRX_N3 <23>
USBP8+ <24>
USBP8- <24>
USBP9+ <24>
USBP9- <24>
CLK_KBD <38>
DAT_KBD <38>
BREATH_LED# <38,42>
DOCK_LOM_ACTLED_YEL# <30>
DOCK_LOM_TRD0+ <30>
DOCK_LOM_TRD0- <30>
DOCK_LOM_TRD1+ <30>
DOCK_LOM_TRD1- <30>
2.65V when docked.
+LOM_VCT
DOCK_LOM_TRD2+ <30>
DOCK_LOM_TRD2- <30>
DOCK_LOM_TRD3+ <30>
DOCK_LOM_TRD3- <30>
DOCK_DCIN_IS+ <48>
DOCK_DCIN_IS- <48>
GND_PWR_SENSE
DOCK_POR_RST# <38>
+DOCK_PWR_BAR
SATA_SBRX_DTX_P3_C <23>
SATA_SBRX_DTX_N3_C <23>
D71
RB751S40T1_SOD523-2~D
12
R1068
910K_0402_5%~D@
21
D26
DPC_AUX_DOCK
DPC_AUX#_DOCK
DPC_DOCK_HPD_R DPC_DOCK_HPD_R
DPC_CA_DET DPC_CA_DET
@
1
2
4
5
3
8
RCLAMP0524P.TCT~D
Place close to JP1 connector
+3.3V_ALW
R1038
100K_0402_5%~D
1 2
+RTC_CELL
R124
@
100K_0402_5%~D
R796
+3.3V_RUN
2
G
100K_0402_5%~D
12
R795
20K_0402_5%~D
1 2
13
D
Q114
BSS138_SOT23~D
S
R825
7.5K_0402_5%~D
1 2
DOCK_DET#
DOCK_DET# <21,37>
DPC_DOCK_HPD_R
0.1U_0402_10V7K~D
2
@
C1076
1
1 2
DPC_AUX_DOCK
10
DPC_AUX#_DOCK
9
7
6
CLK_PCI_DOCK
12
R462
10_0402_5%~D
1
C590
4.7P_0402_50V8C~D
2
DPC_DOCK_HPD# <12>
GND_VGA
SLICE_BAT_PRES#
1
2
DOCK_DET_1
DPB_DOCK_LANE0_C
DPB_DOCK_LANE0#_C
DPB_DOCK_LANE1_C
DPB_DOCK_LANE1#_C
DPB_DOCK_LANE2_C
DPB_DOCK_LANE2#_C
DPB_DOCK_LANE3_C
DPB_DOCK_LANE3#_C
DPB_DOCK_AUX
DPB_DOCK_AUX#
1 2
R387 0_0603_5%~D
BLUE_DOCK
RED_DOCK
GREEN_DOCK
2
3
0.1U_0603_50V4Z~D
C1034
1
D64
SM24.TCT_SOT23-3~D
DOCK_LOM_SPD10LED_GRN#<30>
DPB_DOCK_CA_DET<21>
DPB_DOCK_LANE0_C<21>
DPB_DOCK_LANE0#_C<21>
DPB_DOCK_LANE1_C<21>
DPB_DOCK_LANE1#_C<21>
DPB_DOCK_LANE2_C<21>
DPB_DOCK_LANE2#_C<21>
DPB_DOCK_LANE3_C<21>
DPB_DOCK_LANE3#_C<21>
DPB_DOCK_AUX<21>
DPB_DOCK_AUX#<21>
DPB_DOCK_HPD<21>
B B
D27
DPB_DOCK_AUX
DPB_DOCK_AUX#
@
1
2
4
5
3
8
RCLAMP0524P.TCT~D
DPB_DOCK_AUX
10
DPB_DOCK_AUX#
9
DPB_DOCK_HPDDPB_DOCK_HPD
7
DPB_DOCK_CA_DETDPB_DOCK_CA_DET
6
Place close to JP1 connector
DPB_DOCK_HPD
0.1U_0402_16V7K~D
GND_VGA
GND_CLK_DAI
GND_CLK_PCI
GND_PWR_ SENSE
A A
2
@
C672
1
SLICE_BAT_PRES#<37,43,50>
+DOCK_PWR_BAR
DPB_DOCK_HPD DPC_DOCK_HPD_R
+NBDOCK_DC_IN_SS
BLUE_DOCK<20>
RED_DOCK<20>
GREEN_DOCK<20>
HSYNC_DOCK<20>
VSYNC_DOCK<20>
CLK_MSE<38>
DAT_MSE<38>
DAI_BCLK#<27>
DAI_LRCK#<27>
DAI_DI<27>
DAI_DO#<27>
DAI_12MHZ#<27>
GND_CLK_DAI
D_LAD0<37>
D_LAD1<37>
D_LAD2<37>
D_LAD3<37>
D_LFRAME#<37>
D_CLKRUN#<37>
D_SERIRQ<37>
D_DLDRQ1#<37>
CLK_PCI_DOCK<6>
GND_CLK_PCI
DOCK_SMB_CLK<38>
DOCK_SMB_DAT<38>
DOCK_SMB_ALERT#<38,43>
DOCK_PSID<43>
DOCK_PWR_BTN#<38>
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
2
1
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
DOCKING CONN
LA-3801P
35 66T h u r s da y, June 12, 2008
0.8
of
Page 36
D70
5@
CLK_PCI_TPM<6>
SP_TPM_LPC_EN<29,37>
PLTRST3#<22,34>
IRQ_SERIRQ<24,29,31,37,38>
SP_TPM_LPC_EN<29,37>
UART_RX/GPIO0
@
R894
0_0402_5%~D
1 2
UART_TX/GPIO1
+3.3V_RUN
1 2
R1059 10K_0402_5%~D@
1 2
R841 47K_0402_1%~D5@
1 2
@
R843 47K_0402_1%~D
USBP10-<24>
B B
USBP10+<24>
TER_USBH_N1
TER_USBH_P1
BCM5880_SCCLK BCM5880_SCCLK_R
1 2
@
R486 10M_0402_5%~D
Y3
1
IN
OUT
2
GND
1
27.12MHZ_12PF_1N227120CC0B~D
2
GPIO14_TER_ON/OFF
BCM5880_SCCLK
GPIO16_TER_TRIS SC _USB#
5880_GPIO26
5880_GPIO25
BCM5880_SCRST
BCM5880_SCDET
A A
+3.3V_RUN
GND
C608
12P_0402_50V8J~D
@
R771 1K_0402_5%~D
@
@
R490
@
R766 47K_0402_1%~D
R767 47K_0402_1%~D
R770 10K_0402_5%~D
+SC_VCC
10U_0805_10V4Z~D
0.47U_0402_6.3V6K~D
@
1
2
C1031
C646
2
1
1 2
R913
300_0402_5%~D
RB751S40T1_SOD523-2~D
0_0402_5%~D
1 2
12
FP_USBD-<33>
FP_USBD+<33>
@
C600
680P_0402_50V7K
1 2
+SC_PWR
1 2
1 2
R487
0_0402_5%~D
C609
15P_0402_50V8J~D
1 2
@
R20 47K_0402_1%~D
JSC1
12
GND
11
GND
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
21
CLK_PCI_TPM
R1048
LPC_EN_R
PLTRST3#_USH
LPC_LFRAME#_R
IRQ_SERIRQ_R
LPC_LAD0_R
LPC_LAD1_R
LPC_LAD2_R
LPC_LAD3_R
LPD#
UART_RX/GPIO0
UART_TX/GPIO1
GPIO2_TER_VDDMON
SC_DET_RSC_DET
SPI_CLK
SPI_CS
SPI_RXD
SPI_TXD
GPIO14_TER_ON/OFF
BCM5880_GPIO15
GPIO16_TER_TRIS
USBP10-_R
USBP10+_R
FP_USBDFP_USBD+
USBH_OC0#
USBH_N1
USBH_P1
USBH_OC1#
5880_GPIO25
5880_GPIO26
BCM5880_SCVCC
BCM5880_SCRST
BCM5880_IO
AUX1UC
AUX2UC
BCM5880_SCDET
REF_XOUT
REF_XIN
1U_0402_6.3V6K~D
2
C1022
1
8009_VDDMON
U33
24
ON/OFF
7
CLKIN
8
RDY
9
OFF_ACK
11
OFF_REQ
12
CS
13
SC_USB#
4
CMDVCC5#
5
CMDVCC3#
6
RSTIN
32
OFF#
10
TEST1
30
TEST2
1
I/OUC
2
AUX1UC
3
AUX2UC
73S8009CN-32IMR/F_QFN32_5X5~D
R464
@
0_0402_5%~D
1 2
PLTRST3#
1 2
R842 0_0402_5%~D
1 2
@
R466 0_0402_5%~D
R849 1.5K_0402_1%~D
PLTRST3#_USH
LPC_EN_R
IRQ_SERIRQ_R
R468 0_0402_5%~D
1 2
R469 0_0402_5%~D
1 2
R470 1.5K_0402_5%~D
1 2
R768 22_0402_5%~D
1 2
R769 22_0402_5%~D
1 2
1 2
R472 10_0402_5%~D
@
T142PAD~D
R481 0_0402_5%~D
XOXI
3
4
1
2
GPIO2_TER_VDDMON
1 2
T139PAD~D
T63PAD~D
T64PAD~D
47K_0402_1%~D
1 2
1 2
1 2
12
BCM5880_IO
AUX1UC
AUX2UC
When using the 73S8009C,no-stuff R768,R769,R490
When using the 73S8009CN,stuff R768,R769,R490
SC_RST
SC_CLK
SC_C4
SC_IO
SC_C8
SC_DET
TYCO_1-1775784-1
U32A
M7
LCLK
R6
LPCEN
N5
GPIO_17/LRESET_N
P5
GPIO_18/LFRAME_N
M6
GPIO_19/LSERIRQ
R5
GPIO_20/LAD[0]
N6
GPIO_21/LAD[1]
N7
GPIO_22/LAD[2]
P6
GPIO_23/LAD[3]
P7
GPIO_24/LPCPD_N
B5
GPIO_0/UART_RX
B4
GPIO_1/UART_TX
D6
GPIO_2/UART_CTS
A4
GPIO_3/UART_RTS
C5
GPIO_6/SSP_CLK
B3
GPIO_7/SSP_FSS
D5
GPIO_8/SSP_RXD
A3
GPIO_9/SSP_TXD
C4
GPIO_14
A2
GPIO_15
D4
GPIO_16
R13
USBD_DN
R14
USBD_UP
P14
GPIO_27/USBD_ATATCH
N11
USBH_DN0
N12
USBH_UP0
M11
USBH_OC_0
N13
USBH_DN1
P13
USBH_UP1
R15
USBH_OC_1
P8
GPIO_25/SC_SEL5V
R7
GPIO_26/SC_SEL18V
N15
SC_CINRUSH
L14
SC_CLK
L15
SC_VCC
K15
SC_RST
K14
SC_IO
J14
SC_FCB
J15
SC_FCB_ENB
M10
SC_DET
M15
SC_PWR
N14
1U_0402_6.3V6K~D
SC_PWR
2
C1023
1
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
2
C1013
1
1
19
VCC
26
VPC
29
VDD
15
VP
27
LIN
23
DM
25
DP
R773 100K_0402_5%~D
14
PRES
R491 0_0402_5%~D
22
I/O
R493 0_0402_5%~D
21
AUX1
R492 0_0402_5%~D
20
AUX2
R772 0_0402_5%~D
16
CLK
18
RST
17
GND
28
GND
31
GND
SPI_TXD
SPI_CLK
SPI_RST
SPI_CS
SC_DET
BCM5880_GPIO15
2
BCM5880
LPC
UARTSPISPISmard Card
SMC_ADD_15/REFCLK_FREQ_0
SMC_ADD_16/REFCLK_FREQ_1
SMC_ADD_17/BOOT_SRC_0
SMC_ADD_18/BOOT_SR_1
BootStrap
BCM5880KFBG_FBGA225~D
LPC_LFRAME#<23,29,37,38>
LPC_LAD0<23,29,37,38>
LPC_LAD1<23,29,37,38>
LPC_LAD2<23,29,37,38>
LPC_LAD3<23,29,37,38>
C1014
+SC_VCC
+LIN
L69 10UH_LQH32CN100K53L_10%~D
TER_USBH_N1
TER_USBH_P1
1 2
1 2
1 2
1 2
27P_0402_50V8J~D
2
C633
1
1
2
3
4
@
R914 100K_0402_5%~D
@
R341 4.7K_0402_5%~D
R705 0_0402_5%~D
R723 0_0402_5%~D
R724 0_0402_5%~D
R732 0_0402_5%~D
R733 0_0402_5%~D
+3.3V_RUN
12
12
27P_0402_50V8J~D
2
1
U34
D
Q
C
VSS
RESET#
VCC
S#
W#
M45PE16-VMP6TP_SO8~D
1 2
1 2
2
2
1
8
7
6
5
SMC_ADD_0
SMC_ADD_1
SMC_ADD_2
SMC_ADD_3
SMC_ADD_4
SMC_ADD_5
SMC_ADD_6
SMC_ADD_7
SMC_ADD_8
SMC_ADD_9
SMC_ADD_10
SMC_ADD_11
SMC_ADD_12
SMC_ADD_13
SMC_ADD_14
SMC_ADD_19
SMC_ADD_20
SMC_ADD_21
SMC_ADD_22
SMC_ADD_23
SMC_DATA_0
SMC_DATA_1
SMC_DATA_2
SMC_DATA_3
SMC_DATA_4
SMC_DATA_5
SMC_DATA_6
SMC_DATA_7
SMC_DATA_8
SMC_DATA_9
SMC_DATA_10
SMC_DATA_11
SMC_DATA_12
SMC_DATA_13
SMC_DATA_14
SMC_DATA_15
SMC_ADV_N
SMC_BLS_N_0
SMC_BLS_N_1
SMC_CRE
SMC_CS_N_0
SMC_CS_N_1
SMC_IO_3V
SMC_OE_N
SMC_WE_N
1 2
1 2
1 2
1 2
1 2
0.1U_0402_16V4Z~D
10U_0805_10V6M~D
1
C620
2
C621
4.7U_0603_6.3V6K~D
12
+3.3V_RUN
SC_DET
SC_IO
SC_C4
SC_C8
SC_CLK
SC_RST
C1015
+3.3V_RUN
SPI_RXD
BCM5880_GPIO15
C706
12
R476
5.1M_0402_5%~D
POR_EXTR
R488
3.3M_0402_5%~D
1 2
1U_0603_10V4Z~D
1
C644
2
H1
J4
H2
H3
G1
H4
F2
G4
G2
G3
E2
F4
F1
F3
D2
E3
D1
E1
C2
D3
C1
E4
B1
C3
R2
P3
R1
P2
R3
M4
N2
N3
P1
M3
M2
L4
N1
L3
L2
K4
K2
J1
K1
J3
M1
K3
P12
J2
L1
+1.2V_RUN_PLL
1U_0603_10V4Z~D
1
2
SMC_ADD15
SMC_ADD16
SMC_ADD17
SMC_ADD18
FP_RESET# <33>
@
22_0402_5%~D
BBCLK
R555
1 2
@
R848 4.7K_0402_1%~D
1 2
PLTRST3#
1 2
R1071
@
0_0402_5%~D
+3.3V_RUN
1 2
R339
4.7K_0402_5%~D
LPC_LFRAME#_R
LPC_LAD0_R
LPC_LAD1_R
LPC_LAD2_R
LPC_LAD3_R
+3.3V_RUN
R485
4.7K_0402_5%~D
1 2
SBOOT
@
R898
4.7K_0402_5%~D
1 2
CLK_PCI_TPM
10_0402_5%~D
100K_0402_5%~D
4@
12
R744
12
R1016
4.7P_0402_50V8C~D
PCI_TPM_TERM
2
C589
1
U32B
F12
POR_EXTR
1U_0603_10V4Z~D
1
C593
C592
2
OVSTB
SBOOT
SWV
REF_XIN
REF_XOUT
BBCLK_R
RST_N
SPI_RST
JTAG_CLK_USH
JTAG_TDI_USH
JTAG_TDO_USH
JTAG_TMS_USH
JTAG_RST#_USH
JTCE_USH
@
R899
0_0402_5%~D
1 2
JTAG_CLK_USH
@
R895
0_0402_5%~D
1 2
JTAG_TDI_USH
JTAG_TDO_USH
@
R896
0_0402_5%~D
1 2
JTAG_TMS_USH
JTAG_RST#_USH
@
R897
0_0402_5%~D
1 2
JTCE_USH
+2.5V_RUN_AVDD
placement close to U32 pins: RFREADER_TXN1 &
RFREADER_TXP1, and ESD diodes should be placed
between Pi filter and connector.
POR_AVSS
G13
POR_EXTR
G15
POR_INT12
G14
POR_MONITOR
B14
PLL_VDD_1P2I
B15
PLL_AVDD_1P2O
D12
PLL_VSS
D13
PLL_VDD_1P2I
E12
PLL_VSS
A15
NC
N9
OVSTB/ZEROB
M8
SCANACCMODE
P9
SECURE_BOOT
M12
SWV/ERROR,OSC1,OSC2,SPL
R9
TESTMODE/TST_SEC_BOOT
R10
IDDQ_EN/CM3_MODE
F15
REFCLK_XTALIN
F14
REFCLK_XTALOUT
D15
AUXCLK_XTALIN
E14
AUXCLK_XTALOUT
A1
CLKOUT
B2
CLKOUT_EN
N8
RST_N
R8
RSTOUT_N
P10
JTAG_TCK
R11
JTAG_TDI
N10
JTAG_TDO
R12
JTAG_TMS
P11
JTAG_TRSTN
M9
JTCE
+3.3V_RUN
1 2
R474 4.7K_0402_5%~D
1 2
R484 4.7K_0402_5%~D
1 2
R736 4.7K_0402_5%~D
1 2
R810 4.7K_0402_5%~D
1 2
R479 4.7K_0402_5%~D
R850 10K_0402_5%~D
1 2
R1034 4.7K_0402_5%~D
BLM18BB100SN1D_0603~D
L36
1U_0402_6.3V6K~D
2
C624
1
RFREADER_RXN
RFREADER_RXP RFREADER_TXP1
SWV
1 2
C594
@
680P_0402_50V7K
BCM5880
JTAG CLK
LPD#
OVSTB
TAMPER_N JTAG_RST#_USH
RST_N
SMC_ADD16
SC_USB#
12
FP_RESET#
Function
Boot SRC
REF CLK
+RFID_AVDD2P5
12
2
1
3K_0402_1%~D
1 2
3K_0402_1%~D
1 2
AD[18:17]
AD[16:15]
1U_0402_6.3V6K~D
C625
R494
1 2
C639 1U_0603_10V6K~D
R498
1 2
C643 1U_0603_10V6K~D
SSMC
1
2
+1.2V_VDDC_5880
+RFID_AVDD2P5
HF_RFIDTAG_AVDD2P5
HF_RFIDTAG_AVDD2P5
HF_RFIDTAG_DVDD1P2
HF_RX_ADC_AVDD1P2
HF_RX_AVDD1P2
HF_RX_AVDD2P5
HF_TX_AVDD1P2
HF_TX_AVDD2P5
HF_TX_AVDD3P3
HF_RFIDTAG_AVSS
HF_RFIDTAG_VREF
HF_RFIDTAG_VRX_N
HF_RFIDTAG_VRX_P
HF_RFIDTAG_VTX
HF_RX_TEST0
HF_RX_TEST1
HF_RX_TEST2
HF_RX_TEST3
RDIF
HF_RFIDTAG_AVSS
HF_RFIDTAG_AVSS
HF_RFIDTAG_DVSS
HF_RX_ADC_AVSS1
HF_RX_ADC_AVSS2
BCM5880KFBG_FBGA225~D
1 2
R473 1K_0402_5%~D
1 2
R483 4.7K_0402_5%~D6@
1 2
R737 1K_0402_5%~D
1 2
R478 4.7K_0402_5%~D
00 01 10 11
SMC SPI RVDUSB
RVD
+1.2V_RUN_AVDD
BLM18BB100SN1D_0603~D
0.1U_0402_16V4Z~D
L37
1U_0603_10V4Z~D
C626
1
C627
2
RFREADER_TXN1
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
A7
F7
C6
E10
F9
G9
D8
A8
D9
B6
A6
C7
B7
E7
B10
C10
A11
A12
C11
HF_RX_N
B11
HF_RX_P
C9
HF_TX_N
B9
HF_TX_P
C8
D7
A5
E9
G10
F10
HF_RX_AVSS
A10
HF_RX_AVSS
A9
HF_TX_AVSS
B8
HF_TX_AVSS
E8
HF_TX_AVSS
BBCLK
LPC_EN_R
SMC_ADD15
24MHZ 27.12MHz 48MHz
+RFID_AVDD1P2
12
1U_0402_6.3V6K~D
2
C628
1
100NH_LLQ1608-FR10G_2%~D
1 2
150P_0402_50V8J~D
C641
1
2
100NH_LLQ1608-FR10G_2%~D
1 2
150P_0402_50V8J~D
1
C647
2
SMC_ADD18
SMC_ADD17
USBH_OC0#
USBH_OC1#
L71
L72
68P_0402_50V8J~D
+RFID_AVDD1P2
+RFID_AVDD3P3
1 2
C595
0.01U_0402_25V7K~D
RFTAG_VRXN
RFTAG_VRXP
RFREADER_RXN
RFREADER_RXP
RFREADER_TXN1
RFREADER_TXP1
+3.3V_RUN
+3.3V_RUN
4.7K_0402_5%~D
@
R475
1 2
4.7K_0402_5%~D
R820
1 2
0.1U_0402_16V4Z~D
1
C629
2
1
C1070
2
68P_0402_50V8J~D
C1071
1
2
+3.3V_RUN
BBCLK
12
R471 0_0402_5%~D
TAMPER_N
+3.3V_RUN
4.7K_0402_5%~D
4.7K_0402_5%~D
R844
R819
1 2
4.7K_0402_5%~D
4.7K_0402_5%~D
@
R482
1 2
+3.3V_RUN
+3.3V_RUN
1 2
@
R846
1 2
1 2
R496 4.12K_0402_1%~D
1 2
R497 4.12K_0402_1%~D
1 2
1 2
Pull-downs for 5880
Rev A0, and pull-ups
for Rev B0
RFTAG_VRXN
C13
J11
K11
L13
M14
K13
H14
H15
H13
H12
J13
L10
L11
4.7K_0402_5%~D
R845
4.7K_0402_5%~D
@
R847
U32C
VDDC
E5
VDDC
F5
VDDC
VDDC
VDDC
K6
VDDC
K7
VDDC
K9
VDDC
N4
VDDC
P4
VDDC
E6
VDDO_VAR
F6
VDDO_VAR
G5
VDDO_SMC
H5
VDDO_SMC
J5
VDDO_SMC
K8
VDDO_LPC
L7
VDDO_LPC
K5
VDDO_33CORE
L5
VDDO_33CORE
L6
VDDO_33CORE
VDDO_33SC
VDDO_33SC
VDDO_SC
V3P3_BBLCLK
V3P3_PWRGOOD
V3P3_TAMPER_N
VDD_BB
VDD_BB
L8
VESD
L9
VDDO_33
VDDO_33
VDDO_33
+3.3V_RUN
3
2
1
BCM5880
BCM5880KFBG_FBGA225~D
1U_0402_6.3V6K~D
2
C612
1
1U_0402_6.3V6K~D
2
C635
1
1
D28
@
DA204U_SOT323-3~D
C640 1U_1206_100V4Z~D
C642 1U_1206_100V4Z~D
3
1
2
D29
@
DA204U_SOT323-3~D
1
1 2
CORE_CINRUSH
CORE_PWRDN
ALDO_PWRDN
AVDD33_LDO25
AVDD_1P2I_AUX
AVDD_1P2I_REF
1U_0402_6.3V6K~D
2
C613
1
1U_0402_6.3V6K~D
2
C636
1
1 2
1 2
R4
M5
D10
A14
G12
AVDD_2P5I
B13
AVDD_2P5O
A13
AVDD25_ldo12
B12
AVDD25_ldo12
E11
AVDD_1P2O
E13
F13
D14
AVDD25_PLL
P15
OTP_PWR
F11
AVSS_LDO12
C12
AVSS_ldo25
D11
AVSS_ldo25
C15
AVSS_AUX
E15
AVSS_REF
C14
AVSS_PLL
G11
VSS
G6
VSS
G7
VSS
G8
VSS
H10
VSS
H11
VSS
H6
VSS
H7
VSS
H8
VSS
H9
VSS
J10
VSS
J12
VSS
J6
VSS
J7
VSS
J8
VSS
J9
VSS
K10
VSS
K12
VSS
L12
VSS
M13
VSS
F8
VSS
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
2
C615
C614
1
1
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
2
C637
C638
1
1
+3.3V_RUN
BLM18BB100SN1D_0603~D
L38
3.3U_0603_10V4Z~D
1
C630
2
Hardware enable for USH TPM:Populate D70 & R841,
No Stuff R483.
Hardware disable for USH TPM:No Stuff D70 &
R841, Populate R483
C591 680P_0402_50V7K@
1 2
R463 2.2K_0402_5%~D
1 2
R465 4.7K_0402_5%~D
+2.5V_RUN_AVDD
+3.3V_RUN
+1.2V_RUN_AVDD
+1.2V_RUN_PLL
+OTP_PWR
R467 0_0603_5%~D@
R829 0_0603_5%~D
+1.2V_VDDC_5880
1U_0402_6.3V6K~D
2
C596
1
1U_0402_6.3V6K~D
2
C873
1
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
2
2
C617
C616
1
1
1
4.7U_0603_6.3V6M~D
1
C1017
C875
2
+RFID_AVDD3P3
12
1U_0402_6.3V6K~D
2
C631
1
RFREADER_TXN1_PI
ANT_RFTAG_VRXN_RRFTAG_VRXP
ANT_RFTAG_VRXP_R
RFREADER_TXP1_PI
CONTACTLESS_DET#<24>
4.7U_0603_6.3V6M~D
1
2
1U_0402_6.3V6K~D
2
1
2
1
2
1
C618
C1018
12
12
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
1
1
2
+3.3V_RUN
+SC_PWR
1U_0402_6.3V6K~D
2
2
C598
C597
1
1
4.7U_0603_6.3V6M~D
1
C877
C1020
2
1U_0402_6.3V6K~D
C619
+2.5V_RUN_AVDD
1U_0402_6.3V6K~D
2
1
+1.2V_RUN_AVDD
0.1U_0402_16V4Z~D
2
C632
1
JCS1
1
2
3
4
5
6
TYCO_1-1775784-0
1U_0402_6.3V6K~D
C605
1U_0402_6.3V6K~D
C601
1
2
3
4
G1
5
G2
6
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
USH I/F
LA-3801P
4.7U_0603_6.3V6M~D
Place
1
C1019
close
to
pinA14
2
C599
1U_0402_6.3V6K~D
2
1
2
1
7
8
36 66Thursday, June 12, 2008
4.7U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1
2
C606
1U_0402_6.3V6K~D
C1021
C607
2
1
C602
0.8
of
Page 37
+3.3V_ALW
1 2
R501 10K_0402_5%~D
1 2
R503 4.7K_0402_5%~D
1 2
R862 100K_0402_5%~D
R877 100K_0402_5%~D
1 2
D D
C C
B B
A A
R754 100K_0402_5%~D
+3.3V_ALW2
1 2
R502 10K_0402_5%~D
1 2
R923 10K_0402_5%~D
R929 100K_0402_5%~D
+3.3V_RUN
SN74LVC1G125DKR_SC70-5~D
1 2
R874 100K_0402_5%~D
1 2
R788 10K_0402_5%~D@
1 2
R816 100K_0402_5%~D
R505 100K_0402_5%~D
1 2
R658 10K_0402_5%~D
C88
3@
0.1U_0402_16V4Z~D
1 2
TSTX_ECRX
INSTANT_ON_SW#<38,42>
JTS1
1
1
2
2
3
3
4
4
5
5
6
GND
7
GND
TYCO_1734595-5
3@
5
PCIE_WAKE#
SLICE_BAT_PRES#
DCIN_CBL_DET#
CELL_CHARGER_DET#
12
PWR_BTN_BD_DET#
USB_SIDE_EN#
ESATA_USB_PWR_EN#
USB_POWERSHARE_PWR_EN#
12
WIRELESS_ON#/OFF
SP_TPM_LPC_EN
LCD_TST
PANEL_BKEN_MCH
12
SYS_LED_MASK#
+3.3V_RUN
1
5
P
4
OE#
A2Y
G
U60
SN74LVC1G125DKR_SC70-5~D
3
3@
+5V_RUN
3@
0.1U_0402_16V4Z~D
5
1
P
4
OE#
A2Y
G
U61
3@
3
INSTANT_ON_SW#
TSRX_ECTX_BUF
TSTX_ECRX
ROUSH_PAID_TS_DET# <24>
10K_0402_5%~D
1 2
BID0
BID1
BID2
CHIPSET_ID0
CHIPSET_ID1
5
TSTX_ECRX_BUF
C89
12
TSRX_ECTXTSRX_ECTX_BUF
D66
@
RB751S40T1_SOD523-2~D
1 2
R1036
0_0402_5%~D
+5V_RUN
10K_0402_5%~D
10K_0402_5%~D
R529
R530
1 2
1 2
+3.3V_RUN
USB_POWERSHARE_PWR_EN#<33>
WPAN_RADIO_DIS#<34>
EXPRCRD_PWREN#<32>
EXPRCRD_STDBY#<32>
BC_INT#_ECE5028<38>
BC_DAT_ECE5028<38>
BC_CLK_ECE5028<38>
EN_DOCK_PWR_BAR<50>
CELL_CHARGER_DET#<33>
AUD_HP_NB_SENSE<27,28,33>
ESATA_USB_PWR_EN#<33>
WWAN_RADIO_DIS#<34>
INSTANT_ON_SW_D#
21
10K_0402_5%~D
@
R531
R532
1 2
R882
1@
100K_0402_5%~D
1 2
DET_PCCRD_EXPSCRD#
R883
2@
100K_0402_5%~D
1 2
PBAT_PRES#<43>
SCRL_LED#<42>
NUM_LED#<42>
DCIN_CBL_DET#<43>
PBATT_OFF<50>
MDC_RST_DIS#<33>
PCIE_WAKE#<32,34>
WIRELESS_ON#/OFF<42>
USB_SIDE_EN#<33>
EN_I2S_NB_CODEC<27>
CB_HWSPND#<31>
ADAPT_OC<48>
LCD_TST<19>
PSID_DISABLE#<43>
PANEL_BKEN_MCH<12>
DOCKED<29,30>
DOCK_DET#<21,35>
AUD_NB_MUTE<28>
LCD_VCC_TEST_EN<19>
CCD_OFF<19>
1.05V_RUN_ON<40>
HDDC_EN<26>
MODC_EN<26>
SLICE_BAT_PRES#<35,43,50>
PWR_BTN_BD_DET#<42>
LAN_DISABLE#_R<29>
CAP_LED#<42>
SYS_LED_MASK#<42>
SIO_EXT_WAKE#<24>
ICH_PME#<22>
ICH_PCIE_WAKE#<24>
WLAN_RADIO_DIS#<34>
+3.3V_ALW
10K_0402_5%~D
@
R533
1 2
1 2
R534 10K_0402_5%~D@
1 2
R535 10K_0402_5%~D@
1 2
R536 10K_0402_5%~D@
1 2
R537 10K_0402_5%~D
1 2
R538 10K_0402_5%~D
Option for select PC
Card & Express Card
For PC Card stuff R882
For Experss card stuff
R883
USB_POWERSHARE_PWR_EN#
R526 0_0402_5%~D
4
+3.3V_ALW
34
57
85
U35
PBAT_PRES#
DCIN_CBL_DET#
PBATT_OFF
MDC_RST_DIS#
PCIE_WAKE#
WIRELESS_ON#/OFF
WPAN_RADIO_DIS#
EXPRCRD_PWREN#
EXPRCRD_STDBY#
BC_INT#_ECE5028
BC_DAT_ECE5028
BC_CLK_ECE5028
TSTX_ECRX_BUF
TSRX_ECTX
DET_PCCRD_EXPSCRD#
USB_SIDE_EN#
EN_I2S_NB_CODEC
CB_HWSP ND#
EN_DOCK_PWR_BAR
ADAPT_OC
LCD_TST
PSID_DISABLE#
PANEL_BKEN_MCH
DOCKED
DOCK_DET#
AUD_NB_MUTE
CELL_CHARGER_DET#
LCD_VCC_TEST_EN
CCD_OFF
AUD_HP_NB_ SENSE
ESATA_USB_PWR_EN# LPC_LAD3
LID_CL_SIO#
1.05V_RUN_ON
INSTANT_ON_SW_D#
HDDC_EN
MODC_EN
SLICE_BAT_PRES#
PWR_BTN_BD_DET#
LAN_DISABLE#_R
SYS_LED_MASK#
1 2
ICH_PME#
ICH_PCIE_W AKE#
WLAN_RADIO_DIS#
WWAN_RADIO_DIS#
VGA_IDENTIFY
CHIPSET_ID1
R528
10K_0402_5%~D
12
CHIPSET_ID0
BID2
BID1
BID0
4
97
GPIOA[0]
98
GPIOA[1]
99
GPIOA[2]
100
GPIOA[3]
101
GPIOA[4]
102
GPIOA[5]
103
GPIOA[6]
104
GPIOA[7]
24
GPIOH[0]
25
GPIOH[1]
26
GPIOH[4]
27
GPIOH[5]
58
BC_INT#
59
BC_DAT
60
BC_CLK
1
GPIOE[0]/RXD
2
GPIOE[1]/TXD
3
GPIOE[2]/RTS#
4
GPIOE[3]/DSR#
5
GPIOE[4]/CTS#
84
GPIOE[5]/DTR#
83
GPIOE[6]/RI#
6
GPIOE[7]/DCD#
65
GPIOB[0]/INIT#
66
GPIOB[1]/SLCTIN#
67
GPIOC[2]/SCLT
68
GPIOC[3]/PE
69
GPIOC[4]/BUSY
70
GPIOC[5]/ACK#
71
GPIOC[6]/ERROR#
73
GPIOC[7]/ALF#
74
GPIOD[0]/STROBE#
75
GPIOC[1]/PD7
76
GPIOC[0]/PD6
77
GPIOB[7]/PD5
78
GPIOB[6]/PD4
79
GPIOB[5]/PD3
80
GPIOB[4]/PD2
81
GPIOB[3]/PD1
82
GPIOB[2]/PD0
61
GPIOD[1]
62
GPIOD[2]
63
GPIOD[3]/VBUS_DET
28
GPIOD[4]/OCS1_N
29
GPIOD[5]/OCS2_N
30
GPIOD[6]/OCS3_N
31
GPIOD[7]/OCS4_N
32
GPIOH[6]
33
GPIOH[7]
88
GPIOG[0]
89
GPIOG[1]
90
GPIOG[2]
91
GPIOG[3]
92
GPIOG[4]
93
GPIOG[5]
94
GPIOG[6]
95
GPIOG[7]
106
SYSOPT1/GPIOH[2]
107
SYSOPT0/GPIOH[3]
109
GPIOF[7]
110
GPIOF[6]
111
GPIOF[5]
112
GPIOF[4]
113
IRTX
114
IRRX
115
GPIOF[3]/IRMODE/IRRX3B
116
GPIOF[2]/IRTX2
117
GPIOF[1]/IRRX2
118
GPIOF[0]/IRMODE/IRRX3A
ECE5028-NU_VTQFP128_14X14~D
BID2 BID1 BID0
000
0
0
1X02
0
0
1
0
11
0
111
ECE5028-NU
(ECE5018)
REV
X00
1 X01
0
X0311
0
X04
X05
X06
011
X07
108
VCC1
VCC1
VCC1
VCC1
USB
GPIO
TEST
CLK
LPC
DLPC
CHIPSET_ID0 CHIPSET_ID1
00
3
1
C1072
10U_0805_10V4Z~D
2
VCC1(VDDA33)
GPIOJ[7](VDDA33)
GPIOK[4](VDDA33)
GPIOI[1](VCC1)
GPIOJ[2](USBDP0)
GPIOJ[3](USBDN0)
GPIOJ[6](USBDP1)
GPIOJ[5](USBDN1)
GPIOK[0](USBDP2)
GPIOK[1](USBDN2)
GPIOK[3](USBDP3)
GPIOK[2](USBDN3)
GPIOK[5](USBDP4)
GPIOK[6](USBDN4)
GPIOI[6](VDDA33PLL)
GPIOI[5](VDDA18PLL)
GPIOI[2](VDD18)
CAP_LDO
GPIOJ[0](RBIAS)
TEST_PIN
GPIOI[7](ATEST)
GPIOI[4](XTAL1/CLKIN)
GPIOI[3](XTAL2)
CLKRUN#
CLKI (14.318 MHz)
DLFRAME#
DCLK_RUN#
DSER_IRQ
GPIOJ[4](VSS)
GPIOK[7](VSS)
GPIOJ[1](VSS)
LAD0
LAD1
LAD2
LAD3
LFRAME#
LRESET#
PCICLK
LDRQ0#
LDRQ1#
SER_IRQ
DLAD0
DLAD1
DLAD2
DLAD3
DLDRQ1#
PWRGD
OUT65
VSS
VSS
VSS
VSS
VSS
VSS
VSS
1
C648
0.1U_0402_16V4Z~D
2
8
14
20
119
9
10
13
12
15
16
19
18
21
22
125
124
120
+CAP_LDO
86
127
35
126
123
122
54
52
49
47
42
41
56
37
46
44
39
64
96
55
53
50
48
43
38
45
40
7
105
11
17
23
36
51
72
87
121
128
DOCK_MIC_DET
SNIFFER_BLUE#
SNIFFER_YELLOW#
DOCK_HP_DET
CRT_SWITCH
ME_FWP
NB_AC_OFF
RUN_ON
1.5V_RUN_ON
1 2
R509 0_0402_5%~D
0.9V_DDR_VTT_ON
8mil
DP_MB_EN
R514
1K_0402_5%~D
DOCK_AC_OFF_EC
3.3V_RUN_ON
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LFRAME#
PLTRST2#
CLK_PCI_5028
CLKRUN#
LPC_LDRQ0#
LPC_LDRQ1#
IRQ_SERIRQ
CLK_SIO_14M
D_LAD0
D_LAD1
D_LAD2
D_LAD3
D_LFRAME#
D_CLKRUN#
D_DLDRQ1#
D_SERIRQ
RUNPWROK
SP_TPM_LPC_EN
1
C657
4.7U_0603_6.3V4Z~D
2
Note
00
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
1
C652
0.1U_0402_16V4Z~D
2
DP_MB_EN <21>
ACAV_IN_NB <38,48>
12
ACAV_IN_NB
SIO_SLP_S3# <24>
3.3V_RUN_ON <40>
LPC_LFRAME# <23,29,36,38>
PLTRST2# <22,38>
CLK_PCI_5028 <6>
CLKRUN# <24,29,31,38>
LPC_LDRQ0# <23>
LPC_LDRQ1# <23>
IRQ_SERIRQ <24,29,31,36,38>
CLK_SIO_14M <6>
D_LAD0 <35>
D_LAD1 <35>
D_LAD2 <35>
D_LAD3 <35>
D_LFRAME# <35>
D_CLKRUN# <35>
D_DLDRQ1# <35>
D_SERIRQ <35>
TP_DET# <39>
2
1
C649
0.1U_0402_10V7K~D
2
DOCK_MIC_DET <27>
MCH_TSATN_EC <10>
SNIFFER_BLUE# <42>
SNIFFER_YELLOW# <42>
DOCK_HP_DET <27>
CRT_SWITCH <20>
ME_FWP <23>
NB_AC_OFF <43,48,50>
DP_PRIORITY <21>
2.5V_RUN_PWRGD <18,41>
RUN_ON <19,28,40,41>
1.5V_RUN_ON <45>
IMVP_VR_ON <47>
IMVP_PWRGD <24,41,47,49>
0.9V_DDR_VTT_ON <46>
+3.3V_ALW
5
1
P
IN1
O
2
IN2
G
U69
3
74AHC1G08GW_SOT353-5~D
LPC_LAD[0..3] <23,29,36,38>
RUNPW ROK <38,41,47>
SP_TPM_LPC_EN <29,36>
GPIO_PSID_SELECT <43>
SPI_WP#_SEL <24>
2
1
2
+3.3V_ALW
0.1U_0402_16V4Z~D
1
C653
2
C1051
0.1U_0402_16V4Z~D
1 2
4
D65
RB751S40T1_SOD523-2~D
1 2
2 1
ME_FWP
R1081
@
0_0402_5%~D
1
1
C650
0.1U_0402_16V4Z~D
DOCK_AC_OFF <35,50>
12
R1078
33K_0402_5%~D
+3.3V_RUN
R648
10K_0402_5%~D
1 2
R649
@
10K_0402_5%~D
1 2
+3.3V_ALW
LID_CL_SIO#
12
R524
1M_0402_5%~D
1
C655
0.047U_0402_16V4Z~D
2
C651
0.1U_0402_16V4Z~D
2
SNIFFER_BLUE#
SNIFFER_YELLOW#
TP_DET#
INSTANT_ON_SW_D#
D_CLKRUN#
D_SERIRQ
D_DLDRQ1#
RUN_ON
1.5V_RUN_ON
1.05V_RUN_ON
3.3V_RUN_ON
0.9V_DDR_VTT_ON
PBATT_OFF
VGA_IDENTIFY
R506
@
10_0402_5%~D
C654
@
4.7P_0402_50V8C~D
R525
10_0402_5%~D
12
R507 100K_0402_5%~D@
R508 100K_0402_5%~D@
R756 100K_0402_5%~D
R1035 100K_0402_5%~D@
R510 100K_0402_5%~D
R511 100K_0402_5%~D
R512 100K_0402_5%~D
R515 100K_0402_5%~D
R516 100K_0402_5%~D
R518 100K_0402_5%~D
R519 100K_0402_5%~D
R520 100K_0402_5%~D
R521 100K_0402_5%~D
R522 100K_0402_5%~D
12
1
2
LID_CL#
12
12
12
1 2
12
12
12
12
12
12
12
12
12
1 2
CLK_PCI_5028CLK_SIO_14M
R527
10_0402_5%~D
C656
4.7P_0402_50V8C~D
LID_CL# <42>
+3.3V_ALW
+3.3V_RUN
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
ECE5028
LA-3801P
37 66T h u r s da y, June 12, 2008
1
of
12
1
2
0.8
Page 38
5
+3.3V_ALW
R540 2.2K_0402_5%~D
R542 2.2K_0402_5%~D
D D
C C
B B
A A
R543 100K_0402_5%~D
R545 100K_0402_5%~D
R546 100K_0402_5%~D
R547 10K_0402_5%~D
R548 2.2K_0402_5%~D
R549 2.2K_0402_5%~D
R551 2.2K_0402_5%~D
R552 2.2K_0402_5%~D
R837 100K_0402_5%~D@
R838 2.2K_0402_5%~D
R839 2.2K_0402_5%~D
R911 10K_0402_5%~D
R561 1M_0402_5%~D
1 2
R563 2.7K_0402_5%~D
1 2
R564 100K_0402_5%~D
1 2
R566 100K_0402_5%~D
1 2
R568 100K_0402_5%~D
1 2
R1046 1M_0402_5%~D
JDEG1
@
5
5
4
4
3
3
2
2
1
1
Molex_53261
JP2
@
1
2
7
3
G1
8
4
G2
5
6
ACES_85204-06001~D
32 KHz Clock
Same as Laguna
MEC5035_XTAL1
32.768K_12.5P_1TJS125DJ4A420P~D
MEC5035_XTAL2
CKG_SMBDAT
1 2
CKG_SMBCLK
1 2
BC_DAT_ECE5028
1 2
BC_DAT_EMC4002
12
BC_DAT_ECE1077
12
DOCK_SMB_ALERT#
12
LCD_SMBCLK
1 2
LCD_SMBDAT
1 2
PBAT_SMBDAT
1 2
PBAT_SMBCLK
1 2
LPC_LDRQ#_MEC5035
12
CARD_SMBDAT
1 2
CARD_SMBCLK
1 2
HOST_DEBUG_TX
12
M_ON
12
AUX_ON
DDR_ON
SUS_ON
ICH_ALW
DOCK_POR_RST#
+3.3V_ALW
100K_0402_5%~D
12
R574
MSDATA
MSCLK
1 2
R577 0_0402_5%~D
+3.3V_ALW
10K_0402_5%~D
49.9_0402_1%~D
12
12
R581
R580
1
2
3
4
5
6
Y4
22P_0402_50V8J~D
1
C674
2
10K_0402_5%~D
12
R575
HOST_DEBUG_RX
10K_0402_5%~D
12
12
R582
14
23
1
2
10K_0402_5%~D
12
R576
10K_0402_5%~D
10K_0402_5%~D
R583
1 2
JTAG_TDI
JTAG_TMS
JTAG_CLK
JTAG_TDO
27P_0402_50V8J~D
C675
R584
Place closely pin 58
CLK_PCI_5035
10_0402_5%~D
4.7P_0402_50V8C~D
CLK_TP_SIO<39>
DAT_TP_SIO<39>
CLK_KBD<35>
DAT_KBD<35>
CLK_MSE<35>
DAT_MSE<35>
PBAT_SMBDAT<43>
PBAT_SMBCLK<43>
DOCK_POR_RST#<35>
SUS_ON<40,41>
BREATH_LED#<35,42>
ICH_ALW<40>
KYBRD_BKLT_PWM<39>
BC_CLK_EMC4002<18>
BC_DAT_EMC4002<18>
BC_INT#_EMC4002<18>
BC_INT#_ECE1077<39>
BC_DAT_ECE1077<39>
BC_CLK_ECE1077<39>
BC_INT#_ECE5028<37>
BC_DAT_ECE5028<37>
BC_CLK_ECE5028<37>
SIO_EXT_SMI#<24>
SIO_RCIN#<23>
IRQ_SERIRQ<24,29,31,36,37>
PLTRST2#<22,37>
CLK_PCI_5035<6>
LPC_LFRAME#<23,29,36,37>
LPC_LAD0<23,29,36,37>
LPC_LAD1<23,29,36,37>
LPC_LAD2<23,29,36,37>
LPC_LAD3<23,29,36,37>
CLKRUN#<24,29,31,37>
SIO_EXT_SCI#<24>
MEC5035_XTAL2
EC_32KHZ_OUT<18>
12
R588
1
C673
2
4
+RTC_CELL
CLK_TP_SIO
DAT_TP_SIO
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
PBAT_SMBDAT
PBAT_SMBCLK
JTAG_TDI
JTAG_TDO
JTAG_CLK
JTAG_TMS
JTAG_RST#
C1053
0.1U_0402_16V4Z~D
1 2
DOCK_POR_RST#
SUS_ON
BREATH_LED#
ICH_ALW
KYBRD_BKLT_PWM
BC_CLK_EMC4002
BC_DAT_EMC4002
BC_INT#_EMC4002
BC_INT#_ECE1077
BC_DAT_ECE1077
BC_CLK_ECE1077
BC_INT#_ECE5028
BC_DAT_ECE5028
BC_CLK_ECE5028
SIO_EXT_SMI#
SIO_RCIN#
LPC_LDRQ#_MEC5035
IRQ_SERIRQ
PLTRST2#
CLK_PCI_5035
LPC_LFRAME#
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
CLKRUN#
SIO_EXT_SCI#
MEC5035_XTAL1
12
R587 0_0402_5%~D
1 2
R544
0_0402_5%~D
U36
PS/2 INTERFACE
9
GPIO007/I2C1D_DATA/PS2_CLK0B
10
GPIO010/I2C1D_CLK/PS2_DAT0B
75
GPIO110/PS2_CLK2/GPTP-IN6
76
GPIO111/PS2_DAT2/GPTP-OUT6
77
GPIO112/PS2_CLK1A
78
GPIO113/PS2_DAT1A
79
GPIO114/PS2_CLK0A
80
GPIO115/PS2_DAT0A
111
GPIO154/I2C1C_DATA/PS2_CLK1B
112
GPIO155/I2C1C_CLK/PS2_DAT1B
JTAG INTERFACE
102
GPIO145/I2C1K_DATA/JTAG_TDI
103
GPIO146/I2C1K_CLK/JTAG_TDO
105
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK
106
GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS
107
JTAG_RST#
FAN PWM & TACH
41
GPIO050/FAN_TACH1
42
GPIO051/FAN_TACH2
43
GPIO052/FAN_TACH3
45
GPIO053/PWM0
46
GPIO054/PWM1
47
GPIO055/PWM2
48
GPIO056/PWM3
BC-LINK
23
GPIO022/BCM_B_CLK/V_CLK
24
GPIO023/BCM_B_DAT/V_DATA
25
GPIO024/BCM_B_INT#/V_FRAME
35
GPIO042/BCM_C_INT#
36
GPIO043/BCM_C_DAT
37
GPIO044/BCM_C_CLK
38
GPIO045/LSBCM_D_INT#
39
GPIO046/LSBCM_D_DAT
40
GPIO047/LSBCM_D_CLK
85
GPIO121/BCM_A_INT#
86
GPIO122/BCM_A_DAT
87
GPIO123/BCM_A_CLK
HOST INTERFACE
11
GPIO011/nSMI
54
GPIO061/LPCPD#
55
LDRQ#
56
SER_IRQ
57
LRESET#
58
PCI_CLK
59
LFRAME#
60
LAD0
61
LAD1
62
LAD2
63
LAD3
64
CLKRUN#
66
GPIO100/nEC_SCI
MASTER CLOCK
122
XTAL1
124
XTAL2
117
GPIO160/32KHZ_OUT
BLM18AG121SN1D_0603~D
L39
+RTC_CELL_VBAT
1
C660
0.1U_0402_16V4Z~D
2
AGND
VSS[1]26VSS[2]51VSS[3]74VSS[4]88VSS[5]
125
15mil
+5035_AGND
12
+3.3V_ALW
121
VBAT
20
113
116
104
VTR[1]21VTR[2]44VTR[3]65VTR[4]83VTR[5]
GPIO012/I2C1H_DATA/I2C2D_DATA
GPIO141/I2C1F_DATA/I2C2B_DATA
VSS[7]
VSS[8]
VR_CAP[1]22VSS_RO
53
101
+VR_CAP
+5035_VSS
1
8mil
C671
2
4.7U_0603_6.3V4Z~D
3
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C661
1
1
2
2
52
VTR[6]
VTR[7]4VTR[8]
MISC INTERFACE
GPIO021/RC_ID
GPIO025/UART_CLK
VCC_PRWGD
GPIO060/KBRST
GPIO101/ECGP_SCLK
GPIO102/ECGP_SOUT
GPIO103/ECGP_SIN
GPIO104/UART_TX
GPIO105/UART_RX
GPIO106/nRESET_OUT
GPIO116/MSDATA
GPIO117/MSCLK
GPIO127/A20M
GPIO153/LED3
GPIO156/LED1
GPIO157/LED2
GENERAL PURPOSE I/O
SMBUS INTERFACE
GPIO013/I2C1H_CLK/I2C2D_CLK
GPIO142/I2C1F_CLK/I2C2B_CLK
DELL PWR SW INF
129
15mil
GPIO001
GPIO002
GPIO014/GPTP-IN7
GPIO015/GPTP-OUT7
GPIO016/GPTP-IN8
GPIO017/GPTP-OUT8
GPIO020
GPIO26/GPTP-IN1
GPIO27/GPTP-OUT1
GPIO30/GPTP-IN2
GPIO31/GPTP-OUT2
GPIO032/GPTP-IN3
GPIO040/GPTP-OUT3
GPIO041
GPIO107
GPIO120
GPIO124/GPTP-OUT5
GPIO125/GPTP-IN5
GPIO126
GPIO151/GPTP-IN4
GPIO152/GPTP-OUT4
GPIO003/I2C1A_DATA
GPIO004/I2C1A_CLK
GPIO005/I2C1B_DATA
GPIO006/I2C1B_CLK
GPIO130/I2C2A_DATA
GPIO131/I2C2A_CLK
GPIO132/I2C1G_DATA
GPIO140/I2C1G_CLK
GPIO143/I2C1E_DATA
GPIO144/I2C1E_CLK
BGPO0
VCI_IN2#
VCI_OUT
VCI_IN1#
VCI_IN0#
VCI_OVRD_IN
VCI_IN3#
thermal GND
MEC5035_XVTQFP128_14X14~D
1 2
L40
BLM18AG121SN1D_0603~D
C662
nFWP
1
2
10U_0805_10V4Z~D
0.1U_0402_16V4Z~D
1
C663
C664
2
RC_ID
19
DDR_ON
27
RUNPWROK
49
50
67
68
69
HOST_DEBUG_TX
70
HOST_DEBUG_RX
71
RESET_OUT#
72
MSDATA
81
MSCLK
82
SIO_A20GATE
92
PS_ID
110
BAT1_LED#
114
BAT2_LED#
115
FWP#
123
SIO_SLP_M#
2
DOCK_SMB_ALERT#
3
ME_WOL_EN
14
ME_SUS_PWR_ACK
15
1.8V_SUS_PWRGD
16
ICH_CL_PWROK
17
3.3V_LAN_PWRGD
18
1.05V_M_PWRGD
28
ALW_PWRGD_3V_5V
29
SUSPWROK
30
SIO_SLP_S5#
31
BEEP
32
AUX_ON
33
ODD_DET#
34
73
84
89
M_ON
90
ICH_RSMRST#
91
AC_PRESENT
108
SIO_PWRBTN#
109
DOCK_SMB_DAT
5
DOCK_SMB_CLK
6
LCD_SMBDAT
7
LCD_SMBCLK
8
CKG_SMBDAT
12
CKG_SMBCLK
13
93
94
ACAV_IN_NB
95
96
CARD_SMBDAT
97
CARD_SMBCLK
98
99
100
118
SNIFFER/INSTANT_SW#
119
ALWON
120
EN_CELL_CHARGER_DET#
126
POWER_SW_IN#
127
ACAV_IN
128
DOCK_PWR_SW#
1
2
+RTC_CELL
12
R539
100K_0402_5%~D
+3.3V_ALW
FWP#
+3.3V_ALW
RC_ID
C1011
@
1 2
INSTANT_ON_SW#
SNIFFER_PWR_SW#
POWER_SW_IN#
DOCK_PWR_SW#
R578
10K_0402_5%~D
1 2
R586
@
10K_0402_5%~D
1 2
R85
1K_0402_5%~D
4700P_0402_25V7K~D
1 2
1
C918
2
POWER_SW_IN#<18> POWER_SW#_MB <39,42>
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
C666
C665
2
2
DDR_ON <46>
RUNPWROK <37,41,47>
ICH_LAN_RST# <24>
RESET_OUT# <41>
MSDATA <34>
PS_ID <43>
BAT1_LED# <42>
BAT2_LED# <42>
SIO_SLP_M# <24>
DOCK_SMB_ALERT# <35,43>
ME_WOL_EN <24>
ME_SUS_PWR_ACK <24>
3.3V_LAN_PWRGD <41>
SUSPWROK <41>
AUX_ON <40>
ODD_DET# <24,26>
3.3V_M_PWRGD <18,41>
AUX_EN_WOWL <34>
SIO_SLP_S4# <24>
AC_PRESENT <24>
SIO_PWRBTN# <24>
ACAV_IN _NB <37,48>
ALWON <44>
EN_CELL_CHARGER_DET# <33>
ACAV_IN <18,48>
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
C668
C667
2
2
HOST_DEBUG_TX <34>
HOST_DEBUG_RX <34>
MSCLK <34>
SIO_A20GATE <23>
1.8V_SUS_PWRGD <46>
ICH_CL _PWROK <10,24>
1.05V_M_PW RGD <45>
ALW_PWRGD_3V_5V <44,46>
SIO_SLP_S5# <24>
BEEP <27>
M_ON <40,45>
ICH_RSMRST# <24>
DOCK_SMB_DAT <35>
DOCK_SMB_CLK <35>
LCD_SMBDAT <19>
LCD_SMBCLK <19>
CKG_SMBDAT <6,27,48>
CKG_SMBCLK <6,27,48>
AMT_SMBCLK <24>
Bat2 = Amber LED
Bat1 = Blue LED
20mA drive pins
AMT_SMBDAT <24>
CARD_SMBDAT <32,34>
CARD_SMBCLK <32,34>
+RTC_CELL
0.1U_0402_16V4Z~D
5
1
P
IN1
4
O
2
IN2
G
U57
@
3
74AHC1G08GW_SOT353-5~D
12
R445 0_0402_5%~D
1 2
R541 1K_0402_5%~D
1
C659
1U_0603_10V4Z~D
2
+RTC_CELL
12
R550
100K_0402_5%~D
1 2
R554 1K_0402_5%~D
1
2
C670
1U_0603_10V4Z~D
INSTANT_ON_SW#
SNIFFER_PWR_SW#
EN_CELL_CHARGER_DET#
SNIFFER/INSTANT_SW#
INSTANT_ON_SW#
DOCK_SMB_DAT
DOCK_SMB_CLK
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
AC_PRESENT
+3.3V_ALW
10K_0402_5%~D
12
JTAG_RST#
1=JTAG interface Reset disabled
0=Reset JTAG interface
INSTANT_ON_SW# <37,42>
SNIFFER _PWR _SW# <42>
12
1
1 2
C658
@
1U_0402_6.3V6K~D
1 2
C669
@
1U_0402_6.3V6K~D
DOCK_PWR_BTN# <35>DOCK_PWR_SW#<18>
R560 100K_0402_5%~D@
1 2
R562 100K_0402_5%~D
1 2
R504 200K_0402_5%~D
2 1
D68 RB751S40T1_SOD523-2~D
R900 100K_0402_5%~D@
R589 100K_0402_5%~D
R565 2.2K_0402_5%~D
R567 2.2K_0402_5%~D
R569 4.7K_0402_5%~D
R570 4.7K_0402_5%~D
R571 4.7K_0402_5%~D
R572 4.7K_0402_5%~D
1 2
R573 10K_0402_5%~D
R579
0.1U_0402_16V4Z~D
C1040
100_0402_1%~D
1
@
R585
2
+RTC_CELL
12
12
+3.3V_ALW
12
12
12
+5V_RUN
12
12
12
12
1
1
JTAG1
@SHORT PADS~D
@
2
2
DELL CONFIDENTIAL/PROPRIETA RY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
EMC5035
LA-3801P
1
38 66Thursday, June 12, 2008
0.8
of
Page 39
5
4
3
2
+5V_ALW
1
+5V_RUN
4.7K_0402_5%~D
12
12
R1093
D D
C C
JTP1
1
1
BC_DAT_ECE1077<38>
BC_CLK_ECE1077<38>
BC_INT#_ECE1077<38>
+3.3V_ALW
+3.3V_ALW
0.1U_0402_16V4Z~D
1
C771
B B
A A
2
Place close to
JTP1.5,6
TP_CLK
TP_DATA
SD05.TCT_SOD323-2~D
@
2 1
+5V_RUN
+5V_ALW
+3.3V_RUN
KYBRD_BKLT_PWM<38>
TP_DET#<37>
SD05.TCT_SOD323-2~D
@
D53
D54
2 1
TP_CLK
TP_DATA
KYBRD_BKLT_PWM
TP_DET#
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
G1
18
G2
TYCO_1-1775737-6
Place close to JTP1 connector
5
4
+5V_RUN +3.3V_ALW
0.1U_0402_16V4Z~D
1
C678
2
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
0.1U_0402_16V4Z~D
1
C679
2
TP_DATA
TP_CLK
3
10P_0402_50V8J~D
1
2
POWER_SW#_MB<38,42>
L41
1 2
BLM18AG601SN1D_0603~D
1 2
L42
10P_0402_50V8J~D
BLM18AG601SN1D_0603~D
1
C680
C681
2
Power Switch for debug
POWER_SW#_MB
C684
@
100P_0402_50V8J~D
1
2
1
1
PWRSW1
@SHORT PADS~D
Place on Top
@
1
1
PWRSW2
@SHORT PADS~D
Place on Bottom
@
2
4.7K_0402_5%~D
4.7K_0402_5%~D
12
R1094
10P_0402_50V8J~D
1
2
2
2
2
2
4.7K_0402_5%~D
12
10P_0402_50V8J~D
1
2
@
R595
DAT_TP_SIO
CLK_TP_SIO
C683
FAN@
Part Number Description
DC28A000800
Speak@
Part Number Description
PK230003Q0L
SM CARD BODY
Part Number Description
SP070007V0L
PCMCIA BODY
Part Number Description
DC000001Q0L
MDC wire set cable@
Part Number Description
DC02000CS0L
T/P wire set cable@
Part Number Description
DC02000840L
LVDS cable@
Part Number Description
DC020003Y0L
LVDS cable@
Part Number Description
DC02000870L
RTC BATT@
Part Number Description
GC20323MX00
DAT_TP_SIO <38>
CLK_TP_SIO <38>
FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA
SPK PACK ZJX 2.0W 4 OHM FG
S SOCKET TYCO 1770551-1
10P H5.9 SMART
PCMCIA TYCO
1759096-1
H-CONN SET ZGX
MB-MDC
H-CONN SET ZJX
MB-B/T-TP-FP
H-CONN SET ZJX MB-LCD
14 WXGA+(-1ch)
H-CONN SET ZJX
MB-LCD 14 WXGA+(-2ch)
BATT CR2032 3V
220MAH MAXELL
@
R594
C682
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Touch PAD/Int KB/LID
LA-3801P
39 66Thursday, June 12, 2008
1
of
0.8
Page 40
5
4
3
2
1
DC/DC Interface
+15V_ALW
+3.3V_ALW2
12
R602
61
2
+3.3V_ALW2
12
R604
100K_0402_5%~D
SUS_ON_3.3V#
61
Q62A
2N7002DW-T/R7_SOT363-6~D
2
+3.3V_ALW2
12
R611
100K_0402_5%~D
M_ON_3.3V#
61
Q68A
2N7002DW-T/R7_SOT363-6~D
2
+3.3V_ALW2
AUX_ON
2
100K_0402_5%~D
ALW_ON_3.3V#
Q57A
2N7002DW-T/R7_SOT363-6~D
+15V_ALW
12
3
5
4
12
R620
100K_0402_5%~D
N21917830
12
2N7002DW-T/R7_SOT363-6~D
61
Q74A
D D
ICH_ALW<38>
C C
SUS_ON<38,41>
M_ON<38,45>
B B
AUX_ON<38>
12
R598
100K_0402_5%~D
ALW_ENABLE
3
Q57B
2N7002DW-T/R7_SOT363-6~D
5
4
+15V_ALW
12
R603
100K_0402_5%~D
SUS_ENABLE
3
Q62B
2N7002DW-T/R7_SOT363-6~D
5
4
100K_0402_5%~D
R610
M_ENABLE
Q68B
2N7002DW-T/R7_SOT363-6~D
+15V_ALW
5
200K_0402_5%~D
@
R629
+3.3V_ALW
12
R619
100K_0402_5%~D
2N7002DW-T/R7_SOT363-6~D
3
Q74B
4
+3.3V_ALW_ICH Source
+3.3V_ALW +3.3V_ALW_ICH
Q54
SI3456BDV-T1-E3_TSOP6~D
D
6
S
45
2
+3.3V_ALW
8
7
5
+3.3VM Source
Q66
SI3456BDV-T1-E3_TSOP6~D
6
2
1
12
1
C698
470K_0402_5%~D
2
4700P_0402_25V7K~D
1
G
3
1
2
+3.3V_SUS Source
Q60
STS11NF30L_SO8~D
4
1
C692
4700P_0402_25V7K~D
2
D
S
45
G
3
1
C696
4700P_0402_25V7K~D
2
ENAB_3VLAN <29>
@
R621
1
C687
2
10U_0805_10V4Z~D
C688
3300P_0402_50V7K~D
1
2
36
10U_0805_10V4Z~D
1
C690
2
+3.3V_M
10U_0805_10V4Z~D
12
1
C694
2
12
+3.3V_SUS
12
20K_0402_5%~D
R612
R601
20K_0402_5%~D
20K_0402_5%~D
R605
Discharg Circuit
+3.3V_M+1.05V_M
75_0603_5%~D
12
@
R615
2N7002W-7-F_SOT323-3~D
13
M_ON_3.3V#
SUS_ON_3.3V# ALW_ON_3.3V#
2
G
+3.3V_SUS
2
G
D
S
1K_0402_5%~D
12
@
R627
2N7002W-7-F_SOT323-3~D
13
D
S
12
13
@
2
Q71
G
@
Q81
1K_0402_5%~D
@
R616
2N7002W-7-F_SOT323-3~D
D
@
Q72
S
+3.3V_ALW_ICH
2
G
+5VRUN Source
+15V_ALW+3.3V_ALW2 +5V_ALW
12
12
R599
100K_0402_5%~D
RUN_ON_5V#
61
Q56A
2N7002DW-T/R7_SOT363-6~D
RUN_ON<19,28,37,41>
3.3V_RUN_ON<37>
1.05V_RUN_ON<37>
2
12
R608
100K_0402_5%~D
RUN_ON_3V#
61
Q64A
2N7002DW-T/R7_SOT363-6~D
2
12
R617
100K_0402_5%~D
RUN_ON_1.05V#
61
Q70A
2N7002DW-T/R7_SOT363-6~D
2
R597
100K_0402_5%~D
RUN_ENABLE
3
Q56B
2N7002DW-T/R7_SOT363-6~D
5
4
12
R606
100K_0402_5%~D
3
5
Q64B
2N7002DW-T/R7_SOT363-6~D
4
12
R613
100K_0402_5%~D
3
5
Q70B
2N7002DW-T/R7_SOT363-6~D
4
Q55
STS11NF30L_SO8~D
8
7
5
+3.3V_RUN Source
Q61
NTMS4107NR2G_SO8~D
+3.3V_ALW+3.3V_ALW2 +15V_ALW
8
7
5
21
@
D30
RB751V_SOD323-2~D
1 2
R609
0_0402_5%~D
+1.05V_VCCP Source
Q67
1 2
NTMS4107NR2G_SO8~D
8
7
5
21
+1.05V_M+3.3V_ALW2 +15V_ALW
@
D31
RB751V_SOD323-2~D
R618
0_0402_5%~D
1
2
36
4
2200P_0402_50V7K~D
1
C689
2
4
1
C693
470P_0402_50V7K~D
2
4
1
C697
470P_0402_50V7K~D
2
+5V_RUN
10U_0805_10V4Z~D
12
1
R600
C686
20K_0402_5%~D
2
+3.3V_RUN
1
2
36
1
2
36
C691
10U_0805_10V4Z~D
C695
10U_0805_10V4Z~D
1
2
+1.05V_VCCP
1
2
12
R607
20K_0402_5%~D
12
R614
20K_0402_5%~D
Discharg Circuit
+1.5V_RUN +0.9V_DDR_VTT +3.3V_RUN+5V_RUN
1K_0402_5%~D
12
@
R628
2N7002W-7-F_SOT323-3~D
@
13
D
S
Q82
RUN_ON_5V#
1K_0402_5%~D
12
@
R622
2N7002W-7-F_SOT323-3~D
13
D
@
2
Q76
G
S
1K_0402_5%~D
12
@
R623
2N7002W-7-F_SOT323-3~D
13
D
@
2
Q77
G
S
1K_0402_5%~D
12
@
R624
2N7002W-7-F_SOT323-3~D
13
D
@
2
G
RUN_ON_3V# RUN_ON_1.05V#
Q78
S
39_0402_5%~D
12
R625
2N7002W-7-F_SOT323-3~D
13
D
2
Q79
G
S
+1.05V_VCCP
12
13
2
G
1K_0402_5%~D
@
R626
2N7002W-7-F_SOT323-3~D
D
@
Q80
S
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
POWER CONTROL
LA-3801P
40 66T h u r s da y, June 12, 2008
1
0.8
of
Page 41
5
4
3
2
1
+3.3V_SUS
2.5V_RUN_PWRGD<18,37>
1.5V_RUN_PWRGD<45>
+5V_RUN
D D
C C
1
2
+3.3V_RUN
1
2
+3.3V_SUS
2 1
D32
RB751V_SOD323-2~D
C702
0.1U_0402_16V4Z~D
2 1
D33
RB751V_SOD323-2~D
C704
0.1U_0402_16V4Z~D
D34
RB751V_SOD323-2~D
2 1
1
C707
0.1U_0402_16V4Z~D
2
12
12
200K_0402_5%~D
12
R642
200K_0402_5%~D
R634
200K_0402_5%~D
R638
10K_0402_5%~D
2200P_0402_50V7K~D
1
2
R633
10K_0402_5%~D
1 2
1
C703
2200P_0402_50V7K~D
2
1 2
R637
10K_0402_5%~D
1
C705
2200P_0402_50V7K~D
2
R641
1 2
C708
+5V_ALW
B
2
+3.3V_ALW
B
2
+3.3V_ALW
E
3
B
Q88
2
MMBT3906WT1G_SC70-3~D
C
1
200K_0402_5%~D
12
R643
E
3
Q83
MMBT3906WT1G_SC70-3~D
C
1
R635
4.7K_0402_5%~D
1 2
E
3
Q85
MMBT3906WT1G_SC70-3~D
C
1
R639
4.7K_0402_5%~D
1 2
D35
RB751V_SOD323-2~D
2 1
C
Q84
2
B
MMST3904-7-F_SOT323-3~D
E
3 1
C
Q86
2
B
MMST3904-7-F_SOT323-3~D
E
3 1
+3.3V_ALW
8
P
A3Y
G
U39C
74LVC3G14DC_VSSOP8~D
4
5
R630 0_0402_5%~D@
R631 0_0402_5%~D
12
12
12
1
2
+3.3V_ALW
C699
100K_0402_5%~D
R632
0.1U_0402_16V4Z~D
C701
0.1U_0402_16V4Z~D
1 2
8
P
7
A1Y
G
U39A
74LVC3G14DC_VSSOP8~D
4
IMVP_PWRGD<24,37,47,49>
RESET_OUT#<38>
RUN_ON<19,28,37,40>
SUS_ON<38,40>
IMVP_PWRGD
RESET_OUT#
+3.3V_ALW
8
P
2
A6Y
G
U39B
74LVC3G14DC_VSSOP8~D
4
3.3V_5V_SUS_PWRGD
+3.3V_ALW
13
IN1
12
IN2
1 2
R636
0_0402_5%~D
14
P
11
OUT
G
U40D
74VHC08MTCX_NL_TSSOP14~D
7
+3.3V_ALW
14
1
IN1
2
IN2
7
+3.3V_ALW
14
10
IN1
9
IN2
7
ICH_PWRGD
C700
0.1U_0402_16V4Z~D
1 2
U40A
74VHC08MTCX_NL_TSSOP14~D
P
3
OUT
G
P
8
OUT
G
U40C
74VHC08MTCX_NL_TSSOP14~D
R640
100K_0402_5%~D
2
G
+3.3V_ALW
14
4
P
IN1
OUT
5
IN2
G
7
+3.3V_M
12
ICH_PWRGD#
13
D
Q87
2N7002W-7-F_SOT323-3~D
S
U40B
74VHC08MTCX_NL_TSSOP14~D
RUNPWROK
6
ICH_PWRGD# <18>
RUNPWROK <37,38,47>
SUSPWROK <38>
ICH_PWRGD <10,24>
B B
A A
+3.3V_M
1
C709
0.1U_0402_16V4Z~D
2
+3.3V_LAN
1
C714
0.1U_0402_16V4Z~D
2
D36
RB751V_SOD323-2~D
2 1
D40
RB751V_SOD323-2~D
2 1
R644
10K_0402_5%~D
1 2
200K_0402_5%~D
2200P_0402_50V7K~D
12
1
R645
C710
2
R651
10K_0402_5%~D
1 2
2200P_0402_50V7K~D
200K_0402_5%~D
12
1
C715
R652
2
E
3
B
Q89
2
MMBT3906WT1G_SC70-3~D
C
1
200K_0402_5%~D
12
R646
E
3
B
Q91
2
MMBT3906WT1G_SC70-3~D
C
1
200K_0402_5%~D
12
R653
2 1
D37
RB751V_SOD323-2~D
2 1
D41
RB751V_SOD323-2~D
+3.3V_ALW+3.3V_ALW
8
P
7
A1Y
G
U41A
74LVC3G14DC_VSSOP8~D
4
+3.3V_ALW+3.3V_ALW
C713
0.1U_0402_16V4Z~D
1 2
8
P
2
A6Y
G
U41B
74LVC3G14DC_VSSOP8~D
4
3.3V_M_PWRGD <18,38>
3.3V_LAN_PWRGD <38>
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Power Good
LA-3801P
41 66T h u r s da y, June 12, 2008
1
0.8
of
Page 42
5
+3.3V_RUN
12
R654
10K_0402_5%~D
D
S
SATA_ACT#
SATA_ACT#_R<23>
D D
2N7002W-7-F_SOT323-3~D
MASK_BASE_LEDS#
13
Q93
G
2
+5V_RUN
2
1 3
1 2
R659 1K_0402_5%~D
Q92
DDTA114EUA-7-F_SOT323-3~D
SATA_LED
HDD LED solution for Blue LED
LED_WLAN_OUT#<34>
+3.3V_WLAN
12
R662
100K_0402_5%~D
2N7002W-7-F_SOT323-3~D
Q98
MASK_BASE_LEDS#
D
S
13
G
2
D67
SDM10U45-7_SOD523-2~D
21
2
+5V_RUN
Q97
PDTA114EU_SC70-3~D
1 3
1 2
R663 1K_0402_5%~D
WLAN_LED
WLAN LED solution for Blue LED
C C
+3.3V_RUN
12
R206
100K_0402_5%~D
LED_WWAN_OUT#<34>
2N7002W-7-F_SOT323-3~D
MASK_BASE_LEDS#
Q116
S
G
+5V_RUN
D
13
2
2
Q115
PDTA114EU_SC70-3~D
1 3
R125 1K_0402_5%~D
1 2
WWAN_LED
WWAN LED solution for Blue LED
+3.3V_RUN
R660
10K_0402_5%~D
1 2
B B
LED_WPAN_OUT#<34>
2N7002W-7-F_SOT323-3~D
MASK_BASE_LEDS#
S
Q95
G
2
D
13
2
+5V_RUN
Q94
DDTA114EUA-7-F_SOT323-3~D
1 3
WPAN_LED
1 2
R661 1K_0402_5%~D
WPAN LED solution for Blue LED
LED Circuit Control Table
+3.3V_ALW
SNIFFER_YELLOW#<37>
A A
SNIFFER_BLUE#<37>
2
+5V_ALW
2
5
Mask All LEDs (Sn iffer Function)
Mask Base MB LEDs (Lid Closed)
Do not Mask LEDs (Lid Opened) 11
Q100
DDTA114EUA-7-F_SOT323-3~D
1 3
Q102
DDTA114EUA-7-F_SOT323-3~D
SNIFFER_YELLOW
1 2
1 3
R667 220_0402_5%~D
R668 1K_0402_5%~D
1 2
SNIFFER_BLUE
4
LID_CL#<37>
12
D42
LTST-C191TBKT-5A BLU_0603~D
12
D45
LTST-C191TBKT-5A BLU_0603~D
BAT2_LED#<38>
12
D61
LTST-C191TBKT-5A BLU_0603~D
BAT1_LED#
BAT1_LED#<38>
D43
LTST-C191TBKT-5A BLU_0603~D
12
SYS_LED_MASK# LID_CL#
0
10
4
SYS_LED_MASK#
LID_CL#
SYS_LED_MASK#<37>
X
+3.3V_ALW
5
U65
1
P
IN1
O
2
IN2
G
74AHC1G08GW_SOT353-5~D
3
0.1U_0402_16V4Z~D
2
C685
1
+3.3V_ALW
5
1
A2Y
+3.3V_ALW
1 2
5
1
P
NC
A2Y
G
NC7SZ04P5X_NL_SC70-5~D
3
BREATH_LED#<35,38>
C1061
0.1U_0402_16V4Z~D
MASK_BASE_LEDS#
P
G
NC7SZ04P5X_NL_SC70-5~D
3
2N7002DW-7-F_SOT363-6~D
C1059
0.1U_0402_16V4Z~D
4
U64
BAT2_LED# BAT2_LED
1 2
4
+3.3V_ALW
POWER_SW#_MB<38,39>
INSTANT_ON_SW#<37,38>
WIRELESS_ON#/OFF<37>
SNIFFER_PWR_SW#<38>
PWR_BTN_BD_DET#<37>
CAP_LED#<37>
NUM_LED#<37>
SCRL_LED#<37>
2N7002DW-7-F_SOT363-6~D
C1058
1 2
0.1U_0402_16V4Z~D
NC
4
U63
2N7002DW-7-F_SOT363-6~D
+3.3V_ALW
BAT1_LED
2N7002DW-7-F_SOT363-6~D
+3.3V_ALW
C1060
1 2
0.1U_0402_16V4Z~D
5
1
P
NC
4
A2Y
G
U42
NC7SZ04P5X_NL_SC70-5~D
3
3
2
Q144A
Q144B
Q145A
2
5
Q145B
BREATH_LED#_R
3
+5V_ALW
100K_0402_5%~D
61
3
4
2
JSNIF1
14
GND
13
GND
12
12
11
LID_CL#
BREATH_B LUE_LE D_S NI FF
WIRELESS_ON#/OFF
SNIFFER_PWR_SW#
SNIFFER_YELLOW
SNIFFER_BLUE
PWR_BTN_BD_DET#
2
Q122
DDTA114EUA-7-F_SOT323-3~D
1 3
R1006
100K_0402_5%~D
1 2
61
2
3
5
4
SYS_LED_MASK#<37>
R1007
1 2
2
+3.3V_ALW
12
R1005
100K_0402_5%~D
2N7002W-7-F_SOT323-3~D
SYS_LED_MASK#<37>
61
2
61
2
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
TYCO_1-1734820-2
+5V_ALW
2
Q121
DDTA114EUA-7-F_SOT323-3~D
1 3
2
+5V_ALW
12
R1004
100K_0402_5%~D
2N7002W-7-F_SOT323-3~D
+3.3V_ALW
Q101
1 3
Q143
D
S
13
G
2
+3.3V_ALW
12
R999
100K_0402_5%~D
+3.3V_ALW
Q134A
12
R1000
2N7002DW-7-F_SOT363-6~D
100K_0402_5%~D
Q135A
2N7002DW-7-F_SOT363-6~D
Q120
DDTA114EUA-7-F_SOT323-3~D
1 3
+5V_ALW
1 3
Q142
S
G
2
DDTA114EUA-7-F_SOT323-3~D
2
2N7002DW-7-F_SOT363-6~D
SYS_LED_MASK#<37>
2N7002DW-7-F_SOT363-6~D
MASK_BASE_LEDS#
H1
@H_3P0
1
@
H7
@H_3P0
1
@
H13
@H_2P5
1
@
1 2
R556 1K_0402_5%~D
1 2
R596 1K_0402_5%~D
1 2
R655 1K_0402_5%~D
Q99
DDTA114EUA-7-F_SOT323-3~D
1 2
R665 1K_0402_5%~D
+5V_ALW
D
2
13
1 3
R666
150_0402_5%~D
1 2
+3.3V_ALW
Q140
1 3
DDTA114EUA-7-F_SOT323-3~D
Q134B
3
4
5
Q135B
3
4
5
H3
H2
@H_3P0
@H_3P0
1
@
@
H9
@H_3P0
@
H15
H14
@H_5P2
@H_3P1X2P1
1
@
@
Keyboard Status LED
R_CAP_LED#
R_NUM_LED#
R_SCRL_LED#
BATT_BLUE
BATT_YELLOW
LTST-C155TBJSKT_Blue/YEL~D
Q139
DDTA114EUA-7-F_SOT323-3~D
R1002
1K_0402_5%~D
1 2
150_0402_5%~D
+5V_ALW
2
1 3
+5V_ALW
2
1 3
2
H4
H5
@H_3P0
@H_3P0
1
1
1
@
@
H10
H11
@H_3P8
@H_2P5
1
1
1
D57
LTST-C191TBKT-5A BLU_0603~D
D58
LTST-C191TBKT-5A BLU_0603~D
D59
LTST-C191TBKT-5A BLU_0603~D
Battery LED
MASK_BASE_LEDS#
R1003
1 2
DDTA114EUA-7-F_SOT323-3~D
Q137
DDTA114EUA-7-F_SOT323-3~D
Q138
R1001 100_0402_5%~D
1
@
@
H16
@H_2P6
1
@
12
12
12
MASK_BASE_LEDS#
2N7002W-7-F_SOT323-3~D
Q150
D46
BLUE
2 1
34
YEL
2
G
BATT_BLUE_LED <19>
BATT_Y ELLOW_LED <19>
1 2
R664 1K_0402_5%~D
1 2
H6
@H_3P0
1
@
H12
@H_4P2
1
@
H18
H19
@H_2P5N
@H_3P0N
1
1
@
@
+5V_ALW +3.3V_RUN
+5V_ALW +5V_RUN
12
13
D
2
G
13
D
S
BREATH_B LUE_LE D_S NI FF
+5V_ALW +1.8V_MEM
R1039
S
@
0_0402_5%~D
+5V_ALW +1.05V_M
+3.3V_ALW +PWR_SRC
+3.3V_ALW +3.3V _RUN
Q141
+5V_RUN +3.3V_RUN
2N7002W-7-F_SOT323-3~D
+3.3V_LAN +PWR_SRC
+3.3V_LAN +5V_ALW
+5V_RUN +1.8V_MEM
+5V_RUN +3.3V_LAN
+3.3V_RUN +1.8V_MEM
+3.3V_RUN +5V_SPK_AMP
+3.3V_LAN +5V_SPK_AMP
BREATH_BLUE_LED
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Doc um e n t N u mb er Re v
Date: Sheet
1
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
Fiducial Mark
FIDUCIAL MARK~D
FIDUCIAL MARK~D
FIDUCIAL MARK~D
FIDUCIAL MARK~D
FIDUCIAL MARK~D
EMI CLIP
CLIP1
EMI_CLIP
1
GND
CLIP2
EMI_CLIP
1
GND
@
1
FIDUCIAL MARK~D
C754 0.1U_0402_16V4Z~D
C755 0.1U_0402_16V4Z~D
C756 0.1U_0402_16V4Z~D
C757 0.1U_0402_16V4Z~D
C758 0.1U_0402_16V4Z~D
C761 0.1U_0402_16V4Z~D
C762 0.1U_0402_16V4Z~D
C764 0.1U_0402_16V4Z~D
C765 0.1U_0402_16V4Z~D
C766 0.1U_0402_16V4Z~D
C772 0.1U_0402_25V4K~D
C774 0.1U_0402_25V4K~D
C775 0.1U_0402_25V4K~D
C778 0.1U_0402_16V4Z~D
C779 0.1U_0402_16V4Z~D
C780 0.1U_0402_16V4Z~D
C782 0.1U_0402_16V4Z~D
C784 0.1U_0402_16V4Z~D
C785 0.1U_0402_16V4Z~D
C787 0.1U_0402_16V4Z~D
C794 0.1U_0402_25V4K~D
C795 0.1U_0402_16V4Z~D
C796 0.1U_0402_16V4Z~D
C789 0.1U_0402_16V4Z~D
C790 0.1U_0402_16V4Z~D
C791 0.1U_0402_16V4Z~D
C792 0.1U_0402_16V4Z~D
C793 0.1U_0402_16V4Z~D
C798 0.1U_0402_16V4Z~D
FD6
Stitching cap for EMI
BREATH_BLUE_LED <19>
Compal Electronics, Inc.
PAD and Standoff
LA-3801P
1
FD1
@
1
FD2
@
1
FD3
@
1
FD4
@
1
FD5
@
1
42 66T hur s da y, June 12, 2008
0.8
of
Page 43
5
4
3
2
1
+COINCELL
12
+3.3V_RTC_LDO
D D
+3.3V_ALW
ESD Diodes
2
2
3
DCIN _CBL_DET# <37>
IMD2AT- 108_SC74-6~D
12
12
PR20
0_0402_5%~D
@
5
PD5
DA204U_SOT323~D@
PR7
100_0402_5%~D
1 2
+DC_IN
PQ4B
2
16
PQ4A
IMD2AT- 108_SC74-6~D
BLM18BD102SN1D_0603~D
43
Primary Battery Connector
SUYIN_2 00275MR009G 50PZ R
11
GND
10
GND
9
9
8
8
7
7
6
6
PC65
PBATT1
0.1U_0603_25V7K~D
12
5
5
4
4
3
3
2
2
1
1
1 2
0_0402_5%~D
PC66
0.1U_0603_25V7K~D
12
PC4
2200P_0402_50V7K~D
C C
B B
PJPDC1
1
1
2
2
-DCIN_JACK
3
3
4
4
+DCIN_JACK
5
5
6
6
7
7
A A
MOLEX_87437-0763
5
Z4304
Z4305
Z4306
NB_PSID
+3.3V_ALW
2
3
PD13
@
DA204U_SOT323~D
PR67
12
FBMJ4516HS720NT_1806~D
1
12
PC254
@
0.47U_0402_6.3V6K
PL4
FBMJ4516HS720NT_1806~D
1 2
1
PD12
@
2
VZ0603M260APT_0603
PC10
@
PL5
0.1U_0603_25V7K~D
1 2
NB_AC_OFF_BJT<50> NB_AC_OF F <37,48,50>
PD6
1
DA204U_SOT323~D@
PR8
100_0402_5%~D
1 2
PL3
+DC_IN
PC5
1 2
0.022U_0603_50V7K
3
12
12
PR16
4
3
2
PD7
PR9
1 2
100_0402_5%~D
PQ2
FDS6679AZ_SO8~D
4
12
PR21
1M_0402_5%~D
1
1 2
1
100_0402_5%~D
1
2
3 6
1M_0402_5%~D
DA204U_SOT323~D@
PR10
2
3
PD8
1
DA204U_SOT323~D@
@
PBAT_ALARM#
2
3
@
1
PD10
SM24_SOT23
DC_IN+ Source
8
7
5
12
PC6
0.1U_0603_25V7K~D
12
PR22
22K_0402_5%~D
13
D
PQ5
S
RHU002N06_SOT323
2
G
100K_0402_5%~D
1 2
12
0.1U_0603_25V7K~D
PBAT_SMBCLK <38>
PBAT_SMBDAT <38>
PR14
1 2
100K_0402_1%~D
PR18
1 2
15K_0402_1%~D
PC7
0.1U_0603_25V7K~D
PR283
PC11
PBATT+
@
PR17
1 2
10K_0402_5%~D@
PD11
+3.3V_ALW+5V_ALW
PR11
2.2K_0402_5%~D
+5V_ALW
DA204U_SOT323~D
+3.3V_ALW
PR6
1 2
3
12
10K_0402_1%~D
1 2
PD32
RB751V-40_SOD323~D
NB_PSID _TS5A63157
2
1
PQ61
FDN338P_NL_SOT23-3~D
1
3
1 3
2
2
12
PC266
1500P_0402_50V7K~D
DOCK_PSID<35> GPIO_P SID_SELECT <37>
PSID_DISABLE# <37>
2
PL2
FBMA-L18-453215-900LMA90T_1812~D
1 2
PJP12
1 2
PAD-OPEN 4x4m
12
PC3
0.1U_0603_25V7K~D
SLICE_BAT_PRES#<35,37,50>
2
PR13
1 2
3
PD9
DA204U_SOT323~D
1
+5V_ALW
12
PR15
10K_0402_1%~D
PR12
@
1 2
0_0402_5%~D
33_0402_5%~D
D
S
1 3
PQ1
FDV301N_SOT23~D
G
2
C
PQ3
2
B
MMST3904-7-F_SOT323~D
E
3 1
+DC_IN_SS
12
12
12
PC8
0.1U_0603_25V7K~D
12
PC9
PR19
4.7K_0805_5%~D
10U_1206_25V6M~D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONT AINS CONFIDE NTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVIS ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITT EN CO NSE NT OF COMPAL ELECTRONICS, INC.
3
Z4012
3
2
PD24
1
BAT54CW_SOT323~D
PBAT_PRES# <37>
DOCK_SMB_ALERT# <35,38>
PU1
1
NO
2
GND
NC3COM
TS5A63157DCKR_SC70-6~D
COIN RTC Battery
PR215
1K_0402_5%~D
+RTC_CELL
12
PC201
1U_0603_10V6K~D
6
IN
5
V+
4
RTC_BAT_DET_R#<23>
+5V_ALW
PS_I D <38>
+COINCELL
JRTC1
1
2
3
MOLEX_53398-0371~D
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Doc um e n t N u mb er Re v
Date: Sheet of
Compal Electronics, Inc.
+DCIN
LA-3801P
1
1
4
2
G1
5
3
G2
43 66Thursday, June 12, 2008
0.8
Page 44
5
4
3
2
1
+3.3V_ALWP/ +5V_ALWP/ +5V_ALW2 / +15V_ALWP
THERM_STP#<18>
12
12
ALWON<38>
+DC1_PWR_SRC
8
PQ6
S
1
123
12
PC16
2200P_0402_50V7K~D
D6D5D7D
4
G
S
S
3
2
786
5
FDS6676AS_NL_SO8~D
4
2K_0402_5%~D
0_0402_5%~D
PQ8
PR42
PR45
12
PC17
0.1U_0805_50V7K
12
12
12
12
12
PC18
PC19
PC63
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
12
PC26
@
0.1U_0402_10V7K~D
GNDA_3V5V
+5V_ALW_UGATE
+5V_ALW_PHASE
+5V_ALWP
12
PC35
0.1U_0603_25V7K~D
PR44
1 2
200K_0402_5%
+15V_ALW
(100mA,20mils ,Via NO.=1)
4
PJP17
PAD-OPEN1x1m
@
PR23
PR24
0_0805_5%
0_0805_5%
1 2
1 2
+3.3V_ALW2
12
PC21
0.1U_0603_25V7K~D
GNDA_3V5V
BAT54SW-7-F_S OT323-3~D
BAT54SW-7-F_S OT323-3~D
12
PR32
187K_0402_1%~D
1 2
12
PC27
1_0603_5%~D
0.1U_0603_25V7K~D
1 2
+5V_ALW_LGATE
2
3
PD14
2
3
PD15
+15V_ALWP
+5V_ALWP
POK1
PR36
PC33
0.1U_0603_25V7K~D
1
1 2
PC36
0.1U_0603_25V7K~D
1
1 2
PC37
0.1U_0603_25V7K~D
+5V_ALW2
PC22
0.1U_0603_25V7K~D
GNDA_3V5V
9
10
11
12
13
14
15
16
GNDA_3V5V
+5V_ALW_BOOT
200K_0402_1%~D
12
12
BYP
OUT1
FB1
ILIM1
ISL6236IRZA_Q FN 32~D
POK1
EN1
UGATE1
PHASE1
PAD
33
1
3
PR46
12
PJP15
1 2
PAD-OPEN1x1m
@
EN_3V_5V
5
1
7
4
8
3
6
VIN
LDO
TON2VCC
VREF3
EN_LDO
LDOREFIN
PU2
BOOT117LGATE118PVCC19SECFB20GND21PGND22LGATE223BOOT2
24
+3.3V_ALW_BOOT
GNDA_3V5V
12
PC34
+5V_ALW2
1U_0603_10V6K~D
PD16
BAT54CW_SOT323~D
2
PR47
1 2
39.2K_0402_1%~D
GNDA_3V5V
+5V_VCC1
PR25
@
10_0603_5%~D
32
31
30
29
28
EN_3V_5VEN_3V_5V
27
+3.3V_ALW_UGATE
26
+3.3V_ALW_PHASE
25
PR37
2.2_0603_1%~D
1 2
PJP16
1 2
PAD-OPEN1x1m
@
12
12
PC23
1U_0603_10V6K~D
GNDA_3V5V
PR31
237K_0402_1%~D
1 2
PR33 0_0402_5%~D
12
POK2
12
PC28
+3.3V_ALW_LGATE
12
0_0402_5%~D
PR28
@
0.1U_0603_25V7K~D
PR30
12
0_0603_5%~D
GNDA_3V5V
GNDA_3V5V
POK2
POK1
12
PC25
@
0.1U_0402_10V7K~D
PQ9
FDS6676AS_NL_SO8~D
+3.3V_ALW
+3.3V_ALW
PR40
PR41
@
1 2
1 2
100K_0402_1%~D
100K_0402_1%~D
12
PR43
0_0402_5%~D
2
8
D6D5D7D
4
G
S
S
3
2
1
786
5
4
123
12
PC20
4.7U_0805_6.3V6K
PR26
0_0402_5%~D@
1 2
PR27
0_0402_5%~D
1 2
PC24
0.1U_0603_25V7K~D
1 2
1 2
PR29
@
0_0603_5%~D
REF
REFIN2
ILIM2
OUT2
SKIP#
POK2
EN2
UGATE2
PHASE2
GNDA_3V5V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVIS ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONT AINS
3
12
12
PC13
PC12
2200P_0402_50V7K~D
PQ7
FDS8880_NL_SO8~D
S
ALW_PWRGD_3V_5V <38,46>
PC14
0.1U_0805_50V7K
1 2
12
PC251
1000P_0603_50V7K
12
PR276
2.2_1206_1%
VOUT2=3.3V
L=3.0uF
Fsw=500KHz
D=0.176
Output Ripple Current=1.84A
Output Ripple Voltage=1.84A*25mOhm=46.05mV
Input Ripple Current=TDC*(D*(1-D))^0.5=3.28A
Component select
Input CAP 10uF_1206_25V *2
Output Cap 330uF_D3L_6.3VM_R25(Sanyo_6TPE330ML)
H_MOSFET FDS8880
L_MOSFET FDS6676AS(5.9/7.25mOhm@4.5V, 14.5A)
Inductor 3.0U_HMP1362-3R0-R_17A(DELTA)
12
10U_1206_25V6M~D
PL7
NC
3.0UH_HMP1362-3R0-R_17A_20%~D
12
12
PC64
PC15
10U_1206_25V6M~D
10U_1206_25V6M~D
3.3 Volt +/-5%
Thermal Design Current: 7.39A
Peak current: 10.56A
OCP min: 13A
+3.3V_ALWP
12
PR35
0_0402_5%~D
12
PR39
@
0_0402_5%~D
GNDA_3V5V
PC32
0.1U_0402_10V7K~D
1
12
+
PC30
2
330U_D3L_6.3VM_R25~D
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Doc um e n t N u mb er Re v
Date: Sheet
Compal Electronics, Inc.
DC/DC +3V/ +5V
LA-3801P
1
44 66T hur s da y, June 12, 2008
0.8
of
D D
C C
B B
A A
+PWR_SRC
VOUT1=5V
L=4.7uF
Fsw=400KHz
D=0.265
Output Ripple Current=1.97A
Output Ripple Voltage=1.97A*25mOhm=49.37mV)
Input Ripple Current=TDC*(D*(1-D))^0.5=3.28A
Component select
Input CAP 10uF_1206_25V *2
Output Cap 330uF_D3L_6.3VM_R25(Sanyo_6TPE330ML)
H_MOSFET FDS8880
L_MOSFET FDS6676AS(5.9/7.25mOhm@4.5V, 14.5A)
Inductor 4.7U_HMU1356-4R7-R_10A(DELTA)
5 Volt +/-5%
Thermal Design Current:6.62A
Peck current: 9.46A
OCP min: 11.3A
+5V_ALWP
PC29
1
+
2
330U_D3L_6.3VM_R25~D
12
PC31
0.1U_0402_10V7K~D
+5V_ALWP
+3.3V_ALWP
@
GNDA_3V5V
PJP14
1 2
PAD-OPE N 4x4m
3.0UH_HMP1362-3R0-R_17A_20%~D
PR34
PR38
0_0603_5%~D
1 2
0_0603_5%~D
1 2
PJP18
1 2
PAD-OPE N 4x4m
PJP19
1 2
PAD-OPE N 4x4m
5
1000P_0603_50V7K
PL6
NC
1 2
2.2_1206_1%
+5V_ALW
+3.3V_ALW
FDS8880_NL_SO8~D
PC245
PR277
Page 45
5
4
3
2
1
+DC2_PWR_SRC
+1.5V_RUN / +1.05V_M/ +3.3V_RTC_LDO
PJP20
12
PC55
10U_1206_6.3V7K
GNDA_1P5V_1P05V
1 2
PAD-OPEN 4x4m
PC56
1 2
0.1U_0402_10V7K~D
PJP24
1 2
PAD-OPEN 4x4m
5
12
12
PC38
PC39
10U_1206_25V6M~D
0.1U_0603_25V7K~D
3.3UH_MPLC0730L3R3_6.5A_20%~D
1000P_0603_50V7K
PR59
1 2
0_0603_5%~D
@
PR60
0_0603_5%~D
1 2
@
PC40
PL9
12
2200P_0402_50V7K~D
12
PC246
PR278
2.2_1206_1%
12
12
+3.3V_ALW
PQ11
SI4800BDY-T1_SO8~D
241
8
PQ13
S
S
2
1
SI4812BDY-T1-E3_SO8~D
+3.3V_SUS
PR65
@
POK2
POK1
EN1
PR244
@
100K_0402_1%~D
EN2
4
3 6
D6D5D7D
G
S
3
100K_0402_1%~D
12
578
4
12
0_0402_5%~D
1 2
+3.3V_ALW
PR66
1 2
100K_0402_1%~D
PR64
GNDA_1P5V_1P05V
187K_0402_1%~D
1 2
GNDA_1P5V_1P05V
1.05V_M_PWRGD <38>
1.5V_RUN_PWRGD <41>
1.5V_RUN_ON <37>
M_ON <38,40>
PR57
PR48
1 2
0_0805_5%~D
+5V_VCC2
GNDA_1P5V_1P05V
PR54
0_0402_5%~D
1 2
PC48
12
0.1U_0402_10V7K~D
@
1 2
+5V_ALW
9
BYP
10
OUT1
11
FB1
12
ILIM1
13
POK1
EN1 EN2
14
15
16
GNDA_1P5V_1P05V
0.1U_0603_25V7K~D
PR61
1_0603_5%~D
12
PC60
1U_0603_10V6K~D
EN1
UGATE1
PHASE1
33
1.5V_LGATE
PR63
@
10_0603_5%~D
3
1.5V_UGATE
1.5V_PHASE
PC57
1 2
THIS SHEET OF EN GINEE RING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
8
7
6
5
VIN
LDO
VREF3
LDOREFIN
PU3
ISL6236IRZA_QFN32~D
BOOT117LGATE118PVCC19SECFB20GND21PGND22LGATE223BOOT2
PAD
+5V_VCC2
12
PC59
PR50
0_0402_5%~D
PC46
0.1U_0603_25V7K~D
REF
1 2
1 2
PR53
0_0402_5%~D@
1 2
PR55
0_0603_5%~D@
2
3
1
REF
VCC
TON
EN_LDO
REFIN2
ILIM2
OUT2
SKIP#
POK2
EN2
UGATE2
PHASE2
24
2.2_0603_1%~D
1 2
GNDA_1P5V_1P05V
1.05V_LGATE
12
1U_0603_10V6K~D
GNDA_1P5V_1P05V
GNDA_1P5V_1P05V
PR49
1 2
0_0805_5%~D
1 2
PC45
0.1U_0603_25V7K~D
12
GNDA_1P5V_1P05V
32
31
PR56 187K_0402_1%~D
30
PR58 0_0402_5%~D
29
28
27
26
25
PR62
+3.3V_RTC_LDO
12
PC47
0.01U_0402_25V7K~D
REFIN2_1_05
1 2
POK2POK1
1.05V_UGATE
1.05V_PHASE
PC58
1 2
0.1U_0603_25V7K~D
PJP22
PAD-OPEN1x1m
@
OK to Short if CAD
System can Support
PR51
0_0402_5%~D
1 2
12
12
PC49
12
@
GNDA_1P5V_1P05V
GNDA_1P5V_1P05V
12
PR52
@
0_0603_5%~D
GNDA_1P5V_1P05V
0.1U_0402_10V7K~D
2
12
PC41
PC42
10U_1206_25V6M~D
10U_1206_25V6M~D
12
12
PC43
12
PC44
0.1U_0603_25V7K~D
2200P_0402_50V7K~D
1.05 Volt +/-5%
5
D8D7D6D
PQ10
S1S2S3G
4
SI4682DY-T1-E3_SO8~D
578
PQ12
3 6
241
SI4362DY-T1-E3_SO8~D
VOUT2=1.05V
L=0.88uF
Fsw=300KHz
D=0.057
Output Ripple Current=3.88A
Output Ripple Vo lt ag e=3.88A*4.5mOhm=17.44mV
Input Ripple Current=TDC*(D*(1-D))^0.5=2.53A
Component select
Input CAP 10uF_1206_25V*2
Output Cap 330U_D2E_2.5VM_R9*2(Sanyo2R5TPE330M9)
H_MOSFET SI4682DY
L_MOSFET SI4362DY(4.2/5.5mOhm@4.5V, 15A)
Inductor 0.88U_MPC1040LR88_17A(NEC_TOKIN)
+1.05V_MP +1.05V_M
Thermal Design Current: 7.89A
Peack current: 11.27A
OCP min: 13.8A
3
12
PC247
PJP21
1 2
PAD-OPEN 4x4m
PJP23
1 2
PAD-OPEN 4x4m
PL8
1
+
PC50
2
330U_D2E_2.5VM_R9
1.4UH_HMU1350-1R4PF_15A_20%~D
12
1000P_0603_50V7K
12
PR279
2.2_1206_1%
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
+1.5V_RUN / +1.05V_VCCP
LA-3801P
1
+1.05V_MP
1
12
+
PC51
2
330U_D2E_2.5VM_R9
45 66T h u r s da y, June 12, 2008
PC53
PC52
1 2
0.1U_0402_10V7K~D
10U_1206_6.3V7K
0.8
of
+PWR_SRC
D D
1.5 Volt +/-5%
Thermal Design Current: 2.63A
Peak current: 3.76A
OCP min: 4.3A
C C
+1.5V_RUN_P
1
+
PC54
2
330U_D2E_2.5VM_R9
B B
VOUT1=1.5V
L=3.3uF
Fsw=200KHz
D=0.081
Output Ripple Current=2.15A
Output Ripple Voltage=2.15A*15mOhm=32.27mV
Input Ripple Current=TDC*(D*(1-D))^0.5=0.97A
Component select
Input CAP 10uF_1206_25V
Output Cap 220U_D2_4VM_R15(NEC_PSLV0G227M)
H_MOSFET SI4800BDY
L_MOSFET SI4810BDY(16/20mOhm@4.5V, 6A)
Inductor 3.3U_MPL73-3R3_6A(DELTA)
+1.5V_RUN_P +1.5V_RUN
A A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Page 46
5
4
3
2
1
D D
12
PC225
2200P_0402_50V7K~D
PQ52
PQ53
ISL88550_AVDD
+DDR_PWR_SRC
8
D6D5D7D
G
S
S
S
3
2
1
786
5
123
4
4
0.22U_0402_6.3V 5K~D
+1.8V_SUSP
PC228
0.22U_0603_10V7K~D
1 2
PC238
PJP41
12
PAD-OPEN 4x4m
1 2
PC231
0.1U_0402_10V7K~D
GNDA_DDR
@
PC233
PR252
@
1 2
27.4K_0402_1%
1000P_0402_50V7K~D
12
PR256
17.4K_0402_1%~D
1
1
2
2
PC222
PC223
10U_1206_25V6M~D
10U_1206_25V6M~D
FDS8880_NL_SO8~D
PL20
1.4UH_HMU1350-1R4PF_15A_20%~D
12
3
1 2
PC248
1000P_0603_50V7K
PR280
2.2_1206_1%
12
12
0_0402_5%~D
12
PC224
0.1U_0603_25V7K~D
+1.8VSUSP_L
FDS6676AS_NL_SO8~D
@
PR257
1 2
+PWR_SRC
1.8 Volt +/-5%
Thermal Design Current: 6.24A
Peck current: 8.91A
OCP min: 9.85A
C C
+1.8V_SUSP
1
1
+
+
PC230
PC229
330U_D2E_2.5VM_R15~D
B B
A A
2
2
330U_D2E_2.5VM_R15~D
VOUT=1.8V
L=1.4uF
Fsw=300KHz
D=0.097
Output Ripple Current=3.96A
Output Ripple Voltage=3.96A*7.5mOhm=29.7mV
Input Ripple Current=TDC*(D*(1-D))^0.5=2.52A
Component select
Input CAP 10uF_1206_25V*2
Output Cap 330U_D2E_2.5VM_R15*2(Sanyo_2R5TPE330MF)
H_MOSFET FDS8880
L_MOSFET FDS6676AS(4.2/5.5mOhm@4.5V, 15A)
Inductor 1.4U_HMU1350-1R4PF_15A(DELTA)
+1.8VSUSP/ +0.9V_DDR_VTT
DDR2 Termination
+5V_ALW
PR245
@
12
10_1206_5%~D
ALW_PWRGD_3V_5V<38,44>
12
21
PD26
RB751V-40_SOD323~D
@
1_0603_5%~D
ISL88550_DH
ISL88550_LX
ISL88550_FB
0_0402_5%~D@
12
GNDA_DDR
PJP43
PAD-OPE N 4x4m
1 2
@
PJP44
PAD-OPE N 4x4m
1 2
@
PR250
PR254
PR255
12
12
ISL88550_REF
1 2
ISL88550_ILIM
100K_0402_1%~D
PR259
59K_0402_1%~D
1 2
PC226
4.7U_0805_6.3V6K
PU16
20
18
19
21
23
16
15
1
3
+1.8V_MEM
BST
DH
LX
DL
PGND1
VOUT
FB
TON
REF
PR246
0_0402_5%~D
PR249
0_0402_5%~D
1 2
1 2
GNDA_DDR
2
22
VDD
OVP/ UVP
ISL88550A_TQFN28~D
SKIP
ILIM
4
25
PR258
0_0402_5%~D
1 2
GNDA_DDR
@
28
TP0
24
12
GNDA_DDR
ISL88550_AVDD
26
17
VIN
AVDD
5
POK1
6
POK2
27
SHDN
7
STBY
13
VTTI
14
REFIN
11
PGND2
12
VTT
9
VTTS
10
VTTR
SS8GND
GND
29
12
PC239
1000P_0402_50V7K~D
@
GNDA_DDR
PC227
1U_0603_10V6K~D
ISL88550_REFI N
12
12
+3.3V_ALW
PR247
20K_0402_5%~D
PR253
20_0603_1%~D
12
PC234
0.1U_0402_10V7K~D
GNDA_DDR
PC240
1U_0603_10V6K~D
1 2
PR248
1 2
100K_0402_1%~D
DDR_ON <38>
+1.8V_SUSP
GNDA_DDR
1
PC232
10U_0805_6.3V6M~D
2
PJP42
PAD-OPEN1x1m
@
1.8V_SUS_PWRGD <38>
PR251
0_0402_5%~D
12
+1.8V_SUSP
1
1
PC235
PC236
2
2
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
+V_DDR_MCH_REF
12
0.9V_DDR_VTT _ON <37>
+0.9V_DDR_VTTP
1
Design current 0.7A for +0.9V_DDR_VTTP
PC237
Peak current 1A for +0.9V_DDR_VTTP
2
10U_0805_6.3V6M~D
@
+0.9V_DDR_VTTP
5
4
PJP45
2 1
PAD-OPEN 2x2m ~D
+0.9V_DDR_VTT
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Doc um e n t N u mb er Re v
Date: Sheet
Compal Electronics, Inc.
+1.8VSUSP/ +0 . 9V_DDR_VT
LA-3801P
1
46 66T hur s da y, June 12, 2008
of
0.8
Page 47
8
7
6
5
4
3
2
1
+CPU_PWR_SRC
H H
PC96
PC108
PQ17
PQ21
PQ19
SI4386DY-T1-E3_SO8~D
4
G
2
G
SI4386DY-T1-E3_SO8~D
4
2
SI4386DY-T1-E3_SO8~D
4
G
2
G
+CPU_PWR_SRC
PR86
10_0603_5%~D
12
PC97
0.01U_0402_25V7K~D
GNDA_VCORE
19
20
VSS
VDD
13K_0402_5%~D
4
VR_TT#
3
RBIAS
5
NTC
6
SOFT
28
VID0
29
VID1
30
VID2
31
VID3
32
VID4
33
VID5
34
VID6
37
DPRSTP#
36
DPRSLPVR
1
PSI#
2
PMON
38
CLK_EN#
35
VR_ON
12
VSEN
13
RTN
11
VDIFF
10
FB
9
COMP
8
VW
ISL6260CCRZ_QFN40~D
41
GND
DROOP
14
PR131
PC129
12
330P_0402_50V7K~D
PC131
4700P_0402_25V7K~D
1 2
18
VIN
PU7
DFB15VO
12
12
@
+3.3V_RUN
1 2
39
40
3V3
PGOOD
PWM1
ISEN1
PWM2
ISEN2
FCCM
PWM3
ISEN3
OCSET
VSUM
16
VO
PR132
1K_0402_1%~D
PC132
4700P_0402_25V7K~D
GNDA_VCORE
PR93
1.91K_0603_1%~D
27
23
26
22
24
25
21
7
17
12
PR122
4.53K_0402_1%~D
PC122
0.33U_0603_10V7K
12
2
PC133
1
@
IMVP_PWRGD <24,37,41,49>
VSUM
PC120
2
0.033U_0402_16V7K~D
1
1
2
PC123
0.01U_0402_16V7K~D
0.1U_0402_16V7K~D
6
PR116
@
226K_0402_1%~D
PR117
12.7K_0402_1%~D
12
PR119
1 2
2.43K_0402_1%~D
12
PH3
6.8KB_0603_5%_ERTJ1VR682J~D
12
GNDA_VCORE
12
12
PR125
@
0_0402_5%~D
12
PR130
15K_0402_1%~D
1
2
PC130
@
0.1U_0402_16V7K~D
G G
+5V_ALW
PR89
1 2
10_0603_5%~D
PC100
1U_0603_10V6K~D
GNDA_VCORE
PAD~D
IMVP6_PROCHOT#
T92
PH1
12
12
12
12
12
12
CLK_ENABLE#
T55PAD~D
PR114 0_0402_5%~D
12
12
12
12
PR124
0_0603_5%~D
12
PR127
0_0402_5%~D
12
PR129
PC128
12
12
12
12
@
@
12
12
PR137
PC134
GNDA_VCORE
7
12
PR95
0_0603_5%~D
GNDA_VCORE
12
1K_0402_1%~D
1
2
0.01U_0402_16V7K~D
PR97
@
9.76K_0402_1%
12
@
F F
E E
GNDA_VCORE
H_DPRSTP#<8,10,23>
DPRSLPVR<10,24>
H_PSI#<8>
D D
PWR_MON<18>
PC111
1U_0603_10V6K~D
GNDA_VCORE
RUNPWROK<37,38,41>
IMVP_VR_ON<37>
10KB_0603_1%_ERTJ1VG103FA~D
C C
B B
@
A A
GNDA_VCORE
0_0402_5%~D
2200P_0402_50V7K~D
0.015U_0402_16V7K~D
VID0<8>
VID1<8>
VID2<8>
VID3<8>
VID4<8>
VID5<8>
VID6<8>
PR110
10K_0402_5%~D
1 2
12
PH2
@
PR118
12
4.99K_0402_1%@
VSSSENSE<8>
PR123
332_0402_1%~D
220P_0402_50V8J~D
12
PR138
0_0402_5%~D
8
PR94
147K_0402_1%~D
12
PR96
@
12
PC101
@
12
PC107
12
PR100
0_0402_5%~D
PR102
0_0402_5%~D
PR104
0_0402_5%~D
0_0402_5%~D
12
@
0_0402_5%~D
PR115 0_0402_5%~D@
GNDA_VCORE
1 2
12
PC121
680P_0402_50V7K~D
1 2
PC124
1500P_0402_50V7K~D
PC127
1 2
@
470KB_0402_5%_NCP15WM474J03RB~D
PR99
0_0402_5%~D
12
PR101
0_0402_5%~D
12
PR103
0_0402_5%~D
12
PR105
0_0402_5%~D
PR107
PR108
499_0402_1%~D
12
PR113
12
12
VCCSENSE<8>
PC112 1000P_0402_50V7K~D
PC117 1000P_0402_50V7K~D
PR120
0_0402_5%~D
PR126
1.69K_0402_1%~D
82.5K_0402_1%~D
1000P_0402_50V7K~D
PR136
6.34K_0402_1%~D
5
PC95
@
1U_0603_10V6K~D
@
PR139
12
PR368
33K_0402_5%~D
12
+5V_ALW
12
PR366
33K_0402_5%~D
@
+5V_ALW
12
PC106
12
PR367
@
+5V_ALW
12
PC118
12
PWR_ MON <18>
30K_0402_5%~D
PU6
5
VCC
6
FCCM
UGATE
2
PWM
3
GND
ISL6208CRZ-T_QFN8~D
PU8
1U_0603_10V6K~D
5
VCC
6
FCCM
2
PWM
3
GND
ISL6208CRZ-T_QFN8~D
33K_0402_5%~D
PU9
5
VCC
1U_0603_10V6K~D
6
FCCM
UGATE
2
PWM
3
GND
ISL6208CRZ-T_QFN8~D
PR87
2.2_0603_1%~D
UGATE1
LGATE1
PR98
2.2_0603_1%~D
UGATE2
LGATE2
PR121
UGATE3
0.22U_0603_10V7K~D
12
1 2
0.22U_0603_10V7K~D
1 2
12
PC119
0.22U_0603_10V7K~D
1 2
12
LGATE3
4
1
BOOT
8
7
PHASE
4
LGATE
1
BOOT
8
UGATE
7
PHASE
4
LGATE
2.2_0603_1%~D
1
BOOT
8
7
PHASE
4
LGATE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVIS ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITT EN CO NSE NT OF COMPAL ELECTRONICS, INC.
12
PC90
8
D6D5D7D
0.1U_0603_25V7K~D
@
S
S
S
3
2
1
3
D
S
1
8
D6D5D7D
G
S
S
S
3
2
1
3
D
G
S
1
8
D6D5D7D
S
S
S
3
2
1
3
D
S
1
1 2
12
PC176
@
1000P_0603_25V7K~D
PHASE1
PQ18
@
1 2
FDMS8670AS_MLP-8~D
12
PC99
@
1500P_0603_25V7K~D
1 2
12
PC177
@
1000P_0603_25V7K~D
PQ20
1 2
FDMS8670AS_MLP-8~D
12
PC110
@
1500P_0603_25V7K~D
PR273
@
1 2
12
PC178
@
PHASE3
1000P_0603_25V7K~D
PQ22
@
1 2
12
FDMS8670AS_MLP-8~D
PC126
@
1500P_0603_25V7K~D
3
12
12
PC91
PC92
0.1U_0603_25V7K~D
2200P_0402_50V7K~D
PR271
2.4_0805_1%~D
PR269
2.4_0805_1%~D
10K_0402_1%~D
1 2
PR91
7.68K_0805_1%~D
1 2
VSUM
12
PR272
@
PC102
2.4_0805_1%~D
PC103
0.1U_0603_25V7K~D
2200P_0402_50V7K~D
PHASE2
PR268
@
2.4_0805_1%~D
+CPU_PWR_SRC
2.4_0805_1%~D
0.45UH_ET QP4LR45XFC_25A_20%~D
PR270
2.4_0805_1%~D
10K_0402_1%~D
1 2
PR134
7.68K_0805_1%~D
1 2
VSUM
12
12
PC93
PC94
10U_1206_25V6M~D
10U_1206_25V6M~D
PL13
0.45UH_ETQP4LR45XFC_25A_20%~D
4
3
PR90
0.22U_0603_10V7K~D
+CPU_PWR_SRC
12
12
PC105
PC104
10U_1206_25V6M~D
0.45UH_ET QP4LR45XFC_25A_20%~D
4
3
PR109
10K_0402_1%~D
1 2
PR111
7.68K_0805_1%~D
1 2
VSUM
12
12
PC115
PC114
PC113
10U_1206_25V6M~D
10U_1206_25V6M~D
PL15
1
2
PR133
0.22U_0603_10V7K~D
1
1
+
+
PC88
PC89
2
2
100U_25V_M~D
100U_25V_M~D
1
2
PC98
12
12
10U_1206_25V6M~D
PL14
1
2
PC109
0.22U_0603_10V7K~D
12
12
12
PC116
0.1U_0603_25V7K~D
2200P_0402_50V7K~D
4
3
PC125
1 2
12
12
VO
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Doc um e n t N u mb er Re v
Date: Sheet
2
PL12
FBMJ4516HS720NT_1806~D
1 2
PJP32
1 2
1
+
PAD-OPE N 4x4m
PC87
2
@
100U_25V_M~D
Iccmax=44A
I_TDC=35A
OCP=65A, Intel spec=50A
PR88
10_0402_1%~D
1 2
12
PR92
0_0402_5%~D
VO
PR106
10_0402_1%~D
1 2
12
PR112
0_0402_5%~D
VO
+VCC_CORE
PR128
10_0402_1%~D
PR135
0_0402_5%~D
12
PC264
680P_0402_50V7-K~D
+VCC_CORE
+VCC_CORE
Compal Electronics, Inc.
+VCORE
LA-3801P
+PWR_SRC
12
PC265
470P_0402_50V7K~D
47 66T hur s da y, June 12, 2008
1
0.8
of
Page 48
5
+DC_IN_SS
2
G
0.01U_0402_25V7K~D
GNDA_CHG
CKG_SMBCLK<6,27,38>
CKG_SMBDAT<6,27,38>
PC256
100P_0402_50V8J
GNDA_CHG
NB_AC_OFF <37,43,50>
NB_AC_OFF#
13
D
PQ44
RHU002N06_SOT323
S
+SDC_IN
PR154
49.9K_0402_1%~D
12
PC146
12
+3.3V_ALW
PC153
0.1U_0402_10V7K~D
GNDA_CHG
ISL88731_ICM<18>
+DC_IN
ISL88731_VREF
12
PR331
PR333
232K_0402_1%~D
47K_0402_1%~D
12
12
PR336
21.5K_0402_1%
PC255
GNDA_CHG
100P_0402_50V8J
GNDA_CHG
2
G
PR284
200K_0402_1%~D
ISL88731_VDDP
PR145
1 2
ACAV_IN<18,38>
12
12
12
PR332
42.2K_0402_1%~D
GNDA_CHG
5
D D
C C
B B
A A
SI4835BDY-T1-E3_SO8~D
10K_0402_5%~D
13
D
+DOCK_PWR_BAR
PQ35
RHU002N06_SOT323
S
12
PR152
10K_0402_1%~D
215K_0402_1%
1M_0402_5%~D
1 2
+5V_ALW
5
IN+
6
IN-
12
GNDA_CHG
PD30 B540C~D
2 1
8
7
5
PR174
12
+DC_IN_SS
ACAV_DOCK_SRC<50>
12
PR157
@
PR334
8
P
O
G
4
PQ34
4
24K_0402_1%~D
2
3
ISL88731_VREF
12
PR173
0_0402_5%~D
@
12
15.8K_0402_1%~D
12
PR162
PC164
@
16.2K_0402_1%~D
+3.3V_ALW
12
7
PU11B
LM393DR_SO8~D
NB_AC_OFF#
1
2
36
PR175
PR159
12
PC165
0.1U_0402_10V7K~D
ISL88731_VREF
PR341
@
100K_0402_5%~D
PR335
1 2
0_0402_5%~D
12
@
12
0_0402_5%~D
PD33
BAT54CW_SOT323~D
1
2
G
PR156
1 2
0_0402_5%~D
1 2
PR176
@
200K_0402_5%~D
12
PC241
@
2.2K_0402_5%~D
130P_0402_10V7K~D
1 2
12
0.01U_0402_25V7K~D
12
PR362
100K_0402_5%~D
PD35
2 1
RB751S40T1_SOD523-2~D
PR356
13
D
S
PC156
@
+DC_IN
12
PR143
PQ56
RHU002N06_SOT323
12
PR150
2000P_0402_10V7K~D
PC242
1 2
@
130P_0402_10V7K~D
12
12
PC157
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
ISL88731_ICM
PAD~D@
T174
ACAV_IN_NB <37,38>
4
160K_0402_1%~D
2
12
PC142
33K_0402_5%~D
0.047U_0603_25V7K~D
GNDA_CHG
12
PC243
@
12
PC158
@
1U_0603_10V6K~D
PR167
@
1 2
8.45K_0402_5%~D
PR169
@
33.2K_0402_1%~D
1 2
GNDA_CHG GNDA_CHG
4
+SDC_IN
12
PR141
33K_0402_5%~D
12
PR146
10K_0402_5%~D
13
D
G
PQ27
S
0.1U_0603_25V7K~D
PC145
1U_0805_25V6K~D
12
ISL88731_ICM
1 2
PR262
@
7.5K_0402_5%~D
ISL88731_VREF
PR263
@
1 2
0_0402_5%~D
@
GNDA_CHG
ISL88731_VREF
12
PC168
@
0.1U_0402_25V7K~D
PR140
0.01_1206_1%~D
2
2
PU10
22
DCIN
2
ACIN
13
ACOK
11
VDDSMB
10
SCL
9
SDA
14
NC
8
ICM
6
VCOMP
5
NC
4
ICOMP
3
VREF
7
NC
12
GND
29
GND
PC170
@
1
2
13
1
3
12
10K_0402_5%~D
0.1U_0402_10V7K~D
PR354
10_0402_1%~D
1
ISL88731_TQFN28~D
12
100P_0402_50V8J
@
12
PC135
TBD_0603_25V7K~D
RHU002N06_SOT323
PC138
@
1 2
GNDA_CHG
12
PC163
0.1U_0402_10V7K~D
12
PR166
@
51.1K_0402_1%~D
12
PR171
12
@
17.8K_0402_1%
PC169
@
12
0.01U_0402_25V7K~D
GNDA_CHG GNDA_CHG GNDA_CHG GNDA_CHG
PR172
GNDA_CHG
@
348_0402_1%~D
4
3
13
2
2
PQ26
NTR4502PT1G_SOT23-3~D
12
12
PR177
PC143
1 2
@
0.1U_0603_25V7K~D
27
28
NC
VCC
CSSP
CSSN
BOOT
VDDP
UGATE
PHASE
LGATE
PGND
CSOP
CSON
VFB
NC
GNDA_CHG
1M_0402_1%~D
1 2
2
IN-
3
IN+
12
PC171
@
100P_0402_50V8J
+5V_ALW
THIS SHEET OF EN GINEE RING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1
3
PR149
PC260
26
25
21
24
23
20
19
18
17
15
16
PR164
@
GNDA_CHG
4
G
P
8
3
PQ25
NTGD4161PT1G_TSOP6~D
NTR4502PT1G_SOT23-3~D
12
10_0402_1%~D
PR340
12
GNDA_CHG
PR155
2.2_0603_1%~D
1 2
ISL88731_VDDP
PR158
0_0603_1%~D
12
PC154
220P_0402_50V7K~D
PJP34
1 2
PAD-OPEN1x1m
@
PU11A
LM393DR_SO8~D
1
O
12
PC172
@
@
100P_0402_50V8J
PL21
FBMJ4516HS720NT_1806~D
1 2
PJP33
1 2
PAD-OPEN 4x4m
PQ62B
S
D
42
G
3
100K_0402_5%~D
12
PC147
0.1U_0603_25V7K~D
12
PR161
1 2
100_0402_5%~D
12
PC173
0.01U_0402_25V7K~D
@
CHG_LGATE
PQ62A
NTGD4161PT1G_TSOP6~D
S
G
12
1
PR339
100K_0402_5%~D
PC144
1U_0603_10V6K~D
1 2
PR153
33_0603_1%~D
1 2
PD17
PC148
1U_0603_10V6K~D
2 1
RB751V_SOD323~D
1 2
CHG_UGATE
+VCHGR
+5V_ALW +3.3V_ALW
12
PR168
@
100K_0402_1%~D
@
12
PC167
@
10P_0402_50V8J~D
GNDA_CHG GN DA_CHG GNDA_CHG
12
PC136
@
2200P_0402_50V7K~D
DOCK_DCIN_IS+ <35>
D
65
PR338
100K_0402_5%~D
12
GNDA_CHG
PC155
3300PF_0402_50V7K~D
4
12
PR165
100K_0402_5%~D
@
13
D
2
G
S
PQ33
RHU002N06_SOT323
2
CHAGER_SRC+PWR_SRC
12
PC137
@
0.1U_0603_25V7K~D
DOCK_DCIN_IS- <35>
SW_GND <50>
578
3 6
12
+VCHGR_B
G
3
241
D6D5D7D
S
2
S
578
PQ30
SI4800BDY-T1_SO8~D
8
12
12
PQ32
S
1
SI4812BDY-T1-E3_SO8~D
PQ31
SI4800BDY-T1_SO8~D
3 6
241
1 2
5.6U_HMU1356-5R6_8.8A_20%~D
PC249
1000P_0603_50V7K
PR281
4.7_1206_5%
GNDA_CHG
PC149
PL16
+VCHGR_L
10_0402_1%~D
PR163
1 2
PC139
@
0.1U_0603_25V7K~D
12
2200P_0402_50V7K~D
12
0.1U_0402_10V7K~D
Maximum charging current is 6.24A
ADAPT_OC <37>
12
PR170
1K_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
2
Date: Sheet
12
PC150
0.1U_0603_25V7K~D
PR160
0.01_1206_1%~D
1
2
PC166
1 2
1
12
12
PC151
PC152
10U_1206_25V6M~D
10U_1206_25V6M~D
+VCHGR
4
3
12
12
12
PC159
0.1U_0603_25V7K~D
PR355
10_0402_1%~D
PC261
@
0.1U_0603_25V7K~D
GNDA_CHG
12
PC160
PC161
10U_1206_25V6M~D
PC162
10U_1206_25V6M~D
ACAV_IN
10U_1206_25V6M~D
12
Compal Electronics, Inc.
Charger
LA-3801P
1
12
12
@
48 66T h u r s da y, June 12, 2008
@
12
PC179
PR264
2200P_0402_50V7K~D
2
G
of
1.8K_1206_5%~D
13
D
PQ36
S
@
RHU002N06_SOT323
0.8
Page 49
5
A
D D
VSS_AXG_SENSE<14>
C C
12
PR224
33.2K_0402_1%
PR226
100_0402_5%~D
1 2
VSS_AXG_SENSE
GNDA_VGA
12
PC215
B B
VCC_AXG_SENSE<14>
1000P_0402_50V7K~D
GNDA_VGA
12
@
22P_0402_50V8J
1K_0402_1%~D
PR229
0_0603_5%~D
1 2
+VGFX_COREP
PC206
PR227
PWR_MON_GFX<18>
12
@
22P_0402_50V8J
20K_0402_1%~D
1 2
1 2
PC208
470P_0402_50V7K
GNDA_VGA
PC207
12
PR228
GNDA_VGA
PR232 200K_0402_1%~D
12
PC217
2.2U_0603_6.3V7K~D
12
PC209
12
12
12
PC210
0.012U_0402_16V7K~D
680P_0402_50V7K~D
PR235
3K_0402_1%
VGFX_CORE_FB
4
GFX_VID4<10>
GFX_VID3<10>
GFX_VID2<10>
GFX_VID1<10>
GFX_VID0<10>
GFX_VR_ON<10>
GNDA_VGA
IMVP_PWRGD<24,37,41,47>
PR230
1 2
187K_0402_1%~D
GNDA_VGA
PR231
1 2
PR236
0_0402_5%~D
@
1 2
PR240
0_0402_5%~D
1 2
1
2
3
4
5
6
7
8
100K_0402_1%~D
PR216
0_0402_5%~D
1 2
PR217
0_0402_5%~D
1 2
PR218
0_0402_5%~D
1 2
PR219
0_0402_5%~D
1 2
PR220
0_0402_5%~D
1 2
1 2
PR221
0_0402_5%~D
PU15
FBRTN
FB
COMP
SS
ST
PMON
PMONFS
CLIM
32
30
31
EN
VID029VID128VID227VID326VID4
PWRGD
VARFREQ#
LLINE9CSCOMP10CSREF11CSFB12RAMP13VRPM14RPM15RT
PR234
PR233
1 2
200K_0402_1%~D
12
PC218
@
2200P_0402_50V7K~D
+5V_ALW
25
GNDA_VGA
PR225
24
VCC
0_0603_5%~D
23
BST
DRVH
22
DRVH
SW
21
SW
20
PVCC
DRVL
19
DRVL
18
PGND
17
GND
33
AGND
ADP3209JCPZ-RL_LFCSP32_5X5~D
16
GNDA_VGA
12
12
PC216
357K_0603_0.5%
1000P_0402_50V7K~D
GNDA_VGAGNDA_VGA
76.8K_0402_1%
12
PC219
1800P_0402_50V7K~D
3
PR223
10_0603_5%~D
1 2
12
PC204
1U_0603_10V6K~D
PD25
RB751V-40_SOD323~D
12
1 2
1 2
PC211
1U_0603_10V6K~D
12
PR237
12
PC205
165K_0402_1%
12
PR238
4.7U_0805_10V6K~D
5
4
578
3 6
PR241
0_0402_5%~D
1 2
D8D7D6D
S1S2S3G
241
+VGFX_SRC
PQ50
SI4682DY-T1-E3_SO8~D
PQ51
SI4362DY-T1-E3_SO8~D
PR239
1 2
68.1K_0603_1%~D
PC202
12
PC140
1000P_0603_50V7K
12
PR265
2.2_1206_1%
2
12
10U_1206_25V6M~D
12
12
PC62
PC203
10U_1206_25V6M~D
2200P_0402_50V7K~D
PL19
0.88UH_MPC1040LR88C_17A_20%~D
4
3
PH4
1 2
220K_0402_5%_ERTJ0EV224J~D
VGFX_CORE_FB
PJP38
1 2
PAD-OPEN 4x4m
VGFX_NB
12
Thermal Design Current: 6.14A
Peak current: 8.77A
PC61
0.1U_0805_50V7K
OCP min: 10A
1
2
+PWR_SRC
1
1
+
+
PC212
PC213
2
2
330U_D2E_2.5VM_R15~D
330U_D2E_2.5VM_R15~D
VOUT=Vgfx_NB(1.25V)
L=0.56uF
Fsw=436KHz
D=0.0658
Output Ripple Current=4.78A
Output Ripple Voltage=4.78A*7.5mOhm=35.85mV
Input Ripple Current=TDC*(D*(1-D))^0.5=1.52A
Component select
Input CAP 10uF_1206_25V*2
Output Cap 330U_D2E_2.5VM_R15*2
H_MOSFET SI4682DY
L_MOSFET SI4362DY(4.2/5.5mOhm@4.5V, 15A)
Inductor 0.56U_MPC1040LR56_23A(NEC_TOKIN)
1
PC214
12
@
0.1U_0402_16V7K
<BOM Structure>
PC258
1
2
10U_0805_6.3V6M~D
+VGFX_COREP
1
PC259
2
@
10U_0805_6.3V6M~D
GNDA_VGA
PJP39
PAD-OPEN1x1m
@
12
12
PC220
1000P_0402_50V7K~D
GNDA_VGA GNDA_VGA
PR242
340K_0402_1%~D
12
1K_0402_1%~D
12
PC221
100P_0402_50V8J
PR243
+VGFX_SRC
12
PJP40
+VGFX_COREP
1 2
PAD-OPE N 4x4m
+VCC_GFXCORE
A
Title
ADP3209 Power Up both Intel GMCH and ATI M54
Size Doc um e n t N u mb er Re v
C
Date: Sheet
49 66Thursday, June 12, 2008
0.8
of
Page 50
5
D D
+3.3V_ALW2
12
PR274
100K_0402_5%~D
RHU002N06_SOT323
ACAV_DOCK_SRC#<35>
C C
PQ65
SI4835BDY-T1-E3_SO8~D
8
+VCHGR
B B
PBATT_OFF<37>
A A
7
5
+3.3V_ALW
12
3
5
4
PBATT_OFF<37>
DOCK_AC_OFF<35,37>
PR353
100K_0402_5%~D
2
PQ64B
2N7002DW-T/R7_SOT363-6~D
1
2
36
4
12
PR352
PQ64A
61
2N7002DW-T/R7_SOT363-6~D
12
47K_0402_1%~D
21
RB751S40T1_SOD523-2~D
PD34
PR351
240K_0402_5%~D
PBATT_OFF<37>
PBATT+
PR364
390K_0402_5%~D
PR365
390K_0402_5%~D
+3.3V_ALW2
2
G
1 2
1 2
4
+DOCK_PWR_BAR
PQ29
12
PR275
100K_0402_5%~D
ACAV_DOCK_SRC <48>
13
D
PQ57
RHU002N06_SOT323
S
3
PQ55B
2N7002DW-T/R7_SOT363-6~D
5
4
13
D
2
G
S
PR260
620K_0402_5%~D
1 2
61
2N7002DW-T/R7_SOT363-6~D
2
PQ55A
PD36
2 1
RB751S40T1_SOD523-2~D
12
PR147
100K_0402_5%~D
12
PR179
22K_0402_5%~D
5
2N7002DW-T/R7_SOT363-6~D
PR261
33_0402_5%~D
PQ63B
FDS6679AZ_SO8~D
1
2
3 6
4
12
12
SLICE_BAT_PRES#<35,37,43>
3
+3.3V_ALW +3.3V_ALW
12
PR178
13
D
PQ37
2
RHU002N06_SOT323
G
S
3
61
PQ63A
4
2N7002DW-T/R7_SOT363-6~D
PQ41
8
7
5
+DC_IN_SS
PC263
1U_0603_25V6-K~D
100K_0402_5%~D
SW_GND <48>
PR360
0_0402_5%~D
2
PD19
RB751V-40_SOD323~D
5
12
PR357
330K_0402_5%~D
12
SLICE_BAT_PRES
+3.3V_ALW2
12
PR329
100K_0402_5%~D
SLICE_BAT_PRES
3
PQ40B
2N7002DW-T/R7_SOT363-6~D
4
2
G
2
G
12
12
PR180
100K_0402_5%~D
NB_AC_OFF <37,43,48>
13
D
PQ38
RHU002N06_SOT323
S
+5V_ALW
12
PR181
22K_0402_5%~D
NB_AC_OFF_BJT <43>
13
D
PQ39
RHU002N06_SOT323
S
PQ59B
NTGD4161PT1G_TSOP6~D
S
G
3
PR325
1 2
240K_0402_5%~D
1 2
61
2
PD27
B540C~D
2 1
FDS6679AZ_SO8~D
PQ23
8
7
5
4
12
330K_0402_5%~D
1 2
+NBDOCK_DC_IN_SS
D
42
12
PR363
1K_1206_5%
12
PC262
PR327
1U_0603_25V6-K~D
47K_0402_5%~D
PQ40A
2N7002DW-T/R7_SOT363-6~D
1
2
36
PR148
47K_0402_1%~D
PR361
+DOCK_PWR_BAR
2
12
12
PC141
PR142
0.47U_0805_25V7K~D
IMD2AT-108_SC74-6~D
+DC_IN_SS
NTGD4161PT1G_TSOP6~D
S
G
PR326
1 2
240K_0402_5%~D
2
G
PQ24B
IMD2AT-108_SC74-6~D
2
16
240K_0402_5%~D
4 3
PQ24A
PD18
2
3
RB715F_SC70-3~D
PQ59A
D
65
1
PR328
1 2
47K_0402_5%~D
13
D
PQ43
RHU002N06_SOT323
S
12
PR144
22K_0402_5%~D
EN_DOCK_PWR_BAR#
5
PQ28
RHU002N06_SOT323
13
D
2
G
S
1 2
PR151
22K_0402_5%~D
PD31
PDS5100H-13_POWERDI5-3
2
3
FDS6679AZ_SO8~D
PQ42
8
7
5
4
1
PD20
12
RB751V-40_SOD323~D
PR186
1 2
33K_0402_5%~D
13
D
S
1
1
2
36
PQ66
RHU002N06_SOT323
2
G
PR358
0_0402_5%~D
PR359
@
0_0402_5%~D
1
EN_DOCK_PWR_BAR <37>
12
PC174
2200P_0402_50V7K~D
EN_DOCK_PWR_BAR#
12
ACAV_DOCK_SRC
12
+PWR_SRC
12
PC175
0.1U_0603_25V7K~D
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Selector
LA-3801P
50 66T h u r s da y, June 12, 2008
1
0.8
of
Page 51
5
4
Version Change List ( P. I. R. List )
3
2
1
Item Issue DescriptionDate
D D
08/14/200718 10 38 HW Compal BOM issue Pop C238 R157 R545 R37 R38 X 0 1
Owner
HW36 X01Change U33Change NXP to 8009CNCompal08/14/20072
363 08/14/2007 Compal For vender request Change R799 from 5 ohm to 0 ohm
29 10-15
4 08/14/2006 Compal Part number issue
5 36 08/14/2007 Compal For vender request Change R476 from 2.2k ohm to 510k ohm
6 36 08/14/2007 Compal For vender request
736
8
C C
9
38 HW 08/16/2007 Compal U57 & U59 GND pin & Power pin reverse
38 HW 08/16/2007 Compal For vender request CELL_CHARGER_DET# pull up R877 100K ohmto +RTC_CELL
10
11
12
13
14
15
21 HW 08/16/2007 Compal For vender request
37 HW 08/16/2007 Compal U60 & U61 OE# pin & Power pin reverse
21 HW 08/16/2007 Compal For vender request Delete L70-L74 & R863-R872 X01
37 HW 08/16/2007 Compal Board ID De-pop R534 & pop R529 X01
31 HW 08/20/2007 Compal For vender request Change R802 & R803 to 1@, R671 & R739 to 2@ X01
HW
HW
Change U23 from 82567LF to 82567LM &
change U2 from Teenah to Cantiga
HW X01
HW X01
Change R488 from 1k ohm to 330k ohm
08/14/2007 Compal For vender request Add L77HW X01
U57, U59 pin 3 connect to GND & pin 5 connect to
+RTC_CELL
For vender request
Add pull up 1@R882 100K Ohm & pull down
2@R883 100K ohm for DET_PCCRD_EXPSCRD#
Add C1036-C1039 for DPB_AUX, DPB_AUX#, DPC_DOCK_AUX &
DPC_DOCK_AUX#
U60, U61 pin 1 connect to GND & pin 5 connect to
+3.3V_ALW
Solution Description Rev.Page#1Title
X01
X01
X01
X01
X0137 HW 08/16/2007 Compal
X01
X01
Request
16
B B
17
18
19
20
33 Avoid ESATA device back drive to ICH9-M
25 HW 08/30/2007 Compal For vender request
21
22
23
HW 08/20/2007 Compal24 For vender request Change RP2 from 100K to 10K X01
For vender requestCompal08/20/2007HW42
Change Q98 & Q116 from BSS138W to 2N7002, Q120-Q122
pin 3 pull up from +5V_ALW to +5V_RUN
X01
HW 08/20/2007 Compal For vender request De-pop R630 X0141
HW 08/24/2007 Compal Change U54 pin 8 to +3.3V_SUS
Change U10 pin AJ3 from +3.3V/1.5V_RUN_HDA to
+3.3V_ALW_ICH
Compal08/30/2007 For vender requestHW U24 pin 9 add pull down @R884 to GND29
HW 08/30/2007 Compal Avoid +RTC_CELL drop to 2.5V18
U3 pin 21 add R887 0 ohm, U3 pin 22-24 add
pull up @R885, @R886 & @R888 to +RTC_CELL
For debug requestCompal08/30/2007HW36 U32 pin B5 add @R894, pin P10, R11, N10, R12,
X02
X02
X02
X02
X02
P11 & M9 add @R895-@R897 and @R899
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Changed-List History
LA-3801P
51 66T h u r s da y, June 12, 2008
1
0.8
of
Page 52
5
4
Version Change List ( P. I. R. List )
3
2
1
Item Issue DescriptionDate
D D
25 HW
26 Compal SBOOT add @R898 pull down to GNDHW
38 Compal For Dock detect function
36 08/30/2007
27 38 HW Compal
29 38 HW Compal
30
10 HW 08/30/2007 DELL For customer request Add test point in U2 RSVD1-RSVD25
31 HW Compal
C C
32 HW Compal
33 HW
34 HW
27 08/31/2007 For vender request
35 HW
36
HW Compal
37 HW Compal
HW Compal
39
B B
40
7 HW 09/03/2007 Intel
35,37
39
10
43 For customer requestDELL09/03/2007HW
44 HW 09/03/2007 DELL For customer request
21
23
08/30/2007HW31
08/30/2007
08/30/2007 For vender request
08/30/2007 For JTAG_RST# RC delay
08/30/2007 Board ID37 Pop R530, R534, de-pop R529, R535
08/31/2007 Change E-Dock connector location35 Change from JP1 to JDOCK1
08/31/2007 For vender request37 Change JTS1 pin define
09/01/200722,24 For customer request
09/01/2007
09/03/2007 DELL For customer requestHW41
Owner
Schematic issueCompal24
For JTAG debug purpose
For vender requestCompal08/30/2007HW2928
Compal
Compal Remove C610, C611
DELL
For vender request19 Pop D4
For vender request09/01/200736
For customer request09/01/20073638 Remove L77
Follow Debug port design guide for Santa Rosa and
Montevina Platforms_Rev0.95 for ITP700Flex debug port
DELL For customer request09/03/2007HW
For customer requestDELL09/03/2007HW45
VCC3EN# need connect to U27 pin2, VCC5EN# need connect
to U27 pin 1
Remove U58 and connect ACAV_IN_DOCK to U59 pin 1
SNIFFER/INSTANT_SW# add R900 100K ohm pull up
to +RTC_CELL
U24 pin 28 C_TPM_LPC_EN add 4@R892 pull down 4.7K ohm to
GND, and add 4@R893 to EC & USH
JTAG_RST# add C1040 0.1uF to GND, and R585 change
from 1K ohm to 100 ohm and no-stuff
Change R817, R212 from 8.2K ohm to 100K ohm,
R823 from 10K ohm to 100K ohm
Remove R858, R875, R876, R859, R735
De-pop R555, R848, R20 and add @R831, R855 0 ohm
Change ITP_TDO,ITP_TMS,ITP_TDI,ITP_TRST#,ITP_TCK of
R62,R64,R65,R66,R67 pull-up from 56 to 51ohm and add
ITP_BPM#5 of R912 pull-up 51ohm to +1.05V_VCCP. Change
H_RESET# serial resistor to 1K ohm
Remove SLICE_CONN_LOOP# on ECE5028 pin28
and short JDOCK1 pin141,143 and use SLICE_BAT_PRES#
Contact CONTACTLESS_DET# to JCS1 pin6 and
add pull-up 100K to +3.3V_ALW
R180 and R181 need to change back to 100K ohmFor customer requestDELL09/03/2007HW42
POP C271, C272, C273, C274 with 0.1 uF
Change C1036, C1037, C1038, and C1039 to R901-R904
Updated RTC PAID ciruit, add R905 100K ohm,
R906 1M ohm, Q96, R908 100K ohm and @R907 remove R757
U60 pin 5 pull up to +3.3V_RUN37
Solution Description Rev.Page# Title
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
Request
46 09/03/2007HW
A A
HW2647 X02
09/03/2007
Compal
Compal For ATG touch screen function BOM control Change R477, Q117, C388, C387, C386, C79 to 3@
For vender request28
Pop R368, de-pop R367
X02
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Changed-List History
LA-3801P
52 66T h u r s da y, June 12, 2008
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of
Page 53
5
4
Version Change List ( P. I. R. List )
3
2
1
Item Issue DescriptionDate
D D
49
50
35 C1033 & C1034 change to 0603 25VCompal
HW
09/03/2007 Smart card function can not work36
Owner
Compal For vender requestHW 09/03/2007 Change net name from AUD_EAPD# to AUD_EAPD 27,28
CompalHW
For vender request09/03/2007
JSC1 pin 1 connect change from GND to add
R913 4.7K ohm pull up to +3.3V_RUN
Change net name from SC_DET# to SC_DET
52
HW Compal
37,42 09/03/2007 Change net name Change net name from SNIFFER_GREEN# to SNIFFER_BLUE# X0253
HW Compal
09/03/200738 For vender request HOST_DEBUG_TX need to pull up R911 10k ohm to +3.3V_ALW51
CompalHW
For vender request Change D43 pin2 net name from R_WPAN_LED to WPAN_LED09/03/200742
Schematic issueCompal09/04/2007HW2154 Reserve Q19 & Q20
55
C C
Add test pointCompal09/04/2007HW GNT2#/GPIO53, SUS_STAT#/LPCPD#, 22,24
BOM control add 4@ for China TPM09/04/2007 CompalHW2956 X02Change C484-C486, R381, R383, R893, U24 to 4@
57 Add test pointCompal09/04/2007HW31,36 X02UDIO1, UDIO2, UDIO5, RI_OUT#/PME#, FIL0, MDIO1,MDIO2,
MDIO5,MDIO6, MDIO18, MDIO19, SC_FCB_ENB
58 Change net nameCompal09/04/2007HW X02
60
61 18
37
37 DELL For customer request
18
HW
HW
09/04/2007HW Change @R788 pull up from +3.3V_ALW to +3.3V_RUN X0259
09/04/2007
09/04/2007
Compal
Compal
For vender request Add @R914 pull up to +3.3V_ALW X02
Add net name Add net name for +RTC_CELL_R U3 pin 21 X02
Change TS_TXD_BUF to TSRX_ECTX_BUF, TS_RXD to TSTX_ECRX,
TS_TXD to TSRX_ECTX, TS_RXD_BUF to TSTX_ECRX_BUF
Solution Description Rev.Page# Tit le
X0248
X02
X02
X02
X02
X02
X02
Request
Change 1394 connector from 5 pin to 6 pin X02Add pin 1 to GNDCompal09/05/2007HW62 31
B B
2763
Change U17 net name adn update U17 symbol for output pinCompal09/05/2007HW X02
Change DAI_BCLK to DAI_BCLK#, DAI_LRCK to DAI_LRCK#
DAI_DO to DAI_DO#, DAI 12MHZ to DAI_12MHZ#, I2S_DI to
I2S_DI# and update U17 symbol
For vender requestIntel09/05/2007HW2964 X02
JTAG_TDO_LAN add @R889 pull down to GND, JTAG_TDI_LAN
add @R890, JTAG_TMS_LAN add @R915, JTAG_TCK_LAN add
@R916 pull up to +3.3V_LAN, JTAG_TRST_+LAN add @R891
pull down to GND
For vender request09/06/2007 IntelHW Change R57 from 22.6 ohm to 1K ohm X0265 07
66 Follow DELL issue item SCH161967 System DP off circuit.09/06/2007HW Compal21 X02
Add U62, @R917, @R918,R919,C0141, and change R189 from
pull down to pull up +3.3V_RUN, connect DP_MUX_PD# from
U9 pin30 to U62 pin 1 and change DP_MUX_PD# net name to
DP_MB_EN, connect DP_MB_HPD from U9 pin 40 to U62 pin2,
connect U62 pin 4 to U9 pin 40
Schematic issue Change C380 & C381 from 3900PF to 0.1uF X02Compal09/06/2007HW67 26
A A
68 36,37 HW 09/06/2007 Compal X02
Disable USH TPM & enable China TPM
Stuff R841,R474,R892,R893 and no-stuff
R483,R464,R466,R788,@R750,@R723,@R724,@R732,@R733
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Changed-List History
LA-3801P
53 66Th u r s d ay, June 12, 2008
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0.8
of
Page 54
5
4
Version Change List ( P. I. R. List )
3
2
1
Item Issue DescriptionDate
D D
69
37,38
39,40
41
70 27,37 HW 1. Rename DOCK_MIC_DET# to DOCK_MIC_DET
C C
HW24,33
09/08/2007 Compal Rename net name X02
Owner
Follow M09 GPIO Map_0907DELL09/08/2007 X02
1. Change MEC5035 pin43(GPIO52) from SIO_EC_SCI2# to SIO_EXT_SCI#
and contact to ICH9M pinC12(GPIO12) and pinAG19(GPIO1)
2. Remove MEC5035 pin66(GPIO100/nEC_SCI) off-page
3. Change ICH9M pinAH21(GPIO6) form SIO_EC_SCI2# to TPM_ID and
add pull-down of R922 for China TPM(4@), stuff R273 for USH
TPM(5@) and change to 100K
4. Change ICH9M pinC21(GPIO13) from ENERGY_DET# to
CONTACTLESS_DET# and change R822 from 20K to 100K.Remove ECE1088
pin10 and R910.
5. Change CELL_CHARGER_DET# from MEC5035 pin126(VCI_IN1#) to
ECE5028 pin78(GPIOB6)
6. Rename MEC5036 pin126(VCI_IN1#) from CELL_CHARGER_DET# to
EN_CELL_CHARGER_DET# and contact to U53 pin3,4
7. Rename USB_CHARGER_PWR_EN# to ESATA_USB_PWR_EN# and contact to
U29 pin3,4 and add pull-up 100K of R923 to +3.3V_ALW
8. Remove ECE5028 pin82 off-page for DELL_ESATA_PWR_EN#
9. Change MEC5035 pin42(GPIO051) from 3.3V_SUS_ON to SUS_ON and
remove pin34(GPIO041) from SUS_ON to NC
10. Remove MEC5035 pin118(BGPO0) to NC
2. Rename DOCK_HP_DET# to DOCK_HP_DET
71 14 HW 09/10/2007 DELL For DELL EE work item: SCH162351 No stuff C746,C747 X02
72 24 HW 09/10/2007 Compal Change SPI ROM P/N Change U12,U13 to SA00001OZ0L X02
73 09/11/200733,37,38 HW DELL ESATA USB charger control signal issue
24 HW DELL Follow DELL request Remove SIO_EXT_SCI# on ICH9M pinC12(GPIO12) and U36
09/11/2007
1. Add serial resitor of R928 for CELL_CHARGER_DET# and R927,C1042
for EN_CELL_CHARGER_DET# and wire-and contact to JESA1 pin16.
2. Change U29 pin3,4 from ESATA_USB_PWR_EN# to DELL_ESATA_PWR_EN#
3. Change U53 pin3,4 from N_CELL_CHARGER_DET# to ESATA_USB_PWR_EN#
pin43(GPIO052) and contact from ICH9M pinAG19(GPIO1) to U36
pin66(GPIO100)
75 10,16
17,18
HW DELL
09/11/2007 Follow DELL request for PM_EXTTS#
Add serial resistor of R926 from U3 pin13 contact to U2
pinN33,P32 and remove trace of PM_EXTTS#[0,1] contact to DIMM
76 23,24 HW 09/11/2007 Compal Aviod leakage issue 1. Change SIO_EXT_SCI# pull-up from +3.3V_ALW_ICH to +3.3V_RUN
B B
2. Change TPM_ID pull-up from +3.3V_ALW_ICH to +3.3V_RUN
3. Change SNIFFER_DET# pull-up from +3.3V_ALW_ICH to +3.3V_RUN
4. Change IO_LOOP from +3.3V_RUN to +3.3V_ALW_ICH
5. Change RTC_BAT_DET# from +3.3V_ALW_ICH to +3.3V_RUN
6. Change ROUSH_PAID_TS_DET# from +3.3V_RUN to +3.3V_ALW_ICH
77 37 HW 09/11/2007 Compal
78 36 HW 09/11/2007 Broadcom Follow vendor request for use smard card
Add pull-up resistor for DELL_ESATA_PWR_EN#
initial
controller of 73S8009CN
Add pull-up resistor of R929 to pull-up +3.3V_ALW
1. Contact of GPIO14_TER_ON/OFF from U33 pin24 to U32 pinC4
2. Contact AUX1UC from U33 pin2 to U32 pinJ14
3. Contact AUX2UC from U33 pin3 to U32 pinJ15
4. Stuff R768,R769,R490
5. Change netname from GPIO1_TER_ON/OFF to UART_TX/GPIO1
09/11/2007 Compal ECE1088 & JCS1 de-pop option3979 HW X02De-pop U38, C676, C677, R650, R826, JCS1
Solution Description Rev.Page# Tit le
X02
X0274
X02
X02
X02
X02
Request
Change EMC4002 part number From SA00001PYL for rev.B to SA00001PY1L for rev.CHW 09/11/2007 Compal1880 X02
A A
09/11/2007HW10,2781
change @R685 from 33 ohm to 0 ohm, R85 de-pop, @R330
from 0 ohm to 10K ohm
X02Compal For vender request
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Changed-List History
LA-3801P
54 66T h u r s da y, June 12, 2008
1
0.8
of
Page 55
5
4
Version Change List ( P. I. R. List )
3
2
1
Item Issue DescriptionDate
D D
82 Change R574, C242 part number, and C604 de-pop
Owner
Compal38,19,27 09/13/2007HW
Change from 1M ohm to 100K ohm, C242 from .1u 16V to .1u 25V,
C604 to @C604
For vender requestCompal09/13/2007HW83 07 X03
Change R62, R64, R67, R65, R66 from 51 ohm to 56 ohm
R912 to @R912
SCH162577: Populate pull-down on ICH_LAN_RST#Dell09/14/2007ICH9M2484 Populate R276, No Pop R271 X03
85 ICH9M 09/14/2007 Dell SCH161941: USH and China TPM Pop Options29
Dell09/14/2007ICH9M2986
SCH162277: GPIO for China TPM vs. USH TPM Follow the new GPIO map to implement China TPM ID strap X03
Chane the text in the table to show that it
R892 is connect to pin China TPM pin 28
Depop R466Follow TPM Option Table on page 29.Dell09/14/2007USH3687 X03
EC 09/19/2007 Dell SCH162762: No Stuff U37 - Flash ROM on the EC Depop U37, C672, R589, R590, R591, R592, R59388 38
Changed the value of R908 to 1 k ohm SCH162766: Need to change the value of R908Dell09/19/2007ICH2389 X03
C C
10/09/2007
Updated
09/19/2007 No pop R740, R741, and R742
93 10 MCH X03
09/19/2007 Dell
Dell
Dell3492 MiniCard X03
SCH162826: Connect the ICH9 GPIO12 to the
Intel LOM LAN_DISABLE_N
SCH162827: No pop the 0 Ohm resistors that
connect the USB and PCIE mini-card detects
SCH162822: Remove one of the two pull-ups on
PM_EXTTS#
94 19, 37 LVDS/5028 09/27/2007 Dell SCH162824: Add load switch for the camera power X03
Dell09/27/2007 X03
97
B B
Dell Changed C434, C435 size to 080528 Amplifier 09/29/2007 SCH162939: C434 and C435 can be reduced to 080598 X03
SCH162926: Need to add 100k pull down to
DPC_CA_DE
SCH163185: Add ESD discharge parts for the Dock
Power pins
SOT353 and SC70 footprint are the same package90 21, 38 ICH 09/19/2007 Dell SCH162800: Check U57 and U62 for packages X03
Removed U58. Added R1008.91 24,29,37 ICH/LOM
Removed R85 and changed netname from PM_EXTTS#0/#1 to
PM_EXTTS#
Removed D4 and Added C1043, C1044, Q132, Q133, R995.
Use GPIOB4 on the 5028 for CCD_OFF .
Added R996DP2195
Added D64, D65 (Nostuff)Compal09/29/2007Docking35 X03
Solution Description Rev.Page# Tit le
X03
X03
X03
X03
X03SCH162888: Remove the cap on DAI_12MHZ# Removed C604Dell09/27/2007Audio2796
Request
Changed R529 stuff. R534 nostuff.Change BID to X00 (011)Dell X0310/02/2007SIO3799
SCH163294: USH strapping option
resitor missing in Roush
SCH163380: Populate the PCIE MCARD Detect 100k
pull-ups, and move R266 to page 34
SCH161770: LED Circuit Changes
SCH163409: Populate D64 and D65
(ESD Diodes on +DOCK_PWR_BAR)
SCH163535: DOCK_SMB_CLK and DOCK_SMB_DAT
pulled up resistor to +3.3V_ALW
Changed R479 pull-up and R478 pull-down.
Populate:R439, R449 (Change from 8.2k to 100k), R458.
Move R266 from page 24 to page 34
Added:R999~R1006. Q136, Q137. Q139~Q145, U65.
Removed: D44, D60, D62.
D64, D65 changed to stuff.103 35 Docking 10/04/2007 Compal X03
Change R565 and R567 from +5V_ALW to +3.3V_ALW5,38
X0310/05/2007104
102 37,42 LED
10/09/2007
Updated
Dell10/02/2007USH36100 X03
Dell10/03/2007Minicard24,34101 X03
Dell X03
DellEC
X03Compal Nostuff D5, D6, D7 SCH163503: Nostuff ESD Diodes10/05/2007Video105 X0320
A A
SCH163465: Change Netname following 1003 GPIO MapDell10/05/2007EC X0333, 37106
Rename GPIOB2 pin 82 from DELL_ESATA_PWR_EN# to
USB_CHARGER_PWR_EN# for clarification
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Changed-List History
LA-3801P
55 66Th u r s d ay, June 12, 2008
1
0.8
of
Page 56
5
4
Version Change List ( P. I. R. List )
3
2
1
Item Issue DescriptionDate
D D
107 SCH163524: Need to change SNIFFER_DET# connectionDell
10/09/2007ICH,SIO24,37
108
109 33 USB 10/26/2007
Updated
Owner
Disconnect SNIFFER_DET# from ICH pin AE18 and connect it to
Compal10/11/2007USH36
SCH163437: Teridian Feedback: Make sure Inductor
has max rated current 400mA on pin 27
Compal SCH163706: Charge USB Circuit Update 1. JESA1 pin1 change to +5V_ESATA and pin5 change to +5V_CHGUSB
EC5028 pin 33. Rename, SNIFFER_DET# to PWR_BTN_BD_DET#
L69 change to 1210 size to support max 400mA
2. JESA1 pin2,3 change to USBP3_D-,USBP3_D+ and pin6,7 change
to USBP2_D-_SW, USBP2_D+_SW
110
38 EC 10/17/2007 Compal SCH163795: Follow M09 GPIO_100307 MAP to modify
scheamtic
1.Add R85,C918 for RC_ID
2.Remove DEBUG_ENABLE# and connect HOST_DEBUG_RX from U36
pin71 to R577 pin2
3.Remove ADAPT_TRIP_SET on U35 pin70 and PR169 Pin1
23, 29,
36, 38
USH,EC
10/30/2007ICH, LOM,
SCH164314: Crystal CL Caps Changes (UMA Only)Compal111
1. C297, C475, C476, C608 changed to 12pF
2. C609 changed to 15pF
3. C515 changed to 22pF
4. C514, C675 changed to 27pF
38112 1. Changed MEC5035 pin30 to SUSPWROK ( Host RX is used) R553 del
C C
Dell10/30/2007EC
SCH163795: Follow M09 GPIO_100307 MAP to modify
scheamtic
2. Changed MEC5035 pin19 from SUSPWROK to RC_ID
3. RSVD Pin 70 GPIOC5 / ACK# ADAPT_TRIP_SEL
4. RSVD Pin 71 GPIOC6 / ERROR# ITP_DBRESET#(RSVD) / LCD_TST
Dell10/31/2007SIO
SCH164408: GPIO Map Update (1025)37113
1. Added MDC_RST_DIS# to GPIOE5/DTR# (Del R489, R830)
2. Changed pin 82 from USB_CHARGER_PWR_EN# to ESATA_USB_PWR_EN#
3. Change pin 104 from ESATA_USB_PWR_EN# to USB_POWERSHARE_PWR_EN#
114 28 Amplifier
11/01/2007 Dell SCH164416: Line out and Line In THD+N Failures
reqire cap changes
SCH163782: Remove options for TV on UMADell11/01/2007GMCH,CRT12,20115
Changes need to be made to the Line Out series
Capacitors C436 & C437 from 1uF 1206 to 2.2uF 1206
Disconnect TV_CVBS, TV_Y and TV_C from U4, and connect each to a
75 ohm resistor to ground. Removed R669, R762, R763. Make pins
7B1, 8B1, 9B1, 7B2, 8B2, and 9B2 NC at U4
Dell11/01/2007Thremal18,41116
Follow Maybach circuit. SCH162207: Issue to track the power rail for the
EMC4002
Compal11/06/2007 X03Added C1045. Changed U54 footprint.USB33117
SCH164452: USB Switch Footprint Changed for
Multiple Sources Support
118
B B
119
37
18
SIO
Thremal
11/07/2007
11/07/2007
Dell
Dell
SCH164730: MDC_RST Connection Changed per GPIO
Map (1105)
TASK162399: Need to contact SMSC about Guardian
ECE5028
Moved MDC_RST from pin 84 GPIOE5/DTR# to Pin 102 GPIOA5
Changed R142 from 22 to 0 Ohm.
errata
120
10
GMCH
11/07/2007
Dell
TASK162887: Add level shifter from 3.3V to
Added U66, U67, C1046, C1047, C1048, C1049. Stuff R243~R246.
1.5V for MCH HDA
Dell11/08/2007Docking35121 X03Assign Pin 41 of the docking connector for NBDOCK_DC_IN_SS
SCH164795: Docking Pin Out Change to Support
Battery Slice
SCH164770: Change CAP/NUM/SCRL LEDs to +5V_ALWDell11/08/2007 X03Change the 3x LED power rail to +5V_ALW instead of +5V_RUNLED42122
Compal11/09/2007LAN30123 Removed MDI termination R384~R391,C488~C491 X03
SCH164581: Remove termination resistor and
capacitor for LAN_TX[0..3]+/-
124 12,13 GMCH 11/09/2007 Dell SCH164856: Remove options for TV form Cantiga 1.Pin B24, A24 (VCCA_TV_DAC) – connect to motherboard ground plane
2.VCCD_TVDAC - – connect to motherboard ground plane
3.VCCD_QDAC – Connect to 1.5V with filter
4.TVA_DAC, TVB_DAC, TVC_DAC, TV_IRTN - connect to motherboard
ground plane
5.TV_DCONSEL - left as a no connect
A A
125 18 4002 11/12/2007 Dell SCH164877: EMC4002 POWER_SW# Input - Add AND Gate Added U68, R1014, R1015, C1050 X03
38126 X03SCH164893: Remove U37 (SPI ROM on EC)Dell11/12/2007EC Removed U37, R558, R589~R593, C672
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
Solution Description Rev.Page# T it le
X03
X03
X03
X03
X03
X03
X03
X03
X03
X03
X03
X03
X03
X03
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
Changed-List History
LA-3801P
56 66Th u r s d ay, June 12, 2008
1
0.8
of
Request
Page 57
5
4
Version Change List ( P. I. R. List )
3
2
1
Item Issue DescriptionDate
D D
Owner
Dell11/12/2007CLOCK,USH6,36127 X03Change R29 from 22 Ohm to 33 Ohm 5@ (ROW TPM PCI Clock)
SCH164896: PCI Clock BOM Options for ROW vs.
China TPM
Change R854 from 22 Ohm to 33 Ohm 4@ (China TPM PCI Clock)
Add R1016 (100k) pull-down 4@ on U32 pin M7
128
29,33,35 1. Add Q50, Q146, R1017~R1020
SCH164888: Add Intel LOM LDO for 2.65V/2.5VDell11/12/2007LOM,Docking X03
2. Remove R377, R380, Q46, C482,R377
129
SCH164889: Change L20-L27 from 36nH to 22nHDell11/12/2007LAN SW30 X03Change MDI bus value at L20~ L27 from 36nH to 22nH.
These changes will help improving the IEEE Return Loss margins
130
Compal11/12/2007USB33 X03
LAY164667: USB Switch Layout Changes following
Vendor's recommendation
Change Common mode choke connection to between switch and
connector.
131 21 DP 11/13/2007 Compal TASK163764: Input derating data before PT gerber 1. Applying voltage on ceramic capacitors: C772~ C775, C794, C1044
2. Applying current on inductor: L45, L46
3. Applying current on diode: D10
132 38 EC 11/13/2007 Dell SCH164928: Change Netnames Following Power
Circuit Changes
From "ACAV_IN_DOCK" to "ACAV_DOCK_SRC"
From "ACAV_IN_DOCK#" to "ACAV_DOCK_SRC#"
From "ACAV_IN_MB/DOCK" to"ACAV_IN"
Remove U59, C1012. Add U69, C1051.
C C
133 37 SIO Dell11/13/2007 DF174483: [SSI2]The LCD/LED will keep had
power with USB device when unplug AC & Battery
1) Add 100k no pop pull-ups to +3.3V_ALW2 on:
- USB_SIDE_EN#
- ESATA_USB_PWR_EN#
- USB_POWERSHARE_PWR_EN#
2) No stuff R502, R923, R929.
134 18 4002 11/14/2007 Dell SCH162823: Connect PWR_MON_GFX to VIN1 on the
EMC4002 - Depop the UL circuit
-Connect EMC4002 VCP2 to ISL88731 with a 4.7k series resistor
-Identify the values of R930 and R997
DellSIO37 X03change R658 from a no stuff pull-up to a populated pull-downSCH165017: Change PU to PD on SYS_LED_MASK#11/14/2007135
136 21 DP 11/14/2007 Dell SCH165016: Add UMA DP contingency pop options Add R1024, R1025, R1028~ R1033 X03
Dell11/14/2007108839 Remove U38 (ECE1088), C677, C676, R747, R650, R826, R557137
schematic
138 36 USH 11/15/2007 Dell SCH165076: Remove unnecessary Contactless
SmartCard components
139 24,33,36 USH,BIO,
ICH
B B
Dell11/15/2007 SCH165067: FP_RESET# signal from USH to
Fingerprint reader
140 37 SIO 11/15/2007 Dell SCH165068: Add FET buffer on signal INSTANT_ON_SW#
R495, R799, C777, R499, and C783 can be replaced with a
short, and R800 can be replaced with an open
1) Connect USH SMC_ADD_23 (Pin C3) to Fingerprint reader connector
JBIO1 pin5 with a 4.7K pull-up to +3.3V_RUN. R1034 added.
2) Remove BIO_DET# conncetion to the ICH9M pin A8
Add D66, R1035, R1036 X03
to 5028 pin 28
141 27,38 CODEC,EC 11/15/2007 Dell DF179111: SMBus EA some item measure fail X031.LCD_SMBCLK/LCD_SMBDAT change PU resistor of R548,R549 to 2.2K
2.DAI_SMBCLK/DAI_SMBDAT stuff R334,R335 to 2.2K
3.DOCK_SMB_CLK/DOCK_SMB_DAT change PU to +3.3V_ALW (R565, R567)
27,36 CODEC,USH 11/19/2007 Compal Some Crystal is not PSL parts. Y3, Y5 change to use KDS's crystal replace non-PSL part. X03142
143 10,22,27,
29,36
NB,SB,USH,
CODEC,LOM
11/21/2007 Compal Change chips new revision P/N for PT1 Change U2,U10,U16,U23,U32 P/N X03
SIO 11/20/2007 Dell Change BID to X04 (100)37 Change R531, R534, R535 stuff. R529, R530, R536 nostuff. X04144
145
34 JSIM1 footprint changeMini-Card 11/20/2007 Dell SIM card Footprint change per ME request X04
146 SPI 11/22/2007 Dell Unstuff 2nd SPI ROM for ICH Depop U13,R304,R305,R306,R308,R309,R295,C329 X0424
147
35 Docking 11/26/2007 Compal SCH165307: Docking Conn ESD Concern - Dock
Remove D65 & change D64 fooptint from SOD323-2 to SOT23-3 X04
Power pins
148 SPI 11/28/2007 Dell SCH165504: Remove 2nd SPI ROM for ICH X0424
149 Mini-Card34 11/28/2007 Compal SCH165319: PCIE_MCARD1_DET# pull-up to wrong
A A
11/29/2007EC SCH165505: X04: Add pop options to change
Compal38150 X04
power rail
INSTANT_ON_SW# from RTC to +3.3V_ALW Rail
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
Remove U13,R304,R305,R306,R307,R308,R309,R295,C329
No-stuff R439 and add 100K of R443 to pull-up +3.3V_ALW_ICH X04
Add 0ohm of R445,100K of R589. No-stuff R560,C1011,U57,D66, Pop
R1036
Solution Description Rev.Page# T it le
X03
X03
X03
X03-Disconnect PWR_MON_GFX from EMC4002 VCP2
X03SCH165024: Remove nostuff parts from Roush
X03
X03
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
Changed-List History
LA-3801P
57 66Th u r s d ay, June 12, 2008
1
0.8
of
Request
Page 58
5
4
Version Change List ( P. I. R. List )
3
2
1
Item Issue DescriptionDate
Owner
10 DP DELL SCH165547: UMA DP rework Change R181 to 4.02K,R672 to 976ohm151 X0412/10/2007
D D
152 30 LAN Switch 11/29/2007 DELL Swap LAN_TX[0..3]+/LAN_TX[0..3]-,SW_LAN_TX[0..3]+
LAY165172: LOM Feedback for X04 - Improve routing
on the MDI signals
/SW_LAN_TX[0..3]-,DOCK_LOM_TRD[0..3]+/DOCK_LOM_TRD[0..3]-
153 13 SCH165564: Remove D1,R122 from Intel request No-stuff D1,R122 from Intel request11/29/2007 CompalMCH X04
CPU154 No-stuff R63 X04
Compal11/30/20077
SCH165378: No-stuff H_RESET# pull-up resistor
of R63
21 11/30/2007
DP SCH165621: X04: Populate D10 with a 0 Ohm resistor155 Compal D10 PCB Footprint can't stuff 0805 or 1210 resistor
directly, so add 1210 0ohm of R210 and no-stuff D10.
156 DP Intel SCH165292: Follow Intel Proposal for DP
21 12/2/2007
interoperability
1. Add Q147 pin1,4 contact to SDVO_CTRLCLK,SDVO_CTRLDATA and
pin6,3 to DPB_AUX_SW,DPB_AUX#_SW contact to DP SW,pin2,5 contact
to U70.4
2. Add U70,C314. U70 pin5 conatct to +3.3V_RUN and C314. pin2
contact to U8 pin4
3. Conatct DPB_AUX#_C to pull-up,DPB_AUX_C to pull-down
4. Add Q148 pin1,4 contact to DDPC_CTRLCLK,DDPC_CTRLDATA and
pin6,3 to DPC_AUX_DOCK,DPC_AUX#_DOCK contact to Docking,pin2,5
contact to U71.4
C C
5. Add U71,C329. U71 pin5 conatct to +3.3V_RUN and C329. pin2
contact to U8 pin4
6. Conatct DPC_AUX#_C to pull-up,DPC_AUX_C to pull-down
157 36 USH 12/3/2007 Broadcom SCH165660: SC_DET issue from Broadcom highlight
SCH165765: Audio Feedback: Change 2 resistor
Change R818,R827 to 1K_0402_1%158 28 Amplifier 12/5/2007 DELL
values, Add two resistors on IO board
159 37,42 Change net name from WIRELESS_ON/OFF# to WIRELESS_ON#/OFF
Wireless 12/5/2007 DELL SCH165763: Change Wireless net name (on is
toward the user)
160 36 USH 12/6/2007 1.Depop R490,C591
Broadcom SCH165731: Follow Broadcom request to modify
Maybach schematic for USH
2.Pop R829 and depop R467
3.Depop R849
4.Change R476 to 5.1M ohm and R488 to 3.3M ohm
5.No-stuff C594
6.Change R473,R771 to 1K
7.Change C621,C706,C646 to X5R
B B
161 12 MCH 12/6/2007 Change R688 to 2.4K_0402_1%
Intel X04
SCH165516: Modify CRT_TVO_IREF(U2.pinE29),
LVDS_IBG(U2.pinC44) pull-down resistor value
SCH165882: Disable EMC4002 LDOSMSCEMC400218162
Add R211 and no-stuff R14912/7/2007 X04
Pop R102412/7/2007 X0418 DP DELL SCH165881: Populate R1024 for UMA DP163
164
18 12/7/2007 X04Codec Intel SCH165764: Change HDA buffers to Cantiga to be
bi-directional
Change U67 to FXL2SD106BQX of uni-direction to bi-direction and
delete U66,C1048,C1049. Add R89
Add D67 between Q97 and Q9812/7/2007 X04SCH165913: +5V_RUN backdrive issue on S3 modeCompal165 LED42
166 ECE5028 Compal INSTANT_ON_SW double pull-up X0437
12/8/2007 No-stuff R1035
12/8/2007 Add pull-up resistor of R295 to +3.3V_ALW_ICH and no-stuff167 LAN Intel29 SCH165970: Disable ICH GPIO12 of LAN_DISABLE to
control LAN PHY
10 DP168 Intel12/8/2007 X04
SCH165950: Intel request for DP function Change R180,R182,R183 to 4.02K
SCH165838: De-pop R1008 for control LAN PHY
De-pop R1008169 29 DP Compal12/8/2007 X04
enable form BIOS setting
Auido Codec27170 X04Change C408~C411 to 2.2U_10V_0805 X5R12/10/2007 IDT
SCH165972: Follow IDT request to change C408~C411
to 2.2uF
A A
171 31 12/10/2007 Ricoh X04Add C622,C1012,C1016,C1036,C1037,R1037,R799,R800
18,21,
37,38,42
Cardbus SCH165973: Follow Ricoh request to modify schematic
TTL 12/13/2007 Compal SCH166138: About 74AHCT1G08GW AND Gate issue172
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
No-stuff R684,R790,R657
Change U68, U62, U69, U57, and U65 from 74AHCT1G08GW to
74AHC1G08GW
Solution Description Rev.Page# Titl e
X04
X04
X04
X04Add R914 pull-down contact to SC_DET on JSC1 pin2 and no-stuff
X04
X04
X04
X04
X04
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
Changed-List History
LA-3801P
1
58 66T h u r s da y, June 12, 2008
0.8
of
Request
Page 59
5
4
Version Change List ( P. I. R. List )
3
2
1
Item Issue DescriptionDate
173 SCH165972: Follow IDT request to change C408~C411
D D
174 38 5035
27 Auido Codec 12/10/2007 Change C408~C411 to 2.2U_10V_0805 X5RIDT X04
12/14/2007 Dell TASK166116: Updated GPIO Map The signal ACAV_DOCK_SRC# can be removed from the 5035 X04
Owner
to 2.2uF
175 35 Docking 12/14/2007 Dell SCH166112: Add a pull-up on DOCK_DET# to +3.3V_ALW Add R1038. R124 nostuff. X04
LED42 X04Add Q150. R1039 nostuff.SCH166225: Add mask signal on NUM/SCRL/CAPS LEDsDell12/17/2007176
177
178
33, 38
USB,5035 X04
12/18/2007
Updated
Dell12/17/2007PHY29
Add D68, D69, R1040. Del R927. C1042 change value to 1uF.SCH166229: Update Cell charger detect circuitDell
PHY enable form BIOS setting
179 X04
6,8,10,24 CLOCK,CPU,
12/17/2007 Dell SCH166180: Intel NOA test point compliance Add R1041~R1045.
MCH, ICH
180 33 USB 12/17/2007 SCH166140: Add SATA repeater for ICH to ESATA
Dell Add U72, C488~C490, C1052, R305~R307.
trace over 5inch issue
181 31 RICOH 1.Connect totally 10uF bulk capacitor(s) to 1.5VOUT pins.
SCH165973: Follow Ricoh request to modify schematicDell12/18/2007 X04
2. Connect totally 10uF bulk capacitor(s) to AUXOUT pins.
3. Remove pull-up resistor from CPPE# signal.
4. Remove pull-up resistor from CPUSB# signal.
C C
5. SHDN#, apply NC/open
6. Remove pull-up resistor from SHDN#
7. Apply pull-down resistor to SPKROUT pin.
8. Add capacitors for CCD[2:1]#
9. Connect CADR22 to CPUSB# pin of ExpressCard Connector
10. Connect CDATA2 to PERST# pin of ExpressCard Connector
11. Add capacitor for FIL0, 0.01uF
35,38 5035,
Docking
183 18,33 4002,eSATA Dell12/19/2007
12/18/2007 Dell SCH166292: Add Dock changes for GPIO50 pin 41 of
the 5035
TASK166288: ESATA Redriver Questions X041. Using the Guardian LDO set to +1.8V for the VDD
Updated
Add R1046, C1053. 5035 GPIO50 connected to Docking pin 140. X04182
2. Changed power rail to +1.8V_RUN
3. Connected the enable to a pull-up to the same rail as VDD
4. Use PI2EQX3201B
5. No any 2nd source for this part
DellUSH36 X04Add R104812/19/2007184
SCH166328: Add a series resistor on PLTRST3# for
the USH RESET_N
B B
185 36 SCH166327:Add a no stuff diode in parallel w/ R464DellUSH Add D7012/19/2007 X04
LED42 X04Add C1058~C1061SCH166355: Add Bypass Capacitor for TTL gateCompal12/20/2007186
36 USH SCH166388:Change USH Circuit per Broadcom Feedback 1.Change R476 to 5.1M ohms and R488 to 3.3M ohms to lower
187 12/20/2007 Compal X04
2.Pop D70, C641, C647,C1020,C1021,R474,R829. Depop R464,R466,R467
188 Compal12/20/200721 DP Add R1060~R1067 pop option resistoes. X04
189
35 Add D71, R1068.SCH166399:Roush + Docking AC protect issue(crowbar)Dell12/20/2007Docking X04
SCH166397: DP Pop Options for UMA
190 13 MCH 12/21/2007 Compal Debug +3.3V_RUN backdrive issue on S3 mode Add R1076 X04
191 37 SIO 12/27/2007 DELL For Power change Media Slice issue Add D65,R1078 and reserve R1081 X04
192 21 DP 12/27/2007 Compal For DP & DVI can't work issue Change C271,C272,C273,C274 placement.Add R1060,R1061,R1064,R1065.
Reserve R1062,R1063,R1072,R1073,R1074,R1075
193 21 DP 12/27/2007 Compal For DP & DVI can't work issue Change C271,C272,C273,C274 placement.Add R1060,R1061,R1064,R1065.
Reserve R1062,R1063,R1072,R1073,R1074,R1075
194 33 ESATA 12/27/2007 DELL SCH166445: ESATA feedback on 3201 pin 11 and pin 12 Reserve R1056,R1057,R1066,R1067,R1069,R1070 X04
195 36 Broadcom 12/27/2007 DELL
SCH166428: Add a No Stuff series resistor between
Reserve R1071 X04
PLTRST3# and RST_N
Solution Description Rev.Page# Titl e
X04Pop R1008 because new BIOS fixed this softstrap issueSCH165838: De-pop R1008 for control LAN
X04
X04
X04
Request
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Changed-List History
LA-3801P
1
59 66T h u r s da y, June 12, 2008
0.8
of
Page 60
5
4
Version Change List ( P. I. R. List )
3
2
1
Item Issue DescriptionDate
Owner
196 All All 01/23/2008 Compal X05Update changes following PT2 MEMO Update changes following PT2 latest MEMO Rev.0.6
D D
197 37 SIO Dell01/23/2008 SCH166607: UMA X04 - No Stuff R1081 No Stuff R1081
7CPU
R67->27 ohm,R64->39 ohm,R66->649 ohm,R65->150 ohm, R57->124 ohm 198 01/23/2008 Dell SCH166740: X05 - Change ITP resistor values X05
199 36 SCH166962: Roush X05 - EA issue with USB to 5880 Dell01/23/2008USH Change R468 and R469 to 0 Ohms X05
200 33 USB SCH167262: X05 - Add 0 Ohm bypass resistors
Dell01/23/2008
Add R1082, R1083 X05
on U54 for USB port 2
DF192207: Power LED current over specLED42201 X05Change R1001 to 82 ohmCompal01/28/2008
DellUSH36202 X0501/28/2008
SCH167383: ROW TPM Disable Pop Options Make D70, and R841 = 5@ (pop for USH TPM)
Make R483 = 4@ (for China config)
DellEMC4002 X0501/29/200818203
Change R152 from 0 Ohm to 0.82 OhmSCH167478: Change R152 from 0 Ohm to 0.82 Ohm for
EMC4002 LDO Input
6204
Change L1 to BK2125HS601-TSCH167489: L1 Part Derating ProblemDellClock X0502/12/2008
Update
205
R849 must be pop-ed to support USH low power SCH167486: Smartcard Circuit UpdateCompal01/30/2008USH X0536
No stuff R1068.SCH167590: Docking Detection Circuit Update Compal01/31/2008Docking35206
Stuff R1058SCH167851: X05 - Pop R1058 for ESATA EADell02/12/2008eSATA33
C C
208 Add R1088 (no stuff)SCH167660: BOM option for Intel debugDell02/12/2008MCH10
209
210
212 X05Add R1089, R1090 resistors around C410 and C411.
CODEC 02/13/2008 Compal SCH168055: PC BEEP Circuit Update Nostuff R328. Change R327 and R828 to 499K27
No pop R1033, R1031, R1072, R1074. Populate R278, R1024SCH168270: More DP changes for UMADell02/19/2008DP21
02/19/2008CODEC SCH168158: SSM2602 Circuit UpdateDell27,28
Change C406 to 10uF cap to pin 20 of U15 2602
Change C436 and C437 from 2.2uF 1206 to 10uF 1206 (DF194434)
213 X05Populate JITP107 ITP 02/19/2008 Dell SCH168093: Populate JITP1 and Supporting Components
214 X05Add L71, L72, C1070, C1071
215
02/26/2008
Update
Broadcom feedback: Pi filterDell02/21/2008USH36
SCH168407: SSM2602 Circuit Review Feedback Dell27
Remove:C395
Add:L70, L71, C1066, C1067, C1068, C1069, R1091, R1092.
Value change:C391,C406,C397,C401,C408,C409,C410,C411,R340,R342.
Connection change:R1089, R1090, C396, C397, C398, R346, R347.
216
Add R1093, R1094. No stuff R594, R595.SCH168492: Touchpad Changes to fix backdriveDell02/27/2008TP39
SCH168407: SSM2602 Circuit Review Feedback ADI02/27/2008Audio27
Value change:C391,C406,C397,C401,C408,C409,C410,C411,R340,R342.
B B
218 SCH168596: Change SIM Card Connector Back
Compal02/27/2008SIM34 Changed JSIM1 to push-push type
Connection change:R1089, R1090, C396, C397, C398
to Push-Push Button Type
18,37,38
5035
220 X05X05Stuff R529. No stuff R534.BID ChnageCompal03/04/20085028
221 R1095~R1097(0 ohm) replace L8,L9,L10.
37
SCH167856: X05 - RGB Filter ChangeCompal03/04/2008CRT20
R153 change to 3.16K.
Add C1072. No stuff R900.
No stuff C255,C256 C257,C390,C518,C996.
222 X0503/04/2008DP21 Dell SCH168809: Add pull down to prevent floating input Add R1098. No stuff R185, R187
223 X05X0534 Mini-Card 03/07/2008 Dell SCH169083: Pop R840 for WIMAX LED support post RTS Populate R840.
225 X05
Compal03/10/2008CRT20226 X05
SCH167856: X05 - RGB Filter Change 1. Removed C255, C256, C257, C267 and C268.
Change R849=1.5k, and R913=300 OhmSCH169129: Smart Card InsertionDell03/10/2008 X05USH36
2. Change C390, C518 and C996 from 22pF to 10pF
3. Short L8, L9 and L10 (Replaced by R1095~R1097).
Solution Description Rev.Page# Titl e
X05
X05
X05207
X05
X05
X05
X05211 DP 02/19/200821 Dell SCH168269: Correction to meet DP spec Change R996 to 1 M ohm
X05
X05CODEC
X05
X05217 Add:L70, C1066, C1067, C1068, C1069
X05
X05219 SCH168546: SMSC ST Feedback for 4002/5028/5035SMSC03/04/20084002,5028,
X05
X05224 03/07/200833 USB Dell SCH169019: Pop R1082 & R1083 to bypass USB buffer Populate R1082 & R1083. No stuff U54.
X05
X05
Request
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Changed-List History
LA-3801P
1
60 66T h u r s da y, June 12, 2008
0.8
of
Page 61
5
4
Version Change List ( P. I. R. List )
3
2
1
Item Issue DescriptionDate
D D
Owner
2. Add SN74CBTD3306CPWR switches (U75~U78) to DDC lines.
3. Change R996 to 1 M ohm
4. Add a 1 M (R1098) pull down on U9 pin 39. Depop R185 and R187
5. Replace F1 with GEC 1206L150-C PTC.
6. Add a 10 uF cap (C1075) from +VDISPLAY_VCC to ground.
Dell03/10/2008 Add R1103~R1113ITP7228
229 Add 75 Ohm termination resistors on TV DACDell03/11/2008TV12 Add R1104~R1116
230 X056,23,24,
27,29,31,
35,37,38
231
RC
Termination
03/11/2008 Compal
Compal SCH169218: Remove Screw Hole and MiniCard Latchs Remove H8, JLAT2, JLAT334,42 MiniCard 03/11/2008
SCH169206: WWAN Noise Solution
-Add R527,R744,R418,R462,R588,R285,C656,C589,C517,C590,C673,
C318,C302,C300,C309
-Value Change R786, R379
Change Y1 Footprint from Y_1TJS125DJ4A420P_4P to Y_1TJE125DP1_2P
interfere.
233
ME 03/12/2008 Compal ME update ODD,PCMCIA connector footprint
Remove Hole & Mini card latch from ME request
234
C C
235
36 Follow Broadcom comment to modify circuit X05
SD card 03/12/2008 Ricoh SCH169273: Resolve SD_CLK under shoot issue
below from Ricoh request
RFID 03/12/2008 Broadcom SCH169256: Need to make changes to RFID schematic
Change JSATA1 Footprint to TYCO_2-1759838-8_13P_RV-T, JCBUS1
to MOLEX_48315-0012_68P_RT-T.Delete H8,JLAT2,JLAT3
Add C491 close to JSD1 pin831
connections
238
36 DAI 03/13/2008 ADI 1. U15 pin12 to GND and remove C396
2. Change C1066, C1067, C1068 and C1069 to 1nF
3. Change C408 and C409 to 1uf.
4. Change C410 and C411 to 0.22uF
5. Change R340 and R342, R1091 and R1092 to 200 Ohm
6. Change R1089 and R1090 to 10M.
239 35 Docking 03/13/2008 Compal DF193241: <ESD> Enhance ESD: Air discharge to
Add C672,C1076 close to JDOCK1 pin39,40
jack screw cause system hang-up
240 27 Auido 03/13/2008 Compal EMI team find had noise at 2MHz Reserve C676 on DMIC_CLK signal
241 24,37 SPI ROM 03/14/2008 DELL SCH169380: GPIO for Write Protect (WP#) for
SPI Flash
B B
242 36 SPI ROM 03/14/2008 Compal U34 component z-high interfere ME define Change package from SO8 to VFQFPN8
244 6 Clock 03/18/2008 Dell CLK_PCI_DOCK is shared with CLK_PCI_PCM. It
1.Add 2nd SPI ROM schematic
2.Add serial resistor and contact SPI_WP#_SEL signal from
U35.23 to U12.3,U13.3
Add R1117 no stuffSCH169447: 24.576MHz (X3) Crystal Circuit Update Compal03/17/2008CARDBUS31243
CLK_PCI_PCM change net from pin32 to pin33 of U1
does not follow the Roush PIG, and causes risk
for docking scenarios. (Roush gating list)
12,35 DP 03/20/2008 Dell245 Improve DP trace routing Remove D22,D23,D24,D25. Add C77 close to R105 X05
DAI27 04/01/2008 Compal Add R762,R763. Un-pop C418,C419,U18,U19246 X06
SCH169971: Add 0ohm between double inverter for
DAI function
36 Change ESD Diode package247 RFID 04/01/2008 Compal X06Change from BAS40-04_SOT23-3 to DA204U_SOT323-3
248 37 SCH170088: ICH LOM errata updateSIO 04/03/2008 DELL X061.PBAT_PRES# contact to U35 pin 97
2.LAN_DISABLE#_R contact to U35 pin88.
3.Add D38,C677 and no-stuff.R1008 change to 4.3K and no-stuff.
249 SCH170091: Add series 0603 zero ohm on
DPB_DOCK_HPD and DPC_DOCK_HPD_R.
Solution Description Rev.Page# Titl e
X05227 SCH168711:Modify circuit to comply to DP 1.1a specDell03/10/2008DP21 1. Depop R1033, R1031, R1032, R1030. Pop R278.
X05SCH168709: Issue to track ITP
X05
X05
X05
X05232 23 Crystal 03/12/2008 Compal ME add new z-high limit cause 32.768Khz material
X0526,32
X05
X05Follow DELL request to modify
X05
X05
X05
X05
X05
X05
X05
X0635 Docking 04/03/2008 DELL Add R387
X07250 36 USH 04/23/2008 Compal Add 3.3V_RUN discharge circuit for backdrive Stuff R625, Q79.
Request
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Changed-List History
LA-3801P
1
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Version Change List ( P. I. R. List )
3
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Item Issue DescriptionDate
D D
252
04/23/2008ICH24 X07
Owner
SCH170773: No Stuff 2nd SPI ROM (U13)Dell Depop U13, R304, R380, C395, R308, R309, R384, R1060,
Populate R298
253 36 USH 05/02/2008 Dell SCH170926: Broadcom Feedback Populate R705, R723, R724, R732, R733 X07
40 Power
Control
05/02/2008 Dell SCH170717: Power Sequence Check with Discharge
Circuit
Change R625 from 10 ohm to 39 ohm X07254
255 35 Docking 05/12/2008 Compal DOCK_DET# need not have pull down Depop R1068 X07
33 Pop U51DF216972: <ESD> Contact +/-6kv to FP cause system
Compal05/15/2008TP256 X07
lock-up
AUDIO27257
Remove R338. Add L78. Pop C676.SCH171755/DF216224: DMIC EMI failedCompal05/23/2008
Update
32 Express 05/15/2008 Compal DF216223: EMI radiation failed for express card Depop R791, R792. Pop L64.
259 10,23 MCH,ICH 05/27/2008
Compal SCH171954: PCIe Detect Issue Add Q153~Q155, R1118~R1125, C1049. X07
Update
260 40 SCH171795: Power Step on +3.3V_ALW_ICH railCompal05/23/2008Power C688 change value to 3300pF X07
261
262 X07
C C
USH36 C639 and C643 have to use X5R. L71,L72 change to 2%.SCH172075: RFID ImplementationCompal
06/04/2008
Update
SCH172103: No Stuff ITP clock resistors for X07 Dell05/29/20086 X07No stuff R18, R21.Clock
SCH170341: Sawtooth waveform on SERIRQ IssueCompal06/02/2008ICH24 X07
Add R1126263
SCH172191: Breath Power LED Resistor ChangeCompal06/02/2008LED42 Change value from 82 to 100 ohm (R1001)264 X07
265
Dell06/03/2008SIO37 X07266
Connect ODD_DET# to GPIO41 5035.34, ICH9.AE19, JSATA1.8SCH172185: Connect ODD_DET# to GPIO41 5035.34Dell06/03/2008EC38 X07
R504 change to 4.7K. Add PC266 (1500pF)SCH170391 (SLICE_BAT_PRES#)
L70 change value to 47UH_LBMF1608T470M_20%27 AUDIO 06/03/2008 Compal TASK169849: Regress Audio HP and Microphone test
Solution Description Rev.Page# Titl e
X07251 BID change to X07Compal04/23/2008SIO37 Depop R535, Populate R530
X07
X07258
X07267
Request
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Changed-List History
LA-3801P
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Version Change List ( P. I. R. List )
3
2
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Item Issue DescriptionDate
D D
1 X02
48 Charger 08/31 Saha ACAV_IN_NB will pull high
Title
Owner
Change PR145, PIN2 connection from +SDC_IN to +DC_IN
when DOCK adapter insert.
48/50 Charger
2
Selector
08/31 Saha ACAV_IN_DOCK# won't pull high
when battery only mode.
Change ACAV_IN_DOCK# pull high to +3.3V_ALW2
Add inverter for ACAV_IN_DOCK
PQ27 enable change to ACAV_IN_DOCK
Confirm HW delete U58 and R124 pull up to +RTC_CELL
3 43 +DC_IN DFX team suggest change
09/28 Saha
GND to PIN1 and PIN2
4 PWR Snubber 10/22 DELL request add a snubber circuit
Guangyong
DELL
on every regulator
PJPDC1 PIN1/PIN2 is -DCIN_JACK, PIN3 is DCIN_CBL_DET#
PIN4 NB_PSID, PIN5/PIN6 is +DCIN_JACK
Add below location of regulator switching node
+3.3V_ALW: PR276, PR251 +5V_ALW: PR277, PC245
+1.5V_RUN:PR278, PC246 +1.05V_M:PR279, PC246
+1.8V_SUS:PR280, PC249 +VCHGR:PR281, PC249
5 43 +DC_IN Add PR251 0_0402_5% before NB_AC_OFF for delay switch10/22 Guangyong
C C
DELL
6 49 ADP3209 10/22 Guangyong
DELL
Add a resistor around AC power
soft-start fet
Follow Maybach setting
PL19 change from 0.56uH_MPC1040LR56 to 0.88uH_MPC1040LR88C
PR239 change from 27K_0603_1% to 56K_0603_1%
PR231 change from 80.6K_0402_1% to 100K_0402_1%
7 43 +DC_IN 11/2 Compal DCIN_CBL_DET# damage ECE5028 Add ESD diedo PD13 DA204U_SOT323 at DCIN_CBL_DET#
Series PR67 1K_0402_5% between PJPDC1, PIN1 and DCIN_CBL_DET#
Parallel 0.47uF_0402_6.3V on DCIN_CBL_DET#
8 48 Charger 11/2 Compal NB DC blocking MOSFET won't turn off
when Dock AC insert.
Add PQ44 RHU002N06 control NB DC blocking MOSFET.
Control singal is NB_AC_OFF
Series PR284 200K_0402_1% between PQ44, PIN1 and NB_AC_OFF
Add PD30 B540C parallel PQ34
Solution Description Rev.Page#
X02
X03
X03
X03
X03
X03
X03
Request
B B
509
Compal11/2Selector
PBATT DC blocking MOSFET won't turn off
when Docking AC insert.
It will cause Battery or adapter protect.
Add PD18 RB715F_SOT323, PD20 and PD19 RB751V_SOD323, PR329 100K_0402_5%
PR328 and PR327 47K_0402_5%, PR326 and PR325 240K_0402_5%
PQ40 2N7002DW-7-F_SOT363-6, PQ59 NTG6161PT1G_TSOP6
X03
Extra net name add +NBDOCK_DC_IN_SS from Docking connector
10 43 +DC_IN 11/2 Merle
DELL
Roush component and rework changes
for Dcoking test
PC5 change form 0.47uF_0805_25V to 0.1uF_0805_25V
PR16 change form 240K_0402_5% to 1M_0402_5%
PR21 change form 47K_0402_1% to 220K_0402_5%
X03
PR22 change form 47K_0402_1% to 22K_0402_5%
PR283 change form 0_0402_1% to 100K_0402_5%
11 43 +DC_IN 11/8 Compal Battery slice need detect
NB battery is insert or not.
12 49 Selector NB_AC_OFF_BJT can't turn off
11/8 Compal
when Dock adapter exist
A A
13 48 Charger 11/8 Charger of ISL88731 will turn off
Add PQ61 NTR4502PT1G, and PD32 RB751_SOD323
Connect to DOCK_SMB_ALERT# and SLICE_BAT_PRES#
NB_AC_OFF_BJT control by NB_AC_OFF
Add LM393 to replace ISL88731 ACOK function(PU11B) X03Compal
X03
X03Change PQ39 to PQ61A/B (2N7002DW-7-F),
When ACIN is no power
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
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Changed-List History 1
Size Document Number Rev
Custom
Date: Sheet
LA-3801P
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Item Issue DescriptionDate
D D
14 X03
16 Charger
48 Charger 11/09 Merle
43 No pop PD13, PR67 and PC254.
48
50
48 X03Merle
Title
Selector
Owner
Dell
11/09+DC_IN X0315
Kyle
DELL
11/12 X03Merle
DELL
11/12Charger17 Remove PR337, Change PR145 from +DC_IN to +SDC_IN.
DELL
through the DOCK_DCIN_IS+ and -
No pop PD13, PR67 and PC254.
Reduce mass build risk
A global signal name change
for all notebooks
Add pull up resistor at PU11.7.to +3.3V_ALW
Change signal name at Node PR157.1
from "ACAV_IN_NB" to "ACAV_IN"
+PWR_SRC exist on Docking connector
Add PQ62 NTGD4161PT1G series DOCK_DCIN_IS+ and Add PQ63 RHU002N06 to control PQ62 on/off
From "ACAV_IN_DOCK" to "ACAV_DOCK_SRC"
From "ACAV_IN_DOCK#" to "ACAV_DOCK_SRC#"
Pop PR145 and PR156, change PR157 net name from ACAV_IN_NB to ACAV_IN.
Add PR341 100K_0402 pull up +3.3V_ALW at PU11B output.
Show PR156 as a stuff.
18 48 11/15Charger EE
DELL
C C
19 43 X03NB and Dock adapter swap issue+DC_IN 11/22 Merle
DELL
20 48 Charger 11/30 Greg
SCH165050: Validate EMC4002 VIN1/VCP1/VCP2
Depop UL circuit. X03
for UMA & Discrete for PT1 SMT
PR21 change to 1M_0402_5%
PC5 change to 0.022uF_0805_50V
Comparator Circuit for E-Dock X04PC256 change from 100pF to 0.1uF
DELL
21 50 Selector 11/30 Merle
DELL
22 49 ADP3209
NB_CORE
12/05 Guangyong
DELL
PBATT back drive to Battery Slice
vias charger high side MOSFET
Modify ADP3209 schematic
Follow ADI suggestion
Use PBATT_OFF control PQ64 to switch PQ65
Remove PR222
Reserve PC258 and PC259 10uF_0805_6.3V
Populate PR224
Change PR239 form 56K_0603_1% to 75K_0603_1%
Change PR238 form 140K_0402_1% to 165K_0402_1%
Change PC219 form 2200p_0402_50V to 1800p_0402_50V
B B
23 12/05 Doug
DELL
PJPDC1 change to 7pin connector X0443 +DC_IN PJPDC1 change to MOLEX_87437-0763_7P-T
Change PC67 to 0_0402_5% and populate
Solution Description Rev.Page#
X04Add PQ65 between PBATT+ and +VCHGR
X04
Request
24 43 12/07 AJ
P-MOS Vgs too high X04+DC_IN PQ61 change to FDN338P_NL
Compal
25 48 Charger 12/10 Guangyong
DELL
Modify Charger schematic
Follow Intersil suggestion
Add PD33 BAT54CW_SOT323, +DOCK_PWR_BAR/+DC_IN_SS
Reserve PR356 0_0402_5% form +SDC_IN to PU10 PIN22
X04
Add PR354 10_0402_1% to CSSP, PR355 10_0402_1% to CSON
Add PC260 0.1U_0603_25V to CSSN, PC261 0.1U_0603_25V to CSOP
PC143 and PC166 change to 0.1U_0402_10V
PR161 change to 100_040_5%
26 50 12/10 AJ
PBATT_OFF connect to DOCK_AC_OFF X04Selector Add PD34 RB751V-40
Compal
A A
27 47 12/19 Saha
INTEL CPA line need adjust+VCORE PR131 change to 9.76K_0402_1% X04
Compal
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Changed-List History 1
Size Document Number Rev
Custom
Date: Sheet
LA-3801P
64 66T h u r s da y, June 12, 2008
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0.8
Page 65
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Item Issue DescriptionDate
D D
28 50 Selector 12/20 Merle
29 48 Charger 12/21 Merle
Owner
DELL
Hot dock issue, adapter crowber Add PR357 330K_0402 form +DOCK_PWR_BAR to GND.
Add PQ66 RHU002N06 parallel PQ43, series PR358 0_0402 to EN_DOCK_PWR_BAR#
Charger Isense MOSFET timing change PC142 change to 0.047u_0603_25V X04
DELL
30 50 Selector 12/26 AJ
Compal
31 48 Charger 1/25 Guangyong
DELL
32 47 +VCORE 1/25 Guangyong
Charger for Battery Slice
Change PQ63 to 2N7002DW
Add PR360 0_0402_5% between PQ63 and SLICE_BAT_PRES
Change ACAV_IN_NB pull high voltage Add PR362 100K_0402_5% form PU11B out pull high to ISL88731_VREF
De-pop PR341
Change VCORE OCSET Change PR117 form 11.5K to 12.7K_0402_1% X05
DELL
33 50 Selector 2/12 Merle
C C
DELL
34 48 Charger 2/25 Power
Compal
35 47/48 CPU_CORE
Charger
3/6 EMI
Compal
36 All power 3/6 WWAN
Compal
37 50 Seletor
3/6 Power
Fix BITS CR196131 and CR196130
Change Charger sunbber resistor size
form 0805 to 1206.
To solve CPU_CORE and Charger BB noise Add Bead PL21 on PJP33, Pop PL12 X05
Change all power rail snubber resistor
form 0805 to 1206 size.
Fix Battery slice discharge issue Change PR260 from 240K to 620K, PR261 from 47K to 33
Compal
Add PR363 1K_1206 and PC262 1U_0603_25V from +NBDOCK_DC_IN_SS to ground
Add PD35 RB751S40T1_SOD523-2 from NB_AC_OFF# to ACAV_IN_NB
Change PR281 from 4.7_0805 to 4.7_1206 X05
Change all power rail snubber resistor
form 0805 to 1206 size.
PQ55 from IMD2AT to 2N7002DW
Add PR364 390K, PR365 390K, PD36 RB751S40T1, PC263 1U_0603.
Solution Description Rev.Page# Titl e
X04
X04
X05
X05
X05
X05
Request
38 47 CPU_CORE 3/7 EMI
B B
PWR
3/17All PWR39
Compal
Compal
To solve CPU_CORE and Charger BB noise Add PC264 680p_0402 and PC265 470p_0402 at PL12 +PWR_SRC X05
Pop +3.3V, +5V, +1.05V, +1.5V, +1.8V, VGFX_CORE snubber
X05Plastic palmrest logic up BB noise solutionEMI
R=2.2_1206 C=1000pF_0603
Pop VGH snubber
R=4.7_1206 C=1000pF_0603
Change +3.3V, +1.05V, VGH and VCORE boot resistor
PR37=2.2_0603 PR62=2.2_0603 PR155=2.2_0603
PR87, PR98, PR121 change to 2.2_0603
Pop PC155=3300pF and PC154=220pF
49 Change PR239 from 75K_0603 to 68.1K_060340 ADP3209 3/17 Intel
VGFX DC load line slope change to -7.5mOhm X05
Compal
A A
41 48 Charger
5/9
Elick
Compal
populate ADAPT_OC function(90W setting)
Pop PR167,PR166,PR171,PR172,PC168,PC169,PC170,PC171,PC172,PR164,PR168
,PC167,PR165,PQ33
un-pop PR170
X07
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Changed-List History 1
Size Document Number Rev
Custom
Date: Sheet
LA-3801P
65 66T h u r s da y, June 12, 2008
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of
0.8
Page 66
5
4
Version Change List ( P. I. R. List )
3
2
1
Item Issue DescriptionDate
D D
C C
42 48 Charger 5/21
43 47 V-CORE 5/21
44 DC-IN43 6/3
45 50 Selector 6/5
46 48 Charger 6/5
47 48 Charger 6/5
Owner
Merle
DELL
Elick
Compal
Elick
Compal
Elick
Compal
Elick
Compal
Elick
Compal
Reduce delay time between NB adapter removal
and ACAV_IN_NB de-assert from 1.6mS to~400uS.
Add 33K as a reservation on pin2 of 8791 (CPU
driver all 3 phases) for Maxim V_CORE solution.
Glitch issue on SLICE_BAT_PRES#
Reserve a pull high resistor between +3.3V_ALW2
and SLICE_BAT_PRES#
Un-pop ADAPT_OC function.
Reserve a 0402 size capcitor between NB_AC_OFF#
to GND
change PC256 from .1uF to 100pF.
change PR175 from 100K to 24K.
Add un-pop PR366(33K 0402) between pin2 of PU6 and GND.
Add un-pop PR367(33K 0402) between pin2 of PU8 and GND.
Add un-pop PR368(33K 0402) between pin2 of PU9 and GND.
Add PC266:SE074152K8L(S CER CAP 1500P 50V +-10% X7R 0402)
between pin2 of PQ61 and GND.
Add un-pop PR369:SD02847018L(S RES 1/16W 4.7K +-5% 0402)
between +3.3V_ALW2 and PQ40B.5.
un-Pop PR167,PR166,PR171,PR172,PC168,PC169,PC170,PC171,
PC172,PR164,PR168,PC167,PR165,PQ33
populate PR170:SD02810018L(S RES 1/16W 1K +-5% 0402)
Add un-pop PC267 0402 size between PQ35.2 to GND.
Solution Description Rev.Page# Titl e
X07
X07
X07
X07
X07
X07
Request
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Changed-List History
LA-3801P
1
66 66T h u r s da y, June 12, 2008
0.8
of
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