COMPAL LA-9631P, G490 Schematics

A

1 1

B

C

D

E

Compal Confidential

2 2

Gx00/Gx00 DIS M/B Schematics Document

Intel Ivy Bridge Processor with DDRIII + Panther Point PCH

AMD Mars XT / SUN Pro

2013-02-27

3 3

LA-9631P

REV:1.0

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

A

B

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

LA-9631P

E

1 60Wednesday, February 27, 2013

1.0

A

B

C

D

E

Compal confidential

Project Name : VIWGP (14") / VIWGR (15")

Chief River

1 1

AMD MARS XT M2 128 bits / SUN PRO M2 64 bits

VRAM 512MB/1GB/2GB MARS XT : DDR3 x 8 SUN PRO : DDR3 x 4

Page 23~32

PEG 8x Gen2 / Gen3

Intel Processor Ivy Bridge

rPGA989

37.5mm x 37.5mm

Page 5~11

Memory Bus Dual Channel

DDR3



DDR3 DDR3

1600MHz



1333MHz



1066MHz

204pin DDRIII-SO-DIMM X2

BANK 0, 1, 2

Page 12, 13

FDI *8

2.7GT/s

2 2

LVDS Conn.

Page 33

HDMI Conn.

Page 35

CRT Conn.

Page 34

Intel

DMI2 *4 5GT/s

USB30 x2

USB20 x6

Left USB3.0 x2

USB30 Port 0,1

Page 45

Touch Screen

USB20 Port 2

Page 45

Right USB2.0

USB20 Port 9

Card Reader

Realtek RTS5170

USB20 Port 11

Page 45

page 28

Int. Camera

USB20 Port 3

Page 33

PCH

Page 43

HDD Conn.

SATA Port 0

Page 40

ODD Conn.

SATA Port 2

Audio Codec

CONEXANT CX20757

Page 40

Page 41

Int. MIC Conn.

Page 41

Int. KBD

Page 43

D

Int. Speaker Conn.

Page 41

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Audio Combo Jacks

HP & MIC

MB Block Diagram

LA-9631P

E

2 60Wednesday, February 27, 2013

Page 41

1.0

RJ45 Conn.

Page 38

LAN

PCIe Port 0

Atheros AR8162/QCA8172(10/100)

Page 37

PCIe x1

Panther Point

FCBGA 989Balls 25mm x 25mm

3 3

PCIe Mini Card WLAN

PCIe Port 1

Page 36

PCIe x1

Page 14~22

SATA Gen3

SATA

AZALIA

Sub-borad

15" 14"

Power/B

(LID)

4 4

LS9631

USB/B

LS9632 LS9634

IO/B

(Card Reader) (LED, LID)

LS9633

ODD/B

Switch/B

A

LS9635

B

www.laptopfix.vn

SPI ROM

2MB + 4MB

Page 14

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

EC

ENE KB9012

Page 42

Thermal Sensor

C

Page 39

2011/06/15 2012/07/11

Touch Pad

Compal Secret Data

Deciphered Date

A

B

C

D

E

Voltage Rails

+5VS

power

State

S0

S3

S5 S4/AC

plane

Address

0001 011x

1010 000x A0h

1010 010x A4h

+B

O

X

+5VALW

+3VALW

O

X

X X X

+1.5V

O

X X

X

EC SM Bus2 address

Device

Thermal Sen sor

AMD-GPU SM Bus address

Device Address

Internal thermal sensor

1 1

2 2

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

EC SM Bus1 address

Device

Smart Battery

PCH SM Bus address

3 3

Device Address

DDR_JDIMM1

DDR_JDIMM2

+3VS

+1.5VS

+V1.05S_VCCP

+VCC_CORE

+VGA_CORE

+VCC_GFXCORE_AXG

+1.8VS

+0.75VS

+1.05VS

OO

X

Address

0100 1100

0100 0001 41h

BOARD ID Table

Board ID

0 1 2 3 4 5 6 7

USB Port Table

EHCI1

EHCI2

PCB Revision

0.1

USB 2.0 Port

UHCI0

UHCI1

UHCI2

UHCI3

UHCI4

UHCI5

UHCI6

0 1 2 3 4 5 6 7 8 9 10 11 12 13

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

Vcc R694

Board ID

0 1 2 3

SIGNAL

3.3V

100K +/- 1%

R695 V

0

12K +/- 1%

15K +/- 1%

20K +/- 1%

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

HIGH HIGH HIGH HIGH

Board ID / SKU ID Table for AD channel

AD_BID

0.347V 0.354V 0.360V

0.423V

0.541V

3 External USB Port

USB Port (Left Side) USB Port (Left Side)

USB3.0

Touch Screen Camera

USB Port (Right Side USB-BD) Mini Card(WLAN) Card Reader

LOW

LOW LOW LOW LOW

min

V

AD_BID

HIGH

LOWLOWLOW

typ

HIGHHIGHHIGH

HIGH

V

AD_BID

0 V 0 V 0 V

0.430V

0.550V

0.438V

0.559V

BOM Structure Table

VIWGP (14") 14@ VIWGR (15") 15@

LAN 10/100 8172@ LAN Switch mode SWR@ LAN LDO Mode LDO@

Camera CMOS@ HDMI HDMI@ PCH is HM76 PCH is HM70 PCH is NM70 VGA is Mars XT VGA is Sun Pro For VGA PX@ For VRAM and Strap

Item BOM Structure

ON

max

0x00 - 0x0B 0x0C - 0x1C

0x27 - 0x30

ON

OFF

EC AD

45@HDMI Logo 8162@LAN 10/100

GAS@LAN Gas tube

HM76@ HM70@ NM70@ Mars@ Sun@

X76@

ON ON

ON

OFF

MP PVT DVT0x1D - 0x26 EVT

LOW

OFF

For UMA Strap UMA@

MIC@Microphone

Touch Screen

SMBUS Control Table

X

XX

V

+3VS

X

Thermal Sensor

+3VS

B

SOURCE

SMB_EC_CK1 SMB_EC_DA1 SMB_EC_CK2 SMB_EC_DA2

4 4

PCH_SMBCLK PCH_SMBDATA PCH_SML0CLK PCH_SML0DATA SML1CLK SML1DATA

KB9012

+3VALW

KB9012

+3VS

PCH

+3VALW

PCH

+3VALW

PCH

+3VALW

VGA BATT KB9012 SODIMM

X V

+3VALW

V

+3VGS

X

V

+3VGS

A

X

+3VS

WLAN

X

V

+3VS

X

V

PCH

X

V

X

XX

V

X

V

+3VALW

X

Security Classification

Issued Date

XX X

www.laptopfix.vn

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

D

Connector ME@ Board ID for EVT Board ID for DVT DVT@ Board ID for PVT PVT@

For USB3.0 (HM76,HM70) USB3@

Title

Size Document Number Rev

B

LA-9631P

Date: Sheet of

TS@

EVT@

USB2@For USB2.0 (All PCH)

SROM@For share ROM NOSROM@For non-share ROM

Compal Electronics, Inc.

Notes List

3 60Wednesday, February 27, 2013

E

1.0

5

4

3

2

1

Power-Up/Down Sequence

Mars XT VRAM STRAP

Vendor

UV5, UV6, UV7, UV8 UV9, UV10, UV11, UV12

Samsung 2048Mbits

ZZZ4

D D

2GBytes

1GBytes

2GBytes 1 0 0

1GBytes

ZZZ4

C C

Samsung_2G

MS2G@

MS2G@ X7646738L01

X7646738L01

SA000068U00 128Mx16 K4W2G1646E-BC1A

MS2G@

Micron 2048Mbits

ZZZ5

SA000067500 128Mx16 MT41J128M16JT-093G:K

MM2G@

Hynix 2048Mbits

ZZZ6

SA000065300 128M16 H5TQ2G63DFR-N0C

MH2G@

Samsung 1028Mbits

ZZZ7

SA00004GS00 64Mx16 K4W1G1646G-BC11

MS1G@

Hynix 2048Mbits

ZZZ15

SA00006H400 128Mx16 H5TC2G63FFR-11C

MH2GN@

Hynix 1024Mbits

ZZZ8

SA000041SB0 64Mx16 H5TQ1G63EFR-11C

MH1G@

ZZZ5

Micron_2G

MM2G@

MM2G@ X7646738L02

X7646738L02

ZZZ6

Hynix_2G

MH2G@

X7646738L09

ID

0

1

2

3

4

7

ZZZ15

Hynix_2G

MH2GN@

X7646738L10

0 0

0 1 1

ZZZ7

Samsung_1G

MS1G@

MS1G@ X7646738L03

X7646738L03

PS_3[ 1 ]PS_3[ 2 ]PS_3[ 3 ]

0

10 0

00 1

1 1 4.75K NC1

ZZZ8

Hynix_1G

MH1G@

MH1G@ X7646738L04

X7646738L04

X76@X76@

R_pu R_pd

RV20 RV27

NC 4.75K

8.45K 2K

4.53K 2K

6.98K 4.99K

4.53K 4.99K

"Mars" has the following requirements with regards to power-supply sequencing to avoid damaging the ASIC:

All the ASIC supplies must reach their respective nominal voltages within 20 ms



of the start of the ramp-up sequence, though a shorter ramp-up duration is preferred. The maximum slew rate on all rails is 50 mV/µs.

The external pull ups on the DDC/AUX signals (if applicable) should ramp up



before or after both VDDC and VDD_CT have ramped up.

VDDC and VDD_CT should not ramp up simultaneously. For example, VDDC



should reach 90% before VDD_CT starts to ramp up (or vice versa).

For power down, reversing the ramp-up sequence is recommended.



VDDR3(3.3VGS)

PCIE_VDDC(0.95VGSV)

VDDR1(1.5VGS)

VDDC/VDDCI(1.12V)

VDD_CT(1.8V)

PERSTb

Sun PRO VRAM STRAP

Vendor

UV9, UV10, UV11, UV12

Samsung 4096Mbits

ZZZ9

2GBytes

B B

2GBytes

1GBytes

ZZZ9

A A

Samsung_2G

SS2G@

SS2G@ X7646738L05

X7646738L05

SA000068R00 256Mx16 K4W4G1646B-HC11

SS2G@

Micron 4096Mbits

ZZZ10

SA000065D00 256Mx16/1866 MT41K256M16HA-107G:E

SM2G@

Hynix 4096Mbits

ZZZ11

SA00006DG00 256MX16 H5TQ4G63MFR-11C

SH2G@

Samsung 2048Mbits

ZZZ12

SA000068U00 128Mx16 K4W2G1646E-BC1A

SS1G@

Hynix 2048Mbits

ZZZ16

SA00006H400 128Mx16 H5TC2G63FFR-11C

SH1GN@

Micron 2048Mbits

ZZZ13

SA000067500 128Mx16 MT41J128M16JT-093G:K

SM1G@

Hynix 2048Mbits

ZZZ14

SA000065300 128M16 H5TQ2G63DFR-N0C

SH1G@

ZZZ10

Micron_2G

SM2G@

SM2G@ X7646738L06

X7646738L06

5

ZZZ11

Hynix_2G

SH2G@

X7646738L11

ID

0

1

2

3

4

6

7

ZZZ12

Samsung_1G

SS1G@

SS1G@ X7646738L07

X7646738L07

0 0

0 1 1

1

ZZZ13

Micron_1G

SM1G@

SM1G@ X7646738L08

X7646738L08

4

PS_3[ 1 ]PS_3[ 2 ]PS_3[ 3 ]

0

10 0

00 1

001 4.99K4.53K

1 0

1 11

ZZZ14

Hynix_1G

SH1G@

X7647538L01

www.laptopfix.vn

X76@X76@

R_pu R_pd

RV20 RV27

NC 4.75K

8.45K 2K

4.53K 2K

6.98K 4.99K

3.4K 10K

4.75K NC

ZZZ16

Hynix_1G

SH1GN@

X7646738L13

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

REFCLK

Straps Reset

Straps Valid

Global ASIC Reset

Issued Date

Compal Secret Data

2011/06/15 2012/07/11

3

Compal Secret Data

Deciphered Date

T4+16clock

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

VGA Notes List

LA-9631P

4 60Wednesday, February 27, 2013

1

1.0

5

ZZZ1

14@

ZZZ1

14@

14"_DIS_PCB_LA9631P

DA6000WO000

DA6000WO000 PCB 0N1 LA-9631P REV0 M/B DIS 3

PCB 0N1 LA-9631P REV0 M/B DIS 3

D D

C C

B B

eDP_COMPIO and ICOMPO signals should be shorted near balls and routed with typical impedance <25 mohms

ZZZ2

15@

ZZZ2

15@

15"_DIS_PCB_LA9631P

DA6000WO100

DA6000WO100 PCB 0N2 LA-9631P REV0 M/B DIS 5

PCB 0N2 LA-9631P REV0 M/B DIS 5

+V1.05S_VCCP

12

R7

24.9_0402_1%

DMI_CRX_PTX_N0<16> DMI_CRX_PTX_N1<16> DMI_CRX_PTX_N2<16> DMI_CRX_PTX_N3<16>

DMI_CRX_PTX_P0<16> DMI_CRX_PTX_P1<16> DMI_CRX_PTX_P2<16> DMI_CRX_PTX_P3<16>

DMI_CTX_PRX_N0<16> DMI_CTX_PRX_N1<16> DMI_CTX_PRX_N2<16> DMI_CTX_PRX_N3<16>

DMI_CTX_PRX_P0<16> DMI_CTX_PRX_P1<16> DMI_CTX_PRX_P2<16> DMI_CTX_PRX_P3<16>

FDI_CTX_PRX_N0<16> FDI_CTX_PRX_N1<16> FDI_CTX_PRX_N2<16> FDI_CTX_PRX_N3<16> FDI_CTX_PRX_N4<16> FDI_CTX_PRX_N5<16> FDI_CTX_PRX_N6<16> FDI_CTX_PRX_N7<16>

FDI_CTX_PRX_P0<16> FDI_CTX_PRX_P1<16> FDI_CTX_PRX_P2<16> FDI_CTX_PRX_P3<16> FDI_CTX_PRX_P4<16> FDI_CTX_PRX_P5<16> FDI_CTX_PRX_P6<16> FDI_CTX_PRX_P7<16>

FDI_FSYNC0<16> FDI_FSYNC1<16>

FDI_INT<16>

FDI_LSYNC0<16> FDI_LSYNC1<16>

EDP_COMP

eDP_HPD

4

JCPU1A

B27

DMI_RX#[0]

B25

DMI_RX#[1]

A25

DMI_RX#[2]

B24

DMI_RX#[3]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

A21

FDI0_TX#[0 ]

H19

FDI0_TX#[1 ]

E19

FDI0_TX#[2 ]

F18

FDI0_TX#[3 ]

B21

FDI1_TX#[0 ]

C20

FDI1_TX#[1 ]

D18

FDI1_TX#[2 ]

E17

FDI1_TX#[3 ]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMP IO

A17

eDP_ICOMPO

B16

eDP_HPD#

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX[0]

F16

eDP_TX[1]

C16

eDP_TX[2]

G15

eDP_TX[3]

C18

eDP_TX#[0 ]

E16

eDP_TX#[1 ]

D16

eDP_TX#[2 ]

F15

eDP_TX#[3 ]

TYCO_2013620-2_IVY BRIDGE

ME@

PEG_RX[0 ] PEG_RX[1 ] PEG_RX[2 ] PEG_RX[3 ] PEG_RX[4 ] PEG_RX[5 ] PEG_RX[6 ] PEG_RX[7 ] PEG_RX[8 ] PEG_RX[9 ]

PEG_TX[0 ] PEG_TX[1 ] PEG_TX[2 ] PEG_TX[3 ] PEG_TX[4 ] PEG_TX[5 ] PEG_TX[6 ] PEG_TX[7 ] PEG_TX[8 ] PEG_TX[9 ]

J22 J21 H22

K33 M35 L34 J35 J32 H34 H31 G33 G30 F35 E34 E32 D33 D31 B33 C32

J33 L35 K34 H35 H32 G34 G31 F33 F30 E35 E33 F32 D34 E31 C33 B32

M29 M32 M31 L32 L29 K31 K28 J30 J28 H29 G27 E29 F27 D28 F26 E25

M28 M33 M30 L31 L28 K30 K27 J29 J27 H28 G28 E28 F28 D27 E26 D25

PEG_ICOMPI

PEG_ICOMPO

PEG_RCO MPO

PEG_RX# [0] PEG_RX# [1] PEG_RX# [2] PEG_RX# [3] PEG_RX# [4] PEG_RX# [5] PEG_RX# [6]

DMI

Intel(R) FDI

eDP

PEG_RX# [7] PEG_RX# [8]

PEG_RX# [9] PEG_RX# [10] PEG_RX# [11] PEG_RX# [12] PEG_RX# [13] PEG_RX# [14] PEG_RX# [15]

PEG_RX[1 0]

PEG_RX[1 1]

PEG_RX[1 2]

PEG_RX[1 3]

PEG_RX[1 4]

PEG_RX[1 5]

PEG_TX# [0]

PEG_TX# [1]

PEG_TX# [2]

PEG_TX# [3]

PEG_TX# [4]

PEG_TX# [5]

PEG_TX# [6]

PEG_TX# [7]

PEG_TX# [8]

PEG_TX# [9] PEG_TX# [10] PEG_TX# [11] PEG_TX# [12]

PCI EXPRESS* - GRAPHICS

PEG_TX# [13] PEG_TX# [14] PEG_TX# [15]

PEG_TX[1 0]

PEG_TX[1 1]

PEG_TX[1 2]

PEG_TX[1 3]

PEG_TX[1 4]

PEG_TX[1 5]

3

PEG_COMP

PCIE_CRX_GTX_N7 PCIE_CRX_GTX_N6 PCIE_CRX_GTX_N5 PCIE_CRX_GTX_N4 PCIE_CRX_GTX_N3 PCIE_CRX_GTX_N2 PCIE_CRX_GTX_N1 PCIE_CRX_GTX_N0

PCIE_CRX_GTX_P7 PCIE_CRX_GTX_P6 PCIE_CRX_GTX_P5 PCIE_CRX_GTX_P4 PCIE_CRX_GTX_P3 PCIE_CRX_GTX_P2 PCIE_CRX_GTX_P1 PCIE_CRX_GTX_P0

PCIE_CTX_GRX_C_N7 PCIE_CTX_GRX_C_N6 PCIE_CTX_GRX_C_N5 PCIE_CTX_GRX_C_N4 PCIE_CTX_GRX_C_N3 PCIE_CTX_GRX_C_N2 PCIE_CTX_GRX_C_N1 PCIE_CTX_GRX_C_N0

PCIE_CTX_GRX_C_P7 PCIE_CTX_GRX_C_P6 PCIE_CTX_GRX_C_P5 PCIE_CTX_GRX_C_P4 PCIE_CTX_GRX_C_P3 PCIE_CTX_GRX_C_P2 PCIE_CTX_GRX_C_P1 PCIE_CTX_GRX_C_P0

PEG_ICOMPI and RCOMPO signals should be shorted and routed

+V1.05S_VCCP

R1

24.9_0402_1%

12

with - max length = 500 mils - typical impedance = 43 mohms PEG_ICOMPO signals should be routed with max length = 500 mils

- typical impedance = 14.5 mohms

PEG Static Lane Reversal - CF G2 is for the 16x

1: Normal Operation; Lane # definition matches socket pin map definition

0:Lane Reversed

*

PCIE_CTX_GRX_N7 PCIE_CTX_GRX_N6 PCIE_CTX_GRX_N5 PCIE_CTX_GRX_N4 PCIE_CTX_GRX_N3 PCIE_CTX_GRX_N2 PCIE_CTX_GRX_N1 PCIE_CTX_GRX_N0

PCIE_CTX_GRX_P7 PCIE_CTX_GRX_P6 PCIE_CTX_GRX_P5 PCIE_CTX_GRX_P4 PCIE_CTX_GRX_P3 PCIE_CTX_GRX_P2 PCIE_CTX_GRX_P1 PCIE_CTX_GRX_P0

PCIE_CRX_GTX_N[0..7] <23>

PCIE_CRX_GTX_P[0..7] <23>

1 2

C9 0.22U_0402_10V6KPX@C9 0.22U_0402_10V6KPX@

1 2

C10 0.22U_0402_10V6KPX@C10 0.22U_0402_10V6KPX@

1 2

C11 0.22U_0402_10V6KPX@C11 0.22U_0402_10V6KPX@

1 2

C12 0.22U_0402_10V6KPX@C12 0.22U_0402_10V6KPX@

1 2

C13 0.22U_0402_10V6KPX@C13 0.22U_0402_10V6KPX@

1 2

C14 0.22U_0402_10V6KPX@C14 0.22U_0402_10V6KPX@

1 2

C15 0.22U_0402_10V6KPX@C15 0.22U_0402_10V6KPX@

1 2

C16 0.22U_0402_10V6KPX@C16 0.22U_0402_10V6KPX@

1 2

C25 0.22U_0402_10V6KPX@C25 0.22U_0402_10V6KPX@

1 2

C26 0.22U_0402_10V6KPX@C26 0.22U_0402_10V6KPX@

1 2

C27 0.22U_0402_10V6KPX@C27 0.22U_0402_10V6KPX@

1 2

C28 0.22U_0402_10V6KPX@C28 0.22U_0402_10V6KPX@

1 2

C29 0.22U_0402_10V6KPX@C29 0.22U_0402_10V6KPX@

1 2

C30 0.22U_0402_10V6KPX@C30 0.22U_0402_10V6KPX@

1 2

C31 0.22U_0402_10V6KPX@C31 0.22U_0402_10V6KPX@

1 2

C32 0.22U_0402_10V6KPX@C32 0.22U_0402_10V6KPX@

CFG2

2

PCIE_CTX_GRX_N[0..7] <23>

PCIE_CTX_GRX_P[0..15] <23>

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(1/7) DMI,FDI,PEG

LA-9631P

5 60W ednesday, February 27, 2013

1

1.0

www.laptopfix.vn

5

D D

+V1.05S_VCCP

12

R9

62_0402_5%

H_PROCHOT#<42,46,47,54>

C C

H_CPUPWRGD<19>

H_PROCHOT#

22P_0402_50V8J

C549

H_PM_SYNC<16>

R27

1

10K_0402_5%

1 2

2

ESD

4

JCPU1B

H_SNB_IVB#<19>

T48T48

H_PECI<42>

R15

56_0402_5%

1 2

H_THRMTRIP#<19>

R29

1 2

130_0402_5%

H_CATERR#

H_PROCHOT#_R

PM_DRAM_PWR GD_R

BUF_CPU_RST#

C26

AN34

AL33

AN33

AL32

AN32

AM34

AP33

V8

AR33

PROC_SELECT#

SKTOCC#

CATERR#

PECI

PROCHOT#

THERMTRIP#

PM_SYNC

UNCOREPWRGOOD

SM_DRAMPWR OK

RESET#

3

BCLK

BCLK#

MISCTHERMALPWR MANAGEMENT

DPLL_REF_CLK

DPLL_REF_CLK#

CLOCKS

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

DDR3

MISC

PRDY#

PREQ#

TCK TMS

TRST#

TDI

TDO

DBR#

BPM#[0] BPM#[1]

JTAG & BPM

BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

A28 A27

A16 A15

R8

AK1 A5 A4

H_DRAMRST#

SM_RCOMP0 SM_RCOMP1 SM_RCOMP2

12

R12 1K_0402_5%R12 1K_0402_5%

12

R13 1K_0402_5%R13 1K_0402_5%

H_DRAMRST# <7>

12

R16 140_0402_1%R16 140_0402_ 1%

12

R17 25.5_0402_1%R17 25.5_0402_1%

12

R18 200_0402_1%R18 200_0402_ 1%

DDR3 Compe nsation S ignals

AP29

XDP_PRDY#

AP27

XDP_PREQ#

AR26

XDP_TCK

AR27

XDP_TMS

AP30

XDP_TRST#

AR28

XDP_TDI

AP26

XDP_TDO

AL35

XDP_DBRESET#

AT28

XDP_BPM#0

AR29

XDP_BPM#1

AR30

XDP_BPM#2

AT30

XDP_BPM#3

AP32

XDP_BPM#4

AR31

XDP_BPM#5

AT31

XDP_BPM#6

AR32

XDP_BPM#7

2

+V1.05S_VCCP

R28 1K_0402_5%R28 1K_0402_ 5%

12

C45

C45 47P_0402_50V8J

47P_0402_50V8J

ESD

CLK_CPU_DMI <15> CLK_CPU_DMI# <15>

XDP_TRST# XDP_TDI XDP_TMS XDP_TCK

12

51_0804_8P4R_5%

+3VS

@

RP13

1

+V1.05S_VCCP

18 27 36 45

12

C46

C46 100P_0402_50V8J

100P_0402_50V8J

ESD

TYCO_2013620-2_IVY BRIDGE

+3VALW

TYCO_2013620-2_IVY BRIDGE

ME@

Buffered reset to CPU

B B

U1

1 2

R161

+3VS

10K_0402_5%

PM_DRAM_PWR GD<16>

A A

5

1

P

B

O

2

A

G

74AHC1G09GW_TSSOP5

3

4

PM_SYS_PWRGD_BUF

+1.5V_CPU_VDDQ

12

R30

R30 200_0402_5%

200_0402_5%

+V1.05S_VCCP

12

R32

75_0402_5%

R34

43_0402_1%

BUF_CPU_RST#

4

www.laptopfix.vn

1 2

BUFO_CPU_RST#

SN74LVC1G07DCKR_SC70-5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

+3VS

5

U2

4

1

P NC

Y

2

PCH_PLTRST#

A

G

3

2011/06/15 2012/07/11

3V

PCH_PLTRST# <18>

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PROCESSOR(2/7) PM,XDP,CLK

Size Document Number Rev

Custom

LA-9631P

Date: Sheet of

2

Date: Sheet of

1

6 60Wednesday, February 27, 2013

1.0

5

JCPU1C

DDR_A_D[0..63]<12>

D D

C C

DDR_A_BS0<12> DDR_A_BS1<12>

B B

DDR_A_BS2<12>

DDR_A_CAS#< 12> DDR_A_RAS#< 12> DDR_A_WE#<12>

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

G10

N10

M10

AG6 AG5 AK6 AK5 AH5 AH6

AK8

AK9 AH8 AH9 AL9

AL8 AP11 AN11

AL12 AM12 AM11

AL11 AP12 AN12

AJ14 AH14

AL15 AK15

AL14 AK14

AJ15 AH15

AE10 AF10

AE8 AD9 AF9

F10

AJ5 AJ6 AJ8

AJ9

C5 D5 D3 D2 D6 C6 C2 C3

F8

G9

F9

F7 G8 G7

K4

K5

K1

K2 M8

N8

N7

M9

N9 M7

V6

J1 J5 J4 J2

SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1] SA_BS[2]

SA_CAS# SA_RAS# SA_WE#

4

AB6

SA_CLK[0]

AA6

SA_CLK#[0]

V9

SA_CKE[0]

AA5

SA_CLK[1]

AB5

SA_CLK#[1]

V10

SA_CKE[1]

AB4

RSVD_TP[1]

AA4

RSVD_TP[2]

W9

RSVD_TP[3]

AB3

RSVD_TP[4]

AA3

RSVD_TP[5]

W10

RSVD_TP[6]

AK3

SA_CS#[0]

AL3

SA_CS#[1]

AG1

RSVD_TP[7]

AH1

RSVD_TP[8]

AH3

SA_ODT[0]

AG3

SA_ODT[1]

AG2

RSVD_TP[9]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

AH2

C4 G6 J3 M6 AL6 AM8 AR12 AM15

D4 F6 K3 N6 AL5 AM9 AR11 AM14

AD10 W1 W2 W7 V3 V2 W3 W6 V1 W5 AD8 V4 W4 AF8 V5 V7

DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

RSVD_TP[10]

DDR SYSTEM MEMORY A

3

DDR_B_D[0..63]<1 3>

M_CLK_DDR0 <12> M_CLK_DDR#0 <12 > DDR_CKE0_DIMMA <12>

M_CLK_DDR1 <12> M_CLK_DDR#1 <12 > DDR_CKE1_DIMMA <12>

DDR_CS0_DIMMA# <12> DDR_CS1_DIMMA# <12>

M_ODT0 <12> M_ODT1 <12>

DDR_A_DQS#[0..7] <12>

DDR_A_DQS[0..7] <12>

DDR_A_MA[0..15] <12> DDR_B_MA[0..15] <13>

DDR_B_BS0<13> DDR_B_BS1<13> DDR_B_BS2<13>

DDR_B_CAS#<13> DDR_B_RAS#<13> DDR_B_WE#<13>

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

AM5 AM6 AR3

AN3 AN2 AN1

AN9

AN8 AR6 AR5 AR9

AJ11

AH11

AR8

AJ12 AH12 AT11 AN14 AR14 AT14 AT12 AN15 AR15 AT15

AA10

D10

K10

J10

M5

M4

M2 M1

AP3

AP2 AP5

AT5 AT6 AP6

AT8 AT9

AA9 AA7

AB8 AB9

C9 A7

C8 A9 A8 D9 D8 G4 F4 F1 G1 G5 F5 F2 G2

J7 J8

K9

J9

K8 K7

N4 N2 N1

N5

R6

JCPU1D

SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

SB_BS[0] SB_BS[1] SB_BS[2]

SB_CAS# SB_RAS# SB_WE#

2

AE2

SB_CLK[0]

AD2

SB_CLK#[0]

R9

SB_CKE[0]

AE1

SB_CLK[1]

AD1

SB_CLK#[1]

R10

SB_CKE[1]

SB_CS#[0] SB_CS#[1]

SB_ODT[0] SB_ODT[1]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

AB2 AA2 T9

AA1 AB1 T10

AD3 AE3 AD6 AE6

AE4 AD4 AD5 AE5

D7 F3 K6 N3 AN5 AP9 AK12 AP15

C7 G3 J6 M3 AN6 AP8 AK11 AP14

AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

RSVD_TP[11] RSVD_TP[12] RSVD_TP[13]

RSVD_TP[14] RSVD_TP[15] RSVD_TP[16]

RSVD_TP[17] RSVD_TP[18]

RSVD_TP[19] RSVD_TP[20]

DDR SYSTEM MEMORY B

1

M_CLK_DDR2 <13> M_CLK_DDR#2 <13> DDR_CKE2_DIMMB <13>

M_CLK_DDR3 <13> M_CLK_DDR#3 <13> DDR_CKE3_DIMMB <13>

DDR_CS2_DIMMB# <13> DDR_CS3_DIMMB# <13>

M_ODT2 <13> M_ODT3 <13>

DDR_B_DQS#[0..7] <13>

DDR_B_DQS[0..7] <13>

TYCO_2013620-2_IVY BRIDGE

Deciphered Date

TYCO_2013620-2_IVY BRIDGE

ME@

2

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(3/7) DDRIII

LA-9631P

1

7 60Wednesday, February 27, 2013

1.0

TYCO_2013620-2_IVY BRIDGE

ME@

D

S

D

S

13

H_DRAMRST#<6>

R39

4.99K_0402_1%

1 2

@

A A

DRAMRST_CNTRL_PC H<1 0,15>

5

@

1 2

R48

0_0402_5%

DRAMRST_CNTRL_PC H_R

DDR3_DRAMRST#_RH_DRAMRST#

Q2

G

LBSS138LT1G_SOT-23-3

2

1

C35

0.047U 16V K X7R 0402

2

Eiffel used 0.01u Module design used 0.047u

4

+1.5V

12

R37

1K_0402_5%

www.laptopfix.vn

R38

R38 1K_0402_5%

1K_0402_5%

1 2

DDR3_DRAMRST# <12,13>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

5

4

3

2

1

CFG Straps for Processor

CFG2

12

R41

R41 1K_0402_1%

1K_0402_1%

PX@

D D

PX@

JCPU1E

AK28

CFG[0]

AK29

CFG[1]

CFG2

CFG4 CFG5 CFG6 CFG7

+VCC_GFXCORE_AXG

+VCC_CORE

@

R252

49.9_0402_1%

@

R255

1 2

49.9_0402_1%

1 2

R82 100_0402_1%@R82 100_0402_1%@

1 2

R88 100_0402_1%@R88 100_0402_1%@

VSS_AXG_VAL_SENSE

VSS_VAL_SENSE

R257

49.9_0402_1%

1 2

VCC_AXG_VAL_SENSE

VSS_AXG_VAL_SENSE

VCC_VAL_SENSE

VSS_VAL_SENSE

@

R253

49.9_0402_1%

C C

B B

49.9_0402_1%

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

J15

RSVD27

TYCO_2013620-2_IVY BRIDGE

ME@

CFG

VCC_DIE_SENSE VSS_DIE_SENSE

RESERVED

RSVD_NCTF10

RSVD_NCTF11 RSVD_NCTF12 RSVD_NCTF13

Interl request AH26 short GND check on EVT phase

AH27 AH26

L7

RSVD28

AG7

RSVD29

AE7

RSVD30

AK2

RSVD31

W8

RSVD32

AT26

RSVD33

AM33

RSVD34

AJ27

RSVD35

T8

RSVD37

J16

RSVD38

H16

RSVD39

G16

RSVD40

RSVD51 RSVD52

BCLK_ITP

BCLK_ITP#

KEY

AR35 AT34 AT33 AP35 AR34

B34 A33 A34 B35 C35

AJ32 AK32

AN35 AM35

AT2 AT1 AR1

B1

RSVD_NCTF1 RSVD_NCTF2 RSVD_NCTF3 RSVD_NCTF4 RSVD_NCTF5

RSVD_NCTF6 RSVD_NCTF7 RSVD_NCTF8 RSVD_NCTF9

PEG Static Lane Reversal - CFG2 is for the 16x

T13PAD T13PAD

CFG2

1: Normal Operation; Lane # definition matches socket pin map definition

0:Lane Reversed

*

CFG4

12

R42

@ R42

@

1K_0402_1%

Display Port Presence Strap

CFG4

1 : Disabled; No Physical Display Port attached to Embedded Display Port

*

0 : Enabled; An external Display Port device is connected to the Embedded Display Port

CFG6

CFG5

12

R43

PX@ R43

PX@

1K_0402_1%

R44

@R44

@

1K_0402_1%

PCIE Port Bifurcation Straps

11: (Default) x16 - Device 1 functions 1 and 2 disabled

CFG[6:5]

10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled

*

01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)

00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

CFG7

12

R45

@R45

@

1K_0402_1%

PEG DEFER TRAINING

1: (Default) PEG Train immediately following xxRESETB

CFG7

de assertion

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

0: PEG Wait for BIOS for training

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(4/7) RSVD,CFG

LA-9631P

1

8 60Wednesday, February 27, 2013

1.0

5

POWER

+VCC_CORE

JCPU1F

POWER

QC=94A DC=53A

D D

C C

B B

A A

AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26

AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27

AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26

VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

CORE SUPPLY

4

8.5A

AH13

VCCIO1

AH10

VCCIO2

AG10

VCCIO3

AC10

VCCIO4

Y10

VCCIO5

U10

VCCIO6

P10

VCCIO7

L10

VCCIO8

J14

VCCIO9

J13

VCCIO10

J12

VCCIO11

J11

VCCIO12

H14

VCCIO13

H12

VCCIO14

H11

VCCIO15

G14

VCCIO16

G13

VCCIO17

G12

VCCIO18

F14

VCCIO19

F13

VCCIO20

F12

VCCIO21

F11

VCCIO22

E14

VCCIO23

E12

VCCIO24

E11

VCCIO25

D14

VCCIO26

D13

VCCIO27

D12

VCCIO28

D11

VCCIO29

C14

VCCIO30

C13

VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39

VCCIO40

VIDALERT#

VIDSCLK

VIDSOUT

C12 C11 B14 B12 A14 A13 A12 A11

J23

AJ29 AJ30 AJ28

AJ35 AJ34

B10 A10

PEG AND DDR

VCC_SENSE VSS_SENSE

VCCIO_SENSE

VSS_SENSE_VCCIO

SENSE LINES SVID

3

+V1.05S_VCCP

12

R46

R46 75_0402_5%

75_0402_5%

H_CPU_SVIDALRT#

1 2

R47 43_0402_5%R47 43_0402_5%

R50 130_0402_5%R 50 130_0402_5%

12

+V1.05S_VCCP

VR_SVID_CL K

0.1uF on power side

series-res istors clo se to VR

VR_SVID_ALRT# <54> VR_SVID_CLK <54> VR_SVID_DAT <54>

VCC_SENCE 100ohm +-1% pull-up to VCC near processor

Trace Impedance =27-33 ohm Trace Length Matc < 25 mils

R79

10_0402_1%

VCCIO_SENSE <52>

+V1.05S_VCCP

12

1 2

VSSIO_SENSEVSSIO_SENSE_L

R74

10_0402_1%

R74 & R79 put together

VSSIO_SENSE_L <52>

VSS_SENCE 100ohm +-1% pull-down to GND near processor

2

+VCC_CORE

12

R51

R51 100_0402_1%

100_0402_1%

VCCSENSE <54>

R54

R54 100_0402_1%

100_0402_1%

VSSSENSE <54>

12

1

Security Classification

TYCO_2013620-2_IVY BRIDGE

ME@

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

www.laptopfix.vn

3

Compal Secret Data

Deciphered Date

Title

PROCESSOR(5/7) PWR,BYPASS

Size Document Number Rev

Custom

LA-9631P

Date: Sheet of

2

Date: Sheet of

9 60Wednesday, February 27, 2013

1

1.0

5

4

3

2

1

+1.5V +1.5V_CPU_VDDQ

+VREF_DQ_DIMMA

SUSP<45>

D D

C C

B B

+1.8VS

R69 0_0805_5%

1 2

@

1

2

C130

C345

10U_0603_6.3V6M

22U_0805_6.3V6M

1

@

2

B+

12

13

D

2

G

S

+VCC_GFXCORE_AXG

1.5A

+1.8VS_VCCPLL

C132

1U_0402_6.3V6K

1

2

DMN3030LSS-13_SOP8L-8

8 7

5

R56

R56 82K_0402_5%

82K_0402_5%

RUN_ON_CPU1.5VS3

Q4

Q4 2N7002H_SOT23-3

2N7002H_SOT23-3

AT24 AT23 AT21 AT20 AT18 AT17 AR24 AR23 AR21 AR20 AR18 AR17 AP24 AP23 AP21 AP20 AP18 AP17 AN24 AN23 AN21 AN20 AN18

AN17 AM24 AM23 AM21 AM20 AM18 AM17

AL24

AL23

AL21

AL20

AL18

AL17

AK24

AK23

AK21

AK20

AK18

AK17

AJ24

AJ23

AJ21

AJ20

AJ18

AJ17 AH24 AH23 AH21 AH20 AH18 AH17

B6 A6 A2

U3

JCPU1G

VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 VAXG37 VAXG38 VAXG39 VAXG40 VAXG41 VAXG42 VAXG43 VAXG44 VAXG45 VAXG46 VAXG47 VAXG48 VAXG49 VAXG50 VAXG51 VAXG52 VAXG53 VAXG54

VCCPLL1 VCCPLL2 VCCPLL3

TYCO_2013620-2_IVY BRIDGE

ME@

4

1 2

12

R57

R57 330K_0402_5%

330K_0402_5%

@

1 2 36

R885

15K_0402_1%

AP4800 Id=9.6A

R02

1

C97

0.047U_0603_25V7K

2

POWER

SENSE

SA_DIMM_VREFDQ SB_DIMM_VREFDQ

VREFMISC

GRAPHICS

DDR3 -1.5V RAILS

SA RAIL

1.8V RAIL

VAXG_SENSE

VSSAXG_SENSE

LINES

SM_VREF

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15

VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA7 VCCSA8

VCCSA_SENSE

VCCSA_VID[0] VCCSA_VID[1]

VCCIO_SEL

+VCC_GFXCORE_AXG

12

AK35 AK34

12

AL1

+V_SM_VREF_CNT

B4

+V_DDR_REFA_R

D1

+V_DDR_REFB_R

AF7 AF4 AF1 AC7 AC4 AC1 Y7 Y4 Y1 U7 U4 U1 P7 P4 P1

M27

+VCCSA

M26 L26 J26 J25 J24 H26 H25

H23

C22 C24

A19

R616

R616 10_0402_1%

10_0402_1%

R626

R626 10_0402_1%

10_0402_1%

10U_0603_6.3V6M

1

2

10U_0603_6.3V6M

1

2

H_VCCSA_VID0 <51> H_VCCSA_VID1 <51>

C117

C124

10U_0603_6.3V6M

1

2

+VREF_DQ_DIMMB

DRAMRST_CNTRL_PCH

LBSS138LT1G_SOT-23-3

M3 Circuit (Processor Generated SO-DIMM VREF_DQ)

VCC_AXG_SENSE <54>

VSS_AXG_SENSE <54>

+V_SM_VREF should have 20 mil trace width

1

C98

.1U_0402_16V7K

C125

.1U_0402_16V7K

C119

10U_0603_6.3V6M

1

2

C126

10U_0603_6.3V6M

1

2

C120

10U_0603_6.3V6M

1

@

2

+VCCSA

1

+

2

G

+1.5V_CPU_VDDQ

12

R67

R67 1K_0402_1%

1K_0402_1%

12

R78

R78 1K_0402_1%

1K_0402_1%

+1.5V_CPU_VDDQ

1

C122

10U_0603_6.3V6M

1

+

2

C128

@+C128

@

330U_D2_2.5VY_R9M

+VCCSA_SENSE <51>

13

D

S

Q9

C123

C123 220U_6.3V_M

220U_6.3V_M

Q6

13

D

LBSS138LT1G_SOT-23-3

2

G

S

+V_DDR_REFA_R

+V_DDR_REFB_R

DRAMRST_CNTRL_PCH <15,7>

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

IVY Bridge drives VCCIO_SEL low VCCP_PWRCTRL:0 Sandy Bridge is NC for A19 VCCP_PWRCTRL:1

Deciphered Date

2

Title

PROCESSOR(6/7) PWR

Size Document Number Rev

Custom

LA-9631P

Date: Sheet of

10 60Wednesday, February 27, 2013

1

1.0

5

JCPU1H

AT35 AT32 AT29 AT27 AT25 AT22 AT19 AT16 AT13

D D

C C

B B

A A

5

AT10

AT7 AT4

AT3 AR25 AR22 AR19 AR16 AR13 AR10

AR7

AR4

AR2 AP34 AP31 AP28 AP25 AP22 AP19 AP16 AP13 AP10

AP7

AP4

AP1 AN30 AN27 AN25 AN22 AN19 AN16 AN13 AN10

AN7

AN4

AM29 AM25 AM22 AM19 AM16 AM13 AM10

AM7 AM4 AM3 AM2

AM1 AL34 AL31 AL28 AL25 AL22 AL19 AL16 AL13 AL10

AL7 AL4

AL2 AK33 AK30 AK27 AK25 AK22 AK19 AK16 AK13 AK10

AK7

AK4

AJ25

TYCO_2013620-2_IVY BRIDGE

ME@

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80

4

AJ22

VSS81

AJ19

VSS82

AJ16

VSS83

AJ13

VSS84

AJ10

VSS85

AJ7

VSS86

AJ4

VSS87

AJ3

VSS88

AJ2

VSS89

AJ1

VSS90

AH35

VSS91

AH34

VSS92

AH32

VSS93

AH30

VSS94

AH29

VSS95

AH28

VSS96

AH25

VSS98

AH22

VSS99

AH19

VSS100

AH16

VSS101

AH7

VSS102

AH4

VSS103

AG9

VSS104

AG8

VSS105

AG4

VSS106

AF6

VSS107

AF5

VSS108

AF3

VSS109

AF2

VSS110

AE35

VSS111

AE34

VSS112

AE33

VSS113

AE32

VSS114

AE31

VSS115

AE30

VSS116

AE29

VSS117

AE28

VSS118

VSS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2

3

JCPU1I

T35

VSS161

T34

VSS162

T33

VSS163

T32

VSS164

T31

VSS165

T30

VSS166

T29

VSS167

T28

VSS168

T27

VSS169

T26

VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176

N35

VSS177

N34

VSS178

N33

VSS179

N32

VSS180

N31

VSS181

N30

VSS182

N29

VSS183

N28

VSS184

N27

VSS185

N26

VSS186

M34

VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198

K35

VSS199

K32

VSS200

K29

VSS201

K26

VSS202

J34

VSS203

J31

VSS204

H33

VSS205

H30

VSS206

H27

VSS207

H24

VSS208

H21

VSS209

H18

VSS210

H15

VSS211

H13

VSS212

H10

VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222

G35

VSS223

G32

VSS224

G29

VSS225

G26

VSS226

G23

VSS227

G20

VSS228

G17

VSS229

G11

VSS230

F34

VSS231

F31

VSS232

F29

VSS233

TYCO_2013620-2_IVY BRIDGE

ME@

Compal Secret Data

2011/06/15 2012/07/11

Compal Secret Data

3

Deciphered Date

VSS

2

VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285

2

F22 F19 E30 E27 E24 E21 E18 E15 E13 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D35 D32 D29 D26 D20 D17 C34 C31 C28 C27 C25 C23 C10 C1 B22 B19 B17 B15 B13 B11 B9 B8 B7 B5 B3 B2 A35 A32 A29 A26 A23 A20 A3

1

Compal Electronics, Inc.

Title

PROCESSOR(7/7) VSS

Size D ocument Number Rev

Custom

LA-9631P

Date: Sheet of

11 60Wednesday, February 27, 2013

1

1.0

www.laptopfix.vn

5

+VREF_DQ_DIMMA

.1U_0402_16V7K

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z C133

C133

C

C 134

134

1

2

D D

C C

B B

+3VS

A A

2

@

DDR_CKE0_DIMMA<7>

DDR_A_BS2<7>

M_CLK_DDR0<7> M_CLK_DDR#0<7>

DDR_A_BS0<7>

DDR_A_WE#<7> DDR_A_CAS#<7>

DDR_CS1_DIMMA#<7>

2.2U_0603_6.3V4Z

.1U_0402_16V7K

C155

1

2

@

5

+1.5V +1.5V





DDR3 SO-DIMM A

JDIMM1

VREF_DQ1VSS1

3

VSS2

DDR_A_D0 DDR_A_D1

DDR_A_DM0

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

M_CLK_DDR0 M_CLK_DDR#0

DDR_A_MA10 DDR_A_BS0

DDR_A_WE# DDR_A_CAS# M_ODT0

DDR_A_MA13 DDR_CS1_DIMMA#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_DM7

DDR_A_D58 DDR_A_D59

C156

5

DQ0

7

DQ1 VSS49DQS#0

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

LCN_DAN06-K4806-0103

ME@

VREF_CA

EVENT#

VSS3

DQS0 VSS6

VSS8 DQ12 DQ13

VSS10

DQ14 DQ15

DQ20 DQ21

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VSS28

DQ36 DQ37

VSS30

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

VTT2

4

DDR_A_D[0..63]<7>

DDR_A_DQS[0..7]<7>

1

2

@

DDR_A_DQS#[0..7]<7>

DDR_A_MA[0..15]<7>

+VREF_CA

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z C136

C136

4*0402 1uf

1*0402 2.2uf

+VREF_DQ_DIMMA

+VREF_DQ_DIMMB

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

DDR_A_D4 DDR_A_D5

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D6 DDR_A_D7

DDR_A_D12 DDR_A_D13

DDR_A_DM1 DDR3_DRAMRST#

DDR_A_D14 DDR_A_D15

DDR_A_D20 DDR_A_D21

DDR_A_DM2

DDR_A_D22 DDR_A_D23

DDR_A_D28 DDR_A_D29

DDR_A_DQS#3 DDR_A_DQS3

DDR_A_D30 DDR_A_D31

DDR_CKE1_DIMMA

DDR_A_MA15 DDR_A_MA14

DDR_A_MA11 DDR_A_MA7

DDR_A_MA6 DDR_A_MA4

DDR_A_MA2 DDR_A_MA0

M_CLK_DDR1 M_CLK_DDR#1

DDR_A_BS1 DDR_A_RAS#

DDR_CS0_DIMMA#

M_ODT1

DDR_A_D36 DDR_A_D37

DDR_A_DM4

DDR_A_D38 DDR_A_D39

DDR_A_D44 DDR_A_D45

DDR_A_DQS#5 DDR_A_DQS5

DDR_A_D46 DDR_A_D47

DDR_A_D52 DDR_A_D53

DDR_A_DM6

DDR_A_D54 DDR_A_D55

DDR_A_D60 DDR_A_D61

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D62 DDR_A_D63

SMB_DATA_S3 SMB_CLK_S3

4

+0.75VS





DDR3_DRAMRST# <13,7>

DDR_CKE1_DIMMA <7>

M_CLK_DDR1 <7> M_CLK_DDR#1 <7>

DDR_A_BS1 <7> DDR_A_RAS# <7>

DDR_CS0_DIMMA# <7> M_ODT0 <7>

M_ODT1 <7>

.1U_0402_16V7K

C135

1

2

VDDQ(1.5V) =

3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs)

6*0603 10uf (PER CONNECTOR)

VTT(0.75V) =

3*0805 10uf

VREF =

1*0402 0.1uf

VDDSPD (3.3V)=

1*0402 0.1uf 1*0402 2.2uf

SMB_DATA_S3 <13,15,36> SMB_CLK_S3 <13,15,36>

DQ4 DQ5

DQ6 DQ7

DM1

DM2

A15 A14

A11

A7

A6 A4

A2 A0

CK1

BA1

S0#

NC2

DM4

DM6

SDA

SCL

G2

+VREF_CA

+VREF_CB

+VREF_CA

3

RP15

1K_0804_8P4R_1%

RP16

1K_0804_8P4R_1%

+1.5V

18 27 36 45

+1.5V

18 27 36 45

2

(220uF_6.3V_4.2L_ESR17m)*1=(SF000002Y00)OSCAN

Layout Note: Place near DIMM

+1.5V

C139

10U_0603_6.3V6M

1

2

Layout Note: Place near DIMM

+0.75VS

C150

C152

1U_0402_6.3V6K

1

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

(10uF_0603_6.3V)*8

(0.1uF_402_10V)*4

C140

C141

10U_0603_6.3V6M

1

2

7/28 Update connect GND directly

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

Deciphered Date

2

C143

C142

10U_0603_6.3V6M

1

2

Layout Note: Place near DIMM

1

C146

C147

C144

C145

10U_0603_6.3V6M

.1U_0402_16V7K

@

1

2

1

2

C147

C148

.1U_0402_16V7K

Title

Size Document Number Rev

Custom

Date: Sheet of

C148

.1U_0402_16V7K

1

2

1

+

C149

@+C149

@

220U_6.3V_M

2

Compal Electronics, Inc.

DDRIII-SODIMM SLOT1

LA-9631P

1

12 60Wednesday, February 27, 2013

1.0

www.laptopfix.vn

5

4

3

2

1

+VREF_DQ_DIMMB

DDR_B_D0

1

C157

2

DDR_B_D1

DDR_B_DM0

DDR_B_D2 DDR_B_D3

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_DM3

DDR_B_D26 DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA5

DDR_B_MA3 DDR_B_MA1

M_CLK_DDR2 M_CLK_DDR#2

DDR_B_MA10 DDR_B_BS0

DDR_B_WE# DDR_B_CAS#

DDR_B_MA13 DDR_CS3_DIMMB#

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_DM5

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_DM7

DDR_B_D58 DDR_B_D59

1 2

R97 10K_0402_5%R97 10K_0402_5%

2.2U_0603_6.3V4Z

.1U_0402_16V7K

1

C158

D D

For Arranale only +VREF_DQ_DIMMB supply from a external 1.5V voltage divide circuit.

C C

B B

A A

+3VS

1

@

2

C158

2

@

DDR_CKE2_DIMMB<7>

DDR_B_BS2<7>

M_CLK_DDR2<7> M_CLK_DDR#2<7>

DDR_B_BS0<7>

DDR_B_WE#<7> DDR_B_CAS#<7>

DDR_CS3_DIMMB#<7>

2.2U_0603_6.3V4Z

.1U_0402_16V7K

C

177

+3VS

178

1

2

5





+1.5V +1.5V

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2 DQS247VSS17

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

TYCO_2-2013287-1

ME@

DQ4 DQ5

VSS3

DQS#0

DQS0 VSS6

DQ6

DQ7 VSS8 DQ12 DQ13

VSS10

DM1

DQ14 DQ15

DQ20 DQ21

DM2

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35 DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

DM6

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47 DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

SDA

SCL

VTT2

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78

A15

80

A14

82 84

A11

86

A7

88 90

A6

92

A4

94 96

A2

98

A0

100 102 104 106 108

BA1

110 112 114

S0#

116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

G2

4

DDR_B_D4 DDR_B_D5

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D6 DDR_B_D7

DDR_B_D12 DDR_B_D13

DDR_B_DM1 DDR3_DRAMRST#

DDR_B_D14 DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_DM2

DDR_B_D22 DDR_B_D23

DDR_B_D28 DDR_B_D29

DDR_B_DQS#3 DDR_B_DQS3

DDR_B_D30 DDR_B_D31

DDR_CKE3_DIMMB

DDR_B_MA15 DDR_B_MA14

DDR_B_MA11 DDR_B_MA7

DDR_B_MA6 DDR_B_MA4

DDR_B_MA2 DDR_B_MA0

M_CLK_DDR3 M_CLK_DDR#3

DDR_B_BS1 DDR_B_RAS#

DDR_CS2_DIMMB# M_ODT2

M_ODT3

DDR_B_D36 DDR_B_D37

DDR_B_DM4

DDR_B_D38 DDR_B_D39

DDR_B_D44 DDR_B_D45

DDR_B_DQS#5 DDR_B_DQS5

DDR_B_D46 DDR_B_D47

DDR_B_D52 DDR_B_D53

DDR_B_DM6

DDR_B_D54 DDR_B_D55

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

SMB_DATA_S3 SMB_CLK_S3





DDR_B_D[0..63]<7>

DDR_B_DQS[0..7]<7>

DDR_B_DQS#[0..7]<7>

DDR_B_MA[0..15]<7>

DDR3_DRAMRST# <12,7>

DDR_CKE3_DIMMB <7>

M_CLK_DDR3 <7> M_CLK_DDR#3 <7>

DDR_B_BS1 <7> DDR_B_RAS# <7>

DDR_CS2_DIMMB# <7> M_ODT2 <7>

M_ODT3 <7>

1

2

.1U_0402_16V7K

C159

1

2

+VREF_CB

2.2U_0603_6.3V4Z

C160

@

+VREF_CB

VDDQ(1.5V) =

3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs)

6*0603 10uf (PER CONNECTOR)

VTT(0.75V) =

3*0805 10uf

1*0402 0.1uf

4*0402 1uf

1*0402 2.2uf

VDDSPD (3.3V)=

1*0402 2.2uf 1*0402 0.1uf

SMB_DATA_S3 <12,15,36> SMB_CLK_S3 <12,15,36> +0.75VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Layout Note: Place near DIMM

C163

1

2

Layout Note: Place near DIMM

+0.75VS

C174

1U_0402_6.3V6K

1

2

Compal Secret Data

2011/06/15 2012/07/11

Compal Secret Data

(10uF_0603_6.3V)*8

(0.1uF_402_10V)*4

+1.5V

10U_0603_6.3V6M

C164

C165

1

2

C176

1

2

Deciphered Date

2

10U_0603_6.3V6M

C166

1

2

DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

Layout Note: Place near DIMM

10U_0603_6.3V6M

C168

C167

1

2

.1U_0402_16V7K

C170

C169

@

1

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

.1U_0402_16V7K

C171

C172

1

2

DDRIII-SODIMM SLOT2

LA-9631P

1

13 60Wednesday, February 27, 2013

1.0

www.laptopfix.vn

5

W=20milsW=20mils

+RTCBAT T+RTCVCC

R99

1K_0402_5%

1 2

1

C179

C179 1U_0603_1 0V4Z

1U_0603_1 0V4Z

2

D D

+RTCVCC

1 2

R101 1M_0402_ 5%R101 1M_0402_5%

1 2

R102 330K_040 2_5%R1 02 330K_0402_5%

INTVRMEN

H󶁪󶁪󶁪󶁪Integrated VRM enable

*

L󶁪󶁪󶁪󶁪Integrated VRM disable

SM_INTRU DER#

PCH_INTV RMEN

+RTCVCC

R103 20K_040 2_5%R103 20K_04 02_5%

R100 20K_0402_5%R100 20K_0402_5 %

(INTVRMEN should always be pull high.)

+3VS

1 2

R105 1K_0402_ 5%@R 105 1K_0402_5%@

HIGH= Enable ( No Reboot ) LOW= Disable (Default)

*

C C

+3V_PCH

R106 1K_0402_ 5%@R106 1K_0402_5%@

Low = Disabled (Default)

*

High = Enabled [Flash Descriptor Security Overide]

+3V_PCH

R108 1K_0402_5 %R108 1K_04 02_5%

This signal has a weak internal pull-down On Die PLL VR is supplied by

1.5V when smaple d high

1.8V when sample d low

*

Needs to be pull ed High for Chi ef River platfro m

HDA_BITC LK_AUDIO<41>

HDA_SYNC_ AUDIO<41 >

B B

HDA_RST _AUDIO#< 41>

HDA_SDO UT_AUDIO<41>

12

33_0804_8P 4R_5%

For EMI

RP12

HDA_SPK R

ME_FLAS H

HDA_SYNC

18 27 36 45

HDA_BIT_ CLK

HDA_SYNC_ R

HDA_RST #

ME_FLAS H

ME_FLASH<42>

R878

1M_0402_5 %

1 2

check with vender

Del Q10 check with codec VDDIO using 3VALW

DPDG1.1

0_0402_5%

18P_0402_5 0V8J

C183

1U_0603_1 0V4Z

1 2

C182

1U_0603_1 0V4Z

+5VS

G

2

S

22P_0402_5 0V8J

@

R104

C180

HDA_SPK R<41>

HDA_SDIN 0<41>

Q10

Q10 LBSS138LT 1G_SOT-23-3

LBSS138LT 1G_SOT-23-3

13

D

33_0402_5%

R124;c190 close to U4.T3 pin

A A

4

1 2

R98 10M _0402_5%R98 10M _0402_5%

Y1

1 2

1

2

SHORT PADS

CLRP2

@

1

12

2

SHORT PADS

CLRP3

1

12

@

2

HDA_SYNC

SPI_CLK_P CH_R

12

R124

@

C190

@

PCH_RTC X1

PCH_RTC X2

32.768KHZ_ 12.5PF_CM31532 768DZFT

1

C181

C181 18P_0402_5 0V8J

18P_0402_5 0V8J

2

PCH_RTC X1

PCH_RTC X2

PCH_RTC RST#

PCH_SRT CRST#

SM_INTRU DER#

PCH_INTV RMEN

HDA_BIT_ CLK

HDA_SYNC

HDA_SPK R

HDA_RST #

HDA_SDIN 0

ME_FLAS H

PCH_GPIO33

PCH_GPIO13

PCH_JTA G_TCK

PCH_JTA G_TMS

PCH_JTA G_TDI

PCH_JTA G_TDO

SPI_CLK_P CH_R

SPI_SB_C S0#

SPI_SI

SPI_SO_R

For EMI

U4A

A20

RTCX1

C20

RTCX2

D20

RTCRST #

G22

SRTCRS T#

K22

INTRUDE R#

C17

INTVRME N

N34

HDA_BCL K

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST #

E34

HDA_SDIN 0

G34

HDA_SDIN 1

C34

HDA_SDIN 2

A34

HDA_SDIN 3

A36

HDA_SDO

C36

HDA_DOC K_EN# / GPIO33

N32

HDA_DOC K_RST# / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

PANTHE R-POINT_FCBGA98 9

HM76@

HM76@ SA00005FH 70

SA00005FH 70 S IC BD82HM 76 SLJ8E C1 BGA 9 89P PCH C38!

S IC BD82HM 76 SLJ8E C1 BGA 9 89P PCH C38!

U4

HM70@

U4

HM70@

SA00005M Q80

SA00005M Q80 IC BD82HM 70 SJTNV C1 BGA 98 9P PCH C38!

IC BD82HM 70 SJTNV C1 BGA 98 9P PCH C38!

U4

NM70@

U4

NM70@

SA00005W U60

SA00005W U60 S IC BD82NM 70 SLJTA C1 BGA 9 89P PCH C38!

S IC BD82NM 70 SLJTA C1 BGA 9 89P PCH C38!

RTCIHDA

JTAG

SPI

3

FWH0 / LA D0 FWH1 / LA D1 FWH2 / LA D2 FWH3 / LA D3

LPC

FWH4 / LF RAME#

LDRQ0#

LDRQ1# / GPIO23

SERIRQ

SATA0RX N SATA0RX P SATA0TX N

SATA0TX P

SATA1RX N SATA1RX P

SATA 6G

SATA1TX N

SATA1TX P

SATA2RX N SATA2RX P SATA2TX N

SATA2TX P

SATA3RX N SATA3RX P SATA3TX N

SATA3TX P

SATA4RX N SATA4RX P SATA4TX N

SATA

SATA4TX P

SATA5RX N SATA5RX P SATA5TX N

SATA5TX P

SATAICOM PO

SATAICOM PI

SATA3RC OMPO

SATA3COM PI

SATA3RB IAS

SATALED #

SATA0GP / GP IO21

SATA1GP / GP IO19

PCH_GPIO16<19>

CLRP2

Shunt

Open

CLRP3

Open

C38

LPC_AD0

A38

LPC_AD1

B37

LPC_AD2

C37

LPC_AD3

D36

LPC_FRA ME#

E36 K36

V5

SERIRQSERIRQ

AM3

SATA_DT X_C_IRX_N0

AM1

SATA_DT X_C_IRX_P0

AP7

SATA_ITX_ C_DRX_N0

AP5

SATA_ITX_ C_DRX_P0

AM10 AM8 AP11 AP10

AD7

SATA_DT X_C_IRX_N2

AD5

SATA_DT X_C_IRX_P2

AH5

SATA_ITX_ C_DRX_N2

AH4

SATA_ITX_ C_DRX_P2

AB8 AB10 AF3 AF1

Y7 Y5 AD3 AD1

Y3 Y1 AB3 AB1

Y11

Y10

AB12

AB13

AH1

RBIAS_SA TA3

P3

SATALED #

V14

PCH_GPIO21

P1

BBS_BIT0_ R

SATA_COM P

SATA3_C OMP

BBS_BIT0_ R SATALED # PCH_GPIO16 SERIRQ

CMOS setting

Clear CMOS

Keep CMOS

TPM setting

Clear ME RTC RegistersShunt

Keep ME RTC Registers

LPC_AD0 <42> LPC_AD1 <42> LPC_AD2 <42> LPC_AD3 <42>

LPC_FRA ME# <42>

SERIRQ <42>

R111

37.4_0402_1%

1 2

R113

49.9_0402_1%

1 2

R115

750_0402_1 %

+3V_ROM

1 2

R127

1 2

R129

RP17

10K_0804_8 P4R_5%

EC and Mini card debug port

SATA_DT X_C_IRX_N0 <40> SATA_DT X_C_IRX_P0 < 40> SATA_ITX_ C_DRX_N0 <40> SATA_ITX_ C_DRX_P0 < 40>

SATA_DT X_C_IRX_N2 <40> SATA_DT X_C_IRX_P2 < 40> SATA_ITX_ C_DRX_N2 <40> SATA_ITX_ C_DRX_P2 <40>

+V1.05S_VCCP

SPI_WP #

3.3K_0402_5 %

SPI_HOLD#

3.3K_0402_5 %

+3VS

18 27 36 45

2

SPI_SB_C S0#

HDD

ODD

1 2

R131

R131 0_0402_5%

0_0402_5%

@

For EMI

SPI_SO_R SPI_SI SPI_CLK_P CH_R SPI_SB_C S0#

1 2 3

SPI_WP #

4

1

Share ROM

@

RP2

1 8 2 7 3 6 4 5

0_0804_8P4 R_5%

EC_SPI_S O EC_SPI_S I EC_SPI_C LK EC_SPI_C S#

EC_SPI_S O <42> EC_SPI_S I <42> EC_SPI_C LK <42> EC_SPI_C S# <42>

Share ROM

U5

CS# SO WP# GND

W25Q64F VSSIQ_SO8

SA000039A 30

SA000039A 30 S IC FL 64M W 25Q64FVSSIQ SOIC 8P SPI ROM

S IC FL 64M W 25Q64FVSSIQ SOIC 8P SPI ROM

VCC

HOLD#

SCLK

8 7

SPI_HOLD#SPI_SO_R SPI_SO_L

6 5

SI

1 2

For EMI

+3V_ROM

R133

R133 0_0402_5%

0_0402_5%

@

SPI_CLK_P CH_RSPI_CLK_1 SPI_SI

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PCH (1/9) SATA,HDA,SPI, LPC, XDP

Size Document Number Rev

Custom

LA-9631P

Date: Sheet of

2

Date: Sheet of

14 60Wednesday, M arch 06, 2013

1

1.0

5

LAN

WLAN

D D

C C

LAN

WLAN

B B

PCIE_PRX _DTX_N1<37>

PCIE_PRX _DTX_P1<37> PCIE_PTX _C_DRX_N1<37> PCIE_PTX _C_DRX_P1<37>

PCIE_PRX _DTX_N2<36>

PCIE_PRX _DTX_P2<36> PCIE_PTX _C_DRX_N2<36> PCIE_PTX _C_DRX_P2<36>

CLK_PCIE _LAN#< 37> CLK_PCIE _LAN<37>

CLKREQ_L AN#<37>

CLK_PCIE _WLAN1#<36> CLK_PCIE _WLAN1<36>

CLKREQ_W LAN#<36>

+3V_PCH

+3VS

1 2

C192 .1U_0402_ 16V7KC192 .1U_0402_ 16V7K

1 2

C193 .1U_0402_ 16V7KC193 .1U_0402_ 16V7K

1 2

C194 .1U_0402_ 16V7KC194 .1U_0402_ 16V7K

1 2

C195 .1U_0402_ 16V7KC195 .1U_0402_ 16V7K

1 2

R153 0_0402_ 5%@R153 0_0402_ 5%@

1 2

R154 0_0402_ 5%@R154 0_0402_ 5%@

R152 10K_0402_ 5%R1 52 10K_0402_5%

1 2

R156 0_0402_ 5%@R156 0_0402_ 5%@

1 2

R165 0_0402_ 5%@R165 0_0402_ 5%@

R158 10K_0402 _5%R158 10K_0402_5 %

12

For EMI

4

PCIE_PRX _DTX_N1 PCIE_PRX _DTX_P1 PCIE_PTX _DRX_N1 PCIE_PTX _DRX_P1

PCIE_PRX _DTX_N2 PCIE_PRX _DTX_P2 PCIE_PTX _DRX_N2 PCIE_PTX _DRX_P2

CLK_PCIE _LAN#_R CLK_PCIE _LAN_R

CLK_PCIE _WLAN1#_R CLK_PCIE _WLAN1_R

PCH_GPIO20

PCH_GPIO25

PCH_GPIO26

PCH_GPIO44

PCH_GPIO56

PCH_GPIO45

PCH_GPIO46

PCIE_CLK_8N PCIE_CLK_8P

U4B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_P CIE0N

Y39

CLKOUT_P CIE0P

J2

PCIECLKR Q0# / GPIO73

AB49

CLKOUT_P CIE1N

AB47

CLKOUT_P CIE1P

M1

PCIECLKR Q1# / GPIO18

AA48

CLKOUT_P CIE2N

AA47

CLKOUT_P CIE2P

V10

PCIECLKR Q2# / GPIO20

Y37

CLKOUT_P CIE3N

Y36

CLKOUT_P CIE3P

A8

PCIECLKR Q3# / GPIO25

Y43

CLKOUT_P CIE4N

Y45

CLKOUT_P CIE4P

L12

PCIECLKR Q4# / GPIO26

V45

CLKOUT_P CIE5N

V46

CLKOUT_P CIE5P

L14

PCIECLKR Q5# / GPIO44

AB42

CLKOUT_P EG_B_N

AB40

CLKOUT_P EG_B_P

E6

PEG_B_CL KRQ# / GPIO56

V40

CLKOUT_P CIE6N

V42

CLKOUT_P CIE6P

T13

PCIECLKR Q6# / GPIO45

V38

CLKOUT_P CIE7N

V37

CLKOUT_P CIE7P

K12

PCIECLKR Q7# / GPIO46

AK14

CLKOUT_IT PXDP_N

AK13

CLKOUT_IT PXDP_P

PANTHE R-POINT_FCBGA98 9

HM76@

SMBUSController

SML1ALE RT# / PCHHOT# / GPIO74

PCI-E*

CLOCKS

3

SMBALER T# / GPIO11

SML0ALE RT# / GPIO60

SML0DAT A

SML1CLK / GPIO58

SML1DAT A / GPIO75

Link

PEG_A_CL KRQ# / GPIO47

CLKOUT_P EG_A_N

CLKOUT_P EG_A_P

CLKOUT_D MI_N CLKOUT_D MI_P

CLKOUT_D P_N

CLKOUT_D P_P

CLKIN_DM I_N CLKIN_DM I_P

CLKIN_GND 1_N CLKIN_GND 1_P

CLKIN_DOT _96N CLKIN_DOT _96P

CLKIN_SA TA_N CLKIN_SA TA_P

REFCLK1 4IN

CLKIN_PC ILOOPBACK

XTAL25_IN

XTAL25_OU T

XCLK_RC OMP

CLKOUTFL EX0 / GPIO64

CLKOUTFL EX1 / GPIO65

CLKOUTFL EX2 / GPIO66

CLKOUTFL EX3 / GPIO67

FLEX CLOCKS

E12

H14

SMBCLK

C9

SMBDAT A

A12

C8

SML0CLK

G12

C13

E14

M16

M7

CL_CLK1

T11

CL_DATA 1

P10

CL_RST1#

M10

AB37 AB38

AV22 AU22

AM12 AM13

BF18 BE18

BJ30 BG30

G24 E24

AK7 AK5

K45

H45

V47 V49

Y47

K43

F47

H47

K49

BIOS Request SKU ID

PCH_GPI01 1

PCH_SM BCLK

PCH_SM BDATA

DRAMRS T_CNTRL_PCH

PCH_SM L0CLK

PCH_SM L0DATA

PCH_HOT #

SML1CLK

SML1DAT A

CLK_PCIE _VGA#_R CLK_PCIE _VGA_R

CLK_CPU _DMI# CLK_CPU _DMI

CLK_BUF _CPU_DMI# CLK_BUF _CPU_DMI

CLKIN_DM I2# CLKIN_DM I2

CLK_BUF _DREF_96M# CLK_BUF _DREF_96M

CLK_BUF _PCIE_SATA# CLK_BUF _PCIE_SATA

CLK_BUF _ICH_14M

CLK_PCI_L PBACK

XTAL25_IN XTAL25_OU T

XCLK_RC OMP

27M_SSC

PCH_GPIO67

R140 10K_0402_ 5%R140 10K_0402_5%

+3V_PCH

1 2

12

R134 10K_0402_ 5%R134 10K_0402_5%

1K_0402_5%

12

R143

R143 10K_0402_5 %

10K_0402_5 %

1 2

R145 10K_0402_ 5%

1 2

R168 0_0402_5%@R168 0_0402_5%@

1 2

R172 0_0402_5%@R172 0_0402_5%@

CLK_CPU _DMI# <6> CLK_CPU _DMI <6>

1 2

R155 10K_0402_ 5%R1 55 10K_0402_5%

1 2

R157 10K_0402_ 5%R1 57 10K_0402_5%

1 2

R159 10K_0402_ 5%R1 59 10K_0402_5%

1 2

R160 10K_0402_ 5%R1 60 10K_0402_5%

1 2

R162 10K_0402_ 5%R1 62 10K_0402_5%

1 2

R163 10K_0402_ 5%R1 63 10K_0402_5%

1 2

R164 10K_0402_ 5%R1 64 10K_0402_5%

1 2

R166 10K_0402_ 5%R1 66 10K_0402_5%

1 2

R167 10K_0402_ 5%R1 67 10K_0402_5%

R171

90.9_0402_1%

1 2

PCH_GPIO67 <19>

1K_0402_5%

+3V_PCH

@

For EMI

CLK_PCI_L PBACK <18 >

2

+3V_PCH

12

R139

+V1.05S_VCCP

DRAMRS T_CNTRL_PCH <10,7>

+3V_PCH

CLK_REQ_ VGA# <24>

CLK_PCIE _VGA# <23>

CLK_PCIE _VGA <23>

XTAL25_IN

XTAL25_OU T

C196

12P_0402_5 0V8J

Q60A

Q60A 2N7002DW -T/R7_SOT363-6

2N7002DW -T/R7_SOT363-6

6 1

3

6 1

3

SMB_CLK _S3SMB _CLK_S3

2

+3VS

5

4

SMB_DA TA_S3SMB_DA TA_S3

2N7002DW -T/R7_SOT363-6

2N7002DW -T/R7_SOT363-6 Q60B

Q60B

Q61A

Q61A 2N7002DW -T/R7_SOT363-6

2N7002DW -T/R7_SOT363-6

2N7002DW -T/R7_SOT363-6 Q61B

Q61B

EC_SMB _CK2

2

+3VS

5

4

EC_SMB _DA2

1 2

R169 1M_0402 _5%R169 1M _0402_5%

3

2

Y2

25MHZ_10 PF_7V25000014

1

2

OSC

NC

1

SMB_CLK _S3 <12,13,36>

DIMM1 DIMM2 Mini Card

SMB_DA TA_S3 < 12,13,36>

EC_SMB _CK2 <24,39,42>

VGA EC Thermal Sensor

EC_SMB _DA2 <24,39,42>

2.2K_0402_5 %

PCH_SM L0CLK

PCH_SM L0DATA

SML1DAT A EC_SMB _DA2 SML1CLK EC_SMB _CK2

PCH_SM BCLK SMB_CLK _S3 PCH_SM BDATA SMB_DA TA_S3

4

NC

1

OSC

1

12P_0402_5 0V8J

2

+3V_PCH

R544

1 2

+3V_PCH

RP23

18 27 36 45

2.2K_0804_8 P4R_5%

+3V_PCH

RP24

18 27 36 45

2.2K_0804_8 P4R_5%

C197

R545

2.2K_0402_5 %

+3VS

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH (2/9) PCIE, SMBUS, CLK

LA-9631P

1

15 60Wednesday, February 27, 2 013

1.0

5

D D

@

U15

U15 MC74VHC 1G08DFT2G SC70 5P

MC74VHC 1G08DFT2G SC70 5P

3

1

VGATE<42,54>

PCH_PW ROK

C C

+3V_PCH

12

B B

R194 10K_0402 _5%R194 10K_0402 _5%

R197 10K_0402 _5%

+3V_PCH

R309 200K_040 2_5%R309 200K_040 2_5%

R192 300_0402_5%R192 300_0402 _5%

12

@

1 2

A

2

B

+3VS

G

4

Y

P

5

PM_DRA M_PWRGD

SUSW ARN#

EC_RSMRST#

AC_PRES ENT_R

SYS_PWR OK

12

@

R180

R180 10K_0402_5 %

10K_0402_5 %

PCH_PW ROK<42>

PM_DRA M_PWRGD<6>

EC_RSM RST#<42>

PBTN_OUT #<42>

ACIN<24,4 2,46,48>

4

DMI_CTX_ PRX_N0<5> DMI_CTX_ PRX_N1<5> DMI_CTX_ PRX_N2<5> DMI_CTX_ PRX_N3<5>

DMI_CTX_ PRX_P0<5> DMI_CTX_ PRX_P1<5> DMI_CTX_ PRX_P2<5> DMI_CTX_ PRX_P3<5>

DMI_CRX _PTX_N0<5> DMI_CRX _PTX_N1<5> DMI_CRX _PTX_N2<5> DMI_CRX _PTX_N3<5>

DMI_CRX _PTX_P0<5> DMI_CRX _PTX_P1<5> DMI_CRX _PTX_P2<5> DMI_CRX _PTX_P3<5>

+V1.05S_VCCP

SUSACK# is only used on platfor m that support the Deep Sx state.

D29

CH751H-40 PT_SOD323-2

1 2

R177 49.9_0402_1%R177 49.9_0402_1%

1 2

R178 750_0402_1%R178 750_0402_1%

4mil width and place within 500mil of the PCH

SYS_RST#<19>

SYS_PWR OK<42>

21

DMI_CTX_ PRX_N0 DMI_CTX_ PRX_N1 DMI_CTX_ PRX_N2 DMI_CTX_ PRX_N3

DMI_CTX_ PRX_P0 DMI_CTX_ PRX_P1 DMI_CTX_ PRX_P2 DMI_CTX_ PRX_P3

DMI_CRX _PTX_N0 DMI_CRX _PTX_N1 DMI_CRX _PTX_N2 DMI_CRX _PTX_N3

DMI_CRX _PTX_P0 DMI_CRX _PTX_P1 DMI_CRX _PTX_P2 DMI_CRX _PTX_P3

DMI_IRCOM P

RBIAS_CP Y

SYS_RST#

SYS_PWR OK

PCH_PWROK

PM_DRA M_PWRGD

SUSW ARN#

AC_PRES ENT_R

PCH_GPIO72

RI#

U4C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOM P

BG25

DMI_IRCOM P

BH21

DMI2RBIAS

C12

SUSACK #

K3

SYS_RESET #

P12

SYS_PWR OK

L22

PWROK

L10

APWR OK

B13

DRAMPW ROK

C21

RSMRST #

K16

SUSW ARN#/SUSPW RDNACK/GPIO30

E20

PWRB TN#

H20

ACPRES ENT / GPIO31

E10

BATLOW # / GPIO72

A10

RI#

PANTHE R-POINT_FCBGA98 9

HM76@

3

BJ14

FDI_RXN0

AY14

FDI_RXN1

BE14

FDI_RXN2

BH13

FDI_RXN3

BC12

FDI_RXN4

BJ12

FDI_RXN5

BG10

FDI_RXN6

BG9

FDI_RXN7

BG14

FDI_RXP0

BB14

FDI_RXP1

BF14

FDI_RXP2

BG13

FDI_RXP3

BE12

FDI_RXP4

BG12

FDI_RXP5

BJ10

FDI_RXP6

DMI

FDI

DMI

FDI

FDI_FSYNC0

FDI_FSYNC1

CLKRUN # / GPIO32

SUS_STA T# / GPIO61

SUSCLK / GP IO62

SLP_S5# / GPIO6 3

System Power Management

SLP_LAN# / GPIO29

FDI_RXP7

FDI_INT

FDI_LSYNC0

FDI_LSYNC1

DSWV RMEN

DPWR OK

WAKE#

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS #

PMSYNCH

BH9

AW16

AV12

BC10

AV14

BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

2

FDI_CTX_P RX_N0 FDI_CTX_P RX_N1 FDI_CTX_P RX_N2 FDI_CTX_P RX_N3 FDI_CTX_P RX_N4 FDI_CTX_P RX_N5 FDI_CTX_P RX_N6 FDI_CTX_P RX_N7

FDI_CTX_P RX_P0 FDI_CTX_P RX_P1 FDI_CTX_P RX_P2 FDI_CTX_P RX_P3 FDI_CTX_P RX_P4 FDI_CTX_P RX_P5 FDI_CTX_P RX_P6 FDI_CTX_P RX_P7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWOD VREN

EC_RSMRST#

PM_CLKR UN#

SUS_STA T#

FDI_CTX_P RX_N0 <5> FDI_CTX_P RX_N1 <5> FDI_CTX_P RX_N2 <5> FDI_CTX_P RX_N3 <5> FDI_CTX_P RX_N4 <5> FDI_CTX_P RX_N5 <5> FDI_CTX_P RX_N6 <5> FDI_CTX_P RX_N7 <5>

FDI_CTX_P RX_P0 <5> FDI_CTX_P RX_P1 <5> FDI_CTX_P RX_P2 <5> FDI_CTX_P RX_P3 <5> FDI_CTX_P RX_P4 <5> FDI_CTX_P RX_P5 <5> FDI_CTX_P RX_P6 <5> FDI_CTX_P RX_P7 <5>

FDI_INT <5>

FDI_FSYNC0 < 5>

FDI_FSYNC1 < 5>

FDI_LSYNC0 <5>

FDI_LSYNC1 <5>

PCIE_W AKE# <36>

SUSCLK <42>

PM_SLP_ S5# <4 2>

PM_SLP_ S4# <4 2>

PM_SLP_ S3# <4 2>

Can be left NC when IAMT is not support on the platfrom

H_PM_SYNC

H_PM_SYNC <6>

Can be left NC i f no use integr ated LAN.

1

DSWOD VREN

*

R299 10K_0402 _5%R299 10K_0402 _5%

R179 330K_0402 _5%R179 330K_0402 _5%

R183 330K_0402 _5%@R183 330K _0402_5%@

DSWODVREN - On D ie DSW VR Enabl e H󶁪Enable L󶁪Disable

12

+RTCVCC

12

+3V_PCH

RP25

18

A A

10K_0804_8 P4R_5%

27 36 45

5

PCIE_W AKE# RI# EC_SMI#

EC_SMI# <19 ,42>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH (3/9) DMI,FDI,PM,

LA-9631P

1

1.0

16 60Wednesday, February 27, 2 013

1.0

5

R438

D D

C C

R438

100K_0402_1%

+3VS

RP14

2.2K_0804_8P4R_5%

RP20

150_0804_8P4R_1%

12

18

EDID_DATA

27

EDID_CLK

36

CTRL_DATA

45

CTRL_CLK

18

DAC_BLU

27

DAC_GRN

36

DAC_RED

45

ENBKL

Max = 800 mils

DAC_BLU<34>

B B

+3VS

12

R524

R559

2.2K_0402_5%

R524

2.2K_0402_5%

CRT_DDC_CL K CRT_DDC_DAT A

DAC_GRN<34>

DAC_RED<34>

4

U4D

CRT_IREF

12

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CL K

M40

CRT_DDC_DAT A

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

PANTHER-POINT_FCBGA989

HM76@

ENBKL<42> PCH_ENVDD<33>

PCH_PWM<33>

EDID_CLK<33>

EDID_DATA<33>

12

R2062.37K_0402_1 % R20 62.37K_0402_1%

LVDS_ACLK#<33> LVDS_ACLK<33>

LVDS_A0#<33> LVDS_A1#<33> LVDS_A2#<33>

LVDS_A0<33> LVDS_A1<33> LVDS_A2<33>

CRT_DDC_CL K<34> CRT_DDC_DAT A<34>

CRT_HSYNC<34> CRT_VSYNC<34>

DAC_BLU

DAC_GRN

DAC_RED

1K_0402_1%

EDID_CLK EDID_DATA

CTRL_CLK CTRL_DATA

LVDS_IBG

LVD_VREF

CRT_DDC_CL K CRT_DDC_DAT A

R211

3

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

AP43 AP45

AM42 AM40

AP39 AP40

P38 M39

AT49 AT47 AT40

AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49

P46 P42

AP47 AP49 AT38

AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49

M43 M36

AT45 AT43 BH41

BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42

SDVO_TVCLKINN

SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_INTN SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN DDPB_AUXP

DDPB_HPD

LVDS

DDPC_CTRLCLK

DDPC_CTRLDAT A

DDPC_AUXN DDPC_AUXP

DDPC_HPD

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDAT A

DDPD_AUXN DDPD_AUXP

CRT

DDPD_HPD

HDMICLK_NB HDMIDAT_NB

TMDS_B_DATA2#_PCH TMDS_B_DATA2_PCH TMDS_B_DATA1#_PCH TMDS_B_DATA1_PCH TMDS_B_DATA0#_PCH TMDS_B_DATA0_PCH TMDS_B_CLK#_PCH TMDS_B_CLK_PCH

2

HDMICLK_NB <35> HDMIDAT_NB <3 5>

TMDS_B_HPD# <35>

1 2

C200 .1U_0402_16V7KHDMI@ C200 .1U_0402 _16V7KHDMI@

1 2

C201 .1U_0402_16V7KHDMI@ C201 .1U_0402 _16V7KHDMI@

1 2

C202 .1U_0402_16V7KHDMI@ C202 .1U_0402 _16V7KHDMI@

1 2

C203 .1U_0402_16V7KHDMI@ C203 .1U_0402 _16V7KHDMI@

1 2

C204 .1U_0402_16V7KHDMI@ C204 .1U_0402 _16V7KHDMI@

1 2

C205 .1U_0402_16V7KHDMI@ C205 .1U_0402 _16V7KHDMI@

1 2

C206 .1U_0402_16V7KHDMI@ C206 .1U_0402 _16V7KHDMI@

1 2

C207 .1U_0402_16V7KHDMI@ C207 .1U_0402 _16V7KHDMI@

CAP move on Conn, side

HDMI_TX2-_CK <35> HDMI_TX2+_CK <35> HDMI_TX1-_CK <35> HDMI_TX1+_CK <35> HDMI_TX0-_CK <35> HDMI_TX0+_CK <35> HDMI_CLK-_CK <35> HDMI_CLK+_CK <35>

1

HDMI D2

HDMI D1

HDMI

HDMI D0

HDMI CLK

A A

Security Classification

2011/06/15 2012/07/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

3

Compal Secret Data

Deciphered Date

Title

PCH (4/9) LVDS,CRT,DP,HDMI

Size Docum ent Number Rev

B

LA-9631P

Date: Sheet of

2

Date: Sheet of

17 60Wednesday, February 27, 2013

1

1.0

www.laptopfix.vn

5

RP1

RP7

1 2

Bit11

0 1

1

0

1 2 3 4 5

8.2K_1206_10P8R_5%

18 27 36 45

Pull-up resistors are not required on these signals

Boot BIOS Destination

Bit10

0

1

*

0

PCI_PIRQA# PCI_PIRQD# PCI_PIRQC# PCI_PIRQB#

+3VS

D D

+3VS

8.2K_0804_8P4R_5%

R292 8.2K_0402_5%@R292 8.2K_0402_5%@

R557 8.2K_0402_5%@R557 8.2K_0402_5%@

C C

Boot BIOS Strap bit1 BBS1

GNT1#/ GPIO51

B B

+3VS

10 9

PCH_GPIO2

8

DGPU_PWR_EN

7

PCH_GPIO4

6

PCH_GPIO3

DGPU_HOLD_RST#

PCH_WL_OFF# PCH_GPIO5

PCH_GPIO52

PCH_GPIO51

PCH_GPIO53

Reserved

SPI

(Default)

LPC

DGPU_HOLD_RST#<23>

DGPU_PWR_EN<25,42,51,53>

PCH_WL_OFF#<36>

GPIO55

PCH_WL_OFF#

A16 swap overide Strap/Top-Block Swap Override jumper

PCI_GNT3#

A A

1 2

R215 1K_0402_5%@R215 1K_0402_5%@

Low=A16 swap override/Top-Block Swap Override enabled High=Default

PLT_RST#<23,36,37,42>

1U_0402_6.3V6K

5

C208

*

@C208

@

CLK_PCI_LPBACK<15>

CLK_PCI_EC<42>

R222

@ R222

@

1 2

0_0402_5%

12

1

R223

R223 100K_0402_5%

100K_0402_5%

2

USB3_RX1_N<44> USB3_RX2_N<44>

USB3_RX1_P<44> USB3_RX2_P<44>

USB3_TX1_N<44> USB3_TX2_N<44>

USB3_TX1_P<44> USB3_TX2_P<44>

PCH_PLTRST#

4

USB3_RX1_N USB3_RX2_N USB3_RX3_N USB3_RX4_N USB3_RX1_P USB3_RX2_P USB3_RX3_P USB3_RX4_P USB3_TX1_N USB3_TX2_N USB3_TX3_N USB3_TX4_N USB3_TX1_P USB3_TX2_P USB3_TX3_P USB3_TX4_P

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

PCH_GPIO52

PCH_GPIO51 PCH_GPIO53 PCH_WL_OFF#

PCH_GPIO2 PCH_GPIO3 PCH_GPIO4 PCH_GPIO5

PCI_PME#

PCH_PLTRST#<6>

1 2 1 2

For EMI

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

www.laptopfix.vn

PCH_PLTRST#

CLK_PCI_LPBACK_R

R21922_0402_5% R21922_0402_5%

CLK_PCI_EC_R

R22022_0402_5% R22022_0402_5%

CLK_PCI_DB_R

3

U4E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28

USB3Rn1

BC30

USB3Rn2

BE32

USB3Rn3

BJ32

USB3Rn4

BC28

USB3Rp1

BE30

USB3Rp2

BF32

USB3Rp3

BG32

USB3Rp4

AV26

USB3Tn1

BB26

USB3Tn2

AU28

USB3Tn3

AY30

USB3Tn4

AU26

USB3Tp1

AY26

USB3Tp2

AV28

USB3Tp3

AW30

USB3Tp4

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

PANTHER-POINT_FCBGA989

HM76@

2011/06/15 2012/07/11

3

RSVD

PCI

USB

Compal Secret Data

Deciphered Date

RSVD1 RSVD2 RSVD3 RSVD4

RSVD5 RSVD6

RSVD7 RSVD8

RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22

RSVD23 RSVD24

RSVD25

RSVD26 RSVD27

RSVD28 RSVD29

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P

USBP10N

USBP10P

USBP11N

USBP11P

USBP12N

USBP12P

USBP13N

USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

AY7 AV7 AU3 BG4

AT10 BC8

AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6

AV5 AV10

AT8

AY5 BA2

AT12 BF3

C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32

C33

B33

A14 K20 B17 C16 L16 A16 D14 C14

2

USB20_N0 USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3 USB20_P3

USB20_N9 USB20_P9 USB20_N10 USB20_P10 USB20_N11 USB20_P11

USBRBIAS

USB_OC0# USB_OC1# USB_OC2# USB_OC3# USB_OC4# USB_OC5# USB_OC6# USB_OC7#

2

USB Debug Port = Port1 and Port9

USB20_N0 <44> USB20_P0 <44> USB20_N1 <44> USB20_P1 <44> USB20_N2 <44> USB20_P2 <44> USB20_N3 <33> USB20_P3 <33>

USB20_N9 <44> USB20_P9 <44> USB20_N10 <36> USB20_P10 <36> USB20_N11 <43> USB20_P11 <43>

1 2

R218

22.6_0402_1%

Within 500 mils

For LEFT USB3.0 Port

For RIGHT USB2.0 Port

Title

Size Document Number Rev

Custom

Date: Sheet of

LEFT USB

Touch Screen

USB Camera

RIGHT USB

WLAN

CARD READER

USB_OC0# <44>

USB_OC4# <44>

USB_OC0# USB_OC1# USB_OC2# USB_OC3#

+3V_PCH

PCH (5/9) PCI, USB

LA-9631P

(USB 3.0)

RP18

1 2 3 4 5

10K_1206_10P8R_5%

1

+3V_PCH

10 9

USB_OC4#

8

USB_OC5#

7

USB_OC6#

6

USB_OC7#

1.0

18 60Wednesday, February 27, 2013

1

5

D D

GPIO28

On-Die PLL Voltage Regulator

This signal has a weak internal pull up

H󶁪On-Die voltage regulator enable

*

L󶁪On-Die PLL Voltage Regulator disable

*

PCH_GPIO27 (Have internal Pull-High) High: VCCVRM VR Enable Low: VCCVRM VR Disable

C C

+3VS

12

@

B B

BIOS Request SKU ID

R711

UMA@

R708

PX@

A A

1 2

R240 1K_0402_5%@R24 0 1K_0402_5 %@

1 2

R245 10K_0402_5%@R2 45 10K_0402 _5%@

GPIO36, 37 When Unused as GPIO or SATA*GP Use 8.2K-10K pull-down to ground.

R244

@R244

@

10K_0402_5 %

PCH_GPIO37 PCH _GPIO36

R881

R881 10K_0402_5 %

10K_0402_5 %

+3VS

12

R246

UMA@

1 2

0K_0402_5%

1

PCH_GPIO38

PCH_GPIO67

12

R298

PX@

0K_0402_5%

1

PCH_GPIO27

+3VS

12

R250

@R250

@

10K_0402_5 %

12

R547

@R547

@

10K_0402_5 %

PCH_GPIO67 <15>

PCH_GPIO38 PCH_GPIO67

0

0 1

1

EC_LID_OU T#< 42>

DGPU_PW ROK<53>

PU on power side

PCH_BT_ ON#<36>

+3VS

10K_0804_8 P4R_5%

Function

0

SG(Optimus / PX)

Reserved

0

DIS

RP10

+3V_PCH

18 27 36 45

+3VS

INTEL_BT_ OFF#<36>

PCH_GPIO39 SYS_RST# PCH_BT_ ON# PCH_GPIO35

1 1 UMA

5

4

1 2

PCH_GPIO16<14>

+3V_PCH

1 2

4

EC_SCI#<42>

EC_SMI#<16,42>

R230 1K_0402_5%R230 1K_0402_ 5%

ODD_EN<40>

R241

10K_0402_5 %

R242 10K_ 0402_5%R242 10K_0402_5 %

SYS_RST# <16>

PCH_GPIO69 PCH_GPIO70

1 1

1

0 HM76

U4F

PCH_GPIO0

PCH_GPIO1

PCH_GPIO6

EC_SCI#

EC_SMI#

PCH_GPIO12PCH_GPIO28

EC_LID_OU T#

PCH_GPIO16

PCH_BT_ ON#

ODD_EN

PCH_GPIO27

PCH_GPIO28

INTEL_BT_ OFF#

PCH_GPIO35

PCH_GPIO36

PCH_GPIO37

PCH_GPIO38

PCH_GPIO39

PCH_GPIO48

PCH_GPIO49

PCH_GPIO57

T7

BMBUSY# / GPIO 0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PW R_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / G PIO39

V13

SDATAOUT1 / G PIO48

V3

SATA5GP / GPIO49 / TEMP_ALERT#

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

PANTHE R-POINT_FCBGA98 9

HM76@

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

0

10

0

Issued Date

3

Function

NM70

Reserved

HM70

3

+3VS +3VS

NM70@

R702

1 2

PCH_GPIO69 PCH_GPIO70

HM70@

R707

R707 10K_0402_5 %

10K_0402_5 %

TACH4 / GPIO68

TACH5 / GPIO69

TACH6 / GPIO70

TACH7 / GPIO71

A20GATE

PECI

RCIN#

PROCPW RGD

GPIO

THRMTRIP#

INIT3_3V#

DF_TVS

CPU/MISC

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

NC_1

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

NCTF

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

2011/06/15 2012/07/11

10K_0402_5%

HM76@

R707

1 2

10K_0402_5%

C40

PCH_GPIO68

B41

PCH_GPIO69

C41

PCH_GPIO70

A40

PCH_GPIO71

P4

AU16

P5

KBRST#

AY11

AY10

PCH_THR MTRIP#_R

T14

AY1

AH8

AK11

AH10

AK10

P37

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

Compal Secret Data

INIT3_3V

This signal has weak internal P U,can't pull low

NV_CLE

Deciphered Date

2

NM70@

R703

1 2

HM76@

R705

1 2

R239 390_0402_5%R239 390_0402_5%

2

10K_0402_5%

HM70@

R703

R703 10K_0402_5 %

10K_0402_5 %

KBRST# <4 2>

H_CPUPW RGD < 6>

H_THRM TRIP#

PCH_GPIO71

1 0

+3VS

R236

R236 10K_0402_5 %

10K_0402_5 %

1 2

NV_CLE

Weak internal PU,Do not pull low

GATEA20 <42>

DMI Termination Voltage

Set to Vcc when HIGH

Set to Vss when LOW

Title

Size Document Nu mber Rev

Custom

Date: Sheet of

1

Function

1 2

R216

2.2K_0402_5 %

H_SNB_IV B# <6>

1

PCH_GPIO71

200K_0402_ 5%

19 6 0Wednesday, February 27, 2013

Mars XT Sun Pro

KBRST#

R226 10K_0402_5%R2 26 10K_0402 _5%

H_THRM TRIP# <6>

+1.8VS

12

R217 1K_04 02_5%R217 1K_0402_5 %

CLOSE TO THE BRA NCHING POINT

PCH (6/9) GPIO, CPU, MISC

LA-9631P

Mars@

R704

R706

Sun@

+3VS

1 2

10K_0402_5%

1 2

+3VS

1.0

Compal Electronics, Inc.

www.laptopfix.vn

5

+V1.05S_VCCP

D D

+V1.05S_VCCP

This pin can be left as no connect in On-Die VR enabled mode (default).

C C

This pin can be left as no connect in On-Die VR enabled mode (default).

B B

A A

+V1.05S_VCCP

+3VS

10U_0603_6.3V6M

C221

1

2

10U_0603_6.3V6M

1

2

1

2

Near AA23

1U_0402_6.3V6K

C209

1

2

Near AN16

1U_0402_6.3V6K

C222

1

2

1

2

+V1.05S_VCCP

1U_0402_6.3V6K

C210

C211

1

2

1U_0402_6.3V6K

C223

1

2

C227

C227 .1U_0402_16 V7K

.1U_0402_16 V7K

1U_0402_6.3V6K

C212

1

2

+VCCAPL LEXP

1U_0402_6.3V6K

C224

C225

1

2

+1.5VS

+1.05VS_VC CAPLL_FDI

+V1.05S_VCCP

4

U4G

1300mA

AA23

VCCCORE [1]

AC23

VCCCORE [2]

AD21

VCCCORE [3]

AD23

VCCCORE [4]

AF21

VCCCORE [5]

AF23

VCCCORE [6]

AG21

VCCCORE [7]

AG23

VCCCORE [8]

AG24

VCCCORE [9]

AG26

VCCCORE [10]

AG27

VCCCORE [11]

AG29

VCCCORE [12]

AJ23

VCCCORE [13]

AJ26

VCCCORE [14]

AJ27

VCCCORE [15]

AJ29

VCCCORE [16]

AJ31

VCCCORE [17]

AN19

VCCIO[28]

BJ22

VCCAPLL EXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM [2]

BG6

VccAFDIPL L

AP17

VCCIO[27]

AU20

VCCDMI[2 ]

PANTHE R-POINT_FCBGA98 9

HM76@

3711mA

POWER

VCC CORE

VCCIO

FDI

1mA

CRTLVDS

1mA

VCCTX_L VDS[1]

VCCTX_L VDS[2]

60mA

VCCTX_L VDS[3]

VCCTX_L VDS[4]

DMI

20mA

190mA

DFT / SPI HVCMOS

20mA

Share ROM

VCCADA C

VSSADAC

VCCALVD S

VSSALVD S

VCC3_3[6]

VCC3_3[7]

VCCVRM [3]

VCCDMI[1 ]

VCCCLKD MI

VCCDFT ERM[1]

VCCDFT ERM[2]

VCCDFT ERM[3]

VCCDFT ERM[4]

VCCSPI

PCH_PW R_EN<42>

U48

U47

AK36

AK37

AM37

AM38

AP36

AP37

V33

V34

AT16

AT20

AB36

AG16

AG17

AJ16

AJ17

V1

+VCCAD AC

+VCCTX_ LVDS

1

2

Near V33

1U_0402_6 .3V6K

Near AG16

Near V1

@

R40

1 2

0_0402_5%

3

1

C213

0.01U_0402_ 16V7K

2

C216

0.01U_0402_ 16V7K

1

C219

C219 .1U_0402_16 V7K

.1U_0402_16 V7K

2

+1.5VS

Near AB36

C226

1

C228

C228 .1U_0402_16 V7K

.1U_0402_16 V7K

2

1

C230

C230 1U_0402_6 .3V6K

1U_0402_6 .3V6K

2

PCH_PW R_EN_R

.1U_0402_16V7K

C237

1

@

2

1

C217

0.01U_0402_ 16V7K

2

1

2

2N7002H_S OT23-3

L1 Change to 1 o hm P/N S RES 1/10W 1 +- 1% 0603

1

C214

C214 .1U_0402_16 V7K

.1U_0402_16 V7K

2

1

C218

C218 22U_0805_ 6.3V6M

22U_0805_ 6.3V6M

2

+3VS

+1.8VS

+5VALW

12

@

R418

100K_0402_ 5%

Q22

13

D

2

G

S

@

2

+3VS

L2

12

+3VS

1

C395 10U_0603_ 6.3V6M

10U_0603_ 6.3V6M

2

+1.8VS

12

@C395

@

L1 1 _0603_1%L1 1_0 603_1%

1

C215

C215 10U_0603_ 6.3V6M

10U_0603_ 6.3V6M

2

0.1UH_ML F1608DR10KT_10 %_1608

0.1uH inductor, 200mA

Near AT20

Share ROM

+3V_ROM

@

1 2

R413

R413 0_0402_5%

0_0402_5%

@

Q21

Q21 AO3413_SOT 23

AO3413_SOT 23

S

G

2

.1U_0402_16V7K

1

2

D

13

C252

@

1

C220

C220 1U_0402_6 .3V6K

1U_0402_6 .3V6K

2

+V1.05S_VCCP

+3VALW +3V_ROM

1

PCH Power Rail Table Refer to CPU EDS R1.5

Voltage Rail

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

VccCore

VccDMI

Voltage

1.05

3.3

1.05

S0 Iccmax Current (A)

0.001

5

0.001

0.228

0.001

0.075

1.3

0.042

1.05VccIO 3.709

+V1.05S_VC CP

1.05VccASW 0.903

3.3VccSPI 0.01

3.3VccDSW 0.001

1.8 0 .002VccDFTERM

3.3VccRTC 6 uA

3.3VccSus3_3

3.3 / 1.5VccSusHDA

0.065

0.01

VccVRM 1.8 / 1.5 0.167

1.05VccCLKDMI

0.075

VccSSC 1.05 0.095

VccDIFFCLKN 1.05 0.055

VccALVDS 3 .3

0.001

1.8VccTX_LVDS 0.04

+3VS

@

R419

1 2

.1U_0402_16V7K

C243

0_0402_5%

@

1

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH (7/9) PWR

LA-9631P

1

1.0

20 60Wednesday, February 27, 2 013

1.0

5

+3VS

Near T38

C232

C231

10U_0603_6.3V6M

1

@

Near AF17

1

C256

C256 1U_0402_6.3V6K

1U_0402_6.3V6K

2

Near AF33

1

C259

C259 1U_0402_6.3V6K

1U_0402_6.3V6K

2

Near AG33

1

C262

C262 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

+

C250

C250 220U_6.3V_M

220U_6.3V_M

2

D D

On-Die PLL Voltage Regulator

H󶁪On-Die PLL voltage regulator e nable

VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 ,VCCAPLLSATA

C C

+V1.05S_VCCP

L6

1 2

10UH_LB2012T100MR_20%

B B

+V1.05S_VCCP

A A

C232

1U_0402_6.3V6K

1

2

+V1.05S_VCCP

C251

1U_0402_6.3V6K

1

2

+V1.05S_VCCP

+3V_PCH

C187

22U_0805_6.3V6M

1

2

@

.1U_0402_16V7K

Have internal VRM

R268

0_0603_5%

C235 .1U_0402_16V7K

.1U_0402_16V7K

1U_0402_6.3V6K

1

2

C253

1U_0402_6.3V6K

@

1

2

C258

C263

@

C265

4.7U_0603_6.3V6K

1

2

@R268

@

12

@C235

@

C244

1

2

1

2

12

Near T16

Near BJ8

.1U_0402_16V7K

1

2

4

+VCCACLK

1

C234

C234 .1U_0402_16V7K

.1U_0402_16V7K

2

+PCH_VCCDSW

+3VS

+VCCAPLL_CPY_PCH

+VCCSUS1

1

C239

@C239

@

1U_0402_6.3V6K

2

Near AA19

C241

22U_0805_6.3V6M

1

2

C245

1U_0402_6.3V6K

1

2

+VCCRTCEXT

+1.05VS_VCCA_A_DPL

+VCCSST

+1.05VM_VCCSUS

@

C266

+RTCVCC

3

1

C238

C238 .1U_0402_16V7K

.1U_0402_16V7K

2

+V1.05S_VCCP

+3V_PCH

+3VS

1

C261

C261 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+3V_PCH

+V1.05S_VCCP

1

C247

C247 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C249

C249 .1U_0402_16V7K

.1U_0402_16V7K

2

1

C254

C254 .1U_0402_16V7K

.1U_0402_16V7K

2

1

C257

C257 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+V1.05S_VCCP

+3V_PCH

POWER

U4J

AD49

VCCACLK

T16

VCCDSW3_3

V12

DCPSUSBYP

T38

VCC3_3[5]

BH23

VCCAPLLDMI2

AL29

VCCIO[14]

AL24

DCPSUS[3]

AA19

VCCASW[1]

AA21

VCCASW[2]

AA24

C269

.1U_0402_16V7K

VCCASW[3]

AA26

VCCASW[4]

AA27

VCCASW[5]

AA29

VCCASW[6]

AA31

VCCASW[7]

AC26

VCCASW[8]

AC27

VCCASW[9]

AC29

VCCASW[10]

AC31

VCCASW[11]

AD29

VCCASW[12]

AD31

VCCASW[13]

W21

VCCASW[14]

W23

VCCASW[15]

W24

VCCASW[16]

W26

VCCASW[17]

W29

VCCASW[18]

W31

VCCASW[19]

W33

VCCASW[20]

N16

DCPRTC

Y49

VCCVRM[4]

BD47

VCCADPLLA

BF47

VCCADPLLB

AF17

VCCIO[7]

AF33

VCCDIFFCLKN[1]

AF34

VCCDIFFCLKN[2]

AG34

VCCDIFFCLKN[3]

AG33

VCCSSC

V16

DCPSST

T17

DCPSUS[1]

V19

DCPSUS[2]

BJ8

V_PROC_IO

A22

VCCRTC

PANTHER-POINT_FCBGA989

HM76@

C242

22U_0805_6.3V6M

C246

1U_0402_6.3V6K

+1.5VS

C268

1U_0402_6.3V6K

1

2

POWER

VCCIO[29]

119mA

PCI/GPIO/LPCMISC

SATA USB

HDA

VCCSUS3_3[7]

VCCSUS3_3[8]

VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

1mA

VCCSUS3_3[1]

VCCSUS3_3[2]

VCCSUS3_3[3]

VCCSUS3_3[4]

VCCSUS3_3[5]

VCCAPLLSATA

10mA

VCCIO[30]

VCCIO[31]

VCCIO[32]

VCCIO[33]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

1mA

VCC3_3[1]

VCC3_3[8]

VCC3_3[4]

VCC3_3[2]

VCCIO[12]

VCCIO[13]

VCCVRM[1]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

3mA

1010mA

Clock and Miscellaneous

80mA

55mA

95mA

1mA

CPURTC

V5REF

VCCIO[5]

VCCIO[6]

VCCIO[2]

VCCIO[3]

VCCIO[4]

N26

P26

P28

T27

T29

T23

T24

V23

V24

P24

T26

M26

AN23

AN24

P34

N20

N22

P20

P22

AA16

W16

T34

AJ2

AF13

AH13

AH14

AF14

AK1

AF11

AC16

AC17

AD17

T21

V21

T19

P32

+PCH_V5REF_SUS

+VCCA_USBSUS

+PCH_V5REF_RUN

+VCCSATAPLL

+V1.05S_VCCP

1

C233

C233 1U_0402_6.3V6K

1U_0402_6.3V6K

2

C236

.1U_0402_16V7K

1

2

1

2

+1.5VS

1

C271

C271 .1U_0402_16V7K

.1U_0402_16V7K

2

+3V_PCH

C255

C255 .1U_0402_16V7K

.1U_0402_16V7K

2

+3VALW +3V_PCH

PJ1

JUMP_43X118

+3V_PCH

+3VS

+V1.05S_VCCP

On-Die PLL Voltage Regulator

H󶁪On-Die PLL voltage regulator e nable

VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 ,VCCAPLLSATA

1

12

+3V_PCH+5VALW

21

12

D1

12

D1 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

+PCH_V5REF_SUS+1.05VS_VCCA_A_DPL

1

C240

0.1U_0603_25V7K

2

+3VS+5VS

21

D2

D2 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

+PCH_V5REF_RUN

1

C248

C248 1U_0603_10V6K

1U_0603_10V6K

2

R275

R275 10_0402_5%

10_0402_5%

R279

R279 10_0402_5%

10_0402_5%

@

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PCH (8/9) PWR

LA-9631P

1

21 60Wednesday, February 27, 2013

1.0

www.laptopfix.vn

5

D D

C C

B B

A A

5

U4H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

PANTHE R-POINT_FCBGA98 9

HM76@

4

AK38

VSS[80]

AK4

VSS[81]

AK42

VSS[82]

AK46

VSS[83]

AK8

VSS[84]

AL16

VSS[85]

AL17

VSS[86]

AL19

VSS[87]

AL2

VSS[88]

AL21

VSS[89]

AL23

VSS[90]

AL26

VSS[91]

AL27

VSS[92]

AL31

VSS[93]

AL33

VSS[94]

AL34

VSS[95]

AL48

VSS[96]

AM11

VSS[97]

AM14

VSS[98]

AM36

VSS[99]

AM39

VSS[100]

AM43

VSS[101]

AM45

VSS[102]

AM46

VSS[103]

AM7

VSS[104]

AN2

VSS[105]

AN29

VSS[106]

AN3

VSS[107]

AN31

VSS[108]

AP12

VSS[109]

AP19

VSS[110]

AP28

VSS[111]

AP30

VSS[112]

AP32

VSS[113]

AP38

VSS[114]

AP4

VSS[115]

AP42

VSS[116]

AP46

VSS[117]

AP8

VSS[118]

AR2

VSS[119]

AR48

VSS[120]

AT11

VSS[121]

AT13

VSS[122]

AT18

VSS[123]

AT22

VSS[124]

AT26

VSS[125]

AT28

VSS[126]

AT30

VSS[127]

AT32

VSS[128]

AT34

VSS[129]

AT39

VSS[130]

AT42

VSS[131]

AT46

VSS[132]

AT7

VSS[133]

AU24

VSS[134]

AU30

VSS[135]

AV16

VSS[136]

AV20

VSS[137]

AV24

VSS[138]

AV30

VSS[139]

AV38

VSS[140]

AV4

VSS[141]

AV43

VSS[142]

AV8

VSS[143]

AW14

VSS[144]

AW18

VSS[145]

AW2

VSS[146]

AW22

VSS[147]

AW26

VSS[148]

AW28

VSS[149]

AW32

VSS[150]

AW34

VSS[151]

AW36

VSS[152]

AW40

VSS[153]

AW48

VSS[154]

AV11

VSS[155]

AY12

VSS[156]

AY22

VSS[157]

AY28

VSS[158]

4

www.laptopfix.vn

3

U4I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

PANTHE R-POINT_FCBGA98 9

HM76@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[328] VSS[329] VSS[330] VSS[331] VSS[333] VSS[334] VSS[335] VSS[337] VSS[338] VSS[340] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352]

2

H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH (9/9) VSS

LA-9631P

1

1.0

22 60Wednesday, February 27, 2 013

1

22 60Wednesday, February 27, 2 013

1.0

A

B

C

D

E

PCIE_CTX _GRX_P[7..0]< 5>

PCIE_CTX _GRX_N[7..0]<5>

1 1

2 2

3 3

CLK_PCIE _VGA<15> CLK_PCIE _VGA#<15>

PCIE_CTX _GRX_P[7..0]

PCIE_CTX _GRX_N[7..0]

PCIE_CTX _GRX_P0 PCIE_CTX _GRX_N0

PCIE_CTX _GRX_P1 PCIE_CTX _GRX_N1

PCIE_CTX _GRX_P2 PCIE_CTX _GRX_N2

PCIE_CTX _GRX_P3 PCIE_CTX _GRX_N3

PCIE_CTX _GRX_P4 PCIE_CTX _GRX_N4

PCIE_CTX _GRX_P5 PCIE_CTX _GRX_N5

PCIE_CTX _GRX_P6 PCIE_CTX _GRX_N6

PCIE_CTX _GRX_P7 PCIE_CTX _GRX_N7

CLK_PCIE _VGA CLK_PCIE _VGA#

PX@

RV2 1K_0402_5%

GPU_RST#

12

PX@

RV4

RV4 100K_0402_ 5%

100K_0402_ 5%

UV1A

PART 1 0F 9

AA38

PCIE_RX0 P

Y37

PCIE_RX0 N

Y35

PCIE_RX1 P

W36

PCIE_RX1 N

W38

PCIE_RX2 P

V37

PCIE_RX2 N

V35

PCIE_RX3 P

U36

PCIE_RX3 N

U38

PCIE_RX4 P

T37

PCIE_RX4 N

T35

PCIE_RX5 P

R36

PCIE_RX5 N

R38

PCIE_RX6 P

P37

PCIE_RX6 N

P35

PCIE_RX7 P

N36

PCIE_RX7 N

N38

NC

M37

NC

M35

NC

L36

NC

L38

NC

K37

NC

K35

NC

J36

NC

J38

NC

H37

NC

H35

NC

G36

NC

G38

NC

F37

NC

F35

NC

E37

NC

CLOCK

AB35

PCIE_REF CLKP

AA36

PCIE_REF CLKN

AH16

TEST_PG

AA30

PERSTB

SA000061J 60

SA000061J 60 S IC 216-08420 00 A0 MARS XT M 2 BGA C38!

S IC 216-08420 00 A0 MARS XT M 2 BGA C38!

UV1

Sun@

UV1

Sun@

PCIE_TX0P PCIE_TX0N

PCIE_TX1P PCIE_TX1N

PCIE_TX2P PCIE_TX2N

PCIE_TX3P PCIE_TX3N

PCIE_TX4P PCIE_TX4N

PCIE_TX5P PCIE_TX5N

PCIE_TX6P PCIE_TX6N

PCIE_TX7P PCIE_TX7N

PCI EXPRESS INTERFACE

CALIBRATION

PCIE_CAL R_TX

PCIE_CAL R_RX

MARS XT M2 FCBGA 962Mars@

PCIE_CRX _GTX_P[7..0]

PCIE_CRX _GTX_N[7..0]

Y33

PCIE_CRX _C_GTX_P0

Y32

PCIE_CRX _C_GTX_N0

W33

PCIE_CRX _C_GTX_P1

W32

PCIE_CRX _C_GTX_N1 P CIE_CRX_GTX_N 1

U33

PCIE_CRX _C_GTX_P2

U32

PCIE_CRX _C_GTX_N2

U30

PCIE_CRX _C_GTX_P3

U29

PCIE_CRX _C_GTX_N3 P CIE_CRX_GTX_N 3

T33

PCIE_CRX _C_GTX_P4

T32

PCIE_CRX _C_GTX_N4 P CIE_CRX_GTX_N 4

T30

PCIE_CRX _C_GTX_P5

T29

PCIE_CRX _C_GTX_N5 P CIE_CRX_GTX_N 5

P33

PCIE_CRX _C_GTX_P6

P32

PCIE_CRX _C_GTX_N6

P30

PCIE_CRX _C_GTX_P7

P29

PCIE_CRX _C_GTX_N7 P CIE_CRX_GTX_N 7

N33

NC

N32

NC

N30

NC

N29

NC

L33

NC

L32

NC

L30

NC

L29

NC

K33

NC

K32

NC

J33

NC

J32

NC

K30

NC

K29

NC

H33

NC

H32

NC

1 2

Y30

RV1 1.69K_0402_1%PX@RV1 1.69K_04 02_1%PX@

1 2

Y29

RV3 1K_0402_1%PX@RV 3 1K_0402_ 1%PX@

PCIE_CRX _GTX_P[7..0] < 5>

PCIE_CRX _GTX_N[7..0] <5>

1 2

CV10.22U_0402_ 10V6K PX@CV10.22U_04 02_10V6K PX@

1 2

CV20.22U_0402_ 10V6K PX@CV20.22U_04 02_10V6K PX@

1 2

CV30.22U_0402_ 10V6K PX@CV30.22U_04 02_10V6K PX@

1 2

CV40.22U_0402_ 10V6K PX@CV40.22U_04 02_10V6K PX@

1 2

CV50.22U_0402_ 10V6K PX@CV50.22U_04 02_10V6K PX@

1 2

CV60.22U_0402_ 10V6K PX@CV60.22U_04 02_10V6K PX@

1 2

CV70.22U_0402_ 10V6K PX@CV70.22U_04 02_10V6K PX@

1 2

CV80.22U_0402_ 10V6K PX@CV80.22U_04 02_10V6K PX@

1 2

CV90.22U_0402_ 10V6K PX@CV90.22U_04 02_10V6K PX@

1 2

CV100.22U_0402_10V 6K PX@CV100.22U_0402_10V 6K PX@

1 2

CV110.22U_0402_10V 6K PX@CV110.22U_0402_10V 6K PX@

1 2

CV120.22U_0402_10V 6K PX@CV120.22U_0402_10V 6K PX@

1 2

CV130.22U_0402_10V 6K PX@CV130.22U_0402_10V 6K PX@

1 2

CV140.22U_0402_10V 6K PX@CV140.22U_0402_10V 6K PX@

1 2

CV150.22U_0402_10V 6K PX@CV150.22U_0402_10V 6K PX@

1 2

CV160.22U_0402_10V 6K PX@CV160.22U_0402_10V 6K PX@

+0.95VGS

PCIE_CRX _GTX_P0 PCIE_CRX _GTX_N0

PCIE_CRX _GTX_P1

PCIE_CRX _GTX_P2 PCIE_CRX _GTX_N2

PCIE_CRX _GTX_P3

PCIE_CRX _GTX_P4

PCIE_CRX _GTX_P5

PCIE_CRX _GTX_P6 PCIE_CRX _GTX_N6

PCIE_CRX _GTX_P7

LVDS Interface

UV1D

PART 7 0F 9

RSVD/VAR Y_BL

MARS XT M2 FCBGA 962Mars@

RSVD/DIGON

TXCBP_D PB3P

TXCBM_ DPB3N

TX3P_DP B2P

TX3M_DP B2N

TX4P_DP B1P

TX4M_DP B1N

TX5P_DP B0P

TX5M_DP B0N

NC#AF35

NC#AG36

TXCAP_D PA3P

TXCAM_ DPA3N

TX0P_DP A2P

TX0M_DP A2N

TX1P_DP A1P

TX1M_DP A1N

TX2P_DP A0P

TX2M_DP A0N

+3VGS

5

2

B

1

A

3

LVDS CONTROL

LVTMDP

DGPU_HOL D_RST#<18>

PLT_RST#<18,36,37,42>

AK27 AJ27

AK35 AL36

AJ38 AK37

AH35 AJ36

AG38 AH37

AF35 AG36

AP34 AR34

AW37 AU35

AR37 AU39

AP35 AR35

AN36

NC

AP37

NC

P

4

GPU_RST#

Y

G

PX@

UV2

MC74VHC 1G08DFT2G SC70 5P

SUN PRO M2 C38

SA00006BA 20

SA00006BA 20 S IC 216-08410 00 A0 SUN PRO M2 BGA C38!

S IC 216-08410 00 A0 SUN PRO M2 BGA C38!

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

A

B

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

ATI_MarsXTX_M2_PCIE/LVDS

LA-9631P

23 60Wednesday, M arch 06, 2013

E

1.0

A

UV1B

MUTI GFX

+VREFG_GPU

PX_EN

TESTEN

JTAG_TRSTB JTAG_TDI JTAG_TCK JTAG_TMS JTAG_TDO

THERM_D+ THERM_DGPIO_28_FDO

+TSVDD

1

CV32

2

@ CV32

@

1U_0402_6.3V6K

AD29 AC29

AJ21 AK21

AW8

AW3

AW5

AW6

AR10

AW10

AU10 AP10 AV11 AT11 AR12

AW12

AU12 AP12

AJ23 AH23

AK26 AJ26

AH20 AH18 AN16

AH17 AJ17 AK17 AJ13 AH15 AJ16 AK16

AL16 AM16 AM14 AM13

AK14 AG30

AN14 AM17

AL13

AJ14

AK13

AN13

AG32 AG33

AJ19

AK19

AJ20

AK20

AJ24

AH26

AH24

AC30

AK24

AH13

AL21

AD28

AM23

AN23

AK23

AL24 AM24

AF29 AG29

AK32

AL31

AJ32

AJ33

AR8 AU8 AP8

AR3 AR1 AU1 AU3

AP6

AU5 AR6

AU6 AT7 AV7 AN7 AV9 AT9

GENLK_CLK GENLK_VSYNC

SWAPLOCKA SWAPLOCKB

NC NC DBG_CNTL0 NC NC NC DBG_DATA0 DBG_DATA1 DBG_DATA2 DBG_DATA3 DBG_DATA4 DBG_DATA5 DBG_DATA6 DBG_DATA7 DBG_DATA8 DBG_DATA9 DBG_DATA10 DBG_DATA11 DBG_DATA12 DBG_DATA13 DBG_DATA14 DBG_DATA15 DBG_DATA16 DBG_DATA17 DBG_DATA18 DBG_DATA19 DBG_DATA20 DBG_DATA21 DBG_DATA22 DBG_DATA23

SMBCLK

SMBus

SMBDATA

SCL

I2C

SDA

GENERAL PURPOSE I/O

GPIO_0 GPIO_1 GPIO_2

GPIO_5_AC_BATT GPIO_6_TACH GPIO_7_BLON GPIO_8_ROMSO GPIO_9_ROMSI GPIO_10_ROMSCK GPIO_11 GPIO_12 GPIO_13 GPIO_14_HPD2 GPIO_15_PWRCNTL_0 GPIO_16 GPIO_17_THERMAL_INT GPIO_18_HPD3 GPIO_19_CTF GPIO_20_PWRCNTL_1 GPIO_21 GPIO_22_ROMCSB CLKREQB

GPIO_29 GPIO_30

GENERICA GENERICB GENERICC GENERICD GENERICE_HPD4 GENERICF_HPD5 GENERICG_HPD6

CEC_1

HPD1

DBG_VREFG

BACO

PX_EN

DEBUG

TESTEN

JTAG_TRSTB JTAG_TDI JTAG_TCK JTAG_TMS JTAG_TDO

THERMAL

DPLUS DMINUS

GPIO_28_FDO

TS_A

TSVDD TSVSS

GENLK_CLK

T1T 1

GENLK_VSYNC

T2T 2

1 1

VGA_SMB_CK2 VGA_SMB_DA2

2 2

3 3

+1.8VGS

GPIO_28_FDO

4 4

TSVDD MarsCR B Design 120ohm 1 1

0.1u 1 1 1u 1 1 10u 1 1

CLK_REQ_VGA#<15>

PX@

RV13 499_0402_1%

PX@

RV14 249_0402_1%

12

CV23

PX@

H

L

REMOTE1+<39> REMOTE1-<39>

GPU_GPIO0<53>

ACIN<16,42,46,48>

GPU_VID5<53>

GPU_VID1<53>

GPU_VID2<53>

GPU_VID3<53> GPU_VID4<53>

12

.1U_0402_16V7K

MLPS

Disable

Enable

1 2

+VREFG_GPU

+3VGS

@

LV3

LV3 0_0402_5%

0_0402_5%

A

@

DV1

DV1 RB751V_SOD323

RB751V_SOD323

RV12 10K_0402_5%@RV12 10K_0402_5%@

0.60 V level, Please VREFG Divider ans cap close to ASIC

RV18 5.11K_0402_5%

RV19 1K_0402_5%

1 2

RV160_0402_5% @RV160_0402_5% @

1 2

RV170_0402_5% @RV170_0402_5% @

+TSVDD+1.8VGS

GPU_GPIO0

21

GPU_GPIO5 GPU_VID5

GPU_VID1

THM_ALERT#

1 2

GPU_VID2

CLK_REQ_VGA#

GPU_VID3 GPU_VID4

1 2

@

1 2

PX@

1 2

@

RV26 10K_0402_5%

1 2

PX@

RV31 10K_0402_5%

(1.8V@13mA TSVDD)

1

CV31

CV30

2

.1U_0402_16V7K

10U_0603_6.3V6M

PX@ CV31

PX@

PX@ CV30

PX@

PART 2 0F 9

DPA

DPB

DPC

DPD

B

DAC1

MLPS

DDC/AUX

MARS XT M2 FCBGA 962Mars@

B

C

AU24

NC

AV23

NC

AT25

NC

AR24

NC

AU26

NC

AV25

NC

AT27

NC

AR26

AVSSN

HSYNC VSYNC

AVDD

AVSSQ

VDD1DI VSS1DI

NC_SVI2 NC_SVI2 NC_SVI2

DDC1CLK

DDC1DATA

AUX1P AUX1N

DDC2CLK

DDC2DATA

AUX2P AUX2N

DDCVGACLK

DDCVGADATA

RSET

PS_0

PS_1

PS_2

PS_3

NC

AR30

NC

AT29

NC

AV31

NC

AU30

NC

AR32

NC

AT31

NC

AT33

NC

AU32

NC

AU14

NC

AV13

NC

AT15

NC

AR14

NC

AU16

NC

AV15

NC

AT17

NC

AR16

NC

AU20

NC

AT19

NC

AT21

NC

AR20

NC

AU22

NC

AV21

NC

AT23

NC

AR22

NC

AD39

VGA_R

R

AD37

AE36

VGA_G

G

AD35

AF37

VGA_B

B

AE38

AC36

HSYNC

AC38

VSYNC

AB34

RV11 499_0402_1%PX@RV11 499_0402_1%PX@

AD34

+AVDD

AE34

AC33

+VDD1DI

AC34

V13

NC

U13

NC

AF33

NC

AF32

NC

AA29

NC

AG21

NC

AC32

NC

AC31 AD30 AD32

AM34

PS_0

AD31

PS_1

AG31

PS_2

AD33

PS_3

AM26

VGA_CLK

AN26

VGA_DAT

AM27 AL27

AM19 AL19

AN20 AM20

AL30

NC

AM30

NC

AL29

NC

AM29

NC

AN21

NC

AM21

NC

AK30

NC

AK29

NC

AJ30 AJ31

T24T24

T25T25

T26T26

T4T 4 T6T 6

1 2

(1.8V@70mA AVDD)

(1.8V@117mA VDD1DI)

T27T27 T28T28

1

CV20

2

@ CV20

@

.1U_0402_16V7K

10K_0402_5%

VGA_SMB_CK2

VGA_SMB_DA2

GPU_GPIO5

THM_ALERT#

www.laptopfix.vn

+AVDD

.1U_0402_16V7K

1

CV21

2

@ CV21

@

1U_0402_6.3V6K

+3VGS

@

RV24

STRAPS

RV5 100K_0402_5%@RV5 100K_0402_5%@

RV6 2.2K_0402_5%@RV6 2.2K_0402_5%@

1

CV17

CV18

2

@ CV17

@

@ CV18

@

1U_0402_6.3V6K

1 2

LV2

LV2 0_0402_5%

0_0402_5%

1

CV22

2

@ CV22

@

10U_0603_6.3V6M

12

@

RV25

RV25 10K_0402_5%

10K_0402_5%

2N7002DW-T/R7_SOT363-6

C

+3VGS

12

AVDD MarsCRB Design 120ohm 1 1

0.1u 1 1 1u 1 1 10u 1 1

+1.8VGS

1 2

@

LV1

LV1 0_0402_5%

0_0402_5%

1

CV19

2

@ CV19

@

10U_0603_6.3V6M

+1.8VGS+VDD1DI

@

VDD1DI MarsC RB Design 120ohm 1 1

0.1u 1 1 1u 1 1 10u 1 1

+3VGS

2

61

5

QV3A

@QV3A

@

4

QV3B

2N7002DW-T/R7_SOT363-6

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

EC_SMB_CK2 <15, 39,42>

3

EC_SMB_DA2 <15, 39,42>

@QV3B

@

Compal Secret Data

2011/06/15 2012/07/11

Compal Secret Data

D

CONFIGURATION STRAPS

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

STRAPS

TX_PWRS_ENB

TX_DEEMPH_EN

BIF_GEN3_EN_A

BIF_VGA DIS

ROMIDCFG[2:0]

BIOS_ROM_EN PS_2[3]

AUD[1]

AUD[0]

CEC_DIS PS_0[4]

RESERVED PS_1[3]

RESERVED PS_1[2]

RESERVED NA

AUD_PORT_CONN_PINSTRAP[2] PS_3[5]

AUD_PORT_CONN_PINSTRAP[1] PS_3[4]

AUD_PORT_CONN_PINSTRAP[0] PS_0[5]

PS_1[4] 0:50% Tx output swing

PS_1[5] 0:Tx de-emphasis disabled

PS_1[1]

PS_2[4]

PS_0[3..1]

NA

DESCRIPTION OF DEFAULT SETTINGSMLPS

Transmitter Power Savings Enable

1:Full Tx output swing

PCIE Transmitter De-emphasis Enable

1:Tx de-emphasis enabled

PCIE Gen3 Enable (NOTE:RESERVED for Thames/Seymour and should be strapped to 0)

0:GEN3 not support at power-on 1:GEN3 supported at power-on

VGA control

0:VGA controller capacity enabled 1:VGA controller capacity disabled (for multi-GPU)

Serial ROM type or Memory Aperture Size Select

If PS_2[3]=0, defines memory aperture s ize If PS_2[3]=1, defines ROM type 100 - 512Kbit M25P05A (ST) 101 - 1Mbit M25P10A (ST ) 101 - 2Mbit M25P20 (ST) 101 - 4Mbit M25P40 (ST) 101 - 8Mbit M25P80 (ST) 100 - 512Kbit Pm25LV010 (Chingis) 101 - 1Mbit Pm25LV010 (Chingis)

Enable external BIOS ROM device

0:Disabled 1:Enabled

00 - No audio function 01 - Audio for DP only 10 - Audio for DP and HDMI if dongle is detected 11 - Audio for both DP and HDMI

HDMI must only be enabled on systems that are legally entitled. It isthe responsibility of the system designer to ensure that the system is entitled to support this feature.

Reserved for future ASIC

NOTE:ALLOW FOR PULLUP PADS FOR THE RESERVED STRAPS BUT DO NOT INSTALL RESISTOR IF THESE GPIOS ARE USEED, THEY MUST KEEP LOW AND NOT CONFLICT DURING RESET

Reserved

Reserved (for Thames/Whistl er/Seymour only)

STRAPS TO INDICATE THE NUMBER OF AUDIO CAPABLE DISPLAY OUTPUTS

111 = 0 usable endpoints 110 = 1 usable endpoints 101 = 2 usable endpoints 100 = 3 usable endpoints 011 = 4 usable endpoints 010 = 5 usable endpoints 001 = 6 usable endpoints 000 = all endpoints are usable

MLPS Strap

CapacitorBits[5:4]

Deciphered Date

D

PS_0[5:1]

PS_1[5:1]

PS_2[5:1]

PS_3[5:1]

PS_0 PS_1 PS_2 PS_3

@

CV26

0.01U_0402_16V7K

Bits[3:1]

000

11

001

01

000

11

XXX

@

PX@

@

1

CV27

1

CV29

CV28

2

0.01U_0402_16V7K

0.082U_0402_16V7K

1

2

R_pu R_pd

NC

NC 4.75K

82nF

8.45K

2K

NC

4.75K

NC

X

12

RV20

X76@ RV20

X76@

8.45K_0402_1%

X76@ RV27

X76@

4.75K_0402_1%

RV27

8.45K_0402_1%

12

4.75K_0402_1%

@RV21

@

PX@RV28

PX@

Place CLOSE VGA CHIP

Title

ATI_MarsXTX_M2_Main_MSIC

Size Document Number Rev

C

Date: Sheet of

E

RECOMMENDED SETTINGS 0= DO NOT INSTALL RESISTOR 1 = INSTALL 10K RESISTOR X = DESIGN DEPENDANT NA = NOT APPLICABLE

Mapping to VRAM type please refer to page 4

X

12

RV22

PX@RV22

PX@

RV21

8.45K_0402_1%

12

RV29

PX@RV29

PX@

RV28

2K_0402_1%

Compal Electronics, Inc.

LA-9631P

E

12

8.45K_0402_1%

12

4.75K_0402_1%

@ RV23

@

PX@RV30

PX@

+1.8VGS

RV23

RV30

24 60Wednesday, February 27, 2013

Default Setting

X

1

0

XXX

X

XX

0

XXX

12

1.0

A

MPLL_PVDD Mars CRB Design 220ohm 1 1

0.1u 1 1

1 1

2 2

1u 1 1 10u 1 1

SPLL_PVDD Mars CRB Design 120ohm 1 1

0.1u 1 1 1u 1 1 10u 1 1

SPLL_VDDC Mars CRB Design 120ohm 1 1

0.1u 1 1 1u 1 1 10u 1 1

+1.8VGS

+0.95VGS

@

LV4

0_0603_5%

1 2

@

LV5

LV5 0_0402_5%

0_0402_5%

1 2

@

LV6

LV6 0_0402_5%

0_0402_5%

B

+MPV18

12

(MPLL_PVDD:1.8V@130mA )

1

CV33

CV34

2

1U_0402_6.3V6K

PX@ CV34

1U_0402_6.3V6K

PX@

.1U_0402_16V7K

PX@ CV33

PX@

10U_0603_6.3V6M

+SPV18

(SPLL_PVDD:1.8V@75mA )

1

CV38

CV39

2

PX@ CV38

PX@

PX@ CV39

PX@

.1U_0402_16V7K

1U_0402_6.3V6K

10U_0603_6.3V6M

+SPLL_VDDC

(SPLL_VDDC:0.95V@100mA )

1

CV44

CV43

2

PX@ CV43

PX@

PX@ CV44

PX@

1U_0402_6.3V6K

.1U_0402_16V7K

10U_0603_6.3V6M

1

CV35

2

PX@ CV35

PX@

+MPV18

+SPV18

1

CV40

2

PX@ CV40

PX@

1

CV45

2

PX@ CV45

PX@

+SPLL_VDDC

AM10

AN10

AN9

AF30 AF31

UV1C

H7 H8

C

MPLL_PVDD MPLL_PVDD

SPLL_PVDD

SPLL_VDDC

SPLL_PVSS

NC_XTAL_PVDD NC_XTAL_PVSS

PART 9 0F 9

D

AV33

XTALIN

AU34

XTALOUT

AW34

XO_IN

PLLS/XTAL

MARS XT M2 FCBGA 962Mars@

XO_IN2

CLKTESTA CLKTESTB

AW35

AK10 AL10

12

@

CV41

CV41 .1U_0402_16V7K

.1U_0402_16V7K

12

@

RV33

51.1_0402_1%

12

@

CV42

CV42 .1U_0402_16V7K

.1U_0402_16V7K

12

@

RV34

51.1_0402_1%

10P_0402_50V8J

CV36

1 2

RV32 1M_0402_5%RV 32 1M_0402_5%

YV1

4

NC

1

XTALIN

OSC

2

27MHZ 10PF +-20PPM X3G027000DA1H

1

E

3

XTALOUT

OSC

2

NC

2

CV37

CV37 10P_0402_50V8J

10P_0402_50V8J

1

+1.5V to +1.5VGS

+1.5V + 1.5VGS

300mil(7.2A)

PX@

1

CV48

4.7U_0603_6.3V6K

3 3

B+

DGPU_PWR_EN#

2

RV41 240K_0402_5%

PX@

QV2

QV2 2N7002H_SOT23-3

2N7002H_SOT23-3

AO4430: Rdson: 5.5mohm @ VGS=10V

12

PX@

13

D

2

G

S

8 7 6 5

RV42 0_0402_5%

0_0402_5%

1 2

AO4304L_SO8

PX@

@RV42

@

UV4

4

1

PX@

CV53

0.1U_0402_25V6

2

DGPU_PWR_EN

+5VALW

RV37

PX@RV37

PX@

20K_0402_5%

2

G

@

1

CV50

CV50 .1U_0402_16V7K

.1U_0402_16V7K

2

2N7002H_SOT23-3

300mil(7.2A)

QV1

@

QV1

@

D

S

1 2

13

RV39 470_0603_5%

470_0603_5%

2

DGPU_PWR_EN#

G

@RV39

@

1 2 3

PX@

1

CV49

4.7U_0603_6.3V6K

2

+3VS to +3VGS

+3VS +3VGS

QV8

QV8 LP2301ALT1G_SOT23-3

LP2301ALT1G_SOT23-3

PX@

RV38

PX@RV38

PX@

20K_0402_5%

13

D

PX@

QV6

QV6 2N7002H_SOT23-3

2N7002H_SOT23-3

S

3 1

2

1

PX@

CV52

CV52 .1U_0402_16V7K

.1U_0402_16V7K

2

4.7U_0603_6.3V6K

1

CV46

PX@

2

DGPU_PWR_EN#

@

1U_0603_10V6K

1

CV47

2

12

13

D

S

@

RV36

RV36 470_0603_5%

470_0603_5%

2

G

@

QV7

QV7 2N7002H_SOT23-3

2N7002H_SOT23-3

+1.8VS to +1.8VGS

+1.8VS +1.8VGS

+3VALW

12

PX@

RV35

RV35 100K_0402_5%

100K_0402_5%

DGPU_PWR_EN#

13

D

PX@

DGPU_PWR_EN<18,42,51,53>

4 4

DGPU_PWR_EN

2

QV9

QV9 2N7002H_SOT23-3

2N7002H_SOT23-3

G

S

DVT

PX@

CV199

4.7U_0603_6.3V6K

+5VALW

1 2

330K_0402_5%

DGPU_PWR_EN

1

2

PX@

RV45

13

2

G

PX@

1 2

RV46

62K_0402_5%

D

PX@

QV10

2N7002H_SOT23-3

S

QV4

LP2301ALT1G_SOT23-3

D

S

D

S

13

PX@

G

2

PX@

12

CV202

CV202 .1U_0402_16V7K

.1U_0402_16V7K

1

@

CV200

CV200 10U_0603_6.3V6M

10U_0603_6.3V6M

2

DGPU_PWR_EN#

@

1 2

RV92

0_0402_5%

12

@

CV201

CV201 1U_0402_6.3V6K

1U_0402_6.3V6K

2

G

12

R290

@R290

@

470_0603_5%

13

D

@

QV11

S

2N7002H_SOT23-3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

ATI_MarsXTX_M2_BACO POWER

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

LA-9631P

E

25 60Wednesday, February 27, 2013

1.0

www.laptopfix.vn

A

UV1G

PART 6 0F 9

AB39

GND

E39

GND

F34

GND

F39

GND

G33

GND

G34

GND

H31

GND

H34

GND

H39

GND

J31

M34 M39

W31 W34

M17 M22 M24

GND

J34

GND

K31

GND

K34

GND

K39

GND

L31

GND

L34

GND GND GND

N31

GND

N34

GND

P31

GND

P34

GND

P39

GND

R34

GND

T31

GND

T34

GND

T39

GND

U31

GND

U34

GND

V34

GND

V39

GND GND GND

Y34

GND

Y39

GND

F15

GND

F17

GND

F19

GND

F21

GND

F23

GND

F25

GND

F27

GND

F29

GND

F31

GND

F33

GND

F7

GND

F9

GND

G2

GND

G6

GND

H9

GND

J2

GND

J27

GND

J6

GND

J8

GND

K14

GND

K7

GND

L11

GND

L17

GND

L2

GND

L22

GND

L24

GND

L6

GND GND GND GND

N16

GND

N18

GND

N2

GND

N21

GND

N23

GND

N26

GND

N6

GND

R15

GND

R17

GND

R2

GND

R20

GND

R22

GND

R24

GND

R27

GND

R6

GND

T11

GND

T13

GND

T16

GND

T18

GND

T21

GND

T23

GND

T26

GND

U15

GND

U17

GND

U2

GND

U20

GND

U22

GND

U24

GND

U27

GND

U6

GND

V11

GND

V16

GND

V18

GND

V21

GND

V23

GND

V26

GND

W2

GND

W6

GND

Y15

GND

Y17

GND

Y20

GND

Y22

GND

Y24

GND

Y27

GND

VSS_MEC H VSS_MEC H VSS_MEC H

MARS XT M2 FCBGA 962Mars@

1 1

2 2

3 3

4 4

A

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

NC

A3 A37 AA16 AA18 AA2 AA21 AA23 AA26 AA28 AA6 AB12 AB15 AB17 AB20 AB22 AB24 AB27 AC11 AC13 AC16 AC18 AC2 AC21 AC23 AC26 AC28 AC6 AD15 AD17 AD20 AD22 AD24 AD27 AD9 AE2 AE6 AF10 AF16 AF18 AF21 AG17 AG2 AG20

AG6 AG9 AH21 AJ10 AJ11 AJ2 AJ28 AJ6 AK11 AK31 AK7 AL11 AL14 AL17 AL2 AL20

AL23 AL26 AL32 AL6 AL8 AM11 AM31 AM9 AN11 AN2 AN30 AN6 AN8 AP11 AP7 AP9 AR5 B11 B13 B15 B17 B19 B21 B23 B25 B27 B29 B31 B33 B7 B9 C1 C39 E35 E5 F11 F13

AG22

A39 AW1 AW39

B

MECH#1 MECH#2 MECH#3

B

C

UV1F

AN24

NC

AP24

NC

AP25

NC

AP26

NC

DP_VDDR MarsCRB Design

0.1u 1 1 1u 1 1 10u 1 1

+1.8VGS

1 2

@

RV43

RV43 0_0402_5%

0_0402_5%

TV12 PADT V12 PAD TV13 PA DTV13 PAD TV14 PA DTV14 PAD

www.laptopfix.vn

+DP_VDDR

(DP_VDDR:1.8V@237mA/link )

+DP_VDD R

1

CV57

CV58

2

PX@ C V58

PX@

PX@ C V57

PX@

1U_0402_6.3V6K

.1U_0402_16V7K

10U_0603_6.3V6M

RV44 150_0402_1%PX@RV44 150_0402_1%PX@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

.1U_0402_16V7K

12

C

AU28

NC

AV29

NC

AP20

NC

AP21

NC

AP22

NC

AP23

NC

AU18

NC

AV19

NC

AH34

DP_VDDR

AJ34

DP_VDDR

AF34

DP_VDDR

AG34

DP_VDDR

AM37

1

CV59

2

PX@ C V59

PX@

2011/06/15 2012/07/11

AL38

AM32

AW28

AW18

AM39

DP_VDDR DP_VDDR DP_VDDR

NC

DP_CALR

PART 8 0F 9

DP_VDDR DP_VDDC

CALIBRATION

Compal Secret Data

Deciphered Date

D

DP_VDDC DP_VDDC DP_VDDC DP_VDDC DP_VDDC DP_VDDC DP_VDDC DP_VDDC DP_VDDC

DP GND

DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR

MARS XT M2 FCBGA 962Mars@

D

E

(DP_VDDC:0.95V@280mA/link )

AP31 AP32 AN33 AP33 AL33 AM33 AK33 AK34 AN31

AP13

NC

AT13

NC

AP14

NC

AP15

NC

AN27 AP27 AP28 AW24 AW26 AN29 AP29 AP30 AW30 AW32 AN17 AP16 AP17 AW14 AW16 AN19 AP18 AP19 AW20 AW22 AN34 AP39 AR39 AU37 AF39 AH39 AK39 AL34 AV27 AR28 AV17 AR18 AN38 AM35 AN32

CV54

1

CV55

CV56

2

PX@ CV54

PX@

.1U_0402_16V7K

2

PX@ CV55

PX@

1U_0402_6.3V6K

10U_0603_6.3V6M

DP_VDDC MarsCRB Design

0.1u 1 1 1u 1 1 10u 1 1

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

ATI_MarsXTX_M2_PWR_GND

LA-9631P

E

+0.95VGS

1.0

26 60Wednesday, February 27, 2 013

1.0

A

B

C

D

E

LV7

0_0603_5%

@

12

+VGA_CORE

+1.8VGS

+0.95VGS

PCIE_VDDR Mar sCRB Design

0.1u 0 2 1u 2 3 10u 1 1

PCIE_VDDC Ma rsCRB Design 1u 7 5 10u 2 1

+VGA_CORE

VGA_CORE Cap in power side sheet

UV1E

AD11

AG10

AG26 AG27

AG23 AG24

AD12

AG11 AG13 AG15

AG28

AH29

AF26 AF27

AF23 AF24

AF11 AF12 AF13

AF15

AF28

AC7

AF7

AJ7 AK8 AL9 G11 G14 G17 G20 G23 G26 G29 H10

J7

J9 K11 K13

K8 L12 L16 L21 L23 L26

L7

M11 N11

P7

R11 U11

U7

Y11

Y7

UV1E

MEM I/O

VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1

LEVEL

TRANSLATION

VDD_CT VDD_CT VDD_CT VDD_CT

I/O

VDDR3 VDDR3 VDDR3 VDDR3

DVP

VDDR4 VDDR4 VDDR4 VDDR4

VOLTAGE

VOLTAGE SENESE

SENESE

FB_VDDC

FB_VDDCI

FB_GND

PART 5 0F 9

AA31

NC

AA32

NC

AA33

NC

AA34

NC

W30

NC

Y31

NC

V28

NC_BIF_VDDC

W29

NC_BIF_VDDC

AB37

PCIE_PVDD

PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC

BIF_VDDC BIF_VDDC

CORE I/O

VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC

VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC

VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI

G30 G31 H29 H30 J29 J30 L28 M28 N28 R28 T28 U28

N27 T27

AA15 AA17 AA20 AA22 AA24 AA27 AB16 AB18 AB21 AB23 AB26 AB28 AC17 AC20 AC22 AC24 AC27 AD18 AD21 AD23 AD26 AF17 AF20 AF22 AG16 AG18

AH22 AH27 AH28 M26 N24 R18 R21 R23 R26 T17 T20 T22 T24 U16 U18 U21 U23 U26 V17 V20 V22 V24 V27 Y16 Y18 Y21 Y23 Y26 Y28

AA13 AB13 AC12 AC15 AD13 AD16 M15 M16 M18 M23 N13 N15 N17 N20 N22 R12 R13 R16 T12 T15 V15 Y13

PCIE

BACO

CORE

ISOLATED

MARS XT M2 FCBGA 962Mars@

+1.5VGS

1

V66

1

CV60

C

+

@

1 1

VDDR1 MarsCR B Design

0.01u 5 0

0.1u 5 5 1u 0 5

2.2u 5 0 10u 3 5 220u 0 1

VDD_CT MarsC RB Design 120ohm 1 1

0.1u 1 1 1u 1 3 10u 1 1

VDDR3 MarsCR B Design

2 2

3 3

120ohm 1 0

0.1u 1 0 1u 2 3 10u 0 1

VDDR4 MarsCR B Design 220ohm 1 1

0.1u 1 1 1u 1 1 10u 1 0

220U_B2_2.5VM_R35

2

10U_0603_6.3V6M

Mars@ CV60

Mars@

1

CV70

CV69

CV68

2

PX@ CV70

PX@

PX@ CV69

PX@

10U_0603_6.3V6M

Mars@ CV68

Mars@

+1.8VGS +VDDC_CT

1 2

+3VGS

1 2

+1.8VGS

For GDDR5, MVDDQ = 1.5V

(VDDR1:1.5V@3A,GDDR5:1125MHz )

1

CV72

CV73

CV71

2

PX@ CV73

PX@

PX@ CV71

PX@

1U_0402_6.3V6K

@

LV8

LV8 0_0402_5%

0_0402_5%

@

LV9

LV9 0_0402_5%

0_0402_5%

LV10

0_0603_5%

1U_0402_6.3V6K

Mars@ CV72

Mars@

+VDDR3

@

12

1

CV75

CV74

2

PX@ CV75

PX@

PX@ CV74

PX@

1U_0402_6.3V6K

(VDD_CT:1.8V@13mA )

1

CV89

2

PX@ CV89

PX@

10U_0603_6.3V6M

(VDDR3:3.3V@25mA)

1

CV92

2

PX@ CV92

PX@

10U_0603_6.3V6M

+VDDR4

( VDDR4:1.8V@300mA)

+1.5VGS

1

CV76

2

PX@ CV76

PX@

.1U_0402_16V7K

1U_0402_6.3V6K

1

CV94

2

PX@ CV94

PX@

1U_0402_6.3V6K

1

CV77

CV79

CV78

CV61

2

PX@ CV77

PX@

PX@ CV79

PX@

PX@ CV78

PX@

PX@ CV61

PX@

.1U_0402_16V7K

1

CV91

CV90

2

@ CV90

@

1U_0402_6.3V6K

1

CV96

2

PX@ CV96

PX@

+VDDC_CT

PX@ CV91

PX@

.1U_0402_16V7K

+VDDR3

1

CV95

2

PX@ CV95

PX@

+VDDR4

1

CV97

2

PX@ CV97

PX@

.1U_0402_16V7K

Route as differential pair

VCCSENSE_VGA<53>

VSSSENSE_VGA<53>

TV15TV15

(PCIE_VDDR:1.8V@100mA )

+PCIE_VDDR

1

CV62

CV63

2

PX@ CV62

PX@

PX@ CV63

PX@

1U_0402_6.3V6K

.1U_0402_16V7K

0.01U_0402_16V7K

(PCIE_VDDC:0.95V@2.5A_GEN2.0 )

+0.95VGS

1

CV80

CV81

2

PX@ CV80

PX@

PX@ CV81

PX@

1U_0402_6.3V6K

(BIF_VDDC:0.95V@1.4A)

+0.95VGS

1

CV86

CV87

2

PX@ CV86

PX@

PX@ CV87

PX@

1U_0402_6.3V6K

(VDDCI:0.9~1.15V@8.8A)

1

CV64

2

@ CV64

@

1

CV82

2

PX@ CV82

PX@

10U_0603_6.3V6M

+PCIE_VDDR

1

CV65

2

PX@ CV65

PX@

10U_0603_6.3V6M

1

CV85

CV84

CV83

2

@ CV84

@

PX@ CV85

PX@

PX@ CV83

PX@

1U_0402_6.3V6K

10U_0603_6.3V6M

1

CV88

2

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

A

B

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

C

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

Compal Electronics, Inc.

ATI_MarsXTX_M2_Power

LA-9631P

E

27 60Wednesday, February 27, 2013

1.0

A

UV1H

PART 3 0F 9

GDDR5/DDR3

DQA0_0 DQA0_1 DQA0_2 DQA0_3 DQA0_4 DQA0_5 DQA0_6 DQA0_7 DQA0_8 DQA0_9 DQA0_10 DQA0_11 DQA0_12 DQA0_13 DQA0_14 DQA0_15 DQA0_16 DQA0_17 DQA0_18 DQA0_19 DQA0_20 DQA0_21 DQA0_22 DQA0_23 DQA0_24 DQA0_25 DQA0_26 DQA0_27 DQA0_28 DQA0_29 DQA0_30 DQA0_31 DQA1_0 DQA1_1 DQA1_2 DQA1_3 DQA1_4 DQA1_5 DQA1_6 DQA1_7 DQA1_8 DQA1_9 DQA1_10 DQA1_11 DQA1_12 DQA1_13 DQA1_14 DQA1_15 DQA1_16 DQA1_17 DQA1_18 DQA1_19 DQA1_20 DQA1_21 DQA1_22 DQA1_23 DQA1_24 DQA1_25 DQA1_26 DQA1_27 DQA1_28 DQA1_29 DQA1_30 DQA1_31

MVREFDA MVREFSA

NC NC NC

MEM_CALRP0

NC NC

GDDR5/DDR3

MEMORY INTERFACE A

MAA0_0/MAA_0 MAA0_1/MAA_1 MAA0_2/MAA_2 MAA0_3/MAA_3 MAA0_4/MAA_4 MAA0_5/MAA_5 MAA0_6/MAA_6 MAA0_7/MAA_7 MAA1_0/MAA_8

MAA1_1/MAA_9 MAA1_2/MAA_10 MAA1_3/MAA_11 MAA1_4/MAA_12

MAA1_5/MAA_BA2 MAA1_6/MAA_BA0 MAA1_7/MAA_BA1

WCKA0_0/DQMA_0

WCKA0B_0/DQMA_1

WCKA0_1/DQMA_2

WCKA0B_1/DQMA_3

WCKA1_0/DQMA_4

WCKA1B_0/DQMA_5

WCKA1_1/DQMA_6

WCKA1B_1/DQMA_7

EDCA0_0/QSA_0 EDCA0_1/QSA_1 EDCA0_2/QSA_2 EDCA0_3/QSA_3 EDCA1_0/QSA_4 EDCA1_1/QSA_5 EDCA1_2/QSA_6 EDCA1_3/QSA_7

DDBIA0_0/QSA_0B DDBIA0_1/QSA_1B DDBIA0_2/QSA_2B DDBIA0_3/QSA_3B DDBIA1_0/QSA_4B DDBIA1_1/QSA_5B DDBIA1_2/QSA_6B DDBIA1_3/QSA_7B

ADBIA0/ODTA0

ADBIA1/ODTA1

MAA0_8/MAA_13 MAA1_8/MAA_14 MAA0_9/MAA_15

MAA1_9/RSVD

MARS XT M2 FCBGA 962Mars@

CLKA0

CLKA0B

CLKA1

CLKA1B

RASA0B RASA1B

CASA0B CASA1B

CSA0B_0 CSA0B_1

CSA1B_0 CSA1B_1

CKEA0 CKEA1

WEA0B WEA1B

G24 J23 H24 J24 H26 J26 H21 G21 H19 H20 L13 G16 J16 H16 J17 H17

A32 C32 D23 E22 C14 A14 E10 D9

C34 D29 D25 E20 E16 E12 J10 D7

A34 E30 E26 C20 C16 C12 J11 F8

J21

ODTA0

G19

ODTA1

H27

CLKA0

G27

CLKA0#

J14

CLKA1

H14

CLKA1#

K23

RASA0#

K19

RASA1#

K20

CASA0#

K17

CASA1#

K24

CSA0#_0

K27

M13

CSA1#_0

K16

K21

CKEA0

J20

CKEA1

K26

WEA0#

L15

WEA1#

H23

MAA13

J19

MAA14

M21 M20

C37

MDA0

C35

MDA1

A35

MDA2

E34

MDA3

G32

MDA4

D33

MDA5

F32

MDA6

E32

MDA7

D31

MDA8

F30

MDA9

C30

MDA10

A30

MDA11

F28

MDA12

C28

+VDD_MEM15_REFDA +VDD_MEM15_REFSA

1 2

PX@

MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63

AG12

AH12

A28 E28 D27 F26 C26 A26 F24 C24 A24 E24 C22 A22 F22 D21 A20 F20 D19 E18 C18 A18 F18 D17 A16 F16 D15 E14 F14 D13 F12 A12 D11 F10 A10 C10 G13 H13

J13 H11 G10

G8 K9

K10

G9 A8 C8 E8 A6 C6 E6 A5

L18

L20

L27 N12

M27

M12

1 1

2 2

RV47 120_0402_1%

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 A_BA2 A_BA0

A_BA1

DQMA0 DQMA1 DQMA2 DQMA3 DQMA4 DQMA5 DQMA6 DQMA7

QSA0 QSA1 QSA2 QSA3 QSA4 QSA5 QSA6 QSA7

QSA#0 QSA#1 QSA#2 QSA#3 QSA#4 QSA#5 QSA#6 QSA#7

B

ODTA0 <29> ODTA1 <30>

CLKA0 <29> CLKA0# <29>

CLKA1 <30> CLKA1# <30>

RASA0# <29> RASA1# <30>

CASA0# <29> CASA1# <30>

CSA0#_0 <29>

CSA1#_0 <30>

CKEA0 <29> CKEA1 <30>

WEA0# <29> WEA1# <30>

DQMA0 <29> DQMA1 <29> DQMA2 <29> DQMA3 <29> DQMA4 <30> DQMA5 <30> DQMA6 <30> DQMA7 <30>

QSA0 <29> QSA1 <29> QSA2 <29> QSA3 <29> QSA4 <30> QSA5 <30> QSA6 <30> QSA7 <30>

QSA#0 <29> QSA#1 <29> QSA#2 <29> QSA#3 <29> QSA#4 <30> QSA#5 <30> QSA#6 <30> QSA#7 <30>

C

MDB[0..63]<31,32>

MAA[15..0]

A_BA[2..0]

MDA[0..63]

MAA[15..0] <29,30>

A_BA[2..0] <29,30>

MDA[0..63]<29,30>

MDB[0..63]

MAB[15..0]

B_BA[2..0]

MAB[15..0] <31,32>

B_BA[2..0] <31,32>

+VDD_MEM15_REFDB +VDD_MEM15_REFSB

MDB0 MDB1 MDB2 MDB3 MDB4 MDB5 MDB6 MDB7 MDB8 MDB9 MDB10 MDB11 MDB12 MDB13 MDB14 MDB15 MDB16 MDB17 MDB18 MDB19 MDB20 MDB21 MDB22 MDB23 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30 MDB31 MDB32 MDB33 MDB34 MDB35 MDB36 MDB37 MDB38 MDB39 MDB40 MDB41 MDB42 MDB43 MDB44 MDB45 MDB46 MDB47 MDB48 MDB49 MDB50 MDB51 MDB52 MDB53 MDB54 MDB55 MDB56 MDB57 MDB58 MDB59 MDB60 MDB61 MDB62 MDB63

D

AA12

E

UV1I

PART 4 0F 9

GDDR5/DDR3

DQB0_0 DQB0_1 DQB0_2 DQB0_3 DQB0_4 DQB0_5 DQB0_6 DQB0_7 DQB0_8 DQB0_9 DQB0_10 DQB0_11 DQB0_12 DQB0_13 DQB0_14 DQB0_15 DQB0_16 DQB0_17 DQB0_18 DQB0_19 DQB0_20 DQB0_21 DQB0_22 DQB0_23 DQB0_24 DQB0_25 DQB0_26 DQB0_27 DQB0_28 DQB0_29 DQB0_30 DQB0_31 DQB1_0 DQB1_1 DQB1_2 DQB1_3 DQB1_4 DQB1_5 DQB1_6 DQB1_7 DQB1_8 DQB1_9 DQB1_10 DQB1_11 DQB1_12 DQB1_13 DQB1_14 DQB1_15 DQB1_16 DQB1_17 DQB1_18 DQB1_19 DQB1_20 DQB1_21 DQB1_22 DQB1_23 DQB1_24 DQB1_25 DQB1_26 DQB1_27 DQB1_28 DQB1_29 DQB1_30 DQB1_31

MVREFDB MVREFSB

GDDR5/DDR3

MEMORY INTERFACE B

MAB0_0/MAB_0 MAB0_1/MAB_1 MAB0_2/MAB_2 MAB0_3/MAB_3 MAB0_4/MAB_4 MAB0_5/MAB_5 MAB0_6/MAB_6 MAB0_7/MAB_7 MAB1_0/MAB_8

MAB1_1/MAB_9 MAB1_2/MAB_10 MAB1_3/MAB_11 MAB1_4/MAB_12

WCKB0_0/DQMB_0

WCKB0B_0/DQMB_1

WCKB0_1/DQMB_2

WCKB0B_1/DQMB_3

WCKB1_0/DQMB_4

WCKB1B_0/DQMB_5

WCKB1_1/DQMB_6

WCKB1B_1/DQMB_7

EDCB0_0/QSB_0 EDCB0_1/QSB_1 EDCB0_2/QSB_2 EDCB0_3/QSB_3 EDCB1_0/QSB_4 EDCB1_1/QSB_5 EDCB1_2/QSB_6 EDCB1_3/QSB_7

DDBIB0_0/QSB_0B DDBIB0_1/QSB_1B DDBIB0_2/QSB_2B DDBIB0_3/QSB_3B DDBIB1_0/QSB_4B DDBIB1_1/QSB_5B DDBIB1_2/QSB_6B DDBIB1_3/QSB_7B

MAB0_8/MAB_13 MAB1_8/MAB_14 MAB0_9/MAB_15

MARS XT M2 FCBGA 962Mars@

MAB1_5/BA2 MAB1_6/BA0 MAB1_7/BA1

ADBIB0/ODTB0 ADBIB1/ODTB1

CLKB0

CLKB0B

CLKB1

CLKB1B

RASB0B RASB1B

CASB0B CASB1B

CSB0B_0 CSB0B_1

CSB1B_0 CSB1B_1

CKEB0 CKEB1

WEB0B WEB1B

MAB1_9/RSVD

DRAM_RST

P8 T9 P9 N7 N8 N9 U9 U8 Y9 W9 AC8 AC9 AA7 AA8 Y8 AA9

H3 H1 T3 T5 AE4 AF5 AK6 AK5

F6 K3 P3 V5 AB5 AH1 AJ9 AM5

G7 K1 P1 W4 AC4 AH3 AJ8 AM3

T7 W7

L9 L8

AD8 AD7

T10 Y10

W10 AA10

P10 L10

AD10 AC10

U10 AA11

N10 AB11

T8 W8 U12 V12

AH11

MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 B_BA2 B_BA0 B_BA1

DQMB0 DQMB1 DQMB2 DQMB3 DQMB4 DQMB5 DQMB6 DQMB7

QSB0 QSB1 QSB2 QSB3 QSB4 QSB5 QSB6 QSB7

QSB#0 QSB#1 QSB#2 QSB#3 QSB#4 QSB#5 QSB#6 QSB#7

ODTB0 ODTB1

CLKB0 CLKB0#

CLKB1 CLKB1#

RASB0# RASB1#

CASB0# CASB1#

CSB0#_0

CSB1#_0

CKEB0 CKEB1

WEB0# WEB1#

MAB13 MAB14MAA15 MAB15

DRAM_RST#_R

DQMB0 <31> DQMB1 <31> DQMB2 <31> DQMB3 <31> DQMB4 <32> DQMB5 <32> DQMB6 <32> DQMB7 <32>

QSB0 <31> QSB1 <31> QSB2 <31> QSB3 <31> QSB4 <32> QSB5 <32> QSB6 <32> QSB7 <32>

QSB#0 <31> QSB#1 <31> QSB#2 <31> QSB#3 <31> QSB#4 <32> QSB#5 <32> QSB#6 <32> QSB#7 <32>

ODTB0 <31> ODTB1 <32>

CLKB0 <31> CLKB0# <31>

CLKB1 <32> CLKB1# <32>

RASB0# <31> RASB1# <32>

CASB0# <31> CASB1# <32>

CSB0#_0 <31>

CSB1#_0 <32>

CKEB0 <31> CKEB1 <32>

WEB0# <31> WEB1# <32>

C5 C3 E3 E1

F1 F3

F5 G4 H5 H6

J4 K6 K5

L4 M6 M1 M3 M5 N4 P6 P5 R4 T6 T1 U4 V6 V1 V3 Y6 Y1 Y3 Y5

AA4 AB6 AB1 AB3 AD6 AD1 AD3 AD5 AF1 AF3 AF6 AG4 AH5 AH6

AJ4 AK3 AF8 AF9 AG8 AG7 AK9

AL7 AM8 AM7 AK1

AL4 AM6 AM1 AN4 AP3 AP1 AP5

Y12

3 3

Ball to RV57 < 1"

+1.5VGS +1.5VGS

12

RV49

40.2_0402_1%

Mars@

+VDD_MEM15_REFDA +VDD_MEM15_REFDBDRAM_RST#_R

12

1

CV98

RV55

100_0402_1%

Mars@

4 4

A

CV98 1U_0402_6.3V6K

1U_0402_6.3V6K

2

Mars@

RV50

40.2_0402_1%

RV56

100_0402_1%

12

Mars@

+VDD_MEM15_REFSA +VDD_MEM15_REFSB+VDD_MEM15_REFDB

12

1

CV99

Mars@

CV99 1U_0402_6.3V6K

1U_0402_6.3V6K

2

Mars@

B

CV100 to RV57 < 200 mil CV100 to RV53 < 1"

1 2

PX@

DRAM_RST#<29,30,31,32>

DRAM_RST# is a daisy-chain net that connects to all VRAM

This basic topology should be used for DRAM_RST for DDR3/GDDR5.These Capacitors and Resistor values are an example only. The Series R and || Cap values will depend on the DRAM load and will have to be calculated for different Memory ,DRAM Load and board to pass Reset Signal Spec. Place all these components very close to GPU (Within 25mm) and keep all component close to each Other (within 5mm) except Rser2

PX@

RV53 51.1_0402_1%

www.laptopfix.vn

+1.5VGS

12

RV48

4.7K_0402_5%

@

1 2

PX@

RV54 10_0402_5%

12

CV100

120P_0402_50V9

PX@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

C

RV57

4.99K_0402_1%

PX@

1 2

Compal Secret Data

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

D

+1.5VGS +1.5VGS

RV51

40.2_0402_1%

PX@

RV58

100_0402_1%

PX@

12

1

CV101

CV101 1U_0402_6.3V6K

1U_0402_6.3V6K

2

PX@

Title

Size Document Number Rev

C

Date: Sheet of

12

RV52

40.2_0402_1%

PX@

12

RV59

100_0402_1%

PX@

Compal Electronics, Inc.

ATI_MarsXTX_M2_MEM IF

LA-9631P

1

CV102

CV102 1U_0402_6.3V6K

1U_0402_6.3V6K

2

PX@

E

1.0

28 60Wednesday, February 27, 2013

1.0

5

D D

C C

B B

MDA[0..31]<28>

MAA[15..0]<28,30>

CLKA0

RV60 40.2_0402_1%

CLKA0#

RV61 40.2_0402_1%

1 2

Mars@

1 2

Mars@

MDA[0..31]

MAA[15..0]

12

CV195

0.01U_0402_16V7K

Mars@

4

UV5

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 MAA14 MAA15

QSA2 QSA0

DQMA2 DQMA0

QSA#2 QSA#0

12

4.99K_0402_1%

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

X76@

+1.5VGS

12

Mars@

RV62

+VREFC_A0

A_BA0<28,30> A_BA1<28,30> A_BA2<28,30>

CLKA0<28> CLKA0#<28> CKEA0<28>

ODTA0<28> CSA0#_0<28> RASA0#<28> CASA0#<28> WEA0#<28>

QSA2<28> QSA0<28>

DQMA2<28> DQMA0<28>

QSA#2<28> QSA#0<28>

DRAM_RST#<28,30,31,32>

RV84

RV84 240_0402_1%

240_0402_1%

Mars@

15mil

CV103

.1U_0402_16V7K

12

Mars@

RV64

4.99K_0402_1%

+VREFC_A0

12

Mars@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E3

MDA23

F7

MDA19

F2

MDA22

F8

MDA18

H3

MDA21

H8

MDA17

G2

MDA20

H7

MDA16

D7

MDA0

C3

MDA5

C8

MDA1

C2

MDA6

A7

MDA3

A2

MDA4

B8

MDA2

A3

MDA7

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1 B9 D1 D8 E2 E8 F9 G1 G9

+1.5VGS

3

QSA3<28> QSA1<28>

DQMA3<28> DQMA1<28>

QSA#3<28> QSA#1<28>

RV85

RV85 240_0402_1%

240_0402_1%

Mars@

+VREFC_A1

12

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 MAA14 MAA15

A_BA0 A_BA1 A_BA2

CLKA0 CLKA0# CKEA0

ODTA0 CSA0#_0 RASA0# CASA0# WEA0#

QSA3 QSA1

DQMA3 DQMA1

QSA#3 QSA#1

DRAM_RST#

4.99K_0402_1%

UV6

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

X76@

+1.5VGS

12

Mars@

RV63

15mil

CV104

.1U_0402_16V7K

12

Mars@

RV65

+VREFC_A1

12

Mars@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

2

E3

MDA24

F7

MDA30

F2

MDA27

F8

MDA29

H3

MDA25

H8

MDA28

G2

MDA26

H7

MDA31

D7

MDA12

C3

MDA10

C8

MDA14

C2

MDA11

A7

MDA13

A2

MDA9

B8

MDA15

A3

MDA8

+1.5VGS

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

+1.5VGS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

1

+1.5VGS

CV107

CV105

CV106

1U_0402_6.3V6K

10U_0603_6.3V6M

1U_0402_6.3V6K

1

Mars@CV107

Mars@

Mars@CV105

Mars@

Mars@CV106

Mars@

2

A A

5

4

www.laptopfix.vn

CV112

CV109

CV108

1U_0402_6.3V6K

1

Mars@CV109

Mars@

Mars@CV108

Mars@

2

CV125

CV113

1U_0402_6.3V6K

.1U_0402_16V7K

1U_0402_6.3V6K

1

Mars@CV112

Mars@

@CV125

@

Mars@CV113

Mars@

2

+1.5VGS+1.5VGS

CV117

CV119

CV115

10U_0603_6.3V6M

1

@CV115

@

2

CV118

CV116

1U_0402_6.3V6K

10U_0603_6.3V6M

1

Mars@CV117

Mars@

Mars@CV119

Mars@

Mars@CV118

Mars@

Mars@CV116

Mars@

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

CV122

CV120

1U_0402_6.3V6K

1

Mars@CV120

Mars@

2

CV124

CV121

1U_0402_6.3V6K

1

Mars@CV122

Mars@

@CV124

@

Mars@CV121

Mars@

2

Compal Secret Data

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

ATI_Whistler_M2_VRAM_A

Size Document Number Rev

C 1.0

LA-9631P

Date: Sheet of

1

29 60Wednesday, February 27, 2013

5

D D

MDA[32..63]<28>

MAA[15..0]<28,29>

C C

MDA[32..63]

MAA[15..0]

DRAM_RST#<28,29,31,32>

4

QSA4<28> QSA5<28>

DQMA4<28> DQMA5<28>

QSA#4<28> QSA#5<28>

RV86

RV86 240_0402_1%

240_0402_1%

3

UV7

M8

VREFCA

H1

VREFDQ

N3

MAA0

A0

P7

A1

P3

MAA2

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

MAA10

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

MAA15

A15/BA3

M2

A_BA0

QSA4 QSA5 QSA6

DQMA4 DQMA5 DQMA6

QSA#4 QSA#5 QSA#6

DRAM_RST#

12

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

X76@

A_BA0<28,29> A_BA1<28,29> A_BA2<28,29>

Mars@

+VREFC_A2

CLKA1<28> CLKA1#<28> CKEA1<28>

ODTA1<28> CSA1#_0<28> RASA1#<28> CASA1#<28> WEA1#<28>

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E3

MDA38

F7

MDA36

F2

MDA39

F8

MDA34

H3

MDA35

H8

MDA33

G2

MDA37

H7

MDA32

D7

MDA42

C3

MDA44

C8

MDA40

C2

MDA46

A7

MDA43 MDA56

A2

MDA45

B8

MDA41

A3

MDA47

+1.5VGS

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

+1.5VGS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

QSA6<28> QSA7<28>

DQMA6<28> DQMA7<28>

QSA#6<28> QSA#7<28>

RV87

RV87 240_0402_1%

240_0402_1%

Mars@

+VREFC_A3

12

MAA0MAA1 MAA1 MAA2MAA3 MAA3MAA4 MAA4MAA5 MAA5MAA6 MAA6MAA7 MAA7MAA8 MAA8MAA9 MAA9 MAA10MAA11 MAA11MAA12 MAA12MAA13 MAA13MAA14 MAA14 MAA15

A_BA0A_BA1 A_BA1A_BA2 A_BA2

CLKA1 CLKA1# CKEA1

ODTA1 CSA1#_0 RASA1# CASA1# WEA1#

QSA7

DQMA7

QSA#7

DRAM_RST#

2

UV8

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

X76@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

1

E3

MDA49

F7

MDA51

F2

MDA48

F8

MDA52

H3

MDA50

H8

MDA53

G2

MDA55

H7

MDA54

D7

MDA60

C3

MDA57

C8

MDA63

C2 A7

MDA61

A2

MDA59

B8

MDA62

A3

MDA58

+1.5VGS

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

+1.5VGS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

B B

1 2

CLKA1

Mars@

RV66 40.2_0402_1%

1 2

CLKA1#

Mars@

RV69 40.2_0402_1%

A A

5

12

CV196

0.01U_0402_16V7K

Mars@

4

www.laptopfix.vn

4.99K_0402_1%

+1.5VGS

CV128

10U_0603_6.3V6M

1

Mars@CV128

Mars@

2

+1.5VGS

12

Mars@

RV68

15mil

+VREFC_A2

CV127

.1U_0402_16V7K

12

Mars@

12

RV71

CV152

1U_0402_6.3V6K

1

Mars@CV152

Mars@

2

Mars@

+1.5VGS+1.5VGS

CV154

1U_0402_6.3V6K

1

Mars@CV132

Mars@

Mars@CV154

Mars@

2

CV135

CV164

1U_0402_6.3V6K

1

Mars@CV164

Mars@

2

CV136

.1U_0402_16V7K

1U_0402_6.3V6K

1

@CV134

@

Mars@CV135

Mars@

2

CV138

1U_0402_6.3V6K

10U_0603_6.3V6M

1

Mars@CV136

Mars@

@CV138

@

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

CV134

CV132

CV144

CV139

CV141

1U_0402_6.3V6K

10U_0603_6.3V6M

1U_0402_6.3V6K

1

Mars@CV144

Mars@

Mars@CV139

Mars@

Mars@CV141

Mars@

2

+1.5VGS

12

Mars@

RV67

4.99K_0402_1%

1U_0402_6.3V6K

1

2

15mil

+VREFC_A3

CV126

.1U_0402_16V7K

12

Mars@

RV70

CV146

CV145

1U_0402_6.3V6K

1

Mars@CV146

Mars@

Mars@CV145

Mars@

2

2011/06/15 2012/07/11

CV147

.1U_0402_16V7K

1

@CV147

@

2

12

Mars@

CV193

CV148

1U_0402_6.3V6K

1

@CV193

@

Mars@CV148

Mars@

2

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

ATI_Whistler_M2_VRAM_A

Size Document Number Rev

C 1.0

LA-9631P

Date: Sheet of

1

30 60Wednesday, February 27, 2013

5

D D

MDB[0..31]<28>

MAB[15..0]<28,32>

C C

CLKB0

RV72 40.2_0402_1%

CLKB0#

RV73 40.2_0402_1%

1 2

PX@

1 2

PX@

MDB[0..31]

MAB[15..0]

12

CV197

0.01U_0402_16V7K

PX@

4

UV9

M8 H1

N3

MAB0

P7

MAB1

P3

MAB2

N2

MAB3

P8

MAB4

P2

MAB5

R8

MAB6

R2

MAB7

T8

MAB8

R3

MAB9

L7

MAB10 MAB10

R7

MAB11

N7

MAB12

T3

MAB13

T7

MAB14

M7

MAB15 MAB15

M2 N8 M3

J7 K7 K9

K1

L2

J3 K3

L3

F3

QSB2

C7

QSB0 QSB1

E7

DQMB2 DQMB3

D3

DQMB0 DQMB1

G3

QSB#2 QSB#3

B7

QSB#0 QSB#1

T2

L8

12

J1

L1

J9

L9

K4W1G1646E-HC12_FBGA96

X76@

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3

BA0 BA1 BA2

CK CK CKE/CKE0

ODT/ODT0 CS/CS0 RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ/ZQ0

NC/ODT1 NC/CS1 NC/CE1 NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

QSB2<28> QSB0<28>

DQMB2<28> DQMB0<28>

QSB#2<28> QSB#0<28>

RV88

RV88 240_0402_1%

240_0402_1%

CLKB0<28> CLKB0#<28> CKEB0<28>

DRAM_RST#<28,29,30,32>

PX@

+VREFC_B0

B_BA0<28,32> B_BA1<28,32> B_BA2<28,32>

ODTB0<28> CSB0#_0<28> RASB0#<28> CASB0#<28> WEB0#<28>

3

UV10

MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9

MAB11 MAB12 MAB13 MAB14

UV10

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

X76@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

E3

MDB19

F7

MDB20

F2

MDB22

F8

MDB16

H3

MDB23

H8

MDB17

G2

MDB21

H7

MDB18

D7

MDB0

C3

MDB4

C8

MDB1

C2

MDB6

A7

MDB3

A2

MDB7

B8

MDB2

A3

MDB5

+1.5VGS

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VGS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

QSB3<28> QSB1<28>

DQMB3<28> DQMB1<28>

QSB#3<28> QSB#1<28>

RV89

RV89 240_0402_1%

240_0402_1%

PX@

+VREFC_B1

12

B_BA0 B_BA1 B_BA2

CLKB0 CLKB0# CKEB0

ODTB0 CSB0#_0 RASB0# CASB0# WEB0#

QSB3

DRAM_RST#

2

E3

MDB26

F7

MDB30

F2

MDB24

F8

MDB29

H3

MDB27

H8

MDB28

G2

MDB25

H7

MDB31

D7

MDB15

C3

MDB10

C8

MDB14

C2

MDB11

A7

MDB12

A2

MDB9

B8

MDB13

A3

MDB8

+1.5VGS

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VGS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

1

4.99K_0402_1%

Issued Date

PX@

RV75

PX@

RV77

+1.5VGS

12

15mil

+VREFC_B1

CV150

.1U_0402_16V7K

12

PX@

Compal Secret Data

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

ATI_Whistler_M2_VRAM_B

Size Document Number Rev

C 1.0

LA-9631P

Date: Sheet of

2

Date: Sheet of

1

31 60Wednesday, February 27, 2013

+1.5VGS

12

PX@

RV74

4.99K_0402_1%

B B

CV130

CV183

CV129

.1U_0402_16V7K

1U_0402_6.3V6K

A A

5

1

@CV130

@

PX@CV183

PX@

@CV129

@

2

4.99K_0402_1%

CV158

CV155

CV156

.1U_0402_16V7K

1U_0402_6.3V6K

1

@CV158

@

PX@CV155

PX@

PX@CV156

PX@

2

4

15mil

+VREFC_B0

CV149

.1U_0402_16V7K

12

PX@

RV76

CV159

1U_0402_6.3V6K

.1U_0402_16V7K

1

PX@CV159

PX@

2

www.laptopfix.vn

12

PX@

+1.5VGS+1.5VGS+1.5VGS

CV160

1

@CV160

@

2

CV162

CV161

10U_0603_6.3V6M

1

PX@CV162

PX@

PX@CV161

PX@

2

CV167

CV166

CV165

1U_0402_6.3V6K

1

PX@CV167

PX@

PX@CV166

PX@

PX@CV165

PX@

2

CV170

CV168

CV169

CV171

.1U_0402_16V7K

1

PX@CV170

PX@

PX@CV168

PX@

PX@CV169

PX@

PX@CV171

PX@

2

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

5

D D

C C

MDB[32..63]<28>

MAB[15..0]<28,31>

MDB[0..31]

MAB[15..0]

DRAM_RST#<28,29,30,31>

4

B_BA0<28,31> B_BA1<28,31> B_BA2<28,31>

QSB4<28> QSB5<28>

DQMB4<28> DQMB5<28>

QSB#4<28> QSB#5<28>

RV90

RV90 240_0402_1%

240_0402_1%

PX@

3

UV11

+VREFC_B2

CLKB1<28> CLKB1#<28> CKEB1<28>

ODTB1<28> CSB1#_0<28> RASB1#<28> CASB1#<28> WEB1#<28>

M8

VREFCA

H1

VREFDQ

N3

MAB0 MAB0

A0

P7

MAB1 MAB1

A1

P3

MAB2 MAB2

A2

N2

MAB3 MAB3

A3

P8

MAB4 MAB4

A4

P2

MAB5 MAB5

A5

R8

MAB6 MAB6

A6

R2

MAB7 MAB7

A7

T8

MAB8 MAB8

A8

R3

MAB9 MAB9

A9

L7

MAB10 MAB10

A10/AP

R7

MAB11

A11

N7

MAB12 MAB12

A12

T3

MAB13 MAB13

A13

T7

MAB14 MAB14

A14

M7

MAB15 MAB15

A15/BA3

M2

B_BA0 B_BA1 B_BA2

QSB4 QSB5

DQMB4 DQMB5

QSB#4 QSB#5

DRAM_RST# DRAM_RST#

12

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

X76@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E3

MDB33

F7

MDB37

F2

MDB35

F8

MDB39

H3

MDB32

H8

MDB36

G2

MDB34

H7

MDB38

D7

MDB44

C3

MDB41

C8

MDB47

C2

MDB43

A7

MDB45

A2

MDB40

B8

MDB46

A3

MDB42

+1.5VGS

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

+1.5VGS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

QSB6<28> QSB7<28>

DQMB6<28> DQMB7<28>

QSB#6<28> QSB#7<28>

RV91

RV91 240_0402_1%

240_0402_1%

PX@

+VREFC_B3

12

B_BA0 B_BA1 B_BA2

CLKB1 CLKB1# CKEB1

ODTB1 CSB1#_0 RASB1# CASB1# WEB1#

QSB6 QSB7

DQMB6 DQMB7

QSB#6 QSB#7

MAB11

UV12

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

X76@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

2

E3

MDB55

F7

MDB50

F2

MDB54

F8

MDB51

H3

MDB53

H8

MDB49

G2

MDB52

H7

MDB48

D7

MDB56

C3

MDB59

C8

MDB63

C2

MDB62

A7

MDB57

A2

MDB61

B8

MDB58

A3

MDB60

+1.5VGS

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

+1.5VGS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

1

4.99K_0402_1%

CV184

10U_0603_6.3V6M

1

@CV184

@

2

+1.5VGS

12

PX@

RV78

15mil

+VREFC_B3

CV172

.1U_0402_16V7K

12

PX@

12

RV82

1U_0402_6.3V6K

3

PX@

CV188

1U_0402_6.3V6K

1

PX@CV188

PX@

2

Issued Date

CV190

CV192

CV191

CV189

1U_0402_6.3V6K

1

PX@CV190

PX@

PX@CV189

PX@

2

CV194

.1U_0402_16V7K

1U_0402_6.3V6K

1

@CV192

@

@CV191

@

@CV194

@

2

Compal Secret Data

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

2

CV186

CV187

1U_0402_6.3V6K

1

PX@CV186

PX@

PX@CV187

PX@

2

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Inc.

Title

ATI_Whistler_M2_VRAM_A

Size Document Number Rev

C 1.0

LA-9631P

Date: Sheet of

1

32 60Wednesday, February 27, 2013

+1.5VGS

1 2

CLKB1

PX@

RV79 40.2_0402_1%

1 2

CLKB1#

PX@

RV81 40.2_0402_1%

B B

A A

RV81 40.2_0402_1%

5

12

CV198

0.01U_0402_16V7K

PX@

RV80

4.99K_0402_1%

PX@

RV83

4.99K_0402_1%

4

12

15mil

+VREFC_B2

CV173

.1U_0402_16V7K

12

PX@

+1.5VGS +1.5VGS+1.5VGS

CV175

CV174

CV176

1U_0402_6.3V6K

10U_0603_6.3V6M

1U_0402_6.3V6K

1

PX@CV175

PX@

PX@CV174

PX@

PX@CV176

PX@

2

CV179

CV178

CV177

1U_0402_6.3V6K

1

PX@CV178

PX@

PX@CV177

PX@

2

CV185

CV181

1U_0402_6.3V6K

10U_0603_6.3V6M

.1U_0402_16V7K

1

PX@CV179

PX@

PX@CV185

PX@

@CV181

@

2

www.laptopfix.vn

5

4

3

2

1

LCD POWER CIRCUIT

+3VS

Camera

W=60mils

USB20_P3<18> USB20_N3<18>

+LCDVDD_C ONN

1

C516

2

4.7U_0603_6.3V6K

USB20_P3 USB20_N3

USB20_P3

USB20_N3

PCH_PW M<17>

For EMI

1 2

R688 0_0402_5%@R 688 0_0402_5%@

1 2

R684 0_0402_5%@R 684 0_0402_5%@

L58

@L58

@

1

4

WCM- 2012-900T_4P

2

3

2

USB20_P3_R

3

USB20_N3_R

CMOS_ON#<42>

USB20_P3_R USB20_N3_R

R435

CMOS@R435

CMOS@

150K_0402_5%

+3VS

4.7V

1

C520

CMOS@C 520

CMOS@

.1U_0402_16V7K

2

LVDS_ACLK<17> LVDS_ACLK#<17>

EDID_DATA<17> EDID_CLK<17>

CMOS

(20 MIL)

Q83

Q83 LP2301ALT1G_SOT23-3

LP2301ALT1G_SOT23-3

S

G

2

1 2

R509 0_0402_5%@R509 0_0402_5%@

LVDS_A2< 17> LVDS_A2#<17> LVDS_A1< 17> LVDS_A1#<17> LVDS_A0< 17> LVDS_A0#<17>

+LCDVDD_C ONN

+3VS

+3VS_CMOS

CMOS@

D

13

BKOFF#

(60 MIL)

USB20_P3_R

USB20_N3_R

1

CMOS@

C518

C518 .1U_0402_16V7K

.1U_0402_16V7K

2

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

ACES_88341-3001 ME@

+3VS_CMOS

(20 MIL)

1

R02

2

LCD Conn.

1 2

1

0_0805_5%

C541

4.7U_0805_25V6-K

2

@

JLVDS1

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

31

G1

32

G2

33

G3

34

G4

C519

@C519

@

10U_0603_6.3V6M

B++LEDVDD

@

R813

+3VS

W=60mils

D D

C4

BKOFF#

12

C4

R716

R716 10K_0402_5%

10K_0402_5%

1500P_0402_50V7K

C C

BKOFF#<42>

B B

A A

U72

5

VIN

4

SS

1

APL3512ABI-TRG_SOT23-5

2

1

2

3

EN

R408

100K_0402_5%

+LCDVDD_C ONN

12

VOUT

GND

PCH_ENVDD<17>

Security Classification

2011/06/15 2012/07/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

www.laptopfix.vn

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

3

Compal Electronics, Inc.

Title

Size Doc ument Num ber Rev

Custom

Date: Sheet o f

2

Date: Sheet o f

Compal Electronics, Inc.

LVDS/CAMERA

LA-9631P

33 60Wednesday, Feb ruary 27, 2013

1

1.0

A

1 1

DAC_RED<17>

DAC_GRN<17>

DAC_BLU<17>

RP22

18

DAC_BLU

27

DAC_GRN

36

DAC_RED

45

150_0804_8 P4R_1%

2 2

+5VS

B

1

C522

2

10P_0402_50V8J

FCM1608C F-121T03 0603

1 2

FCM1608C F-121T03 0603

1 2

FCM1608C F-121T03 0603

1 2

1

C524

C523

2

10P_0402_50V8J

For EMI

C

L30

L31

L32

1

C525

2

10P_0402_50V8J

RED

GREEN

BLUE

1

C527

C526

2

10P_0402_50V8J

NC11

T66PA D T6 6PAD

RED

CRT_DD C_DAT_CONN GREEN

JVGA_HS_R BLUE

JVGA_VS_R

CRT_DD C_CLK_CONN

D

+5V_Display

JCRT1

6

11

1 7

12

2 8

16

G

13

17

G

3 9

14

4 10 15

5

CONTE_80 431-5K1-152

ME@

E

1

@

C531

2

C531

.1U_0402_16 V7K

2

C537

A

+3VS

U10

1

VCC_SYNC

2

VCC_VIDE O

7

1

CRT_DD C_DATA<17>

2

CRT_DD C_CLK<17>

CRT_VSYNC< 17>

CRT_HSYNC<17>

VCC_DD C

10

DDC_IN1

11

DDC_IN2

13

SYNC_IN1

15

SYNC_IN2

6

GND

TPD7S019 -15DBQR_SSOP16

B

SYNC_OUT1

SYNC_OUT2

8

BYP

VIDEO1

VIDEO2

VIDEO3

DDC_OUT 1

DDC_OUT 2

www.laptopfix.vn

1 2

C6 0.22U_0402 _10V6KC6 0.22U _0402_10V6K

3

RED

4

GREEN

5

BLUE

9

CRT_DD C_DAT_CONN

12

CRT_DD C_CLK_CONN

14

JVGA_VS

16

JVGA_HS

1 2

R411

22_0402_5%

1 2

R412

22_0402_5%

+5V_Display

12

R31

4.7K_0402_5 %

JVGA_VS_R

JVGA_HS_R

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

12

R33

4.7K_0402_5 %

@

1

C411

C412

2

10P_0402_50V8J

Compal Secret Data

2011/06/15 2012/07/11

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

CRT Connector

LA-9631P

E

1.0

34 60Wednesday, February 27, 2 013

1.0

C529

.1U_0402_16 V7K

3 3

4 4

.1U_0402_16 V7K

5

L35

HDMI_CLK+_CK<1 7>

HDMI_CLK-_CK<17>

D D

HDMI_TX0+_CK<17>

HDMI_TX0-_CK<17>

HDMI_TX1+_CK<17>

HDMI_TX1-_CK<17>

HDMI_TX2+_CK<17>

HDMI_TX2-_CK<17>

C C

HDMI_CLK+_CK

HDMI_CLK-_CK

HDMI_TX0+_CK

HDMI_TX0-_CK

HDMI_TX1+_CK

HDMI_TX1-_CK

HDMI_TX2+_CK

HDMI_TX2-_CK

1

4

WCM-2012HS-900T

L36

1

4

WCM-2012HS-900T

L37

1

4

WCM-2012HS-900T

L38

1

4

WCM-2012HS-900T

Pull up R for PCH OR VGA SIDE

+3VS

+5V_Display

B B

RP21

18 27 36 45

2.2K_0804_8P4R_5%

HDMI@

HDMIDAT_NB HDMIDAT_R HDMICLK_NB HDMICLK_R

HDMICLK_NB<17>

HDMIDAT_NB<17>

ESD

D32

@

HDMIDAT_R

HDMICLK_R

HDMI_DET HDMI_DET HDMI_TX1-_CONN

A A

9

10

8

9

7

6

6 5

YSCLAMP0524P_SLP2510P8-10-9

1

2

4

3

8

1

HDMIDAT_R

2

HDMICLK_R

4

5

3

4

For EMI

HDMI@L35

HDMI@

2

HDMI_CLK+_CONNHDMI_CLK+_CON N

2

3

HDMI_CLK-_CONN

3

HDMI@L36

HDMI@

2

HDMI_TX0+_CONN

2

3

HDMI_TX0-_CONN

3

HDMI@L37

HDMI@

2

HDMI_TX1+_CONN

2

3

HDMI_TX1-_CONN

3

HDMI@L38

HDMI@

2

HDMI_TX2+_CONN

2

3

HDMI_TX2-_CONN

3

+3VS

5

4

Q63B

HDMI@

2N7002DW-T /R7_SOT363-6

HDMI_CLK-_CONN

HDMI_CLK+_CONN

HDMI_TX1+_CONN

Q63A

HDMI@

2

2N7002DW-T /R7_SOT363-6

61

HDMICLK_R

3

YSCLAMP0524P_SLP2510P8-10-9

HDMIDAT_R

@

9

10

8

9

7

6

6 5

D28

1

2

4

3

8

1

HDMI_CLK-_CONN

2

HDMI_CLK+_CONN

4

HDMI_TX1-_CONN

5

HDMI_TX1+_CONN

3

+3VS

R485

1M_0402_5%

HDMI@

TMDS_B_HPD#<17>

TMDS_B_HPD#

1 2

Q93

HDMI@

G

2

2N7002H_SOT23-3

D

S

D

S

13

1 2

2

C544

.1U_0402_16V7K

R488

R488 20K_0402_5%

20K_0402_5%

HDMI@

+5VS

1

U73

1

2

IN

AP2330W-7_SC59-3

OUT

GND

3

2

W=40mils

+5V_Display

C543

.1U_0402_16V7K

1

2

ZZZ3

45@ZZZ3

45@

For CRT and HDMI

HDMI Logo

RO0000003HM

JHDMI1

HDMI_DET

+5V_Display

HDMIDAT_R HDMICLK_R

HDMI_CLK-_CONN

HDMI_CLK+_CONN HDMI_TX0-_CONN

HDMI_TX0+_CONN HDMI_TX1-_CONN

HDMI_TX1+_CONN HDMI_TX2-_CONN

HDMI_TX2+_CONN

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

SUYIN_100042GR019M23DZL

ME@

20

G1

21

G2

22

G3

23

G4

DVT

RP26

45 36 27 18

680 +-5% 8P4R

HDMI@

RP27

45 36 27 18

680 +-5% 8P4R

HDMI@

13

D

G

Q95

S

HDMI@

2N7002H_SOT23-3

+3VS

2

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_TX2+_CONN

HDMI_TX2-_CONN

YSCLAMP0524P_SLP2510P8-10-9

@

9

10

8

9

7

6

6 5

D33

1

2

4

5

3

8

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_TX2+_CONN

HDMI_TX2-_CONN

HDMI_TX1+_CONN HDMI_TX1-_CONN HDMI_CLK+_CONN HDMI_CLK-_CONN

HDMI_TX0+_CONN HDMI_TX0-_CONN HDMI_TX2+_CONN HDMI_TX2-_CONN

Security Classification

2011/06/15 2012/07/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Docum ent Number Rev

B

Date: Sheet of

2

Date: Sheet of

HDMI CONN

LA-9631P

1.0

35 60Wednesday, February 27, 2013

1

www.laptopfix.vn

A

B

C

D

E

Mini Card for WLAN/WiMAX(Half)

1 1

+3VS_WLAN+3VS

80mil

J6

2

112

JUMP_43X79

JWLN1

@

1 2

R508 0_0402_5%

PCIE_WAKE#<16>

PCH_BT_ON#<19>

2 2

INTEL_BT_OFF#<19>

3 3

R508 0_0402_5%

CLKREQ_WLAN#<15>

CLK_PCIE_WLAN1#<15>

CLK_PCIE_WLAN1<15>

PCIE_PRX_DTX_N2<15> PCIE_PRX_DTX_P2<15>

PCIE_PTX_C_DRX_N2<15> PCIE_PTX_C_DRX_P2<15>

EC_TX<42,43> EC_RX<42,43>

DVT

1 2

R405

1K_0402_5%

For EC to detect debug card insert.

PCIE_WAKE#_WLAN

100_0402_1%

R505

1 2 1 2

R506

100_0402_1%

INTEL_BT_OFF#_R

+3VS_WLAN

1 2

R507

R507 100K_0402_5%

100K_0402_5%

JWLN1

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

GND1

BELLW_80003-8041

ME@

GND2

10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

JUMP_43X79

2

4

6

8

10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

+1.5VS

+3VS_WLAN

1 2

R501 0_0402_ 5%@R501 0_0402_5%@

1 2

R502 0_0402_ 5%@R502 0_0402_5%@

USB20_N10 <18> USB20_P10 <18>

PCH_WL_OFF# <18> PLT_RST# <18,23,37,42>

SMB_CLK_S3 <1 2,13,15> SMB_DATA_S3 <12,13,15>

4 4

Security Classification

2011/06/15 2012/07/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Docum ent Number Rev

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Mini-Card/NEW Card/SIM

LA-9631P

36 60Wednesday, February 27, 2013

E

1.0

www.laptopfix.vn

5

For LAN & Green CLK

D D

LAN_PW R_ON#<42>

C C

B B

LAN_PW R_ON#

PLT_RST#<18,23,36 ,42>

PCIE_PRX _DTX_N1<15>

PCIE_PRX _DTX_P1<15>

PCIE_PTX _C_DRX_N1<15>

PCIE_PTX _C_DRX_P1<15>

CLK_PCIE _LAN#<15> CLK_PCIE _LAN<1 5>

LAN_W AKE#<42>

CLKREQ_L AN#<15>

Vendor recommand reseve the PU resistor close LAN chip

+3V_LAN

Near Pin13

+3VALW

J10

112

JUMP_43X 79

S

@

CL7

CL7 .1U_0402_16 V7K

.1U_0402_16 V7K

@

1 2

@

1 2

1

CL19

2

.1U_0402_16V7K

Near Pin31

S

@

G

QL1

2

LP2301ALT 1G_SOT23-3

.1U_0402_16V7K

@

RL3

12

10K_0402_5 %

Vendor recommand reseve the PU resistor close LAN chip

2

1

1 2

RL4 4.7K_0402_5 %

Place Close to Chip

CL9 .1U_0402 _16V7KCL9 .1U_0402 _16V7K

CL11 .1U_0402 _16V7KCL11 .1U_040 2_16V7K

RL7 0_0402_5%@RL7 0_0402_ 5%@

RL9 4.7K_0402_5%

RL11 4.7K_0402_5%@RL11 4.7K_0402_5%@

1

CL18

CL17

2

.1U_0402_16V7K

Near Pin19

2

D

13

Near Pin6

+3V_LAN

PLT_RST#

PCIE_PRX _C_DTX_N1

PCIE_PRX _C_DTX_P1

PLT_RST#

PCIE_W AKE#_R

LAN_XTA LO LAN_XTA LI

+1.1_AVDD L +1.1_AVDD L +1.1_AVDD L +1.1_AVDD L_L +1.1_AVDD L

1

CL21

CL20

2

1U_0402_6.3V6K

4

+LX_R +LX

CL1

SWR@

Close to Pin40

UL1

8172@

UL1

8172@

QCA8172-BL3A-R

SA0000654 10

SA0000654 10 S IC QCA8172 -BL3A-R QFN 40P E-LA N CTRL

S IC QCA8172 -BL3A-R QFN 40P E-LA N CTRL

UL1

29

TX_N

Atheros

30

36

35

32 33

2

3

25 26

28 27

7 8

4

13 19 31 34

6

1

41

2

.1U_0402_16V7K

@

Atheros

TX_P

AR8151/AR8161

RX_N

RX_P

REFCLK_N REFCLK_P

PERST#

WAKE#

SMCLK SMDATA

NC TESTMODE

XTLO XTLI

CLKREQ#

AVDDL AVDDL AVDDL AVDDL AVDDL_REG/AVDD L

GND

AR8162-BL 3A-R_QFN40_5X5

8162@

8162@ SA000052J 20

SA000052J 20 IC AR8162-BL 3A-R QFN 40P E-LAN CTRL

IC AR8162-BL 3A-R QFN 40P E-LAN CTRL

VDDCT/ISOLAN

DVDDL_REG/DVDD L

AVDDH/AVDD33

AVDDH_REG

LED_0 LED_1 LED_2

TRXN0 TRXP0 TRXN1 TRXP1 TRXN2 TRXP2 TRXN3 TRXP3

RBIAS

VDD33

DVDDL/PPS

AVDDH

38 39 23

12 11 15 14 18 17 21 20

10

1

40

LX

5

24 37

16 22 9

3

Close together

1

CL2

2

.1U_0402_16V7K

10U_0603_6.3V6M

1000P_0402_50V7K

10U_0603_6.3V6M

SWR@

RL12 10K_ 0402_5%

LDO@

MDI0MDI0+ MDI1MDI1+

LAN_RBIA S

Place Close to P IN1

+3V_LAN

+LX

+1.7_VDDC T

+LX_R

+3V_LAN +2.7_AVDD H +2.7_AVDD H

1

CL23

CL22

2

.1U_0402_16V7K

@

Near Pin9

+LX

LL1

SWR@L L1

SWR@

1 2

4.7UH_SIA4 012-4R7M_20%

Note: Place Close to LAN chip LL1 DCR< 0.15 ohm Rate current > 1A

CL3

10U

12

mount RL12 if us e LDO modue

MDI0- <3 8> MDI0+ <38 > MDI1- <3 8> MDI1+ <38 >

1 2

RL8 2.37K_04 02_1%RL8 2.37K_0 402_1%

RL10 30K_04 02_5%RL 10 30K_ 0402_5%

1U_0402_6.3V6K

Near Pin22

1 2

+2.7_AVDD H

1

CL24

2

.1U_0402_16V7K

CL25

@

Near Pin37

+3V_LAN

1

CL26

2

.1U_0402_16V7K

Place Close to PIN1

CL13

CL12

1 2

.1U_0402_16V7K

1000P_0402_50V7K

@

1U_0402_6.3V6K

2

LL2

FBMA-L11 160808601LMA10T _2P

1 2

1

CL4

2

.1U_0402_16V7K

1

CL6

CL5

2

1U_0402_6.3V6K

4.7U_0603_6.3V6K

1

LL3

SWR@LL3

FBMA-L11 160808601LMA10T _2P

SWR@

1 2

+LX_R+1.1_AVDD L+1.1_AVDD L_L

Place close to Pin34

+3V_LAN

1

CL8

CL10

2

1U_0402_6.3V6K

.1U_0402_16V7K

Place close to Pin16

@

+3V_LAN

1

2

1

CL14

2

1U_0402_6.3V6K

1

CL15

CL16

2

10U_0603_6.3V6M

@

don't @ (could be B C cost done)

2

10U_0603_6.3V6M

LAN_XTA LI

YL1

A A

CL28

15P_0402_5 0V8J

Lenovo 5

5

4

YL1

4

NC

OSC

1

OSC

25MHZ_10 PF_7V25000014

1

2

15P_0402_5 0V8J

NC

LAN_XTA LO

3

2

1

CL29

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Nu mber Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

LAN-AR8162/8172

LA-9631P

Wednesday, February 27, 2013

LA-9631P

1

37 6 0

1.0

www.laptopfix.vn

5

4

3

2

1

ESD

@

DL1

AZC099-04S.R7G_SOT23- 6

Place Close to TL1

D D

DL1

AZC099-04S.R7G_SOT23- 6

1

I/O1

2

GND

I/O3

VDD

4

MDI0+MDI1+

5

1'S PN:SC300001G00 2'S PN:SC300002E00

3

I/O2

I/O4

6

MDI1-MDI0-

Reserve gas tube for EMI go rural solution

For EMI

CL30

RL14

1 2

75_0805_5%

CL30

1 2

10P_0603_50V

CHASSIS1_GND

TL1

MDI0+<37> MDI0-<37>

C C

For EMI

B B

1

CL31

0.01U_0402_16V7K

2

MDI1+<37> MDI1-<37>

MDI0+ MDI0-

MDI1+ MDI1-

MDO0+

MDO0-

MDO1+

MCT

MDO1-

MCT

1

TD+

2

TD-

3

CT

4

NC

5

NC

6

CT

7

RD+ RD-8RX-

MHPC_NS681612A

JLAN1

1

PR1+

2

PR1-

3

PR2+

4

PR3+

5

PR3-

6

PR2-

7

PR4+

8

PR4-

SANTA_130456-121

ME@

TX+

TX-

RX+

16

MDO0+

15

MDO0-

14

MCT

CT

13

NC

12

NC

11

MCT

CT

10

MDO1+

9

MDO1-

9

GND

10

GND

CHASSIS1_GND

DLL1

DLL1 BS4200N-C-LV_SMB-F2

BS4200N-C-LV_SMB-F2

GAS@

Place Close to TL1

12

For EMI

1 2

CL63 0.1U_0603_50V7KCL63 0.1U_0603_50V7K

1 2

CL61 0.1U_0603_50V7KCL61 0.1U_0603_50V7K

1 2

CL64 0.1U_0603_50V7KCL64 0.1U_0603_50V7K

1 2

CL65 0.1U_0603_50V7KCL65 0.1U_0603_50V7K

ESD

CHASSIS1_GND

A A

Security Classification

2011/06/15 2012/07/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Docum ent Number Rev

B

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

LAN_Transformer

LA-9631P

38 60Wednesday, February 27, 2013

1

1.0

www.laptopfix.vn

5

4

3

2

1

2 Channel

D D

+3VGS

SMSC thermal sensor

2

C329

.1U_0402_16V7K

@

REMOTE1+<24>

2200P_0402_50V7K

C C

REMOTE1-<24>

2200P_0402_50V7K

C587

1

2

REMOTE1+ EC_SMB_DA2

REMOTE1-

1 2

R335

+3VGS

R335

4.7K_0402_5%

@

REMOTE1,2+/-: Trace width/space:10/10 mil Trace length:<8"

placed near PCH

1

Lenovo 2

U9

1

VDD

2

D+

3

D-

THERM#4GND

EMC1402-2-ACZL-TR MSOP 8P

Address is 1001100xb

SCLK

SDATA

ALERT#

8

EC_SMB_CK2

7

6

5

EC_SMB_CK2 <15,24,42>

EC_SMB_DA2 <15,24,42>

B B

@

H1

H1 HOLEA

HOLEA

FAN1 Conn

+5VS

2

1

A A

@

R581

0_0603_5%

C591

C591 10U_0603_6.3V6M

10U_0603_6.3V6M

JFAN1

12

EC_TACH<42>

EC_FAN_PWM<42>

1

2

3

4

5

G5

6

G6

ACES_85205-04001

ME@

1

H_3P8

@

H6

H6 HOLEA

HOLEA

1

H_2P8

H2

H2 HOLEA

HOLEA

1

H_3P8

@

H7

H7 HOLEA

HOLEA

1

H_2P8

@

H3

H3 HOLEA

HOLEA

H_3P8

@

H8

H8 HOLEA

HOLEA

H_2P8

2P8 * 9 pcd

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

3

Compal Secret Data

Deciphered Date

VGA_L VGA_RCPU

H5

H4

H4 HOLEA

HOLEA

1

H_3P3

H5 HOLEA

HOLEA

1

H_3P3

HDD

@

H18

H18 HOLEA

HOLEA

1

H_2P8

@

FD1@FD1

@

FD3@FD3

@

FD4@FD4

1

FD2@FD2

1

C

BA

@

H10

H11

HOLEA

1

H_2P8

1

H_2P8

D

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

R

@

H16

H16 HOLEA

HOLEA

1

H_2P5X3P5N

E

M/B

󲦫󱙜󱪝

Compal Electronics, Inc.

Fintek-Thermal IC/FAN/screw

LA-9631P

M/B

1

@

H17

H17 HOLEA

HOLEA

1

H_3P0N

F

39 60Wednesday, February 27, 2013

󱙜󱪝

1.0

www.laptopfix.vn

A

B

C

D

E

F

G

H

SATA HDD Conn.

Near Connector

12

SATA_ITX_C_DRX_P0<14> SATA_ITX_C_DRX_N0<14>

SATA_DTX_C_IRX_N0<14> SATA_DTX_C_IRX_P0<14>

1 1

+5VS

1

@

C598

C598 1000P_0402_50V7K

1000P_0402_50V7K

2

SATA_DTX_C_IRX_P0

1

C599

C599 .1U_0402_16V7K

.1U_0402_16V7K

2

Near HDD

C596 0.01U_0402_16V7KC596 0.01U_0402_16V7K C597 0.01U_0402_16V7KC597 0.01U_0402_16V7K

12

1 2 1 2

+3VS

+5VS

1

C602

C602 10U_0603_6.3V6M

10U_0603_6.3V6M

2

C1840.01U_0402_16V7K C1840.01U_0402_16V7K C1850.01U_0402_16V7K C1850.01U_0402_16V7K

R551 0_0805_5%

R550 0_0805_5%

1 2

@

1 2

@

SATA_ITX_DRX_P0 SATA_ITX_DRX_N0

SATA_DTX_IRX_N0SATA_DTX_C_IRX_N0 SATA_DTX_IRX_P0

+3V_HDD

+5V_HDD

JHDD1

1

GND

2

RX+

3

RX-

4

GND

5

TX-

6

TX+

7

GND

8

3.3V

9

3.3V

10

3.3V

11

GND

12

GND

13

GND

14

5V

15

5V

16

5V

17

GND

18

Reserved

19

GND

20

12V

21 22

SUYIN_127043FB022G278ZR

GND

12V

GND

12V

23 24

2 2

+5VS

+5VALW

12

@

R568

10K_0402_5%

@

1

OUT

ODD_EN<19>

3 3

2

IN

GND

3

@

R675

R675 100K_0402_5%

100K_0402_5%

1 2

Q100

Q100 DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

@

J9

112

JUMP_43X79

D

S

D

S

13

Q99

G

LP2301ALT1G_SOT23-3

2

@

1

C607

0.01U_0402_16V7K

2

@

2

+5V_ODD

Place CAP in Sub BD

DVT

1

C608

C608 10U_0603_6.3V6M

10U_0603_6.3V6M

2

SATA_ITX_C_DRX_P2<14> SATA_ITX_C_DRX_N2<14>

SATA_DTX_C_IRX_N2<14>

SATA_DTX_C_IRX_P2<14>

SATA_ITX_C_DRX_P2 SATA_ITX_C_DRX_N2

SATA_DTX_C_IRX_N2 SATA_DTX_C_IRX_P2 SATA_DTX_IRX_P2_15

1 2

R401 0_0402_5%15@R401 0_0402_5%15@

1 2

R402 0_0402_5%15@R402 0_0402_5%15@

1 2

R403 0_0402_5%15@R403 0_0402_5%15@

1 2

R404 0_0402_5%15@R404 0_0402_5%15@

ODD_DA#<42>

+3VS

ODD_DA#

@

1 2

R555

10K_0402_5%

1 2

R710 0_0402_5%@R710 0_0402_5%@

SATA_ITX_DRX_P2_15 SATA_ITX_DRX_N2_15

SATA_DTX_IRX_N2_15

FOR 15"

SATA ODD FFC Conn.

JODD2

1

2

3

4

5

6

ODD_DETECT# +5V_ODD

7

8

9

10

GND GND

HB_A051020-SAHR21

ME@

11 12

Co-lay

FOR 14"

SATA ODD Conn.

JODD1

ODD Power Control

Near Connector

1 2

C616 0.01U_0402_16V7K14@C616 0.01U_0402_16V7K14@

SATA_ITX_C_DRX_N2

SATA_DTX_C_IRX_N2 SATA_DTX_C_IRX_P2 SATA_DTX_IRX_P2_14

4 4

1 2

C615 0.01U_0402_16V7K14@C615 0.01U_0402_16V7K14@

1 2

C614 0.01U_0402_16V7K14@C614 0.01U_0402_16V7K14@

1 2

C613 0.01U_0402_16V7K14@C613 0.01U_0402_16V7K14@

SATA_ITX_DRX_P2_14SATA_ITX_C_DRX_P2 SATA_ITX_DRX_N2_14

SATA_DTX_IRX_N2_14

ODD_DETECT# +5V_ODD

ODD_DA#

JODD1

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

DP

9

+5V

10

+5V

11

MD

12

GND GND13GND

ALLTO_C18518-11305-L

ME@

GND

15 14

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

D

Compal Secret Data

Deciphered Date

E

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

F

Date: Sheet of

Compal Electronics, Inc.

HDD/ODD/BT Connector

LA-9631P

G

40 60Wednesday, February 27, 2013

H

1.0

www.laptopfix.vn

5

CX20751 High Definition Audio Codec SoC With Integrated Class-D Stereo Amplifier. An integrated 5 V to 3.3 V Low-dropout voltage regulator (LDO).

An integrated 3.3 V to 1.8V Low-dropout voltage regulator (LDO).

D D

1 2

RA3

1 2

RA1 0_040 2_5%@RA1 0_0 402_5%@

1 2

RA2 0_040 2_5%@RA2 0_0 402_5%@

0_0402_ 5%@

For EMI

HDA_RST_AUD IO#<14 >

HDA_BITCLK _AUDIO<14>

EC_MUTE#<42>

RA492

1 2

33_0402 _5%

12

@

RA22

RA22 10K_040 2_5%

10K_040 2_5%

22P_040 2_50V8J

@

CA7

1 2

RA9 33_04 02_5%RA9 33 _0402_5%

Internal analog MIC

Internal SPEAKER

+3VLP

+3V_PCH

+3VS

Should be same supply rail as used for PCH HDA bus controller section

ESD

+3VS

12

@

RA15

4.7K_04 02_5%

1

@

CA11

CA11 .1U_0402 _16V7K

.1U_0402 _16V7K

2

HDA_RST_AUD IO#

C C

+3V_PCH

HDA_SYNC_A UDIO<14>

HDA_SDOUT_A UDIO<14>

+3VS

RA4 0_04 02_5%@RA4 0_ 0402_5%@

HDA_SDIN0<14>

For EMI

1 2

CA64 .1U_04 02_16V7KC A64 . 1U_0402_1 6V7K

1 2

CA65 .1U_04 02_16V7KC A65 . 1U_0402_1 6V7K

1 2

CA66 .1U_04 02_16V7KC A66 . 1U_0402_1 6V7K

B B

PC Beep

EC Beep

ICH Beep

A A

Lenovo 3

HDA_SPKR<14 >

BEEP#<42>

1 2

CA37 .1U_040 2_16V7KCA37 .1 U_0402_16 V7K

1 2

CA45 .1U_040 2_16V7KCA45 .1 U_0402_16 V7K

5

CA8

@

CA16

@

1 2

1

2

1U_0603_10V4Z

1

2

4.7U_0603_6.3V6K

@

RA21

33_0402 _5%

PC_BEEP

+3V_AVDD_ HP

1

CA9

2

1

CA17

2

.1U_0402_16V7K

HDA_RST_AU DIO#

HDA_BITCLK _AUDIO HDA_SYNC_A UDIO

HDA_SDOUT_A UDIO

PC_BEEP

MIC_IN

SPK_L2+ SPK_L1-

SPK_R2+ SPK_R1-

1

CA5

2

CA6

@

.1U_0402_16V7K

+3VS

+LDO_1.8 V

1

CA24

2

MIC1

WM-64PC Y_2P

@

4

1

2

4.7U_0603_6.3V6K

CA15

10 mils

1

CA25

2

.1U_0402_16V7K

4.7U_0603_6.3V6K

1

MIC_IN_C

2

GNDA

4

+VREF_1V 65

1

CA1

CA2

2

1U_0603_10V4Z

.1U_0402_16V7K

1

@

CA10

2

1U_0603_10V4Z

.1U_0402_16V7K

18

2

3

7

27

UA1

9

RESET#

5

BIT_CLK

8

SYNC

6

SDATA_IN

4

SDATA_OUT

10

PC_BEEP

39

SPKR_MUTE#

1

DMIC_DAT/GPIO1

40

DMIC_CLK / MUSIC_REQ/GPIO0

36

MUSIC_REQ/GPIO0/PORTC_L_MIC

37

GPIO1/PORTC_R_MIC

12

LEFT+

14

LEFT-

17

RIGHT+

15

RIGHT-

29

VDD_IO

FILT_1.8

DVDD_3.3

VDDO_3.3

VREF_1.65V

GND

CX20751 -11Z_QFN40

41

CX20751 -11Z_QFN40

Place colose to Codec chip

+MICBIASC

12

RA23

2.2K_04 02_5%

CA41 1U_ 0603_10V 4ZCA41 1U_0603 _10V4Z

1

2

CA44

CA42

.1U_0402_16V7K

@

CA3 vendor suggest change to 2.2U

1

2

CA4

CA3

2

1

2.2U_0603_6.3V4Z

CA18

@

For Layout

24

28

LPWR_5.0

RPWR_5.0

AVDD_5V

AVDD_3.3

AVDD_HP CLASS-D_REF

JSENSE

MICBIASB MICBIASC

PORTB_L_LINE

PORTB_R_LINE

PORTD_A_MIC PORTD_B_MIC

HGNDA HGNDB

PORTA_L PORTA_R

AVEE FLY_P FLY_N

1 2

AVDD_3.3 pinis output of internal LDO. NOT connect to external supply.

.1U_0402_16V7K

1

CA20

2

4.7U_0603_6.3V6K

For Layout

13 16 11

38

JSENSE

34 35

32

MICB_L

33

MICB_R

30

APPLE_ MIC

31

NOKIA_MIC

25

HGNDA

26

HGNDB

22

HP_L

23

HP_R

21 19 20

CA29 1U_0603 _10V4ZCA29 1U_06 03_10V4Z

MIC_IN

3

+LDO_OUT_3 .3V

+5VS

CA19

1

CA26

2

.1U_0402_16V7K

Universal Jack

CA19

.1U_0402_16V7K

+MICBIASB +MICBIASC

External MIC

Headphone

1 2

1

CA35

2

wide 20MIL

SPK_R1SPK_R2+ SPK_L1 SPK_L2 +

3

2

RA5 5.11 K_0402_1%RA5 5.11K_0 402_1%

RA6 10K_ 0402_1%RA6 10K_04 02_1%

JSENSE

RA7 20K_ 0402_1%RA7 20K_04 02_1% RA8 39.2 K_0402_1%RA8 39.2K_0 402_1%

For Universal jack

Layout Note:Path from +5VS to LPW R_5.0 RPWR_5.0 must be very low resistance (<0.01 ohms)

+5VS

1

2

1

CA21

2

.1U_0402_16V7K

1

CA22

CA23

@

2

.1U_0402_16V7K

4.7U_0603_6.3V6K

Please bypass caps very close to device.

For EMI

APPLE_ MIC HGNDB NOKIA_MIC HGNDA HP_L HPOUT_L

1 2

RA16 100_ 0402_1%RA16 100_0 402_1%

1 2

RA12 100_ 0402_1%RA12 100_0 402_1%

1 2

RA13 15_0 402_5%RA13 1 5_0402_5 %

1 2

RA14 15_0 402_5%RA14 1 5_0402_5 %

For Universal jack

Lenovo

6

MICB_L HP_L

MICB_R HP _R

+MICBIASB

HPOUT_L

2

CA30

1

.1U_0402_16V7K

2.2U_0603_6.3V4Z

HPOUT_R

HGNDB

HGNDA

For EMI

LA1

LA1 0_0603_ 5%

0_0603_ 5%

@

LA3

LA3 0_0603_ 5%

0_0603_ 5%

@

1 2

LA1 FCM1608CF -121T03 0603LA1 FCM 1608CF-121T03 0603

1 2

LA2 FCM1608CF -121T03 0603LA2 FCM 1608CF-121T03 0603

1 2

LA3 FCM1608CF -121T03 0603LA3 FCM 1608CF-121T03 0603

1 2

LA4 FCM1608CF -121T03 0603LA4 FCM 1608CF-121T03 0603

@

LA2

LA2 0_0603_ 5%

0_0603_ 5%

LA4

LA4 0_0603_ 5%

0_0603_ 5%

SPK_R1-_ CONN SPK_R2+_ CONN SPK_L1 -_CONN SPK_L2 +_CONN

For EMI

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

2011/06/15 2012/07/11

1 2

RA17 100_ 0402_1%RA17 100_0 402_1%

1 2

RA18 100_ 0402_1%RA18 100_0 402_1%

1 2

RA20 3K_0 402_5%RA20 3K_0 402_5%

1 2

RA19 3K_0 402_5%RA19 3K_0 402_5%

12

CA33

CA31

CA33

CA32

100P_0402_50V8J

1

CA39

CA38

2

1000P_0402_50V7K

Compal Secret Data

1000P_0402_50V7K

2

CA34

100P_0402_50V8J

1

CA40

2

Deciphered Date

CA36

1 2

CA46

1 2

12

100P_0402_50V8J

1

ESD

CA43

2

SPK_R1-_ CONN

1000P_0402_50V7K

SPK_R2+_ CONN

1 2

Lenovo

1

1 2 1 2

2.2U_040 2_6.3V6M

ESD

HPOUT_L

HPOUT_R

HGNDB

HGNDA

AZ5125-02S.R7G_SOT23-3

+5VS

Sense resistors must be connected same power that is used for VAUX_3.3

+3VS

mount RA6 on the Jack Sense circuit to configure Port-C for mono MIC.

PLUG_IN

HGNDA, HGN DB 80mils

1 2

CA28 2.2U_0 402_6.3V6 MCA 28 2 .2U_0402_6 .3V6M

1 2

CA27 2.2U_0 402_6.3V6 MCA 27 2 .2U_0402_6 .3V6M

2

3

2

3

DA2

DA1

@

1

6

5

4

1

AZ5125-02S.R7G_SOT23-3

DA3

I/O4

I/O2

VDD

GND

I/O3

I/O1

AZC099-04 S.R7G_SOT23 -6

@

Title

Size Document Numb er Rev

Custom

Date: Sheet of

3

2

1

Don't support LINE_IN function RA7 could be @

Combo Jack (Normal Open)

JHP1

4 3 1 2

HPOUT_RHP_R

5

PLUG_IN

6

SINGA_2S J2352-0001 31F

ME@

JSPK1

1

2

3

4

5

G5

6

G6

ME@

ACES_85 205-04001

SPK_L2 +_CONN

SPK_L1 -_CONN

ACES_85 205-04001

Compal Electronics, Inc.

CX20751 Codec

LA-9631P

1

1.0

41 60Tuesday, March 05, 2013

1.0

www.laptopfix.vn

+3V_EC

+3VALW

1 2

R590 47K_0402_5%R590 47K_0402_5%

KSO[0..15]< 43>

KSI[0..7]<43>

100P_0402_50V8J

1 2

R606 10K_0402_5%R606 10K_0402_5%

+3VS

1 2

R605 10K_0402_5%R605 10K_0402_5%

L44

FBM-11-160808-6 01-T_0603

1 2

C656

.1U_0402_16V7K

1 2

L45

FBM-11-160808-6 01-T_0603

12

C660 22P_0402_50V8J@ C660 22P_0402_50V8J@

C661

.1U_0402_16V7K

KSO[0..15]

KSI[0..7]

+3V_EC

R600

1 2

R604

1 2

1

@

C666

2

LAN_WAKE#

EC_TACH

PCH_PWROK<16>

C666 100P_0402_50V8J

100P_0402_50V8J

2

C665

Share ROM

1

2

ECAGND

R589 10_0402_5%@R58 9 10_040 2_5%@

PLT_RST#<18,23,36,37>

2

1

2.2K_0402_5%

EC_SMB_DA2 EC_SMB_CK2

12

R608

100K_0402_5%

@

1

C659

1000P_0402_50V7K

2

ECAGND

12

EC_SMB_CK1

EC_SMB_DA1

+EC_VCCA

SUSCLK<16>

+3VALW

.1U_0402_16V7K

C653

C654

1

@C659

@

12

C47

C47 22P_0402_50V8J

22P_0402_50V8J

2

GATEA20<19>

KBRST#<19>

SERIRQ<14>

LPC_FRAME#<1 4>

LPC_AD3<14> LPC_AD2<14> LPC_AD1<14> LPC_AD0<14>

CLK_PCI_EC<18>

EC_SCI#<19> BATT_LEN#<47>

ESD

KSO16<43> KSO17<43>

EC_SMB_CK1<47,48> EC_SMB_DA1<47,48> EC_SMB_CK2< 15,24,39> EC_SMB_DA2< 15,24,39>

PM_SLP_S3#<16> PM_SLP_S5#<16> EC_SMI#<16,19> CMOS_ON#<33>

EC_VGA_EN<53>

ODD_DA#<40>

ADP_ID_CLOSE<46> PCH_PWR_EN <20> EC_TACH<39 > LAN_WAKE#<37>

EC_TX<36,43> EC_RX<36,43>

NOVO#<43>

DGPU_PWR_EN< 18,25,51,53>

100K_0402_5%

@

R304

1 2

0_0603_5%

1

2

LPC_AD3 LPC_AD2 LPC_AD1 BATT_TEMP LPC_AD0

EC_RST# EC_SCI# BATT_LEN#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

EC_SMI#

ODD_DA#

EC_TACH LAN_WAKE# EC_TX EC_RX PCH_PWROK NOVO#

NUM_LED#: NC

12

@

R740

+3V_EC

1000P_0402_50V7K

C658

C662

1

2

@

1

GATEA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ

4

LPC_FRAME#

5

LPC_AD3

7

LPC_AD2

8

LPC_AD1

10

LPC & MISC

LPC_AD0

12

CLK_PCI_EC

13

PCIRST#/GPIO05

37

EC_RST#

20

EC_SCII#/GPIO0E

38

GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

EC_SMB_CK1/GPIO44

78

EC_SMB_DA1/GPIO45

79

EC_SMB_CK2/GPIO46

80

EC_SMB_DA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

GPIO0A

17

GPIO0B

18

GPIO0C

19

GPIO0D

25

EC_INVT_PWM/GPIO11

28

FAN_SPEED1/GPIO14

29

EC_PME#/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

PCH_PWROK/GPIO18

34

SUSP_LED#/GPIO19

36

NUM_LED#/GPIO1A

122

XCLKI/GPIO5D

123

XCLKO/GPIO5E

12

@

C93

C93 20P_0402_50V8

20P_0402_50V8

SA00004OB30

SA00004OB30 S IC KB9012QF A4 LQFP 128 P KB CONTROLLER

S IC KB9012QF A4 LQFP 128 P KB CONTROLLER

R416

@R41 6

@

1 2

0_0603_5%

1

2

Int. K/B

Int. K/B Matrix

Matrix

SM Bus

+3VLP

9

22

33

96

111

125

EC_VDD0

EC_VDD/VCC

PWM Output

AD Input

DA Output

PS2 Interface

CPU1.5V_S3_GATE/GPXIOA00

SPI Device Interface

SPI Flash ROM

GPIO

GND/GND

GND0

11

24

35

94

113

@

1

C535

C535 100P_0402_50V8J

100P_0402_50V8J

2

+EC_VCCA

67

GPIO0F

BEEP#/GPIO10

EC_VDD/AVCC

BATT_CHG_LED#/GPIO52

BATT_LOW_LED#/GPIO55

EC_RSMRST#/GPXIOA03 EC_LID_OUT#/GPXIOA04 PROCHOT_IN/GPXIOA05

H_PROCHOT#_EC/GPXIOA06

VCOUT0_PH/GPXIOA07

GPO

PBTN_OUT#/GPXIOA09

PCH_APWROK/GPXIOA10

GPI

PECI_KB9012/GPXIOD07

AGND/AGND

KB9012QF A3 LQFP 128P_1 4X14

69

ECAGND

GPIO12

ACOFF/GPIO13

BATT_TEMP/GPIO38

GPIO39

ADP_I/GPIO3A

GPIO3B

GPIO42

IMON/GPIO43

DAC_BRIG/GPIO3C EN_DFAN1/GPIO3D

IREF/GPIO3E

CHGVADJ/GPIO3F

EC_MUTE#/GPIO4A

USB_EN#/GPIO4B

CAP_INT#/GPIO4C

EAPD/GPIO4D

TP_CLK/GPIO4E

TP_DATA/GPIO4F

WOL_EN/GPXIOA01

HDA_SDO/GPXIOA02

VCIN0_PH/GPXIOD00

SPIDI/GPIO5B

SPIDO/GPIO5C

SPICLK/GPIO58

SPICS#/GPIO5A

ENBKL/GPIO40

PECI_KB930/GPIO41

FSTCHG/GPIO50

CAPS_LED#/GPIO53

PWR_LED#/GPIO54

SYSON/GPIO56 VR_ON/GPIO57

PM_SLP_S4#/GPIO59

BKOFF#/GPXIOA08

SA_PGOOD/GPXIOA11

AC_IN/GPXIOD01

EC_ON/GPXIOD02

ON/OFF/GPXIOD03

LID_SW#/GPXIOD04

SUSP#/GPXIOD05

GPXIOD06

V18R

U31

21

ADP_65

23

BEEP#

26

EC_FAN_PWM

27

ACOFF

63 64 65 66

ADP_ID

75

BRDID BRDID

76

68

ADP_90

70 71 72

83 84

USB_ON#

85

ADP_135

86 87 88

97 98 99 109

119 120 126 128

73 74 89 90

BATT_CHG_LED#

91

CAPS_LED#

92 93

BATT_LOW_LED#

95

SYSON

121 127

100 101

EC_LID_OUT#

102

Turbo_V

103 104

MAINPWON_R

105 106 107 108

110 112 114 115 116 117 118

PECI_KB9012

124

+V18R

SYS_PWROK_R TP_CLK TP_DATA

EC_TS_ON#

EC_SPI_SO EC_SPI_SI EC_SPI_CLK EC_SPI_CS#

BKOFF# PBTN_OUT# PCH_PWR_EN

ACIN EC_ON

LID_SW# SUSP# NUVOTON_VTT

4.7U_0603_6.3V6K

R417 0_0402_5%@R417 0_0402_5%@

EC_SPI_SO <14> EC_SPI_SI <14> EC_SPI_CLK <14> EC_SPI_CS# <14>

1 2

C667

R669 43_040 2_1%R669 43_0402_1%

1

2

BEEP# <41> EC_FAN_PWM <3 9> ACOFF <48>

ADP_I < 47,48>

ENBKL <17>

EC_MUTE#

1 2

CAPS_LED# <43> PWR_LED# <43> BATT_LOW_LED# <43>

SYSON <50>

VR_ON <54>

PM_SLP_S4# <16>

EC_RSMRST# <16>

EC_LID_OUT# <19>

BKOFF# <33>

PBTN_OUT# < 16>

SA_PGOOD <51>

ADP_65 <4 7>

BATT_TEMP <46,47>

GPU_IMON <53>

ADP_ID <46>

ADP_90 <4 7>

@

R593 10K_0402_5%

1 2

TP_CLK <43>

TP_DATA <43>

EC_TS_ON# <44>

R738 0_0402_5%@R738 0_0402_5%@

ME_FLASH <14>

NTC_V <47>

IMVP_IMON <54> VGATE <16,54> LAN_PWR_ON# <37>

BATT_CHG_LED# <43>

1 2

ACIN <16,24,46,48> EC_ON <49> ON/OFF <43>

H_PECI <6>

SUSP# <45,5 0,52>

Vcc

100K +/- 1%

R694

Board ID

0 1 2 3

+3VALW

EC_MUTE# <4 1> USB_ON# <44> ADP_135 < 47> SYS_PWROK <16>

LID_SW# <43>

EMC Request

SYSON

3.3V

0

12K +/- 1%

15K +/- 1%

20K +/- 1%

Turbo_V <47>

PROCHOT <47> MAINPWON <49>

C492

1

@

2

.1U_0402_16V7K

Board ID / SKU ID Table for AD channel

VR695

AD_BID

0 V

0.423V

0.541V

USB_ON#

LID_SW#

NUVOTON_VTT

min

R594

1 2

10K_0402_5%

R618

1 2

100K_0402_5%

R410 0_0402_5%@R410 0_0402_5%@

V

AD_BID

0.430V

0.550V

+5VALW

PROCHOT

+3VALW

1 2

typ

V

AD_BID

0.360V0.354V0.347V

0.438V

0.559V

TP_CLK

TP_DATA

BATT_TEMP

ACIN

2

Q37

2N7002H_SOT23-3

+V1.05S_VCCP

max

0 V0 V

0x00 - 0x0B 0x0C - 0x1C 0x1D - 0x26 0x27 - 0x30

+3VALW

@

R694

R694 100K_0402_1%

100K_0402_1%

1 2

R695

R695 100K_0402_1%

100K_0402_1%

1 2

R603 4.7K_0402_5%R603 4.7K_0402_5%

1 2

R598 4.7K_0402_5%R598 4.7K_0402_5%

1 2

C663 100P_0402_50V8JC663 100P_040 2_50V8J

1 2

C664 100P_0402_50V8JC664 100P_040 2_50V8J

1 2

R522 4.7K_0402_5%@R52 2 4.7K_040 2_5%@

13

D

G

S

1

C493

C493 47P_0402_50V8J

47P_0402_50V8J

2

EC AD

R695

R695 20K_0402_1%

20K_0402_1% R695

R695 12K_0402_1%

12K_0402_1% R695

R695 15K_0402_1%

15K_0402_1%

MP PVT DVT EVT

PVT2@

PVT@

DVT@

+5VS+5VS

H_PROCHOT# < 46,47,54,6>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

www.laptopfix.vn

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

BIOS & EC I/O Port

LA-9631P

42 6 0Wednesday, March 06, 2013

1.0

4

3

4

3

+5VS

TP_CLK<42> TP_DATA<42>

+3VALW EC_TX<36,42> EC_RX<36,42>

J12

@

1 2

SHORT PADS

J11

@

1 2

SHORT PADS

@

C696

.1U_0402_16V7K

1

C698

@C698

100P_0402_50V8J

2

@D15

@

PSOT24C_SOT23-3

@

2

3

D15

1

C697

@ C697

@

100P_0402_50V8J

ESD

L R

SW4

14@SW4

14@

SMT1-05_4P

5

6

2

1

SW6

15@SW6

15@

SMT1-05_4P

5

6

2

1

TP_3

TP_2 TP_1

JP3

1

2

3

4

ACES_85205-0400

ME@

4

3

4

3

KSI[0..7]

KSO[0..17]

+3VLP

@

R415

R415 100K_0402_5%

100K_0402_5%

1 2

@

1 2

R414

R414 0_0402_5%

0_0402_5%

+3VALW

+3VLP

R701

R701 100K_0402_5%

100K_0402_5%

1 2

ON/OFF

TP_CLK TP_DATA TP_3 TP_2

TP_1

Lenovo 1

15@

12

TP_3

R627

R627 0_0402_5%

0_0402_5%

12

TP_1

R619

14@R619

14@

0_0402_5%

SW5

14@SW5

14@

SMT1-05_4P

5

6

2

1

SW7

15@SW7

15@

SMT1-05_4P

5

6

2

1

C491

C490

@

2

.1U_0402_16V7K

TP_2

NOVO#< 42>

ON/OFF

ON/OFF <42>

JTP1

ME@JTP1

ME@

8

GND

7

GND

6

5

4

3

2

1

ACES_88058-060N

15/17" 14"

VCC

1

CLK

2

DAT

3

GND

4

L

5

R

6

NOVO#

VCC

21CLK

3

DAT

4

5

GND

6

R642

R642 100K_0402_5%

100K_0402_5%

1 2

D26

2

3

DAN202UT106_SC70-3

L

R

KSI[0..7] <42>

KSO[0..17] <42>

KSO16<42,43> KSO17<42,43>

1

NOVO_BTN#

14@

LED1

PWR_LED#<42>

BATT_LOW_LED#<42>

BATT_CHG_LED#<42>

CAPS_LED#<42>

PWR_LED#

BATT_LOW_LED#

BATT_CHG_LED#

CAPS_LED#

LED1

19-213A-T1D-CP2Q2HY-3T_WHITE

LED2

14@LED2

14@

HT-191UD5_AMBER

LED5

14@LED5

14@

19-213A-T1D-CP2Q2HY-3T_WHITE

14@

LED6

19-213A-T1D-CP2Q2HY-3T_WHITE

12

21

14@

R623 649_0402_1%

12

21

R764

R764 470_0402_5%

470_0402_5%

14@

21

12

14@

R765 649_0402_1%

12

21

14@

R2 649_0402_1%

+5VALW

+3VALW

+5VALW

+5VS

USB20_N11<18>

USB20_P11<18>

L57

1

USB20_N11 USB20_N11_R

4

USB20_P11 USB20_P11_R

WCM-2012-900T_4P

L30ESD24VC3-2 3P C/A SOT23 ESD

JKB1

1

KSI1

1

2

KSI7

2

3

KSI6

3

4

KSO9

4

5

KSI4

5

6

KSI5

6

7

KSO0

7

8

KSI2

8

9

KSI3

9

10

KSO5

10

11

KSO1

11

12

KSI0

12

13

KSO2

13

14

KSO4

14

15

KSO7

15

16

KSO8

16

17

KSO6

17

18

KSO3

18

19

KSO12

19

20

KSO13

20

21

KSO14

21

22

KSO11

22

23

KSO10

23

24

KSO15

24

25

KSO16

25

26

KSO17

26

27

28

29

30

ACES_88514-3001

For EMI

1 2

R687 0_0402_5%@R687 0_0402_5%@

1 2

USB20_P11

R683 0_0402_5%@R683 0_0402_5%@

@L57

@

1

4

2

3

LID_SW#<42>

D24

ESD

+3VALW

+5VALW +3VALW

3

+5VS

ME@JKB1

ME@

GND GND

1

31 32

NOVO_BTN# ON/OFF

2

LID_SW#

PWR_LED# BATT_LOW_LED# BATT_CHG_LED# CAPS_LED#

+3VS

USB20_N11_RUSB20_N11 USB20_P11_R

KSI1 KSI7 KSI6 KSO9 KSI4 KSI5 KSO0 KSI2 KSI3 KSO5 KSO1 KSI0 KSO2 KSO4 KSO7 KSO8 KSO6

KSO3 KSO12 KSO13 KSO14 KSO11 KSO10 KSO15

1 2 3 4

JPWRB1

1

2

3

4

5

6

7

GND

8

GND

ACES_88058-060N

ME@

JLED1

1

2

3

4

5

6

7

8

9

10

11

GND

12

GND

HB_A091020-SAHR21

ME@

JKB2

ME@JKB2

ME@

26

GND2

25

GND1

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

ACES_88514-2401

JCR1

1 2 3 4

5

GND

6

GND

CVILU_CF06041H0RB-NH

ME@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

www.laptopfix.vn

For 15"

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

Compal Electronics, Inc.

ROM/KBD/PWR/CR/LED/TP Conn.

LA-9631P

43 60Wednesday, March 06, 2013

1.0

5

D D

4

3

ESD

D27

@

9

1

10

1

10

8

U3RXDP1 U3RXDP2U3RXDP2U3RXDP1

U3TXDN1

U3TXDP1

YSCLAMP0524P_SLP2510P8-10-9

9

7

6

6 5

2

4

3

8

1

2

4

U3TXDN1

5

U3TXDP1

3

2

9

U3RXDN2 U3RXDN2U3RXDN1U3RXDN1

10

8

9

7

U3TXDN2

7

6

U3TXDP2

6 5

YSCLAMP0524P_SLP2510P8-10-9

1

D22 D30

D30

@

1

2

4

U3TXDN2

4

5

U3TXDP2

3

8

U2DN1

D22

@

3

I/O2

2

GND

1

I/O1

AZC099-04S.R7G_SOT23-6

6

I/O4

5

+5VALW +5VALW

VDD

4

U2DP1

I/O3

U2DP2

D31

@

3

I/O2

2

GND

1

I/O1

AZC099-04S.R7G_SOT23-6

6

I/O4

5

VDD

4

U2DN2

I/O3

For EMI

USB3.0

Ext. USB2.0 Touch Screen

+5VALW

C C

220U_6.3V_M

B B

A A

USB_ON#<42,44> USB_OC4# <18>

C714

+USB_VCCB

1

+

2

1

@

C715

C715 470P_0402_50V7K

470P_0402_50V7K

2

W=80mils

USB20_N9

USB20_P9

USB20_N9<18> USB20_P9<18>

+USB_VCCB

8

6 5

R868 0_0402_5%@R868 0_0402_5%@ R869 0_0402_5%@R869 0_0402_5%@

3

2

RIGHT USB PORT X1

12 12

10_0402_5%

USB20_N9_C

USB20_P9_C

1.2P_0402_50V8C

U36

1

GND

VOUT

2

VOUT7VIN

VIN3VOUT

4

FLG

EN

G547I2P81U_MSOP8

USB20_N9 USB20_N9_C

4

1

L66

WCM-2012HS-900T

For EMI

Right Ext.USB Conn.

JUSB3

8

GND

7

GND

6

5

4

3

2

USB20_P9_CUSB20_P9

@

R503

1 2

1

@

C1

2

@

R504

R504 10_0402_5%

10_0402_5%

1 2

1

@

C2

1.2P_0402_50V8C

2

1

ACES_88058-060N

JTS1

8

GND

7

GND

TS@

1 2

D

S

D

S

13

G

Q156

2

LP2301ALT1G_SOT23-3

@

6

5

4

3

2

1

ACES_50208-00601-P01

ME@

2

TS@

1

.1U_0402_16V7K

C1322

USB20_N2<18> USB20_P2<18>

ME@JUSB3

ME@

EC_TS_ON#<42>

+3VS_TS

R726 0_0402_5%TS@R726 0_0402_5%TS@

1 2

R5581 100K_0402_5%

100K_0402_5%

1 2

.1U_0402_16V7K

TS_RST#EC_TS_ON#

+3VS +3VS_TS

R5583 0_0402_5%

@R5581

@

1

C1331

2

@

Intel_PCH_USB2.0

USB20_N1<18>

USB20_P1<18>

Intel_PCH_USB3.0

USB3_RX2_N<18>

USB3_RX2_P<18>

USB3_TX2_N<18>

USB3_TX2_P<18>

Intel_PCH_USB2.0

USB20_N0<18>

USB20_P0<18>

Intel_PCH_USB3.0

USB3_RX1_N<18>

USB3_RX1_P<18>

USB3_TX1_N<18>

USB3_TX1_P<18>

C850

USB3@C850

USB3@

.1U_0402_16V7K

1 2

C848 .1U_0402_16V7K

.1U_0402_16V7K

C849

USB3@C849

USB3@

.1U_0402_16V7K

1 2

C847

USB3@C847

USB3@

.1U_0402_16V7K

WCM-2012HS-900T

1

2

443

USB2@

L55

WCM-2012HS-900T

1

2

443

USB3@

L54

WCM-2012HS-900T

1

U3TXDN2_L

U3TXDP2_L

USB3@C848

USB3@

1

2

443

USB3@

L53

WCM-2012HS-900T

1

2

443

USB2@

L51

WCM-2012HS-900T

1

2

443

USB3@

L50

WCM-2012HS-900T

1

U3TXDN1_L U3TXDN1

1

443

USB3@

L49

2

U3TXDP1_L

Place TX AC coupling Cap (C843~C850). Close to connector

2A/Active Low

+5VALW +USB3_VCCA

USB_ON#<42,44> USB_OC0# <18>

USB_ON#

U35

1

GND

VOUT

2

VOUT7VIN

VIN3VOUT

4

EN

G547I2P81U_MSOP8

FLG

8

6 5

C736

220U_6.3V_M

2

U2DN2

3

U2DP2

Left Ext.USB Conn. 2

U3RXDN2

U3RXDP2

U3TXDN2

U3TXDP2

U2DN1

U2DP1

+USB3_VCCA

U3TXDP2

U3TXDN2 U2DP2

U2DN2 U3RXDP2

U3RXDN2

2

3

2

3

2

3

Left Ext.USB Conn. 1

U3RXDN1

U3RXDP1

U3TXDP1

1

+

2

U3TXDP1

U3TXDN1 U2DP1

U2DN1 U3RXDP1

U3RXDN1

W=80mils

1

@

C735

C735 470P_0402_50V7K

470P_0402_50V7K

2

+USB3_VCCA

2

3

2

3

W=80mils

JUSB2

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND D-2GND

6

SSRX+

4

GND

5

SSRX-

TAITW_PUBAU1-09FNLSCNN4H0

ME@

Near HDMI Conn. USB Debug Port

W=80mils

JUSB1

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND D-2GND

6

SSRX+

4

GND

5

SSRX-

TAITW_PUBAU1-09FNLSCNN4H0

ME@

Near Audio Jack

10 11

GND

12

GND

13

GND

10 11

GND

12

GND

13

GND

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

2

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

USB3.0/Left USB Ports

1

44 60Wednesday, February 27, 2013

1.0

www.laptopfix.vn

A

B

C

D

E

+5VALW to +5VS

+5VALW

1 1

SUSP

2 2

3 3

SUSP<10>

DTC124EKAT146_SC59-3

SUSP#<42,50,52>

+RTCVCC

R652

220K_0402_5%

SUSP

12

R1110 100K_0402_5%

100K_0402_5%

1

C720

2

@

4.7U_0603_6.3V6K

B+ B+

12

R646

R646 150K_0402_5%

150K_0402_5%

5VS_GATE

13

D

2

Q110

G

2N7002H_SOT23-3

G

2N7002H_SOT23-3

S

+3VLP

@

R653

R653 220K_0402_5%

220K_0402_5%

1 2

Q117

1

2

OUT

IN

GND

3

@R1110

@

U38

DMN3030LSS-13_SOP8L-8

8 7

5

R649

82K_0402_5%

+V1.05S_VCCP

12

R659

R659 470_0603_5%

470_0603_5%

@

13

D

G

Q116

S

2N7002H_SOT23-3

@

4

12

5VS_GATE_R

2

SUSP

+5VS

1 2 36

1

2

4.7U_0603_6.3V6K

DVT DVT

12

C726

C726 2200P_0402_25V7K

2200P_0402_25V7K

+0.75VS

12

13

D

S

C721

@

R658

R658 22_0603_5%

22_0603_5%

2

G

Q115

Q115 2N7002H_SOT23-3

2N7002H_SOT23-3

1

@

C722

C722 1U_0603_10V4Z

1U_0603_10V4Z

2

SUSP

12

R644

R644 470_0603_5%

470_0603_5%

@

13

D

G

Q107

S

2N7002H_SOT23-3

@

2

SUSP

2

SUSP

2N7002H_SOT23-3

SUSP#

Q112

2

G

+1.5V

4.7U_0603_6.3V6K

+3VALW to +3VS

+3VALW

1

C723

2

@

4.7U_0603_6.3V6K

12

R647

R647 470K_0402_1%

470K_0402_1%

13

D

Q111

Q111 2N7002H_SOT23-3

2N7002H_SOT23-3

S

+1.5V to +1.5VS

LP2301ALT1G_SOT23-3

1

C717

@

2

+3VALW

12

100K_0402_5%

100K_0402_5% R648

R648

R651

1 2

13

D

0_0402_5%

@

S

U39

DMN3030LSS-13_SOP8L-8

U39

8 7

5

4

R650

R650 0_0402_5%

0_0402_5%

@

1 2

Q8

D

S

D

S

13

G

2

1.5VS_GATE

+3VS

1 2 36

12

C727

C727 2200P_0402_25V7K

2200P_0402_25V7K

+1.5VS

4.7U_0603_6.3V6K

1

C729

2

.1U_0402_16V7K

1

2

4.7U_0603_6.3V6K

1

C718

@

2

1

@

C724

@

C725

C725 1U_0603_10V4Z

1U_0603_10V4Z

2

1

C719

C719 1U_0603_10V4Z

1U_0603_10V4Z

2

DVT

12

R645

R645 470_0603_5%

470_0603_5%

@

13

D

2

G

Q108

S

2N7002H_SOT23-3

@

12

R643

R643 470_0603_5%

470_0603_5%

@

13

D

2

G

Q109

S

2N7002H_SOT23-3

@

SUSP

4 4

Security Classification

2011/06/15 2012/07/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

www.laptopfix.vn

2011/06/15 2012/07/11

Compal Secret Data

C

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

DC Interface

LA-9631P

45 60Wednesday, February 27, 2013

E

1.0

5

4

3

2

1

VIN

PF101

7A_24VDC _429007.WRM L

12

7A_24VDC _429007.WRM L

12

PC109

680P_0402_50V7K

21

APDIN1APDIN

12

PC101

PC102

1000P_0402_50V7K

ADP_ID <42>

JDCIN1

1

2

@

+3VALW

PR110

1 2

100K_0402_ 1%

2

3

4

5

100K_0402_ 1%

PR102

1 2

750_0402_1 %

PR111

PQ102A

PQ102A 2N7002KD W-2N_SOT363-6

2N7002KD W-2N_SOT363-6

6 1

2

PC108

0.1U_0402_16V7K

34

PQ102B

1 2

5

ADP_ID_C LOSE <42>

D D

ACES_503 12-00541-001

C C

VIN

12

100P_0402_50V8J

PL101

SMB30255 00YA_2P

1 2

12

PC103

PC104

100P_0402_50V8J

1000P_0402_50V7K

2N7002KDW-2N_SOT363-6

H_PROCH OT#<42 ,47,54,6>

B B

PD101

S SCH DIO BA S40CW SOT-32 3

+RTCBAT T

A A

1

+CHGRTC

2

3

RTC Battery

5

PR101

1K_0603_5%

1 2

PR103

1K_0603_5%

1 2

+CHGRTC_R

1 2 3 4

ACES_502 71-0020N-001

JRTC1

1 2 GND GND

@JRTC1

@

+3VLP

4

www.laptopfix.vn

61

2

PQ101A

@

2N7002KDW-2N_SOT363-6

H_PROCH OT#

PQ101B

2N7002KDW-2N_SOT363-6

34

12

PD105

@

1N4148WS-7-F_SOD323-2

@

5

12

@

PD104

1N4148WS-7-F_SOD323-2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

PR104

@

1 2

PR105

1 2

@

0.022U_0402 _16V7K

1.5M_0402_5%

0.022U_0402 _16V7K

1.5M_0402_5%

@

PR106

PC105

@PC1 05

@

12

@

PR107

PC106

12

@

2011/06/15 2012/07/11

+5VS

1 2

AS393MT R-E1 SO 8P OP

8

47K_0402_1%

P

1

O

G

4

+5VS

8

47K_0402_1%

P

7

O

G

PU101B

4

@

Compal Secret Data

@

PU101A

PU101A AS393MT R-E1 SO 8P OP

AS393MT R-E1 SO 8P OP

3

+

2

-

5

+

6

-

Deciphered Date

BATT_TEMP <42,47>

12

@

PC107

100P_0402_50V8J

ACIN <16,24,42,48>

2

+3VALW

PR108

1 2

PR109

1 2

@

10K_0402_1%

@

100K_0402_1%

Compal Electronics, Inc.

Title

PWR DCIN / RTC Battery

Size Document Number Rev

Custom

Gx00

Date: Sheet of

1

46 60Wednesday, February 27, 2 013

1.0

5

4

3

2

1

VMB2

@

JBATT1

1

2

3

4

5

6

7

8

GND

9

GND

D D

UYIN_200082GR007M229ZR

UYIN_200082GR007M229ZR S

S

EC_SMD A

EC_SMC A

12

PR201

100_0402_1%

12

100_0402_1%

PR204

PF201

PF201 12A_65V_4 51012MRL

12A_65V_4 51012MRL

21

VMB

SMB30255 00YA_2P

12

PC201

PC201 1000P_0402 _50V7K

1000P_0402 _50V7K

PL201

1 2

BATT+

12

PC203

0.01U_0402_ 25V7K

JBATT1 ---> 15"

JBATT2 ---> 14"

PH201 under CPU botten side : CPU thermal protection at 93 +-3 degree C Recovery at 56 +-3 degree C

+3VS

EC_SMB _CK1 <42,48>

1 2

PC210

@PR 223

@

1.5M_0402_ 5%

EC_SMB _DA1 <42,48>

+3VLP

+3VALW

BATT_TEM P <42,46,47>

12

PD201

1N4148WS-7-F_SOD323-2

PR223

1 2

@

H_PROCHOT#<42,46,54,6>

PQ201

13

D

@

S

2N7002KW _SOT323-3

A/D

PR211

100K_0402_ 1%

1 2

34

PQ202B

5

2N7002KD W-2N_SOT363-6

BATT_LEN #<42>

13

D

@

2

PQ209

G

2N7002KW _SOT323-3

G

2N7002KW _SOT323-3

S

12

PD203

@

1N4148WS-7-F_SOD323-2

4

www.laptopfix.vn

PROCHOT<42,47>

+3VALW

PR214

100K_0402_ 1%

1 2 61

PQ202A

2

2N7002KD W-2N_SOT363-6

+3VLP

PR220

100K_0402_ 1%

1 2

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

2

G

Issued Date

13

D

2N7002KW _SOT323-3

S

3

@

PR215

1 2

100K_0402_1%

2

ADP_OCP _1

G

PR216

PR216 0_0402_5%

0_0402_5%

1 2

@

BATT_OUT <48>

PQ205

2011/06/15 2012/07/11

Turbo_V<42>

Compal Secret Data

100K_0402_ 1%

PROCHOT<42,47>

ADP_65<4 2>

ADP_90<4 2>

ADP_135<42>

Deciphered Date

PR229

@

PR225

1 2

2

PR225

1 2

13

D

2

G

S

JBATT2

@

1

2

3

4

5

6

7

8

GND

9

GND

UYIN_200082GR007M229ZR

UYIN_200082GR007M229ZR S

S

C C

VL

PR202

PR202 75K_0402_1 %

75K_0402_1 %

1 2

PR213

PR213 100K_0402_ 1%

100K_0402_ 1%

1 2

B B

+5VALW

12

A A

C212

C212 P

P

@

22U_0603_6.3V6M

PC202

0.01U_0402_ 25V7K

BATT_TEMP<42,46,47>

12

PC207

PC207 100P_0402_ 50V8J

100P_0402_ 50V8J

R208

R208 P

P

75K_0402_1%

@

75K_0402_1%

@

1 2

R217

R217 P

P

1 2

@

100K_0402_1%

PU202

@PU2 02

@

1

IN

OUT

2

GND

SHDN#3BYP

G9191-330T1U _SOT23-5

5

12

C213

C213 P

P

@

100P_0402_50V8J

5

4

3

+

2

-

PU201B

AS393MT R-E1 SO 8P OP

12

PC211

@PC 211

@

1U_0402_1 6V6K

@

1 2

PR209

6.49K_0402_ 1%

1 2

PR206

6.49K_0402_ 1%

1 2

PR207

PR207 10K_0402_5 %

10K_0402_5 %

VL

12

8

AS393MT R-E1 SO 8P OP

4

P

G

PU201A

5

6

O

1

VLVMB + 3V_LDO

8

P

+

O

-

G

4

1 2

0.068U_0402 _16V7K~N

7

@

PC209

4.7U_0402_6 .3V6M

PR210

47K_0402_1 %

PC208

1 2

PR205

1.5M_0402_ 5%

12

0.068U_0402 _16V7K~N

+3V_LDO

1 2

PR218

@PR 218

@

47K_0402_1 %

@PC2 10

@

90W(DIS) : 6.65K 100W active 90W recovery 65W(UMA): 1.65K 70W active 65W recovery

20120314 Change to +EC_VCCA from +3VLP

ADP_I<42,48>

PR221

1 2

8.45K_0402_1%

NTC_V<42>

PR222

5.9K_0402_1%

1 2

PQ207

2N7002KW_SOT323-3

Gx00-CR

PR222 100K_0402_ 1%

100K_0402_ 1%

1

PR228

PR227

1 2

25.5K_0402_1%

PQ206

13

D

2N7002KW_SOT323-3

2

G

S

PR228

1 2

9.31K_0402_1%

PQ208

2N7002KW_SOT323-3

13

D

2

G

S

ECAGND

Compal Electronics, Inc.

Title

PWR-BATTERY CONN/OTP

Size Document Number Rev

Custom

Date: Sheet of

+EC_VCCA

12

PR226

47 60Wednesday, M arch 06, 2013

12.7K_0402_1%

12

PH201

100K_0402_1%_TSM0B104F4251RZ

1.0

5

1 2 36

13

12

PC302

PQ307B

5

ACPRN <48>

P2

12

PR304

0.1U_0603_25V7K

P2-1

12

P2-2

34

47K_0402_1%

200K_0402_1%

PR305

150K_0402_1%

2N7002KDW-2N_SOT363-6

PR307

D

S

AO4423L_SO8

1 2 3 6

12

PR306

PR306 20K_0402_1%

20K_0402_1%

PQ306

13

2N7002KW_S OT323-3

2

G

PR308

64.9K_0402_1%

1 2

PC303

1 2

0.1U_0402_25V6

12

PQ308

2

G

PQ302

4

EC_SMB_DA1<42,47>

EC_SMB_CK1<42,47>

BQ24737VDD

PQ301

PQ301 AO4407AL_SO8

AO4407AL_SO8

DTA144EUA_SC70-3

47K_0402_5%

13

2

PQ307A

PACIN

PQ305

DTC115EUA_SC70-3

1 2

PR326

10K_0402_5%

8 7

5

PQ304

2

1 3

PQ303

DTC115EUA_SC70-3

PR303

47K_0402_1%

1 2

2

ACOFF-1

PQ314

13

D

2

G

S

4

2N7002KW_SOT323-3

VIN

D D

C C

B B

A A

12

R302

R302 P

P

61

2

2N7002KDW -2N_SOT363-6

PACIN

ACON

ACOFF<42>

BATT_OUT<47,48>

5600P_0402_25V7K

BATT_OUT <47,48>

VIN

12

PR309

392K_0402_1%

12

PR310

PR310 10K_0402_1%

10K_0402_1%

13

D

S

2N7002KW_SOT323-3

4

8 7

5

PC301

+3VALW

1 2

PR315

316K_0402_1%

1 2

100K_0402_1%

PR314

10K_0402_1%

1 2

PACIN

12

PR312

12K_0402_1%

P3

ADP_I<42,47>

PC304

1 2

100P_0402_50V8J

PR316

ACPRN<48>

10

12

PR301

0.01_1206_1%

1

2

ACP

5

6

7

8

9

ACOK

ACDET

IOUT

SDA

BQ24727RGRR_VQFN20_ 3P5X3P5

SCL

ILIM

11

12

6.8_0402_5%

12

ACIN <16,24,42,46>

B+

4

3

PC307

1 2

3

4

CMPIN

CMPOUT

PU301

SRN12BM

SRP

13

12

PR317

PC306

12

0.1U_0402_25V6

PC305

0.1U_0402_25V6

ACN

0.1U_0402_25V6

PC308

0.1U_0402_25V6

12

1

2

ACP

GND

15

14

PR318

10_0402_5%

3

1 2

PL301

1UH_PCMB061H-1R0M S_7A_20%

1 2

PC310

10U_0805_25V6K@

PC311

12

0.1U_0402_25V6

ACN

21

TP

20

19

18

17

BST_CHG

16

12

PC312

PC312 1U_0603_25V6K

1U_0603_25V6K

PC309

0.1U_0402_25V6

BQ24737VCC

PD301

RB751V-40_SOD323-2

VCC

PHASE

HIDRV

BTST

REGN

LODRV

12

1 2

P2

PR319

10_1206_5%

DH_CHG

12

DL_CHG

PC313

10U_0805_25V6K@

1 2

PC314

1 2

1U_0603_25V6K

2.2_0603_5%

1 2

PR320

1 2

LX_CHG

0.047U_0603_16V7K

BQ24737VDD

2

CHG_B+

PQ312

AO4407AL_SO8

1 2 3 6

ACOFF-1

PD302

1SS355_SOD323-2

1 2

PD303

1SS355_SOD323-2

CHG

4

0.01_1206_1%

1

2

SRP

DISCHG_G

PC319

1 2

PC316

PC315

10U_0805_25V6K

PC317

12

PC319

1 2

2200P_0402_50V7K

6

578

4

123

6

578

4

123

PR322

200K_0402_1%

1 2

PR321

PR321 47K_0402_1%

47K_0402_1%

1 2

DISCHG_G-1

PQ311

13

DTC115EUA_SC70-3

2

PQ309

PL302

1 2

12

PR323

@

24737_SN

12

PC320

@

PL302

4.7_1206_5%

680P_0603_50V7K

10UH_PCMB104T-100MS _6A_20%

S TR MDS1525URH 1N SO8

PQ310

S TR MDS1521URH 1N SO8

PC324

PR324

8 7

5

1 2

12

0.1U_0402_25V6

SRN

PR325

PR325 200K_0402_1%

200K_0402_1%

D

S

4

3

1

VIN

PQ313

2N7002KW_S OT323-3

13

2

PACIN

G

12

PC322

10U_0805_25V6K

BATT+

12

PC323

10U_0805_25V6K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

www.laptopfix.vn

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

2012/07/112011/06/15

2

Title

Size D ocument Number Rev

Date: Sheet of

Compal Electronics, Inc.

CHARGER

Gx00-CR

1.0

48 60W ednesday, February 27, 2013

1

1.0

A

1 1

PU401

B+

PL401

HCB2012K F-121T50_0805

1 2

12

C401

C401 P

P

PC403

@

0.1U_0402_25V6

68P_0402_50V8J

2 2

B+

PL403

HCB2012K F-121T50_0805

1 2

12

C420

C419

C419 P

P

@

68P_0402_50V8J

3 3

EC_ON<42>

MAINPW ON<4 2>

P

10U_0805_25V6K

EC_ON

MAINPW ON

PC416

10U_0805_25V6K

12

PC404

2200P_0402_50V7K

5V_VIN

12

PC417

@

2200P_0402_50V7K

PR407

2.2K_0402_5 %

PR408

0_0402_5%

3V_VIN

PC405

SPOK

PC418

0.1U_0402_25V6

12

PC406

@

10U_0805_25V6K

12

5V_VCC

12

PR409

PU401

7

IN

8

IN

12

10U_0805_25V6K

9

GND

PG2LDO

S IC SY8208BQN C QFN 10P PWM

PU402

8

IN

9

GND

5

VCC

2

PG

S IC SY8208CQN C QFN 10P PWM

PC422

4.7U_0603_6.3V6M

3V5V_EN

12

PC431

1M_0402_1%

4.7U_0402_6.3V6M

OUT

LDO

B

PR411

1 2

PC432

0.047U_0402 _25V7K

1

EN1

3

EN2

6

BST_3V

BS

10

LX

4

OUT

5

1

EN1

3

EN2

6

BS

10

LX

4

7

3V5V_EN

BST_5V

12

PR401

0_0603_5%

12

PC414

4.7U_0603_6 .3V6M

PR412

PR412 0_0402_5%

0_0402_5%

0_0603_5%

VL

PC430

4.7U_0603_6.3V6M

3V5V_EN_ R

+3VLP

@

PR405

1 2

12

0.1U_0603_2 5V7K

ENLDO_3V5V

12

PC402

PC421

0.1U_0603_2 5V7K

1 2

LX_5V

10K_0402_5 %

0.01U_0402_ 25V7K

LX_3V

PR404

PC415

PC436

1 2

6800P_0402 _25V7K

PR406

PC429

3V5V_EN3V 5V_EN_R

0_0402_5%

@ PR 415

@

0_0402_5%

PC439

1 2

1.5UH_PCMC063T-1R5MN_9A_20%

12

4.7_1206_5%

3V_SN

12

680P_0603_50V7K

1K_0402_5%

1.5UH_PCMC063T-1R5MN_9A_20%

12

4.7_1206_5%

5V_SN

12

680P_0603_50V7K

PR414

12

PR415

12

PL402

PR413

12

PL404

1 2

C

ENLDO_3V 5V

PR416

1K_0402_5%

D

PR402

499K_0402_ 1%

12

PR403

PC407

150K_0402_1%

1U_0603_25V6K

12

1U_0603_25V6K

12

B+

E

+3VALWP

12

PC409

PC408

@

22U_0805_6.3V6M

12

PC410

22U_0805_6.3V6M

12

PC412

PC411

22U_0805_6.3V6M

12

PC435

PC434

PC413

470P_0402_50V8J

22U_0805_6.3V6M

+5VALWP

1

12

PC423

22U_0805_6.3V6M

12

PC425

PC424

22U_0805_6.3V6M

12

PC426

22U_0805_6.3V6M

+

PC433

2

PC428

PC427

@

22U_0805_6.3V6M

12

PC438

PC437

470P_0402_50V8J

150U_D2_6.3VY_R15M

PJ401

@PJ 401

@

+3VALWP +3VALW

+5VALWP

112

JUMP_43X 118

PJ402

@PJ 402

@

112

JUMP_43X 118

2

+5VALW

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

A

B

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

+1.05VS_VCCP

Size Document Number Rev

Custom

Gx00-CR

Date: Sheet of

D

Date: Sheet of

49 60Wednesday, February 27, 2 013

E

1.0

A

STATE S3 S5 1.5VP VTT_REFP 0.75VSP

S0

Hi Hi

S3

S4/S5

1 1

HiLo

Lo Lo

Note: S3 - sleep ; S5 - power off

On

Off

On

Off (Hi-Z)

Off Off

PR503

PR503 0_0603_5%

0_0603_5%

+0.75VSP

12

PC504

PC505

10U_0805_25V6K

+VTT_REFP

12

+1.5VP

PC506

0.033U_0402_16V7K

2 2

PR502

64.9K_0402_1%

SUSP#<42,45,50,52>

1 2

SYSON<42>

12

PC503

0.1U_0402_16V6K

3 3

0.033U_0402_16V7K

1 2

PR505

0_0402_5%

0.1U_0402_16V7K

PC508

@PC5 08

@

PU501

21

PAD

1

VTTGND

2

VTTSNS

3

GND

4

VTTREF

5

VDDQ

12

B

+1.5VP

12

BST_1.5V BST_1. 5V-1

20

VTT

RT8207MZQW _WQFN20_3X3

FB

6

12

PR506

5.76K_0402_1%

17

18

19

BOOT

UGATE

VLDOIN

S5

S3

TON

8

7

9

S3_1.5V

S5_1.5V

PR501

2.2_0603_5%

1 2

16

PHASE LGATE

PGND

CS

VDDP

VDD

PGOOD

10

PR509

887K_0402_1%

PR507

5.9K_0402_1%

1 2

PC526

0.1U_0402_16V6K

@

LX_1.5V

15

14

6.65K_0402_1%

13

12

11

+3VALW

12

@

12

1.5V_B+

12

PR511

PR510

PGOOD_1.5V

10K_0402_5%

0.1U_0603_25V7K

LG_1.5V

12

PC510

1U_0603_10V6K

UG_1.5VUG _1.5V

PC512

1 2

12

1U_0603_10V6K

5.1_0603_5%

PC511

PR514

C

1.5V_B+

12

5

4

12

123

5

123

+5VALW

PQ501

MDU1516URH_POWERDFN56-8-5

12

PQ502

12

MDU1511RH_POWERDFN56-8-5

12

1UH_PCMB104T-1R0M H_18A_20%

@

PR515

4.7_1206_5%

@

PC517

PC517 680P_0603_50V7K

680P_0603_50V7K

PC501

10U_0805_25V6K

PL501

@

0.1U_0402_25V6

4.7U_0805_25V6-K

12

2200P_0402_50V7K

330U_2.5V_M

PC513

PC509

PC520

PC501

PL502

1 2

HCB2012KF-121T50_0805

1

+

PC521

2

D

@

1

+

PC522

2

220U_6.3V_M

+1.5VP

B+

+1.5VP

OCP min 20A OVP min 1.65V

PJ504

2

112

JUMP_43X118@

PJ505

+1.5VP +1.5V

2

JUMP_43X118@

PJ506

2

JUMP_43X79

@

112

+0.75VS+0.75VSP

PU502

PU502 SY8033BDBC_DFN10_3X3

SY8033BDBC_DFN10_3X3

PJ502

+3VALW

2

112

JUMP_43X79@

SUSP#<42,45,50,52>

4 4

A

1.8VSP_VIN

12

PC502

PC502 22U_0805_6.3VAM

22U_0805_6.3VAM

PR516

1 2

0_0402_5%

EN_1.8VSP

PR504

PR504 1M_0402_5%

1M_0402_5%

@PC507

@

12

PC507

1 2

4

PG

FB

TP

NC

7

11

12

PC524

0.1U_0402_10V7K

2

LX

1.8VSP_LX

3

FB=0.6Volt

6

NC

1

@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

10

PVIN

9

PVIN

8

SVIN

5

EN

0.1U_0402_10V7K

www.laptopfix.vn

PL503

1UH_PH041H-1R0MS_3. 8A_20%

1 2

12

PR508

4.7_1206_5%

@

12

PC523

@

680P_0603_50V7K

PR512

20K_0402_1%

1.8VSP_FB

PR513

10K_0402_1%

12

PC525

68P_0402_50V8J

12

2011/06/15 2012/07/11

12

PC514

PC515

22U_0805_6.3VAM

Compal Secret Data

Deciphered Date

C

12

PC516

@

2200P_0402_50V7K

12

PC518

@

68P_0402_50V8J

+1.8VSP

PJ507

PC519

@

0.1U_0402_25V6

Title

Size D ocument Number Rev

Custom

Date: Sheet of

2

112

JUMP_43X79@

+1.8VS+1.8VSP

Compal Electronics, Inc.

+1.5VP/+1.8VSP

Gx00-CR

D

1.0

50 60Wednesday, February 27, 2013

1.0

5

4

3

2

1

VID [0] VID[1] VCCSA Vout 0 0 0.9V 0 1 0.8V 1 0 0.725V

D D

+3VALW +VCCSAP

1 1 0.675V

output voltage adjustable network

PJ602

2

+VCCSA_PWR_SRC

112

JUMP_43X79

PC601

PC608

1 2

22U_0805_6.3V6M

PC602

68P_0402_50V8J

12

FB_VCCSA_IC

SY8037BDCC_DFN12_3X3

PU601

12

PVIN

11

PVIN

10

SVIN

9

FB

8

VOUT

7

VID1

VID0

GND

13

1

+VCCSA_PHASE

LX

2

LX

3

LX

4

PG

5

EN

6

PR608

1M_0402_5%

100K_0402_5%

1 2

@PR614

@

0_0402_5%

12

0_0402_5%

1 2

PC606

@ PC606

@

.1U_0402_16V7K

PR601

PR614

PR603

12

SA_PGOOD <42>

+3VS

+V1.05S_VCCP_PWRGOOD <52>

+VCCSAP

+V1.05S_VCCP

PL601

0.47UH_FDVE0630-H-R47M=P3_17.7A_20%

1 2

12

@

PR602

4.7_0603_5%

12

PC605

@ PC605

@

680P_0402_50V7K

2

PR613

1 2

PC603

1 2

22U_0805_6.3V6M

PJ601

112

JUMP_43X118@

PR613

0.005_1206_1%

PC604

1 2

22U_0805_6.3V6M

+VCCSA

PC607

PC609

1 2

22U_0805_6.3V6M

12

1 2

1UH_PCMB063T-1R0MS_12A_20%

12

PC628

PC630

4.7U_0603_6.3V6K

H_VCCSA_VID0 <10>

The 1k PD on the VCCSA VIDs are empty. These should be stuffed to ensure that VCCSA VID is 00 prior to VCCIO stability.

H_VCCSA_VID1 <10>

PR612

82.5K_0402_1%

PC637

0.1U_0402_25V6

SNB_0.95V

12

PC634

@ PC634

@

680P_0603_50V7K

1 2

12

PR616

1M_0402_1%

PR610

@ PR610

@

4.7_1206_5%

1 2

PL605

1 2

12

+3VALW

12

133K_0402_1%

PR615

PR611

78.7K_0402_1%

100_0402_1%

12

PR606

12

PR607

0_0402_5%

DGPU_PWR_EN <18,25,42,53>

12

PC635

PC629

@

47U_0805_6.3V6M

220P_0402_50V7K

+VCCSA_SENSE <10>

12

PC633

47U_0805_6.3V6M

+0.95VGSP

PJ606

2

112

JUMP_43X118@

+0.95VGS

+0.95VGSP

12

PC622

PC631

22U_0805_6.3VAM

PR604

C C

B B

PL606

HCB2012KF-121T50_0805

1 2

B+

+3VS

12

PR618

@ PR618

@

0_0402_5%

ILMT_0.95V

A A

12

PR609

PR609 1M_0402_5%

1M_0402_5%

FB_VCCSA

PC621

2200P_0402_50V7K

PU604

8

PC627

10U_0805_25V6K

12

@

1 2

PR617

100K_0402_5%

B+_0.95V

12

@PC636

@

PC636

0.1U_0402_25V6

+3VS

ILMT_0.95V

PGD_0.95V

IN

9

GND

3

ILMT

2

PG

SY8208DQNC_QFN10_3X3

PR604

1K_0402_5%

PR605

1K_0402_5%

1

PC632

EN

BYP

LDO

PC632

0.1U_0603_25V7K

1 2

6

BS

10

LX

4

FB

7

5

12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

+VCCSAP

Size Document Number Rev

C

Gx00-CR

Date: Sheet of

1

51 60Wednesday, February 27, 2013

1.0

5

D D

PR701

60.4K_04 02_1%

+V1.05S_ VCCP_PWRG OOD<51>

PC702

0.1U_0402_25V6

12

60.4K_04 02_1%

1 2

12

10.7K_0402_1%~N

PR703

1 2

10_0402 _1%

PR706

PR704

1 2

PR705

12K_0402_1%

1 2

SUSP#<42,45,50>

C C

PR702

0_0402_ 5%

B B

VSSIO_SEN SE_L<9>

VCCIO_SEN SE<9>

4

12

PC701

10K_0402_1%@

1 2

PC703

0.01UF_0 402_25V7K

PC704

PC704 1000P_0 402_50V7K

1000P_0 402_50V7K

.1U_0402_16V7K

1

2

3

4

PC706

1 2

0.01UF_0 402_25V7K

PC705

PC705 1000P_0 402_50V7K

1000P_0 402_50V7K

1 2

+3VS

PR710

100K_0402_1%

17

PU701

PAD

VREF

REFIN

TPS5121 9RTER_QFN16_ 3X3

GSNS

VSNS

COMP5TRIP6GND

PR711

3

1 2

PR712

100K_0402_1%

1 2

16

15

PGOOD

12

MODE

14

EN

7

BST_1.05 VS_VCCP

13

BST

SW

DH

DL

V5

PGND

8

12

11

10

9

PR713

2.2_0603 _5%

1 2

LX_1.05V S_VCCP

DH_1.05V S_VCCP

PC707

0.1U_060 3_25V7K

1 2

DL_1.05V S_VCCP

12

PC708

1U_0603 _10V6K

+5VALW

PQ701

S TR MDU1 516URH 1N POW ERDFN56-8

4

PQ702

2

PJ701

2

JUMP_43 X118@

JUMP_43 X118@ PJ703

PJ703

2

JUMP_43 X118@

PL702

HCB2012 KF-121T50_080 5

12

PC715

@

0.1U_0402_25V6

PC714

330U_6.3 V_M

HCB2012 KF-121T50_080 5

1

+

2

1.05VS_B +

5

PC711

123

5

123

1UH_PCM B104T-1R0MH_1 8A_20%

12

PR714

4.7_1206_5%

@

12

PC709

1000P_0603_50V7K

@

12

PC712

PC713

@

10U_0805_25V6K

4.7U_0805_25V6-K

PL701

4.7U_0805_25V6-K

12

2200P_0402_50V7K

1

112

12

+1.05VS_VCCPP

+V1.05S_ VCCP+1 .05VS_VCCPP

B+

+1.05VP

75K_0402_1%

PR709

1 2

10_0402 _1%

S TR MDU1511RH 1N POWERDFN56-8

OCP min 20A OVP min 1.24V

A A

Security Class ification

2011/06/ 15 2 012/07/ 11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/ 15 2 012/07/ 11

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

+1.05VS_VCCP

Size Doc ument Number Rev

Custom

Gx00-CR

Date: Sheet of

2

Date: Sheet of

52 60W ednesday, February 27, 2013

1

1.0

A

+3VGS

B

C

D

Mars XT = 0.85V (1 1 0 1 0 0)

1 2

PR803 10K_0402_1%@PR803 10K_0402_1%@

PR802 10K_0402_1%PR802 10K_0402_1%

PR801 10K_0402_1%PR801 10K_0402_1%

@

PR813

DPRSLPVR_VGA-1

PR833

2.2K_0402_1%

PR834

PR835

12

PR836

COMP_VGA

1 2

ISEN3_VGA

PC871

PC874

1 2

390P_0402_50V7K

PR863

@

PR854

330P_0402_50V7K

1000P_0402_50V7K

PR860

PR813 147K_0402_1%

147K_0402_1%

1 2

PR820

0_0402_5%

PC805

@PC805

@

1 2

100P_0402_25V8K

CLK_ENABLE#_VGA

PSI#_VGA

RBIAS_VGA

1 2 3 4 5 6 7 8

FB_VGA

9

10

41

PR864

0_0402_5%

1 2

For 15W one phase

+5VS

12

PC850

0.22U_0402_10V6K

PC859

PC862

VRON_VGA

PU801

PGOOD PSI# RBIAS VR_TT# NTC VW COMP FB ISEN3 ISEN2

AGND

@

VSEN_VGA

12

PR814

PR814 0_0402_5%

0_0402_5%

1 2

GPU_VID6

38

39

40

37

35

VR_ON

CLK_EN#

DPRSLPVR

ISEN111VSEN12RTN13ISUM-14ISUM+15VDD

16

RTN_VGA

VDD_VGA

ISUM-_VGA

12

PC875

0.22U_0402_10V6K

12

VSUM_VGA_N001

@PC863

@

12

PC863

330P_0402_50V7K

1 1

GPU_GPIO0<24,53>

+3VGS

PR832

0_0402_5%

12

R841

R841 P

P

5.9K_0402_1%

PC847

33P_0402_50V8J

1 2

FB2_VGA

221K_0402_1%

VCCSENSE_VGA<27>

VSSSENSE_VGA<27,53>

12

GPU_GPIO0<24,53>

12

PR846

30K_0402_1%

+VGA_CORE

DGPU_PWROK

2 2

@

R840

R840 P

P

1 2

249K_0402_1%

1 2

3 3

PC848

150P_0402_50V8J

4 4

C873

C873 P

P

PR849

1000P_0402_50V7K

+3VGS

DGPU_PWR_EN<18,25,42,51>

EC_VGA_EN<42>

@ PR816

@

2.2K_0402_1%

@ PR830

@

12

R831

R831 P

P

1.91K_0402_1%

+3VGS

VW_VGA

PR842

499_0402_1%

1 2

PR843

1.69K_0402_1%

1 2

ISEN2_VGA

ISEN1_VGA

12

PR816

2.2K_0402_1%

1 2

PR818

1 2

0_0402_5%

PR819

1 2

PR830

1 2

1.91K_0402_1%

0_0402_5%

@

147K_0402_1%

22P_0402_50V8J

FB1_VGA

VSUM-_VGA

1 2

PR850

10_0402_1%

1 2

PR861

10_0402_1%

A

@PR818

@

1 2

2.2K_0402_1%

0_0402_5%

1 2

0_0402_5%

1 2

0_0402_5%

GPU_VID5

GPU_VID4

GPU_VID5

VID031VID132VID233VID334VID536VID6

VID4

BOOT2 UGATE2 PHASE2

VSSP2

LGATE2

VCCP

PWM3

LGATE1

VSSP1

PHASE1

VIN

IMON18BOOT119UGATE1

ISL62883CHRTZ-T_TQFN40_5X5

20

17

VIN_VGA

1 2

12

PC876

PC877

1U_0603_10V6K

0.22U_0603_25V7K

@PR851

@

PR851

82.5_0402_5%

@PC864

@

PC864

0.01U_0402_25V7K

PR862

PR862 953_0402_1%

953_0402_1%

1 2

GPU_VID3

30 29 28 27 26 25 24 23 22 21

PR845

0_0402_5%

PR848

1_0402_5%

PC860

0.22U_0603_10V7K

1 2

PR806 10K_0402_1%@PR806 10K_0402_1%@

PR804 10K_0402_1%PR804 10K_0402_1%

PR805 10K_0402_1%@PR805 10K_0402_1%@

GPU_VID2

GPU_VID1

<24>

GPU_VID3

GPU_VID4

12

+VGA_B+

+5VS

12

PC861

@

0.033U_0603_25V7K

12

GPU_VID0

<24>

GPU_VID2

12

PC849

PR859

11K_0402_1%

PC866

0.1U_0402_16V7K

1 2

PR807 10K_0402_1%@PR807 10K_0402_1%@

GPU_VID5

GPU_VID1

PC812

PC812 1U_0603_10V6K

1U_0603_10V6K

1 2

12

PC872

PC872 1U_0603_10V6K

1U_0603_10V6K

PR844 0_0402_5%@PR844 0_0402_5%@

PR847

1 2

0.047U_0402_16V7-K

PR853

12

www.laptopfix.vn

@

1 2

PR811 10K_0402_1%PR811 10K_0402_1%

PR810 10K_0402_1%@PR810 10K_0402_1%

PR808 10K_0402_1%@PR808 10K_0402_1%@

PR809 10K_0402_1%PR809 10K_0402_1%

GPU_VID3

GPU_VID2

GPU_VID4

<24>

GPU_VID0

1 2

11K_0402_1%

12

2.61K_0402_1%

NTC_VGA

12

PH802

PH802 10K_0402_1%_TSM0A103F34D1RZ

10K_0402_1%_TSM0A103F34D1RZ

Layout Note: Place near Phase1 Choke

B

GPU_VID1

<24>

BOOT2_VGA BOOT2_2_VGA

+5VS

GPU_IMON <42>

VSSSENSE_VGA <27,53>

VSUM+_VGA

VSUM-_VGA

1 2

PR812 10K_0402_1%PR812 10K_0402_1%

GPU_VID0

Sun Pro = 0.9V (1 1 0 0 0 0)

PR817

BOOT1_VGA

PR817

2.2_0603_5%

UGATE1_VGA

PHASE1_VGA

LGATE1_VGA

12

PR852

2.2_0603_5%

12

BOOT1_1_VGA

PC806

0.22U_0603_10V7K

1 2

UGATE2_VGA

LGATE2_VGA

+VGA_CORE

12

PC824

PC825

2.2U_0402_6.3V6M

12

PC841

PC840

10U_0603_6.3V6M

PC858

0.22U_0603_10V7K

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

PQ801

CSD87351Q5D_SON8-7

PHASE2_VGA

12

PC826

PC827

2.2U_0402_6.3V6M

10U_0603_6.3V6M

2.2U_0402_6.3V6M

12

PC842

PC843

10U_0603_6.3V6M

PQ802

CSD87351Q5D_SON8-7

2011/06/15 2012/07/11

C

2

3

4

12

PC829

PC828

2.2U_0402_6.3V6M

12

PC844

PC845

10U_0603_6.3V6M

2

3

4

Compal Secret Data

1

8

PC830

PC846

1

8

Deciphered Date

+VGA_B+

@PC801

@

12

PC801

PC802

0.1U_0402_25V6

0.1U_0402_25V6 2200P_0402_50V7K

2200P_0402_50V7K

7 6 5

12

PC831

2.2U_0402_6.3V6M

10U_0603_6.3V6M

7 6 5

SW2_VGA

12

@PR826

@

PR826

4.7_1206_5%

SNUB2_VGA

@PC811

@

12

PC811

680P_0402_50V7K

12

PC832

2.2U_0402_6.3V6M

12

PC852

PC851

1U_0402_6.3V6K

12

PR827

3.65K_0402_1%

12

PC834

PC833

2.2U_0402_6.3V6M

12

PC853

PC854

1U_0402_6.3V6K

@PC878

@

12

PC878

PC879

0.1U_0402_25V6

0.1U_0402_25V6 2200P_0402_50V7K

2200P_0402_50V7K

SW1_VGA

12

@PR855

@

PR855

4.7_1206_5%

SNUB1_VGA

@PC865

@

12

PC865

680P_0402_50V7K

12

PC804

PC803

10U_0805_25V6K

0.22UH_PCME064T-R22MS_28A_20%

12

PR828

10K_0402_1%

ISEN2_VGA

VSUM+_VGA

12

PC836

PC835

2.2U_0402_6.3V6M

12

PC855

1U_0402_6.3V6K

0.1U_0402_10V7K

+VGA_B+

12

PC880

PC881

10U_0805_25V6K

LF1_VGA

12

PR856

PR857

3.65K_0402_1%

ISEN1_VGA

VSUM+_VGA

PL802

1

2

12

PC837

2.2U_0402_6.3V6M

12

PC856

0.1U_0402_10V7K

12

0.22UH_PCME064T-R22MS_28A_20%

1

2

10K_0402_1%

Title

Size Document Number Rev

C

Date: Sheet of

PL801

HCB4532KF-800T90_1812

1 2

4

3

PC838

PC857

PL803

12

2.2U_0402_6.3V6M

12

0.1U_0402_10V7K

PR837

10K_0402_1%

ISEN1_VGA

PC839

2.2U_0402_6.3V6M

4

3

ISEN2_VGA

V2N_VGALF2_VGA

12

V1N_VGA

12

1

12

+

PC807

2

PR829

330U_D2_2V_Y

1_0402_1%

VSUM-_VGA

12

PR858

PR838

1_0402_1%

10K_0402_1%

VSUM-_VGA

Compal Electronics, Inc.

PWR-CPU_CORE

Gx00-CR

D

B+

+VGA_CORE

1

+

2

1

+

PC809

PC808

330U_D2_2V_Y

53 60Wednesday, February 27, 2013

2

330U_D2_2V_Y

+VGA_CORE

PC810

330U_D2_2V_Y

1.0

5

<42,46,47,6>

PC901

FBA3

PR902

4700P_0402_25V7K

PR923

1 2

VGATE<16,42>

1 2

680P_0402_50V7K

PC905

12

PC917

54.9_0402_1%

PR944

1 2

10_0402_1%

3P: 348 2P: 1.21K

PR903

1 2

FBA1

12

10.7K_0402_1%

Switching Frequency = 450KHz

VR_ON<42>

PR926

.1U_0402_16V7K

0_0402_5%

12

VR_SVID_DAT1

+3VS

12

3P: 330p 2P: 1000p

FB_CPU3

PR947

1 2

8.06K_0402_1%

PR955

1 2

1K_0402_1%

3P: 806 2P: 1K

PR933

PR933 10K_0402_5%

10K_0402_5%

PR927

60.4K_0402_1%

CPU_B+

PR936

0_0402_5%

12

PR938

0_0402_5%

12

49.9_0402_1%

PC930

1 2

0.033U_0402_16V7K

FB_CPU2

PC933

DROOP

PR901

D D

TRBSTA#

1 2

10_0402_1%

1 2

1.21K_0402_1%

VCC_AXG_SENSE<10>

VSS_AXG_SENSE<10>

+V1.05S_VCCP

C C

PC916

@PC916

@

.1U_0402_16V7K

VR_SVID_DAT<9>

VR_SVID_ALRT#<9>

VR_SVID_CLK<9>

12

R922

R922 P

P

130_0402_1%

1 2

+V1.05S_VCCP

12

@

PR932

PR932 75_0402_1%

H_PROCHOT#

VSSSENSE<9>

VCCSENSE<9>

B B

A A

75_0402_1%

TRBST#

PR908

1 2

10_0402_1%

PR909

1 2

1K_0402_1%

0_0402_5%

+5VS

1 2

PR929 1K_0402_1%PR929 1K_0402_1%

PC921

VSN

12

PC923

PC923 1000P_0402_50V7K

1000P_0402_50V7K

VSP

1 2

PR942

1 2

FB_CPU1

1 2

12

806_0402_1%

0.033U_0402_16V7K

PC937

1 2

1000P_0402_50V7K

4

1 2

FBA2

680P_0402_50V7K

PR937

12

PR954

12

PR919

1 2

2_0603_5%

PC915

1 2

2.2U_0603_10V7K

2.2U_0603_10V7K PR920

PR920

0_0402_5%

PR925

1 2

10K_0402_1%

12

PR940

1K_0402_1%

PC928

1 2

680P_0402_50V7K

PR948

3P: 3.65K 2P: 9.53K

CSREFCSCOMP

IMVP_IMON<42>

PC907

12

VR_ON_CPU

0.01U_0402_25V7K

1000P_0402_50V7K

6132_VCC

VR_SVID_DAT1 VR_SVID_ALRT#

VBOOT

VRMP

H_PROCHOT#

VGATE

DIFF_CPU

PR943

3P: 6.04K 2P: 4.32K

2P: 24K 1P: 24.9K

PR910

10P_0402_50V8J

1 2

6.04K_0402_1%

2P: 21.5K 1P: 15.8K

PC912

VR_SVID_CLK

ROSC_CPU

3P: 22p 2P: 10p

22P_0402_50V8J

12

COMP_CPU1

6.04K_0402_1%

3P: 2200p 2P: 3300p

3P: 23.7K 2P: 24.9K

PC908

1 2

COMPA1

2200P_0402_50V7K

1 2

PU901

1

VCC

2

VDDBP

3

VRDYA

4

EN

5

SDIO

6

ALERT#

7

SCLK

8

VBOOT

9

ROSC

10

VRMP

11

VRHOT#

12

VRDY

13

VSN

14

VSP

15

DIFF

PC926

12

1500P_0402_50V7K

PR950

PUT COLSE TO VCORE Phase 1 Inductor

PC902

1 2

.1U_0402_16V7K

1 2

PR904

24.9K_0402_1%

PC909

1 2

FBA

DIFFA

COMPA

TRBSTA#

58

55

61

57

59

56

60

FBA

PAD

VSPA

VSNA

DIFFA

COMPA

TRBSTA#

NCP6132AMNR2G_QFN60_7X7

COMP

DROOP21FB

IOUT

ILIM

TRBST#

18

19

20

17

16

TRBST#

DROOP

FB_CPU

ILIM_CPU

COMP_CPU

1 2

IMVP_IMON IMONIMON

IMVP_IMON

PC929

12

PR939 12.4K_0 402_1%PR939 12.4K_0402_1%

1 2

PC935

1 2

24.9K_0402_1%

.1U_0402_16V7K

1 2

PC903

1 2

CSCOMPA

PR914

1 2

15.8K_0402_1%

CSSUMA

ILIMA

DROOPA

IMONAIMONA

49

54

52

50

53

51

ILIMA

IOUTA

CSSUMA

DROOPA

CSCOMPA

CSCOMP22CSP325CSREF24CSSUM

CSP2

23

27

26

3P: 21K 2P: 12.4K

CSCOMPCSCOMPCSCOMP

CSCOMPCSCOMPCSCOMPCSCOMPC SCOMPCSCOMP

PC932

PC932 1000P_0402_50V7K

1000P_0402_50V7K

1 2

PR952

75K_0402_1%

PH903

220K_0402_5%_ERTJ0EV224J

3

1 2

PC904

1200P_0402_50V7K

165K_0402_1%

1 2

PR912

63.4K_0603_1%

PC911

PC911 1000P_0402_50V7K

1000P_0402_50V7K

1 2

.1U_0402_16V7K

CSP1A

TSENSEA

48

47

46

CSP2A

CSP1A

TSNSA

CSREFA

PWMA

BSTA

HGA SWA

LGA

BST2

HG2

SW2

LG2

PVCC

PGND

LG1

SW1

HG1

BST1

CSP1

DRVEN

TSNS

PWM

29

30

28

TSENSETSENSE CSP2A

PC924

1 2

CSP1 CSP2 CSP3

CSSUM

PC934

1000P_0402_50V7K

1 2

NTC_PH201

12

PR905

470P_0402_50V7K

12

PR907

SWN1A

PC914

45 44 43 42 41 40

BST2BST2

39 38 37 36

6132P_VCCP

35 34 33 32 31

BST1

PR934

1 2

41.2K_0402_1%

.1U_0402_16V7K

PC936

PC936 220P_0402_50V7K

220P_0402_50V7K

1 2

PR953

165K_0402_1%

75K_0402_1%

1 2

NTC_PH203

CSREFA <55>

BSTA1

6132_PWM

CSREF <55>

3P: 1500p 2P: 1200p

12

PH901

220K_0402_5%_ERTJ0EV224J

CSREFA

CSP1A

PR918

1 2

26.1K_0402_1%

HG1A <55>

LG1A <55>

HG2 <55>

LG2 <55>

LG1 <55>

HG1 <55>

1 2

2.2_0603_5%

3P: 73.2K 2P: 41.2K

0.047U_0402_16V7K

1 2

100K_0603_1%

PUT COLSE TO GT Inductor

PC910

0.047U_0402_16V7K

1 2

2P: 36K 1P: 26.1K

PR921

1 2

2.2_0603_5%

PR924

1 2

2.2_0603_5%

12

PR930

0_0402_5%

PR931

CSP2

PC927

CSREF

CSP1

PC931

CSREF

PR949

100K_0603_1%

PR951

1 2

PR913

5.6K_0402_1%

6132_PWMA

BSTA1_1

BST2_1

BST1_1

12

1 2

12

@

1 2

SWN1

SWN2

2

PC918

1 2

0.22U_0603_25V7K

PC919

1 2

0.22U_0603_25V7K

PC920

1 2

2.2U_0603_10V7K

PC922

1 2

0.22U_0603_25V7K

PR941

5.62K_0402_1%

1 2

@

PR960

6.98K_0402_1%

PR945

1 2

5.62K_0402_1%

PR961

6.98K_0402_1%

SWN1A <55>

+5VS

PR915,PR946=200K (setting 113 de greeC) PR915,PR946=8.25 K(setting 93 de greeC)

PR906

1 2

1K_0402_1%

2P: 1.65K 1P: 1K

SW1A <55>

SW2 <55>

SW1 <55>

PR906

Option for 1 phase GFX

PC906

1 2

1000P_0402_50V7K

TSENSEA

@

12

PR915

200K_0402_1%

PUT COLSE TO V_GT HOT SPOT

CSP2A

12

PR916

PH904

100K_0402_1%_TSM0B104F4251RZ

1 2

+5VS

12

+5VS

CSP3

TSENSE

@

12

PR946

200K_0402_1%

PUT COLSE TO VCORE HOT SPOT

12

PR917

1 2

PH902

100K_0402_1%_TSM0B104F4251RZ

SWN2 <55>

SWN1 <55>

Option for 2 phase CPU

CSREFACSCOMPA DROOPA

1_0402_5%

PR928

PR928 0_0402_5%

0_0402_5%

PR935

PR935 0_0402_5%

0_0402_5%

1_0402_5%

1

2Phase: @ 1Phase: install

3Phase: @ 2Phase: install

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

PWR-CPU_CORE

Gx00-CR

1

1.0

54 60W ednesday, February 27, 2013

1.0

5

4

3

2

1

CPU_B+ CPU_B+

5

PQ903

4

PQ901

S TR MDU1516URH 1N POWERDF N56-8

123

5

4

123

HG1<54>

D D

SW1<54>

LG1<54>

S TR MDU1511RH 1N POWERDFN 56-8

12

PC938

PC939

10U_0805_25V6K

S COIL 0.22UH +-20% PCMB104T-R22MS 35A

12

PR956

4.7_1206_5%

SNUB_CPU1

12

PC948

680P_0603_50V7K

12

PC941

PC940

0.1U_0402_25V6

0.1U_0402_25V6 2200P_0402_25V7K

2200P_0402_25V7K

PL902

1

4

3

2

V1N_CPU

B+

+VCC_CORE +VCC_CORE

PR958

12

10_0402_1%

SWN1 <54>

PL901

HCB4532KF-800T90_1812

1 2

1

+

PC947

PC947 220U_25V_M

220U_25V_M

2

CPU_B+

HG2<54>

SW2<54>

LG2<54>CSREF <54>

PQ904

S TR MDU1511RH 1N POWERDFN 56-8

5

4

PQ902

S TR MDU1516URH 1N POWERDF N56-8

123

5

4

123

12

PC942

PC943

10U_0805_25V6K

PL903

S COIL 0.22UH +-20% PCMB104T-R22MS 35A

PR957

4.7_1206_5%

PC949

680P_0603_50V7K

1

2

12

SNUB_CPU2

12

PC946

PC944

0.1U_0402_25V6

0.1U_0402_25V6 2200P_0402_25V7K

2200P_0402_25V7K

4

3

12

PR959

10_0402_1%

CSREF

V2N_CPU

SWN2 <54>

C C

QC 45W CPU VID1=0.9V IccMax=94A Icc_Dyn=66A Icc_TDC=52A R_LL=1.9m ohm OCP~110A

DC 35W CPU VID1=1.05V IccMax=53A Icc_Dyn=43A Icc_TDC=36A R_LL=1.9m ohm OCP~65A

CPU_B+

B B

5

PQ909

4

S TR MDU1516URH 1N POWERDF N56-8

123

5

4

123

HG1A<54>

SW1A<54>

LG1A<54>

S TR MDU1511RH 1N POWERDFN 56-8

A A

PQ907

12

PC958

PC957

10U_0805_25V6K

12

PC959

0.1U_0402_25V6

12

PR967

4.7_1206_5%

SNUB_GFX1

12

PC968

680P_0603_50V7K

12

PC960

2200P_0402_25V7K

PL905

S COIL 0.22UH +-20% PCMB104T-R22MS 35A

1

2

+VCC_GFXCORE_AXG

4

3

V1N_GFX

12

PR971

10_0402_1%

CSREFA <54>

SWN1A <54>

QC 45W GT2 VID1=1.23V IccMax=46A Icc_Dyn=37A Icc_TDC=38A R_LL=3.9m ohm OCP~55A

5

4

www.laptopfix.vn

DC 35W GT2 VID1=1.23V IccMax=33A Icc_Dyn=20.2A Icc_TDC=21.5A R_LL=3.9m ohm OCP~40A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

PWR-CPU_CORE

Size Document Number Rev

C

Date: Sheet of

Gx00-CR

55 60Wednesday, February 27, 2013

1

55 60Wednesday, February 27, 2013

1.0

5

4

3

2

1

+VCC_CORE

1

PC1

10U_080 5_6.3VAM

2

D D

1

PC6

PC6 10U_080 5_6.3VAM

10U_080 5_6.3VAM

2

1

PC2

PC2 10U_080 5_6.3VAM

10U_080 5_6.3VAM

2

1

PC7

PC7 10U_080 5_6.3VAM

10U_080 5_6.3VAM

2

1

PC3

PC3 10U_080 5_6.3VAM

10U_080 5_6.3VAM

2

1

PC8

PC8 10U_080 5_6.3VAM

10U_080 5_6.3VAM

2

1

PC4

PC4 10U_080 5_6.3VAM

10U_080 5_6.3VAM

2

1

PC9

PC9 10U_080 5_6.3VAM

10U_080 5_6.3VAM

2

+VCC_CORE +VCC_GFXCORE_AXG

1

PC5

PC5 10U_080 5_6.3VAM

10U_080 5_6.3VAM

2

1

PC10

PC10 10U_080 5_6.3VAM

10U_080 5_6.3VAM

2

+VCC_GFXCORE_AXG

22U_0805_6.3V6M

1

2

22U_0805_6.3V6M

PC13

1

2

22U_0805_6.3V6M

PC15

PC17

1

2

22U_0805_6.3V6M

PC18

PC19

1

2

PC19

1

2

@

+VCC_CORE

1

PC20

PC20 22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC44

PC44 22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

C C

1

PC61

PC61 22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC21

PC21 22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC45

PC45 22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC62

PC62 22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

@

1

PC22

PC22 22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC46

PC46 22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC63

PC63 22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

@

PC71

PC71 22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC23

PC23 22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC47

PC47 22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC64

PC64 22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

@

PC72

PC72 22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC24

PC24 22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC48

PC48 22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

22U_0805_6.3V6M

PC36

PC38

1

2

PC38

1

2

@

330U_D2_2V_Y

1

PC58

+

2

22U_0805_6.3V6M

PC39

1

2

330U_D2_2V_Y

1

PC59

+

2

22U_0805_6.3V6M

PC40

PC41

1

2

PC41

1

2

22U_0805_6.3V6M

PC43

PC42

1

2

Below is 458544_CRV_PDDG_0.5 Table 5-8.

5 x 22 µF (0805)

Socket Bottom

5 x (0805) no-stuff sites

7 x 22 µF (0805)

Socket Top

2 x (0805) no-stuff sites

+V1.05S_VCCP

22U_0805_6.3V6M

1

2

+V1.05S_ VCCP

22U_0805_6.3V6M

1

PC27

2

PC29

PC28

2

22U_0805_6.3V6M

1

PC50

2

22U_0805_6.3V6M

1

2

PC31

PC30

2

22U_0805_6.3V6M

1

2

PC52

PC51

2

22U_0805_6.3V6M

1

2

PC33

PC32

2

22U_0805_6.3V6M

1

2

PC56

PC53

2

330U_D2_2V_Y

1

+

@

2

1

PC66

+

2

330U_D2_2V_Y

PC67

+VCC_CORE

1

+

C73

C73 P

B B

A A

P

2

330U_D2_2V_Y

1

+

C77

C77 P

P

2

330U_D2_2V_Y

1

+

PC74

2

330U_D2_2V_Y

1

+

PC78

2

@

330U_D2_2V_Y

5

1

+

PC76

2

330U_D2_2V_Y

Security Class ification

2011/06/ 15 2 012/07/ 11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/ 15 2 012/07/ 11

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR - PROCESSOR DECOUPLING

LA-9631P

56 60W ednesday, February 27, 2013

1

1.0

5

4

3

2

1

VIWGP/R PWR PIR List

Page

Item PURPOSE

ItemItem

1 For ADP_ID pin detectAdd PR102,PC108,PC109

D D

5

6

7

8

9

11

C C

12

13

14

15

16

17

18

19

20

21

22

B B

23

PageItem

PagePage

MODIFICATION LIST

MODIFICATION LISTMODIFICATION LIST

PURPOSEMODIFICATION LIST

PURPOSEPURPOSE

P.46

Add PR225,PR227,PR228,PQ206,PQ207,PQ208P.47 For protect adapter function2

Add PR410,PC433P.493

P.49

For 3VALWP/5VALWP sequence

For EMI solutionAdd PC434,PC435,PC436,PC4374

For improve output voltage rippleAdd PC432 and change PL404 from 1.5uH to 3.3uH P.49

P.50 Change PR502 from 49.9k to 64.9k For +0.75VSP sequence

For +0.95VGSP sequenceAdd PC637 P.51

P.54 For CPU Transient CompensationChange PC907,PR912,PR927,PC928

Add PR326 and PQ314 For battery health functionP.48

P.4910

Add PR411,PC432

To delay +3VALW enable. PR411 change to 10K and PC432 change to 0.047uF

Adjust +3VALW and +5VALW rising time. P.49 Change PC439 from 4700P to 10nF ,PC436 from 47nF to 6.8nF

Add PR614 For Celeron CPU SA_PGOODP.51

EVT TO DVT

EVT TO DVTEVT TO DVT

PVT TO PVT2

PVT TO PVT2PVT TO PVT2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HW-PIR1

LA-9631P

1

57 60Wednesday, February 27, 2 013

1.0

5

4

COMPAL CONFIDENTIAL

3

2

1

MODEL NAME: PCB NAME:

D D

REVISION: DATE:

AC MODE

BATT MODE

C C

A1

VIN

BATT

B1

V

PU301

V

Power Sequence Block Diagram LA-9631P

2011/07/13

A3

B4

B5

+3VALW

+5VALW

A5

V

B7 3

A2

PU401

V

B+

V

B2

B+

V

PQ2

EC

VV

A5

A4

ON/OFF

B7

B6

V

B3

51ON#

EC_ON

10

PCH_PWROK

+3V_PCH

3

V

PCH_RSMRST#_R

PBTN_OUT#

PM_SLP_S3# PM_SLP_S4# PM_SLP_S5# PM_SLP_SUS#

V

SYSON

SUSP#,SUSP

+5V_PCH

4

5

6

7 SYSON#

8

V V

+1.5V

V

PU501

3

V

PCH

10

PCH_PWROK

V

PM_DRAM_PWRGD

H_CPUPWRGD

PLT_RST#

SYS_PWROK

11

12

16

DGPU_PWR_EN

15

V

CPU

V

DGPU_PWROK

VGATE

14

SVID

13

PU601

B B

V

+VCC_SA

PU702

V

+V1.05S

PU602

V

+V1.05S_VCCP

U38

V

+5VS

U39

V

+3VS

Q8

VV

+1.5VS

(DIS)

8a

(DIS)

8b

V

DGPU

PU701 +0.75VS

13 SVID

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Power sequence

LA-9631P

1.0

58 60Wednesday, February 27, 2 013

1

58 60Wednesday, February 27, 2 013

1.0

PU901 +VCC_CORE

V

3

8a

2011/06/15 2012/07/11

SA_PGOOD

VR_ON

A A

5

4

www.laptopfix.vn

9

14

VGATE

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

3

2

1

VIWGP/R HW PIR List

Page

Item PURPOSE

ItemItem

1 For SequenceChange C726, C727 to 2.2nFP.46

D D

5

6

7

8

9

10

12

C C

13

14

15

16

17

18

19

B B

PageItem

PagePage

P.5~32

P.25

P.21

P.42

P.4220

MODIFICATION LIST

MODIFICATION LISTMODIFICATION LIST

Add R405P.36 For Intel Combo Card2

Add R411, R412, C411, C412P.3411

Add VGATE to EC Pin.74 Reserve for sequenceP.4221

Add SYS_PWROK to EC Pin.86 Reserve for sequenceP.4222

Change EC_TS_ON# from EC Pin.85 to EC Pin.97 For common designP.4223

Change DGPU_PWR_EN from EC Pin.107 to EC Pin.123 For common designP.4224

Change SUSCLK from EC Pin.123 to EC Pin.122 For common designP.4225

PURPOSEMODIFICATION LIST

PURPOSEPURPOSE

Because ME modify MIC locationDelete RP19. Add RP26, RP27P.353

Reserve for improvement factory processesP.14 Add R406, R407, R408, R4094

Reserve for improvement factory processesAdd EC_SPI_SO, EC_SPI_SI, EC_SPI_CLK, EC_SPI_CS# to ECP.42

Reserve for improvement factory processesAdd PCH_PWR_EN to EC Pin.107P.42

Reserve Pull-high for GPIOReserve R410P.42

For Lenovo ruleChange footprint of JCPU1, U4, UV1, UV5, UV6, UV7, UV8, UV9, UV10, UV11, UV12

For VGA sequenceChange RV41 to 240K. Change CV53 to 0.1uF

Reserve for power consumptionAdd Q21, R40, C237, R225, C243

Reserve for EMI

For Crystal fine-tuneChange CV36, CV37 to 8.2pFP.25

For adapter protectionAdd ADP_65 to EC Pin.21

For adapter protectionAdd ADP_90 to EC Pin.68

For adapter protectionAdd ADP_135 to EC Pin.85

For common designChange EC_FAN_PWM from EC Pin.34 to EC Pin.26

For common designChange NOVO# from EC Pin.26 to EC Pin.34

For adapterAdd ADP_ID to EC Pin.66

For common designChange PCH_ENBKL from EC Pin.73 to EC Pin.76

For common designChange IMVP_IMON from EC Pin.76 to EC Pin.73

EVT TO DVT

EVT TO DVTEVT TO DVT

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HW-PIR1

LA-9631P

1

59 60Wednesday, February 27, 2 013

1.0

5

4

3

2

1

VIWGP/R HW PIR List

PURPOSE

Item Page

ItemItem

1

2

D D

3

4

5

6

7

8

1

2

Page

PagePage

P.40

MODIFICATION LIST

MODIFICATION LISTMODIFICATION LIST

Delete R416, Add J9 No need Zero ODD Function

P.36 Reserve R508

P.33 Add R509

P.42 Reserve +3VLP power rail to EC

P.42

Reserve R416

Change EC_RST# power rail to +3V_EC Using power rail which the same with EC.

P.42 Change EC_SMB_CK1 & EC_SMB_DA1 power rail to +3V_EC

P.14 Change U5 from 4MB to 8MB ROM

Delete R266, R221, U6 It is for 2MB ROM, we don't need itP.14

P.41

Reserve resistance to +3VLP and +3VALW. For Speaker Noise in S5

P.42 Reserve resistance in EC for share ROM.

3

C C

PURPOSEItem

PURPOSEPURPOSE

For leakage current issue of Atheros WLAN

protect BKOFF# damage

Using power rail which the same with EC.

Follow common design

For Celeron CPUP.51 Reserve +V1.05S_VCCP_PWRGOOD of +V.05S_VCCP to connect to SA_PGOOD

DVT TO PVT

DVT TO PVTDVT TO PVT

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HW-PIR2

LA-9631P

1

60 60Wednesday, February 27, 2 013

1.0

COMPAL LA-9631P, G490 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual