2N5194, 2N5195
Î
Î
Î
Î
Î
Î
Preferred Devices
Silicon PNP Power
Transistors
These devices are designed for use in power amplifier and switching
circuits; excellent safe area limits. Complement to NPN 2N5191,
2N5192.
Features
• Pb−Free Packages are Available*
MAXIMUM RATINGS (Note 1)
Rating
Collector−Emitter Voltage
Collector−Base Voltage
Emitter−Base Voltage
Collector Current
Base Current
Total Device Dissipation @ TC = 25°C
Derate above 25°C
ООООООООО
Operating and Storage Junction
Temperature Range
Symbol
V
CEO
V
CB
V
EB
I
C
I
B
P
D
Î
TJ, T
stg
2N5194
60
60
2N5195
80
80
5.0
4.0
1.0
40
320
ÎÎÎÎ
–65 to +150
Unit
Vdc
Vdc
Vdc
Adc
Adc
W
W/°C
°C/W
http://onsemi.com
4 AMPERE
POWER TRANSISTORS
PNP SILICON
60 − 80 VOLTS
TO−225AA
CASE 77−09
STYLE 1
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance,
ООООООООО
Junction−to−Case
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Indicates JEDEC registered data.
Symbol
q
JC
Î
Max
3.12
ÎÎÎÎ
Unit
°C/W
MARKING DIAGRAM
YWW
2
N519xG
Y = Year
WW = Work Week
2N519x = Device Code
x = 4 or 5
G = Pb−Free Package
ORDERING INFORMATION
Device Package
2N5194 TO−225 500 Units / Bulk
2N5194G TO−225
(Pb−Free)
2N5195 TO−225 500 Units / Bulk
2N5195G TO−225
(Pb−Free)
Shipping
500 Units / Bulk
500 Units / Bulk
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
1 Publication Order Number:
October, 2006 − Rev. 12
Preferred devices are recommended choices for future use
and best overall value.
2N5194/D
2N5194, 2N5195
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
ELECTRICAL CHARACTERISTICS (T
= 25_C unless otherwise noted) (Note 2)
C
Characteristic
OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage (Note 3)
= 0.1 Adc, IB = 0) 2N5194
(I
ОООООООООООООООООООО
C
Collector Cutoff Current
ОООООООООООООООООООО
(VCE = 60 Vdc, IB = 0) 2N5194
(VCE = 80 Vdc, IB = 0) 2N5195
ОООООООООООООООООООО
2N5195
Collector Cutoff Current
(VCE = 60 Vdc, V
ОООООООООООООООООООО
(VCE = 80 Vdc, V
(VCE = 60 Vdc, V
ОООООООООООООООООООО
(VCE = 80 Vdc, V
= 1.5 Vdc) 2N5194
BE(off)
= 1.5 Vdc) 2N5195
BE(off)
= 1.5 Vdc, TC = 125_C) 2N5194
BE(off)
= 1.5 Vdc, TC = 125_C) 2N5195
BE(off)
Collector Cutoff Current
(VCB = 60 Vdc, IE = 0) 2N5194
ОООООООООООООООООООО
(VCB = 80 Vdc, IE = 0) 2N5195
Emitter Cutoff Current
ОООООООООООООООООООО
(VBE = 5.0 Vdc, IC = 0)
ON CHARACTERISTICS
DC Current Gain (Note 3)
(IC = 1.5 Adc, VCE = 2.0 Vdc) 2N5194
ОООООООООООООООООООО
(IC = 4.0 Adc, VCE = 2.0 Vdc) 2N5194
ОООООООООООООООООООО
Collector−Emitter Saturation Voltage (Note 3)
ОООООООООООООООООООО
(IC = 1.5 Adc, IB = 0.15 Adc)
(IC = 4.0 Adc, IB = 1.0 Adc)
ОООООООООООООООООООО
2N5195
2N5195
Base−Emitter On Voltage (Note 3)
(IC = 1.5 Adc, VCE = 2.0 Vdc)
DYNAMIC CHARACTERISTICS
Current−Gain — Bandwidth Product
(IC = 1.0 Adc, VCE = 10 Vdc, f = 1.0 MHz)
ОООООООООООООООООООО
2. Indicates JEDEC registered data.
3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2.0%.
Symbol
V
CEO(sus)
ÎÎÎ
I
CEO
ÎÎÎ
ÎÎÎ
I
CEX
ÎÎÎ
ÎÎÎ
I
CBO
ÎÎÎ
I
EBO
ÎÎÎ
h
FE
ÎÎÎ
ÎÎÎ
V
CE(sat)
ÎÎÎ
ÎÎÎ
V
BE(on)
f
T
ÎÎÎ
Min
Î
60
80
Î
−
−
Î
−
Î
−
−
Î
−
−
Î
−
−
Î
25
Î
20
10
Î
7.0
Î
−
−
Î
−
2.0
Î
Max
ÎÎ
−
−
ÎÎ
1.0
1.0
ÎÎ
0.1
ÎÎ
0.1
2.0
ÎÎ
2.0
0.1
ÎÎ
0.1
1.0
ÎÎ
100
ÎÎ
80
−
ÎÎ
−
ÎÎ
0.6
1.4
ÎÎ
1.2
−
ÎÎ
Unit
Vdc
Î
mAdc
Î
Î
mAdc
Î
Î
mAdc
Î
mAdc
Î
−
Î
Î
Vdc
Î
Î
Vdc
MHz
Î
10
7.0
5.0
3.0
2.0
1.0
0.7
0.5
0.3
, DC CURRENT GAIN (NORMALIZED)
0.2
FE
h
0.1
0.004
TJ = 150°C
VCE = 2.0 V
VCE = 10 V
25°C
−55 °C
0.007 0.01 0.02 0.03 0.05 0.1 0.2 0.3 0.5 1.0 4.0
2.0 3.0
IC, COLLECTOR CURRENT (AMP)
Figure 1. DC Current Gain
http://onsemi.com
2
2N5194, 2N5195
2.0
1.6
1.2
IC = 10 mA
0.8
TJ = 25°C
0.4
, COLLECTOR−EMITTER VOLTAGE (VOLTS)
CE
V
0
0.05
0.07 0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 10 500
100 mA 1.0 A 3.0 A
5.0 7.0 20 30 50 70 100 200 300
IB, BASE CURRENT (mA)
Figure 2. Collector Saturation Region
2.0
TJ = 25°C
1.6
+2.5
+2.0
+1.5
*APPLIES FOR IC/IB ≤ hFE @ V
TJ = −65°C to +150°C
CE
+1.0
1.2
+0.5
*qVC for V
CE(sat)
0
0.8
VOLTAGE (VOLTS)
V
BE(sat)
@ IC/IB = 10
VBE @ VCE = 2.0 V
0.4
V
@ IC/IB = 10
CE(sat)
0
0.005
0.01 0.02 0.03 0.05 0.2 0.3 1.0 2.0 4.0
0.1 0.5 3.0
IC, COLLECTOR CURRENT (AMP)
Figure 3. “On” Voltage
3
10
VCE = 30 Vdc
2
10
TJ = 150°C
1
10
0
10
−1
10
, COLLECTOR CURRENT (A)μI
C
− 2
10
− 3
10
+0.4
100°C
REVERSE
FORWARD
25°C
I
CES
+0.3 +0.2 +0.1 0 −0.1 −0.2 −0.3 −0.4 −0.5 −0.6
VBE, BASE−EMITTER VOLTAGE (VOLTS)
Figure 5. Collector Cut−Off Region
−0.5
−1.0
−1.5
−2.0
, TEMPERATURE COEFFICIENTS (mV/C)°θ
V
−2.5
0.005 0.01 0.02 0.03 0.05 0.2 0.3 1.0 2.0 4.00.1 0.5 3.0
qVB for V
BE
IC, COLLECTOR CURRENT (AMP)
Figure 4. Temperature Coefficients
7
10
6
10
IC = 10 x I
CES
5
10
IC = 2 x I
CES
IC ≈ I
CES
CES
VALUES
4
10
3
10
, EXTERNAL BASE−EMITTER RESISTANCE (OHMS)
2
10
BE
20
R
(TYPICAL I
OBTAINED FROM FIGURE 5)
40 60 80 100 120 140 160
TJ, JUNCTION TEMPERATURE (°C)
Figure 6. Effects of Base−Emitter Resistance
VCE = 30 V
http://onsemi.com
3
V
R
CC
C
R
V
B
in
eb
+4.0 V
RB AND RC VARIED
TO OBTAIN DESIRED
CURRENT LEVELS
V
BE(off)
V
in
APPROX
−11 V
APPROX
−11 V
V
TURN−ON PULSE
0
t
1
t
2
in
TURN−OFF PULSE
Cjd<<C
APPROX
+9.0 V
t
3
t1 ≤ 7.0 ns
100 < t2 < 500 ms
t3 < 15 ns
DUTY CYCLE ≈ 2.0%
Figure 7. Switching Time Equivalent Test Circuit
2N5194, 2N5195
500
SCOPE
300
200
CAPACITANCE (pF)
100
70
50
0.1
TJ = 25°C
C
eb
C
cb
0.2 0.3 0.5 1.0 3.0 5.0 20 40
VR, REVERSE VOLTAGE (VOLTS)
2.0 10 30
Figure 8. Capacitance
2.0
1.0
0.7
0.5
0.3
0.2
t, TIME (s)μ
0.1
0.07
0.05
0.03
0.02
0.05
0.07 0.1 0.2 0.3 1.0 2.0 4.0
tr @ VCC = 10 V
td @ V
BE(off)
tr @ VCC = 30 V
= 2.0 V
0.5
0.7 3.0
IC, COLLECTOR CURRENT (AMP)
Figure 9. Turn−On Time
10
1.0 ms
dc
CEO
2N5194
2N5195
5.0
TJ = 150°C
2.0
1.0
0.5
, COLLECTOR CURRENT (AMP)
C
I
0.2
0.1
1.0
SECONDARY BREAKDOWN LIMIT
THERMAL LIMIT @ TC = 25°C
BONDING WIRE LIMIT
CURVES APPLY BELOW RATED V
2.0 5.0 10 20 50 100
VCE, COLLECTOR−EMITTER VOLTAGE (VOLTS)
5.0 ms
Figure 11. Rating and Thermal Data
Active−Region Safe Operating Area
IC/IB = 10
TJ = 25°C
100 ms
2.0
1.0
0.7
0.5
0.3
0.2
t, TIME (s)μ
0.1
0.07
0.05
0.03
0.02
0.05
ts′
tf @ VCC = 30 V
tf @ VCC = 10 V
0.07 0.1 0.2 0.3 1.0 2.0 4.0
IC, COLLECTOR CURRENT (AMP)
0.5
0.7 3.0
IB1 = I
B2
IC/IB = 10
ts′ = ts − 1/8 t
TJ = 25°C
f
Figure 10. Turn−Off Time
Note 1:
There are two limitations on the power handling ability of
a transistor; average junction temperature and second
breakdown. Safe operating area curves indicate IC − V
CE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 11 is based on T
= 150_C. TC is
J(pk)
variable depending on conditions. Second breakdown pulse
limits are valid for duty cycles to 10% provided T
J(pk)
v 150_C. At high−case temperatures, thermal limitations
will reduce the power that can be handled to values less than
the limitations imposed by second breakdown.
http://onsemi.com
4
1.0
0.7
0.5
0.3
0.2
0.1
0.07
0.05
0.03
r(t), EFFECTIVE TRANSIENT
0.02
THERMAL RESISTANCE (NORMALIZED)
0.01
0.01
D = 0.5
0.2
0.1
0.05
0.02
SINGLE PULSE
0.02 0.03
2N5194, 2N5195
q
= 3.12°C/W
JC(max)
0.01
0.05 0.1 0.2 0.3 0.5 1.0 2.0 3.0 5.0 10 20 30 50 100 200 300 1000500
t, TIME OR PULSE WIDTH (ms)
Figure 12. Thermal Response
DESIGN NOTE: USE OF TRANSIENT THERMAL RESISTANCE DATA
t
1
t
P
P
P
1/f
Figure 13.
P
P
DUTY CYCLE, D = t1 f =
PEAK PULSE POWER = P
A train of periodical power pulses can be represented by
the model shown in Figure 13. Using the model and the
device thermal response, the normalized effective transient
thermal resistance of Figure 12 was calculated for various
duty cycles.
To find qJC(t), multiply the value obtained from Figure 12
by the steady state value qJC.
Example:
The 2N5193 is dissipating 50 watts under the following
conditions: t1 = 0.1 ms, tp = 0.5 ms. (D = 0.2).
t
1
t
P
P
Using Figure 12, at a pulse width of 0.1 ms and D = 0.2,
the reading of r(t1, D) is 0.27.
The peak rise in junction temperature is therefore:
DT = r(t) x PP x qJC = 0.27 x 50 x 3.12 = 42.2_C
http://onsemi.com
5
2N5194, 2N5195
PACKAGE DIMENSIONS
TO−225
CASE 77−09
ISSUE Z
−B−
−A−
K
F
M
U
Q
132
H
V
G
0.25 (0.010) B
S
D
2 PL
M
0.25 (0.010) B
A
C
J
R
M
M
A
M
M
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 077−01 THRU −08 OBSOLETE, NEW STANDARD
077−09.
DIM MIN MAX MIN MAX
A 0.425 0.435 10.80 11.04
B 0.295 0.305 7.50 7.74
C 0.095 0.105 2.42 2.66
D 0.020 0.026 0.51 0.66
F 0.115 0.130 2.93 3.30
G 0.094 BSC 2.39 BSC
H 0.050 0.095 1.27 2.41
J 0.015 0.025 0.39 0.63
K 0.575 0.655 14.61 16.63
M 5 TYP 5 TYP
__
Q 0.148 0.158 3.76 4.01
R 0.045 0.065 1.15 1.65
S 0.025 0.035 0.64 0.88
U 0.145 0.155 3.69 3.93
V 0.040 −−− 1.02 −−−
STYLE 1:
PIN 1. EMITTER
2. COLLECTOR
3. BASE
MILLIMETERSINCHES
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
http://onsemi.com
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
2N5194/D
6
Loading...