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reserved. The information in this document is subject to change without prior notice to
make improvements to the products.
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this document may be reproduced, copied, or translated in any form or any means
without prior written permission of the manufacturer.
All trademarks and/or registered trademarks contains in this document are property of
their respective owners.
Disclaimer
The company shall not be liable for any incidental or consequential damages resulting
from the performance or use of this product.
The company does not issue a warranty of any kind, express or implie d, including
without limitation implied warranties of merchantability or fitness for a particular
purpose.
The company has the right to revise the manual or include changes in the
specifications of the product described within it at any time without notice and witho ut
obligation to notify any person of such revision or changes.
Trademark
All trademarks are the property of their respective holders.
Any questions please visit our website at TUhttp://www.commell.com.twUT
Packing List:
Please check the package content before you starting using the board.
Hardware:
QE-E70 Qseven CPU Module x 1
Cable Kit:
CRT cable without bracket x 1
(OALVGA-DF14NB)/ (1040596)
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Power Cable x 1
LDC-A / (1040433)
LN-D70 User’s Manual
Printed Matters:
Driver CD (Including User’s Manual) x 1
QE-E70 is the system-on-chip (SoC) designed for intelligent systems, delivering
outstanding compute, graphical, and media performance while operating in an extended
range of thermal conditions. These SoCs are based on the Silvermont microarchitecture,
utilizing Intel’s industry-leading 22nm process technology with 3-D Tri-Gate transistors,
which deliver significant improvements in computational performance and energy
efficiency.
New features for
The Intel® Celeron® Processor J1900 / N2930 and Intel® Atom E3845 Processor
supports, graphics, media performance,flexibility and more enh anced security that is
suitable for a variety of intelligent systems the ideal choice.
Outstanding integration of I/O interfaces
Supports display interfaces with graphics processing, camera interfaces with image
processing, audio with digital signal processing, multiple storage types, an d leg acy
embedded I/O. Provides interface expansion capabilities through industry-standard
high-bandwidth interfaces such as PCI Express* Gen 2.0, Hi-speed USB 2.0, and USB
3.0 connectivity.
Intel® Celeron® and Atom Processor
All in One multimedia solution
Based on Intel® J1900 / N2920 / E3845 SoC, the board provides high performance
onboard graphics, CRT, 24-bit dual channel LVDS interface, Display Port, DVI and two
channels High Definition Audio, to meet the very requirement of the multimedia
application.
Flexible Extension Interface
The board provides four PCIe2.0x1,LPC for super I/O,SDIO and SPI for system BIOS.
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1.2 <Product Specification>
General Specification
Form Factor Qseven CPU Module
CPU Bay TrailIntel® Celeron™J1900/N2930andAtom™E3845 Mobile
Processor
Package Type: FCBGA1170
Memory Support DDR3L 1600 MHz 2GB or 4GB on board memory
Watchdog Timer Generates a system reset with internal timer for 1min/s ~ 255min/s
Graphic Intel® Clear Video integrated HD Graphics Technology
DDI Two DDI port interface for DisplayPort, DVI or eDP
Extended Interface
External I/O Interface
Four PCIe2.0 x1
LPC for super I/O
SMBus
SPI for System BIOS
Two SATAII(3Gb/s)
Four USB 2.0 & one USB 3.0
High definition audio interface
Internal I/O Interface
Power Requirement 5V and 5V standby
Dimension 70mm x 70mm(L x W)
Temperature
Ordering Code
QE-E70JED-2GB(4GB)
QE-E70EED-2GB(4GB)
QE-E70NED-2GB(4GB) Intel Celeron Processor N2930 (2M Cache, 2.16GHz), eDP, DP, VGA, H D
QE-E70JE2-2GB(4GB)
CRT interface
Operating within 0~60 ℃.(for QE-E70N and QE-E70J)
Storage within -20~85 ℃ centigrade. (for QE-E70N and QE-E70J)
Operating within -40~85 ℃.(for QE-E70E)
Storage within -40~85 ℃centigrade. (for QE-E70E)
Intel Celeron Processor J1900 (2M Cache, 2.42GHz), eDP, DP, VGA, HD
Audio interface, two Serial ATAII, one USB3.0 , four USB 2.0, four PCIe x1,
2G(4G) Memory
Intel Atom Processor E3845 (2M Cache, 1.91GHz), eDP, DP, VGA, HD Audio
interface, two Serial ATAII, one USB3.0 , four USB 2.0, four PCIe x1, 2G(4G)
Memory
Audio interface, two Serial ATAII, one USB3.0 , four USB 2.0, four PCIe x1,
2G(4G) Memory
Intel Celeron Processor J1900 (2M Cache, 2.42GHz), two eDP, VGA, HD
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Audio interface, two Serial ATAII, one USB3.0 , four USB 2.0, four PCIe x1,
2G(4G) Memory
QE-E70EE2-2GB(4GB) Intel Atom Processor E3845 (2M Cache, 1.91GHz), two eDP, VGA, HD Audio
interface, two Serial ATAII, one USB3.0 , four USB 2.0, four PCIe x1, 2G(4G)
Memory
QE-E70NE2-2GB(4GB) Intel Celeron Processor N2930 (2M Cache, 2.16GHz), two eDP, VGA, HD
Audio interface, two Serial ATAII, one USB3.0 , four USB 2.0, four PCIe x1,
2G(4G) Memory
The specifications may be different as the actual production.
For further product information please visit the website at
TUhttp://www.commell.com.twUT
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1.3 <Mechanical Drawing>
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1.4 <Block Diagram>
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Chapter 2 <Hardware Setup>
2.1 <Connector Location>
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2.2 <Interface Reference>
2.2.1 <Internal interface>
Interface Function Remark
CPU FCBGA1170 CPU
CN_CRT 10-pin VGA connector
2.2.2 <External Interface>
interface Function Remark
PCIe2.0 Four PCIe2.0 x1
LPC LPC for super I/O
SDIO
SPI SPI for System BIOS
SATAII Two SATAII(3Gb/s),
USB Four USB 2.0 & one USB 3.0,
Audio High definition audio interface
SDIO for super I/O
2.3 < Connector Pin Assignments>
There are 115 edge fingers on the top and bottom side of the QsevenR module that
mate with the MXM connector. Table 2.3 lists the pin assignments for all 230 edge
fingers.
PCIE3_TXPCIE_CLK_REF+
PCIE_CLK_REFPCIE_WAKE# PCI Express Wake Event: Sideband wake signal asserted by
PCIE_RST# Reset Signal for external devices.
PCI Express Reference Clock for Lanes 0 to 3.
components requesting wakeup.
2.3.2<Serial ATA Interface Signals>
Signal Description
SATA0_RX+
SATA0_RXSATA0_TX+
SATA0_TXSATA0_RX+
SATA0_RXSATA0_TX+
SATA0_TXSATA_ACT# Serial ATA Led. Open collector output pin driven during SATA
Serial ATA channel 0, Receive Input differential pair.
Serial ATA channel 0, Transmit Output differential pair.
Serial ATA channel 1, Receive Input differential pair.
Serial ATA channel 1, Transmit Output differential pair.
command activity.
2.3.3<Serial ATA Interface Signals>
Signal Description
USB_P0+
USB_P0USB_P1+
USB_P1-
USB_P2+
USB_P2USB_P3+
USB_P3USB_SSRX0+
USB_SSRX0-
Universal Serial Bus Port 0 differential pair.
Universal Serial Bus Port 1 differential pair.
This port may be optionally used as USB client port.
Universal Serial Bus Port 2 differential pair.
Universal Serial Bus Port 3 differential pair.
Multiplexed with receive signal differential pairs for the
Superspeed USB data path.
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USB_SSTX0+
USB_SSTX0USB_0_1_OC# Over current detect input 1. This pin is used to monitor the
USB_2_3_OC# Over current detect input 2. This pin is used to monitor the
Multiplexed with transmit signal differential pairs for the
Superspeed USB data path.
USB power over current of the USB Ports 0 and 1.
USB power over current of the USB Ports 2 and 3.
2.3.4<SDIO Interface Signals>
Signal Description
SDIO_CD#
SDIO_CLK
SDIO_CMD
SDIO_WP
SDIO Card Detect. This signal indicates when a SDIO card is presen
SDIO Clock. With each cycle of this signal a one-bit transfer
on the command and each data line occurs. This signal has
maximum frequency of 48 MHz.
SDIO Command/Response. This signal is used for card
initialization and for command transfers. During initialization
mode this signal is open drain. During command transfer this
signal is in push-pull mode.
SDIO Write Protect. This signal denotes the state of the
write-protect tab on SD cards.
SDIO_PWR# SDIO Power Enable. This signal is used to enable the power
being supplied to a SD card device.
SDIO_DAT0-3 SDIO Data lines. These signals operate in push-pull mode.
2.3.5<High Definition Audio Signals/AC'97>
Signal Description
HDA_RST# HD Audio/AC'97 Codec Reset.
HDA_SYNC Serial Bus Synchronization.
HDA_BCLK HD Audio/AC'97 24 MHz Serial Bit Clock from Codec.
HDA_SDO HD Audio/AC'97 Serial Data Output to Codec.
HDA_SDI HD Audio/AC'97 Serial Data Input from Codec.
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2.3.6<LVDS Flat Panel Signals>
Signal Description
LVDS_PPEN Controls panel power enable.
LVDS_BLEN Controls panel backlight enable.
LVDS_BLT_CTRL Primary functionality is to control the panel backlight brightness via
Note: Level shifters must be implemented
on the carrier board for this signal in order to
be compliant with the HDMI Specification.
HDMI_CTRL_DAT
DP_HDMI_HPD#
DDC based control signal (data) for HDMI
device.
Note: Level shifters must be implemented
on the carrier board for this signal in order to
be compliant with the HDMI Specification.
Hot plug detection signal that serves as an
interrupt request.
2.3.8<LPC Interface Signals>
Signal Description
HLPC Interface
Signals
LPC_FRAME# LPC frame indicates the start of a new cycle or the termination of
Multiplexed Command, Address and Data.
a broken cycle.
LPC_CLK LPC clock.
SERIRQ Serialized Interrupt.
2.3.9<SPI Interface Signals>
Signal Description
SPI_MOSI Master serial output/Slave serial input signal. SPI serial output
data from QsevenR module to the SPI device.
SPI_MISO Master serial input/Slave serial output signal. SPI serial input
data from the SPI device to QsevenR module.
SPI_SCK SPI clock output.
SPI_CS0# SPI chip select 0 output.
SPI_CS1# SPI Chip Select 1 signal is used as the second chip select when
two devices are used. Do not use when only one SPI device is
used.
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2.3.10<Input Power Pins>
Signal Description
VCC
Power Supply +5VDC ±5%.
VCC_5V_SB
VCC_RTC 3 V backup cell input. VCC_RTC should be connected to a 3V
GND Power Ground.
Standby Power Supply +5VDC ±5%.
backup cell for RTC operation and storage register non-volatility
in the absence of system power.
(VCC_RTC = 2.4 - 3.3 V).
2.3.11<Power Control Signals>
Signal Description
PWGIN High active input for the QsevenR module indicates that all power
rails located on the carrier board are ready for use.
PWRBTN# Power Button: Low active power button input. This signal is
triggered on the falling edge.
2.3.12<Power Management Signals>
Signal Description
RSTBTN# Reset button input. This input may be driven active low by an
external circuitry to reset the QsevenR module.
BATLOW# Battery low input. This signal ma y be driven active low by
external circuitry to signal that the system battery is low or may
be used to signal some other external battery management
event.
SUS_STAT# Suspend Status: indicates that the system will be entering a low
power state soon.
SUS_S3# S3 State: This signal shuts off power to all runtime system
components that are not maintained during S3 (Suspend to
Ram), S4
or S5 states.
The signal SUS_S3# is necessary in order to support the optional
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S3 cold power state.
SUS_S5# S5 State: This signal indicates S4 or S5 (Soft Off) state.
SLP_BTN# Sleep button. Low active signal used by the ACPI operating
system to transition the system into sleep state or to wake it up
again.
This signal is triggered on falling edge.
2.3.13<Miscellaneous Signals>
Signal Description
WDOUT Watchdog event indicator. High active output used for
signaling a missing watchdog trigger. Will be deasserted by
software, system reset or a system power down.
SMB_CLK Clock line of System Management Bus.
SMB_DAT Data line of System Management Bus.
SMB_ALERT# System Management Bus Alert input. This signal may be
driven low by SMB devices to signal an event on the SM Bus.
SPKR Primary functionality is output for audio enunciator, the
“speaker" in PC AT systems.
BIOS_DISABLE# Module BIOS disable input signal. Pull low to disable module's
The board integrates REALTEK® ALC262 code. It can support 2-channel sound under
system configuration. Please follow the steps below to setup your sound system.
1. Install REALTEK HD Audio driver.
2. Lunch the control panel and Sound Effect Manager.
3. Select Speaker Configuration
3.2 <Display Properties Setting>
Based on Intel J1900/N2930 with HD Graphic, the board supports two DACs for display
device as different resolution and color bit.
Please install the Intel Graphic Driver before you starting setup display devices.
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1. Click right button on the desktop to lunch Screen resolution > Advanced settings
2. Click Graphics Properties… button for more specificity setup.
Click Graphics Properties... for
advanced setup
3. This setup options can let you define each device settings.
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3.3 <SATA configuration>
SA TA Mode:
This option can let you select whether the Serial ATA hard drives would work under
normal IDE or AHCI.
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3.4 <USB3.0 configuration>
The USB3.0 port need to Install USB 3.0 eXtensible Host Controller Driver and
enable xHCI Mode.
3.4.1 < USB 3.0 eXtensible Host Controller Driver install >
Step1. Copy the USB 3.0 driver from “Driver CD” to the local hard driver directory.
( Do not run this driver from a USB storage device)
Step2. Configure default BIOS, click Advanced > South Cluster Configuration > USB
Configuration, disable “EHCI Mode”.
Step3. enable “xHCI Mode” and push “F10” to save configuration. Restart your
computer.
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Step4. If you enable xHCI Mode , USB 2.0 and USB 3.0 ports can’t use without
drive. We recommend that you connect PS/2 mouse / keyboard installing
USB 3.0 driver.
Step5. Double click the “Setup.exe” from the directory. Click “Next” to continue.
Step6. Lastly, the “Setup Complete” screen appears so click “Finish” to
restart your computer.
Chapter 4 <BIOS Setup>
The motherboard uses the Phoenix BIOS for the system configuration. The Phoenix
BIOS in the single board computer is a customized version of the industrial standard
BIOS for IBM PC AT-compatible computers. It supports Intel x86 and compatible CPU
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architecture based processors and computers. The BIOS provides critical low-level
support for the system central processing, memory and I/O sub-systems.
The BIOS setup program of the single board computer let the customers modify the basic
configuration setting. The settings are stored in a dedicated battery-backed memory,
NVRAM, retains the information when the power is turned off. If the battery runs out of
the power, then the settings of BIOS will come back to the default setting.
The BIOS section of the manual is subject to change without notice and is provided h ere
for reference purpose only. The settings and configurations of the BIOS are current at
the time of print, and therefore they may not be exactly the same as that displayed on
your screen.
To activate CMOS Setup program, press <DEL> key immediately after you turn on the
system. The following message “Press DEL to enter SETUP” should appear in the lower
left hand corner of your screen. When you enter the CMOS Setup Utility, the Main Menu
will be displayed as Figure 4-1. You can use arrow keys to select your function, press
<Enter> key to accept the selection and enter the sub-menu.
Figure 4-1 CMOS Setup Utility Main Screen
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Appendix A <Flash BIOS>
A.1 <Flash Tool>
The board is based on Phoenix BIOS and can be updated easily by the BIOS auto
flash tool. You can download the tool online from below link
then input the“fs0:”command to switch to the root of the USB flash
drive.
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4. Type the ” fpt64.efi -y -f xxx.bin” command to start flash BIOS
processes. ( xxx.bin means the BIOS file that you want to update)
5. When it finished all update processes, restart the system.
Any question about the BIOS re-flash please contact your distributors or visit the
web-site at below:
http://www.commell.com.tw/support/support.htm
UT
Appendix B <Programming GPIO’s>
The GPIO’ can be programmed with the MSDOS debug program using
simple IN/OUT commands. The following lines show an example how to
do this. (The GPIO is open drain)
GPIO0…..GPIO7 bit0……bit7
-o 4E 87 ;enter configuration
-o 4E 87
-o 4E 07
-o 4F 07 ;enale GPIO function
-o 4E 30
-o 4F 10 ;enable GPIO configuration
-o 4E F0
-o 4F xx ;set GPIO as input/output; set ‘1’ for input,’0’for
output
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-o 4E F1
-o 4F xx ;if set GPIO’s as output,in this register its value can
be set
Optional :
-o 4E F2
-o 4F xx ; Data inversion register ; ‘1’ inverts the current valus
of the bits ,’0’ leaves them as they are
-o 4E 30
-o 4F 01 ; active GPIO’s
For further information, please refer to NCT6106D datasheet.
Appendix C <Programming Watchdog Timer >
The watchdog timer makes the system auto-reset while it stops to work for a period.
The integrated watchdog timer can be setup as system reset mode by program.
Timeout Value Range
- 1 to 255
- Second or Minute
Program Sample
The integrated Watchdog Timer can be set up by programming.
-O 4E 87
-O 4E 87
Enter configuration
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-O 4E 07 Logic Device Enable
-O 4F 08
-O 4E 30 WDT Enable
-O 4F 01
-O 4E F0 Set as Second*
-O 4F 00
-O 4E F1
-O 4F 0A Set reset time 10 Sec
You can select Timer setting in the BIOS, after setting the time options, the system
will reset according to the period of your selection.
Contact Information
Any advice or comment about our products and service, or
anything we can help you please don’t hesitate to contact with us.
We will do our best to support you for your products, projects and
business.
Taiwan Commate Computer Inc.
19F., No.94, Sec. 1, Xintai 5th Rd., Xizhi Dist., New Taipei
Address
TEL +886-2-26963909
FAX +886-2-26963911
Website
E-Mail
Facebook
Twitter https://twitter.com/Taiwan_Commate
Commell is a brand name of Taiwan commate computer Inc.