The MPX-2515 CAN 2.0B USB card is a USB 2.0 compliant device, which
implements Controller Area N etw ork (CAN) version 2.0B interface . This card is
made in Mini-PCIe form factor so that this module is able to insert into motherboards
that provide Mini-PCIe slot, like most Commell motherboards do. In addi tion, users
are able to connect this card to an USB Type A receptacle that most PC has by using
the OALUSB-H4-1 optional cabl e. MPX-2515 CAN 2.0B USB card provides the
following features.
1.1.1 Features
• USB 2.0 Full Speed compliant
• Controller Area Network (CAN) version 2.0B
• Implement ISO-11898 Standard Physical Layer
• Supports 1 Mb/s operation (rec om mend 125 Kbps)
• Default to 125 Kbps
• On board 120 Ohm line term inator (enabled/disabled by jum per)
• 0 to 8 byte length in the data field
• Standard and extended data and remote frames
• Two receive buffers with prioritized message storage
• Six 29-bit filters
• Two 29-bit masks
• Data byte filtering on the first two data bytes
• One-shot mode ensures message transmission is attempted only one time
• Typical 5 mA active current
• Typical 1 uA standby current (sleep mode)
• Externally-controlled slope for reduced RFI emissions
• Detection of ground fault (permanent Dominant) on TXD input
• Power-on Reset and voltage brown-out protection
• Protection against high-voltage transients
• Automatic thermal shutdown protection
• Up to 112 nodes can be connected
• High-noise immunity due to differential bus implementation
• Produced in Mini-PCIe card form factor (easily locked on motherboard)
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Figure 1 MPX-2515 CAN 2.0B USB Card
1.1.2 Supported Operating Systems
The following operating systems are supported by MPX-2515:
• Microsoft Windows XP 32-/64-bit versions
• Microsoft Windows Vista 32-/64-bit versions
• Microsoft Windows 7 32-/64-bit versions
No Microsoft Windows 64-bit versions digital signature included.
1.2 MPX-2515 Block Diagram
The MPX-2515 CAN 2.0B USB card is composed of a System on Chip, a stand-alone
CAN controller, and a high-speed CAN transceiver.
Cypress
CY8C24794
SoC
Microchip
MCP2515
CAN
Controller
Microchip
MCP2551
CAN
Transceiver
USB bus CAN bus
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Figure 2 MPX-2515 Block Diagram
The above figure shows the components diagram of the MPX-2515 CAN 2.0B USB
card. The Cypress CY24794 co ntroller implemented a USB device tha t inte racts with
a USB host to perform requests and return responses. A Microchip MCP2515 CAN
controller is connecting to CY24794 via SPI and other signals. Another Microchip
MCP2551 CAN Transceiver is interfacing to the CAN bus to sen d a n d receive CAN
messages.
1.3 CY8C24794 Programmable System-on-Chip
We uses Cypress CY8C24794 PSoC Programmable System-on-Chip as the general
purpose controller for MPX-2515 card. A firmware has implement for CY8C24794 to
support full speed USB, SPI master, timers, and others for MPX-2515 functionalities.
The full speed USB interface is used to communicate with a USB host to perform
request packets and return response packets. The SPI master interface however is
used to communicate to the MCP2515 CAN bus controller for CAN activities. Please
refer to the CY8C24x94 PSoC Programmable System-on-Chip Technical Reference
Manual for detail information.
The following figure shows the bloc k diagram of CY8C24794.
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Figure 3 CY8C24794 Block Diagram
1.4 MCP2515 Stand-Alone CAN Controller With SPI Interface
Microchip Technology's MCP2515 is a stand-alone Controller Area Network (CAN)
controller that implements the CAN specification , ve rsion 2.0B. It is capable of
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Commell MPX-2515 User’s Guide Rev 0101
transmitting and receiving bot h standard and extended data and r emote frames. The
MCP2515 has two acceptance masks and six acceptance filters that are used to filter
out unwanted messages. Thereby reducing the host MCUs overhead. The MCP2515
interfaces with CY8C24794 microcontroller via an industry standard Serial Peripheral
Interface (SPI).
The following figure shows the block diagram of MCP2515
Figure 4 MCP2515 Block Diagram
The MCP2515 has three transmit and two receive buffers, two acceptance masks (one
for each receive buffer) and a total of six acceptance filters. The following figure
shows the MCP2515 buffers and protocol engine block diagram. Please refer to
MCP2515 data sheet for detail information.
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Figure 5 MCP2515 Buffers and Protocol Engine Blcok Diagram
The following table shows the MCP2515 Controller Register Map. Please refer to the
MCP2515 data sheet for detail information.
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Figure 6 MCP2515 Controller Register Map
The following table shows the MCP2515 Control Register Summary. Please refer to
the MCP2515 data sheet for detail information.
Figure 7 MCP2515 Control Register Summary
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1.5 MCP2551 High-Speed CAN Transceiver
The MCP2551 is a high-speed CAN, fault-tolerant device tha t serves as the interface
between a CAN protocol controller and the physical bus. The MCP2551 device
provides differential tra nsmit and receive capability for t he CAN protocol controller,
and is fully compatible with the ISO-11898 standard, including 24V requirem ents. It
will operate at speeds of up to 1 Mb/s.
The following figure shows the MCP2551 block diagram. Please refer to the
MCP2551 data sheet for detail information.
Figure 8 MCP2551 Block Diagram
1.6 MPX-2515 ISO OSI Model
1.6.1 Introduction
This section defines the MPX-2515 card in the ISO OSI reference model . The
following figure shows this model.
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Figure 9 MPX-2515 ISO/OSI Reference Model
The Controller Area Network (CAN) pro tocol defines the Data Link Layer and part
of the Physical Layer in the OS I model. Therefore, all the undefined layers can be
defined by the system designer, or can be implem ente d using existing non-propr ietary
High Layer Protocols (HLPs) and physical layers.
Data Link Layer The Data Link Layer is defined by the CAN specification. This
Data Link Layer is divided into Logical Li n k Control (LLC) Layer and Medium
Access Control Layer (MAC). T he Logical Link Control (LLC) manages the over load
control and notification, message filtering and recovery management functions. the
Medium Access Control (MAC) performs the data encapsulation/decapsulation, error
detection and control, bit stuff in g / destuffing and the serializatio n a n d deserialization
functions.
Physical Layer The Physical Medium Attachment (PMA) and Medium Dependent
Interface (MDI) are the two sub-laye rs of the physical layer which are not defined by
CAN. However, the Physical Signalin g (PS) s ub-layer of the physical layer is defined
by the CAN specification. The system designer can choo se any driver/receiver and
transport medium as long as the PS requirements are met.
The International Standards Organization (ISO) has defined a standard which
incorporates the CAN specification as well as the physical layer. The standard, ISO11898, was originally created for high-speed in-vehicle communication using CAN.
ISO-11898 specifies the physical layer to ensure compatibility between CAN
transceivers.
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1.6.2 ISO11898-1 Physical Signaling
The bit encoding/deco ding and synchronization shall meet the requi rements defined
in ISO-11898-1 and it is recommended to follow the definitions as given in the
Recommended bit timing settings table. The according bus length estimations are
therefore shown in the table follows it.
Table 1 Recommended bit timing settings
The following table shows the according bus length estimations.
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Table 2 Estimated bus lengths
1.7 MPX-2515 Card vs. ISO-11898-2
1.7.1 ISO-11898-2 Overview
ISO-11898-2 is the international standard for high-speed CAN communications in
road vehicles. ISO-11898-2 specifies the PMA and MDA sub-layers of the ISO/OSI
Physical Layer.
The following figure shows a representation of a common CAN node/bus as
described by ISO-11898.
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