CMO V570H1-L02 Specification

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TFT LCD Approval Specification
MODEL NO.: V570H1 - L02
Customer:
Approved by:
Note:
Approved By
Reviewed By
LCD TV Marketing and Product Management Div.
Prepared By
Ken Wu Sharon Chou
www.panelook.com
Issue Date: Dec. 1. 2008
Model No.:V570H1-L02
Approval
TV Head Division
LY Chen
QA Dept. Product Development Div.
Kc_Ko WT Lin
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- CONTENTS -
1. GENERAL DESCRIPTION
1.1 OVERVIEW
1.2 FEATURES
1.3 APPLICATION
1.4 GENERAL SPECIFICATIONS
1.5 MECHANICAL SPECIFICATIONS
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
2.2 PACKAGE STORAGE
2.3 ELECTRICAL ABSOLUTE RATINGS
2.3.1 TFT LCD MODULE
2.3.2 BACKLIGHT INVERTER UNIT
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
3.2 BACKLIGHT UNIT
3.2.1 CCFL
3.2.2 INVERTER CHARACTERISTICS
3.2.3 INVERTER INTERFACE CHARACTERISTICS
(Cold Cathode Fluorescent Lamp)
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE INPUT
5.2 BACKLIGHT UNIT
5.3 INVERTER UNIT
5.4 BLOCK DIAGRAM OF INTERFACE
5.5 LVDS INTERFACE
5.6 COLOR DATA INPUT ASSIGNMENT
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
6.2 POWER ON/OFF SEQUENCE
7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
7.2 OPTICAL SPECIFICATIONS
8. PRECAUTIONS
8.1 ASSEMBLY AND HANDLING PRECAUTIONS
8.2 SAFETY PRECAUTIONS
8.3 SAFETY STANDARDS
9. PACKAGING
9.1 PACKING SPECIFICATIONS
9.2 PACKING METHOD
10.MECHANICAL CHARACTERISTICS
CHARACTERISTICS
Issue Date: Dec. 1. 2008
Model No.:V570H1-L02
Approval
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Issue Date: Dec. 1. 2008
Model No.:V570H1-L02
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REVISION HISTORY
Version
Ver 2.0
Ver 2.1
Date Page Section Description
Jan. 8. 2008
Dec. 1. 2008
All
35
All
Approval Specification was first issued.
10
Modify MECHANICAL CHARACTERISTICS
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1. GENERAL DESCRIPTION
1.1 OVERVIEW
V570H1-L02 is a 57” TFT Liquid Crystal Display module with 32-CCFL Backlight unit and 2ch-LVDS
interface. This module supports 1920 x 1080 HDTV format and can display true 16.7M colors (8-bit/color).
The inverter module for backlight is built-in.
1.2 FEATURES
- High brightness (500 nits)
- High contrast ratio (1500:1)/Dynamic contrast ratio (6000:1)
- Fast response time (˚˴ʳʳ˺˴ʳ˴˸˴˺˸ʳˉˁˈʳ)
- High color saturation (NTSC 72%)
- Full HDTV (1920 x 1080 pixels) resolution, true HDTV format
- DE (Data Enable) only mode
- LVDS (Low Voltage Differential Signaling) interface
- Optimized response time for 50/60 Hz frame rate
- Ultra wide viewing angle : Premium MVA technology
- RoHS compliance
1.3 APPLICATION
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Model No.:V570H1-L02
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- Standard Living Room TVs.
- Public Display Application.
- Home Theater Application.
- MFM Application.
1.4 GENERAL SPECIFICATIONS
Item Specification Unit Note Active Area 1251.36 x 703.89 (56.53”) mm Bezel Opening Area 1259.8 x 710.7 mm Driver Element a-si TFT active matrix - ­Pixel Number 1920x R.G.B. x 1080 pixel ­Pixel Pitch(Sub Pixel) 0.21725 (H) x 0.65175 (V) mm ­Pixel Arrangement RGB vertical stripe - ­Display Colors 16.7M color -
Display Operation Mode Transmissive mode / Normally black - -
Surface Treatment
Note (1) Please refer to the attached drawings in chapter 9 for more information about the front and
back outlines.
Note (2) The spec of the surface treatment is temporarily for this phase. CMO reserves the rights to
Anti-Glare coating (Haze 25%)
Hardness coating (3H)
- (2)
(1)
change this feature.
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1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal (H) 1326.2 1328 1329.8 mm
Module Size
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Note (2) Module Depth does not include connectors. ΰFrom bezel surface to rear surfaceα
Vertical (V) 762.8 764 765.2 mm Depth (D) 39 40 41 mm
Weight ----- 23000 ----- g -
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Module Size
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2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1) Operating Ambient Temperature TOP 0 50 ºC (1), (2) Shock (Non-Operating) S Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
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Val ue
Min. Max.
- 30 G (3), (5)
NOP
- 1.0 G (4), (5)
NOP
Unit Note
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of
display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature
of display area from being over 65 ºC. The range of operating temperature may degrade in case of
improper thermal management in final product design.
Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.
Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so
that the module would not be twisted or bent by the fixture.
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Model No.:V570H1-L02
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2.2 Package storage
When storing modules as spares for a long time, the following precaution is necessary.
(a) Do not leave the module in high temperature, and high humidity for a long time. It is highly recommended
to store the module with temperature from 0 to 35кat normal humidity without condensation.
(b) The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or
fluorescent light.
2.3 ELECTRICAL ABSOLUTE RATINGS
2.3.1 TFT LCD MODULE
Item Symbol
Min. Max.
Power Supply Voltage VCC -0.3 13.5 V
Logic Input Voltage VIN -0.3 3.6 V
Val ue
Unit Note
(1)
2.3.2 BACKLIGHT INVERTER UNIT
Item Symbol
Lamp Voltage VW 2950 Power Supply Voltage VBL 0 30 V Control Signal Level
Ё
Val ue
Min. Max.
Ё
-0.3 7 V
Unit Note
V
Ta = 0 º C
RMS
(1)
(1), (3)
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function
operation should be restricted to the conditions described under Normal Operating Conditions.
Note (2) No moisture condensation or freezing.
Note (3)The control signals include On/Off Control, Internal PWM Control, External PWM Control and
Internal/External PWM Selection.
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(
Low
to
High)
3. ELECTRICAL CHARACTERISTICS
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Issue Date: Dec. 1. 2008
Model No.:V570H1-L02
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3.1 TFT LCD MODULE (
Parameter Symbol
Ta = 25 ± 2 ºC)
Min. Typ. Max.
Power Supply Voltage VCC 11.4 12 12.6 V (1)
Power Supply Ripple Voltage VRP - - 350 mV Rush Current I
RUSH
- - 5.0 A (2)
White - 1.6 1.9 A
Power Supply Current
Black - 0.7 - A Vertical Stripe
I
CC
- 1.2 - A
Differential Input High
Threshold Voltage V
LVT H
100 - mV
Differential Input Low
LVDS Interface
Threshold Voltage V
Common Input Voltage
Terminating Resistor
CMOS interface
Input High Threshold Voltage
Input Low Threshold Voltage
LVTL
V
1.125 1.25 1.375 V
LVC
R
- 100 - ohm
T
VIH 2.7 - 3.3 V
VIL 0 - 0.7 V
- -100 mV
Note (1) The module should be always operated within the above ranges.
Note (2) Measurement condition:
+12.0V
Q1 AO4409
R1
200K
Val ue
FUSE
Unit Note
C3
1uF
Vcc
(LCD Module Input)
(3)
VR1
(Control Signal)
SW
R2
1K
47K
Q2
2N7002
C1
10uF
Vcc rising time is 470us
Vcc
0.9Vcc
0.1Vcc
GND
470us
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R
R
G
B
Note (3) The specified power supply current is under the conditions at Vcc = 12 V, Ta = 25 ± 2 ºC, fv = 60 Hz,
whereas a power dissipation check pattern below is displayed.
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a. White Pattern
Active Area
c. Vertical Stripe Pattern
b. Black Pattern
Active Area
R
G
B
R
B
G
R
G
B
B
B
R
R
R
G
G
G
G
B
B
B
B
R
R
Active Area
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3.2 BACKLIGHT UNIT
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Issue Date: Dec. 1. 2008
Model No.:V570H1-L02
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3.2.1 CCFL (Cold Cathode Fluorescent Lamp) CHARACTERISTICS (
Parameter Symbol
Min. Typ. Max. Lamp Input Voltage VL - 1900 - V Lamp Current IL 5.2 5.7 6.2 mA
Lamp Turn On Voltage
VS
- -
- -
Val ue
2950 2500
Ta = 25 ± 2 ºC)
Unit Note
-
RMS
RMS
V
Ta = 0 º C ( 2 )
RMS
Ta = 25 ºC (2)
V
RMS
(1)
Operating Frequency FL 40 - 70 KHz (3) Lamp Life Time LBL 50,000 60,000 - Hrs (4)
3.2.2 INVERTER CHARACTERISTICS (
Parameter Symbol
Ta = 25 ± 2 ºC)
Val ue
Min. Typ. Max.
Unit Note
Power Consumption PO - 300 320 W (5)(6), IL =5.7mA
Power Supply Voltage VBL 22.8 24 25.2 VDC Power Supply Current IBL - 12.5 - A Non Dimming Input Ripple Noise - - - 912 mV
VBL=22.8V
P-P
Oscillating Frequency FW 47 50 53 kHz Dimming frequency FB 150 160 170 Hz Minimum Duty Ratio D
- 20 - %
MIN
Note (1) Lamp current is measured by utilizing AC current probe and its value is average by measuring
master and slave board.
Note (2) The lamp starting voltage V
should be applied to the lamp for more than 1 second after startup.
S
Otherwise the lamp may not be turned on.
Note (3) The lamp frequency may produce interference with horizontal synchronous frequency of the
display input signals, and it may result in line flow on the display. In order to avoid interference,
the lamp frequency should be detached from the horizontal synchronous frequency and its
harmonics as far as possible.
Note (4) The life time of a lamp is defined as when the brightness is larger than 50% of its original value
and the effective discharge length is longer than 80% of its original length (Effective discharge
length is defined as an area that has equal to or more than 70% brightness compared to the
brightness at the center point of lamp.) as the time in which it continues to operate under the
condition at Ta = 25 2к and I
Note (5) The power supply capacity should be higher than the total inverter power consumption P
= 5.2~6.2mArms.
L
. Since
BL
the pulse width modulation (PWM) mode was applied for backlight dimming, the driving current
changed as PWM duty on and off. The transient response of power supply should be considered
for the changing loading when inverter dimming.
Note (6) The measurement condition of Max. value is based on 57" backlight unit under input voltage 24V,
average lamp current 6.0 mA and lighting 30 minutes later.
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Model No.:V570H1-L02
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Inverter
(Master)
a
1 2
a
a
1 2
a
a
1 2
a
a
1 2
a
a
1 2
a
a
1 2
a
a
1 2
a
a
1 2
a
HV (White -) HV(Blue -)
HV (White +) HV(Blue +)
HV (White -) HV(Blue -)
HV (White +) HV(Blue +)
HV (White -) HV(Blue -)
HV (White +) HV(Blue +)
HV (White -) HV(Blue -)
HV (White +) HV(Blue +)
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
HV (Pink +) HV (White +)
HV (Pink -) HV (White -)
HV (Pink +) HV (White +)
HV (Pink -) HV (White -)
HV (Pink +) HV (White +)
HV (Pink -) HV (White -)
HV (Pink +) HV (White +)
HV (Pink -) HV (White -)
A
b
1 2
A
b
1
A
b
2
A
b
1
A
b
2
A
b
A
b
1 2
A
b
A
b
1
A
b
2
A
b
1
A
b
2
1
A
b
2
A
b
A
b
1 2
A
b
Inverter
(Slave 2)
Inverter
(Slave 1)
LCD Module
a
1 2
a
1
a
2
a
1
a
2
a
a
1 2
a
a
1 2
a
a
1 2
a
a
1 2
a
1
a
2
a
HV (White -) HV(Blue -)
HV (White +) HV(Blue +)
HV (White -) HV(Blue -)
HV (White +) HV(Blue +)
HV (White -) HV(Blue -)
HV (White +) HV(Blue +)
HV (White -) HV(Blue -)
HV (White +) HV(Blue +)
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
HV (Pink +) HV (White +)
HV (Pink -) HV (White -)
HV (Pink +) HV (White +)
HV (Pink -) HV (White -)
HV (Pink +) HV (White +)
HV (Pink -) HV (White -)
HV (Pink +) HV (White +)
HV (Pink -) HV (White -)
A
b
1
A
b
2
A
b
1 2
A
b
A
b
1 2
A
b
A
b
1
A
b
2
A
b
1
A
b
2
A
b
1
A
b
2
A
b
1
A
b
2
A
b
1 2
A
b
Inverter
(Slave 3)
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Tr1
BL
V
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Model No.:V570H1-L02
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Tf1
V
V
V
BLON
V
SEL
EPWM
IPWM
V
Toff
2.0V
0.8V
2.0V
0.8V
2.0V
0.8V
3.0V
PWM
Period
Ton
Backlight on duration
Tr
Ext. Dimming Function
T
PWMR
PWM
T
Tf
PWMF
T
External
PWM Duty
Int. Dimming Function
0
0
0
0
0
W
External
100%
Minimun
Duty
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DATA DRIVER
(RSDS)
SCAN DRIVER
GND
CN1.
4.
BLOCK DIAGRAM OF INTERFACE
4.1 TFT LCD MODULE
ERX0(+/-) ERX1(+/-) ERX2(+/-) ERX3(+/-) ECLK(+/-)
ORX0(+/-) ORX1(+/-) ORX2(+/-) ORX3(+/-) OCLK(+/-)
(FI-RE51S-HF (JAE))
INPUT CONNECTOR
FRAME
BUFFER
TIMING
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TFT LCD PANEL
(1920x3x1080)
SELLVDS ODSEL DCREN
Vcc
VBL
GND
SEL
E_PWM
I_PWM
BLON
VBL
GND
CONTROLLER
INVERTER
CONNECTOR
CN1:S14B-PH-SM4-TB
(D)(LF) or equivalent
(Master)
CN4,CN6: 528521070 (Molex)
INVERTER
CONNECTOR
CN1:S12B-PH-SM4-TB
(D)(LF) or equivalent
(Slave 1)
DC/DC CONVERTER
& REFERENCE
VOLTAGE
GENERATOR
CN24,CN26: 528521070 (Molex)
CN8-CN23:SM02 (12.0)B-BHS-1-TB(LF)(JST)
or equivalent
BACKLIGHT
UNIT
INVERTER
CONNECTOR
CN2-4:S12B-PH-SM4-T
B(D)(LF) or equivalent
(Slave 2)
INVERTER
CONNECTOR
CN2-4:S12B-PH-SM4-T
B(D)(LF) or equivalent
(Slave 3)
CN2-4.
VBL
GND
VBL
GND
CN5-CN10: 528521070 (Molex)
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5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD Module Input
Pin Name Description Note
1 VCC +12V power supply 2 VCC +12V power supply 3 VCC +12V power supply 4 VCC +12V power supply 5 VCC +12V power supply 6 GND Ground 7 GND Ground 8 GND Ground
9 GND Ground 10 ORX0- Odd pixel Negative LVDS differential data input. Channel 0 11 ORX0+ Odd pixel Negative LVDS differential data input. Channel 0 12 ORX1- Odd pixel Negative LVDS differential data input. Channel 1 13 ORX1+ Odd pixel Positive LVDS differential data input. Channel 1 14 ORX2- Odd pixel Negative LVDS differential data input. Channel 2 15 ORX2+ Odd pixel Positive LVDS differential data input. Channel 2 16 GND Ground 17 OCLK- Odd pixel Negative LVDS differential clock input. 18 OCLK+ Odd pixel Positive LVDS differential clock input. 19 GND Ground 20 ORX3- Odd pixel Negative LVDS differential data input. Channel 3 21 ORX3+ Odd pixel Positive LVDS differential data input. Channel 3 22 N.C. No Connection 23 N.C. No Connection 24 GND Ground 25 ERX0- Even pixel, Negative LVDS differential data input. Channel 0 26 ERX0+ Even pixel, Positive LVDS differential data input. Channel 0 27 ERX1- Even pixel, Negative LVDS differential data input. Channel 1 28 ERX1+ Even pixel, Positive LVDS differential data input. Channel 1 29 ERX2- Even pixel, Negative LVDS differential data input. Channel 2 30 ERX2+ Even pixel, Positive LVDS differential data input. Channel 2 31 GND Ground 32 ECLK- Even pixel, Negative LVDS differential clock input 33 ECLK+ Even pixel, Positive LVDS differential clock input. 34 GND Ground 35 ERX3- Even pixel, Negative LVDS differential data input. Channel 3 36 ERX3+ Even pixel, Positive LVDS differential data input. Channel 3 37 N.C. No Connection 38 N.C. No Connection 39 GND Ground 40 ODSEL Overdrive Lookup Table Selection (3) 41 DCREN Dynamic Contrast Ratio Enable (4) 42 N.C. No Connection 43 N.C. No Connection 44 N.C. No Connection 45 SELLVDS LVDS Data Format Selection (2) 46 N.C. No Connection 47 N.C. No Connection 48 N.C. No Connection
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(1)
(1)
(1)
(1)
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49 N.C. No Connection 50 N.C. No Connection 51 N.C. No Connection
Note (1) Reserved for internal use. Please leave it open.
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(1)
Note (2)
Note (3) Overdrive lookup table selection. The overdrive lookup table should be selected in accordance with
Note (4) Low : function disable (default), High : Dynamic Contrast Ratio function enable.
Note (5) Low =Open or Connect to GND, High = Connect to +3.3V
Low : JEIDA LVDS Format (default), High : VESA Format. This option signal must be setup early than
LVDS signal.
the frame rate to optimize image quality.
ODSEL
L Lookup table was optimized for 60 Hz frame rate.
H Lookup table was optimized for 50 Hz frame rate.
Note
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5.2 BACKLIGHT UNIT
The pin configuration for the housing and the leader wire is shown in the table below.
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CN12-CN39: CP042CL000 (Cvilux).
Pin Name Description Wire Color
1 HV High Voltage Pink 2 HV High Voltage White
Note (1) The backlight interface housing for high voltage side is a model CP042CL000, manufactured by
Cvilux. The mating header on inverter part number is CP042CP1MB0
1 HV(White)
2 HV(Pink)
1 HV(White)
2 HV(Pink)
1 HV(White)
2 HV(Pink)
1 HV(Pink)
2 HV(White)
1 HV(Pink)
2 HV(White)
1 HV(Pink)
2 HV(White)
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5.3 INVERTER UNIT
CN1: S14B-PH-SM4-TB(D)(LF)(JST) or equivalent
Pin № Symbol Feature
1 2 3 4 5 6 7 8 9
10
11 SEL
E_PWM
12
13 I_PWM
14 BLON BL ON/OFF
CN2-CN4: S12B-PH-SM4-TB(D)(LF)(JST) or equivalent
Pin № Symbol Feature
1 2 3 4 5 6 7 8
9 10 11 NC NC 12 NC NC
CN14-CN45
Pin No. Symbol Description
1 CCFL HOT CCFL high voltage 2 CCFL HOT CCFL high voltage
CN5-CN10:
Pin No. Symbol Description
1 Board to Board
2 Board to Board
3 Board to Board
4 Board to Board
5 Board to Board
6 Board to Board 7 Board to Board 8 Board to Board 9 Board to Board
10
: SM02 (12.0) B-BHS-1-TB (LF)(JST) or equivalent
: 528521070 (Molex)
Control
Signal
Board to Board
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VBL +24V
GND GND
Internal/External PWM Selection
High: external dimming
Low: internal dimming
E_PWM should be connected to low when internal PWM
I_PWM should be connected to low when internal PWM was
VBL +24V
GND GND
External PWM Control Signal
was selected (SEL= low)
Internal PWM Control Signal
selected (SEL= high)
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CN13: 528520870 (Molex)
Pin No. Symbol Description
1 Board to Board 2 Board to Board
3 Board to Board
4 Board to Board
5 Board to Board
6 Board to Board 7 Board to Board 8
Note (1) Floating of any control signal is not allowed.
Control
Signal
Board to Board
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ER0
-
ER7
ER0
-
ER7
EG0
-
EG7
Controller
ERx0+
ERx0
-
ERx1+
ECLK+
RxOUT
51Ө
51Ө
51Ө
51Ө
51Ө
51Ө
51Ө
51Ө
51Ө
100pF
ERx3
-
ORx0+
ORx0
-
ORx1+
OCLK+
51Ө
51Ө
51Ө
51Ө
51Ө
51Ө
51Ө
51Ө
100pF
ORx3
-
OR0
-
OR7
DCLK
OR0
-
OR7
5.4 BLOCK DIAGRAM OF INTERFACE
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100pF
ERx1-
ERx2+
ERx3+
51Ө
100pF
100pF
100pF
Host
Graphics
Controller
Timing
100pF
ORx1-
51Ө
ORx2+
100pF
ORx3+
100pF
100pF
LVDS Transmitter
THC63LVDM83A
(LVDF83A)
LVDS Receiver
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ER0~ER7 : Even pixel R data
EG0~EG7 : Even pixel G data
EB0~EB7 : Even pixel B data
OR0~OR7 : Odd pixel R data
OG0~OG7: Odd pixel G data
OB0~OB7 : Odd pixel B data
DE : Data enable signal
DCLK : Data clock signal
Notes: (1) The system must have the transmitter to drive the module.
(2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line
when it is used differentially.
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(3) Two pixel data send into the module for every clock cycle. The first pixel of the frame is odd pixel
and the second pixel is even pixel.
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5.5 LVDS INTERFACE
SIGNAL
TRANSMITTER
THC63LVDM83A
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INTERFACE
CONNECTOR
RECEIVER
THC63LVDF84A
Issue Date: Dec. 1. 2008
Model No.:V570H1-L02
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TFT CONTROL INPUT
24bit
LVDS_SEL
=H
R0
R1
R2
R3
R4
R5
G0
G1
G2
G3
G4
G5
B0
B1
B2
B3
B4
B5
DE
R6
R7
G6
G7
B6
B7
RSVD 1
RSVD 2
RSVD 3
LVDS_SEL =
L or OPEN
R2
R3
R4
R5
R6
R7
G2
G3
G4
G5
G6
G7
B2
B3
B4
B5
B6
B7
DE
R0
R1
G0
G1
B0
B1
RSVD 1
RSVD 2
RSVD 3
DCLK 31 TxCLK IN TxCLK
PIN INPUT Host TFT-LCD PIN OUTPUT
51
52
54
55
56
3
4
6
7
11
12
14
15
19
20
22
23
24
30
50
2
8
10
16
18
25
27
28
TxIN0
TxIN1
TxIN2
TxIN3
TxIN4
TxIN6
TxIN7
TxIN8
TxIN9
TxIN12
TxIN13
TxIN14
TxIN15
TxIN18
TxIN19
TxIN20
TxIN21
TxIN22
TxIN26
TxIN27
TxIN5
TxIN10
TxIN11
TxIN16
TxIN17
TxIN23
TxIN24
TxIN25
TA OUT0+
TA OUT0-
TA OUT1+
TA OUT1-
TA OUT2+
TA OUT2-
TA OUT3+
TA OUT3-
OUT+
TxCLK
OUT-
Rx 0+
Rx 0-
Rx 1+
Rx 1-
Rx 2+
Rx 2-
Rx 3+
Rx 3-
RxCLK
IN+
RxCLK
IN-
27
29
30
32
33
35
37
38
39
43
45
46
47
51
53
54
55
1
6
7
34
41
42
49
50
2
3
5
26
Rx OUT0
Rx OUT1
Rx OUT2
Rx OUT3
Rx OUT4
Rx OUT6
Rx OUT7
Rx OUT8
Rx OUT9
Rx OUT12
Rx OUT13
Rx OUT14
Rx OUT15
Rx OUT18
Rx OUT19
Rx OUT20
Rx OUT21
Rx OUT22
Rx OUT26
Rx OUT27
Rx OUT5
Rx OUT10
Rx OUT11
Rx OUT16
Rx OUT17
Rx OUT23
Rx OUT24
Rx OUT25
RxCLK
OUT
LVDS_SEL
=H
R0
R1
R2
R3
R4
R5
G0
G1
G2
G3
G4
G5
B0
B1
B2
B3
B4
B5
DE
R6
R7
G6
G7
B6
B7
NC
NC
NC
DCLK
LVDS_SEL =
L or OPEN
R2
R3
R4
R5
R6
R7
G2
G3
G4
G5
G6
G7
B2
B3
B4
B5
B6
B7
DE
R0
R1
G0
G1
B0
B1
NC
NC
NC
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R0~R7: Pixel R Data (7; MSB, 0; LSB)
G0~G7: Pixel G Data (7; MSB, 0; LSB)
B0~B7: Pixel B Data (7; MSB, 0; LSB)
DE : Data enable signal
DCLK : Data clock signal
Notes: (1) RSVD (reserved) pins on the transmitter shall be “H” or “L”.
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0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
1
5.6 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for
the color. The higher the binary input, the brighter the color. The table below provides the assignment of
the color versus data input.
Color
R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0
Black Red
Green Basic Colors
Gray Scale Of Red
Gray Scale Of Green
Gray Scale Of Blue
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue
Cyan
Magenta
Yellow
White
Red (0) / Dark
Red (1)
Red (2)
0
0 1
1
0
0
0
0
0
0
1
1
1
1
1
1 0
0 0
0
0
0
:
:
:
:
1
1
1
1
1
1 0
0 0
0
0
0
:
:
:
:
0
0
0
0
0
0 0
0 0
0
0
0
:
:
:
:
0
0
0
0
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Model No.:V570H1-L02
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Data Signal
Red Green Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
1
1
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
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Thb
Tc
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max. Unit Note
Frequency 1/Tc 60 74 80 MH
LVDS Receiver Clock
LVDS Receiver Data
Vertical Active Display Term
Horizontal Active Display Term
Note (1) (ODSEL) = (H) , (L). Please refer to 5.1 for detail information.
Input cycle to cycle jitter Setup Time Tlvsu 600 - - ps ­Hold Time Tlvhd 600 - - ps -
Frame Rate
Total Tv 1115 1125 1135 Th Tv=Tvd+Tvb Display Tvd 1080 1080 1080 Th ­Blank Tvb 35 45 55 Th ­Total Th 1050 1100 1150 Tc Th=Thd+Thb Display Thd 960 960 960 Tc ­Blank Thb 90 140 190 Tc -
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Z
Trcl - - 200 ps -
Fr Fr
5
6
47 50 53 Hz (1) 57 60 63 Hz (1)
-
Note (2) Since the module is operated in DE only mode, Hsync and Vsync input signals should be set to
low logic level. Otherwise, this module would operate abnormally.
INPUT SIGNAL TIMING DIAGRAM
DE
Th
DCLK
DE
Tvd
Tv
Tvb
Thd
DATA
Valid display data ( 960 clocks)
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RXCLK+
RXn+/-
Tlvsu
Tlvhd
1T‘ 14
LVDS INPUT INTERFACE TIMING DIAGRAM
Tc
3T‘ 14
5T‘ 14
7T‘ 14
9T‘ 14
11T‘
14
13T‘
14
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Љ
Љ
Љ
Љ
Љ
Љ
Љ
100ms
Љ
T
6.2 POWER ON/OFF SEQUENCE
To prevent a latch-up or DC operation of LCD module, the power on/off sequence should follow the
diagram below.
Power Supply
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0.9 V
0.9 V
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CC
V
0.5ЉT
0
0
500ms
CC
0V
1
10ms
T
2
50ms
T
3
50ms
T4
Signals
0V
Backlight (Recommended)
500ms
T5
6
0.1V
CC
2
T
VALI D
Power On
50%
5
T
Power ON/OFF Sequence
50%
6
T
T
3
T1
Power Off
0.1V
T4
cc
Note.
(1) The supply voltage of the external system for the module input should follow the definition of Vcc.
(2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the
LCD operation or the LCD turns off before the backlight turns off, the display may momentarily
become abnormal screen.
(3) In case of VCC is in off level, please keep the level of input signals on the low or high impedance.
(4) T4 should be measured after the module has been fully discharged between power off and on
period.
(5) Interface signal shall not be kept at high impedance when the power is on.
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7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit Ambient Temperature Ta Ambient Humidity Ha Supply Voltage VCC 12/18 V Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS" Lamp Current IL Oscillating Frequency (Inverter) Vertical Frame Rate Fr 60 Hz
7.2 OPTICAL SPECIFICATIONS
The relative measurement methods of optical characteristics are shown in 7.2. The following items should be
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25±2
50±10
5.7±0.5 50±3
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o
C
%RH
mA
KHz
measured under the test conditions described in 7.1 and stable environment shown in Note (6).
Item Symbol
CR 1200 1500
Contrast Ratio
Response Time
Center Luminance of White L White Variation Cross Talk CT 4 % Note (5)
Red
Green Color Chromaticity
Viewing Angle
Blue
White
Color Gamut
Horizontal
Vertical
Dynamic
CR
Gray to
gray
C
δW
Rx 0.646
Ry Gx Gy
Bx
By
Wx Wy
C.G
θx+
θ
-
x
θY+
θ
-
Y
Condition Min. Typ. Max. Unit Note
Typ.
+0.03
=0°, θY =0°
θ
x
Viewing Angle at
Normal Direction
CR20
6000
6.5 12 ms
450 500 cd/m
1.3 - Note (7)
0.333
Typ.
-0.03
70 72 % NTSC 80 88 80 88 80 88 80 88
0.266
0.601
0.149
0.059
0.280
0.285
- Note (2)
Note (3)
2
Note (4)
-
-
-
­Note (6)
-
-
-
-
Deg.
Note (1)
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Surface Luminance with all white pixels
0%
T
ime
Note (1) Definition of Viewing Angle (θx, θy):
Viewing angles are measured by Eldim EZ-Contrast 160R
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θX- = 90º
x-
6 o’clock
θ
y-
= 90º
y-
Note (2) Definition of Contrast Ratio (CR):
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) =
Normal
θx = θy = 0º
θy- θy+
θx
θx+
y+
12 o’clock direction
θ
y+
= 90º
x+
θX+ = 90º
Surface Luminance with all black pixels
CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in
Note (7).
The measured value will be “Dynamic CR” only when the function of dynamic contrast ratio is
enabled.
Note (3) Definition of Gray-to-Gray Switching Time:
100%
90%
Optical
Response
10%
Gray to gray Switching time
Gray to gray Switching time
The driving signal means the signal of gray level 0, 63, 127, 191, and 255.
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Active Area
(D, W)
Active Area
(0, 0)
Gray to gray average time means the average switching time of gray level 0, 63,127,191,255 to each
other.
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Note (4) Definition of Luminance of White (L
Measure the luminance of gray level 255 at center point and 5 points
LC = L (5), where L (X) is corresponding to the luminance of the point X at the figure in Note (7).
Note (5) Definition of Cross Talk (CT):
CT = | Y
– YA | / YA × 100 (%)
B
Where:
Y
= Luminance of measured location without gray level 0 pattern (cd/m2)
A
Y
= Luminance of measured location with gray level 0 pattern (cd/m2)
B
(0, 0)
Y
(D/8,W/2)
A, L
Gray 128
Y
(D/2,7W/8)
A, D
Note (6) Measurement Setup:
, L
C
Y
(D/2,W /8)
A, U
Y
(7D/8,W/2)
A, R
AVE
):
(D/4,W/4)
Y
(D/8,W/2)
B, L
Y
(D/2,7W/8)
B, D
Gray 0
Gray 0
Gray 128
Y
B, U
Y
B, R
(3D/4,3W/4)
(D, W)
(D/2,W /8)
(7D/8,W/2)
The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement
should be executed after lighting backlight for 1 hour in a windless room.
LCD Module
LCD Panel
Center of the Screen
Display Color Analyzer
(Minolta CA210)
Light Shield Room
(Ambient Luminance < 2 lux)
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W
Note (7) Definition of White Variation (δW):
Measure the luminance of gray level 255 at 5 points
δW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]
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Horizontal Line
Vertical Line
W/4
W/2
3W /4
D/4 D/2 3D/4
1 2
3 4
D
5
Active Area
: Test Point
X
X=1 to 5
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8. PRECAUTIONS
8.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the module during assembly.
(2) It is recommended to assemble or to install a module into the user’s system in clean working areas.
The dust and oil may cause electrical short or worsen the polarizer.
(3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and Backlight.
(4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent
the damage and latch-up of the CMOS LSI chips.
(5) Do not plug in or pull out the I/F connector while the module is in operation.
(6) Do not disassemble the module.
(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and
easily scratched.
(8) Moisture can easily penetrate into LCD module and may cause the damage during operation.
(9) High temperature or humidity may deteriorate the performance of LCD module. Please store LCD
modules in the specified storage conditions.
(10) When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the
response time will become slow, and the starting voltage of CCFL will be higher than that of room
temperature.
8.2 SAFETY PRECAUTIONS
(1) The startup voltage of a Backlight is approximately 1000 Volts. It may cause an electrical shock while
assembling with the inverter. Do not disassemble the module or insert anything into the Backlight unit.
(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
(3) After the module’s end of life, it is not harmful in case of normal operation and storage.
8.3 SAFETY STANDARDS
The LCD module should be certified with safety regulations as follows:
(1) UL60950-1 or updated standard.
(2) IEC60950-1 or updated standard.
(3) UL60065 or updated standard.
(4) IEC60065 or updated standard.
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9. PACKAGING
9.1 PACKING SPECIFICATIONS
(1) 2 LCD TV modules / 1 Box
(2) Box dimensions : 1448(L) X 283 (W) X 870 (H)mm
(3) Weight : approximately 54Kg (2 modules per box)
9.2 PACKING METHOD
Figures 9-1 and 9-2 are the packing method
LCD TV Module
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Issue Date: Dec. 1. 2008
Model No.:V570H1-L02
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Cushion(Bottom)
Anti-static Bag
Carton
PP Belt
4pcs Drier
Carton Label
Figure.9-1 packing method
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Sea & Land Transportation
(L1130*50*50mm)
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Issue Date: Dec. 1. 2008
Model No.:V570H1-L02
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Film
PP Belt
(L1350*50*50mm)
(L1150*W1345*H140mm)
Figure. 9-2 Packing method
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10. MECHANICAL CHARACTERISTICS
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Issue Date: Dec. 1. 2008
Model No.:V570H1-L02
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Model No.:V570H1-L02
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