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TFT LCD Approval Specification
MODEL NO.: V562D1–L01
Customer: _________________________________
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Issue Date:Apr.16.2010
Model No.: V562D1-L01
Approval
Approved by:_______________________________
Note
TV Product Marketing & Management Div
Approved By
Chao-Chun Chung
QA Dept. Product Development Div.
Reviewed By
Hsin-Nan Chen WT Lin
LCD TV Marketing and Product Management Div.
Prepared By
Denise Shieh Michell Tsung
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Issue Date:Apr.16.2010
Model No.: V562D1-L01
Approval
CONTENTS
REVISION HISTORY ....................................................................................................................................................... 4
1.GENERAL DESCRIPTION ....................................................................................................................................... 5
1.1.OVERVIEW .................................................................................................................................................... 5
1.2.FEATURES .................................................................................................................................................... 5
1.3.APPLICATION ................................................................................................................................................ 5
1.4.GENERAL SPECIFICATIONS ........................................................................................................................ 5
1.5.MECHANICAL SPECIFICATIONS ................................................................................................................. 6
2.ABSOLUTE MAXIMUM RATING .............................................................................................................................. 7
2.1.ABSOLUTE RATINGS OF ENVIRONMENT .................................................................................................. 7
2.2.RATINGS OF IMAGE STICKING ................................................................................................................... 8
3.ELECTRICAL MAXIMUM RATINGS ........................................................................................................................ 9
3.1.TFT LCD MODULE ........................................................................................................................................ 9
3.2.BACKLIGHT UNIT .......................................................................................................................................... 9
4.ELECTRICAL CHARACTERISTICS ...................................................................................................................... 10
4.1.TFT LCD MODULE ...................................................................................................................................... 10
4.2.BACKLIGHT UNIT ........................................................................................................................................ 13
4.2.1.CCFL (Cold Cathode Fluorescent Lamp) CHARACTERISTICS........................................................... 13
4.2.2.INVERTER CHARACTERISTICS ......................................................................................................... 13
4.2.3.INVERTER INTERTFACE CHARACTERISTICS ................................................................................. 15
5.BLOCK DIAGRAM ................................................................................................................................................. 17
5.1.TFT LCD MODULE ...................................................................................................................................... 17
6.LCD INPUT TERMINAL PIN ASSIGNMENT .......................................................................................................... 18
6.1.TFT LCD MODULE DVI INPUT ................................................................................................................... 18
6.2.TFT LCD MODULE POWER INPUT ............................................................................................................ 18
6.3.BACKLIGHT UNIT ........................................................................................................................................ 19
6.4.INVERTER UNIT .......................................................................................................................................... 20
6.5.BLOCK DIAGRAM OF IMAGE SIGNAL ....................................................................................................... 22
6.6.DVI SIGNAL LIST ......................................................................................................................................... 23
6.7.DVI LINK TIMING REQUIREMENTS ........................................................................................................... 24
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Issue Date:Apr.16.2010
Model No.: V562D1-L01
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7.TIMING REQUIREMENTS OF IMAGE SIGNAL .................................................................................................... 25
7.1.INPUT SIGNAL TIMING SPECIFICATIONS ................................................................................................ 25
7.2.EXTENDED DISPLAY IDENTIFICATION DADA (EDID) STRUCTURE ....................................................... 27
7.3.EXTENDED DISPLAY IDENTIFICATION DADA (EDID) CODE ................................................................... 28
7.4.POWER ON/OFF SEQUENCE .................................................................................................................... 29
8.OPTICAL CHARACTERISTICS ............................................................................................................................. 30
8.1.TEST CONDITIONS ..................................................................................................................................... 30
8.2.OPTICAL SPECIFICATIONS ....................................................................................................................... 30
9.PRECAUTIONS ..................................................................................................................................................... 34
9.1.ASSEMBLY AND HANDLING PRECAUTIONS ........................................................................................... 34
9.2.SAFETY PRECAUTIONS ............................................................................................................................ 34
9.3.SAFETY STANDARDS ................................................................................................................................ 34
10.DEFINITION OF LABELS ...................................................................................................................................... 35
10.1.CMO MODULE LABEL ................................................................................................................................ 35
10.2.WARRANTY LABEL ..................................................................................................................................... 36
11.PACKAGE .............................................................................................................................................................. 37
11.1.PACKING SPECIFICATIONS ....................................................................................................................... 37
11.2.PACKING METHOD ..................................................................................................................................... 37
12.MECHANICAL CHARACTERISTIC........................................................................................................................ 39
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REVISION HISTORY
Version Date Page(New) Section Description
Ver 2.0 Apr. 13,’07 All All Approval Specification is first issued.
Ver 2.1 Jul. 25,’07 5
14
16
19
24
29
37
Ver 2.2 Sep. 25,’07 6
6
11
11
12
12
29
29
31
32
Ver 2.3 Nov. 27,’07 27
38
Ver 2.4 JUL.9,’09 12
25
29
35
36
38
39
Ver 2.5 Mar.26.2010 5
15
22
36
39
Ver 2.6 Apr.16.2010 22
31
32
35
38
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1.5
4.2.3
5.1
6.4
7.1
8.2
12
2.1
2.1
4.2.1
4.2.2
4.2.2
4.2.2
8.1
8.2
8.2
8.2
7.3
12
4.2.2
7.1
7.4
10.1
11.2
12
12
1.4
4.2.3
6.5
10.2
12
6.5
8.2
8.2
10.1
11.2
Modify the value of Horizontal(H) and Vertical(V).
Add Note (5).
Modify CN1:S14B-PH-SM4-TB(D)(LF).
Modify CN2:S12B-PH-SM4-TB(D)(LF).
Modify CN1:S14B-PH-SM4-TB(D)(LF).
Modify CN2:S12B-PH-SM4-TB(D)(LF).
Input signal timing specifications add Max. timing spec.
Modify Center Luminance of White to
Typ.=450 nits and Min.=400 nits.
Add screw hole section drawing.
Modify Max. of Operating Ambient Temperature to 45 ºC.
Modify Note (2)
Surface temperature of display area should be less than or
equal to 70 ºC.
Modify the value of Lamp Current.
Modify the value of Power Consumption and Power Supply
Current.
Modify Note (4) I
Modify Note (6) average lamp current 6.3mA.
Modify the value of Lamp Current.
Modify Cross Talk from 4% to 2%.
Modify Note (5).
Modify Note (7).
Modify EDID Code.
Modify drawing from 4 single-DVI to 2 dual-DVI.
Add note
Remove Note (1)
Remove Note (3)
Modify module label.
Remove Drier.
Modify rear drawing form no sensor hole to two sensor
hole
Modify rear drawing form no sensor hole to two sensor
hole
Midofy 1.4 GENERAL SPECIFICATIONS
Modify 4.2.3 INVERTER INTERTFACE
CHARACTERISTICS
Add Note (1)
Add 10.2 WARRANTY LABEL
Modify 12.MECHANICAL CHARACTERISTIC
Modify Note (1)
Modify Note (3)
Modify Note (6)
Modify 10.1 CMO MODULE LABEL
Modify 11.2 PACKING METHOD
= 5.5 ~ 6.5mA rms.
L
Issue Date:Apr.16.2010
Model No.: V562D1-L01
Approval
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1. GENERAL DESCRIPTION
1.1. OVERVIEW
V562D1-L01 is a 56” Thin-Film-Transistor Liquid-Crystal (TFT-LCD) module with one 32-CCFL backlight unit
and two ports Dual-DVI utilization. This module supports 3840 x 2160 Quad Full High Definition (QFHD) TV
format and can display 16.7M colors (8-bit). The inverter module for backlight is also built-in.
1.2. FEATURES
Ultra Wide Viewing Angle (176(H)/176(V) for CR>30)
High Brightness (450 nits)
High Contrast Ratio (1200:1)
Ultra Fast Response Time (Gray to gray average 6.5 ms)
High Color Saturation (NTSC 75%)
QFHD (3840 x 2160 pixels) Resolution
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Model No.: V562D1-L01
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2 Ports Dual-DVI (Digital Visual Interface)
RoHS Compliance
1.3. APPLICATION
Luxurious Living Room TVs
Public Display
Home Theater
Satellite Communication
Medical Analyses/ Instruction
Security and Monitoring
Industrial Design
3D Display
Digital Museum
Multi-Media Display
1.4. GENERAL SPECIFICATIONS
Item Specification Unit Note
Active Area 1244.16 (H) x 699.84 (V) (56.2” diagonal) mm
Bezel Opening Area 1252.1 (H) x 707.8 (V) mm
Driver Element a-si TFT active matrix - Pixel Number 3840x R.G.B. x 2160 pixel Pixel Pitch(Sub Pixel) 0.108 (H) x 0.324 (V) mm Pixel Arrangement RGB vertical stripe - Display Colors 16.7M color Display Operation Mode Transmissive mode / Normally black - -
Surface Treatment
Note (1) The specifications of the surface treatment are temporarily for this phase. CMO reserves the rights
Low reflection coating< 1.5% reflection
Hard coating 3H
- (1)
to change this feature.
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1.5. MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal(H) 1309 1309.5 1310.2 mm
Module Size
Vertical(V) 766.5 767 767.7 mm
Depth(D) 57.2 58.5 59.8 mm To PCB cover
Depth(D) 61.9 63.2 64.5 mm To inverter cover
Weight 23000 23500 24000 g
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2. ABSOLUTE MAXIMUM RATING
2.1. ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +55 ºC (1)
Operating Ambient Temperature TOP 0 45 ºC (1), (2)
Shock (Non-Operating) S
Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta ʀ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
NOP
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Model No.: V562D1-L01
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Value
Min. Max.
X, Y axis - 30 G (3), (5)
Z axis - 30 G (3), (5)
- 1.0 G (4), (5)
NOP
Unit Note
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of
display area is less than or equal to 70 ºC with LCD module alone in a temperature controlled
chamber. Thermal management should be considered in your product design to prevent the
surface temperature of display area from being over 70 ºC. The range of operating temperature
may degrade in case of improper thermal management in your product design.
Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, and ± Z.
Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so
that the module would not be twisted or bent by the fixture. The module would not be twisted or
bent by the fixture.
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2.2. RATINGS OF IMAGE STICKING
Item Symbol Value Unit Note
Room Temperature Image Sticking RT IS Invisibility 6% ND (%) (1)(3)
High Temperature Image Sticking HT IS Invisibility 6% ND (%) (2)(3)
Note (1) Room temperature image sticking test is at 25Ʋ3 ºC environment and fix the pattern A (checker
pattern) for 12 hours.
Note (2) High temperature image sticking test is at 50Ʋ3 ºC environment and fix the pattern A for 12 hours.
Note (3) Inspection condition is at pattern B (128grade) after 5 mins from pattern A.
A. Pattern A (checker pattern) B. Pattern B (128grade)
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3. ELECTRICAL MAXIMUM RATINGS
3.1. TFT LCD MODULE
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Issue Date:Apr.16.2010
Model No.: V562D1-L01
Approval
Item Symbol
V
-0.3 20 V
Power Supply Voltage
DVI Termination Supply Voltage
DVI Signal Voltage on any pin
DVI Differential Mode Signal
Voltage on any pin
Logic Input Voltage VIN -0.3 3.6 V
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
should be restricted to the conditions described under normal operating conditions.
Note (2) The maximum ratings of the DVI are specified in the DVI specification of DDWG.
CC1
V
-0.3 6 V
CC2
AVcc 4.0 V
- -0.5 4.0 V
- -0.5 4.0 V
Value
Min. Max.
Unit Note
(2)
3.2. BACKLIGHT UNIT
Item Symbol
Lamp Voltage V
Power Supply Voltage VBL 0 30 V (1)
Control Signal Level
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
W
炼
Value
Min. Max.
炼
-0.3 7 V (1), (2), (3)
5000 V
Unit Note
RMS
should be restricted to the conditions described under normal operating conditions.
Note (2) No moisture condensation or freezing.
Note (3) The control signals include On/Off Control, Internal PWM Control, External PWM Control and
Internal/External PWM Selection.
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4. ELECTRICAL CHARACTERISTICS
4.1. TFT LCD MODULE
Ta = 25 ± 2 ºC
Parameter Symbol
Power Supply Voltage
Power Supply Ripple Voltage
Rush Current
White
Black - 0.7 - A
Vertical Stripe - 1.4 - A
Power Supply Current
DVI
Interface
CMOS
Interface
Differential Input Voltage Single
Ended Amplitude
Receiver Resistor RT 95 100 105 ohm
Input High Threshold Voltage V
Input Low Threshold Voltage VIL 0 - 0.7 V
White
Black - 4.1 - A
Vertical Stripe - 4.7 - A
V-Stripe-2column - 6.2 7.8 A
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Issue Date:Apr.16.2010
Model No.: V562D1-L01
Value
Min. Typ. Max.
V
17.1 18 18.9 V
CC1
V
4.5 5 5.5 V
CC2
V
- - 400 mV
RP1
V
- - 200 mV
RP2
I
- - 4.5 A
RUSH1
I
- - 12.5 A
RUSH2
- 1.8 2.3 A
I
CC1
- 4.6 - A
I
CC2
V 100 - 800 mV
2.7 - 3.3 V
IH
Unit Note
Approval
(1)
(2)
(3)
(4) (5)
Note (1) The module should be always operated within the above ranges.
Note (2) Measurement conditions:
(Low to High)
(Control Signal)
SW
+5.0V or
R1
1k
R2
1K
Q1
Si4485DY
47K
Q2
2N7002
FUSE
VR1
C1
0.01uF
C3
1uF
Vcc1 or
(LCD Module Input)
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GND
Note (3) The specified power supply current is under the conditions at Vcc1 = 18 V, Vcc2 = 5 V, Ta = 25 ± 2
ºC,
= 60 Hz, whereas a power dissipation check pattern below is displayed.
f
v
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Model No.: V562D1-L01
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Vcc rising time is at least 470PPPPs
0.9Vcc
0.1Vcc
470Ps
a. White Pattern
c. Vertical Stripe Pattern
b. Black Pattern
Active Area Active Area
R
G
R
B
G
R
B
G
R R
G
R
G
B
B
B
B
B
R
G
R
B
R
G
R
B
G
B
Active Area
Note (4) The electrical characteristics of DVI are specified in the DVI specification of DDWG.
910
Note (5) The receiver shall reproduce a test data stream, with pixel error rate
input amplitude illustrate by the eye diagram.
, when presented with
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800
100
0
-100
Differential Amplitude (mV)
-800
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Model No.: V562D1-L01
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0.25 0.3 0.7 0.750 1
Normalized Time
Absolute Eye Diagram Mask at TP3
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4.2. BACKLIGHT UNIT
4.2.1. CCFL (Cold Cathode Fluorescent Lamp) CHARACTERISTICS
(Ta=25±2oC)
Parameter Symbol
Min. Typ. Max.
Value
Lamp Voltage VW - 1728 - VRMS IL =5.7mA
Lamp Current IL 5.5 6.0 6.5 mARMS (1)
Lamp Starting Voltage VS
- - 2550 VRMS (2), Ta = 0 ºC
- - 2350 VRMS (2), Ta = 25 ºC
Operating Frequency Fo 40 60 80 KHz (3)
Lamp Life Time LBL - 50000 - Hrs (4)
4.2.2. INVERTER CHARACTERISTICS
(Ta=25±2oC)
Parameter Symbol
Power Consumption
PBL - 315 330 W (5), IL = 6.0mA
Min. Typ. Max.
Power Supply Voltage VBL 22.8 24.0 25.2 VDC
Power Supply Current IBL - 13.13 13.75 A Non Dimming
Input Ripple Noise - - - 500 mV
Oscillating Frequency FW 47 50 53 kHz
Dimming frequency FB 150 160 180 Hz
Minimum Duty Ratio D
- 20 - %
MIN
Note (1) Lamp current is measured by utilizing high frequency current meters as shown below:
Value
Issue Date:Apr.16.2010
Model No.: V562D1-L01
Approval
Unit Note
Unit Note
VBL=22.8V
P-P
Note (2) The lamp starting voltage V
should be applied to the lamp for more than 1 second after startup.
S
Otherwise the lamp may not be turned on.
Note (3) The lamp frequency may produce interference with horizontal synchronous frequency of the display
input signals, and it may result in line flow on the display. In order to avoid interference, the lamp
frequency should be detached from the horizontal synchronous frequency and its harmonics as far
as possible.
Note (4) The life time of a lamp is defined as when the brightness is larger than 50% of its original value and
the effective discharge length is longer than 80% of its original length (Effective discharge length is
defined as an area that has equal to or more than 70% brightness compared to the brightness at
the center point of lamp.) as the time in which it continues to operate under the condition at Ta = 25
Ʋ2ɗ and I
Note (5) The power supply capacity should be higher than the total inverter power consumption P
= 5.5 ~ 6.5mA rms.
L
. Since
BL
the pulse width modulation (PWM) mode was applied for backlight dimming, the driving current
changed as PWM duty on and off. The transient response of power supply should be considered
for the changing loading when inverter dimming.
Note (6) The measurement condition of Max. value is based on 56" backlight unit under input voltage 24V,
average lamp current 6.3 mA and lighting 30 minutes later.
Note (7) The voltage difference of power supply voltage (V
) between Master and Slave board could not
BL
over 1V.
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Issue Date:Apr.16.2010
Model No.: V562D1-L01
Approval
Inverter
(Master)
a
1
2
a
a
1
2
a
a
1
2
a
a
1
2
a
a
1
2
a
a
1
2
a
a
1
2
a
a
1
2
a
HV (White -)
HV(Blue -)
HV (White +)
HV(Blue +)
HV (White -)
HV(Blue -)
HV (White +)
HV(Blue +)
HV (White -)
HV(Blue -)
HV (White +)
HV(Blue +)
HV (White -)
HV(Blue -)
HV (White +)
HV(Blue +)
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
A
b
1
2
A
b
1
A
b
2
A
b
1
A
b
2
A
b
A
b
1
2
A
b
A
b
1
A
b
2
A
b
1
A
b
2
1
A
b
2
A
b
A
b
1
2
A
b
Inverter
(Slave 2)
Inverter
(Slave 1)
LCD Module
a
1
2
a
1
a
2
a
1
a
2
a
a
1
2
a
a
1
2
a
a
1
2
a
a
1
2
a
1
a
2
a
HV (White -)
HV(Blue -)
HV (White +)
HV(Blue +)
HV (White -)
HV(Blue -)
HV (White +)
HV(Blue +)
HV (White -)
HV(Blue -)
HV (White +)
HV(Blue +)
HV (White -)
HV(Blue -)
HV (White +)
HV(Blue +)
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
A
b
1
A
b
2
A
b
1
2
A
b
A
b
1
2
A
b
A
b
1
A
b
2
A
b
1
A
b
2
A
b
1
A
b
2
A
b
1
A
b
2
A
b
1
2
A
b
Inverter
(Slave 3)
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4.2.3. INVERTER INTERTFACE CHARACTERISTICS
Parameter Symbol
On/Off Control Voltage
Internal/External PWM
Select Voltage
Internal PWM Control
Voltage
External PWM Control
Voltage
ON
OFF
HI
LO
MAX
MIN
HI
LO 0
V
V
V
V
BLON
SEL
IPWM
EPWM
VBL Rising Time Tr1
VBL Falling Time Tf1
Control Signal Rising Time Tr
Control Signal Falling Time Tf
PWM Signal Rising Time T
PWM Signal Falling Time T
PWMR
PWMF
Input impedance R
PWM Delay Time T
BLON Delay Time
PWM
T
T
on1
BLON Off Time T
V
IN
on
off
Condition
V
SEL
Test
Value
Min. Typ. Max.
2.0
0
2.0
0
炼
炼
炼
炼
3.15 3.3 3.45 V Note (5)
炼
2.0
0
炼
炼
30
30
炼炼
炼炼
SEL
炼
炼
炼
炼
= L
= H
炼
炼
炼炼炼
炼炼炼
炼炼炼
炼炼炼
炼
炼
炼
炼
炼
1
100
300
300
300
炼炼 Mȟ
炼炼
炼炼
炼炼
炼炼
Issue Date:Apr.16.2010
Model No.: V562D1-L01
Unit Note
5.0 V
0.8 V
5.0 V
0.8 V
炼
V minimum duty ratio
5.0 V duty on
0.8 V duty off
ms
ms
100 ms
100 ms
50 us
50 us
mS
ms
ms
ms
Approval
Note (1) The SEL signal should be valid before backlight turns on by BLON signal. It is inhibited to change the
internal/external PWM selection (SEL) during backlight turn on period.
Note (2) The power sequence and control signal timing are shown in the following figure.
Note (3) The power sequence and control signal timing must follow the figure below. For a certain reason, the
inverter has a possibility to be damaged with wrong power sequence and control signal timing.
Note (4) Abnormal operation may occur if these maximum values of control signal are exceeded.
Note (5) The range of VIPWM for dimming brightness should be constrained from 0V to 2.85V (i.e., 2.85V is
the start dimming point) except the Max. value of VIPWM mentioned here is only for the maximum
brightness useful. In other words, 2.85V~3.15V is not suggested for using to prevent from possibly
abnormal phenomenon.
Note (6) While system is turned ON or OFF, the power sequences must follow as below descriptions:
Turn ON sequence: VBL ɦ PWM signal ɦ BLON
Turn OFF sequence: BLOFF ɦ PWM signal ɦ VBL
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V
V
V
BL
V
BLON
V
SEL
EPWM
IPWM
Tr1
0
Ton
Tf1
Toff
2.0V
0
0.8V
Backlight on duration
Tr
Tf
2.0V
0
0
0.8V
2.0V
0.8V
Ext. Dimming Function
T
PWMR
PWM
T
T
PWMF
Int. Dimming Function
3.0V
0
V
W
External
PWM
Period
External
PWM Duty
100%
Minimun
Duty
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)
(
)
)
(
)
)
5. BLOCK DIAGRAM
5.1. TFT LCD MODULE
1_Data0(+/-)
1_Data1(+/-)
1_Data2(+/-)
1_Data3(+/-)
1_Data4(+/-)
1_Data5(+/-)
1_Clock(+/-)
2_Data0(+/-)
2_Data1(+/-)
2_Data2(+/-)
2_Data3(+/-)
2_Data4(+/-)
2_Data5(+/-)
2_Clock(+/-)
CONNECTOR
(74320-1004
Molex
Molex
INPUT
CN6,CN7
CONNECTOR
(74320-1004
INPUT
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FRAME
BUFFER
TIMING
CONTROLLER
DATA DRIVER (RSDS)
SCAN DRIVER
DATA DRIVER(RSDS
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Model No.: V562D1-L01
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SCAN DRIVER
TFT LCD PANEL
(3840x3x2160)
Vcc1
Vcc2
GND
VBL
GND
SEL
E_PWM
I_PWM
BLON
VBL
GND
CN9.
POWER
CONNECTOR
(S20B-PHDSS-B(
LF)(SN)(JST))
INVERTER
CONNECTOR
CN1:S14B-PH-SM4-TB
(D)(LF) or equivalent
(Master)
CN4,CN6: 528521070 (Molex)
INVERTER
CONNECTOR
CN2:S12B-PH-SM4-TB
(D)(LF) or equivalent
(Slave)
DC/DC CONVERTER
& REFERENCE
VOLTAGE
GENERATOR
CN3,CN5: 528521070 (Molex)
CN8-CN23:SM02 (12.0)B-BHS-1-TB(LF)(JST)
or equivalent
BACKLIGHT
UNIT
INVERTER
CONNECTOR
CN2:S12B-PH-SM4-TB
(D)(LF) or equivalent
(Slave)
INVERTER
CONNECTOR
CN2:S12B-PH-SM4-TB
(D)(LF) or equivalent
(Slave)
VBL
GND
VBL
GND
CN5,CN7: 528521070 (Molex)
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6. LCD INPUT TERMINAL PIN ASSIGNMENT
6.1. TFT LCD MODULE DVI INPUT
CN6, CN7 Connector Pin Assignment
Pin Signal Assignment Pin Signal Assignment Pin Signal Assignment
1 T.M.D.S Data2- 9 T.M.D.S Data1- 17 T.M.D.S Data0-
2 T.M.D.S Data2+ 10 T.M.D.S Data1+ 18 T.M.D.S Data0+
3 T.M.D.S Data2/4 shield 11 T.M.D.S Data1/3 shield 19 T.M.D.S Data0/5 shield
4 T.M.D.S Data4- 12 T.M.D.S Data3- 20 T.M.D.S Data5-
5 T.M.D.S Data4+ 13 T.M.D.S Data3+ 21 T.M.D.S Data5+
6 DDC Clock 14 +5V Power 22 T.M.D.S Clock shield
7 DDC Data 15 Ground(for +5V) 23 T.M.D.S Clock+
8 No Connect 16 Hot Plug Detect 24 T.M.D.S Clock-
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C1 No Connect C2 No Connect C3 No Connect
C4 No Connect C5 No Connect
Note (1) CN6, CN7 Connector part no.: 74320-1004 (Molex) or equivalent.
Note (2) The DVI pin assignment is specified in the DVI specification of DDWG.
6.2. TFT LCD MODULE POWER INPUT
CN9 Connector Pin Assignment
Pin No. Symbol Description Note
1 VIN +18.0V power supply
2 VIN +18.0V power supply
3 V5VC +5.0V power supply
4 V5VC +5.0V power supply
5 V5VC +5.0V power supply
6 NC No Connection
7 V5VC +5.0V power supply
8 NC No Connection
9 V5VC +5.0V power supply
10 NC No Connection
11 GND Ground
12 NC No Connection
13 GND Ground
14 NC No Connection
15 GND Ground
16
17 GND Ground
18 GND Ground
19 GND Ground
20 GND Ground
Note (1) CN9 connector part no.: S20B-PHDSS-B(LF)(SN), JST(㖍㛔⡻叿䪗⫸),⽟忂䪗⫸ or equivalent.
ODSEL ODSEL
(3)
Note (2) CN10 is just only for CMO internal testing.
Note (3) ODSEL (Overdrive Lookup Table Selection). The overdrive lookup table should be selected in
accordance to the frame rate to optimize image quality.
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ODSEL Note
L Lookup table was optimized for 60Hz frame rate.
H Lookup table was optimized for 50Hz frame rate.
Note (4) “L” and “H” operation in (3) could follow “CMOS Interface” in Section 4.1.
6.3. BACKLIGHT UNIT
The pin configuration for the housing and the leader wire is shown in the table below.
Pin Name Description Wire Color
1 HV High Voltage Pink
2 HV High Voltage White
Note (1) The backlight interface housing for high voltage side is a model BHR-04VS-1, manufactured by JST and
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CN8-CN23: BHR-04VS-1 (JST).
the mating header on inverter part number is SM02 (12.0) B-BHS-1-TB (LF).
1 HV(White)
2 HV(Pink)
1 HV(White)
2 HV(Pink)
1 HV(White)
2 HV(Pink)
1 HV(Pink)
2 HV(White)
1 HV(Pink)
2 HV(White)
1 HV(Pink)
2 HV(White)
1
˕
2
˕
31
˕
32
˕
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6.4. INVERTER UNIT
CN1 (Master, Header): S14B-PH-SM4-TB (D)(LF)(JST) or equivalent
Pin No. Symbol Description
1
2
3
4
5
6
7
8
9
10
11 SEL
12 E_PWM
13 I_PWM
14 BLON Backlight on/off control
VBL +24V
GND GND
Internal/external PWM selection
High : external dimming
Low : internal dimming
External PWM control signal
E_PWM should be connected to ground when internal PWM was selected
(SEL = Low).
Internal PWM Control Signal
I_PWM should be connected to ground when external PWM was selected
(SEL = High).
power input
DC
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CN2 (Slave, Header): S12B-PH-SM4-TB (D)(LF)(JST) or equivalent
Pin No. Symbol Description
1
2
3
4
5
6
7
8
9
10
11 NC NC
12 NC NC
CN8-CN15 (Master, Header), CN16-CN23 (Slave, Header): SM02 (12.0) B-BHS-1-TB (LF)(JST) or equivalent
Pin No. Symbol Description
1
2
VBL +24V
GND GND
CCFL HOT
CCFL HOT
CCFL high voltage
CCFL high voltage
power input
DC
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CN3-CN4 (Master, Header), CN5-CN7 (Slave, Header): 528521070 (Molex)
Pin No. Symbol Description
1
2 Board to Board
3 Board to Board
4 Board to Board
5 Board to Board
6 Board to Board
7 Board to Board
8 Board to Board
9 Board to Board
10 Board to Board
Note (1) Floating of any control signal is not allowed.
Control
Signal
Board to Board
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6.5. BLOCK DIAGRAM OF IMAGE SIGNAL
The video picture (3840x2160) should be divided into two parts: The left side (1920x2160) and the right side
(1920x2160). Signals of these two parts should be delivered into the module individually through each dual-DVI.
But it must be “synchronous” mutually between signals from these two dual-DVIs. The protocol of DVI is specified
in the DVI specification of DDWG.
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Note (1) The time delay of DE (Data Enable) signal from dual DVI to the other one shall be less than 7 data
clocks.
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6.6. DVI SIGNAL LIST
Signal Name Signal Description Note
T.M.D.S. Signals
T.M.D.S. Clock + & - T.M.D.S. clock differential pair.
T.M.D.S. Clock Shield Shield for T.M.D.S. clock differential pair.
T.M.D.S. Data0 + & - T.M.D.S. link #0 channel #0 differential pair.
T.M.D.S. Data0/5 Shield Shared shield for T.M.D.S. link #0 channel #0 and link #1 channel #2.
T.M.D.S. Data1 + & - T.M.D.S. link #0 channel #1 differential pair.
T.M.D.S. Data2/4 Shield Shared shield for T.M.D.S. link #0 channel #2 and link #1 channel #1.
T.M.D.S. Data2 + & - T.M.D.S. link #0 channel #2 differential pair.
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T.M.D.S. Data1/3 Shield Shared shield for T.M.D.S. link #0 channel #1 and link #1 channel #0.
T.M.D.S. Data3 + & - T.M.D.S. link #1 channel #0 differential pair.
T.M.D.S. Data4 + & - T.M.D.S. link #1 channel #1 differential pair.
T.M.D.S. Data5 + & - T.M.D.S. link #1 channel #2 differential pair.
Control Signals
Hot Plug Detect(HPD)
DDC Data The data line for the DDC interface.
DDC Clock The clock line for the DDC interface
+5V Power
Ground (for +5V)
Analog Signals
Analog Red Analog Red signal.
Analog Green Analog Green signal.
Analog Blue Analog Blue signal.
Analog Horizontal Sync Horizontal synchronization signal for the analog interface.
Signal is driven by monitor to enable the system to identify the
presence of a monitor.
+5 volt signal provided by the system to enable the monitor to provide
EDID data when the monitor circuitry is not powered.
Ground reference for +5 volt power pin. Used as return by Hsync and
Vsync Signals.
(1)
Analog Vertical Sync Vertical synchronization signal for the analog interface.
Analog Ground
Note (1) No using.
Note (2) The DVI signal list is specified in the DVI specification of DDWG.
Common ground for analog signals. Used as a return for analog red,
green and blue signals only.
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6.7. DVI LINK TIMING REQUIREMENTS
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Issue Date:Apr.16.2010
Model No.: V562D1-L01
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ŊůűŶŵġ
ŔŵųŦŢŮŴ
ŕįŎįŅįŔįġ
ōŪůŬ
Ņņ
ŅŢŵŢġı
ŅŢŵŢġIJ
ŅŢŵŢġij
œŦŤŰŷŦųŦťġ
ŔŵųŦŢŮŴ
ŢŤŵŪŷŦġŷŪťŦŰġųŦŨŪŰů ŢŤŵŪŷŦġŷŪťŦŰġųŦŨŪŰů
ŃōŖŜĸĻıŞ
ŵŨůŰųŦť ŵŨůŰųŦť
ňœŏŜĸĻıŞ
œņŅŜĸĻıŞ
ŵŨůŰųŦť
ŦůŤŰťŦťġŃōŖ
ŦůŤŰťŦťġňœŏ
ŦůŤŰťŦťġœņŅ
Ņņ
ŃōŖŜĸĻıŞ
ŤŰůŴŵŢůŵġʼnŔŚŏńĭŗŔŚŏń ŤŰůŴŵŢůŵġʼnŔŚŏńĭŗŔŚŏń
ŪůŢŤŵŪŷŦİţŭŢůťġųŦŨŪŰů
t
B
ŵŨůŰųŦť
ʼnŔŚŏńĭŗŔŚŏń
ŵŨůŰųŦť
ńŕōıĭńŕōIJ
ŵŨůŰųŦť
ńŕōijĭńŕōĴ
t
E
ŦůŤŰťŦťġʼnŔŚŏńĭŗŔŚŏń
ŦůŤŰťŦťġńŕōıĭńŕōIJ
ŦůŤŰťŦťġńŕōıĭńŕōIJ
t
E
ŪůŷŢŭŪť
ʼnŔŚŏńĭŗŔŚŏń
ŃōŖŜĸĻıŞ
ňœŏŜĸĻıŞ
ŵŨůŰųŦťŵŨůŰųŦť
œņŅŜĸĻıŞ
ŵŨůŰųŦť
t
E
ŦůŤŰťŦťġŃōŖ
ŦůŤŰťŦťġňœŏ
ŦůŤŰťŦťġœņŅ
t
E
t
B
ŢŤŵŪŷŦġŷŪťŦŰġųŦŨŪŰů
ŃōŖŜĸĻıŞ
ňœŏŜĸĻıŞ
œņŅŜĸĻıŞ
ŤŰůŴŵŢůŵġńŕōijĭńŕōĴ
ŪůŷŢŭŪť
ńŕōıĭńŕōIJ
ŪůŷŢŭŪť
ńŕōijĭńŕōĴ
ňœŏŜĸĻıŞ
ŤŰůŴŵŢůŵġńŕōıĭńŕōIJŤŰůŴŵŢůŵġńŕōıĭńŕōIJ
œņŅŜĸĻıŞ
ŤŰůŴŵŢůŵġńŕōijĭńŕōĴ
Symbol Description Value Unit
t
Minimum duration blanking period required to ensure character
B
boundary recovery at the receiver. Blanking periods of this
128
T
pixel
duration must occur at least once every 50mS (20Hz).
t
E
Maximum encoding/serializer pipeline delay.
t
Maximum recovery/de-serizlizer pipeline delay. Recovery timing
R
includes inter-channel skew, and is measured from the earliest
64
64
T
pixel
T
pixel
DE transition among the data channels.
Note : The DVI link timing requirements are specified in the DVI specification of DDWG.
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7. TIMING REQUIREMENTS OF IMAGE SIGNAL
7.1. INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal (60Hz) Item Symbol Min. Typ. Max. Unit Note
DVI Receiver Clock (Single DVI)
Vertical Active Display Term
(Dual DVI, 1920x 2160 Active Area)
Horizontal Active Display Term
(Dual DVI, 1920x 2160 Active Area)
Signal (50Hz/48Hz) Item Symbol Min. Typ. Max. Unit Note
DVI Receiver Clock (Single DVI)
Vertical Active Display Term
(Dual DVI, 1920x 2160 Active Area)
Horizontal Active Display Term
(Dual DVI, 1920x 2160 Active Area)
Frequency 1/Tc 100 127 127 MH
Frame Rate Fr6 57 60 60 Hz (1)(6)
Total Tv 2164 2164 2300 Th Tv=Tvd+Tvb
Display Tvd - 2160 - Th
Blank Tvb 4 4 140 Th
Total Th 1960 1960 2350 Tc Th=Thd+Thb
Display Thd - 1920 - Tc
Blank Thb 40 40 430 Tc
Frequency 1/Tc 100 127 127 MH
Frame Rate
Total Tv 2164 2330 2330 Th Tv=Tvd+Tvb
Display Tvd - 2160 - Th
Blank Tvb 4 170 170 Th
Total Th 1960 2180 2350 Tc Th=Thd+Thb
Display Thd - 1920 - Tc
Blank Thb 40 260 430 Tc
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Model No.: V562D1-L01
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Z
Z
Fr
5
45 50 53 Hz (2)(6)
Fr48 45 48 51 Hz
(3)
(4)
Signal (30Hz) Item Symbol Min. Typ. Max. Unit Note
DVI Receiver Clock (Single DVI)
Vertical Active Display Term
(Dual DVI, 1920x 2160 Active Area)
Horizontal Active Display Term
(Dual DVI, 1920x 2160 Active Area)
Note (1) (ODSEL) = (L). Please refer to Section 6.2 for detail information.
Note (2) (ODSEL) = (H). Please refer to Section 6.2 for detail information.
Note (3) The value of Typ. is based on 60Hz operation.
Note (4) The value of Typ. is based on 50Hz operation.
Note (5) The value of Typ. is based on 30Hz operation.
Note (6) Overdrive function (ODSEL) is only available while the frame rate is 50Hz or 60Hz.
Note (7) Overdrive function is used to optimize the quality of motion picture.
Frequency 1/Tc 83 83 127 MH
Frame Rate Fr3 30 30 33 Hz
Total Tv TBD 2330 2330 Th Tv=Tvd+Tvb
Display Tvd - 2160 - Th
Blank Tvb TBD 170 170 Th
Total Th TBD 2380 2380 Tc Th=Thd+Thb
Display Thd - 1920 - Tc
Blank Thb TBD 460 460 Tc
Z
(5)
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Model No.: V562D1-L01
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ŃōŖŜĸĻıŞ
ʼnŔŚŏń
ŗŔŚŏń
Ņņ
ňœŏŜĸĻıŞ
œņŅŜĸĻıŞ
ŃōŖijŜĸĻıŞ
ňœŏijŜĸĻıŞ
œņŅijŜĸĻıŞ
ŕįŎįŅįŔįġŵųŢůŴŮŪŵŵŦų
ńŕōı
ńŕōIJ
ńŕōij
ńŕōĴ
ńōŌ
ńŕōĵ
ńŕōĶ
ńŕōķ
ńŕōĸ
ńŕōĹ
ńŕōĺ
ŅŜĸĻıŞ
ńı
ńŊ
Ņņ
ŅŜĸĻıŞ
ńı
ńŊ
Ņņ
ŅŜĸĻıŞ
ńı
ńŊ
Ņņ
ŅŜĸĻıŞ
ńı
ńŊ
Ņņ
ŅŜĸĻıŞ
ńı
ńŊ
Ņņ
ŅŜĸĻıŞ
ńı
ńŊ
Ņņ
ŅŶŢŭġŕįŎįŅįŔįġōŪůŬ
ņůŤŰťŦųİ
ŔŦůųŪŢŭŪŻŦų
ņůŤŰťŦųİ
ŔŦůųŪŢŭŪŻŦų
ņůŤŰťŦųİ
ŔŦůųŪŢŭŪŻŦų
ņůŤŰťŦųİ
ŔŦůųŪŢŭŪŻŦų
ņůŤŰťŦųİ
ŔŦůųŪŢŭŪŻŦų
ņůŤŰťŦųİ
ŔŦůųŪŢŭŪŻŦų
ŅŢŵŢġı
ŅŢŵŢġIJ
ŅŢŵŢġij
ńŭŰŤŬ
ŅŢŵŢġĴ
ŅŢŵŢġĵ
ŅŢŵŢġĶ
ŕįŎįŅįŔįġųŦŤŦŪŷŦų
ŅŜĸĻıŞ
ńı
ńŊ
ŅŦŤŰťŦų
œŦŤŰŷŦųźİ
Ņņ
ŅŜĸĻıŞ
ńı
ńŊ
ŅŦŤŰťŦų
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Ņņ
ŅŜĸĻıŞ
ńı
ńŊ
ŅŦŤŰťŦų
œŦŤŰŷŦųźİ
Ņņ
ŅŜĸĻıŞ
ńı
ńŊ
ŅŦŤŰťŦų
œŦŤŰŷŦųźİ
Ņņ
ŅŜĸĻıŞ
ńı
ńŊ
ŅŦŤŰťŦų
œŦŤŰŷŦųźİ
Ņņ
ŅŜĸĻıŞ
ńı
ńŊ
ŅŦŤŰťŦų
œŦŤŰŷŦųźİ
Ņņ
ŃōŖŜĸĻıŞ
ʼnŔŚŏń
ŗŔŚŏń
Ņņı
ňœŏŜĸĻıŞ
ńŕōı
ńŕōIJ
ŅņIJ
œņŅŜĸĻıŞ
ńŕōij
ńŕōĴ
Ņņij
ŃōŖijŜĸĻıŞ
ńŕōĵ
ńŕōĶ
ŅņĴ
ňœŏijŜĸĻıŞ
ńŕōķ
ńŕōĸ
Ņņĵ
œņŅijŜĸĻıŞ
ńŕōĹ
ńŕōĺ
ŅņĶ
œŦŤŰŷŦųŦťġ
ŔŵųŦŢŮŴ
ŃōŖŜĸĻıŞ
ʼnŔŚŏń
ŗŔŚŏń
ňœŏŜĸĻıŞ
ńŕōı
ńŕōIJ
œņŅŜĸĻıŞ
ńŕōij
ńŕōĴ
ńōŌ
ŃōŖijŜĸĻıŞ
ńŕōĵ
ńŕōĶ
ňœŏijŜĸĻıŞ
ńŕōķ
ńŕōĸ
œņŅijŜĸĻıŞ
ńŕōĹ
ńŕōĺ
Note: The dual link T.M.D.S. channel map is specified in the DVI specification of DDWG.
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Issue Date:Apr.16.2010
Model No.: V562D1-L01
7.2. EXTENDED DISPLAY IDENTIFICATION DADA (EDID) STRUCTURE
Address
00h 8 Bytes Header 1Ch 1 Red -y
00h 1 00h 1Dh 1 Green -x
01h 1 FFh 1Eh 1 Green -y
02h 1 FFh 1Fh 1 Blue -x
03h 1 FFh 20h 1 Blue -y
04h 1 FFh 21h 1 White -x
05h 1 FFh 22h 1 White -y
06h 1 FFh 23h 3 Bytes Established Timings
07h 1 00h 23h 1 Established Timings 1
08h 10 Bytes Vender/Product Identification 24h 1 Established Timings 2
08h 2 ID Manufacturer Name 25h 1 Manufacturers Reserved Timings
0Ah 2 ID Product Code 26h 16 Bytes Standard Timing Identification
0Ch 4 ID Serial Number 26h 2 Standard Timing Identification #1
10h 1 Week of Manufacture 28h 2 Standard Timing Identification #2
11h 1 Year of Manufacture 2Ah 2 Standard Timing Identification #3
12h 2 Bytes EDID Structure Version/Revision 2Ch 2 Standard Timing Identification #4
12h 1 Version # 2Eh 2 Standard Timing Identification #5
13h 1 Revision # 30h 2 Standard Timing Identification #6
14h 5 Bytes
14h 1 Video Input Definition 34h 2 Standard Timing Identification #8
15h 1 Max.Horizontal Image Size 36h 72 Bytes Detailed Timing Descriptions
16h 1 Max.Vertical Image Size 36h 18
17h 1
18h 1 Feature Support 5Ah 18
19h 10 Bytes Color Characteristics 6Ch 18
19h 1 Red / Green Low Bits 7Eh 1 Byte Extension Flag
1Ah 1 Blue / White Low Bits 7Fh 1 Byte Checksum
1Bh 1 Red -x
Noteġ: The EDID structure is specified in the EDID standard of VESA.
No.
bytes
Description Address
Basic Display Parameters/Features32h 2 Standard Timing Identification #7
Display Transfer Characteristic
(Gamma)
48h 18
No.
bytes
Description
Detailed Timing Description #1 or
Monitor Descriptor.
Detailed Timing Description #2 or
Monitor Descriptor.
Detailed Timing Description #3 or
Monitor Descriptor.
Detailed Timing Description #4 or
Monitor Descriptor.
Approval
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7.3. EXTENDED DISPLAY IDENTIFICATION DADA (EDID) CODE
ADDR 0 1 2 3 4 5 6 7 8 9 A B C D E F
000000 00 FF FF FF FF FF FF 00 0D AF 06 05 00 00 00 00
000010 31 0F 01 03 80 34 21 78 EE EE 50 A3 54 4C 9B 26
000020 0F 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
000030 01 01 01 01 01 01 35 63 80 04 71 70 AA 80 0D 0D
000040 8A 00 54 30 34 00 00 18 69 63 80 28 70 70 04 80
000050 10 10 11 00 54 30 34 00 00 18 3D 5F 80 04 71 70
000060 AA 80 0D 0D 8A 00 54 30 34 00 00 18 FC 40 80 CC
000070 71 70 AA 80 0D 0D 8A 00 54 30 34 00 00 18 00 A1
Note:ġThe EDID code implies 30Hz, 48Hz, 50Hz and 60Hz.
Issue Date:Apr.16.2010
Model No.: V562D1-L01
Approval
Note:ġThe EDID in this approval spec is for panels after (including) C2 version.
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7.4. POWER ON/OFF SEQUENCE
To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be followed as the
diagram below.
őŰŸŦųġŔŶűűŭź
őŰŸŦųġŔŶűűŭź
őŰŸŦųġŔŶűűŭźőŰŸŦųġŔŶűűŭź
ŗŤŤIJĭġŗŤŤij
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ıįĺŗŤŤIJ
Issue Date:Apr.16.2010
Model No.: V562D1-L01
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ıįĺŗŤŤIJ
ıįĶʀŕIJʀIJıŮŴĩŗŤŤIJĪ
ıįĶʀŕĸʀIJıŮŴĩŗŤŤijĪ
ıʀŕĹʀĶıŮŴ
ıʀŕijʀĶıŮŴ
ıʀŕĴʀĶıŮŴ
ĶııŮŴʀŕĵ
ŔŪŨůŢŭŴ
ŔŪŨůŢŭŴ
ŔŪŨůŢŭŴŔŪŨůŢŭŴ
ŃŢŤŬŭŪŨũŵġĩœŦŤŰŮŮŦůťŦťĪ
ĶııŮŴʀŕĶ
IJııŮŴʀŕķ
ıŗ
ıŗ
ıŗ
ıįIJŗŤŤIJ
ŕIJ
ŕIJ
ŕIJŕIJ
ıįĺŗŤŤij
ıįIJŗŤŤij
ŕĹ
ŕĹ
ŕĹŕĹ
ŕĸ
ŕĸ
ŕĸŕĸ
ŕij
ŕij
ŕijŕij
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ŕĴ
ŕĴ
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ŗłōŊŅ
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ĶıĦ ĶıĦ
ŕĶ
ŕĶ ŕķ
ŕĶŕĶ
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őŰŸŦųġŐŏİŐŇŇġŔŦŲŶŦůŤŦőŰŸŦųġŐŏİŐŇŇġŔŦŲŶŦůŤŦ
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Note (1) The supplied voltage of the external system for the module input should follow the definition of Vcc1,2.
Note (2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD
operation or the LCD turns off before the backlight turns off, the display may momentarily become
abnormal screen.
Note (3) T4 should be measured after the module being fully discharged between power off and on period.
Note (4) Interface signal shall not be kept at high impedance when the power is on.
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8. OPTICAL CHARACTERISTICS
8.1. TEST CONDITIONS
Item Symbol Value Unit
Ambient Temperature Ta
Ambient Humidity Ha
Supply Voltage VCC 5.0 V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
Lamp Current I
Oscillating Frequency (Inverter) F
Frame Rate Fr 60 Hz
8.2. OPTICAL SPECIFICATIONS
The relative measurement methods of optical characteristics are shown in 8.2 Notes. The following items
should be measured under the test conditions described in 8.1 and stable environment shown in Note (6).
Item Symbol Condition Min. Typ. Max. Unit Note
Contrast Ratio CR
Response Time
Center Luminance of White L
Average Luminance of White
White Variation
Cross Talk CT 2 % Note (5)
Red
Green
Color
Chromaticity
Blue
White
Color Gamut C.G 72 75 % NTSC
Viewing
Angle
Horizontal
Vertical
Gray to
gray
L
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o
25r2
50r10
L
L
6.0r0.5
50r3
900 1200 - Note (2)
6.5 ms Note (3)
C
400 450 cd/m2Note (4)
AVE
GW
T
=0q, TY =0q
x
Rx
Ry
Viewing angle at
normal direction
Gx
Gy
Bx
By
Wx
Wy
T
+
x
Tx-
T
+
Y
CRt30
TY-
400 450 cd/m2Note (4)
1.6 - Note (7)
0.651
0.332
0.269
Typ.
-0.03
0.593
0.144
Typ.
+0.03
0.060
0.285
0.293
80 88
80 88
80 88
80 88
C
%RH
mA
KHz
-
-
-
-
-
-
-
-
Deg. Note (1)
Note (6)
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Note (1) Definition of Viewing Angle (Tx, Ty):
Viewing angles are measured by Eldim EZ-Contrast 160R
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Issue Date:Apr.16.2010
Model No.: V562D1-L01
Approval
Normal
Tx = Ty = 0º
Ty- Ty
TX- = 90º
6 o’clock
y-
= 90º
T
x-
y-
Note (2) Definition of Contrast Ratio (CR):
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L255 / L0
L255: Luminance of gray level 255
L 0: Luminance of gray level 0
CR = CR (7), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note
(7).
Tx
Tx
y+
12 o’clock direction
y+
= 90º
T
x+
TX+ = 90º
Note (3) Definition of Gray to Gray Switching Time:
100%
90%
Optical
Response
10%
0%
Gray to gray
switching time
Gray to gray
switching time
Time
Time
The driving signal means the signal of gray level 0, 31, 63, 95, 127, 159, 191, 223, and 255.Gray to gray.
Average time means the average switching time of gray level 0, 31, 63, 95, 127, 159, 191, 223, and 255
to each other.
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(
)
(
)
(
)
Note (4) Definition of Luminance of White (LC, LAVE):
Measure the luminance of gray level 255 at center point and 5 points
LC = L (7)
LAVE = [L (4)+ L (5)+ L (7)+ L (9)+ L (10)] / 5
Where L (x) is corresponding to the luminance of the point X at the figure in Note (7).
Note (5) Definition of Cross Talk (CT):
CT = | YB – YA | / YA u 100 (%)
Where:
YA = Luminance of measured location without gray level 255 pattern (cd/m2)
YB = Luminance of measured location with gray level 255 pattern (cd/m2)
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Y
(D/8,W/2)
A, L
Y
(D/2,7W/8)
A, D
(0, 0)
Active Area
Gray 128
Y
Y
D,W
A, U
A, R
(D/2,W/8)
(7D/8,W/2)
(D/4,W/4)
Y
(D/8,W/2)
B, L
Y
(D/2,7W/8)
B, D
0, 0
Active Area
Gray 255
Gray 0
Gray 128
Y
(D/2,W/8)
B, U
Y
(7D/8,W/2)
B, R
(3D/4,3W/4)
D,W
Note (6) Measurement Setup:
The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature
change during measuring. In order to stabilize the luminance, the measurement should be executed
after lighting backlight for 1 hour in a windless room.
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Note (7) Definition of White Variation (GW):
Measure the luminance of gray level 128 at 13 points
GW = Maximum [L (1), L (2), L (3), L (4),ˣˣˣ, L (13)] / Minimum [L (1), L (2), L (3), L (4),ˣˣˣ, L (13)]
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D
W/10
3W/10
W
5W/10
Vertical Line
7W/10
9W/10
D/10 9D/10
1
6
11
3D/10 5D/10 7D/10
2
4
7
9
12
5
10
3
8
13
Active Area
X
: Test Point
X=1 to 13
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9. PRECAUTIONS
9.1. ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the module during assembly.
(2) It is recommended to assemble or to install a module into the user’s system in clean working areas. The dust
and oil may cause electrical short or worsen the polarizer.
(3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and Backlight.
(4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the
damage and latch-up of the CMOS LSI chips.
(5) Do not plug in or pull out the I/F connector while the module is in operation.
(6) Do not disassemble the module.
(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and easily
scratched.
Issue Date:Apr.16.2010
Model No.: V562D1-L01
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(8) Moisture can easily penetrate into LCD module and may cause the damage during operation.
(9) When storing modules as spares for a long time, the following precaution is necessary.
a. Do not leave the module in high temperature, and high humidity for a long time.It is highly
recommended to store the module with temperature from 0 to 35 ɗ at normal humidity without
condensation.
b. The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or
fluorescent light.
(10) When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the
response time will become slow, and the starting voltage of CCFL will be higher than that of room
temperature.
9.2. SAFETY PRECAUTIONS
(1) The startup voltage of a Backlight is approximately 1000 Volts. It may cause an electrical shock while
assembling with the inverter. Do not disassemble the module or insert anything into the Backlight unit.
(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In case of
contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
(3) After the module’s end of life, it is not harmful in case of normal operation and storage.
9.3. SAFETY STANDARDS
The LCD module should be certified with safety regulations as follows:
(1) UL60950-1 or updated standard.
(2) IEC60950-1 or updated standard.
(3) UL60065 or updated standard.
(4) IEC60065 or updated standard.
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10. DEFINITION OF LABELS
10.1. CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
V562D1 -L01 Rev. XX
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Issue Date:Apr.16.2010
Model No.: V562D1-L01
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CHI MEI
OPTOELECTRONICS
(a) Model Name: V562D1-L01
(b) Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.
(c) Serial ID: X X
Serial ID includes the information as below:
X X X X X Y M D L N N N N
X X X X X X X Y M D L N N N N
Serial No.
Product Line
Year, Month, Date
CMO Internal Use
CMO Internal Use
Revision
CMO Internal Use
RoHS GEMN
(a) Manufactured Date: Year: 0~9, for 2000~2009
Month: 1~9, A~C, for Jan. ~ Dec.
st
Day: 1~9, A~Y, for 1
(b) Revision Code: Cover all the change
(c) Serial No.: Manufacturing sequence of product
(d) Product Line: 1 -> Line1, 2 -> Line 2, …etc.
to 31st, exclude I ,O, and U.
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10.2. WARRANTY LABEL
Warranty labels are pasted on the rear of the BLU. This warranty label is defined to recognized if the module
ever disassembled or not. If the module was dismounted, then it will be out of warranty. When remove the
warranty label, there are prints will remain on the surface of the BLU.If the label was removed or it has the
imprint by tearing, it will be treated as disassembled.
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11. PACKAGE
11.1. PACKING SPECIFICATIONS
(1) 2 LCD TV modules / 1 Box
(2) Box dimensions: 1448(L) X 372 (W) X 901 (H)
(3) Weight: approximately 56Kg (2 modules per box)
(4) One protective film is attached on the LCD TV
11.2. PACKING METHOD
Figures 11-1 and 11-2 are the packing method
LCD TV Module
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Cushion(Bottom)
Anti-static Bag
Carton
Carton Label
4pcs Joint
Figure.11-1 packing method
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Sea / Land Transportation
B
(40ft / 40ft HQ Container)
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B
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Model No.: V562D1-L01
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Figure.11-2 Packing method
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12. MECHANICAL CHARACTERISTIC
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⣯伶暣⫸偉ấ㚱旸℔⎠
%*+/'+
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%*+/'+
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%*+/'+
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%*+/'+
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