CMO V470H2-LE1 Specification

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TFT LCD Preliminary Specification

MODEL NO.: V470H2 – LE1

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Issue Date:Sep.10,2009

Model No.: V470H2-LE1

Preliminary

TV Head Division

Approved By

Chao-Chun Chung

Reviewed By

QA Dept. Product Development Div.

Hsin-nan Chen WT Lin

Prepared By

LCD TV Marketing and Product Management Div.

CY Chang HT Hung

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CONTENTS

REVISION HISTORY.................................................................................................................................................4

1. GENERAL DESCRIPTION....................................................................................................................................5

1.1 OVERVIEW....................................................................................................................................................5

1.2 FEATURES ....................................................................................................................................................5

1.3 APPLICATION................................................................................................................................................5

1.4 GENERAL SPECIFICATIONS ........................................................................................................................5

1.5 MECHANICAL SPECIFICATION.....................................................................................................................6

2. ABSOLUTE MAXIMUM RATINGS ........................................................................................................................7

2.1 ABSOLUTE RATINGS OF ENVIRONMENT....................................................................................................7

2.2 PACKAGE STORAGE....................................................................................................................................8

2.3 ELECTRICAL ABSOLUTE RATINGS..............................................................................................................8

2.3.1 TFT LCD MODULE...............................................................................................................................8

2.3.2 BACKLIGHT CONVERTER UNIT .........................................................................................................8

3. ELECTRICAL CHARACTERISTICS......................................................................................................................9

3.1 TFT LCD MODULE.........................................................................................................................................9

3.2 BACKLIGHT UNIT........................................................................................................................................ 11

3.2.1 LED LIGHT BAR CHARACTERISTICS (Ta=25± 2 ºC) ........................................................................11

3.2.2 CONVERTER CHARACTERISTICS ................................................................................................... 11

3.2.3 CONVERTER INTERFACE CHARACTERISTICS...............................................................................12

4. BLOCK DIAGRAM OF INTERFACE ...................................................................................................................14

4.1 TFT LCD MODULE.......................................................................................................................................14

5. INPUT TERMINAL PIN ASSIGNMENT................................................................................................................15

5.1 TFT LCD Module Input .................................................................................................................................15

5.2 BACKLIGHT UNIT........................................................................................................................................ 18

5.3 CONVERTER UNIT......................................................................................................................................19

5.4 BLOCK DIAGRAM OF INTERFACE .............................................................................................................20

5.5 LVDS INTERFACE ....................................................................................................................................... 22

5.6 COLOR DATA INPUT ASSIGNMENT............................................................................................................23

6. INTERFACE TIMING...........................................................................................................................................24

6.1 INPUT SIGNAL TIMING SPECIFICATIONS..................................................................................................24

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6.2 POWER ON/OFF SEQUENCE .....................................................................................................................26

7. OPTICAL CHARACTERISTICS ..........................................................................................................................27

7.1 TEST CONDITIONS..................................................................................................................................... 27

7.2 OPTICAL SPECIFICATIONS........................................................................................................................28

8. PRECAUTIONS ..................................................................................................................................................31

8.1 ASSEMBLY AND HANDLING PRECAUTIONS .............................................................................................31

8.2 SAFETY PRECAUTIONS ............................................................................................................................. 31

8.3 SAFETY STANDARDS................................................................................................................................. 31

9. DEFINITION OF LABELS ...................................................................................................................................32

9.1 CMO MODULE LABEL.................................................................................................................................32

10. PACKAGING.....................................................................................................................................................33

11. MECHANICAL CHARACTERISTICS ................................................................................................................35

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REVISION HISTORY

Version Date

Ver. 1.0

Spe. 10.09

Page (New)

All

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Section Description

All

The Preliminary Specification was first issued.

Issue Date:Sep.10,2009

Model No.: V470H2-LE1

Preliminary

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1. GENERAL DESCRIPTION

1.1 OVERVIEW

V470H2-LE1 is a 47” TFT Liquid Crystal Display module with 6pcs LED Light Bar Backlight unit and 4ch-LVDS

interface. This module supports 1920 x 1080 Full HDTV format and can display true 1.07G colors (8-bit+FRC

/color). The converter module for backlight is built-in.

1.2 FEATURES

Ё

High brightness (450 nits)

Ё

High contrast ratio (4000:1)

Ё

Fast response time (Gray to gray average 4.5 ms)

Ё

High color saturation (NTSC 72%)

Ё

Full HDTV (1920 x 1080 pixels) resolution, true HDTV format

Ё

DE (Data Enable) only mode

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Ё

LVDS (Low Voltage Differential Signaling) interface

Ё

Optimized response time for 100/120 Hz frame rate

Ё

Ultra wide viewing angle : Super MVA technology

Ё

RoHS compliance

1.3 APPLICATION

Ё

Standard Living Room TVs.

Ё

Public Display Application.

Ё

Home Theater Application.

Ё

MFM Application.

1.4 GENERAL SPECIFICATIONS

Item Specification Unit Note Active Area 1039.68 (H) x 584.82 (V) (47” diagonal) mm Bezel Opening Area 1049 (H) x 593 (V) mm Driver Element a-si TFT active matrix - Pixel Number 1920 x R.G.B. x 1080 pixel Pixel Pitch (Sub Pixel) 0.1805 (H) x 0.5415 (V) mm Pixel Arrangement RGB vertical stripe - Display Colors 1.07G color Display Operation Mode Transmissive mode / Normally Black -

Surface Treatment

Anti-Glare Coating (Haze 11%)

Hard Coating (3H)

(1)

- (2)

Note (1) Please refer to the attached drawings in chapter 9 for more information about the front and back outlines.

Note (2) The spec. of the surface treatment is temporarily for this phase. CMO reserves the rights to change this

feature.

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1.5 MECHANICAL SPECIFICATION

1.5 MECHANICAL SPECIFICATIONS Item Min. Typ. Max. Unit Note

Horizontal(H) - 1096 - mm Vertical(V) - 640 - mm

Module Size

Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.

Depth(D) 12.1 mm To Rear Depth(D)

Weight (10933) mm

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26.9

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(1)

mm To converter

cover

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2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

Item Symbol

Storage Temperature TST -20 +60 ºC (1)

Operating Ambient Temperature TOP 0 50 ºC (1), (2)

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Value

Unit Note

Min. Max.

X,Y

Shock (Non-Operating) SNOP

Vibration (Non-Operating) VNOP - 1.0 G (4), (5)

Note (1) Temperature and relative humidity range is shown in the figure below.

(a) 90 %RH Max. (Ta

(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).

(c) No condensation.

Note (2) The maximum operating temperature is based on the test condition that the surface temperature of

display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.

Thermal management should be considered in final product design to prevent the surface temperature of

display area from being over 65 ºC. The range of operating temperature may degrade in case of

improper thermal management in final product design.

Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.

Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.

Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that

the module would not be twisted or bent by the fixture.

Љ

40 ºC).

axis

Z axis 35 G (3), (5)

- 35 G (3), (5)

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2.2 PACKAGE STORAGE

When storing modules as spares for a long time, the following precaution is necessary.

(a) Do not leave the module in high temperature, and high humidity for a long time, It is highly recommended to

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store the module with temperature from 0 to 35

(b) The module shall be stroed in dark place. Do not store the TFT-LCD module in direct sunlight or fluorescent

light.

к

at normal humidity without condensation.

2.3 ELECTRICAL ABSOLUTE RATINGS

2.3.1 TFT LCD MODULE

Value

Item Symbol

Power Supply Voltage VCC -0.3 13.5 V

Logic Input Voltage VIN -0.3 3.6 V

2.3.2 BACKLIGHT CONVERTER UNIT

Item Symbol

Light Bar Voltage VW

Min. Max.

Value

Min. Max.

Ё

60 VRMS

Unit Note

(1)

Unit Note

Converter Input Voltage VBL 0 30 V (1)

Ё

Control Signal Level

Note (1) Permanent damage to the device may occur if maximum value s are exceeded. Function operation

should be restricted to the conditions described under Normal Operating Conditions.

Note (2) No moisture condensation or freezing.

Note (3) The control signals include On/Off Contro.l Internal PWM Control and External PWM Control.

-0.3 7 V (1), (3)

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3. ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE

(Ta = 25 ± 2 ºC)

Parameter Symbol

Power Supply Voltage VCC 10.8 12 13.2 V (1)

Power Supply Ripple Voltage VRP - - 350 mV

Rush Current IRUSH - - 4.914 A (2)

White Pattern - - 0.71 - A

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Value

Unit Note

Min. Typ. Max.

Power Supply Current

LVDS interface

CMOS interface

Note (1) The module should be always operated within the above ranges.

Note (2) Measurement condition:

Common Input Voltage VLVC 1.125 1.25 1.375 V

Terminating Resistor RT - 100 - ohm

Input High Threshold Voltage VIH 2.7 - 3.3 V

Input Low Threshold Voltage VIL 0 - 0.7 V

Vertical Stripe

Black Pattern - - 0.68 - A

-

- 1.35 1.755 A

(3)

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Note (3) The specified power supply current is under the conditions at Vcc = 12 V, Ta = 25 ± 2 ºC, fv = 120 Hz,

whereas a power dissipation check pattern below is displayed.

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a. White Pattern

Active Area

c. Vertical Stripe Pattern

b. Black Pattern

Active Area

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3.2 BACKLIGHT UNIT

3.2.1 LED LIGHT BAR CHARACTERISTICS (Ta=25± 2 ºC)

Parameter Symbol

Light Bar Voltage VW

LED Forward Voltage Vf

LED Current IL

3.2.2 CONVERTER CHARACTERISTICS

(Ta = 25 ± 2 ºC)

Parameter Symbol

Min. Typ. Max.

- - 54.4

3.0 3.2 3.4

56.4 60 63.6

Min. Typ. Max.

Value

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Model No.: V470H2-LE1

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Unit Note

V V IL =60.0mA

mA

Unit Note

Power Consumption PBL - 144 158 W IL =60mA

Power Supply Voltage VBL 22.8 24.0 25.2 VDC

Power Supply Current IBL - 6 - A Non Dimming

Input Ripple Noise - - - 912 mVP-P VBL=22.8V

Dimming Frequency FB 150 160 170 Hz

Minimum Duty Ratio DMIN - 5 - %

Note (1) The measurement condition of Max. value is based on 47" backlight unit under input voltage 24V,

average LED current 60 mA and lighting 30 minutes later.

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3.2.3 CONVERTER INTERFACE CHARACTERISTICS

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Parameter Symbol

ON

On/Off Control Voltage

VBLON

OFF

Internal PWM Control Voltage

External PWM Control Voltage

MAX

MIN

HI

LO

VIPWM

VEPWM

HI

Status Signal

Status

LO

VBL Rising Time Tr1

VBL Falling Time Tf1

Control Signal Rising Time Tr

Te st

Condition

Ё

Value

Unit Note

Min. Typ. Max.

Ё

2.0

5.0 V

Ё

0

0.8 V

2.85 3.0 3.15 V maximum duty ratio

Ё

0

2.0

0

Ё

3.0 3.3 3.6 V

0

30

Ё

5.0 V

0.8 V

Ё

100 ms

V minimum duty ratio

Duty on

Duty off

Normal

Abnormal

ms

10%-90%V

BL

ms

Control Signal Falling Time Tf

PWM Signal Rising Time TPWMR

PWM Signal Falling Time TPWMF

Input Impedance Rin

PWM Delay Time TPWM

T

on

Ё

1

100

300

Ё

100 ms

Ё

50 us

Ё

50 us

Ё

MΩ

ms

BLON Delay Time

T

on1

BLON Off Time Toff

Ё

300

Ё

ms

Ё

ms

Ё

Note (1) The Dimming signal should be valid before backlight turns on by BLON signal. It is inhibited to

change the internal/external PWM signal during backlight turn on period.

Note (2) The power sequence and control signal timing are shown in the following figure. For a certain

reason, the inverter has a possibility to be damaged with wrong power sequence and control

signal timing.

Note (3) While system is turned ON or OFF, the power sequences must follow as below descriptions:

Turn ON sequence: VBL

Turn OFF sequence: BLOFF

Ш

PWM signal Ш BLON

Ш

PWM signal Ш VBL

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V

BL

V

BLON

EPWM

IPWM

9

Toff

%/

Tf1

9

%/

Tr1

9

%/

9

%/

2.0V

0.8V

Ton

Ton1

0

Backlight on duration

Tr

Tf

Ext. Dimming Function

T

PWMR

2.0V

0

0.8V

T

PWM

T

PWMF

Floating

3.3V

0

Floating

Int. Dimming Function

V

W

External

PWM

Period

External

PWM Duty

100%

Minimun

Duty

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4. BLOCK DIAGRAM OF INTERFACE

4.1 TFT LCD MODULE

CNF1 : FI-RE41S-HF(JAE)

DRX0(+/-)

DRX1(+/-)

DRX2(+/-)

DRX3(+/-)

DRX4(+/-)

DCLK(+/-)

CRX0(+/-)

CRX1(+/-)

CRX2(+/-)

CRX3(+/-)

CRX4(+/-)

CCLK(+/-)

INPUT CONNECTOR

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FRAME

BUFFER

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SCAN DRIVER

TFT LCD PANEL

1920 X 3 X 1080

BRX0( +/-)

BRX1( +/-)

BRX2( +/-)

BRX3( +/-)

BRX4( +/-)

BCLK( +/-)

ARX0( +/-)

ARX1( +/-)

ARX2( +/-)

ARX3( +/-)

ARX4( +/-)

ACLK( +/-)

SELLVDS

Vcc

GND

CNF2 : FI-RE51S-HF(JAE)

INPUT CONNECTOR

TIMING

CONTROLLER

DATA DRIVER(RSDS)

DC/DC CONVERTER &

REFERENCE

VOLTAGE

GENERATOR

CONVERTER CONNECTOR

CN1: CI0114M1HR0-LF

(CvilLux) or equivalent

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5. INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD Module Input

CNF1 Connector Pin Assignment (FI-RE51S-HF(JAE) or equivalent)

Pin Name Description Note

1 GND Ground 2 N.C. No Connection 3 N.C. No Connection 4 N.C. No Connection 5 N.C. No Connection 6 N.C. No Connection 7 N.C. No Connection 8 N.C. No Connection

9 GND Ground 10 CH3_0N Third Pixel 11 CH3_0P Third Pixel 12 CH3_1N Third Pixel 13 CH3_1P Third Pixel 14 CH3_2N Third Pixel 15 CH3_2P Third Pixel 16 GND Ground 17 CH3_CLKN 18 CH3_CLKP 19 GND Ground 20 CH3_3N Third Pixel 21 CH3_3P Third Pixel 22 CH3_4N Third Pixel 23 CH3_4P Third Pixel 24 N.C. No Connection 25 N.C. No Connection 26 CH4_0N Fourth Pixel 27 CH4_0P Fourth Pixel 28 CH4_1N Fourth Pixel 29 CH4_1P Fourth Pixel 30 CH4_2N Fourth Pixel 31 CH4_2P Fourth Pixel 32 GND Ground 33 CH4_CLKN 34 CH4_CLKP 35 GND Ground 36 CH4_3N Fourth Pixel 37 CH4_3P Fourth Pixel 38 CH4_4N Fourth Pixel 39 CH4_4P Fourth Pixel 40 N.C. No Connection 41 N.C. No Connection

Third Pixel Negative LVDS differential clock input. Third Pixel Positive LVDS differential clock input.

Fourth Pixel Negative LVDS differential clock input. Fourth Pixel Positive LVDS differential clock input.

Negative LVDS differential data input. Channel 0 Positive LVDS differential data input. Channel 0 Negative LVDS differential data input. Channel 1 Positive LVDS differential data input. Channel 1 Negative LVDS differential data input. Channel 2 Positive LVDS differential data input. Channel 2

Negative LVDS differential data input. Channel 3 Positive LVDS differential data input. Channel 3 Negative LVDS differential data input. Channel 4 Positive LVDS differential data input. Channel 4

Negative LVDS differential data input. Channel 0 Positive LVDS differential data input. Channel 0 Negative LVDS differential data input. Channel 1 Positive LVDS differential data input. Channel 1 Negative LVDS differential data input. Channel 2 Positive LVDS differential data input. Channel 2

Negative LVDS differential data input. Channel 3 Positive LVDS differential data input. Channel 3 Negative LVDS differential data input. Channel 4 Positive LVDS differential data input. Channel 4

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(1)

(4)

(1)

(4)

(1)

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CNF2 Connector Pin Assignment (FI-RE51S-HF (JAE) or equivalent )

Pin Name Description Note

1 N.C. No Connection 2 N.C. No Connection 3 N.C. No Connection 4 N.C. No Connection 5 ODSEL Overdrive Lookup Table Selection (3) 6 N.C. No Connection (1) 7 SELLVDS LVDS data format Selection (2) 8 N.C. No Connection

9 N.C. No Connection 10 N.C. No Connection 11 GND Ground 12 CH1_0N First Pixel 13 CH1_0P First Pixel 14 CH1_1N First Pixel 15 CH1_1P First Pixel 16 CH1_2N First Pixel 17 CH1_2P First Pixel 18 GND Ground 19 CH1_CLKN 20 CH1_CLKP 21 GND Ground 22 CH1_3N First Pixel 23 CH1_3P First Pixel 24 CH1_4N First Pixel 25 CH1_4P First Pixel 26 N.C. No Connection 27 N.C. No Connection 28 CH2_0N Second Pixel 29 CH2_0P Second Pixel 30 CH2_1N Second Pixel 31 CH2_1P Second Pixel 32 CH2_2N Second Pixel 33 CH2_2P Second Pixel 34 GND Ground 35 CH2_CLKN 36 CH2_CLKP 37 GND Ground 38 CH2_3N Second Pixel 39 CH2_3P Second Pixel

40 CH2_4N Second Pixel

41 CH2_4P Second Pixel 42 N.C. No Connection 43 N.C. No Connection 44 GND Ground

First Pixel Negative LVDS differential clock input. First Pixel Positive LVDS differential clock input.

Second Pixel Negative LVDS differential clock input. Second Pixel Positive LVDS differential clock input.

Negative LVDS differential data input. Channel 0 Positive LVDS differential data input. Channel 0 Negative LVDS differential data input. Channel 1 Positive LVDS differential data input. Channel 1 Negative LVDS differential data input. Channel 2 Positive LVDS differential data input. Channel 2

Negative LVDS differential data input. Channel 3 Positive LVDS differential data input. Channel 3 Negative LVDS differential data input. Channel 4 Positive LVDS differential data input. Channel 4

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Negative LVDS differential data input. Channel 0 Positive LVDS differential data input. Channel 0 Negative LVDS differential data input. Channel 1 Positive LVDS differential data input. Channel 1 Negative LVDS differential data input. Channel 2 Positive LVDS differential data input. Channel 2

Negative LVDS differential data input. Channel 3 Positive LVDS differential data input. Channel 3 Negative LVDS differential data input. Channel 4 Positive LVDS differential data input. Channel 4

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(1)

(4)

(1)

(4)

(1)

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45 GND Ground 46 GND Ground 47 N.C. No Connection (1) 48 Vin Power input (+12V) 49 Vin Power input (+12V) 50 Vin Power input (+12V) 51 Vin Power input (+12V)

Note (1) Please be reserved to open.

Note (2) Low or Open: VESA Format(default), connect to GND. High: JEIDA Format, connect to +3.3V.

Note (3) Overdrive lookup table selection. The overdrive lookup table should be selected in accordance with the

frame rate to optimize image quality.

ODSEL Note

L Lookup table was optimized for 120 Hz frame rate.

H Lookup table was optimized for 100 Hz frame rate.

Note (4) LVDS 4-Port Data Mapping

Port CH of LVDS Data Stream

1st Port First pixel 1, 5, 9, ..........., 1913, 1917

2nd Port Second pixel 2, 6, 10, ........., 1914, 1918

3rd Port Third pixel 3, 7, 11, ........., 1915, 1919

4th Port Fourth pixel 4, 8, 12, ........., 1916, 1920

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5.2 BACKLIGHT UNIT

The pin configuration for the housing and the leader wire is shown in the table below.

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CN2~CN7: 51281-1294 (Molex)

Pin № Symbol Feature NOTE

1 VLED 2 VLED

3 NC 4 NC 4 NC 6 N1 7 N2 8 N3

9 N4 10 N5 11 N6 12 N7

.

Positive of LED String

No Connection

Negative of LED String

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5.3 CONVERTER UNIT

CN1:

CI0114M1HR0-LF (CvilLux)

Pin № Symbol Feature

1

2

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or equivalent

3

4

5

6

7

8

9

10

11 STATUS

12 E_PWM External PWM Control Signal

13 I_PWM Internal PWM Control Signal

14 BLON BL ON/OFF

Note (1) Pin 12: External PWM control (use pin 12): Pin 13 must open.

VBL +24V

GND GND

Normal (3.3V) Abnormal(GND)

Note (2) Pin 13: Internal PWM control (use pin 13): Pin 12 must open.

Note (3) Pin 12 and Pin 13 can’t open in the same period.

CN2~CN7: 51281-1294 (Molex)

or equivalent

Pin № Symbol Feature NOTE

1 VLED

2 VLED

3 NC

4 NC

6 N1

7 N2

8 N3

9 N4 10 N5 11 N6 12 N7

Positive of LED String

No Connection

Negative of LED String

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5.4 BLOCK DIAGRAM OF INTERFACE

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AR0~AR9: First pixel R data

AG0~AG9: First pixel G data

AB0~AB9: First pixel B data

BR0~BR9: Second pixel R data

BG0~BG9: Second pixel G data

BB0~BB9: Second pixel B data

DE: Data enable signal

DCLK: Data clock signal

The third and fourth pixel are followed the same rules.

CR0~CR9: Third pixel R data

CG0~CG9: Third pixel G data

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CB0~CB9: Third pixel B data

DR0~DR9: Fourth pixel R data

DG0~DG9: Fourth pixel G data

DB0~DB9: Fourth pixel B data

Note (1) A ~ D channel are first, second, third and fourth pixel respectively.

Note (2) The system must have the transmitter to drive the module.

Note (3) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line

when it is used differentially.

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5.5 LVDS INTERFACE

VESA Format : SELLVDS = L or Open

JEIDA Format : SELLVDS = H

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AR0~AR9: First Pixel R Data (9; MSB, 0; LSB)

AG0~AG9: First Pixel G Data (9; MSB, 0; LSB)

AB0~AB9: First Pixel B Data (9; MSB, 0; LSB)

DE : Data enable signal

DCLK : Data clock signal

RSVD : Reserved

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5.6 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 10-bit gray scale data input for the

color. The higher the binary input, the brighter the color. The table below provides the assignment of the color

versus data input.

Basic Colors

Gray Scale Of Red

Gray Scale Of Green

Gray Scale Of Blue

Color

Black Red Green Blue Cyan Magenta Yel lo w White

Red (0) / Dark Red (1) Red (2)

:

: Red (1021) Red (1022) Red (1023)

Green (0) / Dark Green (1) Green (2)

:

: Green (1021) Green (1022) Green (1023)

Blue (0) / Dark Blue (1) Blue (2)

:

: Blue (1021) Blue (1022) Blue (1023)

R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 G9 G8 G7 G6 G5 G4 G3 G2 G1 G0 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0

0

0 1 0 0 0 1 1 1

0 0 0

1 1 1

0 0 0

:

: 0 0 0

0 0 0

:

: 0 0 0

0

1

0

1

0

:

1

0

:

0

:

0

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0 0 1 0 1 0 1 1

0 0 0

:

: 0 0 0

0 0 0

:

: 1 1 1

0 0 0

:

: 0 0 0

Data Signal

0

1

0

1

0

1

0

:

0

:

1

0

:

0

1

0

1

1 0 1 1

0 0 0

:

: 0 0 0

0 0 0

:

: 1 1 1

0 0 0

:

: 0 0 0

1

0

1

0

:

0

:

1

0

:

0

1

0

1

0

1

0

:

;

0

1

0

1

0

:

0

1

0

1

0

1

0

:

0

1

0

1

0

1

0

1

0

1

0

:

0

0 0

0

:

0

0 0

0

:

1

0

1

0

1

0

:

0

:

0

:

1

0

1

0

1

0

:

0

:

0

1

0

1

0

:

1

0

1

0

1

Red Green Blue

0

1

1 0 0 0 1 1 1

0 0 0

:

: 1 1 1

0 0 0

:

: 0 0 0

0 0 0

:

: 0 0 0

1

0

1

0

:

1

0

:

0

:

0

1

0

1

0

1

0

1

0

1

0

1

0

:

0

1

0

1

0

1

0

:

0

1

0

1

0

1

0

:

0

Note (1) 0: Low Level Voltage, 1: High Level Voltage

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6. INTERFACE TIMING

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

(Ta = 25 ± 2 ºC)

The input signal timing specifications are shown as the following table and timing diagram.

Signal Item Symbol Min. Typ. Max. Unit Note

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LVDS Receiver Clock

LVDS Receiver Data

Vertical Active Display Term

Horizontal Active Display Term

Note : Since the module is operated in DE only mode, Hsync and Vsync input signals should be set to low logic

level. Otherwise, this module would operate abnormally.

Frequency 1/Tc 60 74.25 80 MHz -

Input cycle to cycle jitter

Setup Time Tlvsu 600 - - ps -

Hold Time Tlvhd 600 - - ps -

Frame Rate - 120 - Hz

Total Tv 1115 1125 1135 Th

Display Tvd 1080 1080 1080 Th -

Blank Tvb 35 45 55 Th -

Tota l T h

Display Thd

Blank Thb

Trcl - - 200 ps -

Tv=Tvd+T vb

525 550 575

480 480 480

45 70 95

Tc

Tc -

Th=Thd+Thb

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Valid display data (960 clocks)

LVDS INPUT INTERFACE TIMING DIAGRAM

Tc

RXCLK +

RXn +/-

Tlvsu Tlvhd

1T 14

3T 14

5T 14

7T 14

9T 14

11T

14

13T

14

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6.2 POWER ON/OFF SEQUENCE

(Ta = 25 ± 2 ºC)

To prevent a latch-up or DC operation of LCD module, the power on/off sequence should follow the diagram

below.

0.5

ЉЉЉЉ

T

1

ЉЉЉЉ

0

ЉЉЉЉ

T

2

ЉЉЉЉ

0

ЉЉЉЉ

T

3

500ms

100ms

ЉЉЉЉ

10ms

100ms

ЉЉЉЉ

T4

0V

LVDS Signals

0V

0

ЉЉЉЉ

T

7

ЉЉЉЉ

0

ЉЉЉЉ

T2

T

8

ЉЉЉЉ

T3

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T

2

Power On

T7

VALI D

3

T1

T

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0.1V

cc

T4

Power Off

8

T

Option Signals

(SELLVDS…)

Backlight (Recommended)

ЉЉЉЉ

500ms

T5

50%

5

T

6

T

Power ON/OFF Sequence

Note.

(1) The supply voltage of the external system for the module input should follow the definition of Vcc.

(2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD

operation or the LCD turns off before the backlight turns off, the display may momentarily become abnormal

screen.

(3) In case of VCC is in off level, please keep the level of input signals on the low or high impedance. If T2<0,

that maybe cause electrical overstress failures.

(4) T4 should be measured after the module has been fully discharged between power off and on period.

(5) Interface signal shall not be kept at high impedance when the power is on.

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7. OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

Item Symbol Value Unit

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Ambient Temperature Ta

Ambient Humidity Ha

Supply Voltage VCC 12 V

Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"

LED Current IL

Vertical Frame Rate Fr 120 Hz

The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature change during

measuring. In order to stabilize the luminance, the measurement should be executed after lighting backlight for 1

hour in a windless room.

25±2

50±10

60±3.6

oC

%RH

mA

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7.2 OPTICAL SPECIFICATIONS

The relative measurement methods of optical characteristics are shown in 7.2. The following items should be

measured under the test conditions described in 7.1 and stable environment shown in 7.1.

Item Symbol Condition Min. Typ. Max. Unit Note

Contrast Ratio CR 3000 (4000) - - Note (2)

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Response Time

Center Luminance of White LC 360 450 - cd/m2Note (4)

White Variation

Cross Talk CT - - 4 % Note (5)

Red

Green

Color Chromaticity

Blue

White

Gray to

gray

δW

Rx (0.653) -

Ry

Gx (0.270) -

Gy (0.619) -

Bx (0.152) -

By (0.065) -

Wx 0.285 -

Wy

θx=0°, θy =0°

Viewing angle

at normal direction

- (4.5) (9) ms Note (3)

- - 1.3 - Note (6)

-

Typ.

-0.03

(0.324)

Typ.

+0.03

0.293

-

Color Gamut C.G

θx+

Horizontal

θx-

Viewing Angle

θY+

Vertical

θY-

Note (1) Definition of Viewing Angle (θx, θy):

Viewing angles are measured by Autronic Conoscope Cono-80.

CR≥20

- (72) - % NTSC

80 88 -

Deg. Note (1)

80 88 -

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Note (2) Definition of Contrast Ratio (CR):

The contrast ratio can be calculated by the following expression.

Contrast Ratio (CR) =

CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note (6).

Note (3) Definition of Gray-to-Gray Switching Time:

pixels whiteall withLuminance Surface pixels black all withLuminance Surface

The driving signal means the signal of gray level 0, 252, 508, 764, and 1023.Gray to gray average

time means the average switching time of gray level 0, 252,508,764,1023 to each other.

Note (4) Definition of Luminance of White (LC):

Measure the luminance of gray level 1023 at center point and 5 points

LC = L (5), where L (X) is corresponding to the luminance of the point X at the figure in Note (6).

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Note (5) Definition of Cross Talk (CT):

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CT = | YB – YA | / YA

Where:

YA = Luminance of measured location without gray level 0 pattern (cd/m2)

YB = Luminance of measured location with gray level 0 pattern (cd/m2)

Note (6) Definition of White Variation (

Measure the luminance of gray level 1023 at 5 points

×

100 (%)

δ

W):

δ

W = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]

Horizontal Line

D

W

4

W

D

4

D

2

1 2

5

3D

4

X

Test point :

X = 1 ~ 5

2

3 4

3W

4

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8. PRECAUTIONS

8.1 ASSEMBLY AND HANDLING PRECAUTIONS

[ 1 ] Do not apply rough force such as bending or twisting to the module during assembly.

[ 2 ] It is recommended to assemble or to install a module into the user’s system in clean working areas. The

dust and oil may cause electrical short or worsen the polarizer.

[ 3 ] Do not apply pressure or impulse to the module to prevent the damage of LCD panel and Backlight.

[ 4 ] Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the

damage and latch-up of the CMOS LSI chips.

[ 5 ] Do not plug in or pull out the I/F connector while the module is in operation.

[ 6 ] Do not disassemble the module.

[ 7 ] Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and easily

scratched.

[ 8 ] Moisture can easily penetrate into LCD module and may cause the damage during operation.

[ 9 ] When storing modules as spares for a long time, the following precaution is necessary.

[ 9.1 ] Do not leave the module in high temperature, and high humidity for a long time. It is highly

к

recommended to store the module with temperature from 0 to 35

condensation.

[ 9.2 ] The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or

fluorescent light.

[ 10 ] When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the

response time will become slow.

at normal humidity without

8.2 SAFETY PRECAUTIONS

[ 1 ] The Backlight may cause an electrical shock while assembling with the converter power board. Do not

disassemble the module or insert anything into the Backlight unit.

[ 2 ] If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In case of

contact with hands, skin or clothes, it has to be washed away thoroughly with soap.

[ 3 ] After the module’s end of life, it is not harmful in case of normal operation and storage.

8.3 SAFETY STANDARDS

The LCD module should be certified with safety regulations as follows:

[ 1 ] UL60950-1 or updated standard.

[ 2 ] IEC60950-1 or updated standard.

[ 3 ] UL60065 or updated standard.

[ 4 ] IEC60065 or updated standard.

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9. DEFINITION OF LABELS

9.1 CMO MODULE LABEL

The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.

CHI MEI

OPTOELECTRONICS

V470H2 -LE1 Rev. XX

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X X X X X X X Y M D L N N N N

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E207943

MADE IN TAIWAN

RoHS

GEMN

Model Name: V470H2-LE1

Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.

Serial ID: X X X X X X X Y M D L N N N N

Serial ID includes the information as below:

Manufactured Date:

Year: 0~9, for 2000~2009

Month: 1~9, A~C, for Jan. ~ Dec.

Serial No.

Product Line

Year, Month, Date

CMO Internal Use

Revision

CMO Internal Use

Day: 1~9, A~Y, for 1st to 31st, exclude I ,O, and U.

Revision Code: Cover all the change

Serial No.: Manufacturing sequence of product

Product Line: 1 -> Line1, 2 -> Line 2, …etc.

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10. PACKAGING

10.1 PACKING SPECIFICATIONS

(1) 4 LCD TV modules / 1 Box

(2) Box dimensions : 1190(L)x280(W)x725(H)mm

(3) Weight : approximately 47 Kg ( 4 modules per box)

10.2 PACKING METHOD

Figures 10-1 and 10-2 are the packing method

LCD TV Module

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Anti-static Bag

Carton

Carton Label

PP Belt

Cushion(Bottom)

Figure.10-1 packing method

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(

)

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Air Transportation &

Sea / Land Transportation (40ft Container)

(L1130*50*50mm)

Film

(L1150*W1190*H140mm)

(L1400*50*50mm)

Gross: 391kg

Sea / Land Transportation (40ft HQ Container)

(L1130*50*50mm)

(L625*50*50mm)

Film

(L1400*50*50mm)

L1150*W1190*H140mm

Gross: 594kg

Figure.10-2 packing method

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11. MECHANICAL CHARACTERISTICS

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CHI MEI

࡛ભሽ՗ٝڶૻֆ׹

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CHI MEI

࡛ભሽ՗ٝ ڶૻ ֆ׹

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CMO V470H2-LE1 Specification

Specifications and Main Features

Frequently Asked Questions

User Manual