CMO V470H1-L05 Specification

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TFT LCD Approval Specification

MODEL NO.: V470H1 - L05

Customer: _________________________________

Approved by:_______________________________

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Issue Date:May.09.2008

Model No.: V470H1-L05

Approval

Note:

TV Head Division

Approved By

LY C hen

Reviewed By

QRA Dept. Product Development Div.

Tomy Chen WT Lin

Prepared By

LCD TV Marketing and Product Management Div.

Ken Wu HT Hung

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CONTENTS

REVISION HISTORY ..................................................................................................................................................4

1. GENERAL DESCRIPTION......................................................................................................................................5

1.1 OVERVIEW....................................................................................................................................................5

1.2 FEATURES ....................................................................................................................................................5

1.3 APPLICATION................................................................................................................................................5

1.4 GENERAL SPECIFICATIONS ........................................................................................................................5

1.5 MECHANICAL SPECIFICATIONS ..................................................................................................................6

2. ABSOLUTE MAXIMUM RATINGS ...........................................................................................................................7

2.1 ELECTRICAL ABSOLUTE RATINGS..............................................................................................................7

2.1.1 TFT LCD MODULE...............................................................................................................................7

2.2 ABSOLUTE RATINGS OF ENVIRONMENT....................................................................................................7

2.3 RELIABILITY TEST CONDITION....................................................................................................................8

3. ELECTRICAL CHARACTERISTICS ........................................................................................................................9

3.1 TFT LCD MODULE.........................................................................................................................................9

3.2 BACKLIGHT CONNECTOR PIN CONFIGURATION..................................................................................... 11

3.2.1 LAMP SPECIFICATION...................................................................................................................... 11

3.2.2 ELECTRICAL SPECIFICATION.......................................................................................................... 11

4. BLOCK DIAGRAM OF INTERFACE ......................................................................................................................13

4.1 TFT LCD MODULE.......................................................................................................................................13

5. INPUT TERMINAL PIN ASSIGNMENT..................................................................................................................14

5.1 TFT LCD Module Input .................................................................................................................................14

5.2 BACKLIGHT UNIT........................................................................................................................................17

5.3 BLOCK DIAGRAM OF INTERFACE .............................................................................................................18

5.4 LVDS INTERFACE ....................................................................................................................................... 20

5.5 COLOR DATA INPUT ASSIGNMENT............................................................................................................21

6. INTERFACE TIMING............................................................................................................................................. 22

6.1 INPUT SIGNAL TIMING SPECIFICATIONS..................................................................................................22

6.2 POWER ON/OFF SEQUENCE..................................................................................................................... 24

7. OPTICAL CHARACTERISTICS.............................................................................................................................25

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7.1 TEST CONDITIONS .....................................................................................................................................25

7.2 OPTICAL SPECIFICATIONS........................................................................................................................26

8. PRECAUTIONS ....................................................................................................................................................29

8.1 ASSEMBLY AND HANDLING PRECAUTIONS .............................................................................................29

8.2 SAFETY PRECAUTIONS.............................................................................................................................29

9. DEFINITION OF LABELS......................................................................................................................................30

9.1 CMO MODULE LABEL.................................................................................................................................30

10. PACKAGING .......................................................................................................................................................31

10.1 PACKAGING SPECIFICATIONS.................................................................................................................31

10.2 PACKAGING METHOD ..............................................................................................................................31

11. MECHANICAL CHARACTERISTICS ...................................................................................................................33

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REVISION HISTORY

Version Date

Ver.1.0
Ver.2.0

Ver.2.1

Jan.17’08
Feb.01’08
Feb.01’08
Feb 01’08
Feb 01’08
Mar 10’08
Mar 24’08

Apr.30’08

May.09’08

Page
(New)

All
26
26
33,34,35
12
23
5
15
11

26
22
9

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Section Description

All

7.2

7.2
11

3.2.2

6.1

1.4

5.1

3.2.2

7.2

5.4

3.1

Preliminary Specification was first issued.
Update color chromaticity (Rx,Ry,Gx,Gy,By)
Update contrast ratio ( Min )
Update mechanical characteristics
Update electrical specification section drawing
Input signal timing specifications
Update surface treatment
LVDS Connector type
BL Lamp Voltage
BL Starting Voltage
Striking Time
PWM Dimming range
Gamma
Update Vertical and Horizontal Active Display Term
Update the LVDS interface

Issue Date:May.09.2008

Model No.: V470H1-L05

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1. GENERAL DESCRIPTION

1.1 OVERVIEW

V470H1-L05 is a 47” TFT Liquid Crystal Display module with 20-CCFL Backlight unit and 2ch-LVDS interface.

This module supports 1920 x 1080 Full HDTV format and can display true 16.7M colors (8-bit/color). The inverter

module for backlight isn’t built-in.

1.2 FEATURES

Ё

High brightness (500 nits)

Ё

High contrast ratio (2000:1)

Ё

Fast response time (Gray to gray average 6.5 ms)

Ё

High color saturation (NTSC 72%)

Ё

Full HDTV (1920 x 1080 pixels) resolution, true HDTV format

Ё

DE (Data Enable) only mode

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Ё

LVDS (Low Voltage Differential Signaling) interface

Ё

Optimized response time for 50 Hz frame rate

Ё

Ultra wide viewing angle : Super MVA technology

Ё

180 degree rotation display option

Ё

RoHS compliance

1.3 APPLICATION

Ё

Standard Living Room TVs.

Ё

Public Display Application.

Ё

Home Theater Application.

Ё

MFM Application.

1.4 GENERAL SPECIFICATIONS

Item Specification Unit Note

Active Area 1039.68(H) x 584.82 (V) (47” diagonal) mm

Bezel Opening Area 1049 (H) x 593 (V) mm

Driver Element a-si TFT active matrix - -

Pixel Number 1920 x R.G.B. x 1080 pixel -

Pixel Pitch(Sub Pixel) 0.5415 (H) x 0.1805 (V) mm -

(1)

Pixel Arrangement RGB vertical stripe - -

Display Colors 16.7M color -

Display Operation Mode Transmissive mode / Normally black - -

Surface Treatment Anti-Glare coating /Haze 25%/ 3H - (2)

Note (1) Please refer to the attached drawings in chapter 9 for more information about the front and back outlines.

Note (2) The spec. of the surface treatment is temporarily for this phase. CMO reserves the rights to change this

feature.

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1.5 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note

Horizontal (H) 1094.5 1096.0 1097.5 mm

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Model No.: V470H1-L05

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Module Size

Weight - 14620 - g -

Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.

Note (2) Module Depth does not include connectors.

Vertical (V) 638.5 640.0 641.5 mm

Depth (D) 47.1 48.1 49.1 mm

(1), (2)

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2. ABSOLUTE MAXIMUM RATINGS

2.1 ELECTRICAL ABSOLUTE RATINGS

2.1.1 TFT LCD MODULE

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Issue Date:May.09.2008

Model No.: V470H1-L05

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Item Symbol

Min. Max.

Power Supply Voltage VCC -0.3 14.0 V

Logic Input Voltage VIN -0.3 3.6 V

Value

Unit Note

(1)

2.2 ABSOLUTE RATINGS OF ENVIRONMENT

Item Symbol

Storage Temperature TST -20 +60 ºC (1)

Operating Ambient Temperature TOP 0 50 ºC (1), (2)

Shock (Non-Operating) SNOP - 50 G (3), (5)

Vibration (Non-Operating) VNOP - 1.0 G (4), (5)

Note (1) Temperature and relative humidity range is shown in the figure below.

(a) 90 %RH Max. (Ta

(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).

(c) No condensation.

Note (2) The maximum operating temperature is based on the test condition that the surface temperature of

display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.

Љ

40 ºC).

Min. Max.

Value

Unit Note

Thermal management should be considered in final product design to prevent the surface temperature of

display area from being over 65 ºC. The range of operating temperature may degrade in case of

improper thermal management in final product design.

Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.

Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.

Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that

the module would not be twisted or bent by the fixture.

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2.3 RELIABILITY TEST CONDITION

No Test Item Codition

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Model No.: V470H1-L05

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1 High temperature storage test

2 Low temperature storage test

High temperature high humidity storage

3

test

4 High temperature operation test

5 Low temperature operation test

High temperature high humidity operation

6

test

7 Vibration test (non-operation)

8 Shock test (non-operation)

Ta = 6 0

Ta = -20

Ta = 5 0

Ta = 5 0

Ta = 0

Ta = 5 0

Wave form: Sine wave
Vibration level: 1.0G
Fre. range : 10~200Hz
Duration: X, Y, Z, 10min,
One time each direction

Wave form: half sine wave
Shock level: 50G



One time each direction

к

, 240hrs

к

, 240hrs

к

, 90%RH, 240hrs

к

, 240hrs

к

, 240hrs

к

, 80%RH, 240hrs

X, Y,  Z, 11ms

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3. ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE

(Ta = 25 ± 2 ºC)

Parameter Symbol

Power Supply Voltage VCC 10.8 12 13.2 V (1)

Power Supply Ripple Voltage VRP - - 350 mV

Rush Current IRUSH - - 4.5 A (2)

White Pattern - 1.4 1.7 A

Power Supply Current

Mosaic Pattern - 1.0 - A

Black Pattern

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Min. Typ. Max.

-

-

-

- 0.5 - A

Issue Date:May.09.2008

Model No.: V470H1-L05

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Value

Unit Note

(3)

LVDS
Interface

Differential Input High Threshold
Voltage

Differential Input Low Threshold
Voltage

Common Input Voltage VLVC 1.07 1.25 1.375 V

VLVTH 100 - - mV

VLVTL - - -100 mV

Terminating Resistor RT - 100 - ohm

CMOS
interface

Input High Threshold Voltage VIH 2.7 - 3.3 V

Input Low Threshold Voltage VIL 0 - 0.7 V

Note (1) The module should be always operated within the above ranges.

Note (2) Measurement condition:

+12V

Q1 Si4485DY

Fus e

R1

1k

Vcc
(LCD Modu le Input)

C3

1uF

VR1

47k

(Low to High)

Control Signal

SW

R2

1k

Q2

2N7002

C1

0.01uF

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Vcc rising time is 470us

0.9Vcc

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Vcc

GND

Note (3) The specified power supply current is under the conditions at Vcc = 12 V, Ta = 25 ± 2 ºC, fv = 50 Hz,

whereas a power dissipation check pattern below is displayed.

0.1Vcc

a. White Pattern

470 us

b. Mosaic Pattern

Active AreaActive Area

c. Black Pattern

R

R

Active Area

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3.2 BACKLIGHT CONNECTOR PIN CONFIGURATION

3.2.1 LAMP SPECIFICATION

(Ta = 25 ± 2 ºC)

Issue Date:May.09.2008

Model No.: V470H1-L05

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Parameter Symbol

Value

Min. Typ. Max.

- - 2600 VRMS Ta = 0 ºC

Lamp Starting Voltage VSL

- - 2350 VRMS Ta = 25 ºC

Lamp Voltage VL 1503 1670 1837 VRMS

Lamp Current IL 5.5 6.0 6.5 mARMS

Lamp Frequency FL 40 - 80 KHz

Lamp Life Time LBL 50,000 60,000 - Hrs (1)

Note(1) Condition: PWM 100% dimming duty ratio

3.2.2 ELECTRICAL SPECIFICATION

(Ta = 25 ± 2 ºC, 100% dimming duty ratio)

Value

Parameter Symbol

Min. Typ. Max.

1640 VRMS (1), Ta = 0 ºC

BL Starting Voltage VSBL

1543 VRMS (1), Ta = 25 ºC

Unit Note

Unit Note

BL Lamp Voltage VBL 1000 1300 1600 VRMS

BL Lamp Current IBL 115 125 135 mARMS 20 lamps

BL Lamp Frequency FBL 43 45 47 KHz

PWM Dimming Range PDIM 10 - 100 % (2)

Striking Time ST 1.5 - - Sec

Lamp Type - Straight Type -

Number of Lamps - 20 PCS

Type of Current Balance - C-Balance -

C Ballaster CB - 22 - pF

Note (1) Single size values and VSBL=[( VSL /2 )2+ VC2]

Note (2) V470H1-L05 are designed without Inverter. These items are for reference and based on V470H1-L03

Inverter model.

1/2

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VL

VL

2

IBL

VC

IL

VBL VBL

T

A

PWM

+3.3V TTL

I-out

90%

Point

A

Output of Inverter to
Lamp

Point
B

a

PWM duty = (A/T) x 100
Point A, B: 90% of I-out point
I-out duty = (a/T) x 100
PWM Frequency = 1/T
Note: 20% PWM dimming is around 20% luminance

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4. BLOCK DIAGRAM OF INTERFACE

4.1 TFT LCD MODULE

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Model No.: V470H1-L05

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ORX0(+/-)
ORX1(+/-)
ORX2(+/-)
ORX3(+/-)
OCLK(+/-)

ERX0(+/-)
ERX1(+/-)
ERX2(+/-)
ERX3(+/-)
ECLK(+/-)

SELLVDS
RPF
ODSEL
Vcc
GND

CN1

H.V.

H.V.

N.C .

INPUT CONNECTOR

FI-RE51S-HF(JAE)

INVERTER

CONNECTOR

CN1: 65002 WR-03

FRAME

BUFFER

TIMING

CONTROLLER

DC/DC CONVERTER &

REFERENCE

VOLTAGE

GENERATOR

BACKLIGHT

UNIT

SCAN DRIVER

TFT LCD PANEL

1920 X 3 X 1080

DATA DRIVER(RSDS)

INVERTER

CONNECTOR

CN2: 65002WR-03

CN2

H. V.

H. V.

N. C.

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5. INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD Module Input

LSGT05L ( LG)

Pin Name Description Note

1 N.C. No Connection

2 N.C. No Connection

3 N.C. No Connection

4 N.C. No Connection

5 N.C. No Connection

6 N.C. No Connection

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(1)

7 SELLVDS Low : VESA Format (Default), High : JEIDA Format (3)

8 RPF Display Rotation (2)

9 Reserved Reserved

10 Reserved Reserved

11 Reserved Reserved

12 ORX0- Odd pixel Negative LVDS differential data input. Channel 0

13 ORX0+ Odd pixel Positive LVDS differential data input. Channel 0

14 ORX1- Odd pixel Negative LVDS differential data input. Channel 1

15 ORX1+ Odd pixel Positive LVDS differential data input. Channel 1

16 ORX2- Odd pixel Negative LVDS differential data input. Channel 2

17 ORX2+ Odd pixel Positive LVDS differential data input. Channel 2

18 GND Ground

19 OCLK- Odd pixel Negative LVDS differential clock input.

20 OCLK+ Odd pixel Positive LVDS differential clock input.

21 GND Ground

22 ORX3- Odd pixel Negative LVDS differential data input. Channel 3

23 ORX3+ Odd pixel Positive LVDS differential data input. Channel 3

24 N.C. No Connection

25 N.C. No Connection

26 N.C. No Connection

27 N.C. No Connection

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C

28 ERX0- Even pixel Negative LVDS differential data input. Channel 0

29 ERX0+ Even pixel Positive LVDS differential data input. Channel 0

30 ERX1- Even pixel Negative LVDS differential data input. Channel 1

31 ERX1+ Even pixel Positive LVDS differential data input. Channel 1

32 ERX2- Even pixel Negative LVDS differential data input. Channel 2

33 ERX2+ Even pixel Positive LVDS differential data input. Channel 2

34 GND Ground

35 ECLK- Even pixel Negative LVDS differential clock input.

36 ECLK+ Even pixel Positive LVDS differential clock input.

37 GND Ground

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38 ERX3- Even pixel Negative LVDS differential data input. Channel 3

39 ERX3+ Even pixel Positive LVDS differential data input. Channel 3

40 N.C. No Connection

41 N.C. No Connection

42 N.C. No Connection

43 N.C. No Connection

44 GND Ground

45 GND Ground

46 GND Ground

47 GND Ground

48 VCC +12V power supply

49 VCC +12V power supply

50 VCC +12V power supply

51 VCC +12V power supply

Note (1) Reserved for internal use. Please leave it open.

Note (2) Low : normal display (Default), High : display with 180 degree rotation.

M

CMI MEI

Normal Display 180º Rotation Display

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Note (3) LVDS Format:

VESA Format

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Current Cycle

OR 0P
OR 0N

OR 1P
OR 1N

OR 2P
OR 2N

OR 3P
OR 3N

ER 0P
ER 0N

ER 1P
ER 1N

ER 2P
ER 2N

ER 3P
ER 3N

JEIDA Format

OR0

OG1

OB2

OR6

ER0

EG1

EB2

ER6

OG0 OR5

OB1

DE VS HS OB5 OB4 OB3 OB2

RSVD OB7 OB6 OG7 OG6 OR7 OR6

EG0 ER5

EB1

DE VS HS EB5 EB4 BE3 EB2

RSVD EB7 EB6 EG7 EG6 ER7 ER6

OB0 OG5 OG4 OG3 OG2 OG1

EB0 EG5 EG4 EG3 EG2 EG1

OR4 OR3 OR2 OR1 OR0

ER4 ER3 ER2 ER1 ER0

OG0

OB1

DE

RSVD

EG0

EB1

DE

RSVD

OR 0P
OR 0N

OR 1P
OR 1N

OR 2P
OR 2N

OR 3P
OR 3N

ER 0P
ER 0N

ER 1P
ER 1N

ER 2P
ER 2N

ER 3P
ER 3N

OR2

OG3

OB4

OR0

ER2

EG3

EB4

ER0

OG2 OR5

OB3

DE VS HS OB5 OB4OB7 OB6

RSVD OB1 OB0 OG1 OG0 OR1 OR0

EG2 ER5

EB3

DE VS HS EB5 EB4EB7 EB6

RSVD EB1 EB0 EG1 EG0 ER1 ER0

OB2 OG5 OG4 OG3OG7 OG6

EB2 EG5 EG4 EG3EG7 EG6

OR4 OR3 OR2OR7 OR6

ER4 ER3 ER2ER7 ER6

OG2

OB3

DE

RSVD

EG2

EB3

DE

RSVD

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5.2 BACKLIGHT UNIT

CN1-CN2: 65002WR-03.

Pin Symbol Description

1 H.V. High Voltage for Backlight Unit

2 H.V. High Voltage for Backlight Unit

3 N.C. No Connection

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CN1

CN2

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5.3 BLOCK DIAGRAM OF INTERFACE

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TxIN RxOUT

ORx0 +

51Ω

100pF

ORx0 -

OR0 Ω OR7

Ω

OG7

OG0

OB0

Ω

OB7

DE

ORx1 +

ORx1 -

ORx2 +

51Ω

51Ω

100pF

51Ω

51Ω

100pF

OR0

OG0

OB 0

DE

ORx2 -

51Ω

ORx3 +

51Ω

100pF

ORx3 -

51Ω

PLL PLL

OCLK +

51Ω

100pF

OCLK -

51Ω

Ω

Ω

Ω

OR7

OG7

OB7

ER0

Ω

ER7

Ω

EG7

EG0

EB0

Ω

EB7

DCLK

Host
Graphic

PLL PLL

Controller

LVDS Transmitter
THC63LVDM83A
(LVDF83A)

ERx0 +

ERx0 -

ERx1 +

ERx1 -

ERx2 +

ERx2 -

ERx3 +

ERx3 -

ECLK +

ECLK -

51Ω

51Ω

51Ω

51Ω

51Ω

51Ω

51Ω

51Ω

51Ω

51Ω

100pF

100pF

100pF

100pF

100pF

ER0

EG0

EB0

DCLK

DCLK
Timing
Controller

LVDS Receiver

Ω

Ω

Ω

ER7

EG7

EB7

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OR0~OR7: Odd pixel R data

OG0~OG7: Odd pixel G data

OB0~OB7: Odd pixel B data

ER0~ER7: Even pixel R data

EG0~EG7: Even pixel G data

EB0~EB7: Even pixel B data

DE: Data enable signal

DCLK: Data clock signal

Note (1) The system must have the transmitter to drive the module.

Note (2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it is

used differentially.

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Note (3) Two pixel data send into the module for every clock cychle. The first pixel of the frame is odd pixel and

the second pixel is even pixel.

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5.4 LVDS INTERFACE

TRANSMITTER

SIGNAL

THC63LVDM83A INTERFACE CONNECTOR

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THC63LVDF84A

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TFT CONTROL INPUT

LVDS_SEL

=L or OPEN

24
bit

R0
R1
R2
R3
R4
R5
G0
G1
G2
G3
G4
G5
B0
B1
B2
B3
B4
B5
DE
R6
R7
G6
G7
B6

B7
RSVD 1
RSVD 2
RSVD 3

LVDS_SEL

= H

R2
R3
R4
R5
R6

R7
G2
G3
G4
G5
G6
G7

B2

B3

B4

B5

B6

B7
DE
R0
R1
G0
G1

B0

B1

RSVD 1
RSVD 2
RSVD 3

PIN INPUT Host TFT-LCD PIN OUTPUT

51
52
54
55
56

3
4
6

7
11
12
14
15
19
20
22
23
24
30
50

2

8
10
16
18
25
27
28

TxIN0
TxIN1
TxIN2
TxIN3
TxIN4
TxIN6
TxIN7
TxIN8

TxIN9
TxIN12
TxIN13
TxIN14
TxIN15
TxIN18
TxIN19
TxIN20
TxIN21
TxIN22
TxIN26
TxIN27

TxIN5
TxIN10
TxIN11
TxIN16
TxIN17
TxIN23
TxIN24
TxIN25

TA OUT0+

TA OUT0-

TA OUT1+

TA OUT1-

TA OUT2+

TA OUT2-

TA OUT3+

TA OUT3-

Rx 0+

Rx 0-

Rx 1+

Rx 1-

Rx 2+

Rx 2-

Rx 3+

Rx 3-

27
29
30
32
33
35
37
38
39
43
45
46
47
51
53
54
55

1
6

7
34
41
42
49
50

2

3

5

Rx OUT0
Rx OUT1
Rx OUT2
Rx OUT3
Rx OUT4
Rx OUT6
Rx OUT7
Rx OUT8

Rx OUT9
Rx OUT12
Rx OUT13
Rx OUT14
Rx OUT15
Rx OUT18
Rx OUT19
Rx OUT20
Rx OUT21
Rx OUT22
Rx OUT26
Rx OUT27

Rx OUT5
Rx OUT10

Rx OUT11
Rx OUT16
Rx OUT17
Rx OUT23
Rx OUT24
Rx OUT25

LVDS_SEL

=L or OPEN

R0
R1
R2
R3
R4
R5
G0
G1
G2
G3
G4
G5

B0
B1
B2
B3
B4

B5
DE
R6
R7
G6
G7

B6

B7
NC
NC
NC

LVDS_SEL

= H

R2
R3
R4
R5
R6

R7
G2
G3
G4
G5
G6
G7

B2

B3

B4

B5

B6

B7
DE

R0

R1
G0
G1

B0

B1
NC
NC
NC

DCLK 31 TxCLK IN TxCLK OUT+

R0~R7: Pixel R Data (7; MSB, 0; LSB)

G0~G7: Pixel G Data (7; MSB, 0; LSB)

B0~B7: Pixel B Data (7; MSB, 0; LSB)

DE : Data enable signal

DCLK : Data clock signal

Notes: (

1) RSVD (reserved) pins on the transmitter shall be “H” or “L”.

TxCLK OUT-

20

RxCLK IN+

RxCLK IN-

26 RxCLK

OUT

DCLK

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5.5 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for the color.

The higher the binary input, the brighter the color. The table below provides the assignment of the color versus

data input.

Color

R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0

Black
Red
Green

Basic

Colors

Scale

Green

Scale

Scale

Note (1) 0: Low Level Voltage, 1: High Level Voltage

Blue
Cyan
Magenta
Yellow
White
Red (0) / Dark
Red (1)
Red (2)

Red

:

Gray

:
Red (253)
Red (254)
Red (255)
Green (0) / Dark
Green (1)
Green (2)
:

Gray

:
Green (253)
Green (254)
Green (255)
Blue (0) / Dark
Blue (1)
Blue (2)

Blue

:

Gray

:
Blue (253)
Blue (254)
Blue (255)

0

0

1

1

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

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Data Signal

Red Green Blue

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

1

1

1

1

0

1

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

0

0

0

0

0

0

1

1

1

1

1

1

0

1

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

0

0

0

0
:
:

:
:

:
:

:

:

:

:

0

0

0

0

0

0
0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

1

0

:

:

:

:

:

:

:

:

1

1

0

1
1
1

0

1

1

1

1

1

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6. INTERFACE TIMING

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

(Ta = 25 ± 2 ºC)

The input signal timing specifications are shown as the following table and timing diagram.

Signal Item Symbol Min. Typ. Max. Unit Note

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LVDS Receiver
Clock

LVDS Receiver
Data

Vertical
Active Display
Term

Frequency 1/Tc 60 74 80 MHZ -

Input cycle to
cycle jitter

Trcl - - 200 ps -

Setup Time Tlvsu 600 - - ps -

Hold Time Tlvhd 600 - - ps -

Frame Rate 47 50 63 Hz

Total Tv 1100 1125 1250 Th

(2)

Tv=Tvd+T vb

Display Tvd 1080 1080 1080 Th -

Blank Tvb 20 45 170 Th -

Horizontal
Active Display
Term

Total Th 1050 1100 1290 Tc

Display Thd 960 960 960 Tc -

Blank Thb 90 140 330 Tc -

(2)

Th=Thd+Thb

Note(1): Since the module is operated in DE only mode, Hsync and Vsync input signals should be set to low logic

level. Otherwise, this module would operate abnormally.

Note(2) : The LVDS clock frequency can’t exceed 80MHz.

INPUT SIGNAL TIMING DIAGRAM

Tvd Tvb

DE

Th

DCLK

Tc

Thb Thd

DE

Data

Tv

Valid display data (960 clocks)

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LVDS INPUT INTERFACE TIMING DIAGRAM

RXCLK +

RXn +/-

Tlvsu Tlvhd

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Tc

1T
14

3T
14

5T
14

7T
14

9T
14

11T

14

13T

14

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6.2 POWER ON/OFF SEQUENCE

(Ta = 25 ± 2 ºC)

To prevent a latch-up or DC operation of LCD module, the power on/off sequence should follow the diagram

below.

POWER ON/OFF SEQUENCE

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0.9 Vcc

Power Supply
Vcc

0.1 Vcc

0 V

T1 T2 T3 T4

Signal Valid

0 V

Power O N

Backlight

Signal Min. Typ. Max. Unit Note

T5 T6

50% 50%

Power OFF

0.9 Vcc

0.1 Vcc

0.9 Vcc

0.1 Vcc

T1 0.5 - 10 ms -

T2 0 - 50 ms -

T3 0 - 50 ms -

T4 500 - - ms -

T5 500 - - ms -

T6 100 - - ms -

Note.

The supply voltage of the external system for the module input should follow the definition of Vcc.

Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD operation or

the LCD turns off before the backlight turns off, the display may momentarily become abnormal screen.

In case of VCC is in off level, please keep the level of input signals on the low or high impedance.

T4 should be measured after the module has been fully discharged between power off and on period.

Interface signal shall not be kept at high impedance when the power is on.

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7. OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

Item Symbol Value Unit

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Ambient Temperature Ta

Ambient Humidity Ha

Supply Voltage VCC 12 V

Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"

Lamp Current IL

Oscillating Frequency (Inverter) FW

Vertical Frame Rate Fr 50 Hz

The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature change during

measuring. In order to stabilize the luminance, the measurement should be executed after lighting backlight for 1

hour in a windless room.

LCD Module

LCD Panel

Center of the Screen

25±2

50±10

125±10

45±2

Display Color Analyzer

(Minolta CA210)

oC

%RH

mA

KHz

Light Shield Room

(Ambient Luminance < 2 lux)

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7.2 OPTICAL SPECIFICATIONS

The relative measurement methods of optical characteristics are shown in 7.2. The following items should be

measured under the test conditions described in 7.1 and stable environment shown in Note (6).

Item Symbol Condition Min. Typ. Max. Unit Note

Contrast Ratio CR (1600) (2000) - Note (2)

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Response Time

Gray to

gray

(6.5) (12) ms Note (3)

Center Luminance of White LC (400) (500) cd/m2Note (4)

White Variation

δW

(1.3) - Note (7)

Cross Talk CT (4) % Note (5)

Color
Chromaticity

Red

Green

Blue

Rx

Ry (0.332) -

θx=0°, θy =0°

Viewing angle

at normal direction

Gx

Gy (0.597) -

Bx

Typ.

-0.03

(0.644)

(0.273)

(0.143)

Typ.

+0.03

-

-

Note (6)

-

By (0.069) -

Wx (0.280) -

White

Viewing Angle

Wy

Color Gamut C.G

Horizontal

θx+

θx-

Vertical

θY+

θY-

(70) (72) % NTSC

CR≥20

(0.285)

80 88

80 88

80 88

80 88

-

Deg. Note (1)

Gamma - 2.2 -

Note (1) Definition of Viewing Angle (θx, θy):

Viewing angles are measured by Eldim EZ-Contrast 160R

Normal

θ x = θ y = 0º

y-

θ

θX- = 90º

6 o

ϗ

clock

θy- = 90º

x-

y-

θx−

θ

y+

12 o

ϗ

y+

θx+

clock direction

θy+ = 90º

x+

θX+ = 90º

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Note (2) Definition of Contrast Ratio (CR):

The contrast ratio can be calculated by the following expression.

Surface Luminance with all white pixels

Contrast Ratio (CR) =

Surface Luminance with all black pixels

CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note (7).

Note (3) Definition of Gray-to-Gray Switching Time:

Optical Response

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100 %

90 %

10 %

0 %

Gray to Gray

Switching Time

The driving signal means the signal of luminance 0%, 20%, 40%, 60%, 80%, 100%.

Gray to gray average time means the average switching time of luminance 0%, 20%, 40%, 60%, 80%,

100% to each other.

Note (4) Definition of Luminance of White (LC, LAVE):

Measure the luminance of gray level 255 at center point and 5 points

LC = L (5), where L (X) is corresponding to the luminance of the point X at the figure in Note (7).

Gray to Gray

Switching Time

Time

Note (5) Definition of Cross Talk (CT):

CT = | YB – YA | / YA × 100 (%)

Where:

YA = Luminance of measured location without gray level 0 pattern (cd/m2)

YB = Luminance of measured location with gray level 0 pattern (cd/m2)

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(0,0)

Active Area

Y

A,U

(D/2,W/8)

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(0,0)

Active Area

(D/4,W/4)

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(D/2,W/8)

Y

B,U

Gray 128

Y

(D/8,W/2) Y

A,L

(D/2,7W/8)

Y

A,D

Note (7) Definition of White Variation (δW):

Measure the luminance of gray level 255 at 5 points

δW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]

D

4

1 2

W

4

W

W

2

Vertical Line

3W

4

3 4

(7D/8,W/2)

A,R

Horizontal Line

D

5

Gray 0

Gray 128

Y

(D/8,W/2) Y

B,L

D

2

3D

4

Y

(D/2,7W/8)

B,D

(7D/8,W/2)

B,R

X

Test point :

X = 1 ~ 5

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8. PRECAUTIONS

8.1 ASSEMBLY AND HANDLING PRECAUTIONS

[ 1 ] Do not apply rough force such as bending or twisting to the module during assembly.

[ 2 ] It is recommended to assemble or to install a module into the user’s system in clean working areas. The

dust and oil may cause electrical short or worsen the polarizer.

[ 3 ] Do not apply pressure or impulse to the module to prevent the damage of LCD panel and Backlight.

[ 4 ] Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the

damage and latch-up of the CMOS LSI chips.

[ 5 ] Do not plug in or pull out the I/F connector while the module is in operation.

[ 6 ] Do not disassemble the module.

[ 7 ] Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and easily

scratched.

[ 8 ] Moisture can easily penetrate into LCD module and may cause the damage during operation.

[ 9 ] When storing modules as spares for a long time, the following precaution is necessary.

[ 9.1 ] Do not leave the module in high temperature, and high humidity for a long time. It is highly

recommended to store the module with temperature from 0 to 35

condensation.

[ 9.2 ] The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or

fluorescent light.

[ 10 ] When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the

response time will become slow, and the starting voltage of CCFL will be higher than that of room

temperature.

8.2 SAFETY PRECAUTIONS

[ 1 ] The startup voltage of a Backlight is approximately 1000 Volts. It may cause an electrical shock while

assembling with the inverter. Do not disassemble the module or insert anything into the Backlight unit.

[ 2 ] If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In case of

contact with hands, skin or clothes, it has to be washed away thoroughly with soap.

[ 3 ] After the module’s end of life, it is not harmful in case of normal operation and storage.

к

at normal humidity without

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9. DEFINITION OF LABELS

9.1 CMO MODULE LABEL

The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.

Model Name: V470H1-L05

CHI MEI

OPTOELECTRONICS

V470H1 -L05 Rev. XX

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E207943

MADE IN TAIWAN

RoHS

X X X X X X X Y M D L N N N N

Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.

Serial ID: X X X X X X X Y M D L N N N N

Serial ID includes the information as below:

Manufactured Date:

Year: 0~9, for 2000~2009

Month: 1~9, A~C, for Jan. ~ Dec.

Day: 1~9, A~Y, for 1st to 31st, exclude I ,O, and U.

Serial No.

Product Line

Year, Month, Date

CMO Internal Use

CMO Internal Use

Revision

CMO Internal Use

Revision Code: Cover all the change

Serial No.: Manufacturing sequence of product

Product Line: 1 -> Line1, 2 -> Line 2, …etc.

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10. PACKAGING

10.1 PACKAGING SPECIFICATIONS

3 LCD TV modules / 1 Box

Box dimensions : 1190(L)x280(W)x720(H)mm

Weight : approximately 52Kg ( 3 modules per box)

10.2 PACKAGING METHOD

Figures 10-1 and 10-2 are the packing method.

LCD TV Module

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Anti-static Bag

Carton

PP Belt

3pcs Drier

Carton Label

Cushion(Bottom)

Figure.10-1 packing method

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Air Transportation &

Sea / Land Transportation (40ft Container)

(L1130*50*50mm)

Film

(L1150*W1195*H140mm)

(L1400*50*50mm)

Sea / Land Transportation (40ft HQ Container)

(L1130*50*50mm)

(L625*50*50mm)

Film

(L1400*50*50mm)

(L1150*W1195*H140mm)

Figure.10-2 Packing method

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11. MECHANICAL CHARACTERISTICS

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