CMO V470H1-L03 Specification

Global LCD Panel Exchange Center

TFT LCD Approval Specification

MODEL NO.: V470H1 – L03

Customer:

Approved by:

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Issue Date:Dec.03.2007

Model No.: V470H1-L03

Approval

Note:

Approved By

Reviewed By

TV Head Division

LY Chen

QRA Dept. Product Development Div.

Tomy Chen WT Lin

­LCD TV Marketing and Product Management Div.

Prepared By

Ken Wu HT Hung

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CONTENTS -

1. GENERAL DESCRIPTION

1.1 OVERVIEW

1.2 FEATURES

1.3 APPLICATION

1.4 GENERAL SPECIFICATIONS

1.5 MECHANICAL SPECIFICATIONS

2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

2.2.2 BACKLIGHT INVERTER UNIT

------------------------------------------------------- 4

------------------------------------------------------- 5

3. ELECTRICAL CHARACTERISTICS --------------------------------------------------------7

3.1 TFT LCD MODULE

3.2 BACKLIGHT UNIT

3.2.1 CCFL

3.2.2 INVERTER CHARACTERISTICS

3.2.3 INVERTER INTERTFACE CHARACTERISTICS

(Cold Cathode Fluorescent Lamp) CHARACTERISTICS

4. BLOCK DIAGRAM -------------------------------------------------------13

4.1 TFT LCD MODULE

5. V470H1-L03 LCD INPUT TERMINAL PIN ASSIGNMENT --------------------------------------------------------14

5.1 TFT LCD MODULE LVDS input

5.2 TFT LCD MODULE Power input

5.3 BACKLIGHT UNIT

5.4 INVERTER UNIT

5.5 BLOCK DIAGRAM OF INTERFACE

5.6 LVDS INTERFACE

5.7 COLOR DATA INPUT ASSIGNMENT

6. INTERFACE TIMING -------------------------------------------------------22

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

6.2 POWER ON/OFF SEQUENCE

7. OPTICAL CHARACTERISTICS -------------------------------------------------------25

7.1 TEST CONDITIONS

7.2 OPTICAL SPECIFICATIONS

8. PRECAUTIONS -------------------------------------------------------29

8.1 ASSEMBLY AND HANDLING PRECAUTIONS

8.2 SAFETY PRECAUTIONS

9.DEFINITION OF LABELS ------------------------------------------------------30

10.

PACKAGING ------------------------------------------------------31

11 MECHANICAL CHARACTERISTICS -----------------------------------------------33

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REVISION HISTORY

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Issue Date:Dec.03.2007

Model No.: V470H1-L03

Approval

Version Date

Ver.2.0

Ver.2.1

Ver.2.2

Apr.06,’07

Aug.06,’07

Dec,03 ’07

Page

(New)

All

9

25

31

33

33

9

Section Description

All

Approval specification was first issued

3.2.2

7.2

3.2.2

Add power consumption at gray level 0 to 255

Update oscillating frequency

Update color chromaticity (Gx,Gy,Bx)

10

Update packing spec

11

Update mechanical characteristics

11

Update mechanical characteristics

Update inverter spec

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1. GENERAL DESCRIPTION

1.1 OVERVIEW

V470H1-L03 is a 47” TFT Liquid Crystal Display module with 20-CCFL Backlight unit and 2ch-LVDS

interface. This module supports 1920 x 1080 HDTV format and can display true 16.7M colors (8-bit/color).

The inverter module for backlight is built-in.

1.2 FEATURES

- High brightness (500nits)

- High contrast ratio (1500:1)

- Fast response time (Gray to Gray average 6.5 ms)

- High color saturation (72% NTSC)

- Full HDTV (1920 x 1080 pixels) resolution, true HDTV format

- DE (Data Enable) only mode

- LVDS (Low Voltage Differential Signaling) interface

- Optimized response time for 50/60 Hz frame rate

- Ultra wide viewing angle : Super MVA technology

- 180 degree rotation display option

1.3 APPLICATION

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Model No.: V470H1-L03

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- Standard Living Room TVs.

- Public Display Application.

- Home Theater Application.

- MFM Application.

1.4 GENERAL SPECIFICATI0NS

Item Specification Unit Note
Active Area 1039.68(H) x 584.82(V) (47” diagonal) mm
Bezel Opening Area 1050.6(H) x 594.4(V) mm
Driver Element a-si TFT active matrix - ­Pixel Number 1920x R.G.B. x 1080 pixel ­Pixel Pitch(Sub Pixel) 0.5415 (H) x 0.1805(V) mm ­Pixel Arrangement RGB vertical stripe - ­Display Colors 16.7M color ­Display Operation Mode Transmissive mode / Normally black - -

Surface Treatment

Note (1) Please refer to the attached drawings in chapter 9 for more information about the front and

back outlines.

Note (2) The spec of the surface treatment is temporarily for this phase. CMO reserves the rights to

change this feature.

Anti-Glare coating (Haze 25%)

Hard coating (3H)

- (2)

(1)

1.5 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note
Horizontal (H) - 1096 - mm

Module Size

Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.

Note (2) Module Depth does not include connectors.

Vertical (V) - 640 - mm
Depth (D) - 51 - mm

Weight - 15500 - g -

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2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

Item Symbol

Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 45 ºC (1), (2)

Shock (Non-Operating) S

Vibration (Non-Operating) V

Note (1) Temperature and relative humidity range is shown in the figure below.

(a) 90 %RH Max. (Ta Љ 40 ºC).

(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).

(c) No condensation.

Note (2) The maximum operating temperature is based on the test condition that the surface temperature of

NOP

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Model No.: V470H1-L03

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Value

Min. Max.

X, Y axis - 50 G (3), (5)

Z axis - 35 G (3), (5)

- 1.0 G (4), (5)

NOP

Unit Note

display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.

Thermal management should be considered in your product design to prevent the surface temperature

of display area from being over 65 ºC. The range of operating temperature may degrade in case of

improper thermal management in your product design.

Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, and ± Z.

Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.

Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that

the module would not be twisted or bent by the fixture. The module would not be twisted or bent by the

fixture.

10

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2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

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Issue Date:Dec.03.2007

Model No.: V470H1-L03

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Item Symbol

Min. Max.

Power Supply Voltage VCC -0.3 13.5 V

Logic Input Voltage VIN -0.3 3.6 V

Value

Unit Note

(1)

2.2.2 BACKLIGHT INVERTER UNIT

Item Symbol

Lamp Voltage V
Power Supply Voltage VBL 0 30 V (1)
Control Signal Level

Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation

should be restricted to the conditions described under Normal Operating Conditions.

Note (2) No moisture condensation or freezing.

Note (3) The control signals include On/Off Control, Internal PWM Control, External PWM Control and

Internal/External PWM Selection.

W

Ё

Value

Min. Max.

Ё

-0.3 7 V (1), (3)

3000 V

Unit Note

RMS

6

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3. ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE (Ta = 25 ± 2 ºC)

Parameter Symbol

Power Supply Voltage VCC 10.8 12 13.2 V (1)
Power Supply Ripple Voltage VRP - - 200 mV
Rush Current I

White - 1.4 2.0 A

Power Supply Current

Differential Input High

LVDS
Interface

Threshold Voltage
Differential Input Low
Threshold Voltage
Common Input Voltage V
Terminating Resistor R
Input High Threshold Voltage VIH 2.7 - 3.3 V CMOS

interface

Input Low Threshold Voltage V

Note (1) The module should be always operated within the above ranges.

Black - 0.6 - A
Vertical Stripe

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Issue Date:Dec.03.2007

Model No.: V470H1-L03

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Value

Min. Typ. Max.

- - 4.5 A (2)

RUSH

I

CC

- 1.2 - A

- - +100 mV

V

LVT H

-100 - - mV

V

LVT L

1.125 1.25 1.375 V

LVC

- 100 - ohm

T

0 - 0.7 V

IL

Unit Note

(3)

Note (2) Measurement condition:

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Vcc rising time is 470us

Vcc

0.9Vcc

0.1Vcc

GND

470us

Note (3) The specified power supply current is under the conditions at Vcc = 12V, Ta = 25 ± 2 ºC, fv = 60 Hz, whereas

a power dissipation check pattern below is displayed.

a. White Pattern

Active Area

c. Vertical Stripe Pattern

b. Black Pattern

Active Area

G

R

R

B

G

R

B

G

R R

G

B

B

B

B

R

R

R

G

G

G

G

B

B

B

B

R

R

Active Area

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3.2 BACKLIGHT UNIT

3.2.1 CCFL (Cold Cathode Fluorescent Lamp) CHARACTERISTICS (Ta = 25 ± 2 ºC)

Parameter Symbol

Lamp Input Voltage VL - 1750 - V
Lamp Current IL 5.5 6.0 6.5 mA

Lamp Turn On Voltage V

Operating Frequency FL 40 - 80 KHz (3)
Lamp Life Time LBL 50,000 - - Hrs (4)

S

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Value

Min. Typ. Max.

- - 2350 V

- - 2150 V

Unit Note

RMS

RMS

RMS

Issue Date:Dec.03.2007

Model No.: V470H1-L03

Approval

­ (1)

RMS

(2), Ta = 0 ºC
(2), Ta = 25 ºC

3.2.2 INVERTER CHARACTERISTICS (

Parameter Symbol

Ta = 25 ± 2 ºC)

Value

Min. Typ. Max.

Unit Note

Power Consumption PBL - 216 227 W (3)(4), IL = 6.0mA

Power Supply Voltage VBL 22.8 24 25.2 V

DC

Power Supply Current IBL - 9.0 - A
Input Ripple Noise - - - 912 mV

P-P

VBL=22.8V
Oscillating Frequency FW 42 45 48 kHz
Dimming frequency FB 150 160 170 Hz
Minimum Duty Ratio D

- 20 - %

MIN

Note (1) Lamp current is measured by utilizing AC current probe and its value is average by measuring

master and slave board.:

Note (2) The life time of a lamp is defined as when the brightness is larger than 50% of its original value and

the effective discharge length is longer than 80% of its original length (Effective discharge length is

defined as an area that has equal to or more than 70% brightness compared to the brightness at

the center point of lamp.) as the time in which it continues to operate under the condition at Ta = 25

2к and I

Note (3) The power supply capacity should be higher than the total inverter power consumption P

= 5.5 ~ 6.5 mArms.

L

. Since

BL

the pulse width modulation (PWM) mode was applied for backlight dimming, the driving current

changed as PWM duty on and off. The transient response of power supply should be considered

for the changing loading when inverter dimming.

Note (4) The measurement condition of Max. value is based on 47" backlight unit under input voltage 24V,

average lamp current 6.3 mA and lighting 30 minutes later.

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Inverter

(Master)

A
A

A
A

A
A

A
A

A
A

A
A

A
A

A
A

HV(Pink -)

2

HV (White +)

1

HV(Pink +)

2

HV (White -)

1

HV(Pink -)

2

HV (White +)

1

HV(Pink +)

2

HV (White -)

1

HV(Pink -)

2

HV (White +)

1

HV(Pink +)

2

HV (White -)

1

HV(Pink -)

2

HV (White +)

1

HV(Pink +)

2

LCD Module

HV (White -)

1

HV (Pink +)
HV (White +)

HV (Pink -)
HV (White -)

HV (Pink +)
HV (White +)

HV (Pink -)
HV (White -)

HV (Pink +)
HV (White +)

HV (Pink -)
HV (White -)

HV (Pink +)
HV (White +)

HV (Pink -)
HV (White -)

A

1
2

A

A

1
2

A

A

1
2

A

A

1
2

A

A

1
2

A

A

1
2

A

A

1
2

A

A

1
2

A

Inverter

(Slave)

A
A

A
A

HV (Pink -)

2

HV(Blue +)

1

HV (Pink +)

2

HV(Blue -)

1

HV (Pink +)
HV (White +)

HV (Pink -)
HV (White -)

A

1
2

A

A

1
2

A

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3.2.3 INVERTER INTERTFACE CHARACTERISTICS

Parameter Symbol

On/Off Control Voltage

Status Signal

Voltage

Voltage

VBL Rising Time Tr1 Ё 30 Ё 50 ms

VBL Falling Time Tf1 Ё 30 Ё 50 ms

Control Signal Rising Time Tr

Control Signal Falling Time Tf

PWM Signal Rising Time T

PWM Signal Falling Time T

Input impedance R

PWM Delay Time T

BLON Delay Time T

BLON Off Time T

Note (2) The power sequence and control signal timing are shown in the following figure.

ON

OFF

HI

LO

MAX

MIN

HI 2.0

LO

V

BLON

States

V

IPWM

V

EPWM

PWMR

PWMF

IN

PWM

on

OFF

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Model No.: V470H1-L03

Te st

Condition

Ё

Min. Typ. Max.

2.0

Ё
Ё

3.0 3.3 3.6 V Inverter Normal

Ё

Ё

2.85 3.0 3.15

Ё

ЁЁЁ
ЁЁЁ
ЁЁЁ
ЁЁЁ
Ё

Ё 100 300 mS

Ё 300 Ё 500 mS
Ё 300 Ё 500 mS

Value

Unit Note

Ё

0

Ё

5.0 V

0.8 V

0 0.8 V Inverter Abnormal

V maximum duty ratioInternal PWM Control

Ё

0

Ё

0

Ё

Ё

5.0 V duty on External PWM Control

0.8 V duty off

V minimum duty ratio

100 ms
100 ms

50 us
50 us

1

ЁЁ MӨ

Approval

Note (3) The power sequence and control signal timing must follow the figure below. For a certain reason,

the inverter has a possibility to be damaged with wrong power sequence and control signal

timing.

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V

VBLON

V

EPWM

V

IPWM

Tr1

BL

2.0V

0.8V

2.0V

0.8V

3.3V

Ton

Backlight on duration

Tr

Ext. Dimming Function

TPWMR

PWM

T

Floating

T

Tf

PWMF

Floating

Int. Dimming Function

0

0

0

0

Tf1

Toff

V

W

External

PWM

Period

External

PWM Duty

100%

Minimun

Duty

12

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4. BLOCK DIAGRAM OF INTERFACE

4.1 TFT LCD MODULE

ERX0(+/-)

ERX1(+/-)

ERX2(+/-)

ERX3(+/-)

ECLK(+/-)

DCLK(+/-)

DE

(GT05L-51S-H38 or equivalent )

INPUT CONNECTOR

FRAME

BUFFER

CONTROLLER

ORX0(+/-)

ORX1(+/-)

ORX2(+/-)

ORX3(+/-)

OCLK(+/-)

EN_DBL

Vcc

GND

SCAN DRIVER

TFT LCD PANEL

(1920x3x1080)

TIMING

DATA DRIVER (RSDS

DC/DC CONVERTER

& REFERENCE

VOLTAGE

GENERATOR

CN100: SD-52852-0870 (Molex) or equivalent

CN1

VBL

GND

Statu

E_PWM

I_PWM

BLON

INVERTER

CONNECTOR

CN1:S14B-PH-SM3-TB

(D)(LF) or equivalent

(Master)

CN3-CN22:SM02 (12.0)B-BHS-1-TB(LF)(JST)

or equivalent

BACKLIGHT

UNIT

CN23,CN25: SD-52852-2070 (Molex) or equivalent

INVERTER

CONNECTOR

CN2:S12B-PH-SM3-TB

(D)(LF) or equivalent

(Slave)

CN2.

VBL

GND

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5. INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD Module

Pin Name Description Note

1 N.C. No Connection
2 N.C. No Connection
3 N.C. No Connection
4 N.C. No Connection
5 N.C. No Connection
6 N.C. No Connection
7

SELLVDS LVDS data format Selection

8 RPF Display Rotation (4)(7)
9 ODSEL Overdrive Lookup Table Selection (5)(7)

10 N.C. No Connection (2)

EN_DBL

11
12 ORX0- Odd pixel, Negative LVDS differential data input. Channel 0
13 ORX0+ Odd pixel, Positive LVDS differential data input. Channel 0
14 ORX1- Odd pixel, Negative LVDS differential data input. Channel 1
15 ORX1+ Odd pixel, Positive LVDS differential data input. Channel 1
16 ORX2- Odd pixel, Negative LVDS differential data input. Channel 2
17 ORX2+ Odd pixel, Positive LVDS differential data input. Channel 2
18 GND Ground
19 OCLK- Odd pixel, Negative LVDS differential clock input.
20 OCLK+ Odd pixel, Positive LVDS differential clock input.
21 GND Ground
22 ORX3- Odd pixel, Negative LVDS differential data input. Channel 3
23 ORX3+ Odd pixel, Positive LVDS differential data input. Channel 3
24 N.C. No Connection (2)
25 N.C. No Connection (2)
26 N.C. No Connection (2)
27 N.C. No Connection (2)

28 ERX0-

29 ERX0+ Even pixel, Positive LVDS differential data input. Channel 0

30 ERX1-

31 ERX1+ Even pixel, Positive LVDS differential data input. Channel 1

32 ERX2-

33 ERX2+ Even pixel, Positive LVDS differential data input. Channel 2
34 GND Ground
35 ECLK- Even pixel, Negative LVDS differential clock input.
36 ECLK+ Even pixel, Positive LVDS differential clock input.
37 GND Ground

38 ERX3-

39 ERX3+ Even pixel, Positive LVDS differential data input. Channel 3
40 N.C. No Connection (2)
41 N.C. No Connection (2)
42 N.C. No Connection (2)
43 N.C. No Connection (2)
44 GND Ground

Enable Dynamic Backlight (6)(7)

Even pixel, Negative LVDS differential data input. Channel
0

Even pixel, Negative LVDS differential data input. Channel
1

Even pixel, Negative LVDS differential data input. Channel
2

Even pixel, Negative LVDS differential data input. Channel
3

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(3)(7)

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45 GND Ground
46 GND Ground
47 GND Ground
48 VCC Power input (+12V)
49 VCC Power input (+12V)
50 VCC Power input (+12V)
51 VCC Power input (+12V)

Note (1) Connector part no.: GT05L-51S-H38 (LG). or equivalent

Note (2) Please be reserved to open.

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Note (3)

Low : VESA LVDS Format (default), High : JEIDA LVDS Format.

Note (4) Low : normal display (default), High : display with 180 degree rotation

Note (5) Overdrive lookup table selection. The overdrive lookup table should be selected in

accordance to the frame rate to optimize image quality.

ODSEL Note

L or OPEN Lookup table was optimized for 60 Hz frame rate.

H Lookup table was optimized for 50 Hz frame rate.

Note (6) Low : disable dynamic backlight (default), High : enable dynamic backlight function

Note (7) Low = Open or connect to GND, High = Connect to +3.3V

5.2 BACKLIGHT UNIT

The pin configuration for the housing and the leader wire is shown in the table below.

CN3-CN22: BHR-04VS-1 (JST). or equivalent

Pin Name Description Wire Color

1 HV High Voltage Pink
2 HV High Voltage White

Note (1) The backlight interface housing for high voltage side is a model BHR-04VS-1,

manufactured by JST. The mating header on inverter part number is

SM02 (12.0)B-BHS-1-TB(LF). or equivalent

1 HV(White)

2 HV(Pink)

1 HV(White)

2 HV(Pink)

1 HV(White)

2 HV(Pink)

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1 HV(Pink)

2 HV(White)

1 HV(Pink)

2 HV(White)

1 HV(Pink)

2 HV(White)

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5.3 INVERTER UNIT

CN1 (Header): S14B-PH-SM3-TB (D)(LF)(JST) or equivalent.

Pin No. Symbol Description

1
2
3
4
5
6
7
8
9

10

VBL +24V

GND GND

power input

DC

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Model No.: V470H1-L03

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11

12 E_PWM External PWM control signal

13 I_PWM Internal PWM Control Signal

14 BLON Backlight on/off control

Status

Normal (3.3V)
Abnormal (GND)

Notice:

1. PIN 12:External PWM Control (Use Pin 12): Pin 13 must open.

2. PIN 13:Intermal PWM Control (Use Pin 13): 0V~3.0V and Pin 12 must open.

3. Pin 12(E_PWM) and Pin 13(I_PWM) can’t open in same period.

CN2 (Header): S12B-PH-SM3-TB (D)(LF)(JST) or equivalent.

Pin No. Symbol Description

1
2
3
4
5
6
7
8
9

10
11 NC NC
12 NC NC

VBL +24V

GND GND

power input

DC

CN3-CN22 (Header): SM02(12.0)B-BHS-1-TB (LF)(JST) or equivalent

Pin No. Symbol Description

1
2

CCFL HOT
CCFL HOT

CCFL high voltage
CCFL high voltage

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CN23-CN25 (Header): 52852-2070 (Molex) or equivalent

Pin No. Symbol Description

1 Board to Board

2 Board to Board

3 Board to Board

4 Board to Board

5 Board to Board

6 Board to Board
7 Board to Board
8 Board to Board
9 Board to Board

10

Note (1) Floating of any control signal is not allowed.

Control

Signal

Board to Board

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CN100: 52582-0870(Molex) or equivalent

Pin No. Symbol Description

1 Board to Board

2 Board to Board

3 Board to Board

4 Board to Board

5 Board to Board

6 Board to Board
7 Board to Board
8

Note (1) Floating of any control signal is not allowed.

Control

Signal

Board to Board

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G0-EG

0

G0-EG

0

r

0

p

ORx0

p

OG0

OB0

C

OG0

OB0

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5.4 BLOCK DIAGRAM OF INTERFACE

CNF1

Issue Date:Dec.03.2007

Model No.: V470H1-L03

Approval

ER0-ER7

E

-EB7

EB

DE

OR0-OR7

-OG7

-OB7

D

LK

Host

Graphics

Controller

ERx0+

TxIN

ERx

ERx1+

7

ERx1-

ERx2+

ERx2-

ERx3+

ERx3-

51Ө

51Ө

51Ө

51Ө

51Ө

51Ө
51Ө

51Ө

100pF

100

100pF

100pF

F

-

RxOUT

ER0-ER7

E

-EB7

EB

DE

OR0-OR7

-OG7

7

-OB7

ECLK+

PLL

51Ө

-

100pF

51Ө

PLL

DCLK

Timing

ORx0+

-

ORx1+

ORx1-

51Ө

51Ө

51Ө

100pF

100

F

Controlle

LVDS Transmitter

THC63LVDM83A

(LVDF83A)

PLL

ORx2+

ORx2-

ORx3+

ORx3-

OCLK+

-

18

51Ө

100pF

51Ө
51Ө

100pF

51Ө

51Ө

100pF

51Ө

PLL

LVDS Receiver

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ER0~ER7 : Even pixel R data

EG0~EG7 : Even pixel G data

EB0~EB7 : Even pixel B data

OR0~OR7 : Odd pixel R data

OG0~OG7: Odd pixel G data

OB0~OB7 : Odd pixel B data

DE : Data enable signal

DCLK : Data clock signal

Notes: (1) The system must have the transmitter to drive the module.

(2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line

when it is used differentially.

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Model No.: V470H1-L03

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(3) Two pixel data send into the module for every clock cycle. The first pixel of the frame is even pixel

and the second pixel is odd pixel.

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5.5 LVDS INTERFACE

TRANSMITTER

SIGNAL

THC63LVDM83A

PIN INPUT Host TFT-LCD PIN OUTPUT

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INTERFACE CONNECTOR

RECEIVER

THC63LVDF84A

Issue Date:Dec.03.2007

Model No.: V470H1-L03

Approval

TFT CONTROL

INPUT

24bit

R0
R1
R2
R3
R4
R5
G0
G1
G2
G3
G4
G5

B0
B1
B2
B3
B4

B5
DE
R6
R7
G6
G7

B6

B7

RSVD 1
RSVD 2
RSVD 3

51
52
54
55
56

3
4
6

7
11
12
14
15
19
20
22
23
24
30
50

2

8
10
16
18
25
27
28

TxIN0
TxIN1
TxIN2
TxIN3
TxIN4
TxIN6
TxIN7
TxIN8

TxIN9
TxIN12
TxIN13
TxIN14
TxIN15
TxIN18
TxIN19
TxIN20
TxIN21
TxIN22
TxIN26
TxIN27

TxIN5
TxIN10
TxIN11
TxIN16
TxIN17
TxIN23
TxIN24
TxIN25

TA OUT0+

TA OUT0-

TA OUT1+

TA OUT1-

TA OUT2+

TA OUT2-

TA OUT3+

TA OUT3-

Rx 0+

Rx 0-

Rx 1+

Rx 1-

Rx 2+

Rx 2-

Rx 3+

Rx 3-

27
29
30
32
33
35
37
38
39
43
45
46
47
51
53
54
55

1
6

7
34
41
42
49
50

2

3

5

Rx OUT0
Rx OUT1
Rx OUT2
Rx OUT3
Rx OUT4
Rx OUT6
Rx OUT7
Rx OUT8

Rx OUT9
Rx OUT12
Rx OUT13
Rx OUT14
Rx OUT15
Rx OUT18
Rx OUT19
Rx OUT20
Rx OUT21
Rx OUT22
Rx OUT26
Rx OUT27

Rx OUT5
Rx OUT10

Rx OUT11
Rx OUT16
Rx OUT17
Rx OUT23
Rx OUT24
Rx OUT25

R0
R1
R2
R3
R4
R5
G0
G1
G2
G3
G4
G5

B0
B1
B2
B3
B4

B5
DE
R6
R7
G6
G7

B6

B7

Not connect
Not connect
Not connect

DCLK 31

R0~R7: Pixel R Data (7; MSB, 0; LSB)

G0~G7: Pixel G Data (7; MSB, 0; LSB)

B0~B7: Pixel B Data (7; MSB, 0; LSB)

DE : Data enable signal

DCLK : Data clock signal

Notes: (

1) RSVD (reserved) pins on the transmitter shall be “H” or “L”.

TxCLKINTxCLK OUT+

TxCLK OUT-

RxCLK IN+

RxCLK IN-

20

26 RxCLK OUT DCLK

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5.7 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for the

color. The higher the binary input, the brighter the color. The table below provides the assignment of the

color versus data input.

Color

R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0

Black
Red

Green
Basic
Colors

Gray
Scale
Of
Red

Gray
Scale
Of
Green

Gray
Scale
Of
Blue

Note (1) 0: Low Level Voltage, 1: High Level Voltage

Blue

Cyan

Magenta

Yellow

White

Red (0) / Dark

Red (1)

Red (2)

:

:
Red (253)
Red (254)
Red (255)
Green (0) / Dark
Green (1)
Green (2)

:

:
Green (253)
Green (254)
Green (255)
Blue (0) / Dark
Blue (1)
Blue (2)

:

:
Blue (253)
Blue (254)
Blue (255)

0

0

1

1

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

Red Green Blue

0

0

1

1

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

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0

0

0

0

0

0

1

1

1

1

0

0

0

0

0

0

1

1

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

0

0

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

1

0

0

0

0

1

0

0

0

:

:

:

:

:

:

:

:

:

:

:

:

1

1

0

1

0

0

1

1

1

0

0

0

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

:

:

:

:

0

0

0

0

1

1

0

0

0

0

1

1

0

0

0

0

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

Data Signal

0

0

0

0

0

0

0

0

1

1

1

1

0

0

0

0

1

1

1

1

0

0

0

0

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

Issue Date:Dec.03.2007

Model No.: V470H1-L03

Approval

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

0

1

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

1

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

0

0

1

1

1

1

1

1

0

1

0

0

1

1

1

1

1

1

1

0

0

0

1

1

1

1

1

1

1

1

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6. INTERFACE TIMING

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

The input signal timing specifications are shown as the following table and timing diagram.

Signal Item Symbol Min. Typ. Max. Unit Note

Frequency 1/Tc 60 74 80 MHZ -LVDS Receiver

Clock

Data

Vertical Active
Display Term

Horizontal Active
Display Term

Note (1) (ODSEL) = (H). Please refer to 5.1 for detail information.

Input cycle to cycle jitter Trcl - - 200 ps ­Setup Time Tlvsu 600 - - ps LVDS Receiver
Hold Time Tlvhd 600 - - ps

Frame Rate

Total Tv 1115 1125 1139 Th Tv=Tvd+Tvb
Display Tvd 1080 1080 1080 Th ­Blank Tvb 35 45 59 Th ­Total Th 1050 1100 1150 Tc Th=Thd+Thb
Display Thd 960 960 960 Tc ­Blank Thb 90 140 190 Tc -

Fr5 47 50 53 Hz (1)

6 57 60 63 Hz (2)

Fr

Issue Date:Dec.03.2007

Model No.: V470H1-L03

Approval

(2) (ODSEL) = (L). Please refer to 5.1 for detail information.

INPUT SIGNAL TIMING DIAGRAM

Tv

Tvd

DE

Th

DCLK

Tc

Thb

DE

Tvb

Thd

DATA

Valid display data ( 960 clocks)

LVDS INPUT INTERFACE TIMING DIAGRAM

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RXCLK+/-

RXn+/-

Tlvsu

Tlvhd

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Issue Date:Dec.03.2007

Model No.: V470H1-L03

Approval

Tc

1T‘
14

3T‘
14

5T‘
14

7T‘
14

9T‘
14

11T‘

14

13T‘

14

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6.2 POWER ON/OFF SEQUENCE

To prevent a latch-up or DC operation of LCD module, the power on/off sequence should follow the

diagram below.

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Issue Date:Dec.03.2007

Model No.: V470H1-L03

Approval

Note.

(1) The supply voltage of the external system for the module input should follow the definition of Vcc.

(2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the

LCD operation or the LCD turns off before the backlight turns off, the display may momentarily

become abnormal screen. There is no reliability issue when the T5, T6 timing missing the range.

(3) In case of VCC is in off level, please keep the level of input signals on the low or high impedance.

(4) T4 should be measured after the module has been fully discharged between power off and on

period.

(5) Interface signal shall not be kept at high impedance when the power is on.

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7. OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

Item Symbol Value Unit
Ambient Temperature Ta
Ambient Humidity Ha
Supply Voltage VCC 12V V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
Lamp Current I
Oscillating Frequency (Inverter) F
Vertical Frame Rate Fr 60 Hz

7.2 OPTICAL SPECIFICATIONS

The relative measurement methods of optical characteristics are shown in 7.2. The following items should be

measured under the test conditions described in 7.1 and stable environment shown in Note (6).

Item Symbol Condition Min. Typ. Max. Unit Note

Contrast Ratio CR 1800 2000 - - Note (2)

Response Time

Center Luminance of White L

White Variation
Cross Talk CT - - 4 % Note (5)

Red

Green
Color
Chromaticity

Viewing
Angle

Blue

White

Color Gamut

Horizontal

Vertica l

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Model No.: V470H1-L03

25r2

50r10

L

W

Gray to

gray

C

GW

T

=0q, TY =0q

x

Rx 0.638 ­Ry

Viewing Angle at
Normal Direction

Gx 0.268 ­Gy
Bx 0.143 -

By
Wx
Wy

Tx+

T

-

x

TY+

T

Y

-

CRt20

6.0r0.5
47r2

- 6.5 12 ms Note (3)

450 500 -

- - 1.3 - Note (7)

0.331

Typ.-

0.03

0.593

Typ.+

0.03

0.068

0.280

0.285
70 72 - % NTSC
80 88 ­80 88 ­80 88 ­80 88 -

Approval

o

C

%RH

mA

KHz

cd/

Note (4)

2

m

-

­Note (6)

-

-

-

Deg. Note (1)

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T

Note (1) Definition of Viewing Angle (Tx, Ty):

Viewing angles are measured by Eldim EZ-Contrast 160R

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Issue Date:Dec.03.2007

Model No.: V470H1-L03

Approval

Normal

Tx = Ty = 0º

Ty- Ty

TX- = 90º

x-

Tx

6 o’clock

T

y- = 90º

y-

Note (2) Definition of Contrast Ratio (CR):

The contrast ratio can be calculated by the following expression.

Contrast Ratio (CR) = L255 / L0

L255: Luminance of gray level 255

L 0: Luminance of gray level 0

CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note

(7)

Note (3) Definition of Gray-to-Gray Switching Time:

Tx

y+

12 o’clock direction

T

y+ = 90º

x+

TX+ = 90º

100%

90%

Optical

Response

10%

0%

Gray to gray
Switching time

Gray to gray
Switching time

The driving signal means the signal of gray level 0, 63, 127, 191, and 255.

Gray to gray average time means the average switching time of gray level 0, 63,127,191,255 to each other.

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A

A

Note (4) Definition of Luminance of White (LC):

Measure the luminance of gray level 255 at center point.

LC = L (5), where L (x) is corresponding to the luminance of the point X at the figure in Note (7).

Note (5) Definition of Cross Talk (CT):

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Model No.: V470H1-L03

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CT = | Y

– YA | / YAu 100 (%)

B

Where:

Y

= Luminance of measured location without gray level 0 pattern (cd/m2)

A

Y

= Luminance of measured location with gray level 0 pattern (cd/m2)

B

ctive Area

Gray 128

Y

(D/8,W/2)

A, L

Y

(D/2,7W/8)

A, D

(0, 0)

Note (6) Measurement Setup:

The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt

temperature change during measuring. In order to stabilize the luminance, the measurement

should be executed after lighting backlight for 1 hour in a windless room.

Y

A, U

Y

A, R

(D, W)

(D/2,W/8)

(7D/8,W/2)

(D/4,W/4)

Y

(D/8,W/2)

B, L

Y

(D/2,7W/8)

B, D

(0, 0)

ctive Area

Gray 0

Gray 0

Gray 128

Y

(D/2,W/8)

B, U

Y

(7D/8,W/2)

B, R

(3D/4,3W/4)

(D, W)

LCD Module

LCD Panel

Center of the Screen

Display Color Analyzer

(Minolta CA210)

Light Shield Room

(Ambient Luminance < 2 lux)

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Note (7) Definition of White Variation (GW):

Measure the luminance of gray level 255 at 5 points

GW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]

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Model No.: V470H1-L03

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Horizontal Line

D

D/4 D/2 3D/4

W/4

W/2

W

Vertical Line

3W/4

1 2

X

5

3 4

Active Area

: Test Point

X=1 to 5

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8. PRECAUTIONS

8.1 ASSEMBLY AND HANDLING PRECAUTIONS

(1) Do not apply rough force such as bending or twisting to the module during assembly.

(2) It is recommended to assemble or to install a module into the user’s system in clean working areas. The

dust and oil may cause electrical short or worsen the polarizer.

(3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and Backlight.

(4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the

damage and latch-up of the CMOS LSI chips.

(5) Do not plug in or pull out the I/F connector while the module is in operation.

(6) Do not disassemble the module.

(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and

easily scratched.

(8) Moisture can easily penetrate into LCD module and may cause the damage during operation.

(9) High temperature or humidity may deteriorate the performance of LCD module. Please store LCD

modules in the specified storage conditions.

(10) When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the

response time will become slow, and the starting voltage of CCFL will be higher than that of room

temperature.

8.2 SAFETY PRECAUTIONS

(1) The startup voltage of a Backlight is approximately 1000 Volts. It may cause an electrical shock while

assembling with the inverter. Do not disassemble the module or insert anything into the Backlight unit.

(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In

case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.

(3) After the module’s end of life, it is not harmful in case of normal operation and storage.

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)

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9. DEFINITION OF LABELS

9.1 CMO MODULE LABEL

The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.

Approval

CHI MEI

OPTOELECTRONICS

V470H1 -L03Rev. XX

X X X X X X X Y M D L N N N N

MADE IN TAIWAN

CHI MEI

OPTOELECTRONICS

(a) Model Name: V470H1-L03

(b) Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.

(c) Serial ID: X X

X X X X X Y M D L N N N N

V470H1 -L03Rev. XX

X X X X X X X Y M D L N N N N

MADE IN TAI

Serial No.

E207943

MADE IN TAIWAN

RoHS

E207943

MADE IN TAIWAN

MADE IN CHINA

LEOO

or CAPG

RoHS

Serial ID includes the information as below:

(a) Manufactured Date: Year: 0~9, for 2000~2009

Month: 1~9, A~C, for Jan. ~ Dec.

Day: 1~9, A~Y, for 1

(b) Revision Code: Cover all the change

(c) Serial No.: Manufacturing sequence of product

(d) Product Line: 1 -> Line1, 2 -> Line 2, …etc.

Product Line

Year, Month, Date

CMO Internal Use

CMO Internal Use

Revision

CMO Internal Use

st

to 31st, exclude I ,O, and U.

30

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10. PACKAGING

10.1 PACKING SPECIFICATIONS

(1) 3 LCD TV modules / 1 Box

(2) Box dimensions : 1190(L)x280(W)x720(H)mm

(3) Weight : approximately 52Kg ( 3 modules per box)

10.2 PACKING METHOD

Figures 9-1 and 9-2 are the packing method

LCD TV Module

www.panelook.com

Issue Date:Dec.03.2007

Model No.: V470H1-L03

Approval

3pcs Drier

Cushion(Bottom)

Anti-static Bag

Carton

PP Belt

Carton Label

Figure.10-1 packing

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Sea / Land Transportation (40ft Container)

www.panelook.com

Issue Date:Dec.03.2007

Model No.: V470H1-L03

Approval

Air Transportation &

(L1130*50*50mm)

Film

(L1150*W1195*H140mm)

(L1400*50*50mm)

Sea / Land Transportation (40ft HQ Container)

(L1130*50*50mm)

(L625*50*50mm)

Film

(L1400*50*50mm)

(L1150*W1195*H140mm)

Figure.10-2 packing

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&+ ,0(,

11. MECHANICAL CHARACTERISTIC

www.panelook.com

Issue Date:Dec.03.2007

Model No.: V470H1-L03

Approval

࡛ભሽ՗ٝڶૻֆ׹

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One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.2

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Global LCD Panel Exchange Center

&+ ,0(,

www.panelook.com

Issue Date:Dec.03.2007

Model No.: V470H1-L03

Approval

࡛ભሽ՗ٝڶૻֆ׹

34

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.2

www.panelook.com

Global LCD Panel Exchange Center

&+ ,0(,

www.panelook.com

Issue Date:Dec.03.2007

Model No.: V470H1-L03

Approval

࡛ભሽ՗ٝڶૻֆ׹

35

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.2

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

Issue Date:Dec.03.2007

Model No.: V470H1-L03

Approval

36

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.2

www.panelook.com