The information described in this technical specification is tentative and it is possible to be changed without prior
notice. Please contact CMO ’s representative while your product design is based on this specification.
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1. GENERAL DESCRIPTION
1.1 OVERVIEW
V470H1-L02 is a 47” TFT Liquid Crystal Display module with 24-CCFL Backlight unit and 2ch-LVDS
interface. This module supports 1920 x 1080 HDTV format and can display true 16.7M colors (8-bit/color).
The inverter module for backlight is built-in.
1.2 FEATURES
- High brightness (500 nits)
- High contrast ratio (1200:1)
- Fast response time (<6.5 ms)
- High color saturation (NTSC 75%)
- Full HDTV (1920 x 1080 pixels) resolution, true HDTV format
- DE (Data Enable) only mode
- LVDS (Low Voltage Differential Signaling) interface
- Optimized response time for 50/60 Hz frame rate
- Ultra wide viewing angle : Super MVA technology
- 180 degree rotation display option
1.3 APPLICATION
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Model No.: V470H1-L02
Preliminary
-Standard Living Room TVs.
-Public Display Application.
-Home Theater Application.
-MFM Application.
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note
Active Area 1042.56(H) x 586.44(V) (47” diagonal) mm
Bezel Opening Area 1050.6(H) x 594.4(V) mm
Driver Element a-si TFT active matrix - Pixel Number 1920x R.G.B. x 1080 pixel Pixel Pitch(Sub Pixel) 0.543(H) x 0.543(V) mm Pixel Arrangement RGB vertical stripe - Display Colors 16.7M color Display Operation Mode Transmissive mode / Normally black - Surface Treatment Anti Glare - (2)
Note (1) Please refer to the attached drawings in chapter 9 for more information about the front and
back outlines.
Note (2) The spec of the surface treatment is temporarily for this phase. CMO reserves the rights to
change this feature.
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. UnitNote
Horizontal (H) - 1096- mm
Module Size
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Vertical (V) - 640- mm
Depth (D) - 48.1- mm
Weight - 20000 - g -
(1)
(1), (2)
Note (2) Module Depth does not include connectors.
3
The information described in this technical specification is tentative and it is possible to be changed without prior
notice. Please contact CMO ’s representative while your product design is based on this specification.
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2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 45 ºC (1), (2)
Shock (Non-Operating) S
Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of
NOP
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Issue Date: Sep.29.2005
Model No.: V470H1-L02
Preliminary
Value
Min. Max.
X, Y axis- 50 G (3), (5)
Z axis - 35 G (3), (5)
- 1.0 G (4), (5)
NOP
Unit Note
display area is less than or equal to 60 ºC with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in your product design to prevent the surface temperature
of display area from being over 60 ºC. The range of operating temperature may degrade in case of
improper thermal management in your product design.
Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, and ± Z.
Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that
the module would not be twisted or bent by the fixture. The module would not be twisted or bent by the
fixture.
4
The information described in this technical specification is tentative and it is possible to be changed without prior
notice. Please contact CMO ’s representative while your product design is based on this specification.
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2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
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Issue Date: Sep.29.2005
Model No.: V470H1-L02
Preliminary
Item Symbol
Min. Max.
Power Supply Voltage VCC -0.3 20 V
Logic Input Voltage VIN -0.3 3.6 V
Value
Unit Note
(1)
2.2.2 BACKLIGHT INVERTER UNIT
Item Symbol
Lamp Voltage V
Power Supply Voltage VBL 0 140 V(1)
Auxiliary Power Supply Voltage
Control Signal Level
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
should be restricted to the conditions described under Normal Operating Conditions.
Note (2) No moisture condensation or freezing.
Note (3)The control signals include On/Off Control, Internal PWM Control, External PWM Control and
Internal/External PWM Selection.
W
V
0 23 V (1)
AUX
Ё
Value
Min.Max.
Ё
-0.3 7 V (1), (3)
5000 V
Unit Note
RMS
5
The information described in this technical specification is tentative and it is possible to be changed without prior
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3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE (Ta = 25 ± 2 ºC)
Parameter Symbol
Power Supply Voltage V
Power Supply Ripple Voltage VRP - - 200 mV
Rush Current I
White - 1.5- A
Power Supply Current
Differential Input High
LVDS
Interface
Threshold Voltage
Differential Input Low
Threshold Voltage
Common Input Voltage V
Terminating Resistor R
Input High Threshold Voltage VIH 2.7 - 3.3 V CMOS
interface
Input Low Threshold Voltage V
Black - 0.7- A
Vertical Stripe
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Issue Date: Sep.29.2005
Model No.: V470H1-L02
Preliminary
Value
Min. Typ. Max.
CC
- - 4.5 A (2)
RUSH
I
CC
10.8 12 13.2
16.2 18 19.8
- TBD - A
- - +100 mV
V
LVT H
-100 - - mV
V
LVT L
1.125 1.25 1.375 V
LVC
- 100 - ohm
T
0 - 0.7 V
IL
Unit Note
V (1)
(3)
Note (1) The module should be always operated within the above ranges.
Note (2) Measurement condition:
(High to Low)
(Control Signal)
SW
+24V
Vcc
R1
47K
R2
1K
47K
VR1
C1
1uF
Q1 2SK1475
FUSE
Q2
2SK1470
C2
0.01uF
C3
1uF
Vcc
(LCD Module Input)
6
The information described in this technical specification is tentative and it is possible to be changed without prior
notice. Please contact CMO ’s representative while your product design is based on this specification.
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GND
Note (3) The specified power supply current is under the conditions at Vcc = 18 V/12V, Ta = 25 ± 2 ºC,
f
= 60 Hz, whereas a power dissipation check pattern below is displayed.
Lamp Input Voltage VL - 1530 - V
Lamp Current IL 4.7 5.2 5.7 mA
Lamp Turn On Voltage V
Operating Frequency FL 40 - 70 KHz (3)
Lamp Life Time LBL 50,000 - - Hrs (4)
S
Min. Typ. Max.
- - 1915 V
- - 1742 V
Value
Unit Note
-
RMS
(1)
RMS
(2), Ta = 0 ºC
RMS
(2), Ta = 25 ºC
RMS
7
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3.2.2 INVERTER CHARACTERISTICS (Ta = 25 ± 2 ºC)
Parameter Symbol
Power Consumption P
Power Supply Voltage VBL 22.8 24 25.2 V
Power Supply Current IBL - 8.2 - A Non Dimming
Input Ripple Noise - - - 500 mV
Backlight Turn on
Voltage
Oscillating Frequency FW 48 51 54 kHz
Dimming frequency FB 150 160 170 Hz
Minimum Duty Ratio D
Note (1) Lamp current is measured by utilizing high frequency current meters as shown below:
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Issue Date: Sep.29.2005
Model No.: V470H1-L02
Preliminary
Value
Min. Typ. Max.
- 200 - W (5), IL = 5.2mA
BL
V
BS
- 20 - %
MIN
1915 - 1742
- - V
Unit Note
DC
P-P
V
Ta = 0 º C
RMS
Ta = 25 ºC
RMS
VBL=22.8V
Note (2) The lamp starting voltage V
should be applied to the lamp for more than 1 second after startup.
S
Otherwise the lamp may not be turned on.
Note (3) The lamp frequency may produce interference with horizontal synchronous frequency of the
display input signals, and it may result in line flow on the display. In order to avoid interference, the
lamp frequency should be detached from the horizontal synchronous frequency and its harmonics
as far as possible.
Note (4) The life time of a lamp is defined as when the brightness is larger than 50% of its original value and
the effective discharge length is longer than 80% of its original length (Effective discharge length is
defined as an area that has equal to or more than 70% brightness compared to the brightness at
the center point of lamp.) as the time in which it continues to operate under the condition at Ta = 25
2к and I
Note (5) The power supply capacity should be higher than the total inverter power consumption P
= 4.7 ~ 5.7 mArms.
L
. Since
BL
the pulse width modulation (PWM) mode was applied for backlight dimming, the driving current
changed as PWM duty on and off. The transient response of power supply should be considered
for the changing loading when inverter dimming.
8
The information described in this technical specification is tentative and it is possible to be changed without prior
notice. Please contact CMO ’s representative while your product design is based on this specification.
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Issue Date: Sep.29.2005
Model No.: V470H1-L02
Preliminary
Inverter
(Master)
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
HV (White -)
1
HV(Pink -)
2
HV (White +)
1
HV(Pink +)
2
HV (White -)
1
HV(Pink -)
2
HV (White +)
1
HV(Pink +)
2
HV (White -)
1
HV(Pink -)
2
HV (White +)
1
HV(Pink +)
2
HV (White -)
1
HV(Pink -)
2
HV (White +)
1
HV(Pink +)
2
LCD Module
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
A
1
2
A
A
1
2
A
A
1
2
A
A
1
2
A
A
1
2
A
A
1
2
A
A
1
2
A
A
1
2
A
Inverter
(Slavor)
A
A
A
A
A
A
A
A
HV(Blue -)
1
HV (Pink -)
2
HV(Blue +)
1
HV (Pink +)
2
HV(Blue -)
1
HV (Pink -)
2
HV(Blue +)
1
HV (Pink +)
2
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
HV (Pink +)
HV (White +)
HV (Pink -)
HV (White -)
A
1
2
A
A
1
2
A
A
1
2
A
A
1
2
A
9
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y
y
3.2.3 INVERTER INTERTFACE CHARACTERISTICS
Parameter Symbol
On/Off Control Voltage
Select Voltage
Voltage
Voltage
Control Signal Rising Time Tr
Control Signal Falling Time Tf
PWM Signal Rising Time T
PWM Signal Falling Time T
Input impedance R
BLON Delay Time T
BLON Off Time T
Note (1) The SEL signal should be valid before backlight turns on by BLON signal. It is inhibited to change
ON
OFF
HI
LO
MAX
MIN
HI 2.0
LO
V
V
V
V
BLON
IPWM
EPWM
PWMR
PWMF
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Test
Condition
Ё
Ё
SEL
V
V
IN
on
off
Ё
Ё
= L
SEL
= H
SEL
ЁЁЁ
ЁЁЁ
ЁЁЁ
ЁЁЁ
Ё
Ё 1 ЁЁ ms
Ё 1 ЁЁ ms
Value
Min.Typ.Max.
2.0
0
2.0
0
Ё
Ё
Ё-
Ё
ЁЁ
Ё
0
Ё
0
Ё
5.0V
0.8V
5.0V Internal/External PWM
0.8V
3.0V maximum duty ratioInternal PWM Control
Ё
5.0V duty on External PWM Control
0.8V dut
100 ms
100 ms
50 us
50 us
1
ЁЁ MӨ
Issue Date: Sep.29.2005
Model No.: V470H1-L02
Preliminary
Unit Note
V minimum dut
off
ratio
the internal/external PWM selection (SEL) during backlight turn on period.
Note (2) The power sequence and control signal timing are shown in the following figure.
Note (3) The power sequence and control signal timing must follow the figure below. For a certain reason,
the inverter has a possibility to be damaged with wrong power sequence and control signal
timing.
10
The information described in this technical specification is tentative and it is possible to be changed without prior
notice. Please contact CMO ’s representative while your product design is based on this specification.
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BL
V
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Issue Date: Sep.29.2005
Model No.: V470H1-L02
Preliminary
V
V
V
BLON
V
SEL
EPWM
IPWM
V
0
on1
T
T
off1
2.0V
0
0.8V
Backlight on duration
r
T
T
f
2.0V
0
0.8V
Ext. Dimming Function
T
T
PWMR
PWMF
Int. Dimming Function
2.0V
0
0.8V
3.0V
0
W
External
PWM
Period
External
PWM Duty
100%
Minimun
Duty
11
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4. BLOCK DIAGRAM OF INTERFACE
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Issue Date: Sep.29.2005
Model No.: V470H1-L02
Preliminary
12
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5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD Module
Connector part no. : FI-R51S-HF (JAE) or equivalent.
Pin Name Description Note
1 GND Ground
2 N.C. No Connection
3 N.C. No Connection
4 N.C. No Connection
5 N.C. No Connection
6 N.C. No Connection
7 NC No Connection
8 RPF Display Rotation (1)
9 ODSEL
10 LCS Low color shift (3)
11 GND Ground
12 ORX0- Odd pixel, Negative LVDS differential data input. Channel 0
13 ORX0+ Odd pixel, Positive LVDS differential data input. Channel 0
14 ORX1- Odd pixel, Negative LVDS differential data input. Channel 1
15 ORX1+ Odd pixel, Positive LVDS differential data input. Channel 1
16 ORX2- Odd pixel, Negative LVDS differential data input. Channel 2
17 ORX2+ Odd pixel, Positive LVDS differential data input. Channel 2
18 GND Ground
19 OCLK- Odd pixel, Negative LVDS differential clock input.
20 OCLK+ Odd pixel, Positive LVDS differential clock input.
21 GND Ground
22 ORX3- Odd pixel, Negative LVDS differential data input. Channel 3
23 ORX3+ Odd pixel, Positive LVDS differential data input. Channel 3
24 N.C. No Connection
25 N.C. No Connection
26 N.C. No Connection
27 N.C. No Connection
28 ERX0- Even pixel, Negative LVDS differential data input. Channel 0
29 ERX0+ Even pixel, Positive LVDS differential data input. Channel 0
30 ERX1- Even pixel, Negative LVDS differential data input. Channel 1
31 ERX1+ Even pixel, Positive LVDS differential data input. Channel 1
32 ERX2- Even pixel, Negative LVDS differential data input. Channel 2
33 ERX2+ Even pixel, Positive LVDS differential data input. Channel 2
34 GND Ground
35 ECLK- Even pixel, Negative LVDS differential clock input.
36 ECLK+ Even pixel, Positive LVDS differential clock input.
37 GND Ground
38 ERX3- Even pixel, Negative LVDS differential data input. Channel 3
39 ERX3+ Even pixel, Positive LVDS differential data input. Channel 3
40 N.C. No Connection
41 N.C. No Connection
42 N.C. No Connection
43 N.C. No Connection
44 GND Ground
45 GND Ground
46 GND Ground
Overdrive Lookup Table Selection(2)
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Preliminary
13
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47 GND Ground
48 VCC Power input (+12V or +18.0V)
49 VCC Power input (+12V or +18.0V)
50 VCC Power input (+12V or +18.0V)
51 VCC Power input (+12V or +18.0V)
Note (1) Low : normal display (default), High : display with 180 degree rotation
Note (2) Overdrive lookup table selection. The overdrive lookup table should be selected in
accordance to the frame rate to optimize image quality.
ODSEL Note
L Lookup table was optimized for 60 Hz frame rate.
H Lookup table was optimized for 50 Hz frame rate.
Note (3) Low : normal display (default), High : Low Color Shift function enable.
5.2 BACKLIGHT UNIT
The pin configuration for the housing and the leader wire is shown in the table below.
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Issue Date: Sep.29.2005
Model No.: V470H1-L02
Preliminary
CN3-CN26: BHR-04VS-1 (JST).
Pin Name Description Wire Color
1 HV High Voltage Pink
2 HV High Voltage White
Note (1) The backlight interface housing for high voltage side is a model BHR-04VS-1, manufactured by JST.
The mating header on inverter part number is SM02(12.0)B-BHS-1-TB(LF).
1 HV(White)
2 HV(Pink)
1 HV(White)
2 HV(Pink)
1 HV(White)
2 HV(Pink)
1HV(Pin)
2 HV(White)
1HV(Pin)
1 HV(Pink)
2 HV(White)
14
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5.3 INVERTER UNIT
CN1 (Header): S14B-PH-SM3-TB (D)(LF)(JST) or equivalent.
External PWM control signal
E_PWM should be connected to ground when internal PWM was selected
(SEL = Low).
Internal PWM Control Signal
I_PWM should be connected to ground when external PWM was selected
(SEL = High).
power input
DC
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Issue Date: Sep.29.2005
Model No.: V470H1-L02
Preliminary
CN2 (Header): S12B-PH-SM3-TB (D)(LF)(JST) or equivalent.
Pin No. Symbol Description
1
2
3
4
5
6
7
8
9
10
11
12 NC NC
CN3-CN26 (Header): SM02(12.0)B-BHS-1-TB (LF)(JST) or equivalent
Pin No. Symbol Description
1
2
VBL +24V
GND GND
NC NC
CCFL HOT
CCFL HOT
CCFL high voltage
CCFL high voltage
power input
DC
15
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CN27-CN30 (Header): LM113P-020-TF1-3(Unicorn) or equivalent
Pin No. Symbol Description
1 Board to Board
2 Board to Board
3 Board to Board
4 Board to Board
5 Board to Board
6 Board to Board
7 Board to Board
8 Board to Board
9 Board to Board
10
Note (1) Floating of any control signal is not allowed.
Control
Signal
Board to Board
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16
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G0-EG
0
p
ORx0
O
p
OB0
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5.4 BLOCK DIAGRAM OF INTERFACE
CNF1
Issue Date: Sep.29.2005
Model No.: V470H1-L02
Preliminary
ER0-ER7
E
-EB7
EB
DE
OR0-OR7
-
B-B7
L
D
Host
Graphics
Controller
ERx0+
TxIN
ERx
ERx1+
7
ERx1-
ERx2+
ERx2-
ERx3+
7
ERx3-
51Ө
51Ө
51Ө
51Ө
51Ө
51Ө
51Ө
51Ө
100pF
100
100pF
100pF
F
-
RxOUT
ER0-ER7
E
-E
-EB7
EB
DE
OR0-OR7
-
7
7
-OB7
ECLK+
PLL
51Ө
-
100pF
51Ө
PLL
D
L
Timing
ORx0+
-
ORx1+
ORx1-
51Ө
51Ө
51Ө
100pF
100
F
Controller
ORx2+
Rx2-
ORx3+
ORx3-
OCLK+
PLL
LVDS Transmitter
51Ө
100pF
51Ө
51Ө
100pF
51Ө
51Ө
-
100pF
51Ө
LVDS Receiver
PLL
THC63LVDM83A
(LVDF83A)
17
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ER0~ER7 : Even pixel R data
EG0~EG7 : Even pixel G data
EB0~EB7 : Even pixel B data
OR0~OR7 : Odd pixel R data
OG0~OG7: Odd pixel G data
OB0~OB7 : Odd pixel B data
DE : Data enable signal
DCLK : Data clock signal
Notes: (1) The system must have the transmitter to drive the module.
(2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line
when it is used differentially.
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Model No.: V470H1-L02
Preliminary
(3) Two pixel data send into the module for every clock cycle. The first pixel of the frame is even pixel
and the second pixel is odd pixel.
18
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Notes: (1) RSVD (reserved) pins on the transmitter shall be “H” or “L”.
TxCLK
IN
TxCLK OUT+
TxCLK OUT-
RxCLK IN+
RxCLK IN-
26RxCLK OUT DCLK
19
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5.7 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for the
color. The higher the binary input, the brighter the color. The table below provides the assignment of the
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue
Cyan
Magenta
Ye ll ow
White
Red (0) / Dark
Red (1)
Red (2)
:
:
Red (253)
Red (254)
Red (255)
Green (0) / Dark
Green (1)
Green (2)
:
:
Green (253)
Green (254)
Green (255)
Blue (0) / Dark
Blue (1)
Blue (2)
:
:
Blue (253)
Blue (254)
Blue (255)
0
0
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
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Data Signal
Red Green Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
1
1
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
20
The information described in this technical specification is tentative and it is possible to be changed without prior
notice. Please contact CMO ’s representative while your product design is based on this specification.
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6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max. Unit Note
Frequency 1/Tc (60) 74 (80) MHZ-
LVDS Receiver Clock
LVDS Receiver Data
Vertical Active Display Term
Horizontal Active Display Term
Note (1) Since this module is operated in DE only mode, Hsync and Vsync input signals should be set to low
Input cycle to
cycle jitter
Setup Time Tlvsu 600 - - ps
Hold Time Tlvhd 600 - - ps
logic level. Otherwise, this module would operate abnormally.
(2) (ODSEL) = (H). Please refer to 5.1 for detail information.
(3) (ODSEL) = (L). Please refer to 5.1 for detail information.
INPUT SIGNAL TIMING DIAGRAM
Tv
Tvd
DE
Th
DCLK
Tc
Thb
DE
Tvb
Thd
DATA
Valid display data ( 960 clocks)
LVDS INPUT INTERFACE TIMING DIAGRAM
21
The information described in this technical specification is tentative and it is possible to be changed without prior
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Љ
Љ
Љ
Љ
Љ
Љ
RXCLK+/-
RXn+/-
Tlvsu
Tlvhd
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Model No.: V470H1-L02
Preliminary
Tc
1T‘
14
3T‘
14
5T‘
14
7T‘
14
9T‘
14
11T ‘
14
13T‘
14
6.2 POWER ON/OFF SEQUENCE
To prevent a latch-up or DC operation of LCD module, the power on/off sequence should follow the
diagram below.
Power Supply
V
0.5ЉT1Љ10ms
0
0
500ms
CC
T
2
50ms
T
3
50ms
T
4
Signals
0V
0V
0.9 VCC
CC
0.1V
Power On
T
3T1
2
T
VALID
Power Off
0.9 V
CC
0.1V
cc
T4
Backlight (Recommended)
500msЉT
100ms
5
T6
50%
5
T
50%
6
T
Power ON/OFF Sequence
22
The information described in this technical specification is tentative and it is possible to be changed without prior
notice. Please contact CMO ’s representative while your product design is based on this specification.
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Note.
(1) The supply voltage of the external system for the module input should follow the definition of Vcc.
(2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the
LCD operation or the LCD turns off before the backlight turns off, the display may momentarily
become abnormal screen.
(3) In case of VCC is in off level, please keep the level of input signals on the low or high impedance.
(4) T4 should be measured after the module has been fully discharged between power off and on
period.
(5) Interface signal shall not be kept at high impedance when the power is on.
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23
The information described in this technical specification is tentative and it is possible to be changed without prior
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7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit
Ambient Temperature Ta
Ambient Humidity Ha
Supply Voltage VCC 5.0 V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
Lamp Current I
Oscillating Frequency (Inverter) F
Vertical Frame Rate Fr 60Hz
7.2 OPTICAL SPECIFICATIONS
The relative measurement methods of optical characteristics are shown in 7.2. The following items should be
measured under the test conditions described in 7.1 and stable environment shown in Note (6).
Item Symbol Condition Min. Typ.Max. Unit Note
Contrast Ratio CR(1200)- Note (2)
Response Time
Center Luminance of White L
White Variation
Cross Talk CT (TBD) % Note (5)
Red
Green
Color
Chromaticity
Viewing
Angle
Blue
White
Color Gamut
Horizontal
Ver tical
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Model No.: V470H1-L02
Preliminary
o
25r2
50r10
L
W
Gray to
gray
C
GW
Rx(TBD) Ry
=0q, TY =0q
T
x
Viewing Normal Angle
Gx
Gy
Bx
By
Wx
Wy
5.2r0.5
51r3
(6.5) ms Note (3)
(500) cd/m2 Note (4)
(TBD) - Note (7)
(TBD)
(TBD)
(TBD)
(TBD)
(TBD)
(TBD)
(TBD)
-
-
-
-
-
-
-
75 % NTSC
Tx+
T
TY+
T
Y
-
x
CRt20
-
(80) (88)
(80) (88)
(80) (88)
(80) (88)
C
%RH
mA
KHz
Deg. Note (1)
Note (6)
24
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T
Note (1) Definition of Viewing Angle (Tx, Ty):
Viewing angles are measured by Eldim EZ-Contrast 160R
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Model No.: V470H1-L02
Preliminary
Normal
Tx = Ty = 0º
Ty-Ty
TX- = 90º
6 o’clock
T
y- = 90º
x-
y-
Note (2) Definition of Contrast Ratio (CR):
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L255 / L0
L255: Luminance of gray level 255
L 0: Luminance of gray level 0
CR = CR (5)
CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note (7).
Tx
Tx
y+
12 o’clock direction
T
y+ = 90º
x+
TX+ = 90º
Note (3) Definition of Gray to Gray Switching Time :
100%
90%
Optical
Response
10%
0%
Gray to gray
switching time
Gray to gray
switching time
ime
The driving signal means the signal of gray level 0, 63, 127, 191, and 255.
Gray to gray average time means the average switching time of gray level 0 ,63,127,191,255 to each
other .
25
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A
(
)
A
(
)
(
)
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Model No.: V470H1-L02
Preliminary
Note (4) Definition of Luminance of White (LC, L
Measure the luminance of gray level 255 at center point and 5 points
L
= L (5)
C
L
= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
AVE
L (x) is corresponding to the luminance of the point X at the figure in Note (7).
Note (5) Definition of Cross Talk (CT):
CT = | Y
– YA | / YAu 100 (%)
B
Where:
Y
= Luminance of measured location without gray level 0 pattern (cd/m2)
A
Y
= Luminance of measured location with gray level 0 pattern (cd/m2)
B
ctive Area
Gray 128
Y
Y
D, W
A, U
A, R
(D/2,W/8)
(7D/8,W/2)
Y
(D/8,W/2)
A, L
Y
(D/2,7W/8)
A, D
(0, 0)
AVE
):
ctive Area
Gray 0
Gray 0
Gray 128
Y
(D/2,W/8)
B, U
Y
(7D/8,W/2)
B, R
(3D/4,3W/4)
D, W
(D/4,W/4)
Y
(D/8,W/2)
B, L
Y
(D/2,7W/8)
B, D
0, 0
Note (6) Measurement Setup:
The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement
should be executed after lighting backlight for 1 hour in a windless room.
LCD Module
LCD Panel
Center of the Screen
Note (7) Definition of White Variation (GW):
Display Color Analyzer
(Minolta CA210)
Light Shield Room
(Ambient Luminance < 2 lux)
Measure the luminance of gray level 255 at 5 points
GW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]
26
The information described in this technical specification is tentative and it is possible to be changed without prior
notice. Please contact CMO ’s representative while your product design is based on this specification.
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Issue Date: Sep.29.2005
Model No.: V470H1-L02
Preliminary
Horizontal Line
D
D/4D/23D/4
Vertical Line
W
W/4
W/2
3W/4
12
X
5
34
Active Area
: Test Point
X=1 to 5
27
The information described in this technical specification is tentative and it is possible to be changed without prior
notice. Please contact CMO ’s representative while your product design is based on this specification.
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Issue Date: Sep.29.2005
Model No.: V470H1-L02
Preliminary
8. PRECAUTIONS
8.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the module during assembly.
(2) It is recommended to assemble or to install a module into the user’s system in clean working areas. The
dust and oil may cause electrical short or worsen the polarizer.
(3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and Backlight.
(4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the
damage and latch-up of the CMOS LSI chips.
(5) Do not plug in or pull out the I/F connector while the module is in operation.
(6) Do not disassemble the module.
(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and
easily scratched.
(8) Moisture can easily penetrate into LCD module and may cause the damage during operation.
(9) High temperature or humidity may deteriorate the performance of LCD module. Please store LCD
modules in the specified storage conditions.
(10) When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the
response time will become slow, and the starting voltage of CCFL will be higher than that of room
temperature.
8.2 SAFETY PRECAUTIONS
(1) The startup voltage of a Backlight is approximately 1000 Volts. It may cause an electrical shock while
assembling with the inverter. Do not disassemble the module or insert anything into the Backlight unit.
(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
(3) After the module’s end of life, it is not harmful in case of normal operation and storage.
28
The information described in this technical specification is tentative and it is possible to be changed without prior
notice. Please contact CMO ’s representative while your product design is based on this specification.
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9. MECHANICAL CHARACTERISTIC
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Model No.: V470H1-L02
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࡛ભሽٝڶૻֆ
%*+/'+
29
The information described in this technical specification is tentative and it is possible to be changed without prior
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Issue Date: Sep.29.2005
Model No.: V470H1-L02
Preliminary
࡛ભሽٝڶૻֆ
%*+/'+
30
The information described in this technical specification is tentative and it is possible to be changed without prior
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