CMO V460H1-LH4 Specification

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TFT LCD Preliminary Specification
MODEL NO.: V460H1 - LH4
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Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
Preliminary
Customer:
Approved by:
Note:
TVHD
Approved By
LY Chen
Reviewed By
QA Dept. Product Development Div.
Kc_Ko WT Lin
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CONTENTS -
REVISION HISTORY
1. GENERAL DESCRIPTION
1.1 OVERVIEW
1.2 FEATURES
1.3 APPLICATION
1.4 GENERAL SPECIFICATIONS
1.5 MECHANICAL SPECIFICATIONS
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
2.2 PACKAGE STORAGE
2.3 ELECTRICAL ABSOLUTE RATINGS
2.3.1 TFT LCD MODULE
2.3.2 BACKLIGHT UNIT
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
3.2 BACKLIGHT UNIT
3.2.1 CCFL(Cold Cathode Fluorescent Lamp) CHARACTERISTICS
3.2.2 BALANCE BOARD CHARACTERISTICS
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
5. INTERFACE PIN CONNECTION
5.1 TFT LCD MODULE
5.2 BACKLIGHT UNIT
5.3 BALANCE BOARD UNIT
5.4 BLOCK DIAGRAM OF INTERFACE
5.5 LVDS INTERFACE
5.6 COLOR DATA INPUT ASSIGNMENT
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
6.2 POWER ON/OFF SEQUENCE
7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
7.2 OPTICAL SPECIFICATIONS
8. DEFINITION OF LABELS
8.1 CMO MODULE LABEL
9. PACKAGING
9.1 PACKING SPECIFICATIONS
9.2 PACKING METHOD
10. PRECAUTIONS
10.1 ASSEMBLY AND HANDLING PRECAUTIONS
10.2 SAFETY PRECAUTIONS
10.3 SAFETY STANDARDS
11. MECHANICAL CHARACTERISTICS
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Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
Preliminary
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REVISION HISTORY
Version Date
Ver 1.0 Jun. 03,’08 All All Approval Specification was first issued.
Page
(New)
Section Description
Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
Preliminary
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1. GENERAL DESCRIPTION
1.1 OVERVIEW
V460H1-LH4 is a 46” TFT Liquid Crystal Display module with 16-CCFL Backlight unit and 2ch-LVDS
interface. This module supports 1920 x 1080 HDTV format and can display true 16.7M colors (8-bit/color).
The inverter module for backlight is built-in.
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Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
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1.2 FEATURES
- High brightness (500nits)
- High contrast ratio (4000:1)
- Fast response time (Gray to Gray average 6.5 ms)
- High color saturation (72% NTSC)
- Full HDTV (1920 x 1080 pixels) resolution, true HDTV format
- DE (Data Enable) only mode
- LVDS (Low Voltage Differential Signaling) interface
- Optimized response time for 120 Hz frame rate
- Ultra wide viewing angle: Super MVA technology
1.3 APPLICATION
- Standard Living Room TVs.
- Public Display Application.
- Home Theater Application.
- MFM Application.
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note Active Area 1018.08(H) x 572.67(V) (46” diagonal) mm Bezel Opening Area 1024.4(H) x 578.6(V) mm Driver Element a-si TFT active matrix - ­Pixel Number 1920x R.G.B. x 1080 pixel ­Pixel Pitch(Sub Pixel) 0.17675(H) x 0.53025(V) mm ­Pixel Arrangement RGB vertical stripe - ­Display Colors 16.7M color ­Display Operation Mode Transmissive mode / Normally black - -
Surface Treatment
Note (1) Please refer to the attached drawings in chapter 9 for more information about the front and
Anti-Glare coating (super clear)
Hardness (3H)
- (2)
(1)
back outlines.
Note (2) The spec of the surface treatment is temporarily for this phase. CMO reserves the rights to
change this feature.
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal (H) - 1083 - mm
Module Size
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Note (2) Module Depth does not include connectors.
Vertical (V) - 627 - mm Depth (D) - 53.2 - mm
Weight - 13330 - g -
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2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1) Operating Ambient Temperature TOP 0 50 ºC (1), (2)
Shock (Non-Operating) S
Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown in the figure below.
NOP
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Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
Preliminary
Value
Min. Max.
X, Y axis - 50 G (3), (5)
Z axis - 35 G (3), (5)
- 1.0 G (4), (5)
NOP
Unit Note
(a) 90 %RH Max. (Ta
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of
display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in your product design to prevent the surface temperature
of display area from being over 65 ºC. The range of operating temperature may degrade in case of
improper thermal management in your product design.
Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, and ± Z.
Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that
the module would not be twisted or bent by the fixture. The module would not be twisted or bent by the
fixture.
Љ 40 ºC).
Relative Humidity (%RH)
100
90
80
60
Operating Range
40
20
10
Storage Range
Temperature (ºC)
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2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
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Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
Preliminary
Item Symbol
Min. Max.
Power Supply Voltage VCC -0.3 13.5 V
Logic Input Voltage VIN -0.3 3.6 V
Value
Unit Note
(1)
2.2.2 BACKLIGHT INVERTER UNIT
Item Symbol
Lamp Voltage VW
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
should be restricted to the conditions described under Normal Operating Conditions.
Value
Min. Max.
Ё
3000 V
Unit Note
RMS
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3. ELECTRICAL CHARACTERISTICS
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Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
Preliminary
3.1 TFT LCD MODULE (
Parameter Symbol
Ta = 25 ± 2 ºC)
Value
Min. Typ. Max.
Unit Note
Power Supply Voltage VCC 10.8 12 13.2 V (1) Rush Current I
- - 4.5 A (2)
RUSH
White - 1.3 2.0 A
Power Supply Current
Differential Input High
LVDS Interface
Threshold Voltage Differential Input Low Threshold Voltage Common Input Voltage V Terminating Resistor R
Black - 0.6 - A Vertical Stripe
ICC
- 1.1 - A
- - +100 mV
V
LVT H
-100 - - mV
V
LVTL
1.125 1.25 1.375 V
LVC
- 100 - ohm
T
Input High Threshold Voltage VIH 2.7 - 3.3 V CMOS
interface
Input Low Threshold Voltage V
0 - 0.7 V
IL
Note (1) The module should be always operated within the above ranges.
Note (2) Measurement condition:
(High to Low)
(Control Signal)
SW
+24V
Vcc
R1
47K
R2
1K
47K
VR1
C1
1uF
Q1 2SK1475
C2
0.01uF
Q2
2SK1470
FUSE
C3
1uF
Vcc
(LCD Module Input)
(3)
Vcc rising time is 470us
Vcc
0.9Vcc
0.1Vcc
GND
470us
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Note (3) The specified power supply current is under the conditions at Vcc = 12V, Ta = 25 ± 2 ºC, fv = 60 Hz,
whereas a power dissipation check pattern below is displayed.
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Model No.: V460H1 - LH4
Preliminary
a. White Pattern
Active Area
c. Vertical Stripe Pattern
b. Black Pattern
Active Area
R
G
R
B
G
R
B
G
R R
G
B
B
B
B
R
R
R
G
G
G
G
B
B
B
B
R
R
Active Area
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3.2 BACKLIGHT UNIT
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Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
Preliminary
3.2.1 CCFL (Cold Cathode Fluorescent Lamp) CHARACTERISTICS (
Parameter Symbol
Min. Typ. Max. Lamp Input Voltage VL - (1250) - V Lamp Current IL 7.9 8.2 8.5 mA
Lamp Turn On Voltage VS
- - 2050 V
- - 1660 V
Value
Ta = 25 ± 2 ºC)
Unit Note
-
RMS
RMS
(2), Ta = 0 ºC
RMS
(2), Ta = 25 ºC
RMS
(1)
Operating Frequency FL 30 - 80 KHz (3) Lamp Life Time LBL 50,000 - - Hrs (4)
Note (1) Lamp current is measured by utilizing AC current probe and its value is average by measuring
master and slave board.:
Note (2) The lamp starting voltage V
should be applied to the lamp for more than 1 second after startup.
S
Otherwise the lamp may not be turned on.
Note (3) The lamp frequency may produce interference with horizontal synchronous frequency of the
display input signals, and it may result in line flow on the display. In order to avoid interference, the
lamp frequency should be detached from the horizontal synchronous frequency and its harmonics
as far as possible.
Note (4) The life time of a lamp is defined as when the brightness is larger than 50% of its original value and
the effective discharge length is longer than 80% of its original length (Effective discharge length is
defined as an area that has equal to or more than 70% brightness compared to the brightness at
the center point of lamp.) as the time in which it continues to operate under the condition at Ta = 25
2к and I
= 7.9~8.5 mArms.
L
3.2.2 BALANCE BOARD CHARACTERISTICS (
Parameter Symbol
Input High Voltage VHV
Protection Circuit Supply Voltage Vcc
Input Current I
BL(HV)
Oscillating Frequency FW 43 46 49 kHz
Individual Lamp Current
Lamp
Detection
High (LD) LD
Low (LD) LD
I
7.9 8.2 8.5 mA H.V (5)
L
Dimming frequency FB 135 150 165 Hz
Minimum Duty Ratio D
MIN
Note (5) Lamp current is measured master board by utilizing high frequency current meters as shown below:
Note (6) Input voltage Hv based on spec. +-7% tolerance.
Note (7) Asymmetric ratio must be from 90% to 110% (0.9<Ip/ I
Min. Typ. Max.
- 1215 - V (6)
10 12 15
140 mArms No Dimming
5
- 15 - %
Ta = 25 ± 2 ºC)
Value
Unit Note
V
V Normal Operation
1.5 V Lamp Connector Open
rms@T/2XЅ2
<1.1)
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Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
Preliminary
T
Ip
I-p
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Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
Preliminary
Balance
Board
(Master)
A A
A A
A A
A A
HV (Pink +(-) )
2
HV (White +(-) )
1
HV (Pink +(-) )
2
HV (White +(-) )
1
HV (Pink +(-) )
2
HV (White +(-) )
1
HV (Pink +(-) )
2
LCD Module
HV (White +(-) )
1
HV (Pink -(+) )
HV (White -(+) )
HV (Pink -(+) )
HV (White -(+) )
HV (Pink -(+) )
HV (White -(+) )
HV (Pink -(+) )
HV (White -(+) )
A
1 2
A
A
1 2
A
A
1 2
A
A
1 2
A
Balance
Board
(Slave)
A A
A A
A A
A A
HV (Pink +(-) )
2
HV (White +(-) )
1
HV (Pink +(-) )
2
HV (White +(-) )
1
HV (Pink +(-) )
2
HV (White +(-) )
1
HV (Pink +(-) )
2
HV (White +(-) )
1
HV (Pink -(+) )
HV (White -(+) )
HV (Pink -(+) )
HV (White -(+) )
HV (Pink -(+) )
HV (White -(+) )
HV (Pink -(+) )
HV (White -(+) )
A
1 2
A
A
1 2
A
A
1 2
A
A
1 2
A
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)
4.
BLOCK DIAGRAM OF INTERFACE
4.1 TFT LCD MODULE
ERX0(+/-) ERX1(+/-) ERX2(+/-) ERX3(+/-) ECLK(+/-)
ORX0(+/-) ORX1(+/-) ORX2(+/-) ORX3(+/-) OCLK(+/-)
SELLVDS RPF ODSEL
(FI-RE51S-HF (JAE))
INPUT CONNECTOR
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FRAME
BUFFER
TIMING
CONTROLLER
Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
Preliminary
SCAN DRIVER
TFT LCD PANEL
(1920x3x1080)
DATA DRIVER(RSDS
Vcc
GND
CN101-CN108 (Master): CP042EP1MFB-LF (CviLux)
BALANCE BOARD
CONNECTOR
CN127
130001WR-02E
(YEONHO) (Master)
CN125: KN30-7P-1.25H
DC/DC CONVERTER
& REFERENCE
VOLTAGE
GENERATOR
BACKLIGHT
UNIT
+(-) HV
IP board
CN201-CN212 (Slave): SM02-BDAS-3-TB(LF)(JST)
BALANCE BOARD
CONNECTOR
CN227
130001WR-02E
(YEONHO) (Salve)
-(+) HV
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5 .INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD Module
Pin Name Description Note
1 VCC +12V power supply 2 VCC +12V power supply 3 VCC +12V power supply 4 VCC +12V power supply 5 VCC +12V power supply 6 GND Ground 7 GND Ground 8 GND Ground
9 GND Ground 10 ORX0- Odd pixel Negative LVDS differential data input. Channel 0 11 ORX0+ Odd pixel Positive LVDS differential data input. Channel 0 12 ORX1- Odd pixel Negative LVDS differential data input. Channel 1 13 ORX1+ Odd pixel Positive LVDS differential data input. Channel 1 14 ORX2- Odd pixel Negative LVDS differential data input. Channel 2 15 ORX2+ Odd pixel Positive LVDS differential data input. Channel 2 16 GND Ground 17 OCLK- Odd pixel Negative LVDS differential clock input. 18 OCLK+ Odd pixel Positive LVDS differential clock input. 19 GND Ground 20 ORX3- Odd pixel Negative LVDS differential data input. Channel 3 21 ORX3+ Odd pixel Positive LVDS differential data input. Channel 3 22 N.C. No Connection 23 N.C. No Connection 24 GND Ground 25 ERX0- Even pixel, Negative LVDS differential data input. Channel 0 26 ERX0+ Even pixel, Positive LVDS differential data input. Channel 0 27 ERX1- Even pixel, Negative LVDS differential data input. Channel 1 28 ERX1+ Even pixel, Positive LVDS differential data input. Channel 1 29 ERX2- Even pixel, Negative LVDS differential data input. Channel 2 30 ERX2+ Even pixel, Positive LVDS differential data input. Channel 2 31 GND Ground 32 ECLK- Even pixel, Negative LVDS differential clock input 33 ECLK+ Even pixel, Positive LVDS differential clock input. 34 GND Ground 35 ERX3- Even pixel, Negative LVDS differential data input. Channel 3 36 ERX3+ Even pixel, Positive LVDS differential data input. Channel 3 37 N.C. No Connection 38 N.C. No Connection 39 GND Ground 40 ODSEL Overdrive Lookup Table Selection (3) 41 N.C. No Connection (1) 42 N.C. No Connection (1) 43 N.C. No Connection 44 N.C. No Connection (1) 45 SELLVDS LVDS Data Format Selection (2) 46 N.C. No Connection 47 N.C. No Connection 48 N.C. No Connection
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Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
Preliminary
(1)
(1)
(1)
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49 N.C. No Connection 50 N.C. No Connection 51 N.C. No Connection
Note (1) Reserved for internal use. Please leave it open.
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Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
Preliminary
(1)
Note (2)
Note (3) Overdrive lookup table selection. The overdrive lookup table should be selected in accordance with the
Note (4) Low =Open or Connect to GND, High = Connect to +3.3V
Low : JEIDA LVDS Format (default), High : VESA Format.
frame rate to optimize image quality.
ODSEL Note
L Lookup table was optimized for 60 Hz frame rate
H Lookup table was optimized for 50 Hz frame rate.
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5.2 BACKLIGHT UNIT
The pin configuration for the housing and the leader wire is shown in the table below.
CN3-CN26: BDAMR-02VAS-3 (JST).
Pin Name Description Wire Color
1 HV High Voltage Pink 2 HV High Voltage White
Note (1) The backlight interface housing for high voltage side is a model BDAMR-02VAS-3,
manufactured by JST. The mating header on inverter part number is
SM02-BDAS-3-TB (LF)(JST)
1 HV(White)
2 HV(Pink)
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Model No.: V460H1 - LH4
Preliminary
1 HV(Pink)
2 HV(White)
1 HV(White)
2 HV(Pink)
1 HV(White)
2 HV(Pink)
1 HV(Pink)
2 HV(White)
1 HV(Pink)
2 HV(White)
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5.3 BALANCE BOARD UNIT
CN127 (Header) (Master): 130001WR-02E (YEONHO)
Pin No. Symbol Description
1 2
HV+(-) High Voltage Input HV+(-) High Voltage Input
CN227 (Header) (Slave): 130001WR-02E (YEONHO)
Pin No. Symbol Description
1 2
HV-(+) High Voltage Input HV-(+) High Voltage Input
CN101-CN108 (Header) (Master): CP042EP1MFB-LF (CviLux)
Pin No. Symbol Description
1 2
CCFL HOT CCFL High voltage CCFL HOT CCFL High voltage
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Model No.: V460H1 - LH4
Preliminary
CN125 (Header): KN30-7P-1.25H (Hirose).
Pin No. Symbol Description
1 2 3 4 5 6 7
VCC Power Supply for Protection Circuit
FB1 Lamp Current Feedback 1
FB2 Lamp Current Feedback 2 GND GND
LD CCFL Connector Open & Non-lighting signal LD CCFL Connector Open & Non-lighting signal
Signal Ground Signal Ground
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p
OR0
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5.4 BLOCK DIAGRAM OF INTERFACE
CNF1
Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
Preliminary
ERx0+
ER0-ER7
-
-
ERx1+
ERx1-
ERx2+
OR0-OR7
-
-
ERx3+
ERx3-
ECLK+
Host
Graphics
Controller
ORx0+
ORx1+
ORx1-
51
Ө
-
-
100pF
51
Ө
51Ө
100pF
51
Ө
51
Ө
100pF
51
Ө
51
Ө
100pF
51
Ө
RxOUT
ER0-ER7
-
-
-OR7
-
-
51
Ө
51
100pF
Ө
-
Timing
51
Ө
51
Ө
51Ө
100pF
100
F
-
Controller
ORx2+
-
ORx3+
ORx3-
51
Ө
100pF
51
Ө
51
Ө
100pF
51
Ө
OCLK+
51
Ө
51
100pF
Ө
-
LVDS Transmitter
THC63LVDM83A
(LVDF83A)
LVDS Receiver
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ER0~ER7 : Even pixel R data
EG0~EG7 : Even pixel G data
EB0~EB7 : Even pixel B data
OR0~OR7 : Odd pixel R data
OG0~OG7: Odd pixel G data
OB0~OB7 : Odd pixel B data
DE : Data enable signal
DCLK : Data clock signal
Notes:
 The system must have the transmitter to drive the module.
 LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line
when it is used differentially.
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Model No.: V460H1 - LH4
Preliminary
 Two pixel data send into the module for every clock cycle. The first pixel of the frame is odd pixel
and the second pixel is even pixel.
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5.5 LVDS INTERFACE
SIGNAL
TRANSMITTER
THC63LVDM83A
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INTERFACE
CONNECTOR
Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
RECEIVER
THC63LVDF84A
Preliminary
TFT CONTROL INPUT
24bit
LVDS_SEL
=H
R0
R1
R2
R3
R4
R5
G0
G1
G2
G3
G4
G5
B0
B1
B2
B3
B4
B5
DE
R6
R7
G6
G7
B6
B7
RSVD 1
RSVD 2
RSVD 3
LVDS_SEL =
L or OPEN
R2
R3
R4
R5
R6
R7
G2
G3
G4
G5
G6
G7
B2
B3
B4
B5
B6
B7
DE
R0
R1
G0
G1
B0
B1
RSVD 1
RSVD 2
RSVD 3
DCLK 31 TxCLK IN TxCLK
PIN INPUT Host TFT-LCD PIN OUTPUT
51
52
54
55
56
3
4
6
7
11
12
14
15
19
20
22
23
24
30
50
2
8
10
16
18
25
27
28
TxIN0
TxIN1
TxIN2
TxIN3
TxIN4
TxIN6
TxIN7
TxIN8
TxIN9
TxIN12
TxIN13
TxIN14
TxIN15
TxIN18
TxIN19
TxIN20
TxIN21
TxIN22
TxIN26
TxIN27
TxIN5
TxIN10
TxIN11
TxIN16
TxIN17
TxIN23
TxIN24
TxIN25
TA OUT0+
TA OUT0-
TA OUT1+
TA OUT1-
TA OUT2+
TA OUT2-
TA OUT3+
TA OUT3-
OUT+
TxCLK
OUT-
Rx 0+
Rx 0-
Rx 1+
Rx 1-
Rx 2+
Rx 2-
Rx 3+
Rx 3-
RxCLK
IN+
RxCLK
IN-
Rx OUT0
27
Rx OUT1
29
Rx OUT2
30
Rx OUT3
32
Rx OUT4
33
Rx OUT6
35
Rx OUT7
37
Rx OUT8
38
Rx OUT9
39
Rx OUT12
43
Rx OUT13
45
Rx OUT14
46
Rx OUT15
47
Rx OUT18
51
Rx OUT19
53
Rx OUT20
54
Rx OUT21
55
Rx OUT22
1
Rx OUT26
6
Rx OUT27
7
Rx OUT5
34
Rx OUT10
41
Rx OUT11
42
Rx OUT16
49
Rx OUT17
50
Rx OUT23
2
Rx OUT24
3
Rx OUT25
5
26 RxCLK
OUT
LVDS_SEL
=H
R0
R1
R2
R3
R4
R5
G0
G1
G2
G3
G4
G5
B0
B1
B2
B3
B4
B5
DE
R6
R7
G6
G7
B6
B7
NC
NC
NC
LVDS_SEL =
L or OPEN
R2
R3
R4
R5
R6
R7
G2
G3
G4
G5
G6
G7
B2
B3
B4
B5
B6
B7
DE
R0
R1
G0
G1
B0
B1
NC
NC
NC
DCLK
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R0~R7: Pixel R Data (7; MSB, 0; LSB)
G0~G7: Pixel G Data (7; MSB, 0; LSB)
B0~B7: Pixel B Data (7; MSB, 0; LSB)
DE : Data enable signal
DCLK : Data clock signal
Notes (1) RSVD (reserved) pins on the transmitter shall be “H” or “L”.
5.6 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for the
color. The higher the binary input, the brighter the color. The table below provides the assignment of the
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Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
Preliminary
color versus data input.
Color
R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0
Black Red
Green Basic Colors
Gray Scale Of Red
Gray Scale Of Green
Gray Scale Of Blue
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue
Cyan
Magenta
Yellow
White
Red (0) / Dark
Red (1)
Red (2)
:
: Red (253) Red (254) Red (255) Green (0) / Dark Green (1) Green (2)
:
: Green (253) Green (254) Green (255) Blue (0) / Dark Blue (1) Blue (2)
:
: Blue (253) Blue (254) Blue (255)
0
0
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Red Green Blue
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Data Signal
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
1
0
0
0
1
1
1
1
1
1
0
1
0
0
1
1
1
1
1
1
1
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0 0
0
0
0
0
0
0
0
0
0 0
0 0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1 0
1
1
1
1
1
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6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max. Unit Note
Frequency 1/Tc (60) 74 (80) MH
LVDS Receiver Clock
LVDS Receiver Data
Vertical Active Display Term
Horizontal Active Display Term
Note (1) (ODSEL) = (H) , (L). Please refer to 5.1 for detail information.
Input cycle to cycle jitter Setup Time Tlvsu 600 - - ps ­Hold Time Tlvhd 600 - - ps -
Frame Rate
Total Tv 1115 1125 1135 Th Tv=Tvd+Tvb Display Tvd 1080 1080 1080 Th ­Blank Tvb 35 45 55 Th ­Total Th 1050 1100 1150 Tc Th=Thd+Thb Display Thd 960 960 960 Tc ­Blank Thb 90 140 190 Tc -
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Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
Preliminary
Z
Trcl - - 200 ps -
Fr Fr
5
6
47 50 53 Hz (1) 57 60 63 Hz (1)
-
Note (2) Since the module is operated in DE only mode, Hsync and Vsync input signals should be set to low
logic level. Otherwise, this module would operate abnormally.
INPUT SIGNAL TIMING DIAGRAM
DE
Th
DCLK
DE
Tvd
Tv
Tvb
Thd
DATA
Valid display data ( 960 clocks)
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Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
Preliminary
RXCLK+/-
RXn+/-
Tlvsu
Tlvhd
1T‘ 14
LVDS INPUT INTERFACE TIMING DIAGRAM
Tc
3T‘ 14
5T‘ 14
7T‘ 14
9T‘ 14
11T‘
14
13T‘
14
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6.2 POWER ON/OFF SEQUENCE
To prevent a latch-up or DC operation of LCD module, the power on/off sequence should follow the
diagram below.
Power Supply
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CC
0.9 V
Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
Preliminary
CC
0.9 V
V
0.5
ЉЉЉЉ
0
0
500ms
ЉЉЉЉ
ЉЉЉЉ
CC
0V
T
1
ЉЉЉЉ
10ms
T
2
ЉЉЉЉ
50ms
T
3
ЉЉЉЉ
50ms
ЉЉЉЉ
T4
Signals
0V
Backlight (Recommended)
ЉЉЉЉ
ЉЉЉЉ
T5
T
6
500ms
100ms
0.1V
CC
2
T
VALI D
Power On
50%
5
T
Power ON/OFF Sequence
50%
6
T
T
3
T1
Power Off
0.1V
T4
cc
NoteΚ
(1) The supply voltage of the external system for the module input should follow the definition of Vcc.
(2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD
operation or the LCD turns off before the backlight turns off, the display may momentarily become abnormal
screen.
(3) In case of VCC is in off level, please keep the level of input signals on the low or high impedance.
(4) T4 should be measured after the module has been fully discharged between power off and on period.
(5) Interface signal shall not be kept at high impedance when the power is on.
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7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit Ambient Temperature Ta Ambient Humidity Ha Supply Voltage VCC 12V V Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS" Lamp Current IL Oscillating Frequency (Inverter) FW Vertical Frame Rate Fr 120 Hz
7.2 OPTICAL SPECIFICATIONS
The relative measurement methods of optical characteristics are shown in 7.2. The following items should be
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25±2
50±10
8.2±0.2
44±3
Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
Preliminary
o
C
%RH
mA
KHz
measured under the test conditions described in 7.1 and stable environment shown in Note (6).
Item Symbol Condition Min. Typ. Max. Unit Note
Contrast Ratio CR 4000 5000 - - Note (2)
Response Time
Center Luminance of White L
White Variation Cross Talk CT - - 4 % Note (5)
Red
Green Color Chromaticity
Viewing Angle
Blue
White
Color Gamut
Horizontal
Vertical
Gray to
gray
C
δW
=0°, θY =0°
θ
Rx 0.634 ­Ry Gx 0.294 ­Gy Bx 0.150 -
By Wx Wy
θx+
-
θ
x
θY+
-
θ
Y
x
Viewing angle at
normal direction
CR20
- 6.5 12 ms Note (3)
450 500 -
- - 1.3 - Note (7)
0.331
Typ.-
0.03
80 88 ­80 88 ­80 88 ­80 88 -
0.598
0.058
0.280
0.290
72 - % NTSC
Typ.+
0.03
Deg. Note (1)
cd/
m
-
-
-
-
-
2
Note (4)
Note (6)
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T
Note (1) Definition of Viewing Angle (θx, θy):
Viewing angles are measured by Eldim EZ-Contrast 160R
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Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
Preliminary
Note (2) Definition of Contrast Ratio (CR):
θX- = 90º
6 o’clock
θ
y-
= 90º
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L255 / L0
L255: Luminance of gray level 255
x-
y-
Normal
θx = θy = 0º
θy- θy+
θx
θx+
y+
12 o’clock direction
θ
y+
= 90º
x+
θX+ = 90º
L 0: Luminance of gray level 0
CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note
(7)
Note (3) Definition of Gray to Gray Switching Time :
The driving signal means the signal of gray level 0, 63, 127, 191, and 255.
Optical
Response
Gray to gray average time means the average switching time of gray level 0 ,63,127,191,255 to each
other .
100%
90%
10%
0%
Gray to gray switching time
Gray to gray switching time
ime
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(
)
(
)
(
)
(
)
Gray 255
Note (4) Definition of Luminance of White (LC):
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Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
Preliminary
Measure the luminance of gray level 255 at center point.
LC = L (5), where L (x) is corresponding to the luminance of the point X at the figure in Note (7).
Note (5) Definition of Cross Talk (CT):
CT = | Y
– YA | / YA × 100 (%)
B
Where:
(a)
Y
= Luminance of measured location without gray level 255 pattern (cd/m2)
A
Y
= Luminance of measured location with gray level 255 pattern (cd/m2)
B
(0, 0)
Active Area
Y
(D/8,W/2)
A, L
Gray 51
Y
(D/2,7W/8)
A, D
Y
A, U
Y
A, R
D, W
(D/2,W /8)
(7D/8,W/2)
(D/4,W/4)
Y
(D/8,W/2)
B, L
Y
(D/2,7W/8)
B, D
0, 0
Active Area
Gray 0
Gray 255
Gray 51
Y
(D/2,W /8)
B, U
Y
(7D/8,W/2)
B, R
(3D/4,3W/4)
(D, W)
(b)
(0, 0)
Y
(D/8,W/2)
A, L
Y
(D/2,7W/8)
A, D
Y
= Luminance of measured location without gray level 255 pattern (cd/m2)
A
Y
= Luminance of measured location with gray level 255 pattern (cd/m2)
B
Active Area
Gray 0
Y
Y
A, R
D, W
A, U
(D/2,W /8)
(7D/8,W/2)
(D/4,W/4)
(D/8,W/2)
Y
B, L
Y
(D/2,7W/8)
B, D
0, 0
Active Area
Gray 0
Y
(D/2,W /8)
B, U
Y
B, R
(3D/4,3W/4)
(D, W)
(7D/8,W/2)
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Note (6) Measurement Setup:
The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement
should be executed after lighting backlight for 1 hour in a windless room.
LCD Module
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Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
Preliminary
LCD Panel
Note (7) Definition of White Variation (δW):
Measure the luminance of gray level 255 at 5 points
δW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]
Center of the Screen
Display Color Analyzer
(Minolta CA210)
Light Shield Room
(Ambient Luminance < 2 lux)
Horizontal Line
D
D/4 D/2 3D/4
Vertical Line
W
W/4
W/2
3W /4
1 2
: Test Point
5
3 4
Active Area
27
X
X=1 to 5
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X
y
8. DEFINITION OF LABELS
8.1 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
CHI MEI
OPTOELECTRONICS
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V460H1 -L05 Rev. XX
X X X X X X X Y M D L N N N N
Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
Preliminary
E207943
MADE IN TAIWAN
CM46H15XXXXXLXXLYMDNNNN
(a) Model Name: V460H1-L05
(b) Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.
(c) CMO barcode definition:
Serial ID: XX-XX-X-XX-YMD-L-NNNN
Code Meaning Description
XX CMO internal use ­XX Revision Cover all the change
X-XX CMO internal use -
Year, month, day
YMD
NNNN Serial number Manufacturing sequence of product
(d) Customer’s barcode definition:
Serial ID: CM-46H15-X-X-X-XX-L-XX-L-YMD-NNNN
Code Meaning Description
CM Supplier code CMO=CM
46H15
XX
XX
YMD
NNNN Serial number
L Product line # Line 1=1, Line 2=2, Line 3=3, …
Model number Revision code Non ZBD: 0~9, ZBD: A~Z
Source driver IC code
X
Gate driver IC code
X
Cell location Tainan, Taiwan=TN
L Cell line # 1~12=0~C
Module location Tainan, Taiwan=TN Module line # 1~12=0~C
L
Year, month, day
Year: 2001=1, 2002=2, 2003=3, 2004=4… Month: Jan. ~ Dec.=1, 2, 3, ~, 9, A, B, C
st
Day: 1
to 31st =1, 2, 3, ~, 9, A, B, C, ~, W, X, Y, exclude I, O, and U
V460H1-L05=46H15
Century=1, CLL=2, Demos=3, Epson=4, Fujitsu=5, Himax=6, Hitachi=7, Hynix=8, LDI=9, Matsushita=A, NEC=B, Novatec=C, OKI=D, Philips=E, Renasas=F, Samsung=G, Sanyo=H, Sharp=I, TI=J, Topro=K, Toshiba=L, Windbond=M
Year: 2001=1, 2002=2, 2003=3, 2004=4… Month: Jan. ~ Dec.=1, 2, 3, ~, 9, A, B, C
st
Day: 1 B
to 31st =1, 2, 3, ~, 9, A, B, C, ~, W, X, Y, exclude I, O, and U
LCD supplier
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9. PACKAGING
9.1 PACKING SPECIFICATIONS
(1) 3 LCD TV modules / 1 Box
(2) Box dimensions : 1190(L)x280(W)x712(H)mm
(3) Weight : approximately 50Kg (3 modules per box)
9.2 PACKING METHOD
Figures 9-1 and 9-2 are the packing method
LCD TV Module
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Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
Preliminary
3pcs Drier
Cushion(Bottom)
Anti-static Bag
Figure.9-1 packing method
PP Belt
Carton Label
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Film
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Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
Preliminary
Air Transportation &
Sea / Land Transportation (40ft Container)
(L1130*50*50mm)
(L1150*W1195*H140mm)
(L1400*50*50mm)
Sea / Land Transportation (40ft HQ Container)
(L1130*50*50mm)
(L625*50*50mm)
Film
(L1400*50*50mm)
(L1150*W1195*H140mm)
Figure.9-2 packing method
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Issued Date: Oct. 09, 2008
Model No.: V460H1 - LH4
Preliminary
10. PRECAUTIONS
10.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the module during assembly.
(2) It is recommended to assemble or to install a module into the user’s system in clean working areas. The
dust and oil may cause electrical short or worsen the polarizer.
(3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and backlight.
(4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the
damage and latch-up of the CMOS LSI chips.
(5) Do not plug in or pull out the I/F connector while the module is in operation.
(6) Do not disassemble the module.
(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and
easily scratched.
(8) Moisture can easily penetrate into LCD module and may cause the damage during operation.
(9) High temperature or humidity may deteriorate the performance of LCD module. Please store LCD
modules in the specified storage conditions.
(10) When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the
response time will become slow, and the starting voltage of CCFL will be higher than that of room
temperature.
10.2 SAFETY PRECAUTIONS
(1) The startup voltage of a backlight is over 1000 Volts. It may cause an electrical shock while assembling
with the inverter. Do not disassemble the module or insert anything into the backlight unit.
(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
(3) After the module’s end of life, it is not harmful in case of normal operation and storage.
10.3 SAFETY STANDARDS
The LCD module should be certified with safety regulations as follows:
Regulatory Item Standard
UL UL 60950-1: 2003
Information Technology equipment
Audio/Video Apparatus
If the module displays the same pattern for a long period of time, the phenomenon of image sticking may be
occurred.
cUL CAN/CSA C22.2 No.60950-1-03
CB IEC 60950-1:2001
UL
UL 60065: 2003
cUL CAN/CSA C22.2 No.60065-03
CB
IEC 60065:2001
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11. MECHANICAL CHARACTERISTIC
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Global LCD Panel Exchange Center
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