CMO V420H2-L01 Specification

Global LCD Panel Exchange Center

TFT LCD Approval Specification

MODEL NO.: V420H2 – L01

Customer:CLT ___________________________

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

Approved by:_______________________________

Note:

TV Head Division

Approved By

Chao-Chun Chung

Reviewed By

QA Dept. Product Development Div.

Hsin-Nan Chen WT Lin

Prepared By

LCD TV Marketing and Product Management Div.

CY Chang Justin wang

1

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

CONTENTS

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

REVISION HISTORY ..................................................................................................................................................4

1. GENERAL DESCRIPTION......................................................................................................................................5

1.1 OVERVIEW....................................................................................................................................................5

1.2 FEATURES ....................................................................................................................................................5

1.3 APPLICATION................................................................................................................................................5

1.4 GENERAL SPECIFICATIONS ........................................................................................................................5

1.5 MECHANICAL SPECIFICATIONS ..................................................................................................................6

2. ABSOLUTE MAXIMUM RATINGS ...........................................................................................................................7

2.1 ABSOLUTE RATINGS OF ENVIRONMENT....................................................................................................7

2.2 PACKAGE STORAGE....................................................................................................................................8

2.3 ELECTRICAL ABSOLUTE RATINGS..............................................................................................................8

2.3.1 TFT LCD MODULE...............................................................................................................................8

2.3.2 BACKLIGHT INVERTER UNIT .............................................................................................................8

3. ELECTRICAL CHARACTERISTICS ........................................................................................................................9

3.1 TFT LCD MODULE.........................................................................................................................................9

3.2 BACKLIGHT CONNECTOR PIN CONFIGURATION.....................................................................................12

3.2.1 LAMP SPECIFICATION......................................................................................................................12

3.2.2 ELECTRICAL SPECIFICATION..........................................................................................................12

3.2.3 INVERTER INTERFACE CHARACTERISTICS...................................................................................14

4. BLOCK DIAGRAM OF INTERFACE ......................................................................................................................16

4.1 TFT LCD MODULE.......................................................................................................................................16

5. INPUT TERMINAL PIN ASSIGNMENT ..................................................................................................................17

5.1 TFT LCD Module Input .................................................................................................................................17

5.3 INVERTER UNIT..........................................................................................................................................20

5.4 BLOCK DIAGRAM OF INTERFACE .............................................................................................................21

5.5 LVDS INTERFACE ....................................................................................................................................... 23

5.6 COLOR DATA INPUT ASSIGNMENT............................................................................................................24

6. INTERFACE TIMING............................................................................................................................................. 25

6.1 INPUT SIGNAL TIMING SPECIFICATIONS.................................................................................................. 25

2

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

7. OPTICAL CHARACTERISTICS.............................................................................................................................29

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

7.1 TEST CONDITIONS.....................................................................................................................................29

7.2 OPTICAL SPECIFICATIONS........................................................................................................................30

8. PRECAUTIONS ....................................................................................................................................................33

8.1 ASSEMBLY AND HANDLING PRECAUTIONS .............................................................................................33

8.2 SAFETY PRECAUTIONS .............................................................................................................................33

9. DEFINITION OF LABELS......................................................................................................................................34

9.1 CMO MODULE LABEL.................................................................................................................................34

10. PACKAGING.......................................................................................................................................................35

10.1 PACKAGING SPECIFICATIONS.................................................................................................................35

10.2 PACKAGING METHOD .............................................................................................................................. 35

11. MECHANICAL CHARACTERISTIC......................................................................................................................37

3

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

REVISION HISTORY

Version Date Page(New) Section Description
Ver. 0.0 Sep. 29, 2009 All All The tentative specification was first issued.
Ver. 1.0 Nov. 25. 2009 All All The Preliminary specification was first issued.
Ver. 2.0 Jan. 20. 2010 All All The Approval specification was first issued.

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

4

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

1. GENERAL DESCRIPTION

1.1 OVERVIEW

V420H2-L01 is a 42” TFT Liquid Crystal Display module with 12-CCFL Backlight unit and 2ch-LVDS interface.

This module supports 1920 x 1080 Full HDTV format and can display 16.7M colors (8-bit/color). The inverter

module for backlight is built-in.

1.2 FEATURES

Ё

High brightness (450 nits)

Ё

High contrast ratio (5000:1)

Ё

Fast response time (Gray to gray average 6.5 ms)

Ё

High color saturation (NTSC 72%)

Ё

Full HDTV (1920 x 1080 pixels) resolution, true HDTV format

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

Ё

DE (Data Enable) only mode

Ё

LVDS (Low Voltage Differential Signaling) interface

Ё

Optimized response time for 60 Hz frame rate

Ё

Ultra wide viewing angle : Super MVA technology

Ё

RoHS compliance

1.3 APPLICATION

Ё

Standard Living Room TVs.

Ё

Public Display Application.

Ё

Home Theater Application.

Ё

MFM Application.

1.4 GENERAL SPECIFICATIONS

Item Specification Unit Note

Active Area 930.24(H) x 523.26 (V) (42.02” diagonal) mm

Bezel Opening Area 939 (H) x 531 (V) mm

Driver Element a-si TFT active matrix - -

(1)

Pixel Number 1920 x R.G.B. x 1080 pixel -

Pixel Pitch(Sub Pixel) 0.1615 (H) x 0.4845 (V) mm -

Pixel Arrangement RGB vertical stripe - -

Display Colors 16.7M color -

Display Operation Mode Transmissive mode / Normally black - -

Surface Treatment Anti-Glare coating (Haze 11%) - (2)

Note (1) Please refer to the attached drawings in chapter 9 for more information about the front and back outlines.

Note (2) The spec. of the surface treatment is temporarily for this phase. CMO reserves the rights to change this

feature.

5

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

1.5 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note

Horizontal (H) 982.0 983.0 984.0 mm

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

Vertical (V) 575.0 576.0 577.0 mm Module Size

Depth (D) 49.8 50.8 51.8 mm

Weight - 9800 - g -

Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.

Note (2) Module Depth is between bezel to inverter cover.

(1), (2)

6

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

Item Symbol

Storage Temperature TST -20 +60 ºC (1)

Operating Ambient Temperature TOP 0 50 ºC (1), (2)

Shock (Non-Operating) SNOP - 50 G (3), (5)

Vibration (Non-Operating) VNOP - 1.0 G (4), (5)

Note (1) Temperature and relative humidity range is shown in the figure below.

Љ

(a) 90 %RH Max. (Ta

40 ºC).

www.panelook.com

Min. Max.

Value

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

Unit Note

(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).

(c) No condensation.

Note (2) The maximum operating temperature is based on the test condition that the surface temperature of

display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.

Thermal management should be considered in final product design to prevent the surface temperature of

display area from being over 65 ºC. The range of operating temperature may degrade in case of

improper thermal management in final product design.

Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.

Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.

Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that

the module would not be twisted or bent by the fixture.

7

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

2.2 PACKAGE STORAGE

When storing modules as spares for a long time, the following precaution is necessary.

(a) Do not leave the module in high temperature, and high humidity for a long time, It is highly recommended to

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

store the module with temperature from 0 to 35

(b) The module shall be stroed in dark place. Do not store the TFT-LCD module in direct sunlight or fluorescent

light.

2.3 ELECTRICAL ABSOLUTE RATINGS

2.3.1 TFT LCD MODULE

Item Symbol

Power Supply Voltage VCC -0.3 13.5 V

Logic Input Voltage VIN -0.3 3.6 V

2.3.2 BACKLIGHT INVERTER UNIT

Item Symbol

Lamp Voltage VW

к

at normal humidity without condensation.

Value

Unit Note

Min. Max.

Value

Unit Note

Min. Max.

Ё

3000 VRMS

(1)

Power Supply Voltage VBL 0 30 V (1)

Ё

Control Signal Level

Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation

should be restricted to the conditions described under Normal Operating Conditions.

Note (2) No moisture condensation or freezing.

Note (3) The control signals include On/Off Control and Internal PWM Control.

-0.3 7 V (1), (3)

8

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

3. ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE

(Ta = 25 ± 2 ºC)

Parameter Symbol

Power Supply Voltage VCC 10.8 12 13.2 V (1)

Rush Current I

White Pattern

www.panelook.com

Min. Typ. Max.

Ё

Ё

RUSH

Ё

Value

Ё

0.98

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

Unit Note

3.5 A (2)

Ё

A

Power Supply Current

Differential Input High
Threshold Voltage

Differential Input Low

Threshold Voltage
LVDS
interface

CMOS
interface

Note (1) The module should be always operated within the above ranges.

Note (2) Measurement condition:

Common Input Voltage VCM 1.0 1.2 1.4 V

Differential input voltage |VID| 200

Terminating Resistor R

Input High Threshold Voltage VIH 2.7

Input Low Threshold Voltage V

Horizontal Stripe

Black Pattern

Ё

Ё

V

LVT H

V

LVTL

T

0

IL

Ё

Ё

+100

Ё

Ё

0.98 1.2 A

0.51

Ё

Ё

Ё

100

Ё

Ё

(3)

Ё

Ё

-100 mV

600 mV

Ё

3.3 V

0.7 V

A

mV

(4)

ohm

9

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

Note (3) The specified power supply current is under the conditions at Vcc = 12 V, Ta = 25 ± 2 ºC, f

whereas a power dissipation check pattern below is displayed.

GND

Vcc rising time is 470us

0.9Vcc

0.1Vcc

470us

Vcc

= 60 Hz,

v

10

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

a. White Pattern

www.panelook.com

b. Black Pattern

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

Note (4) The LVDS input characteristics are as follows:

Active Area

Active Area

11

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

3.2 BACKLIGHT CONNECTOR PIN CONFIGURATION

3.2.1 LAMP SPECIFICATION

(Ta = 25 ± 2 ºC)

Parameter Symbol

Min. Typ. Max.

Value

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

Unit Note

Lamp Input Voltage VL - 1090 - V

Lamp Current IL

Lamp Turn On Voltage VS

Operating Frequency FL 35 - 70 KHz (3)

Lamp Life Time LBL 50,000 - - Hrs (4)

3.2.2 ELECTRICAL SPECIFICATION

(Ta = 25 ± 2 ºC)

Parameter Symbol

Power Consumption PBL

Power Supply Voltage VBL 22.8 24.0 25.2 VDC

10.0 10.5 11.0

8.5 9.0 9.5

- - 1910 V

- - 1560 V

Value

Unit Note

Min. Typ. Max.

˄ˇ˅

- 130

- 110

˄˅˅ʳ

RMS

mA

(1)

RMS

Ta = 0 ºC (2)

RMS

Ta = 25 ºC (2)

RMS

(5),(6) IL = 10.5mA

W

(5),(6) IL = 9.0mA

Power Supply Current IBL

Input Ripple Noise - - - 912 mVP-P VBL=22.8V

Oscillating Frequency FW 39 42 45 kHz

Dimming Frequency FB 150 160 170 Hz

Minimum Duty Ratio D

Note (1) Lamp current is measured by utilizing AC current probe and its value is average by measuring

master and slave board.

Note (2) The lamp starting voltage V

Otherwise the lamp may not be turned on.

Note (3) The lamp frequency may produce interference with horizontal synchronous frequency of the

display input signals, and it may result in line flow on the display. In order to avoid interference, the

lamp frequency should be detached from the horizontal synchronous frequency and its harmonics

as far as possible.

- 20 - %

MIN

should be applied to the lamp for more than 1 second after startup.

S

- 5.4 5.9

4.6 5.1

A Non Dimming

ʻˆʼ

12

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

Note (4) The life time of a lamp is defined as when the brightness is larger than 50% of its original value and

the effective discharge length is longer than 80% of its original length (Effective discharge length is

defined as an area that has equal to or more than 70% brightness compared to the brightness at

the center point of lamp.) as the time in which it continues to operate under the condition at Ta = 25

2к

and IL = 8.5~ 11.0mArms.

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

Note (5) The power supply capacity should be higher than the total inverter power consumption P

the pulse width modulation (PWM) mode was applied for backlight dimming, the driving current

changed as PWM duty on and off. The transient response of power supply should be considered

for the changing loading when inverter dimming.

Note (6) The measurement condition of Max. value is based on 42" backlight unit under input voltage 24V,

average lamp current 9.3 mA &10.8 mA and lighting 30 minutes later.

. Since

BL

13

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

3.2.3 INVERTER INTERFACE CHARACTERISTICS

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

Parameter Symbol

ON

On/Off Control Voltage

V

BLON

OFF

Internal PWM Control
Voltage

MAX

MIN

V

IPWM

HI

Status Signal

Status

LO

VBL Rising Time Tr1

VBL Falling Time Tf1

Control Signal Rising Time Tr

Control Signal Falling Time Tf

PWM Signal Rising Time T

PW MR

Condition

Te st

Ё

Ё

Ё

Ё

Ё

Ё

Ё

Ё

Ё

Ё

Ё

Value

Unit Note

Min. Typ. Max.

2.0

Ё

5.0 V

0

3.15 4.1 5.00 V Max. Duty Ratio

Ё

3.0 3.3 3.6 V Normal

0

30

30

Ё

Ё

Ё

Ё

0.8 V

0

Ё

Ё

Ё

Ё

Ё

Ё

Ё

V Min. Duty Ratio

0.8 V Abnormal

Ё

ms

10%-90%V

Ё

100 ms

100 ms

50 us

ms

BL

PWM Signal Falling Time T

PW MF

Input Impedance RIN

PWM Delay Time

BLON Delay Time

BLON Off Time

T

PW M

T

T

on

on1

Ё

Ё

Ё

Ё

Ё

1

100

300

300

Ё

50 us

Ё

Ё

MΩ

Ё

Ё

ms

Ё

Ё

ms

Ё

Ё

ms

Ё

Note (1) The Dimming signal should be valid before backlight turns on by BLON signal. It is inhibited to

change the internal/external PWM signal during backlight turn on period.

Note (2) The power sequence and control signal timing are shown in the following figure. For a certain

reason, the inverter has a possibility to be damaged with wrong power sequence and control

signal timing.

Note (3) While system is turned ON or OFF, the power sequences must follow as below descriptions:

Turn ON sequence: VBL

Turn OFF sequence: BLOFF

ʳʳʳʳʳ

Note (4) When the Dynamic CR has been turned on, the skipped range of VIPWM, 2.85V ~ 3.15V, is suggested

Ш

PWM signal Ш BLON

Ш

PWM signal Ш VBL

to avoid the abnormal phenomenon.

ʳʳʳʳ

14

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

15

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

)

4. BLOCK DIAGRAM OF INTERFACE

4.1 TFT LCD MODULE

ERX0(+/-)
ERX1(+/-)
ERX2(+/-)
ERX3(+/-)
ECLK(+/-)

ORX0(+/-)
ORX1(+/-)
ORX2(+/-)
ORX3(+/-)
OCLK(+/-)

(FI-RE51S-HF (JAE)) or equivalent

INPUT CONNECTOR

FRAME BUFFER

TIMING

CONTROLLER

SELLVDS
ODSEL

www.panelook.com

FRAME

BUFFER

TIMING

CONTROLLER

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

SCAN DRIVER

TFT LCD PANEL

(1920x3x1080)

DATA DRIVER(RSDS

Vcc

GND

CN1

VBL

GND

Status

A_DIM

I_PWM

BLON

INVERTER

CONNECTOR

CN1:S14B-PH-SM4-TB

(D)(LF) or equivalent

DC/DC CONVERTER

& REFERENCE

VOLTAGE

GENERATOR

CN2-CN7:SM02 (13.0)-BDAS-3-TB(LF)(JST) or equivalent

BACKLIGHT

UNIT

16

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

5. INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD Module Input

Pin Name Description Note

1 GND Ground
2 N.C. No Connection
3 N.C. No Connection
4 N.C. No Connection
5 N.C. No Connection
6 N.C. No Connection
7 SELLVDS LVDS data format Selection (3)(5)

N.C. No Connection

8

9 ODSEL

10 N.C. No Connection
11 N.C. No Connection
12 ERX0- Even pixel Negative LVDS differential data input. Channel 0
13 ERX0+ Even pixel Positive LVDS differential data input. Channel 0
14 ERX1- Even pixel Negative LVDS differential data input. Channel 1
15 ERX1+ Even pixel Positive LVDS differential data input. Channel 1
16 ERX2- Even pixel Negative LVDS differential data input. Channel 2
17 ERX2+ Even pixel Positive LVDS differential data input. Channel 2
18 GND Ground
19 ECLK- Even pixel Negative LVDS differential clock input
20 ECLK+ Even pixel Positive LVDS differential clock input
21 GND Ground
22 ERX3- Even pixel Negative LVDS differential data input. Channel 3
23 ERX3+ Even pixel Positive LVDS differential data input. Channel 3
24 N.C. No Connection
25 N.C. No Connection
26 N.C. No Connection
27 N.C. No Connection
28 ORX0- Odd pixel Negative LVDS differential data input. Channel 0
29 ORX0+ Odd pixel Positive LVDS differential data input. Channel 0
30 ORX1- Odd pixel Negative LVDS differential data input. Channel 1
31 ORX1+ Odd pixel Positive LVDS differential data input. Channel 1
32 ORX2- Odd pixel Negative LVDS differential data input. Channel 2
33 ORX2+ Odd pixel Positive LVDS differential data input. Channel 2
34 GND Ground
35 OCLK- Odd pixel Negative LVDS differential clock input.
36 OCLK+ Odd pixel Positive LVDS differential clock input.
37 GND Ground
38 ORX3- Odd pixel Negative LVDS differential data input. Channel 3
39 ORX3+ Odd pixel Positive LVDS differential data input. Channel 3
40 N.C. No Connection
41 N.C. No Connection
42 N.C. No Connection
43 N.C. No Connection
44 GND Ground
45 GND Ground
46 GND Ground
47 GND Ground

Overdrive Lookup Table Selection

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

(2)

(2)

(4)(6)

(2)

(7)

(7)

(7)

(2)

(7)

(7)

(7)

(2)

17

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

g

48 VCC +12V power supply
49 VCC +12V power supply
50 VCC +12V power supply
51 VCC +12V power supply

Note (1) LVDS connector pin orderdefined as follows

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

Note (2) Reserved for internal use. Please leave it open.

Note (3)

Note (4) Overdrive lookup table selection. The overdrive lookup table should be selected in accordance with the

Low = Open or connect to GND, High = Connect to +3.3V

Note (5) LVDS signal pin connected to the LCM side has the following diagram.

Low = Open or connect to GND: VESA Format, High = Connect to +3.3V: JEIDA Format.

frame rate to optimize image quality.

ODSEL Note

L or open Lookup table was optimized for 60 Hz frame rate.

H Lookup table was optimized for 50 Hz frame rate.

R1 in the system side should be less than 1K Ohm. (R1 < 1K Ohm)

R1

Selector (pin7)

R2

Settin

TCON

System side

System side: R1 < 1K

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

18

LCM side

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

Note (6) ODSEL signal pin connected to the LCM side has the following diagram.

R1 in the system side should be less than 1K Ohm. (R1 < 1K Ohm)

System side

System side

Note (7) Two pixel data send into the module for every clock cycle. The first pixel of the frame is odd pixel and

R1

R1

www.panelook.com

R2

R2

R3

R3

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

TCON

TCON

SettingSelector (pin9)

SettingSelector (pin9)

LCM side

LCM side

Notes

the second pixel is even pixel.

19

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

5.2 BACKLIGHT UNIT

The pin configuration for the housing and the leader wire is shown in the table below.

Pin Name Description Wire Color

1 HV High Voltage White
2 HV High Voltage Pink

1 HV(White)

2 HV(Pink)

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

1 HV(White)

2 HV(Pink)

1 HV(White)

2 HV(Pink)

5.3 INVERTER UNIT

CN1: S14B-PH-SM3-TB(D)(LF)(JST) or equivalent

Pin № Symbol Feature

1
2
3
4
5
6
7
8
9

10

11 STATUS

12 A_DIM

13 I_PWM Internal PWM Control Signal
14 BLON BL ON/OFF

CN2-CN7: SM02 -BDAS-3-TB(JST) or equivalent

Pin No. Symbol Description

1 CCFL HOT CCFL high voltage
2 CCFL HOT CCFL high voltage

VBL +24V

GND GND

Normal (3.3V)
Abnormal(GND)
Amplitude Dimming Control
HI(2.0V~5.0V)
LO(0V~0.8V)

20

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

p

p

OR0

5.4 BLOCK DIAGRAM OF INTERFACE

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

ER0-ER7

-

-

OR0-OR7

-

-

Host

Graphics

Controller

ERx0+

-

ERx1+

ERx1-

ERx2+

-

ERx3+

ERx3-

ECLK+

-

ORx0+

-

ORx1+

ORx1-

51

Ө

100pF

51

Ө

51Ө

100

F

Ө

51

51

Ө

100pF

51

Ө

51

Ө

100pF

51

Ө

RxOUT

ER0-ER7

-

-

-OR7

-

-

51

Ө

100pF

51

Ө

Timing

51

Ө

51

Ө

51Ө

100pF

100

F

Controller

LVDS Transmitter

THC63LVDM83A

(LVDF83A)

ORx2+

ORx3+

ORx3-

OCLK+

51

Ө

51
51

51

51

51

100pF

Ө
Ө

100pF

Ө

Ө

100pF

Ө

-

-

LVDS Receiver

21

Version 2.0

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

www.panelook.com

Global LCD Panel Exchange Center

ER0~ER7: Even pixel R data

EG0~EG7: Even pixel G data

EB0~EB7: Even pixel B data

OR0~OR7: Odd pixel R data

OG0~OG7: Odd pixel G data

OB0~OB7: Odd pixel B data

DE: Data enable signal

DCLK: Data clock signal

Notes (1) The system must have the transmitter to drive the module.

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

Notes (2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it

is used differentially.

22

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

5.5 LVDS INTERFACE

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

VESA LVDS forma

RXCLK

RXCLK





ORX0

ORX0

ORX1

ORX1

ORX2

ORX2

ORX3

ORX3

ERX0

ERX0

ERX1

ERX1

ERX2

ERX2





























Κʻ˦˘˟˟˩˗˦ʳ˼ː˟ʳʳ˸ʼ

Current F\FOH

Current F\FOH

R5G0 R4 R3 R2 R1

R5G0 R4 R3 R2 R1

B0 G5B1

B0 G5B1

R5G0 R4 R3 R2 R1

R5G0 R4 R3 R2 R1

B0 G5B1

B0 G5B1

G3 G2G4

G3 G2G4

G3 G2G4

G3 G2G4

R0

R0

G1

G1

B2B4 B3B5VS HSDE

B2B4 B3B5VS HSDE

R6G6 R7G7B7 B6RSVD

R6G6 R7G7B7 B6RSVD

R0

R0

G1

G1

B2B4 B3B5VS HSDE

B2B4 B3B5VS HSDE

ERX3



ERX3



JEDIA LVDS forma



RXCLK

RXCLK



ORX0

ORX0

ORX1

ORX1

ORX2

ORX2

ORX3

ORX3

ERX0

ERX0

ERX1

ERX1





Κʻ˦˘˟˟˩˗˦ʳ˼ː˛ʼ

R6G6 R7G7B7 B6RSVD

R6G6 R7G7B7 B6RSVD

Current F\FOH

Current F\FOH

R7G2 R6 R5 R4 R3

R7G2 R6 R5 R4 R3

B2 G7B3

B2 G7B3

R7G2 R6 R5 R4 R3

R7G2 R6 R5 R4 R3

B2 G7B3

B2 G7B3

G5 G4G6

G5 G4G6

G5 G4G6

G5 G4G6

R2

R2

G3

G3

B4B6 B5B7VS HSDE

B4B6 B5B7VS HSDE

R0G0 R1G1B1 B0RSVD

R0G0 R1G1B1 B0RSVD

R2

R2

G3

G3

ERX2

ERX2

ERX3

ERX3

23

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

B4B6 B5B7VS HSDE

B4B6 B5B7VS HSDE

R0G0 R1G1B1 B0RSVD

R0G0 R1G1B1 B0RSVD

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

R0~R7: Pixel R Data (7; MSB, 0; LSB)

G0~G7: Pixel G Data (7; MSB, 0; LSB)

B0~B7: Pixel B Data (7; MSB, 0; LSB)

DE : Data enable signal

DCLK : Data clock signal

Notes: (1) RSVD (reserved) pins on the transmitter shall be “H” or “L”.

5.6 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for the color.

The higher the binary input, the brighter the color. The table below provides the assignment of the color versus

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

data input.

Color

R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0

Black
Red

Green
Basic
Colors

Gray
Scale
Of
Red

Gray
Scale
Of
Green

Gray
Scale
Of
Blue

Note (1) 0: Low Level Voltage, 1: High Level Voltage

Blue

Cyan

Magenta

Yellow

White

Red (0) / Dark

Red (1)

Red (2)

:

:
Red (253)
Red (254)
Red (255)
Green (0) / Dark
Green (1)
Green (2)

:

:
Green (253)
Green (254)
Green (255)
Blue (0) / Dark
Blue (1)
Blue (2)

:

:
Blue (253)
Blue (254)
Blue (255)

0

0

1

1

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

1

1

1

1

1

1

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

Red Green Blue

0

0

0

0

0

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

:

:

:

:

:

:

:

:

:

:

1

1

1

1

0

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

Data Signal

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

1

0

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

0

1

1

1

1

1

1

0

1

0

0

1

1

1

1

1

1

1

0

0

0

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0
0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0
0

0
0

0

0

0

0

0

:

:

:

:

:

:

1

1

1

1

1

1

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

1

1

1

1

1

1

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

1

0

:

:

:

:

:

:

1

0

1
0

1

1

1

1

1

24

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

6. INTERFACE TIMING

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

(Ta = 25 ± 2 ºC)

The input signal timing specifications are shown as the following table and timing diagram.

Signal Item Symbol Min. Typ. Max. Unit Note

F

(=1/TC)

clkin_mod

F

F

LVDS

Receiver

Clock

LVDS

Frequency

Input cycle to
cycle jitter
Spread spectrum
modulation range

Spread spectrum
modulation frequency

Setup Time Tlvsu 600

Receiver

Data

Hold Time Tlvhd 600

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

clkin

T

rcl

200 KHz

SSM

60 74.25 80 MHz

Ё

F

-2%

clkin

Ё

Ё

Ё

Ё

200 ps (3)

F

+2% MHz

clkin

Ё

Ё

ps

ps

Approval

(4)

(5)

Vertical

Active

Display

Term

Horizontal

Active

Display

Term

Note (1)

Note (2)

Frame Rate

Fr5 47 50 53 Hz

57 60 63 Hz

F

r6

Total Tv 1115 1125 1135 Th

Tv=Tvd+T vb

Display Tvd 1080 1080 1080 Th

Blank Tvb 35 45 55 Th

Total Th 1050 1100 1150 Tc

Th=Thd+Thb

Display Thd 960 960 960 Tc

Blank Thb 90 140 190 Tc

ˣ˿˸˴˸ʳ˴˾˸ʳ˸ʳ˻˸ʳ˴˺˸ʳ˹ʳ˼˸˿ʳ˶˿˶˾ʳ˻˴ʳ˹˿˿ʳ˻˸ʳ˵˸˿ʳ˸˴˼Κʳ ʳ ʳ

˙

˶˿˾˼ʻ˴ʼ

˙



ˈ

˧˻˼ʳ

ʳЊʳ˙



ˉ

ʳ Ѽʳ ˧ʳ Ѽʳ ˧˻

ʳ Ѽʳ ˧ʳ Ѽʳ ˧˻ʳ Њʳ ˙

˶˿˾˼ʻ˼ʼʳ

ʳ

module is operated in DE only mode and please follow the input signal timing diagram belowΚ

(6)

Ё

Ё

Ё

Ё

25

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

DE

DCLK

DE

DATA

Th

Tvd

Tv

Tvb

Thd

Valid display data ( 960 clocks)

Note (3) The input clock cycle-to-cycle jitter is defined as below figures. Trcl = I T

Note (4) The SSCG (Spread spectrum clock generator) is defined as below figures.

– TI

1

26

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

Note (5) The LVDS timing diagram and setup/hold time is defined and showing as the following figures.

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

RXCLK+/-

RXn+/-

Tlvsu

Tlvhd

1T

14

LVDS RECEIVER INTERFACE TIMING DIAGRAM

Tc

3T

14

5T

14

7T

14

9T

14

11T

14

13T

14

Note (6) : (ODSEL) = H/L or open for 50/60Hz frame rate. Please refer to 5.1 for detail information

27

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

6.2 POWER ON/OFF SEQUENCE

(Ta = 25 ± 2 ºC)

To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the diagram

below.

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

10ms

50ms

50ms

ЉЉЉЉ

T4

0V

0.5

ЉЉЉЉ

T

1

ЉЉЉЉ

ЉЉЉЉ

T

ЉЉЉЉ

2

T

3

0

0

500ms

ЉЉЉЉ

ЉЉЉЉ

0.1V

CC

T

3

T1

2

T

0.1V

T4

cc

VALI D

LVDS Signals

0V

Power On

Power Off

0

ЉЉЉЉ

T

7

ЉЉЉЉ

ЉЉЉЉ

T2

T

8

ЉЉЉЉ

T3

T7

8

T

0

Option Signals

(SELLVDS,OD_SEL)

Backlight (Recommended)

ЉЉЉЉ

500ms

100ms

T5

ЉЉЉЉ

T

6

50%

5

T

50%

6

T

Power ON/OFF Sequence

Note (1) The supply voltage of the external system for the module input should follow the definition of Vcc.

Note (2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD

operation or the LCD turns off before the backlight turns off, the display may momentarily become

abnormal screen.

Note (3) In case of Vcc is in off level, please keep the level of input signals on the low or high impedance. If

T2<0,that maybe cause electrical overstress failure.

Note (4) T4 should be measured after the module has been fully discharged between power off and on period.

Note (5) Interface signal shall not be kept at high impedance when the power is on.

28

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

7. OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

Item Symbol Value Unit

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

Ambient Temperature Ta

Ambient Humidity Ha

Supply Voltage VCC 12 V

Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"

Lamp Current IL 10.5/9.0 mA

Oscillating Frequency (Inverter) FW

Vertical Frame Rate Fr 60 Hz

The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature change during

measuring. In order to stabilize the luminance, the measurement should be executed after lighting backlight for 1

hour in a windless room.

LCD Module

LCD P anel

CS -2000

25±2

50±10

42±3

oC

%RH

KHz

Field of View = 1º

500 mm

Light Shield Room

(Ambient Luminance < 2 lux)

29

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

7.2 OPTICAL SPECIFICATIONS

The relative measurement methods of optical characteristics are shown in 7.2. The following items should be

measured under the test conditions described in 7.1 and stable environment shown in 7.1.

Item Symbol Condition Min. Typ. Max. Unit Note

Contrast Ratio CR 3700 5000 - - Note (2)

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

Response Time

Center
Luminance of
White

White Variation

Cross Talk CT - - 4 % Note (5)

Color
Chromaticity

Normal Mode LC 360 450 Note (4)

ECO Mode

Red

Green

Blue

White

Gray to

gray

LC 320

δW

Rx 0.631 -

Ry 0.321 -

Gx 0.286 -

Gy 0.603 -

Bx 0.148 -

By 0.051 -

Wx 0.280 -

Wy

θx=0°, θy =0°

Viewing angle

at normal direction

- 6.5 12 ms Note (3)

400

- - 1.3 - Note (6)

Typ.

-0.03

0.285

- cd/m

Typ.

+0.03

2

Note (7)

-

-

Color Gamut C.G

θx+

Horizontal

θx-

Viewing Angle

θY+

Vertical

θY-

Note (1) Definition of Viewing Angle (θx, θy):

Viewing angles are measured by Conoscope Cono-80

Note (2) Definition of Contrast Ratio (CR):

The contrast ratio can be calculated by the following expression.

Contrast Ratio (CR) =

CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note (6).

CR≥20

68 72 - % NTSC

80 88 -

80 88 -

Deg. Note (1)

80 88 -

80 88 -

pixels whiteall withLuminance Surface
pixels black all withLuminance Surface

30

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

Note (3) Definition of Gray-to-Gray Switching Time:

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

The driving signal means the signal of gray level 0, 31, 63, 95, 127, 159, 191, 223 and 255.

Gray to gray average time means the average switching time of gray level 0, 31, 63, 95, 127, 159, 191,

223 and 255 to each other.

Note (4) Definition of Luminance of White (L

Measure the luminance of gray level 255 at center point and 5 points

= L (5), where L (X) is corresponding to the luminance of the point X at the figure in Note (6).

L

C

Note (5) Definition of Cross Talk (CT):

CT = | YB – YA | / YA

Where:

YA = Luminance of measured location without gray level 0 pattern (cd/m2)

YB = Luminance of measured location with gray level 0 pattern (cd/m2)

×

100 (%)

, L

):

C

AVE

δ

Note (6) Definition of White Variation (

W):

31

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

Measure the luminance of gray level 255 at 5 points

δ

W = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]

www.panelook.com

Horizontal Line

D

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

D

4

1 2

W

4

W

2

3 4

3W

4

Note (7) ECO mode:

ECO mode was selected by inverter pin: A_DIM.

D

2

3D

4

X

5

Test point :

X = 1 ~ 5

32

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

8. PRECAUTIONS

8.1 ASSEMBLY AND HANDLING PRECAUTIONS

[ 1 ] Do not apply rough force such as bending or twisting to the module during assembly.

[ 2 ] It is recommended to assemble or to install a module into the user’s system in clean working areas. The

dust and oil may cause electrical short or worsen the polarizer.

[ 3 ] Do not apply pressure or impulse to the module to prevent the damage of LCD panel and Backlight.

[ 4 ] Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the

damage and latch-up of the CMOS LSI chips.

[ 5 ] Do not plug in or pull out the I/F connector while the module is in operation.

[ 6 ] Do not disassemble the module.

[ 7 ] Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and easily

scratched.

[ 8 ] Moisture can easily penetrate into LCD module and may cause the damage during operation.

[ 9 ] When storing modules as spares for a long time, the following precaution is necessary.

[ 9.1 ] Do not leave the module in high temperature, and high humidity for a long time. It is highly

к

recommended to store the module with temperature from 0 to 35

condensation.

[ 9.2 ] The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or

fluorescent light.

[ 10 ] When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the

response time will become slow, and the starting voltage of CCFL will be higher than that of room

temperature.

8.2 SAFETY PRECAUTIONS

[ 1 ] The startup voltage of a Backlight is approximately 1000 Volts. It may cause an electrical shock while

assembling with the inverter. Do not disassemble the module or insert anything into the Backlight unit.

[ 2 ] If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In case of

contact with hands, skin or clothes, it has to be washed away thoroughly with soap.

at normal humidity without

[ 3 ] After the module’s end of life, it is not harmful in case of normal operation and storage.

33

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

9. DEFINITION OF LABELS

9.1 CMO MODULE LABEL

The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

CHI MEI

OPTOELECTRONICS

Model Name: V420H2-L01

Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.

Serial ID: X X X X X X X Y M D L N N N N

CHI MEI

OPTOELECTRONICS

V420H2 –L01 Rev. XX

X X X X X X X Y M D L N N N N

V420H2 –L01 Rev. XX

X X X X X X X Y M D L N N N N

Serial No.

Product Line

E207943

MADE IN TAIWAN

GEMN

RoHS

MADE IN CHINA

LEOO(or CAPG or C ANO)

RoHS

Serial ID includes the information as below:

Manufactured Date:

Year: 2010=0, 2011=1,2012=2…etc.

Month: 1~9, A~C, for Jan. ~ Dec.

Day: 1~9, A~Y, for 1st to 31st, exclude I ,O, and U.

Revision Code: Cover all the change

Serial No.: Manufacturing sequence of product

Product Line: 1 -> Line1, 2 -> Line 2, …etc.

Year, Month, Date

CMO Internal Use

CMO Internal Use

Revision

CMO Internal Use

34

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

10. PACKAGING

10.1 PACKAGING SPECIFICATIONS

(1) 4 LCD TV modules / 1 Box

(2) Box dimensions : 1085(L)x296(W)x653(H)mm

(3) Weight : Approx. 43Kg(4 modules per carton)

10.2 PACKAGING METHOD

Figures 10-1 and 10-2 are the packing method

LCD TV Module

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

Anti-Static Bag

Cushion(Bottom)

Carton

Cushion(Top)

PP Belt

Carton Label

Figure.10-1 packing method

35

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

(40ft HQ / 40ft Container)

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

Air TransportationSea / Land Transportation

Figure.10-2 packing method

36

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

11. MECHANICAL CHARACTERISTIC

ڻႝηިҽԖϦљ

CHI MEI

37

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

Issue Date:Jan.20.2010

Model No.: V420H2-L01

Approval

ڻႝηިҽԖϦљ

CHI MEI

38

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Version 2.0

www.panelook.com