CMO V420H1-LH7 Specification

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TFT LCD Approval Specification

MODEL NO.: V420H1 – LH7

Customer: _________________________________

Approved by:_______________________________

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Issue Date:Jun.1.2009

Model No.: V420H1-LH7

Approval

Note:

TV Head Division

Approved By

LY C hen

Reviewed By

QA Dept. Product Development Div.

Kc_Ko WT Lin

Prepared By

LCD TV Marketing and Product Management Div.

Wang-Yang Li David Chen

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CONTENTS

REVISION HISTORY ..................................................................................................................................................4

1. GENERAL DESCRIPTION......................................................................................................................................5

1.1 OVERVIEW....................................................................................................................................................5

1.2 FEATURES ....................................................................................................................................................5

1.3 APPLICATION................................................................................................................................................5

1.4 GENERAL SPECIFICATIONS ........................................................................................................................5

1.5 MECHANICAL SPECIFICATIONS ..................................................................................................................6

2. ABSOLUTE MAXIMUM RATINGS ...........................................................................................................................7

2.1 ABSOLUTE RATINGS OF ENVIRONMENT....................................................................................................7

2.2 PACKAGE STORAGE....................................................................................................................................8

2.3 ELECTRICAL ABSOLUTE RATINGS..............................................................................................................8

2.3.1 TFT LCD MODULE...............................................................................................................................8

2.3.2 BACKLIGHT INVERTER UNIT .............................................................................................................8

3. ELECTRICAL CHARACTERISTICS ........................................................................................................................9

3.1 TFT LCD MODULE.........................................................................................................................................9

3.2 BACKLIGHT CONNECTOR PIN CONFIGURATION..................................................................................... 11

3.2.1 LAMP SPECIFICATION...................................................................................................................... 11

3.2.2 ELECTRICAL SPECIFICATION.......................................................................................................... 11

3.2.3 INVERTER INTERFACE CHARACTERISTICS...................................................................................13

4. BLOCK DIAGRAM OF INTERFACE ......................................................................................................................15

4.1 TFT LCD MODULE.......................................................................................................................................15

5. INPUT TERMINAL PIN ASSIGNMENT ..................................................................................................................16

5.1 TFT LCD Module Input .................................................................................................................................16

5.2 BACKLIGHT UNIT........................................................................................................................................ 20

5.3 INVERTER UNIT..........................................................................................................................................20

5.4 BLOCK DIAGRAM OF INTERFACE .............................................................................................................20

5.5 LVDS INTERFACE ....................................................................................................................................... 24

5.6 COLOR DATA INPUT ASSIGNMENT............................................................................................................25

6. INTERFACE TIMING............................................................................................................................................. 26

6.1 INPUT SIGNAL TIMING SPECIFICATIONS.................................................................................................. 26

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6.2 POWER ON/OFF SEQUENCE .....................................................................................................................28

7. OPTICAL CHARACTERISTICS.............................................................................................................................29

7.1 TEST CONDITIONS.....................................................................................................................................29

7.2 OPTICAL SPECIFICATIONS........................................................................................................................30

8. PRECAUTIONS ....................................................................................................................................................33

8.1 ASSEMBLY AND HANDLING PRECAUTIONS .............................................................................................33

8.2 SAFETY PRECAUTIONS .............................................................................................................................33

9. DEFINITION OF LABELS......................................................................................................................................34

9.1 CMO MODULE LABEL.................................................................................................................................34

10. PACKAGING.......................................................................................................................................................35

10.1 PACKAGING SPECIFICATIONS.................................................................................................................35

10.2 PACKAGING METHOD .............................................................................................................................. 35

11. MECHANICAL CHARACTERISTICS ...................................................................................................................37

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REVISION HISTORY

Version Date Page(New) Section Description Ver. 0.0 Oct. 30, 2008 All All The tentative specification was first issued. Ver. 1.0 Dec. 24, 2008 5

11 11-12 13-14 20 30 35

Ver. 1.1 Dec. 31, 2008 13 3.2.3 Add note(4)

Ver. 2.0 Jun. 1, 2009 5

9 11

11

13

26 29 30

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1.1

3.2.1

3.2.2

3.2.3

5.3

7.2

10.2

1.2

3.1

3.2.1

3.2.2

3.2.3

6.1

7.1

7.2

Modified “8 bit + FRC” to “10 bit” Updated lamp specification Updated electrical specification Updated inverter interface characteristics Updated inverter pin 12 define Updated optical specifications Updated packaging method

Modified Response Time Modified Power Supply Current and Rush Current Modified Lamp Input Voltage, Current, and Turn On Voltage Modified Power Consumption, Power Supply Current, Input Ripple Noise, and Minimum Duty Ratio Modified Note(1)-(7) Modified Internal PWM Control Voltage and Status Signal Deleted Note (4) Updated frame rate 120Hz/100Hz max/min Modified Lamp Current Modified Response Time and Color Chromaticity

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1. GENERAL DESCRIPTION

1.1 OVERVIEW

V420H1-LH7 is a 42” TFT Liquid Crystal Display module with 12-CCFL Backlight unit and 4ch-LVDS interface.

This module supports 1920 x 1080 Full HDTV format and can display 1.07G colors (10bit/color). The inverter

module for backlight is built-in.

1.2 FEATURES

Ё

High brightness (500 nits)

Ё

High contrast ratio (4000:1)

Ё

Fast response time (Gray to gray average 4.5 ms)

Ё

High color saturation (NTSC 72%)

Ё

Full HDTV (1920 x 1080 pixels) resolution, true HDTV format

Ё

DE (Data Enable) only mode

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Ё

LVDS (Low Voltage Differential Signaling) interface

Ё

Optimized response time for 120 Hz frame rate

Ё

Ultra wide viewing angle : Super MVA technology

Ё

RoHS compliance

1.3 APPLICATION

Ё

Standard Living Room TVs.

Ё

Public Display Application.

Ё

Home Theater Application.

Ё

MFM Application.

1.4 GENERAL SPECIFICATIONS

Item Specification Unit Note

Active Area 930.24(H) x 523.26 (V) (42.02” diagonal) mm

Bezel Opening Area 937.24 (H) x 530.26 (V) mm

Driver Element a-si TFT active matrix - -

Pixel Number 1920 x R.G.B. x 1080 pixel -

(1)

Pixel Pitch(Sub Pixel) 0.1615 (H) x 0.4845 (V) mm -

Pixel Arrangement RGB vertical stripe - -

Display Colors 1.07G color -

Display Operation Mode Transmissive mode / Normally black - -

Surface Treatment Anti-Glare coating (Haze 11%) - (2)

Note (1) Please refer to the attached drawings in chapter 9 for more information about the front and back outlines.

Note (2) The spec. of the surface treatment is temporarily for this phase. CMO reserves the rights to change this

feature.

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1.5 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note

Horizontal (H) - 983.0 - mm

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Vertical (V) - 576.0 - mm Module Size

Depth (D) - 50.8 - mm

Weight - 10400 - g -

Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.

Note (2) Module Depth is between bezel to T-CON cover.

(1), (2)

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2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

Item Symbol

Storage Temperature TST -20 +60 ºC (1)

Operating Ambient Temperature TOP 0 50 ºC (1), (2)

Shock (Non-Operating) SNOP - 50 G (3), (5)

Vibration (Non-Operating) VNOP - 1.0 G (4), (5)

Note (1) Temperature and relative humidity range is shown in the figure below.

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Value

Unit Note

Min. Max.

(a) 90 %RH Max. (Ta

(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).

(c) No condensation.

Note (2) The maximum operating temperature is based on the test condition that the surface temperature of

display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.

Thermal management should be considered in final product design to prevent the surface temperature of

display area from being over 65 ºC. The range of operating temperature may degrade in case of

improper thermal management in final product design.

Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.

Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.

Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that

the module would not be twisted or bent by the fixture.

Љ

40 ºC).

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2.2 PACKAGE STORAGE

When storing modules as spares for a long time, the following precaution is necessary.

(a) Do not leave the module in high temperature, and high humidity for a long time, It is highly recommended to

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store the module with temperature from 0 to 35

(b) The module shall be stroed in dark place. Do not store the TFT-LCD module in direct sunlight or fluorescent

light.

к

at normal humidity without condensation.

2.3 ELECTRICAL ABSOLUTE RATINGS

2.3.1 TFT LCD MODULE

Value

Item Symbol

Power Supply Voltage VCC -0.3 13.5 V

Logic Input Voltage VIN -0.3 3.6 V

2.3.2 BACKLIGHT INVERTER UNIT

Item Symbol

Lamp Voltage VW

Min. Max.

Value

Min. Max.

Ё

3000 VRMS

Unit Note

(1)

Unit Note

Power Supply Voltage VBL 0 30 V (1)

Ё

Control Signal Level

Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation

should be restricted to the conditions described under Normal Operating Conditions.

Note (2) No moisture condensation or freezing.

Note (3) The control signals include On/Off Control and Internal PWM Control.

-0.3 7 V (1), (3)

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3. ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE

(Ta = 25 ± 2 ºC)

Parameter Symbol

Power Supply Voltage VCC 10.8 12 13.2 V (1)

Power Supply Ripple Voltage VRP - - 350 mV

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Value

Unit Note

Min. Typ. Max.

Rush Current I

White Pattern -

Power Supply Current

LVDS interface

CMOS interface

Note (1) The module should be always operated within the above ranges.

Note (2) Measurement condition:

Common Input Voltage V

Terminating Resistor R

Input High Threshold Voltage VIH 2.7 - 3.3 V

Input Low Threshold Voltage V

Vertical Stripe -

Black Pattern -

RUSH

1.125 1.25 1.375 V

LVC

- 100 - ohm

T

0 - 0.7 V

IL

-

- 5.0 A (2)

1.6 2.0 A

1.5 - A

1.0 - A

(3)

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Vcc rising time is 470us

0.9Vcc

0.1Vcc

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Vcc

Note (3) The specified power supply current is under the conditions at Vcc = 12 V, Ta = 25 ± 2 ºC, f

whereas a power dissipation check pattern below is displayed.

a. White Pattern

GND

Active Area

470us

b. Black Pattern

Active Area

= 120 Hz,

v

c. Vertical Stripe Pattern

Active Area

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3.2 BACKLIGHT CONNECTOR PIN CONFIGURATION

3.2.1 LAMP SPECIFICATION

(Ta = 25 ± 2 ºC)

Parameter Symbol

Min. Typ. Max.

Lamp Input Voltage VL - 1090 - VRMS -

9.7 10.2 10.7

Lamp Current IL

8.2 8.7 9.2

- - 1910 VRMS Ta = 0 ºC(2)

Lamp Turn On Voltage VS

- - 1520 VRMS Ta = 25 ºC(2)

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Value

Unit Note

mARMS (1)

Operating Frequency FL 35 - 70 KHz

Lamp Life Time LBL 50,000 60,000 - Hrs (4)

3.2.2 ELECTRICAL SPECIFICATION

(Ta = 25 ± 2 ºC)

Value

Parameter Symbol

Min. Typ. Max.

- 130 133 (5),6) IL = 10.2 mA

Power Consumption PBL

110 112 W (5),(6) IL = 8.7 mA

Power Supply Voltage VBL 22.8 24.0 25.2

5.4 5.6

Power Supply Current IBL

4.6 4.7

Input Ripple Noise - -

Oscillating Frequency FW 39 42 45

912 mV

Unit Note

A Non Dimming

kHz (3)

VBL=22.8V

P-P

Dimming Frequency FB

Minimum Duty Ratio D

Note (1) Lamp current is measured by utilizing AC current probe and its value is average by measuring

master and slave board.

Note (2) The lamp starting voltage V

Otherwise the lamp may not be turned on.

Note (3) The lamp frequency may produce interference with horizontal synchronous frequency of the

display input signals, and it may result in line flow on the display. In order to avoid interference, the

MIN

should be applied to the lamp for more than 1 second after startup.

S

150 160 170 Hz

10 20 - % (7)

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lamp frequency should be detached from the horizontal synchronous frequency and its harmonics

as far as possible.

Note (4) The life time of a lamp is defined as when the brightness is larger than 50% of its original value and

the effective discharge length is longer than 80% of its original length (Effective discharge length is

defined as an area that has equal to or more than 70% brightness compared to the brightness at

the center point of lamp.) as the time in which it continues to operate under the condition at Ta = 25

2к

and IL = 8.2~ 10.7mArms.

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Note (5) The power supply capacity should be higher than the total inverter power consumption P

the pulse width modulation (PWM) mode was applied for backlight dimming, the driving current

changed as PWM duty on and off. The transient response of power supply should be considered

for the changing loading when inverter dimming.

Note (6) The measurement condition of Max. value is based on 42" backlight unit under input voltage 24V,

average lamp current 6.1 mA and lighting 30 minutes later.

Note (7) 10% minimum duty ratio is only valid for electrical operation

HV (White +)

1

A A

HV(Pink -)

2

HV (White +)

1

HV(Pink -)

2

HV (White +)

1

HV(Pink -)

2

. Since

BL

A A

Inverter

HV(Pink -)

2

HV (White +)

1

HV(Pink -)

2

HV (White +)

1

HV(Pink -)

2

LCD Module

HV (White +)

1

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3.2.3 INVERTER INTERFACE CHARACTERISTICS

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Parameter Symbol

ON

On/Off Control Voltage

V

BLON

OFF

Internal PWM Control Voltage

MAX

MIN

V

IPWM

HI

Status Signal

Status

LO

VBL Rising Time Tr1

VBL Falling Time Tf1

Control Signal Rising Time Tr

Control Signal Falling Time Tf

PWM Signal Rising Time T

PW MR

Condition

Te st

Ё

Value

Unit Note

Min. Typ. Max.

2.0 5.0 5.0 V

0 0.8 0.8 V

2.85 3.0 3.15 V Maximum duty ratio

Ё

0

3.0 3.3 3.6 V

0 0.8 0.8 V

30

Ё

100 ms

50 us

V Minimum duty ratio

Normal

Abnormal

ms

10%-90%V

BL

ms

PWM Signal Falling Time T

PW MF

Input Impedance RIN

PWM Delay Time

T

PW M

Ton

BLON Delay Time

T

on1

BLON Off Time

T

off

Ё

300 Ё

ЁЁЁЁ

Ё

300 Ё

Ё

1

100

300

Ё

50 us

Ё

MΩ

Ё

ms

Ё

ms

ЁЁЁЁ

Ё

ms

Ё

ms

Ё

Note (1) The dimming signal should be valid before backlight turns on by BLON signal. It is inhibited to change

the internal/external PWM signal during backlight turn on period.

Note (2) The power sequence and control signal timing are shown in the following figure.

Note (3) The power sequence and control signal timing must follow the figure below. For a certain reason, the

inverter has a possibility to be damaged with wrong power sequence and control signal timing.

Turn ON sequence: VBL

Turn OFF sequence: BLOFF

Ш

PWM signal Ш BLON

Ш

PWM signal Ш VBL

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4. BLOCK DIAGRAM OF INTERFACE

4.1 TFT LCD MODULE

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CN1

VBL

GND

Status

A_DIM

I_PWM

BLON

CN8: 528520870 (Molex) or equivalent

INVERTER

CONNECTOR

CN1:S14B-PH-SM4-TB(

D)(LF) or equivalent

CN2-CN7:SM02 (13.0)-BDAS-3-TB(LF)(JST) or equivalent

BACKLIGHT UNIT

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5. INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD Module Input

CNF1 Connector Pin Assignment (FI-RE51S-HF(JAE) or equivalent)

Pin Name Description Note

1 GND Ground

2 N.C. No Connection (1)

3 N.C. No Connection (1)

4 N.C. No Connection (1)

5 N.C. No Connection (1)

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6 N.C. No Connection (1)

7 SELLVDS LVDS Data Format Selection (2)

8 N.C. No Connection (1)

9 N.C. No Connection (1)

10 N.C. No Connection (1)

11 GND Ground

12 ARX0- First pixel Negative LVDS differential data input. Channel 0

13 ARX0+ First pixel Positive LVDS differential data input. Channel 0

14 ARX1- First pixel Negative LVDS differential data input. Channel 1

15 ARX1+ First pixel Positive LVDS differential data input. Channel 1

16 ARX2- First pixel Negative LVDS differential data input. Channel 2

17 ARX2+ First pixel Positive LVDS differential data input. Channel 2

18 GND Ground

19 ACLK- First pixel Negative LVDS differential clock input.

20 ACLK+ First pixel Positive LVDS differential clock input.

21 GND Ground

22 ARX3- First pixel Negative LVDS differential data input. Channel 3

23 ARX3+ First pixel Positive LVDS differential data input. Channel 3

24 ARX4- First pixel Negative LVDS differential data input. Channel 4

25 ARX4+ First pixel Positive LVDS differential data input. Channel 4

26 N.C. No Connection (1)

27 N.C. No Connection (1)

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28 BRX0- Second pixel Negative LVDS differential data input. Channel 0

29 BRX0+ Second pixel Positive LVDS differential data input. Channel 0

30 BRX1- Second pixel Negative LVDS differential data input. Channel 1

31 BRX1+ Second pixel Positive LVDS differential data input. Channel 1

32 BRX2- Second pixel Negative LVDS differential data input. Channel 2

33 BRX2+ Second pixel Positive LVDS differential data input. Channel 2

34 GND Ground

35 BCLK- Second pixel Negative LVDS differential clock input.

36 BCLK+ Second pixel Positive LVDS differential clock input.

37 GND Ground

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38 BRX3- Second pixel Negative LVDS differential data input. Channel 3

39 BRX3+ Second pixel Positive LVDS differential data input. Channel 3

40 BRX4- Second pixel Negative LVDS differential data input. Channel 4

41 BRX4+ Second pixel Positive LVDS differential data input. Channel 4

42 N.C. No Connection (1)

43 N.C. No Connection (1)

44 GND Ground

45 GND Ground

46 GND Ground

47 N.C. No Connection (1)

48 VCC +12V power supply

49 VCC +12V power supply

50 VCC +12V power supply

51 VCC +12V power supply

CNF2 Connector Pin Assignment (FI-RE41S(JAE) or equivalent)

Pin Name Description Note

1 GND Ground

2 N.C. No Connection (1)

3 N.C. No Connection (1)

4 N.C. No Connection (1)

5 N.C. No Connection (1)

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6 N.C. No Connection (1)

7 N.C. No Connection (1)

8 N.C. No Connection (1)

9 GND Ground

10 CRX0- Third pixel Negative LVDS differential data input. Channel 0

11 CRX0+ Third pixel Positive LVDS differential data input. Channel 0

12 CRX1- Third pixel Negative LVDS differential data input. Channel 1

13 CRX1+ Third pixel Positive LVDS differential data input. Channel 1

14 CRX2- Third pixel Negative LVDS differential data input. Channel 2

15 CRX2+ Third pixel Positive LVDS differential data input. Channel 2

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16 GND Ground

17 CCLK- Third pixel Negative LVDS differential clock input.

18 CCLK+ Third pixel Positive LVDS differential clock input.

19 GND Ground

20 CRX3- Third pixel Negative LVDS differential data input. Channel 3

21 CRX3+ Third pixel Positive LVDS differential data input. Channel 3

22 CRX4- Third pixel Negative LVDS differential data input. Channel 4

23 CRX4+ Third pixel Positive LVDS differential data input. Channel 4

24 N.C. No Connection (1)

25 N.C. No Connection (1)

26 DRX0- Fourth pixel Negative LVDS differential data input. Channel 0

27 DRX0+ Fourth pixel Positive LVDS differential data input. Channel 0

28 DRX1- Fourth pixel Negative LVDS differential data input. Channel 1

29 DRX1+ Fourth pixel Positive LVDS differential data input. Channel 1

30 DRX2- Fourth pixel Negative LVDS differential data input. Channel 2

31 DRX2+ Fourth pixel Positive LVDS differential data input. Channel 2

32 GND Ground

33 DCLK- Fourth pixel Negative LVDS differential clock input.

34 DCLK+ Fourth pixel Positive LVDS differential clock input.

35 GND Ground

36 DRX3- Fourth pixel Negative LVDS differential data input. Channel 3

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37 DRX3+ Fourth pixel Positive LVDS differential data input. Channel 3

38 DRX4- Fourth pixel Negative LVDS differential data input. Channel 4

39 DRX4+ Fourth pixel Positive LVDS differential data input. Channel 4

40 N.C. No Connection (1)

41 N.C. No Connection (1)

Note (1) Please be reserved to open.

Note (2) Low or Open: VESA Format (Default), High: JEIDA Format.

Note (3) LVDS 4-port Data Mapping

Port Channel of LVDS Data Stream

1st Port First Pixel 1, 5, 9, ……1913, 1917

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2nd Port Second Pixel 2, 6, 10, ….1914, 1918

3rd Port Third Pixel 3, 7, 11, ….1915, 1919

4th Port Fourth Pixel 4, 8, 12, ….1916, 1920

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5.2 BACKLIGHT UNIT

The pin configuration for the housing and the leader wire is shown in the table below.

Pin Name Description Wire Color

1 HV High Voltage White

2 HV High Voltage Pink

1 HV(White)

2 HV(Pink)

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1 HV(White)

2 HV(Pink)

1 HV(White)

2 HV(Pink)

5.3 INVERTER UNIT

CN1: S14B-PH-SM4-TB(D)(LF)(JST) or equivalent

Pin № Symbol Feature

1 2 3 4 5 6 7 8 9

10

11 STATUS

12 A_DIM

13 I_PWM Internal PWM Control Signal 14 BLON BL ON/OFF

VBL +24V

GND GND

Normal (3.3V) Abnormal(GND) Amplitude Dimming Control

HI (2.0V ~ 5.0V)

LO(0~0.8V)

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CN2-CN7: SM02 -BDAS-3-TB(JST) or equivalent

Pin No. Symbol Description

1 CCFL HOT CCFL high voltage 2 CCFL HOT CCFL high voltage

CN8:

528520870 (Molex)

Pin No. Symbol Description

1 Board to Board 2 Board to Board

3 Board to Board

4 Board to Board

5 Board to Board

6 Board to Board 7 Board to Board 8

Note (1) Floating of any control signal is not allowed.

Control

Signal

or equivalent

Board to Board

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5.4 BLOCK DIAGRAM OF INTERFACE

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AR0~AR9: First pixel R data

AG0~AG9: First pixel G data

AB0~AB9: First pixel B data

BR0~BR9: Second pixel R data

BG0~BG9: Second pixel G data

BB0~BB9: Second pixel B data

DE: Data enable signal

DCLK: Data clock signal

Notes (1) The system must have the transmitter to drive the module.

Notes (2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it

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is used differentially.

Notes (3) Two pixel data send into the module for every clock cycle. The first pixel of the frame is odd pixel and

the second pixel is even pixel.

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5.5 LVDS INTERFACE

VESA Format : SELLVDS = L or Open

JEIDA Format : SELLVDS = H

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AR0~AR9: First Pixel R Data (9; MSB, 0; LSB)

AG0~AG9: First Pixel G Data (9; MSB, 0; LSB)

AB0~AB9: First Pixel B Data (9; MSB, 0; LSB)

DE : Data enable signal

DCLK : Data clock signal

RSVD : Reserved

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5.6 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 10-bit gray scale data input for the

color. The higher the binary input, the brighter the color. The table below provides the assignment of the color

versus data input.

Basic Colors

Gray Scale Of Red

Gray Scale Of Green

Gray Scale Of Blue

Color

Black Red Green Blue Cyan Magenta Yel lo w White

Red (0) / Dark Red (1) Red (2)

:

: Red (1021) Red (1022) Red (1023)

Green (0) / Dark Green (1) Green (2)

:

: Green (1021) Green (1022) Green (1023)

Blue (0) / Dark Blue (1) Blue (2)

:

: Blue (1021) Blue (1022) Blue (1023)

R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 G9 G8 G7 G6 G5 G4 G3 G2 G1 G0 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0

0

0 1 0 0 0 1 1 1

0 0 0

1 1 1

0 0 0

:

: 0 0 0

0 0 0

:

: 0 0 0

0

1

0

1

0

:

1

0

:

0

:

0

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0 0 1 0 1 0 1 1

0 0 0

:

: 0 0 0

0 0 0

:

: 1 1 1

0 0 0

:

: 0 0 0

Data Signal

0

1

0

1

0

1

0

:

0

:

1

0

:

0

1

0

1

1 0 1 1

0 0 0

:

: 0 0 0

0 0 0

:

: 1 1 1

0 0 0

:

: 0 0 0

1

0

1

0

:

0

:

1

0

:

0

1

0

1

0

1

0

:

;

0

1

0

1

0

:

0

1

0

1

0

1

0

:

0

1

0

1

0

1

0

1

0

1

0

:

0

0 0

0

:

0

0 0

0

:

1

0

1

0

1

0

:

0

:

0

:

1

0

1

0

1

0

:

0

:

0

1

0

1

0

:

1

0

1

0

1

Red Green Blue

0

1

1 0 0 0 1 1 1

0 0 0

:

: 1 1 1

0 0 0

:

: 0 0 0

0 0 0

:

: 0 0 0

1

0

1

0

:

1

0

:

0

:

0

1

0

1

0

1

0

1

0

1

0

1

0

:

0

1

0

1

0

1

0

:

0

1

0

1

0

1

0

:

0

Note (1) 0: Low Level Voltage, 1: High Level Voltage

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6. INTERFACE TIMING

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

(Ta = 25 ± 2 ºC)

The input signal timing specifications are shown as the following table and timing diagram.

Signal Item Symbol Min. Typ. Max. Unit Note

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LVDS Receiver Clock

LVDS Receiver Data

Vertical Active Display Term

Horizontal Active Display Term

Signal Item Symbol Min. Typ. Max. Unit Note

Frequency 1/Tc 60 74.25 80 MHz -

Input cycle to cycle jitter

Setup Time Tlvsu 600 - - ps -

Hold Time Tlvhd 600 - - ps -

Frame Rate 117 120 123 Hz

Total Tv 1115 1125 1139 Th

Display Tvd 1080 1080 1080 Th -

Blank Tvb 35 45 59 Th -

Total Th 540 550 575 Tc

Display Thd 480 480 480 Tc -

Blank Thb 60 70 95 Tc -

Trcl - - 200 ps -

Tv=Tvd+T vb

Th=Thd+Thb

LVDS Receiver Clock

LVDS Receiver Data

Horizontal Active Display Term

Note : Since the module is operated in DE only mode, Hsync and Vsync input signals should be set to low logic

level. Otherwise, this module would operate abnormally.

Frequency 1/Tc 60 74.25 80 MHz -

Input cycle to cycle jitter

Setup Time Tlvsu 600 - - ps -

Hold Time Tlvhd 600 - - ps -

Frame Rate 97 100 103 Hz

Total Tv 1115 1125 1139 Th

Display Tvd 1080 1080 1080 Th -

Blank Tvb 35 45 59 Th -

Total Th 540 550 575 Tc

Display Thd 480 480 480 Tc -

Blank Thb 60 70 95 Tc -

Trcl - - 200 ps -

Tv=Tvd+T vb

Th=Thd+Thb

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Valid display data (480 clocks)

LVDS INPUT INTERFACE TIMING DIAGRAM

Tc

RXCLK +

RXn +/-

Tlvsu Tlvhd

1T 14

3T

14

5T 14

7T

14

9T 14

11T

14

13T

14

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6.2 POWER ON/OFF SEQUENCE

(Ta = 25 ± 2 ºC)

To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the diagram

below.

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10ms

50ms

ЉЉЉЉ

T4

0V

0.5

ЉЉЉЉ

T

1

ЉЉЉЉ

T

2

ЉЉЉЉ

T

3

ЉЉЉЉ

0

500ms

0.1V

CC

T

3

T1

2

T

0.1V

T4

cc

LVDS Signals

0V

Power On

VALI D

Power Off

0

ЉЉЉЉ

T

7

ЉЉЉЉ

T2

T

8

ЉЉЉЉ

T3

T7

8

T

0

Option Signals

(SELLVDS)

Backlight (Recommended)

ЉЉЉЉ

500ms

100ms

T5

ЉЉЉЉ

T

6

50%

5

T

50%

6

T

Power ON/OFF Sequence

Note (1) The supply voltage of the external system for the module input should follow the definition of Vcc.

Note (2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD

operation or the LCD turns off before the backlight turns off, the display may momentarily become

abnormal screen.

Note (3) In case of Vcc is in off level, please keep the level of input signals on the low or high impedance. If

T2<0,that maybe cause electrical overstress failure.

Note (4) T4 should be measured after the module has been fully discharged between power off and on period.

Note (5) Interface signal shall not be kept at high impedance when the power is on.

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7. OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

Item Symbol Value Unit

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Ambient Temperature Ta

Ambient Humidity Ha

Supply Voltage VCC 12 V

Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"

Lamp Current IL 10.2 mA

Oscillating Frequency (Inverter) FW TBD KHz

Vertical Frame Rate Fr 120 Hz

The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature change during

measuring. In order to stabilize the luminance, the measurement should be executed after lighting backlight for 1

hour in a windless room.

LCD Module

LCD Panel

25±2

50±10

oC

%RH

Center of the Screen

Display Color Analyzer

(Minolta CA210)

Light Shield Room

(Ambient Luminance < 2 lux)

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7.2 OPTICAL SPECIFICATIONS

The relative measurement methods of optical characteristics are shown in 7.2. The following items should be

measured under the test conditions described in 7.1 and stable environment shown in 7.1.

Item Symbol Condition Min. Typ. Max. Unit Note

Contrast Ratio CR 4000 - - Note (2)

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Response Time

Center Luminance of White LC - 500 - cd/m2Note (4)

White Variation

Cross Talk CT - - 4 % Note (5)

Red

Green

Color Chromaticity

Blue

White

Color Gamut C.G

Gray to

gray

δW

Rx 0.640 -

Ry 0.332 -

Gx 0.267 -

Gy 0.595 -

Bx 0.150 -

By 0.063 -

Wx 0.280 -

Wy

θx=0°, θy =0°

Viewing angle

at normal direction

- 4.5 - ms Note (3)

- - 1.3 - Note (6)

Typ.

-0.03

0.285

- 72 - % NTSC

Typ.

+0.03

-

θx+

Horizontal

θx-

Viewing Angle

θY+

Vertical

θY-

Gamma - 2.2 - - -

Note (1) Definition of Viewing Angle (θx, θy):

Viewing angles are measured by Eldim EZ-Contrast 160R

CR≥20

80 88 -

Deg. Note (1)

80 88 -

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Note (2) Definition of Contrast Ratio (CR):

The contrast ratio can be calculated by the following expression.

Contrast Ratio (CR) =

CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note (6).

Note (3) Definition of Gray-to-Gray Switching Time:

pixels whiteall withLuminance Surface pixels black all withLuminance Surface

The driving signal means the signal of gray level 0, 124, 252, 380, 508, 636, 764, 892 and 1023.

Gray to gray average time means the average switching time of gray level 0, 124, 252, 380, 508, 636,

764, 892, 1023 to each other.

, L

Note (4) Definition of Luminance of White (L

Measure the luminance of gray level 1023 at center point and 5 points

= L (5), where L (X) is corresponding to the luminance of the point X at the figure in Note (6).

L

C

):

C

AVE

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Note (5) Definition of Cross Talk (CT):

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CT = | YB – YA | / YA

Where:

YA = Luminance of measured location without gray level 0 pattern (cd/m2)

YB = Luminance of measured location with gray level 0 pattern (cd/m2)

Note (6) Definition of White Variation (

Measure the luminance of gray level 1023 at 5 points

×

100 (%)

δ

W):

δ

W = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]

3W

Note (7) ECO mode:

W

4

W

2

4

Horizontal Line

D

4

D

2

1 2

5

3 4

3D

4

X

Test point :

X = 1 ~ 5

ECO mode was selected by inverter pin: A_DIM.

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8. PRECAUTIONS

8.1 ASSEMBLY AND HANDLING PRECAUTIONS

[ 1 ] Do not apply rough force such as bending or twisting to the module during assembly.

[ 2 ] It is recommended to assemble or to install a module into the user’s system in clean working areas. The

dust and oil may cause electrical short or worsen the polarizer.

[ 3 ] Do not apply pressure or impulse to the module to prevent the damage of LCD panel and Backlight.

[ 4 ] Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the

damage and latch-up of the CMOS LSI chips.

[ 5 ] Do not plug in or pull out the I/F connector while the module is in operation.

[ 6 ] Do not disassemble the module.

[ 7 ] Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and easily

scratched.

[ 8 ] Moisture can easily penetrate into LCD module and may cause the damage during operation.

[ 9 ] When storing modules as spares for a long time, the following precaution is necessary.

[ 9.1 ] Do not leave the module in high temperature, and high humidity for a long time. It is highly

к

recommended to store the module with temperature from 0 to 35

condensation.

[ 9.2 ] The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or

fluorescent light.

[ 10 ] When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the

response time will become slow, and the starting voltage of CCFL will be higher than that of room

temperature.

at normal humidity without

8.2 SAFETY PRECAUTIONS

[ 1 ] The startup voltage of a Backlight is approximately 1000 Volts. It may cause an electrical shock while

assembling with the inverter. Do not disassemble the module or insert anything into the Backlight unit.

[ 2 ] If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In case of

contact with hands, skin or clothes, it has to be washed away thoroughly with soap.

[ 3 ] After the module’s end of life, it is not harmful in case of normal operation and storage.

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9. DEFINITION OF LABELS

9.1 CMO MODULE LABEL

The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.

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Model Name: V420H1-LH7

Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.

Serial ID: X X X X X X X Y M D L N N N N

CHI MEI

OPTOELECTRONICS

CHI MEI

OPTOELECTRONICS

V420H1 -LH7 Rev. XX

X X X X X X X Y M D L N N N N

V420H1-LH7 Rev. XX

X X X X X X X Y M D L N N N N

Serial No.

Product Line

E207943

MADE IN TAIWAN

GEMN

RoHS

E207943

MADE IN TAIW AN

MADE IN CHINA

LEOO(or CAPG or C ANO)

RoHS

Serial ID includes the information as below:

Manufactured Date:

Year: 0~9, for 2000~2009

Month: 1~9, A~C, for Jan. ~ Dec.

Day: 1~9, A~Y, for 1st to 31st, exclude I ,O, and U.

Revision Code: Cover all the change

Serial No.: Manufacturing sequence of product

Product Line: 1 -> Line1, 2 -> Line 2, …etc.

Year, Month, Date

CMO Internal Use

Revision

CMO Internal Use

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10. PACKAGING

10.1 PACKAGING SPECIFICATIONS

(1) 4 LCD TV modules / 1 Box

(2) Box dimensions : 1100(L)x317(W)x670(H)mm

(3) Weight : Approx. 53.17Kg(4 modules per carton)

10.2 PACKAGING METHOD

Figures 10-1 and 10-2 are the packing method

LCD TV Module

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Cushion(Bottom)

Anti-Static Bag

Carton

Cushion(Top)

Carton Label

PP Belt

Figure.10-1 packing method

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Sea / Land Transportation

(40ft HQ Container)

Air Transportation

&

Sea / Land Transportation

(40ft Container)

Figure.10-2 packing method

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11. MECHANICAL CHARACTERISTICS

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CMO V420H1-LH7 Specification

Specifications and Main Features

Frequently Asked Questions

User Manual